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/** ****************************************************************************** * @file startup_stm32f10x_md.s * @author MCD Application Team * @version V3.5.0 * @date 11-March-2011 * @brief STM32F10x Medium Density Devices vector table for RIDE7 toolchain. * This module performs: * - Set the initial SP * - Set the initial PC == Reset_Handler, * - Set the vector table entries with the exceptions ISR address * - Configure the clock system * - Branches to main in the C library (which eventually * calls main()). * After Reset the Cortex-M3 processor is in Thread mode, * priority is Privileged, and the Stack is set to Main. ****************************************************************************** * @attention * * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. * * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2> ****************************************************************************** */ .syntax unified .cpu cortex-m3 .fpu softvfp .thumb .global g_pfnVectors .global Default_Handler /* start address for the initialization values of the .data section. defined in linker script */ .word _sidata /* start address for the .data section. defined in linker script */ .word _sdata /* end address for the .data section. defined in linker script */ .word _edata /* start address for the .bss section. defined in linker script */ .word _sbss /* end address for the .bss section. defined in linker script */ .word _ebss .equ BootRAM, 0xF108F85F /** * @brief This is the code that gets called when the processor first * starts execution following a reset event. Only the absolutely * necessary set is performed, after which the application * supplied main() routine is called. * @param None * @retval : None */ .section .text.Reset_Handler .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: /* Copy the data segment initializers from flash to SRAM */ movs r1, #0 b LoopCopyDataInit CopyDataInit: ldr r3, =_sidata ldr r3, [r3, r1] str r3, [r0, r1] adds r1, r1, #4 LoopCopyDataInit: ldr r0, =_sdata ldr r3, =_edata adds r2, r0, r1 cmp r2, r3 bcc CopyDataInit ldr r2, =_sbss b LoopFillZerobss /* Zero fill the bss segment. */ FillZerobss: movs r3, #0 str r3, [r2], #4 LoopFillZerobss: ldr r3, = _ebss cmp r2, r3 bcc FillZerobss /* Call the clock system intitialization function.*/ bl SystemInit /* Call the application's entry point.*/ bl main bx lr .size Reset_Handler, .-Reset_Handler /** * @brief This is the code that gets called when the processor receives an * unexpected interrupt. This simply enters an infinite loop, preserving * the system state for examination by a debugger. * @param None * @retval None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop .size Default_Handler, .-Default_Handler /****************************************************************************** * * The minimal vector table for a Cortex M3. Note that the proper constructs * must be placed on this to ensure that it ends up at physical address * 0x0000.0000. * ******************************************************************************/ .section .isr_vector,"a",%progbits .type g_pfnVectors, %object .size g_pfnVectors, .-g_pfnVectors g_pfnVectors: .word _estack .word Reset_Handler .word NMI_Handler .word HardFault_Handler .word MemManage_Handler .word BusFault_Handler .word UsageFault_Handler .word 0 .word 0 .word 0 .word 0 .word SVC_Handler .word DebugMon_Handler .word 0 .word PendSV_Handler .word SysTick_Handler .word WWDG_IRQHandler .word PVD_IRQHandler .word TAMPER_IRQHandler .word RTC_IRQHandler .word FLASH_IRQHandler .word RCC_IRQHandler .word EXTI0_IRQHandler .word EXTI1_IRQHandler .word EXTI2_IRQHandler .word EXTI3_IRQHandler .word EXTI4_IRQHandler .word DMA1_Channel1_IRQHandler .word DMA1_Channel2_IRQHandler .word DMA1_Channel3_IRQHandler .word DMA1_Channel4_IRQHandler .word DMA1_Channel5_IRQHandler .word DMA1_Channel6_IRQHandler .word DMA1_Channel7_IRQHandler .word ADC1_2_IRQHandler .word USB_HP_CAN1_TX_IRQHandler .word USB_LP_CAN1_RX0_IRQHandler .word CAN1_RX1_IRQHandler .word CAN1_SCE_IRQHandler .word EXTI9_5_IRQHandler .word TIM1_BRK_IRQHandler .word TIM1_UP_IRQHandler .word TIM1_TRG_COM_IRQHandler .word TIM1_CC_IRQHandler .word TIM2_IRQHandler .word TIM3_IRQHandler .word TIM4_IRQHandler .word I2C1_EV_IRQHandler .word I2C1_ER_IRQHandler .word I2C2_EV_IRQHandler .word I2C2_ER_IRQHandler .word SPI1_IRQHandler .word SPI2_IRQHandler .word USART1_IRQHandler .word USART2_IRQHandler .word USART3_IRQHandler .word EXTI15_10_IRQHandler .word RTCAlarm_IRQHandler .word USBWakeUp_IRQHandler .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word BootRAM /* @0x108. This is for boot in RAM mode for STM32F10x Medium Density devices. */ /******************************************************************************* * * Provide weak aliases for each Exception handler to the Default_Handler. * As they are weak aliases, any function with the same name will override * this definition. * *******************************************************************************/ .weak NMI_Handler .thumb_set NMI_Handler,Default_Handler .weak HardFault_Handler .thumb_set HardFault_Handler,Default_Handler .weak MemManage_Handler .thumb_set MemManage_Handler,Default_Handler .weak BusFault_Handler .thumb_set BusFault_Handler,Default_Handler .weak UsageFault_Handler .thumb_set UsageFault_Handler,Default_Handler .weak SVC_Handler .thumb_set SVC_Handler,Default_Handler .weak DebugMon_Handler .thumb_set DebugMon_Handler,Default_Handler .weak PendSV_Handler .thumb_set PendSV_Handler,Default_Handler .weak SysTick_Handler .thumb_set SysTick_Handler,Default_Handler .weak WWDG_IRQHandler .thumb_set WWDG_IRQHandler,Default_Handler .weak PVD_IRQHandler .thumb_set PVD_IRQHandler,Default_Handler .weak TAMPER_IRQHandler .thumb_set TAMPER_IRQHandler,Default_Handler .weak RTC_IRQHandler .thumb_set RTC_IRQHandler,Default_Handler .weak FLASH_IRQHandler .thumb_set FLASH_IRQHandler,Default_Handler .weak RCC_IRQHandler .thumb_set RCC_IRQHandler,Default_Handler .weak EXTI0_IRQHandler .thumb_set EXTI0_IRQHandler,Default_Handler .weak EXTI1_IRQHandler .thumb_set EXTI1_IRQHandler,Default_Handler .weak EXTI2_IRQHandler .thumb_set EXTI2_IRQHandler,Default_Handler .weak EXTI3_IRQHandler .thumb_set EXTI3_IRQHandler,Default_Handler .weak EXTI4_IRQHandler .thumb_set EXTI4_IRQHandler,Default_Handler .weak DMA1_Channel1_IRQHandler .thumb_set DMA1_Channel1_IRQHandler,Default_Handler .weak DMA1_Channel2_IRQHandler .thumb_set DMA1_Channel2_IRQHandler,Default_Handler .weak DMA1_Channel3_IRQHandler .thumb_set DMA1_Channel3_IRQHandler,Default_Handler .weak DMA1_Channel4_IRQHandler .thumb_set DMA1_Channel4_IRQHandler,Default_Handler .weak DMA1_Channel5_IRQHandler .thumb_set DMA1_Channel5_IRQHandler,Default_Handler .weak DMA1_Channel6_IRQHandler .thumb_set DMA1_Channel6_IRQHandler,Default_Handler .weak DMA1_Channel7_IRQHandler .thumb_set DMA1_Channel7_IRQHandler,Default_Handler .weak ADC1_2_IRQHandler .thumb_set ADC1_2_IRQHandler,Default_Handler .weak USB_HP_CAN1_TX_IRQHandler .thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler .weak USB_LP_CAN1_RX0_IRQHandler .thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler .weak CAN1_RX1_IRQHandler .thumb_set CAN1_RX1_IRQHandler,Default_Handler .weak CAN1_SCE_IRQHandler .thumb_set CAN1_SCE_IRQHandler,Default_Handler .weak EXTI9_5_IRQHandler .thumb_set EXTI9_5_IRQHandler,Default_Handler .weak TIM1_BRK_IRQHandler .thumb_set TIM1_BRK_IRQHandler,Default_Handler .weak TIM1_UP_IRQHandler .thumb_set TIM1_UP_IRQHandler,Default_Handler .weak TIM1_TRG_COM_IRQHandler .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler .weak TIM1_CC_IRQHandler .thumb_set TIM1_CC_IRQHandler,Default_Handler .weak TIM2_IRQHandler .thumb_set TIM2_IRQHandler,Default_Handler .weak TIM3_IRQHandler .thumb_set TIM3_IRQHandler,Default_Handler .weak TIM4_IRQHandler .thumb_set TIM4_IRQHandler,Default_Handler .weak I2C1_EV_IRQHandler .thumb_set I2C1_EV_IRQHandler,Default_Handler .weak I2C1_ER_IRQHandler .thumb_set I2C1_ER_IRQHandler,Default_Handler .weak I2C2_EV_IRQHandler .thumb_set I2C2_EV_IRQHandler,Default_Handler .weak I2C2_ER_IRQHandler .thumb_set I2C2_ER_IRQHandler,Default_Handler .weak SPI1_IRQHandler .thumb_set SPI1_IRQHandler,Default_Handler .weak SPI2_IRQHandler .thumb_set SPI2_IRQHandler,Default_Handler .weak USART1_IRQHandler .thumb_set USART1_IRQHandler,Default_Handler .weak USART2_IRQHandler .thumb_set USART2_IRQHandler,Default_Handler .weak USART3_IRQHandler .thumb_set USART3_IRQHandler,Default_Handler .weak EXTI15_10_IRQHandler .thumb_set EXTI15_10_IRQHandler,Default_Handler .weak RTCAlarm_IRQHandler .thumb_set RTCAlarm_IRQHandler,Default_Handler .weak USBWakeUp_IRQHandler .thumb_set USBWakeUp_IRQHandler,Default_Handler /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
10-channel-pwm-controller-stm32
trunk/libraries/startup/gcc_ride7/startup_stm32f10x_md.s
Unix Assembly
gpl3
10,269
/** ****************************************************************************** * @file startup_stm32f10x_xl.s * @author MCD Application Team * @version V3.5.0 * @date 11-March-2011 * @brief STM32F10x XL-Density Devices vector table for RIDE7 toolchain. * This module performs: * - Set the initial SP * - Set the initial PC == Reset_Handler, * - Set the vector table entries with the exceptions ISR address * - Configure the clock system and the external SRAM mounted on * STM3210E-EVAL board to be used as data memory (optional, * to be enabled by user) * - Branches to main in the C library (which eventually * calls main()). * After Reset the Cortex-M3 processor is in Thread mode, * priority is Privileged, and the Stack is set to Main. ****************************************************************************** * @attention * * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. * * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2> ****************************************************************************** */ .syntax unified .cpu cortex-m3 .fpu softvfp .thumb .global g_pfnVectors .global Default_Handler /* start address for the initialization values of the .data section. defined in linker script */ .word _sidata /* start address for the .data section. defined in linker script */ .word _sdata /* end address for the .data section. defined in linker script */ .word _edata /* start address for the .bss section. defined in linker script */ .word _sbss /* end address for the .bss section. defined in linker script */ .word _ebss /* stack used for SystemInit_ExtMemCtl; always internal RAM used */ .equ BootRAM, 0xF1E0F85F /** * @brief This is the code that gets called when the processor first * starts execution following a reset event. Only the absolutely * necessary set is performed, after which the application * supplied main() routine is called. * @param None * @retval : None */ .section .text.Reset_Handler .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: /* Copy the data segment initializers from flash to SRAM */ movs r1, #0 b LoopCopyDataInit CopyDataInit: ldr r3, =_sidata ldr r3, [r3, r1] str r3, [r0, r1] adds r1, r1, #4 LoopCopyDataInit: ldr r0, =_sdata ldr r3, =_edata adds r2, r0, r1 cmp r2, r3 bcc CopyDataInit ldr r2, =_sbss b LoopFillZerobss /* Zero fill the bss segment. */ FillZerobss: movs r3, #0 str r3, [r2], #4 LoopFillZerobss: ldr r3, = _ebss cmp r2, r3 bcc FillZerobss /* Call the clock system intitialization function.*/ bl SystemInit /* Call the application's entry point.*/ bl main bx lr .size Reset_Handler, .-Reset_Handler /** * @brief This is the code that gets called when the processor receives an * unexpected interrupt. This simply enters an infinite loop, preserving * the system state for examination by a debugger. * @param None * @retval None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop .size Default_Handler, .-Default_Handler /****************************************************************************** * * The minimal vector table for a Cortex M3. Note that the proper constructs * must be placed on this to ensure that it ends up at physical address * 0x0000.0000. * *******************************************************************************/ .section .isr_vector,"a",%progbits .type g_pfnVectors, %object .size g_pfnVectors, .-g_pfnVectors g_pfnVectors: .word _estack .word Reset_Handler .word NMI_Handler .word HardFault_Handler .word MemManage_Handler .word BusFault_Handler .word UsageFault_Handler .word 0 .word 0 .word 0 .word 0 .word SVC_Handler .word DebugMon_Handler .word 0 .word PendSV_Handler .word SysTick_Handler .word WWDG_IRQHandler .word PVD_IRQHandler .word TAMPER_IRQHandler .word RTC_IRQHandler .word FLASH_IRQHandler .word RCC_IRQHandler .word EXTI0_IRQHandler .word EXTI1_IRQHandler .word EXTI2_IRQHandler .word EXTI3_IRQHandler .word EXTI4_IRQHandler .word DMA1_Channel1_IRQHandler .word DMA1_Channel2_IRQHandler .word DMA1_Channel3_IRQHandler .word DMA1_Channel4_IRQHandler .word DMA1_Channel5_IRQHandler .word DMA1_Channel6_IRQHandler .word DMA1_Channel7_IRQHandler .word ADC1_2_IRQHandler .word USB_HP_CAN1_TX_IRQHandler .word USB_LP_CAN1_RX0_IRQHandler .word CAN1_RX1_IRQHandler .word CAN1_SCE_IRQHandler .word EXTI9_5_IRQHandler .word TIM1_BRK_TIM9_IRQHandler .word TIM1_UP_TIM10_IRQHandler .word TIM1_TRG_COM_TIM11_IRQHandler .word TIM1_CC_IRQHandler .word TIM2_IRQHandler .word TIM3_IRQHandler .word TIM4_IRQHandler .word I2C1_EV_IRQHandler .word I2C1_ER_IRQHandler .word I2C2_EV_IRQHandler .word I2C2_ER_IRQHandler .word SPI1_IRQHandler .word SPI2_IRQHandler .word USART1_IRQHandler .word USART2_IRQHandler .word USART3_IRQHandler .word EXTI15_10_IRQHandler .word RTCAlarm_IRQHandler .word USBWakeUp_IRQHandler .word TIM8_BRK_TIM12_IRQHandler .word TIM8_UP_TIM13_IRQHandler .word TIM8_TRG_COM_TIM14_IRQHandler .word TIM8_CC_IRQHandler .word ADC3_IRQHandler .word FSMC_IRQHandler .word SDIO_IRQHandler .word TIM5_IRQHandler .word SPI3_IRQHandler .word UART4_IRQHandler .word UART5_IRQHandler .word TIM6_IRQHandler .word TIM7_IRQHandler .word DMA2_Channel1_IRQHandler .word DMA2_Channel2_IRQHandler .word DMA2_Channel3_IRQHandler .word DMA2_Channel4_5_IRQHandler .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word BootRAM /* @0x1E0. This is for boot in RAM mode for STM32F10x XL Density devices. */ /******************************************************************************* * * Provide weak aliases for each Exception handler to the Default_Handler. * As they are weak aliases, any function with the same name will override * this definition. * *******************************************************************************/ .weak NMI_Handler .thumb_set NMI_Handler,Default_Handler .weak HardFault_Handler .thumb_set HardFault_Handler,Default_Handler .weak MemManage_Handler .thumb_set MemManage_Handler,Default_Handler .weak BusFault_Handler .thumb_set BusFault_Handler,Default_Handler .weak UsageFault_Handler .thumb_set UsageFault_Handler,Default_Handler .weak SVC_Handler .thumb_set SVC_Handler,Default_Handler .weak DebugMon_Handler .thumb_set DebugMon_Handler,Default_Handler .weak PendSV_Handler .thumb_set PendSV_Handler,Default_Handler .weak SysTick_Handler .thumb_set SysTick_Handler,Default_Handler .weak WWDG_IRQHandler .thumb_set WWDG_IRQHandler,Default_Handler .weak PVD_IRQHandler .thumb_set PVD_IRQHandler,Default_Handler .weak TAMPER_IRQHandler .thumb_set TAMPER_IRQHandler,Default_Handler .weak RTC_IRQHandler .thumb_set RTC_IRQHandler,Default_Handler .weak FLASH_IRQHandler .thumb_set FLASH_IRQHandler,Default_Handler .weak RCC_IRQHandler .thumb_set RCC_IRQHandler,Default_Handler .weak EXTI0_IRQHandler .thumb_set EXTI0_IRQHandler,Default_Handler .weak EXTI1_IRQHandler .thumb_set EXTI1_IRQHandler,Default_Handler .weak EXTI2_IRQHandler .thumb_set EXTI2_IRQHandler,Default_Handler .weak EXTI3_IRQHandler .thumb_set EXTI3_IRQHandler,Default_Handler .weak EXTI4_IRQHandler .thumb_set EXTI4_IRQHandler,Default_Handler .weak DMA1_Channel1_IRQHandler .thumb_set DMA1_Channel1_IRQHandler,Default_Handler .weak DMA1_Channel2_IRQHandler .thumb_set DMA1_Channel2_IRQHandler,Default_Handler .weak DMA1_Channel3_IRQHandler .thumb_set DMA1_Channel3_IRQHandler,Default_Handler .weak DMA1_Channel4_IRQHandler .thumb_set DMA1_Channel4_IRQHandler,Default_Handler .weak DMA1_Channel5_IRQHandler .thumb_set DMA1_Channel5_IRQHandler,Default_Handler .weak DMA1_Channel6_IRQHandler .thumb_set DMA1_Channel6_IRQHandler,Default_Handler .weak DMA1_Channel7_IRQHandler .thumb_set DMA1_Channel7_IRQHandler,Default_Handler .weak ADC1_2_IRQHandler .thumb_set ADC1_2_IRQHandler,Default_Handler .weak USB_HP_CAN1_TX_IRQHandler .thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler .weak USB_LP_CAN1_RX0_IRQHandler .thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler .weak CAN1_RX1_IRQHandler .thumb_set CAN1_RX1_IRQHandler,Default_Handler .weak CAN1_SCE_IRQHandler .thumb_set CAN1_SCE_IRQHandler,Default_Handler .weak EXTI9_5_IRQHandler .thumb_set EXTI9_5_IRQHandler,Default_Handler .weak TIM1_BRK_TIM9_IRQHandler .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler .weak TIM1_UP_TIM10_IRQHandler .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler .weak TIM1_TRG_COM_TIM11_IRQHandler .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler .weak TIM1_CC_IRQHandler .thumb_set TIM1_CC_IRQHandler,Default_Handler .weak TIM2_IRQHandler .thumb_set TIM2_IRQHandler,Default_Handler .weak TIM3_IRQHandler .thumb_set TIM3_IRQHandler,Default_Handler .weak TIM4_IRQHandler .thumb_set TIM4_IRQHandler,Default_Handler .weak I2C1_EV_IRQHandler .thumb_set I2C1_EV_IRQHandler,Default_Handler .weak I2C1_ER_IRQHandler .thumb_set I2C1_ER_IRQHandler,Default_Handler .weak I2C2_EV_IRQHandler .thumb_set I2C2_EV_IRQHandler,Default_Handler .weak I2C2_ER_IRQHandler .thumb_set I2C2_ER_IRQHandler,Default_Handler .weak SPI1_IRQHandler .thumb_set SPI1_IRQHandler,Default_Handler .weak SPI2_IRQHandler .thumb_set SPI2_IRQHandler,Default_Handler .weak USART1_IRQHandler .thumb_set USART1_IRQHandler,Default_Handler .weak USART2_IRQHandler .thumb_set USART2_IRQHandler,Default_Handler .weak USART3_IRQHandler .thumb_set USART3_IRQHandler,Default_Handler .weak EXTI15_10_IRQHandler .thumb_set EXTI15_10_IRQHandler,Default_Handler .weak RTCAlarm_IRQHandler .thumb_set RTCAlarm_IRQHandler,Default_Handler .weak USBWakeUp_IRQHandler .thumb_set USBWakeUp_IRQHandler,Default_Handler .weak TIM8_BRK_TIM12_IRQHandler .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler .weak TIM8_UP_TIM13_IRQHandler .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler .weak TIM8_TRG_COM_TIM14_IRQHandler .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler .weak TIM8_CC_IRQHandler .thumb_set TIM8_CC_IRQHandler,Default_Handler .weak ADC3_IRQHandler .thumb_set ADC3_IRQHandler,Default_Handler .weak FSMC_IRQHandler .thumb_set FSMC_IRQHandler,Default_Handler .weak SDIO_IRQHandler .thumb_set SDIO_IRQHandler,Default_Handler .weak TIM5_IRQHandler .thumb_set TIM5_IRQHandler,Default_Handler .weak SPI3_IRQHandler .thumb_set SPI3_IRQHandler,Default_Handler .weak UART4_IRQHandler .thumb_set UART4_IRQHandler,Default_Handler .weak UART5_IRQHandler .thumb_set UART5_IRQHandler,Default_Handler .weak TIM6_IRQHandler .thumb_set TIM6_IRQHandler,Default_Handler .weak TIM7_IRQHandler .thumb_set TIM7_IRQHandler,Default_Handler .weak DMA2_Channel1_IRQHandler .thumb_set DMA2_Channel1_IRQHandler,Default_Handler .weak DMA2_Channel2_IRQHandler .thumb_set DMA2_Channel2_IRQHandler,Default_Handler .weak DMA2_Channel3_IRQHandler .thumb_set DMA2_Channel3_IRQHandler,Default_Handler .weak DMA2_Channel4_5_IRQHandler .thumb_set DMA2_Channel4_5_IRQHandler,Default_Handler /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
10-channel-pwm-controller-stm32
trunk/libraries/startup/gcc_ride7/startup_stm32f10x_xl.s
Unix Assembly
gpl3
13,261
/** ****************************************************************************** * @file startup_stm32f10x_hd.s * @author MCD Application Team * @version V3.5.0 * @date 11-March-2011 * @brief STM32F10x High Density Devices vector table for RIDE7 toolchain. * This module performs: * - Set the initial SP * - Set the initial PC == Reset_Handler, * - Set the vector table entries with the exceptions ISR address * - Configure the clock system and the external SRAM mounted on * STM3210E-EVAL board to be used as data memory (optional, * to be enabled by user) * - Branches to main in the C library (which eventually * calls main()). * After Reset the Cortex-M3 processor is in Thread mode, * priority is Privileged, and the Stack is set to Main. ****************************************************************************** * @attention * * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. * * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2> ****************************************************************************** */ .syntax unified .cpu cortex-m3 .fpu softvfp .thumb .global g_pfnVectors .global Default_Handler /* start address for the initialization values of the .data section. defined in linker script */ .word _sidata /* start address for the .data section. defined in linker script */ .word _sdata /* end address for the .data section. defined in linker script */ .word _edata /* start address for the .bss section. defined in linker script */ .word _sbss /* end address for the .bss section. defined in linker script */ .word _ebss /* stack used for SystemInit_ExtMemCtl; always internal RAM used */ .equ BootRAM, 0xF1E0F85F /** * @brief This is the code that gets called when the processor first * starts execution following a reset event. Only the absolutely * necessary set is performed, after which the application * supplied main() routine is called. * @param None * @retval : None */ .section .text.Reset_Handler .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: /* Copy the data segment initializers from flash to SRAM */ movs r1, #0 b LoopCopyDataInit CopyDataInit: ldr r3, =_sidata ldr r3, [r3, r1] str r3, [r0, r1] adds r1, r1, #4 LoopCopyDataInit: ldr r0, =_sdata ldr r3, =_edata adds r2, r0, r1 cmp r2, r3 bcc CopyDataInit ldr r2, =_sbss b LoopFillZerobss /* Zero fill the bss segment. */ FillZerobss: movs r3, #0 str r3, [r2], #4 LoopFillZerobss: ldr r3, = _ebss cmp r2, r3 bcc FillZerobss /* Call the clock system intitialization function.*/ bl SystemInit /* Call the application's entry point.*/ bl main bx lr .size Reset_Handler, .-Reset_Handler /** * @brief This is the code that gets called when the processor receives an * unexpected interrupt. This simply enters an infinite loop, preserving * the system state for examination by a debugger. * @param None * @retval None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop .size Default_Handler, .-Default_Handler /****************************************************************************** * * The minimal vector table for a Cortex M3. Note that the proper constructs * must be placed on this to ensure that it ends up at physical address * 0x0000.0000. * *******************************************************************************/ .section .isr_vector,"a",%progbits .type g_pfnVectors, %object .size g_pfnVectors, .-g_pfnVectors g_pfnVectors: .word _estack .word Reset_Handler .word NMI_Handler .word HardFault_Handler .word MemManage_Handler .word BusFault_Handler .word UsageFault_Handler .word 0 .word 0 .word 0 .word 0 .word SVC_Handler .word DebugMon_Handler .word 0 .word PendSV_Handler .word SysTick_Handler .word WWDG_IRQHandler .word PVD_IRQHandler .word TAMPER_IRQHandler .word RTC_IRQHandler .word FLASH_IRQHandler .word RCC_IRQHandler .word EXTI0_IRQHandler .word EXTI1_IRQHandler .word EXTI2_IRQHandler .word EXTI3_IRQHandler .word EXTI4_IRQHandler .word DMA1_Channel1_IRQHandler .word DMA1_Channel2_IRQHandler .word DMA1_Channel3_IRQHandler .word DMA1_Channel4_IRQHandler .word DMA1_Channel5_IRQHandler .word DMA1_Channel6_IRQHandler .word DMA1_Channel7_IRQHandler .word ADC1_2_IRQHandler .word USB_HP_CAN1_TX_IRQHandler .word USB_LP_CAN1_RX0_IRQHandler .word CAN1_RX1_IRQHandler .word CAN1_SCE_IRQHandler .word EXTI9_5_IRQHandler .word TIM1_BRK_IRQHandler .word TIM1_UP_IRQHandler .word TIM1_TRG_COM_IRQHandler .word TIM1_CC_IRQHandler .word TIM2_IRQHandler .word TIM3_IRQHandler .word TIM4_IRQHandler .word I2C1_EV_IRQHandler .word I2C1_ER_IRQHandler .word I2C2_EV_IRQHandler .word I2C2_ER_IRQHandler .word SPI1_IRQHandler .word SPI2_IRQHandler .word USART1_IRQHandler .word USART2_IRQHandler .word USART3_IRQHandler .word EXTI15_10_IRQHandler .word RTCAlarm_IRQHandler .word USBWakeUp_IRQHandler .word TIM8_BRK_IRQHandler .word TIM8_UP_IRQHandler .word TIM8_TRG_COM_IRQHandler .word TIM8_CC_IRQHandler .word ADC3_IRQHandler .word FSMC_IRQHandler .word SDIO_IRQHandler .word TIM5_IRQHandler .word SPI3_IRQHandler .word UART4_IRQHandler .word UART5_IRQHandler .word TIM6_IRQHandler .word TIM7_IRQHandler .word DMA2_Channel1_IRQHandler .word DMA2_Channel2_IRQHandler .word DMA2_Channel3_IRQHandler .word DMA2_Channel4_5_IRQHandler .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word BootRAM /* @0x1E0. This is for boot in RAM mode for STM32F10x High Density devices. */ /******************************************************************************* * * Provide weak aliases for each Exception handler to the Default_Handler. * As they are weak aliases, any function with the same name will override * this definition. * *******************************************************************************/ .weak NMI_Handler .thumb_set NMI_Handler,Default_Handler .weak HardFault_Handler .thumb_set HardFault_Handler,Default_Handler .weak MemManage_Handler .thumb_set MemManage_Handler,Default_Handler .weak BusFault_Handler .thumb_set BusFault_Handler,Default_Handler .weak UsageFault_Handler .thumb_set UsageFault_Handler,Default_Handler .weak SVC_Handler .thumb_set SVC_Handler,Default_Handler .weak DebugMon_Handler .thumb_set DebugMon_Handler,Default_Handler .weak PendSV_Handler .thumb_set PendSV_Handler,Default_Handler .weak SysTick_Handler .thumb_set SysTick_Handler,Default_Handler .weak WWDG_IRQHandler .thumb_set WWDG_IRQHandler,Default_Handler .weak PVD_IRQHandler .thumb_set PVD_IRQHandler,Default_Handler .weak TAMPER_IRQHandler .thumb_set TAMPER_IRQHandler,Default_Handler .weak RTC_IRQHandler .thumb_set RTC_IRQHandler,Default_Handler .weak FLASH_IRQHandler .thumb_set FLASH_IRQHandler,Default_Handler .weak RCC_IRQHandler .thumb_set RCC_IRQHandler,Default_Handler .weak EXTI0_IRQHandler .thumb_set EXTI0_IRQHandler,Default_Handler .weak EXTI1_IRQHandler .thumb_set EXTI1_IRQHandler,Default_Handler .weak EXTI2_IRQHandler .thumb_set EXTI2_IRQHandler,Default_Handler .weak EXTI3_IRQHandler .thumb_set EXTI3_IRQHandler,Default_Handler .weak EXTI4_IRQHandler .thumb_set EXTI4_IRQHandler,Default_Handler .weak DMA1_Channel1_IRQHandler .thumb_set DMA1_Channel1_IRQHandler,Default_Handler .weak DMA1_Channel2_IRQHandler .thumb_set DMA1_Channel2_IRQHandler,Default_Handler .weak DMA1_Channel3_IRQHandler .thumb_set DMA1_Channel3_IRQHandler,Default_Handler .weak DMA1_Channel4_IRQHandler .thumb_set DMA1_Channel4_IRQHandler,Default_Handler .weak DMA1_Channel5_IRQHandler .thumb_set DMA1_Channel5_IRQHandler,Default_Handler .weak DMA1_Channel6_IRQHandler .thumb_set DMA1_Channel6_IRQHandler,Default_Handler .weak DMA1_Channel7_IRQHandler .thumb_set DMA1_Channel7_IRQHandler,Default_Handler .weak ADC1_2_IRQHandler .thumb_set ADC1_2_IRQHandler,Default_Handler .weak USB_HP_CAN1_TX_IRQHandler .thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler .weak USB_LP_CAN1_RX0_IRQHandler .thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler .weak CAN1_RX1_IRQHandler .thumb_set CAN1_RX1_IRQHandler,Default_Handler .weak CAN1_SCE_IRQHandler .thumb_set CAN1_SCE_IRQHandler,Default_Handler .weak EXTI9_5_IRQHandler .thumb_set EXTI9_5_IRQHandler,Default_Handler .weak TIM1_BRK_IRQHandler .thumb_set TIM1_BRK_IRQHandler,Default_Handler .weak TIM1_UP_IRQHandler .thumb_set TIM1_UP_IRQHandler,Default_Handler .weak TIM1_TRG_COM_IRQHandler .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler .weak TIM1_CC_IRQHandler .thumb_set TIM1_CC_IRQHandler,Default_Handler .weak TIM2_IRQHandler .thumb_set TIM2_IRQHandler,Default_Handler .weak TIM3_IRQHandler .thumb_set TIM3_IRQHandler,Default_Handler .weak TIM4_IRQHandler .thumb_set TIM4_IRQHandler,Default_Handler .weak I2C1_EV_IRQHandler .thumb_set I2C1_EV_IRQHandler,Default_Handler .weak I2C1_ER_IRQHandler .thumb_set I2C1_ER_IRQHandler,Default_Handler .weak I2C2_EV_IRQHandler .thumb_set I2C2_EV_IRQHandler,Default_Handler .weak I2C2_ER_IRQHandler .thumb_set I2C2_ER_IRQHandler,Default_Handler .weak SPI1_IRQHandler .thumb_set SPI1_IRQHandler,Default_Handler .weak SPI2_IRQHandler .thumb_set SPI2_IRQHandler,Default_Handler .weak USART1_IRQHandler .thumb_set USART1_IRQHandler,Default_Handler .weak USART2_IRQHandler .thumb_set USART2_IRQHandler,Default_Handler .weak USART3_IRQHandler .thumb_set USART3_IRQHandler,Default_Handler .weak EXTI15_10_IRQHandler .thumb_set EXTI15_10_IRQHandler,Default_Handler .weak RTCAlarm_IRQHandler .thumb_set RTCAlarm_IRQHandler,Default_Handler .weak USBWakeUp_IRQHandler .thumb_set USBWakeUp_IRQHandler,Default_Handler .weak TIM8_BRK_IRQHandler .thumb_set TIM8_BRK_IRQHandler,Default_Handler .weak TIM8_UP_IRQHandler .thumb_set TIM8_UP_IRQHandler,Default_Handler .weak TIM8_TRG_COM_IRQHandler .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler .weak TIM8_CC_IRQHandler .thumb_set TIM8_CC_IRQHandler,Default_Handler .weak ADC3_IRQHandler .thumb_set ADC3_IRQHandler,Default_Handler .weak FSMC_IRQHandler .thumb_set FSMC_IRQHandler,Default_Handler .weak SDIO_IRQHandler .thumb_set SDIO_IRQHandler,Default_Handler .weak TIM5_IRQHandler .thumb_set TIM5_IRQHandler,Default_Handler .weak SPI3_IRQHandler .thumb_set SPI3_IRQHandler,Default_Handler .weak UART4_IRQHandler .thumb_set UART4_IRQHandler,Default_Handler .weak UART5_IRQHandler .thumb_set UART5_IRQHandler,Default_Handler .weak TIM6_IRQHandler .thumb_set TIM6_IRQHandler,Default_Handler .weak TIM7_IRQHandler .thumb_set TIM7_IRQHandler,Default_Handler .weak DMA2_Channel1_IRQHandler .thumb_set DMA2_Channel1_IRQHandler,Default_Handler .weak DMA2_Channel2_IRQHandler .thumb_set DMA2_Channel2_IRQHandler,Default_Handler .weak DMA2_Channel3_IRQHandler .thumb_set DMA2_Channel3_IRQHandler,Default_Handler .weak DMA2_Channel4_5_IRQHandler .thumb_set DMA2_Channel4_5_IRQHandler,Default_Handler /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
10-channel-pwm-controller-stm32
trunk/libraries/startup/gcc_ride7/startup_stm32f10x_hd.s
Unix Assembly
gpl3
13,160
/** ****************************************************************************** * @file startup_stm32f10x_hd_vl.s * @author MCD Application Team * @version V3.5.0 * @date 11-March-2011 * @brief STM32F10x High Density Value Line Devices vector table for RIDE7 * toolchain. * This module performs: * - Set the initial SP * - Set the initial PC == Reset_Handler, * - Set the vector table entries with the exceptions ISR address * - Configure the clock system and the external SRAM mounted on * STM32100E-EVAL board to be used as data memory (optional, * to be enabled by user) * - Branches to main in the C library (which eventually * calls main()). * After Reset the Cortex-M3 processor is in Thread mode, * priority is Privileged, and the Stack is set to Main. ****************************************************************************** * @attention * * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. * * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2> ****************************************************************************** */ .syntax unified .cpu cortex-m3 .fpu softvfp .thumb .global g_pfnVectors .global Default_Handler /* start address for the initialization values of the .data section. defined in linker script */ .word _sidata /* start address for the .data section. defined in linker script */ .word _sdata /* end address for the .data section. defined in linker script */ .word _edata /* start address for the .bss section. defined in linker script */ .word _sbss /* end address for the .bss section. defined in linker script */ .word _ebss .equ BootRAM, 0xF108F85F /** * @brief This is the code that gets called when the processor first * starts execution following a reset event. Only the absolutely * necessary set is performed, after which the application * supplied main() routine is called. * @param None * @retval None */ .section .text.Reset_Handler .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: /* Copy the data segment initializers from flash to SRAM */ movs r1, #0 b LoopCopyDataInit CopyDataInit: ldr r3, =_sidata ldr r3, [r3, r1] str r3, [r0, r1] adds r1, r1, #4 LoopCopyDataInit: ldr r0, =_sdata ldr r3, =_edata adds r2, r0, r1 cmp r2, r3 bcc CopyDataInit ldr r2, =_sbss b LoopFillZerobss /* Zero fill the bss segment. */ FillZerobss: movs r3, #0 str r3, [r2], #4 LoopFillZerobss: ldr r3, = _ebss cmp r2, r3 bcc FillZerobss /* Call the clock system intitialization function.*/ bl SystemInit /* Call the application's entry point.*/ bl main bx lr .size Reset_Handler, .-Reset_Handler /** * @brief This is the code that gets called when the processor receives an * unexpected interrupt. This simply enters an infinite loop, preserving * the system state for examination by a debugger. * @param None * @retval None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop .size Default_Handler, .-Default_Handler /****************************************************************************** * * The minimal vector table for a Cortex M3. Note that the proper constructs * must be placed on this to ensure that it ends up at physical address * 0x0000.0000. * ******************************************************************************/ .section .isr_vector,"a",%progbits .type g_pfnVectors, %object .size g_pfnVectors, .-g_pfnVectors g_pfnVectors: .word _estack .word Reset_Handler .word NMI_Handler .word HardFault_Handler .word MemManage_Handler .word BusFault_Handler .word UsageFault_Handler .word 0 .word 0 .word 0 .word 0 .word SVC_Handler .word DebugMon_Handler .word 0 .word PendSV_Handler .word SysTick_Handler .word WWDG_IRQHandler .word PVD_IRQHandler .word TAMPER_IRQHandler .word RTC_IRQHandler .word FLASH_IRQHandler .word RCC_IRQHandler .word EXTI0_IRQHandler .word EXTI1_IRQHandler .word EXTI2_IRQHandler .word EXTI3_IRQHandler .word EXTI4_IRQHandler .word DMA1_Channel1_IRQHandler .word DMA1_Channel2_IRQHandler .word DMA1_Channel3_IRQHandler .word DMA1_Channel4_IRQHandler .word DMA1_Channel5_IRQHandler .word DMA1_Channel6_IRQHandler .word DMA1_Channel7_IRQHandler .word ADC1_IRQHandler .word 0 .word 0 .word 0 .word 0 .word EXTI9_5_IRQHandler .word TIM1_BRK_TIM15_IRQHandler .word TIM1_UP_TIM16_IRQHandler .word TIM1_TRG_COM_TIM17_IRQHandler .word TIM1_CC_IRQHandler .word TIM2_IRQHandler .word TIM3_IRQHandler .word TIM4_IRQHandler .word I2C1_EV_IRQHandler .word I2C1_ER_IRQHandler .word I2C2_EV_IRQHandler .word I2C2_ER_IRQHandler .word SPI1_IRQHandler .word SPI2_IRQHandler .word USART1_IRQHandler .word USART2_IRQHandler .word USART3_IRQHandler .word EXTI15_10_IRQHandler .word RTCAlarm_IRQHandler .word CEC_IRQHandler .word TIM12_IRQHandler .word TIM13_IRQHandler .word TIM14_IRQHandler .word 0 .word 0 .word 0 .word 0 .word TIM5_IRQHandler .word SPI3_IRQHandler .word UART4_IRQHandler .word UART5_IRQHandler .word TIM6_DAC_IRQHandler .word TIM7_IRQHandler .word DMA2_Channel1_IRQHandler .word DMA2_Channel2_IRQHandler .word DMA2_Channel3_IRQHandler .word DMA2_Channel4_5_IRQHandler .word DMA2_Channel5_IRQHandler .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word BootRAM /* @0x1E0. This is for boot in RAM mode for STM32F10x High Density Value line devices. */ /******************************************************************************* * Provide weak aliases for each Exception handler to the Default_Handler. * As they are weak aliases, any function with the same name will override * this definition. *******************************************************************************/ .weak NMI_Handler .thumb_set NMI_Handler,Default_Handler .weak HardFault_Handler .thumb_set HardFault_Handler,Default_Handler .weak MemManage_Handler .thumb_set MemManage_Handler,Default_Handler .weak BusFault_Handler .thumb_set BusFault_Handler,Default_Handler .weak UsageFault_Handler .thumb_set UsageFault_Handler,Default_Handler .weak SVC_Handler .thumb_set SVC_Handler,Default_Handler .weak DebugMon_Handler .thumb_set DebugMon_Handler,Default_Handler .weak PendSV_Handler .thumb_set PendSV_Handler,Default_Handler .weak SysTick_Handler .thumb_set SysTick_Handler,Default_Handler .weak WWDG_IRQHandler .thumb_set WWDG_IRQHandler,Default_Handler .weak PVD_IRQHandler .thumb_set PVD_IRQHandler,Default_Handler .weak TAMPER_IRQHandler .thumb_set TAMPER_IRQHandler,Default_Handler .weak RTC_IRQHandler .thumb_set RTC_IRQHandler,Default_Handler .weak FLASH_IRQHandler .thumb_set FLASH_IRQHandler,Default_Handler .weak RCC_IRQHandler .thumb_set RCC_IRQHandler,Default_Handler .weak EXTI0_IRQHandler .thumb_set EXTI0_IRQHandler,Default_Handler .weak EXTI1_IRQHandler .thumb_set EXTI1_IRQHandler,Default_Handler .weak EXTI2_IRQHandler .thumb_set EXTI2_IRQHandler,Default_Handler .weak EXTI3_IRQHandler .thumb_set EXTI3_IRQHandler,Default_Handler .weak EXTI4_IRQHandler .thumb_set EXTI4_IRQHandler,Default_Handler .weak DMA1_Channel1_IRQHandler .thumb_set DMA1_Channel1_IRQHandler,Default_Handler .weak DMA1_Channel2_IRQHandler .thumb_set DMA1_Channel2_IRQHandler,Default_Handler .weak DMA1_Channel3_IRQHandler .thumb_set DMA1_Channel3_IRQHandler,Default_Handler .weak DMA1_Channel4_IRQHandler .thumb_set DMA1_Channel4_IRQHandler,Default_Handler .weak DMA1_Channel5_IRQHandler .thumb_set DMA1_Channel5_IRQHandler,Default_Handler .weak DMA1_Channel6_IRQHandler .thumb_set DMA1_Channel6_IRQHandler,Default_Handler .weak DMA1_Channel7_IRQHandler .thumb_set DMA1_Channel7_IRQHandler,Default_Handler .weak ADC1_IRQHandler .thumb_set ADC1_IRQHandler,Default_Handler .weak EXTI9_5_IRQHandler .thumb_set EXTI9_5_IRQHandler,Default_Handler .weak TIM1_BRK_TIM15_IRQHandler .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler .weak TIM1_UP_TIM16_IRQHandler .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler .weak TIM1_TRG_COM_TIM17_IRQHandler .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler .weak TIM1_CC_IRQHandler .thumb_set TIM1_CC_IRQHandler,Default_Handler .weak TIM2_IRQHandler .thumb_set TIM2_IRQHandler,Default_Handler .weak TIM3_IRQHandler .thumb_set TIM3_IRQHandler,Default_Handler .weak TIM4_IRQHandler .thumb_set TIM4_IRQHandler,Default_Handler .weak I2C1_EV_IRQHandler .thumb_set I2C1_EV_IRQHandler,Default_Handler .weak I2C1_ER_IRQHandler .thumb_set I2C1_ER_IRQHandler,Default_Handler .weak I2C2_EV_IRQHandler .thumb_set I2C2_EV_IRQHandler,Default_Handler .weak I2C2_ER_IRQHandler .thumb_set I2C2_ER_IRQHandler,Default_Handler .weak SPI1_IRQHandler .thumb_set SPI1_IRQHandler,Default_Handler .weak SPI2_IRQHandler .thumb_set SPI2_IRQHandler,Default_Handler .weak USART1_IRQHandler .thumb_set USART1_IRQHandler,Default_Handler .weak USART2_IRQHandler .thumb_set USART2_IRQHandler,Default_Handler .weak USART3_IRQHandler .thumb_set USART3_IRQHandler,Default_Handler .weak EXTI15_10_IRQHandler .thumb_set EXTI15_10_IRQHandler,Default_Handler .weak RTCAlarm_IRQHandler .thumb_set RTCAlarm_IRQHandler,Default_Handler .weak CEC_IRQHandler .thumb_set CEC_IRQHandler,Default_Handler .weak TIM12_IRQHandler .thumb_set TIM12_IRQHandler,Default_Handler .weak TIM13_IRQHandler .thumb_set TIM13_IRQHandler,Default_Handler .weak TIM14_IRQHandler .thumb_set TIM14_IRQHandler,Default_Handler .weak TIM5_IRQHandler .thumb_set TIM5_IRQHandler,Default_Handler .weak SPI3_IRQHandler .thumb_set SPI3_IRQHandler,Default_Handler .weak UART4_IRQHandler .thumb_set UART4_IRQHandler,Default_Handler .weak UART5_IRQHandler .thumb_set UART5_IRQHandler,Default_Handler .weak TIM6_DAC_IRQHandler .thumb_set TIM6_DAC_IRQHandler,Default_Handler .weak TIM7_IRQHandler .thumb_set TIM7_IRQHandler,Default_Handler .weak DMA2_Channel1_IRQHandler .thumb_set DMA2_Channel1_IRQHandler,Default_Handler .weak DMA2_Channel2_IRQHandler .thumb_set DMA2_Channel2_IRQHandler,Default_Handler .weak DMA2_Channel3_IRQHandler .thumb_set DMA2_Channel3_IRQHandler,Default_Handler .weak DMA2_Channel4_5_IRQHandler .thumb_set DMA2_Channel4_5_IRQHandler,Default_Handler .weak DMA2_Channel5_IRQHandler .thumb_set DMA2_Channel5_IRQHandler,Default_Handler /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
10-channel-pwm-controller-stm32
trunk/libraries/startup/gcc_ride7/startup_stm32f10x_hd_vl.s
Unix Assembly
gpl3
12,482
/** ****************************************************************************** * @file startup_stm32f10x_ld.s * @author MCD Application Team * @version V3.5.0 * @date 11-March-2011 * @brief STM32F10x Low Density Devices vector table for RIDE7 toolchain. * This module performs: * - Set the initial SP * - Set the initial PC == Reset_Handler, * - Set the vector table entries with the exceptions ISR address * - Configure the clock system * - Branches to main in the C library (which eventually * calls main()). * After Reset the Cortex-M3 processor is in Thread mode, * priority is Privileged, and the Stack is set to Main. ****************************************************************************** * @attention * * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. * * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2> ****************************************************************************** */ .syntax unified .cpu cortex-m3 .fpu softvfp .thumb .global g_pfnVectors .global Default_Handler /* start address for the initialization values of the .data section. defined in linker script */ .word _sidata /* start address for the .data section. defined in linker script */ .word _sdata /* end address for the .data section. defined in linker script */ .word _edata /* start address for the .bss section. defined in linker script */ .word _sbss /* end address for the .bss section. defined in linker script */ .word _ebss .equ BootRAM, 0xF108F85F /** * @brief This is the code that gets called when the processor first * starts execution following a reset event. Only the absolutely * necessary set is performed, after which the application * supplied main() routine is called. * @param None * @retval : None */ .section .text.Reset_Handler .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: /* Copy the data segment initializers from flash to SRAM */ movs r1, #0 b LoopCopyDataInit CopyDataInit: ldr r3, =_sidata ldr r3, [r3, r1] str r3, [r0, r1] adds r1, r1, #4 LoopCopyDataInit: ldr r0, =_sdata ldr r3, =_edata adds r2, r0, r1 cmp r2, r3 bcc CopyDataInit ldr r2, =_sbss b LoopFillZerobss /* Zero fill the bss segment. */ FillZerobss: movs r3, #0 str r3, [r2], #4 LoopFillZerobss: ldr r3, = _ebss cmp r2, r3 bcc FillZerobss /* Call the clock system intitialization function.*/ bl SystemInit /* Call the application's entry point.*/ bl main bx lr .size Reset_Handler, .-Reset_Handler /** * @brief This is the code that gets called when the processor receives an * unexpected interrupt. This simply enters an infinite loop, preserving * the system state for examination by a debugger. * @param None * @retval None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop .size Default_Handler, .-Default_Handler /****************************************************************************** * * The minimal vector table for a Cortex M3. Note that the proper constructs * must be placed on this to ensure that it ends up at physical address * 0x0000.0000. * ******************************************************************************/ .section .isr_vector,"a",%progbits .type g_pfnVectors, %object .size g_pfnVectors, .-g_pfnVectors g_pfnVectors: .word _estack .word Reset_Handler .word NMI_Handler .word HardFault_Handler .word MemManage_Handler .word BusFault_Handler .word UsageFault_Handler .word 0 .word 0 .word 0 .word 0 .word SVC_Handler .word DebugMon_Handler .word 0 .word PendSV_Handler .word SysTick_Handler .word WWDG_IRQHandler .word PVD_IRQHandler .word TAMPER_IRQHandler .word RTC_IRQHandler .word FLASH_IRQHandler .word RCC_IRQHandler .word EXTI0_IRQHandler .word EXTI1_IRQHandler .word EXTI2_IRQHandler .word EXTI3_IRQHandler .word EXTI4_IRQHandler .word DMA1_Channel1_IRQHandler .word DMA1_Channel2_IRQHandler .word DMA1_Channel3_IRQHandler .word DMA1_Channel4_IRQHandler .word DMA1_Channel5_IRQHandler .word DMA1_Channel6_IRQHandler .word DMA1_Channel7_IRQHandler .word ADC1_2_IRQHandler .word USB_HP_CAN1_TX_IRQHandler .word USB_LP_CAN1_RX0_IRQHandler .word CAN1_RX1_IRQHandler .word CAN1_SCE_IRQHandler .word EXTI9_5_IRQHandler .word TIM1_BRK_IRQHandler .word TIM1_UP_IRQHandler .word TIM1_TRG_COM_IRQHandler .word TIM1_CC_IRQHandler .word TIM2_IRQHandler .word TIM3_IRQHandler .word 0 .word I2C1_EV_IRQHandler .word I2C1_ER_IRQHandler .word 0 .word 0 .word SPI1_IRQHandler .word 0 .word USART1_IRQHandler .word USART2_IRQHandler .word 0 .word EXTI15_10_IRQHandler .word RTCAlarm_IRQHandler .word USBWakeUp_IRQHandler .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word BootRAM /* @0x108. This is for boot in RAM mode for STM32F10x Low Density devices.*/ /******************************************************************************* * * Provide weak aliases for each Exception handler to the Default_Handler. * As they are weak aliases, any function with the same name will override * this definition. * *******************************************************************************/ .weak NMI_Handler .thumb_set NMI_Handler,Default_Handler .weak HardFault_Handler .thumb_set HardFault_Handler,Default_Handler .weak MemManage_Handler .thumb_set MemManage_Handler,Default_Handler .weak BusFault_Handler .thumb_set BusFault_Handler,Default_Handler .weak UsageFault_Handler .thumb_set UsageFault_Handler,Default_Handler .weak SVC_Handler .thumb_set SVC_Handler,Default_Handler .weak DebugMon_Handler .thumb_set DebugMon_Handler,Default_Handler .weak PendSV_Handler .thumb_set PendSV_Handler,Default_Handler .weak SysTick_Handler .thumb_set SysTick_Handler,Default_Handler .weak WWDG_IRQHandler .thumb_set WWDG_IRQHandler,Default_Handler .weak PVD_IRQHandler .thumb_set PVD_IRQHandler,Default_Handler .weak TAMPER_IRQHandler .thumb_set TAMPER_IRQHandler,Default_Handler .weak RTC_IRQHandler .thumb_set RTC_IRQHandler,Default_Handler .weak FLASH_IRQHandler .thumb_set FLASH_IRQHandler,Default_Handler .weak RCC_IRQHandler .thumb_set RCC_IRQHandler,Default_Handler .weak EXTI0_IRQHandler .thumb_set EXTI0_IRQHandler,Default_Handler .weak EXTI1_IRQHandler .thumb_set EXTI1_IRQHandler,Default_Handler .weak EXTI2_IRQHandler .thumb_set EXTI2_IRQHandler,Default_Handler .weak EXTI3_IRQHandler .thumb_set EXTI3_IRQHandler,Default_Handler .weak EXTI4_IRQHandler .thumb_set EXTI4_IRQHandler,Default_Handler .weak DMA1_Channel1_IRQHandler .thumb_set DMA1_Channel1_IRQHandler,Default_Handler .weak DMA1_Channel2_IRQHandler .thumb_set DMA1_Channel2_IRQHandler,Default_Handler .weak DMA1_Channel3_IRQHandler .thumb_set DMA1_Channel3_IRQHandler,Default_Handler .weak DMA1_Channel4_IRQHandler .thumb_set DMA1_Channel4_IRQHandler,Default_Handler .weak DMA1_Channel5_IRQHandler .thumb_set DMA1_Channel5_IRQHandler,Default_Handler .weak DMA1_Channel6_IRQHandler .thumb_set DMA1_Channel6_IRQHandler,Default_Handler .weak DMA1_Channel7_IRQHandler .thumb_set DMA1_Channel7_IRQHandler,Default_Handler .weak ADC1_2_IRQHandler .thumb_set ADC1_2_IRQHandler,Default_Handler .weak USB_HP_CAN1_TX_IRQHandler .thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler .weak USB_LP_CAN1_RX0_IRQHandler .thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler .weak CAN1_RX1_IRQHandler .thumb_set CAN1_RX1_IRQHandler,Default_Handler .weak CAN1_SCE_IRQHandler .thumb_set CAN1_SCE_IRQHandler,Default_Handler .weak EXTI9_5_IRQHandler .thumb_set EXTI9_5_IRQHandler,Default_Handler .weak TIM1_BRK_IRQHandler .thumb_set TIM1_BRK_IRQHandler,Default_Handler .weak TIM1_UP_IRQHandler .thumb_set TIM1_UP_IRQHandler,Default_Handler .weak TIM1_TRG_COM_IRQHandler .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler .weak TIM1_CC_IRQHandler .thumb_set TIM1_CC_IRQHandler,Default_Handler .weak TIM2_IRQHandler .thumb_set TIM2_IRQHandler,Default_Handler .weak TIM3_IRQHandler .thumb_set TIM3_IRQHandler,Default_Handler .weak I2C1_EV_IRQHandler .thumb_set I2C1_EV_IRQHandler,Default_Handler .weak I2C1_ER_IRQHandler .thumb_set I2C1_ER_IRQHandler,Default_Handler .weak SPI1_IRQHandler .thumb_set SPI1_IRQHandler,Default_Handler .weak USART1_IRQHandler .thumb_set USART1_IRQHandler,Default_Handler .weak USART2_IRQHandler .thumb_set USART2_IRQHandler,Default_Handler .weak EXTI15_10_IRQHandler .thumb_set EXTI15_10_IRQHandler,Default_Handler .weak RTCAlarm_IRQHandler .thumb_set RTCAlarm_IRQHandler,Default_Handler .weak USBWakeUp_IRQHandler .thumb_set USBWakeUp_IRQHandler,Default_Handler /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
10-channel-pwm-controller-stm32
trunk/libraries/startup/gcc_ride7/startup_stm32f10x_ld.s
Unix Assembly
gpl3
9,814
/** ****************************************************************************** * @file startup_stm32f10x_cl.s * @author MCD Application Team * @version V3.5.0 * @date 11-March-2011 * @brief STM32F10x Connectivity line Devices vector table for RIDE7 toolchain. * This module performs: * - Set the initial SP * - Set the initial PC == Reset_Handler, * - Set the vector table entries with the exceptions ISR * address. * - Configure the clock system * - Branches to main in the C library (which eventually * calls main()). * After Reset the Cortex-M3 processor is in Thread mode, * priority is Privileged, and the Stack is set to Main. ****************************************************************************** * @attention * * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. * * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2> ****************************************************************************** */ .syntax unified .cpu cortex-m3 .fpu softvfp .thumb .global g_pfnVectors .global Default_Handler /* start address for the initialization values of the .data section. defined in linker script */ .word _sidata /* start address for the .data section. defined in linker script */ .word _sdata /* end address for the .data section. defined in linker script */ .word _edata /* start address for the .bss section. defined in linker script */ .word _sbss /* end address for the .bss section. defined in linker script */ .word _ebss .equ BootRAM, 0xF1E0F85F /** * @brief This is the code that gets called when the processor first * starts execution following a reset event. Only the absolutely * necessary set is performed, after which the application * supplied main() routine is called. * @param None * @retval : None */ .section .text.Reset_Handler .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: /* Copy the data segment initializers from flash to SRAM */ movs r1, #0 b LoopCopyDataInit CopyDataInit: ldr r3, =_sidata ldr r3, [r3, r1] str r3, [r0, r1] adds r1, r1, #4 LoopCopyDataInit: ldr r0, =_sdata ldr r3, =_edata adds r2, r0, r1 cmp r2, r3 bcc CopyDataInit ldr r2, =_sbss b LoopFillZerobss /* Zero fill the bss segment. */ FillZerobss: movs r3, #0 str r3, [r2], #4 LoopFillZerobss: ldr r3, = _ebss cmp r2, r3 bcc FillZerobss /* Call the clock system intitialization function.*/ bl SystemInit /* Call the application's entry point.*/ bl main bx lr .size Reset_Handler, .-Reset_Handler /** * @brief This is the code that gets called when the processor receives an * unexpected interrupt. This simply enters an infinite loop, preserving * the system state for examination by a debugger. * @param None * @retval None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop .size Default_Handler, .-Default_Handler /****************************************************************************** * * The minimal vector table for a Cortex M3. Note that the proper constructs * must be placed on this to ensure that it ends up at physical address * 0x0000.0000. * *******************************************************************************/ .section .isr_vector,"a",%progbits .type g_pfnVectors, %object .size g_pfnVectors, .-g_pfnVectors g_pfnVectors: .word _estack .word Reset_Handler .word NMI_Handler .word HardFault_Handler .word MemManage_Handler .word BusFault_Handler .word UsageFault_Handler .word 0 .word 0 .word 0 .word 0 .word SVC_Handler .word DebugMon_Handler .word 0 .word PendSV_Handler .word SysTick_Handler .word WWDG_IRQHandler .word PVD_IRQHandler .word TAMPER_IRQHandler .word RTC_IRQHandler .word FLASH_IRQHandler .word RCC_IRQHandler .word EXTI0_IRQHandler .word EXTI1_IRQHandler .word EXTI2_IRQHandler .word EXTI3_IRQHandler .word EXTI4_IRQHandler .word DMA1_Channel1_IRQHandler .word DMA1_Channel2_IRQHandler .word DMA1_Channel3_IRQHandler .word DMA1_Channel4_IRQHandler .word DMA1_Channel5_IRQHandler .word DMA1_Channel6_IRQHandler .word DMA1_Channel7_IRQHandler .word ADC1_2_IRQHandler .word CAN1_TX_IRQHandler .word CAN1_RX0_IRQHandler .word CAN1_RX1_IRQHandler .word CAN1_SCE_IRQHandler .word EXTI9_5_IRQHandler .word TIM1_BRK_IRQHandler .word TIM1_UP_IRQHandler .word TIM1_TRG_COM_IRQHandler .word TIM1_CC_IRQHandler .word TIM2_IRQHandler .word TIM3_IRQHandler .word TIM4_IRQHandler .word I2C1_EV_IRQHandler .word I2C1_ER_IRQHandler .word I2C2_EV_IRQHandler .word I2C2_ER_IRQHandler .word SPI1_IRQHandler .word SPI2_IRQHandler .word USART1_IRQHandler .word USART2_IRQHandler .word USART3_IRQHandler .word EXTI15_10_IRQHandler .word RTCAlarm_IRQHandler .word OTG_FS_WKUP_IRQHandler .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word TIM5_IRQHandler .word SPI3_IRQHandler .word UART4_IRQHandler .word UART5_IRQHandler .word TIM6_IRQHandler .word TIM7_IRQHandler .word DMA2_Channel1_IRQHandler .word DMA2_Channel2_IRQHandler .word DMA2_Channel3_IRQHandler .word DMA2_Channel4_IRQHandler .word DMA2_Channel5_IRQHandler .word ETH_IRQHandler .word ETH_WKUP_IRQHandler .word CAN2_TX_IRQHandler .word CAN2_RX0_IRQHandler .word CAN2_RX1_IRQHandler .word CAN2_SCE_IRQHandler .word OTG_FS_IRQHandler .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word BootRAM /* @0x1E0. This is for boot in RAM mode for STM32F10x Connectivity line Devices. */ /******************************************************************************* * * Provide weak aliases for each Exception handler to the Default_Handler. * As they are weak aliases, any function with the same name will override * this definition. * *******************************************************************************/ .weak NMI_Handler .thumb_set NMI_Handler,Default_Handler .weak HardFault_Handler .thumb_set HardFault_Handler,Default_Handler .weak MemManage_Handler .thumb_set MemManage_Handler,Default_Handler .weak BusFault_Handler .thumb_set BusFault_Handler,Default_Handler .weak UsageFault_Handler .thumb_set UsageFault_Handler,Default_Handler .weak SVC_Handler .thumb_set SVC_Handler,Default_Handler .weak DebugMon_Handler .thumb_set DebugMon_Handler,Default_Handler .weak PendSV_Handler .thumb_set PendSV_Handler,Default_Handler .weak SysTick_Handler .thumb_set SysTick_Handler,Default_Handler .weak WWDG_IRQHandler .thumb_set WWDG_IRQHandler,Default_Handler .weak PVD_IRQHandler .thumb_set PVD_IRQHandler,Default_Handler .weak TAMPER_IRQHandler .thumb_set TAMPER_IRQHandler,Default_Handler .weak RTC_IRQHandler .thumb_set RTC_IRQHandler,Default_Handler .weak FLASH_IRQHandler .thumb_set FLASH_IRQHandler,Default_Handler .weak RCC_IRQHandler .thumb_set RCC_IRQHandler,Default_Handler .weak EXTI0_IRQHandler .thumb_set EXTI0_IRQHandler,Default_Handler .weak EXTI1_IRQHandler .thumb_set EXTI1_IRQHandler,Default_Handler .weak EXTI2_IRQHandler .thumb_set EXTI2_IRQHandler,Default_Handler .weak EXTI3_IRQHandler .thumb_set EXTI3_IRQHandler,Default_Handler .weak EXTI4_IRQHandler .thumb_set EXTI4_IRQHandler,Default_Handler .weak DMA1_Channel1_IRQHandler .thumb_set DMA1_Channel1_IRQHandler,Default_Handler .weak DMA1_Channel2_IRQHandler .thumb_set DMA1_Channel2_IRQHandler,Default_Handler .weak DMA1_Channel3_IRQHandler .thumb_set DMA1_Channel3_IRQHandler,Default_Handler .weak DMA1_Channel4_IRQHandler .thumb_set DMA1_Channel4_IRQHandler,Default_Handler .weak DMA1_Channel5_IRQHandler .thumb_set DMA1_Channel5_IRQHandler,Default_Handler .weak DMA1_Channel6_IRQHandler .thumb_set DMA1_Channel6_IRQHandler,Default_Handler .weak DMA1_Channel7_IRQHandler .thumb_set DMA1_Channel7_IRQHandler,Default_Handler .weak ADC1_2_IRQHandler .thumb_set ADC1_2_IRQHandler,Default_Handler .weak CAN1_TX_IRQHandler .thumb_set CAN1_TX_IRQHandler,Default_Handler .weak CAN1_RX0_IRQHandler .thumb_set CAN1_RX0_IRQHandler,Default_Handler .weak CAN1_RX1_IRQHandler .thumb_set CAN1_RX1_IRQHandler,Default_Handler .weak CAN1_SCE_IRQHandler .thumb_set CAN1_SCE_IRQHandler,Default_Handler .weak EXTI9_5_IRQHandler .thumb_set EXTI9_5_IRQHandler,Default_Handler .weak TIM1_BRK_IRQHandler .thumb_set TIM1_BRK_IRQHandler,Default_Handler .weak TIM1_UP_IRQHandler .thumb_set TIM1_UP_IRQHandler,Default_Handler .weak TIM1_TRG_COM_IRQHandler .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler .weak TIM1_CC_IRQHandler .thumb_set TIM1_CC_IRQHandler,Default_Handler .weak TIM2_IRQHandler .thumb_set TIM2_IRQHandler,Default_Handler .weak TIM3_IRQHandler .thumb_set TIM3_IRQHandler,Default_Handler .weak TIM4_IRQHandler .thumb_set TIM4_IRQHandler,Default_Handler .weak I2C1_EV_IRQHandler .thumb_set I2C1_EV_IRQHandler,Default_Handler .weak I2C1_ER_IRQHandler .thumb_set I2C1_ER_IRQHandler,Default_Handler .weak I2C2_EV_IRQHandler .thumb_set I2C2_EV_IRQHandler,Default_Handler .weak I2C2_ER_IRQHandler .thumb_set I2C2_ER_IRQHandler,Default_Handler .weak SPI1_IRQHandler .thumb_set SPI1_IRQHandler,Default_Handler .weak SPI2_IRQHandler .thumb_set SPI2_IRQHandler,Default_Handler .weak USART1_IRQHandler .thumb_set USART1_IRQHandler,Default_Handler .weak USART2_IRQHandler .thumb_set USART2_IRQHandler,Default_Handler .weak USART3_IRQHandler .thumb_set USART3_IRQHandler,Default_Handler .weak EXTI15_10_IRQHandler .thumb_set EXTI15_10_IRQHandler,Default_Handler .weak RTCAlarm_IRQHandler .thumb_set RTCAlarm_IRQHandler,Default_Handler .weak OTG_FS_WKUP_IRQHandler .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler .weak TIM5_IRQHandler .thumb_set TIM5_IRQHandler,Default_Handler .weak SPI3_IRQHandler .thumb_set SPI3_IRQHandler,Default_Handler .weak UART4_IRQHandler .thumb_set UART4_IRQHandler,Default_Handler .weak UART5_IRQHandler .thumb_set UART5_IRQHandler,Default_Handler .weak TIM6_IRQHandler .thumb_set TIM6_IRQHandler,Default_Handler .weak TIM7_IRQHandler .thumb_set TIM7_IRQHandler,Default_Handler .weak DMA2_Channel1_IRQHandler .thumb_set DMA2_Channel1_IRQHandler,Default_Handler .weak DMA2_Channel2_IRQHandler .thumb_set DMA2_Channel2_IRQHandler,Default_Handler .weak DMA2_Channel3_IRQHandler .thumb_set DMA2_Channel3_IRQHandler,Default_Handler .weak DMA2_Channel4_IRQHandler .thumb_set DMA2_Channel4_IRQHandler,Default_Handler .weak DMA2_Channel5_IRQHandler .thumb_set DMA2_Channel5_IRQHandler,Default_Handler .weak ETH_IRQHandler .thumb_set ETH_IRQHandler,Default_Handler .weak ETH_WKUP_IRQHandler .thumb_set ETH_WKUP_IRQHandler,Default_Handler .weak CAN2_TX_IRQHandler .thumb_set CAN2_TX_IRQHandler,Default_Handler .weak CAN2_RX0_IRQHandler .thumb_set CAN2_RX0_IRQHandler,Default_Handler .weak CAN2_RX1_IRQHandler .thumb_set CAN2_RX1_IRQHandler,Default_Handler .weak CAN2_SCE_IRQHandler .thumb_set CAN2_SCE_IRQHandler,Default_Handler .weak OTG_FS_IRQHandler .thumb_set OTG_FS_IRQHandler ,Default_Handler /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
10-channel-pwm-controller-stm32
trunk/libraries/startup/gcc_ride7/startup_stm32f10x_cl.s
Unix Assembly
gpl3
13,072
/** ****************************************************************************** * @file startup_stm32f10x_ld_vl.s * @author MCD Application Team * @version V3.5.0 * @date 11-March-2011 * @brief STM32F10x Low Density Value Line Devices vector table for RIDE7 * toolchain. * This module performs: * - Set the initial SP * - Set the initial PC == Reset_Handler, * - Set the vector table entries with the exceptions ISR address * - Configure the clock system * - Branches to main in the C library (which eventually * calls main()). * After Reset the Cortex-M3 processor is in Thread mode, * priority is Privileged, and the Stack is set to Main. ****************************************************************************** * @attention * * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. * * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2> ****************************************************************************** */ .syntax unified .cpu cortex-m3 .fpu softvfp .thumb .global g_pfnVectors .global Default_Handler /* start address for the initialization values of the .data section. defined in linker script */ .word _sidata /* start address for the .data section. defined in linker script */ .word _sdata /* end address for the .data section. defined in linker script */ .word _edata /* start address for the .bss section. defined in linker script */ .word _sbss /* end address for the .bss section. defined in linker script */ .word _ebss .equ BootRAM, 0xF108F85F /** * @brief This is the code that gets called when the processor first * starts execution following a reset event. Only the absolutely * necessary set is performed, after which the application * supplied main() routine is called. * @param None * @retval None */ .section .text.Reset_Handler .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: /* Copy the data segment initializers from flash to SRAM */ movs r1, #0 b LoopCopyDataInit CopyDataInit: ldr r3, =_sidata ldr r3, [r3, r1] str r3, [r0, r1] adds r1, r1, #4 LoopCopyDataInit: ldr r0, =_sdata ldr r3, =_edata adds r2, r0, r1 cmp r2, r3 bcc CopyDataInit ldr r2, =_sbss b LoopFillZerobss /* Zero fill the bss segment. */ FillZerobss: movs r3, #0 str r3, [r2], #4 LoopFillZerobss: ldr r3, = _ebss cmp r2, r3 bcc FillZerobss /* Call the clock system intitialization function.*/ bl SystemInit /* Call the application's entry point.*/ bl main bx lr .size Reset_Handler, .-Reset_Handler /** * @brief This is the code that gets called when the processor receives an * unexpected interrupt. This simply enters an infinite loop, preserving * the system state for examination by a debugger. * @param None * @retval None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop .size Default_Handler, .-Default_Handler /****************************************************************************** * The minimal vector table for a Cortex M3. Note that the proper constructs * must be placed on this to ensure that it ends up at physical address * 0x0000.0000. * ******************************************************************************/ .section .isr_vector,"a",%progbits .type g_pfnVectors, %object .size g_pfnVectors, .-g_pfnVectors g_pfnVectors: .word _estack .word Reset_Handler .word NMI_Handler .word HardFault_Handler .word MemManage_Handler .word BusFault_Handler .word UsageFault_Handler .word 0 .word 0 .word 0 .word 0 .word SVC_Handler .word DebugMon_Handler .word 0 .word PendSV_Handler .word SysTick_Handler .word WWDG_IRQHandler .word PVD_IRQHandler .word TAMPER_IRQHandler .word RTC_IRQHandler .word FLASH_IRQHandler .word RCC_IRQHandler .word EXTI0_IRQHandler .word EXTI1_IRQHandler .word EXTI2_IRQHandler .word EXTI3_IRQHandler .word EXTI4_IRQHandler .word DMA1_Channel1_IRQHandler .word DMA1_Channel2_IRQHandler .word DMA1_Channel3_IRQHandler .word DMA1_Channel4_IRQHandler .word DMA1_Channel5_IRQHandler .word DMA1_Channel6_IRQHandler .word DMA1_Channel7_IRQHandler .word ADC1_IRQHandler .word 0 .word 0 .word 0 .word 0 .word EXTI9_5_IRQHandler .word TIM1_BRK_TIM15_IRQHandler .word TIM1_UP_TIM16_IRQHandler .word TIM1_TRG_COM_TIM17_IRQHandler .word TIM1_CC_IRQHandler .word TIM2_IRQHandler .word TIM3_IRQHandler .word 0 .word I2C1_EV_IRQHandler .word I2C1_ER_IRQHandler .word 0 .word 0 .word SPI1_IRQHandler .word 0 .word USART1_IRQHandler .word USART2_IRQHandler .word 0 .word EXTI15_10_IRQHandler .word RTCAlarm_IRQHandler .word CEC_IRQHandler .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word TIM6_DAC_IRQHandler .word TIM7_IRQHandler .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word BootRAM /* @0x01CC. This is for boot in RAM mode for STM32F10x Low Density Value Line devices. */ /******************************************************************************* * Provide weak aliases for each Exception handler to the Default_Handler. * As they are weak aliases, any function with the same name will override * this definition. *******************************************************************************/ .weak NMI_Handler .thumb_set NMI_Handler,Default_Handler .weak HardFault_Handler .thumb_set HardFault_Handler,Default_Handler .weak MemManage_Handler .thumb_set MemManage_Handler,Default_Handler .weak BusFault_Handler .thumb_set BusFault_Handler,Default_Handler .weak UsageFault_Handler .thumb_set UsageFault_Handler,Default_Handler .weak SVC_Handler .thumb_set SVC_Handler,Default_Handler .weak DebugMon_Handler .thumb_set DebugMon_Handler,Default_Handler .weak PendSV_Handler .thumb_set PendSV_Handler,Default_Handler .weak SysTick_Handler .thumb_set SysTick_Handler,Default_Handler .weak WWDG_IRQHandler .thumb_set WWDG_IRQHandler,Default_Handler .weak PVD_IRQHandler .thumb_set PVD_IRQHandler,Default_Handler .weak TAMPER_IRQHandler .thumb_set TAMPER_IRQHandler,Default_Handler .weak RTC_IRQHandler .thumb_set RTC_IRQHandler,Default_Handler .weak FLASH_IRQHandler .thumb_set FLASH_IRQHandler,Default_Handler .weak RCC_IRQHandler .thumb_set RCC_IRQHandler,Default_Handler .weak EXTI0_IRQHandler .thumb_set EXTI0_IRQHandler,Default_Handler .weak EXTI1_IRQHandler .thumb_set EXTI1_IRQHandler,Default_Handler .weak EXTI2_IRQHandler .thumb_set EXTI2_IRQHandler,Default_Handler .weak EXTI3_IRQHandler .thumb_set EXTI3_IRQHandler,Default_Handler .weak EXTI4_IRQHandler .thumb_set EXTI4_IRQHandler,Default_Handler .weak DMA1_Channel1_IRQHandler .thumb_set DMA1_Channel1_IRQHandler,Default_Handler .weak DMA1_Channel2_IRQHandler .thumb_set DMA1_Channel2_IRQHandler,Default_Handler .weak DMA1_Channel3_IRQHandler .thumb_set DMA1_Channel3_IRQHandler,Default_Handler .weak DMA1_Channel4_IRQHandler .thumb_set DMA1_Channel4_IRQHandler,Default_Handler .weak DMA1_Channel5_IRQHandler .thumb_set DMA1_Channel5_IRQHandler,Default_Handler .weak DMA1_Channel6_IRQHandler .thumb_set DMA1_Channel6_IRQHandler,Default_Handler .weak DMA1_Channel7_IRQHandler .thumb_set DMA1_Channel7_IRQHandler,Default_Handler .weak ADC1_IRQHandler .thumb_set ADC1_IRQHandler,Default_Handler .weak EXTI9_5_IRQHandler .thumb_set EXTI9_5_IRQHandler,Default_Handler .weak TIM1_BRK_TIM15_IRQHandler .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler .weak TIM1_UP_TIM16_IRQHandler .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler .weak TIM1_TRG_COM_TIM17_IRQHandler .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler .weak TIM1_CC_IRQHandler .thumb_set TIM1_CC_IRQHandler,Default_Handler .weak TIM2_IRQHandler .thumb_set TIM2_IRQHandler,Default_Handler .weak TIM3_IRQHandler .thumb_set TIM3_IRQHandler,Default_Handler .weak I2C1_EV_IRQHandler .thumb_set I2C1_EV_IRQHandler,Default_Handler .weak I2C1_ER_IRQHandler .thumb_set I2C1_ER_IRQHandler,Default_Handler .weak SPI1_IRQHandler .thumb_set SPI1_IRQHandler,Default_Handler .weak USART1_IRQHandler .thumb_set USART1_IRQHandler,Default_Handler .weak USART2_IRQHandler .thumb_set USART2_IRQHandler,Default_Handler .weak EXTI15_10_IRQHandler .thumb_set EXTI15_10_IRQHandler,Default_Handler .weak RTCAlarm_IRQHandler .thumb_set RTCAlarm_IRQHandler,Default_Handler .weak CEC_IRQHandler .thumb_set CEC_IRQHandler,Default_Handler .weak TIM6_DAC_IRQHandler .thumb_set TIM6_DAC_IRQHandler,Default_Handler .weak TIM7_IRQHandler .thumb_set TIM7_IRQHandler,Default_Handler /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
10-channel-pwm-controller-stm32
trunk/libraries/startup/gcc_ride7/startup_stm32f10x_ld_vl.s
Unix Assembly
gpl3
10,562
/** ****************************************************************************** * @file startup_stm32f10x_md_vl.s * @author MCD Application Team * @version V3.5.0 * @date 11-March-2011 * @brief STM32F10x Medium Density Value Line Devices vector table for RIDE7 * toolchain. * This module performs: * - Set the initial SP * - Set the initial PC == Reset_Handler, * - Set the vector table entries with the exceptions ISR address * - Configure the clock system * - Branches to main in the C library (which eventually * calls main()). * After Reset the Cortex-M3 processor is in Thread mode, * priority is Privileged, and the Stack is set to Main. ****************************************************************************** * @attention * * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. * * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2> ****************************************************************************** */ .syntax unified .cpu cortex-m3 .fpu softvfp .thumb .global g_pfnVectors .global Default_Handler /* start address for the initialization values of the .data section. defined in linker script */ .word _sidata /* start address for the .data section. defined in linker script */ .word _sdata /* end address for the .data section. defined in linker script */ .word _edata /* start address for the .bss section. defined in linker script */ .word _sbss /* end address for the .bss section. defined in linker script */ .word _ebss .equ BootRAM, 0xF108F85F /** * @brief This is the code that gets called when the processor first * starts execution following a reset event. Only the absolutely * necessary set is performed, after which the application * supplied main() routine is called. * @param None * @retval None */ .section .text.Reset_Handler .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: /* Copy the data segment initializers from flash to SRAM */ movs r1, #0 b LoopCopyDataInit CopyDataInit: ldr r3, =_sidata ldr r3, [r3, r1] str r3, [r0, r1] adds r1, r1, #4 LoopCopyDataInit: ldr r0, =_sdata ldr r3, =_edata adds r2, r0, r1 cmp r2, r3 bcc CopyDataInit ldr r2, =_sbss b LoopFillZerobss /* Zero fill the bss segment. */ FillZerobss: movs r3, #0 str r3, [r2], #4 LoopFillZerobss: ldr r3, = _ebss cmp r2, r3 bcc FillZerobss /* Call the clock system intitialization function.*/ bl SystemInit /* Call the application's entry point.*/ bl main bx lr .size Reset_Handler, .-Reset_Handler /** * @brief This is the code that gets called when the processor receives an * unexpected interrupt. This simply enters an infinite loop, preserving * the system state for examination by a debugger. * @param None * @retval None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop .size Default_Handler, .-Default_Handler /****************************************************************************** * * The minimal vector table for a Cortex M3. Note that the proper constructs * must be placed on this to ensure that it ends up at physical address * 0x0000.0000. * ******************************************************************************/ .section .isr_vector,"a",%progbits .type g_pfnVectors, %object .size g_pfnVectors, .-g_pfnVectors g_pfnVectors: .word _estack .word Reset_Handler .word NMI_Handler .word HardFault_Handler .word MemManage_Handler .word BusFault_Handler .word UsageFault_Handler .word 0 .word 0 .word 0 .word 0 .word SVC_Handler .word DebugMon_Handler .word 0 .word PendSV_Handler .word SysTick_Handler .word WWDG_IRQHandler .word PVD_IRQHandler .word TAMPER_IRQHandler .word RTC_IRQHandler .word FLASH_IRQHandler .word RCC_IRQHandler .word EXTI0_IRQHandler .word EXTI1_IRQHandler .word EXTI2_IRQHandler .word EXTI3_IRQHandler .word EXTI4_IRQHandler .word DMA1_Channel1_IRQHandler .word DMA1_Channel2_IRQHandler .word DMA1_Channel3_IRQHandler .word DMA1_Channel4_IRQHandler .word DMA1_Channel5_IRQHandler .word DMA1_Channel6_IRQHandler .word DMA1_Channel7_IRQHandler .word ADC1_IRQHandler .word 0 .word 0 .word 0 .word 0 .word EXTI9_5_IRQHandler .word TIM1_BRK_TIM15_IRQHandler .word TIM1_UP_TIM16_IRQHandler .word TIM1_TRG_COM_TIM17_IRQHandler .word TIM1_CC_IRQHandler .word TIM2_IRQHandler .word TIM3_IRQHandler .word TIM4_IRQHandler .word I2C1_EV_IRQHandler .word I2C1_ER_IRQHandler .word I2C2_EV_IRQHandler .word I2C2_ER_IRQHandler .word SPI1_IRQHandler .word SPI2_IRQHandler .word USART1_IRQHandler .word USART2_IRQHandler .word USART3_IRQHandler .word EXTI15_10_IRQHandler .word RTCAlarm_IRQHandler .word CEC_IRQHandler .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word TIM6_DAC_IRQHandler .word TIM7_IRQHandler .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word BootRAM /* @0x01CC. This is for boot in RAM mode for STM32F10x Medium Value Line Density devices. */ /******************************************************************************* * Provide weak aliases for each Exception handler to the Default_Handler. * As they are weak aliases, any function with the same name will override * this definition. *******************************************************************************/ .weak NMI_Handler .thumb_set NMI_Handler,Default_Handler .weak HardFault_Handler .thumb_set HardFault_Handler,Default_Handler .weak MemManage_Handler .thumb_set MemManage_Handler,Default_Handler .weak BusFault_Handler .thumb_set BusFault_Handler,Default_Handler .weak UsageFault_Handler .thumb_set UsageFault_Handler,Default_Handler .weak SVC_Handler .thumb_set SVC_Handler,Default_Handler .weak DebugMon_Handler .thumb_set DebugMon_Handler,Default_Handler .weak PendSV_Handler .thumb_set PendSV_Handler,Default_Handler .weak SysTick_Handler .thumb_set SysTick_Handler,Default_Handler .weak WWDG_IRQHandler .thumb_set WWDG_IRQHandler,Default_Handler .weak PVD_IRQHandler .thumb_set PVD_IRQHandler,Default_Handler .weak TAMPER_IRQHandler .thumb_set TAMPER_IRQHandler,Default_Handler .weak RTC_IRQHandler .thumb_set RTC_IRQHandler,Default_Handler .weak FLASH_IRQHandler .thumb_set FLASH_IRQHandler,Default_Handler .weak RCC_IRQHandler .thumb_set RCC_IRQHandler,Default_Handler .weak EXTI0_IRQHandler .thumb_set EXTI0_IRQHandler,Default_Handler .weak EXTI1_IRQHandler .thumb_set EXTI1_IRQHandler,Default_Handler .weak EXTI2_IRQHandler .thumb_set EXTI2_IRQHandler,Default_Handler .weak EXTI3_IRQHandler .thumb_set EXTI3_IRQHandler,Default_Handler .weak EXTI4_IRQHandler .thumb_set EXTI4_IRQHandler,Default_Handler .weak DMA1_Channel1_IRQHandler .thumb_set DMA1_Channel1_IRQHandler,Default_Handler .weak DMA1_Channel2_IRQHandler .thumb_set DMA1_Channel2_IRQHandler,Default_Handler .weak DMA1_Channel3_IRQHandler .thumb_set DMA1_Channel3_IRQHandler,Default_Handler .weak DMA1_Channel4_IRQHandler .thumb_set DMA1_Channel4_IRQHandler,Default_Handler .weak DMA1_Channel5_IRQHandler .thumb_set DMA1_Channel5_IRQHandler,Default_Handler .weak DMA1_Channel6_IRQHandler .thumb_set DMA1_Channel6_IRQHandler,Default_Handler .weak DMA1_Channel7_IRQHandler .thumb_set DMA1_Channel7_IRQHandler,Default_Handler .weak ADC1_IRQHandler .thumb_set ADC1_IRQHandler,Default_Handler .weak EXTI9_5_IRQHandler .thumb_set EXTI9_5_IRQHandler,Default_Handler .weak TIM1_BRK_TIM15_IRQHandler .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler .weak TIM1_UP_TIM16_IRQHandler .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler .weak TIM1_TRG_COM_TIM17_IRQHandler .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler .weak TIM1_CC_IRQHandler .thumb_set TIM1_CC_IRQHandler,Default_Handler .weak TIM2_IRQHandler .thumb_set TIM2_IRQHandler,Default_Handler .weak TIM3_IRQHandler .thumb_set TIM3_IRQHandler,Default_Handler .weak TIM4_IRQHandler .thumb_set TIM4_IRQHandler,Default_Handler .weak I2C1_EV_IRQHandler .thumb_set I2C1_EV_IRQHandler,Default_Handler .weak I2C1_ER_IRQHandler .thumb_set I2C1_ER_IRQHandler,Default_Handler .weak I2C2_EV_IRQHandler .thumb_set I2C2_EV_IRQHandler,Default_Handler .weak I2C2_ER_IRQHandler .thumb_set I2C2_ER_IRQHandler,Default_Handler .weak SPI1_IRQHandler .thumb_set SPI1_IRQHandler,Default_Handler .weak SPI2_IRQHandler .thumb_set SPI2_IRQHandler,Default_Handler .weak USART1_IRQHandler .thumb_set USART1_IRQHandler,Default_Handler .weak USART2_IRQHandler .thumb_set USART2_IRQHandler,Default_Handler .weak USART3_IRQHandler .thumb_set USART3_IRQHandler,Default_Handler .weak EXTI15_10_IRQHandler .thumb_set EXTI15_10_IRQHandler,Default_Handler .weak RTCAlarm_IRQHandler .thumb_set RTCAlarm_IRQHandler,Default_Handler .weak CEC_IRQHandler .thumb_set CEC_IRQHandler,Default_Handler .weak TIM6_DAC_IRQHandler .thumb_set TIM6_DAC_IRQHandler,Default_Handler .weak TIM7_IRQHandler .thumb_set TIM7_IRQHandler,Default_Handler /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
10-channel-pwm-controller-stm32
trunk/libraries/startup/gcc_ride7/startup_stm32f10x_md_vl.s
Unix Assembly
gpl3
11,058
;******************** (C) COPYRIGHT 2011 STMicroelectronics ******************** ;* File Name : startup_stm32f10x_md.s ;* Author : MCD Application Team ;* Version : V3.5.0 ;* Date : 11-March-2011 ;* Description : STM32F10x Medium Density Devices vector table for MDK-ARM ;* toolchain. ;* This module performs: ;* - Set the initial SP ;* - Set the initial PC == Reset_Handler ;* - Set the vector table entries with the exceptions ISR address ;* - Configure the clock system ;* - Branches to __main in the C library (which eventually ;* calls main()). ;* After Reset the CortexM3 processor is in Thread mode, ;* priority is Privileged, and the Stack is set to Main. ;* <<< Use Configuration Wizard in Context Menu >>> ;******************************************************************************* ; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS ; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. ; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, ; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE ; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING ; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. ;******************************************************************************* ; Amount of memory (in bytes) allocated for Stack ; Tailor this value to your application needs ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000200 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD WWDG_IRQHandler ; Window Watchdog DCD PVD_IRQHandler ; PVD through EXTI Line detect DCD TAMPER_IRQHandler ; Tamper DCD RTC_IRQHandler ; RTC DCD FLASH_IRQHandler ; Flash DCD RCC_IRQHandler ; RCC DCD EXTI0_IRQHandler ; EXTI Line 0 DCD EXTI1_IRQHandler ; EXTI Line 1 DCD EXTI2_IRQHandler ; EXTI Line 2 DCD EXTI3_IRQHandler ; EXTI Line 3 DCD EXTI4_IRQHandler ; EXTI Line 4 DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 DCD ADC1_2_IRQHandler ; ADC1_2 DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0 DCD CAN1_RX1_IRQHandler ; CAN1 RX1 DCD CAN1_SCE_IRQHandler ; CAN1 SCE DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 DCD TIM1_BRK_IRQHandler ; TIM1 Break DCD TIM1_UP_IRQHandler ; TIM1 Update DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare DCD TIM2_IRQHandler ; TIM2 DCD TIM3_IRQHandler ; TIM3 DCD TIM4_IRQHandler ; TIM4 DCD I2C1_EV_IRQHandler ; I2C1 Event DCD I2C1_ER_IRQHandler ; I2C1 Error DCD I2C2_EV_IRQHandler ; I2C2 Event DCD I2C2_ER_IRQHandler ; I2C2 Error DCD SPI1_IRQHandler ; SPI1 DCD SPI2_IRQHandler ; SPI2 DCD USART1_IRQHandler ; USART1 DCD USART2_IRQHandler ; USART2 DCD USART3_IRQHandler ; USART3 DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA |.text|, CODE, READONLY ; Reset handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT __main IMPORT SystemInit LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP MemManage_Handler\ PROC EXPORT MemManage_Handler [WEAK] B . ENDP BusFault_Handler\ PROC EXPORT BusFault_Handler [WEAK] B . ENDP UsageFault_Handler\ PROC EXPORT UsageFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP DebugMon_Handler\ PROC EXPORT DebugMon_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT WWDG_IRQHandler [WEAK] EXPORT PVD_IRQHandler [WEAK] EXPORT TAMPER_IRQHandler [WEAK] EXPORT RTC_IRQHandler [WEAK] EXPORT FLASH_IRQHandler [WEAK] EXPORT RCC_IRQHandler [WEAK] EXPORT EXTI0_IRQHandler [WEAK] EXPORT EXTI1_IRQHandler [WEAK] EXPORT EXTI2_IRQHandler [WEAK] EXPORT EXTI3_IRQHandler [WEAK] EXPORT EXTI4_IRQHandler [WEAK] EXPORT DMA1_Channel1_IRQHandler [WEAK] EXPORT DMA1_Channel2_IRQHandler [WEAK] EXPORT DMA1_Channel3_IRQHandler [WEAK] EXPORT DMA1_Channel4_IRQHandler [WEAK] EXPORT DMA1_Channel5_IRQHandler [WEAK] EXPORT DMA1_Channel6_IRQHandler [WEAK] EXPORT DMA1_Channel7_IRQHandler [WEAK] EXPORT ADC1_2_IRQHandler [WEAK] EXPORT USB_HP_CAN1_TX_IRQHandler [WEAK] EXPORT USB_LP_CAN1_RX0_IRQHandler [WEAK] EXPORT CAN1_RX1_IRQHandler [WEAK] EXPORT CAN1_SCE_IRQHandler [WEAK] EXPORT EXTI9_5_IRQHandler [WEAK] EXPORT TIM1_BRK_IRQHandler [WEAK] EXPORT TIM1_UP_IRQHandler [WEAK] EXPORT TIM1_TRG_COM_IRQHandler [WEAK] EXPORT TIM1_CC_IRQHandler [WEAK] EXPORT TIM2_IRQHandler [WEAK] EXPORT TIM3_IRQHandler [WEAK] EXPORT TIM4_IRQHandler [WEAK] EXPORT I2C1_EV_IRQHandler [WEAK] EXPORT I2C1_ER_IRQHandler [WEAK] EXPORT I2C2_EV_IRQHandler [WEAK] EXPORT I2C2_ER_IRQHandler [WEAK] EXPORT SPI1_IRQHandler [WEAK] EXPORT SPI2_IRQHandler [WEAK] EXPORT USART1_IRQHandler [WEAK] EXPORT USART2_IRQHandler [WEAK] EXPORT USART3_IRQHandler [WEAK] EXPORT EXTI15_10_IRQHandler [WEAK] EXPORT RTCAlarm_IRQHandler [WEAK] EXPORT USBWakeUp_IRQHandler [WEAK] WWDG_IRQHandler PVD_IRQHandler TAMPER_IRQHandler RTC_IRQHandler FLASH_IRQHandler RCC_IRQHandler EXTI0_IRQHandler EXTI1_IRQHandler EXTI2_IRQHandler EXTI3_IRQHandler EXTI4_IRQHandler DMA1_Channel1_IRQHandler DMA1_Channel2_IRQHandler DMA1_Channel3_IRQHandler DMA1_Channel4_IRQHandler DMA1_Channel5_IRQHandler DMA1_Channel6_IRQHandler DMA1_Channel7_IRQHandler ADC1_2_IRQHandler USB_HP_CAN1_TX_IRQHandler USB_LP_CAN1_RX0_IRQHandler CAN1_RX1_IRQHandler CAN1_SCE_IRQHandler EXTI9_5_IRQHandler TIM1_BRK_IRQHandler TIM1_UP_IRQHandler TIM1_TRG_COM_IRQHandler TIM1_CC_IRQHandler TIM2_IRQHandler TIM3_IRQHandler TIM4_IRQHandler I2C1_EV_IRQHandler I2C1_ER_IRQHandler I2C2_EV_IRQHandler I2C2_ER_IRQHandler SPI1_IRQHandler SPI2_IRQHandler USART1_IRQHandler USART2_IRQHandler USART3_IRQHandler EXTI15_10_IRQHandler RTCAlarm_IRQHandler USBWakeUp_IRQHandler B . ENDP ALIGN ;******************************************************************************* ; User Stack and Heap initialization ;******************************************************************************* IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END ;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE*****
10-channel-pwm-controller-stm32
trunk/libraries/startup/arm/startup_stm32f10x_md.s
Unix Assembly
gpl3
12,765
;******************** (C) COPYRIGHT 2011 STMicroelectronics ******************** ;* File Name : startup_stm32f10x_xl.s ;* Author : MCD Application Team ;* Version : V3.5.0 ;* Date : 11-March-2011 ;* Description : STM32F10x XL-Density Devices vector table for MDK-ARM ;* toolchain. ;* This module performs: ;* - Set the initial SP ;* - Set the initial PC == Reset_Handler ;* - Set the vector table entries with the exceptions ISR address ;* - Configure the clock system and also configure the external ;* SRAM mounted on STM3210E-EVAL board to be used as data ;* memory (optional, to be enabled by user) ;* - Branches to __main in the C library (which eventually ;* calls main()). ;* After Reset the CortexM3 processor is in Thread mode, ;* priority is Privileged, and the Stack is set to Main. ;* <<< Use Configuration Wizard in Context Menu >>> ;******************************************************************************* ; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS ; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. ; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, ; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE ; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING ; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. ;******************************************************************************* ; Amount of memory (in bytes) allocated for Stack ; Tailor this value to your application needs ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000200 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD WWDG_IRQHandler ; Window Watchdog DCD PVD_IRQHandler ; PVD through EXTI Line detect DCD TAMPER_IRQHandler ; Tamper DCD RTC_IRQHandler ; RTC DCD FLASH_IRQHandler ; Flash DCD RCC_IRQHandler ; RCC DCD EXTI0_IRQHandler ; EXTI Line 0 DCD EXTI1_IRQHandler ; EXTI Line 1 DCD EXTI2_IRQHandler ; EXTI Line 2 DCD EXTI3_IRQHandler ; EXTI Line 3 DCD EXTI4_IRQHandler ; EXTI Line 4 DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 DCD ADC1_2_IRQHandler ; ADC1 & ADC2 DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0 DCD CAN1_RX1_IRQHandler ; CAN1 RX1 DCD CAN1_SCE_IRQHandler ; CAN1 SCE DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 DCD TIM1_BRK_TIM9_IRQHandler ; TIM1 Break and TIM9 DCD TIM1_UP_TIM10_IRQHandler ; TIM1 Update and TIM10 DCD TIM1_TRG_COM_TIM11_IRQHandler ; TIM1 Trigger and Commutation and TIM11 DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare DCD TIM2_IRQHandler ; TIM2 DCD TIM3_IRQHandler ; TIM3 DCD TIM4_IRQHandler ; TIM4 DCD I2C1_EV_IRQHandler ; I2C1 Event DCD I2C1_ER_IRQHandler ; I2C1 Error DCD I2C2_EV_IRQHandler ; I2C2 Event DCD I2C2_ER_IRQHandler ; I2C2 Error DCD SPI1_IRQHandler ; SPI1 DCD SPI2_IRQHandler ; SPI2 DCD USART1_IRQHandler ; USART1 DCD USART2_IRQHandler ; USART2 DCD USART3_IRQHandler ; USART3 DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend DCD TIM8_BRK_TIM12_IRQHandler ; TIM8 Break and TIM12 DCD TIM8_UP_TIM13_IRQHandler ; TIM8 Update and TIM13 DCD TIM8_TRG_COM_TIM14_IRQHandler ; TIM8 Trigger and Commutation and TIM14 DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare DCD ADC3_IRQHandler ; ADC3 DCD FSMC_IRQHandler ; FSMC DCD SDIO_IRQHandler ; SDIO DCD TIM5_IRQHandler ; TIM5 DCD SPI3_IRQHandler ; SPI3 DCD UART4_IRQHandler ; UART4 DCD UART5_IRQHandler ; UART5 DCD TIM6_IRQHandler ; TIM6 DCD TIM7_IRQHandler ; TIM7 DCD DMA2_Channel1_IRQHandler ; DMA2 Channel1 DCD DMA2_Channel2_IRQHandler ; DMA2 Channel2 DCD DMA2_Channel3_IRQHandler ; DMA2 Channel3 DCD DMA2_Channel4_5_IRQHandler ; DMA2 Channel4 & Channel5 __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA |.text|, CODE, READONLY ; Reset handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT __main IMPORT SystemInit LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP MemManage_Handler\ PROC EXPORT MemManage_Handler [WEAK] B . ENDP BusFault_Handler\ PROC EXPORT BusFault_Handler [WEAK] B . ENDP UsageFault_Handler\ PROC EXPORT UsageFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP DebugMon_Handler\ PROC EXPORT DebugMon_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT WWDG_IRQHandler [WEAK] EXPORT PVD_IRQHandler [WEAK] EXPORT TAMPER_IRQHandler [WEAK] EXPORT RTC_IRQHandler [WEAK] EXPORT FLASH_IRQHandler [WEAK] EXPORT RCC_IRQHandler [WEAK] EXPORT EXTI0_IRQHandler [WEAK] EXPORT EXTI1_IRQHandler [WEAK] EXPORT EXTI2_IRQHandler [WEAK] EXPORT EXTI3_IRQHandler [WEAK] EXPORT EXTI4_IRQHandler [WEAK] EXPORT DMA1_Channel1_IRQHandler [WEAK] EXPORT DMA1_Channel2_IRQHandler [WEAK] EXPORT DMA1_Channel3_IRQHandler [WEAK] EXPORT DMA1_Channel4_IRQHandler [WEAK] EXPORT DMA1_Channel5_IRQHandler [WEAK] EXPORT DMA1_Channel6_IRQHandler [WEAK] EXPORT DMA1_Channel7_IRQHandler [WEAK] EXPORT ADC1_2_IRQHandler [WEAK] EXPORT USB_HP_CAN1_TX_IRQHandler [WEAK] EXPORT USB_LP_CAN1_RX0_IRQHandler [WEAK] EXPORT CAN1_RX1_IRQHandler [WEAK] EXPORT CAN1_SCE_IRQHandler [WEAK] EXPORT EXTI9_5_IRQHandler [WEAK] EXPORT TIM1_BRK_TIM9_IRQHandler [WEAK] EXPORT TIM1_UP_TIM10_IRQHandler [WEAK] EXPORT TIM1_TRG_COM_TIM11_IRQHandler [WEAK] EXPORT TIM1_CC_IRQHandler [WEAK] EXPORT TIM2_IRQHandler [WEAK] EXPORT TIM3_IRQHandler [WEAK] EXPORT TIM4_IRQHandler [WEAK] EXPORT I2C1_EV_IRQHandler [WEAK] EXPORT I2C1_ER_IRQHandler [WEAK] EXPORT I2C2_EV_IRQHandler [WEAK] EXPORT I2C2_ER_IRQHandler [WEAK] EXPORT SPI1_IRQHandler [WEAK] EXPORT SPI2_IRQHandler [WEAK] EXPORT USART1_IRQHandler [WEAK] EXPORT USART2_IRQHandler [WEAK] EXPORT USART3_IRQHandler [WEAK] EXPORT EXTI15_10_IRQHandler [WEAK] EXPORT RTCAlarm_IRQHandler [WEAK] EXPORT USBWakeUp_IRQHandler [WEAK] EXPORT TIM8_BRK_TIM12_IRQHandler [WEAK] EXPORT TIM8_UP_TIM13_IRQHandler [WEAK] EXPORT TIM8_TRG_COM_TIM14_IRQHandler [WEAK] EXPORT TIM8_CC_IRQHandler [WEAK] EXPORT ADC3_IRQHandler [WEAK] EXPORT FSMC_IRQHandler [WEAK] EXPORT SDIO_IRQHandler [WEAK] EXPORT TIM5_IRQHandler [WEAK] EXPORT SPI3_IRQHandler [WEAK] EXPORT UART4_IRQHandler [WEAK] EXPORT UART5_IRQHandler [WEAK] EXPORT TIM6_IRQHandler [WEAK] EXPORT TIM7_IRQHandler [WEAK] EXPORT DMA2_Channel1_IRQHandler [WEAK] EXPORT DMA2_Channel2_IRQHandler [WEAK] EXPORT DMA2_Channel3_IRQHandler [WEAK] EXPORT DMA2_Channel4_5_IRQHandler [WEAK] WWDG_IRQHandler PVD_IRQHandler TAMPER_IRQHandler RTC_IRQHandler FLASH_IRQHandler RCC_IRQHandler EXTI0_IRQHandler EXTI1_IRQHandler EXTI2_IRQHandler EXTI3_IRQHandler EXTI4_IRQHandler DMA1_Channel1_IRQHandler DMA1_Channel2_IRQHandler DMA1_Channel3_IRQHandler DMA1_Channel4_IRQHandler DMA1_Channel5_IRQHandler DMA1_Channel6_IRQHandler DMA1_Channel7_IRQHandler ADC1_2_IRQHandler USB_HP_CAN1_TX_IRQHandler USB_LP_CAN1_RX0_IRQHandler CAN1_RX1_IRQHandler CAN1_SCE_IRQHandler EXTI9_5_IRQHandler TIM1_BRK_TIM9_IRQHandler TIM1_UP_TIM10_IRQHandler TIM1_TRG_COM_TIM11_IRQHandler TIM1_CC_IRQHandler TIM2_IRQHandler TIM3_IRQHandler TIM4_IRQHandler I2C1_EV_IRQHandler I2C1_ER_IRQHandler I2C2_EV_IRQHandler I2C2_ER_IRQHandler SPI1_IRQHandler SPI2_IRQHandler USART1_IRQHandler USART2_IRQHandler USART3_IRQHandler EXTI15_10_IRQHandler RTCAlarm_IRQHandler USBWakeUp_IRQHandler TIM8_BRK_TIM12_IRQHandler TIM8_UP_TIM13_IRQHandler TIM8_TRG_COM_TIM14_IRQHandler TIM8_CC_IRQHandler ADC3_IRQHandler FSMC_IRQHandler SDIO_IRQHandler TIM5_IRQHandler SPI3_IRQHandler UART4_IRQHandler UART5_IRQHandler TIM6_IRQHandler TIM7_IRQHandler DMA2_Channel1_IRQHandler DMA2_Channel2_IRQHandler DMA2_Channel3_IRQHandler DMA2_Channel4_5_IRQHandler B . ENDP ALIGN ;******************************************************************************* ; User Stack and Heap initialization ;******************************************************************************* IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END ;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE*****
10-channel-pwm-controller-stm32
trunk/libraries/startup/arm/startup_stm32f10x_xl.s
Unix Assembly
gpl3
15,955
;******************** (C) COPYRIGHT 2011 STMicroelectronics ******************** ;* File Name : startup_stm32f10x_hd.s ;* Author : MCD Application Team ;* Version : V3.5.0 ;* Date : 11-March-2011 ;* Description : STM32F10x High Density Devices vector table for MDK-ARM ;* toolchain. ;* This module performs: ;* - Set the initial SP ;* - Set the initial PC == Reset_Handler ;* - Set the vector table entries with the exceptions ISR address ;* - Configure the clock system and also configure the external ;* SRAM mounted on STM3210E-EVAL board to be used as data ;* memory (optional, to be enabled by user) ;* - Branches to __main in the C library (which eventually ;* calls main()). ;* After Reset the CortexM3 processor is in Thread mode, ;* priority is Privileged, and the Stack is set to Main. ;* <<< Use Configuration Wizard in Context Menu >>> ;******************************************************************************* ; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS ; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. ; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, ; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE ; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING ; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. ;******************************************************************************* ; Amount of memory (in bytes) allocated for Stack ; Tailor this value to your application needs ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000200 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD WWDG_IRQHandler ; Window Watchdog DCD PVD_IRQHandler ; PVD through EXTI Line detect DCD TAMPER_IRQHandler ; Tamper DCD RTC_IRQHandler ; RTC DCD FLASH_IRQHandler ; Flash DCD RCC_IRQHandler ; RCC DCD EXTI0_IRQHandler ; EXTI Line 0 DCD EXTI1_IRQHandler ; EXTI Line 1 DCD EXTI2_IRQHandler ; EXTI Line 2 DCD EXTI3_IRQHandler ; EXTI Line 3 DCD EXTI4_IRQHandler ; EXTI Line 4 DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 DCD ADC1_2_IRQHandler ; ADC1 & ADC2 DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0 DCD CAN1_RX1_IRQHandler ; CAN1 RX1 DCD CAN1_SCE_IRQHandler ; CAN1 SCE DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 DCD TIM1_BRK_IRQHandler ; TIM1 Break DCD TIM1_UP_IRQHandler ; TIM1 Update DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare DCD TIM2_IRQHandler ; TIM2 DCD TIM3_IRQHandler ; TIM3 DCD TIM4_IRQHandler ; TIM4 DCD I2C1_EV_IRQHandler ; I2C1 Event DCD I2C1_ER_IRQHandler ; I2C1 Error DCD I2C2_EV_IRQHandler ; I2C2 Event DCD I2C2_ER_IRQHandler ; I2C2 Error DCD SPI1_IRQHandler ; SPI1 DCD SPI2_IRQHandler ; SPI2 DCD USART1_IRQHandler ; USART1 DCD USART2_IRQHandler ; USART2 DCD USART3_IRQHandler ; USART3 DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend DCD TIM8_BRK_IRQHandler ; TIM8 Break DCD TIM8_UP_IRQHandler ; TIM8 Update DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger and Commutation DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare DCD ADC3_IRQHandler ; ADC3 DCD FSMC_IRQHandler ; FSMC DCD SDIO_IRQHandler ; SDIO DCD TIM5_IRQHandler ; TIM5 DCD SPI3_IRQHandler ; SPI3 DCD UART4_IRQHandler ; UART4 DCD UART5_IRQHandler ; UART5 DCD TIM6_IRQHandler ; TIM6 DCD TIM7_IRQHandler ; TIM7 DCD DMA2_Channel1_IRQHandler ; DMA2 Channel1 DCD DMA2_Channel2_IRQHandler ; DMA2 Channel2 DCD DMA2_Channel3_IRQHandler ; DMA2 Channel3 DCD DMA2_Channel4_5_IRQHandler ; DMA2 Channel4 & Channel5 __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA |.text|, CODE, READONLY ; Reset handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT __main IMPORT SystemInit LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP MemManage_Handler\ PROC EXPORT MemManage_Handler [WEAK] B . ENDP BusFault_Handler\ PROC EXPORT BusFault_Handler [WEAK] B . ENDP UsageFault_Handler\ PROC EXPORT UsageFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP DebugMon_Handler\ PROC EXPORT DebugMon_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT WWDG_IRQHandler [WEAK] EXPORT PVD_IRQHandler [WEAK] EXPORT TAMPER_IRQHandler [WEAK] EXPORT RTC_IRQHandler [WEAK] EXPORT FLASH_IRQHandler [WEAK] EXPORT RCC_IRQHandler [WEAK] EXPORT EXTI0_IRQHandler [WEAK] EXPORT EXTI1_IRQHandler [WEAK] EXPORT EXTI2_IRQHandler [WEAK] EXPORT EXTI3_IRQHandler [WEAK] EXPORT EXTI4_IRQHandler [WEAK] EXPORT DMA1_Channel1_IRQHandler [WEAK] EXPORT DMA1_Channel2_IRQHandler [WEAK] EXPORT DMA1_Channel3_IRQHandler [WEAK] EXPORT DMA1_Channel4_IRQHandler [WEAK] EXPORT DMA1_Channel5_IRQHandler [WEAK] EXPORT DMA1_Channel6_IRQHandler [WEAK] EXPORT DMA1_Channel7_IRQHandler [WEAK] EXPORT ADC1_2_IRQHandler [WEAK] EXPORT USB_HP_CAN1_TX_IRQHandler [WEAK] EXPORT USB_LP_CAN1_RX0_IRQHandler [WEAK] EXPORT CAN1_RX1_IRQHandler [WEAK] EXPORT CAN1_SCE_IRQHandler [WEAK] EXPORT EXTI9_5_IRQHandler [WEAK] EXPORT TIM1_BRK_IRQHandler [WEAK] EXPORT TIM1_UP_IRQHandler [WEAK] EXPORT TIM1_TRG_COM_IRQHandler [WEAK] EXPORT TIM1_CC_IRQHandler [WEAK] EXPORT TIM2_IRQHandler [WEAK] EXPORT TIM3_IRQHandler [WEAK] EXPORT TIM4_IRQHandler [WEAK] EXPORT I2C1_EV_IRQHandler [WEAK] EXPORT I2C1_ER_IRQHandler [WEAK] EXPORT I2C2_EV_IRQHandler [WEAK] EXPORT I2C2_ER_IRQHandler [WEAK] EXPORT SPI1_IRQHandler [WEAK] EXPORT SPI2_IRQHandler [WEAK] EXPORT USART1_IRQHandler [WEAK] EXPORT USART2_IRQHandler [WEAK] EXPORT USART3_IRQHandler [WEAK] EXPORT EXTI15_10_IRQHandler [WEAK] EXPORT RTCAlarm_IRQHandler [WEAK] EXPORT USBWakeUp_IRQHandler [WEAK] EXPORT TIM8_BRK_IRQHandler [WEAK] EXPORT TIM8_UP_IRQHandler [WEAK] EXPORT TIM8_TRG_COM_IRQHandler [WEAK] EXPORT TIM8_CC_IRQHandler [WEAK] EXPORT ADC3_IRQHandler [WEAK] EXPORT FSMC_IRQHandler [WEAK] EXPORT SDIO_IRQHandler [WEAK] EXPORT TIM5_IRQHandler [WEAK] EXPORT SPI3_IRQHandler [WEAK] EXPORT UART4_IRQHandler [WEAK] EXPORT UART5_IRQHandler [WEAK] EXPORT TIM6_IRQHandler [WEAK] EXPORT TIM7_IRQHandler [WEAK] EXPORT DMA2_Channel1_IRQHandler [WEAK] EXPORT DMA2_Channel2_IRQHandler [WEAK] EXPORT DMA2_Channel3_IRQHandler [WEAK] EXPORT DMA2_Channel4_5_IRQHandler [WEAK] WWDG_IRQHandler PVD_IRQHandler TAMPER_IRQHandler RTC_IRQHandler FLASH_IRQHandler RCC_IRQHandler EXTI0_IRQHandler EXTI1_IRQHandler EXTI2_IRQHandler EXTI3_IRQHandler EXTI4_IRQHandler DMA1_Channel1_IRQHandler DMA1_Channel2_IRQHandler DMA1_Channel3_IRQHandler DMA1_Channel4_IRQHandler DMA1_Channel5_IRQHandler DMA1_Channel6_IRQHandler DMA1_Channel7_IRQHandler ADC1_2_IRQHandler USB_HP_CAN1_TX_IRQHandler USB_LP_CAN1_RX0_IRQHandler CAN1_RX1_IRQHandler CAN1_SCE_IRQHandler EXTI9_5_IRQHandler TIM1_BRK_IRQHandler TIM1_UP_IRQHandler TIM1_TRG_COM_IRQHandler TIM1_CC_IRQHandler TIM2_IRQHandler TIM3_IRQHandler TIM4_IRQHandler I2C1_EV_IRQHandler I2C1_ER_IRQHandler I2C2_EV_IRQHandler I2C2_ER_IRQHandler SPI1_IRQHandler SPI2_IRQHandler USART1_IRQHandler USART2_IRQHandler USART3_IRQHandler EXTI15_10_IRQHandler RTCAlarm_IRQHandler USBWakeUp_IRQHandler TIM8_BRK_IRQHandler TIM8_UP_IRQHandler TIM8_TRG_COM_IRQHandler TIM8_CC_IRQHandler ADC3_IRQHandler FSMC_IRQHandler SDIO_IRQHandler TIM5_IRQHandler SPI3_IRQHandler UART4_IRQHandler UART5_IRQHandler TIM6_IRQHandler TIM7_IRQHandler DMA2_Channel1_IRQHandler DMA2_Channel2_IRQHandler DMA2_Channel3_IRQHandler DMA2_Channel4_5_IRQHandler B . ENDP ALIGN ;******************************************************************************* ; User Stack and Heap initialization ;******************************************************************************* IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END ;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE*****
10-channel-pwm-controller-stm32
trunk/libraries/startup/arm/startup_stm32f10x_hd.s
Unix Assembly
gpl3
15,503
;******************** (C) COPYRIGHT 2011 STMicroelectronics ******************** ;* File Name : startup_stm32f10x_hd_vl.s ;* Author : MCD Application Team ;* Version : V3.5.0 ;* Date : 11-March-2011 ;* Description : STM32F10x High Density Value Line Devices vector table ;* for MDK-ARM toolchain. ;* This module performs: ;* - Set the initial SP ;* - Set the initial PC == Reset_Handler ;* - Set the vector table entries with the exceptions ISR address ;* - Configure the clock system and also configure the external ;* SRAM mounted on STM32100E-EVAL board to be used as data ;* memory (optional, to be enabled by user) ;* - Branches to __main in the C library (which eventually ;* calls main()). ;* After Reset the CortexM3 processor is in Thread mode, ;* priority is Privileged, and the Stack is set to Main. ;* <<< Use Configuration Wizard in Context Menu >>> ;******************************************************************************* ; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS ; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. ; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, ; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE ; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING ; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. ;******************************************************************************* ; Amount of memory (in bytes) allocated for Stack ; Tailor this value to your application needs ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000200 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD WWDG_IRQHandler ; Window Watchdog DCD PVD_IRQHandler ; PVD through EXTI Line detect DCD TAMPER_IRQHandler ; Tamper DCD RTC_IRQHandler ; RTC DCD FLASH_IRQHandler ; Flash DCD RCC_IRQHandler ; RCC DCD EXTI0_IRQHandler ; EXTI Line 0 DCD EXTI1_IRQHandler ; EXTI Line 1 DCD EXTI2_IRQHandler ; EXTI Line 2 DCD EXTI3_IRQHandler ; EXTI Line 3 DCD EXTI4_IRQHandler ; EXTI Line 4 DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 DCD ADC1_IRQHandler ; ADC1 DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15 DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16 DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger and Commutation and TIM17 DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare DCD TIM2_IRQHandler ; TIM2 DCD TIM3_IRQHandler ; TIM3 DCD TIM4_IRQHandler ; TIM4 DCD I2C1_EV_IRQHandler ; I2C1 Event DCD I2C1_ER_IRQHandler ; I2C1 Error DCD I2C2_EV_IRQHandler ; I2C2 Event DCD I2C2_ER_IRQHandler ; I2C2 Error DCD SPI1_IRQHandler ; SPI1 DCD SPI2_IRQHandler ; SPI2 DCD USART1_IRQHandler ; USART1 DCD USART2_IRQHandler ; USART2 DCD USART3_IRQHandler ; USART3 DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line DCD CEC_IRQHandler ; HDMI-CEC DCD TIM12_IRQHandler ; TIM12 DCD TIM13_IRQHandler ; TIM13 DCD TIM14_IRQHandler ; TIM14 DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD TIM5_IRQHandler ; TIM5 DCD SPI3_IRQHandler ; SPI3 DCD UART4_IRQHandler ; UART4 DCD UART5_IRQHandler ; UART5 DCD TIM6_DAC_IRQHandler ; TIM6 and DAC underrun DCD TIM7_IRQHandler ; TIM7 DCD DMA2_Channel1_IRQHandler ; DMA2 Channel1 DCD DMA2_Channel2_IRQHandler ; DMA2 Channel2 DCD DMA2_Channel3_IRQHandler ; DMA2 Channel3 DCD DMA2_Channel4_5_IRQHandler ; DMA2 Channel4 & Channel5 DCD DMA2_Channel5_IRQHandler ; DMA2 Channel5 __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA |.text|, CODE, READONLY ; Reset handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT __main IMPORT SystemInit LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP MemManage_Handler\ PROC EXPORT MemManage_Handler [WEAK] B . ENDP BusFault_Handler\ PROC EXPORT BusFault_Handler [WEAK] B . ENDP UsageFault_Handler\ PROC EXPORT UsageFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP DebugMon_Handler\ PROC EXPORT DebugMon_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT WWDG_IRQHandler [WEAK] EXPORT PVD_IRQHandler [WEAK] EXPORT TAMPER_IRQHandler [WEAK] EXPORT RTC_IRQHandler [WEAK] EXPORT FLASH_IRQHandler [WEAK] EXPORT RCC_IRQHandler [WEAK] EXPORT EXTI0_IRQHandler [WEAK] EXPORT EXTI1_IRQHandler [WEAK] EXPORT EXTI2_IRQHandler [WEAK] EXPORT EXTI3_IRQHandler [WEAK] EXPORT EXTI4_IRQHandler [WEAK] EXPORT DMA1_Channel1_IRQHandler [WEAK] EXPORT DMA1_Channel2_IRQHandler [WEAK] EXPORT DMA1_Channel3_IRQHandler [WEAK] EXPORT DMA1_Channel4_IRQHandler [WEAK] EXPORT DMA1_Channel5_IRQHandler [WEAK] EXPORT DMA1_Channel6_IRQHandler [WEAK] EXPORT DMA1_Channel7_IRQHandler [WEAK] EXPORT ADC1_IRQHandler [WEAK] EXPORT EXTI9_5_IRQHandler [WEAK] EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK] EXPORT TIM1_UP_TIM16_IRQHandler [WEAK] EXPORT TIM1_TRG_COM_TIM17_IRQHandler [WEAK] EXPORT TIM1_CC_IRQHandler [WEAK] EXPORT TIM2_IRQHandler [WEAK] EXPORT TIM3_IRQHandler [WEAK] EXPORT TIM4_IRQHandler [WEAK] EXPORT I2C1_EV_IRQHandler [WEAK] EXPORT I2C1_ER_IRQHandler [WEAK] EXPORT I2C2_EV_IRQHandler [WEAK] EXPORT I2C2_ER_IRQHandler [WEAK] EXPORT SPI1_IRQHandler [WEAK] EXPORT SPI2_IRQHandler [WEAK] EXPORT USART1_IRQHandler [WEAK] EXPORT USART2_IRQHandler [WEAK] EXPORT USART3_IRQHandler [WEAK] EXPORT EXTI15_10_IRQHandler [WEAK] EXPORT RTCAlarm_IRQHandler [WEAK] EXPORT CEC_IRQHandler [WEAK] EXPORT TIM12_IRQHandler [WEAK] EXPORT TIM13_IRQHandler [WEAK] EXPORT TIM14_IRQHandler [WEAK] EXPORT TIM5_IRQHandler [WEAK] EXPORT SPI3_IRQHandler [WEAK] EXPORT UART4_IRQHandler [WEAK] EXPORT UART5_IRQHandler [WEAK] EXPORT TIM6_DAC_IRQHandler [WEAK] EXPORT TIM7_IRQHandler [WEAK] EXPORT DMA2_Channel1_IRQHandler [WEAK] EXPORT DMA2_Channel2_IRQHandler [WEAK] EXPORT DMA2_Channel3_IRQHandler [WEAK] EXPORT DMA2_Channel4_5_IRQHandler [WEAK] EXPORT DMA2_Channel5_IRQHandler [WEAK] WWDG_IRQHandler PVD_IRQHandler TAMPER_IRQHandler RTC_IRQHandler FLASH_IRQHandler RCC_IRQHandler EXTI0_IRQHandler EXTI1_IRQHandler EXTI2_IRQHandler EXTI3_IRQHandler EXTI4_IRQHandler DMA1_Channel1_IRQHandler DMA1_Channel2_IRQHandler DMA1_Channel3_IRQHandler DMA1_Channel4_IRQHandler DMA1_Channel5_IRQHandler DMA1_Channel6_IRQHandler DMA1_Channel7_IRQHandler ADC1_IRQHandler EXTI9_5_IRQHandler TIM1_BRK_TIM15_IRQHandler TIM1_UP_TIM16_IRQHandler TIM1_TRG_COM_TIM17_IRQHandler TIM1_CC_IRQHandler TIM2_IRQHandler TIM3_IRQHandler TIM4_IRQHandler I2C1_EV_IRQHandler I2C1_ER_IRQHandler I2C2_EV_IRQHandler I2C2_ER_IRQHandler SPI1_IRQHandler SPI2_IRQHandler USART1_IRQHandler USART2_IRQHandler USART3_IRQHandler EXTI15_10_IRQHandler RTCAlarm_IRQHandler CEC_IRQHandler TIM12_IRQHandler TIM13_IRQHandler TIM14_IRQHandler TIM5_IRQHandler SPI3_IRQHandler UART4_IRQHandler UART5_IRQHandler TIM6_DAC_IRQHandler TIM7_IRQHandler DMA2_Channel1_IRQHandler DMA2_Channel2_IRQHandler DMA2_Channel3_IRQHandler DMA2_Channel4_5_IRQHandler DMA2_Channel5_IRQHandler B . ENDP ALIGN ;******************************************************************************* ; User Stack and Heap initialization ;******************************************************************************* IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END ;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE*****
10-channel-pwm-controller-stm32
trunk/libraries/startup/arm/startup_stm32f10x_hd_vl.s
Unix Assembly
gpl3
15,692
;******************** (C) COPYRIGHT 2011 STMicroelectronics ******************** ;* File Name : startup_stm32f10x_ld.s ;* Author : MCD Application Team ;* Version : V3.5.0 ;* Date : 11-March-2011 ;* Description : STM32F10x Low Density Devices vector table for MDK-ARM ;* toolchain. ;* This module performs: ;* - Set the initial SP ;* - Set the initial PC == Reset_Handler ;* - Set the vector table entries with the exceptions ISR address ;* - Configure the clock system ;* - Branches to __main in the C library (which eventually ;* calls main()). ;* After Reset the CortexM3 processor is in Thread mode, ;* priority is Privileged, and the Stack is set to Main. ;* <<< Use Configuration Wizard in Context Menu >>> ;******************************************************************************* ; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS ; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. ; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, ; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE ; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING ; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. ;******************************************************************************* ; Amount of memory (in bytes) allocated for Stack ; Tailor this value to your application needs ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000200 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD WWDG_IRQHandler ; Window Watchdog DCD PVD_IRQHandler ; PVD through EXTI Line detect DCD TAMPER_IRQHandler ; Tamper DCD RTC_IRQHandler ; RTC DCD FLASH_IRQHandler ; Flash DCD RCC_IRQHandler ; RCC DCD EXTI0_IRQHandler ; EXTI Line 0 DCD EXTI1_IRQHandler ; EXTI Line 1 DCD EXTI2_IRQHandler ; EXTI Line 2 DCD EXTI3_IRQHandler ; EXTI Line 3 DCD EXTI4_IRQHandler ; EXTI Line 4 DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 DCD ADC1_2_IRQHandler ; ADC1_2 DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0 DCD CAN1_RX1_IRQHandler ; CAN1 RX1 DCD CAN1_SCE_IRQHandler ; CAN1 SCE DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 DCD TIM1_BRK_IRQHandler ; TIM1 Break DCD TIM1_UP_IRQHandler ; TIM1 Update DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare DCD TIM2_IRQHandler ; TIM2 DCD TIM3_IRQHandler ; TIM3 DCD 0 ; Reserved DCD I2C1_EV_IRQHandler ; I2C1 Event DCD I2C1_ER_IRQHandler ; I2C1 Error DCD 0 ; Reserved DCD 0 ; Reserved DCD SPI1_IRQHandler ; SPI1 DCD 0 ; Reserved DCD USART1_IRQHandler ; USART1 DCD USART2_IRQHandler ; USART2 DCD 0 ; Reserved DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA |.text|, CODE, READONLY ; Reset handler routine Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT __main IMPORT SystemInit LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP MemManage_Handler\ PROC EXPORT MemManage_Handler [WEAK] B . ENDP BusFault_Handler\ PROC EXPORT BusFault_Handler [WEAK] B . ENDP UsageFault_Handler\ PROC EXPORT UsageFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP DebugMon_Handler\ PROC EXPORT DebugMon_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT WWDG_IRQHandler [WEAK] EXPORT PVD_IRQHandler [WEAK] EXPORT TAMPER_IRQHandler [WEAK] EXPORT RTC_IRQHandler [WEAK] EXPORT FLASH_IRQHandler [WEAK] EXPORT RCC_IRQHandler [WEAK] EXPORT EXTI0_IRQHandler [WEAK] EXPORT EXTI1_IRQHandler [WEAK] EXPORT EXTI2_IRQHandler [WEAK] EXPORT EXTI3_IRQHandler [WEAK] EXPORT EXTI4_IRQHandler [WEAK] EXPORT DMA1_Channel1_IRQHandler [WEAK] EXPORT DMA1_Channel2_IRQHandler [WEAK] EXPORT DMA1_Channel3_IRQHandler [WEAK] EXPORT DMA1_Channel4_IRQHandler [WEAK] EXPORT DMA1_Channel5_IRQHandler [WEAK] EXPORT DMA1_Channel6_IRQHandler [WEAK] EXPORT DMA1_Channel7_IRQHandler [WEAK] EXPORT ADC1_2_IRQHandler [WEAK] EXPORT USB_HP_CAN1_TX_IRQHandler [WEAK] EXPORT USB_LP_CAN1_RX0_IRQHandler [WEAK] EXPORT CAN1_RX1_IRQHandler [WEAK] EXPORT CAN1_SCE_IRQHandler [WEAK] EXPORT EXTI9_5_IRQHandler [WEAK] EXPORT TIM1_BRK_IRQHandler [WEAK] EXPORT TIM1_UP_IRQHandler [WEAK] EXPORT TIM1_TRG_COM_IRQHandler [WEAK] EXPORT TIM1_CC_IRQHandler [WEAK] EXPORT TIM2_IRQHandler [WEAK] EXPORT TIM3_IRQHandler [WEAK] EXPORT I2C1_EV_IRQHandler [WEAK] EXPORT I2C1_ER_IRQHandler [WEAK] EXPORT SPI1_IRQHandler [WEAK] EXPORT USART1_IRQHandler [WEAK] EXPORT USART2_IRQHandler [WEAK] EXPORT EXTI15_10_IRQHandler [WEAK] EXPORT RTCAlarm_IRQHandler [WEAK] EXPORT USBWakeUp_IRQHandler [WEAK] WWDG_IRQHandler PVD_IRQHandler TAMPER_IRQHandler RTC_IRQHandler FLASH_IRQHandler RCC_IRQHandler EXTI0_IRQHandler EXTI1_IRQHandler EXTI2_IRQHandler EXTI3_IRQHandler EXTI4_IRQHandler DMA1_Channel1_IRQHandler DMA1_Channel2_IRQHandler DMA1_Channel3_IRQHandler DMA1_Channel4_IRQHandler DMA1_Channel5_IRQHandler DMA1_Channel6_IRQHandler DMA1_Channel7_IRQHandler ADC1_2_IRQHandler USB_HP_CAN1_TX_IRQHandler USB_LP_CAN1_RX0_IRQHandler CAN1_RX1_IRQHandler CAN1_SCE_IRQHandler EXTI9_5_IRQHandler TIM1_BRK_IRQHandler TIM1_UP_IRQHandler TIM1_TRG_COM_IRQHandler TIM1_CC_IRQHandler TIM2_IRQHandler TIM3_IRQHandler I2C1_EV_IRQHandler I2C1_ER_IRQHandler SPI1_IRQHandler USART1_IRQHandler USART2_IRQHandler EXTI15_10_IRQHandler RTCAlarm_IRQHandler USBWakeUp_IRQHandler B . ENDP ALIGN ;******************************************************************************* ; User Stack and Heap initialization ;******************************************************************************* IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END ;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE*****
10-channel-pwm-controller-stm32
trunk/libraries/startup/arm/startup_stm32f10x_ld.s
Unix Assembly
gpl3
12,376
;******************** (C) COPYRIGHT 2011 STMicroelectronics ******************** ;* File Name : startup_stm32f10x_cl.s ;* Author : MCD Application Team ;* Version : V3.5.0 ;* Date : 11-March-2011 ;* Description : STM32F10x Connectivity line devices vector table for MDK-ARM ;* toolchain. ;* This module performs: ;* - Set the initial SP ;* - Set the initial PC == Reset_Handler ;* - Set the vector table entries with the exceptions ISR address ;* - Configure the clock system ;* - Branches to __main in the C library (which eventually ;* calls main()). ;* After Reset the CortexM3 processor is in Thread mode, ;* priority is Privileged, and the Stack is set to Main. ;* <<< Use Configuration Wizard in Context Menu >>> ;******************************************************************************* ; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS ; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. ; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, ; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE ; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING ; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. ;******************************************************************************* ; Amount of memory (in bytes) allocated for Stack ; Tailor this value to your application needs ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000200 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD WWDG_IRQHandler ; Window Watchdog DCD PVD_IRQHandler ; PVD through EXTI Line detect DCD TAMPER_IRQHandler ; Tamper DCD RTC_IRQHandler ; RTC DCD FLASH_IRQHandler ; Flash DCD RCC_IRQHandler ; RCC DCD EXTI0_IRQHandler ; EXTI Line 0 DCD EXTI1_IRQHandler ; EXTI Line 1 DCD EXTI2_IRQHandler ; EXTI Line 2 DCD EXTI3_IRQHandler ; EXTI Line 3 DCD EXTI4_IRQHandler ; EXTI Line 4 DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 DCD ADC1_2_IRQHandler ; ADC1 and ADC2 DCD CAN1_TX_IRQHandler ; CAN1 TX DCD CAN1_RX0_IRQHandler ; CAN1 RX0 DCD CAN1_RX1_IRQHandler ; CAN1 RX1 DCD CAN1_SCE_IRQHandler ; CAN1 SCE DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 DCD TIM1_BRK_IRQHandler ; TIM1 Break DCD TIM1_UP_IRQHandler ; TIM1 Update DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare DCD TIM2_IRQHandler ; TIM2 DCD TIM3_IRQHandler ; TIM3 DCD TIM4_IRQHandler ; TIM4 DCD I2C1_EV_IRQHandler ; I2C1 Event DCD I2C1_ER_IRQHandler ; I2C1 Error DCD I2C2_EV_IRQHandler ; I2C2 Event DCD I2C2_ER_IRQHandler ; I2C1 Error DCD SPI1_IRQHandler ; SPI1 DCD SPI2_IRQHandler ; SPI2 DCD USART1_IRQHandler ; USART1 DCD USART2_IRQHandler ; USART2 DCD USART3_IRQHandler ; USART3 DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 DCD RTCAlarm_IRQHandler ; RTC alarm through EXTI line DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI line DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD TIM5_IRQHandler ; TIM5 DCD SPI3_IRQHandler ; SPI3 DCD UART4_IRQHandler ; UART4 DCD UART5_IRQHandler ; UART5 DCD TIM6_IRQHandler ; TIM6 DCD TIM7_IRQHandler ; TIM7 DCD DMA2_Channel1_IRQHandler ; DMA2 Channel1 DCD DMA2_Channel2_IRQHandler ; DMA2 Channel2 DCD DMA2_Channel3_IRQHandler ; DMA2 Channel3 DCD DMA2_Channel4_IRQHandler ; DMA2 Channel4 DCD DMA2_Channel5_IRQHandler ; DMA2 Channel5 DCD ETH_IRQHandler ; Ethernet DCD ETH_WKUP_IRQHandler ; Ethernet Wakeup through EXTI line DCD CAN2_TX_IRQHandler ; CAN2 TX DCD CAN2_RX0_IRQHandler ; CAN2 RX0 DCD CAN2_RX1_IRQHandler ; CAN2 RX1 DCD CAN2_SCE_IRQHandler ; CAN2 SCE DCD OTG_FS_IRQHandler ; USB OTG FS __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA |.text|, CODE, READONLY ; Reset handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP MemManage_Handler\ PROC EXPORT MemManage_Handler [WEAK] B . ENDP BusFault_Handler\ PROC EXPORT BusFault_Handler [WEAK] B . ENDP UsageFault_Handler\ PROC EXPORT UsageFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP DebugMon_Handler\ PROC EXPORT DebugMon_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT WWDG_IRQHandler [WEAK] EXPORT PVD_IRQHandler [WEAK] EXPORT TAMPER_IRQHandler [WEAK] EXPORT RTC_IRQHandler [WEAK] EXPORT FLASH_IRQHandler [WEAK] EXPORT RCC_IRQHandler [WEAK] EXPORT EXTI0_IRQHandler [WEAK] EXPORT EXTI1_IRQHandler [WEAK] EXPORT EXTI2_IRQHandler [WEAK] EXPORT EXTI3_IRQHandler [WEAK] EXPORT EXTI4_IRQHandler [WEAK] EXPORT DMA1_Channel1_IRQHandler [WEAK] EXPORT DMA1_Channel2_IRQHandler [WEAK] EXPORT DMA1_Channel3_IRQHandler [WEAK] EXPORT DMA1_Channel4_IRQHandler [WEAK] EXPORT DMA1_Channel5_IRQHandler [WEAK] EXPORT DMA1_Channel6_IRQHandler [WEAK] EXPORT DMA1_Channel7_IRQHandler [WEAK] EXPORT ADC1_2_IRQHandler [WEAK] EXPORT CAN1_TX_IRQHandler [WEAK] EXPORT CAN1_RX0_IRQHandler [WEAK] EXPORT CAN1_RX1_IRQHandler [WEAK] EXPORT CAN1_SCE_IRQHandler [WEAK] EXPORT EXTI9_5_IRQHandler [WEAK] EXPORT TIM1_BRK_IRQHandler [WEAK] EXPORT TIM1_UP_IRQHandler [WEAK] EXPORT TIM1_TRG_COM_IRQHandler [WEAK] EXPORT TIM1_CC_IRQHandler [WEAK] EXPORT TIM2_IRQHandler [WEAK] EXPORT TIM3_IRQHandler [WEAK] EXPORT TIM4_IRQHandler [WEAK] EXPORT I2C1_EV_IRQHandler [WEAK] EXPORT I2C1_ER_IRQHandler [WEAK] EXPORT I2C2_EV_IRQHandler [WEAK] EXPORT I2C2_ER_IRQHandler [WEAK] EXPORT SPI1_IRQHandler [WEAK] EXPORT SPI2_IRQHandler [WEAK] EXPORT USART1_IRQHandler [WEAK] EXPORT USART2_IRQHandler [WEAK] EXPORT USART3_IRQHandler [WEAK] EXPORT EXTI15_10_IRQHandler [WEAK] EXPORT RTCAlarm_IRQHandler [WEAK] EXPORT OTG_FS_WKUP_IRQHandler [WEAK] EXPORT TIM5_IRQHandler [WEAK] EXPORT SPI3_IRQHandler [WEAK] EXPORT UART4_IRQHandler [WEAK] EXPORT UART5_IRQHandler [WEAK] EXPORT TIM6_IRQHandler [WEAK] EXPORT TIM7_IRQHandler [WEAK] EXPORT DMA2_Channel1_IRQHandler [WEAK] EXPORT DMA2_Channel2_IRQHandler [WEAK] EXPORT DMA2_Channel3_IRQHandler [WEAK] EXPORT DMA2_Channel4_IRQHandler [WEAK] EXPORT DMA2_Channel5_IRQHandler [WEAK] EXPORT ETH_IRQHandler [WEAK] EXPORT ETH_WKUP_IRQHandler [WEAK] EXPORT CAN2_TX_IRQHandler [WEAK] EXPORT CAN2_RX0_IRQHandler [WEAK] EXPORT CAN2_RX1_IRQHandler [WEAK] EXPORT CAN2_SCE_IRQHandler [WEAK] EXPORT OTG_FS_IRQHandler [WEAK] WWDG_IRQHandler PVD_IRQHandler TAMPER_IRQHandler RTC_IRQHandler FLASH_IRQHandler RCC_IRQHandler EXTI0_IRQHandler EXTI1_IRQHandler EXTI2_IRQHandler EXTI3_IRQHandler EXTI4_IRQHandler DMA1_Channel1_IRQHandler DMA1_Channel2_IRQHandler DMA1_Channel3_IRQHandler DMA1_Channel4_IRQHandler DMA1_Channel5_IRQHandler DMA1_Channel6_IRQHandler DMA1_Channel7_IRQHandler ADC1_2_IRQHandler CAN1_TX_IRQHandler CAN1_RX0_IRQHandler CAN1_RX1_IRQHandler CAN1_SCE_IRQHandler EXTI9_5_IRQHandler TIM1_BRK_IRQHandler TIM1_UP_IRQHandler TIM1_TRG_COM_IRQHandler TIM1_CC_IRQHandler TIM2_IRQHandler TIM3_IRQHandler TIM4_IRQHandler I2C1_EV_IRQHandler I2C1_ER_IRQHandler I2C2_EV_IRQHandler I2C2_ER_IRQHandler SPI1_IRQHandler SPI2_IRQHandler USART1_IRQHandler USART2_IRQHandler USART3_IRQHandler EXTI15_10_IRQHandler RTCAlarm_IRQHandler OTG_FS_WKUP_IRQHandler TIM5_IRQHandler SPI3_IRQHandler UART4_IRQHandler UART5_IRQHandler TIM6_IRQHandler TIM7_IRQHandler DMA2_Channel1_IRQHandler DMA2_Channel2_IRQHandler DMA2_Channel3_IRQHandler DMA2_Channel4_IRQHandler DMA2_Channel5_IRQHandler ETH_IRQHandler ETH_WKUP_IRQHandler CAN2_TX_IRQHandler CAN2_RX0_IRQHandler CAN2_RX1_IRQHandler CAN2_SCE_IRQHandler OTG_FS_IRQHandler B . ENDP ALIGN ;******************************************************************************* ; User Stack and Heap initialization ;******************************************************************************* IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END ;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE*****
10-channel-pwm-controller-stm32
trunk/libraries/startup/arm/startup_stm32f10x_cl.s
Unix Assembly
gpl3
15,766
;******************** (C) COPYRIGHT 2011 STMicroelectronics ******************** ;* File Name : startup_stm32f10x_ld_vl.s ;* Author : MCD Application Team ;* Version : V3.5.0 ;* Date : 11-March-2011 ;* Description : STM32F10x Low Density Value Line Devices vector table ;* for MDK-ARM toolchain. ;* This module performs: ;* - Set the initial SP ;* - Set the initial PC == Reset_Handler ;* - Set the vector table entries with the exceptions ISR address ;* - Configure the clock system ;* - Branches to __main in the C library (which eventually ;* calls main()). ;* After Reset the CortexM3 processor is in Thread mode, ;* priority is Privileged, and the Stack is set to Main. ;* <<< Use Configuration Wizard in Context Menu >>> ;******************************************************************************* ; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS ; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. ; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, ; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE ; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING ; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. ;******************************************************************************* ; Amount of memory (in bytes) allocated for Stack ; Tailor this value to your application needs ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000200 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD WWDG_IRQHandler ; Window Watchdog DCD PVD_IRQHandler ; PVD through EXTI Line detect DCD TAMPER_IRQHandler ; Tamper DCD RTC_IRQHandler ; RTC DCD FLASH_IRQHandler ; Flash DCD RCC_IRQHandler ; RCC DCD EXTI0_IRQHandler ; EXTI Line 0 DCD EXTI1_IRQHandler ; EXTI Line 1 DCD EXTI2_IRQHandler ; EXTI Line 2 DCD EXTI3_IRQHandler ; EXTI Line 3 DCD EXTI4_IRQHandler ; EXTI Line 4 DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 DCD ADC1_IRQHandler ; ADC1 DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15 DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16 DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger and Commutation and TIM17 DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare DCD TIM2_IRQHandler ; TIM2 DCD TIM3_IRQHandler ; TIM3 DCD 0 ; Reserved DCD I2C1_EV_IRQHandler ; I2C1 Event DCD I2C1_ER_IRQHandler ; I2C1 Error DCD 0 ; Reserved DCD 0 ; Reserved DCD SPI1_IRQHandler ; SPI1 DCD 0 ; Reserved DCD USART1_IRQHandler ; USART1 DCD USART2_IRQHandler ; USART2 DCD 0 ; Reserved DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line DCD CEC_IRQHandler ; HDMI-CEC DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD TIM6_DAC_IRQHandler ; TIM6 and DAC underrun DCD TIM7_IRQHandler ; TIM7 __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA |.text|, CODE, READONLY ; Reset handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT __main IMPORT SystemInit LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP MemManage_Handler\ PROC EXPORT MemManage_Handler [WEAK] B . ENDP BusFault_Handler\ PROC EXPORT BusFault_Handler [WEAK] B . ENDP UsageFault_Handler\ PROC EXPORT UsageFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP DebugMon_Handler\ PROC EXPORT DebugMon_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT WWDG_IRQHandler [WEAK] EXPORT PVD_IRQHandler [WEAK] EXPORT TAMPER_IRQHandler [WEAK] EXPORT RTC_IRQHandler [WEAK] EXPORT FLASH_IRQHandler [WEAK] EXPORT RCC_IRQHandler [WEAK] EXPORT EXTI0_IRQHandler [WEAK] EXPORT EXTI1_IRQHandler [WEAK] EXPORT EXTI2_IRQHandler [WEAK] EXPORT EXTI3_IRQHandler [WEAK] EXPORT EXTI4_IRQHandler [WEAK] EXPORT DMA1_Channel1_IRQHandler [WEAK] EXPORT DMA1_Channel2_IRQHandler [WEAK] EXPORT DMA1_Channel3_IRQHandler [WEAK] EXPORT DMA1_Channel4_IRQHandler [WEAK] EXPORT DMA1_Channel5_IRQHandler [WEAK] EXPORT DMA1_Channel6_IRQHandler [WEAK] EXPORT DMA1_Channel7_IRQHandler [WEAK] EXPORT ADC1_IRQHandler [WEAK] EXPORT EXTI9_5_IRQHandler [WEAK] EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK] EXPORT TIM1_UP_TIM16_IRQHandler [WEAK] EXPORT TIM1_TRG_COM_TIM17_IRQHandler [WEAK] EXPORT TIM1_CC_IRQHandler [WEAK] EXPORT TIM2_IRQHandler [WEAK] EXPORT TIM3_IRQHandler [WEAK] EXPORT I2C1_EV_IRQHandler [WEAK] EXPORT I2C1_ER_IRQHandler [WEAK] EXPORT SPI1_IRQHandler [WEAK] EXPORT USART1_IRQHandler [WEAK] EXPORT USART2_IRQHandler [WEAK] EXPORT EXTI15_10_IRQHandler [WEAK] EXPORT RTCAlarm_IRQHandler [WEAK] EXPORT CEC_IRQHandler [WEAK] EXPORT TIM6_DAC_IRQHandler [WEAK] EXPORT TIM7_IRQHandler [WEAK] WWDG_IRQHandler PVD_IRQHandler TAMPER_IRQHandler RTC_IRQHandler FLASH_IRQHandler RCC_IRQHandler EXTI0_IRQHandler EXTI1_IRQHandler EXTI2_IRQHandler EXTI3_IRQHandler EXTI4_IRQHandler DMA1_Channel1_IRQHandler DMA1_Channel2_IRQHandler DMA1_Channel3_IRQHandler DMA1_Channel4_IRQHandler DMA1_Channel5_IRQHandler DMA1_Channel6_IRQHandler DMA1_Channel7_IRQHandler ADC1_IRQHandler EXTI9_5_IRQHandler TIM1_BRK_TIM15_IRQHandler TIM1_UP_TIM16_IRQHandler TIM1_TRG_COM_TIM17_IRQHandler TIM1_CC_IRQHandler TIM2_IRQHandler TIM3_IRQHandler I2C1_EV_IRQHandler I2C1_ER_IRQHandler SPI1_IRQHandler USART1_IRQHandler USART2_IRQHandler EXTI15_10_IRQHandler RTCAlarm_IRQHandler CEC_IRQHandler TIM6_DAC_IRQHandler TIM7_IRQHandler B . ENDP ALIGN ;******************************************************************************* ; User Stack and Heap initialization ;******************************************************************************* IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END ;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE*****
10-channel-pwm-controller-stm32
trunk/libraries/startup/arm/startup_stm32f10x_ld_vl.s
Unix Assembly
gpl3
13,656
;******************** (C) COPYRIGHT 2011 STMicroelectronics ******************** ;* File Name : startup_stm32f10x_md_vl.s ;* Author : MCD Application Team ;* Version : V3.5.0 ;* Date : 11-March-2011 ;* Description : STM32F10x Medium Density Value Line Devices vector table ;* for MDK-ARM toolchain. ;* This module performs: ;* - Set the initial SP ;* - Set the initial PC == Reset_Handler ;* - Set the vector table entries with the exceptions ISR address ;* - Configure the clock system ;* - Branches to __main in the C library (which eventually ;* calls main()). ;* After Reset the CortexM3 processor is in Thread mode, ;* priority is Privileged, and the Stack is set to Main. ;* <<< Use Configuration Wizard in Context Menu >>> ;******************************************************************************* ; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS ; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. ; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, ; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE ; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING ; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. ;******************************************************************************* ; Amount of memory (in bytes) allocated for Stack ; Tailor this value to your application needs ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000200 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD WWDG_IRQHandler ; Window Watchdog DCD PVD_IRQHandler ; PVD through EXTI Line detect DCD TAMPER_IRQHandler ; Tamper DCD RTC_IRQHandler ; RTC DCD FLASH_IRQHandler ; Flash DCD RCC_IRQHandler ; RCC DCD EXTI0_IRQHandler ; EXTI Line 0 DCD EXTI1_IRQHandler ; EXTI Line 1 DCD EXTI2_IRQHandler ; EXTI Line 2 DCD EXTI3_IRQHandler ; EXTI Line 3 DCD EXTI4_IRQHandler ; EXTI Line 4 DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 DCD ADC1_IRQHandler ; ADC1 DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15 DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16 DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger and Commutation and TIM17 DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare DCD TIM2_IRQHandler ; TIM2 DCD TIM3_IRQHandler ; TIM3 DCD TIM4_IRQHandler ; TIM4 DCD I2C1_EV_IRQHandler ; I2C1 Event DCD I2C1_ER_IRQHandler ; I2C1 Error DCD I2C2_EV_IRQHandler ; I2C2 Event DCD I2C2_ER_IRQHandler ; I2C2 Error DCD SPI1_IRQHandler ; SPI1 DCD SPI2_IRQHandler ; SPI2 DCD USART1_IRQHandler ; USART1 DCD USART2_IRQHandler ; USART2 DCD USART3_IRQHandler ; USART3 DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line DCD CEC_IRQHandler ; HDMI-CEC DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD TIM6_DAC_IRQHandler ; TIM6 and DAC underrun DCD TIM7_IRQHandler ; TIM7 __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA |.text|, CODE, READONLY ; Reset handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT __main IMPORT SystemInit LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP MemManage_Handler\ PROC EXPORT MemManage_Handler [WEAK] B . ENDP BusFault_Handler\ PROC EXPORT BusFault_Handler [WEAK] B . ENDP UsageFault_Handler\ PROC EXPORT UsageFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP DebugMon_Handler\ PROC EXPORT DebugMon_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT WWDG_IRQHandler [WEAK] EXPORT PVD_IRQHandler [WEAK] EXPORT TAMPER_IRQHandler [WEAK] EXPORT RTC_IRQHandler [WEAK] EXPORT FLASH_IRQHandler [WEAK] EXPORT RCC_IRQHandler [WEAK] EXPORT EXTI0_IRQHandler [WEAK] EXPORT EXTI1_IRQHandler [WEAK] EXPORT EXTI2_IRQHandler [WEAK] EXPORT EXTI3_IRQHandler [WEAK] EXPORT EXTI4_IRQHandler [WEAK] EXPORT DMA1_Channel1_IRQHandler [WEAK] EXPORT DMA1_Channel2_IRQHandler [WEAK] EXPORT DMA1_Channel3_IRQHandler [WEAK] EXPORT DMA1_Channel4_IRQHandler [WEAK] EXPORT DMA1_Channel5_IRQHandler [WEAK] EXPORT DMA1_Channel6_IRQHandler [WEAK] EXPORT DMA1_Channel7_IRQHandler [WEAK] EXPORT ADC1_IRQHandler [WEAK] EXPORT EXTI9_5_IRQHandler [WEAK] EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK] EXPORT TIM1_UP_TIM16_IRQHandler [WEAK] EXPORT TIM1_TRG_COM_TIM17_IRQHandler [WEAK] EXPORT TIM1_CC_IRQHandler [WEAK] EXPORT TIM2_IRQHandler [WEAK] EXPORT TIM3_IRQHandler [WEAK] EXPORT TIM4_IRQHandler [WEAK] EXPORT I2C1_EV_IRQHandler [WEAK] EXPORT I2C1_ER_IRQHandler [WEAK] EXPORT I2C2_EV_IRQHandler [WEAK] EXPORT I2C2_ER_IRQHandler [WEAK] EXPORT SPI1_IRQHandler [WEAK] EXPORT SPI2_IRQHandler [WEAK] EXPORT USART1_IRQHandler [WEAK] EXPORT USART2_IRQHandler [WEAK] EXPORT USART3_IRQHandler [WEAK] EXPORT EXTI15_10_IRQHandler [WEAK] EXPORT RTCAlarm_IRQHandler [WEAK] EXPORT CEC_IRQHandler [WEAK] EXPORT TIM6_DAC_IRQHandler [WEAK] EXPORT TIM7_IRQHandler [WEAK] WWDG_IRQHandler PVD_IRQHandler TAMPER_IRQHandler RTC_IRQHandler FLASH_IRQHandler RCC_IRQHandler EXTI0_IRQHandler EXTI1_IRQHandler EXTI2_IRQHandler EXTI3_IRQHandler EXTI4_IRQHandler DMA1_Channel1_IRQHandler DMA1_Channel2_IRQHandler DMA1_Channel3_IRQHandler DMA1_Channel4_IRQHandler DMA1_Channel5_IRQHandler DMA1_Channel6_IRQHandler DMA1_Channel7_IRQHandler ADC1_IRQHandler EXTI9_5_IRQHandler TIM1_BRK_TIM15_IRQHandler TIM1_UP_TIM16_IRQHandler TIM1_TRG_COM_TIM17_IRQHandler TIM1_CC_IRQHandler TIM2_IRQHandler TIM3_IRQHandler TIM4_IRQHandler I2C1_EV_IRQHandler I2C1_ER_IRQHandler I2C2_EV_IRQHandler I2C2_ER_IRQHandler SPI1_IRQHandler SPI2_IRQHandler USART1_IRQHandler USART2_IRQHandler USART3_IRQHandler EXTI15_10_IRQHandler RTCAlarm_IRQHandler CEC_IRQHandler TIM6_DAC_IRQHandler TIM7_IRQHandler B . ENDP ALIGN ;******************************************************************************* ; User Stack and Heap initialization ;******************************************************************************* IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END ;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE*****
10-channel-pwm-controller-stm32
trunk/libraries/startup/arm/startup_stm32f10x_md_vl.s
Unix Assembly
gpl3
14,073
/** ****************************************************************************** * @file startup_stm32f10x_md.s * @author MCD Application Team * @version V3.5.0 * @date 11-March-2011 * @brief STM32F10x Medium Density Devices vector table for Atollic toolchain. * This module performs: * - Set the initial SP * - Set the initial PC == Reset_Handler, * - Set the vector table entries with the exceptions ISR address * - Configure the clock system * - Branches to main in the C library (which eventually * calls main()). * After Reset the Cortex-M3 processor is in Thread mode, * priority is Privileged, and the Stack is set to Main. ****************************************************************************** * @attention * * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. * * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2> ****************************************************************************** */ .syntax unified .cpu cortex-m3 .fpu softvfp .thumb .global g_pfnVectors .global Default_Handler /* start address for the initialization values of the .data section. defined in linker script */ .word _sidata /* start address for the .data section. defined in linker script */ .word _sdata /* end address for the .data section. defined in linker script */ .word _edata /* start address for the .bss section. defined in linker script */ .word _sbss /* end address for the .bss section. defined in linker script */ .word _ebss .equ BootRAM, 0xF108F85F /** * @brief This is the code that gets called when the processor first * starts execution following a reset event. Only the absolutely * necessary set is performed, after which the application * supplied main() routine is called. * @param None * @retval : None */ .section .text.Reset_Handler .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: /* Copy the data segment initializers from flash to SRAM */ movs r1, #0 b LoopCopyDataInit CopyDataInit: ldr r3, =_sidata ldr r3, [r3, r1] str r3, [r0, r1] adds r1, r1, #4 LoopCopyDataInit: ldr r0, =_sdata ldr r3, =_edata adds r2, r0, r1 cmp r2, r3 bcc CopyDataInit ldr r2, =_sbss b LoopFillZerobss /* Zero fill the bss segment. */ FillZerobss: movs r3, #0 str r3, [r2], #4 LoopFillZerobss: ldr r3, = _ebss cmp r2, r3 bcc FillZerobss /* Call the clock system intitialization function.*/ bl SystemInit /* Call static constructors */ bl __libc_init_array /* Call the application's entry point.*/ bl main bx lr .size Reset_Handler, .-Reset_Handler /** * @brief This is the code that gets called when the processor receives an * unexpected interrupt. This simply enters an infinite loop, preserving * the system state for examination by a debugger. * * @param None * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop .size Default_Handler, .-Default_Handler /****************************************************************************** * * The minimal vector table for a Cortex M3. Note that the proper constructs * must be placed on this to ensure that it ends up at physical address * 0x0000.0000. * ******************************************************************************/ .section .isr_vector,"a",%progbits .type g_pfnVectors, %object .size g_pfnVectors, .-g_pfnVectors g_pfnVectors: .word _estack .word Reset_Handler .word NMI_Handler .word HardFault_Handler .word MemManage_Handler .word BusFault_Handler .word UsageFault_Handler .word 0 .word 0 .word 0 .word 0 .word SVC_Handler .word DebugMon_Handler .word 0 .word PendSV_Handler .word SysTick_Handler .word WWDG_IRQHandler .word PVD_IRQHandler .word TAMPER_IRQHandler .word RTC_IRQHandler .word FLASH_IRQHandler .word RCC_IRQHandler .word EXTI0_IRQHandler .word EXTI1_IRQHandler .word EXTI2_IRQHandler .word EXTI3_IRQHandler .word EXTI4_IRQHandler .word DMA1_Channel1_IRQHandler .word DMA1_Channel2_IRQHandler .word DMA1_Channel3_IRQHandler .word DMA1_Channel4_IRQHandler .word DMA1_Channel5_IRQHandler .word DMA1_Channel6_IRQHandler .word DMA1_Channel7_IRQHandler .word ADC1_2_IRQHandler .word USB_HP_CAN1_TX_IRQHandler .word USB_LP_CAN1_RX0_IRQHandler .word CAN1_RX1_IRQHandler .word CAN1_SCE_IRQHandler .word EXTI9_5_IRQHandler .word TIM1_BRK_IRQHandler .word TIM1_UP_IRQHandler .word TIM1_TRG_COM_IRQHandler .word TIM1_CC_IRQHandler .word TIM2_IRQHandler .word TIM3_IRQHandler .word TIM4_IRQHandler .word I2C1_EV_IRQHandler .word I2C1_ER_IRQHandler .word I2C2_EV_IRQHandler .word I2C2_ER_IRQHandler .word SPI1_IRQHandler .word SPI2_IRQHandler .word USART1_IRQHandler .word USART2_IRQHandler .word USART3_IRQHandler .word EXTI15_10_IRQHandler .word RTCAlarm_IRQHandler .word USBWakeUp_IRQHandler .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word BootRAM /* @0x108. This is for boot in RAM mode for STM32F10x Medium Density devices. */ /******************************************************************************* * * Provide weak aliases for each Exception handler to the Default_Handler. * As they are weak aliases, any function with the same name will override * this definition. * *******************************************************************************/ .weak NMI_Handler .thumb_set NMI_Handler,Default_Handler .weak HardFault_Handler .thumb_set HardFault_Handler,Default_Handler .weak MemManage_Handler .thumb_set MemManage_Handler,Default_Handler .weak BusFault_Handler .thumb_set BusFault_Handler,Default_Handler .weak UsageFault_Handler .thumb_set UsageFault_Handler,Default_Handler .weak SVC_Handler .thumb_set SVC_Handler,Default_Handler .weak DebugMon_Handler .thumb_set DebugMon_Handler,Default_Handler .weak PendSV_Handler .thumb_set PendSV_Handler,Default_Handler .weak SysTick_Handler .thumb_set SysTick_Handler,Default_Handler .weak WWDG_IRQHandler .thumb_set WWDG_IRQHandler,Default_Handler .weak PVD_IRQHandler .thumb_set PVD_IRQHandler,Default_Handler .weak TAMPER_IRQHandler .thumb_set TAMPER_IRQHandler,Default_Handler .weak RTC_IRQHandler .thumb_set RTC_IRQHandler,Default_Handler .weak FLASH_IRQHandler .thumb_set FLASH_IRQHandler,Default_Handler .weak RCC_IRQHandler .thumb_set RCC_IRQHandler,Default_Handler .weak EXTI0_IRQHandler .thumb_set EXTI0_IRQHandler,Default_Handler .weak EXTI1_IRQHandler .thumb_set EXTI1_IRQHandler,Default_Handler .weak EXTI2_IRQHandler .thumb_set EXTI2_IRQHandler,Default_Handler .weak EXTI3_IRQHandler .thumb_set EXTI3_IRQHandler,Default_Handler .weak EXTI4_IRQHandler .thumb_set EXTI4_IRQHandler,Default_Handler .weak DMA1_Channel1_IRQHandler .thumb_set DMA1_Channel1_IRQHandler,Default_Handler .weak DMA1_Channel2_IRQHandler .thumb_set DMA1_Channel2_IRQHandler,Default_Handler .weak DMA1_Channel3_IRQHandler .thumb_set DMA1_Channel3_IRQHandler,Default_Handler .weak DMA1_Channel4_IRQHandler .thumb_set DMA1_Channel4_IRQHandler,Default_Handler .weak DMA1_Channel5_IRQHandler .thumb_set DMA1_Channel5_IRQHandler,Default_Handler .weak DMA1_Channel6_IRQHandler .thumb_set DMA1_Channel6_IRQHandler,Default_Handler .weak DMA1_Channel7_IRQHandler .thumb_set DMA1_Channel7_IRQHandler,Default_Handler .weak ADC1_2_IRQHandler .thumb_set ADC1_2_IRQHandler,Default_Handler .weak USB_HP_CAN1_TX_IRQHandler .thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler .weak USB_LP_CAN1_RX0_IRQHandler .thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler .weak CAN1_RX1_IRQHandler .thumb_set CAN1_RX1_IRQHandler,Default_Handler .weak CAN1_SCE_IRQHandler .thumb_set CAN1_SCE_IRQHandler,Default_Handler .weak EXTI9_5_IRQHandler .thumb_set EXTI9_5_IRQHandler,Default_Handler .weak TIM1_BRK_IRQHandler .thumb_set TIM1_BRK_IRQHandler,Default_Handler .weak TIM1_UP_IRQHandler .thumb_set TIM1_UP_IRQHandler,Default_Handler .weak TIM1_TRG_COM_IRQHandler .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler .weak TIM1_CC_IRQHandler .thumb_set TIM1_CC_IRQHandler,Default_Handler .weak TIM2_IRQHandler .thumb_set TIM2_IRQHandler,Default_Handler .weak TIM3_IRQHandler .thumb_set TIM3_IRQHandler,Default_Handler .weak TIM4_IRQHandler .thumb_set TIM4_IRQHandler,Default_Handler .weak I2C1_EV_IRQHandler .thumb_set I2C1_EV_IRQHandler,Default_Handler .weak I2C1_ER_IRQHandler .thumb_set I2C1_ER_IRQHandler,Default_Handler .weak I2C2_EV_IRQHandler .thumb_set I2C2_EV_IRQHandler,Default_Handler .weak I2C2_ER_IRQHandler .thumb_set I2C2_ER_IRQHandler,Default_Handler .weak SPI1_IRQHandler .thumb_set SPI1_IRQHandler,Default_Handler .weak SPI2_IRQHandler .thumb_set SPI2_IRQHandler,Default_Handler .weak USART1_IRQHandler .thumb_set USART1_IRQHandler,Default_Handler .weak USART2_IRQHandler .thumb_set USART2_IRQHandler,Default_Handler .weak USART3_IRQHandler .thumb_set USART3_IRQHandler,Default_Handler .weak EXTI15_10_IRQHandler .thumb_set EXTI15_10_IRQHandler,Default_Handler .weak RTCAlarm_IRQHandler .thumb_set RTCAlarm_IRQHandler,Default_Handler .weak USBWakeUp_IRQHandler .thumb_set USBWakeUp_IRQHandler,Default_Handler /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
10-channel-pwm-controller-stm32
trunk/libraries/startup/TrueSTUDIO/startup_stm32f10x_md.s
Unix Assembly
gpl3
10,275
/** ****************************************************************************** * @file startup_stm32f10x_xl.s * @author MCD Application Team * @version V3.5.0 * @date 11-March-2011 * @brief STM32F10x XL-Density Devices vector table for TrueSTUDIO toolchain. * This module performs: * - Set the initial SP * - Set the initial PC == Reset_Handler, * - Set the vector table entries with the exceptions ISR address * - Configure the clock system and the external SRAM mounted on * STM3210E-EVAL board to be used as data memory (optional, * to be enabled by user) * - Branches to main in the C library (which eventually * calls main()). * After Reset the Cortex-M3 processor is in Thread mode, * priority is Privileged, and the Stack is set to Main. ****************************************************************************** * @attention * * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. * * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2> ****************************************************************************** */ .syntax unified .cpu cortex-m3 .fpu softvfp .thumb .global g_pfnVectors .global Default_Handler /* start address for the initialization values of the .data section. defined in linker script */ .word _sidata /* start address for the .data section. defined in linker script */ .word _sdata /* end address for the .data section. defined in linker script */ .word _edata /* start address for the .bss section. defined in linker script */ .word _sbss /* end address for the .bss section. defined in linker script */ .word _ebss .equ BootRAM, 0xF1E0F85F /** * @brief This is the code that gets called when the processor first * starts execution following a reset event. Only the absolutely * necessary set is performed, after which the application * supplied main() routine is called. * @param None * @retval : None */ .section .text.Reset_Handler .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: /* Copy the data segment initializers from flash to SRAM */ movs r1, #0 b LoopCopyDataInit CopyDataInit: ldr r3, =_sidata ldr r3, [r3, r1] str r3, [r0, r1] adds r1, r1, #4 LoopCopyDataInit: ldr r0, =_sdata ldr r3, =_edata adds r2, r0, r1 cmp r2, r3 bcc CopyDataInit ldr r2, =_sbss b LoopFillZerobss /* Zero fill the bss segment. */ FillZerobss: movs r3, #0 str r3, [r2], #4 LoopFillZerobss: ldr r3, = _ebss cmp r2, r3 bcc FillZerobss /* Call the clock system intitialization function.*/ bl SystemInit /* Call static constructors */ bl __libc_init_array /* Call the application's entry point.*/ bl main bx lr .size Reset_Handler, .-Reset_Handler /** * @brief This is the code that gets called when the processor receives an * unexpected interrupt. This simply enters an infinite loop, preserving * the system state for examination by a debugger. * @param None * @retval None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop .size Default_Handler, .-Default_Handler /****************************************************************************** * * The minimal vector table for a Cortex M3. Note that the proper constructs * must be placed on this to ensure that it ends up at physical address * 0x0000.0000. * *******************************************************************************/ .section .isr_vector,"a",%progbits .type g_pfnVectors, %object .size g_pfnVectors, .-g_pfnVectors g_pfnVectors: .word _estack .word Reset_Handler .word NMI_Handler .word HardFault_Handler .word MemManage_Handler .word BusFault_Handler .word UsageFault_Handler .word 0 .word 0 .word 0 .word 0 .word SVC_Handler .word DebugMon_Handler .word 0 .word PendSV_Handler .word SysTick_Handler .word WWDG_IRQHandler .word PVD_IRQHandler .word TAMPER_IRQHandler .word RTC_IRQHandler .word FLASH_IRQHandler .word RCC_IRQHandler .word EXTI0_IRQHandler .word EXTI1_IRQHandler .word EXTI2_IRQHandler .word EXTI3_IRQHandler .word EXTI4_IRQHandler .word DMA1_Channel1_IRQHandler .word DMA1_Channel2_IRQHandler .word DMA1_Channel3_IRQHandler .word DMA1_Channel4_IRQHandler .word DMA1_Channel5_IRQHandler .word DMA1_Channel6_IRQHandler .word DMA1_Channel7_IRQHandler .word ADC1_2_IRQHandler .word USB_HP_CAN1_TX_IRQHandler .word USB_LP_CAN1_RX0_IRQHandler .word CAN1_RX1_IRQHandler .word CAN1_SCE_IRQHandler .word EXTI9_5_IRQHandler .word TIM1_BRK_TIM9_IRQHandler .word TIM1_UP_TIM10_IRQHandler .word TIM1_TRG_COM_TIM11_IRQHandler .word TIM1_CC_IRQHandler .word TIM2_IRQHandler .word TIM3_IRQHandler .word TIM4_IRQHandler .word I2C1_EV_IRQHandler .word I2C1_ER_IRQHandler .word I2C2_EV_IRQHandler .word I2C2_ER_IRQHandler .word SPI1_IRQHandler .word SPI2_IRQHandler .word USART1_IRQHandler .word USART2_IRQHandler .word USART3_IRQHandler .word EXTI15_10_IRQHandler .word RTCAlarm_IRQHandler .word USBWakeUp_IRQHandler .word TIM8_BRK_TIM12_IRQHandler .word TIM8_UP_TIM13_IRQHandler .word TIM8_TRG_COM_TIM14_IRQHandler .word TIM8_CC_IRQHandler .word ADC3_IRQHandler .word FSMC_IRQHandler .word SDIO_IRQHandler .word TIM5_IRQHandler .word SPI3_IRQHandler .word UART4_IRQHandler .word UART5_IRQHandler .word TIM6_IRQHandler .word TIM7_IRQHandler .word DMA2_Channel1_IRQHandler .word DMA2_Channel2_IRQHandler .word DMA2_Channel3_IRQHandler .word DMA2_Channel4_5_IRQHandler .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word BootRAM /* @0x1E0. This is for boot in RAM mode for STM32F10x XL-Density devices. */ /******************************************************************************* * * Provide weak aliases for each Exception handler to the Default_Handler. * As they are weak aliases, any function with the same name will override * this definition. * *******************************************************************************/ .weak NMI_Handler .thumb_set NMI_Handler,Default_Handler .weak HardFault_Handler .thumb_set HardFault_Handler,Default_Handler .weak MemManage_Handler .thumb_set MemManage_Handler,Default_Handler .weak BusFault_Handler .thumb_set BusFault_Handler,Default_Handler .weak UsageFault_Handler .thumb_set UsageFault_Handler,Default_Handler .weak SVC_Handler .thumb_set SVC_Handler,Default_Handler .weak DebugMon_Handler .thumb_set DebugMon_Handler,Default_Handler .weak PendSV_Handler .thumb_set PendSV_Handler,Default_Handler .weak SysTick_Handler .thumb_set SysTick_Handler,Default_Handler .weak WWDG_IRQHandler .thumb_set WWDG_IRQHandler,Default_Handler .weak PVD_IRQHandler .thumb_set PVD_IRQHandler,Default_Handler .weak TAMPER_IRQHandler .thumb_set TAMPER_IRQHandler,Default_Handler .weak RTC_IRQHandler .thumb_set RTC_IRQHandler,Default_Handler .weak FLASH_IRQHandler .thumb_set FLASH_IRQHandler,Default_Handler .weak RCC_IRQHandler .thumb_set RCC_IRQHandler,Default_Handler .weak EXTI0_IRQHandler .thumb_set EXTI0_IRQHandler,Default_Handler .weak EXTI1_IRQHandler .thumb_set EXTI1_IRQHandler,Default_Handler .weak EXTI2_IRQHandler .thumb_set EXTI2_IRQHandler,Default_Handler .weak EXTI3_IRQHandler .thumb_set EXTI3_IRQHandler,Default_Handler .weak EXTI4_IRQHandler .thumb_set EXTI4_IRQHandler,Default_Handler .weak DMA1_Channel1_IRQHandler .thumb_set DMA1_Channel1_IRQHandler,Default_Handler .weak DMA1_Channel2_IRQHandler .thumb_set DMA1_Channel2_IRQHandler,Default_Handler .weak DMA1_Channel3_IRQHandler .thumb_set DMA1_Channel3_IRQHandler,Default_Handler .weak DMA1_Channel4_IRQHandler .thumb_set DMA1_Channel4_IRQHandler,Default_Handler .weak DMA1_Channel5_IRQHandler .thumb_set DMA1_Channel5_IRQHandler,Default_Handler .weak DMA1_Channel6_IRQHandler .thumb_set DMA1_Channel6_IRQHandler,Default_Handler .weak DMA1_Channel7_IRQHandler .thumb_set DMA1_Channel7_IRQHandler,Default_Handler .weak ADC1_2_IRQHandler .thumb_set ADC1_2_IRQHandler,Default_Handler .weak USB_HP_CAN1_TX_IRQHandler .thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler .weak USB_LP_CAN1_RX0_IRQHandler .thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler .weak CAN1_RX1_IRQHandler .thumb_set CAN1_RX1_IRQHandler,Default_Handler .weak CAN1_SCE_IRQHandler .thumb_set CAN1_SCE_IRQHandler,Default_Handler .weak EXTI9_5_IRQHandler .thumb_set EXTI9_5_IRQHandler,Default_Handler .weak TIM1_BRK_TIM9_IRQHandler .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler .weak TIM1_UP_TIM10_IRQHandler .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler .weak TIM1_TRG_COM_TIM11_IRQHandler .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler .weak TIM1_CC_IRQHandler .thumb_set TIM1_CC_IRQHandler,Default_Handler .weak TIM2_IRQHandler .thumb_set TIM2_IRQHandler,Default_Handler .weak TIM3_IRQHandler .thumb_set TIM3_IRQHandler,Default_Handler .weak TIM4_IRQHandler .thumb_set TIM4_IRQHandler,Default_Handler .weak I2C1_EV_IRQHandler .thumb_set I2C1_EV_IRQHandler,Default_Handler .weak I2C1_ER_IRQHandler .thumb_set I2C1_ER_IRQHandler,Default_Handler .weak I2C2_EV_IRQHandler .thumb_set I2C2_EV_IRQHandler,Default_Handler .weak I2C2_ER_IRQHandler .thumb_set I2C2_ER_IRQHandler,Default_Handler .weak SPI1_IRQHandler .thumb_set SPI1_IRQHandler,Default_Handler .weak SPI2_IRQHandler .thumb_set SPI2_IRQHandler,Default_Handler .weak USART1_IRQHandler .thumb_set USART1_IRQHandler,Default_Handler .weak USART2_IRQHandler .thumb_set USART2_IRQHandler,Default_Handler .weak USART3_IRQHandler .thumb_set USART3_IRQHandler,Default_Handler .weak EXTI15_10_IRQHandler .thumb_set EXTI15_10_IRQHandler,Default_Handler .weak RTCAlarm_IRQHandler .thumb_set RTCAlarm_IRQHandler,Default_Handler .weak USBWakeUp_IRQHandler .thumb_set USBWakeUp_IRQHandler,Default_Handler .weak TIM8_BRK_TIM12_IRQHandler .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler .weak TIM8_UP_TIM13_IRQHandler .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler .weak TIM8_TRG_COM_TIM14_IRQHandler .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler .weak TIM8_CC_IRQHandler .thumb_set TIM8_CC_IRQHandler,Default_Handler .weak ADC3_IRQHandler .thumb_set ADC3_IRQHandler,Default_Handler .weak FSMC_IRQHandler .thumb_set FSMC_IRQHandler,Default_Handler .weak SDIO_IRQHandler .thumb_set SDIO_IRQHandler,Default_Handler .weak TIM5_IRQHandler .thumb_set TIM5_IRQHandler,Default_Handler .weak SPI3_IRQHandler .thumb_set SPI3_IRQHandler,Default_Handler .weak UART4_IRQHandler .thumb_set UART4_IRQHandler,Default_Handler .weak UART5_IRQHandler .thumb_set UART5_IRQHandler,Default_Handler .weak TIM6_IRQHandler .thumb_set TIM6_IRQHandler,Default_Handler .weak TIM7_IRQHandler .thumb_set TIM7_IRQHandler,Default_Handler .weak DMA2_Channel1_IRQHandler .thumb_set DMA2_Channel1_IRQHandler,Default_Handler .weak DMA2_Channel2_IRQHandler .thumb_set DMA2_Channel2_IRQHandler,Default_Handler .weak DMA2_Channel3_IRQHandler .thumb_set DMA2_Channel3_IRQHandler,Default_Handler .weak DMA2_Channel4_5_IRQHandler .thumb_set DMA2_Channel4_5_IRQHandler,Default_Handler /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
10-channel-pwm-controller-stm32
trunk/libraries/startup/TrueSTUDIO/startup_stm32f10x_xl.s
Unix Assembly
gpl3
13,252
/** ****************************************************************************** * @file startup_stm32f10x_hd.s * @author MCD Application Team * @version V3.5.0 * @date 11-March-2011 * @brief STM32F10x High Density Devices vector table for Atollic toolchain. * This module performs: * - Set the initial SP * - Set the initial PC == Reset_Handler, * - Set the vector table entries with the exceptions ISR address, * - Configure the clock system * - Configure external SRAM mounted on STM3210E-EVAL board * to be used as data memory (optional, to be enabled by user) * - Branches to main in the C library (which eventually * calls main()). * After Reset the Cortex-M3 processor is in Thread mode, * priority is Privileged, and the Stack is set to Main. ****************************************************************************** * @attention * * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. * * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2> ****************************************************************************** */ .syntax unified .cpu cortex-m3 .fpu softvfp .thumb .global g_pfnVectors .global Default_Handler /* start address for the initialization values of the .data section. defined in linker script */ .word _sidata /* start address for the .data section. defined in linker script */ .word _sdata /* end address for the .data section. defined in linker script */ .word _edata /* start address for the .bss section. defined in linker script */ .word _sbss /* end address for the .bss section. defined in linker script */ .word _ebss .equ BootRAM, 0xF1E0F85F /** * @brief This is the code that gets called when the processor first * starts execution following a reset event. Only the absolutely * necessary set is performed, after which the application * supplied main() routine is called. * @param None * @retval : None */ .section .text.Reset_Handler .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: /* Copy the data segment initializers from flash to SRAM */ movs r1, #0 b LoopCopyDataInit CopyDataInit: ldr r3, =_sidata ldr r3, [r3, r1] str r3, [r0, r1] adds r1, r1, #4 LoopCopyDataInit: ldr r0, =_sdata ldr r3, =_edata adds r2, r0, r1 cmp r2, r3 bcc CopyDataInit ldr r2, =_sbss b LoopFillZerobss /* Zero fill the bss segment. */ FillZerobss: movs r3, #0 str r3, [r2], #4 LoopFillZerobss: ldr r3, = _ebss cmp r2, r3 bcc FillZerobss /* Call the clock system intitialization function.*/ bl SystemInit /* Call static constructors */ bl __libc_init_array /* Call the application's entry point.*/ bl main bx lr .size Reset_Handler, .-Reset_Handler /** * @brief This is the code that gets called when the processor receives an * unexpected interrupt. This simply enters an infinite loop, preserving * the system state for examination by a debugger. * * @param None * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop .size Default_Handler, .-Default_Handler /****************************************************************************** * * The minimal vector table for a Cortex M3. Note that the proper constructs * must be placed on this to ensure that it ends up at physical address * 0x0000.0000. * ******************************************************************************/ .section .isr_vector,"a",%progbits .type g_pfnVectors, %object .size g_pfnVectors, .-g_pfnVectors g_pfnVectors: .word _estack .word Reset_Handler .word NMI_Handler .word HardFault_Handler .word MemManage_Handler .word BusFault_Handler .word UsageFault_Handler .word 0 .word 0 .word 0 .word 0 .word SVC_Handler .word DebugMon_Handler .word 0 .word PendSV_Handler .word SysTick_Handler .word WWDG_IRQHandler .word PVD_IRQHandler .word TAMPER_IRQHandler .word RTC_IRQHandler .word FLASH_IRQHandler .word RCC_IRQHandler .word EXTI0_IRQHandler .word EXTI1_IRQHandler .word EXTI2_IRQHandler .word EXTI3_IRQHandler .word EXTI4_IRQHandler .word DMA1_Channel1_IRQHandler .word DMA1_Channel2_IRQHandler .word DMA1_Channel3_IRQHandler .word DMA1_Channel4_IRQHandler .word DMA1_Channel5_IRQHandler .word DMA1_Channel6_IRQHandler .word DMA1_Channel7_IRQHandler .word ADC1_2_IRQHandler .word USB_HP_CAN1_TX_IRQHandler .word USB_LP_CAN1_RX0_IRQHandler .word CAN1_RX1_IRQHandler .word CAN1_SCE_IRQHandler .word EXTI9_5_IRQHandler .word TIM1_BRK_IRQHandler .word TIM1_UP_IRQHandler .word TIM1_TRG_COM_IRQHandler .word TIM1_CC_IRQHandler .word TIM2_IRQHandler .word TIM3_IRQHandler .word TIM4_IRQHandler .word I2C1_EV_IRQHandler .word I2C1_ER_IRQHandler .word I2C2_EV_IRQHandler .word I2C2_ER_IRQHandler .word SPI1_IRQHandler .word SPI2_IRQHandler .word USART1_IRQHandler .word USART2_IRQHandler .word USART3_IRQHandler .word EXTI15_10_IRQHandler .word RTCAlarm_IRQHandler .word USBWakeUp_IRQHandler .word TIM8_BRK_IRQHandler .word TIM8_UP_IRQHandler .word TIM8_TRG_COM_IRQHandler .word TIM8_CC_IRQHandler .word ADC3_IRQHandler .word FSMC_IRQHandler .word SDIO_IRQHandler .word TIM5_IRQHandler .word SPI3_IRQHandler .word UART4_IRQHandler .word UART5_IRQHandler .word TIM6_IRQHandler .word TIM7_IRQHandler .word DMA2_Channel1_IRQHandler .word DMA2_Channel2_IRQHandler .word DMA2_Channel3_IRQHandler .word DMA2_Channel4_5_IRQHandler .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word BootRAM /* @0x1E0. This is for boot in RAM mode for STM32F10x High Density devices. */ /******************************************************************************* * * Provide weak aliases for each Exception handler to the Default_Handler. * As they are weak aliases, any function with the same name will override * this definition. * *******************************************************************************/ .weak NMI_Handler .thumb_set NMI_Handler,Default_Handler .weak HardFault_Handler .thumb_set HardFault_Handler,Default_Handler .weak MemManage_Handler .thumb_set MemManage_Handler,Default_Handler .weak BusFault_Handler .thumb_set BusFault_Handler,Default_Handler .weak UsageFault_Handler .thumb_set UsageFault_Handler,Default_Handler .weak SVC_Handler .thumb_set SVC_Handler,Default_Handler .weak DebugMon_Handler .thumb_set DebugMon_Handler,Default_Handler .weak PendSV_Handler .thumb_set PendSV_Handler,Default_Handler .weak SysTick_Handler .thumb_set SysTick_Handler,Default_Handler .weak WWDG_IRQHandler .thumb_set WWDG_IRQHandler,Default_Handler .weak PVD_IRQHandler .thumb_set PVD_IRQHandler,Default_Handler .weak TAMPER_IRQHandler .thumb_set TAMPER_IRQHandler,Default_Handler .weak RTC_IRQHandler .thumb_set RTC_IRQHandler,Default_Handler .weak FLASH_IRQHandler .thumb_set FLASH_IRQHandler,Default_Handler .weak RCC_IRQHandler .thumb_set RCC_IRQHandler,Default_Handler .weak EXTI0_IRQHandler .thumb_set EXTI0_IRQHandler,Default_Handler .weak EXTI1_IRQHandler .thumb_set EXTI1_IRQHandler,Default_Handler .weak EXTI2_IRQHandler .thumb_set EXTI2_IRQHandler,Default_Handler .weak EXTI3_IRQHandler .thumb_set EXTI3_IRQHandler,Default_Handler .weak EXTI4_IRQHandler .thumb_set EXTI4_IRQHandler,Default_Handler .weak DMA1_Channel1_IRQHandler .thumb_set DMA1_Channel1_IRQHandler,Default_Handler .weak DMA1_Channel2_IRQHandler .thumb_set DMA1_Channel2_IRQHandler,Default_Handler .weak DMA1_Channel3_IRQHandler .thumb_set DMA1_Channel3_IRQHandler,Default_Handler .weak DMA1_Channel4_IRQHandler .thumb_set DMA1_Channel4_IRQHandler,Default_Handler .weak DMA1_Channel5_IRQHandler .thumb_set DMA1_Channel5_IRQHandler,Default_Handler .weak DMA1_Channel6_IRQHandler .thumb_set DMA1_Channel6_IRQHandler,Default_Handler .weak DMA1_Channel7_IRQHandler .thumb_set DMA1_Channel7_IRQHandler,Default_Handler .weak ADC1_2_IRQHandler .thumb_set ADC1_2_IRQHandler,Default_Handler .weak USB_HP_CAN1_TX_IRQHandler .thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler .weak USB_LP_CAN1_RX0_IRQHandler .thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler .weak CAN1_RX1_IRQHandler .thumb_set CAN1_RX1_IRQHandler,Default_Handler .weak CAN1_SCE_IRQHandler .thumb_set CAN1_SCE_IRQHandler,Default_Handler .weak EXTI9_5_IRQHandler .thumb_set EXTI9_5_IRQHandler,Default_Handler .weak TIM1_BRK_IRQHandler .thumb_set TIM1_BRK_IRQHandler,Default_Handler .weak TIM1_UP_IRQHandler .thumb_set TIM1_UP_IRQHandler,Default_Handler .weak TIM1_TRG_COM_IRQHandler .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler .weak TIM1_CC_IRQHandler .thumb_set TIM1_CC_IRQHandler,Default_Handler .weak TIM2_IRQHandler .thumb_set TIM2_IRQHandler,Default_Handler .weak TIM3_IRQHandler .thumb_set TIM3_IRQHandler,Default_Handler .weak TIM4_IRQHandler .thumb_set TIM4_IRQHandler,Default_Handler .weak I2C1_EV_IRQHandler .thumb_set I2C1_EV_IRQHandler,Default_Handler .weak I2C1_ER_IRQHandler .thumb_set I2C1_ER_IRQHandler,Default_Handler .weak I2C2_EV_IRQHandler .thumb_set I2C2_EV_IRQHandler,Default_Handler .weak I2C2_ER_IRQHandler .thumb_set I2C2_ER_IRQHandler,Default_Handler .weak SPI1_IRQHandler .thumb_set SPI1_IRQHandler,Default_Handler .weak SPI2_IRQHandler .thumb_set SPI2_IRQHandler,Default_Handler .weak USART1_IRQHandler .thumb_set USART1_IRQHandler,Default_Handler .weak USART2_IRQHandler .thumb_set USART2_IRQHandler,Default_Handler .weak USART3_IRQHandler .thumb_set USART3_IRQHandler,Default_Handler .weak EXTI15_10_IRQHandler .thumb_set EXTI15_10_IRQHandler,Default_Handler .weak RTCAlarm_IRQHandler .thumb_set RTCAlarm_IRQHandler,Default_Handler .weak USBWakeUp_IRQHandler .thumb_set USBWakeUp_IRQHandler,Default_Handler .weak TIM8_BRK_IRQHandler .thumb_set TIM8_BRK_IRQHandler,Default_Handler .weak TIM8_UP_IRQHandler .thumb_set TIM8_UP_IRQHandler,Default_Handler .weak TIM8_TRG_COM_IRQHandler .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler .weak TIM8_CC_IRQHandler .thumb_set TIM8_CC_IRQHandler,Default_Handler .weak ADC3_IRQHandler .thumb_set ADC3_IRQHandler,Default_Handler .weak FSMC_IRQHandler .thumb_set FSMC_IRQHandler,Default_Handler .weak SDIO_IRQHandler .thumb_set SDIO_IRQHandler,Default_Handler .weak TIM5_IRQHandler .thumb_set TIM5_IRQHandler,Default_Handler .weak SPI3_IRQHandler .thumb_set SPI3_IRQHandler,Default_Handler .weak UART4_IRQHandler .thumb_set UART4_IRQHandler,Default_Handler .weak UART5_IRQHandler .thumb_set UART5_IRQHandler,Default_Handler .weak TIM6_IRQHandler .thumb_set TIM6_IRQHandler,Default_Handler .weak TIM7_IRQHandler .thumb_set TIM7_IRQHandler,Default_Handler .weak DMA2_Channel1_IRQHandler .thumb_set DMA2_Channel1_IRQHandler,Default_Handler .weak DMA2_Channel2_IRQHandler .thumb_set DMA2_Channel2_IRQHandler,Default_Handler .weak DMA2_Channel3_IRQHandler .thumb_set DMA2_Channel3_IRQHandler,Default_Handler .weak DMA2_Channel4_5_IRQHandler .thumb_set DMA2_Channel4_5_IRQHandler,Default_Handler /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
10-channel-pwm-controller-stm32
trunk/libraries/startup/TrueSTUDIO/startup_stm32f10x_hd.s
Unix Assembly
gpl3
12,592
/** ****************************************************************************** * @file startup_stm32f10x_hd_vl.s * @author MCD Application Team * @version V3.5.0 * @date 11-March-2011 * @brief STM32F10x High Density Value Line Devices vector table for Atollic * toolchain. * This module performs: * - Set the initial SP * - Set the initial PC == Reset_Handler, * - Set the vector table entries with the exceptions ISR address * - Configure the clock system * - Configure external SRAM mounted on STM32100E-EVAL board * to be used as data memory (optional, to be enabled by user) * - Branches to main in the C library (which eventually * calls main()). * After Reset the Cortex-M3 processor is in Thread mode, * priority is Privileged, and the Stack is set to Main. ****************************************************************************** * @attention * * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. * * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2> ****************************************************************************** */ .syntax unified .cpu cortex-m3 .fpu softvfp .thumb .global g_pfnVectors .global Default_Handler /* start address for the initialization values of the .data section. defined in linker script */ .word _sidata /* start address for the .data section. defined in linker script */ .word _sdata /* end address for the .data section. defined in linker script */ .word _edata /* start address for the .bss section. defined in linker script */ .word _sbss /* end address for the .bss section. defined in linker script */ .word _ebss .equ BootRAM, 0xF108F85F /** * @brief This is the code that gets called when the processor first * starts execution following a reset event. Only the absolutely * necessary set is performed, after which the application * supplied main() routine is called. * @param None * @retval : None */ .section .text.Reset_Handler .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: /* Copy the data segment initializers from flash to SRAM */ movs r1, #0 b LoopCopyDataInit CopyDataInit: ldr r3, =_sidata ldr r3, [r3, r1] str r3, [r0, r1] adds r1, r1, #4 LoopCopyDataInit: ldr r0, =_sdata ldr r3, =_edata adds r2, r0, r1 cmp r2, r3 bcc CopyDataInit ldr r2, =_sbss b LoopFillZerobss /* Zero fill the bss segment. */ FillZerobss: movs r3, #0 str r3, [r2], #4 LoopFillZerobss: ldr r3, = _ebss cmp r2, r3 bcc FillZerobss /* Call the clock system intitialization function.*/ bl SystemInit /* Call static constructors */ bl __libc_init_array /* Call the application's entry point.*/ bl main bx lr .size Reset_Handler, .-Reset_Handler /** * @brief This is the code that gets called when the processor receives an * unexpected interrupt. This simply enters an infinite loop, preserving * the system state for examination by a debugger. * * @param None * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop .size Default_Handler, .-Default_Handler /****************************************************************************** * * The minimal vector table for a Cortex M3. Note that the proper constructs * must be placed on this to ensure that it ends up at physical address * 0x0000.0000. * ******************************************************************************/ .section .isr_vector,"a",%progbits .type g_pfnVectors, %object .size g_pfnVectors, .-g_pfnVectors g_pfnVectors: .word _estack .word Reset_Handler .word NMI_Handler .word HardFault_Handler .word MemManage_Handler .word BusFault_Handler .word UsageFault_Handler .word 0 .word 0 .word 0 .word 0 .word SVC_Handler .word DebugMon_Handler .word 0 .word PendSV_Handler .word SysTick_Handler .word WWDG_IRQHandler .word PVD_IRQHandler .word TAMPER_IRQHandler .word RTC_IRQHandler .word FLASH_IRQHandler .word RCC_IRQHandler .word EXTI0_IRQHandler .word EXTI1_IRQHandler .word EXTI2_IRQHandler .word EXTI3_IRQHandler .word EXTI4_IRQHandler .word DMA1_Channel1_IRQHandler .word DMA1_Channel2_IRQHandler .word DMA1_Channel3_IRQHandler .word DMA1_Channel4_IRQHandler .word DMA1_Channel5_IRQHandler .word DMA1_Channel6_IRQHandler .word DMA1_Channel7_IRQHandler .word ADC1_IRQHandler .word 0 .word 0 .word 0 .word 0 .word EXTI9_5_IRQHandler .word TIM1_BRK_TIM15_IRQHandler .word TIM1_UP_TIM16_IRQHandler .word TIM1_TRG_COM_TIM17_IRQHandler .word TIM1_CC_IRQHandler .word TIM2_IRQHandler .word TIM3_IRQHandler .word TIM4_IRQHandler .word I2C1_EV_IRQHandler .word I2C1_ER_IRQHandler .word I2C2_EV_IRQHandler .word I2C2_ER_IRQHandler .word SPI1_IRQHandler .word SPI2_IRQHandler .word USART1_IRQHandler .word USART2_IRQHandler .word USART3_IRQHandler .word EXTI15_10_IRQHandler .word RTCAlarm_IRQHandler .word CEC_IRQHandler .word TIM12_IRQHandler .word TIM13_IRQHandler .word TIM14_IRQHandler .word 0 .word 0 .word 0 .word 0 .word TIM5_IRQHandler .word SPI3_IRQHandler .word UART4_IRQHandler .word UART5_IRQHandler .word TIM6_DAC_IRQHandler .word TIM7_IRQHandler .word DMA2_Channel1_IRQHandler .word DMA2_Channel2_IRQHandler .word DMA2_Channel3_IRQHandler .word DMA2_Channel4_5_IRQHandler .word DMA2_Channel5_IRQHandler .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word BootRAM /* @0x1E0. This is for boot in RAM mode for STM32F10x High Density Value line devices. */ /******************************************************************************* * * Provide weak aliases for each Exception handler to the Default_Handler. * As they are weak aliases, any function with the same name will override * this definition. * *******************************************************************************/ .weak NMI_Handler .thumb_set NMI_Handler,Default_Handler .weak HardFault_Handler .thumb_set HardFault_Handler,Default_Handler .weak MemManage_Handler .thumb_set MemManage_Handler,Default_Handler .weak BusFault_Handler .thumb_set BusFault_Handler,Default_Handler .weak UsageFault_Handler .thumb_set UsageFault_Handler,Default_Handler .weak SVC_Handler .thumb_set SVC_Handler,Default_Handler .weak DebugMon_Handler .thumb_set DebugMon_Handler,Default_Handler .weak PendSV_Handler .thumb_set PendSV_Handler,Default_Handler .weak SysTick_Handler .thumb_set SysTick_Handler,Default_Handler .weak WWDG_IRQHandler .thumb_set WWDG_IRQHandler,Default_Handler .weak PVD_IRQHandler .thumb_set PVD_IRQHandler,Default_Handler .weak TAMPER_IRQHandler .thumb_set TAMPER_IRQHandler,Default_Handler .weak RTC_IRQHandler .thumb_set RTC_IRQHandler,Default_Handler .weak FLASH_IRQHandler .thumb_set FLASH_IRQHandler,Default_Handler .weak RCC_IRQHandler .thumb_set RCC_IRQHandler,Default_Handler .weak EXTI0_IRQHandler .thumb_set EXTI0_IRQHandler,Default_Handler .weak EXTI1_IRQHandler .thumb_set EXTI1_IRQHandler,Default_Handler .weak EXTI2_IRQHandler .thumb_set EXTI2_IRQHandler,Default_Handler .weak EXTI3_IRQHandler .thumb_set EXTI3_IRQHandler,Default_Handler .weak EXTI4_IRQHandler .thumb_set EXTI4_IRQHandler,Default_Handler .weak DMA1_Channel1_IRQHandler .thumb_set DMA1_Channel1_IRQHandler,Default_Handler .weak DMA1_Channel2_IRQHandler .thumb_set DMA1_Channel2_IRQHandler,Default_Handler .weak DMA1_Channel3_IRQHandler .thumb_set DMA1_Channel3_IRQHandler,Default_Handler .weak DMA1_Channel4_IRQHandler .thumb_set DMA1_Channel4_IRQHandler,Default_Handler .weak DMA1_Channel5_IRQHandler .thumb_set DMA1_Channel5_IRQHandler,Default_Handler .weak DMA1_Channel6_IRQHandler .thumb_set DMA1_Channel6_IRQHandler,Default_Handler .weak DMA1_Channel7_IRQHandler .thumb_set DMA1_Channel7_IRQHandler,Default_Handler .weak ADC1_IRQHandler .thumb_set ADC1_IRQHandler,Default_Handler .weak EXTI9_5_IRQHandler .thumb_set EXTI9_5_IRQHandler,Default_Handler .weak TIM1_BRK_TIM15_IRQHandler .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler .weak TIM1_UP_TIM16_IRQHandler .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler .weak TIM1_TRG_COM_TIM17_IRQHandler .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler .weak TIM1_CC_IRQHandler .thumb_set TIM1_CC_IRQHandler,Default_Handler .weak TIM2_IRQHandler .thumb_set TIM2_IRQHandler,Default_Handler .weak TIM3_IRQHandler .thumb_set TIM3_IRQHandler,Default_Handler .weak TIM4_IRQHandler .thumb_set TIM4_IRQHandler,Default_Handler .weak I2C1_EV_IRQHandler .thumb_set I2C1_EV_IRQHandler,Default_Handler .weak I2C1_ER_IRQHandler .thumb_set I2C1_ER_IRQHandler,Default_Handler .weak I2C2_EV_IRQHandler .thumb_set I2C2_EV_IRQHandler,Default_Handler .weak I2C2_ER_IRQHandler .thumb_set I2C2_ER_IRQHandler,Default_Handler .weak SPI1_IRQHandler .thumb_set SPI1_IRQHandler,Default_Handler .weak SPI2_IRQHandler .thumb_set SPI2_IRQHandler,Default_Handler .weak USART1_IRQHandler .thumb_set USART1_IRQHandler,Default_Handler .weak USART2_IRQHandler .thumb_set USART2_IRQHandler,Default_Handler .weak USART3_IRQHandler .thumb_set USART3_IRQHandler,Default_Handler .weak EXTI15_10_IRQHandler .thumb_set EXTI15_10_IRQHandler,Default_Handler .weak RTCAlarm_IRQHandler .thumb_set RTCAlarm_IRQHandler,Default_Handler .weak CEC_IRQHandler .thumb_set CEC_IRQHandler,Default_Handler .weak TIM12_IRQHandler .thumb_set TIM12_IRQHandler,Default_Handler .weak TIM13_IRQHandler .thumb_set TIM13_IRQHandler,Default_Handler .weak TIM14_IRQHandler .thumb_set TIM14_IRQHandler,Default_Handler .weak TIM5_IRQHandler .thumb_set TIM5_IRQHandler,Default_Handler .weak SPI3_IRQHandler .thumb_set SPI3_IRQHandler,Default_Handler .weak UART4_IRQHandler .thumb_set UART4_IRQHandler,Default_Handler .weak UART5_IRQHandler .thumb_set UART5_IRQHandler,Default_Handler .weak TIM6_DAC_IRQHandler .thumb_set TIM6_DAC_IRQHandler,Default_Handler .weak TIM7_IRQHandler .thumb_set TIM7_IRQHandler,Default_Handler .weak DMA2_Channel1_IRQHandler .thumb_set DMA2_Channel1_IRQHandler,Default_Handler .weak DMA2_Channel2_IRQHandler .thumb_set DMA2_Channel2_IRQHandler,Default_Handler .weak DMA2_Channel3_IRQHandler .thumb_set DMA2_Channel3_IRQHandler,Default_Handler .weak DMA2_Channel4_5_IRQHandler .thumb_set DMA2_Channel4_5_IRQHandler,Default_Handler .weak DMA2_Channel5_IRQHandler .thumb_set DMA2_Channel5_IRQHandler,Default_Handler /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
10-channel-pwm-controller-stm32
trunk/libraries/startup/TrueSTUDIO/startup_stm32f10x_hd_vl.s
Unix Assembly
gpl3
12,239
/** ****************************************************************************** * @file startup_stm32f10x_ld.s * @author MCD Application Team * @version V3.5.0 * @date 11-March-2011 * @brief STM32F10x Low Density Devices vector table for Atollic toolchain. * This module performs: * - Set the initial SP * - Set the initial PC == Reset_Handler, * - Set the vector table entries with the exceptions ISR address. * - Configure the clock system * - Branches to main in the C library (which eventually * calls main()). * After Reset the Cortex-M3 processor is in Thread mode, * priority is Privileged, and the Stack is set to Main. ****************************************************************************** * @attention * * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. * * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2> ****************************************************************************** */ .syntax unified .cpu cortex-m3 .fpu softvfp .thumb .global g_pfnVectors .global Default_Handler /* start address for the initialization values of the .data section. defined in linker script */ .word _sidata /* start address for the .data section. defined in linker script */ .word _sdata /* end address for the .data section. defined in linker script */ .word _edata /* start address for the .bss section. defined in linker script */ .word _sbss /* end address for the .bss section. defined in linker script */ .word _ebss .equ BootRAM, 0xF108F85F /** * @brief This is the code that gets called when the processor first * starts execution following a reset event. Only the absolutely * necessary set is performed, after which the application * supplied main() routine is called. * @param None * @retval : None */ .section .text.Reset_Handler .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: /* Copy the data segment initializers from flash to SRAM */ movs r1, #0 b LoopCopyDataInit CopyDataInit: ldr r3, =_sidata ldr r3, [r3, r1] str r3, [r0, r1] adds r1, r1, #4 LoopCopyDataInit: ldr r0, =_sdata ldr r3, =_edata adds r2, r0, r1 cmp r2, r3 bcc CopyDataInit ldr r2, =_sbss b LoopFillZerobss /* Zero fill the bss segment. */ FillZerobss: movs r3, #0 str r3, [r2], #4 LoopFillZerobss: ldr r3, = _ebss cmp r2, r3 bcc FillZerobss /* Call the clock system intitialization function.*/ bl SystemInit /* Call static constructors */ bl __libc_init_array /* Call the application's entry point.*/ bl main bx lr .size Reset_Handler, .-Reset_Handler /** * @brief This is the code that gets called when the processor receives an * unexpected interrupt. This simply enters an infinite loop, preserving * the system state for examination by a debugger. * * @param None * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop .size Default_Handler, .-Default_Handler /****************************************************************************** * * The minimal vector table for a Cortex M3. Note that the proper constructs * must be placed on this to ensure that it ends up at physical address * 0x0000.0000. * ******************************************************************************/ .section .isr_vector,"a",%progbits .type g_pfnVectors, %object .size g_pfnVectors, .-g_pfnVectors g_pfnVectors: .word _estack .word Reset_Handler .word NMI_Handler .word HardFault_Handler .word MemManage_Handler .word BusFault_Handler .word UsageFault_Handler .word 0 .word 0 .word 0 .word 0 .word SVC_Handler .word DebugMon_Handler .word 0 .word PendSV_Handler .word SysTick_Handler .word WWDG_IRQHandler .word PVD_IRQHandler .word TAMPER_IRQHandler .word RTC_IRQHandler .word FLASH_IRQHandler .word RCC_IRQHandler .word EXTI0_IRQHandler .word EXTI1_IRQHandler .word EXTI2_IRQHandler .word EXTI3_IRQHandler .word EXTI4_IRQHandler .word DMA1_Channel1_IRQHandler .word DMA1_Channel2_IRQHandler .word DMA1_Channel3_IRQHandler .word DMA1_Channel4_IRQHandler .word DMA1_Channel5_IRQHandler .word DMA1_Channel6_IRQHandler .word DMA1_Channel7_IRQHandler .word ADC1_2_IRQHandler .word USB_HP_CAN1_TX_IRQHandler .word USB_LP_CAN1_RX0_IRQHandler .word CAN1_RX1_IRQHandler .word CAN1_SCE_IRQHandler .word EXTI9_5_IRQHandler .word TIM1_BRK_IRQHandler .word TIM1_UP_IRQHandler .word TIM1_TRG_COM_IRQHandler .word TIM1_CC_IRQHandler .word TIM2_IRQHandler .word TIM3_IRQHandler .word 0 .word I2C1_EV_IRQHandler .word I2C1_ER_IRQHandler .word 0 .word 0 .word SPI1_IRQHandler .word 0 .word USART1_IRQHandler .word USART2_IRQHandler .word 0 .word EXTI15_10_IRQHandler .word RTCAlarm_IRQHandler .word USBWakeUp_IRQHandler .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word BootRAM /* @0x108. This is for boot in RAM mode for STM32F10x Low Density devices.*/ /******************************************************************************* * * Provide weak aliases for each Exception handler to the Default_Handler. * As they are weak aliases, any function with the same name will override * this definition. * *******************************************************************************/ .weak NMI_Handler .thumb_set NMI_Handler,Default_Handler .weak HardFault_Handler .thumb_set HardFault_Handler,Default_Handler .weak MemManage_Handler .thumb_set MemManage_Handler,Default_Handler .weak BusFault_Handler .thumb_set BusFault_Handler,Default_Handler .weak UsageFault_Handler .thumb_set UsageFault_Handler,Default_Handler .weak SVC_Handler .thumb_set SVC_Handler,Default_Handler .weak DebugMon_Handler .thumb_set DebugMon_Handler,Default_Handler .weak PendSV_Handler .thumb_set PendSV_Handler,Default_Handler .weak SysTick_Handler .thumb_set SysTick_Handler,Default_Handler .weak WWDG_IRQHandler .thumb_set WWDG_IRQHandler,Default_Handler .weak PVD_IRQHandler .thumb_set PVD_IRQHandler,Default_Handler .weak TAMPER_IRQHandler .thumb_set TAMPER_IRQHandler,Default_Handler .weak RTC_IRQHandler .thumb_set RTC_IRQHandler,Default_Handler .weak FLASH_IRQHandler .thumb_set FLASH_IRQHandler,Default_Handler .weak RCC_IRQHandler .thumb_set RCC_IRQHandler,Default_Handler .weak EXTI0_IRQHandler .thumb_set EXTI0_IRQHandler,Default_Handler .weak EXTI1_IRQHandler .thumb_set EXTI1_IRQHandler,Default_Handler .weak EXTI2_IRQHandler .thumb_set EXTI2_IRQHandler,Default_Handler .weak EXTI3_IRQHandler .thumb_set EXTI3_IRQHandler,Default_Handler .weak EXTI4_IRQHandler .thumb_set EXTI4_IRQHandler,Default_Handler .weak DMA1_Channel1_IRQHandler .thumb_set DMA1_Channel1_IRQHandler,Default_Handler .weak DMA1_Channel2_IRQHandler .thumb_set DMA1_Channel2_IRQHandler,Default_Handler .weak DMA1_Channel3_IRQHandler .thumb_set DMA1_Channel3_IRQHandler,Default_Handler .weak DMA1_Channel4_IRQHandler .thumb_set DMA1_Channel4_IRQHandler,Default_Handler .weak DMA1_Channel5_IRQHandler .thumb_set DMA1_Channel5_IRQHandler,Default_Handler .weak DMA1_Channel6_IRQHandler .thumb_set DMA1_Channel6_IRQHandler,Default_Handler .weak DMA1_Channel7_IRQHandler .thumb_set DMA1_Channel7_IRQHandler,Default_Handler .weak ADC1_2_IRQHandler .thumb_set ADC1_2_IRQHandler,Default_Handler .weak USB_HP_CAN1_TX_IRQHandler .thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler .weak USB_LP_CAN1_RX0_IRQHandler .thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler .weak CAN1_RX1_IRQHandler .thumb_set CAN1_RX1_IRQHandler,Default_Handler .weak CAN1_SCE_IRQHandler .thumb_set CAN1_SCE_IRQHandler,Default_Handler .weak EXTI9_5_IRQHandler .thumb_set EXTI9_5_IRQHandler,Default_Handler .weak TIM1_BRK_IRQHandler .thumb_set TIM1_BRK_IRQHandler,Default_Handler .weak TIM1_UP_IRQHandler .thumb_set TIM1_UP_IRQHandler,Default_Handler .weak TIM1_TRG_COM_IRQHandler .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler .weak TIM1_CC_IRQHandler .thumb_set TIM1_CC_IRQHandler,Default_Handler .weak TIM2_IRQHandler .thumb_set TIM2_IRQHandler,Default_Handler .weak TIM3_IRQHandler .thumb_set TIM3_IRQHandler,Default_Handler .weak I2C1_EV_IRQHandler .thumb_set I2C1_EV_IRQHandler,Default_Handler .weak I2C1_ER_IRQHandler .thumb_set I2C1_ER_IRQHandler,Default_Handler .weak SPI1_IRQHandler .thumb_set SPI1_IRQHandler,Default_Handler .weak USART1_IRQHandler .thumb_set USART1_IRQHandler,Default_Handler .weak USART2_IRQHandler .thumb_set USART2_IRQHandler,Default_Handler .weak EXTI15_10_IRQHandler .thumb_set EXTI15_10_IRQHandler,Default_Handler .weak RTCAlarm_IRQHandler .thumb_set RTCAlarm_IRQHandler,Default_Handler .weak USBWakeUp_IRQHandler .thumb_set USBWakeUp_IRQHandler,Default_Handler /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
10-channel-pwm-controller-stm32
trunk/libraries/startup/TrueSTUDIO/startup_stm32f10x_ld.s
Unix Assembly
gpl3
9,826
/** ****************************************************************************** * @file startup_stm32f10x_cl.s * @author MCD Application Team * @version V3.5.0 * @date 11-March-2011 * @brief STM32F10x Connectivity line Devices vector table for Atollic * toolchain. * This module performs: * - Set the initial SP * - Set the initial PC == Reset_Handler, * - Set the vector table entries with the exceptions ISR * address. * - Configure the clock system * - Branches to main in the C library (which eventually * calls main()). * After Reset the Cortex-M3 processor is in Thread mode, * priority is Privileged, and the Stack is set to Main. ****************************************************************************** * @attention * * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. * * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2> ****************************************************************************** */ .syntax unified .cpu cortex-m3 .fpu softvfp .thumb .global g_pfnVectors .global Default_Handler /* start address for the initialization values of the .data section. defined in linker script */ .word _sidata /* start address for the .data section. defined in linker script */ .word _sdata /* end address for the .data section. defined in linker script */ .word _edata /* start address for the .bss section. defined in linker script */ .word _sbss /* end address for the .bss section. defined in linker script */ .word _ebss .equ BootRAM, 0xF1E0F85F /** * @brief This is the code that gets called when the processor first * starts execution following a reset event. Only the absolutely * necessary set is performed, after which the application * supplied main() routine is called. * @param None * @retval : None */ .section .text.Reset_Handler .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: /* Copy the data segment initializers from flash to SRAM */ movs r1, #0 b LoopCopyDataInit CopyDataInit: ldr r3, =_sidata ldr r3, [r3, r1] str r3, [r0, r1] adds r1, r1, #4 LoopCopyDataInit: ldr r0, =_sdata ldr r3, =_edata adds r2, r0, r1 cmp r2, r3 bcc CopyDataInit ldr r2, =_sbss b LoopFillZerobss /* Zero fill the bss segment. */ FillZerobss: movs r3, #0 str r3, [r2], #4 LoopFillZerobss: ldr r3, = _ebss cmp r2, r3 bcc FillZerobss /* Call the clock system intitialization function.*/ bl SystemInit /* Call static constructors */ bl __libc_init_array /* Call the application's entry point.*/ bl main bx lr .size Reset_Handler, .-Reset_Handler /** * @brief This is the code that gets called when the processor receives an * unexpected interrupt. This simply enters an infinite loop, preserving * the system state for examination by a debugger. * * @param None * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop .size Default_Handler, .-Default_Handler /****************************************************************************** * * The minimal vector table for a Cortex M3. Note that the proper constructs * must be placed on this to ensure that it ends up at physical address * 0x0000.0000. * ******************************************************************************/ .section .isr_vector,"a",%progbits .type g_pfnVectors, %object .size g_pfnVectors, .-g_pfnVectors g_pfnVectors: .word _estack .word Reset_Handler .word NMI_Handler .word HardFault_Handler .word MemManage_Handler .word BusFault_Handler .word UsageFault_Handler .word 0 .word 0 .word 0 .word 0 .word SVC_Handler .word DebugMon_Handler .word 0 .word PendSV_Handler .word SysTick_Handler .word WWDG_IRQHandler .word PVD_IRQHandler .word TAMPER_IRQHandler .word RTC_IRQHandler .word FLASH_IRQHandler .word RCC_IRQHandler .word EXTI0_IRQHandler .word EXTI1_IRQHandler .word EXTI2_IRQHandler .word EXTI3_IRQHandler .word EXTI4_IRQHandler .word DMA1_Channel1_IRQHandler .word DMA1_Channel2_IRQHandler .word DMA1_Channel3_IRQHandler .word DMA1_Channel4_IRQHandler .word DMA1_Channel5_IRQHandler .word DMA1_Channel6_IRQHandler .word DMA1_Channel7_IRQHandler .word ADC1_2_IRQHandler .word CAN1_TX_IRQHandler .word CAN1_RX0_IRQHandler .word CAN1_RX1_IRQHandler .word CAN1_SCE_IRQHandler .word EXTI9_5_IRQHandler .word TIM1_BRK_IRQHandler .word TIM1_UP_IRQHandler .word TIM1_TRG_COM_IRQHandler .word TIM1_CC_IRQHandler .word TIM2_IRQHandler .word TIM3_IRQHandler .word TIM4_IRQHandler .word I2C1_EV_IRQHandler .word I2C1_ER_IRQHandler .word I2C2_EV_IRQHandler .word I2C2_ER_IRQHandler .word SPI1_IRQHandler .word SPI2_IRQHandler .word USART1_IRQHandler .word USART2_IRQHandler .word USART3_IRQHandler .word EXTI15_10_IRQHandler .word RTCAlarm_IRQHandler .word OTG_FS_WKUP_IRQHandler .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word TIM5_IRQHandler .word SPI3_IRQHandler .word UART4_IRQHandler .word UART5_IRQHandler .word TIM6_IRQHandler .word TIM7_IRQHandler .word DMA2_Channel1_IRQHandler .word DMA2_Channel2_IRQHandler .word DMA2_Channel3_IRQHandler .word DMA2_Channel4_IRQHandler .word DMA2_Channel5_IRQHandler .word ETH_IRQHandler .word ETH_WKUP_IRQHandler .word CAN2_TX_IRQHandler .word CAN2_RX0_IRQHandler .word CAN2_RX1_IRQHandler .word CAN2_SCE_IRQHandler .word OTG_FS_IRQHandler .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word BootRAM /* @0x1E0. This is for boot in RAM mode for STM32F10x Connectivity line Devices. */ /******************************************************************************* * * Provide weak aliases for each Exception handler to the Default_Handler. * As they are weak aliases, any function with the same name will override * this definition. * *******************************************************************************/ .weak NMI_Handler .thumb_set NMI_Handler,Default_Handler .weak HardFault_Handler .thumb_set HardFault_Handler,Default_Handler .weak MemManage_Handler .thumb_set MemManage_Handler,Default_Handler .weak BusFault_Handler .thumb_set BusFault_Handler,Default_Handler .weak UsageFault_Handler .thumb_set UsageFault_Handler,Default_Handler .weak SVC_Handler .thumb_set SVC_Handler,Default_Handler .weak DebugMon_Handler .thumb_set DebugMon_Handler,Default_Handler .weak PendSV_Handler .thumb_set PendSV_Handler,Default_Handler .weak SysTick_Handler .thumb_set SysTick_Handler,Default_Handler .weak WWDG_IRQHandler .thumb_set WWDG_IRQHandler,Default_Handler .weak PVD_IRQHandler .thumb_set PVD_IRQHandler,Default_Handler .weak TAMPER_IRQHandler .thumb_set TAMPER_IRQHandler,Default_Handler .weak RTC_IRQHandler .thumb_set RTC_IRQHandler,Default_Handler .weak FLASH_IRQHandler .thumb_set FLASH_IRQHandler,Default_Handler .weak RCC_IRQHandler .thumb_set RCC_IRQHandler,Default_Handler .weak EXTI0_IRQHandler .thumb_set EXTI0_IRQHandler,Default_Handler .weak EXTI1_IRQHandler .thumb_set EXTI1_IRQHandler,Default_Handler .weak EXTI2_IRQHandler .thumb_set EXTI2_IRQHandler,Default_Handler .weak EXTI3_IRQHandler .thumb_set EXTI3_IRQHandler,Default_Handler .weak EXTI4_IRQHandler .thumb_set EXTI4_IRQHandler,Default_Handler .weak DMA1_Channel1_IRQHandler .thumb_set DMA1_Channel1_IRQHandler,Default_Handler .weak DMA1_Channel2_IRQHandler .thumb_set DMA1_Channel2_IRQHandler,Default_Handler .weak DMA1_Channel3_IRQHandler .thumb_set DMA1_Channel3_IRQHandler,Default_Handler .weak DMA1_Channel4_IRQHandler .thumb_set DMA1_Channel4_IRQHandler,Default_Handler .weak DMA1_Channel5_IRQHandler .thumb_set DMA1_Channel5_IRQHandler,Default_Handler .weak DMA1_Channel6_IRQHandler .thumb_set DMA1_Channel6_IRQHandler,Default_Handler .weak DMA1_Channel7_IRQHandler .thumb_set DMA1_Channel7_IRQHandler,Default_Handler .weak ADC1_2_IRQHandler .thumb_set ADC1_2_IRQHandler,Default_Handler .weak CAN1_TX_IRQHandler .thumb_set CAN1_TX_IRQHandler,Default_Handler .weak CAN1_RX0_IRQHandler .thumb_set CAN1_RX0_IRQHandler,Default_Handler .weak CAN1_RX1_IRQHandler .thumb_set CAN1_RX1_IRQHandler,Default_Handler .weak CAN1_SCE_IRQHandler .thumb_set CAN1_SCE_IRQHandler,Default_Handler .weak EXTI9_5_IRQHandler .thumb_set EXTI9_5_IRQHandler,Default_Handler .weak TIM1_BRK_IRQHandler .thumb_set TIM1_BRK_IRQHandler,Default_Handler .weak TIM1_UP_IRQHandler .thumb_set TIM1_UP_IRQHandler,Default_Handler .weak TIM1_TRG_COM_IRQHandler .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler .weak TIM1_CC_IRQHandler .thumb_set TIM1_CC_IRQHandler,Default_Handler .weak TIM2_IRQHandler .thumb_set TIM2_IRQHandler,Default_Handler .weak TIM3_IRQHandler .thumb_set TIM3_IRQHandler,Default_Handler .weak TIM4_IRQHandler .thumb_set TIM4_IRQHandler,Default_Handler .weak I2C1_EV_IRQHandler .thumb_set I2C1_EV_IRQHandler,Default_Handler .weak I2C1_ER_IRQHandler .thumb_set I2C1_ER_IRQHandler,Default_Handler .weak I2C2_EV_IRQHandler .thumb_set I2C2_EV_IRQHandler,Default_Handler .weak I2C2_ER_IRQHandler .thumb_set I2C2_ER_IRQHandler,Default_Handler .weak SPI1_IRQHandler .thumb_set SPI1_IRQHandler,Default_Handler .weak SPI2_IRQHandler .thumb_set SPI2_IRQHandler,Default_Handler .weak USART1_IRQHandler .thumb_set USART1_IRQHandler,Default_Handler .weak USART2_IRQHandler .thumb_set USART2_IRQHandler,Default_Handler .weak USART3_IRQHandler .thumb_set USART3_IRQHandler,Default_Handler .weak EXTI15_10_IRQHandler .thumb_set EXTI15_10_IRQHandler,Default_Handler .weak RTCAlarm_IRQHandler .thumb_set RTCAlarm_IRQHandler,Default_Handler .weak OTG_FS_WKUP_IRQHandler .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler .weak TIM5_IRQHandler .thumb_set TIM5_IRQHandler,Default_Handler .weak SPI3_IRQHandler .thumb_set SPI3_IRQHandler,Default_Handler .weak UART4_IRQHandler .thumb_set UART4_IRQHandler,Default_Handler .weak UART5_IRQHandler .thumb_set UART5_IRQHandler,Default_Handler .weak TIM6_IRQHandler .thumb_set TIM6_IRQHandler,Default_Handler .weak TIM7_IRQHandler .thumb_set TIM7_IRQHandler,Default_Handler .weak DMA2_Channel1_IRQHandler .thumb_set DMA2_Channel1_IRQHandler,Default_Handler .weak DMA2_Channel2_IRQHandler .thumb_set DMA2_Channel2_IRQHandler,Default_Handler .weak DMA2_Channel3_IRQHandler .thumb_set DMA2_Channel3_IRQHandler,Default_Handler .weak DMA2_Channel4_IRQHandler .thumb_set DMA2_Channel4_IRQHandler,Default_Handler .weak DMA2_Channel5_IRQHandler .thumb_set DMA2_Channel5_IRQHandler,Default_Handler .weak ETH_IRQHandler .thumb_set ETH_IRQHandler,Default_Handler .weak ETH_WKUP_IRQHandler .thumb_set ETH_WKUP_IRQHandler,Default_Handler .weak CAN2_TX_IRQHandler .thumb_set CAN2_TX_IRQHandler,Default_Handler .weak CAN2_RX0_IRQHandler .thumb_set CAN2_RX0_IRQHandler,Default_Handler .weak CAN2_RX1_IRQHandler .thumb_set CAN2_RX1_IRQHandler,Default_Handler .weak CAN2_SCE_IRQHandler .thumb_set CAN2_SCE_IRQHandler,Default_Handler .weak OTG_FS_IRQHandler .thumb_set OTG_FS_IRQHandler ,Default_Handler /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
10-channel-pwm-controller-stm32
trunk/libraries/startup/TrueSTUDIO/startup_stm32f10x_cl.s
Unix Assembly
gpl3
12,604
/** ****************************************************************************** * @file startup_stm32f10x_ld_vl.s * @author MCD Application Team * @version V3.5.0 * @date 11-March-2011 * @brief STM32F10x Low Density Value Line Devices vector table for Atollic toolchain. * This module performs: * - Set the initial SP * - Set the initial PC == Reset_Handler, * - Set the vector table entries with the exceptions ISR address * - Configure the clock system * - Branches to main in the C library (which eventually * calls main()). * After Reset the Cortex-M3 processor is in Thread mode, * priority is Privileged, and the Stack is set to Main. ****************************************************************************** * @attention * * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. * * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2> ****************************************************************************** */ .syntax unified .cpu cortex-m3 .fpu softvfp .thumb .global g_pfnVectors .global Default_Handler /* start address for the initialization values of the .data section. defined in linker script */ .word _sidata /* start address for the .data section. defined in linker script */ .word _sdata /* end address for the .data section. defined in linker script */ .word _edata /* start address for the .bss section. defined in linker script */ .word _sbss /* end address for the .bss section. defined in linker script */ .word _ebss .equ BootRAM, 0xF108F85F /** * @brief This is the code that gets called when the processor first * starts execution following a reset event. Only the absolutely * necessary set is performed, after which the application * supplied main() routine is called. * @param None * @retval : None */ .section .text.Reset_Handler .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: /* Copy the data segment initializers from flash to SRAM */ movs r1, #0 b LoopCopyDataInit CopyDataInit: ldr r3, =_sidata ldr r3, [r3, r1] str r3, [r0, r1] adds r1, r1, #4 LoopCopyDataInit: ldr r0, =_sdata ldr r3, =_edata adds r2, r0, r1 cmp r2, r3 bcc CopyDataInit ldr r2, =_sbss b LoopFillZerobss /* Zero fill the bss segment. */ FillZerobss: movs r3, #0 str r3, [r2], #4 LoopFillZerobss: ldr r3, = _ebss cmp r2, r3 bcc FillZerobss /* Call the clock system intitialization function.*/ bl SystemInit /* Call static constructors */ bl __libc_init_array /* Call the application's entry point.*/ bl main bx lr .size Reset_Handler, .-Reset_Handler /** * @brief This is the code that gets called when the processor receives an * unexpected interrupt. This simply enters an infinite loop, preserving * the system state for examination by a debugger. * * @param None * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop .size Default_Handler, .-Default_Handler /****************************************************************************** * * The minimal vector table for a Cortex M3. Note that the proper constructs * must be placed on this to ensure that it ends up at physical address * 0x0000.0000. * ******************************************************************************/ .section .isr_vector,"a",%progbits .type g_pfnVectors, %object .size g_pfnVectors, .-g_pfnVectors g_pfnVectors: .word _estack .word Reset_Handler .word NMI_Handler .word HardFault_Handler .word MemManage_Handler .word BusFault_Handler .word UsageFault_Handler .word 0 .word 0 .word 0 .word 0 .word SVC_Handler .word DebugMon_Handler .word 0 .word PendSV_Handler .word SysTick_Handler .word WWDG_IRQHandler .word PVD_IRQHandler .word TAMPER_IRQHandler .word RTC_IRQHandler .word FLASH_IRQHandler .word RCC_IRQHandler .word EXTI0_IRQHandler .word EXTI1_IRQHandler .word EXTI2_IRQHandler .word EXTI3_IRQHandler .word EXTI4_IRQHandler .word DMA1_Channel1_IRQHandler .word DMA1_Channel2_IRQHandler .word DMA1_Channel3_IRQHandler .word DMA1_Channel4_IRQHandler .word DMA1_Channel5_IRQHandler .word DMA1_Channel6_IRQHandler .word DMA1_Channel7_IRQHandler .word ADC1_IRQHandler .word 0 .word 0 .word 0 .word 0 .word EXTI9_5_IRQHandler .word TIM1_BRK_TIM15_IRQHandler .word TIM1_UP_TIM16_IRQHandler .word TIM1_TRG_COM_TIM17_IRQHandler .word TIM1_CC_IRQHandler .word TIM2_IRQHandler .word TIM3_IRQHandler .word 0 .word I2C1_EV_IRQHandler .word I2C1_ER_IRQHandler .word 0 .word 0 .word SPI1_IRQHandler .word 0 .word USART1_IRQHandler .word USART2_IRQHandler .word 0 .word EXTI15_10_IRQHandler .word RTCAlarm_IRQHandler .word CEC_IRQHandler .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word TIM6_DAC_IRQHandler .word TIM7_IRQHandler .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word BootRAM /* @0x01CC. This is for boot in RAM mode for STM32F10x Medium Value Line Density devices. */ /******************************************************************************* * * Provide weak aliases for each Exception handler to the Default_Handler. * As they are weak aliases, any function with the same name will override * this definition. * *******************************************************************************/ .weak NMI_Handler .thumb_set NMI_Handler,Default_Handler .weak HardFault_Handler .thumb_set HardFault_Handler,Default_Handler .weak MemManage_Handler .thumb_set MemManage_Handler,Default_Handler .weak BusFault_Handler .thumb_set BusFault_Handler,Default_Handler .weak UsageFault_Handler .thumb_set UsageFault_Handler,Default_Handler .weak SVC_Handler .thumb_set SVC_Handler,Default_Handler .weak DebugMon_Handler .thumb_set DebugMon_Handler,Default_Handler .weak PendSV_Handler .thumb_set PendSV_Handler,Default_Handler .weak SysTick_Handler .thumb_set SysTick_Handler,Default_Handler .weak WWDG_IRQHandler .thumb_set WWDG_IRQHandler,Default_Handler .weak PVD_IRQHandler .thumb_set PVD_IRQHandler,Default_Handler .weak TAMPER_IRQHandler .thumb_set TAMPER_IRQHandler,Default_Handler .weak RTC_IRQHandler .thumb_set RTC_IRQHandler,Default_Handler .weak FLASH_IRQHandler .thumb_set FLASH_IRQHandler,Default_Handler .weak RCC_IRQHandler .thumb_set RCC_IRQHandler,Default_Handler .weak EXTI0_IRQHandler .thumb_set EXTI0_IRQHandler,Default_Handler .weak EXTI1_IRQHandler .thumb_set EXTI1_IRQHandler,Default_Handler .weak EXTI2_IRQHandler .thumb_set EXTI2_IRQHandler,Default_Handler .weak EXTI3_IRQHandler .thumb_set EXTI3_IRQHandler,Default_Handler .weak EXTI4_IRQHandler .thumb_set EXTI4_IRQHandler,Default_Handler .weak DMA1_Channel1_IRQHandler .thumb_set DMA1_Channel1_IRQHandler,Default_Handler .weak DMA1_Channel2_IRQHandler .thumb_set DMA1_Channel2_IRQHandler,Default_Handler .weak DMA1_Channel3_IRQHandler .thumb_set DMA1_Channel3_IRQHandler,Default_Handler .weak DMA1_Channel4_IRQHandler .thumb_set DMA1_Channel4_IRQHandler,Default_Handler .weak DMA1_Channel5_IRQHandler .thumb_set DMA1_Channel5_IRQHandler,Default_Handler .weak DMA1_Channel6_IRQHandler .thumb_set DMA1_Channel6_IRQHandler,Default_Handler .weak DMA1_Channel7_IRQHandler .thumb_set DMA1_Channel7_IRQHandler,Default_Handler .weak ADC1_IRQHandler .thumb_set ADC1_IRQHandler,Default_Handler .weak EXTI9_5_IRQHandler .thumb_set EXTI9_5_IRQHandler,Default_Handler .weak TIM1_BRK_TIM15_IRQHandler .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler .weak TIM1_UP_TIM16_IRQHandler .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler .weak TIM1_TRG_COM_TIM17_IRQHandler .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler .weak TIM1_CC_IRQHandler .thumb_set TIM1_CC_IRQHandler,Default_Handler .weak TIM2_IRQHandler .thumb_set TIM2_IRQHandler,Default_Handler .weak TIM3_IRQHandler .thumb_set TIM3_IRQHandler,Default_Handler .weak I2C1_EV_IRQHandler .thumb_set I2C1_EV_IRQHandler,Default_Handler .weak I2C1_ER_IRQHandler .thumb_set I2C1_ER_IRQHandler,Default_Handler .weak SPI1_IRQHandler .thumb_set SPI1_IRQHandler,Default_Handler .weak USART1_IRQHandler .thumb_set USART1_IRQHandler,Default_Handler .weak USART2_IRQHandler .thumb_set USART2_IRQHandler,Default_Handler .weak EXTI15_10_IRQHandler .thumb_set EXTI15_10_IRQHandler,Default_Handler .weak RTCAlarm_IRQHandler .thumb_set RTCAlarm_IRQHandler,Default_Handler .weak CEC_IRQHandler .thumb_set CEC_IRQHandler,Default_Handler .weak TIM6_DAC_IRQHandler .thumb_set TIM6_DAC_IRQHandler,Default_Handler .weak TIM7_IRQHandler .thumb_set TIM7_IRQHandler,Default_Handler /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
10-channel-pwm-controller-stm32
trunk/libraries/startup/TrueSTUDIO/startup_stm32f10x_ld_vl.s
Unix Assembly
gpl3
10,275
/** ****************************************************************************** * @file startup_stm32f10x_md_vl.s * @author MCD Application Team * @version V3.5.0 * @date 11-March-2011 * @brief STM32F10x Medium Density Value Line Devices vector table for Atollic * toolchain. * This module performs: * - Set the initial SP * - Set the initial PC == Reset_Handler, * - Set the vector table entries with the exceptions ISR address * - Configure the clock system * - Branches to main in the C library (which eventually * calls main()). * After Reset the Cortex-M3 processor is in Thread mode, * priority is Privileged, and the Stack is set to Main. ****************************************************************************** * @attention * * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. * * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2> ****************************************************************************** */ .syntax unified .cpu cortex-m3 .fpu softvfp .thumb .global g_pfnVectors .global Default_Handler /* start address for the initialization values of the .data section. defined in linker script */ .word _sidata /* start address for the .data section. defined in linker script */ .word _sdata /* end address for the .data section. defined in linker script */ .word _edata /* start address for the .bss section. defined in linker script */ .word _sbss /* end address for the .bss section. defined in linker script */ .word _ebss .equ BootRAM, 0xF108F85F /** * @brief This is the code that gets called when the processor first * starts execution following a reset event. Only the absolutely * necessary set is performed, after which the application * supplied main() routine is called. * @param None * @retval : None */ .section .text.Reset_Handler .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: /* Copy the data segment initializers from flash to SRAM */ movs r1, #0 b LoopCopyDataInit CopyDataInit: ldr r3, =_sidata ldr r3, [r3, r1] str r3, [r0, r1] adds r1, r1, #4 LoopCopyDataInit: ldr r0, =_sdata ldr r3, =_edata adds r2, r0, r1 cmp r2, r3 bcc CopyDataInit ldr r2, =_sbss b LoopFillZerobss /* Zero fill the bss segment. */ FillZerobss: movs r3, #0 str r3, [r2], #4 LoopFillZerobss: ldr r3, = _ebss cmp r2, r3 bcc FillZerobss /* Call the clock system intitialization function.*/ bl SystemInit /* Call static constructors */ bl __libc_init_array /* Call the application's entry point.*/ bl main bx lr .size Reset_Handler, .-Reset_Handler /** * @brief This is the code that gets called when the processor receives an * unexpected interrupt. This simply enters an infinite loop, preserving * the system state for examination by a debugger. * * @param None * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop .size Default_Handler, .-Default_Handler /****************************************************************************** * * The minimal vector table for a Cortex M3. Note that the proper constructs * must be placed on this to ensure that it ends up at physical address * 0x0000.0000. * ******************************************************************************/ .section .isr_vector,"a",%progbits .type g_pfnVectors, %object .size g_pfnVectors, .-g_pfnVectors g_pfnVectors: .word _estack .word Reset_Handler .word NMI_Handler .word HardFault_Handler .word MemManage_Handler .word BusFault_Handler .word UsageFault_Handler .word 0 .word 0 .word 0 .word 0 .word SVC_Handler .word DebugMon_Handler .word 0 .word PendSV_Handler .word SysTick_Handler .word WWDG_IRQHandler .word PVD_IRQHandler .word TAMPER_IRQHandler .word RTC_IRQHandler .word FLASH_IRQHandler .word RCC_IRQHandler .word EXTI0_IRQHandler .word EXTI1_IRQHandler .word EXTI2_IRQHandler .word EXTI3_IRQHandler .word EXTI4_IRQHandler .word DMA1_Channel1_IRQHandler .word DMA1_Channel2_IRQHandler .word DMA1_Channel3_IRQHandler .word DMA1_Channel4_IRQHandler .word DMA1_Channel5_IRQHandler .word DMA1_Channel6_IRQHandler .word DMA1_Channel7_IRQHandler .word ADC1_IRQHandler .word 0 .word 0 .word 0 .word 0 .word EXTI9_5_IRQHandler .word TIM1_BRK_TIM15_IRQHandler .word TIM1_UP_TIM16_IRQHandler .word TIM1_TRG_COM_TIM17_IRQHandler .word TIM1_CC_IRQHandler .word TIM2_IRQHandler .word TIM3_IRQHandler .word TIM4_IRQHandler .word I2C1_EV_IRQHandler .word I2C1_ER_IRQHandler .word I2C2_EV_IRQHandler .word I2C2_ER_IRQHandler .word SPI1_IRQHandler .word SPI2_IRQHandler .word USART1_IRQHandler .word USART2_IRQHandler .word USART3_IRQHandler .word EXTI15_10_IRQHandler .word RTCAlarm_IRQHandler .word CEC_IRQHandler .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word TIM6_DAC_IRQHandler .word TIM7_IRQHandler .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word 0 .word BootRAM /* @0x01CC. This is for boot in RAM mode for STM32F10x Medium Value Line Density devices. */ /******************************************************************************* * * Provide weak aliases for each Exception handler to the Default_Handler. * As they are weak aliases, any function with the same name will override * this definition. * *******************************************************************************/ .weak NMI_Handler .thumb_set NMI_Handler,Default_Handler .weak HardFault_Handler .thumb_set HardFault_Handler,Default_Handler .weak MemManage_Handler .thumb_set MemManage_Handler,Default_Handler .weak BusFault_Handler .thumb_set BusFault_Handler,Default_Handler .weak UsageFault_Handler .thumb_set UsageFault_Handler,Default_Handler .weak SVC_Handler .thumb_set SVC_Handler,Default_Handler .weak DebugMon_Handler .thumb_set DebugMon_Handler,Default_Handler .weak PendSV_Handler .thumb_set PendSV_Handler,Default_Handler .weak SysTick_Handler .thumb_set SysTick_Handler,Default_Handler .weak WWDG_IRQHandler .thumb_set WWDG_IRQHandler,Default_Handler .weak PVD_IRQHandler .thumb_set PVD_IRQHandler,Default_Handler .weak TAMPER_IRQHandler .thumb_set TAMPER_IRQHandler,Default_Handler .weak RTC_IRQHandler .thumb_set RTC_IRQHandler,Default_Handler .weak FLASH_IRQHandler .thumb_set FLASH_IRQHandler,Default_Handler .weak RCC_IRQHandler .thumb_set RCC_IRQHandler,Default_Handler .weak EXTI0_IRQHandler .thumb_set EXTI0_IRQHandler,Default_Handler .weak EXTI1_IRQHandler .thumb_set EXTI1_IRQHandler,Default_Handler .weak EXTI2_IRQHandler .thumb_set EXTI2_IRQHandler,Default_Handler .weak EXTI3_IRQHandler .thumb_set EXTI3_IRQHandler,Default_Handler .weak EXTI4_IRQHandler .thumb_set EXTI4_IRQHandler,Default_Handler .weak DMA1_Channel1_IRQHandler .thumb_set DMA1_Channel1_IRQHandler,Default_Handler .weak DMA1_Channel2_IRQHandler .thumb_set DMA1_Channel2_IRQHandler,Default_Handler .weak DMA1_Channel3_IRQHandler .thumb_set DMA1_Channel3_IRQHandler,Default_Handler .weak DMA1_Channel4_IRQHandler .thumb_set DMA1_Channel4_IRQHandler,Default_Handler .weak DMA1_Channel5_IRQHandler .thumb_set DMA1_Channel5_IRQHandler,Default_Handler .weak DMA1_Channel6_IRQHandler .thumb_set DMA1_Channel6_IRQHandler,Default_Handler .weak DMA1_Channel7_IRQHandler .thumb_set DMA1_Channel7_IRQHandler,Default_Handler .weak ADC1_IRQHandler .thumb_set ADC1_IRQHandler,Default_Handler .weak EXTI9_5_IRQHandler .thumb_set EXTI9_5_IRQHandler,Default_Handler .weak TIM1_BRK_TIM15_IRQHandler .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler .weak TIM1_UP_TIM16_IRQHandler .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler .weak TIM1_TRG_COM_TIM17_IRQHandler .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler .weak TIM1_CC_IRQHandler .thumb_set TIM1_CC_IRQHandler,Default_Handler .weak TIM2_IRQHandler .thumb_set TIM2_IRQHandler,Default_Handler .weak TIM3_IRQHandler .thumb_set TIM3_IRQHandler,Default_Handler .weak TIM4_IRQHandler .thumb_set TIM4_IRQHandler,Default_Handler .weak I2C1_EV_IRQHandler .thumb_set I2C1_EV_IRQHandler,Default_Handler .weak I2C1_ER_IRQHandler .thumb_set I2C1_ER_IRQHandler,Default_Handler .weak I2C2_EV_IRQHandler .thumb_set I2C2_EV_IRQHandler,Default_Handler .weak I2C2_ER_IRQHandler .thumb_set I2C2_ER_IRQHandler,Default_Handler .weak SPI1_IRQHandler .thumb_set SPI1_IRQHandler,Default_Handler .weak SPI2_IRQHandler .thumb_set SPI2_IRQHandler,Default_Handler .weak USART1_IRQHandler .thumb_set USART1_IRQHandler,Default_Handler .weak USART2_IRQHandler .thumb_set USART2_IRQHandler,Default_Handler .weak USART3_IRQHandler .thumb_set USART3_IRQHandler,Default_Handler .weak EXTI15_10_IRQHandler .thumb_set EXTI15_10_IRQHandler,Default_Handler .weak RTCAlarm_IRQHandler .thumb_set RTCAlarm_IRQHandler,Default_Handler .weak CEC_IRQHandler .thumb_set CEC_IRQHandler,Default_Handler .weak TIM6_DAC_IRQHandler .thumb_set TIM6_DAC_IRQHandler,Default_Handler .weak TIM7_IRQHandler .thumb_set TIM7_IRQHandler,Default_Handler /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
10-channel-pwm-controller-stm32
trunk/libraries/startup/TrueSTUDIO/startup_stm32f10x_md_vl.s
Unix Assembly
gpl3
10,757
;******************** (C) COPYRIGHT 2011 STMicroelectronics ******************** ;* File Name : startup_stm32f10x_md.s ;* Author : MCD Application Team ;* Version : V3.5.0 ;* Date : 11-March-2011 ;* Description : STM32F10x Medium Density Devices vector table for ;* EWARM toolchain. ;* This module performs: ;* - Set the initial SP ;* - Configure the clock system ;* - Set the initial PC == __iar_program_start, ;* - Set the vector table entries with the exceptions ISR ;* address. ;* After Reset the Cortex-M3 processor is in Thread mode, ;* priority is Privileged, and the Stack is set to Main. ;******************************************************************************** ;* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS ;* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. ;* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, ;* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE ;* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING ;* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. ;******************************************************************************* ; ; ; The modules in this file are included in the libraries, and may be replaced ; by any user-defined modules that define the PUBLIC symbol _program_start or ; a user defined start symbol. ; To override the cstartup defined in the library, simply add your modified ; version to the workbench project. ; ; The vector table is normally located at address 0. ; When debugging in RAM, it can be located in RAM, aligned to at least 2^6. ; The name "__vector_table" has special meaning for C-SPY: ; it is where the SP start value is found, and the NVIC vector ; table register (VTOR) is initialized to this address if != 0. ; ; Cortex-M version ; MODULE ?cstartup ;; Forward declaration of sections. SECTION CSTACK:DATA:NOROOT(3) SECTION .intvec:CODE:NOROOT(2) EXTERN __iar_program_start EXTERN SystemInit PUBLIC __vector_table DATA __vector_table DCD sfe(CSTACK) DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD WWDG_IRQHandler ; Window Watchdog DCD PVD_IRQHandler ; PVD through EXTI Line detect DCD TAMPER_IRQHandler ; Tamper DCD RTC_IRQHandler ; RTC DCD FLASH_IRQHandler ; Flash DCD RCC_IRQHandler ; RCC DCD EXTI0_IRQHandler ; EXTI Line 0 DCD EXTI1_IRQHandler ; EXTI Line 1 DCD EXTI2_IRQHandler ; EXTI Line 2 DCD EXTI3_IRQHandler ; EXTI Line 3 DCD EXTI4_IRQHandler ; EXTI Line 4 DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 DCD ADC1_2_IRQHandler ; ADC1 & ADC2 DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0 DCD CAN1_RX1_IRQHandler ; CAN1 RX1 DCD CAN1_SCE_IRQHandler ; CAN1 SCE DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 DCD TIM1_BRK_IRQHandler ; TIM1 Break DCD TIM1_UP_IRQHandler ; TIM1 Update DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare DCD TIM2_IRQHandler ; TIM2 DCD TIM3_IRQHandler ; TIM3 DCD TIM4_IRQHandler ; TIM4 DCD I2C1_EV_IRQHandler ; I2C1 Event DCD I2C1_ER_IRQHandler ; I2C1 Error DCD I2C2_EV_IRQHandler ; I2C2 Event DCD I2C2_ER_IRQHandler ; I2C2 Error DCD SPI1_IRQHandler ; SPI1 DCD SPI2_IRQHandler ; SPI2 DCD USART1_IRQHandler ; USART1 DCD USART2_IRQHandler ; USART2 DCD USART3_IRQHandler ; USART3 DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; ;; Default interrupt handlers. ;; THUMB PUBWEAK Reset_Handler SECTION .text:CODE:REORDER(2) Reset_Handler LDR R0, =SystemInit BLX R0 LDR R0, =__iar_program_start BX R0 PUBWEAK NMI_Handler SECTION .text:CODE:REORDER(1) NMI_Handler B NMI_Handler PUBWEAK HardFault_Handler SECTION .text:CODE:REORDER(1) HardFault_Handler B HardFault_Handler PUBWEAK MemManage_Handler SECTION .text:CODE:REORDER(1) MemManage_Handler B MemManage_Handler PUBWEAK BusFault_Handler SECTION .text:CODE:REORDER(1) BusFault_Handler B BusFault_Handler PUBWEAK UsageFault_Handler SECTION .text:CODE:REORDER(1) UsageFault_Handler B UsageFault_Handler PUBWEAK SVC_Handler SECTION .text:CODE:REORDER(1) SVC_Handler B SVC_Handler PUBWEAK DebugMon_Handler SECTION .text:CODE:REORDER(1) DebugMon_Handler B DebugMon_Handler PUBWEAK PendSV_Handler SECTION .text:CODE:REORDER(1) PendSV_Handler B PendSV_Handler PUBWEAK SysTick_Handler SECTION .text:CODE:REORDER(1) SysTick_Handler B SysTick_Handler PUBWEAK WWDG_IRQHandler SECTION .text:CODE:REORDER(1) WWDG_IRQHandler B WWDG_IRQHandler PUBWEAK PVD_IRQHandler SECTION .text:CODE:REORDER(1) PVD_IRQHandler B PVD_IRQHandler PUBWEAK TAMPER_IRQHandler SECTION .text:CODE:REORDER(1) TAMPER_IRQHandler B TAMPER_IRQHandler PUBWEAK RTC_IRQHandler SECTION .text:CODE:REORDER(1) RTC_IRQHandler B RTC_IRQHandler PUBWEAK FLASH_IRQHandler SECTION .text:CODE:REORDER(1) FLASH_IRQHandler B FLASH_IRQHandler PUBWEAK RCC_IRQHandler SECTION .text:CODE:REORDER(1) RCC_IRQHandler B RCC_IRQHandler PUBWEAK EXTI0_IRQHandler SECTION .text:CODE:REORDER(1) EXTI0_IRQHandler B EXTI0_IRQHandler PUBWEAK EXTI1_IRQHandler SECTION .text:CODE:REORDER(1) EXTI1_IRQHandler B EXTI1_IRQHandler PUBWEAK EXTI2_IRQHandler SECTION .text:CODE:REORDER(1) EXTI2_IRQHandler B EXTI2_IRQHandler PUBWEAK EXTI3_IRQHandler SECTION .text:CODE:REORDER(1) EXTI3_IRQHandler B EXTI3_IRQHandler PUBWEAK EXTI4_IRQHandler SECTION .text:CODE:REORDER(1) EXTI4_IRQHandler B EXTI4_IRQHandler PUBWEAK DMA1_Channel1_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel1_IRQHandler B DMA1_Channel1_IRQHandler PUBWEAK DMA1_Channel2_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel2_IRQHandler B DMA1_Channel2_IRQHandler PUBWEAK DMA1_Channel3_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel3_IRQHandler B DMA1_Channel3_IRQHandler PUBWEAK DMA1_Channel4_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel4_IRQHandler B DMA1_Channel4_IRQHandler PUBWEAK DMA1_Channel5_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel5_IRQHandler B DMA1_Channel5_IRQHandler PUBWEAK DMA1_Channel6_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel6_IRQHandler B DMA1_Channel6_IRQHandler PUBWEAK DMA1_Channel7_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel7_IRQHandler B DMA1_Channel7_IRQHandler PUBWEAK ADC1_2_IRQHandler SECTION .text:CODE:REORDER(1) ADC1_2_IRQHandler B ADC1_2_IRQHandler PUBWEAK USB_HP_CAN1_TX_IRQHandler SECTION .text:CODE:REORDER(1) USB_HP_CAN1_TX_IRQHandler B USB_HP_CAN1_TX_IRQHandler PUBWEAK USB_LP_CAN1_RX0_IRQHandler SECTION .text:CODE:REORDER(1) USB_LP_CAN1_RX0_IRQHandler B USB_LP_CAN1_RX0_IRQHandler PUBWEAK CAN1_RX1_IRQHandler SECTION .text:CODE:REORDER(1) CAN1_RX1_IRQHandler B CAN1_RX1_IRQHandler PUBWEAK CAN1_SCE_IRQHandler SECTION .text:CODE:REORDER(1) CAN1_SCE_IRQHandler B CAN1_SCE_IRQHandler PUBWEAK EXTI9_5_IRQHandler SECTION .text:CODE:REORDER(1) EXTI9_5_IRQHandler B EXTI9_5_IRQHandler PUBWEAK TIM1_BRK_IRQHandler SECTION .text:CODE:REORDER(1) TIM1_BRK_IRQHandler B TIM1_BRK_IRQHandler PUBWEAK TIM1_UP_IRQHandler SECTION .text:CODE:REORDER(1) TIM1_UP_IRQHandler B TIM1_UP_IRQHandler PUBWEAK TIM1_TRG_COM_IRQHandler SECTION .text:CODE:REORDER(1) TIM1_TRG_COM_IRQHandler B TIM1_TRG_COM_IRQHandler PUBWEAK TIM1_CC_IRQHandler SECTION .text:CODE:REORDER(1) TIM1_CC_IRQHandler B TIM1_CC_IRQHandler PUBWEAK TIM2_IRQHandler SECTION .text:CODE:REORDER(1) TIM2_IRQHandler B TIM2_IRQHandler PUBWEAK TIM3_IRQHandler SECTION .text:CODE:REORDER(1) TIM3_IRQHandler B TIM3_IRQHandler PUBWEAK TIM4_IRQHandler SECTION .text:CODE:REORDER(1) TIM4_IRQHandler B TIM4_IRQHandler PUBWEAK I2C1_EV_IRQHandler SECTION .text:CODE:REORDER(1) I2C1_EV_IRQHandler B I2C1_EV_IRQHandler PUBWEAK I2C1_ER_IRQHandler SECTION .text:CODE:REORDER(1) I2C1_ER_IRQHandler B I2C1_ER_IRQHandler PUBWEAK I2C2_EV_IRQHandler SECTION .text:CODE:REORDER(1) I2C2_EV_IRQHandler B I2C2_EV_IRQHandler PUBWEAK I2C2_ER_IRQHandler SECTION .text:CODE:REORDER(1) I2C2_ER_IRQHandler B I2C2_ER_IRQHandler PUBWEAK SPI1_IRQHandler SECTION .text:CODE:REORDER(1) SPI1_IRQHandler B SPI1_IRQHandler PUBWEAK SPI2_IRQHandler SECTION .text:CODE:REORDER(1) SPI2_IRQHandler B SPI2_IRQHandler PUBWEAK USART1_IRQHandler SECTION .text:CODE:REORDER(1) USART1_IRQHandler B USART1_IRQHandler PUBWEAK USART2_IRQHandler SECTION .text:CODE:REORDER(1) USART2_IRQHandler B USART2_IRQHandler PUBWEAK USART3_IRQHandler SECTION .text:CODE:REORDER(1) USART3_IRQHandler B USART3_IRQHandler PUBWEAK EXTI15_10_IRQHandler SECTION .text:CODE:REORDER(1) EXTI15_10_IRQHandler B EXTI15_10_IRQHandler PUBWEAK RTCAlarm_IRQHandler SECTION .text:CODE:REORDER(1) RTCAlarm_IRQHandler B RTCAlarm_IRQHandler PUBWEAK USBWakeUp_IRQHandler SECTION .text:CODE:REORDER(1) USBWakeUp_IRQHandler B USBWakeUp_IRQHandler END /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
10-channel-pwm-controller-stm32
trunk/libraries/startup/iar/startup_stm32f10x_md.s
Unix Assembly
gpl3
12,912
;******************** (C) COPYRIGHT 2011 STMicroelectronics ******************** ;* File Name : startup_stm32f10x_xl.s ;* Author : MCD Application Team ;* Version : V3.5.0 ;* Date : 11-March-2011 ;* Description : STM32F10x XL-Density Devices vector table for EWARM ;* toolchain. ;* This module performs: ;* - Set the initial SP ;* - Configure the clock system and the external SRAM ;* mounted on STM3210E-EVAL board to be used as data ;* memory (optional, to be enabled by user) ;* - Set the initial PC == __iar_program_start, ;* - Set the vector table entries with the exceptions ISR address, ;* After Reset the Cortex-M3 processor is in Thread mode, ;* priority is Privileged, and the Stack is set to Main. ;******************************************************************************** ;* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS ;* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. ;* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, ;* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE ;* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING ;* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. ;******************************************************************************* ; ; ; The modules in this file are included in the libraries, and may be replaced ; by any user-defined modules that define the PUBLIC symbol _program_start or ; a user defined start symbol. ; To override the cstartup defined in the library, simply add your modified ; version to the workbench project. ; ; The vector table is normally located at address 0. ; When debugging in RAM, it can be located in RAM, aligned to at least 2^6. ; The name "__vector_table" has special meaning for C-SPY: ; it is where the SP start value is found, and the NVIC vector ; table register (VTOR) is initialized to this address if != 0. ; ; Cortex-M version ; MODULE ?cstartup ;; Forward declaration of sections. SECTION CSTACK:DATA:NOROOT(3) SECTION .intvec:CODE:NOROOT(2) EXTERN __iar_program_start EXTERN SystemInit PUBLIC __vector_table DATA __vector_table DCD sfe(CSTACK) DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD WWDG_IRQHandler ; Window Watchdog DCD PVD_IRQHandler ; PVD through EXTI Line detect DCD TAMPER_IRQHandler ; Tamper DCD RTC_IRQHandler ; RTC DCD FLASH_IRQHandler ; Flash DCD RCC_IRQHandler ; RCC DCD EXTI0_IRQHandler ; EXTI Line 0 DCD EXTI1_IRQHandler ; EXTI Line 1 DCD EXTI2_IRQHandler ; EXTI Line 2 DCD EXTI3_IRQHandler ; EXTI Line 3 DCD EXTI4_IRQHandler ; EXTI Line 4 DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 DCD ADC1_2_IRQHandler ; ADC1 & ADC2 DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0 DCD CAN1_RX1_IRQHandler ; CAN1 RX1 DCD CAN1_SCE_IRQHandler ; CAN1 SCE DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 DCD TIM1_BRK_TIM9_IRQHandler ; TIM1 Break and TIM9 DCD TIM1_UP_TIM10_IRQHandler ; TIM1 Update and TIM10 DCD TIM1_TRG_COM_TIM11_IRQHandler ; TIM1 Trigger and Commutation and TIM11 DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare DCD TIM2_IRQHandler ; TIM2 DCD TIM3_IRQHandler ; TIM3 DCD TIM4_IRQHandler ; TIM4 DCD I2C1_EV_IRQHandler ; I2C1 Event DCD I2C1_ER_IRQHandler ; I2C1 Error DCD I2C2_EV_IRQHandler ; I2C2 Event DCD I2C2_ER_IRQHandler ; I2C2 Error DCD SPI1_IRQHandler ; SPI1 DCD SPI2_IRQHandler ; SPI2 DCD USART1_IRQHandler ; USART1 DCD USART2_IRQHandler ; USART2 DCD USART3_IRQHandler ; USART3 DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend DCD TIM8_BRK_TIM12_IRQHandler ; TIM8 Break and TIM12 DCD TIM8_UP_TIM13_IRQHandler ; TIM8 Update and TIM13 DCD TIM8_TRG_COM_TIM14_IRQHandler ; TIM8 Trigger and Commutation and TIM14 DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare DCD ADC3_IRQHandler ; ADC3 DCD FSMC_IRQHandler ; FSMC DCD SDIO_IRQHandler ; SDIO DCD TIM5_IRQHandler ; TIM5 DCD SPI3_IRQHandler ; SPI3 DCD UART4_IRQHandler ; UART4 DCD UART5_IRQHandler ; UART5 DCD TIM6_IRQHandler ; TIM6 DCD TIM7_IRQHandler ; TIM7 DCD DMA2_Channel1_IRQHandler ; DMA2 Channel1 DCD DMA2_Channel2_IRQHandler ; DMA2 Channel2 DCD DMA2_Channel3_IRQHandler ; DMA2 Channel3 DCD DMA2_Channel4_5_IRQHandler ; DMA2 Channel4 & Channel5 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; ;; Default interrupt handlers. ;; THUMB PUBWEAK Reset_Handler SECTION .text:CODE:REORDER(2) Reset_Handler LDR R0, =SystemInit BLX R0 LDR R0, =__iar_program_start BX R0 PUBWEAK NMI_Handler SECTION .text:CODE:REORDER(1) NMI_Handler B NMI_Handler PUBWEAK HardFault_Handler SECTION .text:CODE:REORDER(1) HardFault_Handler B HardFault_Handler PUBWEAK MemManage_Handler SECTION .text:CODE:REORDER(1) MemManage_Handler B MemManage_Handler PUBWEAK BusFault_Handler SECTION .text:CODE:REORDER(1) BusFault_Handler B BusFault_Handler PUBWEAK UsageFault_Handler SECTION .text:CODE:REORDER(1) UsageFault_Handler B UsageFault_Handler PUBWEAK SVC_Handler SECTION .text:CODE:REORDER(1) SVC_Handler B SVC_Handler PUBWEAK DebugMon_Handler SECTION .text:CODE:REORDER(1) DebugMon_Handler B DebugMon_Handler PUBWEAK PendSV_Handler SECTION .text:CODE:REORDER(1) PendSV_Handler B PendSV_Handler PUBWEAK SysTick_Handler SECTION .text:CODE:REORDER(1) SysTick_Handler B SysTick_Handler PUBWEAK WWDG_IRQHandler SECTION .text:CODE:REORDER(1) WWDG_IRQHandler B WWDG_IRQHandler PUBWEAK PVD_IRQHandler SECTION .text:CODE:REORDER(1) PVD_IRQHandler B PVD_IRQHandler PUBWEAK TAMPER_IRQHandler SECTION .text:CODE:REORDER(1) TAMPER_IRQHandler B TAMPER_IRQHandler PUBWEAK RTC_IRQHandler SECTION .text:CODE:REORDER(1) RTC_IRQHandler B RTC_IRQHandler PUBWEAK FLASH_IRQHandler SECTION .text:CODE:REORDER(1) FLASH_IRQHandler B FLASH_IRQHandler PUBWEAK RCC_IRQHandler SECTION .text:CODE:REORDER(1) RCC_IRQHandler B RCC_IRQHandler PUBWEAK EXTI0_IRQHandler SECTION .text:CODE:REORDER(1) EXTI0_IRQHandler B EXTI0_IRQHandler PUBWEAK EXTI1_IRQHandler SECTION .text:CODE:REORDER(1) EXTI1_IRQHandler B EXTI1_IRQHandler PUBWEAK EXTI2_IRQHandler SECTION .text:CODE:REORDER(1) EXTI2_IRQHandler B EXTI2_IRQHandler PUBWEAK EXTI3_IRQHandler SECTION .text:CODE:REORDER(1) EXTI3_IRQHandler B EXTI3_IRQHandler PUBWEAK EXTI4_IRQHandler SECTION .text:CODE:REORDER(1) EXTI4_IRQHandler B EXTI4_IRQHandler PUBWEAK DMA1_Channel1_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel1_IRQHandler B DMA1_Channel1_IRQHandler PUBWEAK DMA1_Channel2_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel2_IRQHandler B DMA1_Channel2_IRQHandler PUBWEAK DMA1_Channel3_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel3_IRQHandler B DMA1_Channel3_IRQHandler PUBWEAK DMA1_Channel4_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel4_IRQHandler B DMA1_Channel4_IRQHandler PUBWEAK DMA1_Channel5_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel5_IRQHandler B DMA1_Channel5_IRQHandler PUBWEAK DMA1_Channel6_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel6_IRQHandler B DMA1_Channel6_IRQHandler PUBWEAK DMA1_Channel7_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel7_IRQHandler B DMA1_Channel7_IRQHandler PUBWEAK ADC1_2_IRQHandler SECTION .text:CODE:REORDER(1) ADC1_2_IRQHandler B ADC1_2_IRQHandler PUBWEAK USB_HP_CAN1_TX_IRQHandler SECTION .text:CODE:REORDER(1) USB_HP_CAN1_TX_IRQHandler B USB_HP_CAN1_TX_IRQHandler PUBWEAK USB_LP_CAN1_RX0_IRQHandler SECTION .text:CODE:REORDER(1) USB_LP_CAN1_RX0_IRQHandler B USB_LP_CAN1_RX0_IRQHandler PUBWEAK CAN1_RX1_IRQHandler SECTION .text:CODE:REORDER(1) CAN1_RX1_IRQHandler B CAN1_RX1_IRQHandler PUBWEAK CAN1_SCE_IRQHandler SECTION .text:CODE:REORDER(1) CAN1_SCE_IRQHandler B CAN1_SCE_IRQHandler PUBWEAK EXTI9_5_IRQHandler SECTION .text:CODE:REORDER(1) EXTI9_5_IRQHandler B EXTI9_5_IRQHandler PUBWEAK TIM1_BRK_TIM9_IRQHandler SECTION .text:CODE:REORDER(1) TIM1_BRK_TIM9_IRQHandler B TIM1_BRK_TIM9_IRQHandler PUBWEAK TIM1_UP_TIM10_IRQHandler SECTION .text:CODE:REORDER(1) TIM1_UP_TIM10_IRQHandler B TIM1_UP_TIM10_IRQHandler PUBWEAK TIM1_TRG_COM_TIM11_IRQHandler SECTION .text:CODE:REORDER(1) TIM1_TRG_COM_TIM11_IRQHandler B TIM1_TRG_COM_TIM11_IRQHandler PUBWEAK TIM1_CC_IRQHandler SECTION .text:CODE:REORDER(1) TIM1_CC_IRQHandler B TIM1_CC_IRQHandler PUBWEAK TIM2_IRQHandler SECTION .text:CODE:REORDER(1) TIM2_IRQHandler B TIM2_IRQHandler PUBWEAK TIM3_IRQHandler SECTION .text:CODE:REORDER(1) TIM3_IRQHandler B TIM3_IRQHandler PUBWEAK TIM4_IRQHandler SECTION .text:CODE:REORDER(1) TIM4_IRQHandler B TIM4_IRQHandler PUBWEAK I2C1_EV_IRQHandler SECTION .text:CODE:REORDER(1) I2C1_EV_IRQHandler B I2C1_EV_IRQHandler PUBWEAK I2C1_ER_IRQHandler SECTION .text:CODE:REORDER(1) I2C1_ER_IRQHandler B I2C1_ER_IRQHandler PUBWEAK I2C2_EV_IRQHandler SECTION .text:CODE:REORDER(1) I2C2_EV_IRQHandler B I2C2_EV_IRQHandler PUBWEAK I2C2_ER_IRQHandler SECTION .text:CODE:REORDER(1) I2C2_ER_IRQHandler B I2C2_ER_IRQHandler PUBWEAK SPI1_IRQHandler SECTION .text:CODE:REORDER(1) SPI1_IRQHandler B SPI1_IRQHandler PUBWEAK SPI2_IRQHandler SECTION .text:CODE:REORDER(1) SPI2_IRQHandler B SPI2_IRQHandler PUBWEAK USART1_IRQHandler SECTION .text:CODE:REORDER(1) USART1_IRQHandler B USART1_IRQHandler PUBWEAK USART2_IRQHandler SECTION .text:CODE:REORDER(1) USART2_IRQHandler B USART2_IRQHandler PUBWEAK USART3_IRQHandler SECTION .text:CODE:REORDER(1) USART3_IRQHandler B USART3_IRQHandler PUBWEAK EXTI15_10_IRQHandler SECTION .text:CODE:REORDER(1) EXTI15_10_IRQHandler B EXTI15_10_IRQHandler PUBWEAK RTCAlarm_IRQHandler SECTION .text:CODE:REORDER(1) RTCAlarm_IRQHandler B RTCAlarm_IRQHandler PUBWEAK USBWakeUp_IRQHandler SECTION .text:CODE:REORDER(1) USBWakeUp_IRQHandler B USBWakeUp_IRQHandler PUBWEAK TIM8_BRK_TIM12_IRQHandler SECTION .text:CODE:REORDER(1) TIM8_BRK_TIM12_IRQHandler B TIM8_BRK_TIM12_IRQHandler PUBWEAK TIM8_UP_TIM13_IRQHandler SECTION .text:CODE:REORDER(1) TIM8_UP_TIM13_IRQHandler B TIM8_UP_TIM13_IRQHandler PUBWEAK TIM8_TRG_COM_TIM14_IRQHandler SECTION .text:CODE:REORDER(1) TIM8_TRG_COM_TIM14_IRQHandler B TIM8_TRG_COM_TIM14_IRQHandler PUBWEAK TIM8_CC_IRQHandler SECTION .text:CODE:REORDER(1) TIM8_CC_IRQHandler B TIM8_CC_IRQHandler PUBWEAK ADC3_IRQHandler SECTION .text:CODE:REORDER(1) ADC3_IRQHandler B ADC3_IRQHandler PUBWEAK FSMC_IRQHandler SECTION .text:CODE:REORDER(1) FSMC_IRQHandler B FSMC_IRQHandler PUBWEAK SDIO_IRQHandler SECTION .text:CODE:REORDER(1) SDIO_IRQHandler B SDIO_IRQHandler PUBWEAK TIM5_IRQHandler SECTION .text:CODE:REORDER(1) TIM5_IRQHandler B TIM5_IRQHandler PUBWEAK SPI3_IRQHandler SECTION .text:CODE:REORDER(1) SPI3_IRQHandler B SPI3_IRQHandler PUBWEAK UART4_IRQHandler SECTION .text:CODE:REORDER(1) UART4_IRQHandler B UART4_IRQHandler PUBWEAK UART5_IRQHandler SECTION .text:CODE:REORDER(1) UART5_IRQHandler B UART5_IRQHandler PUBWEAK TIM6_IRQHandler SECTION .text:CODE:REORDER(1) TIM6_IRQHandler B TIM6_IRQHandler PUBWEAK TIM7_IRQHandler SECTION .text:CODE:REORDER(1) TIM7_IRQHandler B TIM7_IRQHandler PUBWEAK DMA2_Channel1_IRQHandler SECTION .text:CODE:REORDER(1) DMA2_Channel1_IRQHandler B DMA2_Channel1_IRQHandler PUBWEAK DMA2_Channel2_IRQHandler SECTION .text:CODE:REORDER(1) DMA2_Channel2_IRQHandler B DMA2_Channel2_IRQHandler PUBWEAK DMA2_Channel3_IRQHandler SECTION .text:CODE:REORDER(1) DMA2_Channel3_IRQHandler B DMA2_Channel3_IRQHandler PUBWEAK DMA2_Channel4_5_IRQHandler SECTION .text:CODE:REORDER(1) DMA2_Channel4_5_IRQHandler B DMA2_Channel4_5_IRQHandler END /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
10-channel-pwm-controller-stm32
trunk/libraries/startup/iar/startup_stm32f10x_xl.s
Unix Assembly
gpl3
16,628
;******************** (C) COPYRIGHT 2011 STMicroelectronics ******************** ;* File Name : startup_stm32f10x_hd.s ;* Author : MCD Application Team ;* Version : V3.5.0 ;* Date : 11-March-2011 ;* Description : STM32F10x High Density Devices vector table for EWARM ;* toolchain. ;* This module performs: ;* - Set the initial SP ;* - Configure the clock system and the external SRAM ;* mounted on STM3210E-EVAL board to be used as data ;* memory (optional, to be enabled by user) ;* - Set the initial PC == __iar_program_start, ;* - Set the vector table entries with the exceptions ISR address, ;* After Reset the Cortex-M3 processor is in Thread mode, ;* priority is Privileged, and the Stack is set to Main. ;******************************************************************************** ;* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS ;* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. ;* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, ;* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE ;* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING ;* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. ;******************************************************************************* ; ; ; The modules in this file are included in the libraries, and may be replaced ; by any user-defined modules that define the PUBLIC symbol _program_start or ; a user defined start symbol. ; To override the cstartup defined in the library, simply add your modified ; version to the workbench project. ; ; The vector table is normally located at address 0. ; When debugging in RAM, it can be located in RAM, aligned to at least 2^6. ; The name "__vector_table" has special meaning for C-SPY: ; it is where the SP start value is found, and the NVIC vector ; table register (VTOR) is initialized to this address if != 0. ; ; Cortex-M version ; MODULE ?cstartup ;; Forward declaration of sections. SECTION CSTACK:DATA:NOROOT(3) SECTION .intvec:CODE:NOROOT(2) EXTERN __iar_program_start EXTERN SystemInit PUBLIC __vector_table DATA __vector_table DCD sfe(CSTACK) DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD WWDG_IRQHandler ; Window Watchdog DCD PVD_IRQHandler ; PVD through EXTI Line detect DCD TAMPER_IRQHandler ; Tamper DCD RTC_IRQHandler ; RTC DCD FLASH_IRQHandler ; Flash DCD RCC_IRQHandler ; RCC DCD EXTI0_IRQHandler ; EXTI Line 0 DCD EXTI1_IRQHandler ; EXTI Line 1 DCD EXTI2_IRQHandler ; EXTI Line 2 DCD EXTI3_IRQHandler ; EXTI Line 3 DCD EXTI4_IRQHandler ; EXTI Line 4 DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 DCD ADC1_2_IRQHandler ; ADC1 & ADC2 DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0 DCD CAN1_RX1_IRQHandler ; CAN1 RX1 DCD CAN1_SCE_IRQHandler ; CAN1 SCE DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 DCD TIM1_BRK_IRQHandler ; TIM1 Break DCD TIM1_UP_IRQHandler ; TIM1 Update DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare DCD TIM2_IRQHandler ; TIM2 DCD TIM3_IRQHandler ; TIM3 DCD TIM4_IRQHandler ; TIM4 DCD I2C1_EV_IRQHandler ; I2C1 Event DCD I2C1_ER_IRQHandler ; I2C1 Error DCD I2C2_EV_IRQHandler ; I2C2 Event DCD I2C2_ER_IRQHandler ; I2C2 Error DCD SPI1_IRQHandler ; SPI1 DCD SPI2_IRQHandler ; SPI2 DCD USART1_IRQHandler ; USART1 DCD USART2_IRQHandler ; USART2 DCD USART3_IRQHandler ; USART3 DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend DCD TIM8_BRK_IRQHandler ; TIM8 Break DCD TIM8_UP_IRQHandler ; TIM8 Update DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger and Commutation DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare DCD ADC3_IRQHandler ; ADC3 DCD FSMC_IRQHandler ; FSMC DCD SDIO_IRQHandler ; SDIO DCD TIM5_IRQHandler ; TIM5 DCD SPI3_IRQHandler ; SPI3 DCD UART4_IRQHandler ; UART4 DCD UART5_IRQHandler ; UART5 DCD TIM6_IRQHandler ; TIM6 DCD TIM7_IRQHandler ; TIM7 DCD DMA2_Channel1_IRQHandler ; DMA2 Channel1 DCD DMA2_Channel2_IRQHandler ; DMA2 Channel2 DCD DMA2_Channel3_IRQHandler ; DMA2 Channel3 DCD DMA2_Channel4_5_IRQHandler ; DMA2 Channel4 & Channel5 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; ;; Default interrupt handlers. ;; THUMB PUBWEAK Reset_Handler SECTION .text:CODE:REORDER(2) Reset_Handler LDR R0, =SystemInit BLX R0 LDR R0, =__iar_program_start BX R0 PUBWEAK NMI_Handler SECTION .text:CODE:REORDER(1) NMI_Handler B NMI_Handler PUBWEAK HardFault_Handler SECTION .text:CODE:REORDER(1) HardFault_Handler B HardFault_Handler PUBWEAK MemManage_Handler SECTION .text:CODE:REORDER(1) MemManage_Handler B MemManage_Handler PUBWEAK BusFault_Handler SECTION .text:CODE:REORDER(1) BusFault_Handler B BusFault_Handler PUBWEAK UsageFault_Handler SECTION .text:CODE:REORDER(1) UsageFault_Handler B UsageFault_Handler PUBWEAK SVC_Handler SECTION .text:CODE:REORDER(1) SVC_Handler B SVC_Handler PUBWEAK DebugMon_Handler SECTION .text:CODE:REORDER(1) DebugMon_Handler B DebugMon_Handler PUBWEAK PendSV_Handler SECTION .text:CODE:REORDER(1) PendSV_Handler B PendSV_Handler PUBWEAK SysTick_Handler SECTION .text:CODE:REORDER(1) SysTick_Handler B SysTick_Handler PUBWEAK WWDG_IRQHandler SECTION .text:CODE:REORDER(1) WWDG_IRQHandler B WWDG_IRQHandler PUBWEAK PVD_IRQHandler SECTION .text:CODE:REORDER(1) PVD_IRQHandler B PVD_IRQHandler PUBWEAK TAMPER_IRQHandler SECTION .text:CODE:REORDER(1) TAMPER_IRQHandler B TAMPER_IRQHandler PUBWEAK RTC_IRQHandler SECTION .text:CODE:REORDER(1) RTC_IRQHandler B RTC_IRQHandler PUBWEAK FLASH_IRQHandler SECTION .text:CODE:REORDER(1) FLASH_IRQHandler B FLASH_IRQHandler PUBWEAK RCC_IRQHandler SECTION .text:CODE:REORDER(1) RCC_IRQHandler B RCC_IRQHandler PUBWEAK EXTI0_IRQHandler SECTION .text:CODE:REORDER(1) EXTI0_IRQHandler B EXTI0_IRQHandler PUBWEAK EXTI1_IRQHandler SECTION .text:CODE:REORDER(1) EXTI1_IRQHandler B EXTI1_IRQHandler PUBWEAK EXTI2_IRQHandler SECTION .text:CODE:REORDER(1) EXTI2_IRQHandler B EXTI2_IRQHandler PUBWEAK EXTI3_IRQHandler SECTION .text:CODE:REORDER(1) EXTI3_IRQHandler B EXTI3_IRQHandler PUBWEAK EXTI4_IRQHandler SECTION .text:CODE:REORDER(1) EXTI4_IRQHandler B EXTI4_IRQHandler PUBWEAK DMA1_Channel1_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel1_IRQHandler B DMA1_Channel1_IRQHandler PUBWEAK DMA1_Channel2_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel2_IRQHandler B DMA1_Channel2_IRQHandler PUBWEAK DMA1_Channel3_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel3_IRQHandler B DMA1_Channel3_IRQHandler PUBWEAK DMA1_Channel4_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel4_IRQHandler B DMA1_Channel4_IRQHandler PUBWEAK DMA1_Channel5_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel5_IRQHandler B DMA1_Channel5_IRQHandler PUBWEAK DMA1_Channel6_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel6_IRQHandler B DMA1_Channel6_IRQHandler PUBWEAK DMA1_Channel7_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel7_IRQHandler B DMA1_Channel7_IRQHandler PUBWEAK ADC1_2_IRQHandler SECTION .text:CODE:REORDER(1) ADC1_2_IRQHandler B ADC1_2_IRQHandler PUBWEAK USB_HP_CAN1_TX_IRQHandler SECTION .text:CODE:REORDER(1) USB_HP_CAN1_TX_IRQHandler B USB_HP_CAN1_TX_IRQHandler PUBWEAK USB_LP_CAN1_RX0_IRQHandler SECTION .text:CODE:REORDER(1) USB_LP_CAN1_RX0_IRQHandler B USB_LP_CAN1_RX0_IRQHandler PUBWEAK CAN1_RX1_IRQHandler SECTION .text:CODE:REORDER(1) CAN1_RX1_IRQHandler B CAN1_RX1_IRQHandler PUBWEAK CAN1_SCE_IRQHandler SECTION .text:CODE:REORDER(1) CAN1_SCE_IRQHandler B CAN1_SCE_IRQHandler PUBWEAK EXTI9_5_IRQHandler SECTION .text:CODE:REORDER(1) EXTI9_5_IRQHandler B EXTI9_5_IRQHandler PUBWEAK TIM1_BRK_IRQHandler SECTION .text:CODE:REORDER(1) TIM1_BRK_IRQHandler B TIM1_BRK_IRQHandler PUBWEAK TIM1_UP_IRQHandler SECTION .text:CODE:REORDER(1) TIM1_UP_IRQHandler B TIM1_UP_IRQHandler PUBWEAK TIM1_TRG_COM_IRQHandler SECTION .text:CODE:REORDER(1) TIM1_TRG_COM_IRQHandler B TIM1_TRG_COM_IRQHandler PUBWEAK TIM1_CC_IRQHandler SECTION .text:CODE:REORDER(1) TIM1_CC_IRQHandler B TIM1_CC_IRQHandler PUBWEAK TIM2_IRQHandler SECTION .text:CODE:REORDER(1) TIM2_IRQHandler B TIM2_IRQHandler PUBWEAK TIM3_IRQHandler SECTION .text:CODE:REORDER(1) TIM3_IRQHandler B TIM3_IRQHandler PUBWEAK TIM4_IRQHandler SECTION .text:CODE:REORDER(1) TIM4_IRQHandler B TIM4_IRQHandler PUBWEAK I2C1_EV_IRQHandler SECTION .text:CODE:REORDER(1) I2C1_EV_IRQHandler B I2C1_EV_IRQHandler PUBWEAK I2C1_ER_IRQHandler SECTION .text:CODE:REORDER(1) I2C1_ER_IRQHandler B I2C1_ER_IRQHandler PUBWEAK I2C2_EV_IRQHandler SECTION .text:CODE:REORDER(1) I2C2_EV_IRQHandler B I2C2_EV_IRQHandler PUBWEAK I2C2_ER_IRQHandler SECTION .text:CODE:REORDER(1) I2C2_ER_IRQHandler B I2C2_ER_IRQHandler PUBWEAK SPI1_IRQHandler SECTION .text:CODE:REORDER(1) SPI1_IRQHandler B SPI1_IRQHandler PUBWEAK SPI2_IRQHandler SECTION .text:CODE:REORDER(1) SPI2_IRQHandler B SPI2_IRQHandler PUBWEAK USART1_IRQHandler SECTION .text:CODE:REORDER(1) USART1_IRQHandler B USART1_IRQHandler PUBWEAK USART2_IRQHandler SECTION .text:CODE:REORDER(1) USART2_IRQHandler B USART2_IRQHandler PUBWEAK USART3_IRQHandler SECTION .text:CODE:REORDER(1) USART3_IRQHandler B USART3_IRQHandler PUBWEAK EXTI15_10_IRQHandler SECTION .text:CODE:REORDER(1) EXTI15_10_IRQHandler B EXTI15_10_IRQHandler PUBWEAK RTCAlarm_IRQHandler SECTION .text:CODE:REORDER(1) RTCAlarm_IRQHandler B RTCAlarm_IRQHandler PUBWEAK USBWakeUp_IRQHandler SECTION .text:CODE:REORDER(1) USBWakeUp_IRQHandler B USBWakeUp_IRQHandler PUBWEAK TIM8_BRK_IRQHandler SECTION .text:CODE:REORDER(1) TIM8_BRK_IRQHandler B TIM8_BRK_IRQHandler PUBWEAK TIM8_UP_IRQHandler SECTION .text:CODE:REORDER(1) TIM8_UP_IRQHandler B TIM8_UP_IRQHandler PUBWEAK TIM8_TRG_COM_IRQHandler SECTION .text:CODE:REORDER(1) TIM8_TRG_COM_IRQHandler B TIM8_TRG_COM_IRQHandler PUBWEAK TIM8_CC_IRQHandler SECTION .text:CODE:REORDER(1) TIM8_CC_IRQHandler B TIM8_CC_IRQHandler PUBWEAK ADC3_IRQHandler SECTION .text:CODE:REORDER(1) ADC3_IRQHandler B ADC3_IRQHandler PUBWEAK FSMC_IRQHandler SECTION .text:CODE:REORDER(1) FSMC_IRQHandler B FSMC_IRQHandler PUBWEAK SDIO_IRQHandler SECTION .text:CODE:REORDER(1) SDIO_IRQHandler B SDIO_IRQHandler PUBWEAK TIM5_IRQHandler SECTION .text:CODE:REORDER(1) TIM5_IRQHandler B TIM5_IRQHandler PUBWEAK SPI3_IRQHandler SECTION .text:CODE:REORDER(1) SPI3_IRQHandler B SPI3_IRQHandler PUBWEAK UART4_IRQHandler SECTION .text:CODE:REORDER(1) UART4_IRQHandler B UART4_IRQHandler PUBWEAK UART5_IRQHandler SECTION .text:CODE:REORDER(1) UART5_IRQHandler B UART5_IRQHandler PUBWEAK TIM6_IRQHandler SECTION .text:CODE:REORDER(1) TIM6_IRQHandler B TIM6_IRQHandler PUBWEAK TIM7_IRQHandler SECTION .text:CODE:REORDER(1) TIM7_IRQHandler B TIM7_IRQHandler PUBWEAK DMA2_Channel1_IRQHandler SECTION .text:CODE:REORDER(1) DMA2_Channel1_IRQHandler B DMA2_Channel1_IRQHandler PUBWEAK DMA2_Channel2_IRQHandler SECTION .text:CODE:REORDER(1) DMA2_Channel2_IRQHandler B DMA2_Channel2_IRQHandler PUBWEAK DMA2_Channel3_IRQHandler SECTION .text:CODE:REORDER(1) DMA2_Channel3_IRQHandler B DMA2_Channel3_IRQHandler PUBWEAK DMA2_Channel4_5_IRQHandler SECTION .text:CODE:REORDER(1) DMA2_Channel4_5_IRQHandler B DMA2_Channel4_5_IRQHandler END /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
10-channel-pwm-controller-stm32
trunk/libraries/startup/iar/startup_stm32f10x_hd.s
Unix Assembly
gpl3
16,229
;******************** (C) COPYRIGHT 2011 STMicroelectronics ******************** ;* File Name : startup_stm32f10x_hd_vl.s ;* Author : MCD Application Team ;* Version : V3.5.0 ;* Date : 11-March-2011 ;* Description : STM32F10x High Density Value Line Devices vector table ;* for EWARM toolchain. ;* This module performs: ;* - Set the initial SP ;* - Configure the clock system and the external SRAM ;* mounted on STM32100E-EVAL board to be used as data ;* memory (optional, to be enabled by user) ;* - Set the initial PC == __iar_program_start, ;* - Set the vector table entries with the exceptions ISR ;* address. ;* After Reset the Cortex-M3 processor is in Thread mode, ;* priority is Privileged, and the Stack is set to Main. ;******************************************************************************** ;* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS ;* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. ;* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, ;* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE ;* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING ;* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. ;******************************************************************************* ; ; ; The modules in this file are included in the libraries, and may be replaced ; by any user-defined modules that define the PUBLIC symbol _program_start or ; a user defined start symbol. ; To override the cstartup defined in the library, simply add your modified ; version to the workbench project. ; ; The vector table is normally located at address 0. ; When debugging in RAM, it can be located in RAM, aligned to at least 2^6. ; The name "__vector_table" has special meaning for C-SPY: ; it is where the SP start value is found, and the NVIC vector ; table register (VTOR) is initialized to this address if != 0. ; ; Cortex-M version ; MODULE ?cstartup ;; Forward declaration of sections. SECTION CSTACK:DATA:NOROOT(3) SECTION .intvec:CODE:NOROOT(2) EXTERN __iar_program_start EXTERN SystemInit PUBLIC __vector_table DATA __vector_table DCD sfe(CSTACK) DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD WWDG_IRQHandler ; Window Watchdog DCD PVD_IRQHandler ; PVD through EXTI Line detect DCD TAMPER_IRQHandler ; Tamper DCD RTC_IRQHandler ; RTC DCD FLASH_IRQHandler ; Flash DCD RCC_IRQHandler ; RCC DCD EXTI0_IRQHandler ; EXTI Line 0 DCD EXTI1_IRQHandler ; EXTI Line 1 DCD EXTI2_IRQHandler ; EXTI Line 2 DCD EXTI3_IRQHandler ; EXTI Line 3 DCD EXTI4_IRQHandler ; EXTI Line 4 DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 DCD ADC1_IRQHandler ; ADC1 DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15 DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16 DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger and Commutation and TIM17 DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare DCD TIM2_IRQHandler ; TIM2 DCD TIM3_IRQHandler ; TIM3 DCD TIM4_IRQHandler ; TIM4 DCD I2C1_EV_IRQHandler ; I2C1 Event DCD I2C1_ER_IRQHandler ; I2C1 Error DCD I2C2_EV_IRQHandler ; I2C2 Event DCD I2C2_ER_IRQHandler ; I2C2 Error DCD SPI1_IRQHandler ; SPI1 DCD SPI2_IRQHandler ; SPI2 DCD USART1_IRQHandler ; USART1 DCD USART2_IRQHandler ; USART2 DCD USART3_IRQHandler ; USART3 DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line DCD CEC_IRQHandler ; HDMI-CEC DCD TIM12_IRQHandler ; TIM12 DCD TIM13_IRQHandler ; TIM13 DCD TIM14_IRQHandler ; TIM14 DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD TIM5_IRQHandler ; TIM5 DCD SPI3_IRQHandler ; SPI3 DCD UART4_IRQHandler ; UART4 DCD UART5_IRQHandler ; UART5 DCD TIM6_DAC_IRQHandler ; TIM6 and DAC underrun DCD TIM7_IRQHandler ; TIM7 DCD DMA2_Channel1_IRQHandler ; DMA2 Channel1 DCD DMA2_Channel2_IRQHandler ; DMA2 Channel2 DCD DMA2_Channel3_IRQHandler ; DMA2 Channel3 DCD DMA2_Channel4_5_IRQHandler ; DMA2 Channel4 & Channel5 DCD DMA2_Channel5_IRQHandler ; DMA2 Channel5 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; ;; Default interrupt handlers. ;; THUMB PUBWEAK Reset_Handler SECTION .text:CODE:REORDER(2) Reset_Handler LDR R0, =SystemInit BLX R0 LDR R0, =__iar_program_start BX R0 PUBWEAK NMI_Handler SECTION .text:CODE:REORDER(1) NMI_Handler B NMI_Handler PUBWEAK HardFault_Handler SECTION .text:CODE:REORDER(1) HardFault_Handler B HardFault_Handler PUBWEAK MemManage_Handler SECTION .text:CODE:REORDER(1) MemManage_Handler B MemManage_Handler PUBWEAK BusFault_Handler SECTION .text:CODE:REORDER(1) BusFault_Handler B BusFault_Handler PUBWEAK UsageFault_Handler SECTION .text:CODE:REORDER(1) UsageFault_Handler B UsageFault_Handler PUBWEAK SVC_Handler SECTION .text:CODE:REORDER(1) SVC_Handler B SVC_Handler PUBWEAK DebugMon_Handler SECTION .text:CODE:REORDER(1) DebugMon_Handler B DebugMon_Handler PUBWEAK PendSV_Handler SECTION .text:CODE:REORDER(1) PendSV_Handler B PendSV_Handler PUBWEAK SysTick_Handler SECTION .text:CODE:REORDER(1) SysTick_Handler B SysTick_Handler PUBWEAK WWDG_IRQHandler SECTION .text:CODE:REORDER(1) WWDG_IRQHandler B WWDG_IRQHandler PUBWEAK PVD_IRQHandler SECTION .text:CODE:REORDER(1) PVD_IRQHandler B PVD_IRQHandler PUBWEAK TAMPER_IRQHandler SECTION .text:CODE:REORDER(1) TAMPER_IRQHandler B TAMPER_IRQHandler PUBWEAK RTC_IRQHandler SECTION .text:CODE:REORDER(1) RTC_IRQHandler B RTC_IRQHandler PUBWEAK FLASH_IRQHandler SECTION .text:CODE:REORDER(1) FLASH_IRQHandler B FLASH_IRQHandler PUBWEAK RCC_IRQHandler SECTION .text:CODE:REORDER(1) RCC_IRQHandler B RCC_IRQHandler PUBWEAK EXTI0_IRQHandler SECTION .text:CODE:REORDER(1) EXTI0_IRQHandler B EXTI0_IRQHandler PUBWEAK EXTI1_IRQHandler SECTION .text:CODE:REORDER(1) EXTI1_IRQHandler B EXTI1_IRQHandler PUBWEAK EXTI2_IRQHandler SECTION .text:CODE:REORDER(1) EXTI2_IRQHandler B EXTI2_IRQHandler PUBWEAK EXTI3_IRQHandler SECTION .text:CODE:REORDER(1) EXTI3_IRQHandler B EXTI3_IRQHandler PUBWEAK EXTI4_IRQHandler SECTION .text:CODE:REORDER(1) EXTI4_IRQHandler B EXTI4_IRQHandler PUBWEAK DMA1_Channel1_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel1_IRQHandler B DMA1_Channel1_IRQHandler PUBWEAK DMA1_Channel2_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel2_IRQHandler B DMA1_Channel2_IRQHandler PUBWEAK DMA1_Channel3_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel3_IRQHandler B DMA1_Channel3_IRQHandler PUBWEAK DMA1_Channel4_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel4_IRQHandler B DMA1_Channel4_IRQHandler PUBWEAK DMA1_Channel5_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel5_IRQHandler B DMA1_Channel5_IRQHandler PUBWEAK DMA1_Channel6_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel6_IRQHandler B DMA1_Channel6_IRQHandler PUBWEAK DMA1_Channel7_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel7_IRQHandler B DMA1_Channel7_IRQHandler PUBWEAK ADC1_IRQHandler SECTION .text:CODE:REORDER(1) ADC1_IRQHandler B ADC1_IRQHandler PUBWEAK EXTI9_5_IRQHandler SECTION .text:CODE:REORDER(1) EXTI9_5_IRQHandler B EXTI9_5_IRQHandler PUBWEAK TIM1_BRK_TIM15_IRQHandler SECTION .text:CODE:REORDER(1) TIM1_BRK_TIM15_IRQHandler B TIM1_BRK_TIM15_IRQHandler PUBWEAK TIM1_UP_TIM16_IRQHandler SECTION .text:CODE:REORDER(1) TIM1_UP_TIM16_IRQHandler B TIM1_UP_TIM16_IRQHandler PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler SECTION .text:CODE:REORDER(1) TIM1_TRG_COM_TIM17_IRQHandler B TIM1_TRG_COM_TIM17_IRQHandler PUBWEAK TIM1_CC_IRQHandler SECTION .text:CODE:REORDER(1) TIM1_CC_IRQHandler B TIM1_CC_IRQHandler PUBWEAK TIM2_IRQHandler SECTION .text:CODE:REORDER(1) TIM2_IRQHandler B TIM2_IRQHandler PUBWEAK TIM3_IRQHandler SECTION .text:CODE:REORDER(1) TIM3_IRQHandler B TIM3_IRQHandler PUBWEAK TIM4_IRQHandler SECTION .text:CODE:REORDER(1) TIM4_IRQHandler B TIM4_IRQHandler PUBWEAK I2C1_EV_IRQHandler SECTION .text:CODE:REORDER(1) I2C1_EV_IRQHandler B I2C1_EV_IRQHandler PUBWEAK I2C1_ER_IRQHandler SECTION .text:CODE:REORDER(1) I2C1_ER_IRQHandler B I2C1_ER_IRQHandler PUBWEAK I2C2_EV_IRQHandler SECTION .text:CODE:REORDER(1) I2C2_EV_IRQHandler B I2C2_EV_IRQHandler PUBWEAK I2C2_ER_IRQHandler SECTION .text:CODE:REORDER(1) I2C2_ER_IRQHandler B I2C2_ER_IRQHandler PUBWEAK SPI1_IRQHandler SECTION .text:CODE:REORDER(1) SPI1_IRQHandler B SPI1_IRQHandler PUBWEAK SPI2_IRQHandler SECTION .text:CODE:REORDER(1) SPI2_IRQHandler B SPI2_IRQHandler PUBWEAK USART1_IRQHandler SECTION .text:CODE:REORDER(1) USART1_IRQHandler B USART1_IRQHandler PUBWEAK USART2_IRQHandler SECTION .text:CODE:REORDER(1) USART2_IRQHandler B USART2_IRQHandler PUBWEAK USART3_IRQHandler SECTION .text:CODE:REORDER(1) USART3_IRQHandler B USART3_IRQHandler PUBWEAK EXTI15_10_IRQHandler SECTION .text:CODE:REORDER(1) EXTI15_10_IRQHandler B EXTI15_10_IRQHandler PUBWEAK RTCAlarm_IRQHandler SECTION .text:CODE:REORDER(1) RTCAlarm_IRQHandler B RTCAlarm_IRQHandler PUBWEAK CEC_IRQHandler SECTION .text:CODE:REORDER(1) CEC_IRQHandler B CEC_IRQHandler PUBWEAK TIM12_IRQHandler SECTION .text:CODE:REORDER(1) TIM12_IRQHandler B TIM12_IRQHandler PUBWEAK TIM13_IRQHandler SECTION .text:CODE:REORDER(1) TIM13_IRQHandler B TIM13_IRQHandler PUBWEAK TIM14_IRQHandler SECTION .text:CODE:REORDER(1) TIM14_IRQHandler B TIM14_IRQHandler PUBWEAK TIM5_IRQHandler SECTION .text:CODE:REORDER(1) TIM5_IRQHandler B TIM5_IRQHandler PUBWEAK SPI3_IRQHandler SECTION .text:CODE:REORDER(1) SPI3_IRQHandler B SPI3_IRQHandler PUBWEAK UART4_IRQHandler SECTION .text:CODE:REORDER(1) UART4_IRQHandler B UART4_IRQHandler PUBWEAK UART5_IRQHandler SECTION .text:CODE:REORDER(1) UART5_IRQHandler B UART5_IRQHandler PUBWEAK TIM6_DAC_IRQHandler SECTION .text:CODE:REORDER(1) TIM6_DAC_IRQHandler B TIM6_DAC_IRQHandler PUBWEAK TIM7_IRQHandler SECTION .text:CODE:REORDER(1) TIM7_IRQHandler B TIM7_IRQHandler PUBWEAK DMA2_Channel1_IRQHandler SECTION .text:CODE:REORDER(1) DMA2_Channel1_IRQHandler B DMA2_Channel1_IRQHandler PUBWEAK DMA2_Channel2_IRQHandler SECTION .text:CODE:REORDER(1) DMA2_Channel2_IRQHandler B DMA2_Channel2_IRQHandler PUBWEAK DMA2_Channel3_IRQHandler SECTION .text:CODE:REORDER(1) DMA2_Channel3_IRQHandler B DMA2_Channel3_IRQHandler PUBWEAK DMA2_Channel4_5_IRQHandler SECTION .text:CODE:REORDER(1) DMA2_Channel4_5_IRQHandler B DMA2_Channel4_5_IRQHandler PUBWEAK DMA2_Channel5_IRQHandler SECTION .text:CODE:REORDER(1) DMA2_Channel5_IRQHandler B DMA2_Channel5_IRQHandler END /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
10-channel-pwm-controller-stm32
trunk/libraries/startup/iar/startup_stm32f10x_hd_vl.s
Unix Assembly
gpl3
15,675
;******************** (C) COPYRIGHT 2011 STMicroelectronics ******************** ;* File Name : startup_stm32f10x_ld.s ;* Author : MCD Application Team ;* Version : V3.5.0 ;* Date : 11-March-2011 ;* Description : STM32F10x Low Density Devices vector table for EWARM ;* toolchain. ;* This module performs: ;* - Set the initial SP ;* - Configure the clock system ;* - Set the initial PC == __iar_program_start, ;* - Set the vector table entries with the exceptions ISR ;* address. ;* After Reset the Cortex-M3 processor is in Thread mode, ;* priority is Privileged, and the Stack is set to Main. ;******************************************************************************** ;* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS ;* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. ;* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, ;* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE ;* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING ;* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. ;******************************************************************************* ; ; ; The modules in this file are included in the libraries, and may be replaced ; by any user-defined modules that define the PUBLIC symbol _program_start or ; a user defined start symbol. ; To override the cstartup defined in the library, simply add your modified ; version to the workbench project. ; ; The vector table is normally located at address 0. ; When debugging in RAM, it can be located in RAM, aligned to at least 2^6. ; The name "__vector_table" has special meaning for C-SPY: ; it is where the SP start value is found, and the NVIC vector ; table register (VTOR) is initialized to this address if != 0. ; ; Cortex-M version ; MODULE ?cstartup ;; Forward declaration of sections. SECTION CSTACK:DATA:NOROOT(3) SECTION .intvec:CODE:NOROOT(2) EXTERN __iar_program_start EXTERN SystemInit PUBLIC __vector_table DATA __vector_table DCD sfe(CSTACK) DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD WWDG_IRQHandler ; Window Watchdog DCD PVD_IRQHandler ; PVD through EXTI Line detect DCD TAMPER_IRQHandler ; Tamper DCD RTC_IRQHandler ; RTC DCD FLASH_IRQHandler ; Flash DCD RCC_IRQHandler ; RCC DCD EXTI0_IRQHandler ; EXTI Line 0 DCD EXTI1_IRQHandler ; EXTI Line 1 DCD EXTI2_IRQHandler ; EXTI Line 2 DCD EXTI3_IRQHandler ; EXTI Line 3 DCD EXTI4_IRQHandler ; EXTI Line 4 DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 DCD ADC1_2_IRQHandler ; ADC1 & ADC2 DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0 DCD CAN1_RX1_IRQHandler ; CAN1 RX1 DCD CAN1_SCE_IRQHandler ; CAN1 SCE DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 DCD TIM1_BRK_IRQHandler ; TIM1 Break DCD TIM1_UP_IRQHandler ; TIM1 Update DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare DCD TIM2_IRQHandler ; TIM2 DCD TIM3_IRQHandler ; TIM3 DCD 0 ; Reserved DCD I2C1_EV_IRQHandler ; I2C1 Event DCD I2C1_ER_IRQHandler ; I2C1 Error DCD 0 ; Reserved DCD 0 ; Reserved DCD SPI1_IRQHandler ; SPI1 DCD 0 ; Reserved DCD USART1_IRQHandler ; USART1 DCD USART2_IRQHandler ; USART2 DCD 0 ; Reserved DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; ;; Default interrupt handlers. ;; THUMB PUBWEAK Reset_Handler SECTION .text:CODE:REORDER(2) Reset_Handler LDR R0, =SystemInit BLX R0 LDR R0, =__iar_program_start BX R0 PUBWEAK NMI_Handler SECTION .text:CODE:REORDER(1) NMI_Handler B NMI_Handler PUBWEAK HardFault_Handler SECTION .text:CODE:REORDER(1) HardFault_Handler B HardFault_Handler PUBWEAK MemManage_Handler SECTION .text:CODE:REORDER(1) MemManage_Handler B MemManage_Handler PUBWEAK BusFault_Handler SECTION .text:CODE:REORDER(1) BusFault_Handler B BusFault_Handler PUBWEAK UsageFault_Handler SECTION .text:CODE:REORDER(1) UsageFault_Handler B UsageFault_Handler PUBWEAK SVC_Handler SECTION .text:CODE:REORDER(1) SVC_Handler B SVC_Handler PUBWEAK DebugMon_Handler SECTION .text:CODE:REORDER(1) DebugMon_Handler B DebugMon_Handler PUBWEAK PendSV_Handler SECTION .text:CODE:REORDER(1) PendSV_Handler B PendSV_Handler PUBWEAK SysTick_Handler SECTION .text:CODE:REORDER(1) SysTick_Handler B SysTick_Handler PUBWEAK WWDG_IRQHandler SECTION .text:CODE:REORDER(1) WWDG_IRQHandler B WWDG_IRQHandler PUBWEAK PVD_IRQHandler SECTION .text:CODE:REORDER(1) PVD_IRQHandler B PVD_IRQHandler PUBWEAK TAMPER_IRQHandler SECTION .text:CODE:REORDER(1) TAMPER_IRQHandler B TAMPER_IRQHandler PUBWEAK RTC_IRQHandler SECTION .text:CODE:REORDER(1) RTC_IRQHandler B RTC_IRQHandler PUBWEAK FLASH_IRQHandler SECTION .text:CODE:REORDER(1) FLASH_IRQHandler B FLASH_IRQHandler PUBWEAK RCC_IRQHandler SECTION .text:CODE:REORDER(1) RCC_IRQHandler B RCC_IRQHandler PUBWEAK EXTI0_IRQHandler SECTION .text:CODE:REORDER(1) EXTI0_IRQHandler B EXTI0_IRQHandler PUBWEAK EXTI1_IRQHandler SECTION .text:CODE:REORDER(1) EXTI1_IRQHandler B EXTI1_IRQHandler PUBWEAK EXTI2_IRQHandler SECTION .text:CODE:REORDER(1) EXTI2_IRQHandler B EXTI2_IRQHandler PUBWEAK EXTI3_IRQHandler SECTION .text:CODE:REORDER(1) EXTI3_IRQHandler B EXTI3_IRQHandler PUBWEAK EXTI4_IRQHandler SECTION .text:CODE:REORDER(1) EXTI4_IRQHandler B EXTI4_IRQHandler PUBWEAK DMA1_Channel1_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel1_IRQHandler B DMA1_Channel1_IRQHandler PUBWEAK DMA1_Channel2_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel2_IRQHandler B DMA1_Channel2_IRQHandler PUBWEAK DMA1_Channel3_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel3_IRQHandler B DMA1_Channel3_IRQHandler PUBWEAK DMA1_Channel4_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel4_IRQHandler B DMA1_Channel4_IRQHandler PUBWEAK DMA1_Channel5_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel5_IRQHandler B DMA1_Channel5_IRQHandler PUBWEAK DMA1_Channel6_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel6_IRQHandler B DMA1_Channel6_IRQHandler PUBWEAK DMA1_Channel7_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel7_IRQHandler B DMA1_Channel7_IRQHandler PUBWEAK ADC1_2_IRQHandler SECTION .text:CODE:REORDER(1) ADC1_2_IRQHandler B ADC1_2_IRQHandler PUBWEAK USB_HP_CAN1_TX_IRQHandler SECTION .text:CODE:REORDER(1) USB_HP_CAN1_TX_IRQHandler B USB_HP_CAN1_TX_IRQHandler PUBWEAK USB_LP_CAN1_RX0_IRQHandler SECTION .text:CODE:REORDER(1) USB_LP_CAN1_RX0_IRQHandler B USB_LP_CAN1_RX0_IRQHandler PUBWEAK CAN1_RX1_IRQHandler SECTION .text:CODE:REORDER(1) CAN1_RX1_IRQHandler B CAN1_RX1_IRQHandler PUBWEAK CAN1_SCE_IRQHandler SECTION .text:CODE:REORDER(1) CAN1_SCE_IRQHandler B CAN1_SCE_IRQHandler PUBWEAK EXTI9_5_IRQHandler SECTION .text:CODE:REORDER(1) EXTI9_5_IRQHandler B EXTI9_5_IRQHandler PUBWEAK TIM1_BRK_IRQHandler SECTION .text:CODE:REORDER(1) TIM1_BRK_IRQHandler B TIM1_BRK_IRQHandler PUBWEAK TIM1_UP_IRQHandler SECTION .text:CODE:REORDER(1) TIM1_UP_IRQHandler B TIM1_UP_IRQHandler PUBWEAK TIM1_TRG_COM_IRQHandler SECTION .text:CODE:REORDER(1) TIM1_TRG_COM_IRQHandler B TIM1_TRG_COM_IRQHandler PUBWEAK TIM1_CC_IRQHandler SECTION .text:CODE:REORDER(1) TIM1_CC_IRQHandler B TIM1_CC_IRQHandler PUBWEAK TIM2_IRQHandler SECTION .text:CODE:REORDER(1) TIM2_IRQHandler B TIM2_IRQHandler PUBWEAK TIM3_IRQHandler SECTION .text:CODE:REORDER(1) TIM3_IRQHandler B TIM3_IRQHandler PUBWEAK I2C1_EV_IRQHandler SECTION .text:CODE:REORDER(1) I2C1_EV_IRQHandler B I2C1_EV_IRQHandler PUBWEAK I2C1_ER_IRQHandler SECTION .text:CODE:REORDER(1) I2C1_ER_IRQHandler B I2C1_ER_IRQHandler PUBWEAK SPI1_IRQHandler SECTION .text:CODE:REORDER(1) SPI1_IRQHandler B SPI1_IRQHandler PUBWEAK USART1_IRQHandler SECTION .text:CODE:REORDER(1) USART1_IRQHandler B USART1_IRQHandler PUBWEAK USART2_IRQHandler SECTION .text:CODE:REORDER(1) USART2_IRQHandler B USART2_IRQHandler PUBWEAK EXTI15_10_IRQHandler SECTION .text:CODE:REORDER(1) EXTI15_10_IRQHandler B EXTI15_10_IRQHandler PUBWEAK RTCAlarm_IRQHandler SECTION .text:CODE:REORDER(1) RTCAlarm_IRQHandler B RTCAlarm_IRQHandler PUBWEAK USBWakeUp_IRQHandler SECTION .text:CODE:REORDER(1) USBWakeUp_IRQHandler B USBWakeUp_IRQHandler END /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
10-channel-pwm-controller-stm32
trunk/libraries/startup/iar/startup_stm32f10x_ld.s
Unix Assembly
gpl3
12,650
;******************** (C) COPYRIGHT 2011 STMicroelectronics ******************* ;* File Name : startup_stm32f10x_cl.s ;* Author : MCD Application Team ;* Version : V3.5.0 ;* Date : 11-March-2011 ;* Description : STM32F10x Connectivity line devices vector table for ;* EWARM toolchain. ;* This module performs: ;* - Set the initial SP ;* - Configure the clock system ;* - Set the initial PC == __iar_program_start, ;* - Set the vector table entries with the exceptions ISR ;* address. ;* After Reset the Cortex-M3 processor is in Thread mode, ;* priority is Privileged, and the Stack is set to Main. ;******************************************************************************** ;* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS ;* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. ;* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, ;* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE ;* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING ;* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. ;******************************************************************************* ; ; ; The modules in this file are included in the libraries, and may be replaced ; by any user-defined modules that define the PUBLIC symbol _program_start or ; a user defined start symbol. ; To override the cstartup defined in the library, simply add your modified ; version to the workbench project. ; ; The vector table is normally located at address 0. ; When debugging in RAM, it can be located in RAM, aligned to at least 2^6. ; The name "__vector_table" has special meaning for C-SPY: ; it is where the SP start value is found, and the NVIC vector ; table register (VTOR) is initialized to this address if != 0. ; ; Cortex-M version ; MODULE ?cstartup ;; Forward declaration of sections. SECTION CSTACK:DATA:NOROOT(3) SECTION .intvec:CODE:NOROOT(2) EXTERN __iar_program_start EXTERN SystemInit PUBLIC __vector_table DATA __vector_table DCD sfe(CSTACK) DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD WWDG_IRQHandler ; Window Watchdog DCD PVD_IRQHandler ; PVD through EXTI Line detect DCD TAMPER_IRQHandler ; Tamper DCD RTC_IRQHandler ; RTC DCD FLASH_IRQHandler ; Flash DCD RCC_IRQHandler ; RCC DCD EXTI0_IRQHandler ; EXTI Line 0 DCD EXTI1_IRQHandler ; EXTI Line 1 DCD EXTI2_IRQHandler ; EXTI Line 2 DCD EXTI3_IRQHandler ; EXTI Line 3 DCD EXTI4_IRQHandler ; EXTI Line 4 DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 DCD ADC1_2_IRQHandler ; ADC1 and ADC2 DCD CAN1_TX_IRQHandler ; CAN1 TX DCD CAN1_RX0_IRQHandler ; CAN1 RX0 DCD CAN1_RX1_IRQHandler ; CAN1 RX1 DCD CAN1_SCE_IRQHandler ; CAN1 SCE DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 DCD TIM1_BRK_IRQHandler ; TIM1 Break DCD TIM1_UP_IRQHandler ; TIM1 Update DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare DCD TIM2_IRQHandler ; TIM2 DCD TIM3_IRQHandler ; TIM3 DCD TIM4_IRQHandler ; TIM4 DCD I2C1_EV_IRQHandler ; I2C1 Event DCD I2C1_ER_IRQHandler ; I2C1 Error DCD I2C2_EV_IRQHandler ; I2C2 Event DCD I2C2_ER_IRQHandler ; I2C1 Error DCD SPI1_IRQHandler ; SPI1 DCD SPI2_IRQHandler ; SPI2 DCD USART1_IRQHandler ; USART1 DCD USART2_IRQHandler ; USART2 DCD USART3_IRQHandler ; USART3 DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 DCD RTCAlarm_IRQHandler ; RTC alarm through EXTI line DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI line DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD TIM5_IRQHandler ; TIM5 DCD SPI3_IRQHandler ; SPI3 DCD UART4_IRQHandler ; UART4 DCD UART5_IRQHandler ; UART5 DCD TIM6_IRQHandler ; TIM6 DCD TIM7_IRQHandler ; TIM7 DCD DMA2_Channel1_IRQHandler ; DMA2 Channel1 DCD DMA2_Channel2_IRQHandler ; DMA2 Channel2 DCD DMA2_Channel3_IRQHandler ; DMA2 Channel3 DCD DMA2_Channel4_IRQHandler ; DMA2 Channel4 DCD DMA2_Channel5_IRQHandler ; DMA2 Channel5 DCD ETH_IRQHandler ; Ethernet DCD ETH_WKUP_IRQHandler ; Ethernet Wakeup through EXTI line DCD CAN2_TX_IRQHandler ; CAN2 TX DCD CAN2_RX0_IRQHandler ; CAN2 RX0 DCD CAN2_RX1_IRQHandler ; CAN2 RX1 DCD CAN2_SCE_IRQHandler ; CAN2 SCE DCD OTG_FS_IRQHandler ; USB OTG FS ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; ;; Default interrupt handlers. ;; THUMB PUBWEAK Reset_Handler SECTION .text:CODE:REORDER(2) Reset_Handler LDR R0, =SystemInit BLX R0 LDR R0, =__iar_program_start BX R0 PUBWEAK NMI_Handler SECTION .text:CODE:REORDER(1) NMI_Handler B NMI_Handler PUBWEAK HardFault_Handler SECTION .text:CODE:REORDER(1) HardFault_Handler B HardFault_Handler PUBWEAK MemManage_Handler SECTION .text:CODE:REORDER(1) MemManage_Handler B MemManage_Handler PUBWEAK BusFault_Handler SECTION .text:CODE:REORDER(1) BusFault_Handler B BusFault_Handler PUBWEAK UsageFault_Handler SECTION .text:CODE:REORDER(1) UsageFault_Handler B UsageFault_Handler PUBWEAK SVC_Handler SECTION .text:CODE:REORDER(1) SVC_Handler B SVC_Handler PUBWEAK DebugMon_Handler SECTION .text:CODE:REORDER(1) DebugMon_Handler B DebugMon_Handler PUBWEAK PendSV_Handler SECTION .text:CODE:REORDER(1) PendSV_Handler B PendSV_Handler PUBWEAK SysTick_Handler SECTION .text:CODE:REORDER(1) SysTick_Handler B SysTick_Handler PUBWEAK WWDG_IRQHandler SECTION .text:CODE:REORDER(1) WWDG_IRQHandler B WWDG_IRQHandler PUBWEAK PVD_IRQHandler SECTION .text:CODE:REORDER(1) PVD_IRQHandler B PVD_IRQHandler PUBWEAK TAMPER_IRQHandler SECTION .text:CODE:REORDER(1) TAMPER_IRQHandler B TAMPER_IRQHandler PUBWEAK RTC_IRQHandler SECTION .text:CODE:REORDER(1) RTC_IRQHandler B RTC_IRQHandler PUBWEAK FLASH_IRQHandler SECTION .text:CODE:REORDER(1) FLASH_IRQHandler B FLASH_IRQHandler PUBWEAK RCC_IRQHandler SECTION .text:CODE:REORDER(1) RCC_IRQHandler B RCC_IRQHandler PUBWEAK EXTI0_IRQHandler SECTION .text:CODE:REORDER(1) EXTI0_IRQHandler B EXTI0_IRQHandler PUBWEAK EXTI1_IRQHandler SECTION .text:CODE:REORDER(1) EXTI1_IRQHandler B EXTI1_IRQHandler PUBWEAK EXTI2_IRQHandler SECTION .text:CODE:REORDER(1) EXTI2_IRQHandler B EXTI2_IRQHandler PUBWEAK EXTI3_IRQHandler SECTION .text:CODE:REORDER(1) EXTI3_IRQHandler B EXTI3_IRQHandler PUBWEAK EXTI4_IRQHandler SECTION .text:CODE:REORDER(1) EXTI4_IRQHandler B EXTI4_IRQHandler PUBWEAK DMA1_Channel1_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel1_IRQHandler B DMA1_Channel1_IRQHandler PUBWEAK DMA1_Channel2_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel2_IRQHandler B DMA1_Channel2_IRQHandler PUBWEAK DMA1_Channel3_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel3_IRQHandler B DMA1_Channel3_IRQHandler PUBWEAK DMA1_Channel4_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel4_IRQHandler B DMA1_Channel4_IRQHandler PUBWEAK DMA1_Channel5_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel5_IRQHandler B DMA1_Channel5_IRQHandler PUBWEAK DMA1_Channel6_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel6_IRQHandler B DMA1_Channel6_IRQHandler PUBWEAK DMA1_Channel7_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel7_IRQHandler B DMA1_Channel7_IRQHandler PUBWEAK ADC1_2_IRQHandler SECTION .text:CODE:REORDER(1) ADC1_2_IRQHandler B ADC1_2_IRQHandler PUBWEAK CAN1_TX_IRQHandler SECTION .text:CODE:REORDER(1) CAN1_TX_IRQHandler B CAN1_TX_IRQHandler PUBWEAK CAN1_RX0_IRQHandler SECTION .text:CODE:REORDER(1) CAN1_RX0_IRQHandler B CAN1_RX0_IRQHandler PUBWEAK CAN1_RX1_IRQHandler SECTION .text:CODE:REORDER(1) CAN1_RX1_IRQHandler B CAN1_RX1_IRQHandler PUBWEAK CAN1_SCE_IRQHandler SECTION .text:CODE:REORDER(1) CAN1_SCE_IRQHandler B CAN1_SCE_IRQHandler PUBWEAK EXTI9_5_IRQHandler SECTION .text:CODE:REORDER(1) EXTI9_5_IRQHandler B EXTI9_5_IRQHandler PUBWEAK TIM1_BRK_IRQHandler SECTION .text:CODE:REORDER(1) TIM1_BRK_IRQHandler B TIM1_BRK_IRQHandler PUBWEAK TIM1_UP_IRQHandler SECTION .text:CODE:REORDER(1) TIM1_UP_IRQHandler B TIM1_UP_IRQHandler PUBWEAK TIM1_TRG_COM_IRQHandler SECTION .text:CODE:REORDER(1) TIM1_TRG_COM_IRQHandler B TIM1_TRG_COM_IRQHandler PUBWEAK TIM1_CC_IRQHandler SECTION .text:CODE:REORDER(1) TIM1_CC_IRQHandler B TIM1_CC_IRQHandler PUBWEAK TIM2_IRQHandler SECTION .text:CODE:REORDER(1) TIM2_IRQHandler B TIM2_IRQHandler PUBWEAK TIM3_IRQHandler SECTION .text:CODE:REORDER(1) TIM3_IRQHandler B TIM3_IRQHandler PUBWEAK TIM4_IRQHandler SECTION .text:CODE:REORDER(1) TIM4_IRQHandler B TIM4_IRQHandler PUBWEAK I2C1_EV_IRQHandler SECTION .text:CODE:REORDER(1) I2C1_EV_IRQHandler B I2C1_EV_IRQHandler PUBWEAK I2C1_ER_IRQHandler SECTION .text:CODE:REORDER(1) I2C1_ER_IRQHandler B I2C1_ER_IRQHandler PUBWEAK I2C2_EV_IRQHandler SECTION .text:CODE:REORDER(1) I2C2_EV_IRQHandler B I2C2_EV_IRQHandler PUBWEAK I2C2_ER_IRQHandler SECTION .text:CODE:REORDER(1) I2C2_ER_IRQHandler B I2C2_ER_IRQHandler PUBWEAK SPI1_IRQHandler SECTION .text:CODE:REORDER(1) SPI1_IRQHandler B SPI1_IRQHandler PUBWEAK SPI2_IRQHandler SECTION .text:CODE:REORDER(1) SPI2_IRQHandler B SPI2_IRQHandler PUBWEAK USART1_IRQHandler SECTION .text:CODE:REORDER(1) USART1_IRQHandler B USART1_IRQHandler PUBWEAK USART2_IRQHandler SECTION .text:CODE:REORDER(1) USART2_IRQHandler B USART2_IRQHandler PUBWEAK USART3_IRQHandler SECTION .text:CODE:REORDER(1) USART3_IRQHandler B USART3_IRQHandler PUBWEAK EXTI15_10_IRQHandler SECTION .text:CODE:REORDER(1) EXTI15_10_IRQHandler B EXTI15_10_IRQHandler PUBWEAK RTCAlarm_IRQHandler SECTION .text:CODE:REORDER(1) RTCAlarm_IRQHandler B RTCAlarm_IRQHandler PUBWEAK OTG_FS_WKUP_IRQHandler SECTION .text:CODE:REORDER(1) OTG_FS_WKUP_IRQHandler B OTG_FS_WKUP_IRQHandler PUBWEAK TIM5_IRQHandler SECTION .text:CODE:REORDER(1) TIM5_IRQHandler B TIM5_IRQHandler PUBWEAK SPI3_IRQHandler SECTION .text:CODE:REORDER(1) SPI3_IRQHandler B SPI3_IRQHandler PUBWEAK UART4_IRQHandler SECTION .text:CODE:REORDER(1) UART4_IRQHandler B UART4_IRQHandler PUBWEAK UART5_IRQHandler SECTION .text:CODE:REORDER(1) UART5_IRQHandler B UART5_IRQHandler PUBWEAK TIM6_IRQHandler SECTION .text:CODE:REORDER(1) TIM6_IRQHandler B TIM6_IRQHandler PUBWEAK TIM7_IRQHandler SECTION .text:CODE:REORDER(1) TIM7_IRQHandler B TIM7_IRQHandler PUBWEAK DMA2_Channel1_IRQHandler SECTION .text:CODE:REORDER(1) DMA2_Channel1_IRQHandler B DMA2_Channel1_IRQHandler PUBWEAK DMA2_Channel2_IRQHandler SECTION .text:CODE:REORDER(1) DMA2_Channel2_IRQHandler B DMA2_Channel2_IRQHandler PUBWEAK DMA2_Channel3_IRQHandler SECTION .text:CODE:REORDER(1) DMA2_Channel3_IRQHandler B DMA2_Channel3_IRQHandler PUBWEAK DMA2_Channel4_IRQHandler SECTION .text:CODE:REORDER(1) DMA2_Channel4_IRQHandler B DMA2_Channel4_IRQHandler PUBWEAK DMA2_Channel5_IRQHandler SECTION .text:CODE:REORDER(1) DMA2_Channel5_IRQHandler B DMA2_Channel5_IRQHandler PUBWEAK ETH_IRQHandler SECTION .text:CODE:REORDER(1) ETH_IRQHandler B ETH_IRQHandler PUBWEAK ETH_WKUP_IRQHandler SECTION .text:CODE:REORDER(1) ETH_WKUP_IRQHandler B ETH_WKUP_IRQHandler PUBWEAK CAN2_TX_IRQHandler SECTION .text:CODE:REORDER(1) CAN2_TX_IRQHandler B CAN2_TX_IRQHandler PUBWEAK CAN2_RX0_IRQHandler SECTION .text:CODE:REORDER(1) CAN2_RX0_IRQHandler B CAN2_RX0_IRQHandler PUBWEAK CAN2_RX1_IRQHandler SECTION .text:CODE:REORDER(1) CAN2_RX1_IRQHandler B CAN2_RX1_IRQHandler PUBWEAK CAN2_SCE_IRQHandler SECTION .text:CODE:REORDER(1) CAN2_SCE_IRQHandler B CAN2_SCE_IRQHandler PUBWEAK OTG_FS_IRQHandler SECTION .text:CODE:REORDER(1) OTG_FS_IRQHandler B OTG_FS_IRQHandler END /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
10-channel-pwm-controller-stm32
trunk/libraries/startup/iar/startup_stm32f10x_cl.s
Unix Assembly
gpl3
16,626
;******************** (C) COPYRIGHT 2011 STMicroelectronics ******************** ;* File Name : startup_stm32f10x_ld_vl.s ;* Author : MCD Application Team ;* Version : V3.5.0 ;* Date : 11-March-2011 ;* Description : STM32F10x Low Density Value Line Devices vector table ;* for EWARM toolchain. ;* This module performs: ;* - Set the initial SP ;* - Configure the clock system ;* - Set the initial PC == __iar_program_start, ;* - Set the vector table entries with the exceptions ISR ;* address. ;* After Reset the Cortex-M3 processor is in Thread mode, ;* priority is Privileged, and the Stack is set to Main. ;******************************************************************************** ;* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS ;* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. ;* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, ;* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE ;* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING ;* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. ;******************************************************************************* ; ; ; The modules in this file are included in the libraries, and may be replaced ; by any user-defined modules that define the PUBLIC symbol _program_start or ; a user defined start symbol. ; To override the cstartup defined in the library, simply add your modified ; version to the workbench project. ; ; The vector table is normally located at address 0. ; When debugging in RAM, it can be located in RAM, aligned to at least 2^6. ; The name "__vector_table" has special meaning for C-SPY: ; it is where the SP start value is found, and the NVIC vector ; table register (VTOR) is initialized to this address if != 0. ; ; Cortex-M version ; MODULE ?cstartup ;; Forward declaration of sections. SECTION CSTACK:DATA:NOROOT(3) SECTION .intvec:CODE:NOROOT(2) EXTERN __iar_program_start EXTERN SystemInit PUBLIC __vector_table DATA __vector_table DCD sfe(CSTACK) DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD WWDG_IRQHandler ; Window Watchdog DCD PVD_IRQHandler ; PVD through EXTI Line detect DCD TAMPER_IRQHandler ; Tamper DCD RTC_IRQHandler ; RTC DCD FLASH_IRQHandler ; Flash DCD RCC_IRQHandler ; RCC DCD EXTI0_IRQHandler ; EXTI Line 0 DCD EXTI1_IRQHandler ; EXTI Line 1 DCD EXTI2_IRQHandler ; EXTI Line 2 DCD EXTI3_IRQHandler ; EXTI Line 3 DCD EXTI4_IRQHandler ; EXTI Line 4 DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 DCD ADC1_IRQHandler ; ADC1 DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15 DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16 DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger and Commutation and TIM17 DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare DCD TIM2_IRQHandler ; TIM2 DCD TIM3_IRQHandler ; TIM3 DCD 0 ; Reserved DCD I2C1_EV_IRQHandler ; I2C1 Event DCD I2C1_ER_IRQHandler ; I2C1 Error DCD 0 ; Reserved DCD 0 ; Reserved DCD SPI1_IRQHandler ; SPI1 DCD 0 ; Reserved DCD USART1_IRQHandler ; USART1 DCD USART2_IRQHandler ; USART2 DCD 0 ; Reserved DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line DCD CEC_IRQHandler ; HDMI-CEC DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD TIM6_DAC_IRQHandler ; TIM6 and DAC underrun DCD TIM7_IRQHandler ; TIM7 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; ;; Default interrupt handlers. ;; THUMB PUBWEAK Reset_Handler SECTION .text:CODE:REORDER(2) Reset_Handler LDR R0, =SystemInit BLX R0 LDR R0, =__iar_program_start BX R0 PUBWEAK NMI_Handler SECTION .text:CODE:REORDER(1) NMI_Handler B NMI_Handler PUBWEAK HardFault_Handler SECTION .text:CODE:REORDER(1) HardFault_Handler B HardFault_Handler PUBWEAK MemManage_Handler SECTION .text:CODE:REORDER(1) MemManage_Handler B MemManage_Handler PUBWEAK BusFault_Handler SECTION .text:CODE:REORDER(1) BusFault_Handler B BusFault_Handler PUBWEAK UsageFault_Handler SECTION .text:CODE:REORDER(1) UsageFault_Handler B UsageFault_Handler PUBWEAK SVC_Handler SECTION .text:CODE:REORDER(1) SVC_Handler B SVC_Handler PUBWEAK DebugMon_Handler SECTION .text:CODE:REORDER(1) DebugMon_Handler B DebugMon_Handler PUBWEAK PendSV_Handler SECTION .text:CODE:REORDER(1) PendSV_Handler B PendSV_Handler PUBWEAK SysTick_Handler SECTION .text:CODE:REORDER(1) SysTick_Handler B SysTick_Handler PUBWEAK WWDG_IRQHandler SECTION .text:CODE:REORDER(1) WWDG_IRQHandler B WWDG_IRQHandler PUBWEAK PVD_IRQHandler SECTION .text:CODE:REORDER(1) PVD_IRQHandler B PVD_IRQHandler PUBWEAK TAMPER_IRQHandler SECTION .text:CODE:REORDER(1) TAMPER_IRQHandler B TAMPER_IRQHandler PUBWEAK RTC_IRQHandler SECTION .text:CODE:REORDER(1) RTC_IRQHandler B RTC_IRQHandler PUBWEAK FLASH_IRQHandler SECTION .text:CODE:REORDER(1) FLASH_IRQHandler B FLASH_IRQHandler PUBWEAK RCC_IRQHandler SECTION .text:CODE:REORDER(1) RCC_IRQHandler B RCC_IRQHandler PUBWEAK EXTI0_IRQHandler SECTION .text:CODE:REORDER(1) EXTI0_IRQHandler B EXTI0_IRQHandler PUBWEAK EXTI1_IRQHandler SECTION .text:CODE:REORDER(1) EXTI1_IRQHandler B EXTI1_IRQHandler PUBWEAK EXTI2_IRQHandler SECTION .text:CODE:REORDER(1) EXTI2_IRQHandler B EXTI2_IRQHandler PUBWEAK EXTI3_IRQHandler SECTION .text:CODE:REORDER(1) EXTI3_IRQHandler B EXTI3_IRQHandler PUBWEAK EXTI4_IRQHandler SECTION .text:CODE:REORDER(1) EXTI4_IRQHandler B EXTI4_IRQHandler PUBWEAK DMA1_Channel1_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel1_IRQHandler B DMA1_Channel1_IRQHandler PUBWEAK DMA1_Channel2_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel2_IRQHandler B DMA1_Channel2_IRQHandler PUBWEAK DMA1_Channel3_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel3_IRQHandler B DMA1_Channel3_IRQHandler PUBWEAK DMA1_Channel4_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel4_IRQHandler B DMA1_Channel4_IRQHandler PUBWEAK DMA1_Channel5_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel5_IRQHandler B DMA1_Channel5_IRQHandler PUBWEAK DMA1_Channel6_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel6_IRQHandler B DMA1_Channel6_IRQHandler PUBWEAK DMA1_Channel7_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel7_IRQHandler B DMA1_Channel7_IRQHandler PUBWEAK ADC1_IRQHandler SECTION .text:CODE:REORDER(1) ADC1_IRQHandler B ADC1_IRQHandler PUBWEAK EXTI9_5_IRQHandler SECTION .text:CODE:REORDER(1) EXTI9_5_IRQHandler B EXTI9_5_IRQHandler PUBWEAK TIM1_BRK_TIM15_IRQHandler SECTION .text:CODE:REORDER(1) TIM1_BRK_TIM15_IRQHandler B TIM1_BRK_TIM15_IRQHandler PUBWEAK TIM1_UP_TIM16_IRQHandler SECTION .text:CODE:REORDER(1) TIM1_UP_TIM16_IRQHandler B TIM1_UP_TIM16_IRQHandler PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler SECTION .text:CODE:REORDER(1) TIM1_TRG_COM_TIM17_IRQHandler B TIM1_TRG_COM_TIM17_IRQHandler PUBWEAK TIM1_CC_IRQHandler SECTION .text:CODE:REORDER(1) TIM1_CC_IRQHandler B TIM1_CC_IRQHandler PUBWEAK TIM2_IRQHandler SECTION .text:CODE:REORDER(1) TIM2_IRQHandler B TIM2_IRQHandler PUBWEAK TIM3_IRQHandler SECTION .text:CODE:REORDER(1) TIM3_IRQHandler B TIM3_IRQHandler PUBWEAK I2C1_EV_IRQHandler SECTION .text:CODE:REORDER(1) I2C1_EV_IRQHandler B I2C1_EV_IRQHandler PUBWEAK I2C1_ER_IRQHandler SECTION .text:CODE:REORDER(1) I2C1_ER_IRQHandler B I2C1_ER_IRQHandler PUBWEAK SPI1_IRQHandler SECTION .text:CODE:REORDER(1) SPI1_IRQHandler B SPI1_IRQHandler PUBWEAK USART1_IRQHandler SECTION .text:CODE:REORDER(1) USART1_IRQHandler B USART1_IRQHandler PUBWEAK USART2_IRQHandler SECTION .text:CODE:REORDER(1) USART2_IRQHandler B USART2_IRQHandler PUBWEAK EXTI15_10_IRQHandler SECTION .text:CODE:REORDER(1) EXTI15_10_IRQHandler B EXTI15_10_IRQHandler PUBWEAK RTCAlarm_IRQHandler SECTION .text:CODE:REORDER(1) RTCAlarm_IRQHandler B RTCAlarm_IRQHandler PUBWEAK CEC_IRQHandler SECTION .text:CODE:REORDER(1) CEC_IRQHandler B CEC_IRQHandler PUBWEAK TIM6_DAC_IRQHandler SECTION .text:CODE:REORDER(1) TIM6_DAC_IRQHandler B TIM6_DAC_IRQHandler PUBWEAK TIM7_IRQHandler SECTION .text:CODE:REORDER(1) TIM7_IRQHandler B TIM7_IRQHandler END /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
10-channel-pwm-controller-stm32
trunk/libraries/startup/iar/startup_stm32f10x_ld_vl.s
Unix Assembly
gpl3
12,950
;******************** (C) COPYRIGHT 2011 STMicroelectronics ******************** ;* File Name : startup_stm32f10x_md_vl.s ;* Author : MCD Application Team ;* Version : V3.5.0 ;* Date : 11-March-2011 ;* Description : STM32F10x Medium Density Value Line Devices vector table ;* for EWARM toolchain. ;* This module performs: ;* - Set the initial SP ;* - Configure the clock system ;* - Set the initial PC == __iar_program_start, ;* - Set the vector table entries with the exceptions ISR ;* address. ;* After Reset the Cortex-M3 processor is in Thread mode, ;* priority is Privileged, and the Stack is set to Main. ;******************************************************************************** ;* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS ;* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. ;* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, ;* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE ;* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING ;* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. ;******************************************************************************* ; ; ; The modules in this file are included in the libraries, and may be replaced ; by any user-defined modules that define the PUBLIC symbol _program_start or ; a user defined start symbol. ; To override the cstartup defined in the library, simply add your modified ; version to the workbench project. ; ; The vector table is normally located at address 0. ; When debugging in RAM, it can be located in RAM, aligned to at least 2^6. ; The name "__vector_table" has special meaning for C-SPY: ; it is where the SP start value is found, and the NVIC vector ; table register (VTOR) is initialized to this address if != 0. ; ; Cortex-M version ; MODULE ?cstartup ;; Forward declaration of sections. SECTION CSTACK:DATA:NOROOT(3) SECTION .intvec:CODE:NOROOT(2) EXTERN __iar_program_start EXTERN SystemInit PUBLIC __vector_table DATA __vector_table DCD sfe(CSTACK) DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD WWDG_IRQHandler ; Window Watchdog DCD PVD_IRQHandler ; PVD through EXTI Line detect DCD TAMPER_IRQHandler ; Tamper DCD RTC_IRQHandler ; RTC DCD FLASH_IRQHandler ; Flash DCD RCC_IRQHandler ; RCC DCD EXTI0_IRQHandler ; EXTI Line 0 DCD EXTI1_IRQHandler ; EXTI Line 1 DCD EXTI2_IRQHandler ; EXTI Line 2 DCD EXTI3_IRQHandler ; EXTI Line 3 DCD EXTI4_IRQHandler ; EXTI Line 4 DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 DCD ADC1_IRQHandler ; ADC1 DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15 DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16 DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger and Commutation and TIM17 DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare DCD TIM2_IRQHandler ; TIM2 DCD TIM3_IRQHandler ; TIM3 DCD TIM4_IRQHandler ; TIM4 DCD I2C1_EV_IRQHandler ; I2C1 Event DCD I2C1_ER_IRQHandler ; I2C1 Error DCD I2C2_EV_IRQHandler ; I2C2 Event DCD I2C2_ER_IRQHandler ; I2C2 Error DCD SPI1_IRQHandler ; SPI1 DCD SPI2_IRQHandler ; SPI2 DCD USART1_IRQHandler ; USART1 DCD USART2_IRQHandler ; USART2 DCD USART3_IRQHandler ; USART3 DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line DCD CEC_IRQHandler ; HDMI-CEC DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD TIM6_DAC_IRQHandler ; TIM6 and DAC underrun DCD TIM7_IRQHandler ; TIM7 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; ;; Default interrupt handlers. ;; THUMB PUBWEAK Reset_Handler SECTION .text:CODE:REORDER(2) Reset_Handler LDR R0, =SystemInit BLX R0 LDR R0, =__iar_program_start BX R0 PUBWEAK NMI_Handler SECTION .text:CODE:REORDER(1) NMI_Handler B NMI_Handler PUBWEAK HardFault_Handler SECTION .text:CODE:REORDER(1) HardFault_Handler B HardFault_Handler PUBWEAK MemManage_Handler SECTION .text:CODE:REORDER(1) MemManage_Handler B MemManage_Handler PUBWEAK BusFault_Handler SECTION .text:CODE:REORDER(1) BusFault_Handler B BusFault_Handler PUBWEAK UsageFault_Handler SECTION .text:CODE:REORDER(1) UsageFault_Handler B UsageFault_Handler PUBWEAK SVC_Handler SECTION .text:CODE:REORDER(1) SVC_Handler B SVC_Handler PUBWEAK DebugMon_Handler SECTION .text:CODE:REORDER(1) DebugMon_Handler B DebugMon_Handler PUBWEAK PendSV_Handler SECTION .text:CODE:REORDER(1) PendSV_Handler B PendSV_Handler PUBWEAK SysTick_Handler SECTION .text:CODE:REORDER(1) SysTick_Handler B SysTick_Handler PUBWEAK WWDG_IRQHandler SECTION .text:CODE:REORDER(1) WWDG_IRQHandler B WWDG_IRQHandler PUBWEAK PVD_IRQHandler SECTION .text:CODE:REORDER(1) PVD_IRQHandler B PVD_IRQHandler PUBWEAK TAMPER_IRQHandler SECTION .text:CODE:REORDER(1) TAMPER_IRQHandler B TAMPER_IRQHandler PUBWEAK RTC_IRQHandler SECTION .text:CODE:REORDER(1) RTC_IRQHandler B RTC_IRQHandler PUBWEAK FLASH_IRQHandler SECTION .text:CODE:REORDER(1) FLASH_IRQHandler B FLASH_IRQHandler PUBWEAK RCC_IRQHandler SECTION .text:CODE:REORDER(1) RCC_IRQHandler B RCC_IRQHandler PUBWEAK EXTI0_IRQHandler SECTION .text:CODE:REORDER(1) EXTI0_IRQHandler B EXTI0_IRQHandler PUBWEAK EXTI1_IRQHandler SECTION .text:CODE:REORDER(1) EXTI1_IRQHandler B EXTI1_IRQHandler PUBWEAK EXTI2_IRQHandler SECTION .text:CODE:REORDER(1) EXTI2_IRQHandler B EXTI2_IRQHandler PUBWEAK EXTI3_IRQHandler SECTION .text:CODE:REORDER(1) EXTI3_IRQHandler B EXTI3_IRQHandler PUBWEAK EXTI4_IRQHandler SECTION .text:CODE:REORDER(1) EXTI4_IRQHandler B EXTI4_IRQHandler PUBWEAK DMA1_Channel1_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel1_IRQHandler B DMA1_Channel1_IRQHandler PUBWEAK DMA1_Channel2_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel2_IRQHandler B DMA1_Channel2_IRQHandler PUBWEAK DMA1_Channel3_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel3_IRQHandler B DMA1_Channel3_IRQHandler PUBWEAK DMA1_Channel4_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel4_IRQHandler B DMA1_Channel4_IRQHandler PUBWEAK DMA1_Channel5_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel5_IRQHandler B DMA1_Channel5_IRQHandler PUBWEAK DMA1_Channel6_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel6_IRQHandler B DMA1_Channel6_IRQHandler PUBWEAK DMA1_Channel7_IRQHandler SECTION .text:CODE:REORDER(1) DMA1_Channel7_IRQHandler B DMA1_Channel7_IRQHandler PUBWEAK ADC1_IRQHandler SECTION .text:CODE:REORDER(1) ADC1_IRQHandler B ADC1_IRQHandler PUBWEAK EXTI9_5_IRQHandler SECTION .text:CODE:REORDER(1) EXTI9_5_IRQHandler B EXTI9_5_IRQHandler PUBWEAK TIM1_BRK_TIM15_IRQHandler SECTION .text:CODE:REORDER(1) TIM1_BRK_TIM15_IRQHandler B TIM1_BRK_TIM15_IRQHandler PUBWEAK TIM1_UP_TIM16_IRQHandler SECTION .text:CODE:REORDER(1) TIM1_UP_TIM16_IRQHandler B TIM1_UP_TIM16_IRQHandler PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler SECTION .text:CODE:REORDER(1) TIM1_TRG_COM_TIM17_IRQHandler B TIM1_TRG_COM_TIM17_IRQHandler PUBWEAK TIM1_CC_IRQHandler SECTION .text:CODE:REORDER(1) TIM1_CC_IRQHandler B TIM1_CC_IRQHandler PUBWEAK TIM2_IRQHandler SECTION .text:CODE:REORDER(1) TIM2_IRQHandler B TIM2_IRQHandler PUBWEAK TIM3_IRQHandler SECTION .text:CODE:REORDER(1) TIM3_IRQHandler B TIM3_IRQHandler PUBWEAK TIM4_IRQHandler SECTION .text:CODE:REORDER(1) TIM4_IRQHandler B TIM4_IRQHandler PUBWEAK I2C1_EV_IRQHandler SECTION .text:CODE:REORDER(1) I2C1_EV_IRQHandler B I2C1_EV_IRQHandler PUBWEAK I2C1_ER_IRQHandler SECTION .text:CODE:REORDER(1) I2C1_ER_IRQHandler B I2C1_ER_IRQHandler PUBWEAK I2C2_EV_IRQHandler SECTION .text:CODE:REORDER(1) I2C2_EV_IRQHandler B I2C2_EV_IRQHandler PUBWEAK I2C2_ER_IRQHandler SECTION .text:CODE:REORDER(1) I2C2_ER_IRQHandler B I2C2_ER_IRQHandler PUBWEAK SPI1_IRQHandler SECTION .text:CODE:REORDER(1) SPI1_IRQHandler B SPI1_IRQHandler PUBWEAK SPI2_IRQHandler SECTION .text:CODE:REORDER(1) SPI2_IRQHandler B SPI2_IRQHandler PUBWEAK USART1_IRQHandler SECTION .text:CODE:REORDER(1) USART1_IRQHandler B USART1_IRQHandler PUBWEAK USART2_IRQHandler SECTION .text:CODE:REORDER(1) USART2_IRQHandler B USART2_IRQHandler PUBWEAK USART3_IRQHandler SECTION .text:CODE:REORDER(1) USART3_IRQHandler B USART3_IRQHandler PUBWEAK EXTI15_10_IRQHandler SECTION .text:CODE:REORDER(1) EXTI15_10_IRQHandler B EXTI15_10_IRQHandler PUBWEAK RTCAlarm_IRQHandler SECTION .text:CODE:REORDER(1) RTCAlarm_IRQHandler B RTCAlarm_IRQHandler PUBWEAK CEC_IRQHandler SECTION .text:CODE:REORDER(1) CEC_IRQHandler B CEC_IRQHandler PUBWEAK TIM6_DAC_IRQHandler SECTION .text:CODE:REORDER(1) TIM6_DAC_IRQHandler B TIM6_DAC_IRQHandler PUBWEAK TIM7_IRQHandler SECTION .text:CODE:REORDER(1) TIM7_IRQHandler B TIM7_IRQHandler END /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
10-channel-pwm-controller-stm32
trunk/libraries/startup/iar/startup_stm32f10x_md_vl.s
Unix Assembly
gpl3
13,601
;******************** (C) COPYRIGHT 2011 STMicroelectronics ******************** ;* File Name : startup_stm32f10x_hd.s ;* Author : MCD Application Team ;* Version : V3.5.0 ;* Date : 11-March-2011 ;* Description : STM32F10x High Density Devices vector table for MDK-ARM ;* toolchain. ;* This module performs: ;* - Set the initial SP ;* - Set the initial PC == Reset_Handler ;* - Set the vector table entries with the exceptions ISR address ;* - Configure the clock system and also configure the external ;* SRAM mounted on STM3210E-EVAL board to be used as data ;* memory (optional, to be enabled by user) ;* - Branches to __main in the C library (which eventually ;* calls main()). ;* After Reset the CortexM3 processor is in Thread mode, ;* priority is Privileged, and the Stack is set to Main. ;* <<< Use Configuration Wizard in Context Menu >>> ;******************************************************************************* ; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS ; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. ; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, ; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE ; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING ; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. ;******************************************************************************* ; Amount of memory (in bytes) allocated for Stack ; Tailor this value to your application needs ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000200 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD WWDG_IRQHandler ; Window Watchdog DCD PVD_IRQHandler ; PVD through EXTI Line detect DCD TAMPER_IRQHandler ; Tamper DCD RTC_IRQHandler ; RTC DCD FLASH_IRQHandler ; Flash DCD RCC_IRQHandler ; RCC DCD EXTI0_IRQHandler ; EXTI Line 0 DCD EXTI1_IRQHandler ; EXTI Line 1 DCD EXTI2_IRQHandler ; EXTI Line 2 DCD EXTI3_IRQHandler ; EXTI Line 3 DCD EXTI4_IRQHandler ; EXTI Line 4 DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 DCD ADC1_2_IRQHandler ; ADC1 & ADC2 DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0 DCD CAN1_RX1_IRQHandler ; CAN1 RX1 DCD CAN1_SCE_IRQHandler ; CAN1 SCE DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 DCD TIM1_BRK_IRQHandler ; TIM1 Break DCD TIM1_UP_IRQHandler ; TIM1 Update DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare DCD TIM2_IRQHandler ; TIM2 DCD TIM3_IRQHandler ; TIM3 DCD TIM4_IRQHandler ; TIM4 DCD I2C1_EV_IRQHandler ; I2C1 Event DCD I2C1_ER_IRQHandler ; I2C1 Error DCD I2C2_EV_IRQHandler ; I2C2 Event DCD I2C2_ER_IRQHandler ; I2C2 Error DCD SPI1_IRQHandler ; SPI1 DCD SPI2_IRQHandler ; SPI2 DCD USART1_IRQHandler ; USART1 DCD USART2_IRQHandler ; USART2 DCD USART3_IRQHandler ; USART3 DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend DCD TIM8_BRK_IRQHandler ; TIM8 Break DCD TIM8_UP_IRQHandler ; TIM8 Update DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger and Commutation DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare DCD ADC3_IRQHandler ; ADC3 DCD FSMC_IRQHandler ; FSMC DCD SDIO_IRQHandler ; SDIO DCD TIM5_IRQHandler ; TIM5 DCD SPI3_IRQHandler ; SPI3 DCD UART4_IRQHandler ; UART4 DCD UART5_IRQHandler ; UART5 DCD TIM6_IRQHandler ; TIM6 DCD TIM7_IRQHandler ; TIM7 DCD DMA2_Channel1_IRQHandler ; DMA2 Channel1 DCD DMA2_Channel2_IRQHandler ; DMA2 Channel2 DCD DMA2_Channel3_IRQHandler ; DMA2 Channel3 DCD DMA2_Channel4_5_IRQHandler ; DMA2 Channel4 & Channel5 __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA |.text|, CODE, READONLY ; Reset handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT __main IMPORT SystemInit LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP MemManage_Handler\ PROC EXPORT MemManage_Handler [WEAK] B . ENDP BusFault_Handler\ PROC EXPORT BusFault_Handler [WEAK] B . ENDP UsageFault_Handler\ PROC EXPORT UsageFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP DebugMon_Handler\ PROC EXPORT DebugMon_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT WWDG_IRQHandler [WEAK] EXPORT PVD_IRQHandler [WEAK] EXPORT TAMPER_IRQHandler [WEAK] EXPORT RTC_IRQHandler [WEAK] EXPORT FLASH_IRQHandler [WEAK] EXPORT RCC_IRQHandler [WEAK] EXPORT EXTI0_IRQHandler [WEAK] EXPORT EXTI1_IRQHandler [WEAK] EXPORT EXTI2_IRQHandler [WEAK] EXPORT EXTI3_IRQHandler [WEAK] EXPORT EXTI4_IRQHandler [WEAK] EXPORT DMA1_Channel1_IRQHandler [WEAK] EXPORT DMA1_Channel2_IRQHandler [WEAK] EXPORT DMA1_Channel3_IRQHandler [WEAK] EXPORT DMA1_Channel4_IRQHandler [WEAK] EXPORT DMA1_Channel5_IRQHandler [WEAK] EXPORT DMA1_Channel6_IRQHandler [WEAK] EXPORT DMA1_Channel7_IRQHandler [WEAK] EXPORT ADC1_2_IRQHandler [WEAK] EXPORT USB_HP_CAN1_TX_IRQHandler [WEAK] EXPORT USB_LP_CAN1_RX0_IRQHandler [WEAK] EXPORT CAN1_RX1_IRQHandler [WEAK] EXPORT CAN1_SCE_IRQHandler [WEAK] EXPORT EXTI9_5_IRQHandler [WEAK] EXPORT TIM1_BRK_IRQHandler [WEAK] EXPORT TIM1_UP_IRQHandler [WEAK] EXPORT TIM1_TRG_COM_IRQHandler [WEAK] EXPORT TIM1_CC_IRQHandler [WEAK] EXPORT TIM2_IRQHandler [WEAK] EXPORT TIM3_IRQHandler [WEAK] EXPORT TIM4_IRQHandler [WEAK] EXPORT I2C1_EV_IRQHandler [WEAK] EXPORT I2C1_ER_IRQHandler [WEAK] EXPORT I2C2_EV_IRQHandler [WEAK] EXPORT I2C2_ER_IRQHandler [WEAK] EXPORT SPI1_IRQHandler [WEAK] EXPORT SPI2_IRQHandler [WEAK] EXPORT USART1_IRQHandler [WEAK] EXPORT USART2_IRQHandler [WEAK] EXPORT USART3_IRQHandler [WEAK] EXPORT EXTI15_10_IRQHandler [WEAK] EXPORT RTCAlarm_IRQHandler [WEAK] EXPORT USBWakeUp_IRQHandler [WEAK] EXPORT TIM8_BRK_IRQHandler [WEAK] EXPORT TIM8_UP_IRQHandler [WEAK] EXPORT TIM8_TRG_COM_IRQHandler [WEAK] EXPORT TIM8_CC_IRQHandler [WEAK] EXPORT ADC3_IRQHandler [WEAK] EXPORT FSMC_IRQHandler [WEAK] EXPORT SDIO_IRQHandler [WEAK] EXPORT TIM5_IRQHandler [WEAK] EXPORT SPI3_IRQHandler [WEAK] EXPORT UART4_IRQHandler [WEAK] EXPORT UART5_IRQHandler [WEAK] EXPORT TIM6_IRQHandler [WEAK] EXPORT TIM7_IRQHandler [WEAK] EXPORT DMA2_Channel1_IRQHandler [WEAK] EXPORT DMA2_Channel2_IRQHandler [WEAK] EXPORT DMA2_Channel3_IRQHandler [WEAK] EXPORT DMA2_Channel4_5_IRQHandler [WEAK] WWDG_IRQHandler PVD_IRQHandler TAMPER_IRQHandler RTC_IRQHandler FLASH_IRQHandler RCC_IRQHandler EXTI0_IRQHandler EXTI1_IRQHandler EXTI2_IRQHandler EXTI3_IRQHandler EXTI4_IRQHandler DMA1_Channel1_IRQHandler DMA1_Channel2_IRQHandler DMA1_Channel3_IRQHandler DMA1_Channel4_IRQHandler DMA1_Channel5_IRQHandler DMA1_Channel6_IRQHandler DMA1_Channel7_IRQHandler ADC1_2_IRQHandler USB_HP_CAN1_TX_IRQHandler USB_LP_CAN1_RX0_IRQHandler CAN1_RX1_IRQHandler CAN1_SCE_IRQHandler EXTI9_5_IRQHandler TIM1_BRK_IRQHandler TIM1_UP_IRQHandler TIM1_TRG_COM_IRQHandler TIM1_CC_IRQHandler TIM2_IRQHandler TIM3_IRQHandler TIM4_IRQHandler I2C1_EV_IRQHandler I2C1_ER_IRQHandler I2C2_EV_IRQHandler I2C2_ER_IRQHandler SPI1_IRQHandler SPI2_IRQHandler USART1_IRQHandler USART2_IRQHandler USART3_IRQHandler EXTI15_10_IRQHandler RTCAlarm_IRQHandler USBWakeUp_IRQHandler TIM8_BRK_IRQHandler TIM8_UP_IRQHandler TIM8_TRG_COM_IRQHandler TIM8_CC_IRQHandler ADC3_IRQHandler FSMC_IRQHandler SDIO_IRQHandler TIM5_IRQHandler SPI3_IRQHandler UART4_IRQHandler UART5_IRQHandler TIM6_IRQHandler TIM7_IRQHandler DMA2_Channel1_IRQHandler DMA2_Channel2_IRQHandler DMA2_Channel3_IRQHandler DMA2_Channel4_5_IRQHandler B . ENDP ALIGN ;******************************************************************************* ; User Stack and Heap initialization ;******************************************************************************* IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END ;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE*****
10-channel-pwm-controller-stm32
trunk/Startup/startup_stm32f10x_hd.s
Unix Assembly
gpl3
15,503
#include "stm32F10x.h" #include "delay.h" void RCC_Configuration(void); void GPIO_Configuration(void); void NVIC_Configuration(void); void TIM3_Configuration(void); u8 forwarding; u8 start; u8 stopping; volatile float current_angle[10] = {0,0,0,0,0,0,0,0,0,0}; // +/- 90 degrees, use floats for fractional volatile float delta_angle[10]={0,0,0,0,0,0,0,0,0}; volatile float init_angle[10]= {50,-2,0,10,-15,0,10,-60,45,0}; u32 left_step[10]={0,0,0,0,0,0,0,0,0}; void TIM3_IRQHandler(void) { if(GPIO_ReadInputDataBit(GPIOD,GPIO_Pin_1)) { forwarding=1; start=1; stopping=1; } else { stopping=1;forwarding=0;} if (TIM_GetITStatus(TIM3, TIM_IT_Update) != RESET) { TIM_ClearITPendingBit(TIM3, TIM_IT_Update); if(left_step[1]){ current_angle[1]+= delta_angle[1]; --left_step[1]; } if(left_step[3]){ current_angle[3]+= delta_angle[3]; --left_step[3]; } if(left_step[5]){ current_angle[5]+= delta_angle[5]; --left_step[5]; } if(left_step[7]){ current_angle[7]+= delta_angle[7]; --left_step[7]; } // minimum high of 600 us for -90 Degrees, with +90 degrees at 2400 us, 10 us per degree // timer timebase set to us units to simplify the configuration/math TIM3->CCR1 = 600 + ((current_angle[1] + 90) * 10); // where angle is an int -90 to +90 degrees, PC.6 TIM3->CCR2 = 600 + ((current_angle[3] + 90) * 10); // where angle is an int -90 to +90 degrees, PC.7 TIM3->CCR3 = 600 + ((current_angle[5] + 90) * 10); // where angle is an int -90 to +90 degrees, PC.8 TIM3->CCR4 = 600 + ((current_angle[7] + 90) * 10); // where angle is an int -90 to +90 degrees, PC.9 } } void TIM4_IRQHandler(void) { if (TIM_GetITStatus(TIM4, TIM_IT_Update) != RESET) { TIM_ClearITPendingBit(TIM4, TIM_IT_Update); if(left_step[0]){ current_angle[0]+= delta_angle[0]; --left_step[0]; } if(left_step[2]){ current_angle[2]+= delta_angle[2]; --left_step[2]; } if(left_step[4]){ current_angle[4]+= delta_angle[4]; --left_step[4]; } if(left_step[6]){ current_angle[6]+= delta_angle[6]; --left_step[6]; } // minimum high of 600 us for -90 degrees, with +90 degrees at 2400 us, 10 us per degree // timer timebase set to us units to simplify the configuration/math TIM4->CCR1 = 600 + ((current_angle[0] + 90) * 10); // where angle is an int -90 to +90 degrees, PB.6 TIM4->CCR2 = 600 + ((current_angle[2] + 90) * 10); // where angle is an int -90 to +90 degrees, PB.7 TIM4->CCR3 = 600 + ((current_angle[4] + 90) * 10); // where angle is an int -90 to +90 degrees, PB.8 TIM4->CCR4 = 600 + ((current_angle[6] + 90) * 10); // where angle is an int -90 to +90 degrees, PB.8 } } void TIM5_IRQHandler(void) { if (TIM_GetITStatus(TIM5, TIM_IT_Update) != RESET) { TIM_ClearITPendingBit(TIM5, TIM_IT_Update); if(left_step[8]){ current_angle[8]+= delta_angle[8]; --left_step[8]; } if(left_step[9]){ current_angle[9]+= delta_angle[9]; --left_step[9]; } // minimum high of 600 us for -90 degrees, with +90 degrees at 2400 us, 10 us per degree // timer timebase set to us units to simplify the configuration/math TIM5->CCR1 = 600 + ((current_angle[8] + 90) * 10); // where angle is an int -90 to +90 degrees, PB.6 TIM5->CCR2 = 600 + ((current_angle[9] + 90) * 10); // where angle is an int -90 to +90 degrees, PB.7 } } void delay_quartersecond(u16 n) { u16 i; for(i=0;i<n;i++) delay_ms(250); } void smooth(int channel, volatile float target, u32 lefttime) { delta_angle[channel]=(target+init_angle[channel]-current_angle[channel])/(lefttime/20); left_step[channel]= (lefttime/20); } // void rough(int channel, volatile float target) { left_step[channel]=0; current_angle[channel]=target+init_angle[channel]; } void standsteady() { rough(0,0); rough(1,0); rough(2,0); rough(3,0); rough(4,-5); rough(5,5); rough(6,15); rough(7,-12); rough(9,-5); rough(8,5); } void standsteadyslow() { smooth(0,0,1000); smooth(1,0,1000); smooth(2,0,1000); smooth(3,0,1000); smooth(4,-5,1000); smooth(5,5,1000); smooth(6,5,1000); smooth(7,-8,1000); smooth(9,-10,1000); smooth(8,10,1000); } void stop() { forwarding=0; if(stopping) { standsteadyslow(); } } void bend() { int i = 3; while(i) { i--; smooth(4,30,1500); smooth(5,-30,1500); delay_quartersecond(8); smooth(7,30,500); smooth(6,-30,500); delay_quartersecond(8); standsteadyslow(); delay_quartersecond(8); } } void show() { smooth(1,10,500); smooth(0,-15,500); delay_quartersecond(8); smooth(4,-80,1500); smooth(6,-60,1500); delay_quartersecond(2); rough(7,0); delay_quartersecond(2); rough(5,15); rough(3,-5); rough(8,20); rough(9,-20); delay_quartersecond(1); smooth(2,-30,1500); smooth(6,-70,1500); delay_quartersecond(8); smooth(0,25,1000); delay_quartersecond(8); smooth(0,-10,1000); delay_quartersecond(8); smooth(2,0,1000); delay_quartersecond(8); smooth(2,-30,1000); delay_quartersecond(8); } void forward() { if(forwarding) { if(start) { rough(7,15); rough(6,-15); smooth(0,30,500); delay_quartersecond(1); rough(6, -80); smooth(4, -40,500); delay_quartersecond(1); smooth(7,20,500); smooth(5,-30,500); smooth(0,0,500); rough(9,-10); rough(8,10); //³õʼ°ë²½ delay_quartersecond(8); smooth(0,-15,700); rough(1,-5); start = 0; //smooth(3,5,500); //ÖØÐÄ×óÆ« } delay_quartersecond(2); rough(5,80); rough(3,30); //µÅÍÈ rough(9,-10); rough(8,10); //ŤÑü rough(6,-20); rough(4,-5); rough(2,5); //×óÍÈÁ¢Ö± delay_quartersecond(1); rough(7,55); delay_quartersecond(1); rough(3,-20); rough(9,-10); rough(5,30); delay_quartersecond(1); rough(4,20); //rough(7,30); rough(3,-0); delay_quartersecond(1); smooth(0,8,1000); smooth(1,5,1000); //µÚ¶þ²½ delay_quartersecond(8); //ÖØÐÄ×óÆ« smooth(0,0,700); rough(5,10); delay_quartersecond(2); rough(7,40); rough(8,10); rough(9,-10); rough(0,-5); delay_quartersecond(1); rough(4,-85); rough(2,0); rough(9,-10); rough(8,10); rough(6,-55); //µÅÍÈ delay_quartersecond(2); rough(9,-10); rough(7,0); rough(8,20); delay_quartersecond(2); rough(5,5); rough(7,0); //delay_quartersecond(1); rough(1,9); rough(0,5); rough(4,-30); smooth(2,10,500); delay_quartersecond(2); smooth(3,20,500); delay_quartersecond(4); smooth(1,-15,700); rough(0,-5); //rough(5,-20); delay_quartersecond(12); rough(7,20); rough(6,-70); rough(0,-15); rough(1,-5); rough(5,-30); rough(4,-40); } } int main(void) { stopping=0; delay_init(72); RCC_Configuration(); GPIO_Configuration(); NVIC_Configuration(); TIM3_Configuration(); standsteady(); delay_quartersecond(8); bend(); delay_quartersecond(8); standsteadyslow(); forwarding=0; while(1) { forward(); forward(); forward(); stop(); } } /**************************************************************************************/ void RCC_Configuration(void) { RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB| RCC_APB2Periph_GPIOC |RCC_APB2Periph_GPIOD|RCC_APB2Periph_GPIOG| RCC_APB2Periph_AFIO, ENABLE); RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3, ENABLE); RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4, ENABLE); RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM5, ENABLE); } /**************************************************************************************/ void NVIC_Configuration(void) { NVIC_InitTypeDef NVIC_InitStructure; NVIC_PriorityGroupConfig(NVIC_PriorityGroup_0); NVIC_InitStructure.NVIC_IRQChannel = TIM3_IRQn; NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; NVIC_Init(&NVIC_InitStructure); NVIC_InitStructure.NVIC_IRQChannel = TIM4_IRQn; NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; NVIC_Init(&NVIC_InitStructure); NVIC_InitStructure.NVIC_IRQChannel = TIM5_IRQn; NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; NVIC_Init(&NVIC_InitStructure); } /**************************************************************************************/ void GPIO_Configuration(void) { GPIO_InitTypeDef GPIO_InitStructure; // PC.06 TIM3_CH1 // PC.07 TIM3_CH2 // PC.08 TIM3_CH3 // PC.09 TIM3_CH4 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6 |GPIO_Pin_7 |GPIO_Pin_8 |GPIO_Pin_9; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; GPIO_Init(GPIOC, &GPIO_InitStructure); GPIO_PinRemapConfig(GPIO_FullRemap_TIM3,ENABLE); // PB.06 TIM4_CH1 // PB.07 TIM4_CH1 // PB.08 TIM4_CH1 // PB.09 TIM4_CH1 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6 |GPIO_Pin_7 |GPIO_Pin_8 |GPIO_Pin_9; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; GPIO_Init(GPIOB, &GPIO_InitStructure); GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 |GPIO_Pin_1; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; GPIO_Init(GPIOA, &GPIO_InitStructure); GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1|GPIO_Pin_0; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPD; GPIO_Init(GPIOD, &GPIO_InitStructure); } /**************************************************************************************/ void TIM3_Configuration(void) { TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure; TIM_OCInitTypeDef TIM_OCInitStructure; TIM_TimeBaseStructure.TIM_Prescaler = 72 - 1; // 24 MHz / 24 = 1 MHz TIM_TimeBaseStructure.TIM_Period = 20000 - 1; // 1 MHz / 20000 = 50 Hz (20 ms) TIM_TimeBaseStructure.TIM_ClockDivision = TIM_CKD_DIV1; TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; TIM_TimeBaseInit(TIM3, &TIM_TimeBaseStructure); TIM_TimeBaseInit(TIM4, &TIM_TimeBaseStructure); TIM_TimeBaseInit(TIM5, &TIM_TimeBaseStructure); // Set up 4 channel servo TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1; TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; TIM_OCInitStructure.TIM_Pulse = 600 + 900; // 1500 us - Servo Top Centre TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High; TIM_OC1Init(TIM3, &TIM_OCInitStructure); // Channel 2 configuration = PC.06 TIM3_CH1 TIM_OC2Init(TIM3, &TIM_OCInitStructure); // Channel 4 configuration = PC.07 TIM3_CH2 TIM_OC3Init(TIM3, &TIM_OCInitStructure); // Channel 6 configuration = PC.08 TIM3_CH3 TIM_OC4Init(TIM3, &TIM_OCInitStructure); // Channel 8 configuration = PC.09 TIM3_CH4 TIM_OC1Init(TIM4, &TIM_OCInitStructure); // Channel 1 configuration = PD.12 TIM4_CH1 TIM_OC2Init(TIM4, &TIM_OCInitStructure); // Channel 3 configuration = PD.13 TIM4_CH2 TIM_OC3Init(TIM4, &TIM_OCInitStructure); // Channel 5 configuration = PD.14 TIM4_CH3 TIM_OC4Init(TIM4, &TIM_OCInitStructure); // Channel 7 configuration = PD.15 TIM4_CH4 TIM_OC1Init(TIM5, &TIM_OCInitStructure); // Channel 1 configuration = PD.12 TIM5_CH1 TIM_OC2Init(TIM5, &TIM_OCInitStructure); // Channel 3 configuration = PD.13 TIM5_CH2 // turning on TIM3 and PWM outputs TIM_Cmd(TIM3, ENABLE); TIM_CtrlPWMOutputs(TIM3, ENABLE); // TIM IT enable TIM_ITConfig(TIM3, TIM_IT_Update, ENABLE); // turning on TIM4 and PWM outputs TIM_Cmd(TIM4, ENABLE); TIM_CtrlPWMOutputs(TIM4, ENABLE); // TIM IT enable TIM_ITConfig(TIM4, TIM_IT_Update, ENABLE); TIM_Cmd(TIM5, ENABLE); TIM_CtrlPWMOutputs(TIM5, ENABLE); // TIM IT enable TIM_ITConfig(TIM5, TIM_IT_Update, ENABLE); }
10-channel-pwm-controller-stm32
trunk/User/main.c
C
gpl3
12,079
/** ****************************************************************************** * @file Project/STM32F10x_StdPeriph_Template/stm32f10x_conf.h * @author MCD Application Team * @version V3.5.0 * @date 08-April-2011 * @brief Library configuration file. ****************************************************************************** * @attention * * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. * * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2> ****************************************************************************** */ /* Define to prevent recursive inclusion -------------------------------------*/ #ifndef __STM32F10x_CONF_H #define __STM32F10x_CONF_H /* Includes ------------------------------------------------------------------*/ /* Uncomment/Comment the line below to enable/disable peripheral header file inclusion */ #include "stm32f10x_adc.h" #include "stm32f10x_bkp.h" #include "stm32f10x_can.h" #include "stm32f10x_cec.h" #include "stm32f10x_crc.h" #include "stm32f10x_dac.h" #include "stm32f10x_dbgmcu.h" #include "stm32f10x_dma.h" #include "stm32f10x_exti.h" #include "stm32f10x_flash.h" #include "stm32f10x_fsmc.h" #include "stm32f10x_gpio.h" #include "stm32f10x_i2c.h" #include "stm32f10x_iwdg.h" #include "stm32f10x_pwr.h" #include "stm32f10x_rcc.h" #include "stm32f10x_rtc.h" #include "stm32f10x_sdio.h" #include "stm32f10x_spi.h" #include "stm32f10x_tim.h" #include "stm32f10x_usart.h" #include "stm32f10x_wwdg.h" #include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */ /* Exported types ------------------------------------------------------------*/ /* Exported constants --------------------------------------------------------*/ /* Uncomment the line below to expanse the "assert_param" macro in the Standard Peripheral Library drivers code */ /* #define USE_FULL_ASSERT 1 */ /* Exported macro ------------------------------------------------------------*/ #ifdef USE_FULL_ASSERT /** * @brief The assert_param macro is used for function's parameters check. * @param expr: If expr is false, it calls assert_failed function which reports * the name of the source file and the source line number of the call * that failed. If expr is true, it returns no value. * @retval None */ #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) /* Exported functions ------------------------------------------------------- */ void assert_failed(uint8_t* file, uint32_t line); #else #define assert_param(expr) ((void)0) #endif /* USE_FULL_ASSERT */ #endif /* __STM32F10x_CONF_H */ /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
10-channel-pwm-controller-stm32
trunk/User/stm32f10x_conf.h
C
gpl3
3,259
/** ****************************************************************************** * @file Project/STM32F10x_StdPeriph_Template/stm32f10x_it.h * @author MCD Application Team * @version V3.5.0 * @date 08-April-2011 * @brief This file contains the headers of the interrupt handlers. ****************************************************************************** * @attention * * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. * * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2> ****************************************************************************** */ /* Define to prevent recursive inclusion -------------------------------------*/ #ifndef __STM32F10x_IT_H #define __STM32F10x_IT_H #ifdef __cplusplus extern "C" { #endif /* Includes ------------------------------------------------------------------*/ #include "stm32f10x.h" /* Exported types ------------------------------------------------------------*/ /* Exported constants --------------------------------------------------------*/ /* Exported macro ------------------------------------------------------------*/ /* Exported functions ------------------------------------------------------- */ void NMI_Handler(void); void HardFault_Handler(void); void MemManage_Handler(void); void BusFault_Handler(void); void UsageFault_Handler(void); void SVC_Handler(void); void DebugMon_Handler(void); void PendSV_Handler(void); void SysTick_Handler(void); #ifdef __cplusplus } #endif #endif /* __STM32F10x_IT_H */ /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
10-channel-pwm-controller-stm32
trunk/User/stm32f10x_it.h
C
gpl3
2,086
/** ****************************************************************************** * @file Project/STM32F10x_StdPeriph_Template/stm32f10x_it.c * @author MCD Application Team * @version V3.5.0 * @date 08-April-2011 * @brief Main Interrupt Service Routines. * This file provides template for all exceptions handler and * peripherals interrupt service routine. ****************************************************************************** * @attention * * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. * * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2> ****************************************************************************** */ /* Includes ------------------------------------------------------------------*/ #include "stm32f10x_it.h" /** @addtogroup STM32F10x_StdPeriph_Template * @{ */ /* Private typedef -----------------------------------------------------------*/ /* Private define ------------------------------------------------------------*/ /* Private macro -------------------------------------------------------------*/ /* Private variables ---------------------------------------------------------*/ /* Private function prototypes -----------------------------------------------*/ /* Private functions ---------------------------------------------------------*/ /******************************************************************************/ /* Cortex-M3 Processor Exceptions Handlers */ /******************************************************************************/ /** * @brief This function handles NMI exception. * @param None * @retval None */ void NMI_Handler(void) { } /** * @brief This function handles Hard Fault exception. * @param None * @retval None */ void HardFault_Handler(void) { /* Go to infinite loop when Hard Fault exception occurs */ while (1) { } } /** * @brief This function handles Memory Manage exception. * @param None * @retval None */ void MemManage_Handler(void) { /* Go to infinite loop when Memory Manage exception occurs */ while (1) { } } /** * @brief This function handles Bus Fault exception. * @param None * @retval None */ void BusFault_Handler(void) { /* Go to infinite loop when Bus Fault exception occurs */ while (1) { } } /** * @brief This function handles Usage Fault exception. * @param None * @retval None */ void UsageFault_Handler(void) { /* Go to infinite loop when Usage Fault exception occurs */ while (1) { } } /** * @brief This function handles SVCall exception. * @param None * @retval None */ void SVC_Handler(void) { } /** * @brief This function handles Debug Monitor exception. * @param None * @retval None */ void DebugMon_Handler(void) { } /** * @brief This function handles PendSVC exception. * @param None * @retval None */ void PendSV_Handler(void) { } /** * @brief This function handles SysTick Handler. * @param None * @retval None */ void SysTick_Handler(void) { } /******************************************************************************/ /* STM32F10x Peripherals Interrupt Handlers */ /* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */ /* available peripheral interrupt handler's name please refer to the startup */ /* file (startup_stm32f10x_xx.s). */ /******************************************************************************/ /** * @brief This function handles PPP interrupt request. * @param None * @retval None */ /*void PPP_IRQHandler(void) { }*/ /** * @} */ /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
10-channel-pwm-controller-stm32
trunk/User/stm32f10x_it.c
C
gpl3
4,405
stm32f10x_gpio.o: ..\libraries\src\stm32f10x_gpio.c stm32f10x_gpio.o: ..\libraries\inc\stm32f10x_gpio.h stm32f10x_gpio.o: ..\CMSIS\CM3\DeviceSupport\ST\STM32F10x\stm32f10x.h stm32f10x_gpio.o: ..\CMSIS\CM3\CoreSupport\core_cm3.h stm32f10x_gpio.o: C:\Keil\ARM\RV31\INC\stdint.h stm32f10x_gpio.o: ..\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.h stm32f10x_gpio.o: ..\User\stm32f10x_conf.h stm32f10x_gpio.o: ..\libraries\inc\stm32f10x_adc.h stm32f10x_gpio.o: ..\CMSIS\CM3\DeviceSupport\ST\STM32F10x\stm32f10x.h stm32f10x_gpio.o: ..\libraries\inc\stm32f10x_bkp.h stm32f10x_gpio.o: ..\libraries\inc\stm32f10x_can.h stm32f10x_gpio.o: ..\libraries\inc\stm32f10x_cec.h stm32f10x_gpio.o: ..\libraries\inc\stm32f10x_crc.h stm32f10x_gpio.o: ..\libraries\inc\stm32f10x_dac.h stm32f10x_gpio.o: ..\libraries\inc\stm32f10x_dbgmcu.h stm32f10x_gpio.o: ..\libraries\inc\stm32f10x_dma.h stm32f10x_gpio.o: ..\libraries\inc\stm32f10x_exti.h stm32f10x_gpio.o: ..\libraries\inc\stm32f10x_flash.h stm32f10x_gpio.o: ..\libraries\inc\stm32f10x_fsmc.h stm32f10x_gpio.o: ..\libraries\inc\stm32f10x_gpio.h stm32f10x_gpio.o: ..\libraries\inc\stm32f10x_i2c.h stm32f10x_gpio.o: ..\libraries\inc\stm32f10x_iwdg.h stm32f10x_gpio.o: ..\libraries\inc\stm32f10x_pwr.h stm32f10x_gpio.o: ..\libraries\inc\stm32f10x_rcc.h stm32f10x_gpio.o: ..\libraries\inc\stm32f10x_rtc.h stm32f10x_gpio.o: ..\libraries\inc\stm32f10x_sdio.h stm32f10x_gpio.o: ..\libraries\inc\stm32f10x_spi.h stm32f10x_gpio.o: ..\libraries\inc\stm32f10x_tim.h stm32f10x_gpio.o: ..\libraries\inc\stm32f10x_usart.h stm32f10x_gpio.o: ..\libraries\inc\stm32f10x_wwdg.h stm32f10x_gpio.o: ..\libraries\inc\misc.h
10-channel-pwm-controller-stm32
trunk/project/stm32f10x_gpio.d
Makefile
gpl3
1,674
stm32f10x_usart.o: ..\libraries\src\stm32f10x_usart.c stm32f10x_usart.o: ..\libraries\inc\stm32f10x_usart.h stm32f10x_usart.o: ..\CMSIS\CM3\DeviceSupport\ST\STM32F10x\stm32f10x.h stm32f10x_usart.o: ..\CMSIS\CM3\CoreSupport\core_cm3.h stm32f10x_usart.o: C:\Keil\ARM\RV31\INC\stdint.h stm32f10x_usart.o: ..\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.h stm32f10x_usart.o: ..\User\stm32f10x_conf.h stm32f10x_usart.o: ..\libraries\inc\stm32f10x_adc.h stm32f10x_usart.o: ..\CMSIS\CM3\DeviceSupport\ST\STM32F10x\stm32f10x.h stm32f10x_usart.o: ..\libraries\inc\stm32f10x_bkp.h stm32f10x_usart.o: ..\libraries\inc\stm32f10x_can.h stm32f10x_usart.o: ..\libraries\inc\stm32f10x_cec.h stm32f10x_usart.o: ..\libraries\inc\stm32f10x_crc.h stm32f10x_usart.o: ..\libraries\inc\stm32f10x_dac.h stm32f10x_usart.o: ..\libraries\inc\stm32f10x_dbgmcu.h stm32f10x_usart.o: ..\libraries\inc\stm32f10x_dma.h stm32f10x_usart.o: ..\libraries\inc\stm32f10x_exti.h stm32f10x_usart.o: ..\libraries\inc\stm32f10x_flash.h stm32f10x_usart.o: ..\libraries\inc\stm32f10x_fsmc.h stm32f10x_usart.o: ..\libraries\inc\stm32f10x_gpio.h stm32f10x_usart.o: ..\libraries\inc\stm32f10x_i2c.h stm32f10x_usart.o: ..\libraries\inc\stm32f10x_iwdg.h stm32f10x_usart.o: ..\libraries\inc\stm32f10x_pwr.h stm32f10x_usart.o: ..\libraries\inc\stm32f10x_rcc.h stm32f10x_usart.o: ..\libraries\inc\stm32f10x_rtc.h stm32f10x_usart.o: ..\libraries\inc\stm32f10x_sdio.h stm32f10x_usart.o: ..\libraries\inc\stm32f10x_spi.h stm32f10x_usart.o: ..\libraries\inc\stm32f10x_tim.h stm32f10x_usart.o: ..\libraries\inc\stm32f10x_usart.h stm32f10x_usart.o: ..\libraries\inc\stm32f10x_wwdg.h stm32f10x_usart.o: ..\libraries\inc\misc.h
10-channel-pwm-controller-stm32
trunk/project/stm32f10x_usart.d
Makefile
gpl3
1,707
<!doctype html public "-//w3c//dtd html 4.0 transitional//en"> <html><head> <title>Static Call Graph - [C:\Users\Administrator\Desktop\10-channel-pwm-controller-stm32\project\robot.axf]</title></head> <body><HR> <H1>Static Call Graph for image C:\Users\Administrator\Desktop\10-channel-pwm-controller-stm32\project\robot.axf</H1><HR> <BR><P>#&#060CALLGRAPH&#062# ARM Linker, RVCT4.0 [Build 524]: Last Updated: Mon Jul 16 10:54:26 2012 <BR><P> <H3>Maximum Stack Usage = 60 bytes + Unknown(Functions without stacksize, Cycles, Untraceable Function Pointers)</H3><H3> Call chain for Maximum Stack Depth:</H3> __rt_entry_main &rArr; main &rArr; bend &rArr; standsteadyslow &rArr; smooth &rArr; __aeabi_fdiv <P> <H3> Functions with no stack information </H3><UL> <LI><a href="#[14dff2c]">__user_initial_stackheap</a> </UL> </UL> <P> <H3> Mutually Recursive functions </H3> <LI><a href="#[14dfba8]">ADC1_2_IRQHandler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[14dfba8]">ADC1_2_IRQHandler</a><BR> </UL> <P> <H3> Function Pointers </H3><UL> <LI><a href="#[14dfe00]">Reset_Handler</a> <LI><a href="#[14e646c]">NMI_Handler</a> <LI><a href="#[14e6430]">HardFault_Handler</a> <LI><a href="#[14e63f4]">MemManage_Handler</a> <LI><a href="#[14e63b8]">BusFault_Handler</a> <LI><a href="#[14e637c]">UsageFault_Handler</a> <LI><a href="#[14e6340]">SVC_Handler</a> <LI><a href="#[14e6304]">DebugMon_Handler</a> <LI><a href="#[14e62c8]">PendSV_Handler</a> <LI><a href="#[14e628c]">SysTick_Handler</a> <LI><a href="#[14dedd4]">WWDG_IRQHandler</a> <LI><a href="#[14df518]">PVD_IRQHandler</a> <LI><a href="#[14df338]">TAMPER_IRQHandler</a> <LI><a href="#[14df464]">RTC_IRQHandler</a> <LI><a href="#[14df680]">FLASH_IRQHandler</a> <LI><a href="#[14df4dc]">RCC_IRQHandler</a> <LI><a href="#[14df824]">EXTI0_IRQHandler</a> <LI><a href="#[14df7ac]">EXTI1_IRQHandler</a> <LI><a href="#[14df770]">EXTI2_IRQHandler</a> <LI><a href="#[14df734]">EXTI3_IRQHandler</a> <LI><a href="#[14df6f8]">EXTI4_IRQHandler</a> <LI><a href="#[14dfab8]">DMA1_Channel1_IRQHandler</a> <LI><a href="#[14dfa7c]">DMA1_Channel2_IRQHandler</a> <LI><a href="#[14dfa40]">DMA1_Channel3_IRQHandler</a> <LI><a href="#[14dfa04]">DMA1_Channel4_IRQHandler</a> <LI><a href="#[14df9c8]">DMA1_Channel5_IRQHandler</a> <LI><a href="#[14df98c]">DMA1_Channel6_IRQHandler</a> <LI><a href="#[14df950]">DMA1_Channel7_IRQHandler</a> <LI><a href="#[14dfba8]">ADC1_2_IRQHandler</a> <LI><a href="#[14dee4c]">USB_HP_CAN1_TX_IRQHandler</a> <LI><a href="#[14dee10]">USB_LP_CAN1_RX0_IRQHandler</a> <LI><a href="#[14dfb30]">CAN1_RX1_IRQHandler</a> <LI><a href="#[14dfaf4]">CAN1_SCE_IRQHandler</a> <LI><a href="#[14df6bc]">EXTI9_5_IRQHandler</a> <LI><a href="#[14df2fc]">TIM1_BRK_IRQHandler</a> <LI><a href="#[14df248]">TIM1_UP_IRQHandler</a> <LI><a href="#[14df284]">TIM1_TRG_COM_IRQHandler</a> <LI><a href="#[14df2c0]">TIM1_CC_IRQHandler</a> <LI><a href="#[14df20c]">TIM2_IRQHandler</a> <LI><a href="#[14e7858]">TIM3_IRQHandler</a> <LI><a href="#[14e781c]">TIM4_IRQHandler</a> <LI><a href="#[14df5cc]">I2C1_EV_IRQHandler</a> <LI><a href="#[14df608]">I2C1_ER_IRQHandler</a> <LI><a href="#[14df554]">I2C2_EV_IRQHandler</a> <LI><a href="#[14df590]">I2C2_ER_IRQHandler</a> <LI><a href="#[14df3ec]">SPI1_IRQHandler</a> <LI><a href="#[14df3b0]">SPI2_IRQHandler</a> <LI><a href="#[14def3c]">USART1_IRQHandler</a> <LI><a href="#[14def00]">USART2_IRQHandler</a> <LI><a href="#[14deec4]">USART3_IRQHandler</a> <LI><a href="#[14df7e8]">EXTI15_10_IRQHandler</a> <LI><a href="#[14df4a0]">RTCAlarm_IRQHandler</a> <LI><a href="#[14dee88]">USBWakeUp_IRQHandler</a> <LI><a href="#[14df0a4]">TIM8_BRK_IRQHandler</a> <LI><a href="#[14deff0]">TIM8_UP_IRQHandler</a> <LI><a href="#[14df02c]">TIM8_TRG_COM_IRQHandler</a> <LI><a href="#[14df068]">TIM8_CC_IRQHandler</a> <LI><a href="#[14dfb6c]">ADC3_IRQHandler</a> <LI><a href="#[14df644]">FSMC_IRQHandler</a> <LI><a href="#[14df428]">SDIO_IRQHandler</a> <LI><a href="#[14e77e0]">TIM5_IRQHandler</a> <LI><a href="#[14df374]">SPI3_IRQHandler</a> <LI><a href="#[14defb4]">UART4_IRQHandler</a> <LI><a href="#[14def78]">UART5_IRQHandler</a> <LI><a href="#[14df11c]">TIM6_IRQHandler</a> <LI><a href="#[14df0e0]">TIM7_IRQHandler</a> <LI><a href="#[14df914]">DMA2_Channel1_IRQHandler</a> <LI><a href="#[14df8d8]">DMA2_Channel2_IRQHandler</a> <LI><a href="#[14df89c]">DMA2_Channel3_IRQHandler</a> <LI><a href="#[14df860]">DMA2_Channel4_5_IRQHandler</a> <LI><a href="#[14e5c74]">SystemInit</a> <LI><a href="#[14de9d8]">__main</a> <LI><a href="#[267708c]">__I$use$semihosting</a> </UL> <P> <H3> Global Symbols </H3> <P><STRONG><a name="[14de9d8]"></a>__main</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, __main.o(!!!main)) <BR><BR>[Calls]<UL><LI><a href="#[14dda9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_entry <LI><a href="#[2674b48]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload </UL> <P><STRONG><a name="[2674b48]"></a>__scatterload</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __scatter.o(!!!scatter)) <BR><BR>[Called By]<UL><LI><a href="#[14de9d8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__main </UL> <P><STRONG><a name="[2674b0c]"></a>__scatterload_rt2</STRONG> (Thumb, 44 bytes, Stack size unknown bytes, __scatter.o(!!!scatter), UNUSED) <BR><BR>[Calls]<UL><LI><a href="#[14dda9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_entry </UL> <P><STRONG><a name="[2674ad0]"></a>__scatterload_rt2_thumb_only</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __scatter.o(!!!scatter), UNUSED) <P><STRONG><a name="[2674a94]"></a>__scatterload_null</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __scatter.o(!!!scatter), UNUSED) <P><STRONG><a name="[26748f0]"></a>__scatterload_copy</STRONG> (Thumb, 26 bytes, Stack size unknown bytes, __scatter_copy.o(!!handler_copy), UNUSED) <BR><BR>[Calls]<UL><LI><a href="#[26748f0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload_copy </UL> <BR>[Called By]<UL><LI><a href="#[26748f0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload_copy </UL> <P><STRONG><a name="[2674800]"></a>__scatterload_zeroinit</STRONG> (Thumb, 28 bytes, Stack size unknown bytes, __scatter_zi.o(!!handler_zi), UNUSED) <P><STRONG><a name="[14dc674]"></a>__rt_lib_init</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit.o(.ARM.Collect$$libinit$$00000000)) <BR><BR>[Called By]<UL><LI><a href="#[14dd100]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_entry_li </UL> <P><STRONG><a name="[26784b4]"></a>__rt_lib_init_alloca_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000002A)) <P><STRONG><a name="[267852c]"></a>__rt_lib_init_argv_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000028)) <P><STRONG><a name="[26788ec]"></a>__rt_lib_init_atexit_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000017)) <P><STRONG><a name="[2678784]"></a>__rt_lib_init_clock_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000001D)) <P><STRONG><a name="[26783c4]"></a>__rt_lib_init_cpp_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000002E)) <P><STRONG><a name="[267843c]"></a>__rt_lib_init_exceptions_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000002C)) <P><STRONG><a name="[26787fc]"></a>__rt_lib_init_fp_trap_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000001B)) <P><STRONG><a name="[267870c]"></a>__rt_lib_init_getenv_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000001F)) <P><STRONG><a name="[14db288]"></a>__rt_lib_init_heap_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000006)) <P><STRONG><a name="[14db0e4]"></a>__rt_lib_init_lc_collate_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000000D)) <P><STRONG><a name="[14db06c]"></a>__rt_lib_init_lc_ctype_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000000F)) <P><STRONG><a name="[2678a54]"></a>__rt_lib_init_lc_monetary_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000011)) <P><STRONG><a name="[26789dc]"></a>__rt_lib_init_lc_numeric_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000013)) <P><STRONG><a name="[2678964]"></a>__rt_lib_init_lc_time_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000015)) <P><STRONG><a name="[14db198]"></a>__rt_lib_init_rand_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000000A)) <P><STRONG><a name="[2678388]"></a>__rt_lib_init_return</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000002F)) <P><STRONG><a name="[2678874]"></a>__rt_lib_init_signal_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000019)) <P><STRONG><a name="[2678694]"></a>__rt_lib_init_stdio_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000021)) <P><STRONG><a name="[14db210]"></a>__rt_lib_init_user_alloc_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000008)) <P><STRONG><a name="[26773d4]"></a>__rt_lib_shutdown</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown.o(.ARM.Collect$$libshutdown$$00000000)) <BR><BR>[Called By]<UL><LI><a href="#[2677c08]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_exit_ls </UL> <P><STRONG><a name="[2676768]"></a>__rt_lib_shutdown_fp_trap_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$00000006)) <P><STRONG><a name="[2676588]"></a>__rt_lib_shutdown_heap_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$0000000E)) <P><STRONG><a name="[267654c]"></a>__rt_lib_shutdown_return</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$0000000F)) <P><STRONG><a name="[26766b4]"></a>__rt_lib_shutdown_signal_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$00000009)) <P><STRONG><a name="[267681c]"></a>__rt_lib_shutdown_stdio_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$00000003)) <P><STRONG><a name="[267663c]"></a>__rt_lib_shutdown_user_alloc_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$0000000B)) <P><STRONG><a name="[14dda9c]"></a>__rt_entry</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rtentry.o(.ARM.Collect$$rtentry$$00000000)) <BR><BR>[Called By]<UL><LI><a href="#[14de9d8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__main <LI><a href="#[2674b0c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload_rt2 </UL> <P><STRONG><a name="[14dd1b4]"></a>__rt_entry_presh_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rtentry2.o(.ARM.Collect$$rtentry$$00000002)) <P><STRONG><a name="[14dce30]"></a>__rt_entry_sh</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rtentry4.o(.ARM.Collect$$rtentry$$00000004)) <BR><BR>[Stack]<UL><LI>Max Depth = 8 + Unknown Stack Size <LI>Call Chain = __rt_entry_sh &rArr; __user_setup_stackheap </UL> <BR>[Calls]<UL><LI><a href="#[14dcbd8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__user_setup_stackheap </UL> <P><STRONG><a name="[14dd100]"></a>__rt_entry_li</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rtentry2.o(.ARM.Collect$$rtentry$$0000000A)) <BR><BR>[Calls]<UL><LI><a href="#[14dc674]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_lib_init </UL> <P><STRONG><a name="[14dd13c]"></a>__rt_entry_postsh_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rtentry2.o(.ARM.Collect$$rtentry$$00000009)) <P><STRONG><a name="[14dd04c]"></a>__rt_entry_main</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rtentry2.o(.ARM.Collect$$rtentry$$0000000D)) <BR><BR>[Stack]<UL><LI>Max Depth = 60 + Unknown Stack Size <LI>Call Chain = __rt_entry_main &rArr; main &rArr; bend &rArr; standsteadyslow &rArr; smooth &rArr; __aeabi_fdiv </UL> <BR>[Calls]<UL><LI><a href="#[14dca70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;exit <LI><a href="#[14e7498]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main </UL> <P><STRONG><a name="[14dd088]"></a>__rt_entry_postli_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rtentry2.o(.ARM.Collect$$rtentry$$0000000C)) <P><STRONG><a name="[14dbe04]"></a>__rt_exit</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rtexit.o(.ARM.Collect$$rtexit$$00000000)) <BR><BR>[Called By]<UL><LI><a href="#[14dca70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;exit </UL> <P><STRONG><a name="[2677c08]"></a>__rt_exit_ls</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rtexit2.o(.ARM.Collect$$rtexit$$00000003)) <BR><BR>[Calls]<UL><LI><a href="#[26773d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_lib_shutdown </UL> <P><STRONG><a name="[2677c44]"></a>__rt_exit_prels_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rtexit2.o(.ARM.Collect$$rtexit$$00000002)) <P><STRONG><a name="[2677bcc]"></a>__rt_exit_exit</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rtexit2.o(.ARM.Collect$$rtexit$$00000004)) <BR><BR>[Calls]<UL><LI><a href="#[26778c0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_sys_exit </UL> <P><STRONG><a name="[14e7858]"></a>TIM3_IRQHandler</STRONG> (Thumb, 352 bytes, Stack size 16 bytes, main.o(.text)) <BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = TIM3_IRQHandler &rArr; TIM_GetITStatus </UL> <BR>[Calls]<UL><LI><a href="#[14ddbc8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_fmul <LI><a href="#[14de03c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_f2uiz <LI><a href="#[14de708]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_fadd <LI><a href="#[14e7204]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_GetITStatus <LI><a href="#[14e72b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_ClearITPendingBit <LI><a href="#[14e73e4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_ReadInputDataBit </UL> <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14e781c]"></a>TIM4_IRQHandler</STRONG> (Thumb, 314 bytes, Stack size 16 bytes, main.o(.text)) <BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = TIM4_IRQHandler &rArr; TIM_GetITStatus </UL> <BR>[Calls]<UL><LI><a href="#[14ddbc8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_fmul <LI><a href="#[14de03c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_f2uiz <LI><a href="#[14de708]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_fadd <LI><a href="#[14e7204]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_GetITStatus <LI><a href="#[14e72b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_ClearITPendingBit </UL> <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14e77e0]"></a>TIM5_IRQHandler</STRONG> (Thumb, 166 bytes, Stack size 16 bytes, main.o(.text)) <BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = TIM5_IRQHandler &rArr; TIM_GetITStatus </UL> <BR>[Calls]<UL><LI><a href="#[14ddbc8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_fmul <LI><a href="#[14de03c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_f2uiz <LI><a href="#[14de708]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_fadd <LI><a href="#[14e7204]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_GetITStatus <LI><a href="#[14e72b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_ClearITPendingBit </UL> <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14e77a4]"></a>delay_quartersecond</STRONG> (Thumb, 24 bytes, Stack size 16 bytes, main.o(.text)) <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = delay_quartersecond </UL> <BR>[Calls]<UL><LI><a href="#[14e6ebc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;delay_ms </UL> <BR>[Called By]<UL><LI><a href="#[14e7498]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main <LI><a href="#[14e75c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;forward <LI><a href="#[14e7600]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;show <LI><a href="#[14e763c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;bend </UL> <P><STRONG><a name="[14e7768]"></a>smooth</STRONG> (Thumb, 80 bytes, Stack size 32 bytes, main.o(.text)) <BR><BR>[Stack]<UL><LI>Max Depth = 36<LI>Call Chain = smooth &rArr; __aeabi_fdiv </UL> <BR>[Calls]<UL><LI><a href="#[14ddcf4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_ui2f <LI><a href="#[14de294]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_fdiv <LI><a href="#[14de5dc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_fsub <LI><a href="#[14de708]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_fadd </UL> <BR>[Called By]<UL><LI><a href="#[14e75c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;forward <LI><a href="#[14e7600]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;show <LI><a href="#[14e763c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;bend <LI><a href="#[14e76b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;standsteadyslow </UL> <P><STRONG><a name="[14e772c]"></a>rough</STRONG> (Thumb, 34 bytes, Stack size 16 bytes, main.o(.text)) <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = rough </UL> <BR>[Calls]<UL><LI><a href="#[14de708]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_fadd </UL> <BR>[Called By]<UL><LI><a href="#[14e75c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;forward <LI><a href="#[14e7600]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;show <LI><a href="#[14e76f0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;standsteady </UL> <P><STRONG><a name="[14e76f0]"></a>standsteady</STRONG> (Thumb, 156 bytes, Stack size 8 bytes, main.o(.text)) <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = standsteady &rArr; rough </UL> <BR>[Calls]<UL><LI><a href="#[14e772c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rough </UL> <BR>[Called By]<UL><LI><a href="#[14e7498]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main </UL> <P><STRONG><a name="[14e76b4]"></a>standsteadyslow</STRONG> (Thumb, 126 bytes, Stack size 8 bytes, main.o(.text)) <BR><BR>[Stack]<UL><LI>Max Depth = 44<LI>Call Chain = standsteadyslow &rArr; smooth &rArr; __aeabi_fdiv </UL> <BR>[Calls]<UL><LI><a href="#[14e7768]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;smooth </UL> <BR>[Called By]<UL><LI><a href="#[14e7498]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main <LI><a href="#[14e763c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;bend <LI><a href="#[14e7678]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;stop </UL> <P><STRONG><a name="[14e7678]"></a>stop</STRONG> (Thumb, 20 bytes, Stack size 8 bytes, main.o(.text)) <BR><BR>[Stack]<UL><LI>Max Depth = 52<LI>Call Chain = stop &rArr; standsteadyslow &rArr; smooth &rArr; __aeabi_fdiv </UL> <BR>[Calls]<UL><LI><a href="#[14e76b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;standsteadyslow </UL> <BR>[Called By]<UL><LI><a href="#[14e7498]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main </UL> <P><STRONG><a name="[14e763c]"></a>bend</STRONG> (Thumb, 84 bytes, Stack size 8 bytes, main.o(.text)) <BR><BR>[Stack]<UL><LI>Max Depth = 52<LI>Call Chain = bend &rArr; standsteadyslow &rArr; smooth &rArr; __aeabi_fdiv </UL> <BR>[Calls]<UL><LI><a href="#[14e76b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;standsteadyslow <LI><a href="#[14e7768]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;smooth <LI><a href="#[14e77a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;delay_quartersecond </UL> <BR>[Called By]<UL><LI><a href="#[14e7498]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main </UL> <P><STRONG><a name="[14e7600]"></a>show</STRONG> (Thumb, 218 bytes, Stack size 8 bytes, main.o(.text), UNUSED) <BR><BR>[Calls]<UL><LI><a href="#[14e772c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rough <LI><a href="#[14e7768]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;smooth <LI><a href="#[14e77a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;delay_quartersecond </UL> <P><STRONG><a name="[14e75c4]"></a>forward</STRONG> (Thumb, 726 bytes, Stack size 8 bytes, main.o(.text)) <BR><BR>[Stack]<UL><LI>Max Depth = 44<LI>Call Chain = forward &rArr; smooth &rArr; __aeabi_fdiv </UL> <BR>[Calls]<UL><LI><a href="#[14e772c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rough <LI><a href="#[14e7768]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;smooth <LI><a href="#[14e77a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;delay_quartersecond </UL> <BR>[Called By]<UL><LI><a href="#[14e7498]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main </UL> <P><STRONG><a name="[14e7588]"></a>TIM3_Configuration</STRONG> (Thumb, 240 bytes, Stack size 32 bytes, main.o(.text)) <BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = TIM3_Configuration &rArr; TIM_OC4Init </UL> <BR>[Calls]<UL><LI><a href="#[14e709c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_TimeBaseInit <LI><a href="#[14e70d8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_OC4Init <LI><a href="#[14e7114]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_OC3Init <LI><a href="#[14e7150]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_OC2Init <LI><a href="#[14e718c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_OC1Init <LI><a href="#[14e71c8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_ITConfig <LI><a href="#[14e7240]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_CtrlPWMOutputs <LI><a href="#[14e727c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_Cmd </UL> <BR>[Called By]<UL><LI><a href="#[14e7498]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main </UL> <P><STRONG><a name="[14e754c]"></a>NVIC_Configuration</STRONG> (Thumb, 96 bytes, Stack size 8 bytes, main.o(.text)) <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = NVIC_Configuration &rArr; NVIC_Init </UL> <BR>[Calls]<UL><LI><a href="#[14e736c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NVIC_PriorityGroupConfig <LI><a href="#[14e73a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NVIC_Init </UL> <BR>[Called By]<UL><LI><a href="#[14e7498]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main </UL> <P><STRONG><a name="[14e7510]"></a>GPIO_Configuration</STRONG> (Thumb, 116 bytes, Stack size 8 bytes, main.o(.text)) <BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = GPIO_Configuration &rArr; GPIO_PinRemapConfig </UL> <BR>[Calls]<UL><LI><a href="#[14e7420]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_PinRemapConfig <LI><a href="#[14e745c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_Init </UL> <BR>[Called By]<UL><LI><a href="#[14e7498]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main </UL> <P><STRONG><a name="[14e74d4]"></a>RCC_Configuration</STRONG> (Thumb, 38 bytes, Stack size 8 bytes, main.o(.text)) <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = RCC_Configuration </UL> <BR>[Calls]<UL><LI><a href="#[14e72f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_APB2PeriphClockCmd <LI><a href="#[14e7330]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_APB1PeriphClockCmd </UL> <BR>[Called By]<UL><LI><a href="#[14e7498]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main </UL> <P><STRONG><a name="[14e7498]"></a>main</STRONG> (Thumb, 80 bytes, Stack size 8 bytes, main.o(.text)) <BR><BR>[Stack]<UL><LI>Max Depth = 60<LI>Call Chain = main &rArr; bend &rArr; standsteadyslow &rArr; smooth &rArr; __aeabi_fdiv </UL> <BR>[Calls]<UL><LI><a href="#[14e6ef8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;delay_init <LI><a href="#[14e74d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_Configuration <LI><a href="#[14e7510]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_Configuration <LI><a href="#[14e754c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NVIC_Configuration <LI><a href="#[14e7588]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM3_Configuration <LI><a href="#[14e75c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;forward <LI><a href="#[14e763c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;bend <LI><a href="#[14e7678]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;stop <LI><a href="#[14e76b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;standsteadyslow <LI><a href="#[14e76f0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;standsteady <LI><a href="#[14e77a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;delay_quartersecond </UL> <BR>[Called By]<UL><LI><a href="#[14dd04c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_entry_main </UL> <P><STRONG><a name="[14e646c]"></a>NMI_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f10x_it.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14e6430]"></a>HardFault_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32f10x_it.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14e63f4]"></a>MemManage_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32f10x_it.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14e63b8]"></a>BusFault_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32f10x_it.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14e637c]"></a>UsageFault_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32f10x_it.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14e6340]"></a>SVC_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f10x_it.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14e6304]"></a>DebugMon_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f10x_it.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14e62c8]"></a>PendSV_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f10x_it.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14e628c]"></a>SysTick_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f10x_it.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14e5c74]"></a>SystemInit</STRONG> (Thumb, 78 bytes, Stack size 8 bytes, system_stm32f10x.o(.text)) <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = SystemInit &rArr; SetSysClock </UL> <BR>[Calls]<UL><LI><a href="#[14e5f08]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SetSysClock </UL> <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(.text) </UL> <P><STRONG><a name="[14e5c38]"></a>SystemCoreClockUpdate</STRONG> (Thumb, 142 bytes, Stack size 8 bytes, system_stm32f10x.o(.text), UNUSED) <P><STRONG><a name="[14e736c]"></a>NVIC_PriorityGroupConfig</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, misc.o(.text)) <BR><BR>[Called By]<UL><LI><a href="#[14e754c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NVIC_Configuration </UL> <P><STRONG><a name="[14e73a8]"></a>NVIC_Init</STRONG> (Thumb, 102 bytes, Stack size 16 bytes, misc.o(.text)) <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = NVIC_Init </UL> <BR>[Called By]<UL><LI><a href="#[14e754c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NVIC_Configuration </UL> <P><STRONG><a name="[14e53c8]"></a>NVIC_SetVectorTable</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, misc.o(.text), UNUSED) <P><STRONG><a name="[14e538c]"></a>NVIC_SystemLPConfig</STRONG> (Thumb, 38 bytes, Stack size 0 bytes, misc.o(.text), UNUSED) <P><STRONG><a name="[14e5350]"></a>SysTick_CLKSourceConfig</STRONG> (Thumb, 40 bytes, Stack size 0 bytes, misc.o(.text), UNUSED) <P><STRONG><a name="[14e4fcc]"></a>GPIO_DeInit</STRONG> (Thumb, 172 bytes, Stack size 8 bytes, stm32f10x_gpio.o(.text), UNUSED) <BR><BR>[Calls]<UL><LI><a href="#[14e4c48]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_APB2PeriphResetCmd </UL> <P><STRONG><a name="[14e4f90]"></a>GPIO_AFIODeInit</STRONG> (Thumb, 20 bytes, Stack size 8 bytes, stm32f10x_gpio.o(.text), UNUSED) <BR><BR>[Calls]<UL><LI><a href="#[14e4c48]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_APB2PeriphResetCmd </UL> <P><STRONG><a name="[14e745c]"></a>GPIO_Init</STRONG> (Thumb, 268 bytes, Stack size 20 bytes, stm32f10x_gpio.o(.text)) <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = GPIO_Init </UL> <BR>[Called By]<UL><LI><a href="#[14e7510]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_Configuration </UL> <P><STRONG><a name="[14e4f54]"></a>GPIO_StructInit</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, stm32f10x_gpio.o(.text), UNUSED) <P><STRONG><a name="[14e73e4]"></a>GPIO_ReadInputDataBit</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, stm32f10x_gpio.o(.text)) <BR><BR>[Called By]<UL><LI><a href="#[14e7858]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM3_IRQHandler </UL> <P><STRONG><a name="[14e4f18]"></a>GPIO_ReadInputData</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, stm32f10x_gpio.o(.text), UNUSED) <P><STRONG><a name="[14e4edc]"></a>GPIO_ReadOutputDataBit</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, stm32f10x_gpio.o(.text), UNUSED) <P><STRONG><a name="[14e4ea0]"></a>GPIO_ReadOutputData</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, stm32f10x_gpio.o(.text), UNUSED) <P><STRONG><a name="[14e4e64]"></a>GPIO_SetBits</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32f10x_gpio.o(.text), UNUSED) <P><STRONG><a name="[14e4e28]"></a>GPIO_ResetBits</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32f10x_gpio.o(.text), UNUSED) <P><STRONG><a name="[14e4dec]"></a>GPIO_WriteBit</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, stm32f10x_gpio.o(.text), UNUSED) <P><STRONG><a name="[14e4db0]"></a>GPIO_Write</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32f10x_gpio.o(.text), UNUSED) <P><STRONG><a name="[14e4d74]"></a>GPIO_PinLockConfig</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, stm32f10x_gpio.o(.text), UNUSED) <P><STRONG><a name="[14e4d38]"></a>GPIO_EventOutputConfig</STRONG> (Thumb, 24 bytes, Stack size 0 bytes, stm32f10x_gpio.o(.text), UNUSED) <P><STRONG><a name="[14e4cfc]"></a>GPIO_EventOutputCmd</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, stm32f10x_gpio.o(.text), UNUSED) <P><STRONG><a name="[14e7420]"></a>GPIO_PinRemapConfig</STRONG> (Thumb, 136 bytes, Stack size 20 bytes, stm32f10x_gpio.o(.text)) <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = GPIO_PinRemapConfig </UL> <BR>[Called By]<UL><LI><a href="#[14e7510]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_Configuration </UL> <P><STRONG><a name="[14e4cc0]"></a>GPIO_EXTILineConfig</STRONG> (Thumb, 60 bytes, Stack size 12 bytes, stm32f10x_gpio.o(.text), UNUSED) <P><STRONG><a name="[14e4c84]"></a>GPIO_ETH_MediaInterfaceConfig</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, stm32f10x_gpio.o(.text), UNUSED) <P><STRONG><a name="[14e47d4]"></a>TIM_DeInit</STRONG> (Thumb, 424 bytes, Stack size 8 bytes, stm32f10x_tim.o(.text), UNUSED) <BR><BR>[Calls]<UL><LI><a href="#[14e35c8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_APB1PeriphResetCmd <LI><a href="#[14e4c48]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_APB2PeriphResetCmd </UL> <P><STRONG><a name="[14e709c]"></a>TIM_TimeBaseInit</STRONG> (Thumb, 122 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text)) <BR><BR>[Called By]<UL><LI><a href="#[14e7588]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM3_Configuration </UL> <P><STRONG><a name="[14e718c]"></a>TIM_OC1Init</STRONG> (Thumb, 132 bytes, Stack size 16 bytes, stm32f10x_tim.o(.text)) <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = TIM_OC1Init </UL> <BR>[Called By]<UL><LI><a href="#[14e7588]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM3_Configuration </UL> <P><STRONG><a name="[14e7150]"></a>TIM_OC2Init</STRONG> (Thumb, 146 bytes, Stack size 16 bytes, stm32f10x_tim.o(.text)) <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = TIM_OC2Init </UL> <BR>[Called By]<UL><LI><a href="#[14e7588]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM3_Configuration </UL> <P><STRONG><a name="[14e7114]"></a>TIM_OC3Init</STRONG> (Thumb, 142 bytes, Stack size 16 bytes, stm32f10x_tim.o(.text)) <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = TIM_OC3Init </UL> <BR>[Called By]<UL><LI><a href="#[14e7588]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM3_Configuration </UL> <P><STRONG><a name="[14e70d8]"></a>TIM_OC4Init</STRONG> (Thumb, 172 bytes, Stack size 16 bytes, stm32f10x_tim.o(.text)) <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = TIM_OC4Init </UL> <BR>[Called By]<UL><LI><a href="#[14e7588]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM3_Configuration </UL> <P><STRONG><a name="[14e4798]"></a>TIM_SetIC4Prescaler</STRONG> (Thumb, 22 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <BR><BR>[Called By]<UL><LI><a href="#[14e46a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_ICInit </UL> <P><STRONG><a name="[14e475c]"></a>TIM_SetIC3Prescaler</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <BR><BR>[Called By]<UL><LI><a href="#[14e46a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_ICInit </UL> <P><STRONG><a name="[14e4720]"></a>TIM_SetIC2Prescaler</STRONG> (Thumb, 22 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <BR><BR>[Called By]<UL><LI><a href="#[14e466c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_PWMIConfig <LI><a href="#[14e46a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_ICInit </UL> <P><STRONG><a name="[14e46e4]"></a>TIM_SetIC1Prescaler</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <BR><BR>[Called By]<UL><LI><a href="#[14e466c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_PWMIConfig <LI><a href="#[14e46a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_ICInit </UL> <P><STRONG><a name="[14e46a8]"></a>TIM_ICInit</STRONG> (Thumb, 150 bytes, Stack size 16 bytes, stm32f10x_tim.o(.text), UNUSED) <BR><BR>[Calls]<UL><LI><a href="#[14e46e4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_SetIC1Prescaler <LI><a href="#[14e4720]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_SetIC2Prescaler <LI><a href="#[14e475c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_SetIC3Prescaler <LI><a href="#[14e4798]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_SetIC4Prescaler <LI><a href="#[14e4900]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TI1_Config <LI><a href="#[14e493c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TI2_Config <LI><a href="#[14e4978]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TI3_Config <LI><a href="#[14e49b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TI4_Config </UL> <P><STRONG><a name="[14e466c]"></a>TIM_PWMIConfig</STRONG> (Thumb, 124 bytes, Stack size 24 bytes, stm32f10x_tim.o(.text), UNUSED) <BR><BR>[Calls]<UL><LI><a href="#[14e46e4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_SetIC1Prescaler <LI><a href="#[14e4720]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_SetIC2Prescaler <LI><a href="#[14e4900]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TI1_Config <LI><a href="#[14e493c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TI2_Config </UL> <P><STRONG><a name="[14e4630]"></a>TIM_BDTRConfig</STRONG> (Thumb, 32 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e45f4]"></a>TIM_TimeBaseStructInit</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e45b8]"></a>TIM_OCStructInit</STRONG> (Thumb, 20 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e457c]"></a>TIM_ICStructInit</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e4540]"></a>TIM_BDTRStructInit</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e727c]"></a>TIM_Cmd</STRONG> (Thumb, 24 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text)) <BR><BR>[Called By]<UL><LI><a href="#[14e7588]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM3_Configuration </UL> <P><STRONG><a name="[14e7240]"></a>TIM_CtrlPWMOutputs</STRONG> (Thumb, 50 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text)) <BR><BR>[Called By]<UL><LI><a href="#[14e7588]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM3_Configuration </UL> <P><STRONG><a name="[14e71c8]"></a>TIM_ITConfig</STRONG> (Thumb, 24 bytes, Stack size 8 bytes, stm32f10x_tim.o(.text)) <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = TIM_ITConfig </UL> <BR>[Called By]<UL><LI><a href="#[14e7588]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM3_Configuration </UL> <P><STRONG><a name="[14e4504]"></a>TIM_GenerateEvent</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e44c8]"></a>TIM_DMAConfig</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e448c]"></a>TIM_DMACmd</STRONG> (Thumb, 24 bytes, Stack size 8 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e4450]"></a>TIM_InternalClockConfig</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e4414]"></a>TIM_SelectInputTrigger</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <BR><BR>[Called By]<UL><LI><a href="#[14e439c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_TIxExternalClockConfig <LI><a href="#[14e43d8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_ITRxExternalClockConfig </UL> <P><STRONG><a name="[14e43d8]"></a>TIM_ITRxExternalClockConfig</STRONG> (Thumb, 24 bytes, Stack size 12 bytes, stm32f10x_tim.o(.text), UNUSED) <BR><BR>[Calls]<UL><LI><a href="#[14e4414]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_SelectInputTrigger </UL> <P><STRONG><a name="[14e439c]"></a>TIM_TIxExternalClockConfig</STRONG> (Thumb, 62 bytes, Stack size 24 bytes, stm32f10x_tim.o(.text), UNUSED) <BR><BR>[Calls]<UL><LI><a href="#[14e4414]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_SelectInputTrigger <LI><a href="#[14e4900]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TI1_Config <LI><a href="#[14e493c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TI2_Config </UL> <P><STRONG><a name="[14e4360]"></a>TIM_ETRConfig</STRONG> (Thumb, 22 bytes, Stack size 12 bytes, stm32f10x_tim.o(.text), UNUSED) <BR><BR>[Called By]<UL><LI><a href="#[14e42e8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_ETRClockMode2Config <LI><a href="#[14e4324]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_ETRClockMode1Config </UL> <P><STRONG><a name="[14e4324]"></a>TIM_ETRClockMode1Config</STRONG> (Thumb, 54 bytes, Stack size 24 bytes, stm32f10x_tim.o(.text), UNUSED) <BR><BR>[Calls]<UL><LI><a href="#[14e4360]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_ETRConfig </UL> <P><STRONG><a name="[14e42e8]"></a>TIM_ETRClockMode2Config</STRONG> (Thumb, 32 bytes, Stack size 20 bytes, stm32f10x_tim.o(.text), UNUSED) <BR><BR>[Calls]<UL><LI><a href="#[14e4360]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_ETRConfig </UL> <P><STRONG><a name="[14e42ac]"></a>TIM_PrescalerConfig</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e4270]"></a>TIM_CounterModeConfig</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e4234]"></a>TIM_EncoderInterfaceConfig</STRONG> (Thumb, 56 bytes, Stack size 20 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e41f8]"></a>TIM_ForcedOC1Config</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e41bc]"></a>TIM_ForcedOC2Config</STRONG> (Thumb, 20 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e4180]"></a>TIM_ForcedOC3Config</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e4144]"></a>TIM_ForcedOC4Config</STRONG> (Thumb, 20 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e4108]"></a>TIM_ARRPreloadConfig</STRONG> (Thumb, 24 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e40cc]"></a>TIM_SelectCOM</STRONG> (Thumb, 24 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e4090]"></a>TIM_SelectCCDMA</STRONG> (Thumb, 24 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e4054]"></a>TIM_CCPreloadControl</STRONG> (Thumb, 24 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e4018]"></a>TIM_OC1PreloadConfig</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e3fdc]"></a>TIM_OC2PreloadConfig</STRONG> (Thumb, 20 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e3fa0]"></a>TIM_OC3PreloadConfig</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e3f64]"></a>TIM_OC4PreloadConfig</STRONG> (Thumb, 20 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e3f28]"></a>TIM_OC1FastConfig</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e3eec]"></a>TIM_OC2FastConfig</STRONG> (Thumb, 20 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e3eb0]"></a>TIM_OC3FastConfig</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e3e74]"></a>TIM_OC4FastConfig</STRONG> (Thumb, 20 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e3e38]"></a>TIM_ClearOC1Ref</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e3dfc]"></a>TIM_ClearOC2Ref</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e3dc0]"></a>TIM_ClearOC3Ref</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e3d84]"></a>TIM_ClearOC4Ref</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e3d48]"></a>TIM_OC1PolarityConfig</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e3d0c]"></a>TIM_OC1NPolarityConfig</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e3cd0]"></a>TIM_OC2PolarityConfig</STRONG> (Thumb, 20 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e3c94]"></a>TIM_OC2NPolarityConfig</STRONG> (Thumb, 20 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e3c58]"></a>TIM_OC3PolarityConfig</STRONG> (Thumb, 20 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e3c1c]"></a>TIM_OC3NPolarityConfig</STRONG> (Thumb, 20 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e3be0]"></a>TIM_OC4PolarityConfig</STRONG> (Thumb, 20 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e3ba4]"></a>TIM_CCxCmd</STRONG> (Thumb, 34 bytes, Stack size 12 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e3b68]"></a>TIM_CCxNCmd</STRONG> (Thumb, 34 bytes, Stack size 12 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e3b2c]"></a>TIM_SelectOCxM</STRONG> (Thumb, 82 bytes, Stack size 16 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e3af0]"></a>TIM_UpdateDisableConfig</STRONG> (Thumb, 24 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e3ab4]"></a>TIM_UpdateRequestConfig</STRONG> (Thumb, 24 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e3a78]"></a>TIM_SelectHallSensor</STRONG> (Thumb, 24 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e3a3c]"></a>TIM_SelectOnePulseMode</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e3a00]"></a>TIM_SelectOutputTrigger</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e39c4]"></a>TIM_SelectSlaveMode</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e3988]"></a>TIM_SelectMasterSlaveMode</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e394c]"></a>TIM_SetCounter</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e3910]"></a>TIM_SetAutoreload</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e38d4]"></a>TIM_SetCompare1</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e3898]"></a>TIM_SetCompare2</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e385c]"></a>TIM_SetCompare3</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e3820]"></a>TIM_SetCompare4</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e37e4]"></a>TIM_SetClockDivision</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e37a8]"></a>TIM_GetCapture1</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e376c]"></a>TIM_GetCapture2</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e3730]"></a>TIM_GetCapture3</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e36f4]"></a>TIM_GetCapture4</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e36b8]"></a>TIM_GetCounter</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e367c]"></a>TIM_GetPrescaler</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e3640]"></a>TIM_GetFlagStatus</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e3604]"></a>TIM_ClearFlag</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text), UNUSED) <P><STRONG><a name="[14e7204]"></a>TIM_GetITStatus</STRONG> (Thumb, 34 bytes, Stack size 12 bytes, stm32f10x_tim.o(.text)) <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = TIM_GetITStatus </UL> <BR>[Called By]<UL><LI><a href="#[14e77e0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM5_IRQHandler <LI><a href="#[14e781c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM4_IRQHandler <LI><a href="#[14e7858]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM3_IRQHandler </UL> <P><STRONG><a name="[14e72b8]"></a>TIM_ClearITPendingBit</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, stm32f10x_tim.o(.text)) <BR><BR>[Called By]<UL><LI><a href="#[14e77e0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM5_IRQHandler <LI><a href="#[14e781c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM4_IRQHandler <LI><a href="#[14e7858]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM3_IRQHandler </UL> <P><STRONG><a name="[14e3154]"></a>RCC_DeInit</STRONG> (Thumb, 64 bytes, Stack size 0 bytes, stm32f10x_rcc.o(.text), UNUSED) <P><STRONG><a name="[14e3118]"></a>RCC_HSEConfig</STRONG> (Thumb, 70 bytes, Stack size 0 bytes, stm32f10x_rcc.o(.text), UNUSED) <P><STRONG><a name="[14e30dc]"></a>RCC_GetFlagStatus</STRONG> (Thumb, 56 bytes, Stack size 8 bytes, stm32f10x_rcc.o(.text), UNUSED) <BR><BR>[Called By]<UL><LI><a href="#[14e30a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_WaitForHSEStartUp </UL> <P><STRONG><a name="[14e30a0]"></a>RCC_WaitForHSEStartUp</STRONG> (Thumb, 48 bytes, Stack size 16 bytes, stm32f10x_rcc.o(.text), UNUSED) <BR><BR>[Calls]<UL><LI><a href="#[14e30dc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_GetFlagStatus </UL> <P><STRONG><a name="[14e3064]"></a>RCC_AdjustHSICalibrationValue</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, stm32f10x_rcc.o(.text), UNUSED) <P><STRONG><a name="[14e3028]"></a>RCC_HSICmd</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, stm32f10x_rcc.o(.text), UNUSED) <P><STRONG><a name="[14e2fec]"></a>RCC_PLLConfig</STRONG> (Thumb, 22 bytes, Stack size 0 bytes, stm32f10x_rcc.o(.text), UNUSED) <P><STRONG><a name="[14e2fb0]"></a>RCC_PLLCmd</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, stm32f10x_rcc.o(.text), UNUSED) <P><STRONG><a name="[14e2f74]"></a>RCC_SYSCLKConfig</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, stm32f10x_rcc.o(.text), UNUSED) <P><STRONG><a name="[14e2f38]"></a>RCC_GetSYSCLKSource</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, stm32f10x_rcc.o(.text), UNUSED) <P><STRONG><a name="[14e2efc]"></a>RCC_HCLKConfig</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, stm32f10x_rcc.o(.text), UNUSED) <P><STRONG><a name="[14e2ec0]"></a>RCC_PCLK1Config</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, stm32f10x_rcc.o(.text), UNUSED) <P><STRONG><a name="[14e2e84]"></a>RCC_PCLK2Config</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, stm32f10x_rcc.o(.text), UNUSED) <P><STRONG><a name="[14e2e48]"></a>RCC_ITConfig</STRONG> (Thumb, 30 bytes, Stack size 0 bytes, stm32f10x_rcc.o(.text), UNUSED) <P><STRONG><a name="[14e2e0c]"></a>RCC_USBCLKConfig</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, stm32f10x_rcc.o(.text), UNUSED) <P><STRONG><a name="[14e2dd0]"></a>RCC_ADCCLKConfig</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, stm32f10x_rcc.o(.text), UNUSED) <P><STRONG><a name="[14e2d94]"></a>RCC_LSEConfig</STRONG> (Thumb, 50 bytes, Stack size 0 bytes, stm32f10x_rcc.o(.text), UNUSED) <P><STRONG><a name="[14e2d58]"></a>RCC_LSICmd</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, stm32f10x_rcc.o(.text), UNUSED) <P><STRONG><a name="[14e2d1c]"></a>RCC_RTCCLKConfig</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, stm32f10x_rcc.o(.text), UNUSED) <P><STRONG><a name="[14e2ce0]"></a>RCC_RTCCLKCmd</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, stm32f10x_rcc.o(.text), UNUSED) <P><STRONG><a name="[14e2ca4]"></a>RCC_GetClocksFreq</STRONG> (Thumb, 194 bytes, Stack size 12 bytes, stm32f10x_rcc.o(.text), UNUSED) <P><STRONG><a name="[14e2c68]"></a>RCC_AHBPeriphClockCmd</STRONG> (Thumb, 26 bytes, Stack size 0 bytes, stm32f10x_rcc.o(.text), UNUSED) <P><STRONG><a name="[14e72f4]"></a>RCC_APB2PeriphClockCmd</STRONG> (Thumb, 26 bytes, Stack size 0 bytes, stm32f10x_rcc.o(.text)) <BR><BR>[Called By]<UL><LI><a href="#[14e74d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_Configuration </UL> <P><STRONG><a name="[14e7330]"></a>RCC_APB1PeriphClockCmd</STRONG> (Thumb, 26 bytes, Stack size 0 bytes, stm32f10x_rcc.o(.text)) <BR><BR>[Called By]<UL><LI><a href="#[14e74d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_Configuration </UL> <P><STRONG><a name="[14e4c48]"></a>RCC_APB2PeriphResetCmd</STRONG> (Thumb, 26 bytes, Stack size 0 bytes, stm32f10x_rcc.o(.text), UNUSED) <BR><BR>[Called By]<UL><LI><a href="#[14e47d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_DeInit <LI><a href="#[14e4f90]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_AFIODeInit <LI><a href="#[14e4fcc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPIO_DeInit </UL> <P><STRONG><a name="[14e35c8]"></a>RCC_APB1PeriphResetCmd</STRONG> (Thumb, 26 bytes, Stack size 0 bytes, stm32f10x_rcc.o(.text), UNUSED) <BR><BR>[Called By]<UL><LI><a href="#[14e47d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_DeInit </UL> <P><STRONG><a name="[14e2c2c]"></a>RCC_BackupResetCmd</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, stm32f10x_rcc.o(.text), UNUSED) <P><STRONG><a name="[14e2bf0]"></a>RCC_ClockSecuritySystemCmd</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, stm32f10x_rcc.o(.text), UNUSED) <P><STRONG><a name="[14e2bb4]"></a>RCC_MCOConfig</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, stm32f10x_rcc.o(.text), UNUSED) <P><STRONG><a name="[14e2b78]"></a>RCC_ClearFlag</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, stm32f10x_rcc.o(.text), UNUSED) <P><STRONG><a name="[14e2b3c]"></a>RCC_GetITStatus</STRONG> (Thumb, 20 bytes, Stack size 0 bytes, stm32f10x_rcc.o(.text), UNUSED) <P><STRONG><a name="[14e2b00]"></a>RCC_ClearITPendingBit</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, stm32f10x_rcc.o(.text), UNUSED) <P><STRONG><a name="[14e6ef8]"></a>delay_init</STRONG> (Thumb, 46 bytes, Stack size 0 bytes, delay.o(.text)) <BR><BR>[Called By]<UL><LI><a href="#[14e7498]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main </UL> <P><STRONG><a name="[14e6ebc]"></a>delay_ms</STRONG> (Thumb, 54 bytes, Stack size 0 bytes, delay.o(.text)) <BR><BR>[Called By]<UL><LI><a href="#[14e77a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;delay_quartersecond </UL> <P><STRONG><a name="[14e0c4c]"></a>delay_us</STRONG> (Thumb, 52 bytes, Stack size 0 bytes, delay.o(.text), UNUSED) <P><STRONG><a name="[14dfe00]"></a>Reset_Handler</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <P><STRONG><a name="[14dfba8]"></a>ADC1_2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR><BR>[Calls]<UL><LI><a href="#[14dfba8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC1_2_IRQHandler </UL> <BR>[Called By]<UL><LI><a href="#[14dfba8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC1_2_IRQHandler </UL> <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14dfb6c]"></a>ADC3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14dfb30]"></a>CAN1_RX1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14dfaf4]"></a>CAN1_SCE_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14dfab8]"></a>DMA1_Channel1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14dfa7c]"></a>DMA1_Channel2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14dfa40]"></a>DMA1_Channel3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14dfa04]"></a>DMA1_Channel4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14df9c8]"></a>DMA1_Channel5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14df98c]"></a>DMA1_Channel6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14df950]"></a>DMA1_Channel7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14df914]"></a>DMA2_Channel1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14df8d8]"></a>DMA2_Channel2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14df89c]"></a>DMA2_Channel3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14df860]"></a>DMA2_Channel4_5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14df824]"></a>EXTI0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14df7e8]"></a>EXTI15_10_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14df7ac]"></a>EXTI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14df770]"></a>EXTI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14df734]"></a>EXTI3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14df6f8]"></a>EXTI4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14df6bc]"></a>EXTI9_5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14df680]"></a>FLASH_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14df644]"></a>FSMC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14df608]"></a>I2C1_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14df5cc]"></a>I2C1_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14df590]"></a>I2C2_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14df554]"></a>I2C2_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14df518]"></a>PVD_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14df4dc]"></a>RCC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14df4a0]"></a>RTCAlarm_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14df464]"></a>RTC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14df428]"></a>SDIO_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14df3ec]"></a>SPI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14df3b0]"></a>SPI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14df374]"></a>SPI3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14df338]"></a>TAMPER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14df2fc]"></a>TIM1_BRK_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14df2c0]"></a>TIM1_CC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14df284]"></a>TIM1_TRG_COM_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14df248]"></a>TIM1_UP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14df20c]"></a>TIM2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14df11c]"></a>TIM6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14df0e0]"></a>TIM7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14df0a4]"></a>TIM8_BRK_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14df068]"></a>TIM8_CC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14df02c]"></a>TIM8_TRG_COM_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14deff0]"></a>TIM8_UP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14defb4]"></a>UART4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14def78]"></a>UART5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14def3c]"></a>USART1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14def00]"></a>USART2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14deec4]"></a>USART3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14dee88]"></a>USBWakeUp_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14dee4c]"></a>USB_HP_CAN1_TX_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14dee10]"></a>USB_LP_CAN1_RX0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14dedd4]"></a>WWDG_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_hd.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f10x_hd.o(RESET) </UL> <P><STRONG><a name="[14dff2c]"></a>__user_initial_stackheap</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, startup_stm32f10x_hd.o(.text)) <BR><BR>[Called By]<UL><LI><a href="#[14dcbd8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__user_setup_stackheap </UL> <P><STRONG><a name="[14deb40]"></a>__use_two_region_memory</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, heapauxi.o(.text), UNUSED) <P><STRONG><a name="[14deb04]"></a>__rt_heap_escrow$2region</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, heapauxi.o(.text), UNUSED) <P><STRONG><a name="[14deac8]"></a>__rt_heap_expand$2region</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, heapauxi.o(.text), UNUSED) <P><STRONG><a name="[14dcbd8]"></a>__user_setup_stackheap</STRONG> (Thumb, 74 bytes, Stack size 8 bytes, sys_stackheap_outer.o(.text)) <BR><BR>[Stack]<UL><LI>Max Depth = 8 + Unknown Stack Size <LI>Call Chain = __user_setup_stackheap </UL> <BR>[Calls]<UL><LI><a href="#[14dbef4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__user_perproc_libspace <LI><a href="#[14dff2c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__user_initial_stackheap </UL> <BR>[Called By]<UL><LI><a href="#[14dce30]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_entry_sh </UL> <P><STRONG><a name="[14dca70]"></a>exit</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, exit.o(.text)) <BR><BR>[Calls]<UL><LI><a href="#[14dbe04]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_exit </UL> <BR>[Called By]<UL><LI><a href="#[14dd04c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_entry_main </UL> <P><STRONG><a name="[14dbf30]"></a>__user_libspace</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, libspace.o(.text), UNUSED) <P><STRONG><a name="[14dbef4]"></a>__user_perproc_libspace</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, libspace.o(.text)) <BR><BR>[Called By]<UL><LI><a href="#[14dcbd8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__user_setup_stackheap </UL> <P><STRONG><a name="[14dbeb8]"></a>__user_perthread_libspace</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, libspace.o(.text), UNUSED) <P><STRONG><a name="[26778c0]"></a>_sys_exit</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, sys_exit.o(.text)) <BR><BR>[Called By]<UL><LI><a href="#[2677bcc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_exit_exit </UL> <P><STRONG><a name="[267708c]"></a>__I$use$semihosting</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, use_no_semi.o(.text)) <BR>[Address Reference Count : 1]<UL><LI> sys_exit.o(.text) </UL> <P><STRONG><a name="[2677050]"></a>__use_no_semihosting_swi</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, use_no_semi.o(.text), UNUSED) <P><STRONG><a name="[14de708]"></a>__aeabi_fadd</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, faddsub_clz.o(x$fpl$fadd)) <BR><BR>[Called By]<UL><LI><a href="#[14e772c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rough <LI><a href="#[14e7768]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;smooth <LI><a href="#[14e77e0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM5_IRQHandler <LI><a href="#[14e781c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM4_IRQHandler <LI><a href="#[14e7858]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM3_IRQHandler </UL> <P><STRONG><a name="[14de6cc]"></a>_fadd</STRONG> (Thumb, 248 bytes, Stack size 0 bytes, faddsub_clz.o(x$fpl$fadd), UNUSED) <BR><BR>[Calls]<UL><LI><a href="#[14dd844]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__fpl_fcheck_NaN2 <LI><a href="#[14de744]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fsub1 </UL> <P><STRONG><a name="[14de690]"></a>__fpl_inf_fadd</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, faddsub_clz.o(x$fpl$fadd), UNUSED) <P><STRONG><a name="[14dd844]"></a>__fpl_fcheck_NaN2</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, fcheck.o(x$fpl$fcheck), UNUSED) <BR><BR>[Calls]<UL><LI><a href="#[14dcd04]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__fpl_return_NaN </UL> <BR>[Called By]<UL><LI><a href="#[14ddb8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fmul <LI><a href="#[14de258]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fdiv <LI><a href="#[14de5a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fsub <LI><a href="#[14de6cc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fadd </UL> <P><STRONG><a name="[14dd718]"></a>__fpl_fcheck_NaN1</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, fcheck1.o(x$fpl$fcheck1), UNUSED) <BR><BR>[Calls]<UL><LI><a href="#[14dcd04]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__fpl_return_NaN </UL> <BR>[Called By]<UL><LI><a href="#[14de000]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_ffixu </UL> <P><STRONG><a name="[14de294]"></a>__aeabi_fdiv</STRONG> (Thumb, 0 bytes, Stack size 4 bytes, fdiv.o(x$fpl$fdiv)) <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = __aeabi_fdiv </UL> <BR>[Called By]<UL><LI><a href="#[14e7768]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;smooth </UL> <P><STRONG><a name="[14de258]"></a>_fdiv</STRONG> (Thumb, 476 bytes, Stack size 4 bytes, fdiv.o(x$fpl$fdiv), UNUSED) <BR><BR>[Calls]<UL><LI><a href="#[14dd844]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__fpl_fcheck_NaN2 </UL> <P><STRONG><a name="[14de21c]"></a>__fpl_inf_fdiv</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, fdiv.o(x$fpl$fdiv), UNUSED) <P><STRONG><a name="[14de03c]"></a>__aeabi_f2uiz</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, ffixu.o(x$fpl$ffixu)) <BR><BR>[Called By]<UL><LI><a href="#[14e77e0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM5_IRQHandler <LI><a href="#[14e781c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM4_IRQHandler <LI><a href="#[14e7858]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM3_IRQHandler </UL> <P><STRONG><a name="[14de000]"></a>_ffixu</STRONG> (Thumb, 82 bytes, Stack size 0 bytes, ffixu.o(x$fpl$ffixu), UNUSED) <BR><BR>[Calls]<UL><LI><a href="#[14dd718]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__fpl_fcheck_NaN1 </UL> <P><STRONG><a name="[14ddfc4]"></a>__fpl_inf_ffixu</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, ffixu.o(x$fpl$ffixu), UNUSED) <P><STRONG><a name="[14ddda8]"></a>__aeabi_i2f</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, fflt_clz.o(x$fpl$fflt), UNUSED) <P><STRONG><a name="[14ddd6c]"></a>_fflt</STRONG> (Thumb, 50 bytes, Stack size 0 bytes, fflt_clz.o(x$fpl$fflt), UNUSED) <P><STRONG><a name="[14ddd30]"></a>__fflt_normalise</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, fflt_clz.o(x$fpl$fflt), UNUSED) <BR><BR>[Called By]<UL><LI><a href="#[14ddcb8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_ffltu </UL> <P><STRONG><a name="[14ddcf4]"></a>__aeabi_ui2f</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, fflt_clz.o(x$fpl$ffltu)) <BR><BR>[Called By]<UL><LI><a href="#[14e7768]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;smooth </UL> <P><STRONG><a name="[14ddcb8]"></a>_ffltu</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, fflt_clz.o(x$fpl$ffltu), UNUSED) <BR><BR>[Calls]<UL><LI><a href="#[14ddd30]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__fflt_normalise </UL> <P><STRONG><a name="[14ddbc8]"></a>__aeabi_fmul</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, fmul.o(x$fpl$fmul)) <BR><BR>[Called By]<UL><LI><a href="#[14e77e0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM5_IRQHandler <LI><a href="#[14e781c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM4_IRQHandler <LI><a href="#[14e7858]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM3_IRQHandler </UL> <P><STRONG><a name="[14ddb8c]"></a>_fmul</STRONG> (Thumb, 258 bytes, Stack size 0 bytes, fmul.o(x$fpl$fmul), UNUSED) <BR><BR>[Calls]<UL><LI><a href="#[14dd844]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__fpl_fcheck_NaN2 </UL> <P><STRONG><a name="[14ddb50]"></a>__fpl_inf_fmul</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, fmul.o(x$fpl$fmul), UNUSED) <P><STRONG><a name="[14dd628]"></a>__fpl_normalise2</STRONG> (Thumb, 74 bytes, Stack size 4 bytes, fnorm2_clz.o(x$fpl$fnorm2), UNUSED) <P><STRONG><a name="[14de5dc]"></a>__aeabi_fsub</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, faddsub_clz.o(x$fpl$fsub)) <BR><BR>[Called By]<UL><LI><a href="#[14e7768]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;smooth </UL> <P><STRONG><a name="[14de5a0]"></a>_fsub</STRONG> (Thumb, 282 bytes, Stack size 0 bytes, faddsub_clz.o(x$fpl$fsub), UNUSED) <BR><BR>[Calls]<UL><LI><a href="#[14dd844]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__fpl_fcheck_NaN2 <LI><a href="#[14de780]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fadd1 </UL> <P><STRONG><a name="[14de564]"></a>__fpl_inf_fsub</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, faddsub_clz.o(x$fpl$fsub), UNUSED) <P><STRONG><a name="[14dd538]"></a>__funder</STRONG> (Thumb, 132 bytes, Stack size 0 bytes, funder.o(x$fpl$funder), UNUSED) <P><STRONG><a name="[14dd4fc]"></a>__funder_d</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, funder.o(x$fpl$funder), UNUSED) <P><STRONG><a name="[14dcd04]"></a>__fpl_return_NaN</STRONG> (Thumb, 100 bytes, Stack size 0 bytes, retnan.o(x$fpl$retnan), UNUSED) <BR><BR>[Calls]<UL><LI><a href="#[14dc0d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__fpl_cmpreturn </UL> <BR>[Called By]<UL><LI><a href="#[14dd718]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__fpl_fcheck_NaN1 <LI><a href="#[14dd844]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__fpl_fcheck_NaN2 </UL> <P><STRONG><a name="[14dc0d4]"></a>__fpl_cmpreturn</STRONG> (Thumb, 48 bytes, Stack size 0 bytes, trapv.o(x$fpl$trapveneer), UNUSED) <BR><BR>[Called By]<UL><LI><a href="#[14dcd04]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__fpl_return_NaN </UL> <P><STRONG><a name="[14dd448]"></a>__I$use$fp</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, usenofp.o(x$fpl$usenofp), UNUSED) <P> <H3> Local Symbols </H3> <P><STRONG><a name="[14e5f44]"></a>SetSysClockTo72</STRONG> (Thumb, 192 bytes, Stack size 0 bytes, system_stm32f10x.o(.text)) <BR><BR>[Called By]<UL><LI><a href="#[14e5f08]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SetSysClock </UL> <P><STRONG><a name="[14e5f08]"></a>SetSysClock</STRONG> (Thumb, 8 bytes, Stack size 8 bytes, system_stm32f10x.o(.text)) <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = SetSysClock </UL> <BR>[Calls]<UL><LI><a href="#[14e5f44]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SetSysClockTo72 </UL> <BR>[Called By]<UL><LI><a href="#[14e5c74]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemInit </UL> <P><STRONG><a name="[14e49b4]"></a>TI4_Config</STRONG> (Thumb, 114 bytes, Stack size 20 bytes, stm32f10x_tim.o(.text), UNUSED) <BR><BR>[Called By]<UL><LI><a href="#[14e46a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_ICInit </UL> <P><STRONG><a name="[14e4978]"></a>TI3_Config</STRONG> (Thumb, 110 bytes, Stack size 20 bytes, stm32f10x_tim.o(.text), UNUSED) <BR><BR>[Called By]<UL><LI><a href="#[14e46a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_ICInit </UL> <P><STRONG><a name="[14e493c]"></a>TI2_Config</STRONG> (Thumb, 114 bytes, Stack size 20 bytes, stm32f10x_tim.o(.text), UNUSED) <BR><BR>[Called By]<UL><LI><a href="#[14e439c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_TIxExternalClockConfig <LI><a href="#[14e466c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_PWMIConfig <LI><a href="#[14e46a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_ICInit </UL> <P><STRONG><a name="[14e4900]"></a>TI1_Config</STRONG> (Thumb, 102 bytes, Stack size 20 bytes, stm32f10x_tim.o(.text), UNUSED) <BR><BR>[Called By]<UL><LI><a href="#[14e439c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_TIxExternalClockConfig <LI><a href="#[14e466c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_PWMIConfig <LI><a href="#[14e46a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_ICInit </UL> <P><STRONG><a name="[14de780]"></a>_fadd1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, faddsub_clz.o(x$fpl$fadd), UNUSED) <BR><BR>[Called By]<UL><LI><a href="#[14de5a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fsub </UL> <P><STRONG><a name="[14de744]"></a>_fsub1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, faddsub_clz.o(x$fpl$fsub), UNUSED) <BR><BR>[Called By]<UL><LI><a href="#[14de6cc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fadd </UL> <P> <H3> Undefined Global Symbols </H3><HR></body></html>
10-channel-pwm-controller-stm32
trunk/project/robot.htm
HTML
gpl3
75,474
stm32f10x_tim.o: ..\libraries\src\stm32f10x_tim.c stm32f10x_tim.o: ..\libraries\inc\stm32f10x_tim.h stm32f10x_tim.o: ..\CMSIS\CM3\DeviceSupport\ST\STM32F10x\stm32f10x.h stm32f10x_tim.o: ..\CMSIS\CM3\CoreSupport\core_cm3.h stm32f10x_tim.o: C:\Keil\ARM\RV31\INC\stdint.h stm32f10x_tim.o: ..\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.h stm32f10x_tim.o: ..\User\stm32f10x_conf.h stm32f10x_tim.o: ..\libraries\inc\stm32f10x_adc.h stm32f10x_tim.o: ..\CMSIS\CM3\DeviceSupport\ST\STM32F10x\stm32f10x.h stm32f10x_tim.o: ..\libraries\inc\stm32f10x_bkp.h stm32f10x_tim.o: ..\libraries\inc\stm32f10x_can.h stm32f10x_tim.o: ..\libraries\inc\stm32f10x_cec.h stm32f10x_tim.o: ..\libraries\inc\stm32f10x_crc.h stm32f10x_tim.o: ..\libraries\inc\stm32f10x_dac.h stm32f10x_tim.o: ..\libraries\inc\stm32f10x_dbgmcu.h stm32f10x_tim.o: ..\libraries\inc\stm32f10x_dma.h stm32f10x_tim.o: ..\libraries\inc\stm32f10x_exti.h stm32f10x_tim.o: ..\libraries\inc\stm32f10x_flash.h stm32f10x_tim.o: ..\libraries\inc\stm32f10x_fsmc.h stm32f10x_tim.o: ..\libraries\inc\stm32f10x_gpio.h stm32f10x_tim.o: ..\libraries\inc\stm32f10x_i2c.h stm32f10x_tim.o: ..\libraries\inc\stm32f10x_iwdg.h stm32f10x_tim.o: ..\libraries\inc\stm32f10x_pwr.h stm32f10x_tim.o: ..\libraries\inc\stm32f10x_rcc.h stm32f10x_tim.o: ..\libraries\inc\stm32f10x_rtc.h stm32f10x_tim.o: ..\libraries\inc\stm32f10x_sdio.h stm32f10x_tim.o: ..\libraries\inc\stm32f10x_spi.h stm32f10x_tim.o: ..\libraries\inc\stm32f10x_tim.h stm32f10x_tim.o: ..\libraries\inc\stm32f10x_usart.h stm32f10x_tim.o: ..\libraries\inc\stm32f10x_wwdg.h stm32f10x_tim.o: ..\libraries\inc\misc.h
10-channel-pwm-controller-stm32
trunk/project/stm32f10x_tim.d
Makefile
gpl3
1,641
stm32f10x_rcc.o: ..\libraries\src\stm32f10x_rcc.c stm32f10x_rcc.o: ..\libraries\inc\stm32f10x_rcc.h stm32f10x_rcc.o: ..\CMSIS\CM3\DeviceSupport\ST\STM32F10x\stm32f10x.h stm32f10x_rcc.o: ..\CMSIS\CM3\CoreSupport\core_cm3.h stm32f10x_rcc.o: C:\Keil\ARM\RV31\INC\stdint.h stm32f10x_rcc.o: ..\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.h stm32f10x_rcc.o: ..\User\stm32f10x_conf.h stm32f10x_rcc.o: ..\libraries\inc\stm32f10x_adc.h stm32f10x_rcc.o: ..\CMSIS\CM3\DeviceSupport\ST\STM32F10x\stm32f10x.h stm32f10x_rcc.o: ..\libraries\inc\stm32f10x_bkp.h stm32f10x_rcc.o: ..\libraries\inc\stm32f10x_can.h stm32f10x_rcc.o: ..\libraries\inc\stm32f10x_cec.h stm32f10x_rcc.o: ..\libraries\inc\stm32f10x_crc.h stm32f10x_rcc.o: ..\libraries\inc\stm32f10x_dac.h stm32f10x_rcc.o: ..\libraries\inc\stm32f10x_dbgmcu.h stm32f10x_rcc.o: ..\libraries\inc\stm32f10x_dma.h stm32f10x_rcc.o: ..\libraries\inc\stm32f10x_exti.h stm32f10x_rcc.o: ..\libraries\inc\stm32f10x_flash.h stm32f10x_rcc.o: ..\libraries\inc\stm32f10x_fsmc.h stm32f10x_rcc.o: ..\libraries\inc\stm32f10x_gpio.h stm32f10x_rcc.o: ..\libraries\inc\stm32f10x_i2c.h stm32f10x_rcc.o: ..\libraries\inc\stm32f10x_iwdg.h stm32f10x_rcc.o: ..\libraries\inc\stm32f10x_pwr.h stm32f10x_rcc.o: ..\libraries\inc\stm32f10x_rcc.h stm32f10x_rcc.o: ..\libraries\inc\stm32f10x_rtc.h stm32f10x_rcc.o: ..\libraries\inc\stm32f10x_sdio.h stm32f10x_rcc.o: ..\libraries\inc\stm32f10x_spi.h stm32f10x_rcc.o: ..\libraries\inc\stm32f10x_tim.h stm32f10x_rcc.o: ..\libraries\inc\stm32f10x_usart.h stm32f10x_rcc.o: ..\libraries\inc\stm32f10x_wwdg.h stm32f10x_rcc.o: ..\libraries\inc\misc.h
10-channel-pwm-controller-stm32
trunk/project/stm32f10x_rcc.d
Makefile
gpl3
1,641
core_cm3.o: ..\CMSIS\CM3\CoreSupport\core_cm3.c core_cm3.o: C:\Keil\ARM\RV31\INC\stdint.h
10-channel-pwm-controller-stm32
trunk/project/core_cm3.d
Makefile
gpl3
92
main.o: ..\User\main.c main.o: ..\CMSIS\CM3\DeviceSupport\ST\STM32F10x\stm32F10x.h main.o: ..\CMSIS\CM3\CoreSupport\core_cm3.h main.o: C:\Keil\ARM\RV31\INC\stdint.h main.o: ..\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.h main.o: ..\User\stm32f10x_conf.h main.o: ..\libraries\inc\stm32f10x_adc.h main.o: ..\CMSIS\CM3\DeviceSupport\ST\STM32F10x\stm32f10x.h main.o: ..\libraries\inc\stm32f10x_bkp.h main.o: ..\libraries\inc\stm32f10x_can.h main.o: ..\libraries\inc\stm32f10x_cec.h main.o: ..\libraries\inc\stm32f10x_crc.h main.o: ..\libraries\inc\stm32f10x_dac.h main.o: ..\libraries\inc\stm32f10x_dbgmcu.h main.o: ..\libraries\inc\stm32f10x_dma.h main.o: ..\libraries\inc\stm32f10x_exti.h main.o: ..\libraries\inc\stm32f10x_flash.h main.o: ..\libraries\inc\stm32f10x_fsmc.h main.o: ..\libraries\inc\stm32f10x_gpio.h main.o: ..\libraries\inc\stm32f10x_i2c.h main.o: ..\libraries\inc\stm32f10x_iwdg.h main.o: ..\libraries\inc\stm32f10x_pwr.h main.o: ..\libraries\inc\stm32f10x_rcc.h main.o: ..\libraries\inc\stm32f10x_rtc.h main.o: ..\libraries\inc\stm32f10x_sdio.h main.o: ..\libraries\inc\stm32f10x_spi.h main.o: ..\libraries\inc\stm32f10x_tim.h main.o: ..\libraries\inc\stm32f10x_usart.h main.o: ..\libraries\inc\stm32f10x_wwdg.h main.o: ..\libraries\inc\misc.h main.o: ..\libraries\inc\delay.h
10-channel-pwm-controller-stm32
trunk/project/main.d
Makefile
gpl3
1,336
misc.o: ..\libraries\src\misc.c misc.o: ..\libraries\inc\misc.h misc.o: ..\CMSIS\CM3\DeviceSupport\ST\STM32F10x\stm32f10x.h misc.o: ..\CMSIS\CM3\CoreSupport\core_cm3.h misc.o: C:\Keil\ARM\RV31\INC\stdint.h misc.o: ..\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.h misc.o: ..\User\stm32f10x_conf.h misc.o: ..\libraries\inc\stm32f10x_adc.h misc.o: ..\CMSIS\CM3\DeviceSupport\ST\STM32F10x\stm32f10x.h misc.o: ..\libraries\inc\stm32f10x_bkp.h misc.o: ..\libraries\inc\stm32f10x_can.h misc.o: ..\libraries\inc\stm32f10x_cec.h misc.o: ..\libraries\inc\stm32f10x_crc.h misc.o: ..\libraries\inc\stm32f10x_dac.h misc.o: ..\libraries\inc\stm32f10x_dbgmcu.h misc.o: ..\libraries\inc\stm32f10x_dma.h misc.o: ..\libraries\inc\stm32f10x_exti.h misc.o: ..\libraries\inc\stm32f10x_flash.h misc.o: ..\libraries\inc\stm32f10x_fsmc.h misc.o: ..\libraries\inc\stm32f10x_gpio.h misc.o: ..\libraries\inc\stm32f10x_i2c.h misc.o: ..\libraries\inc\stm32f10x_iwdg.h misc.o: ..\libraries\inc\stm32f10x_pwr.h misc.o: ..\libraries\inc\stm32f10x_rcc.h misc.o: ..\libraries\inc\stm32f10x_rtc.h misc.o: ..\libraries\inc\stm32f10x_sdio.h misc.o: ..\libraries\inc\stm32f10x_spi.h misc.o: ..\libraries\inc\stm32f10x_tim.h misc.o: ..\libraries\inc\stm32f10x_usart.h misc.o: ..\libraries\inc\stm32f10x_wwdg.h misc.o: ..\libraries\inc\misc.h
10-channel-pwm-controller-stm32
trunk/project/misc.d
Makefile
gpl3
1,344
stm32f10x_it.o: ..\User\stm32f10x_it.c stm32f10x_it.o: ..\User\stm32f10x_it.h stm32f10x_it.o: ..\CMSIS\CM3\DeviceSupport\ST\STM32F10x\stm32f10x.h stm32f10x_it.o: ..\CMSIS\CM3\CoreSupport\core_cm3.h stm32f10x_it.o: C:\Keil\ARM\RV31\INC\stdint.h stm32f10x_it.o: ..\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.h stm32f10x_it.o: ..\User\stm32f10x_conf.h stm32f10x_it.o: ..\libraries\inc\stm32f10x_adc.h stm32f10x_it.o: ..\CMSIS\CM3\DeviceSupport\ST\STM32F10x\stm32f10x.h stm32f10x_it.o: ..\libraries\inc\stm32f10x_bkp.h stm32f10x_it.o: ..\libraries\inc\stm32f10x_can.h stm32f10x_it.o: ..\libraries\inc\stm32f10x_cec.h stm32f10x_it.o: ..\libraries\inc\stm32f10x_crc.h stm32f10x_it.o: ..\libraries\inc\stm32f10x_dac.h stm32f10x_it.o: ..\libraries\inc\stm32f10x_dbgmcu.h stm32f10x_it.o: ..\libraries\inc\stm32f10x_dma.h stm32f10x_it.o: ..\libraries\inc\stm32f10x_exti.h stm32f10x_it.o: ..\libraries\inc\stm32f10x_flash.h stm32f10x_it.o: ..\libraries\inc\stm32f10x_fsmc.h stm32f10x_it.o: ..\libraries\inc\stm32f10x_gpio.h stm32f10x_it.o: ..\libraries\inc\stm32f10x_i2c.h stm32f10x_it.o: ..\libraries\inc\stm32f10x_iwdg.h stm32f10x_it.o: ..\libraries\inc\stm32f10x_pwr.h stm32f10x_it.o: ..\libraries\inc\stm32f10x_rcc.h stm32f10x_it.o: ..\libraries\inc\stm32f10x_rtc.h stm32f10x_it.o: ..\libraries\inc\stm32f10x_sdio.h stm32f10x_it.o: ..\libraries\inc\stm32f10x_spi.h stm32f10x_it.o: ..\libraries\inc\stm32f10x_tim.h stm32f10x_it.o: ..\libraries\inc\stm32f10x_usart.h stm32f10x_it.o: ..\libraries\inc\stm32f10x_wwdg.h stm32f10x_it.o: ..\libraries\inc\misc.h
10-channel-pwm-controller-stm32
trunk/project/stm32f10x_it.d
Makefile
gpl3
1,590
system_stm32f10x.o: ..\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.c system_stm32f10x.o: ..\CMSIS\CM3\DeviceSupport\ST\STM32F10x\stm32f10x.h system_stm32f10x.o: ..\CMSIS\CM3\CoreSupport\core_cm3.h system_stm32f10x.o: C:\Keil\ARM\RV31\INC\stdint.h system_stm32f10x.o: ..\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.h system_stm32f10x.o: ..\User\stm32f10x_conf.h system_stm32f10x.o: ..\libraries\inc\stm32f10x_adc.h system_stm32f10x.o: ..\CMSIS\CM3\DeviceSupport\ST\STM32F10x\stm32f10x.h system_stm32f10x.o: ..\libraries\inc\stm32f10x_bkp.h system_stm32f10x.o: ..\libraries\inc\stm32f10x_can.h system_stm32f10x.o: ..\libraries\inc\stm32f10x_cec.h system_stm32f10x.o: ..\libraries\inc\stm32f10x_crc.h system_stm32f10x.o: ..\libraries\inc\stm32f10x_dac.h system_stm32f10x.o: ..\libraries\inc\stm32f10x_dbgmcu.h system_stm32f10x.o: ..\libraries\inc\stm32f10x_dma.h system_stm32f10x.o: ..\libraries\inc\stm32f10x_exti.h system_stm32f10x.o: ..\libraries\inc\stm32f10x_flash.h system_stm32f10x.o: ..\libraries\inc\stm32f10x_fsmc.h system_stm32f10x.o: ..\libraries\inc\stm32f10x_gpio.h system_stm32f10x.o: ..\libraries\inc\stm32f10x_i2c.h system_stm32f10x.o: ..\libraries\inc\stm32f10x_iwdg.h system_stm32f10x.o: ..\libraries\inc\stm32f10x_pwr.h system_stm32f10x.o: ..\libraries\inc\stm32f10x_rcc.h system_stm32f10x.o: ..\libraries\inc\stm32f10x_rtc.h system_stm32f10x.o: ..\libraries\inc\stm32f10x_sdio.h system_stm32f10x.o: ..\libraries\inc\stm32f10x_spi.h system_stm32f10x.o: ..\libraries\inc\stm32f10x_tim.h system_stm32f10x.o: ..\libraries\inc\stm32f10x_usart.h system_stm32f10x.o: ..\libraries\inc\stm32f10x_wwdg.h system_stm32f10x.o: ..\libraries\inc\misc.h
10-channel-pwm-controller-stm32
trunk/project/system_stm32f10x.d
Makefile
gpl3
1,706
delay.o: ..\libraries\src\delay.c delay.o: C:\Keil\ARM\INC\ST\STM32F10x\stm32f10x_lib.h delay.o: C:\Keil\ARM\INC\ST\STM32F10x\stm32f10x_map.h delay.o: C:\Keil\ARM\INC\ST\STM32F10x\stm32f10x_conf.h delay.o: C:\Keil\ARM\INC\ST\STM32F10x\stm32f10x_type.h delay.o: C:\Keil\ARM\INC\ST\STM32F10x\cortexm3_macro.h delay.o: C:\Keil\ARM\INC\ST\STM32F10x\stm32f10x_adc.h delay.o: C:\Keil\ARM\INC\ST\STM32F10x\stm32f10x_bkp.h delay.o: C:\Keil\ARM\INC\ST\STM32F10x\stm32f10x_can.h delay.o: C:\Keil\ARM\INC\ST\STM32F10x\stm32f10x_crc.h delay.o: C:\Keil\ARM\INC\ST\STM32F10x\stm32f10x_dac.h delay.o: C:\Keil\ARM\INC\ST\STM32F10x\stm32f10x_dbgmcu.h delay.o: C:\Keil\ARM\INC\ST\STM32F10x\stm32f10x_dma.h delay.o: C:\Keil\ARM\INC\ST\STM32F10x\stm32f10x_exti.h delay.o: C:\Keil\ARM\INC\ST\STM32F10x\stm32f10x_flash.h delay.o: C:\Keil\ARM\INC\ST\STM32F10x\stm32f10x_fsmc.h delay.o: C:\Keil\ARM\INC\ST\STM32F10x\stm32f10x_gpio.h delay.o: C:\Keil\ARM\INC\ST\STM32F10x\stm32f10x_i2c.h delay.o: C:\Keil\ARM\INC\ST\STM32F10x\stm32f10x_iwdg.h delay.o: C:\Keil\ARM\INC\ST\STM32F10x\stm32f10x_nvic.h delay.o: C:\Keil\ARM\INC\ST\STM32F10x\stm32f10x_pwr.h delay.o: C:\Keil\ARM\INC\ST\STM32F10x\stm32f10x_rcc.h delay.o: C:\Keil\ARM\INC\ST\STM32F10x\stm32f10x_rtc.h delay.o: C:\Keil\ARM\INC\ST\STM32F10x\stm32f10x_sdio.h delay.o: C:\Keil\ARM\INC\ST\STM32F10x\stm32f10x_spi.h delay.o: C:\Keil\ARM\INC\ST\STM32F10x\stm32f10x_systick.h delay.o: C:\Keil\ARM\INC\ST\STM32F10x\stm32f10x_tim.h delay.o: C:\Keil\ARM\INC\ST\STM32F10x\stm32f10x_usart.h delay.o: C:\Keil\ARM\INC\ST\STM32F10x\stm32f10x_wwdg.h delay.o: ..\libraries\inc\delay.h
10-channel-pwm-controller-stm32
trunk/project/delay.d
Makefile
gpl3
1,631
using System.Reflection; using System.Runtime.CompilerServices; using System.Runtime.InteropServices; // General Information about an assembly is controlled through the following // set of attributes. Change these attribute values to modify the information // associated with an assembly. [assembly: AssemblyTitle("TelephoneCallExample")] [assembly: AssemblyDescription("")] [assembly: AssemblyConfiguration("")] [assembly: AssemblyCompany("<Not Specified>")] [assembly: AssemblyProduct("TelephoneCallExample")] [assembly: AssemblyCopyright("Copyright © <Not Specified> 2008")] [assembly: AssemblyTrademark("")] [assembly: AssemblyCulture("")] // Setting ComVisible to false makes the types in this assembly not visible // to COM components. If you need to access a type in this assembly from // COM, set the ComVisible attribute to true on that type. [assembly: ComVisible(false)] // The following GUID is for the ID of the typelib if this project is exposed to COM [assembly: Guid("aa765b9c-2fce-4b84-8df6-ccb4ad0b6268")] // Version information for an assembly consists of the following four values: // // Major Version // Minor Version // Build Number // Revision // // You can specify all the values or you can default the Build and Revision Numbers // by using the '*' as shown below: // [assembly: AssemblyVersion("1.0.*")] [assembly: AssemblyVersion("1.0.0.0")] [assembly: AssemblyFileVersion("1.0.0.0")]
1234567eight-test
TelephoneCallExample/Properties/AssemblyInfo.cs
C#
asf20
1,482
using System; using System.Collections.Generic; using System.Linq; using System.Text; using Stateless; namespace TelephoneCallExample { class Program { enum Trigger { CallDialed, HungUp, CallConnected, LeftMessage, PlacedOnHold, TakenOffHold, PhoneHurledAgainstWall } enum State { OffHook, Ringing, Connected, OnHold, PhoneDestroyed } static void Main(string[] args) { var phoneCall = new StateMachine<State, Trigger>(State.OffHook); phoneCall.Configure(State.OffHook) .Permit(Trigger.CallDialed, State.Ringing); phoneCall.Configure(State.Ringing) .Permit(Trigger.HungUp, State.OffHook) .Permit(Trigger.CallConnected, State.Connected); phoneCall.Configure(State.Connected) .OnEntry(t => StartCallTimer()) .OnExit(t => StopCallTimer()) .Permit(Trigger.LeftMessage, State.OffHook) .Permit(Trigger.HungUp, State.OffHook) .Permit(Trigger.PlacedOnHold, State.OnHold); phoneCall.Configure(State.OnHold) .SubstateOf(State.Connected) .Permit(Trigger.TakenOffHold, State.Connected) .Permit(Trigger.HungUp, State.OffHook) .Permit(Trigger.PhoneHurledAgainstWall, State.PhoneDestroyed); Print(phoneCall); Fire(phoneCall, Trigger.CallDialed); Print(phoneCall); Fire(phoneCall, Trigger.CallConnected); Print(phoneCall); Fire(phoneCall, Trigger.PlacedOnHold); Print(phoneCall); Fire(phoneCall, Trigger.TakenOffHold); Print(phoneCall); Fire(phoneCall, Trigger.HungUp); Print(phoneCall); Console.WriteLine("Press any key..."); Console.ReadKey(true); } static void StartCallTimer() { Console.WriteLine("[Timer:] Call started at {0}", DateTime.Now); } static void StopCallTimer() { Console.WriteLine("[Timer:] Call ended at {0}", DateTime.Now); } static void Fire(StateMachine<State, Trigger> phoneCall, Trigger trigger) { Console.WriteLine("[Firing:] {0}", trigger); phoneCall.Fire(trigger); } static void Print(StateMachine<State, Trigger> phoneCall) { Console.WriteLine("[Status:] {0}", phoneCall); } } }
1234567eight-test
TelephoneCallExample/Program.cs
C#
asf20
2,797
using System; using System.Collections.Generic; using System.Linq; using System.Text; namespace Stateless.Tests { enum Trigger { X, Y, Z } }
1234567eight-test
Stateless.Tests/Trigger.cs
C#
asf20
177
using System; using System.Collections.Generic; using System.Linq; using System.Text; using NUnit.Framework; namespace Stateless.Tests { [TestFixture] public class TriggerWithParametersFixture { [Test] public void DescribesUnderlyingTrigger() { var twp = new StateMachine<State, Trigger>.TriggerWithParameters<string>(Trigger.X); Assert.AreEqual(Trigger.X, twp.Trigger); } [Test] public void ParametersOfCorrectTypeAreAccepted() { var twp = new StateMachine<State, Trigger>.TriggerWithParameters<string>(Trigger.X); twp.ValidateParameters(new [] { "arg" }); } [Test] public void ParametersArePolymorphic() { var twp = new StateMachine<State, Trigger>.TriggerWithParameters<object>(Trigger.X); twp.ValidateParameters(new[] { "arg" }); } [Test, ExpectedException(typeof(ArgumentException))] public void IncompatibleParametersAreNotValid() { var twp = new StateMachine<State, Trigger>.TriggerWithParameters<string>(Trigger.X); twp.ValidateParameters(new object[] { 123 }); } [Test, ExpectedException(typeof(ArgumentException))] public void TooFewParametersDetected() { var twp = new StateMachine<State, Trigger>.TriggerWithParameters<string, string>(Trigger.X); twp.ValidateParameters(new[] { "a" }); } [Test, ExpectedException(typeof(ArgumentException))] public void TooManyParametersDetected() { var twp = new StateMachine<State, Trigger>.TriggerWithParameters<string, string>(Trigger.X); twp.ValidateParameters(new[] { "a", "b", "c" }); } } }
1234567eight-test
Stateless.Tests/TriggerWithParametersFixture.cs
C#
asf20
1,858
using System; using System.Collections.Generic; using System.Linq; using System.Text; using NUnit.Framework; namespace Stateless.Tests { [TestFixture] public class StateRepresentationFixture { [Test] public void UponEntering_EnteringActionsExecuted() { var stateRepresentation = CreateRepresentation(State.B); StateMachine<State, Trigger>.Transition transition = new StateMachine<State, Trigger>.Transition(State.A, State.B, Trigger.X), actualTransition = null; stateRepresentation.AddEntryAction((t, a) => actualTransition = t); stateRepresentation.Enter(transition); Assert.AreEqual(transition, actualTransition); } [Test] public void UponLeaving_EnteringActionsNotExecuted() { var stateRepresentation = CreateRepresentation(State.B); StateMachine<State, Trigger>.Transition transition = new StateMachine<State, Trigger>.Transition(State.A, State.B, Trigger.X), actualTransition = null; stateRepresentation.AddEntryAction((t, a) => actualTransition = t); stateRepresentation.Exit(transition); Assert.IsNull(actualTransition); } [Test] public void UponLeaving_LeavingActionsExecuted() { var stateRepresentation = CreateRepresentation(State.A); StateMachine<State, Trigger>.Transition transition = new StateMachine<State, Trigger>.Transition(State.A, State.B, Trigger.X), actualTransition = null; stateRepresentation.AddExitAction(t => actualTransition = t); stateRepresentation.Exit(transition); Assert.AreEqual(transition, actualTransition); } [Test] public void UponEntering_LeavingActionsNotExecuted() { var stateRepresentation = CreateRepresentation(State.A); StateMachine<State, Trigger>.Transition transition = new StateMachine<State, Trigger>.Transition(State.A, State.B, Trigger.X), actualTransition = null; stateRepresentation.AddExitAction(t => actualTransition = t); stateRepresentation.Enter(transition); Assert.IsNull(actualTransition); } [Test] public void IncludesUnderlyingState() { var stateRepresentation = CreateRepresentation(State.B); Assert.IsTrue(stateRepresentation.Includes(State.B)); } [Test] public void DoesNotIncludeUnrelatedState() { var stateRepresentation = CreateRepresentation(State.B); Assert.IsFalse(stateRepresentation.Includes(State.C)); } [Test] public void IncludesSubstate() { var stateRepresentation = CreateRepresentation(State.B); stateRepresentation.AddSubstate(CreateRepresentation(State.C)); Assert.IsTrue(stateRepresentation.Includes(State.C)); } [Test] public void DoesNotIncludeSuperstate() { var stateRepresentation = CreateRepresentation(State.B); stateRepresentation.Superstate = CreateRepresentation(State.C); Assert.IsFalse(stateRepresentation.Includes(State.C)); } [Test] public void IsIncludedInUnderlyingState() { var stateRepresentation = CreateRepresentation(State.B); Assert.IsTrue(stateRepresentation.IsIncludedIn(State.B)); } [Test] public void IsNotIncludedInUnrelatedState() { var stateRepresentation = CreateRepresentation(State.B); Assert.IsFalse(stateRepresentation.IsIncludedIn(State.C)); } [Test] public void IsNotIncludedInSubstate() { var stateRepresentation = CreateRepresentation(State.B); stateRepresentation.AddSubstate(CreateRepresentation(State.C)); Assert.IsFalse(stateRepresentation.IsIncludedIn(State.C)); } [Test] public void IsIncludedInSuperstate() { var stateRepresentation = CreateRepresentation(State.B); stateRepresentation.Superstate = CreateRepresentation(State.C); Assert.IsTrue(stateRepresentation.IsIncludedIn(State.C)); } [Test] public void WhenTransitioningFromSubToSuperstate_SubstateEntryActionsExecuted() { StateMachine<State, Trigger>.StateRepresentation super; StateMachine<State, Trigger>.StateRepresentation sub; CreateSuperSubstatePair(out super, out sub); var executed = false; sub.AddEntryAction((t, a) => executed = true); var transition = new StateMachine<State, Trigger>.Transition(super.UnderlyingState, sub.UnderlyingState, Trigger.X); sub.Enter(transition); Assert.IsTrue(executed); } [Test] public void WhenTransitioningFromSubToSuperstate_SubstateExitActionsExecuted() { StateMachine<State, Trigger>.StateRepresentation super; StateMachine<State, Trigger>.StateRepresentation sub; CreateSuperSubstatePair(out super, out sub); var executed = false; sub.AddExitAction(t => executed = true); var transition = new StateMachine<State, Trigger>.Transition(sub.UnderlyingState, super.UnderlyingState, Trigger.X); sub.Exit(transition); Assert.IsTrue(executed); } [Test] public void WhenTransitioningToSuperFromSubstate_SuperEntryActionsNotExecuted() { StateMachine<State, Trigger>.StateRepresentation super; StateMachine<State, Trigger>.StateRepresentation sub; CreateSuperSubstatePair(out super, out sub); var executed = false; super.AddEntryAction((t, a) => executed = true); var transition = new StateMachine<State, Trigger>.Transition(super.UnderlyingState, sub.UnderlyingState, Trigger.X); super.Enter(transition); Assert.IsFalse(executed); } [Test] public void WhenTransitioningFromSuperToSubstate_SuperExitActionsNotExecuted() { StateMachine<State, Trigger>.StateRepresentation super; StateMachine<State, Trigger>.StateRepresentation sub; CreateSuperSubstatePair(out super, out sub); var executed = false; super.AddExitAction(t => executed = true); var transition = new StateMachine<State, Trigger>.Transition(super.UnderlyingState, sub.UnderlyingState, Trigger.X); super.Exit(transition); Assert.IsFalse(executed); } [Test] public void WhenEnteringSubstate_SuperEntryActionsExecuted() { StateMachine<State, Trigger>.StateRepresentation super; StateMachine<State, Trigger>.StateRepresentation sub; CreateSuperSubstatePair(out super, out sub); var executed = false; super.AddEntryAction((t, a) => executed = true); var transition = new StateMachine<State, Trigger>.Transition(State.C, sub.UnderlyingState, Trigger.X); sub.Enter(transition); Assert.IsTrue(executed); } [Test] public void WhenLeavingSubstate_SuperExitActionsExecuted() { StateMachine<State, Trigger>.StateRepresentation super; StateMachine<State, Trigger>.StateRepresentation sub; CreateSuperSubstatePair(out super, out sub); var executed = false; super.AddExitAction(t => executed = true); var transition = new StateMachine<State, Trigger>.Transition(sub.UnderlyingState, State.C, Trigger.X); sub.Exit(transition); Assert.IsTrue(executed); } [Test] public void EntryActionsExecuteInOrder() { var actual = new List<int>(); var rep = CreateRepresentation(State.B); rep.AddEntryAction((t, a) => actual.Add(0)); rep.AddEntryAction((t, a) => actual.Add(1)); rep.Enter(new StateMachine<State, Trigger>.Transition(State.A, State.B, Trigger.X)); Assert.AreEqual(2, actual.Count); Assert.AreEqual(0, actual[0]); Assert.AreEqual(1, actual[1]); } [Test] public void ExitActionsExecuteInOrder() { var actual = new List<int>(); var rep = CreateRepresentation(State.B); rep.AddExitAction(t => actual.Add(0)); rep.AddExitAction(t => actual.Add(1)); rep.Exit(new StateMachine<State, Trigger>.Transition(State.B, State.C, Trigger.X)); Assert.AreEqual(2, actual.Count); Assert.AreEqual(0, actual[0]); Assert.AreEqual(1, actual[1]); } [Test] public void WhenTransitionExists_TriggerCanBeFired() { var rep = CreateRepresentation(State.B); Assert.IsFalse(rep.CanHandle(Trigger.X)); } [Test] public void WhenTransitionDoesNotExist_TriggerCannotBeFired() { var rep = CreateRepresentation(State.B); rep.AddTriggerBehaviour(new StateMachine<State, Trigger>.IgnoredTriggerBehaviour(Trigger.X, () => true)); Assert.IsTrue(rep.CanHandle(Trigger.X)); } [Test] public void WhenTransitionExistsInSupersate_TriggerCanBeFired() { var rep = CreateRepresentation(State.B); rep.AddTriggerBehaviour(new StateMachine<State, Trigger>.IgnoredTriggerBehaviour(Trigger.X, () => true)); var sub = CreateRepresentation(State.C); sub.Superstate = rep; rep.AddSubstate(sub); Assert.IsTrue(sub.CanHandle(Trigger.X)); } [Test] public void WhenEnteringSubstate_SuperstateEntryActionsExecuteBeforeSubstate() { StateMachine<State, Trigger>.StateRepresentation super; StateMachine<State, Trigger>.StateRepresentation sub; CreateSuperSubstatePair(out super, out sub); int order = 0, subOrder = 0, superOrder = 0; super.AddEntryAction((t, a) => superOrder = order++); sub.AddEntryAction((t, a) => subOrder = order++); var transition = new StateMachine<State, Trigger>.Transition(State.C, sub.UnderlyingState, Trigger.X); sub.Enter(transition); Assert.Less(superOrder, subOrder); } [Test] public void WhenExitingSubstate_SubstateEntryActionsExecuteBeforeSuperstate() { StateMachine<State, Trigger>.StateRepresentation super; StateMachine<State, Trigger>.StateRepresentation sub; CreateSuperSubstatePair(out super, out sub); int order = 0, subOrder = 0, superOrder = 0; super.AddExitAction(t => superOrder = order++); sub.AddExitAction(t => subOrder = order++); var transition = new StateMachine<State, Trigger>.Transition(sub.UnderlyingState, State.C, Trigger.X); sub.Exit(transition); Assert.Less(subOrder, superOrder); } void CreateSuperSubstatePair(out StateMachine<State, Trigger>.StateRepresentation super, out StateMachine<State, Trigger>.StateRepresentation sub) { super = CreateRepresentation(State.A); sub = CreateRepresentation(State.B); super.AddSubstate(sub); sub.Superstate = super; } StateMachine<State, Trigger>.StateRepresentation CreateRepresentation(State state) { return new StateMachine<State, Trigger>.StateRepresentation(state); } } }
1234567eight-test
Stateless.Tests/StateRepresentationFixture.cs
C#
asf20
12,277
using System; using System.Collections.Generic; using System.Linq; using System.Text; namespace Stateless.Tests { enum State { A, B, C } }
1234567eight-test
Stateless.Tests/State.cs
C#
asf20
175
using System; using System.Collections.Generic; using System.Linq; using System.Text; using NUnit.Framework; namespace Stateless.Tests { [TestFixture] public class StateMachineFixture { const string StateA = "A", StateB = "B", StateC = "C", TriggerX = "X", TriggerY = "Y"; [Test] public void CanUseReferenceTypeMarkers() { RunSimpleTest<string, string>( new[] { StateA, StateB, StateC }, new[] { TriggerX, TriggerY }); } [Test] public void CanUseValueTypeMarkers() { RunSimpleTest<State, Trigger>( Enum.GetValues(typeof(State)).Cast<State>(), Enum.GetValues(typeof(Trigger)).Cast<Trigger>()); } void RunSimpleTest<TState, TTransition>(IEnumerable<TState> states, IEnumerable<TTransition> transitions) { var a = states.First(); var b = states.Skip(1).First(); var x = transitions.First(); var sm = new StateMachine<TState, TTransition>(a); sm.Configure(a) .Permit(x, b); sm.Fire(x); Assert.AreEqual(b, sm.State); } [Test] public void InitialStateIsCurrent() { var initial = State.B; var sm = new StateMachine<State, Trigger>(initial); Assert.AreEqual(initial, sm.State); } [Test] public void StateCanBeStoredExternally() { var state = State.B; var sm = new StateMachine<State, Trigger>(() => state, s => state = s); sm.Configure(State.B).Permit(Trigger.X, State.C); Assert.AreEqual(State.B, sm.State); Assert.AreEqual(State.B, state); sm.Fire(Trigger.X); Assert.AreEqual(State.C, sm.State); Assert.AreEqual(State.C, state); } [Test] public void SubstateIsIncludedInCurrentState() { var sm = new StateMachine<State, Trigger>(State.B); sm.Configure(State.B).SubstateOf(State.C); Assert.AreEqual(State.B, sm.State); Assert.IsTrue(sm.IsInState(State.C)); } [Test] public void WhenInSubstate_TriggerIgnoredInSuperstate_RemainsInSubstate() { var sm = new StateMachine<State, Trigger>(State.B); sm.Configure(State.B) .SubstateOf(State.C); sm.Configure(State.C) .Ignore(Trigger.X); sm.Fire(Trigger.X); Assert.AreEqual(State.B, sm.State); } [Test] public void PermittedTriggersIncludeSuperstatePermittedTriggers() { var sm = new StateMachine<State, Trigger>(State.B); sm.Configure(State.A) .Permit(Trigger.Z, State.B); sm.Configure(State.B) .SubstateOf(State.C) .Permit(Trigger.X, State.A); sm.Configure(State.C) .Permit(Trigger.Y, State.A); var permitted = sm.PermittedTriggers; Assert.IsTrue(permitted.Contains(Trigger.X)); Assert.IsTrue(permitted.Contains(Trigger.Y)); Assert.IsFalse(permitted.Contains(Trigger.Z)); } [Test] public void PermittedTriggersAreDistinctValues() { var sm = new StateMachine<State, Trigger>(State.B); sm.Configure(State.B) .SubstateOf(State.C) .Permit(Trigger.X, State.A); sm.Configure(State.C) .Permit(Trigger.X, State.B); var permitted = sm.PermittedTriggers; Assert.AreEqual(1, permitted.Count()); Assert.AreEqual(Trigger.X, permitted.First()); } [Test] public void AcceptedTriggersRespectGuards() { var sm = new StateMachine<State, Trigger>(State.B); sm.Configure(State.B) .PermitIf(Trigger.X, State.A, () => false); Assert.AreEqual(0, sm.PermittedTriggers.Count()); } [Test] public void WhenDiscriminatedByGuard_ChoosesPermitedTransition() { var sm = new StateMachine<State, Trigger>(State.B); sm.Configure(State.B) .PermitIf(Trigger.X, State.A, () => false) .PermitIf(Trigger.X, State.C, () => true); sm.Fire(Trigger.X); Assert.AreEqual(State.C, sm.State); } [Test] public void WhenTriggerIsIgnored_ActionsNotExecuted() { var sm = new StateMachine<State, Trigger>(State.B); bool fired = false; sm.Configure(State.B) .OnEntry(t => fired = true) .Ignore(Trigger.X); sm.Fire(Trigger.X); Assert.IsFalse(fired); } [Test] public void IfSelfTransitionPermited_ActionsFire() { var sm = new StateMachine<State, Trigger>(State.B); bool fired = false; sm.Configure(State.B) .OnEntry(t => fired = true) .PermitReentry(Trigger.X); sm.Fire(Trigger.X); Assert.IsTrue(fired); } [Test, ExpectedException(typeof(ArgumentException))] public void ImplicitReentryIsDisallowed() { var sm = new StateMachine<State, Trigger>(State.B); sm.Configure(State.B) .Permit(Trigger.X, State.B); } [Test, ExpectedException(typeof(InvalidOperationException))] public void TriggerParametersAreImmutableOnceSet() { var sm = new StateMachine<State, Trigger>(State.B); sm.SetTriggerParameters<string, int>(Trigger.X); sm.SetTriggerParameters<string>(Trigger.X); } [Test] public void ParametersSuppliedToFireArePassedToEntryAction() { var sm = new StateMachine<State, Trigger>(State.B); var x = sm.SetTriggerParameters<string, int>(Trigger.X); sm.Configure(State.B) .Permit(Trigger.X, State.C); string entryArgS = null; int entryArgI = 0; sm.Configure(State.C) .OnEntryFrom(x, (s, i) => { entryArgS = s; entryArgI = i; }); var suppliedArgS = "something"; var suppliedArgI = 42; sm.Fire(x, suppliedArgS, suppliedArgI); Assert.AreEqual(suppliedArgS, entryArgS); Assert.AreEqual(suppliedArgI, entryArgI); } [Test] public void WhenAnUnhandledTriggerIsFired_TheProvidedHandlerIsCalledWithStateAndTrigger() { var sm = new StateMachine<State, Trigger>(State.B); State? state = null; Trigger? trigger = null; sm.OnUnhandledTrigger((s, t) => { state = s; trigger = t; }); sm.Fire(Trigger.Z); Assert.AreEqual(State.B, state); Assert.AreEqual(Trigger.Z, trigger); } } }
1234567eight-test
Stateless.Tests/StateMachineFixture.cs
C#
asf20
7,697
using System; using System.Collections.Generic; using System.Linq; using System.Text; using NUnit.Framework; namespace Stateless.Tests { [TestFixture] public class DynamicTriggerBehaviour { [Test] public void DestinationStateIsDynamic() { var sm = new StateMachine<State, Trigger>(State.A); sm.Configure(State.A) .PermitDynamic(Trigger.X, () => State.B); sm.Fire(Trigger.X); Assert.AreEqual(State.B, sm.State); } [Test] public void DestinationStateIsCalculatedBasedOnTriggerParameters() { var sm = new StateMachine<State, Trigger>(State.A); var trigger = sm.SetTriggerParameters<int>(Trigger.X); sm.Configure(State.A) .PermitDynamic(trigger, i => i == 1 ? State.B : State.C); sm.Fire(trigger, 1); Assert.AreEqual(State.B, sm.State); } } }
1234567eight-test
Stateless.Tests/DynamicTriggerBehaviourFixture.cs
C#
asf20
1,005
using System; using System.Collections.Generic; using System.Linq; using System.Text; using NUnit.Framework; namespace Stateless.Tests { [TestFixture] public class IgnoredTriggerBehaviourFixture { [Test] public void StateRemainsUnchanged() { var ignored = new StateMachine<State, Trigger>.IgnoredTriggerBehaviour(Trigger.X, () => true); State destination = State.A; Assert.IsFalse(ignored.ResultsInTransitionFrom(State.B, new object[0], out destination)); } [Test] public void ExposesCorrectUnderlyingTrigger() { var ignored = new StateMachine<State, Trigger>.IgnoredTriggerBehaviour( Trigger.X, () => true); Assert.AreEqual(Trigger.X, ignored.Trigger); } [Test] public void WhenGuardConditionFalse_IsGuardConditionMetIsFalse() { var ignored = new StateMachine<State, Trigger>.IgnoredTriggerBehaviour( Trigger.X, () => false); Assert.IsFalse(ignored.IsGuardConditionMet); } [Test] public void WhenGuardConditionTrue_IsGuardConditionMetIsTrue() { var ignored = new StateMachine<State, Trigger>.IgnoredTriggerBehaviour( Trigger.X, () => true); Assert.IsTrue(ignored.IsGuardConditionMet); } } }
1234567eight-test
Stateless.Tests/IgnoredTriggerBehaviourFixture.cs
C#
asf20
1,449
using System; using System.Collections.Generic; using System.Linq; using System.Text; using NUnit.Framework; namespace Stateless.Tests { [TestFixture] public class TriggerBehaviourFixture { [Test] public void ExposesCorrectUnderlyingTrigger() { var transtioning = new StateMachine<State, Trigger>.TransitioningTriggerBehaviour( Trigger.X, State.C, () => true); Assert.AreEqual(Trigger.X, transtioning.Trigger); } [Test] public void WhenGuardConditionFalse_IsGuardConditionMetIsFalse() { var transtioning = new StateMachine<State, Trigger>.TransitioningTriggerBehaviour( Trigger.X, State.C, () => false); Assert.IsFalse(transtioning.IsGuardConditionMet); } [Test] public void WhenGuardConditionTrue_IsGuardConditionMetIsTrue() { var transtioning = new StateMachine<State, Trigger>.TransitioningTriggerBehaviour( Trigger.X, State.C, () => true); Assert.IsTrue(transtioning.IsGuardConditionMet); } } }
1234567eight-test
Stateless.Tests/TriggerBehaviourFixture.cs
C#
asf20
1,179
using System.Reflection; using System.Runtime.CompilerServices; using System.Runtime.InteropServices; // General Information about an assembly is controlled through the following // set of attributes. Change these attribute values to modify the information // associated with an assembly. [assembly: AssemblyTitle("Stateless.Tests")] [assembly: AssemblyDescription("")] [assembly: AssemblyConfiguration("")] [assembly: AssemblyCompany("<Not Specified>")] [assembly: AssemblyProduct("Stateless.Tests")] [assembly: AssemblyCopyright("Copyright © <Not Specified> 2008")] [assembly: AssemblyTrademark("")] [assembly: AssemblyCulture("")] // Setting ComVisible to false makes the types in this assembly not visible // to COM components. If you need to access a type in this assembly from // COM, set the ComVisible attribute to true on that type. [assembly: ComVisible(false)] // The following GUID is for the ID of the typelib if this project is exposed to COM [assembly: Guid("54ff4308-3f3b-47bd-93f0-453e572862d0")] // Version information for an assembly consists of the following four values: // // Major Version // Minor Version // Build Number // Revision // // You can specify all the values or you can default the Build and Revision Numbers // by using the '*' as shown below: // [assembly: AssemblyVersion("1.0.*")] [assembly: AssemblyVersion("1.0.0.0")] [assembly: AssemblyFileVersion("1.0.0.0")]
1234567eight-test
Stateless.Tests/Properties/AssemblyInfo.cs
C#
asf20
1,472
using System; using System.Collections.Generic; using System.Linq; using System.Text; using NUnit.Framework; namespace Stateless.Tests { [TestFixture] public class TransitionFixture { [Test] public void IdentityTransitionIsNotChange() { StateMachine<int, int>.Transition t = new StateMachine<int, int>.Transition(1, 1, 0); Assert.IsTrue(t.IsReentry); } [Test] public void TransitioningTransitionIsChange() { StateMachine<int, int>.Transition t = new StateMachine<int, int>.Transition(1, 2, 0); Assert.IsFalse(t.IsReentry); } } }
1234567eight-test
Stateless.Tests/TransitionFixture.cs
C#
asf20
688
using System; using System.Collections.Generic; using System.Linq; using System.Text; using NUnit.Framework; namespace Stateless.Tests { [TestFixture] public class TransitioningTriggerBehaviourFixture { [Test] public void TransitionsToDestinationState() { var transtioning = new StateMachine<State, Trigger>.TransitioningTriggerBehaviour(Trigger.X, State.C, () => true); State destination; Assert.IsTrue(transtioning.ResultsInTransitionFrom(State.B, new object[0], out destination)); Assert.AreEqual(State.C, destination); } } }
1234567eight-test
Stateless.Tests/TransitioningTriggerBehaviourFixture.cs
C#
asf20
650
//============================================================================= // System : Color Syntax Highlighter // File : Highlight.js // Author : Eric Woodruff (Eric@EWoodruff.us) // Updated : 11/13/2007 // Note : Copyright 2006, Eric Woodruff, All rights reserved // // This contains the script to expand and collapse the regions in the // syntax highlighted code. // //============================================================================= // Expand/collapse a region function HighlightExpandCollapse(showId, hideId) { var showSpan = document.getElementById(showId), hideSpan = document.getElementById(hideId); showSpan.style.display = "inline"; hideSpan.style.display = "none"; } // Copy the code if Enter or Space is hit with the image focused function CopyColorizedCodeCheckKey(titleDiv, eventObj) { if(eventObj != undefined && (eventObj.keyCode == 13 || eventObj.keyCode == 32)) CopyColorizedCode(titleDiv); } // Change the icon as the mouse moves in and out of the Copy Code link // There should be an image with the same name but an "_h" suffix just // before the extension. function CopyCodeChangeIcon(linkSpan) { var image = linkSpan.firstChild.src; var pos = image.lastIndexOf("."); if(linkSpan.className == "highlight-copycode") { linkSpan.className = "highlight-copycode_h"; linkSpan.firstChild.src = image.substr(0, pos) + "_h" + image.substr(pos); } else { linkSpan.className = "highlight-copycode"; linkSpan.firstChild.src = image.substr(0, pos - 2) + image.substr(pos); } } // Copy the code from a colorized code block to the clipboard. function CopyColorizedCode(titleDiv) { var preTag, idx, line, block, htmlLines, lines, codeText, hasLineNos, hasRegions, clip, trans, copyObject, clipID; var reLineNo = /^\s*\d{1,4}/; var reRegion = /^\s*\d{1,4}\+.*?\d{1,4}-/; var reRegionText = /^\+.*?\-/; // Find the <pre> tag containing the code. It should be in the next // element or one of its children. block = titleDiv.nextSibling; while(block.nodeName == "#text") block = block.nextSibling; while(block.tagName != "PRE") { block = block.firstChild; while(block.nodeName == "#text") block = block.nextSibling; } if(block.innerText != undefined) codeText = block.innerText; else codeText = block.textContent; hasLineNos = block.innerHTML.indexOf("highlight-lineno"); hasRegions = block.innerHTML.indexOf("highlight-collapsebox"); htmlLines = block.innerHTML.split("\n"); lines = codeText.split("\n"); // Remove the line numbering and collapsible regions if present if(hasLineNos != -1 || hasRegions != -1) { codeText = ""; for(idx = 0; idx < lines.length; idx++) { line = lines[idx]; if(hasRegions && reRegion.test(line)) line = line.replace(reRegion, ""); else { line = line.replace(reLineNo, ""); // Lines in expanded blocks have an extra space if(htmlLines[idx].indexOf("highlight-expanded") != -1 || htmlLines[idx].indexOf("highlight-endblock") != -1) line = line.substr(1); } if(hasRegions && reRegionText.test(line)) line = line.replace(reRegionText, ""); codeText += line; // Not all browsers keep the line feed when split if(line[line.length - 1] != "\n") codeText += "\n"; } } // IE or FireFox/Netscape? if(window.clipboardData) window.clipboardData.setData("Text", codeText); else if(window.netscape) { // Give unrestricted access to browser APIs using XPConnect try { netscape.security.PrivilegeManager.enablePrivilege( "UniversalXPConnect"); } catch(e) { alert("Universal Connect was refused, cannot copy to " + "clipboard. Go to about:config and set " + "signed.applets.codebase_principal_support to true to " + "enable clipboard support."); return; } // Creates an instance of nsIClipboard clip = Components.classes[ "@mozilla.org/widget/clipboard;1"].createInstance( Components.interfaces.nsIClipboard); // Creates an instance of nsITransferable if(clip) trans = Components.classes[ "@mozilla.org/widget/transferable;1"].createInstance( Components.interfaces.nsITransferable); if(!trans) { alert("Copy to Clipboard is not supported by this browser"); return; } // Register the data flavor trans.addDataFlavor("text/unicode"); // Create object to hold the data copyObject = new Object(); // Creates an instance of nsISupportsString copyObject = Components.classes[ "@mozilla.org/supports-string;1"].createInstance( Components.interfaces.nsISupportsString); // Assign the data to be copied copyObject.data = codeText; // Add data objects to transferable trans.setTransferData("text/unicode", copyObject, codeText.length * 2); clipID = Components.interfaces.nsIClipboard; if(!clipID) { alert("Copy to Clipboard is not supported by this browser"); return; } // Transfer the data to the clipboard clip.setData(trans, null, clipID.kGlobalClipboard); } else alert("Copy to Clipboard is not supported by this browser"); }
1234567eight-test
Resource/SHFB/Colorizer/highlight.js
JavaScript
asf20
6,267
.highlight-inline { color: #000066; font-size: 9pt; font-family: Consolas, "Courier New", Courier, monospace; } .highlight-pre { clear: both; width: 99.5%; background-color: #EFEFF7; padding: 0.4em; font-size: 9pt; font-family: Consolas, "Courier New", Courier, monospace; margin-top: 0px; margin-bottom: 1em; } .highlight-comment { color: #006633; } .highlight-literal { color: #CC0000; } .highlight-number { color: #009966; } .highlight-keyword { color: #0000FF; } .highlight-preprocessor { color: #996666; } .highlight-xml-tag { color: #AA4400 } .highlight-xml-bracket { color: #0000FF } .highlight-xml-comment { color: #008800 } .highlight-xml-cdata { color: #AA0088 } .highlight-xml-attribute-name { color: #0000FF } .highlight-xml-attribute-equal { color: #000000 } .highlight-xml-attribute-value {color: #CC0000 } .highlight-title { font-weight: bold; margin-top: 1em; margin-bottom: 2px; border-bottom: gray 1px solid; padding-bottom: 3px; } .highlight-copycode { float: right; padding-right: 10px; font-weight: normal; cursor: pointer; } .highlight-copycode_h { float: right; padding-right: 10px; font-weight: normal; cursor: pointer; text-decoration: underline} .highlight-lineno { font-size: 80%; color: black } .highlight-lnborder { border-right-style: solid; border-right-width: 1px; border-color: gray; padding-right: 4px; margin-right: 4px; width: 4px;} .highlight-spacer { padding-right: 20px; } .highlight-spacerShort { padding-right: 5px; } .highlight-collapsebox { cursor: pointer; color: black; text-align: center; border-style: solid; border-width: 1px; border-color: gray; margin-left: 2px; margin-right: 5px; } .highlight-collapsed { border-style: solid; border-width: 1px; border-color: gray; margin: 2px; color: gray; } .highlight-expanded { border-left-style: solid; border-left-width: 1px; border-color: gray; margin-left: 2px; margin-right: 10px; } .highlight-endblock { border-left-style: solid; border-left-width: 1px; border-bottom-style: solid; border-bottom-width: 1px; border-color: gray; margin-left: 2px; margin-right: 10px; } .highlight-pshell-cmdlet { color: #5A9EA5; font-weight: bold; } .highlight-namespace { color: #008284; }
1234567eight-test
Resource/SHFB/Colorizer/highlight.css
CSS
asf20
2,195
<?xml version="1.0" encoding="ISO-8859-1"?> <xsl:stylesheet xmlns:xsl="http://www.w3.org/1999/XSL/Transform" version="1.0"> <xsl:output encoding="ISO-8859-1" indent="no" omit-xml-declaration="yes"/> <xsl:template match="code"> <xsl:value-of select="text()" disable-output-escaping="yes" /> </xsl:template> <xsl:template match="cpp-linecomment"> <span class="highlight-comment">//<xsl:value-of select="text()" disable-output-escaping="yes" /></span> </xsl:template> <xsl:template match="vb-comment"> <span class="highlight-comment"><xsl:value-of select="text()" disable-output-escaping="yes" /></span> </xsl:template> <xsl:template match="cpp-blockcomment"> <span class="highlight-comment">/*<xsl:value-of select="text()" disable-output-escaping="yes" />*/</span> </xsl:template> <xsl:template match="sql-blockcomment"> <span class="highlight-comment">/*<xsl:value-of select="text()" disable-output-escaping="yes" />*/</span> </xsl:template> <xsl:template match="sql-linecomment"> <span class="highlight-comment">--<xsl:value-of select="text()" disable-output-escaping="yes" /></span> </xsl:template> <xsl:template match="pshell-linecomment"> <span class="highlight-comment"><xsl:value-of select="text()" disable-output-escaping="yes" /></span> </xsl:template> <xsl:template match="pshell-cmdlet"> <span class="highlight-pshell-cmdlet"><xsl:value-of select="text()" disable-output-escaping="yes" /></span> </xsl:template> <xsl:template match="namespace"> <span class="highlight-namespace"><xsl:value-of select="text()" disable-output-escaping="yes" /></span> </xsl:template> <xsl:template match="literal"> <span class="highlight-literal"><xsl:value-of select="text()" disable-output-escaping="yes" /></span> </xsl:template> <xsl:template match="number"> <span class="highlight-number"><xsl:value-of select="text()" disable-output-escaping="yes" /></span> </xsl:template> <xsl:template match="keyword"> <span class="highlight-keyword"><xsl:value-of select="text()" disable-output-escaping="yes" /></span> </xsl:template> <xsl:template match="preprocessor"> <span class="highlight-preprocessor"><xsl:value-of select="text()" disable-output-escaping="yes" /></span> </xsl:template> <xsl:template match="xml-value"><xsl:value-of select="text()" disable-output-escaping="yes" /></xsl:template> <xsl:template match="xml-tag"><span class="highlight-xml-tag"><xsl:value-of select="text()" disable-output-escaping="yes" /></span></xsl:template> <xsl:template match="xml-bracket"><span class="highlight-xml-bracket"><xsl:value-of select="text()" disable-output-escaping="yes" /></span></xsl:template> <xsl:template match="xml-comment"><span class="highlight-xml-comment"><xsl:value-of select="text()" disable-output-escaping="yes"/></span></xsl:template> <xsl:template match="xml-cdata"> <span class="highlight-xml-bracket"><xsl:text>&lt;![CDATA[</xsl:text></span> <span class="highlight-xml-cdata"><xsl:value-of select="text()" disable-output-escaping="yes" /></span> <span class="highlight-xml-bracket"><xsl:text>]]&gt;</xsl:text></span> </xsl:template> <xsl:template match="xml-attribute-name"><span class="highlight-xml-attribute-name"><xsl:value-of select="text()" disable-output-escaping="yes" /></span></xsl:template> <xsl:template match="xml-attribute-equal"><span class="highlight-xml-attribute-equal"><xsl:value-of select="text()" disable-output-escaping="yes" /></span></xsl:template> <xsl:template match="xml-attribute-value"><span class="highlight-xml-attribute-value"><xsl:value-of select="text()" disable-output-escaping="yes" /></span></xsl:template> <xsl:template match="parsedcode"> <xsl:choose> <xsl:when test="@in-box[.=0]"> <xsl:element name="span"> <xsl:attribute name="class">highlight-inline</xsl:attribute> <xsl:apply-templates/> </xsl:element> </xsl:when> <xsl:otherwise> <xsl:apply-templates/> </xsl:otherwise> </xsl:choose> </xsl:template> <xsl:template match="/"> <xsl:apply-templates/> </xsl:template> </xsl:stylesheet>
1234567eight-test
Resource/SHFB/Colorizer/highlight.xsl
XSLT
asf20
4,075
@ECHO OFF IF NOT EXIST "%DXROOT%Data\Reflection\*.xml" GOTO BuildData ECHO * ECHO * %DXROOT%Data\Reflection already exists. ECHO * ECHO * With the October 2007 release and on, it is not necessary to create the ECHO * files unless you install a newer version of the .NET Framework. If ECHO * you want to recreate it, you must delete the folder first. ECHO * PAUSE GOTO Done :BuildData ECHO * ECHO * This will build the Sandcastle refelection data prior to first use. ECHO * This may take up to 30 minutes so please be patient. Hit any key ECHO * to start or Ctrl+C to cancel. ECHO * ECHO * NOTE: If running this on Vista, you may need to edit the shortcut that ECHO * started this script to give it Run as Administrator priviliges. ECHO * PAUSE REM Determine the most recent .NET version installed SET DNVER=2.0 IF EXIST "%WINDIR%\Microsoft.NET\Framework\v3.0\*.*" SET DNVER=3.0 IF EXIST "%WINDIR%\Microsoft.NET\Framework\v3.5\*.*" SET DNVER=3.5 "%WINDIR%\Microsoft.Net\Framework\v2.0.50727\msbuild" "%DXROOT%Examples\Sandcastle\fxReflection.proj" /Property:NetfxVer=%DNVER% /Property:PresentationStyle=vs2005 REM Clean up by removing some unnecessary stuff RD /S /Q "%DXROOT%Data\Tmp" del "%DXROOT%Data\Reflection\AdoNetDiag.xml" del "%DXROOT%Data\Reflection\alink.xml" del "%DXROOT%Data\Reflection\aspnet_filter.xml" del "%DXROOT%Data\Reflection\aspnet_isapi.xml" del "%DXROOT%Data\Reflection\Aspnet_perf.xml" del "%DXROOT%Data\Reflection\aspnet_rc.xml" del "%DXROOT%Data\Reflection\CORPerfMonExt.xml" del "%DXROOT%Data\Reflection\cscomp.xml" del "%DXROOT%Data\Reflection\Culture.xml" del "%DXROOT%Data\Reflection\dfdll.xml" del "%DXROOT%Data\Reflection\diasymreader.xml" del "%DXROOT%Data\Reflection\EventLogMessages.xml" del "%DXROOT%Data\Reflection\fusion.xml" del "%DXROOT%Data\Reflection\InstallUtilLib.xml" del "%DXROOT%Data\Reflection\MmcAspExt.xml" del "%DXROOT%Data\Reflection\mscordacwks.xml" del "%DXROOT%Data\Reflection\mscordbc.xml" del "%DXROOT%Data\Reflection\mscordbi.xml" del "%DXROOT%Data\Reflection\mscorie.xml" del "%DXROOT%Data\Reflection\mscorjit.xml" del "%DXROOT%Data\Reflection\mscorld.xml" del "%DXROOT%Data\Reflection\mscorpe.xml" del "%DXROOT%Data\Reflection\mscorrc.xml" del "%DXROOT%Data\Reflection\mscorsec.xml" del "%DXROOT%Data\Reflection\mscorsn.xml" del "%DXROOT%Data\Reflection\mscorsvc.xml" del "%DXROOT%Data\Reflection\mscortim.xml" del "%DXROOT%Data\Reflection\mscorwks.xml" del "%DXROOT%Data\Reflection\normalization.xml" del "%DXROOT%Data\Reflection\PerfCounter.xml" del "%DXROOT%Data\Reflection\peverify.xml" del "%DXROOT%Data\Reflection\sbscmp20_mscorlib.xml" del "%DXROOT%Data\Reflection\shfusion.xml" del "%DXROOT%Data\Reflection\ShFusRes.xml" del "%DXROOT%Data\Reflection\SOS.xml" del "%DXROOT%Data\Reflection\sysglobl.xml" del "%DXROOT%Data\Reflection\System.EnterpriseServices.Thunk.xml" del "%DXROOT%Data\Reflection\System.EnterpriseServices.Wrapper.xml" del "%DXROOT%Data\Reflection\TLBREF.xml" del "%DXROOT%Data\Reflection\vjsc.xml" del "%DXROOT%Data\Reflection\vjsnativ.xml" del "%DXROOT%Data\Reflection\VsaVb7rt.xml" del "%DXROOT%Data\Reflection\webengine.xml" del "%DXROOT%Data\Reflection\WMINet_Utils.xml" del "%DXROOT%Data\Reflection\HtmlLite.xml" del "%DXROOT%Data\Reflection\NaturalLanguage6.xml" del "%DXROOT%Data\Reflection\NlsData0009.xml" del "%DXROOT%Data\Reflection\NlsLexicons0009.xml" del "%DXROOT%Data\Reflection\PenIMC.xml" del "%DXROOT%Data\Reflection\PresentationHostDLL.xml" del "%DXROOT%Data\Reflection\SITSetup.xml" del "%DXROOT%Data\Reflection\ServiceModelEvents.xml" del "%DXROOT%Data\Reflection\ServiceMonikerSupport.xml" del "%DXROOT%Data\Reflection\WapRes.1025.xml" del "%DXROOT%Data\Reflection\WapRes.1028.xml" del "%DXROOT%Data\Reflection\WapRes.1029.xml" del "%DXROOT%Data\Reflection\WapRes.1030.xml" del "%DXROOT%Data\Reflection\WapRes.1031.xml" del "%DXROOT%Data\Reflection\WapRes.1032.xml" del "%DXROOT%Data\Reflection\WapRes.1035.xml" del "%DXROOT%Data\Reflection\WapRes.1036.xml" del "%DXROOT%Data\Reflection\WapRes.1037.xml" del "%DXROOT%Data\Reflection\WapRes.1038.xml" del "%DXROOT%Data\Reflection\WapRes.1040.xml" del "%DXROOT%Data\Reflection\WapRes.1041.xml" del "%DXROOT%Data\Reflection\WapRes.1042.xml" del "%DXROOT%Data\Reflection\WapRes.1043.xml" del "%DXROOT%Data\Reflection\WapRes.1044.xml" del "%DXROOT%Data\Reflection\WapRes.1045.xml" del "%DXROOT%Data\Reflection\WapRes.1046.xml" del "%DXROOT%Data\Reflection\WapRes.1049.xml" del "%DXROOT%Data\Reflection\WapRes.1053.xml" del "%DXROOT%Data\Reflection\WapRes.1055.xml" del "%DXROOT%Data\Reflection\WapRes.2052.xml" del "%DXROOT%Data\Reflection\WapRes.2070.xml" del "%DXROOT%Data\Reflection\WapRes.3082.xml" del "%DXROOT%Data\Reflection\WapRes.xml" del "%DXROOT%Data\Reflection\WapUI.xml" del "%DXROOT%Data\Reflection\dlmgr.xml" del "%DXROOT%Data\Reflection\gencomp.xml" del "%DXROOT%Data\Reflection\install.res.1033.xml" del "%DXROOT%Data\Reflection\setupres.1025.xml" del "%DXROOT%Data\Reflection\setupres.1028.xml" del "%DXROOT%Data\Reflection\setupres.1029.xml" del "%DXROOT%Data\Reflection\setupres.1030.xml" del "%DXROOT%Data\Reflection\setupres.1031.xml" del "%DXROOT%Data\Reflection\setupres.1032.xml" del "%DXROOT%Data\Reflection\setupres.1035.xml" del "%DXROOT%Data\Reflection\setupres.1036.xml" del "%DXROOT%Data\Reflection\setupres.1037.xml" del "%DXROOT%Data\Reflection\setupres.1038.xml" del "%DXROOT%Data\Reflection\setupres.1040.xml" del "%DXROOT%Data\Reflection\setupres.1041.xml" del "%DXROOT%Data\Reflection\setupres.1042.xml" del "%DXROOT%Data\Reflection\setupres.1043.xml" del "%DXROOT%Data\Reflection\setupres.1044.xml" del "%DXROOT%Data\Reflection\setupres.1045.xml" del "%DXROOT%Data\Reflection\setupres.1046.xml" del "%DXROOT%Data\Reflection\setupres.1049.xml" del "%DXROOT%Data\Reflection\setupres.1053.xml" del "%DXROOT%Data\Reflection\setupres.1055.xml" del "%DXROOT%Data\Reflection\setupres.2052.xml" del "%DXROOT%Data\Reflection\setupres.2070.xml" del "%DXROOT%Data\Reflection\setupres.3082.xml" del "%DXROOT%Data\Reflection\setupres.xml" del "%DXROOT%Data\Reflection\vs70uimgr.xml" del "%DXROOT%Data\Reflection\vs_setup.xml" del "%DXROOT%Data\Reflection\vsbasereqs.xml" del "%DXROOT%Data\Reflection\vsscenario.xml" ECHO * ECHO * The reflection data has been built. Hit any key to exit. ECHO * PAUSE :Done
1234567eight-test
Resource/SHFB/BuildReflectionData.bat
Batchfile
asf20
6,458
@ECHO OFF REM Step 4.1 - Build the reference help topics "{@SandcastlePath}ProductionTools\BuildAssembler" /config:conceptual.config ConceptualManifest.xml
1234567eight-test
Resource/SHFB/Templates/BuildConceptualTopics.bat
Batchfile
asf20
161
@ECHO OFF REM Step 3 - Transform the reflection output if {%1} == {vs2005} ( "{@SandcastlePath}ProductionTools\XslTransform" /xsl:"{@SandcastlePath}ProductionTransforms\ApplyVSDocModel.xsl","{@SandcastlePath}ProductionTransforms\AddGuidFilenames.xsl" reflection.org /out:reflection.xml /arg:IncludeAllMembersTopic=true /arg:IncludeInheritedOverloadTopics=true {@IncludeProjectNode} ) else if {%1} == {hana} ( "{@SandcastlePath}ProductionTools\XslTransform" /xsl:"{@SandcastlePath}ProductionTransforms\ApplyVSDocModel.xsl","{@SandcastlePath}ProductionTransforms\AddGuidFilenames.xsl" reflection.org /out:reflection.xml /arg:IncludeAllMembersTopic=false /arg:IncludeInheritedOverloadTopics=true {@IncludeProjectNode} ) else ( "{@SandcastlePath}ProductionTools\XslTransform" /xsl:"{@SandcastlePath}ProductionTransforms\ApplyPrototypeDocModel.xsl","{@SandcastlePath}ProductionTransforms\AddGuidFilenames.xsl" reflection.org /out:reflection.xml ) REM Generate a topic manifest "{@SandcastlePath}ProductionTools\XslTransform" /xsl:"{@SandcastlePath}ProductionTransforms\ReflectionToManifest.xsl" reflection.xml /out:manifest.xml
1234567eight-test
Resource/SHFB/Templates/TransformManifest.bat
Batchfile
asf20
1,138
@ECHO OFF REM Step 6.2 - Generate a packaged table of content for an HTML 2.x help file "{@SandcastlePath}ProductionTools\XslTransform" /xsl:"{@SandcastlePath}ProductionTransforms\TocToHxSContents.xsl" toc.xml /out:"{@HTMLHelpName}.HxT"
1234567eight-test
Resource/SHFB/Templates/Generate2xTOC.bat
Batchfile
asf20
242
<?xml version="1.0" encoding="utf-8"?> <xsl:stylesheet version="1.1" xmlns:xsl="http://www.w3.org/1999/XSL/Transform" xmlns:MSHelp="http://msdn.microsoft.com/mshelp" xmlns:mshelp="http://msdn.microsoft.com/mshelp" xmlns:ddue="http://ddue.schemas.microsoft.com/authoring/2003/5" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:msxsl="urn:schemas-microsoft-com:xslt"> <!-- // System : Sandcastle Help File Builder Utilities // File : Hana.xsl // Author : Eric Woodruff // Updated : 03/15/2008 // Note : Copyright 2007-2008, Eric Woodruff, All rights reserved // // This is used to convert *.topic additional content files into *.html files // that have the same appearance as API topics using the Hana presentation // style. --> <xsl:output method="xml" omit-xml-declaration="yes" encoding="utf-8" /> <!-- This parameter, if specified, defines the path to the root folder --> <xsl:param name="pathToRoot" select="string('')" /> <!-- Allow for alternate header text --> <xsl:variable name="customHeader"> <xsl:choose> <xsl:when test="topic/headerTitle"> <xsl:value-of select="topic/headerTitle"/> </xsl:when> <xsl:otherwise> <!-- The product title is replaced with the project's HTML encoded HelpTitle value --> <@HtmlEncHelpTitle/> </xsl:otherwise> </xsl:choose> </xsl:variable> <!-- Main template for the topic --> <xsl:template match="/topic"> <html> <head> <title><xsl:value-of select="title"/></title> <link rel="stylesheet" type="text/css" href="{$pathToRoot}styles/presentation.css" /> <link rel="stylesheet" type="text/css" href="ms-help://Hx/HxRuntime/HxLink.css" /> <link rel="stylesheet" type="text/css" href="ms-help://Dx/DxRuntime/DxLink.css" /> <script type="text/javascript" src="{$pathToRoot}scripts/EventUtilities.js"></script> <script type="text/javascript" src="{$pathToRoot}scripts/SplitScreen.js"></script> <script type="text/javascript" src="{$pathToRoot}scripts/Dropdown.js"></script> <script type="text/javascript" src="{$pathToRoot}scripts/script_manifold.js"></script> <script type="text/javascript" src="{$pathToRoot}scripts/LanguageFilter.js"></script> <script type="text/javascript" src="{$pathToRoot}scripts/DataStore.js"></script> <script type="text/javascript" src="{$pathToRoot}scripts/CommonUtilities.js"></script> <script type="text/javascript" src="{$pathToRoot}scripts/MemberFilter.js"></script> <META HTTP-EQUIV="Content-Type" CONTENT="text/html; charset=UTF-8" /> <META NAME="save" CONTENT="history" /> <!-- Stylesheet and script for colorized code blocks --> <link type="text/css" rel="stylesheet" href="{$pathToRoot}styles/highlight.css" /> <script type="text/javascript" src="{$pathToRoot}scripts/highlight.js"></script> <xml> <MSHelp:Attr Name="DocSet" Value="NetFramework" /> <MSHelp:Attr Name="DocSet" Value="<@HtmlHelpName>" /> <MSHelp:Attr Name="Locale" Value="<@Locale>" /> <MSHelp:Attr Name="TargetOS" Value="Windows" /> <!-- Include the user's XML data island for HTML Help 2.0 if present --> <xsl:if test="xml"> <xsl:copy-of select="xml/*"/> </xsl:if> </xml> <!-- Add a link to an additional stylesheet if specified --> <xsl:if test="styleSheet"> <link rel="stylesheet" type="text/css"> <xsl:attribute name="href"> <xsl:value-of select="$pathToRoot"/> <xsl:value-of select="styleSheet/@filename"/> </xsl:attribute> </link> </xsl:if> </head> <body> <input type="hidden" id="userDataCache" class="userDataStyle" /> <input type="hidden" id="hiddenScrollOffset" /> <img id="collapseImage" style="display:none; height:0; width:0;" src="{$pathToRoot}icons/collapse_all.gif" alt="Collapse image"/> <img id="expandImage" style="display:none; height:0; width:0;" src="{$pathToRoot}icons/expand_all.gif" alt="Expand Image"/> <img id="collapseAllImage" style="display:none; height:0; width:0;" src="{$pathToRoot}icons/collall.gif" alt="CollapseAll image"/> <img id="expandAllImage" style="display:none; height:0; width:0;" src="{$pathToRoot}icons/expall.gif" alt="ExpandAll image"/> <img id="dropDownImage" style="display:none; height:0; width:0;" src="{$pathToRoot}icons/twirl_unselected.gif" alt="DropDown image"/> <img id="dropDownHoverImage" style="display:none; height:0; width:0;" src="{$pathToRoot}icons/twirl_unselected_hover.gif" alt="DropDownHover image"/> <img id="copyImage" style="display:none; height:0; width:0;" src="{$pathToRoot}icons/copycode.gif" alt="Copy image"/> <img id="copyHoverImage" style="display:none; height:0; width:0;" src="{$pathToRoot}icons/copycodeHighlight.gif" alt="CopyHover image"/> <img id="checkBoxSelectImage" style="display:none; height:0; width:0;" src="{$pathToRoot}icons/ch_selected.gif"/> <img id="checkBoxUnSelectImage" style="display:none; height:0; width:0;" src="{$pathToRoot}icons/ch_unselected.gif"/> <img id="checkBoxSelectHoverImage" style="display:none; height:0; width:0;" src="{$pathToRoot}icons/ch_selected_hover.gif"/> <img id="checkBoxUnSelectHoverImage" style="display:none; height:0; width:0;" src="{$pathToRoot}icons/ch_unselected_hover.gif"/> <img id="radioSelectImage" style="display:none; height:0; width:0;" src="{$pathToRoot}icons/r_select.gif"/> <img id="radioUnSelectImage" style="display:none; height:0; width:0;" src="{$pathToRoot}icons/r_unselect.gif"/> <img id="radioSelectHoverImage" style="display:none; height:0; width:0;" src="{$pathToRoot}icons/r_select_hover.gif"/> <img id="radioUnSelectHoverImage" style="display:none; height:0; width:0;" src="{$pathToRoot}icons/r_unselect_hover.gif"/> <img id="curvedLeftSelectImage" style="display:none; height:0; width:0;" src="{$pathToRoot}icons/tab_sel_lft_cnr.gif"/> <img id="curvedRightSelectImage" style="display:none; height:0; width:0;" src="{$pathToRoot}icons/tab_sel_rt_cnr.gif"/> <img id="curvedLeftUnSelectImage" style="display:none; height:0; width:0;" src="{$pathToRoot}icons/tab_unsel_lft_cnr.gif"/> <img id="curvedRightUnSelectImage" style="display:none; height:0; width:0;" src="{$pathToRoot}icons/tab_unsel_rt_cnr.gif"/> <img id="gradLeftSelectImage" style="display:none; height:0; width:0;" src="{$pathToRoot}icons/tab_sel_lft_grad.gif"/> <img id="gradRightSelectImage" style="display:none; height:0; width:0;" src="{$pathToRoot}icons/tab_sel_rt_grad.gif"/> <img id="gradLeftUnSelectImage" style="display:none; height:0; width:0;" src="{$pathToRoot}icons/tab_unsel_lft_grad.gif"/> <img id="gradRightUnSelectImage" style="display:none; height:0; width:0;" src="{$pathToRoot}icons/tab_unsel_rt_grad.gif"/> <img id="twirlSelectImage" style="display:none; height:0; width:0;" src="{$pathToRoot}icons/twirl_selected.gif"/> <img id="twirlUnSelectImage" style="display:none; height:0; width:0;" src="{$pathToRoot}icons/twirl_unselected.gif"/> <img id="twirlSelectHoverImage" style="display:none; height:0; width:0;" src="{$pathToRoot}icons/twirl_selected_hover.gif"/> <img id="twirlUnSelectHoverImage" style="display:none; height:0; width:0;" src="{$pathToRoot}icons/twirl_unselected_hover.gif"/> <img id="NSRBottomImage" style="display:none; height:0; width:0;" src="{$pathToRoot}icons/NSRbottomgrad.gif"/> <div id="header"> <!-- Include the logo if present --> <xsl:choose> <xsl:when test="logoFile"> <xsl:apply-templates select="logoFile"/> </xsl:when> <xsl:otherwise> <table id="topTable"> <tr id="headerTableRow1"> <td align="left"><span id="runningHeaderText"><xsl:value-of select="$customHeader"/></span></td> </tr> <tr id="headerTableRow2"> <td align="left"><span id="nsrTitle"><xsl:value-of select="title"/></span></td> </tr> <tr> <td class="nsrBottom" background="{$pathToRoot}icons/NSRbottomgrad.gif"></td> </tr> </table> </xsl:otherwise> </xsl:choose> </div> <div id="mainSection"> <div id="mainBody"> <div id="allHistory" class="saveHistory" onsave="saveAll()" onload="loadAll()" /> <!-- Process the body text --> <xsl:apply-templates select="bodyText" /> <div id="footer"> <div class="footerLine"><img width="100%" height="3px" src="{$pathToRoot}icons/footer.gif" alt="Footer image"/></div> <!-- This includes the footer item from the shared content --> <include item="footer"/> </div> </div> </div> </body> </html> </xsl:template> <!-- Pass through html tags from the body --> <xsl:template match="p|ol|ul|li|dl|dt|dd|table|tr|th|td|h1|h2|h3|h4|h5|h6|hr|br|pre|blockquote|div|span|a|img|b|i|strong|em|del|sub|sup|abbr|acronym|u|font|link|script|code|map|area"> <xsl:copy> <xsl:copy-of select="@*" /> <xsl:apply-templates /> </xsl:copy> </xsl:template> <!-- Add the logo --> <xsl:template match="logoFile"> <xsl:choose> <xsl:when test="@placement='above'"> <table id="topTable"> <tr> <td> <xsl:if test="@alignment"> <xsl:attribute name="align"> <xsl:value-of select="@alignment"/> </xsl:attribute> </xsl:if> <img> <xsl:attribute name="src"> <xsl:value-of select="$pathToRoot"/> <xsl:value-of select="@filename"/> </xsl:attribute> <xsl:attribute name="altText"> <xsl:value-of select="@altText"/> </xsl:attribute> <xsl:if test="@height"> <xsl:attribute name="height"> <xsl:value-of select="@height"/> </xsl:attribute> </xsl:if> <xsl:if test="@width"> <xsl:attribute name="width"> <xsl:value-of select="@width"/> </xsl:attribute> </xsl:if> </img></td> </tr> <tr id="headerTableRow1"> <td align="left"><span id="runningHeaderText"><xsl:value-of select="$customHeader"/></span></td> </tr> <tr id="headerTableRow2"> <td align="left"><span id="nsrTitle"><xsl:value-of select="parent::*/title"/></span></td> </tr> <tr> <td class="nsrBottom" background="{$pathToRoot}icons/NSRbottomgrad.gif"></td> </tr> </table> </xsl:when> <xsl:when test="@placement='right'"> <table id="topTable"> <tr id="headerTableRow1"> <td align="left"><span id="runningHeaderText"><xsl:value-of select="$customHeader"/></span></td> <td rowspan="2" align="center" style="width: 1px; padding: 0px"><img> <xsl:attribute name="src"> <xsl:value-of select="$pathToRoot"/> <xsl:value-of select="@filename"/> </xsl:attribute> <xsl:attribute name="altText"> <xsl:value-of select="@altText"/> </xsl:attribute> <xsl:if test="@height"> <xsl:attribute name="height"> <xsl:value-of select="@height"/> </xsl:attribute> </xsl:if> <xsl:if test="@width"> <xsl:attribute name="width"> <xsl:value-of select="@width"/> </xsl:attribute> </xsl:if> </img></td> </tr> <tr id="headerTableRow2"> <td align="left"><span id="nsrTitle"><xsl:value-of select="parent::*/title"/></span></td> </tr> <tr> <td class="nsrBottom" colspan="2" background="{$pathToRoot}icons/NSRbottomgrad.gif"></td> </tr> </table> </xsl:when> <xsl:otherwise> <table id="topTable"> <tr> <td rowspan="3" align="center" style="width: 1px; padding: 0px"><img> <xsl:attribute name="src"> <xsl:value-of select="$pathToRoot"/> <xsl:value-of select="@filename"/> </xsl:attribute> <xsl:attribute name="altText"> <xsl:value-of select="@altText"/> </xsl:attribute> <xsl:if test="@height"> <xsl:attribute name="height"> <xsl:value-of select="@height"/> </xsl:attribute> </xsl:if> <xsl:if test="@width"> <xsl:attribute name="width"> <xsl:value-of select="@width"/> </xsl:attribute> </xsl:if> </img></td> </tr> <tr id="headerTableRow1"> <td align="left"><span id="runningHeaderText"><xsl:value-of select="$customHeader"/></span></td> </tr> <tr id="headerTableRow2"> <td align="left"><span id="nsrTitle"><xsl:value-of select="parent::*/title"/></span></td> </tr> <tr> <td class="nsrBottom" colspan="2" background="{$pathToRoot}icons/NSRbottomgrad.gif"></td> </tr> </table> </xsl:otherwise> </xsl:choose> </xsl:template> </xsl:stylesheet>
1234567eight-test
Resource/SHFB/Templates/Hana.xsl
XSLT
asf20
12,406
@ECHO OFF REM Step 2 - Generate inherited documentation "{@SHFBFolder}GenerateInheritedDocs" GenerateInheritedDocs.config
1234567eight-test
Resource/SHFB/Templates/GenerateInheritedDocs.bat
Batchfile
asf20
127
@ECHO OFF REM Step 4.2 - Build the reference help topics "{@SandcastlePath}ProductionTools\BuildAssembler" /config:sandcastle.config manifest.xml
1234567eight-test
Resource/SHFB/Templates/BuildReferenceTopics.bat
Batchfile
asf20
151
<?xml version="1.0"?> <xsl:stylesheet xmlns:xsl="http://www.w3.org/1999/XSL/Transform" version="1.1"> <xsl:output indent="yes" encoding="UTF-8" /> <xsl:template match="node() | @*"> <xsl:copy> <xsl:apply-templates select="node() | @*" /> </xsl:copy> </xsl:template> <!-- EFW - Add a "scriptSharp" element to each API node so that the JavaScript syntax generator will apply the casing rules to the member name. --> <xsl:template match="api"> <xsl:copy> <xsl:apply-templates select="node() | @*" /> <scriptSharp /> </xsl:copy> </xsl:template> <!-- Fix subgroups for enumerations --> <xsl:template match="reflection/apis/api[apidata/@group='type' and family/ancestors/type/@api='T:System.Enum']/apidata/@subgroup"> <xsl:attribute name="subgroup"> <xsl:value-of select="'enumeration'"/> </xsl:attribute> </xsl:template> <!-- Strip ancestors from enumerations --> <xsl:template match="reflection/apis/api[apidata/@group='type' and family/ancestors/type/@api='T:System.Enum']/family"> </xsl:template> <!-- Strip invalid members from enumerations --> <xsl:template match="reflection/apis/api[apidata/@group='type' and family/ancestors/type/@api='T:System.Enum']/elements"> <elements> <xsl:for-each select="element"> <xsl:if test="(starts-with(@api, 'F:') and not(contains(@api, 'value__')))"> <xsl:copy> <xsl:apply-templates select="node() | @*" /> </xsl:copy> </xsl:if> </xsl:for-each> </elements> </xsl:template> <!-- Fix subgroups for enumerations --> <xsl:template match="reflection/apis/api[apidata/@group='type' and family/ancestors/type/@api='T:System.MulticastDelegate']/apidata/@subgroup"> <xsl:attribute name="subgroup"> <xsl:value-of select="'delegate'"/> </xsl:attribute> </xsl:template> <!-- Strip ancestors from delegates --> <xsl:template match="reflection/apis/api[apidata/@group='type' and family/ancestors/type/@api='T:System.MulticastDelegate']/family"> </xsl:template> <!-- Strip elements from delegates --> <xsl:template match="reflection/apis/api[apidata/@group='type' and family/ancestors/type/@api='T:System.MulticastDelegate']/elements"> </xsl:template> <!-- Insert parameters into delegates --> <xsl:template match="reflection/apis/api[apidata/@group='type' and family/ancestors/type/@api='T:System.MulticastDelegate']/apidata"> <xsl:copy> <xsl:apply-templates select="node() | @*" /> </xsl:copy> <xsl:variable name="id" select="../@id" /> <xsl:copy-of select="/reflection/apis/api[starts-with(@id, concat('M:', substring-after($id, 'T:'), '.Invoke('))]/parameters"> </xsl:copy-of> </xsl:template> <!-- Annotate members whose types have the GlobalMethodsAttribute --> <xsl:template match="reflection/apis/api[apidata/@group='member']/apidata/@name"> <xsl:copy> <xsl:apply-templates select="node() | @*" /> </xsl:copy> <xsl:variable name="type" select="../../containers/type/@api" /> <xsl:if test="/reflection/apis/api[@id=$type]/attributes/attribute/type/@api='T:System.GlobalMethodsAttribute'"> <xsl:attribute name="global"> <xsl:value-of select="'true'"/> </xsl:attribute> </xsl:if> </xsl:template> <!-- Annotate constructors whose types have the RecordAttribute --> <xsl:template match="reflection/apis/api[apidata/@group='member']/apidata[@subgroup='constructor']/@subgroup"> <xsl:copy> <xsl:apply-templates select="node() | @*" /> </xsl:copy> <xsl:variable name="type" select="../../containers/type/@api" /> <xsl:if test="/reflection/apis/api[@id=$type]/attributes/attribute/type/@api='T:System.RecordAttribute'"> <xsl:attribute name="record"> <xsl:value-of select="'true'"/> </xsl:attribute> </xsl:if> </xsl:template> </xsl:stylesheet>
1234567eight-test
Resource/SHFB/Templates/FixScriptSharp.xsl
XSLT
asf20
3,865
<?xml version="1.0" encoding="utf-8"?> <xsl:stylesheet version="1.1" xmlns:xsl="http://www.w3.org/1999/XSL/Transform" xmlns:msxsl="urn:schemas-microsoft-com:xslt" xmlns:shfb="urn:shfb-extensions"> <!-- // System : Sandcastle Help File Builder // File : BuildLog.xsl // Author : Eric Woodruff // Updated : 03/15/2008 // Note : Copyright 2008, Eric Woodruff, All rights reserved // // This is used to convert a SHFB build log into a viewable HTML page. --> <msxsl:script language="C#" implements-prefix="shfb"> <msxsl:using namespace="System.Text.RegularExpressions" /> <![CDATA[ private static Regex reScriptName = new Regex("^\\[.*?\\]", RegexOptions.Multiline); private static Regex reWarning = new Regex("(Warn|Warning):", RegexOptions.IgnoreCase); private static Regex reErrors = new Regex( @"^(Error|UnrecognizedOption|Unhandled Exception|Fatal Error|" + @"Unexpected error.*|HHC\d+: Error|(Fatal )?Error HXC\d+|" + @"Process is terminated|BUILD FAILED):|BUILD CANCELLED BY USER", RegexOptions.IgnoreCase | RegexOptions.Multiline); // Encode a few special characters, add a style to script names, warnings, // and errors, and return a non-breaking space if empty. public static string StyleLogText(string logText) { // System.Web isn't always available so do some simple encoding logText = logText.Trim().Replace("&", "&amp;"); logText = logText.Replace("<", "&lt;"); logText = logText.Replace(">", "&gt;"); logText = reScriptName.Replace(logText, "<span class=\"ScriptName\">$0</span>"); logText = reWarning.Replace(logText, "<span class=\"Warning\">$0</span>"); logText = reErrors.Replace(logText, "<span class=\"Error\">$0</span>"); return (logText.Length == 0) ? "&#160;" : logText; } ]]> </msxsl:script> <xsl:output method="xml" omit-xml-declaration="yes" encoding="utf-8" /> <!-- Main template for the log --> <xsl:template match="/shfbBuild"> <html> <head> <title><xsl:value-of select="product"/></title> <META HTTP-EQUIV="Content-Type" CONTENT="text/html; charset=UTF-8" /> <style> body { font-size: 10pt; font-family: Arial, Verdana, sans-serif; color: black; background-color: white; } h3 { margin: 0px; } h4 { margin: 0px; } pre { font-family: Consolas, "Courier New", Courier, monospace; font-size: 10pt; margin-top: 0px; margin-left: 20px; margin-bottom: 20px; padding: 0px; } .SectionHeader { background-color: #0066cc; color: white; padding: 5px; width: 95%; margin-left: 0px; margin-right: 2px; margin-top: 0px; padding: 2px; } .CollapsedHeader { background-color: #dcdcdc; color: black; padding: 5px; width: 95%; margin-left: 0px; margin-right: 2px; margin-top: 0px; padding: 2px; } .Warning { font-weight: bold; background-color: #ffd700; padding: 2px; } .Error { font-weight: bold; background-color: #b22222; color: #ffffff; padding: 2px; } .CollapseBox { cursor: pointer; color: black; text-align: center; border-style: solid; border-width: 1px; border-color: gray; margin-left: 0px; margin-right: 2px; margin-top: 0px; padding: 2px; width: 20px; } .ScriptName { font-weight: bold; } .PlugIn { border-left: black 5px solid; padding-top: 5px; padding-bottom: 5px; padding-left: 10px; } .PlugInHeader { background-color: #cccc99; color: black; width: 95%; padding: 2px; } </style> </head> <body> <h3><xsl:value-of select="@product"/>&#160;<xsl:value-of select="@version"/> Build Log</h3> <h4>Project File: <xsl:value-of select="@projectFile"/></h4> <h4>Build Started: <xsl:value-of select="@started"/></h4> <br/><hr/> <a href="#" onclick="javascript: ExpandCollapseAll(false);">Collapse All</a>&#160;&#160;&#160;&#160;<a href="#" onclick="javascript: ExpandCollapseAll(true);">Expand All</a> <hr/> <!-- Process the build steps --> <xsl:apply-templates select="buildStep" /> <hr/> End of Log <hr/> <a href="#" onclick="javascript: ExpandCollapseAll(false);">Collapse All</a>&#160;&#160;&#160;&#160;<a href="#" onclick="javascript: ExpandCollapseAll(true);">Expand All</a> <script type="text/javascript"> // Expand/collapse a section function ExpandCollapse(showId, hideId) { var showSpan = document.getElementById(showId), hideSpan = document.getElementById(hideId); showSpan.style.display = "inline"; hideSpan.style.display = "none"; } // Expand or collapse all sections function ExpandCollapseAll(expand) { var spans = document.getElementsByTagName("span") var spanIdx, id; for(spanIdx = 0; spanIdx != spans.length - 1; spanIdx++) { id = spans[spanIdx].getAttribute('id'); if(id.substr(0, 4) == "col_") if(expand) ExpandCollapse("exp_" + id.substr(4), id); else ExpandCollapse(id, "exp_" + id.substr(4)); } } </script> </body> </html> </xsl:template> <!-- Build step template --> <xsl:template match="buildStep"> <span id="col_{@step}" style="display: none;"><span class="CollapseBox" onclick="javascript: ExpandCollapse('exp_{@step}', 'col_{@step}');">+</span> <span><span class="CollapsedHeader"><xsl:value-of select="@step"/></span><br/><br/></span></span><span id="exp_{@step}" style="display: inline;"> <span class="CollapseBox" onclick="javascript: ExpandCollapse('col_{@step}', 'exp_{@step}');">-</span> <span class="SectionHeader"><xsl:value-of select="@step"/></span><br/><br/> <pre> <xsl:apply-templates /> </pre> </span> </xsl:template> <!-- Plug-in template --> <xsl:template match="plugIn"> <div class="PlugIn"><span class="PlugInHeader"><b>Plug-In:</b>&#160;<xsl:value-of select="@name" />&#160;&#160;<b>Running:</b>&#160;<xsl:value-of select="@behavior" /></span><br/> <xsl:value-of select="shfb:StyleLogText(text())" disable-output-escaping="yes" /> </div> </xsl:template> <!-- Text template --> <xsl:template match="text()"> <xsl:value-of select="shfb:StyleLogText(.)" disable-output-escaping="yes" /> </xsl:template> </xsl:stylesheet>
1234567eight-test
Resource/SHFB/Templates/TransformBuildLog.xsl
XSLT
asf20
6,273
@ECHO OFF REM Step 1 - Generate the reflection information "{@SandcastlePath}ProductionTools\MRefBuilder" /config:MRefBuilder.config /out:reflection.org {@Dependencies} {@DocInternals} *.dll *.exe IF ERRORLEVEL 1 GOTO Exit REM Merge duplicate topics (if any) COPY /Y reflection.org reflection.all "{@SandcastlePath}ProductionTools\XslTransform" /xsl:"{@SandcastlePath}ProductionTransforms\MergeDuplicates.xsl" reflection.all /out:reflection.org :Exit
1234567eight-test
Resource/SHFB/Templates/GenerateRefInfo.bat
Batchfile
asf20
469
@ECHO OFF REM Step 7.2 - Build the HTML 2.x help file cd .\Output copy "..\{@HTMLHelpName}.HxT" . > NUL copy ..\Help2x.HxC "{@HTMLHelpName}.HxC" > NUL copy ..\Help2x.HxF "{@HTMLHelpName}.HxF" > NUL copy ..\Help2x_A.HxK "{@HTMLHelpName}_A.HxK" > NUL copy ..\Help2x_B.HxK "{@HTMLHelpName}_B.HxK" > NUL copy ..\Help2x_F.HxK "{@HTMLHelpName}_F.HxK" > NUL copy ..\Help2x_K.HxK "{@HTMLHelpName}_K.HxK" > NUL copy ..\Help2x_NamedURLIndex.HxK "{@HTMLHelpName}_NamedURLIndex.HxK" > NUL copy ..\Help2x_S.HxK "{@HTMLHelpName}_S.HxK" > NUL IF EXIST ..\StopWordList.txt copy ..\StopWordList.txt StopWordList.txt > NUL "{@HXCompPath}hxcomp" -p "{@HTMLHelpName}.HxC" -l "{@HTMLHelpName}.log" type "{@HTMLHelpName}.log" cd .. IF EXIST "{@OutputFolder}{@HTMLHelpName}.Hx?" DEL "{@OutputFolder}{@HTMLHelpName}.Hx?" > NUL IF EXIST "{@OutputFolder}{@HTMLHelpName}_?.Hx?" DEL "{@OutputFolder}{@HTMLHelpName}_?.Hx?" > NUL copy ".\Output\*.Hx?" "{@OutputFolder}" > NUL del "{@OutputFolder}\{@HTMLHelpName}.HxF" > NUL REM Must remove these in case we are building a 1x file or website as well IF EXIST ".\Output\{@HTMLHelpName}.log" del ".\Output\{@HTMLHelpName}.log" > NUL IF EXIST .\Output\StopWordList.txt del .\Output\StopWordList.txt > NUL del .\Output\*.Hx? > NUL
1234567eight-test
Resource/SHFB/Templates/Build2xHelpFile.bat
Batchfile
asf20
1,282
@ECHO OFF REM Step 7.1 - Build the HTML 1.x help file cd .\Output copy ..\*.hhp . > NUL copy ..\*.hhc . > NUL copy ..\*.hhk . > NUL "{@HHCPath}hhc.exe" Help1x.hhp cd .. IF EXIST "{@OutputFolder}{@HTMLHelpName}.chm" DEL "{@OutputFolder}{@HTMLHelpName}.chm" > NUL IF EXIST ".\Output\{@HTMLHelpName}.chm" COPY ".\Output\{@HTMLHelpName}.chm" "{@OutputFolder}" > NUL REM Must remove these in case we are building a 2x file or website as well del .\Output\*.hhp > NUL del .\Output\*.hhc > NUL del .\Output\*.hhk > NUL del ".\Output\{@HTMLHelpName}.chm" > NUL del ".\Output\{@HTMLHelpName}.log" > NUL
1234567eight-test
Resource/SHFB/Templates/Build1xHelpFile.bat
Batchfile
asf20
620
<?xml version="1.0" encoding="utf-8"?> <xsl:stylesheet version="1.1" xmlns:xsl="http://www.w3.org/1999/XSL/Transform" xmlns:msxsl="urn:schemas-microsoft-com:xslt" xmlns:MSHelp="http://msdn.microsoft.com/mshelp"> <!-- // System : Sandcastle Help File Builder Utilities // File : Prototype.xsl // Author : Eric Woodruff // Updated : 03/15/2008 // Note : Copyright 2007-2008, Eric Woodruff, All rights reserved // // This is used to convert *.topic additional content files into *.html files // that have the same appearance as API topics using the Prototype presentation // style. --> <xsl:output method="xml" omit-xml-declaration="yes" encoding="utf-8" /> <!-- This parameter, if specified, defines the path to the root folder --> <xsl:param name="pathToRoot" select="string('')" /> <!-- Allow for alternate header text --> <xsl:variable name="customHeader"> <xsl:choose> <xsl:when test="topic/headerTitle"> <xsl:value-of select="topic/headerTitle"/> </xsl:when> <xsl:otherwise> <!-- The product title is replaced with the project's HTML encoded HelpTitle value --> <@HtmlEncHelpTitle/> </xsl:otherwise> </xsl:choose> </xsl:variable> <!-- Main template for the topic --> <xsl:template match="/topic"> <html> <head> <title><xsl:value-of select="title"/></title> <link rel="stylesheet" type="text/css" href="{$pathToRoot}styles/presentation.css" /> <link rel="stylesheet" type="text/css" href="ms-help://Hx/HxRuntime/HxLink.css" /> <META HTTP-EQUIV="Content-Type" CONTENT="text/html; charset=UTF-8" /> <script type="text/javascript" src="{$pathToRoot}scripts/SplitScreen.js"></script> <script type="text/javascript" src="{$pathToRoot}scripts/EventUtilities.js"></script> <!-- Stylesheet and script for colorized code blocks --> <link type="text/css" rel="stylesheet" href="{$pathToRoot}styles/highlight.css" /> <script type="text/javascript" src="{$pathToRoot}scripts/highlight.js"></script> <xml> <MSHelp:Attr Name="DocSet" Value="NetFramework" /> <MSHelp:Attr Name="DocSet" Value="<@HtmlHelpName>" /> <MSHelp:Attr Name="Locale" Value="<@Locale>" /> <MSHelp:Attr Name="TargetOS" Value="Windows" /> <!-- Include the user's XML data island for HTML Help 2.0 if present --> <xsl:if test="xml"> <xsl:copy-of select="xml/*"/> </xsl:if> </xml> <!-- Add a link to an additional stylesheet if specified --> <xsl:if test="styleSheet"> <link rel="stylesheet" type="text/css"> <xsl:attribute name="href"> <xsl:value-of select="$pathToRoot"/> <xsl:value-of select="styleSheet/@filename"/> </xsl:attribute> </link> </xsl:if> </head> <body> <script type="text/javascript"> registerEventHandler(window, 'load', function() { var ss = new SplitScreen('control', 'main'); }); </script> <div id="control"> <!-- Include the logo if present --> <xsl:choose> <xsl:when test="logoFile"> <xsl:apply-templates select="logoFile"/> </xsl:when> <xsl:otherwise> <table border="0" width="100%" cellpadding="0" cellspacing="0"> <tr> <td valign="top" width="100%"><span class="productTitle"><xsl:value-of select="$customHeader"/></span><br /><span class="topicTitle"><xsl:value-of select="title"/></span><br /></td> </tr> </table> </xsl:otherwise> </xsl:choose> </div> <div id="main"> <!-- Process the body text --> <xsl:apply-templates select="bodyText" /> <br/><br/> <!-- This includes the footer item from the shared content --> <include item="footer"/> </div> </body> </html> </xsl:template> <!-- Pass through html tags from the body --> <xsl:template match="p|ol|ul|li|dl|dt|dd|table|tr|th|td|h1|h2|h3|h4|h5|h6|hr|br|pre|blockquote|div|span|a|img|b|i|strong|em|del|sub|sup|abbr|acronym|u|font|link|script|code|map|area"> <xsl:copy> <xsl:copy-of select="@*" /> <xsl:apply-templates /> </xsl:copy> </xsl:template> <!-- Add the logo --> <xsl:template match="logoFile"> <xsl:choose> <xsl:when test="@placement='above'"> <table border="0" width="100%" cellpadding="0" cellspacing="0"> <tr> <td style="padding-bottom: 5px"> <xsl:if test="@alignment"> <xsl:attribute name="align"> <xsl:value-of select="@alignment"/> </xsl:attribute> </xsl:if> <img> <xsl:attribute name="src"> <xsl:value-of select="$pathToRoot"/> <xsl:value-of select="@filename"/> </xsl:attribute> <xsl:attribute name="altText"> <xsl:value-of select="@altText"/> </xsl:attribute> <xsl:if test="@height"> <xsl:attribute name="height"> <xsl:value-of select="@height"/> </xsl:attribute> </xsl:if> <xsl:if test="@width"> <xsl:attribute name="width"> <xsl:value-of select="@width"/> </xsl:attribute> </xsl:if> </img></td> </tr> <tr> <td valign="top" width="100%"><span class="productTitle"><xsl:value-of select="$customHeader"/></span><br /><span class="topicTitle"><xsl:value-of select="parent::*/title"/></span><br /></td> </tr> </table> </xsl:when> <xsl:when test="@placement='right'"> <table border="0" width="100%" cellpadding="0" cellspacing="0"> <tr> <td valign="top" width="100%"><span class="productTitle"><xsl:value-of select="$customHeader"/></span><br /><span class="topicTitle"><xsl:value-of select="parent::*/title"/></span><br /></td> <td align="center" style="padding-left: 10px"><img> <xsl:attribute name="src"> <xsl:value-of select="$pathToRoot"/> <xsl:value-of select="@filename"/> </xsl:attribute> <xsl:attribute name="altText"> <xsl:value-of select="@altText"/> </xsl:attribute> <xsl:if test="@height"> <xsl:attribute name="height"> <xsl:value-of select="@height"/> </xsl:attribute> </xsl:if> <xsl:if test="@width"> <xsl:attribute name="width"> <xsl:value-of select="@width"/> </xsl:attribute> </xsl:if> </img></td> </tr> </table> </xsl:when> <xsl:otherwise> <table border="0" width="100%" cellpadding="0" cellspacing="0"> <tr> <td align="center" style="padding-right: 10px"><img> <xsl:attribute name="src"> <xsl:value-of select="$pathToRoot"/> <xsl:value-of select="@filename"/> </xsl:attribute> <xsl:attribute name="altText"> <xsl:value-of select="@altText"/> </xsl:attribute> <xsl:if test="@height"> <xsl:attribute name="height"> <xsl:value-of select="@height"/> </xsl:attribute> </xsl:if> <xsl:if test="@width"> <xsl:attribute name="width"> <xsl:value-of select="@width"/> </xsl:attribute> </xsl:if> </img></td> <td valign="top" width="100%"><span class="productTitle"><xsl:value-of select="$customHeader"/></span><br /><span class="topicTitle"><xsl:value-of select="parent::*/title"/></span><br /></td> </tr> </table> </xsl:otherwise> </xsl:choose> </xsl:template> </xsl:stylesheet>
1234567eight-test
Resource/SHFB/Templates/Prototype.xsl
XSLT
asf20
7,282
@ECHO OFF REM Step 6.1 - Extract title and keyword index info. This will also alter the REM encoding of the files if localizing them for use with the Help 1.x compiler. "{@SHFBFolder}SandcastleHtmlExtract.exe" /project="{@HTMLHelpName}" /lcid={@LangID} {@ExtractFlags}
1234567eight-test
Resource/SHFB/Templates/ExtractHtmlInfo.bat
Batchfile
asf20
276
@ECHO OFF REM Step 5 - Generate an intermediate table of content file if {%1} == {prototype} ( "{@SandcastlePath}ProductionTools\XslTransform" /xsl:"{@SandcastlePath}ProductionTransforms\CreatePrototypeToc.xsl" reflection.xml /out:toc.xml ) else ( "{@SandcastlePath}ProductionTools\XslTransform" /xsl:"{@SandcastlePath}ProductionTransforms\CreateVSToc.xsl" reflection.xml /out:toc.xml )
1234567eight-test
Resource/SHFB/Templates/GenerateIntermediateTOC.bat
Batchfile
asf20
396
<?xml version="1.0" encoding="utf-8"?> <xsl:stylesheet version="1.1" xmlns:xsl="http://www.w3.org/1999/XSL/Transform" xmlns:MSHelp="http://msdn.microsoft.com/mshelp" xmlns:mshelp="http://msdn.microsoft.com/mshelp" xmlns:ddue="http://ddue.schemas.microsoft.com/authoring/2003/5" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:msxsl="urn:schemas-microsoft-com:xslt"> <!-- // System : Sandcastle Help File Builder Utilities // File : VS2005.xsl // Author : Eric Woodruff // Updated : 03/15/2008 // Note : Copyright 2007-2008, Eric Woodruff, All rights reserved // // This is used to convert *.topic additional content files into *.html files // that have the same appearance as API topics using the VS2005 presentation // style. --> <xsl:output method="xml" omit-xml-declaration="yes" encoding="utf-8" /> <!-- This parameter, if specified, defines the path to the root folder --> <xsl:param name="pathToRoot" select="string('')" /> <!-- Allow for alternate header text --> <xsl:variable name="customHeader"> <xsl:choose> <xsl:when test="topic/headerTitle"> <xsl:value-of select="topic/headerTitle"/> </xsl:when> <xsl:otherwise> <!-- The product title is replaced with the project's HTML encoded HelpTitle value --> <@HtmlEncHelpTitle/> </xsl:otherwise> </xsl:choose> </xsl:variable> <!-- Main template for the topic --> <xsl:template match="/topic"> <html> <head> <title><xsl:value-of select="title"/></title> <link rel="stylesheet" type="text/css" href="{$pathToRoot}styles/presentation.css" /> <link rel="stylesheet" type="text/css" href="ms-help://Hx/HxRuntime/HxLink.css" /> <script type="text/javascript" src="{$pathToRoot}scripts/EventUtilities.js"> </script> <script type="text/javascript" src="{$pathToRoot}scripts/SplitScreen.js"> </script> <script type="text/javascript" src="{$pathToRoot}scripts/Dropdown.js"> </script> <!-- <script type="text/javascript" src="{$pathToRoot}scripts/script_loc.js"> </script> --> <script type="text/javascript" src="{$pathToRoot}scripts/script_manifold.js"> </script> <script type="text/javascript" src="{$pathToRoot}scripts/script_feedBack.js"> </script> <script type="text/javascript" src="{$pathToRoot}scripts/CheckboxMenu.js"> </script> <script type="text/javascript" src="{$pathToRoot}scripts/CommonUtilities.js"> </script> <META HTTP-EQUIV="Content-Type" CONTENT="text/html; charset=UTF-8" /> <META NAME="save" CONTENT="history" /> <!-- Stylesheet and script for colorized code blocks --> <link type="text/css" rel="stylesheet" href="{$pathToRoot}styles/highlight.css" /> <script type="text/javascript" src="{$pathToRoot}scripts/highlight.js"></script> <xml> <MSHelp:Attr Name="DocSet" Value="NetFramework" /> <MSHelp:Attr Name="DocSet" Value="<@HtmlHelpName>" /> <MSHelp:Attr Name="Locale" Value="<@Locale>" /> <MSHelp:Attr Name="TargetOS" Value="Windows" /> <!-- Include the user's XML data island for HTML Help 2.0 if present --> <xsl:if test="xml"> <xsl:copy-of select="xml/*"/> </xsl:if> </xml> <!-- Add a link to an additional stylesheet if specified --> <xsl:if test="styleSheet"> <link rel="stylesheet" type="text/css"> <xsl:attribute name="href"> <xsl:value-of select="$pathToRoot"/> <xsl:value-of select="styleSheet/@filename"/> </xsl:attribute> </link> </xsl:if> </head> <body> <input type="hidden" id="userDataCache" class="userDataStyle" /> <input type="hidden" id="hiddenScrollOffset" /> <img id="collapseImage" style="display:none; height:0; width:0;" src="{$pathToRoot}icons/collapse_all.gif" alt="Collapse image" /> <img id="expandImage" style="display:none; height:0; width:0;" src="{$pathToRoot}icons/expand_all.gif" alt="Expand Image" /> <img id="collapseAllImage" style="display:none; height:0; width:0;" src="{$pathToRoot}icons/collapse_all.gif" /> <img id="expandAllImage" style="display:none; height:0; width:0;" src="{$pathToRoot}icons/expand_all.gif" /> <img id="dropDownImage" style="display:none; height:0; width:0;" src="{$pathToRoot}icons/dropdown.gif" /> <img id="dropDownHoverImage" style="display:none; height:0; width:0;" src="{$pathToRoot}icons/dropdownHover.gif" /> <img id="copyImage" style="display:none; height:0; width:0;" src="{$pathToRoot}icons/copycode.gif" alt="Copy image" /> <img id="copyHoverImage" style="display:none; height:0; width:0;" src="{$pathToRoot}icons/copycodeHighlight.gif" alt="CopyHover image" /> <div id="header"> <!-- Include the logo if present --> <xsl:choose> <xsl:when test="logoFile"> <xsl:apply-templates select="logoFile"/> </xsl:when> <xsl:otherwise> <table id="topTable" cellpadding="0" cellspacing="0"> <tr id="headerTableRow1"> <td align="left"><span id="runningHeaderText"><xsl:value-of select="$customHeader"/></span></td> </tr> <tr id="headerTableRow2"> <td align="left"><span id="nsrTitle"><xsl:value-of select="title"/></span></td> </tr> <tr id="headerTableRow3"> <td align="left"><span id="headfb" class="feedbackhead" /></td> </tr> </table> </xsl:otherwise> </xsl:choose> <table id="gradientTable"> <tr> <td class="nsrBottom" background="{$pathToRoot}icons/gradient.gif" /> </tr> </table> </div> <div id="mainSection"> <div id="mainBody"> <div id="allHistory" class="saveHistory" onsave="saveAll()" onload="loadAll()" /> <!-- Process the body text --> <xsl:apply-templates select="bodyText" /> </div> </div> <div id="footer"> <div class="footerLine"><img width="100%" height="3px" src="{$pathToRoot}icons/footer.gif" alt="Footer image"/></div> <!-- This includes the footer item from the shared content --> <include item="footer"/> <!-- <include item="feedback_script_block"/> --> </div> </body> </html> </xsl:template> <!-- Pass through html tags from the body --> <xsl:template match="p|ol|ul|li|dl|dt|dd|table|tr|th|td|h1|h2|h3|h4|h5|h6|hr|br|pre|blockquote|div|span|a|img|b|i|strong|em|del|sub|sup|abbr|acronym|u|font|link|script|code|map|area"> <xsl:copy> <xsl:copy-of select="@*" /> <xsl:apply-templates /> </xsl:copy> </xsl:template> <!-- Add the logo --> <xsl:template match="logoFile"> <xsl:choose> <xsl:when test="@placement='above'"> <table id="topTable" cellpadding="0" cellspacing="0"> <tr> <td> <xsl:if test="@alignment"> <xsl:attribute name="align"> <xsl:value-of select="@alignment"/> </xsl:attribute> </xsl:if> <img> <xsl:attribute name="src"> <xsl:value-of select="$pathToRoot"/> <xsl:value-of select="@filename"/> </xsl:attribute> <xsl:attribute name="altText"> <xsl:value-of select="@altText"/> </xsl:attribute> <xsl:if test="@height"> <xsl:attribute name="height"> <xsl:value-of select="@height"/> </xsl:attribute> </xsl:if> <xsl:if test="@width"> <xsl:attribute name="width"> <xsl:value-of select="@width"/> </xsl:attribute> </xsl:if> </img></td> </tr> <tr id="headerTableRow1"> <td align="left"><span id="runningHeaderText"><xsl:value-of select="$customHeader"/></span></td> </tr> <tr id="headerTableRow2"> <td align="left"><span id="nsrTitle"><xsl:value-of select="parent::*/title"/></span></td> </tr> <tr id="headerTableRow3"> <td align="left"><span id="headfb" class="feedbackhead" /></td> </tr> </table> </xsl:when> <xsl:when test="@placement='right'"> <table id="topTable" cellpadding="0" cellspacing="0"> <tr id="headerTableRow1"> <td align="left"><span id="runningHeaderText"><xsl:value-of select="$customHeader"/></span></td> <td rowspan="3" align="center" style="width: 1px; padding: 0px"><img> <xsl:attribute name="src"> <xsl:value-of select="$pathToRoot"/> <xsl:value-of select="@filename"/> </xsl:attribute> <xsl:attribute name="altText"> <xsl:value-of select="@altText"/> </xsl:attribute> <xsl:if test="@height"> <xsl:attribute name="height"> <xsl:value-of select="@height"/> </xsl:attribute> </xsl:if> <xsl:if test="@width"> <xsl:attribute name="width"> <xsl:value-of select="@width"/> </xsl:attribute> </xsl:if> </img></td> </tr> <tr id="headerTableRow2"> <td align="left"><span id="nsrTitle"><xsl:value-of select="parent::*/title"/></span></td> </tr> <tr id="headerTableRow3"> <td align="left"><span id="headfb" class="feedbackhead" /></td> </tr> </table> </xsl:when> <xsl:otherwise> <table id="topTable" cellpadding="0" cellspacing="0"> <tr> <td rowspan="4" align="center" style="width: 1px; padding: 0px"><img> <xsl:attribute name="src"> <xsl:value-of select="$pathToRoot"/> <xsl:value-of select="@filename"/> </xsl:attribute> <xsl:attribute name="altText"> <xsl:value-of select="@altText"/> </xsl:attribute> <xsl:if test="@height"> <xsl:attribute name="height"> <xsl:value-of select="@height"/> </xsl:attribute> </xsl:if> <xsl:if test="@width"> <xsl:attribute name="width"> <xsl:value-of select="@width"/> </xsl:attribute> </xsl:if> </img></td> </tr> <tr id="headerTableRow1"> <td align="left"><span id="runningHeaderText"><xsl:value-of select="$customHeader"/></span></td> </tr> <tr id="headerTableRow2"> <td align="left"><span id="nsrTitle"><xsl:value-of select="parent::*/title"/></span></td> </tr> <tr id="headerTableRow3"> <td align="left"><span id="headfb" class="feedbackhead" /></td> </tr> </table> </xsl:otherwise> </xsl:choose> </xsl:template> </xsl:stylesheet>
1234567eight-test
Resource/SHFB/Templates/VS2005.xsl
XSLT
asf20
10,026
<%@ Page Language="C#" EnableViewState="False" %> <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN"> <html> <head> <title>Table of Content</title> <link rel="stylesheet" href="TOC.css"> <script type="text/javascript" src="TOC.js"></script> </head> <body onload="javascript: Initialize();" onresize="javascript: ResizeTree();"> <form id="IndexForm" runat="server"> <div id="TOCDiv" class="TOCDiv"> <div id="divSearchOpts" class="SearchOpts" style="height: 100px; display: none;"> <img class="TOCLink" onclick="javascript: ShowHideSearch(false);" src="CloseSearch.png" height="17" width="17" alt="Hide search" style="float: right;"/> Keyword(s) for which to search: <input id="txtSearchText" type="text" style="width: 100%;" onkeypress="javascript: return OnSearchTextKeyPress(event);" /><br /> <input id="chkSortByTitle" type="checkbox" /><label for="chkSortByTitle">&nbsp;Sort results by title</label><br /> <input type="button" value="Search" onclick="javascript: return PerformSearch();" /> </div> <div id="divIndexOpts" class="IndexOpts" style="height: 25px; display: none;"> <img class="TOCLink" onclick="javascript: ShowHideIndex(false);" src="CloseSearch.png" height="17" width="17" alt="Hide index" style="float: right;"/> Keyword Index </div> <div id="divNavOpts" class="NavOpts" style="height: 20px;"> <img class="TOCLink" onclick="javascript: SyncTOC();" src="SyncTOC.gif" height="16" width="16" alt="Sync to TOC"/> <img class="TOCLink" onclick="javascript: ExpandOrCollapseAll(true);" src="ExpandAll.bmp" height="16" width="16" alt="Expand all "/> <img class="TOCLink" onclick="javascript: ExpandOrCollapseAll(false);" src="CollapseAll.bmp" height="16" width="16" alt="Collapse all" /> <img class="TOCLink" onclick="javascript: ShowHideIndex(true);" src="Index.gif" height="16" width="16" alt="Index" /> <img class="TOCLink" onclick="javascript: ShowHideSearch(true);" src="Search.gif" height="16" width="16" alt="Search" /> </div> <div class="Tree" id="divSearchResults" style="display: none;" onselectstart="javascript: return false;"> </div> <div class="Tree" id="divIndexResults" style="display: none;" onselectstart="javascript: return false;"> </div> <div class="Tree" id="divTree" onselectstart="javascript: return false;"> <asp:Literal ID="lcTOC" runat="server" /> </div> </div> <div id="TOCSizer" class="TOCSizer" onmousedown="OnMouseDown(event)" onselectstart="javascript: return false;"></div> <iframe id="TopicContent" name="TopicContent" class="TopicContent" src="{@WebDefaultTopic}"> This page uses an IFRAME but your browser does not support it. </iframe> </form> </body> </html> <script runat="server"> //============================================================================= // System : Sandcastle Help File Builder // File : Index.aspx // Author : Eric Woodruff (Eric@EWoodruff.us) // Updated : 04/10/2008 // Note : Copyright 2007-2008, Eric Woodruff, All rights reserved // Compiler: Microsoft C# // // This file contains the code used to display the index page for a website // produced by the help file builder. The root nodes are loaded for the table // of content. Child nodes are loaded dynamically when first expanded using // an Ajax call. // // This code is published under the Microsoft Public License (Ms-PL). A copy // of the license should be distributed with the code. It can also be found // at the project website: http://www.CodePlex.com/SHFB. This notice, the // author's name, and all copyright notices must remain intact in all // applications, documentation, and source files. // // Version Date Who Comments // ============================================================================ // 1.5.0.0 06/21/2007 EFW Created the code //============================================================================= protected void Page_Load(object sender, EventArgs e) { StringBuilder sb = new StringBuilder(10240); string id, url, target, title; XPathDocument toc = new XPathDocument(Server.MapPath("WebTOC.xml")); XPathNavigator navToc = toc.CreateNavigator(); XPathNodeIterator root = navToc.Select("HelpTOC/*"); foreach(XPathNavigator node in root) { if(node.HasChildren) { // Write out a parent TOC entry id = node.GetAttribute("Id", String.Empty); title = node.GetAttribute("Title", String.Empty); url = node.GetAttribute("Url", String.Empty); if(!String.IsNullOrEmpty(url)) target = " target=\"TopicContent\""; else { url = "#"; target = String.Empty; } sb.AppendFormat("<div class=\"TreeNode\">\r\n" + "<img class=\"TreeNodeImg\" " + "onclick=\"javascript: Toggle(this);\" " + "src=\"Collapsed.gif\"/><a class=\"UnselectedNode\" " + "onclick=\"javascript: return Expand(this);\" " + "href=\"{0}\"{1}>{2}</a>\r\n" + "<div id=\"{3}\" class=\"Hidden\"></div>\r\n</div>\r\n", url, target, HttpUtility.HtmlEncode(title), id); } else { title = node.GetAttribute("Title", String.Empty); url = node.GetAttribute("Url", String.Empty); if(String.IsNullOrEmpty(url)) url = "about:blank"; // Write out a TOC entry that has no children sb.AppendFormat("<div class=\"TreeItem\">\r\n" + "<img src=\"Item.gif\"/>" + "<a class=\"UnselectedNode\" " + "onclick=\"javascript: return SelectNode(this);\" " + "href=\"{0}\" target=\"TopicContent\">{1}</a>\r\n" + "</div>\r\n", url, HttpUtility.HtmlEncode(title)); } } lcTOC.Text = sb.ToString(); } </script>
1234567eight-test
Resource/SHFB/Web/Index.aspx
ASP.NET
asf20
6,102
<%@ Page Language="C#" EnableViewState="False" %> <script runat="server"> //============================================================================= // System : Sandcastle Help File Builder // File : FillNode.aspx // Author : Eric Woodruff (Eric@EWoodruff.us) // Updated : 04/02/2008 // Note : Copyright 2007-2008, Eric Woodruff, All rights reserved // Compiler: Microsoft C# // // This file contains the code used to dynamically load a parent node with its // child table of content nodes when first expanded. // // This code is published under the Microsoft Public License (Ms-PL). A copy // of the license should be distributed with the code. It can also be found // at the project website: http://www.CodePlex.com/SHFB. This notice, the // author's name, and all copyright notices must remain intact in all // applications, documentation, and source files. // // Version Date Who Comments // ============================================================================ // 1.5.0.0 06/21/2007 EFW Created the code //============================================================================= protected override void Render(HtmlTextWriter writer) { StringBuilder sb = new StringBuilder(10240); string id, url, target, title; XPathDocument toc = new XPathDocument(Server.MapPath("WebTOC.xml")); XPathNavigator navToc = toc.CreateNavigator(); // The ID to use should be passed in the query string XPathNodeIterator root = navToc.Select("//HelpTOCNode[@Id='" + this.Request.QueryString["Id"] + "']/*"); if(root.Count == 0) { writer.Write("<b>TOC node not found!</b>"); return; } foreach(XPathNavigator node in root) { if(node.HasChildren) { // Write out a parent TOC entry id = node.GetAttribute("Id", String.Empty); title = node.GetAttribute("Title", String.Empty); url = node.GetAttribute("Url", String.Empty); if(!String.IsNullOrEmpty(url)) target = " target=\"TopicContent\""; else { url = "#"; target = String.Empty; } sb.AppendFormat("<div class=\"TreeNode\">\r\n" + "<img class=\"TreeNodeImg\" " + "onclick=\"javascript: Toggle(this);\" " + "src=\"Collapsed.gif\"/><a class=\"UnselectedNode\" " + "onclick=\"javascript: return Expand(this);\" " + "href=\"{0}\"{1}>{2}</a>\r\n" + "<div id=\"{3}\" class=\"Hidden\"></div>\r\n</div>\r\n", url, target, HttpUtility.HtmlEncode(title), id); } else { title = node.GetAttribute("Title", String.Empty); url = node.GetAttribute("Url", String.Empty); if(String.IsNullOrEmpty(url)) url = "about:blank"; // Write out a TOC entry that has no children sb.AppendFormat("<div class=\"TreeItem\">\r\n" + "<img src=\"Item.gif\"/>" + "<a class=\"UnselectedNode\" " + "onclick=\"javascript: return SelectNode(this);\" " + "href=\"{0}\" target=\"TopicContent\">{1}</a>\r\n" + "</div>\r\n", url, HttpUtility.HtmlEncode(title)); } } writer.Write(sb.ToString()); } </script>
1234567eight-test
Resource/SHFB/Web/FillNode.aspx
ASP.NET
asf20
3,489
<%@ Page Language="C#" EnableViewState="False" %> <script runat="server"> //============================================================================= // System : Sandcastle Help File Builder // File : SearchHelp.aspx // Author : Eric Woodruff (Eric@EWoodruff.us) // Updated : 07/03/2007 // Note : Copyright 2007, Eric Woodruff, All rights reserved // Compiler: Microsoft C# // // This file contains the code used to search for keywords within the help // topics using the full-text index files created by the help file builder. // // This code is published under the Microsoft Public License (Ms-PL). A copy // of the license should be distributed with the code. It can also be found // at the project website: http://www.CodePlex.com/SHFB. This notice, the // author's name, and all copyright notices must remain intact in all // applications, documentation, and source files. // // Version Date Who Comments // ============================================================================ // 1.5.0.0 06/24/2007 EFW Created the code //============================================================================= private class Ranking { public string Filename, PageTitle; public int Rank; public Ranking(string file, string title, int rank) { Filename = file; PageTitle = title; Rank = rank; } } /// <summary> /// Render the search results /// </summary> /// <param name="writer">The writer to which the results are written</param> protected override void Render(HtmlTextWriter writer) { FileStream fs = null; BinaryFormatter bf; string searchText, ftiFile; char letter; bool sortByTitle = false; // The keywords for which to search should be passed in the query string searchText = this.Request.QueryString["Keywords"]; if(String.IsNullOrEmpty(searchText)) { writer.Write("<b class=\"PaddedText\">Nothing found</b>"); return; } // An optional SortByTitle option can also be specified if(this.Request.QueryString["SortByTitle"] != null) sortByTitle = Convert.ToBoolean(this.Request.QueryString["SortByTitle"]); List<string> keywords = this.ParseKeywords(searchText); List<char> letters = new List<char>(); List<string> fileList; Dictionary<string, List<long>> ftiWords, wordDictionary = new Dictionary<string,List<long>>(); try { // Load the file index fs = new FileStream(Server.MapPath("fti/FTI_Files.bin"), FileMode.Open, FileAccess.Read); bf = new BinaryFormatter(); fileList = (List<string>)bf.Deserialize(fs); fs.Close(); // Load the required word index files foreach(string word in keywords) { letter = word[0]; if(!letters.Contains(letter)) { letters.Add(letter); ftiFile = Server.MapPath(String.Format( CultureInfo.InvariantCulture, "fti/FTI_{0}.bin", (int)letter)); if(File.Exists(ftiFile)) { fs = new FileStream(ftiFile, FileMode.Open, FileAccess.Read); ftiWords = (Dictionary<string, List<long>>)bf.Deserialize(fs); fs.Close(); foreach(string ftiWord in ftiWords.Keys) wordDictionary.Add(ftiWord, ftiWords[ftiWord]); } } } } finally { if(fs != null && fs.CanRead) fs.Close(); } // Perform the search and return the results as a block of HTML writer.Write(this.Search(keywords, fileList, wordDictionary, sortByTitle)); } /// <summary> /// Split the search text up into keywords /// </summary> /// <param name="keywords">The keywords to parse</param> /// <returns>A list containing the words for which to search</returns> private List<string> ParseKeywords(string keywords) { List<string> keywordList = new List<string>(); string checkWord; string[] words = Regex.Split(keywords, @"\W+"); foreach(string word in words) { checkWord = word.ToLower(CultureInfo.InvariantCulture); if(checkWord.Length > 2 && !Char.IsDigit(checkWord[0]) && !keywordList.Contains(checkWord)) keywordList.Add(checkWord); } return keywordList; } /// <summary> /// Search for the specified keywords and return the results as a block of /// HTML. /// </summary> /// <param name="keywords">The keywords for which to search</param> /// <param name="fileInfo">The file list</param> /// <param name="wordDictionary">The dictionary used to find the words</param> /// <param name="sortByTitle">True to sort by title, false to sort by /// ranking</param> /// <returns>A block of HTML representing the search results.</returns> private string Search(List<string> keywords, List<string> fileInfo, Dictionary<string, List<long>> wordDictionary, bool sortByTitle) { StringBuilder sb = new StringBuilder(10240); Dictionary<string, List<long>> matches = new Dictionary<string, List<long>>(); List<long> occurrences; List<int> matchingFileIndices = new List<int>(), occurrenceIndices = new List<int>(); List<Ranking> rankings = new List<Ranking>(); string filename, title; string[] fileIndex; bool isFirst = true; int idx, wordCount, matchCount; // TODO: Support boolean operators (AND, OR and maybe NOT) foreach(string word in keywords) { if(!wordDictionary.TryGetValue(word, out occurrences)) return "<b class=\"PaddedText\">Nothing found</b>"; matches.Add(word, occurrences); occurrenceIndices.Clear(); // Get a list of the file indices for this match foreach(long entry in occurrences) occurrenceIndices.Add((int)(entry >> 16)); if(isFirst) { isFirst = false; matchingFileIndices.AddRange(occurrenceIndices); } else { // After the first match, remove files that do not appear for // all found keywords. for(idx = 0; idx < matchingFileIndices.Count; idx++) if(!occurrenceIndices.Contains(matchingFileIndices[idx])) { matchingFileIndices.RemoveAt(idx); idx--; } } } if(matchingFileIndices.Count == 0) return "<b class=\"PaddedText\">Nothing found</b>"; // Rank the files based on the number of times the words occurs foreach(int index in matchingFileIndices) { // Split out the title, filename, and word count fileIndex = fileInfo[index].Split('\x0'); title = fileIndex[0]; filename = fileIndex[1]; wordCount = Convert.ToInt32(fileIndex[2]); matchCount = 0; foreach(string word in keywords) { occurrences = matches[word]; foreach(long entry in occurrences) if((int)(entry >> 16) == index) matchCount += (int)(entry & 0xFFFF); } rankings.Add(new Ranking(filename, title, matchCount * 1000 / wordCount)); } // Sort by rank in descending order or by page title in ascending order rankings.Sort( delegate(Ranking x, Ranking y) { if(!sortByTitle) return y.Rank - x.Rank; return x.PageTitle.CompareTo(y.PageTitle); }); // Format the file list and return the results foreach(Ranking r in rankings) sb.AppendFormat("<div class=\"TreeItem\">\r\n<img src=\"Item.gif\"/>" + "<a class=\"UnselectedNode\" target=\"TopicContent\" " + "href=\"{0}\" onclick=\"javascript: SelectSearchNode(this);\">" + "{1}</a>\r\n</div>\r\n", r.Filename, r.PageTitle); // Return the keywords used as well in a hidden span sb.AppendFormat("<span id=\"SearchKeywords\" style=\"display: none\">{0}</span>", String.Join(" ", keywords.ToArray())); return sb.ToString(); } </script>
1234567eight-test
Resource/SHFB/Web/SearchHelp.aspx
ASP.NET
asf20
8,409
<%@ Page Language="C#" EnableViewState="False" %> <script runat="server"> //============================================================================= // System : Sandcastle Help File Builder // File : LoadIndexKeywords.aspx // Author : Eric Woodruff (Eric@EWoodruff.us) from code by Ferdinand Prantl // Updated : 04/01/2008 // Note : Copyright 2008, Eric Woodruff, All rights reserved // Compiler: Microsoft C# // // This file contains the code used to search for keywords within the help // topics using the full-text index files created by the help file builder. // // This code is published under the Microsoft Public License (Ms-PL). A copy // of the license should be distributed with the code. It can also be found // at the project website: http://www.CodePlex.com/SHFB. This notice, the // author's name, and all copyright notices must remain intact in all // applications, documentation, and source files. // // Version Date Who Comments // ============================================================================ // 1.6.0.7 04/01/2008 EFW Created the code //============================================================================= /// <summary> /// Render the keyword index /// </summary> /// <param name="writer">The writer to which the results are written</param> protected override void Render(HtmlTextWriter writer) { XmlDocument ki; XmlNode root, node; StringBuilder sb = new StringBuilder(10240); int startIndex = 0, endIndex; string url, target; ki = new XmlDocument(); ki.Load(Server.MapPath("WebKI.xml")); root = ki.SelectSingleNode("HelpKI"); if(Request.QueryString["StartIndex"] != null) startIndex = Convert.ToInt32(Request.QueryString["StartIndex"]) * 128; endIndex = startIndex + 128; if(endIndex > root.ChildNodes.Count) endIndex = root.ChildNodes.Count; if(startIndex > 0) { sb.Append("<div class=\"IndexItem\">\r\n" + "<span>&nbsp;</span><a class=\"UnselectedNode\" " + "onclick=\"javascript: return ChangeIndexPage(-1);\" " + "href=\"#\"><b><< Previous page</b></a>\r\n</div>\r\n"); } while(startIndex < endIndex) { node = root.ChildNodes[startIndex]; if(node.Attributes["Url"] == null) { url = "#"; target = String.Empty; } else { url = node.Attributes["Url"].Value; target = " target=\"TopicContent\""; } sb.AppendFormat("<div class=\"IndexItem\">\r\n" + "<span>&nbsp;</span><a class=\"UnselectedNode\" " + "onclick=\"javascript: return SelectIndexNode(this);\" " + "href=\"{0}\"{1}>{2}</a>\r\n", url, target, HttpUtility.HtmlEncode(node.Attributes["Title"].Value)); if(node.ChildNodes.Count != 0) foreach(XmlNode subNode in node.ChildNodes) sb.AppendFormat("<div class=\"IndexSubItem\">\r\n" + "<img src=\"Item.gif\"/><a class=\"UnselectedNode\" " + "onclick=\"javascript: return SelectIndexNode(this);\" " + "href=\"{0}\" target=\"TopicContent\">{1}</a>\r\n</div>\r\n", subNode.Attributes["Url"].Value, HttpUtility.HtmlEncode(subNode.Attributes["Title"].Value)); sb.Append("</div>\r\n"); startIndex++; } if(startIndex < root.ChildNodes.Count) sb.Append("<div class=\"IndexItem\">\r\n" + "<span>&nbsp;</span><a class=\"UnselectedNode\" " + "onclick=\"javascript: return ChangeIndexPage(1);\" " + "href=\"#\"><b>Next page >></b></a>\r\n</div>\r\n"); writer.Write(sb.ToString()); } </script>
1234567eight-test
Resource/SHFB/Web/LoadIndexKeywords.aspx
ASP.NET
asf20
3,872
/* File : TOC.css // Author : Eric Woodruff (Eric@EWoodruff.us) // Updated : 09/07/2007 // // Stylesheet for the table of content */ * { margin: 0px 0px 0px 0px; padding: 0px 0px 0px 0px; } body { font-family: verdana, arial, sans-serif; font-size: 8.5pt; background-color: #6699CC; color: White; overflow: hidden; } input { font-size: 8.5pt; } img { border: 0; margin-left: 5px; margin-right: 2px; } img.TreeNodeImg { cursor: pointer; } img.TOCLink { cursor: pointer; margin-left: 0; margin-right: 0; } a.SelectedNode, a.UnselectedNode { color: black; text-decoration: none; padding: 1px 3px 1px 3px; white-space: nowrap; } a.SelectedNode { background-color: #ffffff; border: solid 1px #999999; padding: 0px 2px 0px 2px; } a.UnselectedNode:hover, a.SelectedNode:hover { background-color: #cccccc; border: solid 1px #999999; padding: 0px 2px 0px 2px; } .Visible { display: block; margin-left: 2em; } .Hidden { display: none; } .Tree { background-color: #f0f0f0; color: Black; width: 300px; overflow: auto; } .TreeNode, .TreeItem { white-space: nowrap; margin: 2px 2px 2px 2px; } .TOCDiv { position: relative; float: left; width: 300px; height: 100%; } .TOCSizer { clear: none; float: left; width: 10px; height: 100%; background-color: #6699CC; background-image: url("Splitter.gif"); background-position:center center; background-repeat:no-repeat; position: relative; cursor: w-resize; } .TopicContent { position: relative; float: right; background-color: white; height: 100%; } .SearchOpts { padding: 5px 5px 0px 5px; background-color: lightgrey; color: black; width: 300px; } .NavOpts { padding: 5px 5px 0px 5px; background-color: lightgrey; color: black; width: 300px; } .IndexOpts { padding: 5px 5px 0px 5px; background-color: lightgrey; color: black; width: 300px; } .IndexItem { white-space: nowrap; margin: 2px 2px 2px 2px; } .IndexSubItem { white-space: nowrap; margin: 2px 2px 2px 12px; } .PaddedText { margin: 10px 10px 10px 10px; }
1234567eight-test
Resource/SHFB/Web/TOC.css
CSS
asf20
2,339
//============================================================================= // System : Sandcastle Help File Builder // File : TOC.js // Author : Eric Woodruff (Eric@EWoodruff.us) // Updated : 04/11/2008 // Note : Copyright 2006-2008, Eric Woodruff, All rights reserved // Compiler: JavaScript // // This file contains the methods necessary to implement a simple tree view // for the table of content with a resizable splitter and Ajax support to // load tree nodes on demand. It also contains the script necessary to do // full-text searches. // // This code is published under the Microsoft Public License (Ms-PL). A copy // of the license should be distributed with the code. It can also be found // at the project website: http://www.CodePlex.com/SHFB. This notice, the // author's name, and all copyright notices must remain intact in all // applications, documentation, and source files. // // Version Date Who Comments // ============================================================================ // 1.3.0.0 09/12/2006 EFW Created the code // 1.4.0.2 06/15/2007 EFW Reworked to get rid of frame set and to add // support for Ajax to load tree nodes on demand. // 1.5.0.0 06/24/2007 EFW Added full-text search capabilities // 1.6.0.7 04/01/2008 EFW Merged changes from Ferdinand Prantl to add a // website keyword index. Added support for "topic" // query string option. //============================================================================= // IE flag var isIE = (navigator.userAgent.indexOf("MSIE") >= 0); // Minimum width of the TOC div var minWidth = 100; // Elements and sizing info var divTOC, divSizer, topicContent, divNavOpts, divSearchOpts, divSearchResults, divIndexOpts, divIndexResults, divTree, docBody, maxWidth, offset, txtSearchText, chkSortByTitle; // Last node selected var lastNode, lastSearchNode, lastIndexNode; // Last page with keyword index var currentIndexPage = 0; //============================================================================ // Initialize the tree view and resize the content function Initialize() { docBody = document.getElementsByTagName("body")[0]; divTOC = document.getElementById("TOCDiv"); divSizer = document.getElementById("TOCSizer"); topicContent = document.getElementById("TopicContent"); divNavOpts = document.getElementById("divNavOpts"); divSearchOpts = document.getElementById("divSearchOpts"); divSearchResults = document.getElementById("divSearchResults"); divIndexOpts = document.getElementById("divIndexOpts"); divIndexResults = document.getElementById("divIndexResults"); divTree = document.getElementById("divTree"); txtSearchText = document.getElementById("txtSearchText"); chkSortByTitle = document.getElementById("chkSortByTitle"); // The sizes are bit off in FireFox if(!isIE) divNavOpts.style.width = divSearchOpts.style.width = divIndexOpts.style.width = 292; ResizeTree(); SyncTOC(); // Use an alternate default page if a topic is specified in // the query string. var queryString = document.location.search; if(queryString != "") { var idx, options = queryString.split(/[\?\=\&]/); for(idx = 0; idx < options.length; idx++) if(options[idx] == "topic" && idx + 1 < options.length) { topicContent.src = options[idx + 1]; break; } } } //============================================================================ // Navigation and expand/collaps code // Synchronize the table of content with the selected page if possible function SyncTOC() { var idx, anchor, base, href, url, anchors, treeNode, saveNode; base = window.location.href; base = base.substr(0, base.lastIndexOf("/") + 1); if(base.substr(0, 5) == "file:" && base.substr(0, 8) != "file:///") base = base.replace("file://", "file:///"); url = GetCurrentUrl(); if(url == "") return false; if(url.substr(0, 5) == "file:" && url.substr(0, 8) != "file:///") url = url.replace("file://", "file:///"); while(true) { anchors = divTree.getElementsByTagName("A"); anchor = null; for(idx = 0; idx < anchors.length; idx++) { href = anchors[idx].href; if(href.substring(0, 7) != 'http://' && href.substring(0, 8) != 'https://' && href.substring(0, 7) != 'file://') href = base + href; if(href == url) { anchor = anchors[idx]; break; } } if(anchor == null) { // If it contains a "#", strip anything after that and try again if(url.indexOf("#") != -1) { url = url.substr(0, url.indexOf("#")); continue; } return; } break; } // If found, select it and find the parent tree node SelectNode(anchor); saveNode = anchor; lastNode = null; while(anchor != null) { if(anchor.className == "TreeNode") { treeNode = anchor; break; } anchor = anchor.parentNode; } // Expand it and all of its parents while(anchor != null) { Expand(anchor); anchor = anchor.parentNode; while(anchor != null) { if(anchor.className == "TreeNode") break; anchor = anchor.parentNode; } } lastNode = saveNode; // Scroll the node into view var windowTop = lastNode.offsetTop - divTree.offsetTop - divTree.scrollTop; var windowBottom = divTree.clientHeight - windowTop - lastNode.offsetHeight; if(windowTop < 0) divTree.scrollTop += windowTop - 30; else if(windowBottom < 0) divTree.scrollTop -= windowBottom - 30; } // Get the currently loaded URL from the IFRAME function GetCurrentUrl() { var base, url = ""; try { url = window.frames["TopicContent"].document.URL.replace(/\\/g, "/"); } catch(e) { // If this happens the user probably navigated to another frameset // that didn't make itself the topmost frameset and we don't have // control of the other frame anymore. In that case, just reload // our index page. base = window.location.href; base = base.substr(0, base.lastIndexOf("/") + 1); if(base.substr(0, 5) == "file:" && base.substr(0, 8) != "file:///") base = base.replace("file://", "file:///"); if(base.substr(0, 5) == "file:") top.location.href = base + "Index.html"; else top.location.href = base + "Index.aspx"; } return url; } // Expand or collapse all nodes function ExpandOrCollapseAll(expandNodes) { var divIdx, childIdx, img, divs = document.getElementsByTagName("DIV"); var childNodes, child, div, link, img; for(divIdx = 0; divIdx < divs.length; divIdx++) if(divs[divIdx].className == "Hidden" || divs[divIdx].className == "Visible") { childNodes = divs[divIdx].parentNode.childNodes; for(childIdx = 0; childIdx < childNodes.length; childIdx++) { child = childNodes[childIdx]; if(child.className == "TreeNodeImg") img = child; if(child.className == "Hidden" || child.className == "Visible") { div = child; break; } } if(div.className == "Visible" && !expandNodes) { div.className = "Hidden"; img.src = "Collapsed.gif"; } else if(div.className == "Hidden" && expandNodes) { div.className = "Visible"; img.src = "Expanded.gif"; if(div.innerHTML == "") FillNode(div, true) } } } // Toggle the state of the specified node function Toggle(node) { var i, childNodes, child, div, link; childNodes = node.parentNode.childNodes; for(i = 0; i < childNodes.length; i++) { child = childNodes[i]; if(child.className == "Hidden" || child.className == "Visible") { div = child; break; } } if(div.className == "Visible") { div.className = "Hidden"; node.src = "Collapsed.gif"; } else { div.className = "Visible"; node.src = "Expanded.gif"; if(div.innerHTML == "") FillNode(div, false) } } // Expand the selected node function Expand(node) { var i, childNodes, child, div, img; // If not valid, don't bother if(GetCurrentUrl() == "") return false; if(node.tagName == "A") childNodes = node.parentNode.childNodes; else childNodes = node.childNodes; for(i = 0; i < childNodes.length; i++) { child = childNodes[i]; if(child.className == "TreeNodeImg") img = child; if(child.className == "Hidden" || child.className == "Visible") { div = child; break; } } if(lastNode != null) lastNode.className = "UnselectedNode"; div.className = "Visible"; img.src = "Expanded.gif"; if(node.tagName == "A") { node.className = "SelectedNode"; lastNode = node; } if(div.innerHTML == "") FillNode(div, false) return true; } // Set the style of the specified node to "selected" function SelectNode(node) { // If not valid, don't bother if(GetCurrentUrl() == "") return false; if(lastNode != null) lastNode.className = "UnselectedNode"; node.className = "SelectedNode"; lastNode = node; return true; } //============================================================================ // Ajax-related code used to fill the tree nodes on demand function GetXmlHttpRequest() { var xmlHttp = null; // If IE7, Mozilla, Safari, etc., use the native object. // Otherwise, use the ActiveX control for IE5.x and IE6. if(window.XMLHttpRequest) xmlHttp = new XMLHttpRequest(); else if(window.ActiveXObject) xmlHttp = new ActiveXObject("MSXML2.XMLHTTP.3.0"); return xmlHttp; } // Perform an AJAX-style request for the contents of a node and put the // contents into the empty div. function FillNode(div, expandChildren) { var xmlHttp = GetXmlHttpRequest(), now = new Date(); if(xmlHttp == null) { div.innerHTML = "<b>XML HTTP request not supported!</b>"; return; } div.innerHTML = "Loading..."; // Add a unique hash to ensure it doesn't use cached results xmlHttp.open("GET", "FillNode.aspx?Id=" + div.id + "&hash=" + now.getTime(), true); xmlHttp.onreadystatechange = function() { if(xmlHttp.readyState == 4) { div.innerHTML = xmlHttp.responseText; if(expandChildren) ExpandOrCollapseAll(true); } } xmlHttp.send(null) } //============================================================================ // Resizing code // Resize the tree div so that it fills the document body function ResizeTree() { var y, newHeight; if(self.innerHeight) // All but IE y = self.innerHeight; else // IE - Strict if(document.documentElement && document.documentElement.clientHeight) y = document.documentElement.clientHeight; else // Everything else if(document.body) y = document.body.clientHeight; newHeight = y - parseInt(divNavOpts.style.height, 10) - 6; if(newHeight < 50) newHeight = 50; divTree.style.height = newHeight; newHeight = y - parseInt(divSearchOpts.style.height, 10) - 6; if(newHeight < 100) newHeight = 100; divSearchResults.style.height = newHeight; newHeight = y - parseInt(divIndexOpts.style.height, 10) - 6; if(newHeight < 25) newHeight = 25; divIndexResults.style.height = newHeight; // Resize the content div ResizeContent(); } // Resize the content div function ResizeContent() { if(isIE) maxWidth = docBody.clientWidth; else maxWidth = docBody.clientWidth - 4; topicContent.style.width = maxWidth - (divSizer.offsetLeft + divSizer.offsetWidth); maxWidth -= minWidth; } // This is called to prepare for dragging the sizer div function OnMouseDown(event) { var x; // Make sure the splitter is at the top of the z-index divSizer.style.zIndex = 5000; // The content is in an IFRAME which steals mouse events so // hide it while resizing. topicContent.style.display = "none"; if(isIE) x = window.event.clientX + document.documentElement.scrollLeft + document.body.scrollLeft; else x = event.clientX + window.scrollX; // Save starting offset offset = parseInt(divSizer.style.left, 10); if(isNaN(offset)) offset = 0; offset -= x; if(isIE) { document.attachEvent("onmousemove", OnMouseMove); document.attachEvent("onmouseup", OnMouseUp); window.event.cancelBubble = true; window.event.returnValue = false; } else { document.addEventListener("mousemove", OnMouseMove, true); document.addEventListener("mouseup", OnMouseUp, true); event.preventDefault(); } } // Resize the TOC and content divs as the sizer is dragged function OnMouseMove(event) { var x, pos; // Get cursor position with respect to the page if(isIE) x = window.event.clientX + document.documentElement.scrollLeft + document.body.scrollLeft; else x = event.clientX + window.scrollX; left = offset + x; // Adjusts the width of the TOC divs pos = (event.clientX > maxWidth) ? maxWidth : (event.clientX < minWidth) ? minWidth : event.clientX; divTOC.style.width = divSearchResults.style.width = divIndexResults.style.width = divTree.style.width = pos; if(!isIE) pos -= 8; divNavOpts.style.width = divSearchOpts.style.width = divIndexOpts.style.width = pos; // Resize the content div to fit in the remaining space ResizeContent(); } // Finish the drag operation when the mouse button is released function OnMouseUp(event) { if(isIE) { document.detachEvent("onmousemove", OnMouseMove); document.detachEvent("onmouseup", OnMouseUp); } else { document.removeEventListener("mousemove", OnMouseMove, true); document.removeEventListener("mouseup", OnMouseUp, true); } // Show the content div again topicContent.style.display = "inline"; } //============================================================================ // Search code function ShowHideSearch(show) { if(show) { divNavOpts.style.display = divTree.style.display = "none"; divSearchOpts.style.display = divSearchResults.style.display = ""; } else { divSearchOpts.style.display = divSearchResults.style.display = "none"; divNavOpts.style.display = divTree.style.display = ""; } } // When enter is hit in the search text box, do the search function OnSearchTextKeyPress(evt) { if(evt.keyCode == 13) { PerformSearch(); return false; } return true; } // Perform a keyword search function PerformSearch() { var xmlHttp = GetXmlHttpRequest(), now = new Date(); if(xmlHttp == null) { divSearchResults.innerHTML = "<b>XML HTTP request not supported!</b>"; return; } divSearchResults.innerHTML = "<span class=\"PaddedText\">Searching...</span>"; // Add a unique hash to ensure it doesn't use cached results xmlHttp.open("GET", "SearchHelp.aspx?Keywords=" + txtSearchText.value + "&SortByTitle=" + (chkSortByTitle.checked ? "true" : "false") + "&hash=" + now.getTime(), true); xmlHttp.onreadystatechange = function() { if(xmlHttp.readyState == 4) { divSearchResults.innerHTML = xmlHttp.responseText; lastSearchNode = divSearchResults.childNodes[0].childNodes[1]; if(lastSearchNode != null) { if(lastSearchNode.tagName != "A") lastSearchNode = lastSearchNode.nextSibling; SelectSearchNode(lastSearchNode); topicContent.src = lastSearchNode.href; } } } xmlHttp.send(null) } // Set the style of the specified search result node to "selected" function SelectSearchNode(node) { if(lastSearchNode != null) lastSearchNode.className = "UnselectedNode"; node.className = "SelectedNode"; lastSearchNode = node; return true; } //============================================================================ // KeyWordIndex code function ShowHideIndex(show) { if(show) { PopulateIndex(currentIndexPage); divNavOpts.style.display = divTree.style.display = "none"; divIndexOpts.style.display = divIndexResults.style.display = ""; } else { divIndexOpts.style.display = divIndexResults.style.display = "none"; divNavOpts.style.display = divTree.style.display = ""; } } // Populate keyword index function PopulateIndex(startIndex) { var xmlHttp = GetXmlHttpRequest(), now = new Date(); var firstNode; if(xmlHttp == null) { divIndexResults.innerHTML = "<b>XML HTTP request not supported!</b>"; return; } divIndexResults.innerHTML = "<span class=\"PaddedText\">Loading " + "keyword index...</span>"; // Add a unique hash to ensure it doesn't use cached results xmlHttp.open("GET", "LoadIndexKeywords.aspx?StartIndex=" + startIndex + "&hash=" + now.getTime(), true); xmlHttp.onreadystatechange = function() { if(xmlHttp.readyState == 4) { divIndexResults.innerHTML = xmlHttp.responseText; if(startIndex > 0) { firstNode = divIndexResults.childNodes[1]; if(firstNode != null && !firstNode.innerHTML) firstNode = divIndexResults.childNodes[2]; } else firstNode = divIndexResults.childNodes[0]; if(firstNode != null) lastIndexNode = firstNode.childNodes[0]; if(lastIndexNode != null) { if(lastIndexNode.tagName != "A") lastIndexNode = lastIndexNode.nextSibling; SelectIndexNode(lastIndexNode); topicContent.src = lastIndexNode.href; } currentIndexPage = startIndex; } } xmlHttp.send(null) } // Set the style of the specified keyword index node to "selected" function SelectIndexNode(node) { if(lastIndexNode != null) lastIndexNode.className = "UnselectedNode"; node.className = "SelectedNode"; lastIndexNode = node; return true; } // Changes the current page with keyword index forward or backward function ChangeIndexPage(direction) { PopulateIndex(currentIndexPage + direction); return false; }
1234567eight-test
Resource/SHFB/Web/TOC.js
JavaScript
asf20
20,443
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1234567eight-test
Resource/SHFB/Web/Index.html
HTML
asf20
2,435
using System.Reflection; using System.Runtime.CompilerServices; using System.Runtime.InteropServices; // General Information about an assembly is controlled through the following // set of attributes. Change these attribute values to modify the information // associated with an assembly. [assembly: AssemblyTitle("OnOffExample")] [assembly: AssemblyDescription("")] [assembly: AssemblyConfiguration("")] [assembly: AssemblyCompany("<Not Specified>")] [assembly: AssemblyProduct("OnOffExample")] [assembly: AssemblyCopyright("Copyright © <Not Specified> 2008")] [assembly: AssemblyTrademark("")] [assembly: AssemblyCulture("")] // Setting ComVisible to false makes the types in this assembly not visible // to COM components. If you need to access a type in this assembly from // COM, set the ComVisible attribute to true on that type. [assembly: ComVisible(false)] // The following GUID is for the ID of the typelib if this project is exposed to COM [assembly: Guid("d1b002c6-6739-4eb1-9a36-67a2a6193df1")] // Version information for an assembly consists of the following four values: // // Major Version // Minor Version // Build Number // Revision // // You can specify all the values or you can default the Build and Revision Numbers // by using the '*' as shown below: // [assembly: AssemblyVersion("1.0.*")] [assembly: AssemblyVersion("1.0.0.0")] [assembly: AssemblyFileVersion("1.0.0.0")]
1234567eight-test
OnOffExample/Properties/AssemblyInfo.cs
C#
asf20
1,466
using System; using System.Collections.Generic; using System.Linq; using System.Text; using Stateless; namespace OnOffExample { class Program { static void Main(string[] args) { try { string on = "On", off = "Off"; var space = ' '; var onOffSwitch = new StateMachine<string, char>(off); onOffSwitch.Configure(off).Permit(space, on); onOffSwitch.Configure(on).Permit(space, off); Console.WriteLine("Press <space> to toggle the switch. Any other key will raise an error."); while (true) { Console.WriteLine("Switch is in state: " + onOffSwitch.State); var pressed = Console.ReadKey(true).KeyChar; onOffSwitch.Fire(pressed); } } catch (Exception ex) { Console.WriteLine("Exception: " + ex.Message); Console.WriteLine("Press any key to continue..."); Console.ReadKey(true); } } } }
1234567eight-test
OnOffExample/Program.cs
C#
asf20
1,186
using System; using System.Collections.Generic; using System.Linq; using System.Text; namespace Stateless { public partial class StateMachine<TState, TTrigger> { internal abstract class TriggerBehaviour { readonly TTrigger _trigger; readonly Func<bool> _guard; protected TriggerBehaviour(TTrigger trigger, Func<bool> guard) { _trigger = trigger; _guard = guard; } public TTrigger Trigger { get { return _trigger; } } public bool IsGuardConditionMet { get { return _guard(); } } public abstract bool ResultsInTransitionFrom(TState source, object[] args, out TState destination); } } }
1234567eight-test
Stateless/TriggerBehaviour.cs
C#
asf20
882
using System; using System.Collections.Generic; using System.Linq; using System.Text; namespace Stateless { partial class StateMachine<TState, TTrigger> { /// <summary> /// Associates configured parameters with an underlying trigger value. /// </summary> public abstract class TriggerWithParameters { readonly TTrigger _underlyingTrigger; readonly Type[] _argumentTypes; /// <summary> /// Create a configured trigger. /// </summary> /// <param name="underlyingTrigger">Trigger represented by this trigger configuration.</param> /// <param name="argumentTypes">The argument types expected by the trigger.</param> public TriggerWithParameters(TTrigger underlyingTrigger, params Type[] argumentTypes) { Enforce.ArgumentNotNull(argumentTypes, "argumentTypes"); _underlyingTrigger = underlyingTrigger; _argumentTypes = argumentTypes; } /// <summary> /// Gets the underlying trigger value that has been configured. /// </summary> public TTrigger Trigger { get { return _underlyingTrigger; } } /// <summary> /// Ensure that the supplied arguments are compatible with those configured for this /// trigger. /// </summary> /// <param name="args"></param> public void ValidateParameters(object[] args) { Enforce.ArgumentNotNull(args, "args"); ParameterConversion.Validate(args, _argumentTypes); } } /// <summary> /// A configured trigger with one required argument. /// </summary> /// <typeparam name="TArg0">The type of the first argument.</typeparam> public class TriggerWithParameters<TArg0> : TriggerWithParameters { /// <summary> /// Create a configured trigger. /// </summary> /// <param name="underlyingTrigger">Trigger represented by this trigger configuration.</param> public TriggerWithParameters(TTrigger underlyingTrigger) : base(underlyingTrigger, typeof(TArg0)) { } } /// <summary> /// A configured trigger with two required arguments. /// </summary> /// <typeparam name="TArg0">The type of the first argument.</typeparam> /// <typeparam name="TArg1">The type of the second argument.</typeparam> public class TriggerWithParameters<TArg0, TArg1> : TriggerWithParameters { /// <summary> /// Create a configured trigger. /// </summary> /// <param name="underlyingTrigger">Trigger represented by this trigger configuration.</param> public TriggerWithParameters(TTrigger underlyingTrigger) : base(underlyingTrigger, typeof(TArg0), typeof(TArg1)) { } } /// <summary> /// A configured trigger with three required arguments. /// </summary> /// <typeparam name="TArg0">The type of the first argument.</typeparam> /// <typeparam name="TArg1">The type of the second argument.</typeparam> /// <typeparam name="TArg2">The type of the third argument.</typeparam> public class TriggerWithParameters<TArg0, TArg1, TArg2> : TriggerWithParameters { /// <summary> /// Create a configured trigger. /// </summary> /// <param name="underlyingTrigger">Trigger represented by this trigger configuration.</param> public TriggerWithParameters(TTrigger underlyingTrigger) : base(underlyingTrigger, typeof(TArg0), typeof(TArg1), typeof(TArg2)) { } } } }
1234567eight-test
Stateless/TriggerWithParameters.cs
C#
asf20
4,038
using System; using System.Collections.Generic; using System.Linq; using System.Text; namespace Stateless { public partial class StateMachine<TState, TTrigger> { internal class StateRepresentation { readonly TState _state; readonly IDictionary<TTrigger, ICollection<TriggerBehaviour>> _triggerBehaviours = new Dictionary<TTrigger, ICollection<TriggerBehaviour>>(); readonly ICollection<Action<Transition, object[]>> _entryActions = new List<Action<Transition, object[]>>(); readonly ICollection<Action<Transition>> _exitActions = new List<Action<Transition>>(); StateRepresentation _superstate; // null readonly ICollection<StateRepresentation> _substates = new List<StateRepresentation>(); public StateRepresentation(TState state) { _state = state; } public bool CanHandle(TTrigger trigger) { TriggerBehaviour unused; return TryFindHandler(trigger, out unused); } public bool TryFindHandler(TTrigger trigger, out TriggerBehaviour handler) { return (TryFindLocalHandler(trigger, out handler) || (Superstate != null && Superstate.TryFindHandler(trigger, out handler))); } bool TryFindLocalHandler(TTrigger trigger, out TriggerBehaviour handler) { ICollection<TriggerBehaviour> possible; if (!_triggerBehaviours.TryGetValue(trigger, out possible)) { handler = null; return false; } var actual = possible.Where(at => at.IsGuardConditionMet).ToArray(); if (actual.Count() > 1) throw new InvalidOperationException( string.Format(StateRepresentationResources.MultipleTransitionsPermitted, trigger, _state)); handler = actual.FirstOrDefault(); return handler != null; } public void AddEntryAction(TTrigger trigger, Action<Transition, object[]> action) { Enforce.ArgumentNotNull(action, "action"); _entryActions.Add((t, args) => { if (t.Trigger.Equals(trigger)) action(t, args); }); } public void AddEntryAction(Action<Transition, object[]> action) { _entryActions.Add(Enforce.ArgumentNotNull(action, "action")); } public void AddExitAction(Action<Transition> action) { _exitActions.Add(Enforce.ArgumentNotNull(action, "action")); } public void Enter(Transition transition, params object[] entryArgs) { Enforce.ArgumentNotNull(transition, "transtion"); if (transition.IsReentry) { ExecuteEntryActions(transition, entryArgs); } else if (!Includes(transition.Source)) { if (_superstate != null) _superstate.Enter(transition, entryArgs); ExecuteEntryActions(transition, entryArgs); } } public void Exit(Transition transition) { Enforce.ArgumentNotNull(transition, "transtion"); if (transition.IsReentry) { ExecuteExitActions(transition); } else if (!Includes(transition.Destination)) { ExecuteExitActions(transition); if (_superstate != null) _superstate.Exit(transition); } } void ExecuteEntryActions(Transition transition, object[] entryArgs) { Enforce.ArgumentNotNull(transition, "transtion"); Enforce.ArgumentNotNull(entryArgs, "entryArgs"); foreach (var action in _entryActions) action(transition, entryArgs); } void ExecuteExitActions(Transition transition) { Enforce.ArgumentNotNull(transition, "transtion"); foreach (var action in _exitActions) action(transition); } public void AddTriggerBehaviour(TriggerBehaviour triggerBehaviour) { ICollection<TriggerBehaviour> allowed; if (!_triggerBehaviours.TryGetValue(triggerBehaviour.Trigger, out allowed)) { allowed = new List<TriggerBehaviour>(); _triggerBehaviours.Add(triggerBehaviour.Trigger, allowed); } allowed.Add(triggerBehaviour); } public StateRepresentation Superstate { get { return _superstate; } set { _superstate = value; } } public TState UnderlyingState { get { return _state; } } public void AddSubstate(StateRepresentation substate) { Enforce.ArgumentNotNull(substate, "substate"); _substates.Add(substate); } public bool Includes(TState state) { return _state.Equals(state) || _substates.Any(s => s.Includes(state)); } public bool IsIncludedIn(TState state) { return _state.Equals(state) || (_superstate != null && _superstate.IsIncludedIn(state)); } public IEnumerable<TTrigger> PermittedTriggers { get { var result = _triggerBehaviours .Where(t => t.Value.Any(a => a.IsGuardConditionMet)) .Select(t => t.Key); if (Superstate != null) result = result.Union(Superstate.PermittedTriggers); return result.ToArray(); } } } } }
1234567eight-test
Stateless/StateRepresentation.cs
C#
asf20
6,778
using System; using System.Collections.Generic; using System.Linq; using System.Text; namespace Stateless { public partial class StateMachine<TState, TTrigger> { /// <summary> /// The configuration for a single state value. /// </summary> public class StateConfiguration { readonly StateRepresentation _representation; readonly Func<TState, StateRepresentation> _lookup; static readonly Func<bool> NoGuard = () => true; internal StateConfiguration(StateRepresentation representation, Func<TState, StateRepresentation> lookup) { _representation = Enforce.ArgumentNotNull(representation, "representation"); _lookup = Enforce.ArgumentNotNull(lookup, "lookup"); } /// <summary> /// Accept the specified trigger and transition to the destination state. /// </summary> /// <param name="trigger">The accepted trigger.</param> /// <param name="destinationState">The state that the trigger will cause a /// transition to.</param> /// <returns>The reciever.</returns> public StateConfiguration Permit(TTrigger trigger, TState destinationState) { EnforceNotIdentityTransition(destinationState); return InternalPermit(trigger, destinationState); } /// <summary> /// Accept the specified trigger and transition to the destination state. /// </summary> /// <param name="trigger">The accepted trigger.</param> /// <param name="destinationState">The state that the trigger will cause a /// transition to.</param> /// <param name="guard">Function that must return true in order for the /// trigger to be accepted.</param> /// <returns>The reciever.</returns> public StateConfiguration PermitIf(TTrigger trigger, TState destinationState, Func<bool> guard) { EnforceNotIdentityTransition(destinationState); return InternalPermitIf(trigger, destinationState, guard); } /// <summary> /// Accept the specified trigger, execute exit actions and re-execute entry actions. /// Reentry behaves as though the configured state transitions to an identical sibling state. /// </summary> /// <param name="trigger">The accepted trigger.</param> /// <returns>The reciever.</returns> /// <remarks> /// Applies to the current state only. Will not re-execute superstate actions, or /// cause actions to execute transitioning between super- and sub-states. /// </remarks> public StateConfiguration PermitReentry(TTrigger trigger) { return InternalPermit(trigger, _representation.UnderlyingState); } /// <summary> /// Accept the specified trigger, execute exit actions and re-execute entry actions. /// Reentry behaves as though the configured state transitions to an identical sibling state. /// </summary> /// <param name="trigger">The accepted trigger.</param> /// <param name="guard">Function that must return true in order for the /// trigger to be accepted.</param> /// <returns>The reciever.</returns> /// <remarks> /// Applies to the current state only. Will not re-execute superstate actions, or /// cause actions to execute transitioning between super- and sub-states. /// </remarks> public StateConfiguration PermitReentryIf(TTrigger trigger, Func<bool> guard) { return InternalPermitIf(trigger, _representation.UnderlyingState, guard); } /// <summary> /// Ignore the specified trigger when in the configured state. /// </summary> /// <param name="trigger">The trigger to ignore.</param> /// <returns>The receiver.</returns> public StateConfiguration Ignore(TTrigger trigger) { return IgnoreIf(trigger, NoGuard); } /// <summary> /// Ignore the specified trigger when in the configured state, if the guard /// returns true.. /// </summary> /// <param name="trigger">The trigger to ignore.</param> /// <param name="guard">Function that must return true in order for the /// trigger to be ignored.</param> /// <returns>The receiver.</returns> public StateConfiguration IgnoreIf(TTrigger trigger, Func<bool> guard) { Enforce.ArgumentNotNull(guard, "guard"); _representation.AddTriggerBehaviour(new IgnoredTriggerBehaviour(trigger, guard)); return this; } /// <summary> /// Specify an action that will execute when transitioning into /// the configured state. /// </summary> /// <param name="entryAction">Action to execute.</param> /// <returns>The receiver.</returns> public StateConfiguration OnEntry(Action entryAction) { Enforce.ArgumentNotNull(entryAction, "entryAction"); return OnEntry(t => entryAction()); } /// <summary> /// Specify an action that will execute when transitioning into /// the configured state. /// </summary> /// <param name="entryAction">Action to execute, providing details of the transition.</param> /// <returns>The receiver.</returns> public StateConfiguration OnEntry(Action<Transition> entryAction) { Enforce.ArgumentNotNull(entryAction, "entryAction"); _representation.AddEntryAction((t, args) => entryAction(t)); return this; } /// <summary> /// Specify an action that will execute when transitioning into /// the configured state. /// </summary> /// <param name="entryAction">Action to execute.</param> /// <param name="trigger">The trigger by which the state must be entered in order for the action to execute.</param> /// <returns>The receiver.</returns> public StateConfiguration OnEntryFrom(TTrigger trigger, Action entryAction) { Enforce.ArgumentNotNull(entryAction, "entryAction"); return OnEntryFrom(trigger, t => entryAction()); } /// <summary> /// Specify an action that will execute when transitioning into /// the configured state. /// </summary> /// <param name="entryAction">Action to execute, providing details of the transition.</param> /// <param name="trigger">The trigger by which the state must be entered in order for the action to execute.</param> /// <returns>The receiver.</returns> public StateConfiguration OnEntryFrom(TTrigger trigger, Action<Transition> entryAction) { Enforce.ArgumentNotNull(entryAction, "entryAction"); _representation.AddEntryAction(trigger, (t, args) => entryAction(t)); return this; } /// <summary> /// Specify an action that will execute when transitioning into /// the configured state. /// </summary> /// <typeparam name="TArg0">Type of the first trigger argument.</typeparam> /// <param name="entryAction">Action to execute, providing details of the transition.</param> /// <param name="trigger">The trigger by which the state must be entered in order for the action to execute.</param> /// <returns>The receiver.</returns> public StateConfiguration OnEntryFrom<TArg0>(TriggerWithParameters<TArg0> trigger, Action<TArg0> entryAction) { Enforce.ArgumentNotNull(entryAction, "entryAction"); return OnEntryFrom<TArg0>(trigger, (a0, t) => entryAction(a0)); } /// <summary> /// Specify an action that will execute when transitioning into /// the configured state. /// </summary> /// <typeparam name="TArg0">Type of the first trigger argument.</typeparam> /// <param name="entryAction">Action to execute, providing details of the transition.</param> /// <param name="trigger">The trigger by which the state must be entered in order for the action to execute.</param> /// <returns>The receiver.</returns> public StateConfiguration OnEntryFrom<TArg0>(TriggerWithParameters<TArg0> trigger, Action<TArg0, Transition> entryAction) { Enforce.ArgumentNotNull(entryAction, "entryAction"); Enforce.ArgumentNotNull(trigger, "trigger"); _representation.AddEntryAction(trigger.Trigger, (t, args) => entryAction( ParameterConversion.Unpack<TArg0>(args, 0), t)); return this; } /// <summary> /// Specify an action that will execute when transitioning into /// the configured state. /// </summary> /// <typeparam name="TArg0">Type of the first trigger argument.</typeparam> /// <typeparam name="TArg1">Type of the second trigger argument.</typeparam> /// <param name="entryAction">Action to execute, providing details of the transition.</param> /// <param name="trigger">The trigger by which the state must be entered in order for the action to execute.</param> /// <returns>The receiver.</returns> public StateConfiguration OnEntryFrom<TArg0, TArg1>(TriggerWithParameters<TArg0, TArg1> trigger, Action<TArg0, TArg1> entryAction) { Enforce.ArgumentNotNull(entryAction, "entryAction"); return OnEntryFrom<TArg0, TArg1>(trigger, (a0, a1, t) => entryAction(a0, a1)); } /// <summary> /// Specify an action that will execute when transitioning into /// the configured state. /// </summary> /// <typeparam name="TArg0">Type of the first trigger argument.</typeparam> /// <typeparam name="TArg1">Type of the second trigger argument.</typeparam> /// <param name="entryAction">Action to execute, providing details of the transition.</param> /// <param name="trigger">The trigger by which the state must be entered in order for the action to execute.</param> /// <returns>The receiver.</returns> public StateConfiguration OnEntryFrom<TArg0, TArg1>(TriggerWithParameters<TArg0, TArg1> trigger, Action<TArg0, TArg1, Transition> entryAction) { Enforce.ArgumentNotNull(entryAction, "entryAction"); Enforce.ArgumentNotNull(trigger, "trigger"); _representation.AddEntryAction(trigger.Trigger, (t, args) => entryAction( ParameterConversion.Unpack<TArg0>(args, 0), ParameterConversion.Unpack<TArg1>(args, 1), t)); return this; } /// <summary> /// Specify an action that will execute when transitioning into /// the configured state. /// </summary> /// <typeparam name="TArg0">Type of the first trigger argument.</typeparam> /// <typeparam name="TArg1">Type of the second trigger argument.</typeparam> /// <typeparam name="TArg2">Type of the third trigger argument.</typeparam> /// <param name="entryAction">Action to execute, providing details of the transition.</param> /// <param name="trigger">The trigger by which the state must be entered in order for the action to execute.</param> /// <returns>The receiver.</returns> public StateConfiguration OnEntryFrom<TArg0, TArg1, TArg2>(TriggerWithParameters<TArg0, TArg1, TArg2> trigger, Action<TArg0, TArg1, TArg2> entryAction) { Enforce.ArgumentNotNull(entryAction, "entryAction"); return OnEntryFrom<TArg0, TArg1, TArg2>(trigger, (a0, a1, a2, t) => entryAction(a0, a1, a2)); } /// <summary> /// Specify an action that will execute when transitioning into /// the configured state. /// </summary> /// <typeparam name="TArg0">Type of the first trigger argument.</typeparam> /// <typeparam name="TArg1">Type of the second trigger argument.</typeparam> /// <typeparam name="TArg2">Type of the third trigger argument.</typeparam> /// <param name="entryAction">Action to execute, providing details of the transition.</param> /// <param name="trigger">The trigger by which the state must be entered in order for the action to execute.</param> /// <returns>The receiver.</returns> public StateConfiguration OnEntryFrom<TArg0, TArg1, TArg2>(TriggerWithParameters<TArg0, TArg1, TArg2> trigger, Action<TArg0, TArg1, TArg2, Transition> entryAction) { Enforce.ArgumentNotNull(entryAction, "entryAction"); Enforce.ArgumentNotNull(trigger, "trigger"); _representation.AddEntryAction(trigger.Trigger, (t, args) => entryAction( ParameterConversion.Unpack<TArg0>(args, 0), ParameterConversion.Unpack<TArg1>(args, 1), ParameterConversion.Unpack<TArg2>(args, 2), t)); return this; } /// <summary> /// Specify an action that will execute when transitioning from /// the configured state. /// </summary> /// <param name="exitAction">Action to execute.</param> /// <returns>The receiver.</returns> public StateConfiguration OnExit(Action exitAction) { Enforce.ArgumentNotNull(exitAction, "exitAction"); return OnExit(t => exitAction()); } /// <summary> /// Specify an action that will execute when transitioning from /// the configured state. /// </summary> /// <param name="exitAction">Action to execute, providing details of the transition.</param> /// <returns>The receiver.</returns> public StateConfiguration OnExit(Action<Transition> exitAction) { Enforce.ArgumentNotNull(exitAction, "exitAction"); _representation.AddExitAction(exitAction); return this; } /// <summary> /// Sets the superstate that the configured state is a substate of. /// </summary> /// <remarks> /// Substates inherit the allowed transitions of their superstate. /// When entering directly into a substate from outside of the superstate, /// entry actions for the superstate are executed. /// Likewise when leaving from the substate to outside the supserstate, /// exit actions for the superstate will execute. /// </remarks> /// <param name="superstate">The superstate.</param> /// <returns>The receiver.</returns> public StateConfiguration SubstateOf(TState superstate) { var superRepresentation = _lookup(superstate); _representation.Superstate = superRepresentation; superRepresentation.AddSubstate(_representation); return this; } /// <summary> /// Accept the specified trigger and transition to the destination state, calculated /// dynamically by the supplied function. /// </summary> /// <param name="trigger">The accepted trigger.</param> /// <param name="destinationStateSelector">Function to calculate the state /// that the trigger will cause a transition to.</param> /// <returns>The reciever.</returns> public StateConfiguration PermitDynamic(TTrigger trigger, Func<TState> destinationStateSelector) { return PermitDynamicIf(trigger, destinationStateSelector, NoGuard); } /// <summary> /// Accept the specified trigger and transition to the destination state, calculated /// dynamically by the supplied function. /// </summary> /// <param name="trigger">The accepted trigger.</param> /// <param name="destinationStateSelector">Function to calculate the state /// that the trigger will cause a transition to.</param> /// <returns>The reciever.</returns> /// <typeparam name="TArg0">Type of the first trigger argument.</typeparam> public StateConfiguration PermitDynamic<TArg0>(TriggerWithParameters<TArg0> trigger, Func<TArg0, TState> destinationStateSelector) { return PermitDynamicIf(trigger, destinationStateSelector, NoGuard); } /// <summary> /// Accept the specified trigger and transition to the destination state, calculated /// dynamically by the supplied function. /// </summary> /// <param name="trigger">The accepted trigger.</param> /// <param name="destinationStateSelector">Function to calculate the state /// that the trigger will cause a transition to.</param> /// <returns>The reciever.</returns> /// <typeparam name="TArg0">Type of the first trigger argument.</typeparam> /// <typeparam name="TArg1">Type of the second trigger argument.</typeparam> public StateConfiguration PermitDynamic<TArg0, TArg1>(TriggerWithParameters<TArg0, TArg1> trigger, Func<TArg0, TArg1, TState> destinationStateSelector) { return PermitDynamicIf(trigger, destinationStateSelector, NoGuard); } /// <summary> /// Accept the specified trigger and transition to the destination state, calculated /// dynamically by the supplied function. /// </summary> /// <param name="trigger">The accepted trigger.</param> /// <param name="destinationStateSelector">Function to calculate the state /// that the trigger will cause a transition to.</param> /// <returns>The reciever.</returns> /// <typeparam name="TArg0">Type of the first trigger argument.</typeparam> /// <typeparam name="TArg1">Type of the second trigger argument.</typeparam> /// <typeparam name="TArg2">Type of the third trigger argument.</typeparam> public StateConfiguration PermitDynamic<TArg0, TArg1, TArg2>(TriggerWithParameters<TArg0, TArg1, TArg2> trigger, Func<TArg0, TArg1, TArg2, TState> destinationStateSelector) { return PermitDynamicIf(trigger, destinationStateSelector, NoGuard); } /// <summary> /// Accept the specified trigger and transition to the destination state, calculated /// dynamically by the supplied function. /// </summary> /// <param name="trigger">The accepted trigger.</param> /// <param name="destinationStateSelector">Function to calculate the state /// that the trigger will cause a transition to.</param> /// <param name="guard">Function that must return true in order for the /// trigger to be accepted.</param> /// <returns>The reciever.</returns> public StateConfiguration PermitDynamicIf(TTrigger trigger, Func<TState> destinationStateSelector, Func<bool> guard) { Enforce.ArgumentNotNull(destinationStateSelector, "destinationStateSelector"); return InternalPermitDynamicIf(trigger, args => destinationStateSelector(), guard); } /// <summary> /// Accept the specified trigger and transition to the destination state, calculated /// dynamically by the supplied function. /// </summary> /// <param name="trigger">The accepted trigger.</param> /// <param name="destinationStateSelector">Function to calculate the state /// that the trigger will cause a transition to.</param> /// <param name="guard">Function that must return true in order for the /// trigger to be accepted.</param> /// <returns>The reciever.</returns> /// <typeparam name="TArg0">Type of the first trigger argument.</typeparam> public StateConfiguration PermitDynamicIf<TArg0>(TriggerWithParameters<TArg0> trigger, Func<TArg0, TState> destinationStateSelector, Func<bool> guard) { Enforce.ArgumentNotNull(trigger, "trigger"); Enforce.ArgumentNotNull(destinationStateSelector, "destinationStateSelector"); return InternalPermitDynamicIf( trigger.Trigger, args => destinationStateSelector( ParameterConversion.Unpack<TArg0>(args, 0)), guard); } /// <summary> /// Accept the specified trigger and transition to the destination state, calculated /// dynamically by the supplied function. /// </summary> /// <param name="trigger">The accepted trigger.</param> /// <param name="destinationStateSelector">Function to calculate the state /// that the trigger will cause a transition to.</param> /// <param name="guard">Function that must return true in order for the /// trigger to be accepted.</param> /// <returns>The reciever.</returns> /// <typeparam name="TArg0">Type of the first trigger argument.</typeparam> /// <typeparam name="TArg1">Type of the second trigger argument.</typeparam> public StateConfiguration PermitDynamicIf<TArg0, TArg1>(TriggerWithParameters<TArg0, TArg1> trigger, Func<TArg0, TArg1, TState> destinationStateSelector, Func<bool> guard) { Enforce.ArgumentNotNull(trigger, "trigger"); Enforce.ArgumentNotNull(destinationStateSelector, "destinationStateSelector"); return InternalPermitDynamicIf( trigger.Trigger, args => destinationStateSelector( ParameterConversion.Unpack<TArg0>(args, 0), ParameterConversion.Unpack<TArg1>(args, 1)), guard); } /// <summary> /// Accept the specified trigger and transition to the destination state, calculated /// dynamically by the supplied function. /// </summary> /// <param name="trigger">The accepted trigger.</param> /// <param name="destinationStateSelector">Function to calculate the state /// that the trigger will cause a transition to.</param> /// <returns>The reciever.</returns> /// <param name="guard">Function that must return true in order for the /// trigger to be accepted.</param> /// <typeparam name="TArg0">Type of the first trigger argument.</typeparam> /// <typeparam name="TArg1">Type of the second trigger argument.</typeparam> /// <typeparam name="TArg2">Type of the third trigger argument.</typeparam> public StateConfiguration PermitDynamicIf<TArg0, TArg1, TArg2>(TriggerWithParameters<TArg0, TArg1, TArg2> trigger, Func<TArg0, TArg1, TArg2, TState> destinationStateSelector, Func<bool> guard) { Enforce.ArgumentNotNull(trigger, "trigger"); Enforce.ArgumentNotNull(destinationStateSelector, "destinationStateSelector"); return InternalPermitDynamicIf( trigger.Trigger, args => destinationStateSelector( ParameterConversion.Unpack<TArg0>(args, 0), ParameterConversion.Unpack<TArg1>(args, 1), ParameterConversion.Unpack<TArg2>(args, 2)), guard); } void EnforceNotIdentityTransition(TState destination) { if (destination.Equals(_representation.UnderlyingState)) { throw new ArgumentException(StateConfigurationResources.SelfTransitionsEitherIgnoredOrReentrant); } } StateConfiguration InternalPermit(TTrigger trigger, TState destinationState) { return InternalPermitIf(trigger, destinationState, () => true); } StateConfiguration InternalPermitIf(TTrigger trigger, TState destinationState, Func<bool> guard) { Enforce.ArgumentNotNull(guard, "guard"); _representation.AddTriggerBehaviour(new TransitioningTriggerBehaviour(trigger, destinationState, guard)); return this; } StateConfiguration InternalPermitDynamic(TTrigger trigger, Func<object[], TState> destinationStateSelector) { return InternalPermitDynamicIf(trigger, destinationStateSelector, NoGuard); } StateConfiguration InternalPermitDynamicIf(TTrigger trigger, Func<object[], TState> destinationStateSelector, Func<bool> guard) { Enforce.ArgumentNotNull(destinationStateSelector, "destinationStateSelector"); Enforce.ArgumentNotNull(guard, "guard"); _representation.AddTriggerBehaviour(new DynamicTriggerBehaviour(trigger, destinationStateSelector, guard)); return this; } } } }
1234567eight-test
Stateless/StateConfiguration.cs
C#
asf20
27,091
using System; using System.Collections.Generic; using System.Linq; using System.Text; namespace Stateless { public partial class StateMachine<TState, TTrigger> { internal class DynamicTriggerBehaviour : TriggerBehaviour { readonly Func<object[], TState> _destination; public DynamicTriggerBehaviour(TTrigger trigger, Func<object[], TState> destination, Func<bool> guard) : base(trigger, guard) { _destination = Enforce.ArgumentNotNull(destination, "destination"); } public override bool ResultsInTransitionFrom(TState source, object[] args, out TState destination) { destination = _destination(args); return true; } } } }
1234567eight-test
Stateless/DynamicTriggerBehaviour.cs
C#
asf20
839
using System; using System.Collections.Generic; using System.Linq; namespace Stateless { /// <summary> /// Models behaviour as transitions between a finite set of states. /// </summary> /// <typeparam name="TState">The type used to represent the states.</typeparam> /// <typeparam name="TTrigger">The type used to represent the triggers that cause state transitions.</typeparam> public partial class StateMachine<TState, TTrigger> { readonly IDictionary<TState, StateRepresentation> _stateConfiguration = new Dictionary<TState, StateRepresentation>(); readonly IDictionary<TTrigger, TriggerWithParameters> _triggerConfiguration = new Dictionary<TTrigger, TriggerWithParameters>(); readonly Func<TState> _stateAccessor; readonly Action<TState> _stateMutator; Action<TState, TTrigger> _unhandledTriggerAction = DefaultUnhandledTriggerAction; /// <summary> /// Construct a state machine with external state storage. /// </summary> /// <param name="stateAccessor">A function that will be called to read the current state value.</param> /// <param name="stateMutator">An action that will be called to write new state values.</param> public StateMachine(Func<TState> stateAccessor, Action<TState> stateMutator) { _stateAccessor = Enforce.ArgumentNotNull(stateAccessor, "stateAccessor"); _stateMutator = Enforce.ArgumentNotNull(stateMutator, "stateMutator"); } /// <summary> /// Construct a state machine. /// </summary> /// <param name="initialState">The initial state.</param> public StateMachine(TState initialState) { var reference = new StateReference { State = initialState }; _stateAccessor = () => reference.State; _stateMutator = s => reference.State = s; } /// <summary> /// The current state. /// </summary> public TState State { get { return _stateAccessor(); } private set { _stateMutator(value); } } /// <summary> /// The currently-permissible trigger values. /// </summary> public IEnumerable<TTrigger> PermittedTriggers { get { return CurrentRepresentation.PermittedTriggers; } } StateRepresentation CurrentRepresentation { get { return GetRepresentation(State); } } StateRepresentation GetRepresentation(TState state) { StateRepresentation result; if (!_stateConfiguration.TryGetValue(state, out result)) { result = new StateRepresentation(state); _stateConfiguration.Add(state, result); } return result; } /// <summary> /// Begin configuration of the entry/exit actions and allowed transitions /// when the state machine is in a particular state. /// </summary> /// <param name="state">The state to configure.</param> /// <returns>A configuration object through which the state can be configured.</returns> public StateConfiguration Configure(TState state) { return new StateConfiguration(GetRepresentation(state), GetRepresentation); } /// <summary> /// Transition from the current state via the specified trigger. /// The target state is determined by the configuration of the current state. /// Actions associated with leaving the current state and entering the new one /// will be invoked. /// </summary> /// <param name="trigger">The trigger to fire.</param> /// <exception cref="System.InvalidOperationException">The current state does /// not allow the trigger to be fired.</exception> public void Fire(TTrigger trigger) { InternalFire(trigger, new object[0]); } /// <summary> /// Transition from the current state via the specified trigger. /// The target state is determined by the configuration of the current state. /// Actions associated with leaving the current state and entering the new one /// will be invoked. /// </summary> /// <typeparam name="TArg0">Type of the first trigger argument.</typeparam> /// <param name="trigger">The trigger to fire.</param> /// <param name="arg0">The first argument.</param> /// <exception cref="System.InvalidOperationException">The current state does /// not allow the trigger to be fired.</exception> public void Fire<TArg0>(TriggerWithParameters<TArg0> trigger, TArg0 arg0) { Enforce.ArgumentNotNull(trigger, "trigger"); InternalFire(trigger.Trigger, arg0); } /// <summary> /// Transition from the current state via the specified trigger. /// The target state is determined by the configuration of the current state. /// Actions associated with leaving the current state and entering the new one /// will be invoked. /// </summary> /// <typeparam name="TArg0">Type of the first trigger argument.</typeparam> /// <typeparam name="TArg1">Type of the second trigger argument.</typeparam> /// <param name="arg0">The first argument.</param> /// <param name="arg1">The second argument.</param> /// <param name="trigger">The trigger to fire.</param> /// <exception cref="System.InvalidOperationException">The current state does /// not allow the trigger to be fired.</exception> public void Fire<TArg0, TArg1>(TriggerWithParameters<TArg0, TArg1> trigger, TArg0 arg0, TArg1 arg1) { Enforce.ArgumentNotNull(trigger, "trigger"); InternalFire(trigger.Trigger, arg0, arg1); } /// <summary> /// Transition from the current state via the specified trigger. /// The target state is determined by the configuration of the current state. /// Actions associated with leaving the current state and entering the new one /// will be invoked. /// </summary> /// <typeparam name="TArg0">Type of the first trigger argument.</typeparam> /// <typeparam name="TArg1">Type of the second trigger argument.</typeparam> /// <typeparam name="TArg2">Type of the third trigger argument.</typeparam> /// <param name="arg0">The first argument.</param> /// <param name="arg1">The second argument.</param> /// <param name="arg2">The third argument.</param> /// <param name="trigger">The trigger to fire.</param> /// <exception cref="System.InvalidOperationException">The current state does /// not allow the trigger to be fired.</exception> public void Fire<TArg0, TArg1, TArg2>(TriggerWithParameters<TArg0, TArg1, TArg2> trigger, TArg0 arg0, TArg1 arg1, TArg2 arg2) { Enforce.ArgumentNotNull(trigger, "trigger"); InternalFire(trigger.Trigger, arg0, arg1, arg2); } void InternalFire(TTrigger trigger, params object[] args) { TriggerWithParameters configuration; if (_triggerConfiguration.TryGetValue(trigger, out configuration)) configuration.ValidateParameters(args); TriggerBehaviour triggerBehaviour; if (!CurrentRepresentation.TryFindHandler(trigger, out triggerBehaviour)) { _unhandledTriggerAction(CurrentRepresentation.UnderlyingState, trigger); return; } var source = State; TState destination; if (triggerBehaviour.ResultsInTransitionFrom(source, args, out destination)) { var transition = new Transition(source, destination, trigger); CurrentRepresentation.Exit(transition); State = transition.Destination; CurrentRepresentation.Enter(transition, args); } } /// <summary> /// Override the default behaviour of throwing an exception when an unhandled trigger /// is fired. /// </summary> /// <param name="unhandledTriggerAction">An action to call when an unhandled trigger is fired.</param> public void OnUnhandledTrigger(Action<TState, TTrigger> unhandledTriggerAction) { if (unhandledTriggerAction == null) throw new ArgumentNullException("unhandledTriggerAction"); _unhandledTriggerAction = unhandledTriggerAction; } /// <summary> /// Determine if the state machine is in the supplied state. /// </summary> /// <param name="state">The state to test for.</param> /// <returns>True if the current state is equal to, or a substate of, /// the supplied state.</returns> public bool IsInState(TState state) { return CurrentRepresentation.IsIncludedIn(state); } /// <summary> /// Returns true if <paramref name="trigger"/> can be fired /// in the current state. /// </summary> /// <param name="trigger">Trigger to test.</param> /// <returns>True if the trigger can be fired, false otherwise.</returns> public bool CanFire(TTrigger trigger) { return CurrentRepresentation.CanHandle(trigger); } /// <summary> /// A human-readable representation of the state machine. /// </summary> /// <returns>A description of the current state and permitted triggers.</returns> public override string ToString() { return string.Format( "StateMachine {{ State = {0}, PermittedTriggers = {{ {1} }}}}", State, string.Join(", ", PermittedTriggers.Select(t => t.ToString()).ToArray())); } /// <summary> /// Specify the arguments that must be supplied when a specific trigger is fired. /// </summary> /// <typeparam name="TArg0">Type of the first trigger argument.</typeparam> /// <param name="trigger">The underlying trigger value.</param> /// <returns>An object that can be passed to the Fire() method in order to /// fire the parameterised trigger.</returns> public TriggerWithParameters<TArg0> SetTriggerParameters<TArg0>(TTrigger trigger) { var configuration = new TriggerWithParameters<TArg0>(trigger); SaveTriggerConfiguration(configuration); return configuration; } /// <summary> /// Specify the arguments that must be supplied when a specific trigger is fired. /// </summary> /// <typeparam name="TArg0">Type of the first trigger argument.</typeparam> /// <typeparam name="TArg1">Type of the second trigger argument.</typeparam> /// <param name="trigger">The underlying trigger value.</param> /// <returns>An object that can be passed to the Fire() method in order to /// fire the parameterised trigger.</returns> public TriggerWithParameters<TArg0, TArg1> SetTriggerParameters<TArg0, TArg1>(TTrigger trigger) { var configuration = new TriggerWithParameters<TArg0, TArg1>(trigger); SaveTriggerConfiguration(configuration); return configuration; } /// <summary> /// Specify the arguments that must be supplied when a specific trigger is fired. /// </summary> /// <typeparam name="TArg0">Type of the first trigger argument.</typeparam> /// <typeparam name="TArg1">Type of the second trigger argument.</typeparam> /// <typeparam name="TArg2">Type of the third trigger argument.</typeparam> /// <param name="trigger">The underlying trigger value.</param> /// <returns>An object that can be passed to the Fire() method in order to /// fire the parameterised trigger.</returns> public TriggerWithParameters<TArg0, TArg1, TArg2> SetTriggerParameters<TArg0, TArg1, TArg2>(TTrigger trigger) { var configuration = new TriggerWithParameters<TArg0, TArg1, TArg2>(trigger); SaveTriggerConfiguration(configuration); return configuration; } void SaveTriggerConfiguration(TriggerWithParameters trigger) { if (_triggerConfiguration.ContainsKey(trigger.Trigger)) throw new InvalidOperationException( string.Format(StateMachineResources.CannotReconfigureParameters, trigger)); _triggerConfiguration.Add(trigger.Trigger, trigger); } static void DefaultUnhandledTriggerAction(TState state, TTrigger trigger) { throw new InvalidOperationException( string.Format( StateMachineResources.NoTransitionsPermitted, trigger, state)); } } }
1234567eight-test
Stateless/StateMachine.cs
C#
asf20
13,607
using System.Reflection; using System.Runtime.CompilerServices; using System.Runtime.InteropServices; // General Information about an assembly is controlled through the following // set of attributes. Change these attribute values to modify the information // associated with an assembly. [assembly: AssemblyTitle("Stateless")] [assembly: AssemblyDescription("")] [assembly: AssemblyConfiguration("")] [assembly: AssemblyCompany("<Not Specified>")] [assembly: AssemblyProduct("Stateless")] [assembly: AssemblyCopyright("Copyright © Stateless Contributors 2009")] [assembly: AssemblyTrademark("")] [assembly: AssemblyCulture("")] // Version information for an assembly consists of the following four values: // // Major Version // Minor Version // Build Number // Revision // // You can specify all the values or you can default the Build and Revision Numbers // by using the '*' as shown below: // [assembly: AssemblyVersion("1.0.*")] [assembly: AssemblyVersion("2.3.1.1")] [assembly: AssemblyFileVersion("2.3.1.1")] [assembly: InternalsVisibleTo("Stateless.Tests, PublicKey=002400000480000094000000060200000024000052534131000400000100010077d5f127d9877b3b813017ddefb168b265f8041ec908984bf36071156ff911a7a27b5243decac72586ecf45edfb93c50fdf063639e39edff2238a2b999caf0b2c9767a1517cb1df747b58853503e03e1fb12f1336c35aa97ad8a8bc2984b7cae9f49cad2eedebb8cf59b3bd5f24fd9f3a53bd1a2d8499f4fe0d938873b0101ca")]
1234567eight-test
Stateless/Properties/AssemblyInfo.cs
C#
asf20
1,461
using System; using System.Collections.Generic; using System.Linq; using System.Text; namespace Stateless { public partial class StateMachine<TState, TTrigger> { internal class IgnoredTriggerBehaviour : TriggerBehaviour { public IgnoredTriggerBehaviour(TTrigger trigger, Func<bool> guard) : base(trigger, guard) { } public override bool ResultsInTransitionFrom(TState source, object[] args, out TState destination) { destination = default(TState); return false; } } } }
1234567eight-test
Stateless/IgnoredTriggerBehaviour.cs
C#
asf20
655
using System; using System.Collections.Generic; using System.Linq; using System.Text; namespace Stateless { static class Enforce { public static T ArgumentNotNull<T>(T argument, string description) where T : class { if (argument == null) throw new ArgumentNullException(description); return argument; } } }
1234567eight-test
Stateless/Enforce.cs
C#
asf20
419
using System; using System.Collections.Generic; using System.Linq; using System.Text; namespace Stateless { public partial class StateMachine<TState, TTrigger> { internal class StateReference { public TState State { get; set; } } } }
1234567eight-test
Stateless/StateReference.cs
C#
asf20
301
using System; using System.Collections.Generic; using System.Linq; using System.Text; namespace Stateless { public partial class StateMachine<TState, TTrigger> { /// <summary> /// Describes a state transition. /// </summary> public class Transition { readonly TState _source; readonly TState _destination; readonly TTrigger _trigger; /// <summary> /// Construct a transition. /// </summary> /// <param name="source">The state transitioned from.</param> /// <param name="destination">The state transitioned to.</param> /// <param name="trigger">The trigger that caused the transition.</param> public Transition(TState source, TState destination, TTrigger trigger) { _source = source; _destination = destination; _trigger = trigger; } /// <summary> /// The state transitioned from. /// </summary> public TState Source { get { return _source; } } /// <summary> /// The state transitioned to. /// </summary> public TState Destination { get { return _destination; } } /// <summary> /// The trigger that caused the transition. /// </summary> public TTrigger Trigger { get { return _trigger; } } /// <summary> /// True if the transition is a re-entry, i.e. the identity transition. /// </summary> public bool IsReentry { get { return Source.Equals(Destination); } } } } }
1234567eight-test
Stateless/Transition.cs
C#
asf20
1,795