OcasAI/google-code-archive · Datasets at Hugging Face

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/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_cmplx_mult_cmplx_q31.c * * Description: Q31 complex-by-complex multiplication * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * -------------------------------------------------------------------- / #include "arm_math.h" /* * @ingroup groupCmplxMath / /* * @addtogroup CmplxByCmplxMult * @{ / /* * @brief Q31 complex-by-complex multiplication * @param[in] pSrcA points to the first input vector @param[in] pSrcB points to the second input vector @param[out] pDst points to the output vector @param[in] numSamples number of complex samples in each vector * @return none. * * <b>Scaling and Overflow Behavior:</b> * \par * The function implements 1.31 by 1.31 multiplications and finally output is converted into 3.29 format. * Input down scaling is not required. / void arm_cmplx_mult_cmplx_q31( q31_t pSrcA, q31_t * pSrcB, q31_t * pDst, uint32_t numSamples) { q31_t a, b, c, d; /* Temporary variables to store real and imaginary values / uint32_t blkCnt; / loop counters / #ifndef ARM_MATH_CM0 / Run the below code for Cortex-M4 and Cortex-M3 / / loop Unrolling / blkCnt = numSamples >> 2u; / First part of the processing with loop unrolling. Compute 4 outputs at a time. ** a second loop below computes the remaining 1 to 3 samples. / while(blkCnt > 0u) { / C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. / / C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. / a = pSrcA++; b = pSrcA++; c = pSrcB++; d = pSrcB++; / store the real result in 3.29 format in the destination buffer. / pDst++ = (q31_t) ((((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33)); /* store the imag result in 3.29 format in the destination buffer. / pDst++ = (q31_t) ((((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33)); a = pSrcA++; b = pSrcA++; c = pSrcB++; d = pSrcB++; /* store the result in 3.29 format in the destination buffer. / pDst++ = (q31_t) ((((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33)); /* store the result in 3.29 format in the destination buffer. / pDst++ = (q31_t) ((((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33)); a = pSrcA++; b = pSrcA++; c = pSrcB++; d = pSrcB++; /* store the result in 3.29 format in the destination buffer. / pDst++ = (q31_t) ((((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33)); /* store the result in 3.29 format in the destination buffer. / pDst++ = (q31_t) ((((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33)); a = pSrcA++; b = pSrcA++; c = pSrcB++; d = pSrcB++; /* store the result in 3.29 format in the destination buffer. / pDst++ = (q31_t) ((((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33)); /* store the result in 3.29 format in the destination buffer. / pDst++ = (q31_t) ((((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33)); /* Decrement the blockSize loop counter / blkCnt--; } / If the blockSize is not a multiple of 4, compute any remaining output samples here. ** No loop unrolling is used. / blkCnt = numSamples % 0x4u; while(blkCnt > 0u) { / C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. / / C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. / a = pSrcA++; b = pSrcA++; c = pSrcB++; d = pSrcB++; / store the result in 3.29 format in the destination buffer. / pDst++ = (q31_t) ((((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33)); /* store the result in 3.29 format in the destination buffer. / pDst++ = (q31_t) ((((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33)); /* Decrement the blockSize loop counter / blkCnt--; } #else / Run the below code for Cortex-M0 / / loop Unrolling / blkCnt = numSamples >> 1u; / First part of the processing with loop unrolling. Compute 2 outputs at a time. ** a second loop below computes the remaining 1 sample. / while(blkCnt > 0u) { / C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. / / C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. / a = pSrcA++; b = pSrcA++; c = pSrcB++; d = pSrcB++; / store the real result in 3.29 format in the destination buffer. / pDst++ = (q31_t) ((((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33)); /* store the imag result in 3.29 format in the destination buffer. / pDst++ = (q31_t) ((((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33)); a = pSrcA++; b = pSrcA++; c = pSrcB++; d = pSrcB++; /* store the result in 3.29 format in the destination buffer. / pDst++ = (q31_t) ((((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33)); /* store the result in 3.29 format in the destination buffer. / pDst++ = (q31_t) ((((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33)); /* Decrement the blockSize loop counter / blkCnt--; } / If the blockSize is not a multiple of 2, compute any remaining output samples here. ** No loop unrolling is used. / blkCnt = numSamples % 0x2u; while(blkCnt > 0u) { / C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. / / C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. / a = pSrcA++; b = pSrcA++; c = pSrcB++; d = pSrcB++; / store the result in 3.29 format in the destination buffer. / pDst++ = (q31_t) ((((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33)); /* store the result in 3.29 format in the destination buffer. / pDst++ = (q31_t) ((((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33)); /* Decrement the blockSize loop counter / blkCnt--; } #endif / #ifndef ARM_MATH_CM0 / } /* * @} end of CmplxByCmplxMult group */	1137519-player	lib/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c	C	lgpl	6,916
/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_cmplx_dot_prod_q31.c * * Description: Q31 complex dot product * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * -------------------------------------------------------------------- / #include "arm_math.h" /* * @ingroup groupCmplxMath / /* * @addtogroup cmplx_dot_prod * @{ / /* * @brief Q31 complex dot product * @param pSrcA points to the first input vector @param pSrcB points to the second input vector @param numSamples number of complex samples in each vector * @param realResult real part of the result returned here @param imagResult imaginary part of the result returned here @return none. * * <b>Scaling and Overflow Behavior:</b> * \par * The function is implemented using an internal 64-bit accumulator. * The intermediate 1.31 by 1.31 multiplications are performed with 64-bit precision and then shifted to 16.48 format. * The internal real and imaginary accumulators are in 16.48 format and provide 15 guard bits. * Additions are nonsaturating and no overflow will occur as long as <code>numSamples</code> is less than 32768. * The return results <code>realResult</code> and <code>imagResult</code> are in 16.48 format. * Input down scaling is not required. / void arm_cmplx_dot_prod_q31( q31_t pSrcA, q31_t * pSrcB, uint32_t numSamples, q63_t * realResult, q63_t * imagResult) { q63_t real_sum = 0, imag_sum = 0; /* Temporary result storage / #ifndef ARM_MATH_CM0 / Run the below code for Cortex-M4 and Cortex-M3 / uint32_t blkCnt; / loop counter / /loop Unrolling / blkCnt = numSamples >> 2u; / First part of the processing with loop unrolling. Compute 4 outputs at a time. ** a second loop below computes the remaining 1 to 3 samples. / while(blkCnt > 0u) { / CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] / / Convert real data in 2.62 to 16.48 by 14 right shifts / real_sum += (q63_t) pSrcA++ * (pSrcB++) >> 14; / CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] / / Convert imag data in 2.62 to 16.48 by 14 right shifts / imag_sum += (q63_t) pSrcA++ * (pSrcB++) >> 14; real_sum += (q63_t) pSrcA++ * (pSrcB++) >> 14; imag_sum += (q63_t) pSrcA++ * (pSrcB++) >> 14; real_sum += (q63_t) pSrcA++ * (pSrcB++) >> 14; imag_sum += (q63_t) pSrcA++ * (pSrcB++) >> 14; real_sum += (q63_t) pSrcA++ * (pSrcB++) >> 14; imag_sum += (q63_t) pSrcA++ * (pSrcB++) >> 14; / Decrement the loop counter / blkCnt--; } / If the numSamples is not a multiple of 4, compute any remaining output samples here. ** No loop unrolling is used. / blkCnt = numSamples % 0x4u; while(blkCnt > 0u) { / CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] / real_sum += (q63_t) pSrcA++ * (pSrcB++) >> 14; / CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] / imag_sum += (q63_t) pSrcA++ * (pSrcB++) >> 14; / Decrement the loop counter / blkCnt--; } #else / Run the below code for Cortex-M0 / while(numSamples > 0u) { / outReal = realA[0]* realB[0] + realA[2]* realB[2] + realA[4]* realB[4] + .....+ realA[numSamples-2]* realB[numSamples-2] / real_sum += (q63_t) pSrcA++ * (pSrcB++) >> 14; / outImag = imagA[1]* imagB[1] + imagA[3]* imagB[3] + imagA[5]* imagB[5] + .....+ imagA[numSamples-1]* imagB[numSamples-1] / imag_sum += (q63_t) pSrcA++ * (pSrcB++) >> 14; / Decrement the loop counter / numSamples--; } #endif / #ifndef ARM_MATH_CM0 / / Store the real and imaginary results in 16.48 format / realResult = real_sum; imagResult = imag_sum; } /* * @} end of cmplx_dot_prod group */	1137519-player	lib/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c	C	lgpl	4,826
/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_cmplx_mag_q31.c * * Description: Q31 complex magnitude * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * ---------------------------------------------------------------------------- / #include "arm_math.h" /* * @ingroup groupCmplxMath / /* * @addtogroup cmplx_mag * @{ / /* * @brief Q31 complex magnitude * @param pSrc points to the complex input vector @param pDst points to the real output vector @param numSamples number of complex samples in the input vector * @return none. * * <b>Scaling and Overflow Behavior:</b> * \par * The function implements 1.31 by 1.31 multiplications and finally output is converted into 2.30 format. * Input down scaling is not required. / void arm_cmplx_mag_q31( q31_t pSrc, q31_t * pDst, uint32_t numSamples) { q31_t real, imag; /* Temporary variables to hold input values / q31_t acc0, acc1; / Accumulators / #ifndef ARM_MATH_CM0 / Run the below code for Cortex-M4 and Cortex-M3 / uint32_t blkCnt; / loop counter / /loop Unrolling / blkCnt = numSamples >> 2u; / First part of the processing with loop unrolling. Compute 4 outputs at a time. ** a second loop below computes the remaining 1 to 3 samples. / while(blkCnt > 0u) { / C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) / real = pSrc++; imag = pSrc++; acc0 = (q31_t) (((q63_t) real real) >> 33); acc1 = (q31_t) (((q63_t) imag * imag) >> 33); /* store the result in 2.30 format in the destination buffer. / arm_sqrt_q31(acc0 + acc1, pDst++); real = pSrc++; imag = pSrc++; acc0 = (q31_t) (((q63_t) real real) >> 33); acc1 = (q31_t) (((q63_t) imag * imag) >> 33); /* store the result in 2.30 format in the destination buffer. / arm_sqrt_q31(acc0 + acc1, pDst++); real = pSrc++; imag = pSrc++; acc0 = (q31_t) (((q63_t) real real) >> 33); acc1 = (q31_t) (((q63_t) imag * imag) >> 33); /* store the result in 2.30 format in the destination buffer. / arm_sqrt_q31(acc0 + acc1, pDst++); real = pSrc++; imag = pSrc++; acc0 = (q31_t) (((q63_t) real real) >> 33); acc1 = (q31_t) (((q63_t) imag * imag) >> 33); /* store the result in 2.30 format in the destination buffer. / arm_sqrt_q31(acc0 + acc1, pDst++); / Decrement the loop counter / blkCnt--; } / If the numSamples is not a multiple of 4, compute any remaining output samples here. ** No loop unrolling is used. / blkCnt = numSamples % 0x4u; while(blkCnt > 0u) { / C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) / real = pSrc++; imag = pSrc++; acc0 = (q31_t) (((q63_t) real real) >> 33); acc1 = (q31_t) (((q63_t) imag * imag) >> 33); /* store the result in 2.30 format in the destination buffer. / arm_sqrt_q31(acc0 + acc1, pDst++); / Decrement the loop counter / blkCnt--; } #else / Run the below code for Cortex-M0 / while(numSamples > 0u) { / out = sqrt((real * real) + (imag * imag)) / real = pSrc++; imag = pSrc++; acc0 = (q31_t) (((q63_t) real real) >> 33); acc1 = (q31_t) (((q63_t) imag * imag) >> 33); /* store the result in 2.30 format in the destination buffer. / arm_sqrt_q31(acc0 + acc1, pDst++); / Decrement the loop counter / numSamples--; } #endif / #ifndef ARM_MATH_CM0 / } /* * @} end of cmplx_mag group */	1137519-player	lib/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_q31.c	C	lgpl	4,428
/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_cmplx_mult_real_q31.c * * Description: Q31 complex by real multiplication * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * -------------------------------------------------------------------- / #include "arm_math.h" /* * @ingroup groupCmplxMath / /* * @addtogroup CmplxByRealMult * @{ / /* * @brief Q31 complex-by-real multiplication * @param[in] pSrcCmplx points to the complex input vector @param[in] pSrcReal points to the real input vector @param[out] pCmplxDst points to the complex output vector @param[in] numSamples number of samples in each vector * @return none. * * <b>Scaling and Overflow Behavior:</b> * \par * The function uses saturating arithmetic. * Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated. / void arm_cmplx_mult_real_q31( q31_t pSrcCmplx, q31_t * pSrcReal, q31_t * pCmplxDst, uint32_t numSamples) { q31_t in; /* Temporary variable to store input value / #ifndef ARM_MATH_CM0 / Run the below code for Cortex-M4 and Cortex-M3 / uint32_t blkCnt; / loop counters / / loop Unrolling / blkCnt = numSamples >> 2u; / First part of the processing with loop unrolling. Compute 4 outputs at a time. ** a second loop below computes the remaining 1 to 3 samples. / while(blkCnt > 0u) { / C[2 * i] = A[2 * i] * B[i]. / / C[2 * i + 1] = A[2 * i + 1] * B[i]. / in = pSrcReal++; /* store the result in the destination buffer. / pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31); pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) pSrcCmplx++ * in) >> 31); in = pSrcReal++; pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31); pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) pSrcCmplx++ * in) >> 31); in = pSrcReal++; pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31); pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) pSrcCmplx++ * in) >> 31); in = pSrcReal++; pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31); pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) pSrcCmplx++ * in) >> 31); /* Decrement the numSamples loop counter / blkCnt--; } / If the numSamples is not a multiple of 4, compute any remaining output samples here. ** No loop unrolling is used. / blkCnt = numSamples % 0x4u; while(blkCnt > 0u) { / C[2 * i] = A[2 * i] * B[i]. / / C[2 * i + 1] = A[2 * i + 1] * B[i]. / in = pSrcReal++; /* store the result in the destination buffer. / pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31); pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) pSrcCmplx++ * in) >> 31); /* Decrement the numSamples loop counter / blkCnt--; } #else / Run the below code for Cortex-M0 / while(numSamples > 0u) { / realOut = realA * realB. / / imagReal = imagA * realB. / in = pSrcReal++; /* store the result in the destination buffer. / pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31); pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) pSrcCmplx++ * in) >> 31); /* Decrement the numSamples loop counter / numSamples--; } #endif / #ifndef ARM_MATH_CM0 / } /* * @} end of CmplxByRealMult group */	1137519-player	lib/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c	C	lgpl	4,516
/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_cmplx_mult_cmplx_f32.c * * Description: Floating-point complex-by-complex multiplication * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * -------------------------------------------------------------------- / #include "arm_math.h" /* * @ingroup groupCmplxMath / /* * @defgroup CmplxByCmplxMult Complex-by-Complex Multiplication * * Multiplies a complex vector by another complex vector and generates a complex result. * The data in the complex arrays is stored in an interleaved fashion * (real, imag, real, imag, ...). * The parameter <code>numSamples</code> represents the number of complex * samples processed. The complex arrays have a total of <code>2numSamples</code> real values. * * The underlying algorithm is used: * * <pre> * for(n=0; n<numSamples; n++) { * pDst[(2n)+0] = pSrcA[(2n)+0] * pSrcB[(2n)+0] - pSrcA[(2n)+1] * pSrcB[(2n)+1]; pDst[(2n)+1] = pSrcA[(2n)+0] * pSrcB[(2n)+1] + pSrcA[(2n)+1] * pSrcB[(2n)+0]; } * </pre> * * There are separate functions for floating-point, Q15, and Q31 data types. / /* * @addtogroup CmplxByCmplxMult * @{ / /* * @brief Floating-point complex-by-complex multiplication * @param[in] pSrcA points to the first input vector @param[in] pSrcB points to the second input vector @param[out] pDst points to the output vector @param[in] numSamples number of complex samples in each vector * @return none. / void arm_cmplx_mult_cmplx_f32( float32_t pSrcA, float32_t * pSrcB, float32_t * pDst, uint32_t numSamples) { float32_t a, b, c, d; /* Temporary variables to store real and imaginary values / #ifndef ARM_MATH_CM0 / Run the below code for Cortex-M4 and Cortex-M3 / uint32_t blkCnt; / loop counters / / loop Unrolling / blkCnt = numSamples >> 2u; / First part of the processing with loop unrolling. Compute 4 outputs at a time. ** a second loop below computes the remaining 1 to 3 samples. / while(blkCnt > 0u) { / C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. / / C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. / a = pSrcA++; b = pSrcA++; c = pSrcB++; d = pSrcB++; / store the result in the destination buffer. / pDst++ = (a * c) - (b * d); pDst++ = (a d) + (b * c); a = pSrcA++; b = pSrcA++; c = pSrcB++; d = pSrcB++; pDst++ = (a c) - (b * d); pDst++ = (a d) + (b * c); a = pSrcA++; b = pSrcA++; c = pSrcB++; d = pSrcB++; pDst++ = (a c) - (b * d); pDst++ = (a d) + (b * c); a = pSrcA++; b = pSrcA++; c = pSrcB++; d = pSrcB++; pDst++ = (a c) - (b * d); pDst++ = (a d) + (b * c); /* Decrement the numSamples loop counter / blkCnt--; } / If the numSamples is not a multiple of 4, compute any remaining output samples here. ** No loop unrolling is used. / blkCnt = numSamples % 0x4u; while(blkCnt > 0u) { / C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. / / C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. / a = pSrcA++; b = pSrcA++; c = pSrcB++; d = pSrcB++; / store the result in the destination buffer. / pDst++ = (a * c) - (b * d); pDst++ = (a d) + (b * c); /* Decrement the numSamples loop counter / blkCnt--; } #else / Run the below code for Cortex-M0 / while(numSamples > 0u) { / C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. / / C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. / a = pSrcA++; b = pSrcA++; c = pSrcB++; d = pSrcB++; / store the result in the destination buffer. / pDst++ = (a * c) - (b * d); pDst++ = (a d) + (b * c); /* Decrement the numSamples loop counter / numSamples--; } #endif / #ifndef ARM_MATH_CM0 / } /* * @} end of CmplxByCmplxMult group */	1137519-player	lib/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c	C	lgpl	5,065
/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_pid_init_q31.c * * Description: Q31 PID Control initialization function * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * ------------------------------------------------------------------- / #include "arm_math.h" /* * @addtogroup PID * @{ / /* * @brief Initialization function for the Q31 PID Control. * @param[in,out] S points to an instance of the Q31 PID structure. @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the state. * @return none. * \par Description: * \par * The <code>resetStateFlag</code> specifies whether to set state to zero or not. \n * The function computes the structure fields: <code>A0</code>, <code>A1</code> <code>A2</code> * using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd) * also sets the state variables to all zeros. / void arm_pid_init_q31( arm_pid_instance_q31 S, int32_t resetStateFlag) { #ifndef ARM_MATH_CM0 /* Run the below code for Cortex-M4 and Cortex-M3 / / Derived coefficient A0 / S->A0 = __QADD(__QADD(S->Kp, S->Ki), S->Kd); / Derived coefficient A1 / S->A1 = -__QADD(__QADD(S->Kd, S->Kd), S->Kp); #else / Run the below code for Cortex-M0 / q31_t temp; / Derived coefficient A0 / temp = clip_q63_to_q31((q63_t) S->Kp + S->Ki); S->A0 = clip_q63_to_q31((q63_t) temp + S->Kd); / Derived coefficient A1 / temp = clip_q63_to_q31((q63_t) S->Kd + S->Kd); S->A1 = -clip_q63_to_q31((q63_t) temp + S->Kp); #endif / #ifndef ARM_MATH_CM0 / / Derived coefficient A2 / S->A2 = S->Kd; / Check whether state needs reset or not / if(resetStateFlag) { / Clear the state buffer. The size will be always 3 samples / memset(S->state, 0, 3u sizeof(q31_t)); } } /** * @} end of PID group */	1137519-player	lib/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q31.c	C	lgpl	2,683
/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_pid_reset_f32.c * * Description: Floating-point PID Control reset function * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * ------------------------------------------------------------------- / #include "arm_math.h" /* * @addtogroup PID * @{ / /* * @brief Reset function for the floating-point PID Control. * @param[in] S Instance pointer of PID control data structure. @return none. * \par Description: * The function resets the state buffer to zeros. / void arm_pid_reset_f32( arm_pid_instance_f32 S) { /* Clear the state buffer. The size will be always 3 samples / memset(S->state, 0, 3u sizeof(float32_t)); } /** * @} end of PID group */	1137519-player	lib/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_f32.c	C	lgpl	1,492
/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_pid_reset_q31.c * * Description: Q31 PID Control reset function * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * ------------------------------------------------------------------- / #include "arm_math.h" /* * @addtogroup PID * @{ / /* * @brief Reset function for the Q31 PID Control. * @param[in] S Instance pointer of PID control data structure. @return none. * \par Description: * The function resets the state buffer to zeros. / void arm_pid_reset_q31( arm_pid_instance_q31 S) { /* Clear the state buffer. The size will be always 3 samples / memset(S->state, 0, 3u sizeof(q31_t)); } /** * @} end of PID group */	1137519-player	lib/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q31.c	C	lgpl	1,466
/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_sin_cos_f32.c * * Description: Sine and Cosine calculation for floating-point values. * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * -------------------------------------------------------------------- / #include "arm_math.h" /* * @ingroup groupController / /* * @defgroup SinCos Sine Cosine * * Computes the trigonometric sine and cosine values using a combination of table lookup * and linear interpolation. * There are separate functions for Q31 and floating-point data types. * The input to the floating-point version is in degrees while the * fixed-point Q31 have a scaled input with the range * [-1 1) mapping to [-180 180) degrees. * * The implementation is based on table lookup using 360 values together with linear interpolation. * The steps used are: * -# Calculation of the nearest integer table index. * -# Compute the fractional portion (fract) of the input. * -# Fetch the value corresponding to \c index from sine table to \c y0 and also value from \c index+1 to \c y1. * -# Sine value is computed as <code> psinVal = y0 + (fract (y1 - y0))</code>. * -# Fetch the value corresponding to \c index from cosine table to \c y0 and also value from \c index+1 to \c y1. * -# Cosine value is computed as <code> pcosVal = y0 + (fract (y1 - y0))</code>. / /* * @addtogroup SinCos * @{ / /* * \par * Cosine Table is generated from following loop * <pre>for(i = 0; i < 360; i++) * { * cosTable[i]= cos((i-180) * PI/180.0); * } </pre> / static const float32_t cosTable[360] = { -0.999847695156391270f, -0.999390827019095760f, -0.998629534754573830f, -0.997564050259824200f, -0.996194698091745550f, -0.994521895368273290f, -0.992546151641321980f, -0.990268068741570250f, -0.987688340595137660f, -0.984807753012208020f, -0.981627183447663980f, -0.978147600733805690f, -0.974370064785235250f, -0.970295726275996470f, -0.965925826289068200f, -0.961261695938318670f, -0.956304755963035440f, -0.951056516295153530f, -0.945518575599316740f, -0.939692620785908320f, -0.933580426497201740f, -0.927183854566787310f, -0.920504853452440150f, -0.913545457642600760f, -0.906307787036649940f, -0.898794046299167040f, -0.891006524188367790f, -0.882947592858926770f, -0.874619707139395740f, -0.866025403784438710f, -0.857167300702112220f, -0.848048096156425960f, -0.838670567945424160f, -0.829037572555041620f, -0.819152044288991580f, -0.809016994374947340f, -0.798635510047292940f, -0.788010753606721900f, -0.777145961456970680f, -0.766044443118977900f, -0.754709580222772010f, -0.743144825477394130f, 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0.984807753012208020f, 0.987688340595137770f, 0.990268068741570360f, 0.992546151641321980f, 0.994521895368273290f, 0.996194698091745550f, 0.997564050259824200f, 0.998629534754573830f, 0.999390827019095760f, 0.999847695156391270f, 1.000000000000000000f, 0.999847695156391270f, 0.999390827019095760f, 0.998629534754573830f, 0.997564050259824200f, 0.996194698091745550f, 0.994521895368273290f, 0.992546151641321980f, 0.990268068741570360f, 0.987688340595137770f, 0.984807753012208020f, 0.981627183447663980f, 0.978147600733805690f, 0.974370064785235250f, 0.970295726275996470f, 0.965925826289068310f, 0.961261695938318890f, 0.956304755963035440f, 0.951056516295153530f, 0.945518575599316850f, 0.939692620785908430f, 0.933580426497201740f, 0.927183854566787420f, 0.920504853452440370f, 0.913545457642600870f, 0.906307787036649940f, 0.898794046299167040f, 0.891006524188367900f, 0.882947592858926990f, 0.874619707139395740f, 0.866025403784438710f, 0.857167300702112330f, 0.848048096156425960f, 0.838670567945424050f, 0.829037572555041620f, 0.819152044288991800f, 0.809016994374947450f, 0.798635510047292830f, 0.788010753606722010f, 0.777145961456970900f, 0.766044443118978010f, 0.754709580222772010f, 0.743144825477394240f, 0.731353701619170570f, 0.719339800338651190f, 0.707106781186547570f, 0.694658370458997370f, 0.681998360062498480f, 0.669130606358858240f, 0.656059028990507280f, 0.642787609686539360f, 0.629320391049837500f, 0.615661475325658290f, 0.601815023152048270f, 0.587785252292473140f, 0.573576436351046050f, 0.559192903470746790f, 0.544639035015027200f, 0.529919264233204900f, 0.515038074910054380f, 0.500000000000000110f, 0.484809620246337110f, 0.469471562785890860f, 0.453990499739546860f, 0.438371146789077460f, 0.422618261740699440f, 0.406736643075800210f, 0.390731128489273940f, 0.374606593415911960f, 0.358367949545300380f, 0.342020143325668820f, 0.325568154457156760f, 0.309016994374947450f, 0.292371704722736770f, 0.275637355816999160f, 0.258819045102520740f, 0.241921895599667900f, 0.224951054343864920f, 0.207911690817759450f, 0.190808995376544920f, 0.173648177666930410f, 0.156434465040230920f, 0.139173100960065690f, 0.121869343405147490f, 0.104528463267653460f, 0.087155742747658138f, 0.069756473744125455f, 0.052335956242943966f, 0.034899496702501080f, 0.017452406437283376f, 0.000000000000000061f, -0.017452406437283477f, -0.034899496702500733f, -0.052335956242943620f, -0.069756473744125330f, -0.087155742747658235f, -0.104528463267653330f, -0.121869343405147370f, -0.139173100960065350f, -0.156434465040231040f, -0.173648177666930300f, -0.190808995376544800f, -0.207911690817759120f, -0.224951054343864810f, -0.241921895599667790f, -0.258819045102520850f, -0.275637355816999050f, -0.292371704722736660f, -0.309016994374947340f, -0.325568154457156420f, -0.342020143325668710f, -0.358367949545300270f, -0.374606593415912070f, -0.390731128489273600f, -0.406736643075800100f, -0.422618261740699330f, -0.438371146789077510f, -0.453990499739546750f, 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-0.933580426497201740f, -0.939692620785908320f, -0.945518575599316740f, -0.951056516295153530f, -0.956304755963035440f, -0.961261695938318670f, -0.965925826289068200f, -0.970295726275996470f, -0.974370064785235250f, -0.978147600733805690f, -0.981627183447663980f, -0.984807753012208020f, -0.987688340595137660f, -0.990268068741570250f, -0.992546151641321980f, -0.994521895368273290f, -0.996194698091745550f, -0.997564050259824200f, -0.998629534754573830f, -0.999390827019095760f, -0.999847695156391270f, -1.000000000000000000f }; /* * \par * Sine Table is generated from following loop * <pre>for(i = 0; i < 360; i++) * { * sinTable[i]= sin((i-180) * PI/180.0); * } </pre> / static const float32_t sinTable[360] = { -0.017452406437283439f, -0.034899496702500699f, -0.052335956242943807f, -0.069756473744125524f, -0.087155742747658638f, -0.104528463267653730f, -0.121869343405147550f, -0.139173100960065740f, -0.156434465040230980f, -0.173648177666930280f, -0.190808995376544970f, -0.207911690817759310f, -0.224951054343864780f, -0.241921895599667730f, -0.258819045102521020f, -0.275637355816999660f, -0.292371704722737050f, -0.309016994374947510f, -0.325568154457156980f, -0.342020143325668880f, -0.358367949545300210f, -0.374606593415912240f, -0.390731128489274160f, -0.406736643075800430f, -0.422618261740699500f, -0.438371146789077290f, -0.453990499739546860f, -0.469471562785891080f, -0.484809620246337170f, -0.499999999999999940f, -0.515038074910054380f, -0.529919264233204900f, -0.544639035015026860f, -0.559192903470746900f, -0.573576436351046380f, -0.587785252292473250f, -0.601815023152048160f, -0.615661475325658400f, -0.629320391049837720f, -0.642787609686539470f, -0.656059028990507280f, -0.669130606358858350f, -0.681998360062498590f, -0.694658370458997140f, -0.707106781186547570f, -0.719339800338651410f, -0.731353701619170570f, -0.743144825477394240f, -0.754709580222771790f, -0.766044443118978010f, -0.777145961456971010f, -0.788010753606722010f, -0.798635510047292720f, -0.809016994374947450f, -0.819152044288992020f, -0.829037572555041740f, -0.838670567945424050f, -0.848048096156426070f, -0.857167300702112330f, -0.866025403784438710f, -0.874619707139395850f, -0.882947592858927100f, -0.891006524188367900f, -0.898794046299166930f, -0.906307787036650050f, -0.913545457642600980f, -0.920504853452440370f, -0.927183854566787420f, -0.933580426497201740f, -0.939692620785908430f, -0.945518575599316850f, -0.951056516295153640f, -0.956304755963035550f, -0.961261695938318890f, -0.965925826289068310f, -0.970295726275996470f, -0.974370064785235250f, -0.978147600733805690f, -0.981627183447663980f, -0.984807753012208020f, -0.987688340595137660f, -0.990268068741570360f, -0.992546151641322090f, -0.994521895368273400f, -0.996194698091745550f, -0.997564050259824200f, -0.998629534754573830f, -0.999390827019095760f, -0.999847695156391270f, -1.000000000000000000f, -0.999847695156391270f, -0.999390827019095760f, -0.998629534754573830f, -0.997564050259824200f, -0.996194698091745550f, -0.994521895368273290f, -0.992546151641321980f, -0.990268068741570250f, -0.987688340595137770f, -0.984807753012208020f, -0.981627183447663980f, -0.978147600733805580f, -0.974370064785235250f, -0.970295726275996470f, -0.965925826289068310f, -0.961261695938318890f, -0.956304755963035440f, -0.951056516295153530f, -0.945518575599316740f, -0.939692620785908320f, -0.933580426497201740f, -0.927183854566787420f, -0.920504853452440260f, -0.913545457642600870f, -0.906307787036649940f, -0.898794046299167040f, -0.891006524188367790f, -0.882947592858926880f, -0.874619707139395740f, -0.866025403784438600f, -0.857167300702112220f, -0.848048096156426070f, -0.838670567945423940f, -0.829037572555041740f, -0.819152044288991800f, -0.809016994374947450f, -0.798635510047292830f, -0.788010753606722010f, -0.777145961456970790f, -0.766044443118978010f, -0.754709580222772010f, -0.743144825477394240f, -0.731353701619170460f, -0.719339800338651080f, -0.707106781186547460f, -0.694658370458997250f, -0.681998360062498480f, -0.669130606358858240f, -0.656059028990507160f, -0.642787609686539250f, -0.629320391049837390f, -0.615661475325658180f, -0.601815023152048270f, -0.587785252292473140f, -0.573576436351046050f, -0.559192903470746900f, -0.544639035015027080f, -0.529919264233204900f, -0.515038074910054160f, -0.499999999999999940f, -0.484809620246337060f, -0.469471562785890810f, -0.453990499739546750f, -0.438371146789077400f, -0.422618261740699440f, -0.406736643075800150f, -0.390731128489273720f, -0.374606593415912010f, -0.358367949545300270f, -0.342020143325668710f, -0.325568154457156640f, -0.309016994374947400f, -0.292371704722736770f, -0.275637355816999160f, -0.258819045102520740f, -0.241921895599667730f, -0.224951054343865000f, -0.207911690817759310f, -0.190808995376544800f, -0.173648177666930330f, -0.156434465040230870f, -0.139173100960065440f, -0.121869343405147480f, -0.104528463267653460f, -0.087155742747658166f, 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0.629320391049837390f, 0.642787609686539250f, 0.656059028990507160f, 0.669130606358858240f, 0.681998360062498480f, 0.694658370458997250f, 0.707106781186547460f, 0.719339800338651080f, 0.731353701619170460f, 0.743144825477394240f, 0.754709580222772010f, 0.766044443118978010f, 0.777145961456970790f, 0.788010753606722010f, 0.798635510047292830f, 0.809016994374947450f, 0.819152044288991800f, 0.829037572555041740f, 0.838670567945423940f, 0.848048096156426070f, 0.857167300702112220f, 0.866025403784438600f, 0.874619707139395740f, 0.882947592858926880f, 0.891006524188367790f, 0.898794046299167040f, 0.906307787036649940f, 0.913545457642600870f, 0.920504853452440260f, 0.927183854566787420f, 0.933580426497201740f, 0.939692620785908320f, 0.945518575599316740f, 0.951056516295153530f, 0.956304755963035440f, 0.961261695938318890f, 0.965925826289068310f, 0.970295726275996470f, 0.974370064785235250f, 0.978147600733805580f, 0.981627183447663980f, 0.984807753012208020f, 0.987688340595137770f, 0.990268068741570250f, 0.992546151641321980f, 0.994521895368273290f, 0.996194698091745550f, 0.997564050259824200f, 0.998629534754573830f, 0.999390827019095760f, 0.999847695156391270f, 1.000000000000000000f, 0.999847695156391270f, 0.999390827019095760f, 0.998629534754573830f, 0.997564050259824200f, 0.996194698091745550f, 0.994521895368273400f, 0.992546151641322090f, 0.990268068741570360f, 0.987688340595137660f, 0.984807753012208020f, 0.981627183447663980f, 0.978147600733805690f, 0.974370064785235250f, 0.970295726275996470f, 0.965925826289068310f, 0.961261695938318890f, 0.956304755963035550f, 0.951056516295153640f, 0.945518575599316850f, 0.939692620785908430f, 0.933580426497201740f, 0.927183854566787420f, 0.920504853452440370f, 0.913545457642600980f, 0.906307787036650050f, 0.898794046299166930f, 0.891006524188367900f, 0.882947592858927100f, 0.874619707139395850f, 0.866025403784438710f, 0.857167300702112330f, 0.848048096156426070f, 0.838670567945424050f, 0.829037572555041740f, 0.819152044288992020f, 0.809016994374947450f, 0.798635510047292720f, 0.788010753606722010f, 0.777145961456971010f, 0.766044443118978010f, 0.754709580222771790f, 0.743144825477394240f, 0.731353701619170570f, 0.719339800338651410f, 0.707106781186547570f, 0.694658370458997140f, 0.681998360062498590f, 0.669130606358858350f, 0.656059028990507280f, 0.642787609686539470f, 0.629320391049837720f, 0.615661475325658400f, 0.601815023152048160f, 0.587785252292473250f, 0.573576436351046380f, 0.559192903470746900f, 0.544639035015026860f, 0.529919264233204900f, 0.515038074910054380f, 0.499999999999999940f, 0.484809620246337170f, 0.469471562785891080f, 0.453990499739546860f, 0.438371146789077290f, 0.422618261740699500f, 0.406736643075800430f, 0.390731128489274160f, 0.374606593415912240f, 0.358367949545300210f, 0.342020143325668880f, 0.325568154457156980f, 0.309016994374947510f, 0.292371704722737050f, 0.275637355816999660f, 0.258819045102521020f, 0.241921895599667730f, 0.224951054343864780f, 0.207911690817759310f, 0.190808995376544970f, 0.173648177666930280f, 0.156434465040230980f, 0.139173100960065740f, 0.121869343405147550f, 0.104528463267653730f, 0.087155742747658638f, 0.069756473744125524f, 0.052335956242943807f, 0.034899496702500699f, 0.017452406437283439f, 0.000000000000000122f }; /* * @brief Floating-point sin_cos function. * @param[in] theta input value in degrees * @param[out] pSinVal points to the processed sine output. @param[out] pCosVal points to the processed cos output. @return none. / void arm_sin_cos_f32( float32_t theta, float32_t pSinVal, float32_t * pCosVal) { uint32_t i; /* Index for reading nearwst output values / float32_t x1 = -179.0f; / Initial input value / float32_t y0, y1; / nearest output values / float32_t fract; / fractional part of input / / Calculation of fractional part / if(theta > 0.0f) { fract = theta - (float32_t) ((int32_t) theta); } else { fract = (theta - (float32_t) ((int32_t) theta)) + 1.0f; } / index calculation for reading nearest output values / i = (uint32_t) (theta - x1); / reading nearest sine output values / y0 = sinTable[i]; y1 = sinTable[i + 1u]; / Calculation of sine value / pSinVal = y0 + (fract * (y1 - y0)); /* reading nearest cosine output values / y0 = cosTable[i]; y1 = cosTable[i + 1u]; / Calculation of cosine value / pCosVal = y0 + (fract * (y1 - y0)); } /** * @} end of SinCos group */	1137519-player	lib/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_sin_cos_f32.c	C	lgpl	21,770
/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_pid_init_q15.c * * Description: Q15 PID Control initialization function * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * -------------------------------------------------------------------- / #include "arm_math.h" /* * @addtogroup PID * @{ / /* * @details * @param[in,out] S points to an instance of the Q15 PID structure. @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the state. * @return none. * \par Description: * \par * The <code>resetStateFlag</code> specifies whether to set state to zero or not. \n * The function computes the structure fields: <code>A0</code>, <code>A1</code> <code>A2</code> * using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd) * also sets the state variables to all zeros. / void arm_pid_init_q15( arm_pid_instance_q15 S, int32_t resetStateFlag) { #ifndef ARM_MATH_CM0 /* Run the below code for Cortex-M4 and Cortex-M3 / / Derived coefficient A0 / S->A0 = __QADD16(__QADD16(S->Kp, S->Ki), S->Kd); / Derived coefficients and pack into A1 / #ifndef ARM_MATH_BIG_ENDIAN S->A1 = __PKHBT(-__QADD16(__QADD16(S->Kd, S->Kd), S->Kp), S->Kd, 16); #else S->A1 = __PKHBT(S->Kd, -__QADD16(__QADD16(S->Kd, S->Kd), S->Kp), 16); #endif / #ifndef ARM_MATH_BIG_ENDIAN / / Check whether state needs reset or not / if(resetStateFlag) { / Clear the state buffer. The size will be always 3 samples / memset(S->state, 0, 3u sizeof(q15_t)); } #else /* Run the below code for Cortex-M0 / q31_t temp; /to store the sum / / Derived coefficient A0 / temp = S->Kp + S->Ki + S->Kd; S->A0 = (q15_t) __SSAT(temp, 16); / Derived coefficients and pack into A1 / temp = -(S->Kd + S->Kd + S->Kp); S->A1 = (q15_t) __SSAT(temp, 16); S->A2 = S->Kd; / Check whether state needs reset or not / if(resetStateFlag) { / Clear the state buffer. The size will be always 3 samples / memset(S->state, 0, 3u sizeof(q15_t)); } #endif /* #ifndef ARM_MATH_CM0 / } /* * @} end of PID group */	1137519-player	lib/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q15.c	C	lgpl	3,032
/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_sin_cos_q31.c * * Description: Cosine & Sine calculation for Q31 values. * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * -------------------------------------------------------------------- / #include "arm_math.h" /* * @ingroup groupController / /* * @addtogroup SinCos * @{ / /* * \par * Sine Table is generated from following loop * <pre>for(i = 0; i < 360; i++) * { * sinTable[i]= sin((i-180) * PI/180.0); * } </pre> * Convert above coefficients to fixed point 1.31 format. / static const int32_t sinTableQ31[360] = { 0x0, 0xfdc41e9b, 0xfb8869ce, 0xf94d0e2e, 0xf7123849, 0xf4d814a4, 0xf29ecfb2, 0xf06695da, 0xee2f9369, 0xebf9f498, 0xe9c5e582, 0xe7939223, 0xe5632654, 0xe334cdc9, 0xe108b40d, 0xdedf047d, 0xdcb7ea46, 0xda939061, 0xd8722192, 0xd653c860, 0xd438af17, 0xd220ffc0, 0xd00ce422, 0xcdfc85bb, 0xcbf00dbe, 0xc9e7a512, 0xc7e3744b, 0xc5e3a3a9, 0xc3e85b18, 0xc1f1c224, 0xc0000000, 0xbe133b7c, 0xbc2b9b05, 0xba4944a2, 0xb86c5df0, 0xb6950c1e, 0xb4c373ee, 0xb2f7b9af, 0xb1320139, 0xaf726def, 0xadb922b7, 0xac0641fb, 0xaa59eda4, 0xa8b4471a, 0xa7156f3c, 0xa57d8666, 0xa3ecac65, 0xa263007d, 0xa0e0a15f, 0x9f65ad2d, 0x9df24175, 0x9c867b2c, 0x9b2276b0, 0x99c64fc5, 0x98722192, 0x9726069c, 0x95e218c9, 0x94a6715d, 0x937328f5, 0x92485786, 0x9126145f, 0x900c7621, 0x8efb92c2, 0x8df37f8b, 0x8cf45113, 0x8bfe1b3f, 0x8b10f144, 0x8a2ce59f, 0x89520a1a, 0x88806fc4, 0x87b826f7, 0x86f93f50, 0x8643c7b3, 0x8597ce46, 0x84f56073, 0x845c8ae3, 0x83cd5982, 0x8347d77b, 0x82cc0f36, 0x825a0a5b, 0x81f1d1ce, 0x81936daf, 0x813ee55b, 0x80f43f69, 0x80b381ac, 0x807cb130, 0x804fd23a, 0x802ce84c, 0x8013f61d, 0x8004fda0, 0x80000000, 0x8004fda0, 0x8013f61d, 0x802ce84c, 0x804fd23a, 0x807cb130, 0x80b381ac, 0x80f43f69, 0x813ee55b, 0x81936daf, 0x81f1d1ce, 0x825a0a5b, 0x82cc0f36, 0x8347d77b, 0x83cd5982, 0x845c8ae3, 0x84f56073, 0x8597ce46, 0x8643c7b3, 0x86f93f50, 0x87b826f7, 0x88806fc4, 0x89520a1a, 0x8a2ce59f, 0x8b10f144, 0x8bfe1b3f, 0x8cf45113, 0x8df37f8b, 0x8efb92c2, 0x900c7621, 0x9126145f, 0x92485786, 0x937328f5, 0x94a6715d, 0x95e218c9, 0x9726069c, 0x98722192, 0x99c64fc5, 0x9b2276b0, 0x9c867b2c, 0x9df24175, 0x9f65ad2d, 0xa0e0a15f, 0xa263007d, 0xa3ecac65, 0xa57d8666, 0xa7156f3c, 0xa8b4471a, 0xaa59eda4, 0xac0641fb, 0xadb922b7, 0xaf726def, 0xb1320139, 0xb2f7b9af, 0xb4c373ee, 0xb6950c1e, 0xb86c5df0, 0xba4944a2, 0xbc2b9b05, 0xbe133b7c, 0xc0000000, 0xc1f1c224, 0xc3e85b18, 0xc5e3a3a9, 0xc7e3744b, 0xc9e7a512, 0xcbf00dbe, 0xcdfc85bb, 0xd00ce422, 0xd220ffc0, 0xd438af17, 0xd653c860, 0xd8722192, 0xda939061, 0xdcb7ea46, 0xdedf047d, 0xe108b40d, 0xe334cdc9, 0xe5632654, 0xe7939223, 0xe9c5e582, 0xebf9f498, 0xee2f9369, 0xf06695da, 0xf29ecfb2, 0xf4d814a4, 0xf7123849, 0xf94d0e2e, 0xfb8869ce, 0xfdc41e9b, 0x0, 0x23be165, 0x4779632, 0x6b2f1d2, 0x8edc7b7, 0xb27eb5c, 0xd61304e, 0xf996a26, 0x11d06c97, 0x14060b68, 0x163a1a7e, 0x186c6ddd, 0x1a9cd9ac, 0x1ccb3237, 0x1ef74bf3, 0x2120fb83, 0x234815ba, 0x256c6f9f, 0x278dde6e, 0x29ac37a0, 0x2bc750e9, 0x2ddf0040, 0x2ff31bde, 0x32037a45, 0x340ff242, 0x36185aee, 0x381c8bb5, 0x3a1c5c57, 0x3c17a4e8, 0x3e0e3ddc, 0x40000000, 0x41ecc484, 0x43d464fb, 0x45b6bb5e, 0x4793a210, 0x496af3e2, 0x4b3c8c12, 0x4d084651, 0x4ecdfec7, 0x508d9211, 0x5246dd49, 0x53f9be05, 0x55a6125c, 0x574bb8e6, 0x58ea90c4, 0x5a82799a, 0x5c13539b, 0x5d9cff83, 0x5f1f5ea1, 0x609a52d3, 0x620dbe8b, 0x637984d4, 0x64dd8950, 0x6639b03b, 0x678dde6e, 0x68d9f964, 0x6a1de737, 0x6b598ea3, 0x6c8cd70b, 0x6db7a87a, 0x6ed9eba1, 0x6ff389df, 0x71046d3e, 0x720c8075, 0x730baeed, 0x7401e4c1, 0x74ef0ebc, 0x75d31a61, 0x76adf5e6, 0x777f903c, 0x7847d909, 0x7906c0b0, 0x79bc384d, 0x7a6831ba, 0x7b0a9f8d, 0x7ba3751d, 0x7c32a67e, 0x7cb82885, 0x7d33f0ca, 0x7da5f5a5, 0x7e0e2e32, 0x7e6c9251, 0x7ec11aa5, 0x7f0bc097, 0x7f4c7e54, 0x7f834ed0, 0x7fb02dc6, 0x7fd317b4, 0x7fec09e3, 0x7ffb0260, 0x7fffffff, 0x7ffb0260, 0x7fec09e3, 0x7fd317b4, 0x7fb02dc6, 0x7f834ed0, 0x7f4c7e54, 0x7f0bc097, 0x7ec11aa5, 0x7e6c9251, 0x7e0e2e32, 0x7da5f5a5, 0x7d33f0ca, 0x7cb82885, 0x7c32a67e, 0x7ba3751d, 0x7b0a9f8d, 0x7a6831ba, 0x79bc384d, 0x7906c0b0, 0x7847d909, 0x777f903c, 0x76adf5e6, 0x75d31a61, 0x74ef0ebc, 0x7401e4c1, 0x730baeed, 0x720c8075, 0x71046d3e, 0x6ff389df, 0x6ed9eba1, 0x6db7a87a, 0x6c8cd70b, 0x6b598ea3, 0x6a1de737, 0x68d9f964, 0x678dde6e, 0x6639b03b, 0x64dd8950, 0x637984d4, 0x620dbe8b, 0x609a52d3, 0x5f1f5ea1, 0x5d9cff83, 0x5c13539b, 0x5a82799a, 0x58ea90c4, 0x574bb8e6, 0x55a6125c, 0x53f9be05, 0x5246dd49, 0x508d9211, 0x4ecdfec7, 0x4d084651, 0x4b3c8c12, 0x496af3e2, 0x4793a210, 0x45b6bb5e, 0x43d464fb, 0x41ecc484, 0x40000000, 0x3e0e3ddc, 0x3c17a4e8, 0x3a1c5c57, 0x381c8bb5, 0x36185aee, 0x340ff242, 0x32037a45, 0x2ff31bde, 0x2ddf0040, 0x2bc750e9, 0x29ac37a0, 0x278dde6e, 0x256c6f9f, 0x234815ba, 0x2120fb83, 0x1ef74bf3, 0x1ccb3237, 0x1a9cd9ac, 0x186c6ddd, 0x163a1a7e, 0x14060b68, 0x11d06c97, 0xf996a26, 0xd61304e, 0xb27eb5c, 0x8edc7b7, 0x6b2f1d2, 0x4779632, 0x23be165, }; /* * \par * Cosine Table is generated from following loop * <pre>for(i = 0; i < 360; i++) * { * cosTable[i]= cos((i-180) * PI/180.0); * } </pre> * \par * Convert above coefficients to fixed point 1.31 format. / static const int32_t cosTableQ31[360] = { 0x80000000, 0x8004fda0, 0x8013f61d, 0x802ce84c, 0x804fd23a, 0x807cb130, 0x80b381ac, 0x80f43f69, 0x813ee55b, 0x81936daf, 0x81f1d1ce, 0x825a0a5b, 0x82cc0f36, 0x8347d77b, 0x83cd5982, 0x845c8ae3, 0x84f56073, 0x8597ce46, 0x8643c7b3, 0x86f93f50, 0x87b826f7, 0x88806fc4, 0x89520a1a, 0x8a2ce59f, 0x8b10f144, 0x8bfe1b3f, 0x8cf45113, 0x8df37f8b, 0x8efb92c2, 0x900c7621, 0x9126145f, 0x92485786, 0x937328f5, 0x94a6715d, 0x95e218c9, 0x9726069c, 0x98722192, 0x99c64fc5, 0x9b2276b0, 0x9c867b2c, 0x9df24175, 0x9f65ad2d, 0xa0e0a15f, 0xa263007d, 0xa3ecac65, 0xa57d8666, 0xa7156f3c, 0xa8b4471a, 0xaa59eda4, 0xac0641fb, 0xadb922b7, 0xaf726def, 0xb1320139, 0xb2f7b9af, 0xb4c373ee, 0xb6950c1e, 0xb86c5df0, 0xba4944a2, 0xbc2b9b05, 0xbe133b7c, 0xc0000000, 0xc1f1c224, 0xc3e85b18, 0xc5e3a3a9, 0xc7e3744b, 0xc9e7a512, 0xcbf00dbe, 0xcdfc85bb, 0xd00ce422, 0xd220ffc0, 0xd438af17, 0xd653c860, 0xd8722192, 0xda939061, 0xdcb7ea46, 0xdedf047d, 0xe108b40d, 0xe334cdc9, 0xe5632654, 0xe7939223, 0xe9c5e582, 0xebf9f498, 0xee2f9369, 0xf06695da, 0xf29ecfb2, 0xf4d814a4, 0xf7123849, 0xf94d0e2e, 0xfb8869ce, 0xfdc41e9b, 0x0, 0x23be165, 0x4779632, 0x6b2f1d2, 0x8edc7b7, 0xb27eb5c, 0xd61304e, 0xf996a26, 0x11d06c97, 0x14060b68, 0x163a1a7e, 0x186c6ddd, 0x1a9cd9ac, 0x1ccb3237, 0x1ef74bf3, 0x2120fb83, 0x234815ba, 0x256c6f9f, 0x278dde6e, 0x29ac37a0, 0x2bc750e9, 0x2ddf0040, 0x2ff31bde, 0x32037a45, 0x340ff242, 0x36185aee, 0x381c8bb5, 0x3a1c5c57, 0x3c17a4e8, 0x3e0e3ddc, 0x40000000, 0x41ecc484, 0x43d464fb, 0x45b6bb5e, 0x4793a210, 0x496af3e2, 0x4b3c8c12, 0x4d084651, 0x4ecdfec7, 0x508d9211, 0x5246dd49, 0x53f9be05, 0x55a6125c, 0x574bb8e6, 0x58ea90c4, 0x5a82799a, 0x5c13539b, 0x5d9cff83, 0x5f1f5ea1, 0x609a52d3, 0x620dbe8b, 0x637984d4, 0x64dd8950, 0x6639b03b, 0x678dde6e, 0x68d9f964, 0x6a1de737, 0x6b598ea3, 0x6c8cd70b, 0x6db7a87a, 0x6ed9eba1, 0x6ff389df, 0x71046d3e, 0x720c8075, 0x730baeed, 0x7401e4c1, 0x74ef0ebc, 0x75d31a61, 0x76adf5e6, 0x777f903c, 0x7847d909, 0x7906c0b0, 0x79bc384d, 0x7a6831ba, 0x7b0a9f8d, 0x7ba3751d, 0x7c32a67e, 0x7cb82885, 0x7d33f0ca, 0x7da5f5a5, 0x7e0e2e32, 0x7e6c9251, 0x7ec11aa5, 0x7f0bc097, 0x7f4c7e54, 0x7f834ed0, 0x7fb02dc6, 0x7fd317b4, 0x7fec09e3, 0x7ffb0260, 0x7fffffff, 0x7ffb0260, 0x7fec09e3, 0x7fd317b4, 0x7fb02dc6, 0x7f834ed0, 0x7f4c7e54, 0x7f0bc097, 0x7ec11aa5, 0x7e6c9251, 0x7e0e2e32, 0x7da5f5a5, 0x7d33f0ca, 0x7cb82885, 0x7c32a67e, 0x7ba3751d, 0x7b0a9f8d, 0x7a6831ba, 0x79bc384d, 0x7906c0b0, 0x7847d909, 0x777f903c, 0x76adf5e6, 0x75d31a61, 0x74ef0ebc, 0x7401e4c1, 0x730baeed, 0x720c8075, 0x71046d3e, 0x6ff389df, 0x6ed9eba1, 0x6db7a87a, 0x6c8cd70b, 0x6b598ea3, 0x6a1de737, 0x68d9f964, 0x678dde6e, 0x6639b03b, 0x64dd8950, 0x637984d4, 0x620dbe8b, 0x609a52d3, 0x5f1f5ea1, 0x5d9cff83, 0x5c13539b, 0x5a82799a, 0x58ea90c4, 0x574bb8e6, 0x55a6125c, 0x53f9be05, 0x5246dd49, 0x508d9211, 0x4ecdfec7, 0x4d084651, 0x4b3c8c12, 0x496af3e2, 0x4793a210, 0x45b6bb5e, 0x43d464fb, 0x41ecc484, 0x40000000, 0x3e0e3ddc, 0x3c17a4e8, 0x3a1c5c57, 0x381c8bb5, 0x36185aee, 0x340ff242, 0x32037a45, 0x2ff31bde, 0x2ddf0040, 0x2bc750e9, 0x29ac37a0, 0x278dde6e, 0x256c6f9f, 0x234815ba, 0x2120fb83, 0x1ef74bf3, 0x1ccb3237, 0x1a9cd9ac, 0x186c6ddd, 0x163a1a7e, 0x14060b68, 0x11d06c97, 0xf996a26, 0xd61304e, 0xb27eb5c, 0x8edc7b7, 0x6b2f1d2, 0x4779632, 0x23be165, 0x0, 0xfdc41e9b, 0xfb8869ce, 0xf94d0e2e, 0xf7123849, 0xf4d814a4, 0xf29ecfb2, 0xf06695da, 0xee2f9369, 0xebf9f498, 0xe9c5e582, 0xe7939223, 0xe5632654, 0xe334cdc9, 0xe108b40d, 0xdedf047d, 0xdcb7ea46, 0xda939061, 0xd8722192, 0xd653c860, 0xd438af17, 0xd220ffc0, 0xd00ce422, 0xcdfc85bb, 0xcbf00dbe, 0xc9e7a512, 0xc7e3744b, 0xc5e3a3a9, 0xc3e85b18, 0xc1f1c224, 0xc0000000, 0xbe133b7c, 0xbc2b9b05, 0xba4944a2, 0xb86c5df0, 0xb6950c1e, 0xb4c373ee, 0xb2f7b9af, 0xb1320139, 0xaf726def, 0xadb922b7, 0xac0641fb, 0xaa59eda4, 0xa8b4471a, 0xa7156f3c, 0xa57d8666, 0xa3ecac65, 0xa263007d, 0xa0e0a15f, 0x9f65ad2d, 0x9df24175, 0x9c867b2c, 0x9b2276b0, 0x99c64fc5, 0x98722192, 0x9726069c, 0x95e218c9, 0x94a6715d, 0x937328f5, 0x92485786, 0x9126145f, 0x900c7621, 0x8efb92c2, 0x8df37f8b, 0x8cf45113, 0x8bfe1b3f, 0x8b10f144, 0x8a2ce59f, 0x89520a1a, 0x88806fc4, 0x87b826f7, 0x86f93f50, 0x8643c7b3, 0x8597ce46, 0x84f56073, 0x845c8ae3, 0x83cd5982, 0x8347d77b, 0x82cc0f36, 0x825a0a5b, 0x81f1d1ce, 0x81936daf, 0x813ee55b, 0x80f43f69, 0x80b381ac, 0x807cb130, 0x804fd23a, 0x802ce84c, 0x8013f61d, 0x8004fda0, }; /* * @brief Q31 sin_cos function. * @param[in] theta scaled input value in degrees * @param[out] pSinVal points to the processed sine output. @param[out] pCosVal points to the processed cosine output. @return none. * * The Q31 input value is in the range [-1 +1) and is mapped to a degree value in the range [-180 180). * / void arm_sin_cos_q31( q31_t theta, q31_t pSinVal, q31_t * pCosVal) { q31_t x0; /* Nearest input value / q31_t y0, y1; / Nearest output values / q31_t xSpacing = INPUT_SPACING; / Spaing between inputs / uint32_t i; / Index / q31_t oneByXSpacing; / 1/ xSpacing value / q31_t out; / temporary variable / uint32_t sign_bits; / No.of sign bits / uint32_t firstX = 0x80000000; / First X value / / Calculation of index / i = ((uint32_t) theta - firstX) / (uint32_t) xSpacing; / Calculation of first nearest input value / x0 = (q31_t) firstX + ((q31_t) i xSpacing); /* Reading nearest sine output values from table / y0 = sinTableQ31[i]; y1 = sinTableQ31[i + 1u]; / Calculation of 1/(x1-x0) / / (x1-x0) is xSpacing which is fixed value / sign_bits = 8u; oneByXSpacing = 0x5A000000; / Calculation of (theta - x0)/(x1-x0) / out = (((q31_t) (((q63_t) (theta - x0) oneByXSpacing) >> 32)) << sign_bits); /* Calculation of y0 + (y1 - y0) * ((theta - x0)/(x1-x0)) / pSinVal = y0 + ((q31_t) (((q63_t) (y1 - y0) * out) >> 30)); /* Reading nearest cosine output values from table / y0 = cosTableQ31[i]; y1 = cosTableQ31[i + 1u]; / Calculation of y0 + (y1 - y0) * ((theta - x0)/(x1-x0)) / pCosVal = y0 + ((q31_t) (((q63_t) (y1 - y0) * out) >> 30)); } /** * @} end of SinCos group */	1137519-player	lib/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_sin_cos_q31.c	C	lgpl	12,848
/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_pid_init_f32.c * * Description: Floating-point PID Control initialization function * * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * ------------------------------------------------------------------- / #include "arm_math.h" /* * @addtogroup PID * @{ / /* * @brief Initialization function for the floating-point PID Control. * @param[in,out] S points to an instance of the PID structure. @param[in] resetStateFlag flag to reset the state. 0 = no change in state & 1 = reset the state. * @return none. * \par Description: * \par * The <code>resetStateFlag</code> specifies whether to set state to zero or not. \n * The function computes the structure fields: <code>A0</code>, <code>A1</code> <code>A2</code> * using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd) * also sets the state variables to all zeros. / void arm_pid_init_f32( arm_pid_instance_f32 S, int32_t resetStateFlag) { /* Derived coefficient A0 / S->A0 = S->Kp + S->Ki + S->Kd; / Derived coefficient A1 / S->A1 = (-S->Kp) - ((float32_t) 2.0 S->Kd); /* Derived coefficient A2 / S->A2 = S->Kd; / Check whether state needs reset or not / if(resetStateFlag) { / Clear the state buffer. The size will be always 3 samples / memset(S->state, 0, 3u sizeof(float32_t)); } } /** * @} end of PID group */	1137519-player	lib/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_f32.c	C	lgpl	2,240
/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_pid_reset_q15.c * * Description: Q15 PID Control reset function * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * -------------------------------------------------------------------- / #include "arm_math.h" /* * @addtogroup PID * @{ / /* * @brief Reset function for the Q15 PID Control. * @param[in] S Instance pointer of PID control data structure. @return none. * \par Description: * The function resets the state buffer to zeros. / void arm_pid_reset_q15( arm_pid_instance_q15 S) { /* Reset state to zero, The size will be always 3 samples / memset(S->state, 0, 3u sizeof(q15_t)); } /** * @} end of PID group */	1137519-player	lib/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q15.c	C	lgpl	1,462
/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_mat_mult_fast_q31.c * * Description: Q31 matrix multiplication (fast variant). * * Target Processor: Cortex-M4/Cortex-M3 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * -------------------------------------------------------------------- / #include "arm_math.h" /* * @ingroup groupMatrix / /* * @addtogroup MatrixMult * @{ / /* * @brief Q31 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4 * @param[in] pSrcA points to the first input matrix structure @param[in] pSrcB points to the second input matrix structure @param[out] pDst points to output matrix structure @return The function returns either * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking. * * @details * <b>Scaling and Overflow Behavior:</b> * * \par * The difference between the function arm_mat_mult_q31() and this fast variant is that * the fast variant use a 32-bit rather than a 64-bit accumulator. * The result of each 1.31 x 1.31 multiplication is truncated to * 2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30 * format. Finally, the accumulator is saturated and converted to a 1.31 result. * * \par * The fast version has the same overflow behavior as the standard version but provides * less precision since it discards the low 32 bits of each multiplication result. * In order to avoid overflows completely the input signals must be scaled down. * Scale down one of the input matrices by log2(numColsA) bits to * avoid overflows, as a total of numColsA additions are computed internally for each * output element. * * \par * See <code>arm_mat_mult_q31()</code> for a slower implementation of this function * which uses 64-bit accumulation to provide higher precision. / arm_status arm_mat_mult_fast_q31( const arm_matrix_instance_q31 pSrcA, const arm_matrix_instance_q31 * pSrcB, arm_matrix_instance_q31 * pDst) { q31_t pIn1 = pSrcA->pData; / input data matrix pointer A / q31_t pIn2 = pSrcB->pData; /* input data matrix pointer B / q31_t pInA = pSrcA->pData; /* input data matrix pointer A / // q31_t pSrcB = pSrcB->pData; /* input data matrix pointer B / q31_t pOut = pDst->pData; /* output data matrix pointer / q31_t px; /* Temporary output data matrix pointer / q31_t sum; / Accumulator / uint16_t numRowsA = pSrcA->numRows; / number of rows of input matrix A / uint16_t numColsB = pSrcB->numCols; / number of columns of input matrix B / uint16_t numColsA = pSrcA->numCols; / number of columns of input matrix A / uint16_t col, i = 0u, j, row = numRowsA, colCnt; / loop counters / arm_status status; / status of matrix multiplication / #ifdef ARM_MATH_MATRIX_CHECK / Check for matrix mismatch condition / if((pSrcA->numCols != pSrcB->numRows) \|\| (pSrcA->numRows != pDst->numRows) \|\| (pSrcB->numCols != pDst->numCols)) { / Set status as ARM_MATH_SIZE_MISMATCH / status = ARM_MATH_SIZE_MISMATCH; } else #endif / #ifdef ARM_MATH_MATRIX_CHECK / { / The following loop performs the dot-product of each row in pSrcA with each column in pSrcB / / row loop / do { / Output pointer is set to starting address of the row being processed / px = pOut + i; / For every row wise process, the column loop counter is to be initiated / col = numColsB; / For every row wise process, the pIn2 pointer is set ** to the starting address of the pSrcB data / pIn2 = pSrcB->pData; j = 0u; / column loop / do { / Set the variable sum, that acts as accumulator, to zero / sum = 0; / Initiate the pointer pIn1 to point to the starting address of pInA / pIn1 = pInA; / Apply loop unrolling and compute 4 MACs simultaneously. / colCnt = numColsA >> 2; / matrix multiplication / while(colCnt > 0u) { / c(m,n) = a(1,1)b(1,1) + a(1,2) b(2,1) + .... + a(m,p)b(p,n) / /* Perform the multiply-accumulates / sum = (q31_t) ((((q63_t) sum << 32) + ((q63_t) pIn1++ * (pIn2))) >> 32); pIn2 += numColsB; sum = (q31_t) ((((q63_t) sum << 32) + ((q63_t) pIn1++ * (pIn2))) >> 32); pIn2 += numColsB; sum = (q31_t) ((((q63_t) sum << 32) + ((q63_t) pIn1++ * (pIn2))) >> 32); pIn2 += numColsB; sum = (q31_t) ((((q63_t) sum << 32) + ((q63_t) pIn1++ * (pIn2))) >> 32); pIn2 += numColsB; / Decrement the loop counter / colCnt--; } / If the columns of pSrcA is not a multiple of 4, compute any remaining output samples here. ** No loop unrolling is used. / colCnt = numColsA % 0x4u; while(colCnt > 0u) { / c(m,n) = a(1,1)b(1,1) + a(1,2) b(2,1) + .... + a(m,p)b(p,n) / /* Perform the multiply-accumulates / sum = (q31_t) ((((q63_t) sum << 32) + ((q63_t) pIn1++ * (pIn2))) >> 32); pIn2 += numColsB; / Decrement the loop counter / colCnt--; } / Convert the result from 2.30 to 1.31 format and store in destination buffer / px++ = sum << 1; /* Update the pointer pIn2 to point to the starting address of the next column / j++; pIn2 = pSrcB->pData + j; / Decrement the column loop counter / col--; } while(col > 0u); / Update the pointer pInA to point to the starting address of the next row / i = i + numColsB; pInA = pInA + numColsA; / Decrement the row loop counter / row--; } while(row > 0u); / set status as ARM_MATH_SUCCESS / status = ARM_MATH_SUCCESS; } / Return to application / return (status); } /* * @} end of MatrixMult group */	1137519-player	lib/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_fast_q31.c	C	lgpl	7,318
/* ---------------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_mat_init_f32.c * * Description: Floating-point matrix initialization. * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * * Version 0.0.5 2010/04/26 * incorporated review comments and updated with latest CMSIS layer * * Version 0.0.3 2010/03/10 * Initial version * -------------------------------------------------------------------------- / #include "arm_math.h" /* * @ingroup groupMatrix / /* * @defgroup MatrixInit Matrix Initialization * * Initializes the underlying matrix data structure. * The functions set the <code>numRows</code>, * <code>numCols</code>, and <code>pData</code> fields * of the matrix data structure. / /* * @addtogroup MatrixInit * @{ / /* * @brief Floating-point matrix initialization. * @param[in,out] S points to an instance of the floating-point matrix structure. @param[in] nRows number of rows in the matrix. * @param[in] nColumns number of columns in the matrix. * @param[in] pData points to the matrix data array. @return none / void arm_mat_init_f32( arm_matrix_instance_f32 S, uint16_t nRows, uint16_t nColumns, float32_t * pData) { /* Assign Number of Rows / S->numRows = nRows; / Assign Number of Columns / S->numCols = nColumns; / Assign Data pointer / S->pData = pData; } /* * @} end of MatrixInit group */	1137519-player	lib/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_f32.c	C	lgpl	2,299
/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_mat_add_q31.c * * Description: Q31 matrix addition * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * * Version 0.0.5 2010/04/26 * incorporated review comments and updated with latest CMSIS layer * * Version 0.0.3 2010/03/10 * Initial version * -------------------------------------------------------------------- / #include "arm_math.h" /* * @ingroup groupMatrix / /* * @addtogroup MatrixAdd * @{ / /* * @brief Q31 matrix addition. * @param[in] pSrcA points to the first input matrix structure @param[in] pSrcB points to the second input matrix structure @param[out] pDst points to output matrix structure @return The function returns either * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking. * * <b>Scaling and Overflow Behavior:</b> * \par * The function uses saturating arithmetic. * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated. / arm_status arm_mat_add_q31( const arm_matrix_instance_q31 pSrcA, const arm_matrix_instance_q31 * pSrcB, arm_matrix_instance_q31 * pDst) { q31_t pIn1 = pSrcA->pData; / input data matrix pointer A / q31_t pIn2 = pSrcB->pData; /* input data matrix pointer B / q31_t pOut = pDst->pData; /* output data matrix pointer / uint32_t numSamples; / total number of elements in the matrix / uint32_t blkCnt; / loop counters / arm_status status; / status of matrix addition / #ifdef ARM_MATH_MATRIX_CHECK / Check for matrix mismatch condition / if((pSrcA->numRows != pSrcB->numRows) \|\| (pSrcA->numCols != pSrcB->numCols) \|\| (pSrcA->numRows != pDst->numRows) \|\| (pSrcA->numCols != pDst->numCols)) { / Set status as ARM_MATH_SIZE_MISMATCH / status = ARM_MATH_SIZE_MISMATCH; } else #endif / #ifdef ARM_MATH_MATRIX_CHECK / { / Total number of samples in the input matrix / numSamples = (uint32_t) pSrcA->numRows pSrcA->numCols; #ifndef ARM_MATH_CM0 /* Run the below code for Cortex-M4 and Cortex-M3 / / Loop Unrolling / blkCnt = numSamples >> 2u; / First part of the processing with loop unrolling. Compute 4 outputs at a time. ** a second loop below computes the remaining 1 to 3 samples. / while(blkCnt > 0u) { / C(m,n) = A(m,n) + B(m,n) / / Add, saturate and then store the results in the destination buffer. / pOut++ = __QADD(pIn1++, pIn2++); pOut++ = __QADD(pIn1++, pIn2++); pOut++ = __QADD(pIn1++, pIn2++); pOut++ = __QADD(pIn1++, pIn2++); / Decrement the loop counter / blkCnt--; } / If the numSamples is not a multiple of 4, compute any remaining output samples here. ** No loop unrolling is used. / blkCnt = numSamples % 0x4u; while(blkCnt > 0u) { / C(m,n) = A(m,n) + B(m,n) / / Add, saturate and then store the results in the destination buffer. / pOut++ = __QADD(pIn1++, pIn2++); /* Decrement the loop counter / blkCnt--; } #else / Run the below code for Cortex-M0 / / Initialize blkCnt with number of samples / blkCnt = numSamples; while(blkCnt > 0u) { / C(m,n) = A(m,n) + B(m,n) / / Add, saturate and then store the results in the destination buffer. / pOut++ = clip_q63_to_q31(((q63_t) (pIn1++)) + (pIn2++)); /* Decrement the loop counter / blkCnt--; } #endif / #ifndef ARM_MATH_CM0 / / set status as ARM_MATH_SUCCESS / status = ARM_MATH_SUCCESS; } / Return to application / return (status); } /* * @} end of MatrixAdd group */	1137519-player	lib/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_q31.c	C	lgpl	4,813
/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_mat_sub_q31.c * * Description: Q31 matrix subtraction * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * * Version 0.0.5 2010/04/26 * incorporated review comments and updated with latest CMSIS layer * * Version 0.0.3 2010/03/10 * Initial version * -------------------------------------------------------------------- / #include "arm_math.h" /* * @ingroup groupMatrix / /* * @addtogroup MatrixSub * @{ / /* * @brief Q31 matrix subtraction. * @param[in] pSrcA points to the first input matrix structure @param[in] pSrcB points to the second input matrix structure @param[out] pDst points to output matrix structure @return The function returns either * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking. * * <b>Scaling and Overflow Behavior:</b> * \par * The function uses saturating arithmetic. * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated. / arm_status arm_mat_sub_q31( const arm_matrix_instance_q31 pSrcA, const arm_matrix_instance_q31 * pSrcB, arm_matrix_instance_q31 * pDst) { q31_t pIn1 = pSrcA->pData; / input data matrix pointer A / q31_t pIn2 = pSrcB->pData; /* input data matrix pointer B / q31_t pOut = pDst->pData; /* output data matrix pointer / uint32_t numSamples; / total number of elements in the matrix / uint32_t blkCnt; / loop counters / arm_status status; / status of matrix subtraction / #ifdef ARM_MATH_MATRIX_CHECK / Check for matrix mismatch condition / if((pSrcA->numRows != pSrcB->numRows) \|\| (pSrcA->numCols != pSrcB->numCols) \|\| (pSrcA->numRows != pDst->numRows) \|\| (pSrcA->numCols != pDst->numCols)) { / Set status as ARM_MATH_SIZE_MISMATCH / status = ARM_MATH_SIZE_MISMATCH; } else #endif / #ifdef ARM_MATH_MATRIX_CHECK / { / Total number of samples in the input matrix / numSamples = (uint32_t) pSrcA->numRows pSrcA->numCols; #ifndef ARM_MATH_CM0 /* Run the below code for Cortex-M4 and Cortex-M3 / / Loop Unrolling / blkCnt = numSamples >> 2u; / First part of the processing with loop unrolling. Compute 4 outputs at a time. ** a second loop below computes the remaining 1 to 3 samples. / while(blkCnt > 0u) { / C(m,n) = A(m,n) - B(m,n) / / Subtract, saturate and then store the results in the destination buffer. / pOut++ = __QSUB(pIn1++, pIn2++); pOut++ = __QSUB(pIn1++, pIn2++); pOut++ = __QSUB(pIn1++, pIn2++); pOut++ = __QSUB(pIn1++, pIn2++); / Decrement the loop counter / blkCnt--; } / If the numSamples is not a multiple of 4, compute any remaining output samples here. ** No loop unrolling is used. / blkCnt = numSamples % 0x4u; while(blkCnt > 0u) { / C(m,n) = A(m,n) - B(m,n) / / Subtract, saturate and then store the results in the destination buffer. / pOut++ = __QSUB(pIn1++, pIn2++); /* Decrement the loop counter / blkCnt--; } #else / Run the below code for Cortex-M0 / / Initialize blkCnt with number of samples / blkCnt = numSamples; while(blkCnt > 0u) { / C(m,n) = A(m,n) - B(m,n) / / Subtract, saturate and then store the results in the destination buffer. / pOut++ = clip_q63_to_q31(((q63_t) (pIn1++)) - (pIn2++)); /* Decrement the loop counter / blkCnt--; } #endif / #ifndef ARM_MATH_CM0 / / Set status as ARM_MATH_SUCCESS / status = ARM_MATH_SUCCESS; } / Return to application / return (status); } /* * @} end of MatrixSub group */	1137519-player	lib/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_q31.c	C	lgpl	4,840
/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_mat_scale_f32.c * * Description: Multiplies a floating-point matrix by a scalar. * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * * Version 0.0.5 2010/04/26 * incorporated review comments and updated with latest CMSIS layer * * Version 0.0.3 2010/03/10 * Initial version * -------------------------------------------------------------------- / #include "arm_math.h" /* * @ingroup groupMatrix / /* * @defgroup MatrixScale Matrix Scale * * Multiplies a matrix by a scalar. This is accomplished by multiplying each element in the * matrix by the scalar. For example: * \image html MatrixScale.gif "Matrix Scaling of a 3 x 3 matrix" * * The function checks to make sure that the input and output matrices are of the same size. * * In the fixed-point Q15 and Q31 functions, <code>scale</code> is represented by * a fractional multiplication <code>scaleFract</code> and an arithmetic shift <code>shift</code>. * The shift allows the gain of the scaling operation to exceed 1.0. * The overall scale factor applied to the fixed-point data is * <pre> * scale = scaleFract * 2^shift. * </pre> / /* * @addtogroup MatrixScale * @{ / /* * @brief Floating-point matrix scaling. * @param[in] pSrc points to input matrix structure @param[in] scale scale factor to be applied * @param[out] pDst points to output matrix structure @return The function returns either <code>ARM_MATH_SIZE_MISMATCH</code> * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking. * / arm_status arm_mat_scale_f32( const arm_matrix_instance_f32 pSrc, float32_t scale, arm_matrix_instance_f32 * pDst) { float32_t pIn = pSrc->pData; / input data matrix pointer / float32_t pOut = pDst->pData; /* output data matrix pointer / uint32_t numSamples; / total number of elements in the matrix / uint32_t blkCnt; / loop counters / arm_status status; / status of matrix scaling / #ifdef ARM_MATH_MATRIX_CHECK / Check for matrix mismatch condition / if((pSrc->numRows != pDst->numRows) \|\| (pSrc->numCols != pDst->numCols)) { / Set status as ARM_MATH_SIZE_MISMATCH / status = ARM_MATH_SIZE_MISMATCH; } else #endif / #ifdef ARM_MATH_MATRIX_CHECK / { / Total number of samples in the input matrix / numSamples = (uint32_t) pSrc->numRows pSrc->numCols; #ifndef ARM_MATH_CM0 /* Run the below code for Cortex-M4 and Cortex-M3 / / Loop Unrolling / blkCnt = numSamples >> 2; / First part of the processing with loop unrolling. Compute 4 outputs at a time. ** a second loop below computes the remaining 1 to 3 samples. / while(blkCnt > 0u) { / C(m,n) = A(m,n) * scale / / Scaling and results are stored in the destination buffer. / pOut++ = (pIn++) scale; pOut++ = (pIn++) * scale; pOut++ = (pIn++) * scale; pOut++ = (pIn++) * scale; /* Decrement the numSamples loop counter / blkCnt--; } / If the numSamples is not a multiple of 4, compute any remaining output samples here. ** No loop unrolling is used. / blkCnt = numSamples % 0x4u; #else / Run the below code for Cortex-M0 / / Initialize blkCnt with number of samples / blkCnt = numSamples; #endif / #ifndef ARM_MATH_CM0 / while(blkCnt > 0u) { / C(m,n) = A(m,n) * scale / / The results are stored in the destination buffer. / pOut++ = (pIn++) scale; /* Decrement the loop counter / blkCnt--; } / Set status as ARM_MATH_SUCCESS / status = ARM_MATH_SUCCESS; } / Return to application / return (status); } /* * @} end of MatrixScale group */	1137519-player	lib/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_f32.c	C	lgpl	4,871
/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_mat_scale_q31.c * * Description: Multiplies a Q31 matrix by a scalar. * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * * Version 0.0.5 2010/04/26 * incorporated review comments and updated with latest CMSIS layer * * Version 0.0.3 2010/03/10 * Initial version * -------------------------------------------------------------------- / #include "arm_math.h" /* * @ingroup groupMatrix / /* * @addtogroup MatrixScale * @{ / /* * @brief Q31 matrix scaling. * @param[in] pSrc points to input matrix @param[in] scaleFract fractional portion of the scale factor * @param[in] shift number of bits to shift the result by * @param[out] pDst points to output matrix structure @return The function returns either * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking. * * @details * <b>Scaling and Overflow Behavior:</b> * \par * The input data <code>pSrc</code> and <code>scaleFract</code> are in 1.31 format. These are multiplied to yield a 2.62 intermediate result and this is shifted with saturation to 1.31 format. / arm_status arm_mat_scale_q31( const arm_matrix_instance_q31 pSrc, q31_t scaleFract, int32_t shift, arm_matrix_instance_q31 * pDst) { q31_t pIn = pSrc->pData; / input data matrix pointer / q31_t pOut = pDst->pData; /* output data matrix pointer / q63_t out; / temporary variable to hold output value / uint32_t numSamples; / total number of elements in the matrix / int32_t totShift = 31 - shift; / shift to apply after scaling / uint32_t blkCnt; / loop counters / arm_status status; / status of matrix scaling / #ifdef ARM_MATH_MATRIX_CHECK / Check for matrix mismatch / if((pSrc->numRows != pDst->numRows) \|\| (pSrc->numCols != pDst->numCols)) { / Set status as ARM_MATH_SIZE_MISMATCH / status = ARM_MATH_SIZE_MISMATCH; } else #endif / #ifdef ARM_MATH_MATRIX_CHECK / { / Total number of samples in the input matrix / numSamples = (uint32_t) pSrc->numRows pSrc->numCols; #ifndef ARM_MATH_CM0 /* Run the below code for Cortex-M4 and Cortex-M3 / / Loop Unrolling / blkCnt = numSamples >> 2u; / First part of the processing with loop unrolling. Compute 4 outputs at a time. ** a second loop below computes the remaining 1 to 3 samples. / while(blkCnt > 0u) { / C(m,n) = A(m,n) * k / / Scale, saturate and then store the results in the destination buffer. / out = ((q63_t) pIn++ * scaleFract) >> totShift; pOut++ = clip_q63_to_q31(out); out = ((q63_t) pIn++ * scaleFract) >> totShift; pOut++ = clip_q63_to_q31(out); out = ((q63_t) pIn++ * scaleFract) >> totShift; pOut++ = clip_q63_to_q31(out); out = ((q63_t) pIn++ * scaleFract) >> totShift; pOut++ = clip_q63_to_q31(out); / Decrement the numSamples loop counter / blkCnt--; } / If the numSamples is not a multiple of 4, compute any remaining output samples here. ** No loop unrolling is used. / blkCnt = numSamples % 0x4u; #else / Run the below code for Cortex-M0 / / Initialize blkCnt with number of samples / blkCnt = numSamples; #endif / #ifndef ARM_MATH_CM0 / while(blkCnt > 0u) { / C(m,n) = A(m,n) * k / / Scale, saturate and then store the results in the destination buffer. / out = ((q63_t) pIn++ * scaleFract) >> totShift; pOut++ = clip_q63_to_q31(out); / Decrement the numSamples loop counter / blkCnt--; } / Set status as ARM_MATH_SUCCESS / status = ARM_MATH_SUCCESS; } / Return to application / return (status); } /* * @} end of MatrixScale group */	1137519-player	lib/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_q31.c	C	lgpl	4,949
/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_mat_sub_f32.c * * Description: Floating-point matrix subtraction. * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * * Version 0.0.5 2010/04/26 * incorporated review comments and updated with latest CMSIS layer * * Version 0.0.3 2010/03/10 * Initial version * -------------------------------------------------------------------- / #include "arm_math.h" /* * @ingroup groupMatrix / /* * @defgroup MatrixSub Matrix Subtraction * * Subtract two matrices. * \image html MatrixSubtraction.gif "Subraction of two 3 x 3 matrices" * * The functions check to make sure that * <code>pSrcA</code>, <code>pSrcB</code>, and <code>pDst</code> have the same * number of rows and columns. / /* * @addtogroup MatrixSub * @{ / /* * @brief Floating-point matrix subtraction * @param[in] pSrcA points to the first input matrix structure @param[in] pSrcB points to the second input matrix structure @param[out] pDst points to output matrix structure @return The function returns either * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking. / arm_status arm_mat_sub_f32( const arm_matrix_instance_f32 pSrcA, const arm_matrix_instance_f32 * pSrcB, arm_matrix_instance_f32 * pDst) { float32_t pIn1 = pSrcA->pData; / input data matrix pointer A / float32_t pIn2 = pSrcB->pData; /* input data matrix pointer B / float32_t pOut = pDst->pData; /* output data matrix pointer / uint32_t numSamples; / total number of elements in the matrix / uint32_t blkCnt; / loop counters / arm_status status; / status of matrix subtraction / #ifdef ARM_MATH_MATRIX_CHECK / Check for matrix mismatch condition / if((pSrcA->numRows != pSrcB->numRows) \|\| (pSrcA->numCols != pSrcB->numCols) \|\| (pSrcA->numRows != pDst->numRows) \|\| (pSrcA->numCols != pDst->numCols)) { / Set status as ARM_MATH_SIZE_MISMATCH / status = ARM_MATH_SIZE_MISMATCH; } else #endif / #ifdef ARM_MATH_MATRIX_CHECK / { / Total number of samples in the input matrix / numSamples = (uint32_t) pSrcA->numRows pSrcA->numCols; #ifndef ARM_MATH_CM0 /* Run the below code for Cortex-M4 and Cortex-M3 / / Loop Unrolling / blkCnt = numSamples >> 2u; / First part of the processing with loop unrolling. Compute 4 outputs at a time. ** a second loop below computes the remaining 1 to 3 samples. / while(blkCnt > 0u) { / C(m,n) = A(m,n) - B(m,n) / / Subtract and then store the results in the destination buffer. / pOut++ = (pIn1++) - (pIn2++); pOut++ = (pIn1++) - (pIn2++); pOut++ = (pIn1++) - (pIn2++); pOut++ = (pIn1++) - (pIn2++); / Decrement the loop counter / blkCnt--; } / If the numSamples is not a multiple of 4, compute any remaining output samples here. ** No loop unrolling is used. / blkCnt = numSamples % 0x4u; #else / Run the below code for Cortex-M0 / / Initialize blkCnt with number of samples / blkCnt = numSamples; #endif / #ifndef ARM_MATH_CM0 / while(blkCnt > 0u) { / C(m,n) = A(m,n) - B(m,n) / / Subtract and then store the results in the destination buffer. / pOut++ = (pIn1++) - (pIn2++); /* Decrement the loop counter / blkCnt--; } / Set status as ARM_MATH_SUCCESS / status = ARM_MATH_SUCCESS; } / Return to application / return (status); } /* * @} end of MatrixSub group */	1137519-player	lib/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_f32.c	C	lgpl	4,670
/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_mat_inverse_f32.c * * Description: Floating-point matrix inverse. * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * -------------------------------------------------------------------- / #include "arm_math.h" /* * @ingroup groupMatrix / /* * @defgroup MatrixInv Matrix Inverse * * Computes the inverse of a matrix. * * The inverse is defined only if the input matrix is square and non-singular (the determinant * is non-zero). The function checks that the input and output matrices are square and of the * same size. * * Matrix inversion is numerically sensitive and the CMSIS DSP library only supports matrix * inversion of floating-point matrices. * * \par Algorithm * The Gauss-Jordan method is used to find the inverse. * The algorithm performs a sequence of elementary row-operations till it * reduces the input matrix to an identity matrix. Applying the same sequence * of elementary row-operations to an identity matrix yields the inverse matrix. * If the input matrix is singular, then the algorithm terminates and returns error status * <code>ARM_MATH_SINGULAR</code>. * \image html MatrixInverse.gif "Matrix Inverse of a 3 x 3 matrix using Gauss-Jordan Method" / /* * @addtogroup MatrixInv * @{ / /* * @brief Floating-point matrix inverse. * @param[in] pSrc points to input matrix structure @param[out] pDst points to output matrix structure @return The function returns * <code>ARM_MATH_SIZE_MISMATCH</code> if the input matrix is not square or if the size * of the output matrix does not match the size of the input matrix. * If the input matrix is found to be singular (non-invertible), then the function returns * <code>ARM_MATH_SINGULAR</code>. Otherwise, the function returns <code>ARM_MATH_SUCCESS</code>. / arm_status arm_mat_inverse_f32( const arm_matrix_instance_f32 pSrc, arm_matrix_instance_f32 * pDst) { float32_t pIn = pSrc->pData; / input data matrix pointer / float32_t pOut = pDst->pData; /* output data matrix pointer / float32_t pInT1, pInT2; / Temporary input data matrix pointer / float32_t pInT3, pInT4; / Temporary output data matrix pointer / float32_t pPivotRowIn, pPRT_in, pPivotRowDst, pPRT_pDst; / Temporary input and output data matrix pointer / uint32_t numRows = pSrc->numRows; / Number of rows in the matrix / uint32_t numCols = pSrc->numCols; / Number of Cols in the matrix / #ifndef ARM_MATH_CM0 / Run the below code for Cortex-M4 and Cortex-M3 / float32_t Xchg, in = 0.0f, in1; / Temporary input values / uint32_t i, rowCnt, flag = 0u, j, loopCnt, k, l; / loop counters / arm_status status; / status of matrix inverse / #ifdef ARM_MATH_MATRIX_CHECK / Check for matrix mismatch condition / if((pSrc->numRows != pSrc->numCols) \|\| (pDst->numRows != pDst->numCols) \|\| (pSrc->numRows != pDst->numRows)) { / Set status as ARM_MATH_SIZE_MISMATCH / status = ARM_MATH_SIZE_MISMATCH; } else #endif / #ifdef ARM_MATH_MATRIX_CHECK / { /-------------------------------------------------------------------------------------------------------------- * Matrix Inverse can be solved using elementary row operations. * * Gauss-Jordan Method: * * 1. First combine the identity matrix and the input matrix separated by a bar to form an * augmented matrix as follows: * _ _ _ _ * \| a11 a12 \| 1 0 \| \| X11 X12 \| * \| \| \| = \| \| * \|_ a21 a22 \| 0 1 _\| \|_ X21 X21 _\| * * 2. In our implementation, pDst Matrix is used as identity matrix. * * 3. Begin with the first row. Let i = 1. * * 4. Check to see if the pivot for row i is zero. * The pivot is the element of the main diagonal that is on the current row. * For instance, if working with row i, then the pivot element is aii. * If the pivot is zero, exchange that row with a row below it that does not * contain a zero in column i. If this is not possible, then an inverse * to that matrix does not exist. * * 5. Divide every element of row i by the pivot. * * 6. For every row below and row i, replace that row with the sum of that row and * a multiple of row i so that each new element in column i below row i is zero. * * 7. Move to the next row and column and repeat steps 2 through 5 until you have zeros * for every element below and above the main diagonal. * * 8. Now an identical matrix is formed to the left of the bar(input matrix, pSrc). * Therefore, the matrix to the right of the bar is our solution(pDst matrix, pDst). ----------------------------------------------------------------------------------------------------------------/ /* Working pointer for destination matrix / pInT2 = pOut; / Loop over the number of rows / rowCnt = numRows; / Making the destination matrix as identity matrix / while(rowCnt > 0u) { / Writing all zeroes in lower triangle of the destination matrix / j = numRows - rowCnt; while(j > 0u) { pInT2++ = 0.0f; j--; } /* Writing all ones in the diagonal of the destination matrix / pInT2++ = 1.0f; /* Writing all zeroes in upper triangle of the destination matrix / j = rowCnt - 1u; while(j > 0u) { pInT2++ = 0.0f; j--; } /* Decrement the loop counter / rowCnt--; } / Loop over the number of columns of the input matrix. All the elements in each column are processed by the row operations / loopCnt = numCols; / Index modifier to navigate through the columns / l = 0u; while(loopCnt > 0u) { / Check if the pivot element is zero.. * If it is zero then interchange the row with non zero row below. * If there is no non zero element to replace in the rows below, * then the matrix is Singular. / / Working pointer for the input matrix that points * to the pivot element of the particular row / pInT1 = pIn + (l numCols); /* Working pointer for the destination matrix that points * to the pivot element of the particular row / pInT3 = pOut + (l numCols); /* Temporary variable to hold the pivot value / in = pInT1; /* Destination pointer modifier / k = 1u; / Check if the pivot element is zero / if(pInT1 == 0.0f) { /* Loop over the number rows present below / i = numRows - (l + 1u); while(i > 0u) { / Update the input and destination pointers / pInT2 = pInT1 + (numCols l); pInT4 = pInT3 + (numCols * k); /* Check if there is a non zero pivot element to * replace in the rows below / if(pInT2 != 0.0f) { /* Loop over number of columns * to the right of the pilot element / j = numCols - l; while(j > 0u) { / Exchange the row elements of the input matrix / Xchg = pInT2; pInT2++ = pInT1; pInT1++ = Xchg; / Decrement the loop counter / j--; } / Loop over number of columns of the destination matrix / j = numCols; while(j > 0u) { / Exchange the row elements of the destination matrix / Xchg = pInT4; pInT4++ = pInT3; pInT3++ = Xchg; / Decrement the loop counter / j--; } / Flag to indicate whether exchange is done or not / flag = 1u; / Break after exchange is done / break; } / Update the destination pointer modifier / k++; / Decrement the loop counter / i--; } } / Update the status if the matrix is singular / if((flag != 1u) && (in == 0.0f)) { status = ARM_MATH_SINGULAR; break; } / Points to the pivot row of input and destination matrices / pPivotRowIn = pIn + (l numCols); pPivotRowDst = pOut + (l * numCols); /* Temporary pointers to the pivot row pointers / pInT1 = pPivotRowIn; pInT2 = pPivotRowDst; / Pivot element of the row / in = (pIn + (l * numCols)); /* Loop over number of columns * to the right of the pilot element / j = (numCols - l); while(j > 0u) { / Divide each element of the row of the input matrix * by the pivot element / in1 = pInT1; pInT1++ = in1 / in; / Decrement the loop counter / j--; } / Loop over number of columns of the destination matrix / j = numCols; while(j > 0u) { / Divide each element of the row of the destination matrix * by the pivot element / in1 = pInT2; pInT2++ = in1 / in; / Decrement the loop counter / j--; } / Replace the rows with the sum of that row and a multiple of row i * so that each new element in column i above row i is zero./ / Temporary pointers for input and destination matrices / pInT1 = pIn; pInT2 = pOut; / index used to check for pivot element / i = 0u; / Loop over number of rows / / to be replaced by the sum of that row and a multiple of row i / k = numRows; while(k > 0u) { / Check for the pivot element / if(i == l) { / If the processing element is the pivot element, only the columns to the right are to be processed / pInT1 += numCols - l; pInT2 += numCols; } else { / Element of the reference row / in = pInT1; /* Working pointers for input and destination pivot rows / pPRT_in = pPivotRowIn; pPRT_pDst = pPivotRowDst; / Loop over the number of columns to the right of the pivot element, to replace the elements in the input matrix / j = (numCols - l); while(j > 0u) { / Replace the element by the sum of that row and a multiple of the reference row / in1 = pInT1; pInT1++ = in1 - (in pPRT_in++); / Decrement the loop counter / j--; } / Loop over the number of columns to replace the elements in the destination matrix / j = numCols; while(j > 0u) { / Replace the element by the sum of that row and a multiple of the reference row / in1 = pInT2; pInT2++ = in1 - (in pPRT_pDst++); / Decrement the loop counter / j--; } } / Increment the temporary input pointer / pInT1 = pInT1 + l; / Decrement the loop counter / k--; / Increment the pivot index / i++; } / Increment the input pointer / pIn++; / Decrement the loop counter / loopCnt--; / Increment the index modifier / l++; } #else / Run the below code for Cortex-M0 / float32_t Xchg, in = 0.0f; / Temporary input values / uint32_t i, rowCnt, flag = 0u, j, loopCnt, k, l; / loop counters / arm_status status; / status of matrix inverse / #ifdef ARM_MATH_MATRIX_CHECK / Check for matrix mismatch condition / if((pSrc->numRows != pSrc->numCols) \|\| (pDst->numRows != pDst->numCols) \|\| (pSrc->numRows != pDst->numRows)) { / Set status as ARM_MATH_SIZE_MISMATCH / status = ARM_MATH_SIZE_MISMATCH; } else #endif / #ifdef ARM_MATH_MATRIX_CHECK / { /-------------------------------------------------------------------------------------------------------------- * Matrix Inverse can be solved using elementary row operations. * * Gauss-Jordan Method: * * 1. First combine the identity matrix and the input matrix separated by a bar to form an * augmented matrix as follows: * _ _ _ _ _ _ _ _ * \| \| a11 a12 \| \| \| 1 0 \| \| \| X11 X12 \| * \| \| \| \| \| \| \| = \| \| * \|_ \|_ a21 a22 _\| \| \|_0 1 _\| _\| \|_ X21 X21 _\| * * 2. In our implementation, pDst Matrix is used as identity matrix. * * 3. Begin with the first row. Let i = 1. * * 4. Check to see if the pivot for row i is zero. * The pivot is the element of the main diagonal that is on the current row. * For instance, if working with row i, then the pivot element is aii. * If the pivot is zero, exchange that row with a row below it that does not * contain a zero in column i. If this is not possible, then an inverse * to that matrix does not exist. * * 5. Divide every element of row i by the pivot. * * 6. For every row below and row i, replace that row with the sum of that row and * a multiple of row i so that each new element in column i below row i is zero. * * 7. Move to the next row and column and repeat steps 2 through 5 until you have zeros * for every element below and above the main diagonal. * * 8. Now an identical matrix is formed to the left of the bar(input matrix, src). * Therefore, the matrix to the right of the bar is our solution(dst matrix, dst). ----------------------------------------------------------------------------------------------------------------/ /* Working pointer for destination matrix / pInT2 = pOut; / Loop over the number of rows / rowCnt = numRows; / Making the destination matrix as identity matrix / while(rowCnt > 0u) { / Writing all zeroes in lower triangle of the destination matrix / j = numRows - rowCnt; while(j > 0u) { pInT2++ = 0.0f; j--; } /* Writing all ones in the diagonal of the destination matrix / pInT2++ = 1.0f; /* Writing all zeroes in upper triangle of the destination matrix / j = rowCnt - 1u; while(j > 0u) { pInT2++ = 0.0f; j--; } /* Decrement the loop counter / rowCnt--; } / Loop over the number of columns of the input matrix. All the elements in each column are processed by the row operations / loopCnt = numCols; / Index modifier to navigate through the columns / l = 0u; //for(loopCnt = 0u; loopCnt < numCols; loopCnt++) while(loopCnt > 0u) { / Check if the pivot element is zero.. * If it is zero then interchange the row with non zero row below. * If there is no non zero element to replace in the rows below, * then the matrix is Singular. / / Working pointer for the input matrix that points * to the pivot element of the particular row / pInT1 = pIn + (l numCols); /* Working pointer for the destination matrix that points * to the pivot element of the particular row / pInT3 = pOut + (l numCols); /* Temporary variable to hold the pivot value / in = pInT1; /* Destination pointer modifier / k = 1u; / Check if the pivot element is zero / if(pInT1 == 0.0f) { /* Loop over the number rows present below / for (i = (l + 1u); i < numRows; i++) { / Update the input and destination pointers / pInT2 = pInT1 + (numCols l); pInT4 = pInT3 + (numCols * k); /* Check if there is a non zero pivot element to * replace in the rows below / if(pInT2 != 0.0f) { /* Loop over number of columns * to the right of the pilot element / for (j = 0u; j < (numCols - l); j++) { / Exchange the row elements of the input matrix / Xchg = pInT2; pInT2++ = pInT1; pInT1++ = Xchg; } for (j = 0u; j < numCols; j++) { Xchg = pInT4; pInT4++ = pInT3; pInT3++ = Xchg; } / Flag to indicate whether exchange is done or not / flag = 1u; / Break after exchange is done / break; } / Update the destination pointer modifier / k++; } } / Update the status if the matrix is singular / if((flag != 1u) && (in == 0.0f)) { status = ARM_MATH_SINGULAR; break; } / Points to the pivot row of input and destination matrices / pPivotRowIn = pIn + (l numCols); pPivotRowDst = pOut + (l * numCols); /* Temporary pointers to the pivot row pointers / pInT1 = pPivotRowIn; pInT2 = pPivotRowDst; / Pivot element of the row / in = (pIn + (l * numCols)); /* Loop over number of columns * to the right of the pilot element / for (j = 0u; j < (numCols - l); j++) { / Divide each element of the row of the input matrix * by the pivot element / pInT1++ = pInT1 / in; } for (j = 0u; j < numCols; j++) { / Divide each element of the row of the destination matrix * by the pivot element / pInT2++ = pInT2 / in; } / Replace the rows with the sum of that row and a multiple of row i * so that each new element in column i above row i is zero./ / Temporary pointers for input and destination matrices / pInT1 = pIn; pInT2 = pOut; for (i = 0u; i < numRows; i++) { / Check for the pivot element / if(i == l) { / If the processing element is the pivot element, only the columns to the right are to be processed / pInT1 += numCols - l; pInT2 += numCols; } else { / Element of the reference row / in = pInT1; /* Working pointers for input and destination pivot rows / pPRT_in = pPivotRowIn; pPRT_pDst = pPivotRowDst; / Loop over the number of columns to the right of the pivot element, to replace the elements in the input matrix / for (j = 0u; j < (numCols - l); j++) { / Replace the element by the sum of that row and a multiple of the reference row / pInT1++ = pInT1 - (in pPRT_in++); } / Loop over the number of columns to replace the elements in the destination matrix / for (j = 0u; j < numCols; j++) { / Replace the element by the sum of that row and a multiple of the reference row / pInT2++ = pInT2 - (in pPRT_pDst++); } } / Increment the temporary input pointer / pInT1 = pInT1 + l; } / Increment the input pointer / pIn++; / Decrement the loop counter / loopCnt--; / Increment the index modifier / l++; } #endif / #ifndef ARM_MATH_CM0 / / Set status as ARM_MATH_SUCCESS / status = ARM_MATH_SUCCESS; if((flag != 1u) && (in == 0.0f)) { status = ARM_MATH_SINGULAR; } } / Return to application / return (status); } /* * @} end of MatrixInv group */	1137519-player	lib/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_inverse_f32.c	C	lgpl	22,092
/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_mat_mult_q15.c * * Description: Q15 matrix multiplication. * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * * Version 0.0.5 2010/04/26 * incorporated review comments and updated with latest CMSIS layer * * Version 0.0.3 2010/03/10 * Initial version * -------------------------------------------------------------------- / #include "arm_math.h" /* * @ingroup groupMatrix / /* * @addtogroup MatrixMult * @{ / /* * @brief Q15 matrix multiplication * @param[in] pSrcA points to the first input matrix structure @param[in] pSrcB points to the second input matrix structure @param[out] pDst points to output matrix structure @param[in] pState points to the array for storing intermediate results @return The function returns either * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking. * * @details * <b>Scaling and Overflow Behavior:</b> * * \par * The function is implemented using a 64-bit internal accumulator. The inputs to the * multiplications are in 1.15 format and multiplications yield a 2.30 result. * The 2.30 intermediate * results are accumulated in a 64-bit accumulator in 34.30 format. This approach * provides 33 guard bits and there is no risk of overflow. The 34.30 result is then * truncated to 34.15 format by discarding the low 15 bits and then saturated to * 1.15 format. * * \par * Refer to <code>arm_mat_mult_fast_q15()</code> for a faster but less precise version of this function for Cortex-M3 and Cortex-M4. * / arm_status arm_mat_mult_q15( const arm_matrix_instance_q15 pSrcA, const arm_matrix_instance_q15 * pSrcB, arm_matrix_instance_q15 * pDst, q15_t * pState) { q63_t sum; /* accumulator / #ifndef ARM_MATH_CM0 / Run the below code for Cortex-M4 and Cortex-M3 / q31_t in; / Temporary variable to hold the input value / q15_t pSrcBT = pState; /* input data matrix pointer for transpose / q15_t pInA = pSrcA->pData; /* input data matrix pointer A of Q15 type / q15_t pInB = pSrcB->pData; /* input data matrix pointer B of Q15 type / q15_t px; /* Temporary output data matrix pointer / uint16_t numRowsA = pSrcA->numRows; / number of rows of input matrix A / uint16_t numColsB = pSrcB->numCols; / number of columns of input matrix B / uint16_t numColsA = pSrcA->numCols; / number of columns of input matrix A / uint16_t numRowsB = pSrcB->numRows; / number of rows of input matrix A / uint16_t col, i = 0u, row = numRowsB, colCnt; / loop counters / arm_status status; / status of matrix multiplication / #ifdef ARM_MATH_MATRIX_CHECK / Check for matrix mismatch condition / if((pSrcA->numCols != pSrcB->numRows) \|\| (pSrcA->numRows != pDst->numRows) \|\| (pSrcB->numCols != pDst->numCols)) { / Set status as ARM_MATH_SIZE_MISMATCH / status = ARM_MATH_SIZE_MISMATCH; } else #endif / #ifdef ARM_MATH_MATRIX_CHECK / { / Matrix transpose / do { / Apply loop unrolling and exchange the columns with row elements / col = numColsB >> 2; / The pointer px is set to starting address of the column being processed / px = pSrcBT + i; / First part of the processing with loop unrolling. Compute 4 outputs at a time. ** a second loop below computes the remaining 1 to 3 samples. / while(col > 0u) { / Read two elements from the row / in = __SIMD32(pInB)++; /* Unpack and store one element in the destination / #ifndef ARM_MATH_BIG_ENDIAN px = (q15_t) in; #else px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); #endif / #ifndef ARM_MATH_BIG_ENDIAN / / Update the pointer px to point to the next row of the transposed matrix / px += numRowsB; / Unpack and store the second element in the destination / #ifndef ARM_MATH_BIG_ENDIAN px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); #else px = (q15_t) in; #endif / #ifndef ARM_MATH_BIG_ENDIAN / / Update the pointer px to point to the next row of the transposed matrix / px += numRowsB; / Read two elements from the row / in = __SIMD32(pInB)++; /* Unpack and store one element in the destination / #ifndef ARM_MATH_BIG_ENDIAN px = (q15_t) in; #else px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); #endif / #ifndef ARM_MATH_BIG_ENDIAN / / Update the pointer px to point to the next row of the transposed matrix / px += numRowsB; / Unpack and store the second element in the destination / #ifndef ARM_MATH_BIG_ENDIAN px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); #else px = (q15_t) in; #endif / #ifndef ARM_MATH_BIG_ENDIAN / / Update the pointer px to point to the next row of the transposed matrix / px += numRowsB; / Decrement the column loop counter / col--; } / If the columns of pSrcB is not a multiple of 4, compute any remaining output samples here. ** No loop unrolling is used. / col = numColsB % 0x4u; while(col > 0u) { / Read and store the input element in the destination / px = pInB++; / Update the pointer px to point to the next row of the transposed matrix / px += numRowsB; / Decrement the column loop counter / col--; } i++; / Decrement the row loop counter / row--; } while(row > 0u); / Reset the variables for the usage in the following multiplication process / row = numRowsA; i = 0u; px = pDst->pData; / The following loop performs the dot-product of each row in pSrcA with each column in pSrcB / / row loop / do { / For every row wise process, the column loop counter is to be initiated / col = numColsB; / For every row wise process, the pIn2 pointer is set ** to the starting address of the transposed pSrcB data / pInB = pSrcBT; / column loop / do { / Set the variable sum, that acts as accumulator, to zero / sum = 0; / Apply loop unrolling and compute 2 MACs simultaneously. / colCnt = numColsA >> 1; / Initiate the pointer pIn1 to point to the starting address of the column being processed / pInA = pSrcA->pData + i; / matrix multiplication / while(colCnt > 0u) { / c(m,n) = a(1,1)b(1,1) + a(1,2) b(2,1) + .... + a(m,p)b(p,n) / sum = __SMLALD(__SIMD32(pInA)++, __SIMD32(pInB)++, sum); /* Decrement the loop counter / colCnt--; } / process odd column samples / if((numColsA & 0x1u) > 0u) { / c(m,n) = a(1,1)b(1,1) + a(1,2) b(2,1) + .... + a(m,p)b(p,n) / sum += ((q31_t) * pInA * (pInB++)); } / Saturate and store the result in the destination buffer / px = (q15_t) (__SSAT((sum >> 15), 16)); px++; /* Decrement the column loop counter / col--; } while(col > 0u); i = i + numColsA; / Decrement the row loop counter / row--; } while(row > 0u); #else / Run the below code for Cortex-M0 / q15_t pIn1 = pSrcA->pData; /* input data matrix pointer A / q15_t pIn2 = pSrcB->pData; /* input data matrix pointer B / q15_t pInA = pSrcA->pData; /* input data matrix pointer A of Q15 type / q15_t pInB = pSrcB->pData; /* input data matrix pointer B of Q15 type / q15_t pOut = pDst->pData; /* output data matrix pointer / q15_t px; /* Temporary output data matrix pointer / uint16_t numColsB = pSrcB->numCols; / number of columns of input matrix B / uint16_t numColsA = pSrcA->numCols; / number of columns of input matrix A / uint16_t numRowsA = pSrcA->numRows; / number of rows of input matrix A / uint16_t col, i = 0u, row = numRowsA, colCnt; / loop counters / arm_status status; / status of matrix multiplication / #ifdef ARM_MATH_MATRIX_CHECK / Check for matrix mismatch condition / if((pSrcA->numCols != pSrcB->numRows) \|\| (pSrcA->numRows != pDst->numRows) \|\| (pSrcB->numCols != pDst->numCols)) { / Set status as ARM_MATH_SIZE_MISMATCH / status = ARM_MATH_SIZE_MISMATCH; } else #endif / #ifdef ARM_MATH_MATRIX_CHECK / { / The following loop performs the dot-product of each row in pSrcA with each column in pSrcB / / row loop / do { / Output pointer is set to starting address of the row being processed / px = pOut + i; / For every row wise process, the column loop counter is to be initiated / col = numColsB; / For every row wise process, the pIn2 pointer is set ** to the starting address of the pSrcB data / pIn2 = pSrcB->pData; / column loop / do { / Set the variable sum, that acts as accumulator, to zero / sum = 0; / Initiate the pointer pIn1 to point to the starting address of pSrcA / pIn1 = pInA; / Matrix A columns number of MAC operations are to be performed / colCnt = numColsA; / matrix multiplication / while(colCnt > 0u) { / c(m,n) = a(1,1)b(1,1) + a(1,2) b(2,1) + .... + a(m,p)b(p,n) / /* Perform the multiply-accumulates / sum += (q31_t) pIn1++ * pIn2; pIn2 += numColsB; / Decrement the loop counter / colCnt--; } / Convert the result from 34.30 to 1.15 format and store the saturated value in destination buffer / / Saturate and store the result in the destination buffer / px++ = (q15_t) __SSAT((sum >> 15), 16); /* Decrement the column loop counter / col--; / Update the pointer pIn2 to point to the starting address of the next column / pIn2 = pInB + (numColsB - col); } while(col > 0u); / Update the pointer pSrcA to point to the starting address of the next row / i = i + numColsB; pInA = pInA + numColsA; / Decrement the row loop counter / row--; } while(row > 0u); #endif / #ifndef ARM_MATH_CM0 / / set status as ARM_MATH_SUCCESS / status = ARM_MATH_SUCCESS; } / Return to application / return (status); } /* * @} end of MatrixMult group */	1137519-player	lib/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_q15.c	C	lgpl	12,247
/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_mat_mult_q31.c * * Description: Q31 matrix multiplication. * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * * Version 0.0.5 2010/04/26 * incorporated review comments and updated with latest CMSIS layer * * Version 0.0.3 2010/03/10 * Initial version * -------------------------------------------------------------------- / #include "arm_math.h" /* * @ingroup groupMatrix / /* * @addtogroup MatrixMult * @{ / /* * @brief Q31 matrix multiplication * @param[in] pSrcA points to the first input matrix structure @param[in] pSrcB points to the second input matrix structure @param[out] pDst points to output matrix structure @return The function returns either * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking. * * @details * <b>Scaling and Overflow Behavior:</b> * * \par * The function is implemented using an internal 64-bit accumulator. * The accumulator has a 2.62 format and maintains full precision of the intermediate * multiplication results but provides only a single guard bit. There is no saturation * on intermediate additions. Thus, if the accumulator overflows it wraps around and * distorts the result. The input signals should be scaled down to avoid intermediate * overflows. The input is thus scaled down by log2(numColsA) bits * to avoid overflows, as a total of numColsA additions are performed internally. * The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result. * * \par * See <code>arm_mat_mult_fast_q31()</code> for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4. * / arm_status arm_mat_mult_q31( const arm_matrix_instance_q31 pSrcA, const arm_matrix_instance_q31 * pSrcB, arm_matrix_instance_q31 * pDst) { q31_t pIn1 = pSrcA->pData; / input data matrix pointer A / q31_t pIn2 = pSrcB->pData; /* input data matrix pointer B / q31_t pInA = pSrcA->pData; /* input data matrix pointer A / q31_t pOut = pDst->pData; /* output data matrix pointer / q31_t px; /* Temporary output data matrix pointer / q63_t sum; / Accumulator / uint16_t numRowsA = pSrcA->numRows; / number of rows of input matrix A / uint16_t numColsB = pSrcB->numCols; / number of columns of input matrix B / uint16_t numColsA = pSrcA->numCols; / number of columns of input matrix A / #ifndef ARM_MATH_CM0 / Run the below code for Cortex-M4 and Cortex-M3 / uint16_t col, i = 0u, j, row = numRowsA, colCnt; / loop counters / arm_status status; / status of matrix multiplication / #ifdef ARM_MATH_MATRIX_CHECK / Check for matrix mismatch condition / if((pSrcA->numCols != pSrcB->numRows) \|\| (pSrcA->numRows != pDst->numRows) \|\| (pSrcB->numCols != pDst->numCols)) { / Set status as ARM_MATH_SIZE_MISMATCH / status = ARM_MATH_SIZE_MISMATCH; } else #endif / #ifdef ARM_MATH_MATRIX_CHECK / { / The following loop performs the dot-product of each row in pSrcA with each column in pSrcB / / row loop / do { / Output pointer is set to starting address of the row being processed / px = pOut + i; / For every row wise process, the column loop counter is to be initiated / col = numColsB; / For every row wise process, the pIn2 pointer is set ** to the starting address of the pSrcB data / pIn2 = pSrcB->pData; j = 0u; / column loop / do { / Set the variable sum, that acts as accumulator, to zero / sum = 0; / Initiate the pointer pIn1 to point to the starting address of pInA / pIn1 = pInA; / Apply loop unrolling and compute 4 MACs simultaneously. / colCnt = numColsA >> 2; / matrix multiplication / while(colCnt > 0u) { / c(m,n) = a(1,1)b(1,1) + a(1,2) b(2,1) + .... + a(m,p)b(p,n) / /* Perform the multiply-accumulates / sum += (q63_t) pIn1++ * pIn2; pIn2 += numColsB; sum += (q63_t) pIn1++ * pIn2; pIn2 += numColsB; sum += (q63_t) pIn1++ * pIn2; pIn2 += numColsB; sum += (q63_t) pIn1++ * pIn2; pIn2 += numColsB; / Decrement the loop counter / colCnt--; } / If the columns of pSrcA is not a multiple of 4, compute any remaining output samples here. ** No loop unrolling is used. / colCnt = numColsA % 0x4u; while(colCnt > 0u) { / c(m,n) = a(1,1)b(1,1) + a(1,2) b(2,1) + .... + a(m,p)b(p,n) / /* Perform the multiply-accumulates / sum += (q63_t) pIn1++ * pIn2; pIn2 += numColsB; / Decrement the loop counter / colCnt--; } / Convert the result from 2.62 to 1.31 format and store in destination buffer / px++ = (q31_t) (sum >> 31); /* Update the pointer pIn2 to point to the starting address of the next column / j++; pIn2 = (pSrcB->pData) + j; / Decrement the column loop counter / col--; } while(col > 0u); #else / Run the below code for Cortex-M0 / q31_t pInB = pSrcB->pData; /* input data matrix pointer B / uint16_t col, i = 0u, row = numRowsA, colCnt; / loop counters / arm_status status; / status of matrix multiplication / #ifdef ARM_MATH_MATRIX_CHECK / Check for matrix mismatch condition / if((pSrcA->numCols != pSrcB->numRows) \|\| (pSrcA->numRows != pDst->numRows) \|\| (pSrcB->numCols != pDst->numCols)) { / Set status as ARM_MATH_SIZE_MISMATCH / status = ARM_MATH_SIZE_MISMATCH; } else #endif / #ifdef ARM_MATH_MATRIX_CHECK / { / The following loop performs the dot-product of each row in pSrcA with each column in pSrcB / / row loop / do { / Output pointer is set to starting address of the row being processed / px = pOut + i; / For every row wise process, the column loop counter is to be initiated / col = numColsB; / For every row wise process, the pIn2 pointer is set ** to the starting address of the pSrcB data / pIn2 = pSrcB->pData; / column loop / do { / Set the variable sum, that acts as accumulator, to zero / sum = 0; / Initiate the pointer pIn1 to point to the starting address of pInA / pIn1 = pInA; / Matrix A columns number of MAC operations are to be performed / colCnt = numColsA; / matrix multiplication / while(colCnt > 0u) { / c(m,n) = a(1,1)b(1,1) + a(1,2) b(2,1) + .... + a(m,p)b(p,n) / /* Perform the multiply-accumulates / sum += (q63_t) pIn1++ * pIn2; pIn2 += numColsB; / Decrement the loop counter / colCnt--; } / Convert the result from 2.62 to 1.31 format and store in destination buffer / px++ = (q31_t) (sum >> 31); /* Decrement the column loop counter / col--; / Update the pointer pIn2 to point to the starting address of the next column / pIn2 = pInB + (numColsB - col); } while(col > 0u); #endif / Update the pointer pInA to point to the starting address of the next row / i = i + numColsB; pInA = pInA + numColsA; / Decrement the row loop counter / row--; } while(row > 0u); / set status as ARM_MATH_SUCCESS / status = ARM_MATH_SUCCESS; } / Return to application / return (status); } /* * @} end of MatrixMult group */	1137519-player	lib/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_q31.c	C	lgpl	9,162
/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_mat_scale_q15.c * * Description: Multiplies a Q15 matrix by a scalar. * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * * Version 0.0.5 2010/04/26 * incorporated review comments and updated with latest CMSIS layer * * Version 0.0.3 2010/03/10 * Initial version * -------------------------------------------------------------------- / #include "arm_math.h" /* * @ingroup groupMatrix / /* * @addtogroup MatrixScale * @{ / /* * @brief Q15 matrix scaling. * @param[in] pSrc points to input matrix @param[in] scaleFract fractional portion of the scale factor * @param[in] shift number of bits to shift the result by * @param[out] pDst points to output matrix structure @return The function returns either * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking. * * @details * <b>Scaling and Overflow Behavior:</b> * \par * The input data <code>pSrc</code> and <code>scaleFract</code> are in 1.15 format. These are multiplied to yield a 2.30 intermediate result and this is shifted with saturation to 1.15 format. / arm_status arm_mat_scale_q15( const arm_matrix_instance_q15 pSrc, q15_t scaleFract, int32_t shift, arm_matrix_instance_q15 * pDst) { q15_t pIn = pSrc->pData; / input data matrix pointer / q15_t pOut = pDst->pData; /* output data matrix pointer / uint32_t numSamples; / total number of elements in the matrix / int32_t totShift = 15 - shift; / total shift to apply after scaling / uint32_t blkCnt; / loop counters / arm_status status; / status of matrix scaling / #ifdef ARM_MATH_MATRIX_CHECK / Check for matrix mismatch / if((pSrc->numRows != pDst->numRows) \|\| (pSrc->numCols != pDst->numCols)) { / Set status as ARM_MATH_SIZE_MISMATCH / status = ARM_MATH_SIZE_MISMATCH; } else #endif / #ifdef ARM_MATH_MATRIX_CHECK / { / Total number of samples in the input matrix / numSamples = (uint32_t) pSrc->numRows pSrc->numCols; #ifndef ARM_MATH_CM0 /* Run the below code for Cortex-M4 and Cortex-M3 / / Loop Unrolling / blkCnt = numSamples >> 2; / First part of the processing with loop unrolling. Compute 4 outputs at a time. ** a second loop below computes the remaining 1 to 3 samples. / while(blkCnt > 0u) { / C(m,n) = A(m,n) * k / / Scale, saturate and then store the results in the destination buffer. / pOut++ = (q15_t) (__SSAT(((q31_t) (pIn++) scaleFract) >> totShift, 16)); pOut++ = (q15_t) (__SSAT(((q31_t) (pIn++) * scaleFract) >> totShift, 16)); pOut++ = (q15_t) (__SSAT(((q31_t) (pIn++) * scaleFract) >> totShift, 16)); pOut++ = (q15_t) (__SSAT(((q31_t) (pIn++) * scaleFract) >> totShift, 16)); /* Decrement the numSamples loop counter / blkCnt--; } / If the numSamples is not a multiple of 4, compute any remaining output samples here. ** No loop unrolling is used. / blkCnt = numSamples % 0x4u; #else / Run the below code for Cortex-M0 / / Initialize blkCnt with number of samples / blkCnt = numSamples; #endif / #ifndef ARM_MATH_CM0 / while(blkCnt > 0u) { / C(m,n) = A(m,n) * k / / Scale, saturate and then store the results in the destination buffer. / pOut++ = (q15_t) (__SSAT(((q31_t) (pIn++) scaleFract) >> totShift, 16)); /* Decrement the numSamples loop counter / blkCnt--; } / Set status as ARM_MATH_SUCCESS / status = ARM_MATH_SUCCESS; } / Return to application / return (status); } /* * @} end of MatrixScale group */	1137519-player	lib/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_q15.c	C	lgpl	4,838
/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_mat_trans_q15.c * * Description: Q15 matrix transpose. * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * * Version 0.0.5 2010/04/26 * incorporated review comments and updated with latest CMSIS layer * * Version 0.0.3 2010/03/10 * Initial version * -------------------------------------------------------------------- / #include "arm_math.h" /* * @ingroup groupMatrix / /* * @addtogroup MatrixTrans * @{ / / * @brief Q15 matrix transpose. * @param[in] pSrc points to the input matrix @param[out] pDst points to the output matrix @return The function returns either <code>ARM_MATH_SIZE_MISMATCH</code> * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking. / arm_status arm_mat_trans_q15( const arm_matrix_instance_q15 pSrc, arm_matrix_instance_q15 * pDst) { q15_t pSrcA = pSrc->pData; / input data matrix pointer / q15_t pOut = pDst->pData; /* output data matrix pointer / uint16_t nRows = pSrc->numRows; / number of nRows / uint16_t nColumns = pSrc->numCols; / number of nColumns / uint16_t col, row = nRows, i = 0u; / row and column loop counters / arm_status status; / status of matrix transpose / #ifndef ARM_MATH_CM0 / Run the below code for Cortex-M4 and Cortex-M3 / q31_t in; / variable to hold temporary output / #ifdef ARM_MATH_MATRIX_CHECK / Check for matrix mismatch condition / if((pSrc->numRows != pDst->numCols) \|\| (pSrc->numCols != pDst->numRows)) { / Set status as ARM_MATH_SIZE_MISMATCH / status = ARM_MATH_SIZE_MISMATCH; } else #endif / #ifdef ARM_MATH_MATRIX_CHECK / { / Matrix transpose by exchanging the rows with columns / / row loop / do { / Apply loop unrolling and exchange the columns with row elements / col = nColumns >> 2u; / The pointer pOut is set to starting address of the column being processed / pOut = pDst->pData + i; / First part of the processing with loop unrolling. Compute 4 outputs at a time. ** a second loop below computes the remaining 1 to 3 samples. / while(col > 0u) { / Read two elements from the row / in = __SIMD32(pSrcA)++; /* Unpack and store one element in the destination / #ifndef ARM_MATH_BIG_ENDIAN pOut = (q15_t) in; #else pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); #endif / #ifndef ARM_MATH_BIG_ENDIAN / / Update the pointer pOut to point to the next row of the transposed matrix / pOut += nRows; / Unpack and store the second element in the destination / #ifndef ARM_MATH_BIG_ENDIAN pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); #else pOut = (q15_t) in; #endif / #ifndef ARM_MATH_BIG_ENDIAN / / Update the pointer pOut to point to the next row of the transposed matrix / pOut += nRows; / Read two elements from the row / #ifndef ARM_MATH_BIG_ENDIAN in = __SIMD32(pSrcA)++; #else in = __SIMD32(pSrcA)++; #endif / #ifndef ARM_MATH_BIG_ENDIAN / / Unpack and store one element in the destination / #ifndef ARM_MATH_BIG_ENDIAN pOut = (q15_t) in; #else pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); #endif / #ifndef ARM_MATH_BIG_ENDIAN / / Update the pointer pOut to point to the next row of the transposed matrix / pOut += nRows; / Unpack and store the second element in the destination / #ifndef ARM_MATH_BIG_ENDIAN pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); #else pOut = (q15_t) in; #endif / #ifndef ARM_MATH_BIG_ENDIAN / / Update the pointer pOut to point to the next row of the transposed matrix / pOut += nRows; / Decrement the column loop counter / col--; } / Perform matrix transpose for last 3 samples here. / col = nColumns % 0x4u; #else / Run the below code for Cortex-M0 / #ifdef ARM_MATH_MATRIX_CHECK / Check for matrix mismatch condition / if((pSrc->numRows != pDst->numCols) \|\| (pSrc->numCols != pDst->numRows)) { / Set status as ARM_MATH_SIZE_MISMATCH / status = ARM_MATH_SIZE_MISMATCH; } else #endif / #ifdef ARM_MATH_MATRIX_CHECK / { / Matrix transpose by exchanging the rows with columns / / row loop / do { / The pointer pOut is set to starting address of the column being processed / pOut = pDst->pData + i; / Initialize column loop counter / col = nColumns; #endif / #ifndef ARM_MATH_CM0 / while(col > 0u) { / Read and store the input element in the destination / pOut = pSrcA++; / Update the pointer pOut to point to the next row of the transposed matrix / pOut += nRows; / Decrement the column loop counter / col--; } i++; / Decrement the row loop counter / row--; } while(row > 0u); / set status as ARM_MATH_SUCCESS / status = ARM_MATH_SUCCESS; } / Return to application / return (status); } /* * @} end of MatrixTrans group */	1137519-player	lib/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_q15.c	C	lgpl	6,390
/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_mat_trans_f32.c * * Description: Floating-point matrix transpose. * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * * Version 0.0.5 2010/04/26 * incorporated review comments and updated with latest CMSIS layer * * Version 0.0.3 2010/03/10 * Initial version * -------------------------------------------------------------------- / /* * @defgroup MatrixTrans Matrix Transpose * * Tranposes a matrix. * Transposing an <code>M x N</code> matrix flips it around the center diagonal and results in an <code>N x M</code> matrix. * \image html MatrixTranspose.gif "Transpose of a 3 x 3 matrix" / #include "arm_math.h" /* * @ingroup groupMatrix / /* * @addtogroup MatrixTrans * @{ / /* * @brief Floating-point matrix transpose. * @param[in] pSrc points to the input matrix @param[out] pDst points to the output matrix @return The function returns either <code>ARM_MATH_SIZE_MISMATCH</code> * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking. / arm_status arm_mat_trans_f32( const arm_matrix_instance_f32 pSrc, arm_matrix_instance_f32 * pDst) { float32_t pIn = pSrc->pData; / input data matrix pointer / float32_t pOut = pDst->pData; /* output data matrix pointer / float32_t px; /* Temporary output data matrix pointer / uint16_t nRows = pSrc->numRows; / number of rows / uint16_t nColumns = pSrc->numCols; / number of columns / #ifndef ARM_MATH_CM0 / Run the below code for Cortex-M4 and Cortex-M3 / uint16_t blkCnt, i = 0u, row = nRows; / loop counters / arm_status status; / status of matrix transpose / #ifdef ARM_MATH_MATRIX_CHECK / Check for matrix mismatch condition / if((pSrc->numRows != pDst->numCols) \|\| (pSrc->numCols != pDst->numRows)) { / Set status as ARM_MATH_SIZE_MISMATCH / status = ARM_MATH_SIZE_MISMATCH; } else #endif / #ifdef ARM_MATH_MATRIX_CHECK / { / Matrix transpose by exchanging the rows with columns / / row loop / do { / Loop Unrolling / blkCnt = nColumns >> 2; / The pointer px is set to starting address of the column being processed / px = pOut + i; / First part of the processing with loop unrolling. Compute 4 outputs at a time. ** a second loop below computes the remaining 1 to 3 samples. / while(blkCnt > 0u) / column loop / { / Read and store the input element in the destination / px = pIn++; / Update the pointer px to point to the next row of the transposed matrix / px += nRows; / Read and store the input element in the destination / px = pIn++; / Update the pointer px to point to the next row of the transposed matrix / px += nRows; / Read and store the input element in the destination / px = pIn++; / Update the pointer px to point to the next row of the transposed matrix / px += nRows; / Read and store the input element in the destination / px = pIn++; / Update the pointer px to point to the next row of the transposed matrix / px += nRows; / Decrement the column loop counter / blkCnt--; } / Perform matrix transpose for last 3 samples here. / blkCnt = nColumns % 0x4u; while(blkCnt > 0u) { / Read and store the input element in the destination / px = pIn++; / Update the pointer px to point to the next row of the transposed matrix / px += nRows; / Decrement the column loop counter / blkCnt--; } #else / Run the below code for Cortex-M0 / uint16_t col, i = 0u, row = nRows; / loop counters / arm_status status; / status of matrix transpose / #ifdef ARM_MATH_MATRIX_CHECK / Check for matrix mismatch condition / if((pSrc->numRows != pDst->numCols) \|\| (pSrc->numCols != pDst->numRows)) { / Set status as ARM_MATH_SIZE_MISMATCH / status = ARM_MATH_SIZE_MISMATCH; } else #endif / #ifdef ARM_MATH_MATRIX_CHECK / { / Matrix transpose by exchanging the rows with columns / / row loop / do { / The pointer px is set to starting address of the column being processed / px = pOut + i; / Initialize column loop counter / col = nColumns; while(col > 0u) { / Read and store the input element in the destination / px = pIn++; / Update the pointer px to point to the next row of the transposed matrix / px += nRows; / Decrement the column loop counter / col--; } #endif / #ifndef ARM_MATH_CM0 / i++; / Decrement the row loop counter / row--; } while(row > 0u); / row loop end / / Set status as ARM_MATH_SUCCESS / status = ARM_MATH_SUCCESS; } / Return to application / return (status); } /* * @} end of MatrixTrans group */	1137519-player	lib/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_f32.c	C	lgpl	6,225
/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_mat_add_q15.c * * Description: Q15 matrix addition * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * * Version 0.0.5 2010/04/26 * incorporated review comments and updated with latest CMSIS layer * * Version 0.0.3 2010/03/10 * Initial version * -------------------------------------------------------------------- / #include "arm_math.h" /* * @ingroup groupMatrix / /* * @addtogroup MatrixAdd * @{ / /* * @brief Q15 matrix addition. * @param[in] pSrcA points to the first input matrix structure @param[in] pSrcB points to the second input matrix structure @param[out] pDst points to output matrix structure @return The function returns either * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking. * * <b>Scaling and Overflow Behavior:</b> * \par * The function uses saturating arithmetic. * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated. / arm_status arm_mat_add_q15( const arm_matrix_instance_q15 pSrcA, const arm_matrix_instance_q15 * pSrcB, arm_matrix_instance_q15 * pDst) { q15_t pInA = pSrcA->pData; / input data matrix pointer A / q15_t pInB = pSrcB->pData; /* input data matrix pointer B / q15_t pOut = pDst->pData; /* output data matrix pointer / uint16_t numSamples; / total number of elements in the matrix / uint32_t blkCnt; / loop counters / arm_status status; / status of matrix addition / #ifdef ARM_MATH_MATRIX_CHECK / Check for matrix mismatch condition / if((pSrcA->numRows != pSrcB->numRows) \|\| (pSrcA->numCols != pSrcB->numCols) \|\| (pSrcA->numRows != pDst->numRows) \|\| (pSrcA->numCols != pDst->numCols)) { / Set status as ARM_MATH_SIZE_MISMATCH / status = ARM_MATH_SIZE_MISMATCH; } else #endif / #ifdef ARM_MATH_MATRIX_CHECK / { / Total number of samples in the input matrix / numSamples = (uint16_t) (pSrcA->numRows pSrcA->numCols); #ifndef ARM_MATH_CM0 /* Run the below code for Cortex-M4 and Cortex-M3 / / Loop unrolling / blkCnt = (uint32_t) numSamples >> 2u; / First part of the processing with loop unrolling. Compute 4 outputs at a time. ** a second loop below computes the remaining 1 to 3 samples. / while(blkCnt > 0u) { / C(m,n) = A(m,n) + B(m,n) / / Add, Saturate and then store the results in the destination buffer. / __SIMD32(pOut)++ = __QADD16(__SIMD32(pInA)++, __SIMD32(pInB)++); __SIMD32(pOut)++ = __QADD16(__SIMD32(pInA)++, __SIMD32(pInB)++); / Decrement the loop counter / blkCnt--; } / If the blockSize is not a multiple of 4, compute any remaining output samples here. ** No loop unrolling is used. / blkCnt = (uint32_t) numSamples % 0x4u; / q15 pointers of input and output are initialized / while(blkCnt > 0u) { / C(m,n) = A(m,n) + B(m,n) / / Add, Saturate and then store the results in the destination buffer. / pOut++ = (q15_t) __QADD16(pInA++, pInB++); /* Decrement the loop counter / blkCnt--; } #else / Run the below code for Cortex-M0 / / Initialize blkCnt with number of samples / blkCnt = (uint32_t) numSamples; / q15 pointers of input and output are initialized / while(blkCnt > 0u) { / C(m,n) = A(m,n) + B(m,n) / / Add, Saturate and then store the results in the destination buffer. / pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ + pInB++), 16); / Decrement the loop counter / blkCnt--; } #endif / #ifndef ARM_MATH_CM0 / / set status as ARM_MATH_SUCCESS / status = ARM_MATH_SUCCESS; } / Return to application / return (status); } /* * @} end of MatrixAdd group */	1137519-player	lib/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_q15.c	C	lgpl	4,952
/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_mat_init_q31.c * * Description: Q31 matrix initialization. * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * * Version 0.0.5 2010/04/26 * incorporated review comments and updated with latest CMSIS layer * * Version 0.0.3 2010/03/10 * Initial version * -------------------------------------------------------------------------- / #include "arm_math.h" /* * @ingroup groupMatrix / /* * @defgroup MatrixInit Matrix Initialization * / /* * @addtogroup MatrixInit * @{ / /* * @brief Q31 matrix initialization. * @param[in,out] S points to an instance of the floating-point matrix structure. @param[in] nRows number of rows in the matrix. * @param[in] nColumns number of columns in the matrix. * @param[in] pData points to the matrix data array. @return none / void arm_mat_init_q31( arm_matrix_instance_q31 S, uint16_t nRows, uint16_t nColumns, q31_t * pData) { /* Assign Number of Rows / S->numRows = nRows; / Assign Number of Columns / S->numCols = nColumns; / Assign Data pointer / S->pData = pData; } /* * @} end of MatrixInit group */	1137519-player	lib/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q31.c	C	lgpl	2,061
/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_mat_trans_q31.c * * Description: Q31 matrix transpose. * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * * Version 0.0.5 2010/04/26 * incorporated review comments and updated with latest CMSIS layer * * Version 0.0.3 2010/03/10 * Initial version * -------------------------------------------------------------------- / #include "arm_math.h" /* * @ingroup groupMatrix / /* * @addtogroup MatrixTrans * @{ / / * @brief Q31 matrix transpose. * @param[in] pSrc points to the input matrix @param[out] pDst points to the output matrix @return The function returns either <code>ARM_MATH_SIZE_MISMATCH</code> * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking. / arm_status arm_mat_trans_q31( const arm_matrix_instance_q31 pSrc, arm_matrix_instance_q31 * pDst) { q31_t pIn = pSrc->pData; / input data matrix pointer / q31_t pOut = pDst->pData; /* output data matrix pointer / q31_t px; /* Temporary output data matrix pointer / uint16_t nRows = pSrc->numRows; / number of nRows / uint16_t nColumns = pSrc->numCols; / number of nColumns / #ifndef ARM_MATH_CM0 / Run the below code for Cortex-M4 and Cortex-M3 / uint16_t blkCnt, i = 0u, row = nRows; / loop counters / arm_status status; / status of matrix transpose / #ifdef ARM_MATH_MATRIX_CHECK / Check for matrix mismatch condition / if((pSrc->numRows != pDst->numCols) \|\| (pSrc->numCols != pDst->numRows)) { / Set status as ARM_MATH_SIZE_MISMATCH / status = ARM_MATH_SIZE_MISMATCH; } else #endif / #ifdef ARM_MATH_MATRIX_CHECK / { / Matrix transpose by exchanging the rows with columns / / row loop / do { / Apply loop unrolling and exchange the columns with row elements / blkCnt = nColumns >> 2u; / The pointer px is set to starting address of the column being processed / px = pOut + i; / First part of the processing with loop unrolling. Compute 4 outputs at a time. ** a second loop below computes the remaining 1 to 3 samples. / while(blkCnt > 0u) { / Read and store the input element in the destination / px = pIn++; / Update the pointer px to point to the next row of the transposed matrix / px += nRows; / Read and store the input element in the destination / px = pIn++; / Update the pointer px to point to the next row of the transposed matrix / px += nRows; / Read and store the input element in the destination / px = pIn++; / Update the pointer px to point to the next row of the transposed matrix / px += nRows; / Read and store the input element in the destination / px = pIn++; / Update the pointer px to point to the next row of the transposed matrix / px += nRows; / Decrement the column loop counter / blkCnt--; } / Perform matrix transpose for last 3 samples here. / blkCnt = nColumns % 0x4u; while(blkCnt > 0u) { / Read and store the input element in the destination / px = pIn++; / Update the pointer px to point to the next row of the transposed matrix / px += nRows; / Decrement the column loop counter / blkCnt--; } #else / Run the below code for Cortex-M0 / uint16_t col, i = 0u, row = nRows; / loop counters / arm_status status; / status of matrix transpose / #ifdef ARM_MATH_MATRIX_CHECK / Check for matrix mismatch condition / if((pSrc->numRows != pDst->numCols) \|\| (pSrc->numCols != pDst->numRows)) { / Set status as ARM_MATH_SIZE_MISMATCH / status = ARM_MATH_SIZE_MISMATCH; } else #endif / #ifdef ARM_MATH_MATRIX_CHECK / { / Matrix transpose by exchanging the rows with columns / / row loop / do { / The pointer px is set to starting address of the column being processed / px = pOut + i; / Initialize column loop counter / col = nColumns; while(col > 0u) { / Read and store the input element in the destination / px = pIn++; / Update the pointer px to point to the next row of the transposed matrix / px += nRows; / Decrement the column loop counter / col--; } #endif / #ifndef ARM_MATH_CM0 / i++; / Decrement the row loop counter / row--; } while(row > 0u); / row loop end / / set status as ARM_MATH_SUCCESS / status = ARM_MATH_SUCCESS; } / Return to application / return (status); } /* * @} end of MatrixTrans group */	1137519-player	lib/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_q31.c	C	lgpl	5,938
/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_mat_mult_fast_q15.c * * Description: Q15 matrix multiplication (fast variant) * * Target Processor: Cortex-M4/Cortex-M3 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * -------------------------------------------------------------------- / #include "arm_math.h" /* * @ingroup groupMatrix / /* * @addtogroup MatrixMult * @{ / /* * @brief Q15 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4 * @param[in] pSrcA points to the first input matrix structure @param[in] pSrcB points to the second input matrix structure @param[out] pDst points to output matrix structure @param[in] pState points to the array for storing intermediate results @return The function returns either * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking. * * @details * <b>Scaling and Overflow Behavior:</b> * * \par * The difference between the function arm_mat_mult_q15() and this fast variant is that * the fast variant use a 32-bit rather than a 64-bit accumulator. * The result of each 1.15 x 1.15 multiplication is truncated to * 2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30 * format. Finally, the accumulator is saturated and converted to a 1.15 result. * * \par * The fast version has the same overflow behavior as the standard version but provides * less precision since it discards the low 16 bits of each multiplication result. * In order to avoid overflows completely the input signals must be scaled down. * Scale down one of the input matrices by log2(numColsA) bits to * avoid overflows, as a total of numColsA additions are computed internally for each * output element. * * \par * See <code>arm_mat_mult_q15()</code> for a slower implementation of this function * which uses 64-bit accumulation to provide higher precision. / arm_status arm_mat_mult_fast_q15( const arm_matrix_instance_q15 pSrcA, const arm_matrix_instance_q15 * pSrcB, arm_matrix_instance_q15 * pDst, q15_t * pState) { q31_t sum; /* accumulator / q31_t in; / Temporary variable to hold the input value / q15_t pSrcBT = pState; /* input data matrix pointer for transpose / q15_t pInA = pSrcA->pData; /* input data matrix pointer A of Q15 type / q15_t pInB = pSrcB->pData; /* input data matrix pointer B of Q15 type / // q15_t pDst = pDst->pData; /* output data matrix pointer / q15_t px; /* Temporary output data matrix pointer / uint16_t numRowsA = pSrcA->numRows; / number of rows of input matrix A / uint16_t numColsB = pSrcB->numCols; / number of columns of input matrix B / uint16_t numColsA = pSrcA->numCols; / number of columns of input matrix A / uint16_t numRowsB = pSrcB->numRows; / number of rows of input matrix A / uint16_t col, i = 0u, row = numRowsB, colCnt; / loop counters / arm_status status; / status of matrix multiplication / #ifdef ARM_MATH_MATRIX_CHECK / Check for matrix mismatch condition / if((pSrcA->numCols != pSrcB->numRows) \|\| (pSrcA->numRows != pDst->numRows) \|\| (pSrcB->numCols != pDst->numCols)) { / Set status as ARM_MATH_SIZE_MISMATCH / status = ARM_MATH_SIZE_MISMATCH; } else #endif / #ifdef ARM_MATH_MATRIX_CHECK / { / Matrix transpose / do { / Apply loop unrolling and exchange the columns with row elements / col = numColsB >> 2; / The pointer px is set to starting address of the column being processed / px = pSrcBT + i; / First part of the processing with loop unrolling. Compute 4 outputs at a time. ** a second loop below computes the remaining 1 to 3 samples. / while(col > 0u) { / Read two elements from the row / in = __SIMD32(pInB)++; /* Unpack and store one element in the destination / #ifndef ARM_MATH_BIG_ENDIAN px = (q15_t) in; #else px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); #endif / #ifndef ARM_MATH_BIG_ENDIAN / / Update the pointer px to point to the next row of the transposed matrix / px += numRowsB; / Unpack and store the second element in the destination / #ifndef ARM_MATH_BIG_ENDIAN px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); #else px = (q15_t) in; #endif / #ifndef ARM_MATH_BIG_ENDIAN / / Update the pointer px to point to the next row of the transposed matrix / px += numRowsB; / Read two elements from the row / in = __SIMD32(pInB)++; /* Unpack and store one element in the destination / #ifndef ARM_MATH_BIG_ENDIAN px = (q15_t) in; #else px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); #endif / #ifndef ARM_MATH_BIG_ENDIAN / / Update the pointer px to point to the next row of the transposed matrix / px += numRowsB; / Unpack and store the second element in the destination / #ifndef ARM_MATH_BIG_ENDIAN px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); #else px = (q15_t) in; #endif / #ifndef ARM_MATH_BIG_ENDIAN / / Update the pointer px to point to the next row of the transposed matrix / px += numRowsB; / Decrement the column loop counter / col--; } / If the columns of pSrcB is not a multiple of 4, compute any remaining output samples here. ** No loop unrolling is used. / col = numColsB % 0x4u; while(col > 0u) { / Read and store the input element in the destination / px = pInB++; / Update the pointer px to point to the next row of the transposed matrix / px += numRowsB; / Decrement the column loop counter / col--; } i++; / Decrement the row loop counter / row--; } while(row > 0u); / Reset the variables for the usage in the following multiplication process / row = numRowsA; i = 0u; px = pDst->pData; / The following loop performs the dot-product of each row in pSrcA with each column in pSrcB / / row loop / do { / For every row wise process, the column loop counter is to be initiated / col = numColsB; / For every row wise process, the pIn2 pointer is set ** to the starting address of the transposed pSrcB data / pInB = pSrcBT; / column loop / do { / Set the variable sum, that acts as accumulator, to zero / sum = 0; / Apply loop unrolling and compute 2 MACs simultaneously. / colCnt = numColsA >> 1; / Initiate the pointer pIn1 to point to the starting address of the column being processed / pInA = pSrcA->pData + i; / matrix multiplication / while(colCnt > 0u) { / c(m,n) = a(1,1)b(1,1) + a(1,2) b(2,1) + .... + a(m,p)b(p,n) / sum = __SMLAD(__SIMD32(pInA)++, __SIMD32(pInB)++, sum); /* Decrement the loop counter / colCnt--; } / process odd column samples / if((numColsA & 0x1u) > 0u) { / c(m,n) = a(1,1)b(1,1) + a(1,2) b(2,1) + .... + a(m,p)b(p,n) / sum += ((q31_t) * pInA * (pInB++)); } / Saturate and store the result in the destination buffer / px = (q15_t) (sum >> 15); px++; /* Decrement the column loop counter / col--; } while(col > 0u); i = i + numColsA; / Decrement the row loop counter / row--; } while(row > 0u); / set status as ARM_MATH_SUCCESS / status = ARM_MATH_SUCCESS; } / Return to application / return (status); } /* * @} end of MatrixMult group */	1137519-player	lib/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_fast_q15.c	C	lgpl	9,185
/* ---------------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_mat_add_f32.c * * Description: Floating-point matrix addition * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * * Version 0.0.5 2010/04/26 * incorporated review comments and updated with latest CMSIS layer * * Version 0.0.3 2010/03/10 * Initial version * -------------------------------------------------------------------------- / #include "arm_math.h" /* * @ingroup groupMatrix / /* * @defgroup MatrixAdd Matrix Addition * * Adds two matrices. * \image html MatrixAddition.gif "Addition of two 3 x 3 matrices" * * The functions check to make sure that * <code>pSrcA</code>, <code>pSrcB</code>, and <code>pDst</code> have the same * number of rows and columns. / /* * @addtogroup MatrixAdd * @{ / /* * @brief Floating-point matrix addition. * @param[in] pSrcA points to the first input matrix structure @param[in] pSrcB points to the second input matrix structure @param[out] pDst points to output matrix structure @return The function returns either * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking. / arm_status arm_mat_add_f32( const arm_matrix_instance_f32 pSrcA, const arm_matrix_instance_f32 * pSrcB, arm_matrix_instance_f32 * pDst) { float32_t pIn1 = pSrcA->pData; / input data matrix pointer A / float32_t pIn2 = pSrcB->pData; /* input data matrix pointer B / float32_t pOut = pDst->pData; /* output data matrix pointer / uint32_t numSamples; / total number of elements in the matrix / uint32_t blkCnt; / loop counters / arm_status status; / status of matrix addition / #ifdef ARM_MATH_MATRIX_CHECK / Check for matrix mismatch condition / if((pSrcA->numRows != pSrcB->numRows) \|\| (pSrcA->numCols != pSrcB->numCols) \|\| (pSrcA->numRows != pDst->numRows) \|\| (pSrcA->numCols != pDst->numCols)) { / Set status as ARM_MATH_SIZE_MISMATCH / status = ARM_MATH_SIZE_MISMATCH; } else #endif / #ifdef ARM_MATH_MATRIX_CHECK / { / Total number of samples in the input matrix / numSamples = (uint32_t) pSrcA->numRows pSrcA->numCols; #ifndef ARM_MATH_CM0 /* Run the below code for Cortex-M4 and Cortex-M3 / / Loop unrolling / blkCnt = numSamples >> 2u; / First part of the processing with loop unrolling. Compute 4 outputs at a time. ** a second loop below computes the remaining 1 to 3 samples. / while(blkCnt > 0u) { / C(m,n) = A(m,n) + B(m,n) / / Add and then store the results in the destination buffer. / pOut++ = (pIn1++) + (pIn2++); pOut++ = (pIn1++) + (pIn2++); pOut++ = (pIn1++) + (pIn2++); pOut++ = (pIn1++) + (pIn2++); / Decrement the loop counter / blkCnt--; } / If the numSamples is not a multiple of 4, compute any remaining output samples here. ** No loop unrolling is used. / blkCnt = numSamples % 0x4u; #else / Run the below code for Cortex-M0 / / Initialize blkCnt with number of samples / blkCnt = numSamples; #endif / #ifndef ARM_MATH_CM0 / while(blkCnt > 0u) { / C(m,n) = A(m,n) + B(m,n) / / Add and then store the results in the destination buffer. / pOut++ = (pIn1++) + (pIn2++); /* Decrement the loop counter / blkCnt--; } / set status as ARM_MATH_SUCCESS / status = ARM_MATH_SUCCESS; } / Return to application / return (status); } /* * @} end of MatrixAdd group */	1137519-player	lib/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_f32.c	C	lgpl	4,663
/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_mat_mult_f32.c * * Description: Floating-point matrix multiplication. * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * * Version 0.0.5 2010/04/26 * incorporated review comments and updated with latest CMSIS layer * * Version 0.0.3 2010/03/10 * Initial version * -------------------------------------------------------------------- / #include "arm_math.h" /* * @ingroup groupMatrix / /* * @defgroup MatrixMult Matrix Multiplication * * Multiplies two matrices. * * \image html MatrixMultiplication.gif "Multiplication of two 3 x 3 matrices" * Matrix multiplication is only defined if the number of columns of the * first matrix equals the number of rows of the second matrix. * Multiplying an <code>M x N</code> matrix with an <code>N x P</code> matrix results * in an <code>M x P</code> matrix. * When matrix size checking is enabled, the functions check: (1) that the inner dimensions of * <code>pSrcA</code> and <code>pSrcB</code> are equal; and (2) that the size of the output * matrix equals the outer dimensions of <code>pSrcA</code> and <code>pSrcB</code>. / /* * @addtogroup MatrixMult * @{ / /* * @brief Floating-point matrix multiplication. * @param[in] pSrcA points to the first input matrix structure @param[in] pSrcB points to the second input matrix structure @param[out] pDst points to output matrix structure @return The function returns either * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking. / arm_status arm_mat_mult_f32( const arm_matrix_instance_f32 pSrcA, const arm_matrix_instance_f32 * pSrcB, arm_matrix_instance_f32 * pDst) { float32_t pIn1 = pSrcA->pData; / input data matrix pointer A / float32_t pIn2 = pSrcB->pData; /* input data matrix pointer B / float32_t pInA = pSrcA->pData; /* input data matrix pointer A / float32_t pOut = pDst->pData; /* output data matrix pointer / float32_t px; /* Temporary output data matrix pointer / float32_t sum; / Accumulator / uint16_t numRowsA = pSrcA->numRows; / number of rows of input matrix A / uint16_t numColsB = pSrcB->numCols; / number of columns of input matrix B / uint16_t numColsA = pSrcA->numCols; / number of columns of input matrix A / #ifndef ARM_MATH_CM0 / Run the below code for Cortex-M4 and Cortex-M3 / uint16_t col, i = 0u, j, row = numRowsA, colCnt; / loop counters / arm_status status; / status of matrix multiplication / #ifdef ARM_MATH_MATRIX_CHECK / Check for matrix mismatch condition / if((pSrcA->numCols != pSrcB->numRows) \|\| (pSrcA->numRows != pDst->numRows) \|\| (pSrcB->numCols != pDst->numCols)) { / Set status as ARM_MATH_SIZE_MISMATCH / status = ARM_MATH_SIZE_MISMATCH; } else #endif / #ifdef ARM_MATH_MATRIX_CHECK / { / The following loop performs the dot-product of each row in pSrcA with each column in pSrcB / / row loop / do { / Output pointer is set to starting address of the row being processed / px = pOut + i; / For every row wise process, the column loop counter is to be initiated / col = numColsB; / For every row wise process, the pIn2 pointer is set ** to the starting address of the pSrcB data / pIn2 = pSrcB->pData; j = 0u; / column loop / do { / Set the variable sum, that acts as accumulator, to zero / sum = 0.0f; / Initiate the pointer pIn1 to point to the starting address of the column being processed / pIn1 = pInA; / Apply loop unrolling and compute 4 MACs simultaneously. / colCnt = numColsA >> 2; / matrix multiplication / while(colCnt > 0u) { / c(m,n) = a(1,1)b(1,1) + a(1,2) b(2,1) + .... + a(m,p)b(p,n) / sum += pIn1++ (pIn2); pIn2 += numColsB; sum += pIn1++ * (pIn2); pIn2 += numColsB; sum += pIn1++ * (pIn2); pIn2 += numColsB; sum += pIn1++ * (pIn2); pIn2 += numColsB; / Decrement the loop count / colCnt--; } / If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here. ** No loop unrolling is used. / colCnt = numColsA % 0x4u; while(colCnt > 0u) { / c(m,n) = a(1,1)b(1,1) + a(1,2) b(2,1) + .... + a(m,p)b(p,n) / sum += pIn1++ (pIn2); pIn2 += numColsB; / Decrement the loop counter / colCnt--; } / Store the result in the destination buffer / px++ = sum; /* Update the pointer pIn2 to point to the starting address of the next column / j++; pIn2 = pSrcB->pData + j; / Decrement the column loop counter / col--; } while(col > 0u); #else / Run the below code for Cortex-M0 / float32_t pInB = pSrcB->pData; /* input data matrix pointer B / uint16_t col, i = 0u, row = numRowsA, colCnt; / loop counters / arm_status status; / status of matrix multiplication / #ifdef ARM_MATH_MATRIX_CHECK / Check for matrix mismatch condition / if((pSrcA->numCols != pSrcB->numRows) \|\| (pSrcA->numRows != pDst->numRows) \|\| (pSrcB->numCols != pDst->numCols)) { / Set status as ARM_MATH_SIZE_MISMATCH / status = ARM_MATH_SIZE_MISMATCH; } else #endif / #ifdef ARM_MATH_MATRIX_CHECK / { / The following loop performs the dot-product of each row in pInA with each column in pInB / / row loop / do { / Output pointer is set to starting address of the row being processed / px = pOut + i; / For every row wise process, the column loop counter is to be initiated / col = numColsB; / For every row wise process, the pIn2 pointer is set ** to the starting address of the pSrcB data / pIn2 = pSrcB->pData; / column loop / do { / Set the variable sum, that acts as accumulator, to zero / sum = 0.0f; / Initialize the pointer pIn1 to point to the starting address of the row being processed / pIn1 = pInA; / Matrix A columns number of MAC operations are to be performed / colCnt = numColsA; while(colCnt > 0u) { / c(m,n) = a(1,1)b(1,1) + a(1,2) b(2,1) + .... + a(m,p)b(p,n) / sum += pIn1++ (pIn2); pIn2 += numColsB; / Decrement the loop counter / colCnt--; } / Store the result in the destination buffer / px++ = sum; /* Decrement the column loop counter / col--; / Update the pointer pIn2 to point to the starting address of the next column / pIn2 = pInB + (numColsB - col); } while(col > 0u); #endif / #ifndef ARM_MATH_CM0 / / Update the pointer pInA to point to the starting address of the next row / i = i + numColsB; pInA = pInA + numColsA; / Decrement the row loop counter / row--; } while(row > 0u); / Set status as ARM_MATH_SUCCESS / status = ARM_MATH_SUCCESS; } / Return to application / return (status); } /* * @} end of MatrixMult group */	1137519-player	lib/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_f32.c	C	lgpl	8,719
/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_mat_sub_q15.c * * Description: Q15 Matrix subtraction * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * * Version 0.0.5 2010/04/26 * incorporated review comments and updated with latest CMSIS layer * * Version 0.0.3 2010/03/10 * Initial version * -------------------------------------------------------------------- / #include "arm_math.h" /* * @ingroup groupMatrix / /* * @addtogroup MatrixSub * @{ / /* * @brief Q15 matrix subtraction. * @param[in] pSrcA points to the first input matrix structure @param[in] pSrcB points to the second input matrix structure @param[out] pDst points to output matrix structure @return The function returns either * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking. * * <b>Scaling and Overflow Behavior:</b> * \par * The function uses saturating arithmetic. * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated. / arm_status arm_mat_sub_q15( const arm_matrix_instance_q15 pSrcA, const arm_matrix_instance_q15 * pSrcB, arm_matrix_instance_q15 * pDst) { q15_t pInA = pSrcA->pData; / input data matrix pointer A / q15_t pInB = pSrcB->pData; /* input data matrix pointer B / q15_t pOut = pDst->pData; /* output data matrix pointer / uint32_t numSamples; / total number of elements in the matrix / uint32_t blkCnt; / loop counters / arm_status status; / status of matrix subtraction / #ifdef ARM_MATH_MATRIX_CHECK / Check for matrix mismatch condition / if((pSrcA->numRows != pSrcB->numRows) \|\| (pSrcA->numCols != pSrcB->numCols) \|\| (pSrcA->numRows != pDst->numRows) \|\| (pSrcA->numCols != pDst->numCols)) { / Set status as ARM_MATH_SIZE_MISMATCH / status = ARM_MATH_SIZE_MISMATCH; } else #endif / #ifdef ARM_MATH_MATRIX_CHECK / { / Total number of samples in the input matrix / numSamples = (uint32_t) pSrcA->numRows pSrcA->numCols; #ifndef ARM_MATH_CM0 /* Run the below code for Cortex-M4 and Cortex-M3 / / Apply loop unrolling / blkCnt = numSamples >> 2u; / First part of the processing with loop unrolling. Compute 4 outputs at a time. ** a second loop below computes the remaining 1 to 3 samples. / while(blkCnt > 0u) { / C(m,n) = A(m,n) - B(m,n) / / Subtract, Saturate and then store the results in the destination buffer. / __SIMD32(pOut)++ = __QSUB16(__SIMD32(pInA)++, __SIMD32(pInB)++); __SIMD32(pOut)++ = __QSUB16(__SIMD32(pInA)++, __SIMD32(pInB)++); / Decrement the loop counter / blkCnt--; } / If the blockSize is not a multiple of 4, compute any remaining output samples here. ** No loop unrolling is used. / blkCnt = numSamples % 0x4u; while(blkCnt > 0u) { / C(m,n) = A(m,n) - B(m,n) / / Subtract and then store the results in the destination buffer. / pOut++ = (q15_t) __QSUB16(pInA++, pInB++); /* Decrement the loop counter / blkCnt--; } #else / Run the below code for Cortex-M0 / / Initialize blkCnt with number of samples / blkCnt = numSamples; while(blkCnt > 0u) { / C(m,n) = A(m,n) - B(m,n) / / Subtract and then store the results in the destination buffer. / pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ - pInB++), 16); / Decrement the loop counter / blkCnt--; } #endif / #ifndef ARM_MATH_CM0 / / Set status as ARM_MATH_SUCCESS / status = ARM_MATH_SUCCESS; } / Return to application / return (status); } /* * @} end of MatrixSub group */	1137519-player	lib/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_q15.c	C	lgpl	4,803
/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_mat_init_q15.c * * Description: Q15 matrix initialization. * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * * Version 0.0.5 2010/04/26 * incorporated review comments and updated with latest CMSIS layer * * Version 0.0.3 2010/03/10 * Initial version * -------------------------------------------------------------------------- / #include "arm_math.h" /* * @ingroup groupMatrix / /* * @addtogroup MatrixInit * @{ / /* * @brief Q15 matrix initialization. * @param[in,out] S points to an instance of the floating-point matrix structure. @param[in] nRows number of rows in the matrix. * @param[in] nColumns number of columns in the matrix. * @param[in] pData points to the matrix data array. @return none / void arm_mat_init_q15( arm_matrix_instance_q15 S, uint16_t nRows, uint16_t nColumns, q15_t * pData) { /* Assign Number of Rows / S->numRows = nRows; / Assign Number of Columns / S->numCols = nColumns; / Assign Data pointer / S->pData = pData; } /* * @} end of MatrixInit group */	1137519-player	lib/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q15.c	C	lgpl	1,995
;/************************************************************************// ; * @file startup_ARMCM4.s ; * @brief CMSIS Cortex-M4 Core Device Startup File ; * for CM4 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; ------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA \|.text\|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP MemManage_Handler\ PROC EXPORT MemManage_Handler [WEAK] B . ENDP BusFault_Handler\ PROC EXPORT BusFault_Handler [WEAK] B . ENDP UsageFault_Handler\ PROC EXPORT UsageFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP DebugMon_Handler\ PROC EXPORT DebugMon_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_graphic_equalizer_example/ARM/startup_ARMCM4.s	Unix Assembly	lgpl	5,000
;/************************************************************************// ; * @file startup_ARMCM3.s ; * @brief CMSIS Cortex-M3 Core Device Startup File ; * for CM3 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; ------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA \|.text\|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP MemManage_Handler\ PROC EXPORT MemManage_Handler [WEAK] B . ENDP BusFault_Handler\ PROC EXPORT BusFault_Handler [WEAK] B . ENDP UsageFault_Handler\ PROC EXPORT UsageFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP DebugMon_Handler\ PROC EXPORT DebugMon_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_graphic_equalizer_example/ARM/startup_ARMCM3.s	Unix Assembly	lgpl	5,000
;/************************************************************************// ; * @file startup_ARMCM0.s ; * @brief CMSIS Cortex-M0 Core Device Startup File ; * for CM0 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; ------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA \|.text\|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_graphic_equalizer_example/ARM/startup_ARMCM0.s	Motorola 68K Assembly	lgpl	4,363
/************************************************************************// * @file system_ARMCM0.c * @brief CMSIS Cortex-M0 Device System Source File * for CM0 Device Series * @version V1.05 * @date 26. July 2011 * * @note * Copyright (C) 2010-2011 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * *****************************************************************************/ #include "ARMCM0.h" /---------------------------------------------------------------------------- Define clocks ----------------------------------------------------------------------------/ #define __HSI ( 8000000UL) #define __XTAL (12000000UL) /* Oscillator frequency / #define __SYSTEM_CLOCK (4__XTAL) /---------------------------------------------------------------------------- Clock Variable definitions ----------------------------------------------------------------------------/ uint32_t SystemCoreClock = __SYSTEM_CLOCK;/!< System Clock Frequency (Core Clock)/ /---------------------------------------------------------------------------- Clock functions ----------------------------------------------------------------------------/ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency / { SystemCoreClock = __SYSTEM_CLOCK; } /* * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System. */ void SystemInit (void) { SystemCoreClock = __SYSTEM_CLOCK; #ifdef __USE_GPIO ARM_GPIO0->DATA[0].WORD = 0; ARM_GPIO0->IE = 0; ARM_GPIO0->DIR = 0xff83; ARM_GPIO1->DATA[0].WORD = 0; ARM_GPIO1->IE = 0; ARM_GPIO1->DIR = 0; ARM_GPIO2->DATA[0].WORD = 0; ARM_GPIO2->IE = 0; ARM_GPIO2->DIR = 0; #endif }	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_graphic_equalizer_example/system_ARMCM0.c	C	lgpl	2,488
/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 29. November 2010 * $Revision: V1.0.3 * * Project: CMSIS DSP Library * Title: arm_graphic_equalizer_example_q31.c * * Description: Example showing an audio graphic equalizer constructed * out of Biquad filters. * * Target Processor: Cortex-M4/Cortex-M3 * * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.1 2010/10/05 KK * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 KK * Production release and review comments incorporated. * ------------------------------------------------------------------- / /* * @ingroup groupExamples / /* * @defgroup GEQ5Band Graphic Audio Equalizer Example * * \par Description: * \par * This example demonstrates how a 5-band graphic equalizer can be constructed * using the Biquad cascade functions. * A graphic equalizer is used in audio applications to vary the tonal quality * of the audio. * * \par Block Diagram: * \par * The design is based on a cascade of 5 filter sections. * \image html GEQ_signalflow.gif * Each filter section is 4th order and consists of a cascade of two Biquads. * Each filter has a nominal gain of 0 dB (1.0 in linear units) and * boosts or cuts signals within a specific frequency range. * The edge frequencies between the 5 bands are 100, 500, 2000, and 6000 Hz. * Each band has an adjustable boost or cut in the range of +/- 9 dB. * For example, the band that extends from 500 to 2000 Hz has the response shown below: * \par * \image html GEQ_bandresponse.gif * \par * With 1 dB steps, each filter has a total of 19 different settings. * The filter coefficients for all possible 19 settings were precomputed * in MATLAB and stored in a table. With 5 different tables, there are * a total of 5 x 19 = 95 different 4th order filters. * All 95 responses are shown below: * \par * \image html GEQ_allbandresponse.gif * \par * Each 4th order filter has 10 coefficents for a grand total of 950 different filter * coefficients that must be tabulated. The input and output data is in Q31 format. * For better noise performance, the two low frequency bands are implemented using the high * precision 32x64-bit Biquad filters. The remaining 3 high frequency bands use standard * 32x32-bit Biquad filters. The input signal used in the example is a logarithmic chirp. * \par * \image html GEQ_inputchirp.gif * \par * The array <code>bandGains</code> specifies the gain in dB to apply in each band. * For example, if <code>bandGains={0, -3, 6, 4, -6};</code> then the output signal will be: * \par * \image html GEQ_outputchirp.gif * \par * \note The output chirp signal follows the gain or boost of each band. * \par * * \par Variables Description: * \par * \li \c testInput_f32 points to the input data * \li \c testRefOutput_f32 points to the reference output data * \li \c testOutput points to the test output data * \li \c inputQ31 temporary input buffer * \li \c outputQ31 temporary output buffer * \li \c biquadStateBand1Q31 points to state buffer for band1 * \li \c biquadStateBand2Q31 points to state buffer for band2 * \li \c biquadStateBand3Q31 points to state buffer for band3 * \li \c biquadStateBand4Q31 points to state buffer for band4 * \li \c biquadStateBand5Q31 points to state buffer for band5 * \li \c coeffTable points to coefficient buffer for all bands * \li \c gainDB gain buffer which has gains applied for all the bands * * \par CMSIS DSP Software Library Functions Used: * \par * - arm_biquad_cas_df1_32x64_init_q31() * - arm_biquad_cas_df1_32x64_q31() * - arm_biquad_cascade_df1_init_q31() * - arm_biquad_cascade_df1_q31() * - arm_scale_q31() * - arm_scale_f32() * - arm_float_to_q31() * - arm_q31_to_float() * * <b> Refer </b> * \link arm_graphic_equalizer_example_q31.c \endlink * / /* \example arm_graphic_equalizer_example_q31.c / #include "arm_math.h" #include "math_helper.h" / Length of the overall data in the test / #define TESTLENGTH 320 / Block size for the underlying processing / #define BLOCKSIZE 32 / Total number of blocks to run / #define NUMBLOCKS (TESTLENGTH/BLOCKSIZE) / Number of 2nd order Biquad stages per filter / #define NUMSTAGES 2 #define SNR_THRESHOLD_F32 98 / ------------------------------------------------------------------- * External Declarations for Input and Output buffers * ------------------------------------------------------------------- / extern float32_t testInput_f32[TESTLENGTH]; static float32_t testOutput[TESTLENGTH]; extern float32_t testRefOutput_f32[TESTLENGTH]; / ---------------------------------------------------------------------- Q31 state buffers for Band1, Band2, Band3, Band4, Band5 ------------------------------------------------------------------- / static q63_t biquadStateBand1Q31[4 2]; static q63_t biquadStateBand2Q31[4 * 2]; static q31_t biquadStateBand3Q31[4 * 2]; static q31_t biquadStateBand4Q31[4 * 2]; static q31_t biquadStateBand5Q31[4 * 2]; /* ---------------------------------------------------------------------- Q31 input and output buffers ------------------------------------------------------------------- / q31_t inputQ31[BLOCKSIZE]; q31_t outputQ31[BLOCKSIZE]; / ---------------------------------------------------------------------- Entire coefficient table. There are 10 coefficients per 4th order Biquad cascade filter. The first 10 coefficients correspond to the -9 dB gain setting of band 1; the next 10 coefficient correspond to the -8 dB gain setting of band 1; and so on. There are 1019=190 coefficients in total * for band 1 (gains = -9, -8, -7, ..., 9). After this come the 190 coefficients for band 2. The coefficients are in Q29 format and require a postShift of 2. ------------------------------------------------------------------- / const q31_t coeffTable[950] = { / Band 1, -9 dB gain / 535576962, -1071153923, 535576962, 1073741824, -536870912, 535576962, -1063501998, 527979313, 1060865294, -524146981, / Band 1, -8 dB gain / 535723226, -1071446451, 535723226, 1073741824, -536870912, 535723226, -1063568947, 527903217, 1061230578, -524503778, 535868593, -1071737186, 535868593, 1073741824, -536870912, 535868593, -1063627467, 527819780, 1061585502, -524850686, 536013181, -1072026363, 536013181, 1073741824, -536870912, 536013181, -1063677598, 527728935, 1061930361, -525187972, 536157109, -1072314217, 536157109, 1073741824, -536870912, 536157109, -1063719372, 527630607, 1062265438, -525515897, 536300492, -1072600983, 536300492, 1073741824, -536870912, 536300492, -1063752815, 527524720, 1062591011, -525834716, 536443447, -1072886894, 536443447, 1073741824, -536870912, 536443447, -1063777945, 527411186, 1062907350, -526144676, 536586091, -1073172183, 536586091, 1073741824, -536870912, 536586091, -1063794775, 527289917, 1063214717, -526446017, 536728541, -1073457082, 536728541, 1073741824, -536870912, 536728541, -1063803308, 527160815, 1063513366, -526738975, 536870912, -1073741824, 536870912, 1073741824, -536870912, 536870912, -1063803543, 527023777, 1063803543, -527023777, 537013321, -1074026642, 537013321, 1073741824, -536870912, 537013321, -1063795470, 526878696, 1064085490, -527300648, 537155884, -1074311768, 537155884, 1073741824, -536870912, 537155884, -1063779073, 526725455, 1064359439, -527569803, 537298718, -1074597435, 537298718, 1073741824, -536870912, 537298718, -1063754328, 526563934, 1064625617, -527831454, 537441939, -1074883878, 537441939, 1073741824, -536870912, 537441939, -1063721205, 526394005, 1064884245, -528085806, 537585666, -1075171331, 537585666, 1073741824, -536870912, 537585666, -1063679666, 526215534, 1065135536, -528333059, 537730015, -1075460030, 537730015, 1073741824, -536870912, 537730015, -1063629666, 526028380, 1065379699, -528573409, 537875106, -1075750212, 537875106, 1073741824, -536870912, 537875106, -1063571152, 525832396, 1065616936, -528807045, 538021057, -1076042114, 538021057, 1073741824, -536870912, 538021057, -1063504065, 525627429, 1065847444, -529034151, 538167989, -1076335977, 538167989, 1073741824, -536870912, 538167989, -1063428338, 525413317, 1066071412, -529254907, / Band 2, -9 dB gain / 531784976, -1055497692, 523873415, 1066213307, -529420241, 531784976, -1040357886, 509828014, 1028908252, -494627367, / Band 2, -8 dB gain / 532357636, -1056601982, 524400080, 1066115844, -529326645, 532357636, -1040623406, 509562600, 1030462237, -496062122, 532927392, -1057707729, 524931110, 1066024274, -529239070, 532927392, -1040848253, 509262081, 1031969246, -497457090, 533494678, -1058816094, 525467240, 1065939047, -529157961, 533494678, -1041032161, 508925950, 1033429976, -498812573, 534059929, -1059928204, 526009170, 1065860582, -529083734, 534059929, -1041174868, 508553717, 1034845124, -500128887, 534623580, -1061045148, 526557561, 1065789260, -529016764, 534623580, -1041276126, 508144920, 1036215393, -501406373, 535186068, -1062167969, 527113032, 1065725420, -528957385, 535186068, -1041335703, 507699125, 1037541500, -502645399, 535747827, -1063297666, 527676151, 1065669351, -528905879, 535747827, -1041353386, 507215934, 1038824183, -503846368, 536309295, -1064435183, 528247436, 1065621289, -528862476, 536309295, -1041328990, 506694984, 1040064203, -505009724, 536870912, -1065581413, 528827349, 1065581413, -528827349, 536870912, -1041262354, 506135953, 1041262354, -506135953, 537433117, -1066737194, 529416295, 1065549847, -528800610, 537433117, -1041153346, 505538564, 1042419457, -507225588, 537996352, -1067903307, 530014622, 1065526651, -528782316, 537996352, -1041001864, 504902578, 1043536370, -508279208, 538561061, -1069080480, 530622620, 1065511830, -528772462, 538561061, -1040807833, 504227800, 1044613981, -509297437, 539127690, -1070269387, 531240527, 1065505333, -528770987, 539127690, -1040571205, 503514074, 1045653211, -510280946, 539696690, -1071470656, 531868525, 1065507054, -528777778, 539696690, -1040291951, 502761277, 1046655011, -511230450, 540268512, -1072684867, 532506750, 1065516837, -528792672, 540268512, -1039970063, 501969320, 1047620358, -512146700, 540843613, -1073912567, 533155297, 1065534483, -528815459, 540843613, -1039605542, 501138139, 1048550251, -513030484, 541422451, -1075154268, 533814224, 1065559750, -528845892, 541422451, -1039198394, 500267687, 1049445708, -513882621, 542005489, -1076410460, 534483561, 1065592362, -528883686, 542005489, -1038748624, 499357932, 1050307760, -514703956, 518903861, -1001986830, 486725277, 1037235801, -502367695, 518903861, -945834422, 446371043, 902366163, -400700571, 520899989, -1005630916, 488289126, 1036926846, -502147311, 520899989, -946490935, 445581846, 907921945, -404936158, 522893209, -1009290002, 489869792, 1036650484, -501961419, 522893209, -947006359, 444685310, 913306106, -409075225, 524884763, -1012968199, 491470256, 1036407567, -501810737, 524884763, -947377809, 443679533, 918521018, -413116221, 526875910, -1016669649, 493093518, 1036198712, -501695739, 526875910, -947602324, 442562672, 923569247, -417057897, 528867927, -1020398503, 494742575, 1036024293, -501616651, 528867927, -947676875, 441332970, 928453558, -420899319, 530862111, -1024158905, 496420407, 1035884447, -501573457, 530862111, -947598385, 439988777, 933176909, -424639872, 532859778, -1027954970, 498129955, 1035779077, -501565907, 532859778, -947363742, 438528571, 937742446, -428279254, 534862260, -1031790763, 499874098, 1035707863, -501593525, 534862260, -946969823, 436950987, 942153486, -431817474, 536870912, -1035670279, 501655630, 1035670279, -501655630, 536870912, -946413508, 435254839, 946413508, -435254839, 538887107, -1039597419, 503477238, 1035665609, -501751354, 538887107, -945691703, 433439146, 950526127, -438591937, 540912240, -1043575967, 505341475, 1035692963, -501879659, 540912240, -944801359, 431503152, 954495080, -441829621, 542947726, -1047609569, 507250741, 1035751307, -502039364, 542947726, -943739490, 429446349, 958324201, -444968987, 544995000, -1051701717, 509207261, 1035839473, -502229165, 544995000, -942503190, 427268492, 962017400, -448011351, 547055523, -1055855728, 511213065, 1035956193, -502447657, 547055523, -941089647, 424969617, 965578640, -450958226, 549130774, -1060074734, 513269973, 1036100110, -502693359, 549130774, -939496155, 422550049, 969011913, -453811298, 551222259, -1064361672, 515379585, 1036269804, -502964731, 551222259, -937720119, 420010407, 972321228, -456572401, 553331507, -1068719280, 517543273, 1036463810, -503260192, 553331507, -935759057, 417351601, 975510582, -459243495, 555460072, -1073150100, 519762181, 1036680633, -503578144, 555460072, -933610600, 414574832, 978583948, -461826644, 494084017, -851422604, 404056273, 930151631, -423619864, 494084017, -673714108, 339502486, 561843007, -265801750, 498713542, -859177141, 406587077, 929211656, -423786402, 498713542, -673274906, 338185129, 573719128, -272222942, 503369016, -867012190, 409148384, 928362985, -424054784, 503369016, -672533059, 336693984, 585290277, -278599028, 508052536, -874935599, 411746438, 927604291, -424422151, 508052536, -671478538, 335026905, 596558312, -284920289, 512766286, -882955583, 414387826, 926933782, -424885216, 512766286, -670100998, 333182045, 607525792, -291177811, 517512534, -891080712, 417079474, 926349262, -425440318, 517512534, -668389789, 331157902, 618195914, -297363485, 522293635, -899319903, 419828635, 925848177, -426083491, 522293635, -666333963, 328953368, 628572440, -303470012, 527112032, -907682405, 422642886, 925427679, -426810526, 527112032, -663922286, 326567785, 638659631, -309490882, 531970251, -916177781, 425530105, 925084675, -427617023, 531970251, -661143261, 324000998, 648462180, -315420352, 536870912, -924815881, 428498454, 924815881, -428498454, 536870912, -657985147, 321253420, 657985147, -321253420, 541816719, -933606817, 431556352, 924617870, -429450209, 541816719, -654435997, 318326093, 667233900, -326985786, 546810467, -942560921, 434712438, 924487114, -430467639, 546810467, -650483688, 315220754, 676214053, -332613816, 551855042, -951688708, 437975532, 924420027, -431546101, 551855042, -646115970, 311939896, 684931422, -338134495, 556953421, -961000826, 441354588, 924413001, -432680993, 556953421, -641320513, 308486839, 693391970, -343545389, 562108672, -970508005, 444858642, 924462435, -433867780, 562108672, -636084967, 304865786, 701601770, -348844597, 567323959, -980220994, 448496743, 924564764, -435102022, 567323959, -630397020, 301081886, 709566963, -354030710, 572602539, -990150500, 452277894, 924716482, -436379394, 572602539, -624244471, 297141281, 717293726, -359102767, 577947763, -1000307125, 456210977, 924914158, -437695705, 577947763, -617615296, 293051155, 724788245, -364060214, 583363084, -1010701292, 460304674, 925154455, -439046908, 583363084, -610497723, 288819761, 732056685, -368902865, 387379495, -506912469, 196933274, 840112184, -347208270, 387379495, 506912469, 196933274, -840112184, -347208270, 401658082, -532275898, 207149427, 833765363, -343175316, 401658082, 532275898, 207149427, -833765363, -343175316, 416472483, -558722695, 217902617, 827270154, -339107319, 416472483, 558722695, 217902617, -827270154, -339107319, 431841949, -586290861, 229212798, 820624988, -335007540, 431841949, 586290861, 229212798, -820624988, -335007540, 447786335, -615019650, 241100489, 813828443, -330879528, 447786335, 615019650, 241100489, -813828443, -330879528, 464326111, -644949597, 253586805, 806879270, -326727141, 464326111, 644949597, 253586805, -806879270, -326727141, 481482377, -676122557, 266693475, 799776409, -322554559, 481482377, 676122557, 266693475, -799776409, -322554559, 499276882, -708581728, 280442865, 792519013, -318366296, 499276882, 708581728, 280442865, -792519013, -318366296, 517732032, -742371685, 294857996, 785106465, -314167221, 517732032, 742371685, 294857996, -785106465, -314167221, 536870912, -777538408, 309962566, 777538408, -309962566, 536870912, 777538408, 309962566, -777538408, -309962566, 556717294, -814129313, 325780968, 769814766, -305757943, 556717294, 814129313, 325780968, -769814766, -305757943, 577295658, -852193284, 342338310, 761935777, -301559360, 577295658, 852193284, 342338310, -761935777, -301559360, 598631206, -891780698, 359660433, 753902014, -297373230, 598631206, 891780698, 359660433, -753902014, -297373230, 620749877, -932943463, 377773927, 745714425, -293206383, 620749877, 932943463, 377773927, -745714425, -293206383, 643678365, -975735041, 396706151, 737374355, -289066077, 643678365, 975735041, 396706151, -737374355, -289066077, 667444134, -1020210487, 416485252, 728883588, -284960004, 667444134, 1020210487, 416485252, -728883588, -284960004, 692075438, -1066426476, 437140179, 720244375, -280896294, 692075438, 1066426476, 437140179, -720244375, -280896294, 717601336, -1114441339, 458700704, 711459472, -276883515, 717601336, 1114441339, 458700704, -711459472, -276883515, 744051710, -1164315096, 481197437, 702532174, -272930673, 744051710, 1164315096, 481197437, -702532174, -272930673 }; / ---------------------------------------------------------------------- Desired gains, in dB, per band ------------------------------------------------------------------- / int gainDB[5] = {0, -3, 6, 4, -6}; float32_t snr; / ---------------------------------------------------------------------- * Graphic equalizer Example * ------------------------------------------------------------------- / int32_t main(void) { float32_t inputF32, outputF32; arm_biquad_cas_df1_32x64_ins_q31 S1; arm_biquad_cas_df1_32x64_ins_q31 S2; arm_biquad_casd_df1_inst_q31 S3; arm_biquad_casd_df1_inst_q31 S4; arm_biquad_casd_df1_inst_q31 S5; int i; int32_t status; inputF32 = &testInput_f32[0]; outputF32 = &testOutput[0]; / Initialize the state and coefficient buffers for all Biquad sections / arm_biquad_cas_df1_32x64_init_q31(&S1, NUMSTAGES, (q31_t ) &coeffTable[1900 + 10(gainDB[0] + 9)], &biquadStateBand1Q31[0], 2); arm_biquad_cas_df1_32x64_init_q31(&S2, NUMSTAGES, (q31_t ) &coeffTable[1901 + 10(gainDB[1] + 9)], &biquadStateBand2Q31[0], 2); arm_biquad_cascade_df1_init_q31(&S3, NUMSTAGES, (q31_t ) &coeffTable[1902 + 10(gainDB[2] + 9)], &biquadStateBand3Q31[0], 2); arm_biquad_cascade_df1_init_q31(&S4, NUMSTAGES, (q31_t ) &coeffTable[1903 + 10(gainDB[3] + 9)], &biquadStateBand4Q31[0], 2); arm_biquad_cascade_df1_init_q31(&S5, NUMSTAGES, (q31_t ) &coeffTable[1904 + 10(gainDB[4] + 9)], &biquadStateBand5Q31[0], 2); /* Call the process functions and needs to change filter coefficients for varying the gain of each band / for(i=0; i < NUMBLOCKS; i++) { / ---------------------------------------------------------------------- Convert block of input data from float to Q31 ------------------------------------------------------------------- / arm_float_to_q31(inputF32 + (iBLOCKSIZE), inputQ31, BLOCKSIZE); /* ---------------------------------------------------------------------- Scale down by 1/8. This provides additional headroom so that the graphic EQ can apply gain. ** ------------------------------------------------------------------- / arm_scale_q31(inputQ31, 0x7FFFFFFF, -3, inputQ31, BLOCKSIZE); / ---------------------------------------------------------------------- Call the Q31 Biquad Cascade DF1 32x64 process function for band1, band2 ------------------------------------------------------------------- / arm_biquad_cas_df1_32x64_q31(&S1, inputQ31, outputQ31, BLOCKSIZE); arm_biquad_cas_df1_32x64_q31(&S2, outputQ31, outputQ31, BLOCKSIZE); / ---------------------------------------------------------------------- Call the Q31 Biquad Cascade DF1 process function for band3, band4, band5 ------------------------------------------------------------------- / arm_biquad_cascade_df1_q31(&S3, outputQ31, outputQ31, BLOCKSIZE); arm_biquad_cascade_df1_q31(&S4, outputQ31, outputQ31, BLOCKSIZE); arm_biquad_cascade_df1_q31(&S5, outputQ31, outputQ31, BLOCKSIZE); / ---------------------------------------------------------------------- Convert Q31 result back to float ------------------------------------------------------------------- / arm_q31_to_float(outputQ31, outputF32 + (i BLOCKSIZE), BLOCKSIZE); /* ---------------------------------------------------------------------- Scale back up ------------------------------------------------------------------- / arm_scale_f32(outputF32 + (i BLOCKSIZE), 8.0f, outputF32 + (i * BLOCKSIZE), BLOCKSIZE); }; snr = arm_snr_f32(testRefOutput_f32, testOutput, TESTLENGTH); if (snr < SNR_THRESHOLD_F32) { status = ARM_MATH_TEST_FAILURE; } else { status = ARM_MATH_SUCCESS; } /* ---------------------------------------------------------------------- Loop here if the signal does not match the reference output. ------------------------------------------------------------------- / if( status != ARM_MATH_SUCCESS) { while(1); } while(1); / main function does not return / } /* \endlink */	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_graphic_equalizer_example/arm_graphic_equalizer_example_q31.c	C	lgpl	22,327
#include "arm_math.h" float32_t testRefOutput_f32[320] = { 0.000000000000000000, 0.001898396760225296, 0.004215449094772339, 0.007432077080011368, 0.010948467999696732, 0.015026375651359558, 0.019191544502973557, 0.023574527353048325, 0.027919445186853409, 0.032277785241603851, 0.036551639437675476, 0.040732793509960175, 0.044799156486988068, 0.048710610717535019, 0.052476800978183746, 0.056059073656797409, 0.059482168406248093, 0.062726479023694992, 0.065821025520563126, 0.068763464689254761, 0.071577839553356171, 0.074270240962505341, 0.076856281608343124, 0.079344697296619415, 0.081745062023401260, 0.084067162126302719, 0.086318407207727432, 0.088509257882833481, 0.090647127479314804, 0.092742368578910828, 0.094802625477313995, 0.096837285906076431, 0.098853722214698792, 0.100859899073839190, 0.102862443774938580, 0.104867763817310330, 0.106881409883499150, 0.108908228576183320, 0.110952425748109820, 0.113017357885837550, 0.115105822682380680, 0.117219865322113040, 0.119361080229282380, 0.121530555188655850, 0.123729091137647630, 0.125957202166318890, 0.128215309232473370, 0.130503740161657330, 0.132822841405868530, 0.135173004120588300, 0.137554679065942760, 0.139968376606702800, 0.142414685338735580, 0.144894234836101530, 0.147407654672861100, 0.149955596774816510, 0.152538605034351350, 0.155157200992107390, 0.157811731100082400, 0.160502441227436070, 0.163229387253522870, 0.165992442518472670, 0.168791320174932480, 0.171625509858131410, 0.174494370818138120, 0.177397061139345170, 0.180332608520984650, 0.183299910277128220, 0.186297744512557980, 0.189324837177991870, 0.192379791289567950, 0.195461250841617580, 0.198567759245634080, 0.201697919517755510, 0.204850304871797560, 0.208023533225059510, 0.211216274648904800, 0.214427210390567780, 0.217655111104249950, 0.220898788422346120, 0.224157124757766720, 0.227429077029228210, 0.230713658034801480, 0.234009962528944020, 0.237317133694887160, 0.240634419023990630, 0.243961080908775330, 0.247296508401632310, 0.250640105456113820, 0.253991369158029560, 0.257349837571382520, 0.260715119540691380, 0.264086868613958360, 0.267464816570281980, 0.270848698914051060, 0.274238351732492450, 0.277633611112833020, 0.281034380197525020, 0.284440591931343080, 0.287852220237255100, 0.291269283741712570, 0.294691801071166990, 0.298119872808456420, 0.301553562283515930, 0.304993014782667160, 0.308438356965780260, 0.311889752745628360, 0.315347377210855480, 0.318811416625976560, 0.322282072156667710, 0.325759567320346830, 0.329244095832109450, 0.332735907286405560, 0.336235217750072480, 0.339742250740528110, 0.343257248401641850, 0.346780419349670410, 0.350311983376741410, 0.353852160274982450, 0.357401121407747270, 0.360959105193614960, 0.364526227116584780, 0.368102725595235820, 0.371688675135374070, 0.375284302979707720, 0.378889638930559160, 0.382504884153604510, 0.386130042374134060, 0.389765247702598570, 0.393410529941320420, 0.397065933793783190, 0.400731507688760760, 0.404407206922769550, 0.408093083649873730, 0.411789052188396450, 0.415495119988918300, 0.419211201369762420, 0.422937240451574330, 0.426673140376806260, 0.430418811738491060, 0.434174135327339170, 0.437938995659351350, 0.441713258624076840, 0.445496778935194020, 0.449289388954639430, 0.453090950846672060, 0.456901267170906070, 0.460720170289278030, 0.464547459036111830, 0.468382950872182850, 0.472226426005363460, 0.476077698171138760, 0.479936532676219940, 0.483802750706672670, 0.487676106393337250, 0.491556398570537570, 0.495443399995565410, 0.499336875975131990, 0.503236617892980580, 0.507142387330532070, 0.511053957045078280, 0.514971107244491580, 0.518893606960773470, 0.522821225225925450, 0.526753749698400500, 0.530690938234329220, 0.534632585942745210, 0.538578454405069350, 0.542528338730335240, 0.546481993049383160, 0.550439231097698210, 0.554399792104959490, 0.558363504707813260, 0.562330115586519240, 0.566299438476562500, 0.570271246135234830, 0.574245333671569820, 0.578221492469310760, 0.582199502736330030, 0.586179181933403020, 0.590160276740789410, 0.594142623245716090, 0.598125983029603960, 0.602110169827938080, 0.606094967573881150, 0.610080175101757050, 0.614065583795309070, 0.618050977587699890, 0.622036151587963100, 0.626020893454551700, 0.630004994571208950, 0.633988231420516970, 0.637970402836799620, 0.641951277852058410, 0.645930647850036620, 0.649908289313316350, 0.653883971273899080, 0.657857488840818410, 0.661828581243753430, 0.665797054767608640, 0.669762641191482540, 0.673725124448537830, 0.677684243768453600, 0.681639779359102250, 0.685591462999582290, 0.689539063721895220, 0.693482317030429840, 0.697420965880155560, 0.701354760676622390, 0.705283410847187040, 0.709206689149141310, 0.713124278932809830, 0.717035952955484390, 0.720941375941038130, 0.724840316921472550, 0.728732451796531680, 0.732617516070604320, 0.736495196819305420, 0.740365199744701390, 0.744227230548858640, 0.748080968856811520, 0.751926124095916750, 0.755762357264757160, 0.759589381515979770, 0.763406842947006230, 0.767214450985193250, 0.771011855453252790, 0.774798732250928880, 0.778574761003255840, 0.782339565455913540, 0.786092851310968400, 0.789834223687648770, 0.793563373386859890, 0.797279909253120420, 0.800983514636754990, 0.804673787206411360, 0.808350402861833570, 0.812012966722249980, 0.815661124885082240, 0.819294504821300510, 0.822912722826004030, 0.826515413820743560, 0.830102190375328060, 0.833672653883695600, 0.837226435542106630, 0.840763118118047710, 0.844282336533069610, 0.847783654928207400, 0.851266715675592420, 0.854731071740388870, 0.858176350593566890, 0.861602116376161580, 0.865007970482110980, 0.868393491953611370, 0.871758259832859040, 0.875101849436759950, 0.878423850983381270, 0.881723806262016300, 0.885001312941312790, 0.888255912810564040, 0.891487173736095430, 0.894694659858942030, 0.897877920418977740, 0.901036512106657030, 0.904169965535402300, 0.907277844846248630, 0.910359673202037810, 0.913415014743804930, 0.916443370282649990, 0.919444311410188670, 0.922417331486940380, 0.925361987203359600, 0.928277771919965740, 0.931164238601922990, 0.934020876884460450, 0.936847217381000520, 0.939642757177352910, 0.942407000809907910, 0.945139460265636440, 0.947839632630348210, 0.950507018715143200, 0.953141096979379650, 0.955741371959447860, 0.958307322114706040, 0.960838429629802700, 0.963334184139966960, 0.965794049203395840, 0.968217510730028150, 0.970604017376899720, 0.972953058779239650, 0.975264083594083790, 0.977536566555500030, 0.979769956320524220, 0.981963708996772770, 0.984117280691862110, 0.986230112612247470, 0.988301653414964680, 0.990331344306468960, 0.992318630218505860, 0.994262944906950000, 0.996163722127676010, 0.998020399361848830, 0.999832402914762500, 1.001599155366420700, 1.003320086747407900, 1.004994612187147100, 1.006622135639190700, 1.008202098309993700, 1.009733878076076500, 1.011216927319765100, 1.012650609016418500, 1.014034371823072400, 1.015367589890956900, 1.016649682074785200, 1.017880033701658200, 1.019058048725128200, 1.020183108747005500, 1.021254621446132700, 1.022271949797868700, 1.023234523832798000, }; /* ---------------------------------------------------------------------- Test input - logarithmic chirp signal ------------------------------------------------------------------- */ float32_t testInput_f32[320] = { 0.000000000000000061, 0.002622410992047861, 0.005253663973466970, 0.007893770384930297, 0.010542741395035495, 0.013200587895525877, 0.015867320496454066, 0.018542949521290073, 0.021227485001971542, 0.023920936673895138, 0.026623313970853074, 0.029334626019908643, 0.032054881636210709, 0.034784089317753723, 0.037522257240071598, 0.040269393250875855, 0.043025504864628375, 0.045790599257054837, 0.048564683259595690, 0.051347763353792118, 0.054139845665610427, 0.056940935959702531, 0.059751039633601337, 0.062570161711849828, 0.065398306840066575, 0.068235479278943648, 0.071081682898178900, 0.073936921170339814, 0.076801197164660218, 0.079674513540768196, 0.082556872542344922, 0.085448275990715375, 0.088348725278367082, 0.091258221362398390, 0.094176764757897533, 0.097104355531246703, 0.100040993293358240, 0.102986677192832010, 0.105941405909045980, 0.108905177645166230, 0.111877990121087980, 0.114859840566297130, 0.117850725712659680, 0.120850641787131110, 0.123859584504392860, 0.126877549059407400, 0.129904530119898690, 0.132940521818751430, 0.135985517746334080, 0.139039510942737950, 0.142102493889940090, 0.145174458503884160, 0.148255396126476810, 0.151345297517508140, 0.154444152846483080, 0.157551951684374300, 0.160668682995289720, 0.163794335128054890, 0.166928895807713030, 0.170072352126936720, 0.173224690537355760, 0.176385896840798810, 0.179555956180445340, 0.182734853031894270, 0.185922571194139130, 0.189119093780459800, 0.192324403209221870, 0.195538481194587030, 0.198761308737133020, 0.201992866114384050, 0.205233132871247170, 0.208482087810360570, 0.211739708982344370, 0.215005973675965020, 0.218280858408200220, 0.221564338914212730, 0.224856390137231970, 0.228156986218334190, 0.231466100486134670, 0.234783705446379690, 0.238109772771442410, 0.241444273289723230, 0.244787176974952890, 0.248138452935395580, 0.251498069402956710, 0.254865993722190930, 0.258242192339209860, 0.261626630790492030, 0.265019273691591620, 0.268420084725748410, 0.271829026632395280, 0.275246061195565440, 0.278671149232197430, 0.282104250580339830, 0.285545324087251580, 0.288994327597401960, 0.292451217940364990, 0.295915950918612280, 0.299388481295203350, 0.302868762781368150, 0.306356748023990040, 0.309852388592980640, 0.313355634968552230, 0.316866436528383590, 0.320384741534681720, 0.323910497121136620, 0.327443649279772870, 0.330984142847692230, 0.334531921493712690, 0.338086927704900790, 0.341649102772995210, 0.345218386780727190, 0.348794718588032520, 0.352378035818156910, 0.355968274843654950, 0.359565370772282730, 0.363169257432780890, 0.366779867360555120, 0.370397131783246010, 0.374020980606193880, 0.377651342397795690, 0.381288144374756830, 0.384931312387234990, 0.388580770903877330, 0.392236442996751310, 0.395898250326170650, 0.399566113125414350, 0.403239950185338420, 0.406919678838884410, 0.410605214945482130, 0.414296472875345100, 0.417993365493664670, 0.421695804144698540, 0.425403698635752780, 0.429116957221065130, 0.432835486585582130, 0.436559191828633180, 0.440287976447505720, 0.444021742320914510, 0.447760389692375140, 0.451503817153472210, 0.455251921627031540, 0.459004598350192470, 0.462761740857380200, 0.466523240963184150, 0.470288988745136360, 0.474058872526396560, 0.477832778858340690, 0.481610592503056990, 0.485392196415748600, 0.489177471727042850, 0.492966297725213780, 0.496758551838309250, 0.500554109616195060, 0.504352844712508190, 0.508154628866524960, 0.511959331884944910, 0.515766821623591440, 0.519576963969030530, 0.523389622820107150, 0.527204660069405030, 0.531021935584629400, 0.534841307189911630, 0.538662630647041900, 0.542485759636628150, 0.546310545739186690, 0.550136838416161340, 0.553964484990880020, 0.557793330629441700, 0.561623218321546380, 0.565453988861259300, 0.569285480827721570, 0.573117530565801950, 0.576949972166696630, 0.580782637448476910, 0.584615355936589420, 0.588447954844309340, 0.592280259053150400, 0.596112091093235260, 0.599943271123626440, 0.603773616912622660, 0.607602943818024150, 0.611431064767369080, 0.615257790238142090, 0.619082928237961740, 0.622906284284749700, 0.626727661386881850, 0.630546860023327600, 0.634363678123782030, 0.638177911048790960, 0.641989351569874020, 0.645797789849653410, 0.649603013421986450, 0.653404807172108140, 0.657202953316791350, 0.660997231384523490, 0.664787418195706640, 0.668573287842887610, 0.672354611671016960, 0.676131158257749170, 0.679902693393781730, 0.683668980063242500, 0.687429778424128110, 0.691184845788802130, 0.694933936604551380, 0.698676802434213370, 0.702413191936877570, 0.706142850848662460, 0.709865521963579990, 0.713580945114492330, 0.717288857154159800, 0.720988991936399870, 0.724681080297347790, 0.728364850036839040, 0.732040025899910680, 0.735706329558433620, 0.739363479592880620, 0.743011191474238440, 0.746649177546067850, 0.750277147006723990, 0.753894805891742180, 0.757501857056394940, 0.761098000158428880, 0.764682931640995540, 0.768256344715771980, 0.771817929346292900, 0.775367372231492210, 0.778904356789468790, 0.782428563141483460, 0.785939668096195860, 0.789437345134148760, 0.792921264392515420, 0.796391092650110770, 0.799846493312681210, 0.803287126398485760, 0.806712648524170680, 0.810122712890953390, 0.813516969271127150, 0.816895063994893090, 0.820256639937531280, 0.823601336506926020, 0.826928789631450890, 0.830238631748229430, 0.833530491791779850, 0.836803995183058700, 0.840058763818912760, 0.843294416061954100, 0.846510566730867220, 0.849706827091166740, 0.852882804846411770, 0.856038104129895340, 0.859172325496819990, 0.862285065916973510, 0.865375918767918860, 0.868444473828712590, 0.871490317274166260, 0.874513031669661770, 0.877512195966544280, 0.880487385498096800, 0.883438171976119850, 0.886364123488128100, 0.889264804495180530, 0.892139775830360640, 0.894988594697921020, 0.897810814673113080, 0.900605985702712770, 0.903373654106265470, 0.906113362578062300, 0.908824650189867690, 0.911507052394417540, 0.914160101029702910, 0.916783324324059180, 0.919376246902079860, 0.921938389791372770, 0.924469270430179120, 0.926968402675872660, 0.929435296814361430, 0.931869459570409790, 0.934270394118903560, 0.936637600097074200, 0.938970573617708970, 0.941268807283364040, 0.943531790201601380, 0.945759008001275100, 0.947949942849885320, 0.950104073472023970, 0.952220875168933280, 0.954299819839202090, 0.956340376000621160, 0.958342008813221960, 0.960304180103520260, 0.962226348389994210, 0.964107968909812760, 0.965948493646846980, 0.967747371360983650, 0.969504047618768740, 0.971217964825405680, 0.972888562258134030, 0.974515276101013520, 0.976097539481141750, 0.977634782506330400, 0.979126432304266880, 0.980571913063189360, 0.981970646074102120, 0.983322049774557390, 0.984625539794035220, 0.985880529000944810, 0.987086427551279730, 0.988242642938953360, 0.989348580047844540, 0.990403641205582440, 0.991407226239099710, 0.992358732531984260, 0.993257555083659870, 0.994103086570423680, 0.994894717408374870, 0.995631835818261310, 0.996313827892278070, 0.996940077662846650, 0.997509967173408010, };	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_graphic_equalizer_example/arm_graphic_equalizer_data.c	C	lgpl	14,546
/************************************************************************// * @file system_ARMCM4.c * @brief CMSIS Cortex-M4 Device System Source File * for CM4 Device Series * @version V1.05 * @date 26. July 2011 * * @note * Copyright (C) 2010-2011 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * *****************************************************************************/ #include "ARMCM4.h" /---------------------------------------------------------------------------- Define clocks ----------------------------------------------------------------------------/ #define __HSI ( 8000000UL) #define __XTAL (12000000UL) /* Oscillator frequency / #define __SYSTEM_CLOCK (4__XTAL) /---------------------------------------------------------------------------- Clock Variable definitions ----------------------------------------------------------------------------/ uint32_t SystemCoreClock = __SYSTEM_CLOCK;/!< System Clock Frequency (Core Clock)/ /---------------------------------------------------------------------------- Clock functions ----------------------------------------------------------------------------/ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency / { SystemCoreClock = __SYSTEM_CLOCK; } /* * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System. / void SystemInit (void) { #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) SCB->CPACR \|= ((3UL << 102) \| /* set CP10 Full Access / (3UL << 112) ); /* set CP11 Full Access */ #endif SystemCoreClock = __SYSTEM_CLOCK; #ifdef __USE_GPIO ARM_GPIO0->DATA[0].WORD = 0; ARM_GPIO0->IE = 0; ARM_GPIO0->DIR = 0xff83; ARM_GPIO1->DATA[0].WORD = 0; ARM_GPIO1->IE = 0; ARM_GPIO1->DIR = 0; ARM_GPIO2->DATA[0].WORD = 0; ARM_GPIO2->IE = 0; ARM_GPIO2->DIR = 0; #endif }	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_graphic_equalizer_example/system_ARMCM4.c	C	lgpl	2,707
/************************************************************************// * @file system_ARMCM3.c * @brief CMSIS Cortex-M3 Device System Source File * for CM3 Device Series * @version V1.05 * @date 26. July 2011 * * @note * Copyright (C) 2010-2011 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * *****************************************************************************/ #include "ARMCM3.h" /---------------------------------------------------------------------------- Define clocks ----------------------------------------------------------------------------/ #define __HSI ( 8000000UL) #define __XTAL (12000000UL) /* Oscillator frequency / #define __SYSTEM_CLOCK (4__XTAL) /---------------------------------------------------------------------------- Clock Variable definitions ----------------------------------------------------------------------------/ uint32_t SystemCoreClock = __SYSTEM_CLOCK;/!< System Clock Frequency (Core Clock)/ /---------------------------------------------------------------------------- Clock functions ----------------------------------------------------------------------------/ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency / { SystemCoreClock = __SYSTEM_CLOCK; } /* * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System. */ void SystemInit (void) { SystemCoreClock = __SYSTEM_CLOCK; #ifdef __USE_GPIO ARM_GPIO0->DATA[0].WORD = 0; ARM_GPIO0->IE = 0; ARM_GPIO0->DIR = 0xff83; ARM_GPIO1->DATA[0].WORD = 0; ARM_GPIO1->IE = 0; ARM_GPIO1->DIR = 0; ARM_GPIO2->DATA[0].WORD = 0; ARM_GPIO2->IE = 0; ARM_GPIO2->DIR = 0; #endif }	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_graphic_equalizer_example/system_ARMCM3.c	C	lgpl	2,488
;/************************************************************************// ; * @file startup_ARMCM4.s ; * @brief CMSIS Cortex-M4 Core Device Startup File ; * for CM4 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; ------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA \|.text\|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP MemManage_Handler\ PROC EXPORT MemManage_Handler [WEAK] B . ENDP BusFault_Handler\ PROC EXPORT BusFault_Handler [WEAK] B . ENDP UsageFault_Handler\ PROC EXPORT UsageFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP DebugMon_Handler\ PROC EXPORT DebugMon_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_convolution_example/ARM/startup_ARMCM4.s	Unix Assembly	lgpl	5,000
;/************************************************************************// ; * @file startup_ARMCM3.s ; * @brief CMSIS Cortex-M3 Core Device Startup File ; * for CM3 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; ------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA \|.text\|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP MemManage_Handler\ PROC EXPORT MemManage_Handler [WEAK] B . ENDP BusFault_Handler\ PROC EXPORT BusFault_Handler [WEAK] B . ENDP UsageFault_Handler\ PROC EXPORT UsageFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP DebugMon_Handler\ PROC EXPORT DebugMon_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_convolution_example/ARM/startup_ARMCM3.s	Unix Assembly	lgpl	5,000
;/************************************************************************// ; * @file startup_ARMCM0.s ; * @brief CMSIS Cortex-M0 Core Device Startup File ; * for CM0 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; ------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA \|.text\|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_convolution_example/ARM/startup_ARMCM0.s	Motorola 68K Assembly	lgpl	4,363
/************************************************************************// * @file startup_ARMCM4.s * @brief CMSIS Cortex-M4 Core Device Startup File * for CM4 Device Series * @version V1.04 * @date 14. January 2011 ------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ****************************************************************************/ /**************************************************************************/ / Version: CodeSourcery Sourcery G++ Lite (with CS3) / /***************************************************************************/ / // <h> Stack Configuration // <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> // </h> / .equ Stack_Size, 0x00000100 .section ".stack", "w" .align 3 .globl __cs3_stack_mem .globl __cs3_stack_size __cs3_stack_mem: .if Stack_Size .space Stack_Size .endif .size __cs3_stack_mem, . - __cs3_stack_mem .set __cs3_stack_size, . - __cs3_stack_mem / // <h> Heap Configuration // <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> // </h> / .equ Heap_Size, 0x00001000 .section ".heap", "w" .align 3 .globl __cs3_heap_start .globl __cs3_heap_end __cs3_heap_start: .if Heap_Size .space Heap_Size .endif __cs3_heap_end: / Vector Table / .section ".cs3.interrupt_vector" .globl __cs3_interrupt_vector_cortex_m .type __cs3_interrupt_vector_cortex_m, %object __cs3_interrupt_vector_cortex_m: .long __cs3_stack / Top of Stack / .long __cs3_reset / Reset Handler / .long NMI_Handler / NMI Handler / .long HardFault_Handler / Hard Fault Handler / .long MemManage_Handler / MPU Fault Handler / .long BusFault_Handler / Bus Fault Handler / .long UsageFault_Handler / Usage Fault Handler / .long 0 / Reserved / .long 0 / Reserved / .long 0 / Reserved / .long 0 / Reserved / .long SVC_Handler / SVCall Handler / .long DebugMon_Handler / Debug Monitor Handler / .long 0 / Reserved / .long PendSV_Handler / PendSV Handler / .long SysTick_Handler / SysTick Handler / / External Interrupts / .long DEF_IRQHandler / 0: Default / .size __cs3_interrupt_vector_cortex_m, . - __cs3_interrupt_vector_cortex_m .thumb / Reset Handler / .section .cs3.reset,"x",%progbits .thumb_func .globl __cs3_reset_cortex_m .type __cs3_reset_cortex_m, %function __cs3_reset_cortex_m: .fnstart LDR R0, =SystemInit BLX R0 LDR R0,=_start BX R0 .pool .cantunwind .fnend .size __cs3_reset_cortex_m,.-__cs3_reset_cortex_m .section ".text" / Exception Handlers / .weak NMI_Handler .type NMI_Handler, %function NMI_Handler: B . .size NMI_Handler, . - NMI_Handler .weak HardFault_Handler .type HardFault_Handler, %function HardFault_Handler: B . .size HardFault_Handler, . - HardFault_Handler .weak MemManage_Handler .type MemManage_Handler, %function MemManage_Handler: B . .size MemManage_Handler, . - MemManage_Handler .weak BusFault_Handler .type BusFault_Handler, %function BusFault_Handler: B . .size BusFault_Handler, . - BusFault_Handler .weak UsageFault_Handler .type UsageFault_Handler, %function UsageFault_Handler: B . .size UsageFault_Handler, . - UsageFault_Handler .weak SVC_Handler .type SVC_Handler, %function SVC_Handler: B . .size SVC_Handler, . - SVC_Handler .weak DebugMon_Handler .type DebugMon_Handler, %function DebugMon_Handler: B . .size DebugMon_Handler, . - DebugMon_Handler .weak PendSV_Handler .type PendSV_Handler, %function PendSV_Handler: B . .size PendSV_Handler, . - PendSV_Handler .weak SysTick_Handler .type SysTick_Handler, %function SysTick_Handler: B . .size SysTick_Handler, . - SysTick_Handler / IRQ Handlers */ .globl Default_Handler .type Default_Handler, %function Default_Handler: B . .size Default_Handler, . - Default_Handler .macro IRQ handler .weak \handler .set \handler, Default_Handler .endm IRQ DEF_IRQHandler .end	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_convolution_example/GCC/startup_ARMCM4.s	Unix Assembly	lgpl	5,185
/************************************************************************// * @file startup_ARMCM3.s * @brief CMSIS Cortex-M3 Core Device Startup File * for CM3 Device Series * @version V1.04 * @date 14. January 2011 ------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ****************************************************************************/ /**************************************************************************/ / Version: CodeSourcery Sourcery G++ Lite (with CS3) / /***************************************************************************/ / // <h> Stack Configuration // <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> // </h> / .equ Stack_Size, 0x00000100 .section ".stack", "w" .align 3 .globl __cs3_stack_mem .globl __cs3_stack_size __cs3_stack_mem: .if Stack_Size .space Stack_Size .endif .size __cs3_stack_mem, . - __cs3_stack_mem .set __cs3_stack_size, . - __cs3_stack_mem / // <h> Heap Configuration // <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> // </h> / .equ Heap_Size, 0x00001000 .section ".heap", "w" .align 3 .globl __cs3_heap_start .globl __cs3_heap_end __cs3_heap_start: .if Heap_Size .space Heap_Size .endif __cs3_heap_end: / Vector Table / .section ".cs3.interrupt_vector" .globl __cs3_interrupt_vector_cortex_m .type __cs3_interrupt_vector_cortex_m, %object __cs3_interrupt_vector_cortex_m: .long __cs3_stack / Top of Stack / .long __cs3_reset / Reset Handler / .long NMI_Handler / NMI Handler / .long HardFault_Handler / Hard Fault Handler / .long MemManage_Handler / MPU Fault Handler / .long BusFault_Handler / Bus Fault Handler / .long UsageFault_Handler / Usage Fault Handler / .long 0 / Reserved / .long 0 / Reserved / .long 0 / Reserved / .long 0 / Reserved / .long SVC_Handler / SVCall Handler / .long DebugMon_Handler / Debug Monitor Handler / .long 0 / Reserved / .long PendSV_Handler / PendSV Handler / .long SysTick_Handler / SysTick Handler / / External Interrupts / .long DEF_IRQHandler / 0: Default / .size __cs3_interrupt_vector_cortex_m, . - __cs3_interrupt_vector_cortex_m .thumb / Reset Handler / .section .cs3.reset,"x",%progbits .thumb_func .globl __cs3_reset_cortex_m .type __cs3_reset_cortex_m, %function __cs3_reset_cortex_m: .fnstart LDR R0, =SystemInit BLX R0 LDR R0,=_start BX R0 .pool .cantunwind .fnend .size __cs3_reset_cortex_m,.-__cs3_reset_cortex_m .section ".text" / Exception Handlers / .weak NMI_Handler .type NMI_Handler, %function NMI_Handler: B . .size NMI_Handler, . - NMI_Handler .weak HardFault_Handler .type HardFault_Handler, %function HardFault_Handler: B . .size HardFault_Handler, . - HardFault_Handler .weak MemManage_Handler .type MemManage_Handler, %function MemManage_Handler: B . .size MemManage_Handler, . - MemManage_Handler .weak BusFault_Handler .type BusFault_Handler, %function BusFault_Handler: B . .size BusFault_Handler, . - BusFault_Handler .weak UsageFault_Handler .type UsageFault_Handler, %function UsageFault_Handler: B . .size UsageFault_Handler, . - UsageFault_Handler .weak SVC_Handler .type SVC_Handler, %function SVC_Handler: B . .size SVC_Handler, . - SVC_Handler .weak DebugMon_Handler .type DebugMon_Handler, %function DebugMon_Handler: B . .size DebugMon_Handler, . - DebugMon_Handler .weak PendSV_Handler .type PendSV_Handler, %function PendSV_Handler: B . .size PendSV_Handler, . - PendSV_Handler .weak SysTick_Handler .type SysTick_Handler, %function SysTick_Handler: B . .size SysTick_Handler, . - SysTick_Handler / IRQ Handlers */ .globl Default_Handler .type Default_Handler, %function Default_Handler: B . .size Default_Handler, . - Default_Handler .macro IRQ handler .weak \handler .set \handler, Default_Handler .endm IRQ DEF_IRQHandler .end	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_convolution_example/GCC/startup_ARMCM3.s	Unix Assembly	lgpl	5,185
/************************************************************************// * @file startup_ARMCM0.s * @brief CMSIS Cortex-M0 Core Device Startup File * for CM0 Device Series * @version V1.04 * @date 14. January 2011 ------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ****************************************************************************/ /**************************************************************************/ / Version: CodeSourcery Sourcery G++ Lite (with CS3) / /***************************************************************************/ / // <h> Stack Configuration // <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> // </h> / .equ Stack_Size, 0x00000100 .section ".stack", "w" .align 3 .globl __cs3_stack_mem .globl __cs3_stack_size __cs3_stack_mem: .if Stack_Size .space Stack_Size .endif .size __cs3_stack_mem, . - __cs3_stack_mem .set __cs3_stack_size, . - __cs3_stack_mem / // <h> Heap Configuration // <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> // </h> / .equ Heap_Size, 0x00001000 .section ".heap", "w" .align 3 .globl __cs3_heap_start .globl __cs3_heap_end __cs3_heap_start: .if Heap_Size .space Heap_Size .endif __cs3_heap_end: / Vector Table / .section ".cs3.interrupt_vector" .globl __cs3_interrupt_vector_cortex_m .type __cs3_interrupt_vector_cortex_m, %object __cs3_interrupt_vector_cortex_m: .long __cs3_stack / Top of Stack / .long __cs3_reset / Reset Handler / .long NMI_Handler / NMI Handler / .long HardFault_Handler / Hard Fault Handler / .long 0 / Reserved / .long 0 / Reserved / .long 0 / Reserved / .long 0 / Reserved / .long 0 / Reserved / .long 0 / Reserved / .long 0 / Reserved / .long SVC_Handler / SVCall Handler / .long 0 / Reserved / .long 0 / Reserved / .long PendSV_Handler / PendSV Handler / .long SysTick_Handler / SysTick Handler / / External Interrupts / .long DEF_IRQHandler / 0: Default / .size __cs3_interrupt_vector_cortex_m, . - __cs3_interrupt_vector_cortex_m .thumb / Reset Handler / .section .cs3.reset,"x",%progbits .thumb_func .globl __cs3_reset_cortex_m .type __cs3_reset_cortex_m, %function __cs3_reset_cortex_m: .fnstart LDR R0, =SystemInit BLX R0 LDR R0,=_start BX R0 .pool .cantunwind .fnend .size __cs3_reset_cortex_m,.-__cs3_reset_cortex_m .section ".text" / Exception Handlers / .weak NMI_Handler .type NMI_Handler, %function NMI_Handler: B . .size NMI_Handler, . - NMI_Handler .weak HardFault_Handler .type HardFault_Handler, %function HardFault_Handler: B . .size HardFault_Handler, . - HardFault_Handler .weak SVC_Handler .type SVC_Handler, %function SVC_Handler: B . .size SVC_Handler, . - SVC_Handler .weak PendSV_Handler .type PendSV_Handler, %function PendSV_Handler: B . .size PendSV_Handler, . - PendSV_Handler .weak SysTick_Handler .type SysTick_Handler, %function SysTick_Handler: B . .size SysTick_Handler, . - SysTick_Handler / IRQ Handlers */ .globl Default_Handler .type Default_Handler, %function Default_Handler: B . .size Default_Handler, . - Default_Handler .macro IRQ handler .weak \handler .set \handler, Default_Handler .endm IRQ DEF_IRQHandler .end	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_convolution_example/GCC/startup_ARMCM0.s	Unix Assembly	lgpl	4,534
/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 29. November 2010 * $Revision: V1.0.3 * * Project: CMSIS DSP Library * Title: arm_convolution_example_f32.c * * Description: Example code demonstrating Convolution of two input signals using fft. * * Target Processor: Cortex-M4/Cortex-M3 * * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.1 2010/10/05 KK * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 KK * Production release and review comments incorporated. * ------------------------------------------------------------------- / /* * @ingroup groupExamples / /* * @defgroup ConvolutionExample Convolution Example * * \par Description: * \par * Demonstrates the convolution theorem with the use of the Complex FFT, Complex-by-Complex * Multiplication, and Support Functions. * * \par Algorithm: * \par * The convolution theorem states that convolution in the time domain corresponds to * multiplication in the frequency domain. Therefore, the Fourier transform of the convoution of * two signals is equal to the product of their individual Fourier transforms. * The Fourier transform of a signal can be evaluated efficiently using the Fast Fourier Transform (FFT). * \par * Two input signals, <code>a[n]</code> and <code>b[n]</code>, with lengths \c n1 and \c n2 respectively, * are zero padded so that their lengths become \c N, which is greater than or equal to <code>(n1+n2-1)</code> * and is a power of 4 as FFT implementation is radix-4. * The convolution of <code>a[n]</code> and <code>b[n]</code> is obtained by taking the FFT of the input * signals, multiplying the Fourier transforms of the two signals, and taking the inverse FFT of * the multiplied result. * \par * This is denoted by the following equations: * <pre> A[k] = FFT(a[n],N) * B[k] = FFT(b[n],N) * conv(a[n], b[n]) = IFFT(A[k] * B[k], N)</pre> * where <code>A[k]</code> and <code>B[k]</code> are the N-point FFTs of the signals <code>a[n]</code> * and <code>b[n]</code> respectively. * The length of the convolved signal is <code>(n1+n2-1)</code>. * * \par Block Diagram: * \par * \image html Convolution.gif * * \par Variables Description: * \par * \li \c testInputA_f32 points to the first input sequence * \li \c srcALen length of the first input sequence * \li \c testInputB_f32 points to the second input sequence * \li \c srcBLen length of the second input sequence * \li \c outLen length of convolution output sequence, <code>(srcALen + srcBLen - 1)</code> * \li \c AxB points to the output array where the product of individual FFTs of inputs is stored. * * \par CMSIS DSP Software Library Functions Used: * \par * - arm_fill_f32() * - arm_copy_f32() * - arm_cfft_radix4_init_f32() * - arm_cfft_radix4_f32() * - arm_cmplx_mult_cmplx_f32() * * <b> Refer </b> * \link arm_convolution_example_f32.c \endlink * / /* \example arm_convolution_example_f32.c / #include "arm_math.h" #include "math_helper.h" / ---------------------------------------------------------------------- * Defines each of the tests performed * ------------------------------------------------------------------- / #define MAX_BLOCKSIZE 128 #define DELTA (0.000001f) #define SNR_THRESHOLD 90 / ---------------------------------------------------------------------- * Declare I/O buffers * ------------------------------------------------------------------- / float32_t Ak[MAX_BLOCKSIZE]; / Input A / float32_t Bk[MAX_BLOCKSIZE]; / Input B / float32_t AxB[MAX_BLOCKSIZE 2]; /* Output / / ---------------------------------------------------------------------- * Test input data for Floating point Convolution example for 32-blockSize * Generated by the MATLAB randn() function * ------------------------------------------------------------------- / float32_t testInputA_f32[64] = { -0.808920, 1.357369, 1.180861, -0.504544, 1.762637, -0.703285, 1.696966, 0.620571, -0.151093, -0.100235, -0.872382, -0.403579, -0.860749, -0.382648, -1.052338, 0.128113, -0.646269, 1.093377, -2.209198, 0.471706, 0.408901, 1.266242, 0.598252, 1.176827, -0.203421, 0.213596, -0.851964, -0.466958, 0.021841, -0.698938, -0.604107, 0.461778, -0.318219, 0.942520, 0.577585, 0.417619, 0.614665, 0.563679, -1.295073, -0.764437, 0.952194, -0.859222, -0.618554, -2.268542, -1.210592, 1.655853, -2.627219, -0.994249, -1.374704, 0.343799, 0.025619, 1.227481, -0.708031, 0.069355, -1.845228, -1.570886, 1.010668, -1.802084, 1.630088, 1.286090, -0.161050, -0.940794, 0.367961, 0.291907 }; float32_t testInputB_f32[64] = { 0.933724, 0.046881, 1.316470, 0.438345, 0.332682, 2.094885, 0.512081, 0.035546, 0.050894, -2.320371, 0.168711, -1.830493, -0.444834, -1.003242, -0.531494, -1.365600, -0.155420, -0.757692, -0.431880, -0.380021, 0.096243, -0.695835, 0.558850, -1.648962, 0.020369, -0.363630, 0.887146, 0.845503, -0.252864, -0.330397, 1.269131, -1.109295, -1.027876, 0.135940, 0.116721, -0.293399, -1.349799, 0.166078, -0.802201, 0.369367, -0.964568, -2.266011, 0.465178, 0.651222, -0.325426, 0.320245, -0.784178, -0.579456, 0.093374, 0.604778, -0.048225, 0.376297, -0.394412, 0.578182, -1.218141, -1.387326, 0.692462, -0.631297, 0.153137, -0.638952, 0.635474, -0.970468, 1.334057, -0.111370 }; const float testRefOutput_f32[126] = { -0.818943, 1.229484, -0.533664, 1.016604, 0.341875, -1.963656, 5.171476, 3.478033, 7.616361, 6.648384, 0.479069, 1.792012, -1.295591, -7.447818, 0.315830, -10.657445, -2.483469, -6.524236, -7.380591, -3.739005, -8.388957, 0.184147, -1.554888, 3.786508, -1.684421, 5.400610, -1.578126, 7.403361, 8.315999, 2.080267, 11.077776, 2.749673, 7.138962, 2.748762, 0.660363, 0.981552, 1.442275, 0.552721, -2.576892, 4.703989, 0.989156, 8.759344, -0.564825, -3.994680, 0.954710, -5.014144, 6.592329, 1.599488, -13.979146, -0.391891, -4.453369, -2.311242, -2.948764, 1.761415, -0.138322, 10.433007, -2.309103, 4.297153, 8.535523, 3.209462, 8.695819, 5.569919, 2.514304, 5.582029, 2.060199, 0.642280, 7.024616, 1.686615, -6.481756, 1.343084, -3.526451, 1.099073, -2.965764, -0.173723, -4.111484, 6.528384, -6.965658, 1.726291, 1.535172, 11.023435, 2.338401, -4.690188, 1.298210, 3.943885, 8.407885, 5.168365, 0.684131, 1.559181, 1.859998, 2.852417, 8.574070, -6.369078, 6.023458, 11.837963, -6.027632, 4.469678, -6.799093, -2.674048, 6.250367, -6.809971, -3.459360, 9.112410, -2.711621, -1.336678, 1.564249, -1.564297, -1.296760, 8.904013, -3.230109, 6.878013, -7.819823, 3.369909, -1.657410, -2.007358, -4.112825, 1.370685, -3.420525, -6.276605, 3.244873, -3.352638, 1.545372, 0.902211, 0.197489, -1.408732, 0.523390, 0.348440 }; / ---------------------------------------------------------------------- * Declare Global variables * ------------------------------------------------------------------- / uint32_t srcALen = 64; / Length of Input A / uint32_t srcBLen = 64; / Length of Input B / uint32_t outLen; / Length of convolution output / float32_t snr; / output SNR / int32_t main(void) { arm_status status; / Status of the example / arm_cfft_radix4_instance_f32 cfft_instance; / CFFT Structure instance / / CFFT Structure instance pointer / arm_cfft_radix4_instance_f32 cfft_instance_ptr = (arm_cfft_radix4_instance_f32) &cfft_instance; / output length of convolution / outLen = srcALen + srcBLen - 1; / Initialise the fft input buffers with all zeros / arm_fill_f32(0.0, Ak, MAX_BLOCKSIZE); arm_fill_f32(0.0, Bk, MAX_BLOCKSIZE); / Copy the input values to the fft input buffers / arm_copy_f32(testInputA_f32, Ak, MAX_BLOCKSIZE/2); arm_copy_f32(testInputB_f32, Bk, MAX_BLOCKSIZE/2); / Initialize the CFFT function to compute 64 point fft / status = arm_cfft_radix4_init_f32(cfft_instance_ptr, 64, 0, 1); / Transform input a[n] from time domain to frequency domain A[k] / arm_cfft_radix4_f32(cfft_instance_ptr, Ak); / Transform input b[n] from time domain to frequency domain B[k] / arm_cfft_radix4_f32(cfft_instance_ptr, Bk); / Complex Multiplication of the two input buffers in frequency domain / arm_cmplx_mult_cmplx_f32(Ak, Bk, AxB, MAX_BLOCKSIZE/2); / Initialize the CIFFT function to compute 64 point ifft / status = arm_cfft_radix4_init_f32(cfft_instance_ptr, 64, 1, 1); / Transform the multiplication output from frequency domain to time domain, that gives the convolved output / arm_cfft_radix4_f32(cfft_instance_ptr, AxB); / SNR Calculation / snr = arm_snr_f32((float32_t )testRefOutput_f32, AxB, srcALen + srcBLen - 1); /* Compare the SNR with threshold to test whether the computed output is matched with the reference output values. / if( snr > SNR_THRESHOLD) { status = ARM_MATH_SUCCESS; } if( status != ARM_MATH_SUCCESS) { while(1); } while(1); / main function does not return / } /* \endlink */	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_convolution_example/arm_convolution_example_f32.c	C	lgpl	9,563
/************************************************************************// * @file system_ARMCM0.c * @brief CMSIS Cortex-M0 Device System Source File * for CM0 Device Series * @version V1.05 * @date 26. July 2011 * * @note * Copyright (C) 2010-2011 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * *****************************************************************************/ #include "ARMCM0.h" /---------------------------------------------------------------------------- Define clocks ----------------------------------------------------------------------------/ #define __HSI ( 8000000UL) #define __XTAL (12000000UL) /* Oscillator frequency / #define __SYSTEM_CLOCK (4__XTAL) /---------------------------------------------------------------------------- Clock Variable definitions ----------------------------------------------------------------------------/ uint32_t SystemCoreClock = __SYSTEM_CLOCK;/!< System Clock Frequency (Core Clock)/ /---------------------------------------------------------------------------- Clock functions ----------------------------------------------------------------------------/ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency / { SystemCoreClock = __SYSTEM_CLOCK; } /* * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System. */ void SystemInit (void) { SystemCoreClock = __SYSTEM_CLOCK; #ifdef __USE_GPIO ARM_GPIO0->DATA[0].WORD = 0; ARM_GPIO0->IE = 0; ARM_GPIO0->DIR = 0xff83; ARM_GPIO1->DATA[0].WORD = 0; ARM_GPIO1->IE = 0; ARM_GPIO1->DIR = 0; ARM_GPIO2->DATA[0].WORD = 0; ARM_GPIO2->IE = 0; ARM_GPIO2->DIR = 0; #endif }	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_convolution_example/system_ARMCM0.c	C	lgpl	2,488
/************************************************************************// * @file system_ARMCM4.c * @brief CMSIS Cortex-M4 Device System Source File * for CM4 Device Series * @version V1.05 * @date 26. July 2011 * * @note * Copyright (C) 2010-2011 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * *****************************************************************************/ #include "ARMCM4.h" /---------------------------------------------------------------------------- Define clocks ----------------------------------------------------------------------------/ #define __HSI ( 8000000UL) #define __XTAL (12000000UL) /* Oscillator frequency / #define __SYSTEM_CLOCK (4__XTAL) /---------------------------------------------------------------------------- Clock Variable definitions ----------------------------------------------------------------------------/ uint32_t SystemCoreClock = __SYSTEM_CLOCK;/!< System Clock Frequency (Core Clock)/ /---------------------------------------------------------------------------- Clock functions ----------------------------------------------------------------------------/ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency / { SystemCoreClock = __SYSTEM_CLOCK; } /* * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System. / void SystemInit (void) { #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) SCB->CPACR \|= ((3UL << 102) \| /* set CP10 Full Access / (3UL << 112) ); /* set CP11 Full Access */ #endif SystemCoreClock = __SYSTEM_CLOCK; #ifdef __USE_GPIO ARM_GPIO0->DATA[0].WORD = 0; ARM_GPIO0->IE = 0; ARM_GPIO0->DIR = 0xff83; ARM_GPIO1->DATA[0].WORD = 0; ARM_GPIO1->IE = 0; ARM_GPIO1->DIR = 0; ARM_GPIO2->DATA[0].WORD = 0; ARM_GPIO2->IE = 0; ARM_GPIO2->DIR = 0; #endif }	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_convolution_example/system_ARMCM4.c	C	lgpl	2,707
/************************************************************************// * @file system_ARMCM3.c * @brief CMSIS Cortex-M3 Device System Source File * for CM3 Device Series * @version V1.05 * @date 26. July 2011 * * @note * Copyright (C) 2010-2011 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * *****************************************************************************/ #include "ARMCM3.h" /---------------------------------------------------------------------------- Define clocks ----------------------------------------------------------------------------/ #define __HSI ( 8000000UL) #define __XTAL (12000000UL) /* Oscillator frequency / #define __SYSTEM_CLOCK (4__XTAL) /---------------------------------------------------------------------------- Clock Variable definitions ----------------------------------------------------------------------------/ uint32_t SystemCoreClock = __SYSTEM_CLOCK;/!< System Clock Frequency (Core Clock)/ /---------------------------------------------------------------------------- Clock functions ----------------------------------------------------------------------------/ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency / { SystemCoreClock = __SYSTEM_CLOCK; } /* * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System. */ void SystemInit (void) { SystemCoreClock = __SYSTEM_CLOCK; #ifdef __USE_GPIO ARM_GPIO0->DATA[0].WORD = 0; ARM_GPIO0->IE = 0; ARM_GPIO0->DIR = 0xff83; ARM_GPIO1->DATA[0].WORD = 0; ARM_GPIO1->IE = 0; ARM_GPIO1->DIR = 0; ARM_GPIO2->DATA[0].WORD = 0; ARM_GPIO2->IE = 0; ARM_GPIO2->DIR = 0; #endif }	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_convolution_example/system_ARMCM3.c	C	lgpl	2,488
;/************************************************************************// ; * @file startup_ARMCM4.s ; * @brief CMSIS Cortex-M4 Core Device Startup File ; * for CM4 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; ------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA \|.text\|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP MemManage_Handler\ PROC EXPORT MemManage_Handler [WEAK] B . ENDP BusFault_Handler\ PROC EXPORT BusFault_Handler [WEAK] B . ENDP UsageFault_Handler\ PROC EXPORT UsageFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP DebugMon_Handler\ PROC EXPORT DebugMon_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_sin_cos_example/ARM/startup_ARMCM4.s	Unix Assembly	lgpl	5,000
;/************************************************************************// ; * @file startup_ARMCM3.s ; * @brief CMSIS Cortex-M3 Core Device Startup File ; * for CM3 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; ------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA \|.text\|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP MemManage_Handler\ PROC EXPORT MemManage_Handler [WEAK] B . ENDP BusFault_Handler\ PROC EXPORT BusFault_Handler [WEAK] B . ENDP UsageFault_Handler\ PROC EXPORT UsageFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP DebugMon_Handler\ PROC EXPORT DebugMon_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_sin_cos_example/ARM/startup_ARMCM3.s	Unix Assembly	lgpl	5,000
;/************************************************************************// ; * @file startup_ARMCM0.s ; * @brief CMSIS Cortex-M0 Core Device Startup File ; * for CM0 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; ------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA \|.text\|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_sin_cos_example/ARM/startup_ARMCM0.s	Motorola 68K Assembly	lgpl	4,363
/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 29. November 2010 * $Revision: V1.0.3 * * Project: CMSIS DSP Library * Title: arm_sin_cos_example_f32.c * * Description: Example code demonstrating sin and cos calculation of input signal. * * Target Processor: Cortex-M4/Cortex-M3 * * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.1 2010/10/05 KK * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 KK * Production release and review comments incorporated. * ------------------------------------------------------------------- / /* * @ingroup groupExamples / /* * @defgroup SinCosExample SineCosine Example * * \par Description: * \par * Demonstrates the Pythagorean trignometric identity with the use of Cosine, Sine, Vector * Multiplication, and Vector Addition functions. * * \par Algorithm: * \par * Mathematically, the Pythagorean trignometric identity is defined by the following equation: * <pre>sin(x) * sin(x) + cos(x) * cos(x) = 1</pre> * where \c x is the angle in radians. * * \par Block Diagram: * \par * \image html sinCos.gif * * \par Variables Description: * \par * \li \c testInput_f32 array of input angle in radians * \li \c testOutput stores sum of the squares of sine and cosine values of input angle * * \par CMSIS DSP Software Library Functions Used: * \par * - arm_cos_f32() * - arm_sin_f32() * - arm_mult_f32() * - arm_add_f32() * * <b> Refer </b> * \link arm_sin_cos_example_f32.c \endlink * / /* \example arm_sin_cos_example_f32.c / #include <math.h> #include "arm_math.h" / ---------------------------------------------------------------------- * Defines each of the tests performed * ------------------------------------------------------------------- / #define MAX_BLOCKSIZE 32 #define DELTA (0.000001f) / ---------------------------------------------------------------------- * Test input data for Floating point sin_cos example for 32-blockSize * Generated by the MATLAB randn() function * ------------------------------------------------------------------- / const float32_t testInput_f32[MAX_BLOCKSIZE] = { -1.244916875853235400, -4.793533929171324800, 0.360705030233248850, 0.827929644170887320, -3.299532218312426900, 3.427441903227623800, 3.422401784294607700, -0.108308165334010680, 0.941943896490312180, 0.502609575000365850, -0.537345278736373500, 2.088817392965764500, -1.693168684143455700, 6.283185307179590700, -0.392545884746175080, 0.327893095115825040, 3.070147440456292300, 0.170611405884662230, -0.275275082396073010, -2.395492805446796300, 0.847311163536506600, -3.845517018083148800, 2.055818378415868300, 4.672594161978930800, -1.990923030266425800, 2.469305197656249500, 3.609002606064021000, -4.586736582331667500, -4.147080139136136300, 1.643756718868359500, -1.150866392366494800, 1.985805026477433800 }; const float32_t testRefOutput_f32 = 1.000000000; / ---------------------------------------------------------------------- * Declare Global variables * ------------------------------------------------------------------- / uint32_t blockSize = 32; float32_t testOutput; float32_t cosOutput; float32_t sinOutput; float32_t cosSquareOutput; float32_t sinSquareOutput; / ---------------------------------------------------------------------- * Max magnitude FFT Bin test * ------------------------------------------------------------------- / arm_status status; int32_t main(void) { float32_t diff; uint32_t i; for(i=0; i< blockSize; i++) { cosOutput = arm_cos_f32(testInput_f32[i]); sinOutput = arm_sin_f32(testInput_f32[i]); arm_mult_f32(&cosOutput, &cosOutput, &cosSquareOutput, 1); arm_mult_f32(&sinOutput, &sinOutput, &sinSquareOutput, 1); arm_add_f32(&cosSquareOutput, &sinSquareOutput, &testOutput, 1); / absolute value of difference between ref and test / diff = fabsf(testRefOutput_f32 - testOutput); / Comparison of sin_cos value with reference / if(diff > DELTA) { status = ARM_MATH_TEST_FAILURE; } if( status == ARM_MATH_TEST_FAILURE) { while(1); } } while(1); / main function does not return / } /* \endlink */	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_sin_cos_example/arm_sin_cos_example_f32.c	C	lgpl	4,704
/************************************************************************// * @file system_ARMCM0.c * @brief CMSIS Cortex-M0 Device System Source File * for CM0 Device Series * @version V1.05 * @date 26. July 2011 * * @note * Copyright (C) 2010-2011 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * *****************************************************************************/ #include "ARMCM0.h" /---------------------------------------------------------------------------- Define clocks ----------------------------------------------------------------------------/ #define __HSI ( 8000000UL) #define __XTAL (12000000UL) /* Oscillator frequency / #define __SYSTEM_CLOCK (4__XTAL) /---------------------------------------------------------------------------- Clock Variable definitions ----------------------------------------------------------------------------/ uint32_t SystemCoreClock = __SYSTEM_CLOCK;/!< System Clock Frequency (Core Clock)/ /---------------------------------------------------------------------------- Clock functions ----------------------------------------------------------------------------/ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency / { SystemCoreClock = __SYSTEM_CLOCK; } /* * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System. */ void SystemInit (void) { SystemCoreClock = __SYSTEM_CLOCK; #ifdef __USE_GPIO ARM_GPIO0->DATA[0].WORD = 0; ARM_GPIO0->IE = 0; ARM_GPIO0->DIR = 0xff83; ARM_GPIO1->DATA[0].WORD = 0; ARM_GPIO1->IE = 0; ARM_GPIO1->DIR = 0; ARM_GPIO2->DATA[0].WORD = 0; ARM_GPIO2->IE = 0; ARM_GPIO2->DIR = 0; #endif }	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_sin_cos_example/system_ARMCM0.c	C	lgpl	2,488
/************************************************************************// * @file system_ARMCM4.c * @brief CMSIS Cortex-M4 Device System Source File * for CM4 Device Series * @version V1.05 * @date 26. July 2011 * * @note * Copyright (C) 2010-2011 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * *****************************************************************************/ #include "ARMCM4.h" /---------------------------------------------------------------------------- Define clocks ----------------------------------------------------------------------------/ #define __HSI ( 8000000UL) #define __XTAL (12000000UL) /* Oscillator frequency / #define __SYSTEM_CLOCK (4__XTAL) /---------------------------------------------------------------------------- Clock Variable definitions ----------------------------------------------------------------------------/ uint32_t SystemCoreClock = __SYSTEM_CLOCK;/!< System Clock Frequency (Core Clock)/ /---------------------------------------------------------------------------- Clock functions ----------------------------------------------------------------------------/ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency / { SystemCoreClock = __SYSTEM_CLOCK; } /* * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System. / void SystemInit (void) { #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) SCB->CPACR \|= ((3UL << 102) \| /* set CP10 Full Access / (3UL << 112) ); /* set CP11 Full Access */ #endif SystemCoreClock = __SYSTEM_CLOCK; #ifdef __USE_GPIO ARM_GPIO0->DATA[0].WORD = 0; ARM_GPIO0->IE = 0; ARM_GPIO0->DIR = 0xff83; ARM_GPIO1->DATA[0].WORD = 0; ARM_GPIO1->IE = 0; ARM_GPIO1->DIR = 0; ARM_GPIO2->DATA[0].WORD = 0; ARM_GPIO2->IE = 0; ARM_GPIO2->DIR = 0; #endif }	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_sin_cos_example/system_ARMCM4.c	C	lgpl	2,707
/************************************************************************// * @file system_ARMCM3.c * @brief CMSIS Cortex-M3 Device System Source File * for CM3 Device Series * @version V1.05 * @date 26. July 2011 * * @note * Copyright (C) 2010-2011 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * *****************************************************************************/ #include "ARMCM3.h" /---------------------------------------------------------------------------- Define clocks ----------------------------------------------------------------------------/ #define __HSI ( 8000000UL) #define __XTAL (12000000UL) /* Oscillator frequency / #define __SYSTEM_CLOCK (4__XTAL) /---------------------------------------------------------------------------- Clock Variable definitions ----------------------------------------------------------------------------/ uint32_t SystemCoreClock = __SYSTEM_CLOCK;/!< System Clock Frequency (Core Clock)/ /---------------------------------------------------------------------------- Clock functions ----------------------------------------------------------------------------/ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency / { SystemCoreClock = __SYSTEM_CLOCK; } /* * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System. */ void SystemInit (void) { SystemCoreClock = __SYSTEM_CLOCK; #ifdef __USE_GPIO ARM_GPIO0->DATA[0].WORD = 0; ARM_GPIO0->IE = 0; ARM_GPIO0->DIR = 0xff83; ARM_GPIO1->DATA[0].WORD = 0; ARM_GPIO1->IE = 0; ARM_GPIO1->DIR = 0; ARM_GPIO2->DATA[0].WORD = 0; ARM_GPIO2->IE = 0; ARM_GPIO2->DIR = 0; #endif }	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_sin_cos_example/system_ARMCM3.c	C	lgpl	2,488
;/************************************************************************// ; * @file startup_ARMCM4.s ; * @brief CMSIS Cortex-M4 Core Device Startup File ; * for CM4 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; ------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA \|.text\|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP MemManage_Handler\ PROC EXPORT MemManage_Handler [WEAK] B . ENDP BusFault_Handler\ PROC EXPORT BusFault_Handler [WEAK] B . ENDP UsageFault_Handler\ PROC EXPORT UsageFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP DebugMon_Handler\ PROC EXPORT DebugMon_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_fir_example/ARM/startup_ARMCM4.s	Unix Assembly	lgpl	5,000
;/************************************************************************// ; * @file startup_ARMCM3.s ; * @brief CMSIS Cortex-M3 Core Device Startup File ; * for CM3 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; ------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA \|.text\|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP MemManage_Handler\ PROC EXPORT MemManage_Handler [WEAK] B . ENDP BusFault_Handler\ PROC EXPORT BusFault_Handler [WEAK] B . ENDP UsageFault_Handler\ PROC EXPORT UsageFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP DebugMon_Handler\ PROC EXPORT DebugMon_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_fir_example/ARM/startup_ARMCM3.s	Unix Assembly	lgpl	5,000
;/************************************************************************// ; * @file startup_ARMCM0.s ; * @brief CMSIS Cortex-M0 Core Device Startup File ; * for CM0 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; ------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA \|.text\|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_fir_example/ARM/startup_ARMCM0.s	Motorola 68K Assembly	lgpl	4,363
/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 29. November 2010 * $Revision: V1.0.3 * * Project: CMSIS DSP Library * Title: arm_fir_example_f32.c * * Description: Example code demonstrating how an FIR filter can be used * as a low pass filter. * * Target Processor: Cortex-M4/Cortex-M3 * * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.1 2010/10/05 KK * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 KK * Production release and review comments incorporated. * ------------------------------------------------------------------- / /* * @ingroup groupExamples / /* * @defgroup FIRLPF FIR Lowpass Filter Example * * \par Description: * \par * Removes high frequency signal components from the input using an FIR lowpass filter. * The example demonstrates how to configure an FIR filter and then pass data through * it in a block-by-block fashion. * \image html FIRLPF_signalflow.gif * * \par Algorithm: * \par * The input signal is a sum of two sine waves: 1 kHz and 15 kHz. * This is processed by an FIR lowpass filter with cutoff frequency 6 kHz. * The lowpass filter eliminates the 15 kHz signal leaving only the 1 kHz sine wave at the output. * \par * The lowpass filter was designed using MATLAB with a sample rate of 48 kHz and * a length of 29 points. * The MATLAB code to generate the filter coefficients is shown below: * <pre> * h = fir1(28, 6/24); * </pre> * The first argument is the "order" of the filter and is always one less than the desired length. * The second argument is the normalized cutoff frequency. This is in the range 0 (DC) to 1.0 (Nyquist). * A 6 kHz cutoff with a Nyquist frequency of 24 kHz lies at a normalized frequency of 6/24 = 0.25. * The CMSIS FIR filter function requires the coefficients to be in time reversed order. * <pre> * fliplr(h) * </pre> * The resulting filter coefficients and are shown below. * Note that the filter is symmetric (a property of linear phase FIR filters) * and the point of symmetry is sample 14. Thus the filter will have a delay of * 14 samples for all frequencies. * \par * \image html FIRLPF_coeffs.gif * \par * The frequency response of the filter is shown next. * The passband gain of the filter is 1.0 and it reaches 0.5 at the cutoff frequency 6 kHz. * \par * \image html FIRLPF_response.gif * \par * The input signal is shown below. * The left hand side shows the signal in the time domain while the right hand side is a frequency domain representation. * The two sine wave components can be clearly seen. * \par * \image html FIRLPF_input.gif * \par * The output of the filter is shown below. The 15 kHz component has been eliminated. * \par * \image html FIRLPF_output.gif * * \par Variables Description: * \par * \li \c testInput_f32_1kHz_15kHz points to the input data * \li \c refOutput points to the reference output data * \li \c testOutput points to the test output data * \li \c firStateF32 points to state buffer * \li \c firCoeffs32 points to coefficient buffer * \li \c blockSize number of samples processed at a time * \li \c numBlocks number of frames * * \par CMSIS DSP Software Library Functions Used: * \par * - arm_fir_init_f32() * - arm_fir_f32() * * <b> Refer </b> * \link arm_fir_example_f32.c \endlink * / /* \example arm_fir_example_f32.c / / ---------------------------------------------------------------------- Include Files ------------------------------------------------------------------- / #include "arm_math.h" #include "math_helper.h" / ---------------------------------------------------------------------- Macro Defines ------------------------------------------------------------------- / #define TEST_LENGTH_SAMPLES 320 #define SNR_THRESHOLD_F32 140.0f #define BLOCK_SIZE 32 #define NUM_TAPS 29 / ------------------------------------------------------------------- * The input signal and reference output (computed with MATLAB) * are defined externally in arm_fir_lpf_data.c. * ------------------------------------------------------------------- / extern float32_t testInput_f32_1kHz_15kHz[TEST_LENGTH_SAMPLES]; extern float32_t refOutput[TEST_LENGTH_SAMPLES]; / ------------------------------------------------------------------- * Declare Test output buffer * ------------------------------------------------------------------- / static float32_t testOutput[TEST_LENGTH_SAMPLES]; / ------------------------------------------------------------------- * Declare State buffer of size (numTaps + blockSize - 1) * ------------------------------------------------------------------- / static float32_t firStateF32[BLOCK_SIZE + NUM_TAPS - 1]; / ---------------------------------------------------------------------- FIR Coefficients buffer generated using fir1() MATLAB function. fir1(28, 6/24) ** ------------------------------------------------------------------- / const float32_t firCoeffs32[NUM_TAPS] = { -0.0018225230f, -0.0015879294f, +0.0000000000f, +0.0036977508f, +0.0080754303f, +0.0085302217f, -0.0000000000f, -0.0173976984f, -0.0341458607f, -0.0333591565f, +0.0000000000f, +0.0676308395f, +0.1522061835f, +0.2229246956f, +0.2504960933f, +0.2229246956f, +0.1522061835f, +0.0676308395f, +0.0000000000f, -0.0333591565f, -0.0341458607f, -0.0173976984f, -0.0000000000f, +0.0085302217f, +0.0080754303f, +0.0036977508f, +0.0000000000f, -0.0015879294f, -0.0018225230f }; / ------------------------------------------------------------------ * Global variables for FIR LPF Example * ------------------------------------------------------------------- / uint32_t blockSize = BLOCK_SIZE; uint32_t numBlocks = TEST_LENGTH_SAMPLES/BLOCK_SIZE; float32_t snr; / ---------------------------------------------------------------------- * FIR LPF Example * ------------------------------------------------------------------- / int32_t main(void) { uint32_t i; arm_fir_instance_f32 S; arm_status status; float32_t inputF32, outputF32; / Initialize input and output buffer pointers / inputF32 = &testInput_f32_1kHz_15kHz[0]; outputF32 = &testOutput[0]; / Call FIR init function to initialize the instance structure. / arm_fir_init_f32(&S, NUM_TAPS, (float32_t )&firCoeffs32[0], &firStateF32[0], blockSize); /* ---------------------------------------------------------------------- Call the FIR process function for every blockSize samples ------------------------------------------------------------------- / for(i=0; i < numBlocks; i++) { arm_fir_f32(&S, inputF32 + (i blockSize), outputF32 + (i * blockSize), blockSize); } /* ---------------------------------------------------------------------- Compare the generated output against the reference output computed in MATLAB. ** ------------------------------------------------------------------- / snr = arm_snr_f32(&refOutput[0], &testOutput[0], TEST_LENGTH_SAMPLES); if (snr < SNR_THRESHOLD_F32) { status = ARM_MATH_TEST_FAILURE; } else { status = ARM_MATH_SUCCESS; } / ---------------------------------------------------------------------- Loop here if the signal does not match the reference output. ------------------------------------------------------------------- / if( status != ARM_MATH_SUCCESS) { while(1); } while(1); / main function does not return / } /* \endlink */	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_fir_example/arm_fir_example_f32.c	C	lgpl	8,124
#include "arm_math.h" /* ---------------------------------------------------------------------- Test input signal contains 1000Hz + 15000 Hz ------------------------------------------------------------------- */ float32_t testInput_f32_1kHz_15kHz[320] = { +0.0000000000f, +0.5924659585f, -0.0947343455f, +0.1913417162f, +1.0000000000f, +0.4174197128f, +0.3535533906f, +1.2552931065f, +0.8660254038f, +0.4619397663f, +1.3194792169f, +1.1827865776f, +0.5000000000f, +1.1827865776f, +1.3194792169f, +0.4619397663f, +0.8660254038f, +1.2552931065f, +0.3535533906f, +0.4174197128f, +1.0000000000f, +0.1913417162f, -0.0947343455f, +0.5924659585f, -0.0000000000f, -0.5924659585f, +0.0947343455f, -0.1913417162f, -1.0000000000f, -0.4174197128f, -0.3535533906f, -1.2552931065f, -0.8660254038f, -0.4619397663f, -1.3194792169f, -1.1827865776f, -0.5000000000f, -1.1827865776f, -1.3194792169f, -0.4619397663f, -0.8660254038f, -1.2552931065f, -0.3535533906f, -0.4174197128f, -1.0000000000f, -0.1913417162f, +0.0947343455f, -0.5924659585f, +0.0000000000f, +0.5924659585f, -0.0947343455f, +0.1913417162f, +1.0000000000f, +0.4174197128f, +0.3535533906f, +1.2552931065f, +0.8660254038f, +0.4619397663f, +1.3194792169f, +1.1827865776f, +0.5000000000f, +1.1827865776f, +1.3194792169f, +0.4619397663f, +0.8660254038f, +1.2552931065f, +0.3535533906f, +0.4174197128f, +1.0000000000f, +0.1913417162f, -0.0947343455f, +0.5924659585f, +0.0000000000f, -0.5924659585f, +0.0947343455f, -0.1913417162f, -1.0000000000f, -0.4174197128f, -0.3535533906f, -1.2552931065f, -0.8660254038f, -0.4619397663f, -1.3194792169f, -1.1827865776f, -0.5000000000f, -1.1827865776f, -1.3194792169f, -0.4619397663f, -0.8660254038f, -1.2552931065f, -0.3535533906f, -0.4174197128f, -1.0000000000f, -0.1913417162f, +0.0947343455f, -0.5924659585f, +0.0000000000f, +0.5924659585f, -0.0947343455f, +0.1913417162f, +1.0000000000f, +0.4174197128f, +0.3535533906f, +1.2552931065f, +0.8660254038f, +0.4619397663f, +1.3194792169f, +1.1827865776f, +0.5000000000f, +1.1827865776f, +1.3194792169f, +0.4619397663f, +0.8660254038f, +1.2552931065f, +0.3535533906f, +0.4174197128f, +1.0000000000f, +0.1913417162f, -0.0947343455f, +0.5924659585f, +0.0000000000f, -0.5924659585f, +0.0947343455f, -0.1913417162f, -1.0000000000f, -0.4174197128f, -0.3535533906f, -1.2552931065f, -0.8660254038f, -0.4619397663f, -1.3194792169f, -1.1827865776f, -0.5000000000f, -1.1827865776f, -1.3194792169f, -0.4619397663f, -0.8660254038f, -1.2552931065f, -0.3535533906f, -0.4174197128f, -1.0000000000f, -0.1913417162f, +0.0947343455f, -0.5924659585f, -0.0000000000f, +0.5924659585f, -0.0947343455f, +0.1913417162f, +1.0000000000f, +0.4174197128f, +0.3535533906f, +1.2552931065f, +0.8660254038f, +0.4619397663f, +1.3194792169f, +1.1827865776f, +0.5000000000f, +1.1827865776f, +1.3194792169f, +0.4619397663f, +0.8660254038f, +1.2552931065f, +0.3535533906f, +0.4174197128f, +1.0000000000f, +0.1913417162f, -0.0947343455f, +0.5924659585f, -0.0000000000f, -0.5924659585f, +0.0947343455f, -0.1913417162f, -1.0000000000f, -0.4174197128f, -0.3535533906f, -1.2552931065f, -0.8660254038f, -0.4619397663f, -1.3194792169f, -1.1827865776f, -0.5000000000f, -1.1827865776f, -1.3194792169f, -0.4619397663f, -0.8660254038f, -1.2552931065f, -0.3535533906f, -0.4174197128f, -1.0000000000f, -0.1913417162f, +0.0947343455f, -0.5924659585f, +0.0000000000f, +0.5924659585f, -0.0947343455f, +0.1913417162f, +1.0000000000f, +0.4174197128f, +0.3535533906f, +1.2552931065f, +0.8660254038f, +0.4619397663f, +1.3194792169f, +1.1827865776f, +0.5000000000f, +1.1827865776f, +1.3194792169f, +0.4619397663f, +0.8660254038f, +1.2552931065f, +0.3535533906f, +0.4174197128f, +1.0000000000f, +0.1913417162f, -0.0947343455f, +0.5924659585f, +0.0000000000f, -0.5924659585f, +0.0947343455f, -0.1913417162f, -1.0000000000f, -0.4174197128f, -0.3535533906f, -1.2552931065f, -0.8660254038f, -0.4619397663f, -1.3194792169f, -1.1827865776f, -0.5000000000f, -1.1827865776f, -1.3194792169f, -0.4619397663f, -0.8660254038f, -1.2552931065f, -0.3535533906f, -0.4174197128f, -1.0000000000f, -0.1913417162f, +0.0947343455f, -0.5924659585f, -0.0000000000f, +0.5924659585f, -0.0947343455f, +0.1913417162f, +1.0000000000f, +0.4174197128f, +0.3535533906f, +1.2552931065f, +0.8660254038f, +0.4619397663f, +1.3194792169f, +1.1827865776f, +0.5000000000f, +1.1827865776f, +1.3194792169f, +0.4619397663f, +0.8660254038f, +1.2552931065f, +0.3535533906f, +0.4174197128f, +1.0000000000f, +0.1913417162f, -0.0947343455f, +0.5924659585f, +0.0000000000f, -0.5924659585f, +0.0947343455f, -0.1913417162f, -1.0000000000f, -0.4174197128f, -0.3535533906f, -1.2552931065f, -0.8660254038f, -0.4619397663f, -1.3194792169f, -1.1827865776f, -0.5000000000f, -1.1827865776f, -1.3194792169f, -0.4619397663f, -0.8660254038f, -1.2552931065f, -0.3535533906f, -0.4174197128f, -1.0000000000f, -0.1913417162f, +0.0947343455f, -0.5924659585f, -0.0000000000f, +0.5924659585f, -0.0947343455f, +0.1913417162f, +1.0000000000f, +0.4174197128f, +0.3535533906f, +1.2552931065f, +0.8660254038f, +0.4619397663f, +1.3194792169f, +1.1827865776f, +0.5000000000f, +1.1827865776f, +1.3194792169f, +0.4619397663f, +0.8660254038f, +1.2552931065f, +0.3535533906f, +0.4174197128f, +1.0000000000f, +0.1913417162f, -0.0947343455f, +0.5924659585f, +0.0000000000f, -0.5924659585f, +0.0947343455f, -0.1913417162f, -1.0000000000f, -0.4174197128f, -0.3535533906f, -1.2552931065f, }; float32_t refOutput[320] = { +0.0000000000f, -0.0010797829f, -0.0007681386f, -0.0001982932f, +0.0000644313f, +0.0020854271f, +0.0036891871f, +0.0015855941f, -0.0026280805f, -0.0075907658f, -0.0119390538f, -0.0086665968f, +0.0088981202f, +0.0430539279f, +0.0974468742f, +0.1740405600f, +0.2681416601f, +0.3747720089f, +0.4893362230f, +0.6024154672f, +0.7058740791f, +0.7968348987f, +0.8715901940f, +0.9277881093f, +0.9682182661f, +0.9934674267f, +1.0012052245f, +0.9925859371f, +0.9681538347f, +0.9257026822f, +0.8679010068f, +0.7952493046f, +0.7085021596f, +0.6100062330f, +0.5012752767f, +0.3834386057f, +0.2592435399f, +0.1309866321f, -0.0000000000f, -0.1309866321f, -0.2592435399f, -0.3834386057f, -0.5012752767f, -0.6100062330f, -0.7085021596f, -0.7952493046f, -0.8679010068f, -0.9257026822f, -0.9681538347f, -0.9936657199f, -1.0019733630f, -0.9936657199f, -0.9681538347f, -0.9257026822f, -0.8679010068f, -0.7952493046f, -0.7085021596f, -0.6100062330f, -0.5012752767f, -0.3834386057f, -0.2592435399f, -0.1309866321f, +0.0000000000f, +0.1309866321f, +0.2592435399f, +0.3834386057f, +0.5012752767f, +0.6100062330f, +0.7085021596f, +0.7952493046f, +0.8679010068f, +0.9257026822f, +0.9681538347f, +0.9936657199f, +1.0019733630f, +0.9936657199f, +0.9681538347f, +0.9257026822f, +0.8679010068f, +0.7952493046f, +0.7085021596f, +0.6100062330f, +0.5012752767f, +0.3834386057f, +0.2592435399f, +0.1309866321f, -0.0000000000f, -0.1309866321f, -0.2592435399f, -0.3834386057f, -0.5012752767f, -0.6100062330f, -0.7085021596f, -0.7952493046f, -0.8679010068f, -0.9257026822f, -0.9681538347f, -0.9936657199f, -1.0019733630f, -0.9936657199f, -0.9681538347f, -0.9257026822f, -0.8679010068f, -0.7952493046f, -0.7085021596f, -0.6100062330f, -0.5012752767f, -0.3834386057f, -0.2592435399f, -0.1309866321f, +0.0000000000f, +0.1309866321f, +0.2592435399f, +0.3834386057f, +0.5012752767f, +0.6100062330f, +0.7085021596f, +0.7952493046f, +0.8679010068f, +0.9257026822f, +0.9681538347f, +0.9936657199f, +1.0019733630f, +0.9936657199f, +0.9681538347f, +0.9257026822f, +0.8679010068f, +0.7952493046f, +0.7085021596f, +0.6100062330f, +0.5012752767f, +0.3834386057f, +0.2592435399f, +0.1309866321f, -0.0000000000f, -0.1309866321f, -0.2592435399f, -0.3834386057f, -0.5012752767f, -0.6100062330f, -0.7085021596f, -0.7952493046f, -0.8679010068f, -0.9257026822f, -0.9681538347f, -0.9936657199f, -1.0019733630f, -0.9936657199f, -0.9681538347f, -0.9257026822f, -0.8679010068f, -0.7952493046f, -0.7085021596f, -0.6100062330f, -0.5012752767f, -0.3834386057f, -0.2592435399f, -0.1309866321f, +0.0000000000f, +0.1309866321f, +0.2592435399f, +0.3834386057f, +0.5012752767f, +0.6100062330f, +0.7085021596f, +0.7952493046f, +0.8679010068f, +0.9257026822f, +0.9681538347f, +0.9936657199f, +1.0019733630f, +0.9936657199f, +0.9681538347f, +0.9257026822f, +0.8679010068f, +0.7952493046f, +0.7085021596f, +0.6100062330f, +0.5012752767f, +0.3834386057f, +0.2592435399f, +0.1309866321f, +0.0000000000f, -0.1309866321f, -0.2592435399f, -0.3834386057f, -0.5012752767f, -0.6100062330f, -0.7085021596f, -0.7952493046f, -0.8679010068f, -0.9257026822f, -0.9681538347f, -0.9936657199f, -1.0019733630f, -0.9936657199f, -0.9681538347f, -0.9257026822f, -0.8679010068f, -0.7952493046f, -0.7085021596f, -0.6100062330f, -0.5012752767f, -0.3834386057f, -0.2592435399f, -0.1309866321f, +0.0000000000f, +0.1309866321f, +0.2592435399f, +0.3834386057f, +0.5012752767f, +0.6100062330f, +0.7085021596f, +0.7952493046f, +0.8679010068f, +0.9257026822f, +0.9681538347f, +0.9936657199f, +1.0019733630f, +0.9936657199f, +0.9681538347f, +0.9257026822f, +0.8679010068f, +0.7952493046f, +0.7085021596f, +0.6100062330f, +0.5012752767f, +0.3834386057f, +0.2592435399f, +0.1309866321f, +0.0000000000f, -0.1309866321f, -0.2592435399f, -0.3834386057f, -0.5012752767f, -0.6100062330f, -0.7085021596f, -0.7952493046f, -0.8679010068f, -0.9257026822f, -0.9681538347f, -0.9936657199f, -1.0019733630f, -0.9936657199f, -0.9681538347f, -0.9257026822f, -0.8679010068f, -0.7952493046f, -0.7085021596f, -0.6100062330f, -0.5012752767f, -0.3834386057f, -0.2592435399f, -0.1309866321f, -0.0000000000f, +0.1309866321f, +0.2592435399f, +0.3834386057f, +0.5012752767f, +0.6100062330f, +0.7085021596f, +0.7952493046f, +0.8679010068f, +0.9257026822f, +0.9681538347f, +0.9936657199f, +1.0019733630f, +0.9936657199f, +0.9681538347f, +0.9257026822f, +0.8679010068f, +0.7952493046f, +0.7085021596f, +0.6100062330f, +0.5012752767f, +0.3834386057f, +0.2592435399f, +0.1309866321f, +0.0000000000f, -0.1309866321f, -0.2592435399f, -0.3834386057f, -0.5012752767f, -0.6100062330f, -0.7085021596f, -0.7952493046f, -0.8679010068f, -0.9257026822f, -0.9681538347f, -0.9936657199f, -1.0019733630f, -0.9936657199f, -0.9681538347f, -0.9257026822f, -0.8679010068f, -0.7952493046f, -0.7085021596f, -0.6100062330f, -0.5012752767f, -0.3834386057f, -0.2592435399f, -0.1309866321f, +0.0000000000f, +0.1309866321f, +0.2592435399f, +0.3834386057f, +0.5012752767f, +0.6100062330f, +0.7085021596f, +0.7952493046f, +0.8679010068f, +0.9257026822f, +0.9681538347f, +0.9936657199f, +1.0019733630f, +0.9936657199f, +0.9681538347f, +0.9257026822f, +0.8679010068f, +0.7952493046f };	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_fir_example/arm_fir_data.c	C	lgpl	10,621
/************************************************************************// * @file system_ARMCM0.c * @brief CMSIS Cortex-M0 Device System Source File * for CM0 Device Series * @version V1.05 * @date 26. July 2011 * * @note * Copyright (C) 2010-2011 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * *****************************************************************************/ #include "ARMCM0.h" /---------------------------------------------------------------------------- Define clocks ----------------------------------------------------------------------------/ #define __HSI ( 8000000UL) #define __XTAL (12000000UL) /* Oscillator frequency / #define __SYSTEM_CLOCK (4__XTAL) /---------------------------------------------------------------------------- Clock Variable definitions ----------------------------------------------------------------------------/ uint32_t SystemCoreClock = __SYSTEM_CLOCK;/!< System Clock Frequency (Core Clock)/ /---------------------------------------------------------------------------- Clock functions ----------------------------------------------------------------------------/ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency / { SystemCoreClock = __SYSTEM_CLOCK; } /* * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System. */ void SystemInit (void) { SystemCoreClock = __SYSTEM_CLOCK; #ifdef __USE_GPIO ARM_GPIO0->DATA[0].WORD = 0; ARM_GPIO0->IE = 0; ARM_GPIO0->DIR = 0xff83; ARM_GPIO1->DATA[0].WORD = 0; ARM_GPIO1->IE = 0; ARM_GPIO1->DIR = 0; ARM_GPIO2->DATA[0].WORD = 0; ARM_GPIO2->IE = 0; ARM_GPIO2->DIR = 0; #endif }	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_fir_example/system_ARMCM0.c	C	lgpl	2,488
/************************************************************************// * @file system_ARMCM4.c * @brief CMSIS Cortex-M4 Device System Source File * for CM4 Device Series * @version V1.05 * @date 26. July 2011 * * @note * Copyright (C) 2010-2011 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * *****************************************************************************/ #include "ARMCM4.h" /---------------------------------------------------------------------------- Define clocks ----------------------------------------------------------------------------/ #define __HSI ( 8000000UL) #define __XTAL (12000000UL) /* Oscillator frequency / #define __SYSTEM_CLOCK (4__XTAL) /---------------------------------------------------------------------------- Clock Variable definitions ----------------------------------------------------------------------------/ uint32_t SystemCoreClock = __SYSTEM_CLOCK;/!< System Clock Frequency (Core Clock)/ /---------------------------------------------------------------------------- Clock functions ----------------------------------------------------------------------------/ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency / { SystemCoreClock = __SYSTEM_CLOCK; } /* * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System. / void SystemInit (void) { #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) SCB->CPACR \|= ((3UL << 102) \| /* set CP10 Full Access / (3UL << 112) ); /* set CP11 Full Access */ #endif SystemCoreClock = __SYSTEM_CLOCK; #ifdef __USE_GPIO ARM_GPIO0->DATA[0].WORD = 0; ARM_GPIO0->IE = 0; ARM_GPIO0->DIR = 0xff83; ARM_GPIO1->DATA[0].WORD = 0; ARM_GPIO1->IE = 0; ARM_GPIO1->DIR = 0; ARM_GPIO2->DATA[0].WORD = 0; ARM_GPIO2->IE = 0; ARM_GPIO2->DIR = 0; #endif }	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_fir_example/system_ARMCM4.c	C	lgpl	2,707
/************************************************************************// * @file system_ARMCM3.c * @brief CMSIS Cortex-M3 Device System Source File * for CM3 Device Series * @version V1.05 * @date 26. July 2011 * * @note * Copyright (C) 2010-2011 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * *****************************************************************************/ #include "ARMCM3.h" /---------------------------------------------------------------------------- Define clocks ----------------------------------------------------------------------------/ #define __HSI ( 8000000UL) #define __XTAL (12000000UL) /* Oscillator frequency / #define __SYSTEM_CLOCK (4__XTAL) /---------------------------------------------------------------------------- Clock Variable definitions ----------------------------------------------------------------------------/ uint32_t SystemCoreClock = __SYSTEM_CLOCK;/!< System Clock Frequency (Core Clock)/ /---------------------------------------------------------------------------- Clock functions ----------------------------------------------------------------------------/ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency / { SystemCoreClock = __SYSTEM_CLOCK; } /* * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System. */ void SystemInit (void) { SystemCoreClock = __SYSTEM_CLOCK; #ifdef __USE_GPIO ARM_GPIO0->DATA[0].WORD = 0; ARM_GPIO0->IE = 0; ARM_GPIO0->DIR = 0xff83; ARM_GPIO1->DATA[0].WORD = 0; ARM_GPIO1->IE = 0; ARM_GPIO1->DIR = 0; ARM_GPIO2->DATA[0].WORD = 0; ARM_GPIO2->IE = 0; ARM_GPIO2->DIR = 0; #endif }	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_fir_example/system_ARMCM3.c	C	lgpl	2,488
;/************************************************************************// ; * @file startup_ARMCM4.s ; * @brief CMSIS Cortex-M4 Core Device Startup File ; * for CM4 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; ------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA \|.text\|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP MemManage_Handler\ PROC EXPORT MemManage_Handler [WEAK] B . ENDP BusFault_Handler\ PROC EXPORT BusFault_Handler [WEAK] B . ENDP UsageFault_Handler\ PROC EXPORT UsageFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP DebugMon_Handler\ PROC EXPORT DebugMon_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_linear_interp_example/ARM/startup_ARMCM4.s	Unix Assembly	lgpl	5,000
;/************************************************************************// ; * @file startup_ARMCM3.s ; * @brief CMSIS Cortex-M3 Core Device Startup File ; * for CM3 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; ------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA \|.text\|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP MemManage_Handler\ PROC EXPORT MemManage_Handler [WEAK] B . ENDP BusFault_Handler\ PROC EXPORT BusFault_Handler [WEAK] B . ENDP UsageFault_Handler\ PROC EXPORT UsageFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP DebugMon_Handler\ PROC EXPORT DebugMon_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_linear_interp_example/ARM/startup_ARMCM3.s	Unix Assembly	lgpl	5,000
;/************************************************************************// ; * @file startup_ARMCM0.s ; * @brief CMSIS Cortex-M0 Core Device Startup File ; * for CM0 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; ------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA \|.text\|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_linear_interp_example/ARM/startup_ARMCM0.s	Motorola 68K Assembly	lgpl	4,363
/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 29. November 2010 * $Revision: V1.0.3 * * Project: CMSIS DSP Library * Title: arm_linear_interp_example_f32.c * * Description: Example code demonstrating usage of sin function * and uses linear interpolation to get higher precision * * Target Processor: Cortex-M4/Cortex-M3 * * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.1 2010/10/05 KK * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 KK * Production release and review comments incorporated. * ------------------------------------------------------------------- / /* * @ingroup groupExamples / /* * @defgroup LinearInterpExample Linear Interpolate Example * * <b> CMSIS DSP Software Library -- Linear Interpolate Example </b> * * <b> Description </b> * This example demonstrates usage of linear interpolate modules and fast math modules. * Method 1 uses fast math sine function to calculate sine values using cubic interpolation and method 2 uses * linear interpolation function and results are compared to reference output. * Example shows linear interpolation function can be used to get higher precision compared to fast math sin calculation. * * \par Block Diagram: * \par * \image html linearInterpExampleMethod1.gif "Method 1: Sine caluclation using fast math" * \par * \image html linearInterpExampleMethod2.gif "Method 2: Sine caluclation using interpolation function" * * \par Variables Description: * \par * \li \c testInputSin_f32 points to the input values for sine calculation * \li \c testRefSinOutput32_f32 points to the reference values caculated from sin() matlab function * \li \c testOutput points to output buffer calculation from cubic interpolation * \li \c testLinIntOutput points to output buffer calculation from linear interpolation * \li \c snr1 Signal to noise ratio for reference and cubic interpolation output * \li \c snr2 Signal to noise ratio for reference and linear interpolation output * * \par CMSIS DSP Software Library Functions Used: * \par * - arm_sin_f32() * - arm_linear_interp_f32() * * <b> Refer </b> * \link arm_linear_interp_example_f32.c \endlink * / /* \example arm_linear_interp_example_f32.c / #include "arm_math.h" #include "math_helper.h" #define SNR_THRESHOLD 90 #define TEST_LENGTH_SAMPLES 10 #define XSPACING (0.00005f) / ---------------------------------------------------------------------- * Test input data for F32 SIN function * Generated by the MATLAB rand() function * randn('state', 0) * xi = (((1/4.18318581819710)* randn(blockSize, 1) * 2* pi)); * --------------------------------------------------------------------/ float32_t testInputSin_f32[TEST_LENGTH_SAMPLES] = { -0.649716504673081170, -2.501723745497831200, 0.188250329003310100, 0.432092748487532540, -1.722010988459680800, 1.788766476323060600, 1.786136060975809500, -0.056525543169408797, 0.491596272728153760, 0.262309671126153390 }; /------------------------------------------------------------------------------ * Reference out of SIN F32 function for Block Size = 10 * Calculated from sin(testInputSin_f32) ------------------------------------------------------------------------------/ float32_t testRefSinOutput32_f32[TEST_LENGTH_SAMPLES] = { -0.604960695383043530, -0.597090287967934840, 0.187140422442966500, 0.418772124875992690, -0.988588831792106880, 0.976338412038794010, 0.976903856413481100, -0.056495446835214236, 0.472033731854734240, 0.259311907228582830 }; /------------------------------------------------------------------------------ Method 1: Test out Buffer Calculated from Cubic Interpolation ------------------------------------------------------------------------------/ float32_t testOutput[TEST_LENGTH_SAMPLES]; /------------------------------------------------------------------------------ Method 2: Test out buffer Calculated from Linear Interpolation ------------------------------------------------------------------------------/ float32_t testLinIntOutput[TEST_LENGTH_SAMPLES]; /------------------------------------------------------------------------------ External table used for linear interpolation ------------------------------------------------------------------------------/ extern float32_t arm_linear_interep_table[188495]; /* ---------------------------------------------------------------------- * Global Variables for caluclating SNR's for Method1 & Method 2 * ------------------------------------------------------------------- / float32_t snr1; float32_t snr2; / ---------------------------------------------------------------------------- * Calculation of Sine values from Cubic Interpolation and Linear interpolation * ---------------------------------------------------------------------------- / int32_t main(void) { uint32_t i; arm_status status; arm_linear_interp_instance_f32 S = {188495, -3.141592653589793238, XSPACING, &arm_linear_interep_table[0]}; /------------------------------------------------------------------------------ * Method 1: Test out Calculated from Cubic Interpolation ------------------------------------------------------------------------------/ for(i=0; i< TEST_LENGTH_SAMPLES; i++) { testOutput[i] = arm_sin_f32(testInputSin_f32[i]); } /------------------------------------------------------------------------------ Method 2: Test out Calculated from Cubic Interpolation and Linear interpolation ------------------------------------------------------------------------------/ for(i=0; i< TEST_LENGTH_SAMPLES; i++) { testLinIntOutput[i] = arm_linear_interp_f32(&S, testInputSin_f32[i]); } /------------------------------------------------------------------------------ SNR calculation for method 1 ------------------------------------------------------------------------------/ snr1 = arm_snr_f32(testRefSinOutput32_f32, testOutput, 2); /------------------------------------------------------------------------------ SNR calculation for method 2 ------------------------------------------------------------------------------/ snr2 = arm_snr_f32(testRefSinOutput32_f32, testLinIntOutput, 2); /------------------------------------------------------------------------------ Initialise status depending on SNR calculations ------------------------------------------------------------------------------/ if( snr2 > snr1) { status = ARM_MATH_SUCCESS; } else { status = ARM_MATH_TEST_FAILURE; } /* ---------------------------------------------------------------------- Loop here if the signals fail the PASS check. This denotes a test failure ** ------------------------------------------------------------------- / if( status != ARM_MATH_SUCCESS) { while(1); } while(1); / main function does not return / } /* \endlink */	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_linear_interp_example/arm_linear_interp_example_f32.c	C	lgpl	7,539
/************************************************************************// * @file system_ARMCM0.c * @brief CMSIS Cortex-M0 Device System Source File * for CM0 Device Series * @version V1.05 * @date 26. July 2011 * * @note * Copyright (C) 2010-2011 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * *****************************************************************************/ #include "ARMCM0.h" /---------------------------------------------------------------------------- Define clocks ----------------------------------------------------------------------------/ #define __HSI ( 8000000UL) #define __XTAL (12000000UL) /* Oscillator frequency / #define __SYSTEM_CLOCK (4__XTAL) /---------------------------------------------------------------------------- Clock Variable definitions ----------------------------------------------------------------------------/ uint32_t SystemCoreClock = __SYSTEM_CLOCK;/!< System Clock Frequency (Core Clock)/ /---------------------------------------------------------------------------- Clock functions ----------------------------------------------------------------------------/ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency / { SystemCoreClock = __SYSTEM_CLOCK; } /* * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System. */ void SystemInit (void) { SystemCoreClock = __SYSTEM_CLOCK; #ifdef __USE_GPIO ARM_GPIO0->DATA[0].WORD = 0; ARM_GPIO0->IE = 0; ARM_GPIO0->DIR = 0xff83; ARM_GPIO1->DATA[0].WORD = 0; ARM_GPIO1->IE = 0; ARM_GPIO1->DIR = 0; ARM_GPIO2->DATA[0].WORD = 0; ARM_GPIO2->IE = 0; ARM_GPIO2->DIR = 0; #endif }	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_linear_interp_example/system_ARMCM0.c	C	lgpl	2,488
/************************************************************************// * @file system_ARMCM4.c * @brief CMSIS Cortex-M4 Device System Source File * for CM4 Device Series * @version V1.05 * @date 26. July 2011 * * @note * Copyright (C) 2010-2011 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * *****************************************************************************/ #include "ARMCM4.h" /---------------------------------------------------------------------------- Define clocks ----------------------------------------------------------------------------/ #define __HSI ( 8000000UL) #define __XTAL (12000000UL) /* Oscillator frequency / #define __SYSTEM_CLOCK (4__XTAL) /---------------------------------------------------------------------------- Clock Variable definitions ----------------------------------------------------------------------------/ uint32_t SystemCoreClock = __SYSTEM_CLOCK;/!< System Clock Frequency (Core Clock)/ /---------------------------------------------------------------------------- Clock functions ----------------------------------------------------------------------------/ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency / { SystemCoreClock = __SYSTEM_CLOCK; } /* * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System. / void SystemInit (void) { #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) SCB->CPACR \|= ((3UL << 102) \| /* set CP10 Full Access / (3UL << 112) ); /* set CP11 Full Access */ #endif SystemCoreClock = __SYSTEM_CLOCK; #ifdef __USE_GPIO ARM_GPIO0->DATA[0].WORD = 0; ARM_GPIO0->IE = 0; ARM_GPIO0->DIR = 0xff83; ARM_GPIO1->DATA[0].WORD = 0; ARM_GPIO1->IE = 0; ARM_GPIO1->DIR = 0; ARM_GPIO2->DATA[0].WORD = 0; ARM_GPIO2->IE = 0; ARM_GPIO2->DIR = 0; #endif }	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_linear_interp_example/system_ARMCM4.c	C	lgpl	2,707
/************************************************************************// * @file system_ARMCM3.c * @brief CMSIS Cortex-M3 Device System Source File * for CM3 Device Series * @version V1.05 * @date 26. July 2011 * * @note * Copyright (C) 2010-2011 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * *****************************************************************************/ #include "ARMCM3.h" /---------------------------------------------------------------------------- Define clocks ----------------------------------------------------------------------------/ #define __HSI ( 8000000UL) #define __XTAL (12000000UL) /* Oscillator frequency / #define __SYSTEM_CLOCK (4__XTAL) /---------------------------------------------------------------------------- Clock Variable definitions ----------------------------------------------------------------------------/ uint32_t SystemCoreClock = __SYSTEM_CLOCK;/!< System Clock Frequency (Core Clock)/ /---------------------------------------------------------------------------- Clock functions ----------------------------------------------------------------------------/ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency / { SystemCoreClock = __SYSTEM_CLOCK; } /* * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System. */ void SystemInit (void) { SystemCoreClock = __SYSTEM_CLOCK; #ifdef __USE_GPIO ARM_GPIO0->DATA[0].WORD = 0; ARM_GPIO0->IE = 0; ARM_GPIO0->DIR = 0xff83; ARM_GPIO1->DATA[0].WORD = 0; ARM_GPIO1->IE = 0; ARM_GPIO1->DIR = 0; ARM_GPIO2->DATA[0].WORD = 0; ARM_GPIO2->IE = 0; ARM_GPIO2->DIR = 0; #endif }	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_linear_interp_example/system_ARMCM3.c	C	lgpl	2,488
;/************************************************************************// ; * @file startup_ARMCM4.s ; * @brief CMSIS Cortex-M4 Core Device Startup File ; * for CM4 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; ------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA \|.text\|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP MemManage_Handler\ PROC EXPORT MemManage_Handler [WEAK] B . ENDP BusFault_Handler\ PROC EXPORT BusFault_Handler [WEAK] B . ENDP UsageFault_Handler\ PROC EXPORT UsageFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP DebugMon_Handler\ PROC EXPORT DebugMon_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_variance_example/ARM/startup_ARMCM4.s	Unix Assembly	lgpl	5,000
;/************************************************************************// ; * @file startup_ARMCM3.s ; * @brief CMSIS Cortex-M3 Core Device Startup File ; * for CM3 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; ------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA \|.text\|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP MemManage_Handler\ PROC EXPORT MemManage_Handler [WEAK] B . ENDP BusFault_Handler\ PROC EXPORT BusFault_Handler [WEAK] B . ENDP UsageFault_Handler\ PROC EXPORT UsageFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP DebugMon_Handler\ PROC EXPORT DebugMon_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_variance_example/ARM/startup_ARMCM3.s	Unix Assembly	lgpl	5,000
;/************************************************************************// ; * @file startup_ARMCM0.s ; * @brief CMSIS Cortex-M0 Core Device Startup File ; * for CM0 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; ------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA \|.text\|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_variance_example/ARM/startup_ARMCM0.s	Motorola 68K Assembly	lgpl	4,363
/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 29. November 2010 * $Revision: V1.0.3 * * Project: CMSIS DSP Library * Title: arm_variance_example_f32.c * * Description: Example code demonstrating variance calculation of input sequence. * * Target Processor: Cortex-M4/Cortex-M3 * * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.1 2010/10/05 KK * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 KK * Production release and review comments incorporated. * ------------------------------------------------------------------- / /* * @ingroup groupExamples / /* * @defgroup VarianceExample Variance Example * * \par Description: * \par * Demonstrates the use of Basic Math and Support Functions to calculate the variance of an * input sequence with N samples. Uniformly distributed white noise is taken as input. * * \par Algorithm: * \par * The variance of a sequence is the mean of the squared deviation of the sequence from its mean. * \par * This is denoted by the following equation: * <pre> variance = ((x[0] - x') * (x[0] - x') + (x[1] - x') * (x[1] - x') + ... + * (x[n-1] - x') * (x[n-1] - x')) / (N-1)</pre> * where, <code>x[n]</code> is the input sequence, <code>N</code> is the number of input samples, and * <code>x'</code> is the mean value of the input sequence, <code>x[n]</code>. * \par * The mean value <code>x'</code> is defined as: * <pre> x' = (x[0] + x[1] + ... + x[n-1]) / N</pre> * * \par Block Diagram: * \par * \image html Variance.gif * * * \par Variables Description: * \par * \li \c testInput_f32 points to the input data * \li \c wire1, \c wir2, \c wire3 temporary buffers * \li \c blockSize number of samples processed at a time * \li \c refVarianceOut reference variance value * * \par CMSIS DSP Software Library Functions Used: * \par * - arm_dot_prod_f32() * - arm_mult_f32() * - arm_sub_f32() * - arm_fill_f32() * - arm_copy_f32() * * <b> Refer </b> * \link arm_variance_example_f32.c \endlink * / /* \example arm_variance_example_f32.c / #include <math.h> #include "arm_math.h" / ---------------------------------------------------------------------- * Defines each of the tests performed * ------------------------------------------------------------------- / #define MAX_BLOCKSIZE 32 #define DELTA (0.000001f) / ---------------------------------------------------------------------- * Declare I/O buffers * ------------------------------------------------------------------- / float32_t wire1[MAX_BLOCKSIZE]; float32_t wire2[MAX_BLOCKSIZE]; float32_t wire3[MAX_BLOCKSIZE]; / ---------------------------------------------------------------------- * Test input data for Floating point Variance example for 32-blockSize * Generated by the MATLAB randn() function * ------------------------------------------------------------------- / float32_t testInput_f32[32] = { -0.432564811528221, -1.665584378238097, 0.125332306474831, 0.287676420358549, -1.146471350681464, 1.190915465642999, 1.189164201652103, -0.037633276593318, 0.327292361408654, 0.174639142820925, -0.186708577681439, 0.725790548293303, -0.588316543014189, 2.183185818197101, -0.136395883086596, 0.113931313520810, 1.066768211359189, 0.059281460523605, -0.095648405483669, -0.832349463650022, 0.294410816392640, -1.336181857937804, 0.714324551818952, 1.623562064446271, -0.691775701702287, 0.857996672828263, 1.254001421602532, -1.593729576447477, -1.440964431901020, 0.571147623658178, -0.399885577715363, 0.689997375464345 }; / ---------------------------------------------------------------------- * Declare Global variables * ------------------------------------------------------------------- / uint32_t blockSize = 32; float32_t refVarianceOut = 0.903941793931839; / ---------------------------------------------------------------------- * Variance calculation test * ------------------------------------------------------------------- / int32_t main(void) { arm_status status; float32_t mean, oneByBlockSize; float32_t variance; float32_t diff; status = ARM_MATH_SUCCESS; / Calculation of mean value of input / / x' = 1/blockSize * (x(0)* 1 + x(1) * 1 + ... + x(n-1) * 1) / / Fill wire1 buffer with 1.0 value / arm_fill_f32(1.0, wire1, blockSize); / Calculate the dot product of wire1 and wire2 / / (x(0)* 1 + x(1) * 1 + ...+ x(n-1) * 1) / arm_dot_prod_f32(testInput_f32, wire1, blockSize, &mean); / Calculation of 1/blockSize / oneByBlockSize = 1.0 / (blockSize); / 1/blockSize * (x(0)* 1 + x(1) * 1 + ... + x(n-1) * 1) / arm_mult_f32(&mean, &oneByBlockSize, &mean, 1); / Calculation of variance value of input / / (1/blockSize) * (x(0) - x') * (x(0) - x') + (x(1) - x') * (x(1) - x') + ... + (x(n-1) - x') * (x(n-1) - x') / / Fill wire2 with mean value x' / arm_fill_f32(mean, wire2, blockSize); / wire3 contains (x-x') / arm_sub_f32(testInput_f32, wire2, wire3, blockSize); / wire2 contains (x-x') / arm_copy_f32(wire3, wire2, blockSize); / (x(0) - x') * (x(0) - x') + (x(1) - x') * (x(1) - x') + ... + (x(n-1) - x') * (x(n-1) - x') / arm_dot_prod_f32(wire2, wire3, blockSize, &variance); / Calculation of 1/blockSize / oneByBlockSize = 1.0 / (blockSize - 1); / Calculation of variance / arm_mult_f32(&variance, &oneByBlockSize, &variance, 1); / absolute value of difference between ref and test / diff = fabsf(refVarianceOut - variance); / Comparison of variance value with reference / if(diff > DELTA) { status = ARM_MATH_TEST_FAILURE; } if( status != ARM_MATH_SUCCESS) { while(1); } while(1); / main function does not return / } /* \endlink */	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_variance_example/arm_variance_example_f32.c	C	lgpl	6,221
/************************************************************************// * @file system_ARMCM0.c * @brief CMSIS Cortex-M0 Device System Source File * for CM0 Device Series * @version V1.05 * @date 26. July 2011 * * @note * Copyright (C) 2010-2011 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * *****************************************************************************/ #include "ARMCM0.h" /---------------------------------------------------------------------------- Define clocks ----------------------------------------------------------------------------/ #define __HSI ( 8000000UL) #define __XTAL (12000000UL) /* Oscillator frequency / #define __SYSTEM_CLOCK (4__XTAL) /---------------------------------------------------------------------------- Clock Variable definitions ----------------------------------------------------------------------------/ uint32_t SystemCoreClock = __SYSTEM_CLOCK;/!< System Clock Frequency (Core Clock)/ /---------------------------------------------------------------------------- Clock functions ----------------------------------------------------------------------------/ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency / { SystemCoreClock = __SYSTEM_CLOCK; } /* * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System. */ void SystemInit (void) { SystemCoreClock = __SYSTEM_CLOCK; #ifdef __USE_GPIO ARM_GPIO0->DATA[0].WORD = 0; ARM_GPIO0->IE = 0; ARM_GPIO0->DIR = 0xff83; ARM_GPIO1->DATA[0].WORD = 0; ARM_GPIO1->IE = 0; ARM_GPIO1->DIR = 0; ARM_GPIO2->DATA[0].WORD = 0; ARM_GPIO2->IE = 0; ARM_GPIO2->DIR = 0; #endif }	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_variance_example/system_ARMCM0.c	C	lgpl	2,488
/************************************************************************// * @file system_ARMCM4.c * @brief CMSIS Cortex-M4 Device System Source File * for CM4 Device Series * @version V1.05 * @date 26. July 2011 * * @note * Copyright (C) 2010-2011 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * *****************************************************************************/ #include "ARMCM4.h" /---------------------------------------------------------------------------- Define clocks ----------------------------------------------------------------------------/ #define __HSI ( 8000000UL) #define __XTAL (12000000UL) /* Oscillator frequency / #define __SYSTEM_CLOCK (4__XTAL) /---------------------------------------------------------------------------- Clock Variable definitions ----------------------------------------------------------------------------/ uint32_t SystemCoreClock = __SYSTEM_CLOCK;/!< System Clock Frequency (Core Clock)/ /---------------------------------------------------------------------------- Clock functions ----------------------------------------------------------------------------/ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency / { SystemCoreClock = __SYSTEM_CLOCK; } /* * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System. / void SystemInit (void) { #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) SCB->CPACR \|= ((3UL << 102) \| /* set CP10 Full Access / (3UL << 112) ); /* set CP11 Full Access */ #endif SystemCoreClock = __SYSTEM_CLOCK; #ifdef __USE_GPIO ARM_GPIO0->DATA[0].WORD = 0; ARM_GPIO0->IE = 0; ARM_GPIO0->DIR = 0xff83; ARM_GPIO1->DATA[0].WORD = 0; ARM_GPIO1->IE = 0; ARM_GPIO1->DIR = 0; ARM_GPIO2->DATA[0].WORD = 0; ARM_GPIO2->IE = 0; ARM_GPIO2->DIR = 0; #endif }	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_variance_example/system_ARMCM4.c	C	lgpl	2,707
/************************************************************************// * @file system_ARMCM3.c * @brief CMSIS Cortex-M3 Device System Source File * for CM3 Device Series * @version V1.05 * @date 26. July 2011 * * @note * Copyright (C) 2010-2011 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * *****************************************************************************/ #include "ARMCM3.h" /---------------------------------------------------------------------------- Define clocks ----------------------------------------------------------------------------/ #define __HSI ( 8000000UL) #define __XTAL (12000000UL) /* Oscillator frequency / #define __SYSTEM_CLOCK (4__XTAL) /---------------------------------------------------------------------------- Clock Variable definitions ----------------------------------------------------------------------------/ uint32_t SystemCoreClock = __SYSTEM_CLOCK;/!< System Clock Frequency (Core Clock)/ /---------------------------------------------------------------------------- Clock functions ----------------------------------------------------------------------------/ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency / { SystemCoreClock = __SYSTEM_CLOCK; } /* * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System. */ void SystemInit (void) { SystemCoreClock = __SYSTEM_CLOCK; #ifdef __USE_GPIO ARM_GPIO0->DATA[0].WORD = 0; ARM_GPIO0->IE = 0; ARM_GPIO0->DIR = 0xff83; ARM_GPIO1->DATA[0].WORD = 0; ARM_GPIO1->IE = 0; ARM_GPIO1->DIR = 0; ARM_GPIO2->DATA[0].WORD = 0; ARM_GPIO2->IE = 0; ARM_GPIO2->DIR = 0; #endif }	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_variance_example/system_ARMCM3.c	C	lgpl	2,488
;/************************************************************************// ; * @file startup_ARMCM4.s ; * @brief CMSIS Cortex-M4 Core Device Startup File ; * for CM4 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; ------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA \|.text\|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP MemManage_Handler\ PROC EXPORT MemManage_Handler [WEAK] B . ENDP BusFault_Handler\ PROC EXPORT BusFault_Handler [WEAK] B . ENDP UsageFault_Handler\ PROC EXPORT UsageFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP DebugMon_Handler\ PROC EXPORT DebugMon_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_fft_bin_example/ARM/startup_ARMCM4.s	Unix Assembly	lgpl	5,000
;/************************************************************************// ; * @file startup_ARMCM3.s ; * @brief CMSIS Cortex-M3 Core Device Startup File ; * for CM3 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; ------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA \|.text\|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP MemManage_Handler\ PROC EXPORT MemManage_Handler [WEAK] B . ENDP BusFault_Handler\ PROC EXPORT BusFault_Handler [WEAK] B . ENDP UsageFault_Handler\ PROC EXPORT UsageFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP DebugMon_Handler\ PROC EXPORT DebugMon_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_fft_bin_example/ARM/startup_ARMCM3.s	Unix Assembly	lgpl	5,000
;/************************************************************************// ; * @file startup_ARMCM0.s ; * @brief CMSIS Cortex-M0 Core Device Startup File ; * for CM0 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; ------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA \|.text\|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_fft_bin_example/ARM/startup_ARMCM0.s	Motorola 68K Assembly	lgpl	4,363
/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 29. November 2010 * $Revision: V1.0.3 * * Project: CMSIS DSP Library * Title: arm_fft_bin_example_f32.c * * Description: Example code demonstrating calculation of Max energy bin of * frequency domain of input signal. * * Target Processor: Cortex-M4/Cortex-M3 * * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.1 2010/10/05 KK * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 KK * Production release and review comments incorporated. * ------------------------------------------------------------------- / /* * @ingroup groupExamples / /* * @defgroup FrequencyBin Frequency Bin Example * * \par Description * \par * Demonstrates the calculation of the maximum energy bin in the frequency * domain of the input signal with the use of Complex FFT, Complex * Magnitude, and Maximum functions. * * \par Algorithm: * \par * The input test signal contains a 10 kHz signal with uniformly distributed white noise. * Calculating the FFT of the input signal will give us the maximum energy of the * bin corresponding to the input frequency of 10 kHz. * * \par Block Diagram: * \image html FFTBin.gif "Block Diagram" * \par * The figure below shows the time domain signal of 10 kHz signal with * uniformly distributed white noise, and the next figure shows the input * in the frequency domain. The bin with maximum energy corresponds to 10 kHz signal. * \par * \image html FFTBinInput.gif "Input signal in Time domain" * \image html FFTBinOutput.gif "Input signal in Frequency domain" * * \par Variables Description: * \par * \li \c testInput_f32_10khz points to the input data * \li \c testOutput points to the output data * \li \c fftSize length of FFT * \li \c ifftFlag flag for the selection of CFFT/CIFFT * \li \c doBitReverse Flag for selection of normal order or bit reversed order * \li \c refIndex reference index value at which maximum energy of bin ocuurs * \li \c testIndex calculated index value at which maximum energy of bin ocuurs * * \par CMSIS DSP Software Library Functions Used: * \par * - arm_cfft_radix4_init_f32() * - arm_cfft_radix4_f32() * - arm_cmplx_mag_f32() * - arm_max_f32() * * <b> Refer </b> * \link arm_fft_bin_example_f32.c \endlink * / /* \example arm_fft_bin_example_f32.c / #include "arm_math.h" #define TEST_LENGTH_SAMPLES 2048 / ------------------------------------------------------------------- * External Input and Output buffer Declarations for FFT Bin Example * ------------------------------------------------------------------- / extern float32_t testInput_f32_10khz[TEST_LENGTH_SAMPLES]; static float32_t testOutput[TEST_LENGTH_SAMPLES/2]; / ------------------------------------------------------------------ * Global variables for FFT Bin Example * ------------------------------------------------------------------- / uint32_t fftSize = 1024; uint32_t ifftFlag = 0; uint32_t doBitReverse = 1; / Reference index at which max energy of bin ocuurs / uint32_t refIndex = 213, testIndex = 0; / ---------------------------------------------------------------------- * Max magnitude FFT Bin test * ------------------------------------------------------------------- / int32_t main(void) { arm_status status; arm_cfft_radix4_instance_f32 S; float32_t maxValue; status = ARM_MATH_SUCCESS; / Initialize the CFFT/CIFFT module / status = arm_cfft_radix4_init_f32(&S, fftSize, ifftFlag, doBitReverse); / Process the data through the CFFT/CIFFT module / arm_cfft_radix4_f32(&S, testInput_f32_10khz); / Process the data through the Complex Magnitude Module for calculating the magnitude at each bin / arm_cmplx_mag_f32(testInput_f32_10khz, testOutput, fftSize); / Calculates maxValue and returns corresponding BIN value / arm_max_f32(testOutput, fftSize, &maxValue, &testIndex); if(testIndex != refIndex) { status = ARM_MATH_TEST_FAILURE; } / ---------------------------------------------------------------------- Loop here if the signals fail the PASS check. This denotes a test failure ** ------------------------------------------------------------------- / if( status != ARM_MATH_SUCCESS) { while(1); } while(1); / main function does not return / } /* \endlink */	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_fft_bin_example/arm_fft_bin_example_f32.c	C	lgpl	4,851
/************************************************************************// * @file system_ARMCM0.c * @brief CMSIS Cortex-M0 Device System Source File * for CM0 Device Series * @version V1.05 * @date 26. July 2011 * * @note * Copyright (C) 2010-2011 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * *****************************************************************************/ #include "ARMCM0.h" /---------------------------------------------------------------------------- Define clocks ----------------------------------------------------------------------------/ #define __HSI ( 8000000UL) #define __XTAL (12000000UL) /* Oscillator frequency / #define __SYSTEM_CLOCK (4__XTAL) /---------------------------------------------------------------------------- Clock Variable definitions ----------------------------------------------------------------------------/ uint32_t SystemCoreClock = __SYSTEM_CLOCK;/!< System Clock Frequency (Core Clock)/ /---------------------------------------------------------------------------- Clock functions ----------------------------------------------------------------------------/ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency / { SystemCoreClock = __SYSTEM_CLOCK; } /* * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System. */ void SystemInit (void) { SystemCoreClock = __SYSTEM_CLOCK; #ifdef __USE_GPIO ARM_GPIO0->DATA[0].WORD = 0; ARM_GPIO0->IE = 0; ARM_GPIO0->DIR = 0xff83; ARM_GPIO1->DATA[0].WORD = 0; ARM_GPIO1->IE = 0; ARM_GPIO1->DIR = 0; ARM_GPIO2->DATA[0].WORD = 0; ARM_GPIO2->IE = 0; ARM_GPIO2->DIR = 0; #endif }	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_fft_bin_example/system_ARMCM0.c	C	lgpl	2,488
/************************************************************************// * @file system_ARMCM4.c * @brief CMSIS Cortex-M4 Device System Source File * for CM4 Device Series * @version V1.05 * @date 26. July 2011 * * @note * Copyright (C) 2010-2011 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * *****************************************************************************/ #include "ARMCM4.h" /---------------------------------------------------------------------------- Define clocks ----------------------------------------------------------------------------/ #define __HSI ( 8000000UL) #define __XTAL (12000000UL) /* Oscillator frequency / #define __SYSTEM_CLOCK (4__XTAL) /---------------------------------------------------------------------------- Clock Variable definitions ----------------------------------------------------------------------------/ uint32_t SystemCoreClock = __SYSTEM_CLOCK;/!< System Clock Frequency (Core Clock)/ /---------------------------------------------------------------------------- Clock functions ----------------------------------------------------------------------------/ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency / { SystemCoreClock = __SYSTEM_CLOCK; } /* * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System. / void SystemInit (void) { #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) SCB->CPACR \|= ((3UL << 102) \| /* set CP10 Full Access / (3UL << 112) ); /* set CP11 Full Access */ #endif SystemCoreClock = __SYSTEM_CLOCK; #ifdef __USE_GPIO ARM_GPIO0->DATA[0].WORD = 0; ARM_GPIO0->IE = 0; ARM_GPIO0->DIR = 0xff83; ARM_GPIO1->DATA[0].WORD = 0; ARM_GPIO1->IE = 0; ARM_GPIO1->DIR = 0; ARM_GPIO2->DATA[0].WORD = 0; ARM_GPIO2->IE = 0; ARM_GPIO2->DIR = 0; #endif }	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_fft_bin_example/system_ARMCM4.c	C	lgpl	2,707
/************************************************************************// * @file system_ARMCM3.c * @brief CMSIS Cortex-M3 Device System Source File * for CM3 Device Series * @version V1.05 * @date 26. July 2011 * * @note * Copyright (C) 2010-2011 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * *****************************************************************************/ #include "ARMCM3.h" /---------------------------------------------------------------------------- Define clocks ----------------------------------------------------------------------------/ #define __HSI ( 8000000UL) #define __XTAL (12000000UL) /* Oscillator frequency / #define __SYSTEM_CLOCK (4__XTAL) /---------------------------------------------------------------------------- Clock Variable definitions ----------------------------------------------------------------------------/ uint32_t SystemCoreClock = __SYSTEM_CLOCK;/!< System Clock Frequency (Core Clock)/ /---------------------------------------------------------------------------- Clock functions ----------------------------------------------------------------------------/ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency / { SystemCoreClock = __SYSTEM_CLOCK; } /* * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System. */ void SystemInit (void) { SystemCoreClock = __SYSTEM_CLOCK; #ifdef __USE_GPIO ARM_GPIO0->DATA[0].WORD = 0; ARM_GPIO0->IE = 0; ARM_GPIO0->DIR = 0xff83; ARM_GPIO1->DATA[0].WORD = 0; ARM_GPIO1->IE = 0; ARM_GPIO1->DIR = 0; ARM_GPIO2->DATA[0].WORD = 0; ARM_GPIO2->IE = 0; ARM_GPIO2->DIR = 0; #endif }	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_fft_bin_example/system_ARMCM3.c	C	lgpl	2,488
#include "arm_math.h" /* ---------------------------------------------------------------------- Test Input signal contains 10KHz signal + Uniformly distributed white noise ** ------------------------------------------------------------------- */ float32_t testInput_f32_10khz[2048] = { -0.865129623056441, 0.000000000000000, -2.655020678073846, 0.000000000000000, 0.600664612949661, 0.000000000000000, 0.080378093886515, 0.000000000000000, -2.899160484012034, 0.000000000000000, 2.563004262857762, 0.000000000000000, 3.078328403304206, 0.000000000000000, 0.105906778385130, 0.000000000000000, 0.048366940168201, 0.000000000000000, -0.145696461188734, 0.000000000000000, -0.023417155362879, 0.000000000000000, 2.127729174988954, 0.000000000000000, -1.176633086028377, 0.000000000000000, 3.690223557991855, 0.000000000000000, -0.622791766173194, 0.000000000000000, 0.722837373872203, 0.000000000000000, 2.739754205367484, 0.000000000000000, -0.062610410524552, 0.000000000000000, -0.891296810967338, 0.000000000000000, -1.845872258871811, 0.000000000000000, 1.195039415434387, 0.000000000000000, -2.177388969045026, 0.000000000000000, 1.078649103637905, 0.000000000000000, 2.570976050490193, 0.000000000000000, -1.383551403404574, 0.000000000000000, 2.392141424058873, 0.000000000000000, 2.858002843205065, 0.000000000000000, -3.682433899725536, 0.000000000000000, -3.488146646451150, 0.000000000000000, 1.323468578888120, 0.000000000000000, -0.099771155430726, 0.000000000000000, 1.561168082500454, 0.000000000000000, 1.025026795103179, 0.000000000000000, 0.928841900171200, 0.000000000000000, 2.930499509864950, 0.000000000000000, 2.013349089766430, 0.000000000000000, 2.381676148486737, 0.000000000000000, -3.081062307950236, 0.000000000000000, -0.389579115537544, 0.000000000000000, 0.181540149166620, 0.000000000000000, -2.601953341353208, 0.000000000000000, 0.333435137783218, 0.000000000000000, -2.812945856162965, 0.000000000000000, 2.649109640172910, 0.000000000000000, -1.003963025744654, 0.000000000000000, 1.552460768755035, 0.000000000000000, 0.088641345335247, 0.000000000000000, -2.519951327113426, 0.000000000000000, -4.341348988610527, 0.000000000000000, 0.557772429359965, 0.000000000000000, -1.671267412948494, 0.000000000000000, 0.733951350960387, 0.000000000000000, 0.409263788034864, 0.000000000000000, 3.566033071952806, 0.000000000000000, 1.882565173848352, 0.000000000000000, -1.106017073793287, 0.000000000000000, 0.154456720778718, 0.000000000000000, -2.513205795512153, 0.000000000000000, 0.310978660939421, 0.000000000000000, 0.579706500111723, 0.000000000000000, 0.000086383683251, 0.000000000000000, -1.311866980897721, 0.000000000000000, 1.840007477574986, 0.000000000000000, -3.253005768451345, 0.000000000000000, 1.462584328739432, 0.000000000000000, 1.610103610851738, 0.000000000000000, 0.761914676858907, 0.000000000000000, 0.974541361089834, 0.000000000000000, 0.686845845885983, 0.000000000000000, 1.849153122025191, 0.000000000000000, 0.787800410401453, 0.000000000000000, -1.187438909666279, 0.000000000000000, -0.754937911044720, 0.000000000000000, 0.084373858395232, 0.000000000000000, -2.600269011710521, 0.000000000000000, -0.962982842142644, 0.000000000000000, -0.369328108540868, 0.000000000000000, 0.810791418361879, 0.000000000000000, 3.587016488699641, 0.000000000000000, -0.520776145083723, 0.000000000000000, 0.640249919627884, 0.000000000000000, 1.103122489464969, 0.000000000000000, 2.231779881455556, 0.000000000000000, -1.308035392685241, 0.000000000000000, 0.424070304330106, 0.000000000000000, -0.200383932651189, 0.000000000000000, -2.365526783356541, 0.000000000000000, -0.989114757436628, 0.000000000000000, 2.770807688959777, 0.000000000000000, -0.444172737462307, 0.000000000000000, 0.079760979374078, 0.000000000000000, -0.005199118412183, 0.000000000000000, -0.664712668309527, 0.000000000000000, -0.624171857561896, 0.000000000000000, 0.537306979007338, 0.000000000000000, -2.575955675497642, 0.000000000000000, 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0.000000000000000, -3.980689173859100, 0.000000000000000, };	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_fft_bin_example/arm_fft_bin_data.c	C	lgpl	42,297
;/************************************************************************// ; * @file startup_ARMCM4.s ; * @brief CMSIS Cortex-M4 Core Device Startup File ; * for CM4 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; ------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA \|.text\|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP MemManage_Handler\ PROC EXPORT MemManage_Handler [WEAK] B . ENDP BusFault_Handler\ PROC EXPORT BusFault_Handler [WEAK] B . ENDP UsageFault_Handler\ PROC EXPORT UsageFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP DebugMon_Handler\ PROC EXPORT DebugMon_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_signal_converge_example/ARM/startup_ARMCM4.s	Unix Assembly	lgpl	5,000
;/************************************************************************// ; * @file startup_ARMCM3.s ; * @brief CMSIS Cortex-M3 Core Device Startup File ; * for CM3 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; ------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA \|.text\|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP MemManage_Handler\ PROC EXPORT MemManage_Handler [WEAK] B . ENDP BusFault_Handler\ PROC EXPORT BusFault_Handler [WEAK] B . ENDP UsageFault_Handler\ PROC EXPORT UsageFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP DebugMon_Handler\ PROC EXPORT DebugMon_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_signal_converge_example/ARM/startup_ARMCM3.s	Unix Assembly	lgpl	5,000
;/************************************************************************// ; * @file startup_ARMCM0.s ; * @brief CMSIS Cortex-M0 Core Device Startup File ; * for CM0 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; ------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA \|.text\|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_signal_converge_example/ARM/startup_ARMCM0.s	Motorola 68K Assembly	lgpl	4,363
/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 29. November 2010 * $Revision: V1.0.3 * * Project: CMSIS DSP Library * Title: arm_signal_converge_example_f32.c * * Description: Example code demonstrating convergence of an adaptive * filter. * * Target Processor: Cortex-M4/Cortex-M3 * * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.1 2010/10/05 KK * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 KK * Production release and review comments incorporated. * ------------------------------------------------------------------- / /* * @ingroup groupExamples / /* * @defgroup SignalConvergence Signal Convergence Example * * \par Description: * \par * Demonstrates the ability of an adaptive filter to "learn" the transfer function of * a FIR lowpass filter using the Normalized LMS Filter, Finite Impulse * Response (FIR) Filter, and Basic Math Functions. * * \par Algorithm: * \par * The figure below illustrates the signal flow in this example. Uniformly distributed white * noise is passed through an FIR lowpass filter. The output of the FIR filter serves as the * reference input of the adaptive filter (normalized LMS filter). The white noise is input * to the adaptive filter. The adaptive filter learns the transfer function of the FIR filter. * The filter outputs two signals: (1) the output of the internal adaptive FIR filter, and * (2) the error signal which is the difference between the adaptive filter and the reference * output of the FIR filter. Over time as the adaptive filter learns the transfer function * of the FIR filter, the first output approaches the reference output of the FIR filter, * and the error signal approaches zero. * \par * The adaptive filter converges properly even if the input signal has a large dynamic * range (i.e., varies from small to large values). The coefficients of the adaptive filter * are initially zero, and then converge over 1536 samples. The internal function test_signal_converge() * implements the stopping condition. The function checks if all of the values of the error signal have a * magnitude below a threshold DELTA. * * \par Block Diagram: * \par * \image html SignalFlow.gif * * * \par Variables Description: * \par * \li \c testInput_f32 points to the input data * \li \c firStateF32 points to FIR state buffer * \li \c lmsStateF32 points to Normalised Least mean square FIR filter state buffer * \li \c FIRCoeff_f32 points to coefficient buffer * \li \c lmsNormCoeff_f32 points to Normalised Least mean square FIR filter coefficient buffer * \li \c wire1, wir2, wire3 temporary buffers * \li \c errOutput, err_signal temporary error buffers * * \par CMSIS DSP Software Library Functions Used: * \par * - arm_lms_norm_init_f32() * - arm_fir_init_f32() * - arm_fir_f32() * - arm_lms_norm_f32() * - arm_scale_f32() * - arm_abs_f32() * - arm_sub_f32() * - arm_min_f32() * - arm_copy_f32() * * <b> Refer </b> * \link arm_signal_converge_example_f32.c \endlink * / /* \example arm_signal_converge_example_f32.c / #include "arm_math.h" #include "math_helper.h" / ---------------------------------------------------------------------- ** Global defines for the simulation * ------------------------------------------------------------------- / #define TEST_LENGTH_SAMPLES 1536 #define NUMTAPS 32 #define BLOCKSIZE 32 #define DELTA_ERROR 0.000001f #define DELTA_COEFF 0.0001f #define MU 0.5f #define NUMFRAMES (TEST_LENGTH_SAMPLES / BLOCKSIZE) / ---------------------------------------------------------------------- * Declare FIR state buffers and structure * ------------------------------------------------------------------- / float32_t firStateF32[NUMTAPS + BLOCKSIZE]; arm_fir_instance_f32 LPF_instance; / ---------------------------------------------------------------------- * Declare LMSNorm state buffers and structure * ------------------------------------------------------------------- / float32_t lmsStateF32[NUMTAPS + BLOCKSIZE]; float32_t errOutput[TEST_LENGTH_SAMPLES]; arm_lms_norm_instance_f32 lmsNorm_instance; / ---------------------------------------------------------------------- * Function Declarations for Signal Convergence Example * ------------------------------------------------------------------- / arm_status test_signal_converge_example( void ); / ---------------------------------------------------------------------- * Internal functions * ------------------------------------------------------------------- / arm_status test_signal_converge(float32_t err_signal, uint32_t blockSize); void getinput(float32_t* input, uint32_t fr_cnt, uint32_t blockSize); /* ---------------------------------------------------------------------- * External Declarations for FIR F32 module Test * ------------------------------------------------------------------- / extern float32_t testInput_f32[TEST_LENGTH_SAMPLES]; extern float32_t lmsNormCoeff_f32[32]; extern const float32_t FIRCoeff_f32[32]; extern arm_lms_norm_instance_f32 lmsNorm_instance; / ---------------------------------------------------------------------- * Declare I/O buffers * ------------------------------------------------------------------- / float32_t wire1[BLOCKSIZE]; float32_t wire2[BLOCKSIZE]; float32_t wire3[BLOCKSIZE]; float32_t err_signal[BLOCKSIZE]; / ---------------------------------------------------------------------- * Signal converge test * ------------------------------------------------------------------- / int32_t main(void) { uint32_t i; arm_status status; uint32_t index; float32_t minValue; / Initialize the LMSNorm data structure / arm_lms_norm_init_f32(&lmsNorm_instance, NUMTAPS, lmsNormCoeff_f32, lmsStateF32, MU, BLOCKSIZE); / Initialize the FIR data structure / arm_fir_init_f32(&LPF_instance, NUMTAPS, (float32_t )FIRCoeff_f32, firStateF32, BLOCKSIZE); /* ---------------------------------------------------------------------- * Loop over the frames of data and execute each of the processing * functions in the system. * ------------------------------------------------------------------- / for(i=0; i < NUMFRAMES; i++) { / Read the input data - uniformly distributed random noise - into wire1 / arm_copy_f32(testInput_f32 + (i BLOCKSIZE), wire1, BLOCKSIZE); /* Execute the FIR processing function. Input wire1 and output wire2 / arm_fir_f32(&LPF_instance, wire1, wire2, BLOCKSIZE); / Execute the LMS Norm processing function/ arm_lms_norm_f32(&lmsNorm_instance, / LMSNorm instance / wire1, / Input signal / wire2, / Reference Signal / wire3, / Converged Signal / err_signal, / Error Signal, this will become small as the signal converges / BLOCKSIZE); / BlockSize / / apply overall gain / arm_scale_f32(wire3, 5, wire3, BLOCKSIZE); / in-place buffer / } status = ARM_MATH_SUCCESS; / ------------------------------------------------------------------------------- * Test whether the error signal has reached towards 0. * ----------------------------------------------------------------------------- / arm_abs_f32(err_signal, err_signal, BLOCKSIZE); arm_min_f32(err_signal, BLOCKSIZE, &minValue, &index); if (minValue > DELTA_ERROR) { status = ARM_MATH_TEST_FAILURE; } / ---------------------------------------------------------------------- * Test whether the filter coefficients have converged. * ------------------------------------------------------------------- / arm_sub_f32((float32_t )FIRCoeff_f32, lmsNormCoeff_f32, lmsNormCoeff_f32, NUMTAPS); arm_abs_f32(lmsNormCoeff_f32, lmsNormCoeff_f32, NUMTAPS); arm_min_f32(lmsNormCoeff_f32, NUMTAPS, &minValue, &index); if (minValue > DELTA_COEFF) { status = ARM_MATH_TEST_FAILURE; } /* ---------------------------------------------------------------------- * Loop here if the signals did not pass the convergence check. * This denotes a test failure * ------------------------------------------------------------------- / if( status != ARM_MATH_SUCCESS) { while(1); } while(1); / main function does not return / } /* \endlink */	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_signal_converge_example/arm_signal_converge_example_f32.c	C	lgpl	9,115
/************************************************************************// * @file system_ARMCM0.c * @brief CMSIS Cortex-M0 Device System Source File * for CM0 Device Series * @version V1.05 * @date 26. July 2011 * * @note * Copyright (C) 2010-2011 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * *****************************************************************************/ #include "ARMCM0.h" /---------------------------------------------------------------------------- Define clocks ----------------------------------------------------------------------------/ #define __HSI ( 8000000UL) #define __XTAL (12000000UL) /* Oscillator frequency / #define __SYSTEM_CLOCK (4__XTAL) /---------------------------------------------------------------------------- Clock Variable definitions ----------------------------------------------------------------------------/ uint32_t SystemCoreClock = __SYSTEM_CLOCK;/!< System Clock Frequency (Core Clock)/ /---------------------------------------------------------------------------- Clock functions ----------------------------------------------------------------------------/ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency / { SystemCoreClock = __SYSTEM_CLOCK; } /* * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System. */ void SystemInit (void) { SystemCoreClock = __SYSTEM_CLOCK; #ifdef __USE_GPIO ARM_GPIO0->DATA[0].WORD = 0; ARM_GPIO0->IE = 0; ARM_GPIO0->DIR = 0xff83; ARM_GPIO1->DATA[0].WORD = 0; ARM_GPIO1->IE = 0; ARM_GPIO1->DIR = 0; ARM_GPIO2->DATA[0].WORD = 0; ARM_GPIO2->IE = 0; ARM_GPIO2->DIR = 0; #endif }	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_signal_converge_example/system_ARMCM0.c	C	lgpl	2,488
/************************************************************************// * @file system_ARMCM4.c * @brief CMSIS Cortex-M4 Device System Source File * for CM4 Device Series * @version V1.05 * @date 26. July 2011 * * @note * Copyright (C) 2010-2011 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * *****************************************************************************/ #include "ARMCM4.h" /---------------------------------------------------------------------------- Define clocks ----------------------------------------------------------------------------/ #define __HSI ( 8000000UL) #define __XTAL (12000000UL) /* Oscillator frequency / #define __SYSTEM_CLOCK (4__XTAL) /---------------------------------------------------------------------------- Clock Variable definitions ----------------------------------------------------------------------------/ uint32_t SystemCoreClock = __SYSTEM_CLOCK;/!< System Clock Frequency (Core Clock)/ /---------------------------------------------------------------------------- Clock functions ----------------------------------------------------------------------------/ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency / { SystemCoreClock = __SYSTEM_CLOCK; } /* * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System. / void SystemInit (void) { #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) SCB->CPACR \|= ((3UL << 102) \| /* set CP10 Full Access / (3UL << 112) ); /* set CP11 Full Access */ #endif SystemCoreClock = __SYSTEM_CLOCK; #ifdef __USE_GPIO ARM_GPIO0->DATA[0].WORD = 0; ARM_GPIO0->IE = 0; ARM_GPIO0->DIR = 0xff83; ARM_GPIO1->DATA[0].WORD = 0; ARM_GPIO1->IE = 0; ARM_GPIO1->DIR = 0; ARM_GPIO2->DATA[0].WORD = 0; ARM_GPIO2->IE = 0; ARM_GPIO2->DIR = 0; #endif }	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_signal_converge_example/system_ARMCM4.c	C	lgpl	2,707
/************************************************************************// * @file system_ARMCM3.c * @brief CMSIS Cortex-M3 Device System Source File * for CM3 Device Series * @version V1.05 * @date 26. July 2011 * * @note * Copyright (C) 2010-2011 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * *****************************************************************************/ #include "ARMCM3.h" /---------------------------------------------------------------------------- Define clocks ----------------------------------------------------------------------------/ #define __HSI ( 8000000UL) #define __XTAL (12000000UL) /* Oscillator frequency / #define __SYSTEM_CLOCK (4__XTAL) /---------------------------------------------------------------------------- Clock Variable definitions ----------------------------------------------------------------------------/ uint32_t SystemCoreClock = __SYSTEM_CLOCK;/!< System Clock Frequency (Core Clock)/ /---------------------------------------------------------------------------- Clock functions ----------------------------------------------------------------------------/ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency / { SystemCoreClock = __SYSTEM_CLOCK; } /* * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System. */ void SystemInit (void) { SystemCoreClock = __SYSTEM_CLOCK; #ifdef __USE_GPIO ARM_GPIO0->DATA[0].WORD = 0; ARM_GPIO0->IE = 0; ARM_GPIO0->DIR = 0xff83; ARM_GPIO1->DATA[0].WORD = 0; ARM_GPIO1->IE = 0; ARM_GPIO1->DIR = 0; ARM_GPIO2->DATA[0].WORD = 0; ARM_GPIO2->IE = 0; ARM_GPIO2->DIR = 0; #endif }	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_signal_converge_example/system_ARMCM3.c	C	lgpl	2,488
;/************************************************************************// ; * @file startup_ARMCM4.s ; * @brief CMSIS Cortex-M4 Core Device Startup File ; * for CM4 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; ------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA \|.text\|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP MemManage_Handler\ PROC EXPORT MemManage_Handler [WEAK] B . ENDP BusFault_Handler\ PROC EXPORT BusFault_Handler [WEAK] B . ENDP UsageFault_Handler\ PROC EXPORT UsageFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP DebugMon_Handler\ PROC EXPORT DebugMon_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_matrix_example/ARM/startup_ARMCM4.s	Unix Assembly	lgpl	5,000
;/************************************************************************// ; * @file startup_ARMCM3.s ; * @brief CMSIS Cortex-M3 Core Device Startup File ; * for CM3 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; ------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA \|.text\|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP MemManage_Handler\ PROC EXPORT MemManage_Handler [WEAK] B . ENDP BusFault_Handler\ PROC EXPORT BusFault_Handler [WEAK] B . ENDP UsageFault_Handler\ PROC EXPORT UsageFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP DebugMon_Handler\ PROC EXPORT DebugMon_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_matrix_example/ARM/startup_ARMCM3.s	Unix Assembly	lgpl	5,000
;/************************************************************************// ; * @file startup_ARMCM0.s ; * @brief CMSIS Cortex-M0 Core Device Startup File ; * for CM0 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; ------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA \|.text\|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_matrix_example/ARM/startup_ARMCM0.s	Motorola 68K Assembly	lgpl	4,363
/************************************************************************// * @file system_ARMCM0.c * @brief CMSIS Cortex-M0 Device System Source File * for CM0 Device Series * @version V1.05 * @date 26. July 2011 * * @note * Copyright (C) 2010-2011 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * *****************************************************************************/ #include "ARMCM0.h" /---------------------------------------------------------------------------- Define clocks ----------------------------------------------------------------------------/ #define __HSI ( 8000000UL) #define __XTAL (12000000UL) /* Oscillator frequency / #define __SYSTEM_CLOCK (4__XTAL) /---------------------------------------------------------------------------- Clock Variable definitions ----------------------------------------------------------------------------/ uint32_t SystemCoreClock = __SYSTEM_CLOCK;/!< System Clock Frequency (Core Clock)/ /---------------------------------------------------------------------------- Clock functions ----------------------------------------------------------------------------/ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency / { SystemCoreClock = __SYSTEM_CLOCK; } /* * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System. */ void SystemInit (void) { SystemCoreClock = __SYSTEM_CLOCK; #ifdef __USE_GPIO ARM_GPIO0->DATA[0].WORD = 0; ARM_GPIO0->IE = 0; ARM_GPIO0->DIR = 0xff83; ARM_GPIO1->DATA[0].WORD = 0; ARM_GPIO1->IE = 0; ARM_GPIO1->DIR = 0; ARM_GPIO2->DATA[0].WORD = 0; ARM_GPIO2->IE = 0; ARM_GPIO2->DIR = 0; #endif }	1137519-player	lib/CMSIS/DSP_Lib/Examples/arm_matrix_example/system_ARMCM0.c	C	lgpl	2,488

/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_cmplx_mult_cmplx_q31.c * * Description: Q31 complex-by-complex multiplication * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * -------------------------------------------------------------------- */ #include "arm_math.h" /** * @ingroup groupCmplxMath */ /** * @addtogroup CmplxByCmplxMult * @{ */ /** * @brief Q31 complex-by-complex multiplication * @param[in] *pSrcA points to the first input vector * @param[in] *pSrcB points to the second input vector * @param[out] *pDst points to the output vector * @param[in] numSamples number of complex samples in each vector * @return none. * * Scaling and Overflow Behavior: * \par * The function implements 1.31 by 1.31 multiplications and finally output is converted into 3.29 format. * Input down scaling is not required. */ void arm_cmplx_mult_cmplx_q31( q31_t * pSrcA, q31_t * pSrcB, q31_t * pDst, uint32_t numSamples) { q31_t a, b, c, d; /* Temporary variables to store real and imaginary values */ uint32_t blkCnt; /* loop counters */ #ifndef ARM_MATH_CM0 /* Run the below code for Cortex-M4 and Cortex-M3 */ /* loop Unrolling */ blkCnt = numSamples >> 2u; /* First part of the processing with loop unrolling. Compute 4 outputs at a time. ** a second loop below computes the remaining 1 to 3 samples. */ while(blkCnt > 0u) { /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */ /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. */ a = *pSrcA++; b = *pSrcA++; c = *pSrcB++; d = *pSrcB++; /* store the real result in 3.29 format in the destination buffer. */ *pDst++ = (q31_t) ((((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33)); /* store the imag result in 3.29 format in the destination buffer. */ *pDst++ = (q31_t) ((((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33)); a = *pSrcA++; b = *pSrcA++; c = *pSrcB++; d = *pSrcB++; /* store the result in 3.29 format in the destination buffer. */ *pDst++ = (q31_t) ((((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33)); /* store the result in 3.29 format in the destination buffer. */ *pDst++ = (q31_t) ((((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33)); a = *pSrcA++; b = *pSrcA++; c = *pSrcB++; d = *pSrcB++; /* store the result in 3.29 format in the destination buffer. */ *pDst++ = (q31_t) ((((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33)); /* store the result in 3.29 format in the destination buffer. */ *pDst++ = (q31_t) ((((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33)); a = *pSrcA++; b = *pSrcA++; c = *pSrcB++; d = *pSrcB++; /* store the result in 3.29 format in the destination buffer. */ *pDst++ = (q31_t) ((((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33)); /* store the result in 3.29 format in the destination buffer. */ *pDst++ = (q31_t) ((((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33)); /* Decrement the blockSize loop counter */ blkCnt--; } /* If the blockSize is not a multiple of 4, compute any remaining output samples here. ** No loop unrolling is used. */ blkCnt = numSamples % 0x4u; while(blkCnt > 0u) { /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */ /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. */ a = *pSrcA++; b = *pSrcA++; c = *pSrcB++; d = *pSrcB++; /* store the result in 3.29 format in the destination buffer. */ *pDst++ = (q31_t) ((((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33)); /* store the result in 3.29 format in the destination buffer. */ *pDst++ = (q31_t) ((((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33)); /* Decrement the blockSize loop counter */ blkCnt--; } #else /* Run the below code for Cortex-M0 */ /* loop Unrolling */ blkCnt = numSamples >> 1u; /* First part of the processing with loop unrolling. Compute 2 outputs at a time. ** a second loop below computes the remaining 1 sample. */ while(blkCnt > 0u) { /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */ /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. */ a = *pSrcA++; b = *pSrcA++; c = *pSrcB++; d = *pSrcB++; /* store the real result in 3.29 format in the destination buffer. */ *pDst++ = (q31_t) ((((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33)); /* store the imag result in 3.29 format in the destination buffer. */ *pDst++ = (q31_t) ((((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33)); a = *pSrcA++; b = *pSrcA++; c = *pSrcB++; d = *pSrcB++; /* store the result in 3.29 format in the destination buffer. */ *pDst++ = (q31_t) ((((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33)); /* store the result in 3.29 format in the destination buffer. */ *pDst++ = (q31_t) ((((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33)); /* Decrement the blockSize loop counter */ blkCnt--; } /* If the blockSize is not a multiple of 2, compute any remaining output samples here. ** No loop unrolling is used. */ blkCnt = numSamples % 0x2u; while(blkCnt > 0u) { /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */ /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. */ a = *pSrcA++; b = *pSrcA++; c = *pSrcB++; d = *pSrcB++; /* store the result in 3.29 format in the destination buffer. */ *pDst++ = (q31_t) ((((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33)); /* store the result in 3.29 format in the destination buffer. */ *pDst++ = (q31_t) ((((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33)); /* Decrement the blockSize loop counter */ blkCnt--; } #endif /* #ifndef ARM_MATH_CM0 */ } /** * @} end of CmplxByCmplxMult group */

1137519-player

lib/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c

C

lgpl

6,916

/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_cmplx_dot_prod_q31.c * * Description: Q31 complex dot product * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * -------------------------------------------------------------------- */ #include "arm_math.h" /** * @ingroup groupCmplxMath */ /** * @addtogroup cmplx_dot_prod * @{ */ /** * @brief Q31 complex dot product * @param *pSrcA points to the first input vector * @param *pSrcB points to the second input vector * @param numSamples number of complex samples in each vector * @param *realResult real part of the result returned here * @param *imagResult imaginary part of the result returned here * @return none. * * Scaling and Overflow Behavior: * \par * The function is implemented using an internal 64-bit accumulator. * The intermediate 1.31 by 1.31 multiplications are performed with 64-bit precision and then shifted to 16.48 format. * The internal real and imaginary accumulators are in 16.48 format and provide 15 guard bits. * Additions are nonsaturating and no overflow will occur as long as <code>numSamples</code> is less than 32768. * The return results <code>realResult</code> and <code>imagResult</code> are in 16.48 format. * Input down scaling is not required. */ void arm_cmplx_dot_prod_q31( q31_t * pSrcA, q31_t * pSrcB, uint32_t numSamples, q63_t * realResult, q63_t * imagResult) { q63_t real_sum = 0, imag_sum = 0; /* Temporary result storage */ #ifndef ARM_MATH_CM0 /* Run the below code for Cortex-M4 and Cortex-M3 */ uint32_t blkCnt; /* loop counter */ /*loop Unrolling */ blkCnt = numSamples >> 2u; /* First part of the processing with loop unrolling. Compute 4 outputs at a time. ** a second loop below computes the remaining 1 to 3 samples. */ while(blkCnt > 0u) { /* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */ /* Convert real data in 2.62 to 16.48 by 14 right shifts */ real_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14; /* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */ /* Convert imag data in 2.62 to 16.48 by 14 right shifts */ imag_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14; real_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14; imag_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14; real_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14; imag_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14; real_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14; imag_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14; /* Decrement the loop counter */ blkCnt--; } /* If the numSamples is not a multiple of 4, compute any remaining output samples here. ** No loop unrolling is used. */ blkCnt = numSamples % 0x4u; while(blkCnt > 0u) { /* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */ real_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14; /* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */ imag_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14; /* Decrement the loop counter */ blkCnt--; } #else /* Run the below code for Cortex-M0 */ while(numSamples > 0u) { /* outReal = realA[0]* realB[0] + realA[2]* realB[2] + realA[4]* realB[4] + .....+ realA[numSamples-2]* realB[numSamples-2] */ real_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14; /* outImag = imagA[1]* imagB[1] + imagA[3]* imagB[3] + imagA[5]* imagB[5] + .....+ imagA[numSamples-1]* imagB[numSamples-1] */ imag_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14; /* Decrement the loop counter */ numSamples--; } #endif /* #ifndef ARM_MATH_CM0 */ /* Store the real and imaginary results in 16.48 format */ *realResult = real_sum; *imagResult = imag_sum; } /** * @} end of cmplx_dot_prod group */

1137519-player

lib/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c

C

lgpl

4,826

/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_cmplx_mag_q31.c * * Description: Q31 complex magnitude * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * ---------------------------------------------------------------------------- */ #include "arm_math.h" /** * @ingroup groupCmplxMath */ /** * @addtogroup cmplx_mag * @{ */ /** * @brief Q31 complex magnitude * @param *pSrc points to the complex input vector * @param *pDst points to the real output vector * @param numSamples number of complex samples in the input vector * @return none. * * Scaling and Overflow Behavior: * \par * The function implements 1.31 by 1.31 multiplications and finally output is converted into 2.30 format. * Input down scaling is not required. */ void arm_cmplx_mag_q31( q31_t * pSrc, q31_t * pDst, uint32_t numSamples) { q31_t real, imag; /* Temporary variables to hold input values */ q31_t acc0, acc1; /* Accumulators */ #ifndef ARM_MATH_CM0 /* Run the below code for Cortex-M4 and Cortex-M3 */ uint32_t blkCnt; /* loop counter */ /*loop Unrolling */ blkCnt = numSamples >> 2u; /* First part of the processing with loop unrolling. Compute 4 outputs at a time. ** a second loop below computes the remaining 1 to 3 samples. */ while(blkCnt > 0u) { /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */ real = *pSrc++; imag = *pSrc++; acc0 = (q31_t) (((q63_t) real * real) >> 33); acc1 = (q31_t) (((q63_t) imag * imag) >> 33); /* store the result in 2.30 format in the destination buffer. */ arm_sqrt_q31(acc0 + acc1, pDst++); real = *pSrc++; imag = *pSrc++; acc0 = (q31_t) (((q63_t) real * real) >> 33); acc1 = (q31_t) (((q63_t) imag * imag) >> 33); /* store the result in 2.30 format in the destination buffer. */ arm_sqrt_q31(acc0 + acc1, pDst++); real = *pSrc++; imag = *pSrc++; acc0 = (q31_t) (((q63_t) real * real) >> 33); acc1 = (q31_t) (((q63_t) imag * imag) >> 33); /* store the result in 2.30 format in the destination buffer. */ arm_sqrt_q31(acc0 + acc1, pDst++); real = *pSrc++; imag = *pSrc++; acc0 = (q31_t) (((q63_t) real * real) >> 33); acc1 = (q31_t) (((q63_t) imag * imag) >> 33); /* store the result in 2.30 format in the destination buffer. */ arm_sqrt_q31(acc0 + acc1, pDst++); /* Decrement the loop counter */ blkCnt--; } /* If the numSamples is not a multiple of 4, compute any remaining output samples here. ** No loop unrolling is used. */ blkCnt = numSamples % 0x4u; while(blkCnt > 0u) { /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */ real = *pSrc++; imag = *pSrc++; acc0 = (q31_t) (((q63_t) real * real) >> 33); acc1 = (q31_t) (((q63_t) imag * imag) >> 33); /* store the result in 2.30 format in the destination buffer. */ arm_sqrt_q31(acc0 + acc1, pDst++); /* Decrement the loop counter */ blkCnt--; } #else /* Run the below code for Cortex-M0 */ while(numSamples > 0u) { /* out = sqrt((real * real) + (imag * imag)) */ real = *pSrc++; imag = *pSrc++; acc0 = (q31_t) (((q63_t) real * real) >> 33); acc1 = (q31_t) (((q63_t) imag * imag) >> 33); /* store the result in 2.30 format in the destination buffer. */ arm_sqrt_q31(acc0 + acc1, pDst++); /* Decrement the loop counter */ numSamples--; } #endif /* #ifndef ARM_MATH_CM0 */ } /** * @} end of cmplx_mag group */

1137519-player

lib/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_q31.c

C

lgpl

4,428

/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_cmplx_mult_real_q31.c * * Description: Q31 complex by real multiplication * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * -------------------------------------------------------------------- */ #include "arm_math.h" /** * @ingroup groupCmplxMath */ /** * @addtogroup CmplxByRealMult * @{ */ /** * @brief Q31 complex-by-real multiplication * @param[in] *pSrcCmplx points to the complex input vector * @param[in] *pSrcReal points to the real input vector * @param[out] *pCmplxDst points to the complex output vector * @param[in] numSamples number of samples in each vector * @return none. * * Scaling and Overflow Behavior: * \par * The function uses saturating arithmetic. * Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated. */ void arm_cmplx_mult_real_q31( q31_t * pSrcCmplx, q31_t * pSrcReal, q31_t * pCmplxDst, uint32_t numSamples) { q31_t in; /* Temporary variable to store input value */ #ifndef ARM_MATH_CM0 /* Run the below code for Cortex-M4 and Cortex-M3 */ uint32_t blkCnt; /* loop counters */ /* loop Unrolling */ blkCnt = numSamples >> 2u; /* First part of the processing with loop unrolling. Compute 4 outputs at a time. ** a second loop below computes the remaining 1 to 3 samples. */ while(blkCnt > 0u) { /* C[2 * i] = A[2 * i] * B[i]. */ /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */ in = *pSrcReal++; /* store the result in the destination buffer. */ *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31); *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31); in = *pSrcReal++; *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31); *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31); in = *pSrcReal++; *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31); *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31); in = *pSrcReal++; *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31); *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31); /* Decrement the numSamples loop counter */ blkCnt--; } /* If the numSamples is not a multiple of 4, compute any remaining output samples here. ** No loop unrolling is used. */ blkCnt = numSamples % 0x4u; while(blkCnt > 0u) { /* C[2 * i] = A[2 * i] * B[i]. */ /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */ in = *pSrcReal++; /* store the result in the destination buffer. */ *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31); *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31); /* Decrement the numSamples loop counter */ blkCnt--; } #else /* Run the below code for Cortex-M0 */ while(numSamples > 0u) { /* realOut = realA * realB. */ /* imagReal = imagA * realB. */ in = *pSrcReal++; /* store the result in the destination buffer. */ *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31); *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31); /* Decrement the numSamples loop counter */ numSamples--; } #endif /* #ifndef ARM_MATH_CM0 */ } /** * @} end of CmplxByRealMult group */

1137519-player

lib/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c

C

lgpl

4,516

/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_cmplx_mult_cmplx_f32.c * * Description: Floating-point complex-by-complex multiplication * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * -------------------------------------------------------------------- */ #include "arm_math.h" /** * @ingroup groupCmplxMath */ /** * @defgroup CmplxByCmplxMult Complex-by-Complex Multiplication * * Multiplies a complex vector by another complex vector and generates a complex result. * The data in the complex arrays is stored in an interleaved fashion * (real, imag, real, imag, ...). * The parameter <code>numSamples</code> represents the number of complex * samples processed. The complex arrays have a total of <code>2*numSamples</code> * real values. * * The underlying algorithm is used: * * <pre> * for(n=0; n<numSamples; n++) { * pDst[(2*n)+0] = pSrcA[(2*n)+0] * pSrcB[(2*n)+0] - pSrcA[(2*n)+1] * pSrcB[(2*n)+1]; * pDst[(2*n)+1] = pSrcA[(2*n)+0] * pSrcB[(2*n)+1] + pSrcA[(2*n)+1] * pSrcB[(2*n)+0]; * } * </pre> * * There are separate functions for floating-point, Q15, and Q31 data types. */ /** * @addtogroup CmplxByCmplxMult * @{ */ /** * @brief Floating-point complex-by-complex multiplication * @param[in] *pSrcA points to the first input vector * @param[in] *pSrcB points to the second input vector * @param[out] *pDst points to the output vector * @param[in] numSamples number of complex samples in each vector * @return none. */ void arm_cmplx_mult_cmplx_f32( float32_t * pSrcA, float32_t * pSrcB, float32_t * pDst, uint32_t numSamples) { float32_t a, b, c, d; /* Temporary variables to store real and imaginary values */ #ifndef ARM_MATH_CM0 /* Run the below code for Cortex-M4 and Cortex-M3 */ uint32_t blkCnt; /* loop counters */ /* loop Unrolling */ blkCnt = numSamples >> 2u; /* First part of the processing with loop unrolling. Compute 4 outputs at a time. ** a second loop below computes the remaining 1 to 3 samples. */ while(blkCnt > 0u) { /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */ /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. */ a = *pSrcA++; b = *pSrcA++; c = *pSrcB++; d = *pSrcB++; /* store the result in the destination buffer. */ *pDst++ = (a * c) - (b * d); *pDst++ = (a * d) + (b * c); a = *pSrcA++; b = *pSrcA++; c = *pSrcB++; d = *pSrcB++; *pDst++ = (a * c) - (b * d); *pDst++ = (a * d) + (b * c); a = *pSrcA++; b = *pSrcA++; c = *pSrcB++; d = *pSrcB++; *pDst++ = (a * c) - (b * d); *pDst++ = (a * d) + (b * c); a = *pSrcA++; b = *pSrcA++; c = *pSrcB++; d = *pSrcB++; *pDst++ = (a * c) - (b * d); *pDst++ = (a * d) + (b * c); /* Decrement the numSamples loop counter */ blkCnt--; } /* If the numSamples is not a multiple of 4, compute any remaining output samples here. ** No loop unrolling is used. */ blkCnt = numSamples % 0x4u; while(blkCnt > 0u) { /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */ /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. */ a = *pSrcA++; b = *pSrcA++; c = *pSrcB++; d = *pSrcB++; /* store the result in the destination buffer. */ *pDst++ = (a * c) - (b * d); *pDst++ = (a * d) + (b * c); /* Decrement the numSamples loop counter */ blkCnt--; } #else /* Run the below code for Cortex-M0 */ while(numSamples > 0u) { /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */ /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. */ a = *pSrcA++; b = *pSrcA++; c = *pSrcB++; d = *pSrcB++; /* store the result in the destination buffer. */ *pDst++ = (a * c) - (b * d); *pDst++ = (a * d) + (b * c); /* Decrement the numSamples loop counter */ numSamples--; } #endif /* #ifndef ARM_MATH_CM0 */ } /** * @} end of CmplxByCmplxMult group */

1137519-player

lib/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c

C

lgpl

5,065

/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_pid_init_q31.c * * Description: Q31 PID Control initialization function * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * ------------------------------------------------------------------- */ #include "arm_math.h" /** * @addtogroup PID * @{ */ /** * @brief Initialization function for the Q31 PID Control. * @param[in,out] *S points to an instance of the Q31 PID structure. * @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the state. * @return none. * \par Description: * \par * The <code>resetStateFlag</code> specifies whether to set state to zero or not. \n * The function computes the structure fields: <code>A0</code>, <code>A1</code> <code>A2</code> * using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd) * also sets the state variables to all zeros. */ void arm_pid_init_q31( arm_pid_instance_q31 * S, int32_t resetStateFlag) { #ifndef ARM_MATH_CM0 /* Run the below code for Cortex-M4 and Cortex-M3 */ /* Derived coefficient A0 */ S->A0 = __QADD(__QADD(S->Kp, S->Ki), S->Kd); /* Derived coefficient A1 */ S->A1 = -__QADD(__QADD(S->Kd, S->Kd), S->Kp); #else /* Run the below code for Cortex-M0 */ q31_t temp; /* Derived coefficient A0 */ temp = clip_q63_to_q31((q63_t) S->Kp + S->Ki); S->A0 = clip_q63_to_q31((q63_t) temp + S->Kd); /* Derived coefficient A1 */ temp = clip_q63_to_q31((q63_t) S->Kd + S->Kd); S->A1 = -clip_q63_to_q31((q63_t) temp + S->Kp); #endif /* #ifndef ARM_MATH_CM0 */ /* Derived coefficient A2 */ S->A2 = S->Kd; /* Check whether state needs reset or not */ if(resetStateFlag) { /* Clear the state buffer. The size will be always 3 samples */ memset(S->state, 0, 3u * sizeof(q31_t)); } } /** * @} end of PID group */

1137519-player

lib/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q31.c

C

lgpl

2,683

/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_pid_reset_f32.c * * Description: Floating-point PID Control reset function * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * ------------------------------------------------------------------- */ #include "arm_math.h" /** * @addtogroup PID * @{ */ /** * @brief Reset function for the floating-point PID Control. * @param[in] *S Instance pointer of PID control data structure. * @return none. * \par Description: * The function resets the state buffer to zeros. */ void arm_pid_reset_f32( arm_pid_instance_f32 * S) { /* Clear the state buffer. The size will be always 3 samples */ memset(S->state, 0, 3u * sizeof(float32_t)); } /** * @} end of PID group */

1137519-player

lib/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_f32.c

C

lgpl

1,492

/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_pid_reset_q31.c * * Description: Q31 PID Control reset function * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * ------------------------------------------------------------------- */ #include "arm_math.h" /** * @addtogroup PID * @{ */ /** * @brief Reset function for the Q31 PID Control. * @param[in] *S Instance pointer of PID control data structure. * @return none. * \par Description: * The function resets the state buffer to zeros. */ void arm_pid_reset_q31( arm_pid_instance_q31 * S) { /* Clear the state buffer. The size will be always 3 samples */ memset(S->state, 0, 3u * sizeof(q31_t)); } /** * @} end of PID group */

1137519-player

lib/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q31.c

C

lgpl

1,466

/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_sin_cos_f32.c * * Description: Sine and Cosine calculation for floating-point values. * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * -------------------------------------------------------------------- */ #include "arm_math.h" /** * @ingroup groupController */ /** * @defgroup SinCos Sine Cosine * * Computes the trigonometric sine and cosine values using a combination of table lookup * and linear interpolation. * There are separate functions for Q31 and floating-point data types. * The input to the floating-point version is in degrees while the * fixed-point Q31 have a scaled input with the range * [-1 1) mapping to [-180 180) degrees. * * The implementation is based on table lookup using 360 values together with linear interpolation. * The steps used are: * -# Calculation of the nearest integer table index. * -# Compute the fractional portion (fract) of the input. * -# Fetch the value corresponding to \c index from sine table to \c y0 and also value from \c index+1 to \c y1. * -# Sine value is computed as <code> *psinVal = y0 + (fract * (y1 - y0))</code>. * -# Fetch the value corresponding to \c index from cosine table to \c y0 and also value from \c index+1 to \c y1. * -# Cosine value is computed as <code> *pcosVal = y0 + (fract * (y1 - y0))</code>. */ /** * @addtogroup SinCos * @{ */ /** * \par * Cosine Table is generated from following loop * <pre>for(i = 0; i < 360; i++) * { * cosTable[i]= cos((i-180) * PI/180.0); * } </pre> */ static const float32_t cosTable[360] = { -0.999847695156391270f, -0.999390827019095760f, -0.998629534754573830f, -0.997564050259824200f, -0.996194698091745550f, -0.994521895368273290f, -0.992546151641321980f, -0.990268068741570250f, -0.987688340595137660f, -0.984807753012208020f, -0.981627183447663980f, -0.978147600733805690f, -0.974370064785235250f, -0.970295726275996470f, -0.965925826289068200f, -0.961261695938318670f, -0.956304755963035440f, -0.951056516295153530f, -0.945518575599316740f, -0.939692620785908320f, -0.933580426497201740f, -0.927183854566787310f, -0.920504853452440150f, -0.913545457642600760f, -0.906307787036649940f, -0.898794046299167040f, -0.891006524188367790f, -0.882947592858926770f, -0.874619707139395740f, -0.866025403784438710f, -0.857167300702112220f, -0.848048096156425960f, -0.838670567945424160f, -0.829037572555041620f, -0.819152044288991580f, -0.809016994374947340f, -0.798635510047292940f, -0.788010753606721900f, -0.777145961456970680f, -0.766044443118977900f, -0.754709580222772010f, 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-0.927183854566787310f, -0.933580426497201740f, -0.939692620785908320f, -0.945518575599316740f, -0.951056516295153530f, -0.956304755963035440f, -0.961261695938318670f, -0.965925826289068200f, -0.970295726275996470f, -0.974370064785235250f, -0.978147600733805690f, -0.981627183447663980f, -0.984807753012208020f, -0.987688340595137660f, -0.990268068741570250f, -0.992546151641321980f, -0.994521895368273290f, -0.996194698091745550f, -0.997564050259824200f, -0.998629534754573830f, -0.999390827019095760f, -0.999847695156391270f, -1.000000000000000000f }; /** * \par * Sine Table is generated from following loop * <pre>for(i = 0; i < 360; i++) * { * sinTable[i]= sin((i-180) * PI/180.0); * } </pre> */ static const float32_t sinTable[360] = { -0.017452406437283439f, -0.034899496702500699f, -0.052335956242943807f, -0.069756473744125524f, -0.087155742747658638f, -0.104528463267653730f, -0.121869343405147550f, -0.139173100960065740f, -0.156434465040230980f, -0.173648177666930280f, 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0.987688340595137770f, 0.990268068741570250f, 0.992546151641321980f, 0.994521895368273290f, 0.996194698091745550f, 0.997564050259824200f, 0.998629534754573830f, 0.999390827019095760f, 0.999847695156391270f, 1.000000000000000000f, 0.999847695156391270f, 0.999390827019095760f, 0.998629534754573830f, 0.997564050259824200f, 0.996194698091745550f, 0.994521895368273400f, 0.992546151641322090f, 0.990268068741570360f, 0.987688340595137660f, 0.984807753012208020f, 0.981627183447663980f, 0.978147600733805690f, 0.974370064785235250f, 0.970295726275996470f, 0.965925826289068310f, 0.961261695938318890f, 0.956304755963035550f, 0.951056516295153640f, 0.945518575599316850f, 0.939692620785908430f, 0.933580426497201740f, 0.927183854566787420f, 0.920504853452440370f, 0.913545457642600980f, 0.906307787036650050f, 0.898794046299166930f, 0.891006524188367900f, 0.882947592858927100f, 0.874619707139395850f, 0.866025403784438710f, 0.857167300702112330f, 0.848048096156426070f, 0.838670567945424050f, 0.829037572555041740f, 0.819152044288992020f, 0.809016994374947450f, 0.798635510047292720f, 0.788010753606722010f, 0.777145961456971010f, 0.766044443118978010f, 0.754709580222771790f, 0.743144825477394240f, 0.731353701619170570f, 0.719339800338651410f, 0.707106781186547570f, 0.694658370458997140f, 0.681998360062498590f, 0.669130606358858350f, 0.656059028990507280f, 0.642787609686539470f, 0.629320391049837720f, 0.615661475325658400f, 0.601815023152048160f, 0.587785252292473250f, 0.573576436351046380f, 0.559192903470746900f, 0.544639035015026860f, 0.529919264233204900f, 0.515038074910054380f, 0.499999999999999940f, 0.484809620246337170f, 0.469471562785891080f, 0.453990499739546860f, 0.438371146789077290f, 0.422618261740699500f, 0.406736643075800430f, 0.390731128489274160f, 0.374606593415912240f, 0.358367949545300210f, 0.342020143325668880f, 0.325568154457156980f, 0.309016994374947510f, 0.292371704722737050f, 0.275637355816999660f, 0.258819045102521020f, 0.241921895599667730f, 0.224951054343864780f, 0.207911690817759310f, 0.190808995376544970f, 0.173648177666930280f, 0.156434465040230980f, 0.139173100960065740f, 0.121869343405147550f, 0.104528463267653730f, 0.087155742747658638f, 0.069756473744125524f, 0.052335956242943807f, 0.034899496702500699f, 0.017452406437283439f, 0.000000000000000122f }; /** * @brief Floating-point sin_cos function. * @param[in] theta input value in degrees * @param[out] *pSinVal points to the processed sine output. * @param[out] *pCosVal points to the processed cos output. * @return none. */ void arm_sin_cos_f32( float32_t theta, float32_t * pSinVal, float32_t * pCosVal) { uint32_t i; /* Index for reading nearwst output values */ float32_t x1 = -179.0f; /* Initial input value */ float32_t y0, y1; /* nearest output values */ float32_t fract; /* fractional part of input */ /* Calculation of fractional part */ if(theta > 0.0f) { fract = theta - (float32_t) ((int32_t) theta); } else { fract = (theta - (float32_t) ((int32_t) theta)) + 1.0f; } /* index calculation for reading nearest output values */ i = (uint32_t) (theta - x1); /* reading nearest sine output values */ y0 = sinTable[i]; y1 = sinTable[i + 1u]; /* Calculation of sine value */ *pSinVal = y0 + (fract * (y1 - y0)); /* reading nearest cosine output values */ y0 = cosTable[i]; y1 = cosTable[i + 1u]; /* Calculation of cosine value */ *pCosVal = y0 + (fract * (y1 - y0)); } /** * @} end of SinCos group */

1137519-player

lib/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_sin_cos_f32.c

C

lgpl

21,770

/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_pid_init_q15.c * * Description: Q15 PID Control initialization function * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * -------------------------------------------------------------------- */ #include "arm_math.h" /** * @addtogroup PID * @{ */ /** * @details * @param[in,out] *S points to an instance of the Q15 PID structure. * @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the state. * @return none. * \par Description: * \par * The <code>resetStateFlag</code> specifies whether to set state to zero or not. \n * The function computes the structure fields: <code>A0</code>, <code>A1</code> <code>A2</code> * using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd) * also sets the state variables to all zeros. */ void arm_pid_init_q15( arm_pid_instance_q15 * S, int32_t resetStateFlag) { #ifndef ARM_MATH_CM0 /* Run the below code for Cortex-M4 and Cortex-M3 */ /* Derived coefficient A0 */ S->A0 = __QADD16(__QADD16(S->Kp, S->Ki), S->Kd); /* Derived coefficients and pack into A1 */ #ifndef ARM_MATH_BIG_ENDIAN S->A1 = __PKHBT(-__QADD16(__QADD16(S->Kd, S->Kd), S->Kp), S->Kd, 16); #else S->A1 = __PKHBT(S->Kd, -__QADD16(__QADD16(S->Kd, S->Kd), S->Kp), 16); #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ /* Check whether state needs reset or not */ if(resetStateFlag) { /* Clear the state buffer. The size will be always 3 samples */ memset(S->state, 0, 3u * sizeof(q15_t)); } #else /* Run the below code for Cortex-M0 */ q31_t temp; /*to store the sum */ /* Derived coefficient A0 */ temp = S->Kp + S->Ki + S->Kd; S->A0 = (q15_t) __SSAT(temp, 16); /* Derived coefficients and pack into A1 */ temp = -(S->Kd + S->Kd + S->Kp); S->A1 = (q15_t) __SSAT(temp, 16); S->A2 = S->Kd; /* Check whether state needs reset or not */ if(resetStateFlag) { /* Clear the state buffer. The size will be always 3 samples */ memset(S->state, 0, 3u * sizeof(q15_t)); } #endif /* #ifndef ARM_MATH_CM0 */ } /** * @} end of PID group */

1137519-player

lib/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q15.c

C

lgpl

3,032

/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_sin_cos_q31.c * * Description: Cosine & Sine calculation for Q31 values. * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * -------------------------------------------------------------------- */ #include "arm_math.h" /** * @ingroup groupController */ /** * @addtogroup SinCos * @{ */ /** * \par * Sine Table is generated from following loop * <pre>for(i = 0; i < 360; i++) * { * sinTable[i]= sin((i-180) * PI/180.0); * } </pre> * Convert above coefficients to fixed point 1.31 format. */ static const int32_t sinTableQ31[360] = { 0x0, 0xfdc41e9b, 0xfb8869ce, 0xf94d0e2e, 0xf7123849, 0xf4d814a4, 0xf29ecfb2, 0xf06695da, 0xee2f9369, 0xebf9f498, 0xe9c5e582, 0xe7939223, 0xe5632654, 0xe334cdc9, 0xe108b40d, 0xdedf047d, 0xdcb7ea46, 0xda939061, 0xd8722192, 0xd653c860, 0xd438af17, 0xd220ffc0, 0xd00ce422, 0xcdfc85bb, 0xcbf00dbe, 0xc9e7a512, 0xc7e3744b, 0xc5e3a3a9, 0xc3e85b18, 0xc1f1c224, 0xc0000000, 0xbe133b7c, 0xbc2b9b05, 0xba4944a2, 0xb86c5df0, 0xb6950c1e, 0xb4c373ee, 0xb2f7b9af, 0xb1320139, 0xaf726def, 0xadb922b7, 0xac0641fb, 0xaa59eda4, 0xa8b4471a, 0xa7156f3c, 0xa57d8666, 0xa3ecac65, 0xa263007d, 0xa0e0a15f, 0x9f65ad2d, 0x9df24175, 0x9c867b2c, 0x9b2276b0, 0x99c64fc5, 0x98722192, 0x9726069c, 0x95e218c9, 0x94a6715d, 0x937328f5, 0x92485786, 0x9126145f, 0x900c7621, 0x8efb92c2, 0x8df37f8b, 0x8cf45113, 0x8bfe1b3f, 0x8b10f144, 0x8a2ce59f, 0x89520a1a, 0x88806fc4, 0x87b826f7, 0x86f93f50, 0x8643c7b3, 0x8597ce46, 0x84f56073, 0x845c8ae3, 0x83cd5982, 0x8347d77b, 0x82cc0f36, 0x825a0a5b, 0x81f1d1ce, 0x81936daf, 0x813ee55b, 0x80f43f69, 0x80b381ac, 0x807cb130, 0x804fd23a, 0x802ce84c, 0x8013f61d, 0x8004fda0, 0x80000000, 0x8004fda0, 0x8013f61d, 0x802ce84c, 0x804fd23a, 0x807cb130, 0x80b381ac, 0x80f43f69, 0x813ee55b, 0x81936daf, 0x81f1d1ce, 0x825a0a5b, 0x82cc0f36, 0x8347d77b, 0x83cd5982, 0x845c8ae3, 0x84f56073, 0x8597ce46, 0x8643c7b3, 0x86f93f50, 0x87b826f7, 0x88806fc4, 0x89520a1a, 0x8a2ce59f, 0x8b10f144, 0x8bfe1b3f, 0x8cf45113, 0x8df37f8b, 0x8efb92c2, 0x900c7621, 0x9126145f, 0x92485786, 0x937328f5, 0x94a6715d, 0x95e218c9, 0x9726069c, 0x98722192, 0x99c64fc5, 0x9b2276b0, 0x9c867b2c, 0x9df24175, 0x9f65ad2d, 0xa0e0a15f, 0xa263007d, 0xa3ecac65, 0xa57d8666, 0xa7156f3c, 0xa8b4471a, 0xaa59eda4, 0xac0641fb, 0xadb922b7, 0xaf726def, 0xb1320139, 0xb2f7b9af, 0xb4c373ee, 0xb6950c1e, 0xb86c5df0, 0xba4944a2, 0xbc2b9b05, 0xbe133b7c, 0xc0000000, 0xc1f1c224, 0xc3e85b18, 0xc5e3a3a9, 0xc7e3744b, 0xc9e7a512, 0xcbf00dbe, 0xcdfc85bb, 0xd00ce422, 0xd220ffc0, 0xd438af17, 0xd653c860, 0xd8722192, 0xda939061, 0xdcb7ea46, 0xdedf047d, 0xe108b40d, 0xe334cdc9, 0xe5632654, 0xe7939223, 0xe9c5e582, 0xebf9f498, 0xee2f9369, 0xf06695da, 0xf29ecfb2, 0xf4d814a4, 0xf7123849, 0xf94d0e2e, 0xfb8869ce, 0xfdc41e9b, 0x0, 0x23be165, 0x4779632, 0x6b2f1d2, 0x8edc7b7, 0xb27eb5c, 0xd61304e, 0xf996a26, 0x11d06c97, 0x14060b68, 0x163a1a7e, 0x186c6ddd, 0x1a9cd9ac, 0x1ccb3237, 0x1ef74bf3, 0x2120fb83, 0x234815ba, 0x256c6f9f, 0x278dde6e, 0x29ac37a0, 0x2bc750e9, 0x2ddf0040, 0x2ff31bde, 0x32037a45, 0x340ff242, 0x36185aee, 0x381c8bb5, 0x3a1c5c57, 0x3c17a4e8, 0x3e0e3ddc, 0x40000000, 0x41ecc484, 0x43d464fb, 0x45b6bb5e, 0x4793a210, 0x496af3e2, 0x4b3c8c12, 0x4d084651, 0x4ecdfec7, 0x508d9211, 0x5246dd49, 0x53f9be05, 0x55a6125c, 0x574bb8e6, 0x58ea90c4, 0x5a82799a, 0x5c13539b, 0x5d9cff83, 0x5f1f5ea1, 0x609a52d3, 0x620dbe8b, 0x637984d4, 0x64dd8950, 0x6639b03b, 0x678dde6e, 0x68d9f964, 0x6a1de737, 0x6b598ea3, 0x6c8cd70b, 0x6db7a87a, 0x6ed9eba1, 0x6ff389df, 0x71046d3e, 0x720c8075, 0x730baeed, 0x7401e4c1, 0x74ef0ebc, 0x75d31a61, 0x76adf5e6, 0x777f903c, 0x7847d909, 0x7906c0b0, 0x79bc384d, 0x7a6831ba, 0x7b0a9f8d, 0x7ba3751d, 0x7c32a67e, 0x7cb82885, 0x7d33f0ca, 0x7da5f5a5, 0x7e0e2e32, 0x7e6c9251, 0x7ec11aa5, 0x7f0bc097, 0x7f4c7e54, 0x7f834ed0, 0x7fb02dc6, 0x7fd317b4, 0x7fec09e3, 0x7ffb0260, 0x7fffffff, 0x7ffb0260, 0x7fec09e3, 0x7fd317b4, 0x7fb02dc6, 0x7f834ed0, 0x7f4c7e54, 0x7f0bc097, 0x7ec11aa5, 0x7e6c9251, 0x7e0e2e32, 0x7da5f5a5, 0x7d33f0ca, 0x7cb82885, 0x7c32a67e, 0x7ba3751d, 0x7b0a9f8d, 0x7a6831ba, 0x79bc384d, 0x7906c0b0, 0x7847d909, 0x777f903c, 0x76adf5e6, 0x75d31a61, 0x74ef0ebc, 0x7401e4c1, 0x730baeed, 0x720c8075, 0x71046d3e, 0x6ff389df, 0x6ed9eba1, 0x6db7a87a, 0x6c8cd70b, 0x6b598ea3, 0x6a1de737, 0x68d9f964, 0x678dde6e, 0x6639b03b, 0x64dd8950, 0x637984d4, 0x620dbe8b, 0x609a52d3, 0x5f1f5ea1, 0x5d9cff83, 0x5c13539b, 0x5a82799a, 0x58ea90c4, 0x574bb8e6, 0x55a6125c, 0x53f9be05, 0x5246dd49, 0x508d9211, 0x4ecdfec7, 0x4d084651, 0x4b3c8c12, 0x496af3e2, 0x4793a210, 0x45b6bb5e, 0x43d464fb, 0x41ecc484, 0x40000000, 0x3e0e3ddc, 0x3c17a4e8, 0x3a1c5c57, 0x381c8bb5, 0x36185aee, 0x340ff242, 0x32037a45, 0x2ff31bde, 0x2ddf0040, 0x2bc750e9, 0x29ac37a0, 0x278dde6e, 0x256c6f9f, 0x234815ba, 0x2120fb83, 0x1ef74bf3, 0x1ccb3237, 0x1a9cd9ac, 0x186c6ddd, 0x163a1a7e, 0x14060b68, 0x11d06c97, 0xf996a26, 0xd61304e, 0xb27eb5c, 0x8edc7b7, 0x6b2f1d2, 0x4779632, 0x23be165, }; /** * \par * Cosine Table is generated from following loop * <pre>for(i = 0; i < 360; i++) * { * cosTable[i]= cos((i-180) * PI/180.0); * } </pre> * \par * Convert above coefficients to fixed point 1.31 format. */ static const int32_t cosTableQ31[360] = { 0x80000000, 0x8004fda0, 0x8013f61d, 0x802ce84c, 0x804fd23a, 0x807cb130, 0x80b381ac, 0x80f43f69, 0x813ee55b, 0x81936daf, 0x81f1d1ce, 0x825a0a5b, 0x82cc0f36, 0x8347d77b, 0x83cd5982, 0x845c8ae3, 0x84f56073, 0x8597ce46, 0x8643c7b3, 0x86f93f50, 0x87b826f7, 0x88806fc4, 0x89520a1a, 0x8a2ce59f, 0x8b10f144, 0x8bfe1b3f, 0x8cf45113, 0x8df37f8b, 0x8efb92c2, 0x900c7621, 0x9126145f, 0x92485786, 0x937328f5, 0x94a6715d, 0x95e218c9, 0x9726069c, 0x98722192, 0x99c64fc5, 0x9b2276b0, 0x9c867b2c, 0x9df24175, 0x9f65ad2d, 0xa0e0a15f, 0xa263007d, 0xa3ecac65, 0xa57d8666, 0xa7156f3c, 0xa8b4471a, 0xaa59eda4, 0xac0641fb, 0xadb922b7, 0xaf726def, 0xb1320139, 0xb2f7b9af, 0xb4c373ee, 0xb6950c1e, 0xb86c5df0, 0xba4944a2, 0xbc2b9b05, 0xbe133b7c, 0xc0000000, 0xc1f1c224, 0xc3e85b18, 0xc5e3a3a9, 0xc7e3744b, 0xc9e7a512, 0xcbf00dbe, 0xcdfc85bb, 0xd00ce422, 0xd220ffc0, 0xd438af17, 0xd653c860, 0xd8722192, 0xda939061, 0xdcb7ea46, 0xdedf047d, 0xe108b40d, 0xe334cdc9, 0xe5632654, 0xe7939223, 0xe9c5e582, 0xebf9f498, 0xee2f9369, 0xf06695da, 0xf29ecfb2, 0xf4d814a4, 0xf7123849, 0xf94d0e2e, 0xfb8869ce, 0xfdc41e9b, 0x0, 0x23be165, 0x4779632, 0x6b2f1d2, 0x8edc7b7, 0xb27eb5c, 0xd61304e, 0xf996a26, 0x11d06c97, 0x14060b68, 0x163a1a7e, 0x186c6ddd, 0x1a9cd9ac, 0x1ccb3237, 0x1ef74bf3, 0x2120fb83, 0x234815ba, 0x256c6f9f, 0x278dde6e, 0x29ac37a0, 0x2bc750e9, 0x2ddf0040, 0x2ff31bde, 0x32037a45, 0x340ff242, 0x36185aee, 0x381c8bb5, 0x3a1c5c57, 0x3c17a4e8, 0x3e0e3ddc, 0x40000000, 0x41ecc484, 0x43d464fb, 0x45b6bb5e, 0x4793a210, 0x496af3e2, 0x4b3c8c12, 0x4d084651, 0x4ecdfec7, 0x508d9211, 0x5246dd49, 0x53f9be05, 0x55a6125c, 0x574bb8e6, 0x58ea90c4, 0x5a82799a, 0x5c13539b, 0x5d9cff83, 0x5f1f5ea1, 0x609a52d3, 0x620dbe8b, 0x637984d4, 0x64dd8950, 0x6639b03b, 0x678dde6e, 0x68d9f964, 0x6a1de737, 0x6b598ea3, 0x6c8cd70b, 0x6db7a87a, 0x6ed9eba1, 0x6ff389df, 0x71046d3e, 0x720c8075, 0x730baeed, 0x7401e4c1, 0x74ef0ebc, 0x75d31a61, 0x76adf5e6, 0x777f903c, 0x7847d909, 0x7906c0b0, 0x79bc384d, 0x7a6831ba, 0x7b0a9f8d, 0x7ba3751d, 0x7c32a67e, 0x7cb82885, 0x7d33f0ca, 0x7da5f5a5, 0x7e0e2e32, 0x7e6c9251, 0x7ec11aa5, 0x7f0bc097, 0x7f4c7e54, 0x7f834ed0, 0x7fb02dc6, 0x7fd317b4, 0x7fec09e3, 0x7ffb0260, 0x7fffffff, 0x7ffb0260, 0x7fec09e3, 0x7fd317b4, 0x7fb02dc6, 0x7f834ed0, 0x7f4c7e54, 0x7f0bc097, 0x7ec11aa5, 0x7e6c9251, 0x7e0e2e32, 0x7da5f5a5, 0x7d33f0ca, 0x7cb82885, 0x7c32a67e, 0x7ba3751d, 0x7b0a9f8d, 0x7a6831ba, 0x79bc384d, 0x7906c0b0, 0x7847d909, 0x777f903c, 0x76adf5e6, 0x75d31a61, 0x74ef0ebc, 0x7401e4c1, 0x730baeed, 0x720c8075, 0x71046d3e, 0x6ff389df, 0x6ed9eba1, 0x6db7a87a, 0x6c8cd70b, 0x6b598ea3, 0x6a1de737, 0x68d9f964, 0x678dde6e, 0x6639b03b, 0x64dd8950, 0x637984d4, 0x620dbe8b, 0x609a52d3, 0x5f1f5ea1, 0x5d9cff83, 0x5c13539b, 0x5a82799a, 0x58ea90c4, 0x574bb8e6, 0x55a6125c, 0x53f9be05, 0x5246dd49, 0x508d9211, 0x4ecdfec7, 0x4d084651, 0x4b3c8c12, 0x496af3e2, 0x4793a210, 0x45b6bb5e, 0x43d464fb, 0x41ecc484, 0x40000000, 0x3e0e3ddc, 0x3c17a4e8, 0x3a1c5c57, 0x381c8bb5, 0x36185aee, 0x340ff242, 0x32037a45, 0x2ff31bde, 0x2ddf0040, 0x2bc750e9, 0x29ac37a0, 0x278dde6e, 0x256c6f9f, 0x234815ba, 0x2120fb83, 0x1ef74bf3, 0x1ccb3237, 0x1a9cd9ac, 0x186c6ddd, 0x163a1a7e, 0x14060b68, 0x11d06c97, 0xf996a26, 0xd61304e, 0xb27eb5c, 0x8edc7b7, 0x6b2f1d2, 0x4779632, 0x23be165, 0x0, 0xfdc41e9b, 0xfb8869ce, 0xf94d0e2e, 0xf7123849, 0xf4d814a4, 0xf29ecfb2, 0xf06695da, 0xee2f9369, 0xebf9f498, 0xe9c5e582, 0xe7939223, 0xe5632654, 0xe334cdc9, 0xe108b40d, 0xdedf047d, 0xdcb7ea46, 0xda939061, 0xd8722192, 0xd653c860, 0xd438af17, 0xd220ffc0, 0xd00ce422, 0xcdfc85bb, 0xcbf00dbe, 0xc9e7a512, 0xc7e3744b, 0xc5e3a3a9, 0xc3e85b18, 0xc1f1c224, 0xc0000000, 0xbe133b7c, 0xbc2b9b05, 0xba4944a2, 0xb86c5df0, 0xb6950c1e, 0xb4c373ee, 0xb2f7b9af, 0xb1320139, 0xaf726def, 0xadb922b7, 0xac0641fb, 0xaa59eda4, 0xa8b4471a, 0xa7156f3c, 0xa57d8666, 0xa3ecac65, 0xa263007d, 0xa0e0a15f, 0x9f65ad2d, 0x9df24175, 0x9c867b2c, 0x9b2276b0, 0x99c64fc5, 0x98722192, 0x9726069c, 0x95e218c9, 0x94a6715d, 0x937328f5, 0x92485786, 0x9126145f, 0x900c7621, 0x8efb92c2, 0x8df37f8b, 0x8cf45113, 0x8bfe1b3f, 0x8b10f144, 0x8a2ce59f, 0x89520a1a, 0x88806fc4, 0x87b826f7, 0x86f93f50, 0x8643c7b3, 0x8597ce46, 0x84f56073, 0x845c8ae3, 0x83cd5982, 0x8347d77b, 0x82cc0f36, 0x825a0a5b, 0x81f1d1ce, 0x81936daf, 0x813ee55b, 0x80f43f69, 0x80b381ac, 0x807cb130, 0x804fd23a, 0x802ce84c, 0x8013f61d, 0x8004fda0, }; /** * @brief Q31 sin_cos function. * @param[in] theta scaled input value in degrees * @param[out] *pSinVal points to the processed sine output. * @param[out] *pCosVal points to the processed cosine output. * @return none. * * The Q31 input value is in the range [-1 +1) and is mapped to a degree value in the range [-180 180). * */ void arm_sin_cos_q31( q31_t theta, q31_t * pSinVal, q31_t * pCosVal) { q31_t x0; /* Nearest input value */ q31_t y0, y1; /* Nearest output values */ q31_t xSpacing = INPUT_SPACING; /* Spaing between inputs */ uint32_t i; /* Index */ q31_t oneByXSpacing; /* 1/ xSpacing value */ q31_t out; /* temporary variable */ uint32_t sign_bits; /* No.of sign bits */ uint32_t firstX = 0x80000000; /* First X value */ /* Calculation of index */ i = ((uint32_t) theta - firstX) / (uint32_t) xSpacing; /* Calculation of first nearest input value */ x0 = (q31_t) firstX + ((q31_t) i * xSpacing); /* Reading nearest sine output values from table */ y0 = sinTableQ31[i]; y1 = sinTableQ31[i + 1u]; /* Calculation of 1/(x1-x0) */ /* (x1-x0) is xSpacing which is fixed value */ sign_bits = 8u; oneByXSpacing = 0x5A000000; /* Calculation of (theta - x0)/(x1-x0) */ out = (((q31_t) (((q63_t) (theta - x0) * oneByXSpacing) >> 32)) << sign_bits); /* Calculation of y0 + (y1 - y0) * ((theta - x0)/(x1-x0)) */ *pSinVal = y0 + ((q31_t) (((q63_t) (y1 - y0) * out) >> 30)); /* Reading nearest cosine output values from table */ y0 = cosTableQ31[i]; y1 = cosTableQ31[i + 1u]; /* Calculation of y0 + (y1 - y0) * ((theta - x0)/(x1-x0)) */ *pCosVal = y0 + ((q31_t) (((q63_t) (y1 - y0) * out) >> 30)); } /** * @} end of SinCos group */

1137519-player

lib/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_sin_cos_q31.c

C

lgpl

12,848

/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_pid_init_f32.c * * Description: Floating-point PID Control initialization function * * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * ------------------------------------------------------------------- */ #include "arm_math.h" /** * @addtogroup PID * @{ */ /** * @brief Initialization function for the floating-point PID Control. * @param[in,out] *S points to an instance of the PID structure. * @param[in] resetStateFlag flag to reset the state. 0 = no change in state & 1 = reset the state. * @return none. * \par Description: * \par * The <code>resetStateFlag</code> specifies whether to set state to zero or not. \n * The function computes the structure fields: <code>A0</code>, <code>A1</code> <code>A2</code> * using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd) * also sets the state variables to all zeros. */ void arm_pid_init_f32( arm_pid_instance_f32 * S, int32_t resetStateFlag) { /* Derived coefficient A0 */ S->A0 = S->Kp + S->Ki + S->Kd; /* Derived coefficient A1 */ S->A1 = (-S->Kp) - ((float32_t) 2.0 * S->Kd); /* Derived coefficient A2 */ S->A2 = S->Kd; /* Check whether state needs reset or not */ if(resetStateFlag) { /* Clear the state buffer. The size will be always 3 samples */ memset(S->state, 0, 3u * sizeof(float32_t)); } } /** * @} end of PID group */

1137519-player

lib/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_f32.c

C

lgpl

2,240

/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_pid_reset_q15.c * * Description: Q15 PID Control reset function * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * -------------------------------------------------------------------- */ #include "arm_math.h" /** * @addtogroup PID * @{ */ /** * @brief Reset function for the Q15 PID Control. * @param[in] *S Instance pointer of PID control data structure. * @return none. * \par Description: * The function resets the state buffer to zeros. */ void arm_pid_reset_q15( arm_pid_instance_q15 * S) { /* Reset state to zero, The size will be always 3 samples */ memset(S->state, 0, 3u * sizeof(q15_t)); } /** * @} end of PID group */

1137519-player

lib/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q15.c

C

lgpl

1,462

/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_mat_mult_fast_q31.c * * Description: Q31 matrix multiplication (fast variant). * * Target Processor: Cortex-M4/Cortex-M3 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * -------------------------------------------------------------------- */ #include "arm_math.h" /** * @ingroup groupMatrix */ /** * @addtogroup MatrixMult * @{ */ /** * @brief Q31 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4 * @param[in] *pSrcA points to the first input matrix structure * @param[in] *pSrcB points to the second input matrix structure * @param[out] *pDst points to output matrix structure * @return The function returns either * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking. * * @details * Scaling and Overflow Behavior: * * \par * The difference between the function arm_mat_mult_q31() and this fast variant is that * the fast variant use a 32-bit rather than a 64-bit accumulator. * The result of each 1.31 x 1.31 multiplication is truncated to * 2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30 * format. Finally, the accumulator is saturated and converted to a 1.31 result. * * \par * The fast version has the same overflow behavior as the standard version but provides * less precision since it discards the low 32 bits of each multiplication result. * In order to avoid overflows completely the input signals must be scaled down. * Scale down one of the input matrices by log2(numColsA) bits to * avoid overflows, as a total of numColsA additions are computed internally for each * output element. * * \par * See <code>arm_mat_mult_q31()</code> for a slower implementation of this function * which uses 64-bit accumulation to provide higher precision. */ arm_status arm_mat_mult_fast_q31( const arm_matrix_instance_q31 * pSrcA, const arm_matrix_instance_q31 * pSrcB, arm_matrix_instance_q31 * pDst) { q31_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */ q31_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */ q31_t *pInA = pSrcA->pData; /* input data matrix pointer A */ // q31_t *pSrcB = pSrcB->pData; /* input data matrix pointer B */ q31_t *pOut = pDst->pData; /* output data matrix pointer */ q31_t *px; /* Temporary output data matrix pointer */ q31_t sum; /* Accumulator */ uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */ uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */ uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */ uint16_t col, i = 0u, j, row = numRowsA, colCnt; /* loop counters */ arm_status status; /* status of matrix multiplication */ #ifdef ARM_MATH_MATRIX_CHECK /* Check for matrix mismatch condition */ if((pSrcA->numCols != pSrcB->numRows) || (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols)) { /* Set status as ARM_MATH_SIZE_MISMATCH */ status = ARM_MATH_SIZE_MISMATCH; } else #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ { /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */ /* row loop */ do { /* Output pointer is set to starting address of the row being processed */ px = pOut + i; /* For every row wise process, the column loop counter is to be initiated */ col = numColsB; /* For every row wise process, the pIn2 pointer is set ** to the starting address of the pSrcB data */ pIn2 = pSrcB->pData; j = 0u; /* column loop */ do { /* Set the variable sum, that acts as accumulator, to zero */ sum = 0; /* Initiate the pointer pIn1 to point to the starting address of pInA */ pIn1 = pInA; /* Apply loop unrolling and compute 4 MACs simultaneously. */ colCnt = numColsA >> 2; /* matrix multiplication */ while(colCnt > 0u) { /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */ /* Perform the multiply-accumulates */ sum = (q31_t) ((((q63_t) sum << 32) + ((q63_t) * pIn1++ * (*pIn2))) >> 32); pIn2 += numColsB; sum = (q31_t) ((((q63_t) sum << 32) + ((q63_t) * pIn1++ * (*pIn2))) >> 32); pIn2 += numColsB; sum = (q31_t) ((((q63_t) sum << 32) + ((q63_t) * pIn1++ * (*pIn2))) >> 32); pIn2 += numColsB; sum = (q31_t) ((((q63_t) sum << 32) + ((q63_t) * pIn1++ * (*pIn2))) >> 32); pIn2 += numColsB; /* Decrement the loop counter */ colCnt--; } /* If the columns of pSrcA is not a multiple of 4, compute any remaining output samples here. ** No loop unrolling is used. */ colCnt = numColsA % 0x4u; while(colCnt > 0u) { /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */ /* Perform the multiply-accumulates */ sum = (q31_t) ((((q63_t) sum << 32) + ((q63_t) * pIn1++ * (*pIn2))) >> 32); pIn2 += numColsB; /* Decrement the loop counter */ colCnt--; } /* Convert the result from 2.30 to 1.31 format and store in destination buffer */ *px++ = sum << 1; /* Update the pointer pIn2 to point to the starting address of the next column */ j++; pIn2 = pSrcB->pData + j; /* Decrement the column loop counter */ col--; } while(col > 0u); /* Update the pointer pInA to point to the starting address of the next row */ i = i + numColsB; pInA = pInA + numColsA; /* Decrement the row loop counter */ row--; } while(row > 0u); /* set status as ARM_MATH_SUCCESS */ status = ARM_MATH_SUCCESS; } /* Return to application */ return (status); } /** * @} end of MatrixMult group */

1137519-player

lib/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_fast_q31.c

C

lgpl

7,318

/* ---------------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_mat_init_f32.c * * Description: Floating-point matrix initialization. * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * * Version 0.0.5 2010/04/26 * incorporated review comments and updated with latest CMSIS layer * * Version 0.0.3 2010/03/10 * Initial version * -------------------------------------------------------------------------- */ #include "arm_math.h" /** * @ingroup groupMatrix */ /** * @defgroup MatrixInit Matrix Initialization * * Initializes the underlying matrix data structure. * The functions set the <code>numRows</code>, * <code>numCols</code>, and <code>pData</code> fields * of the matrix data structure. */ /** * @addtogroup MatrixInit * @{ */ /** * @brief Floating-point matrix initialization. * @param[in,out] *S points to an instance of the floating-point matrix structure. * @param[in] nRows number of rows in the matrix. * @param[in] nColumns number of columns in the matrix. * @param[in] *pData points to the matrix data array. * @return none */ void arm_mat_init_f32( arm_matrix_instance_f32 * S, uint16_t nRows, uint16_t nColumns, float32_t * pData) { /* Assign Number of Rows */ S->numRows = nRows; /* Assign Number of Columns */ S->numCols = nColumns; /* Assign Data pointer */ S->pData = pData; } /** * @} end of MatrixInit group */

1137519-player

lib/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_f32.c

C

lgpl

2,299

/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_mat_add_q31.c * * Description: Q31 matrix addition * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * * Version 0.0.5 2010/04/26 * incorporated review comments and updated with latest CMSIS layer * * Version 0.0.3 2010/03/10 * Initial version * -------------------------------------------------------------------- */ #include "arm_math.h" /** * @ingroup groupMatrix */ /** * @addtogroup MatrixAdd * @{ */ /** * @brief Q31 matrix addition. * @param[in] *pSrcA points to the first input matrix structure * @param[in] *pSrcB points to the second input matrix structure * @param[out] *pDst points to output matrix structure * @return The function returns either * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking. * * Scaling and Overflow Behavior: * \par * The function uses saturating arithmetic. * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated. */ arm_status arm_mat_add_q31( const arm_matrix_instance_q31 * pSrcA, const arm_matrix_instance_q31 * pSrcB, arm_matrix_instance_q31 * pDst) { q31_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */ q31_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */ q31_t *pOut = pDst->pData; /* output data matrix pointer */ uint32_t numSamples; /* total number of elements in the matrix */ uint32_t blkCnt; /* loop counters */ arm_status status; /* status of matrix addition */ #ifdef ARM_MATH_MATRIX_CHECK /* Check for matrix mismatch condition */ if((pSrcA->numRows != pSrcB->numRows) || (pSrcA->numCols != pSrcB->numCols) || (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols)) { /* Set status as ARM_MATH_SIZE_MISMATCH */ status = ARM_MATH_SIZE_MISMATCH; } else #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ { /* Total number of samples in the input matrix */ numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols; #ifndef ARM_MATH_CM0 /* Run the below code for Cortex-M4 and Cortex-M3 */ /* Loop Unrolling */ blkCnt = numSamples >> 2u; /* First part of the processing with loop unrolling. Compute 4 outputs at a time. ** a second loop below computes the remaining 1 to 3 samples. */ while(blkCnt > 0u) { /* C(m,n) = A(m,n) + B(m,n) */ /* Add, saturate and then store the results in the destination buffer. */ *pOut++ = __QADD(*pIn1++, *pIn2++); *pOut++ = __QADD(*pIn1++, *pIn2++); *pOut++ = __QADD(*pIn1++, *pIn2++); *pOut++ = __QADD(*pIn1++, *pIn2++); /* Decrement the loop counter */ blkCnt--; } /* If the numSamples is not a multiple of 4, compute any remaining output samples here. ** No loop unrolling is used. */ blkCnt = numSamples % 0x4u; while(blkCnt > 0u) { /* C(m,n) = A(m,n) + B(m,n) */ /* Add, saturate and then store the results in the destination buffer. */ *pOut++ = __QADD(*pIn1++, *pIn2++); /* Decrement the loop counter */ blkCnt--; } #else /* Run the below code for Cortex-M0 */ /* Initialize blkCnt with number of samples */ blkCnt = numSamples; while(blkCnt > 0u) { /* C(m,n) = A(m,n) + B(m,n) */ /* Add, saturate and then store the results in the destination buffer. */ *pOut++ = clip_q63_to_q31(((q63_t) (*pIn1++)) + (*pIn2++)); /* Decrement the loop counter */ blkCnt--; } #endif /* #ifndef ARM_MATH_CM0 */ /* set status as ARM_MATH_SUCCESS */ status = ARM_MATH_SUCCESS; } /* Return to application */ return (status); } /** * @} end of MatrixAdd group */

1137519-player

lib/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_q31.c

C

lgpl

4,813

/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_mat_sub_q31.c * * Description: Q31 matrix subtraction * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * * Version 0.0.5 2010/04/26 * incorporated review comments and updated with latest CMSIS layer * * Version 0.0.3 2010/03/10 * Initial version * -------------------------------------------------------------------- */ #include "arm_math.h" /** * @ingroup groupMatrix */ /** * @addtogroup MatrixSub * @{ */ /** * @brief Q31 matrix subtraction. * @param[in] *pSrcA points to the first input matrix structure * @param[in] *pSrcB points to the second input matrix structure * @param[out] *pDst points to output matrix structure * @return The function returns either * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking. * * Scaling and Overflow Behavior: * \par * The function uses saturating arithmetic. * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated. */ arm_status arm_mat_sub_q31( const arm_matrix_instance_q31 * pSrcA, const arm_matrix_instance_q31 * pSrcB, arm_matrix_instance_q31 * pDst) { q31_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */ q31_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */ q31_t *pOut = pDst->pData; /* output data matrix pointer */ uint32_t numSamples; /* total number of elements in the matrix */ uint32_t blkCnt; /* loop counters */ arm_status status; /* status of matrix subtraction */ #ifdef ARM_MATH_MATRIX_CHECK /* Check for matrix mismatch condition */ if((pSrcA->numRows != pSrcB->numRows) || (pSrcA->numCols != pSrcB->numCols) || (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols)) { /* Set status as ARM_MATH_SIZE_MISMATCH */ status = ARM_MATH_SIZE_MISMATCH; } else #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ { /* Total number of samples in the input matrix */ numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols; #ifndef ARM_MATH_CM0 /* Run the below code for Cortex-M4 and Cortex-M3 */ /* Loop Unrolling */ blkCnt = numSamples >> 2u; /* First part of the processing with loop unrolling. Compute 4 outputs at a time. ** a second loop below computes the remaining 1 to 3 samples. */ while(blkCnt > 0u) { /* C(m,n) = A(m,n) - B(m,n) */ /* Subtract, saturate and then store the results in the destination buffer. */ *pOut++ = __QSUB(*pIn1++, *pIn2++); *pOut++ = __QSUB(*pIn1++, *pIn2++); *pOut++ = __QSUB(*pIn1++, *pIn2++); *pOut++ = __QSUB(*pIn1++, *pIn2++); /* Decrement the loop counter */ blkCnt--; } /* If the numSamples is not a multiple of 4, compute any remaining output samples here. ** No loop unrolling is used. */ blkCnt = numSamples % 0x4u; while(blkCnt > 0u) { /* C(m,n) = A(m,n) - B(m,n) */ /* Subtract, saturate and then store the results in the destination buffer. */ *pOut++ = __QSUB(*pIn1++, *pIn2++); /* Decrement the loop counter */ blkCnt--; } #else /* Run the below code for Cortex-M0 */ /* Initialize blkCnt with number of samples */ blkCnt = numSamples; while(blkCnt > 0u) { /* C(m,n) = A(m,n) - B(m,n) */ /* Subtract, saturate and then store the results in the destination buffer. */ *pOut++ = clip_q63_to_q31(((q63_t) (*pIn1++)) - (*pIn2++)); /* Decrement the loop counter */ blkCnt--; } #endif /* #ifndef ARM_MATH_CM0 */ /* Set status as ARM_MATH_SUCCESS */ status = ARM_MATH_SUCCESS; } /* Return to application */ return (status); } /** * @} end of MatrixSub group */

1137519-player

lib/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_q31.c

C

lgpl

4,840

/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_mat_scale_f32.c * * Description: Multiplies a floating-point matrix by a scalar. * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * * Version 0.0.5 2010/04/26 * incorporated review comments and updated with latest CMSIS layer * * Version 0.0.3 2010/03/10 * Initial version * -------------------------------------------------------------------- */ #include "arm_math.h" /** * @ingroup groupMatrix */ /** * @defgroup MatrixScale Matrix Scale * * Multiplies a matrix by a scalar. This is accomplished by multiplying each element in the * matrix by the scalar. For example: * \image html MatrixScale.gif "Matrix Scaling of a 3 x 3 matrix" * * The function checks to make sure that the input and output matrices are of the same size. * * In the fixed-point Q15 and Q31 functions, <code>scale</code> is represented by * a fractional multiplication <code>scaleFract</code> and an arithmetic shift <code>shift</code>. * The shift allows the gain of the scaling operation to exceed 1.0. * The overall scale factor applied to the fixed-point data is * <pre> * scale = scaleFract * 2^shift. * </pre> */ /** * @addtogroup MatrixScale * @{ */ /** * @brief Floating-point matrix scaling. * @param[in] *pSrc points to input matrix structure * @param[in] scale scale factor to be applied * @param[out] *pDst points to output matrix structure * @return The function returns either <code>ARM_MATH_SIZE_MISMATCH</code> * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking. * */ arm_status arm_mat_scale_f32( const arm_matrix_instance_f32 * pSrc, float32_t scale, arm_matrix_instance_f32 * pDst) { float32_t *pIn = pSrc->pData; /* input data matrix pointer */ float32_t *pOut = pDst->pData; /* output data matrix pointer */ uint32_t numSamples; /* total number of elements in the matrix */ uint32_t blkCnt; /* loop counters */ arm_status status; /* status of matrix scaling */ #ifdef ARM_MATH_MATRIX_CHECK /* Check for matrix mismatch condition */ if((pSrc->numRows != pDst->numRows) || (pSrc->numCols != pDst->numCols)) { /* Set status as ARM_MATH_SIZE_MISMATCH */ status = ARM_MATH_SIZE_MISMATCH; } else #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ { /* Total number of samples in the input matrix */ numSamples = (uint32_t) pSrc->numRows * pSrc->numCols; #ifndef ARM_MATH_CM0 /* Run the below code for Cortex-M4 and Cortex-M3 */ /* Loop Unrolling */ blkCnt = numSamples >> 2; /* First part of the processing with loop unrolling. Compute 4 outputs at a time. ** a second loop below computes the remaining 1 to 3 samples. */ while(blkCnt > 0u) { /* C(m,n) = A(m,n) * scale */ /* Scaling and results are stored in the destination buffer. */ *pOut++ = (*pIn++) * scale; *pOut++ = (*pIn++) * scale; *pOut++ = (*pIn++) * scale; *pOut++ = (*pIn++) * scale; /* Decrement the numSamples loop counter */ blkCnt--; } /* If the numSamples is not a multiple of 4, compute any remaining output samples here. ** No loop unrolling is used. */ blkCnt = numSamples % 0x4u; #else /* Run the below code for Cortex-M0 */ /* Initialize blkCnt with number of samples */ blkCnt = numSamples; #endif /* #ifndef ARM_MATH_CM0 */ while(blkCnt > 0u) { /* C(m,n) = A(m,n) * scale */ /* The results are stored in the destination buffer. */ *pOut++ = (*pIn++) * scale; /* Decrement the loop counter */ blkCnt--; } /* Set status as ARM_MATH_SUCCESS */ status = ARM_MATH_SUCCESS; } /* Return to application */ return (status); } /** * @} end of MatrixScale group */

1137519-player

lib/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_f32.c

C

lgpl

4,871

/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_mat_scale_q31.c * * Description: Multiplies a Q31 matrix by a scalar. * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * * Version 0.0.5 2010/04/26 * incorporated review comments and updated with latest CMSIS layer * * Version 0.0.3 2010/03/10 * Initial version * -------------------------------------------------------------------- */ #include "arm_math.h" /** * @ingroup groupMatrix */ /** * @addtogroup MatrixScale * @{ */ /** * @brief Q31 matrix scaling. * @param[in] *pSrc points to input matrix * @param[in] scaleFract fractional portion of the scale factor * @param[in] shift number of bits to shift the result by * @param[out] *pDst points to output matrix structure * @return The function returns either * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking. * * @details * Scaling and Overflow Behavior: * \par * The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.31 format. * These are multiplied to yield a 2.62 intermediate result and this is shifted with saturation to 1.31 format. */ arm_status arm_mat_scale_q31( const arm_matrix_instance_q31 * pSrc, q31_t scaleFract, int32_t shift, arm_matrix_instance_q31 * pDst) { q31_t *pIn = pSrc->pData; /* input data matrix pointer */ q31_t *pOut = pDst->pData; /* output data matrix pointer */ q63_t out; /* temporary variable to hold output value */ uint32_t numSamples; /* total number of elements in the matrix */ int32_t totShift = 31 - shift; /* shift to apply after scaling */ uint32_t blkCnt; /* loop counters */ arm_status status; /* status of matrix scaling */ #ifdef ARM_MATH_MATRIX_CHECK /* Check for matrix mismatch */ if((pSrc->numRows != pDst->numRows) || (pSrc->numCols != pDst->numCols)) { /* Set status as ARM_MATH_SIZE_MISMATCH */ status = ARM_MATH_SIZE_MISMATCH; } else #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ { /* Total number of samples in the input matrix */ numSamples = (uint32_t) pSrc->numRows * pSrc->numCols; #ifndef ARM_MATH_CM0 /* Run the below code for Cortex-M4 and Cortex-M3 */ /* Loop Unrolling */ blkCnt = numSamples >> 2u; /* First part of the processing with loop unrolling. Compute 4 outputs at a time. ** a second loop below computes the remaining 1 to 3 samples. */ while(blkCnt > 0u) { /* C(m,n) = A(m,n) * k */ /* Scale, saturate and then store the results in the destination buffer. */ out = ((q63_t) * pIn++ * scaleFract) >> totShift; *pOut++ = clip_q63_to_q31(out); out = ((q63_t) * pIn++ * scaleFract) >> totShift; *pOut++ = clip_q63_to_q31(out); out = ((q63_t) * pIn++ * scaleFract) >> totShift; *pOut++ = clip_q63_to_q31(out); out = ((q63_t) * pIn++ * scaleFract) >> totShift; *pOut++ = clip_q63_to_q31(out); /* Decrement the numSamples loop counter */ blkCnt--; } /* If the numSamples is not a multiple of 4, compute any remaining output samples here. ** No loop unrolling is used. */ blkCnt = numSamples % 0x4u; #else /* Run the below code for Cortex-M0 */ /* Initialize blkCnt with number of samples */ blkCnt = numSamples; #endif /* #ifndef ARM_MATH_CM0 */ while(blkCnt > 0u) { /* C(m,n) = A(m,n) * k */ /* Scale, saturate and then store the results in the destination buffer. */ out = ((q63_t) * pIn++ * scaleFract) >> totShift; *pOut++ = clip_q63_to_q31(out); /* Decrement the numSamples loop counter */ blkCnt--; } /* Set status as ARM_MATH_SUCCESS */ status = ARM_MATH_SUCCESS; } /* Return to application */ return (status); } /** * @} end of MatrixScale group */

1137519-player

lib/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_q31.c

C

lgpl

4,949

/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_mat_sub_f32.c * * Description: Floating-point matrix subtraction. * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * * Version 0.0.5 2010/04/26 * incorporated review comments and updated with latest CMSIS layer * * Version 0.0.3 2010/03/10 * Initial version * -------------------------------------------------------------------- */ #include "arm_math.h" /** * @ingroup groupMatrix */ /** * @defgroup MatrixSub Matrix Subtraction * * Subtract two matrices. * \image html MatrixSubtraction.gif "Subraction of two 3 x 3 matrices" * * The functions check to make sure that * <code>pSrcA</code>, <code>pSrcB</code>, and <code>pDst</code> have the same * number of rows and columns. */ /** * @addtogroup MatrixSub * @{ */ /** * @brief Floating-point matrix subtraction * @param[in] *pSrcA points to the first input matrix structure * @param[in] *pSrcB points to the second input matrix structure * @param[out] *pDst points to output matrix structure * @return The function returns either * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking. */ arm_status arm_mat_sub_f32( const arm_matrix_instance_f32 * pSrcA, const arm_matrix_instance_f32 * pSrcB, arm_matrix_instance_f32 * pDst) { float32_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */ float32_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */ float32_t *pOut = pDst->pData; /* output data matrix pointer */ uint32_t numSamples; /* total number of elements in the matrix */ uint32_t blkCnt; /* loop counters */ arm_status status; /* status of matrix subtraction */ #ifdef ARM_MATH_MATRIX_CHECK /* Check for matrix mismatch condition */ if((pSrcA->numRows != pSrcB->numRows) || (pSrcA->numCols != pSrcB->numCols) || (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols)) { /* Set status as ARM_MATH_SIZE_MISMATCH */ status = ARM_MATH_SIZE_MISMATCH; } else #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ { /* Total number of samples in the input matrix */ numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols; #ifndef ARM_MATH_CM0 /* Run the below code for Cortex-M4 and Cortex-M3 */ /* Loop Unrolling */ blkCnt = numSamples >> 2u; /* First part of the processing with loop unrolling. Compute 4 outputs at a time. ** a second loop below computes the remaining 1 to 3 samples. */ while(blkCnt > 0u) { /* C(m,n) = A(m,n) - B(m,n) */ /* Subtract and then store the results in the destination buffer. */ *pOut++ = (*pIn1++) - (*pIn2++); *pOut++ = (*pIn1++) - (*pIn2++); *pOut++ = (*pIn1++) - (*pIn2++); *pOut++ = (*pIn1++) - (*pIn2++); /* Decrement the loop counter */ blkCnt--; } /* If the numSamples is not a multiple of 4, compute any remaining output samples here. ** No loop unrolling is used. */ blkCnt = numSamples % 0x4u; #else /* Run the below code for Cortex-M0 */ /* Initialize blkCnt with number of samples */ blkCnt = numSamples; #endif /* #ifndef ARM_MATH_CM0 */ while(blkCnt > 0u) { /* C(m,n) = A(m,n) - B(m,n) */ /* Subtract and then store the results in the destination buffer. */ *pOut++ = (*pIn1++) - (*pIn2++); /* Decrement the loop counter */ blkCnt--; } /* Set status as ARM_MATH_SUCCESS */ status = ARM_MATH_SUCCESS; } /* Return to application */ return (status); } /** * @} end of MatrixSub group */

1137519-player

lib/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_f32.c

C

lgpl

4,670

/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_mat_inverse_f32.c * * Description: Floating-point matrix inverse. * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * -------------------------------------------------------------------- */ #include "arm_math.h" /** * @ingroup groupMatrix */ /** * @defgroup MatrixInv Matrix Inverse * * Computes the inverse of a matrix. * * The inverse is defined only if the input matrix is square and non-singular (the determinant * is non-zero). The function checks that the input and output matrices are square and of the * same size. * * Matrix inversion is numerically sensitive and the CMSIS DSP library only supports matrix * inversion of floating-point matrices. * * \par Algorithm * The Gauss-Jordan method is used to find the inverse. * The algorithm performs a sequence of elementary row-operations till it * reduces the input matrix to an identity matrix. Applying the same sequence * of elementary row-operations to an identity matrix yields the inverse matrix. * If the input matrix is singular, then the algorithm terminates and returns error status * <code>ARM_MATH_SINGULAR</code>. * \image html MatrixInverse.gif "Matrix Inverse of a 3 x 3 matrix using Gauss-Jordan Method" */ /** * @addtogroup MatrixInv * @{ */ /** * @brief Floating-point matrix inverse. * @param[in] *pSrc points to input matrix structure * @param[out] *pDst points to output matrix structure * @return The function returns * <code>ARM_MATH_SIZE_MISMATCH</code> if the input matrix is not square or if the size * of the output matrix does not match the size of the input matrix. * If the input matrix is found to be singular (non-invertible), then the function returns * <code>ARM_MATH_SINGULAR</code>. Otherwise, the function returns <code>ARM_MATH_SUCCESS</code>. */ arm_status arm_mat_inverse_f32( const arm_matrix_instance_f32 * pSrc, arm_matrix_instance_f32 * pDst) { float32_t *pIn = pSrc->pData; /* input data matrix pointer */ float32_t *pOut = pDst->pData; /* output data matrix pointer */ float32_t *pInT1, *pInT2; /* Temporary input data matrix pointer */ float32_t *pInT3, *pInT4; /* Temporary output data matrix pointer */ float32_t *pPivotRowIn, *pPRT_in, *pPivotRowDst, *pPRT_pDst; /* Temporary input and output data matrix pointer */ uint32_t numRows = pSrc->numRows; /* Number of rows in the matrix */ uint32_t numCols = pSrc->numCols; /* Number of Cols in the matrix */ #ifndef ARM_MATH_CM0 /* Run the below code for Cortex-M4 and Cortex-M3 */ float32_t Xchg, in = 0.0f, in1; /* Temporary input values */ uint32_t i, rowCnt, flag = 0u, j, loopCnt, k, l; /* loop counters */ arm_status status; /* status of matrix inverse */ #ifdef ARM_MATH_MATRIX_CHECK /* Check for matrix mismatch condition */ if((pSrc->numRows != pSrc->numCols) || (pDst->numRows != pDst->numCols) || (pSrc->numRows != pDst->numRows)) { /* Set status as ARM_MATH_SIZE_MISMATCH */ status = ARM_MATH_SIZE_MISMATCH; } else #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ { /*-------------------------------------------------------------------------------------------------------------- * Matrix Inverse can be solved using elementary row operations. * * Gauss-Jordan Method: * * 1. First combine the identity matrix and the input matrix separated by a bar to form an * augmented matrix as follows: * _ _ _ _ * | a11 a12 | 1 0 | | X11 X12 | * | | | = | | * |_ a21 a22 | 0 1 _| |_ X21 X21 _| * * 2. In our implementation, pDst Matrix is used as identity matrix. * * 3. Begin with the first row. Let i = 1. * * 4. Check to see if the pivot for row i is zero. * The pivot is the element of the main diagonal that is on the current row. * For instance, if working with row i, then the pivot element is aii. * If the pivot is zero, exchange that row with a row below it that does not * contain a zero in column i. If this is not possible, then an inverse * to that matrix does not exist. * * 5. Divide every element of row i by the pivot. * * 6. For every row below and row i, replace that row with the sum of that row and * a multiple of row i so that each new element in column i below row i is zero. * * 7. Move to the next row and column and repeat steps 2 through 5 until you have zeros * for every element below and above the main diagonal. * * 8. Now an identical matrix is formed to the left of the bar(input matrix, pSrc). * Therefore, the matrix to the right of the bar is our solution(pDst matrix, pDst). *----------------------------------------------------------------------------------------------------------------*/ /* Working pointer for destination matrix */ pInT2 = pOut; /* Loop over the number of rows */ rowCnt = numRows; /* Making the destination matrix as identity matrix */ while(rowCnt > 0u) { /* Writing all zeroes in lower triangle of the destination matrix */ j = numRows - rowCnt; while(j > 0u) { *pInT2++ = 0.0f; j--; } /* Writing all ones in the diagonal of the destination matrix */ *pInT2++ = 1.0f; /* Writing all zeroes in upper triangle of the destination matrix */ j = rowCnt - 1u; while(j > 0u) { *pInT2++ = 0.0f; j--; } /* Decrement the loop counter */ rowCnt--; } /* Loop over the number of columns of the input matrix. All the elements in each column are processed by the row operations */ loopCnt = numCols; /* Index modifier to navigate through the columns */ l = 0u; while(loopCnt > 0u) { /* Check if the pivot element is zero.. * If it is zero then interchange the row with non zero row below. * If there is no non zero element to replace in the rows below, * then the matrix is Singular. */ /* Working pointer for the input matrix that points * to the pivot element of the particular row */ pInT1 = pIn + (l * numCols); /* Working pointer for the destination matrix that points * to the pivot element of the particular row */ pInT3 = pOut + (l * numCols); /* Temporary variable to hold the pivot value */ in = *pInT1; /* Destination pointer modifier */ k = 1u; /* Check if the pivot element is zero */ if(*pInT1 == 0.0f) { /* Loop over the number rows present below */ i = numRows - (l + 1u); while(i > 0u) { /* Update the input and destination pointers */ pInT2 = pInT1 + (numCols * l); pInT4 = pInT3 + (numCols * k); /* Check if there is a non zero pivot element to * replace in the rows below */ if(*pInT2 != 0.0f) { /* Loop over number of columns * to the right of the pilot element */ j = numCols - l; while(j > 0u) { /* Exchange the row elements of the input matrix */ Xchg = *pInT2; *pInT2++ = *pInT1; *pInT1++ = Xchg; /* Decrement the loop counter */ j--; } /* Loop over number of columns of the destination matrix */ j = numCols; while(j > 0u) { /* Exchange the row elements of the destination matrix */ Xchg = *pInT4; *pInT4++ = *pInT3; *pInT3++ = Xchg; /* Decrement the loop counter */ j--; } /* Flag to indicate whether exchange is done or not */ flag = 1u; /* Break after exchange is done */ break; } /* Update the destination pointer modifier */ k++; /* Decrement the loop counter */ i--; } } /* Update the status if the matrix is singular */ if((flag != 1u) && (in == 0.0f)) { status = ARM_MATH_SINGULAR; break; } /* Points to the pivot row of input and destination matrices */ pPivotRowIn = pIn + (l * numCols); pPivotRowDst = pOut + (l * numCols); /* Temporary pointers to the pivot row pointers */ pInT1 = pPivotRowIn; pInT2 = pPivotRowDst; /* Pivot element of the row */ in = *(pIn + (l * numCols)); /* Loop over number of columns * to the right of the pilot element */ j = (numCols - l); while(j > 0u) { /* Divide each element of the row of the input matrix * by the pivot element */ in1 = *pInT1; *pInT1++ = in1 / in; /* Decrement the loop counter */ j--; } /* Loop over number of columns of the destination matrix */ j = numCols; while(j > 0u) { /* Divide each element of the row of the destination matrix * by the pivot element */ in1 = *pInT2; *pInT2++ = in1 / in; /* Decrement the loop counter */ j--; } /* Replace the rows with the sum of that row and a multiple of row i * so that each new element in column i above row i is zero.*/ /* Temporary pointers for input and destination matrices */ pInT1 = pIn; pInT2 = pOut; /* index used to check for pivot element */ i = 0u; /* Loop over number of rows */ /* to be replaced by the sum of that row and a multiple of row i */ k = numRows; while(k > 0u) { /* Check for the pivot element */ if(i == l) { /* If the processing element is the pivot element, only the columns to the right are to be processed */ pInT1 += numCols - l; pInT2 += numCols; } else { /* Element of the reference row */ in = *pInT1; /* Working pointers for input and destination pivot rows */ pPRT_in = pPivotRowIn; pPRT_pDst = pPivotRowDst; /* Loop over the number of columns to the right of the pivot element, to replace the elements in the input matrix */ j = (numCols - l); while(j > 0u) { /* Replace the element by the sum of that row and a multiple of the reference row */ in1 = *pInT1; *pInT1++ = in1 - (in * *pPRT_in++); /* Decrement the loop counter */ j--; } /* Loop over the number of columns to replace the elements in the destination matrix */ j = numCols; while(j > 0u) { /* Replace the element by the sum of that row and a multiple of the reference row */ in1 = *pInT2; *pInT2++ = in1 - (in * *pPRT_pDst++); /* Decrement the loop counter */ j--; } } /* Increment the temporary input pointer */ pInT1 = pInT1 + l; /* Decrement the loop counter */ k--; /* Increment the pivot index */ i++; } /* Increment the input pointer */ pIn++; /* Decrement the loop counter */ loopCnt--; /* Increment the index modifier */ l++; } #else /* Run the below code for Cortex-M0 */ float32_t Xchg, in = 0.0f; /* Temporary input values */ uint32_t i, rowCnt, flag = 0u, j, loopCnt, k, l; /* loop counters */ arm_status status; /* status of matrix inverse */ #ifdef ARM_MATH_MATRIX_CHECK /* Check for matrix mismatch condition */ if((pSrc->numRows != pSrc->numCols) || (pDst->numRows != pDst->numCols) || (pSrc->numRows != pDst->numRows)) { /* Set status as ARM_MATH_SIZE_MISMATCH */ status = ARM_MATH_SIZE_MISMATCH; } else #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ { /*-------------------------------------------------------------------------------------------------------------- * Matrix Inverse can be solved using elementary row operations. * * Gauss-Jordan Method: * * 1. First combine the identity matrix and the input matrix separated by a bar to form an * augmented matrix as follows: * _ _ _ _ _ _ _ _ * | | a11 a12 | | | 1 0 | | | X11 X12 | * | | | | | | | = | | * |_ |_ a21 a22 _| | |_0 1 _| _| |_ X21 X21 _| * * 2. In our implementation, pDst Matrix is used as identity matrix. * * 3. Begin with the first row. Let i = 1. * * 4. Check to see if the pivot for row i is zero. * The pivot is the element of the main diagonal that is on the current row. * For instance, if working with row i, then the pivot element is aii. * If the pivot is zero, exchange that row with a row below it that does not * contain a zero in column i. If this is not possible, then an inverse * to that matrix does not exist. * * 5. Divide every element of row i by the pivot. * * 6. For every row below and row i, replace that row with the sum of that row and * a multiple of row i so that each new element in column i below row i is zero. * * 7. Move to the next row and column and repeat steps 2 through 5 until you have zeros * for every element below and above the main diagonal. * * 8. Now an identical matrix is formed to the left of the bar(input matrix, src). * Therefore, the matrix to the right of the bar is our solution(dst matrix, dst). *----------------------------------------------------------------------------------------------------------------*/ /* Working pointer for destination matrix */ pInT2 = pOut; /* Loop over the number of rows */ rowCnt = numRows; /* Making the destination matrix as identity matrix */ while(rowCnt > 0u) { /* Writing all zeroes in lower triangle of the destination matrix */ j = numRows - rowCnt; while(j > 0u) { *pInT2++ = 0.0f; j--; } /* Writing all ones in the diagonal of the destination matrix */ *pInT2++ = 1.0f; /* Writing all zeroes in upper triangle of the destination matrix */ j = rowCnt - 1u; while(j > 0u) { *pInT2++ = 0.0f; j--; } /* Decrement the loop counter */ rowCnt--; } /* Loop over the number of columns of the input matrix. All the elements in each column are processed by the row operations */ loopCnt = numCols; /* Index modifier to navigate through the columns */ l = 0u; //for(loopCnt = 0u; loopCnt < numCols; loopCnt++) while(loopCnt > 0u) { /* Check if the pivot element is zero.. * If it is zero then interchange the row with non zero row below. * If there is no non zero element to replace in the rows below, * then the matrix is Singular. */ /* Working pointer for the input matrix that points * to the pivot element of the particular row */ pInT1 = pIn + (l * numCols); /* Working pointer for the destination matrix that points * to the pivot element of the particular row */ pInT3 = pOut + (l * numCols); /* Temporary variable to hold the pivot value */ in = *pInT1; /* Destination pointer modifier */ k = 1u; /* Check if the pivot element is zero */ if(*pInT1 == 0.0f) { /* Loop over the number rows present below */ for (i = (l + 1u); i < numRows; i++) { /* Update the input and destination pointers */ pInT2 = pInT1 + (numCols * l); pInT4 = pInT3 + (numCols * k); /* Check if there is a non zero pivot element to * replace in the rows below */ if(*pInT2 != 0.0f) { /* Loop over number of columns * to the right of the pilot element */ for (j = 0u; j < (numCols - l); j++) { /* Exchange the row elements of the input matrix */ Xchg = *pInT2; *pInT2++ = *pInT1; *pInT1++ = Xchg; } for (j = 0u; j < numCols; j++) { Xchg = *pInT4; *pInT4++ = *pInT3; *pInT3++ = Xchg; } /* Flag to indicate whether exchange is done or not */ flag = 1u; /* Break after exchange is done */ break; } /* Update the destination pointer modifier */ k++; } } /* Update the status if the matrix is singular */ if((flag != 1u) && (in == 0.0f)) { status = ARM_MATH_SINGULAR; break; } /* Points to the pivot row of input and destination matrices */ pPivotRowIn = pIn + (l * numCols); pPivotRowDst = pOut + (l * numCols); /* Temporary pointers to the pivot row pointers */ pInT1 = pPivotRowIn; pInT2 = pPivotRowDst; /* Pivot element of the row */ in = *(pIn + (l * numCols)); /* Loop over number of columns * to the right of the pilot element */ for (j = 0u; j < (numCols - l); j++) { /* Divide each element of the row of the input matrix * by the pivot element */ *pInT1++ = *pInT1 / in; } for (j = 0u; j < numCols; j++) { /* Divide each element of the row of the destination matrix * by the pivot element */ *pInT2++ = *pInT2 / in; } /* Replace the rows with the sum of that row and a multiple of row i * so that each new element in column i above row i is zero.*/ /* Temporary pointers for input and destination matrices */ pInT1 = pIn; pInT2 = pOut; for (i = 0u; i < numRows; i++) { /* Check for the pivot element */ if(i == l) { /* If the processing element is the pivot element, only the columns to the right are to be processed */ pInT1 += numCols - l; pInT2 += numCols; } else { /* Element of the reference row */ in = *pInT1; /* Working pointers for input and destination pivot rows */ pPRT_in = pPivotRowIn; pPRT_pDst = pPivotRowDst; /* Loop over the number of columns to the right of the pivot element, to replace the elements in the input matrix */ for (j = 0u; j < (numCols - l); j++) { /* Replace the element by the sum of that row and a multiple of the reference row */ *pInT1++ = *pInT1 - (in * *pPRT_in++); } /* Loop over the number of columns to replace the elements in the destination matrix */ for (j = 0u; j < numCols; j++) { /* Replace the element by the sum of that row and a multiple of the reference row */ *pInT2++ = *pInT2 - (in * *pPRT_pDst++); } } /* Increment the temporary input pointer */ pInT1 = pInT1 + l; } /* Increment the input pointer */ pIn++; /* Decrement the loop counter */ loopCnt--; /* Increment the index modifier */ l++; } #endif /* #ifndef ARM_MATH_CM0 */ /* Set status as ARM_MATH_SUCCESS */ status = ARM_MATH_SUCCESS; if((flag != 1u) && (in == 0.0f)) { status = ARM_MATH_SINGULAR; } } /* Return to application */ return (status); } /** * @} end of MatrixInv group */

1137519-player

lib/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_inverse_f32.c

C

lgpl

22,092

/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_mat_mult_q15.c * * Description: Q15 matrix multiplication. * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * * Version 0.0.5 2010/04/26 * incorporated review comments and updated with latest CMSIS layer * * Version 0.0.3 2010/03/10 * Initial version * -------------------------------------------------------------------- */ #include "arm_math.h" /** * @ingroup groupMatrix */ /** * @addtogroup MatrixMult * @{ */ /** * @brief Q15 matrix multiplication * @param[in] *pSrcA points to the first input matrix structure * @param[in] *pSrcB points to the second input matrix structure * @param[out] *pDst points to output matrix structure * @param[in] *pState points to the array for storing intermediate results * @return The function returns either * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking. * * @details * Scaling and Overflow Behavior: * * \par * The function is implemented using a 64-bit internal accumulator. The inputs to the * multiplications are in 1.15 format and multiplications yield a 2.30 result. * The 2.30 intermediate * results are accumulated in a 64-bit accumulator in 34.30 format. This approach * provides 33 guard bits and there is no risk of overflow. The 34.30 result is then * truncated to 34.15 format by discarding the low 15 bits and then saturated to * 1.15 format. * * \par * Refer to <code>arm_mat_mult_fast_q15()</code> for a faster but less precise version of this function for Cortex-M3 and Cortex-M4. * */ arm_status arm_mat_mult_q15( const arm_matrix_instance_q15 * pSrcA, const arm_matrix_instance_q15 * pSrcB, arm_matrix_instance_q15 * pDst, q15_t * pState) { q63_t sum; /* accumulator */ #ifndef ARM_MATH_CM0 /* Run the below code for Cortex-M4 and Cortex-M3 */ q31_t in; /* Temporary variable to hold the input value */ q15_t *pSrcBT = pState; /* input data matrix pointer for transpose */ q15_t *pInA = pSrcA->pData; /* input data matrix pointer A of Q15 type */ q15_t *pInB = pSrcB->pData; /* input data matrix pointer B of Q15 type */ q15_t *px; /* Temporary output data matrix pointer */ uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */ uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */ uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */ uint16_t numRowsB = pSrcB->numRows; /* number of rows of input matrix A */ uint16_t col, i = 0u, row = numRowsB, colCnt; /* loop counters */ arm_status status; /* status of matrix multiplication */ #ifdef ARM_MATH_MATRIX_CHECK /* Check for matrix mismatch condition */ if((pSrcA->numCols != pSrcB->numRows) || (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols)) { /* Set status as ARM_MATH_SIZE_MISMATCH */ status = ARM_MATH_SIZE_MISMATCH; } else #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ { /* Matrix transpose */ do { /* Apply loop unrolling and exchange the columns with row elements */ col = numColsB >> 2; /* The pointer px is set to starting address of the column being processed */ px = pSrcBT + i; /* First part of the processing with loop unrolling. Compute 4 outputs at a time. ** a second loop below computes the remaining 1 to 3 samples. */ while(col > 0u) { /* Read two elements from the row */ in = *__SIMD32(pInB)++; /* Unpack and store one element in the destination */ #ifndef ARM_MATH_BIG_ENDIAN *px = (q15_t) in; #else *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ /* Update the pointer px to point to the next row of the transposed matrix */ px += numRowsB; /* Unpack and store the second element in the destination */ #ifndef ARM_MATH_BIG_ENDIAN *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); #else *px = (q15_t) in; #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ /* Update the pointer px to point to the next row of the transposed matrix */ px += numRowsB; /* Read two elements from the row */ in = *__SIMD32(pInB)++; /* Unpack and store one element in the destination */ #ifndef ARM_MATH_BIG_ENDIAN *px = (q15_t) in; #else *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ /* Update the pointer px to point to the next row of the transposed matrix */ px += numRowsB; /* Unpack and store the second element in the destination */ #ifndef ARM_MATH_BIG_ENDIAN *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); #else *px = (q15_t) in; #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ /* Update the pointer px to point to the next row of the transposed matrix */ px += numRowsB; /* Decrement the column loop counter */ col--; } /* If the columns of pSrcB is not a multiple of 4, compute any remaining output samples here. ** No loop unrolling is used. */ col = numColsB % 0x4u; while(col > 0u) { /* Read and store the input element in the destination */ *px = *pInB++; /* Update the pointer px to point to the next row of the transposed matrix */ px += numRowsB; /* Decrement the column loop counter */ col--; } i++; /* Decrement the row loop counter */ row--; } while(row > 0u); /* Reset the variables for the usage in the following multiplication process */ row = numRowsA; i = 0u; px = pDst->pData; /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */ /* row loop */ do { /* For every row wise process, the column loop counter is to be initiated */ col = numColsB; /* For every row wise process, the pIn2 pointer is set ** to the starting address of the transposed pSrcB data */ pInB = pSrcBT; /* column loop */ do { /* Set the variable sum, that acts as accumulator, to zero */ sum = 0; /* Apply loop unrolling and compute 2 MACs simultaneously. */ colCnt = numColsA >> 1; /* Initiate the pointer pIn1 to point to the starting address of the column being processed */ pInA = pSrcA->pData + i; /* matrix multiplication */ while(colCnt > 0u) { /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */ sum = __SMLALD(*__SIMD32(pInA)++, *__SIMD32(pInB)++, sum); /* Decrement the loop counter */ colCnt--; } /* process odd column samples */ if((numColsA & 0x1u) > 0u) { /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */ sum += ((q31_t) * pInA * (*pInB++)); } /* Saturate and store the result in the destination buffer */ *px = (q15_t) (__SSAT((sum >> 15), 16)); px++; /* Decrement the column loop counter */ col--; } while(col > 0u); i = i + numColsA; /* Decrement the row loop counter */ row--; } while(row > 0u); #else /* Run the below code for Cortex-M0 */ q15_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */ q15_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */ q15_t *pInA = pSrcA->pData; /* input data matrix pointer A of Q15 type */ q15_t *pInB = pSrcB->pData; /* input data matrix pointer B of Q15 type */ q15_t *pOut = pDst->pData; /* output data matrix pointer */ q15_t *px; /* Temporary output data matrix pointer */ uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */ uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */ uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */ uint16_t col, i = 0u, row = numRowsA, colCnt; /* loop counters */ arm_status status; /* status of matrix multiplication */ #ifdef ARM_MATH_MATRIX_CHECK /* Check for matrix mismatch condition */ if((pSrcA->numCols != pSrcB->numRows) || (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols)) { /* Set status as ARM_MATH_SIZE_MISMATCH */ status = ARM_MATH_SIZE_MISMATCH; } else #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ { /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */ /* row loop */ do { /* Output pointer is set to starting address of the row being processed */ px = pOut + i; /* For every row wise process, the column loop counter is to be initiated */ col = numColsB; /* For every row wise process, the pIn2 pointer is set ** to the starting address of the pSrcB data */ pIn2 = pSrcB->pData; /* column loop */ do { /* Set the variable sum, that acts as accumulator, to zero */ sum = 0; /* Initiate the pointer pIn1 to point to the starting address of pSrcA */ pIn1 = pInA; /* Matrix A columns number of MAC operations are to be performed */ colCnt = numColsA; /* matrix multiplication */ while(colCnt > 0u) { /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */ /* Perform the multiply-accumulates */ sum += (q31_t) * pIn1++ * *pIn2; pIn2 += numColsB; /* Decrement the loop counter */ colCnt--; } /* Convert the result from 34.30 to 1.15 format and store the saturated value in destination buffer */ /* Saturate and store the result in the destination buffer */ *px++ = (q15_t) __SSAT((sum >> 15), 16); /* Decrement the column loop counter */ col--; /* Update the pointer pIn2 to point to the starting address of the next column */ pIn2 = pInB + (numColsB - col); } while(col > 0u); /* Update the pointer pSrcA to point to the starting address of the next row */ i = i + numColsB; pInA = pInA + numColsA; /* Decrement the row loop counter */ row--; } while(row > 0u); #endif /* #ifndef ARM_MATH_CM0 */ /* set status as ARM_MATH_SUCCESS */ status = ARM_MATH_SUCCESS; } /* Return to application */ return (status); } /** * @} end of MatrixMult group */

1137519-player

lib/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_q15.c

C

lgpl

12,247

/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_mat_mult_q31.c * * Description: Q31 matrix multiplication. * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * * Version 0.0.5 2010/04/26 * incorporated review comments and updated with latest CMSIS layer * * Version 0.0.3 2010/03/10 * Initial version * -------------------------------------------------------------------- */ #include "arm_math.h" /** * @ingroup groupMatrix */ /** * @addtogroup MatrixMult * @{ */ /** * @brief Q31 matrix multiplication * @param[in] *pSrcA points to the first input matrix structure * @param[in] *pSrcB points to the second input matrix structure * @param[out] *pDst points to output matrix structure * @return The function returns either * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking. * * @details * Scaling and Overflow Behavior: * * \par * The function is implemented using an internal 64-bit accumulator. * The accumulator has a 2.62 format and maintains full precision of the intermediate * multiplication results but provides only a single guard bit. There is no saturation * on intermediate additions. Thus, if the accumulator overflows it wraps around and * distorts the result. The input signals should be scaled down to avoid intermediate * overflows. The input is thus scaled down by log2(numColsA) bits * to avoid overflows, as a total of numColsA additions are performed internally. * The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result. * * \par * See <code>arm_mat_mult_fast_q31()</code> for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4. * */ arm_status arm_mat_mult_q31( const arm_matrix_instance_q31 * pSrcA, const arm_matrix_instance_q31 * pSrcB, arm_matrix_instance_q31 * pDst) { q31_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */ q31_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */ q31_t *pInA = pSrcA->pData; /* input data matrix pointer A */ q31_t *pOut = pDst->pData; /* output data matrix pointer */ q31_t *px; /* Temporary output data matrix pointer */ q63_t sum; /* Accumulator */ uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */ uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */ uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */ #ifndef ARM_MATH_CM0 /* Run the below code for Cortex-M4 and Cortex-M3 */ uint16_t col, i = 0u, j, row = numRowsA, colCnt; /* loop counters */ arm_status status; /* status of matrix multiplication */ #ifdef ARM_MATH_MATRIX_CHECK /* Check for matrix mismatch condition */ if((pSrcA->numCols != pSrcB->numRows) || (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols)) { /* Set status as ARM_MATH_SIZE_MISMATCH */ status = ARM_MATH_SIZE_MISMATCH; } else #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ { /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */ /* row loop */ do { /* Output pointer is set to starting address of the row being processed */ px = pOut + i; /* For every row wise process, the column loop counter is to be initiated */ col = numColsB; /* For every row wise process, the pIn2 pointer is set ** to the starting address of the pSrcB data */ pIn2 = pSrcB->pData; j = 0u; /* column loop */ do { /* Set the variable sum, that acts as accumulator, to zero */ sum = 0; /* Initiate the pointer pIn1 to point to the starting address of pInA */ pIn1 = pInA; /* Apply loop unrolling and compute 4 MACs simultaneously. */ colCnt = numColsA >> 2; /* matrix multiplication */ while(colCnt > 0u) { /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */ /* Perform the multiply-accumulates */ sum += (q63_t) * pIn1++ * *pIn2; pIn2 += numColsB; sum += (q63_t) * pIn1++ * *pIn2; pIn2 += numColsB; sum += (q63_t) * pIn1++ * *pIn2; pIn2 += numColsB; sum += (q63_t) * pIn1++ * *pIn2; pIn2 += numColsB; /* Decrement the loop counter */ colCnt--; } /* If the columns of pSrcA is not a multiple of 4, compute any remaining output samples here. ** No loop unrolling is used. */ colCnt = numColsA % 0x4u; while(colCnt > 0u) { /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */ /* Perform the multiply-accumulates */ sum += (q63_t) * pIn1++ * *pIn2; pIn2 += numColsB; /* Decrement the loop counter */ colCnt--; } /* Convert the result from 2.62 to 1.31 format and store in destination buffer */ *px++ = (q31_t) (sum >> 31); /* Update the pointer pIn2 to point to the starting address of the next column */ j++; pIn2 = (pSrcB->pData) + j; /* Decrement the column loop counter */ col--; } while(col > 0u); #else /* Run the below code for Cortex-M0 */ q31_t *pInB = pSrcB->pData; /* input data matrix pointer B */ uint16_t col, i = 0u, row = numRowsA, colCnt; /* loop counters */ arm_status status; /* status of matrix multiplication */ #ifdef ARM_MATH_MATRIX_CHECK /* Check for matrix mismatch condition */ if((pSrcA->numCols != pSrcB->numRows) || (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols)) { /* Set status as ARM_MATH_SIZE_MISMATCH */ status = ARM_MATH_SIZE_MISMATCH; } else #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ { /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */ /* row loop */ do { /* Output pointer is set to starting address of the row being processed */ px = pOut + i; /* For every row wise process, the column loop counter is to be initiated */ col = numColsB; /* For every row wise process, the pIn2 pointer is set ** to the starting address of the pSrcB data */ pIn2 = pSrcB->pData; /* column loop */ do { /* Set the variable sum, that acts as accumulator, to zero */ sum = 0; /* Initiate the pointer pIn1 to point to the starting address of pInA */ pIn1 = pInA; /* Matrix A columns number of MAC operations are to be performed */ colCnt = numColsA; /* matrix multiplication */ while(colCnt > 0u) { /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */ /* Perform the multiply-accumulates */ sum += (q63_t) * pIn1++ * *pIn2; pIn2 += numColsB; /* Decrement the loop counter */ colCnt--; } /* Convert the result from 2.62 to 1.31 format and store in destination buffer */ *px++ = (q31_t) (sum >> 31); /* Decrement the column loop counter */ col--; /* Update the pointer pIn2 to point to the starting address of the next column */ pIn2 = pInB + (numColsB - col); } while(col > 0u); #endif /* Update the pointer pInA to point to the starting address of the next row */ i = i + numColsB; pInA = pInA + numColsA; /* Decrement the row loop counter */ row--; } while(row > 0u); /* set status as ARM_MATH_SUCCESS */ status = ARM_MATH_SUCCESS; } /* Return to application */ return (status); } /** * @} end of MatrixMult group */

1137519-player

lib/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_q31.c

C

lgpl

9,162

/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_mat_scale_q15.c * * Description: Multiplies a Q15 matrix by a scalar. * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * * Version 0.0.5 2010/04/26 * incorporated review comments and updated with latest CMSIS layer * * Version 0.0.3 2010/03/10 * Initial version * -------------------------------------------------------------------- */ #include "arm_math.h" /** * @ingroup groupMatrix */ /** * @addtogroup MatrixScale * @{ */ /** * @brief Q15 matrix scaling. * @param[in] *pSrc points to input matrix * @param[in] scaleFract fractional portion of the scale factor * @param[in] shift number of bits to shift the result by * @param[out] *pDst points to output matrix structure * @return The function returns either * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking. * * @details * Scaling and Overflow Behavior: * \par * The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.15 format. * These are multiplied to yield a 2.30 intermediate result and this is shifted with saturation to 1.15 format. */ arm_status arm_mat_scale_q15( const arm_matrix_instance_q15 * pSrc, q15_t scaleFract, int32_t shift, arm_matrix_instance_q15 * pDst) { q15_t *pIn = pSrc->pData; /* input data matrix pointer */ q15_t *pOut = pDst->pData; /* output data matrix pointer */ uint32_t numSamples; /* total number of elements in the matrix */ int32_t totShift = 15 - shift; /* total shift to apply after scaling */ uint32_t blkCnt; /* loop counters */ arm_status status; /* status of matrix scaling */ #ifdef ARM_MATH_MATRIX_CHECK /* Check for matrix mismatch */ if((pSrc->numRows != pDst->numRows) || (pSrc->numCols != pDst->numCols)) { /* Set status as ARM_MATH_SIZE_MISMATCH */ status = ARM_MATH_SIZE_MISMATCH; } else #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ { /* Total number of samples in the input matrix */ numSamples = (uint32_t) pSrc->numRows * pSrc->numCols; #ifndef ARM_MATH_CM0 /* Run the below code for Cortex-M4 and Cortex-M3 */ /* Loop Unrolling */ blkCnt = numSamples >> 2; /* First part of the processing with loop unrolling. Compute 4 outputs at a time. ** a second loop below computes the remaining 1 to 3 samples. */ while(blkCnt > 0u) { /* C(m,n) = A(m,n) * k */ /* Scale, saturate and then store the results in the destination buffer. */ *pOut++ = (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> totShift, 16)); *pOut++ = (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> totShift, 16)); *pOut++ = (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> totShift, 16)); *pOut++ = (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> totShift, 16)); /* Decrement the numSamples loop counter */ blkCnt--; } /* If the numSamples is not a multiple of 4, compute any remaining output samples here. ** No loop unrolling is used. */ blkCnt = numSamples % 0x4u; #else /* Run the below code for Cortex-M0 */ /* Initialize blkCnt with number of samples */ blkCnt = numSamples; #endif /* #ifndef ARM_MATH_CM0 */ while(blkCnt > 0u) { /* C(m,n) = A(m,n) * k */ /* Scale, saturate and then store the results in the destination buffer. */ *pOut++ = (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> totShift, 16)); /* Decrement the numSamples loop counter */ blkCnt--; } /* Set status as ARM_MATH_SUCCESS */ status = ARM_MATH_SUCCESS; } /* Return to application */ return (status); } /** * @} end of MatrixScale group */

1137519-player

lib/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_q15.c

C

lgpl

4,838

/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_mat_trans_q15.c * * Description: Q15 matrix transpose. * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * * Version 0.0.5 2010/04/26 * incorporated review comments and updated with latest CMSIS layer * * Version 0.0.3 2010/03/10 * Initial version * -------------------------------------------------------------------- */ #include "arm_math.h" /** * @ingroup groupMatrix */ /** * @addtogroup MatrixTrans * @{ */ /* * @brief Q15 matrix transpose. * @param[in] *pSrc points to the input matrix * @param[out] *pDst points to the output matrix * @return The function returns either <code>ARM_MATH_SIZE_MISMATCH</code> * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking. */ arm_status arm_mat_trans_q15( const arm_matrix_instance_q15 * pSrc, arm_matrix_instance_q15 * pDst) { q15_t *pSrcA = pSrc->pData; /* input data matrix pointer */ q15_t *pOut = pDst->pData; /* output data matrix pointer */ uint16_t nRows = pSrc->numRows; /* number of nRows */ uint16_t nColumns = pSrc->numCols; /* number of nColumns */ uint16_t col, row = nRows, i = 0u; /* row and column loop counters */ arm_status status; /* status of matrix transpose */ #ifndef ARM_MATH_CM0 /* Run the below code for Cortex-M4 and Cortex-M3 */ q31_t in; /* variable to hold temporary output */ #ifdef ARM_MATH_MATRIX_CHECK /* Check for matrix mismatch condition */ if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows)) { /* Set status as ARM_MATH_SIZE_MISMATCH */ status = ARM_MATH_SIZE_MISMATCH; } else #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ { /* Matrix transpose by exchanging the rows with columns */ /* row loop */ do { /* Apply loop unrolling and exchange the columns with row elements */ col = nColumns >> 2u; /* The pointer pOut is set to starting address of the column being processed */ pOut = pDst->pData + i; /* First part of the processing with loop unrolling. Compute 4 outputs at a time. ** a second loop below computes the remaining 1 to 3 samples. */ while(col > 0u) { /* Read two elements from the row */ in = *__SIMD32(pSrcA)++; /* Unpack and store one element in the destination */ #ifndef ARM_MATH_BIG_ENDIAN *pOut = (q15_t) in; #else *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ /* Update the pointer pOut to point to the next row of the transposed matrix */ pOut += nRows; /* Unpack and store the second element in the destination */ #ifndef ARM_MATH_BIG_ENDIAN *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); #else *pOut = (q15_t) in; #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ /* Update the pointer pOut to point to the next row of the transposed matrix */ pOut += nRows; /* Read two elements from the row */ #ifndef ARM_MATH_BIG_ENDIAN in = *__SIMD32(pSrcA)++; #else in = *__SIMD32(pSrcA)++; #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ /* Unpack and store one element in the destination */ #ifndef ARM_MATH_BIG_ENDIAN *pOut = (q15_t) in; #else *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ /* Update the pointer pOut to point to the next row of the transposed matrix */ pOut += nRows; /* Unpack and store the second element in the destination */ #ifndef ARM_MATH_BIG_ENDIAN *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); #else *pOut = (q15_t) in; #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ /* Update the pointer pOut to point to the next row of the transposed matrix */ pOut += nRows; /* Decrement the column loop counter */ col--; } /* Perform matrix transpose for last 3 samples here. */ col = nColumns % 0x4u; #else /* Run the below code for Cortex-M0 */ #ifdef ARM_MATH_MATRIX_CHECK /* Check for matrix mismatch condition */ if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows)) { /* Set status as ARM_MATH_SIZE_MISMATCH */ status = ARM_MATH_SIZE_MISMATCH; } else #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ { /* Matrix transpose by exchanging the rows with columns */ /* row loop */ do { /* The pointer pOut is set to starting address of the column being processed */ pOut = pDst->pData + i; /* Initialize column loop counter */ col = nColumns; #endif /* #ifndef ARM_MATH_CM0 */ while(col > 0u) { /* Read and store the input element in the destination */ *pOut = *pSrcA++; /* Update the pointer pOut to point to the next row of the transposed matrix */ pOut += nRows; /* Decrement the column loop counter */ col--; } i++; /* Decrement the row loop counter */ row--; } while(row > 0u); /* set status as ARM_MATH_SUCCESS */ status = ARM_MATH_SUCCESS; } /* Return to application */ return (status); } /** * @} end of MatrixTrans group */

1137519-player

lib/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_q15.c

C

lgpl

6,390

/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_mat_trans_f32.c * * Description: Floating-point matrix transpose. * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * * Version 0.0.5 2010/04/26 * incorporated review comments and updated with latest CMSIS layer * * Version 0.0.3 2010/03/10 * Initial version * -------------------------------------------------------------------- */ /** * @defgroup MatrixTrans Matrix Transpose * * Tranposes a matrix. * Transposing an <code>M x N</code> matrix flips it around the center diagonal and results in an <code>N x M</code> matrix. * \image html MatrixTranspose.gif "Transpose of a 3 x 3 matrix" */ #include "arm_math.h" /** * @ingroup groupMatrix */ /** * @addtogroup MatrixTrans * @{ */ /** * @brief Floating-point matrix transpose. * @param[in] *pSrc points to the input matrix * @param[out] *pDst points to the output matrix * @return The function returns either <code>ARM_MATH_SIZE_MISMATCH</code> * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking. */ arm_status arm_mat_trans_f32( const arm_matrix_instance_f32 * pSrc, arm_matrix_instance_f32 * pDst) { float32_t *pIn = pSrc->pData; /* input data matrix pointer */ float32_t *pOut = pDst->pData; /* output data matrix pointer */ float32_t *px; /* Temporary output data matrix pointer */ uint16_t nRows = pSrc->numRows; /* number of rows */ uint16_t nColumns = pSrc->numCols; /* number of columns */ #ifndef ARM_MATH_CM0 /* Run the below code for Cortex-M4 and Cortex-M3 */ uint16_t blkCnt, i = 0u, row = nRows; /* loop counters */ arm_status status; /* status of matrix transpose */ #ifdef ARM_MATH_MATRIX_CHECK /* Check for matrix mismatch condition */ if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows)) { /* Set status as ARM_MATH_SIZE_MISMATCH */ status = ARM_MATH_SIZE_MISMATCH; } else #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ { /* Matrix transpose by exchanging the rows with columns */ /* row loop */ do { /* Loop Unrolling */ blkCnt = nColumns >> 2; /* The pointer px is set to starting address of the column being processed */ px = pOut + i; /* First part of the processing with loop unrolling. Compute 4 outputs at a time. ** a second loop below computes the remaining 1 to 3 samples. */ while(blkCnt > 0u) /* column loop */ { /* Read and store the input element in the destination */ *px = *pIn++; /* Update the pointer px to point to the next row of the transposed matrix */ px += nRows; /* Read and store the input element in the destination */ *px = *pIn++; /* Update the pointer px to point to the next row of the transposed matrix */ px += nRows; /* Read and store the input element in the destination */ *px = *pIn++; /* Update the pointer px to point to the next row of the transposed matrix */ px += nRows; /* Read and store the input element in the destination */ *px = *pIn++; /* Update the pointer px to point to the next row of the transposed matrix */ px += nRows; /* Decrement the column loop counter */ blkCnt--; } /* Perform matrix transpose for last 3 samples here. */ blkCnt = nColumns % 0x4u; while(blkCnt > 0u) { /* Read and store the input element in the destination */ *px = *pIn++; /* Update the pointer px to point to the next row of the transposed matrix */ px += nRows; /* Decrement the column loop counter */ blkCnt--; } #else /* Run the below code for Cortex-M0 */ uint16_t col, i = 0u, row = nRows; /* loop counters */ arm_status status; /* status of matrix transpose */ #ifdef ARM_MATH_MATRIX_CHECK /* Check for matrix mismatch condition */ if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows)) { /* Set status as ARM_MATH_SIZE_MISMATCH */ status = ARM_MATH_SIZE_MISMATCH; } else #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ { /* Matrix transpose by exchanging the rows with columns */ /* row loop */ do { /* The pointer px is set to starting address of the column being processed */ px = pOut + i; /* Initialize column loop counter */ col = nColumns; while(col > 0u) { /* Read and store the input element in the destination */ *px = *pIn++; /* Update the pointer px to point to the next row of the transposed matrix */ px += nRows; /* Decrement the column loop counter */ col--; } #endif /* #ifndef ARM_MATH_CM0 */ i++; /* Decrement the row loop counter */ row--; } while(row > 0u); /* row loop end */ /* Set status as ARM_MATH_SUCCESS */ status = ARM_MATH_SUCCESS; } /* Return to application */ return (status); } /** * @} end of MatrixTrans group */

1137519-player

lib/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_f32.c

C

lgpl

6,225

/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_mat_add_q15.c * * Description: Q15 matrix addition * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * * Version 0.0.5 2010/04/26 * incorporated review comments and updated with latest CMSIS layer * * Version 0.0.3 2010/03/10 * Initial version * -------------------------------------------------------------------- */ #include "arm_math.h" /** * @ingroup groupMatrix */ /** * @addtogroup MatrixAdd * @{ */ /** * @brief Q15 matrix addition. * @param[in] *pSrcA points to the first input matrix structure * @param[in] *pSrcB points to the second input matrix structure * @param[out] *pDst points to output matrix structure * @return The function returns either * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking. * * Scaling and Overflow Behavior: * \par * The function uses saturating arithmetic. * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated. */ arm_status arm_mat_add_q15( const arm_matrix_instance_q15 * pSrcA, const arm_matrix_instance_q15 * pSrcB, arm_matrix_instance_q15 * pDst) { q15_t *pInA = pSrcA->pData; /* input data matrix pointer A */ q15_t *pInB = pSrcB->pData; /* input data matrix pointer B */ q15_t *pOut = pDst->pData; /* output data matrix pointer */ uint16_t numSamples; /* total number of elements in the matrix */ uint32_t blkCnt; /* loop counters */ arm_status status; /* status of matrix addition */ #ifdef ARM_MATH_MATRIX_CHECK /* Check for matrix mismatch condition */ if((pSrcA->numRows != pSrcB->numRows) || (pSrcA->numCols != pSrcB->numCols) || (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols)) { /* Set status as ARM_MATH_SIZE_MISMATCH */ status = ARM_MATH_SIZE_MISMATCH; } else #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ { /* Total number of samples in the input matrix */ numSamples = (uint16_t) (pSrcA->numRows * pSrcA->numCols); #ifndef ARM_MATH_CM0 /* Run the below code for Cortex-M4 and Cortex-M3 */ /* Loop unrolling */ blkCnt = (uint32_t) numSamples >> 2u; /* First part of the processing with loop unrolling. Compute 4 outputs at a time. ** a second loop below computes the remaining 1 to 3 samples. */ while(blkCnt > 0u) { /* C(m,n) = A(m,n) + B(m,n) */ /* Add, Saturate and then store the results in the destination buffer. */ *__SIMD32(pOut)++ = __QADD16(*__SIMD32(pInA)++, *__SIMD32(pInB)++); *__SIMD32(pOut)++ = __QADD16(*__SIMD32(pInA)++, *__SIMD32(pInB)++); /* Decrement the loop counter */ blkCnt--; } /* If the blockSize is not a multiple of 4, compute any remaining output samples here. ** No loop unrolling is used. */ blkCnt = (uint32_t) numSamples % 0x4u; /* q15 pointers of input and output are initialized */ while(blkCnt > 0u) { /* C(m,n) = A(m,n) + B(m,n) */ /* Add, Saturate and then store the results in the destination buffer. */ *pOut++ = (q15_t) __QADD16(*pInA++, *pInB++); /* Decrement the loop counter */ blkCnt--; } #else /* Run the below code for Cortex-M0 */ /* Initialize blkCnt with number of samples */ blkCnt = (uint32_t) numSamples; /* q15 pointers of input and output are initialized */ while(blkCnt > 0u) { /* C(m,n) = A(m,n) + B(m,n) */ /* Add, Saturate and then store the results in the destination buffer. */ *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ + *pInB++), 16); /* Decrement the loop counter */ blkCnt--; } #endif /* #ifndef ARM_MATH_CM0 */ /* set status as ARM_MATH_SUCCESS */ status = ARM_MATH_SUCCESS; } /* Return to application */ return (status); } /** * @} end of MatrixAdd group */

1137519-player

lib/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_q15.c

C

lgpl

4,952

/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_mat_init_q31.c * * Description: Q31 matrix initialization. * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * * Version 0.0.5 2010/04/26 * incorporated review comments and updated with latest CMSIS layer * * Version 0.0.3 2010/03/10 * Initial version * -------------------------------------------------------------------------- */ #include "arm_math.h" /** * @ingroup groupMatrix */ /** * @defgroup MatrixInit Matrix Initialization * */ /** * @addtogroup MatrixInit * @{ */ /** * @brief Q31 matrix initialization. * @param[in,out] *S points to an instance of the floating-point matrix structure. * @param[in] nRows number of rows in the matrix. * @param[in] nColumns number of columns in the matrix. * @param[in] *pData points to the matrix data array. * @return none */ void arm_mat_init_q31( arm_matrix_instance_q31 * S, uint16_t nRows, uint16_t nColumns, q31_t * pData) { /* Assign Number of Rows */ S->numRows = nRows; /* Assign Number of Columns */ S->numCols = nColumns; /* Assign Data pointer */ S->pData = pData; } /** * @} end of MatrixInit group */

1137519-player

lib/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q31.c

C

lgpl

2,061

/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_mat_trans_q31.c * * Description: Q31 matrix transpose. * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * * Version 0.0.5 2010/04/26 * incorporated review comments and updated with latest CMSIS layer * * Version 0.0.3 2010/03/10 * Initial version * -------------------------------------------------------------------- */ #include "arm_math.h" /** * @ingroup groupMatrix */ /** * @addtogroup MatrixTrans * @{ */ /* * @brief Q31 matrix transpose. * @param[in] *pSrc points to the input matrix * @param[out] *pDst points to the output matrix * @return The function returns either <code>ARM_MATH_SIZE_MISMATCH</code> * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking. */ arm_status arm_mat_trans_q31( const arm_matrix_instance_q31 * pSrc, arm_matrix_instance_q31 * pDst) { q31_t *pIn = pSrc->pData; /* input data matrix pointer */ q31_t *pOut = pDst->pData; /* output data matrix pointer */ q31_t *px; /* Temporary output data matrix pointer */ uint16_t nRows = pSrc->numRows; /* number of nRows */ uint16_t nColumns = pSrc->numCols; /* number of nColumns */ #ifndef ARM_MATH_CM0 /* Run the below code for Cortex-M4 and Cortex-M3 */ uint16_t blkCnt, i = 0u, row = nRows; /* loop counters */ arm_status status; /* status of matrix transpose */ #ifdef ARM_MATH_MATRIX_CHECK /* Check for matrix mismatch condition */ if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows)) { /* Set status as ARM_MATH_SIZE_MISMATCH */ status = ARM_MATH_SIZE_MISMATCH; } else #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ { /* Matrix transpose by exchanging the rows with columns */ /* row loop */ do { /* Apply loop unrolling and exchange the columns with row elements */ blkCnt = nColumns >> 2u; /* The pointer px is set to starting address of the column being processed */ px = pOut + i; /* First part of the processing with loop unrolling. Compute 4 outputs at a time. ** a second loop below computes the remaining 1 to 3 samples. */ while(blkCnt > 0u) { /* Read and store the input element in the destination */ *px = *pIn++; /* Update the pointer px to point to the next row of the transposed matrix */ px += nRows; /* Read and store the input element in the destination */ *px = *pIn++; /* Update the pointer px to point to the next row of the transposed matrix */ px += nRows; /* Read and store the input element in the destination */ *px = *pIn++; /* Update the pointer px to point to the next row of the transposed matrix */ px += nRows; /* Read and store the input element in the destination */ *px = *pIn++; /* Update the pointer px to point to the next row of the transposed matrix */ px += nRows; /* Decrement the column loop counter */ blkCnt--; } /* Perform matrix transpose for last 3 samples here. */ blkCnt = nColumns % 0x4u; while(blkCnt > 0u) { /* Read and store the input element in the destination */ *px = *pIn++; /* Update the pointer px to point to the next row of the transposed matrix */ px += nRows; /* Decrement the column loop counter */ blkCnt--; } #else /* Run the below code for Cortex-M0 */ uint16_t col, i = 0u, row = nRows; /* loop counters */ arm_status status; /* status of matrix transpose */ #ifdef ARM_MATH_MATRIX_CHECK /* Check for matrix mismatch condition */ if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows)) { /* Set status as ARM_MATH_SIZE_MISMATCH */ status = ARM_MATH_SIZE_MISMATCH; } else #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ { /* Matrix transpose by exchanging the rows with columns */ /* row loop */ do { /* The pointer px is set to starting address of the column being processed */ px = pOut + i; /* Initialize column loop counter */ col = nColumns; while(col > 0u) { /* Read and store the input element in the destination */ *px = *pIn++; /* Update the pointer px to point to the next row of the transposed matrix */ px += nRows; /* Decrement the column loop counter */ col--; } #endif /* #ifndef ARM_MATH_CM0 */ i++; /* Decrement the row loop counter */ row--; } while(row > 0u); /* row loop end */ /* set status as ARM_MATH_SUCCESS */ status = ARM_MATH_SUCCESS; } /* Return to application */ return (status); } /** * @} end of MatrixTrans group */

1137519-player

lib/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_q31.c

C

lgpl

5,938

/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_mat_mult_fast_q15.c * * Description: Q15 matrix multiplication (fast variant) * * Target Processor: Cortex-M4/Cortex-M3 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * -------------------------------------------------------------------- */ #include "arm_math.h" /** * @ingroup groupMatrix */ /** * @addtogroup MatrixMult * @{ */ /** * @brief Q15 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4 * @param[in] *pSrcA points to the first input matrix structure * @param[in] *pSrcB points to the second input matrix structure * @param[out] *pDst points to output matrix structure * @param[in] *pState points to the array for storing intermediate results * @return The function returns either * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking. * * @details * Scaling and Overflow Behavior: * * \par * The difference between the function arm_mat_mult_q15() and this fast variant is that * the fast variant use a 32-bit rather than a 64-bit accumulator. * The result of each 1.15 x 1.15 multiplication is truncated to * 2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30 * format. Finally, the accumulator is saturated and converted to a 1.15 result. * * \par * The fast version has the same overflow behavior as the standard version but provides * less precision since it discards the low 16 bits of each multiplication result. * In order to avoid overflows completely the input signals must be scaled down. * Scale down one of the input matrices by log2(numColsA) bits to * avoid overflows, as a total of numColsA additions are computed internally for each * output element. * * \par * See <code>arm_mat_mult_q15()</code> for a slower implementation of this function * which uses 64-bit accumulation to provide higher precision. */ arm_status arm_mat_mult_fast_q15( const arm_matrix_instance_q15 * pSrcA, const arm_matrix_instance_q15 * pSrcB, arm_matrix_instance_q15 * pDst, q15_t * pState) { q31_t sum; /* accumulator */ q31_t in; /* Temporary variable to hold the input value */ q15_t *pSrcBT = pState; /* input data matrix pointer for transpose */ q15_t *pInA = pSrcA->pData; /* input data matrix pointer A of Q15 type */ q15_t *pInB = pSrcB->pData; /* input data matrix pointer B of Q15 type */ // q15_t *pDst = pDst->pData; /* output data matrix pointer */ q15_t *px; /* Temporary output data matrix pointer */ uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */ uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */ uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */ uint16_t numRowsB = pSrcB->numRows; /* number of rows of input matrix A */ uint16_t col, i = 0u, row = numRowsB, colCnt; /* loop counters */ arm_status status; /* status of matrix multiplication */ #ifdef ARM_MATH_MATRIX_CHECK /* Check for matrix mismatch condition */ if((pSrcA->numCols != pSrcB->numRows) || (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols)) { /* Set status as ARM_MATH_SIZE_MISMATCH */ status = ARM_MATH_SIZE_MISMATCH; } else #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ { /* Matrix transpose */ do { /* Apply loop unrolling and exchange the columns with row elements */ col = numColsB >> 2; /* The pointer px is set to starting address of the column being processed */ px = pSrcBT + i; /* First part of the processing with loop unrolling. Compute 4 outputs at a time. ** a second loop below computes the remaining 1 to 3 samples. */ while(col > 0u) { /* Read two elements from the row */ in = *__SIMD32(pInB)++; /* Unpack and store one element in the destination */ #ifndef ARM_MATH_BIG_ENDIAN *px = (q15_t) in; #else *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ /* Update the pointer px to point to the next row of the transposed matrix */ px += numRowsB; /* Unpack and store the second element in the destination */ #ifndef ARM_MATH_BIG_ENDIAN *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); #else *px = (q15_t) in; #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ /* Update the pointer px to point to the next row of the transposed matrix */ px += numRowsB; /* Read two elements from the row */ in = *__SIMD32(pInB)++; /* Unpack and store one element in the destination */ #ifndef ARM_MATH_BIG_ENDIAN *px = (q15_t) in; #else *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ /* Update the pointer px to point to the next row of the transposed matrix */ px += numRowsB; /* Unpack and store the second element in the destination */ #ifndef ARM_MATH_BIG_ENDIAN *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16); #else *px = (q15_t) in; #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ /* Update the pointer px to point to the next row of the transposed matrix */ px += numRowsB; /* Decrement the column loop counter */ col--; } /* If the columns of pSrcB is not a multiple of 4, compute any remaining output samples here. ** No loop unrolling is used. */ col = numColsB % 0x4u; while(col > 0u) { /* Read and store the input element in the destination */ *px = *pInB++; /* Update the pointer px to point to the next row of the transposed matrix */ px += numRowsB; /* Decrement the column loop counter */ col--; } i++; /* Decrement the row loop counter */ row--; } while(row > 0u); /* Reset the variables for the usage in the following multiplication process */ row = numRowsA; i = 0u; px = pDst->pData; /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */ /* row loop */ do { /* For every row wise process, the column loop counter is to be initiated */ col = numColsB; /* For every row wise process, the pIn2 pointer is set ** to the starting address of the transposed pSrcB data */ pInB = pSrcBT; /* column loop */ do { /* Set the variable sum, that acts as accumulator, to zero */ sum = 0; /* Apply loop unrolling and compute 2 MACs simultaneously. */ colCnt = numColsA >> 1; /* Initiate the pointer pIn1 to point to the starting address of the column being processed */ pInA = pSrcA->pData + i; /* matrix multiplication */ while(colCnt > 0u) { /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */ sum = __SMLAD(*__SIMD32(pInA)++, *__SIMD32(pInB)++, sum); /* Decrement the loop counter */ colCnt--; } /* process odd column samples */ if((numColsA & 0x1u) > 0u) { /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */ sum += ((q31_t) * pInA * (*pInB++)); } /* Saturate and store the result in the destination buffer */ *px = (q15_t) (sum >> 15); px++; /* Decrement the column loop counter */ col--; } while(col > 0u); i = i + numColsA; /* Decrement the row loop counter */ row--; } while(row > 0u); /* set status as ARM_MATH_SUCCESS */ status = ARM_MATH_SUCCESS; } /* Return to application */ return (status); } /** * @} end of MatrixMult group */

1137519-player

lib/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_fast_q15.c

C

lgpl

9,185

/* ---------------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_mat_add_f32.c * * Description: Floating-point matrix addition * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * * Version 0.0.5 2010/04/26 * incorporated review comments and updated with latest CMSIS layer * * Version 0.0.3 2010/03/10 * Initial version * -------------------------------------------------------------------------- */ #include "arm_math.h" /** * @ingroup groupMatrix */ /** * @defgroup MatrixAdd Matrix Addition * * Adds two matrices. * \image html MatrixAddition.gif "Addition of two 3 x 3 matrices" * * The functions check to make sure that * <code>pSrcA</code>, <code>pSrcB</code>, and <code>pDst</code> have the same * number of rows and columns. */ /** * @addtogroup MatrixAdd * @{ */ /** * @brief Floating-point matrix addition. * @param[in] *pSrcA points to the first input matrix structure * @param[in] *pSrcB points to the second input matrix structure * @param[out] *pDst points to output matrix structure * @return The function returns either * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking. */ arm_status arm_mat_add_f32( const arm_matrix_instance_f32 * pSrcA, const arm_matrix_instance_f32 * pSrcB, arm_matrix_instance_f32 * pDst) { float32_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */ float32_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */ float32_t *pOut = pDst->pData; /* output data matrix pointer */ uint32_t numSamples; /* total number of elements in the matrix */ uint32_t blkCnt; /* loop counters */ arm_status status; /* status of matrix addition */ #ifdef ARM_MATH_MATRIX_CHECK /* Check for matrix mismatch condition */ if((pSrcA->numRows != pSrcB->numRows) || (pSrcA->numCols != pSrcB->numCols) || (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols)) { /* Set status as ARM_MATH_SIZE_MISMATCH */ status = ARM_MATH_SIZE_MISMATCH; } else #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ { /* Total number of samples in the input matrix */ numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols; #ifndef ARM_MATH_CM0 /* Run the below code for Cortex-M4 and Cortex-M3 */ /* Loop unrolling */ blkCnt = numSamples >> 2u; /* First part of the processing with loop unrolling. Compute 4 outputs at a time. ** a second loop below computes the remaining 1 to 3 samples. */ while(blkCnt > 0u) { /* C(m,n) = A(m,n) + B(m,n) */ /* Add and then store the results in the destination buffer. */ *pOut++ = (*pIn1++) + (*pIn2++); *pOut++ = (*pIn1++) + (*pIn2++); *pOut++ = (*pIn1++) + (*pIn2++); *pOut++ = (*pIn1++) + (*pIn2++); /* Decrement the loop counter */ blkCnt--; } /* If the numSamples is not a multiple of 4, compute any remaining output samples here. ** No loop unrolling is used. */ blkCnt = numSamples % 0x4u; #else /* Run the below code for Cortex-M0 */ /* Initialize blkCnt with number of samples */ blkCnt = numSamples; #endif /* #ifndef ARM_MATH_CM0 */ while(blkCnt > 0u) { /* C(m,n) = A(m,n) + B(m,n) */ /* Add and then store the results in the destination buffer. */ *pOut++ = (*pIn1++) + (*pIn2++); /* Decrement the loop counter */ blkCnt--; } /* set status as ARM_MATH_SUCCESS */ status = ARM_MATH_SUCCESS; } /* Return to application */ return (status); } /** * @} end of MatrixAdd group */

1137519-player

lib/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_f32.c

C

lgpl

4,663

/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_mat_mult_f32.c * * Description: Floating-point matrix multiplication. * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * * Version 0.0.5 2010/04/26 * incorporated review comments and updated with latest CMSIS layer * * Version 0.0.3 2010/03/10 * Initial version * -------------------------------------------------------------------- */ #include "arm_math.h" /** * @ingroup groupMatrix */ /** * @defgroup MatrixMult Matrix Multiplication * * Multiplies two matrices. * * \image html MatrixMultiplication.gif "Multiplication of two 3 x 3 matrices" * Matrix multiplication is only defined if the number of columns of the * first matrix equals the number of rows of the second matrix. * Multiplying an <code>M x N</code> matrix with an <code>N x P</code> matrix results * in an <code>M x P</code> matrix. * When matrix size checking is enabled, the functions check: (1) that the inner dimensions of * <code>pSrcA</code> and <code>pSrcB</code> are equal; and (2) that the size of the output * matrix equals the outer dimensions of <code>pSrcA</code> and <code>pSrcB</code>. */ /** * @addtogroup MatrixMult * @{ */ /** * @brief Floating-point matrix multiplication. * @param[in] *pSrcA points to the first input matrix structure * @param[in] *pSrcB points to the second input matrix structure * @param[out] *pDst points to output matrix structure * @return The function returns either * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking. */ arm_status arm_mat_mult_f32( const arm_matrix_instance_f32 * pSrcA, const arm_matrix_instance_f32 * pSrcB, arm_matrix_instance_f32 * pDst) { float32_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */ float32_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */ float32_t *pInA = pSrcA->pData; /* input data matrix pointer A */ float32_t *pOut = pDst->pData; /* output data matrix pointer */ float32_t *px; /* Temporary output data matrix pointer */ float32_t sum; /* Accumulator */ uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */ uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */ uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */ #ifndef ARM_MATH_CM0 /* Run the below code for Cortex-M4 and Cortex-M3 */ uint16_t col, i = 0u, j, row = numRowsA, colCnt; /* loop counters */ arm_status status; /* status of matrix multiplication */ #ifdef ARM_MATH_MATRIX_CHECK /* Check for matrix mismatch condition */ if((pSrcA->numCols != pSrcB->numRows) || (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols)) { /* Set status as ARM_MATH_SIZE_MISMATCH */ status = ARM_MATH_SIZE_MISMATCH; } else #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ { /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */ /* row loop */ do { /* Output pointer is set to starting address of the row being processed */ px = pOut + i; /* For every row wise process, the column loop counter is to be initiated */ col = numColsB; /* For every row wise process, the pIn2 pointer is set ** to the starting address of the pSrcB data */ pIn2 = pSrcB->pData; j = 0u; /* column loop */ do { /* Set the variable sum, that acts as accumulator, to zero */ sum = 0.0f; /* Initiate the pointer pIn1 to point to the starting address of the column being processed */ pIn1 = pInA; /* Apply loop unrolling and compute 4 MACs simultaneously. */ colCnt = numColsA >> 2; /* matrix multiplication */ while(colCnt > 0u) { /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */ sum += *pIn1++ * (*pIn2); pIn2 += numColsB; sum += *pIn1++ * (*pIn2); pIn2 += numColsB; sum += *pIn1++ * (*pIn2); pIn2 += numColsB; sum += *pIn1++ * (*pIn2); pIn2 += numColsB; /* Decrement the loop count */ colCnt--; } /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here. ** No loop unrolling is used. */ colCnt = numColsA % 0x4u; while(colCnt > 0u) { /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */ sum += *pIn1++ * (*pIn2); pIn2 += numColsB; /* Decrement the loop counter */ colCnt--; } /* Store the result in the destination buffer */ *px++ = sum; /* Update the pointer pIn2 to point to the starting address of the next column */ j++; pIn2 = pSrcB->pData + j; /* Decrement the column loop counter */ col--; } while(col > 0u); #else /* Run the below code for Cortex-M0 */ float32_t *pInB = pSrcB->pData; /* input data matrix pointer B */ uint16_t col, i = 0u, row = numRowsA, colCnt; /* loop counters */ arm_status status; /* status of matrix multiplication */ #ifdef ARM_MATH_MATRIX_CHECK /* Check for matrix mismatch condition */ if((pSrcA->numCols != pSrcB->numRows) || (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols)) { /* Set status as ARM_MATH_SIZE_MISMATCH */ status = ARM_MATH_SIZE_MISMATCH; } else #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ { /* The following loop performs the dot-product of each row in pInA with each column in pInB */ /* row loop */ do { /* Output pointer is set to starting address of the row being processed */ px = pOut + i; /* For every row wise process, the column loop counter is to be initiated */ col = numColsB; /* For every row wise process, the pIn2 pointer is set ** to the starting address of the pSrcB data */ pIn2 = pSrcB->pData; /* column loop */ do { /* Set the variable sum, that acts as accumulator, to zero */ sum = 0.0f; /* Initialize the pointer pIn1 to point to the starting address of the row being processed */ pIn1 = pInA; /* Matrix A columns number of MAC operations are to be performed */ colCnt = numColsA; while(colCnt > 0u) { /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */ sum += *pIn1++ * (*pIn2); pIn2 += numColsB; /* Decrement the loop counter */ colCnt--; } /* Store the result in the destination buffer */ *px++ = sum; /* Decrement the column loop counter */ col--; /* Update the pointer pIn2 to point to the starting address of the next column */ pIn2 = pInB + (numColsB - col); } while(col > 0u); #endif /* #ifndef ARM_MATH_CM0 */ /* Update the pointer pInA to point to the starting address of the next row */ i = i + numColsB; pInA = pInA + numColsA; /* Decrement the row loop counter */ row--; } while(row > 0u); /* Set status as ARM_MATH_SUCCESS */ status = ARM_MATH_SUCCESS; } /* Return to application */ return (status); } /** * @} end of MatrixMult group */

1137519-player

lib/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_f32.c

C

lgpl

8,719

/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_mat_sub_q15.c * * Description: Q15 Matrix subtraction * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * * Version 0.0.5 2010/04/26 * incorporated review comments and updated with latest CMSIS layer * * Version 0.0.3 2010/03/10 * Initial version * -------------------------------------------------------------------- */ #include "arm_math.h" /** * @ingroup groupMatrix */ /** * @addtogroup MatrixSub * @{ */ /** * @brief Q15 matrix subtraction. * @param[in] *pSrcA points to the first input matrix structure * @param[in] *pSrcB points to the second input matrix structure * @param[out] *pDst points to output matrix structure * @return The function returns either * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking. * * Scaling and Overflow Behavior: * \par * The function uses saturating arithmetic. * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated. */ arm_status arm_mat_sub_q15( const arm_matrix_instance_q15 * pSrcA, const arm_matrix_instance_q15 * pSrcB, arm_matrix_instance_q15 * pDst) { q15_t *pInA = pSrcA->pData; /* input data matrix pointer A */ q15_t *pInB = pSrcB->pData; /* input data matrix pointer B */ q15_t *pOut = pDst->pData; /* output data matrix pointer */ uint32_t numSamples; /* total number of elements in the matrix */ uint32_t blkCnt; /* loop counters */ arm_status status; /* status of matrix subtraction */ #ifdef ARM_MATH_MATRIX_CHECK /* Check for matrix mismatch condition */ if((pSrcA->numRows != pSrcB->numRows) || (pSrcA->numCols != pSrcB->numCols) || (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols)) { /* Set status as ARM_MATH_SIZE_MISMATCH */ status = ARM_MATH_SIZE_MISMATCH; } else #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ { /* Total number of samples in the input matrix */ numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols; #ifndef ARM_MATH_CM0 /* Run the below code for Cortex-M4 and Cortex-M3 */ /* Apply loop unrolling */ blkCnt = numSamples >> 2u; /* First part of the processing with loop unrolling. Compute 4 outputs at a time. ** a second loop below computes the remaining 1 to 3 samples. */ while(blkCnt > 0u) { /* C(m,n) = A(m,n) - B(m,n) */ /* Subtract, Saturate and then store the results in the destination buffer. */ *__SIMD32(pOut)++ = __QSUB16(*__SIMD32(pInA)++, *__SIMD32(pInB)++); *__SIMD32(pOut)++ = __QSUB16(*__SIMD32(pInA)++, *__SIMD32(pInB)++); /* Decrement the loop counter */ blkCnt--; } /* If the blockSize is not a multiple of 4, compute any remaining output samples here. ** No loop unrolling is used. */ blkCnt = numSamples % 0x4u; while(blkCnt > 0u) { /* C(m,n) = A(m,n) - B(m,n) */ /* Subtract and then store the results in the destination buffer. */ *pOut++ = (q15_t) __QSUB16(*pInA++, *pInB++); /* Decrement the loop counter */ blkCnt--; } #else /* Run the below code for Cortex-M0 */ /* Initialize blkCnt with number of samples */ blkCnt = numSamples; while(blkCnt > 0u) { /* C(m,n) = A(m,n) - B(m,n) */ /* Subtract and then store the results in the destination buffer. */ *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ - *pInB++), 16); /* Decrement the loop counter */ blkCnt--; } #endif /* #ifndef ARM_MATH_CM0 */ /* Set status as ARM_MATH_SUCCESS */ status = ARM_MATH_SUCCESS; } /* Return to application */ return (status); } /** * @} end of MatrixSub group */

1137519-player

lib/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_q15.c

C

lgpl

4,803

/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 15. July 2011 * $Revision: V1.0.10 * * Project: CMSIS DSP Library * Title: arm_mat_init_q15.c * * Description: Q15 matrix initialization. * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Version 1.0.10 2011/7/15 * Big Endian support added and Merged M0 and M3/M4 Source code. * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.2 2010/11/11 * Documentation updated. * * Version 1.0.1 2010/10/05 * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 * Production release and review comments incorporated. * * Version 0.0.5 2010/04/26 * incorporated review comments and updated with latest CMSIS layer * * Version 0.0.3 2010/03/10 * Initial version * -------------------------------------------------------------------------- */ #include "arm_math.h" /** * @ingroup groupMatrix */ /** * @addtogroup MatrixInit * @{ */ /** * @brief Q15 matrix initialization. * @param[in,out] *S points to an instance of the floating-point matrix structure. * @param[in] nRows number of rows in the matrix. * @param[in] nColumns number of columns in the matrix. * @param[in] *pData points to the matrix data array. * @return none */ void arm_mat_init_q15( arm_matrix_instance_q15 * S, uint16_t nRows, uint16_t nColumns, q15_t * pData) { /* Assign Number of Rows */ S->numRows = nRows; /* Assign Number of Columns */ S->numCols = nColumns; /* Assign Data pointer */ S->pData = pData; } /** * @} end of MatrixInit group */

1137519-player

lib/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q15.c

C

lgpl

1,995

;/**************************************************************************//** ; * @file startup_ARMCM4.s ; * @brief CMSIS Cortex-M4 Core Device Startup File ; * for CM4 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; * ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA |.text|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP MemManage_Handler\ PROC EXPORT MemManage_Handler [WEAK] B . ENDP BusFault_Handler\ PROC EXPORT BusFault_Handler [WEAK] B . ENDP UsageFault_Handler\ PROC EXPORT UsageFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP DebugMon_Handler\ PROC EXPORT DebugMon_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END

1137519-player

lib/CMSIS/DSP_Lib/Examples/arm_graphic_equalizer_example/ARM/startup_ARMCM4.s

Unix Assembly

lgpl

5,000

;/**************************************************************************//** ; * @file startup_ARMCM3.s ; * @brief CMSIS Cortex-M3 Core Device Startup File ; * for CM3 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; * ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA |.text|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP MemManage_Handler\ PROC EXPORT MemManage_Handler [WEAK] B . ENDP BusFault_Handler\ PROC EXPORT BusFault_Handler [WEAK] B . ENDP UsageFault_Handler\ PROC EXPORT UsageFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP DebugMon_Handler\ PROC EXPORT DebugMon_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END

1137519-player

lib/CMSIS/DSP_Lib/Examples/arm_graphic_equalizer_example/ARM/startup_ARMCM3.s

Unix Assembly

lgpl

5,000

;/**************************************************************************//** ; * @file startup_ARMCM0.s ; * @brief CMSIS Cortex-M0 Core Device Startup File ; * for CM0 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; * ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA |.text|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END

1137519-player

lib/CMSIS/DSP_Lib/Examples/arm_graphic_equalizer_example/ARM/startup_ARMCM0.s

Motorola 68K Assembly

lgpl

4,363

/**************************************************************************//** * @file system_ARMCM0.c * @brief CMSIS Cortex-M0 Device System Source File * for CM0 Device Series * @version V1.05 * @date 26. July 2011 * * @note * Copyright (C) 2010-2011 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * ******************************************************************************/ #include "ARMCM0.h" /*---------------------------------------------------------------------------- Define clocks *----------------------------------------------------------------------------*/ #define __HSI ( 8000000UL) #define __XTAL (12000000UL) /* Oscillator frequency */ #define __SYSTEM_CLOCK (4*__XTAL) /*---------------------------------------------------------------------------- Clock Variable definitions *----------------------------------------------------------------------------*/ uint32_t SystemCoreClock = __SYSTEM_CLOCK;/*!< System Clock Frequency (Core Clock)*/ /*---------------------------------------------------------------------------- Clock functions *----------------------------------------------------------------------------*/ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */ { SystemCoreClock = __SYSTEM_CLOCK; } /** * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System. */ void SystemInit (void) { SystemCoreClock = __SYSTEM_CLOCK; #ifdef __USE_GPIO ARM_GPIO0->DATA[0].WORD = 0; ARM_GPIO0->IE = 0; ARM_GPIO0->DIR = 0xff83; ARM_GPIO1->DATA[0].WORD = 0; ARM_GPIO1->IE = 0; ARM_GPIO1->DIR = 0; ARM_GPIO2->DATA[0].WORD = 0; ARM_GPIO2->IE = 0; ARM_GPIO2->DIR = 0; #endif }

1137519-player

lib/CMSIS/DSP_Lib/Examples/arm_graphic_equalizer_example/system_ARMCM0.c

C

lgpl

2,488

/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 29. November 2010 * $Revision: V1.0.3 * * Project: CMSIS DSP Library * Title: arm_graphic_equalizer_example_q31.c * * Description: Example showing an audio graphic equalizer constructed * out of Biquad filters. * * Target Processor: Cortex-M4/Cortex-M3 * * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.1 2010/10/05 KK * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 KK * Production release and review comments incorporated. * ------------------------------------------------------------------- */ /** * @ingroup groupExamples */ /** * @defgroup GEQ5Band Graphic Audio Equalizer Example * * \par Description: * \par * This example demonstrates how a 5-band graphic equalizer can be constructed * using the Biquad cascade functions. * A graphic equalizer is used in audio applications to vary the tonal quality * of the audio. * * \par Block Diagram: * \par * The design is based on a cascade of 5 filter sections. * \image html GEQ_signalflow.gif * Each filter section is 4th order and consists of a cascade of two Biquads. * Each filter has a nominal gain of 0 dB (1.0 in linear units) and * boosts or cuts signals within a specific frequency range. * The edge frequencies between the 5 bands are 100, 500, 2000, and 6000 Hz. * Each band has an adjustable boost or cut in the range of +/- 9 dB. * For example, the band that extends from 500 to 2000 Hz has the response shown below: * \par * \image html GEQ_bandresponse.gif * \par * With 1 dB steps, each filter has a total of 19 different settings. * The filter coefficients for all possible 19 settings were precomputed * in MATLAB and stored in a table. With 5 different tables, there are * a total of 5 x 19 = 95 different 4th order filters. * All 95 responses are shown below: * \par * \image html GEQ_allbandresponse.gif * \par * Each 4th order filter has 10 coefficents for a grand total of 950 different filter * coefficients that must be tabulated. The input and output data is in Q31 format. * For better noise performance, the two low frequency bands are implemented using the high * precision 32x64-bit Biquad filters. The remaining 3 high frequency bands use standard * 32x32-bit Biquad filters. The input signal used in the example is a logarithmic chirp. * \par * \image html GEQ_inputchirp.gif * \par * The array <code>bandGains</code> specifies the gain in dB to apply in each band. * For example, if <code>bandGains={0, -3, 6, 4, -6};</code> then the output signal will be: * \par * \image html GEQ_outputchirp.gif * \par * \note The output chirp signal follows the gain or boost of each band. * \par * * \par Variables Description: * \par * \li \c testInput_f32 points to the input data * \li \c testRefOutput_f32 points to the reference output data * \li \c testOutput points to the test output data * \li \c inputQ31 temporary input buffer * \li \c outputQ31 temporary output buffer * \li \c biquadStateBand1Q31 points to state buffer for band1 * \li \c biquadStateBand2Q31 points to state buffer for band2 * \li \c biquadStateBand3Q31 points to state buffer for band3 * \li \c biquadStateBand4Q31 points to state buffer for band4 * \li \c biquadStateBand5Q31 points to state buffer for band5 * \li \c coeffTable points to coefficient buffer for all bands * \li \c gainDB gain buffer which has gains applied for all the bands * * \par CMSIS DSP Software Library Functions Used: * \par * - arm_biquad_cas_df1_32x64_init_q31() * - arm_biquad_cas_df1_32x64_q31() * - arm_biquad_cascade_df1_init_q31() * - arm_biquad_cascade_df1_q31() * - arm_scale_q31() * - arm_scale_f32() * - arm_float_to_q31() * - arm_q31_to_float() * * Refer * \link arm_graphic_equalizer_example_q31.c \endlink * */ /** \example arm_graphic_equalizer_example_q31.c */ #include "arm_math.h" #include "math_helper.h" /* Length of the overall data in the test */ #define TESTLENGTH 320 /* Block size for the underlying processing */ #define BLOCKSIZE 32 /* Total number of blocks to run */ #define NUMBLOCKS (TESTLENGTH/BLOCKSIZE) /* Number of 2nd order Biquad stages per filter */ #define NUMSTAGES 2 #define SNR_THRESHOLD_F32 98 /* ------------------------------------------------------------------- * External Declarations for Input and Output buffers * ------------------------------------------------------------------- */ extern float32_t testInput_f32[TESTLENGTH]; static float32_t testOutput[TESTLENGTH]; extern float32_t testRefOutput_f32[TESTLENGTH]; /* ---------------------------------------------------------------------- ** Q31 state buffers for Band1, Band2, Band3, Band4, Band5 ** ------------------------------------------------------------------- */ static q63_t biquadStateBand1Q31[4 * 2]; static q63_t biquadStateBand2Q31[4 * 2]; static q31_t biquadStateBand3Q31[4 * 2]; static q31_t biquadStateBand4Q31[4 * 2]; static q31_t biquadStateBand5Q31[4 * 2]; /* ---------------------------------------------------------------------- ** Q31 input and output buffers ** ------------------------------------------------------------------- */ q31_t inputQ31[BLOCKSIZE]; q31_t outputQ31[BLOCKSIZE]; /* ---------------------------------------------------------------------- ** Entire coefficient table. There are 10 coefficients per 4th order Biquad ** cascade filter. The first 10 coefficients correspond to the -9 dB gain ** setting of band 1; the next 10 coefficient correspond to the -8 dB gain ** setting of band 1; and so on. There are 10*19=190 coefficients in total ** for band 1 (gains = -9, -8, -7, ..., 9). After this come the 190 coefficients ** for band 2. ** ** The coefficients are in Q29 format and require a postShift of 2. ** ------------------------------------------------------------------- */ const q31_t coeffTable[950] = { /* Band 1, -9 dB gain */ 535576962, -1071153923, 535576962, 1073741824, -536870912, 535576962, -1063501998, 527979313, 1060865294, -524146981, /* Band 1, -8 dB gain */ 535723226, -1071446451, 535723226, 1073741824, -536870912, 535723226, -1063568947, 527903217, 1061230578, -524503778, 535868593, -1071737186, 535868593, 1073741824, -536870912, 535868593, -1063627467, 527819780, 1061585502, -524850686, 536013181, -1072026363, 536013181, 1073741824, -536870912, 536013181, -1063677598, 527728935, 1061930361, -525187972, 536157109, -1072314217, 536157109, 1073741824, -536870912, 536157109, -1063719372, 527630607, 1062265438, -525515897, 536300492, -1072600983, 536300492, 1073741824, -536870912, 536300492, -1063752815, 527524720, 1062591011, -525834716, 536443447, -1072886894, 536443447, 1073741824, -536870912, 536443447, -1063777945, 527411186, 1062907350, -526144676, 536586091, -1073172183, 536586091, 1073741824, -536870912, 536586091, -1063794775, 527289917, 1063214717, -526446017, 536728541, -1073457082, 536728541, 1073741824, -536870912, 536728541, -1063803308, 527160815, 1063513366, -526738975, 536870912, -1073741824, 536870912, 1073741824, -536870912, 536870912, -1063803543, 527023777, 1063803543, -527023777, 537013321, -1074026642, 537013321, 1073741824, -536870912, 537013321, -1063795470, 526878696, 1064085490, -527300648, 537155884, -1074311768, 537155884, 1073741824, -536870912, 537155884, -1063779073, 526725455, 1064359439, -527569803, 537298718, -1074597435, 537298718, 1073741824, -536870912, 537298718, -1063754328, 526563934, 1064625617, -527831454, 537441939, -1074883878, 537441939, 1073741824, -536870912, 537441939, -1063721205, 526394005, 1064884245, -528085806, 537585666, -1075171331, 537585666, 1073741824, -536870912, 537585666, -1063679666, 526215534, 1065135536, -528333059, 537730015, -1075460030, 537730015, 1073741824, -536870912, 537730015, -1063629666, 526028380, 1065379699, -528573409, 537875106, -1075750212, 537875106, 1073741824, -536870912, 537875106, -1063571152, 525832396, 1065616936, -528807045, 538021057, -1076042114, 538021057, 1073741824, -536870912, 538021057, -1063504065, 525627429, 1065847444, -529034151, 538167989, -1076335977, 538167989, 1073741824, -536870912, 538167989, -1063428338, 525413317, 1066071412, -529254907, /* Band 2, -9 dB gain */ 531784976, -1055497692, 523873415, 1066213307, -529420241, 531784976, -1040357886, 509828014, 1028908252, -494627367, /* Band 2, -8 dB gain */ 532357636, -1056601982, 524400080, 1066115844, -529326645, 532357636, -1040623406, 509562600, 1030462237, -496062122, 532927392, -1057707729, 524931110, 1066024274, -529239070, 532927392, -1040848253, 509262081, 1031969246, -497457090, 533494678, -1058816094, 525467240, 1065939047, -529157961, 533494678, -1041032161, 508925950, 1033429976, -498812573, 534059929, -1059928204, 526009170, 1065860582, -529083734, 534059929, -1041174868, 508553717, 1034845124, -500128887, 534623580, -1061045148, 526557561, 1065789260, -529016764, 534623580, -1041276126, 508144920, 1036215393, -501406373, 535186068, -1062167969, 527113032, 1065725420, -528957385, 535186068, -1041335703, 507699125, 1037541500, -502645399, 535747827, -1063297666, 527676151, 1065669351, -528905879, 535747827, -1041353386, 507215934, 1038824183, -503846368, 536309295, -1064435183, 528247436, 1065621289, -528862476, 536309295, -1041328990, 506694984, 1040064203, -505009724, 536870912, -1065581413, 528827349, 1065581413, -528827349, 536870912, -1041262354, 506135953, 1041262354, -506135953, 537433117, -1066737194, 529416295, 1065549847, -528800610, 537433117, -1041153346, 505538564, 1042419457, -507225588, 537996352, -1067903307, 530014622, 1065526651, -528782316, 537996352, -1041001864, 504902578, 1043536370, -508279208, 538561061, -1069080480, 530622620, 1065511830, -528772462, 538561061, -1040807833, 504227800, 1044613981, -509297437, 539127690, -1070269387, 531240527, 1065505333, -528770987, 539127690, -1040571205, 503514074, 1045653211, -510280946, 539696690, -1071470656, 531868525, 1065507054, -528777778, 539696690, -1040291951, 502761277, 1046655011, -511230450, 540268512, -1072684867, 532506750, 1065516837, -528792672, 540268512, -1039970063, 501969320, 1047620358, -512146700, 540843613, -1073912567, 533155297, 1065534483, -528815459, 540843613, -1039605542, 501138139, 1048550251, -513030484, 541422451, -1075154268, 533814224, 1065559750, -528845892, 541422451, -1039198394, 500267687, 1049445708, -513882621, 542005489, -1076410460, 534483561, 1065592362, -528883686, 542005489, -1038748624, 499357932, 1050307760, -514703956, 518903861, -1001986830, 486725277, 1037235801, -502367695, 518903861, -945834422, 446371043, 902366163, -400700571, 520899989, -1005630916, 488289126, 1036926846, -502147311, 520899989, -946490935, 445581846, 907921945, -404936158, 522893209, -1009290002, 489869792, 1036650484, -501961419, 522893209, -947006359, 444685310, 913306106, -409075225, 524884763, -1012968199, 491470256, 1036407567, -501810737, 524884763, -947377809, 443679533, 918521018, -413116221, 526875910, -1016669649, 493093518, 1036198712, -501695739, 526875910, -947602324, 442562672, 923569247, -417057897, 528867927, -1020398503, 494742575, 1036024293, -501616651, 528867927, -947676875, 441332970, 928453558, -420899319, 530862111, -1024158905, 496420407, 1035884447, -501573457, 530862111, -947598385, 439988777, 933176909, -424639872, 532859778, -1027954970, 498129955, 1035779077, -501565907, 532859778, -947363742, 438528571, 937742446, -428279254, 534862260, -1031790763, 499874098, 1035707863, -501593525, 534862260, -946969823, 436950987, 942153486, -431817474, 536870912, -1035670279, 501655630, 1035670279, -501655630, 536870912, -946413508, 435254839, 946413508, -435254839, 538887107, -1039597419, 503477238, 1035665609, -501751354, 538887107, -945691703, 433439146, 950526127, -438591937, 540912240, -1043575967, 505341475, 1035692963, -501879659, 540912240, -944801359, 431503152, 954495080, -441829621, 542947726, -1047609569, 507250741, 1035751307, -502039364, 542947726, -943739490, 429446349, 958324201, -444968987, 544995000, -1051701717, 509207261, 1035839473, -502229165, 544995000, -942503190, 427268492, 962017400, -448011351, 547055523, -1055855728, 511213065, 1035956193, -502447657, 547055523, -941089647, 424969617, 965578640, -450958226, 549130774, -1060074734, 513269973, 1036100110, -502693359, 549130774, -939496155, 422550049, 969011913, -453811298, 551222259, -1064361672, 515379585, 1036269804, -502964731, 551222259, -937720119, 420010407, 972321228, -456572401, 553331507, -1068719280, 517543273, 1036463810, -503260192, 553331507, -935759057, 417351601, 975510582, -459243495, 555460072, -1073150100, 519762181, 1036680633, -503578144, 555460072, -933610600, 414574832, 978583948, -461826644, 494084017, -851422604, 404056273, 930151631, -423619864, 494084017, -673714108, 339502486, 561843007, -265801750, 498713542, -859177141, 406587077, 929211656, -423786402, 498713542, -673274906, 338185129, 573719128, -272222942, 503369016, -867012190, 409148384, 928362985, -424054784, 503369016, -672533059, 336693984, 585290277, -278599028, 508052536, -874935599, 411746438, 927604291, -424422151, 508052536, -671478538, 335026905, 596558312, -284920289, 512766286, -882955583, 414387826, 926933782, -424885216, 512766286, -670100998, 333182045, 607525792, -291177811, 517512534, -891080712, 417079474, 926349262, -425440318, 517512534, -668389789, 331157902, 618195914, -297363485, 522293635, -899319903, 419828635, 925848177, -426083491, 522293635, -666333963, 328953368, 628572440, -303470012, 527112032, -907682405, 422642886, 925427679, -426810526, 527112032, -663922286, 326567785, 638659631, -309490882, 531970251, -916177781, 425530105, 925084675, -427617023, 531970251, -661143261, 324000998, 648462180, -315420352, 536870912, -924815881, 428498454, 924815881, -428498454, 536870912, -657985147, 321253420, 657985147, -321253420, 541816719, -933606817, 431556352, 924617870, -429450209, 541816719, -654435997, 318326093, 667233900, -326985786, 546810467, -942560921, 434712438, 924487114, -430467639, 546810467, -650483688, 315220754, 676214053, -332613816, 551855042, -951688708, 437975532, 924420027, -431546101, 551855042, -646115970, 311939896, 684931422, -338134495, 556953421, -961000826, 441354588, 924413001, -432680993, 556953421, -641320513, 308486839, 693391970, -343545389, 562108672, -970508005, 444858642, 924462435, -433867780, 562108672, -636084967, 304865786, 701601770, -348844597, 567323959, -980220994, 448496743, 924564764, -435102022, 567323959, -630397020, 301081886, 709566963, -354030710, 572602539, -990150500, 452277894, 924716482, -436379394, 572602539, -624244471, 297141281, 717293726, -359102767, 577947763, -1000307125, 456210977, 924914158, -437695705, 577947763, -617615296, 293051155, 724788245, -364060214, 583363084, -1010701292, 460304674, 925154455, -439046908, 583363084, -610497723, 288819761, 732056685, -368902865, 387379495, -506912469, 196933274, 840112184, -347208270, 387379495, 506912469, 196933274, -840112184, -347208270, 401658082, -532275898, 207149427, 833765363, -343175316, 401658082, 532275898, 207149427, -833765363, -343175316, 416472483, -558722695, 217902617, 827270154, -339107319, 416472483, 558722695, 217902617, -827270154, -339107319, 431841949, -586290861, 229212798, 820624988, -335007540, 431841949, 586290861, 229212798, -820624988, -335007540, 447786335, -615019650, 241100489, 813828443, -330879528, 447786335, 615019650, 241100489, -813828443, -330879528, 464326111, -644949597, 253586805, 806879270, -326727141, 464326111, 644949597, 253586805, -806879270, -326727141, 481482377, -676122557, 266693475, 799776409, -322554559, 481482377, 676122557, 266693475, -799776409, -322554559, 499276882, -708581728, 280442865, 792519013, -318366296, 499276882, 708581728, 280442865, -792519013, -318366296, 517732032, -742371685, 294857996, 785106465, -314167221, 517732032, 742371685, 294857996, -785106465, -314167221, 536870912, -777538408, 309962566, 777538408, -309962566, 536870912, 777538408, 309962566, -777538408, -309962566, 556717294, -814129313, 325780968, 769814766, -305757943, 556717294, 814129313, 325780968, -769814766, -305757943, 577295658, -852193284, 342338310, 761935777, -301559360, 577295658, 852193284, 342338310, -761935777, -301559360, 598631206, -891780698, 359660433, 753902014, -297373230, 598631206, 891780698, 359660433, -753902014, -297373230, 620749877, -932943463, 377773927, 745714425, -293206383, 620749877, 932943463, 377773927, -745714425, -293206383, 643678365, -975735041, 396706151, 737374355, -289066077, 643678365, 975735041, 396706151, -737374355, -289066077, 667444134, -1020210487, 416485252, 728883588, -284960004, 667444134, 1020210487, 416485252, -728883588, -284960004, 692075438, -1066426476, 437140179, 720244375, -280896294, 692075438, 1066426476, 437140179, -720244375, -280896294, 717601336, -1114441339, 458700704, 711459472, -276883515, 717601336, 1114441339, 458700704, -711459472, -276883515, 744051710, -1164315096, 481197437, 702532174, -272930673, 744051710, 1164315096, 481197437, -702532174, -272930673 }; /* ---------------------------------------------------------------------- ** Desired gains, in dB, per band ** ------------------------------------------------------------------- */ int gainDB[5] = {0, -3, 6, 4, -6}; float32_t snr; /* ---------------------------------------------------------------------- * Graphic equalizer Example * ------------------------------------------------------------------- */ int32_t main(void) { float32_t *inputF32, *outputF32; arm_biquad_cas_df1_32x64_ins_q31 S1; arm_biquad_cas_df1_32x64_ins_q31 S2; arm_biquad_casd_df1_inst_q31 S3; arm_biquad_casd_df1_inst_q31 S4; arm_biquad_casd_df1_inst_q31 S5; int i; int32_t status; inputF32 = &testInput_f32[0]; outputF32 = &testOutput[0]; /* Initialize the state and coefficient buffers for all Biquad sections */ arm_biquad_cas_df1_32x64_init_q31(&S1, NUMSTAGES, (q31_t *) &coeffTable[190*0 + 10*(gainDB[0] + 9)], &biquadStateBand1Q31[0], 2); arm_biquad_cas_df1_32x64_init_q31(&S2, NUMSTAGES, (q31_t *) &coeffTable[190*1 + 10*(gainDB[1] + 9)], &biquadStateBand2Q31[0], 2); arm_biquad_cascade_df1_init_q31(&S3, NUMSTAGES, (q31_t *) &coeffTable[190*2 + 10*(gainDB[2] + 9)], &biquadStateBand3Q31[0], 2); arm_biquad_cascade_df1_init_q31(&S4, NUMSTAGES, (q31_t *) &coeffTable[190*3 + 10*(gainDB[3] + 9)], &biquadStateBand4Q31[0], 2); arm_biquad_cascade_df1_init_q31(&S5, NUMSTAGES, (q31_t *) &coeffTable[190*4 + 10*(gainDB[4] + 9)], &biquadStateBand5Q31[0], 2); /* Call the process functions and needs to change filter coefficients for varying the gain of each band */ for(i=0; i < NUMBLOCKS; i++) { /* ---------------------------------------------------------------------- ** Convert block of input data from float to Q31 ** ------------------------------------------------------------------- */ arm_float_to_q31(inputF32 + (i*BLOCKSIZE), inputQ31, BLOCKSIZE); /* ---------------------------------------------------------------------- ** Scale down by 1/8. This provides additional headroom so that the ** graphic EQ can apply gain. ** ------------------------------------------------------------------- */ arm_scale_q31(inputQ31, 0x7FFFFFFF, -3, inputQ31, BLOCKSIZE); /* ---------------------------------------------------------------------- ** Call the Q31 Biquad Cascade DF1 32x64 process function for band1, band2 ** ------------------------------------------------------------------- */ arm_biquad_cas_df1_32x64_q31(&S1, inputQ31, outputQ31, BLOCKSIZE); arm_biquad_cas_df1_32x64_q31(&S2, outputQ31, outputQ31, BLOCKSIZE); /* ---------------------------------------------------------------------- ** Call the Q31 Biquad Cascade DF1 process function for band3, band4, band5 ** ------------------------------------------------------------------- */ arm_biquad_cascade_df1_q31(&S3, outputQ31, outputQ31, BLOCKSIZE); arm_biquad_cascade_df1_q31(&S4, outputQ31, outputQ31, BLOCKSIZE); arm_biquad_cascade_df1_q31(&S5, outputQ31, outputQ31, BLOCKSIZE); /* ---------------------------------------------------------------------- ** Convert Q31 result back to float ** ------------------------------------------------------------------- */ arm_q31_to_float(outputQ31, outputF32 + (i * BLOCKSIZE), BLOCKSIZE); /* ---------------------------------------------------------------------- ** Scale back up ** ------------------------------------------------------------------- */ arm_scale_f32(outputF32 + (i * BLOCKSIZE), 8.0f, outputF32 + (i * BLOCKSIZE), BLOCKSIZE); }; snr = arm_snr_f32(testRefOutput_f32, testOutput, TESTLENGTH); if (snr < SNR_THRESHOLD_F32) { status = ARM_MATH_TEST_FAILURE; } else { status = ARM_MATH_SUCCESS; } /* ---------------------------------------------------------------------- ** Loop here if the signal does not match the reference output. ** ------------------------------------------------------------------- */ if( status != ARM_MATH_SUCCESS) { while(1); } while(1); /* main function does not return */ } /** \endlink */

1137519-player

lib/CMSIS/DSP_Lib/Examples/arm_graphic_equalizer_example/arm_graphic_equalizer_example_q31.c

C

lgpl

22,327

#include "arm_math.h" float32_t testRefOutput_f32[320] = { 0.000000000000000000, 0.001898396760225296, 0.004215449094772339, 0.007432077080011368, 0.010948467999696732, 0.015026375651359558, 0.019191544502973557, 0.023574527353048325, 0.027919445186853409, 0.032277785241603851, 0.036551639437675476, 0.040732793509960175, 0.044799156486988068, 0.048710610717535019, 0.052476800978183746, 0.056059073656797409, 0.059482168406248093, 0.062726479023694992, 0.065821025520563126, 0.068763464689254761, 0.071577839553356171, 0.074270240962505341, 0.076856281608343124, 0.079344697296619415, 0.081745062023401260, 0.084067162126302719, 0.086318407207727432, 0.088509257882833481, 0.090647127479314804, 0.092742368578910828, 0.094802625477313995, 0.096837285906076431, 0.098853722214698792, 0.100859899073839190, 0.102862443774938580, 0.104867763817310330, 0.106881409883499150, 0.108908228576183320, 0.110952425748109820, 0.113017357885837550, 0.115105822682380680, 0.117219865322113040, 0.119361080229282380, 0.121530555188655850, 0.123729091137647630, 0.125957202166318890, 0.128215309232473370, 0.130503740161657330, 0.132822841405868530, 0.135173004120588300, 0.137554679065942760, 0.139968376606702800, 0.142414685338735580, 0.144894234836101530, 0.147407654672861100, 0.149955596774816510, 0.152538605034351350, 0.155157200992107390, 0.157811731100082400, 0.160502441227436070, 0.163229387253522870, 0.165992442518472670, 0.168791320174932480, 0.171625509858131410, 0.174494370818138120, 0.177397061139345170, 0.180332608520984650, 0.183299910277128220, 0.186297744512557980, 0.189324837177991870, 0.192379791289567950, 0.195461250841617580, 0.198567759245634080, 0.201697919517755510, 0.204850304871797560, 0.208023533225059510, 0.211216274648904800, 0.214427210390567780, 0.217655111104249950, 0.220898788422346120, 0.224157124757766720, 0.227429077029228210, 0.230713658034801480, 0.234009962528944020, 0.237317133694887160, 0.240634419023990630, 0.243961080908775330, 0.247296508401632310, 0.250640105456113820, 0.253991369158029560, 0.257349837571382520, 0.260715119540691380, 0.264086868613958360, 0.267464816570281980, 0.270848698914051060, 0.274238351732492450, 0.277633611112833020, 0.281034380197525020, 0.284440591931343080, 0.287852220237255100, 0.291269283741712570, 0.294691801071166990, 0.298119872808456420, 0.301553562283515930, 0.304993014782667160, 0.308438356965780260, 0.311889752745628360, 0.315347377210855480, 0.318811416625976560, 0.322282072156667710, 0.325759567320346830, 0.329244095832109450, 0.332735907286405560, 0.336235217750072480, 0.339742250740528110, 0.343257248401641850, 0.346780419349670410, 0.350311983376741410, 0.353852160274982450, 0.357401121407747270, 0.360959105193614960, 0.364526227116584780, 0.368102725595235820, 0.371688675135374070, 0.375284302979707720, 0.378889638930559160, 0.382504884153604510, 0.386130042374134060, 0.389765247702598570, 0.393410529941320420, 0.397065933793783190, 0.400731507688760760, 0.404407206922769550, 0.408093083649873730, 0.411789052188396450, 0.415495119988918300, 0.419211201369762420, 0.422937240451574330, 0.426673140376806260, 0.430418811738491060, 0.434174135327339170, 0.437938995659351350, 0.441713258624076840, 0.445496778935194020, 0.449289388954639430, 0.453090950846672060, 0.456901267170906070, 0.460720170289278030, 0.464547459036111830, 0.468382950872182850, 0.472226426005363460, 0.476077698171138760, 0.479936532676219940, 0.483802750706672670, 0.487676106393337250, 0.491556398570537570, 0.495443399995565410, 0.499336875975131990, 0.503236617892980580, 0.507142387330532070, 0.511053957045078280, 0.514971107244491580, 0.518893606960773470, 0.522821225225925450, 0.526753749698400500, 0.530690938234329220, 0.534632585942745210, 0.538578454405069350, 0.542528338730335240, 0.546481993049383160, 0.550439231097698210, 0.554399792104959490, 0.558363504707813260, 0.562330115586519240, 0.566299438476562500, 0.570271246135234830, 0.574245333671569820, 0.578221492469310760, 0.582199502736330030, 0.586179181933403020, 0.590160276740789410, 0.594142623245716090, 0.598125983029603960, 0.602110169827938080, 0.606094967573881150, 0.610080175101757050, 0.614065583795309070, 0.618050977587699890, 0.622036151587963100, 0.626020893454551700, 0.630004994571208950, 0.633988231420516970, 0.637970402836799620, 0.641951277852058410, 0.645930647850036620, 0.649908289313316350, 0.653883971273899080, 0.657857488840818410, 0.661828581243753430, 0.665797054767608640, 0.669762641191482540, 0.673725124448537830, 0.677684243768453600, 0.681639779359102250, 0.685591462999582290, 0.689539063721895220, 0.693482317030429840, 0.697420965880155560, 0.701354760676622390, 0.705283410847187040, 0.709206689149141310, 0.713124278932809830, 0.717035952955484390, 0.720941375941038130, 0.724840316921472550, 0.728732451796531680, 0.732617516070604320, 0.736495196819305420, 0.740365199744701390, 0.744227230548858640, 0.748080968856811520, 0.751926124095916750, 0.755762357264757160, 0.759589381515979770, 0.763406842947006230, 0.767214450985193250, 0.771011855453252790, 0.774798732250928880, 0.778574761003255840, 0.782339565455913540, 0.786092851310968400, 0.789834223687648770, 0.793563373386859890, 0.797279909253120420, 0.800983514636754990, 0.804673787206411360, 0.808350402861833570, 0.812012966722249980, 0.815661124885082240, 0.819294504821300510, 0.822912722826004030, 0.826515413820743560, 0.830102190375328060, 0.833672653883695600, 0.837226435542106630, 0.840763118118047710, 0.844282336533069610, 0.847783654928207400, 0.851266715675592420, 0.854731071740388870, 0.858176350593566890, 0.861602116376161580, 0.865007970482110980, 0.868393491953611370, 0.871758259832859040, 0.875101849436759950, 0.878423850983381270, 0.881723806262016300, 0.885001312941312790, 0.888255912810564040, 0.891487173736095430, 0.894694659858942030, 0.897877920418977740, 0.901036512106657030, 0.904169965535402300, 0.907277844846248630, 0.910359673202037810, 0.913415014743804930, 0.916443370282649990, 0.919444311410188670, 0.922417331486940380, 0.925361987203359600, 0.928277771919965740, 0.931164238601922990, 0.934020876884460450, 0.936847217381000520, 0.939642757177352910, 0.942407000809907910, 0.945139460265636440, 0.947839632630348210, 0.950507018715143200, 0.953141096979379650, 0.955741371959447860, 0.958307322114706040, 0.960838429629802700, 0.963334184139966960, 0.965794049203395840, 0.968217510730028150, 0.970604017376899720, 0.972953058779239650, 0.975264083594083790, 0.977536566555500030, 0.979769956320524220, 0.981963708996772770, 0.984117280691862110, 0.986230112612247470, 0.988301653414964680, 0.990331344306468960, 0.992318630218505860, 0.994262944906950000, 0.996163722127676010, 0.998020399361848830, 0.999832402914762500, 1.001599155366420700, 1.003320086747407900, 1.004994612187147100, 1.006622135639190700, 1.008202098309993700, 1.009733878076076500, 1.011216927319765100, 1.012650609016418500, 1.014034371823072400, 1.015367589890956900, 1.016649682074785200, 1.017880033701658200, 1.019058048725128200, 1.020183108747005500, 1.021254621446132700, 1.022271949797868700, 1.023234523832798000, }; /* ---------------------------------------------------------------------- ** Test input - logarithmic chirp signal ** ------------------------------------------------------------------- */ float32_t testInput_f32[320] = { 0.000000000000000061, 0.002622410992047861, 0.005253663973466970, 0.007893770384930297, 0.010542741395035495, 0.013200587895525877, 0.015867320496454066, 0.018542949521290073, 0.021227485001971542, 0.023920936673895138, 0.026623313970853074, 0.029334626019908643, 0.032054881636210709, 0.034784089317753723, 0.037522257240071598, 0.040269393250875855, 0.043025504864628375, 0.045790599257054837, 0.048564683259595690, 0.051347763353792118, 0.054139845665610427, 0.056940935959702531, 0.059751039633601337, 0.062570161711849828, 0.065398306840066575, 0.068235479278943648, 0.071081682898178900, 0.073936921170339814, 0.076801197164660218, 0.079674513540768196, 0.082556872542344922, 0.085448275990715375, 0.088348725278367082, 0.091258221362398390, 0.094176764757897533, 0.097104355531246703, 0.100040993293358240, 0.102986677192832010, 0.105941405909045980, 0.108905177645166230, 0.111877990121087980, 0.114859840566297130, 0.117850725712659680, 0.120850641787131110, 0.123859584504392860, 0.126877549059407400, 0.129904530119898690, 0.132940521818751430, 0.135985517746334080, 0.139039510942737950, 0.142102493889940090, 0.145174458503884160, 0.148255396126476810, 0.151345297517508140, 0.154444152846483080, 0.157551951684374300, 0.160668682995289720, 0.163794335128054890, 0.166928895807713030, 0.170072352126936720, 0.173224690537355760, 0.176385896840798810, 0.179555956180445340, 0.182734853031894270, 0.185922571194139130, 0.189119093780459800, 0.192324403209221870, 0.195538481194587030, 0.198761308737133020, 0.201992866114384050, 0.205233132871247170, 0.208482087810360570, 0.211739708982344370, 0.215005973675965020, 0.218280858408200220, 0.221564338914212730, 0.224856390137231970, 0.228156986218334190, 0.231466100486134670, 0.234783705446379690, 0.238109772771442410, 0.241444273289723230, 0.244787176974952890, 0.248138452935395580, 0.251498069402956710, 0.254865993722190930, 0.258242192339209860, 0.261626630790492030, 0.265019273691591620, 0.268420084725748410, 0.271829026632395280, 0.275246061195565440, 0.278671149232197430, 0.282104250580339830, 0.285545324087251580, 0.288994327597401960, 0.292451217940364990, 0.295915950918612280, 0.299388481295203350, 0.302868762781368150, 0.306356748023990040, 0.309852388592980640, 0.313355634968552230, 0.316866436528383590, 0.320384741534681720, 0.323910497121136620, 0.327443649279772870, 0.330984142847692230, 0.334531921493712690, 0.338086927704900790, 0.341649102772995210, 0.345218386780727190, 0.348794718588032520, 0.352378035818156910, 0.355968274843654950, 0.359565370772282730, 0.363169257432780890, 0.366779867360555120, 0.370397131783246010, 0.374020980606193880, 0.377651342397795690, 0.381288144374756830, 0.384931312387234990, 0.388580770903877330, 0.392236442996751310, 0.395898250326170650, 0.399566113125414350, 0.403239950185338420, 0.406919678838884410, 0.410605214945482130, 0.414296472875345100, 0.417993365493664670, 0.421695804144698540, 0.425403698635752780, 0.429116957221065130, 0.432835486585582130, 0.436559191828633180, 0.440287976447505720, 0.444021742320914510, 0.447760389692375140, 0.451503817153472210, 0.455251921627031540, 0.459004598350192470, 0.462761740857380200, 0.466523240963184150, 0.470288988745136360, 0.474058872526396560, 0.477832778858340690, 0.481610592503056990, 0.485392196415748600, 0.489177471727042850, 0.492966297725213780, 0.496758551838309250, 0.500554109616195060, 0.504352844712508190, 0.508154628866524960, 0.511959331884944910, 0.515766821623591440, 0.519576963969030530, 0.523389622820107150, 0.527204660069405030, 0.531021935584629400, 0.534841307189911630, 0.538662630647041900, 0.542485759636628150, 0.546310545739186690, 0.550136838416161340, 0.553964484990880020, 0.557793330629441700, 0.561623218321546380, 0.565453988861259300, 0.569285480827721570, 0.573117530565801950, 0.576949972166696630, 0.580782637448476910, 0.584615355936589420, 0.588447954844309340, 0.592280259053150400, 0.596112091093235260, 0.599943271123626440, 0.603773616912622660, 0.607602943818024150, 0.611431064767369080, 0.615257790238142090, 0.619082928237961740, 0.622906284284749700, 0.626727661386881850, 0.630546860023327600, 0.634363678123782030, 0.638177911048790960, 0.641989351569874020, 0.645797789849653410, 0.649603013421986450, 0.653404807172108140, 0.657202953316791350, 0.660997231384523490, 0.664787418195706640, 0.668573287842887610, 0.672354611671016960, 0.676131158257749170, 0.679902693393781730, 0.683668980063242500, 0.687429778424128110, 0.691184845788802130, 0.694933936604551380, 0.698676802434213370, 0.702413191936877570, 0.706142850848662460, 0.709865521963579990, 0.713580945114492330, 0.717288857154159800, 0.720988991936399870, 0.724681080297347790, 0.728364850036839040, 0.732040025899910680, 0.735706329558433620, 0.739363479592880620, 0.743011191474238440, 0.746649177546067850, 0.750277147006723990, 0.753894805891742180, 0.757501857056394940, 0.761098000158428880, 0.764682931640995540, 0.768256344715771980, 0.771817929346292900, 0.775367372231492210, 0.778904356789468790, 0.782428563141483460, 0.785939668096195860, 0.789437345134148760, 0.792921264392515420, 0.796391092650110770, 0.799846493312681210, 0.803287126398485760, 0.806712648524170680, 0.810122712890953390, 0.813516969271127150, 0.816895063994893090, 0.820256639937531280, 0.823601336506926020, 0.826928789631450890, 0.830238631748229430, 0.833530491791779850, 0.836803995183058700, 0.840058763818912760, 0.843294416061954100, 0.846510566730867220, 0.849706827091166740, 0.852882804846411770, 0.856038104129895340, 0.859172325496819990, 0.862285065916973510, 0.865375918767918860, 0.868444473828712590, 0.871490317274166260, 0.874513031669661770, 0.877512195966544280, 0.880487385498096800, 0.883438171976119850, 0.886364123488128100, 0.889264804495180530, 0.892139775830360640, 0.894988594697921020, 0.897810814673113080, 0.900605985702712770, 0.903373654106265470, 0.906113362578062300, 0.908824650189867690, 0.911507052394417540, 0.914160101029702910, 0.916783324324059180, 0.919376246902079860, 0.921938389791372770, 0.924469270430179120, 0.926968402675872660, 0.929435296814361430, 0.931869459570409790, 0.934270394118903560, 0.936637600097074200, 0.938970573617708970, 0.941268807283364040, 0.943531790201601380, 0.945759008001275100, 0.947949942849885320, 0.950104073472023970, 0.952220875168933280, 0.954299819839202090, 0.956340376000621160, 0.958342008813221960, 0.960304180103520260, 0.962226348389994210, 0.964107968909812760, 0.965948493646846980, 0.967747371360983650, 0.969504047618768740, 0.971217964825405680, 0.972888562258134030, 0.974515276101013520, 0.976097539481141750, 0.977634782506330400, 0.979126432304266880, 0.980571913063189360, 0.981970646074102120, 0.983322049774557390, 0.984625539794035220, 0.985880529000944810, 0.987086427551279730, 0.988242642938953360, 0.989348580047844540, 0.990403641205582440, 0.991407226239099710, 0.992358732531984260, 0.993257555083659870, 0.994103086570423680, 0.994894717408374870, 0.995631835818261310, 0.996313827892278070, 0.996940077662846650, 0.997509967173408010, };

1137519-player

lib/CMSIS/DSP_Lib/Examples/arm_graphic_equalizer_example/arm_graphic_equalizer_data.c

C

lgpl

14,546

/**************************************************************************//** * @file system_ARMCM4.c * @brief CMSIS Cortex-M4 Device System Source File * for CM4 Device Series * @version V1.05 * @date 26. July 2011 * * @note * Copyright (C) 2010-2011 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * ******************************************************************************/ #include "ARMCM4.h" /*---------------------------------------------------------------------------- Define clocks *----------------------------------------------------------------------------*/ #define __HSI ( 8000000UL) #define __XTAL (12000000UL) /* Oscillator frequency */ #define __SYSTEM_CLOCK (4*__XTAL) /*---------------------------------------------------------------------------- Clock Variable definitions *----------------------------------------------------------------------------*/ uint32_t SystemCoreClock = __SYSTEM_CLOCK;/*!< System Clock Frequency (Core Clock)*/ /*---------------------------------------------------------------------------- Clock functions *----------------------------------------------------------------------------*/ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */ { SystemCoreClock = __SYSTEM_CLOCK; } /** * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System. */ void SystemInit (void) { #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) SCB->CPACR |= ((3UL << 10*2) | /* set CP10 Full Access */ (3UL << 11*2) ); /* set CP11 Full Access */ #endif SystemCoreClock = __SYSTEM_CLOCK; #ifdef __USE_GPIO ARM_GPIO0->DATA[0].WORD = 0; ARM_GPIO0->IE = 0; ARM_GPIO0->DIR = 0xff83; ARM_GPIO1->DATA[0].WORD = 0; ARM_GPIO1->IE = 0; ARM_GPIO1->DIR = 0; ARM_GPIO2->DATA[0].WORD = 0; ARM_GPIO2->IE = 0; ARM_GPIO2->DIR = 0; #endif }

1137519-player

lib/CMSIS/DSP_Lib/Examples/arm_graphic_equalizer_example/system_ARMCM4.c

C

lgpl

2,707

/**************************************************************************//** * @file system_ARMCM3.c * @brief CMSIS Cortex-M3 Device System Source File * for CM3 Device Series * @version V1.05 * @date 26. July 2011 * * @note * Copyright (C) 2010-2011 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * ******************************************************************************/ #include "ARMCM3.h" /*---------------------------------------------------------------------------- Define clocks *----------------------------------------------------------------------------*/ #define __HSI ( 8000000UL) #define __XTAL (12000000UL) /* Oscillator frequency */ #define __SYSTEM_CLOCK (4*__XTAL) /*---------------------------------------------------------------------------- Clock Variable definitions *----------------------------------------------------------------------------*/ uint32_t SystemCoreClock = __SYSTEM_CLOCK;/*!< System Clock Frequency (Core Clock)*/ /*---------------------------------------------------------------------------- Clock functions *----------------------------------------------------------------------------*/ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */ { SystemCoreClock = __SYSTEM_CLOCK; } /** * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System. */ void SystemInit (void) { SystemCoreClock = __SYSTEM_CLOCK; #ifdef __USE_GPIO ARM_GPIO0->DATA[0].WORD = 0; ARM_GPIO0->IE = 0; ARM_GPIO0->DIR = 0xff83; ARM_GPIO1->DATA[0].WORD = 0; ARM_GPIO1->IE = 0; ARM_GPIO1->DIR = 0; ARM_GPIO2->DATA[0].WORD = 0; ARM_GPIO2->IE = 0; ARM_GPIO2->DIR = 0; #endif }

1137519-player

lib/CMSIS/DSP_Lib/Examples/arm_graphic_equalizer_example/system_ARMCM3.c

C

lgpl

2,488

;/**************************************************************************//** ; * @file startup_ARMCM4.s ; * @brief CMSIS Cortex-M4 Core Device Startup File ; * for CM4 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; * ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA |.text|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP MemManage_Handler\ PROC EXPORT MemManage_Handler [WEAK] B . ENDP BusFault_Handler\ PROC EXPORT BusFault_Handler [WEAK] B . ENDP UsageFault_Handler\ PROC EXPORT UsageFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP DebugMon_Handler\ PROC EXPORT DebugMon_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END

1137519-player

lib/CMSIS/DSP_Lib/Examples/arm_convolution_example/ARM/startup_ARMCM4.s

Unix Assembly

lgpl

5,000

;/**************************************************************************//** ; * @file startup_ARMCM3.s ; * @brief CMSIS Cortex-M3 Core Device Startup File ; * for CM3 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; * ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA |.text|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP MemManage_Handler\ PROC EXPORT MemManage_Handler [WEAK] B . ENDP BusFault_Handler\ PROC EXPORT BusFault_Handler [WEAK] B . ENDP UsageFault_Handler\ PROC EXPORT UsageFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP DebugMon_Handler\ PROC EXPORT DebugMon_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END

1137519-player

lib/CMSIS/DSP_Lib/Examples/arm_convolution_example/ARM/startup_ARMCM3.s

Unix Assembly

lgpl

5,000

;/**************************************************************************//** ; * @file startup_ARMCM0.s ; * @brief CMSIS Cortex-M0 Core Device Startup File ; * for CM0 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; * ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA |.text|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END

1137519-player

lib/CMSIS/DSP_Lib/Examples/arm_convolution_example/ARM/startup_ARMCM0.s

Motorola 68K Assembly

lgpl

4,363

/**************************************************************************//** * @file startup_ARMCM4.s * @brief CMSIS Cortex-M4 Core Device Startup File * for CM4 Device Series * @version V1.04 * @date 14. January 2011 *------- <<< Use Configuration Wizard in Context Menu >>> ------------------ * ******************************************************************************/ /*****************************************************************************/ /* Version: CodeSourcery Sourcery G++ Lite (with CS3) */ /*****************************************************************************/ /* // <h> Stack Configuration // <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> // </h> */ .equ Stack_Size, 0x00000100 .section ".stack", "w" .align 3 .globl __cs3_stack_mem .globl __cs3_stack_size __cs3_stack_mem: .if Stack_Size .space Stack_Size .endif .size __cs3_stack_mem, . - __cs3_stack_mem .set __cs3_stack_size, . - __cs3_stack_mem /* // <h> Heap Configuration // <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> // </h> */ .equ Heap_Size, 0x00001000 .section ".heap", "w" .align 3 .globl __cs3_heap_start .globl __cs3_heap_end __cs3_heap_start: .if Heap_Size .space Heap_Size .endif __cs3_heap_end: /* Vector Table */ .section ".cs3.interrupt_vector" .globl __cs3_interrupt_vector_cortex_m .type __cs3_interrupt_vector_cortex_m, %object __cs3_interrupt_vector_cortex_m: .long __cs3_stack /* Top of Stack */ .long __cs3_reset /* Reset Handler */ .long NMI_Handler /* NMI Handler */ .long HardFault_Handler /* Hard Fault Handler */ .long MemManage_Handler /* MPU Fault Handler */ .long BusFault_Handler /* Bus Fault Handler */ .long UsageFault_Handler /* Usage Fault Handler */ .long 0 /* Reserved */ .long 0 /* Reserved */ .long 0 /* Reserved */ .long 0 /* Reserved */ .long SVC_Handler /* SVCall Handler */ .long DebugMon_Handler /* Debug Monitor Handler */ .long 0 /* Reserved */ .long PendSV_Handler /* PendSV Handler */ .long SysTick_Handler /* SysTick Handler */ /* External Interrupts */ .long DEF_IRQHandler /* 0: Default */ .size __cs3_interrupt_vector_cortex_m, . - __cs3_interrupt_vector_cortex_m .thumb /* Reset Handler */ .section .cs3.reset,"x",%progbits .thumb_func .globl __cs3_reset_cortex_m .type __cs3_reset_cortex_m, %function __cs3_reset_cortex_m: .fnstart LDR R0, =SystemInit BLX R0 LDR R0,=_start BX R0 .pool .cantunwind .fnend .size __cs3_reset_cortex_m,.-__cs3_reset_cortex_m .section ".text" /* Exception Handlers */ .weak NMI_Handler .type NMI_Handler, %function NMI_Handler: B . .size NMI_Handler, . - NMI_Handler .weak HardFault_Handler .type HardFault_Handler, %function HardFault_Handler: B . .size HardFault_Handler, . - HardFault_Handler .weak MemManage_Handler .type MemManage_Handler, %function MemManage_Handler: B . .size MemManage_Handler, . - MemManage_Handler .weak BusFault_Handler .type BusFault_Handler, %function BusFault_Handler: B . .size BusFault_Handler, . - BusFault_Handler .weak UsageFault_Handler .type UsageFault_Handler, %function UsageFault_Handler: B . .size UsageFault_Handler, . - UsageFault_Handler .weak SVC_Handler .type SVC_Handler, %function SVC_Handler: B . .size SVC_Handler, . - SVC_Handler .weak DebugMon_Handler .type DebugMon_Handler, %function DebugMon_Handler: B . .size DebugMon_Handler, . - DebugMon_Handler .weak PendSV_Handler .type PendSV_Handler, %function PendSV_Handler: B . .size PendSV_Handler, . - PendSV_Handler .weak SysTick_Handler .type SysTick_Handler, %function SysTick_Handler: B . .size SysTick_Handler, . - SysTick_Handler /* IRQ Handlers */ .globl Default_Handler .type Default_Handler, %function Default_Handler: B . .size Default_Handler, . - Default_Handler .macro IRQ handler .weak \handler .set \handler, Default_Handler .endm IRQ DEF_IRQHandler .end

1137519-player

lib/CMSIS/DSP_Lib/Examples/arm_convolution_example/GCC/startup_ARMCM4.s

Unix Assembly

lgpl

5,185

/**************************************************************************//** * @file startup_ARMCM3.s * @brief CMSIS Cortex-M3 Core Device Startup File * for CM3 Device Series * @version V1.04 * @date 14. January 2011 *------- <<< Use Configuration Wizard in Context Menu >>> ------------------ * ******************************************************************************/ /*****************************************************************************/ /* Version: CodeSourcery Sourcery G++ Lite (with CS3) */ /*****************************************************************************/ /* // <h> Stack Configuration // <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> // </h> */ .equ Stack_Size, 0x00000100 .section ".stack", "w" .align 3 .globl __cs3_stack_mem .globl __cs3_stack_size __cs3_stack_mem: .if Stack_Size .space Stack_Size .endif .size __cs3_stack_mem, . - __cs3_stack_mem .set __cs3_stack_size, . - __cs3_stack_mem /* // <h> Heap Configuration // <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> // </h> */ .equ Heap_Size, 0x00001000 .section ".heap", "w" .align 3 .globl __cs3_heap_start .globl __cs3_heap_end __cs3_heap_start: .if Heap_Size .space Heap_Size .endif __cs3_heap_end: /* Vector Table */ .section ".cs3.interrupt_vector" .globl __cs3_interrupt_vector_cortex_m .type __cs3_interrupt_vector_cortex_m, %object __cs3_interrupt_vector_cortex_m: .long __cs3_stack /* Top of Stack */ .long __cs3_reset /* Reset Handler */ .long NMI_Handler /* NMI Handler */ .long HardFault_Handler /* Hard Fault Handler */ .long MemManage_Handler /* MPU Fault Handler */ .long BusFault_Handler /* Bus Fault Handler */ .long UsageFault_Handler /* Usage Fault Handler */ .long 0 /* Reserved */ .long 0 /* Reserved */ .long 0 /* Reserved */ .long 0 /* Reserved */ .long SVC_Handler /* SVCall Handler */ .long DebugMon_Handler /* Debug Monitor Handler */ .long 0 /* Reserved */ .long PendSV_Handler /* PendSV Handler */ .long SysTick_Handler /* SysTick Handler */ /* External Interrupts */ .long DEF_IRQHandler /* 0: Default */ .size __cs3_interrupt_vector_cortex_m, . - __cs3_interrupt_vector_cortex_m .thumb /* Reset Handler */ .section .cs3.reset,"x",%progbits .thumb_func .globl __cs3_reset_cortex_m .type __cs3_reset_cortex_m, %function __cs3_reset_cortex_m: .fnstart LDR R0, =SystemInit BLX R0 LDR R0,=_start BX R0 .pool .cantunwind .fnend .size __cs3_reset_cortex_m,.-__cs3_reset_cortex_m .section ".text" /* Exception Handlers */ .weak NMI_Handler .type NMI_Handler, %function NMI_Handler: B . .size NMI_Handler, . - NMI_Handler .weak HardFault_Handler .type HardFault_Handler, %function HardFault_Handler: B . .size HardFault_Handler, . - HardFault_Handler .weak MemManage_Handler .type MemManage_Handler, %function MemManage_Handler: B . .size MemManage_Handler, . - MemManage_Handler .weak BusFault_Handler .type BusFault_Handler, %function BusFault_Handler: B . .size BusFault_Handler, . - BusFault_Handler .weak UsageFault_Handler .type UsageFault_Handler, %function UsageFault_Handler: B . .size UsageFault_Handler, . - UsageFault_Handler .weak SVC_Handler .type SVC_Handler, %function SVC_Handler: B . .size SVC_Handler, . - SVC_Handler .weak DebugMon_Handler .type DebugMon_Handler, %function DebugMon_Handler: B . .size DebugMon_Handler, . - DebugMon_Handler .weak PendSV_Handler .type PendSV_Handler, %function PendSV_Handler: B . .size PendSV_Handler, . - PendSV_Handler .weak SysTick_Handler .type SysTick_Handler, %function SysTick_Handler: B . .size SysTick_Handler, . - SysTick_Handler /* IRQ Handlers */ .globl Default_Handler .type Default_Handler, %function Default_Handler: B . .size Default_Handler, . - Default_Handler .macro IRQ handler .weak \handler .set \handler, Default_Handler .endm IRQ DEF_IRQHandler .end

1137519-player

lib/CMSIS/DSP_Lib/Examples/arm_convolution_example/GCC/startup_ARMCM3.s

Unix Assembly

lgpl

5,185

/**************************************************************************//** * @file startup_ARMCM0.s * @brief CMSIS Cortex-M0 Core Device Startup File * for CM0 Device Series * @version V1.04 * @date 14. January 2011 *------- <<< Use Configuration Wizard in Context Menu >>> ------------------ * ******************************************************************************/ /*****************************************************************************/ /* Version: CodeSourcery Sourcery G++ Lite (with CS3) */ /*****************************************************************************/ /* // <h> Stack Configuration // <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> // </h> */ .equ Stack_Size, 0x00000100 .section ".stack", "w" .align 3 .globl __cs3_stack_mem .globl __cs3_stack_size __cs3_stack_mem: .if Stack_Size .space Stack_Size .endif .size __cs3_stack_mem, . - __cs3_stack_mem .set __cs3_stack_size, . - __cs3_stack_mem /* // <h> Heap Configuration // <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> // </h> */ .equ Heap_Size, 0x00001000 .section ".heap", "w" .align 3 .globl __cs3_heap_start .globl __cs3_heap_end __cs3_heap_start: .if Heap_Size .space Heap_Size .endif __cs3_heap_end: /* Vector Table */ .section ".cs3.interrupt_vector" .globl __cs3_interrupt_vector_cortex_m .type __cs3_interrupt_vector_cortex_m, %object __cs3_interrupt_vector_cortex_m: .long __cs3_stack /* Top of Stack */ .long __cs3_reset /* Reset Handler */ .long NMI_Handler /* NMI Handler */ .long HardFault_Handler /* Hard Fault Handler */ .long 0 /* Reserved */ .long 0 /* Reserved */ .long 0 /* Reserved */ .long 0 /* Reserved */ .long 0 /* Reserved */ .long 0 /* Reserved */ .long 0 /* Reserved */ .long SVC_Handler /* SVCall Handler */ .long 0 /* Reserved */ .long 0 /* Reserved */ .long PendSV_Handler /* PendSV Handler */ .long SysTick_Handler /* SysTick Handler */ /* External Interrupts */ .long DEF_IRQHandler /* 0: Default */ .size __cs3_interrupt_vector_cortex_m, . - __cs3_interrupt_vector_cortex_m .thumb /* Reset Handler */ .section .cs3.reset,"x",%progbits .thumb_func .globl __cs3_reset_cortex_m .type __cs3_reset_cortex_m, %function __cs3_reset_cortex_m: .fnstart LDR R0, =SystemInit BLX R0 LDR R0,=_start BX R0 .pool .cantunwind .fnend .size __cs3_reset_cortex_m,.-__cs3_reset_cortex_m .section ".text" /* Exception Handlers */ .weak NMI_Handler .type NMI_Handler, %function NMI_Handler: B . .size NMI_Handler, . - NMI_Handler .weak HardFault_Handler .type HardFault_Handler, %function HardFault_Handler: B . .size HardFault_Handler, . - HardFault_Handler .weak SVC_Handler .type SVC_Handler, %function SVC_Handler: B . .size SVC_Handler, . - SVC_Handler .weak PendSV_Handler .type PendSV_Handler, %function PendSV_Handler: B . .size PendSV_Handler, . - PendSV_Handler .weak SysTick_Handler .type SysTick_Handler, %function SysTick_Handler: B . .size SysTick_Handler, . - SysTick_Handler /* IRQ Handlers */ .globl Default_Handler .type Default_Handler, %function Default_Handler: B . .size Default_Handler, . - Default_Handler .macro IRQ handler .weak \handler .set \handler, Default_Handler .endm IRQ DEF_IRQHandler .end

1137519-player

lib/CMSIS/DSP_Lib/Examples/arm_convolution_example/GCC/startup_ARMCM0.s

Unix Assembly

lgpl

4,534

/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 29. November 2010 * $Revision: V1.0.3 * * Project: CMSIS DSP Library * Title: arm_convolution_example_f32.c * * Description: Example code demonstrating Convolution of two input signals using fft. * * Target Processor: Cortex-M4/Cortex-M3 * * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.1 2010/10/05 KK * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 KK * Production release and review comments incorporated. * ------------------------------------------------------------------- */ /** * @ingroup groupExamples */ /** * @defgroup ConvolutionExample Convolution Example * * \par Description: * \par * Demonstrates the convolution theorem with the use of the Complex FFT, Complex-by-Complex * Multiplication, and Support Functions. * * \par Algorithm: * \par * The convolution theorem states that convolution in the time domain corresponds to * multiplication in the frequency domain. Therefore, the Fourier transform of the convoution of * two signals is equal to the product of their individual Fourier transforms. * The Fourier transform of a signal can be evaluated efficiently using the Fast Fourier Transform (FFT). * \par * Two input signals, <code>a[n]</code> and <code>b[n]</code>, with lengths \c n1 and \c n2 respectively, * are zero padded so that their lengths become \c N, which is greater than or equal to <code>(n1+n2-1)</code> * and is a power of 4 as FFT implementation is radix-4. * The convolution of <code>a[n]</code> and <code>b[n]</code> is obtained by taking the FFT of the input * signals, multiplying the Fourier transforms of the two signals, and taking the inverse FFT of * the multiplied result. * \par * This is denoted by the following equations: * <pre> A[k] = FFT(a[n],N) * B[k] = FFT(b[n],N) * conv(a[n], b[n]) = IFFT(A[k] * B[k], N)</pre> * where <code>A[k]</code> and <code>B[k]</code> are the N-point FFTs of the signals <code>a[n]</code> * and <code>b[n]</code> respectively. * The length of the convolved signal is <code>(n1+n2-1)</code>. * * \par Block Diagram: * \par * \image html Convolution.gif * * \par Variables Description: * \par * \li \c testInputA_f32 points to the first input sequence * \li \c srcALen length of the first input sequence * \li \c testInputB_f32 points to the second input sequence * \li \c srcBLen length of the second input sequence * \li \c outLen length of convolution output sequence, <code>(srcALen + srcBLen - 1)</code> * \li \c AxB points to the output array where the product of individual FFTs of inputs is stored. * * \par CMSIS DSP Software Library Functions Used: * \par * - arm_fill_f32() * - arm_copy_f32() * - arm_cfft_radix4_init_f32() * - arm_cfft_radix4_f32() * - arm_cmplx_mult_cmplx_f32() * * Refer * \link arm_convolution_example_f32.c \endlink * */ /** \example arm_convolution_example_f32.c */ #include "arm_math.h" #include "math_helper.h" /* ---------------------------------------------------------------------- * Defines each of the tests performed * ------------------------------------------------------------------- */ #define MAX_BLOCKSIZE 128 #define DELTA (0.000001f) #define SNR_THRESHOLD 90 /* ---------------------------------------------------------------------- * Declare I/O buffers * ------------------------------------------------------------------- */ float32_t Ak[MAX_BLOCKSIZE]; /* Input A */ float32_t Bk[MAX_BLOCKSIZE]; /* Input B */ float32_t AxB[MAX_BLOCKSIZE * 2]; /* Output */ /* ---------------------------------------------------------------------- * Test input data for Floating point Convolution example for 32-blockSize * Generated by the MATLAB randn() function * ------------------------------------------------------------------- */ float32_t testInputA_f32[64] = { -0.808920, 1.357369, 1.180861, -0.504544, 1.762637, -0.703285, 1.696966, 0.620571, -0.151093, -0.100235, -0.872382, -0.403579, -0.860749, -0.382648, -1.052338, 0.128113, -0.646269, 1.093377, -2.209198, 0.471706, 0.408901, 1.266242, 0.598252, 1.176827, -0.203421, 0.213596, -0.851964, -0.466958, 0.021841, -0.698938, -0.604107, 0.461778, -0.318219, 0.942520, 0.577585, 0.417619, 0.614665, 0.563679, -1.295073, -0.764437, 0.952194, -0.859222, -0.618554, -2.268542, -1.210592, 1.655853, -2.627219, -0.994249, -1.374704, 0.343799, 0.025619, 1.227481, -0.708031, 0.069355, -1.845228, -1.570886, 1.010668, -1.802084, 1.630088, 1.286090, -0.161050, -0.940794, 0.367961, 0.291907 }; float32_t testInputB_f32[64] = { 0.933724, 0.046881, 1.316470, 0.438345, 0.332682, 2.094885, 0.512081, 0.035546, 0.050894, -2.320371, 0.168711, -1.830493, -0.444834, -1.003242, -0.531494, -1.365600, -0.155420, -0.757692, -0.431880, -0.380021, 0.096243, -0.695835, 0.558850, -1.648962, 0.020369, -0.363630, 0.887146, 0.845503, -0.252864, -0.330397, 1.269131, -1.109295, -1.027876, 0.135940, 0.116721, -0.293399, -1.349799, 0.166078, -0.802201, 0.369367, -0.964568, -2.266011, 0.465178, 0.651222, -0.325426, 0.320245, -0.784178, -0.579456, 0.093374, 0.604778, -0.048225, 0.376297, -0.394412, 0.578182, -1.218141, -1.387326, 0.692462, -0.631297, 0.153137, -0.638952, 0.635474, -0.970468, 1.334057, -0.111370 }; const float testRefOutput_f32[126] = { -0.818943, 1.229484, -0.533664, 1.016604, 0.341875, -1.963656, 5.171476, 3.478033, 7.616361, 6.648384, 0.479069, 1.792012, -1.295591, -7.447818, 0.315830, -10.657445, -2.483469, -6.524236, -7.380591, -3.739005, -8.388957, 0.184147, -1.554888, 3.786508, -1.684421, 5.400610, -1.578126, 7.403361, 8.315999, 2.080267, 11.077776, 2.749673, 7.138962, 2.748762, 0.660363, 0.981552, 1.442275, 0.552721, -2.576892, 4.703989, 0.989156, 8.759344, -0.564825, -3.994680, 0.954710, -5.014144, 6.592329, 1.599488, -13.979146, -0.391891, -4.453369, -2.311242, -2.948764, 1.761415, -0.138322, 10.433007, -2.309103, 4.297153, 8.535523, 3.209462, 8.695819, 5.569919, 2.514304, 5.582029, 2.060199, 0.642280, 7.024616, 1.686615, -6.481756, 1.343084, -3.526451, 1.099073, -2.965764, -0.173723, -4.111484, 6.528384, -6.965658, 1.726291, 1.535172, 11.023435, 2.338401, -4.690188, 1.298210, 3.943885, 8.407885, 5.168365, 0.684131, 1.559181, 1.859998, 2.852417, 8.574070, -6.369078, 6.023458, 11.837963, -6.027632, 4.469678, -6.799093, -2.674048, 6.250367, -6.809971, -3.459360, 9.112410, -2.711621, -1.336678, 1.564249, -1.564297, -1.296760, 8.904013, -3.230109, 6.878013, -7.819823, 3.369909, -1.657410, -2.007358, -4.112825, 1.370685, -3.420525, -6.276605, 3.244873, -3.352638, 1.545372, 0.902211, 0.197489, -1.408732, 0.523390, 0.348440 }; /* ---------------------------------------------------------------------- * Declare Global variables * ------------------------------------------------------------------- */ uint32_t srcALen = 64; /* Length of Input A */ uint32_t srcBLen = 64; /* Length of Input B */ uint32_t outLen; /* Length of convolution output */ float32_t snr; /* output SNR */ int32_t main(void) { arm_status status; /* Status of the example */ arm_cfft_radix4_instance_f32 cfft_instance; /* CFFT Structure instance */ /* CFFT Structure instance pointer */ arm_cfft_radix4_instance_f32 *cfft_instance_ptr = (arm_cfft_radix4_instance_f32*) &cfft_instance; /* output length of convolution */ outLen = srcALen + srcBLen - 1; /* Initialise the fft input buffers with all zeros */ arm_fill_f32(0.0, Ak, MAX_BLOCKSIZE); arm_fill_f32(0.0, Bk, MAX_BLOCKSIZE); /* Copy the input values to the fft input buffers */ arm_copy_f32(testInputA_f32, Ak, MAX_BLOCKSIZE/2); arm_copy_f32(testInputB_f32, Bk, MAX_BLOCKSIZE/2); /* Initialize the CFFT function to compute 64 point fft */ status = arm_cfft_radix4_init_f32(cfft_instance_ptr, 64, 0, 1); /* Transform input a[n] from time domain to frequency domain A[k] */ arm_cfft_radix4_f32(cfft_instance_ptr, Ak); /* Transform input b[n] from time domain to frequency domain B[k] */ arm_cfft_radix4_f32(cfft_instance_ptr, Bk); /* Complex Multiplication of the two input buffers in frequency domain */ arm_cmplx_mult_cmplx_f32(Ak, Bk, AxB, MAX_BLOCKSIZE/2); /* Initialize the CIFFT function to compute 64 point ifft */ status = arm_cfft_radix4_init_f32(cfft_instance_ptr, 64, 1, 1); /* Transform the multiplication output from frequency domain to time domain, that gives the convolved output */ arm_cfft_radix4_f32(cfft_instance_ptr, AxB); /* SNR Calculation */ snr = arm_snr_f32((float32_t *)testRefOutput_f32, AxB, srcALen + srcBLen - 1); /* Compare the SNR with threshold to test whether the computed output is matched with the reference output values. */ if( snr > SNR_THRESHOLD) { status = ARM_MATH_SUCCESS; } if( status != ARM_MATH_SUCCESS) { while(1); } while(1); /* main function does not return */ } /** \endlink */

1137519-player

lib/CMSIS/DSP_Lib/Examples/arm_convolution_example/arm_convolution_example_f32.c

C

lgpl

9,563

/**************************************************************************//** * @file system_ARMCM0.c * @brief CMSIS Cortex-M0 Device System Source File * for CM0 Device Series * @version V1.05 * @date 26. July 2011 * * @note * Copyright (C) 2010-2011 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * ******************************************************************************/ #include "ARMCM0.h" /*---------------------------------------------------------------------------- Define clocks *----------------------------------------------------------------------------*/ #define __HSI ( 8000000UL) #define __XTAL (12000000UL) /* Oscillator frequency */ #define __SYSTEM_CLOCK (4*__XTAL) /*---------------------------------------------------------------------------- Clock Variable definitions *----------------------------------------------------------------------------*/ uint32_t SystemCoreClock = __SYSTEM_CLOCK;/*!< System Clock Frequency (Core Clock)*/ /*---------------------------------------------------------------------------- Clock functions *----------------------------------------------------------------------------*/ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */ { SystemCoreClock = __SYSTEM_CLOCK; } /** * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System. */ void SystemInit (void) { SystemCoreClock = __SYSTEM_CLOCK; #ifdef __USE_GPIO ARM_GPIO0->DATA[0].WORD = 0; ARM_GPIO0->IE = 0; ARM_GPIO0->DIR = 0xff83; ARM_GPIO1->DATA[0].WORD = 0; ARM_GPIO1->IE = 0; ARM_GPIO1->DIR = 0; ARM_GPIO2->DATA[0].WORD = 0; ARM_GPIO2->IE = 0; ARM_GPIO2->DIR = 0; #endif }

1137519-player

lib/CMSIS/DSP_Lib/Examples/arm_convolution_example/system_ARMCM0.c

C

lgpl

2,488

/**************************************************************************//** * @file system_ARMCM4.c * @brief CMSIS Cortex-M4 Device System Source File * for CM4 Device Series * @version V1.05 * @date 26. July 2011 * * @note * Copyright (C) 2010-2011 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * ******************************************************************************/ #include "ARMCM4.h" /*---------------------------------------------------------------------------- Define clocks *----------------------------------------------------------------------------*/ #define __HSI ( 8000000UL) #define __XTAL (12000000UL) /* Oscillator frequency */ #define __SYSTEM_CLOCK (4*__XTAL) /*---------------------------------------------------------------------------- Clock Variable definitions *----------------------------------------------------------------------------*/ uint32_t SystemCoreClock = __SYSTEM_CLOCK;/*!< System Clock Frequency (Core Clock)*/ /*---------------------------------------------------------------------------- Clock functions *----------------------------------------------------------------------------*/ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */ { SystemCoreClock = __SYSTEM_CLOCK; } /** * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System. */ void SystemInit (void) { #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) SCB->CPACR |= ((3UL << 10*2) | /* set CP10 Full Access */ (3UL << 11*2) ); /* set CP11 Full Access */ #endif SystemCoreClock = __SYSTEM_CLOCK; #ifdef __USE_GPIO ARM_GPIO0->DATA[0].WORD = 0; ARM_GPIO0->IE = 0; ARM_GPIO0->DIR = 0xff83; ARM_GPIO1->DATA[0].WORD = 0; ARM_GPIO1->IE = 0; ARM_GPIO1->DIR = 0; ARM_GPIO2->DATA[0].WORD = 0; ARM_GPIO2->IE = 0; ARM_GPIO2->DIR = 0; #endif }

1137519-player

lib/CMSIS/DSP_Lib/Examples/arm_convolution_example/system_ARMCM4.c

C

lgpl

2,707

/**************************************************************************//** * @file system_ARMCM3.c * @brief CMSIS Cortex-M3 Device System Source File * for CM3 Device Series * @version V1.05 * @date 26. July 2011 * * @note * Copyright (C) 2010-2011 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * ******************************************************************************/ #include "ARMCM3.h" /*---------------------------------------------------------------------------- Define clocks *----------------------------------------------------------------------------*/ #define __HSI ( 8000000UL) #define __XTAL (12000000UL) /* Oscillator frequency */ #define __SYSTEM_CLOCK (4*__XTAL) /*---------------------------------------------------------------------------- Clock Variable definitions *----------------------------------------------------------------------------*/ uint32_t SystemCoreClock = __SYSTEM_CLOCK;/*!< System Clock Frequency (Core Clock)*/ /*---------------------------------------------------------------------------- Clock functions *----------------------------------------------------------------------------*/ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */ { SystemCoreClock = __SYSTEM_CLOCK; } /** * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System. */ void SystemInit (void) { SystemCoreClock = __SYSTEM_CLOCK; #ifdef __USE_GPIO ARM_GPIO0->DATA[0].WORD = 0; ARM_GPIO0->IE = 0; ARM_GPIO0->DIR = 0xff83; ARM_GPIO1->DATA[0].WORD = 0; ARM_GPIO1->IE = 0; ARM_GPIO1->DIR = 0; ARM_GPIO2->DATA[0].WORD = 0; ARM_GPIO2->IE = 0; ARM_GPIO2->DIR = 0; #endif }

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lib/CMSIS/DSP_Lib/Examples/arm_convolution_example/system_ARMCM3.c

C

lgpl

2,488

;/**************************************************************************//** ; * @file startup_ARMCM4.s ; * @brief CMSIS Cortex-M4 Core Device Startup File ; * for CM4 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; * ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA |.text|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP MemManage_Handler\ PROC EXPORT MemManage_Handler [WEAK] B . ENDP BusFault_Handler\ PROC EXPORT BusFault_Handler [WEAK] B . ENDP UsageFault_Handler\ PROC EXPORT UsageFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP DebugMon_Handler\ PROC EXPORT DebugMon_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END

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lib/CMSIS/DSP_Lib/Examples/arm_sin_cos_example/ARM/startup_ARMCM4.s

Unix Assembly

lgpl

5,000

;/**************************************************************************//** ; * @file startup_ARMCM3.s ; * @brief CMSIS Cortex-M3 Core Device Startup File ; * for CM3 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; * ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA |.text|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP MemManage_Handler\ PROC EXPORT MemManage_Handler [WEAK] B . ENDP BusFault_Handler\ PROC EXPORT BusFault_Handler [WEAK] B . ENDP UsageFault_Handler\ PROC EXPORT UsageFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP DebugMon_Handler\ PROC EXPORT DebugMon_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END

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lib/CMSIS/DSP_Lib/Examples/arm_sin_cos_example/ARM/startup_ARMCM3.s

Unix Assembly

lgpl

5,000

;/**************************************************************************//** ; * @file startup_ARMCM0.s ; * @brief CMSIS Cortex-M0 Core Device Startup File ; * for CM0 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; * ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA |.text|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END

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lib/CMSIS/DSP_Lib/Examples/arm_sin_cos_example/ARM/startup_ARMCM0.s

Motorola 68K Assembly

lgpl

4,363

/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 29. November 2010 * $Revision: V1.0.3 * * Project: CMSIS DSP Library * Title: arm_sin_cos_example_f32.c * * Description: Example code demonstrating sin and cos calculation of input signal. * * Target Processor: Cortex-M4/Cortex-M3 * * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.1 2010/10/05 KK * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 KK * Production release and review comments incorporated. * ------------------------------------------------------------------- */ /** * @ingroup groupExamples */ /** * @defgroup SinCosExample SineCosine Example * * \par Description: * \par * Demonstrates the Pythagorean trignometric identity with the use of Cosine, Sine, Vector * Multiplication, and Vector Addition functions. * * \par Algorithm: * \par * Mathematically, the Pythagorean trignometric identity is defined by the following equation: * <pre>sin(x) * sin(x) + cos(x) * cos(x) = 1</pre> * where \c x is the angle in radians. * * \par Block Diagram: * \par * \image html sinCos.gif * * \par Variables Description: * \par * \li \c testInput_f32 array of input angle in radians * \li \c testOutput stores sum of the squares of sine and cosine values of input angle * * \par CMSIS DSP Software Library Functions Used: * \par * - arm_cos_f32() * - arm_sin_f32() * - arm_mult_f32() * - arm_add_f32() * * Refer * \link arm_sin_cos_example_f32.c \endlink * */ /** \example arm_sin_cos_example_f32.c */ #include <math.h> #include "arm_math.h" /* ---------------------------------------------------------------------- * Defines each of the tests performed * ------------------------------------------------------------------- */ #define MAX_BLOCKSIZE 32 #define DELTA (0.000001f) /* ---------------------------------------------------------------------- * Test input data for Floating point sin_cos example for 32-blockSize * Generated by the MATLAB randn() function * ------------------------------------------------------------------- */ const float32_t testInput_f32[MAX_BLOCKSIZE] = { -1.244916875853235400, -4.793533929171324800, 0.360705030233248850, 0.827929644170887320, -3.299532218312426900, 3.427441903227623800, 3.422401784294607700, -0.108308165334010680, 0.941943896490312180, 0.502609575000365850, -0.537345278736373500, 2.088817392965764500, -1.693168684143455700, 6.283185307179590700, -0.392545884746175080, 0.327893095115825040, 3.070147440456292300, 0.170611405884662230, -0.275275082396073010, -2.395492805446796300, 0.847311163536506600, -3.845517018083148800, 2.055818378415868300, 4.672594161978930800, -1.990923030266425800, 2.469305197656249500, 3.609002606064021000, -4.586736582331667500, -4.147080139136136300, 1.643756718868359500, -1.150866392366494800, 1.985805026477433800 }; const float32_t testRefOutput_f32 = 1.000000000; /* ---------------------------------------------------------------------- * Declare Global variables * ------------------------------------------------------------------- */ uint32_t blockSize = 32; float32_t testOutput; float32_t cosOutput; float32_t sinOutput; float32_t cosSquareOutput; float32_t sinSquareOutput; /* ---------------------------------------------------------------------- * Max magnitude FFT Bin test * ------------------------------------------------------------------- */ arm_status status; int32_t main(void) { float32_t diff; uint32_t i; for(i=0; i< blockSize; i++) { cosOutput = arm_cos_f32(testInput_f32[i]); sinOutput = arm_sin_f32(testInput_f32[i]); arm_mult_f32(&cosOutput, &cosOutput, &cosSquareOutput, 1); arm_mult_f32(&sinOutput, &sinOutput, &sinSquareOutput, 1); arm_add_f32(&cosSquareOutput, &sinSquareOutput, &testOutput, 1); /* absolute value of difference between ref and test */ diff = fabsf(testRefOutput_f32 - testOutput); /* Comparison of sin_cos value with reference */ if(diff > DELTA) { status = ARM_MATH_TEST_FAILURE; } if( status == ARM_MATH_TEST_FAILURE) { while(1); } } while(1); /* main function does not return */ } /** \endlink */

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lib/CMSIS/DSP_Lib/Examples/arm_sin_cos_example/arm_sin_cos_example_f32.c

C

lgpl

4,704

/**************************************************************************//** * @file system_ARMCM0.c * @brief CMSIS Cortex-M0 Device System Source File * for CM0 Device Series * @version V1.05 * @date 26. July 2011 * * @note * Copyright (C) 2010-2011 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * ******************************************************************************/ #include "ARMCM0.h" /*---------------------------------------------------------------------------- Define clocks *----------------------------------------------------------------------------*/ #define __HSI ( 8000000UL) #define __XTAL (12000000UL) /* Oscillator frequency */ #define __SYSTEM_CLOCK (4*__XTAL) /*---------------------------------------------------------------------------- Clock Variable definitions *----------------------------------------------------------------------------*/ uint32_t SystemCoreClock = __SYSTEM_CLOCK;/*!< System Clock Frequency (Core Clock)*/ /*---------------------------------------------------------------------------- Clock functions *----------------------------------------------------------------------------*/ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */ { SystemCoreClock = __SYSTEM_CLOCK; } /** * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System. */ void SystemInit (void) { SystemCoreClock = __SYSTEM_CLOCK; #ifdef __USE_GPIO ARM_GPIO0->DATA[0].WORD = 0; ARM_GPIO0->IE = 0; ARM_GPIO0->DIR = 0xff83; ARM_GPIO1->DATA[0].WORD = 0; ARM_GPIO1->IE = 0; ARM_GPIO1->DIR = 0; ARM_GPIO2->DATA[0].WORD = 0; ARM_GPIO2->IE = 0; ARM_GPIO2->DIR = 0; #endif }

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lib/CMSIS/DSP_Lib/Examples/arm_sin_cos_example/system_ARMCM0.c

C

lgpl

2,488

/**************************************************************************//** * @file system_ARMCM4.c * @brief CMSIS Cortex-M4 Device System Source File * for CM4 Device Series * @version V1.05 * @date 26. July 2011 * * @note * Copyright (C) 2010-2011 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * ******************************************************************************/ #include "ARMCM4.h" /*---------------------------------------------------------------------------- Define clocks *----------------------------------------------------------------------------*/ #define __HSI ( 8000000UL) #define __XTAL (12000000UL) /* Oscillator frequency */ #define __SYSTEM_CLOCK (4*__XTAL) /*---------------------------------------------------------------------------- Clock Variable definitions *----------------------------------------------------------------------------*/ uint32_t SystemCoreClock = __SYSTEM_CLOCK;/*!< System Clock Frequency (Core Clock)*/ /*---------------------------------------------------------------------------- Clock functions *----------------------------------------------------------------------------*/ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */ { SystemCoreClock = __SYSTEM_CLOCK; } /** * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System. */ void SystemInit (void) { #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) SCB->CPACR |= ((3UL << 10*2) | /* set CP10 Full Access */ (3UL << 11*2) ); /* set CP11 Full Access */ #endif SystemCoreClock = __SYSTEM_CLOCK; #ifdef __USE_GPIO ARM_GPIO0->DATA[0].WORD = 0; ARM_GPIO0->IE = 0; ARM_GPIO0->DIR = 0xff83; ARM_GPIO1->DATA[0].WORD = 0; ARM_GPIO1->IE = 0; ARM_GPIO1->DIR = 0; ARM_GPIO2->DATA[0].WORD = 0; ARM_GPIO2->IE = 0; ARM_GPIO2->DIR = 0; #endif }

1137519-player

lib/CMSIS/DSP_Lib/Examples/arm_sin_cos_example/system_ARMCM4.c

C

lgpl

2,707

/**************************************************************************//** * @file system_ARMCM3.c * @brief CMSIS Cortex-M3 Device System Source File * for CM3 Device Series * @version V1.05 * @date 26. July 2011 * * @note * Copyright (C) 2010-2011 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * ******************************************************************************/ #include "ARMCM3.h" /*---------------------------------------------------------------------------- Define clocks *----------------------------------------------------------------------------*/ #define __HSI ( 8000000UL) #define __XTAL (12000000UL) /* Oscillator frequency */ #define __SYSTEM_CLOCK (4*__XTAL) /*---------------------------------------------------------------------------- Clock Variable definitions *----------------------------------------------------------------------------*/ uint32_t SystemCoreClock = __SYSTEM_CLOCK;/*!< System Clock Frequency (Core Clock)*/ /*---------------------------------------------------------------------------- Clock functions *----------------------------------------------------------------------------*/ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */ { SystemCoreClock = __SYSTEM_CLOCK; } /** * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System. */ void SystemInit (void) { SystemCoreClock = __SYSTEM_CLOCK; #ifdef __USE_GPIO ARM_GPIO0->DATA[0].WORD = 0; ARM_GPIO0->IE = 0; ARM_GPIO0->DIR = 0xff83; ARM_GPIO1->DATA[0].WORD = 0; ARM_GPIO1->IE = 0; ARM_GPIO1->DIR = 0; ARM_GPIO2->DATA[0].WORD = 0; ARM_GPIO2->IE = 0; ARM_GPIO2->DIR = 0; #endif }

1137519-player

lib/CMSIS/DSP_Lib/Examples/arm_sin_cos_example/system_ARMCM3.c

C

lgpl

2,488

;/**************************************************************************//** ; * @file startup_ARMCM4.s ; * @brief CMSIS Cortex-M4 Core Device Startup File ; * for CM4 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; * ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA |.text|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP MemManage_Handler\ PROC EXPORT MemManage_Handler [WEAK] B . ENDP BusFault_Handler\ PROC EXPORT BusFault_Handler [WEAK] B . ENDP UsageFault_Handler\ PROC EXPORT UsageFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP DebugMon_Handler\ PROC EXPORT DebugMon_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END

1137519-player

lib/CMSIS/DSP_Lib/Examples/arm_fir_example/ARM/startup_ARMCM4.s

Unix Assembly

lgpl

5,000

;/**************************************************************************//** ; * @file startup_ARMCM3.s ; * @brief CMSIS Cortex-M3 Core Device Startup File ; * for CM3 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; * ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA |.text|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP MemManage_Handler\ PROC EXPORT MemManage_Handler [WEAK] B . ENDP BusFault_Handler\ PROC EXPORT BusFault_Handler [WEAK] B . ENDP UsageFault_Handler\ PROC EXPORT UsageFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP DebugMon_Handler\ PROC EXPORT DebugMon_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END

1137519-player

lib/CMSIS/DSP_Lib/Examples/arm_fir_example/ARM/startup_ARMCM3.s

Unix Assembly

lgpl

5,000

;/**************************************************************************//** ; * @file startup_ARMCM0.s ; * @brief CMSIS Cortex-M0 Core Device Startup File ; * for CM0 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; * ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA |.text|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END

1137519-player

lib/CMSIS/DSP_Lib/Examples/arm_fir_example/ARM/startup_ARMCM0.s

Motorola 68K Assembly

lgpl

4,363

/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 29. November 2010 * $Revision: V1.0.3 * * Project: CMSIS DSP Library * Title: arm_fir_example_f32.c * * Description: Example code demonstrating how an FIR filter can be used * as a low pass filter. * * Target Processor: Cortex-M4/Cortex-M3 * * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.1 2010/10/05 KK * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 KK * Production release and review comments incorporated. * ------------------------------------------------------------------- */ /** * @ingroup groupExamples */ /** * @defgroup FIRLPF FIR Lowpass Filter Example * * \par Description: * \par * Removes high frequency signal components from the input using an FIR lowpass filter. * The example demonstrates how to configure an FIR filter and then pass data through * it in a block-by-block fashion. * \image html FIRLPF_signalflow.gif * * \par Algorithm: * \par * The input signal is a sum of two sine waves: 1 kHz and 15 kHz. * This is processed by an FIR lowpass filter with cutoff frequency 6 kHz. * The lowpass filter eliminates the 15 kHz signal leaving only the 1 kHz sine wave at the output. * \par * The lowpass filter was designed using MATLAB with a sample rate of 48 kHz and * a length of 29 points. * The MATLAB code to generate the filter coefficients is shown below: * <pre> * h = fir1(28, 6/24); * </pre> * The first argument is the "order" of the filter and is always one less than the desired length. * The second argument is the normalized cutoff frequency. This is in the range 0 (DC) to 1.0 (Nyquist). * A 6 kHz cutoff with a Nyquist frequency of 24 kHz lies at a normalized frequency of 6/24 = 0.25. * The CMSIS FIR filter function requires the coefficients to be in time reversed order. * <pre> * fliplr(h) * </pre> * The resulting filter coefficients and are shown below. * Note that the filter is symmetric (a property of linear phase FIR filters) * and the point of symmetry is sample 14. Thus the filter will have a delay of * 14 samples for all frequencies. * \par * \image html FIRLPF_coeffs.gif * \par * The frequency response of the filter is shown next. * The passband gain of the filter is 1.0 and it reaches 0.5 at the cutoff frequency 6 kHz. * \par * \image html FIRLPF_response.gif * \par * The input signal is shown below. * The left hand side shows the signal in the time domain while the right hand side is a frequency domain representation. * The two sine wave components can be clearly seen. * \par * \image html FIRLPF_input.gif * \par * The output of the filter is shown below. The 15 kHz component has been eliminated. * \par * \image html FIRLPF_output.gif * * \par Variables Description: * \par * \li \c testInput_f32_1kHz_15kHz points to the input data * \li \c refOutput points to the reference output data * \li \c testOutput points to the test output data * \li \c firStateF32 points to state buffer * \li \c firCoeffs32 points to coefficient buffer * \li \c blockSize number of samples processed at a time * \li \c numBlocks number of frames * * \par CMSIS DSP Software Library Functions Used: * \par * - arm_fir_init_f32() * - arm_fir_f32() * * Refer * \link arm_fir_example_f32.c \endlink * */ /** \example arm_fir_example_f32.c */ /* ---------------------------------------------------------------------- ** Include Files ** ------------------------------------------------------------------- */ #include "arm_math.h" #include "math_helper.h" /* ---------------------------------------------------------------------- ** Macro Defines ** ------------------------------------------------------------------- */ #define TEST_LENGTH_SAMPLES 320 #define SNR_THRESHOLD_F32 140.0f #define BLOCK_SIZE 32 #define NUM_TAPS 29 /* ------------------------------------------------------------------- * The input signal and reference output (computed with MATLAB) * are defined externally in arm_fir_lpf_data.c. * ------------------------------------------------------------------- */ extern float32_t testInput_f32_1kHz_15kHz[TEST_LENGTH_SAMPLES]; extern float32_t refOutput[TEST_LENGTH_SAMPLES]; /* ------------------------------------------------------------------- * Declare Test output buffer * ------------------------------------------------------------------- */ static float32_t testOutput[TEST_LENGTH_SAMPLES]; /* ------------------------------------------------------------------- * Declare State buffer of size (numTaps + blockSize - 1) * ------------------------------------------------------------------- */ static float32_t firStateF32[BLOCK_SIZE + NUM_TAPS - 1]; /* ---------------------------------------------------------------------- ** FIR Coefficients buffer generated using fir1() MATLAB function. ** fir1(28, 6/24) ** ------------------------------------------------------------------- */ const float32_t firCoeffs32[NUM_TAPS] = { -0.0018225230f, -0.0015879294f, +0.0000000000f, +0.0036977508f, +0.0080754303f, +0.0085302217f, -0.0000000000f, -0.0173976984f, -0.0341458607f, -0.0333591565f, +0.0000000000f, +0.0676308395f, +0.1522061835f, +0.2229246956f, +0.2504960933f, +0.2229246956f, +0.1522061835f, +0.0676308395f, +0.0000000000f, -0.0333591565f, -0.0341458607f, -0.0173976984f, -0.0000000000f, +0.0085302217f, +0.0080754303f, +0.0036977508f, +0.0000000000f, -0.0015879294f, -0.0018225230f }; /* ------------------------------------------------------------------ * Global variables for FIR LPF Example * ------------------------------------------------------------------- */ uint32_t blockSize = BLOCK_SIZE; uint32_t numBlocks = TEST_LENGTH_SAMPLES/BLOCK_SIZE; float32_t snr; /* ---------------------------------------------------------------------- * FIR LPF Example * ------------------------------------------------------------------- */ int32_t main(void) { uint32_t i; arm_fir_instance_f32 S; arm_status status; float32_t *inputF32, *outputF32; /* Initialize input and output buffer pointers */ inputF32 = &testInput_f32_1kHz_15kHz[0]; outputF32 = &testOutput[0]; /* Call FIR init function to initialize the instance structure. */ arm_fir_init_f32(&S, NUM_TAPS, (float32_t *)&firCoeffs32[0], &firStateF32[0], blockSize); /* ---------------------------------------------------------------------- ** Call the FIR process function for every blockSize samples ** ------------------------------------------------------------------- */ for(i=0; i < numBlocks; i++) { arm_fir_f32(&S, inputF32 + (i * blockSize), outputF32 + (i * blockSize), blockSize); } /* ---------------------------------------------------------------------- ** Compare the generated output against the reference output computed ** in MATLAB. ** ------------------------------------------------------------------- */ snr = arm_snr_f32(&refOutput[0], &testOutput[0], TEST_LENGTH_SAMPLES); if (snr < SNR_THRESHOLD_F32) { status = ARM_MATH_TEST_FAILURE; } else { status = ARM_MATH_SUCCESS; } /* ---------------------------------------------------------------------- ** Loop here if the signal does not match the reference output. ** ------------------------------------------------------------------- */ if( status != ARM_MATH_SUCCESS) { while(1); } while(1); /* main function does not return */ } /** \endlink */

1137519-player

lib/CMSIS/DSP_Lib/Examples/arm_fir_example/arm_fir_example_f32.c

C

lgpl

8,124

#include "arm_math.h" /* ---------------------------------------------------------------------- ** Test input signal contains 1000Hz + 15000 Hz ** ------------------------------------------------------------------- */ float32_t testInput_f32_1kHz_15kHz[320] = { +0.0000000000f, +0.5924659585f, -0.0947343455f, +0.1913417162f, +1.0000000000f, +0.4174197128f, +0.3535533906f, +1.2552931065f, +0.8660254038f, +0.4619397663f, +1.3194792169f, +1.1827865776f, +0.5000000000f, +1.1827865776f, +1.3194792169f, +0.4619397663f, +0.8660254038f, +1.2552931065f, +0.3535533906f, +0.4174197128f, +1.0000000000f, +0.1913417162f, -0.0947343455f, +0.5924659585f, -0.0000000000f, -0.5924659585f, +0.0947343455f, -0.1913417162f, -1.0000000000f, -0.4174197128f, -0.3535533906f, -1.2552931065f, -0.8660254038f, -0.4619397663f, -1.3194792169f, -1.1827865776f, -0.5000000000f, -1.1827865776f, -1.3194792169f, -0.4619397663f, -0.8660254038f, -1.2552931065f, -0.3535533906f, -0.4174197128f, -1.0000000000f, -0.1913417162f, +0.0947343455f, -0.5924659585f, +0.0000000000f, +0.5924659585f, -0.0947343455f, +0.1913417162f, +1.0000000000f, +0.4174197128f, +0.3535533906f, +1.2552931065f, +0.8660254038f, +0.4619397663f, +1.3194792169f, +1.1827865776f, +0.5000000000f, +1.1827865776f, +1.3194792169f, +0.4619397663f, +0.8660254038f, +1.2552931065f, +0.3535533906f, +0.4174197128f, +1.0000000000f, +0.1913417162f, -0.0947343455f, +0.5924659585f, +0.0000000000f, -0.5924659585f, +0.0947343455f, -0.1913417162f, -1.0000000000f, -0.4174197128f, -0.3535533906f, -1.2552931065f, -0.8660254038f, -0.4619397663f, -1.3194792169f, -1.1827865776f, -0.5000000000f, -1.1827865776f, -1.3194792169f, -0.4619397663f, -0.8660254038f, -1.2552931065f, -0.3535533906f, -0.4174197128f, -1.0000000000f, -0.1913417162f, +0.0947343455f, -0.5924659585f, +0.0000000000f, +0.5924659585f, -0.0947343455f, +0.1913417162f, +1.0000000000f, +0.4174197128f, +0.3535533906f, +1.2552931065f, +0.8660254038f, +0.4619397663f, +1.3194792169f, +1.1827865776f, +0.5000000000f, +1.1827865776f, +1.3194792169f, +0.4619397663f, +0.8660254038f, +1.2552931065f, +0.3535533906f, +0.4174197128f, +1.0000000000f, +0.1913417162f, -0.0947343455f, +0.5924659585f, +0.0000000000f, -0.5924659585f, +0.0947343455f, -0.1913417162f, -1.0000000000f, -0.4174197128f, -0.3535533906f, -1.2552931065f, -0.8660254038f, -0.4619397663f, -1.3194792169f, -1.1827865776f, -0.5000000000f, -1.1827865776f, -1.3194792169f, -0.4619397663f, -0.8660254038f, -1.2552931065f, -0.3535533906f, -0.4174197128f, -1.0000000000f, -0.1913417162f, +0.0947343455f, -0.5924659585f, -0.0000000000f, +0.5924659585f, -0.0947343455f, +0.1913417162f, +1.0000000000f, +0.4174197128f, +0.3535533906f, +1.2552931065f, +0.8660254038f, +0.4619397663f, +1.3194792169f, +1.1827865776f, +0.5000000000f, +1.1827865776f, +1.3194792169f, +0.4619397663f, +0.8660254038f, +1.2552931065f, +0.3535533906f, +0.4174197128f, +1.0000000000f, +0.1913417162f, -0.0947343455f, +0.5924659585f, -0.0000000000f, -0.5924659585f, +0.0947343455f, -0.1913417162f, -1.0000000000f, -0.4174197128f, -0.3535533906f, -1.2552931065f, -0.8660254038f, -0.4619397663f, -1.3194792169f, -1.1827865776f, -0.5000000000f, -1.1827865776f, -1.3194792169f, -0.4619397663f, -0.8660254038f, -1.2552931065f, -0.3535533906f, -0.4174197128f, -1.0000000000f, -0.1913417162f, +0.0947343455f, -0.5924659585f, +0.0000000000f, +0.5924659585f, -0.0947343455f, +0.1913417162f, +1.0000000000f, +0.4174197128f, +0.3535533906f, +1.2552931065f, +0.8660254038f, +0.4619397663f, +1.3194792169f, +1.1827865776f, +0.5000000000f, +1.1827865776f, +1.3194792169f, +0.4619397663f, +0.8660254038f, +1.2552931065f, +0.3535533906f, +0.4174197128f, +1.0000000000f, +0.1913417162f, -0.0947343455f, +0.5924659585f, +0.0000000000f, -0.5924659585f, +0.0947343455f, -0.1913417162f, -1.0000000000f, -0.4174197128f, -0.3535533906f, -1.2552931065f, -0.8660254038f, -0.4619397663f, -1.3194792169f, -1.1827865776f, -0.5000000000f, -1.1827865776f, -1.3194792169f, -0.4619397663f, -0.8660254038f, -1.2552931065f, -0.3535533906f, -0.4174197128f, -1.0000000000f, -0.1913417162f, +0.0947343455f, -0.5924659585f, -0.0000000000f, +0.5924659585f, -0.0947343455f, +0.1913417162f, +1.0000000000f, +0.4174197128f, +0.3535533906f, +1.2552931065f, +0.8660254038f, +0.4619397663f, +1.3194792169f, +1.1827865776f, +0.5000000000f, +1.1827865776f, +1.3194792169f, +0.4619397663f, +0.8660254038f, +1.2552931065f, +0.3535533906f, +0.4174197128f, +1.0000000000f, +0.1913417162f, -0.0947343455f, +0.5924659585f, +0.0000000000f, -0.5924659585f, +0.0947343455f, -0.1913417162f, -1.0000000000f, -0.4174197128f, -0.3535533906f, -1.2552931065f, -0.8660254038f, -0.4619397663f, -1.3194792169f, -1.1827865776f, -0.5000000000f, -1.1827865776f, -1.3194792169f, -0.4619397663f, -0.8660254038f, -1.2552931065f, -0.3535533906f, -0.4174197128f, -1.0000000000f, -0.1913417162f, +0.0947343455f, -0.5924659585f, -0.0000000000f, +0.5924659585f, -0.0947343455f, +0.1913417162f, +1.0000000000f, +0.4174197128f, +0.3535533906f, +1.2552931065f, +0.8660254038f, +0.4619397663f, +1.3194792169f, +1.1827865776f, +0.5000000000f, +1.1827865776f, +1.3194792169f, +0.4619397663f, +0.8660254038f, +1.2552931065f, +0.3535533906f, +0.4174197128f, +1.0000000000f, +0.1913417162f, -0.0947343455f, +0.5924659585f, +0.0000000000f, -0.5924659585f, +0.0947343455f, -0.1913417162f, -1.0000000000f, -0.4174197128f, -0.3535533906f, -1.2552931065f, }; float32_t refOutput[320] = { +0.0000000000f, -0.0010797829f, -0.0007681386f, -0.0001982932f, +0.0000644313f, +0.0020854271f, +0.0036891871f, +0.0015855941f, -0.0026280805f, -0.0075907658f, -0.0119390538f, -0.0086665968f, +0.0088981202f, +0.0430539279f, +0.0974468742f, +0.1740405600f, +0.2681416601f, +0.3747720089f, +0.4893362230f, +0.6024154672f, +0.7058740791f, +0.7968348987f, +0.8715901940f, +0.9277881093f, +0.9682182661f, +0.9934674267f, +1.0012052245f, +0.9925859371f, +0.9681538347f, +0.9257026822f, +0.8679010068f, +0.7952493046f, +0.7085021596f, +0.6100062330f, +0.5012752767f, +0.3834386057f, +0.2592435399f, +0.1309866321f, -0.0000000000f, -0.1309866321f, -0.2592435399f, -0.3834386057f, -0.5012752767f, -0.6100062330f, -0.7085021596f, -0.7952493046f, -0.8679010068f, -0.9257026822f, -0.9681538347f, -0.9936657199f, -1.0019733630f, -0.9936657199f, -0.9681538347f, -0.9257026822f, -0.8679010068f, -0.7952493046f, -0.7085021596f, -0.6100062330f, -0.5012752767f, -0.3834386057f, -0.2592435399f, -0.1309866321f, +0.0000000000f, +0.1309866321f, +0.2592435399f, +0.3834386057f, +0.5012752767f, +0.6100062330f, +0.7085021596f, +0.7952493046f, +0.8679010068f, +0.9257026822f, +0.9681538347f, +0.9936657199f, +1.0019733630f, +0.9936657199f, +0.9681538347f, +0.9257026822f, +0.8679010068f, +0.7952493046f, +0.7085021596f, +0.6100062330f, +0.5012752767f, +0.3834386057f, +0.2592435399f, +0.1309866321f, -0.0000000000f, -0.1309866321f, -0.2592435399f, -0.3834386057f, -0.5012752767f, -0.6100062330f, -0.7085021596f, -0.7952493046f, -0.8679010068f, -0.9257026822f, -0.9681538347f, -0.9936657199f, -1.0019733630f, -0.9936657199f, -0.9681538347f, -0.9257026822f, -0.8679010068f, -0.7952493046f, -0.7085021596f, -0.6100062330f, -0.5012752767f, -0.3834386057f, -0.2592435399f, -0.1309866321f, +0.0000000000f, +0.1309866321f, +0.2592435399f, +0.3834386057f, +0.5012752767f, +0.6100062330f, +0.7085021596f, +0.7952493046f, +0.8679010068f, +0.9257026822f, +0.9681538347f, +0.9936657199f, +1.0019733630f, +0.9936657199f, +0.9681538347f, +0.9257026822f, +0.8679010068f, +0.7952493046f, +0.7085021596f, +0.6100062330f, +0.5012752767f, +0.3834386057f, +0.2592435399f, +0.1309866321f, -0.0000000000f, -0.1309866321f, -0.2592435399f, -0.3834386057f, -0.5012752767f, -0.6100062330f, -0.7085021596f, -0.7952493046f, -0.8679010068f, -0.9257026822f, -0.9681538347f, -0.9936657199f, -1.0019733630f, -0.9936657199f, -0.9681538347f, -0.9257026822f, -0.8679010068f, -0.7952493046f, -0.7085021596f, -0.6100062330f, -0.5012752767f, -0.3834386057f, -0.2592435399f, -0.1309866321f, +0.0000000000f, +0.1309866321f, +0.2592435399f, +0.3834386057f, +0.5012752767f, +0.6100062330f, +0.7085021596f, +0.7952493046f, +0.8679010068f, +0.9257026822f, +0.9681538347f, +0.9936657199f, +1.0019733630f, +0.9936657199f, +0.9681538347f, +0.9257026822f, +0.8679010068f, +0.7952493046f, +0.7085021596f, +0.6100062330f, +0.5012752767f, +0.3834386057f, +0.2592435399f, +0.1309866321f, +0.0000000000f, -0.1309866321f, -0.2592435399f, -0.3834386057f, -0.5012752767f, -0.6100062330f, -0.7085021596f, -0.7952493046f, -0.8679010068f, -0.9257026822f, -0.9681538347f, -0.9936657199f, -1.0019733630f, -0.9936657199f, -0.9681538347f, -0.9257026822f, -0.8679010068f, -0.7952493046f, -0.7085021596f, -0.6100062330f, -0.5012752767f, -0.3834386057f, -0.2592435399f, -0.1309866321f, +0.0000000000f, +0.1309866321f, +0.2592435399f, +0.3834386057f, +0.5012752767f, +0.6100062330f, +0.7085021596f, +0.7952493046f, +0.8679010068f, +0.9257026822f, +0.9681538347f, +0.9936657199f, +1.0019733630f, +0.9936657199f, +0.9681538347f, +0.9257026822f, +0.8679010068f, +0.7952493046f, +0.7085021596f, +0.6100062330f, +0.5012752767f, +0.3834386057f, +0.2592435399f, +0.1309866321f, +0.0000000000f, -0.1309866321f, -0.2592435399f, -0.3834386057f, -0.5012752767f, -0.6100062330f, -0.7085021596f, -0.7952493046f, -0.8679010068f, -0.9257026822f, -0.9681538347f, -0.9936657199f, -1.0019733630f, -0.9936657199f, -0.9681538347f, -0.9257026822f, -0.8679010068f, -0.7952493046f, -0.7085021596f, -0.6100062330f, -0.5012752767f, -0.3834386057f, -0.2592435399f, -0.1309866321f, -0.0000000000f, +0.1309866321f, +0.2592435399f, +0.3834386057f, +0.5012752767f, +0.6100062330f, +0.7085021596f, +0.7952493046f, +0.8679010068f, +0.9257026822f, +0.9681538347f, +0.9936657199f, +1.0019733630f, +0.9936657199f, +0.9681538347f, +0.9257026822f, +0.8679010068f, +0.7952493046f, +0.7085021596f, +0.6100062330f, +0.5012752767f, +0.3834386057f, +0.2592435399f, +0.1309866321f, +0.0000000000f, -0.1309866321f, -0.2592435399f, -0.3834386057f, -0.5012752767f, -0.6100062330f, -0.7085021596f, -0.7952493046f, -0.8679010068f, -0.9257026822f, -0.9681538347f, -0.9936657199f, -1.0019733630f, -0.9936657199f, -0.9681538347f, -0.9257026822f, -0.8679010068f, -0.7952493046f, -0.7085021596f, -0.6100062330f, -0.5012752767f, -0.3834386057f, -0.2592435399f, -0.1309866321f, +0.0000000000f, +0.1309866321f, +0.2592435399f, +0.3834386057f, +0.5012752767f, +0.6100062330f, +0.7085021596f, +0.7952493046f, +0.8679010068f, +0.9257026822f, +0.9681538347f, +0.9936657199f, +1.0019733630f, +0.9936657199f, +0.9681538347f, +0.9257026822f, +0.8679010068f, +0.7952493046f };

1137519-player

lib/CMSIS/DSP_Lib/Examples/arm_fir_example/arm_fir_data.c

C

lgpl

10,621

/**************************************************************************//** * @file system_ARMCM0.c * @brief CMSIS Cortex-M0 Device System Source File * for CM0 Device Series * @version V1.05 * @date 26. July 2011 * * @note * Copyright (C) 2010-2011 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * ******************************************************************************/ #include "ARMCM0.h" /*---------------------------------------------------------------------------- Define clocks *----------------------------------------------------------------------------*/ #define __HSI ( 8000000UL) #define __XTAL (12000000UL) /* Oscillator frequency */ #define __SYSTEM_CLOCK (4*__XTAL) /*---------------------------------------------------------------------------- Clock Variable definitions *----------------------------------------------------------------------------*/ uint32_t SystemCoreClock = __SYSTEM_CLOCK;/*!< System Clock Frequency (Core Clock)*/ /*---------------------------------------------------------------------------- Clock functions *----------------------------------------------------------------------------*/ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */ { SystemCoreClock = __SYSTEM_CLOCK; } /** * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System. */ void SystemInit (void) { SystemCoreClock = __SYSTEM_CLOCK; #ifdef __USE_GPIO ARM_GPIO0->DATA[0].WORD = 0; ARM_GPIO0->IE = 0; ARM_GPIO0->DIR = 0xff83; ARM_GPIO1->DATA[0].WORD = 0; ARM_GPIO1->IE = 0; ARM_GPIO1->DIR = 0; ARM_GPIO2->DATA[0].WORD = 0; ARM_GPIO2->IE = 0; ARM_GPIO2->DIR = 0; #endif }

1137519-player

lib/CMSIS/DSP_Lib/Examples/arm_fir_example/system_ARMCM0.c

C

lgpl

2,488

/**************************************************************************//** * @file system_ARMCM4.c * @brief CMSIS Cortex-M4 Device System Source File * for CM4 Device Series * @version V1.05 * @date 26. July 2011 * * @note * Copyright (C) 2010-2011 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * ******************************************************************************/ #include "ARMCM4.h" /*---------------------------------------------------------------------------- Define clocks *----------------------------------------------------------------------------*/ #define __HSI ( 8000000UL) #define __XTAL (12000000UL) /* Oscillator frequency */ #define __SYSTEM_CLOCK (4*__XTAL) /*---------------------------------------------------------------------------- Clock Variable definitions *----------------------------------------------------------------------------*/ uint32_t SystemCoreClock = __SYSTEM_CLOCK;/*!< System Clock Frequency (Core Clock)*/ /*---------------------------------------------------------------------------- Clock functions *----------------------------------------------------------------------------*/ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */ { SystemCoreClock = __SYSTEM_CLOCK; } /** * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System. */ void SystemInit (void) { #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) SCB->CPACR |= ((3UL << 10*2) | /* set CP10 Full Access */ (3UL << 11*2) ); /* set CP11 Full Access */ #endif SystemCoreClock = __SYSTEM_CLOCK; #ifdef __USE_GPIO ARM_GPIO0->DATA[0].WORD = 0; ARM_GPIO0->IE = 0; ARM_GPIO0->DIR = 0xff83; ARM_GPIO1->DATA[0].WORD = 0; ARM_GPIO1->IE = 0; ARM_GPIO1->DIR = 0; ARM_GPIO2->DATA[0].WORD = 0; ARM_GPIO2->IE = 0; ARM_GPIO2->DIR = 0; #endif }

1137519-player

lib/CMSIS/DSP_Lib/Examples/arm_fir_example/system_ARMCM4.c

C

lgpl

2,707

/**************************************************************************//** * @file system_ARMCM3.c * @brief CMSIS Cortex-M3 Device System Source File * for CM3 Device Series * @version V1.05 * @date 26. July 2011 * * @note * Copyright (C) 2010-2011 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * ******************************************************************************/ #include "ARMCM3.h" /*---------------------------------------------------------------------------- Define clocks *----------------------------------------------------------------------------*/ #define __HSI ( 8000000UL) #define __XTAL (12000000UL) /* Oscillator frequency */ #define __SYSTEM_CLOCK (4*__XTAL) /*---------------------------------------------------------------------------- Clock Variable definitions *----------------------------------------------------------------------------*/ uint32_t SystemCoreClock = __SYSTEM_CLOCK;/*!< System Clock Frequency (Core Clock)*/ /*---------------------------------------------------------------------------- Clock functions *----------------------------------------------------------------------------*/ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */ { SystemCoreClock = __SYSTEM_CLOCK; } /** * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System. */ void SystemInit (void) { SystemCoreClock = __SYSTEM_CLOCK; #ifdef __USE_GPIO ARM_GPIO0->DATA[0].WORD = 0; ARM_GPIO0->IE = 0; ARM_GPIO0->DIR = 0xff83; ARM_GPIO1->DATA[0].WORD = 0; ARM_GPIO1->IE = 0; ARM_GPIO1->DIR = 0; ARM_GPIO2->DATA[0].WORD = 0; ARM_GPIO2->IE = 0; ARM_GPIO2->DIR = 0; #endif }

1137519-player

lib/CMSIS/DSP_Lib/Examples/arm_fir_example/system_ARMCM3.c

C

lgpl

2,488

;/**************************************************************************//** ; * @file startup_ARMCM4.s ; * @brief CMSIS Cortex-M4 Core Device Startup File ; * for CM4 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; * ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA |.text|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP MemManage_Handler\ PROC EXPORT MemManage_Handler [WEAK] B . ENDP BusFault_Handler\ PROC EXPORT BusFault_Handler [WEAK] B . ENDP UsageFault_Handler\ PROC EXPORT UsageFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP DebugMon_Handler\ PROC EXPORT DebugMon_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END

1137519-player

lib/CMSIS/DSP_Lib/Examples/arm_linear_interp_example/ARM/startup_ARMCM4.s

Unix Assembly

lgpl

5,000

;/**************************************************************************//** ; * @file startup_ARMCM3.s ; * @brief CMSIS Cortex-M3 Core Device Startup File ; * for CM3 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; * ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA |.text|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP MemManage_Handler\ PROC EXPORT MemManage_Handler [WEAK] B . ENDP BusFault_Handler\ PROC EXPORT BusFault_Handler [WEAK] B . ENDP UsageFault_Handler\ PROC EXPORT UsageFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP DebugMon_Handler\ PROC EXPORT DebugMon_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END

1137519-player

lib/CMSIS/DSP_Lib/Examples/arm_linear_interp_example/ARM/startup_ARMCM3.s

Unix Assembly

lgpl

5,000

;/**************************************************************************//** ; * @file startup_ARMCM0.s ; * @brief CMSIS Cortex-M0 Core Device Startup File ; * for CM0 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; * ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA |.text|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END

1137519-player

lib/CMSIS/DSP_Lib/Examples/arm_linear_interp_example/ARM/startup_ARMCM0.s

Motorola 68K Assembly

lgpl

4,363

/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 29. November 2010 * $Revision: V1.0.3 * * Project: CMSIS DSP Library * Title: arm_linear_interp_example_f32.c * * Description: Example code demonstrating usage of sin function * and uses linear interpolation to get higher precision * * Target Processor: Cortex-M4/Cortex-M3 * * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.1 2010/10/05 KK * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 KK * Production release and review comments incorporated. * ------------------------------------------------------------------- */ /** * @ingroup groupExamples */ /** * @defgroup LinearInterpExample Linear Interpolate Example * * CMSIS DSP Software Library -- Linear Interpolate Example * * Description * This example demonstrates usage of linear interpolate modules and fast math modules. * Method 1 uses fast math sine function to calculate sine values using cubic interpolation and method 2 uses * linear interpolation function and results are compared to reference output. * Example shows linear interpolation function can be used to get higher precision compared to fast math sin calculation. * * \par Block Diagram: * \par * \image html linearInterpExampleMethod1.gif "Method 1: Sine caluclation using fast math" * \par * \image html linearInterpExampleMethod2.gif "Method 2: Sine caluclation using interpolation function" * * \par Variables Description: * \par * \li \c testInputSin_f32 points to the input values for sine calculation * \li \c testRefSinOutput32_f32 points to the reference values caculated from sin() matlab function * \li \c testOutput points to output buffer calculation from cubic interpolation * \li \c testLinIntOutput points to output buffer calculation from linear interpolation * \li \c snr1 Signal to noise ratio for reference and cubic interpolation output * \li \c snr2 Signal to noise ratio for reference and linear interpolation output * * \par CMSIS DSP Software Library Functions Used: * \par * - arm_sin_f32() * - arm_linear_interp_f32() * * Refer * \link arm_linear_interp_example_f32.c \endlink * */ /** \example arm_linear_interp_example_f32.c */ #include "arm_math.h" #include "math_helper.h" #define SNR_THRESHOLD 90 #define TEST_LENGTH_SAMPLES 10 #define XSPACING (0.00005f) /* ---------------------------------------------------------------------- * Test input data for F32 SIN function * Generated by the MATLAB rand() function * randn('state', 0) * xi = (((1/4.18318581819710)* randn(blockSize, 1) * 2* pi)); * --------------------------------------------------------------------*/ float32_t testInputSin_f32[TEST_LENGTH_SAMPLES] = { -0.649716504673081170, -2.501723745497831200, 0.188250329003310100, 0.432092748487532540, -1.722010988459680800, 1.788766476323060600, 1.786136060975809500, -0.056525543169408797, 0.491596272728153760, 0.262309671126153390 }; /*------------------------------------------------------------------------------ * Reference out of SIN F32 function for Block Size = 10 * Calculated from sin(testInputSin_f32) *------------------------------------------------------------------------------*/ float32_t testRefSinOutput32_f32[TEST_LENGTH_SAMPLES] = { -0.604960695383043530, -0.597090287967934840, 0.187140422442966500, 0.418772124875992690, -0.988588831792106880, 0.976338412038794010, 0.976903856413481100, -0.056495446835214236, 0.472033731854734240, 0.259311907228582830 }; /*------------------------------------------------------------------------------ * Method 1: Test out Buffer Calculated from Cubic Interpolation *------------------------------------------------------------------------------*/ float32_t testOutput[TEST_LENGTH_SAMPLES]; /*------------------------------------------------------------------------------ * Method 2: Test out buffer Calculated from Linear Interpolation *------------------------------------------------------------------------------*/ float32_t testLinIntOutput[TEST_LENGTH_SAMPLES]; /*------------------------------------------------------------------------------ * External table used for linear interpolation *------------------------------------------------------------------------------*/ extern float32_t arm_linear_interep_table[188495]; /* ---------------------------------------------------------------------- * Global Variables for caluclating SNR's for Method1 & Method 2 * ------------------------------------------------------------------- */ float32_t snr1; float32_t snr2; /* ---------------------------------------------------------------------------- * Calculation of Sine values from Cubic Interpolation and Linear interpolation * ---------------------------------------------------------------------------- */ int32_t main(void) { uint32_t i; arm_status status; arm_linear_interp_instance_f32 S = {188495, -3.141592653589793238, XSPACING, &arm_linear_interep_table[0]}; /*------------------------------------------------------------------------------ * Method 1: Test out Calculated from Cubic Interpolation *------------------------------------------------------------------------------*/ for(i=0; i< TEST_LENGTH_SAMPLES; i++) { testOutput[i] = arm_sin_f32(testInputSin_f32[i]); } /*------------------------------------------------------------------------------ * Method 2: Test out Calculated from Cubic Interpolation and Linear interpolation *------------------------------------------------------------------------------*/ for(i=0; i< TEST_LENGTH_SAMPLES; i++) { testLinIntOutput[i] = arm_linear_interp_f32(&S, testInputSin_f32[i]); } /*------------------------------------------------------------------------------ * SNR calculation for method 1 *------------------------------------------------------------------------------*/ snr1 = arm_snr_f32(testRefSinOutput32_f32, testOutput, 2); /*------------------------------------------------------------------------------ * SNR calculation for method 2 *------------------------------------------------------------------------------*/ snr2 = arm_snr_f32(testRefSinOutput32_f32, testLinIntOutput, 2); /*------------------------------------------------------------------------------ * Initialise status depending on SNR calculations *------------------------------------------------------------------------------*/ if( snr2 > snr1) { status = ARM_MATH_SUCCESS; } else { status = ARM_MATH_TEST_FAILURE; } /* ---------------------------------------------------------------------- ** Loop here if the signals fail the PASS check. ** This denotes a test failure ** ------------------------------------------------------------------- */ if( status != ARM_MATH_SUCCESS) { while(1); } while(1); /* main function does not return */ } /** \endlink */

1137519-player

lib/CMSIS/DSP_Lib/Examples/arm_linear_interp_example/arm_linear_interp_example_f32.c

C

lgpl

7,539

/**************************************************************************//** * @file system_ARMCM0.c * @brief CMSIS Cortex-M0 Device System Source File * for CM0 Device Series * @version V1.05 * @date 26. July 2011 * * @note * Copyright (C) 2010-2011 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * ******************************************************************************/ #include "ARMCM0.h" /*---------------------------------------------------------------------------- Define clocks *----------------------------------------------------------------------------*/ #define __HSI ( 8000000UL) #define __XTAL (12000000UL) /* Oscillator frequency */ #define __SYSTEM_CLOCK (4*__XTAL) /*---------------------------------------------------------------------------- Clock Variable definitions *----------------------------------------------------------------------------*/ uint32_t SystemCoreClock = __SYSTEM_CLOCK;/*!< System Clock Frequency (Core Clock)*/ /*---------------------------------------------------------------------------- Clock functions *----------------------------------------------------------------------------*/ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */ { SystemCoreClock = __SYSTEM_CLOCK; } /** * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System. */ void SystemInit (void) { SystemCoreClock = __SYSTEM_CLOCK; #ifdef __USE_GPIO ARM_GPIO0->DATA[0].WORD = 0; ARM_GPIO0->IE = 0; ARM_GPIO0->DIR = 0xff83; ARM_GPIO1->DATA[0].WORD = 0; ARM_GPIO1->IE = 0; ARM_GPIO1->DIR = 0; ARM_GPIO2->DATA[0].WORD = 0; ARM_GPIO2->IE = 0; ARM_GPIO2->DIR = 0; #endif }

1137519-player

lib/CMSIS/DSP_Lib/Examples/arm_linear_interp_example/system_ARMCM0.c

C

lgpl

2,488

/**************************************************************************//** * @file system_ARMCM4.c * @brief CMSIS Cortex-M4 Device System Source File * for CM4 Device Series * @version V1.05 * @date 26. July 2011 * * @note * Copyright (C) 2010-2011 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * ******************************************************************************/ #include "ARMCM4.h" /*---------------------------------------------------------------------------- Define clocks *----------------------------------------------------------------------------*/ #define __HSI ( 8000000UL) #define __XTAL (12000000UL) /* Oscillator frequency */ #define __SYSTEM_CLOCK (4*__XTAL) /*---------------------------------------------------------------------------- Clock Variable definitions *----------------------------------------------------------------------------*/ uint32_t SystemCoreClock = __SYSTEM_CLOCK;/*!< System Clock Frequency (Core Clock)*/ /*---------------------------------------------------------------------------- Clock functions *----------------------------------------------------------------------------*/ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */ { SystemCoreClock = __SYSTEM_CLOCK; } /** * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System. */ void SystemInit (void) { #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) SCB->CPACR |= ((3UL << 10*2) | /* set CP10 Full Access */ (3UL << 11*2) ); /* set CP11 Full Access */ #endif SystemCoreClock = __SYSTEM_CLOCK; #ifdef __USE_GPIO ARM_GPIO0->DATA[0].WORD = 0; ARM_GPIO0->IE = 0; ARM_GPIO0->DIR = 0xff83; ARM_GPIO1->DATA[0].WORD = 0; ARM_GPIO1->IE = 0; ARM_GPIO1->DIR = 0; ARM_GPIO2->DATA[0].WORD = 0; ARM_GPIO2->IE = 0; ARM_GPIO2->DIR = 0; #endif }

1137519-player

lib/CMSIS/DSP_Lib/Examples/arm_linear_interp_example/system_ARMCM4.c

C

lgpl

2,707

/**************************************************************************//** * @file system_ARMCM3.c * @brief CMSIS Cortex-M3 Device System Source File * for CM3 Device Series * @version V1.05 * @date 26. July 2011 * * @note * Copyright (C) 2010-2011 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * ******************************************************************************/ #include "ARMCM3.h" /*---------------------------------------------------------------------------- Define clocks *----------------------------------------------------------------------------*/ #define __HSI ( 8000000UL) #define __XTAL (12000000UL) /* Oscillator frequency */ #define __SYSTEM_CLOCK (4*__XTAL) /*---------------------------------------------------------------------------- Clock Variable definitions *----------------------------------------------------------------------------*/ uint32_t SystemCoreClock = __SYSTEM_CLOCK;/*!< System Clock Frequency (Core Clock)*/ /*---------------------------------------------------------------------------- Clock functions *----------------------------------------------------------------------------*/ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */ { SystemCoreClock = __SYSTEM_CLOCK; } /** * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System. */ void SystemInit (void) { SystemCoreClock = __SYSTEM_CLOCK; #ifdef __USE_GPIO ARM_GPIO0->DATA[0].WORD = 0; ARM_GPIO0->IE = 0; ARM_GPIO0->DIR = 0xff83; ARM_GPIO1->DATA[0].WORD = 0; ARM_GPIO1->IE = 0; ARM_GPIO1->DIR = 0; ARM_GPIO2->DATA[0].WORD = 0; ARM_GPIO2->IE = 0; ARM_GPIO2->DIR = 0; #endif }

1137519-player

lib/CMSIS/DSP_Lib/Examples/arm_linear_interp_example/system_ARMCM3.c

C

lgpl

2,488

;/**************************************************************************//** ; * @file startup_ARMCM4.s ; * @brief CMSIS Cortex-M4 Core Device Startup File ; * for CM4 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; * ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA |.text|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP MemManage_Handler\ PROC EXPORT MemManage_Handler [WEAK] B . ENDP BusFault_Handler\ PROC EXPORT BusFault_Handler [WEAK] B . ENDP UsageFault_Handler\ PROC EXPORT UsageFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP DebugMon_Handler\ PROC EXPORT DebugMon_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END

1137519-player

lib/CMSIS/DSP_Lib/Examples/arm_variance_example/ARM/startup_ARMCM4.s

Unix Assembly

lgpl

5,000

;/**************************************************************************//** ; * @file startup_ARMCM3.s ; * @brief CMSIS Cortex-M3 Core Device Startup File ; * for CM3 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; * ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA |.text|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP MemManage_Handler\ PROC EXPORT MemManage_Handler [WEAK] B . ENDP BusFault_Handler\ PROC EXPORT BusFault_Handler [WEAK] B . ENDP UsageFault_Handler\ PROC EXPORT UsageFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP DebugMon_Handler\ PROC EXPORT DebugMon_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END

1137519-player

lib/CMSIS/DSP_Lib/Examples/arm_variance_example/ARM/startup_ARMCM3.s

Unix Assembly

lgpl

5,000

;/**************************************************************************//** ; * @file startup_ARMCM0.s ; * @brief CMSIS Cortex-M0 Core Device Startup File ; * for CM0 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; * ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA |.text|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END

1137519-player

lib/CMSIS/DSP_Lib/Examples/arm_variance_example/ARM/startup_ARMCM0.s

Motorola 68K Assembly

lgpl

4,363

/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 29. November 2010 * $Revision: V1.0.3 * * Project: CMSIS DSP Library * Title: arm_variance_example_f32.c * * Description: Example code demonstrating variance calculation of input sequence. * * Target Processor: Cortex-M4/Cortex-M3 * * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.1 2010/10/05 KK * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 KK * Production release and review comments incorporated. * ------------------------------------------------------------------- */ /** * @ingroup groupExamples */ /** * @defgroup VarianceExample Variance Example * * \par Description: * \par * Demonstrates the use of Basic Math and Support Functions to calculate the variance of an * input sequence with N samples. Uniformly distributed white noise is taken as input. * * \par Algorithm: * \par * The variance of a sequence is the mean of the squared deviation of the sequence from its mean. * \par * This is denoted by the following equation: * <pre> variance = ((x[0] - x') * (x[0] - x') + (x[1] - x') * (x[1] - x') + ... + * (x[n-1] - x') * (x[n-1] - x')) / (N-1)</pre> * where, <code>x[n]</code> is the input sequence, <code>N</code> is the number of input samples, and * <code>x'</code> is the mean value of the input sequence, <code>x[n]</code>. * \par * The mean value <code>x'</code> is defined as: * <pre> x' = (x[0] + x[1] + ... + x[n-1]) / N</pre> * * \par Block Diagram: * \par * \image html Variance.gif * * * \par Variables Description: * \par * \li \c testInput_f32 points to the input data * \li \c wire1, \c wir2, \c wire3 temporary buffers * \li \c blockSize number of samples processed at a time * \li \c refVarianceOut reference variance value * * \par CMSIS DSP Software Library Functions Used: * \par * - arm_dot_prod_f32() * - arm_mult_f32() * - arm_sub_f32() * - arm_fill_f32() * - arm_copy_f32() * * Refer * \link arm_variance_example_f32.c \endlink * */ /** \example arm_variance_example_f32.c */ #include <math.h> #include "arm_math.h" /* ---------------------------------------------------------------------- * Defines each of the tests performed * ------------------------------------------------------------------- */ #define MAX_BLOCKSIZE 32 #define DELTA (0.000001f) /* ---------------------------------------------------------------------- * Declare I/O buffers * ------------------------------------------------------------------- */ float32_t wire1[MAX_BLOCKSIZE]; float32_t wire2[MAX_BLOCKSIZE]; float32_t wire3[MAX_BLOCKSIZE]; /* ---------------------------------------------------------------------- * Test input data for Floating point Variance example for 32-blockSize * Generated by the MATLAB randn() function * ------------------------------------------------------------------- */ float32_t testInput_f32[32] = { -0.432564811528221, -1.665584378238097, 0.125332306474831, 0.287676420358549, -1.146471350681464, 1.190915465642999, 1.189164201652103, -0.037633276593318, 0.327292361408654, 0.174639142820925, -0.186708577681439, 0.725790548293303, -0.588316543014189, 2.183185818197101, -0.136395883086596, 0.113931313520810, 1.066768211359189, 0.059281460523605, -0.095648405483669, -0.832349463650022, 0.294410816392640, -1.336181857937804, 0.714324551818952, 1.623562064446271, -0.691775701702287, 0.857996672828263, 1.254001421602532, -1.593729576447477, -1.440964431901020, 0.571147623658178, -0.399885577715363, 0.689997375464345 }; /* ---------------------------------------------------------------------- * Declare Global variables * ------------------------------------------------------------------- */ uint32_t blockSize = 32; float32_t refVarianceOut = 0.903941793931839; /* ---------------------------------------------------------------------- * Variance calculation test * ------------------------------------------------------------------- */ int32_t main(void) { arm_status status; float32_t mean, oneByBlockSize; float32_t variance; float32_t diff; status = ARM_MATH_SUCCESS; /* Calculation of mean value of input */ /* x' = 1/blockSize * (x(0)* 1 + x(1) * 1 + ... + x(n-1) * 1) */ /* Fill wire1 buffer with 1.0 value */ arm_fill_f32(1.0, wire1, blockSize); /* Calculate the dot product of wire1 and wire2 */ /* (x(0)* 1 + x(1) * 1 + ...+ x(n-1) * 1) */ arm_dot_prod_f32(testInput_f32, wire1, blockSize, &mean); /* Calculation of 1/blockSize */ oneByBlockSize = 1.0 / (blockSize); /* 1/blockSize * (x(0)* 1 + x(1) * 1 + ... + x(n-1) * 1) */ arm_mult_f32(&mean, &oneByBlockSize, &mean, 1); /* Calculation of variance value of input */ /* (1/blockSize) * (x(0) - x') * (x(0) - x') + (x(1) - x') * (x(1) - x') + ... + (x(n-1) - x') * (x(n-1) - x') */ /* Fill wire2 with mean value x' */ arm_fill_f32(mean, wire2, blockSize); /* wire3 contains (x-x') */ arm_sub_f32(testInput_f32, wire2, wire3, blockSize); /* wire2 contains (x-x') */ arm_copy_f32(wire3, wire2, blockSize); /* (x(0) - x') * (x(0) - x') + (x(1) - x') * (x(1) - x') + ... + (x(n-1) - x') * (x(n-1) - x') */ arm_dot_prod_f32(wire2, wire3, blockSize, &variance); /* Calculation of 1/blockSize */ oneByBlockSize = 1.0 / (blockSize - 1); /* Calculation of variance */ arm_mult_f32(&variance, &oneByBlockSize, &variance, 1); /* absolute value of difference between ref and test */ diff = fabsf(refVarianceOut - variance); /* Comparison of variance value with reference */ if(diff > DELTA) { status = ARM_MATH_TEST_FAILURE; } if( status != ARM_MATH_SUCCESS) { while(1); } while(1); /* main function does not return */ } /** \endlink */

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lib/CMSIS/DSP_Lib/Examples/arm_variance_example/arm_variance_example_f32.c

C

lgpl

6,221

/**************************************************************************//** * @file system_ARMCM0.c * @brief CMSIS Cortex-M0 Device System Source File * for CM0 Device Series * @version V1.05 * @date 26. July 2011 * * @note * Copyright (C) 2010-2011 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * ******************************************************************************/ #include "ARMCM0.h" /*---------------------------------------------------------------------------- Define clocks *----------------------------------------------------------------------------*/ #define __HSI ( 8000000UL) #define __XTAL (12000000UL) /* Oscillator frequency */ #define __SYSTEM_CLOCK (4*__XTAL) /*---------------------------------------------------------------------------- Clock Variable definitions *----------------------------------------------------------------------------*/ uint32_t SystemCoreClock = __SYSTEM_CLOCK;/*!< System Clock Frequency (Core Clock)*/ /*---------------------------------------------------------------------------- Clock functions *----------------------------------------------------------------------------*/ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */ { SystemCoreClock = __SYSTEM_CLOCK; } /** * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System. */ void SystemInit (void) { SystemCoreClock = __SYSTEM_CLOCK; #ifdef __USE_GPIO ARM_GPIO0->DATA[0].WORD = 0; ARM_GPIO0->IE = 0; ARM_GPIO0->DIR = 0xff83; ARM_GPIO1->DATA[0].WORD = 0; ARM_GPIO1->IE = 0; ARM_GPIO1->DIR = 0; ARM_GPIO2->DATA[0].WORD = 0; ARM_GPIO2->IE = 0; ARM_GPIO2->DIR = 0; #endif }

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lib/CMSIS/DSP_Lib/Examples/arm_variance_example/system_ARMCM0.c

C

lgpl

2,488

/**************************************************************************//** * @file system_ARMCM4.c * @brief CMSIS Cortex-M4 Device System Source File * for CM4 Device Series * @version V1.05 * @date 26. July 2011 * * @note * Copyright (C) 2010-2011 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * ******************************************************************************/ #include "ARMCM4.h" /*---------------------------------------------------------------------------- Define clocks *----------------------------------------------------------------------------*/ #define __HSI ( 8000000UL) #define __XTAL (12000000UL) /* Oscillator frequency */ #define __SYSTEM_CLOCK (4*__XTAL) /*---------------------------------------------------------------------------- Clock Variable definitions *----------------------------------------------------------------------------*/ uint32_t SystemCoreClock = __SYSTEM_CLOCK;/*!< System Clock Frequency (Core Clock)*/ /*---------------------------------------------------------------------------- Clock functions *----------------------------------------------------------------------------*/ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */ { SystemCoreClock = __SYSTEM_CLOCK; } /** * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System. */ void SystemInit (void) { #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) SCB->CPACR |= ((3UL << 10*2) | /* set CP10 Full Access */ (3UL << 11*2) ); /* set CP11 Full Access */ #endif SystemCoreClock = __SYSTEM_CLOCK; #ifdef __USE_GPIO ARM_GPIO0->DATA[0].WORD = 0; ARM_GPIO0->IE = 0; ARM_GPIO0->DIR = 0xff83; ARM_GPIO1->DATA[0].WORD = 0; ARM_GPIO1->IE = 0; ARM_GPIO1->DIR = 0; ARM_GPIO2->DATA[0].WORD = 0; ARM_GPIO2->IE = 0; ARM_GPIO2->DIR = 0; #endif }

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lib/CMSIS/DSP_Lib/Examples/arm_variance_example/system_ARMCM4.c

C

lgpl

2,707

/**************************************************************************//** * @file system_ARMCM3.c * @brief CMSIS Cortex-M3 Device System Source File * for CM3 Device Series * @version V1.05 * @date 26. July 2011 * * @note * Copyright (C) 2010-2011 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * ******************************************************************************/ #include "ARMCM3.h" /*---------------------------------------------------------------------------- Define clocks *----------------------------------------------------------------------------*/ #define __HSI ( 8000000UL) #define __XTAL (12000000UL) /* Oscillator frequency */ #define __SYSTEM_CLOCK (4*__XTAL) /*---------------------------------------------------------------------------- Clock Variable definitions *----------------------------------------------------------------------------*/ uint32_t SystemCoreClock = __SYSTEM_CLOCK;/*!< System Clock Frequency (Core Clock)*/ /*---------------------------------------------------------------------------- Clock functions *----------------------------------------------------------------------------*/ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */ { SystemCoreClock = __SYSTEM_CLOCK; } /** * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System. */ void SystemInit (void) { SystemCoreClock = __SYSTEM_CLOCK; #ifdef __USE_GPIO ARM_GPIO0->DATA[0].WORD = 0; ARM_GPIO0->IE = 0; ARM_GPIO0->DIR = 0xff83; ARM_GPIO1->DATA[0].WORD = 0; ARM_GPIO1->IE = 0; ARM_GPIO1->DIR = 0; ARM_GPIO2->DATA[0].WORD = 0; ARM_GPIO2->IE = 0; ARM_GPIO2->DIR = 0; #endif }

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lib/CMSIS/DSP_Lib/Examples/arm_variance_example/system_ARMCM3.c

C

lgpl

2,488

;/**************************************************************************//** ; * @file startup_ARMCM4.s ; * @brief CMSIS Cortex-M4 Core Device Startup File ; * for CM4 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; * ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA |.text|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP MemManage_Handler\ PROC EXPORT MemManage_Handler [WEAK] B . ENDP BusFault_Handler\ PROC EXPORT BusFault_Handler [WEAK] B . ENDP UsageFault_Handler\ PROC EXPORT UsageFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP DebugMon_Handler\ PROC EXPORT DebugMon_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END

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lib/CMSIS/DSP_Lib/Examples/arm_fft_bin_example/ARM/startup_ARMCM4.s

Unix Assembly

lgpl

5,000

;/**************************************************************************//** ; * @file startup_ARMCM3.s ; * @brief CMSIS Cortex-M3 Core Device Startup File ; * for CM3 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; * ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA |.text|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP MemManage_Handler\ PROC EXPORT MemManage_Handler [WEAK] B . ENDP BusFault_Handler\ PROC EXPORT BusFault_Handler [WEAK] B . ENDP UsageFault_Handler\ PROC EXPORT UsageFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP DebugMon_Handler\ PROC EXPORT DebugMon_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END

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lib/CMSIS/DSP_Lib/Examples/arm_fft_bin_example/ARM/startup_ARMCM3.s

Unix Assembly

lgpl

5,000

;/**************************************************************************//** ; * @file startup_ARMCM0.s ; * @brief CMSIS Cortex-M0 Core Device Startup File ; * for CM0 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; * ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA |.text|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END

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lib/CMSIS/DSP_Lib/Examples/arm_fft_bin_example/ARM/startup_ARMCM0.s

Motorola 68K Assembly

lgpl

4,363

/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 29. November 2010 * $Revision: V1.0.3 * * Project: CMSIS DSP Library * Title: arm_fft_bin_example_f32.c * * Description: Example code demonstrating calculation of Max energy bin of * frequency domain of input signal. * * Target Processor: Cortex-M4/Cortex-M3 * * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.1 2010/10/05 KK * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 KK * Production release and review comments incorporated. * ------------------------------------------------------------------- */ /** * @ingroup groupExamples */ /** * @defgroup FrequencyBin Frequency Bin Example * * \par Description * \par * Demonstrates the calculation of the maximum energy bin in the frequency * domain of the input signal with the use of Complex FFT, Complex * Magnitude, and Maximum functions. * * \par Algorithm: * \par * The input test signal contains a 10 kHz signal with uniformly distributed white noise. * Calculating the FFT of the input signal will give us the maximum energy of the * bin corresponding to the input frequency of 10 kHz. * * \par Block Diagram: * \image html FFTBin.gif "Block Diagram" * \par * The figure below shows the time domain signal of 10 kHz signal with * uniformly distributed white noise, and the next figure shows the input * in the frequency domain. The bin with maximum energy corresponds to 10 kHz signal. * \par * \image html FFTBinInput.gif "Input signal in Time domain" * \image html FFTBinOutput.gif "Input signal in Frequency domain" * * \par Variables Description: * \par * \li \c testInput_f32_10khz points to the input data * \li \c testOutput points to the output data * \li \c fftSize length of FFT * \li \c ifftFlag flag for the selection of CFFT/CIFFT * \li \c doBitReverse Flag for selection of normal order or bit reversed order * \li \c refIndex reference index value at which maximum energy of bin ocuurs * \li \c testIndex calculated index value at which maximum energy of bin ocuurs * * \par CMSIS DSP Software Library Functions Used: * \par * - arm_cfft_radix4_init_f32() * - arm_cfft_radix4_f32() * - arm_cmplx_mag_f32() * - arm_max_f32() * * Refer * \link arm_fft_bin_example_f32.c \endlink * */ /** \example arm_fft_bin_example_f32.c */ #include "arm_math.h" #define TEST_LENGTH_SAMPLES 2048 /* ------------------------------------------------------------------- * External Input and Output buffer Declarations for FFT Bin Example * ------------------------------------------------------------------- */ extern float32_t testInput_f32_10khz[TEST_LENGTH_SAMPLES]; static float32_t testOutput[TEST_LENGTH_SAMPLES/2]; /* ------------------------------------------------------------------ * Global variables for FFT Bin Example * ------------------------------------------------------------------- */ uint32_t fftSize = 1024; uint32_t ifftFlag = 0; uint32_t doBitReverse = 1; /* Reference index at which max energy of bin ocuurs */ uint32_t refIndex = 213, testIndex = 0; /* ---------------------------------------------------------------------- * Max magnitude FFT Bin test * ------------------------------------------------------------------- */ int32_t main(void) { arm_status status; arm_cfft_radix4_instance_f32 S; float32_t maxValue; status = ARM_MATH_SUCCESS; /* Initialize the CFFT/CIFFT module */ status = arm_cfft_radix4_init_f32(&S, fftSize, ifftFlag, doBitReverse); /* Process the data through the CFFT/CIFFT module */ arm_cfft_radix4_f32(&S, testInput_f32_10khz); /* Process the data through the Complex Magnitude Module for calculating the magnitude at each bin */ arm_cmplx_mag_f32(testInput_f32_10khz, testOutput, fftSize); /* Calculates maxValue and returns corresponding BIN value */ arm_max_f32(testOutput, fftSize, &maxValue, &testIndex); if(testIndex != refIndex) { status = ARM_MATH_TEST_FAILURE; } /* ---------------------------------------------------------------------- ** Loop here if the signals fail the PASS check. ** This denotes a test failure ** ------------------------------------------------------------------- */ if( status != ARM_MATH_SUCCESS) { while(1); } while(1); /* main function does not return */ } /** \endlink */

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lib/CMSIS/DSP_Lib/Examples/arm_fft_bin_example/arm_fft_bin_example_f32.c

C

lgpl

4,851

/**************************************************************************//** * @file system_ARMCM0.c * @brief CMSIS Cortex-M0 Device System Source File * for CM0 Device Series * @version V1.05 * @date 26. July 2011 * * @note * Copyright (C) 2010-2011 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * ******************************************************************************/ #include "ARMCM0.h" /*---------------------------------------------------------------------------- Define clocks *----------------------------------------------------------------------------*/ #define __HSI ( 8000000UL) #define __XTAL (12000000UL) /* Oscillator frequency */ #define __SYSTEM_CLOCK (4*__XTAL) /*---------------------------------------------------------------------------- Clock Variable definitions *----------------------------------------------------------------------------*/ uint32_t SystemCoreClock = __SYSTEM_CLOCK;/*!< System Clock Frequency (Core Clock)*/ /*---------------------------------------------------------------------------- Clock functions *----------------------------------------------------------------------------*/ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */ { SystemCoreClock = __SYSTEM_CLOCK; } /** * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System. */ void SystemInit (void) { SystemCoreClock = __SYSTEM_CLOCK; #ifdef __USE_GPIO ARM_GPIO0->DATA[0].WORD = 0; ARM_GPIO0->IE = 0; ARM_GPIO0->DIR = 0xff83; ARM_GPIO1->DATA[0].WORD = 0; ARM_GPIO1->IE = 0; ARM_GPIO1->DIR = 0; ARM_GPIO2->DATA[0].WORD = 0; ARM_GPIO2->IE = 0; ARM_GPIO2->DIR = 0; #endif }

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lib/CMSIS/DSP_Lib/Examples/arm_fft_bin_example/system_ARMCM0.c

C

lgpl

2,488

/**************************************************************************//** * @file system_ARMCM4.c * @brief CMSIS Cortex-M4 Device System Source File * for CM4 Device Series * @version V1.05 * @date 26. July 2011 * * @note * Copyright (C) 2010-2011 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * ******************************************************************************/ #include "ARMCM4.h" /*---------------------------------------------------------------------------- Define clocks *----------------------------------------------------------------------------*/ #define __HSI ( 8000000UL) #define __XTAL (12000000UL) /* Oscillator frequency */ #define __SYSTEM_CLOCK (4*__XTAL) /*---------------------------------------------------------------------------- Clock Variable definitions *----------------------------------------------------------------------------*/ uint32_t SystemCoreClock = __SYSTEM_CLOCK;/*!< System Clock Frequency (Core Clock)*/ /*---------------------------------------------------------------------------- Clock functions *----------------------------------------------------------------------------*/ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */ { SystemCoreClock = __SYSTEM_CLOCK; } /** * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System. */ void SystemInit (void) { #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) SCB->CPACR |= ((3UL << 10*2) | /* set CP10 Full Access */ (3UL << 11*2) ); /* set CP11 Full Access */ #endif SystemCoreClock = __SYSTEM_CLOCK; #ifdef __USE_GPIO ARM_GPIO0->DATA[0].WORD = 0; ARM_GPIO0->IE = 0; ARM_GPIO0->DIR = 0xff83; ARM_GPIO1->DATA[0].WORD = 0; ARM_GPIO1->IE = 0; ARM_GPIO1->DIR = 0; ARM_GPIO2->DATA[0].WORD = 0; ARM_GPIO2->IE = 0; ARM_GPIO2->DIR = 0; #endif }

1137519-player

lib/CMSIS/DSP_Lib/Examples/arm_fft_bin_example/system_ARMCM4.c

C

lgpl

2,707

/**************************************************************************//** * @file system_ARMCM3.c * @brief CMSIS Cortex-M3 Device System Source File * for CM3 Device Series * @version V1.05 * @date 26. July 2011 * * @note * Copyright (C) 2010-2011 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * ******************************************************************************/ #include "ARMCM3.h" /*---------------------------------------------------------------------------- Define clocks *----------------------------------------------------------------------------*/ #define __HSI ( 8000000UL) #define __XTAL (12000000UL) /* Oscillator frequency */ #define __SYSTEM_CLOCK (4*__XTAL) /*---------------------------------------------------------------------------- Clock Variable definitions *----------------------------------------------------------------------------*/ uint32_t SystemCoreClock = __SYSTEM_CLOCK;/*!< System Clock Frequency (Core Clock)*/ /*---------------------------------------------------------------------------- Clock functions *----------------------------------------------------------------------------*/ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */ { SystemCoreClock = __SYSTEM_CLOCK; } /** * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System. */ void SystemInit (void) { SystemCoreClock = __SYSTEM_CLOCK; #ifdef __USE_GPIO ARM_GPIO0->DATA[0].WORD = 0; ARM_GPIO0->IE = 0; ARM_GPIO0->DIR = 0xff83; ARM_GPIO1->DATA[0].WORD = 0; ARM_GPIO1->IE = 0; ARM_GPIO1->DIR = 0; ARM_GPIO2->DATA[0].WORD = 0; ARM_GPIO2->IE = 0; ARM_GPIO2->DIR = 0; #endif }

1137519-player

lib/CMSIS/DSP_Lib/Examples/arm_fft_bin_example/system_ARMCM3.c

C

lgpl

2,488

#include "arm_math.h" /* ---------------------------------------------------------------------- Test Input signal contains 10KHz signal + Uniformly distributed white noise ** ------------------------------------------------------------------- */ float32_t testInput_f32_10khz[2048] = { -0.865129623056441, 0.000000000000000, -2.655020678073846, 0.000000000000000, 0.600664612949661, 0.000000000000000, 0.080378093886515, 0.000000000000000, -2.899160484012034, 0.000000000000000, 2.563004262857762, 0.000000000000000, 3.078328403304206, 0.000000000000000, 0.105906778385130, 0.000000000000000, 0.048366940168201, 0.000000000000000, -0.145696461188734, 0.000000000000000, -0.023417155362879, 0.000000000000000, 2.127729174988954, 0.000000000000000, -1.176633086028377, 0.000000000000000, 3.690223557991855, 0.000000000000000, -0.622791766173194, 0.000000000000000, 0.722837373872203, 0.000000000000000, 2.739754205367484, 0.000000000000000, -0.062610410524552, 0.000000000000000, -0.891296810967338, 0.000000000000000, -1.845872258871811, 0.000000000000000, 1.195039415434387, 0.000000000000000, -2.177388969045026, 0.000000000000000, 1.078649103637905, 0.000000000000000, 2.570976050490193, 0.000000000000000, -1.383551403404574, 0.000000000000000, 2.392141424058873, 0.000000000000000, 2.858002843205065, 0.000000000000000, -3.682433899725536, 0.000000000000000, -3.488146646451150, 0.000000000000000, 1.323468578888120, 0.000000000000000, -0.099771155430726, 0.000000000000000, 1.561168082500454, 0.000000000000000, 1.025026795103179, 0.000000000000000, 0.928841900171200, 0.000000000000000, 2.930499509864950, 0.000000000000000, 2.013349089766430, 0.000000000000000, 2.381676148486737, 0.000000000000000, -3.081062307950236, 0.000000000000000, -0.389579115537544, 0.000000000000000, 0.181540149166620, 0.000000000000000, -2.601953341353208, 0.000000000000000, 0.333435137783218, 0.000000000000000, -2.812945856162965, 0.000000000000000, 2.649109640172910, 0.000000000000000, -1.003963025744654, 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0.000000000000000, -3.980689173859100, 0.000000000000000, };

1137519-player

lib/CMSIS/DSP_Lib/Examples/arm_fft_bin_example/arm_fft_bin_data.c

C

lgpl

42,297

;/**************************************************************************//** ; * @file startup_ARMCM4.s ; * @brief CMSIS Cortex-M4 Core Device Startup File ; * for CM4 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; * ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA |.text|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP MemManage_Handler\ PROC EXPORT MemManage_Handler [WEAK] B . ENDP BusFault_Handler\ PROC EXPORT BusFault_Handler [WEAK] B . ENDP UsageFault_Handler\ PROC EXPORT UsageFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP DebugMon_Handler\ PROC EXPORT DebugMon_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END

1137519-player

lib/CMSIS/DSP_Lib/Examples/arm_signal_converge_example/ARM/startup_ARMCM4.s

Unix Assembly

lgpl

5,000

;/**************************************************************************//** ; * @file startup_ARMCM3.s ; * @brief CMSIS Cortex-M3 Core Device Startup File ; * for CM3 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; * ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA |.text|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP MemManage_Handler\ PROC EXPORT MemManage_Handler [WEAK] B . ENDP BusFault_Handler\ PROC EXPORT BusFault_Handler [WEAK] B . ENDP UsageFault_Handler\ PROC EXPORT UsageFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP DebugMon_Handler\ PROC EXPORT DebugMon_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END

1137519-player

lib/CMSIS/DSP_Lib/Examples/arm_signal_converge_example/ARM/startup_ARMCM3.s

Unix Assembly

lgpl

5,000

;/**************************************************************************//** ; * @file startup_ARMCM0.s ; * @brief CMSIS Cortex-M0 Core Device Startup File ; * for CM0 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; * ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA |.text|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END

1137519-player

lib/CMSIS/DSP_Lib/Examples/arm_signal_converge_example/ARM/startup_ARMCM0.s

Motorola 68K Assembly

lgpl

4,363

/* ---------------------------------------------------------------------- * Copyright (C) 2010 ARM Limited. All rights reserved. * * $Date: 29. November 2010 * $Revision: V1.0.3 * * Project: CMSIS DSP Library * Title: arm_signal_converge_example_f32.c * * Description: Example code demonstrating convergence of an adaptive * filter. * * Target Processor: Cortex-M4/Cortex-M3 * * * Version 1.0.3 2010/11/29 * Re-organized the CMSIS folders and updated documentation. * * Version 1.0.1 2010/10/05 KK * Production release and review comments incorporated. * * Version 1.0.0 2010/09/20 KK * Production release and review comments incorporated. * ------------------------------------------------------------------- */ /** * @ingroup groupExamples */ /** * @defgroup SignalConvergence Signal Convergence Example * * \par Description: * \par * Demonstrates the ability of an adaptive filter to "learn" the transfer function of * a FIR lowpass filter using the Normalized LMS Filter, Finite Impulse * Response (FIR) Filter, and Basic Math Functions. * * \par Algorithm: * \par * The figure below illustrates the signal flow in this example. Uniformly distributed white * noise is passed through an FIR lowpass filter. The output of the FIR filter serves as the * reference input of the adaptive filter (normalized LMS filter). The white noise is input * to the adaptive filter. The adaptive filter learns the transfer function of the FIR filter. * The filter outputs two signals: (1) the output of the internal adaptive FIR filter, and * (2) the error signal which is the difference between the adaptive filter and the reference * output of the FIR filter. Over time as the adaptive filter learns the transfer function * of the FIR filter, the first output approaches the reference output of the FIR filter, * and the error signal approaches zero. * \par * The adaptive filter converges properly even if the input signal has a large dynamic * range (i.e., varies from small to large values). The coefficients of the adaptive filter * are initially zero, and then converge over 1536 samples. The internal function test_signal_converge() * implements the stopping condition. The function checks if all of the values of the error signal have a * magnitude below a threshold DELTA. * * \par Block Diagram: * \par * \image html SignalFlow.gif * * * \par Variables Description: * \par * \li \c testInput_f32 points to the input data * \li \c firStateF32 points to FIR state buffer * \li \c lmsStateF32 points to Normalised Least mean square FIR filter state buffer * \li \c FIRCoeff_f32 points to coefficient buffer * \li \c lmsNormCoeff_f32 points to Normalised Least mean square FIR filter coefficient buffer * \li \c wire1, wir2, wire3 temporary buffers * \li \c errOutput, err_signal temporary error buffers * * \par CMSIS DSP Software Library Functions Used: * \par * - arm_lms_norm_init_f32() * - arm_fir_init_f32() * - arm_fir_f32() * - arm_lms_norm_f32() * - arm_scale_f32() * - arm_abs_f32() * - arm_sub_f32() * - arm_min_f32() * - arm_copy_f32() * * Refer * \link arm_signal_converge_example_f32.c \endlink * */ /** \example arm_signal_converge_example_f32.c */ #include "arm_math.h" #include "math_helper.h" /* ---------------------------------------------------------------------- ** Global defines for the simulation * ------------------------------------------------------------------- */ #define TEST_LENGTH_SAMPLES 1536 #define NUMTAPS 32 #define BLOCKSIZE 32 #define DELTA_ERROR 0.000001f #define DELTA_COEFF 0.0001f #define MU 0.5f #define NUMFRAMES (TEST_LENGTH_SAMPLES / BLOCKSIZE) /* ---------------------------------------------------------------------- * Declare FIR state buffers and structure * ------------------------------------------------------------------- */ float32_t firStateF32[NUMTAPS + BLOCKSIZE]; arm_fir_instance_f32 LPF_instance; /* ---------------------------------------------------------------------- * Declare LMSNorm state buffers and structure * ------------------------------------------------------------------- */ float32_t lmsStateF32[NUMTAPS + BLOCKSIZE]; float32_t errOutput[TEST_LENGTH_SAMPLES]; arm_lms_norm_instance_f32 lmsNorm_instance; /* ---------------------------------------------------------------------- * Function Declarations for Signal Convergence Example * ------------------------------------------------------------------- */ arm_status test_signal_converge_example( void ); /* ---------------------------------------------------------------------- * Internal functions * ------------------------------------------------------------------- */ arm_status test_signal_converge(float32_t* err_signal, uint32_t blockSize); void getinput(float32_t* input, uint32_t fr_cnt, uint32_t blockSize); /* ---------------------------------------------------------------------- * External Declarations for FIR F32 module Test * ------------------------------------------------------------------- */ extern float32_t testInput_f32[TEST_LENGTH_SAMPLES]; extern float32_t lmsNormCoeff_f32[32]; extern const float32_t FIRCoeff_f32[32]; extern arm_lms_norm_instance_f32 lmsNorm_instance; /* ---------------------------------------------------------------------- * Declare I/O buffers * ------------------------------------------------------------------- */ float32_t wire1[BLOCKSIZE]; float32_t wire2[BLOCKSIZE]; float32_t wire3[BLOCKSIZE]; float32_t err_signal[BLOCKSIZE]; /* ---------------------------------------------------------------------- * Signal converge test * ------------------------------------------------------------------- */ int32_t main(void) { uint32_t i; arm_status status; uint32_t index; float32_t minValue; /* Initialize the LMSNorm data structure */ arm_lms_norm_init_f32(&lmsNorm_instance, NUMTAPS, lmsNormCoeff_f32, lmsStateF32, MU, BLOCKSIZE); /* Initialize the FIR data structure */ arm_fir_init_f32(&LPF_instance, NUMTAPS, (float32_t *)FIRCoeff_f32, firStateF32, BLOCKSIZE); /* ---------------------------------------------------------------------- * Loop over the frames of data and execute each of the processing * functions in the system. * ------------------------------------------------------------------- */ for(i=0; i < NUMFRAMES; i++) { /* Read the input data - uniformly distributed random noise - into wire1 */ arm_copy_f32(testInput_f32 + (i * BLOCKSIZE), wire1, BLOCKSIZE); /* Execute the FIR processing function. Input wire1 and output wire2 */ arm_fir_f32(&LPF_instance, wire1, wire2, BLOCKSIZE); /* Execute the LMS Norm processing function*/ arm_lms_norm_f32(&lmsNorm_instance, /* LMSNorm instance */ wire1, /* Input signal */ wire2, /* Reference Signal */ wire3, /* Converged Signal */ err_signal, /* Error Signal, this will become small as the signal converges */ BLOCKSIZE); /* BlockSize */ /* apply overall gain */ arm_scale_f32(wire3, 5, wire3, BLOCKSIZE); /* in-place buffer */ } status = ARM_MATH_SUCCESS; /* ------------------------------------------------------------------------------- * Test whether the error signal has reached towards 0. * ----------------------------------------------------------------------------- */ arm_abs_f32(err_signal, err_signal, BLOCKSIZE); arm_min_f32(err_signal, BLOCKSIZE, &minValue, &index); if (minValue > DELTA_ERROR) { status = ARM_MATH_TEST_FAILURE; } /* ---------------------------------------------------------------------- * Test whether the filter coefficients have converged. * ------------------------------------------------------------------- */ arm_sub_f32((float32_t *)FIRCoeff_f32, lmsNormCoeff_f32, lmsNormCoeff_f32, NUMTAPS); arm_abs_f32(lmsNormCoeff_f32, lmsNormCoeff_f32, NUMTAPS); arm_min_f32(lmsNormCoeff_f32, NUMTAPS, &minValue, &index); if (minValue > DELTA_COEFF) { status = ARM_MATH_TEST_FAILURE; } /* ---------------------------------------------------------------------- * Loop here if the signals did not pass the convergence check. * This denotes a test failure * ------------------------------------------------------------------- */ if( status != ARM_MATH_SUCCESS) { while(1); } while(1); /* main function does not return */ } /** \endlink */

1137519-player

lib/CMSIS/DSP_Lib/Examples/arm_signal_converge_example/arm_signal_converge_example_f32.c

C

lgpl

9,115

/**************************************************************************//** * @file system_ARMCM0.c * @brief CMSIS Cortex-M0 Device System Source File * for CM0 Device Series * @version V1.05 * @date 26. July 2011 * * @note * Copyright (C) 2010-2011 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * ******************************************************************************/ #include "ARMCM0.h" /*---------------------------------------------------------------------------- Define clocks *----------------------------------------------------------------------------*/ #define __HSI ( 8000000UL) #define __XTAL (12000000UL) /* Oscillator frequency */ #define __SYSTEM_CLOCK (4*__XTAL) /*---------------------------------------------------------------------------- Clock Variable definitions *----------------------------------------------------------------------------*/ uint32_t SystemCoreClock = __SYSTEM_CLOCK;/*!< System Clock Frequency (Core Clock)*/ /*---------------------------------------------------------------------------- Clock functions *----------------------------------------------------------------------------*/ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */ { SystemCoreClock = __SYSTEM_CLOCK; } /** * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System. */ void SystemInit (void) { SystemCoreClock = __SYSTEM_CLOCK; #ifdef __USE_GPIO ARM_GPIO0->DATA[0].WORD = 0; ARM_GPIO0->IE = 0; ARM_GPIO0->DIR = 0xff83; ARM_GPIO1->DATA[0].WORD = 0; ARM_GPIO1->IE = 0; ARM_GPIO1->DIR = 0; ARM_GPIO2->DATA[0].WORD = 0; ARM_GPIO2->IE = 0; ARM_GPIO2->DIR = 0; #endif }

1137519-player

lib/CMSIS/DSP_Lib/Examples/arm_signal_converge_example/system_ARMCM0.c

C

lgpl

2,488

/**************************************************************************//** * @file system_ARMCM4.c * @brief CMSIS Cortex-M4 Device System Source File * for CM4 Device Series * @version V1.05 * @date 26. July 2011 * * @note * Copyright (C) 2010-2011 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * ******************************************************************************/ #include "ARMCM4.h" /*---------------------------------------------------------------------------- Define clocks *----------------------------------------------------------------------------*/ #define __HSI ( 8000000UL) #define __XTAL (12000000UL) /* Oscillator frequency */ #define __SYSTEM_CLOCK (4*__XTAL) /*---------------------------------------------------------------------------- Clock Variable definitions *----------------------------------------------------------------------------*/ uint32_t SystemCoreClock = __SYSTEM_CLOCK;/*!< System Clock Frequency (Core Clock)*/ /*---------------------------------------------------------------------------- Clock functions *----------------------------------------------------------------------------*/ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */ { SystemCoreClock = __SYSTEM_CLOCK; } /** * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System. */ void SystemInit (void) { #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) SCB->CPACR |= ((3UL << 10*2) | /* set CP10 Full Access */ (3UL << 11*2) ); /* set CP11 Full Access */ #endif SystemCoreClock = __SYSTEM_CLOCK; #ifdef __USE_GPIO ARM_GPIO0->DATA[0].WORD = 0; ARM_GPIO0->IE = 0; ARM_GPIO0->DIR = 0xff83; ARM_GPIO1->DATA[0].WORD = 0; ARM_GPIO1->IE = 0; ARM_GPIO1->DIR = 0; ARM_GPIO2->DATA[0].WORD = 0; ARM_GPIO2->IE = 0; ARM_GPIO2->DIR = 0; #endif }

1137519-player

lib/CMSIS/DSP_Lib/Examples/arm_signal_converge_example/system_ARMCM4.c

C

lgpl

2,707

/**************************************************************************//** * @file system_ARMCM3.c * @brief CMSIS Cortex-M3 Device System Source File * for CM3 Device Series * @version V1.05 * @date 26. July 2011 * * @note * Copyright (C) 2010-2011 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * ******************************************************************************/ #include "ARMCM3.h" /*---------------------------------------------------------------------------- Define clocks *----------------------------------------------------------------------------*/ #define __HSI ( 8000000UL) #define __XTAL (12000000UL) /* Oscillator frequency */ #define __SYSTEM_CLOCK (4*__XTAL) /*---------------------------------------------------------------------------- Clock Variable definitions *----------------------------------------------------------------------------*/ uint32_t SystemCoreClock = __SYSTEM_CLOCK;/*!< System Clock Frequency (Core Clock)*/ /*---------------------------------------------------------------------------- Clock functions *----------------------------------------------------------------------------*/ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */ { SystemCoreClock = __SYSTEM_CLOCK; } /** * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System. */ void SystemInit (void) { SystemCoreClock = __SYSTEM_CLOCK; #ifdef __USE_GPIO ARM_GPIO0->DATA[0].WORD = 0; ARM_GPIO0->IE = 0; ARM_GPIO0->DIR = 0xff83; ARM_GPIO1->DATA[0].WORD = 0; ARM_GPIO1->IE = 0; ARM_GPIO1->DIR = 0; ARM_GPIO2->DATA[0].WORD = 0; ARM_GPIO2->IE = 0; ARM_GPIO2->DIR = 0; #endif }

1137519-player

lib/CMSIS/DSP_Lib/Examples/arm_signal_converge_example/system_ARMCM3.c

C

lgpl

2,488

;/**************************************************************************//** ; * @file startup_ARMCM4.s ; * @brief CMSIS Cortex-M4 Core Device Startup File ; * for CM4 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; * ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA |.text|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP MemManage_Handler\ PROC EXPORT MemManage_Handler [WEAK] B . ENDP BusFault_Handler\ PROC EXPORT BusFault_Handler [WEAK] B . ENDP UsageFault_Handler\ PROC EXPORT UsageFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP DebugMon_Handler\ PROC EXPORT DebugMon_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END

1137519-player

lib/CMSIS/DSP_Lib/Examples/arm_matrix_example/ARM/startup_ARMCM4.s

Unix Assembly

lgpl

5,000

;/**************************************************************************//** ; * @file startup_ARMCM3.s ; * @brief CMSIS Cortex-M3 Core Device Startup File ; * for CM3 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; * ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA |.text|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP MemManage_Handler\ PROC EXPORT MemManage_Handler [WEAK] B . ENDP BusFault_Handler\ PROC EXPORT BusFault_Handler [WEAK] B . ENDP UsageFault_Handler\ PROC EXPORT UsageFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP DebugMon_Handler\ PROC EXPORT DebugMon_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END

1137519-player

lib/CMSIS/DSP_Lib/Examples/arm_matrix_example/ARM/startup_ARMCM3.s

Unix Assembly

lgpl

5,000

;/**************************************************************************//** ; * @file startup_ARMCM0.s ; * @brief CMSIS Cortex-M0 Core Device Startup File ; * for CM0 Device Series ; * @version V1.04 ; * @date 14. January 2011 ; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ; * ; ******************************************************************************/ ; <h> Stack Configuration ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Stack_Size EQU 0x00000400 AREA STACK, NOINIT, READWRITE, ALIGN=3 Stack_Mem SPACE Stack_Size __initial_sp ; <h> Heap Configuration ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; </h> Heap_Size EQU 0x00000000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base Heap_Mem SPACE Heap_Size __heap_limit PRESERVE8 THUMB ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts DCD DEF_IRQHandler ; 0: Default __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors AREA |.text|, CODE, READONLY ; Reset Handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT SystemInit IMPORT __main LDR R0, =SystemInit BLX R0 LDR R0, =__main BX R0 ENDP ; Dummy Exception Handlers (infinite loops which can be modified) NMI_Handler PROC EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\ PROC EXPORT HardFault_Handler [WEAK] B . ENDP SVC_Handler PROC EXPORT SVC_Handler [WEAK] B . ENDP PendSV_Handler PROC EXPORT PendSV_Handler [WEAK] B . ENDP SysTick_Handler PROC EXPORT SysTick_Handler [WEAK] B . ENDP Default_Handler PROC EXPORT DEF_IRQHandler [WEAK] DEF_IRQHandler B . ENDP ALIGN ; User Initial Stack & Heap IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap LDR R0, = Heap_Mem LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END

1137519-player

lib/CMSIS/DSP_Lib/Examples/arm_matrix_example/ARM/startup_ARMCM0.s

Motorola 68K Assembly

lgpl

4,363

/**************************************************************************//** * @file system_ARMCM0.c * @brief CMSIS Cortex-M0 Device System Source File * for CM0 Device Series * @version V1.05 * @date 26. July 2011 * * @note * Copyright (C) 2010-2011 ARM Limited. All rights reserved. * * @par * ARM Limited (ARM) is supplying this software for use with Cortex-M * processor based microcontrollers. This file can be freely distributed * within development tools that are supporting such ARM based processors. * * @par * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * ******************************************************************************/ #include "ARMCM0.h" /*---------------------------------------------------------------------------- Define clocks *----------------------------------------------------------------------------*/ #define __HSI ( 8000000UL) #define __XTAL (12000000UL) /* Oscillator frequency */ #define __SYSTEM_CLOCK (4*__XTAL) /*---------------------------------------------------------------------------- Clock Variable definitions *----------------------------------------------------------------------------*/ uint32_t SystemCoreClock = __SYSTEM_CLOCK;/*!< System Clock Frequency (Core Clock)*/ /*---------------------------------------------------------------------------- Clock functions *----------------------------------------------------------------------------*/ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */ { SystemCoreClock = __SYSTEM_CLOCK; } /** * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System. */ void SystemInit (void) { SystemCoreClock = __SYSTEM_CLOCK; #ifdef __USE_GPIO ARM_GPIO0->DATA[0].WORD = 0; ARM_GPIO0->IE = 0; ARM_GPIO0->DIR = 0xff83; ARM_GPIO1->DATA[0].WORD = 0; ARM_GPIO1->IE = 0; ARM_GPIO1->DIR = 0; ARM_GPIO2->DATA[0].WORD = 0; ARM_GPIO2->IE = 0; ARM_GPIO2->DIR = 0; #endif }

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lib/CMSIS/DSP_Lib/Examples/arm_matrix_example/system_ARMCM0.c

C

lgpl

2,488