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64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5 Specifications | |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.1 TA13 | |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.1.1 Inputs and Outputs | • Input 1: K2, a sequence of bits of length 256 • Input 2: RS, a sequence of bits of length 80 • Output 1: KS, a sequence of bits of length 128 • Output 2: KS', a sequence of bits of length 128 |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.1.2 Algorithm Definition | • Encrypt the block RS || Z(168) || C(13) under Rijndael (K256, B256) with key K2. Take the first 128 bits of the ciphertext to be KS and the latter 128 bits to be KS' TA13 is illustrated in figure 2. ETSI ETSI TS 104 053-4 V1.1.1 (2024-07) 10 Figure 2: TA13 |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.2 TA14 | |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.2.1 Inputs and Outputs | • Input 1: KS, a sequence of bits of length 128 • Input 2: KS', a sequence of bits of length 128 • Input 3: RAND1, a sequence of bits of length 80 • Input 4: RAND2, a sequence of bits of length 80 • Output: DCKX, a sequence of bits of length 192 |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.2.2 Algorithm Definition | 1) Encrypt the block RAND1 || RAND2 || Z(88) || C(14) under Rijndael (K256, B256) with key KS || KS'. 2) Take the first 192 bits of the ciphertext to be DCKX. TA14 is illustrated in figure 3. ETSI ETSI TS 104 053-4 V1.1.1 (2024-07) 11 Figure 3: TA14 |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.3 TA15 | |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.3.1 Inputs and Outputs | • Input 1: KS, a sequence of bits of length 128 • Input 2: KS', a sequence of bits of length 128 • Input 3: RAND1, a sequence of bits of length 80 • Output: (X)RES1, a sequence of bits of length 32 |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.3.2 Algorithm Definition | 1) Encrypt the block RAND1 || Z(168) || C(15) under Rijndael (K256, B256) with key KS || KS'. 2) Take the first 32 bits of the ciphertext to be (X)RES1. TA15 is illustrated in figure 4. ETSI ETSI TS 104 053-4 V1.1.1 (2024-07) 12 Figure 4: TA15 |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.4 TA23 | |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.4.1 Inputs and Outputs | • Input 1: KS, a sequence of bits of length 128 • Input 2: KS', a sequence of bits of length 128 • Input 3: RAND2, a sequence of bits of length 80 • Output: (X)RES2, a sequence of bits of length 32 |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.4.2 Algorithm Definition | 1) Encrypt the block RAND2 || Z(168) || C(23) under Rijndael (K256, B256) with key KS || KS'. 2) Take the first 32 bits of the ciphertext to be (X)RES2. TA23 is illustrated in figure 5. ETSI ETSI TS 104 053-4 V1.1.1 (2024-07) 13 Figure 5: TA23 |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.5 TA33 | |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.5.1 Inputs and Outputs | • Input 1: CCKX, a sequence of bits of length 192 • Input 2: CCK-id, a sequence of bits of length 16 • Input 3: DCKX, a sequence of bits of length 192 • Output: SCCKX, a sequence of bits of length 224 |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.5.2 Algorithm Definition | 1) Encrypt the block CCKX || CCK-id || Z(8) || C(33) under Rijndael (K192, B224) with key DCKX. 2) SCCKX is the ciphertext from this encryption. TA33 is illustrated in figure 6. ETSI ETSI TS 104 053-4 V1.1.1 (2024-07) 14 Figure 6: TA33 |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.6 TA34 | |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.6.1 Inputs and Outputs | • Input 1: SCCKX, a sequence of bits of length 224 • Input 2: DCKX, a sequence of bits of length 192 • Input 3: CCK-id, a sequence of bits of length 16 • Output 1: CCKX, a sequence of bits of length 192 • Output 2: MF, a single bit |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.6.2 Algorithm Definition | 1) Decrypt the block SCCKX under Rijndael (K192, B224) with key DCKX. 2) If the final 32 bits of plaintext equal CCK-id || Z(8) || C(33), set MF = 0 and return the first 192 bits of the plaintext as CCKX; otherwise set MF = 1 and return CCKX set to Z(192). TA34 is illustrated in figure 7 for the case where the input is valid, and in figure 8 for the case where the input is invalid. ETSI ETSI TS 104 053-4 V1.1.1 (2024-07) 15 Figure 7: TA34 with valid input Figure 8: TA34 with invalid input |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.7 TA42 | |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.7.1 Inputs and Outputs | • Input 1: K2, a sequence of bits of length 256 ETSI ETSI TS 104 053-4 V1.1.1 (2024-07) 16 • Input 2: RSO, a sequence of bits of length 80 • Output: KSOX, a sequence of bits of length 256 |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.7.2 Algorithm Definition | • Encrypt the block RSO || Z(168) || C(42) under Rijndael (K256, B256) with key K2, and take KSOX to be the ciphertext. Algorithm TA42 is illustrated in figure 9. Figure 9: TA42 |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.8 TA93 | |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.8.1 Inputs and Outputs | • Input 1: GSKOX, a sequence of bits of length 256 • Input 2: GSKO-VN, a sequence of bits of length 16 • Input 3: KSOX, a sequence of bits of length 256 • Output: SGSKOX, a sequence of bits of length 288 |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.8.2 Algorithm Definition | 1) Let C = E(E(GSKO-VN || Z(232) || C(93)) ⊕ GSKOX), where E denotes encryption under Rijndael (K256, B256) with key KSOX. 2) Let T = first 32 of bits E(C), with E as above. 3) SGSKOX is C || T. TA93 is illustrated in figure 10. ETSI ETSI TS 104 053-4 V1.1.1 (2024-07) 17 Figure 10: TA93 |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.9 TA94 | |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.9.1 Inputs and Outputs | • Input 1: SGSKOX, a sequence of bits of length 288 • Input 2: KSOX, a sequence of bits of length 256 • Input 3: GSKO-VN, a sequence of bits of length 16 ETSI ETSI TS 104 053-4 V1.1.1 (2024-07) 18 • Output 1: GSKOX, a sequence of bits of length 256 • Output 2: MF, a single bit |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.9.2 Algorithm Definition | 1) Let C be the first 256 bits of SGSKOX, and T the final 32 bits. 2) Let E and D denote encryption and decryption respectively under Rijndael (K256, B256) with key KSOX. 3) If T = first 32 bits of E(C), set MF = 0 and return GSKOX = D(C) ⊕ E(GSKO-VN || Z(232) || C(93)); otherwise set MF = 1 and set GSKOX to be Z(256). TA94 is illustrated in figure 11 for the case where the input is valid, and in figure 12 for the case where the input is invalid. Figure 11: TA94 for valid input ETSI ETSI TS 104 053-4 V1.1.1 (2024-07) 19 Figure 12: TA94 for invalid input 5.10 TA53 |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.10.1 Inputs and Outputs | • Input 1: SCKX, a sequence of bits of length 192 • Input 2: SCK-VN, a sequence of bits of length 16 • Input 3: KSOX/GSKOX, a sequence of bits of length 256 - below, which is referred to as KSOX • Input 4: SCKN, a sequence of bits of length 5 • Output: SSCKX, a sequence of bits of length 224 |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.10.2 Algorithm Definition | • Let SSCKX be the result of encrypting SCKX || SCK-VN || SCKN || Z(3) || C(53) under Rijndael(K256, B224) with key KSOX. TA53 is illustrated in figure 13. ETSI ETSI TS 104 053-4 V1.1.1 (2024-07) 20 Figure 13: TA53 |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.11 TA54 | |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.11.1 Inputs and Outputs | • Input 1: SSCKX, a sequence of bits of length 224 • Input 2: KSOX/GSKOX, a sequence of bits of length 256 - below, which is referred to as KSOX • Input 3: SCK-VN, a sequence of bits of length 16 • Output 1: SCKX, a sequence of bits of length 192 • Output 2: MF, a single bit • Output 3: SCKN, a sequence of bits of length 5 |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.11.2 Algorithm Definition | 1) Let P be the result of decrypting SSCKX under Rijndael(K256, B224) with key KSOX. 2) Let the first 192 bits of P be SCKX, the next 16 be SCK-VN2, the next 5 SCKN, the next 3 Z, and the final 8 be C. 3) If SCK-VN = SCK-VN2, Z consists of all 0 bits, and C = C(53), then set MF = 0; otherwise set MF = 1, set SCKX to be Z(192), and set SCKN to be Z(5). TA54 is illustrated in figure 14 for the case where the input is valid, and in figure 15 for the case where the input is invalid. ETSI ETSI TS 104 053-4 V1.1.1 (2024-07) 21 Figure 14: TA54 for valid input ETSI ETSI TS 104 053-4 V1.1.1 (2024-07) 22 Figure 15: TA54 for invalid input |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.12 TA83 | |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.12.1 Inputs and Outputs | • Input 1: GCKX, a sequence of bits of length 192 • Input 2: GCK-VN, a sequence of bits of length 16 • Input 3: KSOX/GSKOX, a sequence of bits of length 256 - below, which is referred to as KSOX • Input 4: GCKN, a sequence of bits of length 16 • Output: SGCKX, a sequence of bits of length 224 |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.12.2 Algorithm Definition | 1) Let SGCKX be the result of encrypting GCKX || GCK-VN || GCKN under Rijndael(K256, B224) with key KSOX. TA83 is illustrated in figure 16. ETSI ETSI TS 104 053-4 V1.1.1 (2024-07) 23 Figure 16: TA83 |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.13 TA84 | |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.13.1 Inputs and Outputs | • Input 1: SGCKX, a sequence of bits of length 224 • Input 2: KSOX/GSKOX, a sequence of bits of length 256 - below, which is referred to as KSOX • Input 3: GCK-VN, a sequence of bits of length 16 • Output 1: GCKX, a sequence of bits of length 192 • Output 2: MF, a single bit • Output 3: GCKN, a sequence of bits of length 16 |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.13.2 Algorithm Definition | 1) Let P be the result of decrypting SGCKX under Rijndael(K256, B224) with key KSOX. 2) Let the first 192 bits of P be GCKX, the next 16 be GCK-VN2 and the next 16 GCKN. 3) If GCK-VN = GCK-VN2 then set MF = 0; otherwise set MF = 1, GCKX to be the sequence Z(192), and GCKN to be the sequence Z(16). TA84 is illustrated in figure 17 for the case where the input is valid, and in figure 18 for the case where the input is invalid. ETSI ETSI TS 104 053-4 V1.1.1 (2024-07) 24 Figure 17: TA84 for valid input ETSI ETSI TS 104 053-4 V1.1.1 (2024-07) 25 Figure 18: TA84 for invalid input |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.14 TA72 | |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.14.1 Inputs and Outputs | • Input 1: GCKX, a sequence of bits of length 192 • Input 2: CCKX, a sequence of bits of length 192 • Output: MGCKX, a sequence of bits of length 192 |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.14.2 Algorithm Definition | • Let MGCKX = H(GCKX || CCKX || C(72), 192). TA72 is illustrated in figure 19. ETSI ETSI TS 104 053-4 V1.1.1 (2024-07) 26 Figure 19: TA72 |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.15 TA102 | |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.15.1 Inputs and Outputs | • Input 1: KS, a sequence of bits of length 128 • Input 2: GCKX0, a sequence of bits of length 192 • Input 3: MNI, a sequence of bits of length 24 • Output: KSv, a sequence of bits of length 128 |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.15.2 Algorithm Definition | • Let KSv = H(KS || GCKX0 || MNI || C(102), 128). TA102 is illustrated in figure 20. ETSI ETSI TS 104 053-4 V1.1.1 (2024-07) 27 Figure 20: TA102 |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.16 TA103 | |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.16.1 Inputs and Outputs | • Input 1: KSOX, a sequence of bits of length 256 • Input 2: GCKX0, a sequence of bits of length 192 • Input 3: MNI, a sequence of bits of length 24 • Output: KSOXv, a sequence of bits of length 256 |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.16.2 Algorithm Definition | • Let KSOXv = H(KSOX || GCKX0 || MNI || C(103), 256). TA103 is illustrated in figure 21. ETSI ETSI TS 104 053-4 V1.1.1 (2024-07) 28 Figure 21: TA103 |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.17 TA104 | |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.17.1 Inputs and Outputs | • Input: KSOX, a sequence of bits of length 256 • Output: KSO, a sequence of bits of length 128 |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.17.2 Algorithm Definition | • Let KSO = H(KSOX || C(104), 128). TA104 is illustrated in figure 22. ETSI ETSI TS 104 053-4 V1.1.1 (2024-07) 29 Figure 22: TA104 |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.18 TA105 | |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.18.1 Inputs and Outputs | • Input: KSO, a sequence of bits of length 128 • Output: KSOX, a sequence of bits of length 256 |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.18.2 Algorithm Definition | • Let KSOX = H(KSO || C(105), 256). TA105 is illustrated in figure 23. ETSI ETSI TS 104 053-4 V1.1.1 (2024-07) 30 Figure 23: TA105 |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.19 TA106 | |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.19.1 Inputs and Outputs | • Input: CKX, a sequence of bits of length 192 • Output: CK, a sequence of bits of length 80 |
64d160e6d9835511d1369c3f13f7f6cb | 104 053-4 | 5.19.2 Algorithm Definition | • Let CK = H(CKX || C(106), 80). TA106 is illustrated in figure 24. ETSI ETSI TS 104 053-4 V1.1.1 (2024-07) 31 Figure 24: TA106 ETSI ETSI TS 104 053-4 V1.1.1 (2024-07) 32 Annex A (informative): Bibliography ETSI TS 100 396-6: "Terrestrial Trunked Radio (TETRA); Direct Mode Operation (DMO); Part 6: Security". ETSI TS 101 052-2: "TCCE Security (TCCE); Rules for the management of the TETRA standard authentication and key management algorithm sets; Part 2: TAA2". ETSI ETSI TS 104 053-4 V1.1.1 (2024-07) 33 History Document history V1.1.1 July 2024 Publication |
8ff52e6bc39b3a1de8033166295d69b0 | 104 053-3 | 1 Scope | The present document consists of a specification for a set of algorithms TAA1 which may be used in authentication and key management mechanisms for the Terrestrial European Trunked Radio (TETRA). TAA1 is an acronym for "TETRA Authentication and Key Management Algorithms set 1". These specifications are detailed in clause 5. The present document includes addenda 1, 2 and 3 of the algorithm specifications which adds some algorithms and corrects errors in the original V.1 specification. The block cipher that is used for this TAAl set is the HURDLE-II algorithm. This is described in the present document at clause 6. |
8ff52e6bc39b3a1de8033166295d69b0 | 104 053-3 | 2 References | |
8ff52e6bc39b3a1de8033166295d69b0 | 104 053-3 | 2.1 Normative references | References are either specific (identified by date of publication and/or edition number or version number) or non-specific. For specific references, only the cited version applies. For non-specific references, the latest version of the referenced document (including any amendments) applies. Referenced documents which are not found to be publicly available in the expected location might be found at https://docbox.etsi.org/Reference. NOTE: While any hyperlinks included in this clause were valid at the time of publication, ETSI cannot guarantee their long-term validity. The following referenced documents are necessary for the application of the present document. "Some referenced ENs are also published as Technical Specifications. In all cases, the latest version of such a document, either EN or TS, should be taken as the referenced document. [1] ETSI TS 100 392-7: "Terrestrial Trunked Radio (TETRA); Voice plus Data (V+D); Part 7: Security". |
8ff52e6bc39b3a1de8033166295d69b0 | 104 053-3 | 2.2 Informative references | References are either specific (identified by date of publication and/or edition number or version number) or non-specific. For specific references, only the cited version applies. For non-specific references, the latest version of the referenced document (including any amendments) applies. NOTE: While any hyperlinks included in this clause were valid at the time of publication, ETSI cannot guarantee their long-term validity. The following referenced documents are not necessary for the application of the present document but they assist the user with regard to a particular subject area. Not applicable. |
8ff52e6bc39b3a1de8033166295d69b0 | 104 053-3 | 3 Definition of terms, symbols and abbreviations | |
8ff52e6bc39b3a1de8033166295d69b0 | 104 053-3 | 3.1 Terms | Void. ETSI ETSI TS 104 053-3 V1.1.1 (2024-07) 8 |
8ff52e6bc39b3a1de8033166295d69b0 | 104 053-3 | 3.2 Symbols | Void. |
8ff52e6bc39b3a1de8033166295d69b0 | 104 053-3 | 3.3 Abbreviations | For the purposes of the present document, the following abbreviations apply: TAA1 TETRA Authentication and Authentication Algorithm TETRA Terrestrial Trunked Radio |
8ff52e6bc39b3a1de8033166295d69b0 | 104 053-3 | 4 Introduction | |
8ff52e6bc39b3a1de8033166295d69b0 | 104 053-3 | 4.0 General | The set of algorithms TAA1 described in the present document are the associated algorithms used for providing TETRA air interface authentication and key management as specified in detail by the ETSI TS 300-392-7 [1] Security. The present document is organized as follows: • Clause 5 provides the specification of all TAA1 algorithms, starting with the definition of shared block structures and expansion and shrinking methods for blocks of input/output bits. A number of the algorithms have inputs and outputs of the same length and meet the same requirements, and are therefore specified group- wise. • Clause 6 specifies the HURDLE-II algorithm used with TAA1. |
8ff52e6bc39b3a1de8033166295d69b0 | 104 053-3 | 4.1 TAA1 introduction | The set of algorithms described is designed to support easy software implementation. All algorithms specified below, with the exception of the rather simple algorithms TB1 up to TB7, make use of a block cipher with an input and output consisting of 64-bits and running under a 128-bit key. The block cipher that is used for this TAA1 set is the HURDLE-II Algorithm described in clause 6 of the present document. |
8ff52e6bc39b3a1de8033166295d69b0 | 104 053-3 | 4.2 HURDLE-II introduction | The algorithm HURDLE-II specified in the present document is a 64-bit block cipher with a 128-bit key, designed for use with the TETRA key management and authentication algorithms. The HURDLE-II design is based on the Feistel structure and consists of an iterated round function and a key schedule algorithm. The key schedule is tailored to 16 iterations of the round function. The Feistel structure, a well tried and tested template for producing secure block ciphers, allows encryption and decryption to be achieved using essentially the same code. The present document is organized as follows: • clauses 6.2 to 6.5 provide a full specification of the functional components of the HURDLE-II algorithm; • clause 6.6 specifies how these functions are used to generate the block cipher. ETSI ETSI TS 104 053-3 V1.1.1 (2024-07) 9 |
8ff52e6bc39b3a1de8033166295d69b0 | 104 053-3 | 4.3 Comments on TAA1 specification | |
8ff52e6bc39b3a1de8033166295d69b0 | 104 053-3 | 4.3.1 Illustration of Hurdle-II modes | Figures 1 and 2 illustrate the block structures BL1 and BL2. In these figures the use of the Block Cipher Hurdle-II illustrated by BC is depicted. What the figures do not explicitly show is that Hurdle-II is used in encryption mode in Figure 1 and in decryption mode in Figure 2 (but note that the text in clauses 5.2 and 5.3 describe the use of the encryption and decryption mode). |
8ff52e6bc39b3a1de8033166295d69b0 | 104 053-3 | 4.3.2 Specification of BL2, TA32, TA52, TA 82 and TA92 | Clause 5.3 describes the block structure BL2 without formally specifying the length of the output of BL2. Figure 2 shows the output as being 128 bits (16 bytes) which are split in two parts of 120 bits and 8 bits respectively. Clauses 5.9.3, 5.11.3 and 5.15.3 refer to a 120-bit output of BL2. In fact, what is meant with this is the 120 bits which is the result of deleting from the actual 16-byte BL2 output: O15O14O13O12O11O10O9O8O7O6O5O4O3O2O1O0 the last byte O0 as indicated in Figure 2. The convention of a 16-byte output of BL2 is applied. 4.3.3 Requirements on the use of Redundancy in TA31, TA51, TA81 and TA91 The requirements to the TA31, TA51, TA81 and TA91 and corresponding algorithms which are specified in (TA3* and TA5*) and (TA8* and TA9*) should be clarified as follows. To the input of the TA31, TA51, TA81 and TA91 redundancy shall be added. The output of these algorithms shall be used as input to the respective TA32, TA52, TA82 and TA92 algorithms. The resulting output of these TA32, TA52, TA82 and TA92 should contain the correct redundancy. This is indicated by a Boolean Output. |
8ff52e6bc39b3a1de8033166295d69b0 | 104 053-3 | 4.3.4 Meaning of Boolean Output in TA32, TA52, TA82 and TA92 | TA31, TA51, TA81 and TA91 are encryption algorithms that encrypt values to which first redundancy is added. TA32, TA52, TA82 and TA92 are the corresponding decryption algorithms. Each of these algorithms includes a Boolean output that is referred to as the Manipulation Flag. These Boolean outputs are manipulation detection bits and they may be used to check if the original redundancy is also present in the decrypted value: FALSE = redundancy present and correct (not manipulated), TRUE = redundancy incorrect (manipulated). |
8ff52e6bc39b3a1de8033166295d69b0 | 104 053-3 | 5 TAA1 Algorithms Set | |
8ff52e6bc39b3a1de8033166295d69b0 | 104 053-3 | 5.1 Notation | Throughout the present document bit strings are used. The bits of these strings are numbered from right to left, beginning at zero. Bit strings are divided into strings of bytes, again numbered from right to left starting with zero. E.g. the 128-bit input K is written with bytes: K(127), K(126),. . .,K(2), K(1), K(0), with bytes K15 K14 K13 K12 . . . K4 K3 K2 K1 K0, ETSI ETSI TS 104 053-3 V1.1.1 (2024-07) 10 where the j-th byte is denoted as bit string: Kj(7), Kj(6), Kj(5), Kj(4), Kj(3), Kj(2), Kj(1), Kj(0), and Kj(i) = K (8 × j + i) , for j = 0, 1, 2, … , 15 and i = 0, 1, 2, … , 7. The symbol ⊕ denotes the bytewise addition modulo two (exclusive or); i.e. rightmost bit of byte x is added modulo two to rightmost bit of byte y, ...., leftmost bit of byte x to leftmost bit of byte y. x (i)1 x(i)2 x(i)1 ⊕ x(i)2 0 0 0 0 1 1 1 0 1 1 1 0 x(i) is bit i of byte x y(i) is bit i of byte y i = 0,...7 |
8ff52e6bc39b3a1de8033166295d69b0 | 104 053-3 | 5.2 Basic block structure BL1 | Most of the TAAl algorithms, with exception of TBl up to TB4 and TA61, consist of the basic block structure BLl shown in Figure 1. Figure 1: The basic structure BL1 The input consists of two 64-bit blocks. The leftmost block is enciphered with· a 64-bit block cipher BC using a 128-bit key K (BC is the HURDLE-II block cipher). The output of this encryption is XOR-ed with the rightmost block and the result of this is again enciphered using K as the key. The two encrypted output blocks from both BCs are the 128-bit output of the algorithm core. The block ciphers will be used in two modes, in encryption and decryption mode. |
8ff52e6bc39b3a1de8033166295d69b0 | 104 053-3 | 5.3 Other block Structure BL2 | In three algorithms (TA32, TA52 and TA82, see below), instead of the XOR- function described in clause 5.2 above, the leftmost 56 bits of the leftmost input block are XOR-ed with leftmost 56 bits of the enciphered rightmost block (see Figure 2). The rightmost 8 bits of this enciphered block are XOR-ed with the rightmost 8 bits of the leftmost input block. ETSI ETSI TS 104 053-3 V1.1.1 (2024-07) 11 Figure 2: Other structure BL2 |
8ff52e6bc39b3a1de8033166295d69b0 | 104 053-3 | 5.4 Expansion of bit blocks | |
8ff52e6bc39b3a1de8033166295d69b0 | 104 053-3 | 5.4.0 General | The number of inputs and their block lengths are specific for each (or groups) of the TAA l algorithms. Several input blocks are expanded before they are offered to the algorithm core in order to obtain the required block lengths. In several algorithms, input blocks consisting of 80 or 88 bits need to be expanded to 120 or 128 bits. Four expansion methods, EXP1, EXP2, EXP3 and EXP4 which are described below, are used for this. Both methods, EXP2 and EXP4, expand 80-bit blocks to 128-bit blocks. EXP4 is used for key blocks and is therefore different from EXP2. |
8ff52e6bc39b3a1de8033166295d69b0 | 104 053-3 | 5.4.1 Expansion EXP1 | The input block consisting of 80 bits is expanded to 120 bits as follows (see also Figure 3 below, where B is the original 80-bit string): • split the 80-bit input block into 5 pairs of bytes; • for each pair, compute the XOR of both bytes and insert the result at the right- hand side of the pair. Figure 3: Expansion EXP1 (from 80 to 120 bits) ETSI ETSI TS 104 053-3 V1.1.1 (2024-07) 12 |
8ff52e6bc39b3a1de8033166295d69b0 | 104 053-3 | 5.4.2 Expansion EXP2 | The input block consisting of 80 bits is expanded to 128 bits. The expansion method EXP2 is an EXP1 expansion with one additional step (see also Figure 4): • expansion EXP1; • compute the byte-wise addition (modulo- 256) of all XOR results (5 bytes) obtained in the previous step, and insert the result at the right-hand side of the 120 bits. Expansion EXP1 G =A + C + D + E + F mod 256 (additional step). Figure 4: Expansion EXP2 |
8ff52e6bc39b3a1de8033166295d69b0 | 104 053-3 | 5.4.3 Expansion EXP3 | The string of 88 bits is expanded to 120 bits as follows (see also Figure 5, where the original bit string is denoted by B): • Split the 88-bit string as shown in Figure 5. • Compute the values A, C, D and E, and insert these into the 88-bit block as shown in Figure 5. Figure 5: Expansion EXP3 (from 88 to 120 bits) |
8ff52e6bc39b3a1de8033166295d69b0 | 104 053-3 | 5.4.4 Expansion EXP4 | The 80-bit input blocks, which are used as keys, are expanded to 128 bits, the length of the key to the block cipher. EXP4 is done as follows (see also Figure 6, where the original 80-bit string is denoted by B): • split the 80-bit input block into 5 pairs of bytes; • for each pair, compute the byte-wise addition (modulo 256) of both bytes and insert the result at the left-hand side of the pair of bytes; • compute the XOR of all results of the byte-wise additions (5 bytes) obtained in the previous step, and insert the result at the left-hand side of the 120 bits. ETSI ETSI TS 104 053-3 V1.1.1 (2024-07) 13 Figure 6: Expansion EXP4 (from 80 to 128 bits) |
8ff52e6bc39b3a1de8033166295d69b0 | 104 053-3 | 5.5 Shrinking of blocks | |
8ff52e6bc39b3a1de8033166295d69b0 | 104 053-3 | 5.5.0 General | The outputs of the algorithm core are shrunk (and split) to the required outputs of specific block lengths. In several algorithms, blocks consisting of 120 or 128 bits need to be shrunk to 80 or 88 bits. Three shrinking methods SHR l, SHR2 and SHR3, which are described below, are used for this. |
8ff52e6bc39b3a1de8033166295d69b0 | 104 053-3 | 5.5.1 Shrinking SHR1 | The block consisting of 120 bits, denoted as B, is shrunk to 80 bits by taking only the bytes numbered B14, B13, B11, B10, B8, B7, B5, B4, B2 and B1. |
8ff52e6bc39b3a1de8033166295d69b0 | 104 053-3 | 5.5.2 Shrinking SHR2 | The block consisting of 120 bits, denoted as B, is shrunk to 88 bits by taking only the bytes B14, B13, B11, B10, B9, B7, B6, B5, B3, B2 and B1. |
8ff52e6bc39b3a1de8033166295d69b0 | 104 053-3 | 5.5.3 Shrinking SHR3 | The block consisting of 128 bits is shrunk to 80 bits by throwing away the leftmost 24 bits as well as the rightmost 24 bits. |
8ff52e6bc39b3a1de8033166295d69b0 | 104 053-3 | 5.6 Algorithms TA11, TA21 and TA41 | |
8ff52e6bc39b3a1de8033166295d69b0 | 104 053-3 | 5.6.0 General | 5. |
8ff52e6bc39b3a1de8033166295d69b0 | 104 053-3 | 6.0 General | The three algorithms TA11, TA21 and TA41 have the same input-output properties and meet the same requirements. The inputs and output are of the following lengths: Parameter Size Input 1 Input 2 128 bits 80 bits Output 128 bits ETSI ETSI TS 104 053-3 V1.1.1 (2024-07) 14 The algorithms TA11, TA21 and TA41 are based on the BL1 structure as shown in Figure 7: • Input 1 is used as the key to BL1. • Input 2 is expanded to 128 bits and is used as the data input to BL1. • The Output is the output of BL1. Input 2* (expand) BL1 Output 128 bits 128 bits Key (input1) *Reversed for clause 5.6.2 Figure 7: The TA11, TA21 and TA41 Algorithm |
8ff52e6bc39b3a1de8033166295d69b0 | 104 053-3 | 5.6.1 Input 2 of TA11, TA4l | The input 2 is expanded using EXP2 defined in clause 5.4.2. |
8ff52e6bc39b3a1de8033166295d69b0 | 104 053-3 | 5.6.2 Input 2 of TA21 | The bytes of Input 2 are first reversed, i.e. if Input 2 is S9, S8 …S1, S0 then its reverse S' is: S'I = S9-1, 0≤ I ≤ 9. The reversed string S' is defined in clause 5.4.2 then expanded using EXP2. |
8ff52e6bc39b3a1de8033166295d69b0 | 104 053-3 | 5.7 Algorithms TA12 and TA22 | |
8ff52e6bc39b3a1de8033166295d69b0 | 104 053-3 | 5.7.0 General | The algorithms TA12 and TA22 have the same input-output properties and meet the same requirements. The Inputs and Outputs are: Parameter Size Input 1 Input 2 128 bits 80 bits Output 1 Output 2 32 bits 80 bits The algorithms are based on the BLl structure as shown in Figure 8. ETSI ETSI TS 104 053-3 V1.1.1 (2024-07) 15 Input 2 (expand) BL1 Output 1 Output 2 128 bits 128 bits Bit selection Key(input 1) Figure 8: The TA12 and TA22 Algorithm Input 1 is used as the key to BLl. Input 2 is expanded to 128 bits and used as the data input to BLl. The two Outputs are derived from the 128-bit output of BLl. |
8ff52e6bc39b3a1de8033166295d69b0 | 104 053-3 | 5.7.1 Input expansion | The input 2 is expanded using EXP2 defined in clause 5.4.2. |
8ff52e6bc39b3a1de8033166295d69b0 | 104 053-3 | 5.7.2 Output 1 derivation | If the bytes of the 128-bit output of BL1 are numbered B0 to B15 from right to left then the 32-bit Output 1 is: |
8ff52e6bc39b3a1de8033166295d69b0 | 104 053-3 | 5.7.3 Output 2 derivation | Output 2 consists of the remaining 10 bytes of the 128-bit output of BL1: |
8ff52e6bc39b3a1de8033166295d69b0 | 104 053-3 | 5.8 Algorithm TA31 | |
8ff52e6bc39b3a1de8033166295d69b0 | 104 053-3 | 5.8.0 General | The Inputs and Output of the algorithm are: Parameter Size Input 1 Input 2 Input 3 80 bits 16 bits 80 bits Output 120 bits The algorithm is based on the BLl structure as shown in Figure 9. ETSI ETSI TS 104 053-3 V1.1.1 (2024-07) 16 Input l is expanded and used as the input to BLl. Input 2 is combined with Input 3 and used to form the key. The Output is derived from the output of BLl. |
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