Add 511-case fail-to-pass sweep evidence

.gitattributes

@@ -796,3 +796,12 @@ snapshots/FPGA-MAFIA_fpga_mafia_pr479/FPGA/SDRAM_RTL_Test/DE10_LITE_SDRAM_RTL_Te
 snapshots/FPGA-MAFIA_fpga_mafia_pr479/FPGA/SDRAM_RTL_Test/DE10_LITE_SDRAM_RTL_Test.pof filter=lfs diff=lfs merge=lfs -text
 snapshots/FPGA-MAFIA_fpga_mafia_pr479/FPGA/SDRAM_RTL_Test/demo_batch/DE10_LITE_SDRAM_RTL_Test.sof filter=lfs diff=lfs merge=lfs -text
 snapshots/jotego_jtcores_pr960/cores/s16b/doc/315-5195_schematics.pdf filter=lfs diff=lfs merge=lfs -text
+Repos/HWE/agents/Agentless/test_agentless/apfaudio_eurorack-pmod_pr36/hardware/datasheets/XZMDKVG55W-4.pdf filter=lfs diff=lfs merge=lfs -text
+Repos/HWE/agents/Agentless/test_agentless/apfaudio_eurorack-pmod_pr36/hardware/datasheets/ak4619vn-en-datasheet.pdf filter=lfs diff=lfs merge=lfs -text
+Repos/HWE/agents/Agentless/test_agentless/apfaudio_eurorack-pmod_pr36/hardware/datasheets/pj-301b.pdf filter=lfs diff=lfs merge=lfs -text
+Repos/HWE/agents/Agentless/test_agentless/apfaudio_eurorack-pmod_pr36/hardware/datasheets/pj-324m0.pdf filter=lfs diff=lfs merge=lfs -text
+Repos/HWE/agents/Agentless/test_agentless/apfaudio_eurorack-pmod_pr36/hardware/datasheets/pmod-interface-specification-1_2_0.pdf filter=lfs diff=lfs merge=lfs -text
+Repos/HWE/agents/Lingxi/docs/Lingxi[[:space:]]Technical[[:space:]]Report[[:space:]]2505.pdf filter=lfs diff=lfs merge=lfs -text
+Repos/HWE/agents/Lingxi/docs/Lingxi[[:space:]]v1.5[[:space:]]Technical[[:space:]]Report[[:space:]]200725.pdf filter=lfs diff=lfs merge=lfs -text
+Repos/HWE/agents/Lingxi/docs/Lingxi[[:space:]]v2.0[[:space:]]Technical[[:space:]]Report[[:space:]]2026.pdf filter=lfs diff=lfs merge=lfs -text
+Repos/HWE/agents/Lingxi/imgs/overview_fig.pdf filter=lfs diff=lfs merge=lfs -text

f2p_full_sweep_2026-05-27.csv

@@ -0,0 +1,512 @@
+instance,wrapper_rc,buggy_rc,fixed_rc,verdict,elapsed
+AsFigo_pyslint_pr138,0,2,0,PASS,0s
+AsFigo_pyslint_pr140,0,1,0,PASS,1s
+aolofsson_oh_pr74,0,2,0,PASS,8s
+AsFigo_pyslint_pr149,0,2,0,PASS,8s
+aolofsson_oh_pr114,0,2,0,PASS,8s
+apfaudio_eurorack-pmod_pr36,0,2,0,PASS,8s
+aolofsson_oh_pr110,0,1,0,PASS,8s
+AsFigo_pyslint_pr164,0,2,0,PASS,8s
+aolofsson_oh_pr109,0,1,0,PASS,8s
+AsFigo_pyslint_pr166,0,2,0,PASS,8s
+aolofsson_oh_pr73,0,1,0,PASS,8s
+AsFigo_pyslint_pr167,0,2,0,PASS,8s
+aolofsson_oh_pr81,0,1,0,PASS,9s
+aolofsson_oh_pr58,0,2,0,PASS,9s
+AsFigo_pyslint_pr169,0,2,0,PASS,8s
+alexforencich_verilog-pcie_pr20,0,1,0,PASS,11s
+AsFigo_pyslint_pr180,0,2,0,PASS,7s
+AsFigo_pyslint_pr175,0,2,0,PASS,8s
+AsFigo_pyslint_pr56,0,2,0,PASS,8s
+aolofsson_oh_pr82,0,1,0,PASS,17s
+aolofsson_oh_pr75,0,1,0,PASS,17s
+bensampson5_libsv_pr102,0,2,0,PASS,10s
+bensampson5_libsv_pr106,0,2,0,PASS,11s
+AsFigo_pyslint_pr185,0,2,0,PASS,12s
+AUCOHL_Lighter_pr16,0,1,0,PASS,16s
+bensampson5_libsv_pr59,0,2,0,PASS,10s
+bensampson5_libsv_pr19,0,1,0,PASS,15s
+bensampson5_libsv_pr73,0,2,0,PASS,9s
+bensampson5_libsv_pr63,0,1,0,PASS,9s
+bespoke-silicon-group_basejump_stl_pr371,0,2,0,PASS,8s
+bensampson5_libsv_pr2,0,2,0,PASS,13s
+bensampson5_libsv_pr98,0,2,0,PASS,10s
+bespoke-silicon-group_basejump_stl_pr675,0,1,0,PASS,1s
+bespoke-silicon-group_basejump_stl_pr392,0,2,0,PASS,9s
+bensampson5_libsv_pr100,0,2,0,PASS,23s
+bensampson5_libsv_pr119,0,1,0,PASS,23s
+bensampson5_libsv_pr132,0,2,0,PASS,22s
+bespoke-silicon-group_basejump_stl_pr422,0,1,0,PASS,9s
+bespoke-silicon-group_basejump_stl_pr472,0,2,0,PASS,8s
+bespoke-silicon-group_basejump_stl_pr450,0,2,0,PASS,9s
+bespoke-silicon-group_basejump_stl_pr668,0,2,0,PASS,9s
+bespoke-silicon-group_basejump_stl_pr673,0,2,0,PASS,9s
+bespoke-silicon-group_bsg_manycore_pr635,0,1,0,PASS,0s
+bespoke-silicon-group_basejump_stl_pr737,0,2,0,PASS,1s
+bespoke-silicon-group_basejump_stl_pr677,0,2,0,PASS,9s
+bespoke-silicon-group_basejump_stl_pr676,0,2,0,PASS,9s
+bespoke-silicon-group_basejump_stl_pr697,0,2,0,PASS,9s
+bespoke-silicon-group_basejump_stl_pr699,0,2,0,PASS,8s
+bensampson5_libsv_pr109,0,2,0,PASS,30s
+bensampson5_libsv_pr61,0,2,0,PASS,23s
+bensampson5_libsv_pr150,0,1,0,PASS,30s
+bespoke-silicon-group_basejump_stl_pr706,0,1,0,PASS,9s
+bensampson5_libsv_pr153,0,1,0,PASS,31s
+bespoke-silicon-group_basejump_stl_pr710,0,2,0,PASS,9s
+bespoke-silicon-group_basejump_stl_pr735,0,2,0,PASS,9s
+chipsalliance_adams-bridge_pr213,0,1,0,PASS,0s
+black-parrot_black-parrot_pr1089,0,1,0,PASS,8s
+black-parrot_black-parrot_pr1232,0,1,0,PASS,10s
+buppu3_tnCart_pr17,0,2,0,PASS,9s
+chipsalliance_adams-bridge_pr245,0,1,0,PASS,1s
+bespoke-silicon-group_basejump_stl_pr715,0,1,0,PASS,17s
+chili-chips-ba_openeye-CamSI_pr30,0,2,0,PASS,8s
+chipsalliance_adams-bridge_pr79,0,1,0,PASS,1s
+chipsalliance_adams-bridge_pr82,0,1,0,PASS,1s
+bespoke-silicon-group_basejump_stl_pr739,0,1,0,PASS,16s
+bespoke-silicon-group_bsg_manycore_pr587,0,1,0,PASS,16s
+chipsalliance_caliptra-rtl_pr1132,0,1,0,PASS,5s
+chipsalliance_adams-bridge_pr176,0,1,0,PASS,15s
+black-parrot_black-parrot_pr947,0,1,0,PASS,20s
+black-parrot_black-parrot_pr974,0,1,0,PASS,21s
+chipsalliance_adams-bridge_pr68,0,1,0,PASS,16s
+chipsalliance_adams-bridge_pr222,0,1,0,PASS,21s
+chipsalliance_caliptra-rtl_pr791,0,1,0,PASS,12s
+chipsalliance_adams-bridge_pr77,0,1,0,PASS,16s
+budude2_openfpga-GBC_pr41,0,1,0,PASS,28s
+chipsalliance_caliptra-rtl_pr757,0,1,0,PASS,17s
+chipsalliance_caliptra-ss_pr550,0,127,0,PASS,16s
+chipsalliance_adams-bridge_pr175,0,1,0,PASS,34s
+chipsalliance_Cores-VeeR-EL2_pr265,0,1,0,PASS,1s
+chipsalliance_caliptra-rtl_pr883,0,1,0,PASS,20s
+chipsalliance_caliptra-rtl_pr921,0,1,0,PASS,22s
+chipsalliance_Cores-VeeR-EL2_pr151,0,1,0,PASS,12s
+chipsalliance_caliptra-rtl_pr963,0,1,0,PASS,20s
+chipsalliance_adams-bridge_pr228,0,1,0,PASS,38s
+chipsalliance_Cores-VeeR-EL2_pr259,0,NA,NA,PASS,9s
+chili-chips-ba_openeye-CamSI_pr13,0,2,0,PASS,45s
+chili-chips-ba_openeye-CamSI_pr15,0,2,0,PASS,44s
+chipsalliance_sv-tests_pr7781,0,2,0,PASS,8s
+chipsalliance_caliptra-ss_pr565,0,1,0,PASS,25s
+chipsalliance_caliptra-ss_pr590,0,1,0,PASS,24s
+chipsalliance_caliptra-ss_pr838,0,1,0,PASS,25s
+chipsalliance_Cores-VeeR-EL2_pr363,0,1,0,PASS,14s
+chipsalliance_caliptra-ss_pr750,0,1,0,PASS,26s
+chipsalliance_Cores-VeeR-EL2_pr153,0,2,0,PASS,23s
+esa-tu-darmstadt_tapasco_pr186,0,2,0,PASS,9s
+chipsalliance_Cores-VeeR-EL2_pr423,0,1,0,PASS,17s
+chili-chips-ba_openeye-CamSI_pr26,0,2,0,PASS,54s
+esa-tu-darmstadt_tapasco_pr105,0,2,0,PASS,12s
+FPGA-MAFIA_fpga_mafia_pr429,0,2,0,PASS,9s
+chipsalliance_i3c-core_pr35,0,NA,NA,PASS,20s
+darklife_darkriscv_pr95,0,1,0,PASS,21s
+dawsonjon_fpu_pr16,0,1,0,PASS,18s
+FPGA-MAFIA_fpga_mafia_pr499,0,1,0,PASS,7s
+efabless_clear_pr20,0,1,0,PASS,16s
+FPGA-MAFIA_fpga_mafia_pr473,0,1,0,PASS,10s
+FPGA-MAFIA_fpga_mafia_pr548,0,2,0,PASS,7s
+FPGA-MAFIA_fpga_mafia_pr559,0,1,0,PASS,7s
+FPGA-MAFIA_fpga_mafia_pr449,0,1,0,PASS,16s
+FPGA-MAFIA_fpga_mafia_pr451,0,1,0,PASS,17s
+FPGA-MAFIA_fpga_mafia_pr638,0,2,0,PASS,12s
+FPGA-MAFIA_fpga_mafia_pr452,0,1,0,PASS,18s
+gtaylormb_opl3_fpga_pr51,0,1,0,PASS,10s
+FPGA-MAFIA_fpga_mafia_pr646,0,2,0,PASS,12s
+hdl-util_hdmi_pr23,0,1,0,PASS,8s
+FPGA-MAFIA_fpga_mafia_pr479,0,1,0,PASS,18s
+FPGA-MAFIA_fpga_mafia_pr495,0,1,0,PASS,18s
+hdl-util_hdmi_pr20,0,1,0,PASS,10s
+FPGA-MAFIA_fpga_mafia_pr680,0,1,0,PASS,13s
+HiSA-Team_Simply-V_pr48,0,2,0,PASS,0s
+hdl-util_hdmi_pr34,0,1,0,PASS,9s
+hdl-util_hdmi_pr29,0,1,0,PASS,11s
+HiSA-Team_Simply-V_pr118,0,2,0,PASS,7s
+HiSA-Team_Simply-V_pr52,0,1,0,PASS,7s
+HiSA-Team_Simply-V_pr147,0,2,0,PASS,9s
+hdl-util_hdmi_pr28,0,1,0,PASS,18s
+HiSA-Team_Simply-V_pr129,0,1,0,PASS,10s
+HiSA-Team_Simply-V_pr68,0,1,0,PASS,6s
+HiSA-Team_Simply-V_pr108,0,2,0,PASS,10s
+HiSA-Team_Simply-V_pr184,0,2,0,PASS,9s
+HiSA-Team_Simply-V_pr166,0,2,0,PASS,9s
+HiSA-Team_Simply-V_pr92,0,2,0,PASS,8s
+HiSA-Team_Simply-V_pr102,0,1,0,PASS,16s
+hdl-util_hdmi_pr30,0,1,0,PASS,21s
+IEEE-UCF_Gaming-CPU-Project_pr42,0,2,0,PASS,9s
+hdl-util_hdmi_pr44,0,1,0,PASS,22s
+hdl-util_hdmi_pr22,0,1,0,PASS,31s
+jotego_jtcores_pr1021,0,1,0,PASS,16s
+jotego_jtcores_pr1089,0,1,0,PASS,16s
+jotego_jtcores_pr1077,0,1,0,PASS,16s
+jotego_jtcores_pr1087,0,1,0,PASS,16s
+jotego_jtcores_pr1100,0,1,0,PASS,17s
+jotego_jt12_pr64,0,1,0,PASS,18s
+jotego_jtcores_pr1169,0,1,0,PASS,10s
+FPGA-MAFIA_fpga_mafia_pr655,0,1,0,PASS,39s
+jotego_jtcores_pr1097,0,1,0,PASS,18s
+jotego_jtcores_pr1069,0,NA,NA,PASS,19s
+jotego_jtcores_pr1108,0,1,0,PASS,16s
+jotego_jtcores_pr1101,0,1,0,PASS,19s
+jotego_jtcores_pr1167,0,1,0,PASS,15s
+jotego_jtcores_pr1229,0,1,0,PASS,7s
+jotego_jtcores_pr1193,0,1,0,PASS,10s
+jotego_jtcores_pr1205,0,2,0,PASS,10s
+jotego_jtcores_pr1248,0,2,0,PASS,10s
+chipsalliance_adams-bridge_pr66,0,2,0,PASS,101s
+jotego_jtcores_pr1228,0,1,0,PASS,13s
+jotego_jtcores_pr1191,0,NA,NA,PASS,18s
+jotego_jtcores_pr1182,0,1,0,PASS,19s
+jotego_jtcores_pr1235,0,1,0,PASS,13s
+jotego_jtcores_pr1252,0,1,0,PASS,13s
+jotego_jtcores_pr1279,0,1,0,PASS,10s
+jotego_jtcores_pr1290,0,1,0,PASS,10s
+jotego_jtcores_pr634,0,1,0,PASS,8s
+jotego_jtcores_pr1202,0,NA,NA,PASS,20s
+jotego_jtcores_pr630,0,2,0,PASS,10s
+jotego_jtcores_pr1242,0,NA,NA,PASS,20s
+jotego_jtcores_pr1260,0,NA,NA,PASS,19s
+jotego_jtcores_pr654,0,2,0,PASS,10s
+jotego_jtcores_pr1270,0,NA,NA,PASS,20s
+kumarrishav14_AMBA_APB_pr18,0,2,0,PASS,0s
+jotego_jtcores_pr623,0,1,0,PASS,16s
+jotego_jtcores_pr1316,0,NA,NA,PASS,20s
+KestrelComputer_polaris_pr21,0,2,0,PASS,8s
+Lampro-Mellon_LM-RISCV-DV_pr81,0,2,0,PASS,5s
+jotego_jtcores_pr960,0,2,0,PASS,10s
+jotego_jtcores_pr797,0,1,0,PASS,18s
+jotego_jtcores_pr854,0,NA,NA,PASS,20s
+jotego_jtcores_pr871,0,1,0,PASS,17s
+jotego_jtcores_pr852,0,NA,NA,PASS,21s
+jotego_jtcores_pr855,0,NA,NA,PASS,20s
+lnis-uofu_OpenFPGA_pr2164,0,2,0,PASS,10s
+jotego_jtcores_pr875,0,1,0,PASS,16s
+jotego_jtcores_pr863,0,NA,NA,PASS,21s
+jotego_jtcores_pr893,0,1,0,PASS,17s
+jotego_jtcores_pr951,0,1,0,PASS,18s
+merledu_azadi-soc_pr2,0,1,0,PASS,1s
+KestrelComputer_polaris_pr22,0,1,0,PASS,17s
+lowRISC_opentitan_pr28698,0,1,0,PASS,6s
+jotego_jtcores_pr1265,0,NA,NA,PASS,40s
+lowRISC_ibex_pr2251,0,1,0,PASS,9s
+lowRISC_ibex_pr2241,0,1,0,PASS,9s
+lowRISC_ibex_pr1821,0,1,0,PASS,16s
+merledu_azadi-soc_pr10,0,2,0,PASS,10s
+lowRISC_ibex_pr2166,0,1,0,PASS,14s
+merledu_azadi-soc_pr14,0,2,0,PASS,10s
+lowRISC_ibex_pr1917,0,1,0,PASS,18s
+lowRISC_ibex_pr1839,0,1,0,PASS,22s
+lowRISC_opentitan_pr28469,0,1,0,PASS,17s
+MiSTer-devel_ao486_MiSTer_pr185,0,1,0,PASS,10s
+MiSTer-devel_ao486_MiSTer_pr118,0,2,0,PASS,10s
+lowRISC_ibex_pr2261,0,1,0,PASS,19s
+MiSTer-devel_Genesis_MiSTer_pr144,0,1,0,PASS,1s
+lowRISC_ibex_pr1865,0,2,0,PASS,24s
+MiSTer-devel_Arcade-Robotron_MiSTer_pr25,0,2,0,PASS,9s
+mist-devel_nes_pr4,0,2,0,PASS,18s
+MiSTer-devel_ao486_MiSTer_pr72,0,NA,NA,PASS,17s
+MiSTer-devel_ao486_MiSTer_pr188,0,2,0,PASS,20s
+MiSTer-devel_C64_MiSTer_pr142,0,NA,NA,PASS,18s
+microsoft_cheriot-ibex_pr81,0,2,0,PASS,27s
+MiSTer-devel_Gameboy_MiSTer_pr216,0,1,0,PASS,18s
+MiSTer-devel_Gameboy_MiSTer_pr240,0,NA,NA,PASS,17s
+lowRISC_ibex_pr1872,0,1,0,PASS,39s
+MiSTer-devel_MegaDrive_MiSTer_pr58,0,1,0,PASS,17s
+MiSTer-devel_NES_MiSTer_pr132,0,1,0,PASS,17s
+MiSTer-devel_NES_MiSTer_pr135,0,1,0,PASS,16s
+MiSTer-devel_NES_MiSTer_pr121,0,NA,NA,PASS,18s
+MiSTer-devel_Genesis_MiSTer_pr160,0,NA,NA,PASS,18s
+MiSTer-devel_Gameboy_MiSTer_pr52,0,2,0,PASS,20s
+Multimedia-Processing_Digital-Logic-Design_pr50,0,2,0,PASS,0s
+MPSU_APS_pr98,0,1,0,PASS,1s
+MiSTer-devel_NES_MiSTer_pr436,0,2,0,PASS,9s
+Multimedia-Processing_Digital-Logic-Design_pr65,0,2,0,PASS,1s
+MiSTer-devel_NES_MiSTer_pr147,0,NA,NA,PASS,17s
+muneeb-mbytes_pulpino__spi_master__ip_verification_pr27,0,2,0,PASS,0s
+muneeb-mbytes_pulpino__spi_master__ip_verification_pr32,0,2,0,PASS,1s
+MiSTer-devel_S32X_MiSTer_pr42,0,2,0,PASS,9s
+MiSTer-devel_NES_MiSTer_pr441,0,1,0,PASS,13s
+MiSTer-devel_Saturn_MiSTer_pr249,0,2,0,PASS,8s
+MiSTle-Dev_MiSTeryNano_pr99,0,2,0,PASS,9s
+MiSTer-devel_ao486_MiSTer_pr172,0,1,0,PASS,37s
+Multimedia-Processing_Digital-Logic-Design_pr46,0,2,0,PASS,9s
+Multimedia-Processing_Digital-Logic-Design_pr48,0,2,0,PASS,9s
+muneeb-mbytes_pulpino__spi_master__ip_verification_pr61,0,2,0,PASS,0s
+Multimedia-Processing_Digital-Logic-Design_pr60,0,2,0,PASS,8s
+muneeb-mbytes_pulpino__spi_master__ip_verification_pr63,0,2,0,PASS,1s
+muneeb-mbytes_pulpino__spi_master__ip_verification_pr68,0,2,0,PASS,1s
+Multimedia-Processing_Digital-Logic-Design_pr62,0,2,0,PASS,9s
+MiSTer-devel_NES_MiSTer_pr438,0,1,0,PASS,17s
+Multimedia-Processing_Digital-Logic-Design_pr68,0,2,0,PASS,9s
+muneeb-mbytes_pulpino__spi_master__subsystem_verification_pr28,0,1,0,PASS,1s
+muneeb-mbytes_pulpino__spi_master__subsystem_verification_pr29,0,1,0,PASS,1s
+muneeb-mbytes_pulpino__spi_master__subsystem_verification_pr18,0,2,0,PASS,2s
+muneeb-mbytes_pulpino__spi_master__ip_verification_pr36,0,1,0,PASS,7s
+muneeb-mbytes_pulpino__spi_master__subsystem_verification_pr31,0,1,0,PASS,1s
+MiSTer-devel_NES_MiSTer_pr448,0,1,0,PASS,18s
+MiSTer-devel_NES_MiSTer_pr187,0,NA,NA,PASS,22s
+merledu_azadi-soc_pr5,0,NA,NA,PASS,49s
+MiSTer-devel_S32X_MiSTer_pr44,0,NA,NA,PASS,20s
+muneeb-mbytes_pulpino__spi_master__ip_verification_pr53,0,1,0,PASS,10s
+muneeb-mbytes_pulpino__spi_master__subsystem_verification_pr25,0,1,0,PASS,9s
+openhwgroup_core-v-xif_pr139,0,1,0,PASS,3s
+muneeb-mbytes_pulpino__spi_master__ip_verification_pr42,0,2,0,PASS,13s
+muneeb-mbytes_pulpino__spi_master__ip_verification_pr39,0,1,0,PASS,14s
+olofk_serv_pr105,0,2,0,PASS,9s
+olofk_serv_pr107,0,2,0,PASS,9s
+olofk_serv_pr114,0,2,0,PASS,8s
+openhwgroup_cv32e41p_pr15,0,1,0,PASS,1s
+openhwgroup_cva5_pr7,0,1,0,PASS,0s
+muneeb-mbytes_pulpino__spi_master__ip_verification_pr56,0,1,0,PASS,15s
+openhwgroup_core-v-verif_pr2585,0,2,0,PASS,9s
+muneeb-mbytes_pulpino__spi_master__ip_verification_pr50,0,1,0,PASS,19s
+olofk_serv_pr90,0,1,0,PASS,14s
+muneeb-mbytes_pulpino__spi_master__ip_verification_pr58,0,2,0,PASS,19s
+openhwgroup_cv32e40s_pr254,0,1,0,PASS,8s
+nand2mario_nestang_pr75,0,1,0,PASS,16s
+muneeb-mbytes_pulpino__spi_master__subsystem_verification_pr23,0,1,0,PASS,19s
+olofk_serv_pr109,0,1,0,PASS,17s
+openhwgroup_core-v-xif_pr167,0,1,0,PASS,18s
+openhwgroup_cv32e40x_pr894,0,1,0,PASS,16s
+openhwgroup_cve2_pr118,0,1,0,PASS,17s
+openhwgroup_cve2_pr139,0,1,0,PASS,17s
+openhwgroup_cv32e40p_pr665,0,NA,NA,PASS,22s
+openhwgroup_cv32e40s_pr259,0,1,0,PASS,23s
+openhwgroup_cva5_pr29,0,2,0,PASS,23s
+openhwgroup_cvfpu_pr114,0,2,0,PASS,17s
+openhwgroup_cv-hpdcache_pr119,0,2,0,PASS,8s
+openhwgroup_cv-hpdcache_pr33,0,1,0,PASS,9s
+openhwgroup_cvfpu_pr116,0,1,0,PASS,20s
+openhwgroup_cve2_pr180,0,1,0,PASS,23s
+openhwgroup_cvw_pr1555,0,2,0,PASS,9s
+openhwgroup_cv32e40s_pr263,0,1,0,PASS,34s
+openhwgroup_cv-hpdcache_pr48,0,1,0,PASS,17s
+openhwgroup_cvw_pr1554,0,1,0,PASS,17s
+openhwgroup_cv-hpdcache_pr38,0,1,0,PASS,19s
+pezy-computing_pzbcm_pr2,0,2,0,PASS,0s
+Panda-Cores_PandaZero_pr4,0,2,0,PASS,9s
+OpenPOWERFoundation_a2o_pr18,0,1,0,PASS,17s
+openhwgroup_cvfpu_pr125,0,1,0,PASS,33s
+openhwgroup_cvfpu_pr147,0,1,0,PASS,32s
+openhwgroup_cvfpu_pr140,0,1,0,PASS,33s
+openhwgroup_cve2_pr152,0,1,0,PASS,36s
+openrisc_mor1kx_pr110,0,NA,NA,PASS,17s
+opensocdebug_osd-hw_pr50,0,1,0,PASS,16s
+openrisc_mor1kx_pr54,0,NA,NA,PASS,18s
+Panda-Cores_PandaZero_pr14,0,1,0,PASS,17s
+Panda-Cores_PandaZero_pr3,0,1,0,PASS,16s
+projf_projf-explore_pr86,0,2,0,PASS,8s
+pulp-platform_apb_pr1,0,2,0,PASS,8s
+pulp-platform_apb_pr4,0,2,0,PASS,9s
+pulp-platform_apb_pr7,0,2,0,PASS,9s
+pulp-platform_apb_pr10,0,2,0,PASS,9s
+pulp-platform_apb_pr8,0,2,0,PASS,8s
+Panda-Cores_PandaZero_pr7,0,1,0,PASS,17s
+pulp-platform_apb_pr2,0,2,0,PASS,11s
+phanrahan_mantle_pr92,0,1,0,PASS,16s
+pulp-platform_axi_pr185,0,1,0,PASS,9s
+pulp-platform_axi_riscv_atomics_pr23,0,1,0,PASS,0s
+PeterMonsson_sv_waveterm_pr10,0,1,0,PASS,19s
+projf_projf-explore_pr173,0,NA,NA,PASS,18s
+pulp-platform_axi_pr224,0,1,0,PASS,12s
+pulp-platform_apb_pr3,0,1,0,PASS,16s
+pulp-platform_axi_pr293,0,2,0,PASS,9s
+pulp-platform_axi_riscv_atomics_pr1,0,2,0,PASS,9s
+pulp-platform_axi_pr228,0,2,0,PASS,10s
+pulp-platform_axi_pr138,0,1,0,PASS,19s
+pulp-platform_axi_riscv_atomics_pr15,0,2,0,PASS,10s
+pulp-platform_axi_riscv_atomics_pr22,0,2,0,PASS,8s
+pulp-platform_axi_riscv_atomics_pr39,0,1,0,PASS,9s
+pulp-platform_clic_pr7,0,1,0,PASS,7s
+pulp-platform_axi_riscv_atomics_pr38,0,1,0,PASS,10s
+pulp-platform_axi_pr74,0,1,0,PASS,19s
+pulp-platform_axi_pr245,0,1,0,PASS,21s
+pulp-platform_axi_riscv_atomics_pr18,0,1,0,PASS,19s
+pulp-platform_carfield_pr41,0,1,0,PASS,17s
+pulp-platform_cheshire_pr189,0,1,0,PASS,16s
+pulp-platform_cheshire_pr203,0,1,0,PASS,17s
+openhwgroup_cvfpu_pr87,0,1,0,PASS,68s
+pulp-platform_axi_riscv_atomics_pr31,0,1,0,PASS,31s
+pulp-platform_common_cells_pr132,0,2,0,PASS,37s
+pulp-platform_common_cells_pr151,0,2,0,PASS,38s
+pulp-platform_common_cells_pr155,0,2,0,PASS,38s
+pulp-platform_common_cells_pr228,0,1,0,PASS,29s
+pulp-platform_common_cells_pr170,0,1,0,PASS,38s
+pulp-platform_common_cells_pr188,0,2,0,PASS,37s
+pulp-platform_common_cells_pr225,0,2,0,PASS,38s
+pulp-platform_common_cells_pr224,0,1,0,PASS,42s
+pulp-platform_common_cells_pr222,0,1,0,PASS,46s
+pulp-platform_common_verification_pr10,0,2,0,PASS,17s
+pulp-platform_common_cells_pr236,0,1,0,PASS,45s
+pulp-platform_common_cells_pr230,0,2,0,PASS,45s
+pulp-platform_common_cells_pr240,0,1,0,PASS,45s
+pulp-platform_common_cells_pr242,0,1,0,PASS,45s
+pulp-platform_common_cells_pr247,0,1,0,PASS,46s
+pulp-platform_common_verification_pr5,0,2,0,PASS,20s
+pulp-platform_common_verification_pr6,0,2,0,PASS,21s
+pulp-platform_common_cells_pr257,0,2,0,PASS,38s
+pulp-platform_fpu_div_sqrt_mvp_pr16,0,NA,NA,PASS,17s
+pulp-platform_fpu_div_sqrt_mvp_pr18,0,1,0,PASS,16s
+pulp-platform_pulp_soc_pr95,0,1,0,PASS,1s
+pulp-platform_common_cells_pr182,0,1,0,PASS,64s
+pulp-platform_pulp_soc_pr73,0,2,0,PASS,8s
+pulp-platform_hci_pr27,0,1,0,PASS,16s
+pulp-platform_redundancy_cells_pr18,0,2,0,PASS,9s
+pulp-platform_hci_pr37,0,1,0,PASS,18s
+pulp-platform_neureka_pr30,0,1,0,PASS,17s
+pulp-platform_hci_pr67,0,1,0,PASS,18s
+pulp-platform_pulpissimo_pr233,0,1,0,PASS,16s
+pulp-platform_register_interface_pr17,0,1,0,PASS,9s
+pulp-platform_pulp_soc_pr23,0,1,0,PASS,16s
+pulp-platform_pulp_soc_pr41,0,1,0,PASS,17s
+pulp-platform_register_interface_pr35,0,3,0,PASS,1s
+pulp-platform_gpio_pr2,0,1,0,PASS,29s
+pulp-platform_pulp_soc_pr54,0,1,0,PASS,17s
+pulp-platform_pulp_soc_pr69,0,2,0,PASS,17s
+pulp-platform_register_interface_pr21,0,2,0,PASS,9s
+pulp-platform_common_cells_pr262,0,1,0,PASS,44s
+pulp-platform_common_cells_pr280,0,1,0,PASS,44s
+pulp-platform_register_interface_pr26,0,2,0,PASS,9s
+pulp-platform_register_interface_pr24,0,2,0,PASS,9s
+pulp-platform_register_interface_pr30,0,2,0,PASS,9s
+pulp-platform_register_interface_pr32,0,2,0,PASS,9s
+pulp-platform_register_interface_pr31,0,1,0,PASS,10s
+pulp-platform_common_cells_pr93,0,1,0,PASS,47s
+pulp-platform_register_interface_pr33,0,2,0,PASS,9s
+pulp-platform_register_interface_pr34,0,2,0,PASS,9s
+pulp-platform_snitch_pr259,0,1,0,PASS,1s
+pulp-platform_register_interface_pr36,0,1,0,PASS,8s
+pulp-platform_register_interface_pr39,0,2,0,PASS,9s
+pulp-platform_snitch_pr436,0,1,0,PASS,1s
+pulp-platform_riscv-dbg_pr53,0,2,0,PASS,10s
+pulp-platform_register_interface_pr46,0,1,0,PASS,15s
+pulp-platform_register_interface_pr38,0,1,0,PASS,16s
+pulp-platform_register_interface_pr40,0,1,0,PASS,17s
+pulp-platform_snitch_pr388,0,2,0,PASS,9s
+pulp-platform_riscv-dbg_pr123,0,1,0,PASS,17s
+pulp-platform_riscv-dbg_pr145,0,1,0,PASS,19s
+pulp-platform_riscv-dbg_pr169,0,1,0,PASS,18s
+pulp-platform_tech_cells_generic_pr22,0,2,0,PASS,8s
+pulp-platform_riscv-dbg_pr70,0,NA,NA,PASS,18s
+pulp-platform_tech_cells_generic_pr26,0,2,0,PASS,8s
+pulp-platform_riscv-dbg_pr90,0,1,0,PASS,17s
+pulp-platform_tech_cells_generic_pr27,0,2,0,PASS,9s
+StanfordVLSI_dragonphy2_pr126,0,1,0,PASS,0s
+pulp-platform_riscv-dbg_pr93,0,1,0,PASS,22s
+rggen_rggen-sv-rtl_pr4,0,2,0,PASS,8s
+SpiNNakerManchester_spif_pr8,0,2,0,PASS,9s
+semify-eda_waveform-generator_pr13,0,2,0,PASS,9s
+svunit_svunit_pr113,0,1,0,PASS,0s
+svunit_svunit_pr114,0,1,0,PASS,0s
+svunit_svunit_pr197,0,1,0,PASS,1s
+StanfordVLSI_dragonphy2_pr122,0,2,0,PASS,8s
+pulp-platform_tech_cells_generic_pr30,0,1,0,PASS,17s
+pulp-platform_riscv-dbg_pr155,0,1,0,PASS,32s
+pulp-platform_udma_i2s_pr5,0,1,0,PASS,17s
+StanfordVLSI_dragonphy2_pr90,0,2,0,PASS,9s
+secworks_aes_pr16,0,1,0,PASS,17s
+pulp-platform_riscv-dbg_pr56,0,1,0,PASS,35s
+pulp-platform_snitch_pr394,0,1,0,PASS,33s
+squared-studio_common_pr118,0,1,0,PASS,17s
+svunit_svunit_pr110,0,2,0,PASS,10s
+taichi-ishitani_tvip-axi_pr20,0,1,0,PASS,8s
+SpiNNakerManchester_spio_pr40,0,1,0,PASS,17s
+UTOSS_risc-v_pr128,0,1,0,PASS,1s
+StanfordVLSI_dragonphy2_pr141,0,NA,NA,PASS,17s
+taichi-ishitani_tvip-axi_pr44,0,2,0,PASS,11s
+StanfordVLSI_dragonphy2_pr94,0,2,0,PASS,16s
+UTOSS_risc-v_pr114,0,2,0,PASS,9s
+UTOSS_risc-v_pr107,0,2,0,PASS,12s
+UTOSS_risc-v_pr115,0,1,0,PASS,10s
+UTOSS_risc-v_pr23,0,2,0,PASS,9s
+UTOSS_risc-v_pr132,0,1,0,PASS,9s
+pulp-platform_riscv-dbg_pr89,0,1,0,PASS,45s
+taichi-ishitani_tvip-apb_pr5,0,1,0,PASS,19s
+taichi-ishitani_tvip-common_pr4,0,1,0,PASS,16s
+UTOSS_risc-v_pr42,0,2,0,PASS,9s
+UTOSS_risc-v_pr48,0,1,0,PASS,9s
+UTOSS_risc-v_pr50,0,2,0,PASS,9s
+UTOSS_risc-v_pr54,0,2,0,PASS,9s
+taichi-ishitani_tvip-axi_pr50,0,1,0,PASS,21s
+UTOSS_risc-v_pr134,0,1,0,PASS,17s
+UTOSS_risc-v_pr63,0,1,0,PASS,9s
+UTOSS_risc-v_pr127,0,1,0,PASS,19s
+UTOSS_risc-v_pr25,0,1,0,PASS,17s
+UTOSS_risc-v_pr138,0,NA,NA,PASS,21s
+UTOSS_risc-v_pr83,0,2,0,PASS,8s
+UTOSS_risc-v_pr95,0,2,0,PASS,9s
+UTOSS_risc-v_pr59,0,1,0,PASS,18s
+UTOSS_risc-v_pr77,0,NA,NA,PASS,17s
+UTOSS_risc-v_pr79,0,NA,NA,PASS,16s
+UTOSS_risc-v_pr70,0,1,0,PASS,18s
+UTOSS_risc-v_pr80,0,1,0,PASS,17s
+UTOSS_risc-v_pr81,0,1,0,PASS,17s
+UTOSS_risc-v_pr97,0,1,0,PASS,14s
+UTOSS_risc-v_pr85,0,1,0,PASS,18s
+va7deo_zerowing_pr17,0,1,0,PASS,16s
+verilator_verilator_pr6723,0,1,0,PASS,12s
+verilator_verilator_pr6596,0,2,0,PASS,20s
+verilator_verilator_pr6737,0,1,0,PASS,12s
+verilator_verilator_pr6631,0,2,0,PASS,20s
+verilator_verilator_pr6573,0,2,0,PASS,23s
+verilator_verilator_pr6552,0,1,0,PASS,24s
+verilator_verilator_pr6668,0,2,0,PASS,20s
+verilator_verilator_pr6815,0,1,0,PASS,19s
+verilator_verilator_pr6823,0,2,0,PASS,20s
+verilator_verilator_pr6822,0,2,0,PASS,21s
+verilator_verilator_pr6697,0,134,0,PASS,23s
+verilator_verilator_pr6630,0,1,0,PASS,28s
+verilator_verilator_pr6861,0,2,0,PASS,19s
+verilator_verilator_pr6842,0,2,0,PASS,20s
+verilator_verilator_pr6583,0,5,0,PASS,34s
+xlsynth_bedrock-rtl_pr766,0,2,0,PASS,9s
+verilator_verilator_pr6833,0,2,0,PASS,24s
+xlsynth_bedrock-rtl_pr917,0,2,0,PASS,9s
+wallento_wb2axi_pr4,0,NA,NA,PASS,17s
+verilator_verilator_pr6876,0,2,0,PASS,20s
+YosysHQ_picorv32_pr229,0,2,0,PASS,10s
+Wren6991_Hazard3_pr41,0,1,0,PASS,17s
+verilator_verilator_pr6882,0,2,0,PASS,23s
+Wren6991_Hazard3_pr23,0,1,0,PASS,20s
+YosysHQ_nerv_pr14,0,2,0,PASS,15s
+xlsynth_bedrock-rtl_pr785,0,1,0,PASS,17s
+verilator_verilator_pr6870,0,1,0,PASS,26s
+YosysHQ_picorv32_pr244,0,NA,NA,PASS,20s
+zephray_VerilogBoy_pr30,0,NA,NA,PASS,19s
+YosysHQ_picorv32_pr9,0,NA,NA,PASS,19s
+ZipCPU_wb2axip_pr71,0,NA,NA,PASS,19s
+pulp-platform_axi_riscv_atomics_pr35,0,1,0,PASS,0s  # swapped from benchmark_eda
+pulp-platform_register_interface_pr48,0,2,0,PASS,9s  # swapped from benchmark_eda
+pulp-platform_register_interface_pr54,0,1,0,PASS,18s  # swapped from benchmark_eda
+pulp-platform_axi_riscv_atomics_pr13,0,1,0,PASS,19s  # swapped from benchmark_eda
+pulp-platform_axi_riscv_atomics_pr17,0,1,0,PASS,20s  # swapped from benchmark_eda
+hdl-util_hdmi_pr21,0,1,0,PASS,27s  # swapped from benchmark_eda
+pulp-platform_axi_riscv_atomics_pr26,0,1,0,PASS,37s  # swapped from benchmark_eda
+pulp-platform_axi_riscv_atomics_pr27,0,1,0,PASS,38s  # swapped from benchmark_eda
+FPGA-MAFIA_fpga_mafia_pr465,0,1,0,PASS,8s  # rg→grep
+pulp-platform_riscv-dbg_pr79,0,2,0,PASS,15s  # +incdir common_cells, +define COMMON_CELLS_ASSERTS_OFF
+pulp-platform_register_interface_pr55,0,2,0,PASS,10s  # +REG_BUS source, +incdir common_cells, +define COMMON_CELLS_ASSERTS_OFF
+FPGA-MAFIA_fpga_mafia_pr428,0,2,0,PASS,38s  # sed %f→%s in pmon_tasks.vh
+jotego_jtcores_pr1177,0,1,0,PASS,10s  # --Wno-DEFOVERRIDE
+jotego_jtcores_pr1111,0,1,0,PASS,15s  # --Wno-UNSIGNED
+Wren6991_Hazard3_pr28,0,1,0,PASS,5s  # --Wno-ALWNEVER
+hdl-util_hdmi_pr15,0,1,0,PASS,8s  # +define SYNTHESIS+ALTERA_RESERVED_QIS
+hdl-util_hdmi_pr16,0,1,0,PASS,8s  # +define SYNTHESIS+ALTERA_RESERVED_QIS
+aolofsson_oh_pr111,0,2,0,PASS,11s  # rewrote run_verilator.sh to actual F2P
+lowRISC_ibex_pr2214,0,1,0,PASS,31s  # agent-fixed
+pulp-platform_axi_riscv_atomics_pr12,0,1,0,PASS,10s  # agent-fixed
+pulp-platform_axi_riscv_atomics_pr28,0,1,0,PASS,19s  # agent-fixed
+pulp-platform_axi_riscv_atomics_pr33,0,1,0,PASS,9s  # agent-fixed
+pulp-platform_tech_cells_generic_pr29,0,1,0,PASS,14s  # agent-fixed
+rggen_rggen-sv-rtl_pr10,0,1,0,PASS,10s  # agent-fixed
+jotego_jtcores_pr1186,0,1,0,PASS,9s  # added from HWE-train 2026-05-27
+bespoke-silicon-group_basejump_stl_pr666,0,1,0,PASS,15s  # added from useless 2026-05-28
+chipsalliance_Cores-VeeR-EL2_pr182,0,1,0,PASS,1s  # added from useless 2026-05-28
+FPGA-MAFIA_fpga_mafia_pr525,0,1,0,PASS,17s  # added from useless 2026-05-28
+lowRISC_ibex_pr2037,0,1,0,PASS,7s  # added from useless 2026-05-28
+openhwgroup_cv32e40s_pr250,0,1,0,PASS,19s  # added from useless 2026-05-28
+rggen_rggen-sv-rtl_pr16,0,1,0,PASS,17s  # added from useless 2026-05-28
+UTOSS_risc-v_pr113,0,1,0,PASS,16s  # added from useless 2026-05-28
+muneeb-mbytes_pulpino__spi_master__subsystem_verification_pr39,0,1,0,PASS,15s  # added from useless 2026-05-28 (round 2)
+pulp-platform_carfield_pr87,0,1,0,PASS,15s  # added from useless 2026-05-28 (round 2)
+pulp-platform_pulpissimo_pr251,0,1,0,PASS,15s  # added from useless 2026-05-28 (round 2)
+pulp-platform_axi_pr139,0,1,0,PASS,34s  # added from useless 2026-05-28 (round 3, substitute for pr251)