text stringlengths 14 100k | source stringclasses 1
value | repo stringclasses 810
values | language stringclasses 13
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|---|---|---|---|
<|fim_suffix|>corresponding flash
* controller peripheral.
*
*/
#ifndef INCLUDE_ZEPHYR_DRIVERS_FLASH_MCHP_FLASH_H_
#define INCLUDE_ZEPHYR_DRIVERS_FLASH_MCHP_FLASH_H_
#ifdef CONFIG_FLASH_MCHP_NVMCTRL_G1
#include "mchp_nvmctrl_g1.h"
#endif /* CONFIG_FLASH_MCHP_NVMCTRL_G1 */
#endif /* INCLUDE_ZEPHYR_DRIVERS_FLASH_MC... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2025 Microchip Technology Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Header file for Microchip NVMCTRL G1 flash extended operations.
* @ingroup mchp_nvmctrl_g1_flash_ex_op
*
* @note This file should only be included when targeting devices
* with the NVMCTRL ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>t npcx_ex_ops_qspi_oper_out {
uint32_t oper; /**< Bitfield of currently active operations. */
};
/**
* @brief Input parameters for @ref FLASH_NPCX_EX_OP_EXEC_GDMA operation.
*
* Defines the source, destination, and size of a GDMA memory transfer.
*/
struct npcx_ex_ops_gdma_in {
uint32_t src; /**... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>fail
*/
__syscall void nrf_qspi_nor_xip_enable(const struct device *dev, bool enable);
#ifdef __cplusplus
}
#endif
#include <zephyr/syscalls/nrf_qspi_nor.h>
#endif /* __ZEPHYR_INCLUDE_DRIVERS_FLASH_NRF_QSPI_NOR_H__ */
<|fim_prefix|>/*
* Copyright (c) 2022 Nordic Semiconductor ASA
*
* SPDX-License-I... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>
uint32_t b063: 1; /**< Block 63 */
uint32_t b064: 1; /**< Block 64 */
uint32_t b065: 1; /**< Block 65 */
uint32_t b066: 1; /**< Block 66 */
uint32_t b067: 1; /**< Block 67 */
uint32_t b068: 1; /**< Block 68 */
uint32_t b069: 1; /**< Block 69 */
uint32_t b070: 1; /**< Block 70 */
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>* @param out A pointer to a uint8_t buffer to store the current
* WP# pin state. A non-zero value indicates the pin
* is configured to be asserted.
*/
FLASH_RTS5912_EX_OP_GET_WP,
};
/**
* @}
*/
#endif /* __ZEPHYR_INCLUDE_DRIVERS_RTS5912_FLASH_API_EX_H__ */
<|fim_prefix|>/*... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2023 Google Inc
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Header file for STM32 flash extended operations.
* @ingroup stm32_flash_ex_op
*/
#ifndef __ZEPHYR_INCLUDE_DRIVERS_FLASH_STM32_FLASH_API_EXTENSIONS_H__
#define __ZEPHYR_INCLUDE_DRIVERS_FLASH_STM32_FLASH_API_... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>to some operations,
* but should work with explicit erase and RAM non-volatile devices,
* then flash_flatten should rather be used.
*
* @param dev : flash device
* @param offset : erase area starting offset
* @param size : size of area to be erased
*
* @ret... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>the bitstream and program the FPGA
*
* @param dev FPGA device structure.
* @param image_ptr Pointer to bitstream.
* @param img_size Bitstream size in bytes.
*
* @retval 0 if successful.
* @return Failed Otherwise.
*/
static inline int fpga_load(const struct device *dev, uint32_t *image_ptr,
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright 2022 Google LLC
* Copyright 2023 Microsoft Corporation
* Copyright (c) 2025 Philipp Steiner <philipp.steiner1987@gmail.com>
* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
* Copyright (c) 2026 Analog Devices Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2025 Embeint Pty Ltd
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_DRIVERS_GNSS_GNSS_EMUL_H_
#define ZEPHYR_DRIVERS_GNSS_GNSS_EMUL_H_
#include <stdint.h>
#include <zephyr/device.h>
#include <zephyr/drivers/gnss.h>
/**
* @brief Clear all internal GNSS data of the emulator
*
* @p... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2023 Trackunit Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief GNSS driver backend helpers for publishing data and satellite information.
* @in_driverbackendgroup{gnss_interface}
*/
#ifndef ZEPHYR_DRIVERS_GNSS_GNSS_H_
#define ZEPHYR_DRIVERS_GNSS_GNS... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2023 Trackunit Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @ingroup gnss_interface
* @brief Main header file for GNSS driver API.
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_GNSS_H_
#define ZEPHYR_INCLUDE_DRIVERS_GNSS_H_
/**
* @brief Interfaces for Global Navigation Satelli... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2025 Ambiq Micro Inc. <www.ambiq.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Header file for Ambiq GPIO driver
* @ingroup gpio_ambiq_interface
*/
#ifndef ZEPHYR_DRIVERS_GPIO_GPIO_AMBIQ_H_
#define ZEPHYR_DRIVERS_GPIO_GPIO_AMBIQ_H_
/**
* @defgroup gpio_ambiq_interfa... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2026 MASSDRIVER EI (massdriver.space)
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Bouffalolab BL61x GPIO FIFO / Wire Out device-specific API extension
* @ingroup gpio_bl61x_wo_interface
*/
#ifndef ZEPHYR_DRIVERS_GPIO_GPIO_BL61X_WO_H_
#define ZEPHYR_DRIVERS_... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2016 Linaro Limited.
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_GPIO_GPIO_CMSDK_AHB_H_
#define ZEPHYR_INCLUDE_DRIVERS_GPIO_GPIO_CMSDK_AHB_H_
#include <zephyr/drivers/gpio.h>
#ifdef __cplusplus
extern "C" {
#endif
/* ARM LTD CMSDK AHB General Purpose... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2020 Friedt Professional Engineering Services, Inc
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Backend API for emulated GPIO
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_GPIO_GPIO_EMUL_H_
#define ZEPHYR_INCLUDE_DRIVERS_GPIO_GPIO_EMUL_H_
#include <zephyr/types.h>
#incl... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2023 Intel Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_GPIO_GPIO_INTEL_H_
#define ZEPHYR_INCLUDE_DRIVERS_GPIO_GPIO_INTEL_H_
#ifdef __cplusplus
extern "C" <|fim_suffix|>uint8_t num_pins;
uint32_t pad_base;
uint32_t host_owner_reg;
uint3... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>nce.
* @param pins The actual pin mask that triggered the interrupt.
*
*/
void gpio_mcux_lpc_trigger_cb(const struct device *dev, uint32_t pins);
/**
* @}
*/
#endif /* ZEPHYR_INCLUDE_DRIVERS_GPIO_MCUX_LPC_H_ */
<|fim_prefix|>/*
* Copyright 2024 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
/*... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>onst struct device *dev);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* ZEPHYR_INCLUDE_DRIVERS_GPIO_GPIO_NCT38XX_H_ */
<|fim_prefix|>/*
* Copyright (c) 2021 Nuvoton Technology Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Header file for NCT38XX GPIO driver
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_GPIO_GPIO_NRF_H
#define ZEPHYR_INCLUDE_DRIVERS_GPIO_GPIO_NRF_H
#ifdef __cplusplus
extern "C" {
#endif
/** @brief Get pointer to GPIOTE driver instance
* associated with specif... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>ude <zephyr/device.h>
#include <zephyr/drivers/gpio.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Reset function of pca_series
*
* This function pulls reset pin to reset a pca_series
* device if reset_pin is present. Otherwise it write
* reset value to device registers.
*
* @param dev Po... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2024 SILA Embedded Solutions GmbH
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Header file for NXP PCAL64XXA GPIO driver
* @ingroup gpio_pcal64xxa_interface
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_GPIO_GPIO_PCAL64XXA_H_
#define ZEPHYR_INCLUDE_DRIVERS_GPIO_GPIO_PCA... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* SPDX-License-Identifier: Apache-2.0
*
* Copyright (c) 2024 Realtek Semiconductor Corporation, SIBG-SD7
* Author: Lin Yu-Cheng <lin_yu_cheng@realtek.com>
*/
#ifndef ZEPHYR_DRIVERS_GPIO_GPIO_RTS5912_H_
#define ZEPHYR_DRIVERS_GPIO_GPIO_RTS5912_H_
#include <zephyr/device.h>
#include <zephyr/driver... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>IO_GPIO_SX1509B_H_
#define ZEPHYR_INCLUDE_DRIVERS_GPIO_GPIO_SX1509B_H_
/**
* @defgroup gpio_sx1509b_interface SX1509B
* @ingroup gpio_interface_ext
* @brief Semtech SX1509B low-voltage level-shifting GPIO controller
* @{
*/
#include <zephyr/device.h>
#include <zephyr/drivers/gpio.h>
#ifdef __cplus... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2016 Intel Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Header file for GPIO utility functions
* @ingroup gpio_interface
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_GPIO_GPIO_UTILS_H_
#define ZEPHYR_INCLUDE_DRIVERS_GPIO_GPIO_UTILS_H_
/**
* @addtogroup gpio_interface
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2019-2020 Nordic Semiconductor ASA
* Copyright (c) 2019 Piotr Mienkowski
* Copyright (c) 2017 ARM Ltd
* Copyright (c) 2015-2016 Intel Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @ingroup gpio_interface
* @brief Main header file for GPIO driver API.
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2026 Cirrus Logic, Inc.
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_HAPTICS_CS40L26_H_
#define ZEPHYR_INCLUDE_DRIVERS_HAPTICS_CS40L26_H_
#include <zephyr/kernel.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
/**
* @file
* @brief Public A... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>int cs40l5x_logger(const struct device *const dev, enum cs40l5x_logger logger_state);
/**
* @brief Get runtime haptics logging data for the specified logger source
*
* @param[in] dev Pointer to the device structure for haptic device instance
* @param[in] source See @ref cs40l5x_logger_source
* @para... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2024 Cirrus Logic, Inc.
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Header file providing the API for the DRV2605 haptic driver
* @ingroup drv2605_interface
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_HAPTICS_DRV2605_H_
#define ZEPHYR_INCLUDE_DRIVERS_HAPTICS_DRV260... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2026 Anuj Deshpande
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Header file providing the API for the TM6605 haptic driver
* @ingroup tm6605_interface
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_HAPTICS_TM6605_H_
#define ZEPHYR_INCLUDE_DRIVERS_HAPTICS_TM6605_H_
#inc... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright 2024 Cirrus Logic, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @ingroup haptics_interface
* @brief Main header file for haptics driver API.
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_HAPTICS_H_
#define ZEPHYR_INCLUDE_DRIVERS_HAPTICS_H_
/**
* @brief Interfaces for haptic... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2018 Alexander Wachter
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @ingroup hwinfo_interface
* @brief Main header file for hardware information (hwinfo) driver API.
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_HWINFO_H_
#define ZEPHYR_INCLUDE_DRIVERS_HWINFO_H_
/**
* @brief... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 Sequans Communications
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @ingroup hwspinlock_interface
* @brief Main header file for hardware spinlock driver API.
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_HWSPINLOCK_H_
#define ZEPHYR_INCLUDE_DRIVERS_HWSPINLOCK_H_
/**
* @... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>-EBUSY Returned without waiting.
* @retval -EAGAIN Waiting period timed out,
* or the underlying semaphore was reset during the waiting period.
*/
int i2c_nrfx_twim_exclusive_access_acquire(const struct device *dev, k_timeout_t timeout);
/** @brief Releases exclusive access to the i2c... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2024 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_DRIVERS_I2C_RTIO_H_
#define ZEPHYR_DRIVERS_I2C_RTIO_H_
#include <zephyr/kernel.h>
#include <zephyr/drivers/i2c.h>
#include <zephyr/rtio/rtio.h>
#ifdef __cplusplus
extern "C" {
#<|fim_suffix|>nst stru... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2023 SILA Embedded Solutions GmbH
*
* SPDX-License-Identifier: Apache-2.0
*
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_I2C_STM32_H_
#define ZEPHYR_INCLUDE_DRIVERS_I2C_STM32_H_
#include <zephyr/device.h>
enum i2c_stm32_mode {
I2CSTM32MODE_I2C,
I2CSTM32MODE_SMBUSHOST,
I2CSTM32MODE_SMBUSDEVICE,
I2CST... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>ntroller mode.
* @param dev_addr Address of the I2C device for writing.
* @param start_addr Internal address to which the data is being written.
* @param buf Memory pool from which the data is transferred.
* @param num_bytes Number of bytes being written.
*
* @retval 0 on success.
* @retval -EIO Ge... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> emulator to use
* @return 0 indicating success (always)
*/
int i2c_emul_register(const struct device *dev, struct i2c_emul *emul);
/** Definition of the emulator API */
struct i2c_emul_api {
i2c_emul_transfer_t transfer;
};
#ifdef __cplusplus
}
#endif
/**
* @}
*/
#endif /* ZEPHYR_INCLUDE_DRIVERS... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2017 Piotr Mienkowski
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @ingroup i2s_interface
* @brief Main header file for I2S (Inter-IC Sound) driver API.
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_I2S_H_
#define ZEPHYR_INCLUDE_DRIVERS_I2S_H_
/**
* @defgroup i2s_interface I... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> I3C_ADDR_SLOT_STATUS_FREE = 0U,
/** Address is reserved. */
I3C_ADDR_SLOT_STATUS_RSVD,
/** Address is associated with an I3C device. */
I3C_ADDR_SLOT_STATUS_I3C_DEV,
/** Address is associated with an I2C device. */
I3C_ADDR_SLOT_STATUS_I2C_DEV,
/** Bit masks used to filter status bits. */
I3C... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright 2022 Intel Corporation
* Copyright 2023 Meta Platforms, Inc. and its affiliates
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_I3C_CCC_H_
#define ZEPHYR_INCLUDE_DRIVERS_I3C_CCC_H_
/**
* @brief I3C Common Command Codes
* @defgroup i3c_ccc I3C Common Command Codes
* @in... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright 2022 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_I3C_DEVICETREE_H_
#define ZEPHYR_INCLUDE_DRIVERS_I3C_DEVICETREE_H_
/**
* @brief I3C Devicetree related bits
* @defgroup i3c_devicetree I3C Devicetree related bits
* @ingroup i3c_interfa... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright 2024 Meta Platforms, Inc. and its affiliates
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_I3C_ERROR_TYPES_H_
#define ZEPHYR_INCLUDE_DRIVERS_I3C_ERROR_TYPES_H_
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief I3C SDR Controller Error Types
*
* These ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright 2024 Meta Platforms
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_I3C_HDR_DDR_H_
#define ZEPHYR_INCLUDE_DRIVERS_I3C_HDR_DDR_H_
/**
* @brief I3C HDR DDR API
* @defgroup i3c_hdr_ddr I3C HDR DDR API
* @ingroup i3c_interface
* @{
*/
#include <errno.h>
#in... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright 2022 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_I3C_IBI_H_
#define ZEPHYR_INCLUDE_DRIVERS_I3C_IBI_H_
/**
* @brief I3C In-Band Interrupts
* @defgroup i3c_ibi I3C In-Band Interrupts
* @ingroup i3c_interface
* @{
*/
#include <stdint.... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2024 Intel Corporation
* Copyright (c) 2024 Meta Platforms
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_DRIVERS_I3C_RTIO_H_
#define ZEPHYR_DRIVERS_I3C_RTIO_H_
#include <zephyr/kernel.h>
#include <zephyr/drivers/i3c.h>
#include <zephyr/rtio/rtio.h>
#ifdef __cplusplus... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>a read operation from the address associated
* with a particular device.
*
* The value returned in @p val will be transmitted. A success
* return shall cause the controller to react to additional read
* operations. An error return shall cause the controller to ignore
* bus operations until a n... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright 2022 Intel Corporation
* Copyright 2023 Meta Platforms, Inc. and its affiliates
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @ingroup i3c_interface
* @brief Main header file for I3C (Inter-Integrated Circuit) driver API.
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_I3C_H_
#defin... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2017 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_IEEE802154_CC1200_H_
#define ZEPHYR_INCLUDE_DRIVERS_IEEE802154_CC1200_H_
#include <zephyr/device.h>
/* RF settings
*
* First 42 entries are for the 42 first registers from
* addres... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>nect_dynamic;
#endif
};
#endif /* ZEPHYR_INCLUDE_DRIVERS_DW_ACE_H */
<|fim_prefix|>/*
* Copyright (c) 2022 Intel Corporation
* SPDX-License-Identifier: Apache<|fim_middle|>-2.0
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_DW_ACE_H
#define ZEPHYR_INCLUDE_DRIVERS_DW_ACE_H
#include <zephyr/device.h>
typedef void... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2021 Teslabs Engineering S.L.
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_INTERRUPT_CONTROLLER_GD32_EXTI_H_
#define ZEPHYR_INCLUDE_DRIVERS_INTERRUPT_CONTROLLER_GD32_EXTI_H_
#include <stdint.h>
#include <zephyr/sys/util_macro.h>
/**
* @name EXTI trigger modes.
*... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2019 Stephanos Ioannidis <root@stephanos.io>
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Driver for ARM Generic Interrupt Controller
*
* The Generic Interrupt Controller (GIC) is the default interrupt controller
* for the ARM A and R profile cores. This dr... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2021 BayLibre, SAS
*<|fim_suffix|>e *dev, uint32_t device_id,
uint32_t event_id, unsigned int intid);
typedef int (*its_api_send_int_t)(const struct device *dev, uint32_t device_id, uint32_t event_id);
typedef uint32_t (*its_api_get_msi_addr_t)(const struct device *dev);
__sub... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2016 Open-RnD Sp. z o.o.
* Copyright (c) 2024 STMicroelectronics
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @brief GPIO interrupt controller API for STM32 MCUs
*
* This API is used to interact with the GPIO interrupt controller
* of STM32 microcontrollers.
*/
#ifndef Z... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> as obtained by esp_intr_alloc or esp_intr_alloc_intrstatus
*
* @return -EINVAL if the combination of arguments is invalid.
* 0 otherwise
*/
int esp_intr_disable(intr_handle_t handle);
/**
* @brief Enable the interrupt associated with the handle
*
* @note For local interrupts (``ESP_INTERN... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>VAL if @p line_num is invalid
*/
int stm32_exti_enable(uint32_t line_num, stm32_exti_trigger_type trigger,
stm32_exti_mode mode);
/**
* @brief Disable EXTI line.
* After this function has been called, EXTI line @p line_num will
* not generate further interrupts or events.
*
* @param line_num... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>S_INTERRUPT_CONTROLLER_INTC_MAX32_RV32_H_ */
<|fim_prefix|>/*
* Copyright (c) 2026 Analog Devices, Inc
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief MAX32 RV32 interrupt controller API
*
* This API is used to interact with MAX32 RV32 interrupt controller
*/
#ifndef ZEPHYR_DRIV... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> z_aic_irq_disable(unsigned int irq);
/**
* @brief Check if an interrupt is enabled.
*
* @param irq interrupt ID.
*
* @retval 0 If interrupt is disabled.
* @retval 1 If interrupt is enabled.
*/
int z_aic_irq_is_enabled(unsigned int irq);
#endif /* ZEPHYR_DRIVERS_INTC_MCHP_AIC_G1_H_ */
<|fim_prefi... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>define INCLUDE_ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_MCHP_EIC_G1_H_
#include <soc.h>
#include <zephyr/types.h>
#include <zephyr/drivers/gpio.h>
/**
* @brief EIC ISR callback used to notify the GPIO layer of an interrupt.
*
* @param[in] pins Bitmask of GPIO pins that triggered (bit n => pin n).
* ... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2021 Microchip Technology Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @brief Driver for External interrupt controller in Microchip XEC devices
*
* Based on reference manuals:
* Reference Manuals for MEC152x and MEC172x ARM(r) 32-bit MCUs
*
* Chapter: EC Interrupt Aggregator (EC... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> @param dev GINT device
* @param port Port number
* @param pin Pin number (0-31)
* @return 0 on success, negative errno on failure
*/
int nxp_gint_disable_pin(const struct device *dev, uint8_t port, uint8_t pin);
/**
* @brief Check if GINT interrupt is pending
*
* @param dev GINT device
* @return... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright 2022, 2024-2025 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @brief Driver for NXP SIUL2 external interrupt/event controller.
*
*/
#ifndef ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_NXP_SIUL2_EIRQ_H_
#define ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_NXP_SIUL2_EIRQ_H_
/** NXP ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 Renesas Electronics Corporation
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Renesas RX group interrupt controller header file
*/
#ifndef ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_RENESAS_RX_GRP_INT_H_
#define ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_IN<|fim_suff... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 Renesas Electronic<|fim_suffix|>BOTH_EDGE,
ICU_MODE_NONE,
};
enum icu_dig_filt {
DISENABLE_DIG_FILT,
ENABLE_DIG_FILT,
};
typedef struct rx_irq_dig_filt_s {
uint8_t filt_clk_div; /* PCLK divisor setting for the input pin digital filter. */
uint8_t filt_enable; /* Filter ena... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2024-2025 Renesas Electronics Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_RZ_EXT_IRQ_H_
#define ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_RZ_EXT_IRQ_H_
#define RZ_EXT_IRQ_TRIG_FALLING 0
#define RZ_EXT_IRQ_TRIG_RISING ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2026 Renesas Electronics Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Renesas RZ Interrupt Controller API
*
* This is used for Renesas RZ Interrupt Controller Unit supporting selectable interrupts
*/
#ifndef ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_I... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2025 Renesas Electronics Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
enum intc_rz_tint_trigger {
/** Interrupt triggered on falling edge */
RZ_TINT_FAILING_EDGE,
/** Interrupt triggered on rising edge */
RZ_TINT_RISING_EDGE,
/** Interrupt triggered on both edges */
RZ_TINT_BOTH_... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>IM_PRIFIQ_VALID_VAL_TRUE (0x1U)
#define VIM_PRIFIQ_VALID_VAL_FALSE (0x0U)
#define VIM_PRIFIQ_PRI_MASK (0x000F0000U)
#define VIM_PRIFIQ_NUM_MASK (BIT_MASK(10))
/* IRQGSTS */
#define VIM_IRQGSTS_STS_MASK (BIT64_MASK(32))
/* FIQGSTS */
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>e *dev, uint8_t irq, uint8_t pin,
wkpu_nxp_s32_callback_t cb, void *arg);
/**
* @brief Set edge event and enable interrupt for WKPU line
*
* @param dev WKPU device
* @param irq WKPU interrupt number
* @param trigger pin activation trigger
*/
void wkpu_nxp_s32_enable_interrupt(const stru... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2022 Schlumberger
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_XMC4XXX_INTC_H_
#define ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_XMC4XXX_INTC_H_
/**
* @brief Enable interrupt for specific port_id and pin combination
*
* @param port_id Port in... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2020 Intel Corporation
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_INTEL_VTD_H_
#define ZEPHYR_INCLUDE_DRIVERS_INTEL_VTD_H_
#include <zephyr/drivers/pcie/msi.h>
typedef int (*vtd_alloc_entries_f)(const struct device *dev,
uint8_t n_entries);
typ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>ICAL 0x00000000
#define IOAPIC_DELIVERY_MODE_MASK 0x00000700
#define IOAPIC_FIXED 0x00000000
#define IOAPIC_LOWEST 0x00000100
#define IOAPIC_SMI 0x00000200
#define IOAPIC_NMI 0x00000400
#define IOAPIC_INIT 0x00000500
#define IOAPIC_EXTINT 0x00000700
#ifndef _ASMLANGUAGE
uint32_t z_ioapic_num_rtes(void);
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/* loapic.h - public LOAPIC APIs */
/*
* Copyright (c) 2015 Wind River Systems, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_LOAPIC_H_
#define ZEPHYR_INCLUDE_DRIVERS_LOAPIC_H_
#include <zephyr/arch/cpu.h>
#include <zephyr/arch/x86/msr.h>
#include <zephyr/sys/device... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>ge */
NXP_PINT_RISING = kPINT_PinIntEnableRiseEdge,
/* Generate Pin Interrupt on falling edge */
NXP_PINT_FALLING = kPINT_PinIntEnableFallEdge,
/* Generate Pin Interrupt on both edges */
NXP_PINT_BOTH = kPINT_PinIntEnableBothEdges,
/* Generate Pin Interrupt on low level */
NXP_PINT_LOW = kPINT_P... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> *
* APLIC-MSI mode has no per-source priority registers. Priority is
* handled via IMSIC EITHRESHOLD or implicit EIID ordering.
*
* @param irq Multi-level encoded interrupt ID.
* @param prio Priority value (currently ignored in MSI mode).
*/
void riscv_aia_set_priority(uint32_t irq, uint32_t prio);... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* SPDX-FileCopyrightText: Copyright The Zephyr Project Contributors
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief RISC-V APLIC (Advanced Platform-Level Interrupt Controller) driver API
*
* This header provides the API and register definitions for the RISC-V
* Advanced Platform-... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief RISC-V APLIC direct delivery mode driver API
*
* This header provides the API for the RISC-V Advanced Platform-Level
* Interrupt Controller (APLIC) operating in di... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2022 Carlo Caione <ccaione@baylibre.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Driver for Core-Local Interrupt Controller (CLIC)
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_RISCV_CLIC_H_
#define ZEPHYR_INCLUDE_DRIVERS_RISCV_CLIC_H_
/**
* @brief Enable interrupt
*
* @param... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 Synopsys, Inc.
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_INTERRUPT_CONTROLLER_RISCV_IMSIC_H_
#define ZEPHYR_INCLUDE_DRIVERS_INTERRUPT_CONTROLLER_RISCV_IMSIC_H_
#include <zephyr/device.h>
#include <zephyr/types.h>
#include <zephyr/arch/riscv/csr.h>... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2022 Carlo Caione <ccaione@baylibre.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Driver for Platform Level Interrupt Controller (PLIC)
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_RISCV_PLIC_H_
#define ZEPHYR_INCLUDE_DRIVERS_RISCV_PLIC_H_
#include <zephyr/device.h... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> and pin combination
*
* @param port port index (A=0, etc)
* @param pin pin in the port
*/
int sam0_eic_disable_interrupt(int port, int pin);
/**
* @brief Test if there is an EIC interrupt pending for a port
*
* @param port port index (A=0, etc)
*/
uint32_t sam0_eic_interrupt_pending(int port);
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2016 Intel Corporation
*
* SPDX-License-Ident<|fim_suffix|> int irq,
uint32_t flags);
int z_irq_controller_isr_vector_get(void);
static inline void z_irq_controller_eoi(void)
{
x86_write_loapic(LOAPIC_EOI, 0);
}
#endif /* _ASMLANGUAGE */
#endif /* ZEPHYR_INCLUDE_DRIVERS_SYS... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2025 Michael Hope <michaelh@juju.nz>
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_INTERRUPT_CONTROLLER_WCH_EXTI_H_
#define ZEPHYR_INCLUDE_DRIVERS_INTERRUPT_CONTROLLER_WCH_EXTI_H_
#include <stdint.h>
#include <zephyr/sys/util_macro.h>
/* Callback for EXTI interrupt... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 ITE Corporation. All Rights Reserved
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_IT51XXX_WUC_H_
#define ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_IT51XXX_WUC_H_
#include <zephyr/device.h>
/**
* @name wakeup controller flags
* @{
*/
/**... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2022 ITE Corporation. All Rights Reserved
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_IT8XXX2_WUC_H_
#define ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_IT8XXX2_WUC_H_
#include <zephyr/device.h>
#include <stdint.h>
/**
* @brief A trigger condition on the cor... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2015 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @ingroup ipm_interface
* @brief Main header file for IPM (Inter-Processor Mailbox) driver API.
<|fim_suffix|>allback_t)(const struct device *port,
ipm_callback_t cb,
void *user_data);
/**
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> @param dev: LED device structure
* @param limit: current limit to apply
* @return 0 on success, or negative value on error.
*/
int is31fl3733_current_limit(const struct device *dev, uint8_t limit);
#endif /* ZEPHYR_INCLUDE_DRIVERS_LED_IS31FL3733_H_ */
<|fim_prefix|>/*
* Copyright 2023 Daniel DeGrass... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>ed_get_info
*/
DECLARE_FAKE_VALUE_FUNC(int, fake_led_get_info, const struct device *, uint32_t,
const struct led_info **);
/**
* @brief Set the color of a fake LED controller LED.
*
* @see led_set_color
*/
DECLARE_FAKE_VALUE_FUNC(int, fake_led_set_color, const struct device *, uint32_t, uint8_t,
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>_LEDS 6
#define LP5024_MAX_LEDS 8
#define LP5030_MAX_LEDS 10
#define LP5036_MAX_LEDS 12
/*
* LED channels mapping.
*/
/* Bank channels */
#define LP50XX_BANK_CHAN_BASE 0
#define LP50XX_BANK_BRIGHT_CHAN LP50XX_BANK_CHAN_BASE
#define LP50XX_BANK_COL1_CHAN(led) (LP50XX_BANK_CHAN_BASE + 1)
#define L... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2018 Linaro Limited
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @ingroup led_interface
* @brief Main header file for LED driver API.
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_LED_H_
#define ZEPHYR_INCLUDE_DRIVERS_LED_H_
/**
* @brief Interfaces for Light-Emitting Diode (... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2022 Esco Medical ApS
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Header file for extended LED Strip API of TLC5971 LED strip controller
* @ingroup tlc5971_interface
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_LED_STRIP_TLC5971_H_
#define ZEPHYR_INCLUDE_DRIVERS_LED_STRIP_TLC5971_H... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2017 Linaro Limited
* Copyright (c) 2024 Jamie McCrae
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @ingroup led_strip_interface
* @brief Main header file for LED strip driver API.
*
* This library abstracts the chipset drivers for individually
* addressable strip... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>invocation of
* loopback_disk_access_register()
*
* @retval 0 on success;
* @retval <0 negative errno code, depending on file system of the backing file.
*/
int loopback_disk_access_unregister(struct loopback_disk_access *ctx);
#endif /* ZEPHYR_INCLUDE_DRIVERS_LOOPBACK_DISK_ACCESS_H_ */
<|fim_prefix... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>LoRa
*
* @see lora_recv() for argument descriptions.
*/
typedef int (*lora_api_recv)(const struct device *dev, uint8_t *data,
uint8_t size,
k_timeout_t timeout, int16_t *rssi, int8_t *snr);
/**
* @brief Callback API for receiving data asynchronously over LoRa
*
* @param dev Modem to... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>LL)
* - the callback must be called with (data != NULL)
* - The msg content must be the same between sender and receiver
*
*/
/** @brief Type for MBOX channel identifiers */
typedef uint32_t mbox_channel_id_t;
/** @brief Message struct (to hold data and its size). */
struct mbox_msg {
/** Pointer... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> *
* @param[in] dev Pointer to the device structure for the controller
* @param[in] prtad Port address
* @param[in] devad Device address
* @param[in] regad Register address
* @param[in] data Data to write
*
* @retval 0 If successful.
* @retval -EIO General inp... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 Georgij Cernysi<|fim_suffix|>_INCLUDE_MEMC_STM32_H_ */
<|fim_middle|>ov <geo.cgv@gmail.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_INCLUDE_MEMC_STM32_H_
#define ZEPHYR_INCLUDE_MEMC_STM32_H_
int memc_stm32_fmc_clock_rate(uint32_t *rate);
#endif /* ZEPHYR<|e... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2023 Grinn
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_MFD_AD559X_H_
#define ZEPHYR_INCLUDE_DRIVERS_MFD_AD559X_H_
#ifdef __cplusplus
extern "C" {
#endif
#include <zephyr/device.h>
#define AD559X_REG_SEQ_ADC 0x02U
#define AD559X_REG_GEN_CTRL ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>vice *dev, mfd_adp5360_interrupt_callback handler,
void *user_data);
/**
* @brief Register a callback for power good (PGOOD) pin status changes
*
* @param dev Pointer to the device structure for the MFD instance
* @param pin PGOOD pin to monitor (PGOOD1 or PGOOD2)
* @param type Type of PGOOD s... | fim | zephyrproject-rtos/zephyr | c |
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