text
stringlengths 1
7.76k
| source
stringlengths 17
81
|
|---|---|
inductor/capacitor ratio broadens the entire curve. The impedance magnitude at the dip does not change, and thus the current at f0 does not change. In practical terms, the Q for a series circuit, Qseries, may also be defined by the ratio of circuit reactance to the total series resistance at resonance. Qseries = X 0 RT (8.12) Where Qseries is the Q of the series resonant circuit (i.e., Qcircuit for series), RT is the total series resistance (Rseries + Rcoil), X0 is the reactance (either XL or XC) at f0. From Equation 8.12 we can derive an expression for Qseries in terms of R, L and C as follows: Q series = X 0 RT Qseries = √X 0 2 RT 301 Figure 8.7 Magnitude and phase of impedance for a variation of inductor/capacitor ratio. Series Resonance Impedance Variation with Q: L/C Ratio Impedance Phase (degrees) -100 -50 0 50 100 Relative Impedance Magnitude 0 2 4 6 8 10 Normalized Frequency 0.1 1.0 10.0 0.1 1 10 Dashed: Lower Q via lower L/C ratio
|
ACElectricalCircuitAnalysis_Page_301_Chunk801
|
At resonance XL and XC have the same magnitude, thus we can also say: Q series = √X L X C RT Qseries = 1 RT √X L X C Q series = 1 RT √ 2 π f L 2π f C Which simplifies to: Qseries = 1 RT √ L C (8.13) Effect of Q on Component Voltages Effect of Q on Component Voltages Q will create a multiplying effect on the inductor and capacitor voltages at resonance. At f0, the current through the circuit will equal the source voltage divided by R because XC and XL cancel. This current is also flowing through the capacitor and inductor. Equation 8.12 shows that their reactances are Q times higher than R, and therefore their voltages will be Q times higher than the source voltage. KVL is not violated because the voltages across L and C are 180 degrees out of phase and cancel each other. As the circuit Q is increased, the voltage multiplying effect becomes more pronounced. In extreme cases it is possible to produce inductor and capacitor voltages that are more than 100 times larger than the source voltage. As we move away from the resonant frequency, the multiplying effect decreases. At frequencies much lower than f0, almost all of the source voltage will appear across the capacitor with little for the resistor and inductor. At much higher frequencies, nearly all of the source potential appears across the inductor with nothing seen across the capacitor or resistor. This can be seen in Figure 8.8, where the source voltage is unity. As Q decreases, not only do the capacitor and inductor voltages decrease, but another effect comes into play. At relatively high Q values, say 10 or more, the capacitor and inductor maximum voltages occur at approximately f0. At lower Q values the peaks tend to spread apart, with the capacitor's peak below f0 and that of the inductor above f0. This is illustrated in Figure 8.9 (again, the source is unity). 302
|
ACElectricalCircuitAnalysis_Page_302_Chunk802
|
303 Figure 8.8 Series resonance: component voltages for high Q. Series Resonance Voltage Plot: High Q Normalized Voltage 0 2 4 6 8 10 12 Normalized Frequency 0.1 1.0 10.0 0.1 1 10 VR VL VC Series Resonance Voltage Plot: Low Q Normalized Voltage 0 0.5 1 1.5 Normalized Frequency 0.0 0.1 1.0 10.0 100.0 0.01 0.1 1 10 100 VR VL VC Figure 8.9 Series resonance: component voltages for low Q
|
ACElectricalCircuitAnalysis_Page_303_Chunk803
|
Example 8.1 Consider the series circuit of Figure 8.10 with the following parameters: the source is 10 volts peak, L = 1 mH, C = 1 nF and R = 50 Ω. Find the resonant frequency, the system Q and bandwidth, and the half-power frequencies f1 and f2. We begin by finding the resonant frequency. f 0 = 1 2π√LC f 0 = 1 2π√1e-3⋅1e-9 f 0 = 159kHz We now find the magnitude of the inductive reactance, and from that, the system Qseries via Equation 8.12. X L = 2π f 0 L X L = 2π159kHz 1mH X L = 1000Ω Q series = X L RT Qseries = 1000Ω 50Ω Qseries = 20 Knowing the Q, the bandwidth and corner frequencies can be found via Equations 8.4, 8.10 and 8.11. BW = f 0 Q BW = 159kHz 20 BW = 7.95 kHz f 1 = f 0 −BW 2 f 1 = 159kHz −7.95kHz 2 f 1 ≈155kHz 304 Figure 8.10 Circuit for Example 8.1.
|
ACElectricalCircuitAnalysis_Page_304_Chunk804
|
f 2 = f 0 + BW 2 f 2 = 159kHz + 7.95kHz 2 f 2 ≈163kHz Given the 10 volt peak source, the voltages across the capacitor and inductor at the resonance frequency of 159 kHz would be Q times greater, or 200 volts. At higher or lower frequencies, the increased impedance lowers the current and also lowers the voltages across the components. At low frequencies, most of the source will appear across the capacitor while at high frequencies the inductor voltage will approach the source voltage. Refining Series Q Refining Series Q As noted in Chapter 2, all inductors have some series resistance associated with them, usually called Rcoil. This resistance needs to be included as part of the overall circuit resistance, adding to whatever other series resistance exists. While it is possible to measure the DC resistance of a coil using a DMM, this will not necessarily give an accurate value at high frequencies. Thus, a preferred method is to determine Qcoil at the desired frequency from the inductor's spec sheet, and using the calculated reactance at that frequency, determine the value of Rcoil. An example of such a curve is shown in Figure 8.11. 305 Figure 8.11 Inductor Q graph. Frequency (Hz) Q 120 100 80 60 40 1 k 10 k 100 k 1 M B A coil
|
ACElectricalCircuitAnalysis_Page_305_Chunk805
|
For instance, using curve A, Qcoil at 100 kHz is approximately 90. If XL is 450 Ω at this frequency, then Rcoil would be 450 Ω/90, or 5 Ω. Effectively, Qcoil sets the ceiling for the Q of the series resonant circuit, Qseries. That is, the system Q can never be higher than the coil Q. To do so would require less resistance in the loop than Rcoil, which is a practical impossibility. It is also worth noting that Rcoil will create a deviation in the inductor voltage compared to the ideal case. This is because vL covers the combination of the inductive reactance in series with Rcoil, thus the magnitude will be somewhat larger than expected and the angle will be less than 90 degrees. These deviations tend to be quite small unless the inductor's Q is fairly low and the remaining circuit resistance is not very much larger than Rcoil. Example 8.2 For the circuit of Figure 8.11, determine the resonant frequency, the system Q, the bandwidth, and the ideal maximum voltage across each of the three components. Use curve A from Figure 8.11 for the inductor. The first item of importance is finding the resonant frequency. f 0 = 1 2 π√LC f 0 = 1 2π√22e-3 H50e-9F f 0 = 4.8kHz The inductive reactance is: X L = 2π f 0 L X L = 2π 4.8kHz 22 mH X L = 663.3Ω From the graph, Qcoil is approximately 95, meaning Rcoil is: 306 Figure 8.12 Circuit for Example 8.2.
|
ACElectricalCircuitAnalysis_Page_306_Chunk806
|
Rcoil = X L Qcoil Rcoil = 663.3Ω 95 Rcoil = 7Ω Combined with the 140 Ω resistor, we are left with 147 Ω, some 5% higher than if we had ignored it. The system Q is: Q series = X L RT Qseries = 663.3Ω 147Ω Qseries = 4.51 The Q is on the low side but not extremely so. Now for the bandwidth: BW = f 0 Q BW = 4.8kHz 4.51 BW = 1.06 kHz Ideally, at f0 we expect vR will be equal to the source of 1 volt peak while the inductor and capacitor voltages will be Q times larger, or approximately 4.5 volts peak. In reality Rcoil will create a voltage divider, reducing the drop across the 140 Ω resistor to about 0.95 volts. The change in vL will be negligible due to ZL being 663.3489.4° Ω versus the ideal 663.390° Ω. The system Q is relatively low (<10), so the vC and vL peaks will shift a little from f0, with vC peaking at a slightly lower frequency and vL slightly higher. Computer Simulation Computer Simulation Of particular interest in the prior example is the precise shape of the component responses versus frequency. This can be produced via an AC or frequency domain simulation. The circuit of Figure 8.12 is captured in a simulator as shown in Figure 8.13, and is modified by adding the inductor's coil resistance below the inductor. The items of interest are the net resistor voltage which appears between nodes 1 and 2, the capacitor voltage between nodes 2 and 3, and the inductor voltage which appears from node 3 to ground. The analysis is run from 500 Hz to 50 kHz giving us a factor of 10 in frequency on either side of f0, as seen in Figure 8.14. First, the peaks are just below 5 kHz, as expected. The resistor voltage (blue) is about 0.95 volts, and the inductor (red) and capacitor (green) voltages are about 4.5 volts, as calculated. 307
|
ACElectricalCircuitAnalysis_Page_307_Chunk807
|
Also, note that there is a slight spread between the peaks of the capacitor and inductor voltages, with vC slightly below f0 and vL slightly above, again just as expected. At the lowest frequencies, all of the source appears across the capacitor while at the highest frequencies all of the source appears across the inductor. Note the similarity between these curves and those of Figures 8.8 and 8.9 And now for a change of pace; a design problem. 308 Figure 8.14 Voltage versus frequency for each of the three components of the circuit of Figure 8.13. Figure 8.13 The circuit of Example 8.2 in a simulator.
|
ACElectricalCircuitAnalysis_Page_308_Chunk808
|
Example 8.3 Design a series resonant circuit with a resonant frequency of 100 kHz and a bandwidth of 2 kHz using a 10 mH inductor. Assumes the inductor follows curve B in Figure 8.14. We can find the value for the capacitance by rearranging the resonance frequency equation: f 0 = 1 2π√LC √LC = 1 2π f 0 C = 1 (2π f 0) 2 L C = 1 (2π100kHz)210 mH C = 253.3pF Knowing the bandwidth and resonant frequency, we can find the system Q: Q series = f 0 BW Qseries = 100kHz 2 kHz Qseries = 50 At resonance, the inductive reactance will be: X L = 2π f 0 L X L = 2π100kHz 10 mH X L = 6283Ω The preceding tells us that the total series resistance must be: Rseries = X L Q series Rseries = 6283Ω 50 Rseries = 125.7Ω Curve B indicates that Qcoil is approximately 115 at 100 kHz. Thus, Rcoil is: 309
|
ACElectricalCircuitAnalysis_Page_309_Chunk809
|
Rcoil = X L Qcoil Rcoil = 6283Ω 115 Rcoil = 54.6Ω Consequently, we must add 125.7 Ω − 54.6 Ω, or 71.1 Ω, to the series network to achieve the desired system Q. Failure to do so will yield a much higher Q than specified, resulting in a much reduced bandwidth. The completed design is shown in Figure 8.15. 8.3 Parallel Resonance 8.3 Parallel Resonance If the three RLC components are placed in parallel, as in Figure 8.16, a parallel resonant circuit can result. Typically, it would be driven by a current source as shown, although this is not a requirement for resonance. Parallel resonance is slightly more complicated than series resonance due to the fact that the series coil resistance cannot be lumped in with the remaining circuit resistance as it can with the series case. In other words, the practical reality is that we have a series-parallel circuit where the inductor is, in fact, a series combination of the inductance and the coil resistance. It turns out that usually this resistance cannot be ignored, even if it is very small. To alleviate this problem, it is possible to find a parallel equivalent for the series inductive reactance and associated coil resistance. That is, we need a series to parallel transform. Series to Parallel Inductor Transform Series to Parallel Inductor Transform First, let's take a look at what we have in practical terms. A realistic parallel resonant circuit is illustrated in Figure 8.17. This circuit adds the internal coil resistance of the inductor to the ideal circuit shown in Figure 8.16. What we would like to do is derive a means of finding the parallel equivalent of the inductor with its coil resistance. Certainly, this should be possible to do. After all, it is a trivial exercise to do the reverse; namely, taking a parallel combination of 310 Figure 8.16 Ideal parallel resonant circuit. Figure 8.15 Completed circuit design for Example 8.3. Figure 8.17 Realistic parallel resonant circuit.
|
ACElectricalCircuitAnalysis_Page_310_Chunk810
|
an inductor and resistor and finding its series equivalent (i.e., expressing the resulting impedance in rectangular form). After completing the process we should have an equivalent circuit like that shown in Figure 8.18. In this equivalent circuit, R and C are the values from the original circuit while L(p) and Rcoil(p) are the parallel equivalent transformed values derived from the original inductor. In this version, it is easy to combine R in parallel with Rcoil(p) to create a single resistor and thus wind up back at our ideal circuit of Figure 8.16. For the equivalent transform, refer to Figure 8.19. We start with a practical coil consisting of a series combination of resistance and inductive reactance, Rs + jXs. We will find the parallel equivalent, Rp || jXp. We begin with the reciprocal conductance/resistance rule: Rs+jX s = 1 1 R p + 1 jX p 1 Rs+jX s = 1 R p + 1 jX p (8.14) The next step is to isolate the real and imaginary parts of the series version. We can do this by multiplying the left term of Equation 8.10 by the complex conjugate to arrive at an equivalent: 1 Rs+jX s Rs −jX s Rs −jX s = Rs Rs 2+X s 2 + −jX s Rs 2+X s 2 311 Figure 8.18 Transformed (equivalent) version of a realistic parallel resonant circuit. Figure 8.19 Series and equivalent parallel RL combinations.
|
ACElectricalCircuitAnalysis_Page_311_Chunk811
|
Substituting this equivalent back into Equation 8.14 yields, Rs Rs 2+X s 2 + −jX s Rs 2+X s 2 = 1 R p + 1 jX p Therefore, 1 Rp = Rs Rs 2+X s 2 1 jX p = −jX s Rs 2+X s 2 Taking the reciprocal results in: Rp = Rs 2+X s 2 Rs (8.15) jX p = j Rs 2+X s 2 X s (8.16) For high Q coils (Qcoil ≥ 10), Xs >> Rs, so we can approximate these as: Rp ≈X s 2 Rs = Q coil X s = Q coil 2 Rs (8.17) jX p ≈j X s 2 X s = jX s (8.18) Thus, for a high Qcoil, the parallel equivalent reactance is unchanged from the series value and the parallel equivalent resistance is the series resistance times the Q of the coil squared. Interestingly, Equation 8.17 shows that a smaller RS (which yields a proportionally larger Qcoil) results in a larger RP . Thus, the ideal inductor which would have no coil resistance results in an Rp of infinity. Due to this resistive “inversion” of the series-parallel transform, parallel circuit Q is defined as: Qparallel = RT X L (8.19) Where Qparallel is the Q of the parallel resonant circuit (i.e., Qcircuit for parallel), RT is the total parallel resistance (Rp || R), XL is the reactance at f0. 312
|
ACElectricalCircuitAnalysis_Page_312_Chunk812
|
Based on Equation 8.19 and the development of Equation 8.13, it can be shown that: Qparallel = RT√ C L (8.20) For higher Q circuits (Qparallel ≥ 10), f0 is found as in the series case (repeating): f 0= 1 2 π√LC (8.2) For lower Q circuits, f0 will be reduced slightly due to the fact that the transformed resistance is frequency dependent. More on this in an upcoming section. Parallel Resonance Impedance Parallel Resonance Impedance A parallel impedance plot is shown in Figure 8.20. The effect is the inverse of the series case. At low frequencies the small inductive reactance results in a low impedance magnitude with a positive (inductive) phase angle. At high frequencies the small capacitive reactance results in a low impedance magnitude with a negative (capacitive) phase angle. At resonance the reactive values cancel. This leaves just the parallel resistive value which produces the characteristic peak in impedance. The phase angle is zero, corresponding to a power factor of unity. 313 Parallel Resonance Impedance Plot Impedance Phase (degrees) -100 -50 0 50 100 Normalized Impedance Magnitude 0 0.2 0.4 0.6 0.8 1 Normalized Frequency 0.0 0.1 1.0 10.0 100.0 0.01 0.1 1 10 100 Dashed: Lower Q Figure 8.20 Impedance plot for parallel resonant circuit.
|
ACElectricalCircuitAnalysis_Page_313_Chunk813
|
If the parallel resonant circuit is driven by a current source, then the voltage produced across the resonant circuit (sometimes referred to as a tank circuit) will echo the shape of the impedance magnitude. In other words, it will effectively discriminate against high and low frequencies and keep only those signals in the vicinity of the resonant frequency. This is one method of making a bandpass filter. The lower and upper half-power frequencies, f1 and f2, are found in the same manner as in series resonance. Repeating for convenience: BW = f 2 −f 1 (8.3) Qcircuit = f 0 BW (8.4) f 0 = √f 1 f 2 (8.5) f 0 f 1 = f 2 f 0 (8.6) k 0 = 1 2Qcircuit +√ 1 4Qcircuit 2 +1 (8.7) f 1 = f 0 k 0 (8.8) f 2 = f 0×k 0 (8.9) For higher Q circuits (Qcircuit ≥ 10), we can approximate symmetry, and thus f 1 ≈f 0 −BW 2 (8.10) f 2 ≈f 0+ BW 2 (8.11) Finally, it is worth repeating that for relatively low Q values there will be some shifting of the resonant and half-power frequencies from the equations presented above. There are some similarities between parallel and series resonance. Like series, as the parallel Q increases, the impedance curve becomes sharper and the phase change is more abrupt. Further, we also see an apparent “Q amplification” effect in parallel resonant circuits, however, here it will be the reactive currents that will be increased relative to the source current instead of the series component voltages. 314
|
ACElectricalCircuitAnalysis_Page_314_Chunk814
|
Note that the parallel resistor can be used to lower the system Q and thus broaden the bandwidth, however, the system Q can never be higher than the Q of the inductor itself. The inductor sets the upper limit on system Q and therefore, how tight the bandwidth can be. In other words, Qcircuit ≤ Qcoil. This is the same situation we saw for series resonance. Example 8.4 For the circuit of Figure 8.21, determine the resonant frequency, the corner frequencies of f1 and f2, the bandwidth and the system Q. Also find the circuit voltage at the resonant frequency. Rcoil = 100 Ω. First, we'll assume this is a high Q (≥ 10) circuit. f 0= 1 2π√LC f 0= 1 2 π√50 mH910 pF f 0=23.6 kHz X L = 2π f L X L = 2π 23.6kHz 50 mH X L = 7.41k Ω Qcoil = X L Rcoil Qcoil = 7.41k Ω 100Ω Qcoil = 74.1 The parallel equivalent of the coil resistance is: Rp = Rcoil Qcoil 2 Rp = 100Ω74.1 2 Rp = 549.5 kΩ There is no other resistor in parallel with the inductor and capacitor, therefore the equivalent parallel resistance, Rp, is the total resistance of the circuit, RT. Consequently, the Q of the circuit must be the same as Qcoil. We can verify this as follows: 315 Figure 8.21 Circuit for Example 8.4.
|
ACElectricalCircuitAnalysis_Page_315_Chunk815
|
Qparallel = RT X L Qparallel = 549.5k Ω 7.41 kΩ Qparallel = 74.1 Our initial assumption of high circuit Q is met. BW = f 0 Qparallel BW = 23.6 kHz 74.1 BW = 318Hz f 1 ≈f 0 −BW 2 f 1 ≈23.6 kHz −318Hz 2 f 1 ≈23.44kHz f 2 ≈f 0 + BW 2 f 2 ≈23.6 kHz +318Hz 2 f 2 ≈23.76kHz To find the circuit voltage at f0, simply multiply the resonant impedance of 549.5 kΩ times the source of 2 mA. This yields approximately 1100 volts. Computer Simulation Computer Simulation The circuit of Example 8.4 is captured in a simulator as shown in Figure 8.22. 316 Figure 8.22 The circuit of Figure 8.21 in a simulator.
|
ACElectricalCircuitAnalysis_Page_316_Chunk816
|
A frequency domain or AC analysis is run on the circuit, plotting the magnitude of the source voltage (node 1) from 2 kHz to 200 kHz. This will give us roughly a factor of ten on either side of the resonant frequency. The result is shown in Figure 8.23. The plot shows a clear and sharp peak in the low 20 kHz region. Note that the peak voltage is just over 1000 volts, as predicted. Figure 8.24 shows a magnified version of this plot so that we can accurately verify the peak voltage along with f1 and f2. Figure 8.24 shows that the peak is indeed approximately 1100volts. The f1 and f2 frequencies are found at 0.707 times this peak, or some 778 volts. Two measurement cursors are employed for this task. The Y values are the voltages at the cursor's intersection with the curve and the X values are the corresponding frequencies. We can see that the results are in tight agreement with the calculations. At levels of about 777 to 780 volts we obtain f1 and f2 values of approximately 23.44 kHz and 23.75 kHz, respectively. 317 Figure 8.23 Source voltage of the circuit of Figure 8.22.
|
ACElectricalCircuitAnalysis_Page_317_Chunk817
|
Example 8.5 For the circuit of Figure 8.25, determine the resonant frequency, the corner frequencies of f1 and f2, the bandwidth and the system Q. Also find the circuit voltage at the resonant frequency. Rcoil = 100 Ω. This circuit is identical to the one in the previous example with the exception of an added 100 k Ω load resistor. This should lower the system Q and thus widen the bandwidth. The peak impedance will also be reduced which will cause a decrease in the system voltage at resonance. Some parameters will not change. They include: f0 = 23.6 kHz XL = 7.41 k Ω 318 Figure 8.24 Magnified peak of the plot of Figure 8.23. Figure 8.25 Circuit for Example 8.5.
|
ACElectricalCircuitAnalysis_Page_318_Chunk818
|
Qcoil = 74.1 Rp = 549.5 k Ω We'll assume this is a high Q (≥ 10) circuit. Rp is in parallel with the load resistance of R yielding an effective parallel resistance of 549.5 kΩ || 100 kΩ, or 84.6 kΩ. Qparallel = RT X L Qparallel = 84.6 k Ω 7.41k Ω Qparallel = 11.4 The circuit Q is much reduced but our initial assumption of high circuit Q is still met. Now we can find the bandwidth and corner frequencies. BW = f 0 Qparallel BW = 23.6 kHz 11.4 BW = 2.07kHz f 1 ≈f 0 −BW 2 f 1 ≈23.6 kHz −2.07kHz 2 f 1 ≈22.56kHz f 2 ≈f 0 + BW 2 f 2 ≈23.6 kHz + 2.07kHz 2 f 2 ≈24.64 kHz The circuit voltage at f0 is reduced to 84.6 kΩ times 2 mA, or 169.2 volts. Computer Simulation Computer Simulation The simulation results follow those of Example 8.4 and are shown in Figure 8.26. The results agree with the computed values. The peak voltage has been reduced to about 170 volts, and f1 and f2 (found at 0.707 times the peak, or approximately 120 volts) are about 22.5 kHz and 24.6 kHz, respectively. 319
|
ACElectricalCircuitAnalysis_Page_319_Chunk819
|
Example 8.6 Consider the circuit of Figure 8.27 with the following parameters: L=2 mH, C=10 nF, and Qcoil = 25. Determine the resonant frequency and a value for R such that the system bandwidth is 3 kHz. As usual, we'll assume this is a high Q (≥ 10) circuit. This is certainly true of the coil, although we have to determine the resonant frequency in order to determine the Q of the circuit. f 0= 1 2π√LC f 0= 1 2π √2mH 10 nF f 0=35.59kHz Qparallel = f 0 BW Qparallel = 35.59 kHz 3 kHz Qparallel = 11.86 320 Figure 8.26 Simulation results for the circuit of Example 8.5. Figure 8.27 Circuit for Example 8.6.
|
ACElectricalCircuitAnalysis_Page_320_Chunk820
|
We have high Q and can continue18. Ultimately, we need to determine the total parallel resistance required to achieve this Q. Before we can do that we need to determine XL. X L = 2π f L X L = 2π35.59kHz 2mH X L = 447Ω RT = Q parallel×X L RT = 11.86×447Ω RT = 5.3k Ω RT is the parallel combination of R and Rp (the parallel equivalent of Rcoil), so first we need to find Rcoil. Rcoil = X L Qcoil Rcoil = 447Ω 25 Rcoil = 17.9Ω The parallel equivalent resistance of Rcoil is: Rp = Rcoil Qcoil 2 Rp = 17.9Ω25 2 Rp = 11.18kΩ Using the conductance rule, we can find the requisite value of R. R = 1 1 RT −1 R p R = 1 1 5.3k Ω − 1 11.18k Ω R = 10.08kΩ Thus, we need to use a 10.08 kΩ resistor in order to lower the circuit Q enough to achieve a 3 kHz bandwidth. Without this resistor, the bandwidth will be less than half of what is required. 18 Note that if this value had been greater than 25 we'd be stuck for a different reason; namely that we'd need to obtain a higher quality inductor because Qcircuit can't be any higher than Qcoil. 321
|
ACElectricalCircuitAnalysis_Page_321_Chunk821
|
Computer Simulation Figure 8.28 shows the completed design of the previous example captured in a simulator. A 1 mA current source is used for convenience of calculation. Given that RT is 5.3 k Ω, the 1 mA current source should produce 5.3 volts at the resonance frequency of 35.59 kHz. The results of an AC analysis are shown in Figure 8.29. 322 Figure 8.28 Circuit design of Example 8.6 in a simulator. Figure 8.29 Frequency response of the design from Example 8.6.
|
ACElectricalCircuitAnalysis_Page_322_Chunk822
|
First off, the f0 of approximately 35.6 kHz is verified by both the peak in voltage and the phase angle reaching 0° at this frequency, the latter indicating perfect cancellation between the inductor and capacitor (i.e., the circuit impedance is purely resistive and achieving unity power factor). The cursors are used to obtain accurate values for f1 and f2. These frequencies are reached at 0.707 of the peak of 5.3 volts, or about 3.75 volts. The frequencies are approximately 34.15 kHz and 37.15 kHz, achieving the desired bandwidth of 3 kHz. Low Q Parallel Resonance There are some changes in the computations when Qparallel is low. Generally, this means values below 10, although we might think of values between 5 and 10 to be a transition region where deviations of two percentage points or less come into play. Once the circuit Q falls below 5, the deviations from the high Q equations grow rapidly and quickly rise into double digit percentages. The main item of interest here is the shift in f0. These deviations are caused by the fact that the approximations used for Equations 8.17 and 8.18 are no longer true. That is, with low Qcoil values, we can no longer assume that the transformed XL is the same as the original XL (i.e., Xp and Xs in Figure 8.19). Given this fact, we can revisit the basic parallel RLC circuit, but this time using the exact value from the series-to-parallel inductor transform. This is shown in Figure 8.30. RLoad is the combined resistance of the parallel network while Xp is the equivalent value obtained from Equation 8.16 (slightly modified and repeated for convenience): X p = X 2+R 2 X X and R in this equation are the original series values for the inductor. At f0, the magnitudes of the reactances are equal, or XC = Xp, therefore, X C = X 2+R 2 X Expanding yields: 1 2π f 0C = (2π f 0 L) 2+R 2 2π f 0 L Now rearrange and simplify. 2 π f 0 L 2π f 0C = (2π f 0 L) 2+R 2 323 Figure 8.30 Parallel RLC network with exact series transform equivalent.
|
ACElectricalCircuitAnalysis_Page_323_Chunk823
|
L C = (2π f 0 L) 2+R 2 (2π f 0 L)2 = L C −R2 2π f 0 L =√ L C −R 2 2π f 0 =√ 1 LC −R 2 L 2 2π f 0 = 1 √LC √1 −C R 2 L And finally we come to: f 0 = 1 2π√LC √1 −C R 2 L (8.21) If desired, we can treat the first term as the ordinary series resonant frequency and the second term as a fractional coefficient, as in: f 0 = f seriesk p (8.22) Where k p =√1 −C R2 L (8.23) Using Equation 8.20, kp may also be expressed as: k p =√ 1 −1 Q 2 (8.24) Examining Equation 8.23 might lead to some concern, namely, what happens if the second term is greater than or equal to 1? Remember, the definition we're using for resonance is the frequency at which the reactances cancel, which means the phase angle is 0° (unity power factor). If the second term is greater than or equal to 1, the phase shift will never reach 0°, and by that definition, we don't really have a resonant circuit anymore. We will explore the reality of this situation by starting with a simple high Q parallel circuit and then investigate the changes in the magnitude and phase response as the Q is decreased. We begin with the circuit of Figure 8.31. 324
|
ACElectricalCircuitAnalysis_Page_324_Chunk824
|
Assuming we have high circuit Q, the resonant frequency is: f 0= 1 2π√LC f 0= 1 2 π√1 mH100nF f 0=15.92 kHz X L = 2π f L X L = 2π15.92kHz 1mH X L = 100Ω Qcoil = X L Rcoil Qcoil = 100Ω 5Ω Qcoil = 20 There are no other resistances in the circuit, therefore Qcircuit = Qcoil and our initial assumption is correct. The circuit is captured in a simulator and an AC analysis is performed. The resulting plots are shown in Figure 8.32. 325 Figure 8.32 Simulation results using a coil resistance of 5 Ω (Q of 20). Figure 8.31 A basic parallel network.
|
ACElectricalCircuitAnalysis_Page_325_Chunk825
|
The resonant frequency appears to be just under 16 kHz, as predicted. Cursor-based measurement of the frequency at which the phase crosses 0° yields 15.89 kHz. This turns out to be even closer than it seems. In spite of the high circuit Q, kp was calculated and as expected is very close to unity, namely 0.99875. When multiplied by the ideal f0 (i.e., using Equation 8.22), we arrive at 15.90 kHz. Splitting hairs perhaps, but it's good to know the deviation is shrinking. Next, the coil resistance is raised to 50 Ω, yielding a Q of only 2. The simulation is run a second time. kp drops to 0.866 with this lowered Q and should produce an f0 of approximately 13.77 kHz. The plots are shown in Figure 8.33, and zoomed in for a better view. From the lower graph it is obvious that the frequency where the curve reaches 0° is just below 14 kHz. Accurate measurement yields 13.78 kHz, right in line with the theoretical computation. Finally, the coil resistance is increased to 100 Ω. This drops the circuit Q to 1 and more importantly, brings kp down to 0. The resulting simulation plots are shown in Figure 8.34. At first glance the phase plot looks similar to that of Figure 8.32, however, notice that the phase scale has changed with 0° as the maximum. In fact, the phase shift never quite reaches 0°. In this regard we can still say that the kp equation remains an accurate predictor. 326 Figure 8.33 Simulation results using a coil resistance of 50 Ω (Q of 2).
|
ACElectricalCircuitAnalysis_Page_326_Chunk826
|
Alternate Definition for Parallel Resonant Frequency Instead of defining the parallel resonant frequency as the point where the power factor is unity, i.e., where XL and XC have the same magnitude, it can be defined in terms of the frequency where the magnitude of the impedance is maximum. For high Q circuits the two definitions produce essentially the same frequency, however, as the circuit Q decreases into the single digits, the frequency of maximum impedance begins to deviate from both the high Q idealization and the general unity power factor definition. In fact, the frequency of maximum magnitude is situated between the two. We shall refer to this frequency as fZ-max to avoid confusion. The formula is:19 f Z-max = f 0√√ 2 Qcircuit 2 +1 − 1 Q circuit 2 (8.25) 19 For a non-calculus proof, see K. Cartwright, E. Joseph, E. Kaminsky, “Finding the Exact Maximum Impedance Resonant Frequency of a Practical Parallel Resonant Circuit Without Calculus”, Technology Interface International Journal, vol. 11, no. 1, Fall/Winter 2010. [Online Serial]. Available: http://tiij.org/issues/issues/winter2010/fall_winter_2010.htm [Accessed February 15, 2020 ]. 327 Figure 8.34 Simulation results using a coil resistance of 100 Ω (Q of 1).
|
ACElectricalCircuitAnalysis_Page_327_Chunk827
|
This equation will yield a value between the ideal high Q case and the unity power factor case. This can be seen in Figure 8.34 where there is still an impedance peak (as evidenced by the voltage peak) in spite of the fact that a phase angle of 0° is not reached. Furthermore, the frequency of the peak is below that of the high Q case. Equation 8.25 predicts a peak at 13.6 kHz which agrees with the value obtained from the simulation. Combination Series and Parallel Resonance In closing our discussion on resonance we might ask whether or not there are practical, everyday examples of systems exhibiting series and parallel resonance in series-parallel circuits. The answer is yes. A good example is that of a basic dynamic moving coil loudspeaker of the type seen in Chapter 2. This is an electro-mechanical system and thus a proper model has to include the effects of such items as the mechanical losses in the system, the mass of the cone, and the like. One possibility is shown in Figure 8.35. Lvc and Rvc are the inductance and resistance of the voice coil. The remaining components model other aspects of the electro-mechanical system. An impedance plot of a typical loudspeaker is shown in Figure 8.36. 328 Figure 8.35 Equivalent electrical network of a single dynamic loudspeaker. Adapted from R.H.Small, “Direct- Radiator Loudspeaker System Analysis”, Journal of the Audio Engineering Society, June 1972 Figure 8.36 Impedance magnitude and phase of a typical dynamic loudspeaker. Courtesy Dayton Audio
|
ACElectricalCircuitAnalysis_Page_328_Chunk828
|
The loudspeaker of Figure 8.36 is a medium-size woofer with a nominal impedance of 8 Ω. First, note the large variation on both the phase and magnitude of the impedance. The parallel items from the model produce an obvious peak in impedance just below 30 Hz. This is referred to as the free air resonance and is denoted by fs. For this device, the magnitude is over three times the nominal value. Also note that the phase angle is 0° at fs, and that the phase is positive (inductive) below the resonant frequency and negative (capacitive) above it. This behavior is expected from a parallel resonant system. The series elements of the model create the rising impedance that is seen following the dip. Note that the phase angle continues to increase as frequency rises, indicating the growing dominance of the series inductive element. 8.4 Summary 8.4 Summary Resonance can be described as a preferred mode of vibration, or a frequency at which a system operates particularly well. Resonant systems can be used to filter out or select specific frequencies across the spectrum. Obvious uses include tuning circuits, oscillators, filters and the like. In electrical systems there are two basic forms; series RLC resonance and parallel RLC resonance. Series resonance tends to be the less complicated of the two. For series resonance, the resonant frequency, f0, is defined as the frequency at which the magnitude of XL equals the magnitude of XC. In this instance, the reactances cancel, leaving the series impedance as R. This creates a U-shaped curve for the impedance as it varies across the frequency spectrum. At low frequencies, the capacitive reactance dominates and the series impedance is high in magnitude and capacitive. At frequencies above the resonant frequency, the inductive reactance dominates and the series impedance is again high in magnitude but it is inductive. If this circuit is driven with a constant voltage source, the current will be maximum at resonance and tail off at lower and higher frequencies. The sharpness of the current curve across frequency is a function of the system Q, or quality factor. A high Q circuit is one with a very sharp and narrow curve. The “shoulders” of the curve are defined as the frequencies at which the power has dropped to one half of the value at resonance. This corresponds to 0.707 times the current at resonance. The lower frequency is f1 and the upper frequency is f2. The difference between the two is called the bandwidth, BW. The ratio of resonant frequency to the bandwidth yields the circuit Q. Circuit Q can also be found by dividing the magnitude of reactance at resonance to the total circuit resistance. In high Q circuits it is possible for the voltage across the inductor or capacitor to be many times higher than the source voltage, higher in fact, by a factor of Q. 329
|
ACElectricalCircuitAnalysis_Page_329_Chunk829
|
Parallel resonance is similar to series resonance but in some ways is like its mirror image. In a parallel resonant circuit the inductor will dominate at low frequencies and produce a small net impedance. At high frequencies, the capacitor will dominate and also produce a small net impedance. At resonance, the two effectively will cancel and yield a large impedance. In other words, the impedance versus frequency curve will appear like an upside down U, producing maximum impedance at resonance, and the opposite of the series impedance curve. If this system is driven by a constant current source, the resulting voltage will echo the shape of the impedance curve, producing maximum voltage at resonance. The upper and lower frequencies, along with the bandwidth and system Q, are defined in the same manner as they are in the series case (with one exception regarding finding Q via resistance and reactance). There is one important caveat regarding parallel resonant circuits. Practical inductors contain a non-trivial series coil resistance. This can play a dominant role in the system response. Analysis is generally handled by performing a series to parallel transform which creates a parallel resistance out of the inductor's series resistance. As a result, system Q can be found as the ratio of effective parallel resistance to maximum reactive magnitude, the opposite of the series case. For high Q systems, generally taken as 10 or higher, the resonant frequency can use the same equation as the series case. For low Q systems, the series to parallel transform creates a shift in resonant frequency, making it somewhat lower than the value obtained from the basic series equation. Also, the inductor and capacitor currents will be approximately Q times higher than the source current, made possible because they are 180 degrees out of phase with each other and effectively cancel. In both series and parallel systems, for high Q, f1 and f2 are assumed to lie equidistant from f0, splitting BW in half on either side. This is just an approximation and errors will grow as the Q decreases. More accurately, the two frequencies lie where the ratio of f1/f0 is the same as the ratio of f0/f2. Review Questions Review Questions 1. Describe the concept of resonance. How is resonance defined in a series RLC network? 2. Sketch the impedance versus frequency plot for series resonance. 3. Sketch the impedance versus frequency plot for parallel resonance. 4. Define the terms resonant frequency, bandwidth and Q. 5. How does inductor Q impact system Q in resonant circuits? 330
|
ACElectricalCircuitAnalysis_Page_330_Chunk830
|
8.5 Exercises 8.5 Exercises Inductor Q curves to be used with the exercises below Analysis Analysis 1. A circuit has a resonant frequency of 440 kHz and a system Q of 30. Determine the bandwidth and the approximate values for f1 and f2. 2. A circuit has a resonant frequency of 19 kHz and a bandwidth of 500 Hz. Determine the system Q and the approximate values for f1 and f2. 3. Find the Qcoil and coil resistance of a 150 μH inductor at 100 kHz using device curve A. 4. Find the Qcoil and coil resistance of a 2.2 mH inductor at 50 kHz using device curve D. 5. At a certain frequency, an inductor's impedance is 24 + j600 Ω. Determine the parallel resistance and reactance that produces the same value. 331 Frequency (Hz) Q 50 40 30 20 10 1 k 10 k 100 k 1 M 10 M A B C D
|
ACElectricalCircuitAnalysis_Page_331_Chunk831
|
6. At a certain frequency, an inductor's impedance is 3 + j150 Ω. Determine the parallel resistance and reactance that produces the same value. 7. A certain 75 μH inductor is described by curve B. Determine the equivalent parallel inductor/resistor combination at 1 MHz. 8. A certain 3.3 mH inductor is described by curve C. Determine the equivalent parallel inductor/resistor combination at 20 kHz. 9. Consider a series circuit consisting of a 2 nF capacitor, an ideal 33 μH inductor and a 5 Ω resistor. Determine the resonant frequency, system Q, and bandwidth. 10. Consider a series circuit consisting of a 20 nF capacitor, an ideal 100 μH inductor and a 2.7 Ω resistor. Determine the resonant frequency, system Q, and bandwidth. 11. Consider a series circuit consisting of a 50 nF capacitor, a 20 mH inductor with Qcoil of 50 and a 63 Ω resistor. Determine the resonant frequency, system Q, and bandwidth. 12. Consider a series circuit consisting of a 200 nF capacitor, a 1 mH inductor with Qcoil of 65 and a 72 Ω resistor. Determine the resonant frequency, system Q, and bandwidth. 13. For the circuit shown in Figure 8.37, determine the resonant frequency, system Q and bandwidth. Assume Rcoil = 0 Ω. If the source is 1 volt peak, determine the capacitor voltage at resonance. 14. For the circuit shown in Figure 8.38, determine the resonant frequency, system Q and bandwidth. Assume Rcoil = 0 Ω. If the source is 10 volts, determine the capacitor voltage at resonance. 332 Figure 8.37 Figure 8.38
|
ACElectricalCircuitAnalysis_Page_332_Chunk832
|
15. Repeat problem 13 but assume instead that the inductor's Rcoil = 15 Ω. 16. Repeat problem 12 but assume instead that the inductor follows curve D. 17. For the circuit shown in Figure 8.39, determine the resonant frequency, system Q and bandwidth. If the source is 20 mA peak, determine the resistor and capacitor voltages at resonance. 18. For the circuit shown in Figure 8.40, determine the resonant frequency, system Q and bandwidth. If the source is 100 mA, determine the resistor and capacitor voltages at resonance. 19. For the circuit shown in Figure 8.41, determine the resonant frequency, system Q and bandwidth. If the source is 15 volts, determine the inductor and capacitor currents at resonance. Assume the inductor's coil resistance is 3.2 Ω. 333 Figure 8.39 Figure 8.40 Figure 8.41
|
ACElectricalCircuitAnalysis_Page_333_Chunk833
|
20. For the circuit shown in Figure 8.42, determine the resonant frequency, system Q and bandwidth. If the source is 3 volts, determine the inductor and capacitor currents at resonance. Assume the inductor's Q is 30. 21. For the circuit shown in Figure 8.43, determine the resonant frequency, system Q and bandwidth. If the source is 15 volts, determine the resistor, inductor and capacitor currents at resonance. 22. Given the circuit shown in Figure 8.44, determine the resonant frequency, system Q and bandwidth. If the source is 2 volts, determine the resistor, inductor and capacitor currents at resonance. Assume the inductor's coil resistance is 2.5 Ω. 23. For the circuit shown in Figure 8.45, determine the resonant frequency, system Q and bandwidth. If the source is 5 volts, determine the resistor, inductor and capacitor currents at resonance. Assume the inductor's Q is 40. 334 Figure 8.43 Figure 8.44 Figure 8.42 Figure 8.45
|
ACElectricalCircuitAnalysis_Page_334_Chunk834
|
24. Given the circuit shown in Figure 8.46, determine the resonant frequency, system Q and bandwidth. If the source is 2.5 mA, determine the resistor voltage and the three branch currents at resonance. 25. For the circuit shown in Figure 8.47, determine the resonant frequency, system Q and bandwidth. If the source is 500 μA, determine the resistor voltage and the three branch currents at resonance. Assume the inductor's Q is given by curve C. 26. Given the circuit shown in Figure 8.48, determine the resonant frequency, system Q and bandwidth. If the source is 10 mA, determine the resistor voltage and the three branch currents at resonance. Assume the inductor's Q is given by curve B. Design Design 27. A series resonant circuit has a required f0 of 50 kHz. If a 75 nF capacitor is used, determine the required inductance. 28. A series resonant circuit has a required f0 of 210 kHz. If a 22 μH inductor is used, determine the required capacitance. 335 Figure 8.47 Figure 8.48 Figure 8.46
|
ACElectricalCircuitAnalysis_Page_335_Chunk835
|
29. A parallel resonant circuit consists of a 12 nF capacitor and a 27 μH inductor with a Qcoil of 55. Determine the required additional parallel resistance to achieve a system Q of 40. 30. A series resonant circuit has a design target of f0=200 kHz with a bandwidth of 5 kHz. Which of the inductor curves above (A, B, C, D) represent possible candidates, if any, and why/why not? 31. A parallel resonant circuit has a design target of f0=1 MHz with a bandwidth of 20 kHz. Which of the inductor curves above (A, B, C, D) represent possible candidates, if any, and why/why not? Challenge Challenge 32. A parallel resonant circuit has a required f0 of 50 kHz and a bandwidth of 4 kHz. If a 75 nF capacitor is used and the load impedance is 100 kΩ, determine the required inductance and minimum acceptable Qcoil. 33. A parallel resonant circuit consists of a 150 nF capacitor and a 200 μH inductor that has a coil resistance of 1 Ω. The desired bandwidth for the network is 2 kHz. Determine the value of resistance to be placed in parallel with the network in order to achieve this goal. 34. A resonant circuit consists of a 4 nF capacitor in parallel with a 100 μH coil that has a coil resistance of 5 Ω. Determine the resonant frequency and bandwidth. Further, assume that this circuit is now loaded by an amplifier that has an input impedance equivalent to 10 kΩ resistive in parallel with 500 pF of input capacitance. Also, the amplifier is connected via 25 feet of coaxial cable that exhibits a capacitance of 33 pF per foot. Determine the changes in resonant frequency and bandwidth, if any, with this load. Simulation Simulation 35. Use an AC frequency domain analysis to verify the results of problem 13. Plot the resistor voltage from 0.1 f0 to 10 f0. 36. Use an AC frequency domain analysis to verify the results of problem 19. Do this by overlapping plots of the resistor, capacitor and inductor voltages across a range of 0.1 f0 to 10 f0. 336
|
ACElectricalCircuitAnalysis_Page_336_Chunk836
|
37. Investigate the effects of inductor Q on the system bandwidth of problem 21. Plot the system voltage from 0.01 f0 to 100 f0 three times, the first using the specified coil resistance and then using values ten times larger and ten times smaller. 38. Investigate the effects of component tolerance on the system frequency response of problem 21. Plot the system voltage from 0.1 f0 to 10 f0 using a Monte Carlo variation on the AC frequency domain response. Set a 10% tolerance on the capacitor, inductor and resistor but do not alter the coil resistance. 39. Use an AC frequency domain analysis to verify the design of problem 27. Plot the resistor voltage from 0.1 f0 to 10 f0. 40. Use an AC frequency domain analysis to verify the design of problem 29. Plot the system voltage from 0.1 f0 to 10 f0. 41. At high Q values (>10) the capacitor and inductor voltages of series resonant circuits will tend to reach maximum very close to the resonant frequency. At lower Qs, these peaks tend to diverge. A similar situation occurs with the currents in parallel resonant circuits. Investigate this effect by performing an AC frequency domain analysis on problem 14. Overlay plots of vab, vbc and vc for successively larger values of resistance. 42. Investigate the “Q increase” in reactive currents compared to source and resistive currents in a parallel resonant circuit. A simple way to verify this is by placing AC ammeters in each of the branches of the circuit shown in Figure 8.49. Use R = 630 Ω, C = 40 nF, L = 10 μH and i = 1 mA. It is worthwhile to compare sets of simulations for different resistor values to see the current changes relative to the system Q. Slight variations of the source frequency may be required to reach the peak. 337 Figure 8.49
|
ACElectricalCircuitAnalysis_Page_337_Chunk837
|
9 9 Polyphase Power Polyphase Power 9.0 Chapter Learning Objectives 9.0 Chapter Learning Objectives After completing this chapter, you should be able to: • Define the differences between polyphase and single phase systems and detail their advantages. • Determine line voltage, line current, phase voltage and phase current in three-phase systems. • Analyze three-phase systems in both delta (Δ) and Y (wye) configurations. 9.1 Introduction 9.1 Introduction In this chapter we shall introduce the concept of polyphase systems. Polyphase systems can be visualized as a group of individual sources of the same magnitude that are separated by a certain phase angle such that they are evenly divided across a single period. The polyphase load is similarly divided into individual sections or legs. By dividing the sources, the application of power can be much more smooth. Further, for the same total load power, the current delivered by each of the segments is reduced compared to a single phase system. For an analogy we could look at a bicycle. A single phase system is like pedaling with only one leg. That is, power is applied in a single burst per revolution of the pedal. Having two pedals is like a two-phase system; power is delivered twice per revolution, once for the right leg and once for the left. Because there are two pedals, it makes sense to separate them physically by 180 degrees or one half of a revolution, otherwise the power delivery will not be smooth. It should obvious to anyone who has pedaled a bike that you must pump a single pedal much harder using only one leg to achieve the same speed obtained when pumping with both legs. Polyphase loads can be balanced or unbalanced. A balanced load means that all legs or sections of the load exhibit the same impedance. Consequently, the currents supplied by the sources will be the same except for the phase shifts between them. It is possible to create a polyphase system using any number of phases, however, the more phases we add, the more complex the construction of the polyphase source and load. Also, the number of required conductors between the source and load increases (one per phase). These all increase construction, installation and maintenance costs. Polyphase systems using three sections (hereafter simply referred to as three-phase systems) are popular because they deliver the benefits of polyphase while limiting the complexity and minimizing the costs. Therefore, we shall our limit our discussion to three-phase systems utilizing balanced loads. Three-phase systems can be wired in either delta or Y configurations, or a combination. These are reminiscent of the delta and Y constructs seen in earlier chapters. We shall investigate all of the combinations to determine system parameters such as line voltage, line current and load power. We will also investigate power factor correction for balanced loads that have a non-negligible phase angle. 338
|
ACElectricalCircuitAnalysis_Page_338_Chunk838
|
9.2 Polyphase Definition 9.2 Polyphase Definition A polyphase system uses multiple current-carrying wires with multiple sub- generators, each with their own unique phase. This allows for considerable delivery of power to the load. The most popular scheme is the three-phase configuration. This can be visualized as three individual sine generators that are interconnected as shown in Figure 9.1. To the left is a Y (also known as wye or T) connected generator. To the right is a delta (i.e. Δ, and also known as π when drawn upside down) connected generator. There are multiple ways of reproducing these generators on schematics. Some alternate forms for Y-connected generators are shown in Figure 9.2. The lone “tail” shown on the version to the right is a connection back to the common center of the three sub-generators. This is called the neutral line. It is not always used. In Figure 9.3 we have some alternate forms for delta-connected generators. Delta generators do not have the optional fourth connection as there is no common center point. Also, note that the version on the left is drawn upside down (i.e., in the π configuration). 339 Figure 9.3 Alternate schematic symbols for delta-connected generators. A B C A B C Figure 9.1 Three-phase generators:Y- connected (left) and delta- connected (right). Figure 9.2 Alternate schematic symbols for Y-connected generators.
|
ACElectricalCircuitAnalysis_Page_339_Chunk839
|
Of particular importance is the relative phase of each source. As the load will also have three segments or legs (a three-phase load), a consistent delivery of power demands that the three sources be spread equally over time. This means that each source is one-third of a cycle, or 120 degrees, out of phase with the other legs (i.e., leading one and lagging the other). This is shown in Figure 9.4. We shall only consider the case of balanced loads, that is, where each leg of the load is identical to the other legs. Notice the effectiveness of using the 120 degree stagger. At any time there is always either a peak or the shoulders of two adjacent peaks. These peaks can be either positive or negative polarity. This makes for a total of six peaks across the waveform's period. Therefore, a null is never more than 30 degrees away from the nearest peak. Indeed, when it is 30 degrees away, then it's precisely in between two peaks, and the value from each is the sine of 60 degrees (i.e., 30 degrees off of the peak at 90 degrees) or 86.6% of the peak value. Thus, it should be obvious that consistent power can be applied by this system. The inevitable car analogy is that we have gone from a two cylinder engine to a six cylinder engine when moving from single phase to three-phase. There are several ways to connect three-phase generators to three-phase loads, as we shall see in the next section. 340 Figure 9.4 Relative phases of the three sub-generators. Three Phase -1.0 -0.8 -0.6 -0.4 -0.2 0.0 0.2 0.4 0.6 0.8 1.0 Time 0 0.5 1 1.5 2 Phase 1 Phase 3 Phase 2
|
ACElectricalCircuitAnalysis_Page_340_Chunk840
|
9.2 Three-Phase Connections 9.2 Three-Phase Connections It is possible to configure systems using delta- or Y-connected sources with either delta- or Y-connected loads. One item to note is that delta-connected systems are always three wire systems while Y-connected systems can make use of a fourth neutral wire (the common point to which all three sources connect). Homogeneous Systems Homogeneous Systems The most straightforward systems are delta-to-delta and Y-to-Y. We shall refer to these as homogeneous systems as the structures of the generator and load are similar. Examples are shown in Figures 9.5 and 9.6, respectively. In these configurations, each leg of the load matches up with a corresponding leg of the generator. In the delta-delta configuration of Figure 9.5, it should be obvious just by inspection that the voltage across any load leg must equal the voltage of the corresponding generator leg. For example, the load impedance connected between A' and B' must see the voltage presented by the generator situated between A and B because A is directly connected to A' as is B to B'. Similarly, for the Y-Y configuration of Figure 9.6, the current through any load leg must equal the current flowing through the associated generator leg as there are no other paths for current between A and A', B and B', and C and C'. As the load is balanced and the legs of the generator are identical except for their phase, it must be the case that the voltages and currents (and hence the powers) for 341 Z Z Z A B C A' B' C' + - + - + - Figure 9.5 A delta-connected generator with a delta-connected load (delta-delta). Z Z Z A B C A' B' C' + - + - + - Figure 9.6 A Y-connected generator with a Y-connected load (Y-Y). Optional fourth neutral wire from center to center shown.
|
ACElectricalCircuitAnalysis_Page_341_Chunk841
|
each leg of the load must be the same, with the exception of the phase. This is true for both the Y-Y configuration as well as the delta-delta configuration. The tricky bit here is the difference between a source (or load) current or voltage, and the line current or voltage. Line voltage is the voltage magnitude between any two conductors connecting the source to the load, excluding ground or common. Line current is the current magnitude flowing in any conductor connecting the source to the load, excluding ground or common. Consider the delta-delta system of Figure 9.5. We have already established that the voltage developed by generator A,B must be the same as the voltage across the load A',B'. Thus, the voltage measured from the A, A' conductor to the B,B' conductor must be the same as source and and load voltages. In other words, in the delta-delta configuration, the source, load, and line voltages are all the same. We also found that the source and load currents must be the same for the delta-delta configuration, however, this does not imply that the current flowing through the wire connecting A to A' must be the same as the current flowing through either the generator or the load. After all, two load wires connect to A', not just one. By definition, the current flowing through that wire is the line current, and therefore in a delta-delta configuration, the line current is not the same as the source or load currents. To avoid confusion, the voltage or current associated with a single leg is referred to as the phase voltage or current versus the line voltage or current. Turning to the Y-Y configuration of Figure 9.6, we see an opposite situation. The source, load, and line currents will all be the same. On the other hand, the line voltage comprises two generators, not one (e.g., from A to B or from B to C). Thus, for a Y-Y configuration the source and load voltages are the same, but they are not equal to the line voltage (nor is twice, thanks to the phase shift). Determining Line Voltage and Current Determining Line Voltage and Current In order to determine the line voltage for a Y-connected generator (and similarly, the line current for a delta connected generator), it is useful to examine a phasor plot of the individual generator voltages. This is shown in Figure 9.7. We have three voltages of identical amplitude, the only difference between them being their phase. Each vector is separated from the others by 120 degrees. Further, each individual generator is connected from the common point to one of the external points of A, B and C. Line voltage is defined as the potential existing between any two if these three points. While it's possible to simply subtract one generator voltage from another to arrive at the difference, there is a nice graphical solution from which we can derive a precise formula for the line voltage given the generator voltage. 342
|
ACElectricalCircuitAnalysis_Page_342_Chunk842
|
We begin by focusing on quadrants two and three of the phasor plot. This section is redrawn in Figure 9.8. In reality, any two vectors can be used for the following proof, but this pair turns out to be particularly convenient in its orientation. For ease of use we shall normalize the magnitude of the generator voltage to unity. What we see is that the B and C vectors are split perfectly by the horizontal axis; that which is above the axis is perfectly mirrored below it. In the upper portion we find a right triangle with a hypotenuse of unity (dark red). The angle it makes with the horizontal must be half of the angle between it and the C vector. That's half of 120 343 30° B C 1 60° 0.5 X X Figure 9.8 Solving for the line voltage of a Y-connected generator. 120° B A C 120° 120° Figure 9.7 Phasor diagram of Y-connected generator.
|
ACElectricalCircuitAnalysis_Page_343_Chunk843
|
degrees, or 60 degrees. As the sum of the interior angles of a triangle must be 180 degrees, this means that the third angle must be 30 degrees. The horizontal leg of the triangle (dark yellow or maybe “spicy mustard”) can be determined because we know both the hypotenuse and the opposite angle. opposite = hypotenuse×sinθ The sine of 30 degrees is exactly 0.5, therefore, the horizontal leg of the triangle must be 0.5 times the magnitude of unity, or 0.5. We can use the Pythagorean theorem to find the remaining vertical leg (purple). vertical = √hypotenuse 2−horizontal 2 vertical = √12−0.52 vertical =√ 3 4 vertical = 1 2 √3 The vertical leg is perfectly mirrored below the horizontal axis. Therefore, the span from B to C must be twice this value, or √3. As the voltage developed across each leg of the generator is referred to as the generator's phase voltage, we can state: The line voltage for a Y-connected generator is √3 times its phase voltage. (9.1) For example, if the phase voltage of a Y-connected generator is 120 volts, the line voltage would be √3 times larger, or approximately 208 volts. For a delta-connected generator, the same holds true for the phase and line currents, with the proof left as an exercise. That is, The line current for a delta-connected generator is √3 times its phase current. (9.2) These same relationships hold for the loads as well as the sources, e.g., the current in a leg of a Y-connected load will be the same as the line current and its phase voltage will be √3 times smaller than the line voltage. In summation: For delta configurations (generator or load), the phase voltage is equal to the line voltage while the line current is larger than the phase current by √3. For Y configurations, the phase current is equal to the line current while the line voltage is √3 larger than the phase voltage. For homogenous systems, as the generator and load share the same configuration, the phase voltages and currents of the load must be identical to those of the generator. A useful memory aid is that the power dissipated in the system must equal the power generated. 344
|
ACElectricalCircuitAnalysis_Page_344_Chunk844
|
Example 9.1 A three-phase delta-connected generator feeds a three-phase delta-connected load like the system shown in Figure 9.5. Assume the generator phase voltage is 120 VAC RMS. The load consists of three identical legs of 50 Ω each. Determine the line voltage, load phase voltage, generator phase current, line current, load phase current and the total power delivered to the load. As this is a homogenous (delta-delta) system, the load phase voltage and current are the same as those of the generator. Therefore, the load phase voltage must also be 120 volts. Second, in a delta configuration, the line voltage equals the phase voltage, again 120 volts. The load phase current is found via Ohm's law and will be an RMS value because the voltage is RMS: i phase = v phase Zload i phase = 120V 50Ω i phase = 2.4 A The generator's phase current must be the same because the generator and load have the same configuration. For delta configurations, the line current is √3 times larger than the phase current, thus, iline = √3×i phase iline = √3×2.4A iline ≈4.157A Finally, total power can be found with a straight application of power law as the load is purely resistive and we have RMS values. Remember, this is three times the power dissipated in one leg. Ptotal = 3×i phase 2×R Ptotal = 3×(2.4 A)2×50Ω Ptotal = 864 W This is equivalent to about 1.2 HP. We could have also computed the load phase power by using the squared phase voltage divided by the load resistance, or by multiplying the phase voltage by the phase current. As this is a purely resistive load, there is no phase angle, and thus no power factor with which to concern ourselves. 345
|
ACElectricalCircuitAnalysis_Page_345_Chunk845
|
Example 9.2 A three-phase Y-connected generator feeds a three-phase Y-connected load similar to the system shown in Figure 9.6. Assume the generator phase voltage is 220 VAC RMS. The load consists of three identical legs of 100 Ω each. Determine the line voltage, load phase voltage, generator phase current, line current, load phase current and the total power delivered to the load. This is a homogenous (Y-Y) system, therefore the load phase voltage and current are the same as those of the generator. Consequently, the load phase voltage must be 220 volts. In a Y configuration, the line voltage equals the phase voltage times √3. vline = √3×v phase vline = √3×220V vline ≈381V The load phase current is found via Ohm's law and will be an RMS value because the voltage is RMS. This is the same as the generator phase current and also the line current. i phase = v phase Z load i phase = 220 V 100Ω i phase = 2.2A Total power can be found using basic power law as the load is purely resistive and we have RMS values. In this case we'll use current times voltage for a change of pace. Ptotal = 3×i phase×v phase Ptotal = 3×2.2 A×220V Ptotal = 1452 W This is just shy of 2 HP. Once again, this is a purely resistive load and there is no phase angle. Thus, the power factor is unity with the real and apparent powers being the same. 346
|
ACElectricalCircuitAnalysis_Page_346_Chunk846
|
Example 9.3 For the the system shown in Figure 9.9, determine the total apparent and real power delivered to the load. Also find the line voltage. The phase voltage of the source is 240 volts RMS at 60 Hz. Given the fact that the three load legs are all together at one common point (ground), this must be a Y-Y system. Consequently, we know that the line voltage must be √3 times the phase voltage of the generator. vline = √3×v phase vline = √3×240V vline ≈416V RMS This is a homogenous system (Y-Y) so we also know that the load voltage is equal to the generator voltage, or 240 volts RMS. From that we can find the load current (the line current must be the same value because this is a Y- connected load). i phase = v phase Zload i phase = 240V 40+j30Ω i phase = 4.8−36.87°A The phase angle is appropriate for the 0° reference generator. The other two angles will be off of this by ±120°. The apparent power is simply the product of the load current and voltage magnitudes. S = 3×iload×vload S = 3×4.8A×240V S = 3456 VA 347 Figure 9.9 Circuit for Example 9.3.
|
ACElectricalCircuitAnalysis_Page_347_Chunk847
|
The real power can be found a few different ways: P = S×cosθ P = 3456VA×cos(−36.87°) P = 2765W P = 3×iload 2×Rload P = 3×4.8A 2×40Ω P = 2765W Computer Simulation Computer Simulation The circuit of Example 9.3 is worthy of a simulation. The first thing to do is to determine an appropriate value of inductance to achieve a reactance of j40 Ω. Given the 60 Hz source frequency, this turns out to be approximately 80 mH. The circuit is constructed as shown in Figure 9.10. The 240 volt RMS source phase voltage is equivalent to approximately 340 volts peak. The positions of the inductor and resistor in each leg have been swapped for a reason that will be apparent shortly. The immediate item of interest is to verify the time shifts and amplitudes of the phase voltages. These correspond to nodes 1, 2 and 3. In this configuration, the load phase voltage equals the generator phase voltage, thus they should be 340 volts peak and separated by 120 degrees or 1/3rd of a cycle. A transient analysis is performed, plotting the node voltages of interest. The result is shown in Figure 9.11. The voltages are precisely as expected and the plot compares perfectly to the theoretical plot of Figure 9.4. 348 Figure 9.10 The equivalent system of Figure 9.9 in a simulator.
|
ACElectricalCircuitAnalysis_Page_348_Chunk848
|
Now we check the line voltage. This was calculated to be 416 volts RMS, or approximately 588 volts peak. The post processor is used to display the result of node voltage 1 minus node voltage 2. This is shown in Figure 9.12. Again, the results are as expected with a peak just under 600 volts. Finally, we will investigate the true load power. Perhaps the easiest way to do this is to determine the voltage across the resistive portion of the load. From prior work we know that true power is only associated with resistance, not reactance. Thus, all we need to do is measure the peak voltage across the resistor. From there, we find its RMS equivalent, square it, and divide by the resistor value. This gives us the true load power in one leg. For the total power we simply triple the result. Obtaining the voltage across the resistor is easy if the resistor is attached to ground. In that case, it's just the voltage at the node to which the resistor is connected. This is why the inductor and resistor positions were swapped in the simulation. As they are in series, it makes no difference to the overall load impedance, however, the new arrangement allows us to obtain the resistor voltage directly instead of having to rely on a differential voltage obtained through the post processor. Another transient analysis is performed, this time plotting the voltage across one of the load resistors; namely node 4. The result is shown in Figure 9.13. The peak of this waveform is measured to be 271.5 volts, or about 192 volts RMS. Squaring this and dividing by 40 Ω yields a little over 921 watts per leg, for a total of about 2765 watts, as expected. 349 Figure 9.11 The three load voltages simulated from Figure 9.10.
|
ACElectricalCircuitAnalysis_Page_349_Chunk849
|
350 Figure 9.12 One of the line voltages simulated from Figure 9.10. Figure 9.13 Simulated voltage across one of the load resistors in Figure 9.10.
|
ACElectricalCircuitAnalysis_Page_350_Chunk850
|
Heterogeneous Systems Heterogeneous Systems Systems configured as delta-to-Y and Y-to-delta appear to be a bit more complex than homogeneous systems. We shall refer to these as heterogeneous systems as the structures of the generator and load are of opposite kind. Examples are shown in Figures 9.14 and 9.15, respectively. These systems are not nearly so difficult as some people think; all you have to do is remember statements 9.1 and 9.2. Indeed, the summation is worth repeating here: For delta configurations (generator or load), the phase voltage is equal to the line voltage while the line current is larger than the phase current by √3. For Y configurations, the phase current is equal to the line current while the line voltage is √3 larger than the phase voltage. You can think of analyzing these systems as a two-step process. First, determine the line voltage and current from either the generator or load; and second, transition from the line to the other side (load or generator). If confusion sets in, remember that power generated must equal power dissipated or delivered. In Figure 9.14, the line voltage equals the generator phase voltage. The load is Y- connected, so each leg sees the line voltage divided by √3. Based on this, each leg of the load current can be computed. Note that the line current equals the load current. The generator phase current will be the line current divided by √3. 351 A B C Z Z Z A' B' C' + - + - + - Figure 9.14 A delta-connected generator with a Y-connected load (delta-Y). Z Z Z A' B' C' A B C + - + - + - Figure 9.15 A Y-connected generator with a delta-connected load (Y- delta).
|
ACElectricalCircuitAnalysis_Page_351_Chunk851
|
In Figure 9.15, the line voltage equals √3 times the generator phase voltage. The load is delta-connected, so each leg sees the line voltage. Knowing this, each leg of the load current can be computed. Also, the line current equals the generator phase current, and the load phase current will equal the line current divided by √3. Example 9.4 A delta-Y system like the one shown in Figure 9.14 has a generator phase voltage of 230 volts RMS at 50 Hz. If the load is 2000° Ω, determine the generator phase current, the line voltage, the load phase voltage, the load phase current and the total power delivered to the load. The generator is delta connected so the line voltage equals the generator phase voltage, or 230 volts. The load, being Y-connected, will see a phase voltage that is reduced by a factor of √3. vload = v line √3 vload = 230V √3 vload ≈132.8V RMS We can use Ohm's law to determine the load phase current. iload = v phase Z load iload = 132.8V 2000°Ω iload ≈0.664A RMS Being Y-connected, the line current must be the same as the load phase current, or 0.664 amps. For delta connections, the line current is √3 times larger than the phase current, therefore the generator phase current must be √3 times smaller. igen = iline √3 igen = 0.664A √3 igen ≈0.383A RMS The load is purely resistive and we have RMS values so the total power can be found via power law (apparent power equals true power in this case). 352
|
ACElectricalCircuitAnalysis_Page_352_Chunk852
|
Ptotal = 3×iload 2×R Ptotal = 3×(0.664A) 2×200Ω Ptotal = 264W As a crosscheck, the power generated is: Ptotal = 3×igen×v gen Ptotal = 3×0.383A×230V Ptotal = 264 W Power generated equals power dissipated. Example 9.5 A Y-delta system like the one shown in Figure 9.15 has a generator phase voltage of 100 volts RMS at 60 Hz. If the load has a magnitude of 50 Ω with a lagging power factor of 0.8, determine the generator phase current, the line voltage, the load phase voltage, the load phase current and the total true power delivered to the load. The Y-connected generator creates a line voltage equal to the generator phase voltage times √3. This is also the load phase voltage as it is delta- connected. vline = √3×v phase vline = √3×100 V vline ≈173.2V RMS The delta-connected load will see a phase voltage that is the same as the line voltage, or 173.2 volts. From this we can determine the load current. iload = v phase Zload iload = 173.2V 50 Ω iload ≈3.464A RMS As the load is delta-connected, the line current is the load current times √3. The generator phase current will be the same as the line current. iline = √3×i phase iline = √3×3.464A iline = 6 A RMS 353
|
ACElectricalCircuitAnalysis_Page_353_Chunk853
|
The true load power can be found several ways. First, we can use the i2 R form. To do this we need to find the resistive portion of the load. Recall that the power factor is equal to cosine θ. Therefore the impedance angle is: θ = cos −1 PF θ = cos −10.8 θ ≈36.9° The real part is: R = Z cosθ R = 50Ωcos36.9° R = 40 Ω Alternately, we could've just multiplied Z by PF to obtain this. Continuing: Ptotal = 3×iload 2×R Ptotal = 3×(3.464 A) 2×40Ω Ptotal = 1440 W We could also find the apparent power and use the power factor. Ptotal = 3×v load×iload PF Ptotal = 3×173.2V×3.464A×0.8 Ptotal = 1440 W As a crosscheck, compare the power dissipated to the power generated. Ptotal = 3×v gen×i gen×PF Ptotal = 3×100V×6A×0.8 Ptotal = 1440 W 9.3 Power Factor Correction 9.3 Power Factor Correction As we saw in earlier work, reactive loads demand higher currents than purely resistive loads for a given true load power. The ratio between apparent power, S, and true power, P, is the power factor, PF. Power factor may also be computed as the cosine of the load impedance angle. This situation remains for three-phase systems. If a balanced three-phase load has a large reactive component, the line current and generator phase current will be higher than necessary. The solution to this is power factor correction; the introduction of reactive elements that will counterbalance the reactive power of the load, essentially providing an opposing current such that the reactive currents cancel. 354
|
ACElectricalCircuitAnalysis_Page_354_Chunk854
|
In three-phase systems the situation is potentially complicated by the fact that the load is split into three parts and can be either Y-connected or delta-connected. The process for three phase is essentially the same as it is for single phase, but with a couple slight twists. The first course of action is to determine the reactive power, Q, of the load. As we are dealing with balanced loads, it is usually easiest to just concentrate on a single leg. There are two basic possibilities. First, if the load reactance is known, it is a simple matter to determine the reactive power by finding the load phase current, squaring it, and then multiplying by the load reactance. In contrast, if the load is described in terms of a power factor, the apparent power can be computed from the generator phase voltage and current, and then the power factor can be used to find the reactive power (e.g., finding true power and then using the Pythagorean theorem). Once the reactive power is known, the required reactance can be found using power law and either the phase voltage or current. Finally, the reactance value is used to determine the component value. As many loads are inductive, the compensating component usually will be capacitive. There will three units, one for each leg of the load. For practical purposes, the compensating device is placed across the load terminals rather than in series with it. This is true whether the load is Y-connected or delta- connected. In other words, the compensating devices always will be placed in a delta configuration. This is true even if the load is Y-connected. We shall look at both situations in the next two examples. Example 9.6 The Y-delta system shown in Figure 9.16 has a generator phase voltage of 120 volts RMS at 60 Hz. Determine the power factor, the generator phase current, and the total real and apparent power delivered to the load. Also determine components to correct the power factor and the new generator phase current. 355 Figure 9.16 Circuit for Example 9.6.
|
ACElectricalCircuitAnalysis_Page_355_Chunk855
|
First, the power factor is the cosine of the impedance angle. At 60 Hz, the reactance of the 100 mH inductor is −j37.7 Ω. This is in series with the resistance for a load impedance of 100 −j37.7 Ω or 106.920.66° per leg. The cosine of this angle is 0.9357. The voltage across each leg of the load will equal the line voltage. vline = √3×v phase vline = √3×120 V vline ≈207.8V RMS This will produce a load phase current magnitude of: iload = v phase Zload iload = 207.8V 106.9Ω iload ≈1.944A RMS Now we can find the load powers. S = 3×v phase×i phase S = 3×207.8V×1.944 A S ≈1212 VA P = S×PF P = 1212VA×0.9357 P ≈1134 W Q = S sinθ Q = 1212VAsin 20.66° Q ≈427.6VAR The load is inductive so the compensation components need to be capacitors. Each capacitor needs to create 427.6/3 VAR, or 142.5 VAR. The required reactance is: X C =−j v phase 2 Q X C =−j (207.8V) 2 142.5VAR X C ≈−j303Ω And finally, the capacitance value: 356
|
ACElectricalCircuitAnalysis_Page_356_Chunk856
|
C = 1 2π f X C C = 1 2π60 Hz303Ω C ≈8.75μ F These capacitors would be placed directly in parallel with each leg of the load and should result in a reduction of the generator and line currents. Computer Simulation Computer Simulation To see the effect of power factor correction, the circuit used in Example 9.6 is captured in a simulator, as illustrated in Figure 9.17. The goal here is to show the reduction in supplied current. To facilitate this, the normal Y-connected three-phase source is not used. Instead, three individual sine sources are used, each with a proper phase shift. A small 1 Ω sensing resistor is inserted in series with one of the sources. The voltage across this resistor is easily measured (node 7) and serves as a proxy for the generator phase current. Compared to the sizes of the other components, this extra resistance will have minimal impact on overall circuit behavior, perhaps shifting current values around 1% or so. Reducing the resistance to 0.1 Ω will reduce errors to negligible levels, but 1 Ω is convenient as no scaling is needed and will be sufficient to show the effect of power factor correction on source current. A transient simulation is run on the circuit, plotting the voltage at node 7. This is shown in Figure 9.18. Due to the 1 Ω sensing resistance, the voltage value is the same as the current value in amps. The peak value of the current is approximately 4.7 amps. This agrees with the calculated value of 4.76 amps (1.944 amps RMS times √2 times √3). Now that a baseline for the current has been established, we turn our attention to the modified version of the circuit with power factor correction. 357 Figure 9.17 Circuit of Figure 9.16 in a simulator.
|
ACElectricalCircuitAnalysis_Page_357_Chunk857
|
The three power factor correction capacitors are added in parallel with the existing load legs (i.e., from line to line). This is illustrated in Figure 9.19. The transient simulation is repeated. The results are shown in Figure 9.20. The peak current in this version of the circuit is approximately 4.4 amps. Theoretically, the current should be scaled by the power factor, or 0.9357. As previously calculated, the value of the original generator phase current is 4.76 amps peak. Multiplying that by the power factor yields approximately 4.45 amps peak. The small deviation between this result and the simulation is due to the effect of the 1 Ω sensing resistor. 358 Figure 9.18 Generator phase current for the original circuit of Figure 9.17. Figure 9.19 Power factor corrected circuit of Figure 9.16 in a simulator.
|
ACElectricalCircuitAnalysis_Page_358_Chunk858
|
Example 9.7 The Y-Y system shown in Figure 9.21 has a generator phase voltage of 230 volts RMS at 50 Hz. The load draws 900 VA with a power factor of 0.85 lagging. Determine the generator phase current. Also determine components to correct the power factor and the new generator phase current once the system is corrected. 359 Figure 9.20 Generator phase current for the power factor corrected circuit of Figure 9.19. Figure 9.21 Circuit for Example 9.7.
|
ACElectricalCircuitAnalysis_Page_359_Chunk859
|
We're looking for the generator phase current so let's break this down to a single leg, first. The total apparent power, S, is 900 VA. For a single leg that's 300 VA. This is a Y-Y system so the generator phase current and voltage are the same as the load phase current and voltage. The current can be found via the apparent power. i = S v i = 300VA 230V RMS i ≈1.304A RMS Given a power factor of 0.85, we can determine the real and reactive powers. P = S×PF P = 300VA×0.85 P = 255W Q = √S 2−P 2 Q = √(300VA)2−(255W)2 Q ≈158VAR inductive For power factor correction, we need 158 VAR capacitive per leg to counteract this. These capacitors will be placed across the load terminals in a delta configuration. As such, they will see the line voltage. For a Y- connected generator, the line voltage is the phase voltage times √3. The result here is 230 volts times √3, or 398.4 volts RMS. From this we may determine the required reactance. X C =−j v phase 2 Q X C =−j (398.4V) 2 158VAR X C ≈−j1004.6Ω The corresponding capacitance value is: C = 1 2π f X C C = 1 2π50Hz1004.6Ω C ≈3.17μ F 360
|
ACElectricalCircuitAnalysis_Page_360_Chunk860
|
Computer Simulation Computer Simulation In Example 9.7 we computed the generator phase current to be 1.304 amps RMS, which is equivalent to 1.844 amps peak. If the corrected circuit is proper, then the apparent power should fall to the real power, or 255 watts. The resulting generator phase current should be this power divided by the generator phase voltage, 255/230, or 1.109 amps RMS. This is equivalent to 1.568 amps peak. (Alternately, we could multiply the original current by the power factor because the voltage is constant.) To verify the effectiveness of the circuit modification, we start by capturing the circuit in a simulator, as shown in Figure 9.22. As in the prior example, the source is built from three discrete sine generators at appropriate phases. Beneath one of them, a 1 Ω current sensing resistor is added (node 7). This value should produce no more than about 1% deviation as it is a full two orders of magnitude smaller than the other circuit resistances. An interesting question for the sharp-eyed observer is how the load resistor and inductor values were obtained. This turns out to be not so difficult. We have already computed the true and reactive powers for each leg. We also know the load phase voltage (it's the same as the generator, 230 volts, as it's a Y-Y connection). Therefore, we can find the R and XL values as we have already computed the load current and can use this to determine the load impedance, Z. The power factor is known, and from this the real and reactive parts can be deduced. Z = v phase i Z = 230V 1.304A Z ≈176Ω This is the magnitude. For the sake of completeness, the angle is the arccosine of the 361 Figure 9.22 Generator phase current for the original circuit of Figure 9.21.
|
ACElectricalCircuitAnalysis_Page_361_Chunk861
|
power factor, or cos-1(0.85), which is 31.8 degrees. The fastest way to determine R is to recognize that the real portion is the impedance magnitude times the power factor: R = Z×PF R = 176Ω×0.85 R ≈150Ω The reactive portion can be found via the Pythagorean theorem or by using the power relation. Then we apply the reactance formula to find the inductance. X L = Q i 2 X L = 158VAR (1.304 A RMS) 2 X L≈92.9Ω L = X L 2 π f L = 92.9Ω 2π50 Hz L ≈296mH The result of a transient analysis is shown in Figure 9.23. The measured peak phase current is 1.837 amps. This compares nicely with the expected value of 1.844 amps. 362 Figure 9.23 Generator phase current for the original circuit of Figure 9.22.
|
ACElectricalCircuitAnalysis_Page_362_Chunk862
|
For the comparison, the power factor correction capacitors are added in a delta configuration (across the lines) as shown in Figure 9.24. Another simulation is run, the result shown in Figure 9.25. The peak current has decreased to 1.56 amps. This is just slightly lower than the expected value of 1.568 amps peak. Again, this small deviation is due to the effect of the sense resistor. 363 Figure 9.24 Power factor corrected circuit of Figure 9.21 in a simulator. Figure 9.25 Generator phase current for the power factor corrected circuit of Figure 9.24.
|
ACElectricalCircuitAnalysis_Page_363_Chunk863
|
9.4 Summary 9.4 Summary Polyphase systems can be thought of as a group of individual sources of the same magnitude that are synced together and where the load is similarly divided into sections or legs. By spreading out the source currents across the waveform's period, a smooth application of power to the load can be achieved. Also, for the same line current, more power can be delivered to the load than that of a single phase system. Loads can be balanced or unbalanced. A balanced load means that all legs of the load exhibit an identical impedance. Thus, the currents coming out of the source will be the same except for the phase shifts spreading them across a single period. While any number of phases is possible, three-phase systems are popular as they deliver the benefits of polyphase while limiting complexity. A three-phase source produces currents that are 120 degrees apart. That is, if the first signal is taken as the reference, or 0°, then the other two are at 120° and 240°. Both the source and the load can be configured in one of two ways: delta or Y. This makes four possible combinations for the source-load connection; namely Y-Y, delta-delta, Y-delta, and delta-Y. In a Y-Y connection the source phase current and load current will be the same. The voltage from one line to another will be √3 times larger than the phase voltage. In a delta-delta connection the phase and line voltages will be the same, but the line current will be √3 times larger than the phase current of the generator or load. In delta-Y and Y-delta connections, the source and load no longer match configuration so neither the phase voltages nor currents are the same. For the portion that is Y-connected, the line current and phase current will be the same. For the portion that is delta-connected, the line voltage and phase voltage will be the same. For those configurations, the other parameter (voltage or current) will be scaled by √3. In a system with a balanced load, the system power will simply be three times the power of one leg. If the load has a non-negligible phase angle, power factor correction can be used to reduce the required line current. The compensating items are arranged in a delta configuration, even if the load is Y-connected. Review Questions Review Questions 1. Describe the advantages and disadvantages of polyphase versus single phase systems. 2. Define the terms delta-connected and Y-connected. 3. How are line and load voltages related for Y-connected loads? 4. How are line and load currents related for Y-connected loads? 5. How are line and load voltages related for delta-connected loads? 6. How are line and load currents related for delta-connected loads? 7. Describe a practical connection for power factor correction of a Y-connected load. 364
|
ACElectricalCircuitAnalysis_Page_364_Chunk864
|
9.5 Exercises 9.5 Exercises Unless specified otherwise, assume generator frequencies are 60 Hz for all problems. Analysis Analysis 1. As depicted in Figure 9.26, a three-phase delta-connected generator feeds a delta-connected load. The generator phase voltage is 120 volts and the load consists of three legs of 10 Ω each. Find the voltage across each load leg, the line current through the wires connecting the load to to the generator and the power drawn by the load. 2. Referring to the delta-delta system of Figure 9.26, if the generator phase voltage is 230 volts and the load is balanced with each leg at 2 Ω, determine the line voltage, line current, generator phase current and load current. 3. The system of Figure 9.27 shows a three-phase Y-connected generator feeding a Y-connected load. If the generator phase voltage is 120 volts and the load consists of three legs of 20 Ω each, find the line voltage, the line current, voltage across each load leg and the total power drawn by the load. 365 Figure 9.26 Figure 9.27
|
ACElectricalCircuitAnalysis_Page_365_Chunk865
|
4. Referring to Figure 9.27, if the generator phase voltage is 230 volts and the load is balanced with each leg at 12 Ω, determine the line voltage, line current, generator phase current, load current, load voltage and total load power. 5. As depicted in Figure 9.28, a three-phase delta-connected generator feeds a Y-connected load. The generator phase voltage is 120 volts and the load consists of balanced legs of 5 Ω each. Find the voltage across each load leg, the line current, the line voltage, the generator phase current and the total load power. 6. Referring to Figure 9.28, if the generator phase voltage is 400 volts and the load is balanced with each leg at 10 Ω, determine the line voltage, line current, generator phase current, load current and the voltage across each load leg. 7. The system of Figure 9.29 shows a three-phase Y-connected generator feeding a delta-connected load. If the generator phase voltage is 120 volts and the load consists of three legs of 60 Ω each, find the line voltage, the line current, voltage across each load leg and the total power drawn by the load. 8. Referring to the Y-delta system of Figure 9.28, if the generator phase voltage is 120 volts and the load is balanced with each leg at 20 Ω, determine the line voltage, line current, generator phase current, load current, the voltage across each load leg and the total load power. 366 Figure 9.28 Figure 9.29
|
ACElectricalCircuitAnalysis_Page_366_Chunk866
|
9. A three-phase delta-connected generator feeds a delta-connected load consisting of three legs of 10 Ω in series with j4 Ω of inductive reactance, as shown in Figure 9.30. If the line voltage is 208 volts, find the voltage across each load leg, the current through the wires connecting the load to to the generator, and the apparent and real powers drawn by the load. 10. Given the delta-delta system of Figure 9.30, if the generator phase voltage is 120 volts and the load is balanced with each leg at 20 + j10 Ω, determine the line voltage, line current, generator phase current, load current, the voltage across each load leg, and the total real and apparent load powers. 11. A three-phase Y-connected generator feeds a Y-connected load consisting of three legs of 10 Ω in series with j4 Ω of inductive reactance, as shown in Figure 9.31. If the line voltage is 208 volts, find the voltage across each load leg, the line current, and the apparent and real powers drawn by the load. 12. Given the Y-Y system of Figure 9.31, if the line voltage is 400 volts and the load is balanced with each leg at 100 + j20 Ω, determine the generator phase voltage, line current, generator phase current, load current, the voltage across each load leg, and the total real and apparent load powers. 367 Figure 9.30 Figure 9.31
|
ACElectricalCircuitAnalysis_Page_367_Chunk867
|
13. The three-phase system of Figure 9.7 uses a Y-connected generator feeding a delta-connected load. The load consists of three legs of 40 Ω in series with j30 Ω of inductive reactance, as shown in Figure 9.32. If the generator phase voltage is 230 volts, find the line voltage, the voltage across each load leg, the line current, the load current, and the apparent and real powers drawn by the load. 14. Given the Y-delta system of Figure 9.32, if the line voltage is 400 volts and the load is balanced with each leg at 80 + j20 Ω, determine the generator phase voltage, line current, generator phase current, load current, the voltage across each load leg, and the total real and apparent load powers. 15. A 208 three-phase delta-connected generator feeds a Y-connected load consisting of three legs of 10 Ω in series with j4 Ω of inductive reactance as shown in Figure 9.33. Find the voltage across each load leg, the current through the wires connecting the load to to the generator, and the apparent and real powers drawn by the load. 16. Given the delta-Y system of Figure 9.33, if the line voltage is 400 volts and the load is balanced with each leg at 120 + j30 Ω, determine the line current, generator phase current, load current, the voltage across each load leg, and the total real and apparent load powers. 368 Figure 9.32 Figure 9.33
|
ACElectricalCircuitAnalysis_Page_368_Chunk868
|
17. A 120 volt three-phase delta-connected generator feeds a delta-connected load consisting of three legs of 75 Ω in series with −j10 Ω of capacitive reactance as shown in Figure 9.34. Find the voltage across each load leg, the current through the wires connecting the load to to the generator, and the apparent and real powers drawn by the load. 18. A three-phase Y-connected generator feeds a Y-connected load consisting of three legs of 150 Ω in series with −j20 Ω of capacitive reactance as shown in Figure 9.35. If the generator phase voltage is 120 volts, find the line voltage, the voltage across each load leg, the line current, and the apparent and real powers drawn by the load. Design Design 19. Using the delta-delta system of problem 9 and assuming the source frequency is 60 Hz, determine appropriate component values to place in parallel with each load leg in order to shift the power factor to unity. 20. Using the Y-Y system of problem 11 and assuming the source frequency is 60 Hz, determine appropriate component values to place in parallel with each load leg in order to shift the power factor to unity. 369 Figure 9.34 Figure 9.35
|
ACElectricalCircuitAnalysis_Page_369_Chunk869
|
Challenge Challenge 21. Using the Y-Y system of problem 11 and assuming the source frequency is 60 Hz, determine appropriate component values to be added to the load in order to shift the power factor to unity. These new components should be in a delta configuration. Simulation Simulation 22. Use a transient analysis to verify the phase and line voltage phase relationships in problem 1. 23. Use a transient analysis to verify the results computed for problem 15. 24. Use a transient analysis to verify the design solution to problem 19. This can be achieved by ensuring that the voltage and current in each load leg (with added correction components) are in phase. 25. Use a transient analysis to verify the design solution to problem 20. This can be achieved by ensuring that the voltage and current in each load leg (with added correction components) are in phase. 370
|
ACElectricalCircuitAnalysis_Page_370_Chunk870
|
Notes Notes ♫♫ ♫♫ 371
|
ACElectricalCircuitAnalysis_Page_371_Chunk871
|
10 10 Decibels and Bode Plots Decibels and Bode Plots 10.0 Chapter Learning Objectives 10.0 Chapter Learning Objectives After completing this chapter, you should be able to: • Convert between ordinary and decibel based power and voltage gains. • Utilize decibel-based voltage and power measurements during circuit analysis. • Define and graph a general Bode plot. • Detail the differences between lead and lag networks, and graph Bode plots for each. • Combine the effects of several lead and lag networks together in order to determine a system Bode plot. 10.1 Introduction 10.1 Introduction This chapter introduces two related items; the decibel and Bode plots. The decibel measurement scheme is in wide use, particularly in the fields of audio and communications. We will be examining its advantages over the ordinary system of measurement used up to now and how to convert values of one form into the other. One of the more important parameters of a circuit is its frequency response, that is, the way in which the circuit responds to input signals over a range of frequencies. While we have investigated this to some extent in prior work, in this chapter we shall take it to its logical conclusion, namely the Bode plot. A Bode plot is, in fact, a pair of plots; one of relative signal magnitude or gain with respect to frequency and a second detailing the phase response with respect to frequency. Bode plots are of particular importance in the study of circuits such as amplifiers and filters, as well as in systems that make use of negative feedback. The gain magnitude plot makes use of a decibel scale and thus it makes sense to begin our study looking at the decibel system: specifically how it is defined and its practical use. 10.2 The Decibel 10.2 The Decibel Most people are familiar with the term “decibel” in reference to sound pressure. It’s not uncommon to hear someone say something such as “It was 110 decibels at the concert last night and my ears are still ringing.” This popular use is somewhat inaccurate, but does show that decibels indicate some sort of quantity or relative level; in this case, sound pressure level. Decibel Representation of Power and Voltage Gains Decibel Representation of Power and Voltage Gains In its simplest form, the decibel is used to measure system gain, such as power or voltage gain, where gain is simply the ratio of an output signal to an input signal. For an amplifying circuit, the gain would be greater than 372
|
ACElectricalCircuitAnalysis_Page_372_Chunk872
|
one, but for purely passive systems it will likely be fractional (i.e., the output quantity is smaller than the input quantity). For example, a simple voltage divider might be said to have a “gain” of 0.2, or some such, meaning that the output signal is only 20% of the input signal. Unlike the ordinary gain measurements, the decibel form is logarithmic. Because of this, it can be very useful for showing ratios of change, as well as absolute change. The base unit is the Bel, named after Alexander Graham Bell, the noted American scientist and inventor. To convert an ordinary gain to its Bel counterpart, just take the common log (base 10) of the gain. In equation form: Bel gain = log10( ordinary gain ) (10.1) Note that on most hand calculators common log is denoted as “log” while the natural log is given as “ln”. Unfortunately, some programming languages use “log” to indicate natural log and “log10” for common log. More than one student has been bitten by this bug, so be forewarned! As an example, if an amplifier circuit produces an output power of 200 milliwatts for an input of 10 milliwatts, we would normally say that it has a power gain of: G=Pout Pi n G=200mW 10 mW G=20 For the Bel version, just take the log of this result. G '=log10G G '=log1020 G '=1.301 The Bel gain is 1.3 Bels. The term “Bels” is not a unit in the strict sense of the word (as in “watts”), but is simply used to indicate that this is not an ordinary gain. In contrast, ordinary power and voltage gains are sometimes given units of W/W and V/V to distinguish them from Bel gains. Also, note that the symbol for Bel power gain is G' and not G. All Bel gains are denoted with the following prime (’) notation to avoid confusion. Because Bels tend to be rather large, we typically use one-tenth of a Bel as the norm. The result is the decibel (one-tenth Bel). To convert to decibels, simply multiply the number of Bels by 10. Our gain of 1.3 Bels is equivalent to 13 decibels. The units are commonly shortened to dB. Consequently, we may say: G '=10 log10G (10.2) Where the result is in dB. 373
|
ACElectricalCircuitAnalysis_Page_373_Chunk873
|
At this point, you may be wondering what the big advantage of the decibel system is. To answer this, recall a few log identities. Normal multiplication becomes addition in the log system, and division becomes subtraction. Likewise, powers and roots become multiplication and division. Because of this, two important things show up. First, ratios of change become constant offsets in the decibel system, and second, the entire range of values diminishes in size. The result is that a very wide range of gains may be represented within a fairly small scope of values, and the corresponding calculations can become quicker. There are a couple of dB values that are useful to remember, and are illustrated in Figure 10.1. With the aid of your calculator, it is very easy to show the following: Factor dB Value using G’= 10 log10 G 1 0 dB 2 3.01 dB 4 6.02 dB 8 9.03 dB 10 10 dB We can also look at fractional factors (i.e., losses instead of gains, Figure 10.2): Factor dB Value 0.5 −3.01 dB 0.25 −6.02 dB 0.125 −9.03 dB 0.1 −10 dB If you look carefully, you will notice that a doubling is represented by an increase of approximately 3 dB. A factor of 4 is in essence, two doublings. Therefore, it is equivalent to 3 dB + 3 dB, or 6 dB. Remember, because we are using logs, multiplication turns into simple addition. In a similar manner, a halving is represented by approximately −3 dB. The negative sign indicates a reduction. To simplify things a bit, think of factors of 2 as ±3 dB, the sign indicating whether you are increasing (multiplying), or decreasing (dividing). As you can see, factors of 10 work out to a very convenient 10 dB. By remembering these two factors, you can often estimate a dB conversion without the use of your calculator. For instance, we could rework our initial conversion problem as follows: • The amplifier has a gain of 20. • 20 can be written as 2 times 10. • The factor of 2 is 3 dB, the factor of 10 is 10 dB. • The answer must be 3 dB + 10 dB, or 13 dB. Time for a few examples. 374 Figure 10.1 Positive dB factors. Figure 10.2 Negative dB factors.
|
ACElectricalCircuitAnalysis_Page_374_Chunk874
|
Example 10.1 An amplifier has a power gain of 800. What is the decibel power gain? G '=10 log10G G '=10 log10800 G '=10×2.903 G '=29.03dB We could also use our estimation technique: • G = 800 = 8∙102 • 8 is equivalent to 3 factors of 2, or 2∙2∙2, and can be expressed as 3 dB + 3 dB + 3 dB, which is, of course, 9 dB • 102 is equivalent to 2 factors of 10, or 10 dB + 10 dB = 20 dB. Alternately, the power of 2 literally represents 2 Bels, and thus 20 dB. • The result is 9 dB + 20 dB, or 29 dB Note that if the leading digit is not a power of 2, the estimation will not be as precise. For example, if the gain is 850, you know that the decibel gain is just a bit over 29 dB. You also know that it must be less than 30 dB (1000=103 which is 3 factors of 10, or 30 dB.) As you can see, by using the dB form, you tend to concentrate on the magnitude of gain, and not so much on trailing digits. Example 10.2 An attenuator reduces signal power by a factor of 10,000. What is this loss expressed in dB? G '=10 log10 1 10,000 G '=10×(−4) G '=−40 dB By using the approximation, we can say, 1 10,000 =10 −4 The negative exponent tells us we have a loss (negative dB value), and 4 factors of 10 (i.e., 4 Bels). 375
|
ACElectricalCircuitAnalysis_Page_375_Chunk875
|
G '= −10 dB −10dB −10dB −10 dB G '= −40dB Remember, if an increase in signal is produced, the result will be a positive dB value. A decrease in signal will always result in a negative dB value. A signal that is unchanged indicates a gain of unity, or 0 dB. To convert from dB to ordinary form, just invert the steps; that is, divide by ten and then take the antilog. G=log10 −1 G' 10 (10.3) On most hand calculators, base 10 antilog is denoted as 10x. In most computer languages, you just raise 10 to the appropriate power, as in G = 10.0**(Gprime / 10.0) (Python), or use an exponent function, as in pow(10.0, Gprime / 10.0) (C). Example 10.3 An amplifier has a power gain of 23 dB. If the input is 1 mW, what is the output? In order find the output power, we need to find the ordinary power gain, G. G=log10 −1 G ' 10 G=log10 −1 23 10 G=199.5 Therefore, Pout =199.5 ∙ 1 mW, or 199.5 mW You could also use the approximation technique in reverse. To do this, break up the dB gain in 10 dB and 3 dB chunks: 23dB=3dB+10dB+10dB Now replace each chunk with the appropriate factor, and multiply them together (remember, when going from log to ordinary form, addition turns into multiplication.) 3dB=2X ,10dB=10X, so, 376
|
ACElectricalCircuitAnalysis_Page_376_Chunk876
|
G=2×10×10 G=200 While the approximation technique appears to be slower than the calculator, practice will show otherwise. Being able to quickly estimate dB values can prove to be a very handy skill in the electronics field. This is particularly true in larger, multi-stage designs. Example 10.4 A three-stage amplifier has gains of 10 dB, 16 dB, and 14 dB per section. What is the total dB gain? Because dB gains are a log form, just add the individual stage gains to arrive at the system gain. G 'total =G' 1+G ' 2+G ' 3 G 'total =10dB+16 dB+14dB G 'total =40 dB As you may have noticed, all of the examples up to this point have used power gain and not voltage gain. You may be tempted to use the same equations for voltage gain. In a word, don’t. If you think back for a moment, you will recall that power varies as the square of voltage. In other words, a doubling of voltage will produce a quadrupling of power. If you were to use the same dB conversions, a doubling of voltage would be 3 dB, yet, because the power has quadrupled, this would indicate a 6 dB rise. Consequently, voltage gain (and current gain as well) are treated in a slightly different fashion. We would rather have our doubling of voltage work out to 6 dB, so that it matches the power calculation. The correction factor is very simple. Because power varies as the second power of voltage, the dB form should be twice as large for voltage (remember, exponentiation turns into multiplication when using logs). Applying this factor to equation 10.2 yields: A'v=20 log10 Av (10.4) Be careful though, the Bel voltage gain only equals the Bel power gain if the input and output impedances of the system are matched (you may recall from your other work that it is quite possible to design a circuit with vastly different voltage and power gains). If we were to recalculate our earlier table of common factors, we would find that a doubling of voltage gain is equivalent to a 6 dB rise, and a ten fold increase is equivalent to a 20 dB rise, twice the number of decibels of their power gain counterparts. 377
|
ACElectricalCircuitAnalysis_Page_377_Chunk877
|
Note that current gain may be treated in the same manner as voltage gain (although this is less commonly done in practice). Example 10.5 A circuit has an output signal of 2 V for an input of 50 mV. What is A'v? First find the ordinary gain. Av= 2 0.05 =40 Now convert to dB form. A'v=20 log10 40 A'v=20×1.602 A'v=32.04dB The approximation technique yields 40=2∙2∙10, or 6 dB + 6 dB + 20 dB, or 32 dB. To convert A'v to A, reverse the process. Av=log10 −1 A'v 20 (10.5) Example 10.6 An amplifier has a gain of 26 dB. If the input signal is 10 mV, what is the output? Av=log10 −1 A' v 20 Av=log10 −126 20 Av=19.95 V out= AvV i n V out=19.95×10 mV The final point to note in this section is that, as in the case of power gain, a negative decibel value indicates a loss. Therefore, a 2:1 voltage divider would have a gain of −6 dB. 378
|
ACElectricalCircuitAnalysis_Page_378_Chunk878
|
Signal Representation in dBW and dBV Signal Representation in dBW and dBV As you can see from the preceding section, it is possible to spend considerable time converting between decibel gains and ordinary voltages and powers. Because the decibel form does offer advantages for gain measurement, it would make sense to use a decibel form for power and voltage levels as well. This is a relatively straightforward process. There is no reason why we can’t express a power or voltage in a logarithmic form. Because a dB value just indicates a ratio, all we need to do is decide on a reference (i.e., a comparative base for the ratio). For power measurements, a likely choice would be 1 watt. In other words, we can describe a power as being a certain number of dB above or below 1 watt. Positive values will indicate powers greater than 1 watt, while negative values will indicate powers less than 1 watt. In general equation form: P'=10log 10 P reference (10.6) The answer will have units of dBW, that is, decibels relative to 1 watt. Example 10.7 A power amplifier has a maximum output of 120 W. What is this power in dBW? P'=10log 10 P 1 Watt P'=10log 10 120W 1W P'=20.8 dBW There is nothing sacred about the 1 watt reference, short of its convenience. We could just as easily choose a different reference. Other common reference points are 1 milliwatt (dBm) and 1 femtowatt (dBf). Obviously, dBf is used for very low signal levels, such as those coming from an antenna. dBm is in very wide use in the communications industry. To use these other references, just divide the given power by the new reference. Example 10.8 A small personal audio music player delivers 200 mW to its headphones. What is this output power in dBW, and in dBm? For an answer in units of dBW, use the 1 watt reference. 379
|
ACElectricalCircuitAnalysis_Page_379_Chunk879
|
P '=10 log10 P 1Watt P'=10 log10 200mW 1W P'=−7dBW For units of dBm, use a 1 milliwatt reference. P '=10 log10 P 1Watt P'=10 log10 200mW 1 mW P'=23 dBm 200 mW, −7 dBW, and 23 dBm are three ways of saying the same thing. Note that the dBW and dBm values are 30 dB apart. This will always be true, because the references are a factor of 1000 (30 dB) apart. In order to transfer a dBW or similar value into watts, reverse the process. P=log10 −1 P' 10 ×reference (10.7) Example 10.9 A studio microphone produces a 12 dBm signal while recording normal speech. What is the output power in watts? P=log10 −1 P' 10 ×reference P=log10 −1 12dBm 10 ×1mW P=15.8mW=0.0158W For voltages, we can use a similar system. A logical reference is 1 V, with the resulting units being dBV. As before, these voltage measurements will use a multiplier of 20 instead of 10. V '=20log10 V reference (10.8) 380
|
ACElectricalCircuitAnalysis_Page_380_Chunk880
|
Example 10.10 A test oscillator produces a 2 volt signal. What is this value in dBV? V '=20log10 V reference V '=20log10 2 V 1V V '= 6.02dB When both circuit gains and signal levels are specified in decibel form, analysis can be very quick. Given an input level, simply add the gain to it in order to find the output level. Given input and output levels, subtract them in order to find the gain. Example 10.11 A computer hard drive read/write amplifier exhibits a gain of 35 dB. If the input signal is −42 dBV, what is the output signal? V 'out=V ' i n+A' v V 'out=−42 dBV+35dB V 'out=−7dBV Note that the final units are dBV and not dB, thus indicating a voltage and not merely a gain. Example 10.12 A guitar power amp needs an input of 20 dBm to achieve an output of 25 dBW. What is the gain of the amplifier in dB? First, it is necessary to convert the power readings so that they share the same reference unit. Because dBm represents a reference 30 dB smaller than the dBW reference, just subtract 30 dB to compensate. 20 dBm=−10 dBW G '=P 'out−P'i n G '=25dBW−(−10 dBW) G '=35 dB 381
|
ACElectricalCircuitAnalysis_Page_381_Chunk881
|
Note that the units are dB and not dBW. This is very important! Saying that the gain is “so many” dBW is the same as saying the gain is “so many” watts. Obviously, gains are “pure” numbers and do not carry units such as watts or volts. The usage of a dB-based system is shown graphically in Figure 10.3. Note how the stage gains are added to the input signal to form the output. Even large circuits can be quickly analyzed in this form. To make life in the lab even easier, it is possible to take measurements directly in dB form. By doing this, you need never convert while troubleshooting a design. For general-purpose work, voltage measurements are the norm, and therefore a dBV scale is often used. Items Of Interest In The Laboratory Items Of Interest In The Laboratory When using a digital meter on a dBV scale it is possible to “underflow” the meter if the signal is too weak. This will happen if you try to measure around zero volts, for example. If you attempt to calculate the corresponding dBV value, your calculator will probably show “error”. The effective value is negative infinite dBV. The meter will certainly have a hard time showing this value! Another item of interest revolves around the use of dBm measurements. It is common to use a voltmeter to make dBm measurements, in lieu of a wattmeter. While the connections are considerably simpler, a voltmeter cannot measure power. How is this accomplished then? Well, as long as the circuit impedance is known, power can be derived from a voltage measurement. A common impedance in communication systems (such as recording studios) is 600 Ω, so a meter can be calibrated to give correct dBm readings by using Power Law. If this meter is used on a non-600 Ω circuit, the readings will no longer reflect accurate dBm values (but will still properly reflect relative changes in dB). Finally, recalling the chapter introduction regarding “110 dB” concert levels, properly, that would read “110 dB-SPL”, referring to “Sound Pressure Level”. The reference level corresponding to 0 dB-SPL is the quietest sound the average person can hear; the threshold of hearing (20 micropascals for young healthy humans). Thus, 110 dB-SPL refers to a sound pressure that is 110 dB greater than the threshold of hearing. Typically, 1 dB represents a “just noticeable difference” in loudness for humans, although this depends on the precise frequency and sound pressure. 382 10 dB -6 dB 15 dB 8 dBm 18 dBm 12 dBm 27 dBm Figure 10.3 Multistage dB application.
|
ACElectricalCircuitAnalysis_Page_382_Chunk882
|
10.3 Bode Plots 10.3 Bode Plots The Bode plot is a graphical response prediction technique that is useful for both circuit design and analysis. It is named after Hendrik Wade Bode, an American engineer known for his work in control systems theory and telecommunications. A Bode plot is, in actuality, a pair of plots: One graphs the signal gain or loss of a system versus frequency, while the other details the circuit phase versus frequency. Both of these items are very important in the design of well-behaved, optimal circuits. Generally, Bode plots are drawn with logarithmic frequency axes, a decibel gain axis, and a phase axis in degrees. First, let’s take a look at the gain plot. A typical gain plot is shown Figure 10.4. Remember, “gains” can be fractional, as with a voltage divider. Note how the plot is relatively flat in the middle, or midband, region. The gain value in this region is known as the midband gain. In purely passive circuits this value may be fractional (i.e., a negative dB value). At either extreme of the midband region, the gain begins to decrease. The gain plot shows two important frequencies, f1 and f2. f1 is the lower break frequency while f2 is the upper break frequency. The gain at the break frequencies is 3 dB less than the midband gain. These frequencies are also known as the half-power points, or corner frequencies. Normally, amplifiers are only used for signals between f1 and f2. The exact shape of the rolloff regions will depend on the design of the circuit. For example, it is possible to design amplifiers with no lower break frequency (i.e., a DC amplifier), however, all amplifiers will exhibit an upper break. The break points are caused by the presence of circuit reactances, typically coupling and stray capacitances. The gain plot is a summation of the midband response with the upper and lower frequency limiting networks. Let’s take a look at the lower break, f1. 383 Figure 10.4 Generic gain plot. f A'v A'midband f1 f2 midband
|
ACElectricalCircuitAnalysis_Page_383_Chunk883
|
Lead Network Gain Response Lead Network Gain Response Reduction in low frequency gain is caused by lead networks. A generic lead network is shown in Figure 10.5. It gets its name from the fact that the output voltage developed across R leads the input. At very high frequencies the circuit will be essentially resistive. Conceptually, think of this as a simple voltage divider. The divider ratio depends on the reactance of C. As the input frequency drops, Xc increases. This makes Vout decrease. At very high frequencies, where Xc<<R, Vout is approximately equal to Vin. This can be seen graphically in Figure 10.6, where the frequency axis is normalized to fc. The break frequency (i.e., the frequency at which the signal has decreased by 3 dB) is found via the standard equation, f c= 1 2π RC The response below fc will be a straight line if a decibel gain axis and a logarithmic frequency axis are used. This makes for very quick and convenient sketching of circuit response. The slope of this line is 6 dB per octave (an octave is a doubling or halving of frequency, e.g., 800 Hz is 3 octaves above 100 Hz).20 This range covers a factor of two in frequency. This slope may also be expressed as 20 dB per decade, where a decade is a factor of 10 in frequency. With reasonable accuracy, this curve may be approximated as two line segments, called asymptotes, shown in Figure 10.6 (blue). The shape of this curve is the same for any lead network. Because of this, it is 20 The term octave is borrowed from the field of music. It gets its name from the fact that there are eight notes in the standard western scale: do-re-mi-fa-sol-la-ti-do. 384 Figure 10.5 Lead network. Figure 10.6 Lead network gain plot. Lead Network Magnitude Response Amplitude (dB) -40 -30 -20 -10 0 10 -40 -30 -20 -10 0 10 Normalized frequency 0.0 0.1 1.0 10.0 0.01 0.1 1 10 Exact Approximate Slope: 6 dB/octave or 20 dB/decade
|
ACElectricalCircuitAnalysis_Page_384_Chunk884
|
very easy to find the approximate gain at any given frequency as long as fc is known. It is not necessary to go through reactance and phasor calculations. To create a general response equation, start with the voltage divider rule to find the gain: V out V i n = R R−j X c V out V i n = R∠0 √R 2+X c 2∠−arctan X c R The magnitude of this is, ∣Av∣= R √R 2+X c 2 ∣Av∣= 1 √ 1+X c 2 R 2 (10.9) Recalling that, f c= 1 2π RC we may say, R= 1 2π f cC For any frequency of interest, f, X c= 1 2 π f C Equating the two preceding equations yields, f c f = X c R (10.10) Substituting equation 10.10 in equation 10.9 gives, Av= 1 √ 1+ f c 2 f 2 (10.11) 385
|
ACElectricalCircuitAnalysis_Page_385_Chunk885
|
To express Av in dB, substitute equation 10.11 into equation 10.5. A'v=20 log10 1 √ 1+ f c 2 f 2 After simplification, the final result is: A'v=−10 log10(1+ f c 2 f 2) (10.12) Where fc is the critical frequency, f is the frequency of interest, A'v is the decibel gain at the frequency of interest. Example 10.13 A circuit has a lower break frequency of 40 Hz. How much signal is lost at 10 Hz? A'v=−10 log10(1+f c 2 f 2) A'v=−10 log10(1+402 10 2) A'v=−12.3 dB In other words, the signal level is 12.3 dB lower than it is in the midband. Note that 10 Hz is 2 octaves below the break frequency. Because the cutoff slope is 6 dB per octave, each octave loses 6 dB. Therefore, the approximate result is −12 dB, which double-checks the exact result. Without the lead network, the gain would stay at 0 dB all the way down to DC (0 Hz.) Lead Network Phase Response Lead Network Phase Response At very low frequencies, the circuit of Figure 10.5 is largely capacitive. Because of this, the output voltage developed across R leads by 90 degrees. At very high frequencies the circuit will be largely resistive. At this point Vout will be in phase with Vin. At the critical frequency, Vout will lead by 45 degrees. A general phase graph is shown in Figure 10.7. As with the gain plot, the phase plot shape is the same for any lead network. The general phase equation may be obtained from the voltage divider: 386
|
ACElectricalCircuitAnalysis_Page_386_Chunk886
|
V out V i n = R R−j X c V out V i n = R∠0 √R 2+X c 2∠−arctan X c R The phase portion of this is, θ=arctan X c R By using equation 10.6, this simplifies to, θ=arctan f c f (10.13) Where fc is the critical frequency, f is the frequency of interest, θ is the phase angle at the frequency of interest. Often, an approximation, such as the blue line in Figure 10.7, is sufficient. By using Equation 10.13, you can show that this approximation is off by no more than 6 degrees at the corners. 387 Figure 10.7 Lead network phase response. Lead Network Phase Response Phase (degrees) 0 10 20 30 40 50 60 70 80 90 0 10 20 30 40 50 60 70 80 90 Normalized frequency 0.0 0.1 1.0 10.0 100.0 0.01 0.1 1 10 100 Exact Approximate
|
ACElectricalCircuitAnalysis_Page_387_Chunk887
|
Example 10.14 A telephone amplifier has a lower break frequency of 120 Hz. What is the phase response one decade below and one decade above? One decade below 120 Hz is 12 Hz, while one decade above is 1.2 kHz. θ=arctan f c f θ=arctan 120Hz 12Hz θ=84.3degrees one decade below f c (i.e, approaching 90 degrees) θ=arctan 120 Hz 1.2kHz θ=5.71degrees one decade above f c (i.e., approaching 0 degrees) Remember, if a circuit or amplifier is direct-coupled, and has no lead networks, the phase will remain at 0 degrees right back to 0 Hz (DC). Lag Network Response Lag Network Response Unlike its lead network counterpart, all systems will contain lag networks. In essence, it is little more than an inverted lead network. As you can see from Figure 10.8, it simply transposes the R and C locations. Because of this, the response tends to be inverted as well. In terms of gain, Xc is very large at low frequencies, and thus Vout equals Vin. At high frequencies, Xc decreases, and Vout falls. The break point occurs when Xc equals R. The general gain plot is shown in Figure 10.9. Like the lead network response, the slope of this curve is −6 dB per octave (or −20 dB per decade.) Note that the slope is negative instead of positive. We can derive a general gain equation for this circuit in virtually the same manner as we did for the lead network. The derivation is left as an exercise. A'v=−10 log10(1+ f 2 f c 2) (10.14) Where fc is the critical frequency, f is the frequency of interest, A'v is the decibel gain at the frequency of interest. 388 Figure 10.8 Lag network.
|
ACElectricalCircuitAnalysis_Page_388_Chunk888
|
Note that this equation is almost the same as Equation 10.12. The only difference is that f and fc have been transposed. In a similar vein, we may examine the phase response. At very low frequencies, the circuit is basically capacitive. Because the output is taken across C, Vout will be in phase with Vin. At very high frequencies, the circuit is essentially resistive. Consequently, the output voltage across C will lag by 90 degrees. At the break frequency the phase will be −45 degrees. A general phase plot is shown in Figure 10.10. As with the lead network,we may derive a phase equation. Again, the exact steps are very similar, and left as an exercise. θ=−90+arctan f c f (10.15) Where fc is the critical frequency, f is the frequency of interest, θ is the phase angle at the frequency of interest. 389 Lag Network Magnitude Response Amplitude (dB) -40 -30 -20 -10 0 10 -40 -30 -20 -10 0 10 Normalized frequency 0.1 1.0 10.0 100.0 0.1 1 10 100 Exact Approximate Slope: -6dB/octave or -20dB/decade Figure 10.9 Lag network gain plot.
|
ACElectricalCircuitAnalysis_Page_389_Chunk889
|
Example 10.15 A medical ultra sound transducer feeds a lag network with an upper break frequency of 150 kHz. What are the gain and phase values at 1.6 MHz? Because this represents a little more than a 1 decade increase, the approximate values are −20 dB and −90 degrees, from Figures 10.7 and 10.8, respectively. The exact values are: A'v=−10 log10(1+f 2 f c 2) A'v=−10 log10(1+1.6 MHz2 150 kHz2) A'v=−20.6dB θ=−90+arctan f c f θ=−90+arctan 150kHz 1.6MHz θ=−84.6degrees The complete Bode plot for this network is shown in Figure 10.11. It is very useful to examine both plots simultaneously. In this manner you can find the exact phase change for a given gain quite easily. For example, if you look carefully at the plots of Figure 10.11, you will note that at the critical frequency of 150 kHz, the total phase change is −45 degrees. 390 Figure 10.11 Bode plot for 150 kHz lag. f A'v 150 kHz 0 dB -6 dB/octave Lag Network Phase Response Phase (degrees) -90 -80 -70 -60 -50 -40 -30 -20 -10 0 -90 -80 -70 -60 -50 -40 -30 -20 -10 0 Normalized frequency 0.0 0.1 1.0 10.0 100.0 0.01 0.1 1 10 100 Exact Approximate Figure 10.10 Lag network phase response. f θ 0° -45° -90° 150 kHz 15 kHz 1.5 MHz
|
ACElectricalCircuitAnalysis_Page_390_Chunk890
|
Because this circuit involved the use of a single lag network, this is exactly what you would expect. Rise Time versus Bandwidth Rise Time versus Bandwidth For pulse-type signals, the “speed” of a circuit is often expressed in terms of its rise time. If a square pulse such as Figure 10.12a is passed into a simple lag network, the capacitor charging effect will produce a rounded variation, as seen in Figure 10.12b. This effect places an upper limit on the duration of pulses that a given circuit can handle without producing excessive distortion. By definition, rise time is the amount of time it takes for the signal to traverse from 10% to 90% of the peak value of the pulse. The shape of this pulse is defined by the standard capacitor charge equation examined in earlier course work, and is valid for any system with a single clearly dominant lag network. V out=V peak(1−ϵ −t RC) (10.16) In order to find the time internal from the initial starting point to the 10% point, set Vout to 0.1Vpeak in Equation 10.16 and solve for t1. 391 t Vpeak t0 Figure 10.12a Pulse rise time effect: Input to network. t Vpeak t0 t1 t2 .1Vpeak .9Vpeak Figure 10.12b Pulse rise time effect: Output of network.
|
ACElectricalCircuitAnalysis_Page_391_Chunk891
|
0.1V peak = V peak(1−ϵ −t1 RC) 0.1V peak = V peak−V peak ϵ −t1 RC 0.9V peak = V peak ϵ −t1 RC 0.9 = ϵ −t1 RC log 0.9 = −t1 RC t1=0.105 RC (10.17) To find the interval up to the 90% point, follow the same technique using 0.9Vpeak . Doing so yields: t2=2.303 RC (10.18) The rise time, Tr, is the difference between t1 and t2 T r=t 1−t 2 T r=2.303RC−0.105 RC T r ≈2.2 RC (10.19) Equation 10.19 ties the rise time to the lag network’s R and C values. These same values also set the critical frequency f2. By combining equation 10.15 with the basic critical frequency relationship, we can derive an equation relating f2 to Tr. f 2= 1 2 π RC Solving 10.19 in terms of RC, and substituting yields f 2= 2.2 2π T r f 2=0.35 T r (10.20) Where f2 is the upper critical frequency, Tr is the rise time of the output pulse. 392
|
ACElectricalCircuitAnalysis_Page_392_Chunk892
|
Example 10.16 Determine the rise time for a lag network critical at 100 kHz. f 2=0.35 T r T r=0.35 f 2 T r= 0.35 100kHz T r=3.5μs 10.4 Combining the Elements - Multi-Stage Effects 10.4 Combining the Elements - Multi-Stage Effects A complete gain or phase plot combines three elements: (1) the midband response, (2) the lead response, and (3) the lag response. Normally, a particular design will contain multiple lead and lag networks. The complete response is the summation of the individual responses. For this reason, it is useful to find the dominant lead and lag networks. These are the networks that affect the midband response first. For lead networks, the dominant one will be the one with the highest fc . Conversely, the dominant lag network will be the one with the lowest fc . It is very common to approximate the complete system response by drawing straight-line segments such as those given in Figures 10.5 and 10.7. The process goes something like this: • Locate all fc s on the frequency axis. • Draw a straight line between the dominant lag and lead fc s at the midband gain. If the system does not contain any lead networks, continue the midband gain line down to DC. • Draw a 6 dB per octave slope between the dominant lead and the next lower lead network. • Because the effects of the networks are cumulative, draw a 12 dB per octave slope between the second lead fc and the third fc. After the third fc, the slope should be 18 dB per octave, after the fourth, 24 dB per octave, and so on. • Draw a −6 dB per octave slope between the dominant lag fc and the next highest fc. Again, the effects are cumulative, so increase the slope by −6 dB at every new fc . 393
|
ACElectricalCircuitAnalysis_Page_393_Chunk893
|
Example 10.17 Draw the Bode gain plot for the following amplifier: A'v midband = 26 dB, one lead network critical at 200 Hz, one lag network critical at 10 kHz, and another lag network critical at 30 kHz. The dominant lag network is 10 kHz. There is only one lead network, so it’s dominant by default. • Draw a straight line between 200 Hz and 10 kHz at an amplitude of 26 dB. • Draw a 6 dB per octave slope below 200 Hz. To do this, drop down one octave (100 Hz) and subtract 6 dB from the present gain (26 dB − 6dB = 20 dB.) The line will start at the point 200 Hz/26 dB, and pass through the point 100 Hz/20 dB. Because there are no other lead networks, this line may be extended to the left edge of the graph. • Draw a −6 dB per octave slope between 10 kHz and 30 kHz. The construction point will be 20 kHz/20 dB. Continue this line to 30 kHz. The gain at the 30 kHz intersection should be around 16 dB. The slope above this second fc will be −12 dB per octave. Therefore, the second construction point should be at 60 kHz/4 dB (one octave above 30 kHz, and 12 dB down from the 30 kHz gain). Because this is the final lag network, this line may be extended to the right edge of the graph. A completed graph is shown in Figure 10.13. 394 Figure 10.13 Gain plot of complete amplifier. f A'v 200 26 dB -12 dB/octave 0 dB -6 dB/octave 6 dB/octave 10 k 30 k
|
ACElectricalCircuitAnalysis_Page_394_Chunk894
|
There is one item that should be noted before we leave this section, and that is the concept of narrowing. Narrowing occurs when two or more networks share similar critical frequencies, and one of them is a dominant network. The result is that the true −3 dB breakpoints may be altered. Here is an extreme example. Assume that a circuit has two lag networks, both critical at 1 MHz. A Bode plot would indicate that the breakpoint is 1 MHz. This is not really true. Remember, the effects of lead and lag networks are cumulative. Because each network produces a 3 dB loss at 1 MHz, the net loss at this frequency is actually 6 dB. The true −3 dB point will have been shifted. The Bode plot only gives you the approximate shape of the response. 10.6 Summary 10.6 Summary We have seen how to convert gains and signals into a decibel form for both powers and voltages. This is convenient because what would require multiplication and division under the ordinary scheme only requires simple addition and subtraction in the dB scheme. Along with this, dB measurement is used almost exclusively for Bode gain plots. A Bode plot details a system’s gain magnitude and phase response. For gain, the amplitude is measured in dB, while the frequency is normally presented in log form. For a phase plot, phase is measured in degrees, and again, the frequency axis is logarithmic. The changes in gain and phase at the frequency extremes are caused by lead and lag networks. Lead networks cause the low frequency gain to roll off. The roll off rate is 6 dB per octave per network. The phase will change from +90 degrees to 0 degrees per network. Lag networks cause the high frequency gain to roll off at a rate of −6 dB per octave per network. The phase change per lag network is from 0 degrees to −90 degrees. Review Questions Review Questions 1. What are the advantages of using decibels over the ordinary scheme? 2. How do decibel power and voltage gain calculations differ? 3. Define the differences between dB, dBW, dBm, dBV and dBu. 4. Describe a Bode plot. 5. What is a lead network? What general response does it yield? 6. What is a lag network? What general response does it yield? 7. What do the terms f1 and f2 indicate about a system’s response? 8. What are the rolloff slopes for lead and lag networks? 9. What are the phase changes produced by individual lead and lag networks? 10. How is rise time related to upper break frequency? 11. How do multiple lead or lag networks interact to form an overall system response? 12. How does the decibel measurement scheme differ from the ordinary method of indicating gains and signal level? 395
|
ACElectricalCircuitAnalysis_Page_395_Chunk895
|
10.7 Exercises 10.7 Exercises Analysis Analysis dB emphasis 1. Convert the following power gains into dB form: a) 10 b) 80 c) 500 d) 1 e) 0.2 f) 0.03. 2. Convert the following dB power gains into ordinary form: a) 0 dB b) 12 dB c) 33.1 dB d) 0.2 dB e) −5.4 dB f) −20 dB. 3. An amplifier has an input signal of 1 mW, and produces a 2 W output. What is the power gain in dB? 4. A Hi-Fi power amplifier has a maximum output of 50 W and a power gain of 19 dB. What is the maximum input signal power? 5. An amplifier with a power gain of 27 dB is driven by a 25 mW source. Assuming the amplifier doesn’t clip, what is the output signal in watts? 6. Convert the following voltage gains into dB form: a) 10 b) 40 c) 250 d) 1 e) 0.5 f) 0.004 7. Convert the following dB voltage gains into ordinary form: a) 0.5 dB b) 0 dB c) 46 dB d) 10.7 dB e) −8 dB f) −14.5 dB 8. A guitar pre-amp has a gain of 44 dB. If the input signal is 12 mV, what is the output signal? 9. A video amplifier has a 140 mV input and a 1.2 V output. What is the voltage gain in dB? 10. The pre-amp in a particular tape deck can output a maximum signal of 4 V. If this amplifier has a gain of 18 dB, what is the maximum input signal? 11. Convert the following powers into dBW: a) 1 W b) 23 W c) 6.5 W d) 0.2W e) 2.3 mW f) 1.2 kW g) 0.045 mW h) 0.3 μW i) 5.6E−18 W. 12. Repeat Problem 11 for units of dBm. 13. Repeat Problem 11 for units of dBf. 14. Convert the following voltages into dBV: a) 12.4 V b) 1 V c) 0.25 V d) 1.414 V e) 0.1 V f) 10.6 kV g) 13 mV h) 2.78 μV. 15. A two stage power amplifier has power gains of 12 dB and 16 dB. What is the total gain in dB and in ordinary form? 16. If the amplifier of Problem 15 has an input of −18 dBW, what is the final output in dBW? in dBm? in watts? 17. Referring to Figure 10.3, what are the various stages’ outputs if the input is changed to −4 dBm? to −34 dBW? 396
|
ACElectricalCircuitAnalysis_Page_396_Chunk896
|
18. Which amplifier has the greatest power output? a) 50 watts b) 18 dBW c) 50 dBm. 19. Which amplifier has the greatest power output? a) 200 mW b) −10 dBW c) 22 dBm. 20. A three stage amplifier has voltage gains of 20 dB, 5 dB, and 12 dB respectively. What is the total voltage gain in dB and in ordinary form? 21. If the circuit of Problem 20 has an input voltage of −16 dBV, what are the outputs of the various stages in dBV? In volts? 22. Repeat Problem 21 for an input of 12 mV. 23. Which amplifier produces the largest output voltage? a) 15 V b) 16 dBV Bode plot emphasis 24. Given a lead network critical at 3 kHz, what are the gain and phase values at 100 Hz, 3 kHz, and 40 kHz? 25. Given a lag network tuned to 700 kHz, what are the gain and phase values at 50 kHz, 700 kHz, and 10 MHz? What is the rise time? 26. A noninverting amplifier has a midband voltage gain of 18 dB and a single lag network at 200 kHz. What are the gain and phase values at 30 kHz, 200 kHz, and 1 MHz. What is the rise time? 27. Repeat Problem 26 for an inverting (−180 degrees) amplifier. 28. Draw the Bode plot for the circuit of Problem 26. 29. Draw the Bode plot for the circuit of Problem 27. 30. An inverting (−180 degrees) amplifier has a midband gain of 32 dB and a single lead network critical at 20 Hz (assume the lag network fc is high enough to ignore for low frequency calculations). What are the gain and phase values at 4 Hz, 20Hz, and 100 Hz? 31. Repeat Problem 29 with a noninverting amplifier. 32. Draw the Bode plot for the circuit of Problem 30. 33. Draw the Bode plot for the circuit of Problem 31. 34. A noninverting amplifier used for ultrasonic applications has a midband gain of 41 dB, a lag network critical at 250 kHz, and a lead network critical at 30 kHz. Draw its gain Bode plot. 35. Find the gain and phase at 20 kHz, 100 kHz, and 800 kHz for the circuit of Problem 34. 36. If the circuit of Problem 34 has a second lag network added at 300 kHz, What are the new gain and phase values at 20 kHz, 100 kHz, and 800 kHz? 37. Draw the gain Bode plot for the circuit of Problem 36. 397
|
ACElectricalCircuitAnalysis_Page_397_Chunk897
|
38. What are the maximum and minimum phase shifts across the entire frequency spectrum for the circuit of Problem 36? 39. A noninverting DC amplifier has a midband gain of 36 dB, and lag networks at 100 kHz, 750 kHz, and 1.2 MHz. Draw its gain Bode plot. 40. What are the maximum and minimum phase shifts across the entire frequency spectrum for the circuit of Problem 39? 41. What is the maximum rate of high frequency attenuation for the circuit of Problem 39 in dB/Decade? 42. If an amplifier has two lead networks, what is the maximum rate of low frequency attenuation in dB/Octave? Challenge Challenge 43. You would like to use a voltmeter to take dBm readings in a 600 Ω system. What voltage should produce 0 dBm? 44. Assuming that it takes about an 8 dB increase in sound pressure level in order to produce a sound that is subjectively “twice as loud” to the human ear, can a Hi-Fi using a 100 W amplifier sound twice as loud as one with a 40 W amplifier (assuming the same loudspeakers)? 45. Hi-Fi amplifiers are often rated with a “headroom factor” in dB. This indicates how much extra power the amplifier can produce for short periods of time, over and above its nominal rating. What is the maximum output power of a 250 W amplifier with 1.6 dB headroom? 46. If the amplifier of Problem 34 picks up an extraneous signal that is a −10 dBV sine wave at 15 kHz, what is the output? 47. If the amplifier of Problem 39 picks up a high frequency interference signal at 30 MHz, how much is it attenuated over a normal signal? If this input signal is measured at 2 dBV, what should the output be? 48. If an amplifier has two lag networks, and both are critical at 2 MHz, is the resulting f2 less than, equal to, or greater than 2 MHz? 49. If an amplifier has two lead networks, and both are critical at 30 Hz, is the resulting f1 less than, equal to, or greater than 30 Hz? Simulation Simulation 50. Use a simulator to plot the Bode gain response of the circuit in Problem 39. 51. Use a simulator to plot the Bode phase response of the circuit in Problem 34. 52. Use a simulation program to generate a Bode plot for a lead network comprised of a 1 kΩ resistor and a 100 nF capacitor. 398
|
ACElectricalCircuitAnalysis_Page_398_Chunk898
|
Appendix A Appendix A Standard Component Sizes Standard Component Sizes Passive components (resistors, capacitors and inductors) are available in standard sizes. The tables below are for resistors. The same digits are used in subsequent decades up to at least 1 Meg ohm (higher decades are not shown). Capacitors and inductors are generally not available in as many standard values as are resistors. Capacitors below 10 nF (.01 μF) are usually available at the 5% standard digits while larger capacitances tend to be available at the 20% standards. 5% and 10% standard values, EIA E24 and EIA E12 5% and 10% standard values, EIA E24 and EIA E12 10% values (EIA E12) are bold 20% values (seldom used) are every fourth value starting from 10 (i.e., every other 10% value) 10 11 12 13 15 16 18 20 22 24 27 30 33 36 39 43 47 51 56 62 68 75 82 91 1% and 2% standard values, EIA E96 and EIA E48 1% and 2% standard values, EIA E96 and EIA E48 2% values (EIA E48) are bold 10.0 10.2 10.5 10.7 11.0 11.3 11.5 11.8 12.1 12.4 12.7 13.0 13.3 13.7 14.0 14.3 14.7 15.0 15.4 15.8 16.2 16.5 16.9 17.4 17.8 18.2 18.7 19.1 19.6 20.0 20.5 21.0 21.5 22.1 22.6 23.2 23.7 24.3 24.9 25.5 26.1 26.7 27.4 28.0 28.7 29.4 30.1 30.9 31.6 32.4 33.2 34.0 34.8 35.7 36.5 37.4 38.3 39.2 40.2 41.2 42.2 43.2 44.2 45.3 46.4 47.5 48.7 49.9 51.1 52.3 53.6 54.9 56.2 57.6 59.0 60.4 61.9 63.4 64.9 66.5 68.1 69.8 71.5 73.2 75.0 76.8 78.7 80.6 82.5 84.5 86.6 88.7 90.9 93.1 95.3 97.6 399
|
ACElectricalCircuitAnalysis_Page_399_Chunk899
|
Appendix B Appendix B Methods of Solution of Linear Simultaneous Equations Methods of Solution of Linear Simultaneous Equations Some circuit analysis methods, such as nodal analysis and mesh analysis, yield a set of linear simultaneous equations. There will be as many equations as there are unknowns. For example, a particular circuit might yield three equations with three unknown currents (often referred to as a “3 by 3” for the matrix it creates). There are several techniques that may be used to solve this system of equations. The methods include graphical, substitution, Guass-Jordan elimination and determinants (determinants may be solved via Cramer's Rule/Sarrus’ Rule or via expansion by minors). Graphical Graphical Graphical solutions involve plotting the individual equations on graph paper. The location of where the lines cross is the solution to the system (i.e., values that satisfy all of the equations). This technique will not be discussed further because it is only practical for two unknowns. It would be very difficult to draw something like a four dimensional graph for four equations with four unknowns! Substitution Substitution The idea here is to write one of the equations in terms of one of the unknowns and then substitute this back into one of the other equations resulting in a simplified version. This process is iterated for as many unknowns as the system includes. Take for example the following 2x2: 10 = 20I1 + 8I2 2 = 8I1 + 4I2 Solve the second equation for I2. 2 = 8I1 + 4I2 4I2 = 2 − 8I1 I2 = 0.5 − 2I1 Substitute this back into the first equation and expand/simplify/solve. 10 = 20I1 + 8I2 10 = 20I1 + 8(.5 − 2I1) 10 = 20I1 + 4 − 16I1 10 = 4I1 + 4 I1 = 1.5 Finally, substitute this value back into one of the two original equations to determine I2. 400
|
ACElectricalCircuitAnalysis_Page_400_Chunk900
|
Subsets and Splits
No community queries yet
The top public SQL queries from the community will appear here once available.