code stringlengths 35 6.69k | score float64 6.5 11.5 |
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module sky130_fd_sc_hd__a41o (
//# {{data|Data Signals}}
input A1,
input A2,
input A3,
input A4,
input B1,
output X,
//# {{power|Power}}
input VPB,
input VPWR,
input VGND,
input VNB
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__a41o (
//# {{data|Data Signals}}
input A1,
input A2,
input A3,
input A4,
input B1,
output X
);
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__a41oi (
Y,
A1,
A2,
A3,
A4,
B1,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output Y;
input A1;
input A2;
input A3;
input A4;
input B1;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire and0_out;
wire nor0_out_Y;
wire pwrgood_pp0_out_Y;
// Name Output Other arguments
and and0 (and0_out, A1, A2, A3, A4);
nor nor0 (nor0_out_Y, B1, and0_out);
sky130_fd_sc_hd__udp_pwrgood_pp$PG pwrgood_pp0 (
pwrgood_pp0_out_Y,
nor0_out_Y,
VPWR,
VGND
);
buf buf0 (Y, pwrgood_pp0_out_Y);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__a41oi (
Y,
A1,
A2,
A3,
A4,
B1
);
// Module ports
output Y;
input A1;
input A2;
input A3;
input A4;
input B1;
// Module supplies
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
// Local signals
wire and0_out;
wire nor0_out_Y;
// Name Output Other arguments
and and0 (and0_out, A1, A2, A3, A4);
nor nor0 (nor0_out_Y, B1, and0_out);
buf buf0 (Y, nor0_out_Y);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__a41oi (
Y,
A1,
A2,
A3,
A4,
B1
);
output Y;
input A1;
input A2;
input A3;
input A4;
input B1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__a41oi (
Y,
A1,
A2,
A3,
A4,
B1,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output Y;
input A1;
input A2;
input A3;
input A4;
input B1;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire and0_out;
wire nor0_out_Y;
wire pwrgood_pp0_out_Y;
// Name Output Other arguments
and and0 (and0_out, A1, A2, A3, A4);
nor nor0 (nor0_out_Y, B1, and0_out);
sky130_fd_sc_hd__udp_pwrgood_pp$PG pwrgood_pp0 (
pwrgood_pp0_out_Y,
nor0_out_Y,
VPWR,
VGND
);
buf buf0 (Y, pwrgood_pp0_out_Y);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__a41oi (
Y,
A1,
A2,
A3,
A4,
B1
);
// Module ports
output Y;
input A1;
input A2;
input A3;
input A4;
input B1;
// Local signals
wire and0_out;
wire nor0_out_Y;
// Name Output Other arguments
and and0 (and0_out, A1, A2, A3, A4);
nor nor0 (nor0_out_Y, B1, and0_out);
buf buf0 (Y, nor0_out_Y);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__a41oi (
Y,
A1,
A2,
A3,
A4,
B1,
VPWR,
VGND,
VPB,
VNB
);
output Y;
input A1;
input A2;
input A3;
input A4;
input B1;
input VPWR;
input VGND;
input VPB;
input VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__a41oi (
//# {{data|Data Signals}}
input A1,
input A2,
input A3,
input A4,
input B1,
output Y,
//# {{power|Power}}
input VPB,
input VPWR,
input VGND,
input VNB
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__a41oi (
//# {{data|Data Signals}}
input A1,
input A2,
input A3,
input A4,
input B1,
output Y
);
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__a41oi_1 (
Y,
A1,
A2,
A3,
A4,
B1,
VPWR,
VGND,
VPB,
VNB
);
output Y;
input A1;
input A2;
input A3;
input A4;
input B1;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__a41oi base (
.Y(Y),
.A1(A1),
.A2(A2),
.A3(A3),
.A4(A4),
.B1(B1),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__a41oi_1 (
Y,
A1,
A2,
A3,
A4,
B1
);
output Y;
input A1;
input A2;
input A3;
input A4;
input B1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__a41oi base (
.Y (Y),
.A1(A1),
.A2(A2),
.A3(A3),
.A4(A4),
.B1(B1)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__a41oi_2 (
Y,
A1,
A2,
A3,
A4,
B1,
VPWR,
VGND,
VPB,
VNB
);
output Y;
input A1;
input A2;
input A3;
input A4;
input B1;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__a41oi base (
.Y(Y),
.A1(A1),
.A2(A2),
.A3(A3),
.A4(A4),
.B1(B1),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__a41oi_2 (
Y,
A1,
A2,
A3,
A4,
B1
);
output Y;
input A1;
input A2;
input A3;
input A4;
input B1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__a41oi base (
.Y (Y),
.A1(A1),
.A2(A2),
.A3(A3),
.A4(A4),
.B1(B1)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__a41oi_4 (
Y,
A1,
A2,
A3,
A4,
B1,
VPWR,
VGND,
VPB,
VNB
);
output Y;
input A1;
input A2;
input A3;
input A4;
input B1;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__a41oi base (
.Y(Y),
.A1(A1),
.A2(A2),
.A3(A3),
.A4(A4),
.B1(B1),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__a41oi_4 (
Y,
A1,
A2,
A3,
A4,
B1
);
output Y;
input A1;
input A2;
input A3;
input A4;
input B1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__a41oi base (
.Y (Y),
.A1(A1),
.A2(A2),
.A3(A3),
.A4(A4),
.B1(B1)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__a41o_1 (
X,
A1,
A2,
A3,
A4,
B1,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A1;
input A2;
input A3;
input A4;
input B1;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__a41o base (
.X(X),
.A1(A1),
.A2(A2),
.A3(A3),
.A4(A4),
.B1(B1),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__a41o_1 (
X,
A1,
A2,
A3,
A4,
B1
);
output X;
input A1;
input A2;
input A3;
input A4;
input B1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__a41o base (
.X (X),
.A1(A1),
.A2(A2),
.A3(A3),
.A4(A4),
.B1(B1)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__a41o_2 (
X,
A1,
A2,
A3,
A4,
B1,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A1;
input A2;
input A3;
input A4;
input B1;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__a41o base (
.X(X),
.A1(A1),
.A2(A2),
.A3(A3),
.A4(A4),
.B1(B1),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__a41o_2 (
X,
A1,
A2,
A3,
A4,
B1
);
output X;
input A1;
input A2;
input A3;
input A4;
input B1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__a41o base (
.X (X),
.A1(A1),
.A2(A2),
.A3(A3),
.A4(A4),
.B1(B1)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__a41o_4 (
X,
A1,
A2,
A3,
A4,
B1,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A1;
input A2;
input A3;
input A4;
input B1;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__a41o base (
.X(X),
.A1(A1),
.A2(A2),
.A3(A3),
.A4(A4),
.B1(B1),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__a41o_4 (
X,
A1,
A2,
A3,
A4,
B1
);
output X;
input A1;
input A2;
input A3;
input A4;
input B1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__a41o base (
.X (X),
.A1(A1),
.A2(A2),
.A3(A3),
.A4(A4),
.B1(B1)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and2 (
X,
A,
B,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output X;
input A;
input B;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire and0_out_X;
wire pwrgood_pp0_out_X;
// Name Output Other arguments
and and0 (and0_out_X, A, B);
sky130_fd_sc_hd__udp_pwrgood_pp$PG pwrgood_pp0 (
pwrgood_pp0_out_X,
and0_out_X,
VPWR,
VGND
);
buf buf0 (X, pwrgood_pp0_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and2 (
X,
A,
B
);
// Module ports
output X;
input A;
input B;
// Module supplies
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
// Local signals
wire and0_out_X;
// Name Output Other arguments
and and0 (and0_out_X, A, B);
buf buf0 (X, and0_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and2 (
X,
A,
B
);
output X;
input A;
input B;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and2 (
X,
A,
B,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output X;
input A;
input B;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire and0_out_X;
wire pwrgood_pp0_out_X;
// Name Output Other arguments
and and0 (and0_out_X, A, B);
sky130_fd_sc_hd__udp_pwrgood_pp$PG pwrgood_pp0 (
pwrgood_pp0_out_X,
and0_out_X,
VPWR,
VGND
);
buf buf0 (X, pwrgood_pp0_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and2 (
X,
A,
B
);
// Module ports
output X;
input A;
input B;
// Local signals
wire and0_out_X;
// Name Output Other arguments
and and0 (and0_out_X, A, B);
buf buf0 (X, and0_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and2 (
X,
A,
B,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A;
input B;
input VPWR;
input VGND;
input VPB;
input VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and2 (
//# {{data|Data Signals}}
input A,
input B,
output X,
//# {{power|Power}}
input VPB,
input VPWR,
input VGND,
input VNB
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and2 (
//# {{data|Data Signals}}
input A,
input B,
output X
);
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and2b (
X,
A_N,
B,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output X;
input A_N;
input B;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire not0_out;
wire and0_out_X;
wire pwrgood_pp0_out_X;
// Name Output Other arguments
not not0 (not0_out, A_N);
and and0 (and0_out_X, not0_out, B);
sky130_fd_sc_hd__udp_pwrgood_pp$PG pwrgood_pp0 (
pwrgood_pp0_out_X,
and0_out_X,
VPWR,
VGND
);
buf buf0 (X, pwrgood_pp0_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and2b (
X,
A_N,
B
);
// Module ports
output X;
input A_N;
input B;
// Module supplies
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
// Local signals
wire not0_out;
wire and0_out_X;
// Name Output Other arguments
not not0 (not0_out, A_N);
and and0 (and0_out_X, not0_out, B);
buf buf0 (X, and0_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and2b (
X,
A_N,
B
);
output X;
input A_N;
input B;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and2b (
X,
A_N,
B,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output X;
input A_N;
input B;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire not0_out;
wire and0_out_X;
wire pwrgood_pp0_out_X;
// Name Output Other arguments
not not0 (not0_out, A_N);
and and0 (and0_out_X, not0_out, B);
sky130_fd_sc_hd__udp_pwrgood_pp$PG pwrgood_pp0 (
pwrgood_pp0_out_X,
and0_out_X,
VPWR,
VGND
);
buf buf0 (X, pwrgood_pp0_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and2b (
X,
A_N,
B
);
// Module ports
output X;
input A_N;
input B;
// Local signals
wire not0_out;
wire and0_out_X;
// Name Output Other arguments
not not0 (not0_out, A_N);
and and0 (and0_out_X, not0_out, B);
buf buf0 (X, and0_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and2b (
X,
A_N,
B,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A_N;
input B;
input VPWR;
input VGND;
input VPB;
input VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and2b (
//# {{data|Data Signals}}
input A_N,
input B,
output X,
//# {{power|Power}}
input VPB,
input VPWR,
input VGND,
input VNB
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and2b (
//# {{data|Data Signals}}
input A_N,
input B,
output X
);
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and2b_1 (
X,
A_N,
B,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A_N;
input B;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__and2b base (
.X(X),
.A_N(A_N),
.B(B),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and2b_1 (
X,
A_N,
B
);
output X;
input A_N;
input B;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__and2b base (
.X (X),
.A_N(A_N),
.B (B)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and2b_2 (
X,
A_N,
B,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A_N;
input B;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__and2b base (
.X(X),
.A_N(A_N),
.B(B),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and2b_2 (
X,
A_N,
B
);
output X;
input A_N;
input B;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__and2b base (
.X (X),
.A_N(A_N),
.B (B)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and2b_4 (
X,
A_N,
B,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A_N;
input B;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__and2b base (
.X(X),
.A_N(A_N),
.B(B),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and2b_4 (
X,
A_N,
B
);
output X;
input A_N;
input B;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__and2b base (
.X (X),
.A_N(A_N),
.B (B)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and2_0 (
X,
A,
B,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A;
input B;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__and2 base (
.X(X),
.A(A),
.B(B),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and2_0 (
X,
A,
B
);
output X;
input A;
input B;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__and2 base (
.X(X),
.A(A),
.B(B)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and2_1 (
X,
A,
B,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A;
input B;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__and2 base (
.X(X),
.A(A),
.B(B),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and2_1 (
X,
A,
B
);
output X;
input A;
input B;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__and2 base (
.X(X),
.A(A),
.B(B)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and2_2 (
X,
A,
B,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A;
input B;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__and2 base (
.X(X),
.A(A),
.B(B),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and2_2 (
X,
A,
B
);
output X;
input A;
input B;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__and2 base (
.X(X),
.A(A),
.B(B)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and2_4 (
X,
A,
B,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A;
input B;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__and2 base (
.X(X),
.A(A),
.B(B),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and2_4 (
X,
A,
B
);
output X;
input A;
input B;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__and2 base (
.X(X),
.A(A),
.B(B)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and3 (
X,
A,
B,
C,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output X;
input A;
input B;
input C;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire and0_out_X;
wire pwrgood_pp0_out_X;
// Name Output Other arguments
and and0 (and0_out_X, C, A, B);
sky130_fd_sc_hd__udp_pwrgood_pp$PG pwrgood_pp0 (
pwrgood_pp0_out_X,
and0_out_X,
VPWR,
VGND
);
buf buf0 (X, pwrgood_pp0_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and3 (
X,
A,
B,
C
);
// Module ports
output X;
input A;
input B;
input C;
// Module supplies
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
// Local signals
wire and0_out_X;
// Name Output Other arguments
and and0 (and0_out_X, C, A, B);
buf buf0 (X, and0_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and3 (
X,
A,
B,
C
);
output X;
input A;
input B;
input C;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and3 (
X,
A,
B,
C,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output X;
input A;
input B;
input C;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire and0_out_X;
wire pwrgood_pp0_out_X;
// Name Output Other arguments
and and0 (and0_out_X, C, A, B);
sky130_fd_sc_hd__udp_pwrgood_pp$PG pwrgood_pp0 (
pwrgood_pp0_out_X,
and0_out_X,
VPWR,
VGND
);
buf buf0 (X, pwrgood_pp0_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and3 (
X,
A,
B,
C
);
// Module ports
output X;
input A;
input B;
input C;
// Local signals
wire and0_out_X;
// Name Output Other arguments
and and0 (and0_out_X, C, A, B);
buf buf0 (X, and0_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and3 (
X,
A,
B,
C,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A;
input B;
input C;
input VPWR;
input VGND;
input VPB;
input VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and3 (
//# {{data|Data Signals}}
input A,
input B,
input C,
output X,
//# {{power|Power}}
input VPB,
input VPWR,
input VGND,
input VNB
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and3 (
//# {{data|Data Signals}}
input A,
input B,
input C,
output X
);
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and3b (
X,
A_N,
B,
C,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output X;
input A_N;
input B;
input C;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire not0_out;
wire and0_out_X;
wire pwrgood_pp0_out_X;
// Name Output Other arguments
not not0 (not0_out, A_N);
and and0 (and0_out_X, C, not0_out, B);
sky130_fd_sc_hd__udp_pwrgood_pp$PG pwrgood_pp0 (
pwrgood_pp0_out_X,
and0_out_X,
VPWR,
VGND
);
buf buf0 (X, pwrgood_pp0_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and3b (
X,
A_N,
B,
C
);
// Module ports
output X;
input A_N;
input B;
input C;
// Module supplies
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
// Local signals
wire not0_out;
wire and0_out_X;
// Name Output Other arguments
not not0 (not0_out, A_N);
and and0 (and0_out_X, C, not0_out, B);
buf buf0 (X, and0_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and3b (
X,
A_N,
B,
C
);
output X;
input A_N;
input B;
input C;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and3b (
X,
A_N,
B,
C,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output X;
input A_N;
input B;
input C;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire not0_out;
wire and0_out_X;
wire pwrgood_pp0_out_X;
// Name Output Other arguments
not not0 (not0_out, A_N);
and and0 (and0_out_X, C, not0_out, B);
sky130_fd_sc_hd__udp_pwrgood_pp$PG pwrgood_pp0 (
pwrgood_pp0_out_X,
and0_out_X,
VPWR,
VGND
);
buf buf0 (X, pwrgood_pp0_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and3b (
X,
A_N,
B,
C
);
// Module ports
output X;
input A_N;
input B;
input C;
// Local signals
wire not0_out;
wire and0_out_X;
// Name Output Other arguments
not not0 (not0_out, A_N);
and and0 (and0_out_X, C, not0_out, B);
buf buf0 (X, and0_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and3b (
X,
A_N,
B,
C,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A_N;
input B;
input C;
input VPWR;
input VGND;
input VPB;
input VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and3b (
//# {{data|Data Signals}}
input A_N,
input B,
input C,
output X,
//# {{power|Power}}
input VPB,
input VPWR,
input VGND,
input VNB
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and3b (
//# {{data|Data Signals}}
input A_N,
input B,
input C,
output X
);
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and3b_1 (
X,
A_N,
B,
C,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A_N;
input B;
input C;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__and3b base (
.X(X),
.A_N(A_N),
.B(B),
.C(C),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and3b_1 (
X,
A_N,
B,
C
);
output X;
input A_N;
input B;
input C;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__and3b base (
.X (X),
.A_N(A_N),
.B (B),
.C (C)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and3b_2 (
X,
A_N,
B,
C,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A_N;
input B;
input C;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__and3b base (
.X(X),
.A_N(A_N),
.B(B),
.C(C),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and3b_2 (
X,
A_N,
B,
C
);
output X;
input A_N;
input B;
input C;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__and3b base (
.X (X),
.A_N(A_N),
.B (B),
.C (C)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and3b_4 (
X,
A_N,
B,
C,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A_N;
input B;
input C;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__and3b base (
.X(X),
.A_N(A_N),
.B(B),
.C(C),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and3b_4 (
X,
A_N,
B,
C
);
output X;
input A_N;
input B;
input C;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__and3b base (
.X (X),
.A_N(A_N),
.B (B),
.C (C)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and3_1 (
X,
A,
B,
C,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A;
input B;
input C;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__and3 base (
.X(X),
.A(A),
.B(B),
.C(C),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and3_1 (
X,
A,
B,
C
);
output X;
input A;
input B;
input C;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__and3 base (
.X(X),
.A(A),
.B(B),
.C(C)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and3_2 (
X,
A,
B,
C,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A;
input B;
input C;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__and3 base (
.X(X),
.A(A),
.B(B),
.C(C),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and3_2 (
X,
A,
B,
C
);
output X;
input A;
input B;
input C;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__and3 base (
.X(X),
.A(A),
.B(B),
.C(C)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and3_4 (
X,
A,
B,
C,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A;
input B;
input C;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__and3 base (
.X(X),
.A(A),
.B(B),
.C(C),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and3_4 (
X,
A,
B,
C
);
output X;
input A;
input B;
input C;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__and3 base (
.X(X),
.A(A),
.B(B),
.C(C)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and4 (
X,
A,
B,
C,
D,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output X;
input A;
input B;
input C;
input D;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire and0_out_X;
wire pwrgood_pp0_out_X;
// Name Output Other arguments
and and0 (and0_out_X, A, B, C, D);
sky130_fd_sc_hd__udp_pwrgood_pp$PG pwrgood_pp0 (
pwrgood_pp0_out_X,
and0_out_X,
VPWR,
VGND
);
buf buf0 (X, pwrgood_pp0_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and4 (
X,
A,
B,
C,
D
);
// Module ports
output X;
input A;
input B;
input C;
input D;
// Module supplies
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
// Local signals
wire and0_out_X;
// Name Output Other arguments
and and0 (and0_out_X, A, B, C, D);
buf buf0 (X, and0_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and4 (
X,
A,
B,
C,
D
);
output X;
input A;
input B;
input C;
input D;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and4 (
X,
A,
B,
C,
D,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output X;
input A;
input B;
input C;
input D;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire and0_out_X;
wire pwrgood_pp0_out_X;
// Name Output Other arguments
and and0 (and0_out_X, A, B, C, D);
sky130_fd_sc_hd__udp_pwrgood_pp$PG pwrgood_pp0 (
pwrgood_pp0_out_X,
and0_out_X,
VPWR,
VGND
);
buf buf0 (X, pwrgood_pp0_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and4 (
X,
A,
B,
C,
D
);
// Module ports
output X;
input A;
input B;
input C;
input D;
// Local signals
wire and0_out_X;
// Name Output Other arguments
and and0 (and0_out_X, A, B, C, D);
buf buf0 (X, and0_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and4 (
X,
A,
B,
C,
D,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A;
input B;
input C;
input D;
input VPWR;
input VGND;
input VPB;
input VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and4 (
//# {{data|Data Signals}}
input A,
input B,
input C,
input D,
output X,
//# {{power|Power}}
input VPB,
input VPWR,
input VGND,
input VNB
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and4 (
//# {{data|Data Signals}}
input A,
input B,
input C,
input D,
output X
);
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and4b (
X,
A_N,
B,
C,
D,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output X;
input A_N;
input B;
input C;
input D;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire not0_out;
wire and0_out_X;
wire pwrgood_pp0_out_X;
// Name Output Other arguments
not not0 (not0_out, A_N);
and and0 (and0_out_X, not0_out, B, C, D);
sky130_fd_sc_hd__udp_pwrgood_pp$PG pwrgood_pp0 (
pwrgood_pp0_out_X,
and0_out_X,
VPWR,
VGND
);
buf buf0 (X, pwrgood_pp0_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and4b (
X,
A_N,
B,
C,
D
);
// Module ports
output X;
input A_N;
input B;
input C;
input D;
// Module supplies
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
// Local signals
wire not0_out;
wire and0_out_X;
// Name Output Other arguments
not not0 (not0_out, A_N);
and and0 (and0_out_X, not0_out, B, C, D);
buf buf0 (X, and0_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and4b (
X,
A_N,
B,
C,
D
);
output X;
input A_N;
input B;
input C;
input D;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and4b (
X,
A_N,
B,
C,
D,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output X;
input A_N;
input B;
input C;
input D;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire not0_out;
wire and0_out_X;
wire pwrgood_pp0_out_X;
// Name Output Other arguments
not not0 (not0_out, A_N);
and and0 (and0_out_X, not0_out, B, C, D);
sky130_fd_sc_hd__udp_pwrgood_pp$PG pwrgood_pp0 (
pwrgood_pp0_out_X,
and0_out_X,
VPWR,
VGND
);
buf buf0 (X, pwrgood_pp0_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and4b (
X,
A_N,
B,
C,
D
);
// Module ports
output X;
input A_N;
input B;
input C;
input D;
// Local signals
wire not0_out;
wire and0_out_X;
// Name Output Other arguments
not not0 (not0_out, A_N);
and and0 (and0_out_X, not0_out, B, C, D);
buf buf0 (X, and0_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and4b (
X,
A_N,
B,
C,
D,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A_N;
input B;
input C;
input D;
input VPWR;
input VGND;
input VPB;
input VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and4b (
//# {{data|Data Signals}}
input A_N,
input B,
input C,
input D,
output X,
//# {{power|Power}}
input VPB,
input VPWR,
input VGND,
input VNB
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and4b (
//# {{data|Data Signals}}
input A_N,
input B,
input C,
input D,
output X
);
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and4bb (
X,
A_N,
B_N,
C,
D,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output X;
input A_N;
input B_N;
input C;
input D;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire nor0_out;
wire and0_out_X;
wire pwrgood_pp0_out_X;
// Name Output Other arguments
nor nor0 (nor0_out, A_N, B_N);
and and0 (and0_out_X, nor0_out, C, D);
sky130_fd_sc_hd__udp_pwrgood_pp$PG pwrgood_pp0 (
pwrgood_pp0_out_X,
and0_out_X,
VPWR,
VGND
);
buf buf0 (X, pwrgood_pp0_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and4bb (
X,
A_N,
B_N,
C,
D
);
// Module ports
output X;
input A_N;
input B_N;
input C;
input D;
// Module supplies
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
// Local signals
wire nor0_out;
wire and0_out_X;
// Name Output Other arguments
nor nor0 (nor0_out, A_N, B_N);
and and0 (and0_out_X, nor0_out, C, D);
buf buf0 (X, and0_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and4bb (
X,
A_N,
B_N,
C,
D
);
output X;
input A_N;
input B_N;
input C;
input D;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__and4bb (
X,
A_N,
B_N,
C,
D,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output X;
input A_N;
input B_N;
input C;
input D;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire nor0_out;
wire and0_out_X;
wire pwrgood_pp0_out_X;
// Name Output Other arguments
nor nor0 (nor0_out, A_N, B_N);
and and0 (and0_out_X, nor0_out, C, D);
sky130_fd_sc_hd__udp_pwrgood_pp$PG pwrgood_pp0 (
pwrgood_pp0_out_X,
and0_out_X,
VPWR,
VGND
);
buf buf0 (X, pwrgood_pp0_out_X);
endmodule
| 7.212805 |
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