code stringlengths 35 6.69k | score float64 6.5 11.5 |
|---|---|
module sky130_fd_sc_hd__lpflow_lsbuf_lh_hl_isowell_tap_1 (
X,
A,
VPWRIN,
VPWR,
VGND,
VPB
);
output X;
input A;
input VPWRIN;
input VPWR;
input VGND;
input VPB;
sky130_fd_sc_hd__lpflow_lsbuf_lh_hl_isowell_tap base (
.X(X),
.A(A),
.VPWRIN(VPWRIN),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__lpflow_lsbuf_lh_hl_isowell_tap_1 (
X,
A
);
output X;
input A;
// Voltage supply signals
wire VPWRIN;
supply1 VPWR ;
supply0 VGND ;
supply1 VPB ;
sky130_fd_sc_hd__lpflow_lsbuf_lh_hl_isowell_tap base (
.X(X),
.A(A)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__lpflow_lsbuf_lh_hl_isowell_tap_2 (
X,
A,
VPWRIN,
VPWR,
VGND,
VPB
);
output X;
input A;
input VPWRIN;
input VPWR;
input VGND;
input VPB;
sky130_fd_sc_hd__lpflow_lsbuf_lh_hl_isowell_tap base (
.X(X),
.A(A),
.VPWRIN(VPWRIN),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__lpflow_lsbuf_lh_hl_isowell_tap_2 (
X,
A
);
output X;
input A;
// Voltage supply signals
wire VPWRIN;
supply1 VPWR ;
supply0 VGND ;
supply1 VPB ;
sky130_fd_sc_hd__lpflow_lsbuf_lh_hl_isowell_tap base (
.X(X),
.A(A)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__lpflow_lsbuf_lh_hl_isowell_tap_4 (
X,
A,
VPWRIN,
VPWR,
VGND,
VPB
);
output X;
input A;
input VPWRIN;
input VPWR;
input VGND;
input VPB;
sky130_fd_sc_hd__lpflow_lsbuf_lh_hl_isowell_tap base (
.X(X),
.A(A),
.VPWRIN(VPWRIN),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__lpflow_lsbuf_lh_hl_isowell_tap_4 (
X,
A
);
output X;
input A;
// Voltage supply signals
wire VPWRIN;
supply1 VPWR ;
supply0 VGND ;
supply1 VPB ;
sky130_fd_sc_hd__lpflow_lsbuf_lh_hl_isowell_tap base (
.X(X),
.A(A)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell (
X,
A,
LOWLVPWR,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output X;
input A;
input LOWLVPWR;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire pwrgood0_out_A;
wire buf0_out_X;
// Name Output Other arguments
sky130_fd_sc_hd__udp_pwrgood$l_pp$PG pwrgood0 (
pwrgood0_out_A,
A,
LOWLVPWR,
VGND
);
buf buf0 (buf0_out_X, pwrgood0_out_A);
sky130_fd_sc_hd__udp_pwrgood$l_pp$PG pwrgood1 (
X,
buf0_out_X,
VPWR,
VGND
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell (
X,
A
);
// Module ports
output X;
input A;
// Module supplies
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
// Name Output Other arguments
buf buf0 (X, A);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell (
X,
A
);
output X;
input A;
// Voltage supply signals
wire LOWLVPWR;
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell (
X,
A,
LOWLVPWR,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output X;
input A;
input LOWLVPWR;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire pwrgood0_out_A;
wire buf0_out_X;
// Name Output Other arguments
sky130_fd_sc_hd__udp_pwrgood$l_pp$PG pwrgood0 (
pwrgood0_out_A,
A,
LOWLVPWR,
VGND
);
buf buf0 (buf0_out_X, pwrgood0_out_A);
sky130_fd_sc_hd__udp_pwrgood$l_pp$PG pwrgood1 (
X,
buf0_out_X,
VPWR,
VGND
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell (
X,
A
);
// Module ports
output X;
input A;
// Name Output Other arguments
buf buf0 (X, A);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell (
X,
A,
LOWLVPWR,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A;
input LOWLVPWR;
input VPWR;
input VGND;
input VPB;
input VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell (
//# {{data|Data Signals}}
input A,
output X,
//# {{power|Power}}
input LOWLVPWR,
input VPB,
input VPWR,
input VGND,
input VNB
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell (
//# {{data|Data Signals}}
input A,
output X
);
// Voltage supply signals
wire LOWLVPWR;
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_4 (
X,
A,
LOWLVPWR,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A;
input LOWLVPWR;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell base (
.X(X),
.A(A),
.LOWLVPWR(LOWLVPWR),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_4 (
X,
A
);
output X;
input A;
// Voltage supply signals
wire LOWLVPWR;
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell base (
.X(X),
.A(A)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap (
X,
A,
LOWLVPWR,
VPWR,
VGND,
VPB
);
// Module ports
output X;
input A;
input LOWLVPWR;
input VPWR;
input VGND;
input VPB;
// Local signals
wire pwrgood0_out_A;
wire buf0_out_X;
// Name Output Other arguments
sky130_fd_sc_hd__udp_pwrgood$l_pp$PG pwrgood0 (
pwrgood0_out_A,
A,
LOWLVPWR,
VGND
);
buf buf0 (buf0_out_X, pwrgood0_out_A);
sky130_fd_sc_hd__udp_pwrgood$l_pp$PG pwrgood1 (
X,
buf0_out_X,
VPWR,
VGND
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap (
X,
A
);
// Module ports
output X;
input A;
// Module supplies
supply1 VPWR;
supply0 VGND;
supply1 VPB;
// Name Output Other arguments
buf buf0 (X, A);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap (
X,
A
);
output X;
input A;
// Voltage supply signals
wire LOWLVPWR;
supply1 VPWR;
supply0 VGND;
supply1 VPB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap (
X,
A,
LOWLVPWR,
VPWR,
VGND,
VPB
);
// Module ports
output X;
input A;
input LOWLVPWR;
input VPWR;
input VGND;
input VPB;
// Local signals
wire pwrgood0_out_A;
wire buf0_out_X;
// Name Output Other arguments
sky130_fd_sc_hd__udp_pwrgood$l_pp$PG pwrgood0 (
pwrgood0_out_A,
A,
LOWLVPWR,
VGND
);
buf buf0 (buf0_out_X, pwrgood0_out_A);
sky130_fd_sc_hd__udp_pwrgood$l_pp$PG pwrgood1 (
X,
buf0_out_X,
VPWR,
VGND
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap (
X,
A
);
// Module ports
output X;
input A;
// Name Output Other arguments
buf buf0 (X, A);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap (
X,
A,
LOWLVPWR,
VPWR,
VGND,
VPB
);
output X;
input A;
input LOWLVPWR;
input VPWR;
input VGND;
input VPB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap (
//# {{data|Data Signals}}
input A,
output X,
//# {{power|Power}}
input LOWLVPWR,
input VPB,
input VPWR,
input VGND
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap (
//# {{data|Data Signals}}
input A,
output X
);
// Voltage supply signals
wire LOWLVPWR;
supply1 VPWR;
supply0 VGND;
supply1 VPB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap_1 (
X,
A,
LOWLVPWR,
VPWR,
VGND,
VPB
);
output X;
input A;
input LOWLVPWR;
input VPWR;
input VGND;
input VPB;
sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap base (
.X(X),
.A(A),
.LOWLVPWR(LOWLVPWR),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap_1 (
X,
A
);
output X;
input A;
// Voltage supply signals
wire LOWLVPWR;
supply1 VPWR;
supply0 VGND;
supply1 VPB;
sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap base (
.X(X),
.A(A)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap_2 (
X,
A,
LOWLVPWR,
VPWR,
VGND,
VPB
);
output X;
input A;
input LOWLVPWR;
input VPWR;
input VGND;
input VPB;
sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap base (
.X(X),
.A(A),
.LOWLVPWR(LOWLVPWR),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap_2 (
X,
A
);
output X;
input A;
// Voltage supply signals
wire LOWLVPWR;
supply1 VPWR;
supply0 VGND;
supply1 VPB;
sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap base (
.X(X),
.A(A)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap_4 (
X,
A,
LOWLVPWR,
VPWR,
VGND,
VPB
);
output X;
input A;
input LOWLVPWR;
input VPWR;
input VGND;
input VPB;
sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap base (
.X(X),
.A(A),
.LOWLVPWR(LOWLVPWR),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap_4 (
X,
A
);
output X;
input A;
// Voltage supply signals
wire LOWLVPWR;
supply1 VPWR;
supply0 VGND;
supply1 VPB;
sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap base (
.X(X),
.A(A)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__macro_sparecell (
LO,
VGND,
VNB,
VPB,
VPWR
);
// Module ports
output LO;
input VGND;
input VNB;
input VPB;
input VPWR;
// Local signals
wire nor2left;
wire invleft;
wire nor2right;
wire invright;
wire nd2left;
wire nd2right;
wire tielo;
wire net7;
// Name Output Other arguments
sky130_fd_sc_hd__inv_2 inv0 (
.A(nor2left),
.Y(invleft),
.VPWR(VPWR),
.VGND(VGND),
.VNB(VNB),
.VPB(VPB)
);
sky130_fd_sc_hd__inv_2 inv1 (
.A(nor2right),
.Y(invright),
.VPWR(VPWR),
.VGND(VGND),
.VNB(VNB),
.VPB(VPB)
);
sky130_fd_sc_hd__nor2_2 nor20 (
.B(nd2left),
.A(nd2left),
.Y(nor2left),
.VPWR(VPWR),
.VGND(VGND),
.VNB(VNB),
.VPB(VPB)
);
sky130_fd_sc_hd__nor2_2 nor21 (
.B(nd2right),
.A(nd2right),
.Y(nor2right),
.VPWR(VPWR),
.VGND(VGND),
.VNB(VNB),
.VPB(VPB)
);
sky130_fd_sc_hd__nand2_2 nand20 (
.B (tielo),
.A (tielo),
.Y (nd2right),
.VPWR(VPWR),
.VGND(VGND),
.VNB (VNB),
.VPB (VPB)
);
sky130_fd_sc_hd__nand2_2 nand21 (
.B (tielo),
.A (tielo),
.Y (nd2left),
.VPWR(VPWR),
.VGND(VGND),
.VNB (VNB),
.VPB (VPB)
);
sky130_fd_sc_hd__conb_1 conb0 (
.LO (tielo),
.HI (net7),
.VPWR(VPWR),
.VGND(VGND),
.VNB (VNB),
.VPB (VPB)
);
buf buf0 (LO, tielo);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__macro_sparecell (
LO
);
// Module ports
output LO;
// Local signals
wire nor2left;
wire invleft;
wire nor2right;
wire invright;
wire nd2left;
wire nd2right;
wire tielo;
wire net7;
// Name Output Other arguments
sky130_fd_sc_hd__inv_2 inv0 (
.A(nor2left),
.Y(invleft)
);
sky130_fd_sc_hd__inv_2 inv1 (
.A(nor2right),
.Y(invright)
);
sky130_fd_sc_hd__nor2_2 nor20 (
.B(nd2left),
.A(nd2left),
.Y(nor2left)
);
sky130_fd_sc_hd__nor2_2 nor21 (
.B(nd2right),
.A(nd2right),
.Y(nor2right)
);
sky130_fd_sc_hd__nand2_2 nand20 (
.B(tielo),
.A(tielo),
.Y(nd2right)
);
sky130_fd_sc_hd__nand2_2 nand21 (
.B(tielo),
.A(tielo),
.Y(nd2left)
);
sky130_fd_sc_hd__conb_1 conb0 (
.LO(tielo),
.HI(net7)
);
buf buf0 (LO, tielo);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__macro_sparecell (
LO
);
output LO;
// Voltage supply signals
supply0 VGND;
supply0 VNB;
supply1 VPB;
supply1 VPWR;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__macro_sparecell (
LO,
VGND,
VNB,
VPB,
VPWR
);
// Module ports
output LO;
input VGND;
input VNB;
input VPB;
input VPWR;
// Local signals
wire nor2left;
wire invleft;
wire nor2right;
wire invright;
wire nd2left;
wire nd2right;
wire tielo;
wire net7;
// Name Output Other arguments
sky130_fd_sc_hd__inv_2 inv0 (
.A(nor2left),
.Y(invleft),
.VPWR(VPWR),
.VGND(VGND),
.VNB(VNB),
.VPB(VPB)
);
sky130_fd_sc_hd__inv_2 inv1 (
.A(nor2right),
.Y(invright),
.VPWR(VPWR),
.VGND(VGND),
.VNB(VNB),
.VPB(VPB)
);
sky130_fd_sc_hd__nor2_2 nor20 (
.B(nd2left),
.A(nd2left),
.Y(nor2left),
.VPWR(VPWR),
.VGND(VGND),
.VNB(VNB),
.VPB(VPB)
);
sky130_fd_sc_hd__nor2_2 nor21 (
.B(nd2right),
.A(nd2right),
.Y(nor2right),
.VPWR(VPWR),
.VGND(VGND),
.VNB(VNB),
.VPB(VPB)
);
sky130_fd_sc_hd__nand2_2 nand20 (
.B (tielo),
.A (tielo),
.Y (nd2right),
.VPWR(VPWR),
.VGND(VGND),
.VNB (VNB),
.VPB (VPB)
);
sky130_fd_sc_hd__nand2_2 nand21 (
.B (tielo),
.A (tielo),
.Y (nd2left),
.VPWR(VPWR),
.VGND(VGND),
.VNB (VNB),
.VPB (VPB)
);
sky130_fd_sc_hd__conb_1 conb0 (
.LO (tielo),
.HI (net7),
.VPWR(VPWR),
.VGND(VGND),
.VNB (VNB),
.VPB (VPB)
);
buf buf0 (LO, tielo);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__macro_sparecell (
LO
);
// Module ports
output LO;
// Local signals
wire nor2left;
wire invleft;
wire nor2right;
wire invright;
wire nd2left;
wire nd2right;
wire tielo;
wire net7;
// Name Output Other arguments
sky130_fd_sc_hd__inv_2 inv0 (
.A(nor2left),
.Y(invleft)
);
sky130_fd_sc_hd__inv_2 inv1 (
.A(nor2right),
.Y(invright)
);
sky130_fd_sc_hd__nor2_2 nor20 (
.B(nd2left),
.A(nd2left),
.Y(nor2left)
);
sky130_fd_sc_hd__nor2_2 nor21 (
.B(nd2right),
.A(nd2right),
.Y(nor2right)
);
sky130_fd_sc_hd__nand2_2 nand20 (
.B(tielo),
.A(tielo),
.Y(nd2right)
);
sky130_fd_sc_hd__nand2_2 nand21 (
.B(tielo),
.A(tielo),
.Y(nd2left)
);
sky130_fd_sc_hd__conb_1 conb0 (
.LO(tielo),
.HI(net7)
);
buf buf0 (LO, tielo);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__macro_sparecell (
LO,
VGND,
VNB,
VPB,
VPWR
);
output LO;
input VGND;
input VNB;
input VPB;
input VPWR;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__macro_sparecell (
//# {{data|Data Signals}}
output LO,
//# {{power|Power}}
input VPB,
input VPWR,
input VGND,
input VNB
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__macro_sparecell (
//# {{data|Data Signals}}
output LO
);
// Voltage supply signals
supply0 VGND;
supply0 VNB;
supply1 VPB;
supply1 VPWR;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__maj3 (
X,
A,
B,
C,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output X;
input A;
input B;
input C;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire or0_out;
wire and0_out;
wire and1_out;
wire or1_out_X;
wire pwrgood_pp0_out_X;
// Name Output Other arguments
or or0 (or0_out, B, A);
and and0 (and0_out, or0_out, C);
and and1 (and1_out, A, B);
or or1 (or1_out_X, and1_out, and0_out);
sky130_fd_sc_hd__udp_pwrgood_pp$PG pwrgood_pp0 (
pwrgood_pp0_out_X,
or1_out_X,
VPWR,
VGND
);
buf buf0 (X, pwrgood_pp0_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__maj3 (
X,
A,
B,
C
);
// Module ports
output X;
input A;
input B;
input C;
// Module supplies
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
// Local signals
wire or0_out;
wire and0_out;
wire and1_out;
wire or1_out_X;
// Name Output Other arguments
or or0 (or0_out, B, A);
and and0 (and0_out, or0_out, C);
and and1 (and1_out, A, B);
or or1 (or1_out_X, and1_out, and0_out);
buf buf0 (X, or1_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__maj3 (
X,
A,
B,
C
);
output X;
input A;
input B;
input C;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__maj3 (
X,
A,
B,
C,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output X;
input A;
input B;
input C;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire or0_out;
wire and0_out;
wire and1_out;
wire or1_out_X;
wire pwrgood_pp0_out_X;
// Name Output Other arguments
or or0 (or0_out, B, A);
and and0 (and0_out, or0_out, C);
and and1 (and1_out, A, B);
or or1 (or1_out_X, and1_out, and0_out);
sky130_fd_sc_hd__udp_pwrgood_pp$PG pwrgood_pp0 (
pwrgood_pp0_out_X,
or1_out_X,
VPWR,
VGND
);
buf buf0 (X, pwrgood_pp0_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__maj3 (
X,
A,
B,
C
);
// Module ports
output X;
input A;
input B;
input C;
// Local signals
wire or0_out;
wire and0_out;
wire and1_out;
wire or1_out_X;
// Name Output Other arguments
or or0 (or0_out, B, A);
and and0 (and0_out, or0_out, C);
and and1 (and1_out, A, B);
or or1 (or1_out_X, and1_out, and0_out);
buf buf0 (X, or1_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__maj3 (
X,
A,
B,
C,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A;
input B;
input C;
input VPWR;
input VGND;
input VPB;
input VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__maj3 (
//# {{data|Data Signals}}
input A,
input B,
input C,
output X,
//# {{power|Power}}
input VPB,
input VPWR,
input VGND,
input VNB
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__maj3 (
//# {{data|Data Signals}}
input A,
input B,
input C,
output X
);
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__maj3_1 (
X,
A,
B,
C,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A;
input B;
input C;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__maj3 base (
.X(X),
.A(A),
.B(B),
.C(C),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__maj3_1 (
X,
A,
B,
C
);
output X;
input A;
input B;
input C;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__maj3 base (
.X(X),
.A(A),
.B(B),
.C(C)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__maj3_2 (
X,
A,
B,
C,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A;
input B;
input C;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__maj3 base (
.X(X),
.A(A),
.B(B),
.C(C),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__maj3_2 (
X,
A,
B,
C
);
output X;
input A;
input B;
input C;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__maj3 base (
.X(X),
.A(A),
.B(B),
.C(C)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__maj3_4 (
X,
A,
B,
C,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A;
input B;
input C;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__maj3 base (
.X(X),
.A(A),
.B(B),
.C(C),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__maj3_4 (
X,
A,
B,
C
);
output X;
input A;
input B;
input C;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__maj3 base (
.X(X),
.A(A),
.B(B),
.C(C)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__mux2 (
X,
A0,
A1,
S,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output X;
input A0;
input A1;
input S;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire mux_2to10_out_X;
wire pwrgood_pp0_out_X;
// Name Output Other arguments
sky130_fd_sc_hd__udp_mux_2to1 mux_2to10 (
mux_2to10_out_X,
A0,
A1,
S
);
sky130_fd_sc_hd__udp_pwrgood_pp$PG pwrgood_pp0 (
pwrgood_pp0_out_X,
mux_2to10_out_X,
VPWR,
VGND
);
buf buf0 (X, pwrgood_pp0_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__mux2 (
X,
A0,
A1,
S
);
// Module ports
output X;
input A0;
input A1;
input S;
// Module supplies
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
// Local signals
wire mux_2to10_out_X;
// Name Output Other arguments
sky130_fd_sc_hd__udp_mux_2to1 mux_2to10 (
mux_2to10_out_X,
A0,
A1,
S
);
buf buf0 (X, mux_2to10_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__mux2 (
X,
A0,
A1,
S
);
output X;
input A0;
input A1;
input S;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__mux2 (
X,
A0,
A1,
S,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output X;
input A0;
input A1;
input S;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire mux_2to10_out_X;
wire pwrgood_pp0_out_X;
// Name Output Other arguments
sky130_fd_sc_hd__udp_mux_2to1 mux_2to10 (
mux_2to10_out_X,
A0,
A1,
S
);
sky130_fd_sc_hd__udp_pwrgood_pp$PG pwrgood_pp0 (
pwrgood_pp0_out_X,
mux_2to10_out_X,
VPWR,
VGND
);
buf buf0 (X, pwrgood_pp0_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__mux2 (
X,
A0,
A1,
S
);
// Module ports
output X;
input A0;
input A1;
input S;
// Local signals
wire mux_2to10_out_X;
// Name Output Other arguments
sky130_fd_sc_hd__udp_mux_2to1 mux_2to10 (
mux_2to10_out_X,
A0,
A1,
S
);
buf buf0 (X, mux_2to10_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__mux2 (
X,
A0,
A1,
S,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A0;
input A1;
input S;
input VPWR;
input VGND;
input VPB;
input VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__mux2 (
//# {{data|Data Signals}}
input A0,
input A1,
output X,
//# {{control|Control Signals}}
input S,
//# {{power|Power}}
input VPB,
input VPWR,
input VGND,
input VNB
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__mux2 (
//# {{data|Data Signals}}
input A0,
input A1,
output X,
//# {{control|Control Signals}}
input S
);
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__mux2i (
Y,
A0,
A1,
S,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output Y;
input A0;
input A1;
input S;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire mux_2to1_n0_out_Y;
wire pwrgood_pp0_out_Y;
// Name Output Other arguments
sky130_fd_sc_hd__udp_mux_2to1_N mux_2to1_n0 (
mux_2to1_n0_out_Y,
A0,
A1,
S
);
sky130_fd_sc_hd__udp_pwrgood_pp$PG pwrgood_pp0 (
pwrgood_pp0_out_Y,
mux_2to1_n0_out_Y,
VPWR,
VGND
);
buf buf0 (Y, pwrgood_pp0_out_Y);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__mux2i (
Y,
A0,
A1,
S
);
// Module ports
output Y;
input A0;
input A1;
input S;
// Module supplies
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
// Local signals
wire mux_2to1_n0_out_Y;
// Name Output Other arguments
sky130_fd_sc_hd__udp_mux_2to1_N mux_2to1_n0 (
mux_2to1_n0_out_Y,
A0,
A1,
S
);
buf buf0 (Y, mux_2to1_n0_out_Y);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__mux2i (
Y,
A0,
A1,
S
);
output Y;
input A0;
input A1;
input S;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__mux2i (
Y,
A0,
A1,
S,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output Y;
input A0;
input A1;
input S;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire mux_2to1_n0_out_Y;
wire pwrgood_pp0_out_Y;
// Name Output Other arguments
sky130_fd_sc_hd__udp_mux_2to1_N mux_2to1_n0 (
mux_2to1_n0_out_Y,
A0,
A1,
S
);
sky130_fd_sc_hd__udp_pwrgood_pp$PG pwrgood_pp0 (
pwrgood_pp0_out_Y,
mux_2to1_n0_out_Y,
VPWR,
VGND
);
buf buf0 (Y, pwrgood_pp0_out_Y);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__mux2i (
Y,
A0,
A1,
S
);
// Module ports
output Y;
input A0;
input A1;
input S;
// Local signals
wire mux_2to1_n0_out_Y;
// Name Output Other arguments
sky130_fd_sc_hd__udp_mux_2to1_N mux_2to1_n0 (
mux_2to1_n0_out_Y,
A0,
A1,
S
);
buf buf0 (Y, mux_2to1_n0_out_Y);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__mux2i (
Y,
A0,
A1,
S,
VPWR,
VGND,
VPB,
VNB
);
output Y;
input A0;
input A1;
input S;
input VPWR;
input VGND;
input VPB;
input VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__mux2i (
//# {{data|Data Signals}}
input A0,
input A1,
output Y,
//# {{control|Control Signals}}
input S,
//# {{power|Power}}
input VPB,
input VPWR,
input VGND,
input VNB
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__mux2i (
//# {{data|Data Signals}}
input A0,
input A1,
output Y,
//# {{control|Control Signals}}
input S
);
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__mux2i_1 (
Y,
A0,
A1,
S,
VPWR,
VGND,
VPB,
VNB
);
output Y;
input A0;
input A1;
input S;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__mux2i base (
.Y(Y),
.A0(A0),
.A1(A1),
.S(S),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__mux2i_1 (
Y,
A0,
A1,
S
);
output Y;
input A0;
input A1;
input S;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__mux2i base (
.Y (Y),
.A0(A0),
.A1(A1),
.S (S)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__mux2i_2 (
Y,
A0,
A1,
S,
VPWR,
VGND,
VPB,
VNB
);
output Y;
input A0;
input A1;
input S;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__mux2i base (
.Y(Y),
.A0(A0),
.A1(A1),
.S(S),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__mux2i_2 (
Y,
A0,
A1,
S
);
output Y;
input A0;
input A1;
input S;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__mux2i base (
.Y (Y),
.A0(A0),
.A1(A1),
.S (S)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__mux2i_4 (
Y,
A0,
A1,
S,
VPWR,
VGND,
VPB,
VNB
);
output Y;
input A0;
input A1;
input S;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__mux2i base (
.Y(Y),
.A0(A0),
.A1(A1),
.S(S),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__mux2i_4 (
Y,
A0,
A1,
S
);
output Y;
input A0;
input A1;
input S;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__mux2i base (
.Y (Y),
.A0(A0),
.A1(A1),
.S (S)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__mux2_1 (
X,
A0,
A1,
S,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A0;
input A1;
input S;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__mux2 base (
.X(X),
.A0(A0),
.A1(A1),
.S(S),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__mux2_1 (
X,
A0,
A1,
S
);
output X;
input A0;
input A1;
input S;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__mux2 base (
.X (X),
.A0(A0),
.A1(A1),
.S (S)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__mux2_2 (
X,
A0,
A1,
S,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A0;
input A1;
input S;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__mux2 base (
.X(X),
.A0(A0),
.A1(A1),
.S(S),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__mux2_2 (
X,
A0,
A1,
S
);
output X;
input A0;
input A1;
input S;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__mux2 base (
.X (X),
.A0(A0),
.A1(A1),
.S (S)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__mux2_4 (
X,
A0,
A1,
S,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A0;
input A1;
input S;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__mux2 base (
.X(X),
.A0(A0),
.A1(A1),
.S(S),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__mux2_4 (
X,
A0,
A1,
S
);
output X;
input A0;
input A1;
input S;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__mux2 base (
.X (X),
.A0(A0),
.A1(A1),
.S (S)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__mux2_8 (
X,
A0,
A1,
S,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A0;
input A1;
input S;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__mux2 base (
.X(X),
.A0(A0),
.A1(A1),
.S(S),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__mux2_8 (
X,
A0,
A1,
S
);
output X;
input A0;
input A1;
input S;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__mux2 base (
.X (X),
.A0(A0),
.A1(A1),
.S (S)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__mux4 (
X,
A0,
A1,
A2,
A3,
S0,
S1,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output X;
input A0;
input A1;
input A2;
input A3;
input S0;
input S1;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire mux_4to20_out_X;
wire pwrgood_pp0_out_X;
// Name Output Other arguments
sky130_fd_sc_hd__udp_mux_4to2 mux_4to20 (
mux_4to20_out_X,
A0,
A1,
A2,
A3,
S0,
S1
);
sky130_fd_sc_hd__udp_pwrgood_pp$PG pwrgood_pp0 (
pwrgood_pp0_out_X,
mux_4to20_out_X,
VPWR,
VGND
);
buf buf0 (X, pwrgood_pp0_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__mux4 (
X,
A0,
A1,
A2,
A3,
S0,
S1
);
// Module ports
output X;
input A0;
input A1;
input A2;
input A3;
input S0;
input S1;
// Module supplies
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
// Local signals
wire mux_4to20_out_X;
// Name Output Other arguments
sky130_fd_sc_hd__udp_mux_4to2 mux_4to20 (
mux_4to20_out_X,
A0,
A1,
A2,
A3,
S0,
S1
);
buf buf0 (X, mux_4to20_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__mux4 (
X,
A0,
A1,
A2,
A3,
S0,
S1
);
output X;
input A0;
input A1;
input A2;
input A3;
input S0;
input S1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__mux4 (
X,
A0,
A1,
A2,
A3,
S0,
S1,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output X;
input A0;
input A1;
input A2;
input A3;
input S0;
input S1;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire mux_4to20_out_X;
wire pwrgood_pp0_out_X;
// Name Output Other arguments
sky130_fd_sc_hd__udp_mux_4to2 mux_4to20 (
mux_4to20_out_X,
A0,
A1,
A2,
A3,
S0,
S1
);
sky130_fd_sc_hd__udp_pwrgood_pp$PG pwrgood_pp0 (
pwrgood_pp0_out_X,
mux_4to20_out_X,
VPWR,
VGND
);
buf buf0 (X, pwrgood_pp0_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__mux4 (
X,
A0,
A1,
A2,
A3,
S0,
S1
);
// Module ports
output X;
input A0;
input A1;
input A2;
input A3;
input S0;
input S1;
// Local signals
wire mux_4to20_out_X;
// Name Output Other arguments
sky130_fd_sc_hd__udp_mux_4to2 mux_4to20 (
mux_4to20_out_X,
A0,
A1,
A2,
A3,
S0,
S1
);
buf buf0 (X, mux_4to20_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__mux4 (
X,
A0,
A1,
A2,
A3,
S0,
S1,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A0;
input A1;
input A2;
input A3;
input S0;
input S1;
input VPWR;
input VGND;
input VPB;
input VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__mux4 (
//# {{data|Data Signals}}
input A0,
input A1,
input A2,
input A3,
output X,
//# {{control|Control Signals}}
input S0,
input S1,
//# {{power|Power}}
input VPB,
input VPWR,
input VGND,
input VNB
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__mux4 (
//# {{data|Data Signals}}
input A0,
input A1,
input A2,
input A3,
output X,
//# {{control|Control Signals}}
input S0,
input S1
);
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__mux4_1 (
X,
A0,
A1,
A2,
A3,
S0,
S1,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A0;
input A1;
input A2;
input A3;
input S0;
input S1;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__mux4 base (
.X(X),
.A0(A0),
.A1(A1),
.A2(A2),
.A3(A3),
.S0(S0),
.S1(S1),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__mux4_1 (
X,
A0,
A1,
A2,
A3,
S0,
S1
);
output X;
input A0;
input A1;
input A2;
input A3;
input S0;
input S1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__mux4 base (
.X (X),
.A0(A0),
.A1(A1),
.A2(A2),
.A3(A3),
.S0(S0),
.S1(S1)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__mux4_2 (
X,
A0,
A1,
A2,
A3,
S0,
S1,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A0;
input A1;
input A2;
input A3;
input S0;
input S1;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__mux4 base (
.X(X),
.A0(A0),
.A1(A1),
.A2(A2),
.A3(A3),
.S0(S0),
.S1(S1),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__mux4_2 (
X,
A0,
A1,
A2,
A3,
S0,
S1
);
output X;
input A0;
input A1;
input A2;
input A3;
input S0;
input S1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__mux4 base (
.X (X),
.A0(A0),
.A1(A1),
.A2(A2),
.A3(A3),
.S0(S0),
.S1(S1)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__mux4_4 (
X,
A0,
A1,
A2,
A3,
S0,
S1,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A0;
input A1;
input A2;
input A3;
input S0;
input S1;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__mux4 base (
.X(X),
.A0(A0),
.A1(A1),
.A2(A2),
.A3(A3),
.S0(S0),
.S1(S1),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__mux4_4 (
X,
A0,
A1,
A2,
A3,
S0,
S1
);
output X;
input A0;
input A1;
input A2;
input A3;
input S0;
input S1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__mux4 base (
.X (X),
.A0(A0),
.A1(A1),
.A2(A2),
.A3(A3),
.S0(S0),
.S1(S1)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__nand2 (
Y,
A,
B,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output Y;
input A;
input B;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire nand0_out_Y;
wire pwrgood_pp0_out_Y;
// Name Output Other arguments
nand nand0 (nand0_out_Y, B, A);
sky130_fd_sc_hd__udp_pwrgood_pp$PG pwrgood_pp0 (
pwrgood_pp0_out_Y,
nand0_out_Y,
VPWR,
VGND
);
buf buf0 (Y, pwrgood_pp0_out_Y);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__nand2 (
Y,
A,
B
);
// Module ports
output Y;
input A;
input B;
// Module supplies
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
// Local signals
wire nand0_out_Y;
// Name Output Other arguments
nand nand0 (nand0_out_Y, B, A);
buf buf0 (Y, nand0_out_Y);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__nand2 (
Y,
A,
B
);
output Y;
input A;
input B;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__nand2 (
Y,
A,
B,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output Y;
input A;
input B;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire nand0_out_Y;
wire pwrgood_pp0_out_Y;
// Name Output Other arguments
nand nand0 (nand0_out_Y, B, A);
sky130_fd_sc_hd__udp_pwrgood_pp$PG pwrgood_pp0 (
pwrgood_pp0_out_Y,
nand0_out_Y,
VPWR,
VGND
);
buf buf0 (Y, pwrgood_pp0_out_Y);
endmodule
| 7.212805 |
Subsets and Splits
No community queries yet
The top public SQL queries from the community will appear here once available.