| # place_pins positional arguments not supported | |
| Tool: Pin Placer | |
| Subcategory: Tool behavior issue | |
| ## Conversation | |
| ### TanjIsGray | |
| I see from chatter here that some folks use place_pins, but it seems not to work for me, with the error message showing in the title. My io.tcl is: | |
| ----- | |
| set leftPins {} | |
| foreach port [get_ports _l_*] { | |
| lappend leftPins [get_property $port name] | |
| } | |
| set_io_pin_constraint -region left:* -pin_names $leftPins | |
| set_io_pin_constraint -region right:* -pin_names { | |
| _r_h_in _r_g_in _r_f_in _r_e_rot25 _r_e_rot11 _r_e_rot06 _r_e_in | |
| _r_d_in _r_c_in _r_l_in _r_a_rot22 _r_a_rot13 _r_a_rot02 _r_a_in | |
| _r_KW0_in | |
| } | |
| set_io_pin_constraint -region top:* -pin_names { | |
| _t_aCarryIn0 _t_aCarryIn1 _t_aCpropIn | |
| _t_eCarryIn0 _t_eCarryIn1 _t_eCarryIn2 _t_eCpropIn | |
| } | |
| set_io_pin_constraint -region bottom:* -pin_names { | |
| _b_aCarryOut0 _b_aCarryOut1 _b_aCpropOut | |
| _b_eCarryOut0 _b_eCarryOut1 _b_eCarryOut2 _b_eCpropOut | |
| } | |
| place_pins -hor_layers metal4 -ver_layers metal5 -min_distance_in_tracks 4 | |
| --- | |
| which works fine until I added the place_pins command. | |
| I also used M4 and M5 for layer names (ASAP7) since those are what the openroad -gui viewer shows. | |
| Is this command blocked by something else? Is the track-multiplier not supported? | |
| Thanks! | |
| ### maliberty | |
| You might try the recent -annealing options. @eder-matheus any further comments? | |
| ### maliberty | |
| Would you include a screen shot of what you are seeing? Note that -min_distance means pin can be that close together at a minimum, not that they will necessarily be that close together if there is extra space available. | |
| ### eder-matheus | |
| @TanjIsGray Do you have a reproducible you can share regarding the minimum distance not being respected? We have a bunch of unit tests with different minimum distance values, and all seem to work properly. | |
| ### TanjIsGray | |
| I can share the source, make and tcl. These are not large, a few hundred lines of verilog. | |