text stringlengths 9 39.2M | dir stringlengths 25 226 | lang stringclasses 163
values | created_date timestamp[s] | updated_date timestamp[s] | repo_name stringclasses 751
values | repo_full_name stringclasses 752
values | star int64 1.01k 183k | len_tokens int64 1 18.5M |
|---|---|---|---|---|---|---|---|---|
```objective-c
/* arcv2_irq_unit.h - ARCv2 Interrupt Unit device driver */
/*
*
*/
#ifndef ZEPHYR_INCLUDE_ARCH_ARC_V2_ARCV2_IRQ_UNIT_H_
#define ZEPHYR_INCLUDE_ARCH_ARC_V2_ARCV2_IRQ_UNIT_H_
#ifdef __cplusplus
extern "C" {
#endif
/* configuration flags for interrupt unit */
#define _ARC_V2_INT_PRIO_MASK 0xf
#define... | /content/code_sandbox/include/zephyr/arch/arc/v2/arcv2_irq_unit.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,553 |
```linker script
/*
*
*/
#if DT_NODE_HAS_PROP(DT_INST(0, arc_xccm), reg) && \
(DT_REG_SIZE(DT_INST(0, arc_xccm)) > 0)
#define XCCM_START DT_REG_ADDR(DT_INST(0, arc_xccm))
#define XCCM_SIZE DT_REG_SIZE(DT_INST(0, arc_xccm))
#endif
#if DT_NODE_HAS_PROP(DT_INST(0, arc_yccm), reg) && \
(DT_REG_SIZE(DT_INST(0,... | /content/code_sandbox/include/zephyr/arch/arc/v2/xy_mem.ld | linker script | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 172 |
```objective-c
/*
*
*/
/**
* @file
* @brief ARCv2 public interrupt handling
*
* ARCv2 kernel interrupt handling interface. Included by arc/arch.h.
*/
#ifndef ZEPHYR_INCLUDE_ARCH_ARC_V2_IRQ_H_
#define ZEPHYR_INCLUDE_ARCH_ARC_V2_IRQ_H_
#include <zephyr/arch/arc/v2/aux_regs.h>
#include <zephyr/toolchain/common.h... | /content/code_sandbox/include/zephyr/arch/arc/v2/irq.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,491 |
```objective-c
/* asm_inline_gcc.h - ARC inline assembler and macros for public functions */
/*
*
*/
#ifndef ZEPHYR_INCLUDE_ARCH_ARC_V2_ASM_INLINE_GCC_H_
#define ZEPHYR_INCLUDE_ARCH_ARC_V2_ASM_INLINE_GCC_H_
#ifndef _ASMLANGUAGE
#include <zephyr/types.h>
#include <stddef.h>
#ifdef __cplusplus
extern "C" {
#endif
... | /content/code_sandbox/include/zephyr/arch/arc/v2/asm_inline_gcc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 140 |
```objective-c
/*
*
*/
/**
* @file
* @brief ARCv2 public kernel miscellaneous
*
* ARC-specific kernel miscellaneous interface. Included by arc/arch.h.
*/
#ifndef ZEPHYR_INCLUDE_ARCH_ARC_V2_MISC_H_
#define ZEPHYR_INCLUDE_ARCH_ARC_V2_MISC_H_
#ifdef __cplusplus
extern "C" {
#endif
#ifndef _ASMLANGUAGE
extern un... | /content/code_sandbox/include/zephyr/arch/arc/v2/misc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 183 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_ARCH_ARC_V2_SYS_IO_H_
#define ZEPHYR_INCLUDE_ARCH_ARC_V2_SYS_IO_H_
#ifndef _ASMLANGUAGE
#include <zephyr/toolchain.h>
#include <zephyr/sys/sys_io.h>
#include <zephyr/arch/arc/v2/aux_regs.h>
#include <zephyr/types.h>
#include <stddef.h>
#ifdef __cplusplus
extern "C" {... | /content/code_sandbox/include/zephyr/arch/arc/v2/sys_io.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 781 |
```objective-c
/* asm_inline.h - ARC inline assembler and macros for public functions */
/*
*
*/
#ifndef ZEPHYR_INCLUDE_ARCH_ARC_V2_ASM_INLINE_H_
#define ZEPHYR_INCLUDE_ARCH_ARC_V2_ASM_INLINE_H_
/*
* The file must not be included directly
* Include kernel.h instead
*/
#if defined(__GNUC__)
#include <zephyr/arc... | /content/code_sandbox/include/zephyr/arch/arc/v2/asm_inline.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 122 |
```objective-c
/*
*
*/
/**
* @file
* @brief ARCv2 public error handling
*
* ARC-specific kernel error handling interface. Included by arc/arch.h.
*/
#ifndef ZEPHYR_INCLUDE_ARCH_ARC_V2_ERROR_H_
#define ZEPHYR_INCLUDE_ARCH_ARC_V2_ERROR_H_
#include <zephyr/arch/arc/syscall.h>
#include <zephyr/arch/arc/v2/excepti... | /content/code_sandbox/include/zephyr/arch/arc/v2/error.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 250 |
```objective-c
/*
*
*/
/**
* @file
* @brief ARCv2 auxiliary registers definitions
*
*
* Definitions for auxiliary registers.
*/
#ifndef ZEPHYR_INCLUDE_ARCH_ARC_V2_AUX_REGS_H_
#define ZEPHYR_INCLUDE_ARCH_ARC_V2_AUX_REGS_H_
#include <zephyr/sys/util_macro.h>
#define _ARC_V2_LP_START 0x002
#define _ARC_V2_LP_E... | /content/code_sandbox/include/zephyr/arch/arc/v2/aux_regs.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 3,320 |
```linker script
/*
*
*/
/**
* @brief Common parts of the linker scripts for the ARCv2 targets for
* GNU and MWDT toolchains.
*/
#include <zephyr/linker/sections.h>
#include <zephyr/linker/linker-defs.h>
#include <zephyr/linker/linker-tool.h>
/* physical address of RAM */
#ifdef CONFIG_HARVARD
#define ROMABLE_... | /content/code_sandbox/include/zephyr/arch/arc/v2/linker.ld | linker script | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,520 |
```objective-c
/*
*
*/
/**
* @file
* @brief ARCv2 ARC Connect driver
*
* ARCv2 ARC Connect driver interface. Included by arc/arch.h.
*/
#ifndef ZEPHYR_INCLUDE_ARCH_ARC_V2_ARC_CONNECT_H_
#define ZEPHYR_INCLUDE_ARCH_ARC_V2_ARC_CONNECT_H_
#ifndef _ASMLANGUAGE
#include <zephyr/types.h>
#include <zephyr/arch/arc/v... | /content/code_sandbox/include/zephyr/arch/arc/v2/arc_connect.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,325 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_ARCH_ARC_V2_DSP_ARC_DSP_H_
#define ZEPHYR_INCLUDE_ARCH_ARC_V2_DSP_ARC_DSP_H_
/**
* @brief Disable dsp context preservation
*
* The function is used to disable the preservation of dsp
* and agu context registers for a particular thread.
*
* The @a options parameter ... | /content/code_sandbox/include/zephyr/arch/arc/v2/dsp/arc_dsp.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 250 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_ARCH_ARC_V2_SJLI_H
#define ZEPHYR_INCLUDE_ARCH_ARC_V2_SJLI_H
#define SJLI_CALL_ARC_SECURE 0
#define ARC_S_CALL_AUX_READ 0
#define ARC_S_CALL_AUX_WRITE 1
#define ARC_S_CALL_IRQ_ALLOC 2
#define ARC_S_CALL_CLRI 3
#define ARC_S_CALL_SETI 4
#define ARC_S_CALL_LIMIT 5... | /content/code_sandbox/include/zephyr/arch/arc/v2/secureshield/arc_secure.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,667 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_ARCH_ARC_V2_MPU_ARC_MPU_H_
#define ZEPHYR_INCLUDE_ARCH_ARC_V2_MPU_ARC_MPU_H_
#define AUX_MPU_ATTR_UE 0x008 /* allow user execution */
#define AUX_MPU_ATTR_UW 0x010 /* allow user write */
#define AUX_MPU_ATTR_UR 0x020 /* allow user read */
#define AUX_MPU_AT... | /content/code_sandbox/include/zephyr/arch/arc/v2/mpu/arc_mpu.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 958 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_ARCH_ARC_V2_MPU_ARC_CORE_MPU_H_
#define ZEPHYR_INCLUDE_ARCH_ARC_V2_MPU_ARC_CORE_MPU_H_
#ifdef __cplusplus
extern "C" {
#endif
/*
* The defines below represent the region types. The MPU driver is responsible
* to allocate the region accordingly to the type and set the ... | /content/code_sandbox/include/zephyr/arch/arc/v2/mpu/arc_core_mpu.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 652 |
```objective-c
/*
*
* ALU/Memory instructions pseudo-mnemonics for ARC64 ISA
*/
.macro MOVR, d, s
movl\&$suffix d, s
.endm
.macro LDR, d, s, off
.if $narg == 2
ldl\&$suffix d, [s]
.else
ldl\&$suffix d, [s, off]
.endif
.endm
.macro STR, d, s, off
.if $narg == 2
stl\&$suffix d, [s]
.else
stl\&$suf... | /content/code_sandbox/include/zephyr/arch/arc/asm-compat/asm-macro-64-bit-mwdt.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 512 |
```objective-c
/*
*
* ALU/Memory instructions pseudo-mnemonics for ARCv2 and ARC32 ISA
*/
.macro MOVR, d, s
mov\&$suffix d, s
.endm
.macro LDR, d, s, off
.if $narg == 2
ld\&$suffix d, [s]
.else
ld\&$suffix d, [s, off]
.endif
.endm
.macro STR, d, s, off
.if $narg == 2
st\&$suffix d, [s]
.else
st\... | /content/code_sandbox/include/zephyr/arch/arc/asm-compat/asm-macro-32-bit-mwdt.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 499 |
```objective-c
/*
*
* Author: Vineet Gupta <vgupta@synopsys.com>
*
* ALU/Memory instructions pseudo-mnemonics for ARCv2 and ARC32 ISA
*/
.irp cc,,.hi,.nz
.macro MOVR\cc d, s
mov\cc \d, \s
.endm
.endr
.irp aa,,.ab,.as,.aw
.macro LDR\aa d, s, off=0
ld\aa \d, [\s, \off]
.endm
.endr
.irp aa,,.ab,.as,.aw... | /content/code_sandbox/include/zephyr/arch/arc/asm-compat/asm-macro-32-bit-gnu.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 618 |
```objective-c
/*
*
* Author: Vineet Gupta <vgupta@synopsys.com>
*
* Top level include file providing ISA pseudo-mnemonics for use in assembler
* and inline assembly.
*
* - Helps code reuse across ARC64/ARC32/ARCv2
* e.g. "LDR" maps to 'LD' on 32-bit ISA, 'LDL' on 64-bit ARCv2/ARC64
*
* - Provides emulat... | /content/code_sandbox/include/zephyr/arch/arc/asm-compat/assembler.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 494 |
```objective-c
/*
*
* Author: Vineet Gupta <vgupta@synopsys.com>
*
* pseudo-mnemonics for ALU/Memory instructions for ARC64 ISA
*/
.irp cc,,.hi,.nz
.macro MOVR\cc d, s
movl\cc \d, \s
.endm
.endr
.irp aa,,.ab,.as,.aw
.macro LDR\aa d, s, off=0
ldl\aa \d, [\s, \off]
.endm
.endr
.irp aa,.ab,.as,.aw
.ma... | /content/code_sandbox/include/zephyr/arch/arc/asm-compat/asm-macro-64-bit-gnu.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 717 |
```yaml
archs:
- name: arc
path: arc
- name: arm
path: arm
- name: arm64
path: arm64
- name: mips
path: mips
- name: nios2
path: nios2
- name: posix
path: posix
- name: riscv
path: riscv
- name: sparc
path: sparc
- name: xtensa
path: xtensa
- name: x86
path: x... | /content/code_sandbox/arch/archs.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 131 |
```unknown
source "$(KCONFIG_BINARY_DIR)/arch/Kconfig"
``` | /content/code_sandbox/arch/Kconfig.v2 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 13 |
```objective-c
/*
*/
#ifndef ZEPHYR_INCLUDE_ZBUS_H_
#define ZEPHYR_INCLUDE_ZBUS_H_
#include <string.h>
#include <zephyr/kernel.h>
#include <zephyr/sys/iterable_sections.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Zbus API
* @defgroup zbus_apis Zbus APIs
* @ingroup os_services
* @{
*/
/**
* @brie... | /content/code_sandbox/include/zephyr/zbus/zbus.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 8,490 |
```unknown
# Note: $ARCH might be a glob pattern
source "$(ARCH_DIR)/$(ARCH)/Kconfig"
``` | /content/code_sandbox/arch/Kconfig.v1 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 24 |
```unknown
# General architecture configuration options
# Include these first so that any properties (e.g. defaults) below can be
# overridden (by defining symbols in multiple locations)
source "$(ARCH_DIR)/Kconfig.$(HWM_SCHEME)"
# ToDo: Generate a Kconfig.arch for loading of additional arch in HWMv2.
osource "$(KC... | /content/code_sandbox/arch/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 8,032 |
```c
/*
*
* based on arch/riscv/core/thread.c
*
*/
#include <zephyr/kernel.h>
extern uint32_t mips_cp0_status_int_mask;
void z_thread_entry(k_thread_entry_t thread,
void *arg1,
void *arg2,
void *arg3);
void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack,
char *stack... | /content/code_sandbox/arch/mips/core/thread.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 264 |
```unknown
#
#
# based on arch/riscv/Kconfig
#
#
menu "MIPS Options"
depends on MIPS
config ARCH
string
default "mips"
config GEN_ISR_TABLES
default y
config GEN_IRQ_VECTOR_TABLE
default n
config GEN_SW_ISR_TABLE
default y
config NUM_IRQS
int
# Bump the kernel default stack size values.
config MAIN_STACK_... | /content/code_sandbox/arch/mips/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 225 |
```c
/*
*
* based on arch/riscv/core/irq_offload.c
*
*/
#include <zephyr/kernel.h>
#include <zephyr/kernel_structs.h>
#include <kernel_internal.h>
#include <zephyr/irq.h>
#include <zephyr/irq_offload.h>
volatile irq_offload_routine_t _offload_routine;
static volatile const void *offload_param;
/*
* Called by z_... | /content/code_sandbox/arch/mips/core/irq_offload.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 247 |
```unknown
/*
*
* based on arch/riscv/core/swap.S
*
*/
#include <zephyr/toolchain.h>
#include <offsets_short.h>
#include <zephyr/arch/cpu.h>
#include <mips/regdef.h>
/*
* unsigned int arch_swap(unsigned int key)
*
* Always called with interrupts locked
* key is stored in a0 register
*/
GTEXT(arch_swap)
SECT... | /content/code_sandbox/arch/mips/core/swap.S | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 256 |
```c
/*
*
*/
/**
* @file
* @brief Full C support initialization
*/
#include <kernel_internal.h>
#include <zephyr/irq.h>
static void interrupt_init(void)
{
extern char __isr_vec[];
extern uint32_t mips_cp0_status_int_mask;
unsigned long ebase;
irq_lock();
mips_cp0_status_int_mask = 0;
ebase = 0x80000000... | /content/code_sandbox/arch/mips/core/prep_c.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 213 |
```c
/*
*
*/
#include <zephyr/irq.h>
#include <zephyr/tracing/tracing.h>
static ALWAYS_INLINE void mips_idle(unsigned int key)
{
sys_trace_idle();
/* unlock interrupts */
irq_unlock(key);
/* wait for interrupt */
__asm__ volatile("wait");
}
#ifndef CONFIG_ARCH_HAS_CUSTOM_CPU_IDLE
void arch_cpu_idle(void)
{... | /content/code_sandbox/arch/mips/core/cpu_idle.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 116 |
```unknown
/*
*
*/
#include <zephyr/toolchain.h>
#include <zephyr/linker/sections.h>
#include <mips/regdef.h>
#include <mips/mipsregs.h>
GTEXT(__initialize)
GTEXT(__stack)
GTEXT(z_prep_c)
/*
* Remainder of asm-land initialization code before we can jump into
* the C domain.
*/
SECTION_FUNC(TEXT, __initialize)
... | /content/code_sandbox/arch/mips/core/reset.S | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 318 |
```unknown
/*
*
* based on arch/riscv/core/isr.S and arch/nios2/core/exception.S
*
*/
#include <zephyr/toolchain.h>
#include <zephyr/kernel_structs.h>
#include <offsets_short.h>
#include <zephyr/arch/cpu.h>
#include <mips/regdef.h>
#include <mips/mipsregs.h>
#define ESF_O(FIELD) __struct_arch_esf_##FIELD##_OFFSE... | /content/code_sandbox/arch/mips/core/isr.S | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,269 |
```c
/*
*
*/
#include <zephyr/kernel.h>
#include <zephyr/logging/log.h>
LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL);
FUNC_NORETURN void z_mips_fatal_error(unsigned int reason,
const struct arch_esf *esf)
{
#ifdef CONFIG_EXCEPTION_DEBUG
if (esf != NULL) {
LOG_ERR("$ 0 : (ze) %08lx(at) %08lx(v... | /content/code_sandbox/arch/mips/core/fatal.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 790 |
```c
/*
*
* based on arch/nios2/core/irq_manage.c
*
*/
#include <zephyr/kernel.h>
#include <kswap.h>
#include <zephyr/logging/log.h>
LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL);
uint32_t mips_cp0_status_int_mask;
FUNC_NORETURN void z_irq_spurious(const void *unused)
{
unsigned long cause;
ARG_UNUSED(unu... | /content/code_sandbox/arch/mips/core/irq_manage.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 535 |
```objective-c
/*
*
* based on arch/riscv/include/kernel_arch_func.h
*
*/
/**
* @file
* @brief Private kernel definitions
*
* This file contains private kernel function/macro definitions and various
* other definitions for the MIPS processor architecture.
*/
#ifndef ZEPHYR_ARCH_MIPS_INCLUDE_KERNEL_ARCH_FUNC... | /content/code_sandbox/arch/mips/include/kernel_arch_func.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 240 |
```objective-c
/*
*
* based on arch/riscv/include/kernel_arch_data.h
*
*/
/**
* @file
* @brief Private kernel definitions
*
* This file contains private kernel structures definitions and various
* other definitions for the MIPS processor architecture.
*/
#ifndef ZEPHYR_ARCH_MIPS_INCLUDE_KERNEL_ARCH_DATA_H_
... | /content/code_sandbox/arch/mips/include/kernel_arch_data.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 180 |
```c
/*
*
* based on arch/riscv/core/offsets/offsets.c
*
*/
#include <kernel_arch_data.h>
#include <gen_offset.h>
#include <kernel_offsets.h>
GEN_OFFSET_SYM(_thread_arch_t, swap_return_value);
GEN_OFFSET_SYM(_callee_saved_t, sp);
GEN_OFFSET_SYM(_callee_saved_t, s0);
GEN_OFFSET_SYM(_callee_saved_t, s1);
GEN_OFFSE... | /content/code_sandbox/arch/mips/core/offsets/offsets.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 456 |
```objective-c
/*
*
* based on arch/riscv/include/offsets_short_arch.h
*
*/
#ifndef ZEPHYR_ARCH_MIPS_INCLUDE_OFFSETS_SHORT_ARCH_H_
#define ZEPHYR_ARCH_MIPS_INCLUDE_OFFSETS_SHORT_ARCH_H_
#include <zephyr/offsets.h>
#define _thread_offset_to_sp \
(___thread_t_callee_saved_OFFSET + ___callee_saved_t_sp_OFFSET)
#d... | /content/code_sandbox/arch/mips/include/offsets_short_arch.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 350 |
```objective-c
/*
*
* Macros for MIPS CP0 registers manipulations
* inspired by linux/arch/mips/include/asm/mipsregs.h
*
*/
#ifndef _ZEPHYR_ARCH_MIPS_INCLUDE_MIPS_MIPSREGS_H_
#define _ZEPHYR_ARCH_MIPS_INCLUDE_MIPS_MIPSREGS_H_
#define CP0_BADVADDR $8
#define CP0_COUNT $9
#define CP0_COMPARE $11
#define CP0_STATUS... | /content/code_sandbox/arch/mips/include/mips/mipsregs.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 444 |
```objective-c
/*
*
* Register names for o32 ABI, see [1] for details.
*
* [1] See MIPS Run (The Morgan Kaufmann Series in Computer
* Architecture and Design) 2nd Edition by Dominic Sweetman
*
*/
#ifndef ZEPHYR_ARCH_MIPS_INCLUDE_MIPS_REGDEF_H_
#define ZEPHYR_ARCH_MIPS_INCLUDE_MIPS_REGDEF_H_
/* always 0 */
... | /content/code_sandbox/arch/mips/include/mips/regdef.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 350 |
```c
/*
*
*/
/**
* @file Software interrupts utility code - ARM implementation
*/
#include <zephyr/kernel.h>
#include <zephyr/irq_offload.h>
#include <cmsis_core.h>
volatile irq_offload_routine_t offload_routine;
static const void *offload_param;
/* Called by z_arm_svc */
void z_irq_do_offload(void)
{
offload_... | /content/code_sandbox/arch/arm/core/irq_offload.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 267 |
```linker script
/*
*
*/
#if LINKER_ZEPHYR_FINAL && defined(CONFIG_ISR_TABLES_LOCAL_DECLARATION)
INCLUDE isr_tables_swi.ld
#endif
``` | /content/code_sandbox/arch/arm/core/swi_tables.ld | linker script | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 31 |
```linker script
/*
*
*/
#if defined(CONFIG_CPU_CORTEX_M_HAS_VTOR)
/*
* In an MCU with VTOR, the VTOR.TBLOFF is set to the start address of the
* exc_vector_table (i.e. _vector_start) during initialization. Therefore,
* exc_vector_table must respect the alignment requirements of VTOR.TBLOFF
* described below.
*... | /content/code_sandbox/arch/arm/core/vector_table.ld | linker script | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 513 |
```unknown
# ARM architecture configuration options
menu "ARM Options"
depends on ARM
config ARCH
default "arm"
config CPU_CORTEX
bool
help
This option signifies the use of a CPU of the Cortex family.
config ARM_CUSTOM_INTERRUPT_CONTROLLER
bool
help
This option indicates that the ARM CPU is connected t... | /content/code_sandbox/arch/arm/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,626 |
```unknown
# ARM architecture VFP configuration options
# Math coprocessor symbols; these should be selected by the CPU symbol to
# indicate that the CPU core can be configured with the specified
# coprocessor(s).
config CPU_HAS_VFP
bool
select CPU_HAS_FPU
imply FPU
imply FPU_SHARING
help
This option signifi... | /content/code_sandbox/arch/arm/core/Kconfig.vfp | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,425 |
```linker script
/*
*
*/
#if defined(CONFIG_ARM_ZIMAGE_HEADER)
KEEP(*(.image_header))
KEEP(*(.".image_header.*"))
__end = .;
#endif
``` | /content/code_sandbox/arch/arm/core/zimage_header.ld | linker script | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```c
/*
*
*/
/*
* @file
* @brief Basic C++ destructor module for globals for ARM
*/
#include <zephyr/toolchain.h>
EXTERN_C int __cxa_atexit(void (*destructor)(void *), void *objptr, void *dso);
/**
* @brief Register destructor for a global object
*
* @param objptr global object pointer
* @param destructor ... | /content/code_sandbox/arch/arm/core/__aeabi_atexit.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 154 |
```unknown
/*
*
*/
/**
* @file
* @brief Default basic NMI handler before the kernel is up
*
* Provide a default handler for NMI before the system is up. The default action
* is to hard hang, sleeping.
*
* This might be preferable than rebooting to help debugging, or because
* rebooting might trigger the exac... | /content/code_sandbox/arch/arm/core/nmi_on_reset.S | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 142 |
```c
/*
*
*/
#include <zephyr/kernel.h>
#include <zephyr/kernel_structs.h>
#include <kernel_internal.h>
#include <kernel_tls.h>
#include <zephyr/app_memory/app_memdomain.h>
#include <zephyr/sys/util.h>
#ifdef CONFIG_CPU_CORTEX_M
/*
* Since Cortex-M does not have the thread ID or process ID
* register needed to st... | /content/code_sandbox/arch/arm/core/tls.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 360 |
```c
/*
*
*/
#include <zephyr/kernel.h>
#include <kernel_internal.h>
#include <zephyr/arch/arm/gdbstub.h>
#include <zephyr/debug/gdbstub.h>
/* Position of each register in the packet - n-th register in the ctx.registers array needs to be
* the packet_pos[n]-th byte of the g (read all registers) packet. See struct ... | /content/code_sandbox/arch/arm/core/gdbstub.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,230 |
```unknown
/*
*
*/
#include <zephyr/linker/sections.h>
_ASM_FILE_PROLOGUE
SECTION_SUBSEC_FUNC(image_header,_image_header_section,_image_header)
#ifdef CONFIG_CPU_CORTEX_M
/*
* setting the _very_ early boot on the main stack allows to use memset
* on the interrupt stack when CONFIG_INIT_STACKS is enabled befor... | /content/code_sandbox/arch/arm/core/header.S | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 234 |
```unknown
/*
* Userspace and service handler hooks
*
*
*
*/
#include <zephyr/toolchain.h>
#include <zephyr/linker/sections.h>
#include <offsets_short.h>
#include <zephyr/syscall.h>
#include <zephyr/arch/arm/exception.h>
#if defined(CONFIG_CPU_AARCH32_CORTEX_R)
#include <zephyr/arch/cpu.h>
#endif
_ASM_FILE_PRO... | /content/code_sandbox/arch/arm/core/userspace.S | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 5,940 |
```c
/*
*
*/
#include <zephyr/llext/elf.h>
#include <zephyr/llext/llext.h>
#include <zephyr/logging/log.h>
#include <zephyr/sys/util.h>
LOG_MODULE_REGISTER(elf, CONFIG_LLEXT_LOG_LEVEL);
#define OPCODE2ARMMEM(x) ((uint32_t)(x))
#define OPCODE2THM16MEM(x) ((uint16_t)(x))
#define MEM2ARMOPCODE(x) OPCODE2ARMMEM(x)
#de... | /content/code_sandbox/arch/arm/core/elf.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 3,445 |
```c
/*
*
*/
/**
* @file
* @brief Kernel fatal error handler for ARM Cortex-M and Cortex-R
*
* This module provides the z_arm_fatal_error() routine for ARM Cortex-M
* and Cortex-R CPUs.
*/
#include <zephyr/kernel.h>
#include <kernel_arch_data.h>
#include <zephyr/logging/log.h>
LOG_MODULE_DECLARE(os, CONFIG_KE... | /content/code_sandbox/arch/arm/core/fatal.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,680 |
```unknown
# ARM core configuration options
config CPU_CORTEX_M
bool
select CPU_CORTEX
select ARCH_HAS_CUSTOM_SWAP_TO_MAIN
select HAS_CMSIS_CORE
select HAS_FLASH_LOAD_OFFSET
select ARCH_HAS_SINGLE_THREAD_SUPPORT
select ARCH_HAS_THREAD_ABORT
select ARCH_HAS_TRUSTED_EXECUTION if ARM_TRUSTZONE_M
select ARCH_HAS... | /content/code_sandbox/arch/arm/core/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,707 |
```c
/*
*
*/
/**
* @file
* @brief NMI handler infrastructure
*
* Provides a boot time handler that simply hangs in a sleep loop, and a run
* time handler that resets the CPU. Also provides a mechanism for hooking a
* custom run time handler.
*/
#include <zephyr/kernel.h>
#include <zephyr/arch/cpu.h>
#include... | /content/code_sandbox/arch/arm/core/nmi.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 319 |
```c
/*
*
*/
#include <gen_offset.h>
#include "offsets_aarch32.c"
GEN_ABS_SYM_END
``` | /content/code_sandbox/arch/arm/core/offsets/offsets.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 24 |
```c
/*
*
*/
/**
* @file
* @brief Cache manipulation
*
* This module contains functions for manipulation caches.
*/
#include <zephyr/arch/cpu.h>
#include <zephyr/cache.h>
#include <cmsis_core.h>
void arch_dcache_enable(void)
{
SCB_EnableDCache();
}
void arch_dcache_disable(void)
{
SCB_DisableDCache();
}
in... | /content/code_sandbox/arch/arm/core/cortex_m/cache.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 434 |
```c
/*
*
*/
/**
* @file
* @brief ARM kernel structure member offset definition file
*
* This module is responsible for the generation of the absolute symbols whose
* value represents the member offsets for various ARM kernel structures.
*
* All of the absolute symbols defined by this module will be present i... | /content/code_sandbox/arch/arm/core/offsets/offsets_aarch32.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 699 |
```c
/*
*
*/
#include <zephyr/kernel.h>
#include <cmsis_core.h>
#include <zephyr/arch/arm/cortex_m/fpu.h>
/**
* @file @brief Helper functions for saving and restoring the FP context.
*
*/
void z_arm_save_fp_context(struct fpu_ctx_full *buffer)
{
#if defined(CONFIG_FPU_SHARING)
__ASSERT_NO_MSG(buffer != NULL);
... | /content/code_sandbox/arch/arm/core/cortex_m/fpu.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 437 |
```c
/*
*
*/
/**
* @file
* @brief ARM Cortex-M interrupt initialization
*
*/
#include <zephyr/arch/cpu.h>
#include <cmsis_core.h>
/**
*
* @brief Initialize interrupts
*
* Ensures all interrupts have their priority set to _EXC_IRQ_DEFAULT_PRIO and
* not 0, which they have it set to when coming out of reset... | /content/code_sandbox/arch/arm/core/cortex_m/irq_init.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 144 |
```unknown
/*
*
*/
/**
* @file
* @brief ARM Cortex-M suspend-to-RAM code (S2RAM)
*/
#include <zephyr/toolchain.h>
#include <offsets_short.h>
#include <zephyr/arch/cpu.h>
#include <zephyr/arch/common/pm_s2ram.h>
_ASM_FILE_PROLOGUE
GTEXT(pm_s2ram_mark_set)
GTEXT(pm_s2ram_mark_check_and_clear)
GDATA(_cpu_context)... | /content/code_sandbox/arch/arm/core/cortex_m/pm_s2ram.S | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,001 |
```c
/*
*
*/
/**
* @file
* @brief New thread creation for ARM Cortex-M
*
* Core thread related primitives for the ARM Cortex-M
* processor architecture.
*/
#include <zephyr/kernel.h>
#include <zephyr/llext/symbol.h>
#include <ksched.h>
#include <zephyr/sys/barrier.h>
#include <stdbool.h>
#include <cmsis_core.... | /content/code_sandbox/arch/arm/core/cortex_m/thread.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 5,529 |
```c
/*
*
*/
#include <zephyr/arch/cpu.h>
#include <zephyr/linker/sections.h>
#include <zephyr/arch/common/pm_s2ram.h>
#define MAGIC (0xDABBAD00)
/**
* CPU context for S2RAM
*/
__noinit _cpu_context_t _cpu_context;
#ifndef CONFIG_PM_S2RAM_CUSTOM_MARKING
/**
* S2RAM Marker
*/
static __noinit uint32_t marker;
... | /content/code_sandbox/arch/arm/core/cortex_m/pm_s2ram.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 159 |
```c
/*
*
*/
#include <string.h>
#include <zephyr/debug/coredump.h>
#define ARCH_HDR_VER 2
uint32_t z_arm_coredump_fault_sp;
struct arm_arch_block {
struct {
uint32_t r0;
uint32_t r1;
uint32_t r2;
uint32_t r3;
uint32_t r12;
uint32_t lr;
uint32_t pc;
uint32_t xpsr;
uint32_t sp;
/* callee re... | /content/code_sandbox/arch/arm/core/cortex_m/coredump.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 739 |
```c
/*
*
*/
/**
* @file
* @brief ARM Cortex-M k_thread_abort() routine
*
* The ARM Cortex-M architecture provides its own k_thread_abort() to deal
* with different CPU modes (handler vs thread) when a thread aborts. When its
* entry point returns or when it aborts itself, the CPU is in thread mode and
* must... | /content/code_sandbox/arch/arm/core/cortex_m/thread_abort.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 438 |
```linker script
/*
*
*/
#if defined(CONFIG_CPU_CORTEX_M_HAS_VTOR)
/*
* In an MCU with VTOR, the VTOR.TBLOFF is set to the start address of the
* vector_relay_table, when building with support for interrupt relaying.
* Therefore, vector_relay_table must respect the alignment requirements
* of VTOR.TBLOFF describ... | /content/code_sandbox/arch/arm/core/cortex_m/relay_vector_table.ld | linker script | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 287 |
```linker script
/*
*/
/* Copied from linker.ld */
/* Reserved 4 bytes to save vector table base address */
SECTION_PROLOGUE(.vt_pointer,(NOLOAD),)
{
*(.vt_pointer_section)
*(".vt_pointer_section.*")
} GROUP_LINK_IN(RAMABLE_REGION)
``` | /content/code_sandbox/arch/arm/core/cortex_m/vt_pointer_section.ld | linker script | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 62 |
```unknown
/*
*
*/
/**
* @file irq_relay.S
*
* @brief IRQ relay vector table and relay handler for Cortex-M0 or
* Armv8-M baseline SoCs
*
* In certain ARMv6-M and Armv8-M baseline cores the vector table address can
* not be changed. Once the * vector table is occupied by bootloader, there
* will be no... | /content/code_sandbox/arch/arm/core/cortex_m/irq_relay.S | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 542 |
```c
/*
*
*/
/**
* @file
* @brief Common fault handler for ARM Cortex-M
*
* Common fault handler for ARM Cortex-M processors.
*/
#include <zephyr/kernel.h>
#include <kernel_internal.h>
#include <inttypes.h>
#include <zephyr/arch/common/exc_handle.h>
#include <zephyr/linker/linker-defs.h>
#include <zephyr/loggi... | /content/code_sandbox/arch/arm/core/cortex_m/fault.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 10,615 |
```c
/*
*
*/
/**
* @file
* @brief Full C support initialization
*
*
* Initialization of full C support: zero the .bss, copy the .data if XIP,
* call z_cstart().
*
* Stack is available in this module, but not the global data/bss until their
* initialization is performed.
*/
#include <zephyr/kernel.h>
#incl... | /content/code_sandbox/arch/arm/core/cortex_m/prep_c.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,493 |
```linker script
/*
*
*/
/*
* Padding inserted after the (first-stage) vector table, so that the
* Zephyr image does not attempt to use the area which we reserve to
* detect null pointer dereferencing (0x0 - <size>). If the end of the
* vector table section is higher than the upper end of the reserved
* area, w... | /content/code_sandbox/arch/arm/core/cortex_m/vector_table_pad.ld | linker script | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 157 |
```c
/*
*
*/
/**
* @file
* @brief ARM Cortex-M power management
*/
#include <zephyr/kernel.h>
#include <cmsis_core.h>
#if defined(CONFIG_ARM_ON_EXIT_CPU_IDLE)
#include <soc_cpu_idle.h>
#endif
/**
* @brief Initialization of CPU idle
*
* Only called by arch_kernel_init(). Sets SEVONPEND bit once for the system... | /content/code_sandbox/arch/arm/core/cortex_m/cpu_idle.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 852 |
```c
/*
*
*/
/**
* @file
* @brief ARM Cortex-M exception/interrupt exit API
*
* Provides functions for performing kernel handling when exiting exceptions or
* interrupts that are installed directly in the vector table (i.e. that are not
* wrapped around by _isr_wrapper()).
*/
#include <zephyr/kernel.h>
#incl... | /content/code_sandbox/arch/arm/core/cortex_m/exc_exit.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 445 |
```c
/*
*
*/
#include <zephyr/kernel.h>
#include <kernel_internal.h>
#include <errno.h>
/* The 'key' actually represents the BASEPRI register
* prior to disabling interrupts via the BASEPRI mechanism.
*
* arch_swap() itself does not do much.
*
* It simply stores the intlock key (the BASEPRI value) parameter i... | /content/code_sandbox/arch/arm/core/cortex_m/swap.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 917 |
```c
/*
*
*/
/**
* @file
* @brief ARM Cortex-M Timing functions interface based on DWT
*
*/
#include <zephyr/init.h>
#include <zephyr/kernel.h>
#include <zephyr/timing/timing.h>
#include <cortex_m/dwt.h>
#include <cmsis_core.h>
#include <zephyr/sys_clock.h>
/**
* @brief Return the current frequency of the cyc... | /content/code_sandbox/arch/arm/core/cortex_m/timing.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 748 |
```objective-c
/*
*
*/
/**
* @file
* @brief Definitions for the boot vector table
*
*
* Definitions for the boot vector table.
*
* System exception handler names all have the same format:
*
* __<exception name with underscores>
*
* No other symbol has the same format, so they are easy to spot.
*/
#ifn... | /content/code_sandbox/arch/arm/core/cortex_m/vector_table.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 387 |
```c
/*
*
*/
/**
* @file
* @brief ARM Cortex-M System Control Block interface
*
*
* Most of the SCB interface consists of simple bit-flipping methods, and is
* implemented as inline functions in scb.h. This module thus contains only data
* definitions and more complex routines, if needed.
*/
#include <zephy... | /content/code_sandbox/arch/arm/core/cortex_m/scb.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 921 |
```unknown
/*
*
*/
/**
* @file
* @brief Populated vector table in ROM
*
* Vector table at the beginning of the image for starting system. The reset
* vector is the system entry point, ie. the first instruction executed.
*
* The table is populated with all the system exception handlers. The NMI vector
* must ... | /content/code_sandbox/arch/arm/core/cortex_m/vector_table.S | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 613 |
```unknown
/*
*
*/
/**
* @file
* @brief Thread context switching for ARM Cortex-M
*
* This module implements the routines necessary for thread context switching
* on ARM Cortex-M CPUs.
*/
#include <zephyr/toolchain.h>
#include <zephyr/linker/sections.h>
#include <offsets_short.h>
#include <zephyr/arch/cpu.h>
... | /content/code_sandbox/arch/arm/core/cortex_m/swap_helper.S | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 3,638 |
```c
/*
*
*/
/**
* @file
* @brief ARM Cortex-M wrapper for ISRs with parameter
*
* Wrapper installed in vector table for handling dynamic interrupts that accept
* a parameter.
*/
#include <zephyr/kernel.h>
#include <zephyr/irq.h>
#include <zephyr/pm/pm.h>
#include <cmsis_core.h>
/**
*
* @brief Wrapper aroun... | /content/code_sandbox/arch/arm/core/cortex_m/isr_wrapper.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 560 |
```unknown
/*
*
*/
/**
* @file
* @brief Fault handlers for ARM Cortex-M
*
* Fault handlers for ARM Cortex-M processors.
*/
#include <zephyr/toolchain.h>
#include <zephyr/linker/sections.h>
_ASM_FILE_PROLOGUE
GTEXT(z_arm_fault)
GTEXT(z_arm_hard_fault)
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
/* HardFault... | /content/code_sandbox/arch/arm/core/cortex_m/fault_s.S | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 819 |
```c
/*
*
*/
/**
* @file
* @brief ARM Cortex-M debug monitor functions interface based on DWT
*
*/
#include <zephyr/kernel.h>
#include <zephyr/device.h>
#include <cortex_m/dwt.h>
/**
* @brief Assess whether a debug monitor event should be treated as an error
*
* This routine checks the status of a debug mon... | /content/code_sandbox/arch/arm/core/cortex_m/debug.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 991 |
```c
/*
* Organisation (CSIRO) ABN 41 687 119 230.
*
*/
#include <zephyr/arch/common/semihost.h>
long semihost_exec(enum semihost_instr instr, void *args)
{
register unsigned int r0 __asm__ ("r0") = instr;
register void *r1 __asm__ ("r1") = args;
register int ret __asm__ ("r0");
__asm__ __volatile__ ("bkpt 0x... | /content/code_sandbox/arch/arm/core/cortex_m/semihost.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 133 |
```unknown
/*
*
*/
/**
* @file
* @brief Reset handler
*
* Reset handler that prepares the system for running C code.
*/
#include <zephyr/toolchain.h>
#include <zephyr/linker/sections.h>
#include <zephyr/arch/cpu.h>
#include "vector_table.h"
_ASM_FILE_PROLOGUE
GTEXT(z_arm_reset)
GTEXT(z_early_memset)
GDATA(z_... | /content/code_sandbox/arch/arm/core/cortex_m/reset.S | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,270 |
```unknown
# ARM Cortex-M platform configuration options
# NOTE: We have the specific core implementations first and outside of the
# if CPU_CORTEX_M block so that SoCs can select which core they are using
# without having to select all the options related to that core. Everything
# else is captured inside the if CP... | /content/code_sandbox/arch/arm/core/cortex_m/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 3,945 |
```unknown
/*
*
*/
#include <zephyr/toolchain.h>
_ASM_FILE_PROLOGUE
GTEXT(__aeabi_read_tp)
GDATA(z_arm_tls_ptr)
/* Grab the TLS pointer and store in R0.
* According to the Run-Time ABI for the Arm Architecture section 5.3.5, this
* function may only clobber r0, ip, lr & CPSR.
*
* This can only be guaranteed ... | /content/code_sandbox/arch/arm/core/cortex_m/__aeabi_read_tp.S | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 141 |
```c
/*
*
*/
/**
* @file
* @brief ARM Cortex-M interrupt management
*
*
* Interrupt management: enabling/disabling and dynamic ISR
* connecting/replacing. SW_ISR_TABLE_DYNAMIC has to be enabled for
* connecting ISRs at runtime.
*/
#include <zephyr/kernel.h>
#include <zephyr/arch/cpu.h>
#include <cmsis_core... | /content/code_sandbox/arch/arm/core/cortex_m/irq_manage.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,945 |
```c
/*
*
*/
#include <zephyr/kernel.h>
#include <cortex_m/cmse.h>
int arm_cmse_mpu_region_get(uint32_t addr)
{
cmse_address_info_t addr_info = cmse_TT((void *)addr);
if (addr_info.flags.mpu_region_valid) {
return addr_info.flags.mpu_region;
}
return -EINVAL;
}
static int arm_cmse_addr_read_write_ok(uint32... | /content/code_sandbox/arch/arm/core/cortex_m/cmse/arm_core_cmse.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,095 |
```linker script
/*
*
*/
/* nRF-specific defines. */
#if defined(CONFIG_CPU_HAS_NRF_IDAU) && CONFIG_ARM_NSC_REGION_BASE_ADDRESS == 0
/* This SOC needs the NSC region to be at the end of an SPU region. */
#define __NSC_ALIGN (ALIGN(CONFIG_NRF_SPU_FLASH_REGION_SIZE) \
- MAX(32, (1 << LOG2CEIL(__sg_size))))
#defi... | /content/code_sandbox/arch/arm/core/cortex_m/tz/secure_entry_functions.ld | linker script | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 514 |
```unknown
# ARM TrustZone-M core configuration options
config ARM_TRUSTZONE_M
bool "ARM TrustZone-M support"
depends on CPU_HAS_TEE
depends on ARMV8_M_SE
help
Platform has support for ARM TrustZone-M.
if ARM_TRUSTZONE_M
menu "ARM TrustZone-M Options"
depends on ARM_SECURE_FIRMWARE || ARM_NONSECURE_FIRMWARE
... | /content/code_sandbox/arch/arm/core/cortex_m/tz/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 573 |
```objective-c
/*
* ARMv7 MMU support
*
* Private data declarations
*
*/
#ifndef ZEPHYR_ARCH_AARCH32_ARM_MMU_PRIV_H_
#define ZEPHYR_ARCH_AARCH32_ARM_MMU_PRIV_H_
/*
* Comp.:
* ARM Architecture Reference Manual, ARMv7-A and ARMv7-R edition
* ARM document ID DDI0406C Rev. d, March 2018
* L1 / L2 page table entr... | /content/code_sandbox/arch/arm/core/mmu/arm_mmu_priv.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,046 |
```unknown
#
# ARMv7 Memory Management Unit (MMU) configuration options
#
#
if CPU_HAS_MMU
config ARM_AARCH32_MMU
bool "ARMv7 Cortex-A MMU Support"
default y if CPU_AARCH32_CORTEX_A
select MMU
select SRAM_REGION_PERMISSIONS
select THREAD_STACK_INFO
select ARCH_HAS_EXECUTABLE_PAGE_BIT
help
The current CPU ha... | /content/code_sandbox/arch/arm/core/mmu/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 206 |
```c
/*
*
*/
/**
* @file
* @brief Cortex-A/R AArch32 L1-cache maintenance operations.
*
* This module implement the cache API for Cortex-A/R AArch32 cores using CMSIS.
* Only L1-cache maintenance operations is supported.
*/
#include <zephyr/kernel.h>
#include <zephyr/cache.h>
#include <cmsis_core.h>
#include ... | /content/code_sandbox/arch/arm/core/cortex_a_r/cache.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,137 |
```unknown
/*
*/
/**
* @file
* @brief Thread context switching for ARM Cortex-A and Cortex-R (AArch32)
*
* This module implements the routines necessary for thread context switching
* on ARM Cortex-A and Cortex-R CPUs.
*/
#include <zephyr/toolchain.h>
#include <zephyr/linker/sections.h>
#include <zephyr/arch/c... | /content/code_sandbox/arch/arm/core/cortex_a_r/switch.S | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,095 |
```c
/*
*
*/
#include <zephyr/kernel.h>
#include <cmsis_core.h>
void z_arm_tcm_disable_ecc(void)
{
#if defined(CONFIG_ARMV7_R)
uint32_t actlr;
actlr = __get_ACTLR();
actlr &= ~(ACTLR_ATCMPCEN_Msk | ACTLR_B0TCMPCEN_Msk |
ACTLR_B1TCMPCEN_Msk);
__set_ACTLR(actlr);
#endif
}
``` | /content/code_sandbox/arch/arm/core/cortex_a_r/tcm.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 97 |
```c
/*
*
*/
/**
* @file
* @brief ARM Cortex-A and Cortex-R interrupt initialization
*/
#include <zephyr/arch/cpu.h>
#include <zephyr/drivers/interrupt_controller/gic.h>
/**
*
* @brief Initialize interrupts
*
*/
void z_arm_interrupt_init(void)
{
/*
* Initialise interrupt controller.
*/
#ifdef CONFIG_AR... | /content/code_sandbox/arch/arm/core/cortex_a_r/irq_init.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 98 |
```c
/*
*
*/
#include <zephyr/kernel.h>
#include <kernel_internal.h>
#include <zephyr/arch/common/exc_handle.h>
#include <zephyr/logging/log.h>
#if defined(CONFIG_GDBSTUB)
#include <zephyr/arch/arm/gdbstub.h>
#include <zephyr/debug/gdbstub.h>
#endif
LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL);
#define FAULT_DU... | /content/code_sandbox/arch/arm/core/cortex_a_r/fault.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,762 |
```objective-c
/*
*/
/**
* @file
* @brief Definitions for boot code
*/
#ifndef _BOOT_H_
#define _BOOT_H_
#ifndef _ASMLANGUAGE
extern void *_vector_table[];
extern void __start(void);
#endif /* _ASMLANGUAGE */
/* Offsets into the boot_params structure */
#define BOOT_PARAM_MPID_OFFSET 0
#define BOOT_PARAM_IRQ... | /content/code_sandbox/arch/arm/core/cortex_a_r/boot.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 146 |
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