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defines
#define HDMI_AUDIO_FIFO_MAX_WATER_MARK 8
defines
#define HDMI_AUDIO_PKT_CTRL 0x0020
defines
#define HDMI_AUDIO_SAMPLE_SEND_ENABLE 1
defines
#define IEEE_REGISTRATION_ID 0xC03
defines
#define IFRAME_CHECKSUM_32(d) \
defines
#define GET_RES(name, mode) do { \
defines
#define IO_REMAP(var, name) do { \
defines
#define GET_IRQ(var, name) do { \
structs
struct hdmi_msm_audio_acr { uint32 n; /* N parameter for clock regeneration */ uint32 cts; /* CTS parameter for clock regeneration */ };
structs
struct hdmi_msm_audio_arcs { uint32 pclk; struct hdmi_msm_audio_acr lut[MSM_HDMI_SAMPLE_RATE_MAX]; };
functions
void hdmi_msm_cec_init(void) { /* 0x02A8 CEC_REFTIMER */ HDMI_OUTP(0x02A8, HDMI_MSM_CEC_REFTIMER_REFTIMER_ENABLE | HDMI_MSM_CEC_REFTIMER_REFTIMER(27 * 50) ); /* * 0x02A0 CEC_ADDR * Starting with a default address of 4 */ HDMI_OUTP(0x02A0, HDMI_MSM_CEC_ADDR_LOGICAL_ADDR(4)); hdmi_msm_state->first_monitor = 0; hdmi_msm_state->fsm_reset_done = false; /* 0x029C CEC_INT */ /* Enable CEC interrupts */ HDMI_OUTP(0x029C, \ HDMI_MSM_CEC_INT_FRAME_WR_DONE_MASK \ | HDMI_MSM_CEC_INT_FRAME_ERROR_MASK \ | HDMI_MSM_CEC_INT_MONITOR_MASK \ | HDMI_MSM_CEC_INT_FRAME_RD_DONE_MASK); HDMI_OUTP(0x02B0, 0x7FF << 4 | 1); /* * Slight adjustment to logic 1 low periods on read, * CEC Test 8.2-3 was failing, 8 for the * BIT_1_ERR_RANGE_HI = 8 => 750us, the test used 775us, * so increased this to 9 which => 800us. */ /* * CEC latch up issue - To fire monitor interrupt * for every start of message */ HDMI_OUTP(0x02E0, 0x880000); /* * Slight adjustment to logic 0 low period on write */ HDMI_OUTP(0x02DC, 0x8888A888); /* * Enable Signal Free Time counter and set to 7 bit periods */ HDMI_OUTP(0x02A4, 0x1 | (7 * 0x30) << 7); /* 0x028C CEC_CTRL */ HDMI_OUTP(0x028C, HDMI_MSM_CEC_CTRL_ENABLE); }
functions
void hdmi_msm_cec_write_logical_addr(int addr) { /* 0x02A0 CEC_ADDR * LOGICAL_ADDR 7:0 NUM */ HDMI_OUTP(0x02A0, addr & 0xFF); }
functions
void hdmi_msm_dump_cec_msg(struct hdmi_msm_cec_msg *msg) { #ifdef CEC_MSG_PRINT int i; DEV_DBG("sender_id : %d", msg->sender_id); DEV_DBG("recvr_id : %d", msg->recvr_id); if (msg->frame_size < 2) { DEV_DBG("polling message"); return; }
functions
void hdmi_msm_cec_msg_send(struct hdmi_msm_cec_msg *msg) { int i; uint32 timeout_count = 1; int retry = 10; boolean frameType = (msg->recvr_id == 15 ? BIT(0) : 0); mutex_lock(&hdmi_msm_state_mutex); hdmi_msm_state->fsm_reset_done = false; mutex_unlock(&hdmi_msm_state_mutex); #ifdef TOGGLE_CEC_HARDWARE_FSM msg_send_complete = FALSE; #endif INIT_COMPLETION(hdmi_msm_state->cec_frame_wr_done); hdmi_msm_state->cec_frame_wr_status = 0; /* 0x0294 HDMI_MSM_CEC_RETRANSMIT */ HDMI_OUTP(0x0294, #ifdef DRVR_ONLY_CECT_NO_DAEMON HDMI_MSM_CEC_RETRANSMIT_NUM(msg->retransmit) | (msg->retransmit > 0) ? HDMI_MSM_CEC_RETRANSMIT_ENABLE : 0); #else HDMI_MSM_CEC_RETRANSMIT_NUM(0) | HDMI_MSM_CEC_RETRANSMIT_ENABLE); #endif /* 0x028C CEC_CTRL */ HDMI_OUTP(0x028C, 0x1 | msg->frame_size << 4); /* 0x0290 CEC_WR_DATA */ /* header block */ HDMI_OUTP(0x0290, HDMI_MSM_CEC_WR_DATA_DATA(msg->sender_id << 4 | msg->recvr_id) | frameType); /* data block 0 : opcode */ HDMI_OUTP(0x0290, HDMI_MSM_CEC_WR_DATA_DATA(msg->frame_size < 2 ? 0 : msg->opcode) | frameType); /* data block 1-14 : operand 0-13 */ for (i = 0; i < msg->frame_size - 1; i++) HDMI_OUTP(0x0290, HDMI_MSM_CEC_WR_DATA_DATA(msg->operand[i]) | (msg->recvr_id == 15 ? BIT(0) : 0)); for (; i < 14; i++) HDMI_OUTP(0x0290, HDMI_MSM_CEC_WR_DATA_DATA(0) | (msg->recvr_id == 15 ? BIT(0) : 0)); while ((HDMI_INP(0x0298) & 1) && retry--) { DEV_DBG("CEC line is busy(%d)\n", retry); schedule(); }
functions
TOGGLE_CEC_HARDWARE_FSM if (!msg_recv_complete) { /* Toggle CEC hardware FSM */ HDMI_OUTP(0x028C, 0x0); HDMI_OUTP(0x028C, HDMI_MSM_CEC_CTRL_ENABLE); msg_recv_complete = TRUE; }
functions
void hdmi_msm_cec_line_latch_detect(void) { /* * CECT 9-5-1 * The timer period needs to be changed to appropriate value */ /* * Timedout without RD_DONE, WR_DONE or ERR_INT * Toggle CEC hardware FSM */ mutex_lock(&hdmi_msm_state_mutex); if (hdmi_msm_state->first_monitor == 1) { DEV_WARN("CEC line is probably latched up - CECT 9-5-1"); if (!msg_recv_complete) hdmi_msm_state->fsm_reset_done = true; HDMI_OUTP(0x028C, 0x0); HDMI_OUTP(0x028C, HDMI_MSM_CEC_CTRL_ENABLE); hdmi_msm_state->first_monitor = 0; }
functions
void hdmi_msm_cec_msg_recv(void) { uint32 data; int i; #ifdef DRVR_ONLY_CECT_NO_DAEMON struct hdmi_msm_cec_msg temp_msg; #endif mutex_lock(&hdmi_msm_state_mutex); if (hdmi_msm_state->cec_queue_wr == hdmi_msm_state->cec_queue_rd && hdmi_msm_state->cec_queue_full) { mutex_unlock(&hdmi_msm_state_mutex); DEV_ERR("CEC message queue is overflowing\n"); #ifdef DRVR_ONLY_CECT_NO_DAEMON /* * Without CEC daemon: * Compliance tests fail once the queue gets filled up. * so reset the pointers to the start of the queue. */ hdmi_msm_state->cec_queue_wr = hdmi_msm_state->cec_queue_start; hdmi_msm_state->cec_queue_rd = hdmi_msm_state->cec_queue_start; hdmi_msm_state->cec_queue_full = false; #else return; #endif }
functions
else if (hdmi_msm_state->cec_queue_wr->frame_size == 1) { DEV_DBG("%s: polling message (dest[%x] <- init[%x])", __func__, hdmi_msm_state->cec_queue_wr->recvr_id, hdmi_msm_state->cec_queue_wr->sender_id); return; }
functions
DRVR_ONLY_CECT_NO_DAEMON switch (hdmi_msm_state->cec_queue_wr->opcode) { case 0x64: /* Set OSD String */ DEV_INFO("Recvd OSD Str=[%x]\n",\ hdmi_msm_state->cec_queue_wr->operand[3]); break; case 0x83: /* Give Phy Addr */ DEV_INFO("Recvd a Give Phy Addr cmd\n"); memset(&temp_msg, 0x00, sizeof(struct hdmi_msm_cec_msg)); /* Setup a frame for sending out phy addr */ temp_msg.sender_id = 0x4; /* Broadcast */ temp_msg.recvr_id = 0xf; temp_msg.opcode = 0x84; i = 0; temp_msg.operand[i++] = 0x10; temp_msg.operand[i++] = 0x00; temp_msg.operand[i++] = 0x04; temp_msg.frame_size = i + 2; hdmi_msm_cec_msg_send(&temp_msg); break; case 0xFF: /* Abort */ DEV_INFO("Recvd an abort cmd 0xFF\n"); memset(&temp_msg, 0x00, sizeof(struct hdmi_msm_cec_msg)); temp_msg.sender_id = 0x4; temp_msg.recvr_id = hdmi_msm_state->cec_queue_wr->sender_id; i = 0; /*feature abort */ temp_msg.opcode = 0x00; temp_msg.operand[i++] = hdmi_msm_state->cec_queue_wr->opcode; /*reason for abort = "Refused" */ temp_msg.operand[i++] = 0x04; temp_msg.frame_size = i + 2; hdmi_msm_dump_cec_msg(&temp_msg); hdmi_msm_cec_msg_send(&temp_msg); break; case 0x046: /* Give OSD name */ DEV_INFO("Recvd cmd 0x046\n"); memset(&temp_msg, 0x00, sizeof(struct hdmi_msm_cec_msg)); temp_msg.sender_id = 0x4; temp_msg.recvr_id = hdmi_msm_state->cec_queue_wr->sender_id; i = 0; /* OSD Name */ temp_msg.opcode = 0x47; /* Display control byte */ temp_msg.operand[i++] = 0x00; temp_msg.operand[i++] = 'H'; temp_msg.operand[i++] = 'e'; temp_msg.operand[i++] = 'l'; temp_msg.operand[i++] = 'l'; temp_msg.operand[i++] = 'o'; temp_msg.operand[i++] = ' '; temp_msg.operand[i++] = 'W'; temp_msg.operand[i++] = 'o'; temp_msg.operand[i++] = 'r'; temp_msg.operand[i++] = 'l'; temp_msg.operand[i++] = 'd'; temp_msg.frame_size = i + 2; hdmi_msm_cec_msg_send(&temp_msg); break; case 0x08F: /* Give Device Power status */ DEV_INFO("Recvd a Power status message\n"); memset(&temp_msg, 0x00, sizeof(struct hdmi_msm_cec_msg)); temp_msg.sender_id = 0x4; temp_msg.recvr_id = hdmi_msm_state->cec_queue_wr->sender_id; i = 0; /* OSD String */ temp_msg.opcode = 0x90; temp_msg.operand[i++] = 'H'; temp_msg.operand[i++] = 'e'; temp_msg.operand[i++] = 'l'; temp_msg.operand[i++] = 'l'; temp_msg.operand[i++] = 'o'; temp_msg.operand[i++] = ' '; temp_msg.operand[i++] = 'W'; temp_msg.operand[i++] = 'o'; temp_msg.operand[i++] = 'r'; temp_msg.operand[i++] = 'l'; temp_msg.operand[i++] = 'd'; temp_msg.frame_size = i + 2; hdmi_msm_cec_msg_send(&temp_msg); break; case 0x080: /* Routing Change cmd */ case 0x086: /* Set Stream Path */ DEV_INFO("Recvd Set Stream\n"); memset(&temp_msg, 0x00, sizeof(struct hdmi_msm_cec_msg)); temp_msg.sender_id = 0x4; /*Broadcast this message*/ temp_msg.recvr_id = 0xf; i = 0; temp_msg.opcode = 0x82; /* Active Source */ temp_msg.operand[i++] = 0x10; temp_msg.operand[i++] = 0x00; temp_msg.frame_size = i + 2; hdmi_msm_cec_msg_send(&temp_msg); /* * sending <Image View On> message */ memset(&temp_msg, 0x00, sizeof(struct hdmi_msm_cec_msg)); temp_msg.sender_id = 0x4; temp_msg.recvr_id = hdmi_msm_state->cec_queue_wr->sender_id; i = 0; /* opcode for Image View On */ temp_msg.opcode = 0x04; temp_msg.frame_size = i + 2; hdmi_msm_cec_msg_send(&temp_msg); break; case 0x44: /* User Control Pressed */ DEV_INFO("User Control Pressed\n"); break; case 0x45: /* User Control Released */ DEV_INFO("User Control Released\n"); break; default: DEV_INFO("Recvd an unknown cmd = [%u]\n", hdmi_msm_state->cec_queue_wr->opcode); #ifdef __SEND_ABORT__ memset(&temp_msg, 0x00, sizeof(struct hdmi_msm_cec_msg)); temp_msg.sender_id = 0x4; temp_msg.recvr_id = hdmi_msm_state->cec_queue_wr->sender_id; i = 0; /* opcode for feature abort */ temp_msg.opcode = 0x00; temp_msg.operand[i++] = hdmi_msm_state->cec_queue_wr->opcode; /*reason for abort = "Unrecognized opcode" */ temp_msg.operand[i++] = 0x00; temp_msg.frame_size = i + 2; hdmi_msm_cec_msg_send(&temp_msg); break; #else memset(&temp_msg, 0x00, sizeof(struct hdmi_msm_cec_msg)); temp_msg.sender_id = 0x4; temp_msg.recvr_id = hdmi_msm_state->cec_queue_wr->sender_id; i = 0; /* OSD String */ temp_msg.opcode = 0x64; temp_msg.operand[i++] = 0x0; temp_msg.operand[i++] = 'H'; temp_msg.operand[i++] = 'e'; temp_msg.operand[i++] = 'l'; temp_msg.operand[i++] = 'l'; temp_msg.operand[i++] = 'o'; temp_msg.operand[i++] = ' '; temp_msg.operand[i++] = 'W'; temp_msg.operand[i++] = 'o'; temp_msg.operand[i++] = 'r'; temp_msg.operand[i++] = 'l'; temp_msg.operand[i++] = 'd'; temp_msg.frame_size = i + 2; hdmi_msm_cec_msg_send(&temp_msg); break; #endif /* __SEND_ABORT__ */ }
functions
void hdmi_msm_cec_one_touch_play(void) { struct hdmi_msm_cec_msg temp_msg; uint32 i = 0; memset(&temp_msg, 0x00, sizeof(struct hdmi_msm_cec_msg)); temp_msg.sender_id = 0x4; /* * Broadcast this message */ temp_msg.recvr_id = 0xf; i = 0; /* Active Source */ temp_msg.opcode = 0x82; temp_msg.operand[i++] = 0x10; temp_msg.operand[i++] = 0x00; /*temp_msg.operand[i++] = 0x04;*/ temp_msg.frame_size = i + 2; hdmi_msm_cec_msg_send(&temp_msg); /* * sending <Image View On> message */ memset(&temp_msg, 0x00, sizeof(struct hdmi_msm_cec_msg)); temp_msg.sender_id = 0x4; temp_msg.recvr_id = hdmi_msm_state->cec_queue_wr->sender_id; i = 0; /* Image View On */ temp_msg.opcode = 0x04; temp_msg.frame_size = i + 2; hdmi_msm_cec_msg_send(&temp_msg); }
functions
uint32 hdmi_msm_get_io_base(void) { return (uint32)MSM_HDMI_BASE; }
functions
void hdmi_msm_setup_video_mode_lut(void) { HDMI_SETUP_LUT(640x480p60_4_3); HDMI_SETUP_LUT(720x480p60_4_3); HDMI_SETUP_LUT(720x480p60_16_9); HDMI_SETUP_LUT(1280x720p60_16_9); HDMI_SETUP_LUT(1920x1080i60_16_9); HDMI_SETUP_LUT(1440x480i60_4_3); HDMI_SETUP_LUT(1440x480i60_16_9); HDMI_SETUP_LUT(1920x1080p60_16_9); HDMI_SETUP_LUT(720x576p50_4_3); HDMI_SETUP_LUT(720x576p50_16_9); HDMI_SETUP_LUT(1280x720p50_16_9); HDMI_SETUP_LUT(1440x576i50_4_3); HDMI_SETUP_LUT(1440x576i50_16_9); HDMI_SETUP_LUT(1920x1080p50_16_9); HDMI_SETUP_LUT(1920x1080p24_16_9); HDMI_SETUP_LUT(1920x1080p25_16_9); HDMI_SETUP_LUT(1920x1080p30_16_9); }
functions
void hdmi_outp(uint32 offset, uint32 value) { uint32 in_val; outpdw(MSM_HDMI_BASE+offset, value); in_val = inpdw(MSM_HDMI_BASE+offset); DEV_DBG("HDMI[%04x] => %08x [%08x] %s\n", offset, value, in_val, hdmi_msm_name(offset)); }
functions
uint32 hdmi_inp(uint32 offset) { uint32 value = inpdw(MSM_HDMI_BASE+offset); DEV_DBG("HDMI[%04x] <= %08x %s\n", offset, value, hdmi_msm_name(offset)); return value; }
functions
bool hdmi_ready(void) { return MSM_HDMI_BASE && hdmi_msm_state && hdmi_msm_state->hdmi_app_clk && hdmi_msm_state->hpd_initialized; }
functions
void hdmi_msm_send_event(boolean on) { char *envp[2]; /* QDSP OFF preceding the HPD event notification */ envp[0] = "HDCP_STATE=FAIL"; envp[1] = NULL; DEV_ERR("hdmi: HDMI HPD: QDSP OFF\n"); kobject_uevent_env(external_common_state->uevent_kobj, KOBJ_CHANGE, envp); if (on) { /* Build EDID table */ hdmi_msm_read_edid(); switch_set_state(&external_common_state->sdev, 1); DEV_INFO("%s: hdmi state switched to %d\n", __func__, external_common_state->sdev.state); DEV_INFO("HDMI HPD: CONNECTED: send ONLINE\n"); kobject_uevent(external_common_state->uevent_kobj, KOBJ_ONLINE); if (!hdmi_msm_state->hdcp_enable) { /* Send Audio for HDMI Compliance Cases*/ envp[0] = "HDCP_STATE=PASS"; envp[1] = NULL; DEV_INFO("HDMI HPD: sense : send HDCP_PASS\n"); kobject_uevent_env(external_common_state->uevent_kobj, KOBJ_CHANGE, envp); }
functions
void hdmi_msm_hpd_state_work(struct work_struct *work) { if (!hdmi_ready()) { DEV_ERR("hdmi: %s: ignored, probe failed\n", __func__); return; }
functions
void hdmi_msm_cec_latch_work(struct work_struct *work) { hdmi_msm_cec_line_latch_detect(); }
functions
void hdmi_msm_hdcp_reauth_work(struct work_struct *work) { if (!hdmi_msm_state->hdcp_enable) { DEV_DBG("%s: HDCP not enabled\n", __func__); return; }
functions
void hdmi_msm_hdcp_work(struct work_struct *work) { if (!hdmi_msm_state->hdcp_enable) { DEV_DBG("%s: HDCP not enabled\n", __func__); return; }
functions
int hdmi_msm_process_hdcp_interrupts(void) { int rc = -1; uint32 hdcp_int_val; char *envp[2]; if (!hdmi_msm_state->hdcp_enable) { DEV_DBG("%s: HDCP not enabled\n", __func__); return -EINVAL; }
functions
irqreturn_t hdmi_msm_isr(int irq, void *dev_id) { uint32 hpd_int_status; uint32 hpd_int_ctrl; #ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL_CEC_SUPPORT uint32 cec_intr_status; #endif uint32 ddc_int_ctrl; uint32 audio_int_val; static uint32 fifo_urun_int_occurred; static uint32 sample_drop_int_occurred; const uint32 occurrence_limit = 5; if (!hdmi_ready()) { DEV_DBG("ISR ignored, probe failed\n"); return IRQ_HANDLED; }
functions
int check_hdmi_features(void) { /* RAW_FEAT_CONFIG_ROW0_LSB */ uint32 val = inpdw(QFPROM_BASE + 0x0238); /* HDMI_DISABLE */ boolean hdmi_disabled = (val & 0x00200000) >> 21; /* HDCP_DISABLE */ boolean hdcp_disabled = (val & 0x00400000) >> 22; DEV_DBG("Features <val:0x%08x, HDMI:%s, HDCP:%s>\n", val, hdmi_disabled ? "OFF" : "ON", hdcp_disabled ? "OFF" : "ON"); if (hdmi_disabled) { DEV_ERR("ERROR: HDMI disabled\n"); return -ENODEV; }
functions
boolean hdmi_msm_has_hdcp(void) { /* RAW_FEAT_CONFIG_ROW0_LSB, HDCP_DISABLE */ return (inpdw(QFPROM_BASE + 0x0238) & 0x00400000) ? FALSE : TRUE; }
functions
boolean hdmi_msm_is_power_on(void) { /* HDMI_CTRL, ENABLE */ return (HDMI_INP_ND(0x0000) & 0x00000001) ? TRUE : FALSE; }
functions
boolean hdmi_msm_is_dvi_mode(void) { /* HDMI_CTRL, HDMI_DVI_SEL */ return (HDMI_INP_ND(0x0000) & 0x00000002) ? FALSE : TRUE; }
functions
void hdmi_msm_set_mode(boolean power_on) { uint32 reg_val = 0; if (power_on) { /* ENABLE */ reg_val |= 0x00000001; /* Enable the block */ if (external_common_state->hdmi_sink == 0) { /* HDMI_DVI_SEL */ reg_val |= 0x00000002; if (hdmi_msm_state->hdcp_enable) /* HDMI Encryption */ reg_val |= 0x00000004; /* HDMI_CTRL */ HDMI_OUTP(0x0000, reg_val); /* HDMI_DVI_SEL */ reg_val &= ~0x00000002; }
functions
void msm_hdmi_init_ddc(void) { /* 0x0220 HDMI_DDC_SPEED [31:16] PRESCALE prescale = (m * xtal_frequency) / (desired_i2c_speed), where m is multiply factor, default: m = 1 [1:0] THRESHOLD Select threshold to use to determine whether value sampled on SDA is a 1 or 0. Specified in terms of the ratio between the number of sampled ones and the total number of times SDA is sampled. * 0x0: >0 * 0x1: 1/4 of total samples * 0x2: 1/2 of total samples * 0x3: 3/4 of total samples */ /* Configure the Pre-Scale multiplier * Configure the Threshold */ HDMI_OUTP_ND(0x0220, (10 << 16) | (2 << 0)); /* * 0x0224 HDMI_DDC_SETUP * Setting 31:24 bits : Time units to wait before timeout * when clock is being stalled by external sink device */ HDMI_OUTP_ND(0x0224, 0xff000000); /* 0x027C HDMI_DDC_REF [6] REFTIMER_ENABLE Enable the timer * 0: Disable * 1: Enable [15:0] REFTIMER Value to set the register in order to generate DDC strobe. This register counts on HDCP application clock */ /* Enable reference timer * 27 micro-seconds */ HDMI_OUTP_ND(0x027C, (1 << 16) | (27 << 0)); }
functions
int hdmi_msm_ddc_clear_irq(const char *what) { const uint32 time_out = 0xFFFF; uint32 time_out_count, reg_val; /* clear pending and enable interrupt */ time_out_count = time_out; do { --time_out_count; /* HDMI_DDC_INT_CTRL[0x0214] [2] SW_DONE_MK Mask bit for SW_DONE_INT. Set to 1 to enable interrupt. [1] SW_DONE_ACK WRITE ONLY. Acknowledge bit for SW_DONE_INT. Write 1 to clear interrupt. [0] SW_DONE_INT READ ONLY. SW_DONE interrupt status */ /* Clear and Enable DDC interrupt */ /* Write */ HDMI_OUTP_ND(0x0214, (1 << 2) | (1 << 1)); /* Read back */ reg_val = HDMI_INP_ND(0x0214); }
functions
int hdmi_msm_ddc_write(uint32 dev_addr, uint32 offset, const uint8 *data_buf, uint32 data_len, const char *what) { uint32 reg_val, ndx; int status = 0, retry = 10; uint32 time_out_count; if (NULL == data_buf) { status = -EINVAL; DEV_ERR("%s[%s]: invalid input paramter\n", __func__, what); goto error; }
functions
int hdmi_msm_ddc_read_retry(uint32 dev_addr, uint32 offset, uint8 *data_buf, uint32 data_len, uint32 request_len, int retry, const char *what) { uint32 reg_val, ndx; int status = 0; uint32 time_out_count; int log_retry_fail = retry != 1; if (NULL == data_buf) { status = -EINVAL; DEV_ERR("%s: invalid input paramter\n", __func__); goto error; }
functions
int hdmi_msm_ddc_read_edid_seg(uint32 dev_addr, uint32 offset, uint8 *data_buf, uint32 data_len, uint32 request_len, int retry, const char *what) { uint32 reg_val, ndx; int status = 0; uint32 time_out_count; int log_retry_fail = retry != 1; int seg_addr = 0x60, seg_num = 0x01; if (NULL == data_buf) { status = -EINVAL; DEV_ERR("%s: invalid input paramter\n", __func__); goto error; }
functions
int hdmi_msm_ddc_read(uint32 dev_addr, uint32 offset, uint8 *data_buf, uint32 data_len, int retry, const char *what, boolean no_align) { int ret = hdmi_msm_ddc_read_retry(dev_addr, offset, data_buf, data_len, data_len, retry, what); if (!ret) return 0; if (no_align) { return hdmi_msm_ddc_read_retry(dev_addr, offset, data_buf, data_len, data_len, retry, what); }
functions
int hdmi_msm_read_edid_block(int block, uint8 *edid_buf) { int i, rc = 0; int block_size = 0x80; do { DEV_DBG("EDID: reading block(%d) with block-size=%d\n", block, block_size); for (i = 0; i < 0x80; i += block_size) { /*Read EDID twice with 32bit alighnment too */ if (block < 2) { rc = hdmi_msm_ddc_read(0xA0, block*0x80 + i, edid_buf+i, block_size, 1, "EDID", FALSE); }
functions
int hdmi_msm_read_edid(void) { int status; msm_hdmi_init_ddc(); /* Looks like we need to turn on HDMI engine before any * DDC transaction */ if (!hdmi_msm_is_power_on()) { DEV_ERR("%s: failed: HDMI power is off", __func__); status = -ENXIO; goto error; }
functions
void hdcp_auth_info(uint32 auth_info) { if (!hdmi_msm_state->hdcp_enable) { DEV_DBG("%s: HDCP not enabled\n", __func__); return; }
functions
void hdcp_key_state(uint32 key_state) { if (!hdmi_msm_state->hdcp_enable) { DEV_DBG("%s: HDCP not enabled\n", __func__); return; }
functions
int hdmi_msm_count_one(uint8 *array, uint8 len) { int i, j, count = 0; for (i = 0; i < len; i++) for (j = 0; j < 8; j++) count += (((array[i] >> j) & 0x1) ? 1 : 0); return count; }
functions
void hdcp_deauthenticate(void) { int hdcp_link_status = HDMI_INP(0x011C); if (!hdmi_msm_state->hdcp_enable) { DEV_DBG("%s: HDCP not enabled\n", __func__); return; }
functions
void check_and_clear_HDCP_DDC_Failure(void) { int hdcp_ddc_ctrl1_reg; int hdcp_ddc_status; int failure; int nack0; if (!hdmi_msm_state->hdcp_enable) { DEV_DBG("%s: HDCP not enabled\n", __func__); return; }
functions
int hdcp_authentication_part1(void) { int ret = 0; boolean is_match; boolean is_part1_done = FALSE; uint32 timeout_count; uint8 bcaps; uint8 aksv[5]; uint32 qfprom_aksv_0, qfprom_aksv_1, link0_aksv_0, link0_aksv_1; uint8 bksv[5]; uint32 link0_bksv_0, link0_bksv_1; uint8 an[8]; uint32 link0_an_0, link0_an_1; uint32 hpd_int_status, hpd_int_ctrl; static uint8 buf[0xFF]; memset(buf, 0, sizeof(buf)); if (!hdmi_msm_state->hdcp_enable) { DEV_DBG("%s: HDCP not enabled\n", __func__); return 0; }
functions
int hdmi_msm_transfer_v_h(void) { /* Read V'.HO 4 Byte at offset 0x20 */ char what[20]; int ret; uint8 buf[4]; if (!hdmi_msm_state->hdcp_enable) { DEV_DBG("%s: HDCP not enabled\n", __func__); return 0; }
functions
int hdcp_authentication_part2(void) { int ret = 0; uint32 timeout_count; int i = 0; int cnt = 0; uint bstatus; uint8 bcaps; uint32 down_stream_devices; uint32 ksv_bytes; static uint8 buf[0xFF]; static uint8 kvs_fifo[5 * 127]; boolean max_devs_exceeded = 0; boolean max_cascade_exceeded = 0; boolean ksv_done = FALSE; if (!hdmi_msm_state->hdcp_enable) { DEV_DBG("%s: HDCP not enabled\n", __func__); return 0; }
functions
int hdcp_authentication_part3(uint32 found_repeater) { int ret = 0; int poll = 3000; if (!hdmi_msm_state->hdcp_enable) { DEV_DBG("%s: HDCP not enabled\n", __func__); return 0; }
functions
void hdmi_msm_hdcp_enable(void) { int ret = 0; uint8 bcaps; uint32 found_repeater = 0x0; char *envp[2]; if (!hdmi_msm_state->hdcp_enable) { DEV_INFO("%s: HDCP NOT ENABLED\n", __func__); return; }
functions
void hdmi_msm_video_setup(int video_format) { uint32 total_v = 0; uint32 total_h = 0; uint32 start_h = 0; uint32 end_h = 0; uint32 start_v = 0; uint32 end_v = 0; const struct hdmi_disp_mode_timing_type *timing = hdmi_common_get_supported_mode(video_format); /* timing register setup */ if (timing == NULL) { DEV_ERR("video format not supported: %d\n", video_format); return; }
functions
void hdmi_msm_audio_acr_setup(boolean enabled, int video_format, int audio_sample_rate, int num_of_channels) { /* Read first before writing */ /* HDMI_ACR_PKT_CTRL[0x0024] */ uint32 acr_pck_ctrl_reg = HDMI_INP(0x0024); if (enabled) { const struct hdmi_disp_mode_timing_type *timing = hdmi_common_get_supported_mode(video_format); const struct hdmi_msm_audio_arcs *audio_arc = &hdmi_msm_audio_acr_lut[0]; const int lut_size = sizeof(hdmi_msm_audio_acr_lut) /sizeof(*hdmi_msm_audio_acr_lut); uint32 i, n, cts, layout, multiplier, aud_pck_ctrl_2_reg; if (timing == NULL) { DEV_WARN("%s: video format %d not supported\n", __func__, video_format); return; }
functions
void hdmi_msm_outpdw_chk(uint32 offset, uint32 data) { uint32 check, i = 0; #ifdef DEBUG HDMI_OUTP(offset, data); #endif do { outpdw(MSM_HDMI_BASE+offset, data); check = inpdw(MSM_HDMI_BASE+offset); }
functions
void hdmi_msm_rmw32or(uint32 offset, uint32 data) { uint32 reg_data; reg_data = inpdw(MSM_HDMI_BASE+offset); reg_data = inpdw(MSM_HDMI_BASE+offset); hdmi_msm_outpdw_chk(offset, reg_data | data); }
functions
int hdmi_audio_enable(bool on , u32 fifo_water_mark) { u32 hdmi_audio_config; hdmi_audio_config = HDMI_INP(HDMI_AUDIO_CFG); if (on) { if (fifo_water_mark > HDMI_AUDIO_FIFO_MAX_WATER_MARK) { pr_err("%s : HDMI audio fifo water mark can not be more" " than %u\n", __func__, HDMI_AUDIO_FIFO_MAX_WATER_MARK); return -EINVAL; }
functions
int hdmi_audio_packet_enable(bool on) { u32 hdmi_audio_pkt_ctrl; hdmi_audio_pkt_ctrl = HDMI_INP(HDMI_AUDIO_PKT_CTRL); if (on) hdmi_audio_pkt_ctrl |= HDMI_AUDIO_SAMPLE_SEND_ENABLE; else hdmi_audio_pkt_ctrl &= ~(HDMI_AUDIO_SAMPLE_SEND_ENABLE); HDMI_OUTP(HDMI_AUDIO_PKT_CTRL, hdmi_audio_pkt_ctrl); mb(); pr_info("%s : HDMI_AUDIO_PKT_CTRL 0x%08x\n", __func__, HDMI_INP(HDMI_AUDIO_PKT_CTRL)); return 0; }
functions
int hdmi_msm_audio_info_setup(bool enabled, u32 num_of_channels, u32 channel_allocation, u32 level_shift, bool down_mix) { uint32 channel_count = 1; /* Default to 2 channels -> See Table 17 in CEA-D spec */ uint32 check_sum, audio_info_0_reg, audio_info_1_reg; uint32 audio_info_ctrl_reg; u32 aud_pck_ctrl_2_reg; u32 layout; layout = (MSM_HDMI_AUDIO_CHANNEL_2 == num_of_channels) ? 0 : 1; aud_pck_ctrl_2_reg = 1 | (layout << 1); HDMI_OUTP(0x00044, aud_pck_ctrl_2_reg); /* Please see table 20 Audio InfoFrame in HDMI spec FL = front left FC = front Center FR = front right FLC = front left center FRC = front right center RL = rear left RC = rear center RR = rear right RLC = rear left center RRC = rear right center LFE = low frequency effect */ /* Read first then write because it is bundled with other controls */ /* HDMI_INFOFRAME_CTRL0[0x002C] */ audio_info_ctrl_reg = HDMI_INP(0x002C); if (enabled) { switch (num_of_channels) { case MSM_HDMI_AUDIO_CHANNEL_2: channel_allocation = 0; /* Default to FR,FL */ break; case MSM_HDMI_AUDIO_CHANNEL_4: channel_count = 3; /* FC,LFE,FR,FL */ channel_allocation = 0x3; break; case MSM_HDMI_AUDIO_CHANNEL_6: channel_count = 5; /* RR,RL,FC,LFE,FR,FL */ channel_allocation = 0xB; break; case MSM_HDMI_AUDIO_CHANNEL_8: channel_count = 7; /* FRC,FLC,RR,RL,FC,LFE,FR,FL */ channel_allocation = 0x1f; break; default: pr_err("%s(): Unsupported num_of_channels = %u\n", __func__, num_of_channels); return -EINVAL; break; }
functions
void hdmi_msm_en_gc_packet(boolean av_mute_is_requested) { /* HDMI_GC[0x0040] */ HDMI_OUTP(0x0040, av_mute_is_requested ? 1 : 0); /* GC packet enable (every frame) */ /* HDMI_VBI_PKT_CTRL[0x0028] */ hdmi_msm_rmw32or(0x0028, 3 << 4); }
functions
void hdmi_msm_en_isrc_packet(boolean isrc_is_continued) { static const char isrc_psuedo_data[] = "ISRC1:0123456789isrc2=ABCDEFGHIJ"; const uint32 * isrc_data = (const uint32 *) isrc_psuedo_data; /* ISRC_STATUS =0b010 | ISRC_CONTINUE | ISRC_VALID */ /* HDMI_ISRC1_0[0x00048] */ HDMI_OUTP(0x00048, 2 | (isrc_is_continued ? 1 : 0) << 6 | 0 << 7); /* HDMI_ISRC1_1[0x004C] */ HDMI_OUTP(0x004C, *isrc_data++); /* HDMI_ISRC1_2[0x0050] */ HDMI_OUTP(0x0050, *isrc_data++); /* HDMI_ISRC1_3[0x0054] */ HDMI_OUTP(0x0054, *isrc_data++); /* HDMI_ISRC1_4[0x0058] */ HDMI_OUTP(0x0058, *isrc_data++); /* HDMI_ISRC2_0[0x005C] */ HDMI_OUTP(0x005C, *isrc_data++); /* HDMI_ISRC2_1[0x0060] */ HDMI_OUTP(0x0060, *isrc_data++); /* HDMI_ISRC2_2[0x0064] */ HDMI_OUTP(0x0064, *isrc_data++); /* HDMI_ISRC2_3[0x0068] */ HDMI_OUTP(0x0068, *isrc_data); /* HDMI_VBI_PKT_CTRL[0x0028] */ /* ISRC Send + Continuous */ hdmi_msm_rmw32or(0x0028, 3 << 8); }
functions
void hdmi_msm_en_isrc_packet(boolean isrc_is_continued) { /* * Until end-to-end support for various audio packets */ }
functions
void hdmi_msm_en_acp_packet(uint32 byte1) { /* HDMI_ACP[0x003C] */ HDMI_OUTP(0x003C, 2 | 1 << 8 | byte1 << 16); /* HDMI_VBI_PKT_CTRL[0x0028] */ /* ACP send, s/w source */ hdmi_msm_rmw32or(0x0028, 3 << 12); }
functions
void hdmi_msm_en_acp_packet(uint32 byte1) { /* * Until end-to-end support for various audio packets */ }
functions
int hdmi_msm_audio_get_sample_rate(void) { return msm_hdmi_sample_rate; }
functions
void hdmi_msm_audio_sample_rate_reset(int rate) { msm_hdmi_sample_rate = rate; if (hdmi_msm_state->hdcp_enable) hdcp_deauthenticate(); else hdmi_msm_turn_on(); }
functions
void hdmi_msm_audio_setup(void) { const int channels = MSM_HDMI_AUDIO_CHANNEL_2; /* (0) for clr_avmute, (1) for set_avmute */ hdmi_msm_en_gc_packet(0); /* (0) for isrc1 only, (1) for isrc1 and isrc2 */ hdmi_msm_en_isrc_packet(1); /* arbitrary bit pattern for byte1 */ hdmi_msm_en_acp_packet(0x5a); DEV_DBG("Not setting ACP, ISRC1, ISRC2 packets\n"); hdmi_msm_audio_acr_setup(TRUE, external_common_state->video_resolution, msm_hdmi_sample_rate, channels); hdmi_msm_audio_info_setup(TRUE, channels, 0, 0, FALSE); /* Turn on Audio FIFO and SAM DROP ISR */ HDMI_OUTP(0x02CC, HDMI_INP(0x02CC) | BIT(1) | BIT(3)); DEV_INFO("HDMI Audio: Enabled\n"); }
functions
int hdmi_msm_audio_off(void) { uint32 audio_cfg; int i, timeout_val = 50; for (i = 0; (i < timeout_val) && ((audio_cfg = HDMI_INP_ND(0x01D0)) & BIT(0)); i++) { DEV_DBG("%s: %d times: AUDIO CFG is %08xi\n", __func__, i+1, audio_cfg); if (!((i+1) % 10)) { DEV_ERR("%s: audio still on after %d sec. try again\n", __func__, (i+1)/10); SWITCH_SET_HDMI_AUDIO(0, 1); }
functions
void hdmi_msm_avi_info_frame(void) { /* two header + length + 13 data */ uint8 aviInfoFrame[16]; uint8 checksum; uint32 sum; uint32 regVal; int i; int mode = 0; boolean use_ce_scan_info = TRUE; switch (external_common_state->video_resolution) { case HDMI_VFRMT_720x480p60_4_3: mode = 0; break; case HDMI_VFRMT_720x480i60_16_9: mode = 1; break; case HDMI_VFRMT_720x576p50_16_9: mode = 2; break; case HDMI_VFRMT_720x576i50_16_9: mode = 3; break; case HDMI_VFRMT_1280x720p60_16_9: mode = 4; break; case HDMI_VFRMT_1280x720p50_16_9: mode = 5; break; case HDMI_VFRMT_1920x1080p60_16_9: mode = 6; break; case HDMI_VFRMT_1920x1080i60_16_9: mode = 7; break; case HDMI_VFRMT_1920x1080p50_16_9: mode = 8; break; case HDMI_VFRMT_1920x1080i50_16_9: mode = 9; break; case HDMI_VFRMT_1920x1080p24_16_9: mode = 10; break; case HDMI_VFRMT_1920x1080p30_16_9: mode = 11; break; case HDMI_VFRMT_1920x1080p25_16_9: mode = 12; break; case HDMI_VFRMT_640x480p60_4_3: mode = 13; break; case HDMI_VFRMT_720x480p60_16_9: mode = 14; break; case HDMI_VFRMT_720x576p50_4_3: mode = 15; break; default: DEV_INFO("%s: mode %d not supported\n", __func__, external_common_state->video_resolution); return; }
functions
void hdmi_msm_vendor_infoframe_packetsetup(void) { uint32 packet_header = 0; uint32 check_sum = 0; uint32 packet_payload = 0; if (!external_common_state->format_3d) { HDMI_OUTP(0x0034, 0); return; }
functions
void hdmi_msm_switch_3d(boolean on) { mutex_lock(&external_common_state_hpd_mutex); if (external_common_state->hpd_state) hdmi_msm_vendor_infoframe_packetsetup(); mutex_unlock(&external_common_state_hpd_mutex); }
functions
void hdmi_msm_spd_infoframe_packetsetup(void) { uint32 packet_header = 0; uint32 check_sum = 0; uint32 packet_payload = 0; uint32 packet_control = 0; uint8 *vendor_name = external_common_state->spd_vendor_name; uint8 *product_description = external_common_state->spd_product_description; /* 0x00A4 GENERIC1_HDR * HB0 7:0 NUM * HB1 15:8 NUM * HB2 23:16 NUM */ /* Setup Packet header and payload */ /* 0x83 InfoFrame Type Code 0x01 InfoFrame Version Number 0x19 Length of Source Product Description InfoFrame */ packet_header = 0x83 | (0x01 << 8) | (0x19 << 16); HDMI_OUTP(0x00A4, packet_header); check_sum += IFRAME_CHECKSUM_32(packet_header); /* 0x00AC GENERIC1_1 * BYTE4 7:0 VENDOR_NAME[3] * BYTE5 15:8 VENDOR_NAME[4] * BYTE6 23:16 VENDOR_NAME[5] * BYTE7 31:24 VENDOR_NAME[6] */ packet_payload = (vendor_name[3] & 0x7f) | ((vendor_name[4] & 0x7f) << 8) | ((vendor_name[5] & 0x7f) << 16) | ((vendor_name[6] & 0x7f) << 24); HDMI_OUTP(0x00AC, packet_payload); check_sum += IFRAME_CHECKSUM_32(packet_payload); /* Product Description (7-bit ASCII code) */ /* 0x00B0 GENERIC1_2 * BYTE8 7:0 VENDOR_NAME[7] * BYTE9 15:8 PRODUCT_NAME[ 0] * BYTE10 23:16 PRODUCT_NAME[ 1] * BYTE11 31:24 PRODUCT_NAME[ 2] */ packet_payload = (vendor_name[7] & 0x7f) | ((product_description[0] & 0x7f) << 8) | ((product_description[1] & 0x7f) << 16) | ((product_description[2] & 0x7f) << 24); HDMI_OUTP(0x00B0, packet_payload); check_sum += IFRAME_CHECKSUM_32(packet_payload); /* 0x00B4 GENERIC1_3 * BYTE12 7:0 PRODUCT_NAME[ 3] * BYTE13 15:8 PRODUCT_NAME[ 4] * BYTE14 23:16 PRODUCT_NAME[ 5] * BYTE15 31:24 PRODUCT_NAME[ 6] */ packet_payload = (product_description[3] & 0x7f) | ((product_description[4] & 0x7f) << 8) | ((product_description[5] & 0x7f) << 16) | ((product_description[6] & 0x7f) << 24); HDMI_OUTP(0x00B4, packet_payload); check_sum += IFRAME_CHECKSUM_32(packet_payload); /* 0x00B8 GENERIC1_4 * BYTE16 7:0 PRODUCT_NAME[ 7] * BYTE17 15:8 PRODUCT_NAME[ 8] * BYTE18 23:16 PRODUCT_NAME[ 9] * BYTE19 31:24 PRODUCT_NAME[10] */ packet_payload = (product_description[7] & 0x7f) | ((product_description[8] & 0x7f) << 8) | ((product_description[9] & 0x7f) << 16) | ((product_description[10] & 0x7f) << 24); HDMI_OUTP(0x00B8, packet_payload); check_sum += IFRAME_CHECKSUM_32(packet_payload); /* 0x00BC GENERIC1_5 * BYTE20 7:0 PRODUCT_NAME[11] * BYTE21 15:8 PRODUCT_NAME[12] * BYTE22 23:16 PRODUCT_NAME[13] * BYTE23 31:24 PRODUCT_NAME[14] */ packet_payload = (product_description[11] & 0x7f) | ((product_description[12] & 0x7f) << 8) | ((product_description[13] & 0x7f) << 16) | ((product_description[14] & 0x7f) << 24); HDMI_OUTP(0x00BC, packet_payload); check_sum += IFRAME_CHECKSUM_32(packet_payload); /* 0x00C0 GENERIC1_6 * BYTE24 7:0 PRODUCT_NAME[15] * BYTE25 15:8 Source Device Information * BYTE26 23:16 NUM * BYTE27 31:24 NUM */ /* Source Device Information * 00h unknown * 01h Digital STB * 02h DVD * 03h D-VHS * 04h HDD Video * 05h DVC * 06h DSC * 07h Video CD * 08h Game * 09h PC general */ packet_payload = (product_description[15] & 0x7f) | 0x00 << 8; HDMI_OUTP(0x00C0, packet_payload); check_sum += IFRAME_CHECKSUM_32(packet_payload); /* Vendor Name (7bit ASCII code) */ /* 0x00A8 GENERIC1_0 * BYTE0 7:0 CheckSum * BYTE1 15:8 VENDOR_NAME[0] * BYTE2 23:16 VENDOR_NAME[1] * BYTE3 31:24 VENDOR_NAME[2] */ packet_payload = ((vendor_name[0] & 0x7f) << 8) | ((vendor_name[1] & 0x7f) << 16) | ((vendor_name[2] & 0x7f) << 24); check_sum += IFRAME_CHECKSUM_32(packet_payload); packet_payload |= ((0x100 - (0xff & check_sum)) & 0xff); HDMI_OUTP(0x00A8, packet_payload); /* GENERIC1_LINE | GENERIC1_CONT | GENERIC1_SEND * Setup HDMI TX generic packet control * Enable this packet to transmit every frame * Enable HDMI TX engine to transmit Generic packet 1 */ packet_control = HDMI_INP_ND(0x0034); packet_control |= ((0x1 << 24) | (1 << 5) | (1 << 4)); HDMI_OUTP(0x0034, packet_control); }
functions
int hdmi_msm_clk(int on) { int rc; DEV_DBG("HDMI Clk: %s\n", on ? "Enable" : "Disable"); if (on) { rc = clk_prepare_enable(hdmi_msm_state->hdmi_app_clk); if (rc) { DEV_ERR("'hdmi_app_clk' clock enable failed, rc=%d\n", rc); return rc; }
functions
void hdmi_msm_turn_on(void) { uint32 audio_pkt_ctrl, audio_cfg; /* * Number of wait iterations for QDSP to disable Audio Engine * before resetting HDMI core */ int i = 10; audio_pkt_ctrl = HDMI_INP_ND(0x0020); audio_cfg = HDMI_INP_ND(0x01D0); /* * Checking BIT[0] of AUDIO PACKET CONTROL and * AUDIO CONFIGURATION register */ while (((audio_pkt_ctrl & 0x00000001) || (audio_cfg & 0x00000001)) && (i--)) { audio_pkt_ctrl = HDMI_INP_ND(0x0020); audio_cfg = HDMI_INP_ND(0x01D0); DEV_DBG("%d times :: HDMI AUDIO PACKET is %08x and " "AUDIO CFG is %08x", i, audio_pkt_ctrl, audio_cfg); msleep(20); }
functions
void hdmi_msm_hdcp_timer(unsigned long data) { if (!hdmi_msm_state->hdcp_enable) { DEV_DBG("%s: HDCP not enabled\n", __func__); return; }
functions
void hdmi_msm_cec_read_timer_func(unsigned long data) { queue_work(hdmi_work_queue, &hdmi_msm_state->cec_latch_detect_work); }
functions
void hdmi_msm_hpd_polarity_setup(void) { u32 cable_sense; bool polarity = !external_common_state->hpd_state; bool trigger = false; if (polarity) HDMI_OUTP(0x0254, BIT(2) | BIT(1)); else HDMI_OUTP(0x0254, BIT(2)); cable_sense = (HDMI_INP(0x0250) & BIT(1)) >> 1; if (cable_sense == polarity) trigger = true; DEV_DBG("%s: listen=%s, sense=%s, trigger=%s\n", __func__, polarity ? "connect" : "disconnect", cable_sense ? "connect" : "disconnect", trigger ? "Yes" : "No"); if (trigger) { u32 reg_val = HDMI_INP(0x0258); /* Toggle HPD circuit to trigger HPD sense */ HDMI_OUTP(0x0258, reg_val & ~BIT(28)); HDMI_OUTP(0x0258, reg_val | BIT(28)); }
functions
void hdmi_msm_hpd_off(void) { int rc = 0; if (!hdmi_msm_state->hpd_initialized) { DEV_DBG("%s: HPD is already OFF, returning\n", __func__); return; }
functions
void hdmi_msm_dump_regs(const char *prefix) { #ifdef REG_DUMP print_hex_dump(KERN_INFO, prefix, DUMP_PREFIX_OFFSET, 32, 4, (void *)MSM_HDMI_BASE, 0x0334, false); #endif }
functions
int hdmi_msm_hpd_on(void) { static int phy_reset_done; uint32 hpd_ctrl; int rc = 0; if (hdmi_msm_state->hpd_initialized) { DEV_DBG("%s: HPD is already ON\n", __func__); }
functions
int hdmi_msm_power_ctrl(boolean enable) { int rc = 0; if (enable) { /* * Enable HPD only if the UI option is on or if * HDMI is configured as the primary display */ if (hdmi_prim_display || external_common_state->hpd_feature_on) { DEV_DBG("%s: Turning HPD ciruitry on\n", __func__); /*[ECID:000000] ZTEBSP wanghaifei start 20130221, add qcom new patch for HDP resume wait*/ if (external_common_state->pre_suspend_hpd_state) { external_common_state->pre_suspend_hpd_state = false; hdmi_msm_send_event(HPD_EVENT_OFFLINE); }
functions
int hdmi_msm_power_on(struct platform_device *pdev) { struct msm_fb_data_type *mfd = platform_get_drvdata(pdev); int ret = 0; bool changed; if (!hdmi_ready()) { DEV_ERR("%s: HDMI/HPD not initialized\n", __func__); return ret; }
functions
void mhl_connect_api(boolean on) { char *envp[2]; /* Simulating a HPD event based on MHL event */ if (on) { hdmi_msm_read_edid(); hdmi_msm_state->reauth = FALSE ; /* Build EDID table */ hdmi_msm_turn_on(); DEV_INFO("HDMI HPD: CONNECTED: send ONLINE\n"); kobject_uevent(external_common_state->uevent_kobj, KOBJ_ONLINE); envp[0] = 0; if (!hdmi_msm_state->hdcp_enable) { /* Send Audio for HDMI Compliance Cases*/ envp[0] = "HDCP_STATE=PASS"; envp[1] = NULL; DEV_INFO("HDMI HPD: sense : send HDCP_PASS\n"); kobject_uevent_env(external_common_state->uevent_kobj, KOBJ_CHANGE, envp); switch_set_state(&external_common_state->sdev, 1); DEV_INFO("%s: hdmi state switched to %d\n", __func__, external_common_state->sdev.state); }
functions
int hdmi_msm_power_off(struct platform_device *pdev) { int ret = 0; if (!hdmi_ready()) { DEV_ERR("%s: HDMI/HPD not initialized\n", __func__); return ret; }
functions
void hdmi_msm_config_hdcp_feature(void) { if (hdcp_feature_on && hdmi_msm_has_hdcp()) { init_timer(&hdmi_msm_state->hdcp_timer); hdmi_msm_state->hdcp_timer.function = hdmi_msm_hdcp_timer; hdmi_msm_state->hdcp_timer.data = (uint32)NULL; hdmi_msm_state->hdcp_timer.expires = 0xffffffffL; init_completion(&hdmi_msm_state->hdcp_success_done); INIT_WORK(&hdmi_msm_state->hdcp_reauth_work, hdmi_msm_hdcp_reauth_work); INIT_WORK(&hdmi_msm_state->hdcp_work, hdmi_msm_hdcp_work); hdmi_msm_state->hdcp_enable = TRUE; }
functions
__devinit hdmi_msm_probe(struct platform_device *pdev) { int rc; struct platform_device *fb_dev; if (!hdmi_msm_state) { pr_err("%s: hdmi_msm_state is NULL\n", __func__); return -ENOMEM; }
functions
__devexit hdmi_msm_remove(struct platform_device *pdev) { DEV_INFO("HDMI device: remove\n"); DEV_INFO("HDMI HPD: OFF\n"); /* Unregister hdmi node from switch driver */ switch_dev_unregister(&external_common_state->sdev); switch_dev_unregister(&external_common_state->audio_sdev); hdmi_msm_hpd_off(); free_irq(hdmi_msm_state->irq, NULL); if (hdmi_msm_state->qfprom_io) iounmap(hdmi_msm_state->qfprom_io); hdmi_msm_state->qfprom_io = NULL; if (hdmi_msm_state->hdmi_io) iounmap(hdmi_msm_state->hdmi_io); hdmi_msm_state->hdmi_io = NULL; external_common_state_remove(); if (hdmi_msm_state->hdmi_app_clk) clk_put(hdmi_msm_state->hdmi_app_clk); if (hdmi_msm_state->hdmi_m_pclk) clk_put(hdmi_msm_state->hdmi_m_pclk); if (hdmi_msm_state->hdmi_s_pclk) clk_put(hdmi_msm_state->hdmi_s_pclk); hdmi_msm_state->hdmi_app_clk = NULL; hdmi_msm_state->hdmi_m_pclk = NULL; hdmi_msm_state->hdmi_s_pclk = NULL; kfree(hdmi_msm_state); hdmi_msm_state = NULL; return 0; }
functions
int hdmi_msm_hpd_feature(int on) { int rc = 0; DEV_INFO("%s: %d\n", __func__, on); if (on) { rc = hdmi_msm_hpd_on(); }
functions
__init hdmi_msm_init(void) { int rc; if (msm_fb_detect_client("hdmi_msm")) return 0; #ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY hdmi_prim_display = 1; #endif hdmi_msm_setup_video_mode_lut(); hdmi_msm_state = kzalloc(sizeof(*hdmi_msm_state), GFP_KERNEL); if (!hdmi_msm_state) { pr_err("hdmi_msm_init FAILED: out of memory\n"); rc = -ENOMEM; goto init_exit; }
functions
__exit hdmi_msm_exit(void) { platform_device_unregister(&this_device); platform_driver_unregister(&this_driver); }
functions
int set_hdcp_feature_on(const char *val, const struct kernel_param *kp) { int rv = param_set_bool(val, kp); if (rv) return rv; pr_debug("%s: HDCP feature = %d\n", __func__, hdcp_feature_on); if (hdmi_msm_state) { if ((HDMI_INP(0x0250) & 0x2)) { pr_err("%s: Unable to set HDCP feature", __func__); pr_err("%s: HDMI panel is currently turned on", __func__); }
functions
else if (hdcp_feature_on != hdmi_msm_state->hdcp_enable) { hdmi_msm_config_hdcp_feature(); }
structs
struct pkcs11_callback_data { char *pin_used; X509 *cert; };
functions
void pkcs11_callback_data_release(struct pkcs11_callback_data *data) { erase_and_free(data->pin_used); X509_free(data->cert); }
functions
int pkcs11_callback( CK_FUNCTION_LIST *m, CK_SESSION_HANDLE session, CK_SLOT_ID slot_id, const CK_SLOT_INFO *slot_info, const CK_TOKEN_INFO *token_info, P11KitUri *uri, void *userdata) { _cleanup_(erase_and_freep) char *pin_used = NULL; struct pkcs11_callback_data *data = userdata; CK_OBJECT_HANDLE object; int r; assert(m); assert(slot_info); assert(token_info); assert(uri); assert(data); /* Called for every token matching our URI */ r = pkcs11_token_login(m, session, slot_id, token_info, "home directory operation", "user-home", "pkcs11-pin", UINT64_MAX, &pin_used); if (r < 0) return r; r = pkcs11_token_find_x509_certificate(m, session, uri, &object); if (r < 0) return r; r = pkcs11_token_read_x509_certificate(m, session, object, &data->cert); if (r < 0) return r; /* Let's read some random data off the token and write it to the kernel pool before we generate our * random key from it. This way we can claim the quality of the RNG is at least as good as the * kernel's and the token's pool */ (void) pkcs11_token_acquire_rng(m, session); data->pin_used = TAKE_PTR(pin_used); return 1; }
functions
int acquire_pkcs11_certificate( const char *uri, X509 **ret_cert, char **ret_pin_used) { #if HAVE_P11KIT _cleanup_(pkcs11_callback_data_release) struct pkcs11_callback_data data = {}
functions
int encrypt_bytes( EVP_PKEY *pkey, const void *decrypted_key, size_t decrypted_key_size, void **ret_encrypt_key, size_t *ret_encrypt_key_size) { _cleanup_(EVP_PKEY_CTX_freep) EVP_PKEY_CTX *ctx = NULL; _cleanup_free_ void *b = NULL; size_t l; ctx = EVP_PKEY_CTX_new(pkey, NULL); if (!ctx) return log_error_errno(SYNTHETIC_ERRNO(EIO), "Failed to allocate public key context"); if (EVP_PKEY_encrypt_init(ctx) <= 0) return log_error_errno(SYNTHETIC_ERRNO(EIO), "Failed to initialize public key context"); if (EVP_PKEY_CTX_set_rsa_padding(ctx, RSA_PKCS1_PADDING) <= 0) return log_error_errno(SYNTHETIC_ERRNO(EIO), "Failed to configure PKCS#1 padding"); if (EVP_PKEY_encrypt(ctx, NULL, &l, decrypted_key, decrypted_key_size) <= 0) return log_error_errno(SYNTHETIC_ERRNO(EIO), "Failed to determine encrypted key size"); b = malloc(l); if (!b) return log_oom(); if (EVP_PKEY_encrypt(ctx, b, &l, decrypted_key, decrypted_key_size) <= 0) return log_error_errno(SYNTHETIC_ERRNO(EIO), "Failed to determine encrypted key size"); *ret_encrypt_key = TAKE_PTR(b); *ret_encrypt_key_size = l; return 0; }