type stringclasses 5
values | content stringlengths 9 163k |
|---|---|
includes | #include <linux/crc32.h> |
defines |
#define DEBUG |
defines | #define pr_fmt(fmt) "%s(): " fmt, __func__ |
defines | #define TFA98XX_MAX_I2C_SIZE 252 |
defines |
#define TFA98XX_XMEM_CALIBRATION_DONE 231 /* 0xe7 */ |
defines | #define TFA98XX_XMEM_IMPEDANCE 232 |
defines | #define TFA98XX_XMEM_COUNT_BOOT 161 /* 0xa1 */ |
defines | #define TFA98XX_WAITRESULT_NTRIES 50 |
defines | #define TFA98XX_WAITRESULT_NTRIES_LONG 2000 |
defines | #define MODULE_FRAMEWORK 0 |
defines | #define MODULE_SPEAKERBOOST 1 |
defines | #define MODULE_BIQUADFILTERBANK 2 |
defines | #define MODULE_SETRE 9 |
defines | #define SB_PARAM_SET_LSMODEL 0x06 |
defines | #define SB_PARAM_SET_EQ 0x0A /* 2 Equaliser Filters */ |
defines | #define SB_PARAM_SET_PRESET 0x0D /* Load a preset */ |
defines | #define SB_PARAM_SET_CONFIG 0x0E /* Load a config */ |
defines | #define SB_PARAM_SET_DRC 0x0F |
defines | #define SB_PARAM_SET_AGCINS 0x10 |
defines | #define SB_PARAM_GET_RE0 0x85 |
defines | #define SB_PARAM_GET_LSMODEL 0x86 /* Gets LoudSpeaker Model */ |
defines | #define SB_PARAM_GET_CONFIG_PRESET 0x80 |
defines | #define SB_PARAM_GET_STATE 0xC0 |
defines | #define SB_PARAM_GET_XMODEL 0xC1 /* Gets Excursion Model */ |
defines |
#define SPKRBST_TEMPERATURE_EXP 9 |
defines | #define FW_PARAM_SET_CURRENT_DELAY 0x03 |
defines | #define FW_PARAM_SET_CURFRAC_DELAY 0x06 |
defines | #define FW_PARAM_GET_STATE 0x84 |
defines | #define FW_PARAM_GET_FEATURE_BITS 0x85 |
defines |
#define TO_FIXED(e) e |
defines | #define CalibraMin 6000 |
defines | #define CalibraMax 9000 |
defines |
#define CF_CONTROL 0x8100 |
defines |
#define PATCH_HEADER_LENGTH 6 |
defines |
#define TO_LONG_LONG(x) ((s64)(x)<<32) |
defines | #define TO_INT(x) ((x)>>32) |
defines | #define TFA98XX_BIQUAD_NUM 10 |
defines | #define BIQUAD_COEFF_SIZE 6 |
functions | int tfaRunWriteBitfield(struct tfa98xx *tfa98xx, struct nxpTfaBitfield bf)
{
struct snd_soc_codec *codec = tfa98xx->codec;
u16 value, oldvalue, msk, tmp;
union {
u16 field;
struct nxpTfaBfEnum Enum;
} |
functions | int tfaRunWriteRegister(struct tfa98xx *tfa98xx, struct nxpTfaRegpatch *reg)
{
struct snd_soc_codec *codec = tfa98xx->codec;
u16 value, newvalue;
pr_debug("register: 0x%02x=0x%04x (msk=0x%04x)\n", reg->address,
reg->value, reg->mask);
value = (u16)snd_soc_read(codec, reg->address);
value &= ~reg->mask;
newva... |
functions | int tfa98xx_restore_mtp(struct tfa98xx *tfa98xx)
{
struct snd_soc_codec *codec = tfa98xx->codec;
u16 readValue;
pr_err("%s \n",__func__);
snd_soc_write(codec, 0x40, 0x5a6b);
readValue = (u16)snd_soc_read(codec, 0x8b);
readValue ^= 0x5a;
snd_soc_write(codec, 0x60, readValue);
snd_soc_wri... |
functions | int tfa98xx_restore_i2cmtp(struct tfa98xx *tfa98xx)
{
struct snd_soc_codec *codec = tfa98xx->codec;
u16 readValue;
pr_err("%s\n",__func__);
snd_soc_write(codec, 0x40, 0x5a6b);
readValue = (u16)snd_soc_read(codec, 0x8b);
readValue ^= 0x5a;
snd_soc_write(codec, 0x60, readValue);
snd_soc_w... |
functions | int tfa98xx_dsp_system_stable(struct tfa98xx *tfa98xx, int *ready)
{
struct snd_soc_codec *codec = tfa98xx->codec;
int ret = 0;
u16 status, mtp0, sysctrl;
int tries;
*ready = 0;
/* check the contents of the STATUS register */
status = (u16)snd_soc_read(codec, TFA98XX_STATUSREG);
sysctrl = (u16)snd_soc_read(co... |
functions | int tfa98xx_clockgating(struct tfa98xx *tfa98xx, int on)
{
struct snd_soc_codec *codec = tfa98xx->codec;
u16 value;
pr_debug("%d\n", on);
/* The clockgating hack is used only for the tfa9890 */
if (tfa98xx->rev != REV_TFA9890)
return 0;
/* TFA9890: temporarily disable clock gating when dsp reset is used */
... |
functions | int tfa98xx_dsp_reset(struct tfa98xx *tfa98xx, int state)
{
struct snd_soc_codec *codec = tfa98xx->codec;
u16 value;
pr_debug("\n");
/* TFA9890: temporarily disable clock gating when dsp reset is used */
tfa98xx_clockgating(tfa98xx, 0);
value = snd_soc_read(codec, TFA98XX_CF_CONTROLS);
/* set requested the D... |
functions | int tfa98xx_powerdown(struct tfa98xx *tfa98xx, int powerdown)
{
struct snd_soc_codec *codec = tfa98xx->codec;
u16 value;
pr_debug("%d\n", powerdown);
/* read the SystemControl register, modify the bit and write again */
value = snd_soc_read(codec, TFA98XX_SYS_CTRL);
switch (powerdown) {
case 1:
value |= TFA... |
functions | int tfa98xx_read_data(struct tfa98xx *tfa98xx, u8 address, int len,
u8 *data)
{
/* pr_debug("@%02x, #%d\n", address, len); */
if (tfa98xx_i2c_read(tfa98xx->i2c, address, data, len)) {
pr_err("Error during I2C read\n");
return -EIO;
} |
functions | void tfa98xx_convert_data2bytes(int num_data, const int *data, u8 *bytes)
{
int i, k, d;
/*
* note: cannot just take the lowest 3 bytes from the 32 bit
* integer, because also need to take care of clipping any
* value > 2&23
*/
for (i = 0, k = 0; i < num_data; ++i, k += 3) {
if (data[i] >= 0)
d = MIN(da... |
functions | void tfa98xx_convert_bytes2data(int len, const u8 *bytes, int *data)
{
int i, k, d;
int num_data = len / 3;
for (i = 0, k = 0; i < num_data; ++i, k += 3) {
d = (bytes[k] << 16) | (bytes[k + 1] << 8) | (bytes[k + 2]);
if (bytes[k] & 0x80) /* sign bit was set */
d = -((1 << 24) - d);
data[i] = d;
} |
functions | int tfa98xx_dsp_read_mem(struct tfa98xx *tfa98xx, u16 start_offset,
int num_words, int *values)
{
struct snd_soc_codec *codec = tfa98xx->codec;
int ret = 0;
u16 cf_ctrl; /* to sent to the CF_CONTROLS register */
u8 bytes[MAX_PARAM_SIZE];
int burst_size; /* number of words per burst size */
int bytes_per_word... |
functions | int tfa98xx_write_data(struct tfa98xx *tfa98xx, u8 subaddress, int len,
const u8 *data)
{
struct snd_soc_codec *codec = tfa98xx->codec;
u8 write_data[MAX_PARAM_SIZE];
/* subaddress followed by data */
int count = len + 1;
/* pr_debug("%d\n", len); */
if (count > MAX_PARAM_SIZE) {
pr_err("Error param ... |
functions | int tfa98xx_dsp_write_mem(struct tfa98xx *tfa98xx, unsigned int address,
int value, int memtype)
{
struct snd_soc_codec *codec = tfa98xx->codec;
int ret = 0;
u16 cf_ctrl; /* the value to sent to the CF_CONTROLS register */
u8 bytes[3];
pr_debug("@0x%04x=%d\n", address, value);
/* first set DMEM and AIF, le... |
functions | int tfa98xx_write_dsp_mem(struct tfa98xx *tfa98xx, struct nxpTfaDspMem *cfmem)
{
int ret = 0;
int i;
for(i=0; (i<cfmem->size) && (ret==0); i++) {
ret = tfa98xx_dsp_write_mem(tfa98xx, cfmem->address++,
cfmem->words[i], cfmem->type);
} |
functions | int tfa98xx_filter_mem(struct tfa98xx *tfa98xx,
int filter_index, u16 *address)
{
int dmem = -1;
int idx;
const u16 bq_table[4][4] ={
/* index: 10, 11, 12, 13 */
{346,351,356,288} |
functions | int tfa98xx_write_filter(struct tfa98xx *tfa98xx,
struct nxpTfaBiquadSettings *bq)
{
int dmem;
u16 address;
u8 data[3*3 + sizeof(bq->bytes)];
/* get the target address for the filter on this device */
dmem = tfa98xx_filter_mem(tfa98xx, bq->index, &address);
if (dmem < 0)
return dmem;
/*
* send a DSP me... |
functions | int tfa98xx_dsp_reset_count(struct tfa98xx *tfa98xx)
{
int count;
tfa98xx_dsp_read_mem(tfa98xx, TFA98XX_XMEM_COUNT_BOOT, 1, &count);
return count;
} |
functions | int tfa98xx_wait_calibration(struct tfa98xx *tfa98xx, int *done)
{
struct snd_soc_codec *codec = tfa98xx->codec;
int ret = 0;
int tries = 0;
u16 mtp;
u8 bytes[3];
int data[1];
u32 calibraValue = 0;
*done = 0;
mtp = snd_soc_read(codec, TFA98XX_MTP);
pr_debug("TFA98XX_MTP 0x%04x\n", mtp);
/* in case of ... |
functions | int tfa9887_specific(struct tfa98xx *tfa98xx)
{
struct snd_soc_codec *codec = tfa98xx->codec;
u16 value;
pr_debug("\n");
value = snd_soc_read(codec, TFA98XX_SYS_CTRL);
/* DSP must be in control of the amplifier to avoid plops */
value |= TFA98XX_SYS_CTRL_AMPE_MSK;
snd_soc_write(codec, TFA98XX_SYS_CTRL, value);... |
functions | int tfa9887B_specific(struct tfa98xx *tfa98xx)
{
struct snd_soc_codec *codec = tfa98xx->codec;
u16 value;
pr_debug("\n");
/* all i2C registers are already set to default */
value = snd_soc_read(codec, TFA98XX_SYS_CTRL);
/* DSP must be in control of the amplifier to avoid plops */
value |= TFA98XX_SYS_CTRL_AMPE... |
functions | int tfa9890_specific(struct tfa98xx *tfa98xx)
{
struct snd_soc_codec *codec = tfa98xx->codec;
u16 reg;
pr_debug("\n");
/* all i2C registers are already set to default for N1C2 */
/* some PLL registers must be set optimal for amplifier behaviour */
snd_soc_write(codec, 0x40, 0x5a6b);
reg = snd_soc_read(codec, ... |
functions | int tfa9897_specific(struct tfa98xx *tfa98xx)
{
struct snd_soc_codec *codec = tfa98xx->codec;
u16 reg;
pr_debug("\n");
/* all i2C registers must already set to default POR value */
/* $48:[3] - 1 ==> 0; iddqtestbst - default value changed. */
snd_soc_write(codec, 0x48, 0x0300); /* POR value = 0x308 */
/* $49... |
functions | int tfa98xx_is87(struct tfa98xx *tfa98xx)
{
struct snd_soc_codec *codec = tfa98xx->codec;
u16 save_value, check_value;
pr_debug("\n");
save_value = snd_soc_read(codec, 0x08);
/* if clear it's 87 */
if ((save_value & 0x0400) == 0)
return 1;
/* try to clear pvp bit */
snd_soc_write(codec, 0x08, (save_value ... |
functions | int tfa98xx_init(struct tfa98xx *tfa98xx)
{
struct snd_soc_codec *codec = tfa98xx->codec;
int ret;
pr_debug("Reset all i2c registers\n");
/* reset all i2c registers to default */
snd_soc_write(codec, TFA98XX_SYS_CTRL, TFA98XX_SYS_CTRL_I2CR_MSK);
switch (tfa98xx->rev) {
case 0x12:
if (tfa98xx_is87(tfa98xx))
... |
functions | int tfa98xx_startup(struct tfa98xx *tfa98xx)
{
int tries, status, ret;
struct snd_soc_codec *codec = tfa98xx->codec;
u16 statusreg = 0;
u16 mtp0;
pr_debug("\n");
/* load the optimal TFA98XX in HW settings */
ret = tfa98xx_init(tfa98xx);
/*
* I2S settings to define the audio input properties
* the... |
functions | int tfa98xx_is_coldboot(struct tfa98xx *tfa98xx)
{
struct snd_soc_codec *codec = tfa98xx->codec;
u16 status;
/* check status ACS bit to set */
status = snd_soc_read(codec, TFA98XX_STATUSREG);
pr_debug("ACS %d\n", (status & TFA98XX_STATUSREG_ACS) != 0);
return (status & TFA98XX_STATUSREG_ACS) != 0;
} |
functions | int tfa98xx_is_pwdn(struct tfa98xx *tfa98xx)
{
struct snd_soc_codec *codec = tfa98xx->codec;
u16 status;
/* check if PWDN bit is clear by looking at AREFS */
status = snd_soc_read(codec, TFA98XX_STATUSREG);
pr_debug("AREFS %d\n", (status & TFA98XX_STATUSREG_AREFS) != 0);
return (status & TFA98XX_STATUSREG_AREF... |
functions | int tfa98xx_is_amp_running(struct tfa98xx *tfa98xx)
{
struct snd_soc_codec *codec = tfa98xx->codec;
u16 status;
/* check status SWS bit to set */
status = snd_soc_read(codec, TFA98XX_STATUSREG);
pr_debug("SWS %d\n", (status & TFA98XX_STATUSREG_SWS_MSK) != 0);
return (status & TFA98XX_STATUSREG_SWS_MSK) != 0;
} |
functions | int tfa98xx_coldboot(struct tfa98xx *tfa98xx, int state)
{
int ret = 0;
int tries = 10;
pr_debug("\n");
/* repeat set ACS bit until set as requested */
while (state == !tfa98xx_is_coldboot(tfa98xx)) {
/* set coldstarted in CF_CONTROL to force ACS */
ret = tfa98xx_dsp_write_mem(tfa98xx, CF_CONTROL, state,
... |
functions | int tfa98xx_dsp_power_up(struct tfa98xx *tfa98xx)
{
int ret = 0;
int tries, status;
u16 mtp0;
struct snd_soc_codec *codec = tfa98xx->codec;
/* power on the sub system */
ret = tfa98xx_powerdown(tfa98xx, 0);
pr_debug("Waiting for DSP system stable...\n");
/* wait until everything is stable, in case clock has b... |
functions | int tfa98xx_check_ic_rom_version(struct tfa98xx *tfa98xx,
const u8 patchheader[])
{
int ret = 0;
u16 checkrev;
u16 checkaddress;
int checkvalue;
int value = 0;
int status;
pr_debug("FW rev: %x, IC rev %x\n", patchheader[0], tfa98xx->rev);
checkrev = patchheader[0];
if ((checkrev != 0xff) && (checkrev !=... |
functions | int tfa98xx_process_patch_file(struct tfa98xx *tfa98xx, int len, const u8 *data)
{
struct snd_soc_codec *codec = tfa98xx->codec;
u16 size;
int index;
int ret = 0;
u8 chunk_buf[TFA98XX_MAX_I2C_SIZE + 1];
pr_debug("len %d\n", len);
/*
* expect following format in patchBytes:
* 2 bytes len of I2C transaction ... |
functions | int tfa98xx_dsp_patch(struct tfa98xx *tfa98xx, int patchLength,
const u8 *patchBytes)
{
int ret = 0;
pr_debug("\n");
if (patchLength < PATCH_HEADER_LENGTH)
return -EINVAL;
ret = tfa98xx_check_ic_rom_version(tfa98xx, patchBytes);
if (ret) {
pr_err("Error, patch in container file does not match device... |
functions | int tfa98xx_set_configured(struct tfa98xx *tfa98xx)
{
struct snd_soc_codec *codec = tfa98xx->codec;
u16 value;
pr_debug("\n");
/* read the SystemControl register, modify the bit and write again */
value = snd_soc_read(codec, TFA98XX_SYS_CTRL);
value |= TFA98XX_SYS_CTRL_SBSL_MSK;
snd_soc_write(codec, TFA98XX_SY... |
functions | int float_to_int(u32 x)
{
unsigned e = (0x7F + 31) - ((*(unsigned *) &x & 0x7F800000) >> 23);
unsigned m = 0x80000000 | (*(unsigned *) &x << 8);
return (int)((m >> e) & -(e < 32));
} |
functions | int tfa98xx_set_volume(struct tfa98xx *tfa98xx, u32 voldB)
{
struct snd_soc_codec *codec = tfa98xx->codec;
u16 value;
int volume_value;
#ifdef CONFIG_SOUND_CONTROL
s64 cur_volume;
tfa98xx_get_volume(tfa98xx, &cur_volume);
#endif
value = snd_soc_read(codec, TFA98XX_AUDIO_CTR);
/*
* 0x00 -> 0.0 dB
* 0x01 ->... |
functions | int tfa98xx_get_volume(struct tfa98xx *tfa98xx, s64 *pVoldB)
{
struct snd_soc_codec *codec = tfa98xx->codec;
int ret = 0;
u16 value;
pr_debug("\n");
value = snd_soc_read(codec, TFA98XX_AUDIO_CTR);
value >>= 8;
*pVoldB = TO_FIXED(value) / -2;
return ret;
} |
functions | int tfa98xx_set_mute(struct tfa98xx *tfa98xx, enum Tfa98xx_Mute mute)
{
struct snd_soc_codec *codec = tfa98xx->codec;
int ret = 0;
u16 audioctrl_value;
u16 sysctrl_value;
pr_debug("\n");
audioctrl_value = snd_soc_read(codec, TFA98XX_AUDIO_CTR);
sysctrl_value = snd_soc_read(codec, TFA98XX_SYS_CTRL);
switch (m... |
functions | int tfa98xx_mute(struct tfa98xx *tfa98xx)
{
struct snd_soc_codec *codec = tfa98xx->codec;
int ret = 0;
u16 status;
int tries = 0;
pr_debug("\n");
/* signal the TFA98XX to mute plop free and turn off the amplifier */
ret = tfa98xx_set_mute(tfa98xx, Tfa98xx_Mute_Amplifier);
if (ret)
return ret;
/* now wait ... |
functions | int tfa98xx_unmute(struct tfa98xx *tfa98xx)
{
int ret = 0;
/* signal the TFA98XX to mute */
ret = tfa98xx_set_mute(tfa98xx, Tfa98xx_Mute_Off);
pr_debug("-------------------unmuted ------------------\n");
return ret;
} |
functions | int tfa98xx_check_size(enum Tfa98xx_DMEM which_mem, int len)
{
int ret = 0;
int modulo_size = 1;
switch (which_mem) {
case Tfa98xx_DMEM_PMEM:
/* 32 bit PMEM */
modulo_size = 4;
break;
case Tfa98xx_DMEM_XMEM:
case Tfa98xx_DMEM_YMEM:
case Tfa98xx_DMEM_IOMEM:
/* 24 bit MEM */
modulo_size = 3;
break;
d... |
functions | int tfa98xx_execute_param(struct tfa98xx *tfa98xx)
{
struct snd_soc_codec *codec = tfa98xx->codec;
/* the value to be sent to the CF_CONTROLS register: cf_req=00000000,
* cf_int=0, cf_aif=0, cf_dmem=XMEM=01, cf_rst_dsp=0 */
u16 cf_ctrl = 0x0002;
cf_ctrl |= (1 << 8) | (1 << 4); /* set the cf_req1 and cf_int bit *... |
functions | int tfa98xx_wait_result(struct tfa98xx *tfa98xx, int waitRetryCount)
{
struct snd_soc_codec *codec = tfa98xx->codec;
int ret = 0;
u16 cf_status; /* the contents of the CF_STATUS register */
int tries = 0;
/* don't wait forever, DSP is pretty quick to respond (< 1ms) */
do {
cf_status = snd_soc_read(codec, TFA9... |
functions | int tfa98xx_check_rpc_status(struct tfa98xx *tfa98xx, int *status)
{
int ret = 0;
/* the value to sent to the * CF_CONTROLS register: cf_req=00000000,
* cf_int=0, cf_aif=0, cf_dmem=XMEM=01, cf_rst_dsp=0 */
u16 cf_ctrl = 0x0002;
/* memory address to be accessed (0: Status, 1: ID, 2: parameters) */
u16 cf_mad = 0x... |
functions | int tfa98xx_write_parameter(struct tfa98xx *tfa98xx,
u8 module_id,
u8 param_id,
int len, const u8 data[])
{
int ret;
/*
* the value to be sent to the CF_CONTROLS register: cf_req=00000000,
* cf_int=0, cf_aif=0, cf_dmem=XMEM=01, cf_rst_dsp=0
*/
u16 cf_ctrl = 0x0002;
/* memory address to b... |
functions | int tfa98xx_dsp_set_param_var_wait(struct tfa98xx *tfa98xx,
u8 module_id,
u8 param_id, int len,
const u8 data[], int waitRetryCount)
{
int ret = 0;
int status = 0;
/* pr_debug("\n"); */
/* 1) write the id and data to the DSP XMEM */
ret = tfa98xx_write_parameter(tfa98xx, module_id, param_id,... |
functions | int tfa98xx_dsp_set_param(struct tfa98xx *tfa98xx, u8 module_id,
u8 param_id, int len,
const u8 *data)
{
/* Use small WaitResult retry count */
return tfa98xx_dsp_set_param_var_wait(tfa98xx, module_id, param_id,
len, data,
TFA98XX_WAITRESULT_NTRIES);
} |
functions | int tfa98xx_dsp_write_config(struct tfa98xx *tfa98xx, int len, const u8 *data)
{
int ret = 0;
int has_drc = 0;
pr_debug("\n");
ret = tfa98xx_dsp_set_param(tfa98xx, MODULE_SPEAKERBOOST,
SB_PARAM_SET_CONFIG, len, data);
if (ret)
return ret;
ret = tfa98xx_dsp_support_drc(tfa98xx, &has_drc);
if (ret)
... |
functions | int tfa98xx_dsp_biquad_disable(struct tfa98xx *tfa98xx, int biquad_index)
{
int coeff_buffer[BIQUAD_COEFF_SIZE];
u8 data[BIQUAD_COEFF_SIZE * 3];
if (biquad_index > TFA98XX_BIQUAD_NUM)
return -EINVAL;
if (biquad_index < 1)
return -EINVAL;
/* set in correct order and format for the DSP */
coeff_buffer[0] = (... |
functions | int tfa98xx_dsp_biquad_set_coeff(struct tfa98xx *tfa98xx, int biquad_index,
int len, u8 *data)
{
return tfa98xx_dsp_set_param(tfa98xx, MODULE_BIQUADFILTERBANK,
biquad_index, len, data);
} |
functions | int tfa98xx_dsp_set_agc_gain_insert(struct tfa98xx *tfa98xx,
enum Tfa98xx_AgcGainInsert
agcGainInsert)
{
int ret = 0;
unsigned char bytes[3];
pr_debug("\n");
tfa98xx_convert_data2bytes(1, (int *) &agcGainInsert, bytes);
ret = tfa98xx_dsp_set_param(tfa98xx, MODULE_SPEAKERBOOST,
SB_PARAM... |
functions | int tfa98xx_dsp_write_speaker_parameters(struct tfa98xx *tfa98xx, int len,
const u8 *data)
{
int ret = 0;
int has_drc = 0;
if (!data)
return -EINVAL;
pr_debug("%d\n", len);
ret = tfa98xx_dsp_set_param_var_wait(tfa98xx, MODULE_SPEAKERBOOST,
SB_PARAM_SET_LSMODEL, len,
data,
... |
functions | int tfa98xx_dsp_write_preset(struct tfa98xx *tfa98xx, int len, const u8 *data)
{
if (!data)
return -EINVAL;
pr_debug("\n");
return tfa98xx_dsp_set_param(tfa98xx, MODULE_SPEAKERBOOST,
SB_PARAM_SET_PRESET, len, data);
} |
functions | int tfa98xx_dsp_write_drc(struct tfa98xx *tfa98xx, int len, const u8 *data)
{
if (!data)
return -EINVAL;
pr_debug("\n");
return tfa98xx_dsp_set_param(tfa98xx, MODULE_SPEAKERBOOST,
SB_PARAM_SET_DRC, len, data);
} |
functions | int tfa98xx_dsp_get_param(struct tfa98xx *tfa98xx, u8 module_id,
u8 param_id, int len, u8 *data)
{
struct snd_soc_codec *codec = tfa98xx->codec;
int ret = 0;
u16 cf_mad;
int status = 0;
int offset = 0;
int chunk_size = ROUND_DOWN(TFA98XX_MAX_I2C_SIZE, 3);
int remaining_bytes = len;
pr_debug("\n");
ret =... |
functions | int tfa98xx_dsp_get_sw_feature_bits(struct tfa98xx *tfa98xx, int features[2])
{
int ret = 0;
unsigned char bytes[3 * 2];
pr_debug("\n");
ret = tfa98xx_dsp_get_param(tfa98xx, MODULE_FRAMEWORK,
FW_PARAM_GET_FEATURE_BITS,
sizeof(bytes), bytes);
/* old ROM code may respond with ERROR_RPC_PARAMID -> -EIO */... |
functions | int tfa98xx_dsp_support_drc(struct tfa98xx *tfa98xx, int *has_drc)
{
int ret = 0;
*has_drc = 0;
pr_debug("\n");
if (tfa98xx->has_drc) {
*has_drc = tfa98xx->has_drc;
} |
functions | else if (ret == -EIO) {
/* older ROM code, doesn't support it */
*has_drc = 0;
ret = 0;
} |
functions | int tfa98xx_resolve_incident(struct tfa98xx *tfa98xx)
{
if (tfa98xx->rev == REV_TFA9897) {
pr_warn("OCDS TFA9897 trigger\n");
/* TFA9897 need to reset the DSP to take the newly set re0 */
tfa98xx_dsp_reset(tfa98xx, 1);
tfa98xx_dsp_reset(tfa98xx, 0);
} |
functions | int tfa98xx_dsp_get_calibration_impedance(struct tfa98xx *tfa98xx, u32 *re25)
{
int ret = 0;
u8 bytes[3];
int data[1];
int done;
pr_debug("\n");
ret = tfa98xx_dsp_read_mem(tfa98xx, TFA98XX_XMEM_CALIBRATION_DONE, 1,
&done);
if (ret)
return ret;
if (!done) {
pr_err("Calibration not done %d\n", done)... |
functions | int tfa98xx_aec_output(struct tfa98xx *tfa98xx, int enable)
{
struct snd_soc_codec *codec = tfa98xx->codec;
u16 value;
int ret = 0;
if (tfa98xx->rev == REV_TFA9897) {
/*
* 97 powerdown already handled this internally by disabling
* TDM interface
*/
return ret;
} |
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