type stringclasses 5
values | content stringlengths 9 163k |
|---|---|
functions | int mv88e6390_serdes_10g(struct mv88e6xxx_chip *chip, int addr, bool on)
{
u16 val, new_val;
int reg_c45;
int err;
reg_c45 = MII_ADDR_C45 | MV88E6390_SERDES_DEVICE |
MV88E6390_PCS_CONTROL_1;
err = mv88e6xxx_phy_read(chip, addr, reg_c45, &val);
if (err)
return err;
if (on)
new_val = val & ~(MV88E6390_PCS_... |
functions | int mv88e6390_serdes_sgmii(struct mv88e6xxx_chip *chip, int addr,
bool on)
{
u16 val, new_val;
int reg_c45;
int err;
reg_c45 = MII_ADDR_C45 | MV88E6390_SERDES_DEVICE |
MV88E6390_SGMII_CONTROL;
err = mv88e6xxx_phy_read(chip, addr, reg_c45, &val);
if (err)
return err;
if (on)
new_val = val & ~(MV88E6... |
functions | int mv88e6390_serdes_lower(struct mv88e6xxx_chip *chip, u8 cmode,
int port_donor, int lane, bool rxaui, bool on)
{
int err;
u8 cmode_donor;
err = mv88e6xxx_port_get_cmode(chip, port_donor, &cmode_donor);
if (err)
return err;
switch (cmode_donor) {
case MV88E6XXX_PORT_STS_CMODE_RXAUI:
if (!rxaui)
br... |
functions | int mv88e6390_serdes_port9(struct mv88e6xxx_chip *chip, u8 cmode,
bool on)
{
switch (cmode) {
case MV88E6XXX_PORT_STS_CMODE_1000BASE_X:
case MV88E6XXX_PORT_STS_CMODE_SGMII:
return mv88e6390_serdes_sgmii(chip, MV88E6390_PORT9_LANE0, on);
case MV88E6XXX_PORT_STS_CMODE_XAUI:
case MV88E6XXX_PORT_STS_CMODE_RXAU... |
functions | int mv88e6390_serdes_port10(struct mv88e6xxx_chip *chip, u8 cmode,
bool on)
{
switch (cmode) {
case MV88E6XXX_PORT_STS_CMODE_SGMII:
return mv88e6390_serdes_sgmii(chip, MV88E6390_PORT10_LANE0, on);
case MV88E6XXX_PORT_STS_CMODE_XAUI:
case MV88E6XXX_PORT_STS_CMODE_RXAUI:
case MV88E6XXX_PORT_STS_CMODE_1000BA... |
functions | int mv88e6390_serdes_power(struct mv88e6xxx_chip *chip, int port, bool on)
{
u8 cmode;
int err;
err = mv88e6xxx_port_get_cmode(chip, port, &cmode);
if (err)
return err;
switch (port) {
case 2:
return mv88e6390_serdes_lower(chip, cmode, 9,
MV88E6390_PORT9_LANE1,
false, on);
case 3:
r... |
includes |
#include <reent.h> |
includes | #include <unistd.h> |
includes | #include <_syslist.h> |
includes | #include <reent.h> |
defines | #define REENTRANT_SYSCALLS_PROVIDED |
functions | _off_t
_lseek_r (struct _reent *ptr,
int fd,
_off_t pos,
int whence)
{
_off_t ret;
errno = 0;
if ((ret = _lseek (fd, pos, whence)) == (_off_t) -1 && errno != 0)
ptr->_errno = errno;
return ret;
} |
includes | #include <linux/debugfs.h> |
includes | #include <linux/delay.h> |
includes | #include <linux/errno.h> |
includes | #include <linux/init.h> |
includes | #include <linux/io.h> |
includes | #include <linux/of.h> |
includes | #include <linux/kernel.h> |
includes | #include <linux/module.h> |
includes | #include <linux/platform_device.h> |
includes | #include <linux/sched.h> |
includes | #include <linux/slab.h> |
includes | #include <linux/types.h> |
includes |
#include <asm/uaccess.h> |
includes |
#include <mach/msm_iomap.h> |
defines | #define PADDED_LENGTH(x) (0xFFFFFFFC & ((x) + 3)) |
defines | #define PRINTED_LENGTH(x) ((x) * 6 + 3) |
defines | #define RECHECK_TIME (50) |
defines |
#define VERSION_8974 0x1000 |
defines | #define RPM_ULOG_LENGTH_SHIFT 16 |
defines | #define RPM_ULOG_LENGTH_MASK 0xFFFF0000 |
structs | struct msm_rpm_log_buffer {
char *data;
u32 len;
u32 pos;
struct mutex mutex;
u32 max_len;
u32 read_idx;
struct msm_rpm_log_platform_data *pdata;
}; |
functions | u32
msm_rpm_log_read(const struct msm_rpm_log_platform_data *pdata, u32 page,
u32 reg)
{
return readl_relaxed(pdata->reg_base + pdata->reg_offsets[page]
+ reg * 4);
} |
functions | u32 msm_rpm_log_copy(const struct msm_rpm_log_platform_data *pdata,
char *msg_buffer, u32 buf_len, u32 *read_idx)
{
u32 head_idx, tail_idx;
u32 pos = 0;
u32 i = 0;
u32 msg_len;
u32 pos_start;
char temp[4];
tail_idx = msm_rpm_log_read(pdata, MSM_RPM_LOG_PAGE_INDICES,
MSM_RPM_LOG_TAIL);
head_idx =... |
functions | ssize_t msm_rpm_log_file_read(struct file *file, char __user *bufu,
size_t count, loff_t *ppos)
{
u32 out_len, remaining;
struct msm_rpm_log_platform_data *pdata;
struct msm_rpm_log_buffer *buf;
buf = file->private_data;
if (!buf)
return -ENOMEM;
pdata = buf->pdata;
if (!pdata)
return -EINVAL;
... |
functions | int msm_rpm_log_file_open(struct inode *inode, struct file *file)
{
struct msm_rpm_log_buffer *buf;
struct msm_rpm_log_platform_data *pdata;
pdata = inode->i_private;
if (!pdata)
return -EINVAL;
file->private_data =
kmalloc(sizeof(struct msm_rpm_log_buffer), GFP_KERNEL);
if (!file->private_data) {
pr_e... |
functions | int msm_rpm_log_file_close(struct inode *inode, struct file *file)
{
kfree(((struct msm_rpm_log_buffer *)file->private_data)->data);
kfree(file->private_data);
return 0;
} |
functions | __devinit msm_rpm_log_probe(struct platform_device *pdev)
{
struct dentry *dent;
struct msm_rpm_log_platform_data *pdata;
struct resource *res = NULL;
struct device_node *node = NULL;
phys_addr_t page_buffer_address, rpm_addr_phys;
int ret = 0;
char *key = NULL;
uint32_t val = 0;
node = pdev->dev.of_node;
i... |
functions | __devexit msm_rpm_log_remove(struct platform_device *pdev)
{
struct dentry *dent;
struct msm_rpm_log_platform_data *pdata;
pdata = pdev->dev.platform_data;
iounmap(pdata->reg_base);
dent = platform_get_drvdata(pdev);
debugfs_remove(dent);
platform_set_drvdata(pdev, NULL);
pr_notice("%s: OK\n", __func__);
r... |
functions | __init msm_rpm_log_init(void)
{
return platform_driver_register(&msm_rpm_log_driver);
} |
functions | __exit msm_rpm_log_exit(void)
{
platform_driver_unregister(&msm_rpm_log_driver);
} |
includes |
#include <linux/videodev2.h> |
includes | #include <linux/mutex.h> |
includes | #include <linux/slab.h> |
includes | #include <linux/bitrev.h> |
defines | #define REG_SHADOW_START 5 |
defines | #define NUM_REGS 27 |
defines | #define NUM_IMR 5 |
defines | #define IMR_TRIAL 9 |
defines |
#define VER_NUM 49 |
defines |
#define VCO_POWER_REF 0x02 |
defines | #define DIP_FREQ 32000000 |
structs | struct r820t_sect_type {
u8 phase_y;
u8 gain_x;
u16 value;
}; |
structs | struct r820t_priv {
struct list_head hybrid_tuner_instance_list;
const struct r820t_config *cfg;
struct tuner_i2c_props i2c_props;
struct mutex lock;
u8 regs[NUM_REGS];
u8 buf[NUM_REGS + 1];
enum xtal_cap_value xtal_cap_sel;
u16 pll; /* kHz */
u32 int_freq;
u8 fil_cal_code;
bool imr_d... |
structs | struct r820t_freq_range {
u32 freq;
u8 open_d;
u8 rf_mux_ploy;
u8 tf_c;
u8 xtal_cap20p;
u8 xtal_cap10p;
u8 xtal_cap0p;
u8 imr_mem; /* Not used, currently */
}; |
functions | void shadow_store(struct r820t_priv *priv, u8 reg, const u8 *val,
int len)
{
int r = reg - REG_SHADOW_START;
if (r < 0) {
len += r;
r = 0;
} |
functions | int r820t_write(struct r820t_priv *priv, u8 reg, const u8 *val,
int len)
{
int rc, size, pos = 0;
/* Store the shadow registers */
shadow_store(priv, reg, val, len);
do {
if (len > priv->cfg->max_i2c_msg_len - 1)
size = priv->cfg->max_i2c_msg_len - 1;
else
size = len;
/* Fill I2C buffer */
... |
functions | int r820t_write_reg(struct r820t_priv *priv, u8 reg, u8 val)
{
u8 tmp = val; /* work around GCC PR81715 with asan-stack=1 */
return r820t_write(priv, reg, &tmp, 1);
} |
functions | int r820t_read_cache_reg(struct r820t_priv *priv, int reg)
{
reg -= REG_SHADOW_START;
if (reg >= 0 && reg < NUM_REGS)
return priv->regs[reg];
else
return -EINVAL;
} |
functions | int r820t_write_reg_mask(struct r820t_priv *priv, u8 reg, u8 val,
u8 bit_mask)
{
u8 tmp = val;
int rc = r820t_read_cache_reg(priv, reg);
if (rc < 0)
return rc;
tmp = (rc & ~bit_mask) | (tmp & bit_mask);
return r820t_write(priv, reg, &tmp, 1);
} |
functions | int r820t_read(struct r820t_priv *priv, u8 reg, u8 *val, int len)
{
int rc, i;
u8 *p = &priv->buf[1];
priv->buf[0] = reg;
rc = tuner_i2c_xfer_send_recv(&priv->i2c_props, priv->buf, 1, p, len);
if (rc != len) {
tuner_info("%s: i2c rd failed=%d reg=%02x len=%d: %*ph\n",
__func__, rc, reg, len, len, p);
i... |
functions | int r820t_set_mux(struct r820t_priv *priv, u32 freq)
{
const struct r820t_freq_range *range;
int i, rc;
u8 val, reg08, reg09;
/* Get the proper frequency range */
freq = freq / 1000000;
for (i = 0; i < ARRAY_SIZE(freq_ranges) - 1; i++) {
if (freq < freq_ranges[i + 1].freq)
break;
} |
functions | int r820t_set_pll(struct r820t_priv *priv, enum v4l2_tuner_type type,
u32 freq)
{
u32 vco_freq;
int rc, i;
unsigned sleep_time = 10000;
u32 vco_fra; /* VCO contribution by SDM (kHz) */
u32 vco_min = 1770000;
u32 vco_max = vco_min * 2;
u32 pll_ref;
u16 n_sdm = 2;
u16 sdm = 0;
u8 mix_div = 2;
u8 div_buf... |
functions | else if (vco_fra > pll_ref * 127 / 64) {
vco_fra = 0;
nint++;
} |
functions | int r820t_sysfreq_sel(struct r820t_priv *priv, u32 freq,
enum v4l2_tuner_type type,
v4l2_std_id std,
u32 delsys)
{
int rc;
u8 mixer_top, lna_top, cp_cur, div_buf_cur, lna_vth_l, mixer_vth_l;
u8 air_cable1_in, cable2_in, pre_dect, lna_discharge, filter_cur;
tuner_dbg("adjusting tuner paramet... |
functions | int r820t_set_tv_standard(struct r820t_priv *priv,
unsigned bw,
enum v4l2_tuner_type type,
v4l2_std_id std, u32 delsys)
{
int rc, i;
u32 if_khz, filt_cal_lo;
u8 data[5], val;
u8 filt_gain, img_r, filt_q, hp_cor, ext_enable, loop_through;
u8 lt_att, flt_ext_widest, polyfil_cur;
bool need_calibratio... |
functions | else if (delsys == SYS_DVBC_ANNEX_A) {
if_khz = 5070;
filt_cal_lo = 73500;
filt_gain = 0x10; /* +3db, 6mhz on */
img_r = 0x00; /* image negative */
filt_q = 0x10; /* r10[4]:low q(1'b1) */
hp_cor = 0x0b; /* 1.7m disable, +0cap, 1.0mhz */
ext_enable = 0x40; /* r30[6]=1 ext enable; r30[5]:1 ext at lna max... |
functions | else if (delsys == SYS_DVBC_ANNEX_C) {
if_khz = 4063;
filt_cal_lo = 55000;
filt_gain = 0x10; /* +3db, 6mhz on */
img_r = 0x00; /* image negative */
filt_q = 0x10; /* r10[4]:low q(1'b1) */
hp_cor = 0x6a; /* 1.7m disable, +0cap, 1.0mhz */
ext_enable = 0x40; /* r30[6]=1 ext enable; r30[5]:1 ext at lna max... |
functions | else if (bw == 7) {
#if 0
/*
* There are two 7 MHz tables defined on the original
* driver, but just the second one seems to be visible
* by rtl2832. Keep this one here commented, as it
* might be needed in the future
*/
if_khz = 4070;
filt_cal_lo = 60000;
filt_gain = 0x10; /* +3db, 6mh... |
functions | int r820t_read_gain(struct r820t_priv *priv)
{
u8 data[4];
int rc;
rc = r820t_read(priv, 0x00, data, sizeof(data));
if (rc < 0)
return rc;
return ((data[3] & 0x08) << 1) + ((data[3] & 0xf0) >> 4);
} |
functions | int r820t_set_gain_mode(struct r820t_priv *priv,
bool set_manual_gain,
int gain)
{
int rc;
if (set_manual_gain) {
int i, total_gain = 0;
uint8_t mix_index = 0, lna_index = 0;
u8 data[4];
/* LNA auto off */
rc = r820t_write_reg_mask(priv, 0x05, 0x10, 0x10);
if (rc < 0)
return rc;
... |
functions | int generic_set_freq(struct dvb_frontend *fe,
u32 freq /* in HZ */,
unsigned bw,
enum v4l2_tuner_type type,
v4l2_std_id std, u32 delsys)
{
struct r820t_priv *priv = fe->tuner_priv;
int rc;
u32 lo_freq;
tuner_dbg("should set frequency to %d kHz, bw %d MHz\n",
freq / 1000, bw);... |
functions | int r820t_standby(struct r820t_priv *priv)
{
int rc;
/* If device was not initialized yet, don't need to standby */
if (!priv->init_done)
return 0;
rc = r820t_write_reg(priv, 0x06, 0xb1);
if (rc < 0)
return rc;
rc = r820t_write_reg(priv, 0x05, 0x03);
if (rc < 0)
return rc;
rc = r820t_write_reg(priv, 0x0... |
functions | int r820t_xtal_check(struct r820t_priv *priv)
{
int rc, i;
u8 data[3], val;
/* Initialize the shadow registers */
memcpy(priv->regs, r820t_init_array, sizeof(r820t_init_array));
/* cap 30pF & Drive Low */
rc = r820t_write_reg_mask(priv, 0x10, 0x0b, 0x0b);
if (rc < 0)
return rc;
/* set pll autotune = 128kHz... |
functions | int r820t_imr_prepare(struct r820t_priv *priv)
{
int rc;
/* Initialize the shadow registers */
memcpy(priv->regs, r820t_init_array, sizeof(r820t_init_array));
/* lna off (air-in off) */
rc = r820t_write_reg_mask(priv, 0x05, 0x20, 0x20);
if (rc < 0)
return rc;
/* mixer gain mode = manual */
rc = r820t_write... |
functions | int r820t_multi_read(struct r820t_priv *priv)
{
int rc, i;
u16 sum = 0;
u8 data[2], min = 255, max = 0;
usleep_range(5000, 6000);
for (i = 0; i < 6; i++) {
rc = r820t_read(priv, 0x00, data, sizeof(data));
if (rc < 0)
return rc;
sum += data[1];
if (data[1] < min)
min = data[1];
if (data[1] > ma... |
functions | int r820t_imr_cross(struct r820t_priv *priv,
struct r820t_sect_type iq_point[3],
u8 *x_direct)
{
struct r820t_sect_type cross[5]; /* (0,0)(0,Q-1)(0,I-1)(Q-1,0)(I-1,0) */
struct r820t_sect_type tmp;
int i, rc;
u8 reg08, reg09;
reg08 = r820t_read_cache_reg(priv, 8) & 0xc0;
reg09 = r820t_read_cache_reg(... |
functions | void r820t_compre_cor(struct r820t_sect_type iq[3])
{
int i;
for (i = 3; i > 0; i--) {
if (iq[0].value > iq[i - 1].value)
swap(iq[0], iq[i - 1]);
} |
functions | int r820t_compre_step(struct r820t_priv *priv,
struct r820t_sect_type iq[3], u8 reg)
{
int rc;
struct r820t_sect_type tmp;
/*
* Purpose: if (Gain<9 or Phase<9), Gain+1 or Phase+1 and compare
* with min value:
* new < min => update to min and continue
* new > min => Exit
*/
/* min value already... |
functions | int r820t_iq_tree(struct r820t_priv *priv,
struct r820t_sect_type iq[3],
u8 fix_val, u8 var_val, u8 fix_reg)
{
int rc, i;
u8 tmp, var_reg;
/*
* record IMC results by input gain/phase location then adjust
* gain or phase positive 1 step and negtive 1 step,
* both record results
*/
if (fix_reg == 0x... |
functions | else if (i == 1) { /* try left-side point */
/* if absolute location is 1, change I/Q direction */
if ((var_val & 0x1f) < 0x02) {
tmp = 2 - (var_val & 0x1f);
/* b[5]:I/Q selection. 0:Q-path, 1:I-path */
if (var_val & 0x20) {
var_val &= 0xc0;
var_val |= tmp;
} |
functions | int r820t_section(struct r820t_priv *priv,
struct r820t_sect_type *iq_point)
{
int rc;
struct r820t_sect_type compare_iq[3], compare_bet[3];
/* Try X-1 column and save min result to compare_bet[0] */
if (!(iq_point->gain_x & 0x1f))
compare_iq[0].gain_x = ((iq_point->gain_x) & 0xdf) + 1; /* Q-path, Gain=1 */... |
functions | int r820t_vga_adjust(struct r820t_priv *priv)
{
int rc;
u8 vga_count;
/* increase vga power to let image significant */
for (vga_count = 12; vga_count < 16; vga_count++) {
rc = r820t_write_reg_mask(priv, 0x0c, vga_count, 0x0f);
if (rc < 0)
return rc;
usleep_range(10000, 11000);
rc = r820t_multi_read(p... |
functions | int r820t_iq(struct r820t_priv *priv, struct r820t_sect_type *iq_pont)
{
struct r820t_sect_type compare_iq[3];
int rc;
u8 x_direction = 0; /* 1:x, 0:y */
u8 dir_reg, other_reg;
r820t_vga_adjust(priv);
rc = r820t_imr_cross(priv, compare_iq, &x_direction);
if (rc < 0)
return rc;
if (x_direction == 1) {
di... |
functions | int r820t_f_imr(struct r820t_priv *priv, struct r820t_sect_type *iq_pont)
{
int rc;
r820t_vga_adjust(priv);
/*
* search surrounding points from previous point
* try (x-1), (x), (x+1) columns, and find min IMR result point
*/
rc = r820t_section(priv, iq_pont);
if (rc < 0)
return rc;
return 0;
} |
functions | int r820t_imr(struct r820t_priv *priv, unsigned imr_mem, bool im_flag)
{
struct r820t_sect_type imr_point;
int rc;
u32 ring_vco, ring_freq, ring_ref;
u8 n_ring, n;
int reg18, reg19, reg1f;
if (priv->cfg->xtal > 24000000)
ring_ref = priv->cfg->xtal / 2000;
else
ring_ref = priv->cfg->xtal / 1000;
n_ring = 1... |
functions | int r820t_imr_callibrate(struct r820t_priv *priv)
{
int rc, i;
int xtal_cap = 0;
if (priv->init_done)
return 0;
/* Detect Xtal capacitance */
if ((priv->cfg->rafael_chip == CHIP_R820T) ||
(priv->cfg->rafael_chip == CHIP_R828S) ||
(priv->cfg->rafael_chip == CHIP_R820C)) {
priv->xtal_cap_sel = XTAL_H... |
functions | int r820t_gpio(struct r820t_priv *priv, bool enable)
{
return r820t_write_reg_mask(priv, 0x0f, enable ? 1 : 0, 0x01);
} |
functions | int r820t_init(struct dvb_frontend *fe)
{
struct r820t_priv *priv = fe->tuner_priv;
int rc;
tuner_dbg("%s:\n", __func__);
mutex_lock(&priv->lock);
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 1);
rc = r820t_imr_callibrate(priv);
if (rc < 0)
goto err;
/* Initialize registers */
rc = r820t_write(... |
functions | int r820t_sleep(struct dvb_frontend *fe)
{
struct r820t_priv *priv = fe->tuner_priv;
int rc;
tuner_dbg("%s:\n", __func__);
mutex_lock(&priv->lock);
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 1);
rc = r820t_standby(priv);
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 0);
mutex_unlock(&pr... |
functions | int r820t_set_analog_freq(struct dvb_frontend *fe,
struct analog_parameters *p)
{
struct r820t_priv *priv = fe->tuner_priv;
unsigned bw;
int rc;
tuner_dbg("%s called\n", __func__);
/* if std is not defined, choose one */
if (!p->std)
p->std = V4L2_STD_MN;
if ((p->std == V4L2_STD_PAL_M) || (p->std == V4... |
functions | int r820t_set_params(struct dvb_frontend *fe)
{
struct r820t_priv *priv = fe->tuner_priv;
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
int rc;
unsigned bw;
tuner_dbg("%s: delivery_system=%d frequency=%d bandwidth_hz=%d\n",
__func__, c->delivery_system, c->frequency, c->bandwidth_hz);
mutex_loc... |
functions | int r820t_signal(struct dvb_frontend *fe, u16 *strength)
{
struct r820t_priv *priv = fe->tuner_priv;
int rc = 0;
mutex_lock(&priv->lock);
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 1);
if (priv->has_lock) {
rc = r820t_read_gain(priv);
if (rc < 0)
goto err;
/* A higher gain at LNA means a lo... |
functions | int r820t_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
{
struct r820t_priv *priv = fe->tuner_priv;
tuner_dbg("%s:\n", __func__);
*frequency = priv->int_freq;
return 0;
} |
functions | void r820t_release(struct dvb_frontend *fe)
{
struct r820t_priv *priv = fe->tuner_priv;
tuner_dbg("%s:\n", __func__);
mutex_lock(&r820t_list_mutex);
if (priv)
hybrid_tuner_release_state(priv);
mutex_unlock(&r820t_list_mutex);
fe->tuner_priv = NULL;
} |
includes |
#include <linux/init.h> |
includes | #include <linux/kernel.h> |
includes | #include <linux/sched.h> |
includes | #include <linux/fs.h> |
Subsets and Splits
No community queries yet
The top public SQL queries from the community will appear here once available.