type stringclasses 5
values | content stringlengths 9 163k |
|---|---|
functions | void hci_cmd_work(struct work_struct *work)
{
struct hci_dev *hdev = container_of(work, struct hci_dev, cmd_work);
struct sk_buff *skb;
BT_DBG("%s cmd_cnt %d cmd queued %d", hdev->name,
atomic_read(&hdev->cmd_cnt), skb_queue_len(&hdev->cmd_q));
/* Send queued commands */
if (atomic_read(&hdev->cmd_cnt)) ... |
includes |
#include <linux/kernel.h> |
includes | #include <linux/module.h> |
includes | #include <linux/printk.h> |
includes | #include <linux/types.h> |
includes | #include <linux/kobject.h> |
includes | #include <mach/system.h> |
defines | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
defines |
#define mtk_cooler_backlight_dprintk(fmt, args...) \ |
defines |
#define BACKLIGHT_COOLER_NR 3 |
functions | void mtk_cl_backlight_set_max_brightness_limit(void)
{
if (g_backlight_last_level != g_backlight_level) {
mtk_cooler_backlight_dprintk("set brightness level = %d\n", g_backlight_level);
switch (g_backlight_level) {
case 0:
setMaxbrightness(255, 0); /* 100% */
break;
case 1:
setMaxbrightness(178, 1); /... |
functions | int mtk_cl_backlight_get_max_state(struct thermal_cooling_device *cdev, unsigned long *state)
{
*state = 1;
/* mtk_cooler_backlight_dprintk("mtk_cl_backlight_get_max_state() %d\n", *state); */
return 0;
} |
functions | int mtk_cl_backlight_get_cur_state(struct thermal_cooling_device *cdev, unsigned long *state)
{
int nCoolerId;
/* Get Cooler ID */
nCoolerId = *((int *)cdev->devdata);
*state = g_cl_backlight_state[nCoolerId];
/* mtk_cooler_backlight_dprintk("mtk_cl_backlight_get_cur_state() %d CoolerID:%d\n", *state, nCoolerId)... |
functions | int mtk_cl_backlight_set_cur_state(struct thermal_cooling_device *cdev, unsigned long state)
{
int i;
int nCoolerId; /* /< Backlight Cooler ID */
/* Get Cooler ID */
nCoolerId = *((int *)cdev->devdata);
/* mtk_cooler_backlight_dprintk("mtk_cl_backlight_set_cur_state() %d CoolerID:%d\n", state, nCoolerId); */
... |
functions | int mtk_cooler_backlight_register_ltf(void)
{
int i;
mtk_cooler_backlight_dprintk("register ltf\n");
for (i = 0; i < BACKLIGHT_COOLER_NR; i++) {
char temp[20] = { 0 } |
functions | void mtk_cooler_backlight_unregister_ltf(void)
{
int i;
mtk_cooler_backlight_dprintk("unregister ltf\n");
for (i = 0; i < BACKLIGHT_COOLER_NR; i++) {
if (cl_backlight_dev[i]) {
mtk_thermal_cooling_device_unregister(cl_backlight_dev[i]);
cl_backlight_dev[i] = NULL;
} |
functions | __init mtk_cooler_backlight_init(void)
{
int err = 0;
mtk_cooler_backlight_dprintk("init\n");
err = mtk_cooler_backlight_register_ltf();
if (err)
goto err_unreg;
return 0;
err_unreg:
mtk_cooler_backlight_unregister_ltf();
return err;
} |
functions | __exit mtk_cooler_backlight_exit(void)
{
mtk_cooler_backlight_dprintk("exit\n");
mtk_cooler_backlight_unregister_ltf();
} |
defines | #define TRNGConfigure NOROM_TRNGConfigure |
defines | #define TRNGNumberGet NOROM_TRNGNumberGet |
functions | void
TRNGConfigure(uint32_t ui32MinSamplesPerCycle,
uint32_t ui32MaxSamplesPerCycle,
uint32_t ui32ClocksPerSample)
{
uint32_t ui32Val;
// Make sure the TRNG is disabled.
ui32Val = HWREG(TRNG_BASE + TRNG_O_CTL) & ~TRNG_CTL_TRNG_EN;
HWREG(TRNG_BASE + TRNG_O_CTL) = ui32Val;
... |
functions | uint32_t
TRNGNumberGet(uint32_t ui32Word)
{
uint32_t ui32RandomNumber;
// Check the arguments.
ASSERT((ui32Word == TRNG_HI_WORD) ||
(ui32Word == TRNG_LOW_WORD));
// Return the right requested part of the generated number.
if(ui32Word == TRNG_HI_WORD)
{
ui32RandomNumber = HWR... |
includes |
#include <linux/init.h> |
includes | #include <linux/kernel.h> |
includes | #include <linux/sched.h> |
includes | #include <linux/errno.h> |
includes | #include <linux/slab.h> |
includes | #include <linux/module.h> |
includes | #include <linux/spinlock.h> |
includes | #include <linux/list.h> |
includes | #include <linux/usb.h> |
includes | #include <linux/netdevice.h> |
includes | #include <linux/etherdevice.h> |
includes | #include <linux/ethtool.h> |
includes | #include <linux/wireless.h> |
includes | #include <linux/firmware.h> |
includes | #include <linux/moduleparam.h> |
includes | #include <net/mac80211.h> |
functions | void rtl8723bu_write_btreg(struct rtl8xxxu_priv *priv, u8 reg, u8 data)
{
struct h2c_cmd h2c;
int reqnum = 0;
memset(&h2c, 0, sizeof(struct h2c_cmd));
h2c.bt_mp_oper.cmd = H2C_8723B_BT_MP_OPER;
h2c.bt_mp_oper.operreq = 0 | (reqnum << 4);
h2c.bt_mp_oper.opcode = BT_MP_OP_WRITE_REG_VALUE;
h2c.bt_mp_oper.data = da... |
functions | void rtl8723bu_reset_8051(struct rtl8xxxu_priv *priv)
{
u8 val8;
u16 sys_func;
val8 = rtl8xxxu_read8(priv, REG_RSV_CTRL);
val8 &= ~BIT(1);
rtl8xxxu_write8(priv, REG_RSV_CTRL, val8);
val8 = rtl8xxxu_read8(priv, REG_RSV_CTRL + 1);
val8 &= ~BIT(0);
rtl8xxxu_write8(priv, REG_RSV_CTRL + 1, val8);
sys_func = rtl8... |
functions | void
rtl8723b_set_tx_power(struct rtl8xxxu_priv *priv, int channel, bool ht40)
{
u32 val32, ofdm, mcs;
u8 cck, ofdmbase, mcsbase;
int group, tx_idx;
tx_idx = 0;
group = rtl8xxxu_gen2_channel_to_group(channel);
cck = priv->cck_tx_power_index_B[group];
val32 = rtl8xxxu_read32(priv, REG_TX_AGC_A_CCK1_MCS32);
val... |
functions | int rtl8723bu_parse_efuse(struct rtl8xxxu_priv *priv)
{
struct rtl8723bu_efuse *efuse = &priv->efuse_wifi.efuse8723bu;
int i;
if (efuse->rtl_id != cpu_to_le16(0x8129))
return -EINVAL;
ether_addr_copy(priv->mac_addr, efuse->mac_addr);
memcpy(priv->cck_tx_power_index_A, efuse->tx_power_index_A.cck_base,
... |
functions | int rtl8723bu_load_firmware(struct rtl8xxxu_priv *priv)
{
char *fw_name;
int ret;
if (priv->enable_bluetooth)
fw_name = "rtlwifi/rtl8723bu_bt.bin";
else
fw_name = "rtlwifi/rtl8723bu_nic.bin";
ret = rtl8xxxu_load_firmware(priv, fw_name);
return ret;
} |
functions | void rtl8723bu_init_phy_bb(struct rtl8xxxu_priv *priv)
{
u8 val8;
u16 val16;
val16 = rtl8xxxu_read16(priv, REG_SYS_FUNC);
val16 |= SYS_FUNC_BB_GLB_RSTN | SYS_FUNC_BBRSTB | SYS_FUNC_DIO_RF;
rtl8xxxu_write16(priv, REG_SYS_FUNC, val16);
rtl8xxxu_write32(priv, REG_S0S1_PATH_SWITCH, 0x00);
/* 6. 0x1f[7:0] = 0x07 *... |
functions | int rtl8723bu_init_phy_rf(struct rtl8xxxu_priv *priv)
{
int ret;
ret = rtl8xxxu_init_phy_rf(priv, rtl8723bu_radioa_1t_init_table, RF_A);
/*
* PHY LCK
*/
rtl8xxxu_write_rfreg(priv, RF_A, 0xb0, 0xdfbe0);
rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_MODE_AG, 0x8c01);
msleep(200);
rtl8xxxu_write_rfreg(priv, RF_A... |
functions | void rtl8723bu_phy_init_antenna_selection(struct rtl8xxxu_priv *priv)
{
u32 val32;
val32 = rtl8xxxu_read32(priv, REG_PAD_CTRL1);
val32 &= ~(BIT(20) | BIT(24));
rtl8xxxu_write32(priv, REG_PAD_CTRL1, val32);
val32 = rtl8xxxu_read32(priv, REG_GPIO_MUXCFG);
val32 &= ~BIT(4);
rtl8xxxu_write32(priv, REG_GPIO_MUXCFG,... |
functions | int rtl8723bu_iqk_path_a(struct rtl8xxxu_priv *priv)
{
u32 reg_eac, reg_e94, reg_e9c, path_sel, val32;
int result = 0;
path_sel = rtl8xxxu_read32(priv, REG_S0S1_PATH_SWITCH);
/*
* Leave IQK mode
*/
val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);
val32 &= 0x000000ff;
rtl8xxxu_write32(priv, REG_FPGA0_IQK, val3... |
functions | int rtl8723bu_rx_iqk_path_a(struct rtl8xxxu_priv *priv)
{
u32 reg_ea4, reg_eac, reg_e94, reg_e9c, path_sel, val32;
int result = 0;
path_sel = rtl8xxxu_read32(priv, REG_S0S1_PATH_SWITCH);
/*
* Leave IQK mode
*/
val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);
val32 &= 0x000000ff;
rtl8xxxu_write32(priv, REG_FPG... |
functions | void rtl8723bu_phy_iqcalibrate(struct rtl8xxxu_priv *priv,
int result[][8], int t)
{
struct device *dev = &priv->udev->dev;
u32 i, val32;
int path_a_ok /*, path_b_ok */;
int retry = 2;
const u32 adda_regs[RTL8XXXU_ADDA_REGS] = {
REG_FPGA0_XCD_SWITCH_CTRL, REG_BLUETOOTH,
REG_RX_WAIT_CCA, REG_TX_CCK_RF... |
functions | void rtl8723bu_phy_iq_calibrate(struct rtl8xxxu_priv *priv)
{
struct device *dev = &priv->udev->dev;
int result[4][8]; /* last is final result */
int i, candidate;
bool path_a_ok, path_b_ok;
u32 reg_e94, reg_e9c, reg_ea4, reg_eac;
u32 reg_eb4, reg_ebc, reg_ec4, reg_ecc;
u32 val32, bt_control;
s32 reg_tmp = 0;
... |
functions | int rtl8723bu_active_to_emu(struct rtl8xxxu_priv *priv)
{
u8 val8;
u16 val16;
u32 val32;
int count, ret = 0;
/* Turn off RF */
rtl8xxxu_write8(priv, REG_RF_CTRL, 0);
/* Enable rising edge triggering interrupt */
val16 = rtl8xxxu_read16(priv, REG_GPIO_INTM);
val16 &= ~GPIO_INTM_EDGE_TRIG_IRQ;
rtl8xxxu_write1... |
functions | int rtl8723b_emu_to_active(struct rtl8xxxu_priv *priv)
{
u8 val8;
u32 val32;
int count, ret = 0;
/* 0x20[0] = 1 enable LDOA12 MACRO block for all interface */
val8 = rtl8xxxu_read8(priv, REG_LDOA15_CTRL);
val8 |= LDOA15_ENABLE;
rtl8xxxu_write8(priv, REG_LDOA15_CTRL, val8);
/* 0x67[0] = 0 to disable BT_GPS_SEL... |
functions | int rtl8723bu_power_on(struct rtl8xxxu_priv *priv)
{
u8 val8;
u16 val16;
u32 val32;
int ret;
rtl8xxxu_disabled_to_emu(priv);
ret = rtl8723b_emu_to_active(priv);
if (ret)
goto exit;
/*
* Enable MAC DMA/WMAC/SCHEDULE/SEC block
* Set CR bit10 to enable 32k calibration.
*/
val16 = rtl8xxxu_read16(priv, ... |
functions | void rtl8723bu_power_off(struct rtl8xxxu_priv *priv)
{
u8 val8;
u16 val16;
rtl8xxxu_flush_fifo(priv);
/*
* Disable TX report timer
*/
val8 = rtl8xxxu_read8(priv, REG_TX_REPORT_CTRL);
val8 &= ~TX_REPORT_CTRL_TIMER_ENABLE;
rtl8xxxu_write8(priv, REG_TX_REPORT_CTRL, val8);
rtl8xxxu_write8(priv, REG_CR, 0x000... |
functions | void rtl8723b_enable_rf(struct rtl8xxxu_priv *priv)
{
struct h2c_cmd h2c;
u32 val32;
u8 val8;
/*
* No indication anywhere as to what 0x0790 does. The 2 antenna
* vendor code preserves bits 6-7 here.
*/
rtl8xxxu_write8(priv, 0x0790, 0x05);
/*
* 0x0778 seems to be related to enabling the number of antennas... |
functions | void rtl8723bu_init_aggregation(struct rtl8xxxu_priv *priv)
{
u32 agg_rx;
u8 agg_ctrl;
/*
* For now simply disable RX aggregation
*/
agg_ctrl = rtl8xxxu_read8(priv, REG_TRXDMA_CTRL);
agg_ctrl &= ~TRXDMA_CTRL_RXDMA_AGG_EN;
agg_rx = rtl8xxxu_read32(priv, REG_RXDMA_AGG_PG_TH);
agg_rx &= ~RXDMA_USB_AGG_ENABLE;... |
functions | void rtl8723bu_init_statistics(struct rtl8xxxu_priv *priv)
{
u32 val32;
/* Time duration for NHM unit: 4us, 0x2710=40ms */
rtl8xxxu_write16(priv, REG_NHM_TIMER_8723B + 2, 0x2710);
rtl8xxxu_write16(priv, REG_NHM_TH9_TH10_8723B + 2, 0xffff);
rtl8xxxu_write32(priv, REG_NHM_TH3_TO_TH0_8723B, 0xffffff52);
rtl8xxxu_wr... |
includes |
#include <linux/init.h> |
includes | #include <linux/ioport.h> |
includes | #include <linux/platform_device.h> |
includes | #include <linux/gpio.h> |
includes | #include <linux/bootmem.h> |
includes | #include <asm/mach-types.h> |
includes | #include <asm/mach/mmc.h> |
includes | #include <mach/msm_bus_board.h> |
includes | #include <mach/board.h> |
includes | #include <mach/gpiomux.h> |
includes | #include <mach/socinfo.h> |
includes |
#include <mach/board_lge.h> |
includes | #include <linux/skbuff.h> |
includes | #include <linux/wlan_plat.h> |
includes | #include <linux/pm_qos.h> |
defines |
#define MSM_MPM_PIN_SDC1_DAT1 17 |
defines | #define MSM_MPM_PIN_SDC3_DAT1 21 |
defines |
#define WLAN_STATIC_SCAN_BUF0 5 |
defines | #define WLAN_STATIC_SCAN_BUF1 6 |
defines | #define PREALLOC_WLAN_SEC_NUM 4 |
defines | #define PREALLOC_WLAN_BUF_NUM 160 |
defines | #define PREALLOC_WLAN_SECTION_HEADER 24 |
defines |
#define WLAN_SECTION_SIZE_0 (PREALLOC_WLAN_BUF_NUM * 128) |
defines | #define WLAN_SECTION_SIZE_1 (PREALLOC_WLAN_BUF_NUM * 128) |
defines | #define WLAN_SECTION_SIZE_2 (PREALLOC_WLAN_BUF_NUM * 512) |
defines | #define WLAN_SECTION_SIZE_3 (PREALLOC_WLAN_BUF_NUM * 1024) |
defines |
#define DHD_SKB_HDRSIZE 336 |
defines | #define DHD_SKB_1PAGE_BUFSIZE ((PAGE_SIZE*1)-DHD_SKB_HDRSIZE) |
defines | #define DHD_SKB_2PAGE_BUFSIZE ((PAGE_SIZE*2)-DHD_SKB_HDRSIZE) |
defines | #define DHD_SKB_4PAGE_BUFSIZE ((PAGE_SIZE*4)-DHD_SKB_HDRSIZE) |
defines |
#define WLAN_SKB_BUF_NUM 17 |
defines |
#define WLAN_POWER PM8921_GPIO_PM_TO_SYS(CONFIG_BCMDHD_GPIO_WL_RESET) // PMIC gpio 29 |
defines | #define WLAN_HOSTWAKE CONFIG_BCMDHD_GPIO_WL_HOSTWAKEUP |
defines |
#define LGE_BCM_WIFI_DMA_QOS_CONTROL |
defines |
#define COUNTRY_BUF_SZ 4 |
structs | struct wlan_mem_prealloc {
void *mem_ptr;
unsigned long size;
}; |
structs | struct cntry_locales_custom {
char iso_abbrev[COUNTRY_BUF_SZ];
char custom_locale[COUNTRY_BUF_SZ];
int custom_locale_rev;
}; |
functions | int sdc4_status(struct device *dev)
{
return g_wifi_detect;
} |
functions | int brcm_init_wlan_mem(void)
{
int i;
int j;
for (i = 0; i < 8; i++) {
wlan_static_skb[i] = dev_alloc_skb(DHD_SKB_1PAGE_BUFSIZE);
if (!wlan_static_skb[i])
goto err_skb_alloc;
} |
functions | int bcm_wifi_set_power(int enable)
{
int ret = 0;
if (enable)
{
#if defined(CONFIG_LGE_BCM433X_PATCH) && !defined(CONFIG_BCMDHD_MODULE)
msmsdcc_set_mmc_enable(enable,sdc4_dev);
#endif
ret = gpio_direction_output(WLAN_POWER, 1);
if (ret)
{
printk(KERN_ERR "%s: WL_REG_ON failed to pull up (%d)\n",
_... |
functions | void bcm_wifi_req_dma_work(struct work_struct *work)
{
switch (wifi_dma_state) {
case 2: /* IDLE State */
if (packet_transfer_cnt < 100) {
/* IDLE -> INIT */
wifi_dma_state = 1;
/* printk(KERN_ERR "%s: schedule work : %d : (IDLE -> INIT)\n", __func__, packet_transfer_cnt); */
} |
functions | void bcm_wifi_req_dma_qos(int vote)
{
if (vote)
packet_transfer_cnt++;
/* INIT -> IDLE */
if (wifi_dma_state == 1 && vote) {
wifi_dma_state = 2; /* IDLE */
schedule_delayed_work(&req_dma_work, msecs_to_jiffies(1000));
/* printk(KERN_ERR "%s: schedule work (INIT -> IDLE)\n", __func__); */
} |
functions | __init bcm_wifi_init_gpio_mem(void)
{
int rc=0;
/*
if (gpio_tlmm_config(wifi_config_power_on[0], GPIO_CFG_ENABLE))
printk(KERN_ERR "%s: Failed to configure WLAN_POWER\n", __func__);
*/
#ifdef LGE_BCM_WIFI_DMA_QOS_CONTROL
INIT_DELAYED_WORK(&req_dma_work, bcm_wifi_req_dma_work);
pm_qos_add_request(&wifi_dma_qos, P... |
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