type stringclasses 5
values | content stringlengths 9 163k |
|---|---|
defines | #define ST_ACCEL_DEFAULT_OUT_Y_L_ADDR 0x2a |
defines | #define ST_ACCEL_DEFAULT_OUT_Z_L_ADDR 0x2c |
defines | #define ST_ACCEL_FS_AVL_2G 2 |
defines | #define ST_ACCEL_FS_AVL_4G 4 |
defines | #define ST_ACCEL_FS_AVL_6G 6 |
defines | #define ST_ACCEL_FS_AVL_8G 8 |
defines | #define ST_ACCEL_FS_AVL_16G 16 |
defines | #define ST_ACCEL_FS_AVL_100G 100 |
defines | #define ST_ACCEL_FS_AVL_200G 200 |
defines | #define ST_ACCEL_FS_AVL_400G 400 |
defines | #define ST_ACCEL_TRIGGER_OPS (&st_accel_trigger_ops) |
defines | #define ST_ACCEL_TRIGGER_OPS NULL |
functions | int st_accel_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *ch, int *val,
int *val2, long mask)
{
int err;
struct st_sensor_data *adata = iio_priv(indio_dev);
switch (mask) {
case IIO_CHAN_INFO_RAW:
err = st_sensors_read_info_raw(indio_dev, ch, val);
if (err < 0)
goto read_error;
... |
functions | int st_accel_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan, int val, int val2, long mask)
{
int err;
switch (mask) {
case IIO_CHAN_INFO_SCALE: {
int gain;
gain = val * 1000000 + val2;
err = st_sensors_set_fullscale_by_gain(indio_dev, gain);
break;
} |
functions | int apply_acpi_orientation(struct iio_dev *indio_dev)
{
struct st_sensor_data *adata = iio_priv(indio_dev);
struct acpi_buffer buffer = {ACPI_ALLOCATE_BUFFER, NULL} |
functions | int apply_acpi_orientation(struct iio_dev *indio_dev)
{
return -EINVAL;
} |
functions | int st_accel_common_probe(struct iio_dev *indio_dev)
{
struct st_sensor_data *adata = iio_priv(indio_dev);
struct device *parent = indio_dev->dev.parent;
struct st_sensors_platform_data *pdata = dev_get_platdata(parent);
int err;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->info = &accel_info;
err = st_sen... |
includes |
#include <linux/bitops.h> |
includes | #include <linux/device.h> |
includes | #include <linux/io.h> |
includes | #include <linux/kernel.h> |
includes | #include <linux/serial_8250.h> |
includes | #include <linux/serial_core.h> |
defines | #define DW_UART_DLF 0xc0 /* Divisor Latch Fraction Register */ |
defines | #define DW_UART_CPR 0xf4 /* Component Parameter Register */ |
defines | #define DW_UART_UCV 0xf8 /* UART Component Version */ |
defines | #define DW_UART_CPR_ABP_DATA_WIDTH (3 << 0) |
defines | #define DW_UART_CPR_AFCE_MODE (1 << 4) |
defines | #define DW_UART_CPR_THRE_MODE (1 << 5) |
defines | #define DW_UART_CPR_SIR_MODE (1 << 6) |
defines | #define DW_UART_CPR_SIR_LP_MODE (1 << 7) |
defines | #define DW_UART_CPR_ADDITIONAL_FEATURES (1 << 8) |
defines | #define DW_UART_CPR_FIFO_ACCESS (1 << 9) |
defines | #define DW_UART_CPR_FIFO_STAT (1 << 10) |
defines | #define DW_UART_CPR_SHADOW (1 << 11) |
defines | #define DW_UART_CPR_ENCODED_PARMS (1 << 12) |
defines | #define DW_UART_CPR_DMA_EXTRA (1 << 13) |
defines | #define DW_UART_CPR_FIFO_MODE (0xff << 16) |
defines | #define DW_UART_CPR_FIFO_SIZE(a) (((a >> 16) & 0xff) * 16) |
functions | u32 dw8250_readl_ext(struct uart_port *p, int offset)
{
if (p->iotype == UPIO_MEM32BE)
return ioread32be(p->membase + offset);
return readl(p->membase + offset);
} |
functions | void dw8250_writel_ext(struct uart_port *p, int offset, u32 reg)
{
if (p->iotype == UPIO_MEM32BE)
iowrite32be(reg, p->membase + offset);
else
writel(reg, p->membase + offset);
} |
functions | int dw8250_get_divisor(struct uart_port *p, unsigned int baud,
unsigned int *frac)
{
unsigned int quot, rem, base_baud = baud * 16;
struct dw8250_port_data *d = p->private_data;
quot = p->uartclk / base_baud;
rem = p->uartclk % base_baud;
*frac = DIV_ROUND_CLOSEST(rem << d->dlf_size, base_baud);
retu... |
functions | void dw8250_set_divisor(struct uart_port *p, unsigned int baud,
unsigned int quot, unsigned int quot_frac)
{
dw8250_writel_ext(p, DW_UART_DLF, quot_frac);
serial8250_do_set_divisor(p, baud, quot, quot_frac);
} |
functions | void dw8250_do_set_termios(struct uart_port *p, struct ktermios *termios, struct ktermios *old)
{
p->status &= ~UPSTAT_AUTOCTS;
if (termios->c_cflag & CRTSCTS)
p->status |= UPSTAT_AUTOCTS;
serial8250_do_set_termios(p, termios, old);
} |
functions | void dw8250_setup_port(struct uart_port *p)
{
struct uart_8250_port *up = up_to_u8250p(p);
u32 reg;
/*
* If the Component Version Register returns zero, we know that
* ADDITIONAL_FEATURES are not enabled. No need to go any further.
*/
reg = dw8250_readl_ext(p, DW_UART_UCV);
if (!reg)
return;
dev_dbg(p->... |
includes |
#include <linux/module.h> |
includes | #include <linux/moduleparam.h> |
includes | #include <linux/init.h> |
includes | #include <linux/delay.h> |
includes | #include <linux/pm.h> |
includes | #include <linux/i2c.h> |
includes | #include <linux/platform_device.h> |
includes | #include <linux/regulator/consumer.h> |
includes | #include <linux/slab.h> |
includes | #include <sound/core.h> |
includes | #include <sound/pcm.h> |
includes | #include <sound/pcm_params.h> |
includes | #include <sound/soc.h> |
includes | #include <sound/soc-dapm.h> |
includes | #include <sound/initval.h> |
includes | #include <sound/tlv.h> |
includes | #include <sound/wm8955.h> |
defines |
#define WM8955_NUM_SUPPLIES 4 |
defines | #define FIXED_FLL_SIZE ((1 << 22) * 10) |
defines |
#define WM8955_RATES SNDRV_PCM_RATE_8000_96000 |
defines |
#define WM8955_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ |
defines | #define wm8955_suspend NULL |
defines | #define wm8955_resume NULL |
structs | struct wm8955_priv {
struct snd_soc_codec codec;
u16 reg_cache[WM8955_MAX_REGISTER + 1];
unsigned int mclk_rate;
int deemph;
int fs;
struct regulator_bulk_data supplies[WM8955_NUM_SUPPLIES];
struct wm8955_pdata *pdata;
}; |
structs | struct pll_factors {
int n;
int k;
int outdiv;
}; |
functions | int wm8955_reset(struct snd_soc_codec *codec)
{
return snd_soc_write(codec, WM8955_RESET, 0);
} |
functions | int wm8995_pll_factors(struct device *dev,
int Fref, int Fout, struct pll_factors *pll)
{
u64 Kpart;
unsigned int K, Ndiv, Nmod, target;
dev_dbg(dev, "Fref=%u Fout=%u\n", Fref, Fout);
/* The oscilator should run at should be 90-100MHz, and
* there's a divide by 4 plus an optional divide by 2 in the
*... |
functions | int wm8955_configure_clocking(struct snd_soc_codec *codec)
{
struct wm8955_priv *wm8955 = snd_soc_codec_get_drvdata(codec);
int i, ret, val;
int clocking = 0;
int srate = 0;
int sr = -1;
struct pll_factors pll;
/* If we're not running a sample rate currently just pick one */
if (wm8955->fs == 0)
wm8955->fs =... |
functions | int wm8955_sysclk(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol, int event)
{
struct snd_soc_codec *codec = w->codec;
int ret = 0;
/* Always disable the clocks - if we're doing reconfiguration this
* avoids misclocking.
*/
snd_soc_update_bits(codec, WM8955_POWER_MANAGEMENT_1,
WM8955_D... |
functions | int wm8955_set_deemph(struct snd_soc_codec *codec)
{
struct wm8955_priv *wm8955 = snd_soc_codec_get_drvdata(codec);
int val, i, best;
/* If we're using deemphasis select the nearest available sample
* rate.
*/
if (wm8955->deemph) {
best = 1;
for (i = 2; i < ARRAY_SIZE(deemph_settings); i++) {
if (abs(de... |
functions | int wm8955_get_deemph(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
struct wm8955_priv *wm8955 = snd_soc_codec_get_drvdata(codec);
ucontrol->value.enumerated.item[0] = wm8955->deemph;
return 0;
} |
functions | int wm8955_put_deemph(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
struct wm8955_priv *wm8955 = snd_soc_codec_get_drvdata(codec);
int deemph = ucontrol->value.enumerated.item[0];
if (deemph > 1)
return -EINVAL;
wm8955->... |
functions | int wm8955_add_widgets(struct snd_soc_codec *codec)
{
snd_soc_add_controls(codec, wm8955_snd_controls,
ARRAY_SIZE(wm8955_snd_controls));
snd_soc_dapm_new_controls(codec, wm8955_dapm_widgets,
ARRAY_SIZE(wm8955_dapm_widgets));
snd_soc_dapm_add_routes(codec, wm8955_intercon,
ARRAY_SIZE(wm8955_interc... |
functions | int wm8955_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params,
struct snd_soc_dai *dai)
{
struct snd_soc_codec *codec = dai->codec;
struct wm8955_priv *wm8955 = snd_soc_codec_get_drvdata(codec);
int ret;
int wl;
switch (params_format(params)) {
case SNDRV_PCM_FORMAT_S16... |
functions | int wm8955_set_sysclk(struct snd_soc_dai *dai, int clk_id,
unsigned int freq, int dir)
{
struct snd_soc_codec *codec = dai->codec;
struct wm8955_priv *priv = snd_soc_codec_get_drvdata(codec);
int div;
switch (clk_id) {
case WM8955_CLK_MCLK:
if (freq > 15000000) {
priv->mclk_rate = freq /= 2;
div =... |
functions | int wm8955_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
{
struct snd_soc_codec *codec = dai->codec;
u16 aif = 0;
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
case SND_SOC_DAIFMT_CBS_CFS:
break;
case SND_SOC_DAIFMT_CBM_CFM:
aif |= WM8955_MS;
break;
default:
return -EINVAL;
} |
functions | int wm8955_digital_mute(struct snd_soc_dai *codec_dai, int mute)
{
struct snd_soc_codec *codec = codec_dai->codec;
int val;
if (mute)
val = WM8955_DACMU;
else
val = 0;
snd_soc_update_bits(codec, WM8955_DAC_CONTROL, WM8955_DACMU, val);
return 0;
} |
functions | int wm8955_set_bias_level(struct snd_soc_codec *codec,
enum snd_soc_bias_level level)
{
struct wm8955_priv *wm8955 = snd_soc_codec_get_drvdata(codec);
int ret, i;
switch (level) {
case SND_SOC_BIAS_ON:
break;
case SND_SOC_BIAS_PREPARE:
/* VMID resistance 2*50k */
snd_soc_update_bits(codec, WM8955_POWE... |
functions | int wm8955_suspend(struct platform_device *pdev, pm_message_t state)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
struct snd_soc_codec *codec = socdev->card->codec;
wm8955_set_bias_level(codec, SND_SOC_BIAS_OFF);
return 0;
} |
functions | int wm8955_resume(struct platform_device *pdev)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
struct snd_soc_codec *codec = socdev->card->codec;
wm8955_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
return 0;
} |
functions | int wm8955_probe(struct platform_device *pdev)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
struct snd_soc_codec *codec;
int ret = 0;
if (wm8955_codec == NULL) {
dev_err(&pdev->dev, "Codec device not registered\n");
return -ENODEV;
} |
functions | int wm8955_remove(struct platform_device *pdev)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
snd_soc_free_pcms(socdev);
snd_soc_dapm_free(socdev);
return 0;
} |
functions | int wm8955_register(struct wm8955_priv *wm8955,
enum snd_soc_control_type control)
{
int ret;
struct snd_soc_codec *codec = &wm8955->codec;
int i;
if (wm8955_codec) {
dev_err(codec->dev, "Another WM8955 is registered\n");
return -EINVAL;
} |
functions | void wm8955_unregister(struct wm8955_priv *wm8955)
{
wm8955_set_bias_level(&wm8955->codec, SND_SOC_BIAS_OFF);
regulator_bulk_free(ARRAY_SIZE(wm8955->supplies), wm8955->supplies);
snd_soc_unregister_dai(&wm8955_dai);
snd_soc_unregister_codec(&wm8955->codec);
kfree(wm8955);
wm8955_codec = NULL;
} |
functions | int wm8955_i2c_probe(struct i2c_client *i2c,
const struct i2c_device_id *id)
{
struct wm8955_priv *wm8955;
struct snd_soc_codec *codec;
wm8955 = kzalloc(sizeof(struct wm8955_priv), GFP_KERNEL);
if (wm8955 == NULL)
return -ENOMEM;
codec = &wm8955->codec;
codec->hw_write = (hw_write_t)i2c_master_send;... |
functions | int wm8955_i2c_remove(struct i2c_client *client)
{
struct wm8955_priv *wm8955 = i2c_get_clientdata(client);
wm8955_unregister(wm8955);
return 0;
} |
functions | __init wm8955_modinit(void)
{
int ret;
#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
ret = i2c_add_driver(&wm8955_i2c_driver);
if (ret != 0) {
printk(KERN_ERR "Failed to register WM8955 I2C driver: %d\n",
ret);
} |
functions | __exit wm8955_exit(void)
{
#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
i2c_del_driver(&wm8955_i2c_driver);
#endif
} |
functions | void time_init(struct ukvm_boot_info *bi)
{
assert(tscclock_init(bi->cpu.tsc_freq) == 0);
} |
functions | uint64_t solo5_clock_monotonic(void)
{
return tscclock_monotonic();
} |
functions | uint64_t solo5_clock_wall(void)
{
return tscclock_monotonic() + tscclock_epochoffset();
} |
includes |
#include <sys/param.h> |
includes | #include <sys/systm.h> |
includes |
#include <sh/cache.h> |
includes | #include <sh/cache_sh4.h> |
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