File size: 736 Bytes
b3f346d | 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 | `timescale 1ps/1ps
module part_Ln_TB ();
reg clk , rst , start ;
reg [15:0] Xbus ;
wire Ready ;
wire [17:0] RBUS;
part_Ln_TOP uut( clk , rst , start , Xbus , Ready , RBUS);
always #5 clk=~clk;
initial begin
clk = 0 ;
rst = 1 ;
#12
rst=0 ;
start =1 ;
Xbus=16'h8000; // 1/2
#10
start=0;
#300
rst = 1 ;
#10
rst=0 ;
start =1 ;
Xbus=16'h0000; // 0
#10
start=0;
#300
rst = 1 ;
#10
rst=0 ;
start =1 ;
Xbus=16'h4000; // 1/4
#10
start=0;
#300
$stop;
end
endmodule
|