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Datasets:
architect-ubc-capstone
/
rtl-augmented-v3

Tasks:
Text Generation
Size:
1K<n<10K
Tags:
rtl
verilog
bug-fix
sft
License:
Dataset card Files
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1
rtl-augmented-v3 / Amr-HAlahla_Multi-Cycle-RISC-Processor-In-Verilog

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googhieman commited on