arm-bench-trace / README.md
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metadata
license: apache-2.0
language:
  - en
tags:
  - code
  - kernels
  - benchmark
  - arm
  - aarch64
  - sve
  - ncnn
  - conv2d
pretty_name: ARM Bench Trace
size_categories:
  - n<1K

ARM Bench Trace

A benchmark trace for ARM (aarch64 / SVE) CPU kernel evaluation. It pairs operator definitions with concrete workloads and reference/baseline solutions, so that a candidate kernel can be checked for bit-exact correctness against a reference and timed against a baseline.

The current trace covers 2D convolution (conv2d) as extracted from the ncnn test suite (tests/ncnn/candidate/convolution.cpp).

Repository structure

definitions/   # operator specs: axes (const/var), input/output shapes, PyTorch reference
  conv/        #   38 conv2d definitions, one JSON per kernel shape
solutions/     # kernels implementing a definition
  ncnn/
    _harness/                 # C/C++ harness contract (conv2d.h / conv2d.cpp)
    baseline-ncnn-arm/conv2d/ # ncnn::Convolution_arm wrappers (the timing baseline)
    reference-scalar/conv2d/  # naive scalar 6-loop conv2d (ground-truth correctness)
workloads/     # concrete problem instances (var-axis values + scalar inputs)
  conv/        #   one JSONL per definition; each line is a runnable workload

Definitions (definitions/conv/*.json)

Each file describes one operator instantiation. Key fields:

  • name, op_type, description, tags
  • axes — each axis is either const (baked-in, e.g. Kh=3, C_in=64, C_out=128) or var (chosen per workload, e.g. N, H, W).
  • inputs / outputs — tensor shapes (symbolic over the axes) and dtypes.
  • constraints — derived-shape relations (e.g. output H/W from stride, pad, dilation).
  • reference — a self-contained PyTorch (torch.nn.functional.conv2d) snippet defining the ground-truth result.

The file name encodes the const axes, e.g. conv2d_kh3_kw3_sh1_sw1_dh1_dw1_c64_c128 = 3×3 kernel, stride 1, dilation 1, 64→128 channels.

Workloads (workloads/conv/*.jsonl)

One JSONL file per definition; each line is a single workload instance:

{"axes": {"N": 1, "H": 14, "W": 14},
 "scalar_inputs": {"pad_top": 0, "pad_left": 0, "activation_type": 0, "with_bias": 0},
 "uuid": "H14_W14_padh0_padw0_b0",
 "tags": {"from": "tests/ncnn/candidate/convolution.cpp"}}

axes fills in the var axes of the definition; scalar_inputs provides the runtime scalar arguments.

Solutions (solutions/ncnn/...)

A solution is a JSON record pointing at a definition plus inlined source files:

  • definition, dataset, author, description
  • speclanguage, target_hardware (e.g. graviton3, aarch64-sve), entry_point, dependencies, isa_features, compile_flags, link_flags
  • sources — list of {path, content} (the actual kernel.cpp)

Two solution families ship here:

  • baseline-ncnn-arm — wraps ncnn::Convolution_arm (SVE, from libncnn_arm_heavy.a); the same kernel.cpp is stamped across every definition with const params supplied by the definition. This is the performance baseline. Times create_pipeline + forward.
  • reference-scalar — a straight scalar 6-loop accumulator; slow but ground-truth correct, used as the correctness reference / Phase-1 smoke test.

The shared harness (solutions/ncnn/_harness/conv2d.{h,cpp}) declares the ncnn::convolution_kernel contract that every solution implements, and handles input padding before the kernel is invoked.

Intended use

Drive an ARM CPU kernel benchmark/agent loop:

  1. Load a definition + its workloads.
  2. Compile a candidate solution against the harness contract.
  3. Check bit-exact correctness vs. the PyTorch / scalar reference.
  4. Time the candidate against the baseline-ncnn-arm solution on Graviton3.

License

Released under the Apache-2.0 license. Kernel sources derive from / wrap ncnn (BSD-3-Clause); see ncnn's license for the underlying library terms.