repo_name
stringlengths 6
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stringlengths 3
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stringlengths 8
1.02M
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|---|---|---|
nkennaA/Flixx
|
Flixx/MovieCell.h
|
<filename>Flixx/MovieCell.h
//
// MovieCell.h
// Flixx
// Created by <NAME> on 6/28/18.
// Copyright © 2018 <NAME>. All rights reserved.
//
#import <UIKit/UIKit.h>
@interface MovieCell : UITableViewCell
@property (weak, nonatomic) IBOutlet UILabel *title;
@property (weak, nonatomic) IBOutlet UILabel *synopsis;
@property (weak, nonatomic) IBOutlet UIImageView *poster;
@end
|
lallements/d1-mini-web-server
|
lib/hardware/src/OLEDDisplay.h
|
////////////////////////////////////////////////////////////////////////////////
// Copyright (c) 2019 <NAME>. All rights reserved.
//
// This work is licensed under the terms of the MIT license that can be found in
// the LICENSE file.
//
////////////////////////////////////////////////////////////////////////////////
#pragma once
#include <memory>
#include <string>
class Adafruit_SSD1306;
class OLEDDisplay
{
public:
OLEDDisplay();
~OLEDDisplay();
void clear();
void println(const char* line);
void display();
bool isValid() const;
private:
std::unique_ptr<Adafruit_SSD1306> m_pDisplay;
};
|
lallements/d1-mini-web-server
|
lib/hardware/src/WifiBoard.h
|
////////////////////////////////////////////////////////////////////////////////
// Copyright (c) 2019 <NAME>. All rights reserved.
//
// This work is licensed under the terms of the MIT license that can be found in
// the LICENSE file.
//
////////////////////////////////////////////////////////////////////////////////
#pragma once
#include <memory>
#include <string>
class WiFiServer;
class WifiBoard
{
public:
WifiBoard();
~WifiBoard();
struct State
{
std::string ssid;
std::string localIp;
};
State getState() const;
private:
std::unique_ptr<WiFiServer> m_pServer;
};
|
lallements/d1-mini-web-server
|
lib/hardware/src/BuiltInLED.h
|
<reponame>lallements/d1-mini-web-server
////////////////////////////////////////////////////////////////////////////////
// Copyright (c) 2019 <NAME>. All rights reserved.
//
// This work is licensed under the terms of the MIT license that can be found in
// the LICENSE file.
//
////////////////////////////////////////////////////////////////////////////////
#pragma once
#include <chrono>
class BuiltInLED
{
public:
BuiltInLED();
void sendSOS();
};
|
johschmitz/toybox
|
toys/posix/time.c
|
/* time.c - time a simple command
*
* Copyright 2013 <NAME> <<EMAIL>>
*
* See http://pubs.opengroup.org/onlinepubs/9699919799/utilities/time.html
USE_TIME(NEWTOY(time, "<1^pv", TOYFLAG_USR|TOYFLAG_BIN|TOYFLAG_MAYFORK))
config TIME
bool "time"
default y
depends on TOYBOX_FLOAT
help
usage: time [-pv] COMMAND...
Run command line and report real, user, and system time elapsed in seconds.
(real = clock on the wall, user = cpu used by command's code,
system = cpu used by OS on behalf of command.)
-p POSIX format output (default)
-v Verbose
*/
#define FOR_time
#include "toys.h"
void time_main(void)
{
pid_t pid;
struct timeval tv, tv2;
gettimeofday(&tv, NULL);
if (!(pid = XVFORK())) xexec(toys.optargs);
else {
int stat;
struct rusage ru;
float r, u, s;
wait4(pid, &stat, 0, &ru);
gettimeofday(&tv2, NULL);
if (tv.tv_usec > tv2.tv_usec) {
tv2.tv_usec += 1000000;
tv2.tv_sec--;
}
r = (tv2.tv_sec-tv.tv_sec)+((tv2.tv_usec-tv.tv_usec)/1000000.0);
u = ru.ru_utime.tv_sec+(ru.ru_utime.tv_usec/1000000.0);
s = ru.ru_stime.tv_sec+(ru.ru_stime.tv_usec/1000000.0);
if (FLAG(v)) fprintf(stderr, "Real time (s): %f\nSystem time (s): %f\n"
"User time (s): %f\nMax RSS (KiB): %ld\nMajor faults: %ld\n"
"Minor faults: %ld\nFile system inputs: %ld\nFile system outputs: %ld\n"
"Voluntary context switches: %ld\nInvoluntary context switches: %ld\n",
r, s, u, ru.ru_maxrss, ru.ru_majflt, ru.ru_minflt, ru.ru_inblock,
ru.ru_oublock, ru.ru_nvcsw, ru.ru_nivcsw);
else fprintf(stderr, "\nreal\t%f\nuser\t%f\nsys\t%f\n", r, u, s);
toys.exitval = WIFEXITED(stat) ? WEXITSTATUS(stat) : WTERMSIG(stat);
}
}
|
mkroman/bl602-604
|
components/network/ble/blestack/src/host/monitor.h
|
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @file
* @brief Custom monitor protocol logging over UART
*/
/*
* Copyright (c) 2016 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#if defined(CONFIG_BT_DEBUG_MONITOR)
#define BT_MONITOR_NEW_INDEX 0
#define BT_MONITOR_DEL_INDEX 1
#define BT_MONITOR_COMMAND_PKT 2
#define BT_MONITOR_EVENT_PKT 3
#define BT_MONITOR_ACL_TX_PKT 4
#define BT_MONITOR_ACL_RX_PKT 5
#define BT_MONITOR_SCO_TX_PKT 6
#define BT_MONITOR_SCO_RX_PKT 7
#define BT_MONITOR_OPEN_INDEX 8
#define BT_MONITOR_CLOSE_INDEX 9
#define BT_MONITOR_INDEX_INFO 10
#define BT_MONITOR_VENDOR_DIAG 11
#define BT_MONITOR_SYSTEM_NOTE 12
#define BT_MONITOR_USER_LOGGING 13
#define BT_MONITOR_NOP 255
#define BT_MONITOR_TYPE_PRIMARY 0
#define BT_MONITOR_TYPE_AMP 1
/* Extended header types */
#define BT_MONITOR_COMMAND_DROPS 1
#define BT_MONITOR_EVENT_DROPS 2
#define BT_MONITOR_ACL_RX_DROPS 3
#define BT_MONITOR_ACL_TX_DROPS 4
#define BT_MONITOR_SCO_RX_DROPS 5
#define BT_MONITOR_SCO_TX_DROPS 6
#define BT_MONITOR_OTHER_DROPS 7
#define BT_MONITOR_TS32 8
#define BT_MONITOR_BASE_HDR_LEN 6
#if defined(CONFIG_BT_BREDR)
#define BT_MONITOR_EXT_HDR_MAX 19
#else
#define BT_MONITOR_EXT_HDR_MAX 15
#endif
struct bt_monitor_hdr {
u16_t data_len;
u16_t opcode;
u8_t flags;
u8_t hdr_len;
u8_t ext[BT_MONITOR_EXT_HDR_MAX];
} __packed;
struct bt_monitor_ts32 {
u8_t type;
u32_t ts32;
} __packed;
struct bt_monitor_new_index {
u8_t type;
u8_t bus;
u8_t bdaddr[6];
char name[8];
} __packed;
struct bt_monitor_user_logging {
u8_t priority;
u8_t ident_len;
} __packed;
static inline u8_t bt_monitor_opcode(struct net_buf *buf)
{
switch (bt_buf_get_type(buf)) {
case BT_BUF_CMD:
return BT_MONITOR_COMMAND_PKT;
case BT_BUF_EVT:
return BT_MONITOR_EVENT_PKT;
case BT_BUF_ACL_OUT:
return BT_MONITOR_ACL_TX_PKT;
case BT_BUF_ACL_IN:
return BT_MONITOR_ACL_RX_PKT;
default:
return BT_MONITOR_NOP;
}
}
void bt_monitor_send(u16_t opcode, const void *data, size_t len);
void bt_monitor_new_index(u8_t type, u8_t bus, bt_addr_t *addr,
const char *name);
#else /* !CONFIG_BT_DEBUG_MONITOR */
#define bt_monitor_send(opcode, data, len)
#define bt_monitor_new_index(type, bus, addr, name)
#endif
|
mkroman/bl602-604
|
components/network/ble/blestack/src/services/wifi_prov.h
|
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _WIFI_PROV_H_
#define _WIFI_PROV_H_
#include "config.h"
//07af8aa0-9f1f-11ea-b294-02fcdc4e7412
#define BT_UUID_WIFI_PROV BT_UUID_DECLARE_128(BT_UUID_128_ENCODE(0x07af8aa0, 0x9f1f, 0x11ea, 0xb294, 0x02fcdc4e7412))
//07af8aa1-9f1f-11ea-b294-02fcdc4e7412
#define BT_UUID_WIFIPROV_WRITE BT_UUID_DECLARE_128(BT_UUID_128_ENCODE(0x07af8aa1, 0x9f1f, 0x11ea, 0xb294, 0x02fcdc4e7412))
//07af8aa2-9f1f-11ea-b294-02fcdc4e7412
#define BT_UUID_WIFIPROV_READ BT_UUID_DECLARE_128(BT_UUID_128_ENCODE(0x07af8aa2, 0x9f1f, 0x11ea, 0xb294, 0x02fcdc4e7412))
#define WIFIPROV_INVALID_SEQ 0xff
#define WIFIPROV_FRAME_TYPE_BITMASK 0x03
#define WIFIPROV_FRAME_TYPE_OFFSET 0x02
#define WIFIPROV_TYPE_CTRL_FRAME 0x00
#define WIFIPROV_TYPE_DATA_FRAME 0x01
#define WIFIPROV_FRAME_CTRL_ACK_BITMASK 0x08
#define WIFIPROV_FRAME_CTRL_NO_ACK 0x00
#define WIFIPROV_FRAME_CTRL_NEED_ACK 0x08
#define WIFIPROV_FRAME_ACK_DATA_LEN 0x01
struct conn_callback{
void (*local_connect_remote_ap) (void);
void (*local_disconnect_remote_ap) (void);
void (*get_remote_ap_ssid)(void *args,size_t size);
void (*get_remote_ap_bssid)(void *args,size_t size);
void (*get_remote_password)(void *args,size_t size);
};
enum wifiprov_ctrlfrm_type{
SUB_TYPE_CTRL_ACK = 0x00,
SUB_TYPE_CTRL_CONN_AP = 0x03,
SUB_TYPE_CTRL_DISCONN_AP
};
enum wifiprov_datafrm_type{
SUB_TYPE_DATA_BSSID = 0x01,
SUB_TYPE_DATA_SSID,
SUB_TYPE_DATA_PASSWORD
};
#define WIFIPROV_FRAME_DATA_PYLD_OFFSET 4
struct wifiprov_data_format{
u8_t type; /*type : highest 2 bit ; subtype : lowest 6 bit;*/
u8_t frame_control; /* if 5th bit set "1" indicate fragmentation frame */
u8_t sequence_number;
u8_t len;
u8_t *data;
};
void WifiProv_init(struct conn_callback *cb);
#endif
|
mkroman/bl602-604
|
components/bl602/bl602_std/bl602_std/StdDriver/Inc/bl602_glb.h
|
/**
******************************************************************************
* @file bl602_glb.h
* @version V1.0
* @date
* @brief This file is the standard driver header file
******************************************************************************
* @attention
*
* <h2><center>© COPYRIGHT(c) 2020 Bouffalo Lab</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
#ifndef __BL602_GLB_H__
#define __BL602_GLB_H__
#include "glb_reg.h"
#include "pds_reg.h"
#include "bl602_gpio.h"
#include "bl602_l1c.h"
#include "bl602_hbn.h"
#include "bl602_sf_ctrl.h"
#include "bl602_sf_cfg.h"
#include "bl602_aon.h"
#include "bl602_ef_ctrl.h"
#include "bl602_pds.h"
#include "bl602_common.h"
/** @addtogroup BL602_Peripheral_Driver
* @{
*/
/** @addtogroup GLB
* @{
*/
/** @defgroup GLB_Public_Types
* @{
*/
/**
* @brief GLB root clock type definition
*/
typedef enum {
GLB_ROOT_CLK_RC32M, /*!< root clock select RC32M */
GLB_ROOT_CLK_XTAL, /*!< root clock select XTAL */
GLB_ROOT_CLK_PLL, /*!< root clock select PLL others */
}GLB_ROOT_CLK_Type;
/**
* @brief GLB system clock type definition
*/
typedef enum {
GLB_SYS_CLK_RC32M, /*!< use RC32M as system clock frequency */
GLB_SYS_CLK_XTAL, /*!< use XTAL as system clock */
GLB_SYS_CLK_PLL48M, /*!< use PLL output 48M as system clock */
GLB_SYS_CLK_PLL120M, /*!< use PLL output 120M as system clock */
GLB_SYS_CLK_PLL160M, /*!< use PLL output 160M as system clock */
GLB_SYS_CLK_PLL192M, /*!< use PLL output 192M as system clock */
}GLB_SYS_CLK_Type;
/**
* @brief GLB SOC clock type definition
*/
typedef enum {
GLB_SOC_CLK_CORE_CLK_DIV, /*!< select CORE clock after core_clk_div as SOC clock */
}GLB_SOC_CLK_Type;
/**
* @brief GLB DMA clock ID type definition
*/
typedef enum {
GLB_DMA_CLK_DMA0_CH0, /*!< DMA clock ID:channel 0 */
GLB_DMA_CLK_DMA0_CH1, /*!< DMA clock ID:channel 1 */
GLB_DMA_CLK_DMA0_CH2, /*!< DMA clock ID:channel 2 */
GLB_DMA_CLK_DMA0_CH3, /*!< DMA clock ID:channel 3 */
}GLB_DMA_CLK_ID_Type;
/**
* @brief GLB clock source type definition
*/
typedef enum {
GLB_IR_CLK_SRC_XCLK, /*!< IR clock source select XCLK */
}GLB_IR_CLK_SRC_Type;
/**
* @brief GLB flash clock type definition
*/
typedef enum {
GLB_SFLASH_CLK_120M, /*!< Select 120M as flash clock */
GLB_SFLASH_CLK_XTAL, /*!< Select XTAL as flash clock */
GLB_SFLASH_CLK_48M, /*!< Select 48M as flash clock */
GLB_SFLASH_CLK_80M, /*!< Select 80M as flash clock */
GLB_SFLASH_CLK_BCLK, /*!< Select BCLK as flash clock */
GLB_SFLASH_CLK_96M, /*!< Select 96M as flash clock */
}GLB_SFLASH_CLK_Type;
/**
* @brief GLB UART clock type definition
*/
typedef enum {
GLB_UART_CLK_FCLK, /*!< Select fclk as UART clock */
GLB_UART_CLK_PLL160M, /*!< Select PLL 160M as UART clock */
}GLB_UART_CLK_Type;
/**
* @brief GLB SPI pad action type definition
*/
typedef enum {
GLB_SPI_PAD_ACT_AS_SLAVE, /*!< SPI pad act as slave */
GLB_SPI_PAD_ACT_AS_MASTER, /*!< SPI pad act as master */
}GLB_SPI_PAD_ACT_AS_Type;
/**
* @brief GLB PKA clock type definition
*/
typedef enum {
GLB_PKA_CLK_HCLK, /*!< Select HCLK as PKA clock */
GLB_PKA_CLK_PLL120M, /*!< Select PLL 120M as PKA clock */
}GLB_PKA_CLK_Type;
/**
* @brief BMX arb mode type definition
*/
typedef enum {
BMX_ARB_FIX, /*!< 0->fix */
BMX_ARB_ROUND_ROBIN, /*!< 2->round-robin */
BMX_ARB_RANDOM, /*!< 3->random */
}BMX_ARB_Type;
/**
* @brief BMX configuration structure type definition
*/
typedef struct {
uint8_t timeoutEn; /*!< Bus timeout enable: detect slave no reaponse in 1024 cycles */
BL_Fun_Type errEn; /*!< Bus error response enable */
BMX_ARB_Type arbMod; /*!< 0->fix, 2->round-robin, 3->random */
}BMX_Cfg_Type;
/**
* @brief BMX bus err type definition
*/
typedef enum {
BMX_BUS_ERR_TRUSTZONE_DECODE, /*!< Bus trustzone decode error */
BMX_BUS_ERR_ADDR_DECODE, /*!< Bus addr decode error */
}BMX_BUS_ERR_Type;
/**
* @brief BMX bus err interrupt type definition
*/
typedef enum {
BMX_ERR_INT_ERR, /*!< BMX bus err interrupt */
BMX_ERR_INT_ALL, /*!< BMX bus err interrupt max num */
}BMX_ERR_INT_Type;
/**
* @brief BMX time out interrupt type definition
*/
typedef enum {
BMX_TO_INT_TIMEOUT, /*!< BMX timeout interrupt */
BMX_TO_INT_ALL, /*!< BMX timeout interrupt max num */
}BMX_TO_INT_Type;
/**
* @brief GLB EM type definition
*/
typedef enum {
GLB_EM_0KB=0x0, /*!< 0x0 --> 0KB */
GLB_EM_8KB=0x3, /*!< 0x3 --> 8KB */
GLB_EM_16KB=0xF, /*!< 0xF --> 16KB */
}GLB_EM_Type;
/**
* @brief GLB RTC clock type definition
*/
typedef enum {
GLB_MTIMER_CLK_CPU_CLK, /*!< CPU clock */
GLB_MTIMER_CLK_32K, /*!< 32KHz */
}GLB_MTIMER_CLK_Type;
/**
* @brief GLB ADC clock type definition
*/
typedef enum {
GLB_ADC_CLK_96M, /*!< use 96M as ADC clock */
GLB_ADC_CLK_XCLK, /*!< use XCLK as ADC clock */
}GLB_ADC_CLK_Type;
/**
* @brief GLB DAC clock type definition
*/
typedef enum {
GLB_DAC_CLK_32M, /*!< use 32M as DAC clock */
GLB_DAC_CLK_XCLK, /*!< use XCLK as DAC clock */
}GLB_DAC_CLK_Type;
/**
* @brief GLB DIG clock source select type definition
*/
typedef enum {
GLB_DIG_CLK_PLL_32M, /*!< select PLL 32M as DIG clock source */
GLB_DIG_CLK_XCLK, /*!< select XCLK as DIG clock source */
}GLB_DIG_CLK_Type;
/**
* @brief GLB 512K clock out select type definition
*/
typedef enum {
GLB_512K_CLK_OUT_512K, /*!< select 512K clock out */
GLB_512K_CLK_OUT_256K, /*!< select 256K clock out */
GLB_512K_CLK_OUT_128K, /*!< select 128K clock out */
}GLB_512K_CLK_OUT_Type;
/**
* @brief GLB BT bandwidth type definition
*/
typedef enum {
GLB_BT_BANDWIDTH_1M, /*!< BT bandwidth 1MHz */
GLB_BT_BANDWIDTH_2M, /*!< BT bandwidth 2MHz */
}GLB_BT_BANDWIDTH_Type;
/**
* @brief GLB UART signal type definition
*/
typedef enum {
GLB_UART_SIG_0, /*!< UART signal 0 */
GLB_UART_SIG_1, /*!< UART signal 1 */
GLB_UART_SIG_2, /*!< UART signal 2 */
GLB_UART_SIG_3, /*!< UART signal 3 */
GLB_UART_SIG_4, /*!< UART signal 4 */
GLB_UART_SIG_5, /*!< UART signal 5 */
GLB_UART_SIG_6, /*!< UART signal 6 */
GLB_UART_SIG_7, /*!< UART signal 7 */
}GLB_UART_SIG_Type;
/**
* @brief GLB UART signal function type definition
*/
typedef enum {
GLB_UART_SIG_FUN_UART0_RTS, /*!< UART funtion: UART 0 RTS */
GLB_UART_SIG_FUN_UART0_CTS, /*!< UART funtion: UART 0 CTS */
GLB_UART_SIG_FUN_UART0_TXD, /*!< UART funtion: UART 0 TXD */
GLB_UART_SIG_FUN_UART0_RXD, /*!< UART funtion: UART 0 RXD */
GLB_UART_SIG_FUN_UART1_RTS, /*!< UART funtion: UART 1 RTS */
GLB_UART_SIG_FUN_UART1_CTS, /*!< UART funtion: UART 1 CTS */
GLB_UART_SIG_FUN_UART1_TXD, /*!< UART funtion: UART 1 TXD */
GLB_UART_SIG_FUN_UART1_RXD, /*!< UART funtion: UART 1 RXD */
}GLB_UART_SIG_FUN_Type;
/**
* @brief GLB GPIO real mode type definition
*/
typedef enum {
GLB_GPIO_REAL_MODE_REG, /*!< GPIO real function is reg_gpio_x_func_sel */
GLB_GPIO_REAL_MODE_SDIO=0x1, /*!< GPIO real function is SDIO */
GLB_GPIO_REAL_MODE_RF=0xC, /*!< GPIO real function is RF */
GLB_GPIO_REAL_MODE_JTAG=0xE, /*!< GPIO real function is JTAG */
GLB_GPIO_REAL_MODE_CCI=0xF, /*!< GPIO real function is CCI */
}GLB_GPIO_REAL_MODE_Type;
/**
* @brief GLB GPIO interrupt trigger mode type definition
*/
typedef enum {
GLB_GPIO_INT_TRIG_NEG_PULSE, /*!< GPIO negedge pulse trigger interrupt */
GLB_GPIO_INT_TRIG_POS_PULSE, /*!< GPIO posedge pulse trigger interrupt */
GLB_GPIO_INT_TRIG_NEG_LEVEL, /*!< GPIO negedge level trigger interrupt (32k 3T) */
GLB_GPIO_INT_TRIG_POS_LEVEL, /*!< GPIO posedge level trigger interrupt (32k 3T) */
}GLB_GPIO_INT_TRIG_Type;
/**
* @brief GLB GPIO interrupt control mode type definition
*/
typedef enum {
GLB_GPIO_INT_CONTROL_SYNC, /*!< GPIO interrupt sync mode */
GLB_GPIO_INT_CONTROL_ASYNC, /*!< GPIO interrupt async mode */
}GLB_GPIO_INT_CONTROL_Type;
/**
* @brief PLL XTAL type definition
*/
typedef enum {
GLB_PLL_XTAL_NONE, /*!< XTAL is none */
GLB_PLL_XTAL_24M, /*!< XTAL is 24M */
GLB_PLL_XTAL_32M, /*!< XTAL is 32M */
GLB_PLL_XTAL_38P4M, /*!< XTAL is 38.4M */
GLB_PLL_XTAL_40M, /*!< XTAL is 40M */
GLB_PLL_XTAL_26M, /*!< XTAL is 26M */
GLB_PLL_XTAL_RC32M, /*!< XTAL is RC32M */
}GLB_PLL_XTAL_Type;
/**
* @brief PLL output clock type definition
*/
typedef enum {
GLB_PLL_CLK_480M, /*!< PLL output clock:480M */
GLB_PLL_CLK_240M, /*!< PLL output clock:240M */
GLB_PLL_CLK_192M, /*!< PLL output clock:192M */
GLB_PLL_CLK_160M, /*!< PLL output clock:160M */
GLB_PLL_CLK_120M, /*!< PLL output clock:120M */
GLB_PLL_CLK_96M, /*!< PLL output clock:96M */
GLB_PLL_CLK_80M, /*!< PLL output clock:80M */
GLB_PLL_CLK_48M, /*!< PLL output clock:48M */
GLB_PLL_CLK_32M, /*!< PLL output clock:32M */
}GLB_PLL_CLK_Type;
/**
* @brief PLL configuration structure type definition
*/
typedef struct {
uint8_t clkpllIcp1u; /*!< int mode:0, frac mode:1 */
uint8_t clkpllIcp5u; /*!< int mode:2, frac mode:0 */
uint8_t clkpllIntFracSw; /*!< 0:int mode, 1:frac mode */
uint8_t clkpllC3; /*!< int:3, frac:2 */
uint8_t clkpllCz; /*!< int:1, frac:2 */
uint8_t clkpllRz; /*!< int:1, frac:5 */
uint8_t clkpllR4; /*!< int:2, frac:2 */
uint8_t clkpllR4Short; /*!< int:1, frac:0 */
uint8_t clkpllRefdivRatio; /*!< ref divider ratio */
uint8_t clkpllPostdiv; /*!< >=8 and should be even number */
uint32_t clkpllSdmin; /*!< sdmin */
uint8_t clkpllSelFbClk; /*!< 0:mod1, 1:mod2, 2:mod3 */
uint8_t clkpllSelSampleClk; /*!< 0:[16,63)mod3, 1:[32:127)mod4, 2:[64,255)mod5 */
}GLB_PLL_Cfg_Type;
/*@} end of group GLB_Public_Types */
/** @defgroup GLB_Public_Constants
* @{
*/
/** @defgroup GLB_ROOT_CLK_TYPE
* @{
*/
#define IS_GLB_ROOT_CLK_TYPE(type) (((type) == GLB_ROOT_CLK_RC32M) || \
((type) == GLB_ROOT_CLK_XTAL) || \
((type) == GLB_ROOT_CLK_PLL))
/** @defgroup GLB_SYS_CLK_TYPE
* @{
*/
#define IS_GLB_SYS_CLK_TYPE(type) (((type) == GLB_SYS_CLK_RC32M) || \
((type) == GLB_SYS_CLK_XTAL) || \
((type) == GLB_SYS_CLK_PLL48M) || \
((type) == GLB_SYS_CLK_PLL120M) || \
((type) == GLB_SYS_CLK_PLL160M) || \
((type) == GLB_SYS_CLK_PLL192M))
/** @defgroup GLB_SOC_CLK_TYPE
* @{
*/
#define IS_GLB_SOC_CLK_TYPE(type) (((type) == GLB_SOC_CLK_CORE_CLK_DIV))
/** @defgroup GLB_DMA_CLK_ID_TYPE
* @{
*/
#define IS_GLB_DMA_CLK_ID_TYPE(type) (((type) == GLB_DMA_CLK_DMA0_CH0) || \
((type) == GLB_DMA_CLK_DMA0_CH1) || \
((type) == GLB_DMA_CLK_DMA0_CH2) || \
((type) == GLB_DMA_CLK_DMA0_CH3))
/** @defgroup GLB_IR_CLK_SRC_TYPE
* @{
*/
#define IS_GLB_IR_CLK_SRC_TYPE(type) (((type) == GLB_IR_CLK_SRC_XCLK))
/** @defgroup GLB_SFLASH_CLK_TYPE
* @{
*/
#define IS_GLB_SFLASH_CLK_TYPE(type) (((type) == GLB_SFLASH_CLK_120M) || \
((type) == GLB_SFLASH_CLK_XTAL) || \
((type) == GLB_SFLASH_CLK_48M) || \
((type) == GLB_SFLASH_CLK_80M) || \
((type) == GLB_SFLASH_CLK_BCLK) || \
((type) == GLB_SFLASH_CLK_96M))
/** @defgroup GLB_UART_CLK_TYPE
* @{
*/
#define IS_GLB_UART_CLK_TYPE(type) (((type) == GLB_UART_CLK_FCLK) || \
((type) == GLB_UART_CLK_PLL160M))
/** @defgroup GLB_SPI_PAD_ACT_AS_TYPE
* @{
*/
#define IS_GLB_SPI_PAD_ACT_AS_TYPE(type) (((type) == GLB_SPI_PAD_ACT_AS_SLAVE) || \
((type) == GLB_SPI_PAD_ACT_AS_MASTER))
/** @defgroup GLB_PKA_CLK_TYPE
* @{
*/
#define IS_GLB_PKA_CLK_TYPE(type) (((type) == GLB_PKA_CLK_HCLK) || \
((type) == GLB_PKA_CLK_PLL120M))
/** @defgroup BMX_ARB_TYPE
* @{
*/
#define IS_BMX_ARB_TYPE(type) (((type) == BMX_ARB_FIX) || \
((type) == BMX_ARB_ROUND_ROBIN) || \
((type) == BMX_ARB_RANDOM))
/** @defgroup BMX_BUS_ERR_TYPE
* @{
*/
#define IS_BMX_BUS_ERR_TYPE(type) (((type) == BMX_BUS_ERR_TRUSTZONE_DECODE) || \
((type) == BMX_BUS_ERR_ADDR_DECODE))
/** @defgroup BMX_ERR_INT_TYPE
* @{
*/
#define IS_BMX_ERR_INT_TYPE(type) (((type) == BMX_ERR_INT_ERR) || \
((type) == BMX_ERR_INT_ALL))
/** @defgroup BMX_TO_INT_TYPE
* @{
*/
#define IS_BMX_TO_INT_TYPE(type) (((type) == BMX_TO_INT_TIMEOUT) || \
((type) == BMX_TO_INT_ALL))
/** @defgroup GLB_EM_TYPE
* @{
*/
#define IS_GLB_EM_TYPE(type) (((type) == GLB_EM_0KB) || \
((type) == GLB_EM_8KB) || \
((type) == GLB_EM_16KB))
/** @defgroup GLB_MTIMER_CLK_TYPE
* @{
*/
#define IS_GLB_MTIMER_CLK_TYPE(type) (((type) == GLB_MTIMER_CLK_CPU_CLK) || \
((type) == GLB_MTIMER_CLK_32K))
/** @defgroup GLB_ADC_CLK_TYPE
* @{
*/
#define IS_GLB_ADC_CLK_TYPE(type) (((type) == GLB_ADC_CLK_96M) || \
((type) == GLB_ADC_CLK_XCLK))
/** @defgroup GLB_DAC_CLK_TYPE
* @{
*/
#define IS_GLB_DAC_CLK_TYPE(type) (((type) == GLB_DAC_CLK_32M) || \
((type) == GLB_DAC_CLK_XCLK))
/** @defgroup GLB_DIG_CLK_TYPE
* @{
*/
#define IS_GLB_DIG_CLK_TYPE(type) (((type) == GLB_DIG_CLK_PLL_32M) || \
((type) == GLB_DIG_CLK_XCLK))
/** @defgroup GLB_512K_CLK_OUT_TYPE
* @{
*/
#define IS_GLB_512K_CLK_OUT_TYPE(type) (((type) == GLB_512K_CLK_OUT_512K) || \
((type) == GLB_512K_CLK_OUT_256K) || \
((type) == GLB_512K_CLK_OUT_128K))
/** @defgroup GLB_BT_BANDWIDTH_TYPE
* @{
*/
#define IS_GLB_BT_BANDWIDTH_TYPE(type) (((type) == GLB_BT_BANDWIDTH_1M) || \
((type) == GLB_BT_BANDWIDTH_2M))
/** @defgroup GLB_UART_SIG_TYPE
* @{
*/
#define IS_GLB_UART_SIG_TYPE(type) (((type) == GLB_UART_SIG_0) || \
((type) == GLB_UART_SIG_1) || \
((type) == GLB_UART_SIG_2) || \
((type) == GLB_UART_SIG_3) || \
((type) == GLB_UART_SIG_4) || \
((type) == GLB_UART_SIG_5) || \
((type) == GLB_UART_SIG_6) || \
((type) == GLB_UART_SIG_7))
/** @defgroup GLB_UART_SIG_FUN_TYPE
* @{
*/
#define IS_GLB_UART_SIG_FUN_TYPE(type) (((type) == GLB_UART_SIG_FUN_UART0_RTS) || \
((type) == GLB_UART_SIG_FUN_UART0_CTS) || \
((type) == GLB_UART_SIG_FUN_UART0_TXD) || \
((type) == GLB_UART_SIG_FUN_UART0_RXD) || \
((type) == GLB_UART_SIG_FUN_UART1_RTS) || \
((type) == GLB_UART_SIG_FUN_UART1_CTS) || \
((type) == GLB_UART_SIG_FUN_UART1_TXD) || \
((type) == GLB_UART_SIG_FUN_UART1_RXD))
/** @defgroup GLB_GPIO_REAL_MODE_TYPE
* @{
*/
#define IS_GLB_GPIO_REAL_MODE_TYPE(type) (((type) == GLB_GPIO_REAL_MODE_REG) || \
((type) == GLB_GPIO_REAL_MODE_SDIO) || \
((type) == GLB_GPIO_REAL_MODE_RF) || \
((type) == GLB_GPIO_REAL_MODE_JTAG) || \
((type) == GLB_GPIO_REAL_MODE_CCI))
/** @defgroup GLB_GPIO_INT_TRIG_TYPE
* @{
*/
#define IS_GLB_GPIO_INT_TRIG_TYPE(type) (((type) == GLB_GPIO_INT_TRIG_NEG_PULSE) || \
((type) == GLB_GPIO_INT_TRIG_POS_PULSE) || \
((type) == GLB_GPIO_INT_TRIG_NEG_LEVEL) || \
((type) == GLB_GPIO_INT_TRIG_POS_LEVEL))
/** @defgroup GLB_GPIO_INT_CONTROL_TYPE
* @{
*/
#define IS_GLB_GPIO_INT_CONTROL_TYPE(type) (((type) == GLB_GPIO_INT_CONTROL_SYNC) || \
((type) == GLB_GPIO_INT_CONTROL_ASYNC))
/** @defgroup GLB_PLL_XTAL_TYPE
* @{
*/
#define IS_GLB_PLL_XTAL_TYPE(type) (((type) == GLB_PLL_XTAL_NONE) || \
((type) == GLB_PLL_XTAL_24M) || \
((type) == GLB_PLL_XTAL_32M) || \
((type) == GLB_PLL_XTAL_38P4M) || \
((type) == GLB_PLL_XTAL_40M) || \
((type) == GLB_PLL_XTAL_26M) || \
((type) == GLB_PLL_XTAL_RC32M))
/** @defgroup GLB_PLL_CLK_TYPE
* @{
*/
#define IS_GLB_PLL_CLK_TYPE(type) (((type) == GLB_PLL_CLK_480M) || \
((type) == GLB_PLL_CLK_240M) || \
((type) == GLB_PLL_CLK_192M) || \
((type) == GLB_PLL_CLK_160M) || \
((type) == GLB_PLL_CLK_120M) || \
((type) == GLB_PLL_CLK_96M) || \
((type) == GLB_PLL_CLK_80M) || \
((type) == GLB_PLL_CLK_48M) || \
((type) == GLB_PLL_CLK_32M))
/*@} end of group GLB_Public_Constants */
/** @defgroup GLB_Public_Macros
* @{
*/
#define UART_SIG_SWAP_GPIO0_GPIO7 0x01 /* GPIO0-7 uart_sig[0:7] -> uart_sig[4:7], uart_sig[0:3] */
#define UART_SIG_SWAP_GPIO8_GPIO15 0x02 /* GPIO8-15 uart_sig[0:7] -> uart_sig[4:7], uart_sig[0:3] */
#define UART_SIG_SWAP_GPIO16_GPIO22 0x04 /* GPIO16-22 uart_sig[0:7] -> uart_sig[4:7], uart_sig[0:3] */
#define UART_SIG_SWAP_NONE 0x00 /* GPIO0-22 uart_sig[0:7] <- uart_sig[4:7], uart_sig[0:3] */
#define JTAG_SIG_SWAP_GPIO0_GPIO3 0x01 /* GPIO0-3 E21_TMS/E21_TDI/E21_TCK/E21_TDO -> E21_TCK/E21_TDO/E21_TMS/E21_TDI */
#define JTAG_SIG_SWAP_GPIO4_GPIO7 0x02 /* GPIO4-7 E21_TMS/E21_TDI/E21_TCK/E21_TDO -> E21_TCK/E21_TDO/E21_TMS/E21_TDI */
#define JTAG_SIG_SWAP_GPIO8_GPIO11 0x04 /* GPIO8-11 E21_TMS/E21_TDI/E21_TCK/E21_TDO -> E21_TCK/E21_TDO/E21_TMS/E21_TDI */
#define JTAG_SIG_SWAP_GPIO12_GPIO15 0x08 /* GPIO12-15 E21_TMS/E21_TDI/E21_TCK/E21_TDO -> E21_TCK/E21_TDO/E21_TMS/E21_TDI */
#define JTAG_SIG_SWAP_GPIO16_GPIO19 0x10 /* GPIO16-19 E21_TMS/E21_TDI/E21_TCK/E21_TDO -> E21_TCK/E21_TDO/E21_TMS/E21_TDI */
#define JTAG_SIG_SWAP_GPIO20_GPIO22 0x20 /* GPIO20-22 E21_TMS/E21_TDI/E21_TCK/E21_TDO -> E21_TCK/E21_TDO/E21_TMS/E21_TDI */
#define JTAG_SIG_SWAP_NONE 0x00 /* GPIO0-22 E21_TMS/E21_TDI/E21_TCK/E21_TDO <- E21_TCK/E21_TDO/E21_TMS/E21_TDI */
/*@} end of group GLB_Public_Macros */
/** @defgroup GLB_Public_Functions
* @{
*/
/*----------*/
GLB_ROOT_CLK_Type GLB_Get_Root_CLK_Sel(void);
BL_Err_Type GLB_Set_System_CLK_Div(uint8_t hclkDiv,uint8_t bclkDiv);
uint8_t GLB_Get_BCLK_Div(void);
uint8_t GLB_Get_HCLK_Div(void);
BL_Err_Type Update_SystemCoreClockWith_XTAL(GLB_PLL_XTAL_Type xtalType);
BL_Err_Type GLB_Set_System_CLK(GLB_PLL_XTAL_Type xtalType,GLB_SYS_CLK_Type clkFreq);
BL_Err_Type System_Core_Clock_Update_From_RC32M(void);
/*----------*/
BL_Err_Type GLB_Set_BLE_CLK(uint8_t enable);
BL_Err_Type GLB_Set_WiFi_Core_CLK(uint8_t clkDiv);
BL_Err_Type GLB_Set_WiFi_Encrypt_CLK(uint8_t clkDiv);
BL_Err_Type GLB_Set_DMA_CLK(uint8_t enable,GLB_DMA_CLK_ID_Type clk);
BL_Err_Type GLB_Set_IR_CLK(uint8_t enable,GLB_IR_CLK_SRC_Type clkSel,uint8_t div);
BL_Err_Type GLB_Set_SF_CLK(uint8_t enable,GLB_SFLASH_CLK_Type clkSel,uint8_t div);
BL_Err_Type GLB_Set_UART_CLK(uint8_t enable,HBN_UART_CLK_Type clkSel,uint8_t div);
BL_Err_Type GLB_Set_I2C_CLK(uint8_t enable,uint8_t div);
BL_Err_Type GLB_Set_SPI_CLK(uint8_t enable,uint8_t div);
/*----------*/
BL_Err_Type GLB_Set_PKA_CLK_Sel(GLB_PKA_CLK_Type clkSel);
BL_Err_Type GLB_SW_System_Reset(void);
BL_Err_Type GLB_SW_CPU_Reset(void);
BL_Err_Type GLB_SW_POR_Reset(void);
BL_Err_Type GLB_AHB_Slave1_Reset(BL_AHB_Slave1_Type slave1);
BL_Err_Type GLB_AHB_Slave1_Clock_Gate(uint8_t enable,BL_AHB_Slave1_Type slave1);
/*----------*/
BL_Err_Type GLB_BMX_Init(BMX_Cfg_Type *BmxCfg);
BL_Err_Type GLB_BMX_Addr_Monitor_Enable(void);
BL_Err_Type GLB_BMX_Addr_Monitor_Disable(void);
BL_Err_Type GLB_BMX_BusErrResponse_Enable(void);
BL_Err_Type GLB_BMX_BusErrResponse_Disable(void);
BL_Sts_Type GLB_BMX_Get_Status(BMX_BUS_ERR_Type errType);
uint32_t GLB_BMX_Get_Err_Addr(void);
BL_Err_Type BMX_ERR_INT_Callback_Install(BMX_ERR_INT_Type intType,intCallback_Type* cbFun);
BL_Err_Type BMX_TIMEOUT_INT_Callback_Install(BMX_TO_INT_Type intType,intCallback_Type* cbFun);
/*----------*/
BL_Err_Type GLB_Set_OCRAM_Idle(void);
BL_Err_Type GLB_Set_SRAM_RET(uint32_t value);
uint32_t GLB_Get_SRAM_RET(void);
BL_Err_Type GLB_Set_SRAM_SLP(uint32_t value);
uint32_t GLB_Get_SRAM_SLP(void);
BL_Err_Type GLB_Set_SRAM_PARM(uint32_t value);
uint32_t GLB_Get_SRAM_PARM(void);
/*----------*/
BL_Err_Type GLB_Set_EM_Sel(GLB_EM_Type emType);
/*----------*/
BL_Err_Type GLB_UART_Sig_Swap_Set(uint8_t swapSel);
BL_Err_Type GLB_JTAG_Sig_Swap_Set(uint8_t swapSel);
BL_Err_Type GLB_Swap_SPI_0_MOSI_With_MISO(BL_Fun_Type newState);
BL_Err_Type GLB_Set_SPI_0_ACT_MOD_Sel(GLB_SPI_PAD_ACT_AS_Type mod);
BL_Err_Type GLB_Select_Internal_Flash(void);
BL_Err_Type GLB_Select_External_Flash(void);
BL_Err_Type GLB_Deswap_Flash_Pin(void);
BL_Err_Type GLB_Swap_Flash_Pin(void);
/*----------*/
BL_Err_Type GLB_Set_MTimer_CLK(uint8_t enable,GLB_MTIMER_CLK_Type clkSel,uint32_t div);
/*----------*/
BL_Err_Type GLB_Set_ADC_CLK(uint8_t enable,GLB_ADC_CLK_Type clkSel,uint8_t div);
/*----------*/
BL_Err_Type GLB_Platform_Wakeup_Enable(void);
BL_Err_Type GLB_Platform_Wakeup_Disable(void);
/*----------*/
BL_Err_Type GLB_Set_DIG_CLK_Sel(GLB_DIG_CLK_Type clkSel);
BL_Err_Type GLB_Set_DIG_512K_CLK(uint8_t enable,uint8_t compensation,uint8_t div);
BL_Err_Type GLB_Set_DIG_32K_CLK(uint8_t enable,uint8_t compensation,uint8_t div);
/*----------*/
BL_Err_Type GLB_Set_BT_Coex_Signal(uint8_t enable,GLB_BT_BANDWIDTH_Type bandWidth,
uint8_t pti,uint8_t channel);
/*----------*/
BL_Err_Type GLB_UART_Fun_Sel(GLB_UART_SIG_Type sig,GLB_UART_SIG_FUN_Type fun);
/*----------*/
BL_Err_Type GLB_IR_RX_GPIO_Sel(GLB_GPIO_Type gpio);
BL_Err_Type GLB_IR_LED_Driver_Enable(void);
BL_Err_Type GLB_IR_LED_Driver_Disable(void);
BL_Err_Type GLB_IR_LED_Driver_Ibias(uint8_t ibias);
/*----------*/
BL_Err_Type GLB_GPIO_Init(GLB_GPIO_Cfg_Type *cfg);
BL_Err_Type GLB_GPIO_Func_Init(uint8_t gpioFun,GLB_GPIO_Type *pinList,uint8_t cnt);
BL_Err_Type GLB_GPIO_INPUT_Enable(GLB_GPIO_Type gpioPin);
BL_Err_Type GLB_GPIO_INPUT_Disable(GLB_GPIO_Type gpioPin);
BL_Err_Type GLB_GPIO_OUTPUT_Enable(GLB_GPIO_Type gpioPin);
BL_Err_Type GLB_GPIO_OUTPUT_Disable(GLB_GPIO_Type gpioPin);
BL_Err_Type GLB_GPIO_Set_HZ(GLB_GPIO_Type gpioPin);
uint8_t GLB_GPIO_Get_Fun(GLB_GPIO_Type gpioPin);
GLB_GPIO_REAL_MODE_Type GLB_GPIO_Get_Real_Fun(GLB_GPIO_Type gpioPin);
BL_Err_Type GLB_GPIO_Write(GLB_GPIO_Type gpioPin,uint32_t val);
uint32_t GLB_GPIO_Read(GLB_GPIO_Type gpioPin);
BL_Err_Type GLB_GPIO_IntMask(GLB_GPIO_Type gpioPin,BL_Mask_Type intMask);
BL_Err_Type GLB_GPIO_IntClear(GLB_GPIO_Type gpioPin,BL_Sts_Type intClear);
BL_Sts_Type GLB_Get_GPIO_IntStatus(GLB_GPIO_Type gpioPin);
BL_Err_Type GLB_Clr_GPIO_IntStatus(GLB_GPIO_Type gpioPin);
BL_Err_Type GLB_Set_GPIO_IntMod(GLB_GPIO_Type gpioPin,GLB_GPIO_INT_CONTROL_Type intCtlMod,
GLB_GPIO_INT_TRIG_Type intTrgMod);
GLB_GPIO_INT_CONTROL_Type GLB_Get_GPIO_IntCtlMod(GLB_GPIO_Type gpioPin);
BL_Err_Type GLB_GPIO_INT0_Callback_Install(GLB_GPIO_Type gpioPin,intCallback_Type* cbFun);
void GPIO_INT0_IRQHandler(void);
BL_Err_Type GLB_Set_DAC_CLK(uint8_t enable,GLB_DAC_CLK_Type clkSel,uint8_t div);
/*@} end of group GLB_Public_Functions */
/*@} end of group GLB */
/*@} end of group BL602_Peripheral_Driver */
#endif /* __BL602_GLB_H__ */
|
mkroman/bl602-604
|
components/network/ble/blestack/src/port/bl_port.c
|
<reponame>mkroman/bl602-604
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <zephyr.h>
#include <misc/util.h>
#include <misc/dlist.h>
#define BT_DBG_ENABLED IS_ENABLED(CONFIG_BLUETOOTH_DEBUG_CORE)
#include <log.h>
#include <stddef.h>
#include <stdint.h>
#include <string.h>
#include "atomic.h"
#include "errno.h"
#include <FreeRTOS.h>
#include <task.h>
#include <semphr.h>
#include <timers.h>
#if defined(BL702)
#include "bl702.h"
#endif
void k_queue_init(struct k_queue *queue)
{
int size = 20;
uint8_t blk_size = sizeof(void *) + 1;
queue->hdl = xQueueCreate(size, blk_size);
BT_ASSERT(queue->hdl != NULL);
sys_dlist_init(&queue->poll_events);
}
void k_queue_insert(struct k_queue *queue, void *prev, void *data)
{
BaseType_t ret;
(void) ret;
ret = xQueueSend(queue->hdl, &data, portMAX_DELAY);
BT_ASSERT(ret == pdPASS);
}
void k_queue_append(struct k_queue *queue, void *data)
{
k_queue_insert(queue, NULL, data);
}
void k_queue_insert_from_isr(struct k_queue *queue, void *prev, void *data)
{
BaseType_t xHigherPriorityTaskWoken;
xQueueSendFromISR(queue->hdl, &data, &xHigherPriorityTaskWoken);
if(xHigherPriorityTaskWoken == pdTRUE)
{
portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
}
}
void k_queue_append_from_isr(struct k_queue *queue, void *data)
{
k_queue_insert_from_isr(queue, NULL, data);
}
void k_queue_free(struct k_queue *queue)
{
vQueueDelete(queue->hdl);
}
void k_queue_prepend(struct k_queue *queue, void *data)
{
k_queue_insert(queue, NULL, data);
}
void k_queue_append_list(struct k_queue *queue, void *head, void *tail)
{
struct net_buf *buf_tail = (struct net_buf *)head;
for (buf_tail = (struct net_buf *)head; buf_tail; buf_tail = buf_tail->frags) {
k_queue_append(queue, buf_tail);
}
}
void *k_queue_get(struct k_queue *queue, s32_t timeout)
{
void *msg = NULL;
unsigned int t = timeout;
BaseType_t ret;
(void) ret;
if (timeout == K_FOREVER) {
t = BL_WAIT_FOREVER;
} else if (timeout == K_NO_WAIT) {
t = BL_NO_WAIT;
}
ret = xQueueReceive(queue->hdl, &msg, t == BL_WAIT_FOREVER ? portMAX_DELAY : ms2tick(t));
if (ret == pdPASS) {
return msg;
} else {
return NULL;
}
}
int k_queue_is_empty(struct k_queue *queue)
{
return uxQueueMessagesWaiting(queue->hdl)? 0:1;
}
int k_sem_init(struct k_sem *sem, unsigned int initial_count, unsigned int limit)
{
if (NULL == sem) {
BT_ERR("sem is NULL\n");
return -EINVAL;
}
sem->sem.hdl = xSemaphoreCreateCounting(limit, initial_count);
sys_dlist_init(&sem->poll_events);
return 0;
}
int k_sem_take(struct k_sem *sem, uint32_t timeout)
{
BaseType_t ret;
unsigned int t = timeout;
(void) ret;
if (timeout == K_FOREVER) {
t = BL_WAIT_FOREVER;
} else if (timeout == K_NO_WAIT) {
t = BL_NO_WAIT;
}
if(NULL == sem){
return -1;
}
ret = xSemaphoreTake(sem->sem.hdl, t == BL_WAIT_FOREVER ? portMAX_DELAY : ms2tick(t));
return ret == pdPASS ? 0 : -1;
}
int k_sem_give(struct k_sem *sem)
{
BaseType_t ret;
(void) ret;
if (NULL == sem) {
BT_ERR("sem is NULL\n");
return -EINVAL;
}
ret = xSemaphoreGive(sem->sem.hdl);
return ret == pdPASS ? 0 : -1;
}
int k_sem_delete(struct k_sem *sem)
{
if (NULL == sem) {
BT_ERR("sem is NULL\n");
return -EINVAL;
}
vSemaphoreDelete(sem->sem.hdl);
return 0;
}
unsigned int k_sem_count_get(struct k_sem *sem)
{
return uxQueueMessagesWaiting(sem->sem.hdl);
}
void k_mutex_init(struct k_mutex *mutex)
{
if (NULL == mutex) {
BT_ERR("mutex is NULL\n");
return ;
}
mutex->mutex.hdl = xSemaphoreCreateMutex();
BT_ASSERT(mutex->mutex.hdl != NULL);
sys_dlist_init(&mutex->poll_events);
}
int64_t k_uptime_get()
{
return k_now_ms();
}
u32_t k_uptime_get_32(void)
{
return (u32_t)k_now_ms();
}
int k_thread_create(struct k_thread *new_thread, const char *name,
size_t stack_size, k_thread_entry_t entry,
int prio)
{
stack_size /= sizeof(StackType_t);
xTaskCreate(entry, name, stack_size, NULL, prio, (void *)(&new_thread->task));
return new_thread->task? 0 : -1;
}
int k_yield(void)
{
taskYIELD();
return 0;
}
void k_sleep(s32_t dur_ms)
{
TickType_t ticks;
ticks = pdMS_TO_TICKS(dur_ms);
vTaskDelay(ticks);
}
unsigned int irq_lock(void)
{
taskENTER_CRITICAL();
return 1;
}
void irq_unlock(unsigned int key)
{
taskEXIT_CRITICAL();
}
int k_is_in_isr(void)
{
#if defined(ARCH_RISCV)
return (xPortIsInsideInterrupt());
#else
/* IRQs + PendSV (14) + SYSTICK (15) are interrupts. */
return (__get_IPSR() > 13);
#endif
return 0;
}
void k_timer_init(k_timer_t *timer, k_timer_handler_t handle, void *args)
{
BT_ASSERT(timer != NULL);
timer->handler = handle;
timer->args = args;
timer->timer.hdl = xTimerCreate("Timer", pdMS_TO_TICKS(1000), 0, 0, (TimerCallbackFunction_t)(timer->handler));
BT_ASSERT(timer->timer.hdl != NULL);
}
void k_timer_start(k_timer_t *timer, uint32_t timeout)
{
BaseType_t ret;
(void) ret;
BT_ASSERT(timer != NULL);
timer->timeout = timeout;
timer->start_ms = k_now_ms();
ret = xTimerStop(timer->timer.hdl, 0);
BT_ASSERT(ret == pdPASS);
ret = xTimerChangePeriod(timer->timer.hdl, pdMS_TO_TICKS(timeout), 0);
BT_ASSERT(ret == pdPASS);
ret = xTimerStart(timer->timer.hdl, 0);
BT_ASSERT(ret == pdPASS);
}
void k_timer_stop(k_timer_t *timer)
{
BaseType_t ret;
(void) ret;
BT_ASSERT(timer != NULL);
ret = xTimerStop(timer->timer.hdl, 0);
BT_ASSERT(ret == pdPASS);
}
void k_timer_delete(k_timer_t *timer)
{
BaseType_t ret;
(void) ret;
BT_ASSERT(timer != NULL);
ret = xTimerDelete(timer->timer.hdl, 0);
BT_ASSERT(ret == pdPASS);
}
long long k_now_ms(void)
{
return (long long)(xTaskGetTickCount() * 1000)/configTICK_RATE_HZ;
}
|
mkroman/bl602-604
|
components/network/ble/blemesh/src/mesh_cli_cmds/mesh_cli_cmds.c
|
#include <stdlib.h>
#include "conn.h"
#include "gatt.h"
#include "FreeRTOS.h"
#include "task.h"
#include "cli.h"
#include "mesh_cli_cmds.h"
#include "include/mesh.h"
#include "errno.h"
#include "mesh.h"
#include "net.h"
#include "transport.h"
#include "foundation.h"
#include "mesh_settings.h"
#include "adv.h"
#include "beacon.h"
#include "hci_core.h"
#if defined(CONFIG_BT_MESH_MODEL_GEN_SRV)
#include "gen_srv.h"
#endif
#if defined(CONFIG_BT_SETTINGS)
#include "easyflash.h"
#endif
#define CUR_FAULTS_MAX 4
bool blemesh_inited = false;
#if defined(CONFIG_BT_MESH_LOW_POWER)
//below value is for Tmall Genie
u8_t dev_uuid[16] = {0xA8,0x01,0x71,0x5e,0x1c,0x00,0x00,0xe4,0x46,0x46,0x63,0xa7,0xf8,0x02,0x00,0x00};
u8_t auth_value[16] = {0x78,0x8A,0xE3,0xEE,0x0F,0x2A,0x7E,0xFA,0xD3,0x67,0x35,0x81,0x41,0xFE,0x1B,0x06};
#else
u8_t dev_uuid[16] = {0xA8,0x01,0x71,0xe0,0x1a,0x00,0x00,0x0f,0x7e,0x35,0x63,0xa7,0xf8,0x02,0x00,0x00};
u8_t auth_value[16] = {0x7f,0x80,0x1a,0xf4,0xa0,0x8c,0x50,0x39,0xae,0x7d,0x7b,0x44,0xa0,0x92,0xd9,0xc2};
#endif
static bt_mesh_input_action_t input_act;
static u8_t input_size;
static u8_t cur_faults[CUR_FAULTS_MAX];
static u8_t reg_faults[CUR_FAULTS_MAX * 2];
static struct {
u16_t local;
u16_t dst;
u16_t net_idx;
u16_t app_idx;
} net = {
.local = BT_MESH_ADDR_UNASSIGNED,
.dst = BT_MESH_ADDR_UNASSIGNED,
};
#if defined(BL602)
#define vOutputString(...) printf(__VA_ARGS__)
#else
#define vOutputString(...) bl_print(SYSTEM_UART_ID, PRINT_MODULE_CLI, __VA_ARGS__)
#endif
static void prov_reset(void);
static void link_open(bt_mesh_prov_bearer_t bearer);
static void link_close(bt_mesh_prov_bearer_t bearer);
static int output_number(bt_mesh_output_action_t action, u32_t number);
static int output_string(const char *str);
static void prov_input_complete(void);
static void prov_complete(u16_t net_idx, u16_t addr);
static void prov_reset(void);
static int input(bt_mesh_input_action_t act, u8_t size);
static void get_faults(u8_t *faults, u8_t faults_size, u8_t *dst, u8_t *count);
static void health_current_status(struct bt_mesh_health_cli *cli, u16_t addr,
u8_t test_id, u16_t cid, u8_t *faults, size_t fault_count);
static int fault_get_cur(struct bt_mesh_model *model, u8_t *test_id,
u16_t *company_id, u8_t *faults, u8_t *fault_count);
static int fault_get_reg(struct bt_mesh_model *model, u16_t cid,
u8_t *test_id, u8_t *faults, u8_t *fault_count);
static int fault_clear(struct bt_mesh_model *model, uint16_t cid);
static int fault_test(struct bt_mesh_model *model, uint8_t test_id, uint16_t cid);
static void attn_on(struct bt_mesh_model *model);
static void attn_off(struct bt_mesh_model *model);
static void cmd_mesh_init(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
static void cmd_set_dev_uuid(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
static void cmd_input_num(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
static void cmd_input_str(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
static void cmd_pb(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
static void cmd_reset(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
static void cmd_net_send(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
static void cmd_seg_send(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
static void cmd_rpl_clr(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
static void cmd_ivu_test(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
static void cmd_iv_update(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
static void cmd_fault_set(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
#if defined(CONFIG_BT_MESH_LOW_POWER)
static void cmd_lpn_set(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
#endif
static struct bt_mesh_prov prov = {
.uuid = dev_uuid,
.oob_info = 0,
.link_open = link_open,
.link_close = link_close,
.complete = prov_complete,
.reset = prov_reset,
.static_val = auth_value,
.static_val_len = 16,
.output_size = 6,
.output_actions = (BT_MESH_DISPLAY_NUMBER | BT_MESH_DISPLAY_STRING),
.output_number = output_number,
.output_string = output_string,
.input_size = 6,
.input_actions = (BT_MESH_ENTER_NUMBER | BT_MESH_ENTER_STRING),
.input = input,
.input_complete = prov_input_complete,
};
static const struct bt_mesh_health_srv_cb health_srv_cb = {
.fault_get_cur = fault_get_cur,
.fault_get_reg = fault_get_reg,
.fault_clear = fault_clear,
.fault_test = fault_test,
.attn_on = attn_on,
.attn_off = attn_off,
};
static struct bt_mesh_health_srv health_srv = {
.cb = &health_srv_cb,
};
static struct bt_mesh_health_cli health_cli = {
.current_status = health_current_status,
};
BT_MESH_HEALTH_PUB_DEFINE(health_pub, CUR_FAULTS_MAX);
static struct bt_mesh_cfg_cli cfg_cli = {
};
static struct bt_mesh_cfg_srv cfg_srv = {
.relay = BT_MESH_RELAY_ENABLED,
.beacon = BT_MESH_BEACON_ENABLED,//BT_MESH_BEACON_DISABLED,
#if defined(CONFIG_BT_MESH_FRIEND)
.frnd = BT_MESH_FRIEND_DISABLED,
#else
.frnd = BT_MESH_FRIEND_NOT_SUPPORTED,
#endif
#if defined(CONFIG_BT_MESH_GATT_PROXY)
.gatt_proxy = BT_MESH_GATT_PROXY_ENABLED,
#else
.gatt_proxy = BT_MESH_GATT_PROXY_NOT_SUPPORTED,
#endif
.default_ttl = 7,
/* 3 transmissions with 20ms interval */
.net_transmit = BT_MESH_TRANSMIT(2, 20),
.relay_retransmit = BT_MESH_TRANSMIT(2, 20),
};
#if defined(CONFIG_BT_MESH_MODEL_GEN_SRV)
struct bt_mesh_gen_onoff_srv onoff_srv = {
};
#endif
static struct bt_mesh_model sig_models[] = {
BT_MESH_MODEL_CFG_SRV(&cfg_srv),
BT_MESH_MODEL_CFG_CLI(&cfg_cli),
BT_MESH_MODEL_HEALTH_SRV(&health_srv, &health_pub),
BT_MESH_MODEL_HEALTH_CLI(&health_cli),
#if defined(CONFIG_BT_MESH_MODEL_GEN_SRV)
BT_MESH_MODEL_GEN_ONOFF(&onoff_srv),
#endif
};
static struct bt_mesh_model vendor_models[] = {
BT_MESH_MODEL_VND(0x003F, 0x002A, NULL, NULL, NULL),
};
static struct bt_mesh_elem elements[] = {
BT_MESH_ELEM(0, sig_models, vendor_models),
};
static const struct bt_mesh_comp comp = {
.cid = BL_COMP_ID,
.elem = elements,
.elem_count = ARRAY_SIZE(elements),
};
#if defined(BL602)
const struct cli_command btMeshCmdSet[] STATIC_CLI_CMD_ATTRIBUTE = {
#else
const struct cli_command btMeshCmdSet[] = {
#endif
{"cmd_mesh_init", "\r\ncmd_mesh_init:[Initialize]\r\n Parameter[Null]\r\n", cmd_mesh_init},
{"cmd_set_dev_uuid", "\r\ncmd_input_num:[input number in provisionging procedure]\r\n\
[Size:16 Octets, e.g.112233445566778899AA]\r\n", cmd_set_dev_uuid},
{"cmd_pb", "\r\ncmd_pb:[Enable or disable provisioning]\r\n\
[bear, 1:adv bear, 2:gatt bear]\r\n\
[enable, 0:disable provisioning, 1:enable provisioning]\r\n", cmd_pb},
{"cmd_reset", "\r\ncmd_reset:[Reset the state of the local mesh node]\r\n Parameter[Null]\r\n", cmd_reset},
{"cmd_net_send", "\r\ncmd_net_send:[Send a network packet]\r\n Parameter[TTL CTL SRC DST]\r\n", cmd_net_send},
{"cmd_seg_send", "\r\ncmd_seg_send:[Send a segmented message]\r\n Parameter[SRC DST]\r\n", cmd_seg_send},
{"cmd_rpl_clr", "\r\ncmd_rpl_clr:[Clear replay protection list]\r\n Parameter[Null]\r\n", cmd_rpl_clr},
{"cmd_ivu_test", "\r\ncmd_ivu_test:[Enable or disable iv update test mode]\r\n\
[enable, 0:disable, 1:enable]\r\n", cmd_ivu_test},
{"cmd_iv_update", "\r\ncmd_iv_update:[Enable or disable iv update procedure]\r\n\
[enable, 0:disable, 1:enable by sending secure network beacons]\r\n", cmd_iv_update},
{"cmd_fault_set", "\r\ncmd_fault_set:[Set current fault or registered fault values]\r\n\
[type, 0:current fault, 1:registered fault]\r\n\
[fault, fault array in hex format]\r\n", cmd_fault_set},
#if defined(CONFIG_BT_MESH_LOW_POWER)
{"cmd_lpn_set", "\r\ncmd_lpn_set:[Enable or disable low power node]\r\n\
[enable, 0:disable lpn, 1:enable lpn]\r\n", cmd_lpn_set},
#endif
{"cmd_input_num", "\r\ncmd_input_num:[input number in provisionging procedure]\r\n\
[Max Size:16 Octets, e.g.112233445566778899AA]\r\n", cmd_input_num},
{"cmd_input_str", "\r\ncmd_input_str:[input Alphanumeric in provisionging procedure]\r\n\
[Max Size:16 Characters, e.g.123ABC]\r\n", cmd_input_str},
#if defined(BL70X)
{NULL, NULL, "No handler / Invalid command", NULL}
#endif
};
#if defined(CONFIG_BT_MESH_LOW_POWER)
static void cmd_lpn_set(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
static bool lpn_enabled;
u8_t enable;
int err;
co_get_bytearray_from_string(&argv[1], &enable, 1);
if(enable){
if(lpn_enabled){
vOutputString("LPN already enabled\r\n");
return;
}
err = bt_mesh_lpn_set(true);
if(err){
vOutputString("Failed to enable LPN\r\n");
}else{
lpn_enabled = true;
vOutputString("Enable LPN successfully\r\n");
}
}else{
if(!lpn_enabled){
vOutputString("LPN already disabled\r\n");
return;
}
err = bt_mesh_lpn_set(false);
if(err){
vOutputString("Failed to disable LPN\r\n");
}else{
lpn_enabled = false;
vOutputString("Disable LPN successfully\r\n");
}
}
}
static void lpn_cb(u16_t friend_addr, bool established)
{
if (established) {
vOutputString("Friendship (as LPN) established to Friend 0x%04x\r\n", friend_addr);
} else {
vOutputString("Friendship (as LPN) lost with Friend 0x%04x\r\n", friend_addr);
}
}
#endif
static void cmd_mesh_init(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
int err;
if(blemesh_inited){
vOutputString("Has initialized \r\n");
return;
}
err = bt_mesh_init(&prov, &comp);
if(err){
vOutputString("Failed to init \r\n");
return;
}
blemesh_inited = true;
vOutputString("Init successfully \r\n");
if (IS_ENABLED(CONFIG_BT_SETTINGS)) {
mesh_set();
mesh_commit();
}
if (bt_mesh_is_provisioned()) {
vOutputString("Mesh network restored from flash\r\n");
} else {
vOutputString("Use pb-adv or pb-gatt to enable advertising\r\n");
}
#ifdef CONFIG_BT_MESH_PTS
int i;
// used for almost all test cases
vOutputString("[PTS] TSPX_bd_addr_iut: ");
for(i=0; i<6; i++) {
vOutputString("%02X", bt_dev.id_addr[0].a.val[i]);
}
vOutputString("\r\n");
// used for almost all test cases
vOutputString("[PTS] TSPX_device_uuid: ");
for(i=0; i<16; i++) {
vOutputString("%02X", dev_uuid[i]);
}
vOutputString("\r\n");
// used for test case MESH/NODE/RLY/BV-02-C
vOutputString("[PTS] TSPX_maximum_network_message_cache_entries: %d\r\n", CONFIG_BT_MESH_MSG_CACHE_SIZE);
// used for test case MESH/NODE/CFG/CFGR/BV-01-C
vOutputString("[PTS] TSPX_iut_supports_relay: %s\r\n", cfg_srv.relay == BT_MESH_RELAY_ENABLED ? "TRUE" : "FALSE");
// used for test case MESH/NODE/CFG/SL/BV-03-C
vOutputString("[PTS] TSPX_vendor_model_id: %04X%04X\r\n", vendor_models[0].vnd.company, vendor_models[0].vnd.id);
#endif
#if IS_ENABLED(CONFIG_BT_MESH_LOW_POWER)
bt_mesh_lpn_set_cb(lpn_cb);
#endif
}
static const char *bearer2str(bt_mesh_prov_bearer_t bearer)
{
switch (bearer) {
case BT_MESH_PROV_ADV:
return "PB-ADV";
case BT_MESH_PROV_GATT:
return "PB-GATT";
default:
return "unknown";
}
}
#if defined(CONFIG_BT_MESH_PROV)
static void cmd_pb(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
int err;
uint8_t bearer;
uint8_t enable;
if(argc != 3){
vOutputString("Number of Parameters is not correct\r\n");
return;
}
co_get_bytearray_from_string(&argv[1], &bearer, 1);
co_get_bytearray_from_string(&argv[2], &enable, 1);
if (enable) {
err = bt_mesh_prov_enable(bearer);
if (err) {
vOutputString("Failed to enable %s (err %d)\r\n", bearer2str(bearer), err);
} else {
vOutputString("%s enabled\r\n", bearer2str(bearer));
}
} else {
err = bt_mesh_prov_disable(bearer);
if (err) {
vOutputString("Failed to disable %s (err %d)\r\n",
bearer2str(bearer), err);
} else {
vOutputString("%s disabled\r\n", bearer2str(bearer));
}
}
}
#endif
static void link_open(bt_mesh_prov_bearer_t bearer)
{
vOutputString("Provisioning link opened on %s\r\n", bearer2str(bearer));
}
static void link_close(bt_mesh_prov_bearer_t bearer)
{
vOutputString("Provisioning link closed on %s\r\n", bearer2str(bearer));
}
static int output_number(bt_mesh_output_action_t action, u32_t number)
{
vOutputString("OOB Number: %u\r\n", number);
return 0;
}
static int output_string(const char *str)
{
vOutputString("OOB String: %s\r\n", str);
return 0;
}
static void prov_input_complete(void)
{
vOutputString("Input complete\r\n");
}
static void prov_complete(u16_t net_idx, u16_t addr)
{
vOutputString("Local node provisioned, net_idx 0x%04x address 0x%04x\r\n", net_idx, addr);
net.net_idx = net_idx,
net.local = addr;
net.dst = addr;
}
static void prov_reset(void)
{
vOutputString("The local node has been reset and needs reprovisioning\r\n");
}
static void cmd_set_dev_uuid(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
if(argc != 2){
vOutputString("Number of Parameters is not correct\r\n");
return;
}
vOutputString("device uuid is %s\r\n", argv[1]);
co_get_bytearray_from_string(&argv[1], dev_uuid, 16);
}
static void cmd_input_num(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
int err;
uint32_t num;
if(argc != 2){
vOutputString("Number of Parameters is not correct\r\n");
return;
}
num = strtoul(argv[1], NULL, 10);
if (input_act != BT_MESH_ENTER_NUMBER) {
vOutputString("A number hasn't been requested!\r\n");
return;
}
if (strlen(argv[1]) < input_size) {
vOutputString("Too short input (%u digits required)\r\n", input_size);
return;
}
err = bt_mesh_input_number(num);
if (err) {
vOutputString("Numeric input failed (err %d)\r\n", err);
return;
}
input_act = BT_MESH_NO_INPUT;
}
static void cmd_input_str(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
int err;
if(argc != 2){
vOutputString("Number of Parameters is not correct\r\n");
return;
}
if (input_act != BT_MESH_ENTER_STRING) {
vOutputString("A string hasn't been requested!\r\n");
return;
}
if (strlen(argv[1]) < input_size) {
vOutputString("Too short input (%u characters required)\r\n", input_size);
return;
}
err = bt_mesh_input_string(argv[1]);
if (err) {
vOutputString("String input failed (err %d)\r\n", err);
return;
}
input_act = BT_MESH_NO_INPUT;
}
static int input(bt_mesh_input_action_t act, u8_t size)
{
switch (act) {
case BT_MESH_ENTER_NUMBER:
vOutputString("Enter a number (max %u digits) with: input-num <num>\r\n", size);
break;
case BT_MESH_ENTER_STRING:
vOutputString("Enter a string (max %u chars) with: input-str <str>\r\n", size);
break;
default:
vOutputString("Unknown input action %u (size %u) requested!\r\n", act, size);
return -EINVAL;
}
input_act = act;
input_size = size;
return 0;
}
static void cmd_reset(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
bt_mesh_reset();
vOutputString("Local node reset complete\r\n");
}
static void cmd_net_send(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
uint8_t ttl;
uint8_t ctl;
uint16_t src;
uint16_t dst;
uint8_t payload[16] = {0x00};
if(argc != 5){
vOutputString("Number of Parameters is not correct\r\n");
return;
}
if (!bt_mesh_is_provisioned()) {
vOutputString("Local node is not yet provisioned\r\n");
return;
}
co_get_bytearray_from_string(&argv[1], &ttl, 1);
co_get_bytearray_from_string(&argv[2], &ctl, 1);
co_get_uint16_from_string(&argv[3], &src);
co_get_uint16_from_string(&argv[4], &dst);
struct bt_mesh_msg_ctx ctx = {
.net_idx = net.net_idx,
.app_idx = ctl ? BT_MESH_KEY_UNUSED : BT_MESH_KEY_DEV,
.addr = dst,
.send_rel = 0,
.send_ttl = ttl,
};
struct bt_mesh_net_tx tx = {
.sub = bt_mesh_subnet_get(ctx.net_idx),
.ctx = &ctx,
.src = src,
.xmit = bt_mesh_net_transmit_get(),
.friend_cred = 0,
};
struct net_buf *buf = bt_mesh_adv_create(BT_MESH_ADV_DATA, tx.xmit, K_NO_WAIT);
if (!buf) {
vOutputString("Out of network buffers\r\n");
return;
}
vOutputString("Sending network packet\r\n");
net_buf_reserve(buf, BT_MESH_NET_HDR_LEN);
net_buf_add_mem(buf, payload, sizeof(payload));
bt_mesh_net_send(&tx, buf, NULL, NULL);
}
static uint16_t get_app_idx(void)
{
int i;
for (i = 0; i < ARRAY_SIZE(bt_mesh.app_keys); i++) {
struct bt_mesh_app_key *key = &bt_mesh.app_keys[i];
if (key->net_idx != BT_MESH_KEY_UNUSED) {
return key->app_idx;
}
}
return BT_MESH_KEY_UNUSED;
}
static void cmd_seg_send(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
NET_BUF_SIMPLE_DEFINE(sdu, BT_MESH_TX_SDU_MAX);
uint16_t src;
uint16_t dst;
uint8_t payload[12] = {0xFF};
if(argc != 3){
vOutputString("Number of Parameters is not correct\r\n");
return;
}
if (!bt_mesh_is_provisioned()) {
vOutputString("Local node is not yet provisioned\r\n");
return;
}
co_get_uint16_from_string(&argv[1], &src);
co_get_uint16_from_string(&argv[2], &dst);
struct bt_mesh_msg_ctx ctx = {
.net_idx = net.net_idx,
.app_idx = get_app_idx(),
.addr = dst,
.send_rel = 1,
.send_ttl = 0,
};
struct bt_mesh_net_tx tx = {
.sub = bt_mesh_subnet_get(ctx.net_idx),
.ctx = &ctx,
.src = src,
.xmit = bt_mesh_net_transmit_get(),
.friend_cred = 0,
};
vOutputString("Sending segmented message\r\n");
net_buf_simple_add_mem(&sdu, payload, sizeof(payload));
bt_mesh_trans_send(&tx, &sdu, NULL, NULL);
}
static void cmd_rpl_clr(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
#if defined(CONFIG_BT_SETTINGS)
int err;
err = ef_del_env(NV_MESH_RPL);
if(err) {
vOutputString("Failed to clear replay protection list\r\n");
} else {
vOutputString("Replay protection list (size: %d) cleared\r\n", CONFIG_BT_MESH_CRPL);
}
#endif
memset(bt_mesh.rpl, 0, sizeof(bt_mesh.rpl));
}
static void cmd_ivu_test(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
uint8_t enable;
if(argc != 2){
vOutputString("Number of Parameters is not correct\r\n");
return;
}
co_get_bytearray_from_string(&argv[1], &enable, 1);
#if defined(CONFIG_BT_MESH_IV_UPDATE_TEST)
bt_mesh_iv_update_test(enable);
#endif
if (enable) {
vOutputString("IV Update test mode enabled\r\n");
} else {
vOutputString("IV Update test mode disabled\r\n");
}
}
static void cmd_iv_update(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
uint8_t enable;
if(argc != 2){
vOutputString("Number of Parameters is not correct\r\n");
return;
}
if (!bt_mesh_is_provisioned()) {
vOutputString("Local node is not yet provisioned\r\n");
return;
}
co_get_bytearray_from_string(&argv[1], &enable, 1);
if (enable) {
vOutputString("IV Update procedure started\r\n");
#if defined(CONFIG_BT_MESH_IV_UPDATE_TEST)
bt_mesh_iv_update();
#endif
if (!atomic_test_bit(bt_mesh.flags, BT_MESH_IVU_INITIATOR)) {
bt_mesh_beacon_ivu_initiator(1);
}
} else {
vOutputString("IV Update procedure stopped\r\n");
if (atomic_test_bit(bt_mesh.flags, BT_MESH_IVU_INITIATOR)) {
bt_mesh_beacon_ivu_initiator(0);
}
}
}
static void cmd_fault_set(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
uint8_t type;
int i;
if(argc != 3){
vOutputString("Number of Parameters is not correct\r\n");
return;
}
co_get_bytearray_from_string(&argv[1], &type, 1);
if (type == 0) {
if(strlen(argv[2])/2 >= sizeof(cur_faults)) {
co_get_bytearray_from_string(&argv[2], cur_faults, sizeof(cur_faults));
} else {
memset(cur_faults, 0x00, sizeof(cur_faults));
co_get_bytearray_from_string(&argv[2], cur_faults, strlen(argv[2])/2);
}
vOutputString("Current Fault: ");
for(i=0; i<sizeof(cur_faults); i++) {
vOutputString("%02X", cur_faults[i]);
}
vOutputString("\r\n");
} else {
if(strlen(argv[2])/2 >= sizeof(reg_faults)) {
co_get_bytearray_from_string(&argv[2], reg_faults, sizeof(reg_faults));
} else {
memset(reg_faults, 0x00, sizeof(reg_faults));
co_get_bytearray_from_string(&argv[2], reg_faults, strlen(argv[2])/2);
}
vOutputString("Registered Fault: ");
for(i=0; i<sizeof(reg_faults); i++) {
vOutputString("%02X", reg_faults[i]);
}
vOutputString("\r\n");
}
}
static void get_faults(u8_t *faults, u8_t faults_size, u8_t *dst, u8_t *count)
{
u8_t i, limit = *count;
for (i = 0U, *count = 0U; i < faults_size && *count < limit; i++) {
if (faults[i]) {
*dst++ = faults[i];
(*count)++;
}
}
}
void show_faults(u8_t test_id, u16_t cid, u8_t *faults, size_t fault_count)
{
size_t i;
if (!fault_count) {
vOutputString("Health Test ID 0x%02x Company ID 0x%04x: no faults\r\n", test_id, cid);
return;
}
vOutputString("Health Test ID 0x%02x Company ID 0x%04x Fault Count %zu:\r\n", test_id, cid, fault_count);
for (i = 0; i < fault_count; i++) {
vOutputString("\t0x%02x", faults[i]);
}
}
static void health_current_status(struct bt_mesh_health_cli *cli, u16_t addr,
u8_t test_id, u16_t cid, u8_t *faults,
size_t fault_count)
{
vOutputString("Health Current Status from 0x%04x\r\n", addr);
show_faults(test_id, cid, faults, fault_count);
}
static int fault_get_cur(struct bt_mesh_model *model, u8_t *test_id,
u16_t *company_id, u8_t *faults, u8_t *fault_count)
{
vOutputString("Sending current faults\r\n");
*test_id = 0x00;
*company_id = BT_COMP_ID_LF;
get_faults(cur_faults, sizeof(cur_faults), faults, fault_count);
return 0;
}
static int fault_get_reg(struct bt_mesh_model *model, u16_t cid,
u8_t *test_id, u8_t *faults, u8_t *fault_count)
{
if (cid != BT_COMP_ID_LF) {
vOutputString("Faults requested for unknown Company ID 0x%04x\r\n", cid);
return -EINVAL;
}
vOutputString("Sending registered faults\r\n");
*test_id = 0x00;
get_faults(reg_faults, sizeof(reg_faults), faults, fault_count);
return 0;
}
static int fault_clear(struct bt_mesh_model *model, uint16_t cid)
{
if (cid != BT_COMP_ID_LF) {
return -EINVAL;
}
(void)memset(reg_faults, 0, sizeof(reg_faults));
return 0;
}
static int fault_test(struct bt_mesh_model *model, uint8_t test_id, uint16_t cid)
{
if (cid != BT_COMP_ID_LF) {
return -EINVAL;
}
if (test_id != 0x00) {
return -EINVAL;
}
return 0;
}
static void attn_on(struct bt_mesh_model *model)
{
#ifdef CONFIG_BT_MESH_PTS
vOutputString("[PTS] Attention timer on\r\n");
#endif
}
static void attn_off(struct bt_mesh_model *model)
{
#ifdef CONFIG_BT_MESH_PTS
vOutputString("[PTS] Attention timer off\r\n");
#endif
}
#if defined(CONFIG_BT_MESH_GATT_PROXY)
static void __attribute__((unused)) cmd_ident(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
int err;
err = bt_mesh_proxy_identity_enable();
if (err) {
vOutputString("Failed advertise using Node Identity (err ""%d)\r\n", err);
}
}
#endif /* MESH_GATT_PROXY */
int blemesh_cli_register(void)
{
#if defined(BL602)
//aos_cli_register_commands(btStackCmdSet, sizeof(btMeshCmdSet)/sizeof(btMeshCmdSet[0]));
#elif defined(BL70X)
struct cli_command *cmdSet = btMeshCmdSet;
while(cmdSet->pcCommand){
FreeRTOS_CLIRegisterCommand(cmdSet);
cmdSet++;
}
#endif
return 0;
}
|
mkroman/bl602-604
|
components/network/ble/blestack/src/common/tinycrypt/source/aes_decrypt.c
|
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/* aes_decrypt.c - TinyCrypt implementation of AES decryption procedure */
/*
* Copyright (C) 2017 by Intel Corporation, All Rights Reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* - Neither the name of Intel Corporation nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <aes.h>
#include <constants.h>
#include <utils.h>
static const uint8_t inv_sbox[256] = {
0x52, 0x09, 0x6a, 0xd5, 0x30, 0x36, 0xa5, 0x38, 0xbf, 0x40, 0xa3, 0x9e,
0x81, 0xf3, 0xd7, 0xfb, 0x7c, 0xe3, 0x39, 0x82, 0x9b, 0x2f, 0xff, 0x87,
0x34, 0x8e, 0x43, 0x44, 0xc4, 0xde, 0xe9, 0xcb, 0x54, 0x7b, 0x94, 0x32,
0xa6, 0xc2, 0x23, 0x3d, 0xee, 0x4c, 0x95, 0x0b, 0x42, 0xfa, 0xc3, 0x4e,
0x08, 0x2e, 0xa1, 0x66, 0x28, 0xd9, 0x24, 0xb2, 0x76, 0x5b, 0xa2, 0x49,
0x6d, 0x8b, 0xd1, 0x25, 0x72, 0xf8, 0xf6, 0x64, 0x86, 0x68, 0x98, 0x16,
0xd4, 0xa4, 0x5c, 0xcc, 0x5d, 0x65, 0xb6, 0x92, 0x6c, 0x70, 0x48, 0x50,
0xfd, 0xed, 0xb9, 0xda, 0x5e, 0x15, 0x46, 0x57, 0xa7, 0x8d, 0x9d, 0x84,
0x90, 0xd8, 0xab, 0x00, 0x8c, 0xbc, 0xd3, 0x0a, 0xf7, 0xe4, 0x58, 0x05,
0xb8, 0xb3, 0x45, 0x06, 0xd0, 0x2c, 0x1e, 0x8f, 0xca, 0x3f, 0x0f, 0x02,
0xc1, 0xaf, 0xbd, 0x03, 0x01, 0x13, 0x8a, 0x6b, 0x3a, 0x91, 0x11, 0x41,
0x4f, 0x67, 0xdc, 0xea, 0x97, 0xf2, 0xcf, 0xce, 0xf0, 0xb4, 0xe6, 0x73,
0x96, 0xac, 0x74, 0x22, 0xe7, 0xad, 0x35, 0x85, 0xe2, 0xf9, 0x37, 0xe8,
0x1c, 0x75, 0xdf, 0x6e, 0x47, 0xf1, 0x1a, 0x71, 0x1d, 0x29, 0xc5, 0x89,
0x6f, 0xb7, 0x62, 0x0e, 0xaa, 0x18, 0xbe, 0x1b, 0xfc, 0x56, 0x3e, 0x4b,
0xc6, 0xd2, 0x79, 0x20, 0x9a, 0xdb, 0xc0, 0xfe, 0x78, 0xcd, 0x5a, 0xf4,
0x1f, 0xdd, 0xa8, 0x33, 0x88, 0x07, 0xc7, 0x31, 0xb1, 0x12, 0x10, 0x59,
0x27, 0x80, 0xec, 0x5f, 0x60, 0x51, 0x7f, 0xa9, 0x19, 0xb5, 0x4a, 0x0d,
0x2d, 0xe5, 0x7a, 0x9f, 0x93, 0xc9, 0x9c, 0xef, 0xa0, 0xe0, 0x3b, 0x4d,
0xae, 0x2a, 0xf5, 0xb0, 0xc8, 0xeb, 0xbb, 0x3c, 0x83, 0x53, 0x99, 0x61,
0x17, 0x2b, 0x04, 0x7e, 0xba, 0x77, 0xd6, 0x26, 0xe1, 0x69, 0x14, 0x63,
0x55, 0x21, 0x0c, 0x7d
};
int tc_aes128_set_decrypt_key(TCAesKeySched_t s, const uint8_t *k)
{
return tc_aes128_set_encrypt_key(s, k);
}
#define mult8(a)(_double_byte(_double_byte(_double_byte(a))))
#define mult9(a)(mult8(a)^(a))
#define multb(a)(mult8(a)^_double_byte(a)^(a))
#define multd(a)(mult8(a)^_double_byte(_double_byte(a))^(a))
#define multe(a)(mult8(a)^_double_byte(_double_byte(a))^_double_byte(a))
static inline void mult_row_column(uint8_t *out, const uint8_t *in)
{
out[0] = multe(in[0]) ^ multb(in[1]) ^ multd(in[2]) ^ mult9(in[3]);
out[1] = mult9(in[0]) ^ multe(in[1]) ^ multb(in[2]) ^ multd(in[3]);
out[2] = multd(in[0]) ^ mult9(in[1]) ^ multe(in[2]) ^ multb(in[3]);
out[3] = multb(in[0]) ^ multd(in[1]) ^ mult9(in[2]) ^ multe(in[3]);
}
static inline void inv_mix_columns(uint8_t *s)
{
uint8_t t[Nb*Nk];
mult_row_column(t, s);
mult_row_column(&t[Nb], s+Nb);
mult_row_column(&t[2*Nb], s+(2*Nb));
mult_row_column(&t[3*Nb], s+(3*Nb));
(void)_copy(s, sizeof(t), t, sizeof(t));
}
static inline void add_round_key(uint8_t *s, const unsigned int *k)
{
s[0] ^= (uint8_t)(k[0] >> 24); s[1] ^= (uint8_t)(k[0] >> 16);
s[2] ^= (uint8_t)(k[0] >> 8); s[3] ^= (uint8_t)(k[0]);
s[4] ^= (uint8_t)(k[1] >> 24); s[5] ^= (uint8_t)(k[1] >> 16);
s[6] ^= (uint8_t)(k[1] >> 8); s[7] ^= (uint8_t)(k[1]);
s[8] ^= (uint8_t)(k[2] >> 24); s[9] ^= (uint8_t)(k[2] >> 16);
s[10] ^= (uint8_t)(k[2] >> 8); s[11] ^= (uint8_t)(k[2]);
s[12] ^= (uint8_t)(k[3] >> 24); s[13] ^= (uint8_t)(k[3] >> 16);
s[14] ^= (uint8_t)(k[3] >> 8); s[15] ^= (uint8_t)(k[3]);
}
static inline void inv_sub_bytes(uint8_t *s)
{
unsigned int i;
for (i = 0; i < (Nb*Nk); ++i) {
s[i] = inv_sbox[s[i]];
}
}
/*
* This inv_shift_rows also implements the matrix flip required for
* inv_mix_columns, but performs it here to reduce the number of memory
* operations.
*/
static inline void inv_shift_rows(uint8_t *s)
{
uint8_t t[Nb*Nk];
t[0] = s[0]; t[1] = s[13]; t[2] = s[10]; t[3] = s[7];
t[4] = s[4]; t[5] = s[1]; t[6] = s[14]; t[7] = s[11];
t[8] = s[8]; t[9] = s[5]; t[10] = s[2]; t[11] = s[15];
t[12] = s[12]; t[13] = s[9]; t[14] = s[6]; t[15] = s[3];
(void)_copy(s, sizeof(t), t, sizeof(t));
}
int tc_aes_decrypt(uint8_t *out, const uint8_t *in, const TCAesKeySched_t s)
{
uint8_t state[Nk*Nb];
unsigned int i;
if (out == (uint8_t *) 0) {
return TC_CRYPTO_FAIL;
} else if (in == (const uint8_t *) 0) {
return TC_CRYPTO_FAIL;
} else if (s == (TCAesKeySched_t) 0) {
return TC_CRYPTO_FAIL;
}
(void)_copy(state, sizeof(state), in, sizeof(state));
add_round_key(state, s->words + Nb*Nr);
for (i = Nr - 1; i > 0; --i) {
inv_shift_rows(state);
inv_sub_bytes(state);
add_round_key(state, s->words + Nb*i);
inv_mix_columns(state);
}
inv_shift_rows(state);
inv_sub_bytes(state);
add_round_key(state, s->words);
(void)_copy(out, sizeof(state), state, sizeof(state));
/*zeroing out the state buffer */
_set(state, TC_ZERO_BYTE, sizeof(state));
return TC_CRYPTO_SUCCESS;
}
|
mkroman/bl602-604
|
components/network/ble/blestack/src/bl_hci_wrapper/bl_hci_wrapper.c
|
<filename>components/network/ble/blestack/src/bl_hci_wrapper/bl_hci_wrapper.c
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <string.h>
#include "hci_host.h"
#include "bl_hci_wrapper.h"
#include "hci_driver.h"
#include "../common/include/errno.h"
#include "byteorder.h"
#include "hci_onchip.h"
extern int hci_host_recv_pkt_handler(uint8_t *data, uint16_t len);
static void bl_onchiphci_rx_packet_handler(uint8_t pkt_type, uint16_t src_id, uint8_t *param,
uint8_t param_len);
uint8_t bl_onchiphci_interface_init(void)
{
return bt_onchiphci_interface_init(bl_onchiphci_rx_packet_handler);
}
int bl_onchiphci_send_2_controller(struct net_buf *buf)
{
uint16_t opcode;
uint16_t dest_id = 0x00;
uint8_t buf_type;
uint8_t pkt_type;
hci_pkt_struct pkt;
buf_type = bt_buf_get_type(buf);
switch(buf_type)
{
case BT_BUF_CMD:
{
struct bt_hci_cmd_hdr *chdr;
if(buf->len < sizeof(struct bt_hci_cmd_hdr))
return -EINVAL;
chdr = (void *)buf->data;
if(buf->len < chdr->param_len)
return -EINVAL;
pkt_type = BT_HCI_CMD;
opcode = sys_le16_to_cpu(chdr->opcode);
//move buf to the payload
net_buf_pull(buf, sizeof(struct bt_hci_cmd_hdr));
switch(opcode)
{
case BT_HCI_OP_LE_CONN_UPDATE:
case BT_HCI_OP_LE_READ_CHAN_MAP:
case BT_HCI_OP_LE_START_ENCRYPTION:
case BT_HCI_OP_LE_LTK_REQ_REPLY:
case BT_HCI_OP_LE_LTK_REQ_NEG_REPLY:
case BT_HCI_OP_LE_CONN_PARAM_REQ_REPLY:
case BT_HCI_OP_LE_CONN_PARAM_REQ_NEG_REPLY:
case BT_HCI_OP_LE_SET_DATA_LEN:
case BT_HCI_OP_LE_READ_PHY:
case BT_HCI_OP_LE_SET_PHY:
{
//dest_id is connectin handle
dest_id = buf->data[0];
}
default:
break;
}
pkt.p.hci_cmd.opcode = opcode;
pkt.p.hci_cmd.param_len = chdr->param_len;
pkt.p.hci_cmd.params = buf->data;
break;
}
case BT_BUF_ACL_OUT:
{
struct bt_hci_acl_hdr *acl;
//connhandle +l2cap field
uint16_t connhdl_l2cf, tlt_len;
if(buf->len < sizeof(struct bt_hci_acl_hdr))
return -EINVAL;
pkt_type = BT_HCI_ACL_DATA;
acl = (void *)buf->data;
tlt_len = sys_le16_to_cpu(acl->len);
connhdl_l2cf = sys_le16_to_cpu(acl->handle);
//move buf to the payload
net_buf_pull(buf, sizeof(struct bt_hci_acl_hdr));
if(buf->len < tlt_len)
return -EINVAL;
//get connection_handle
dest_id = bt_acl_handle(connhdl_l2cf);
pkt.p.acl_data.conhdl = dest_id;
pkt.p.acl_data.pb_bc_flag = bt_acl_flags(connhdl_l2cf);
pkt.p.acl_data.len = tlt_len;
pkt.p.acl_data.buffer = (uint8_t *)buf->data;
break;
}
default:
return -EINVAL;
}
return bt_onchiphci_send(pkt_type, dest_id, &pkt);
}
static void bl_onchiphci_rx_packet_handler(uint8_t pkt_type, uint16_t src_id, uint8_t *param,
uint8_t param_len)
{
uint8_t nb_h2c_cmd_pkts = 0x01, buf_type, *buf_data;
uint16_t tlt_len;
bool prio = true;
struct net_buf *buf;
buf_type = (pkt_type == BT_HCI_ACL_DATA)? BT_BUF_ACL_IN: BT_BUF_EVT;
if(pkt_type == BT_HCI_CMD_CMP_EVT || pkt_type == BT_HCI_CMD_STAT_EVT)
buf = bt_buf_get_cmd_complete(K_FOREVER);
else
/*not use K_FOREVER, rw main loop thread cannot be blocked here. if there is no rx buffer,directly igore.
otherwise, if rw main loop blocked here, hci command cannot be handled.*/
buf = bt_buf_get_rx(buf_type, K_NO_WAIT);
if(!buf)
return;
buf_data = net_buf_tail(buf);
switch(pkt_type)
{
case BT_HCI_CMD_CMP_EVT:
{
tlt_len = BT_HCI_EVT_CC_PARAM_OFFSET + param_len;
*buf_data++ = BT_HCI_EVT_CMD_COMPLETE;
*buf_data++ = BT_HCI_CCEVT_HDR_PARLEN + param_len;
*buf_data++ = nb_h2c_cmd_pkts;
sys_put_le16(src_id, buf_data);
buf_data += 2;
memcpy(buf_data, param, param_len);
break;
}
case BT_HCI_CMD_STAT_EVT:
{
tlt_len = BT_HCI_CSEVT_LEN;
*buf_data++ = BT_HCI_EVT_CMD_STATUS;
*buf_data++ = BT_HCI_CSVT_PARLEN;
*buf_data++ = *(uint8_t *)param;
*buf_data++ = nb_h2c_cmd_pkts;
sys_put_le16(src_id, buf_data);
break;
}
case BT_HCI_LE_EVT:
{
prio = false;
bt_buf_set_type(buf, BT_BUF_EVT);
tlt_len = BT_HCI_EVT_LE_PARAM_OFFSET + param_len;
*buf_data++ = BT_HCI_EVT_LE_META_EVENT;
*buf_data++ = param_len;
memcpy(buf_data, param, param_len);
break;
}
case BT_HCI_EVT:
{
if(src_id != BT_HCI_EVT_NUM_COMPLETED_PACKETS)
prio = false;
bt_buf_set_type(buf, BT_BUF_EVT);
tlt_len = BT_HCI_EVT_LE_PARAM_OFFSET + param_len;
*buf_data++ = src_id;
*buf_data++ = param_len;
memcpy(buf_data, param, param_len);
break;
}
case BT_HCI_ACL_DATA:
{
prio = false;
bt_buf_set_type(buf, BT_BUF_ACL_IN);
tlt_len = param_len;
memcpy(buf_data, param, param_len);
break;
}
default:
return;
}
net_buf_add(buf, tlt_len);
if(prio)
bt_recv_prio(buf);
else
hci_driver_enque_recvq(buf);
}
|
mkroman/bl602-604
|
components/bl602/bl602_wifi/plf/refip/src/driver/phy/bl602_phy_rf/phy_bl602_cli.c
|
<reponame>mkroman/bl602-604
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdio.h>
#include <string.h>
#include <stdint.h>
#include <cli.h>
#include "FreeRTOS.h"
#include "task.h"
#include "bl_config.h"
#include "reg_macbypass.h"
#include "reg_mdm_stat.h"
#include "reg_mdm_cfg.h"
#include "reg_mdmdsss_cfg.h"
#include "reg_riu.h"
#include "reg/reg_bl_rc2.h"
#include "reg/reg_rf.h"
#include "reg/reg_rf_fpga.h"
#include "reg/reg_rf_fsm.h"
#include "reg/reg_rf_epa.h"
#include "phy.h"
#include "rfc_bl602.h"
#include "bl602_rf_private.h"
#include "bl602_rf_calib_data.h"
#include "phy_hal.h"
#define PRINT_PREFIX "[phy_cli]"
#define RESULT_PREFIX "done "
enum {
MACBYP_OFF = 0,
MACBYP_ON = 1
};
typedef enum {
MACBYP_IDLE = 0,
MACBYP_RX = 1,
MACBYP_TX_SINGLE = 2,
MACBYP_TX_BURST = 3,
MACBYP_TX_CONT = 4
} MacbypassMode_t;
typedef enum {
MACBYP_PLD_PRBS = 0,
MACBYP_PLD_ALLONE = 1,
MACBYP_PLD_RAMP = 2,
MACBYP_PLD_01 = 3,
MACBYP_PLD_10 = 4
} MacbypassPldType_t;
typedef enum {
NONHT = 0,
NONHT_DUP = 1,
HT_MM = 2,
HT_GF = 3
} FormatMode_t;
typedef enum {
LM11B_MCS1 = 0x0,
LM11B_MCS2 = 0x1,
LM11B_MCS3 = 0x2,
LM11B_MCS4 = 0x3,
LM_MCS0 = 0xb, // LEG_6=0xb,
LM_MCS1 = 0xf, // LEG_9=0xf,
LM_MCS2 = 0xa, // LEG_12=0xa,
LM_MCS3 = 0xe, // LEG_18=0xe,
LM_MCS4 = 0x9, // LEG_24=0x9,
LM_MCS5 = 0xd, // LEG_36=0xd,
LM_MCS6 = 0x8, // LEG_48=0x8,
LM_MCS7 = 0xc // LEG_54=0xc
} LegRate_t;
typedef enum {
SHORT_PREAMBLE = 0,
LONG_PREAMBLE = 1
} PreambleType_t;
typedef struct {
const char * name;
int32_t * value;
} arg_t;
typedef struct {
uint32_t macbyp_mode;
uint32_t macbyp_nframes_in_burst;
uint32_t macbyp_ifs_us;
uint32_t macbyp_pld_type;
uint32_t pwrlevel;
uint32_t smoothing;
uint32_t continuoustx;
uint32_t formatmod;
uint32_t lm_length;
uint32_t lm_rate;
uint32_t ht_length;
uint32_t ht_mcs;
uint32_t ofdm_shortgi;
uint32_t dsss_preamble_type;
uint32_t fe_ofdm_filter_sel;
uint32_t fe_dsss_filter_sel;
uint32_t fe_dsss_gain;
uint32_t fe_ofdm_gain;
int32_t fe_dvga_qdb;
} TxCfg_t;
static uint8_t s_txvec[16];
static TxCfg_t s_txcfg;
static int32_t s_dsss_coeff0[20] = {0,-1,-1,1,1,-2,-4,2,20,42,52,42,20,2,-4,-2,1,1,-1,-1};
static int32_t s_dsss_coeff1[20] = {0,0,0,0,-1,-1,2,10,23,35,40,35,23,10,2,-1,-1,0,0,0};
struct phy_cfg_tag s_phycfg;
static uint8_t s_rate_table_11g[8] = {LM_MCS0,LM_MCS1,LM_MCS2,LM_MCS3,LM_MCS4,LM_MCS5,LM_MCS6,LM_MCS7};
static uint8_t s_rate_table_11n[8] = {0,1,2,3,4,5,6,7};
static uint8_t s_nbmdm_on = 0;
static uint8_t s_txpwr = 0;
static inline void wait_us(uint32_t us)
{
volatile uint32_t n = us*32;
while (n--);
}
static inline void wait_ms(uint32_t ms)
{
wait_us(1000*ms);
}
static void macbyp_frameperburst_setf(uint32_t frameperburst)
{
uint32_t addr = MACBYP_CTRL_ADDR + 0x10;
REG_PL_WR(addr,frameperburst);
}
static void txcfg_reset(TxCfg_t *cfg)
{
/* macbypass config */
s_txcfg.macbyp_mode = MACBYP_TX_BURST;
s_txcfg.macbyp_nframes_in_burst = 0;
s_txcfg.macbyp_ifs_us = 2000;
s_txcfg.macbyp_pld_type = MACBYP_PLD_PRBS;
/* tx config */
s_txcfg.pwrlevel = 0;
s_txcfg.smoothing = 1;
s_txcfg.continuoustx = 0;
s_txcfg.formatmod = NONHT;
s_txcfg.lm_rate = LM_MCS7;
s_txcfg.lm_length = 1000;
s_txcfg.ht_mcs = 7;
s_txcfg.ht_length = 4096;
s_txcfg.dsss_preamble_type = LONG_PREAMBLE;
/* fe config */
s_txcfg.fe_ofdm_filter_sel = 0xffff;
s_txcfg.fe_dsss_filter_sel = 0;
s_txcfg.fe_dsss_gain = 32;
s_txcfg.fe_ofdm_gain = 32;
s_txcfg.fe_dvga_qdb = 0;
}
static void txvec_build(TxCfg_t *cfg)
{
uint8_t agg = 0;
uint8_t doze_not_allowed = 1;
uint8_t disambiguity = 1;
uint16_t service = 0;
uint8_t sounding = 0;
uint8_t feccoding = 0;
uint8_t chbw = 0;
uint8_t ness = 0;
uint8_t nsts = 1;
/* reset txvec */
for (int i = 0; i < sizeof(s_txvec)/sizeof(s_txvec[0]); i++) {
s_txvec[i] = 0;
}
/* txvec0: power control */
s_txvec[0] = cfg->pwrlevel;
/* txvec1 */
s_txvec[1] = (0
| chbw << 6
| cfg->continuoustx << 4
| cfg->smoothing << 3
| feccoding << 1
| sounding << 0
);
/* txvec2: antenna set */
s_txvec[2] = 1; //
/* txvec3: spatial map matrix index */
s_txvec[3] = 0;
/* txvec4 */
s_txvec[4] = (0
| cfg->dsss_preamble_type << 7
| cfg->ht_mcs << 0
);
/* txvec5 */
s_txvec[5] = (0
| nsts << 5
| ness << 3
| cfg->formatmod << 0
);
/* txvec6 */
s_txvec[6] = cfg->lm_length & 0xff;
/* txvec7 */
s_txvec[7] = (0
| cfg->lm_rate << 4
| ((cfg->lm_length >> 8) & 0xf) << 0
);
/* txvec8 */
s_txvec[8] = (service >> 0) & 0xff;
/* txvec9 */
s_txvec[9] = (service >> 8) & 0xff;
/* txvec10 */
s_txvec[10] = (cfg->ht_length >> 0) & 0xff;
/* txvec11 */
s_txvec[11] = (cfg->ht_length >> 8) & 0xff;
/* txvec12 */
s_txvec[12] = (0
| disambiguity << 7
| cfg->ofdm_shortgi << 6
| doze_not_allowed << 5
| agg << 4
| ((cfg->ht_length >> 16) & 0xf) << 0
);
/* txvec13: nTx=0,stbc=0 (no STBC) */
s_txvec[13] = 0;
/* txvec14: partial AID */
s_txvec[14] = 0;
/* group ID, parital AID */
s_txvec[15] = 0;
}
static void txvec_program()
{
macbyp_txv0_setf(s_txvec[0]);
macbyp_txv1_setf(s_txvec[1]);
macbyp_txv2_setf(s_txvec[2]);
macbyp_txv3_setf(s_txvec[3]);
macbyp_txv4_setf(s_txvec[4]);
macbyp_txv5_setf(s_txvec[5]);
macbyp_txv6_setf(s_txvec[6]);
macbyp_txv7_setf(s_txvec[7]);
macbyp_txv8_setf(s_txvec[8]);
macbyp_txv9_setf(s_txvec[9]);
macbyp_txv10_setf(s_txvec[10]);
macbyp_txv11_setf(s_txvec[11]);
macbyp_txv12_setf(s_txvec[12]);
macbyp_txv13_setf(s_txvec[13]);
macbyp_txv14_setf(s_txvec[14]);
macbyp_txv15_setf(s_txvec[15]);
}
static void phy_start_transmit(TxCfg_t *cfg)
{
int32_t *dsss_coeff;
// configure TxVector
txvec_build(cfg);
txvec_program();
// configure FE registers
rc2_txhbf20coeffsel_setf(cfg->fe_ofdm_filter_sel);
dsss_coeff = (cfg->fe_dsss_filter_sel == 0) ? s_dsss_coeff0 : s_dsss_coeff1;
REG_PL_WR(0x44c03030,0
| (dsss_coeff[0] & 0x7f) << 0
| (dsss_coeff[1] & 0x7f) << 8
| (dsss_coeff[2] & 0x7f) << 16
| (dsss_coeff[3] & 0x7f) << 24
);
REG_PL_WR(0x44c03034,0
| (dsss_coeff[4] & 0x7f) << 0
| (dsss_coeff[5] & 0x7f) << 8
| (dsss_coeff[6] & 0x7f) << 16
| (dsss_coeff[7] & 0x7f) << 24
);
REG_PL_WR(0x44c03038,0
| (dsss_coeff[8] & 0x7f) << 0
| (dsss_coeff[9] & 0x7f) << 8
| (dsss_coeff[10] & 0x7f) << 16
| (dsss_coeff[11] & 0x7f) << 24
);
REG_PL_WR(0x44c0303c,0
| (dsss_coeff[12] & 0x7f) << 0
| (dsss_coeff[13] & 0x7f) << 8
| (dsss_coeff[14] & 0x7f) << 16
| (dsss_coeff[15] & 0x7f) << 24
);
REG_PL_WR(0x44c03040,0
| (dsss_coeff[16] & 0x7f) << 0
| (dsss_coeff[17] & 0x7f) << 8
| (dsss_coeff[18] & 0x7f) << 16
| (dsss_coeff[19] & 0x7f) << 24
);
riu_tx20diggainlin0_setf(cfg->fe_ofdm_gain);
rc2_txdsssdiggainlin0_setf(cfg->fe_dsss_gain | 0x80); // 0x80=enable dsss digital gain
// // configure RF
// rfc_txdfe_set_dvga(cfg->fe_dvga_qdb);
// rfc_hwctrl_txdvga(0);
// configure macbypass
macbyp_frameperburst_setf(cfg->macbyp_nframes_in_burst);
macbyp_pre_tx_delay_setf(cfg->macbyp_ifs_us*30); // mpif clock is 30M
macbyp_payload_setf(cfg->macbyp_pld_type);
// start macbypass
macbyp_ctrl_pack(0,cfg->macbyp_mode,0,MACBYP_ON);
}
// static void phy_stop_transmit()
// {
// macbyp_ctrl_pack(0,MACBYP_IDLE,0,MACBYP_OFF);
// }
static void phy_mdm_reset()
{
mdm_mdmswreset_setf(1);
mdm_agcswreset_setf(1);
mdm_dspswreset_setf(1);
wait_ms(1);
mdm_mdmswreset_setf(0);
mdm_agcswreset_setf(0);
mdm_dspswreset_setf(0);
}
static void phy_macbyp_reset()
{
macbyp_ctrl_pack(0,MACBYP_IDLE,0,0);
}
void phy_macbyp_clr_status()
{
// macbyp_ctrl_pack(0,MACBYP_IDLE,1,1); // mpif clk is enabled if mode != idle or if bypassed
uint32_t value;
uint32_t bypassed;
value = *(volatile uint32_t *)MACBYP_CTRL_ADDR;
bypassed = value & 1;
// make sure mpif clk is enabled
if (!bypassed) {
value |= 1;
}
// set regb_clr_status
value |= 1 << 4;
*(volatile uint32_t *)MACBYP_CTRL_ADDR = value;
// clr regb_clr_status
value &= ~(1 << 4);
*(volatile uint32_t *)MACBYP_CTRL_ADDR = value;
// restore regb_bypass
if (!bypassed) {
value &= ~(1);
*(volatile uint32_t *)MACBYP_CTRL_ADDR = value;
}
}
void phy_macbyp_rx_start()
{
macbyp_ctrl_pack(0,MACBYP_RX,0,MACBYP_ON);
}
float calc_ppm_ofdm(uint16_t rxv_freqoff)
{
int16_t freqoff;
float ppm;
freqoff = (int16_t)rxv_freqoff;
ppm = -1 * freqoff * 20.0 / 2440; // 602 as the center
ppm = ppm/(s_nbmdm_on+1);
return ppm;
}
float calc_ppm_dsss(uint8_t rxv_freqoff)
{
int8_t freqoff;
float ppm;
freqoff = (int8_t)rxv_freqoff;
ppm = freqoff * 0.7; // 602 as the center
return ppm;
}
void phy_macbyp_rx_print_status()
{
static uint32_t stat_frame_ok;
__attribute__((unused)) static uint32_t stat_frame_bad;
static uint32_t stat_rxend;
__attribute__((unused)) static uint32_t stat_rxerr;
static uint32_t stat_evm;
static uint32_t stat_rssi;
stat_frame_ok = macbyp_stat_frame_ok_get();
stat_frame_bad = macbyp_stat_frame_bad_get();
stat_rxend = macbyp_stat_rxend_get();
stat_rxerr = macbyp_stat_rxerror_get();
stat_evm = macbyp_evm_get();
stat_rssi = macbyp_rssi_get();
float ppm_dsss = calc_ppm_dsss((uint8_t)((stat_evm >> 16) & 0xff));
float ppm_ofdm = calc_ppm_ofdm((uint16_t)((stat_evm >> 16) & 0xffff));
uint16_t gain_status = stat_rssi >> 16;
int gain_lna = gain_status & 0xf;
int gain_rbb = (gain_status >> 4) & 0x1f;
int gain_dg = (gain_status >> 9) & 0x7f;
int rssi = (int8_t)(stat_rssi & 0xff);
gain_dg = (gain_dg > 63) ? gain_dg - 128 : gain_dg;
printf("ok %5ld,end %5ld,rssi %4d,lna %d,rbb %2d,dg %4d,ppm_ofdm %+5.1f,ppm_dsss %+5.1f\r\n",
stat_frame_ok,
stat_rxend,
rssi,
gain_lna,
gain_rbb,
gain_dg,
ppm_ofdm,
ppm_dsss
);
}
void phy_macbyp_rx_print_status_at()
{
static uint32_t stat_frame_ok;
__attribute__((unused)) static uint32_t stat_frame_bad;
static uint32_t stat_rxend;
__attribute__((unused)) static uint32_t stat_rxerr;
static uint32_t stat_evm;
static uint32_t stat_rssi;
stat_frame_ok = macbyp_stat_frame_ok_get();
stat_frame_bad = macbyp_stat_frame_bad_get();
stat_rxend = macbyp_stat_rxend_get();
stat_rxerr = macbyp_stat_rxerror_get();
stat_evm = macbyp_evm_get();
stat_rssi = macbyp_rssi_get();
float ppm_dsss = calc_ppm_dsss((uint8_t)((stat_evm >> 16) & 0xff));
float ppm_ofdm = calc_ppm_ofdm((uint16_t)((stat_evm >> 16) & 0xffff));
uint16_t gain_status = stat_rssi >> 16;
int gain_lna = gain_status & 0xf;
int gain_rbb = (gain_status >> 4) & 0x1f;
int gain_dg = (gain_status >> 9) & 0x7f;
int rssi = (int8_t)(stat_rssi & 0xff);
gain_dg = (gain_dg > 63) ? gain_dg - 128 : gain_dg;
// printf("ok %5ld,end %5ld,rssi %4d,lna %d,rbb %2d,dg %4d,ppm_ofdm %+5.1f,ppm_dsss %+5.1f\r\n",
// stat_frame_ok,
// stat_rxend,
// rssi,
// gain_lna,
// gain_rbb,
// gain_dg,
// ppm_ofdm,
// ppm_dsss
// );
printf("{\"rxok\":%ld,\"rxend\":%ld,\"rssi\":%d,",stat_frame_ok,stat_rxend,rssi);
printf("\"lna\":%d,\"rbb\":%d,\"dg\":%d,",gain_lna,gain_rbb,gain_dg);
printf("\"ppm_ofdm\":%.1f,\"ppm_dsss\":%.1f}\r\n",ppm_ofdm,ppm_dsss);
}
/*
static void phy_macbyp_rx_start()
{
REG_PL_WR(0x54c60000,0x000);
wait_us(100);
REG_PL_WR(0x54c60000,0x101);
wait_us(100);
}
static void phy_macbyp_rx_print()
{
int32_t num_fcs_ok;
int32_t num_fcs_bad;
int32_t num_rx_end;
int32_t num_rx_err;
int32_t rssi;
num_fcs_ok = REG_PL_RD(0x54c60080);
num_fcs_bad = REG_PL_RD(0x54c60084);
num_rx_end = REG_PL_RD(0x54c60088);
num_rx_err = REG_PL_RD(0x54c6008c);
rssi = REG_PL_RD(0x54c60094);
rssi = (rssi & 0xff) << 24 >> 24;
printf("FCS OK %5ld, RX END %5ld, RSSI %ld\r\n",num_fcs_ok,num_rx_end,rssi);
}
static void phy_app_rx()
{
int k = 0;
phy_macbyp_reset();
phy_macbyp_rx_start();
while (1) {
wait_ms(1000);
printf("check %20d: ",k++);
phy_macbyp_rx_print();
}
}
*/
static void tx_stop()
{
// stop mdm
phy_mdm_reset();
phy_macbyp_reset();
// disable signal generator
rfc_sg_stop();
// stop and resotre txdfe settings
rfc_txdfe_set_dvga(0);
rfc_hwctrl_txdvga(1);
rfc_txdfe_mux(RFC_TXDFE_IN_MUX_TO_BB);
rfc_txdfe_stop();
}
static int32_t argname_compare(char *cmd,const char* tgt_cmd)
{
return strncmp(cmd,tgt_cmd,strlen(tgt_cmd)) == 0;
}
__attribute__((unused)) static int32_t argvalue_read(const char* cmd,int32_t *value)
{
int32_t status = -1;
char* s = (char*)cmd;
while ((*s) && (*s != '=')) {
s++;
}
if (*s && *(s+1)) {
status = 0;
*value = (int32_t)atoi(s+1);
printf("...atof(%s)=%ld",s+1,*value);
}
return status;
}
#if 0
static int32_t argvalue_reads(const char* cmd,char *value)
{
int32_t status = -1;
char* s = (char*)cmd;
while ((*s) && (*s != '=')) {
s++;
}
if (*s && *(s+1)) {
status = 0;
strcpy(value,s+1);
}
return status;
}
#endif
static void print_args(arg_t *arglist, int size_arglist, const char* func_name)
{
int j;
printf("args of %s:\r\n",func_name);
for (j = 0; j < size_arglist; j++) {
printf(" * %s = %ld\r\n",arglist[j].name,*arglist[j].value);
}
}
static void parse_args(arg_t *arglist, int size_arglist, int argc, char **argv, const char* func_name)
{
int i,j;
for (i = 1; i < argc; i++) {
printf("parse %s...",argv[i]);
for (j = 0; j < size_arglist; j++) {
if (argname_compare(argv[i],arglist[j].name)) {
printf("argument match detected %d",j);
argvalue_read(argv[i],arglist[j].value);
}
}
printf("\r\n");
}
print_args(arglist,size_arglist,func_name);
}
static void cmd_init(char *buf, int len, int argc, char **argv)
{
uint32_t xtalfreq;
uint32_t xtalfreq_valid;
if (argc == 1) {
printf("phy_init usage:\r\n");
printf(" phy_init 40000000");
return;
}
xtalfreq = (uint32_t)atoi(argv[1]);
xtalfreq_valid = 0;
if (xtalfreq == 24*1000*1000) xtalfreq_valid = 1;
if (xtalfreq == 26*1000*1000) xtalfreq_valid = 1;
if (xtalfreq == 32*1000*1000) xtalfreq_valid = 1;
if (xtalfreq == 384*100*1000) xtalfreq_valid = 1;
if (xtalfreq == 40*1000*1000) xtalfreq_valid = 1;
if (xtalfreq == 52*1000*1000) xtalfreq_valid = 1;
if (xtalfreq_valid) {
printf("start rf/rc/phy init\r\n");
rfc_init(xtalfreq);
phy_mdm_reset();
phy_init(&s_phycfg);
}
else {
printf("unsupported xtalfreq\r\n");
}
}
static void cmd_channel(char *buf, int len, int argc, char **argv)
{
uint32_t chanfreq;
if (argc == 1) {
printf("phy_channel usage:\r\n");
printf(" phy_channel 2472");
return;
}
chanfreq = (uint32_t)atoi(argv[1]);
printf("switch channel to %ld MHz\r\n",chanfreq);
phy_set_channel(PHY_BAND_2G4, PHY_CHNL_BW_20, 0,chanfreq, chanfreq, 0);
}
static void cmd_rf_channel(char *buf, int len, int argc, char **argv)
{
uint32_t chanfreq;
if (argc == 1) {
printf("rf_channel usage:\r\n");
printf(" rf_channel 2472");
return;
}
chanfreq = (uint32_t)atoi(argv[1]);
printf("switch channel to %ld MHz\r\n",chanfreq);
rfc_config_channel(chanfreq);
}
static void cmd_rf_channel_sw(char *buf, int len, int argc, char **argv)
{
uint32_t chanfreq;
if (argc == 1) {
printf("rf_channel_sw usage:\r\n");
printf(" rf_channel_sw 2472");
return;
}
chanfreq = (uint32_t)atoi(argv[1]);
printf("switch channel to %ld MHz\r\n",chanfreq);
rfc_config_channel_sw(chanfreq);
}
static void cmd_txsin_start(char *buf, int len, int argc, char **argv)
{
int32_t freq_hz = INT32_MIN;
int32_t gain_dbfs = 0;
int32_t complex_flag = 1;
int32_t gain;
int32_t nshift;
int32_t natt;
int32_t incstep;
int32_t addr_i,addr_q;
int32_t conj_flag;
int32_t att_table_q7[6] = {128, 114, 102, 91, 81, 72};
// int32_t i;
// if (argc > 1) {
// for (i = 1; i < argc; i++) {
// printf("processing argv[%ld]: %s\r\n",i,argv[i]);
// if (argname_compare(argv[i],"freq")) {
// argvalue_read(argv[i],&freq_hz);
// printf(" freq=%ld\r\n",freq_hz);
// }
// else if (argname_compare(argv[i],"dbfs")) {
// argvalue_read(argv[i],&gain_dbfs);
// printf(" dbfs=%ld\r\n",gain_dbfs);
// }
// else if (argname_compare(argv[i],"cplx")) {
// argvalue_read(argv[i],&complex_flag);
// printf(" cplx=%ld\r\n",complex_flag);
// }
// }
// }
if (argc == 1) {
printf("txsin_start usage:\r\n");
printf(" (1) txsin_start incstep=1 dbfs=-6 cplx=1\r\n");
printf(" (2) txsin_start freqhz=1 dbfs=-6 cplx=1\r\n");
return;
}
arg_t args[] = {
{"dbfs",&gain_dbfs},
{"cplx",&complex_flag},
{"incstep",&incstep},
{"freqhz",&freq_hz}
};
parse_args(args,sizeof(args)/sizeof(args[0]),argc,argv,__func__);
// gain = 1024;
// nshift = (int32_t)(-gain_dbfs / 6 + 0.5);
// if (nshift == 0) {
// gain = 1023;
// }
// else {
// gain = 1024 >> nshift;
// }
nshift = (int32_t)(-gain_dbfs / 6);
natt = -gain_dbfs - 6*nshift;
natt = natt < 0 ? 0 : natt > 5 ? 5 : natt; // make sure natt in range
gain = ((1024 >> nshift) * att_table_q7[natt]) >> 7;
gain = gain > 1023 ? 1023 : gain;
conj_flag = complex_flag ? ((freq_hz!=INT32_MIN) ? freq_hz < 0 : incstep < 0) : 0;
if (freq_hz != INT32_MIN) {
freq_hz = (freq_hz < 0) ? -freq_hz : freq_hz;
incstep = (int32_t)(((float)freq_hz)*1024/80e6);
printf("convert freqhz to incstep: %ld => %ld\r\n",freq_hz,incstep);
}
else {
incstep = (incstep < 0) ? -incstep : incstep;
}
if (complex_flag) {
addr_i = 0;
addr_q = conj_flag ? 256 : 768;
}
else {
addr_i = 0;
addr_q = 0;
}
rfc_hwctrl_txdvga(0);
rfc_hwctrl_calparam(0);
// make sure rf circuit is in TX state
rfc_fsm_force(RFC_FSM_TX);
// configure and start txdfe
rfc_txdfe_set_dvga(0);
rfc_txdfe_start();
rfc_txdfe_mux(RFC_TXDFE_IN_MUX_TO_SINGEN);
// start signal generator
rfc_sg_start(incstep,gain,gain,addr_i,addr_q);
printf("txsin start\r\n");
}
static void cmd_txsin_stop(char *buf, int len, int argc, char **argv)
{
// disable signal generator
rfc_sg_stop();
// stop and resotre txdfe settings
rfc_txdfe_mux(RFC_TXDFE_IN_MUX_TO_BB);
rfc_txdfe_stop();
// restore hwctrl
rfc_hwctrl_txdvga(1);
rfc_hwctrl_calparam(1);
// reset fsm
//rf_fsm_force(RF_STATE_SB);
//rf_fsm_force(RF_STATE_FORCE_OFF);
printf("txsin stop\r\n");
}
/*
tx11b_start mcs=1 len=1000 filter=1 dg=32 dvga=-8 ifs=100
*/
static void cmd_tx11b_start(char *buf, int len, int argc, char **argv)
{
int32_t mcs = 1;
int32_t payload_len = 200;
int32_t filter_sel = 0;
int32_t diggain_dsss = 32;
int32_t dvga = 0;
int32_t ifs_us = 100;
int32_t pwrlvl = 0;
int32_t continuous = 0;
if (argc == 1) {
printf("tx11b_start usage:\r\n");
printf(" tx11b_start mcs=[1|2|3|4] len=1000 filter=1 dg=32 dvga=0 ifs=100 continuous=0\r\n");
return;
}
// parse args
arg_t args[] = {
{"mcs",&mcs},
{"len",&payload_len},
{"filter",&filter_sel},
{"dg",&diggain_dsss},
{"dvga",&dvga},
{"ifs",&ifs_us},
{"pwrlvl",&pwrlvl},
{"continuous",&continuous}
};
parse_args(args,sizeof(args)/sizeof(args[0]),argc,argv,__func__);
if (mcs < 1 || mcs > 4) {
printf("mcs error\r\n");
return;
}
// configure txcfg
txcfg_reset(&s_txcfg);
s_txcfg.macbyp_mode = MACBYP_TX_BURST;
s_txcfg.macbyp_nframes_in_burst = 0;
s_txcfg.macbyp_ifs_us = ifs_us;
s_txcfg.formatmod = NONHT;
s_txcfg.lm_rate = LM11B_MCS1 + (mcs - 1);
s_txcfg.lm_length = payload_len;
s_txcfg.fe_dsss_filter_sel = filter_sel;
s_txcfg.fe_dsss_gain = diggain_dsss;
s_txcfg.fe_dvga_qdb = dvga;
s_txcfg.pwrlevel = pwrlvl << 2;
s_txcfg.continuoustx = continuous;
// reset
tx_stop();
phy_macbyp_reset();
phy_mdm_reset();
// configure and start transmit
phy_start_transmit(&s_txcfg);
}
/*
tx11g_start mcs=3 len=1000 filter=1 dg=32 dvga=-8 ifs=100 pwrlvl=10
*/
static void cmd_tx11g_start(char *buf, int len, int argc, char **argv)
{
int32_t mcs = 1;
int32_t payload_len = 1000;
int32_t filter_sel = 0;
int32_t diggain = 32;
int32_t dvga = 0;
int32_t ifs_us = 100;
int32_t pwrlvl = 0;
int32_t continuous = 0;
if (argc == 1) {
printf("tx11g_start usage:\r\n");
printf(" tx11g_start mcs=[0~7] len=4096 filter=1 dg=32 dvga=0 ifs=100 continuous=0\r\n");
return;
}
// parse args
arg_t args[] = {
{"mcs",&mcs},
{"len",&payload_len},
{"filter",&filter_sel},
{"dg",&diggain},
{"dvga",&dvga},
{"ifs",&ifs_us},
{"pwrlvl",&pwrlvl},
{"continuous",&continuous}
};
parse_args(args,sizeof(args)/sizeof(args[0]),argc,argv,__func__);
if (mcs < 0 || mcs > 7) {
printf("mcs error\r\n");
return;
}
// configure txcfg
txcfg_reset(&s_txcfg);
s_txcfg.macbyp_mode = MACBYP_TX_BURST;
s_txcfg.macbyp_nframes_in_burst = 0;
s_txcfg.macbyp_ifs_us = ifs_us;
s_txcfg.formatmod = NONHT;
s_txcfg.lm_rate = s_rate_table_11g[mcs];
s_txcfg.lm_length = payload_len;
s_txcfg.fe_ofdm_filter_sel = filter_sel ? 0x00ff : 0x0000;
s_txcfg.fe_ofdm_gain = diggain;
s_txcfg.fe_dvga_qdb = dvga;
s_txcfg.pwrlevel = pwrlvl << 2;
s_txcfg.continuoustx = continuous;
// reset
tx_stop();
phy_macbyp_reset();
phy_mdm_reset();
// configure and start transmit
phy_start_transmit(&s_txcfg);
}
/*
tx11n_start mcs=3 len=1000 filter=1 dg=32 dvga=-8 ifs=100
*/
static void cmd_tx11n_start(char *buf, int len, int argc, char **argv)
{
int32_t mcs = 1;
int32_t payload_len = 4096;
int32_t filter_sel = 0;
int32_t diggain = 32;
int32_t dvga = 0;
int32_t ifs_us = 100;
int32_t pwrlvl = 0;
int32_t smoothing = 0;
int32_t continuous = 0;
if (argc == 1) {
printf("tx11n_start usage:\r\n");
printf(" tx11n_start mcs=[0~7] len=4096 filter=1 dg=32 dvga=0 ifs=100 continuous=0\r\n");
return;
}
// parse args
arg_t args[] = {
{"mcs",&mcs},
{"len",&payload_len},
{"filter",&filter_sel},
{"dg",&diggain},
{"dvga",&dvga},
{"ifs",&ifs_us},
{"pwrlvl",&pwrlvl},
{"smoothing",&smoothing},
{"continuous",&continuous}
};
parse_args(args,sizeof(args)/sizeof(args[0]),argc,argv,__func__);
if (mcs < 0 || mcs > 7) {
printf("mcs error\r\n");
return;
}
// configure txcfg
txcfg_reset(&s_txcfg);
s_txcfg.macbyp_mode = MACBYP_TX_BURST;
s_txcfg.macbyp_nframes_in_burst = 0;
s_txcfg.macbyp_ifs_us = ifs_us;
s_txcfg.formatmod = HT_MM;
s_txcfg.ht_mcs = s_rate_table_11n[mcs];
s_txcfg.ht_length = payload_len;
s_txcfg.fe_ofdm_filter_sel = filter_sel ? 0xff00 : 0x0000;
s_txcfg.fe_ofdm_gain = diggain;
s_txcfg.fe_dvga_qdb = dvga;
s_txcfg.pwrlevel = pwrlvl << 2;
s_txcfg.smoothing = smoothing;
s_txcfg.continuoustx = continuous;
// reset
tx_stop();
phy_mdm_reset();
phy_macbyp_reset();
// configure and start transmit
phy_start_transmit(&s_txcfg);
}
static void cmd_tx_stop(char *buf, int len, int argc, char **argv)
{
tx_stop();
}
static void cmd_txdvga_force(char *buf, int len, int argc, char **argv)
{
int32_t dvga;
if (argc > 1) {
dvga = (int32_t)atoi(argv[1]);
rfc_hwctrl_txdvga(0);
rfc_txdfe_set_dvga(dvga);
}
}
static void cmd_txdvga_auto(char *buf, int len, int argc, char **argv)
{
rfc_hwctrl_txdvga(1);
}
static void cmd_txpwr_set(char *buf, int len, int argc, char **argv)
{
int32_t pwrlvl;
if (argc > 1) {
pwrlvl = (int32_t)atoi(argv[1]);
pwrlvl = (pwrlvl < 0) ? 0 : pwrlvl;
pwrlvl = (pwrlvl >15) ? 15: pwrlvl;
s_txpwr = pwrlvl;
}
}
// static void cmd_txiqcomp_force(char *buf, int len, int argc, char **argv)
// {
// int32_t gain = 0x400;
// int32_t phase = 0;
// if (argc > 1) {
// gain = (int32_t)atoi(argv[1]);
// if (argc > 2) {
// phase = (int32_t)atoi(argv[2]);
// }
// rfc_txdfe_set_iqcomp(1,gain,1,phase);
// rfc_hwctrl_calparam(0);
// }
// }
static void cmd_txiqgain_force(char *buf, int len, int argc, char **argv)
{
int32_t gain = 0x400;
int32_t en = 0;
if (argc < 3) {
printf("txiqgain_force en coeff\r\n");
return;
}
en = (int32_t)atoi(argv[1]);
gain = (int32_t)atoi(argv[2]);
rfc_txdfe_set_iqgaincomp(en,gain);
rfc_hwctrl_calparam(0);
}
static void cmd_txiqphase_force(char *buf, int len, int argc, char **argv)
{
int32_t phase = 0x0;
int32_t en = 0;
if (argc < 3) {
printf("txiqphase_force en coeff\r\n");
return;
}
en = (int32_t)atoi(argv[1]);
phase = (int32_t)atoi(argv[2]);
rfc_txdfe_set_iqphasecomp(en,phase);
rfc_hwctrl_calparam(0);
}
static void cmd_txdcc_force(char *buf, int len, int argc, char **argv)
{
int32_t dcc_i = 0;
int32_t dcc_q = 0;
if (argc > 1) {
dcc_i = (int32_t)atoi(argv[1]);
if (argc > 2) {
dcc_q = (int32_t)atoi(argv[2]);
}
rfc_txdfe_set_dccomp(dcc_i,dcc_q);
rfc_hwctrl_calparam(0);
}
}
static void cmd_rxdcc_force(char *buf, int len, int argc, char **argv)
{
int32_t dcc_i = 0;
int32_t dcc_q = 0;
if (argc > 1) {
dcc_i = (int32_t)atoi(argv[1]);
if (argc > 2) {
dcc_q = (int32_t)atoi(argv[2]);
}
rfc_rxdfe_set_dccomp(dcc_i,dcc_q);
rfc_hwctrl_calparam(0);
}
}
// static void cmd_rxiqcomp_force(char *buf, int len, int argc, char **argv)
// {
// int32_t gain = 0x400;
// int32_t phase = 0;
// if (argc > 1) {
// gain = (int32_t)atoi(argv[1]);
// if (argc > 2) {
// phase = (int32_t)atoi(argv[2]);
// }
// rfc_rxdfe_set_iqcomp(1,gain,1,phase);
// rfc_hwctrl_calparam(0);
// }
// }
static void cmd_rxiqgain_force(char *buf, int len, int argc, char **argv)
{
int32_t gain = 0x400;
int32_t en = 0;
if (argc < 3) {
printf("rxiqgain_force en coeff\r\n");
return;
}
en = (int32_t)atoi(argv[1]);
gain = (int32_t)atoi(argv[2]);
rfc_rxdfe_set_iqgaincomp(en,gain);
rfc_hwctrl_calparam(0);
}
static void cmd_rxiqphase_force(char *buf, int len, int argc, char **argv)
{
int32_t phase = 0x0;
int32_t en = 0;
if (argc < 3) {
printf("rxiqphase_force en coeff\r\n");
return;
}
en = (int32_t)atoi(argv[1]);
phase = (int32_t)atoi(argv[2]);
rfc_rxdfe_set_iqphasecomp(en,phase);
rfc_hwctrl_calparam(0);
}
static void cmd_calparam_auto(char *buf, int len, int argc, char **argv)
{
rfc_hwctrl_calparam(1);
}
static void cmd_rxnotch0_set(char *buf, int len, int argc, char **argv)
{
int32_t en = 0;
int32_t alpha = 0;
int32_t nrmfc = 0;
double fc = 0;
double fs = 40e6;
if (argc < 4) {
printf("rxnotch0 en alpha fc_hz\r\n");
return;
}
en = (int32_t)atoi(argv[1]);
alpha = (int32_t)atoi(argv[2]);
fc = atof(argv[3]);
nrmfc = (int32_t)(fc/fs*(1<<8) + 0.5);
rfc_rxdfe_set_notch0(en,alpha,nrmfc);
}
static void cmd_rxnotch1_set(char *buf, int len, int argc, char **argv)
{
int32_t en = 0;
int32_t alpha = 0;
int32_t nrmfc = 0;
double fc = 0;
double fs = 40e6;
if (argc < 4) {
printf("rxnotch1 en alpha fc_hz\r\n");
}
en = (int32_t)atoi(argv[1]);
alpha = (int32_t)atoi(argv[2]);
fc = atof(argv[3]);
nrmfc = (int32_t)(fc/fs*(1<<8) + 0.5);
rfc_rxdfe_set_notch1(en,alpha,nrmfc);
}
void rxpm_stop()
{
rfc_pm_stop();
rfc_rxdfe_stop();
rfc_fsm_force(RFC_FSM_FORCE_OFF);
// erf_config_gain_ctrl(1); // make sure rxgain of erf is hardware controlled
wait_us(500);
}
int32_t insel = 0;
int32_t acclen = 8192;
int32_t rshift = 10;
int32_t freqcw = INT32_MIN;
int32_t freqhz = INT32_MIN;
double fs = 80e6;
uint32_t pwr = 0;
static void cmd_rxpm_start(char *buf, int len, int argc, char **argv)
{
if (argc == 1) {
printf("rxpm_start usage:\r\n");
printf(" (1) rxpm_start insel=[0|1|2] acclen=8192 rshift=10 freqcw=1024\r\n");
printf(" (2) rxpm_start insel=[0|1|2] acclen=8192 rshift=10 freqhz=1e6\r\n");
return;
}
freqcw = INT32_MIN;
freqhz = INT32_MIN;
arg_t args[] = {
{"insel",&insel},
{"acclen",&acclen},
{"rshift",&rshift},
{"freqcw",&freqcw},
{"freqhz",&freqhz},
};
parse_args(args,sizeof(args)/sizeof(args[0]),argc,argv,__func__);
if (freqhz != INT32_MIN) {
freqcw = (int32_t)(2.0*freqhz/fs*(1<<19) + 0.5);
}
// make sure rxgain of erf is correct
// erf_config_gain_ctrl(0);
// erf_config_rxgain(E_RF_GC_RRF_54DB,E_RF_GC_RBB1_6DB,E_RF_GC_RBB2_6DB);
// wait_us(500);
// make sure rf is in rx state
rfc_fsm_force(RFC_FSM_RX);
wait_us(500);
// start rxdfe
rfc_rxdfe_start();
// start power meter
pwr = rfc_pm_start(insel,freqcw,acclen,rshift,0,0);
// printf(RESULT_PREFIX "%ld\r\n",pwr);
// printf("rxpm done... %ld\r\n",pwr);
printf("{\"rxpm_pwr\":%ld,\"rxpm_insel\":%ld,\"rxpm_acclen\":%ld",pwr,insel,acclen);
printf(",\"rxpm_rshift\":%ld,\"rxpm_freqcw\":%ld,\"rxpm_freqhz\":%ld}\r\n",rshift,freqcw,freqhz);
rxpm_stop();
}
static void cmd_rxpm_stop(char *buf, int len, int argc, char **argv)
{
rxpm_stop();
}
static void cmd_rxpm_query(char *buf, int len, int argc, char **argv)
{
printf("{\"rxpm_pwr\":%ld,\"rxpm_insel\":%ld,\"rxpm_acclen\":%ld",pwr,insel,acclen);
printf(",\"rxpm_rshift\":%ld,\"rxpm_freqcw\":%ld,\"rxpm_freqhz\":%ld}\r\n",rshift,freqcw,freqhz);
}
static void cmd_rxpm_sweep(char *buf, int len, int argc, char **argv)
{
int32_t fstart = (int32_t)-20e6;
int32_t fstop = (int32_t)20e6;
int32_t fstep = (int32_t)1e6;
int32_t insel = 0;
int32_t acclen = 2048;
int32_t rshift = 8;
int32_t freqcw;
double fs = 80e6;
int32_t freqhz;
uint32_t pwr = 0;
int32_t acc_i,acc_q;
__attribute__((unused)) uint32_t lna,rbb1,rbb2;
if (argc < 4) {
printf("rxpm_sweep usage:\r\n");
printf(" rxpm_sweep fstart=-20000000 fstop=20000000 fstep=1000000 insel=[0|1|2]\r\n");
return;
}
arg_t args[] = {
{"fstart",&fstart},
{"fstop", &fstop},
{"fstep", &fstep},
{"insel", &insel},
{"acclen", &acclen},
{"rshift", &rshift}
};
parse_args(args,sizeof(args)/sizeof(args[0]),argc,argv,__func__);
// // make sure rxgain of erf is correct
// erf_config_gain_ctrl(0);
// erf_config_rxgain(E_RF_GC_RRF_54DB,E_RF_GC_RBB1_6DB,E_RF_GC_RBB2_6DB);
// wait_us(500);
// erf_read_rxgain(&lna,&rbb1,&rbb2);
// printf("RF gain : %ld/%ld/%ld\r\n",lna,rbb1,rbb2);
// make sure rf is in rx state
rfc_fsm_force(RFC_FSM_RX);
wait_us(500);
// start rxdfe
rfc_rxdfe_start();
printf("rxpm sweep result:\r\n");
for (freqhz = fstart; freqhz <= fstop; freqhz += fstep) {
wait_ms(1);
freqcw = (int32_t)(2.0*freqhz/fs*(1<<19) + 0.5);
pwr = rfc_pm_start(insel,freqcw,acclen,rshift,&acc_i,&acc_q);
printf(" * freqhz=%+10ld,pwr=%10ld,acc=(%10ld,%10ld)\r\n",freqhz,pwr,acc_i>>rshift,acc_q>>rshift);
}
// rxpm_stop();
}
static void cmd_dump_phy(char *buf, int len, int argc, char **argv)
{
}
static void cmd_dump_rf(char *buf, int len, int argc, char **argv)
{
printf("RF state\r\n");
printf(" control : pu %ld,adda %ld, sdm %ld, lo %ld, lna %ld, txg %ld, rxg %ld\r\n",
rf_pu_ctrl_hw_getf(),rf_adda_ctrl_hw_getf(),rf_sdm_ctrl_hw_getf(),rf_lo_ctrl_hw_getf(),
rf_lna_ctrl_hw_getf(),rf_tx_gain_ctrl_hw_getf(),rf_rx_gain_ctrl_hw_getf());
printf(" inc_fcal %ld, inc_acal %ld, trxcal %ld\r\n",
rf_inc_fcal_ctrl_en_hw_getf(),rf_inc_acal_ctrl_en_hw_getf(),rf_trxcal_ctrl_hw_getf());
printf(" pucr1_hw: sfreg %ld, pfd %ld, fbdv %ld, vco %ld, osmx %ld\r\n",
rf_pu_sfreg_hw_getf(),rf_pu_pfd_hw_getf(),rf_pu_fbdv_hw_getf(),rf_pu_vco_hw_getf(),rf_pu_osmx_hw_getf());
printf(" trsw %ld, txbuf %ld, rxbuf %ld\r\n",
rf_trsw_en_hw_getf(),rf_pu_txbuf_hw_getf(),rf_pu_rxbuf_hw_getf());
printf(" dac %ld, tbb %ld, tmx %ld, pa %ld, tosdac %ld\r\n",
rf_pu_dac_hw_getf(),rf_pu_tbb_hw_getf(),rf_pu_tmx_hw_getf(),rf_pu_pa_hw_getf(),rf_pu_tosdac_hw_getf());
printf(" adc %ld, adcclk %ld, rbb %ld, rmx %ld, rmxgm %ld, lna %ld, adda_ldo %ld\r\n",
rf_pu_adc_hw_getf(),rf_adc_clk_en_hw_getf(),rf_pu_rbb_hw_getf(),rf_pu_rmx_hw_getf(),rf_pu_rmxgm_hw_getf(),
rf_pu_lna_hw_getf(),rf_pu_adda_ldo_hw_getf());
printf(" calibration: tiq %ld, riq %ld, lol %ld, tos %ld, ros %ld, i_ros %ld\r\n",
rf_tiqcal_en_getf(),rf_riqcal_en_getf(),rf_lo_leakcal_en_getf(),rf_toscal_en_getf(),
rf_roscal_en_getf(),rf_roscal_inc_en_getf());
printf(" acal %ld, fcal %ld, i_acal %ld, i_fcal %ld\r\n",
rf_acal_en_getf(),rf_fcal_en_getf(),rf_acal_inc_en_getf(),rf_fcal_inc_en_getf());
printf(" power: tbb %ld, tbb boost %ld, tmx %ld, dg %ld\r\n",
rf_gc_tbb_hw_getf(),
rf_gc_tbb_boost_hw_getf(),
rf_gc_tmx_hw_getf(),
rf_tx_dvga_gain_ctrl_hw_getf());
printf(" pa: \r\n");
printf(" pa_ib_fix_hw: %ld\r\n",rf_pa_ib_fix_hw_getf());
printf(" pa_half_on_hw: %ld\r\n",rf_pa_half_on_hw_getf());
printf(" pa_vbcas_hw: %ld\r\n",rf_pa_vbcas_hw_getf());
printf(" pa_vbcore_hw: %ld\r\n",rf_pa_vbcore_hw_getf());
printf(" pa_iet_hw: %ld\r\n",rf_pa_iet_hw_getf());
printf(" pa_etb_en_hw: %ld\r\n",rf_pa_etb_en_hw_getf());
}
static void cmd_dump_rfc(char *buf, int len, int argc, char **argv)
{
printf("RF Controller state\r\n");
// printf(" rf_tx_pow_lvl_hw = %lf\r\n",rfc_tx_pow)
}
#if 0
static void cmd_debug_clkpll(char *buf, int len, int argc, char **argv)
{
REG_PL_WR(0x40000128,0x0f030b03);
REG_PL_WR(0x40001220,0x10002010);
REG_PL_WR(0x40001054,0x00800004);
REG_PL_WR(0x400000d8,0x80000002);
REG_PL_WR(0x400000e0,0x1);
}
#endif
static void cmd_dummy(char *buf, int len, int argc, char **argv)
{
printf("not available\r\n");
}
static void cmd_reg_wr(char *buf, int len, int argc, char **argv)
{
uint32_t addr;
uint32_t value;
int base = 16;
char *endptr;
if (argc < 3) {
return;
}
// addr = (uint32_t)strtol(argv[1],&endptr,base);
addr = (uint32_t)strtoul(argv[1],&endptr,base);
if (endptr == argv[1]) {
printf("%s: no digits found!\r\n",__func__);
return;
}
// value = (uint32_t)strtol(argv[2],&endptr,base);
value = (uint32_t)strtoul(argv[2],&endptr,base);
if (endptr == argv[2]) {
printf("%s: no digits found!\r\n",__func__);
return;
}
printf("program external rf %08lx to addr %08lx\r\n",value,addr);
rfc_write_reg(addr,value);
}
static void cmd_reg_rd(char *buf, int len, int argc, char **argv)
{
uint32_t start_addr;
uint32_t num_words;
uint32_t read_value;
int base = 16;
char *endptr;
if (argc < 2) {
return;
}
else {
start_addr = strtoul(argv[1],&endptr,base);
if (endptr == argv[1]) {
printf("%s: no digits found!\r\n",__func__);
return;
}
}
if (argc < 3) {
num_words = 1;
}
else {
num_words = atoi(argv[2]);
}
for (int i = 0; i < num_words; i++) {
if (i % 8 == 0) {
printf("\r\n%08lx: ", start_addr + 4*i);
}
read_value = rfc_read_reg(start_addr + 4*i);
printf("%08lx ",read_value);
}
printf("\r\n");
}
static void cmd_rx_start(char *buf, int len, int argc, char **argv)
{
int32_t time_prev = xTaskGetTickCount();
int32_t time_pkt = xTaskGetTickCount();
__attribute__((unused)) int32_t time_last_print = xTaskGetTickCount();
int32_t time_break = 45*1000;
int32_t time_out = 2*1000;
__attribute__((unused)) int32_t time_print = 800;
int32_t time_curr;
int32_t frame_ok = 0;
int test_on_going = 0;
if (argc < 3) {
printf("rx_start usage:");
printf(" rx_start clr_sec stop_sec\r\n");
printf("rx start using default time (clr_stat_time=%ld,timeout_time=%ld)\r\n",time_out/1000,time_break/1000);
}
else {
time_out = atoi(argv[1])*1000;
time_break = atoi(argv[2])*1000;
}
// reset
phy_mdm_reset();
phy_macbyp_reset();
// clear
phy_macbyp_clr_status();
// start
phy_macbyp_rx_start();
printf("start receiving\r\n");
while (1) {
time_curr = xTaskGetTickCount();
if (time_curr - (int32_t)time_pkt > time_break) {
printf("rx timeout...exit\r\n");
break;
}
// if (test_on_going && (time_curr - (int32_t)time_prev > time_out)) {
if (time_curr - (int32_t)time_prev > time_out) {
if (test_on_going) {
printf("rx status cleared...\r\n");
test_on_going = 0;
frame_ok = 0;
}
time_prev = time_curr;
phy_mdm_reset();
phy_macbyp_reset();
phy_macbyp_clr_status();
phy_macbyp_rx_start();
}
if ((macbyp_stat_frame_ok_get() > frame_ok)) {// && (time_curr - time_prev > time_print)) {
test_on_going = 1;
frame_ok = macbyp_stat_frame_ok_get();
time_prev = xTaskGetTickCount();
time_pkt = xTaskGetTickCount();
phy_macbyp_rx_print_status();
}
}
}
static void cmd_rx_start_at(char *buf, int len, int argc, char **argv)
{
// reset
phy_mdm_reset();
phy_macbyp_reset();
// clear
phy_macbyp_clr_status();
// start
phy_macbyp_rx_start();
printf("at_rx_start ok\r\n");
}
static void cmd_rx_poll_stat_at(char *buf, int len, int argc, char **argv)
{
phy_macbyp_rx_print_status_at();
printf("at_rx_poll ok\r\n");
}
static void cmd_rx_clear_stat_at(char *buf, int len, int argc, char **argv)
{
// clear
phy_macbyp_clr_status();
printf("at_rx_clr ok\r\n");
}
static void cmd_enhance_on(char *buf, int len, int argc, char **argv)
{
s_nbmdm_on = 1;
printf("wifi enhance mode on\r\n");
mdm_mdmconf_setf(1);
rfc_config_bandwidth(RFC_BW_10M);
}
static void cmd_enhance_off(char *buf, int len, int argc, char **argv)
{
s_nbmdm_on = 0;
printf("wifi enhance mode off\r\n");
mdm_mdmconf_setf(0);
rfc_config_bandwidth(RFC_BW_20M);
}
#if 0
static void cmd_rx_pf_on(char *buf, int len, int argc, char **argv)
{
printf("rx pulse filter on\r\n");
rf_rx_pf_i_en_setf(1);
rf_rx_pf_q_en_setf(1);
}
static void cmd_rx_pf_off(char *buf, int len, int argc, char **argv)
{
printf("rx pulse filter off\r\n");
rf_rx_pf_i_en_setf(0);
rf_rx_pf_q_en_setf(0);
}
#endif
static void cmd_rf_pkdet(char *buf, int len, int argc, char **argv)
{
uint32_t pkdetvth;
if (argc == 1) {
pkdetvth = rf_rbb_pkdet_vth_getf();
printf("pkdetvth = %ld\r\n",pkdetvth);
return;
}
pkdetvth = atoi(argv[1]);
rf_rbb_pkdet_vth_setf(pkdetvth);
}
static void cmd_rf_filterbw(char *buf, int len, int argc, char **argv)
{
uint32_t cw;
if (argc == 1) {
return;
}
cw = atoi(argv[1]);
rf_rbb_cap1_fc_i_setf(cw);
rf_rbb_cap1_fc_q_setf(cw);
rf_rbb_cap2_fc_i_setf(cw);
rf_rbb_cap2_fc_q_setf(cw);
printf("set analog filter fc capcode to %ld\r\n",cw);
}
static void cmd_rf_pa_halfon_wifi(char *buf, int len, int argc, char **argv)
{
uint32_t on;
if (argc == 1) {
return;
}
on = atoi(argv[1]);
if (on) {
rf_pa_half_on_wifi_setf(1);
printf("WiFi PA half on enabled\r\n");
}
else {
rf_pa_half_on_wifi_setf(0);
printf("WiFi PA half on disabled\r\n");
}
}
static void cmd_rf_pa_halfon(char *buf, int len, int argc, char **argv)
{
uint32_t on;
if (argc == 1) {
return;
}
on = atoi(argv[1]);
if (on) {
rf_pa_half_on_setf(1);
printf("PA half on (BLE/SW control) enabled\r\n");
}
else {
rf_pa_half_on_setf(0);
printf("PA half on (BLE/SW control) disabled\r\n");
}
}
static void cmd_rf_trxcal_ctrl(char *buf, int len, int argc, char **argv)
{
uint32_t on;
if (argc > 1) {
on = atoi(argv[1]);
rf_trxcal_ctrl_hw_setf(on);
}
printf("trxcal_ctrl_hw : %ld\r\n", rf_trxcal_ctrl_hw_getf());
}
static void cmd_rf_txgain_ctrl(char *buf, int len, int argc, char **argv)
{
uint32_t on;
if (argc > 1) {
on = atoi(argv[1]);
rf_tx_gain_ctrl_hw_setf(on);
}
printf("txgain_ctrl_hw : %ld\r\n", rf_tx_gain_ctrl_hw_getf());
}
static void cmd_rf_caldata_dump(char *buf, int len, int argc, char **argv)
{
int i;
printf("[CALIBRATION_DATA_START]\r\n");
printf("{");
printf("\"lo_fcal\": [");
for (i = 0; i < E_RF_CHANNEL_NUM; i++) {
printf("%d",rf_calib_data->lo[i].fcal);
if (i < E_RF_CHANNEL_NUM - 1) printf(",");
}
printf("]");
printf(",\\\r\n");
printf("\"lo_acal\": [");
for (i = 0; i < E_RF_CHANNEL_NUM; i++) {
printf("%d",rf_calib_data->lo[i].acal);
if (i < E_RF_CHANNEL_NUM - 1) printf(",");
}
printf("]");
printf(",\\\r\n");
printf("\"rbb_i\": %d", rf_calib_data->cal.rbb_cap1_fc_i);
printf(",\\\r\n");
printf("\"rbb_q\": %d", rf_calib_data->cal.rbb_cap1_fc_q);
printf(",\\\r\n");
printf("\"ros_i\": [");
for (i = 0; i < E_RF_RXCAL_GAIN_CNT; i++) {
printf("%d",rf_calib_data->rxcal[i].rosdac_i);
if (i < E_RF_RXCAL_GAIN_CNT - 1) printf(",");
}
printf("]");
printf(",\\\r\n");
printf("\"ros_q\": [");
for (i = 0; i < E_RF_RXCAL_GAIN_CNT; i++) {
printf("%d",rf_calib_data->rxcal[i].rosdac_q);
if (i < E_RF_RXCAL_GAIN_CNT - 1) printf(",");
}
printf("]");
printf(",\\\r\n");
printf("\"tos_i\": [");
for (i = 0; i < E_RF_TXCAL_GAIN_CNT; i++) {
printf("%d",rf_calib_data->txcal[i].tosdac_i);
if (i < E_RF_TXCAL_GAIN_CNT - 1) printf(",");
}
printf("]");
printf(",\\\r\n");
printf("\"tos_q\": [");
for (i = 0; i < E_RF_TXCAL_GAIN_CNT; i++) {
printf("%d",rf_calib_data->txcal[i].tosdac_q);
if (i < E_RF_TXCAL_GAIN_CNT - 1) printf(",");
}
printf("]");
printf(",\\\r\n");
printf("\"tiq_g\": [");
for (i = 0; i < E_RF_TXCAL_GAIN_CNT; i++) {
printf("%d",rf_calib_data->txcal[i].tx_iq_gain_comp);
if (i < E_RF_TXCAL_GAIN_CNT - 1) printf(",");
}
printf("]");
printf(",\\\r\n");
printf("\"tiq_p\": [");
for (i = 0; i < E_RF_TXCAL_GAIN_CNT; i++) {
printf("%d",(rf_calib_data->txcal[i].tx_iq_phase_comp >= 512 ? rf_calib_data->txcal[i].tx_iq_phase_comp - 1024 : rf_calib_data->txcal[i].tx_iq_phase_comp));
if (i < E_RF_TXCAL_GAIN_CNT - 1) printf(",");
}
printf("]");
printf("}");
printf("\r\n");
printf("[CALIBRATION_DATA_END]\r\n");
}
static void cmd_rf_cal_rerun(char *buf, int len, int argc, char **argv)
{
rfc_reset();
rfc_init(40*1000*1000);
}
static uint32_t tbb_boost = 0;
static uint32_t tbb = 6;
static uint32_t tmx = 5;
static uint32_t mode;
static void cmd_rf_power_auto(char *buf, int len, int argc, char **argv)
{
printf("rf tx power hardware control on\r\n");
mode = RFC_PC_AUTO;
rfc_hwctrl_txrfgain(1);
rfc_config_power(mode,tbb_boost,tbb,tmx);
}
static void cmd_rf_power_force(char *buf, int len, int argc, char **argv)
{
// mode, tbb_boost, tbb, tmx
// if (argc < 2) {
// printf("rx_power_force usage:\r\n");
// printf(" rf_power_force mode=<11b|11n|11g|ble> tbb_boost=0 tbb=6 tmx=5\r\n");
// return;
// }
// arg_t args[] = {
// {"tbb_boost",&tbb_boost},
// {"tbb",&tbb},
// {"tmx",&tmx},
// };
// parse_args(args,sizeof(args)/sizeof(args[0]),argc-1,&argv[1],__func__);
// printf("new tx power: mode=%s,tbb_boost=%ld,tbb=%ld,tmx=%ld\r\n",tbb_boost,tbb,tmx);
if (argc == 1) {
printf("rx_power_force usage:\r\n");
printf(" rf_power_force 11b|11n|11g|ble tbb_boost tbb tmx\r\n");
return;
}
if (strcmp("11b",argv[1]) == 0) {
mode = RFC_PC_WLAN_11B;
}
else if (strcmp("11g",argv[1]) == 0) {
mode = RFC_PC_WLAN_11G;
}
else if (strcmp("11n",argv[1]) == 0) {
mode = RFC_PC_WLAN_11N;
}
else if (strcmp("ble",argv[1]) == 0) {
mode = RFC_PC_BT_BLE;
}
if (argc > 2) tbb_boost = (uint32_t)atoi(argv[2]);
if (argc > 3) tbb = (uint32_t)atoi(argv[3]);
if (argc > 4) tmx = (uint32_t)atoi(argv[4]);
rfc_hwctrl_txrfgain(0);
rfc_config_power(mode,tbb_boost,tbb,tmx);
}
// One param per update, no correctness check
// agc_param_update param_name param_value
static void cmd_agc_param_update(char *buf, int len, int argc, char **argv)
{
char *param_name;
int32_t param_value;
if (argc < 3) {
return;
}
param_name = argv[1];
param_value = atoi(argv[2]);
if (strcmp("ENUP_QDB",param_name) == 0) {
riu_rampupgapqdb_setf(param_value);
}
else if (strcmp("ENUP_NDL",param_name) == 0) {
riu_rampupndlindex_setf(param_value);
}
else if (strcmp("ENDN_QDB",param_name) == 0) {
riu_rampdngapqdb_setf(param_value);
}
else if (strcmp("ENDN_NDL",param_name) == 0) {
riu_rampdnndlindex_setf(param_value);
}
else if (strcmp("DSSSDET",param_name) == 0) {
rc2_evt4op2_setf(param_value);
}
else if (strcmp("PKDET",param_name) == 0) {
riu_evt0op1_setf(param_value);
}
else if (strcmp("DISDET",param_name) == 0) {
if (param_value) {
riu_evt3op1_setf(25);
}
else {
riu_evt3op1_setf(0);
}
}
else if (strcmp("ADCSATDET",param_name) == 0) {
if (param_value) {
riu_evt1op3_setf(20);
}
else {
riu_evt1op3_setf(0);
}
}
else if (strcmp("RAMPUPDET",param_name) == 0) {
if (param_value) {
riu_evt2op2_setf(23);
}
else {
riu_evt2op2_setf(0);
}
}
else if (strcmp("ADCSAT_THR",param_name) == 0) {
riu_sathighthrdbv_setf((uint8_t)(param_value + 4 + 64));
riu_satlowthrdbv_setf((uint8_t)(param_value + 64));
riu_satthrdbv_setf((uint8_t)(param_value + 1 + 64));
printf("ADCSAT THR = %ld\r\n", param_value);
}
else if (strcmp("ADCSAT_TRIGGER_THR",param_name) == 0) {
riu_satlowthrdbv_setf((uint8_t)(param_value + 64));
printf("ADCSAT Trigger Threshold = %ld\r\n", param_value);
}
else if (strcmp("ADCSAT_HOLD_THR",param_name) == 0) {
riu_sathighthrdbv_setf((uint8_t)(param_value + 64));
printf("ADCSAT Hold Threshold = %ld\r\n", param_value);
}
else if (strcmp("ADCSAT_HIGH_THR",param_name) == 0) {
riu_satthrdbv_setf((uint8_t)(param_value + 64));
printf("ADCSAT High Threshold = %ld\r\n", param_value);
}
else if (strcmp("INBDPOWSUP",param_name) == 0) {
riu_inbdpowsupthrdbm_setf((uint8_t)(256+param_value));
printf("INBDPOWSUP = %d (%d)\r\n", (uint8_t)param_value, (int8_t)(param_value));
}
else if (strcmp("INBDPOWINF",param_name) == 0) {
riu_inbdpowinfthrdbm_setf((uint8_t)(256+param_value));
printf("INBDPOWINF = %d (%d)\r\n", (uint8_t)param_value, (int8_t)(param_value));
}
else if (strcmp("INBDPOWADJ_THR",param_name) == 0) {
rc2_inbdpow_adj_thr_dbm_setf(param_value+256);
printf("INBDPOWADJTHR = %d (%d)\r\n", (uint8_t)param_value, (int8_t)(param_value));
}
else if (strcmp("INBDPOWADJ_SUP",param_name) == 0) {
rc2_inbdpowsupthr_adj_en_setf(param_value);
printf("INBDPOWADJ_SUP = %s\r\n", param_value ? "ON" : "OFF");
}
else if (strcmp("INBDPOWADJ_INF",param_name) == 0) {
rc2_inbdpowinfthr_adj_en_setf(param_value);
printf("INBDPOWADJ_INF = %s\r\n", param_value ? "ON" : "OFF");
}
else if (strcmp("ADCPOWSUP",param_name) == 0) {
riu_adcpowsupthrdbm_setf((uint8_t)(256+param_value));
printf("ADCPOWSUP = %d (%d)\r\n", (uint8_t)param_value, (int8_t)(param_value));
}
else if (strcmp("ADCPOWINF",param_name) == 0) {
riu_adcpowinfthrdbm_setf((uint8_t)(256+param_value));
printf("ADCPOWINF = %d (%d)\r\n", (uint8_t)param_value, (int8_t)(param_value));
}
else if (strcmp("ADCPOWSUP_DBV",param_name) == 0) {
riu_adcpowsupthrdbv_setf((uint8_t)(256+param_value));
printf("ADCPOWSUP = %d (%d)\r\n", (uint8_t)param_value, (int8_t)(param_value));
}
else if (strcmp("ADCPOWINF_DBV",param_name) == 0) {
riu_adcpowinfthrdbv_setf((uint8_t)(256+param_value));
printf("ADCPOWINF = %d (%d)\r\n", (uint8_t)param_value, (int8_t)(param_value));
}
printf("agc param %s update done\r\n",param_name);
}
#if 0
// #define PRINT_PARAM_S8(x) printf("%s = %d\r\n",#x,(int8_t)( ## x ##_getf() ))
// #define PRINT_PARAM_S8(x) printf("%s = %d\r\n", #x , ## x ##_getf())
static void cmd_agc_param_dump(char *buf, int len, int argc, char **argv)
{
// PRINT_PARAM_S8(riu_adcpowsupthrdbm);
// PRINT_PARAM_S8(riu_adcpowinfthrdbm);
// PRINT_PARAM_S8(riu_adcpowsupthrdbv);
// PRINT_PARAM_S8(riu_adcpowinfthrdbv);
// PRINT_PARAM_S8(riu_inbdpowsupthrdbm);
// PRINT_PARAM_S8(riu_inbdpowinfthrdbm);
// PRINT_PARAM_S8(riu_sathighthr);
// PRINT_PARAM_S8(riu_satlowthr);
// PRINT_PARAM_S8(riu_satthr);
// // PRINT_PARAM_S8(rc2_inbdpow_adj_thr_dbm);
// // PRINT_PARAM_S8(rc2_inbdpowsupthr_adj_en);
// // PRINT_PARAM_S8(rc2_inbdpowinfthr_adj_en);
}
#endif
#if 0
extern void rf_pri_config_mode(uint32_t mode);
extern void rf_pri_config_channel(uint32_t channel_index);
extern void rf_pri_singen_config(uint32_t fcw,uint32_t start_addr_i,uint32_t start_addr_q);
extern void rf_pri_singen_start(void);
extern void rf_pri_save_state_for_cal();
extern void rf_pri_restore_state_for_cal();
extern void rf_pri_config_txgain(uint32_t gc_tbb_boost,uint32_t gc_tmx,uint32_t gc_tbb);
extern void rf_pri_wait_us(uint32_t us);
extern void rf_pri_wait_ms(uint32_t ms);
static int channel4cal = E_RF_CHANNEL_2440M;
void bruteforce_fcal()
{
}
void bruteforce_acal()
{
}
void bruteforce_tiq()
{
rf_pri_config_channel(channel4cal);
rf_pri_config_mode(E_RF_MODE_TXCAL);
// turn on tiq calibration circuits
rf_lo_leakcal_en_setf(1);
rf_tiqcal_en_setf(1);
rf_pwr_det_en_setf(1);
rf_pa_pwrmx_dac_pn_switch_setf(1);
// turn off tiq calibration circuits
rf_lo_leakcal_en_setf(0);
rf_tiqcal_en_setf(0);
rf_pwr_det_en_setf(0);
rf_pa_pwrmx_dac_pn_switch_setf(0);
}
void bruteforce_riq()
{
}
void bruteforce_ros()
{
}
void bruteforce_rbw()
{
}
#endif
static void cmd_fem_ctrl_on(char *buf, int len, int argc, char **argv)
{
hal_fem_gpio_on();
// FEM GPIO0
rf_epa_rx2on_vector_00_setf(0);
rf_epa_rxon_vector_00_setf(0);
rf_epa_tx2on_vector_00_setf(1);
rf_epa_tx2paon_vector_00_setf(1);
rf_epa_txpaon_vector_00_setf(1);
// FEM GPIO1
rf_epa_rx2on_vector_01_setf(0);
rf_epa_rxon_vector_01_setf(0);
rf_epa_tx2on_vector_01_setf(0);
rf_epa_tx2paon_vector_01_setf(0);
rf_epa_txpaon_vector_01_setf(1);
printf("FEM control on\r\n");
}
static void cmd_fem_ctrl_off(char *buf, int len, int argc, char **argv)
{
hal_fem_gpio_off();
printf("FEM control off\r\n");
}
// STATIC_CLI_CMD_ATTRIBUTE makes this(these) command(s) static
const static struct cli_command cmds_phy[] STATIC_CLI_CMD_ATTRIBUTE = {
{ "phy_init", "init rf driver", cmd_init},
{ "phy_channel", "configure work channel frequency", cmd_channel},
{ "rf_channel", "configure rf channel (hw control)", cmd_rf_channel},
{ "rf_channel_sw","configure rf channel (sw control)", cmd_rf_channel_sw},
{ "rf_power_force","configure rf tx power", cmd_rf_power_force},
{ "rf_power_auto", "tx power is hardware controlled", cmd_rf_power_auto},
{ "rf_tos","set rf tos", cmd_dummy},
{ "rf_ros","set rf ros", cmd_dummy},
{ "rf_gain","read or set rf gain", cmd_dummy},
{ "rf_pkdet","read or set rf pkdet vth", cmd_rf_pkdet},
{ "rf_filterbw","set rf analog filter bw", cmd_rf_filterbw},
{ "rf_halfpa_wifi", "set rf pa half on for wifi", cmd_rf_pa_halfon_wifi},
{ "rf_halfpa", "set rf pa half on for reg ctrl or ble", cmd_rf_pa_halfon},
{ "rf_trxcal_ctrl", "rf_trxcal_ctrl", cmd_rf_trxcal_ctrl},
{ "rf_txgain_ctrl", "rf_txgain_ctrl", cmd_rf_txgain_ctrl},
{ "rfcal_dump", "dump rf calibration data", cmd_rf_caldata_dump},
{ "rfcal_run", "re-run rf calibration", cmd_rf_cal_rerun},
{ "txpwr_set", "set tx power level", cmd_txpwr_set},
{ "tx11b_start", "start transmit 11b frames", cmd_tx11b_start},
{ "tx11b_stop", "start transmit 11b frames", cmd_tx_stop},
{ "tx11g_start", "start transmit 11g frames", cmd_tx11g_start},
{ "tx11g_stop", "start transmit 11g frames", cmd_tx_stop},
{ "tx11n_start", "start transmit 11n frames", cmd_tx11n_start},
{ "tx11n_stop", "start transmit 11n frames", cmd_tx_stop},
{ "txsin_start", "transmit single tone", cmd_txsin_start},
{ "txsin_stop", "stop transmit single tone", cmd_txsin_stop},
{ "tx_stop", "stop transmit", cmd_tx_stop},
{ "txdvga_force", "force tx dvga gain (qdB)", cmd_txdvga_force},
{ "txdvga_auto", "auto tx dvga gain", cmd_txdvga_auto},
{ "txdgofdm_force", "force ofdm digital gain (linear)", cmd_dummy},
{ "txdgdsss_force", "force dsss digital gain (linear)", cmd_dummy},
{ "txiqgain_force", "force tx iqgaincomp parameters", cmd_txiqgain_force},
{ "txiqphase_force", "force tx iqphasecomp parameters", cmd_txiqphase_force},
{ "txdcc_force", "force tx dccomp parameters", cmd_txdcc_force},
{ "rxdcc_force", "force rx dccomp parameters", cmd_rxdcc_force},
{ "rxiqgain_force", "force rx iqgaincomp parameters", cmd_rxiqgain_force},
{ "rxiqphase_force", "force rx iqgaincomp parameters", cmd_rxiqphase_force},
{ "calparam_auto", "auto config calibration parameters",cmd_calparam_auto},
{ "rxnotch0", "config rx notch filter parameters", cmd_rxnotch0_set},
{ "rxnotch1", "config rx notch filter parameters", cmd_rxnotch1_set},
{ "rxpm_start", "start rx power meter", cmd_rxpm_start},
{ "rxpm_stop", "stop rx power meter", cmd_rxpm_stop},
{ "rxpm_sweep", "sweep using rx power meter", cmd_rxpm_sweep},
{ "rxpm_query", "sweep using rx power meter", cmd_rxpm_query},
{ "sram_play", "play waveform from sram", cmd_dummy}, // TODO
{ "sram_dump", "dump waveform to sram", cmd_dummy}, // TODO
{ "rx_start", "start receiver", cmd_rx_start},
{ "at_rx_start", "start receiver for auto test", cmd_rx_start_at},
{ "at_rx_poll","pull receiver state for auto test", cmd_rx_poll_stat_at},
{ "at_rx_clr","clear receiver state for auto test", cmd_rx_clear_stat_at},
{ "at_rx_restart","restart receiver state for auto test",cmd_rx_start_at},
#if 0
{ "rxpf_on","rx pulse filter on", cmd_rx_pf_on},
{ "rxpf_off","rx pulse filter off", cmd_rx_pf_off},
#endif
{ "reg_rd","register read", cmd_reg_rd},
{ "reg_wr","register write", cmd_reg_wr},
{ "enhance_on", "wifi enhance mode on", cmd_enhance_on},
{ "enhance_off", "wifi enhance mode off", cmd_enhance_off},
{ "dump_phy", "dump current state", cmd_dump_phy},
{ "dump_rf", "dump rf state", cmd_dump_rf},
{ "dump_rfc", "dump rfc state", cmd_dump_rfc},
{ "agc_param_update", "update agc param", cmd_agc_param_update},
{ "fem_ctrl_on", "turn on fem control", cmd_fem_ctrl_on},
{ "fem_ctrl_off", "turn off fem control", cmd_fem_ctrl_off},
#if 0
{ "agc_param_dump", "dump agc param", cmd_dummy}
{ "debug_clkpll","debug clock pll", cmd_debug_clkpll}
#endif
};
int phy_cli_register(void)
{
// static command(s) do NOT need to call aos_cli_register_command(s) to register.
// However, calling aos_cli_register_command(s) here is OK but is of no effect as cmds_user are included in cmds list.
// XXX NOTE: Calling this *empty* function is necessary to make cmds_user in this file to be kept in the final link.
//return aos_cli_register_commands(cmds_user, sizeof(cmds_user)/sizeof(cmds_user[0]));
return 0;
}
|
mkroman/bl602-604
|
components/hal_drv/bl602_hal/bl_sec_aes.c
|
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdio.h>
#include <string.h>
#include <sec_eng_reg.h>
#include <bl602_sec_eng.h>
#include "bl_irq.h"
#include "bl_sec.h"
int bl_sec_aes_enc(uint8_t *key, int keysize, uint8_t *input, uint8_t *output)
{
return 0;
}
static void Aes_Compare_Data(const uint8_t *expected, uint8_t *input, uint32_t len)
{
int i = 0, is_failed = 0;
for (i = 0; i < len; i++) {
if (input[i] != expected[i]) {
is_failed = 1;
printf("%s[%02d], %02x %02x\r\n",
input[i] ==expected[i] ? "S" : "F",
i,
input[i],
expected[i]
);
}
}
if (is_failed) {
printf("====== Failed %lu Bytes======\r\n", len);
} else {
printf("====== Success %lu Bytes=====\r\n", len);
}
}
static void _dump_iv_status(SEC_Eng_AES_Link_Config_Type *linkCfg)
{
int i;
uint8_t *iv;
for (i = 0, iv = (uint8_t*)&(linkCfg->aesIV0); i < 16; i++) {
printf("%02x", iv[i]);
}
puts("\r\n");
}
static const uint8_t aesSrcBuf_data[] =
{
0x6b, 0xc1, 0xbe, 0xe2, 0x2e, 0x40, 0x9f, 0x96, 0xe9, 0x3d, 0x7e, 0x11, 0x73, 0x93, 0x17, 0x2a,
0x6b, 0xc1, 0xbe, 0xe2, 0x2e, 0x40, 0x9f, 0x96, 0xe9, 0x3d, 0x7e, 0x11, 0x73, 0x93, 0x17, 0x2a,
0x6b, 0xc1, 0xbe, 0xe2, 0x2e, 0x40, 0x9f, 0x96, 0xe9, 0x3d, 0x7e, 0x11, 0x73, 0x93, 0x17, 0x2a,
0x6b, 0xc1, 0xbe, 0xe2, 0x2e, 0x40, 0x9f, 0x96, 0xe9, 0x3d, 0x7e, 0x11, 0x73, 0x93, 0x17, 0x2a,
};
void Sec_Eng_AES_Link_Case_CBC_128(SEC_ENG_AES_ID_Type aesId)
{
uint8_t aesDstBuf[32];
static const uint8_t aesResult_entrypted_cbc_128[] =
{
0x76, 0x49, 0xab, 0xac, 0x81, 0x19, 0xb2, 0x46, 0xce, 0xe9, 0x8e, 0x9b, 0x12, 0xe9, 0x19, 0x7d,
0x4c, 0xbb, 0xc8, 0x58, 0x75, 0x6b, 0x35, 0x81, 0x25, 0x52, 0x9e, 0x96, 0x98, 0xa3, 0x8f, 0x44,
0x9f, 0x6f, 0x07, 0x96, 0xee, 0x3e, 0x47, 0xb0, 0xd8, 0x7c, 0x76, 0x1b, 0x20, 0x52, 0x7f, 0x78,
0x07, 0x01, 0x34, 0x08, 0x5f, 0x02, 0x75, 0x17, 0x55, 0xef, 0xca, 0x3b, 0x4c, 0xdc, 0x7d, 0x62,
};
SEC_Eng_AES_Link_Config_Type linkCfg = {
.aesMode = SEC_ENG_AES_KEY_128BITS, /* 128-bit key mode select */
.aesDecEn = SEC_ENG_AES_ENCRYPTION, /* Encode */
.aesDecKeySel = SEC_ENG_AES_USE_NEW, /* Use new key */
.aesIntClr = 0, /* Not clear intrrupt */
.aesIntSet = 1, /* Not set interrupt */
.aesBlockMode = SEC_ENG_AES_CBC, /* ECB mode select */
.aesIVSel = SEC_ENG_AES_USE_NEW, /* Use new iv */
.aesMsgLen = 1, /* Number of 128-bit block */
.aesSrcAddr = 0, /* Message source address */
.aesDstAddr = 0, /* Message destination address */
.aesIV0 = 0x03020100, /* Big endian initial vector(MSB) */
.aesIV1 = 0x07060504, /* Big endian initial vector */
.aesIV2 = 0x0b0a0908, /* Big endian initial vector */
.aesIV3 = 0x0f0e0d0c, /* Big endian initial vector(LSB)(CTR mode:counter initial value) */
.aesKey0 = 0x16157e2b, /* Big endian aes key(aes-128/256 key MSB) */
.aesKey1 = 0xa6d2ae28, /* Big endian aes key */
.aesKey2 = 0x8815f7ab, /* Big endian aes key */
.aesKey3 = <KEY>, /* Big endian aes key(aes-128 key LSB) */
.aesKey4 = 0, /* Big endian aes key */
.aesKey5 = 0, /* Big endian aes key */
.aesKey6 = 0, /* Big endian aes key */
.aesKey7 = 0 /* Big endian aes key(aes-256 key LSB) */
};
Sec_Eng_AES_Enable_Link(aesId);
puts("[CBC] AES-128-CBC case...\r\n");
printf("[CBC] IV Status Initial, %08lx\r\n", linkCfg.aesSrcAddr);
_dump_iv_status(&linkCfg);
Sec_Eng_AES_Link_Work(aesId, (uint32_t)&linkCfg, &(aesSrcBuf_data[0]), 32, aesDstBuf);
Aes_Compare_Data(aesResult_entrypted_cbc_128, (uint8_t*)linkCfg.aesDstAddr, 32);
printf("[CBC] IV Status After, %08lx\r\n", linkCfg.aesSrcAddr);
_dump_iv_status(&linkCfg);
Sec_Eng_AES_Link_Work(aesId, (uint32_t)&linkCfg, &(aesSrcBuf_data[0]) + 32, 16, aesDstBuf);
Aes_Compare_Data(&(aesResult_entrypted_cbc_128[0]) + 32, (uint8_t*)linkCfg.aesDstAddr, 16);
printf("[CBC] IV Status After %08lx\r\n", linkCfg.aesSrcAddr);
_dump_iv_status(&linkCfg);
Sec_Eng_AES_Link_Work(aesId, (uint32_t)&linkCfg, &(aesSrcBuf_data[0]) + 48, 16, aesDstBuf);
Aes_Compare_Data(&(aesResult_entrypted_cbc_128[0]) + 48, (uint8_t*)linkCfg.aesDstAddr, 16);
printf("[CBC] IV Status After, %08lx\r\n", linkCfg.aesSrcAddr);
_dump_iv_status(&linkCfg);
Sec_Eng_AES_Disable_Link(aesId);
}
void Sec_Eng_AES_Link_Case_CTR_128(SEC_ENG_AES_ID_Type aesId)
{
uint8_t aesDstBuf[32];
static const uint8_t aesResult_entrypted_ctr_128[] =
{
0x87, 0x4d, 0x61, 0x91, 0xb6, 0x20, 0xe3, 0x26, 0x1b, 0xef, 0x68, 0x64, 0x99, 0x0d, 0xb6, 0xce,
0x5d, 0xea, 0xc2, 0xde, 0x49, 0x33, 0xce, 0xf5, 0xf1, 0x9d, 0x09, 0xc6, 0x8f, 0xc3, 0x64, 0x84,
0x01, 0xed, 0x7d, 0x9a, 0x56, 0xc9, 0xa8, 0xd9, 0x57, 0x89, 0xb6, 0x0a, 0x64, 0x29, 0x7b, 0x6e,
0x83, 0x5d, 0x87, 0x7d, 0xde, 0xb1, 0x07, 0x50, 0x3d, 0x37, 0x4f, 0xca, 0x66, 0xff, 0xbc, 0xd4,
};
SEC_Eng_AES_Link_Config_Type linkCfg = {
.aesMode = SEC_ENG_AES_KEY_128BITS, /* 128-bit key mode select */
.aesDecEn = SEC_ENG_AES_ENCRYPTION, /* Encode */
.aesDecKeySel = SEC_ENG_AES_USE_NEW, /* Use new key */
.aesIntClr = 0, /* Not clear intrrupt */
.aesIntSet = 1, /* Not set interrupt */
.aesBlockMode = SEC_ENG_AES_CTR, /* CTR mode select */
.aesIVSel = SEC_ENG_AES_USE_NEW, /* Use new iv */
.aesMsgLen = 1, /* Number of 128-bit block */
.aesSrcAddr = 0, /* Message source address */
.aesDstAddr = 0, /* Message destination address */
.aesIV0 = 0xf3f2f1f0, /* Big endian initial vector(MSB) */
.aesIV1 = 0xf7f6f5f4, /* Big endian initial vector */
.aesIV2 = 0xfbfaf9f8, /* Big endian initial vector */
.aesIV3 = 0xfffefdfc, /* Big endian initial vector(LSB)(CTR mode:counter initial value) */
.aesKey0 = 0x16157e2b, /* Big endian aes key(aes-128/256 key MSB) */
.aesKey1 = 0xa6d2ae28, /* Big endian aes key */
.aesKey2 = 0x8815f7ab, /* Big endian aes key */
.aesKey3 = 0x3c4fcf09, /* Big endian aes key(aes-128 key LSB) */
.aesKey4 = 0, /* Big endian aes key */
.aesKey5 = 0, /* Big endian aes key */
.aesKey6 = 0, /* Big endian aes key */
.aesKey7 = 0 /* Big endian aes key(aes-256 key LSB) */
};
Sec_Eng_AES_Enable_Link(aesId);
puts("[CTR] AES-128-CTR case...\r\n");
printf("[CTR] IV Status Initial, %08lx\r\n", linkCfg.aesSrcAddr);
_dump_iv_status(&linkCfg);
Sec_Eng_AES_Link_Work(aesId, (uint32_t)&linkCfg, &(aesSrcBuf_data[0]), 32, aesDstBuf);
Aes_Compare_Data(aesResult_entrypted_ctr_128, (uint8_t*)linkCfg.aesDstAddr, 32);
printf("[CTR] IV Status After %08lx\r\n", linkCfg.aesSrcAddr);
_dump_iv_status(&linkCfg);
Sec_Eng_AES_Link_Work(aesId, (uint32_t)&linkCfg, &(aesSrcBuf_data[0]) + 32, 16, aesDstBuf);
Aes_Compare_Data(&(aesResult_entrypted_ctr_128[0]) + 32, (uint8_t*)linkCfg.aesDstAddr, 16);
printf("[CTR] IV Status After %08lx\r\n", linkCfg.aesSrcAddr);
_dump_iv_status(&linkCfg);
Sec_Eng_AES_Link_Work(aesId, (uint32_t)&linkCfg, &(aesSrcBuf_data[0]) + 48, 16, aesDstBuf);
Aes_Compare_Data(&(aesResult_entrypted_ctr_128[0]) + 48, (uint8_t*)linkCfg.aesDstAddr, 16);
printf("[CTR] IV Status After, %08lx\r\n", linkCfg.aesSrcAddr);
_dump_iv_status(&linkCfg);
Sec_Eng_AES_Disable_Link(aesId);
}
void Sec_Eng_AES_Link_Case_ECB_128(SEC_ENG_AES_ID_Type aesId)
{
uint8_t aesDstBuf[32];
static const uint8_t aesResult_entrypted_ecb_128[] =
{
0x3a, 0xd7, 0x7b, 0xb4, 0x0d, 0x7a, 0x36, 0x60, 0xa8, 0x9e, 0xca, 0xf3, 0x24, 0x66, 0xef, 0x97,
0x3a, 0xd7, 0x7b, 0xb4, 0x0d, 0x7a, 0x36, 0x60, 0xa8, 0x9e, 0xca, 0xf3, 0x24, 0x66, 0xef, 0x97,
0x3a, 0xd7, 0x7b, 0xb4, 0x0d, 0x7a, 0x36, 0x60, 0xa8, 0x9e, 0xca, 0xf3, 0x24, 0x66, 0xef, 0x97,
0x3a, 0xd7, 0x7b, 0xb4, 0x0d, 0x7a, 0x36, 0x60, 0xa8, 0x9e, 0xca, 0xf3, 0x24, 0x66, 0xef, 0x97,
};
SEC_Eng_AES_Link_Config_Type linkCfg = {
.aesMode = SEC_ENG_AES_KEY_128BITS, /* 128-bit key mode select */
.aesDecEn = SEC_ENG_AES_ENCRYPTION, /* Encode */
.aesDecKeySel = SEC_ENG_AES_USE_NEW, /* Use new key */
.aesIntClr = 0, /* Not clear intrrupt */
.aesIntSet = 1, /* Not set interrupt */
.aesBlockMode = SEC_ENG_AES_ECB, /* CTR mode select */
.aesIVSel = SEC_ENG_AES_USE_NEW, /* Use new iv */
.aesMsgLen = 1, /* Number of 128-bit block */
.aesSrcAddr = 0, /* Message source address */
.aesDstAddr = 0, /* Message destination address */
.aesIV0 = 0xf3f2f1f0, /* Big endian initial vector(MSB) */
.aesIV1 = 0xf7f6f5f4, /* Big endian initial vector */
.aesIV2 = 0xfbfaf9f8, /* Big endian initial vector */
.aesIV3 = 0xfffefdfc, /* Big endian initial vector(LSB)(CTR mode:counter initial value) */
.aesKey0 = 0x16157e2b, /* Big endian aes key(aes-128/256 key MSB) */
.aesKey1 = 0xa6d2ae28, /* Big endian aes key */
.aesKey2 = 0x8815f7ab, /* Big endian aes key */
.aesKey3 = <KEY>, /* Big endian aes key(aes-128 key LSB) */
.aesKey4 = 0, /* Big endian aes key */
.aesKey5 = 0, /* Big endian aes key */
.aesKey6 = 0, /* Big endian aes key */
.aesKey7 = 0 /* Big endian aes key(aes-256 key LSB) */
};
puts("[ECB] AES-128-ECB case...\r\n");
Sec_Eng_AES_Enable_Link(aesId);
Sec_Eng_AES_Link_Work(aesId, (uint32_t)&linkCfg, &(aesSrcBuf_data[0]), 32, aesDstBuf);
Aes_Compare_Data(aesResult_entrypted_ecb_128, (uint8_t*)linkCfg.aesDstAddr, 32);
Sec_Eng_AES_Link_Work(aesId, (uint32_t)&linkCfg, &(aesSrcBuf_data[0]) + 32, 16, aesDstBuf);
Aes_Compare_Data(&(aesResult_entrypted_ecb_128[0]) + 32, (uint8_t*)linkCfg.aesDstAddr, 16);
Sec_Eng_AES_Link_Work(aesId, (uint32_t)&linkCfg, &(aesSrcBuf_data[0]) + 48, 16, aesDstBuf);
Aes_Compare_Data(&(aesResult_entrypted_ecb_128[0]) + 48, (uint8_t*)linkCfg.aesDstAddr, 16);
Sec_Eng_AES_Disable_Link(aesId);
}
int bl_sec_aes_init(void)
{
Sec_Eng_AES_Enable_BE(SEC_ENG_AES_ID0);
return 0;
}
int bl_sec_aes_test(void)
{
bl_irq_register(SEC_AES_IRQn, bl_sec_aes_IRQHandler);
bl_irq_enable(SEC_AES_IRQn);
puts("^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^\r\n");
Sec_Eng_AES_Link_Case_CBC_128(SEC_ENG_AES_ID0);
puts("####################################################################################\r\n");
Sec_Eng_AES_Link_Case_CTR_128(SEC_ENG_AES_ID0);
puts("####################################################################################\r\n");
Sec_Eng_AES_Link_Case_ECB_128(SEC_ENG_AES_ID0);
puts("------------------------------------------------------------------------------------\r\n");
return 0;
}
static void _clear_aes_int()
{
uint32_t AESx = SEC_ENG_BASE;
uint32_t val;
val = BL_RD_REG(AESx, SEC_ENG_SE_AES_0_CTRL);
val = BL_SET_REG_BIT(val, SEC_ENG_SE_AES_0_INT_CLR_1T);
BL_WR_REG(AESx, SEC_ENG_SE_AES_0_CTRL, val);
}
void bl_sec_aes_IRQHandler(void)
{
puts("--->>> AES IRQ\r\n");
_clear_aes_int();
}
|
mkroman/bl602-604
|
components/network/ble/blestack/src/common/utils.c
|
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdint.h>
#include <stddef.h>
#include <stdlib.h>
#include <string.h>
void co_skip_delimits(const char **ptr, char delimits)
{
while(**ptr == delimits)(*ptr)++;
}
void co_get_bytearray_from_string(char** params, uint8_t *result, int array_size)
{
int i = 0;
char rand[3];
co_skip_delimits((const char **)params, ' ');
for(i=0; i < array_size; i++){
strncpy(rand, (const char*)*params, 2);
rand[2]='\0';
result[i] = strtol(rand, NULL, 16);
*params = *params + 2;
}
}
void co_get_uint16_from_string(char** params, uint16_t *result)
{
uint8_t ret_array[2];
co_get_bytearray_from_string(params, ret_array, 2);
*result = (ret_array[0]<<8)|ret_array[1];
}
void co_get_uint32_from_string(char** params, uint32_t *result)
{
uint8_t ret_array[4];
co_get_bytearray_from_string(params, ret_array, 4);
*result = (ret_array[0]<<24)|(ret_array[1]<<16)|(ret_array[2]<<8)|ret_array[3];
}
void co_reverse_bytearray(uint8_t *src, uint8_t *result, int array_size)
{
for(int i=0; i < array_size;i++){
result[array_size - i -1] = src[i];
}
}
unsigned int find_msb_set(uint32_t data)
{
uint32_t count = 0;
uint32_t mask = 0x80000000;
if (!data) {
return 0;
}
while ((data & mask) == 0) {
count += 1u;
mask = mask >> 1u;
}
return (32 - count);
}
unsigned int find_lsb_set(uint32_t data)
{
uint32_t count = 0;
uint32_t mask = 0x00000001;
if (!data) {
return 0;
}
while ((data & mask) == 0) {
count += 1u;
mask = mask << 1u;
}
return (1 + count);
}
|
mkroman/bl602-604
|
components/network/ble/blestack/src/common/include/work_q.h
|
<reponame>mkroman/bl602-604
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef WORK_Q_H
#define WORK_Q_H
#include "atomic.h"
#include "zephyr.h"
#if defined(BFLB_BLE)
struct k_work_q {
struct k_fifo fifo;
};
typedef struct{
bl_timer_t timer;
struct k_delayed_work *delay_work;
}timer_rec_d;
int k_work_q_start();
enum {
K_WORK_STATE_PENDING,
};
struct k_work;
/* work define*/
typedef void (*k_work_handler_t)(struct k_work *work);
struct k_work {
void *_reserved;
k_work_handler_t handler;
atomic_t flags[1];
};
#define _K_WORK_INITIALIZER(work_handler) \
{ \
._reserved = NULL, \
.handler = work_handler, \
.flags = { 0 } \
}
#define K_WORK_INITIALIZER __DEPRECATED_MACRO _K_WORK_INITIALIZER
int k_work_init(struct k_work *work, k_work_handler_t handler);
void k_work_submit(struct k_work *work);
/*delay work define*/
struct k_delayed_work {
struct k_work work;
struct k_work_q *work_q;
k_timer_t timer;
};
void k_delayed_work_init(struct k_delayed_work *work, k_work_handler_t handler);
int k_delayed_work_submit(struct k_delayed_work *work, uint32_t delay);
int k_delayed_work_cancel(struct k_delayed_work *work);
s32_t k_delayed_work_remaining_get(struct k_delayed_work *work);
void k_delayed_work_del_timer(struct k_delayed_work *work);
int add_timer_record(struct k_delayed_work *delay_work);
timer_rec_d *get_timer_record(void *hdl);
int remv_timer_record(struct k_delayed_work *delay_work);
#endif
#endif /* WORK_Q_H */
|
mkroman/bl602-604
|
components/network/ble/blestack/src/profiles/oad/oad_service.c
|
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "byteorder.h"
#include "oad_service.h"
#include "oad.h"
oad_upper_recv_cb upper_recv_cb;
static int oad_recv(struct bt_conn *conn,
const struct bt_gatt_attr *attr, const void *buf,
u16_t len, u16_t offset, u8_t flags)
{
(upper_recv_cb)(conn, buf, len);
return 0;
}
static ssize_t oad_ccc_write(struct bt_conn *conn,
const struct bt_gatt_attr *attr,
const void *buf, u16_t len,
u16_t offset, u8_t flags)
{
uint16_t *value = attr->user_data;
if(len != sizeof(*value)){
return BT_GATT_ERR(BT_ATT_ERR_INVALID_ATTRIBUTE_LEN);
}
*value = sys_get_le16(buf);
return len;
}
static ssize_t oad_ccc_read(struct bt_conn *conn,
const struct bt_gatt_attr *attr,
void *buf, u16_t len, u16_t offset)
{
u16_t *value = attr->user_data;
return bt_gatt_attr_read(conn, attr, buf, len, offset, value,
sizeof(*value));
}
static struct bt_gatt_attr oad_attrs[] = {
BT_GATT_PRIMARY_SERVICE(BT_UUID_OAD),
BT_GATT_CHARACTERISTIC(BT_UUID_OAD_DATA_IN,
BT_GATT_CHRC_WRITE_WITHOUT_RESP,
BT_GATT_PERM_WRITE, NULL, oad_recv, NULL),
BT_GATT_CHARACTERISTIC(BT_UUID_OAD_DATA_OUT,
BT_GATT_CHRC_NOTIFY,BT_GATT_PERM_NONE,
NULL, NULL, NULL),
BT_GATT_DESCRIPTOR(BT_UUID_GATT_CCC, BT_GATT_PERM_READ | BT_GATT_PERM_WRITE,
oad_ccc_read, oad_ccc_write, 0),
};
static struct bt_gatt_service oad_svc = BT_GATT_SERVICE(oad_attrs);
void bt_oad_notify(struct bt_conn *conn, const void *data, u16_t len)
{
bt_gatt_notify(conn, &oad_attrs[2], data, len);
}
void bt_oad_register_callback(oad_upper_recv_cb cb)
{
upper_recv_cb = cb;
}
void bt_oad_service_enable(void)
{
bt_gatt_service_register(&oad_svc);
}
void bt_oad_service_disable(void)
{
bt_gatt_service_unregister(&oad_svc);
}
|
mkroman/bl602-604
|
components/bl602/bl602_std/bl602_std/StdDriver/Src/bl602_ir.c
|
<gh_stars>0
/**
******************************************************************************
* @file bl602_ir.c
* @version V1.0
* @date
* @brief This file is the standard driver c file
******************************************************************************
* @attention
*
* <h2><center>© COPYRIGHT(c) 2020 Bouffalo Lab</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
#include "bl602_ir.h"
#include "bl602_glb.h"
/** @addtogroup BL602_Peripheral_Driver
* @{
*/
/** @addtogroup IR
* @{
*/
/** @defgroup IR_Private_Macros
* @{
*/
#define NEC_HEAD_H_MIN 17000
#define NEC_HEAD_H_MAX 19000
#define NEC_HEAD_L_MIN 8400
#define NEC_HEAD_L_MAX 9600
#define NEC_BIT0_H_MIN 525
#define NEC_BIT0_H_MAX 1725
#define RC5_ONE_PLUSE_MIN 1175
#define RC5_ONE_PLUSE_MAX 2375
#define RC5_TWO_PLUSE_MIN 2955
#define RC5_TWO_PLUSE_MAX 4155
#define IR_TX_INT_TIMEOUT_COUNT (100*160*1000)
#define IR_RX_INT_TIMEOUT_COUNT (100*160*1000)
/*@} end of group IR_Private_Macros */
/** @defgroup IR_Private_Types
* @{
*/
/*@} end of group IR_Private_Types */
/** @defgroup IR_Private_Variables
* @{
*/
static intCallback_Type * irIntCbfArra[IR_INT_ALL]= {NULL,NULL};
/*@} end of group IR_Private_Variables */
/** @defgroup IR_Global_Variables
* @{
*/
/*@} end of group IR_Global_Variables */
/** @defgroup IR_Private_Fun_Declaration
* @{
*/
/*@} end of group IR_Private_Fun_Declaration */
/** @defgroup IR_Private_Functions
* @{
*/
/*@} end of group IR_Private_Functions */
/** @defgroup IR_Public_Functions
* @{
*/
/****************************************************************************//**
* @brief IR RX IRQ handler function
*
* @param None
*
* @return None
*
*******************************************************************************/
#ifndef BL602_USE_HAL_DRIVER
void __IRQ IRRX_IRQHandler(void)
{
uint32_t tmpVal;
tmpVal = BL_RD_REG(IR_BASE,IRRX_INT_STS);
if(BL_IS_REG_BIT_SET(tmpVal,IRRX_END_INT) && !BL_IS_REG_BIT_SET(tmpVal,IR_CR_IRRX_END_MASK)){
BL_WR_REG(IR_BASE,IRRX_INT_STS,BL_SET_REG_BIT(tmpVal,IR_CR_IRRX_END_CLR));
if(irIntCbfArra[IR_INT_RX] != NULL){
irIntCbfArra[IR_INT_RX]();
}
}
}
#endif
/****************************************************************************//**
* @brief IR TX IRQ handler function
*
* @param None
*
* @return None
*
*******************************************************************************/
#ifndef BL602_USE_HAL_DRIVER
void __IRQ IRTX_IRQHandler(void)
{
uint32_t tmpVal;
tmpVal = BL_RD_REG(IR_BASE,IRTX_INT_STS);
if(BL_IS_REG_BIT_SET(tmpVal,IRTX_END_INT) && !BL_IS_REG_BIT_SET(tmpVal,IR_CR_IRTX_END_MASK)){
BL_WR_REG(IR_BASE,IRTX_INT_STS,BL_SET_REG_BIT(tmpVal,IR_CR_IRTX_END_CLR));
if(irIntCbfArra[IR_INT_TX] != NULL){
irIntCbfArra[IR_INT_TX]();
}
}
}
#endif
/****************************************************************************//**
* @brief IR tx initialization function
*
* @param irTxCfg: IR tx configuration structure pointer
*
* @return SUCCESS
*
*******************************************************************************/
BL_Err_Type IR_TxInit(IR_TxCfg_Type *irTxCfg)
{
uint32_t tmpVal;
tmpVal = BL_RD_REG(IR_BASE,IRTX_CONFIG);
/* Set data bit */
tmpVal = BL_SET_REG_BITS_VAL(tmpVal,IR_CR_IRTX_DATA_NUM,irTxCfg->dataBits-1);
/* Set tail pulse */
ENABLE == irTxCfg->tailPulseInverse ? (tmpVal=BL_SET_REG_BIT(tmpVal,IR_CR_IRTX_TAIL_HL_INV)):(tmpVal=BL_CLR_REG_BIT(tmpVal,IR_CR_IRTX_TAIL_HL_INV));
ENABLE == irTxCfg->tailPulse ? (tmpVal=BL_SET_REG_BIT(tmpVal,IR_CR_IRTX_TAIL_EN)):(tmpVal=BL_CLR_REG_BIT(tmpVal,IR_CR_IRTX_TAIL_EN));
/* Set head pulse */
ENABLE == irTxCfg->headPulseInverse ? (tmpVal=BL_SET_REG_BIT(tmpVal,IR_CR_IRTX_HEAD_HL_INV)):(tmpVal=BL_CLR_REG_BIT(tmpVal,IR_CR_IRTX_HEAD_HL_INV));
ENABLE == irTxCfg->headPulse ? (tmpVal=BL_SET_REG_BIT(tmpVal,IR_CR_IRTX_HEAD_EN)):(tmpVal=BL_CLR_REG_BIT(tmpVal,IR_CR_IRTX_HEAD_EN));
/* Enable or disable logic 1 and 0 pulse inverse */
ENABLE == irTxCfg->logic1PulseInverse ? (tmpVal=BL_SET_REG_BIT(tmpVal,IR_CR_IRTX_LOGIC1_HL_INV)):(tmpVal=BL_CLR_REG_BIT(tmpVal,IR_CR_IRTX_LOGIC1_HL_INV));
ENABLE == irTxCfg->logic0PulseInverse ? (tmpVal=BL_SET_REG_BIT(tmpVal,IR_CR_IRTX_LOGIC0_HL_INV)):(tmpVal=BL_CLR_REG_BIT(tmpVal,IR_CR_IRTX_LOGIC0_HL_INV));
/* Enable or disable data pulse */
ENABLE == irTxCfg->dataPulse ? (tmpVal=BL_SET_REG_BIT(tmpVal,IR_CR_IRTX_DATA_EN)):(tmpVal=BL_CLR_REG_BIT(tmpVal,IR_CR_IRTX_DATA_EN));
/* Enable or disable output modulation */
ENABLE == irTxCfg->outputModulation ? (tmpVal=BL_SET_REG_BIT(tmpVal,IR_CR_IRTX_MOD_EN)):(tmpVal=BL_CLR_REG_BIT(tmpVal,IR_CR_IRTX_MOD_EN));
/* Enable or disable output inverse */
ENABLE == irTxCfg->outputInverse ? (tmpVal=BL_SET_REG_BIT(tmpVal,IR_CR_IRTX_OUT_INV)):(tmpVal=BL_CLR_REG_BIT(tmpVal,IR_CR_IRTX_OUT_INV));
/* Write back */
BL_WR_REG(IR_BASE,IRTX_CONFIG,tmpVal);
return SUCCESS;
}
/****************************************************************************//**
* @brief IR tx pulse width configure function
*
* @param irTxPulseWidthCfg: IR tx pulse width configuration structure pointer
*
* @return SUCCESS
*
*******************************************************************************/
BL_Err_Type IR_TxPulseWidthConfig(IR_TxPulseWidthCfg_Type *irTxPulseWidthCfg)
{
uint32_t tmpVal;
tmpVal = BL_RD_REG(IR_BASE,IRTX_PW);
/* Set logic 0 pulse phase 0 width */
tmpVal = BL_SET_REG_BITS_VAL(tmpVal,IR_CR_IRTX_LOGIC0_PH0_W,irTxPulseWidthCfg->logic0PulseWidth_0-1);
/* Set logic 0 pulse phase 1 width */
tmpVal = BL_SET_REG_BITS_VAL(tmpVal,IR_CR_IRTX_LOGIC0_PH1_W,irTxPulseWidthCfg->logic0PulseWidth_1-1);
/* Set logic 1 pulse phase 0 width */
tmpVal = BL_SET_REG_BITS_VAL(tmpVal,IR_CR_IRTX_LOGIC1_PH0_W,irTxPulseWidthCfg->logic1PulseWidth_0-1);
/* Set logic 1 pulse phase 1 width */
tmpVal = BL_SET_REG_BITS_VAL(tmpVal,IR_CR_IRTX_LOGIC1_PH1_W,irTxPulseWidthCfg->logic1PulseWidth_1-1);
/* Set head pulse phase 0 width */
tmpVal = BL_SET_REG_BITS_VAL(tmpVal,IR_CR_IRTX_HEAD_PH0_W,irTxPulseWidthCfg->headPulseWidth_0-1);
/* Set head pulse phase 1 width */
tmpVal = BL_SET_REG_BITS_VAL(tmpVal,IR_CR_IRTX_HEAD_PH1_W,irTxPulseWidthCfg->headPulseWidth_1-1);
/* Set tail pulse phase 0 width */
tmpVal = BL_SET_REG_BITS_VAL(tmpVal,IR_CR_IRTX_TAIL_PH0_W,irTxPulseWidthCfg->tailPulseWidth_0-1);
/* Set tail pulse phase 1 width */
tmpVal = BL_SET_REG_BITS_VAL(tmpVal,IR_CR_IRTX_TAIL_PH1_W,irTxPulseWidthCfg->tailPulseWidth_1-1);
BL_WR_REG(IR_BASE,IRTX_PW,tmpVal);
tmpVal = BL_RD_REG(IR_BASE,IRTX_PULSE_WIDTH);
/* Set modulation phase 0 width */
tmpVal = BL_SET_REG_BITS_VAL(tmpVal,IR_CR_IRTX_MOD_PH0_W,irTxPulseWidthCfg->moduWidth_0-1);
/* Set modulation phase 1 width */
tmpVal = BL_SET_REG_BITS_VAL(tmpVal,IR_CR_IRTX_MOD_PH1_W,irTxPulseWidthCfg->moduWidth_1-1);
/* Set pulse width unit */
tmpVal = BL_SET_REG_BITS_VAL(tmpVal,IR_CR_IRTX_PW_UNIT,irTxPulseWidthCfg->pulseWidthUnit-1);
BL_WR_REG(IR_BASE,IRTX_PULSE_WIDTH,tmpVal);
return SUCCESS;
}
/****************************************************************************//**
* @brief IR tx software mode pulse width(multiples of pulse width unit) configure function
*
* @param irTxSWMPulseWidthCfg: IR tx software mode pulse width configuration structure pointer
*
* @return SUCCESS
*
*******************************************************************************/
BL_Err_Type IR_TxSWMPulseWidthConfig(IR_TxSWMPulseWidthCfg_Type *irTxSWMPulseWidthCfg)
{
/* Set swm pulse width,multiples of pulse width unit */
BL_WR_REG(IR_BASE,IRTX_SWM_PW_0,irTxSWMPulseWidthCfg->swmData0);
BL_WR_REG(IR_BASE,IRTX_SWM_PW_1,irTxSWMPulseWidthCfg->swmData1);
BL_WR_REG(IR_BASE,IRTX_SWM_PW_2,irTxSWMPulseWidthCfg->swmData2);
BL_WR_REG(IR_BASE,IRTX_SWM_PW_3,irTxSWMPulseWidthCfg->swmData3);
BL_WR_REG(IR_BASE,IRTX_SWM_PW_4,irTxSWMPulseWidthCfg->swmData4);
BL_WR_REG(IR_BASE,IRTX_SWM_PW_5,irTxSWMPulseWidthCfg->swmData5);
BL_WR_REG(IR_BASE,IRTX_SWM_PW_6,irTxSWMPulseWidthCfg->swmData6);
BL_WR_REG(IR_BASE,IRTX_SWM_PW_7,irTxSWMPulseWidthCfg->swmData7);
return SUCCESS;
}
/****************************************************************************//**
* @brief IR rx initialization function
*
* @param irRxCfg: IR rx configuration structure pointer
*
* @return SUCCESS
*
*******************************************************************************/
BL_Err_Type IR_RxInit(IR_RxCfg_Type *irRxCfg)
{
uint32_t tmpVal;
/* Check the parameters */
CHECK_PARAM(IS_IR_RXMODE_TYPE(irRxCfg->rxMode));
tmpVal = BL_RD_REG(IR_BASE,IRRX_CONFIG);
/* Set rx mode */
switch(irRxCfg->rxMode)
{
case IR_RX_NEC:
tmpVal = BL_SET_REG_BITS_VAL(tmpVal,IR_CR_IRRX_MODE,0x0);
break;
case IR_RX_RC5:
tmpVal = BL_SET_REG_BITS_VAL(tmpVal,IR_CR_IRRX_MODE,0x1);
break;
case IR_RX_SWM:
tmpVal = BL_SET_REG_BITS_VAL(tmpVal,IR_CR_IRRX_MODE,0x2);
break;
default:
break;
}
/* Enable or disable input inverse */
ENABLE == irRxCfg->inputInverse ? (tmpVal=BL_SET_REG_BIT(tmpVal,IR_CR_IRRX_IN_INV)):(tmpVal=BL_CLR_REG_BIT(tmpVal,IR_CR_IRRX_IN_INV));
/* Enable or disable rx input de-glitch function */
ENABLE == irRxCfg->rxDeglitch ? (tmpVal=BL_SET_REG_BIT(tmpVal,IR_CR_IRRX_DEG_EN)):(tmpVal=BL_CLR_REG_BIT(tmpVal,IR_CR_IRRX_DEG_EN));
/* Set de-glitch function cycle count */
tmpVal = BL_SET_REG_BITS_VAL(tmpVal,IR_CR_IRRX_DEG_CNT,irRxCfg->DeglitchCnt);
/* Write back */
BL_WR_REG(IR_BASE,IRRX_CONFIG,tmpVal);
tmpVal = BL_RD_REG(IR_BASE,IRRX_PW_CONFIG);
/* Set pulse width threshold to trigger end condition */
tmpVal = BL_SET_REG_BITS_VAL(tmpVal,IR_CR_IRRX_END_TH,irRxCfg->endThreshold-1);
/* Set pulse width threshold for logic0/1 detection */
tmpVal = BL_SET_REG_BITS_VAL(tmpVal,IR_CR_IRRX_DATA_TH,irRxCfg->dataThreshold-1);
/* Write back */
BL_WR_REG(IR_BASE,IRRX_PW_CONFIG,tmpVal);
return SUCCESS;
}
/****************************************************************************//**
* @brief IR set default value of all registers function
*
* @param None
*
* @return SUCCESS
*
*******************************************************************************/
BL_Err_Type IR_DeInit(void)
{
GLB_AHB_Slave1_Reset(BL_AHB_SLAVE1_IRR);
return SUCCESS;
}
/****************************************************************************//**
* @brief IR enable function
*
* @param direct: IR direction type
*
* @return SUCCESS
*
*******************************************************************************/
BL_Err_Type IR_Enable(IR_Direction_Type direct)
{
uint32_t tmpVal;
/* Check the parameters */
CHECK_PARAM(IS_IR_DIRECTION_TYPE(direct));
if(direct == IR_TX || direct == IR_TXRX){
/* Enable ir tx unit */
tmpVal = BL_RD_REG(IR_BASE,IRTX_CONFIG);
BL_WR_REG(IR_BASE,IRTX_CONFIG,BL_SET_REG_BIT(tmpVal,IR_CR_IRTX_EN));
}
if(direct == IR_RX || direct == IR_TXRX){
/* Enable ir rx unit */
tmpVal = BL_RD_REG(IR_BASE,IRRX_CONFIG);
BL_WR_REG(IR_BASE,IRRX_CONFIG,BL_SET_REG_BIT(tmpVal,IR_CR_IRRX_EN));
}
return SUCCESS;
}
/****************************************************************************//**
* @brief IR disable function
*
* @param direct: IR direction type
*
* @return SUCCESS
*
*******************************************************************************/
BL_Err_Type IR_Disable(IR_Direction_Type direct)
{
uint32_t tmpVal;
/* Check the parameters */
CHECK_PARAM(IS_IR_DIRECTION_TYPE(direct));
if(direct == IR_TX || direct == IR_TXRX){
/* Disable ir tx unit */
tmpVal = BL_RD_REG(IR_BASE,IRTX_CONFIG);
BL_WR_REG(IR_BASE,IRTX_CONFIG,BL_CLR_REG_BIT(tmpVal,IR_CR_IRTX_EN));
}
if(direct == IR_RX || direct == IR_TXRX){
/* Disable ir rx unit */
tmpVal = BL_RD_REG(IR_BASE,IRRX_CONFIG);
BL_WR_REG(IR_BASE,IRRX_CONFIG,BL_CLR_REG_BIT(tmpVal,IR_CR_IRRX_EN));
}
return SUCCESS;
}
/****************************************************************************//**
* @brief IR tx software mode enable or disable function
*
* @param txSWM: Enable or disable
*
* @return SUCCESS
*
*******************************************************************************/
BL_Err_Type IR_TxSWM(BL_Fun_Type txSWM)
{
uint32_t tmpVal;
/* Enable or disable tx swm */
tmpVal = BL_RD_REG(IR_BASE,IRTX_CONFIG);
if(ENABLE == txSWM){
BL_WR_REG(IR_BASE,IRTX_CONFIG,BL_SET_REG_BIT(tmpVal,IR_CR_IRTX_SWM_EN));
}else{
BL_WR_REG(IR_BASE,IRTX_CONFIG,BL_CLR_REG_BIT(tmpVal,IR_CR_IRTX_SWM_EN));
}
return SUCCESS;
}
/****************************************************************************//**
* @brief IR clear rx fifo function
*
* @param None
*
* @return SUCCESS
*
*******************************************************************************/
BL_Err_Type IR_RxFIFOClear(void)
{
uint32_t tmpVal;
/* Clear rx fifo */
tmpVal = BL_RD_REG(IR_BASE,IRRX_SWM_FIFO_CONFIG_0);
BL_WR_REG(IR_BASE,IRRX_SWM_FIFO_CONFIG_0,BL_SET_REG_BIT(tmpVal,IR_RX_FIFO_CLR));
return SUCCESS;
}
/****************************************************************************//**
* @brief IR send data function
*
* @param irWord: IR tx data word 0 or 1
* @param data: data to send
*
* @return SUCCESS
*
*******************************************************************************/
BL_Err_Type IR_SendData(IR_Word_Type irWord,uint32_t data)
{
/* Check the parameters */
CHECK_PARAM(IS_IR_WORD_TYPE(irWord));
/* Write word 0 or word 1 */
if(IR_WORD_0 == irWord){
BL_WR_REG(IR_BASE,IRTX_DATA_WORD0,data);
}
else{
BL_WR_REG(IR_BASE,IRTX_DATA_WORD1,data);
}
return SUCCESS;
}
/****************************************************************************//**
* @brief IR software mode send pulse width data function
*
* @param data: data to send
* @param length: Length of send buffer
*
* @return SUCCESS
*
*******************************************************************************/
BL_Err_Type IR_SWMSendData(uint16_t *data,uint8_t length)
{
uint8_t i = 0,j = 0;
uint16_t minData = data[0];
uint32_t tmpVal;
uint32_t pwVal = 0;
uint32_t count = (length+7)/8;
/* Search for min value */
for(i=1;i<length;i++){
if(minData>data[i] && data[i]!=0){
minData = data[i];
}
}
/* Set pulse width unit */
tmpVal = BL_RD_REG(IR_BASE,IRTX_PULSE_WIDTH);
BL_WR_REG(IR_BASE,IRTX_PULSE_WIDTH,BL_SET_REG_BITS_VAL(tmpVal,IR_CR_IRTX_PW_UNIT,minData));
/* Set tx SWM pulse width data as multiples of pulse width unit */
for(i=0;i<count;i++){
pwVal = 0;
if(i<count-1){
for(j=0;j<8;j++){
tmpVal = ((2*data[j+i*8]+minData)/(2*minData)-1)&0xf;
pwVal |= tmpVal<<(4*j);
}
*(volatile uint32_t*)(IR_BASE+IRTX_SWM_PW_0_OFFSET+i*4) = pwVal;
}else{
for(j=0;j<length%8;j++){
tmpVal = ((2*data[j+i*8]+minData)/(2*minData)-1)&0xf;
pwVal |= tmpVal<<(4*j);
}
*(volatile uint32_t*)(IR_BASE+IRTX_SWM_PW_0_OFFSET+i*4) = pwVal;
}
}
return SUCCESS;
}
/****************************************************************************//**
* @brief IR send command function
*
* @param word1: IR send data word 1
* @param word0: IR send data word 0
*
* @return SUCCESS
*
*******************************************************************************/
BL_Err_Type IR_SendCommand(uint32_t word1,uint32_t word0)
{
uint32_t timeoutCnt = IR_TX_INT_TIMEOUT_COUNT;
/* Write data */
IR_SendData(IR_WORD_1,word1);
IR_SendData(IR_WORD_0,word0);
/* Mask tx interrupt */
IR_IntMask(IR_INT_TX,MASK);
/* Clear tx interrupt */
IR_ClrIntStatus(IR_INT_TX);
/* Enable ir tx */
IR_Enable(IR_TX);
/* Wait for tx interrupt */
while(SET != IR_GetIntStatus(IR_INT_TX)){
timeoutCnt--;
if(timeoutCnt == 0){
IR_Disable(IR_TX);
return TIMEOUT;
}
}
/* Disable ir tx */
IR_Disable(IR_TX);
/* Clear tx interrupt */
IR_ClrIntStatus(IR_INT_TX);
return SUCCESS;
}
/****************************************************************************//**
* @brief IR send command in software mode function
*
* @param data: IR fifo data to send
* @param length: Length of data
*
* @return SUCCESS
*
*******************************************************************************/
BL_Err_Type IR_SWMSendCommand(uint16_t* data,uint8_t length)
{
uint32_t timeoutCnt = IR_TX_INT_TIMEOUT_COUNT;
/* Write fifo */
IR_SWMSendData(data,length);
/* Mask tx interrupt */
IR_IntMask(IR_INT_TX,MASK);
/* Clear tx interrupt */
IR_ClrIntStatus(IR_INT_TX);
/* Enable ir tx */
IR_Enable(IR_TX);
/* Wait for tx interrupt */
while(SET != IR_GetIntStatus(IR_INT_TX)){
timeoutCnt--;
if(timeoutCnt == 0){
IR_Disable(IR_TX);
return TIMEOUT;
}
}
/* Disable ir tx */
IR_Disable(IR_TX);
/* Clear tx interrupt */
IR_ClrIntStatus(IR_INT_TX);
return SUCCESS;
}
/****************************************************************************//**
* @brief IR interrupt mask or unmask function
*
* @param intType: IR interrupt type
* @param intMask: Mask or unmask
*
* @return SUCCESS
*
*******************************************************************************/
BL_Err_Type IR_IntMask(IR_INT_Type intType,BL_Mask_Type intMask)
{
uint32_t tmpVal;
/* Check the parameters */
CHECK_PARAM(IS_IR_INT_TYPE(intType));
if(intType == IR_INT_TX || intType == IR_INT_ALL){
/* Mask or unmask tx interrupt */
tmpVal = BL_RD_REG(IR_BASE,IRTX_INT_STS);
BL_WR_REG(IR_BASE,IRTX_INT_STS,BL_SET_REG_BITS_VAL(tmpVal,IR_CR_IRTX_END_MASK,intMask));
}
if(intType == IR_INT_RX || intType == IR_INT_ALL){
/* Mask or unmask rx interrupt */
tmpVal = BL_RD_REG(IR_BASE,IRRX_INT_STS);
BL_WR_REG(IR_BASE,IRRX_INT_STS,BL_SET_REG_BITS_VAL(tmpVal,IR_CR_IRRX_END_MASK,intMask));
}
return SUCCESS;
}
/****************************************************************************//**
* @brief Clear ir interrupt function
*
* @param intType: IR interrupt type
*
* @return SUCCESS
*
*******************************************************************************/
BL_Err_Type IR_ClrIntStatus(IR_INT_Type intType)
{
uint32_t tmpVal;
/* Check the parameters */
CHECK_PARAM(IS_IR_INT_TYPE(intType));
if(intType == IR_INT_TX || intType == IR_INT_ALL){
/* Clear tx interrupt */
tmpVal = BL_RD_REG(IR_BASE,IRTX_INT_STS);
BL_WR_REG(IR_BASE,IRTX_INT_STS,BL_SET_REG_BIT(tmpVal,IR_CR_IRTX_END_CLR));
}
if(intType == IR_INT_RX || intType == IR_INT_ALL){
/* Clear rx interrupt */
tmpVal = BL_RD_REG(IR_BASE,IRRX_INT_STS);
BL_WR_REG(IR_BASE,IRRX_INT_STS,BL_SET_REG_BIT(tmpVal,IR_CR_IRRX_END_CLR));
}
return SUCCESS;
}
/****************************************************************************//**
* @brief IR install interrupt callback function
*
* @param intType: IR interrupt type
* @param cbFun: Pointer to interrupt callback function. The type should be void (*fn)(void)
*
* @return SUCCESS
*
*******************************************************************************/
BL_Err_Type IR_Int_Callback_Install(IR_INT_Type intType,intCallback_Type *cbFun)
{
/* Check the parameters */
CHECK_PARAM(IS_IR_INT_TYPE(intType));
irIntCbfArra[intType] = cbFun;
return SUCCESS;
}
/****************************************************************************//**
* @brief IR get interrupt status function
*
* @param intType: IR int type
*
* @return IR tx or rx interrupt status
*
*******************************************************************************/
BL_Sts_Type IR_GetIntStatus(IR_INT_Type intType)
{
uint32_t tmpVal = 0;
/* Check the parameters */
CHECK_PARAM(IS_IR_INT_TYPE(intType));
/* Read tx or rx interrupt status */
if(IR_INT_TX == intType){
tmpVal = BL_RD_REG(IR_BASE,IRTX_INT_STS);
tmpVal = BL_GET_REG_BITS_VAL(tmpVal,IRTX_END_INT);
}
else if(IR_INT_RX == intType){
tmpVal = BL_RD_REG(IR_BASE,IRRX_INT_STS);
tmpVal = BL_GET_REG_BITS_VAL(tmpVal,IRRX_END_INT);
}
if(tmpVal)
{
return SET;
}else{
return RESET;
}
}
/****************************************************************************//**
* @brief IR get rx fifo underflow or overflow status function
*
* @param fifoSts: IR fifo status type
*
* @return IR rx fifo status
*
*******************************************************************************/
BL_Sts_Type IR_GetRxFIFOStatus(IR_FifoStatus_Type fifoSts)
{
uint32_t tmpVal;
/* Check the parameters */
CHECK_PARAM(IS_IR_FIFOSTATUS_TYPE(fifoSts));
/* Read rx fifo status */
tmpVal = BL_RD_REG(IR_BASE,IRRX_SWM_FIFO_CONFIG_0);
if(fifoSts == IR_RX_FIFO_UNDERFLOW){
tmpVal = BL_GET_REG_BITS_VAL(tmpVal,IR_RX_FIFO_UNDERFLOW);
}else{
tmpVal = BL_GET_REG_BITS_VAL(tmpVal,IR_RX_FIFO_OVERFLOW);
}
if(tmpVal){
return SET;
}else{
return RESET;
}
}
/****************************************************************************//**
* @brief IR receive data function
*
* @param irWord: IR rx data word 0 or 1
*
* @return Data received
*
*******************************************************************************/
uint32_t IR_ReceiveData(IR_Word_Type irWord)
{
uint32_t tmpVal;
/* Check the parameters */
CHECK_PARAM(IS_IR_WORD_TYPE(irWord));
/* Read word 0 or word 1 */
if(IR_WORD_0 == irWord){
tmpVal = BL_RD_REG(IR_BASE,IRRX_DATA_WORD0);
}
else{
tmpVal = BL_RD_REG(IR_BASE,IRRX_DATA_WORD1);
}
return tmpVal;
}
/****************************************************************************//**
* @brief IR software mode receive pulse width data function
*
* @param data: Data received
* @param length: Max length of receive buffer
*
* @return Length of datas received
*
*******************************************************************************/
uint8_t IR_SWMReceiveData(uint16_t* data,uint8_t length)
{
uint8_t rxLen = 0;
while(rxLen<length && IR_GetRxFIFOCount()>0){
/* Read data */
data[rxLen++] = BL_RD_REG(IR_BASE,IRRX_SWM_FIFO_RDATA)&0xffff;
}
return rxLen;
}
/****************************************************************************//**
* @brief IR get rx data bit count function
*
* @param None
*
* @return IR rx data bit count
*
*******************************************************************************/
uint8_t IR_GetRxDataBitCount(void)
{
uint32_t tmpVal;
/* Read rx data bit count */
tmpVal = BL_RD_REG(IR_BASE,IRRX_DATA_COUNT);
tmpVal = BL_GET_REG_BITS_VAL(tmpVal,IR_STS_IRRX_DATA_CNT);
return tmpVal;
}
/****************************************************************************//**
* @brief IR get rx fifo count function
*
* @param None
*
* @return IR rx fifo available count
*
*******************************************************************************/
uint8_t IR_GetRxFIFOCount(void)
{
uint32_t tmpVal;
/* Read rx fifo count */
tmpVal = BL_RD_REG(IR_BASE,IRRX_SWM_FIFO_CONFIG_0);
tmpVal = BL_GET_REG_BITS_VAL(tmpVal,IR_RX_FIFO_CNT);
return tmpVal;
}
/****************************************************************************//**
* @brief IR learning to set rx and tx mode function
*
* @param data: Buffer to save data
* @param length: Length of data
*
* @return Protocol type
*
*******************************************************************************/
IR_RxMode_Type IR_LearnToInit(uint32_t* data,uint8_t* length)
{
uint32_t tmpVal;
uint32_t timeoutCnt = IR_RX_INT_TIMEOUT_COUNT;
/* Disable rx,set rx in software mode and enable rx input inverse */
tmpVal = BL_RD_REG(IR_BASE,IRRX_CONFIG);
tmpVal = BL_CLR_REG_BIT(tmpVal,IR_CR_IRRX_EN);
tmpVal = BL_SET_REG_BITS_VAL(tmpVal,IR_CR_IRRX_MODE,0x2);
tmpVal = BL_SET_REG_BIT(tmpVal,IR_CR_IRRX_IN_INV);
BL_WR_REG(IR_BASE,IRRX_CONFIG,tmpVal);
/* Set pulse width threshold to trigger end condition */
tmpVal = BL_RD_REG(IR_BASE,IRRX_PW_CONFIG);
BL_WR_REG(IR_BASE,IRRX_PW_CONFIG,BL_SET_REG_BITS_VAL(tmpVal,IR_CR_IRRX_END_TH,19999));
/* Clear and mask rx interrupt */
tmpVal = BL_RD_REG(IR_BASE,IRRX_INT_STS);
tmpVal = BL_SET_REG_BIT(tmpVal,IR_CR_IRRX_END_MASK);
BL_WR_REG(IR_BASE,IRRX_INT_STS,BL_SET_REG_BIT(tmpVal,IR_CR_IRRX_END_CLR));
/* Enable rx */
tmpVal = BL_RD_REG(IR_BASE,IRRX_CONFIG);
BL_WR_REG(IR_BASE,IRRX_CONFIG,BL_SET_REG_BIT(tmpVal,IR_CR_IRRX_EN));
/* Wait for rx interrupt */
while(SET != IR_GetIntStatus(IR_INT_RX)){
timeoutCnt--;
if(timeoutCnt == 0){
IR_Disable(IR_RX);
return TIMEOUT;
}
}
/* Disable rx */
tmpVal = BL_RD_REG(IR_BASE,IRRX_CONFIG);
BL_WR_REG(IR_BASE,IRRX_CONFIG,BL_CLR_REG_BIT(tmpVal,IR_CR_IRRX_EN));
/* Clear rx interrupt */
tmpVal = BL_RD_REG(IR_BASE,IRRX_INT_STS);
BL_WR_REG(IR_BASE,IRRX_INT_STS,BL_SET_REG_BIT(tmpVal,IR_CR_IRRX_END_CLR));
/*Receive data */
*length = IR_GetRxFIFOCount();
*length = IR_SWMReceiveData((uint16_t*)data,*length);
/* Judge protocol type */
if(NEC_HEAD_H_MIN<(data[0]&0xffff)&&(data[0]&0xffff)<NEC_HEAD_H_MAX&&NEC_HEAD_L_MIN<(data[0]>>16)&&(data[0]>>16)<NEC_HEAD_L_MAX&&NEC_BIT0_H_MIN<(data[1]&0xffff)&&(data[1]&0xffff)<NEC_BIT0_H_MAX){
/* Set rx in NEC mode */
tmpVal = BL_RD_REG(IR_BASE,IRRX_CONFIG);
BL_WR_REG(IR_BASE,IRRX_CONFIG,BL_SET_REG_BITS_VAL(tmpVal,IR_CR_IRRX_MODE,0x0));
/* Set pulse width threshold to trigger end condition and pulse width threshold for logic0/1 detection */
BL_WR_REG(IR_BASE,IRRX_PW_CONFIG,0x23270d47);
/* Set tx in NEC mode */
/* Tx configure */
BL_WR_REG(IR_BASE,IRTX_CONFIG,0x1f514);
/* Set logic 0,logic 1,head and tail pulse width */
BL_WR_REG(IR_BASE,IRTX_PW,0x7f2000);
/* Set modulation phase width and pulse width unit */
BL_WR_REG(IR_BASE,IRTX_PULSE_WIDTH,0x22110464);
return IR_RX_NEC;
}
else if(RC5_ONE_PLUSE_MIN<(data[0]&0xffff)&&(data[0]&0xffff)<RC5_ONE_PLUSE_MAX&&((RC5_ONE_PLUSE_MIN<(data[0]>>16)&&(data[0]>>16)<RC5_ONE_PLUSE_MAX)||(RC5_TWO_PLUSE_MIN<(data[0]>>16)&&(data[0]>>16)<RC5_TWO_PLUSE_MAX))&& \
((RC5_ONE_PLUSE_MIN<(data[1]&0xffff)&&(data[1]&0xffff)<RC5_ONE_PLUSE_MAX)||(RC5_TWO_PLUSE_MIN<(data[1]&0xffff)&&(data[1]&0xffff)<RC5_TWO_PLUSE_MAX))){
/* Set rx in RC-5 mode */
tmpVal = BL_RD_REG(IR_BASE,IRRX_CONFIG);
BL_WR_REG(IR_BASE,IRRX_CONFIG,BL_SET_REG_BITS_VAL(tmpVal,IR_CR_IRRX_MODE,0x1));
/* Set pulse width threshold to trigger end condition and pulse width threshold for logic0/1 detection */
BL_WR_REG(IR_BASE,IRRX_PW_CONFIG,0x13870a6a);
/* Set tx in RC-5 mode */
/* Tx configure */
BL_WR_REG(IR_BASE,IRTX_CONFIG,0xc134);
/* Set logic 0,logic 1,head and tail pulse width */
BL_WR_REG(IR_BASE,IRTX_PW,0);
/* Set modulation phase width and pulse width unit */
BL_WR_REG(IR_BASE,IRTX_PULSE_WIDTH,0x221106f1);
return IR_RX_RC5;
}else if((data[0]>>16) != 0){
/* Set tx in software mode */
/* Tx configure */
BL_WR_REG(IR_BASE,IRTX_CONFIG,*length<<12 | 0xc);
/* Set modulation phase width */
BL_WR_REG(IR_BASE,IRTX_PULSE_WIDTH,0x22110000);
return IR_RX_SWM;
}else{
tmpVal = BL_RD_REG(IR_BASE,IRRX_CONFIG);
tmpVal = BL_GET_REG_BITS_VAL(tmpVal,IR_CR_IRRX_MODE);
if(tmpVal == 0){
return IR_RX_NEC;
}else if(tmpVal == 1){
return IR_RX_RC5;
}else{
return IR_RX_SWM;
}
}
}
/****************************************************************************//**
* @brief IR receive data according to mode which is learned function
*
* @param mode: Protocol type
* @param data: Buffer to save data
*
* @return Length of data
*
*******************************************************************************/
uint8_t IR_LearnToReceive(IR_RxMode_Type mode,uint32_t* data)
{
uint8_t length = 0;
uint32_t timeoutCnt = IR_RX_INT_TIMEOUT_COUNT;
/* Check the parameters */
CHECK_PARAM(IS_IR_RXMODE_TYPE(mode));
/* Disable ir rx */
IR_Disable(IR_RX);
/* Clear and mask rx interrupt */
IR_ClrIntStatus(IR_INT_RX);
IR_IntMask(IR_INT_RX,MASK);
/* Enable ir rx */
IR_Enable(IR_RX);
/* Wait for rx interrupt */
while(SET != IR_GetIntStatus(IR_INT_RX)){
timeoutCnt--;
if(timeoutCnt == 0){
IR_Disable(IR_RX);
return TIMEOUT;
}
}
/* Disable ir rx */
IR_Disable(IR_RX);
/* Clear rx interrupt */
IR_ClrIntStatus(IR_INT_RX);
/* Receive data according to mode */
if(mode == IR_RX_NEC || mode == IR_RX_RC5){
/* Get data bit count */
length = IR_GetRxDataBitCount();
data[0] = IR_ReceiveData(IR_WORD_0);
}else{
/* Get fifo count */
length = IR_GetRxFIFOCount();
length = IR_SWMReceiveData((uint16_t*)data,length);
}
return length;
}
/****************************************************************************//**
* @brief IR send data according to mode which is learned function
*
* @param mode: Protocol type
* @param data: Buffer of data to send
* @param length: Length of data
*
* @return SUCCESS
*
*******************************************************************************/
BL_Err_Type IR_LearnToSend(IR_RxMode_Type mode,uint32_t* data,uint8_t length)
{
uint32_t tmpVal;
/* Check the parameters */
CHECK_PARAM(IS_IR_RXMODE_TYPE(mode));
/* Set send length */
tmpVal = BL_RD_REG(IR_BASE,IRTX_CONFIG);
tmpVal = BL_SET_REG_BITS_VAL(tmpVal,IR_CR_IRTX_DATA_NUM,length-1);
BL_WR_REG(IR_BASE,IRTX_CONFIG,tmpVal);
if(mode == IR_RX_NEC || mode == IR_RX_RC5){
IR_SendCommand(0,data[0]);
}else{
IR_SWMSendCommand((uint16_t*)data,length);
}
return SUCCESS;
}
/*@} end of group IR_Public_Functions */
/*@} end of group IR */
/*@} end of group BL602_Peripheral_Driver */
|
mkroman/bl602-604
|
components/hal_drv/bl602_hal/hal_pwm.c
|
<reponame>mkroman/bl602-604
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <device/vfs_pwm.h>
#include <vfs_err.h>
#include <vfs_register.h>
#include <hal/soc/pwm.h>
#include <aos/kernel.h>
#include <bl_pwm.h>
#include "hal_pwm.h"
#include <libfdt.h>
#include <utils_log.h>
typedef struct pwm_priv_data {
aos_mutex_t mutex;
} pwm_priv_data_t;
static int8_t inited;
static pwm_dev_t *dev_pwm0 = NULL;
static pwm_dev_t *dev_pwm1 = NULL;
static pwm_dev_t *dev_pwm2 = NULL;
static pwm_dev_t *dev_pwm3 = NULL;
static pwm_dev_t *dev_pwm4 = NULL;
static int pwm_dev_malloc(pwm_dev_t **pdev)
{
if (*pdev) {
log_error("arg err.\r\n");
return -1;
}
*pdev = pvPortMalloc(sizeof(pwm_dev_t));
if (*pdev == 0) {
log_error("mem err.\r\n");
return -1;
}
(*pdev)->priv = NULL;
(*pdev)->priv = pvPortMalloc(sizeof(pwm_priv_data_t));
if ((*pdev)->priv == NULL) {
log_error("mem err.\r\n");
return -1;
}
return 0;
}
static void pwm_dev_setdef(pwm_dev_t **pdev, uint8_t id)
{
if (*pdev == NULL) {
log_error("mem err.\r\n");
return;
}
(*pdev)->port = id;
}
static int dev_pwm_init(uint8_t id, const char *path)
{
pwm_dev_t **pdev = NULL;
int ret;
if ((id >= 3) || (path == 0)) {
log_error("arg err.\r\n");
return -1;
}
switch (id) {
case 0:
{
pdev = &dev_pwm0;
} break;
case 1:
{
pdev = &dev_pwm1;
} break;
case 2:
{
pdev = &dev_pwm2;
} break;
case 3:
{
pdev = &dev_pwm3;
} break;
case 4:
{
pdev = &dev_pwm4;
} break;
default:
{
log_error("err.\r\n");
return -1;
} break;
}
if (pwm_dev_malloc(pdev) != 0) {
return -1;
}
pwm_dev_setdef(pdev, id);
ret = aos_register_driver(path, &pwm_ops, *pdev);
if (ret != VFS_SUCCESS) {
return ret;
}
return 0;
}
int32_t hal_pwm_init(pwm_dev_t *pwm)
{
pwm_priv_data_t *data;
data = pwm->priv;
if (aos_mutex_new(&(data->mutex))) {
/*we should assert here?*/
return -1;
}
return 0;
}
int32_t hal_pwm_finalize(pwm_dev_t *pwm)
{
pwm_priv_data_t *data;
data = pwm->priv;
aos_mutex_free(&(data->mutex));
return 0;
}
#define BL_FDT32_TO_U8(addr, byte_offset) ((uint8_t)fdt32_to_cpu(*(uint32_t *)((uint8_t *)addr + byte_offset)))
#define BL_FDT32_TO_U16(addr, byte_offset) ((uint16_t)fdt32_to_cpu(*(uint32_t *)((uint8_t *)addr + byte_offset)))
#define BL_FDT32_TO_U32(addr, byte_offset) ((uint32_t)fdt32_to_cpu(*(uint32_t *)((uint8_t *)addr + byte_offset)))
static void fdt_pwm_module_init(const void *fdt, int pwm_offset)
{
#define PWM_MODULE_MAX 5
//const char *path = "/dev/pwm0";
int offset1 = 0;
const uint32_t *addr_prop = 0;
int lentmp = 0;
const char *result = 0;
int countindex = 0;
int i;
uint8_t id;
char *path = NULL;
uint8_t pin;
uint32_t freq;
const char *pwm_node[PWM_MODULE_MAX] = {
"pwm@4000A420",
"pwm@4000A440",
"pwm@4000A460",
"pwm@4000A480",
"pwm@4000A4A0",
};
for (i = 0; i < PWM_MODULE_MAX; i++) {
offset1 = fdt_subnode_offset(fdt, pwm_offset, pwm_node[i]);
if (0 >= offset1) {
log_info("pwm[%d] %s NULL.\r\n", i, pwm_node[i]);
continue;
}
countindex = fdt_stringlist_count(fdt, offset1, "status");
if (countindex != 1) {
log_info("pwm[%d] status_countindex = %d NULL.\r\n", i, countindex);
continue;
}
result = fdt_stringlist_get(fdt, offset1, "status", 0, &lentmp);
if ((lentmp != 4) || (memcmp("okay", result, 4) != 0)) {
log_info("pwm[%d] status = %s\r\n", i, result);
continue;
}
/* set path */
countindex = fdt_stringlist_count(fdt, offset1, "path");
if (countindex != 1) {
log_info("pwm[%d] path_countindex = %d NULL.\r\n", i, countindex);
continue;
}
result = fdt_stringlist_get(fdt, offset1, "path", 0, &lentmp);
if ((lentmp < 0) || (lentmp > 32))
{
log_info("pwm[%d] path lentmp = %d\r\n", i, lentmp);
}
path = (char *)result;
/* set id */
addr_prop = fdt_getprop(fdt, offset1, "id", &lentmp);
if (addr_prop == NULL) {
log_info("pwm[%d] id NULL.\r\n", i);
continue;
}
id = BL_FDT32_TO_U8(addr_prop, 0);
/* set pin */
addr_prop = fdt_getprop(fdt, offset1, "pin", &lentmp);
if (addr_prop == NULL) {
log_info("pwm[%d] pin NULL.\r\n", i);
continue;
}
pin = BL_FDT32_TO_U8(addr_prop, 0);
/* set freq */
addr_prop = fdt_getprop(fdt, offset1, "freq", &lentmp);
if (addr_prop == NULL) {
log_info("pwm[%d] freq NULL.\r\n", i);
continue;
}
freq = BL_FDT32_TO_U32(addr_prop, 0);
log_info("path = %s, id = %d, pin = %d, freq = %ld\r\n",
path, id, pin, freq);
bl_pwm_init(id, pin, freq);
if (dev_pwm_init(id, (const char *)path) != 0) {
log_error("dev_pwm_init err.\r\n");
}
}
}
int32_t vfs_pwm_init(uint32_t fdt, uint32_t dtb_pwm_offset)
{
if (inited == 1) {
return VFS_SUCCESS;
}
fdt_pwm_module_init((const void *)fdt, (int)dtb_pwm_offset);
inited = 1;
return VFS_SUCCESS;
}
int32_t hal_pwm_start(pwm_dev_t *pwm)
{
bl_pwm_start(pwm->port);
return 0;
}
int32_t hal_pwm_stop(pwm_dev_t *pwm)
{
bl_pwm_stop(pwm->port);
return 0;
}
int32_t hal_pwm_para_chg(pwm_dev_t *pwm, pwm_config_t para)
{
return 0;
}
int32_t hal_pwm_set_duty(pwm_dev_t *pwm, float duty)
{
//log_info("set duty %d, %ld\r\n", pwm->port, (uint16_t)duty);
bl_pwm_set_duty(pwm->port, duty);
return 0;
}
int32_t hal_pwm_set_freq(pwm_dev_t *pwm, uint32_t freq)
{
log_error("not support.\r\n");
bl_pwm_set_freq(pwm->port, freq);
return 0;
}
|
mkroman/bl602-604
|
components/bl602/bl602_wifi/plf/refip/src/driver/phy/bl602_phy_rf/reg/reg_rf_epa.h
|
<gh_stars>0
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _REG_RF_EPA_H_
#define _REG_RF_EPA_H_
#include "co_int.h"
#include "arch.h"
#include "_reg_access.h"
static inline uint32_t rf_epa_vector_03_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001400);
return ((localVal & ((uint32_t)0x00000008)) >> 3);
}
static inline void rf_epa_vector_03_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001400);
localVal &= ~((uint32_t)0x00000008);
localVal |= (x << 3)&((uint32_t)0x00000008);
REG_PL_WR(0x40001400,localVal);
}
static inline uint32_t rf_epa_vector_02_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001400);
return ((localVal & ((uint32_t)0x00000004)) >> 2);
}
static inline void rf_epa_vector_02_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001400);
localVal &= ~((uint32_t)0x00000004);
localVal |= (x << 2)&((uint32_t)0x00000004);
REG_PL_WR(0x40001400,localVal);
}
static inline uint32_t rf_epa_vector_01_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001400);
return ((localVal & ((uint32_t)0x00000002)) >> 1);
}
static inline void rf_epa_vector_01_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001400);
localVal &= ~((uint32_t)0x00000002);
localVal |= (x << 1)&((uint32_t)0x00000002);
REG_PL_WR(0x40001400,localVal);
}
static inline uint32_t rf_epa_vector_00_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001400);
return ((localVal & ((uint32_t)0x00000001)) >> 0);
}
static inline void rf_epa_vector_00_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001400);
localVal &= ~((uint32_t)0x00000001);
localVal |= (x << 0)&((uint32_t)0x00000001);
REG_PL_WR(0x40001400,localVal);
}
static inline uint32_t rf_epa_rx2on_vector_03_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001404);
return ((localVal & ((uint32_t)0x00000008)) >> 3);
}
static inline void rf_epa_rx2on_vector_03_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001404);
localVal &= ~((uint32_t)0x00000008);
localVal |= (x << 3)&((uint32_t)0x00000008);
REG_PL_WR(0x40001404,localVal);
}
static inline uint32_t rf_epa_rx2on_vector_02_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001404);
return ((localVal & ((uint32_t)0x00000004)) >> 2);
}
static inline void rf_epa_rx2on_vector_02_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001404);
localVal &= ~((uint32_t)0x00000004);
localVal |= (x << 2)&((uint32_t)0x00000004);
REG_PL_WR(0x40001404,localVal);
}
static inline uint32_t rf_epa_rx2on_vector_01_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001404);
return ((localVal & ((uint32_t)0x00000002)) >> 1);
}
static inline void rf_epa_rx2on_vector_01_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001404);
localVal &= ~((uint32_t)0x00000002);
localVal |= (x << 1)&((uint32_t)0x00000002);
REG_PL_WR(0x40001404,localVal);
}
static inline uint32_t rf_epa_rx2on_vector_00_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001404);
return ((localVal & ((uint32_t)0x00000001)) >> 0);
}
static inline void rf_epa_rx2on_vector_00_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001404);
localVal &= ~((uint32_t)0x00000001);
localVal |= (x << 0)&((uint32_t)0x00000001);
REG_PL_WR(0x40001404,localVal);
}
static inline uint32_t rf_epa_rxon_vector_03_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001408);
return ((localVal & ((uint32_t)0x00000008)) >> 3);
}
static inline void rf_epa_rxon_vector_03_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001408);
localVal &= ~((uint32_t)0x00000008);
localVal |= (x << 3)&((uint32_t)0x00000008);
REG_PL_WR(0x40001408,localVal);
}
static inline uint32_t rf_epa_rxon_vector_02_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001408);
return ((localVal & ((uint32_t)0x00000004)) >> 2);
}
static inline void rf_epa_rxon_vector_02_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001408);
localVal &= ~((uint32_t)0x00000004);
localVal |= (x << 2)&((uint32_t)0x00000004);
REG_PL_WR(0x40001408,localVal);
}
static inline uint32_t rf_epa_rxon_vector_01_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001408);
return ((localVal & ((uint32_t)0x00000002)) >> 1);
}
static inline void rf_epa_rxon_vector_01_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001408);
localVal &= ~((uint32_t)0x00000002);
localVal |= (x << 1)&((uint32_t)0x00000002);
REG_PL_WR(0x40001408,localVal);
}
static inline uint32_t rf_epa_rxon_vector_00_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001408);
return ((localVal & ((uint32_t)0x00000001)) >> 0);
}
static inline void rf_epa_rxon_vector_00_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001408);
localVal &= ~((uint32_t)0x00000001);
localVal |= (x << 0)&((uint32_t)0x00000001);
REG_PL_WR(0x40001408,localVal);
}
static inline uint32_t rf_epa_tx2on_vector_03_getf(void)
{
uint32_t localVal = REG_PL_RD(0x4000140c);
return ((localVal & ((uint32_t)0x00000008)) >> 3);
}
static inline void rf_epa_tx2on_vector_03_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x4000140c);
localVal &= ~((uint32_t)0x00000008);
localVal |= (x << 3)&((uint32_t)0x00000008);
REG_PL_WR(0x4000140c,localVal);
}
static inline uint32_t rf_epa_tx2on_vector_02_getf(void)
{
uint32_t localVal = REG_PL_RD(0x4000140c);
return ((localVal & ((uint32_t)0x00000004)) >> 2);
}
static inline void rf_epa_tx2on_vector_02_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x4000140c);
localVal &= ~((uint32_t)0x00000004);
localVal |= (x << 2)&((uint32_t)0x00000004);
REG_PL_WR(0x4000140c,localVal);
}
static inline uint32_t rf_epa_tx2on_vector_01_getf(void)
{
uint32_t localVal = REG_PL_RD(0x4000140c);
return ((localVal & ((uint32_t)0x00000002)) >> 1);
}
static inline void rf_epa_tx2on_vector_01_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x4000140c);
localVal &= ~((uint32_t)0x00000002);
localVal |= (x << 1)&((uint32_t)0x00000002);
REG_PL_WR(0x4000140c,localVal);
}
static inline uint32_t rf_epa_tx2on_vector_00_getf(void)
{
uint32_t localVal = REG_PL_RD(0x4000140c);
return ((localVal & ((uint32_t)0x00000001)) >> 0);
}
static inline void rf_epa_tx2on_vector_00_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x4000140c);
localVal &= ~((uint32_t)0x00000001);
localVal |= (x << 0)&((uint32_t)0x00000001);
REG_PL_WR(0x4000140c,localVal);
}
static inline uint32_t rf_epa_tx2paon_vector_03_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001410);
return ((localVal & ((uint32_t)0x00000008)) >> 3);
}
static inline void rf_epa_tx2paon_vector_03_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001410);
localVal &= ~((uint32_t)0x00000008);
localVal |= (x << 3)&((uint32_t)0x00000008);
REG_PL_WR(0x40001410,localVal);
}
static inline uint32_t rf_epa_tx2paon_vector_02_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001410);
return ((localVal & ((uint32_t)0x00000004)) >> 2);
}
static inline void rf_epa_tx2paon_vector_02_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001410);
localVal &= ~((uint32_t)0x00000004);
localVal |= (x << 2)&((uint32_t)0x00000004);
REG_PL_WR(0x40001410,localVal);
}
static inline uint32_t rf_epa_tx2paon_vector_01_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001410);
return ((localVal & ((uint32_t)0x00000002)) >> 1);
}
static inline void rf_epa_tx2paon_vector_01_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001410);
localVal &= ~((uint32_t)0x00000002);
localVal |= (x << 1)&((uint32_t)0x00000002);
REG_PL_WR(0x40001410,localVal);
}
static inline uint32_t rf_epa_tx2paon_vector_00_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001410);
return ((localVal & ((uint32_t)0x00000001)) >> 0);
}
static inline void rf_epa_tx2paon_vector_00_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001410);
localVal &= ~((uint32_t)0x00000001);
localVal |= (x << 0)&((uint32_t)0x00000001);
REG_PL_WR(0x40001410,localVal);
}
static inline uint32_t rf_epa_txpaon_vector_03_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001414);
return ((localVal & ((uint32_t)0x00000008)) >> 3);
}
static inline void rf_epa_txpaon_vector_03_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001414);
localVal &= ~((uint32_t)0x00000008);
localVal |= (x << 3)&((uint32_t)0x00000008);
REG_PL_WR(0x40001414,localVal);
}
static inline uint32_t rf_epa_txpaon_vector_02_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001414);
return ((localVal & ((uint32_t)0x00000004)) >> 2);
}
static inline void rf_epa_txpaon_vector_02_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001414);
localVal &= ~((uint32_t)0x00000004);
localVal |= (x << 2)&((uint32_t)0x00000004);
REG_PL_WR(0x40001414,localVal);
}
static inline uint32_t rf_epa_txpaon_vector_01_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001414);
return ((localVal & ((uint32_t)0x00000002)) >> 1);
}
static inline void rf_epa_txpaon_vector_01_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001414);
localVal &= ~((uint32_t)0x00000002);
localVal |= (x << 1)&((uint32_t)0x00000002);
REG_PL_WR(0x40001414,localVal);
}
static inline uint32_t rf_epa_txpaon_vector_00_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001414);
return ((localVal & ((uint32_t)0x00000001)) >> 0);
}
static inline void rf_epa_txpaon_vector_00_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001414);
localVal &= ~((uint32_t)0x00000001);
localVal |= (x << 0)&((uint32_t)0x00000001);
REG_PL_WR(0x40001414,localVal);
}
#endif
|
mkroman/bl602-604
|
components/bl602/bl602_wifi/plf/refip/src/driver/phy/bl602_phy_rf/phy_tcal.c
|
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "phy_tcal.h"
#include "phy_hal.h"
#include "phy_trpc.h"
#include "ke_timer.h"
#include "mm_timer.h"
#include "reg_riu.h"
#include "bl602_rf_private.h"
#include "phy_bl602.h"
#define RFCAL_TEMPERATURE (25)
#define TXPWR_SLOPE_VAL (-5)
#define TXPWR_SLOPE_FWL (8)
#define TXPWR_SCALE (10)
#define RXGAIN_SLOPE_VAL (-6)
#define RXGAIN_SLOPE_FWL (8)
#define TCAL_TIMER_MM (0) // using MM timer or external timer
#define TCAL_ABS(x) ((x) >= 0 ? (x) : -(x))
#define TCAL_RSHIFT(x,r) ((x) >= 0 ? (TCAL_ABS(x) >> (r)) : -(TCAL_ABS(x) >> (r)))
enum {
TCAL_TXGAIN = 0,
TCAL_TXIQ,
TCAL_RXGAIN,
TCAL_RXIQ,
TCAL_NUM_CALS
};
struct tcal_tag
{
struct mm_timer_tag timer;
bool tmr_on;
int16_t prev_temperature;
#if 0
int16_t temperature;
uint32_t temperature_update_time;
#endif
uint32_t last_action_time[TCAL_NUM_CALS];
uint32_t last_action_temperature[TCAL_NUM_CALS];
int32_t last_action_out[TCAL_NUM_CALS];
bool inited;
};
#if CFG_RF_TCAL_SIM
struct tcal_sim_tag tcal_sim;
#endif
static struct tcal_tag tcal_env;
static void phy_tcal_rxgain(int16_t curr_temperature);
static void phy_tcal_txpwr(int16_t curr_temperature);
static void phy_tcal_txiq(int16_t curr_temperature);
static void phy_tcal_rxiq(int16_t curr_temperature);
void phy_tcal_handle();
void phy_tcal_init()
{
phy_tcal_reset();
phy_tcal_start();
}
void phy_tcal_reset()
{
#if TCAL_TIMER_MM
if (tcal_env.tmr_on) {
mm_timer_clear(&tcal_env.timer);
}
#endif
memset(&tcal_env, 0, sizeof(struct tcal_tag));
tcal_env.tmr_on = false;
tcal_env.timer.cb = phy_tcal_handle;
tcal_env.timer.env = &tcal_env;
tcal_env.inited = false;
}
void phy_tcal_start()
{
#if TCAL_TIMER_MM
if (!tcal_env.tmr_on) {
mm_timer_set(&tcal_env.timer, ke_time() + PHY_TCAL_INTERVAL_US);
tcal_env.tmr_on = true;
}
#endif
tcal_env.inited = true;
}
void phy_tcal_stop()
{
#if TCAL_TIMER_MM
if (tcal_env.tmr_on) {
mm_timer_clear(&tcal_env.timer);
tcal_env.tmr_on = false;
}
#endif
}
void phy_tcal_handle()
{
bool status;
int16_t curr_temperature;
int8_t i;
#if TCAL_TIMER_MM
if (!tcal_env.tmr_on)
return;
#endif
if (!tcal_env.inited)
return;
// Get current temperature (could be conflicted with the other tasks using GPADC)
status = hal_get_temperature(&curr_temperature);
if (status == false)
{
return;
}
if (!tcal_env.inited)
{
for (i = 0; i < TCAL_NUM_CALS; i++)
{
tcal_env.last_action_temperature[i] = curr_temperature;
}
tcal_env.prev_temperature = curr_temperature;
tcal_env.inited = true;
return;
}
// Check if the temperature is reasonable
curr_temperature = (curr_temperature > 125) ? 125 : curr_temperature;
curr_temperature = (curr_temperature < -40) ? -40 : curr_temperature;
#if CFG_RF_TCAL_SIM == 0
if ((curr_temperature - tcal_env.prev_temperature) > +4 ||
(curr_temperature - tcal_env.prev_temperature) < -4)
{
tcal_env.prev_temperature = curr_temperature;
return;
}
#endif
phy_tcal_rxgain(curr_temperature);
phy_tcal_txpwr(curr_temperature);
phy_tcal_txiq(curr_temperature);
phy_tcal_rxiq(curr_temperature);
tcal_env.prev_temperature = curr_temperature;
#if 0
uint32_t curr_time;
curr_time = ke_time();
tcal_env.temperature = curr_temperature;
tcal_env.temperature_update_time = curr_time;
#endif
#if TCAL_TIMER_MM
// Restart temperature calibration timer
mm_timer_set(&tcal_env.timer, ke_time() + PHY_TCAL_INTERVAL_US);
#endif
}
void phy_tcal_callback(int16_t temperature)
{
#if CFG_RF_TCAL
hal_set_temperature(temperature);
phy_tcal_handle();
#endif
}
static void phy_tcal_rxgain(int16_t curr_temperature)
{
int16_t delta_temp;
int16_t delta_gain;
delta_temp = curr_temperature - RFCAL_TEMPERATURE;
delta_gain = TCAL_RSHIFT(delta_temp * RXGAIN_SLOPE_VAL, RXGAIN_SLOPE_FWL);
#if CFG_RF_TCAL_SIM == 0
if (delta_gain != tcal_env.last_action_out[TCAL_RXGAIN])
#endif
{
GLOBAL_INT_DISABLE();
phy_config_rxgain(delta_gain);
GLOBAL_INT_RESTORE();
tcal_env.last_action_temperature[TCAL_RXGAIN] = curr_temperature;
tcal_env.last_action_out[TCAL_RXGAIN] = delta_gain;
#if CFG_RF_TCAL_SIM
tcal_sim.rxgain_vpeak_dbv = delta_gain;
tcal_sim.rxgain_temperature = curr_temperature;
#endif
}
}
// * keep rf gain unchanged at high temperature region
// * reduce rf gain at low temperature region
static void phy_tcal_txpwr(int16_t curr_temperature)
{
int16_t delta_temp;
int16_t delta_pwr;
delta_temp = curr_temperature - RFCAL_TEMPERATURE;
delta_pwr = TCAL_RSHIFT(delta_temp * TXPWR_SLOPE_VAL * TXPWR_SCALE, TXPWR_SLOPE_FWL);
// decrease txgain when temperature is low
// donot increase txgain when temperature is high (~nonlinearity)
#if CFG_RF_TCAL_SIM == 0
if (delta_pwr > 0)
#endif
{
rf_pri_update_txgain_tempos(delta_pwr);
trpc_update_vs_temperature(curr_temperature);
tcal_env.last_action_temperature[TCAL_TXGAIN] = curr_temperature;
tcal_env.last_action_out[TCAL_TXGAIN] = delta_pwr;
#if CFG_RF_TCAL_SIM
tcal_sim.txpwr_offset_db = delta_pwr;
tcal_sim.txpwr_temperature = curr_temperature;
#endif
}
}
// TODO:
static void phy_tcal_txiq(int16_t curr_temperature)
{
}
// TODO: Eliminate rxiq by re-trigger runtime iq estimation module
static void phy_tcal_rxiq(int16_t curr_temperature)
{
}
|
mkroman/bl602-604
|
components/hal_drv/bl602_hal/bl_uart.h
|
<reponame>mkroman/bl602-604<gh_stars>0
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __BL_UART_H__
#define __BL_UART_H__
#include <stdint.h>
#include <bl602_uart.h>
#define BL_UART_BUFFER_SIZE_MIN (128)
#define BL_UART_BUFFER_SIZE_MASK (128 - 1)
typedef void (*cb_uart_notify_t)(void *arg);
int bl_uart_gpio_init(uint8_t id, uint8_t tx, uint8_t rx, uint8_t rts, uint8_t cts, int baudrate);
int bl_uart_init(uint8_t id, uint8_t tx_pin, uint8_t rx_pin, uint8_t cts_pin, uint8_t rts_pin, uint32_t baudrate);
int bl_uart_debug_early_init(uint32_t baudrate);
int bl_uart_early_init(uint8_t id, uint8_t tx_pin, uint32_t baudrate);
int bl_uart_int_rx_enable(uint8_t id);
int bl_uart_int_rx_disable(uint8_t id);
int bl_uart_int_tx_enable(uint8_t id);
int bl_uart_int_tx_disable(uint8_t id);
int bl_uart_string_send(uint8_t id, char *data);
int bl_uart_flush(uint8_t id);
void bl_uart_getdefconfig(uint8_t id, uint8_t *parity);
void bl_uart_setconfig(uint8_t id, uint32_t baudrate, UART_Parity_Type parity);
void bl_uart_setbaud(uint8_t id, uint32_t baud);
int bl_uart_data_send(uint8_t id, uint8_t data);
int bl_uart_datas_send(uint8_t id, uint8_t *data, int len);
int bl_uart_data_recv(uint8_t id);
int bl_uart_int_enable(uint8_t id, uint8_t *rx_buffer, uint8_t *rx_idx_write, uint8_t *rx_idx_read, uint8_t *tx_buffer, uint8_t *tx_idx_write, uint8_t *tx_idx_read);
int bl_uart_int_cb_notify_register(uint8_t id, cb_uart_notify_t cb, void *arg);
int bl_uart_int_cb_notify_unregister(uint8_t id, cb_uart_notify_t cb, void *arg);
#endif
|
mkroman/bl602-604
|
components/network/ble/blemesh/src/mesh_settings.h
|
<gh_stars>0
/*
* Copyright (c) 2018 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#if defined(BFLB_BLE)
#define NV_MESH_IV "bt/mesh/IV"
#define NV_MESH_NET "bt/mesh/NetInfo"
#define NV_MESH_SEQ "bt/mesh/Seq"
#define NV_MESH_RPL "bt/mesh/RPL"
#define NV_MESH_HBPUB "bt/mesh/HBPub"
#define NV_MESH_CFG "bt/mesh/Cfg"
int mesh_set(void);
int mesh_commit(void);
#endif
void bt_mesh_store_net(void);
void bt_mesh_store_iv(bool only_duration);
void bt_mesh_store_seq(void);
void bt_mesh_store_rpl(struct bt_mesh_rpl *rpl);
void bt_mesh_store_subnet(struct bt_mesh_subnet *sub);
void bt_mesh_store_app_key(struct bt_mesh_app_key *key);
void bt_mesh_store_hb_pub(void);
void bt_mesh_store_cfg(void);
void bt_mesh_store_mod_bind(struct bt_mesh_model *mod);
void bt_mesh_store_mod_sub(struct bt_mesh_model *mod);
void bt_mesh_store_mod_pub(struct bt_mesh_model *mod);
void bt_mesh_clear_net(void);
void bt_mesh_clear_subnet(struct bt_mesh_subnet *sub);
void bt_mesh_clear_app_key(struct bt_mesh_app_key *key);
void bt_mesh_clear_rpl(void);
void bt_mesh_settings_init(void);
|
mkroman/bl602-604
|
components/network/ble/blestack/src/host/smp.h
|
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/**
* @file smp.h
* Security Manager Protocol implementation header
*/
/*
* Copyright (c) 2015-2016 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
struct bt_smp_hdr {
u8_t code;
} __packed;
#define BT_SMP_ERR_PASSKEY_ENTRY_FAILED 0x01
#define BT_SMP_ERR_OOB_NOT_AVAIL 0x02
#define BT_SMP_ERR_AUTH_REQUIREMENTS 0x03
#define BT_SMP_ERR_CONFIRM_FAILED 0x04
#define BT_SMP_ERR_PAIRING_NOTSUPP 0x05
#define BT_SMP_ERR_ENC_KEY_SIZE 0x06
#define BT_SMP_ERR_CMD_NOTSUPP 0x07
#define BT_SMP_ERR_UNSPECIFIED 0x08
#define BT_SMP_ERR_REPEATED_ATTEMPTS 0x09
#define BT_SMP_ERR_INVALID_PARAMS 0x0a
#define BT_SMP_ERR_DHKEY_CHECK_FAILED 0x0b
#define BT_SMP_ERR_NUMERIC_COMP_FAILED 0x0c
#define BT_SMP_ERR_BREDR_PAIRING_IN_PROGRESS 0x0d
#define BT_SMP_ERR_CROSS_TRANSP_NOT_ALLOWED 0x0e
#define BT_SMP_IO_DISPLAY_ONLY 0x00
#define BT_SMP_IO_DISPLAY_YESNO 0x01
#define BT_SMP_IO_KEYBOARD_ONLY 0x02
#define BT_SMP_IO_NO_INPUT_OUTPUT 0x03
#define BT_SMP_IO_KEYBOARD_DISPLAY 0x04
#define BT_SMP_OOB_DATA_MASK 0x01
#define BT_SMP_OOB_NOT_PRESENT 0x00
#define BT_SMP_OOB_PRESENT 0x01
#define BT_SMP_MIN_ENC_KEY_SIZE 7
#define BT_SMP_MAX_ENC_KEY_SIZE 16
#define BT_SMP_DIST_ENC_KEY 0x01
#define BT_SMP_DIST_ID_KEY 0x02
#define BT_SMP_DIST_SIGN 0x04
#define BT_SMP_DIST_LINK_KEY 0x08
#define BT_SMP_DIST_MASK 0x0f
#define BT_SMP_AUTH_NONE 0x00
#define BT_SMP_AUTH_BONDING 0x01
#define BT_SMP_AUTH_MITM 0x04
#define BT_SMP_AUTH_SC 0x08
#define BT_SMP_AUTH_KEYPRESS 0x10
#define BT_SMP_AUTH_CT2 0x20
#define BT_SMP_CMD_PAIRING_REQ 0x01
#define BT_SMP_CMD_PAIRING_RSP 0x02
struct bt_smp_pairing {
u8_t io_capability;
u8_t oob_flag;
u8_t auth_req;
u8_t max_key_size;
u8_t init_key_dist;
u8_t resp_key_dist;
} __packed;
#define BT_SMP_CMD_PAIRING_CONFIRM 0x03
struct bt_smp_pairing_confirm {
u8_t val[16];
} __packed;
#define BT_SMP_CMD_PAIRING_RANDOM 0x04
struct bt_smp_pairing_random {
u8_t val[16];
} __packed;
#define BT_SMP_CMD_PAIRING_FAIL 0x05
struct bt_smp_pairing_fail {
u8_t reason;
} __packed;
#define BT_SMP_CMD_ENCRYPT_INFO 0x06
struct bt_smp_encrypt_info {
u8_t ltk[16];
} __packed;
#define BT_SMP_CMD_MASTER_IDENT 0x07
struct bt_smp_master_ident {
u8_t ediv[2];
u8_t rand[8];
} __packed;
#define BT_SMP_CMD_IDENT_INFO 0x08
struct bt_smp_ident_info {
u8_t irk[16];
} __packed;
#define BT_SMP_CMD_IDENT_ADDR_INFO 0x09
struct bt_smp_ident_addr_info {
bt_addr_le_t addr;
} __packed;
#define BT_SMP_CMD_SIGNING_INFO 0x0a
struct bt_smp_signing_info {
u8_t csrk[16];
} __packed;
#define BT_SMP_CMD_SECURITY_REQUEST 0x0b
struct bt_smp_security_request {
u8_t auth_req;
} __packed;
#define BT_SMP_CMD_PUBLIC_KEY 0x0c
struct bt_smp_public_key {
u8_t x[32];
u8_t y[32];
} __packed;
#define BT_SMP_DHKEY_CHECK 0x0d
struct bt_smp_dhkey_check {
u8_t e[16];
} __packed;
int bt_smp_start_security(struct bt_conn *conn);
bool bt_smp_request_ltk(struct bt_conn *conn, u64_t rand, u16_t ediv,
u8_t *ltk);
void bt_smp_update_keys(struct bt_conn *conn);
int bt_smp_br_send_pairing_req(struct bt_conn *conn);
int bt_smp_init(void);
int bt_smp_auth_passkey_entry(struct bt_conn *conn, unsigned int passkey);
int bt_smp_auth_passkey_confirm(struct bt_conn *conn);
int bt_smp_auth_pairing_confirm(struct bt_conn *conn);
int bt_smp_auth_cancel(struct bt_conn *conn);
int bt_smp_le_oob_generate_sc_data(struct bt_le_oob_sc_data *le_sc_oob);
int bt_smp_le_oob_set_sc_data(struct bt_conn *conn,
const struct bt_le_oob_sc_data *oobd_local,
const struct bt_le_oob_sc_data *oobd_remote);
int bt_smp_le_oob_get_sc_data(struct bt_conn *conn,
const struct bt_le_oob_sc_data **oobd_local,
const struct bt_le_oob_sc_data **oobd_remote);
/** brief Verify signed message
*
* @param conn Bluetooth connection
* @param buf received packet buffer with message and signature
*
* @return 0 in success, error code otherwise
*/
int bt_smp_sign_verify(struct bt_conn *conn, struct net_buf *buf);
/** brief Sign message
*
* @param conn Bluetooth connection
* @param buf message buffer
*
* @return 0 in success, error code otherwise
*/
int bt_smp_sign(struct bt_conn *conn, struct net_buf *buf);
|
mkroman/bl602-604
|
components/hal_drv/bl602_hal/bl_dma.h
|
<reponame>mkroman/bl602-604
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __BL_DMA_H__
#define __BL_DMA_H__
#include <utils_list.h>
#define BL_DMA_ITEM_CTRL_MAGIC_IRQ (0x8c49b000)
#define BL_DMA_ITEM_CTRL_MAGIC_NOIRQ (0x0c49b000)
#define BL_DMA_ITEM_CTRL_MAGIC_IRQ_CLR (0x7FFFFFFF)
#define BL_DMA_ITEM_CTRL_MAGIC_IRQ_SET (0x80000000)
#define BL_DMA_ITEM_BITS_SRC_BURST_COUNT_01 (0 << 12)
#define BL_DMA_ITEM_BITS_SRC_BURST_COUNT_04 (1 << 12)
#define BL_DMA_ITEM_BITS_SRC_BURST_COUNT_08 (2 << 12)
#define BL_DMA_ITEM_BITS_SRC_BURST_COUNT_16 (3 << 12)
#define BL_DMA_ITEM_BITS_DST_BURST_COUNT_01 (0 << 15)
#define BL_DMA_ITEM_BITS_DST_BURST_COUNT_04 (1 << 15)
#define BL_DMA_ITEM_BITS_DST_BURST_COUNT_08 (2 << 15)
#define BL_DMA_ITEM_BITS_DST_BURST_COUNT_16 (3 << 15)
#define BL_DMA_ITEM_BITS_SRC_WIDTH_1BYTE (0 << 18)
#define BL_DMA_ITEM_BITS_SRC_WIDTH_2BYTE (1 << 18)
#define BL_DMA_ITEM_BITS_SRC_WIDTH_4BYTE (2 << 18)
#define BL_DMA_ITEM_BITS_DST_WIDTH_1BYTE (0 << 21)
#define BL_DMA_ITEM_BITS_DST_WIDTH_2BYTE (1 << 21)
#define BL_DMA_ITEM_BITS_DST_WIDTH_4BYTE (2 << 21)
#define BL_DMA_ITEM_BITS_SRC_AUTO_INCR_ENABLE (1 << 26)
#define BL_DMA_ITEM_BITS_DST_AUTO_INCR_ENABLE (1 << 27)
#define BL_DMA_ITEM_BITS_IRQ_ENABLE (1 << 31)
struct bl_dma_item {
struct utils_list_hdr item;
void (*cb)(void *arg);
void *arg;
/*the following fields is for hardware access, strict aligment and memory is required*/
uint32_t src;
uint32_t dst;
uint32_t next;
uint32_t ctrl;
};
void bl_dma_copy(struct bl_dma_item *item);
void bl_dma_init(void);
void bl_dma_test(void);
#endif
|
mkroman/bl602-604
|
components/network/ble/blestack/src/port/include/bl_port.h
|
<reponame>mkroman/bl602-604
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef BL_PORT_H
#define BL_PORT_H
#include "config.h"
#include <misc/dlist.h>
#include <assert.h>
#include <stddef.h>
#include <stdint.h>
#include <string.h>
#include "types.h"
#define UINT_MAX 0xffffffff
#define BL_WAIT_FOREVER 0xffffffffu
#define BL_NO_WAIT 0x0
#define ms2tick(ms) (((ms)+portTICK_PERIOD_MS-1)/portTICK_PERIOD_MS)
typedef struct {
void *hdl;
} bl_hdl_t;
typedef bl_hdl_t _queue_t;
typedef bl_hdl_t _sem_t;
typedef uint32_t _stack_element_t;
typedef bl_hdl_t _mutex_t;
typedef bl_hdl_t bl_timer_t;
typedef uint32_t _task_t;
#define _POLL_EVENT_OBJ_INIT(obj) \
.poll_events = SYS_DLIST_STATIC_INIT(&obj.poll_events),
#define _POLL_EVENT sys_dlist_t poll_events
#define _K_SEM_INITIALIZER(obj, initial_count, count_limit) { }
#define K_SEM_INITIALIZER DEPRECATED_MACRO _K_SEM_INITIALIZER
#define K_SEM_DEFINE(name, initial_count, count_limit) \
struct k_sem name \
__in_section(_k_sem, static, name) = \
_K_SEM_INITIALIZER(name, initial_count, count_limit)
#define K_MUTEX_DEFINE(name) \
struct k_mutex name \
__in_section(_k_mutex, static, name) = \
_K_MUTEX_INITIALIZER(name)
typedef sys_dlist_t _wait_q_t;
struct k_queue {
void *hdl;
sys_dlist_t poll_events;
};
/*attention: this is intialied as zero,the queue variable shoule use k_queue_init\k_lifo_init\k_fifo_init again*/
#define _K_QUEUE_INITIALIZER(obj) { 0 }
#define K_QUEUE_INITIALIZER DEPRECATED_MACRO _K_QUEUE_INITIALIZER
void k_queue_init(struct k_queue *queue);
void k_queue_free(struct k_queue *queue);
void k_queue_append(struct k_queue *queue, void *data);
void k_queue_prepend(struct k_queue *queue, void *data);
void k_queue_insert(struct k_queue *queue, void *prev, void *data);
void k_queue_append_list(struct k_queue *queue, void *head, void *tail);
void *k_queue_get(struct k_queue *queue, s32_t timeout);
int k_queue_is_empty(struct k_queue *queue);
struct k_lifo {
struct k_queue _queue;
};
#define _K_LIFO_INITIALIZER(obj) \
{ \
._queue = _K_QUEUE_INITIALIZER(obj._queue) \
}
#define K_LIFO_INITIALIZER DEPRECATED_MACRO _K_LIFO_INITIALIZER
#define k_lifo_init(lifo) \
k_queue_init((struct k_queue *) lifo)
#define k_lifo_put(lifo, data) \
k_queue_prepend((struct k_queue *) lifo, data)
#define k_lifo_get(lifo, timeout) \
k_queue_get((struct k_queue *) lifo, timeout)
#define K_LIFO_DEFINE(name) \
struct k_lifo name \
__in_section(_k_queue, static, name) = \
_K_LIFO_INITIALIZER(name)
struct k_fifo {
struct k_queue _queue;
};
#define _K_FIFO_INITIALIZER(obj) \
{ \
._queue = _K_QUEUE_INITIALIZER(obj._queue) \
}
#define K_FIFO_INITIALIZER DEPRECATED_MACRO _K_FIFO_INITIALIZER
#define k_fifo_init(fifo) \
k_queue_init((struct k_queue *) fifo)
#define k_fifo_put(fifo, data) \
k_queue_append((struct k_queue *) fifo, data)
#define k_fifo_put_from_isr(fifo, data) \
k_queue_append_from_isr((struct k_queue *) fifo, data)
#define k_fifo_put_list(fifo, head, tail) \
k_queue_append_list((struct k_queue *) fifo, head, tail)
#define k_fifo_get(fifo, timeout) \
k_queue_get((struct k_queue *) fifo, timeout)
#define K_FIFO_DEFINE(name) \
struct k_fifo name \
__in_section(_k_queue, static, name) = \
_K_FIFO_INITIALIZER(name)
/* sem define*/
struct k_sem {
_sem_t sem;
sys_dlist_t poll_events;
};
/**
* @brief Initialize a semaphore.
*/
int k_sem_init(struct k_sem *sem, unsigned int initial_count, unsigned int limit);
/**
* @brief Take a semaphore.
*/
int k_sem_take(struct k_sem *sem, uint32_t timeout);
/**
* @brief Give a semaphore.
*/
int k_sem_give(struct k_sem *sem);
/**
* @brief Delete a semaphore.
*/
int k_sem_delete(struct k_sem *sem);
/**
* @brief Get a semaphore's count.
*/
unsigned int k_sem_count_get(struct k_sem *sem);
struct k_mutex {
_mutex_t mutex;
sys_dlist_t poll_events;
};
typedef void (*k_timer_handler_t)(void *timer);
typedef struct k_timer {
bl_timer_t timer;
k_timer_handler_t handler;
void *args;
uint32_t timeout;
uint32_t start_ms;
} k_timer_t;
/**
* @brief Initialize a timer.
*/
void k_timer_init(k_timer_t *timer, k_timer_handler_t handle, void *args);
/**
* @brief Start a timer.
*
*/
void k_timer_start(k_timer_t *timer, uint32_t timeout);
/**
* @brief Stop a timer.
*/
void k_timer_stop(k_timer_t *timer);
/**
* @brief Delete a timer.
*
*/
void k_timer_delete(k_timer_t *timer);
/*time define*/
#define MSEC_PER_SEC 1000
#define K_MSEC(ms) (ms)
#define K_SECONDS(s) K_MSEC((s) * MSEC_PER_SEC)
#define K_MINUTES(m) K_SECONDS((m) * 60)
#define K_HOURS(h) K_MINUTES((h) * 60)
#define K_PRIO_COOP(x) x
/**
* @brief Get time now.
*
* @return time(in milliseconds)
*/
int64_t k_uptime_get();
u32_t k_uptime_get_32(void);
struct k_thread {
_task_t task;
};
typedef _stack_element_t k_thread_stack_t;
inline void k_call_stacks_analyze(void) { }
#define K_THREAD_STACK_DEFINE(sym, size) _stack_element_t sym[size]
#define K_THREAD_STACK_SIZEOF(sym) sizeof(sym)
static inline char *K_THREAD_STACK_BUFFER(k_thread_stack_t *sym)
{
return (char *)sym;
}
typedef void (*k_thread_entry_t)(void *args);
int k_thread_create(struct k_thread *new_thread, const char *name,
size_t stack_size, k_thread_entry_t entry,
int prio);
/**
* @brief Yield the current thread.
*/
int k_yield();
/**
* @brief suspend the current thread for a certain time
*/
void k_sleep(s32_t duration);
/**
* @brief Lock interrupts.
*/
unsigned int irq_lock();
/**
* @brief Unlock interrupts.
*/
void irq_unlock(unsigned int key);
int k_is_in_isr(void);
#define BIT(n) (1UL << (n))
long long k_now_ms(void);
#endif /* BL_PORT_H */
|
mkroman/bl602-604
|
components/bl602/bl602_wifi/plf/refip/src/driver/phy/bl602_phy_rf/rf/Inc/bl602_rf_private.h
|
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __BL602_RF_PRIVATE_H__
#define __BL602_RF_PRIVATE_H__
#include <stdint.h>
// #include "rf_reg.h"
// #include "pds_reg.h"
// #include "aon_reg.h"
// #include "hbn_reg.h"
// #include "bl602_common.h"
/** @addtogroup BL602_Peripheral_Driver
* @{
*/
/** @addtogroup RF_PRIVATE
* @{
*/
/** @defgroup RF_PRIVATE_Public_Types
* @{
*/
typedef volatile struct{
uint32_t index;
int32_t dvga;
} tx_pwr_index;
extern tx_pwr_index* tp_index;
typedef volatile struct{
uint32_t notch_en;
int32_t spur_freq;
} notch_param;
extern notch_param* notch_p;
/*@} end of group L1C_Public_Types */
/** @defgroup L1C_Public_Constants
* @{
*/
enum {
E_RF_BW_NA = 0,
E_RF_BW_10M = 1,
E_RF_BW_20M = 2,
E_RF_BW_40M = 3
};
enum {
E_RF_GC_RRF_12DB = 0,
E_RF_GC_RRF_18DB = 1,
E_RF_GC_RRF_24DB = 2,
E_RF_GC_RRF_30DB = 3,
E_RF_GC_RRF_36DB = 4,
E_RF_GC_RRF_42DB = 5,
E_RF_GC_RRF_48DB = 6,
E_RF_GC_RRF_54DB = 7,
E_RF_GC_RRF_MIN = E_RF_GC_RRF_12DB,
E_RF_GC_RRF_MAX = E_RF_GC_RRF_54DB
};
enum {
E_RF_GC_RBB1_N6DB = 0,
E_RF_GC_RBB1_0DB = 1,
E_RF_GC_RBB1_6DB = 2,
E_RF_GC_RBB1_12DB = 3,
E_RF_GC_RBB1_MIN = E_RF_GC_RBB1_N6DB,
E_RF_GC_RBB1_MAX = E_RF_GC_RBB1_12DB
};
enum {
E_RF_GC_RBB2_N6DB = 0,
E_RF_GC_RBB2_N4DB,
E_RF_GC_RBB2_N2DB,
E_RF_GC_RBB2_0DB,
E_RF_GC_RBB2_2DB,
E_RF_GC_RBB2_4DB,
E_RF_GC_RBB2_6DB,
E_RF_GC_RBB2_8DB,
E_RF_GC_RBB2_MIN = E_RF_GC_RBB2_N6DB,
E_RF_GC_RBB2_MAX = E_RF_GC_RBB2_8DB
};
enum {
E_RF_DAC_IN_PAD = 0,
E_RF_DAC_IN_SRAM = 1,
E_RF_DAC_IN_TXSIN = 2,
E_RF_DAC_IN_ADCLOOP = 3
};
enum {
E_RF_TXSIN_PHASE_SAME = 0,
E_RF_TXSIN_PHASE_ORTH = 1
};
enum {
E_RF_GC_TBB_0DB = 0,
E_RF_GC_TBB_6DB = 1,
E_RF_GC_TBB_12DB = 2,
E_RF_GC_TBB_18DB = 3,
E_RF_GC_TBB_24DB = 4
};
enum {
E_RF_GC_TMX_OFF = 0,
E_RF_GC_TMX_N12DB = 1,
E_RF_GC_TMX_N6DB = 2,
E_RF_GC_TMX_MAXGAIN = 3
};
enum {
E_RF_PM_ACCLEN_16 = 0,
E_RF_PM_ACCLEN_32,
E_RF_PM_ACCLEN_64,
E_RF_PM_ACCLEN_128,
E_RF_PM_ACCLEN_256,
E_RF_PM_ACCLEN_512,
E_RF_PM_ACCLEN_1024,
E_RF_PM_ACCLEN_2048,
E_RF_PM_ACCLEN_4096,
E_RF_PM_ACCLEN_CUSTOM = 15,
E_RF_PM_ACCLEN_DEFAULT = E_RF_PM_ACCLEN_1024
};
enum {
E_RF_MODE_IDLE = 0,
E_RF_MODE_TX,
E_RF_MODE_RX,
E_RF_MODE_ROSCAL,
E_RF_MODE_RCCAL,
E_RF_MODE_TXCAL,
E_RF_MODE_LO_ACAL,
E_RF_MODE_LO_FCAL
};
enum
{
E_RF_CHANNEL_2404M = 0,
E_RF_CHANNEL_2408M,
E_RF_CHANNEL_2412M,
E_RF_CHANNEL_2416M,
E_RF_CHANNEL_2420M,
E_RF_CHANNEL_2424M,
E_RF_CHANNEL_2428M,
E_RF_CHANNEL_2432M,
E_RF_CHANNEL_2436M,
E_RF_CHANNEL_2440M,
E_RF_CHANNEL_2444M,
E_RF_CHANNEL_2448M,
E_RF_CHANNEL_2452M,
E_RF_CHANNEL_2456M,
E_RF_CHANNEL_2460M,
E_RF_CHANNEL_2464M,
E_RF_CHANNEL_2468M,
E_RF_CHANNEL_2472M,
E_RF_CHANNEL_2476M,
E_RF_CHANNEL_2480M,
E_RF_CHANNEL_2484M,
E_RF_CHANNEL_NUM
};
enum {
E_RF_BRANCH_I = 0,
E_RF_BRANCH_Q = 1,
E_RF_GAIN = 2,
E_RF_PHASE = 3
};
enum {
E_RF_DISABLE = 0,
E_RF_ENABLE = 1,
E_RF_OFF = E_RF_DISABLE,
E_RF_ON = E_RF_ENABLE
};
enum {
E_RF_TXCAL_SEQ_IQGAIN = 1,
E_RF_TXCAL_SEQ_IQPHASE = 2,
E_RF_TXCAL_SEQ_LOL = 0
};
enum {
E_RF_RXCAL_GAIN_CNT = 4,
E_RF_TXCAL_GAIN_CNT = 8,
E_RF_TXPWR_TBL_CNT = 16,
};
enum {
E_RF_MODE_11B = 0,
E_RF_MODE_11G = 1,
E_RF_MODE_11N = 2,
};
enum {
E_RF_XTAL_24M = 0,
E_RF_XTAL_26M = 1,
E_RF_XTAL_32M = 2,
E_RF_XTAL_38M4 = 3,
E_RF_XTAL_40M = 4,
E_RF_XTAL_52M = 5,
};
/*@} end of group L1C_Public_Constants */
/** @defgroup L1C_Public_Macros
* @{
*/
/*@} end of group L1C_Public_Macros */
/** @defgroup L1C_Public_Functions
* @{
*/
#if 0
uint32_t rf_pri_channel_freq_to_index(uint32_t freq);
// void rf_pri_wait_us(uint32_t us);
// void rf_pri_wait_ms(uint32_t ms);
void rf_pri_init(void);
// void rf_pri_config_mode(uint32_t mode);
void rf_pri_config_bandwidth(uint32_t bw);
// void rf_pri_config_channel(uint32_t channel_index);
// void rf_pri_manu_pu(uint32_t mode);
// void rf_pri_auto_gain(void);
// void rf_pri_save_state_for_cal();
// void rf_pri_restore_state_for_cal();
// uint16_t rf_pri_fcal_meas(uint32_t cw);
void rf_pri_fcal(void);
void rf_pri_full_cal(void);
// void rf_pri_set_cal_reg(void);
void rf_pri_lo_acal(void);
void rf_pri_roscal(void);
void rf_pri_rccal(void);
void rf_pri_txcal(void);
#endif
void rf_pri_init(uint8_t reset); // set OR, do full calibration
void rf_pri_update_param(uint32_t chanfreq_MHz); // update OR for specified channel
uint32_t rf_pri_get_vco_freq_cw(uint32_t chanfreq_MHz); // get calibration data
uint32_t rf_pri_get_vco_idac_cw(uint32_t chanfreq_MHz); // get calibration data
// void rf_pri_get_txgain_settings(int32_t pwr,uint32_t mode,uint32_t* rfg, uint32_t *dg); //get power index, pwr = power in dBm * 10
void rf_pri_update_txgain_tempos(int16_t tempos);
int32_t rf_pri_get_txgain_max();
int32_t rf_pri_get_txgain_min();
uint32_t rf_pri_get_txgain_index(int32_t pwr,uint32_t mode);
void rf_pri_query_txgain_table(uint32_t index, uint32_t *rfg_index, uint32_t *dg);
#ifdef RF_IN_SDK
void rf_pri_get_notch_param(uint32_t chanfreq_MHz, uint8_t *ncf_on, int32_t *ncf_freq_Hz);
#else
void rf_pri_notch_param(uint32_t chanfreq_MHz);
#endif
void rf_pri_init_fast(uint32_t flag);
void rf_pri_xtalfreq(uint32_t xtalfreq);
/*@} end of group L1C_Public_Functions */
/*@} end of group L1C */
/*@} end of group BL602_Peripheral_Driver */
#endif /* __BL602_L1C_H__ */
|
mkroman/bl602-604
|
components/network/ble/blestack/src/common/include/misc/__assert.h
|
<filename>components/network/ble/blestack/src/common/include/misc/__assert.h
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/**
* @file
* @brief Debug aid
*
*
* The __ASSERT() macro can be used inside kernel code.
*
* Assertions are enabled by setting the __ASSERT_ON symbol to a non-zero value.
* There are two ways to do this:
* a) Use the ASSERT and ASSERT_LEVEL kconfig options
* b) Add "CFLAGS += -D__ASSERT_ON=<level>" at the end of a project's Makefile
* The Makefile method takes precedence over the kconfig option if both are
* used.
*
* Specifying an assertion level of 1 causes the compiler to issue warnings that
* the kernel contains debug-type __ASSERT() statements; this reminder is issued
* since assertion code is not normally present in a final product. Specifying
* assertion level 2 suppresses these warnings.
*
* The __ASSERT_EVAL() macro can also be used inside kernel code.
*
* It makes use of the __ASSERT() macro, but has some extra flexibility. It
* allows the developer to specify different actions depending whether the
* __ASSERT() macro is enabled or not. This can be particularly useful to
* prevent the compiler from generating comments (errors, warnings or remarks)
* about variables that are only used with __ASSERT() being assigned a value,
* but otherwise unused when the __ASSERT() macro is disabled.
*
* Consider the following example:
*
* int x;
*
* x = foo ();
* __ASSERT (x != 0, "foo() returned zero!");
*
* If __ASSERT() is disabled, then 'x' is assigned a value, but never used.
* This type of situation can be resolved using the __ASSERT_EVAL() macro.
*
* __ASSERT_EVAL ((void) foo(),
* int x = foo(),
* x != 0,
* "foo() returned zero!");
*
* The first parameter tells __ASSERT_EVAL() what to do if __ASSERT() is
* disabled. The second parameter tells __ASSERT_EVAL() what to do if
* __ASSERT() is enabled. The third and fourth parameters are the parameters
* it passes to __ASSERT().
*
* The __ASSERT_NO_MSG() macro can be used to perform an assertion that reports
* the failed test and its location, but lacks additional debugging information
* provided to assist the user in diagnosing the problem; its use is
* discouraged.
*/
#ifndef ___ASSERT__H_
#define ___ASSERT__H_
#ifdef CONFIG_ASSERT
#ifndef __ASSERT_ON
#define __ASSERT_ON CONFIG_ASSERT_LEVEL
#endif
#endif
#ifdef __ASSERT_ON
#if (__ASSERT_ON < 0) || (__ASSERT_ON > 2)
#error "Invalid __ASSERT() level: must be between 0 and 2"
#endif
#if __ASSERT_ON
#include <misc/printk.h>
#define __ASSERT(test, fmt, ...) \
do { \
if (!(test)) { \
printk("ASSERTION FAIL [%s] @ %s:%d:\n\t", \
_STRINGIFY(test), \
__FILE__, \
__LINE__); \
printk(fmt, ##__VA_ARGS__); \
for (;;) \
; /* spin thread */ \
} \
} while ((0))
#define __ASSERT_EVAL(expr1, expr2, test, fmt, ...) \
do { \
expr2; \
__ASSERT(test, fmt, ##__VA_ARGS__); \
} while (0)
#if (__ASSERT_ON == 1)
#warning "__ASSERT() statements are ENABLED"
#endif
#else
#define __ASSERT(test, fmt, ...) \
do {/* nothing */ \
} while ((0))
#define __ASSERT_EVAL(expr1, expr2, test, fmt, ...) expr1
#endif
#else
#define __ASSERT(test, fmt, ...) \
do {/* nothing */ \
} while ((0))
#define __ASSERT_EVAL(expr1, expr2, test, fmt, ...) expr1
#endif
#define __ASSERT_NO_MSG(test) __ASSERT(test, "")
#endif /* ___ASSERT__H_ */
|
mkroman/bl602-604
|
components/fs/vfs/device/vfs_uart.c
|
<reponame>mkroman/bl602-604
/*
* Copyright (C) 2015-2017 Alibaba Group Holding Limited
*/
#include <stdio.h>
#include <FreeRTOS.h>
#include <task.h>
#include <string.h>
#include <aos/kernel.h>
#include <device/vfs_uart.h>
#include <hal/soc/soc.h>
#include <vfs_err.h>
#include <yloop_types.h>
#include <utils_log.h>
/* uart driver struct */
const struct file_ops uart_ops =
{
.open = vfs_uart_open,
.close = vfs_uart_close,
.read = vfs_uart_read,
.write = vfs_uart_write,
.poll = vfs_uart_poll,
.ioctl = vfs_uart_ioctl,
.sync = vfs_uart_sync,
};
int vfs_uart_open(inode_t *inode, file_t *fp)
{
int ret = -1; /* return value */
uart_dev_t *uart_dev = NULL; /* device pointer */
/* check empty pointer. */
if ((fp != NULL) && (fp->node != NULL)) {
/* Initialize if the device is first opened. */
if (fp->node->refs == 1) {
/* get the device pointer. */
uart_dev = (uart_dev_t *)(fp->node->i_arg);
aos_mutex_new((aos_mutex_t*)&(uart_dev->mutex));
/*reset ring buffer*/
uart_dev->ring_rx_idx_read = 0;
uart_dev->ring_rx_idx_write = 0;
uart_dev->ring_tx_idx_read = 0;
uart_dev->ring_tx_idx_write = 0;
/* init uart device. */
ret = hal_uart_init(uart_dev);
} else {
ret = VFS_SUCCESS;
}
} else {
ret = -EINVAL;
}
return ret;
}
int vfs_uart_close(file_t *fp)
{
int ret = -1; /* return value */
uart_dev_t *uart_dev = NULL; /* device pointer */
/* check empty pointer. */
if ((fp != NULL) && (fp->node != NULL)) {
/* close device if the device is last closed. */
if (fp->node->refs == 1) {
/* get the device pointer. */
uart_dev = (uart_dev_t *)(fp->node->i_arg);
if (uart_dev != NULL) {
aos_mutex_free((aos_mutex_t*)&(uart_dev->mutex));
/* turns off hardware. */
ret = hal_uart_finalize(uart_dev);
} else {
ret = -EINVAL;
}
} else {
ret = VFS_SUCCESS;
}
} else {
ret = -EINVAL;
}
return ret;
}
#define use_tick(now, old) ((uint32_t)(((int32_t)(now)) - ((uint32_t)(old))))
static void uart_notify(void *arg)
{
BaseType_t xHigherPriorityTaskWoken;
uart_dev_t *uart_dev = (uart_dev_t *)arg;
if (NULL == uart_dev) {
log_error("arg NULL\r\n");
return;
}
vTaskNotifyGiveFromISR((TaskHandle_t)(uart_dev->taskhdl), &xHigherPriorityTaskWoken);
portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
}
ssize_t vfs_uart_read(file_t *fp, void *buf, size_t nbytes)
{
int ret = -1; /* return value */
uart_dev_t *uart_dev = NULL; /* device pointer */
uint8_t *buffer, idx_w, idx_r;
uint8_t *readbuf = buf;
/* check empty pointer. */
if ((fp != NULL) && (fp->node != NULL)) {
/* get the device pointer. */
uart_dev = (uart_dev_t *)(fp->node->i_arg);
if ((nbytes > 0) && (uart_dev != NULL)) {
aos_mutex_lock((aos_mutex_t*)&(uart_dev->mutex), AOS_WAIT_FOREVER);
ret = 0;
/*Protect callback from INT*/
taskENTER_CRITICAL();
//vPortEnterCritical();
uart_dev->taskhdl = xTaskGetCurrentTaskHandle();
hal_uart_notify_register(uart_dev, uart_notify);
taskEXIT_CRITICAL();
//vPortExitCritical();
while (1) {
taskENTER_CRITICAL();
//vPortEnterCritical();
buffer = uart_dev->ring_rx_buffer;
idx_w = uart_dev->ring_rx_idx_write;
idx_r = uart_dev->ring_rx_idx_read;
while (ret < nbytes && (idx_r != idx_w)) {
readbuf[ret] = buffer[idx_r];
/*FIXME no maigc is allowed here*/
idx_r = ((idx_r + 1) & 0x7F);//max idx is 127
ret++;
}
uart_dev->ring_rx_idx_read = idx_r;
taskEXIT_CRITICAL();
//vPortExitCritical();
if (UART_READ_CFG_BLOCK == uart_dev->read_block_flag) {/* block */
printf("block.\r\n");
if (ret < nbytes) {
ulTaskNotifyTake(pdFALSE, portMAX_DELAY);
continue;
}
break;
} else {/* noblock */
break;
}
}
/* Protect callback from INT */
taskENTER_CRITICAL();
//vPortEnterCritical();
hal_uart_notify_unregister(uart_dev, NULL);
taskEXIT_CRITICAL();
//vPortExitCritical();
aos_mutex_unlock((aos_mutex_t*)&(uart_dev->mutex));
} else {
ret = -EINVAL;
}
} else {
ret = -EINVAL;
}
return ret;
}
//TODO block write is needed
ssize_t vfs_uart_write(file_t *fp, const void *buf, size_t nbytes)
{
int ret = -1; /* return value */
uart_dev_t *uart_dev = NULL; /* device pointer */
uint8_t *buffer, idx_w, idx_r;
/* check empty pointer. */
if ((fp != NULL) && (fp->node != NULL)) {
/* get the device pointer. */
uart_dev = (uart_dev_t *)(fp->node->i_arg);
if (uart_dev != NULL) {
/* send data from uart. */
ret = 0;
buffer = uart_dev->ring_tx_buffer;
idx_w = uart_dev->ring_tx_idx_write;
idx_r = uart_dev->ring_tx_idx_read;
/*FIXME no maigc is allowed here*/
while (ret < nbytes && ((idx_w + 1) & 0x7F) != idx_r) {
/*Write data to ringbuffer*/
buffer[idx_w] = ((uint8_t*)buf)[ret];
/*FIXME no maigc is allowed here*/
idx_w = ((idx_w + 1) & 0x7F);
ret++;
}
uart_dev->ring_tx_idx_write = idx_w;
/*Trigger UART Write Now*/
if (ret > 0) {
hal_uart_send_trigger(uart_dev);
}
} else {
ret = -EINVAL;
}
} else {
ret = -EINVAL;
}
return ret;
}
void vfs_uart_notify(void *arg)
{
/*this function is called in the interrupt routine, no task is shceduled*/
uart_dev_t *uart_dev = (uart_dev_t*)arg;
if (uart_dev->poll_cb != NULL) {
((struct pollfd*)uart_dev->fd)->revents |= POLLIN;
((poll_notify_t)uart_dev->poll_cb)(uart_dev->fd, uart_dev->poll_data);
}
}
int vfs_uart_poll(file_t *fp, bool setup, poll_notify_t notify, struct pollfd *fd, void *opa)
{
uart_dev_t *uart_dev = (uart_dev_t *)(fp->node->i_arg);
aos_mutex_lock((aos_mutex_t*)&(uart_dev->mutex), AOS_WAIT_FOREVER);
if (!setup) {
/*Enter Critical to protect callback from INT context and other task*/
taskENTER_CRITICAL();
//vPortEnterCritical();
uart_dev->poll_cb = NULL;
uart_dev->poll_data = NULL;
hal_uart_notify_unregister(uart_dev, vfs_uart_notify);
taskEXIT_CRITICAL();
//vPortExitCritical();
goto out;
}
/*Protect callback from INT*/
taskENTER_CRITICAL();
//vPortEnterCritical();
uart_dev->poll_cb = notify;
uart_dev->fd = fd;
uart_dev->poll_data = opa;
hal_uart_notify_register(uart_dev, vfs_uart_notify);
taskEXIT_CRITICAL();
//vPortExitCritical();
if (uart_dev->ring_rx_idx_read != uart_dev->ring_rx_idx_write) {
((struct pollfd*)uart_dev->fd)->revents |= POLLIN;
(*notify)(fd, opa);
}
out:
aos_mutex_unlock((aos_mutex_t*)&(uart_dev->mutex));
return 0;
}
int uart_ioctl_cmd_waimode(uart_dev_t *uart_dev, int cmd, unsigned long arg)
{
int ret = 0;
uint8_t *buffer, idx_w, idx_r;
uint32_t nbytes;
uint32_t start_tick;
uint32_t cur_tick;
int32_t tmp;
uart_ioc_waitread_t *waitr_arg = (uart_ioc_waitread_t *)arg;
if (NULL == waitr_arg) {
return -EINVAL;
}
nbytes = waitr_arg->read_size;
start_tick = xTaskGetTickCount();
/*Protect callback from INT*/
taskENTER_CRITICAL();
//vPortEnterCritical();
uart_dev->taskhdl = xTaskGetCurrentTaskHandle();
hal_uart_notify_register(uart_dev, uart_notify);
taskEXIT_CRITICAL();
//vPortExitCritical();
while (1) {
taskENTER_CRITICAL();
//vPortEnterCritical();
buffer = uart_dev->ring_rx_buffer;
idx_w = uart_dev->ring_rx_idx_write;
idx_r = uart_dev->ring_rx_idx_read;
while (ret < nbytes && (idx_r != idx_w)) {
((uint8_t*)waitr_arg->buf)[ret] = buffer[idx_r];
/*FIXME no maigc is allowed here*/
idx_r = ((idx_r + 1) & 0x7F);//max idx is 127
ret++;
}
uart_dev->ring_rx_idx_read = idx_r;
taskEXIT_CRITICAL();
//vPortExitCritical();
if (0 == waitr_arg->timeout) { /* read noblock */
break;
} else if (AOS_WAIT_FOREVER == waitr_arg->timeout) { /* read time forever */
if (IOCTL_UART_IOC_WAITRD_MODE == cmd) {
if (ret > 0) {
break;
}
}
if (ret < nbytes) {
ulTaskNotifyTake(pdFALSE, portMAX_DELAY);
continue;
}
break;
} else { /* read so time */
if (IOCTL_UART_IOC_WAITRD_MODE == cmd) {
if (ret > 0) {
break;
}
}
cur_tick = xTaskGetTickCount();
tmp = ((int32_t)waitr_arg->timeout - ((int32_t)cur_tick - (int32_t)start_tick));
if ((0 < tmp) && (ret < nbytes)) {
ulTaskNotifyTake(pdFALSE, tmp);
continue;
}
break;
}
}
/* Protect callback from INT */
taskENTER_CRITICAL();
//vPortEnterCritical();
hal_uart_notify_unregister(uart_dev, NULL);
taskEXIT_CRITICAL();
//vPortExitCritical();
return ret;
}
int uart_ioctl_cmd_setconfig(uart_dev_t *uart_dev, unsigned long arg)
{
uart_ioc_config_t *config = (uart_ioc_config_t *)arg;
hal_uart_parity_t parity;
if (NULL == config) {
return -EINVAL;
}
if (config->parity == IO_UART_PARITY_ODD) {
parity = ODD_PARITY;
} else if (config->parity == IO_UART_PARITY_EVEN) {
parity = EVEN_PARITY;
} else {
parity = NO_PARITY;
}
hal_uart_setconfig(uart_dev, config->baud, parity);
return 0;
}
int vfs_uart_ioctl(file_t *fp, int cmd, unsigned long arg)
{
int ret = -1;
uart_dev_t *uart_dev = NULL;
/* check empty pointer. */
if ((fp == NULL) || (fp->node == NULL)) {
return -EINVAL;
}
/* get the device pointer. */
uart_dev = (uart_dev_t *)(fp->node->i_arg);
if (uart_dev == NULL) {
return -EINVAL;
}
aos_mutex_lock((aos_mutex_t*)&(uart_dev->mutex), AOS_WAIT_FOREVER);
switch(cmd) {
case IOCTL_UART_IOC_WAITRD_MODE:
case IOCTL_UART_IOC_WAITRDFULL_MODE:
{
ret = uart_ioctl_cmd_waimode(uart_dev, cmd, arg);
}
break;
case IOCTL_UART_IOC_FLUSH_MODE:
{
hal_uart_send_flush(uart_dev, 0);
}
break;
case IOCTL_UART_IOC_BAUD_MODE:
{
hal_uart_setbaud(uart_dev, (uint32_t)arg);
}
break;
case IOCTL_UART_IOC_CONFIG_MODE:
{
ret = uart_ioctl_cmd_setconfig(uart_dev, arg);
}
break;
case IOCTL_UART_IOC_READ_BLOCK:
{
uart_dev->read_block_flag = UART_READ_CFG_BLOCK;
}
break;
case IOCTL_UART_IOC_READ_NOBLOCK:
{
uart_dev->read_block_flag = UART_READ_CFG_NOBLOCK;
}
break;
default:
{
ret = -EINVAL;
}
}
aos_mutex_unlock((aos_mutex_t*)&(uart_dev->mutex));
return ret;
}
int vfs_uart_sync(file_t *fp)
{
uart_dev_t *uart_dev = NULL;
/* check empty pointer. */
if ((fp == NULL) || (fp->node == NULL)) {
return -EINVAL;
}
/* get the device pointer. */
uart_dev = (uart_dev_t *)(fp->node->i_arg);
if (uart_dev == NULL) {
return -EINVAL;
}
aos_mutex_lock((aos_mutex_t*)&(uart_dev->mutex), AOS_WAIT_FOREVER);
hal_uart_send_flush(uart_dev, 0);
aos_mutex_unlock((aos_mutex_t*)&(uart_dev->mutex));
return 0;
}
|
mkroman/bl602-604
|
components/bl602/bl602_wifi/plf/refip/src/driver/phy/bl602_phy_rf/phy_trpc.c
|
<reponame>mkroman/bl602-604<gh_stars>0
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "phy_trpc.h"
#include "phy.h"
#include "bl602_rf_private.h"
#include <stdio.h>
#define TRPC_MIN(a, b) ((a) <= (b) ? (a) : (b))
#define TRPC_MAX(a, b) ((a) >= (b) ? (a) : (b))
#define TRPC_DIV10(x) ((x * 51)/512)
/// max available power for each rate
static const int8_t txpwr_vs_rate_table[3][8] =
{
// 11b 1,2,5.5,11 Mbps
{
[0] = 20 - 2,
[1] = 20 - 2,
[2] = 20 - 2,
[3] = 20 - 2,
[4] = 20 - 2, // not used
[5] = 20 - 2, // not used
[6] = 20 - 2, // not used
[7] = 20 - 2 // not used
},
// 11g 6,9,12,18,24,36,48,54 Mbps
{
[0] = 20 - 2, // BPSK 1/2
[1] = 20 - 2, // BPSK 3/4
[2] = 20 - 2, // QPSK 1/2
[3] = 20 - 2, // QPSK 3/4
[4] = 18 - 2, // 16QAM 1/2
[5] = 18 - 2, // 16QAM 3/4
[6] = 16 - 2, // 64QAM 2/3
[7] = 16 - 2 // 64QAM 3/4
},
// 11n MCS0~MCS7
{
[0] = 20 - 2, // BPSK 1/2
[1] = 20 - 2, // QPSK 1/2
[2] = 20 - 2, // QPSK 3/4
[3] = 18 - 2, // 16QAM 1/2
[4] = 18 - 2, // 16QAM 3/4
[5] = 16 - 2, // 64QAM 2/3
[6] = 16 - 2, // 64QAM 3/4
[7] = 16 - 2 // 64QAM 5/6
}
};
struct trpc_env_tag trpc_env;
void trpc_init()
{
trpc_env.channel_freq = 2442;
trpc_env.power_dbm_max_rf = TRPC_DIV10(rf_pri_get_txgain_max());
trpc_env.power_dbm_min_rf = TRPC_DIV10(rf_pri_get_txgain_min());
trpc_env.power_dbm_lim_reg = 30; // TODO: change with region
trpc_env.temperature = 25;
trpc_env.temperature_compensate = 0;
#if CFG_PHY_TRPC_DEBUG
printf("[DEBUG][TRPC] trpc_init 11B MCS0 %d\r\n", trpc_get_default_power_idx(PHY_FORMATMOD_11B, 0));
printf("[DEBUG][TRPC] trpc_init 11B MCS3 %d\r\n", trpc_get_default_power_idx(PHY_FORMATMOD_11B, 3));
printf("[DEBUG][TRPC] trpc_init 11G MCS0 %d\r\n", trpc_get_default_power_idx(PHY_FORMATMOD_11G, 0));
printf("[DEBUG][TRPC] trpc_init 11G MCS2 %d\r\n", trpc_get_default_power_idx(PHY_FORMATMOD_11G, 2));
printf("[DEBUG][TRPC] trpc_init 11G MCS7 %d\r\n", trpc_get_default_power_idx(PHY_FORMATMOD_11G, 7));
printf("[DEBUG][TRPC] trpc_init 11N MCS0 %d\r\n", trpc_get_default_power_idx(PHY_FORMATMOD_11N, 0));
printf("[DEBUG][TRPC] trpc_init 11N MCS3 %d\r\n", trpc_get_default_power_idx(PHY_FORMATMOD_11N, 3));
printf("[DEBUG][TRPC] trpc_init 11N MCS7 %d\r\n", trpc_get_default_power_idx(PHY_FORMATMOD_11N, 7));
#endif
}
int8_t trpc_get_rf_max_power()
{
return trpc_env.power_dbm_max_rf;
}
int8_t trpc_get_rf_min_power()
{
return trpc_env.power_dbm_min_rf;
}
uint8_t trpc_get_default_power_idx(uint8_t formatmod, uint8_t mcs)
{
// make sure input is in range
formatmod = TRPC_MIN(formatmod, PHY_FORMATMOD_11N);
mcs = TRPC_MIN(mcs, formatmod == PHY_FORMATMOD_11B ? 3 : 7);
return trpc_get_power_idx(formatmod, mcs, txpwr_vs_rate_table[formatmod][mcs]);
}
uint8_t trpc_get_power_idx(uint8_t formatmod, uint8_t mcs, int8_t pwr_dbm)
{
int8_t pwr_dbm_top;
int8_t pwr_dbm_bottom;
int8_t pwr_dbm_guaranteed;
uint8_t backoff_steps;
// make sure input is in range
formatmod = TRPC_MIN(formatmod, PHY_FORMATMOD_11N);
mcs = TRPC_MIN(mcs, formatmod == PHY_FORMATMOD_11B ? 3 : 7);
// compare to limits
pwr_dbm_top = TRPC_MIN(trpc_env.power_dbm_lim_reg, trpc_env.power_dbm_max_rf);
pwr_dbm_bottom = trpc_env.power_dbm_min_rf;
pwr_dbm_guaranteed = txpwr_vs_rate_table[formatmod][mcs];
// make sure target power is in range
pwr_dbm = TRPC_MIN(pwr_dbm, pwr_dbm_guaranteed);
pwr_dbm = TRPC_MIN(pwr_dbm, pwr_dbm_top);
pwr_dbm = TRPC_MAX(pwr_dbm, pwr_dbm_bottom);
#if CFG_PHY_TRPC_DEBUG
printf("formatmod %d, mcs %d, power top %d, bottom %d, guaranted %d, target %d\r\n",
formatmod, mcs, pwr_dbm_top, pwr_dbm_bottom, pwr_dbm_guaranteed, pwr_dbm);
#endif
// backoff from the rf max power
// the max power of rf changes with frequency (channel) and temperature
// it is adjusted by thermal calibration and channel update
backoff_steps = trpc_env.power_dbm_max_rf - pwr_dbm;
backoff_steps+= formatmod == PHY_FORMATMOD_11B ? 3 : 0; // power of dsss/cck is 3db higher than ofdm
backoff_steps = TRPC_MIN(15, backoff_steps);
// the index is shift 2 bits to align with hardware
return backoff_steps << 2;
}
void trpc_update_vs_channel(int8_t channel_MHz)
{
trpc_env.channel_freq = channel_MHz;
trpc_env.power_dbm_max_rf = TRPC_DIV10(rf_pri_get_txgain_max());
trpc_env.power_dbm_min_rf = TRPC_DIV10(rf_pri_get_txgain_min());
}
void trpc_update_vs_temperature(int8_t temperature)
{
trpc_env.temperature = temperature;
trpc_env.power_dbm_max_rf = TRPC_DIV10(rf_pri_get_txgain_max());
trpc_env.power_dbm_min_rf = TRPC_DIV10(rf_pri_get_txgain_min());
}
|
mkroman/bl602-604
|
components/utils/src/utils_log.c
|
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdio.h>
#include <stdarg.h>
#include <stdint.h>
#include "utils_log.h"
#ifdef __cplusplus
extern "C" {
#endif
#define ONE_LINE_MAX_NUM (50)/* for print_buf log length */
#define MODULE_LOG_LOCK_LOCK /* reserved */
#define MODULE_LOG_LOCK_UNLOCK /* reserved */
static char log_buf[512];
int log_buf_out(const char *file, int line, void *inbuf, int len, LOG_BUF_OUT_DATA_TYPE_T type)
{
char *buf = (char *)inbuf;
char *pbuffer = NULL;
pbuffer = (char *)log_buf;
int m = 0, n = 0;
int j = 0, k = 0, tmp = 0;
MODULE_LOG_LOCK_LOCK;
tmp = (sizeof(log_buf))/3;/* 数组最大长度 */
if ((ONE_LINE_MAX_NUM > tmp) || (len < 1))
{
MODULE_LOG_LOCK_UNLOCK;
return -1;
}
m = len / ONE_LINE_MAX_NUM;
n = len % ONE_LINE_MAX_NUM;
if (n > 0) {
m++;
}
if (n > 0) {
/* 非整数倍 */
for (k = 0; k < m; k++) {
if ((k+1) == m) {
/* 最后一帧数据 */
tmp = 0;
for (j = 0; j < n; j++) {
switch (type) {
case LOG_BUF_OUT_DATA_TYPE_INT8:
{
tmp += sprintf(pbuffer + tmp, "%3d ", (int8_t)buf[k*ONE_LINE_MAX_NUM+j]);
}
break;
case LOG_BUF_OUT_DATA_TYPE_UNT8:
{
tmp += sprintf(pbuffer + tmp, "%3u ", (uint8_t)buf[k*ONE_LINE_MAX_NUM+j]);
}
break;
case LOG_BUF_OUT_DATA_TYPE_HEX:
default:
{
tmp += sprintf(pbuffer + tmp, "%02x ", (uint8_t)buf[k*ONE_LINE_MAX_NUM+j]);
}
}
}
log_buf_pri(file, line, "%.*s\r\n", tmp, pbuffer);
} else {
tmp = 0;
for (j = 0; j < ONE_LINE_MAX_NUM; j++) {
switch (type) {
case LOG_BUF_OUT_DATA_TYPE_INT8:
{
tmp += sprintf(pbuffer + tmp, "%3d ", (int8_t)buf[k*ONE_LINE_MAX_NUM+j]);
}
break;
case LOG_BUF_OUT_DATA_TYPE_UNT8:
{
tmp += sprintf(pbuffer + tmp, "%3u ", (uint8_t)buf[k*ONE_LINE_MAX_NUM+j]);
}
break;
case LOG_BUF_OUT_DATA_TYPE_HEX:
default:
{
tmp += sprintf(pbuffer + tmp, "%02x ", (uint8_t)buf[k*ONE_LINE_MAX_NUM+j]);
}
}
}
log_buf_pri(file, line, "%.*s\r\n", tmp, pbuffer);
}
}
} else {
/* 整数倍 */
for (k = 0; k < m; k++) {
tmp = 0;
for (j = 0; j < ONE_LINE_MAX_NUM; j++) {
switch (type) {
case LOG_BUF_OUT_DATA_TYPE_INT8:
{
tmp += sprintf(pbuffer + tmp, "%3d ", (int8_t)buf[k*ONE_LINE_MAX_NUM+j]);
}
break;
case LOG_BUF_OUT_DATA_TYPE_UNT8:
{
tmp += sprintf(pbuffer + tmp, "%3u ", (uint8_t)buf[k*ONE_LINE_MAX_NUM+j]);
}
break;
case LOG_BUF_OUT_DATA_TYPE_HEX:
default:
{
tmp += sprintf(pbuffer + tmp, "%02x ", (uint8_t)buf[k*ONE_LINE_MAX_NUM+j]);
}
}
}
log_buf_pri(file, line, "%.*s\r\n", tmp, pbuffer);
}
}
MODULE_LOG_LOCK_UNLOCK;
return 0;
}
extern void vprint(const char *fmt, va_list argp);
void bl_printk(const char *format, ...)
{
va_list args;
/* args point to the first variable parameter */
va_start(args, format);
/* You can add your code under here. */
vprint(format, args);
va_end(args);
}
#ifdef __cplusplus
}
#endif
|
mkroman/bl602-604
|
components/network/ble/blestack/src/port/include/config.h
|
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef BLE_CONFIG_H
#define BLE_CONFIG_H
#include "FreeRTOSConfig.h"
/**
* CONFIG_BLUETOOTH: Enable the bluetooh stack
*/
//#ifndef CONFIG_BLUETOOTH
//#error "CONFIG_BLUETOOTH not defined,this header shoudn't include"
//#endif
#ifdef CONFIG_BT_BONDABLE
#undef CONFIG_BT_BONDABLE
#define CONFIG_BT_BONDABLE 1
#endif
#define CONFIG_BT_SMP_ALLOW_UNAUTH_OVERWRITE 1
#if defined(CONFIG_BT_STACK_PTS)
//#ifndef CONFIG_BT_STACK_PTS_SM_SLA_KDU_BI_01
//#define CONFIG_BT_STACK_PTS_SM_SLA_KDU_BI_01
//#endif
//#ifndef PTS_GAP_SLAVER_CONFIG_READ_CHARC
//#define PTS_GAP_SLAVER_CONFIG_READ_CHARC
//#endif
//#ifndef PTS_GAP_SLAVER_CONFIG_WRITE_CHARC
//#define PTS_GAP_SLAVER_CONFIG_WRITE_CHARC
//#endif
//#ifndef PTS_GAP_SLAVER_CONFIG_NOTIFY_CHARC
//#define PTS_GAP_SLAVER_CONFIG_NOTIFY_CHARC
//#endif
//#ifndef PTS_GAP_SLAVER_CONFIG_INDICATE_CHARC
//#define PTS_GAP_SLAVER_CONFIG_INDICATE_CHARC
//#endif
#endif
#define CONFIG_BT_GATT_READ_MULTIPLE 1
/**
* CONFIG_BT_HCI_RX_STACK_SIZE: rx thread stack size
*/
#ifndef CONFIG_BT_HCI_RX_STACK_SIZE
#define CONFIG_BT_HCI_RX_STACK_SIZE 512
#endif
#ifndef CONFIG_BT_RX_STACK_SIZE
#define CONFIG_BT_RX_STACK_SIZE 2048//1536//1024
#endif
#ifndef CONFIG_BT_CTLR_RX_PRIO_STACK_SIZE
#define CONFIG_BT_CTLR_RX_PRIO_STACK_SIZE 156
#endif
#define CONFIG_BT_HCI_ECC_STACK_SIZE 384
#ifndef CONFIG_BT_RX_PRIO
#define CONFIG_BT_RX_PRIO (configMAX_PRIORITIES - 4)
#endif
/**
* CONFIG_BT: Tx thread stack size
*/
#ifndef CONFIG_BT_HCI_TX_STACK_SIZE
#define CONFIG_BT_HCI_TX_STACK_SIZE 1536//1024//200
#endif
/**
* CONFIG_BT_HCI_TX_PRIO: tx thread priority
*/
#ifndef CONFIG_BT_HCI_TX_PRIO
#define CONFIG_BT_HCI_TX_PRIO (configMAX_PRIORITIES - 3)
#endif
#ifndef CONFIG_BT_CTLR_RX_PRIO
#define CONFIG_BT_CTLR_RX_PRIO (configMAX_PRIORITIES - 4)
#endif
/**
* CONFIG_BT_HCI_CMD_COUNT: hci cmd buffer count,range 2 to 64
*/
#ifndef CONFIG_BT_HCI_CMD_COUNT
#define CONFIG_BT_HCI_CMD_COUNT 4//2
#endif
/**
* CONFIG_BT_RX_BUF_COUNT: number of buffer for incoming ACL packages or HCI
* events,range 2 to 255
*/
#ifndef CONFIG_BT_RX_BUF_COUNT
#define CONFIG_BT_RX_BUF_COUNT 10
#endif
/**
* CONFIG_BT_RX_BUF_LEN: the max length for rx buffer
* range 73 to 2000
*/
#ifndef CONFIG_BT_RX_BUF_LEN
#define CONFIG_BT_RX_BUF_LEN 255 //108 //76
#endif
#ifndef CONFIG_MAX_TIMER_REC
#define CONFIG_MAX_TIMER_REC 5
#endif
/**
* CONFIG_BT_CENTRAL: Enable central Role
*/
#ifdef CONFIG_BT_CENTRAL
#undef CONFIG_BT_CENTRAL
#define CONFIG_BT_CENTRAL 1
#endif
/**
* CONFIG_BT_WHITELIST : Enable autoconnect whilt list device */
#ifndef CONFIG_BT_WHITELIST
#define CONFIG_BT_WHITELIST 1
#endif
/**
* CONFIG_BT_PERIPHERAL: Enable peripheral Role
*/
#ifdef CONFIG_BT_PERIPHERAL
#undef CONFIG_BT_PERIPHERAL
#define CONFIG_BT_PERIPHERAL 1
#endif
#if defined(CONFIG_BT_CENTRAL) || defined(CONFIG_BT_PERIPHERAL)
#undef CONFIG_BT_CONN
#define CONFIG_BT_CONN 1
#endif
#ifdef CONFIG_BT_CONN
#ifndef CONFIG_BT_CREATE_CONN_TIMEOUT
#define CONFIG_BT_CREATE_CONN_TIMEOUT 3
#endif
#if defined(BFLB_BLE)
#ifndef CONFIG_BT_CONN_PARAM_UPDATE_TIMEOUT
#define CONFIG_BT_CONN_PARAM_UPDATE_TIMEOUT 5
#endif
#endif
/**
* CONFIG_BLUETOOTH_L2CAP_TX_BUF_COUNT: number of buffer for outgoing L2CAP packages
* range 2 to 255
*/
#ifndef CONFIG_BT_L2CAP_TX_BUF_COUNT
#define CONFIG_BT_L2CAP_TX_BUF_COUNT 10
#endif
/**
* CONFIG_BT_L2CAP_TX_MTU: Max L2CAP MTU for L2CAP tx buffer
* range 65 to 2000 if SMP enabled,otherwise range 23 to 2000
*/
#ifndef CONFIG_BT_L2CAP_TX_MTU
#ifdef CONFIG_BT_SMP
#define CONFIG_BT_L2CAP_TX_MTU 247 //96 //65
#else
#define CONFIG_BT_L2CAP_TX_MTU 23
#endif
#endif
/**
* CONFIG_BT_L2CAP_TX_USER_DATA_SIZE: the max length for L2CAP tx buffer user data size
* range 4 to 65535
*/
#ifndef CONFIG_BT_L2CAP_TX_USER_DATA_SIZE
#define CONFIG_BT_L2CAP_TX_USER_DATA_SIZE 4
#endif
#if defined(CONFIG_BT_STACK_PTS)&& defined(PTS_GAP_SLAVER_CONFIG_WRITE_CHARC)
#define CONFIG_BT_ATT_PREPARE_COUNT 64
#else
/**
* CONFIG_BT_ATT_PREPARE_COUNT: Number of buffers available for ATT prepare write, setting
* this to 0 disables GATT long/reliable writes.
* range 0 to 64
*/
#ifndef CONFIG_BT_ATT_PREPARE_COUNT
#define CONFIG_BT_ATT_PREPARE_COUNT 0
#endif
#endif
/**
* CONFIG_BLUETOOTH_SMP:Eable the Security Manager Protocol
* (SMP), making it possible to pair devices over LE
*/
#ifdef CONFIG_BT_SMP
#undef CONFIG_BT_SMP
#define CONFIG_BT_SMP 1
/**
* CONFIG_BT_SIGNING:enables data signing which is used for transferring
* authenticated data in an unencrypted connection
*/
#ifdef CONFIG_BT_SIGNING
#undef CONFIG_BT_SIGNING
#define CONFIG_BT_SIGNING 1
#endif
/**
* CONFIG_BT_SMP_SC_ONLY:enables support for Secure Connection Only Mode. In this
* mode device shall only use Security Mode 1 Level 4 with exception
* for services that only require Security Mode 1 Level 1 (no security).
* Security Mode 1 Level 4 stands for authenticated LE Secure Connections
* pairing with encryption. Enabling this option disables legacy pairing
*/
#ifdef CONFIG_BT_SMP_SC_ONLY
#undef CONFIG_BT_SMP_SC_ONLY
#define CONFIG_BT_SMP_SC_ONLY 1
#endif
/**
* CONFIG_BT_USE_DEBUG_KEYS:This option places Security Manager in
* a Debug Mode. In this mode predefined
* Diffie-Hellman private/public key pair is used as described
* in Core Specification Vol. 3, Part H, 2.3.5.6.1. This option should
* only be enabled for debugging and should never be used in production.
* If this option is enabled anyone is able to decipher encrypted air
* traffic.
*/
#ifdef CONFIG_BT_USE_DEBUG_KEYS
#ifndef CONFIG_BT_TINYCRYPT_ECC
#error "CONFIG_BT_USE_DEBUG_KEYS depends on CONFIG_BT_TINYCRYPT_ECC"
#endif
#undef CONFIG_BT_USE_DEBUG_KEYS
#define CONFIG_BT_USE_DEBUG_KEYS 1
#endif
/**
* CONFIG_BT_L2CAP_DYNAMIC_CHANNEL:enables support for LE Connection
* oriented Channels,allowing the creation of dynamic L2CAP Channels
*/
#ifdef CONFIG_BT_L2CAP_DYNAMIC_CHANNEL
#undef CONFIG_BT_L2CAP_DYNAMIC_CHANNEL
#define CONFIG_BT_L2CAP_DYNAMIC_CHANNEL 1
#endif
#endif
/**
* CONFIG_BT_PRIVACY:Enable local Privacy Feature support. This makes it possible
* to use Resolvable Private Addresses (RPAs).
*/
#ifdef CONFIG_BT_PRIVACY
#ifndef CONFIG_BT_SMP
#error "CONFIG_BT_PRIVACY depends on CONFIG_BT_SMP"
#endif
#undef CONFIG_BT_PRIVACY
#define CONFIG_BT_PRIVACY 1
/**
* CONFIG_BT_RPA_TIMEOUT:Resolvable Private Address timeout
* range 1 to 65535,seconds
*/
#ifndef CONFIG_BT_RPA_TIMEOUT
#if defined(CONFIG_BT_STACK_PTS)
#define CONFIG_BT_RPA_TIMEOUT 5
#else
#define CONFIG_BT_RPA_TIMEOUT 900
#endif
#endif
#endif
/**
* CONFIG_BT_GATT_DYNAMIC_DB:enables GATT services to be added dynamically to database
*/
#ifdef CONFIG_BT_GATT_DYNAMIC_DB
#undef CONFIG_BT_GATT_DYNAMIC_DB
#define CONFIG_BT_GATT_DYNAMIC_DB 1
#endif
/**
* CONFIG_BT_GATT_CLIENT:GATT client role support
*/
#ifdef CONFIG_BT_GATT_CLIENT
#undef CONFIG_BT_GATT_CLIENT
#define CONFIG_BT_GATT_CLIENT 1
#endif
/**
* CONFIG_BT_MAX_PAIRED:Maximum number of paired devices
* range 1 to 128
*/
#ifndef CONFIG_BT_MAX_PAIRED
#define CONFIG_BT_MAX_PAIRED CONFIG_BT_MAX_CONN
#endif
#endif
/**
* If this option is set TinyCrypt library is used for emulating the
* ECDH HCI commands and events needed by e.g. LE Secure Connections.
* In builds including the BLE Host, if not set the controller crypto is
* used for ECDH and if the controller doesn't support the required HCI
* commands the LE Secure Connections support will be disabled.
* In builds including the HCI Raw interface and the BLE Controller, this
* option injects support for the 2 HCI commands required for LE Secure
* Connections so that Hosts can make use of those
*/
#ifdef CONFIG_BT_TINYCRYPT_ECC
#undef CONFIG_BT_TINYCRYPT_ECC
#define CONFIG_BT_TINYCRYPT_ECC 1
#endif
/**
* CONFIG_BLUETOOTH_MAX_CONN:Maximum number of connections
* range 1 to 128
*/
#ifndef CONFIG_BT_MAX_CONN
#define CONFIG_BT_MAX_CONN CFG_CON
#endif
/**
* CONFIG_BT_DEVICE_NAME:Bluetooth device name. Name can be up
* to 248 bytes long (excluding NULL termination). Can be empty string
*/
#ifndef CONFIG_BT_DEVICE_NAME
#if defined(BL602)
#define CONFIG_BT_DEVICE_NAME "BL602-BLE-DEV"
#else
#define CONFIG_BT_DEVICE_NAME "BL70X-BLE-DEV"
#endif
#endif
/**
* CONFIG_BT_CONTROLLER_NAME:Bluetooth controller name. default support ESP32.
*/
#ifndef CONFIG_BT_CONTROLLER_NAME
#if defined(BL602)
#define CONFIG_BT_CONTROLLER_NAME "BL602-BLE-DEV"
#else
#define CONFIG_BT_CONTROLLER_NAME "BL70X-BLE-DEV"
#endif
#endif
/**
* CONFIG_BT_MAX_SCO_CONN:Maximum number of simultaneous SCO connections.
*/
#ifndef CONFIG_BT_MAX_SCO_CONN
#define CONFIG_BT_MAX_SCO_CONN 0
#endif
/**
* CONFIG_BT_WORK_QUEUE_STACK_SIZE:Work queue stack size.
*/
#ifndef CONFIG_BT_WORK_QUEUE_STACK_SIZE
#define CONFIG_BT_WORK_QUEUE_STACK_SIZE 1536//1280//512
#endif
/**
* CONFIG_BT_WORK_QUEUE_PRIO:Work queue priority.
*/
#ifndef CONFIG_BT_WORK_QUEUE_PRIO
#define CONFIG_BT_WORK_QUEUE_PRIO (configMAX_PRIORITIES - 2)
#endif
/**
* CONFIG_BT_HCI_RESERVE:Headroom that the driver needs for sending and receiving buffers.
*/
#ifndef CONFIG_BT_HCI_RESERVE
#ifdef CONFIG_BLUETOOTH_H4
#define CONFIG_BT_HCI_RESERVE 0
#elif defined(CONFIG_BLUETOOTH_H5) || defined(CONFIG_BLUETOOTH_SPI)
#define CONFIG_BT_HCI_RESERVE 1
#else
#define CONFIG_BT_HCI_RESERVE 1
#endif
#endif
/**
* CONFIG_BLUETOOTH_DEBUG_LOG:Enable bluetooth debug log.
*/
#if defined(BFLB_BLE)
#if defined(CFG_BLE_STACK_DBG_PRINT)
#undef CONFIG_BT_DEBUG
#define CONFIG_BT_DEBUG 1
#endif
#else
#ifdef CONFIG_BT_DEBUG_LOG
#undef CONFIG_BT_DEBUG_LOG
#define CONFIG_BT_DEBUG_LOG 1
#undef CONFIG_BT_DEBUG
#define CONFIG_BT_DEBUG 1
#endif
#endif
/**
* CONFIG_BT_DEBUG_L2CAP:Enable bluetooth l2cap debug log.
*/
#ifdef CONFIG_BT_DEBUG_L2CAP
#undef CONFIG_BT_DEBUG_L2CAP
#define CONFIG_BT_DEBUG_L2CAP 1
#endif
/**
* CONFIG_BT_DEBUG_CONN:Enable bluetooth conn debug log.
*/
#ifdef CONFIG_BT_DEBUG_CONN
#undef CONFIG_BT_DEBUG_CONN
#define CONFIG_BT_DEBUG_CONN 1
#endif
/**
* CONFIG_BT_DEBUG_ATT:Enable bluetooth att debug log.
*/
#ifdef CONFIG_BT_DEBUG_ATT
#undef CONFIG_BT_DEBUG_ATT
#define CONFIG_BT_DEBUG_ATT 1
#endif
/**
* CONFIG_BT_DEBUG_GATT:Enable bluetooth gatt debug log.
*/
#ifdef CONFIG_BT_DEBUG_GATT
#undef CONFIG_BT_DEBUG_GATT
#define CONFIG_BT_DEBUG_GATT 1
#endif
/**
* CONFIG_BT_DEBUG_HCI_CORE:Enable bluetooth hci core debug log.
*/
#ifdef CONFIG_BT_DEBUG_HCI_CORE
#undef CONFIG_BT_DEBUG_HCI_CORE
#define CONFIG_BT_DEBUG_HCI_CORE 1
#endif
/**
* CONFIG_BT_DEBUG_HCI_DRIVER:Enable bluetooth hci driver debug log.
*/
#ifdef CONFIG_BT_DEBUG_HCI_DRIVER
#undef CONFIG_BT_DEBUG_HCI_DRIVER
#define CONFIG_BT_DEBUG_HCI_DRIVER 1
#endif
/**
* CONFIG_BT_TEST:Enable bluetooth test.
*/
#ifdef CONFIG_BT_TEST
#undef CONFIG_BT_TEST
#define CONFIG_BT_TEST 1
#endif
/**
* CONFIG_BT_DEBUG_CORE:Enable bluetooth core debug log.
*/
#ifdef CONFIG_BT_DEBUG_CORE
#undef CONFIG_BT_DEBUG_CORE
#define CONFIG_BT_DEBUG_CORE 1
#endif
#ifndef CONFIG_BT_ATT_TX_MAX
#define CONFIG_BT_ATT_TX_MAX CONFIG_BT_MAX_CONN
#endif
#ifndef CONFIG_BT_CONN_TX_MAX
#define CONFIG_BT_CONN_TX_MAX CONFIG_BT_MAX_CONN
#endif
#ifndef CONFIG_BT_DEVICE_APPEARANCE
#define CONFIG_BT_DEVICE_APPEARANCE 833
#endif
#if defined(BFLB_BLE)
#ifndef CONFIG_BT_RECV_IS_RX_THREAD
#define CONFIG_BT_RECV_IS_RX_THREAD
#endif
#ifndef CONFIG_NET_BUF_USER_DATA_SIZE
#define CONFIG_NET_BUF_USER_DATA_SIZE 10
#endif
#ifndef CONFIG_BT_ID_MAX
#define CONFIG_BT_ID_MAX 1
#endif
#ifndef CONFIG_BT_L2CAP_TX_FRAG_COUNT
#define CONFIG_BT_L2CAP_TX_FRAG_COUNT 0
#endif
#ifndef CONFIG_BT_DEVICE_NAME_DYNAMIC
#define CONFIG_BT_DEVICE_NAME_DYNAMIC 1
#endif
#define CONFIG_BT_DEVICE_NAME_MAX 20
#if defined(CONFIG_BT_GAP_PERIPHERAL_PREF_PARAMS)
#define CONFIG_BT_PERIPHERAL_PREF_MIN_INT 0x0018
#define CONFIG_BT_PERIPHERAL_PREF_MAX_INT 0x0028
#define CONFIG_BT_PERIPHERAL_PREF_SLAVE_LATENCY 0
#define CONFIG_BT_PERIPHERAL_PREF_TIMEOUT 400
#endif
//#define BFLB_BLE_DISABLE_STATIC_ATTR
//#define BFLB_BLE_DISABLE_STATIC_BUF
//#define BFLB_BLE_DISABLE_STATIC_CHANNEL
#endif //BFLB_BLE
/*******************************BFLB_BLE Patch******************************/
#define BFLB_BLE_PATCH_DHKEY_CHECK_FAILED
#define BFLB_BLE_PATCH_NOTIFY_WRITE_CCC_RSP
#define BFLB_BLE_PATCH_FREE_ALLOCATED_BUFFER_IN_OS
#define BFLB_BLE_PATCH_AVOID_SEC_GATT_DISC
#define BFLB_BLE_PATCH_AVOID_DUPLI_PUBKEY_CB
#define BFLB_BLE_PATCH_CLEAN_UP_CONNECT_REF /*The flag @conn_ref is not clean up after disconnect*/
#ifdef CONFIG_BT_SETTINGS
#define BFLB_BLE_PATCH_SETTINGS_LOAD
#endif
#if defined(__cplusplus)
}
#endif
#endif /* BLE_CONFIG_H */
|
mkroman/bl602-604
|
components/hal_drv/bl602_hal/hal_board.c
|
<filename>components/hal_drv/bl602_hal/hal_board.c
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdint.h>
#include <stdio.h>
#include <bl_efuse.h>
#include <bl_wifi.h>
#include <hal_boot2.h>
#include <hal_sys.h>
#include <libfdt.h>
#include <utils_log.h>
#define BL_FDT32_TO_U8(addr, byte_offset) ((uint8_t)fdt32_to_cpu(*(uint32_t *)((uint8_t *)addr + byte_offset)))
#define BL_FDT32_TO_U16(addr, byte_offset) ((uint16_t)fdt32_to_cpu(*(uint32_t *)((uint8_t *)addr + byte_offset)))
#define BL_FDT32_TO_U32(addr, byte_offset) ((uint32_t)fdt32_to_cpu(*(uint32_t *)((uint8_t *)addr + byte_offset)))
static uint32_t factory_addr = 0;
#ifndef FEATURE_WIFI_DISABLE
#include <bl60x_fw_api.h>
static int update_mac_config_get_mac_from_dtb(const void *fdt, int offset1, uint8_t mac_addr[6])
{
int lentmp;
const uint8_t *addr_prop = 0;
/* set sta_mac_addr ap_mac_addr */
addr_prop = fdt_getprop(fdt, offset1, "sta_mac_addr", &lentmp);
if (6 == lentmp) {
memcpy(mac_addr, addr_prop, 6);
log_info("sta_mac_addr :\r\n");
log_buf(mac_addr, 6);
bl_wifi_sta_mac_addr_set(mac_addr);
} else {
log_error("sta_mac_addr NULL.\r\n");
return -1;
}
addr_prop = fdt_getprop(fdt, offset1, "ap_mac_addr", &lentmp);
if (6 == lentmp) {
memcpy(mac_addr, addr_prop, 6);
log_info("ap_mac_addr :\r\n");
log_buf(mac_addr, 6);
bl_wifi_ap_mac_addr_set(mac_addr);
} else {
log_error("ap_mac_addr NULL.\r\n");
return -1;
}
return 0;
}
static int update_mac_config_get_mac_from_efuse(uint8_t mac_addr[6])
{
uint8_t result_or, result_and;
bl_efuse_read_mac(mac_addr);
result_or = mac_addr[0] | mac_addr[1] | mac_addr[2] | mac_addr[3] | mac_addr[4] | mac_addr[5];
result_and = mac_addr[0] & mac_addr[1] & mac_addr[2] & mac_addr[3] & mac_addr[4] & mac_addr[5];
if (0 == result_or || 1 == result_and) {
/*all zero or one found in efuse*/
return -1;
}
return 0;
}
static int update_mac_config_get_mac_from_factory(uint8_t mac_addr[6])
{
uint8_t result_or, result_and;
if (bl_efuse_read_mac_factory(mac_addr)) {
return -1;
}
result_or = mac_addr[0] | mac_addr[1] | mac_addr[2] | mac_addr[3] | mac_addr[4] | mac_addr[5];
result_and = mac_addr[0] & mac_addr[1] & mac_addr[2] & mac_addr[3] & mac_addr[4] & mac_addr[5];
if (0 == result_or || 1 == result_and) {
/*all zero or one found in efuse*/
return -1;
}
return 0;
}
/*
* Update MAC address according to order string
* BFM:
* 'B' for EFUSE built-in MAC address
* 'F' for Flash built-in MAC address
* 'M' for manufacutre configured EFUSE built-in MAC address
* */
#define MAC_ORDER_ADDR_LEN_MAX (3)
static void update_mac_config_with_order(const void *fdt, int offset1, const char *order)
{
int i, set, len;
uint8_t mac_addr[6];
static const uint8_t mac_default[] = {0x18, 0xB9, 0x05, 0x88, 0x88, 0x88};
set = 0;
len = strlen(order);
for (i = 0; i < MAC_ORDER_ADDR_LEN_MAX && i < len; i++) {
switch (order[i]) {
case 'B':
{
if (0 == update_mac_config_get_mac_from_efuse(mac_addr)) {
set = 1;
log_debug("get MAC from B ready\r\n");
goto break_scan;
} else {
log_debug("get MAC from B failed\r\n");
}
}
break;
case 'F':
{
if (0 == update_mac_config_get_mac_from_dtb(fdt, offset1, mac_addr)) {
set = 1;
log_debug("get MAC from F ready\r\n");
goto break_scan;
} else {
log_debug("get MAC from F failed\r\n");
}
}
break;
case 'M':
{
if (0 == update_mac_config_get_mac_from_factory(mac_addr)) {
set = 1;
log_debug("get MAC from M ready\r\n");
goto break_scan;
} else {
log_debug("get MAC from M failed\r\n");
}
}
break;
default:
{
BL_ASSERT(0);
}
}
}
break_scan:
if (0 == set) {
log_info("Using Default MAC address\r\n");
memcpy(mac_addr, mac_default, 6);
}
//FIXME maybe we should set a different MAC address
log_info("Set MAC addrress %02X:%02X:%02X:%02X:%02X:%02X\r\n",
mac_addr[0],
mac_addr[1],
mac_addr[2],
mac_addr[3],
mac_addr[4],
mac_addr[5]
);
bl_wifi_ap_mac_addr_set(mac_addr);
bl_wifi_sta_mac_addr_set(mac_addr);
}
static void update_mac_config(const void *fdt, int offset1)
{
int countindex = 0, lentmp = 0;
const char *result = 0;
char mac_mode[4];
countindex = fdt_stringlist_count(fdt, offset1, "mode");
if (1 == countindex) {
result = fdt_stringlist_get(fdt, offset1, "mode", 0, &lentmp);
log_info("MAC address mode length %d\r\n", lentmp);
if (lentmp <= MAC_ORDER_ADDR_LEN_MAX) {
memcpy(mac_mode, result, lentmp);
mac_mode[3] = '\0';
log_info("MAC address mode is %s\r\n", mac_mode);
update_mac_config_with_order(fdt, offset1, mac_mode);
}
}
}
static int update_xtal_config_get_mac_from_factory(uint32_t capcode[5])
{
uint8_t capcode_efuse = 0;
if (bl_efuse_read_capcode(&capcode_efuse)) {
return -1;
}
/*efuse only have one capcode entry, so we fill the left with hardcode*/
capcode[0] = capcode_efuse;
capcode[1] = capcode_efuse;
capcode[2] = 1;
capcode[3] = 60;
capcode[4] = 60;
return 0;
}
static int update_xtal_config_get_mac_from_dtb(const void *fdt, int offset1, uint32_t capcode[5])
{
const uint8_t *addr_prop = 0;
int lentmp = 0;
addr_prop = fdt_getprop(fdt, offset1, "xtal", &lentmp);
if (5*4 == lentmp) {
log_info(
"xtal dtb in DEC :%u %u %u %u %u\r\n",
BL_FDT32_TO_U8(addr_prop, 4*0),
BL_FDT32_TO_U8(addr_prop, 4*1),
BL_FDT32_TO_U8(addr_prop, 4*2),
BL_FDT32_TO_U8(addr_prop, 4*3),
BL_FDT32_TO_U8(addr_prop, 4*4)
);
capcode[0] = BL_FDT32_TO_U8(addr_prop, 4*0);
capcode[1] = BL_FDT32_TO_U8(addr_prop, 4*1);
capcode[2] = BL_FDT32_TO_U8(addr_prop, 4*2);
capcode[3] = BL_FDT32_TO_U8(addr_prop, 4*3);
capcode[4] = BL_FDT32_TO_U8(addr_prop, 4*4);
} else {
log_error("xtal dtb NULL.");
return -1;
}
return 0;
}
#define XTAL_ORDER_ADDR_LEN_MAX (2)
static void update_xtal_config_with_order(const void *fdt, int offset1, const char *order)
{
int i, set, len;
uint32_t capcode[5];
set = 0;
len = strlen(order);
for (i = 0; i < XTAL_ORDER_ADDR_LEN_MAX && i < len; i++) {
switch (order[i]) {
case 'F':
{
if (0 == update_xtal_config_get_mac_from_dtb(fdt, offset1, capcode)) {
set = 1;
log_debug("get xtal from F ready\r\n");
goto break_scan;
} else {
log_debug("get xtal from F failed\r\n");
}
}
break;
case 'M':
{
if (0 == update_xtal_config_get_mac_from_factory(capcode)) {
set = 1;
log_debug("get xtal from M ready\r\n");
goto break_scan;
} else {
log_debug("get xtal from M failed\r\n");
}
}
break;
default:
{
BL_ASSERT(0);
}
}
}
break_scan:
if (0 == set) {
log_info("Using Default xtal\r\n");
capcode[0] = 50;
capcode[1] = 50;
capcode[2] = 1;
capcode[3] = 60;
capcode[4] = 60;
}
hal_sys_capcode_update(capcode[0], capcode[1]);
}
static void update_xtal_config(const void *fdt, int offset1)
{
int lentmp = 0, countindex;
char xtal_mode[3];
const char *result = 0;
countindex = fdt_stringlist_count(fdt, offset1, "xtal_mode");
if (1 == countindex) {
result = fdt_stringlist_get(fdt, offset1, "xtal_mode", 0, &lentmp);
log_info("xtal_mode length %d\r\n", lentmp);
if (lentmp <= XTAL_ORDER_ADDR_LEN_MAX) {
memcpy(xtal_mode, result, lentmp);
xtal_mode[sizeof(xtal_mode) - 1] = '\0';
log_info("xtal_mode is %s\r\n", xtal_mode);
update_xtal_config_with_order(fdt, offset1, xtal_mode);
}
}
}
static int update_poweroffset_config_get_mac_from_dtb(const void *fdt, int offset1, int8_t poweroffset[14])
{
int lentmp = 0, i;
const uint8_t *addr_prop = 0;
#define PWR_OFFSET_BASE (10)
addr_prop = fdt_getprop(fdt, offset1, "pwr_offset", &lentmp);
if (14*4 == lentmp) {
for (i = 0; i < 14; i++) {
poweroffset[i] = BL_FDT32_TO_U32(addr_prop, 4*i);
}
log_info("pwr_offset from dtb:\r\n");
log_buf(poweroffset, 14);
for (i = 0; i < 14; i++) {
poweroffset[i] -= PWR_OFFSET_BASE;
}
log_info("pwr_offset from dtb (rebase on %d):\r\n", PWR_OFFSET_BASE);
//TODO FIXME log buffer
//log_buf_int8(poweroffset, 14);
} else {
log_error("pwr_offset NULL. lentmp = %d\r\n", lentmp);
return -1;
}
return 0;
}
static void update_poweroffset_config_with_order(const void *fdt, int offset1, const char *order)
{
int i, set, len, j;
int8_t poweroffset[14], poweroffset_tmp[14];
memset(poweroffset, 0, sizeof(poweroffset));
memset(poweroffset_tmp, 0, sizeof(poweroffset_tmp));
set = 0;
len = strlen(order);
for (i = 0; i < XTAL_ORDER_ADDR_LEN_MAX && i < len; i++) {
switch (order[i]) {
case 'B':
case 'b':
{
if (0 == bl_efuse_read_pwroft(poweroffset_tmp)) {
set = 1;
log_debug("get pwr offset from B(b) ready\r\n");
if ('B' == order[i]) {
/*non-incremental mode*/
for (j = 0; j < sizeof(poweroffset); j++) {
poweroffset[j] = poweroffset_tmp[j];
}
log_debug("Use pwr offset from B only\r\n");
goto break_scan;
} else {
/*incremental mode*/
log_debug("Use pwr offset from b in incremental mode\r\n");
for (j = 0; j < sizeof(poweroffset); j++) {
poweroffset[j] += poweroffset_tmp[j];
}
}
} else {
log_debug("get pwr offset from B(b) failed\r\n");
}
}
break;
case 'F':
case 'f':
{
if (0 == update_poweroffset_config_get_mac_from_dtb(fdt, offset1, poweroffset_tmp)) {
set = 1;
log_debug("get pwr offset from F(f) ready\r\n");
if ('B' == order[i]) {
/*non-incremental mode*/
for (j = 0; j < sizeof(poweroffset); j++) {
poweroffset[j] = poweroffset_tmp[j];
}
log_debug("Use pwr offset from F only\r\n");
goto break_scan;
} else {
/*incremental mode*/
log_debug("Use pwr offset from f in incremental mode\r\n");
for (j = 0; j < sizeof(poweroffset); j++) {
poweroffset[j] += poweroffset_tmp[j];
}
}
goto break_scan;
} else {
log_debug("get pwr offset from F(f) failed\r\n");
}
}
break;
default:
{
BL_ASSERT(0);
}
}
}
break_scan:
if (0 == set) {
log_info("Using Default pwr offset\r\n");//all zeros actually
}
//log_buf_int8(poweroffset, 14);
//TODO FIXME POWER OFFSET
//bl60x_fw_power_offset_set(poweroffset);
}
#define PWR_OFFSET_ORDER_ADDR_LEN_MAX (2)
static void update_poweroffset_config(const void *fdt, int offset1)
{
int lentmp = 0, countindex;
char pwr_mode[3];
const char *result = 0;
countindex = fdt_stringlist_count(fdt, offset1, "pwr_mode");
if (1 == countindex) {
result = fdt_stringlist_get(fdt, offset1, "pwr_mode", 0, &lentmp);
log_info("pwr_mode length %d\r\n", lentmp);
if (lentmp <= PWR_OFFSET_ORDER_ADDR_LEN_MAX) {
memcpy(pwr_mode, result, lentmp);
pwr_mode[sizeof(pwr_mode) - 1] = '\0';
log_info("pwr_mode is %s\r\n", pwr_mode);
update_poweroffset_config_with_order(fdt, offset1, pwr_mode);
}
}
}
static int hal_board_load_fdt_info(const void *dtb)
{
const void *fdt = (const void *)dtb;/* const */
int wifi_offset = 0; /* subnode wifi */
int offset1 = 0; /* subnode offset1 */
const uint8_t *addr_prop = 0;
const char *result = 0;
int lentmp = 0;
int countindex = 0;
int i;
wifi_offset = fdt_subnode_offset(fdt, 0, "wifi");
if (!(wifi_offset > 0)) {
log_error("wifi NULL.\r\n");
}
offset1 = fdt_subnode_offset(fdt, wifi_offset, "brd_rf");
if (offset1 > 0) {
uint32_t channel_div_table[15];
uint16_t channel_cnt_table[14];
uint16_t lo_fcal_div = 0;
/* set xtal */
update_xtal_config(fdt, offset1);
/* set channel_div_table, channel_cnt_table, lo_fcal_div */
addr_prop = fdt_getprop(fdt, offset1, "channel_div_table", &lentmp);
if (15*4 == lentmp) {
for (i = 0; i < 15; i++) {
channel_div_table[i] = BL_FDT32_TO_U32(addr_prop, 4*i);
}
log_info("channel_div_table :\r\n");
log_buf(channel_div_table, 15*4);
} else {
log_error("channel_div_table NULL.\r\n");
}
addr_prop = fdt_getprop(fdt, offset1, "channel_cnt_table", &lentmp);
if (14*4 == lentmp) {
for (i = 0; i < 14; i++) {
channel_cnt_table[i] = BL_FDT32_TO_U16(addr_prop, 4*i);
}
log_info("channel_cnt_table :\r\n");
log_buf(channel_cnt_table, 14*4);
} else {
log_error("channel_cnt_table NULL.\r\n");
}
addr_prop = fdt_getprop(fdt, offset1, "lo_fcal_div", &lentmp);
if (4 == lentmp) {
lo_fcal_div = BL_FDT32_TO_U16(addr_prop, 4*0);
log_info("lo_fcal_div : %d\r\n", lo_fcal_div);
} else {
log_error("lo_fcal_div NULL.\r\n");
}
//TODO FIXME POWER
//bl60x_fw_rf_table_set(channel_div_table, channel_cnt_table, lo_fcal_div);
}
offset1 = fdt_subnode_offset(fdt, wifi_offset, "mac");
if (offset1 > 0) {
update_mac_config(fdt, offset1);
}
offset1 = fdt_subnode_offset(fdt, wifi_offset, "region");
if (offset1 > 0) {
/* set country_code */
addr_prop = fdt_getprop(fdt, offset1, "country_code", &lentmp);
if (4 == lentmp) {
log_info("country_code : %d\r\n", BL_FDT32_TO_U8(addr_prop, 4*0));
bl_wifi_country_code_set(BL_FDT32_TO_U8(addr_prop, 4*0));
} else {
log_error("country_code NULL.\r\n");
}
}
offset1 = fdt_subnode_offset(fdt, wifi_offset, "brd_rf");
if (offset1 > 0)
{
/* set tx_pwr_tbl */
uint8_t pwr_table[16*4];
addr_prop = fdt_getprop(fdt, offset1, "pwr_table", &lentmp);
if (16*4*4 == lentmp) {
for (i = 0; i < 16*4; i++) {
pwr_table[i] = BL_FDT32_TO_U32(addr_prop, 4*i);
}
log_info("pwr_table :\r\n");
log_buf(pwr_table, 16*4);
//TODO FIXME POWER
//bl_wifi_power_table_set((bl_tx_pwr_tbl_t *)pwr_table);
} else {
log_error("pwr_table NULL. lentmp = %d\r\n", lentmp);
}
update_poweroffset_config(fdt, offset1);
}
offset1 = fdt_subnode_offset(fdt, wifi_offset, "ap");
if (offset1 > 0)
{
/* set ssid pwd */
uint8_t ap_ssid[32];
uint8_t ap_ssid_len = 0;
uint8_t ap_psk[64];
uint8_t ap_psk_len = 0;
uint8_t ap_channel = 0;
countindex = fdt_stringlist_count(fdt, offset1, "ssid");
if (1 == countindex) {
result = fdt_stringlist_get(fdt, offset1, "ssid", 0, &lentmp);
if ((lentmp > 0) &&(lentmp<32)) {/* !NULL */
log_info("ap_ssid string[%d] = %s, ap_ssid_len = %d\r\n", 0, result, lentmp);
memcpy(ap_ssid, result, lentmp);
ap_ssid[lentmp] = '\0';
ap_ssid_len = lentmp;
}
}
countindex = fdt_stringlist_count(fdt, offset1, "pwd");
if (1 == countindex) {
result = fdt_stringlist_get(fdt, offset1, "pwd", 0, &lentmp);
if ((lentmp > 0) &&(lentmp<32)) {/* !NULL */
log_info("ap_psk string[%d] = %s, ap_psk_len = %d\r\n", 0, result, lentmp);
memcpy(ap_psk, result, lentmp);
ap_psk[lentmp] = '\0';
ap_psk_len = lentmp;
}
}
addr_prop = fdt_getprop(fdt, offset1, "ap_channel", &lentmp);
if (addr_prop) {
log_info("ap_channel = %ld\r\n", BL_FDT32_TO_U32(addr_prop, 0));
ap_channel = BL_FDT32_TO_U32(addr_prop, 0);
} else {
log_error("ap_channel NULL.\r\n");
}
bl_wifi_ap_info_set(ap_ssid, ap_ssid_len,
ap_psk, ap_psk_len,
ap_channel);
}
return 0;
}
#endif
uint32_t hal_board_get_factory_addr(void)
{
return factory_addr;
}
int hal_board_cfg(uint8_t board_code)
{
int ret;
uint32_t size;
ret = hal_boot2_partition_addr_active("factory", &factory_addr, &size);
printf("[MAIN] [BOARD] [FLASH] addr from partition is %08x, ret is %d\r\n", (unsigned int)factory_addr, ret);
if (0 == factory_addr) {
printf("[MAIN] [BOARD] [FLASH] Dead loop. Reason: NO valid Param Parition found\r\n");
while (1) {
}
}
ret = hal_boot2_partition_bus_addr_active("factory", &factory_addr, &size);
printf("[MAIN] [BOARD] [XIP] addr from partition is %08x, ret is %d\r\n", (unsigned int)factory_addr, ret);
if (0 == factory_addr) {
printf("[MAIN] [BOARD] [XIP] Dead loop. Reason: NO valid Param Parition found\r\n");
while (1) {
}
}
#ifndef FEATURE_WIFI_DISABLE
hal_board_load_fdt_info((const void *)factory_addr);
#endif
return 0;
}
|
mkroman/bl602-604
|
components/bl602/bl602_std/bl602_std/RISCV/Device/Bouffalo/BL602/Startup/GCC/start_load.c
|
<filename>components/bl602/bl602_std/bl602_std/RISCV/Device/Bouffalo/BL602/Startup/GCC/start_load.c
#include <stdint.h>
#include "bl602.h"
#define __STARTUP_CLEAR_BSS 1
/*----------------------------------------------------------------------------
Linker generated Symbols
*----------------------------------------------------------------------------*/
extern uint32_t __etext0;
extern uint32_t __etext1;
extern uint32_t __etext2;
extern uint32_t __tcm_code_start__;
extern uint32_t __tcm_code_end__;
extern uint32_t __ocram_data_start__;
extern uint32_t __ocram_data_end__;
extern uint32_t __data_start__;
extern uint32_t __data_end__;
extern uint32_t __copy_table_start__;
extern uint32_t __copy_table_end__;
extern uint32_t __zero_table_start__;
extern uint32_t __zero_table_end__;
extern uint32_t __bss_start__;
extern uint32_t __bss_end__;
extern uint32_t __StackTop;
void start_load(void) {
uint32_t *pSrc, *pDest;
uint32_t *pTable __attribute__((unused));
/* Copy TCM code */
pSrc = &__etext0;
pDest = &__tcm_code_start__;
for ( ; pDest < &__tcm_code_end__ ; ) {
*pDest++ = *pSrc++;
}
/* BF Add OCRAM data copy */
pSrc = &__etext1;
pDest = &__ocram_data_start__;
for ( ; pDest < &__ocram_data_end__ ; ) {
*pDest++ = *pSrc++;
}
/* BF Add TCM data copy */
pSrc = &__etext2;
pDest = &__data_start__;
for ( ; pDest < &__data_end__ ; ) {
*pDest++ = *pSrc++;
}
#ifdef __STARTUP_CLEAR_BSS
/* Single BSS section scheme.
*
* The BSS section is specified by following symbols
* __bss_start__: start of the BSS section.
* __bss_end__: end of the BSS section.
*
* Both addresses must be aligned to 4 bytes boundary.
*/
pDest = &__bss_start__;
for ( ; pDest < &__bss_end__ ; ) {
*pDest++ = 0ul;
}
#endif
}
|
mkroman/bl602-604
|
components/network/ble/blestack/src/common/hex.c
|
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stddef.h>
#include <zephyr/types.h>
#include <errno.h>
#include <sys/util.h>
int char2hex(char c, u8_t *x)
{
if (c >= '0' && c <= '9') {
*x = c - '0';
} else if (c >= 'a' && c <= 'f') {
*x = c - 'a' + 10;
} else if (c >= 'A' && c <= 'F') {
*x = c - 'A' + 10;
} else {
return -EINVAL;
}
return 0;
}
int hex2char(u8_t x, char *c)
{
if (x <= 9) {
*c = x + '0';
} else if (x >= 10 && x <= 15) {
*c = x - 10 + 'a';
} else {
return -EINVAL;
}
return 0;
}
size_t bin2hex(const u8_t *buf, size_t buflen, char *hex, size_t hexlen)
{
if ((hexlen + 1) < buflen * 2) {
return 0;
}
for (size_t i = 0; i < buflen; i++) {
if (hex2char(buf[i] >> 4, &hex[2 * i]) < 0) {
return 0;
}
if (hex2char(buf[i] & 0xf, &hex[2 * i + 1]) < 0) {
return 0;
}
}
hex[2 * buflen] = '\0';
return 2 * buflen;
}
size_t hex2bin(const char *hex, size_t hexlen, u8_t *buf, size_t buflen)
{
u8_t dec;
if (buflen < hexlen / 2 + hexlen % 2) {
return 0;
}
/* if hexlen is uneven, insert leading zero nibble */
if (hexlen % 2) {
if (char2hex(hex[0], &dec) < 0) {
return 0;
}
buf[0] = dec;
hex++;
buf++;
}
/* regular hex conversion */
for (size_t i = 0; i < hexlen / 2; i++) {
if (char2hex(hex[2 * i], &dec) < 0) {
return 0;
}
buf[i] = dec << 4;
if (char2hex(hex[2 * i + 1], &dec) < 0) {
return 0;
}
buf[i] += dec;
}
return hexlen / 2 + hexlen % 2;
}
|
mkroman/bl602-604
|
components/bl602/bl602_std/bl602_std/StdDriver/Src/bl602_romdriver.c
|
<gh_stars>0
#include "bl602_romdriver.h"
#include <string.h>
/** @addtogroup BL602_Periph_Driver
* @{
*/
/** @defgroup ROMDRIVER
* @brief ROMDRIVER common functions
* @{
*/
/** @defgroup ROMDRIVER_Private_Type
* @{
*/
uint32_t const romDriverTable[]={
0x06020001,
0x00000000,
0x00000000,
0x00000000,
[ROM_API_INDEX_AON_Power_On_MBG] = (uint32_t)AON_Power_On_MBG, /* checked (0x4000F108), */
[ROM_API_INDEX_AON_Power_Off_MBG] = (uint32_t)AON_Power_Off_MBG, /* checked */
[ROM_API_INDEX_AON_Power_On_XTAL] = (uint32_t)AON_Power_On_XTAL, /* checked (0x4000F108), */
[ROM_API_INDEX_AON_Set_Xtal_CapCode] = (uint32_t)AON_Set_Xtal_CapCode, /* checked (0x4000F108), */
[ROM_API_INDEX_AON_Power_Off_XTAL] = (uint32_t)AON_Power_Off_XTAL, /* checked */
[ROM_API_INDEX_ASM_Delay_Us] = (uint32_t)ASM_Delay_Us, /* checked */
[ROM_API_INDEX_BL602_Delay_US] = (uint32_t)BL602_Delay_US, /* checked (0x4000F108), */
[ROM_API_INDEX_BL602_Delay_MS] = (uint32_t)BL602_Delay_MS, /* checked (0x4000F108), verified */
[ROM_API_INDEX_BL602_MemCpy] = (uint32_t)BL602_MemCpy, /* checked */
[ROM_API_INDEX_BL602_MemCpy4] = (uint32_t)BL602_MemCpy4, /* checked */
[ROM_API_INDEX_BL602_MemCpy_Fast] = (uint32_t)BL602_MemCpy_Fast, /* checked */
[ROM_API_INDEX_BL602_MemSet] = (uint32_t)BL602_MemSet, /* checked, checked */
[ROM_API_INDEX_BL602_MemSet4] = (uint32_t)BL602_MemSet4, /* checked */
[ROM_API_INDEX_BL602_MemCmp] = (uint32_t)BL602_MemCmp, /* checked, checked */
[ROM_API_INDEX_BFLB_Soft_CRC32] = (uint32_t)BFLB_Soft_CRC32, /* checked */
[ROM_API_INDEX_GLB_Get_Root_CLK_Sel] = (uint32_t)GLB_Get_Root_CLK_Sel, /* checked */
[ROM_API_INDEX_GLB_Set_System_CLK_Div] = (uint32_t)GLB_Set_System_CLK_Div, /* checked (0x4000F108), */
[ROM_API_INDEX_Update_SystemCoreClockWith_XTAL] = (uint32_t)Update_SystemCoreClockWith_XTAL, /* checked (0x4000F108), */
[ROM_API_INDEX_GLB_Set_System_CLK] = (uint32_t)GLB_Set_System_CLK, /* checked, verified */
[ROM_API_INDEX_System_Core_Clock_Update_From_RC32M] = (uint32_t)System_Core_Clock_Update_From_RC32M, /* checked */
[ROM_API_INDEX_GLB_Set_SF_CLK] = (uint32_t)GLB_Set_SF_CLK, /* checked, checked */
[ROM_API_INDEX_GLB_SW_System_Reset] = (uint32_t)GLB_SW_System_Reset, /* checked */
[ROM_API_INDEX_GLB_SW_CPU_Reset] = (uint32_t)GLB_SW_CPU_Reset, /* checked */
[ROM_API_INDEX_GLB_SW_POR_Reset] = (uint32_t)GLB_SW_POR_Reset, /* checked */
[ROM_API_INDEX_GLB_Select_Internal_Flash] = (uint32_t)GLB_Select_Internal_Flash, /* checked */
[ROM_API_INDEX_GLB_Swap_Flash_Pin] = (uint32_t)GLB_Swap_Flash_Pin, /* checked */
[ROM_API_INDEX_GLB_GPIO_Init] = (uint32_t)GLB_GPIO_Init, /* checked */
[ROM_API_INDEX_GLB_Deswap_Flash_Pin] = (uint32_t)GLB_Deswap_Flash_Pin, /* checked */
[ROM_API_INDEX_GLB_Select_External_Flash] = (uint32_t)GLB_Select_External_Flash, /* checked */
[ROM_API_INDEX_GLB_GPIO_Get_Fun] = (uint32_t)GLB_GPIO_Get_Fun, /* checked */
[ROM_API_INDEX_EF_Ctrl_Busy] = (uint32_t)EF_Ctrl_Busy, /* checked */
[ROM_API_INDEX_EF_Ctrl_Sw_AHB_Clk_0] = (uint32_t)EF_Ctrl_Sw_AHB_Clk_0, /* checked */
[ROM_API_INDEX_EF_Ctrl_Load_Efuse_R0] = (uint32_t)EF_Ctrl_Load_Efuse_R0, /* checked */
[ROM_API_INDEX_EF_Ctrl_Get_Trim_Parity] = (uint32_t)EF_Ctrl_Get_Trim_Parity, /* checked */
[ROM_API_INDEX_EF_Ctrl_Read_RC32K_Trim] = (uint32_t)EF_Ctrl_Read_RC32K_Trim, /* checked */
[ROM_API_INDEX_EF_Ctrl_Read_RC32M_Trim] = (uint32_t)EF_Ctrl_Read_RC32M_Trim, /* checked */
[ROM_API_INDEX_PDS_Trim_RC32M] = (uint32_t)PDS_Trim_RC32M, /* checked */
[ROM_API_INDEX_PDS_Select_RC32M_As_PLL_Ref] = (uint32_t)PDS_Select_RC32M_As_PLL_Ref, /* checked */
[ROM_API_INDEX_PDS_Select_XTAL_As_PLL_Ref] = (uint32_t)PDS_Select_XTAL_As_PLL_Ref, /* checked */
[ROM_API_INDEX_PDS_Power_On_PLL] = (uint32_t)PDS_Power_On_PLL, /* checked */
[ROM_API_INDEX_PDS_Enable_PLL_All_Clks] = (uint32_t)PDS_Enable_PLL_All_Clks, /* checked */
[ROM_API_INDEX_PDS_Disable_PLL_All_Clks] = (uint32_t)PDS_Disable_PLL_All_Clks, /* checked */
[ROM_API_INDEX_PDS_Enable_PLL_Clk] = (uint32_t)PDS_Enable_PLL_Clk, /* checked */
[ROM_API_INDEX_PDS_Disable_PLL_Clk] = (uint32_t)PDS_Disable_PLL_Clk, /* checked */
[ROM_API_INDEX_PDS_Power_Off_PLL] = (uint32_t)PDS_Power_Off_PLL, /* checked */
[ROM_API_INDEX_HBN_Enable] = (uint32_t)HBN_Enable, /* checked */
[ROM_API_INDEX_HBN_Reset] = (uint32_t)HBN_Reset, /* checked */
[ROM_API_INDEX_HBN_GPIO7_Dbg_Pull_Cfg] = (uint32_t)HBN_GPIO7_Dbg_Pull_Cfg, /* checked */
[ROM_API_INDEX_HBN_Trim_RC32K] = (uint32_t)HBN_Trim_RC32K, /* checked */
[ROM_API_INDEX_HBN_Set_ROOT_CLK_Sel] = (uint32_t)HBN_Set_ROOT_CLK_Sel, /* checked */
[ROM_API_INDEX_XIP_SFlash_State_Save] = (uint32_t)XIP_SFlash_State_Save, /* checked */
[ROM_API_INDEX_XIP_SFlash_State_Restore] = (uint32_t)XIP_SFlash_State_Restore, /* checked */
[ROM_API_INDEX_XIP_SFlash_Erase_Need_Lock] = (uint32_t)XIP_SFlash_Erase_Need_Lock, /* checked */
[ROM_API_INDEX_XIP_SFlash_Write_Need_Lock] = (uint32_t)XIP_SFlash_Write_Need_Lock, /* checked */
[ROM_API_INDEX_XIP_SFlash_Read_Need_Lock] = (uint32_t)XIP_SFlash_Read_Need_Lock, /* checked */
[ROM_API_INDEX_XIP_SFlash_GetJedecId_Need_Lock] = (uint32_t)XIP_SFlash_GetJedecId_Need_Lock, /* checked */
[ROM_API_INDEX_XIP_SFlash_GetDeviceId_Need_Lock] = (uint32_t)XIP_SFlash_GetDeviceId_Need_Lock, /* checked */
[ROM_API_INDEX_XIP_SFlash_GetUniqueId_Need_Lock] = (uint32_t)XIP_SFlash_GetUniqueId_Need_Lock, /* checked */
[ROM_API_INDEX_XIP_SFlash_Read_Via_Cache_Need_Lock] = (uint32_t)XIP_SFlash_Read_Via_Cache_Need_Lock,/* checked */
[ROM_API_INDEX_XIP_SFlash_Read_With_Lock] = (uint32_t)XIP_SFlash_Read_With_Lock, /* checked */
[ROM_API_INDEX_XIP_SFlash_Write_With_Lock] = (uint32_t)XIP_SFlash_Write_With_Lock, /* checked */
[ROM_API_INDEX_XIP_SFlash_Erase_With_Lock] = (uint32_t)XIP_SFlash_Erase_With_Lock, /* checked */
[ROM_API_INDEX_SFlash_Init] = (uint32_t)SFlash_Init, /* checked, verified */
[ROM_API_INDEX_SFlash_SetSPIMode] = (uint32_t)SFlash_SetSPIMode, /* checked */
[ROM_API_INDEX_SFlash_Read_Reg] = (uint32_t)SFlash_Read_Reg, /* checked (0x4000F108), */
[ROM_API_INDEX_SFlash_Write_Reg] = (uint32_t)SFlash_Write_Reg, /* checked (0x4000F108), */
[ROM_API_INDEX_SFlash_Busy] = (uint32_t)SFlash_Busy, /* checked (0x4000F108), */
[ROM_API_INDEX_SFlash_Write_Enable] = (uint32_t)SFlash_Write_Enable, /* checked (0x4000F108), */
[ROM_API_INDEX_SFlash_Qspi_Enable] = (uint32_t)SFlash_Qspi_Enable, /* checked (0x4000F108), verified */
[ROM_API_INDEX_SFlash_Volatile_Reg_Write_Enable] = (uint32_t)SFlash_Volatile_Reg_Write_Enable, /* checked */
[ROM_API_INDEX_SFlash_Chip_Erase] = (uint32_t)SFlash_Chip_Erase, /* checked, verified */
[ROM_API_INDEX_SFlash_Sector_Erase] = (uint32_t)SFlash_Sector_Erase, /* checked */
[ROM_API_INDEX_SFlash_Blk32_Erase] = (uint32_t)SFlash_Blk32_Erase, /* checked */
[ROM_API_INDEX_SFlash_Blk64_Erase] = (uint32_t)SFlash_Blk64_Erase, /* checked */
[ROM_API_INDEX_SFlash_Erase] = (uint32_t)SFlash_Erase, /* checked, verified */
[ROM_API_INDEX_SFlash_Program] = (uint32_t)SFlash_Program, /* checked, verified */
[ROM_API_INDEX_SFlash_GetUniqueId] = (uint32_t)SFlash_GetUniqueId, /* checked */
[ROM_API_INDEX_SFlash_GetJedecId] = (uint32_t)SFlash_GetJedecId, /* checked, verified */
[ROM_API_INDEX_SFlash_GetDeviceId] = (uint32_t)SFlash_GetDeviceId, /* checked */
[ROM_API_INDEX_SFlash_Powerdown] = (uint32_t)SFlash_Powerdown, /* checked */
[ROM_API_INDEX_SFlash_Releae_Powerdown] = (uint32_t)SFlash_Releae_Powerdown, /* checked */
[ROM_API_INDEX_SFlash_SetBurstWrap] = (uint32_t)SFlash_SetBurstWrap, /* checked, verified */
[ROM_API_INDEX_SFlash_DisableBurstWrap] = (uint32_t)SFlash_DisableBurstWrap, /* checked */
[ROM_API_INDEX_SFlash_Software_Reset] = (uint32_t)SFlash_Software_Reset, /* checked */
[ROM_API_INDEX_SFlash_Reset_Continue_Read] = (uint32_t)SFlash_Reset_Continue_Read, /* checked */
[ROM_API_INDEX_SFlash_Set_IDbus_Cfg] = (uint32_t)SFlash_Set_IDbus_Cfg, /* checked */
[ROM_API_INDEX_SFlash_IDbus_Read_Enable] = (uint32_t)SFlash_IDbus_Read_Enable, /* checked */
[ROM_API_INDEX_SFlash_Cache_Enable_Set] = (uint32_t)SFlash_Cache_Enable_Set, /* checked (0x4000F108), verified */
[ROM_API_INDEX_SFlash_Cache_Flush] = (uint32_t)SFlash_Cache_Flush, /* checked */
[ROM_API_INDEX_SFlash_Cache_Read_Enable] = (uint32_t)SFlash_Cache_Read_Enable, /* checked */
[ROM_API_INDEX_SFlash_Cache_Hit_Count_Get] = (uint32_t)SFlash_Cache_Hit_Count_Get, /* checked */
[ROM_API_INDEX_SFlash_Cache_Miss_Count_Get] = (uint32_t)SFlash_Cache_Miss_Count_Get, /* checked */
[ROM_API_INDEX_SFlash_Cache_Read_Disable] = (uint32_t)SFlash_Cache_Read_Disable, /* checked */
[ROM_API_INDEX_SFlash_Read] = (uint32_t)SFlash_Read, /* checked, verified */
[ROM_API_INDEX_SF_Ctrl_Enable] = (uint32_t)SF_Ctrl_Enable, /* checked */
[ROM_API_INDEX_SF_Ctrl_Set_Owner] = (uint32_t)SF_Ctrl_Set_Owner, /* checked */
[ROM_API_INDEX_SF_Ctrl_Disable] = (uint32_t)SF_Ctrl_Disable, /* checked */
[ROM_API_INDEX_SF_Ctrl_Select_Pad] = (uint32_t)SF_Ctrl_Select_Pad, /* checked */
[ROM_API_INDEX_SF_Ctrl_AES_Enable_BE] = (uint32_t)SF_Ctrl_AES_Enable_BE, /* checked */
[ROM_API_INDEX_SF_Ctrl_AES_Enable_LE] = (uint32_t)SF_Ctrl_AES_Enable_LE, /* checked */
[ROM_API_INDEX_SF_Ctrl_AES_Set_Region] = (uint32_t)SF_Ctrl_AES_Set_Region, /* checked */
[ROM_API_INDEX_SF_Ctrl_AES_Set_Key] = (uint32_t)SF_Ctrl_AES_Set_Key, /* __REV */
[ROM_API_INDEX_SF_Ctrl_AES_Set_Key_BE] = (uint32_t)SF_Ctrl_AES_Set_Key_BE, /* checked */
[ROM_API_INDEX_SF_Ctrl_AES_Set_IV] = (uint32_t)SF_Ctrl_AES_Set_IV, /* __REV */
[ROM_API_INDEX_SF_Ctrl_AES_Set_IV_BE] = (uint32_t)SF_Ctrl_AES_Set_IV_BE, /* __REV */
[ROM_API_INDEX_SF_Ctrl_AES_Enable] = (uint32_t)SF_Ctrl_AES_Enable, /* checked */
[ROM_API_INDEX_SF_Ctrl_AES_Disable] = (uint32_t)SF_Ctrl_AES_Disable, /* checked */
[ROM_API_INDEX_SF_Ctrl_Set_Flash_Image_Offset] = (uint32_t)SF_Ctrl_Set_Flash_Image_Offset, /* checked */
[ROM_API_INDEX_SF_Ctrl_Get_Flash_Image_Offset] = (uint32_t)SF_Ctrl_Get_Flash_Image_Offset, /* checked */
[ROM_API_INDEX_SF_Ctrl_Select_Clock] = (uint32_t)SF_Ctrl_Select_Clock, /* checked */
[ROM_API_INDEX_SF_Ctrl_SendCmd] = (uint32_t)SF_Ctrl_SendCmd, /* checked */
[ROM_API_INDEX_SF_Ctrl_Icache_Set] = (uint32_t)SF_Ctrl_Icache_Set, /* checked */
[ROM_API_INDEX_SF_Ctrl_Icache2_Set] = (uint32_t)SF_Ctrl_Icache2_Set, /* checked */
[ROM_API_INDEX_SF_Ctrl_GetBusyState] = (uint32_t)SF_Ctrl_GetBusyState, /* checked */
[ROM_API_INDEX_SF_Cfg_Deinit_Ext_Flash_Gpio] = (uint32_t)SF_Cfg_Deinit_Ext_Flash_Gpio, /* checked */
[ROM_API_INDEX_SF_Cfg_Init_Ext_Flash_Gpio] = (uint32_t)SF_Cfg_Init_Ext_Flash_Gpio, /* checked */
[ROM_API_INDEX_SF_Cfg_Restore_GPIO17_Fun] = (uint32_t)SF_Cfg_Restore_GPIO17_Fun, /* checked */
[ROM_API_INDEX_SF_Cfg_Get_Flash_Cfg_Need_Lock] = (uint32_t)SF_Cfg_Get_Flash_Cfg_Need_Lock, /* checked */
[ROM_API_INDEX_SF_Cfg_Init_Flash_Gpio] = (uint32_t)SF_Cfg_Init_Flash_Gpio, /* checked */
[ROM_API_INDEX_SF_Cfg_Flash_Identify] = (uint32_t)SF_Cfg_Flash_Identify, /* checked, verified */
[ROM_API_INDEX_FUNC_INVALID_START ... ROM_API_INDEX_FUNC_LAST_ENTRY] = 0xdeedbeef,
};
/*@} end of group ROMDRIVER_Private_Type*/
/** @defgroup ROMDRIVER_Private_Defines
* @{
*/
/*@} end of group ROMDRIVER_Private_Defines */
/** @defgroup ROMDRIVER_Private_Variables
* @{
*/
/*@} end of group ROMDRIVER_Private_Variables */
/** @defgroup ROMDRIVER_Global_Variables
* @{
*/
/*@} end of group ROMDRIVER_Global_Variables */
/** @defgroup ROMDRIVER_Private_FunctionDeclaration
* @{
*/
/*@} end of group ROMDRIVER_Private_FunctionDeclaration */
/** @defgroup ROMDRIVER_Private_Functions
* @{
*/
/*@} end of group ROMDRIVER_Private_Functions */
/** @defgroup ROMDRIVER_Public_Functions
* @{
*/
/*@} end of group ROMDRIVER_Public_Functions */
/*@} end of group ROMDRIVER_COMMON */
/*@} end of group BL602_Periph_Driver */
|
mkroman/bl602-604
|
components/bl602/bl602_std/bl602_std/StdDriver/Src/bl602_romapi.c
|
#include "bl602_romdriver.h"
__ALWAYS_INLINE ATTR_TCM_SECTION ATTR_TCM_SECTION
void SFlash_Init(const SF_Ctrl_Cfg_Type *pSfCtrlCfg) {
RomDriver_SFlash_Init(pSfCtrlCfg);
}
__ALWAYS_INLINE ATTR_TCM_SECTION ATTR_TCM_SECTION
BL_Err_Type SFlash_SetSPIMode(SF_Ctrl_Mode_Type mode) {
return RomDriver_SFlash_SetSPIMode(mode);
}
__ALWAYS_INLINE ATTR_TCM_SECTION ATTR_TCM_SECTION
BL_Err_Type SFlash_Read_Reg(SPI_Flash_Cfg_Type *flashCfg,uint8_t regIndex,uint8_t *regValue,uint8_t regLen) {
return RomDriver_SFlash_Read_Reg(flashCfg, regIndex, regValue, regLen);
}
__ALWAYS_INLINE ATTR_TCM_SECTION ATTR_TCM_SECTION
BL_Err_Type SFlash_Write_Reg(SPI_Flash_Cfg_Type *flashCfg,uint8_t regIndex,uint8_t *regValue,uint8_t regLen) {
return RomDriver_SFlash_Write_Reg(flashCfg, regIndex, regValue, regLen);
}
__ALWAYS_INLINE ATTR_TCM_SECTION ATTR_TCM_SECTION
BL_Sts_Type SFlash_Busy(SPI_Flash_Cfg_Type *flashCfg) {
return RomDriver_SFlash_Busy(flashCfg);
}
__ALWAYS_INLINE ATTR_TCM_SECTION ATTR_TCM_SECTION
BL_Err_Type SFlash_Write_Enable(SPI_Flash_Cfg_Type *flashCfg) {
return RomDriver_SFlash_Write_Enable(flashCfg);
}
__ALWAYS_INLINE ATTR_TCM_SECTION ATTR_TCM_SECTION
BL_Err_Type SFlash_Qspi_Enable(SPI_Flash_Cfg_Type *flashCfg) {
return RomDriver_SFlash_Qspi_Enable(flashCfg);
}
__ALWAYS_INLINE ATTR_TCM_SECTION ATTR_TCM_SECTION
void SFlash_Volatile_Reg_Write_Enable(SPI_Flash_Cfg_Type *flashCfg) {
RomDriver_SFlash_Volatile_Reg_Write_Enable(flashCfg);
}
__ALWAYS_INLINE ATTR_TCM_SECTION ATTR_TCM_SECTION
BL_Err_Type SFlash_Chip_Erase(SPI_Flash_Cfg_Type *flashCfg) {
return RomDriver_SFlash_Chip_Erase(flashCfg);
}
__ALWAYS_INLINE ATTR_TCM_SECTION ATTR_TCM_SECTION
BL_Err_Type SFlash_Sector_Erase(SPI_Flash_Cfg_Type *flashCfg,uint32_t secNum) {
return RomDriver_SFlash_Sector_Erase(flashCfg, secNum);
}
__ALWAYS_INLINE ATTR_TCM_SECTION ATTR_TCM_SECTION
BL_Err_Type SFlash_Blk32_Erase(SPI_Flash_Cfg_Type *flashCfg,uint32_t blkNum) {
return RomDriver_SFlash_Blk32_Erase(flashCfg, blkNum);
}
__ALWAYS_INLINE ATTR_TCM_SECTION ATTR_TCM_SECTION
BL_Err_Type SFlash_Blk64_Erase(SPI_Flash_Cfg_Type *flashCfg,uint32_t blkNum) {
return RomDriver_SFlash_Blk64_Erase(flashCfg, blkNum);
}
__ALWAYS_INLINE ATTR_TCM_SECTION ATTR_TCM_SECTION
BL_Err_Type SFlash_Erase(SPI_Flash_Cfg_Type *flashCfg,uint32_t startaddr,uint32_t endaddr) {
return RomDriver_SFlash_Erase(flashCfg, startaddr, endaddr);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Err_Type SFlash_Program(SPI_Flash_Cfg_Type *flashCfg, SF_Ctrl_IO_Type ioMode,uint32_t addr,uint8_t *data, uint32_t len) {
return RomDriver_SFlash_Program(flashCfg, ioMode, addr, data, len);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
void SFlash_GetUniqueId(uint8_t *data,uint8_t idLen) {
RomDriver_SFlash_GetUniqueId(data, idLen);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
void SFlash_GetJedecId(SPI_Flash_Cfg_Type *flashCfg,uint8_t *data) {
RomDriver_SFlash_GetJedecId(flashCfg, data);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
void SFlash_GetDeviceId(uint8_t *data) {
RomDriver_SFlash_GetDeviceId(data);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
void SFlash_Powerdown(void) {
RomDriver_SFlash_Powerdown();
}
__ALWAYS_INLINE ATTR_TCM_SECTION
void SFlash_Releae_Powerdown(SPI_Flash_Cfg_Type *flashCfg) {
RomDriver_SFlash_Releae_Powerdown(flashCfg);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
void SFlash_SetBurstWrap(SPI_Flash_Cfg_Type *flashCfg) {
RomDriver_SFlash_SetBurstWrap(flashCfg);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
void SFlash_DisableBurstWrap(SPI_Flash_Cfg_Type *flashCfg) {
RomDriver_SFlash_DisableBurstWrap(flashCfg);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Err_Type SFlash_Software_Reset(SPI_Flash_Cfg_Type *flashCfg) {
return RomDriver_SFlash_Software_Reset(flashCfg);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
void SFlash_Reset_Continue_Read(SPI_Flash_Cfg_Type *flashCfg) {
return RomDriver_SFlash_Reset_Continue_Read(flashCfg);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Err_Type SFlash_Set_IDbus_Cfg(SPI_Flash_Cfg_Type *flashCfg,
SF_Ctrl_IO_Type ioMode,uint8_t contRead,uint32_t addr,uint32_t len) {
return RomDriver_SFlash_Set_IDbus_Cfg(flashCfg, ioMode, contRead, addr, len);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Err_Type SFlash_IDbus_Read_Enable(SPI_Flash_Cfg_Type *flashCfg,SF_Ctrl_IO_Type ioMode,uint8_t contRead) {
return RomDriver_SFlash_IDbus_Read_Enable(flashCfg, ioMode, contRead);
}
#if 0
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Err_Type SFlash_Cache_Enable_Set(uint8_t wayDisable) {
return RomDriver_SFlash_Cache_Enable_Set(wayDisable);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Err_Type SFlash_Cache_Flush(void) {
return RomDriver_SFlash_Cache_Flush();
}
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Err_Type SFlash_Cache_Read_Enable(SPI_Flash_Cfg_Type *flashCfg,
SF_Ctrl_IO_Type ioMode,uint8_t contRead,uint8_t wayDisable) {
return RomDriver_SFlash_Cache_Read_Enable(flashCfg, ioMode, contRead, wayDisable);
}
#endif
__ALWAYS_INLINE ATTR_TCM_SECTION
void SFlash_Cache_Hit_Count_Get(uint32_t *hitCountLow,uint32_t *hitCountHigh) {
RomDriver_SFlash_Cache_Hit_Count_Get(hitCountLow, hitCountHigh);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
uint32_t SFlash_Cache_Miss_Count_Get(void) {
return RomDriver_SFlash_Cache_Miss_Count_Get();
}
__ALWAYS_INLINE ATTR_TCM_SECTION
void SFlash_Cache_Read_Disable(void) {
RomDriver_SFlash_Cache_Read_Disable();
}
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Err_Type SFlash_Read(SPI_Flash_Cfg_Type *flashCfg,
SF_Ctrl_IO_Type ioMode,uint8_t contRead,uint32_t addr,uint8_t *data, uint32_t len) {
return RomDriver_SFlash_Read(flashCfg, ioMode, contRead, addr, data, len);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Err_Type AON_Power_On_MBG(void) {
return RomDriver_AON_Power_On_MBG();
}
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Err_Type AON_Power_Off_MBG(void) {
return RomDriver_AON_Power_Off_MBG();
}
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Err_Type AON_Power_On_XTAL(void) {
return RomDriver_AON_Power_On_XTAL();
}
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Err_Type AON_Set_Xtal_CapCode(uint8_t capIn,uint8_t capOut) {
return RomDriver_AON_Set_Xtal_CapCode(capIn, capOut);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Err_Type AON_Power_Off_XTAL(void) {
return RomDriver_AON_Power_Off_XTAL();
}
__ALWAYS_INLINE ATTR_TCM_SECTION
void SF_Ctrl_Enable(const SF_Ctrl_Cfg_Type *cfg) {
RomDriver_SF_Ctrl_Enable(cfg);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
void SF_Ctrl_Set_Owner(SF_Ctrl_Owner_Type owner) {
RomDriver_SF_Ctrl_Set_Owner(owner);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
void SF_Ctrl_Disable(void) {
RomDriver_SF_Ctrl_Disable();
}
__ALWAYS_INLINE ATTR_TCM_SECTION
void SF_Ctrl_Select_Pad(SF_Ctrl_Pad_Sel sel) {
RomDriver_SF_Ctrl_Select_Pad(sel);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
void SF_Ctrl_AES_Enable_BE(void) {
RomDriver_SF_Ctrl_AES_Enable_BE();
}
__ALWAYS_INLINE ATTR_TCM_SECTION
void SF_Ctrl_AES_Enable_LE(void) {
RomDriver_SF_Ctrl_AES_Enable_LE();
}
__ALWAYS_INLINE ATTR_TCM_SECTION
void SF_Ctrl_AES_Set_Region(uint8_t region,uint8_t enable,
uint8_t hwKey,uint32_t startAddr,uint32_t endAddr,uint8_t locked) {
RomDriver_SF_Ctrl_AES_Set_Region(region, enable, hwKey, startAddr, endAddr, locked);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
void SF_Ctrl_AES_Set_Key(uint8_t region,uint8_t *key, SF_Ctrl_AES_Key_Type keyType) {
RomDriver_SF_Ctrl_AES_Set_Key(region, key, keyType);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
void SF_Ctrl_AES_Set_Key_BE(uint8_t region,uint8_t *key, SF_Ctrl_AES_Key_Type keyType) {
RomDriver_SF_Ctrl_AES_Set_Key_BE(region, key, keyType);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
void SF_Ctrl_AES_Set_IV(uint8_t region,uint8_t *iv,uint32_t addrOffset) {
RomDriver_SF_Ctrl_AES_Set_IV(region, iv, addrOffset);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
void SF_Ctrl_AES_Set_IV_BE(uint8_t region,uint8_t *iv,uint32_t addrOffset) {
RomDriver_SF_Ctrl_AES_Set_IV_BE(region, iv, addrOffset);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
void SF_Ctrl_AES_Enable(void) {
RomDriver_SF_Ctrl_AES_Enable();
}
__ALWAYS_INLINE ATTR_TCM_SECTION
void SF_Ctrl_AES_Disable(void) {
RomDriver_SF_Ctrl_AES_Disable();
}
__ALWAYS_INLINE ATTR_TCM_SECTION
void SF_Ctrl_Set_Flash_Image_Offset(uint32_t addrOffset) {
RomDriver_SF_Ctrl_Set_Flash_Image_Offset(addrOffset);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
uint32_t SF_Ctrl_Get_Flash_Image_Offset(void) {
return RomDriver_SF_Ctrl_Get_Flash_Image_Offset();
}
__ALWAYS_INLINE ATTR_TCM_SECTION
void SF_Ctrl_Select_Clock(SF_Ctrl_Sahb_Type sahbType) {
RomDriver_SF_Ctrl_Select_Clock(sahbType);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
void SF_Ctrl_SendCmd(SF_Ctrl_Cmd_Cfg_Type *cfg) {
RomDriver_SF_Ctrl_SendCmd(cfg);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
void SF_Ctrl_Icache_Set(SF_Ctrl_Cmd_Cfg_Type *cfg,uint8_t cmdValid) {
RomDriver_SF_Ctrl_Icache_Set(cfg, cmdValid);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
void SF_Ctrl_Icache2_Set(SF_Ctrl_Cmd_Cfg_Type *cfg,uint8_t cmdValid) {
RomDriver_SF_Ctrl_Icache2_Set(cfg, cmdValid);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Sts_Type SF_Ctrl_GetBusyState(void) {
return RomDriver_SF_Ctrl_GetBusyState();
}
__ALWAYS_INLINE ATTR_TCM_SECTION
void SF_Cfg_Deinit_Ext_Flash_Gpio(uint8_t extFlashPin) {
RomDriver_SF_Cfg_Deinit_Ext_Flash_Gpio(extFlashPin);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
void SF_Cfg_Init_Ext_Flash_Gpio(uint8_t extFlashPin) {
RomDriver_SF_Cfg_Init_Ext_Flash_Gpio(extFlashPin);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
void SF_Cfg_Restore_GPIO17_Fun(uint8_t fun) {
RomDriver_SF_Cfg_Restore_GPIO17_Fun(fun);
}
#if 0
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Err_Type SF_Cfg_Get_Flash_Cfg_Need_Lock(uint32_t flashID,SPI_Flash_Cfg_Type * pFlashCfg) {
return RomDriver_SF_Cfg_Get_Flash_Cfg_Need_Lock(flashID, pFlashCfg);
}
#endif
__ALWAYS_INLINE ATTR_TCM_SECTION
void SF_Cfg_Init_Flash_Gpio(uint8_t flashPinCfg,uint8_t restoreDefault) {
RomDriver_SF_Cfg_Init_Flash_Gpio(flashPinCfg, restoreDefault);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
uint32_t SF_Cfg_Flash_Identify(uint8_t callFromFlash,uint32_t autoScan,uint32_t flashPinCfg,uint8_t restoreDefault,
SPI_Flash_Cfg_Type * pFlashCfg) {
return RomDriver_SF_Cfg_Flash_Identify(callFromFlash, autoScan, flashPinCfg, restoreDefault, pFlashCfg);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Err_Type XIP_SFlash_State_Save(SPI_Flash_Cfg_Type *pFlashCfg,uint32_t *offset) {
return RomDriver_XIP_SFlash_State_Save(pFlashCfg, offset);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Err_Type XIP_SFlash_State_Restore(SPI_Flash_Cfg_Type *pFlashCfg,uint32_t offset) {
return RomDriver_XIP_SFlash_State_Restore(pFlashCfg, offset);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Err_Type XIP_SFlash_Erase_Need_Lock(SPI_Flash_Cfg_Type *pFlashCfg,uint32_t startaddr,uint32_t endaddr) {
return RomDriver_XIP_SFlash_Erase_Need_Lock(pFlashCfg, startaddr, endaddr);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Err_Type XIP_SFlash_Write_Need_Lock(SPI_Flash_Cfg_Type *pFlashCfg,uint32_t addr,uint8_t *data, uint32_t len) {
return RomDriver_XIP_SFlash_Write_Need_Lock(pFlashCfg, addr, data, len);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Err_Type XIP_SFlash_Read_Need_Lock(SPI_Flash_Cfg_Type *pFlashCfg,uint32_t addr,uint8_t *data, uint32_t len) {
return RomDriver_XIP_SFlash_Read_Need_Lock(pFlashCfg, addr, data, len);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Err_Type XIP_SFlash_GetJedecId_Need_Lock(SPI_Flash_Cfg_Type *pFlashCfg,uint8_t *data) {
return RomDriver_XIP_SFlash_GetJedecId_Need_Lock(pFlashCfg, data);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Err_Type XIP_SFlash_GetDeviceId_Need_Lock(SPI_Flash_Cfg_Type *pFlashCfg,uint8_t *data) {
return RomDriver_XIP_SFlash_GetDeviceId_Need_Lock(pFlashCfg, data);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Err_Type XIP_SFlash_GetUniqueId_Need_Lock(SPI_Flash_Cfg_Type *pFlashCfg,uint8_t *data,uint8_t idLen) {
return RomDriver_XIP_SFlash_GetUniqueId_Need_Lock(pFlashCfg, data, idLen);
}
#if 0
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Err_Type XIP_SFlash_Read_Via_Cache_Need_Lock(uint32_t addr,uint8_t *data, uint32_t len) {
return RomDriver_XIP_SFlash_Read_Via_Cache_Need_Lock(addr, data, len);
}
#endif
__ALWAYS_INLINE ATTR_TCM_SECTION
int XIP_SFlash_Read_With_Lock(SPI_Flash_Cfg_Type *pFlashCfg,uint32_t addr, uint8_t *dst, int len) {
return RomDriver_XIP_SFlash_Read_With_Lock(pFlashCfg, addr, dst, len);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
int XIP_SFlash_Write_With_Lock(SPI_Flash_Cfg_Type *pFlashCfg,uint32_t addr, uint8_t *src, int len) {
return RomDriver_XIP_SFlash_Write_With_Lock(pFlashCfg, addr, src, len);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
int XIP_SFlash_Erase_With_Lock(SPI_Flash_Cfg_Type *pFlashCfg,uint32_t addr, int len) {
return RomDriver_XIP_SFlash_Erase_With_Lock(pFlashCfg, addr, len);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
void ASM_Delay_Us(uint32_t core,uint32_t cnt) {
RomDriver_ASM_Delay_Us(core, cnt);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
void BL602_Delay_US(uint32_t cnt) {
RomDriver_BL602_Delay_US(cnt);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
void BL602_Delay_MS(uint32_t cnt) {
RomDriver_BL602_Delay_MS(cnt);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
void* BL602_MemCpy(void *dst, const void *src, uint32_t n) {
return RomDriver_BL602_MemCpy(dst, src, n);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
uint32_t* BL602_MemCpy4(uint32_t *dst, const uint32_t *src, uint32_t n) {
return RomDriver_BL602_MemCpy4(dst, src, n);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
void* BL602_MemCpy_Fast(void *pdst, const void *psrc, uint32_t n) {
return RomDriver_BL602_MemCpy_Fast(pdst, psrc, n);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
void* BL602_MemSet(void *s, uint8_t c, uint32_t n) {
return RomDriver_BL602_MemSet(s, c, n);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
uint32_t* BL602_MemSet4(uint32_t *dst, const uint32_t val, uint32_t n) {
return RomDriver_BL602_MemSet4(dst, val, n);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
int BL602_MemCmp(const void *s1, const void *s2, uint32_t n) {
return RomDriver_BL602_MemCmp(s1, s2, n);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
uint32_t BFLB_Soft_CRC32(void *dataIn, uint32_t len) {
return RomDriver_BFLB_Soft_CRC32(dataIn, len);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
GLB_ROOT_CLK_Type GLB_Get_Root_CLK_Sel(void) {
return RomDriver_GLB_Get_Root_CLK_Sel();
}
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Err_Type GLB_Set_System_CLK_Div(uint8_t hclkDiv,uint8_t bclkDiv) {
return RomDriver_GLB_Set_System_CLK_Div(hclkDiv, bclkDiv);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Err_Type Update_SystemCoreClockWith_XTAL(GLB_PLL_XTAL_Type xtalType) {
return RomDriver_Update_SystemCoreClockWith_XTAL(xtalType);
}
#if 0
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Err_Type GLB_Set_System_CLK(GLB_PLL_XTAL_Type xtalType,GLB_SYS_CLK_Type clkFreq) {
return RomDriver_GLB_Set_System_CLK(xtalType, clkFreq);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Err_Type System_Core_Clock_Update_From_RC32M(void) {
return RomDriver_System_Core_Clock_Update_From_RC32M();
}
#endif
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Err_Type GLB_Set_SF_CLK(uint8_t enable,GLB_SFLASH_CLK_Type clkSel,uint8_t div) {
return RomDriver_GLB_Set_SF_CLK(enable, clkSel, div);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Err_Type GLB_SW_System_Reset(void) {
return RomDriver_GLB_SW_System_Reset();
}
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Err_Type GLB_SW_CPU_Reset(void) {
return RomDriver_GLB_SW_CPU_Reset();
}
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Err_Type GLB_SW_POR_Reset(void) {
return RomDriver_GLB_SW_POR_Reset();
}
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Err_Type GLB_Select_Internal_Flash(void) {
return RomDriver_GLB_Select_Internal_Flash();
}
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Err_Type GLB_Swap_Flash_Pin(void) {
return RomDriver_GLB_Swap_Flash_Pin();
}
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Err_Type GLB_GPIO_Init(GLB_GPIO_Cfg_Type *cfg) {
return RomDriver_GLB_GPIO_Init(cfg);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Err_Type GLB_Deswap_Flash_Pin(void) {
return RomDriver_GLB_Deswap_Flash_Pin();
}
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Err_Type GLB_Select_External_Flash(void) {
return RomDriver_GLB_Select_External_Flash();
}
__ALWAYS_INLINE ATTR_TCM_SECTION
uint8_t GLB_GPIO_Get_Fun(GLB_GPIO_Type gpioPin) {
return RomDriver_GLB_GPIO_Get_Fun(gpioPin);
}
#if 0
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Sts_Type EF_Ctrl_Busy(void) {
return RomDriver_EF_Ctrl_Busy();
}
__ALWAYS_INLINE ATTR_TCM_SECTION
void EF_Ctrl_Sw_AHB_Clk_0(void) {
RomDriver_EF_Ctrl_Sw_AHB_Clk_0();
}
__ALWAYS_INLINE ATTR_TCM_SECTION
void EF_Ctrl_Load_Efuse_R0(void) {
RomDriver_EF_Ctrl_Load_Efuse_R0(); /* TODO: check */
}
__ALWAYS_INLINE ATTR_TCM_SECTION
uint8_t EF_Ctrl_Get_Trim_Parity(uint32_t val,uint8_t len) {
return RomDriver_EF_Ctrl_Get_Trim_Parity(val, len);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
void EF_Ctrl_Read_RC32K_Trim( Efuse_Ana_RC32K_Trim_Type *trim) {
RomDriver_EF_Ctrl_Read_RC32K_Trim(trim);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
void EF_Ctrl_Read_RC32M_Trim( Efuse_Ana_RC32M_Trim_Type *trim) {
RomDriver_EF_Ctrl_Read_RC32M_Trim(trim);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Err_Type PDS_Trim_RC32M(void) {
return RomDriver_PDS_Trim_RC32M();
}
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Err_Type PDS_Select_RC32M_As_PLL_Ref(void) {
return RomDriver_PDS_Select_RC32M_As_PLL_Ref();
}
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Err_Type PDS_Select_XTAL_As_PLL_Ref(void) {
return RomDriver_PDS_Select_XTAL_As_PLL_Ref();
}
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Err_Type PDS_Power_On_PLL(PDS_PLL_XTAL_Type xtalType) {
return RomDriver_PDS_Power_On_PLL(xtalType);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Err_Type PDS_Enable_PLL_All_Clks(void) {
return RomDriver_PDS_Enable_PLL_All_Clks();
}
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Err_Type PDS_Disable_PLL_All_Clks(void) {
return RomDriver_PDS_Disable_PLL_All_Clks();
}
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Err_Type PDS_Enable_PLL_Clk(PDS_PLL_CLK_Type pllClk) {
return RomDriver_PDS_Enable_PLL_Clk(pllClk);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Err_Type PDS_Disable_PLL_Clk(PDS_PLL_CLK_Type pllClk) {
return RomDriver_PDS_Disable_PLL_Clk(pllClk);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Err_Type PDS_Power_Off_PLL(void) {
return RomDriver_PDS_Power_Off_PLL();
}
__ALWAYS_INLINE ATTR_TCM_SECTION
void HBN_Enable(uint8_t aGPIOIeCfg,HBN_LDO_LEVEL_Type ldoLevel,HBN_LEVEL_Type hbnLevel) {
RomDriver_HBN_Enable(aGPIOIeCfg, ldoLevel, hbnLevel);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Err_Type HBN_Reset(void) {
return RomDriver_HBN_Reset();
}
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Err_Type HBN_GPIO7_Dbg_Pull_Cfg(BL_Fun_Type pupdEn,BL_Fun_Type iesmtEn,BL_Fun_Type dlyEn,uint8_t dlySec) {
return RomDriver_HBN_GPIO7_Dbg_Pull_Cfg(pupdEn, iesmtEn, dlyEn, dlySec);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Err_Type HBN_Trim_RC32K(void) {
return RomDriver_HBN_Trim_RC32K();
}
__ALWAYS_INLINE ATTR_TCM_SECTION
BL_Err_Type HBN_Set_ROOT_CLK_Sel(HBN_ROOT_CLK_Type rootClk) {
return RomDriver_HBN_Set_ROOT_CLK_Sel(rootClk);
}
#endif
|
mkroman/bl602-604
|
components/network/ble/blestack/src/services/ble_tp_svc.c
|
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/****************************************************************************
FILE NAME
ble_tp_svc.c
DESCRIPTION
NOTES
*/
/****************************************************************************/
#include <errno.h>
#include <stdbool.h>
#include "bluetooth.h"
#include "conn.h"
#include "gatt.h"
#include "uuid.h"
#include "ble_tp_svc.h"
static void ble_tp_connected(struct bt_conn *conn, u8_t err);
static void ble_tp_disconnected(struct bt_conn *conn, u8_t reason);
struct bt_conn *ble_tp_conn;
static struct bt_conn_cb ble_tp_conn_callbacks = {
.connected = ble_tp_connected,
.disconnected = ble_tp_disconnected,
};
/*************************************************************************
NAME
ble_tp_connected
*/
static void ble_tp_connected(struct bt_conn *conn, u8_t err)
{
printf("%s\n",__func__);
ble_tp_conn = conn;
}
/*************************************************************************
NAME
ble_tp_disconnected
*/
static void ble_tp_disconnected(struct bt_conn *conn, u8_t reason)
{
printf("%s\n",__func__);
ble_tp_conn = NULL;
}
/*************************************************************************
NAME
ble_tp_notify
*/
int ble_tp_notify()
{
int err = -1;
u16_t slen = 244;
char data[244] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09};
if(ble_tp_conn && enable_notify)
{
printf("bletp tx\n");
err = bt_gatt_notify(ble_tp_conn, get_attr(BT_CHAR_BLE_TP_TX_ATTR_INDEX), data, slen);
}
return err;
}
/*************************************************************************
NAME
ble_tp_ccc_cfg_changed
*/
static void ble_tp_ccc_cfg_changed(const struct bt_gatt_attr *attr, u16_t value)
{
enable_notify = (value == BT_GATT_CCC_NOTIFY);
printf("%s, Notify enable? %d\n", __func__, enable_notify);
}
/*************************************************************************
NAME
ble_tp_recv
*/
static int ble_tp_recv(struct bt_conn *conn,
const struct bt_gatt_attr *attr, const void *buf,
u16_t len, u16_t offset, u8_t flags)
{
printf("bletp rx\n");
return 0;
}
/*************************************************************************
* DEFINE : attrs
*/
static struct bt_gatt_attr attrs[]= {
BT_GATT_PRIMARY_SERVICE(BT_UUID_SVC_BLE_TP),
BT_GATT_CHARACTERISTIC(BT_UUID_CHAR_BLE_TP_TX,
BT_GATT_CHRC_NOTIFY,
BT_GATT_PERM_READ,
NULL,
NULL,
NULL),
BT_GATT_CCC(ble_tp_ccc_cfg_changed, BT_GATT_PERM_READ | BT_GATT_PERM_WRITE),
BT_GATT_CHARACTERISTIC(BT_UUID_CHAR_BLE_TP_RX,
BT_GATT_CHRC_WRITE_WITHOUT_RESP,
BT_GATT_PERM_READ | BT_GATT_PERM_WRITE,
NULL,
ble_tp_recv,
NULL)
};
/*************************************************************************
NAME
get_attr
*/
struct bt_gatt_attr *get_attr(u8_t index)
{
return &attrs[index];
}
struct bt_gatt_service ble_tp_server = BT_GATT_SERVICE(attrs);
/*************************************************************************
NAME
ble_tp_init
*/
void ble_tp_init()
{
bt_conn_cb_register(&ble_tp_conn_callbacks);
bt_gatt_service_register(&ble_tp_server);
}
|
mkroman/bl602-604
|
components/network/ble/blestack/src/common/atomic_c.c
|
<gh_stars>0
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/**
* @file Atomic ops in pure C
*
* This module provides the atomic operators for processors
* which do not support native atomic operations.
*
* The atomic operations are guaranteed to be atomic with respect
* to interrupt service routines, and to operations performed by peer
* processors.
*
* (originally from x86's atomic.c)
*/
#include <atomic.h>
#include "bl_port.h"
//#include <toolchain.h>
//#include <arch/cpu.h>
/**
*
* @brief Atomic compare-and-set primitive
*
* This routine provides the compare-and-set operator. If the original value at
* <target> equals <oldValue>, then <newValue> is stored at <target> and the
* function returns 1.
*
* If the original value at <target> does not equal <oldValue>, then the store
* is not done and the function returns 0.
*
* The reading of the original value at <target>, the comparison,
* and the write of the new value (if it occurs) all happen atomically with
* respect to both interrupts and accesses of other processors to <target>.
*
* @param target address to be tested
* @param old_value value to compare against
* @param new_value value to compare against
* @return Returns 1 if <new_value> is written, 0 otherwise.
*/
int atomic_cas(atomic_t *target, atomic_val_t old_value,
atomic_val_t new_value)
{
unsigned int key;
int ret = 0;
key = irq_lock();
if (*target == old_value) {
*target = new_value;
ret = 1;
}
irq_unlock(key);
return ret;
}
/**
*
* @brief Atomic addition primitive
*
* This routine provides the atomic addition operator. The <value> is
* atomically added to the value at <target>, placing the result at <target>,
* and the old value from <target> is returned.
*
* @param target memory location to add to
* @param value the value to add
*
* @return The previous value from <target>
*/
atomic_val_t atomic_add(atomic_t *target, atomic_val_t value)
{
unsigned int key;
atomic_val_t ret;
key = irq_lock();
ret = *target;
*target += value;
irq_unlock(key);
return ret;
}
/**
*
* @brief Atomic subtraction primitive
*
* This routine provides the atomic subtraction operator. The <value> is
* atomically subtracted from the value at <target>, placing the result at
* <target>, and the old value from <target> is returned.
*
* @param target the memory location to subtract from
* @param value the value to subtract
*
* @return The previous value from <target>
*/
atomic_val_t atomic_sub(atomic_t *target, atomic_val_t value)
{
unsigned int key;
atomic_val_t ret;
key = irq_lock();
ret = *target;
*target -= value;
irq_unlock(key);
return ret;
}
/**
*
* @brief Atomic increment primitive
*
* @param target memory location to increment
*
* This routine provides the atomic increment operator. The value at <target>
* is atomically incremented by 1, and the old value from <target> is returned.
*
* @return The value from <target> before the increment
*/
atomic_val_t atomic_inc(atomic_t *target)
{
unsigned int key;
atomic_val_t ret;
key = irq_lock();
ret = *target;
(*target)++;
irq_unlock(key);
return ret;
}
/**
*
* @brief Atomic decrement primitive
*
* @param target memory location to decrement
*
* This routine provides the atomic decrement operator. The value at <target>
* is atomically decremented by 1, and the old value from <target> is returned.
*
* @return The value from <target> prior to the decrement
*/
atomic_val_t atomic_dec(atomic_t *target)
{
unsigned int key;
atomic_val_t ret;
key = irq_lock();
ret = *target;
(*target)--;
irq_unlock(key);
return ret;
}
/**
*
* @brief Atomic get primitive
*
* @param target memory location to read from
*
* This routine provides the atomic get primitive to atomically read
* a value from <target>. It simply does an ordinary load. Note that <target>
* is expected to be aligned to a 4-byte boundary.
*
* @return The value read from <target>
*/
atomic_val_t atomic_get(const atomic_t *target)
{
return *target;
}
/**
*
* @brief Atomic get-and-set primitive
*
* This routine provides the atomic set operator. The <value> is atomically
* written at <target> and the previous value at <target> is returned.
*
* @param target the memory location to write to
* @param value the value to write
*
* @return The previous value from <target>
*/
atomic_val_t atomic_set(atomic_t *target, atomic_val_t value)
{
unsigned int key;
atomic_val_t ret;
key = irq_lock();
ret = *target;
*target = value;
irq_unlock(key);
return ret;
}
/**
*
* @brief Atomic clear primitive
*
* This routine provides the atomic clear operator. The value of 0 is atomically
* written at <target> and the previous value at <target> is returned. (Hence,
* atomic_clear(pAtomicVar) is equivalent to atomic_set(pAtomicVar, 0).)
*
* @param target the memory location to write
*
* @return The previous value from <target>
*/
atomic_val_t atomic_clear(atomic_t *target)
{
unsigned int key;
atomic_val_t ret;
key = irq_lock();
ret = *target;
*target = 0;
irq_unlock(key);
return ret;
}
/**
*
* @brief Atomic bitwise inclusive OR primitive
*
* This routine provides the atomic bitwise inclusive OR operator. The <value>
* is atomically bitwise OR'ed with the value at <target>, placing the result
* at <target>, and the previous value at <target> is returned.
*
* @param target the memory location to be modified
* @param value the value to OR
*
* @return The previous value from <target>
*/
atomic_val_t atomic_or(atomic_t *target, atomic_val_t value)
{
unsigned int key;
atomic_val_t ret;
key = irq_lock();
ret = *target;
*target |= value;
irq_unlock(key);
return ret;
}
/**
*
* @brief Atomic bitwise exclusive OR (XOR) primitive
*
* This routine provides the atomic bitwise exclusive OR operator. The <value>
* is atomically bitwise XOR'ed with the value at <target>, placing the result
* at <target>, and the previous value at <target> is returned.
*
* @param target the memory location to be modified
* @param value the value to XOR
*
* @return The previous value from <target>
*/
atomic_val_t atomic_xor(atomic_t *target, atomic_val_t value)
{
unsigned int key;
atomic_val_t ret;
key = <KEY>
ret = *target;
*target ^= value;
irq_unlock(key);
return ret;
}
/**
*
* @brief Atomic bitwise AND primitive
*
* This routine provides the atomic bitwise AND operator. The <value> is
* atomically bitwise AND'ed with the value at <target>, placing the result
* at <target>, and the previous value at <target> is returned.
*
* @param target the memory location to be modified
* @param value the value to AND
*
* @return The previous value from <target>
*/
atomic_val_t atomic_and(atomic_t *target, atomic_val_t value)
{
unsigned int key;
atomic_val_t ret;
key = <KEY>
ret = *target;
*target &= value;
irq_unlock(key);
return ret;
}
/**
*
* @brief Atomic bitwise NAND primitive
*
* This routine provides the atomic bitwise NAND operator. The <value> is
* atomically bitwise NAND'ed with the value at <target>, placing the result
* at <target>, and the previous value at <target> is returned.
*
* @param target the memory location to be modified
* @param value the value to NAND
*
* @return The previous value from <target>
*/
atomic_val_t atomic_nand(atomic_t *target, atomic_val_t value)
{
unsigned int key;
atomic_val_t ret;
key = irq_lock();
ret = *target;
*target = ~(*target & value);
irq_unlock(key);
return ret;
}
|
mkroman/bl602-604
|
components/network/ble/blestack/src/common/include/common/log.h
|
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @file
* @brief Bluetooth subsystem logging helpers.
*/
/*
* Copyright (c) 2017 Nordic Semiconductor ASA
* Copyright (c) 2015-2016 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef __BT_LOG_H
#define __BT_LOG_H
#include <zephyr.h>
#include <bluetooth.h>
#include <hci_host.h>
#ifdef __cplusplus
extern "C" {
#endif
#if !defined(BT_DBG_ENABLED)
#define BT_DBG_ENABLED 1
#endif
#if defined(BFLB_BLE)
#if defined(CFG_BLE_STACK_DBG_PRINT)
#define BT_DBG(fmt, ...)
#define BT_ERR(fmt, ...) printf(fmt"\r\n", ##__VA_ARGS__)
#if defined(CONFIG_BT_STACK_PTS)
#define BT_PTS_DBG(fmt, ...) printf(fmt"\r\n", ##__VA_ARGS__)
#endif
#define BT_WARN(fmt, ...)
#define BT_INFO(fmt, ...)
#else
#define BT_DBG(fmt, ...)
#define BT_ERR(fmt, ...)
#define BT_WARN(fmt, ...)
#define BT_INFO(fmt, ...)
#endif
#else
#if defined(CONFIG_BT_DEBUG_MONITOR)
#include <stdio.h>
/* These defines follow the values used by syslog(2) */
#define BT_LOG_ERR 3
#define BT_LOG_WARN 4
#define BT_LOG_INFO 6
#define BT_LOG_DBG 7
__printf_like(2, 3) void bt_log(int prio, const char *fmt, ...);
#define BT_DBG(fmt, ...) \
if (BT_DBG_ENABLED) { \
bt_log(BT_LOG_DBG, "%s (%p): " fmt, \
__func__, k_current_get(), ##__VA_ARGS__); \
}
#define BT_ERR(fmt, ...) bt_log(BT_LOG_ERR, "%s: " fmt, \
__func__, ##__VA_ARGS__)
#define BT_WARN(fmt, ...) bt_log(BT_LOG_WARN, "%s: " fmt, \
__func__, ##__VA_ARGS__)
#define BT_INFO(fmt, ...) bt_log(BT_LOG_INFO, fmt, ##__VA_ARGS__)
/* Enabling debug increases stack size requirement */
#define BT_STACK_DEBUG_EXTRA 300
#elif defined(CONFIG_BT_DEBUG_LOG)
#if !defined(SYS_LOG_DOMAIN)
#define SYS_LOG_DOMAIN "bt"
#endif
#define SYS_LOG_LEVEL SYS_LOG_LEVEL_DEBUG
#define BT_DBG(fmt, ...) \
if (BT_DBG_ENABLED) { \
SYS_LOG_DBG(fmt,\
##__VA_ARGS__); \
}
#define BT_ERR(fmt, ...) SYS_LOG_ERR(fmt, ##__VA_ARGS__)
#define BT_WARN(fmt, ...) SYS_LOG_WRN(fmt, ##__VA_ARGS__)
#define BT_INFO(fmt, ...) SYS_LOG_INF(fmt, ##__VA_ARGS__)
/* Enabling debug increases stack size requirement considerably */
#define BT_STACK_DEBUG_EXTRA 300
#else
#define BT_DBG(fmt, ...)
#define BT_ERR BT_DBG
#define BT_WARN BT_DBG
#define BT_INFO BT_DBG
#define BT_STACK_DEBUG_EXTRA 0
#endif
#endif //BFLB_BLE
#if defined(BFLB_BLE)
#if defined(CFG_DBG)
#define BT_ASSERT(cond) if (!(cond)) { \
while(1); \
}
#else
#define BT_ASSERT(cond)
#endif //PLF_DEBUG
#else
#define BT_ASSERT(cond) if (!(cond)) { \
BT_ERR("assert: '" #cond "' failed"); \
k_oops(); \
}
#endif
#define BT_STACK(name, size) \
K_THREAD_STACK_MEMBER(name, (size) + BT_STACK_DEBUG_EXTRA)
#define BT_STACK_NOINIT(name, size) \
K_THREAD_STACK_DEFINE(name, (size) + BT_STACK_DEBUG_EXTRA)
/* This helper is only available when BT_DEBUG is enabled */
const char *bt_hex(const void *buf, size_t len);
/* These helpers are only safe to be called from internal threads as they're
* not multi-threading safe
*/
const char *bt_addr_str(const bt_addr_t *addr);
const char *bt_addr_le_str(const bt_addr_le_t *addr);
#ifdef __cplusplus
}
#endif
#endif /* __BT_LOG_H */
|
mkroman/bl602-604
|
components/bl602/bl602_wifi/plf/refip/src/driver/phy/bl602_phy_rf/reg/reg_rf_fpga.h
|
<reponame>mkroman/bl602-604
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _REG_RF_FPGA_H_
#define _REG_RF_FPGA_H_
#include "co_int.h"
#include "arch.h"
#include "_reg_access.h"
static inline uint32_t fpga_rf_fsm_pu_sb_en_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001f00);
return ((localVal & ((uint32_t)0x80000000)) >> 31);
}
static inline void fpga_rf_fsm_pu_sb_en_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001f00);
localVal &= ~((uint32_t)0x80000000);
localVal |= (x << 31)&((uint32_t)0x80000000);
REG_PL_WR(0x40001f00,localVal);
}
static inline uint32_t fpga_rf_fsm_pu_lo_en_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001f00);
return ((localVal & ((uint32_t)0x40000000)) >> 30);
}
static inline void fpga_rf_fsm_pu_lo_en_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001f00);
localVal &= ~((uint32_t)0x40000000);
localVal |= (x << 30)&((uint32_t)0x40000000);
REG_PL_WR(0x40001f00,localVal);
}
static inline uint32_t fpga_rf_fsm_pu_tx_en_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001f00);
return ((localVal & ((uint32_t)0x20000000)) >> 29);
}
static inline void fpga_rf_fsm_pu_tx_en_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001f00);
localVal &= ~((uint32_t)0x20000000);
localVal |= (x << 29)&((uint32_t)0x20000000);
REG_PL_WR(0x40001f00,localVal);
}
static inline uint32_t fpga_rf_fsm_pu_rx_en_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001f00);
return ((localVal & ((uint32_t)0x10000000)) >> 28);
}
static inline void fpga_rf_fsm_pu_rx_en_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001f00);
localVal &= ~((uint32_t)0x10000000);
localVal |= (x << 28)&((uint32_t)0x10000000);
REG_PL_WR(0x40001f00,localVal);
}
static inline uint32_t fpga_rf_fsm_state_cci_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001f00);
return ((localVal & ((uint32_t)0x0f800000)) >> 23);
}
static inline uint32_t fpga_rf_fsm_gpio_first_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001f00);
return ((localVal & ((uint32_t)0x00020000)) >> 17);
}
static inline void fpga_rf_fsm_gpio_first_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001f00);
localVal &= ~((uint32_t)0x00020000);
localVal |= (x << 17)&((uint32_t)0x00020000);
REG_PL_WR(0x40001f00,localVal);
}
static inline uint32_t fpga_rf_fsm_en_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001f00);
return ((localVal & ((uint32_t)0x00010000)) >> 16);
}
static inline void fpga_rf_fsm_en_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001f00);
localVal &= ~((uint32_t)0x00010000);
localVal |= (x << 16)&((uint32_t)0x00010000);
REG_PL_WR(0x40001f00,localVal);
}
static inline uint32_t fpga_rf_fsm_st_cci_4s_en_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001f00);
return ((localVal & ((uint32_t)0x00000020)) >> 5);
}
static inline void fpga_rf_fsm_st_cci_4s_en_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001f00);
localVal &= ~((uint32_t)0x00000020);
localVal |= (x << 5)&((uint32_t)0x00000020);
REG_PL_WR(0x40001f00,localVal);
}
static inline uint32_t fpga_rf_fsm_st_cci_4s_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001f00);
return ((localVal & ((uint32_t)0x0000001f)) >> 0);
}
static inline void fpga_rf_fsm_st_cci_4s_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001f00);
localVal &= ~((uint32_t)0x0000001f);
localVal |= (x << 0)&((uint32_t)0x0000001f);
REG_PL_WR(0x40001f00,localVal);
}
static inline uint32_t fpga_rf_fsm_cci_wr_time_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001f04);
return ((localVal & ((uint32_t)0x00000fff)) >> 0);
}
static inline void fpga_rf_fsm_cci_wr_time_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001f04);
localVal &= ~((uint32_t)0x00000fff);
localVal |= (x << 0)&((uint32_t)0x00000fff);
REG_PL_WR(0x40001f04,localVal);
}
static inline uint32_t fpga_rf_fsm_dly_01_time_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001f08);
return ((localVal & ((uint32_t)0x0fff0000)) >> 16);
}
static inline void fpga_rf_fsm_dly_01_time_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001f08);
localVal &= ~((uint32_t)0x0fff0000);
localVal |= (x << 16)&((uint32_t)0x0fff0000);
REG_PL_WR(0x40001f08,localVal);
}
static inline uint32_t fpga_rf_fsm_dly_30_time_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001f08);
return ((localVal & ((uint32_t)0x00000fff)) >> 0);
}
static inline void fpga_rf_fsm_dly_30_time_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001f08);
localVal &= ~((uint32_t)0x00000fff);
localVal |= (x << 0)&((uint32_t)0x00000fff);
REG_PL_WR(0x40001f08,localVal);
}
static inline uint32_t fpga_rf_fsm_pu_sb_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001f0c);
return ((localVal & ((uint32_t)0xffffffff)) >> 0);
}
static inline void fpga_rf_fsm_pu_sb_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001f0c);
localVal &= ~((uint32_t)0xffffffff);
localVal |= (x << 0)&((uint32_t)0xffffffff);
REG_PL_WR(0x40001f0c,localVal);
}
static inline uint32_t fpga_rf_fsm_pu_lo_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001f10);
return ((localVal & ((uint32_t)0xffffffff)) >> 0);
}
static inline void fpga_rf_fsm_pu_lo_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001f10);
localVal &= ~((uint32_t)0xffffffff);
localVal |= (x << 0)&((uint32_t)0xffffffff);
REG_PL_WR(0x40001f10,localVal);
}
static inline uint32_t fpga_rf_fsm_pu_tx_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001f14);
return ((localVal & ((uint32_t)0xffffffff)) >> 0);
}
static inline void fpga_rf_fsm_pu_tx_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001f14);
localVal &= ~((uint32_t)0xffffffff);
localVal |= (x << 0)&((uint32_t)0xffffffff);
REG_PL_WR(0x40001f14,localVal);
}
static inline uint32_t fpga_rf_fsm_pu_rx_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001f18);
return ((localVal & ((uint32_t)0xffffffff)) >> 0);
}
static inline void fpga_rf_fsm_pu_rx_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001f18);
localVal &= ~((uint32_t)0xffffffff);
localVal |= (x << 0)&((uint32_t)0xffffffff);
REG_PL_WR(0x40001f18,localVal);
}
static inline uint32_t fpga_rf_fsm_cmd_en_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001f1c);
return ((localVal & ((uint32_t)0x0000ffff)) >> 0);
}
static inline void fpga_rf_fsm_cmd_en_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001f1c);
localVal &= ~((uint32_t)0x0000ffff);
localVal |= (x << 0)&((uint32_t)0x0000ffff);
REG_PL_WR(0x40001f1c,localVal);
}
#endif
|
mkroman/bl602-604
|
components/network/ble/blestack/src/cli_cmds/stack_cli_cmds.c
|
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdlib.h>
#include "conn.h"
#include "gatt.h"
#include "hci_core.h"
#include "FreeRTOS.h"
#include "task.h"
#include "cli.h"
#include "stack_cli_cmds.h"
#if defined(CONFIG_BT_STACK_PTS)
#include "keys.h"
#include "rpa.h"
#endif
#define PASSKEY_MAX 0xF423F
#define NAME_LEN 30
#define CHAR_SIZE_MAX 512
static u8_t selected_id = BT_ID_DEFAULT;
bool ble_inited = false;
#if defined(CONFIG_BT_CONN)
struct bt_conn *default_conn = NULL;
#endif
#if defined(CONFIG_BT_STACK_PTS)
#define LIM_ADV_TIME 30720
#define LIM_SCAN_TIME 10240
const u8_t peer_irk[16] =
{
0x01,0x23,0x45,0x67,0x89,0xab,0xcd,0xef,
0x01,0x23,0x45,0x67,0x89,0xab,0xcd,0xef
};
const u8_t pts_address[6] =
{
0xE9,0x20,0xF2,0xDC,0x1b,0x00
};
const u8_t discover_mode[] =
{
(BT_LE_AD_LIMITED | BT_LE_AD_NO_BREDR)
};
static const u8_t service_uuid[16] =
{
0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f
};
static const u8_t service_data[] = {0x00,0x01};
static const u8_t data_manu[4] = {0x71,0x01,0x04,0x13};
static const u8_t tx_power[1] = {0x50};
static const u8_t data_appearance[2] = {0x80, 0x01};
static const u8_t name[] = "BL70X-BLE-DEV";
extern volatile u8_t event_flag;
#endif
struct bt_data ad_discov[] = {
BT_DATA_BYTES(BT_DATA_FLAGS, (BT_LE_AD_GENERAL | BT_LE_AD_NO_BREDR)),
#if defined(BL602)
BT_DATA(BT_DATA_NAME_COMPLETE, "BL602-BLE-DEV", 13),
#else
BT_DATA(BT_DATA_NAME_COMPLETE, "BL70X-BLE-DEV", 13),
#endif
};
#if defined(BL602) || (BL702)
#define vOutputString(...) printf(__VA_ARGS__)
#else
#define vOutputString(...) bl_print(SYSTEM_UART_ID, PRINT_MODULE_BLE_STACK/*PRINT_MODULE_CLI*/, __VA_ARGS__)
#endif
static void cmd_init(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
static void cmd_get_device_name(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
static void cmd_set_device_name(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
static void cmd_start_scan(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
static void cmd_stop_scan(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
static void cmd_read_local_address(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
static void cmd_start_advertise(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
static void cmd_stop_advertise(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
static void cmd_connect_le(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
static void cmd_disconnect(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
static void cmd_select_conn(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
static void cmd_unpair(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
static void cmd_conn_update(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
static void cmd_security(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
static void cmd_auth(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
static void cmd_auth_cancel(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
static void cmd_auth_passkey_confirm(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
static void cmd_auth_pairing_confirm(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
static void cmd_auth_passkey(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
static void cmd_exchange_mtu(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
static void cmd_discover(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
static void cmd_read(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
static void cmd_write(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
static void cmd_write_without_rsp(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
static void cmd_subscribe(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
static void cmd_unsubscribe(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
static void cmd_set_data_len(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
#if defined(CONFIG_BT_STACK_PTS)
static void cmd_start_scan_timeout(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
static void cmd_add_dev_to_resolve_list(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
static void cmd_pts_address_register(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
static void cmd_set_flag(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
static void cmd_set_smp_flag(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
static void cmd_clear_smp_flag(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
static int cmd_bondable(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
static void cmd_read_uuid(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
static int cmd_mread(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
static void cmd_discover_uuid_128(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
static void cmd_read_uuid_128(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
#if defined(CONFIG_BT_SMP)
static void cmd_set_mitm(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
#endif
#if defined(PTS_GAP_SLAVER_CONFIG_NOTIFY_CHARC)
static void cmd_notify(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
#endif
#if defined(PTS_GAP_SLAVER_CONFIG_INDICATE_CHARC)
static void cmd_indicate(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
#endif
static int cmd_register_pts_svc(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
#if defined(CONFIG_BT_WHITELIST)
static int cmd_bt_le_whitelist_add(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
static int cmd_wl_connect(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
#endif
static void cmd_prepare_write(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
#endif
#if defined(CONFIG_SET_TX_PWR)
static void cmd_set_tx_pwr(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv);
#endif
#if defined(BL602)||(BL702)
const struct cli_command btStackCmdSet[] STATIC_CLI_CMD_ATTRIBUTE = {
#else
const struct cli_command btStackCmdSet[] = {
#endif
/*1.The cmd string to type, 2.Cmd description, 3.The function to run, 4.Number of parameters*/
{"cmd_init", "\r\ncmd_init:[Initialize]\r\n Parameter[Null]\r\n", cmd_init},
{"cmd_get_device_name", "\r\ncmd_get_device_name:[Read local device name]\r\n Parameter[Null]\r\n", cmd_get_device_name},
{"cmd_set_device_name", "\r\ncmd_set_device_name:\r\n\
[Lenth of name]\r\n\
[name]\r\n", cmd_set_device_name},
#if defined(CONFIG_BT_STACK_PTS)
{"cmd_pts_address_register", "\r\ncmd_pts_address_register:\r\n\
[Address type, 0:non-rpa, 1:rpa, 2:public adderss]\r\n\
[Pts_address, e.g.peer_addr]\r\n" , cmd_pts_address_register},
{"cmd_set_flag", "\r\ncmd_set_flag:[Set flag for different applications]\r\n\
[Flag, e.g.0,1]\r\n", cmd_set_flag},
{"cmd_set_smp_flag", "\r\ncmd_set_smp_flag:[Set flag for SM test]\r\n\
[Flag, e.g.0,1]\r\n", cmd_set_smp_flag},
{"cmd_clear_smp_flag", "\r\ncmd_clear_smp_flag:[Clear smp test flag]\r\n\
[Flag, e.g.0,1]\r\n", cmd_clear_smp_flag},
{"cmd_bondable", "\r\ncmd_bondable:[Enable or disable bond ]\r\n\
[State, e.g.0x01:bondable mode, 0x00:non-bondable mode]\r\n", cmd_bondable},
#endif
#if defined(CONFIG_BT_OBSERVER)
#if defined(CONFIG_BT_STACK_PTS)
{"cmd_start_scan", "\r\ncmd_start_scan:\r\n\
[Scan type, 0:passive scan, 1:active scan]\r\n\
[Duplicate filtering, 0:Disable duplicate filtering, 1:Enable duplicate filtering]\r\n\
[Scan interval, 0x0004-4000,e.g.0080]\r\n\
[Scan window, 0x0004-4000,e.g.0050]\r\n\
[Is_RPA,0:non-rpa, 1:rpa]\r\n", cmd_start_scan},
{"cmd_start_scan_timeout", "\r\ncmd_start_scan_timeout:\r\n\
[Scan type, 0:passive scan, 1:active scan]\r\n\
[Duplicate filtering, 0:Disable duplicate filtering, 1:Enable duplicate filtering]\r\n\
[Scan interval, 0x0004-4000,e.g.0080]\r\n\
[Scan window, 0x0004-4000,e.g.0050]\r\n\
[Is_RPA, 0:non-rpa, 1:rpa]\r\n",cmd_start_scan_timeout},
//[Time, e.g. 2800]\r\n" , cmd_start_scan_timeout},
{"cmd_add_dev_to_resolve_list", "\r\ncmd_add_dev_to_resolve_list:\r\n\
[Address type, 0:non-rpa, 1:rpa, 2:public adderss]\r\n\
[Peer_address, e.g.peer_addr]\r\n" , cmd_add_dev_to_resolve_list},
#else
{"cmd_start_scan", "\r\ncmd_start_scan:\r\n\
[Scan type, 0:passive scan, 1:active scan]\r\n\
[Duplicate filtering, 0:Disable duplicate filtering, 1:Enable duplicate filtering]\r\n\
[Scan interval, 0x0004-4000,e.g.0080]\r\n\
[Scan window, 0x0004-4000,e.g.0050]\r\n", cmd_start_scan},
#endif//CONFIG_BT_STACK_PTS
{"cmd_stop_scan", "\r\ncmd_stop_scan:[Stop scan]\r\n\
Parameter[Null]\r\n", cmd_stop_scan},
#endif
#if defined(CONFIG_BT_PERIPHERAL)
#if defined(CONFIG_BT_STACK_PTS)
{"cmd_start_adv", "\r\ncmd_start_adv:\r\n\
[Adv type,0:adv_ind,1:adv_scan_ind,2:adv_nonconn_ind 3: adv_direct_ind]\r\n\
[Mode, 0:discov, 1:non-discov,2:limit discoverable]\r\n\
[Addr_type, 0:non-rpa,1:rpa,2:public]\r\n\
[Adv Interval Min,0x0020-4000,e.g.0030]\r\n\
[Adv Interval Max,0x0020-4000,e.g.0060]\r\n", cmd_start_advertise},
#if defined(PTS_GAP_SLAVER_CONFIG_NOTIFY_CHARC)
{"cmd_notify", "\r\ncmd_notify:\r\n\
[Lenth, e.g. 0000]\r\n\
[Data, e.g. 00]\r\n",cmd_notify},
#endif /*PTS_GAP_SLAVER_CONFIG_NOTIFY_CHARC*/
#if defined(PTS_GAP_SLAVER_CONFIG_INDICATE_CHARC)
{"cmd_indicate", "\r\ncmd_indicate:\r\n\
[Lenth, e.g. 0000]\r\n\
[Data, e.g. 00]\r\n",cmd_indicate},
#endif /*PTS_GAP_SLAVER_CONFIG_NOTIFY_CHARC*/
{"cmd_register_pts_svc", "\r\ncmd_notify:\r\n",cmd_register_pts_svc},
#else
{"cmd_start_adv", "\r\ncmd_start_adv:\r\n\
[Adv type,0:adv_ind,1:adv_scan_ind,2:adv_nonconn_ind]\r\n\
[Mode, 0:discov, 1:non-discov]\r\n\
[Adv Interval Min,0x0020-4000,e.g.0030]\r\n\
[Adv Interval Max,0x0020-4000,e.g.0060]\r\n", cmd_start_advertise},
#endif /*CONFIG_BT_STACK_PTS*/
{"cmd_stop_adv", "\r\ncmd_stop_adv:[Stop advertising]\r\n\
Parameter[Null]\r\n", cmd_stop_advertise},
{"cmd_read_local_address", "\r\ncmd_read_local_address:[Read local address]\r\n",
cmd_read_local_address},
#endif //#if defined(CONFIG_BT_PERIPHERAL)
#if defined(CONFIG_BT_CONN)
#if defined(CONFIG_BT_CENTRAL)
#if defined(CONFIG_BT_STACK_PTS)
{"cmd_connect_le", "\r\ncmd_connect_le:[Connect remote device]\r\n\
[Address type,0:ADDR_RAND, 1:ADDR_RPA_OR_PUBLIC,2:ADDR_PUBLIC, 3:ADDR_RPA_OR_RAND]\r\n\
[Address value, e.g.112233AABBCC]\r\n", cmd_connect_le},
#if defined(CONFIG_BT_WHITELIST)
{"cmd_wl_connect", "\r\ncmd_wl_connect:[Autoconnect whilt list device]\r\n\
[Enable, 0x01:enable, 0x02:disable]\r\n\
[Address type, 0:ADDR_PUBLIC, 1:ADDR_RAND, 2:ADDR_RPA_OR_PUBLIC, 3:ADDR_RPA_OR_RAND]\r\n",cmd_wl_connect},
{"cmd_bt_le_whitelist_add", "\r\ncmd_bt_le_whitelist_add:[add device to white list]\r\n\
[Address type,0:ADDR_RAND, 1:ADDR_RPA_OR_PUBLIC,2:ADDR_PUBLIC, 3:ADDR_RPA_OR_RAND]\r\n\
[Address value, e.g.112233AABBCC]\r\n",cmd_bt_le_whitelist_add},
#endif
#else
{"cmd_connect_le", "\r\ncmd_connect_le:[Connect remote device]\r\n\
[Address type, 0:ADDR_PUBLIC, 1:ADDR_RAND, 2:ADDR_RPA_OR_PUBLIC, 3:ADDR_RPA_OR_RAND]\r\n\
[Address value, e.g.112233AABBCC]\r\n", cmd_connect_le},
#endif //CONFIG_BT_STACK_PTS
#endif //#if defined(CONFIG_BT_CENTRAL)
#if defined(CONFIG_BT_STACK_PTS)
{"cmd_disconnect", "\r\ncmd_disconnect:[Disconnect remote device]\r\n\
[Address type, 0:ADDR_RAND, 1:ADDR_RPA_OR_PUBLIC,2:ADDR_PUBLIC, 3:ADDR_RPA_OR_RAND]\r\n\
[Address value,e.g.112233AABBCC]\r\n", cmd_disconnect},
#else
{"cmd_disconnect", "\r\ncmd_disconnect:[Disconnect remote device]\r\n\
[Address type, 0:ADDR_PUBLIC, 1:ADDR_RAND, 2:ADDR_RPA_OR_PUBLIC, 3:ADDR_RPA_OR_RAND]\r\n\
[Address value,e.g.112233AABBCC]\r\n", cmd_disconnect},
#endif //CONFIG_BT_STACK_PTS
{"cmd_select_conn", "\r\ncmd_select_conn:[Select a specific connection]\r\n\
[Address type, 0:ADDR_PUBLIC, 1:ADDR_RAND, 2:ADDR_RPA_OR_PUBLIC, 3:ADDR_RPA_OR_RAND]\r\n\
[Address value, e.g.112233AABBCC]\r\n", cmd_select_conn},
{"cmd_unpair", "\r\ncmd_unpair:[Unpair connection]\r\n\
[Address type, 0:ADDR_PUBLIC, 1:ADDR_RAND, 2:ADDR_RPA_OR_PUBLIC, 3:ADDR_RPA_OR_RAND]\r\n\
[Address value, all 0: unpair all connection, otherwise:unpair specific connection]\r\n", cmd_unpair},
{"cmd_conn_update", "\r\ncmd_conn_update:\r\n\
[Conn Interval Min,0x0006-0C80,e.g.0030]\r\n\
[Conn Interval Max,0x0006-0C80,e.g.0030]\r\n\
[Conn Latency,0x0000-01f3,e.g.0004]\r\n\
[Supervision Timeout,0x000A-0C80,e.g.0010]\r\n", cmd_conn_update},
#endif //#if defined(CONFIG_BT_CONN)
#if defined(CONFIG_BT_SMP)
{"cmd_security", "\r\ncmd_security:[Start security]\r\n\
[Security level, Default value 4, 2:BT_SECURITY_MEDIUM, 3:BT_SECURITY_HIGH, 4:BT_SECURITY_FIPS]\r\n", cmd_security},
{"cmd_auth", "\r\ncmd_auth:[Register auth callback]\r\n", cmd_auth},
{"cmd_auth_cancel", "\r\ncmd_auth_cancel:[Register auth callback]\r\n", cmd_auth_cancel},
{"cmd_auth_passkey_confirm", "\r\ncmd_auth_passkey_confirm:[Confirm passkey]\r\n", cmd_auth_passkey_confirm},
{"cmd_auth_pairing_confirm", "\r\ncmd_auth_pairing_confirm:[Confirm pairing in secure connection]\r\n", cmd_auth_pairing_confirm},
{"cmd_auth_passkey", "\r\ncmd_auth_passkey:[Input passkey]\r\n\
[Passkey, 00000000-000F423F]", cmd_auth_passkey},
#if defined(CONFIG_BT_STACK_PTS)
{"cmd_set_mitm", "\r\ncmd_set_mitm:[set MIMT]\r\n\
[State, 0x01:define,0x00:undefine]\r\n", cmd_set_mitm},
#endif
#endif //#if defined(CONFIG_BT_SMP)
#if defined(CONFIG_BT_GATT_CLIENT)
{"cmd_exchange_mtu", "\r\ncmd_exchange_mtu:[Exchange mtu]\r\n Parameter[Null]\r\n", cmd_exchange_mtu},
{"cmd_discover", "\r\ncmd_discover:[Gatt discovery]\r\n\
[Discovery type, 0:Primary, 1:Secondary, 2:Include, 3:Characteristic, 4:Descriptor]\r\n\
[Uuid value, 2 Octets, e.g.1800]\r\n\
[Start handle, 2 Octets, e.g.0001]\r\n\
[End handle, 2 Octets, e.g.ffff]\r\n", cmd_discover},
#if defined(CONFIG_BT_STACK_PTS)
{"cmd_discover_uuid_128", "\r\ncmd_discover_uuid_128:[Gatt discovery]\r\n\
[Discovery type, 0:Primary, 1:Secondary, 2:Include, 3:Characteristic, 4:Descriptor]\r\n\
[Uuid, 16 Octets, e.g.0000A00C000000000123456789abcdef]\r\n\
[Start handle, 2 Octets, e.g.0001]\r\n\
[End handle, 2 Octets, e.g.ffff]\r",cmd_discover_uuid_128},
#endif
{"cmd_read", "\r\ncmd_read:[Gatt Read]\r\n\
[Attribute handle, 2 Octets]\r\n\
[Value offset, 2 Octets]\r\n", cmd_read},
#if defined(CONFIG_BT_STACK_PTS)
{"cmd_read_uuid_128", "\r\ncmd_read_uuid:[Gatt Read by uuid 128 bit]\r\n\
[Uuid, 16 Octets]\r\n\
[Start_handle, 2 Octets]\r\n\
[End_handle, 2 Octets]\r\n", cmd_read_uuid_128},
{"cmd_read_uuid", "\r\ncmd_read_uuid:[Gatt Read by uuid]\r\n\
[Uuid, 2 Octets]\r\n\
[Start_handle, 2 Octets]\r\n\
[End_handle, 2 Octets]\r\n", cmd_read_uuid},
{"cmd_mread", "\r\ncmd_mread:[Gatt Read multiple]\r\n\
<handle 1> <handle 2> ...\r\n",cmd_mread},
#endif
{"cmd_write", "\r\ncmd_write:[Gatt write]\r\n\
[Attribute handle, 2 Octets]\r\n\
[Value offset, 2 Octets]\r\n\
[Value length, 2 Octets]\r\n\
[Value data]\r\n", cmd_write},
#if defined(CONFIG_BT_STACK_PTS)
{"cmd_prepare_write", "\r\ncmd_prepare_write:[Gatt prepare write]\r\n\
[Attribute handle, 2 Octets]\r\n\
[Value offset, 2 Octets]\r\n\
[Value length, 2 Octets]\r\n\
[Value data]\r\n", cmd_prepare_write},
#endif
{"cmd_write_without_rsp", "\r\ncmd_write_without_rsp:[Gatt write without response]\r\n\
[Sign, 0: No need signed, 1:Signed write cmd if no smp]\r\n\
[Attribute handle, 2 Octets]\r\n\
[Value length, 2 Octets]\r\n\
[Value data]\r\n", cmd_write_without_rsp},
{"cmd_subscribe", "\r\ncmd_subscribe:[Gatt subscribe]\r\n\
[CCC handle, 2 Octets]\r\n\
[Value handle, 2 Octets]\r\n\
[Value, 1:notify, 2:indicate]\r\n", cmd_subscribe},
{"cmd_unsubscribe", "\r\ncmd_unsubscribe:[Gatt unsubscribe]\r\n Parameter[Null]\r\n", cmd_unsubscribe},
#endif /*CONFIG_BT_GATT_CLIENT*/
{"cmd_set_data_len",
"\r\ncmd_set_data_len:[LE Set Data Length]\r\n\
[tx octets, 2 octets]\r\n\
[tx time, 2 octets]\r\n",
cmd_set_data_len},
#if defined(CONFIG_SET_TX_PWR)
{"cmd_set_tx_pwr",
"\r\ncmd_set_tx_pwr:[Set tx power mode]\r\n\
[mode, 1 octet, value:5,6,7]\r\n",
cmd_set_tx_pwr},
#endif
#if defined(BL70X)
{NULL, "No handler/Invalid command", NULL},
#endif
};
#if defined(CONFIG_BT_PERIPHERAL)
#if defined(CONFIG_BT_STACK_PTS)
#if defined(PTS_GAP_SLAVER_CONFIG_READ_CHARC)
static u8_t report[]= {
0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,
0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,
0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09
};
static ssize_t read_pts_long_value(struct bt_conn *conn, const struct bt_gatt_attr *attr,
void *buf, u16_t len, u16_t offset)
{
const char *lvalue = "PTS-LONG-VALUE0123456789abcdef1122";
return bt_gatt_attr_read(conn, attr, buf, len, offset, lvalue,
strlen(lvalue));
}
static ssize_t read_pts_name(struct bt_conn *conn, const struct bt_gatt_attr *attr,
void *buf, u16_t len, u16_t offset)
{
const char *name = "PTS_NAME";
return bt_gatt_attr_read(conn, attr, buf, len, offset, name,strlen(name));
}
static ssize_t pts_read_report(
struct bt_conn *conn,
const struct bt_gatt_attr *attr, void *buf,
u16_t len, u16_t offset)
{
return bt_gatt_attr_read(conn, attr, buf, len, offset,
attr->user_data,
sizeof(report)/sizeof(u8_t));
}
#endif /* PTS_GAP_SLAVER_CONFIG_READ_CHARC */
#if defined(PTS_GAP_SLAVER_CONFIG_WRITE_CHARC)
#define TEST_LVAL_MAX 30
#define TEST_SVAL_MAX 4
static u16_t test_len = 0;
static u16_t test_slen = 0;
static u8_t short_buf[TEST_SVAL_MAX]=
{
0x01,0x02,0x03,0x04
};
static u8_t long_buf[TEST_LVAL_MAX] =
{
0x01,0x02,0x03,0x04,
0x05,0x06,0x07,0x08,
0x09,0x0a,0x11,0x12,
0x13,0x14,0x15,0x16,
0x17,0x18,0x19,0x1a,
0x21,0x22,0x23,0x24,
0x25,0x26,0x27,0x28,
0x29,0x2a
};
static ssize_t pts_write_short_value(struct bt_conn *conn,const struct bt_gatt_attr *bt_attr,
void *buf,u16_t len, u16_t offset,u8_t flags)
{
u8_t i = 0;
u16_t tlen = len;
u8_t *data = (u8_t*)buf;
for(i=0;i<tlen;i++)
vOutputString("data[%d]->[0x%x]\r\n",i,data[i]);
/*The rest of space is enough.*/
if(TEST_SVAL_MAX - test_slen >= tlen)
{
(void)memcpy(&short_buf[test_slen],data,tlen);
test_slen += tlen;
}
else
{
return BT_GATT_ERR(BT_ATT_ERR_INVALID_ATTRIBUTE_LEN);
}
/*If prepare write, it will return 0 */
if(flags == BT_GATT_WRITE_FLAG_PREPARE)
tlen = 0;
return tlen;
}
static ssize_t pts_read_value(struct bt_conn *conn, const struct bt_gatt_attr *attr,
void *buf, u16_t len, u16_t offset)
{
u8_t *data = short_buf;
u16_t data_len = sizeof(short_buf)/sizeof(u8_t);
if(test_len)
{
data_len = test_len;
data = long_buf;
test_len = 0;
}
return bt_gatt_attr_read(conn, attr, buf, len, offset, data,data_len);
}
static ssize_t pts_read_long_value(struct bt_conn *conn, const struct bt_gatt_attr *attr,
void *buf, u16_t len, u16_t offset)
{
u8_t *data = long_buf;
u16_t data_len = sizeof(long_buf)/sizeof(u8_t);
/*Get new value */
if(test_len > 0 && test_len <= TEST_LVAL_MAX)
{
data = long_buf;
data_len = test_len;
}
return bt_gatt_attr_read(conn, attr, buf, len, offset, data,data_len);
}
static ssize_t pts_write_long_value(
struct bt_conn *conn,
const struct bt_gatt_attr *bt_attr,
void *buf,u16_t len, u16_t offset,u8_t flags)
{
u16_t tlen = len;
u8_t *data = (u8_t*)buf;
u8_t i = 0;
/*Reset test value */
if(!offset)
{
test_len = 0;
(void)memset(long_buf,0,TEST_LVAL_MAX);
}
else if(offset > TEST_LVAL_MAX)
{
return BT_GATT_ERR(BT_ATT_ERR_INVALID_OFFSET);
}
/*The rest of space is enough.*/
if(TEST_LVAL_MAX - test_len >= tlen)
{
(void)memcpy(&long_buf[test_len],data,tlen);
test_len += tlen;
}
else
{
return BT_GATT_ERR(BT_ATT_ERR_INVALID_ATTRIBUTE_LEN);
}
/*If prepare write, it will return 0 */
if(flags == BT_GATT_WRITE_FLAG_PREPARE)
tlen = 0;
return tlen;
}
#endif /*PTS_GAP_SLAVER_CONFIG_WRITE_CHARC*/
#if defined(PTS_GAP_SLAVER_CONFIG_NOTIFY_CHARC) || defined(PTS_GAP_SLAVER_CONFIG_INDICATE_CHARC)
static bool notify_status = 0;
static u8_t battery_level = 100;
static void notify(const struct bt_gatt_attr *attr, u16_t value)
{
ARG_UNUSED(attr);
notify_status = (value == BT_GATT_CCC_NOTIFY);
}
static ssize_t pts_read_value(
struct bt_conn *conn,
const struct bt_gatt_attr *bt_attr,
void *buf,u16_t len, u16_t offset,u8_t flags)
{
const char *data = "PTS_NAME";
u16_t length = strlen(data);
return bt_gatt_attr_read(conn, bt_attr, buf, len, offset, data,length);
}
static ssize_t pts_write_value(
struct bt_conn *conn,
const struct bt_gatt_attr *bt_attr,
void *buf,u16_t len, u16_t offset,u8_t flags)
{
return len;
}
#endif /*PTS_GAP_SLAVER_CONFIG_NOTIFY_CHARC*/
static ssize_t pts_read_value(
struct bt_conn *conn,
const struct bt_gatt_attr *bt_attr,
void *buf,u16_t len, u16_t offset,u8_t flags)
{
const char *data = "PTS_NAME";
u16_t length = strlen(data);
return bt_gatt_attr_read(conn, bt_attr, buf, len, offset, data,length);
}
static struct bt_gatt_attr pts_attr[] = {
BT_GATT_CHARACTERISTIC
(
BT_UUID_PTS_AUTH_CHAR,
BT_GATT_CHRC_READ,
BT_GATT_PERM_READ_AUTHEN,
pts_read_value,
NULL,
NULL
),
#if defined(PTS_GAP_SLAVER_CONFIG_WRITE_CHARC)
/* Case : GATT/SR/GAR/BV-03-C
* Verify that a Generic Attribute Profile server can support writing a Characteristic
* Value selected by handle
*/
BT_GATT_CHARACTERISTIC
(
BT_UUID_PTS_CHAR_WRITE_VALUE,
BT_GATT_CHRC_READ | BT_GATT_CHRC_WRITE,
BT_GATT_PERM_READ | BT_GATT_PERM_WRITE,
pts_read_value,
pts_write_short_value,
NULL
),
/* Case : GATT/SR/GAR/BV-01-C
* Verify that a Generic Attribute Profile server can support a write to a
* characteristic without response
*/
BT_GATT_CHARACTERISTIC
(
BT_UUID_PTS_CHAR_WRITE_NORSP,
BT_GATT_CHRC_READ | BT_GATT_CHRC_WRITE_WITHOUT_RESP,
BT_GATT_PERM_READ | BT_GATT_PERM_WRITE,
pts_read_value,
pts_write_short_value,
NULL
),
/* Case : GATT/SR/GAR/BI-03-C, GATT/SR/GAR/BI-12-C
* Verify that a Generic Attribute Profile server can detect and reject a
* Write Characteristic Value Request to a non-writeable Characteristic Value
* and issue a Write Not Permitted Response.
*/
BT_GATT_CHARACTERISTIC
(
BT_UUID_PTS_CHAR_WRITE_AUTHEN,
BT_GATT_CHRC_READ | BT_GATT_CHRC_WRITE,
BT_GATT_PERM_READ | BT_GATT_PERM_WRITE_AUTHEN,
pts_read_long_value,
pts_write_long_value,
NULL
),
BT_GATT_CHARACTERISTIC
(
BT_UUID_PTS_CHAR_WRITE_AUTHEN,
BT_GATT_CHRC_READ | BT_GATT_CHRC_WRITE,
BT_GATT_PERM_READ | BT_GATT_PERM_WRITE_AUTHEN,
pts_read_value,
pts_write_long_value,
NULL
),
/* Case : GATT/SR/GAW/BV-05-C */
BT_GATT_CHARACTERISTIC
(
BT_UUID_PTS_CHAR_WRITE_LONGVAL,
BT_GATT_CHRC_READ | BT_GATT_CHRC_WRITE,
BT_GATT_PERM_READ | BT_GATT_PERM_WRITE,
pts_read_long_value,
pts_write_long_value,
NULL
),
/* Case : GATT/SR/GAW/BV-10-C */
BT_GATT_CHARACTERISTIC
(
BT_UUID_PTS_CHAR_WRITE_2LONGVAL,
BT_GATT_CHRC_READ | BT_GATT_CHRC_WRITE,
BT_GATT_PERM_READ | BT_GATT_PERM_WRITE,
pts_read_long_value,
pts_write_long_value,
NULL
),
BT_GATT_DESCRIPTOR
(
BT_UUID_PTS_CHAR_WRITE_L_DES,
BT_GATT_PERM_READ | BT_GATT_PERM_WRITE,
pts_read_long_value,
pts_write_long_value,
NULL
),
#endif
#if defined(PTS_GAP_SLAVER_CONFIG_READ_CHARC)
/* Case : GATT/SR/GAR/BI-04-C
* Using authenticated link-key for read access. handle is 15
*/
BT_GATT_CHARACTERISTIC
(
BT_UUID_PTS_CHAR_READ_AUTHEN,
BT_GATT_CHRC_READ,
BT_GATT_PERM_READ_AUTHEN,
read_pts_name,
NULL,
NULL
),
/* Case : GATT/SR/GAR/BI-06-C
* Verify that a Generic Attribute Profile server can detect and reject a Read
* Characteristic by UUID Request to a non-readable Characteristic Value and issue
* a Read Not Permitted Response
*/
BT_GATT_CHARACTERISTIC
(
BT_UUID_PTS_CHAR_READ_NOPERM,
BT_GATT_CHRC_READ,
BT_GATT_PERM_NONE,
read_pts_name,
NULL,
NULL
),
/* Case : GATT/SR/GAR/BV-04-C;GATT/SR/GAR/BI-13-C
* Verify that a Generic Attribute Profile server can support reading a
* long Characteristic Value selected by handle.
*/
BT_GATT_CHARACTERISTIC
(
BT_UUID_PTS_CHAR_READ_LONGVAL,
BT_GATT_CHRC_READ,
BT_GATT_PERM_READ,
read_pts_long_value,
NULL,
NULL
),
/* Case : GATT/SR/GAR/BV-06-C;GATT/SR/GAR/BV-07-C;GATT/SR/GAR/BV-08-C
* Verify that a Generic Attribute Profile server can support reading a Long
* Characteristic Descriptor selected by handle.
*/
BT_GATT_DESCRIPTOR
(
BT_UUID_PTS_CHAR_READ_LVAL_REF,
BT_GATT_PERM_READ,
pts_read_report,
NULL,
report
),
/* Case : GATT/SR/GAR/BI-12-C
* Verify that a Generic Attribute Profile server can detect and reject a Read Long
* Characteristic Value Request to a non-readable Characteristic Value and issue a
* Read Not Permitted Response.
*/
BT_GATT_CHARACTERISTIC
(
BT_UUID_PTS_CHAR_READ_L_NOPERM,
BT_GATT_CHRC_READ,
BT_GATT_PERM_NONE,
read_pts_long_value,
NULL,
NULL
),
#endif /* PTS_GAP_SLAVER_CONFIG_READ_CHARC */
#if defined(PTS_GAP_SLAVER_CONFIG_NOTIFY_CHARC)
BT_GATT_CHARACTERISTIC
(
BT_UUID_PTS_CHAR_NOTIFY_CHAR,
BT_GATT_CHRC_READ | BT_GATT_CHRC_NOTIFY,
BT_GATT_PERM_READ ,
pts_read_value,
NULL,
&battery_level
),
BT_GATT_CCC
(
notify,
BT_GATT_PERM_READ | BT_GATT_PERM_WRITE
),
#endif
#if defined(PTS_GAP_SLAVER_CONFIG_INDICATE_CHARC)
BT_GATT_CHARACTERISTIC
(
BT_UUID_PTS_CHAR_INDICATE_CHAR,
BT_GATT_CHRC_READ | BT_GATT_CHRC_INDICATE,
BT_GATT_PERM_READ ,
pts_read_value,
NULL,
&battery_level
),
BT_GATT_CCC
(
notify,
BT_GATT_PERM_READ | BT_GATT_PERM_WRITE
),
#endif
};
struct bt_gatt_service pts_svc = BT_GATT_SERVICE(pts_attr);
static void notify_cb(struct bt_conn *conn, void *user_data)
{
vOutputString("%s: Nofication sent to conn %p\r\n",__func__,conn);
}
static void cmd_notify(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
struct bt_gatt_notify_params params;
struct bt_gatt_attr bt_attr;
u8_t data = 0;
u16_t len = 0;
int err;
if(!default_conn)
{
vOutputString("Not connected\r\n");
return;
}
co_get_uint16_from_string(&argv[1], &len);
co_get_bytearray_from_string(&argv[2], (u8_t *)&data, len);
memset(¶ms, 0, sizeof(params));
params.uuid = pts_attr[0].uuid;
params.attr = &pts_attr[0];
params.data = &data;
params.len = len;
params.func = notify_cb;
vOutputString("len = [0x%x]\r\n",params.len);
err = bt_gatt_notify_cb(default_conn, ¶ms);
if(err)
{
vOutputString("Failed to notifition [%d]\r\n",err);
}
}
static void indicate_cb(struct bt_conn *conn, const struct bt_gatt_attr *attr,
u8_t err)
{
if (err != 0U)
{
vOutputString("Indication fail");
}
else
{
vOutputString("Indication success");
}
}
static void cmd_indicate(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
struct bt_gatt_indicate_params params;
struct bt_gatt_attr bt_attr;
u8_t data[16];
u16_t len = 0;
int err;
if(!default_conn)
{
vOutputString("Not connected\r\n");
return;
}
co_get_uint16_from_string(&argv[1], &len);
if(len > 16)
{
len = 16;
}
co_get_bytearray_from_string(&argv[2], data, len);
memset(¶ms, 0, sizeof(params));
params.attr = &pts_attr[0];
params.data = data;
params.len = len;
params.func = indicate_cb;
vOutputString("len = [0x%x]\r\n",params.len);
err = bt_gatt_indicate(default_conn, ¶ms);
if(err)
{
vOutputString("Failed to notifition [%d]\r\n",err);
}
}
#endif /* CONFIG_BT_STACK_PTS */
#endif /* CONFIG_BT_PERIPHERAL */
#if defined(CONFIG_BT_CONN)
static void connected(struct bt_conn *conn, u8_t err)
{
char addr[BT_ADDR_LE_STR_LEN];
bt_addr_le_to_str(bt_conn_get_dst(conn), addr, sizeof(addr));
if (err) {
vOutputString("Failed to connect to %s (%u) \r\n", addr,
err);
return;
}
vOutputString("Connected: %s \r\n", addr);
if (!default_conn) {
default_conn = conn;
}
}
static void disconnected(struct bt_conn *conn, u8_t reason)
{
char addr[BT_ADDR_LE_STR_LEN];
bt_addr_le_to_str(bt_conn_get_dst(conn), addr, sizeof(addr));
vOutputString("Disconnected: %s (reason %u) \r\n", addr, reason);
if (default_conn == conn) {
default_conn = NULL;
}
}
static void le_param_updated(struct bt_conn *conn, u16_t interval,
u16_t latency, u16_t timeout)
{
vOutputString("LE conn param updated: int 0x%04x lat %d to %d \r\n", interval, latency, timeout);
}
#if defined(CONFIG_BT_SMP)
static void identity_resolved(struct bt_conn *conn, const bt_addr_le_t *rpa,
const bt_addr_le_t *identity)
{
char addr_identity[BT_ADDR_LE_STR_LEN];
char addr_rpa[BT_ADDR_LE_STR_LEN];
bt_addr_le_to_str(identity, addr_identity, sizeof(addr_identity));
bt_addr_le_to_str(rpa, addr_rpa, sizeof(addr_rpa));
vOutputString("Identity resolved %s -> %s \r\n", addr_rpa, addr_identity);
}
static void security_changed(struct bt_conn *conn, bt_security_t level, enum bt_security_err err)
{
char addr[BT_ADDR_LE_STR_LEN];
bt_addr_le_to_str(bt_conn_get_dst(conn), addr, sizeof(addr));
vOutputString("Security changed: %s level %u \r\n", addr, level);
}
#endif
static struct bt_conn_cb conn_callbacks = {
.connected = connected,
.disconnected = disconnected,
.le_param_updated = le_param_updated,
#if defined(CONFIG_BT_SMP)
.identity_resolved = identity_resolved,
.security_changed = security_changed,
#endif
};
#endif //CONFIG_BT_CONN
static void cmd_init(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
if(ble_inited){
vOutputString("Has initialized \r\n");
return;
}
#if defined(CONFIG_BT_CONN)
default_conn = NULL;
bt_conn_cb_register(&conn_callbacks);
#endif
ble_inited = true;
vOutputString("Init successfully \r\n");
}
static void cmd_get_device_name(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
const char *device_name = bt_get_name();
if(device_name){
vOutputString("device_name: %s\r\n",device_name);
}else
vOutputString("Failed to read device name\r\n");
}
static void cmd_set_device_name(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
uint8_t dname[CONFIG_BT_DEVICE_NAME_MAX + 1];
uint16_t len = 0;
int err = 0;
(void)memset(dname,0,CONFIG_BT_DEVICE_NAME_MAX + 1);
co_get_uint16_from_string(&argv[1], &len);
if(len <= (CONFIG_BT_DEVICE_NAME_MAX + 1) && len > 0){
co_get_bytearray_from_string(&argv[2], dname, len);
vOutputString("%s\r\n",dname);
}
else{
vOutputString("Length of name is invalid parameter\r\n");
return;
}
err = bt_set_name((char*)dname);
if(err){
vOutputString("Failed to set device name\r\n");
}else
vOutputString("Set the device name successfully\r\n");
}
#if defined(CONFIG_BT_OBSERVER)
static bool data_cb(struct bt_data *data, void *user_data)
{
char *name = user_data;
u8_t len;
switch (data->type) {
case BT_DATA_NAME_SHORTENED:
case BT_DATA_NAME_COMPLETE:
len = (data->data_len > NAME_LEN - 1)?(NAME_LEN - 1):(data->data_len);
memcpy(name, data->data, len);
return false;
default:
return true;
}
}
#if defined(CONFIG_BT_STACK_PTS)
static bool ad_flag_data_cb(struct bt_data *data, void *user_data)
{
char *ad_flag = user_data;
switch(data->type){
case BT_DATA_FLAGS:
memcpy(ad_flag, data->data, data->data_len);
return false;
default:
return true;
}
}
#endif
#if defined(CONFIG_BT_STACK_PTS)
char *pts_cmplt_name = "PTS-GAP-224B";
char *pts_short_name = "PTS-GAP";
extern bt_addr_le_t pts_addr;
#endif
static void device_found(const bt_addr_le_t *addr, s8_t rssi, u8_t evtype,
struct net_buf_simple *buf)
{
char le_addr[BT_ADDR_LE_STR_LEN];
char name[NAME_LEN];
#if defined(CONFIG_BT_STACK_PTS)
uint8_t i = 0;
int err = 0;
u8_t dst_address[6];
char ad_flag[1];
struct net_buf_simple abuf;
struct bt_conn *conn;
(void)memset(ad_flag, 0, sizeof(ad_flag));
(void)memset(dst_address, 0, sizeof(dst_address));
memcpy(&abuf,buf,sizeof(struct net_buf_simple));
#endif
(void)memset(name, 0, sizeof(name));
bt_data_parse(buf, data_cb, name);
bt_addr_le_to_str(addr, le_addr, sizeof(le_addr));
#if defined(CONFIG_BT_STACK_PTS)
if(!memcmp(&pts_addr, addr, sizeof(bt_addr_le_t)) ||
!memcmp(name,pts_cmplt_name, sizeof(*pts_cmplt_name)) ||
!memcmp(name,pts_short_name, sizeof(*pts_short_name))){
if(memcmp(&pts_addr, addr, sizeof(bt_addr_le_t)))
memcpy(&pts_addr, addr, sizeof(pts_addr));
#endif
vOutputString("[DEVICE]: %s, AD evt type %u, RSSI %i %s \r\n",le_addr, evtype, rssi, name);
#if defined(CONFIG_BT_STACK_PTS)
bt_data_parse(&abuf,ad_flag_data_cb,ad_flag);
if(*ad_flag & 0x01){
vOutputString("Advertising data : 'Limited Discovered Mode' flag is set one\r\n");
}else
vOutputString("Advertising data : 'Limited Discovered Mode' flag is not set\r\n");
if(*ad_flag & 0x02){
vOutputString("Advertising data : 'General Discovered Mode' flag is set one\r\n");
}else
vOutputString("Advertising data : 'General Discovered Mode' flag is not set\r\n");
}
#endif
}
static void cmd_start_scan(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
struct bt_le_scan_param scan_param;
int err;
(void)err;
#if defined(CONFIG_BT_STACK_PTS)
u8_t is_rpa;
if(argc != 6){
#else
if(argc != 5){
#endif
vOutputString("Number of Parameters is not correct\r\n");
return;
}
co_get_bytearray_from_string(&argv[1], &scan_param.type, 1);
co_get_bytearray_from_string(&argv[2], &scan_param.filter_dup, 1);
co_get_uint16_from_string(&argv[3], &scan_param.interval);
co_get_uint16_from_string(&argv[4], &scan_param.window);
#if defined(CONFIG_BT_STACK_PTS)
co_get_bytearray_from_string(&argv[5], (uint8_t *)&is_rpa, 1);
err = bt_le_scan_start(&scan_param, device_found, is_rpa);
#else
err = bt_le_scan_start(&scan_param, device_found);
#endif
if(err){
vOutputString("Failed to start scan (err %d) \r\n", err);
}else{
vOutputString("Start scan successfully \r\n");
}
}
#if defined(CONFIG_BT_STACK_PTS)
static void cmd_add_dev_to_resolve_list(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
struct bt_keys key;
bt_addr_le_t addr;
u8_t type = 0;
u8_t i=0;
int err;
memset(&key,0,sizeof(struct bt_keys));
co_get_bytearray_from_string(&argv[1], &type, 1);
co_get_bytearray_from_string(&argv[2], (uint8_t *)addr.a.val, 6);
if(type == 0)
addr.type = BT_ADDR_LE_PUBLIC;
else if(type == 1)
addr.type = BT_ADDR_LE_RANDOM;
memcpy(&key.addr,&addr,sizeof(bt_addr_le_t));
memcpy(key.irk.val,peer_irk,16);
bt_id_add(&key);
}
#if defined(CONFIG_BT_PERIPHERAL)
static int cmd_register_pts_svc(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
int err;
err = bt_gatt_service_register(&pts_svc);
if(err){
vOutputString("Failed to register PTS service\r\n");
}else{
vOutputString("Succeed to register PTS service\r\n");
}
return 0;
}
#endif
#if defined(CONFIG_BT_WHITELIST)
static int cmd_wl_connect(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
int err;
unsigned char enable = 0U;
struct bt_le_conn_param param = {
.interval_min = BT_GAP_INIT_CONN_INT_MIN,
.interval_max = BT_GAP_INIT_CONN_INT_MAX,
.latency = 0,
.timeout = 400,
};
/*Auto connect whitelist device, enable : 0x01, disable : 0x02*/
co_get_bytearray_from_string(&argv[1], &enable, 1);
/*Address type, 0:ADDR_PUBLIC, 1:ADDR_RAND, 2:ADDR_RPA_OR_PUBLIC, 3:ADDR_RPA_OR_RAND*/
co_get_bytearray_from_string(&argv[2], ¶m.own_address_type, 1);
if(enable == 0x01){
err = bt_conn_create_auto_le(¶m);
if(err){
vOutputString("Auto connect failed (err = [%d])\r\n",err);
return err;
}
}else if(enable == 0x02){
err = bt_conn_create_auto_stop();
if(err){
vOutputString("Auto connect stop (err = [%d])\r\n",err);
return err;
}
}
return 0;
}
static int cmd_bt_le_whitelist_add(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
bt_addr_le_t waddr;
int err;
u8_t i=0;
u8_t val[6];
if(argc != 3){
vOutputString("Number of Parameters is not correct (argc = [%d])\r\n",argc);
return ;
}
err = bt_le_whitelist_clear();
if(err){
vOutputString("Clear white list device failed (err = [%d])\r\n",err);
}
co_get_bytearray_from_string(&argv[1], &waddr.type, 1);
co_get_bytearray_from_string(&argv[2], val, 6);
co_reverse_bytearray(val, waddr.a.val, 6);
err = bt_le_whitelist_add(&waddr);
if(err){
vOutputString("Failed to add device to whitelist (err = [%d])\r\n",err);
}
}
#endif
static void cmd_start_scan_timeout(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
struct bt_le_scan_param scan_param;
uint16_t time = 0;
int err;
u8_t addre_type;
(void)err;
co_get_bytearray_from_string(&argv[1], &scan_param.type, 1);
co_get_bytearray_from_string(&argv[2], &scan_param.filter_dup, 1);
co_get_uint16_from_string(&argv[3], &scan_param.interval);
co_get_uint16_from_string(&argv[4], &scan_param.window);
co_get_bytearray_from_string(&argv[5], (uint8_t *)&addre_type, 1);
co_get_uint16_from_string(&argv[6], (uint16_t *)&time);
err = bt_le_scan_start(&scan_param, device_found, addre_type);
if(err){
vOutputString("Failed to start scan (err %d) \r\n", err);
}else{
vOutputString("Start scan successfully \r\n");
}
k_sleep(time);
bt_le_scan_stop();
vOutputString("Scan stop \r\n");
}
static void cmd_pts_address_register(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
bt_addr_le_t addr;
u8_t type;
char le_addr[BT_ADDR_LE_STR_LEN];
co_get_bytearray_from_string(&argv[1], &type, 1);
co_get_bytearray_from_string(&argv[2], addr.a.val, 6);
if(type == 0){
addr.type = BT_ADDR_LE_PUBLIC;
}else if(type == 1)
addr.type = BT_ADDR_LE_RANDOM;
memcpy(&pts_addr,&addr,sizeof(bt_addr_le_t));
bt_addr_le_to_str(&pts_addr, le_addr, sizeof(le_addr));
vOutputString("Pts address %s \r\n",le_addr);
}
static void cmd_set_flag(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
int err = 0;
u8_t flag;
co_get_bytearray_from_string(&argv[1],&flag,1);
event_flag = flag;
vOutputString("Event flag = [0x%x] \r\n",event_flag);
}
static void cmd_set_smp_flag(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
u8_t flag;
co_get_bytearray_from_string(&argv[1],&flag,1);
bt_set_smpflag((smp_test_id)flag);
vOutputString("Smp flag = [0x%x] \r\n",flag);
}
static void cmd_clear_smp_flag(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
u8_t flag;
co_get_bytearray_from_string(&argv[1],&flag,1);
bt_clear_smpflag((smp_test_id)flag);
vOutputString("Clear smp flag \r\n");
}
static int cmd_bondable(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
const char bondable;
co_get_bytearray_from_string(&argv[1], &bondable, 1);
if(bondable == 0x01)
bt_set_bondable(true);
else if(bondable == 0x00)
bt_set_bondable(false);
else
vOutputString("Bondable status is unknow \r\n");
return 0;
}
#endif /*CONFIG_BT_STACK_PTS */
static void cmd_stop_scan(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
int err;
err = bt_le_scan_stop();
if (err) {
vOutputString("Stopping scanning failed (err %d)\r\n", err);
} else {
vOutputString("Scan successfully stopped \r\n");
}
}
#endif //#if defined(CONFIG_BT_OBSERVER)
#if defined(CONFIG_BT_PERIPHERAL)
static void cmd_read_local_address(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
int ret;
bt_addr_le_t adv_addr;
char le_addr[BT_ADDR_LE_STR_LEN];
memset(&adv_addr,0,sizeof(bt_addr_le_t));
ret = bt_get_local_address(&adv_addr);
if(!ret){
bt_addr_le_to_str(&adv_addr, le_addr, sizeof(le_addr));
vOutputString("Local addr : %s\r\n",le_addr);
}else{
vOutputString("Failed to read address\r\n");
}
}
static void cmd_start_advertise(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
struct bt_le_adv_param param;
const struct bt_data *ad;
size_t ad_len;
int err = 0;
uint8_t adv_type, tmp;
#if defined(CONFIG_BT_STACK_PTS)
struct bt_data pts_ad ;
bt_addr_le_t pts;
struct bt_conn *conn;
u8_t adder_type = 0;
u8_t is_ad = 0;
memset(pts.a.val,0,6);
memset(&pts_ad,0,sizeof(struct bt_data));
#endif
#if defined(CONFIG_BT_STACK_PTS)
if(argc != 4 && argc != 6){
#else
if(argc != 3 && argc != 5){
#endif
vOutputString("Number of Parameters is not correct\r\n");
return;
}
#if defined(CONFIG_BT_STACK_PTS)
switch(event_flag){
case ad_type_service_uuid:
pts_ad.type = BT_DATA_UUID128_ALL;
pts_ad.data = service_uuid;
pts_ad.data_len = sizeof(service_uuid);
is_ad = 1;
break;
case ad_type_local_name:
pts_ad.type = BT_DATA_NAME_COMPLETE;
pts_ad.data = name;
pts_ad.data_len = 13;
is_ad = 1;
break;
case ad_type_flags:
pts_ad.type = BT_DATA_FLAGS;
pts_ad.data = discover_mode;
pts_ad.data_len = sizeof(discover_mode);
is_ad = 1;
break;
case ad_type_manu_data:
pts_ad.type = BT_DATA_MANUFACTURER_DATA;
pts_ad.data = data_manu;
pts_ad.data_len = sizeof(data_manu);
is_ad = 1;
break;
case ad_type_tx_power_level:
pts_ad.type = BT_DATA_TX_POWER;
pts_ad.data = tx_power;
pts_ad.data_len = sizeof(tx_power);
is_ad = 1;
break;
case ad_type_service_data:
pts_ad.type = BT_DATA_SVC_DATA16;
pts_ad.data = service_data;
pts_ad.data_len = sizeof(service_data);
is_ad = 1;
break;
case ad_type_appearance:
pts_ad.type = BT_DATA_GAP_APPEARANCE;
pts_ad.data = data_appearance;
pts_ad.data_len = sizeof(data_appearance);
is_ad = 1;
break;
default:
break;
}
#endif
param.id = selected_id;
param.interval_min = BT_GAP_ADV_FAST_INT_MIN_2;
param.interval_max = BT_GAP_ADV_FAST_INT_MAX_2;
/*Get adv type, 0:adv_ind, 1:adv_scan_ind, 2:adv_nonconn_ind 3: adv_direct_ind*/
co_get_bytearray_from_string(&argv[1], &adv_type, 1);
if(adv_type == 0){
param.options = (BT_LE_ADV_OPT_CONNECTABLE | BT_LE_ADV_OPT_USE_NAME | BT_LE_ADV_OPT_ONE_TIME);
}else if(adv_type == 1){
param.options = BT_LE_ADV_OPT_USE_NAME;
}else if(adv_type == 2){
param.options = 0;
#if defined(CONFIG_BT_STACK_PTS)
}else if(adv_type == 3){
param.options = (BT_LE_ADV_OPT_CONNECTABLE | BT_LE_ADV_OPT_ONE_TIME);
#endif
}else{
vOutputString("Arg1 is invalid\r\n");
return;
}
/*Get mode, 0:General discoverable, 1:non discoverable, 2:limit discoverable*/
co_get_bytearray_from_string(&argv[2], &tmp, 1);
if(tmp == 0 || tmp == 1 || tmp == 2){
if(tmp == 1)
ad_discov[0].data = 0;
#if defined(CONFIG_BT_STACK_PTS)
else if(tmp == 2)
ad_discov[0].data = &discover_mode[0];
if(is_ad == 1){
ad = &pts_ad;
ad_len = 1;
}else{
#endif
ad = ad_discov;
ad_len = ARRAY_SIZE(ad_discov);
#if defined(CONFIG_BT_STACK_PTS)
}
#endif
}else{
vOutputString("Arg2 is invalid\r\n");
return;
}
#if defined(CONFIG_BT_STACK_PTS)
/*upper address type, 0:non-resolvable private address,1:resolvable private address,2:public address*/
//co_get_bytearray_from_string(&argv[3], (u8_t *)¶m.addr_type, 1);
co_get_bytearray_from_string(&argv[3], (u8_t *)&adder_type, 1);
if(adder_type == 0)
param.addr_type = BT_ADDR_TYPE_NON_RPA;
else if(adder_type == 1)
param.addr_type = BT_ADDR_TYPE_RPA;
else if(adder_type == 2)
param.addr_type = BT_ADDR_LE_PUBLIC;
else
vOutputString("Invaild address type\r\n");
if(argc == 6){
co_get_uint16_from_string(&argv[4], ¶m.interval_min);
co_get_uint16_from_string(&argv[5], ¶m.interval_max);
}
if(adv_type == 3){
param.interval_min = 0;
param.interval_max = 0;
}
#else
if(argc == 5){
co_get_uint16_from_string(&argv[3], ¶m.interval_min);
co_get_uint16_from_string(&argv[4], ¶m.interval_max);
}
#endif//CONFIG_BT_STACK_PTS
if(adv_type == 1){
err = bt_le_adv_start(¶m, ad, ad_len, &ad_discov[0], 1);
#if defined(CONFIG_BT_STACK_PTS)
}else if(adv_type == 3){
pts.type = BT_ADDR_LE_PUBLIC;
memcpy(pts.a.val,pts_address,6);
conn = bt_conn_create_slave_le(&pts,¶m);
if(!conn){
err = 1;
}
else{
bt_conn_unref(conn);
}
#endif
}else{
err = bt_le_adv_start(¶m, ad, ad_len, NULL, 0);
}
if(err){
vOutputString("Failed to start advertising\r\n");
}else{
vOutputString("Advertising started\r\n");
}
#if defined(CONFIG_BT_STACK_PTS)
if(tmp == 2){
k_sleep(LIM_ADV_TIME);
bt_le_adv_stop();
vOutputString("Adv timeout \r\n");
}
#endif
}
static void cmd_stop_advertise(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
if(bt_le_adv_stop()){
vOutputString("Failed to stop advertising\r\n");
}else{
vOutputString("Advertising stopped\r\n");
}
}
#endif //#if defined(CONFIG_BT_PERIPHERAL)
#if defined(CONFIG_BT_CONN)
#if defined(CONFIG_BT_CENTRAL)
static void cmd_connect_le(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
bt_addr_le_t addr;
struct bt_conn *conn;
u8_t addr_val[6];
s8_t type = -1;
struct bt_le_conn_param param = {
.interval_min = BT_GAP_INIT_CONN_INT_MIN,
.interval_max = BT_GAP_INIT_CONN_INT_MAX,
.latency = 0,
.timeout = 400,
#if defined(CONFIG_BT_STACK_PTS)
.own_address_type = BT_ADDR_LE_PUBLIC_ID,
#endif
};
if(argc != 3){
vOutputString("Number of Parameters is not correct\r\n");
return;
}
co_get_bytearray_from_string(&argv[1], (u8_t *)&type, 1);
#if defined(CONFIG_BT_STACK_PTS)
/*Get addr type,0:ADDR_RAND, 1:ADDR_RPA_OR_PUBLIC,2:ADDR_PUBLIC, 3:ADDR_RPA_OR_RAND*/
if(type == 0)
addr.type = 1; /*ADDR_RAND*/
else if(type == 1)
addr.type = 2; /*ADDR_RPA_OR_PUBLIC*/
else if(type == 2)
addr.type = 0; /*ADDR_PUBLIC*/
else if(type == 3)
addr.type = 3; /*ADDR_RPA_OR_RAND*/
else
vOutputString("adderss type is unknow [0x%x]\r\n",type);
#else
/*Get addr type, 0:ADDR_PUBLIC, 1:ADDR_RAND, 2:ADDR_RPA_OR_PUBLIC, 3:ADDR_RPA_OR_RAND*/
addr.type = type;
#endif
co_get_bytearray_from_string(&argv[2], addr_val, 6);
co_reverse_bytearray(addr_val, addr.a.val, 6);
conn = bt_conn_create_le(&addr, /*BT_LE_CONN_PARAM_DEFAULT*/¶m);
if(!conn){
vOutputString("Connection failed\r\n");
}else{
vOutputString("Connection pending\r\n");
}
}
#endif //#if defined(CONFIG_BT_CENTRAL)
static void cmd_disconnect(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
bt_addr_le_t addr;
u8_t addr_val[6];
struct bt_conn *conn;
s8_t type = -1;
if(argc != 3){
vOutputString("Number of Parameters is not correct\r\n");
return;
}
co_get_bytearray_from_string(&argv[1], (u8_t *)&type, 1);
co_get_bytearray_from_string(&argv[2], addr_val, 6);
co_reverse_bytearray(addr_val, addr.a.val, 6);
#if defined(CONFIG_BT_STACK_PTS)
/*Get addr type,0:ADDR_RAND, 1:ADDR_RPA_OR_PUBLIC,2:ADDR_PUBLIC, 3:ADDR_RPA_OR_RAND*/
if(type == 0)
addr.type = 1; /*ADDR_RAND*/
else if(type == 1)
addr.type = 2; /*ADDR_RPA_OR_PUBLIC*/
else if(type == 2)
addr.type = 0; /*ADDR_PUBLIC*/
else if(type == 3)
addr.type = 3; /*ADDR_RPA_OR_RAND*/
else
vOutputString("adderss type is unknow\r\n");
#else
/*Get addr type, 0:ADDR_PUBLIC, 1:ADDR_RAND, 2:ADDR_RPA_OR_PUBLIC, 3:ADDR_RPA_OR_RAND*/
addr.type = type;
#endif
conn = bt_conn_lookup_addr_le(selected_id, &addr);
if(!conn){
vOutputString("Not connected\r\n");
return;
}
if(bt_conn_disconnect(conn, BT_HCI_ERR_REMOTE_USER_TERM_CONN)){
vOutputString("Disconnection failed\r\n");
}else{
vOutputString("Disconnect successfully\r\n");
#if defined(CONFIG_BT_STACK_PTS)
//bt_conn_unref(conn);
//return;
#endif
}
bt_conn_unref(conn);
}
static void cmd_select_conn(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
bt_addr_le_t addr;
struct bt_conn *conn;
u8_t addr_val[6];
if(argc != 3){
vOutputString("Number of Parameters is not correct\r\n");
return;
}
/*Get addr type, 0:ADDR_PUBLIC, 1:ADDR_RAND, 2:ADDR_RPA_OR_PUBLIC, 3:ADDR_RPA_OR_RAND*/
co_get_bytearray_from_string(&argv[1], &addr.type, 1);
co_get_bytearray_from_string(&argv[2], addr_val, 6);
co_reverse_bytearray(addr_val, addr.a.val, 6);
conn = bt_conn_lookup_addr_le(selected_id, &addr);
if(!conn){
vOutputString("No matching connection found\r\n");
return;
}
if(default_conn){
bt_conn_unref(default_conn);
}
default_conn = conn;
}
static void cmd_unpair(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
bt_addr_le_t addr;
u8_t addr_val[6];
int err;
if(argc != 3){
vOutputString("Number of Parameters is not correct\r\n");
return;
}
/*Get addr type, 0:ADDR_PUBLIC, 1:ADDR_RAND, 2:ADDR_RPA_OR_PUBLIC, 3:ADDR_RPA_OR_RAND*/
co_get_bytearray_from_string(&argv[1], &addr.type, 1);
co_get_bytearray_from_string(&argv[2], addr_val, 6);
co_reverse_bytearray(addr_val, addr.a.val, 6);
err = bt_unpair(selected_id, &addr);
if(err){
vOutputString("Failed to unpair\r\n");
}else{
vOutputString("Unpair successfully\r\n");
}
}
static void cmd_conn_update(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
struct bt_le_conn_param param;
int err;
if(argc != 5){
vOutputString("Number of Parameters is not correct\r\n");
return;
}
co_get_uint16_from_string(&argv[1], ¶m.interval_min);
co_get_uint16_from_string(&argv[2], ¶m.interval_max);
co_get_uint16_from_string(&argv[3], ¶m.latency);
co_get_uint16_from_string(&argv[4], ¶m.timeout);
#if defined(CONFIG_BT_STACK_PTS)
if(event_flag == dir_connect_req)
err = bt_conn_le_param_update(default_conn, ¶m);
else
err = pts_bt_conn_le_param_update(default_conn, ¶m);
#else
err = bt_conn_le_param_update(default_conn, ¶m);
#endif
if (err) {
vOutputString("conn update failed (err %d)\r\n", err);
} else {
vOutputString("conn update initiated\r\n");
}
}
#endif //#if defined(CONFIG_BT_CONN)
#if defined(CONFIG_BT_SMP)
static void cmd_security(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
int err;
u8_t sec_level = /*BT_SECURITY_FIPS*/BT_SECURITY_L4;
if(!default_conn){
vOutputString("Please firstly choose the connection using cmd_select_conn\r\n");
return;
}
if(argc == 2)
co_get_bytearray_from_string(&argv[1], &sec_level, 1);
err = bt_conn_set_security(default_conn, sec_level);
if(err){
vOutputString("Failed to start security, (err %d) \r\n", err);
}else{
vOutputString("Start security successfully\r\n");
}
}
static void auth_passkey_display(struct bt_conn *conn, unsigned int passkey)
{
char addr[BT_ADDR_LE_STR_LEN];
bt_addr_le_to_str(bt_conn_get_dst(conn), addr, sizeof(addr));
vOutputString("passkey_str is: %<PASSWORD>", passkey);
}
static void auth_passkey_confirm(struct bt_conn *conn, unsigned int passkey)
{
char addr[BT_ADDR_LE_STR_LEN];
bt_addr_le_to_str(bt_conn_get_dst(conn), addr, sizeof(addr));
vOutputString("Confirm passkey for %s: %06u\r\n", addr, passkey);
}
static void auth_passkey_entry(struct bt_conn *conn)
{
char addr[BT_ADDR_LE_STR_LEN];
bt_addr_le_to_str(bt_conn_get_dst(conn), addr, sizeof(addr));
vOutputString("Enter passkey for %s\r\n", addr);
}
static void auth_cancel(struct bt_conn *conn)
{
char addr[BT_ADDR_LE_STR_LEN];
bt_addr_le_to_str(bt_conn_get_dst(conn), addr, sizeof(addr));
vOutputString("Pairing cancelled: %s\r\n", addr);
}
static void auth_pairing_confirm(struct bt_conn *conn)
{
char addr[BT_ADDR_LE_STR_LEN];
bt_addr_le_to_str(bt_conn_get_dst(conn), addr, sizeof(addr));
vOutputString("Confirm pairing for %s\r\n", addr);
}
static void auth_pairing_complete(struct bt_conn *conn, bool bonded)
{
char addr[BT_ADDR_LE_STR_LEN];
bt_addr_le_to_str(bt_conn_get_dst(conn), addr, sizeof(addr));
#if defined(CONFIG_BT_STACK_PTS)
int err = bt_le_whitelist_clear();
if(err){
vOutputString("Clear white list device failed (err = [%d])\r\n",err);
}
bt_le_whitelist_add(bt_conn_get_dst(conn));
#endif
vOutputString("%s with %s\r\n", bonded ? "Bonded" : "Paired", addr);
}
static void auth_pairing_failed(struct bt_conn *conn, enum bt_security_err reason)
{
char addr[BT_ADDR_LE_STR_LEN];
bt_addr_le_to_str(bt_conn_get_dst(conn), addr, sizeof(addr));
vOutputString("Pairing failed with %s\r\n", addr);
}
static struct bt_conn_auth_cb auth_cb_display = {
.passkey_display = auth_passkey_display,
.passkey_entry = auth_passkey_entry,
.passkey_confirm = auth_passkey_confirm,
.cancel = auth_cancel,
.pairing_confirm = auth_pairing_confirm,
.pairing_failed = auth_pairing_failed,
.pairing_complete = auth_pairing_complete,
};
static void cmd_auth(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
int err;
err = bt_conn_auth_cb_register(&auth_cb_display);
if(err){
vOutputString("Auth callback has already been registered\r\n");
}else{
vOutputString("Register auth callback successfully\r\n");
}
}
static void cmd_auth_cancel(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
struct bt_conn *conn;
if (default_conn) {
conn = default_conn;
}else {
conn = NULL;
}
if (!conn) {
vOutputString("Not connected\r\n");
return;
}
bt_conn_auth_cancel(conn);
}
static void cmd_auth_passkey_confirm(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
if (!default_conn) {
vOutputString("Not connected\r\n");
return;
}
bt_conn_auth_passkey_confirm(default_conn);
}
static void cmd_auth_pairing_confirm(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
if (!default_conn) {
vOutputString("Not connected\r\n");
return;
}
bt_conn_auth_pairing_confirm(default_conn);
}
static void cmd_auth_passkey(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
uint32_t passkey;
if(argc != 2){
vOutputString("Number of Parameters is not correct\r\n");
return;
}
if (!default_conn) {
vOutputString("Not connected\r\n");
return;
}
passkey = atoi(argv[1]);
if (passkey > PASSKEY_MAX) {
vOutputString("Passkey should be between 0-999999\r\n");
return;
}
bt_conn_auth_passkey_entry(default_conn, passkey);
}
#if defined(CONFIG_BT_STACK_PTS)
static void cmd_set_mitm(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
u8_t enable = 0;
co_get_bytearray_from_string(&argv[1],&enable,1);
if(enable == 0x01)
bt_set_mitm(true);
else if(enable == 0x00)
bt_set_mitm(false);
else
vOutputString("Inviad parameter\r\n");
}
#endif
#endif //#if defined(CONFIG_BT_SMP)
#if defined(CONFIG_BT_GATT_CLIENT)
static void exchange_func(struct bt_conn *conn, u8_t err,
struct bt_gatt_exchange_params *params)
{
vOutputString("Exchange %s\r\n", err == 0U ? "successful" : "failed");
}
static struct bt_gatt_exchange_params exchange_params;
static void cmd_exchange_mtu(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
int err;
if (!default_conn) {
vOutputString("Not connected\r\n");
return;
}
exchange_params.func = exchange_func;
err = bt_gatt_exchange_mtu(default_conn, &exchange_params);
if (err) {
vOutputString("Exchange failed (err %d)\r\n", err);
} else {
vOutputString("Exchange pending\r\n");
}
}
static struct bt_gatt_discover_params discover_params;
static struct bt_uuid_16 uuid = BT_UUID_INIT_16(0);
#if defined(CONFIG_BT_STACK_PTS)
static struct bt_uuid_128 uuid_128 = BT_UUID_INIT_128(0);
#endif
static void print_chrc_props(u8_t properties)
{
vOutputString("Properties: ");
if (properties & BT_GATT_CHRC_BROADCAST) {
vOutputString("[bcast]\r\n");
}
if (properties & BT_GATT_CHRC_READ) {
vOutputString("[read]\r\n");
}
if (properties & BT_GATT_CHRC_WRITE) {
vOutputString("[write]\r\n");
}
if (properties & BT_GATT_CHRC_WRITE_WITHOUT_RESP) {
vOutputString("[write w/w rsp]\r\n");
}
if (properties & BT_GATT_CHRC_NOTIFY) {
vOutputString("[notify]\r\n");
}
if (properties & BT_GATT_CHRC_INDICATE) {
vOutputString("[indicate]");
}
if (properties & BT_GATT_CHRC_AUTH) {
vOutputString("[auth]\r\n");
}
if (properties & BT_GATT_CHRC_EXT_PROP) {
vOutputString("[ext prop]\r\n");
}
}
static u8_t discover_func(struct bt_conn *conn, const struct bt_gatt_attr *attr, struct bt_gatt_discover_params *params)
{
struct bt_gatt_service_val *gatt_service;
struct bt_gatt_chrc *gatt_chrc;
struct bt_gatt_include *gatt_include;
char str[37];
if (!attr) {
vOutputString( "Discover complete\r\n");
(void)memset(params, 0, sizeof(*params));
return BT_GATT_ITER_STOP;
}
switch (params->type) {
case BT_GATT_DISCOVER_SECONDARY:
case BT_GATT_DISCOVER_PRIMARY:
gatt_service = attr->user_data;
bt_uuid_to_str(gatt_service->uuid, str, sizeof(str));
vOutputString("Service %s found: start handle %x, end_handle %x\r\n", str, attr->handle, gatt_service->end_handle);
break;
case BT_GATT_DISCOVER_CHARACTERISTIC:
gatt_chrc = attr->user_data;
bt_uuid_to_str(gatt_chrc->uuid, str, sizeof(str));
vOutputString("Characteristic %s found: attr->handle %x chrc->handle %x \r\n", str, attr->handle,gatt_chrc->value_handle);
print_chrc_props(gatt_chrc->properties);
break;
case BT_GATT_DISCOVER_INCLUDE:
gatt_include = attr->user_data;
bt_uuid_to_str(gatt_include->uuid, str, sizeof(str));
vOutputString("Include %s found: handle %x, start %x, end %x\r\n", str, attr->handle,
gatt_include->start_handle, gatt_include->end_handle);
break;
default:
bt_uuid_to_str(attr->uuid, str, sizeof(str));
vOutputString("Descriptor %s found: handle %x\r\n", str, attr->handle);
break;
}
return BT_GATT_ITER_CONTINUE;
}
#if defined(CONFIG_BT_STACK_PTS)
static void cmd_discover_uuid_128(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
int err;
u8_t disc_type;
u8_t val[16];
u8_t i=0;
(void)memset(val,0x0,16);
if (!default_conn) {
vOutputString("Not connected\r\n");
return;
}
discover_params.func = discover_func;
discover_params.start_handle = 0x0001;
discover_params.end_handle = 0xffff;
co_get_bytearray_from_string(&argv[1], &disc_type, 1);
if(disc_type == 0){
discover_params.type = BT_GATT_DISCOVER_PRIMARY;
}else if(disc_type == 1){
discover_params.type = BT_GATT_DISCOVER_SECONDARY;
}else if(disc_type == 2){
discover_params.type = BT_GATT_DISCOVER_INCLUDE;
}else if(disc_type == 3){
discover_params.type = BT_GATT_DISCOVER_CHARACTERISTIC;
}else if(disc_type == 4){
discover_params.type = BT_GATT_DISCOVER_DESCRIPTOR;
}else{
vOutputString("Invalid discovery type\r\n");
return;
}
co_get_bytearray_from_string(&argv[2], val, 16);
co_reverse_bytearray(val, uuid_128.val, 16);
/*Set array value to 0 */
(void)memset(val, 0x0, 16);
if(!memcmp(uuid_128.val, val, 16))
discover_params.uuid = NULL;
else
discover_params.uuid = &uuid_128.uuid;
co_get_uint16_from_string(&argv[3], &discover_params.start_handle);
co_get_uint16_from_string(&argv[4], &discover_params.end_handle);
err = bt_gatt_discover(default_conn, &discover_params);
if (err) {
vOutputString("Discover failed (err %d)\r\n", err);
} else {
vOutputString("Discover pending\r\n");
}
}
#endif
static void cmd_discover(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
int err;
u8_t disc_type;
if(argc != 5){
vOutputString("Number of Parameters is not correct\r\n");
return;
}
if (!default_conn) {
vOutputString("Not connected\r\n");
return;
}
discover_params.func = discover_func;
discover_params.start_handle = 0x0001;
discover_params.end_handle = 0xffff;
co_get_bytearray_from_string(&argv[1], &disc_type, 1);
if(disc_type == 0){
discover_params.type = BT_GATT_DISCOVER_PRIMARY;
}else if(disc_type == 1){
discover_params.type = BT_GATT_DISCOVER_SECONDARY;
}else if(disc_type == 2){
discover_params.type = BT_GATT_DISCOVER_INCLUDE;
}else if(disc_type == 3){
discover_params.type = BT_GATT_DISCOVER_CHARACTERISTIC;
}else if(disc_type == 4){
discover_params.type = BT_GATT_DISCOVER_DESCRIPTOR;
}else{
vOutputString("Invalid discovery type\r\n");
return;
}
co_get_uint16_from_string(&argv[2], &uuid.val);
if(uuid.val)
discover_params.uuid = &uuid.uuid;
else
discover_params.uuid = NULL;
co_get_uint16_from_string(&argv[3], &discover_params.start_handle);
co_get_uint16_from_string(&argv[4], &discover_params.end_handle);
err = bt_gatt_discover(default_conn, &discover_params);
if (err) {
vOutputString("Discover failed (err %d)\r\n", err);
} else {
vOutputString("Discover pending\r\n");
}
}
static struct bt_gatt_read_params read_params;
static u8_t read_func(struct bt_conn *conn, u8_t err, struct bt_gatt_read_params *params, const void *data, u16_t length)
{
vOutputString("Read complete: err %u length %u \r\n", err, length);
char str[22];
u8_t *buf = (u8_t *)data;
memset(str,0,15);
if(length > 0 && length <= sizeof(str)){
memcpy(str,buf,length);
vOutputString("device name : %s \r\n",str);
#if defined(CONFIG_BT_STACK_PTS)
u8_t i = 0;
for(i=0;i<length;i++)
vOutputString("data[%d] = [0x%x]\r\n", i, buf[i]);
#endif
}
if (!data) {
(void)memset(params, 0, sizeof(*params));
return BT_GATT_ITER_STOP;
}
return BT_GATT_ITER_CONTINUE;
}
#if defined(CONFIG_BT_STACK_PTS)
static void cmd_read_uuid_128(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
int err;
u8_t val[16];
struct bt_uuid_128 uuid = BT_UUID_INIT_128(0);
(void)memset(val, 0, 16);
if(argc != 4){
vOutputString("Number of Parameters is not correct\r\n");
return;
}
if (!default_conn) {
vOutputString("Not connected\r\n");
return;
}
read_params.func = read_func;
read_params.handle_count = 0;
read_params.by_uuid.start_handle = 0x0001;
read_params.by_uuid.end_handle = 0xffff;
co_get_bytearray_from_string(&argv[1], val, 16);
co_reverse_bytearray(val, uuid.val, 16);
//(void)memcpy(uuid.val, val, 16)
(void)memset(val, 0, 16);
if(!memcmp(uuid.val, val, 16))
read_params.by_uuid.uuid = NULL;
else
read_params.by_uuid.uuid = &uuid.uuid;
co_get_uint16_from_string(&argv[2], &read_params.by_uuid.start_handle);
co_get_uint16_from_string(&argv[3], &read_params.by_uuid.end_handle);
err = bt_gatt_read(default_conn, &read_params);
if (err) {
vOutputString("Read failed (err %d)\r\n", err);
} else {
vOutputString("Read pending\r\n");
}
}
static void cmd_read_uuid(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
int err;
struct bt_uuid_16 uuid = BT_UUID_INIT_16(0);
if(argc != 4){
vOutputString("Number of Parameters is not correct\r\n");
return;
}
if (!default_conn) {
vOutputString("Not connected\r\n");
return;
}
read_params.func = read_func;
read_params.handle_count = 0;
read_params.by_uuid.start_handle = 0x0001;
read_params.by_uuid.end_handle = 0xffff;
co_get_uint16_from_string(&argv[1], &uuid.val);
if(uuid.val)
read_params.by_uuid.uuid = &uuid.uuid;
co_get_uint16_from_string(&argv[2], &read_params.by_uuid.start_handle);
co_get_uint16_from_string(&argv[3], &read_params.by_uuid.end_handle);
err = bt_gatt_read(default_conn, &read_params);
if (err) {
vOutputString("Read failed (err %d)\r\n", err);
} else {
vOutputString("Read pending\r\n");
}
}
static int cmd_mread(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
u16_t h[8];
int i, err;
if (!default_conn) {
vOutputString("Not connected\r\n");
return -1;
}
if((argc-1) > ARRAY_SIZE(h)){
vOutputString("Enter max %lu handle items to read\r\n",ARRAY_SIZE(h));
return -1;
}
for (i = 0; i < argc - 1; i++) {
co_get_uint16_from_string(&argv[i + 1],&h[i]);
}
read_params.func = read_func;
read_params.handle_count = i;
read_params.handles = h; /* not used in read func */
vOutputString("i = [%d]\r\n",i);
err = bt_gatt_read(default_conn, &read_params);
if (err) {
vOutputString("Read failed (err %d)\r\n", err);
} else {
vOutputString("Read pending\r\n");
}
return err;
}
#endif
static void cmd_read(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
int err;
if(argc != 3){
vOutputString("Number of Parameters is not correct\r\n");
return;
}
if (!default_conn) {
vOutputString("Not connected\r\n");
return;
}
co_get_uint16_from_string(&argv[1], &read_params.single.handle);
co_get_uint16_from_string(&argv[2], &read_params.single.offset);
read_params.func = read_func;
read_params.handle_count = 1;
err = bt_gatt_read(default_conn, &read_params);
if (err) {
vOutputString("Read failed (err %d)\r\n", err);
} else {
vOutputString("Read pending\r\n");
}
}
static struct bt_gatt_write_params write_params;
static u8_t gatt_write_buf[CHAR_SIZE_MAX];
static void write_func(struct bt_conn *conn, u8_t err,
struct bt_gatt_write_params *params)
{
vOutputString("Write complete: err %u \r\n", err);
(void)memset(&write_params, 0, sizeof(write_params));
}
#if defined(CONFIG_BT_STACK_PTS)
static void cmd_prepare_write(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
int err;
uint16_t data_len;
if(argc != 5){
vOutputString("Number of Parameters is not correct\r\n");
return;
}
if (!default_conn) {
vOutputString("Not connected\r\n");
return;
}
if (write_params.func) {
vOutputString("Write ongoing\r\n");
return;
}
co_get_uint16_from_string(&argv[1], &write_params.handle);
co_get_uint16_from_string(&argv[2], &write_params.offset);
co_get_uint16_from_string(&argv[3], &write_params.length);
data_len = write_params.length > sizeof(gatt_write_buf)? (sizeof(gatt_write_buf)):(write_params.length);
co_get_bytearray_from_string(&argv[4], gatt_write_buf, data_len);
write_params.data = gatt_write_buf;
write_params.length = data_len;
write_params.func = write_func;
err = bt_gatt_prepare_write(default_conn, &write_params);
if (err) {
vOutputString("Prepare write failed (err %d)\r\n", err);
} else {
vOutputString("Prepare write pending\r\n");
}
}
#endif
static void cmd_write(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
int err;
uint16_t data_len;
if(argc != 5){
vOutputString("Number of Parameters is not correct\r\n");
return;
}
if (!default_conn) {
vOutputString("Not connected\r\n");
return;
}
if (write_params.func) {
vOutputString("Write ongoing\r\n");
return;
}
co_get_uint16_from_string(&argv[1], &write_params.handle);
co_get_uint16_from_string(&argv[2], &write_params.offset);
co_get_uint16_from_string(&argv[3], &write_params.length);
data_len = write_params.length > sizeof(gatt_write_buf)? (sizeof(gatt_write_buf)):(write_params.length);
co_get_bytearray_from_string(&argv[4], gatt_write_buf, data_len);
write_params.data = gatt_write_buf;
write_params.length = data_len;
write_params.func = write_func;
err = bt_gatt_write(default_conn, &write_params);
if (err) {
vOutputString("Write failed (err %d)\r\n", err);
} else {
vOutputString("Write pending\r\n");
}
}
static void cmd_write_without_rsp(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
u16_t handle;
int err;
u16_t len;
bool sign;
if(argc != 5){
vOutputString("Number of Parameters is not correct\r\n");
return;
}
if (!default_conn) {
vOutputString("Not connected\r\n");
return;
}
co_get_bytearray_from_string(&argv[1], (uint8_t *)&sign, 1);
co_get_uint16_from_string(&argv[2], &handle);
co_get_uint16_from_string(&argv[3], &len);
len = len > sizeof(gatt_write_buf)? (sizeof(gatt_write_buf)):(len);
co_get_bytearray_from_string(&argv[4], gatt_write_buf, len);
err = bt_gatt_write_without_response(default_conn, handle, gatt_write_buf, len, sign);
vOutputString("Write Complete (err %d)\r\n", err);
}
static struct bt_gatt_subscribe_params subscribe_params;
static u8_t notify_func(struct bt_conn *conn,
struct bt_gatt_subscribe_params *params,
const void *data, u16_t length)
{
if (!params->value) {
vOutputString("Unsubscribed\r\n");
params->value_handle = 0U;
return BT_GATT_ITER_STOP;
}
vOutputString("Notification: data %p length %u\r\n", data, length);
return BT_GATT_ITER_CONTINUE;
}
static void cmd_subscribe(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
int err;
(void)err;
if(argc != 4){
vOutputString("Number of Parameters is not correct\r\n");
return;
}
if (subscribe_params.value_handle) {
vOutputString( "Cannot subscribe: subscription to %x already exists\r\n", subscribe_params.value_handle);
return;
}
if (!default_conn) {
vOutputString("Not connected\r\n");
return;
}
co_get_uint16_from_string(&argv[1], &subscribe_params.ccc_handle);
co_get_uint16_from_string(&argv[2], &subscribe_params.value_handle);
co_get_uint16_from_string(&argv[3], &subscribe_params.value);
subscribe_params.notify = notify_func;
err = bt_gatt_subscribe(default_conn, &subscribe_params);
if (err) {
vOutputString("Subscribe failed (err %d)\r\n", err);
} else {
vOutputString("Subscribed\r\n");
}
}
static void cmd_unsubscribe(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
int err;
(void)err;
if (!default_conn) {
vOutputString("Not connected\r\n");
return;
}
if (!subscribe_params.value_handle) {
vOutputString("No subscription found\r\n");
return;
}
err = bt_gatt_unsubscribe(default_conn, &subscribe_params);
if (err) {
vOutputString("Unsubscribe failed (err %d)\r\n", err);
} else {
vOutputString("Unsubscribe success\r\n");
}
}
#endif /* CONFIG_BT_GATT_CLIENT */
static void cmd_set_data_len(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
u16_t tx_octets;
u16_t tx_time;
int err;
if(argc != 3){
vOutputString("Number of Parameters is not correct\r\n");
return;
}
if (!default_conn) {
vOutputString("Not connected\r\n");
return;
}
co_get_uint16_from_string(&argv[1], &tx_octets);
co_get_uint16_from_string(&argv[2], &tx_time);
err = bt_le_set_data_len(default_conn, tx_octets, tx_time);
if (err) {
vOutputString("cmd_set_data_len, LE Set Data Length (err %d)\r\n", err);
}
else
{
vOutputString("cmd_set_data_len, LE Set Data Length success\r\n");
}
}
#if defined(CONFIG_SET_TX_PWR)
enum {
RFC_AUTO = 0,
RFC_WLAN_11B,
RFC_WLAN_11G,
RFC_WLAN_11N,
RFC_BT_BLE,
RFC_BT_BLE_6,
RFC_BT_BLE_12,
RFC_BT_BLE_20
};
static void cmd_set_tx_pwr(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
{
u8_t mode;
int err;
if(argc != 2){
vOutputString("Number of Parameters is not correct\r\n");
return;
}
co_get_bytearray_from_string(&argv[1],&mode,1);
if(mode < RFC_BT_BLE_6 || mode > RFC_BT_BLE_20){
vOutputString("cmd_set_tx_pwr, invalid value, value shall be in [%d - %d]\r\n", RFC_BT_BLE_6, RFC_BT_BLE_20);
return;
}
err = bt_set_tx_pwr(mode);
if(err){
vOutputString("cmd_set_tx_pwr, Fail to set tx power (err %d)\r\n", err);
}
else{
vOutputString("cmd_set_tx_pwr, Set tx power successfully\r\n");
}
}
#endif
int blestack_cli_register(void)
{
#if defined(CONFIG_BT_STACK_PTS)
memcpy(&pts_addr.a, BT_ADDR_NONE, sizeof(pts_addr.a));
#endif
#if defined(BL602)
//aos_cli_register_commands(btStackCmdSet, sizeof(btStackCmdSet)/sizeof(btStackCmdSet[0]));
#elif defined(BL70X)
const struct cli_command *cmdSet = btStackCmdSet;
while(cmdSet->pcCommand){
FreeRTOS_CLIRegisterCommand(cmdSet);
cmdSet++;
}
#endif
return 0;
}
|
mkroman/bl602-604
|
components/bl602/bl602_wifi/plf/refip/src/driver/phy/bl602_phy_rf/reg/reg_rf_fsm.h
|
<reponame>mkroman/bl602-604
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _REG_RF_FSM_H_
#define _REG_RF_FSM_H_
#include "co_int.h"
#include "arch.h"
#include "_reg_access.h"
static inline uint32_t rf_fsm_vector_21_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001500);
return ((localVal & ((uint32_t)0x00200000)) >> 21);
}
static inline void rf_fsm_vector_21_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001500);
localVal &= ~((uint32_t)0x00200000);
localVal |= (x << 21)&((uint32_t)0x00200000);
REG_PL_WR(0x40001500,localVal);
}
static inline uint32_t rf_fsm_vector_20_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001500);
return ((localVal & ((uint32_t)0x00100000)) >> 20);
}
static inline void rf_fsm_vector_20_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001500);
localVal &= ~((uint32_t)0x00100000);
localVal |= (x << 20)&((uint32_t)0x00100000);
REG_PL_WR(0x40001500,localVal);
}
static inline uint32_t rf_fsm_vector_19_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001500);
return ((localVal & ((uint32_t)0x00080000)) >> 19);
}
static inline void rf_fsm_vector_19_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001500);
localVal &= ~((uint32_t)0x00080000);
localVal |= (x << 19)&((uint32_t)0x00080000);
REG_PL_WR(0x40001500,localVal);
}
static inline uint32_t rf_fsm_vector_18_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001500);
return ((localVal & ((uint32_t)0x00040000)) >> 18);
}
static inline void rf_fsm_vector_18_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001500);
localVal &= ~((uint32_t)0x00040000);
localVal |= (x << 18)&((uint32_t)0x00040000);
REG_PL_WR(0x40001500,localVal);
}
static inline uint32_t rf_fsm_vector_17_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001500);
return ((localVal & ((uint32_t)0x00020000)) >> 17);
}
static inline void rf_fsm_vector_17_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001500);
localVal &= ~((uint32_t)0x00020000);
localVal |= (x << 17)&((uint32_t)0x00020000);
REG_PL_WR(0x40001500,localVal);
}
static inline uint32_t rf_fsm_vector_16_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001500);
return ((localVal & ((uint32_t)0x00010000)) >> 16);
}
static inline void rf_fsm_vector_16_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001500);
localVal &= ~((uint32_t)0x00010000);
localVal |= (x << 16)&((uint32_t)0x00010000);
REG_PL_WR(0x40001500,localVal);
}
static inline uint32_t rf_fsm_vector_15_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001500);
return ((localVal & ((uint32_t)0x00008000)) >> 15);
}
static inline void rf_fsm_vector_15_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001500);
localVal &= ~((uint32_t)0x00008000);
localVal |= (x << 15)&((uint32_t)0x00008000);
REG_PL_WR(0x40001500,localVal);
}
static inline uint32_t rf_fsm_vector_14_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001500);
return ((localVal & ((uint32_t)0x00004000)) >> 14);
}
static inline void rf_fsm_vector_14_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001500);
localVal &= ~((uint32_t)0x00004000);
localVal |= (x << 14)&((uint32_t)0x00004000);
REG_PL_WR(0x40001500,localVal);
}
static inline uint32_t rf_fsm_vector_13_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001500);
return ((localVal & ((uint32_t)0x00002000)) >> 13);
}
static inline void rf_fsm_vector_13_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001500);
localVal &= ~((uint32_t)0x00002000);
localVal |= (x << 13)&((uint32_t)0x00002000);
REG_PL_WR(0x40001500,localVal);
}
static inline uint32_t rf_fsm_vector_12_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001500);
return ((localVal & ((uint32_t)0x00001000)) >> 12);
}
static inline void rf_fsm_vector_12_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001500);
localVal &= ~((uint32_t)0x00001000);
localVal |= (x << 12)&((uint32_t)0x00001000);
REG_PL_WR(0x40001500,localVal);
}
static inline uint32_t rf_fsm_vector_11_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001500);
return ((localVal & ((uint32_t)0x00000800)) >> 11);
}
static inline void rf_fsm_vector_11_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001500);
localVal &= ~((uint32_t)0x00000800);
localVal |= (x << 11)&((uint32_t)0x00000800);
REG_PL_WR(0x40001500,localVal);
}
static inline uint32_t rf_fsm_vector_10_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001500);
return ((localVal & ((uint32_t)0x00000400)) >> 10);
}
static inline void rf_fsm_vector_10_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001500);
localVal &= ~((uint32_t)0x00000400);
localVal |= (x << 10)&((uint32_t)0x00000400);
REG_PL_WR(0x40001500,localVal);
}
static inline uint32_t rf_fsm_vector_09_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001500);
return ((localVal & ((uint32_t)0x00000200)) >> 9);
}
static inline void rf_fsm_vector_09_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001500);
localVal &= ~((uint32_t)0x00000200);
localVal |= (x << 9)&((uint32_t)0x00000200);
REG_PL_WR(0x40001500,localVal);
}
static inline uint32_t rf_fsm_vector_08_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001500);
return ((localVal & ((uint32_t)0x00000100)) >> 8);
}
static inline void rf_fsm_vector_08_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001500);
localVal &= ~((uint32_t)0x00000100);
localVal |= (x << 8)&((uint32_t)0x00000100);
REG_PL_WR(0x40001500,localVal);
}
static inline uint32_t rf_fsm_vector_07_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001500);
return ((localVal & ((uint32_t)0x00000080)) >> 7);
}
static inline void rf_fsm_vector_07_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001500);
localVal &= ~((uint32_t)0x00000080);
localVal |= (x << 7)&((uint32_t)0x00000080);
REG_PL_WR(0x40001500,localVal);
}
static inline uint32_t rf_fsm_vector_06_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001500);
return ((localVal & ((uint32_t)0x00000040)) >> 6);
}
static inline void rf_fsm_vector_06_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001500);
localVal &= ~((uint32_t)0x00000040);
localVal |= (x << 6)&((uint32_t)0x00000040);
REG_PL_WR(0x40001500,localVal);
}
static inline uint32_t rf_fsm_vector_05_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001500);
return ((localVal & ((uint32_t)0x00000020)) >> 5);
}
static inline void rf_fsm_vector_05_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001500);
localVal &= ~((uint32_t)0x00000020);
localVal |= (x << 5)&((uint32_t)0x00000020);
REG_PL_WR(0x40001500,localVal);
}
static inline uint32_t rf_fsm_vector_04_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001500);
return ((localVal & ((uint32_t)0x00000010)) >> 4);
}
static inline void rf_fsm_vector_04_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001500);
localVal &= ~((uint32_t)0x00000010);
localVal |= (x << 4)&((uint32_t)0x00000010);
REG_PL_WR(0x40001500,localVal);
}
static inline uint32_t rf_fsm_vector_03_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001500);
return ((localVal & ((uint32_t)0x00000008)) >> 3);
}
static inline void rf_fsm_vector_03_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001500);
localVal &= ~((uint32_t)0x00000008);
localVal |= (x << 3)&((uint32_t)0x00000008);
REG_PL_WR(0x40001500,localVal);
}
static inline uint32_t rf_fsm_vector_02_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001500);
return ((localVal & ((uint32_t)0x00000004)) >> 2);
}
static inline void rf_fsm_vector_02_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001500);
localVal &= ~((uint32_t)0x00000004);
localVal |= (x << 2)&((uint32_t)0x00000004);
REG_PL_WR(0x40001500,localVal);
}
static inline uint32_t rf_fsm_vector_01_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001500);
return ((localVal & ((uint32_t)0x00000002)) >> 1);
}
static inline void rf_fsm_vector_01_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001500);
localVal &= ~((uint32_t)0x00000002);
localVal |= (x << 1)&((uint32_t)0x00000002);
REG_PL_WR(0x40001500,localVal);
}
static inline uint32_t rf_fsm_vector_00_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001500);
return ((localVal & ((uint32_t)0x00000001)) >> 0);
}
static inline void rf_fsm_vector_00_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001500);
localVal &= ~((uint32_t)0x00000001);
localVal |= (x << 0)&((uint32_t)0x00000001);
REG_PL_WR(0x40001500,localVal);
}
static inline uint32_t rf_fsm_sb_vector_21_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001504);
return ((localVal & ((uint32_t)0x00200000)) >> 21);
}
static inline void rf_fsm_sb_vector_21_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001504);
localVal &= ~((uint32_t)0x00200000);
localVal |= (x << 21)&((uint32_t)0x00200000);
REG_PL_WR(0x40001504,localVal);
}
static inline uint32_t rf_fsm_sb_vector_20_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001504);
return ((localVal & ((uint32_t)0x00100000)) >> 20);
}
static inline void rf_fsm_sb_vector_20_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001504);
localVal &= ~((uint32_t)0x00100000);
localVal |= (x << 20)&((uint32_t)0x00100000);
REG_PL_WR(0x40001504,localVal);
}
static inline uint32_t rf_fsm_sb_vector_19_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001504);
return ((localVal & ((uint32_t)0x00080000)) >> 19);
}
static inline void rf_fsm_sb_vector_19_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001504);
localVal &= ~((uint32_t)0x00080000);
localVal |= (x << 19)&((uint32_t)0x00080000);
REG_PL_WR(0x40001504,localVal);
}
static inline uint32_t rf_fsm_sb_vector_18_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001504);
return ((localVal & ((uint32_t)0x00040000)) >> 18);
}
static inline void rf_fsm_sb_vector_18_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001504);
localVal &= ~((uint32_t)0x00040000);
localVal |= (x << 18)&((uint32_t)0x00040000);
REG_PL_WR(0x40001504,localVal);
}
static inline uint32_t rf_fsm_sb_vector_17_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001504);
return ((localVal & ((uint32_t)0x00020000)) >> 17);
}
static inline void rf_fsm_sb_vector_17_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001504);
localVal &= ~((uint32_t)0x00020000);
localVal |= (x << 17)&((uint32_t)0x00020000);
REG_PL_WR(0x40001504,localVal);
}
static inline uint32_t rf_fsm_sb_vector_16_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001504);
return ((localVal & ((uint32_t)0x00010000)) >> 16);
}
static inline void rf_fsm_sb_vector_16_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001504);
localVal &= ~((uint32_t)0x00010000);
localVal |= (x << 16)&((uint32_t)0x00010000);
REG_PL_WR(0x40001504,localVal);
}
static inline uint32_t rf_fsm_sb_vector_15_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001504);
return ((localVal & ((uint32_t)0x00008000)) >> 15);
}
static inline void rf_fsm_sb_vector_15_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001504);
localVal &= ~((uint32_t)0x00008000);
localVal |= (x << 15)&((uint32_t)0x00008000);
REG_PL_WR(0x40001504,localVal);
}
static inline uint32_t rf_fsm_sb_vector_14_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001504);
return ((localVal & ((uint32_t)0x00004000)) >> 14);
}
static inline void rf_fsm_sb_vector_14_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001504);
localVal &= ~((uint32_t)0x00004000);
localVal |= (x << 14)&((uint32_t)0x00004000);
REG_PL_WR(0x40001504,localVal);
}
static inline uint32_t rf_fsm_sb_vector_13_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001504);
return ((localVal & ((uint32_t)0x00002000)) >> 13);
}
static inline void rf_fsm_sb_vector_13_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001504);
localVal &= ~((uint32_t)0x00002000);
localVal |= (x << 13)&((uint32_t)0x00002000);
REG_PL_WR(0x40001504,localVal);
}
static inline uint32_t rf_fsm_sb_vector_12_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001504);
return ((localVal & ((uint32_t)0x00001000)) >> 12);
}
static inline void rf_fsm_sb_vector_12_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001504);
localVal &= ~((uint32_t)0x00001000);
localVal |= (x << 12)&((uint32_t)0x00001000);
REG_PL_WR(0x40001504,localVal);
}
static inline uint32_t rf_fsm_sb_vector_11_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001504);
return ((localVal & ((uint32_t)0x00000800)) >> 11);
}
static inline void rf_fsm_sb_vector_11_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001504);
localVal &= ~((uint32_t)0x00000800);
localVal |= (x << 11)&((uint32_t)0x00000800);
REG_PL_WR(0x40001504,localVal);
}
static inline uint32_t rf_fsm_sb_vector_10_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001504);
return ((localVal & ((uint32_t)0x00000400)) >> 10);
}
static inline void rf_fsm_sb_vector_10_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001504);
localVal &= ~((uint32_t)0x00000400);
localVal |= (x << 10)&((uint32_t)0x00000400);
REG_PL_WR(0x40001504,localVal);
}
static inline uint32_t rf_fsm_sb_vector_09_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001504);
return ((localVal & ((uint32_t)0x00000200)) >> 9);
}
static inline void rf_fsm_sb_vector_09_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001504);
localVal &= ~((uint32_t)0x00000200);
localVal |= (x << 9)&((uint32_t)0x00000200);
REG_PL_WR(0x40001504,localVal);
}
static inline uint32_t rf_fsm_sb_vector_08_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001504);
return ((localVal & ((uint32_t)0x00000100)) >> 8);
}
static inline void rf_fsm_sb_vector_08_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001504);
localVal &= ~((uint32_t)0x00000100);
localVal |= (x << 8)&((uint32_t)0x00000100);
REG_PL_WR(0x40001504,localVal);
}
static inline uint32_t rf_fsm_sb_vector_07_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001504);
return ((localVal & ((uint32_t)0x00000080)) >> 7);
}
static inline void rf_fsm_sb_vector_07_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001504);
localVal &= ~((uint32_t)0x00000080);
localVal |= (x << 7)&((uint32_t)0x00000080);
REG_PL_WR(0x40001504,localVal);
}
static inline uint32_t rf_fsm_sb_vector_06_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001504);
return ((localVal & ((uint32_t)0x00000040)) >> 6);
}
static inline void rf_fsm_sb_vector_06_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001504);
localVal &= ~((uint32_t)0x00000040);
localVal |= (x << 6)&((uint32_t)0x00000040);
REG_PL_WR(0x40001504,localVal);
}
static inline uint32_t rf_fsm_sb_vector_05_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001504);
return ((localVal & ((uint32_t)0x00000020)) >> 5);
}
static inline void rf_fsm_sb_vector_05_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001504);
localVal &= ~((uint32_t)0x00000020);
localVal |= (x << 5)&((uint32_t)0x00000020);
REG_PL_WR(0x40001504,localVal);
}
static inline uint32_t rf_fsm_sb_vector_04_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001504);
return ((localVal & ((uint32_t)0x00000010)) >> 4);
}
static inline void rf_fsm_sb_vector_04_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001504);
localVal &= ~((uint32_t)0x00000010);
localVal |= (x << 4)&((uint32_t)0x00000010);
REG_PL_WR(0x40001504,localVal);
}
static inline uint32_t rf_fsm_sb_vector_03_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001504);
return ((localVal & ((uint32_t)0x00000008)) >> 3);
}
static inline void rf_fsm_sb_vector_03_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001504);
localVal &= ~((uint32_t)0x00000008);
localVal |= (x << 3)&((uint32_t)0x00000008);
REG_PL_WR(0x40001504,localVal);
}
static inline uint32_t rf_fsm_sb_vector_02_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001504);
return ((localVal & ((uint32_t)0x00000004)) >> 2);
}
static inline void rf_fsm_sb_vector_02_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001504);
localVal &= ~((uint32_t)0x00000004);
localVal |= (x << 2)&((uint32_t)0x00000004);
REG_PL_WR(0x40001504,localVal);
}
static inline uint32_t rf_fsm_sb_vector_01_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001504);
return ((localVal & ((uint32_t)0x00000002)) >> 1);
}
static inline void rf_fsm_sb_vector_01_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001504);
localVal &= ~((uint32_t)0x00000002);
localVal |= (x << 1)&((uint32_t)0x00000002);
REG_PL_WR(0x40001504,localVal);
}
static inline uint32_t rf_fsm_sb_vector_00_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001504);
return ((localVal & ((uint32_t)0x00000001)) >> 0);
}
static inline void rf_fsm_sb_vector_00_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001504);
localVal &= ~((uint32_t)0x00000001);
localVal |= (x << 0)&((uint32_t)0x00000001);
REG_PL_WR(0x40001504,localVal);
}
static inline uint32_t rf_fsm_lo_vector_21_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001508);
return ((localVal & ((uint32_t)0x00200000)) >> 21);
}
static inline void rf_fsm_lo_vector_21_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001508);
localVal &= ~((uint32_t)0x00200000);
localVal |= (x << 21)&((uint32_t)0x00200000);
REG_PL_WR(0x40001508,localVal);
}
static inline uint32_t rf_fsm_lo_vector_20_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001508);
return ((localVal & ((uint32_t)0x00100000)) >> 20);
}
static inline void rf_fsm_lo_vector_20_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001508);
localVal &= ~((uint32_t)0x00100000);
localVal |= (x << 20)&((uint32_t)0x00100000);
REG_PL_WR(0x40001508,localVal);
}
static inline uint32_t rf_fsm_lo_vector_19_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001508);
return ((localVal & ((uint32_t)0x00080000)) >> 19);
}
static inline void rf_fsm_lo_vector_19_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001508);
localVal &= ~((uint32_t)0x00080000);
localVal |= (x << 19)&((uint32_t)0x00080000);
REG_PL_WR(0x40001508,localVal);
}
static inline uint32_t rf_fsm_lo_vector_18_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001508);
return ((localVal & ((uint32_t)0x00040000)) >> 18);
}
static inline void rf_fsm_lo_vector_18_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001508);
localVal &= ~((uint32_t)0x00040000);
localVal |= (x << 18)&((uint32_t)0x00040000);
REG_PL_WR(0x40001508,localVal);
}
static inline uint32_t rf_fsm_lo_vector_17_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001508);
return ((localVal & ((uint32_t)0x00020000)) >> 17);
}
static inline void rf_fsm_lo_vector_17_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001508);
localVal &= ~((uint32_t)0x00020000);
localVal |= (x << 17)&((uint32_t)0x00020000);
REG_PL_WR(0x40001508,localVal);
}
static inline uint32_t rf_fsm_lo_vector_16_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001508);
return ((localVal & ((uint32_t)0x00010000)) >> 16);
}
static inline void rf_fsm_lo_vector_16_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001508);
localVal &= ~((uint32_t)0x00010000);
localVal |= (x << 16)&((uint32_t)0x00010000);
REG_PL_WR(0x40001508,localVal);
}
static inline uint32_t rf_fsm_lo_vector_15_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001508);
return ((localVal & ((uint32_t)0x00008000)) >> 15);
}
static inline void rf_fsm_lo_vector_15_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001508);
localVal &= ~((uint32_t)0x00008000);
localVal |= (x << 15)&((uint32_t)0x00008000);
REG_PL_WR(0x40001508,localVal);
}
static inline uint32_t rf_fsm_lo_vector_14_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001508);
return ((localVal & ((uint32_t)0x00004000)) >> 14);
}
static inline void rf_fsm_lo_vector_14_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001508);
localVal &= ~((uint32_t)0x00004000);
localVal |= (x << 14)&((uint32_t)0x00004000);
REG_PL_WR(0x40001508,localVal);
}
static inline uint32_t rf_fsm_lo_vector_13_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001508);
return ((localVal & ((uint32_t)0x00002000)) >> 13);
}
static inline void rf_fsm_lo_vector_13_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001508);
localVal &= ~((uint32_t)0x00002000);
localVal |= (x << 13)&((uint32_t)0x00002000);
REG_PL_WR(0x40001508,localVal);
}
static inline uint32_t rf_fsm_lo_vector_12_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001508);
return ((localVal & ((uint32_t)0x00001000)) >> 12);
}
static inline void rf_fsm_lo_vector_12_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001508);
localVal &= ~((uint32_t)0x00001000);
localVal |= (x << 12)&((uint32_t)0x00001000);
REG_PL_WR(0x40001508,localVal);
}
static inline uint32_t rf_fsm_lo_vector_11_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001508);
return ((localVal & ((uint32_t)0x00000800)) >> 11);
}
static inline void rf_fsm_lo_vector_11_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001508);
localVal &= ~((uint32_t)0x00000800);
localVal |= (x << 11)&((uint32_t)0x00000800);
REG_PL_WR(0x40001508,localVal);
}
static inline uint32_t rf_fsm_lo_vector_10_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001508);
return ((localVal & ((uint32_t)0x00000400)) >> 10);
}
static inline void rf_fsm_lo_vector_10_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001508);
localVal &= ~((uint32_t)0x00000400);
localVal |= (x << 10)&((uint32_t)0x00000400);
REG_PL_WR(0x40001508,localVal);
}
static inline uint32_t rf_fsm_lo_vector_09_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001508);
return ((localVal & ((uint32_t)0x00000200)) >> 9);
}
static inline void rf_fsm_lo_vector_09_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001508);
localVal &= ~((uint32_t)0x00000200);
localVal |= (x << 9)&((uint32_t)0x00000200);
REG_PL_WR(0x40001508,localVal);
}
static inline uint32_t rf_fsm_lo_vector_08_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001508);
return ((localVal & ((uint32_t)0x00000100)) >> 8);
}
static inline void rf_fsm_lo_vector_08_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001508);
localVal &= ~((uint32_t)0x00000100);
localVal |= (x << 8)&((uint32_t)0x00000100);
REG_PL_WR(0x40001508,localVal);
}
static inline uint32_t rf_fsm_lo_vector_07_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001508);
return ((localVal & ((uint32_t)0x00000080)) >> 7);
}
static inline void rf_fsm_lo_vector_07_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001508);
localVal &= ~((uint32_t)0x00000080);
localVal |= (x << 7)&((uint32_t)0x00000080);
REG_PL_WR(0x40001508,localVal);
}
static inline uint32_t rf_fsm_lo_vector_06_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001508);
return ((localVal & ((uint32_t)0x00000040)) >> 6);
}
static inline void rf_fsm_lo_vector_06_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001508);
localVal &= ~((uint32_t)0x00000040);
localVal |= (x << 6)&((uint32_t)0x00000040);
REG_PL_WR(0x40001508,localVal);
}
static inline uint32_t rf_fsm_lo_vector_05_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001508);
return ((localVal & ((uint32_t)0x00000020)) >> 5);
}
static inline void rf_fsm_lo_vector_05_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001508);
localVal &= ~((uint32_t)0x00000020);
localVal |= (x << 5)&((uint32_t)0x00000020);
REG_PL_WR(0x40001508,localVal);
}
static inline uint32_t rf_fsm_lo_vector_04_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001508);
return ((localVal & ((uint32_t)0x00000010)) >> 4);
}
static inline void rf_fsm_lo_vector_04_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001508);
localVal &= ~((uint32_t)0x00000010);
localVal |= (x << 4)&((uint32_t)0x00000010);
REG_PL_WR(0x40001508,localVal);
}
static inline uint32_t rf_fsm_lo_vector_03_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001508);
return ((localVal & ((uint32_t)0x00000008)) >> 3);
}
static inline void rf_fsm_lo_vector_03_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001508);
localVal &= ~((uint32_t)0x00000008);
localVal |= (x << 3)&((uint32_t)0x00000008);
REG_PL_WR(0x40001508,localVal);
}
static inline uint32_t rf_fsm_lo_vector_02_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001508);
return ((localVal & ((uint32_t)0x00000004)) >> 2);
}
static inline void rf_fsm_lo_vector_02_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001508);
localVal &= ~((uint32_t)0x00000004);
localVal |= (x << 2)&((uint32_t)0x00000004);
REG_PL_WR(0x40001508,localVal);
}
static inline uint32_t rf_fsm_lo_vector_01_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001508);
return ((localVal & ((uint32_t)0x00000002)) >> 1);
}
static inline void rf_fsm_lo_vector_01_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001508);
localVal &= ~((uint32_t)0x00000002);
localVal |= (x << 1)&((uint32_t)0x00000002);
REG_PL_WR(0x40001508,localVal);
}
static inline uint32_t rf_fsm_lo_vector_00_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001508);
return ((localVal & ((uint32_t)0x00000001)) >> 0);
}
static inline void rf_fsm_lo_vector_00_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001508);
localVal &= ~((uint32_t)0x00000001);
localVal |= (x << 0)&((uint32_t)0x00000001);
REG_PL_WR(0x40001508,localVal);
}
static inline uint32_t rf_fsm_rx_vector_21_getf(void)
{
uint32_t localVal = REG_PL_RD(0x4000150c);
return ((localVal & ((uint32_t)0x00200000)) >> 21);
}
static inline void rf_fsm_rx_vector_21_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x4000150c);
localVal &= ~((uint32_t)0x00200000);
localVal |= (x << 21)&((uint32_t)0x00200000);
REG_PL_WR(0x4000150c,localVal);
}
static inline uint32_t rf_fsm_rx_vector_20_getf(void)
{
uint32_t localVal = REG_PL_RD(0x4000150c);
return ((localVal & ((uint32_t)0x00100000)) >> 20);
}
static inline void rf_fsm_rx_vector_20_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x4000150c);
localVal &= ~((uint32_t)0x00100000);
localVal |= (x << 20)&((uint32_t)0x00100000);
REG_PL_WR(0x4000150c,localVal);
}
static inline uint32_t rf_fsm_rx_vector_19_getf(void)
{
uint32_t localVal = REG_PL_RD(0x4000150c);
return ((localVal & ((uint32_t)0x00080000)) >> 19);
}
static inline void rf_fsm_rx_vector_19_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x4000150c);
localVal &= ~((uint32_t)0x00080000);
localVal |= (x << 19)&((uint32_t)0x00080000);
REG_PL_WR(0x4000150c,localVal);
}
static inline uint32_t rf_fsm_rx_vector_18_getf(void)
{
uint32_t localVal = REG_PL_RD(0x4000150c);
return ((localVal & ((uint32_t)0x00040000)) >> 18);
}
static inline void rf_fsm_rx_vector_18_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x4000150c);
localVal &= ~((uint32_t)0x00040000);
localVal |= (x << 18)&((uint32_t)0x00040000);
REG_PL_WR(0x4000150c,localVal);
}
static inline uint32_t rf_fsm_rx_vector_17_getf(void)
{
uint32_t localVal = REG_PL_RD(0x4000150c);
return ((localVal & ((uint32_t)0x00020000)) >> 17);
}
static inline void rf_fsm_rx_vector_17_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x4000150c);
localVal &= ~((uint32_t)0x00020000);
localVal |= (x << 17)&((uint32_t)0x00020000);
REG_PL_WR(0x4000150c,localVal);
}
static inline uint32_t rf_fsm_rx_vector_16_getf(void)
{
uint32_t localVal = REG_PL_RD(0x4000150c);
return ((localVal & ((uint32_t)0x00010000)) >> 16);
}
static inline void rf_fsm_rx_vector_16_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x4000150c);
localVal &= ~((uint32_t)0x00010000);
localVal |= (x << 16)&((uint32_t)0x00010000);
REG_PL_WR(0x4000150c,localVal);
}
static inline uint32_t rf_fsm_rx_vector_15_getf(void)
{
uint32_t localVal = REG_PL_RD(0x4000150c);
return ((localVal & ((uint32_t)0x00008000)) >> 15);
}
static inline void rf_fsm_rx_vector_15_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x4000150c);
localVal &= ~((uint32_t)0x00008000);
localVal |= (x << 15)&((uint32_t)0x00008000);
REG_PL_WR(0x4000150c,localVal);
}
static inline uint32_t rf_fsm_rx_vector_14_getf(void)
{
uint32_t localVal = REG_PL_RD(0x4000150c);
return ((localVal & ((uint32_t)0x00004000)) >> 14);
}
static inline void rf_fsm_rx_vector_14_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x4000150c);
localVal &= ~((uint32_t)0x00004000);
localVal |= (x << 14)&((uint32_t)0x00004000);
REG_PL_WR(0x4000150c,localVal);
}
static inline uint32_t rf_fsm_rx_vector_13_getf(void)
{
uint32_t localVal = REG_PL_RD(0x4000150c);
return ((localVal & ((uint32_t)0x00002000)) >> 13);
}
static inline void rf_fsm_rx_vector_13_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x4000150c);
localVal &= ~((uint32_t)0x00002000);
localVal |= (x << 13)&((uint32_t)0x00002000);
REG_PL_WR(0x4000150c,localVal);
}
static inline uint32_t rf_fsm_rx_vector_12_getf(void)
{
uint32_t localVal = REG_PL_RD(0x4000150c);
return ((localVal & ((uint32_t)0x00001000)) >> 12);
}
static inline void rf_fsm_rx_vector_12_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x4000150c);
localVal &= ~((uint32_t)0x00001000);
localVal |= (x << 12)&((uint32_t)0x00001000);
REG_PL_WR(0x4000150c,localVal);
}
static inline uint32_t rf_fsm_rx_vector_11_getf(void)
{
uint32_t localVal = REG_PL_RD(0x4000150c);
return ((localVal & ((uint32_t)0x00000800)) >> 11);
}
static inline void rf_fsm_rx_vector_11_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x4000150c);
localVal &= ~((uint32_t)0x00000800);
localVal |= (x << 11)&((uint32_t)0x00000800);
REG_PL_WR(0x4000150c,localVal);
}
static inline uint32_t rf_fsm_rx_vector_10_getf(void)
{
uint32_t localVal = REG_PL_RD(0x4000150c);
return ((localVal & ((uint32_t)0x00000400)) >> 10);
}
static inline void rf_fsm_rx_vector_10_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x4000150c);
localVal &= ~((uint32_t)0x00000400);
localVal |= (x << 10)&((uint32_t)0x00000400);
REG_PL_WR(0x4000150c,localVal);
}
static inline uint32_t rf_fsm_rx_vector_09_getf(void)
{
uint32_t localVal = REG_PL_RD(0x4000150c);
return ((localVal & ((uint32_t)0x00000200)) >> 9);
}
static inline void rf_fsm_rx_vector_09_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x4000150c);
localVal &= ~((uint32_t)0x00000200);
localVal |= (x << 9)&((uint32_t)0x00000200);
REG_PL_WR(0x4000150c,localVal);
}
static inline uint32_t rf_fsm_rx_vector_08_getf(void)
{
uint32_t localVal = REG_PL_RD(0x4000150c);
return ((localVal & ((uint32_t)0x00000100)) >> 8);
}
static inline void rf_fsm_rx_vector_08_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x4000150c);
localVal &= ~((uint32_t)0x00000100);
localVal |= (x << 8)&((uint32_t)0x00000100);
REG_PL_WR(0x4000150c,localVal);
}
static inline uint32_t rf_fsm_rx_vector_07_getf(void)
{
uint32_t localVal = REG_PL_RD(0x4000150c);
return ((localVal & ((uint32_t)0x00000080)) >> 7);
}
static inline void rf_fsm_rx_vector_07_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x4000150c);
localVal &= ~((uint32_t)0x00000080);
localVal |= (x << 7)&((uint32_t)0x00000080);
REG_PL_WR(0x4000150c,localVal);
}
static inline uint32_t rf_fsm_rx_vector_06_getf(void)
{
uint32_t localVal = REG_PL_RD(0x4000150c);
return ((localVal & ((uint32_t)0x00000040)) >> 6);
}
static inline void rf_fsm_rx_vector_06_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x4000150c);
localVal &= ~((uint32_t)0x00000040);
localVal |= (x << 6)&((uint32_t)0x00000040);
REG_PL_WR(0x4000150c,localVal);
}
static inline uint32_t rf_fsm_rx_vector_05_getf(void)
{
uint32_t localVal = REG_PL_RD(0x4000150c);
return ((localVal & ((uint32_t)0x00000020)) >> 5);
}
static inline void rf_fsm_rx_vector_05_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x4000150c);
localVal &= ~((uint32_t)0x00000020);
localVal |= (x << 5)&((uint32_t)0x00000020);
REG_PL_WR(0x4000150c,localVal);
}
static inline uint32_t rf_fsm_rx_vector_04_getf(void)
{
uint32_t localVal = REG_PL_RD(0x4000150c);
return ((localVal & ((uint32_t)0x00000010)) >> 4);
}
static inline void rf_fsm_rx_vector_04_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x4000150c);
localVal &= ~((uint32_t)0x00000010);
localVal |= (x << 4)&((uint32_t)0x00000010);
REG_PL_WR(0x4000150c,localVal);
}
static inline uint32_t rf_fsm_rx_vector_03_getf(void)
{
uint32_t localVal = REG_PL_RD(0x4000150c);
return ((localVal & ((uint32_t)0x00000008)) >> 3);
}
static inline void rf_fsm_rx_vector_03_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x4000150c);
localVal &= ~((uint32_t)0x00000008);
localVal |= (x << 3)&((uint32_t)0x00000008);
REG_PL_WR(0x4000150c,localVal);
}
static inline uint32_t rf_fsm_rx_vector_02_getf(void)
{
uint32_t localVal = REG_PL_RD(0x4000150c);
return ((localVal & ((uint32_t)0x00000004)) >> 2);
}
static inline void rf_fsm_rx_vector_02_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x4000150c);
localVal &= ~((uint32_t)0x00000004);
localVal |= (x << 2)&((uint32_t)0x00000004);
REG_PL_WR(0x4000150c,localVal);
}
static inline uint32_t rf_fsm_rx_vector_01_getf(void)
{
uint32_t localVal = REG_PL_RD(0x4000150c);
return ((localVal & ((uint32_t)0x00000002)) >> 1);
}
static inline void rf_fsm_rx_vector_01_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x4000150c);
localVal &= ~((uint32_t)0x00000002);
localVal |= (x << 1)&((uint32_t)0x00000002);
REG_PL_WR(0x4000150c,localVal);
}
static inline uint32_t rf_fsm_rx_vector_00_getf(void)
{
uint32_t localVal = REG_PL_RD(0x4000150c);
return ((localVal & ((uint32_t)0x00000001)) >> 0);
}
static inline void rf_fsm_rx_vector_00_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x4000150c);
localVal &= ~((uint32_t)0x00000001);
localVal |= (x << 0)&((uint32_t)0x00000001);
REG_PL_WR(0x4000150c,localVal);
}
static inline uint32_t rf_fsm_tx_vector_21_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001510);
return ((localVal & ((uint32_t)0x00200000)) >> 21);
}
static inline void rf_fsm_tx_vector_21_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001510);
localVal &= ~((uint32_t)0x00200000);
localVal |= (x << 21)&((uint32_t)0x00200000);
REG_PL_WR(0x40001510,localVal);
}
static inline uint32_t rf_fsm_tx_vector_20_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001510);
return ((localVal & ((uint32_t)0x00100000)) >> 20);
}
static inline void rf_fsm_tx_vector_20_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001510);
localVal &= ~((uint32_t)0x00100000);
localVal |= (x << 20)&((uint32_t)0x00100000);
REG_PL_WR(0x40001510,localVal);
}
static inline uint32_t rf_fsm_tx_vector_19_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001510);
return ((localVal & ((uint32_t)0x00080000)) >> 19);
}
static inline void rf_fsm_tx_vector_19_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001510);
localVal &= ~((uint32_t)0x00080000);
localVal |= (x << 19)&((uint32_t)0x00080000);
REG_PL_WR(0x40001510,localVal);
}
static inline uint32_t rf_fsm_tx_vector_18_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001510);
return ((localVal & ((uint32_t)0x00040000)) >> 18);
}
static inline void rf_fsm_tx_vector_18_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001510);
localVal &= ~((uint32_t)0x00040000);
localVal |= (x << 18)&((uint32_t)0x00040000);
REG_PL_WR(0x40001510,localVal);
}
static inline uint32_t rf_fsm_tx_vector_17_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001510);
return ((localVal & ((uint32_t)0x00020000)) >> 17);
}
static inline void rf_fsm_tx_vector_17_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001510);
localVal &= ~((uint32_t)0x00020000);
localVal |= (x << 17)&((uint32_t)0x00020000);
REG_PL_WR(0x40001510,localVal);
}
static inline uint32_t rf_fsm_tx_vector_16_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001510);
return ((localVal & ((uint32_t)0x00010000)) >> 16);
}
static inline void rf_fsm_tx_vector_16_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001510);
localVal &= ~((uint32_t)0x00010000);
localVal |= (x << 16)&((uint32_t)0x00010000);
REG_PL_WR(0x40001510,localVal);
}
static inline uint32_t rf_fsm_tx_vector_15_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001510);
return ((localVal & ((uint32_t)0x00008000)) >> 15);
}
static inline void rf_fsm_tx_vector_15_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001510);
localVal &= ~((uint32_t)0x00008000);
localVal |= (x << 15)&((uint32_t)0x00008000);
REG_PL_WR(0x40001510,localVal);
}
static inline uint32_t rf_fsm_tx_vector_14_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001510);
return ((localVal & ((uint32_t)0x00004000)) >> 14);
}
static inline void rf_fsm_tx_vector_14_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001510);
localVal &= ~((uint32_t)0x00004000);
localVal |= (x << 14)&((uint32_t)0x00004000);
REG_PL_WR(0x40001510,localVal);
}
static inline uint32_t rf_fsm_tx_vector_13_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001510);
return ((localVal & ((uint32_t)0x00002000)) >> 13);
}
static inline void rf_fsm_tx_vector_13_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001510);
localVal &= ~((uint32_t)0x00002000);
localVal |= (x << 13)&((uint32_t)0x00002000);
REG_PL_WR(0x40001510,localVal);
}
static inline uint32_t rf_fsm_tx_vector_12_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001510);
return ((localVal & ((uint32_t)0x00001000)) >> 12);
}
static inline void rf_fsm_tx_vector_12_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001510);
localVal &= ~((uint32_t)0x00001000);
localVal |= (x << 12)&((uint32_t)0x00001000);
REG_PL_WR(0x40001510,localVal);
}
static inline uint32_t rf_fsm_tx_vector_11_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001510);
return ((localVal & ((uint32_t)0x00000800)) >> 11);
}
static inline void rf_fsm_tx_vector_11_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001510);
localVal &= ~((uint32_t)0x00000800);
localVal |= (x << 11)&((uint32_t)0x00000800);
REG_PL_WR(0x40001510,localVal);
}
static inline uint32_t rf_fsm_tx_vector_10_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001510);
return ((localVal & ((uint32_t)0x00000400)) >> 10);
}
static inline void rf_fsm_tx_vector_10_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001510);
localVal &= ~((uint32_t)0x00000400);
localVal |= (x << 10)&((uint32_t)0x00000400);
REG_PL_WR(0x40001510,localVal);
}
static inline uint32_t rf_fsm_tx_vector_09_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001510);
return ((localVal & ((uint32_t)0x00000200)) >> 9);
}
static inline void rf_fsm_tx_vector_09_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001510);
localVal &= ~((uint32_t)0x00000200);
localVal |= (x << 9)&((uint32_t)0x00000200);
REG_PL_WR(0x40001510,localVal);
}
static inline uint32_t rf_fsm_tx_vector_08_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001510);
return ((localVal & ((uint32_t)0x00000100)) >> 8);
}
static inline void rf_fsm_tx_vector_08_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001510);
localVal &= ~((uint32_t)0x00000100);
localVal |= (x << 8)&((uint32_t)0x00000100);
REG_PL_WR(0x40001510,localVal);
}
static inline uint32_t rf_fsm_tx_vector_07_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001510);
return ((localVal & ((uint32_t)0x00000080)) >> 7);
}
static inline void rf_fsm_tx_vector_07_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001510);
localVal &= ~((uint32_t)0x00000080);
localVal |= (x << 7)&((uint32_t)0x00000080);
REG_PL_WR(0x40001510,localVal);
}
static inline uint32_t rf_fsm_tx_vector_06_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001510);
return ((localVal & ((uint32_t)0x00000040)) >> 6);
}
static inline void rf_fsm_tx_vector_06_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001510);
localVal &= ~((uint32_t)0x00000040);
localVal |= (x << 6)&((uint32_t)0x00000040);
REG_PL_WR(0x40001510,localVal);
}
static inline uint32_t rf_fsm_tx_vector_05_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001510);
return ((localVal & ((uint32_t)0x00000020)) >> 5);
}
static inline void rf_fsm_tx_vector_05_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001510);
localVal &= ~((uint32_t)0x00000020);
localVal |= (x << 5)&((uint32_t)0x00000020);
REG_PL_WR(0x40001510,localVal);
}
static inline uint32_t rf_fsm_tx_vector_04_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001510);
return ((localVal & ((uint32_t)0x00000010)) >> 4);
}
static inline void rf_fsm_tx_vector_04_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001510);
localVal &= ~((uint32_t)0x00000010);
localVal |= (x << 4)&((uint32_t)0x00000010);
REG_PL_WR(0x40001510,localVal);
}
static inline uint32_t rf_fsm_tx_vector_03_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001510);
return ((localVal & ((uint32_t)0x00000008)) >> 3);
}
static inline void rf_fsm_tx_vector_03_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001510);
localVal &= ~((uint32_t)0x00000008);
localVal |= (x << 3)&((uint32_t)0x00000008);
REG_PL_WR(0x40001510,localVal);
}
static inline uint32_t rf_fsm_tx_vector_02_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001510);
return ((localVal & ((uint32_t)0x00000004)) >> 2);
}
static inline void rf_fsm_tx_vector_02_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001510);
localVal &= ~((uint32_t)0x00000004);
localVal |= (x << 2)&((uint32_t)0x00000004);
REG_PL_WR(0x40001510,localVal);
}
static inline uint32_t rf_fsm_tx_vector_01_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001510);
return ((localVal & ((uint32_t)0x00000002)) >> 1);
}
static inline void rf_fsm_tx_vector_01_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001510);
localVal &= ~((uint32_t)0x00000002);
localVal |= (x << 1)&((uint32_t)0x00000002);
REG_PL_WR(0x40001510,localVal);
}
static inline uint32_t rf_fsm_tx_vector_00_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001510);
return ((localVal & ((uint32_t)0x00000001)) >> 0);
}
static inline void rf_fsm_tx_vector_00_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001510);
localVal &= ~((uint32_t)0x00000001);
localVal |= (x << 0)&((uint32_t)0x00000001);
REG_PL_WR(0x40001510,localVal);
}
static inline uint32_t rf_fsm_t2r_iros_vector_21_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001514);
return ((localVal & ((uint32_t)0x00200000)) >> 21);
}
static inline void rf_fsm_t2r_iros_vector_21_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001514);
localVal &= ~((uint32_t)0x00200000);
localVal |= (x << 21)&((uint32_t)0x00200000);
REG_PL_WR(0x40001514,localVal);
}
static inline uint32_t rf_fsm_t2r_iros_vector_20_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001514);
return ((localVal & ((uint32_t)0x00100000)) >> 20);
}
static inline void rf_fsm_t2r_iros_vector_20_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001514);
localVal &= ~((uint32_t)0x00100000);
localVal |= (x << 20)&((uint32_t)0x00100000);
REG_PL_WR(0x40001514,localVal);
}
static inline uint32_t rf_fsm_t2r_iros_vector_19_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001514);
return ((localVal & ((uint32_t)0x00080000)) >> 19);
}
static inline void rf_fsm_t2r_iros_vector_19_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001514);
localVal &= ~((uint32_t)0x00080000);
localVal |= (x << 19)&((uint32_t)0x00080000);
REG_PL_WR(0x40001514,localVal);
}
static inline uint32_t rf_fsm_t2r_iros_vector_18_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001514);
return ((localVal & ((uint32_t)0x00040000)) >> 18);
}
static inline void rf_fsm_t2r_iros_vector_18_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001514);
localVal &= ~((uint32_t)0x00040000);
localVal |= (x << 18)&((uint32_t)0x00040000);
REG_PL_WR(0x40001514,localVal);
}
static inline uint32_t rf_fsm_t2r_iros_vector_17_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001514);
return ((localVal & ((uint32_t)0x00020000)) >> 17);
}
static inline void rf_fsm_t2r_iros_vector_17_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001514);
localVal &= ~((uint32_t)0x00020000);
localVal |= (x << 17)&((uint32_t)0x00020000);
REG_PL_WR(0x40001514,localVal);
}
static inline uint32_t rf_fsm_t2r_iros_vector_16_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001514);
return ((localVal & ((uint32_t)0x00010000)) >> 16);
}
static inline void rf_fsm_t2r_iros_vector_16_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001514);
localVal &= ~((uint32_t)0x00010000);
localVal |= (x << 16)&((uint32_t)0x00010000);
REG_PL_WR(0x40001514,localVal);
}
static inline uint32_t rf_fsm_t2r_iros_vector_15_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001514);
return ((localVal & ((uint32_t)0x00008000)) >> 15);
}
static inline void rf_fsm_t2r_iros_vector_15_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001514);
localVal &= ~((uint32_t)0x00008000);
localVal |= (x << 15)&((uint32_t)0x00008000);
REG_PL_WR(0x40001514,localVal);
}
static inline uint32_t rf_fsm_t2r_iros_vector_14_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001514);
return ((localVal & ((uint32_t)0x00004000)) >> 14);
}
static inline void rf_fsm_t2r_iros_vector_14_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001514);
localVal &= ~((uint32_t)0x00004000);
localVal |= (x << 14)&((uint32_t)0x00004000);
REG_PL_WR(0x40001514,localVal);
}
static inline uint32_t rf_fsm_t2r_iros_vector_13_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001514);
return ((localVal & ((uint32_t)0x00002000)) >> 13);
}
static inline void rf_fsm_t2r_iros_vector_13_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001514);
localVal &= ~((uint32_t)0x00002000);
localVal |= (x << 13)&((uint32_t)0x00002000);
REG_PL_WR(0x40001514,localVal);
}
static inline uint32_t rf_fsm_t2r_iros_vector_12_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001514);
return ((localVal & ((uint32_t)0x00001000)) >> 12);
}
static inline void rf_fsm_t2r_iros_vector_12_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001514);
localVal &= ~((uint32_t)0x00001000);
localVal |= (x << 12)&((uint32_t)0x00001000);
REG_PL_WR(0x40001514,localVal);
}
static inline uint32_t rf_fsm_t2r_iros_vector_11_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001514);
return ((localVal & ((uint32_t)0x00000800)) >> 11);
}
static inline void rf_fsm_t2r_iros_vector_11_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001514);
localVal &= ~((uint32_t)0x00000800);
localVal |= (x << 11)&((uint32_t)0x00000800);
REG_PL_WR(0x40001514,localVal);
}
static inline uint32_t rf_fsm_t2r_iros_vector_10_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001514);
return ((localVal & ((uint32_t)0x00000400)) >> 10);
}
static inline void rf_fsm_t2r_iros_vector_10_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001514);
localVal &= ~((uint32_t)0x00000400);
localVal |= (x << 10)&((uint32_t)0x00000400);
REG_PL_WR(0x40001514,localVal);
}
static inline uint32_t rf_fsm_t2r_iros_vector_09_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001514);
return ((localVal & ((uint32_t)0x00000200)) >> 9);
}
static inline void rf_fsm_t2r_iros_vector_09_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001514);
localVal &= ~((uint32_t)0x00000200);
localVal |= (x << 9)&((uint32_t)0x00000200);
REG_PL_WR(0x40001514,localVal);
}
static inline uint32_t rf_fsm_t2r_iros_vector_08_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001514);
return ((localVal & ((uint32_t)0x00000100)) >> 8);
}
static inline void rf_fsm_t2r_iros_vector_08_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001514);
localVal &= ~((uint32_t)0x00000100);
localVal |= (x << 8)&((uint32_t)0x00000100);
REG_PL_WR(0x40001514,localVal);
}
static inline uint32_t rf_fsm_t2r_iros_vector_07_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001514);
return ((localVal & ((uint32_t)0x00000080)) >> 7);
}
static inline void rf_fsm_t2r_iros_vector_07_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001514);
localVal &= ~((uint32_t)0x00000080);
localVal |= (x << 7)&((uint32_t)0x00000080);
REG_PL_WR(0x40001514,localVal);
}
static inline uint32_t rf_fsm_t2r_iros_vector_06_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001514);
return ((localVal & ((uint32_t)0x00000040)) >> 6);
}
static inline void rf_fsm_t2r_iros_vector_06_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001514);
localVal &= ~((uint32_t)0x00000040);
localVal |= (x << 6)&((uint32_t)0x00000040);
REG_PL_WR(0x40001514,localVal);
}
static inline uint32_t rf_fsm_t2r_iros_vector_05_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001514);
return ((localVal & ((uint32_t)0x00000020)) >> 5);
}
static inline void rf_fsm_t2r_iros_vector_05_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001514);
localVal &= ~((uint32_t)0x00000020);
localVal |= (x << 5)&((uint32_t)0x00000020);
REG_PL_WR(0x40001514,localVal);
}
static inline uint32_t rf_fsm_t2r_iros_vector_04_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001514);
return ((localVal & ((uint32_t)0x00000010)) >> 4);
}
static inline void rf_fsm_t2r_iros_vector_04_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001514);
localVal &= ~((uint32_t)0x00000010);
localVal |= (x << 4)&((uint32_t)0x00000010);
REG_PL_WR(0x40001514,localVal);
}
static inline uint32_t rf_fsm_t2r_iros_vector_03_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001514);
return ((localVal & ((uint32_t)0x00000008)) >> 3);
}
static inline void rf_fsm_t2r_iros_vector_03_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001514);
localVal &= ~((uint32_t)0x00000008);
localVal |= (x << 3)&((uint32_t)0x00000008);
REG_PL_WR(0x40001514,localVal);
}
static inline uint32_t rf_fsm_t2r_iros_vector_02_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001514);
return ((localVal & ((uint32_t)0x00000004)) >> 2);
}
static inline void rf_fsm_t2r_iros_vector_02_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001514);
localVal &= ~((uint32_t)0x00000004);
localVal |= (x << 2)&((uint32_t)0x00000004);
REG_PL_WR(0x40001514,localVal);
}
static inline uint32_t rf_fsm_t2r_iros_vector_01_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001514);
return ((localVal & ((uint32_t)0x00000002)) >> 1);
}
static inline void rf_fsm_t2r_iros_vector_01_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001514);
localVal &= ~((uint32_t)0x00000002);
localVal |= (x << 1)&((uint32_t)0x00000002);
REG_PL_WR(0x40001514,localVal);
}
static inline uint32_t rf_fsm_t2r_iros_vector_00_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001514);
return ((localVal & ((uint32_t)0x00000001)) >> 0);
}
static inline void rf_fsm_t2r_iros_vector_00_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001514);
localVal &= ~((uint32_t)0x00000001);
localVal |= (x << 0)&((uint32_t)0x00000001);
REG_PL_WR(0x40001514,localVal);
}
static inline uint32_t rf_fsm_r2t_vector_21_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001518);
return ((localVal & ((uint32_t)0x00200000)) >> 21);
}
static inline void rf_fsm_r2t_vector_21_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001518);
localVal &= ~((uint32_t)0x00200000);
localVal |= (x << 21)&((uint32_t)0x00200000);
REG_PL_WR(0x40001518,localVal);
}
static inline uint32_t rf_fsm_r2t_vector_20_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001518);
return ((localVal & ((uint32_t)0x00100000)) >> 20);
}
static inline void rf_fsm_r2t_vector_20_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001518);
localVal &= ~((uint32_t)0x00100000);
localVal |= (x << 20)&((uint32_t)0x00100000);
REG_PL_WR(0x40001518,localVal);
}
static inline uint32_t rf_fsm_r2t_vector_19_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001518);
return ((localVal & ((uint32_t)0x00080000)) >> 19);
}
static inline void rf_fsm_r2t_vector_19_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001518);
localVal &= ~((uint32_t)0x00080000);
localVal |= (x << 19)&((uint32_t)0x00080000);
REG_PL_WR(0x40001518,localVal);
}
static inline uint32_t rf_fsm_r2t_vector_18_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001518);
return ((localVal & ((uint32_t)0x00040000)) >> 18);
}
static inline void rf_fsm_r2t_vector_18_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001518);
localVal &= ~((uint32_t)0x00040000);
localVal |= (x << 18)&((uint32_t)0x00040000);
REG_PL_WR(0x40001518,localVal);
}
static inline uint32_t rf_fsm_r2t_vector_17_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001518);
return ((localVal & ((uint32_t)0x00020000)) >> 17);
}
static inline void rf_fsm_r2t_vector_17_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001518);
localVal &= ~((uint32_t)0x00020000);
localVal |= (x << 17)&((uint32_t)0x00020000);
REG_PL_WR(0x40001518,localVal);
}
static inline uint32_t rf_fsm_r2t_vector_16_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001518);
return ((localVal & ((uint32_t)0x00010000)) >> 16);
}
static inline void rf_fsm_r2t_vector_16_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001518);
localVal &= ~((uint32_t)0x00010000);
localVal |= (x << 16)&((uint32_t)0x00010000);
REG_PL_WR(0x40001518,localVal);
}
static inline uint32_t rf_fsm_r2t_vector_15_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001518);
return ((localVal & ((uint32_t)0x00008000)) >> 15);
}
static inline void rf_fsm_r2t_vector_15_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001518);
localVal &= ~((uint32_t)0x00008000);
localVal |= (x << 15)&((uint32_t)0x00008000);
REG_PL_WR(0x40001518,localVal);
}
static inline uint32_t rf_fsm_r2t_vector_14_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001518);
return ((localVal & ((uint32_t)0x00004000)) >> 14);
}
static inline void rf_fsm_r2t_vector_14_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001518);
localVal &= ~((uint32_t)0x00004000);
localVal |= (x << 14)&((uint32_t)0x00004000);
REG_PL_WR(0x40001518,localVal);
}
static inline uint32_t rf_fsm_r2t_vector_13_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001518);
return ((localVal & ((uint32_t)0x00002000)) >> 13);
}
static inline void rf_fsm_r2t_vector_13_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001518);
localVal &= ~((uint32_t)0x00002000);
localVal |= (x << 13)&((uint32_t)0x00002000);
REG_PL_WR(0x40001518,localVal);
}
static inline uint32_t rf_fsm_r2t_vector_12_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001518);
return ((localVal & ((uint32_t)0x00001000)) >> 12);
}
static inline void rf_fsm_r2t_vector_12_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001518);
localVal &= ~((uint32_t)0x00001000);
localVal |= (x << 12)&((uint32_t)0x00001000);
REG_PL_WR(0x40001518,localVal);
}
static inline uint32_t rf_fsm_r2t_vector_11_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001518);
return ((localVal & ((uint32_t)0x00000800)) >> 11);
}
static inline void rf_fsm_r2t_vector_11_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001518);
localVal &= ~((uint32_t)0x00000800);
localVal |= (x << 11)&((uint32_t)0x00000800);
REG_PL_WR(0x40001518,localVal);
}
static inline uint32_t rf_fsm_r2t_vector_10_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001518);
return ((localVal & ((uint32_t)0x00000400)) >> 10);
}
static inline void rf_fsm_r2t_vector_10_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001518);
localVal &= ~((uint32_t)0x00000400);
localVal |= (x << 10)&((uint32_t)0x00000400);
REG_PL_WR(0x40001518,localVal);
}
static inline uint32_t rf_fsm_r2t_vector_09_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001518);
return ((localVal & ((uint32_t)0x00000200)) >> 9);
}
static inline void rf_fsm_r2t_vector_09_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001518);
localVal &= ~((uint32_t)0x00000200);
localVal |= (x << 9)&((uint32_t)0x00000200);
REG_PL_WR(0x40001518,localVal);
}
static inline uint32_t rf_fsm_r2t_vector_08_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001518);
return ((localVal & ((uint32_t)0x00000100)) >> 8);
}
static inline void rf_fsm_r2t_vector_08_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001518);
localVal &= ~((uint32_t)0x00000100);
localVal |= (x << 8)&((uint32_t)0x00000100);
REG_PL_WR(0x40001518,localVal);
}
static inline uint32_t rf_fsm_r2t_vector_07_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001518);
return ((localVal & ((uint32_t)0x00000080)) >> 7);
}
static inline void rf_fsm_r2t_vector_07_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001518);
localVal &= ~((uint32_t)0x00000080);
localVal |= (x << 7)&((uint32_t)0x00000080);
REG_PL_WR(0x40001518,localVal);
}
static inline uint32_t rf_fsm_r2t_vector_06_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001518);
return ((localVal & ((uint32_t)0x00000040)) >> 6);
}
static inline void rf_fsm_r2t_vector_06_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001518);
localVal &= ~((uint32_t)0x00000040);
localVal |= (x << 6)&((uint32_t)0x00000040);
REG_PL_WR(0x40001518,localVal);
}
static inline uint32_t rf_fsm_r2t_vector_05_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001518);
return ((localVal & ((uint32_t)0x00000020)) >> 5);
}
static inline void rf_fsm_r2t_vector_05_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001518);
localVal &= ~((uint32_t)0x00000020);
localVal |= (x << 5)&((uint32_t)0x00000020);
REG_PL_WR(0x40001518,localVal);
}
static inline uint32_t rf_fsm_r2t_vector_04_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001518);
return ((localVal & ((uint32_t)0x00000010)) >> 4);
}
static inline void rf_fsm_r2t_vector_04_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001518);
localVal &= ~((uint32_t)0x00000010);
localVal |= (x << 4)&((uint32_t)0x00000010);
REG_PL_WR(0x40001518,localVal);
}
static inline uint32_t rf_fsm_r2t_vector_03_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001518);
return ((localVal & ((uint32_t)0x00000008)) >> 3);
}
static inline void rf_fsm_r2t_vector_03_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001518);
localVal &= ~((uint32_t)0x00000008);
localVal |= (x << 3)&((uint32_t)0x00000008);
REG_PL_WR(0x40001518,localVal);
}
static inline uint32_t rf_fsm_r2t_vector_02_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001518);
return ((localVal & ((uint32_t)0x00000004)) >> 2);
}
static inline void rf_fsm_r2t_vector_02_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001518);
localVal &= ~((uint32_t)0x00000004);
localVal |= (x << 2)&((uint32_t)0x00000004);
REG_PL_WR(0x40001518,localVal);
}
static inline uint32_t rf_fsm_r2t_vector_01_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001518);
return ((localVal & ((uint32_t)0x00000002)) >> 1);
}
static inline void rf_fsm_r2t_vector_01_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001518);
localVal &= ~((uint32_t)0x00000002);
localVal |= (x << 1)&((uint32_t)0x00000002);
REG_PL_WR(0x40001518,localVal);
}
static inline uint32_t rf_fsm_r2t_vector_00_getf(void)
{
uint32_t localVal = REG_PL_RD(0x40001518);
return ((localVal & ((uint32_t)0x00000001)) >> 0);
}
static inline void rf_fsm_r2t_vector_00_setf(uint32_t x)
{
uint32_t localVal = REG_PL_RD(0x40001518);
localVal &= ~((uint32_t)0x00000001);
localVal |= (x << 0)&((uint32_t)0x00000001);
REG_PL_WR(0x40001518,localVal);
}
#endif
|
mkroman/bl602-604
|
components/network/ble/blestack/src/port/include/zephyr.h
|
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef ZEPHYR_H
#define ZEPHYR_H
#include <stdint.h>
#include <stddef.h>
#include <zephyr/types.h>
#include <misc/slist.h>
#include <misc/dlist.h>
#include "bl_port.h"
#include "work_q.h"
#if defined(__cplusplus)
extern "C"
{
#endif
#define _STRINGIFY(x) #x
#if 0
#define ___in_section(a, b, c) \
__attribute__((section("." _STRINGIFY(a) \
"." _STRINGIFY(b) \
"." _STRINGIFY(c))))
#endif
#define ARG_UNUSED(x) (void)(x)
#ifndef __aligned
#define __aligned(x) __attribute__((__aligned__(x)))
#endif
#ifndef __printf_like
#define __printf_like(f, a) __attribute__((format (printf, f, a)))
#endif
#define STACK_ALIGN 4
#define ASSERT(test, fmt, ...)
#define K_FOREVER -1
#define K_NO_WAIT 0
/* Unaligned access */
#define UNALIGNED_GET(p) \
__extension__ ({ \
struct __attribute__((__packed__)) { \
__typeof__(*(p)) __v; \
} *__p = (__typeof__(__p)) (p); \
__p->__v; \
})
#ifndef UNUSED
#define UNUSED(x) (void)x
#endif
enum _poll_types_bits {
_POLL_TYPE_IGNORE,
_POLL_TYPE_SIGNAL,
_POLL_TYPE_SEM_AVAILABLE,
_POLL_TYPE_DATA_AVAILABLE,
_POLL_NUM_TYPES
};
#define _POLL_TYPE_BIT(type) (1 << ((type) - 1))
enum _poll_states_bits {
_POLL_STATE_NOT_READY,
_POLL_STATE_SIGNALED,
_POLL_STATE_SEM_AVAILABLE,
_POLL_STATE_DATA_AVAILABLE,
_POLL_NUM_STATES
};
#define _POLL_STATE_BIT(state) (1 << ((state) - 1))
#define _POLL_EVENT_NUM_UNUSED_BITS \
(32 - (0 \
+ 8 /* tag */ \
+ _POLL_NUM_TYPES \
+ _POLL_NUM_STATES \
+ 1 /* modes */ \
))
#define K_POLL_SIGNAL_INITIALIZER(obj) \
{ \
.poll_events = SYS_DLIST_STATIC_INIT(&obj.poll_events), \
.signaled = 0, \
.result = 0, \
}
struct k_poll_event {
sys_dnode_t _node;
struct _poller *poller;
u32_t tag:8;
u32_t type:_POLL_NUM_TYPES;
u32_t state:_POLL_NUM_STATES;
u32_t mode:1;
u32_t unused:_POLL_EVENT_NUM_UNUSED_BITS;
union {
void *obj;
struct k_poll_signal *signal;
struct k_sem *sem;
struct k_fifo *fifo;
struct k_queue *queue;
};
};
struct k_poll_signal {
sys_dlist_t poll_events;
unsigned int signaled;
int result;
};
#define K_POLL_STATE_NOT_READY 0
#define K_POLL_STATE_EADDRINUSE 1
#define K_POLL_STATE_SIGNALED 2
#define K_POLL_STATE_SEM_AVAILABLE 3
#define K_POLL_STATE_DATA_AVAILABLE 4
#define K_POLL_STATE_FIFO_DATA_AVAILABLE K_POLL_STATE_DATA_AVAILABLE
#define K_POLL_TYPE_IGNORE 0
#define K_POLL_TYPE_SIGNAL 1
#define K_POLL_TYPE_SEM_AVAILABLE 2
#define K_POLL_TYPE_DATA_AVAILABLE 3
#define K_POLL_TYPE_FIFO_DATA_AVAILABLE K_POLL_TYPE_DATA_AVAILABLE
#define K_POLL_EVENT_STATIC_INITIALIZER(event_type, event_mode, event_obj, \
event_tag) \
{ \
.type = event_type, \
.tag = event_tag, \
.state = K_POLL_STATE_NOT_READY, \
.mode = event_mode, \
.unused = 0, \
{ .obj = event_obj }, \
}
extern int k_poll_signal_raise(struct k_poll_signal *signal, int result);
extern int k_poll(struct k_poll_event *events, int num_events, s32_t timeout);
extern void k_poll_event_init(struct k_poll_event *event, u32_t type, int mode, void *obj);
/* public - polling modes */
enum k_poll_modes {
/* polling thread does not take ownership of objects when available */
K_POLL_MODE_NOTIFY_ONLY = 0,
K_POLL_NUM_MODES
};
#define k_oops()
//void k_sleep(s32_t duration);
#if defined(__cplusplus)
}
#endif
#endif /* ZEPHYR_H */
|
mkroman/bl602-604
|
components/bl602/bl602_std/bl602_std/StdDriver/Src/bl602_sec_eng.c
|
/**
******************************************************************************
* @file bl602_sec_eng.c
* @version V1.0
* @date
* @brief This file is the standard driver c file
******************************************************************************
* @attention
*
* <h2><center>© COPYRIGHT(c) 2020 Bouffalo Lab</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
#include "string.h"
#include "bl602_sec_eng.h"
/** @addtogroup BL602_Peripheral_Driver
* @{
*/
/** @addtogroup SEC_ENG
* @{
*/
/** @defgroup SEC_ENG_Private_Macros
* @{
*/
#define PUT_UINT32_BE(n,b,i) \
{ \
(b)[(i) ] = (uint8_t) ( (n) >> 24 ); \
(b)[(i) + 1] = (uint8_t) ( (n) >> 16 ); \
(b)[(i) + 2] = (uint8_t) ( (n) >> 8 ); \
(b)[(i) + 3] = (uint8_t) ( (n) ); \
}
#define PUT_UINT64_BE(n,b,i) \
{ \
(b)[(i) ] = (uint8_t) ( (n) >> 56 ); \
(b)[(i) + 1] = (uint8_t) ( (n) >> 48 ); \
(b)[(i) + 2] = (uint8_t) ( (n) >> 40 ); \
(b)[(i) + 3] = (uint8_t) ( (n) >> 32 ); \
(b)[(i) + 4] = (uint8_t) ( (n) >> 24 ); \
(b)[(i) + 5] = (uint8_t) ( (n) >> 16 ); \
(b)[(i) + 6] = (uint8_t) ( (n) >> 8 ); \
(b)[(i) + 7] = (uint8_t) ( (n) ); \
}
#define SEC_ENG_SHA_BUSY_TIMEOUT_COUNT (100*160*1000)
#define SEC_ENG_AES_BUSY_TIMEOUT_COUNT (100*160*1000)
#define SEC_ENG_TRNG_BUSY_TIMEOUT_COUNT (100*160*1000)
#define SEC_ENG_PKA_INT_TIMEOUT_COUNT (100*160*1000)
#define SEC_ENG_GMAC_BUSY_TIMEOUT_COUNT (100*160*1000)
/*@} end of group SEC_ENG_Private_Macros */
/** @defgroup SEC_ENG_Private_Types
* @{
*/
struct pka0_pld_cfg {
union {
struct {
uint32_t size : 12; /*[11: 0], r/w, 0x0 */
uint32_t d_reg_index : 8; /*[19:12], r/w, 0x0 */
uint32_t d_reg_type : 4; /*[23:20], r/w, 0x0 */
uint32_t op : 7; /*[30:24], r/w, 0x0 */
uint32_t last_op : 1; /*[31:31], r/w, 0x0 */
}BF;
uint32_t WORD;
} value;
};
struct pka0_pldi_cfg {
union {
struct {
uint32_t rsvd : 12; /*[11: 0], r/w, 0x0 */
uint32_t d_reg_index : 8; /*[19:12], r/w, 0x0 */
uint32_t d_reg_type : 4; /*[23:20], r/w, 0x0 */
uint32_t op : 7; /*[30:24], r/w, 0x0 */
uint32_t last_op : 1; /*[31:31], r/w, 0x0 */
}BF;
uint32_t WORD;
} value;
};
struct pka0_common_op_first_cfg{
union {
struct {
uint32_t s0_reg_idx : 8; /*[7: 0], r/w, 0x0 */
uint32_t s0_reg_type : 4; /*[11:8], r/w, 0x0 */
uint32_t d_reg_idx : 8; /*[19:12], r/w, 0x0 */
uint32_t d_reg_type : 4; /*[23:20], r/w, 0x0 */
uint32_t op : 7; /*[30:24], r/w, 0x0 */
uint32_t last_op : 1; /*[31:31], r/w, 0x0 */
}BF;
uint32_t WORD;
} value;
};
struct pka0_common_op_snd_cfg_S1_only{
union {
struct {
uint32_t reserved_0_11 : 12; /*[11: 0], rsvd, 0x0 */
uint32_t s1_reg_idx : 8; /*[19:12], r/w, 0x0 */
uint32_t s1_reg_type : 4; /*[23:20], r/w, 0x0 */
uint32_t reserved_24_31 : 8; /*[31:24], rsvd, 0x0 */
}BF;
uint32_t WORD;
} value;
};
struct pka0_common_op_snd_cfg_S2_only{
union {
struct {
uint32_t s2_reg_idx : 8; /*[7 : 0], r/w, 0x0 */
uint32_t s2_reg_type : 4; /*[11: 8], r/w, 0x0 */
uint32_t reserved_12_31 : 20; /*[31:12], rsvd, 0x0 */
}BF;
uint32_t WORD;
} value;
};
struct pka0_common_op_snd_cfg_S1_S2{
union {
struct {
uint32_t s2_reg_idx : 8; /*[7 : 0], r/w, 0x0 */
uint32_t s2_reg_type : 4; /*[11: 8], r/w, 0x0 */
uint32_t s1_reg_idx : 8; /*[19:12], r/w, 0x0 */
uint32_t s1_reg_type : 4; /*[23:20], r/w, 0x0 */
uint32_t reserved_24_31 : 8; /*[31:24], rsvd, 0x0 */
}BF;
uint32_t WORD;
} value;
};
struct pka0_bit_shift_op_cfg{
union {
struct {
uint32_t bit_shift : 15; /*[14: 0], r/w, 0x0 */
uint32_t reserved_24_31 : 17; /*[31:15], rsvd, 0x0 */
}BF;
uint32_t WORD;
} value;
};
/*@} end of group SEC_ENG_Private_Types */
/** @defgroup SEC_ENG_Private_Variables
* @{
*/
static intCallback_Type* secEngIntCbfArra[SEC_ENG_INT_ALL]= {NULL};
/*@} end of group SEC_ENG_Private_Variables */
/** @defgroup SEC_ENG_Global_Variables
* @{
*/
/*@} end of group SEC_ENG_Global_Variables */
/** @defgroup SEC_ENG_Private_Fun_Declaration
* @{
*/
/*@} end of group SEC_ENG_Private_Fun_Declaration */
/** @defgroup SEC_ENG_Public_Functions
* @{
*/
/****************************************************************************//**
* @brief SHA256 initialization function
*
* @param shaCtx: SHA256 context pointer
* @param shaNo: SHA ID type
* @param shaType: SHA type
* @param shaTmpBuf[16]: SHA temp buffer for store data that is less than 64 bytes
* @param padding[16]: SHA padding buffer for store padding data
*
* @return None
*
*******************************************************************************/
void Sec_Eng_SHA256_Init(SEC_Eng_SHA256_Ctx *shaCtx,SEC_ENG_SHA_ID_Type shaNo,SEC_ENG_SHA_Type shaType,uint32_t shaTmpBuf[16],uint32_t padding[16])
{
uint32_t SHAx = SEC_ENG_BASE+SEC_ENG_SHA_OFFSET;
uint32_t tmpVal;
/* Check the parameters */
CHECK_PARAM(IS_SEC_ENG_SHA_ID_TYPE(shaNo));
CHECK_PARAM(IS_SEC_ENG_SHA_TYPE(shaType));
/* Deal SHA control register to set SHA mode */
tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_CTRL);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SEC_ENG_SE_SHA_MODE,shaType);
BL_WR_REG(SHAx,SEC_ENG_SE_SHA_CTRL,tmpVal);
/* Clear context */
memset(shaCtx,0,sizeof(SEC_Eng_SHA256_Ctx));
/* Init temp buffer and padding buffer */
shaCtx->shaBuf=shaTmpBuf;
shaCtx->shaPadding=padding;
BL602_MemSet(shaCtx->shaPadding,0,64);
BL602_MemSet(shaCtx->shaPadding,0x80,1);
}
/****************************************************************************//**
* @brief SHA start function
*
* @param shaNo: SHA ID type
*
* @return None
*
*******************************************************************************/
void Sec_Eng_SHA_Start(SEC_ENG_SHA_ID_Type shaNo)
{
uint32_t SHAx = SEC_ENG_BASE+SEC_ENG_SHA_OFFSET;
uint32_t tmpVal;
/* Check the parameters */
CHECK_PARAM(IS_SEC_ENG_SHA_ID_TYPE(shaNo));
/* Set SHA enable */
tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_CTRL);
tmpVal=BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_SHA_EN);
/* Hash sel 0 for new start */
tmpVal=BL_CLR_REG_BIT(tmpVal,SEC_ENG_SE_SHA_HASH_SEL);
BL_WR_REG(SHAx,SEC_ENG_SE_SHA_CTRL,tmpVal);
}
/****************************************************************************//**
* @brief SHA256 update input data function
*
* @param shaCtx: SHA256 context pointer
* @param shaNo: SHA ID type
* @param input: SHA input data pointer, and the address should be word align
* @param len: SHA input data length
*
* @return SUCCESS or ERROR
*
*******************************************************************************/
BL_Err_Type Sec_Eng_SHA256_Update(SEC_Eng_SHA256_Ctx *shaCtx,SEC_ENG_SHA_ID_Type shaNo,const uint8_t *input, uint32_t len)
{
uint32_t SHAx = SEC_ENG_BASE+SEC_ENG_SHA_OFFSET;
uint32_t tmpVal;
uint32_t fill;
uint32_t left;
uint32_t timeoutCnt = SEC_ENG_SHA_BUSY_TIMEOUT_COUNT;
if( len == 0 ){
return SUCCESS;
}
do {
tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_CTRL);
timeoutCnt--;
if(timeoutCnt == 0){
return TIMEOUT;
}
}while(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_SHA_BUSY));
/* SHA need set se_sha_sel to 1 to keep the last SHA state */
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SEC_ENG_SE_SHA_HASH_SEL,shaCtx->shaFeed);
left = shaCtx->total[0] & 0x3F;
fill = 64 - left;
shaCtx->total[0] += (uint32_t) len;
shaCtx->total[0] &= 0xFFFFFFFF;
if( shaCtx->total[0] < (uint32_t) len ){
shaCtx->total[1]++;
}
if( left && len >= fill ){
BL602_MemCpy_Fast( (void *) ((uint8_t *)shaCtx->shaBuf + left), input, fill );
/* Set data source address */
BL_WR_REG(SHAx,SEC_ENG_SE_SHA_MSA,(uint32_t )shaCtx->shaBuf);
/* Set data length */
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SEC_ENG_SE_SHA_MSG_LEN,1);
BL_WR_REG(SHAx,SEC_ENG_SE_SHA_CTRL,tmpVal);
/* Trigger */
tmpVal=BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_SHA_TRIG_1T);
BL_WR_REG(SHAx,SEC_ENG_SE_SHA_CTRL,tmpVal);
shaCtx->shaFeed=1;
input += fill;
len -= fill;
left = 0;
}
fill=len/64;
len=len%64;
if( fill>0 ){
/* Wait finished */
timeoutCnt = SEC_ENG_SHA_BUSY_TIMEOUT_COUNT;
do {
tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_CTRL);
timeoutCnt--;
if(timeoutCnt == 0){
return TIMEOUT;
}
}while(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_SHA_BUSY));
/* SHA need set se_sha_sel to 1 to keep the last sha state */
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SEC_ENG_SE_SHA_HASH_SEL,shaCtx->shaFeed);
/* Fill data */
BL_WR_REG(SHAx,SEC_ENG_SE_SHA_MSA,(uint32_t)input);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SEC_ENG_SE_SHA_MSG_LEN,fill);
BL_WR_REG(SHAx,SEC_ENG_SE_SHA_CTRL,tmpVal);
tmpVal=BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_SHA_TRIG_1T);
BL_WR_REG(SHAx,SEC_ENG_SE_SHA_CTRL,tmpVal);
input+=(fill*64);
shaCtx->shaFeed=1;
}
if( len > 0 ){
/* Wait finished */
timeoutCnt = SEC_ENG_SHA_BUSY_TIMEOUT_COUNT;
do {
tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_CTRL);
timeoutCnt--;
if(timeoutCnt == 0){
return TIMEOUT;
}
}while(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_SHA_BUSY));
/* Copy left data into temp buffer */
BL602_MemCpy_Fast( (void *) ((uint8_t *)shaCtx->shaBuf + left), input, len );
}
/* Wait finished */
timeoutCnt = SEC_ENG_SHA_BUSY_TIMEOUT_COUNT;
do {
tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_CTRL);
timeoutCnt--;
if(timeoutCnt == 0){
return TIMEOUT;
}
}while(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_SHA_BUSY));
return SUCCESS;
}
/****************************************************************************//**
* @brief SHA256 finish to get output function
*
* @param shaCtx: SHA256 context pointer
* @param shaNo: SHA ID type
* @param hash: SHA output data of SHA result
*
* @return SUCCESS
*
*******************************************************************************/
BL_Err_Type Sec_Eng_SHA256_Finish(SEC_Eng_SHA256_Ctx *shaCtx,SEC_ENG_SHA_ID_Type shaNo,uint8_t *hash)
{
uint32_t last, padn;
uint32_t high, low;
uint8_t shaMode;
uint8_t msgLen[8];
uint8_t *p=(uint8_t *)hash;
uint32_t SHAx = SEC_ENG_BASE+SEC_ENG_SHA_OFFSET;
uint32_t tmpVal;
uint32_t timeoutCnt = SEC_ENG_SHA_BUSY_TIMEOUT_COUNT;
/* Check the parameters */
CHECK_PARAM(IS_SEC_ENG_SHA_ID_TYPE(shaNo));
/* Wait finished */
do {
tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_CTRL);
timeoutCnt--;
if(timeoutCnt == 0){
return TIMEOUT;
}
}while(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_SHA_BUSY));
high = ( shaCtx->total[0] >> 29 )
| ( shaCtx->total[1] << 3 );
low = ( shaCtx->total[0] << 3 );
PUT_UINT32_BE( high, msgLen, 0 );
PUT_UINT32_BE( low, msgLen, 4 );
last = shaCtx->total[0] & 0x3F;
padn = ( last < 56 ) ? ( 56 - last ) : ( 120 - last );
Sec_Eng_SHA256_Update(shaCtx,shaNo, (uint8_t *)shaCtx->shaPadding, padn );
/* Wait for shaPadding idle */
timeoutCnt = SEC_ENG_SHA_BUSY_TIMEOUT_COUNT;
do {
tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_CTRL);
timeoutCnt--;
if(timeoutCnt == 0){
return TIMEOUT;
}
}while(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_SHA_BUSY));
BL602_MemCpy_Fast(shaCtx->shaPadding,msgLen,8);
Sec_Eng_SHA256_Update(shaCtx,shaNo, (uint8_t *)shaCtx->shaPadding, 8 );
/* Wait finished */
timeoutCnt = SEC_ENG_SHA_BUSY_TIMEOUT_COUNT;
do {
tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_CTRL);
timeoutCnt--;
if(timeoutCnt == 0){
return TIMEOUT;
}
}while(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_SHA_BUSY));
tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_CTRL);
shaMode=(SEC_ENG_SHA_Type)BL_GET_REG_BITS_VAL(tmpVal,SEC_ENG_SE_SHA_MODE);
/* Copy SHA value */
tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_HASH_L_0);
*p++=(tmpVal&0xff);*p++=((tmpVal>>8)&0xff);*p++=((tmpVal>>16)&0xff);*p++=((tmpVal>>24)&0xff);
tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_HASH_L_1);
*p++=(tmpVal&0xff);*p++=((tmpVal>>8)&0xff);*p++=((tmpVal>>16)&0xff);*p++=((tmpVal>>24)&0xff);
tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_HASH_L_2);
*p++=(tmpVal&0xff);*p++=((tmpVal>>8)&0xff);*p++=((tmpVal>>16)&0xff);*p++=((tmpVal>>24)&0xff);
tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_HASH_L_3);
*p++=(tmpVal&0xff);*p++=((tmpVal>>8)&0xff);*p++=((tmpVal>>16)&0xff);*p++=((tmpVal>>24)&0xff);
tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_HASH_L_4);
*p++=(tmpVal&0xff);*p++=((tmpVal>>8)&0xff);*p++=((tmpVal>>16)&0xff);*p++=((tmpVal>>24)&0xff);
if (shaMode==SEC_ENG_SHA224 || shaMode==SEC_ENG_SHA256){
tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_HASH_L_5);
*p++=(tmpVal&0xff);*p++=((tmpVal>>8)&0xff);*p++=((tmpVal>>16)&0xff);*p++=((tmpVal>>24)&0xff);
tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_HASH_L_6);
*p++=(tmpVal&0xff);*p++=((tmpVal>>8)&0xff);*p++=((tmpVal>>16)&0xff);*p++=((tmpVal>>24)&0xff);
if (shaMode==SEC_ENG_SHA256){
tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_HASH_L_7);
*p++=(tmpVal&0xff);*p++=((tmpVal>>8)&0xff);*p++=((tmpVal>>16)&0xff);*p++=((tmpVal>>24)&0xff);
}
}
/* Disable SHA engine*/
tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_CTRL);
tmpVal=BL_CLR_REG_BIT(tmpVal,SEC_ENG_SE_SHA_HASH_SEL);
tmpVal=BL_CLR_REG_BIT(tmpVal,SEC_ENG_SE_SHA_EN);
BL_WR_REG(SHAx,SEC_ENG_SE_SHA_CTRL,tmpVal);
return SUCCESS;
}
/****************************************************************************//**
* @brief SHA enable link mode and set link config address
*
* @param shaNo: SHA ID type
*
* @return None
*
*******************************************************************************/
void Sec_Eng_SHA_Enable_Link(SEC_ENG_SHA_ID_Type shaNo)
{
uint32_t SHAx = SEC_ENG_BASE;
uint32_t tmpVal;
/* Check the parameters */
CHECK_PARAM(IS_SEC_ENG_SHA_ID_TYPE(shaNo));
/* Enable sha and enable link mode */
tmpVal = BL_RD_REG(SHAx,SEC_ENG_SE_SHA_0_CTRL);
tmpVal = BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_SHA_0_EN);
tmpVal = BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_SHA_0_LINK_MODE);
BL_WR_REG(SHAx,SEC_ENG_SE_SHA_0_CTRL,tmpVal);
}
/****************************************************************************//**
* @brief SHA disable link mode
*
* @param shaNo: SHA ID type
*
* @return None
*
*******************************************************************************/
void Sec_Eng_SHA_Disable_Link(SEC_ENG_SHA_ID_Type shaNo)
{
uint32_t SHAx = SEC_ENG_BASE;
uint32_t tmpVal;
/* Check the parameters */
CHECK_PARAM(IS_SEC_ENG_SHA_ID_TYPE(shaNo));
/* Disable sha and disable link mode */
tmpVal = BL_RD_REG(SHAx,SEC_ENG_SE_SHA_0_CTRL);
tmpVal = BL_CLR_REG_BIT(tmpVal,SEC_ENG_SE_SHA_0_LINK_MODE);
tmpVal = BL_CLR_REG_BIT(tmpVal,SEC_ENG_SE_SHA_0_EN);
BL_WR_REG(SHAx,SEC_ENG_SE_SHA_0_CTRL,tmpVal);
}
/****************************************************************************//**
* @brief SHA256 link mode initialization function
*
* @param shaCtx: SHA256 link mode context pointer
* @param shaNo: SHA ID type
* @param linkAddr: SHA link configure address
* @param shaTmpBuf[16]: SHA temp buffer for store data that is less than 64 bytes
* @param padding[16]: SHA padding buffer for store padding data
*
* @return None
*
*******************************************************************************/
void Sec_Eng_SHA256_Link_Init(SEC_Eng_SHA256_Link_Ctx *shaCtx,SEC_ENG_SHA_ID_Type shaNo,uint32_t linkAddr,uint32_t shaTmpBuf[16],uint32_t padding[16])
{
/* Check the parameters */
CHECK_PARAM(IS_SEC_ENG_SHA_ID_TYPE(shaNo));
/* Clear context */
memset(shaCtx,0,sizeof(SEC_Eng_SHA256_Link_Ctx));
/* Init temp buffer,padding buffer and link address */
shaCtx->shaBuf=shaTmpBuf;
shaCtx->shaPadding=padding;
BL602_MemSet(shaCtx->shaPadding,0,64);
BL602_MemSet(shaCtx->shaPadding,0x80,1);
shaCtx->linkAddr=linkAddr;
}
/****************************************************************************//**
* @brief SHA256 link mode update input data function
*
* @param shaCtx: SHA256 link mode context pointer
* @param shaNo: SHA ID type
* @param input: SHA input data pointer, and the address should be word align
* @param len: SHA input data length
*
* @return SUCCESS or ERROR
*
*******************************************************************************/
BL_Err_Type Sec_Eng_SHA256_Link_Update(SEC_Eng_SHA256_Link_Ctx *shaCtx,SEC_ENG_SHA_ID_Type shaNo,const uint8_t *input, uint32_t len)
{
uint32_t SHAx = SEC_ENG_BASE;
uint32_t tmpVal;
uint32_t fill;
uint32_t left;
uint32_t timeoutCnt = SEC_ENG_SHA_BUSY_TIMEOUT_COUNT;
if( len == 0 ){
return SUCCESS;
}
do {
tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_0_CTRL);
timeoutCnt--;
if(timeoutCnt == 0){
return TIMEOUT;
}
}while(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_SHA_0_BUSY));
/* Set link address */
BL_WR_REG(SHAx,SEC_ENG_SE_SHA_0_LINK,shaCtx->linkAddr);
left = shaCtx->total[0] & 0x3F;
fill = 64 - left;
shaCtx->total[0] += (uint32_t) len;
shaCtx->total[0] &= 0xFFFFFFFF;
if( shaCtx->total[0] < (uint32_t) len ){
shaCtx->total[1]++;
}
if( left && len >= fill ){
BL602_MemCpy_Fast( (void *) ((uint8_t *)shaCtx->shaBuf + left), input, fill );
/* Set data source address */
*(uint32_t *)(shaCtx->linkAddr+4) = (uint32_t)shaCtx->shaBuf;
/* Set data length */
*((uint16_t *)shaCtx->linkAddr+1) = 1;
/* Trigger */
tmpVal = BL_RD_REG(SHAx,SEC_ENG_SE_SHA_0_CTRL);
BL_WR_REG(SHAx,SEC_ENG_SE_SHA_0_CTRL,BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_SHA_0_TRIG_1T));
/* Choose accumulating last hash in the next time */
*((uint32_t *)shaCtx->linkAddr) |= 0x40;
input += fill;
len -= fill;
left = 0;
}
fill=len/64;
len=len%64;
if( fill>0 ){
/* Wait finished */
timeoutCnt = SEC_ENG_SHA_BUSY_TIMEOUT_COUNT;
do {
tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_0_CTRL);
timeoutCnt--;
if(timeoutCnt == 0){
return TIMEOUT;
}
}while(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_SHA_0_BUSY));
/* Fill data */
*(uint32_t *)(shaCtx->linkAddr+4) = (uint32_t)input;
*((uint16_t *)shaCtx->linkAddr+1) = fill;
/* Trigger */
tmpVal = BL_RD_REG(SHAx,SEC_ENG_SE_SHA_0_CTRL);
BL_WR_REG(SHAx,SEC_ENG_SE_SHA_0_CTRL,BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_SHA_0_TRIG_1T));
input+=(fill*64);
/* Choose accumulating last hash in the next time */
*((uint32_t *)shaCtx->linkAddr) |= 0x40;
}
if( len > 0 ){
/* Wait finished */
timeoutCnt = SEC_ENG_SHA_BUSY_TIMEOUT_COUNT;
do {
tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_0_CTRL);
timeoutCnt--;
if(timeoutCnt == 0){
return TIMEOUT;
}
}while(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_SHA_0_BUSY));
/* Copy left data into temp buffer */
BL602_MemCpy_Fast( (void *) ((uint8_t *)shaCtx->shaBuf + left), input, len );
}
/* Wait finished */
timeoutCnt = SEC_ENG_SHA_BUSY_TIMEOUT_COUNT;
do {
tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_0_CTRL);
timeoutCnt--;
if(timeoutCnt == 0){
return TIMEOUT;
}
}while(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_SHA_0_BUSY));
return SUCCESS;
}
/****************************************************************************//**
* @brief SHA256 link mode finish to get output function
*
* @param shaCtx: SHA256 link mode context pointer
* @param shaNo: SHA ID type
* @param hash: SHA output data of SHA result
*
* @return SUCCESS
*
*******************************************************************************/
BL_Err_Type Sec_Eng_SHA256_Link_Finish(SEC_Eng_SHA256_Link_Ctx *shaCtx,SEC_ENG_SHA_ID_Type shaNo,uint8_t *hash)
{
uint32_t last, padn;
uint32_t high, low;
uint8_t msgLen[8];
uint32_t SHAx = SEC_ENG_BASE;
uint32_t tmpVal;
uint32_t shaMode = (*(uint32_t *)shaCtx->linkAddr)>>2&0x7;
uint32_t timeoutCnt = SEC_ENG_SHA_BUSY_TIMEOUT_COUNT;
/* Check the parameters */
CHECK_PARAM(IS_SEC_ENG_SHA_ID_TYPE(shaNo));
/* Wait finished */
do {
tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_0_CTRL);
timeoutCnt--;
if(timeoutCnt == 0){
return TIMEOUT;
}
}while(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_SHA_0_BUSY));
/* Set link address */
BL_WR_REG(SHAx,SEC_ENG_SE_SHA_0_LINK,shaCtx->linkAddr);
high = ( shaCtx->total[0] >> 29 )
| ( shaCtx->total[1] << 3 );
low = ( shaCtx->total[0] << 3 );
PUT_UINT32_BE( high, msgLen, 0 );
PUT_UINT32_BE( low, msgLen, 4 );
last = shaCtx->total[0] & 0x3F;
padn = ( last < 56 ) ? ( 56 - last ) : ( 120 - last );
Sec_Eng_SHA256_Link_Update(shaCtx,shaNo, (uint8_t *)shaCtx->shaPadding, padn );
/* Wait for shaPadding idle */
timeoutCnt = SEC_ENG_SHA_BUSY_TIMEOUT_COUNT;
do {
tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_0_CTRL);
timeoutCnt--;
if(timeoutCnt == 0){
return TIMEOUT;
}
}while(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_SHA_0_BUSY));
Sec_Eng_SHA256_Link_Update(shaCtx,shaNo, msgLen, 8 );
/* Wait finished */
timeoutCnt = SEC_ENG_SHA_BUSY_TIMEOUT_COUNT;
do {
tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_0_CTRL);
timeoutCnt--;
if(timeoutCnt == 0){
return TIMEOUT;
}
}while(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_SHA_0_BUSY));
/* Get result according to SHA mode,result is placed in (link address + offset:8) */
switch(shaMode){
case 0:
BL602_MemCpy_Fast(hash,(uint8_t *)(shaCtx->linkAddr+8),32);
break;
case 1:
BL602_MemCpy_Fast(hash,(uint8_t *)(shaCtx->linkAddr+8),28);
break;
case 2:
BL602_MemCpy_Fast(hash,(uint8_t *)(shaCtx->linkAddr+8),20);
break;
case 3:
BL602_MemCpy_Fast(hash,(uint8_t *)(shaCtx->linkAddr+8),20);
break;
default:
break;
}
/* Choose new hash in the next time */
*((uint32_t *)shaCtx->linkAddr) &= ~0x40;
return SUCCESS;
}
/****************************************************************************//**
* @brief AES initialization function
*
* @param aesCtx: AES context pointer
* @param aesNo: AES ID type
* @param aesType: AES type:ECB,CTR,CBC
* @param keyType: AES key type:128,256,192
* @param enDecType: AES encryption or decryption
*
* @return SUCCESS
*
*******************************************************************************/
BL_Err_Type Sec_Eng_AES_Init(SEC_Eng_AES_Ctx *aesCtx,SEC_ENG_AES_ID_Type aesNo,SEC_ENG_AES_Type aesType,SEC_ENG_AES_Key_Type keyType,SEC_ENG_AES_EnDec_Type enDecType)
{
uint32_t AESx = SEC_ENG_BASE+SEC_ENG_AES_OFFSET;
uint32_t tmpVal;
uint32_t timeoutCnt = SEC_ENG_AES_BUSY_TIMEOUT_COUNT;
/* Check the parameters */
CHECK_PARAM(IS_SEC_ENG_AES_ID_TYPE(aesNo));
CHECK_PARAM(IS_SEC_ENG_AES_TYPE(aesType));
CHECK_PARAM(IS_SEC_ENG_AES_KEY_TYPE(keyType));
CHECK_PARAM(IS_SEC_ENG_AES_ENDEC_TYPE(enDecType));
/* Wait finished */
do {
tmpVal=BL_RD_REG(AESx,SEC_ENG_SE_AES_CTRL);
timeoutCnt--;
if(timeoutCnt == 0){
return TIMEOUT;
}
}while(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_AES_BUSY));
/* Set AES mode type*/
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SEC_ENG_SE_AES_BLOCK_MODE,aesType);
/* Set AES key type */
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SEC_ENG_SE_AES_MODE,keyType);
/* Set AES encryption or decryption */
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SEC_ENG_SE_AES_DEC_EN,enDecType);
/* Clear dec_key_sel to select new key */
tmpVal=BL_CLR_REG_BIT(tmpVal,SEC_ENG_SE_AES_DEC_KEY_SEL);
/* Clear aes iv sel to select new iv */
tmpVal=BL_CLR_REG_BIT(tmpVal,SEC_ENG_SE_AES_IV_SEL);
/* Clear AES interrupt */
tmpVal=BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_AES_INT_CLR_1T);
/* Enable AES */
tmpVal=BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_AES_EN);
BL_WR_REG(AESx,SEC_ENG_SE_AES_CTRL,tmpVal);
/* Clear AES context */
memset(aesCtx,0,sizeof(SEC_Eng_AES_Ctx));
return SUCCESS;
}
/****************************************************************************//**
* @brief AES enable function,set AES bigendian
*
* @param aesNo: AES ID type
*
* @return None
*
*******************************************************************************/
void Sec_Eng_AES_Enable_BE(SEC_ENG_AES_ID_Type aesNo)
{
uint32_t AESx = SEC_ENG_BASE+SEC_ENG_AES_OFFSET;
/* Check the parameters */
CHECK_PARAM(IS_SEC_ENG_AES_ID_TYPE(aesNo));
BL_WR_REG(AESx,SEC_ENG_SE_AES_ENDIAN,0x0f);
}
/****************************************************************************//**
* @brief AES enable function,set AES littleendian
*
* @param aesNo: AES ID type
*
* @return None
*
*******************************************************************************/
void Sec_Eng_AES_Enable_LE(SEC_ENG_AES_ID_Type aesNo)
{
uint32_t AESx = SEC_ENG_BASE+SEC_ENG_AES_OFFSET;
/* Check the parameters */
CHECK_PARAM(IS_SEC_ENG_AES_ID_TYPE(aesNo));
BL_WR_REG(AESx,SEC_ENG_SE_AES_ENDIAN,0x00);
}
/****************************************************************************//**
* @brief AES enable link mode
*
* @param aesNo: AES ID type
*
* @return None
*
*******************************************************************************/
void Sec_Eng_AES_Enable_Link(SEC_ENG_AES_ID_Type aesNo)
{
uint32_t AESx = SEC_ENG_BASE;
uint32_t tmpVal;
/* Check the parameters */
CHECK_PARAM(IS_SEC_ENG_AES_ID_TYPE(aesNo));
/* Enable aes link mode */
tmpVal = BL_RD_REG(AESx,SEC_ENG_SE_AES_0_CTRL);
BL_WR_REG(AESx,SEC_ENG_SE_AES_0_CTRL,BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_AES_0_LINK_MODE));
}
/****************************************************************************//**
* @brief AES disable link mode
*
* @param aesNo: AES ID type
*
* @return None
*
*******************************************************************************/
void Sec_Eng_AES_Disable_Link(SEC_ENG_AES_ID_Type aesNo)
{
uint32_t AESx = SEC_ENG_BASE;
uint32_t tmpVal;
/* Check the parameters */
CHECK_PARAM(IS_SEC_ENG_AES_ID_TYPE(aesNo));
/* Disable aes link mode */
tmpVal = BL_RD_REG(AESx,SEC_ENG_SE_AES_0_CTRL);
BL_WR_REG(AESx,SEC_ENG_SE_AES_0_CTRL,BL_CLR_REG_BIT(tmpVal,SEC_ENG_SE_AES_0_LINK_MODE));
}
/****************************************************************************//**
* @brief AES work in link mode
*
* @param aesNo: AES ID type
* @param linkAddr: Address of config structure in link mode
* @param in: AES input data buffer to deal with
* @param len: AES input data length
* @param out: AES output data buffer
*
* @return SUCCESS or ERROR
*
*******************************************************************************/
BL_Err_Type Sec_Eng_AES_Link_Work(SEC_ENG_AES_ID_Type aesNo,uint32_t linkAddr,const uint8_t *in,uint32_t len,uint8_t *out)
{
uint32_t AESx = SEC_ENG_BASE;
uint32_t tmpVal;
uint32_t timeoutCnt = SEC_ENG_AES_BUSY_TIMEOUT_COUNT;
/* Check the parameters */
CHECK_PARAM(IS_SEC_ENG_AES_ID_TYPE(aesNo));
/* Link address should word align */
if((linkAddr&0x03) != 0 || len%16 != 0){
return ERROR;
}
/* Wait finished */
do {
tmpVal=BL_RD_REG(AESx,SEC_ENG_SE_AES_0_CTRL);
timeoutCnt--;
if(timeoutCnt == 0){
return TIMEOUT;
}
}while(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_AES_0_BUSY));
/* Set link address */
BL_WR_REG(AESx,SEC_ENG_SE_AES_0_LINK,linkAddr);
/* Change source buffer address and destination buffer address */
*(uint32_t *)(linkAddr+4) = (uint32_t)in;
*(uint32_t *)(linkAddr+8) = (uint32_t)out;
/* Set data length */
*((uint16_t *)linkAddr+1) = len/16;
/* Enable aes */
tmpVal = BL_RD_REG(AESx,SEC_ENG_SE_AES_0_CTRL);
BL_WR_REG(AESx,SEC_ENG_SE_AES_0_CTRL,BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_AES_0_EN));
/* Start aes engine and wait finishing */
tmpVal = BL_RD_REG(AESx,SEC_ENG_SE_AES_0_CTRL);
BL_WR_REG(AESx,SEC_ENG_SE_AES_0_CTRL,BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_AES_0_TRIG_1T));
__NOP();
__NOP();
timeoutCnt = SEC_ENG_AES_BUSY_TIMEOUT_COUNT;
do {
tmpVal=BL_RD_REG(AESx,SEC_ENG_SE_AES_0_CTRL);
timeoutCnt--;
if(timeoutCnt == 0){
return TIMEOUT;
}
}while(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_AES_0_BUSY));
/* Disable aes */
BL_WR_REG(AESx,SEC_ENG_SE_AES_0_CTRL,BL_CLR_REG_BIT(tmpVal,SEC_ENG_SE_AES_0_EN));
return SUCCESS;
}
/****************************************************************************//**
* @brief AES set hardware key source:efuse region for CPU0 or region efuse for CPU1
*
* @param aesNo: AES ID type
* @param src: AES key source type
*
* @return None
*
*******************************************************************************/
void Sec_Eng_AES_Set_Hw_Key_Src(SEC_ENG_AES_ID_Type aesNo,uint8_t src)
{
uint32_t AESx = SEC_ENG_BASE+SEC_ENG_AES_OFFSET;
uint32_t tmpVal;
/* Check the parameters */
CHECK_PARAM(IS_SEC_ENG_AES_ID_TYPE(aesNo));
tmpVal=BL_RD_REG(AESx,SEC_ENG_SE_AES_SBOOT);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SEC_ENG_SE_AES_SBOOT_KEY_SEL,src);
BL_WR_REG(AESx,SEC_ENG_SE_AES_SBOOT,tmpVal);
}
/****************************************************************************//**
* @brief AES set KEY and IV
*
* @param aesNo: AES ID type
* @param keySrc: AES KEY type:SEC_ENG_AES_KEY_HW or SEC_ENG_AES_KEY_SW
* @param key: AES KEY pointer
* @param iv: AES IV pointer
*
* @return None
*
*******************************************************************************/
void Sec_Eng_AES_Set_Key_IV(SEC_ENG_AES_ID_Type aesNo,SEC_ENG_AES_Key_Src_Type keySrc,const uint8_t *key,const uint8_t *iv)
{
uint32_t AESx = SEC_ENG_BASE+SEC_ENG_AES_OFFSET;
uint32_t tmpVal;
uint32_t keyType;
/* Check the parameters */
CHECK_PARAM(IS_SEC_ENG_AES_ID_TYPE(aesNo));
CHECK_PARAM(IS_SEC_ENG_AES_KEY_SRC_TYPE(keySrc));
/* Set IV */
BL_WR_REG(AESx,SEC_ENG_SE_AES_IV_3,__REV(BL_RDWD_FRM_BYTEP(iv)));
iv+=4;
BL_WR_REG(AESx,SEC_ENG_SE_AES_IV_2,__REV(BL_RDWD_FRM_BYTEP(iv)));
iv+=4;
BL_WR_REG(AESx,SEC_ENG_SE_AES_IV_1,__REV(BL_RDWD_FRM_BYTEP(iv)));
iv+=4;
BL_WR_REG(AESx,SEC_ENG_SE_AES_IV_0,__REV(BL_RDWD_FRM_BYTEP(iv)));
iv+=4;
/* Select hardware key */
if(keySrc==SEC_ENG_AES_KEY_HW){
tmpVal=BL_RD_REG(AESx,SEC_ENG_SE_AES_CTRL);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SEC_ENG_SE_AES_HW_KEY_EN,SEC_ENG_AES_KEY_HW);
BL_WR_REG(AESx,SEC_ENG_SE_AES_CTRL,tmpVal);
tmpVal=BL_RD_REG(AESx,SEC_ENG_SE_AES_KEY_SEL_0);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SEC_ENG_SE_AES_KEY_SEL_0,*key);
BL_WR_REG(AESx,SEC_ENG_SE_AES_KEY_SEL_0,tmpVal);
tmpVal=BL_RD_REG(AESx,SEC_ENG_SE_AES_KEY_SEL_1);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SEC_ENG_SE_AES_KEY_SEL_1,*key);
BL_WR_REG(AESx,SEC_ENG_SE_AES_KEY_SEL_1,tmpVal);
return;
}
BL_WR_REG(AESx,SEC_ENG_SE_AES_KEY_7,__REV(BL_RDWD_FRM_BYTEP(key)));
key+=4;
BL_WR_REG(AESx,SEC_ENG_SE_AES_KEY_6,__REV(BL_RDWD_FRM_BYTEP(key)));
key+=4;
BL_WR_REG(AESx,SEC_ENG_SE_AES_KEY_5,__REV(BL_RDWD_FRM_BYTEP(key)));
key+=4;
BL_WR_REG(AESx,SEC_ENG_SE_AES_KEY_4,__REV(BL_RDWD_FRM_BYTEP(key)));
key+=4;
tmpVal=BL_RD_REG(AESx,SEC_ENG_SE_AES_CTRL);
keyType=BL_GET_REG_BITS_VAL(tmpVal,SEC_ENG_SE_AES_MODE);
if(keyType==(uint32_t)SEC_ENG_AES_KEY_192BITS){
BL_WR_REG(AESx,SEC_ENG_SE_AES_KEY_3,__REV(BL_RDWD_FRM_BYTEP(key)));
key+=4;
BL_WR_REG(AESx,SEC_ENG_SE_AES_KEY_2,__REV(BL_RDWD_FRM_BYTEP(key)));
key+=4;
}else if(keyType==(uint32_t)SEC_ENG_AES_KEY_256BITS || keyType==(uint32_t)SEC_ENG_AES_DOUBLE_KEY_128BITS){
BL_WR_REG(AESx,SEC_ENG_SE_AES_KEY_3,__REV(BL_RDWD_FRM_BYTEP(key)));
key+=4;
BL_WR_REG(AESx,SEC_ENG_SE_AES_KEY_2,__REV(BL_RDWD_FRM_BYTEP(key)));
key+=4;
BL_WR_REG(AESx,SEC_ENG_SE_AES_KEY_1,__REV(BL_RDWD_FRM_BYTEP(key)));
key+=4;
BL_WR_REG(AESx,SEC_ENG_SE_AES_KEY_0,__REV(BL_RDWD_FRM_BYTEP(key)));
key+=4;
}
/* Select software key */
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SEC_ENG_SE_AES_HW_KEY_EN,SEC_ENG_AES_KEY_SW);
BL_WR_REG(AESx,SEC_ENG_SE_AES_CTRL,tmpVal);
}
/****************************************************************************//**
* @brief AES set KEY and IV with bigendian
*
* @param aesNo: AES ID type
* @param keySrc: AES KEY type:SEC_ENG_AES_KEY_HW or SEC_ENG_AES_KEY_SW
* @param key: AES KEY pointer
* @param iv: AES IV pointer
*
* @return None
*
*******************************************************************************/
void Sec_Eng_AES_Set_Key_IV_BE(SEC_ENG_AES_ID_Type aesNo,SEC_ENG_AES_Key_Src_Type keySrc,const uint8_t *key,const uint8_t *iv)
{
uint32_t AESx = SEC_ENG_BASE+SEC_ENG_AES_OFFSET;
uint32_t tmpVal;
uint32_t keyType;
/* Check the parameters */
CHECK_PARAM(IS_SEC_ENG_AES_ID_TYPE(aesNo));
CHECK_PARAM(IS_SEC_ENG_AES_KEY_SRC_TYPE(keySrc));
/* Set IV */
BL_WR_REG(AESx,SEC_ENG_SE_AES_IV_0,BL_RDWD_FRM_BYTEP(iv));
iv+=4;
BL_WR_REG(AESx,SEC_ENG_SE_AES_IV_1,BL_RDWD_FRM_BYTEP(iv));
iv+=4;
BL_WR_REG(AESx,SEC_ENG_SE_AES_IV_2,BL_RDWD_FRM_BYTEP(iv));
iv+=4;
BL_WR_REG(AESx,SEC_ENG_SE_AES_IV_3,BL_RDWD_FRM_BYTEP(iv));
iv+=4;
/* Select hardware key */
if(keySrc==SEC_ENG_AES_KEY_HW){
tmpVal=BL_RD_REG(AESx,SEC_ENG_SE_AES_CTRL);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SEC_ENG_SE_AES_HW_KEY_EN,SEC_ENG_AES_KEY_HW);
BL_WR_REG(AESx,SEC_ENG_SE_AES_CTRL,tmpVal);
tmpVal=BL_RD_REG(AESx,SEC_ENG_SE_AES_KEY_SEL_0);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SEC_ENG_SE_AES_KEY_SEL_0,*key);
BL_WR_REG(AESx,SEC_ENG_SE_AES_KEY_SEL_0,tmpVal);
tmpVal=BL_RD_REG(AESx,SEC_ENG_SE_AES_KEY_SEL_1);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SEC_ENG_SE_AES_KEY_SEL_1,*key);
BL_WR_REG(AESx,SEC_ENG_SE_AES_KEY_SEL_1,tmpVal);
return ;
}
BL_WR_REG(AESx,SEC_ENG_SE_AES_KEY_0,BL_RDWD_FRM_BYTEP(key));
key+=4;
BL_WR_REG(AESx,SEC_ENG_SE_AES_KEY_1,BL_RDWD_FRM_BYTEP(key));
key+=4;
BL_WR_REG(AESx,SEC_ENG_SE_AES_KEY_2,BL_RDWD_FRM_BYTEP(key));
key+=4;
BL_WR_REG(AESx,SEC_ENG_SE_AES_KEY_3,BL_RDWD_FRM_BYTEP(key));
key+=4;
tmpVal=BL_RD_REG(AESx,SEC_ENG_SE_AES_CTRL);
keyType=BL_GET_REG_BITS_VAL(tmpVal,SEC_ENG_SE_AES_MODE);
if(keyType==(uint32_t)SEC_ENG_AES_KEY_192BITS){
BL_WR_REG(AESx,SEC_ENG_SE_AES_KEY_4,BL_RDWD_FRM_BYTEP(key));
key+=4;
BL_WR_REG(AESx,SEC_ENG_SE_AES_KEY_5,BL_RDWD_FRM_BYTEP(key));
key+=4;
}else if(keyType==(uint32_t)SEC_ENG_AES_KEY_256BITS || keyType==(uint32_t)SEC_ENG_AES_DOUBLE_KEY_128BITS){
BL_WR_REG(AESx,SEC_ENG_SE_AES_KEY_4,BL_RDWD_FRM_BYTEP(key));
key+=4;
BL_WR_REG(AESx,SEC_ENG_SE_AES_KEY_5,BL_RDWD_FRM_BYTEP(key));
key+=4;
BL_WR_REG(AESx,SEC_ENG_SE_AES_KEY_6,BL_RDWD_FRM_BYTEP(key));
key+=4;
BL_WR_REG(AESx,SEC_ENG_SE_AES_KEY_7,BL_RDWD_FRM_BYTEP(key));
key+=4;
}
/* Select software key */
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SEC_ENG_SE_AES_HW_KEY_EN,SEC_ENG_AES_KEY_SW);
BL_WR_REG(AESx,SEC_ENG_SE_AES_CTRL,tmpVal);
}
/****************************************************************************//**
* @brief AES set counter byte type in CTR mode
*
* @param aesNo: AES ID type
* @param counterType: AES counter type
*
* @return None
*
*******************************************************************************/
void Sec_Eng_AES_Set_Counter_Byte(SEC_ENG_AES_ID_Type aesNo,SEC_ENG_AES_Counter_Type counterType)
{
uint32_t AESx = SEC_ENG_BASE;
uint32_t tmpVal;
/* Check the parameters */
CHECK_PARAM(IS_SEC_ENG_AES_ID_TYPE(aesNo));
CHECK_PARAM(IS_SEC_ENG_AES_COUNTER_TYPE(counterType));
/* Set counter type */
tmpVal = BL_RD_REG(AESx,SEC_ENG_SE_AES_0_ENDIAN);
BL_WR_REG(AESx,SEC_ENG_SE_AES_0_ENDIAN,BL_SET_REG_BITS_VAL(tmpVal,SEC_ENG_SE_AES_0_CTR_LEN,counterType));
}
/****************************************************************************//**
* @brief AES encrypt or decrypt input data
*
* @param aesCtx: AES context pointer
* @param aesNo: AES ID type
* @param in: AES input data buffer to deal with
* @param len: AES input data length
* @param out: AES output data buffer
*
* @return SUCCESS or ERROR
*
*******************************************************************************/
BL_Err_Type Sec_Eng_AES_Crypt(SEC_Eng_AES_Ctx *aesCtx,SEC_ENG_AES_ID_Type aesNo,const uint8_t *in, uint32_t len,uint8_t *out)
{
uint32_t AESx = SEC_ENG_BASE+SEC_ENG_AES_OFFSET;
uint32_t tmpVal;
uint32_t timeoutCnt = SEC_ENG_AES_BUSY_TIMEOUT_COUNT;
if( len %16 !=0){
return ERROR;
}
/* Wait finished */
do {
tmpVal=BL_RD_REG(AESx,SEC_ENG_SE_AES_CTRL);
timeoutCnt--;
if(timeoutCnt == 0){
return TIMEOUT;
}
}while(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_AES_BUSY));
/* Clear trigger */
tmpVal=BL_CLR_REG_BIT(tmpVal,SEC_ENG_SE_AES_TRIG_1T);
BL_WR_REG(AESx,SEC_ENG_SE_AES_CTRL,tmpVal);
/* Set input and output address */
BL_WR_REG(AESx,SEC_ENG_SE_AES_MSA,(uint32_t)in);
BL_WR_REG(AESx,SEC_ENG_SE_AES_MDA,(uint32_t)out);
/* Set message length */
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SEC_ENG_SE_AES_MSG_LEN,len/16);
if(aesCtx->mode==SEC_ENG_AES_CTR){
tmpVal=BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_AES_DEC_KEY_SEL);
}else{
tmpVal=BL_CLR_REG_BIT(tmpVal,SEC_ENG_SE_AES_DEC_KEY_SEL);
}
/* Set IV sel:0 for new, 1 for last */
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SEC_ENG_SE_AES_IV_SEL,aesCtx->aesFeed);
BL_WR_REG(AESx,SEC_ENG_SE_AES_CTRL,tmpVal);
/* Trigger AES Engine */
tmpVal=BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_AES_TRIG_1T);
BL_WR_REG(AESx,SEC_ENG_SE_AES_CTRL,tmpVal);
/* Wait finished */
timeoutCnt = SEC_ENG_AES_BUSY_TIMEOUT_COUNT;
do {
tmpVal=BL_RD_REG(AESx,SEC_ENG_SE_AES_CTRL);
timeoutCnt--;
if(timeoutCnt == 0){
return TIMEOUT;
}
}while(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_AES_BUSY));
aesCtx->aesFeed=1;
return SUCCESS;
}
/****************************************************************************//**
* @brief AES finish function, clean register
*
* @param aesNo: AES ID type
*
* @return SUCCESS
*
*******************************************************************************/
BL_Err_Type Sec_Eng_AES_Finish(SEC_ENG_AES_ID_Type aesNo)
{
uint32_t AESx = SEC_ENG_BASE+SEC_ENG_AES_OFFSET;
uint32_t tmpVal;
uint32_t timeoutCnt = SEC_ENG_AES_BUSY_TIMEOUT_COUNT;
/* Wait finished */
do {
tmpVal=BL_RD_REG(AESx,SEC_ENG_SE_AES_CTRL);
timeoutCnt--;
if(timeoutCnt == 0){
return TIMEOUT;
}
}while(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_AES_BUSY));
tmpVal=BL_CLR_REG_BIT(tmpVal,SEC_ENG_SE_AES_EN);
tmpVal=BL_CLR_REG_BIT(tmpVal,SEC_ENG_SE_AES_DEC_KEY_SEL);
tmpVal=BL_CLR_REG_BIT(tmpVal,SEC_ENG_SE_AES_IV_SEL);
BL_WR_REG(AESx,SEC_ENG_SE_AES_CTRL,tmpVal);
return SUCCESS;
}
/****************************************************************************//**
* @brief TRNG enable TRNG interrupt
*
* @param None
*
* @return SUCCESS
*
*******************************************************************************/
BL_Err_Type Sec_Eng_Trng_Enable(void)
{
uint32_t TRNGx = SEC_ENG_BASE+SEC_ENG_TRNG_OFFSET;
uint32_t tmpVal;
uint32_t timeoutCnt = SEC_ENG_TRNG_BUSY_TIMEOUT_COUNT;
tmpVal=BL_RD_REG(TRNGx,SEC_ENG_SE_TRNG_CTRL_0);
/* FIXME:default reseed number is 0x1ff, to verify, use 0xa to speed up */
//tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SEC_ENG_SE_TRNG_RESEED_N,0x1ff);
/* No interrupt as default */
tmpVal=BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_TRNG_EN);
BL_WR_REG(TRNGx,SEC_ENG_SE_TRNG_CTRL_0,tmpVal);
tmpVal=BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_TRNG_INT_CLR_1T);
BL_WR_REG(TRNGx,SEC_ENG_SE_TRNG_CTRL_0,tmpVal);
/* busy will be set to 1 after trigger, the gap is 1T */
__NOP();
__NOP();
__NOP();
__NOP();
do {
tmpVal=BL_RD_REG(TRNGx,SEC_ENG_SE_TRNG_CTRL_0);
timeoutCnt--;
if(timeoutCnt == 0){
return TIMEOUT;
}
}while(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_TRNG_BUSY));
/* Clear trng interrupt */
tmpVal=BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_TRNG_INT_CLR_1T);
BL_WR_REG(TRNGx,SEC_ENG_SE_TRNG_CTRL_0,tmpVal);
return SUCCESS;
}
/****************************************************************************//**
* @brief TRNG enable TRNG interrupt
*
* @param None
*
* @return None
*
*******************************************************************************/
void Sec_Eng_Trng_Int_Enable(void)
{
uint32_t TRNGx = SEC_ENG_BASE+SEC_ENG_TRNG_OFFSET;
uint32_t tmpVal;
tmpVal=BL_RD_REG(TRNGx,SEC_ENG_SE_TRNG_CTRL_0);
tmpVal=BL_CLR_REG_BIT(tmpVal,SEC_ENG_SE_TRNG_INT_MASK);
BL_WR_REG(TRNGx,SEC_ENG_SE_TRNG_CTRL_0,tmpVal);
}
/****************************************************************************//**
* @brief TRNG disable TRNG interrupt
*
* @param None
*
* @return None
*
*******************************************************************************/
void Sec_Eng_Trng_Int_Disable(void)
{
uint32_t TRNGx = SEC_ENG_BASE+SEC_ENG_TRNG_OFFSET;
uint32_t tmpVal;
tmpVal=BL_RD_REG(TRNGx,SEC_ENG_SE_TRNG_CTRL_0);
tmpVal=BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_TRNG_INT_MASK);
BL_WR_REG(TRNGx,SEC_ENG_SE_TRNG_CTRL_0,tmpVal);
}
/****************************************************************************//**
* @brief TRNG get random data out
*
* @param data[32]: TRNG output data
*
* @return SUCCESS
*
*******************************************************************************/
BL_Err_Type Sec_Eng_Trng_Read(uint8_t data[32])
{
uint8_t *p=(uint8_t *)data;
uint32_t TRNGx = SEC_ENG_BASE+SEC_ENG_TRNG_OFFSET;
uint32_t tmpVal;
uint32_t timeoutCnt = SEC_ENG_TRNG_BUSY_TIMEOUT_COUNT;
tmpVal=BL_RD_REG(TRNGx,SEC_ENG_SE_TRNG_CTRL_0);
/* Trigger */
tmpVal=BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_TRNG_TRIG_1T);
BL_WR_REG(TRNGx,SEC_ENG_SE_TRNG_CTRL_0,tmpVal);
/* busy will be set to 1 after trigger, the gap is 1T */
__NOP();
__NOP();
__NOP();
__NOP();
do {
tmpVal=BL_RD_REG(TRNGx,SEC_ENG_SE_TRNG_CTRL_0);
timeoutCnt--;
if(timeoutCnt == 0){
return TIMEOUT;
}
}while(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_TRNG_BUSY));
/* copy trng value */
BL_WRWD_TO_BYTEP(p,BL_RD_REG(TRNGx,SEC_ENG_SE_TRNG_DOUT_0));
p+=4;
BL_WRWD_TO_BYTEP(p,BL_RD_REG(TRNGx,SEC_ENG_SE_TRNG_DOUT_1));
p+=4;
BL_WRWD_TO_BYTEP(p,BL_RD_REG(TRNGx,SEC_ENG_SE_TRNG_DOUT_2));
p+=4;
BL_WRWD_TO_BYTEP(p,BL_RD_REG(TRNGx,SEC_ENG_SE_TRNG_DOUT_3));
p+=4;
BL_WRWD_TO_BYTEP(p,BL_RD_REG(TRNGx,SEC_ENG_SE_TRNG_DOUT_4));
p+=4;
BL_WRWD_TO_BYTEP(p,BL_RD_REG(TRNGx,SEC_ENG_SE_TRNG_DOUT_5));
p+=4;
BL_WRWD_TO_BYTEP(p,BL_RD_REG(TRNGx,SEC_ENG_SE_TRNG_DOUT_6));
p+=4;
BL_WRWD_TO_BYTEP(p,BL_RD_REG(TRNGx,SEC_ENG_SE_TRNG_DOUT_7));
p+=4;
tmpVal=BL_CLR_REG_BIT(tmpVal,SEC_ENG_SE_TRNG_TRIG_1T);
BL_WR_REG(TRNGx,SEC_ENG_SE_TRNG_CTRL_0,tmpVal);
/* Clear data */
tmpVal=BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_TRNG_DOUT_CLR_1T);
BL_WR_REG(TRNGx,SEC_ENG_SE_TRNG_CTRL_0,tmpVal);
tmpVal=BL_CLR_REG_BIT(tmpVal,SEC_ENG_SE_TRNG_DOUT_CLR_1T);
BL_WR_REG(TRNGx,SEC_ENG_SE_TRNG_CTRL_0,tmpVal);
return SUCCESS;
}
/****************************************************************************//**
* @brief TRNG Interrupt Read Trigger
*
* @param None
*
* @return None
*
*******************************************************************************/
void Sec_Eng_Trng_Int_Read_Trigger(void)
{
uint32_t TRNGx = SEC_ENG_BASE+SEC_ENG_TRNG_OFFSET;
uint32_t tmpVal;
Sec_Eng_Trng_Int_Enable();
tmpVal=BL_RD_REG(TRNGx,SEC_ENG_SE_TRNG_CTRL_0);
/* Trigger */
tmpVal=BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_TRNG_TRIG_1T);
BL_WR_REG(TRNGx,SEC_ENG_SE_TRNG_CTRL_0,tmpVal);
}
/****************************************************************************//**
* @brief TRNG get random data out with Interrupt
*
* @param data[32]: TRNG output data
*
* @return None
*
*******************************************************************************/
void Sec_Eng_Trng_Int_Read(uint8_t data[32])
{
uint8_t *p=(uint8_t *)data;
uint32_t TRNGx = SEC_ENG_BASE+SEC_ENG_TRNG_OFFSET;
uint32_t tmpVal;
tmpVal=BL_RD_REG(TRNGx,SEC_ENG_SE_TRNG_CTRL_0);
/* copy trng value */
BL_WRWD_TO_BYTEP(p,BL_RD_REG(TRNGx,SEC_ENG_SE_TRNG_DOUT_0));
p+=4;
BL_WRWD_TO_BYTEP(p,BL_RD_REG(TRNGx,SEC_ENG_SE_TRNG_DOUT_1));
p+=4;
BL_WRWD_TO_BYTEP(p,BL_RD_REG(TRNGx,SEC_ENG_SE_TRNG_DOUT_2));
p+=4;
BL_WRWD_TO_BYTEP(p,BL_RD_REG(TRNGx,SEC_ENG_SE_TRNG_DOUT_3));
p+=4;
BL_WRWD_TO_BYTEP(p,BL_RD_REG(TRNGx,SEC_ENG_SE_TRNG_DOUT_4));
p+=4;
BL_WRWD_TO_BYTEP(p,BL_RD_REG(TRNGx,SEC_ENG_SE_TRNG_DOUT_5));
p+=4;
BL_WRWD_TO_BYTEP(p,BL_RD_REG(TRNGx,SEC_ENG_SE_TRNG_DOUT_6));
p+=4;
BL_WRWD_TO_BYTEP(p,BL_RD_REG(TRNGx,SEC_ENG_SE_TRNG_DOUT_7));
p+=4;
tmpVal=BL_CLR_REG_BIT(tmpVal,SEC_ENG_SE_TRNG_TRIG_1T);
BL_WR_REG(TRNGx,SEC_ENG_SE_TRNG_CTRL_0,tmpVal);
/* Clear data */
tmpVal=BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_TRNG_DOUT_CLR_1T);
BL_WR_REG(TRNGx,SEC_ENG_SE_TRNG_CTRL_0,tmpVal);
tmpVal=BL_CLR_REG_BIT(tmpVal,SEC_ENG_SE_TRNG_DOUT_CLR_1T);
BL_WR_REG(TRNGx,SEC_ENG_SE_TRNG_CTRL_0,tmpVal);
}
/****************************************************************************//**
* @brief Disable TRNG
*
* @param None
*
* @return None
*
*******************************************************************************/
void Sec_Eng_Trng_Disable(void)
{
uint32_t TRNGx = SEC_ENG_BASE+SEC_ENG_TRNG_OFFSET;
uint32_t tmpVal;
tmpVal=BL_RD_REG(TRNGx,SEC_ENG_SE_TRNG_CTRL_0);
tmpVal=BL_CLR_REG_BIT(tmpVal,SEC_ENG_SE_TRNG_EN);
//tmpVal=BL_CLR_REG_BIT(tmpVal,SEC_ENG_SE_TRNG_RESEED_N);
tmpVal=BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_TRNG_INT_CLR_1T);
BL_WR_REG(TRNGx,SEC_ENG_SE_TRNG_CTRL_0,tmpVal);
}
/****************************************************************************//**
* @brief PKA Reset
*
* @param None
*
* @return None
*
*******************************************************************************/
void Sec_Eng_PKA_Reset(void)
{
uint8_t val;
//Disable sec engine
BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_CTRL_0, 0);
//Enable sec engine
val = 1<<3;
BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_CTRL_0, val);
}
/****************************************************************************//**
* @brief PKA Enable big endian
*
* @param None
*
* @return None
*
*******************************************************************************/
void Sec_Eng_PKA_BigEndian_Enable(void)
{
uint32_t tmpVal;
tmpVal=BL_RD_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_CTRL_0);
tmpVal=BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_PKA_0_ENDIAN);
BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_CTRL_0, tmpVal);
}
/****************************************************************************//**
* @brief PKA Enable little endian
*
* @param None
*
* @return None
*
*******************************************************************************/
void Sec_Eng_PKA_LittleEndian_Enable(void)
{
uint32_t tmpVal;
tmpVal=BL_RD_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_CTRL_0);
tmpVal=BL_CLR_REG_BIT(tmpVal,SEC_ENG_SE_PKA_0_ENDIAN);
BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_CTRL_0, tmpVal);
}
/****************************************************************************//**
* @brief PKA clear interrupt
*
* @param None
*
* @return None
*
*******************************************************************************/
void Sec_Eng_PKA_Clear_Int(void)
{
uint32_t ctrl;
ctrl = BL_RD_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_CTRL_0);
ctrl = BL_SET_REG_BIT(ctrl, SEC_ENG_SE_PKA_0_INT_CLR_1T);
BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_CTRL_0, ctrl);
ctrl = BL_RD_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_CTRL_0);
ctrl = BL_CLR_REG_BIT(ctrl, SEC_ENG_SE_PKA_0_INT_CLR_1T);
BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_CTRL_0, ctrl);
}
/****************************************************************************//**
* @brief PKA get Register size according to Register type
*
* @param reg_type: PKA Register type
*
* @return Register size
*
*******************************************************************************/
static uint16_t Sec_Eng_PKA_Get_Reg_Size(SEC_ENG_PKA_REG_SIZE_Type reg_type)
{
switch(reg_type)
{
case SEC_ENG_PKA_REG_SIZE_8:
return 8;
case SEC_ENG_PKA_REG_SIZE_16:
return 16;
case SEC_ENG_PKA_REG_SIZE_32:
return 32;
case SEC_ENG_PKA_REG_SIZE_64:
return 64;
case SEC_ENG_PKA_REG_SIZE_96:
return 96;
case SEC_ENG_PKA_REG_SIZE_128:
return 128;
case SEC_ENG_PKA_REG_SIZE_192:
return 192;
case SEC_ENG_PKA_REG_SIZE_256:
return 256;
case SEC_ENG_PKA_REG_SIZE_384:
return 384;
case SEC_ENG_PKA_REG_SIZE_512:
return 512;
default:
return 0;
}
}
/****************************************************************************//**
* @brief PKA set pre-load register configuration
*
* @param size: Data size in word to write
* @param regIndex: Register index
* @param regType: Register type
* @param op: PKA operation
* @param lastOp: Last operation
*
* @return None
*
*******************************************************************************/
static void Sec_Eng_PKA_Write_Pld_Cfg(uint16_t size, uint8_t regIndex, SEC_ENG_PKA_REG_SIZE_Type regType, SEC_ENG_PKA_OP_Type op, uint8_t lastOp)
{
struct pka0_pld_cfg cfg;
cfg.value.BF.size = size;
cfg.value.BF.d_reg_index = regIndex;
cfg.value.BF.d_reg_type = regType;
cfg.value.BF.op = op;
cfg.value.BF.last_op = lastOp;
BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_RW, cfg.value.WORD);
}
/****************************************************************************//**
* @brief PKA write common operation first configuration
*
* @param s0RegIndex: Register index
* @param s0RegType: Register type
* @param dRegIndex: Result Register index
* @param dRegType: Result Register type
* @param op: PKA operation
* @param lastOp: Last operation
*
* @return None
*
*******************************************************************************/
static void Sec_Eng_PKA_Write_Common_OP_First_Cfg(uint8_t s0RegIndex, uint8_t s0RegType, uint8_t dRegIndex, uint8_t dRegType,
uint8_t op, uint8_t lastOp)
{
struct pka0_common_op_first_cfg cfg;
cfg.value.BF.s0_reg_idx = s0RegIndex;
cfg.value.BF.s0_reg_type = s0RegType;
if(op != SEC_ENG_PKA_OP_LCMP)
{
cfg.value.BF.d_reg_idx = dRegIndex;
cfg.value.BF.d_reg_type = dRegType;
}
cfg.value.BF.op = op;
cfg.value.BF.last_op = lastOp;
BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_RW, cfg.value.WORD);
}
/****************************************************************************//**
* @brief PKA write common operation second configuration1
*
* @param s1RegIndex: Register index
* @param s1RegType: Register type
*
* @return None
*
*******************************************************************************/
static void Sec_Eng_PKA_Write_Common_OP_Snd_Cfg_S1(uint8_t s1RegIndex, uint8_t s1RegType)
{
struct pka0_common_op_snd_cfg_S1_only cfg;
cfg.value.BF.s1_reg_idx = s1RegIndex;
cfg.value.BF.s1_reg_type = s1RegType;
BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_RW, cfg.value.WORD);
}
/****************************************************************************//**
* @brief PKA write common operation second configuration2
*
* @param s2RegIndex: Register index
* @param s2RegType: Register type
*
* @return None
*
*******************************************************************************/
static void Sec_Eng_PKA_Write_Common_OP_Snd_Cfg_S2(uint8_t s2RegIndex, uint8_t s2RegType)
{
struct pka0_common_op_snd_cfg_S2_only cfg;
cfg.value.BF.s2_reg_idx = s2RegIndex;
cfg.value.BF.s2_reg_type = s2RegType;
BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_RW, cfg.value.WORD);
}
/****************************************************************************//**
* @brief PKA write common operation second configuration1 and configuration 2
*
* @param s1RegIndex: Configuration 1 Register index
* @param s1RegType: Configuration 1 Register type
* @param s2RegIndex: Configuration 2 Register index
* @param s2RegType: Configuration 3 Register type
*
* @return None
*
*******************************************************************************/
static void Sec_Eng_PKA_Write_Common_OP_Snd_Cfg_S1_S2(uint8_t s1RegIndex, uint8_t s1RegType, uint8_t s2RegIndex, uint8_t s2RegType)
{
struct pka0_common_op_snd_cfg_S1_S2 cfg;
cfg.value.BF.s1_reg_idx = s1RegIndex;
cfg.value.BF.s1_reg_type = s1RegType;
cfg.value.BF.s2_reg_idx = s2RegIndex;
cfg.value.BF.s2_reg_type = s2RegType;
BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_RW, cfg.value.WORD);
}
/****************************************************************************//**
* @brief PKA wait for complete interrupt
*
* @param None
*
* @return SUCCESS
*
*******************************************************************************/
static BL_Err_Type Sec_Eng_PKA_Wait_ISR(void)
{
uint32_t pka0_ctrl;
uint32_t timeoutCnt = SEC_ENG_PKA_INT_TIMEOUT_COUNT;
do{
pka0_ctrl = BL_RD_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_CTRL_0);
timeoutCnt--;
if(timeoutCnt == 0){
return TIMEOUT;
}
}while(!BL_GET_REG_BITS_VAL(pka0_ctrl, SEC_ENG_SE_PKA_0_INT));
return SUCCESS;
}
/****************************************************************************//**
* @brief PKA read block data from register
*
* @param dest: Pointer to buffer address
* @param src: Pointer to register address
* @param len: Data len in word
*
* @return None
*
*******************************************************************************/
#ifdef ARCH_ARM
#ifndef __GNUC__
__ASM void Sec_Eng_PKA_Read_Block(uint32_t *dest,const uint32_t *src,uint32_t len)
{
PUSH {R3-R6,LR}
Start0
CMP R2,#4
BLT Finish0
LDR R3,[R1]
LDR R4,[R1]
LDR R5,[R1]
LDR R6,[R1]
STMIA R0!,{R3-R6}
SUBS R2,R2,#4
B Start0
Finish0
POP {R3-R6,PC}
}
#else
void Sec_Eng_PKA_Read_Block(uint32_t *dest,const uint32_t *src,uint32_t len)
{
__asm__ __volatile__("push {r3-r6,lr}\n\t"
"Start0 :"
"cmp r2,#4\n\t"
"blt Finish0\n\t"
"ldr r3,[r1]\n\t"
"ldr r4,[r1]\n\t"
"ldr r5,[r1]\n\t"
"ldr r6,[r1]\n\t"
"stmia r0!,{r3-r6}\n\t"
"sub r2,r2,#4\n\t"
"b Start0\n\t"
"Finish0 :"
"pop {r3-r6,pc}\n\t"
);
}
#endif
#endif
#ifdef ARCH_RISCV
void Sec_Eng_PKA_Read_Block(uint32_t *dest,const uint32_t *src,uint32_t len)
{
uint32_t wrLen=len-len%4;
uint32_t i;
for(i=0;i<wrLen;i++){
dest[i]=*src;
}
}
#endif
/****************************************************************************//**
* @brief PKA Write block data to register
*
* @param dest: Pointer to register address
* @param src: Pointer to buffer address
* @param len: Data len in word
*
* @return None
*
*******************************************************************************/
#ifdef ARCH_ARM
#ifndef __GNUC__
__ASM void Sec_Eng_PKA_Write_Block(uint32_t *dest,const uint32_t *src,uint32_t len)
{
PUSH {R3-R6,LR}
Start1
CMP R2,#4
BLT Finish1
LDMIA R1!,{R3-R6}
STR R3,[R0]
STR R4,[R0]
STR R5,[R0]
STR R6,[R0]
SUBS R2,R2,#4
B Start1
Finish1
POP {R3-R6,PC}
}
#else
void Sec_Eng_PKA_Write_Block(uint32_t *dest,const uint32_t *src,uint32_t len)
{
__asm__ __volatile__("push {r3-r6,lr}\n\t"
"Start1 :"
"cmp r2,#4\n\t"
"blt Finish1\n\t"
"ldmia r1!,{r3-r6}\n\t"
"str r3,[r0]\n\t"
"str r4,[r0]\n\t"
"str r5,[r0]\n\t"
"str r6,[r0]\n\t"
"sub r2,r2,#4\n\t"
"b Start1\n\t"
"Finish1 :"
"pop {r3-r6,pc}\n\t"
);
}
#endif
#endif
#ifdef ARCH_RISCV
void Sec_Eng_PKA_Write_Block(uint32_t *dest,const uint32_t *src,uint32_t len)
{
uint32_t wrLen=len-len%4;
uint32_t i;
for(i=0;i<wrLen;i++){
*dest=src[i];
}
}
#endif
/****************************************************************************//**
* @brief PKA get result
*
* @param result: Pointer to store result
* @param retSize: Result length in word
* @param regLen: register length in byte
*
* @return None
*
*******************************************************************************/
static void Sec_Eng_PKA_Get_Result(uint32_t *result, uint8_t retSize,uint16_t regLen)
{
uint32_t ret_data = 0x00;
int index = 0x00;
/* Wait for the result */
Sec_Eng_PKA_Wait_ISR();
Sec_Eng_PKA_Clear_Int();
Sec_Eng_PKA_Read_Block(result,(uint32_t*)(SEC_ENG_BASE+SEC_ENG_SE_PKA_0_RW_OFFSET),retSize);
index=retSize-(retSize%4);
while(index < retSize)
{
ret_data = BL_RD_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_RW);
result[index]= ret_data;
index++;
}
}
/****************************************************************************//**
* @brief PKA load data to register
*
* @param regType: Register type
* @param regIndex: Register index
* @param data: Data buffer
* @param size: Data length in word
* @param lastOp: Last operation
*
* @return None
*
*******************************************************************************/
void Sec_Eng_PKA_Write_Data( SEC_ENG_PKA_REG_SIZE_Type regType,uint8_t regIndex,const uint32_t *data,uint16_t size, uint8_t lastOp)
{
int index = 0x00;
uint16_t regLen=Sec_Eng_PKA_Get_Reg_Size(regType);
Sec_Eng_PKA_Write_Pld_Cfg(size, regIndex, regType, SEC_ENG_PKA_OP_CTLIR_PLD, lastOp);
if(size>regLen/4){
size=regLen/4;
}
Sec_Eng_PKA_Write_Block((uint32_t*)(SEC_ENG_BASE+SEC_ENG_SE_PKA_0_RW_OFFSET),data,size);
index=size-(size%4);
while(index < size)
{
BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_RW, data[index]);
index++;
}
}
/****************************************************************************//**
* @brief PKA read data from register
*
* @param regType: Register type
* @param regIdx: Register index
* @param result: Data buffer
* @param retSize: Data length in word
*
* @return None
*
*******************************************************************************/
void Sec_Eng_PKA_Read_Data(SEC_ENG_PKA_REG_SIZE_Type regType, uint8_t regIdx, uint32_t *result, uint8_t retSize)
{
uint16_t regSize;
uint32_t dummyData = 0;
regSize = Sec_Eng_PKA_Get_Reg_Size(regType);
if(retSize > regSize/4){
result = NULL;
return;
}
Sec_Eng_PKA_Write_Pld_Cfg(retSize, regIdx, regType, SEC_ENG_PKA_OP_CFLIR_BUFFER,1);
BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_RW, dummyData);
Sec_Eng_PKA_Get_Result(result, retSize,regSize);
}
/****************************************************************************//**
* @brief PKA clear register
*
* @param dRegType: Register type
* @param dRegIdx: Register index
* @param size: Data length in word
* @param lastOp: Last operation
*
* @return None
*
*******************************************************************************/
void Sec_Eng_PKA_CREG(SEC_ENG_PKA_REG_SIZE_Type dRegType, uint8_t dRegIdx, uint8_t size,uint8_t lastOp)
{
uint32_t dummyData = 0;
Sec_Eng_PKA_Write_Pld_Cfg(size, dRegIdx, dRegType, SEC_ENG_PKA_OP_CLIR, lastOp);
BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_RW, dummyData);
if(lastOp){
Sec_Eng_PKA_Wait_ISR();
Sec_Eng_PKA_Clear_Int();
}
}
/****************************************************************************//**
* @brief PKA load data to register
*
* @param regType: regType: Register type
* @param regIndex: regIndex: Register index
* @param data: data: Data buffer
* @param lastOp: size: Data length in word
*
* @return None
*
*******************************************************************************/
void Sec_Eng_PKA_Write_Immediate( SEC_ENG_PKA_REG_SIZE_Type regType,uint8_t regIndex,uint32_t data,uint8_t lastOp)
{
struct pka0_pldi_cfg cfg;
cfg.value.BF.rsvd=0;
cfg.value.BF.d_reg_index = regIndex;
cfg.value.BF.d_reg_type = regType;
cfg.value.BF.op = SEC_ENG_PKA_OP_SLIR;
cfg.value.BF.last_op = lastOp;
BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_RW, cfg.value.WORD);
BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_RW, data);
if(lastOp){
Sec_Eng_PKA_Wait_ISR();
Sec_Eng_PKA_Clear_Int();
}
}
/****************************************************************************//**
* @brief PKA negative source data:D = (1 << SIZE{S0})-S0
*
* @param dRegType: Destination Register type
* @param dRegIdx: Destination Register index
* @param s0RegType: Source Register type
* @param s0RegIdx: Source Register index
* @param lastOp: Last operation
*
* @return None
*
*******************************************************************************/
void Sec_Eng_PKA_NREG(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,uint8_t lastOp)
{
uint32_t dummyData = 0;
Sec_Eng_PKA_Write_Common_OP_First_Cfg(s0RegIdx, s0RegType, dRegIdx, dRegType, SEC_ENG_PKA_OP_NLIR, lastOp);
BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_RW, dummyData);
if(lastOp){
Sec_Eng_PKA_Wait_ISR();
Sec_Eng_PKA_Clear_Int();
}
}
/****************************************************************************//**
* @brief PKA move data:D = S0
*
* @param dRegType: Destination Register type
* @param dRegIdx: Destination Register index
* @param s0RegType: Source Register type
* @param s0RegIdx: Source Register index
* @param lastOp: Last operation
*
* @return None
*
*******************************************************************************/
void Sec_Eng_PKA_Move_Data(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,uint8_t lastOp)
{
uint32_t dummyData = 0;
Sec_Eng_PKA_Write_Common_OP_First_Cfg(s0RegIdx, s0RegType, dRegIdx, dRegType, SEC_ENG_PKA_OP_MOVDAT, lastOp);
BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_RW, dummyData);
if(lastOp){
Sec_Eng_PKA_Wait_ISR();
Sec_Eng_PKA_Clear_Int();
}
}
/****************************************************************************//**
* @brief PKA resize data:D = S0, D.Size = S0.Size
*
* @param dRegType: Destination Register type
* @param dRegIdx: Destination Register index
* @param s0RegType: Source Register type
* @param s0RegIdx: Source Register index
* @param lastOp: Last operation
*
* @return None
*
*******************************************************************************/
void Sec_Eng_PKA_RESIZE(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,uint8_t lastOp)
{
uint32_t dummyData = 0;
Sec_Eng_PKA_Write_Common_OP_First_Cfg(s0RegIdx, s0RegType, dRegIdx, dRegType, SEC_ENG_PKA_OP_RESIZE, lastOp);
BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_RW, dummyData);
if(lastOp){
Sec_Eng_PKA_Wait_ISR();
Sec_Eng_PKA_Clear_Int();
}
}
/****************************************************************************//**
* @brief PKA mod add:D = (S0 + S1) mod S2
*
* @param dRegType: Destination Register type
* @param dRegIdx: Destination Register index
* @param s0RegType: Source 0 Register type
* @param s0RegIdx: Source 0 Register index
* @param s1RegType: Source 1 Register type
* @param s1RegIdx: Source 1 Register index
* @param s2RegType: Source 2 Register type
* @param s2RegIdx: Source 2 Register index
* @param lastOp: Last operation
*
* @return None
*
*******************************************************************************/
void Sec_Eng_PKA_MADD(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,
uint8_t s1RegType, uint8_t s1RegIdx, uint8_t s2RegType, uint8_t s2RegIdx,uint8_t lastOp)
{
Sec_Eng_PKA_Write_Common_OP_First_Cfg(s0RegIdx, s0RegType, dRegIdx, dRegType, SEC_ENG_PKA_OP_MADD, lastOp);
Sec_Eng_PKA_Write_Common_OP_Snd_Cfg_S1_S2(s1RegIdx, s1RegType, s2RegIdx, s2RegType);
if(lastOp){
Sec_Eng_PKA_Wait_ISR();
Sec_Eng_PKA_Clear_Int();
}
}
/****************************************************************************//**
* @brief PKA mod sub:D = (S0 - S1) mod S2
*
* @param dRegType: Destination Register type
* @param dRegIdx: Destination Register index
* @param s0RegType: Source 0 Register type
* @param s0RegIdx: Source 0 Register index
* @param s1RegType: Source 1 Register type
* @param s1RegIdx: Source 1 Register index
* @param s2RegType: Source 2 Register type
* @param s2RegIdx: Source 2 Register index
* @param lastOp: Last operation
*
* @return None
*
*******************************************************************************/
void Sec_Eng_PKA_MSUB(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,
uint8_t s1RegType, uint8_t s1RegIdx, uint8_t s2RegType, uint8_t s2RegIdx,uint8_t lastOp)
{
Sec_Eng_PKA_Write_Common_OP_First_Cfg(s0RegIdx, s0RegType, dRegIdx, dRegType, SEC_ENG_PKA_OP_MSUB, lastOp);
Sec_Eng_PKA_Write_Common_OP_Snd_Cfg_S1_S2(s1RegIdx, s1RegType, s2RegIdx, s2RegType);
if(lastOp){
Sec_Eng_PKA_Wait_ISR();
Sec_Eng_PKA_Clear_Int();
}
}
/****************************************************************************//**
* @brief PKA mod :D = S0 mod S2
*
* @param dRegType: Destination Register type
* @param dRegIdx: Destination Register index
* @param s0RegType: Source 0 Register type
* @param s0RegIdx: Source 0 Register index
* @param s2RegType: Source 2 Register type
* @param s2RegIdx: Source 2 Register index
* @param lastOp: Last operation
*
* @return None
*
*******************************************************************************/
void Sec_Eng_PKA_MREM(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,
uint8_t s2RegType, uint8_t s2RegIdx,uint8_t lastOp)
{
Sec_Eng_PKA_Write_Common_OP_First_Cfg(s0RegIdx, s0RegType, dRegIdx, dRegType, SEC_ENG_PKA_OP_MREM, lastOp);
Sec_Eng_PKA_Write_Common_OP_Snd_Cfg_S2(s2RegIdx, s2RegType);
if(lastOp){
Sec_Eng_PKA_Wait_ISR();
Sec_Eng_PKA_Clear_Int();
}
}
/****************************************************************************//**
* @brief PKA mod mul:D = (S0 * S1) mod S2
*
* @param dRegType: Destination Register type
* @param dRegIdx: Destination Register index
* @param s0RegType: Source 0 Register type
* @param s0RegIdx: Source 0 Register index
* @param s1RegType: Source 1 Register type
* @param s1RegIdx: Source 1 Register index
* @param s2RegType: Source 2 Register type
* @param s2RegIdx: Source 2 Register index
* @param lastOp: Last operation
*
* @return None
*
*******************************************************************************/
void Sec_Eng_PKA_MMUL(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,
uint8_t s1RegType, uint8_t s1RegIdx, uint8_t s2RegType, uint8_t s2RegIdx,uint8_t lastOp)
{
Sec_Eng_PKA_Write_Common_OP_First_Cfg(s0RegIdx, s0RegType, dRegIdx, dRegType, SEC_ENG_PKA_OP_MMUL, lastOp);
Sec_Eng_PKA_Write_Common_OP_Snd_Cfg_S1_S2(s1RegIdx, s1RegType, s2RegIdx, s2RegType);
if(lastOp){
Sec_Eng_PKA_Wait_ISR();
Sec_Eng_PKA_Clear_Int();
}
}
/****************************************************************************//**
* @brief PKA mod sqr:D = (S0 ^ 2) mod S2
*
* @param dRegType: Destination Register type
* @param dRegIdx: Destination Register index
* @param s0RegType: Source 0 Register type
* @param s0RegIdx: Source 0 Register index
* @param s2RegType: Source 2 Register type
* @param s2RegIdx: Source 2 Register index
* @param lastOp: Last operation
*
* @return None
*
*******************************************************************************/
void Sec_Eng_PKA_MSQR(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,
uint8_t s2RegType, uint8_t s2RegIdx,uint8_t lastOp)
{
Sec_Eng_PKA_Write_Common_OP_First_Cfg(s0RegIdx, s0RegType, dRegIdx, dRegType, SEC_ENG_PKA_OP_MSQR, lastOp);
Sec_Eng_PKA_Write_Common_OP_Snd_Cfg_S2(s2RegIdx, s2RegType);
if(lastOp){
Sec_Eng_PKA_Wait_ISR();
Sec_Eng_PKA_Clear_Int();
}
}
/****************************************************************************//**
* @brief PKA mod exp:D = (S0 ^ S1) mod S2
*
* @param dRegType: Destination Register type
* @param dRegIdx: Destination Register index
* @param s0RegType: Source 0 Register type
* @param s0RegIdx: Source 0 Register index
* @param s1RegType: Source 1 Register type
* @param s1RegIdx: Source 1 Register index
* @param s2RegType: Source 2 Register type
* @param s2RegIdx: Source 2 Register index
* @param lastOp: Last operation
*
* @return None
*
*******************************************************************************/
void Sec_Eng_PKA_MEXP(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,
uint8_t s1RegType, uint8_t s1RegIdx, uint8_t s2RegType, uint8_t s2RegIdx,uint8_t lastOp)
{
Sec_Eng_PKA_Write_Common_OP_First_Cfg(s0RegIdx, s0RegType, dRegIdx, dRegType, SEC_ENG_PKA_OP_MEXP, lastOp);
Sec_Eng_PKA_Write_Common_OP_Snd_Cfg_S1_S2(s1RegIdx, s1RegType, s2RegIdx, s2RegType);
if(lastOp){
Sec_Eng_PKA_Wait_ISR();
Sec_Eng_PKA_Clear_Int();
}
}
/****************************************************************************//**
* @brief PKA mod exp:D = (S0 ^ (S2-2) ) mod S2
*
* @param dRegType: Destination Register type
* @param dRegIdx: Destination Register index
* @param s0RegType: Source 0 Register type
* @param s0RegIdx: Source 0 Register index
* @param s2RegType: Source 2 Register type
* @param s2RegIdx: Source 2 Register index
* @param lastOp: Last operation
*
* @return None
*
*******************************************************************************/
void Sec_Eng_PKA_MINV(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,
uint8_t s2RegType, uint8_t s2RegIdx,uint8_t lastOp)
{
Sec_Eng_PKA_Write_Common_OP_First_Cfg(s0RegIdx, s0RegType, dRegIdx, dRegType, SEC_ENG_PKA_OP_MINV, lastOp);
Sec_Eng_PKA_Write_Common_OP_Snd_Cfg_S2(s2RegIdx, s2RegType);
if(lastOp){
Sec_Eng_PKA_Wait_ISR();
Sec_Eng_PKA_Clear_Int();
}
}
/****************************************************************************//**
* @brief PKA Report COUT to 1 when S0 < S1
*
* @param cout: Compare result
* @param s0RegType: Source 0 Register type
* @param s0RegIdx: Source 0 Register index
* @param s1RegType: Source 1 Register type
* @param s1RegIdx: Source 1 Register index
*
* @return None
*
*******************************************************************************/
void Sec_Eng_PKA_LCMP(uint8_t *cout, uint8_t s0RegType, uint8_t s0RegIdx, uint8_t s1RegType, uint8_t s1RegIdx)
{
uint32_t pka0_ctrl = 0x00;
Sec_Eng_PKA_Write_Common_OP_First_Cfg(s0RegIdx, s0RegType, 0, 0, SEC_ENG_PKA_OP_LCMP, 1);
Sec_Eng_PKA_Write_Common_OP_Snd_Cfg_S1(s1RegIdx, s1RegType);
Sec_Eng_PKA_Wait_ISR();
Sec_Eng_PKA_Clear_Int();
pka0_ctrl = BL_RD_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_CTRL_0);
*cout = (pka0_ctrl&SEC_ENG_PKA_STATUS_LAST_OPC_MASK)>>SEC_ENG_PKA_STATUS_LAST_OPC_OFFSET;
}
/****************************************************************************//**
* @brief PKA add:D = S0 + S1
*
* @param dRegType: Destination Register type
* @param dRegIdx: Destination Register index
* @param s0RegType: Source 0 Register type
* @param s0RegIdx: Source 0 Register index
* @param s1RegType: Source 1 Register type
* @param s1RegIdx: Source 1 Register index
* @param lastOp: Last operation
*
* @return None
*
*******************************************************************************/
void Sec_Eng_PKA_LADD(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,
uint8_t s1RegType, uint8_t s1RegIdx,uint8_t lastOp)
{
Sec_Eng_PKA_Write_Common_OP_First_Cfg(s0RegIdx, s0RegType, dRegIdx, dRegType, SEC_ENG_PKA_OP_LADD, lastOp);
Sec_Eng_PKA_Write_Common_OP_Snd_Cfg_S1(s1RegIdx, s1RegType);
if(lastOp){
Sec_Eng_PKA_Wait_ISR();
Sec_Eng_PKA_Clear_Int();
}
}
/****************************************************************************//**
* @brief PKA sub:D = S0 - S1
*
* @param dRegType: Destination Register type
* @param dRegIdx: Destination Register index
* @param s0RegType: Source 0 Register type
* @param s0RegIdx: Source 0 Register index
* @param s1RegType: Source 1 Register type
* @param s1RegIdx: Source 1 Register index
* @param lastOp: Last operation
*
* @return None
*
*******************************************************************************/
void Sec_Eng_PKA_LSUB(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,
uint8_t s1RegType, uint8_t s1RegIdx,uint8_t lastOp)
{
Sec_Eng_PKA_Write_Common_OP_First_Cfg(s0RegIdx, s0RegType, dRegIdx, dRegType, SEC_ENG_PKA_OP_LSUB, lastOp);
Sec_Eng_PKA_Write_Common_OP_Snd_Cfg_S1(s1RegIdx, s1RegType);
if(lastOp){
Sec_Eng_PKA_Wait_ISR();
Sec_Eng_PKA_Clear_Int();
}
}
/****************************************************************************//**
* @brief PKA mul:D = S0 * S1
*
* @param dRegType: Destination Register type
* @param dRegIdx: Destination Register index
* @param s0RegType: Source 0 Register type
* @param s0RegIdx: Source 0 Register index
* @param s1RegType: Source 1 Register type
* @param s1RegIdx: Source 1 Register index
* @param lastOp: Last operation
*
* @return None
*
*******************************************************************************/
void Sec_Eng_PKA_LMUL(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,
uint8_t s1RegType, uint8_t s1RegIdx,uint8_t lastOp)
{
Sec_Eng_PKA_Write_Common_OP_First_Cfg(s0RegIdx, s0RegType, dRegIdx, dRegType, SEC_ENG_PKA_OP_LMUL, lastOp);
Sec_Eng_PKA_Write_Common_OP_Snd_Cfg_S1(s1RegIdx, s1RegType);
if(lastOp){
Sec_Eng_PKA_Wait_ISR();
Sec_Eng_PKA_Clear_Int();
}
}
/****************************************************************************//**
* @brief PKA sqr:D = S0^2
*
* @param dRegType: Destination Register type
* @param dRegIdx: Destination Register index
* @param s0RegType: Source 0 Register type
* @param s0RegIdx: Source 0 Register index
* @param lastOp: Last operation
*
* @return None
*
*******************************************************************************/
void Sec_Eng_PKA_LSQR(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,uint8_t lastOp)
{
uint32_t dummyData = 0;
Sec_Eng_PKA_Write_Common_OP_First_Cfg(s0RegIdx, s0RegType, dRegIdx, dRegType, SEC_ENG_PKA_OP_LSQR, lastOp);
BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_RW, dummyData);
if(lastOp){
Sec_Eng_PKA_Wait_ISR();
Sec_Eng_PKA_Clear_Int();
}
}
/****************************************************************************//**
* @brief PKA div:D = S0 / S2
*
* @param dRegType: Destination Register type
* @param dRegIdx: Destination Register index
* @param s0RegType: Source 0 Register type
* @param s0RegIdx: Source 0 Register index
* @param s2RegType: Source 2 Register type
* @param s2RegIdx: Source 2 Register index
* @param lastOp: Last operation
*
* @return None
*
*******************************************************************************/
void Sec_Eng_PKA_LDIV(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,
uint8_t s2RegType, uint8_t s2RegIdx,uint8_t lastOp)
{
Sec_Eng_PKA_Write_Common_OP_First_Cfg(s0RegIdx, s0RegType, dRegIdx, dRegType, SEC_ENG_PKA_OP_LDIV, lastOp);
Sec_Eng_PKA_Write_Common_OP_Snd_Cfg_S2(s2RegIdx, s2RegType);
if(lastOp){
Sec_Eng_PKA_Wait_ISR();
Sec_Eng_PKA_Clear_Int();
}
}
/****************************************************************************//**
* @brief PKA shift:D = S0 << BIT SHIFT
*
* @param dRegType: Destination Register type
* @param dRegIdx: Destination Register index
* @param s0RegType: Source 0 Register type
* @param s0RegIdx: Source 0 Register index
* @param bit_shift: Bits to shift
* @param lastOp: Last operation
*
* @return None
*
*******************************************************************************/
void Sec_Eng_PKA_LMUL2N(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,
uint16_t bit_shift,uint8_t lastOp)
{
struct pka0_bit_shift_op_cfg cfg;
Sec_Eng_PKA_Write_Common_OP_First_Cfg(s0RegIdx, s0RegType, dRegIdx, dRegType, SEC_ENG_PKA_OP_LMUL2N, 0);
cfg.value.BF.bit_shift = bit_shift;
BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_RW, cfg.value.WORD);
if(lastOp){
Sec_Eng_PKA_Wait_ISR();
Sec_Eng_PKA_Clear_Int();
}
}
/****************************************************************************//**
* @brief PKA shift:D = S0 >> BIT SHIFT
*
* @param dRegType: Destination Register type
* @param dRegIdx: Destination Register index
* @param s0RegType: Source 0 Register type
* @param s0RegIdx: Source 0 Register index
* @param bit_shift: Bits to shift
* @param lastOp: Last operation
*
* @return None
*
*******************************************************************************/
void Sec_Eng_PKA_LDIV2N(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,
uint16_t bit_shift,uint8_t lastOp)
{
struct pka0_bit_shift_op_cfg cfg;
Sec_Eng_PKA_Write_Common_OP_First_Cfg(s0RegIdx, s0RegType, dRegIdx, dRegType, SEC_ENG_PKA_OP_LDIV2N, 0);
cfg.value.BF.bit_shift = bit_shift;
BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_RW, cfg.value.WORD);
if(lastOp){
Sec_Eng_PKA_Wait_ISR();
Sec_Eng_PKA_Clear_Int();
}
}
/****************************************************************************//**
* @brief PKA mod 2N:D = S0 % ((1 << BIT SHIFT)-1)
*
* @param dRegType: Destination Register type
* @param dRegIdx: Destination Register index
* @param s0RegType: Source 0 Register type
* @param s0RegIdx: Source 0 Register index
* @param bit_shift: Bits to shift
* @param lastOp: Last operation
*
* @return None
*
*******************************************************************************/
void Sec_Eng_PKA_LMOD2N(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,
uint16_t bit_shift,uint8_t lastOp)
{
struct pka0_bit_shift_op_cfg cfg;
Sec_Eng_PKA_Write_Common_OP_First_Cfg(s0RegIdx, s0RegType, dRegIdx, dRegType, SEC_ENG_PKA_OP_MOD2N, lastOp);
cfg.value.BF.bit_shift = bit_shift;
BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_RW, cfg.value.WORD);
if(lastOp){
Sec_Eng_PKA_Wait_ISR();
Sec_Eng_PKA_Clear_Int();
}
}
/****************************************************************************//**
* @brief PKA GF to Mont filed 2N:d = (a<<size) % p
*
* @param dRegType: Destination Register type
* @param dRegIdx: Destination Register index
* @param sRegType: Source Register type
* @param sRegIdx: Source Register index
* @param size: Bits to shift
* @param tRegType: Temp Register type
* @param tRegIdx: Temp Register index
* @param pRegType: Mod P Register type
* @param pRegIdx: Mod P Register index
*
* @return None
*
*******************************************************************************/
void Sec_Eng_PKA_GF2Mont(uint8_t dRegType, uint8_t dRegIdx, uint8_t sRegType, uint8_t sRegIdx,uint32_t size,
uint8_t tRegType, uint8_t tRegIdx,uint8_t pRegType, uint8_t pRegIdx)
{
Sec_Eng_PKA_LMUL2N(tRegType,tRegIdx,sRegType,sRegIdx,size,0);
Sec_Eng_PKA_MREM(dRegType,dRegIdx,tRegType,tRegIdx,pRegType,pRegIdx,1);
}
/****************************************************************************//**
* @brief PKA GF to Mont filed 2N:d = (a * inv_r) % p
*
* @param dRegType: Destination Register type
* @param dRegIdx: Destination Register index
* @param aRegType: Source Register type
* @param aRegIdx: Source Register index
* @param invrRegType: Invert R Register type
* @param invrRegIdx: Invert R Register index
* @param tRegType: Temp Register type
* @param tRegIdx: Temp Register index
* @param pRegType: Mod P Register type
* @param pRegIdx: Mod P Register index
*
* @return None
*
*******************************************************************************/
void Sec_Eng_PKA_Mont2GF(uint8_t dRegType, uint8_t dRegIdx, uint8_t aRegType, uint8_t aRegIdx, uint8_t invrRegType, uint8_t invrRegIdx,
uint8_t tRegType, uint8_t tRegIdx,uint8_t pRegType, uint8_t pRegIdx)
{
Sec_Eng_PKA_LMUL(tRegType,tRegIdx,aRegType,aRegIdx,invrRegType, invrRegIdx,0);
Sec_Eng_PKA_MREM(dRegType,dRegIdx,tRegType,tRegIdx,pRegType,pRegIdx,1);
}
/****************************************************************************//**
* @brief Set gmac little endian
*
* @param None
*
* @return None
*
*******************************************************************************/
void Sec_Eng_GMAC_Enable_LE(void)
{
uint32_t tmpVal;
tmpVal = BL_RD_REG(SEC_ENG_BASE,SEC_ENG_SE_GMAC_0_CTRL_0);
tmpVal = BL_CLR_REG_BIT(tmpVal,SEC_ENG_SE_GMAC_0_T_ENDIAN);
tmpVal = BL_CLR_REG_BIT(tmpVal,SEC_ENG_SE_GMAC_0_H_ENDIAN);
tmpVal = BL_CLR_REG_BIT(tmpVal,SEC_ENG_SE_GMAC_0_X_ENDIAN);
BL_WR_REG(SEC_ENG_BASE,SEC_ENG_SE_GMAC_0_CTRL_0,tmpVal);
}
/****************************************************************************//**
* @brief Set gmac big endian
*
* @param None
*
* @return None
*
*******************************************************************************/
void Sec_Eng_GMAC_Enable_BE(void)
{
uint32_t tmpVal;
tmpVal = BL_RD_REG(SEC_ENG_BASE,SEC_ENG_SE_GMAC_0_CTRL_0);
tmpVal = BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_GMAC_0_T_ENDIAN);
tmpVal = BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_GMAC_0_H_ENDIAN);
tmpVal = BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_GMAC_0_X_ENDIAN);
BL_WR_REG(SEC_ENG_BASE,SEC_ENG_SE_GMAC_0_CTRL_0,tmpVal);
}
/****************************************************************************//**
* @brief GMAC enable link mode
*
* @param None
*
* @return None
*
*******************************************************************************/
void Sec_Eng_GMAC_Enable_Link(void)
{
uint32_t tmpVal;
/* Enable gmac link mode */
tmpVal = BL_RD_REG(SEC_ENG_BASE,SEC_ENG_SE_GMAC_0_CTRL_0);
BL_WR_REG(SEC_ENG_BASE,SEC_ENG_SE_GMAC_0_CTRL_0,BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_GMAC_0_EN));
}
/****************************************************************************//**
* @brief GMAC disable link mode
*
* @param None
*
* @return None
*
*******************************************************************************/
void Sec_Eng_GMAC_Disable_Link(void)
{
uint32_t tmpVal;
/* Disable gmac link mode */
tmpVal = BL_RD_REG(SEC_ENG_BASE,SEC_ENG_SE_GMAC_0_CTRL_0);
BL_WR_REG(SEC_ENG_BASE,SEC_ENG_SE_GMAC_0_CTRL_0,BL_CLR_REG_BIT(tmpVal,SEC_ENG_SE_GMAC_0_EN));
}
/****************************************************************************//**
* @brief GMAC work in link mode
*
* @param linkAddr: Address of config structure in link mode
* @param in: GMAC input data buffer to deal with
* @param len: GMAC input data length
* @param out: GMAC output data buffer
*
* @return SUCCESS or ERROR
*
*******************************************************************************/
BL_Err_Type Sec_Eng_GMAC_Link_Work(uint32_t linkAddr,const uint8_t *in,uint32_t len,uint8_t *out)
{
uint32_t GMACx = SEC_ENG_BASE;
uint32_t tmpVal;
uint32_t timeoutCnt = SEC_ENG_GMAC_BUSY_TIMEOUT_COUNT;
/* Link address should word align */
if((linkAddr&0x03) != 0 || len%16 != 0){
return ERROR;
}
/* Wait finished */
do {
tmpVal=BL_RD_REG(GMACx,SEC_ENG_SE_GMAC_0_CTRL_0);
timeoutCnt--;
if(timeoutCnt == 0){
return TIMEOUT;
}
}while(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_GMAC_0_BUSY));
/* Set link address */
BL_WR_REG(GMACx,SEC_ENG_SE_GMAC_0_LCA,linkAddr);
/* Change source buffer address */
*(uint32_t *)(linkAddr+4) = (uint32_t)in;
/* Set data length */
*((uint16_t *)linkAddr+1) = len/16;
/* Start gmac engine and wait finishing */
tmpVal = BL_RD_REG(GMACx,SEC_ENG_SE_GMAC_0_CTRL_0);
BL_WR_REG(GMACx,SEC_ENG_SE_GMAC_0_CTRL_0,BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_GMAC_0_TRIG_1T));
timeoutCnt = SEC_ENG_GMAC_BUSY_TIMEOUT_COUNT;
do {
tmpVal=BL_RD_REG(GMACx,SEC_ENG_SE_GMAC_0_CTRL_0);
timeoutCnt--;
if(timeoutCnt == 0){
return TIMEOUT;
}
}while(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_GMAC_0_BUSY));
/* Get result */
BL602_MemCpy_Fast(out,(uint8_t *)(linkAddr+0x18),16);
return SUCCESS;
}
#ifndef BL602_USE_HAL_DRIVER
/****************************************************************************//**
* @brief Sec Eng Interrupt Handler
*
* @param intType: IRQ Type
*
* @return None
*
*******************************************************************************/
static void SEC_Eng_IntHandler(SEC_ENG_INT_Type intType)
{
uint32_t tmpVal;
/* Check the parameters */
CHECK_PARAM(IS_SEC_ENG_INT_TYPE(intType));
switch(intType)
{
case SEC_ENG_INT_TRNG:
tmpVal = BL_RD_REG(SEC_ENG_BASE,SEC_ENG_SE_TRNG_0_CTRL_0);
if(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_TRNG_0_INT)){
/* Clear interrupt */
BL_WR_REG(SEC_ENG_BASE,SEC_ENG_SE_TRNG_0_CTRL_0,BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_TRNG_0_INT_CLR_1T));
/* Call the callback function */
if(secEngIntCbfArra[SEC_ENG_INT_TRNG] != NULL){
secEngIntCbfArra[SEC_ENG_INT_TRNG]();
}
}
break;
case SEC_ENG_INT_AES:
tmpVal = BL_RD_REG(SEC_ENG_BASE,SEC_ENG_SE_AES_0_CTRL);
if(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_AES_0_INT)){
/* Clear interrupt */
BL_WR_REG(SEC_ENG_BASE,SEC_ENG_SE_AES_0_CTRL,BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_AES_0_INT_CLR_1T));
/* Call the callback function */
if(secEngIntCbfArra[SEC_ENG_INT_AES] != NULL){
secEngIntCbfArra[SEC_ENG_INT_AES]();
}
}
break;
case SEC_ENG_INT_SHA:
tmpVal = BL_RD_REG(SEC_ENG_BASE,SEC_ENG_SE_SHA_0_CTRL);
if(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_SHA_0_INT)){
/* Clear interrupt */
BL_WR_REG(SEC_ENG_BASE,SEC_ENG_SE_SHA_0_CTRL,BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_SHA_0_INT_CLR_1T));
/* Call the callback function */
if(secEngIntCbfArra[SEC_ENG_INT_SHA] != NULL){
secEngIntCbfArra[SEC_ENG_INT_SHA]();
}
}
break;
case SEC_ENG_INT_PKA:
tmpVal = BL_RD_REG(SEC_ENG_BASE,SEC_ENG_SE_PKA_0_CTRL_0);
if(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_PKA_0_INT)){
/* Clear interrupt */
BL_WR_REG(SEC_ENG_BASE,SEC_ENG_SE_PKA_0_CTRL_0,BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_PKA_0_INT_CLR_1T));
/* Call the callback function */
if(secEngIntCbfArra[SEC_ENG_INT_PKA] != NULL){
secEngIntCbfArra[SEC_ENG_INT_PKA]();
}
}
break;
case SEC_ENG_INT_CDET:
/* Call the callback function */
if(secEngIntCbfArra[SEC_ENG_INT_CDET] != NULL){
secEngIntCbfArra[SEC_ENG_INT_CDET]();
}
break;
case SEC_ENG_INT_GMAC:
tmpVal = BL_RD_REG(SEC_ENG_BASE,SEC_ENG_SE_GMAC_0_CTRL_0);
if(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_GMAC_0_INT)){
/* Clear interrupt */
BL_WR_REG(SEC_ENG_BASE,SEC_ENG_SE_GMAC_0_CTRL_0,BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_GMAC_0_INT_CLR_1T));
/* Call the callback function */
if(secEngIntCbfArra[SEC_ENG_INT_GMAC] != NULL){
secEngIntCbfArra[SEC_ENG_INT_GMAC]();
}
}
break;
default:
break;
}
}
#endif
/****************************************************************************//**
* @brief Sec Eng Interrupt Mask or Unmask
*
* @param intType: Sec Eng Interrupt Type
* @param intMask: MASK or UNMASK
*
* @return None
*
*******************************************************************************/
void SEC_Eng_IntMask(SEC_ENG_INT_Type intType, BL_Mask_Type intMask)
{
uint32_t tmpVal;
/* Check the parameters */
CHECK_PARAM(IS_SEC_ENG_INT_TYPE(intType));
switch(intType) {
case SEC_ENG_INT_TRNG:
tmpVal = BL_RD_REG(SEC_ENG_BASE, SEC_ENG_SE_TRNG_0_CTRL_0);
if(intMask == UNMASK) {
/* UNMASK(Enable) this interrupt */
BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_TRNG_0_CTRL_0, BL_CLR_REG_BIT(tmpVal,SEC_ENG_SE_TRNG_0_INT_MASK));
}
else {
/* MASK(Disable) this interrupt */
BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_TRNG_0_CTRL_0, BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_TRNG_0_INT_MASK));
}
break;
case SEC_ENG_INT_AES:
tmpVal = BL_RD_REG(SEC_ENG_BASE, SEC_ENG_SE_AES_0_CTRL);
if(intMask == UNMASK) {
/* UNMASK(Enable) this interrupt */
BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_AES_0_CTRL, BL_CLR_REG_BIT(tmpVal, SEC_ENG_SE_AES_0_INT_MASK));
}
else {
/* MASK(Disable) this interrupt */
BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_AES_0_CTRL, BL_SET_REG_BIT(tmpVal, SEC_ENG_SE_AES_0_INT_MASK));
}
break;
case SEC_ENG_INT_SHA:
tmpVal = BL_RD_REG(SEC_ENG_BASE, SEC_ENG_SE_SHA_0_CTRL);
if(intMask == UNMASK) {
/* UNMASK(Enable) this interrupt */
BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_SHA_0_CTRL, BL_CLR_REG_BIT(tmpVal, SEC_ENG_SE_SHA_0_INT_MASK));
}
else {
/* MASK(Disable) this interrupt */
BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_SHA_0_CTRL, BL_SET_REG_BIT(tmpVal, SEC_ENG_SE_SHA_0_INT_MASK));
}
break;
case SEC_ENG_INT_PKA:
tmpVal = BL_RD_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_CTRL_0);
if(intMask == UNMASK) {
/* UNMASK(Enable) this interrupt */
BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_CTRL_0, BL_CLR_REG_BIT(tmpVal, SEC_ENG_SE_PKA_0_INT_MASK));
}
else {
/* MASK(Disable) this interrupt */
BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_CTRL_0, BL_SET_REG_BIT(tmpVal, SEC_ENG_SE_PKA_0_INT_MASK));
}
break;
case SEC_ENG_INT_CDET:
break;
case SEC_ENG_INT_GMAC:
tmpVal = BL_RD_REG(SEC_ENG_BASE, SEC_ENG_SE_GMAC_0_CTRL_0);
if(intMask == UNMASK) {
/* UNMASK(Enable) this interrupt */
BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_GMAC_0_CTRL_0, BL_CLR_REG_BIT(tmpVal, SEC_ENG_SE_GMAC_0_INT_MASK));
}
else {
/* MASK(Disable) this interrupt */
BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_GMAC_0_CTRL_0, BL_SET_REG_BIT(tmpVal, SEC_ENG_SE_GMAC_0_INT_MASK));
}
break;
case SEC_ENG_INT_ALL:
if(intMask == UNMASK) {
/* UNMASK(Enable) this interrupt */
tmpVal = BL_RD_REG(SEC_ENG_BASE, SEC_ENG_SE_TRNG_0_CTRL_0);
BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_TRNG_0_CTRL_0, BL_CLR_REG_BIT(tmpVal, SEC_ENG_SE_TRNG_0_INT_MASK));
tmpVal = BL_RD_REG(SEC_ENG_BASE, SEC_ENG_SE_AES_0_CTRL);
BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_AES_0_CTRL, BL_CLR_REG_BIT(tmpVal, SEC_ENG_SE_AES_0_INT_MASK));
tmpVal = BL_RD_REG(SEC_ENG_BASE, SEC_ENG_SE_SHA_0_CTRL);
BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_SHA_0_CTRL, BL_CLR_REG_BIT(tmpVal, SEC_ENG_SE_SHA_0_INT_MASK));
tmpVal = BL_RD_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_CTRL_0);
BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_CTRL_0, BL_CLR_REG_BIT(tmpVal, SEC_ENG_SE_PKA_0_INT_MASK));
tmpVal = BL_RD_REG(SEC_ENG_BASE, SEC_ENG_SE_GMAC_0_CTRL_0);
BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_GMAC_0_CTRL_0, BL_CLR_REG_BIT(tmpVal, SEC_ENG_SE_GMAC_0_INT_MASK));
}
else {
/* MASK(Disable) this interrupt */
tmpVal = BL_RD_REG(SEC_ENG_BASE, SEC_ENG_SE_TRNG_0_CTRL_0);
BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_TRNG_0_CTRL_0, BL_SET_REG_BIT(tmpVal, SEC_ENG_SE_TRNG_0_INT_MASK));
tmpVal = BL_RD_REG(SEC_ENG_BASE, SEC_ENG_SE_AES_0_CTRL);
BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_AES_0_CTRL, BL_SET_REG_BIT(tmpVal, SEC_ENG_SE_AES_0_INT_MASK));
tmpVal = BL_RD_REG(SEC_ENG_BASE, SEC_ENG_SE_SHA_0_CTRL);
BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_SHA_0_CTRL, BL_SET_REG_BIT(tmpVal, SEC_ENG_SE_SHA_0_INT_MASK));
tmpVal = BL_RD_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_CTRL_0);
BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_CTRL_0, BL_SET_REG_BIT(tmpVal, SEC_ENG_SE_PKA_0_INT_MASK));
tmpVal = BL_RD_REG(SEC_ENG_BASE, SEC_ENG_SE_GMAC_0_CTRL_0);
BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_GMAC_0_CTRL_0, BL_SET_REG_BIT(tmpVal, SEC_ENG_SE_GMAC_0_INT_MASK));
}
break;
default:
break;
}
}
/****************************************************************************//**
* @brief Sec Eng Interrupt clear
*
* @param intType: Sec Eng Interrupt Type
*
* @return None
*
*******************************************************************************/
void SEC_Eng_ClrIntStatus(SEC_ENG_INT_Type intType)
{
uint32_t tmpVal;
/* Check the parameters */
CHECK_PARAM(IS_SEC_ENG_INT_TYPE(intType));
switch(intType)
{
case SEC_ENG_INT_AES:
tmpVal = BL_RD_REG(SEC_ENG_BASE,SEC_ENG_SE_AES_0_CTRL);
BL_WR_REG(SEC_ENG_BASE,SEC_ENG_SE_AES_0_CTRL,BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_AES_0_INT_CLR_1T));
break;
case SEC_ENG_INT_SHA:
tmpVal = BL_RD_REG(SEC_ENG_BASE,SEC_ENG_SE_SHA_0_CTRL);
BL_WR_REG(SEC_ENG_BASE,SEC_ENG_SE_SHA_0_CTRL,BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_SHA_0_INT_CLR_1T));
break;
case SEC_ENG_INT_TRNG:
tmpVal = BL_RD_REG(SEC_ENG_BASE,SEC_ENG_SE_TRNG_0_CTRL_0);
BL_WR_REG(SEC_ENG_BASE,SEC_ENG_SE_TRNG_0_CTRL_0,BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_TRNG_0_INT_CLR_1T));
break;
case SEC_ENG_INT_PKA:
tmpVal = BL_RD_REG(SEC_ENG_BASE,SEC_ENG_SE_PKA_0_CTRL_0);
BL_WR_REG(SEC_ENG_BASE,SEC_ENG_SE_PKA_0_CTRL_0,BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_PKA_0_INT_CLR_1T));
break;
case SEC_ENG_INT_CDET:
break;
case SEC_ENG_INT_GMAC:
tmpVal = BL_RD_REG(SEC_ENG_BASE,SEC_ENG_SE_GMAC_0_CTRL_0);
BL_WR_REG(SEC_ENG_BASE,SEC_ENG_SE_GMAC_0_CTRL_0,BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_GMAC_0_INT_CLR_1T));
break;
default:
break;
}
}
/****************************************************************************//**
* @brief Sec Eng Interrupt callback function install
*
* @param intType: Sec Eng Interrupt Type
* @param cbFun: Pointer to interrupt callback function. The type should be void (*fn)(void)
*
* @return None
*
*******************************************************************************/
void SEC_Eng_Int_Callback_Install(SEC_ENG_INT_Type intType,intCallback_Type* cbFun)
{
/* Check the parameters */
CHECK_PARAM(IS_SEC_ENG_INT_TYPE(intType));
secEngIntCbfArra[intType] = cbFun;
}
/****************************************************************************//**
* @brief Sec Eng get interrupt status
*
* @param intType: Sec Eng Interrupt Type
*
* @return status of interrupt
*
*******************************************************************************/
BL_Sts_Type SEC_Eng_GetIntStatus(SEC_ENG_INT_Type intType)
{
uint32_t tmpVal;
BL_Sts_Type status = RESET;
/* Check the parameters */
CHECK_PARAM(IS_SEC_ENG_INT_TYPE(intType));
switch(intType)
{
case SEC_ENG_INT_AES:
tmpVal = BL_RD_REG(SEC_ENG_BASE,SEC_ENG_SE_AES_0_CTRL);
if(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_AES_0_INT)){
status = SET;
}
break;
case SEC_ENG_INT_SHA:
tmpVal = BL_RD_REG(SEC_ENG_BASE,SEC_ENG_SE_SHA_0_CTRL);
if(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_SHA_0_INT)){
status = SET;
}
break;
case SEC_ENG_INT_TRNG:
tmpVal = BL_RD_REG(SEC_ENG_BASE,SEC_ENG_SE_TRNG_0_CTRL_0);
if(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_TRNG_0_INT)){
status = SET;
}
break;
case SEC_ENG_INT_PKA:
tmpVal = BL_RD_REG(SEC_ENG_BASE,SEC_ENG_SE_PKA_0_CTRL_0);
if(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_PKA_0_INT)){
status = SET;
}
break;
case SEC_ENG_INT_CDET:
break;
case SEC_ENG_INT_GMAC:
tmpVal = BL_RD_REG(SEC_ENG_BASE,SEC_ENG_SE_GMAC_0_CTRL_0);
if(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_GMAC_0_INT)){
status = SET;
}
break;
default:
break;
}
return status;
}
#ifndef BL602_USE_HAL_DRIVER
/****************************************************************************//**
* @brief Sec Eng Trng IRQ Handler
*
* @param None
*
* @return None
*
*******************************************************************************/
void __IRQ SEC_TRNG_IRQHandler(void)
{
SEC_Eng_IntHandler(SEC_ENG_INT_TRNG);
}
/****************************************************************************//**
* @brief Sec Eng Pka IRQ Handler
*
* @param None
*
* @return None
*
*******************************************************************************/
void __IRQ SEC_PKA_IRQHandler(void)
{
SEC_Eng_IntHandler(SEC_ENG_INT_PKA);
}
/****************************************************************************//**
* @brief Sec Eng Aes IRQ Handler
*
* @param None
*
* @return None
*
*******************************************************************************/
void __IRQ SEC_AES_IRQHandler(void)
{
SEC_Eng_IntHandler(SEC_ENG_INT_AES);
}
/****************************************************************************//**
* @brief Sec Eng Sha IRQ Handler
*
* @param None
*
* @return None
*
*******************************************************************************/
void __IRQ SEC_SHA_IRQHandler(void)
{
SEC_Eng_IntHandler(SEC_ENG_INT_SHA);
}
/****************************************************************************//**
* @brief Sec Eng Cdet IRQ Handler
*
* @param None
*
* @return None
*
*******************************************************************************/
void __IRQ SEC_CDET_IRQHandler(void)
{
SEC_Eng_IntHandler(SEC_ENG_INT_CDET);
}
/****************************************************************************//**
* @brief Sec Eng Gmac IRQ Handler
*
* @param None
*
* @return None
*
*******************************************************************************/
void __IRQ SEC_GMAC_IRQHandler(void)
{
SEC_Eng_IntHandler(SEC_ENG_INT_GMAC);
}
#endif
/****************************************************************************//**
* @brief turn on sec ring
*
* @param None
*
* @return None
*
*******************************************************************************/
__WEAK
void ATTR_TCM_SECTION SEC_Eng_Turn_On_Sec_Ring(void)
{
uint32_t tmpVal = 0;
/* Turn-on Sec Ring Oscillation */
tmpVal=BL_RD_REG(SEC_ENG_BASE,SEC_ENG_SE_TRNG_0_CTRL_3);
tmpVal=BL_CLR_REG_BIT(tmpVal,SEC_ENG_SE_TRNG_0_ROSC_DIS);
BL_WR_REG(SEC_ENG_BASE,SEC_ENG_SE_TRNG_0_CTRL_3,tmpVal);
}
/****************************************************************************//**
* @brief turn off sec ring
*
* @param None
*
* @return None
*
*******************************************************************************/
__WEAK
void ATTR_TCM_SECTION SEC_Eng_Turn_Off_Sec_Ring(void)
{
uint32_t tmpVal = 0;
/* Turn-off Sec Ring Oscillation */
tmpVal=BL_RD_REG(SEC_ENG_BASE,SEC_ENG_SE_TRNG_0_CTRL_3);
tmpVal=BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_TRNG_0_ROSC_DIS);
BL_WR_REG(SEC_ENG_BASE,SEC_ENG_SE_TRNG_0_CTRL_3,tmpVal);
}
/*@} end of group SEC_ENG_Public_Functions */
/*@} end of group SEC_ENG */
/*@} end of group BL602_Peripheral_Driver */
|
mkroman/bl602-604
|
components/network/ble/blestack/src/include/bluetooth/hci_err.h
|
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @file
* @brief Bluetooth Host Control Interface status codes.
*/
/*
* Copyright (c) 2019 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_INCLUDE_BLUETOOTH_HCI_STATUS_H_
#define ZEPHYR_INCLUDE_BLUETOOTH_HCI_STATUS_H_
#ifdef __cplusplus
extern "C" {
#endif
/* HCI Error Codes, BT Core spec [Vol 2, Part D]. */
#define BT_HCI_ERR_SUCCESS 0x00
#define BT_HCI_ERR_UNKNOWN_CMD 0x01
#define BT_HCI_ERR_UNKNOWN_CONN_ID 0x02
#define BT_HCI_ERR_HW_FAILURE 0x03
#define BT_HCI_ERR_PAGE_TIMEOUT 0x04
#define BT_HCI_ERR_AUTH_FAIL 0x05
#define BT_HCI_ERR_PIN_OR_KEY_MISSING 0x06
#define BT_HCI_ERR_MEM_CAPACITY_EXCEEDED 0x07
#define BT_HCI_ERR_CONN_TIMEOUT 0x08
#define BT_HCI_ERR_CONN_LIMIT_EXCEEDED 0x09
#define BT_HCI_ERR_SYNC_CONN_LIMIT_EXCEEDED 0x0a
#define BT_HCI_ERR_CONN_ALREADY_EXISTS 0x0b
#define BT_HCI_ERR_CMD_DISALLOWED 0x0c
#define BT_HCI_ERR_INSUFFICIENT_RESOURCES 0x0d
#define BT_HCI_ERR_INSUFFICIENT_SECURITY 0x0e
#define BT_HCI_ERR_BD_ADDR_UNACCEPTABLE 0x0f
#define BT_HCI_ERR_CONN_ACCEPT_TIMEOUT 0x10
#define BT_HCI_ERR_UNSUPP_FEATURE_PARAM_VAL 0x11
#define BT_HCI_ERR_INVALID_PARAM 0x12
#define BT_HCI_ERR_REMOTE_USER_TERM_CONN 0x13
#define BT_HCI_ERR_REMOTE_LOW_RESOURCES 0x14
#define BT_HCI_ERR_REMOTE_POWER_OFF 0x15
#define BT_HCI_ERR_LOCALHOST_TERM_CONN 0x16
#define BT_HCI_ERR_PAIRING_NOT_ALLOWED 0x18
#define BT_HCI_ERR_UNSUPP_REMOTE_FEATURE 0x1a
#define BT_HCI_ERR_INVALID_LL_PARAM 0x1e
#define BT_HCI_ERR_UNSPECIFIED 0x1f
#define BT_HCI_ERR_UNSUPP_LL_PARAM_VAL 0x20
#define BT_HCI_ERR_LL_RESP_TIMEOUT 0x22
#define BT_HCI_ERR_LL_PROC_COLLISION 0x23
#define BT_HCI_ERR_INSTANT_PASSED 0x28
#define BT_HCI_ERR_PAIRING_NOT_SUPPORTED 0x29
#define BT_HCI_ERR_DIFF_TRANS_COLLISION 0x2a
#define BT_HCI_ERR_UNACCEPT_CONN_PARAM 0x3b
#define BT_HCI_ERR_ADV_TIMEOUT 0x3c
#define BT_HCI_ERR_TERM_DUE_TO_MIC_FAIL 0x3d
#define BT_HCI_ERR_CONN_FAIL_TO_ESTAB 0x3e
#define BT_HCI_ERR_AUTHENTICATION_FAIL __DEPRECATED_MACRO BT_HCI_ERR_AUTH_FAIL
#ifdef __cplusplus
}
#endif
#endif /* ZEPHYR_INCLUDE_BLUETOOTH_HCI_STATUS_H_ */
|
mkroman/bl602-604
|
components/hal_drv/bl602_hal/hal_boot2.c
|
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdio.h>
#include <string.h>
#include <errno.h>
#include "bl_boot2.h"
#include "bl_flash.h"
#include "hal_boot2.h"
#define PARTITION_BOOT2_RAM_ADDR_ACTIVE (0x42049C00)
#define PARTITION_HEADER_BOOT2_RAM_ADDR (0x42049C04)
#define PARTITION_BOOT2_FLASH_HEADER (0x42049d14)
#define PARTITION_BOOT2_FLASH_CONFIG (0x42049d18)
#define PARTITION_MAGIC (0x54504642)
#define PARTITION_FW_PART_NAME "FW"
#define PARTITION_FW_PART_HEADER_SIZE (0x1000)
//TODO use header file from project
#define FW_XIP_ADDRESS (0x23000000)
static struct {
uint8_t partition_active_idx;
uint8_t pad[3];
PtTable_Stuff_Config table;
} boot2_partition_table;//XXX Dont change the name of varaible, since we refer this boot2_partition_table in linker script
void hal_boot2_set_ptable_opt(HALpPtTable_Flash_Erase erase, HALpPtTable_Flash_Write write)
{
PtTable_Set_Flash_Operation((pPtTable_Flash_Erase)erase, (pPtTable_Flash_Write)write);
}
int hal_boot2_update_ptable(HALPartition_Entry_Config *ptEntry_hal)
{
int ret;
//FIXME force covert
PtTable_Entry_Config *ptEntry = (PtTable_Entry_Config*)ptEntry_hal;
ptEntry->activeIndex = !ptEntry->activeIndex;
(ptEntry->age)++;
ret = PtTable_Update_Entry(NULL,!boot2_partition_table.partition_active_idx, &boot2_partition_table.table, ptEntry);
return ret;
}
static void _dump_partition(void)
{
int i;
PtTable_Stuff_Config *part = &boot2_partition_table.table;
printf("======= PtTable_Config @%p=======\r\n", part);
printf("magicCode 0x%08X;", (unsigned int)(part->ptTable.magicCode));
printf(" version 0x%04X;", part->ptTable.version);
printf(" entryCnt %u;", part->ptTable.entryCnt);
printf(" age %lu;", part->ptTable.age);
printf(" crc32 0x%08X\r\n", (unsigned int)part->ptTable.crc32);
printf("idx type device activeIndex name Address[0] Address[1] Length[0] Length[1] age\r\n");
for (i = 0; i < part->ptTable.entryCnt; i++) {
printf("[%02d] ", i);
printf(" %02u", part->ptEntries[i].type);
printf(" %u", part->ptEntries[i].device);
printf(" %u", part->ptEntries[i].activeIndex);
printf(" %8s", part->ptEntries[i].name);
printf(" %p", (void*)(part->ptEntries[i].Address[0]));
printf(" %p", (void*)(part->ptEntries[i].Address[1]));
printf(" %p", (void*)(part->ptEntries[i].maxLen[0]));
printf(" %p", (void*)(part->ptEntries[i].maxLen[1]));
printf(" %lu\r\n", (part->ptEntries[i].age));
}
}
int hal_boot2_partition_bus_addr(const char *name, uint32_t *addr0, uint32_t *addr1, uint32_t *size0, uint32_t *size1, int *active)
{
int i;
uint32_t addr0_t, addr1_t;
if (PARTITION_MAGIC != boot2_partition_table.table.ptTable.magicCode) {
return -EIO;
}
/*Get Target partition*/
for (i = 0; i < boot2_partition_table.table.ptTable.entryCnt; i++) {
if (0 == strcmp((char *)&(boot2_partition_table.table.ptEntries[i].name[0]), name)) {
break;
}
}
if (boot2_partition_table.table.ptTable.entryCnt == i) {
return -ENOENT;
}
addr0_t = boot2_partition_table.table.ptEntries[i].Address[0];
addr1_t = boot2_partition_table.table.ptEntries[i].Address[1];
*active = boot2_partition_table.table.ptEntries[i].activeIndex;
*size0 = boot2_partition_table.table.ptEntries[i].maxLen[0];
*size1 = boot2_partition_table.table.ptEntries[i].maxLen[1];
/*cal partition address*/
for (i = 0; i < boot2_partition_table.table.ptTable.entryCnt; i++) {
if (0 == strcmp((char *)&(boot2_partition_table.table.ptEntries[i].name[0]), PARTITION_FW_PART_NAME)) {
break;
}
}
if (boot2_partition_table.table.ptTable.entryCnt == i) {
return -ECANCELED;
}
/*Make sure target partition is after FW partition*/
if ( (addr0_t && (addr0_t < boot2_partition_table.table.ptEntries[i].Address[0])) ||
(addr0_t && (addr0_t < boot2_partition_table.table.ptEntries[i].Address[1])) ||
(addr1_t && (addr1_t < boot2_partition_table.table.ptEntries[i].Address[0])) ||
(addr1_t && (addr1_t < boot2_partition_table.table.ptEntries[i].Address[1]))) {
return -EINVAL;
}
if ((0 != boot2_partition_table.table.ptEntries[i].activeIndex) &&
(1 != boot2_partition_table.table.ptEntries[i].activeIndex)) {
return -EFAULT;
}
*addr0 = addr0_t - boot2_partition_table.table.ptEntries[i].Address[boot2_partition_table.table.ptEntries[i].activeIndex] - PARTITION_FW_PART_HEADER_SIZE + FW_XIP_ADDRESS;
*addr1 = addr1_t - boot2_partition_table.table.ptEntries[i].Address[boot2_partition_table.table.ptEntries[i].activeIndex] - PARTITION_FW_PART_HEADER_SIZE + FW_XIP_ADDRESS;
return 0;
}
int hal_boot2_partition_bus_addr_active(const char *name, uint32_t *addr, uint32_t *size)
{
uint32_t addr0, addr1;
uint32_t size0, size1;
int active, ret;
if ((ret = hal_boot2_partition_bus_addr(name, &addr0, &addr1, &size0, &size1, &active))) {
return ret;
}
*addr = active ? addr1 : addr0;
*size = active ? size1 : size0;
return 0;
}
int hal_boot2_partition_bus_addr_inactive(const char *name, uint32_t *addr, uint32_t *size)
{
uint32_t addr0, addr1;
uint32_t size0, size1;
int active, ret;
if ((ret = hal_boot2_partition_bus_addr(name, &addr0, &addr1, &size0, &size1, &active))) {
return ret;
}
*addr = active ? addr0 : addr1;
*size = active ? size0 : size1;
return 0;
}
int hal_boot2_partition_addr(const char *name, uint32_t *addr0, uint32_t *addr1, uint32_t *size0, uint32_t *size1, int *active)
{
int i;
if (PARTITION_MAGIC != boot2_partition_table.table.ptTable.magicCode) {
return -EIO;
}
/*Get Target partition*/
for (i = 0; i < boot2_partition_table.table.ptTable.entryCnt; i++) {
if (0 == strcmp((char *)&(boot2_partition_table.table.ptEntries[i].name[0]), name)) {
break;
}
}
if (boot2_partition_table.table.ptTable.entryCnt == i) {
return -ENOENT;
}
*addr0 = boot2_partition_table.table.ptEntries[i].Address[0];
*addr1 = boot2_partition_table.table.ptEntries[i].Address[1];
*size0 = boot2_partition_table.table.ptEntries[i].maxLen[0];
*size1 = boot2_partition_table.table.ptEntries[i].maxLen[1];
*active = boot2_partition_table.table.ptEntries[i].activeIndex;
return 0;
}
int hal_boot2_partition_addr_active(const char *name, uint32_t *addr, uint32_t *size)
{
uint32_t addr0, addr1;
uint32_t size0, size1;
int active, ret;
if ((ret = hal_boot2_partition_addr(name, &addr0, &addr1, &size0, &size1, &active))) {
return ret;
}
*addr = active ? addr1 : addr0;
*size = active ? size1 : size0;
return 0;
}
int hal_boot2_partition_addr_inactive(const char *name, uint32_t *addr, uint32_t *size)
{
uint32_t addr0, addr1;
uint32_t size0, size1;
int active, ret;
if ((ret = hal_boot2_partition_addr(name, &addr0, &addr1, &size0, &size1, &active))) {
return ret;
}
*addr = active ? addr0 : addr1;
*size = active ? size0 : size1;
return 0;
}
uint8_t hal_boot2_get_active_partition(void)
{
return boot2_partition_table.partition_active_idx;
}
int hal_boot2_get_active_entries(int type, HALPartition_Entry_Config *ptEntry_hal)
{
PtTable_Entry_Config *ptEntry = (PtTable_Entry_Config*)ptEntry_hal;
if (PtTable_Get_Active_Entries(&boot2_partition_table.table, type, ptEntry)) {
return -1;
}
return 0;
}
int hal_boot2_dump(void)
{
_dump_partition();
return 0;
}
int hal_boot2_init(void)
{
boot2_partition_table.partition_active_idx = *(uint8_t*)PARTITION_BOOT2_RAM_ADDR_ACTIVE;
printf("[HAL] [BOOT2] Active Partition[%u] consumed %d Bytes\r\n",
boot2_partition_table.partition_active_idx,
sizeof(PtTable_Stuff_Config)
);
_dump_partition();
bl_flash_config_update();
return 0;
}
|
mkroman/bl602-604
|
components/hal_drv/bl602_hal/bl_sec.c
|
<filename>components/hal_drv/bl602_hal/bl_sec.c
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdio.h>
#include <sec_eng_reg.h>
#include <bl602_sec_eng.h>
#include <aos/kernel.h>
#include "bl_sec.h"
#include "bl_irq.h"
#define REG_VALUE_TRNG_INIT (0x40004200)
#define REG_VALUE_TRNG_VAL (0x40004208)
#define xstr(a) str_macro(a)
#define str_macro(a) #a
#define TRNG_LOOP_COUNTER (17)
#define TRNG_SIZE_IN_WORD (8)
#define TRNG_SIZE_IN_BYTES (32)
static uint32_t trng_buffer[TRNG_SIZE_IN_WORD];
static unsigned int trng_idx = 0;
static inline void _trng_trigger()
{
uint32_t TRNGx = SEC_ENG_BASE + SEC_ENG_TRNG_OFFSET;
uint32_t val;
val = BL_RD_REG(TRNGx, SEC_ENG_SE_TRNG_CTRL_0);
if (BL_IS_REG_BIT_SET(val, SEC_ENG_SE_TRNG_BUSY)) {
return;
}
BL_WR_REG(TRNGx, SEC_ENG_SE_TRNG_CTRL_1, trng_buffer[0]);
BL_WR_REG(TRNGx, SEC_ENG_SE_TRNG_CTRL_2, trng_buffer[1]);
val = BL_SET_REG_BIT(val, SEC_ENG_SE_TRNG_INT_SET_1T);
val = BL_SET_REG_BIT(val, SEC_ENG_SE_TRNG_INT_CLR_1T);
val = BL_SET_REG_BIT(val, SEC_ENG_SE_TRNG_EN);
val = BL_SET_REG_BIT(val, SEC_ENG_SE_TRNG_TRIG_1T);
BL_WR_REG(TRNGx, SEC_ENG_SE_TRNG_CTRL_0, val);
}
static inline void wait_trng4feed()
{
uint32_t TRNGx = SEC_ENG_BASE + SEC_ENG_TRNG_OFFSET;
uint32_t val;
val = BL_RD_REG(TRNGx, SEC_ENG_SE_TRNG_CTRL_0);
while (BL_IS_REG_BIT_SET(val, SEC_ENG_SE_TRNG_BUSY)) {
/*wait until trng is NOT busy*/
val = BL_RD_REG(TRNGx, SEC_ENG_SE_TRNG_CTRL_0);
}
val = BL_SET_REG_BIT(val, SEC_ENG_SE_TRNG_INT_CLR_1T);
val = BL_CLR_REG_BIT(val, SEC_ENG_SE_TRNG_TRIG_1T);
BL_WR_REG(TRNGx, SEC_ENG_SE_TRNG_CTRL_0, val);
printf("Feed random number is %08lx\r\n", trng_buffer[0]);
trng_buffer[0] = BL_RD_REG(TRNGx, SEC_ENG_SE_TRNG_DOUT_0);
trng_buffer[1] = BL_RD_REG(TRNGx, SEC_ENG_SE_TRNG_DOUT_1);
trng_buffer[2] = BL_RD_REG(TRNGx, SEC_ENG_SE_TRNG_DOUT_2);
trng_buffer[3] = BL_RD_REG(TRNGx, SEC_ENG_SE_TRNG_DOUT_3);
trng_buffer[4] = BL_RD_REG(TRNGx, SEC_ENG_SE_TRNG_DOUT_4);
trng_buffer[5] = BL_RD_REG(TRNGx, SEC_ENG_SE_TRNG_DOUT_5);
trng_buffer[6] = BL_RD_REG(TRNGx, SEC_ENG_SE_TRNG_DOUT_6);
trng_buffer[7] = BL_RD_REG(TRNGx, SEC_ENG_SE_TRNG_DOUT_7);
}
uint32_t bl_sec_get_random_word(void)
{
trng_idx = (trng_idx & 0x7);
if (0 == trng_idx) {
_trng_trigger();
}
return trng_buffer[trng_idx++];
}
int bl_rand()
{
unsigned int val;
int counter = 0;
do {
val = bl_sec_get_random_word();
if ((counter++) > TRNG_LOOP_COUNTER) {
puts("[BL] [SEC] Failed after loop " xstr(TRNG_LOOP_COUNTER) "\r\n");
break;
}
} while (0 == val);
val >>= 1;//leave signe bit alone
return val;
}
void sec_trng_IRQHandler(void)
{
uint32_t TRNGx = SEC_ENG_BASE + SEC_ENG_TRNG_OFFSET;
uint32_t val;
if (aos_now_ms() < 1000 * 2) {
/*debug when boot*/
puts("[BL] [SEC] TRNG Handler\r\n");
}
val = BL_RD_REG(TRNGx, SEC_ENG_SE_TRNG_CTRL_0);
val = BL_SET_REG_BIT(val, SEC_ENG_SE_TRNG_INT_CLR_1T);
val = BL_CLR_REG_BIT(val, SEC_ENG_SE_TRNG_TRIG_1T);
BL_WR_REG(TRNGx, SEC_ENG_SE_TRNG_CTRL_0, val);
printf("random number is %08lx\r\n", trng_buffer[0]);
trng_buffer[0] = BL_RD_REG(TRNGx, SEC_ENG_SE_TRNG_DOUT_0);
trng_buffer[1] = BL_RD_REG(TRNGx, SEC_ENG_SE_TRNG_DOUT_1);
trng_buffer[2] = BL_RD_REG(TRNGx, SEC_ENG_SE_TRNG_DOUT_2);
trng_buffer[3] = BL_RD_REG(TRNGx, SEC_ENG_SE_TRNG_DOUT_3);
trng_buffer[4] = BL_RD_REG(TRNGx, SEC_ENG_SE_TRNG_DOUT_4);
trng_buffer[5] = BL_RD_REG(TRNGx, SEC_ENG_SE_TRNG_DOUT_5);
trng_buffer[6] = BL_RD_REG(TRNGx, SEC_ENG_SE_TRNG_DOUT_6);
trng_buffer[7] = BL_RD_REG(TRNGx, SEC_ENG_SE_TRNG_DOUT_7);
}
int bl_sec_init(void)
{
_trng_trigger();
wait_trng4feed();
/*Trigger again*/
_trng_trigger();
wait_trng4feed();
bl_irq_register(SEC_TRNG_IRQn, sec_trng_IRQHandler);
bl_irq_enable(SEC_TRNG_IRQn);
return 0;
}
int bl_exp_mod(uint32_t *src, uint32_t *result, int len, uint32_t *exp, int exp_len, uint32_t *mod, int mod_len)
{
return 0;
}
int bl_sec_test(void)
{
puts("------------------TRNG TEST---------------------------------\r\n");
printf("**********TRNG TEST rand[%08x]**************\r\n", bl_rand());
printf("**********TRNG TEST rand[%08x]**************\r\n", bl_rand());
printf("**********TRNG TEST rand[%08x]**************\r\n", bl_rand());
printf("**********TRNG TEST rand[%08x]**************\r\n", bl_rand());
printf("**********TRNG TEST rand[%08x]**************\r\n", bl_rand());
printf("**********TRNG TEST rand[%08x]**************\r\n", bl_rand());
printf("**********TRNG TEST rand[%08x]**************\r\n", bl_rand());
printf("**********TRNG TEST rand[%08x]**************\r\n", bl_rand());
printf("**********TRNG TEST rand[%08x]**************\r\n", bl_rand());
printf("**********TRNG TEST rand[%08x]**************\r\n", bl_rand());
printf("**********TRNG TEST rand[%08x]**************\r\n", bl_rand());
printf("**********TRNG TEST rand[%08x]**************\r\n", bl_rand());
printf("**********TRNG TEST rand[%08x]**************\r\n", bl_rand());
printf("**********TRNG TEST rand[%08x]**************\r\n", bl_rand());
printf("**********TRNG TEST rand[%08x]**************\r\n", bl_rand());
printf("**********TRNG TEST rand[%08x]**************\r\n", bl_rand());
puts("------------------------------------------------------------\r\n");
return 0;
}
void _dump_rsa_data(const uint8_t *data, int size)
{
int i;
for (i = 0; i < size; i++) {
switch (i & 0xF) {
case 0x0:
{
printf("[%04X]:", i);
printf(" %02X", data[i]);
}
break;
case 0xF:
{
printf(" %02X", data[i]);
puts("\r\n");
}
break;
default:
{
printf(" %02X", data[i]);
}
}
}
}
static void RSA_Compare_Data(const uint8_t *expected, const uint8_t *input, uint32_t len)
{
int i = 0, is_failed = 0;
for (i = 0; i < len; i++) {
if (input[i] != expected[i]) {
is_failed = 1;
printf("%s[%02d], %02x %02x\r\n",
input[i] ==expected[i] ? "S" : "F",
i,
input[i],
expected[i]
);
}
}
if (is_failed) {
printf("====== Failed %lu Bytes======\r\n", len);
} else {
printf("====== Success %lu Bytes=====\r\n", len);
}
}
static void _pka_test_case2(void)
{
static const uint8_t n[256] = {
0xd8, 0xa6, 0x4f, 0xea, 0x28, 0xf9, 0xdf, 0x07, 0x04, 0x55, 0xfa, 0xfb, 0x50, 0x5d, 0xbe, 0xb6,
0x9f, 0x7b, 0x53, 0x96, 0xef, 0x05, 0x5e, 0x0a, 0xf5, 0x2d, 0xe3, 0x67, 0x78, 0x07, 0x6b, 0xf6,
0xb2, 0x17, 0xac, 0x2e, 0x51, 0x42, 0x84, 0xbb, 0xfe, 0x3e, 0x5f, 0x0c, 0x85, 0xc4, 0x9d, 0xd4,
0x8b, 0xd5, 0xfa, 0x17, 0x2d, 0xb1, 0x26, 0x81, 0xe7, 0x79, 0x07, 0x45, 0x82, 0x42, 0x22, 0x3d,
0x0d, 0x97, 0xcf, 0xde, 0xea, 0xb8, 0xba, 0x16, 0x05, 0x8a, 0x5b, 0x0f, 0xec, 0x07, 0x30, 0xa4,
0xc6, 0xbf, 0xff, 0x20, 0x52, 0x1b, 0x94, 0xad, 0xfa, 0xb7, 0x6e, 0x83, 0x14, 0x48, 0x58, 0x14,
0x99, 0xe7, 0xa3, 0x9e, 0xc1, 0x08, 0xbd, 0xfe, 0x20, 0x11, 0x56, 0xdb, 0x96, 0x0a, 0xbb, 0x0b,
0xbc, 0xd4, 0x37, 0x55, 0xf9, 0x9c, 0x6d, 0x5b, 0x87, 0x4e, 0x50, 0x9f, 0x24, 0x0e, 0x3a, 0x1a,
0x0c, 0x54, 0x67, 0xbd, 0x0f, 0x34, 0x03, 0x5e, 0x45, 0x5b, 0x93, 0x42, 0xbe, 0x71, 0xe6, 0xa7,
0xf9, 0x49, 0x1a, 0xb3, 0xb2, 0xfb, 0x0e, 0xee, 0x3d, 0xcf, 0x0c, 0x5a, 0xf8, 0xb5, 0x80, 0x42,
0x7c, 0x0c, 0x75, 0xc5, 0xe1, 0x17, 0x29, 0x39, 0x55, 0x2b, 0xb1, 0xf5, 0x72, 0x06, 0x9e, 0x54,
0x0b, 0x0e, 0xf2, 0x95, 0xc8, 0x5b, 0x69, 0xaf, 0x5b, 0x81, 0x97, 0xae, 0xb1, 0x6e, 0xc4, 0x6d,
0x95, 0xd8, 0x22, 0x1e, 0x39, 0xf0, 0x76, 0x54, 0x19, 0x96, 0x03, 0x4c, 0x25, 0x85, 0x2f, 0xe1,
0x84, 0xd7, 0xc1, 0x62, 0xe1, 0x9e, 0x9f, 0x1f, 0xd4, 0xb8, 0xf0, 0xc2, 0x68, 0x76, 0x7c, 0xcf,
0x43, 0x3e, 0x60, 0x93, 0xd0, 0x89, 0x65, 0xae, 0x72, 0xcd, 0xd6, 0x00, 0x0d, 0x91, 0x42, 0x90,
0x98, 0x02, 0xa9, 0xf6, 0x82, 0x1b, 0xb5, 0x22, 0xfd, 0xb6, 0xc2, 0x5c, 0xad, 0x86, 0x81, 0x1d,
};
static const uint8_t m[256] = {
0x30, 0x31, 0x36, 0x64, 0x61, 0x34, 0x31, 0x66, 0x34, 0x62, 0x66, 0x35, 0x38, 0x61, 0x36, 0x32,
0x35, 0x61, 0x61, 0x35, 0x63, 0x33, 0x30, 0x37, 0x62, 0x63, 0x64, 0x31, 0x61, 0x37, 0x35, 0x30,
0x33, 0x64, 0x62, 0x30, 0x36, 0x63, 0x39, 0x37, 0x62, 0x30, 0x39, 0x31, 0x39, 0x33, 0x38, 0x61,
0x32, 0x31, 0x62, 0x35, 0x66, 0x36, 0x38, 0x65, 0x33, 0x37, 0x37, 0x61, 0x62, 0x38, 0x39, 0x39,
0x62, 0x65, 0x66, 0x37, 0x63, 0x61, 0x31, 0x36, 0x35, 0x30, 0x65, 0x38, 0x66, 0x30, 0x38, 0x64,
0x37, 0x32, 0x38, 0x37, 0x64, 0x64, 0x30, 0x66, 0x36, 0x64, 0x32, 0x61, 0x64, 0x36, 0x34, 0x31,
0x32, 0x38, 0x38, 0x33, 0x38, 0x63, 0x35, 0x39, 0x35, 0x61, 0x32, 0x64, 0x31, 0x30, 0x65, 0x34,
0x36, 0x37, 0x61, 0x62, 0x35, 0x34, 0x35, 0x33, 0x63, 0x34, 0x65, 0x63, 0x37, 0x37, 0x30, 0x35,
0x33, 0x38, 0x61, 0x63, 0x39, 0x66, 0x38, 0x30, 0x36, 0x66, 0x30, 0x38, 0x66, 0x66, 0x33, 0x30,
0x38, 0x65, 0x36, 0x65, 0x64, 0x62, 0x35, 0x35, 0x34, 0x31, 0x66, 0x39, 0x66, 0x30, 0x34, 0x36,
0x63, 0x36, 0x37, 0x32, 0x62, 0x31, 0x32, 0x30, 0x37, 0x37, 0x35, 0x35, 0x62, 0x30, 0x35, 0x66,
0x35, 0x36, 0x64, 0x33, 0x61, 0x36, 0x36, 0x31, 0x37, 0x64, 0x63, 0x37, 0x35, 0x34, 0x64, 0x35,
0x65, 0x32, 0x30, 0x34, 0x63, 0x31, 0x36, 0x31, 0x36, 0x61, 0x31, 0x33, 0x65, 0x33, 0x62, 0x31,
0x34, 0x65, 0x38, 0x65, 0x32, 0x39, 0x63, 0x39, 0x35, 0x33, 0x33, 0x38, 0x36, 0x65, 0x65, 0x64,
0x62, 0x63, 0x30, 0x39, 0x34, 0x30, 0x37, 0x62, 0x39, 0x34, 0x33, 0x34, 0x38, 0x37, 0x37, 0x36,
0x36, 0x37, 0x63, 0x62, 0x33, 0x30, 0x39, 0x63, 0x36, 0x33, 0x30, 0x34, 0x32, 0x32, 0x36, 0x32,
};
static const uint8_t e[4] = {
0x00, 0x01, 0x00, 0x01,
};
static const uint8_t nprime[256] = {
0x38, 0x62, 0xc1, 0xf5, 0x55, 0x2d, 0x3d, 0x60, 0x5e, 0x42, 0xe1, 0x65, 0xde, 0xed, 0x35, 0xd5,
0xc5, 0x85, 0xe4, 0x4e, 0xeb, 0x74, 0xa5, 0x22, 0xb3, 0xed, 0x5f, 0x5b, 0xb1, 0xb9, 0xe9, 0x0a,
0x7d, 0xa5, 0x74, 0x58, 0xf8, 0xa1, 0xab, 0x17, 0x74, 0xd0, 0x07, 0xa3, 0x7f, 0xd2, 0x9b, 0x50,
0x2a, 0xed, 0x5e, 0xdc, 0x5a, 0x69, 0xfe, 0x0e, 0xb1, 0xd8, 0x53, 0x35, 0x9b, 0xef, 0x1d, 0x76,
0x52, 0x9e, 0x87, 0x3c, 0xb0, 0x82, 0x4e, 0x03, 0xdf, 0x75, 0xed, 0x09, 0x9f, 0x3d, 0x37, 0xf6,
0xe8, 0x0d, 0xc9, 0x2e, 0x81, 0xf2, 0x9d, 0x2e, 0xaa, 0xe6, 0x53, 0x79, 0x6b, 0x99, 0xef, 0x46,
0x36, 0xd9, 0x2e, 0x9d, 0x15, 0xd1, 0x7f, 0x23, 0x14, 0xb9, 0xeb, 0x33, 0xa7, 0xd4, 0x8e, 0x86,
0x60, 0xc9, 0xd9, 0x7c, 0xca, 0x54, 0x59, 0x57, 0x94, 0x1e, 0x52, 0x4d, 0xc8, 0x3f, 0x9b, 0x24,
0x28, 0x25, 0xcb, 0x57, 0xca, 0x8f, 0x16, 0x5a, 0x37, 0xc2, 0xc6, 0xae, 0xc5, 0xe7, 0xc4, 0x2e,
0xf3, 0x24, 0x1c, 0xb7, 0xe9, 0xf5, 0x92, 0x4e, 0xd4, 0x51, 0x50, 0xff, 0xde, 0x44, 0x3c, 0xae,
0x72, 0xbd, 0x16, 0x39, 0x63, 0x8a, 0x22, 0x9c, 0x95, 0xda, 0x21, 0xf0, 0x4c, 0x12, 0x36, 0x2d,
0x00, 0xad, 0xb3, 0x89, 0xb5, 0x09, 0x9e, 0x3d, 0x24, 0x81, 0xfc, 0xef, 0x99, 0x95, 0x22, 0x9d,
0xb3, 0x94, 0x39, 0x32, 0xdd, 0xc4, 0x2b, 0x2f, 0xb0, 0x13, 0xfe, 0xb5, 0x5e, 0xc7, 0x64, 0x93,
0x7a, 0xb5, 0x81, 0x93, 0x1f, 0x9f, 0x96, 0x1e, 0x7a, 0x5c, 0x8d, 0xde, 0x8f, 0xae, 0xd9, 0xc8,
0xdd, 0x35, 0x1e, 0x17, 0x47, 0xb6, 0xab, 0xed, 0xb6, 0x82, 0x22, 0x4c, 0x62, 0xbd, 0x12, 0x4e,
0x44, 0x5c, 0x48, 0x2b, 0x75, 0x63, 0x1c, 0xde, 0xfa, 0x15, 0x0d, 0xb1, 0x50, 0x31, 0xb6, 0xcb,
};
static const uint8_t inv_r[256] = {
0x2f, 0xb7, 0xf5, 0x4a, 0xd2, 0x19, 0xde, 0x24, 0x7c, 0xdb, 0xcd, 0x52, 0x6e, 0xbc, 0x2c, 0x5c,
0x76, 0x9a, 0x36, 0xc3, 0x87, 0x33, 0xf7, 0xe9, 0x3d, 0x5b, 0x3d, 0xcd, 0x33, 0x7a, 0x3b, 0x4e,
0x55, 0xf5, 0xd9, 0x42, 0x76, 0x63, 0x28, 0x7a, 0xa8, 0x7c, 0xf7, 0xd1, 0xf6, 0x0d, 0x26, 0xba,
0xbe, 0x9f, 0x35, 0xf4, 0x86, 0xc5, 0x93, 0x4c, 0xe8, 0x76, 0xda, 0x88, 0xb8, 0xbe, 0xad, 0x25,
0x6b, 0xe7, 0x44, 0x3b, 0x1c, 0x2c, 0x99, 0x15, 0xee, 0x33, 0x46, 0xc6, 0xe0, 0xb0, 0x39, 0x6d,
0x20, 0xb2, 0x68, 0xc7, 0x75, 0x41, 0x2c, 0xff, 0xcb, 0x93, 0x1d, 0x40, 0xd2, 0x0e, 0x64, 0xea,
0x2e, 0x0a, 0x55, 0x9f, 0x04, 0x9d, 0xfd, 0x5e, 0x24, 0xa9, 0x28, 0x5c, 0x2d, 0x1b, 0x29, 0x87,
0x61, 0x6b, 0x50, 0x6a, 0x31, 0x31, 0x43, 0x12, 0x13, 0xe3, 0x1f, 0x47, 0x8a, 0x11, 0xd2, 0x5b,
0x26, 0x5e, 0x79, 0x04, 0x0b, 0xa8, 0xb0, 0x36, 0x22, 0xda, 0x3c, 0x5e, 0xb9, 0x09, 0x48, 0xb0,
0x32, 0x38, 0x25, 0xec, 0xfd, 0x5e, 0xef, 0xff, 0x80, 0x33, 0x9f, 0x94, 0x8c, 0x6e, 0x2a, 0xfb,
0xbf, 0x65, 0x18, 0x98, 0x7e, 0xff, 0x41, 0xde, 0x00, 0x2f, 0xd2, 0x7d, 0xbf, 0x4c, 0x54, 0x4e,
0x1c, 0x46, 0xd6, 0xab, 0xf6, 0x07, 0x34, 0x63, 0xe3, 0x0b, 0x81, 0xa0, 0x94, 0x7d, 0xaf, 0x7e,
0x37, 0xd6, 0xc5, 0xa6, 0x4a, 0x90, 0x6c, 0x44, 0x6a, 0xd9, 0x0f, 0x20, 0xb2, 0xef, 0x22, 0xa0,
0xdf, 0x38, 0x2d, 0x0b, 0xb3, 0x03, 0xb2, 0xc8, 0xe6, 0x8d, 0x74, 0xbf, 0x45, 0x91, 0xe0, 0x22,
0x16, 0xbf, 0xc4, 0xda, 0x54, 0x26, 0xaa, 0x65, 0x85, 0x88, 0xc3, 0xfb, 0x9f, 0xfc, 0x14, 0xc4,
0xff, 0x8b, 0x88, 0x47, 0x5f, 0xb1, 0x55, 0xdf, 0x47, 0x5c, 0xc0, 0x27, 0x39, 0x7b, 0xe8, 0xad,
};
uint32_t result[64];
static const uint8_t encrypted[256] = {
0x9e, 0xf6, 0x6f, 0x46, 0xf5, 0x51, 0x1a, 0xbc, 0xc2, 0x9c, 0x49, 0x02, 0x21, 0x6c, 0x20, 0xae,
0x49, 0x91, 0xcd, 0xba, 0xb9, 0x4f, 0xaf, 0xfd, 0x8d, 0x9a, 0x27, 0xbc, 0x0b, 0x69, 0x57, 0xc4,
0xba, 0x18, 0xe1, 0x56, 0x45, 0x55, 0xbb, 0x3f, 0x7b, 0xca, 0x45, 0xb3, 0x9a, 0x0e, 0xd7, 0x64,
0x6e, 0x71, 0xce, 0xd3, 0x08, 0xc9, 0x4b, 0x97, 0xab, 0x24, 0xe4, 0x6c, 0xe3, 0xc7, 0x52, 0x97,
0x3c, 0x45, 0x17, 0x3b, 0x17, 0x0a, 0x90, 0x50, 0xed, 0x73, 0x4b, 0x49, 0x07, 0xee, 0x13, 0xaf,
0x47, 0x1e, 0xd0, 0x24, 0xb1, 0xd2, 0xc8, 0x09, 0x75, 0xf3, 0x14, 0x9c, 0x71, 0x99, 0xe3, 0x94,
0x5b, 0xf6, 0xef, 0x2e, 0x79, 0xf5, 0x1d, 0xdc, 0xa7, 0xc5, 0xed, 0x0a, 0x3f, 0x1d, 0x43, 0xd0,
0x19, 0x14, 0x3a, 0xb7, 0x35, 0xc2, 0x3f, 0xa1, 0x9c, 0x00, 0xde, 0xf6, 0x96, 0x55, 0xf8, 0x0c,
0x79, 0x08, 0x68, 0xf3, 0x84, 0x7c, 0x2e, 0x0c, 0x51, 0xb6, 0x5e, 0x9e, 0xcd, 0x50, 0xcc, 0x5f,
0x71, 0x99, 0xc1, 0x0d, 0xf0, 0x3c, 0xd0, 0x80, 0x02, 0xf0, 0x8f, 0x12, 0x3e, 0x49, 0xa4, 0x9b,
0x1f, 0x14, 0x05, 0xf2, 0x7b, 0x41, 0xc1, 0x3e, 0x8a, 0xb2, 0xab, 0x70, 0x28, 0x2f, 0x20, 0x94,
0x17, 0x65, 0xf3, 0x89, 0x28, 0x6d, 0xcd, 0x0c, 0xea, 0x03, 0x4a, 0x10, 0x9d, 0xf9, 0x2e, 0xf4,
0x64, 0x79, 0x7a, 0xec, 0x46, 0xb4, 0xdf, 0xce, 0x6a, 0x8e, 0xd8, 0x35, 0x62, 0xb3, 0x04, 0xea,
0xf9, 0xc4, 0xde, 0xba, 0x2a, 0x5e, 0xbf, 0x59, 0xfa, 0xef, 0x2a, 0x42, 0x18, 0xc9, 0xf5, 0x7a,
0x73, 0xb8, 0x67, 0x78, 0x97, 0x6d, 0x75, 0x4b, 0xdd, 0xfb, 0x9b, 0xe6, 0x4c, 0x04, 0x9c, 0x61,
0x5f, 0x9a, 0x12, 0xbf, 0x2e, 0x75, 0x63, 0xdd, 0x50, 0xba, 0x2c, 0xef, 0xb0, 0x9a, 0x65, 0x24,
};
Sec_Eng_PKA_Reset();
Sec_Eng_PKA_BigEndian_Enable();
Sec_Eng_PKA_Write_Data(SEC_ENG_PKA_REG_SIZE_256, 0, (uint32_t*)n, 64, 0);
Sec_Eng_PKA_Write_Data(SEC_ENG_PKA_REG_SIZE_256, 1, (uint32_t*)nprime, 64, 0);
Sec_Eng_PKA_Write_Data(SEC_ENG_PKA_REG_SIZE_256, 2, (uint32_t*)m, 64, 0);
Sec_Eng_PKA_Write_Data(SEC_ENG_PKA_REG_SIZE_256, 3, (uint32_t*)e, 1, 0);
Sec_Eng_PKA_CREG(SEC_ENG_PKA_REG_SIZE_256, 4, 0, 0);
Sec_Eng_PKA_CREG(SEC_ENG_PKA_REG_SIZE_256, 5, 0, 1);
Sec_Eng_PKA_LMUL2N(
SEC_ENG_PKA_REG_SIZE_512, 2,
SEC_ENG_PKA_REG_SIZE_256, 2,
2048,
0
);
Sec_Eng_PKA_MREM(
SEC_ENG_PKA_REG_SIZE_256, 2,
SEC_ENG_PKA_REG_SIZE_512, 2,
SEC_ENG_PKA_REG_SIZE_256, 0,
0
);
Sec_Eng_PKA_CREG(SEC_ENG_PKA_REG_SIZE_512, 2, 0, 1);
Sec_Eng_PKA_MEXP(
SEC_ENG_PKA_REG_SIZE_256, 4,
SEC_ENG_PKA_REG_SIZE_256, 2,
SEC_ENG_PKA_REG_SIZE_256, 3,
SEC_ENG_PKA_REG_SIZE_256, 0,
1
);
Sec_Eng_PKA_Move_Data(
SEC_ENG_PKA_REG_SIZE_256, 2,
SEC_ENG_PKA_REG_SIZE_256, 4,
1
);
Sec_Eng_PKA_Write_Data(SEC_ENG_PKA_REG_SIZE_256, 1, (uint32_t*)inv_r, 64, 0);
Sec_Eng_PKA_CREG(SEC_ENG_PKA_REG_SIZE_256, 4, 0, 0);
Sec_Eng_PKA_CREG(SEC_ENG_PKA_REG_SIZE_256, 5, 0, 1);
Sec_Eng_PKA_LMUL(
SEC_ENG_PKA_REG_SIZE_512, 2,
SEC_ENG_PKA_REG_SIZE_256, 2,
SEC_ENG_PKA_REG_SIZE_256, 1,
0
);
Sec_Eng_PKA_MREM(
SEC_ENG_PKA_REG_SIZE_256, 2,
SEC_ENG_PKA_REG_SIZE_512, 2,
SEC_ENG_PKA_REG_SIZE_256, 0,
0
);
Sec_Eng_PKA_CREG(SEC_ENG_PKA_REG_SIZE_512, 2, 0, 1);
Sec_Eng_PKA_Read_Data(
SEC_ENG_PKA_REG_SIZE_256, 2,
result,
64
);
_dump_rsa_data((uint8_t*)result, sizeof(result));
RSA_Compare_Data(encrypted, (uint8_t*)result, sizeof(result));
}
static void __attribute__((unused)) dump_xgcd_step(uint32_t result[64])
{
puts(" ---- PKA 8:0\r\n");
Sec_Eng_PKA_Read_Data(
SEC_ENG_PKA_REG_SIZE_256, 0,
result,
64
);
_dump_rsa_data((uint8_t*)result, 256);
puts(" ---- PKA 8:1\r\n");
Sec_Eng_PKA_Read_Data(
SEC_ENG_PKA_REG_SIZE_256, 1,
result,
64
);
_dump_rsa_data((uint8_t*)result, 256);
puts(" ---- PKA 8:2\r\n");
Sec_Eng_PKA_Read_Data(
SEC_ENG_PKA_REG_SIZE_256, 2,
result,
64
);
_dump_rsa_data((uint8_t*)result, 256);
puts(" ---- PKA 8:3\r\n");
Sec_Eng_PKA_Read_Data(
SEC_ENG_PKA_REG_SIZE_256, 3,
result,
64
);
_dump_rsa_data((uint8_t*)result, 256);
puts(" ---- PKA 8:4\r\n");
Sec_Eng_PKA_Read_Data(
SEC_ENG_PKA_REG_SIZE_256, 4,
result,
64
);
_dump_rsa_data((uint8_t*)result, 256);
puts(" ---- PKA 8:5\r\n");
Sec_Eng_PKA_Read_Data(
SEC_ENG_PKA_REG_SIZE_256, 5,
result,
64
);
_dump_rsa_data((uint8_t*)result, 256);
puts(" ---- PKA 8:6\r\n");
Sec_Eng_PKA_Read_Data(
SEC_ENG_PKA_REG_SIZE_256, 6,
result,
64
);
_dump_rsa_data((uint8_t*)result, 256);
puts(" ---- PKA 8:7\r\n");
Sec_Eng_PKA_Read_Data(
SEC_ENG_PKA_REG_SIZE_256, 7,
result,
64
);
_dump_rsa_data((uint8_t*)result, 256);
}
static void _pka_test_case_xgcd(void)
{
int count = 0;
static const uint8_t n[256] = {
0xd8, 0xa6, 0x4f, 0xea, 0x28, 0xf9, 0xdf, 0x07, 0x04, 0x55, 0xfa, 0xfb, 0x50, 0x5d, 0xbe, 0xb6,
0x9f, 0x7b, 0x53, 0x96, 0xef, 0x05, 0x5e, 0x0a, 0xf5, 0x2d, 0xe3, 0x67, 0x78, 0x07, 0x6b, 0xf6,
0xb2, 0x17, 0xac, 0x2e, 0x51, 0x42, 0x84, 0xbb, 0xfe, 0x3e, 0x5f, 0x0c, 0x85, 0xc4, 0x9d, 0xd4,
0x8b, 0xd5, 0xfa, 0x17, 0x2d, 0xb1, 0x26, 0x81, 0xe7, 0x79, 0x07, 0x45, 0x82, 0x42, 0x22, 0x3d,
0x0d, 0x97, 0xcf, 0xde, 0xea, 0xb8, 0xba, 0x16, 0x05, 0x8a, 0x5b, 0x0f, 0xec, 0x07, 0x30, 0xa4,
0xc6, 0xbf, 0xff, 0x20, 0x52, 0x1b, 0x94, 0xad, 0xfa, 0xb7, 0x6e, 0x83, 0x14, 0x48, 0x58, 0x14,
0x99, 0xe7, 0xa3, 0x9e, 0xc1, 0x08, 0xbd, 0xfe, 0x20, 0x11, 0x56, 0xdb, 0x96, 0x0a, 0xbb, 0x0b,
0xbc, 0xd4, 0x37, 0x55, 0xf9, 0x9c, 0x6d, 0x5b, 0x87, 0x4e, 0x50, 0x9f, 0x24, 0x0e, 0x3a, 0x1a,
0x0c, 0x54, 0x67, 0xbd, 0x0f, 0x34, 0x03, 0x5e, 0x45, 0x5b, 0x93, 0x42, 0xbe, 0x71, 0xe6, 0xa7,
0xf9, 0x49, 0x1a, 0xb3, 0xb2, 0xfb, 0x0e, 0xee, 0x3d, 0xcf, 0x0c, 0x5a, 0xf8, 0xb5, 0x80, 0x42,
0x7c, 0x0c, 0x75, 0xc5, 0xe1, 0x17, 0x29, 0x39, 0x55, 0x2b, 0xb1, 0xf5, 0x72, 0x06, 0x9e, 0x54,
0x0b, 0x0e, 0xf2, 0x95, 0xc8, 0x5b, 0x69, 0xaf, 0x5b, 0x81, 0x97, 0xae, 0xb1, 0x6e, 0xc4, 0x6d,
0x95, 0xd8, 0x22, 0x1e, 0x39, 0xf0, 0x76, 0x54, 0x19, 0x96, 0x03, 0x4c, 0x25, 0x85, 0x2f, 0xe1,
0x84, 0xd7, 0xc1, 0x62, 0xe1, 0x9e, 0x9f, 0x1f, 0xd4, 0xb8, 0xf0, 0xc2, 0x68, 0x76, 0x7c, 0xcf,
0x43, 0x3e, 0x60, 0x93, 0xd0, 0x89, 0x65, 0xae, 0x72, 0xcd, 0xd6, 0x00, 0x0d, 0x91, 0x42, 0x90,
0x98, 0x02, 0xa9, 0xf6, 0x82, 0x1b, 0xb5, 0x22, 0xfd, 0xb6, 0xc2, 0x5c, 0xad, 0x86, 0x81, 0x1d,
};
#if 0
static const uint8_t nprime[256] = {
0x38, 0x62, 0xc1, 0xf5, 0x55, 0x2d, 0x3d, 0x60, 0x5e, 0x42, 0xe1, 0x65, 0xde, 0xed, 0x35, 0xd5,
0xc5, 0x85, 0xe4, 0x4e, 0xeb, 0x74, 0xa5, 0x22, 0xb3, 0xed, 0x5f, 0x5b, 0xb1, 0xb9, 0xe9, 0x0a,
0x7d, 0xa5, 0x74, 0x58, 0xf8, 0xa1, 0xab, 0x17, 0x74, 0xd0, 0x07, 0xa3, 0x7f, 0xd2, 0x9b, 0x50,
0x2a, 0xed, 0x5e, 0xdc, 0x5a, 0x69, 0xfe, 0x0e, 0xb1, 0xd8, 0x53, 0x35, 0x9b, 0xef, 0x1d, 0x76,
0x52, 0x9e, 0x87, 0x3c, 0xb0, 0x82, 0x4e, 0x03, 0xdf, 0x75, 0xed, 0x09, 0x9f, 0x3d, 0x37, 0xf6,
0xe8, 0x0d, 0xc9, 0x2e, 0x81, 0xf2, 0x9d, 0x2e, 0xaa, 0xe6, 0x53, 0x79, 0x6b, 0x99, 0xef, 0x46,
0x36, 0xd9, 0x2e, 0x9d, 0x15, 0xd1, 0x7f, 0x23, 0x14, 0xb9, 0xeb, 0x33, 0xa7, 0xd4, 0x8e, 0x86,
0x60, 0xc9, 0xd9, 0x7c, 0xca, 0x54, 0x59, 0x57, 0x94, 0x1e, 0x52, 0x4d, 0xc8, 0x3f, 0x9b, 0x24,
0x28, 0x25, 0xcb, 0x57, 0xca, 0x8f, 0x16, 0x5a, 0x37, 0xc2, 0xc6, 0xae, 0xc5, 0xe7, 0xc4, 0x2e,
0xf3, 0x24, 0x1c, 0xb7, 0xe9, 0xf5, 0x92, 0x4e, 0xd4, 0x51, 0x50, 0xff, 0xde, 0x44, 0x3c, 0xae,
0x72, 0xbd, 0x16, 0x39, 0x63, 0x8a, 0x22, 0x9c, 0x95, 0xda, 0x21, 0xf0, 0x4c, 0x12, 0x36, 0x2d,
0x00, 0xad, 0xb3, 0x89, 0xb5, 0x09, 0x9e, 0x3d, 0x24, 0x81, 0xfc, 0xef, 0x99, 0x95, 0x22, 0x9d,
0xb3, 0x94, 0x39, 0x32, 0xdd, 0xc4, 0x2b, 0x2f, 0xb0, 0x13, 0xfe, 0xb5, 0x5e, 0xc7, 0x64, 0x93,
0x7a, 0xb5, 0x81, 0x93, 0x1f, 0x9f, 0x96, 0x1e, 0x7a, 0x5c, 0x8d, 0xde, 0x8f, 0xae, 0xd9, 0xc8,
0xdd, 0x35, 0x1e, 0x17, 0x47, 0xb6, 0xab, 0xed, 0xb6, 0x82, 0x22, 0x4c, 0x62, 0xbd, 0x12, 0x4e,
0x44, 0x5c, 0x48, 0x2b, 0x75, 0x63, 0x1c, 0xde, 0xfa, 0x15, 0x0d, 0xb1, 0x50, 0x31, 0xb6, 0xcb,
};
static const uint8_t inv_r[256] = {
0x2f, 0xb7, 0xf5, 0x4a, 0xd2, 0x19, 0xde, 0x24, 0x7c, 0xdb, 0xcd, 0x52, 0x6e, 0xbc, 0x2c, 0x5c,
0x76, 0x9a, 0x36, 0xc3, 0x87, 0x33, 0xf7, 0xe9, 0x3d, 0x5b, 0x3d, 0xcd, 0x33, 0x7a, 0x3b, 0x4e,
0x55, 0xf5, 0xd9, 0x42, 0x76, 0x63, 0x28, 0x7a, 0xa8, 0x7c, 0xf7, 0xd1, 0xf6, 0x0d, 0x26, 0xba,
0xbe, 0x9f, 0x35, 0xf4, 0x86, 0xc5, 0x93, 0x4c, 0xe8, 0x76, 0xda, 0x88, 0xb8, 0xbe, 0xad, 0x25,
0x6b, 0xe7, 0x44, 0x3b, 0x1c, 0x2c, 0x99, 0x15, 0xee, 0x33, 0x46, 0xc6, 0xe0, 0xb0, 0x39, 0x6d,
0x20, 0xb2, 0x68, 0xc7, 0x75, 0x41, 0x2c, 0xff, 0xcb, 0x93, 0x1d, 0x40, 0xd2, 0x0e, 0x64, 0xea,
0x2e, 0x0a, 0x55, 0x9f, 0x04, 0x9d, 0xfd, 0x5e, 0x24, 0xa9, 0x28, 0x5c, 0x2d, 0x1b, 0x29, 0x87,
0x61, 0x6b, 0x50, 0x6a, 0x31, 0x31, 0x43, 0x12, 0x13, 0xe3, 0x1f, 0x47, 0x8a, 0x11, 0xd2, 0x5b,
0x26, 0x5e, 0x79, 0x04, 0x0b, 0xa8, 0xb0, 0x36, 0x22, 0xda, 0x3c, 0x5e, 0xb9, 0x09, 0x48, 0xb0,
0x32, 0x38, 0x25, 0xec, 0xfd, 0x5e, 0xef, 0xff, 0x80, 0x33, 0x9f, 0x94, 0x8c, 0x6e, 0x2a, 0xfb,
0xbf, 0x65, 0x18, 0x98, 0x7e, 0xff, 0x41, 0xde, 0x00, 0x2f, 0xd2, 0x7d, 0xbf, 0x4c, 0x54, 0x4e,
0x1c, 0x46, 0xd6, 0xab, 0xf6, 0x07, 0x34, 0x63, 0xe3, 0x0b, 0x81, 0xa0, 0x94, 0x7d, 0xaf, 0x7e,
0x37, 0xd6, 0xc5, 0xa6, 0x4a, 0x90, 0x6c, 0x44, 0x6a, 0xd9, 0x0f, 0x20, 0xb2, 0xef, 0x22, 0xa0,
0xdf, 0x38, 0x2d, 0x0b, 0xb3, 0x03, 0xb2, 0xc8, 0xe6, 0x8d, 0x74, 0xbf, 0x45, 0x91, 0xe0, 0x22,
0x16, 0xbf, 0xc4, 0xda, 0x54, 0x26, 0xaa, 0x65, 0x85, 0x88, 0xc3, 0xfb, 0x9f, 0xfc, 0x14, 0xc4,
0xff, 0x8b, 0x88, 0x47, 0x5f, 0xb1, 0x55, 0xdf, 0x47, 0x5c, 0xc0, 0x27, 0x39, 0x7b, 0xe8, 0xad,
};
#endif
static const uint8_t n_exp[256] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01,
};
static const uint8_t all_zero[256] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
};
uint32_t result[64];
uint8_t pka_a_eq_0 = 0;
(void) count;
Sec_Eng_PKA_Reset();
Sec_Eng_PKA_BigEndian_Enable();
Sec_Eng_PKA_Write_Data(SEC_ENG_PKA_REG_SIZE_256, 1, (uint32_t*)n, 64, 0);
Sec_Eng_PKA_CREG(SEC_ENG_PKA_REG_SIZE_256, 2, 0, 0);
Sec_Eng_PKA_CREG(SEC_ENG_PKA_REG_SIZE_256, 3, 0, 1);
Sec_Eng_PKA_Write_Data(SEC_ENG_PKA_REG_SIZE_256, 0, (uint32_t*)n_exp, 64, 0);
Sec_Eng_PKA_LMUL2N(
SEC_ENG_PKA_REG_SIZE_512, 1,
SEC_ENG_PKA_REG_SIZE_256, 0,
2048,
0
);
Sec_Eng_PKA_LDIV(
SEC_ENG_PKA_REG_SIZE_256, 0,
SEC_ENG_PKA_REG_SIZE_512, 1,
SEC_ENG_PKA_REG_SIZE_256, 1,
0
);
Sec_Eng_PKA_MREM(
SEC_ENG_PKA_REG_SIZE_256, 4,
SEC_ENG_PKA_REG_SIZE_512, 1,
SEC_ENG_PKA_REG_SIZE_256, 1,
0
);
Sec_Eng_PKA_CREG(SEC_ENG_PKA_REG_SIZE_512, 1, 0, 1);
Sec_Eng_PKA_Move_Data(
SEC_ENG_PKA_REG_SIZE_256, 2,
SEC_ENG_PKA_REG_SIZE_256, 1,
0
);
Sec_Eng_PKA_Move_Data(
SEC_ENG_PKA_REG_SIZE_256, 1,
SEC_ENG_PKA_REG_SIZE_256, 4,
1
);
Sec_Eng_PKA_Write_Data(SEC_ENG_PKA_REG_SIZE_256, 4, (uint32_t*)all_zero, 64, 0);
Sec_Eng_PKA_Write_Data(SEC_ENG_PKA_REG_SIZE_256, 5, (uint32_t*)n_exp, 64, 0);
Sec_Eng_PKA_Write_Data(SEC_ENG_PKA_REG_SIZE_256, 6, (uint32_t*)n_exp, 64, 0);
Sec_Eng_PKA_Write_Data(SEC_ENG_PKA_REG_SIZE_256, 7, (uint32_t*)all_zero, 64, 0);
Sec_Eng_PKA_LMUL(
SEC_ENG_PKA_REG_SIZE_256, 8,
SEC_ENG_PKA_REG_SIZE_256, 0,
SEC_ENG_PKA_REG_SIZE_256, 5,
0
);
Sec_Eng_PKA_LSUB(
SEC_ENG_PKA_REG_SIZE_256, 8,
SEC_ENG_PKA_REG_SIZE_256, 4,
SEC_ENG_PKA_REG_SIZE_256, 8,
0
);
Sec_Eng_PKA_LMUL(
SEC_ENG_PKA_REG_SIZE_256, 9,
SEC_ENG_PKA_REG_SIZE_256, 0,
SEC_ENG_PKA_REG_SIZE_256, 7,
0
);
Sec_Eng_PKA_LSUB(
SEC_ENG_PKA_REG_SIZE_256, 9,
SEC_ENG_PKA_REG_SIZE_256, 6,
SEC_ENG_PKA_REG_SIZE_256, 9,
0
);
Sec_Eng_PKA_Move_Data(
SEC_ENG_PKA_REG_SIZE_256, 4,
SEC_ENG_PKA_REG_SIZE_256, 5,
0
);
Sec_Eng_PKA_Move_Data(
SEC_ENG_PKA_REG_SIZE_256, 5,
SEC_ENG_PKA_REG_SIZE_256, 8,
0
);
Sec_Eng_PKA_Move_Data(
SEC_ENG_PKA_REG_SIZE_256, 6,
SEC_ENG_PKA_REG_SIZE_256, 7,
0
);
Sec_Eng_PKA_Move_Data(
SEC_ENG_PKA_REG_SIZE_256, 7,
SEC_ENG_PKA_REG_SIZE_256, 9,
1
);
#if 0
printf("Dumping Step count %d\r\n", count++);
dump_xgcd_step(result);
#endif
while (!pka_a_eq_0) {
Sec_Eng_PKA_LDIV(
SEC_ENG_PKA_REG_SIZE_256, 0,
SEC_ENG_PKA_REG_SIZE_256, 2,
SEC_ENG_PKA_REG_SIZE_256, 1,
0
);
Sec_Eng_PKA_MREM(
SEC_ENG_PKA_REG_SIZE_256, 3,
SEC_ENG_PKA_REG_SIZE_256, 2,
SEC_ENG_PKA_REG_SIZE_256, 1,
0
);
Sec_Eng_PKA_LMUL(
SEC_ENG_PKA_REG_SIZE_256, 8,
SEC_ENG_PKA_REG_SIZE_256, 0,
SEC_ENG_PKA_REG_SIZE_256, 5,
0
);
Sec_Eng_PKA_LSUB(
SEC_ENG_PKA_REG_SIZE_256, 8,
SEC_ENG_PKA_REG_SIZE_256, 4,
SEC_ENG_PKA_REG_SIZE_256, 8,
0
);
Sec_Eng_PKA_LMUL(
SEC_ENG_PKA_REG_SIZE_256, 9,
SEC_ENG_PKA_REG_SIZE_256, 0,
SEC_ENG_PKA_REG_SIZE_256, 7,
0
);
Sec_Eng_PKA_LSUB(
SEC_ENG_PKA_REG_SIZE_256, 9,
SEC_ENG_PKA_REG_SIZE_256, 6,
SEC_ENG_PKA_REG_SIZE_256, 9,
0
);
Sec_Eng_PKA_Move_Data(
SEC_ENG_PKA_REG_SIZE_256, 2,
SEC_ENG_PKA_REG_SIZE_256, 1,
0
);
Sec_Eng_PKA_Move_Data(
SEC_ENG_PKA_REG_SIZE_256, 4,
SEC_ENG_PKA_REG_SIZE_256, 5,
0
);
Sec_Eng_PKA_Move_Data(
SEC_ENG_PKA_REG_SIZE_256, 5,
SEC_ENG_PKA_REG_SIZE_256, 8,
0
);
Sec_Eng_PKA_Move_Data(
SEC_ENG_PKA_REG_SIZE_256, 6,
SEC_ENG_PKA_REG_SIZE_256, 7,
0
);
Sec_Eng_PKA_Move_Data(
SEC_ENG_PKA_REG_SIZE_256, 7,
SEC_ENG_PKA_REG_SIZE_256, 9,
1
);
Sec_Eng_PKA_Move_Data(
SEC_ENG_PKA_REG_SIZE_256, 1,
SEC_ENG_PKA_REG_SIZE_256, 3,
1
);
Sec_Eng_PKA_Write_Data(SEC_ENG_PKA_REG_SIZE_256, 10, (uint32_t*)n_exp, 64, 0);
Sec_Eng_PKA_LCMP(
&pka_a_eq_0,
SEC_ENG_PKA_REG_SIZE_256, 1,
SEC_ENG_PKA_REG_SIZE_256, 10
);
#if 0
printf("Dumping Step count %d\r\n", count++);
dump_xgcd_step(result);
#endif
}
Sec_Eng_PKA_Read_Data(
SEC_ENG_PKA_REG_SIZE_256, 6,
result,
64
);
_dump_rsa_data((uint8_t*)result, sizeof(result));
//RSA_Compare_Data(encrypted, (uint8_t*)result, sizeof(result));
}
int bl_pka_test(void)
{
bl_irq_register(SEC_PKA_IRQn, bl_sec_pka_IRQHandler);
bl_irq_enable(SEC_PKA_IRQn);
_pka_test_case2();
_pka_test_case_xgcd();
_pka_test_case2();
return 0;
}
void bl_sec_pka_IRQHandler(void)
{
puts("--->>> PKA IRQ\r\n");
SEC_Eng_IntMask(SEC_ENG_INT_PKA, MASK);
}
|
mkroman/bl602-604
|
components/hal_drv/bl602_hal/bl_gpio.c
|
<gh_stars>0
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdint.h>
#include <bl602_glb.h>
#include <bl602_gpio.h>
#include "bl_gpio.h"
#define GPIO_FUNC_NUM_IN_BL602 (GPIO0_FUN_SWGPIO_0)
int bl_gpio_enable_output(uint8_t pin, uint8_t pullup, uint8_t pulldown)
{
GLB_GPIO_Cfg_Type cfg;
cfg.drive=0;
cfg.smtCtrl=1;
cfg.gpioPin = pin;
cfg.gpioFun = GPIO_FUNC_NUM_IN_BL602;//all the function number of GPIO is the same, we use def from GPIO0 here
cfg.gpioMode = GPIO_MODE_OUTPUT;
cfg.pullType = GPIO_PULL_NONE;
if (pullup) {
cfg.pullType = GPIO_PULL_UP;
}
if (pulldown) {
cfg.pullType = GPIO_PULL_DOWN;
}
GLB_GPIO_Init(&cfg);
return 0;
}
int bl_gpio_enable_input(uint8_t pin, uint8_t pullup, uint8_t pulldown)
{
GLB_GPIO_Cfg_Type cfg;
cfg.drive=0;
cfg.smtCtrl=1;
cfg.gpioPin = pin;
cfg.gpioFun = GPIO_FUNC_NUM_IN_BL602;//all the function number of GPIO is the same, we use def from GPIO0 here
cfg.gpioMode = GPIO_MODE_INPUT;
cfg.pullType = GPIO_PULL_NONE;
if (pullup) {
cfg.pullType = GPIO_PULL_UP;
}
if (pulldown) {
cfg.pullType = GPIO_PULL_DOWN;
}
GLB_GPIO_Init(&cfg);
return 0;
}
int bl_gpio_output_set(uint8_t pin, uint8_t value)
{
GLB_GPIO_Write((GLB_GPIO_Type)pin, value ? 1 : 0);
return 0;
}
int bl_gpio_input_get(uint8_t pin, uint8_t *value)
{
*value = GLB_GPIO_Read((GLB_GPIO_Type)pin);
return 0;
}
int bl_gpio_input_get_value(uint8_t pin)
{
return GLB_GPIO_Read((GLB_GPIO_Type)pin);
}
|
mkroman/bl602-604
|
components/bl602/bl602_wifi/plf/refip/src/driver/phy/bl602_phy_rf/rf/Src/bl602_rf_private.c
|
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
//#define RF_IN_SDK
#ifndef RF_IN_SDK
#include "bl602_rf_private.h"
#include "bl602_rf_calib_data.h"
#include "rf_reg.h"
#include "pds_reg.h"
#include "aon_reg.h"
#include "hbn_reg.h"
#include "bl602_common.h"
#include "bflb_platform.h"
// #define rf_pri_printf MSG
#else
#include <stdio.h>
#include "bl602_rf_private.h"
#include "bl602_common.h"
#include "bl602_rf_calib_data.h"
// #include "bl602_rf.h"
#include "rf_reg.h"
#include "bl602_pds.h"
#include "bl602_aon.h"
#include "bl602_hbn.h"
#include "bl602.h"
// #define rf_pri_printf printf
#undef MSG
#define MSG printf
#endif
#ifndef RF_DBG_LOG_DISABLE
#define rf_pri_printf MSG
#define rf_pri_printw MSG
#define rf_pri_printe MSG
#else
#define rf_pri_printf (...)
#define rf_pri_printw MSG
#define rf_pri_printe MSG
#endif
/** @addtogroup BL602_Peripheral_Driver
* @{
*/
/** @addtogroup RF_PRIVATE
* @{
*/
/** @defgroup RF_PRIVATE_Private_Macros
* @{
*/
#define BL602_DBG_RF (0)
#define CNT_TIMES (40)
#define NUM_CHANNELS (21)
#define NUM_WIFI_CHANNELS (14)
#define XTAL24M (0)
#define XTAL26M (0)
#define XTAL32M (0)
#define XTAL38P4M (0)
#define XTAL40M (1)
#define XTAL52M (0)
#define xtalType (0)
/*@} end of group RF_PRIVATE_Private_Macros */
/** @defgroup RF_PRIVATE_Private_Types
* @{
*/
/*@} end of group RF_PRIVATE_Private_Types */
/** @defgroup RF_PRIVATE_Private_Variables
* @{
*/
static uint32_t state_rf_fsm_ctrl_hw;
static uint32_t state_rfctrl_hw_en;
static uint32_t state_rfcal_ctrlen;
static uint32_t state_pucr1;
static uint32_t state_fbdv;
static uint32_t state_sdm1;
static uint32_t state_sdm2;
static uint32_t state_rbb3;
static uint32_t state_adda1;
static uint32_t state_dfe_ctrl_0;
static uint32_t state_dfe_ctrl_3;
static uint32_t state_dfe_ctrl_6;
static uint32_t state_dfe_ctrl_7;
static uint32_t state_trx_gain1;
static uint32_t state_singen_ctrl0;
static uint32_t state_singen_ctrl2;
static uint32_t state_singen_ctrl3;
static uint32_t state_sram_ctrl0;
static uint32_t state_sram_ctrl1;
static uint32_t state_sram_ctrl2;
static uint32_t state_rf_resv_reg_1;
static uint32_t state_pa1;
static uint32_t state_ten_ac;
static uint32_t state_rfif_dfe_ctrl0;
static uint32_t state_tbb;
static uint32_t state_vco2;
static uint32_t init_fast=0;
static uint32_t channel_div_table[E_RF_CHANNEL_NUM] = {
#if XTAL38P4M
0x14F00000 , /* Channel 2412 MHz */
0x14FB1C71 , /* Channel 2417 MHz */
0x150638E3 , /* Channel 2422 MHz */
0x15115555 , /* Channel 2427 MHz */
0x151C71C7 , /* Channel 2432 MHz */
0x15278E38 , /* Channel 2437 MHz */
0x1532AAAA , /* Channel 2442 MHz */
0x153DC71C , /* Channel 2447 MHz */
0x1548E38E , /* Channel 2452 MHz */
0x15540000 , /* Channel 2457 MHz */
0x155F1C71 , /* Channel 2462 MHz */
0x156A38E3 , /* Channel 2467 MHz */
0x15755555 , /* Channel 2472 MHz */
0x15900000 , /* Channel 2484 MHz */
0x15C00000 , /* Channel 2505.6 MHz */
#endif
#if XTAL24M
0x21800000 , /* Channel 2412 MHz */
0x2191C71C , /* Channel 2417 MHz */
0x21A38E38 , /* Channel 2422 MHz */
0x21B55555 , /* Channel 2427 MHz */
0x21C71C71 , /* Channel 2432 MHz */
0x21D8E38E , /* Channel 2437 MHz */
0x21EAAAAA , /* Channel 2442 MHz */
0x21FC71C7 , /* Channel 2447 MHz */
0x220E38E3 , /* Channel 2452 MHz */
0x22200000 , /* Channel 2457 MHz */
0x2231C71C , /* Channel 2462 MHz */
0x22438E38 , /* Channel 2467 MHz */
0x22555555 , /* Channel 2472 MHz */
0x22800000 , /* Channel 2484 MHz */
0x22CCCCCC , /* Channel 2505.6 MHz */
#endif
#if XTAL26M
0x1EEC4EC4 , /* Channel 2412 MHz */
0x1EFCB7CB , /* Channel 2417 MHz */
0x1F0D20D2 , /* Channel 2422 MHz */
0x1F1D89D8 , /* Channel 2427 MHz */
0x1F2DF2DF , /* Channel 2432 MHz */
0x1F3E5BE5 , /* Channel 2437 MHz */
0x1F4EC4EC , /* Channel 2442 MHz */
0x1F5F2DF2 , /* Channel 2447 MHz */
0x1F6F96F9 , /* Channel 2452 MHz */
0x1F800000 , /* Channel 2457 MHz */
0x1F906906 , /* Channel 2462 MHz */
0x1FA0D20D , /* Channel 2467 MHz */
0x1FB13B13 , /* Channel 2472 MHz */
0x1FD89D89 , /* Channel 2484 MHz */
0x201F81F8 , /* Channel 2505.6 MHz */
#endif
#if XTAL32M
0x19200000 , /* Channel 2412 MHz */
0x192D5555 , /* Channel 2417 MHz */
0x193AAAAA , /* Channel 2422 MHz */
0x19480000 , /* Channel 2427 MHz */
0x19555555 , /* Channel 2432 MHz */
0x1962AAAA , /* Channel 2437 MHz */
0x19700000 , /* Channel 2442 MHz */
0x197D5555 , /* Channel 2447 MHz */
0x198AAAAA , /* Channel 2452 MHz */
0x19980000 , /* Channel 2457 MHz */
0x19A55555 , /* Channel 2462 MHz */
0x19B2AAAA , /* Channel 2467 MHz */
0x19C00000 , /* Channel 2472 MHz */
0x19E00000 , /* Channel 2484 MHz */
0x1A199999 , /* Channel 2505.6 MHz */
#endif
#if XTAL40M
// 0x14199999 , /* Channel 2412 MHz */
// 0x14244444 , /* Channel 2417 MHz */
// 0x142EEEEE , /* Channel 2422 MHz */
// 0x14399999 , /* Channel 2427 MHz */
// 0x14444444 , /* Channel 2432 MHz */
// 0x144EEEEE , /* Channel 2437 MHz */
// 0x14599999 , /* Channel 2442 MHz */
// 0x14644444 , /* Channel 2447 MHz */
// 0x146EEEEE , /* Channel 2452 MHz */
// 0x14799999 , /* Channel 2457 MHz */
// 0x14844444 , /* Channel 2462 MHz */
// 0x148EEEEE , /* Channel 2467 MHz */
// 0x14999999 , /* Channel 2472 MHz */
// 0x14B33333 , /* Channel 2484 MHz */
// 0x14E147AE , /* Channel 2505.6 MHz */
0x14088889,
0x14111111,
0x1419999A,
0x14222222,
0x142AAAAB,
0x14333333,
0x143BBBBC,
0x14444444,
0x144CCCCD,
0x14555555,
0x145DDDDE,
0x14666666,
0x146EEEEF,
0x14777777,
0x14800000,
0x14888889,
0x14911111,
0x1499999A,
0x14A22222,
0x14AAAAAB,
0x14B33333,
#endif
#if XTAL52M
0xF762762 , /* Channel 2412 MHz */
0xF7E5BE5 , /* Channel 2417 MHz */
0xF869069 , /* Channel 2422 MHz */
0xF8EC4EC , /* Channel 2427 MHz */
0xF96F96F , /* Channel 2432 MHz */
0xF9F2DF2 , /* Channel 2437 MHz */
0xFA76276 , /* Channel 2442 MHz */
0xFAF96F9 , /* Channel 2447 MHz */
0xFB7CB7C , /* Channel 2452 MHz */
0xFC00000 , /* Channel 2457 MHz */
0xFC83483 , /* Channel 2462 MHz */
0xFD06906 , /* Channel 2467 MHz */
0xFD89D89 , /* Channel 2472 MHz */
0xFEC4EC4 , /* Channel 2484 MHz */
0x100FC0FC , /* Channel 2505.6 MHz */
#endif
};
static uint16_t channel_cnt_table[E_RF_CHANNEL_NUM] = {
#if XTAL38P4M
0xa780, //2412MHz
0xa7d8, //2417MHz
0xa831, //2422MHz
0xa88a, //2427MHz
0xa8e3, //2432MHz
0xa93c, //2437MHz
0xa995, //2442MHz
0xa9ee, //2447MHz
0xaa47, //2452MHz
0xaaa0, //2457MHz
0xaaf8, //2462MHz
0xab51, //2467MHz
0xabaa, //2472MHz
0xac80 //2484MHz
#endif
#if XTAL24M
0xa780, //2412MHz
0xa7d8, //2417MHz
0xa831, //2422MHz
0xa88a, //2427MHz
0xa8e3, //2432MHz
0xa93c, //2437MHz
0xa995, //2442MHz
0xa9ee, //2447MHz
0xaa47, //2452MHz
0xaaa0, //2457MHz
0xaaf8, //2462MHz
0xab51, //2467MHz
0xabaa, //2472MHz
0xac80 //2484MHz
#endif
#if XTAL26M
0xa78a, //2412MHz
0xa7e3, //2417MHz
0xa83c, //2422MHz
0xa895, //2427MHz
0xa8ed, //2432MHz
0xa946, //2437MHz
0xa99f, //2442MHz
0xa9f8, //2447MHz
0xaa51, //2452MHz
0xaaaa, //2457MHz
0xab03, //2462MHz
0xab5c, //2467MHz
0xabb5, //2472MHz
0xac8a //2484MHz
#endif
#if XTAL32M
0xa788, //2412MHz
0xa7e1, //2417MHz
0xa83a, //2422MHz
0xa893, //2427MHz
0xa8ec, //2432MHz
0xa944, //2437MHz
0xa99d, //2442MHz
0xa9f6, //2447MHz
0xaa4f, //2452MHz
0xaaa8, //2457MHz
0xab01, //2462MHz
0xab5a, //2467MHz
0xabb3, //2472MHz
0xac88 //2484MHz
#endif
#if XTAL40M
// 0xA779, //2412MHz
// 0xA7D2, //2417MHz
// 0xA82B, //2422MHz
// 0xA883, //2427MHz
// 0xA8DC, //2432MHz
// 0xA935, //2437MHz
// 0xA98E, //2442MHz
// 0xA9E7, //2447MHz
// 0xAA40, //2452MHz
// 0xAA99, //2457MHz
// 0xAAF2, //2462MHz
// 0xAB4A, //2467MHz
// 0xABA3, //2472MHz
// 0xAC79 //2484MHz
0xA6EB,//2404
0xA732,//2408
0xA779,//2412
0xA7C0,
0xA808,
0xA84F,
0xA896,
0xA8DD,
0xA924,
0xA96B,
0xA9B2,
0xA9F9,
0xAA40,
0xAA87,
0xAACF,
0xAB16,
0xAB5D,
0xABA4,
0xABEB,
0xAC32,
0xAC79
#endif
#if XTAL52M
0xA77A, //2412MHz
0xA7D3, //2417MHz
0xA82C, //2422MHz
0xA885, //2427MHz
0xA8DE, //2432MHz
0xA937, //2437MHz
0xA990, //2442MHz
0xA9E8, //2447MHz
0xAA41, //2452MHz
0xAA9A, //2457MHz
0xAAF3, //2462MHz
0xAB4C, //2467MHz
0xABA5, //2472MHz
0xAC7A //2484MHz
#endif
};
static uint16_t channel_cnt_range[3] = {
#if XTAL40M
0xa6a0,
0xa6e0,
0xace0,
#endif
};
static uint16_t fcal_div = 0x855;
static int32_t rx_notch_para_40M[NUM_WIFI_CHANNELS][2] = {
{0,0*1000*1000}, //2412MHz
{0,0*1000*1000}, //2417MHz
{0,0*1000*1000}, //2422MHz
{0,0*1000*1000}, //2427MHz
{1,8*1000*1000}, //2432MHz
{1,3*1000*1000}, //2437MHz
{1,-2*1000*1000}, //2442MHz
{1,-7*1000*1000}, //2447MHz
{0,0*1000*1000}, //2452MHz
{0,0*1000*1000}, //2457MHz
{0,0*1000*1000}, //2462MHz
{0,0*1000*1000}, //2467MHz
{1,8*1000*1000}, //2472MHz
{1,-4*1000*1000} //2484MHz
};
static tx_pwr_index data;
tx_pwr_index* tp_index = &data;
static int32_t tx_pwr_table[E_RF_TXPWR_TBL_CNT][7] = {
{0,1,7,0x14,32,4,233},
{0,1,7,0x14,32,0,223},
{0,1,7,0xe,32,4,212},
{0,1,7,0xe,32,0,202},
{0,1,7,0xa,32,4+1,188+3},
{0,1,7,0xa,32,0+1,178+3},
{0,1,7,8,32,4-1,173-3},
{0,1,7,8,32,0-1,163-3},
{0,1,7,6,32,4-1,153-3},
{0,1,7,6,32,0-1,143-3},
{0,1,6,5,32,4+1,129+3},
{0,1,6,5,32,0+1,119+3},
{0,1,6,4,32,4-1,114-3},
{0,1,6,4,32,0-1,104-3},
{0,1,5,4,32,0,91},
{0,1,5,4,32,-4,81},
};
static int32_t tx_pwr_os=0; // channel offset
static int32_t tx_pwr_os_temperature = 0; // temperature offset
static int32_t tx_pwr_ch_os[NUM_WIFI_CHANNELS] = {
// 13, //2412MHz
// 15, //2417MHz
// 16, //2422MHz
// 18, //2427MHz
// 21, //2432MHz
// 23, //2437MHz
// 0, //2442MHz
// 0, //2447MHz
// 5, //2452MHz
// 7, //2457MHz
// 9, //2462MHz
// 11, //2467MHz
// 14, //2472MHz
// 18 //2484MHz
-16, //2412MHz
-13, //2417MHz
-10, //2422MHz
-8, //2427MHz
-5, //2432MHz
-2, //2437MHz
0, //2442MHz
2, //2447MHz
5, //2452MHz
7, //2457MHz
9, //2462MHz
11, //2467MHz
14, //2472MHz
18 //2484MHz
};
static uint32_t txcal_para[E_RF_TXCAL_GAIN_CNT][4] = {
// {0,1,7,7,0,2,1,0},
// {0,1,7,7,0,2,2,0},
// {0,1,7,7,0,2,0,0x40},
// {0,1,7,7,0,2,0,0x100},
//
// {0,1,7,0xd,0,2,14,0x100},
// {0,1,7,0xb,0,2,9,0x100},
// {0,1,7,9,0,2,5,0x100},
// {0,1,7,8,0,2,4,0x100},
// {0,1,7,7,0,2,3,0x100},
// {0,1,7,6,0,2,1,0x100},
// {0,1,7,5,0,2,0,0x100},
// {0,1,7,4,0,2,0,0x130},
//
// {0,2,0,0x110},
// {0,4,0,0xf0},
// {0,4,0,0x130},
// {0,4,0,0x160},
// {0,4,0,0x1a0},
// {0,4,0,0x1a0},
// {0,4,0,0x200},
// {0,4,0,0x200},
//
{0,2,6,0x100},
{0,2,1,0x100},
{0,2,0,0x130},
{0,4,0,0xf0},
{0,4,0,0x130},
{0,4,0,0x160},
{0,4,0,0x1a0},
{0,4,0,0x1a0},
};
static uint16_t channel_cw_table[NUM_CHANNELS];
static uint16_t channel_cnt_opt_table[CNT_TIMES];
/*@} end of group RF_PRIVATE_Private_Variables */
/** @defgroup RF_PRIVATE_Global_Variables
* @{
*/
/*@} end of group RF_PRIVATE_Global_Variables */
/** @defgroup RF_PRIVATE_Private_Fun_Declaration
* @{
*/
/*@} end of group RF_PRIVATE_Private_Fun_Declaration */
/** @defgroup RF_PRIVATE_Private_Functions
* @{
*/
/*@} end of group RF_PRIVATE_Private_Functions */
/** @defgroup RF_PRIVATE_Public_Functions
* @{
*/
// uint32_t rf_pri_channel_freq_to_index(uint32_t freq)
// {
// if (freq == 2412) return E_RF_CHANNEL_2412M;
// if (freq == 2417) return E_RF_CHANNEL_2417M;
// if (freq == 2422) return E_RF_CHANNEL_2422M;
// if (freq == 2427) return E_RF_CHANNEL_2427M;
// if (freq == 2432) return E_RF_CHANNEL_2432M;
// if (freq == 2437) return E_RF_CHANNEL_2437M;
// if (freq == 2442) return E_RF_CHANNEL_2442M;
// if (freq == 2447) return E_RF_CHANNEL_2447M;
// if (freq == 2452) return E_RF_CHANNEL_2452M;
// if (freq == 2457) return E_RF_CHANNEL_2457M;
// if (freq == 2462) return E_RF_CHANNEL_2462M;
// if (freq == 2467) return E_RF_CHANNEL_2467M;
// if (freq == 2472) return E_RF_CHANNEL_2472M;
// if (freq == 2484) return E_RF_CHANNEL_2484M;
// if (freq == 2505) return E_RF_CHANNEL_2505P6M;
// return E_RF_CHANNEL_2412M;
// }
static void rf_pri_wait_us(uint32_t us)
{
BL602_Delay_US(us);
}
static void rf_pri_wait_ms(uint32_t ms)
{
BL602_Delay_MS(ms);
}
static void rf_pri_set_gain_table_regs(){
uint32_t tmpVal = 0;
tmpVal=BL_RD_REG(RF_BASE,RF_TBB_GAIN_INDEX1);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_GAIN_CTRL0_GC_TBB,tx_pwr_table[14][3]);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_GAIN_CTRL0_GC_TMX,tx_pwr_table[14][2]);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_GAIN_CTRL0_DAC_BIAS_SEL,tx_pwr_table[14][1]);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_GAIN_CTRL0_GC_TBB_BOOST,tx_pwr_table[14][0]);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_GAIN_CTRL1_GC_TBB,tx_pwr_table[12][3]);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_GAIN_CTRL1_GC_TMX,tx_pwr_table[12][2]);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_GAIN_CTRL1_DAC_BIAS_SEL,tx_pwr_table[12][1]);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_GAIN_CTRL1_GC_TBB_BOOST,tx_pwr_table[12][0]);
BL_WR_REG(RF_BASE,RF_TBB_GAIN_INDEX1,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_TBB_GAIN_INDEX2);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_GAIN_CTRL2_GC_TBB,tx_pwr_table[10][3]);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_GAIN_CTRL2_GC_TMX,tx_pwr_table[10][2]);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_GAIN_CTRL2_DAC_BIAS_SEL,tx_pwr_table[10][1]);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_GAIN_CTRL2_GC_TBB_BOOST,tx_pwr_table[10][0]);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_GAIN_CTRL3_GC_TBB,tx_pwr_table[8][3]);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_GAIN_CTRL3_GC_TMX,tx_pwr_table[8][2]);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_GAIN_CTRL3_DAC_BIAS_SEL,tx_pwr_table[8][1]);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_GAIN_CTRL3_GC_TBB_BOOST,tx_pwr_table[8][0]);
BL_WR_REG(RF_BASE,RF_TBB_GAIN_INDEX2,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_TBB_GAIN_INDEX3);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_GAIN_CTRL4_GC_TBB,tx_pwr_table[6][3]);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_GAIN_CTRL4_GC_TMX,tx_pwr_table[6][2]);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_GAIN_CTRL4_DAC_BIAS_SEL,tx_pwr_table[6][1]);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_GAIN_CTRL4_GC_TBB_BOOST,tx_pwr_table[6][0]);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_GAIN_CTRL5_GC_TBB,tx_pwr_table[4][3]);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_GAIN_CTRL5_GC_TMX,tx_pwr_table[4][2]);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_GAIN_CTRL5_DAC_BIAS_SEL,tx_pwr_table[4][1]);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_GAIN_CTRL5_GC_TBB_BOOST,tx_pwr_table[4][0]);
BL_WR_REG(RF_BASE,RF_TBB_GAIN_INDEX3,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_TBB_GAIN_INDEX4);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_GAIN_CTRL6_GC_TBB,tx_pwr_table[2][3]);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_GAIN_CTRL6_GC_TMX,tx_pwr_table[2][2]);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_GAIN_CTRL6_DAC_BIAS_SEL,tx_pwr_table[2][1]);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_GAIN_CTRL6_GC_TBB_BOOST,tx_pwr_table[2][0]);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_GAIN_CTRL7_GC_TBB,tx_pwr_table[0][3]);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_GAIN_CTRL7_GC_TMX,tx_pwr_table[0][2]);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_GAIN_CTRL7_DAC_BIAS_SEL,tx_pwr_table[0][1]);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_GAIN_CTRL7_GC_TBB_BOOST,tx_pwr_table[0][0]);
BL_WR_REG(RF_BASE,RF_TBB_GAIN_INDEX4,tmpVal);
}
static void rf_pri_fixed_val_regs(){
uint32_t tmpVal = 0;
tmpVal=BL_RD_REG(AON_BASE,AON_DCDC18_TOP_0);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,AON_DCDC18_VPFM_AON,0x3);
BL_WR_REG(AON_BASE,AON_DCDC18_TOP_0,tmpVal);
tmpVal=BL_RD_REG(HBN_BASE,HBN_GLB);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,HBN_SW_LDO11_RT_VOUT_SEL,0x8);
BL_WR_REG(HBN_BASE,HBN_GLB,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_PUCR1);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_PU_SFREG);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_PU_ADDA_LDO);
BL_WR_REG(RF_BASE,RF_PUCR1,tmpVal);
tmpVal=BL_RD_REG(AON_BASE,AON_XTAL_CFG);
tmpVal=BL_SET_REG_BIT(tmpVal,AON_XTAL_CAPCODE_EXTRA_AON);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,AON_XTAL_CAPCODE_IN_AON,50);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,AON_XTAL_CAPCODE_OUT_AON,50);
BL_WR_REG(AON_BASE,AON_XTAL_CFG,tmpVal);
if(!init_fast){
rf_pri_wait_ms(10);
}
tmpVal=BL_RD_REG(RF_BASE,RF_PA1);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_PA_VBCAS,4);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_PA_VBCORE,0xa);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_PA_IET,3);//5);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_PA_IAQ,2);
BL_WR_REG(RF_BASE,RF_PA1,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_PA_REG_CTRL_HW1);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_PA_VBCAS_11N,4);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_PA_VBCORE_11N,0xa);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_PA_IET_11N,3);//5);
BL_WR_REG(RF_BASE,RF_PA_REG_CTRL_HW1,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_PA_REG_CTRL_HW2);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_PA_VBCAS_11G,4);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_PA_VBCORE_11G,0xa);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_PA_IET_11G,3);//5);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_PA_VBCAS_11B,4);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_PA_VBCORE_11B,0xa);//0xf);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_PA_IET_11B,3);//7);
BL_WR_REG(RF_BASE,RF_PA_REG_CTRL_HW2,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_ADDA2);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_ADC_GT_RM);
BL_WR_REG(RF_BASE,RF_ADDA2,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_FBDV);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_LO_FBDV_HALFSTEP_EN);
BL_WR_REG(RF_BASE,RF_FBDV,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_LO_REG_CTRL_HW1);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_LO_FBDV_HALFSTEP_EN_TX);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_LO_FBDV_HALFSTEP_EN_RX);
BL_WR_REG(RF_BASE,RF_LO_REG_CTRL_HW1,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_LO_REG_CTRL_HW1);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_LO_LF_RZ_TX,0);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_LO_LF_CZ_TX,3);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_LO_CP_SEL_TX,0);
BL_WR_REG(RF_BASE,RF_LO_REG_CTRL_HW1,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_PA_REG_WIFI_CTRL_HW);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_PA_HALF_ON_WIFI,0);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_PA_IB_FIX_WIFI,0);
BL_WR_REG(RF_BASE,RF_PA_REG_WIFI_CTRL_HW,tmpVal);
}
void rf_pri_full_cal(void);
void rf_pri_init(uint8_t reset)
{
uint32_t tmpVal = 0;
if(init_fast){
return;
}
rf_pri_fixed_val_regs();
rf_pri_set_gain_table_regs();
tmpVal=BL_RD_REG(PDS_BASE,PDS_CLKPLL_TOP_CTRL);
tmpVal=BL_SET_REG_BIT(tmpVal,PDS_CLKPLL_REFCLK_SEL);
BL_WR_REG(PDS_BASE,PDS_CLKPLL_TOP_CTRL,tmpVal);
tmpVal=BL_RD_REG(PDS_BASE,PDS_CLKPLL_OUTPUT_EN);
tmpVal=BL_SET_REG_BIT(tmpVal,PDS_CLKPLL_EN_48M);
tmpVal=BL_SET_REG_BIT(tmpVal,PDS_CLKPLL_EN_80M);
tmpVal=BL_SET_REG_BIT(tmpVal,PDS_CLKPLL_EN_96M);
tmpVal=BL_SET_REG_BIT(tmpVal,PDS_CLKPLL_EN_120M);
tmpVal=BL_SET_REG_BIT(tmpVal,PDS_CLKPLL_EN_160M);
tmpVal=BL_SET_REG_BIT(tmpVal,PDS_CLKPLL_EN_192M);
tmpVal=BL_SET_REG_BIT(tmpVal,PDS_CLKPLL_EN_240M);
tmpVal=BL_SET_REG_BIT(tmpVal,PDS_CLKPLL_EN_480M);
BL_WR_REG(PDS_BASE,PDS_CLKPLL_OUTPUT_EN,tmpVal);
rf_pri_init_calib_mem();
// rf_pri_full_cal();
// rf_pri_config_bandwidth(E_RF_BW_20M);
// set OR TBD
// run calibration (skip if restored from sleep)
if (rf_calib_data->inited && !reset) {
// TBD: set calib registers
}
else {
rf_pri_full_cal();
rf_calib_data->inited = 1;
}
}
void rf_pri_init_fast(uint32_t flag)
{
init_fast = flag;
}
#ifdef RF_IN_SDK
void rf_pri_get_notch_param(uint32_t chanfreq_MHz,uint8_t *ncf_on, int32_t *ncf_freq_Hz)
{
uint32_t channel_idx;
if(chanfreq_MHz > 2472){
channel_idx = 13;
}else{
channel_idx = (chanfreq_MHz-2412)/5;
}
*ncf_on = rx_notch_para_40M[channel_idx][0];
*ncf_freq_Hz = rx_notch_para_40M[channel_idx][1];
}
#else
void rf_pri_notch_param(uint32_t chanfreq_MHz)
{
uint32_t channel_idx;
if(chanfreq_MHz > 2472){
channel_idx = 13;
}else{
channel_idx = (chanfreq_MHz-2412)/5;
}
notch_p->notch_en = rx_notch_para_40M[channel_idx][0];
notch_p->spur_freq = rx_notch_para_40M[channel_idx][1];
}
#endif
void rf_pri_update_param(uint32_t chanfreq_MHz)
{
uint32_t tmpVal = 0;
if(chanfreq_MHz <= 2437){
tmpVal=BL_RD_REG(RF_BASE,RF_TMX);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TMX_CS,rf_calib_data->cal.tmx_csl);
BL_WR_REG(RF_BASE,RF_TMX,tmpVal);
}else{
tmpVal=BL_RD_REG(RF_BASE,RF_TMX);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TMX_CS,rf_calib_data->cal.tmx_csh);
BL_WR_REG(RF_BASE,RF_TMX,tmpVal);
}
switch(chanfreq_MHz){
case 2412:
tx_pwr_os=tx_pwr_ch_os[0];
break;
case 2417:
tx_pwr_os=tx_pwr_ch_os[1];
break;
case 2422:
tx_pwr_os=tx_pwr_ch_os[2];
break;
case 2427:
tx_pwr_os=tx_pwr_ch_os[3];
break;
case 2432:
tx_pwr_os=tx_pwr_ch_os[4];
break;
case 2437:
tx_pwr_os=tx_pwr_ch_os[5];
break;
case 2442:
tx_pwr_os=tx_pwr_ch_os[6];
break;
case 2447:
tx_pwr_os=tx_pwr_ch_os[7];
break;
case 2452:
tx_pwr_os=tx_pwr_ch_os[8];
break;
case 2457:
tx_pwr_os=tx_pwr_ch_os[9];
break;
case 2462:
tx_pwr_os=tx_pwr_ch_os[10];
break;
case 2467:
tx_pwr_os=tx_pwr_ch_os[11];
break;
case 2472:
tx_pwr_os=tx_pwr_ch_os[12];
break;
case 2484:
tx_pwr_os=tx_pwr_ch_os[13];
break;
default:
tx_pwr_os=0;
break;
}
}
void rf_pri_xtalfreq(uint32_t xtalfreq)
{
// rf_pri_printf("xtalfreq=%ld\r\n",xtalfreq);
if(xtalfreq == E_RF_XTAL_24M){
channel_div_table[0] = 0x21638E39;
channel_div_table[1] = 0x2171C71C;
channel_div_table[2] = 0x21800000;
channel_div_table[3] = 0x218E38E4;
channel_div_table[4] = 0x219C71C7;
channel_div_table[5] = 0x21AAAAAB;
channel_div_table[6] = 0x21B8E38E;
channel_div_table[7] = 0x21C71C72;
channel_div_table[8] = 0x21D55555;
channel_div_table[9] = 0x21E38E39;
channel_div_table[10] = 0x21F1C71C;
channel_div_table[11] = 0x22000000;
channel_div_table[12] = 0x220E38E4;
channel_div_table[13] = 0x221C71C7;
channel_div_table[14] = 0x222AAAAB;
channel_div_table[15] = 0x2238E38E;
channel_div_table[16] = 0x22471C72;
channel_div_table[17] = 0x22555555;
channel_div_table[18] = 0x22638E39;
channel_div_table[19] = 0x2271C71C;
channel_div_table[20] = 0x22800000;
//
channel_cnt_table[0] = 0xA6F2;
channel_cnt_table[1] = 0xA739;
channel_cnt_table[2] = 0xA780;
channel_cnt_table[3] = 0xA7C7;
channel_cnt_table[4] = 0xA80E;
channel_cnt_table[5] = 0xA855;
channel_cnt_table[6] = 0xA89C;
channel_cnt_table[7] = 0xA8E4;
channel_cnt_table[8] = 0xA92B;
channel_cnt_table[9] = 0xA972;
channel_cnt_table[10] = 0xA9B9;
channel_cnt_table[11] = 0xAA00;
channel_cnt_table[12] = 0xAA47;
channel_cnt_table[13] = 0xAA8E;
channel_cnt_table[14] = 0xAAD5;
channel_cnt_table[15] = 0xAB1C;
channel_cnt_table[16] = 0xAB64;
channel_cnt_table[17] = 0xABAB;
channel_cnt_table[18] = 0xABF2;
channel_cnt_table[19] = 0xAC39;
channel_cnt_table[20] = 0xAC80;
//
channel_cnt_range[0] = 0xA6A7;
channel_cnt_range[1] = 0xA6E7;
channel_cnt_range[2] = 0xACE7;
//
fcal_div = 0x500;
// 2400,2424,2448,2472,2496
rx_notch_para_40M[0][0] = 0; //2412MHz
rx_notch_para_40M[1][0] = 1;//2417MHz
rx_notch_para_40M[2][0] = 1;//2422MHz
rx_notch_para_40M[3][0] = 1;//2427MHz
rx_notch_para_40M[4][0] = 1;//2432MHz
rx_notch_para_40M[5][0] = 0;//2437MHz
rx_notch_para_40M[6][0] = 1; //2442MHz
rx_notch_para_40M[7][0] = 1; //2447MHz
rx_notch_para_40M[8][0] = 1;//2452MHz
rx_notch_para_40M[9][0] = 1;//2457MHz
rx_notch_para_40M[10][0] = 0;//2462MHz
rx_notch_para_40M[11][0] = 1;//2467MHz
rx_notch_para_40M[12][0] = 1;//2472MHz
rx_notch_para_40M[13][0] = 0; //2484MHz
rx_notch_para_40M[0][1] = 0*1000*1000; //2412MHz
rx_notch_para_40M[1][1] = 7*1000*1000;//2417MHz
rx_notch_para_40M[2][1] = 2*1000*1000;//2422MHz
rx_notch_para_40M[3][1] = -3*1000*1000;//2427MHz
rx_notch_para_40M[4][1] = -8*1000*1000;//2432MHz
rx_notch_para_40M[5][1] = 0*1000*1000;//2437MHz
rx_notch_para_40M[6][1] = 6*1000*1000; //2442MHz
rx_notch_para_40M[7][1] = 1*1000*1000; //2447MHz
rx_notch_para_40M[8][1] = -4*1000*1000;//2452MHz
rx_notch_para_40M[9][1] = -9*1000*1000;//2457MHz
rx_notch_para_40M[10][1] = 0*1000*1000;//2462MHz
rx_notch_para_40M[11][1] = 5*1000*1000;//2467MHz
rx_notch_para_40M[12][1] = 0*1000*1000;//2472MHz
rx_notch_para_40M[13][1] = 0*1000*1000; //2484MHz
}else if(xtalfreq == E_RF_XTAL_26M){
channel_div_table[0] = 0x1ED20D21;
channel_div_table[1] = 0x1EDF2DF3;
channel_div_table[2] = 0x1EEC4EC5;
channel_div_table[3] = 0x1EF96F97;
channel_div_table[4] = 0x1F069069;
channel_div_table[5] = 0x1F13B13B;
channel_div_table[6] = 0x1F20D20D;
channel_div_table[7] = 0x1F2DF2DF;
channel_div_table[8] = 0x1F3B13B1;
channel_div_table[9] = 0x1F483483;
channel_div_table[10] = 0x1F555555;
channel_div_table[11] = 0x1F627627;
channel_div_table[12] = 0x1F6F96F9;
channel_div_table[13] = 0x1F7CB7CB;
channel_div_table[14] = 0x1F89D89E;
channel_div_table[15] = 0x1F96F970;
channel_div_table[16] = 0x1FA41A42;
channel_div_table[17] = 0x1FB13B14;
channel_div_table[18] = 0x1FBE5BE6;
channel_div_table[19] = 0x1FCB7CB8;
channel_div_table[20] = 0x1FD89D8A;
//
channel_cnt_table[0] = 0xA6FC;
channel_cnt_table[1] = 0xA743;
channel_cnt_table[2] = 0xA78A;
channel_cnt_table[3] = 0xA7D1;
channel_cnt_table[4] = 0xA819;
channel_cnt_table[5] = 0xA860;
channel_cnt_table[6] = 0xA8A7;
channel_cnt_table[7] = 0xA8EE;
channel_cnt_table[8] = 0xA935;
channel_cnt_table[9] = 0xA97C;
channel_cnt_table[10] = 0xA9C3;
channel_cnt_table[11] = 0xAA0A;
channel_cnt_table[12] = 0xAA52;
channel_cnt_table[13] = 0xAA99;
channel_cnt_table[14] = 0xAAE0;
channel_cnt_table[15] = 0xAB27;
channel_cnt_table[16] = 0xAB6E;
channel_cnt_table[17] = 0xABB5;
channel_cnt_table[18] = 0xABFC;
channel_cnt_table[19] = 0xAC43;
channel_cnt_table[20] = 0xAC8B;
//
channel_cnt_range[0] = 0xA6B1;
channel_cnt_range[1] = 0xA6F1;
channel_cnt_range[2] = 0xACF2;
//
fcal_div = 0x56b;
// 2418,2444,2470,2496
rx_notch_para_40M[0][0] = 1; //2412MHz
rx_notch_para_40M[1][0] = 1;//2417MHz
rx_notch_para_40M[2][0] = 1;//2422MHz
rx_notch_para_40M[3][0] = 1;//2427MHz
rx_notch_para_40M[4][0] = 0;//2432MHz
rx_notch_para_40M[5][0] = 1;//2437MHz
rx_notch_para_40M[6][0] = 1; //2442MHz
rx_notch_para_40M[7][0] = 1; //2447MHz
rx_notch_para_40M[8][0] = 1;//2452MHz
rx_notch_para_40M[9][0] = 0;//2457MHz
rx_notch_para_40M[10][0] = 1;//2462MHz
rx_notch_para_40M[11][0] = 1;//2467MHz
rx_notch_para_40M[12][0] = 1;//2472MHz
rx_notch_para_40M[13][0] = 0; //2484MHz
rx_notch_para_40M[0][1] = 6*1000*1000; //2412MHz
rx_notch_para_40M[1][1] = 1*1000*1000;//2417MHz
rx_notch_para_40M[2][1] = -4*1000*1000;//2422MHz
rx_notch_para_40M[3][1] = -9*1000*1000;//2427MHz
rx_notch_para_40M[4][1] = 0*1000*1000;//2432MHz
rx_notch_para_40M[5][1] = 7*1000*1000;//2437MHz
rx_notch_para_40M[6][1] = 2*1000*1000; //2442MHz
rx_notch_para_40M[7][1] = -3*1000*1000; //2447MHz
rx_notch_para_40M[8][1] = -8*1000*1000;//2452MHz
rx_notch_para_40M[9][1] = 0*1000*1000;//2457MHz
rx_notch_para_40M[10][1] = 8*1000*1000;//2462MHz
rx_notch_para_40M[11][1] = 3*1000*1000;//2467MHz
rx_notch_para_40M[12][1] = -2*1000*1000;//2472MHz
rx_notch_para_40M[13][1] = 0*1000*1000; //2484MHz
}else if(xtalfreq == E_RF_XTAL_32M){
channel_div_table[0] = 0x190AAAAB;
channel_div_table[1] = 0x19155555;
channel_div_table[2] = 0x19200000;
channel_div_table[3] = 0x192AAAAB;
channel_div_table[4] = 0x19355555;
channel_div_table[5] = 0x19400000;
channel_div_table[6] = 0x194AAAAB;
channel_div_table[7] = 0x19555555;
channel_div_table[8] = 0x19600000;
channel_div_table[9] = 0x196AAAAB;
channel_div_table[10] = 0x19755555;
channel_div_table[11] = 0x19800000;
channel_div_table[12] = 0x198AAAAB;
channel_div_table[13] = 0x19955555;
channel_div_table[14] = 0x19A00000;
channel_div_table[15] = 0x19AAAAAB;
channel_div_table[16] = 0x19B55555;
channel_div_table[17] = 0x19C00000;
channel_div_table[18] = 0x19CAAAAB;
channel_div_table[19] = 0x19D55555;
channel_div_table[20] = 0x19E00000;
//
channel_cnt_table[0] = 0xA6FA;
channel_cnt_table[1] = 0xA741;
channel_cnt_table[2] = 0xA788;
channel_cnt_table[3] = 0xA7D0;
channel_cnt_table[4] = 0xA817;
channel_cnt_table[5] = 0xA85E;
channel_cnt_table[6] = 0xA8A5;
channel_cnt_table[7] = 0xA8EC;
channel_cnt_table[8] = 0xA933;
channel_cnt_table[9] = 0xA97A;
channel_cnt_table[10] = 0xA9C1;
channel_cnt_table[11] = 0xAA09;
channel_cnt_table[12] = 0xAA50;
channel_cnt_table[13] = 0xAA97;
channel_cnt_table[14] = 0xAADE;
channel_cnt_table[15] = 0xAB25;
channel_cnt_table[16] = 0xAB6C;
channel_cnt_table[17] = 0xABB3;
channel_cnt_table[18] = 0xABFA;
channel_cnt_table[19] = 0xAC42;
channel_cnt_table[20] = 0xAC89;
//
channel_cnt_range[0] = 0xA6AF;
channel_cnt_range[1] = 0xA6EF;
channel_cnt_range[2] = 0xACF0;
//
fcal_div = 0x6ab;
// 2400,2432,2464,2496
rx_notch_para_40M[0][0] = 0; //2412MHz
rx_notch_para_40M[1][0] = 0;//2417MHz
rx_notch_para_40M[2][0] = 1;//2422MHz
rx_notch_para_40M[3][0] = 1;//2427MHz
rx_notch_para_40M[4][0] = 1;//2432MHz
rx_notch_para_40M[5][0] = 1;//2437MHz
rx_notch_para_40M[6][0] = 1; //2442MHz
rx_notch_para_40M[7][0] = 0; //2447MHz
rx_notch_para_40M[8][0] = 0;//2452MHz
rx_notch_para_40M[9][0] = 1;//2457MHz
rx_notch_para_40M[10][0] = 1;//2462MHz
rx_notch_para_40M[11][0] = 1;//2467MHz
rx_notch_para_40M[12][0] = 1;//2472MHz
rx_notch_para_40M[13][0] = 0; //2484MHz
rx_notch_para_40M[0][1] = 0*1000*1000; //2412MHz
rx_notch_para_40M[1][1] = 0*1000*1000;//2417MHz
rx_notch_para_40M[2][1] = 10*1000*1000;//2422MHz
rx_notch_para_40M[3][1] = 5*1000*1000;//2427MHz
rx_notch_para_40M[4][1] = 0*1000*1000;//2432MHz
rx_notch_para_40M[5][1] = -5*1000*1000;//2437MHz
rx_notch_para_40M[6][1] = -10*1000*1000; //2442MHz
rx_notch_para_40M[7][1] = 0*1000*1000; //2447MHz
rx_notch_para_40M[8][1] = 0*1000*1000;//2452MHz
rx_notch_para_40M[9][1] = 7*1000*1000;//2457MHz
rx_notch_para_40M[10][1] = 2*1000*1000;//2462MHz
rx_notch_para_40M[11][1] = -3*1000*1000;//2467MHz
rx_notch_para_40M[12][1] = -8*1000*1000;//2472MHz
rx_notch_para_40M[13][1] = 0*1000*1000; //2484MHz
}else if(xtalfreq == E_RF_XTAL_38M4){
channel_div_table[0] = 0x14DE38E4;
channel_div_table[1] = 0x14E71C72;
channel_div_table[2] = 0x14F00000;
channel_div_table[3] = 0x14F8E38E;
channel_div_table[4] = 0x1501C71C;
channel_div_table[5] = 0x150AAAAB;
channel_div_table[6] = 0x15138E39;
channel_div_table[7] = 0x151C71C7;
channel_div_table[8] = 0x15255555;
channel_div_table[9] = 0x152E38E4;
channel_div_table[10] = 0x15371C72;
channel_div_table[11] = 0x15400000;
channel_div_table[12] = 0x1548E38E;
channel_div_table[13] = 0x1551C71C;
channel_div_table[14] = 0x155AAAAB;
channel_div_table[15] = 0x15638E39;
channel_div_table[16] = 0x156C71C7;
channel_div_table[17] = 0x15755555;
channel_div_table[18] = 0x157E38E4;
channel_div_table[19] = 0x15871C72;
channel_div_table[20] = 0x15900000;
//
channel_cnt_table[0] = 0xA6F2;
channel_cnt_table[1] = 0xA739;
channel_cnt_table[2] = 0xA780;
channel_cnt_table[3] = 0xA7C7;
channel_cnt_table[4] = 0xA80E;
channel_cnt_table[5] = 0xA855;
channel_cnt_table[6] = 0xA89C;
channel_cnt_table[7] = 0xA8E4;
channel_cnt_table[8] = 0xA92B;
channel_cnt_table[9] = 0xA972;
channel_cnt_table[10] = 0xA9B9;
channel_cnt_table[11] = 0xAA00;
channel_cnt_table[12] = 0xAA47;
channel_cnt_table[13] = 0xAA8E;
channel_cnt_table[14] = 0xAAD5;
channel_cnt_table[15] = 0xAB1C;
channel_cnt_table[16] = 0xAB64;
channel_cnt_table[17] = 0xABAB;
channel_cnt_table[18] = 0xABF2;
channel_cnt_table[19] = 0xAC39;
channel_cnt_table[20] = 0xAC80;
//
channel_cnt_range[0] = 0xA6A7;
channel_cnt_range[1] = 0xA6E7;
channel_cnt_range[2] = 0xACE7;
//
fcal_div = 0x800;
// 2380.8,2419.2,2457.6,2496
rx_notch_para_40M[0][0] = 1; //2412MHz
rx_notch_para_40M[1][0] = 1;//2417MHz
rx_notch_para_40M[2][0] = 1;//2422MHz
rx_notch_para_40M[3][0] = 1;//2427MHz
rx_notch_para_40M[4][0] = 0;//2432MHz
rx_notch_para_40M[5][0] = 0;//2437MHz
rx_notch_para_40M[6][0] = 0; //2442MHz
rx_notch_para_40M[7][0] = 0; //2447MHz
rx_notch_para_40M[8][0] = 1;//2452MHz
rx_notch_para_40M[9][0] = 1;//2457MHz
rx_notch_para_40M[10][0] = 1;//2462MHz
rx_notch_para_40M[11][0] = 1;//2467MHz
rx_notch_para_40M[12][0] = 0;//2472MHz
rx_notch_para_40M[13][0] = 0; //2484MHz
rx_notch_para_40M[0][1] = 7200*1000; //2412MHz
rx_notch_para_40M[1][1] = 2200*1000;//2417MHz
rx_notch_para_40M[2][1] = -2800*1000;//2422MHz
rx_notch_para_40M[3][1] = -7800*1000;//2427MHz
rx_notch_para_40M[4][1] = 0*1000*1000;//2432MHz
rx_notch_para_40M[5][1] = 0*1000*1000;//2437MHz
rx_notch_para_40M[6][1] = 0*1000*1000; //2442MHz
rx_notch_para_40M[7][1] = 0*1000*1000; //2447MHz
rx_notch_para_40M[8][1] = 5600*1000;//2452MHz
rx_notch_para_40M[9][1] = 600*1000;//2457MHz
rx_notch_para_40M[10][1] = -4400*1000;//2462MHz
rx_notch_para_40M[11][1] = -9400*1000;//2467MHz
rx_notch_para_40M[12][1] = 0*1000*1000;//2472MHz
rx_notch_para_40M[13][1] = 0*1000*1000; //2484MHz
}else if(xtalfreq == E_RF_XTAL_40M){
channel_div_table[0] = 0x14088889;
channel_div_table[1] = 0x14111111;
channel_div_table[2] = 0x1419999A;
channel_div_table[3] = 0x14222222;
channel_div_table[4] = 0x142AAAAB;
channel_div_table[5] = 0x14333333;
channel_div_table[6] = 0x143BBBBC;
channel_div_table[7] = 0x14444444;
channel_div_table[8] = 0x144CCCCD;
channel_div_table[9] = 0x14555555;
channel_div_table[10] = 0x145DDDDE;
channel_div_table[11] = 0x14666666;
channel_div_table[12] = 0x146EEEEF;
channel_div_table[13] = 0x14777777;
channel_div_table[14] = 0x14800000;
channel_div_table[15] = 0x14888889;
channel_div_table[16] = 0x14911111;
channel_div_table[17] = 0x1499999A;
channel_div_table[18] = 0x14A22222;
channel_div_table[19] = 0x14AAAAAB;
channel_div_table[20] = 0x14B33333;
//
channel_cnt_table[0] = 0xA6EB;
channel_cnt_table[1] = 0xA732;
channel_cnt_table[2] = 0xA779;
channel_cnt_table[3] = 0xA7C0;
channel_cnt_table[4] = 0xA808;
channel_cnt_table[5] = 0xA84F;
channel_cnt_table[6] = 0xA896;
channel_cnt_table[7] = 0xA8DD;
channel_cnt_table[8] = 0xA924;
channel_cnt_table[9] = 0xA96B;
channel_cnt_table[10] = 0xA9B2;
channel_cnt_table[11] = 0xA9F9;
channel_cnt_table[12] = 0xAA40;
channel_cnt_table[13] = 0xAA87;
channel_cnt_table[14] = 0xAACF;
channel_cnt_table[15] = 0xAB16;
channel_cnt_table[16] = 0xAB5D;
channel_cnt_table[17] = 0xABA4;
channel_cnt_table[18] = 0xABEB;
channel_cnt_table[19] = 0xAC32;
channel_cnt_table[20] = 0xAC79;
//
channel_cnt_range[0] = 0xa6a0;
channel_cnt_range[1] = 0xa6e0;
channel_cnt_range[2] = 0xace0;
//
fcal_div = 0x855;
// 2400,2440,2480
rx_notch_para_40M[0][0] = 0; //2412MHz
rx_notch_para_40M[1][0] = 0;//2417MHz
rx_notch_para_40M[2][0] = 0;//2422MHz
rx_notch_para_40M[3][0] = 0;//2427MHz
rx_notch_para_40M[4][0] = 1;//2432MHz
rx_notch_para_40M[5][0] = 1;//2437MHz
rx_notch_para_40M[6][0] = 1; //2442MHz
rx_notch_para_40M[7][0] = 1; //2447MHz
rx_notch_para_40M[8][0] = 0;//2452MHz
rx_notch_para_40M[9][0] = 0;//2457MHz
rx_notch_para_40M[10][0] = 0;//2462MHz
rx_notch_para_40M[11][0] = 0;//2467MHz
rx_notch_para_40M[12][0] = 1;//2472MHz
rx_notch_para_40M[13][0] = 1; //2484MHz
rx_notch_para_40M[0][1] = 0*1000*1000; //2412MHz
rx_notch_para_40M[1][1] = 0*1000*1000;//2417MHz
rx_notch_para_40M[2][1] = 0*1000*1000;//2422MHz
rx_notch_para_40M[3][1] = 0*1000*1000;//2427MHz
rx_notch_para_40M[4][1] = 8*1000*1000;//2432MHz
rx_notch_para_40M[5][1] = 3*1000*1000;//2437MHz
rx_notch_para_40M[6][1] = -2*1000*1000; //2442MHz
rx_notch_para_40M[7][1] = -7*1000*1000; //2447MHz
rx_notch_para_40M[8][1] = 0*1000*1000;//2452MHz
rx_notch_para_40M[9][1] = 0*1000*1000;//2457MHz
rx_notch_para_40M[10][1] = 0*1000*1000;//2462MHz
rx_notch_para_40M[11][1] = 0*1000*1000;//2467MHz
rx_notch_para_40M[12][1] = 8*1000*1000;//2472MHz
rx_notch_para_40M[13][1] = -4*1000*1000; //2484MHz
}else if(xtalfreq == E_RF_XTAL_52M){
channel_div_table[0] = 0xF690690;
channel_div_table[1] = 0xF6F96F9;
channel_div_table[2] = 0xF762762;
channel_div_table[3] = 0xF7CB7CB;
channel_div_table[4] = 0xF834835;
channel_div_table[5] = 0xF89D89E;
channel_div_table[6] = 0xF906907;
channel_div_table[7] = 0xF96F970;
channel_div_table[8] = 0xF9D89D9;
channel_div_table[9] = 0xFA41A42;
channel_div_table[10] = 0xFAAAAAB;
channel_div_table[11] = 0xFB13B14;
channel_div_table[12] = 0xFB7CB7D;
channel_div_table[13] = 0xFBE5BE6;
channel_div_table[14] = 0xFC4EC4F;
channel_div_table[15] = 0xFCB7CB8;
channel_div_table[16] = 0xFD20D21;
channel_div_table[17] = 0xFD89D8A;
channel_div_table[18] = 0xFDF2DF3;
channel_div_table[19] = 0xFE5BE5C;
channel_div_table[20] = 0xFEC4EC5;
//
channel_cnt_table[0] = 0xA6ED;
channel_cnt_table[1] = 0xA734;
channel_cnt_table[2] = 0xA77B;
channel_cnt_table[3] = 0xA7C2;
channel_cnt_table[4] = 0xA809;
channel_cnt_table[5] = 0xA850;
channel_cnt_table[6] = 0xA897;
channel_cnt_table[7] = 0xA8DE;
channel_cnt_table[8] = 0xA925;
channel_cnt_table[9] = 0xA96D;
channel_cnt_table[10] = 0xA9B4;
channel_cnt_table[11] = 0xA9FB;
channel_cnt_table[12] = 0xAA42;
channel_cnt_table[13] = 0xAA89;
channel_cnt_table[14] = 0xAAD0;
channel_cnt_table[15] = 0xAB17;
channel_cnt_table[16] = 0xAB5E;
channel_cnt_table[17] = 0xABA5;
channel_cnt_table[18] = 0xABEC;
channel_cnt_table[19] = 0xAC34;
channel_cnt_table[20] = 0xAC7B;
//
channel_cnt_range[0] = 0xA6A2;
channel_cnt_range[1] = 0xA6E2;
channel_cnt_range[2] = 0xACE2;
//
fcal_div = 0xad5;
// 2392,2444,2496
rx_notch_para_40M[0][0] = 0; //2412MHz
rx_notch_para_40M[1][0] = 0;//2417MHz
rx_notch_para_40M[2][0] = 0;//2422MHz
rx_notch_para_40M[3][0] = 0;//2427MHz
rx_notch_para_40M[4][0] = 0;//2432MHz
rx_notch_para_40M[5][0] = 1;//2437MHz
rx_notch_para_40M[6][0] = 1; //2442MHz
rx_notch_para_40M[7][0] = 1; //2447MHz
rx_notch_para_40M[8][0] = 1;//2452MHz
rx_notch_para_40M[9][0] = 0;//2457MHz
rx_notch_para_40M[10][0] = 0;//2462MHz
rx_notch_para_40M[11][0] = 0;//2467MHz
rx_notch_para_40M[12][0] = 0;//2472MHz
rx_notch_para_40M[13][0] = 0; //2484MHz
rx_notch_para_40M[0][1] = 0*1000*1000; //2412MHz
rx_notch_para_40M[1][1] = 0*1000*1000;//2417MHz
rx_notch_para_40M[2][1] = 0*1000*1000;//2422MHz
rx_notch_para_40M[3][1] = 0*1000*1000;//2427MHz
rx_notch_para_40M[4][1] = 0*1000*1000;//2432MHz
rx_notch_para_40M[5][1] = 7*1000*1000;//2437MHz
rx_notch_para_40M[6][1] = 2*1000*1000; //2442MHz
rx_notch_para_40M[7][1] = -3*1000*1000; //2447MHz
rx_notch_para_40M[8][1] = -8*1000*1000;//2452MHz
rx_notch_para_40M[9][1] = 0*1000*1000;//2457MHz
rx_notch_para_40M[10][1] = 0*1000*1000;//2462MHz
rx_notch_para_40M[11][1] = 0*1000*1000;//2467MHz
rx_notch_para_40M[12][1] = 0*1000*1000;//2472MHz
rx_notch_para_40M[13][1] = 0*1000*1000; //2484MHz
}
}
uint32_t rf_pri_get_vco_freq_cw(uint32_t chanfreq_MHz)
{
int32_t k = (int32_t)((chanfreq_MHz-2404)/4 + 0.5);
k = k < 0 ? 0 : k;
k = k > NUM_CHANNELS-1 ? NUM_CHANNELS-1 : k;
return rf_calib_data->lo[k].fcal;
}
uint32_t rf_pri_get_vco_idac_cw(uint32_t chanfreq_MHz)
{
int32_t k = (int32_t)((chanfreq_MHz-2404)/4 + 0.5);
k = k < 0 ? 0 : k;
k = k > NUM_CHANNELS-1 ? NUM_CHANNELS-1 : k;
return rf_calib_data->lo[k].acal;
}
void rf_pri_update_txgain_tempos(int16_t tempos)
{
tx_pwr_os_temperature = tempos;
}
int32_t rf_pri_get_txgain_max()
{
return tx_pwr_table[0][6] + tx_pwr_os + tx_pwr_os_temperature;
}
int32_t rf_pri_get_txgain_min()
{
return tx_pwr_table[15][6] + tx_pwr_os + tx_pwr_os_temperature;
}
uint32_t rf_pri_get_txgain_index(int32_t pwr,uint32_t mode)
{
uint32_t i=0;
pwr=pwr+tx_pwr_os;
if(mode==E_RF_MODE_11B){
pwr=pwr-33;
}
for(i=0;i<E_RF_TXPWR_TBL_CNT;i++){
if(pwr>=tx_pwr_table[i][6]){
break;
}
}
return (i == E_RF_TXPWR_TBL_CNT) ? i - 1 : i;
}
void rf_pri_query_txgain_table(uint32_t index, uint32_t *rfg_index, uint32_t *dg)
{
index = index > E_RF_TXPWR_TBL_CNT - 1 ? E_RF_TXPWR_TBL_CNT - 1 : index;
*rfg_index = 7-(index >> 1);
*dg = tx_pwr_table[index][5];
}
#if 0
void rf_pri_get_txgain_settings(int32_t pwr,uint32_t mode,uint32_t* rfg, uint32_t *dg)
{
uint32_t i;
pwr=pwr+tx_pwr_os;
if(mode==E_RF_MODE_11B){
pwr=pwr-33;
}
for(i=0;i<E_RF_TXPWR_TBL_CNT;i++){
if(pwr>=tx_pwr_table[i][6]){
break;
}
}
if(i==0){
tp_index->index=i;
tp_index->dvga=tx_pwr_table[i][5];
}else if(i==E_RF_TXPWR_TBL_CNT){
tp_index->index=i-1;
tp_index->dvga=tx_pwr_table[i-1][5];
}else{
if((tx_pwr_table[i-1][6]-pwr)<(pwr-tx_pwr_table[i][6])){
tp_index->index=i-1;
tp_index->dvga=tx_pwr_table[i-1][5];
}else{
tp_index->index=i;
tp_index->dvga=tx_pwr_table[i][5];
}
}
// if(mode==E_RF_MODE_11B){
// tp_index->dvga=tp_index->dvga+0;
// }
*dg = tp_index->dvga;
*rfg = tp_index->index >> 1;
}
#endif
static void rf_pri_config_channel(uint32_t channel_index)
{
uint32_t tmpVal = 0;
// power up LO
// tmpVal=BL_RD_REG(RF_BASE,RF_PUCR1);
// tmpVal=BL_SET_REG_BIT(tmpVal,RF_PU_VCO);
// tmpVal=BL_SET_REG_BIT(tmpVal,RF_PU_FBDV);
// tmpVal=BL_SET_REG_BIT(tmpVal,RF_PU_PFD);
// tmpVal=BL_SET_REG_BIT(tmpVal,RF_PU_OSMX);
// BL_WR_REG(RF_BASE,RF_PUCR1,tmpVal);
// set channel
// rf_pri_printf("fcal=%d,acal=%d",rf_calib_data->lo[channel_index].fcal,rf_calib_data->lo[channel_index].acal);
tmpVal=BL_RD_REG(RF_BASE,RF_VCO1);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_LO_VCO_FREQ_CW,rf_calib_data->lo[channel_index].fcal);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_LO_VCO_IDAC_CW,rf_calib_data->lo[channel_index].acal);
BL_WR_REG(RF_BASE,RF_VCO1,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_LODIST);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_LO_OSMX_CAP,rf_calib_data->lo[channel_index].fcal >> 4);
BL_WR_REG(RF_BASE,RF_LODIST,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_SDM2);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_LO_SDMIN,channel_div_table[channel_index]);
BL_WR_REG(RF_BASE,RF_SDM2,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_SDM1);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_LO_SDM_BYPASS,0);
BL_WR_REG(RF_BASE,RF_SDM1,tmpVal);
// wait channel lock
// tmpVal=BL_RD_REG(RF_BASE,RFCTRL_HW_EN);
// tmpVal=BL_CLR_REG_BIT(tmpVal,RF_LO_CTRL_HW);
// BL_WR_REG(RF_BASE,RFCTRL_HW_EN,tmpVal);
while (1) {
tmpVal=BL_RD_REG(RF_BASE,RF_FBDV);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_LO_FBDV_RST);
BL_WR_REG(RF_BASE,RF_FBDV,tmpVal);
rf_pri_wait_us(10);
tmpVal=BL_RD_REG(RF_BASE,RF_FBDV);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_LO_FBDV_RST);
BL_WR_REG(RF_BASE,RF_FBDV,tmpVal);
rf_pri_wait_us(50);
tmpVal=BL_RD_REG(RF_BASE,RF_PFDCP);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_LO_PFD_RST_CSD);
BL_WR_REG(RF_BASE,RF_PFDCP,tmpVal);
rf_pri_wait_us(10);
tmpVal=BL_RD_REG(RF_BASE,RF_PFDCP);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_LO_PFD_RST_CSD);
BL_WR_REG(RF_BASE,RF_PFDCP,tmpVal);
rf_pri_wait_us(50);
tmpVal=BL_RD_REG(RF_BASE,RF_LO);
if (BL_GET_REG_BITS_VAL(tmpVal,RF_LO_SLIPPED_DN) || BL_GET_REG_BITS_VAL(tmpVal,RF_LO_SLIPPED_UP)) {
rf_pri_printe(".");
}
else {
rf_pri_printf("LO locked %ld %ld\r\n",channel_index,(uint32_t)(rf_calib_data->lo[channel_index].fcal));
// tmpVal=BL_RD_REG(RF_BASE,RFCTRL_HW_EN);
// tmpVal=BL_SET_REG_BIT(tmpVal,RF_LO_CTRL_HW);
// BL_WR_REG(RF_BASE,RFCTRL_HW_EN,tmpVal);
break;
}
}
}
static void rf_pri_manu_pu(uint32_t mode)
{
uint32_t tmpVal = 0;
tmpVal=BL_RD_REG(RF_BASE,RF_FSM_CTRL_HW);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_FSM_CTRL_EN);
BL_WR_REG(RF_BASE,RF_FSM_CTRL_HW,tmpVal);
BL_WR_REG(RF_BASE,RFCTRL_HW_EN,0);
switch (mode) {
case E_RF_MODE_LO_FCAL:
case E_RF_MODE_LO_ACAL:
tmpVal=BL_RD_REG(RF_BASE,RF_PUCR1);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_LNA);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_RMXGM);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_RMX);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_RBB);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_ADC);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_ADC_CLK_EN);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_PKDET);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_ROSDAC);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_PWRMX);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_PA);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_TMX);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_TBB);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_DAC);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_RXBUF);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_TXBUF);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_TRSW_EN);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_TOSDAC);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_PU_OSMX);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_PU_PFD);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_PU_FBDV);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_PU_VCO);
BL_WR_REG(RF_BASE,RF_PUCR1,tmpVal);
break;
case E_RF_MODE_ROSCAL:
tmpVal=BL_RD_REG(RF_BASE,RF_PUCR1);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_LNA);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_PU_RMXGM);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_PU_RMX);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_PU_RBB);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_PU_ADC);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_ADC_CLK_EN);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_PKDET);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_PU_ROSDAC);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_PWRMX);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_PA);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_TMX);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_TBB);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_DAC);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_PU_RXBUF);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_TXBUF);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_TRSW_EN);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_TOSDAC);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_PU_OSMX);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_PU_PFD);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_PU_FBDV);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_PU_VCO);
BL_WR_REG(RF_BASE,RF_PUCR1,tmpVal);
break;
case E_RF_MODE_RCCAL:
tmpVal=BL_RD_REG(RF_BASE,RF_PUCR1);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_LNA);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_RMXGM);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_RMX);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_PU_RBB);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_PU_ADC);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_ADC_CLK_EN);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_PKDET);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_PU_ROSDAC);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_PWRMX);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_PA);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_TMX);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_TBB);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_PU_DAC);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_RXBUF);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_TXBUF);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_TRSW_EN);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_TOSDAC);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_PU_OSMX);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_PU_PFD);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_PU_FBDV);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_PU_VCO);
BL_WR_REG(RF_BASE,RF_PUCR1,tmpVal);
break;
case E_RF_MODE_TXCAL:
tmpVal=BL_RD_REG(RF_BASE,RF_PUCR1);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_LNA);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_RMXGM);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_RMX);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_PU_RBB);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_PU_ADC);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_ADC_CLK_EN);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_PKDET);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_ROSDAC);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_PU_PWRMX);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_PU_PA);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_PU_TMX);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_PU_TBB);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_PU_DAC);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_RXBUF);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_PU_TXBUF);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_TRSW_EN);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_PU_TOSDAC);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_PU_OSMX);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_PU_PFD);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_PU_FBDV);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_PU_VCO);
BL_WR_REG(RF_BASE,RF_PUCR1,tmpVal);
break;
case E_RF_MODE_IDLE:
default:
tmpVal=BL_RD_REG(RF_BASE,RF_PUCR1);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_LNA);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_RMXGM);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_RMX);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_RBB);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_ADC);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_ADC_CLK_EN);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_PKDET);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_ROSDAC);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_PWRMX);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_PA);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_TMX);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_TBB);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_DAC);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_RXBUF);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_TXBUF);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_TRSW_EN);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_PU_TOSDAC);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_PU_OSMX);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_PU_PFD);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_PU_FBDV);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_PU_VCO);
BL_WR_REG(RF_BASE,RF_PUCR1,tmpVal);
break;
}
}
static void rf_pri_config_mode(uint32_t mode)
{
rf_pri_manu_pu(mode);
}
/****************************************************************************//**
* @brief RF set auto gain
*
* @param None
*
* @return None
*
*******************************************************************************/
static void rf_pri_auto_gain(void)
{
uint32_t tmpVal = 0;
tmpVal = BL_RD_REG(RF_BASE,RFCTRL_HW_EN);
/* Because RF_RX_GAIN_CTRL_HW is only one bit, we can use BL_SET_REG_BIT
* or BL_CLR_REG_BIT */
tmpVal=BL_SET_REG_BIT(tmpVal,RF_RX_GAIN_CTRL_HW);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_TX_GAIN_CTRL_HW);
BL_WR_REG(RF_BASE,RFCTRL_HW_EN,tmpVal);
}
static void rf_pri_save_state_for_cal()
{
state_rf_fsm_ctrl_hw = BL_RD_REG(RF_BASE,RF_FSM_CTRL_HW);
state_rfctrl_hw_en = BL_RD_REG(RF_BASE,RFCTRL_HW_EN);
state_rfcal_ctrlen = BL_RD_REG(RF_BASE,RFCAL_CTRLEN);
state_pucr1 = BL_RD_REG(RF_BASE,RF_PUCR1);
state_fbdv = BL_RD_REG(RF_BASE,RF_FBDV);
state_sdm1 = BL_RD_REG(RF_BASE,RF_SDM1);
state_sdm2 = BL_RD_REG(RF_BASE,RF_SDM2);
state_rbb3 = BL_RD_REG(RF_BASE,RF_RBB3);
state_adda1 = BL_RD_REG(RF_BASE,RF_ADDA1);
state_dfe_ctrl_0 = BL_RD_REG(RF_BASE,RF_DFE_CTRL_0);
state_dfe_ctrl_3 = BL_RD_REG(RF_BASE,RF_DFE_CTRL_3);
state_dfe_ctrl_6 = BL_RD_REG(RF_BASE,RF_DFE_CTRL_6);
state_dfe_ctrl_7 = BL_RD_REG(RF_BASE,RF_DFE_CTRL_7);
state_trx_gain1 = BL_RD_REG(RF_BASE,RF_TRX_GAIN1);
state_singen_ctrl0 = BL_RD_REG(RF_BASE,RF_SINGEN_CTRL0);
state_singen_ctrl2 = BL_RD_REG(RF_BASE,RF_SINGEN_CTRL2);
state_singen_ctrl3 = BL_RD_REG(RF_BASE,RF_SINGEN_CTRL3);
state_sram_ctrl0 = BL_RD_REG(RF_BASE,RF_SRAM_CTRL0);
state_sram_ctrl1 = BL_RD_REG(RF_BASE,RF_SRAM_CTRL1);
state_sram_ctrl2 = BL_RD_REG(RF_BASE,RF_SRAM_CTRL2);
state_rf_resv_reg_1 = BL_RD_REG(RF_BASE,RF_RESV_REG_1);
state_pa1 = BL_RD_REG(RF_BASE,RF_PA1);
state_ten_ac = BL_RD_REG(RF_BASE,RF_TEN_AC);
state_rfif_dfe_ctrl0 = BL_RD_REG(RF_BASE,RFIF_DFE_CTRL0);
state_tbb = BL_RD_REG(RF_BASE,RF_TBB);
state_vco2 = BL_RD_REG(RF_BASE,RF_VCO2);
}
static void rf_pri_restore_state_for_cal()
{
BL_WR_REG(RF_BASE,RF_FSM_CTRL_HW,state_rf_fsm_ctrl_hw);
BL_WR_REG(RF_BASE,RFCTRL_HW_EN,state_rfctrl_hw_en);
BL_WR_REG(RF_BASE,RFCAL_CTRLEN,state_rfcal_ctrlen);
BL_WR_REG(RF_BASE,RF_PUCR1,state_pucr1);
BL_WR_REG(RF_BASE,RF_FBDV,state_fbdv);
BL_WR_REG(RF_BASE,RF_SDM1,state_sdm1);
BL_WR_REG(RF_BASE,RF_SDM2,state_sdm2);
BL_WR_REG(RF_BASE,RF_RBB3,state_rbb3);
BL_WR_REG(RF_BASE,RF_ADDA1,state_adda1);
BL_WR_REG(RF_BASE,RF_DFE_CTRL_0,state_dfe_ctrl_0);
BL_WR_REG(RF_BASE,RF_DFE_CTRL_3,state_dfe_ctrl_3);
BL_WR_REG(RF_BASE,RF_DFE_CTRL_6,state_dfe_ctrl_6);
BL_WR_REG(RF_BASE,RF_DFE_CTRL_7,state_dfe_ctrl_7);
BL_WR_REG(RF_BASE,RF_TRX_GAIN1,state_trx_gain1);
BL_WR_REG(RF_BASE,RF_SINGEN_CTRL0,state_singen_ctrl0);
BL_WR_REG(RF_BASE,RF_SINGEN_CTRL2,state_singen_ctrl2);
BL_WR_REG(RF_BASE,RF_SINGEN_CTRL3,state_singen_ctrl3);
BL_WR_REG(RF_BASE,RF_SRAM_CTRL0,state_sram_ctrl0);
BL_WR_REG(RF_BASE,RF_SRAM_CTRL1,state_sram_ctrl1);
BL_WR_REG(RF_BASE,RF_SRAM_CTRL2,state_sram_ctrl2);
BL_WR_REG(RF_BASE,RF_RESV_REG_1,state_rf_resv_reg_1);
BL_WR_REG(RF_BASE,RF_PA1,state_pa1);
BL_WR_REG(RF_BASE,RF_TEN_AC,state_ten_ac);
BL_WR_REG(RF_BASE,RFIF_DFE_CTRL0,state_rfif_dfe_ctrl0);
BL_WR_REG(RF_BASE,RF_TBB,state_tbb);
BL_WR_REG(RF_BASE,RF_VCO2,state_vco2);
}
static void rf_pri_singen_config(uint32_t fcw,uint32_t start_addr_i,uint32_t start_addr_q)
{
uint32_t tmpVal = 0;
tmpVal=BL_RD_REG(RF_BASE,RF_SINGEN_CTRL0);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_SINGEN_INC_STEP0,fcw);
BL_WR_REG(RF_BASE,RF_SINGEN_CTRL0,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_SINGEN_CTRL2);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_SINGEN_START_ADDR0_I,start_addr_i);
BL_WR_REG(RF_BASE,RF_SINGEN_CTRL2,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_SINGEN_CTRL3);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_SINGEN_START_ADDR0_Q,start_addr_q);
BL_WR_REG(RF_BASE,RF_SINGEN_CTRL3,tmpVal);
}
static void rf_pri_singen_start(void)
{
uint32_t tmpVal = 0;
tmpVal=BL_RD_REG(RF_BASE,RF_SINGEN_CTRL0);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_SINGEN_EN);
BL_WR_REG(RF_BASE,RF_SINGEN_CTRL0,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_SINGEN_CTRL0);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_SINGEN_EN);
BL_WR_REG(RF_BASE,RF_SINGEN_CTRL0,tmpVal);
}
static void rf_pri_singen_amplitude(uint32_t gain_i,uint32_t gain_q)
{
uint32_t tmpVal = 0;
tmpVal=BL_RD_REG(RF_BASE,RF_SINGEN_CTRL2);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_SINGEN_GAIN_I,gain_i);
BL_WR_REG(RF_BASE,RF_SINGEN_CTRL2,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_SINGEN_CTRL3);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_SINGEN_GAIN_Q,gain_q);
BL_WR_REG(RF_BASE,RF_SINGEN_CTRL3,tmpVal);
}
static uint32_t rf_pri_pm_pwr()
{
uint32_t tmpVal = 0;
int32_t pm_iacc=0;
int32_t pm_qacc=0;
tmpVal=BL_RD_REG(RF_BASE,RF_DFE_CTRL_6);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_RX_PM_FREQSHIFT_EN);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_RX_PM_EN);
BL_WR_REG(RF_BASE,RF_DFE_CTRL_6,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_DFE_CTRL_6);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_RX_PM_FREQSHIFT_EN);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_RX_PM_EN);
BL_WR_REG(RF_BASE,RF_DFE_CTRL_6,tmpVal);
while(1){
tmpVal=BL_RD_REG(RF_BASE,RF_DFE_CTRL_6);
if (BL_GET_REG_BITS_VAL(tmpVal,RF_RX_PM_DONE))
{
break;
}
}
pm_iacc=BL_RD_REG(RF_BASE,RF_DFE_CTRL_8);
pm_iacc=(pm_iacc<<7)>>(7+9);
pm_qacc=BL_RD_REG(RF_BASE,RF_DFE_CTRL_9);
pm_qacc=(pm_qacc<<7)>>(7+9);
tmpVal=BL_RD_REG(RF_BASE,RF_DFE_CTRL_6);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_RX_PM_FREQSHIFT_EN);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_RX_PM_EN);
BL_WR_REG(RF_BASE,RF_DFE_CTRL_6,tmpVal);
return pm_iacc*pm_iacc+pm_qacc*pm_qacc;
}
static void rf_pri_rccal_config(uint32_t iq,uint32_t rbb_fc)
{
uint32_t tmpVal = 0;
if(iq){
tmpVal=BL_RD_REG(RF_BASE,RF_RBB2);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_RBB_CAP1_FC_I,rbb_fc);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_RBB_CAP2_FC_I,rbb_fc);
BL_WR_REG(RF_BASE,RF_RBB2,tmpVal);
}else{
tmpVal=BL_RD_REG(RF_BASE,RF_RBB2);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_RBB_CAP1_FC_Q,rbb_fc);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_RBB_CAP2_FC_Q,rbb_fc);
BL_WR_REG(RF_BASE,RF_RBB2,tmpVal);
}
}
// static void rf_pri_sram_config(uint32_t addr_start,uint32_t addr_end)
// {
// uint32_t tmpVal = 0;
// tmpVal=BL_RD_REG(RF_BASE,RF_SRAM_CTRL0);
// tmpVal=BL_CLR_REG_BIT(tmpVal,RF_SRAM_SWAP);
// tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_SRAM_LINK_MODE,0x0);
// BL_WR_REG(RF_BASE,RF_SRAM_CTRL0,tmpVal);
// tmpVal=BL_RD_REG(RF_BASE,RF_SRAM_CTRL2);
// tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_SRAM_ADC_ADDR_START,0x0);
// tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_SRAM_ADC_ADDR_END,0x100);
// BL_WR_REG(RF_BASE,RF_SRAM_CTRL2,tmpVal);
// tmpVal=BL_RD_REG(RF_BASE,RF_SRAM_CTRL1);
// tmpVal=BL_CLR_REG_BIT(tmpVal,RF_SRAM_ADC_STS_CLR);
// tmpVal=BL_CLR_REG_BIT(tmpVal,RF_SRAM_ADC_LOOP_EN);
// BL_WR_REG(RF_BASE,RF_SRAM_CTRL1,tmpVal);
// }
// static void rf_pri_sram_start(void)
// {
// uint32_t tmpVal = 0;
// tmpVal=BL_RD_REG(RF_BASE,RF_SRAM_CTRL1);
// tmpVal=BL_CLR_REG_BIT(tmpVal,RF_SRAM_ADC_EN);
// BL_WR_REG(RF_BASE,RF_SRAM_CTRL1,tmpVal);
// tmpVal=BL_RD_REG(RF_BASE,RF_SRAM_CTRL1);
// tmpVal=BL_SET_REG_BIT(tmpVal,RF_SRAM_ADC_EN);
// BL_WR_REG(RF_BASE,RF_SRAM_CTRL1,tmpVal);
// while(1){
// tmpVal=BL_RD_REG(RF_BASE,RF_SRAM_CTRL1);
// if (BL_GET_REG_BITS_VAL(tmpVal,RF_SRAM_ADC_DONE))
// {
// break;
// }
// }
// tmpVal=BL_RD_REG(RF_BASE,RF_SRAM_CTRL1);
// tmpVal=BL_CLR_REG_BIT(tmpVal,RF_SRAM_ADC_EN);
// BL_WR_REG(RF_BASE,RF_SRAM_CTRL1,tmpVal);
// }
// static int32_t rf_pri_sram_mean(uint32_t iq,uint32_t sram_start_addr,uint32_t length)
// {
// // uint32_t tmpVal = 0;
// uint32_t *p_sram;
// int32_t sum=0;
// uint32_t j=0;
// p_sram=(uint32_t *)(0x42020000+sram_start_addr);
// rf_pri_sram_start();
// for(j=0;j<length;j++){
// if(iq){
// sum+=((p_sram[j]&0xffff)<<16)>>16;
// }else{
// sum+=(((p_sram[j]>>16)&0xffff)<<16)>>16;
// }
// }
// BL_WR_REG(RF_BASE,RF_RESV_REG_1,sum);
// return sum;
// }
static void rf_pri_roscal_config(uint32_t iq,uint32_t rosdac)
{
uint32_t tmpVal = 0;
if(iq){
tmpVal=BL_RD_REG(RF_BASE,RF_RBB1);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_ROSDAC_I,rosdac);
BL_WR_REG(RF_BASE,RF_RBB1,tmpVal);
}else{
tmpVal=BL_RD_REG(RF_BASE,RF_RBB1);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_ROSDAC_Q,rosdac);
BL_WR_REG(RF_BASE,RF_RBB1,tmpVal);
}
}
static void rf_pri_config_txgain(uint32_t gc_tbb_boost,uint32_t gc_tmx,uint32_t gc_tbb)
{
uint32_t tmpVal = 0;
tmpVal=BL_RD_REG(RF_BASE,RF_TRX_GAIN1);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_GC_TBB_BOOST,gc_tbb_boost);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_GC_TMX,gc_tmx);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_GC_TBB,gc_tbb);
BL_WR_REG(RF_BASE,RF_TRX_GAIN1,tmpVal);
}
static void rf_pri_start_txdfe()
{
uint32_t tmpVal = 0;
tmpVal=BL_RD_REG(RF_BASE,RFIF_DFE_CTRL0);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_TX_DFE_EN_4S);
tmpVal=BL_SET_REG_BIT(tmpVal,RFCKG_TXCLK_4S_ON);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TX_TEST_SEL,2);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_TX_DFE_EN_4S_EN);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_TX_DFE_EN_4S);
BL_WR_REG(RF_BASE,RFIF_DFE_CTRL0,tmpVal);
}
static void rf_pri_stop_txdfe()
{
uint32_t tmpVal = 0;
tmpVal=BL_RD_REG(RF_BASE,RFIF_DFE_CTRL0);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TX_TEST_SEL,0);
tmpVal=BL_CLR_REG_BIT(tmpVal,RFCKG_TXCLK_4S_ON);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_TX_DFE_EN_4S_EN);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_TX_DFE_EN_4S);
BL_WR_REG(RF_BASE,RFIF_DFE_CTRL0,tmpVal);
}
static void rf_pri_start_rxdfe()
{
uint32_t tmpVal = 0;
tmpVal=BL_RD_REG(RF_BASE,RFIF_DFE_CTRL0);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_RX_DFE_EN_4S);
tmpVal=BL_SET_REG_BIT(tmpVal,RFCKG_RXCLK_4S_ON);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_RX_DFE_EN_4S_EN);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_RX_DFE_EN_4S);
BL_WR_REG(RF_BASE,RFIF_DFE_CTRL0,tmpVal);
}
static void rf_pri_stop_rxdfe()
{
uint32_t tmpVal = 0;
tmpVal=BL_RD_REG(RF_BASE,RFIF_DFE_CTRL0);
tmpVal=BL_CLR_REG_BIT(tmpVal,RFCKG_RXCLK_4S_ON);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_RX_DFE_EN_4S_EN);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_RX_DFE_EN_4S);
BL_WR_REG(RF_BASE,RFIF_DFE_CTRL0,tmpVal);
}
static int32_t rf_pri_pm_pwr_avg(uint32_t iq,uint32_t acc_len)
{
uint32_t tmpVal = 0;
int32_t pm_iq_avg=0;
tmpVal=BL_RD_REG(RF_BASE,RF_DFE_CTRL_6);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_RX_PM_FREQSHIFT_EN);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_RX_PM_EN);
BL_WR_REG(RF_BASE,RF_DFE_CTRL_6,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_DFE_CTRL_7);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_RX_PM_ACC_LEN,acc_len);
BL_WR_REG(RF_BASE,RF_DFE_CTRL_7,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_DFE_CTRL_6);
// tmpVal=BL_SET_REG_BIT(tmpVal,RF_RX_PM_FREQSHIFT_EN);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_RX_PM_EN);
BL_WR_REG(RF_BASE,RF_DFE_CTRL_6,tmpVal);
while(1){
tmpVal=BL_RD_REG(RF_BASE,RF_DFE_CTRL_6);
if (BL_GET_REG_BITS_VAL(tmpVal,RF_RX_PM_DONE))
{
break;
}
}
if(iq){
pm_iq_avg=BL_RD_REG(RF_BASE,RF_DFE_CTRL_8);
}else{
pm_iq_avg=BL_RD_REG(RF_BASE,RF_DFE_CTRL_9);
}
pm_iq_avg=(pm_iq_avg<<7)>>(7);
tmpVal=BL_RD_REG(RF_BASE,RF_DFE_CTRL_6);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_RX_PM_FREQSHIFT_EN);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_RX_PM_EN);
BL_WR_REG(RF_BASE,RF_DFE_CTRL_6,tmpVal);
return pm_iq_avg;
}
static void rf_pri_txcal_config(uint32_t param_ind,int32_t val)
{
uint32_t tmpVal = 0;
if(param_ind==E_RF_GAIN){
tmpVal=BL_RD_REG(RF_BASE,RF_DFE_CTRL_0);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TX_IQC_GAIN,val);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_TX_IQC_GAIN_EN);
BL_WR_REG(RF_BASE,RF_DFE_CTRL_0,tmpVal);
}else if(param_ind==E_RF_PHASE){
// rf_pri_printf("param_ind=%d,val=%d\r\n",param_ind,val);
val = val >= 0 ? val : (val+0x400);
tmpVal=BL_RD_REG(RF_BASE,RF_DFE_CTRL_0);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TX_IQC_PHASE,val);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_TX_IQC_PHASE_EN);
BL_WR_REG(RF_BASE,RF_DFE_CTRL_0,tmpVal);
}else if(param_ind==E_RF_BRANCH_I){
tmpVal=BL_RD_REG(RF_BASE,RF_TBB);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TBB_TOSDAC_I,val);
BL_WR_REG(RF_BASE,RF_TBB,tmpVal);
}else if(param_ind==E_RF_BRANCH_Q){
tmpVal=BL_RD_REG(RF_BASE,RF_TBB);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TBB_TOSDAC_Q,val);
BL_WR_REG(RF_BASE,RF_TBB,tmpVal);
}
}
static int32_t rf_pri_txcal_search_core(uint32_t param_ind,uint32_t center,uint32_t delta,uint32_t meas_freq)
{
uint32_t tmpVal = 0;
int32_t x_center = center;
int32_t x_delta = delta;
int32_t x_left, x_right;
uint32_t y_center, y_left, y_right;
// measure center
rf_pri_txcal_config(param_ind,x_center);
rf_pri_wait_us(10);
tmpVal=BL_RD_REG(RF_BASE,RF_DFE_CTRL_6);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_RX_PM_FREQSHIFT_CW,meas_freq<<10);
BL_WR_REG(RF_BASE,RF_DFE_CTRL_6,tmpVal);
y_center = rf_pri_pm_pwr();
do {
if (x_delta == 0) break;
x_left = x_center - x_delta;
x_right = x_center + x_delta;
if (param_ind == E_RF_BRANCH_I || param_ind == E_RF_BRANCH_Q){
x_left = x_left < 0 ? 0 : x_left;
x_right = x_right > 63 ? 63 : x_right;
}
else if (param_ind == E_RF_GAIN){
x_left = x_left < 0 ? 0 : x_left;
x_right = x_right > 2047 ? 2047 : x_right;
}
else if (param_ind == E_RF_PHASE){
x_left = x_left < -512 ? -512 : x_left;
x_right = x_right > 511 ? 511 : x_right;
}
x_delta = x_delta >> 1;
// rf_pri_printf("param_ind=%d,x_delta=%d,x_center=%d,x_left=%d,x_right=%d,y_center=%d,y_left=%d,y_right=%d\r\n",param_ind,x_delta,x_center,x_left,x_right,y_center,y_left,y_right);
// measure left
rf_pri_txcal_config(param_ind,x_left);
rf_pri_wait_us(10);
y_left = rf_pri_pm_pwr();
if (y_center >= y_left) {
x_center = x_left;
y_center = y_left;
continue;
}
// measure right
rf_pri_txcal_config(param_ind,x_right);
rf_pri_wait_us(10);
y_right = rf_pri_pm_pwr();
if (y_center >= y_right) {
x_center = x_right;
y_center = y_right;
continue;
}
} while(x_delta);
return x_center;
}
static void rf_pri_txcal_config_hw(){
uint32_t tmpVal = 0;
tmpVal=BL_RD_REG(RF_BASE,RF_TOSDAC_CTRL_HW1);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TBB_TOSDAC_I_GC0,rf_calib_data->txcal[0].tosdac_i);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TBB_TOSDAC_Q_GC0,rf_calib_data->txcal[0].tosdac_q);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TBB_TOSDAC_I_GC1,rf_calib_data->txcal[1].tosdac_i);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TBB_TOSDAC_Q_GC1,rf_calib_data->txcal[1].tosdac_q);
BL_WR_REG(RF_BASE,RF_TOSDAC_CTRL_HW1,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_TOSDAC_CTRL_HW2);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TBB_TOSDAC_I_GC2,rf_calib_data->txcal[2].tosdac_i);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TBB_TOSDAC_Q_GC2,rf_calib_data->txcal[2].tosdac_q);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TBB_TOSDAC_I_GC3,rf_calib_data->txcal[3].tosdac_i);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TBB_TOSDAC_Q_GC3,rf_calib_data->txcal[3].tosdac_q);
BL_WR_REG(RF_BASE,RF_TOSDAC_CTRL_HW2,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_TOSDAC_CTRL_HW3);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TBB_TOSDAC_I_GC4,rf_calib_data->txcal[4].tosdac_i);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TBB_TOSDAC_Q_GC4,rf_calib_data->txcal[4].tosdac_q);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TBB_TOSDAC_I_GC5,rf_calib_data->txcal[5].tosdac_i);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TBB_TOSDAC_Q_GC5,rf_calib_data->txcal[5].tosdac_q);
BL_WR_REG(RF_BASE,RF_TOSDAC_CTRL_HW3,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_TOSDAC_CTRL_HW4);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TBB_TOSDAC_I_GC6,rf_calib_data->txcal[6].tosdac_i);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TBB_TOSDAC_Q_GC6,rf_calib_data->txcal[6].tosdac_q);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TBB_TOSDAC_I_GC7,rf_calib_data->txcal[7].tosdac_i);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TBB_TOSDAC_Q_GC7,rf_calib_data->txcal[7].tosdac_q);
BL_WR_REG(RF_BASE,RF_TOSDAC_CTRL_HW4,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_TX_IQ_GAIN_HW0);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TX_IQ_GAIN_COMP_GC0,rf_calib_data->txcal[0].tx_iq_gain_comp);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TX_IQ_PHASE_COMP_GC0,rf_calib_data->txcal[0].tx_iq_phase_comp);
BL_WR_REG(RF_BASE,RF_TX_IQ_GAIN_HW0,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_TX_IQ_GAIN_HW1);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TX_IQ_GAIN_COMP_GC1,rf_calib_data->txcal[1].tx_iq_gain_comp);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TX_IQ_PHASE_COMP_GC1,rf_calib_data->txcal[1].tx_iq_phase_comp);
BL_WR_REG(RF_BASE,RF_TX_IQ_GAIN_HW1,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_TX_IQ_GAIN_HW2);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TX_IQ_GAIN_COMP_GC2,rf_calib_data->txcal[2].tx_iq_gain_comp);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TX_IQ_PHASE_COMP_GC2,rf_calib_data->txcal[2].tx_iq_phase_comp);
BL_WR_REG(RF_BASE,RF_TX_IQ_GAIN_HW2,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_TX_IQ_GAIN_HW3);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TX_IQ_GAIN_COMP_GC3,rf_calib_data->txcal[3].tx_iq_gain_comp);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TX_IQ_PHASE_COMP_GC3,rf_calib_data->txcal[3].tx_iq_phase_comp);
BL_WR_REG(RF_BASE,RF_TX_IQ_GAIN_HW3,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_TX_IQ_GAIN_HW4);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TX_IQ_GAIN_COMP_GC4,rf_calib_data->txcal[4].tx_iq_gain_comp);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TX_IQ_PHASE_COMP_GC4,rf_calib_data->txcal[4].tx_iq_phase_comp);
BL_WR_REG(RF_BASE,RF_TX_IQ_GAIN_HW4,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_TX_IQ_GAIN_HW5);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TX_IQ_GAIN_COMP_GC5,rf_calib_data->txcal[5].tx_iq_gain_comp);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TX_IQ_PHASE_COMP_GC5,rf_calib_data->txcal[5].tx_iq_phase_comp);
BL_WR_REG(RF_BASE,RF_TX_IQ_GAIN_HW5,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_TX_IQ_GAIN_HW6);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TX_IQ_GAIN_COMP_GC6,rf_calib_data->txcal[6].tx_iq_gain_comp);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TX_IQ_PHASE_COMP_GC6,rf_calib_data->txcal[6].tx_iq_phase_comp);
BL_WR_REG(RF_BASE,RF_TX_IQ_GAIN_HW6,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_TX_IQ_GAIN_HW7);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TX_IQ_GAIN_COMP_GC7,rf_calib_data->txcal[7].tx_iq_gain_comp);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TX_IQ_PHASE_COMP_GC7,rf_calib_data->txcal[7].tx_iq_phase_comp);
BL_WR_REG(RF_BASE,RF_TX_IQ_GAIN_HW7,tmpVal);
}
static uint32_t rf_pri_roscal_iq(uint32_t iq,uint32_t sram_start_addr,uint32_t length)
{
uint32_t i=0;
uint32_t step=32;
uint32_t seq_pattern=0;
uint32_t rosdac=0;
int32_t adc_mean_iq=0;
for(i=0;i<6;i++){
rosdac+=step;
rf_pri_roscal_config(iq,rosdac);
adc_mean_iq=rf_pri_pm_pwr_avg(iq,1024);
// rf_pri_printf("iq=%d,i=%d,rosdac=%d,adc_mean_iq=%d\r\n",iq,i,rosdac,adc_mean_iq);
if(adc_mean_iq>0){
// if(rf_pri_sram_mean(iq,sram_start_addr,length)>0){
rosdac-=step;
}else{
rosdac=rosdac;
}
step=step>>1;
}
for(i=0;i<63;i++){
rf_pri_roscal_config(iq,rosdac);
adc_mean_iq=rf_pri_pm_pwr_avg(iq,1024);
// rf_pri_printf("iq=%d,i=%d,rosdac=%d,adc_mean_iq=%d\r\n",iq,i,rosdac,adc_mean_iq);
if(adc_mean_iq>0){
// if(rf_pri_sram_mean(iq,sram_start_addr,length)>0){
rosdac--;
seq_pattern=((seq_pattern<<1)+1)&0xf;
}else{
rosdac++;
seq_pattern=(seq_pattern<<1)&0xf;
}
if(seq_pattern==0xa || seq_pattern==0x5)break;
}
return rosdac;
}
static uint32_t rf_pri_rccal_iq(uint32_t iq)
{
uint32_t tmpVal = 0;
uint32_t i=0;
uint32_t step=32;
uint32_t seq_pattern=0;
uint32_t k1=3;
uint32_t k2=181;
uint32_t rbb_fc=0;
double rccal_power_scale=0.9*0.9;
uint32_t rccal_ref=0;
uint32_t rccal_val=0;
if(iq)
{
tmpVal=BL_RD_REG(RF_BASE,RF_DFE_CTRL_3);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_RX_ADC_4S_I_EN);
BL_WR_REG(RF_BASE,RF_DFE_CTRL_3,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_DFE_CTRL_3);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_RX_ADC_4S_Q_EN);
BL_WR_REG(RF_BASE,RF_DFE_CTRL_3,tmpVal);
}else
{
tmpVal=BL_RD_REG(RF_BASE,RF_DFE_CTRL_3);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_RX_ADC_4S_I_EN);
BL_WR_REG(RF_BASE,RF_DFE_CTRL_3,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_DFE_CTRL_3);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_RX_ADC_4S_Q_EN);
BL_WR_REG(RF_BASE,RF_DFE_CTRL_3,tmpVal);
}
tmpVal=BL_RD_REG(RF_BASE,RF_TRX_GAIN1);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_GC_RBB1,1);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_GC_RBB2,3);
BL_WR_REG(RF_BASE,RF_TRX_GAIN1,tmpVal);
rf_pri_singen_config(k1,0x0,0x300);
rf_pri_singen_amplitude(0x3ff,0x3ff);
rf_pri_singen_start();
tmpVal=BL_RD_REG(RF_BASE,RF_DFE_CTRL_6);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_RX_PM_FREQSHIFT_CW,k1<<10);
BL_WR_REG(RF_BASE,RF_DFE_CTRL_6,tmpVal);
rf_pri_pm_pwr_avg(iq,1024);
rccal_ref=(uint32_t)(rccal_power_scale*rf_pri_pm_pwr());
tmpVal=BL_RD_REG(RF_BASE,RF_TRX_GAIN1);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_GC_RBB1,2);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_GC_RBB2,6);
BL_WR_REG(RF_BASE,RF_TRX_GAIN1,tmpVal);
rf_pri_singen_config(k2,0x0,0x300);
rf_pri_singen_start();
tmpVal=BL_RD_REG(RF_BASE,RF_DFE_CTRL_6);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_RX_PM_FREQSHIFT_CW,k2<<10);
BL_WR_REG(RF_BASE,RF_DFE_CTRL_6,tmpVal);
// step=32;
for(i=0;i<6;i++){
rbb_fc+=step;
rf_pri_rccal_config(iq,rbb_fc);
rccal_val = rf_pri_pm_pwr();
// rf_pri_printf("rccal_ref=%d,iq=%d,step=%d,rbb_fc=%d,rccal_val=%d\r\n",rccal_ref,iq,step,rbb_fc,rccal_val);
if(rccal_val>rccal_ref){
rbb_fc=rbb_fc;
}else{
rbb_fc-=step;
}
step=step>>1;
}
// rf_pri_rccal_config(iq,rbb_fc);
// seq_pattern=0;
for(i=0;i<63;i++){
rf_pri_rccal_config(iq,rbb_fc);
rccal_val = rf_pri_pm_pwr();
if(rccal_val>rccal_ref){
rbb_fc++;
seq_pattern=((seq_pattern<<1)+1)&0xf;
}else{
rbb_fc--;
seq_pattern=(seq_pattern<<1)&0xf;
}
if(seq_pattern==0xa || seq_pattern==0x5)break;
}
if(i==63){
return 2;
}else{
return 3;
}
}
static uint16_t rf_pri_fcal_meas(uint32_t cw)
{
uint32_t tmpVal = 0;
uint16_t cnt;
tmpVal=BL_RD_REG(RF_BASE,RF_VCO1);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_LO_VCO_FREQ_CW,cw);
BL_WR_REG(RF_BASE,RF_VCO1,tmpVal);
rf_pri_wait_us(100);
tmpVal=BL_RD_REG(RF_BASE,RF_VCO4);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_FCAL_CNT_START);
BL_WR_REG(RF_BASE,RF_VCO4,tmpVal);
while (1)
{
tmpVal=BL_RD_REG(RF_BASE,RF_VCO4);
if (BL_GET_REG_BITS_VAL(tmpVal,RF_FCAL_CNT_RDY))
{
break;
}
}
tmpVal=BL_RD_REG(RF_BASE,RF_VCO3);
cnt = BL_GET_REG_BITS_VAL(tmpVal,RF_FCAL_CNT_OP);
tmpVal=BL_RD_REG(RF_BASE,RF_VCO4);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_FCAL_CNT_START);
BL_WR_REG(RF_BASE,RF_VCO4,tmpVal);
return cnt;
}
static void rf_pri_singen_pwrmx_dc(uint32_t amp,uint32_t num_data,int32_t adc_mean_max,int32_t adc_mean_min){
uint32_t step;
int32_t adc_mean_i=0;
step = amp>>1;
while(1){
rf_pri_singen_amplitude(amp,amp);
rf_pri_singen_start();
// rf_pri_start_txdfe();
// rf_pri_start_rxdfe();
rf_pri_wait_us(10);
adc_mean_i=rf_pri_pm_pwr_avg(1,num_data);
adc_mean_i=adc_mean_i>>10;
rf_pri_printf("amp=%ld,step=%ld,adc_mean_i=%ld\r\n",amp,step,adc_mean_i);
// rf_pri_printf("adc_mean_max=%ld,adc_mean_min=%ld\r\n",adc_mean_max,adc_mean_min);
// rf_pri_printf("adc_mean_i>adc_mean_max=%ld\r\n",adc_mean_i>adc_mean_max);
// rf_pri_printf("adc_mean_i<adc_mean_min=%ld\r\n",adc_mean_i<adc_mean_min);
if(adc_mean_i>adc_mean_max)
amp-=step;
else if(adc_mean_i<adc_mean_min)
amp+=step;
else
break;
if(step>0)
step=step>>1;
else
break;
}
}
#if 0
void rf_pri_channel_opt(uint32_t channel_index)
{
uint32_t tmpVal = 0;
if(channel_index >= E_RF_CHANNEL_2404M && channel_index <= E_RF_CHANNEL_2436M){
tmpVal=BL_RD_REG(RF_BASE,RF_TMX);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TMX_CS,6);
BL_WR_REG(RF_BASE,RF_TMX,tmpVal);
}else{
tmpVal=BL_RD_REG(RF_BASE,RF_TMX);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TMX_CS,5);
BL_WR_REG(RF_BASE,RF_TMX,tmpVal);
}
}
#endif
void rf_pri_config_bandwidth(uint32_t bw)
{
uint32_t tmpVal = 0;
// Set RF RBB bandwidth, 0: n/a, 1: 5M mode, 2:10M mode, 3: 20M mode
tmpVal=BL_RD_REG(RF_BASE,RF_RBB3);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_RBB_BW,bw);
BL_WR_REG(RF_BASE,RF_RBB3,tmpVal);
}
void rf_pri_txcal(void)
{
uint32_t tmpVal = 0;
uint32_t gain=1024;
int32_t phase=0;
uint32_t tos_i=32;
uint32_t tos_q=32;
uint32_t k1=61;
int32_t adc_mean_min=192;
int32_t adc_mean_max=320;
// int32_t adc_mean_i=0;
uint32_t num_data=1024;
uint32_t i=0;
// uint32_t j=0;
uint32_t amp;
// uint32_t step;
tmpVal=BL_RD_REG(RF_BASE,RFCAL_STATUS);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_LO_LEAKCAL_STATUS,0x1);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TIQCAL_STATUS_RESV,0x1);
BL_WR_REG(RF_BASE,RFCAL_STATUS,tmpVal);
rf_pri_save_state_for_cal();
rf_pri_config_mode(E_RF_MODE_TXCAL);
rf_pri_config_channel(E_RF_CHANNEL_2440M);
tmpVal=BL_RD_REG(RF_BASE,RFCAL_CTRLEN);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_LO_LEAKCAL_EN);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_TIQCAL_EN);
BL_WR_REG(RF_BASE,RFCAL_CTRLEN,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_RBB3);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_PWR_DET_EN);
BL_WR_REG(RF_BASE,RF_RBB3,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_PA1);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_PA_PWRMX_DAC_PN_SWITCH);
// tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_PA_PWRMX_OSDAC,5);
BL_WR_REG(RF_BASE,RF_PA1,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_TMX);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TMX_CS,3);//rf_calib_data->cal.tmx_csh);//3);
BL_WR_REG(RF_BASE,RF_TMX,tmpVal);
#if 0
uint32_t k2=3;
uint32_t tmxcs_pwr=0;
uint32_t tmxcs_pwr_max=0;
uint32_t tmxcs_max=0;
tmpVal=BL_RD_REG(RF_BASE,RF_TMX);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TMX_CS,3);
BL_WR_REG(RF_BASE,RF_TMX,tmpVal);
rf_pri_singen_config(k2,0x0,0x300);
tmpVal=BL_RD_REG(RF_BASE,RF_PA1);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_PA_ATT_GC,0);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_PA_PWRMX_OSDAC,0);
BL_WR_REG(RF_BASE,RF_PA1,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_TEN_AC);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_ATEST_GAIN_R5,4);
BL_WR_REG(RF_BASE,RF_TEN_AC,tmpVal);
rf_pri_config_txgain(0,3,3);
amp=0x100;
rf_pri_singen_pwrmx_dc(amp,num_data,adc_mean_min,adc_mean_min>>1);
rf_pri_pm_pwr_avg(1,4096);
tmpVal=BL_RD_REG(RF_BASE,RF_DFE_CTRL_6);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_RX_PM_FREQSHIFT_CW,0<<10);
BL_WR_REG(RF_BASE,RF_DFE_CTRL_6,tmpVal);
for(i=0;i<8;i++){
tmpVal=BL_RD_REG(RF_BASE,RF_TMX);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TMX_CS,i);
BL_WR_REG(RF_BASE,RF_TMX,tmpVal);
rf_pri_wait_us(10);
tmxcs_pwr=rf_pri_pm_pwr();
rf_pri_printf("tmx_cs=%ld, tmxcs_pwr=%ld\r\n",i,tmxcs_pwr);
if(tmxcs_pwr>tmxcs_pwr_max){
tmxcs_pwr_max=tmxcs_pwr;
tmxcs_max=i;
}
}
if(tmxcs_max<5){
tmpVal=BL_RD_REG(RF_BASE,RF_TMX);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TMX_CS,tmxcs_max+1);
BL_WR_REG(RF_BASE,RF_TMX,tmpVal);
rf_pri_wait_us(10);
tmxcs_pwr=rf_pri_pm_pwr();
rf_pri_printf("tmx_cs=%ld, tmxcs_pwr=%ld\r\n",tmxcs_max+1,tmxcs_pwr);
rf_pri_printf("tmxcs_pwr=%ld,tmxcs_pwr_max=%ld\r\n",tmxcs_pwr*28,tmxcs_pwr_max*25);
if((tmxcs_pwr*28)>(tmxcs_pwr_max*25)){
tmxcs_max++;
}
rf_calib_data->cal.tmx_csh=tmxcs_max+2;
if(rf_calib_data->cal.tmx_csh<7){
rf_calib_data->cal.tmx_csl=rf_calib_data->cal.tmx_csh+1;
}else{
rf_calib_data->cal.tmx_csl=rf_calib_data->cal.tmx_csh;
}
}else{
rf_calib_data->cal.tmx_csh=7;
rf_calib_data->cal.tmx_csl=7;
}
rf_pri_printf("tmx_csh=%d, tmx_csl=%d\r\n",rf_calib_data->cal.tmx_csh,rf_calib_data->cal.tmx_csl);
tmpVal=BL_RD_REG(RF_BASE,RF_TMX);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TMX_CS,rf_calib_data->cal.tmx_csh);
BL_WR_REG(RF_BASE,RF_TMX,tmpVal);
#endif
rf_pri_singen_config(k1,0x0,0x300);
for(i=0;i<8;i++){
tmpVal=BL_RD_REG(RF_BASE,RF_PA1);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_PA_ATT_GC,txcal_para[i][0]);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_PA_PWRMX_OSDAC,txcal_para[i][2]);
BL_WR_REG(RF_BASE,RF_PA1,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_TEN_AC);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_ATEST_GAIN_R5,txcal_para[i][1]);
BL_WR_REG(RF_BASE,RF_TEN_AC,tmpVal);
// rf_pri_config_txgain(tx_pwr_table[i<<1][0],tx_pwr_table[i<<1][2],tx_pwr_table[i<<1][3]);
rf_pri_config_txgain(tx_pwr_table[i<<1][0],7,tx_pwr_table[i<<1][3]);
rf_pri_wait_us(10);
amp=txcal_para[i][3];
rf_pri_singen_pwrmx_dc(amp,num_data,adc_mean_max,adc_mean_min);
rf_pri_pm_pwr_avg(1,4096);
// LO leakage cal
tos_i = rf_pri_txcal_search_core(E_RF_BRANCH_I,32,16,k1);
rf_pri_txcal_config(E_RF_BRANCH_I,tos_i);
tos_q = rf_pri_txcal_search_core(E_RF_BRANCH_Q,32,16,k1);
rf_pri_txcal_config(E_RF_BRANCH_Q,tos_q);
// LO leakage cal double search
tos_i = rf_pri_txcal_search_core(E_RF_BRANCH_I,tos_i,2,k1);
rf_pri_txcal_config(E_RF_BRANCH_I,tos_i);
// Gain cal
gain = rf_pri_txcal_search_core(E_RF_GAIN,0x400,0x80,2*k1);
rf_pri_txcal_config(E_RF_GAIN,gain);
// Phase cal
phase = rf_pri_txcal_search_core(E_RF_PHASE,0,0x40,2*k1);
rf_pri_txcal_config(E_RF_PHASE,phase);
// Gain cal double search
gain = rf_pri_txcal_search_core(E_RF_GAIN,gain,0x10,2*k1);
rf_pri_txcal_config(E_RF_GAIN,gain);
// Phase cal double search
phase = rf_pri_txcal_search_core(E_RF_PHASE,0,0x8,2*k1);
rf_pri_txcal_config(E_RF_PHASE,phase);
rf_calib_data->txcal[E_RF_TXCAL_GAIN_CNT-1-i].tosdac_i = tos_i;
rf_calib_data->txcal[E_RF_TXCAL_GAIN_CNT-1-i].tosdac_q = tos_q;
rf_calib_data->txcal[E_RF_TXCAL_GAIN_CNT-1-i].tx_iq_gain_comp = gain;
rf_calib_data->txcal[E_RF_TXCAL_GAIN_CNT-1-i].tx_iq_phase_comp = phase;
rf_pri_printf("tosdac_i=%ld,tosdac_q=%ld,tx_iq_gain_comp=%ld,tx_iq_phase_comp=%ld\r\n",tos_i,tos_q,gain,phase);
}
rf_pri_txcal_config_hw();
tmpVal=BL_RD_REG(RF_BASE,RFCAL_CTRLEN);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_LO_LEAKCAL_EN);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_TIQCAL_EN);
BL_WR_REG(RF_BASE,RFCAL_CTRLEN,tmpVal);
rf_pri_restore_state_for_cal();
tmpVal=BL_RD_REG(RF_BASE,RFCAL_STATUS);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_LO_LEAKCAL_STATUS,0x3);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TIQCAL_STATUS_RESV,0x3);
BL_WR_REG(RF_BASE,RFCAL_STATUS,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_TBB);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TBB_TOSDAC_I,rf_calib_data->txcal[3].tosdac_i);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TBB_TOSDAC_Q,rf_calib_data->txcal[3].tosdac_q);
BL_WR_REG(RF_BASE,RF_TBB,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_DFE_CTRL_0);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TX_IQC_GAIN,rf_calib_data->txcal[3].tx_iq_gain_comp);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TX_IQC_PHASE,rf_calib_data->txcal[3].tx_iq_phase_comp);
BL_WR_REG(RF_BASE,RF_DFE_CTRL_0,tmpVal);
}
void rf_pri_roscal(void){
uint32_t tmpVal = 0;
uint32_t sram_start_addr=0;
uint32_t sram_length=32;
uint32_t rosdac=32;
tmpVal=BL_RD_REG(RF_BASE,RFCAL_STATEEN);
if(BL_GET_REG_BITS_VAL(tmpVal,RF_ROSCAL_STEN)==0)
{
tmpVal=BL_RD_REG(RF_BASE,RFCAL_STATUS);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_ROS_STATUS,0x0);
BL_WR_REG(RF_BASE,RFCAL_STATUS,tmpVal);
return;
}else
{
tmpVal=BL_RD_REG(RF_BASE,RFCAL_STATUS);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_ROS_STATUS,0x1);
BL_WR_REG(RF_BASE,RFCAL_STATUS,tmpVal);
}
rf_pri_save_state_for_cal();
rf_pri_config_mode(E_RF_MODE_ROSCAL);
tmpVal=BL_RD_REG(RF_BASE,RFCAL_CTRLEN);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_ROSCAL_EN);
BL_WR_REG(RF_BASE,RFCAL_CTRLEN,tmpVal);
rf_pri_config_channel(E_RF_CHANNEL_2440M);
// rf_pri_sram_config(0x0,sram_length);
#if 0
tmpVal=BL_RD_REG(RF_BASE,RF_TRX_GAIN1);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_GC_RBB2,6);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_GC_RBB1,3);
BL_WR_REG(RF_BASE,RF_TRX_GAIN1,tmpVal);
rosdac=rf_pri_roscal_iq(1,sram_start_addr,sram_length);
rf_calib_data->rxcal[3].rosdac_i=rosdac;
tmpVal=BL_RD_REG(RF_BASE,RF_ROSDAC_CTRL_HW2);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_ROSDAC_I_GC3,rosdac);
BL_WR_REG(RF_BASE,RF_ROSDAC_CTRL_HW2,tmpVal);
rf_pri_printf("rosdac_i_gc3=%ld\r\n",rosdac);
rosdac=rf_pri_roscal_iq(0,sram_start_addr,sram_length);
rf_calib_data->rxcal[3].rosdac_q=rosdac;
tmpVal=BL_RD_REG(RF_BASE,RF_ROSDAC_CTRL_HW2);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_ROSDAC_Q_GC3,rosdac);
BL_WR_REG(RF_BASE,RF_ROSDAC_CTRL_HW2,tmpVal);
rf_pri_printf("rosdac_q_gc3=%ld\r\n",rosdac);
tmpVal=BL_RD_REG(RF_BASE,RF_TRX_GAIN1);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_GC_RBB1,2);
BL_WR_REG(RF_BASE,RF_TRX_GAIN1,tmpVal);
rosdac=rf_pri_roscal_iq(1,sram_start_addr,sram_length);
rf_calib_data->rxcal[2].rosdac_i=rosdac;
tmpVal=BL_RD_REG(RF_BASE,RF_ROSDAC_CTRL_HW2);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_ROSDAC_I_GC2,rosdac);
BL_WR_REG(RF_BASE,RF_ROSDAC_CTRL_HW2,tmpVal);
rf_pri_printf("rosdac_i_gc2=%ld\r\n",rosdac);
rosdac=rf_pri_roscal_iq(0,sram_start_addr,sram_length);
rf_calib_data->rxcal[2].rosdac_q=rosdac;
tmpVal=BL_RD_REG(RF_BASE,RF_ROSDAC_CTRL_HW2);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_ROSDAC_Q_GC2,rosdac);
BL_WR_REG(RF_BASE,RF_ROSDAC_CTRL_HW2,tmpVal);
rf_pri_printf("rosdac_q_gc2=%ld\r\n",rosdac);
tmpVal=BL_RD_REG(RF_BASE,RF_TRX_GAIN1);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_GC_RBB1,1);
BL_WR_REG(RF_BASE,RF_TRX_GAIN1,tmpVal);
rosdac=rf_pri_roscal_iq(1,sram_start_addr,sram_length);
rf_calib_data->rxcal[1].rosdac_i=rosdac;
tmpVal=BL_RD_REG(RF_BASE,RF_ROSDAC_CTRL_HW1);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_ROSDAC_I_GC1,rosdac);
BL_WR_REG(RF_BASE,RF_ROSDAC_CTRL_HW1,tmpVal);
rf_pri_printf("rosdac_i_gc1=%ld\r\n",rosdac);
rosdac=rf_pri_roscal_iq(0,sram_start_addr,sram_length);
rf_calib_data->rxcal[1].rosdac_q=rosdac;
tmpVal=BL_RD_REG(RF_BASE,RF_ROSDAC_CTRL_HW1);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_ROSDAC_Q_GC1,rosdac);
BL_WR_REG(RF_BASE,RF_ROSDAC_CTRL_HW1,tmpVal);
rf_pri_printf("rosdac_q_gc1=%ld\r\n",rosdac);
tmpVal=BL_RD_REG(RF_BASE,RF_TRX_GAIN1);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_GC_RBB1,0);
BL_WR_REG(RF_BASE,RF_TRX_GAIN1,tmpVal);
rosdac=rf_pri_roscal_iq(1,sram_start_addr,sram_length);
rf_calib_data->rxcal[0].rosdac_i=rosdac;
tmpVal=BL_RD_REG(RF_BASE,RF_ROSDAC_CTRL_HW1);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_ROSDAC_I_GC0,rosdac);
BL_WR_REG(RF_BASE,RF_ROSDAC_CTRL_HW1,tmpVal);
rf_pri_printf("rosdac_i_gc0=%ld\r\n",rosdac);
rosdac=rf_pri_roscal_iq(0,sram_start_addr,sram_length);
rf_calib_data->rxcal[0].rosdac_q=rosdac;
tmpVal=BL_RD_REG(RF_BASE,RF_ROSDAC_CTRL_HW1);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_ROSDAC_Q_GC0,rosdac);
BL_WR_REG(RF_BASE,RF_ROSDAC_CTRL_HW1,tmpVal);
rf_pri_printf("rosdac_q_gc0=%ld\r\n",rosdac);
#else
tmpVal=BL_RD_REG(RF_BASE,RF_TRX_GAIN1);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_GC_RBB2,6);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_GC_RBB1,3);
BL_WR_REG(RF_BASE,RF_TRX_GAIN1,tmpVal);
//***********************************************
rosdac=rf_pri_roscal_iq(1,sram_start_addr,sram_length);
rf_calib_data->rxcal[3].rosdac_i=rosdac;
tmpVal=BL_RD_REG(RF_BASE,RF_ROSDAC_CTRL_HW2);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_ROSDAC_I_GC3,rosdac);
BL_WR_REG(RF_BASE,RF_ROSDAC_CTRL_HW2,tmpVal);
rf_pri_printf("rosdac_i_gc3=%ld\r\n",rosdac);
rf_calib_data->rxcal[2].rosdac_i=rosdac;
tmpVal=BL_RD_REG(RF_BASE,RF_ROSDAC_CTRL_HW2);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_ROSDAC_I_GC2,rosdac);
BL_WR_REG(RF_BASE,RF_ROSDAC_CTRL_HW2,tmpVal);
rf_pri_printf("rosdac_i_gc2=%ld\r\n",rosdac);
rf_calib_data->rxcal[1].rosdac_i=rosdac;
tmpVal=BL_RD_REG(RF_BASE,RF_ROSDAC_CTRL_HW1);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_ROSDAC_I_GC1,rosdac);
BL_WR_REG(RF_BASE,RF_ROSDAC_CTRL_HW1,tmpVal);
rf_pri_printf("rosdac_i_gc1=%ld\r\n",rosdac);
rf_calib_data->rxcal[0].rosdac_i=rosdac;
tmpVal=BL_RD_REG(RF_BASE,RF_ROSDAC_CTRL_HW1);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_ROSDAC_I_GC0,rosdac);
BL_WR_REG(RF_BASE,RF_ROSDAC_CTRL_HW1,tmpVal);
rf_pri_printf("rosdac_i_gc0=%ld\r\n",rosdac);
//***********************************************
rosdac=rf_pri_roscal_iq(0,sram_start_addr,sram_length);
rf_calib_data->rxcal[3].rosdac_q=rosdac;
tmpVal=BL_RD_REG(RF_BASE,RF_ROSDAC_CTRL_HW2);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_ROSDAC_Q_GC3,rosdac);
BL_WR_REG(RF_BASE,RF_ROSDAC_CTRL_HW2,tmpVal);
rf_pri_printf("rosdac_q_gc3=%ld\r\n",rosdac);
rf_calib_data->rxcal[2].rosdac_q=rosdac;
tmpVal=BL_RD_REG(RF_BASE,RF_ROSDAC_CTRL_HW2);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_ROSDAC_Q_GC2,rosdac);
BL_WR_REG(RF_BASE,RF_ROSDAC_CTRL_HW2,tmpVal);
rf_pri_printf("rosdac_q_gc2=%ld\r\n",rosdac);
rf_calib_data->rxcal[1].rosdac_q=rosdac;
tmpVal=BL_RD_REG(RF_BASE,RF_ROSDAC_CTRL_HW1);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_ROSDAC_Q_GC1,rosdac);
BL_WR_REG(RF_BASE,RF_ROSDAC_CTRL_HW1,tmpVal);
rf_pri_printf("rosdac_q_gc1=%ld\r\n",rosdac);
rf_calib_data->rxcal[0].rosdac_q=rosdac;
tmpVal=BL_RD_REG(RF_BASE,RF_ROSDAC_CTRL_HW1);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_ROSDAC_Q_GC0,rosdac);
BL_WR_REG(RF_BASE,RF_ROSDAC_CTRL_HW1,tmpVal);
rf_pri_printf("rosdac_q_gc0=%ld\r\n",rosdac);
#endif
rf_pri_restore_state_for_cal();
tmpVal=BL_RD_REG(RF_BASE,RFCAL_STATUS);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_ROS_STATUS,0x3);
BL_WR_REG(RF_BASE,RFCAL_STATUS,tmpVal);
}
void rf_pri_rccal(void)
{
uint32_t tmpVal = 0;
uint32_t rccal_i_status=0;
uint32_t rccal_q_status=0;
tmpVal=BL_RD_REG(RF_BASE,RFCAL_STATEEN);
if(BL_GET_REG_BITS_VAL(tmpVal,RF_RCCAL_STEN)==0)
{
tmpVal=BL_RD_REG(RF_BASE,RFCAL_STATUS);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_RCCAL_STATUS,0x0);
BL_WR_REG(RF_BASE,RFCAL_STATUS,tmpVal);
return;
}else
{
tmpVal=BL_RD_REG(RF_BASE,RFCAL_STATUS);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_RCCAL_STATUS,0x1);
BL_WR_REG(RF_BASE,RFCAL_STATUS,tmpVal);
}
rf_pri_save_state_for_cal();
rf_pri_config_mode(E_RF_MODE_RCCAL);
tmpVal=BL_RD_REG(RF_BASE,RF_RBB3);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_RBB_BW,2);
BL_WR_REG(RF_BASE,RF_RBB3,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_ADDA1);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_DAC_RCCALSEL);
BL_WR_REG(RF_BASE,RF_ADDA1,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RFCAL_CTRLEN);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_RCCAL_EN);
BL_WR_REG(RF_BASE,RFCAL_CTRLEN,tmpVal);
rccal_i_status=rf_pri_rccal_iq(1);
rccal_q_status=rf_pri_rccal_iq(0);
// configure RBB to use minimum bandwidth
tmpVal=BL_RD_REG(RF_BASE,RF_RBB2);
rf_calib_data->cal.rbb_cap1_fc_i = BL_GET_REG_BITS_VAL(tmpVal,RF_RBB_CAP1_FC_I);
rf_calib_data->cal.rbb_cap1_fc_q = BL_GET_REG_BITS_VAL(tmpVal,RF_RBB_CAP1_FC_Q);
rf_calib_data->cal.rbb_cap2_fc_i = BL_GET_REG_BITS_VAL(tmpVal,RF_RBB_CAP2_FC_I);
rf_calib_data->cal.rbb_cap2_fc_q = BL_GET_REG_BITS_VAL(tmpVal,RF_RBB_CAP2_FC_Q);
rf_pri_printf("rbb_cap1_fc_i=%ld,rbb_cap2_fc_i=%ld,rbb_cap1_fc_q=%ld,rbb_cap2_fc_q=%ld\r\n",
(uint32_t)(rf_calib_data->cal.rbb_cap1_fc_i),
(uint32_t)(rf_calib_data->cal.rbb_cap2_fc_i),
(uint32_t)(rf_calib_data->cal.rbb_cap1_fc_q),
(uint32_t)(rf_calib_data->cal.rbb_cap2_fc_q));
/// try to make rbb narrower
#if 1
int32_t max_cw, offset_cw, tgt_offset_cw;
max_cw = rf_calib_data->cal.rbb_cap1_fc_i;
max_cw = rf_calib_data->cal.rbb_cap1_fc_q > max_cw ? rf_calib_data->cal.rbb_cap1_fc_q : max_cw;
max_cw = rf_calib_data->cal.rbb_cap2_fc_i > max_cw ? rf_calib_data->cal.rbb_cap2_fc_i : max_cw;
max_cw = rf_calib_data->cal.rbb_cap2_fc_q > max_cw ? rf_calib_data->cal.rbb_cap2_fc_q : max_cw;
tgt_offset_cw = 24;
offset_cw = (max_cw + tgt_offset_cw) <= 63 ? tgt_offset_cw : 63 - max_cw;
rf_calib_data->cal.rbb_cap1_fc_i += offset_cw;
rf_calib_data->cal.rbb_cap1_fc_q += offset_cw;
rf_calib_data->cal.rbb_cap2_fc_i += offset_cw;
rf_calib_data->cal.rbb_cap2_fc_q += offset_cw;
rf_pri_rccal_config(1,rf_calib_data->cal.rbb_cap1_fc_i);
rf_pri_rccal_config(0,rf_calib_data->cal.rbb_cap1_fc_q);
rf_pri_printf("new rbb_cap1_fc_i=%ld,rbb_cap2_fc_i=%ld,rbb_cap1_fc_q=%ld,rbb_cap2_fc_q=%ld\r\n",
(uint32_t)(rf_calib_data->cal.rbb_cap1_fc_i),
(uint32_t)(rf_calib_data->cal.rbb_cap2_fc_i),
(uint32_t)(rf_calib_data->cal.rbb_cap1_fc_q),
(uint32_t)(rf_calib_data->cal.rbb_cap2_fc_q));
#endif
rf_pri_restore_state_for_cal();
if(rccal_i_status==2 || rccal_q_status==2){
tmpVal=BL_RD_REG(RF_BASE,RFCAL_STATUS);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_RCCAL_STATUS,0x2);
BL_WR_REG(RF_BASE,RFCAL_STATUS,tmpVal);
}else{
tmpVal=BL_RD_REG(RF_BASE,RFCAL_STATUS);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_RCCAL_STATUS,0x3);
BL_WR_REG(RF_BASE,RFCAL_STATUS,tmpVal);
}
}
void rf_pri_lo_acal(void)
{
uint32_t tmpVal;
uint32_t cw;
uint32_t bitwidth = 5;
uint32_t ud;
uint32_t channel_index;
tmpVal=BL_RD_REG(RF_BASE,RFCAL_STATUS);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_ACAL_STATUS,0x1);
BL_WR_REG(RF_BASE,RFCAL_STATUS,tmpVal);
rf_pri_save_state_for_cal();
// Setup for lo acl
rf_pri_config_mode(E_RF_MODE_LO_ACAL);
for (channel_index = E_RF_CHANNEL_2404M; channel_index <= E_RF_CHANNEL_2484M; channel_index++) {
tmpVal=BL_RD_REG(RF_BASE,RFCAL_CTRLEN);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_ACAL_EN);
BL_WR_REG(RF_BASE,RFCAL_CTRLEN,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_VCO2);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_ACAL_VREF_CW,4);
BL_WR_REG(RF_BASE,RF_VCO2,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_VCO1);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_LO_VCO_IDAC_CW,0x10);
BL_WR_REG(RF_BASE,RF_VCO1,tmpVal);
//mixed_reg->vco.BF.lo_freq_cw = 0x40;
tmpVal=BL_RD_REG(RF_BASE,RF_VCO1);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_LO_VCO_FREQ_CW,rf_calib_data->lo[channel_index].fcal);
BL_WR_REG(RF_BASE,RF_VCO1,tmpVal);
BL_WR_REG(RF_BASE,RF_SDM2,channel_div_table[xtalType*E_RF_CHANNEL_NUM+channel_index]);
rf_pri_wait_us(1);
// Binary search
cw = 1 << (bitwidth-1);
for (int i = 1; i < bitwidth; i++) {
tmpVal=BL_RD_REG(RF_BASE,RF_VCO1);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_LO_VCO_IDAC_CW,cw);
BL_WR_REG(RF_BASE,RF_VCO1,tmpVal);
rf_pri_wait_us(1);
tmpVal=BL_RD_REG(RF_BASE,RF_VCO2);
ud=BL_GET_REG_BITS_VAL(tmpVal,RF_ACAL_VCO_UD);
if (ud) {
cw -= (1 << (bitwidth-1-i));
}
else {
cw += (1 << (bitwidth-1-i));
}
}
// cw++ to make sure ud==1 after cal
tmpVal=BL_RD_REG(RF_BASE,RF_VCO1);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_LO_VCO_IDAC_CW,cw);
BL_WR_REG(RF_BASE,RF_VCO1,tmpVal);
rf_pri_wait_us(1);
tmpVal=BL_RD_REG(RF_BASE,RF_VCO2);
ud=BL_GET_REG_BITS_VAL(tmpVal,RF_ACAL_VCO_UD);
if (ud == 0 && cw < 0x1f) cw++;
// Save calibration result
rf_calib_data->lo[channel_index].acal = cw;
rf_pri_printf("%ldth channel,vco_idac_cw=%ld\r\n",channel_index,cw);
}
// Restore state
rf_pri_restore_state_for_cal();
tmpVal=BL_RD_REG(RF_BASE,RFCAL_STATUS);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_ACAL_STATUS,0x3);
BL_WR_REG(RF_BASE,RFCAL_STATUS,tmpVal);
}
void rf_pri_fcal(void)
{
uint32_t tmpVal = 0;
int16_t i,n;
uint16_t cw,cw_binary;
uint16_t cnt;
uint16_t bit_width = 8;
uint16_t count1 = channel_cnt_range[0];//0xa6a0;//0xa700; //0xa715
uint16_t count2 = channel_cnt_range[1];//0xa6e0;//0xa779; //Adjust the lower boundary (0xa780 --> 0xa779) --Ling 2018/10/13
uint16_t count3 = channel_cnt_range[2];//0xace0;//0xac8a; //Adjust the upper boundary (0xac80 --> 0xac8a) --Ling 2018/10/13
tmpVal=BL_RD_REG(RF_BASE,RFCAL_STATUS);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_FCAL_STATUS,1);
BL_WR_REG(RF_BASE,RFCAL_STATUS,tmpVal);
// Save for calibration
rf_pri_save_state_for_cal();
// Setup for lo fcal
rf_pri_config_mode(E_RF_MODE_LO_FCAL);
tmpVal=BL_RD_REG(RF_BASE,RFCAL_CTRLEN);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_FCAL_EN);
BL_WR_REG(RF_BASE,RFCAL_CTRLEN,tmpVal);
cw = 1 << (bit_width-1);
tmpVal=BL_RD_REG(RF_BASE,RF_VCO1);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_LO_VCO_FREQ_CW,cw);
BL_WR_REG(RF_BASE,RF_VCO1,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_FBDV);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_LO_FBDV_SEL_FB_CLK,0);
BL_WR_REG(RF_BASE,RF_FBDV,tmpVal);
#if XTAL24M
tmpVal=BL_RD_REG(RF_BASE,RF_VCO3);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_FCAL_DIV,0x500);
BL_WR_REG(RF_BASE,RF_VCO3,tmpVal);
//0x500:24M 0x56B:26M 0x6AB:32M 0x800:38.4M 0x855:40M 0xAD5:52M --Ling 2018/10/13
#endif
#if XTAL26M
tmpVal=BL_RD_REG(RF_BASE,RF_VCO3);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_FCAL_DIV,0x56B);
BL_WR_REG(RF_BASE,RF_VCO3,tmpVal);
//0x500:24M 0x56B:26M 0x6AB:32M 0x800:38.4M 0x855:40M 0xAD5:52M --Ling 2018/10/13
#endif
#if XTAL32M
tmpVal=BL_RD_REG(RF_BASE,RF_VCO3);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_FCAL_DIV,0x6AB);
BL_WR_REG(RF_BASE,RF_VCO3,tmpVal);
//0x500:24M 0x56B:26M 0x6AB:32M 0x800:38.4M 0x855:40M 0xAD5:52M --Ling 2018/10/13
#endif
#if XTAL38P4M
tmpVal=BL_RD_REG(RF_BASE,RF_VCO3);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_FCAL_DIV,0x800);
BL_WR_REG(RF_BASE,RF_VCO3,tmpVal);
//0x500:24M 0x56B:26M 0x6AB:32M 0x800:38.4M 0x855:40M 0xAD5:52M --Ling 2018/10/13
#endif
#if XTAL40M
tmpVal=BL_RD_REG(RF_BASE,RF_VCO3);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_FCAL_DIV,fcal_div);
BL_WR_REG(RF_BASE,RF_VCO3,tmpVal);
//0x500:24M 0x56B:26M 0x6AB:32M 0x800:38.4M 0x855:40M 0xAD5:52M --Ling 2018/10/13
#endif
#if XTAL52M
tmpVal=BL_RD_REG(RF_BASE,RF_VCO3);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_FCAL_DIV,0xAD5);
BL_WR_REG(RF_BASE,RF_VCO3,tmpVal);
//0x500:24M 0x56B:26M 0x6AB:32M 0x800:38.4M 0x855:40M 0xAD5:52M --Ling 2018/10/13
#endif
BL_WR_REG(RF_BASE,RF_SDM2,0x1000000);
tmpVal=BL_RD_REG(RF_BASE,RF_SDM1);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_LO_SDM_BYPASS);
BL_WR_REG(RF_BASE,RF_SDM1,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_SDM1);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_LO_SDM_RSTB);
BL_WR_REG(RF_BASE,RF_SDM1,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_FBDV);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_LO_FBDV_RST);
BL_WR_REG(RF_BASE,RF_FBDV,tmpVal);
rf_pri_wait_us(10);
tmpVal=BL_RD_REG(RF_BASE,RF_SDM1);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_LO_SDM_RSTB);
BL_WR_REG(RF_BASE,RF_SDM1,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_FBDV);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_LO_FBDV_RST);
BL_WR_REG(RF_BASE,RF_FBDV,tmpVal);
rf_pri_wait_us(50);
tmpVal=BL_RD_REG(RF_BASE,RF_VCO2);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_LO_VCO_VBIAS_CW,0x2);
BL_WR_REG(RF_BASE,RF_VCO2,tmpVal);
rf_pri_wait_us(50);
// Binary search to find initial channel
while(1){
for (i = 1; i < bit_width; i++) {
cnt = rf_pri_fcal_meas(cw);
// rf_pri_printf("cw=%ld, cnt=%ld\r\n",(uint32_t)cw,(uint32_t)cnt);
if (cnt >= count1 && cnt <= count2) {
break;
}
else if (cnt < count1) {
cw -= 1 << (bit_width-1-i);
}
else if (cnt > count2) {
cw += 1 << (bit_width-1-i);
}
}
if (cw < 15) {
rf_pri_printf("Unexpected cw %ld\r\n",(uint32_t)cw);
cw = 1 << (bit_width-1);
i = 1;
tmpVal=BL_RD_REG(RF_BASE,RF_SDM1);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_LO_SDM_RSTB);
BL_WR_REG(RF_BASE,RF_SDM1,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_FBDV);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_LO_FBDV_RST);
BL_WR_REG(RF_BASE,RF_FBDV,tmpVal);
rf_pri_wait_us(50);
tmpVal=BL_RD_REG(RF_BASE,RF_SDM1);
tmpVal=BL_SET_REG_BIT(tmpVal,RF_LO_SDM_RSTB);
BL_WR_REG(RF_BASE,RF_SDM1,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_FBDV);
tmpVal=BL_CLR_REG_BIT(tmpVal,RF_LO_FBDV_RST);
BL_WR_REG(RF_BASE,RF_FBDV,tmpVal);
rf_pri_wait_us(50);
} else {
break;
}
}
cw = cw + 1;
cw_binary = cw;
cnt = rf_pri_fcal_meas(cw);
// Store optim cnt table
channel_cnt_opt_table[0] = cnt;
for (i = 1; i < CNT_TIMES; i++) {
cnt = rf_pri_fcal_meas(--cw);
channel_cnt_opt_table[i] = cnt;
if (cnt > count3) break;
}
// Find cw for each channel
for (i = 0,n = 0; i < NUM_CHANNELS; i++) {
while (channel_cnt_table[i]>channel_cnt_opt_table[n]) n++;
if ((channel_cnt_table[i]-channel_cnt_opt_table[n-1]) <
(channel_cnt_opt_table[n]-channel_cnt_table[i])) {
channel_cw_table[i] = cw_binary - (n-1);
}
else {
channel_cw_table[i] = cw_binary - (n-1);
}
n = n > 0 ? n-1 : 0;
}
// Set osmx register
//mixed_reg->osmx.BF.osmx_cap = (channel_cw_table[6]>>3)&0b1111;
// Restore state
rf_pri_restore_state_for_cal();
// Save calibration result
for (i = 0; i < NUM_CHANNELS; i++) {
rf_calib_data->lo[i].fcal = channel_cw_table[i];
rf_pri_printf("%ldth channel,lo_vco_freq_cw=%ld\r\n",(uint32_t)(i+1),(uint32_t)(channel_cw_table[i]));
}
tmpVal=BL_RD_REG(RF_BASE,RFCAL_STATUS);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_FCAL_STATUS,3);
BL_WR_REG(RF_BASE,RFCAL_STATUS,tmpVal);
}
void rf_pri_full_cal(void)
{
rf_pri_start_rxdfe();
rf_pri_start_txdfe();
rf_pri_fcal();
rf_pri_lo_acal();
rf_pri_roscal();
rf_pri_rccal();
rf_pri_txcal();
#if 0
int i;
for(i=0;i<10;i++){
rf_pri_txcal();
}
#endif
#if 0
int32_t i,j,k;
for(i=0;i<13;i++){
rf_pri_update_param(2412+i*5);
MSG("channel=%d,tx_pwr_os=%d\r\n",2412+i*5,tx_pwr_os);
for(j=0;j<2;j++){
for(k=10;k<300;k=k+10){
rf_pri_get_pwr_index(k,j);
MSG("mode=%d,target pwr=%d,index=%d,dvga=%d\r\n",j,k,tp_index->index,tp_index->dvga);
}
}
}
#endif
rf_pri_auto_gain();
rf_pri_stop_rxdfe();
rf_pri_stop_txdfe();
}
#if BL602_DBG_RF
void rf_pri_set_cal_reg(void)
{
uint32_t tmpVal = 0;
tmpVal=BL_RD_REG(RF_BASE,RF_ROSDAC_CTRL_HW1);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_ROSDAC_I_GC0,32);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_ROSDAC_Q_GC0,32);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_ROSDAC_I_GC1,32);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_ROSDAC_Q_GC1,32);
BL_WR_REG(RF_BASE,RF_ROSDAC_CTRL_HW1,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_ROSDAC_CTRL_HW2);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_ROSDAC_I_GC2,32);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_ROSDAC_Q_GC2,32);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_ROSDAC_I_GC3,32);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_ROSDAC_Q_GC3,32);
BL_WR_REG(RF_BASE,RF_ROSDAC_CTRL_HW2,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_RXIQ_CTRL_HW1);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_RX_IQ_GAIN_COMP_GC0,1024);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_RX_IQ_PHASE_COMP_GC0,0);
BL_WR_REG(RF_BASE,RF_RXIQ_CTRL_HW1,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_RXIQ_CTRL_HW2);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_RX_IQ_GAIN_COMP_GC1,1024);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_RX_IQ_PHASE_COMP_GC1,0);
BL_WR_REG(RF_BASE,RF_RXIQ_CTRL_HW2,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_RXIQ_CTRL_HW3);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_RX_IQ_GAIN_COMP_GC2,1024);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_RX_IQ_PHASE_COMP_GC2,0);
BL_WR_REG(RF_BASE,RF_RXIQ_CTRL_HW3,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_RXIQ_CTRL_HW4);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_RX_IQ_GAIN_COMP_GC3,1024);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_RX_IQ_PHASE_COMP_GC3,0);
BL_WR_REG(RF_BASE,RF_RXIQ_CTRL_HW4,tmpVal);
// rf_calib_data->cal.rx_i = 0;
// rf_calib_data->cal.rx_q = 0;
tmpVal=BL_RD_REG(RF_BASE,RF_RBB2);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_RBB_CAP1_FC_I,32);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_RBB_CAP2_FC_I,32);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_RBB_CAP1_FC_Q,32);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_RBB_CAP2_FC_Q,32);
BL_WR_REG(RF_BASE,RF_RBB2,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_TOSDAC_CTRL_HW1);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TBB_TOSDAC_I_GC0,32);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TBB_TOSDAC_Q_GC0,32);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TBB_TOSDAC_I_GC1,32);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TBB_TOSDAC_Q_GC1,32);
BL_WR_REG(RF_BASE,RF_TOSDAC_CTRL_HW1,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_TOSDAC_CTRL_HW2);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TBB_TOSDAC_I_GC2,32);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TBB_TOSDAC_Q_GC2,32);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TBB_TOSDAC_I_GC3,32);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TBB_TOSDAC_Q_GC3,32);
BL_WR_REG(RF_BASE,RF_TOSDAC_CTRL_HW2,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_TOSDAC_CTRL_HW3);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TBB_TOSDAC_I_GC4,32);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TBB_TOSDAC_Q_GC4,32);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TBB_TOSDAC_I_GC5,32);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TBB_TOSDAC_Q_GC5,32);
BL_WR_REG(RF_BASE,RF_TOSDAC_CTRL_HW3,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_TOSDAC_CTRL_HW4);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TBB_TOSDAC_I_GC6,32);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TBB_TOSDAC_Q_GC6,32);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TBB_TOSDAC_I_GC7,32);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TBB_TOSDAC_Q_GC7,32);
BL_WR_REG(RF_BASE,RF_TOSDAC_CTRL_HW4,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_TX_IQ_GAIN_HW0);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TX_IQ_GAIN_COMP_GC0,1024);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TX_IQ_PHASE_COMP_GC0,0);
BL_WR_REG(RF_BASE,RF_TX_IQ_GAIN_HW0,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_TX_IQ_GAIN_HW1);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TX_IQ_GAIN_COMP_GC1,1024);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TX_IQ_PHASE_COMP_GC1,0);
BL_WR_REG(RF_BASE,RF_TX_IQ_GAIN_HW1,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_TX_IQ_GAIN_HW2);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TX_IQ_GAIN_COMP_GC2,1024);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TX_IQ_PHASE_COMP_GC2,0);
BL_WR_REG(RF_BASE,RF_TX_IQ_GAIN_HW2,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_TX_IQ_GAIN_HW3);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TX_IQ_GAIN_COMP_GC3,1024);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TX_IQ_PHASE_COMP_GC3,0);
BL_WR_REG(RF_BASE,RF_TX_IQ_GAIN_HW3,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_TX_IQ_GAIN_HW4);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TX_IQ_GAIN_COMP_GC4,1024);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TX_IQ_PHASE_COMP_GC4,0);
BL_WR_REG(RF_BASE,RF_TX_IQ_GAIN_HW4,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_TX_IQ_GAIN_HW5);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TX_IQ_GAIN_COMP_GC5,1024);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TX_IQ_PHASE_COMP_GC5,0);
BL_WR_REG(RF_BASE,RF_TX_IQ_GAIN_HW5,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_TX_IQ_GAIN_HW6);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TX_IQ_GAIN_COMP_GC6,1024);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TX_IQ_PHASE_COMP_GC6,0);
BL_WR_REG(RF_BASE,RF_TX_IQ_GAIN_HW6,tmpVal);
tmpVal=BL_RD_REG(RF_BASE,RF_TX_IQ_GAIN_HW7);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TX_IQ_GAIN_COMP_GC7,1024);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,RF_TX_IQ_PHASE_COMP_GC7,0);
BL_WR_REG(RF_BASE,RF_TX_IQ_GAIN_HW7,tmpVal);
// rf_calib_data->cal.tx_dc_comp_i = 0;
// rf_calib_data->cal.tx_dc_comp_q = 0;
}
#endif
/*@} end of group L1C_Public_Functions */
/*@} end of group L1C */
/*@} end of group BL602_Peripheral_Driver */
|
mkroman/bl602-604
|
components/bl602/bl602_wifidrv/bl60x_wifi_driver/bl_strs.c
|
<filename>components/bl602/bl602_wifidrv/bl60x_wifi_driver/bl_strs.c<gh_stars>0
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "bl_utils.h"
#include "lmac_msg.h"
static const char *const bl_mmid2str[MSG_I(MM_MAX)] = {
[MSG_I(MM_RESET_REQ)] = "MM_RESET_REQ",
[MSG_I(MM_RESET_CFM)] = "MM_RESET_CFM",
[MSG_I(MM_START_REQ)] = "MM_START_REQ",
[MSG_I(MM_START_CFM)] = "MM_START_CFM",
[MSG_I(MM_VERSION_REQ)] = "MM_VERSION_REQ",
[MSG_I(MM_VERSION_CFM)] = "MM_VERSION_CFM",
[MSG_I(MM_ADD_IF_REQ)] = "MM_ADD_IF_REQ",
[MSG_I(MM_ADD_IF_CFM)] = "MM_ADD_IF_CFM",
[MSG_I(MM_REMOVE_IF_REQ)] = "MM_REMOVE_IF_REQ",
[MSG_I(MM_REMOVE_IF_CFM)] = "MM_REMOVE_IF_CFM",
[MSG_I(MM_STA_ADD_REQ)] = "MM_STA_ADD_REQ",
[MSG_I(MM_STA_ADD_CFM)] = "MM_STA_ADD_CFM",
[MSG_I(MM_STA_DEL_REQ)] = "MM_STA_DEL_REQ",
[MSG_I(MM_STA_DEL_CFM)] = "MM_STA_DEL_CFM",
[MSG_I(MM_SET_FILTER_REQ)] = "MM_SET_FILTER_REQ",
[MSG_I(MM_SET_FILTER_CFM)] = "MM_SET_FILTER_CFM",
[MSG_I(MM_SET_CHANNEL_REQ)] = "MM_SET_CHANNEL_REQ",
[MSG_I(MM_SET_CHANNEL_CFM)] = "MM_SET_CHANNEL_CFM",
[MSG_I(MM_SET_DTIM_REQ)] = "MM_SET_DTIM_REQ",
[MSG_I(MM_SET_DTIM_CFM)] = "MM_SET_DTIM_CFM",
[MSG_I(MM_SET_BEACON_INT_REQ)] = "MM_SET_BEACON_INT_REQ",
[MSG_I(MM_SET_BEACON_INT_CFM)] = "MM_SET_BEACON_INT_CFM",
[MSG_I(MM_SET_BASIC_RATES_REQ)] = "MM_SET_BASIC_RATES_REQ",
[MSG_I(MM_SET_BASIC_RATES_CFM)] = "MM_SET_BASIC_RATES_CFM",
[MSG_I(MM_SET_BSSID_REQ)] = "MM_SET_BSSID_REQ",
[MSG_I(MM_SET_BSSID_CFM)] = "MM_SET_BSSID_CFM",
[MSG_I(MM_SET_EDCA_REQ)] = "MM_SET_EDCA_REQ",
[MSG_I(MM_SET_EDCA_CFM)] = "MM_SET_EDCA_CFM",
[MSG_I(MM_SET_MODE_REQ)] = "MM_SET_MODE_REQ",
[MSG_I(MM_SET_MODE_CFM)] = "MM_SET_MODE_CFM",
[MSG_I(MM_SET_VIF_STATE_REQ)] = "MM_SET_VIF_STATE_REQ",
[MSG_I(MM_SET_VIF_STATE_CFM)] = "MM_SET_VIF_STATE_CFM",
[MSG_I(MM_SET_SLOTTIME_REQ)] = "MM_SET_SLOTTIME_REQ",
[MSG_I(MM_SET_SLOTTIME_CFM)] = "MM_SET_SLOTTIME_CFM",
[MSG_I(MM_SET_IDLE_REQ)] = "MM_SET_IDLE_REQ",
[MSG_I(MM_SET_IDLE_CFM)] = "MM_SET_IDLE_CFM",
[MSG_I(MM_KEY_ADD_REQ)] = "MM_KEY_ADD_REQ",
[MSG_I(MM_KEY_ADD_CFM)] = "MM_KEY_ADD_CFM",
[MSG_I(MM_KEY_DEL_REQ)] = "MM_KEY_DEL_REQ",
[MSG_I(MM_KEY_DEL_CFM)] = "MM_KEY_DEL_CFM",
[MSG_I(MM_BA_ADD_REQ)] = "MM_BA_ADD_REQ",
[MSG_I(MM_BA_ADD_CFM)] = "MM_BA_ADD_CFM",
[MSG_I(MM_BA_DEL_REQ)] = "MM_BA_DEL_REQ",
[MSG_I(MM_BA_DEL_CFM)] = "MM_BA_DEL_CFM",
[MSG_I(MM_PRIMARY_TBTT_IND)] = "MM_PRIMARY_TBTT_IND",
[MSG_I(MM_SECONDARY_TBTT_IND)] = "MM_SECONDARY_TBTT_IND",
[MSG_I(MM_SET_POWER_REQ)] = "MM_SET_POWER_REQ",
[MSG_I(MM_SET_POWER_CFM)] = "MM_SET_POWER_CFM",
[MSG_I(MM_DBG_TRIGGER_REQ)] = "MM_DBG_TRIGGER_REQ",
[MSG_I(MM_SET_PS_MODE_REQ)] = "MM_SET_PS_MODE_REQ",
[MSG_I(MM_SET_PS_MODE_CFM)] = "MM_SET_PS_MODE_CFM",
[MSG_I(MM_CHAN_CTXT_ADD_REQ)] = "MM_CHAN_CTXT_ADD_REQ",
[MSG_I(MM_CHAN_CTXT_ADD_CFM)] = "MM_CHAN_CTXT_ADD_CFM",
[MSG_I(MM_CHAN_CTXT_DEL_REQ)] = "MM_CHAN_CTXT_DEL_REQ",
[MSG_I(MM_CHAN_CTXT_DEL_CFM)] = "MM_CHAN_CTXT_DEL_CFM",
[MSG_I(MM_CHAN_CTXT_LINK_REQ)] = "MM_CHAN_CTXT_LINK_REQ",
[MSG_I(MM_CHAN_CTXT_LINK_CFM)] = "MM_CHAN_CTXT_LINK_CFM",
[MSG_I(MM_CHAN_CTXT_UNLINK_REQ)] = "MM_CHAN_CTXT_UNLINK_REQ",
[MSG_I(MM_CHAN_CTXT_UNLINK_CFM)] = "MM_CHAN_CTXT_UNLINK_CFM",
[MSG_I(MM_CHAN_CTXT_UPDATE_REQ)] = "MM_CHAN_CTXT_UPDATE_REQ",
[MSG_I(MM_CHAN_CTXT_UPDATE_CFM)] = "MM_CHAN_CTXT_UPDATE_CFM",
[MSG_I(MM_CHAN_CTXT_SCHED_REQ)] = "MM_CHAN_CTXT_SCHED_REQ",
[MSG_I(MM_CHAN_CTXT_SCHED_CFM)] = "MM_CHAN_CTXT_SCHED_CFM",
[MSG_I(MM_BCN_CHANGE_REQ)] = "MM_BCN_CHANGE_REQ",
[MSG_I(MM_BCN_CHANGE_CFM)] = "MM_BCN_CHANGE_CFM",
[MSG_I(MM_TIM_UPDATE_REQ)] = "MM_TIM_UPDATE_REQ",
[MSG_I(MM_TIM_UPDATE_CFM)] = "MM_TIM_UPDATE_CFM",
[MSG_I(MM_CONNECTION_LOSS_IND)] = "MM_CONNECTION_LOSS_IND",
[MSG_I(MM_CHANNEL_SWITCH_IND)] = "MM_CHANNEL_SWITCH_IND",
[MSG_I(MM_CHANNEL_PRE_SWITCH_IND)] = "MM_CHANNEL_PRE_SWITCH_IND",
[MSG_I(MM_REMAIN_ON_CHANNEL_REQ)] = "MM_REMAIN_ON_CHANNEL_REQ",
[MSG_I(MM_REMAIN_ON_CHANNEL_CFM)] = "MM_REMAIN_ON_CHANNEL_CFM",
[MSG_I(MM_REMAIN_ON_CHANNEL_EXP_IND)] = "MM_REMAIN_ON_CHANNEL_EXP_IND",
[MSG_I(MM_PS_CHANGE_IND)] = "MM_PS_CHANGE_IND",
[MSG_I(MM_TRAFFIC_REQ_IND)] = "MM_TRAFFIC_REQ_IND",
[MSG_I(MM_SET_PS_OPTIONS_REQ)] = "MM_SET_PS_OPTIONS_REQ",
[MSG_I(MM_SET_PS_OPTIONS_CFM)] = "MM_SET_PS_OPTIONS_CFM",
[MSG_I(MM_P2P_VIF_PS_CHANGE_IND)] = "MM_P2P_VIF_PS_CHANGE_IND",
[MSG_I(MM_CSA_COUNTER_IND)] = "MM_CSA_COUNTER_IND",
[MSG_I(MM_CHANNEL_SURVEY_IND)] = "MM_CHANNEL_SURVEY_IND",
[MSG_I(MM_SET_P2P_NOA_REQ)] = "MM_SET_P2P_NOA_REQ",
[MSG_I(MM_SET_P2P_OPPPS_REQ)] = "MM_SET_P2P_OPPPS_REQ",
[MSG_I(MM_SET_P2P_NOA_CFM)] = "MM_SET_P2P_NOA_CFM",
[MSG_I(MM_SET_P2P_OPPPS_CFM)] = "MM_SET_P2P_OPPPS_CFM",
[MSG_I(MM_CFG_RSSI_REQ)] = "MM_CFG_RSSI_REQ",
[MSG_I(MM_RSSI_STATUS_IND)] = "MM_RSSI_STATUS_IND",
[MSG_I(MM_CSA_FINISH_IND)] = "MM_CSA_FINISH_IND",
[MSG_I(MM_CSA_TRAFFIC_IND)] = "MM_CSA_TRAFFIC_IND",
[MSG_I(MM_MU_GROUP_UPDATE_REQ)] = "MM_MU_GROUP_UPDATE_REQ",
[MSG_I(MM_MU_GROUP_UPDATE_CFM)] = "MM_MU_GROUP_UPDATE_CFM",
};
static const char *const bl_dbgid2str[MSG_I(DBG_MAX)] = {
[MSG_I(DBG_MEM_READ_REQ)] = "DBG_MEM_READ_REQ",
[MSG_I(DBG_MEM_READ_CFM)] = "DBG_MEM_READ_CFM",
[MSG_I(DBG_MEM_WRITE_REQ)] = "DBG_MEM_WRITE_REQ",
[MSG_I(DBG_MEM_WRITE_CFM)] = "DBG_MEM_WRITE_CFM",
[MSG_I(DBG_SET_MOD_FILTER_REQ)] = "DBG_SET_MOD_FILTER_REQ",
[MSG_I(DBG_SET_MOD_FILTER_CFM)] = "DBG_SET_MOD_FILTER_CFM",
[MSG_I(DBG_SET_SEV_FILTER_REQ)] = "DBG_SET_SEV_FILTER_REQ",
[MSG_I(DBG_SET_SEV_FILTER_CFM)] = "DBG_SET_SEV_FILTER_CFM",
[MSG_I(DBG_ERROR_IND)] = "DBG_ERROR_IND",
[MSG_I(DBG_GET_SYS_STAT_REQ)] = "DBG_GET_SYS_STAT_REQ",
[MSG_I(DBG_GET_SYS_STAT_CFM)] = "DBG_GET_SYS_STAT_CFM",
};
static const char *const bl_scanid2str[MSG_I(SCAN_MAX)] = {
[MSG_I(SCAN_START_REQ)] = "SCAN_START_REQ",
[MSG_I(SCAN_START_CFM)] = "SCAN_START_CFM",
[MSG_I(SCAN_DONE_IND)] = "SCAN_DONE_IND",
};
static const char *const bl_tdlsid2str[MSG_I(TDLS_MAX)] = {
[MSG_I(TDLS_CHAN_SWITCH_CFM)] = "TDLS_CHAN_SWITCH_CFM",
[MSG_I(TDLS_CHAN_SWITCH_REQ)] = "TDLS_CHAN_SWITCH_REQ",
[MSG_I(TDLS_CHAN_SWITCH_IND)] = "TDLS_CHAN_SWITCH_IND",
[MSG_I(TDLS_CHAN_SWITCH_BASE_IND)] = "TDLS_CHAN_SWITCH_BASE_IND",
};
#ifdef CONFIG_RWNX_FULLMAC
static const char *const bl_scanuid2str[MSG_I(SCANU_MAX)] = {
[MSG_I(SCANU_START_REQ)] = "SCANU_START_REQ",
[MSG_I(SCANU_START_CFM)] = "SCANU_START_CFM",
[MSG_I(SCANU_JOIN_REQ)] = "SCANU_JOIN_REQ",
[MSG_I(SCANU_JOIN_CFM)] = "SCANU_JOIN_CFM",
[MSG_I(SCANU_RESULT_IND)] = "SCANU_RESULT_IND",
[MSG_I(SCANU_RAW_SEND_REQ)] = "SCANU_RAW_SEND_REQ",
[MSG_I(SCANU_RAW_SEND_CFM)] = "SCANU_RAW_SEND_CFM",
};
static const char *const bl_meid2str[MSG_I(ME_MAX)] = {
[MSG_I(ME_CONFIG_REQ)] = "ME_CONFIG_REQ",
[MSG_I(ME_CONFIG_CFM)] = "ME_CONFIG_CFM",
[MSG_I(ME_CHAN_CONFIG_REQ)] = "ME_CHAN_CONFIG_REQ",
[MSG_I(ME_CHAN_CONFIG_CFM)] = "ME_CHAN_CONFIG_CFM",
[MSG_I(ME_SET_CONTROL_PORT_REQ)] = "ME_SET_CONTROL_PORT_REQ",
[MSG_I(ME_SET_CONTROL_PORT_CFM)] = "ME_SET_CONTROL_PORT_CFM",
[MSG_I(ME_TKIP_MIC_FAILURE_IND)] = "ME_TKIP_MIC_FAILURE_IND",
[MSG_I(ME_STA_ADD_REQ)] = "ME_STA_ADD_REQ",
[MSG_I(ME_STA_ADD_CFM)] = "ME_STA_ADD_CFM",
[MSG_I(ME_STA_DEL_REQ)] = "ME_STA_DEL_REQ",
[MSG_I(ME_STA_DEL_CFM)] = "ME_STA_DEL_CFM",
[MSG_I(ME_TX_CREDITS_UPDATE_IND)]= "ME_TX_CREDITS_UPDATE_IND",
[MSG_I(ME_RC_STATS_REQ)] = "ME_RC_STATS_REQ",
[MSG_I(ME_RC_STATS_CFM)] = "ME_RC_STATS_CFM",
[MSG_I(ME_RC_SET_RATE_REQ)] = "ME_RC_SET_RATE_REQ",
[MSG_I(ME_TRAFFIC_IND_REQ)] = "ME_TRAFFIC_IND_REQ",
[MSG_I(ME_TRAFFIC_IND_CFM)] = "ME_TRAFFIC_IND_CFM",
};
static const char *const bl_smid2str[MSG_I(SM_MAX)] = {
[MSG_I(SM_CONNECT_REQ)] = "SM_CONNECT_REQ",
[MSG_I(SM_CONNECT_CFM)] = "SM_CONNECT_CFM",
[MSG_I(SM_CONNECT_IND)] = "SM_CONNECT_IND",
[MSG_I(SM_DISCONNECT_REQ)] = "SM_DISCONNECT_REQ",
[MSG_I(SM_DISCONNECT_CFM)] = "SM_DISCONNECT_CFM",
[MSG_I(SM_DISCONNECT_IND)] = "SM_DISCONNECT_IND",
[MSG_I(SM_RSP_TIMEOUT_IND)] = "SM_RSP_TIMEOUT_IND",
};
static const char *const bl_apmid2str[MSG_I(APM_MAX)] = {
[MSG_I(APM_START_REQ)] = "APM_START_REQ",
[MSG_I(APM_START_CFM)] = "APM_START_CFM",
[MSG_I(APM_STOP_REQ)] = "APM_STOP_REQ",
[MSG_I(APM_STOP_CFM)] = "APM_STOP_CFM",
[MSG_I(APM_START_CAC_REQ)] = "APM_START_CAC_REQ",
[MSG_I(APM_START_CAC_CFM)] = "APM_START_CAC_CFM",
[MSG_I(APM_STOP_CAC_REQ)] = "APM_STOP_CAC_REQ",
[MSG_I(APM_STOP_CAC_CFM)] = "APM_STOP_CAC_CFM",
[MSG_I(APM_STA_DEL_REQ)] = "APM_STA_DEL_REQ",
[MSG_I(APM_STA_DEL_CFM)] = "APM_STA_DEL_CFM",
};
static const char *const bl_meshid2str[MSG_I(MESH_MAX)] = {
[MSG_I(MESH_START_REQ)] = "MESH_START_REQ",
[MSG_I(MESH_START_CFM)] = "MESH_START_CFM",
[MSG_I(MESH_STOP_REQ)] = "MESH_STOP_REQ",
[MSG_I(MESH_STOP_CFM)] = "MESH_STOP_CFM",
[MSG_I(MESH_UPDATE_REQ)] = "MESH_UPDATE_REQ",
[MSG_I(MESH_UPDATE_CFM)] = "MESH_UPDATE_CFM",
[MSG_I(MESH_PATH_CREATE_REQ)] = "MESH_PATH_CREATE_REQ",
[MSG_I(MESH_PATH_CREATE_CFM)] = "MESH_PATH_CREATE_CFM",
[MSG_I(MESH_PATH_UPDATE_REQ)] = "MESH_PATH_UPDATE_REQ",
[MSG_I(MESH_PATH_UPDATE_CFM)] = "MESH_PATH_UPDATE_CFM",
[MSG_I(MESH_PROXY_ADD_REQ)] = "MESH_PROXY_ADD_REQ",
[MSG_I(MESH_PEER_UPDATE_IND)] = "MESH_PEER_UPDATE_IND",
[MSG_I(MESH_PATH_UPDATE_IND)] = "MESH_PATH_UPDATE_IND",
[MSG_I(MESH_PROXY_UPDATE_IND)] = "MESH_PROXY_UPDATE_IND",
};
#endif /* CONFIG_RWNX_FULLMAC */
const char *const *bl_id2str[TASK_LAST_EMB + 1] = {
[TASK_MM] = bl_mmid2str,
[TASK_DBG] = bl_dbgid2str,
[TASK_SCAN] = bl_scanid2str,
[TASK_TDLS] = bl_tdlsid2str,
#ifdef CONFIG_RWNX_FULLMAC
[TASK_SCANU] = bl_scanuid2str,
[TASK_ME] = bl_meid2str,
[TASK_SM] = bl_smid2str,
[TASK_APM] = bl_apmid2str,
[TASK_MESH] = bl_meshid2str,
#endif
};
|
mkroman/bl602-604
|
components/bl602/bl602_std/bl602_std/Common/cipher_suite/src/bflb_hash.c
|
#include "bflb_hash.h"
#ifndef BFLB_CRYPT_HARDWARE
#include "mbedtls/sha1.h"
#include "mbedtls/md.h"
#include "mbedtls/sha256.h"
#include "mbedtls/sha512.h"
uint8_t bflb_hash_get_type(uint8_t type)
{
switch(type)
{
case BFLB_HASH_TYPE_SHA1:
return MBEDTLS_MD_SHA1;
case BFLB_HASH_TYPE_SHA224:
return MBEDTLS_MD_SHA224;
case BFLB_HASH_TYPE_SHA256:
return MBEDTLS_MD_SHA256;
case BFLB_HASH_TYPE_SHA384:
return MBEDTLS_MD_SHA384;
case BFLB_HASH_TYPE_SHA512:
return MBEDTLS_MD_SHA512;
}
return MBEDTLS_MD_NONE;
}
#endif
static SEC_Eng_SHA256_Ctx shaCtx;
int32_t bflb_hash_init(bflb_hash_handle_t *hash_handle,uint8_t type)
{
int32_t ret = BFLB_HASH_OK;
switch(type)
{
case BFLB_HASH_TYPE_SHA1 :
ret=BFLB_HASH_ERROR;
bflb_hash_printe("unsupported type\r\n");
break;
case BFLB_HASH_TYPE_SHA224:
Sec_Eng_SHA256_Init(&shaCtx,SEC_ENG_SHA_ID0,SEC_ENG_SHA224,(uint32_t *)hash_handle->hash_ctx.sha_buf,
(uint32_t *)hash_handle->sha_padding);
case BFLB_HASH_TYPE_SHA256 :
Sec_Eng_SHA256_Init(&shaCtx,SEC_ENG_SHA_ID0,SEC_ENG_SHA256,(uint32_t *)hash_handle->hash_ctx.sha_buf,
(uint32_t *)hash_handle->sha_padding);
break;
case BFLB_HASH_TYPE_SHA384:
case BFLB_HASH_TYPE_SHA512:
ret=BFLB_HASH_ERROR;
bflb_hash_printe("unsupported type\r\n");
break;
default:
bflb_hash_printe("unsupported type\r\n");
ret=BFLB_HASH_ERROR;
break;
}
if(ret==BFLB_HASH_OK){
hash_handle->type=type;
}
return ret;
}
int32_t bflb_hash_start(bflb_hash_handle_t *hash_handle)
{
int32_t ret = BFLB_HASH_OK;
switch(hash_handle->type)
{
case BFLB_HASH_TYPE_SHA1:
break;
case BFLB_HASH_TYPE_SHA224:
Sec_Eng_SHA_Start(SEC_ENG_SHA_ID0);
break;
case BFLB_HASH_TYPE_SHA256:
Sec_Eng_SHA_Start(SEC_ENG_SHA_ID0);
break;
case BFLB_HASH_TYPE_SHA384:
break;
case BFLB_HASH_TYPE_SHA512:
break;
default:
bflb_hash_printe("unsupported type\r\n");
return BFLB_HASH_ERROR;
}
if(ret!=0){
bflb_hash_printe("hash start fail\r\n");
ret=BFLB_HASH_ERROR;
}
return ret;
}
int32_t bflb_hash_update(bflb_hash_handle_t *hash_handle,const uint8_t *in,uint32_t len)
{
int32_t ret = BFLB_HASH_OK;
switch(hash_handle->type)
{
case BFLB_HASH_TYPE_SHA1:
break;
case BFLB_HASH_TYPE_SHA224:
Sec_Eng_SHA256_Update(&shaCtx,SEC_ENG_SHA_ID0,in, len);
break;
case BFLB_HASH_TYPE_SHA256:
Sec_Eng_SHA256_Update(&shaCtx,SEC_ENG_SHA_ID0,in, len);
break;
case BFLB_HASH_TYPE_SHA384:
break;
case BFLB_HASH_TYPE_SHA512:
break;
default:
bflb_hash_printe("unsupported type\r\n");
return BFLB_HASH_ERROR;
}
if(ret!=0){
bflb_hash_printe("hash update fail\r\n");
ret=BFLB_HASH_ERROR;
}
return ret;
}
int32_t bflb_hash_finish(bflb_hash_handle_t *hash_handle,uint8_t *out)
{
int32_t ret = BFLB_HASH_OK;
switch(hash_handle->type)
{
case BFLB_HASH_TYPE_SHA1:
break;
case BFLB_HASH_TYPE_SHA224:
Sec_Eng_SHA256_Finish(&shaCtx,SEC_ENG_SHA_ID0,out);
break;
case BFLB_HASH_TYPE_SHA256:
Sec_Eng_SHA256_Finish(&shaCtx,SEC_ENG_SHA_ID0,out);
break;
case BFLB_HASH_TYPE_SHA384:
break;
case BFLB_HASH_TYPE_SHA512:
break;
default:
bflb_hash_printe("unsupported type\r\n");
return BFLB_HASH_ERROR;
}
if(ret!=0){
bflb_hash_printe("hash finish fail\r\n");
ret=BFLB_HASH_ERROR;
}
return ret;
}
int32_t bflb_hash_deinit(bflb_hash_handle_t *hash_handle)
{
switch(hash_handle->type)
{
case BFLB_HASH_TYPE_SHA1:
break;
case BFLB_HASH_TYPE_SHA224:
break;
case BFLB_HASH_TYPE_SHA256:
break;
case BFLB_HASH_TYPE_SHA384:
break;
case BFLB_HASH_TYPE_SHA512:
break;
default:
bflb_hash_printe("unsupported type\r\n");
return BFLB_HASH_ERROR;
}
memset(hash_handle,0,sizeof(bflb_hash_handle_t));
return BFLB_HASH_OK;
}
|
mkroman/bl602-604
|
components/network/ble/blestack/src/common/tinycrypt/include/tinycrypt/aes.h
|
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/* aes.h - TinyCrypt interface to an AES-128 implementation */
/*
* Copyright (C) 2017 by Intel Corporation, All Rights Reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* - Neither the name of Intel Corporation nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/**
* @file
* @brief -- Interface to an AES-128 implementation.
*
* Overview: AES-128 is a NIST approved block cipher specified in
* FIPS 197. Block ciphers are deterministic algorithms that
* perform a transformation specified by a symmetric key in fixed-
* length data sets, also called blocks.
*
* Security: AES-128 provides approximately 128 bits of security.
*
* Usage: 1) call tc_aes128_set_encrypt/decrypt_key to set the key.
*
* 2) call tc_aes_encrypt/decrypt to process the data.
*/
#ifndef __TC_AES_H__
#define __TC_AES_H__
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
#define Nb (4) /* number of columns (32-bit words) comprising the state */
#define Nk (4) /* number of 32-bit words comprising the key */
#define Nr (10) /* number of rounds */
#define TC_AES_BLOCK_SIZE (Nb*Nk)
#define TC_AES_KEY_SIZE (Nb*Nk)
typedef struct tc_aes_key_sched_struct {
unsigned int words[Nb*(Nr+1)];
} *TCAesKeySched_t;
/**
* @brief Set AES-128 encryption key
* Uses key k to initialize s
* @return returns TC_CRYPTO_SUCCESS (1)
* returns TC_CRYPTO_FAIL (0) if: s == NULL or k == NULL
* @note This implementation skips the additional steps required for keys
* larger than 128 bits, and must not be used for AES-192 or
* AES-256 key schedule -- see FIPS 197 for details
* @param s IN/OUT -- initialized struct tc_aes_key_sched_struct
* @param k IN -- points to the AES key
*/
int tc_aes128_set_encrypt_key(TCAesKeySched_t s, const uint8_t *k);
/**
* @brief AES-128 Encryption procedure
* Encrypts contents of in buffer into out buffer under key;
* schedule s
* @note Assumes s was initialized by aes_set_encrypt_key;
* out and in point to 16 byte buffers
* @return returns TC_CRYPTO_SUCCESS (1)
* returns TC_CRYPTO_FAIL (0) if: out == NULL or in == NULL or s == NULL
* @param out IN/OUT -- buffer to receive ciphertext block
* @param in IN -- a plaintext block to encrypt
* @param s IN -- initialized AES key schedule
*/
int tc_aes_encrypt(uint8_t *out, const uint8_t *in,
const TCAesKeySched_t s);
/**
* @brief Set the AES-128 decryption key
* Uses key k to initialize s
* @return returns TC_CRYPTO_SUCCESS (1)
* returns TC_CRYPTO_FAIL (0) if: s == NULL or k == NULL
* @note This is the implementation of the straightforward inverse cipher
* using the cipher documented in FIPS-197 figure 12, not the
* equivalent inverse cipher presented in Figure 15
* @warning This routine skips the additional steps required for keys larger
* than 128, and must not be used for AES-192 or AES-256 key
* schedule -- see FIPS 197 for details
* @param s IN/OUT -- initialized struct tc_aes_key_sched_struct
* @param k IN -- points to the AES key
*/
int tc_aes128_set_decrypt_key(TCAesKeySched_t s, const uint8_t *k);
/**
* @brief AES-128 Encryption procedure
* Decrypts in buffer into out buffer under key schedule s
* @return returns TC_CRYPTO_SUCCESS (1)
* returns TC_CRYPTO_FAIL (0) if: out is NULL or in is NULL or s is NULL
* @note Assumes s was initialized by aes_set_encrypt_key
* out and in point to 16 byte buffers
* @param out IN/OUT -- buffer to receive ciphertext block
* @param in IN -- a plaintext block to encrypt
* @param s IN -- initialized AES key schedule
*/
int tc_aes_decrypt(uint8_t *out, const uint8_t *in,
const TCAesKeySched_t s);
#ifdef __cplusplus
}
#endif
#endif /* __TC_AES_H__ */
|
mkroman/bl602-604
|
components/network/ble/blestack/src/services/ble_tp_svc.h
|
<gh_stars>0
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/****************************************************************************
FILE NAME
ble_tp_svc.h
DESCRIPTION
NOTES
*/
/****************************************************************************/
#ifndef _BLE_TP_SVC_H_
#define _BLE_TP_SVC_H_
#include "config.h"
//07af27a6-9c22-11ea-9afe-02fcdc4e7412
#define BT_UUID_SVC_BLE_TP BT_UUID_DECLARE_128(BT_UUID_128_ENCODE(0x07af27a6, 0x9c22, 0x11ea, 0x9afe, 0x02fcdc4e7412))
//07af27a7-9c22-11ea-9afe-02fcdc4e7412
#define BT_UUID_CHAR_BLE_TP_TX BT_UUID_DECLARE_128(BT_UUID_128_ENCODE(0x07af27a7, 0x9c22, 0x11ea, 0x9afe, 0x02fcdc4e7412))
//07af27a8-9c22-11ea-9afe-02fcdc4e7412
#define BT_UUID_CHAR_BLE_TP_RX BT_UUID_DECLARE_128(BT_UUID_128_ENCODE(0x07af27a8, 0x9c22, 0x11ea, 0x9afe, 0x02fcdc4e7412))
#define BT_CHAR_BLE_TP_TX_ATTR_INDEX (2)
#define BT_CHAR_BLE_TP_RX_ATTR_INDEX (4)
bool enable_notify;
int ble_tp_notify();
void ble_tp_init();
struct bt_gatt_attr *get_attr(u8_t index);
#endif
|
mkroman/bl602-604
|
components/bl602/bl602_std/bl602_std/StdDriver/Inc/bl602_sf_cfg.h
|
/**
******************************************************************************
* @file bl602_sf_cfg.h
* @version V1.0
* @date
* @brief This file is the standard driver header file
******************************************************************************
* @attention
*
* <h2><center>© COPYRIGHT(c) 2020 Bouffalo Lab</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
#ifndef __BL602_SF_CFG_H__
#define __BL602_SF_CFG_H__
#include "string.h"
#include "bl602_sflash.h"
#include "bl602_sf_ctrl.h"
/** @addtogroup BL602_Peripheral_Driver
* @{
*/
/** @addtogroup SF_CFG
* @{
*/
/** @defgroup SF_CFG_Public_Types
* @{
*/
/*@} end of group SF_CFG_Public_Types */
/** @defgroup SF_CFG_Public_Constants
* @{
*/
/*@} end of group SF_CFG_Public_Constants */
/** @defgroup SF_CFG_Public_Macros
* @{
*/
/*Flash option 0*/
/*Flash CLK*/
#define BFLB_EXTFLASH_CLK0_GPIO GLB_GPIO_PIN_22
/*FLASH CS*/
#define BFLB_EXTFLASH_CS0_GPIO GLB_GPIO_PIN_21
/*FLASH DATA*/
#define BFLB_EXTFLASH_DATA00_GPIO GLB_GPIO_PIN_20
#define BFLB_EXTFLASH_DATA10_GPIO GLB_GPIO_PIN_19
#define BFLB_EXTFLASH_DATA20_GPIO GLB_GPIO_PIN_18
#define BFLB_EXTFLASH_DATA30_GPIO GLB_GPIO_PIN_17
/*Flash option 1*/
/*Flash CLK*/
#define BFLB_EXTFLASH_CLK1_GPIO GLB_GPIO_PIN_22
/*FLASH CS*/
#define BFLB_EXTFLASH_CS1_GPIO GLB_GPIO_PIN_21
/*FLASH DATA*/
#define BFLB_EXTFLASH_DATA01_GPIO GLB_GPIO_PIN_20
#define BFLB_EXTFLASH_DATA11_GPIO GLB_GPIO_PIN_0
#define BFLB_EXTFLASH_DATA21_GPIO GLB_GPIO_PIN_1
#define BFLB_EXTFLASH_DATA31_GPIO GLB_GPIO_PIN_2
#define BFLB_FLASH_CFG_DESWAP 1
#define BFLB_FLASH_CFG_EXT0_17_22 2
#define BFLB_FLASH_CFG_EXT1_0_2_20_22 3
#define BFLB_FLASH_ID_VALID_FLAG 0x80000000
#define BFLB_FLASH_ID_VALID_MASK 0x7FFFFFFF
/*@} end of group SF_CFG_Public_Macros */
/** @defgroup SF_CFG_Public_Functions
* @{
*/
BL_Err_Type SF_Cfg_Get_Flash_Cfg_Need_Lock(uint32_t flashID,SPI_Flash_Cfg_Type * pFlashCfg);
void SF_Cfg_Init_Flash_Gpio(uint8_t flashPinCfg,uint8_t restoreDefault);
void SF_Cfg_Restore_GPIO17_Fun(uint8_t fun);
uint32_t SF_Cfg_Flash_Identify(uint8_t callFromFlash,uint32_t autoScan,uint32_t flashPinCfg,uint8_t restoreDefault,
SPI_Flash_Cfg_Type * pFlashCfg);
void SF_Cfg_Init_Ext_Flash_Gpio(uint8_t extFlashPin);
void SF_Cfg_Deinit_Ext_Flash_Gpio(uint8_t extFlashPin);
/*@} end of group SF_CFG_Public_Functions */
/*@} end of group SF_CFG */
/*@} end of group BL602_Peripheral_Driver */
#endif /* __BL602_SF_CFG_H__ */
|
mkroman/bl602-604
|
components/bl602/bl602_std/bl602_std/StdDriver/Src/bl602_xip_sflash_ext.c
|
<reponame>mkroman/bl602-604
/**
******************************************************************************
* @file bl602_xip_sflash_ext.c
* @version V1.0
* @date
* @brief This file is the standard driver c file
******************************************************************************
* @attention
*
* <h2><center>© COPYRIGHT(c) 2020 Bouffalo Lab</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
#include "string.h"
#include "bl602_xip_sflash_ext.h"
#include "bl602_sf_ctrl_ext.h"
/** @addtogroup BL602_Peripheral_Driver
* @{
*/
/** @addtogroup XIP_SFLASH_EXT
* @{
*/
/** @defgroup XIP_SFLASH_EXT_Private_Macros
* @{
*/
/*@} end of group XIP_SFLASH_EXT_Private_Macros */
/** @defgroup XIP_SFLASH_EXT_Private_Types
* @{
*/
/*@} end of group XIP_SFLASH_EXT_Private_Types */
/** @defgroup XIP_SFLASH_EXT_Private_Variables
* @{
*/
/*@} end of group XIP_SFLASH_EXT_Private_Variables */
/** @defgroup XIP_SFLASH_EXT_Global_Variables
* @{
*/
/*@} end of group XIP_SFLASH_EXT_Global_Variables */
/** @defgroup XIP_SFLASH_EXT_Private_Fun_Declaration
* @{
*/
/*@} end of group XIP_SFLASH_EXT_Private_Fun_Declaration */
/** @defgroup XIP_SFLASH_EXT_Private_Functions
* @{
*/
/****************************************************************************//**
* @brief XIP SFlash option save
*
* @param aesEnable: AES enable status pointer
*
* @return None
*
*******************************************************************************/
void ATTR_TCM_SECTION XIP_SFlash_Opt_Enter(uint8_t *aesEnable)
{
*aesEnable=SF_Ctrl_Is_AES_Enable();
if(*aesEnable){
SF_Ctrl_AES_Disable();
}
}
/****************************************************************************//**
* @brief XIP SFlash option restore
*
* @param aesEnable: AES enable status
*
* @return None
*
*******************************************************************************/
void ATTR_TCM_SECTION XIP_SFlash_Opt_Exit(uint8_t aesEnable)
{
if(aesEnable){
SF_Ctrl_AES_Enable();
}
}
/****************************************************************************//**
* @brief Read data from flash via XIP
*
* @param addr: addr: flash read start address
* @param data: data: data pointer to store data read from flash
* @param len: len: data length to read
*
* @return SUCCESS or ERROR
*
*******************************************************************************/
BL_Err_Type ATTR_TCM_SECTION XIP_SFlash_Read_Via_Cache_Need_Lock(uint32_t addr,uint8_t *data, uint32_t len)
{
uint32_t offset;
if(addr>=BL602_FLASH_XIP_BASE && addr<BL602_FLASH_XIP_END){
offset=SF_Ctrl_Get_Flash_Image_Offset();
SF_Ctrl_Set_Flash_Image_Offset(0);
/* Flash read */
BL602_MemCpy_Fast(data,(void *)(addr),len);
SF_Ctrl_Set_Flash_Image_Offset(offset);
}
return SUCCESS;
}
/*@} end of group XIP_SFLASH_EXT_Private_Functions */
/*@} end of group XIP_SFLASH_EXT */
/*@} end of group BL602_Peripheral_Driver */
|
mkroman/bl602-604
|
components/bl602/bl602_std/bl602_std/LHalDriver/Inc/lhal_uart.h
|
#include "bl602_common.h"
#include "ring_buffer.h"
typedef enum
{
LHAL_SUCCESS = 0,
LHAL_ERROR = -1,
LHAL_TIMEOUT = -2,
}LHAL_Err_Type;
typedef struct {
uint8_t id;
uint8_t dataBits;
uint8_t stopBits;
uint8_t parity;
uint32_t baudRate;
uint8_t enableCts;
uint8_t enableRts;
uint8_t enableTx;
uint8_t enableRx;
}LHAL_UART_CFG_Type;
typedef struct __LHAL_UART_Handle_Type{
LHAL_UART_CFG_Type cfg;
/* tx ring buffer*/
uint8_t *txBuf;
uint8_t txBufLen;
Ring_Buffer_Type txRb;
ringBuffer_Lock_Callback* txRbLock;
ringBuffer_Lock_Callback* txRbUnlock;
/* rx ring buffer*/
uint8_t *rxBuf;
uint8_t rxBufLen;
Ring_Buffer_Type rxRb;
ringBuffer_Lock_Callback* rxRbLock;
ringBuffer_Lock_Callback* rxRbUnlock;
/* call back function when use interrupt */
void (* txDoneCallBack)(struct __LHAL_UART_Handle_Type *uartHandler);
void (* txFullCallBack)(struct __LHAL_UART_Handle_Type *uartHandler);
void (* rxDoneCallBack)(struct __LHAL_UART_Handle_Type *uartHandler);
void (* rxFullCallBack)(struct __LHAL_UART_Handle_Type *uartHandler);
}LHAL_UART_Handle_Type;
LHAL_Err_Type LHal_UART_Init(LHAL_UART_Handle_Type *uartHandler);
LHAL_Err_Type LHal_UART_DeInit(uint8_t uartId);
LHAL_Err_Type LHal_UART_Send_Polling(LHAL_UART_Handle_Type *uartHandler,uint8_t *data,uint32_t len,uint32_t timout);
int32_t LHal_UART_Recv_Polling(LHAL_UART_Handle_Type *uartHandler,uint8_t *data,uint32_t maxLen,uint32_t timout);
LHAL_Err_Type LHal_UART_Send_IT(LHAL_UART_Handle_Type *uartHandler,uint8_t *data,uint32_t len,uint32_t timout);
int32_t LHal_UART_Recv_IT(LHAL_UART_Handle_Type *uartHandler,uint8_t *data,uint32_t maxLen,uint32_t timout);
BL_Err_Type LHal_UART_Notify_Register(LHAL_UART_Handle_Type *uartHandler);
LHAL_Err_Type LHal_Glue_UART_Init(LHAL_UART_Handle_Type *uartHandler);
LHAL_Err_Type LHal_Glue_UART_Enable_TX_Int(LHAL_UART_Handle_Type *uartHandler);
LHAL_Err_Type LHal_Glue_UART_Enable_RX_Int(LHAL_UART_Handle_Type *uartHandler);
LHAL_Err_Type LHal_Glue_UART_Disable_TX_Int(LHAL_UART_Handle_Type *uartHandler);
LHAL_Err_Type LHal_Glue_UART_Disable_RX_Int(LHAL_UART_Handle_Type *uartHandler);
LHAL_Err_Type LHal_Glue_UART_SendData(LHAL_UART_Handle_Type *uartHandler,uint8_t* data,uint32_t len);
int32_t LHal_Glue_UART_RecvData(LHAL_UART_Handle_Type *uartHandler,uint8_t* data,uint32_t maxLen);
|
mkroman/bl602-604
|
customer_app/bl602_boot2/bl602_boot2/blsp_boot2.c
|
<reponame>mkroman/bl602-604<filename>customer_app/bl602_boot2/bl602_boot2/blsp_boot2.c
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "bflb_platform.h"
#include "blsp_port.h"
#include "blsp_bootinfo.h"
#include "blsp_media_boot.h"
#include "partition.h"
#include "blsp_boot_decompress.h"
#include "blsp_common.h"
#include "softcrc.h"
/** @addtogroup BL606_BLSP_Boot2
* @{
*/
/** @addtogroup BLSP_BOOT2
* @{
*/
/** @defgroup BLSP_BOOT2_Private_Macros
* @{
*/
/*@} end of group BLSP_BOOT2_Private_Macros */
/** @defgroup BLSP_BOOT2_Private_Types
* @{
*/
/*@} end of group BLSP_BOOT2_Private_Types */
/** @defgroup BLSP_BOOT2_Private_Variables
* @{
*/
/*@} end of group BLSP_BOOT2_Private_Variables */
/** @defgroup BLSP_BOOT2_Global_Variables
* @{
*/
uint8_t boot2ReadBuf[BFLB_BOOT2_READBUF_SIZE] __attribute__((section(".system_ram")));
Boot_Image_Config bootImgCfg[2];
Boot_CPU_Config bootCpuCfg[2]=
{
/*CPU0 boot cfg*/
{
.mspStoreAddr=0,
.pcStoreAddr=0,
.defaultXIPAddr=0x23000000,
},
/*CPU1 boot cfg*/
{
.mspStoreAddr=BFLB_BOOT2_CPU1_APP_MSP_ADDR,
.pcStoreAddr=BFLB_BOOT2_CPU1_APP_PC_ADDR,
.defaultXIPAddr=0x23000000,
}
};
Boot_Efuse_HW_Config efuseCfg;
SPI_Flash_Cfg_Type flashCfg;
uint8_t psMode=BFLB_PSM_ACTIVE;
uint8_t cpuCount;
int32_t BLSP_Boot2_Get_Clk_Cfg(Boot_Clk_Config *cfg);
void BLSP_Boot2_Get_Efuse_Cfg(Boot_Efuse_HW_Config *efuseCfg);
/*@} end of group BLSP_BOOT2_Global_Variables */
/** @defgroup BLSP_BOOT2_Private_Fun_Declaration
* @{
*/
/*@} end of group BLSP_BOOT2_Private_Fun_Declaration */
/** @defgroup BLSP_BOOT2_Private_Functions_User_Define
* @{
*/
/*@} end of group BLSP_BOOT2_Private_Functions_User_Define */
/** @defgroup BLSP_BOOT2_Private_Functions
* @{
*/
/****************************************************************************//**
* @brief Partition table erase flash function pointer
*
* @param startaddr: Start address to erase
* @param endaddr: End address to erase
*
* @return BL_Err_Type
*
*******************************************************************************/
static BL_Err_Type PtTable_Flash_Erase (uint32_t startaddr,uint32_t endaddr)
{
XIP_SFlash_Erase_Need_Lock(&flashCfg,startaddr,endaddr);
return SUCCESS;
}
/****************************************************************************//**
* @brief Partition table write flash function pointer
*
* @param addr: Start address to write
* @param data: Data pointer to write
* @param len: Data length to write
*
* @return BL_Err_Type
*
*******************************************************************************/
static BL_Err_Type PtTable_Flash_Write (uint32_t addr,uint8_t *data, uint32_t len)
{
XIP_SFlash_Write_Need_Lock(&flashCfg,addr,data,len);
return SUCCESS;
}
/****************************************************************************//**
* @brief Partition table read flash function pointer
*
* @param addr: Start address to read
* @param data: Data pointer to read
* @param len: Data length to read
*
* @return BL_Err_Type
*
*******************************************************************************/
static BL_Err_Type PtTable_Flash_Read (uint32_t addr,uint8_t *data, uint32_t len)
{
XIP_SFlash_Read_Need_Lock(&flashCfg,addr,data,len);
return SUCCESS;
}
/****************************************************************************//**
* @brief Boot2 runs error call back function
*
* @param log: Log to print
*
* @return None
*
*******************************************************************************/
static void BLSP_Boot2_On_Error(void *log)
{
while(1){
MSG_ERR("%s\r\n",(char*)log);
ARCH_Delay_MS(500);
}
}
/****************************************************************************//**
* @brief Boot2 Dump partition entry
*
* @param ptEntry: Partition entry pointer to dump
*
* @return None
*
*******************************************************************************/
static void BLSP_Dump_PtEntry(PtTable_Entry_Config *ptEntry)
{
MSG("Name=%s\r\n",ptEntry->name);
MSG("Age=%d\r\n",(unsigned int)ptEntry->age);
MSG("active Index=%d\r\n",(unsigned int)ptEntry->activeIndex);
MSG("active Address=%08x\r\n",(unsigned int)ptEntry->Address[ptEntry->activeIndex]);
}
/****************************************************************************//**
* @brief Boot2 check XZ FW and do decompression
*
* @param activeID: Active partition table ID
* @param ptStuff: Pointer of partition table stuff
* @param ptEntry: Pointer of active entry
*
* @return 1 for find XZ FW and decompress success, 0 for other cases
*
*******************************************************************************/
static int BLSP_Boot2_Check_XZ_FW(PtTable_ID_Type activeID,PtTable_Stuff_Config *ptStuff,PtTable_Entry_Config *ptEntry)
{
uint8_t buf[6];
if(BFLB_BOOT2_SUCCESS!=BLSP_MediaBoot_Read(ptEntry->Address[ptEntry->activeIndex],buf,sizeof(buf))){
MSG_ERR("Read fw fail\r\n");
return 0;
}
if(BLSP_Boot2_Dump_Critical_Flag()){
BLSP_Dump_Data(buf,sizeof(buf));
}
if(BLSP_Boot2_Verify_XZ_Header(buf)==1){
MSG_DBG("XZ image\r\n");
if(BFLB_BOOT2_SUCCESS==BLSP_Boot2_Update_Fw(activeID,ptStuff,ptEntry)){
return 1;
}else{
MSG_ERR("Img decompress fail\r\n");
/* Set flag to make it not boot */
ptEntry->activeIndex=0;
ptEntry->Address[0]=0;
return 0;
}
}
return 0;
}
/****************************************************************************//**
* @brief Boot2 copy firmware from OTA region to normal region
*
* @param activeID: Active partition table ID
* @param ptStuff: Pointer of partition table stuff
* @param ptEntry: Pointer of active entry
*
* @return BL_Err_Type
*
*******************************************************************************/
static int BLSP_Boot2_Do_FW_Copy(PtTable_ID_Type activeID,PtTable_Stuff_Config *ptStuff,PtTable_Entry_Config *ptEntry)
{
uint8_t activeIndex=ptEntry->activeIndex;
uint32_t srcAddress=ptEntry->Address[activeIndex&0x01];
uint32_t destAddress=ptEntry->Address[!(activeIndex&0x01)];
uint32_t destMaxSize= ptEntry->maxLen[!(activeIndex&0x01)];
uint32_t totalLen=ptEntry->len;
uint32_t dealLen=0;
uint32_t curLen=0;
if(SUCCESS!=XIP_SFlash_Erase_Need_Lock(&flashCfg,destAddress,destAddress+destMaxSize-1)){
MSG_ERR("Erase flash fail");
return BFLB_BOOT2_FLASH_ERASE_ERROR;
}
while(dealLen<totalLen){
curLen=totalLen-dealLen;
if(curLen>sizeof(boot2ReadBuf)){
curLen=sizeof(boot2ReadBuf);
}
if(BFLB_BOOT2_SUCCESS!=BLSP_MediaBoot_Read(srcAddress,boot2ReadBuf,curLen)){
MSG_ERR("Read FW fail when copy\r\n");
return BFLB_BOOT2_FLASH_READ_ERROR;
}
if(SUCCESS!=XIP_SFlash_Write_Need_Lock(&flashCfg,destAddress,boot2ReadBuf,curLen)){
MSG_ERR("Write flash fail");
return BFLB_BOOT2_FLASH_WRITE_ERROR;
}
srcAddress+=curLen;
destAddress+=curLen;
dealLen+=curLen;
}
return BFLB_BOOT2_SUCCESS;
}
/****************************************************************************//**
* @brief Boot2 deal with one firmware
*
* @param activeID: Active partition table ID
* @param ptStuff: Pointer of partition table stuff
* @param ptEntry: Pointer of active entry
* @param fwName: Firmware name pointer
* @param type: Firmware name ID
*
* @return 0 for partition table changed,need re-parse,1 for partition table or entry parsed successfully
*
*******************************************************************************/
static int BLSP_Boot2_Deal_One_FW(PtTable_ID_Type activeID,PtTable_Stuff_Config *ptStuff,
PtTable_Entry_Config *ptEntry,uint8_t *fwName,
PtTable_Entry_Type type)
{
uint32_t ret;
if(fwName!=NULL){
MSG_DBG("Get FW:%s\r\n",fwName);
ret=PtTable_Get_Active_Entries_By_Name(ptStuff,fwName,ptEntry);
}else{
MSG_DBG("Get FW ID:%d\r\n",type);
ret=PtTable_Get_Active_Entries_By_ID(ptStuff,type,ptEntry);
}
if(PT_ERROR_SUCCESS!=ret){
MSG_ERR("Entry not found\r\n");
}else{
BLSP_Dump_PtEntry(ptEntry);
MSG_DBG("Check Img\r\n");
if(BLSP_Boot2_Check_XZ_FW(activeID,ptStuff,ptEntry)==1){
return 0;
}
/* Check if this partition need copy */
if(ptEntry->activeIndex>=2){
if(BFLB_BOOT2_SUCCESS==BLSP_Boot2_Do_FW_Copy(activeID,ptStuff,ptEntry)){
return 0;
}
}
}
return 1;
}
/****************************************************************************//**
* @brief Boot2 Roll back pt entry
*
* @param activeID: Active partition table ID
* @param ptStuff: Pointer of partition table stuff
* @param ptEntry: Pointer of active entry
*
* @return Boot_Error_Code
*
*******************************************************************************/
#ifdef BLSP_BOOT2_ROLLBACK
static int32_t BLSP_Boot2_Rollback_PtEntry(PtTable_ID_Type activeID,PtTable_Stuff_Config *ptStuff,PtTable_Entry_Config *ptEntry)
{
int32_t ret;
ptEntry->activeIndex=!(ptEntry->activeIndex&0x01);
ptEntry->age++;
ret=PtTable_Update_Entry((PtTable_ID_Type)(!activeID),ptStuff,ptEntry);
if(ret!=PT_ERROR_SUCCESS){
MSG_ERR("Update PT entry fail\r\n");
return BFLB_BOOT2_FAIL;
}
return BFLB_BOOT2_SUCCESS;
}
#endif
/****************************************************************************//**
* @brief Boot2 get mfg start up request
*
* @param activeID: Active partition table ID
* @param ptStuff: Pointer of partition table stuff
* @param ptEntry: Pointer of active entry
*
* @return 0 for partition table changed,need re-parse,1 for partition table or entry parsed successfully
*
*******************************************************************************/
static void BLSP_Boot2_Get_MFG_StartReq(PtTable_ID_Type activeID,PtTable_Stuff_Config *ptStuff,PtTable_Entry_Config *ptEntry,uint8_t *userFwName)
{
uint32_t ret;
uint32_t len=0;
uint8_t tmp[16+1]={0};
ret=PtTable_Get_Active_Entries_By_Name(ptStuff,(uint8_t*)"mfg",ptEntry);
if(PT_ERROR_SUCCESS==ret){
MSG_DBG("XIP_SFlash_Read_Need_Lock");
XIP_SFlash_Read_Need_Lock(&flashCfg,ptEntry->Address[0]+MFG_START_REQUEST_OFFSET,tmp,sizeof(tmp)-1);
MSG_DBG("%s",tmp);
if(tmp[0]=='0'||tmp[0]=='1'){
len=strlen((char*)tmp);
if(len<9){
ARCH_MemCpy_Fast(userFwName,tmp,len);
MSG_DBG("%s",tmp);
}
}
}else{
MSG_DBG("MFG not found");
}
}
/*@} end of group BLSP_BOOT2_Private_Functions */
/** @defgroup BLSP_BOOT2_Public_Functions
* @{
*/
/****************************************************************************//**
* @brief Boot2 main function
*
* @param None
*
* @return Return value
*
*******************************************************************************/
int main(void)
{
uint32_t ret=0,i=0;
PtTable_Stuff_Config ptTableStuff[2];
PtTable_ID_Type activeID;
/* Init to zero incase only one cpu boot up*/
PtTable_Entry_Config ptEntry[BFLB_BOOT2_CPU_MAX]={0};
uint32_t bootHeaderAddr[BFLB_BOOT2_CPU_MAX]={0};
uint8_t bootRollback[BFLB_BOOT2_CPU_MAX]={0};
uint8_t ptParsed=1;
uint8_t userFwName[9]={0};
#ifdef BLSP_BOOT2_ROLLBACK
uint8_t rollBacked=0;
#endif
uint8_t tempMode=0;
Boot_Clk_Config clkCfg;
uint8_t flashCfgBuf[4+sizeof(SPI_Flash_Cfg_Type)+4]={0};
/* It's better not enable interrupt */
BLSP_Boot2_Init_Timer();
/* Set RAM Max size */
BLSP_Boot2_Disable_Other_Cache();
/* Flush cache to get parameter */
BLSP_Boot2_Flush_XIP_Cache();
ret=BLSP_Boot2_Get_Clk_Cfg(&clkCfg);
ret|=SF_Cfg_Get_Flash_Cfg_Need_Lock(0,&flashCfg);
BLSP_Boot2_Flush_XIP_Cache();
bflb_platform_print_set(BLSP_Boot2_Get_Log_Disable_Flag());
bflb_platform_init(BLSP_Boot2_Get_Baudrate());
bflb_platform_deinit_time();
if(BLSP_Boot2_Get_Feature_Flag()==BLSP_BOOT2_CP_FLAG){
MSG_DBG("BLSP_Boot2_CP:%s,%s\r\n",__DATE__,__TIME__);
}else if(BLSP_Boot2_Get_Feature_Flag()==BLSP_BOOT2_MP_FLAG){
MSG_DBG("BLSP_Boot2_MC:%s,%s\r\n",__DATE__,__TIME__);
}else{
MSG_DBG("BLSP_Boot2_SP:%s,%s\r\n",__DATE__,__TIME__);
}
#ifdef BL_SDK_VER
MSG_DBG("SDK:%s\r\n",BL_SDK_VER);
#else
MSG_DBG("MCU SDK:%s\r\n",MCU_SDK_VERSION);
MSG_DBG("BSP:%s\r\n",BSP_VERSION);
#endif
if(BLSP_Boot2_Dump_Critical_Flag()){
BLSP_Dump_Data(&clkCfg,16);
BLSP_Dump_Data(&flashCfg,16);
}
MSG_DBG("Get efuse config\r\n");
BLSP_Boot2_Get_Efuse_Cfg(&efuseCfg);
/* Reset Sec_Eng for using */
BLSP_Boot2_Reset_Sec_Eng();
if(BLSP_Boot2_Get_Feature_Flag()!=BLSP_BOOT2_SP_FLAG){
/* Get cpu count info */
cpuCount=BLSP_Boot2_Get_CPU_Count();
}else{
cpuCount=1;
}
/* Get power save mode */
psMode=BLSP_Read_Power_Save_Mode();
/* Get User specified FW */
ARCH_MemCpy_Fast(userFwName,BLSP_Get_User_Specified_Fw(),4);
if(BLSP_Boot2_8M_Support_Flag()){
/* Set flash operation function, read via sbus */
PtTable_Set_Flash_Operation(PtTable_Flash_Erase,PtTable_Flash_Write,PtTable_Flash_Read);
}else{
/* Set flash operation function, read via xip */
PtTable_Set_Flash_Operation(PtTable_Flash_Erase,PtTable_Flash_Write,PtTable_Flash_Read);
}
while(1){
tempMode=0;
do{
activeID=PtTable_Get_Active_Partition_Need_Lock(ptTableStuff);
if(PT_TABLE_ID_INVALID==activeID){
BLSP_Boot2_On_Error("No valid PT\r\n");
}
MSG_DBG("Active PT:%d,%d\r\n",activeID,ptTableStuff[activeID].ptTable.age);
BLSP_Boot2_Get_MFG_StartReq(activeID,&ptTableStuff[activeID],&ptEntry[0],userFwName);
/* Get entry and boot */
if (userFwName[0]=='0'){
ptParsed=BLSP_Boot2_Deal_One_FW(activeID,&ptTableStuff[activeID],&ptEntry[0],&userFwName[1],PT_ENTRY_FW_CPU0);
if(ptParsed==0){
continue;
}else{
BLSP_Clr_User_Specified_Fw();
}
tempMode=1;
userFwName[0]=0;
}else if (userFwName[0]=='1' && cpuCount>1){
ptParsed=BLSP_Boot2_Deal_One_FW(activeID,&ptTableStuff[activeID],&ptEntry[1],&userFwName[1],PT_ENTRY_FW_CPU1);
if(ptParsed==0){
continue;
}else{
BLSP_Clr_User_Specified_Fw();
}
tempMode=1;
userFwName[0]=0;
}else{
ptParsed=BLSP_Boot2_Deal_One_FW(activeID,&ptTableStuff[activeID],&ptEntry[0],NULL,PT_ENTRY_FW_CPU0);
if(ptParsed==0){
continue;
}
if(cpuCount>1){
ptParsed=BLSP_Boot2_Deal_One_FW(activeID,&ptTableStuff[activeID],&ptEntry[1],NULL,PT_ENTRY_FW_CPU1);
if(ptParsed==0){
continue;
}
}
}
ptParsed=1;
}while(ptParsed==0);
/* Pass data to App*/
BLSP_Boot2_Pass_Parameter(NULL,0);
/* Pass active partition table ID */
BLSP_Boot2_Pass_Parameter(&activeID,4);
/* Pass active partition table content: table header+ entries +crc32 */
BLSP_Boot2_Pass_Parameter(&ptTableStuff[activeID],sizeof(PtTable_Config)+4+
ptTableStuff[activeID].ptTable.entryCnt*sizeof(PtTable_Entry_Config));
/* Pass flash config */
if(ptEntry[0].Address[ptEntry[0].activeIndex]!=0){
XIP_SFlash_Read_Via_Cache_Need_Lock(BLSP_BOOT2_XIP_BASE+ptEntry[0].Address[ptEntry[0].activeIndex]+8,flashCfgBuf,sizeof(flashCfgBuf));
/* Include magic and CRC32 */
BLSP_Boot2_Pass_Parameter(flashCfgBuf,sizeof(flashCfgBuf));
}
MSG_DBG("Boot start\r\n");
for(i=0;i<cpuCount;i++){
bootHeaderAddr[i]=ptEntry[i].Address[ptEntry[i].activeIndex];
}
#ifdef BLSP_BOOT2_ROLLBACK
/* Test mode is not need roll back */
if(rollBacked==0 && tempMode==0){
ret=BLSP_MediaBoot_Main(bootHeaderAddr,bootRollback,1);
}else{
ret=BLSP_MediaBoot_Main(bootHeaderAddr,bootRollback,0);
}
#else
ret=BLSP_MediaBoot_Main(bootHeaderAddr,bootRollback,0);
#endif
/* Fail in temp mode,continue to boot normal image */
if(tempMode==1){
continue;
}
#ifdef BLSP_BOOT2_ROLLBACK
/* If rollback is done, we still fail, break */
if(rollBacked){
break;
}
MSG_DBG("Boot return %d\r\n",ret);
MSG_WAR("Check Rollback\r\n");
for(i=0;i<cpuCount;i++){
if(bootRollback[i]!=0){
MSG_WAR("Rollback %d\r\n",i);
if(BFLB_BOOT2_SUCCESS==BLSP_Boot2_Rollback_PtEntry(activeID,&ptTableStuff[activeID],&ptEntry[i])){
rollBacked=1;
}
}
}
/* If need no rollback, boot fail due to other reseaon instead of imgae issue,break */
if(rollBacked==0){
break;
}
#else
break;
#endif
}
/* We should never get here unless boot fail */
MSG_ERR("Media boot return %d\r\n",ret);
while(1){
MSG_ERR("BLSP boot2 fail\r\n");
ARCH_Delay_MS(500);
}
}
void bfl_main()
{
main();
}
/*@} end of group BLSP_BOOT2_Public_Functions */
/*@} end of group BLSP_BOOT2 */
/*@} end of group BL606_BLSP_Boot2 */
|
mkroman/bl602-604
|
components/hal_drv/bl602_hal/bl_dma.c
|
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdio.h>
#include <stdint.h>
#include <string.h>
#include <bl602_dma.h>
#include <FreeRTOS.h>
#include <task.h>
#include "bl_dma.h"
#include "bl_irq.h"
#define DMA_CHANNEL_OFFSET 0x100
#define DMA_Get_Channel(ch) (DMA_BASE+DMA_CHANNEL_OFFSET+(ch)*0x100)
/*please also change NVIC_SetPriority of DMA channel*/
#define DMA_DEFAULT_CHANNEL_COPY (DMA_CH0)
static struct utils_list dma_copy_list;
static int bl_dma_int_clear(int ch)
{
uint32_t tmpVal;
uint32_t intClr;
/* Get DMA register */
uint32_t DMAChs = DMA_BASE;
tmpVal = BL_RD_REG(DMAChs, DMA_INTTCSTATUS);
if((BL_GET_REG_BITS_VAL(tmpVal, DMA_INTTCSTATUS) & (1 << ch)) != 0) {
/* Clear interrupt */
tmpVal = BL_RD_REG(DMAChs, DMA_INTTCCLEAR);
intClr = BL_GET_REG_BITS_VAL(tmpVal, DMA_INTTCCLEAR);
intClr |= (1 << ch);
tmpVal = BL_SET_REG_BITS_VAL(tmpVal, DMA_INTTCCLEAR, intClr);
BL_WR_REG(DMAChs, DMA_INTTCCLEAR, tmpVal);
}
tmpVal = BL_RD_REG(DMAChs, DMA_INTERRORSTATUS);
if((BL_GET_REG_BITS_VAL(tmpVal, DMA_INTERRORSTATUS) & (1 << ch)) != 0) {
/*Clear interrupt */
tmpVal = BL_RD_REG(DMAChs, DMA_INTERRCLR);
intClr = BL_GET_REG_BITS_VAL(tmpVal, DMA_INTERRCLR);
intClr |= (1 << ch);
tmpVal = BL_SET_REG_BITS_VAL(tmpVal, DMA_INTERRCLR, intClr);
BL_WR_REG(DMAChs, DMA_INTERRCLR, tmpVal);
}
return 0;
}
void bl_dma_update_memsrc(uint8_t ch, uint32_t src, uint32_t len)
{
uint32_t tmpVal;
/* Get channel register */
uint32_t DMAChs = DMA_Get_Channel(ch);
/* Check the parameters */
CHECK_PARAM(IS_DMA_CHAN_TYPE(ch));
/* config channel config*/
BL_WR_REG(DMAChs, DMA_SRCADDR, src);
tmpVal = BL_RD_REG(DMAChs, DMA_CONTROL);
tmpVal = BL_SET_REG_BITS_VAL(tmpVal, DMA_TRANSFERSIZE, len);
BL_WR_REG(DMAChs, DMA_CONTROL, tmpVal);
}
void bl_dma_update_memdst(uint8_t ch, uint32_t dst, uint32_t len)
{
uint32_t tmpVal;
/* Get channel register */
uint32_t DMAChs = DMA_Get_Channel(ch);
/* Check the parameters */
CHECK_PARAM(IS_DMA_CHAN_TYPE(ch));
/* config channel config*/
BL_WR_REG(DMAChs, DMA_DSTADDR, dst);
tmpVal = BL_RD_REG(DMAChs, DMA_CONTROL);
tmpVal = BL_SET_REG_BITS_VAL(tmpVal, DMA_TRANSFERSIZE, len);
BL_WR_REG(DMAChs, DMA_CONTROL, tmpVal);
}
static void inline _dma_copy_trigger(struct bl_dma_item *first)
{
//printf("------ DMA Trigger\r\n");
DMA_LLI_Update(DMA_DEFAULT_CHANNEL_COPY, (uint32_t)&(first->src));
DMA_Channel_Enable(DMA_DEFAULT_CHANNEL_COPY);
}
void bl_dma_copy(struct bl_dma_item *first)
{
taskENTER_CRITICAL();
if (utils_list_is_empty(&dma_copy_list)) {
_dma_copy_trigger(first);
}
utils_list_push_back(&dma_copy_list, &(first->item));
taskEXIT_CRITICAL();
}
void bl_dma_IRQHandler(void)
{
struct bl_dma_item *first;
//printf("------ Clear DMA now\r\n");
bl_dma_int_clear(DMA_DEFAULT_CHANNEL_COPY);
first = (struct bl_dma_item*)utils_list_pop_front(&dma_copy_list);
if (NULL == first) {
printf("[INT] ASSERT here for empty chain\r\n");
while (1) {
}
}
if (first->cb) {
first->cb(first->arg);
}
/*prepare NEXT Transfer*/
first = (struct bl_dma_item*)utils_list_pick(&dma_copy_list);
if (first) {
_dma_copy_trigger(first);
}
}
void bl_dma_init(void)
{
//FIXME use DMA_CH4 as channel copy
DMA_Chan_Type dmaCh = DMA_DEFAULT_CHANNEL_COPY;
DMA_LLI_Cfg_Type lliCfg =
{
DMA_TRNS_M2M,
DMA_REQ_NONE,
DMA_REQ_NONE,
};
utils_list_init(&dma_copy_list);
DMA_Enable();
DMA_IntMask(dmaCh, DMA_INT_ALL, MASK);
DMA_IntMask(dmaCh, DMA_INT_TCOMPLETED, UNMASK);
DMA_IntMask(dmaCh, DMA_INT_ERR, UNMASK);
DMA_LLI_Init(dmaCh, &lliCfg);
bl_irq_register(DMA_ALL_IRQn, bl_dma_IRQHandler);
bl_irq_enable(DMA_ALL_IRQn);
}
static void _cb_cmd(void *arg)
{
struct bl_dma_item *first;
first = (struct bl_dma_item*)arg;
printf("[DMA] [TEST] Callback is working, arg is %p\r\n", arg);
first->arg = NULL;
}
static void _dma_test_case1(void)
{
struct bl_dma_item *first;
uint32_t *src;
uint32_t *dst;
const int size = 68;
first = pvPortMalloc(sizeof(struct bl_dma_item));
src = pvPortMalloc(size);
dst = pvPortMalloc(size);
printf("[TEST] [DMA] first %p, src %p, dst %p\r\n",
first,
src,
dst
);
memset(first, 0, sizeof(struct bl_dma_item));
memset(src, 1, size);
memset(dst, 0xFF, size);
first->src = (uint32_t)src;
first->dst = (uint32_t)dst;
first->next = 0;
first->ctrl = BL_DMA_ITEM_CTRL_MAGIC_IRQ | (size >> 2);
first->cb = _cb_cmd;
first->arg = first;
bl_dma_copy(first);
/*Arg will be set in callback*/
while (first->arg) {
vTaskDelay(2);
}
vPortFree((void*)first->src);
vPortFree((void*)first->dst);
vPortFree(first);
}
void bl_dma_test(void)
{
_dma_test_case1();
}
|
mkroman/bl602-604
|
components/bl602/bl602_wifi/include/bl60x_fw_api.h
|
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __BL60x_FW_API_H__
#define __BL60x_FW_API_H__
//#include <bl_ro_params_mgt.h>
#include <stdint.h>
/*--------------------------------------------------------------------*/
/* Reason Codes - these codes are used in bouffalolab fw actions */
/* when an error action is taking place the reason code can indicate */
/* what the reason code. */
/*--------------------------------------------------------------------*/
#define WLAN_FW_SUCCESSFUL 0
#define WLAN_FW_TX_AUTH_FRAME_ALLOCATE_FAIILURE 1
#define WLAN_FW_AUTHENTICATION_FAIILURE 2
#define WLAN_FW_AUTH_ALGO_FAIILURE 3
#define WLAN_FW_TX_ASSOC_FRAME_ALLOCATE_FAIILURE 4
#define WLAN_FW_ASSOCIATE_FAIILURE 5
#define WLAN_FW_DEAUTH_BY_AP_WHEN_NOT_CONNECTION 6
#define WLAN_FW_DEAUTH_BY_AP_WHEN_CONNECTION 7
#define WLAN_FW_4WAY_HANDSHAKE_ERROR_PSK_TIMEOUT_FAILURE 8
#define WLAN_FW_4WAY_HANDSHAKE_TX_DEAUTH_FRAME_TRANSMIT_FAILURE 9
#define WLAN_FW_4WAY_HANDSHAKE_TX_DEAUTH_FRAME_ALLOCATE_FAIILURE 10
#define WLAN_FW_TX_AUTH_OR_ASSOC_FRAME_TRANSMIT_FAILURE 11
#define WLAN_FW_SCAN_NO_BSSID_AND_CHANNEL 12
#define WLAN_FW_CREATE_CHANNEL_CTX_FAILURE_WHEN_JOIN_NETWORK 13
#define WLAN_FW_JOIN_NETWORK_FAILURE 14
#define WLAN_FW_ADD_STA_FAILURE 15
#define WLAN_FW_BEACON_LOSS 16
void bl60x_fw_xtal_capcode_set(uint8_t cap_in, uint8_t cap_out, uint8_t enable, uint8_t cap_in_max, uint8_t cap_out_max);
void bl60x_fw_xtal_capcode_update(uint8_t cap_in, uint8_t cap_out);
void bl60x_fw_xtal_capcode_restore(void);
void bl60x_fw_xtal_capcode_autofit(void);
void bl60x_fw_xtal_capcode_get(uint8_t *cap_in, uint8_t *cap_out);
//void bl60x_fw_rf_tx_power_table_set(bl_tx_pwr_tbl_t* pwr_table);
int bl60x_fw_password_hash(char *password, char *ssid, int ssidlength, char *output);
void bl60x_fw_rf_table_set(uint32_t* channel_div_table_in, uint16_t* channel_cnt_table_in,
uint16_t lo_fcal_div);
void bl60x_fw_dump_data(void);
void bl60x_fw_dump_statistic(int forced);
void bl60x_current_time_us(long long *time_now);
enum {
/// Background
API_AC_BK = 0,
/// Best-effort
API_AC_BE,
/// Video
API_AC_VI,
/// Voice
API_AC_VO,
/// Number of access categories
API_AC_MAX
};
int bl60x_edca_get(int ac, uint8_t *aifs, uint8_t *cwmin, uint8_t *cwmax, uint16_t *txop);
/*Wi-Fi Firmware Entry*/
void wifi_main(void *param);
void phy_cli_register(void);
#endif /*__BL60x_FW_API_H__*/
|
mkroman/bl602-604
|
components/stage/blog/blog.h
|
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __BLOG_H__
#define __BLOG_H__
#include <stdint.h>
#include <stdbool.h>
#include <string.h>
#include <FreeRTOS.h>
#include <task.h>
#include <utils_log.h>
#include "blog_type.h"
#include "blog_cfg.h"
#ifdef __cplusplus
extern "C" {
#endif
#if (CFG_COMPONENT_BLOG_ENABLE == 1)
#define __blog_printf bl_printk
#define ATTR_BLOG_CODE1(name) __attribute__((used, section(".static_blogcomponent_code." #name)))
#define ATTR_BLOG_CODE2(name) __attribute__((used, section(".static_blogfile_code." #name)))
#define ATTR_BLOG_CODE3(name) __attribute__((used, section(".static_blogpri_code." #name)))
/* for hard debug level */
const static uint32_t BLOG_HARD_DECLARE_DISABLE __attribute__((used)) = 0;
/* component level */
#define _REFC_LEVEL(name) _fsymc_level_##name
#define REFC_LEVEL(name) _REFC_LEVEL(name)
#define _DEFC_LEVEL(name) blog_level_t REFC_LEVEL(name)
#define DECLARE_C_LEVEL(name) _DEFC_LEVEL(name)
/* component info */
#define _REFC_INFO(name) _fsymc_info_##name
#define REFC_INFO(name) _REFC_INFO(name)
#define _DEFC_INFO(name) static const blog_info_t REFC_INFO(name) ATTR_BLOG_CODE1(name) = {\
(blog_level_t *)(&REFC_LEVEL(name)), (char *)(#name)}
#define DECLARE_C_INFO(name) _DEFC_INFO(name)
DECLARE_C_LEVEL(__COMPONENT_NAME_DEQUOTED__);
DECLARE_C_INFO(__COMPONENT_NAME_DEQUOTED__);
/* file level */
#define _REFF_LEVEL(name) _fsymf_level_##name
#define REFF_LEVEL(name) _REFF_LEVEL(name)
#define _DEFF_LEVEL(name) blog_level_t REFF_LEVEL(name)
#define DECLARE_F_LEVEL(name) _DEFF_LEVEL(name)
/* file info */
#define _REFF_INFO(name) _fsymf_info_##name
#define REFF_INFO(name) _REFF_INFO(name)
#define _DEFF_INFO(name, named) const blog_info_t REFF_INFO(name) ATTR_BLOG_CODE2(name) = {\
(blog_level_t *)(&REFF_LEVEL(name)), (char *)(#named)}
#define DECLARE_F_INFO(name, named) _DEFF_INFO(name, named)
DECLARE_F_LEVEL(__COMPONENT_FILE_NAME_DEQUOTED__);
DECLARE_F_INFO(__COMPONENT_FILE_NAME_DEQUOTED__, __COMPONENT_FILE_NAMED__);
/* pri level */
#define _REFP_LEVEL(name) _fsymp_level_##name
#define REFP_LEVEL(name) _REFP_LEVEL(name)
#define _DEFP_LEVEL(name) blog_level_t REFP_LEVEL(name)
#define DECLARE_P_LEVEL(name) _DEFP_LEVEL(name)
/* pri info */
#define _REFP_INFO(name) _fsymp_info_##name
#define REFP_INFO(name) _REFP_INFO(name)
#define _DEFP_INFO(name, prefix) const blog_info_t REFP_INFO(name) ATTR_BLOG_CODE3(name) = {\
(blog_level_t *)(&REFP_LEVEL(name)), (char *)(#prefix"."#name)}
#define DECLARE_P_INFO(name, prefix) _DEFP_INFO(name, prefix)
#define BLOG_DECLARE(name) DECLARE_P_LEVEL(name);\
DECLARE_P_INFO(name, __COMPONENT_FILE_NAMED__);
#define custom_cflog(lowlevel, N, M, ...) do {\
if ( (lowlevel >= REFC_LEVEL(__COMPONENT_NAME_DEQUOTED__)) && \
(lowlevel >= REFF_LEVEL(__COMPONENT_FILE_NAME_DEQUOTED__))\
) {\
__blog_printf("[%10u][%s: %s:%4d] " M,\
(xPortIsInsideInterrupt())?(xTaskGetTickCountFromISR()):(xTaskGetTickCount()),\
N, __FILENAME__, __LINE__,\
##__VA_ARGS__);\
}\
} while(0==1)
#define custom_plog(priname, lowlevel, N, M, ...) do {\
if ( (lowlevel >= REFC_LEVEL(__COMPONENT_NAME_DEQUOTED__)) && \
(lowlevel >= REFF_LEVEL(__COMPONENT_FILE_NAME_DEQUOTED__)) && \
(lowlevel >= REFP_LEVEL(priname)) \
) {\
__blog_printf("[%10u][%s: %s:%4d] " M,\
(xPortIsInsideInterrupt())?(xTaskGetTickCountFromISR()):(xTaskGetTickCount()),\
N, __FILENAME__, __LINE__,\
##__VA_ARGS__);\
}\
} while(0==1)
#define custom_hexdumplog(name, lowlevel, logo, buf, size) do {\
if ( (lowlevel >= REFC_LEVEL(__COMPONENT_NAME_DEQUOTED__)) && \
(lowlevel >= REFF_LEVEL(__COMPONENT_FILE_NAME_DEQUOTED__))\
) {\
__blog_printf("[%10u][%s: %s:%4d] %s:\r\n",\
(xPortIsInsideInterrupt())?(xTaskGetTickCountFromISR()):(xTaskGetTickCount()),\
logo, __FILENAME__, __LINE__,\
name);\
blog_hexdump_out(name, 16, buf, size);\
}\
} while(0==1)
#define blog_debug(M, ...) if (0 == BLOG_HARD_DECLARE_DISABLE) {\
custom_cflog(BLOG_LEVEL_DEBUG,"DEBUG ", M, ##__VA_ARGS__);} // NULL
#define blog_info(M, ...) if (0 == BLOG_HARD_DECLARE_DISABLE) {\
custom_cflog(BLOG_LEVEL_INFO,"\x1b[32mINFO \x1b[0m", M, ##__VA_ARGS__);} // F_GREEN
#define blog_warn(M, ...) if (0 == BLOG_HARD_DECLARE_DISABLE) {\
custom_cflog(BLOG_LEVEL_WARN,"\x1b[33mWARN \x1b[0m", M, ##__VA_ARGS__);} // F_YELLOW
#define blog_error(M, ...) if (0 == BLOG_HARD_DECLARE_DISABLE) {\
custom_cflog(BLOG_LEVEL_ERROR,"\x1b[31mERROR \x1b[0m", M, ##__VA_ARGS__);} // F_RED
#define blog_assert(M, ...) if (0 == BLOG_HARD_DECLARE_DISABLE) {\
custom_cflog(BLOG_LEVEL_ASSERT,"\x1b[35mASSERT\x1b[0m", M, ##__VA_ARGS__);}// F_MAGENTA
#define blog_debug_user(name, M, ...) if (0 == BLOG_HARD_DECLARE_DISABLE) {\
custom_plog(name,BLOG_LEVEL_DEBUG, "DEBUG ", M, ##__VA_ARGS__);}
#define blog_info_user(name, M, ...) if (0 == BLOG_HARD_DECLARE_DISABLE) {\
custom_plog(name,BLOG_LEVEL_INFO, "\x1b[32mINFO \x1b[0m", M, ##__VA_ARGS__);}
#define blog_warn_user(name, M, ...) if (0 == BLOG_HARD_DECLARE_DISABLE) {\
custom_plog(name,BLOG_LEVEL_WARN, "\x1b[33mWARN \x1b[0m", M, ##__VA_ARGS__);}
#define blog_error_user(name, M, ...) if (0 == BLOG_HARD_DECLARE_DISABLE) {\
custom_plog(name,BLOG_LEVEL_ERROR, "\x1b[31mERROR \x1b[0m", M, ##__VA_ARGS__);}
#define blog_assert_user(name, M, ...) if (0 == BLOG_HARD_DECLARE_DISABLE) {\
custom_plog(name,BLOG_LEVEL_ASSERT, "\x1b[35mASSERT\x1b[0m", M, ##__VA_ARGS__);}
#define blog_debug_hexdump(name, buf, size) if (0 == BLOG_HARD_DECLARE_DISABLE) {\
custom_hexdumplog(name,BLOG_LEVEL_DEBUG, "DEBUG ", buf, size);}
#define blog_info_hexdump(name, buf, size) if (0 == BLOG_HARD_DECLARE_DISABLE) {\
custom_hexdumplog(name,BLOG_LEVEL_INFO, "\x1b[32mINFO \x1b[0m", buf, size);}
#define blog_warn_hexdump(name, buf, size) if (0 == BLOG_HARD_DECLARE_DISABLE) {\
custom_hexdumplog(name,BLOG_LEVEL_WARN, "\x1b[33mWARN \x1b[0m", buf, size);}
#define blog_error_hexdump(name, buf, size) if (0 == BLOG_HARD_DECLARE_DISABLE) {\
custom_hexdumplog(name,BLOG_LEVEL_ERROR, "\x1b[31mERROR \x1b[0m", buf, size);}
#define blog_assert_hexdump(name, buf, size) if (0 == BLOG_HARD_DECLARE_DISABLE) {\
custom_hexdumplog(name,BLOG_LEVEL_ASSERT, "\x1b[35mASSERT\x1b[0m", buf, size);}
#else
//#define BLOG_HARD_DECLARE_DISABLE 1
#define BLOG_DECLARE(name)
#define blog_debug(M, ...)
#define blog_info(M, ...)
#define blog_warn(M, ...)
#define blog_error(M, ...)
#define blog_assert(M, ...)
#define blog_debug_user(name, M, ...)
#define blog_info_user(name, M, ...)
#define blog_warn_user(name, M, ...)
#define blog_error_user(name, M, ...)
#define blog_assert_user(name, M, ...)
#define blog_debug_hexdump(name, buf, size)
#define blog_info_hexdump(name, buf, size)
#define blog_warn_hexdump(name, buf, size)
#define blog_error_hexdump(name, buf, size)
#define blog_assert_hexdump(name, buf, size)
#endif
void blog_init(void);
void blog_hexdump_out(const char *name, uint8_t width, uint8_t *buf, uint16_t size);
#ifdef __cplusplus
}
#endif
#endif
|
mkroman/bl602-604
|
components/network/ble/blestack/src/host/settings.h
|
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#if defined(BFLB_BLE)
#include "addr.h"
#endif
/* Max settings key length (with all components) */
#define BT_SETTINGS_KEY_MAX 36
/* Base64-encoded string buffer size of in_size bytes */
#define BT_SETTINGS_SIZE(in_size) ((((((in_size) - 1) / 3) * 4) + 4) + 1)
/* Helpers for keys containing a bdaddr */
void bt_settings_encode_key(char *path, size_t path_size, const char *subsys,
bt_addr_le_t *addr, const char *key);
int bt_settings_decode_key(const char *key, bt_addr_le_t *addr);
void bt_settings_save_id(void);
int bt_settings_init(void);
#if defined(BFLB_BLE)
#define NV_LOCAL_NAME "LOCAL_NAME"
#define NV_LOCAL_ID_ADDR "LOCAL_ID_ADDR"
#define NV_LOCAL_IRK "LOCAL_IRK"
#define NV_KEY_POOL "KEY_POOL"
#define NV_IMG_info "IMG_INFO"
int bt_settings_get_bin(const char *key, u8_t *value, size_t exp_len, size_t *real_len);
int bt_settings_set_bin(const char *key, const u8_t *value, size_t length);
int settings_delete(const char *key);
int settings_save_one(const char *key, const u8_t *value, size_t length);
void bt_settings_save_name(void);
void bt_local_info_load(void);
#endif
|
mkroman/bl602-604
|
components/network/ble/blestack/src/host/gatt_internal.h
|
<filename>components/network/ble/blestack/src/host/gatt_internal.h
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @file
* @brief Internal API for Generic Attribute Profile handling.
*/
/*
* Copyright (c) 2015-2016 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#define BT_GATT_CENTRAL_ADDR_RES_NOT_SUPP 0
#define BT_GATT_CENTRAL_ADDR_RES_SUPP 1
#include <gatt.h>
#define BT_GATT_PERM_READ_MASK (BT_GATT_PERM_READ | \
BT_GATT_PERM_READ_ENCRYPT | \
BT_GATT_PERM_READ_AUTHEN)
#define BT_GATT_PERM_WRITE_MASK (BT_GATT_PERM_WRITE | \
BT_GATT_PERM_WRITE_ENCRYPT | \
BT_GATT_PERM_WRITE_AUTHEN)
#define BT_GATT_PERM_ENCRYPT_MASK (BT_GATT_PERM_READ_ENCRYPT | \
BT_GATT_PERM_WRITE_ENCRYPT)
#define BT_GATT_PERM_AUTHEN_MASK (BT_GATT_PERM_READ_AUTHEN | \
BT_GATT_PERM_WRITE_AUTHEN)
void bt_gatt_init(void);
void bt_gatt_connected(struct bt_conn *conn);
void bt_gatt_encrypt_change(struct bt_conn *conn);
void bt_gatt_disconnected(struct bt_conn *conn);
bool bt_gatt_change_aware(struct bt_conn *conn, bool req);
int bt_gatt_store_ccc(u8_t id, const bt_addr_le_t *addr);
int bt_gatt_clear(u8_t id, const bt_addr_le_t *addr);
#if defined(CONFIG_BT_GATT_CLIENT)
void bt_gatt_notification(struct bt_conn *conn, u16_t handle,
const void *data, u16_t length);
#else
static inline void bt_gatt_notification(struct bt_conn *conn, u16_t handle,
const void *data, u16_t length)
{
}
#endif /* CONFIG_BT_GATT_CLIENT */
struct bt_gatt_attr;
/* Check attribute permission */
u8_t bt_gatt_check_perm(struct bt_conn *conn, const struct bt_gatt_attr *attr,
u8_t mask);
|
mkroman/bl602-604
|
components/bl602/bl602_wifi/plf/refip/src/driver/phy/bl602_phy_rf/phy_hal.c
|
<reponame>mkroman/bl602-604
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "phy_hal.h"
#include "bl602_glb.h"
#include "bl602_gpio.h"
#include "bl602_adc.h"
struct phy_hal_tag
{
int16_t temperature;
uint8_t capcode;
};
static uint32_t fem_gpio_oe;
static uint32_t fem_gpio_cfgctl10; // use GPIO20,GPIO21
static uint32_t fem_gpio_inited = 0;
static struct phy_hal_tag hal_env;
void hal_fem_gpio_on()
{
GLB_GPIO_Cfg_Type cfg;
cfg.gpioPin = 20;
cfg.gpioFun = GPIO20_FUN_FEM_GPIO_0;
cfg.gpioMode = GPIO_MODE_OUTPUT;
cfg.pullType = GPIO_PULL_NONE;
GLB_GPIO_Init(&cfg);
cfg.gpioPin = 21;
cfg.gpioFun = GPIO21_FUN_FEM_GPIO_1;
cfg.gpioMode = GPIO_MODE_OUTPUT;
cfg.pullType = GPIO_PULL_NONE;
GLB_GPIO_Init(&cfg);
}
void hal_fem_gpio_off()
{
if (fem_gpio_inited) {
BL_WR_WORD(GLB_BASE+GLB_GPIO_OUTPUT_EN_OFFSET, fem_gpio_oe);
BL_WR_WORD(GLB_BASE+GLB_GPIO_CFGCTL10_OFFSET, fem_gpio_cfgctl10);
}
}
uint8_t hal_get_capcode()
{
return ((*(volatile uint32_t*)0x4000f884) >> 22) & 0x3f;
}
void hal_set_capcode(uint32_t capcode)
{
uint32_t rval = (*(volatile uint32_t*)0x4000f884);
*(volatile uint32_t*)0x4000f884 = (rval & ~(0x3f << 16) & ~(0x3f << 22)) | (capcode << 16) | (capcode << 22);
// printf("-> new capcode %ld (%lx)", capcode, (*(volatile uint32_t*)0x4000f884));
}
bool hal_get_temperature(int16_t *temperature)
{
// if adc is in use
// return false;
*temperature = hal_env.temperature;
return true;
}
void hal_set_temperature(int16_t temperature)
{
hal_env.temperature = temperature;
}
|
mkroman/bl602-604
|
components/bl602/bl602_std/bl602_std/StdDriver/Src/bl602_sf_ctrl_ext.c
|
<reponame>mkroman/bl602-604<filename>components/bl602/bl602_std/bl602_std/StdDriver/Src/bl602_sf_ctrl_ext.c
/**
******************************************************************************
* @file bl602_sf_ctrl.c
* @version V1.0
* @date
* @brief This file is the standard driver c file
******************************************************************************
* @attention
*
* <h2><center>© COPYRIGHT(c) 2020 Bouffalo Lab</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
#include "bl602_sf_ctrl.h"
/** @addtogroup BL602_Peripheral_Driver
* @{
*/
/** @addtogroup SF_CTRL
* @{
*/
/** @defgroup SF_CTRL_Private_Macros
* @{
*/
/*@} end of group SF_CTRL_Private_Macros */
/** @defgroup SF_CTRL_Private_Types
* @{
*/
/*@} end of group SF_CTRL_Private_Types */
/** @defgroup SF_CTRL_Private_Variables
* @{
*/
/*@} end of group SF_CTRL_Private_Variables */
/** @defgroup SF_CTRL_Global_Variables
* @{
*/
/*@} end of group SF_CTRL_Global_Variables */
/** @defgroup SF_CTRL_Private_Fun_Declaration
* @{
*/
/*@} end of group SF_CTRL_Private_Fun_Declaration */
/** @defgroup SF_CTRL_Private_Functions
* @{
*/
/*@} end of group SF_CTRL_Private_Functions */
/** @defgroup SF_CTRL_Public_Functions
* @{
*/
/****************************************************************************//**
* @brief Check is serial flash controller AES enable
*
* @param None
*
* @return Wether AES is enable
*
*******************************************************************************/
uint8_t ATTR_TCM_SECTION SF_Ctrl_Is_AES_Enable(void)
{
uint32_t tmpVal;
tmpVal=BL_RD_REG(SF_CTRL_BASE,SF_CTRL_SF_AES);
return BL_IS_REG_BIT_SET(tmpVal,SF_CTRL_SF_AES_EN);
}
/****************************************************************************//**
* @brief Get flash controller clock delay value
*
* @param None
*
* @return Clock delay value
*
*******************************************************************************/
__WEAK
uint8_t ATTR_TCM_SECTION SF_Ctrl_Get_Clock_Delay(void)
{
uint32_t tmpVal;
tmpVal=BL_RD_REG(SF_CTRL_BASE,SF_CTRL_0);
if(BL_GET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_READ_DLY_EN)==0){
return 0;
}else{
return BL_GET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_READ_DLY_N) +1;
}
}
/****************************************************************************//**
* @brief Set flash controller clock delay value
*
* @param delay: Clock delay value
*
* @return None
*
*******************************************************************************/
__WEAK
void ATTR_TCM_SECTION SF_Ctrl_Set_Clock_Delay(uint8_t delay)
{
uint32_t tmpVal;
tmpVal=BL_RD_REG(SF_CTRL_BASE,SF_CTRL_0);
if(delay>0){
tmpVal=BL_SET_REG_BIT(tmpVal,SF_CTRL_SF_IF_READ_DLY_EN);
tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_READ_DLY_N,delay-1);
}else{
tmpVal=BL_CLR_REG_BIT(tmpVal,SF_CTRL_SF_IF_READ_DLY_EN);
}
BL_WR_REG(SF_CTRL_BASE,SF_CTRL_0,tmpVal);
}
/*@} end of group SF_CTRL_Public_Functions */
/*@} end of group SF_CTRL */
/*@} end of group BL602_Peripheral_Driver */
|
mkroman/bl602-604
|
components/bl602/bl602_wifidrv/bl60x_wifi_driver/wifi_mgmr_event.c
|
<filename>components/bl602/bl602_wifidrv/bl60x_wifi_driver/wifi_mgmr_event.c<gh_stars>0
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdio.h>
#include <string.h>
#include <aos/yloop.h>
#include "bl_main.h"
#include "wifi_mgmr.h"
#include "wifi_mgmr_api.h"
#include "wifi_mgmr_event.h"
static void cb_connect_ind(void *env, struct wifi_event_sm_connect_ind *ind)
{
wifi_mgmr_msg_t msg_wifi;
memset(&msg_wifi, 0, sizeof(msg_wifi));
msg_wifi.ev = ind->status_code ? WIFI_MGMR_EVENT_FW_IND_DISCONNECT : WIFI_MGMR_EVENT_FW_IND_CONNECTED;
msg_wifi.data1 = (void*)0x11223344;
msg_wifi.data2 = (void*)0x55667788;
msg_wifi.len = sizeof(msg_wifi);
wifi_mgmr_set_connect_stat_info(ind, WIFI_MGMR_CONNECT_IND_STAT_INFO_TYPE_IND_CONNECTION);
wifi_mgmr_event_notify(&msg_wifi);
}
static void cb_disconnect_ind(void *env, struct wifi_event_sm_disconnect_ind *ind)
{
wifi_mgmr_msg_t msg_wifi;
memset(&msg_wifi, 0, sizeof(msg_wifi));
printf("sending disconnect\r\n");
msg_wifi.ev = WIFI_MGMR_EVENT_FW_IND_DISCONNECT;
msg_wifi.data1 = (void*)0x11223344;
msg_wifi.data2 = (void*)0x55667788;
msg_wifi.len = sizeof(msg_wifi);
wifiMgmr.wifi_mgmr_stat_info.type_ind = WIFI_MGMR_CONNECT_IND_STAT_INFO_TYPE_IND_DISCONNECTION;
wifiMgmr.wifi_mgmr_stat_info.status_code = ind->reason_code;
wifi_mgmr_event_notify(&msg_wifi);
}
static void cb_beacon_ind(void *env, struct wifi_event_beacon_ind *ind)
{
wifi_mgmr_api_scan_item_beacon(ind->channel, ind->rssi, ind->auth, ind->bssid, ind->ssid, ind->ssid_len, ind->ppm_abs, ind->ppm_rel);
}
static void cb_probe_resp_ind(void *env, long long timestamp)
{
printf("timestamp = 0x%llx\r\n", timestamp);
}
static void cb_rssi_ind(void *env, int8_t rssi)
{
wifiMgmr.wlan_sta.sta.rssi = rssi;
}
static void cb_event_ind(void *env, struct wifi_event *event)
{
switch (event->id) {
case WIFI_EVENT_ID_IND_CHANNEL_SWITCH:
{
struct wifi_event_data_ind_channel_switch *ind;
ind = (struct wifi_event_data_ind_channel_switch*)event->data;
wifiMgmr.channel = ind->channel;
//TODO it seems channel is strange got from fw. Fixit
printf("[WIFI] [IND] Channel is %d\r\n", wifiMgmr.channel);
}
break;
case WIFI_EVENT_ID_IND_SCAN_DONE:
{
struct wifi_event_data_ind_scan_done *ind;
ind = (struct wifi_event_data_ind_scan_done*)event->data;
(void) ind;
puts("[WIFI] [IND] SCAN Done\r\n");
wifi_mgmr_scan_complete_notify();
aos_post_event(EV_WIFI, CODE_WIFI_ON_SCAN_DONE, WIFI_SCAN_DONE_EVENT_OK);
}
break;
default:
{
printf("----------------UNKNOWN WIFI EVENT %d-------------------\r\n", (int)event->id);
}
}
}
int wifi_mgmr_event_init(void)
{
bl_rx_sm_connect_ind_cb_register(NULL, cb_connect_ind);
bl_rx_sm_disconnect_ind_cb_register(NULL, cb_disconnect_ind);
bl_rx_beacon_ind_cb_register(NULL, cb_beacon_ind);
bl_rx_probe_resp_ind_cb_register(NULL, cb_probe_resp_ind);
bl_rx_rssi_cb_register(NULL, cb_rssi_ind);
bl_rx_event_register(NULL, cb_event_ind);
return 0;
}
|
mkroman/bl602-604
|
components/bl602/bl602_wifi/plf/refip/src/driver/phy/bl602_phy_rf/phy_adapt.c
|
<gh_stars>0
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "phy.h"
#include "phy_hal.h"
#include "hal_desc.h"
#include <stdint.h>
#include <stdio.h>
#define NUM_ADAPT_MAX (4)
#define INPUT_BUF_SIZE (8)
#define CELP_ALPHA (5)
#define CELP_EXP (6)
#define CELP_HYST (5)
#define PA_ABS(a) (((a)>=0) ? a : -a)
// ================================
// Format Modulation selection
// 0 NON-HT
// 1 NON-HT-DUP-OFDM
// 2 HT-MF
// 3 HT-GF
// 4 VHT
// ================================
// +-----+---------+------+
// | MCS | LegRate | Mbps |
// +-----+---------+------+
// | 0 | 4'b0000 | 1 |
// | 1 | 4'b0001 | 2 |
// | 2 | 4'b0010 | 5.5 |
// | 3 | 4'b0011 | 11 |
// | 4 | 4'b1011 | 6 |
// | 5 | 4'b1111 | 9 |
// | 6 | 4'b1010 | 12 |
// | 7 | 4'b1110 | 18 |
// | 8 | 4'b1001 | 24 |
// | 9 | 4'b1101 | 36 |
// | 10 | 4'b1000 | 48 |
// | 11 | 4'b1100 | 54 |
// +-----+---------+------+
// TODO: Version 2.0:
// 1) introduce cmd list
// 2) issue all cmd to upper layer and handled there
// 3) clear cmd list if an abnormal situation is detected
typedef struct {
int8_t rssi;
int8_t lna;
float ppm;
uint8_t new;
} input_t;
typedef struct {
uint8_t used;
uint32_t vif_tag;
input_t input_buffer[INPUT_BUF_SIZE];
int8_t input_buffer_ptr;
uint32_t last_update;
/* received signal strength */
int8_t rss;
int8_t rss_acq;
int8_t rss_trk;
int8_t rss_state;
uint8_t rss_hit_count;
uint32_t rss_count;
/* received interference strength */
int8_t ris;
/* clock error */
float ce;
int8_t ce_in;
int8_t ce_acq;
int8_t ce_trk;
int8_t ce_state;
int8_t ce_num_up_cmds;
int8_t ce_num_dn_cmds;
} pa_state_t;
typedef struct {
/** Receive Vector 1a */
uint32_t leg_length :12;
uint32_t leg_rate : 4;
uint32_t ht_length :16;
/** Receive Vector 1b */
uint32_t _ht_length : 4; // FIXME
uint32_t short_gi : 1;
uint32_t stbc : 2;
uint32_t smoothing : 1;
uint32_t mcs : 7;
uint32_t pre_type : 1;
uint32_t format_mod : 3;
uint32_t ch_bw : 2;
uint32_t n_sts : 3;
uint32_t lsig_valid : 1;
uint32_t sounding : 1;
uint32_t num_extn_ss : 2;
uint32_t aggregation : 1;
uint32_t fec_coding : 1;
uint32_t dyn_bw : 1;
uint32_t doze_not_allowed : 1;
/** Receive Vector 1c */
uint32_t antenna_set : 8;
uint32_t partial_aid : 9;
uint32_t group_id : 6;
uint32_t reserved_1c : 1;
int32_t rssi1 : 8;
/** Receive Vector 1d */
int32_t rssi2 : 8;
//int32_t rssi3 : 8;
//int32_t rssi4 : 8;
int32_t agc_lna : 4;
int32_t agc_rbb1 : 5;
int32_t agc_dg : 7;
uint32_t reserved_1d : 8;
/** Receive Vector 2a */
uint32_t rcpi : 8;
uint32_t evm1 : 8;
uint32_t evm2 : 8;
uint32_t freqoff_lo : 8;
//uint32_t evm3 : 8;
/** Receive Vector 2b */
uint32_t freqoff_hi : 8;
//uint32_t evm4 : 8;
uint32_t reserved2b_1 : 8;
uint32_t reserved2b_2 : 8;
uint32_t reserved2b_3 : 8;
} rvec_t;
static pa_state_t pa_env[NUM_ADAPT_MAX];
void pa_init()
{
int i, j;
for (i = 0; i < NUM_ADAPT_MAX; i++) {
pa_env[i].rss_state = 0;
pa_env[i].rss_count = 0;
pa_env[i].last_update = 0;
pa_env[i].input_buffer_ptr = 0;
pa_env[i].ce_state = 0;
pa_env[i].ce = 0;
pa_env[i].ce_num_up_cmds = 0;
pa_env[i].ce_num_dn_cmds = 0;
for (j = 0; j < INPUT_BUF_SIZE; j++) {
pa_env[i].input_buffer[j].new = 0;
pa_env[i].input_buffer[j].rssi = 0;
pa_env[i].input_buffer[j].lna = 0;
pa_env[i].input_buffer[j].ppm = 0;
}
}
}
// bind pa resource to a virtual interface
int8_t pa_alloc(uint32_t vif_addr)
{
uint8_t i;
for (i = 0; i < NUM_ADAPT_MAX; i++) {
if (pa_env[i].used == 0) {
pa_env[i].used = 1;
pa_env[i].vif_tag = vif_addr;
return i;
}
}
return -1;
}
void pa_free(uint8_t id)
{
if (id >= NUM_ADAPT_MAX) {
return;
}
pa_env[id].used = 0;
pa_env[id].vif_tag = 0;
}
void pa_reset(uint8_t id)
{
if (id >= NUM_ADAPT_MAX) {
return;
}
}
static float calc_ppm_ofdm(uint16_t rxv_freqoff)
{
int16_t freqoff;
float ppm;
freqoff = (int16_t)rxv_freqoff;
ppm = -1 * freqoff * 20.0 / 2440; // 602 as the center
// ppm = ppm/(s_nbmdm_on+1);
return ppm;
}
static float calc_ppm_dsss(uint8_t rxv_freqoff)
{
int8_t freqoff;
float ppm;
freqoff = (int8_t)rxv_freqoff;
ppm = freqoff * 0.7; // 602 as the center
return ppm;
}
static float calc_ppm(rvec_t *rvec)
{
if (rvec->format_mod == 0 && rvec->leg_rate < 4) {
return calc_ppm_dsss(rvec->freqoff_lo);
}
else {
return calc_ppm_ofdm(rvec->freqoff_lo + (rvec->freqoff_hi << 8));
}
}
void pa_input(uint8_t id, struct rx_hd *rhd)
{
rvec_t *rvec;
pa_state_t *pa;
if (id >= NUM_ADAPT_MAX) {
return;
}
// Retrieve RSSI/CE/GAIN information from the RX vector
rvec = (rvec_t*)&(rhd->recvec1a);
// Fill input
pa = &pa_env[id];
pa->last_update = rhd->tsflo;
pa->input_buffer[pa->input_buffer_ptr].new = 1;
pa->input_buffer[pa->input_buffer_ptr].rssi = rvec->rssi1;
pa->input_buffer[pa->input_buffer_ptr].lna = rvec->agc_lna;
pa->input_buffer[pa->input_buffer_ptr].ppm = calc_ppm(rvec);
pa->input_buffer_ptr = pa->input_buffer_ptr == (INPUT_BUF_SIZE-1) ? 0 : pa->input_buffer_ptr + 1;
}
volatile float _global_ppm = 0.0;
void pa_adapt(uint8_t id)
{
pa_state_t *pa;
input_t *inp;
int32_t rssi_sum, rssi_max, rssi_min, rssi_input;
int32_t rssi;
int i;
static uint32_t count = 0;
if (id >= NUM_ADAPT_MAX) {
return;
}
count = count + 1;
pa = &pa_env[id];
inp = pa->input_buffer_ptr == 0 ? &pa->input_buffer[INPUT_BUF_SIZE-1] : &pa->input_buffer[pa->input_buffer_ptr-1];
rssi = inp->rssi;
// sanity check if no input for a long while
if (inp->new == 0) {
// restore
return;
}
// RSS calculation
do {
if (pa->rss_state) {
// restart if the input rssi is rejected for a long while
if (pa->rss_hit_count > 4) {
pa->rss_hit_count = 0;
pa->rss_state = 0;
pa->rss_count = 0;
#if CFG_PHY_ADAPT_RSSI_PRINT
printf("restart rss loop\r\n");
#endif
continue;
}
// reject rare numbers
if (rssi > 0 || rssi < -100) {
continue;
}
// reject large variations
if ((rssi - pa->rss > 10) || (rssi - pa->rss < -10)) {
pa->rss_hit_count++;
continue;
}
// update
pa->rss_hit_count = 0;
pa->rss += (16*((int16_t)rssi - (int16_t)pa->rss)) >> 6;
if ((count & 0x3) == 0) {
//printf("pa %lud, rssi %ld, rss trk %d, ppm %.2f\r\n",pa->last_update,rssi,pa->rss,inp->ppm);
_global_ppm = inp->ppm;
}
#if CFG_PHY_ADAPT_RSSI_PRINT
if ((count & 0x7) == 0) {
//printf("pa %lud, rssi %ld, rss trk %d, ppm %.2f\r\n",pa->last_update,rssi,pa->rss,inp->ppm);
}
#endif
}
else {
if (pa->rss_count >= 7) {
pa->rss_state = 1;
rssi_max = -100;
rssi_min = +100;
rssi_sum = 0;
for (i = 0; i < 6; i++) {
rssi_input = pa->input_buffer[(pa->input_buffer_ptr-1-i) % INPUT_BUF_SIZE].rssi;
rssi_sum += rssi_input;
rssi_max = rssi_input > rssi_max ? rssi_input : rssi_max;
rssi_min = rssi_input < rssi_min ? rssi_input : rssi_min;
}
pa->rss = (int8_t)((rssi_sum - rssi_max - rssi_min)/4);
#if CFG_PHY_ADAPT_RSSI_PRINT
printf("pa %lud, rss acq %d\r\n",pa->last_update,pa->rss);
#endif
}
else {
pa->rss_count += 1;
}
}
} while (0);
// CE calculation
if ((count & 0xf) == 0xf) {
do {
if ((rssi - pa->rss > 10) || (rssi - pa->rss < -10)) {
continue;
}
if (PA_ABS(inp->ppm) > 2) {
if (rssi < -85) {
pa->ce += inp->ppm * 0.03125;
}
else {
pa->ce += inp->ppm * 0.125;
}
}
#if 0
if (pa->ce_state) {
if ((rssi - pa->rss > 10) || (rssi - pa->rss < -10)) {
continue;
}
// reject large variations
if (inp->ppm > 60 || inp->ppm < -60) {
continue;
}
pa->ce += inp->ppm * 0.125;
printf("pa %lud, ce trk %f\r\n",pa->last_update,pa->ce);
}
else {
if (pa->rss_state) {
pa->ce_state = 1;
ce_min = -100;
ce_max = +100;
ce_sum = 0;
for (i = 0; i < 6; i++) {
ce_input = pa->input_buffer[(pa->input_buffer_ptr-1-i) % INPUT_BUF_SIZE].ppm;
ce_sum += ce_input;
ce_max = ce_input > ce_max ? ce_input : ce_max;
ce_min = ce_input < ce_min ? ce_input : ce_min;
}
pa->ce = (ce_sum - ce_max - ce_min)/4;
printf("pa %lud, ce acq %f\r\n",pa->last_update,pa->ce);
}
}
#endif
} while (0);
// CE adjust
do {
// if (pa->ce_state == 0) {
// continue;
// }
if (PA_ABS(pa->ce) < CELP_HYST) {
//printf("pa %lud, ce trk %.2f\r\n",pa->last_update,pa->ce);
continue;
}
printf("pa %lud, ce trk %.2f, ",pa->last_update,pa->ce);
printf("action: capcode %d", hal_get_capcode());
GLOBAL_INT_DISABLE();
if (pa->ce > 0 && hal_get_capcode() > 0) {
hal_set_capcode(hal_get_capcode()-1);
}
if (pa->ce < 0 && hal_get_capcode() < 63) {
hal_set_capcode(hal_get_capcode()+1);
}
pa->ce = 0;
GLOBAL_INT_RESTORE();
printf(" -> %d\r\n", hal_get_capcode());
#if 0
if (pa->ce > 0) {
pa->ce_num_dn_cmds += (int)(pa->ce/2);`
}
else {
pa->ce_num_up_cmds += (int)(pa->ce/2);
}
if (pa->ce_num_dn_cmds > pa->ce_num_up_cmds) {
pa->ce_num_dn_cmds -= pa->ce_num_up_cmds;
pa->ce_num_up_cmds = 0;
}
else {
pa->ce_num_up_cmds -= pa->ce_num_dn_cmds;
pa->ce_num_dn_cmds = 0;
}
printf(" action: up %d, dn %d, capcode %d", pa->ce_num_up_cmds, pa->ce_num_dn_cmds, hal_get_capcode());
if (pa->ce_num_up_cmds) {
GLOBAL_INT_DISABLE();
if ( pa->ce_num_up_cmds + hal_get_capcode() < 63) {
hal_set_capcode(hal_get_capcode() + pa->ce_num_up_cmds);
}
else {
hal_set_capcode(63);
}
GLOBAL_INT_RESTORE();
pa->ce_num_up_cmds = 0;
}
if (pa->ce_num_dn_cmds) {
GLOBAL_INT_DISABLE();
if ( hal_get_capcode() >= pa->ce_num_dn_cmds) {
hal_set_capcode(hal_get_capcode() - pa->ce_num_dn_cmds);
}
else {
hal_set_capcode(0);
}
GLOBAL_INT_RESTORE();
pa->ce_num_dn_cmds = 0;
}
printf("->%d\r\n", hal_get_capcode());
#endif
} while (0);
}
// CCA adjust
// AGC adjust
// SM adjust
}
|
mkroman/bl602-604
|
components/network/ble/blestack/src/common/dummy.c
|
<filename>components/network/ble/blestack/src/common/dummy.c
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/**
* @file dummy.c
* Static compilation checks.
*/
/*
* Copyright (c) 2017 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr.h>
#if defined(CONFIG_BT_HCI_HOST)
/* The Bluetooth subsystem requires the Tx thread to execute at higher priority
* than the Rx thread as the Tx thread needs to process the acknowledgements
* before new Rx data is processed. This is a necessity to correctly detect
* transaction violations in ATT and SMP protocols.
*/
BUILD_ASSERT(CONFIG_BT_HCI_TX_PRIO < CONFIG_BT_RX_PRIO);
#endif
#if defined(CONFIG_BT_CTLR)
/* The Bluetooth Controller's priority receive thread priority shall be higher
* than the Bluetooth Host's Tx and the Controller's receive thread priority.
* This is required in order to dispatch Number of Completed Packets event
* before any new data arrives on a connection to the Host threads.
*/
BUILD_ASSERT(CONFIG_BT_CTLR_RX_PRIO < CONFIG_BT_HCI_TX_PRIO);
#endif /* CONFIG_BT_CTLR */
/* Immediate logging is not supported with the software-based Link Layer
* since it introduces ISR latency due to outputting log messages with
* interrupts disabled.
*/
#if !defined(CONFIG_TEST) && !defined(CONFIG_ARCH_POSIX) && \
(defined(CONFIG_BT_LL_SW_SPLIT) || defined(CONFIG_BT_LL_SW_LEGACY))
BUILD_ASSERT_MSG(!IS_ENABLED(CONFIG_LOG_IMMEDIATE), "Immediate logging not "
"supported with the software Link Layer");
#endif
|
mkroman/bl602-604
|
components/bl602/bl602_wifi/plf/refip/src/driver/phy/bl602_phy_rf/phy_trpc.h
|
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _PHY_TRPC_H_
#define _PHY_TRPC_H_
#include <stdint.h>
#define PHY_TRPC_MAX_DBM (30)
/*
* STRUCTURES/TYPES DEFINITION
****************************************************************************************
*/
struct trpc_env_tag
{
/// RF output power capability
int8_t power_dbm_max_rf;
int8_t power_dbm_min_rf;
/// Maximum power limited by regulations (SRRC/FCC/CE...)
int8_t power_dbm_lim_reg;
/// Current channel
int16_t channel_freq;
/// Current temperature
int8_t temperature;
int8_t temperature_compensate;
};
/*
* GLOBAL VARIABLES
****************************************************************************************
*/
extern struct trpc_env_tag trpc_env;
/*
* FUNCTION PROTOTYPES
****************************************************************************************
*/
void trpc_init();
int8_t trpc_get_rf_max_power();
int8_t trpc_get_rf_min_power();
uint8_t trpc_get_default_power_idx(uint8_t formatmod, uint8_t mcs);
uint8_t trpc_get_power_idx(uint8_t formatmod, uint8_t mcs, int8_t pwr_dbm);
void trpc_update_vs_channel(int8_t channel_MHz);
void trpc_update_vs_temperature(int8_t temperature);
#endif
|
mkroman/bl602-604
|
components/network/ble/blestack/src/profiles/oad/oad.h
|
<gh_stars>0
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __OAD_H__
#define __OAD_H__
#include "types.h"
#include "hci_host.h"
#include "work_q.h"
#define LOCAL_MANU_CODE 0x07AF
#define LOCAL_FILE_VER 00000001
#define OAD_OPCODE_SIZE 1
//00070000-0745-4650-8d93-df59be2fc10a
#define BT_UUID_OAD BT_UUID_DECLARE_128(BT_UUID_128_ENCODE(0x00070000, 0x0745, 0x4650, 0x8d93, 0xdf59be2fc10a))
//00070001-0745-4650-8d93-df59be2fc10a
#define BT_UUID_OAD_DATA_IN BT_UUID_DECLARE_128(BT_UUID_128_ENCODE(0x00070001, 0x0745, 0x4650, 0x8d93, 0xdf59be2fc10a))
//00070002-0745-4650-8d93-df59be2fc10a
#define BT_UUID_OAD_DATA_OUT BT_UUID_DECLARE_128(BT_UUID_128_ENCODE(0x00070002, 0x0745, 0x4650, 0x8d93, 0xdf59be2fc10a))
enum{
OAD_SUCC = 0x00,
OAD_ABORT,
OAD_INVALID_IMAG,
OAD_REQ_MORE_DATA,
OAD_MALORMED_CMD,
OAD_UPGRD_CMPLT,
};
enum{
OAD_TYPE_IDENTITY = 0x00,
OAD_TYPE_IMAG_TRANS
};
enum{
OAD_CMD_IMAG_IDENTITY = 0x00,
OAD_CMD_IMAG_BLOCK_REQ,
OAD_CMD_IMAG_BLOCK_RESP,
OAD_CMD_IMAG_UPGRD_END,
};
struct oad_file_info{
u16_t manu_code;
u32_t file_ver;
} __packed;
struct oad_env_tag{
struct oad_file_info file_info;
u32_t cur_file_size;
u32_t upgrd_file_ver;
u32_t upgrd_file_size;
u32_t upgrd_offset;
u32_t upgrd_crc32;
#if defined(CFG_BOOT2_ENABLED)
struct k_delayed_work upgrd_work;
#endif
u32_t new_img_addr;
};
struct oad_image_identity_t{
struct oad_file_info file_info;
u32_t file_size;
u32_t crc32;
} __packed;
struct oad_block_req_t{
struct oad_file_info file_info;
u32_t file_offset;
} __packed;
#define OAD_BLK_RSP_DATA_OFFSET 12
struct oad_block_rsp_t{
uint8_t status;
struct oad_file_info file_info;
u32_t file_offset;
u8_t data_size;
u8_t *pdata;
} __packed;
struct oad_upgrd_end_t{
u8_t status;
struct oad_file_info file_info;
} __packed;
#endif //__OAD_H__
|
mkroman/bl602-604
|
components/network/ble/blestack/src/common/log.c
|
<reponame>mkroman/bl602-604
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/* log.c - logging helpers */
/*
* Copyright (c) 2017 Nordic Semiconductor ASA
* Copyright (c) 2016 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
/* Helper for printk parameters to convert from binary to hex.
* We declare multiple buffers so the helper can be used multiple times
* in a single printk call.
*/
#include <stddef.h>
#include <zephyr/types.h>
#include <zephyr.h>
#include <misc/util.h>
#include <bluetooth.h>
#include <hci_host.h>
const char *bt_hex_real(const void *buf, size_t len)
{
static const char hex[] = "0123456789abcdef";
static char str[129];
const u8_t *b = buf;
int i;
len = MIN(len, (sizeof(str) - 1) / 2);
for (i = 0; i < len; i++) {
str[i * 2] = hex[b[i] >> 4];
str[i * 2 + 1] = hex[b[i] & 0xf];
}
str[i * 2] = '\0';
return str;
}
const char *bt_addr_str_real(const bt_addr_t *addr)
{
static char str[BT_ADDR_STR_LEN];
bt_addr_to_str(addr, str, sizeof(str));
return str;
}
const char *bt_addr_le_str_real(const bt_addr_le_t *addr)
{
static char str[BT_ADDR_LE_STR_LEN];
bt_addr_le_to_str(addr, str, sizeof(str));
return str;
}
|
mkroman/bl602-604
|
components/bl602/bl602_wifi/plf/refip/src/driver/phy/bl602_phy_rf/phy_bl602.c
|
<filename>components/bl602/bl602_wifi/plf/refip/src/driver/phy/bl602_phy_rf/phy_bl602.c
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdio.h>
#include "phy_bl602.h"
#include "bl_config.h"
#include "phy.h"
#include "dbg.h"
#include "rf.h"
#include "hal_machw.h"
#include "reg_mac_core.h"
#include "reg_mdm_stat.h"
#include "reg_mdm_cfg.h"
#include "reg_mdmdsss_cfg.h"
#include "reg_riu.h"
#include "reg_rc.h"
#include "reg_karst_if.h"
#include "reg_macbypass.h"
#include "rd.h"
#include "reg/reg_bl_rc2.h"
#include "rfc_bl602.h"
#include "reg/reg_rf.h"
#include "reg/reg_bz_phy.h"
#include "reg/reg_bz_phy_agc.h"
#include "phy_trpc.h"
#include "phy_adapt.h"
#define PHY_BAND_2G4_MIN_FREQ (2412)
#define PHY_BAND_2G4_MAX_FREQ (2484)
/*
* TYPEDEFS
****************************************************************************************
*/
/// Structure containing the parameters of the PHY configuration
struct phy_bl602_cfg_tag
{
uint32_t reserved;
};
/// PHY driver context.
struct phy_env_tag
{
/// Currently configuration parameters
struct phy_bl602_cfg_tag cfg;
/// Currently configured 20MHz primary frequency (in MHz)
uint16_t chnl_prim20_freq;
/// Currently configured nMHz contiguous channel (of primary 80 if 80+80) (not used)
uint16_t chnl_center1_freq;
/// Currently configured secondary 80MHz channel if 80+80, unused otherwise (not used)
uint16_t chnl_center2_freq;
/// Current selected band
uint8_t band;
/// 20/40/80/160/80+80 channel type
uint8_t chnl_type;
};
/*
* VARIABLES
****************************************************************************************
*/
struct phy_env_tag phy_env[1];
extern const uint32_t agcmem[];
static int8_t rxgain[] = {0,9,18,25,32,38,45,53,60};
static int8_t rxgain_offset_vs_temperature = 0;
/*
* IMPLEMENTATIONS (Common)
****************************************************************************************
*/
static inline void mdelay(uint32_t ms)
{
volatile uint32_t n = ms*40000;
while (n--);
}
static void agc_download()
{
uint32_t* p_agcmem = (uint32_t*)(PHY_BL602_AGC_MEM_ADDR);
riu_agcfsmreset_setf(1);
mdm_agcmemclkforce_setf(1);
// Write AGC memory
for(int i = 0; i < PHY_BL602_AGC_MEM_SIZE/4; i++)
{
*p_agcmem = agcmem[i];
p_agcmem++;
}
mdm_agcmemclkforce_setf(0);
riu_agcfsmreset_setf(0);
}
void phy_config_rxgain(int offset)
{
if (offset == rxgain_offset_vs_temperature) {
return;
}
rxgain_offset_vs_temperature = offset;
rc2_rx0_lna_gain_0_setf(rxgain_offset_vs_temperature + rxgain[0]);
rc2_rx0_lna_gain_1_setf(rxgain_offset_vs_temperature + rxgain[1]);
rc2_rx0_lna_gain_2_setf(rxgain_offset_vs_temperature + rxgain[2]);
rc2_rx0_lna_gain_3_setf(rxgain_offset_vs_temperature + rxgain[3]);
rc2_rx0_lna_gain_4_setf(rxgain_offset_vs_temperature + rxgain[4]);
rc2_rx0_lna_gain_5_setf(rxgain_offset_vs_temperature + rxgain[5]);
rc2_rx0_lna_gain_6_setf(rxgain_offset_vs_temperature + rxgain[6]);
rc2_rx0_lna_gain_7_setf(rxgain_offset_vs_temperature + rxgain[7]);
rc2_rx0_lna_gain_8_setf(rxgain_offset_vs_temperature + rxgain[8]);
}
/*
* IMPLEMENTATIONS (Private Driver)
****************************************************************************************
*/
void agc_config()
{
riu_htstfgainen_setf(0);
riu_rifsdeten_setf(0);
riu_fe20gain_setf(0);
riu_fe40gain_setf(0);
riu_vpeakadcqdbv_setf(-8+256);
riu_adcpowmindbm_setf(-98+256);
riu_adcpowsupthrdbm_setf(-50+256);
// sat detects too late for some power levels
riu_satdelay50ns_setf(8);
riu_sathighthrdbv_setf(-4+64);
riu_satlowthrdbv_setf(-8+64);
riu_satthrdbv_setf(-7+64);
// riu_satdelay50ns_setf(8);
// riu_sathighthrdbv_setf(-2+64);
// riu_satlowthrdbv_setf(-10+64);
// riu_satthrdbv_setf(-9+64);
// riu_sathighthrdbv_setf(-6+64);
// riu_satlowthrdbv_setf(-10+64);
// riu_satthrdbv_setf(-9+64);
riu_crossdnthrqdbm_setf(-400+512);
riu_crossupthrqdbm_setf(-400+512);
riu_rampupgapqdb_setf(18);
riu_rampupndlindex_setf(5);
riu_rampdngapqdb_setf(40);
riu_rampdnndlindex_setf(7);
riu_adcpowdisthrdbv_setf(-40+128);
// riu_adcpowdisndl_setf(3);
riu_idinbdpowgapdnqdbm_setf(24);
// pkdet pkdet & lnaGainCp2Min & true
riu_evt0op3_setf(62);
riu_evt0op2_setf(55);
riu_evt0op1_setf(1);
riu_evt0pathcomb_setf(0);
riu_evt0opcomb_setf(1);
// sat (vgaGainCp2Min || lnaGainCp2Min) && sat
riu_evt1op1_setf(57);
riu_evt1op2_setf(55); // riu_evt1op2_setf(55);
// riu_evt1op2_setf(0); // riu_evt1op2_setf(55);
riu_evt1op3_setf(20); //riu_evt1op3_setf(20);
riu_evt1pathcomb_setf(0);
riu_evt1opcomb_setf(2);
// det (rfGainCp2Min & rampUp & ~InbdPowInf)
riu_evt2op1_setf(15);
riu_evt2op2_setf(23);
riu_evt2op3_setf(42);
riu_evt2pathcomb_setf(0);
riu_evt2opcomb_setf(5);
// dis (adcPowDis || rampDn) && rfGainCp2Max
riu_evt3op1_setf(25);
riu_evt3op2_setf(0);// riu_evt3op2_setf(24);
riu_evt3op3_setf(14);
riu_evt3opcomb_setf(2);
// dsssdet: dsssDet & true & ~(lnaGain<Max)
rc2_evt4op1_setf(63);
rc2_evt4op2_setf(1);
rc2_evt4op3_setf(54);
rc2_evt4opcomb_setf(5);
rc2_pkdet_mode_setf(0);
rc2_pkdet_cnt_thr_setf(2);
rc2_pkdet_cnt_thr_setf(2);
#if 0 // fpga project
rc2_rx0_vga_idx_max_setf(12);
rc2_rx0_vga_idx_min_setf(3);
rc2_rx0_lna_idx_max_setf(8);
rc2_rx0_lna_idx_min_setf(0);
rc2_rx0_lna_gain_0_setf(13);//rc2_rx0_lna_gain_0_setf(9);
rc2_rx0_lna_gain_1_setf(19);//rc2_rx0_lna_gain_1_setf(15);
rc2_rx0_lna_gain_2_setf(24);//rc2_rx0_lna_gain_2_setf(21);
rc2_rx0_lna_gain_3_setf(27);
rc2_rx0_lna_gain_4_setf(33);
rc2_rx0_lna_gain_5_setf(39);
rc2_rx0_lna_gain_6_setf(45);
rc2_rx0_lna_gain_7_setf(52);
rc2_rx0_lna_gain_8_setf(58);
#else
#if 1
rc2_rx0_vga_idx_max_setf(12); // rc2_rx0_vga_idx_max_setf(12);
rc2_rx0_vga_idx_min_setf(3); // rc2_rx0_vga_idx_min_setf(3);
rc2_rx0_lna_idx_max_setf(8); // rc2_rx0_lna_idx_max_setf(8);
rc2_rx0_lna_idx_min_setf(0); // rc2_rx0_lna_idx_min_setf(0);
phy_config_rxgain(0);
#else
rc2_rx0_vga_idx_max_setf(12); // rc2_rx0_vga_idx_max_setf(12);
rc2_rx0_vga_idx_min_setf(3); // rc2_rx0_vga_idx_min_setf(3);
rc2_rx0_lna_idx_max_setf(8); // rc2_rx0_lna_idx_max_setf(8);
rc2_rx0_lna_idx_min_setf(0); // rc2_rx0_lna_idx_min_setf(0);
rc2_rx0_lna_gain_0_setf(-6); // rc2_rx0_lna_gain_0_setf(18);
rc2_rx0_lna_gain_1_setf(3); // rc2_rx0_lna_gain_1_setf(21);
rc2_rx0_lna_gain_2_setf(12); // rc2_rx0_lna_gain_2_setf(26);
rc2_rx0_lna_gain_3_setf(19); // rc2_rx0_lna_gain_3_setf(32);
rc2_rx0_lna_gain_4_setf(26); // rc2_rx0_lna_gain_4_setf(38);
rc2_rx0_lna_gain_5_setf(32); // rc2_rx0_lna_gain_5_setf(43);
rc2_rx0_lna_gain_6_setf(29); // rc2_rx0_lna_gain_6_setf(51);
rc2_rx0_lna_gain_7_setf(47); // rc2_rx0_lna_gain_7_setf(55);
rc2_rx0_lna_gain_8_setf(60); // rc2_rx0_lna_gain_8_setf(61);
rf_gain_ctrl7_gc_rmxgm_setf(0);
rf_gain_ctrl6_gc_rmxgm_setf(0);
rf_gain_ctrl5_gc_rmxgm_setf(0);
rf_gain_ctrl4_gc_rmxgm_setf(0);
rf_gain_ctrl3_gc_rmxgm_setf(0);
rf_gain_ctrl2_gc_rmxgm_setf(0);
rf_gain_ctrl1_gc_rmxgm_setf(0);
rf_gain_ctrl0_gc_rmxgm_setf(0);
rf_rmxgm_10m_mode_en_setf(1);
#endif
#endif
#if 1
riu_inbdpowmindbm_setf(-98+256);
riu_inbdpowsupthrdbm_setf(-92+256);
riu_inbdpowinfthrdbm_setf(-93+256);
rc2_inbdpow_adj_thr_dbm_setf(-75+256);
rc2_inbdpowsupthr_adj_en_setf(1);
rc2_inbdpowinfthr_adj_en_setf(1);
#else
riu_inbdpowmindbm_setf(-98+256);
riu_inbdpowsupthrdbm_setf(-60+256);
riu_inbdpowinfthrdbm_setf(-70+256);
rc2_inbdpowsupthr_adj_en_setf(0);
rc2_inbdpowinfthr_adj_en_setf(0);
#endif
rc2_reflevofdmthd_en_setf(1);
rc2_reflevofdmthd_setf(256); // rc2_reflevofdmthd_setf(300);
// rc2_reflevofdmthd_setf(256); // rc2_reflevofdmthd_setf(300);
// rc2_reflevofdmthd_setf(292);
rc2_reflevdsssthd_en_setf(1);
rc2_reflevdsssthd_setf(380);
rc2_reflevdssscontthd_en_setf(1);
rc2_reflevdssscontthd_setf(256); // rc2_reflevdssscontthd_setf(1024);
rc2_inbdpowfastvalid_cnt_setf(64);
}
void mdm_reset(void)
{
uint8_t loop_cnt = 10;
mdm_swreset_set(0x1111);
while (loop_cnt--) {
}
mdm_swreset_set(0x0);
}
static int phy_mdm_conf(uint8_t chan_type)
{
int mdmconf = 0;
switch (chan_type)
{
case PHY_CHNL_BW_20:
mdmconf = 0;
break;
// case PHY_CHNL_BW_40:
// mdmconf = 2;
// break;
default:
ASSERT_ERR(0);
break;
}
return mdmconf;
}
void phy_hw_set_channel(uint8_t band, uint16_t freq, uint16_t freq1, uint8_t chantype)
{
dbg(D_INF "%s: band=%d freq=%d freq1=%d chantype=%d\n",__func__,band,freq,freq1,chantype);
ASSERT_ERR(chantype == PHY_CHNL_BW_20);
ASSERT_ERR(band == PHY_BAND_2G4);
riu_ofdmonly_setf(0);
mdm_rxdsssen_setf(1);
mdm_mdmconf_setf(0);
mdm_reset();
// 3us for TX RAMPUP <=> TXRFRAMPUP = 360
mdm_txstartdelay_setf(180);
mdm_txctrl1_pack(0, 0, 28, 19);
mdm_txctrl3_pack(720, 1080);
mdm_tbe_count_adjust_20_setf(0); // TBE for 60MHz
mdm_dcestimctrl_pack(0, 0, 0, 15, 15);
mdm_waithtstf_setf(7); // For FPGA, divide value by 2 due to timing constraints
mdm_tddchtstfmargin_setf(6);
mdm_smoothctrl_set(0x01880C06); // smooth enable/auto-selection
mdm_tbectrl2_set(0x00007F03);
// No ACI margin in BW=20MHz due to latency on HTSIG decoding
riu_rwnxagcaci20marg0_set(0);
riu_rwnxagcaci20marg1_set(0);
riu_rwnxagcaci20marg2_set(0);
// Configure maximum BW
mdm_txcbwmax_setf(chantype);
// #ifndef BL602_PHY_TEST
// blmac_max_supported_bw_setf(chantype);
// #endif
// Reset RX IQ compensation if available
if (riu_iqcomp_getf())
{
riu_iqestiterclr_setf(1);
}
// Set RF LO frequency
rf_set_channel(chantype, freq1);
// Update TRPC
trpc_update_vs_channel(freq1);
}
static void tx_power_config()
{
}
static void phy_hw_init(const struct phy_bl602_cfg_tag *cfg)
{
/* Modem Init */
mdm_mdmconf_set(phy_mdm_conf(BW_20MHZ));
mdm_reset();
// Set Rx Mode
mdm_rxmode_set(MDM_RXSTBCEN_BIT | MDM_RXGFEN_BIT |
MDM_RXMMEN_BIT | MDM_RXDSSSEN_BIT);
mdm_rxnssmax_setf(mdm_nss_getf() - 1);
mdm_rxndpnstsmax_setf(mdm_nsts_getf() - 1);
mdm_rxldpcen_setf(mdm_ldpcdec_getf());
mdm_rxvhten_setf(phy_vht_supported());
mdm_rxmumimoen_setf(mdm_mumimorx_getf());
mdm_rxmumimoapeplenen_setf(mdm_mumimorx_getf());
// Set DSSS precomp
mdm_precomp_setf(45);
// Rx frame violation check
// [31:15]: VHT
// [14: 4]: HT
// [ 3: 0]: NON-HT
mdm_rxframeviolationmask_setf(0xFFFFFFFF);
// Set Tx Mode
mdm_txmode_set(MDM_TXSTBCEN_BIT | MDM_TXGFEN_BIT |
MDM_TXMMEN_BIT | MDM_TXDSSSEN_BIT);
mdm_txnssmax_setf(mdm_nss_getf() - 1);
mdm_ntxmax_setf(mdm_ntx_getf() - 1);
mdm_txcbwmax_setf(mdm_chbw_getf());
mdm_txldpcen_setf(mdm_ldpcenc_getf());
mdm_txvhten_setf(phy_vht_supported());
mdm_txmumimoen_setf(mdm_mumimotx_getf());
// AGC reset mode
// Don't turn off RF if rxreq de-asserted for few cycles after a RXERR
mdm_rxtdctrl1_set(mdm_rxtdctrl1_get()|1);
// Enable automatic smoothing filter selection from SNR, then disable force
mdm_cfgsmoothforce_setf(0);
mdm_smoothsnrthrhigh_setf(27);
mdm_smoothsnrthrmid_setf(15);
// limit NDBPSMAX to 1x1 80 MCS7 LGI(292.5Mb/s) / SGI (325.0Mb/s)
mdm_rxctrl1_set(0x04920492);
// Enable RC clock
mdm_rcclkforce_setf(1);
/* RIU Init */
riu_txshift4044_setf(2);
if (riu_iqcomp_getf())
{
riu_rxiqphaseesten_setf(0);
riu_rxiqgainesten_setf(0);
riu_rxiqphasecompen_setf(0);
riu_rxiqgaincompen_setf(0);
riu_iqestiterclr_setf(0);
}
// limit RIU to 1 or 2 antenna active depending on modem capabilities
riu_activeant_setf(1);
// limit AGC with a single antenna (path0)
riu_combpathsel_setf(1);
// CCA timeout
riu_rwnxagcccatimeout_set(4000000); // 50ms
riu_irqmacccatimeouten_setf(1);
/* configure tx power */
tx_power_config();
/* configure AGC */
agc_config();
/* download AGC memory*/
agc_download();
// /* Enable Incremental fcal and LO unlock interrupt
// * incremental calibration must be started after RC clock is ready
// */
// rf_pri_start_inc_cal();
}
/*
* IMPLEMENTATIONS (Driver API)
****************************************************************************************
*/
void phy_init(const struct phy_cfg_tag *config)
{
const struct phy_bl602_cfg_tag *cfg = (const struct phy_bl602_cfg_tag *)&config->parameters;
phy_hw_init(cfg);
phy_env->cfg = *cfg;
phy_env->band = PHY_BAND_2G4;
phy_env->chnl_type = PHY_CHNL_BW_OTHER;
phy_env->chnl_prim20_freq = PHY_UNUSED;
phy_env->chnl_center1_freq = PHY_UNUSED;
phy_env->chnl_center2_freq = PHY_UNUSED;
// init transmitter rate power control
trpc_init();
// init phy adaptive features
pa_init();
}
void phy_reset()
{
// TODO
}
void phy_get_channel(struct phy_channel_info *info, uint8_t index)
{
if (index > 0)
{
dbg(D_ERR D_PHY "%s: radio %d does not exist\n", __func__, index);
}
// Map the band, channel type, primary channel index and center 1 index on info1
info->info1 = phy_env->band | (phy_env->chnl_type << 8) | (phy_env->chnl_prim20_freq << 16);
// Map center 2 index on info2
info->info2 = phy_env->chnl_center1_freq | (phy_env->chnl_center2_freq << 16);
}
void phy_set_channel(uint8_t band, uint8_t type, uint16_t prim20_freq,
uint16_t center1_freq, uint16_t center2_freq, uint8_t index)
{
// if (phy_env->band == band && phy_env->chnl_type == type &&
// phy_env->chnl_prim20_freq == prim20_freq &&
// phy_env->chnl_center1_freq == center1_freq)
// {
// printf("%s: Setting same channel, do nothing\r\n", __func__);
// return;
// }
if ((center1_freq < PHY_BAND_2G4_MIN_FREQ || center1_freq > PHY_BAND_2G4_MAX_FREQ) &&
(band == PHY_BAND_2G4)){
printf("invalid freq:index[%u] c:%d c1:%d bw:%d\r\n", index,
prim20_freq, center1_freq, (1 << type) * 20);
return;
}
//TODO: fixed band type to 20MHz. leo
printf("<<<< %s: c:%d c1:%d bw:%d band:%d\r\n", __func__,
prim20_freq, center1_freq, (1 << type) * 20, band);
if (band != PHY_BAND_2G4 && band != PHY_BAND_5G){
printf("invalid band:%d\r\n", band);
return;
}
phy_hw_set_channel(band, prim20_freq, center1_freq, type);
phy_env->band = band;
phy_env->chnl_type = type;
phy_env->chnl_prim20_freq = prim20_freq;
phy_env->chnl_center1_freq = center1_freq;
}
void phy_get_version(uint32_t *version_1, uint32_t *version_2)
{
*version_1 = mdm_hdmconfig_get();
*version_2 = 0; // TODO Add version reading for other PHY elements than modem.
}
bool phy_vht_supported(void)
{
#if NX_MDM_VER > 20
return ((mdm_vht_getf() != 0) || (mdm_chbw_getf() > PHY_CHNL_BW_40));
#else
return true;
#endif
}
uint8_t phy_get_nss(void)
{
return (mdm_nss_getf() - 1);
}
uint8_t phy_get_ntx(void)
{
return (mdm_ntx_getf() - 1);
}
void phy_stop(void)
{
// TODO
// if (blmac_current_state_getf() != HW_IDLE)
// dbg(D_ERR "%s MAC state != IDLE\n", __func__);
}
bool phy_bfmee_supported(void)
{
return (mdm_bfmee_getf() != 0);
}
bool phy_bfmer_supported(void)
{
return (mdm_bfmer_getf() != 0);
}
bool phy_mu_mimo_rx_supported(void)
{
return (mdm_mumimorx_getf() != 0);
}
bool phy_mu_mimo_tx_supported(void)
{
return (mdm_mumimotx_getf() != 0);
}
bool phy_ldpc_tx_supported(void)
{
return (mdm_ldpcenc_getf() != 0);
}
bool phy_ldpc_rx_supported(void)
{
return (mdm_ldpcdec_getf() != 0);
}
uint8_t phy_get_mac_freq(void)
{
return PHY_BL602_MACCORE_FREQ_MHZ;
}
void phy_get_rf_gain_idx(int8_t *power, uint8_t *idx)
{
int32_t power_dbm = *power;
*idx = rfc_get_power_level(RFC_FORMATMOD_11N, power_dbm * 10);
}
void phy_get_trpc_idx(uint8_t formatmod, uint8_t mcs, int8_t power, uint8_t *idx)
{
ASSERT_ERR(formatmod <= PHY_FORMATMOD_11N);
ASSERT_ERR((formatmod == PHY_FORMATMOD_11B) && (mcs <= 3));
ASSERT_ERR((formatmod == PHY_FORMATMOD_11G) && (mcs <= 7));
ASSERT_ERR((formatmod == PHY_FORMATMOD_11N) && (mcs <= 7));
*idx = trpc_get_power_idx(formatmod, mcs, power);
}
void phy_get_rf_gain_capab(int8_t *max, int8_t *min)
{
*max = trpc_get_rf_max_power(); // dBm
*min = trpc_get_rf_min_power(); // dBm
}
void bz_phy_reset()
{
int tx_rampup_time_us = 8;
int tx_rampdn_time_us = 4; // 4
int tx_padzero_time_us = 0;
// configure phy registers
bz_phy_tx_rampup_fm_on_setf(1);
bz_phy_tx_rampup_time_us_setf(tx_rampup_time_us);
bz_phy_tx_rampdn_fm_on_setf(1);
bz_phy_tx_rampdn_time_us_setf(tx_rampdn_time_us);
bz_phy_tx_rampdn_pad0_time_us_setf(tx_padzero_time_us);
bz_phy_rx_proc_time_mlsd_us_setf(32); // 30
bz_phy_rx_proc_time_direct_us_setf(30); // rtl bug
bz_phy_rx_proc_time_eq_us_setf(10);
bz_phy_rx_proc_time_viterbi_us_setf(30);
bz_phy_rx_dfe_notch_en_setf(0);
bz_phy_rx_dfe_toc_en_setf(1);
// configure agc regsiters
bz_agc_rbb_ind_min_setf(4);
}
/**
* Empty functions to compatible with karst rf
*
*/
void mpif_clk_init(void)
{
}
#if RW_MUMIMO_RX_EN
void phy_set_group_id_info(uint32_t membership_addr, uint32_t userpos_addr)
{
int i;
// Set membership status
for(i=0; i<MDM_MUMIMO_GROUPID_TAB_COUNT; i++)
{
mdm_mumimo_groupid_tab_set(i, co_read32p(membership_addr + 4 * i));
}
// Set user position
for(i=0; i<MDM_MUMIMO_USERPOSITION_TAB_COUNT; i++)
{
mdm_mumimo_userposition_tab_set(i, co_read32p(userpos_addr + 4 * i));
}
}
#endif
#if NX_DEBUG_DUMP
void phy_get_diag_state(struct dbg_debug_info_tag *dbg_info)
{
}
#endif
/*
* IMPLEMENTATIONS (ISR)
****************************************************************************************
*/
void phy_mdm_isr(void)
{
dbg(D_ERR D_PHY "%s: TODO\n", __func__);
}
void phy_rc_isr(void)
{
dbg("%s: cca timeout\n", __func__);
uint32_t irq_status = riu_rwnxmacintstatmasked_get();
riu_rwnxmacintack_clear(irq_status);
// TODO: CCA timeout recovery
if (irq_status & RIU_IRQMACCCATIMEOUTMASKED_BIT) {
mdm_reset();
//ASSERT_REC(!(irq_status & RIU_IRQMACCCATIMEOUTMASKED_BIT));
}
}
|
mkroman/bl602-604
|
components/bl602/bl602_std/bl602_std/StdDriver/Src/bl602_i2c.c
|
/**
******************************************************************************
* @file bl602_i2c.c
* @version V1.0
* @date
* @brief This file is the standard driver c file
******************************************************************************
* @attention
*
* <h2><center>© COPYRIGHT(c) 2020 Bouffalo Lab</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
#include "bl602_i2c.h"
/** @addtogroup BL602_Peripheral_Driver
* @{
*/
/** @addtogroup I2C
* @{
*/
/** @defgroup I2C_Private_Macros
* @{
*/
#define I2C_FIFO_STATUS_TIMEOUT (160*1000*2)
#define PUT_UINT32_LE(n,b,i) \
{ \
(b)[(i) ] = (uint8_t) ( (n) ); \
(b)[(i) + 1] = (uint8_t) ( (n) >> 8 ); \
(b)[(i) + 2] = (uint8_t) ( (n) >> 16 ); \
(b)[(i) + 3] = (uint8_t) ( (n) >> 24 ); \
}
/*@} end of group I2C_Private_Macros */
/** @defgroup I2C_Private_Types
* @{
*/
/*@} end of group I2C_Private_Types */
/** @defgroup I2C_Private_Variables
* @{
*/
intCallback_Type * i2cIntCbfArra[I2C_ID_MAX][I2C_INT_ALL]= {{NULL}};
/*@} end of group I2C_Private_Variables */
/** @defgroup I2C_Global_Variables
* @{
*/
/*@} end of group I2C_Global_Variables */
/** @defgroup I2C_Private_Fun_Declaration
* @{
*/
/*@} end of group I2C_Private_Fun_Declaration */
/** @defgroup I2C_Private_Functions
* @{
*/
/****************************************************************************//**
* @brief I2C interrupt handler
*
* @param i2cNo: I2C ID type
*
* @return None
*
*******************************************************************************/
#ifndef BL602_USE_HAL_DRIVER
static void I2C_IntHandler(I2C_ID_Type i2cNo)
{
uint32_t tmpVal;
uint32_t I2Cx = I2C_BASE;
/* Check the parameters */
CHECK_PARAM(IS_I2C_ID_TYPE(i2cNo));
tmpVal = BL_RD_REG(I2Cx, I2C_INT_STS);
if(BL_IS_REG_BIT_SET(tmpVal,I2C_END_INT)){
if(i2cIntCbfArra[i2cNo][I2C_TRANS_END_INT] != NULL){
/* Call the callback function */
i2cIntCbfArra[i2cNo][I2C_TRANS_END_INT]();
}
}
if(BL_IS_REG_BIT_SET(tmpVal,I2C_TXF_INT)){
if(i2cIntCbfArra[i2cNo][I2C_TX_FIFO_READY_INT] != NULL){
/* Call the callback function */
i2cIntCbfArra[i2cNo][I2C_TX_FIFO_READY_INT]();
}
}
if(BL_IS_REG_BIT_SET(tmpVal,I2C_RXF_INT)){
if(i2cIntCbfArra[i2cNo][I2C_RX_FIFO_READY_INT] != NULL){
/* Call the callback function */
i2cIntCbfArra[i2cNo][I2C_RX_FIFO_READY_INT]();
}
}
if(BL_IS_REG_BIT_SET(tmpVal,I2C_NAK_INT)){
if(i2cIntCbfArra[i2cNo][I2C_NACK_RECV_INT] != NULL){
/* Call the callback function */
i2cIntCbfArra[i2cNo][I2C_NACK_RECV_INT]();
}
}
if(BL_IS_REG_BIT_SET(tmpVal,I2C_ARB_INT)){
if(i2cIntCbfArra[i2cNo][I2C_ARB_LOST_INT] != NULL){
/* Call the callback function */
i2cIntCbfArra[i2cNo][I2C_ARB_LOST_INT]();
}
}
if(BL_IS_REG_BIT_SET(tmpVal,I2C_FER_INT)){
if(i2cIntCbfArra[i2cNo][I2C_FIFO_ERR_INT] != NULL){
/* Call the callback function */
i2cIntCbfArra[i2cNo][I2C_FIFO_ERR_INT]();
}
}
}
#endif
/*@} end of group I2C_Private_Functions */
/** @defgroup I2C_Public_Functions
* @{
*/
/****************************************************************************//**
* @brief I2C write word data
*
* @param i2cNo: I2C ID type
* @param data: Data word
*
* @return None
*
*******************************************************************************/
void I2C_SendWord(I2C_ID_Type i2cNo, uint32_t data)
{
uint32_t I2Cx = I2C_BASE;
/* Check the parameters */
CHECK_PARAM(IS_I2C_ID_TYPE(i2cNo));
BL_WR_REG(I2Cx, I2C_FIFO_WDATA, data);
}
/****************************************************************************//**
* @brief I2C read word data
*
* @param i2cNo: I2C ID type
*
* @return word data
*
*******************************************************************************/
uint32_t I2C_RecieveWord(I2C_ID_Type i2cNo)
{
uint32_t I2Cx = I2C_BASE;
/* Check the parameters */
CHECK_PARAM(IS_I2C_ID_TYPE(i2cNo));
return BL_RD_REG(I2Cx, I2C_FIFO_RDATA);
}
/****************************************************************************//**
* @brief I2C enable
*
* @param i2cNo: I2C ID type
*
* @return None
*
*******************************************************************************/
void I2C_Enable(I2C_ID_Type i2cNo)
{
uint32_t tmpVal;
uint32_t I2Cx = I2C_BASE;
/* Check the parameters */
CHECK_PARAM(IS_I2C_ID_TYPE(i2cNo));
tmpVal = BL_RD_REG(I2Cx, I2C_FIFO_CONFIG_0);
tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_TX_FIFO_CLR);
tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_RX_FIFO_CLR);
BL_WR_REG(I2Cx, I2C_FIFO_CONFIG_0, tmpVal);
tmpVal = BL_RD_REG(I2Cx, I2C_CONFIG);
tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_M_EN);
BL_WR_REG(I2Cx, I2C_CONFIG, tmpVal);
}
/****************************************************************************//**
* @brief I2C disable
*
* @param i2cNo: I2C ID type
*
* @return None
*
*******************************************************************************/
void I2C_Disable(I2C_ID_Type i2cNo)
{
uint32_t tmpVal;
uint32_t I2Cx = I2C_BASE;
/* Check the parameters */
CHECK_PARAM(IS_I2C_ID_TYPE(i2cNo));
tmpVal = BL_RD_REG(I2Cx, I2C_CONFIG);
tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_M_EN);
BL_WR_REG(I2Cx, I2C_CONFIG, tmpVal);
tmpVal = BL_RD_REG(I2Cx, I2C_FIFO_CONFIG_0);
tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_TX_FIFO_CLR);
tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_RX_FIFO_CLR);
BL_WR_REG(I2Cx, I2C_FIFO_CONFIG_0, tmpVal);
}
/****************************************************************************//**
* @brief I2C init function
*
* @param i2cNo: I2C ID type
* @param direct: I2C read or write direct
* @param cfg: I2C transfer config struct
*
* @return None
*
*******************************************************************************/
void I2C_Init(I2C_ID_Type i2cNo, I2C_Direction_Type direct, I2C_Transfer_Cfg *cfg)
{
uint32_t tmpVal;
uint32_t I2Cx = I2C_BASE;
/* Check the parameters */
CHECK_PARAM(IS_I2C_ID_TYPE(i2cNo));
/* I2C write config */
tmpVal = BL_RD_REG(I2Cx, I2C_CONFIG);
if(direct == I2C_WRITE){
tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_PKT_DIR);
}else{
tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_PKT_DIR);
}
tmpVal = BL_SET_REG_BITS_VAL(tmpVal, I2C_CR_I2C_SLV_ADDR, cfg->slaveAddr);
if(cfg->subAddrSize > 0){
tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_SUB_ADDR_EN);
tmpVal = BL_SET_REG_BITS_VAL(tmpVal, I2C_CR_I2C_SUB_ADDR_BC, cfg->subAddrSize-1);
}else{
tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_SUB_ADDR_EN);
}
tmpVal = BL_SET_REG_BITS_VAL(tmpVal, I2C_CR_I2C_PKT_LEN, cfg->dataSize-1);
BL_WR_REG(I2Cx, I2C_CONFIG, tmpVal);
/* Set sub address */
BL_WR_REG(I2Cx, I2C_SUB_ADDR, cfg->subAddr);
}
/****************************************************************************//**
* @brief Set i2c prd
*
* @param i2cNo: I2C ID type
* @param phase: I2C phase value
*
* @return None
*
*******************************************************************************/
void I2C_SetPrd(I2C_ID_Type i2cNo, uint8_t phase)
{
uint32_t tmpVal;
uint32_t I2Cx = I2C_BASE;
/* Check the parameters */
CHECK_PARAM(IS_I2C_ID_TYPE(i2cNo));
//phase_cycles = (32000000 / phase / 4) - 1;
tmpVal = BL_RD_REG(I2Cx, I2C_PRD_START);
tmpVal = BL_SET_REG_BITS_VAL(tmpVal, I2C_CR_I2C_PRD_S_PH_0, phase);
tmpVal = BL_SET_REG_BITS_VAL(tmpVal, I2C_CR_I2C_PRD_S_PH_1, phase);
tmpVal = BL_SET_REG_BITS_VAL(tmpVal, I2C_CR_I2C_PRD_S_PH_2, phase);
tmpVal = BL_SET_REG_BITS_VAL(tmpVal, I2C_CR_I2C_PRD_S_PH_3, phase);
BL_WR_REG(I2Cx, I2C_PRD_START, tmpVal);
tmpVal = BL_RD_REG(I2Cx, I2C_PRD_STOP);
tmpVal = BL_SET_REG_BITS_VAL(tmpVal, I2C_CR_I2C_PRD_P_PH_0, phase);
tmpVal = BL_SET_REG_BITS_VAL(tmpVal, I2C_CR_I2C_PRD_P_PH_1, phase);
tmpVal = BL_SET_REG_BITS_VAL(tmpVal, I2C_CR_I2C_PRD_P_PH_2, phase);
tmpVal = BL_SET_REG_BITS_VAL(tmpVal, I2C_CR_I2C_PRD_P_PH_3, phase);
BL_WR_REG(I2Cx, I2C_PRD_STOP, tmpVal);
tmpVal = BL_RD_REG(I2Cx, I2C_PRD_DATA);
tmpVal = BL_SET_REG_BITS_VAL(tmpVal, I2C_CR_I2C_PRD_D_PH_0, phase);
tmpVal = BL_SET_REG_BITS_VAL(tmpVal, I2C_CR_I2C_PRD_D_PH_1, phase);
tmpVal = BL_SET_REG_BITS_VAL(tmpVal, I2C_CR_I2C_PRD_D_PH_2, phase);
tmpVal = BL_SET_REG_BITS_VAL(tmpVal, I2C_CR_I2C_PRD_D_PH_3, phase);
BL_WR_REG(I2Cx, I2C_PRD_DATA, tmpVal);
}
/****************************************************************************//**
* @brief Get i2c busy state
*
* @param i2cNo: I2C ID type
*
* @return RESET or SET
*
*******************************************************************************/
BL_Sts_Type I2C_IsBusy(I2C_ID_Type i2cNo)
{
uint32_t tmpVal;
uint32_t I2Cx = I2C_BASE;
/* Check the parameters */
CHECK_PARAM(IS_I2C_ID_TYPE(i2cNo));
tmpVal = BL_RD_REG(I2Cx, I2C_BUS_BUSY);
return ((BL_IS_REG_BIT_SET(tmpVal, I2C_STS_I2C_BUS_BUSY)) ? SET: RESET);
}
/****************************************************************************//**
* @brief I2C master write block data
*
* @param i2cNo: I2C ID type
* @param cfg: I2C transfer config struct
*
* @return SUCCESS or ERROR
*
*******************************************************************************/
BL_Err_Type I2C_MasterSendBlocking(I2C_ID_Type i2cNo, I2C_Transfer_Cfg *cfg)
{
uint8_t i;
uint32_t timeOut = 0;
uint32_t temp = 0;
uint32_t I2Cx = I2C_BASE;
/* Check the parameters */
CHECK_PARAM(IS_I2C_ID_TYPE(i2cNo));
I2C_Disable(i2cNo);
I2C_Init(i2cNo, I2C_WRITE, cfg);
I2C_Enable(i2cNo);
/* Set I2C write data */
for(i=0; i<cfg->dataSize; i++){
temp += (cfg->data[i] << ((i % 4) * 8));
if((i + 1) % 4 == 0){
timeOut = I2C_FIFO_STATUS_TIMEOUT;
while(BL_GET_REG_BITS_VAL(BL_RD_REG(I2Cx, I2C_FIFO_CONFIG_1), I2C_TX_FIFO_CNT) == 0){
timeOut--;
if(timeOut == 0){
I2C_Disable(i2cNo);
return TIMEOUT;
}
}
BL_WR_REG(I2Cx, I2C_FIFO_WDATA, temp);
temp = 0;
}
}
if((cfg->dataSize%4) != 0){
timeOut = I2C_FIFO_STATUS_TIMEOUT;
while(BL_GET_REG_BITS_VAL(BL_RD_REG(I2Cx, I2C_FIFO_CONFIG_1), I2C_TX_FIFO_CNT) == 0){
timeOut--;
if(timeOut == 0){
I2C_Disable(i2cNo);
return TIMEOUT;
}
}
BL_WR_REG(I2Cx, I2C_FIFO_WDATA, temp);
}
timeOut = I2C_FIFO_STATUS_TIMEOUT;
while(I2C_IsBusy(i2cNo)){
timeOut--;
if(timeOut == 0){
I2C_Disable(i2cNo);
return TIMEOUT;
}
}
I2C_Disable(i2cNo);
return SUCCESS;
}
/****************************************************************************//**
* @brief I2C master read block data
*
* @param i2cNo: I2C ID type
* @param cfg: I2C transfer config struct
*
* @return SUCCESS or ERROR
*
*******************************************************************************/
BL_Err_Type I2C_MasterReceiveBlocking(I2C_ID_Type i2cNo, I2C_Transfer_Cfg *cfg)
{
uint8_t i = 0;
uint32_t timeOut = 0;
uint32_t temp = 0;
uint32_t I2Cx = I2C_BASE;
/* Check the parameters */
CHECK_PARAM(IS_I2C_ID_TYPE(i2cNo));
I2C_Disable(i2cNo);
I2C_Init(i2cNo, I2C_READ, cfg);
I2C_Enable(i2cNo);
/* Read I2C data */
while(cfg->dataSize - i >= 4){
timeOut = I2C_FIFO_STATUS_TIMEOUT;
while(BL_GET_REG_BITS_VAL(BL_RD_REG(I2Cx, I2C_FIFO_CONFIG_1), I2C_RX_FIFO_CNT) == 0){
timeOut--;
if(timeOut == 0){
I2C_Disable(i2cNo);
return TIMEOUT;
}
}
temp = BL_RD_REG(I2Cx, I2C_FIFO_RDATA);
PUT_UINT32_LE(temp, cfg->data, i);
i += 4;
}
if(i < cfg->dataSize){
timeOut = I2C_FIFO_STATUS_TIMEOUT;
while(BL_GET_REG_BITS_VAL(BL_RD_REG(I2Cx, I2C_FIFO_CONFIG_1), I2C_RX_FIFO_CNT) == 0){
timeOut--;
if(timeOut == 0){
I2C_Disable(i2cNo);
return TIMEOUT;
}
}
temp = BL_RD_REG(I2Cx, I2C_FIFO_RDATA);
while(i < cfg->dataSize){
cfg->data[i] = (temp & 0xff);
temp = (temp >> 8);
i ++;
}
}
timeOut = I2C_FIFO_STATUS_TIMEOUT;
while(I2C_IsBusy(i2cNo)){
timeOut--;
if(timeOut == 0){
I2C_Disable(i2cNo);
return TIMEOUT;
}
}
I2C_Disable(i2cNo);
return SUCCESS;
}
/****************************************************************************//**
* @brief Mask/Unmask the I2C interrupt
*
* @param i2cNo: I2C ID type
* @param intType: Specifies the interrupt type
* @param intMask: Enable/Disable Specified interrupt type
*
* @return None
*
*******************************************************************************/
void I2C_IntMask(I2C_ID_Type i2cNo, I2C_INT_Type intType, BL_Mask_Type intMask)
{
uint32_t tmpVal;
uint32_t I2Cx = I2C_BASE;
/* Check the parameters */
CHECK_PARAM(IS_I2C_ID_TYPE(i2cNo));
CHECK_PARAM(IS_I2C_INT_TYPE(intType));
CHECK_PARAM(IS_BL_MASK_TYPE(intMask));
tmpVal = BL_RD_REG(I2Cx, I2C_INT_STS);
switch(intType)
{
case I2C_TRANS_END_INT:
if(intMask == UNMASK)
{
/* UNMASK(Enable) this interrupt */
tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_END_EN);
tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_END_MASK);
}
else
{
/* MASK(Disable) this interrupt */
tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_END_EN);
tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_END_MASK);
}
break;
case I2C_TX_FIFO_READY_INT:
if(intMask == UNMASK)
{
/* UNMASK(Enable) this interrupt */
tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_TXF_EN);
tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_TXF_MASK);
}
else
{
/* MASK(Disable) this interrupt */
tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_TXF_EN);
tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_TXF_MASK);
}
break;
case I2C_RX_FIFO_READY_INT:
if(intMask == UNMASK)
{
/* UNMASK(Enable) this interrupt */
tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_RXF_EN);
tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_RXF_MASK);
}
else
{
/* MASK(Disable) this interrupt */
tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_RXF_EN);
tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_RXF_MASK);
}
break;
case I2C_NACK_RECV_INT:
if(intMask == UNMASK)
{
/* UNMASK(Enable) this interrupt */
tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_NAK_EN);
tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_NAK_MASK);
}
else
{
/* MASK(Disable) this interrupt */
tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_NAK_EN);
tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_NAK_MASK);
}
break;
case I2C_ARB_LOST_INT:
if(intMask == UNMASK)
{
/* UNMASK(Enable) this interrupt */
tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_ARB_EN);
tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_ARB_MASK);
}
else
{
/* MASK(Disable) this interrupt */
tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_ARB_EN);
tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_ARB_MASK);
}
break;
case I2C_FIFO_ERR_INT:
if(intMask == UNMASK)
{
/* UNMASK(Enable) this interrupt */
tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_FER_EN);
tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_FER_MASK);
}
else
{
/* MASK(Disable) this interrupt */
tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_FER_EN);
tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_FER_MASK);
}
break;
case I2C_INT_ALL:
if(intMask == UNMASK)
{
/* UNMASK(Enable) this interrupt */
tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_END_EN);
tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_TXF_EN);
tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_RXF_EN);
tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_NAK_EN);
tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_ARB_EN);
tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_FER_EN);
tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_END_MASK);
tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_TXF_MASK);
tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_RXF_MASK);
tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_NAK_MASK);
tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_ARB_MASK);
tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_FER_MASK);
}
else
{
/* MASK(Disable) this interrupt */
tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_END_EN);
tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_TXF_EN);
tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_RXF_EN);
tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_NAK_EN);
tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_ARB_EN);
tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_FER_EN);
tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_END_MASK);
tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_TXF_MASK);
tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_RXF_MASK);
tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_NAK_MASK);
tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_ARB_MASK);
tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_FER_MASK);
}
break;
default:
break;
}
BL_WR_REG(I2Cx, I2C_INT_STS, tmpVal);
}
/****************************************************************************//**
* @brief Install I2C interrupt callback function
*
* @param i2cNo: I2C ID type
* @param intType: Specifies the interrupt type
* @param cbFun: Pointer to interrupt callback function. The type should be void (*fn)(void)
*
* @return None
*
*******************************************************************************/
#ifndef BL602_USE_HAL_DRIVER
void I2C_Int_Callback_Install(I2C_ID_Type i2cNo, I2C_INT_Type intType, intCallback_Type* cbFun)
{
/* Check the parameters */
CHECK_PARAM(IS_I2C_ID_TYPE(i2cNo));
CHECK_PARAM(IS_I2C_INT_TYPE(intType));
i2cIntCbfArra[i2cNo][intType] = cbFun;
}
#endif
/****************************************************************************//**
* @brief I2C IRQ handler
*
* @param None
*
* @return None
*
*******************************************************************************/
#ifndef BL602_USE_HAL_DRIVER
void __IRQ I2C_IRQHandler(void)
{
I2C_IntHandler(I2C0_ID);
}
#endif
/*@} end of group I2C_Public_Functions */
/*@} end of group I2C */
/*@} end of group BL602_Peripheral_Driver */
|
mkroman/bl602-604
|
components/network/ble/blestack/src/common/tinycrypt/include/tinycrypt/ccm_mode.h
|
<reponame>mkroman/bl602-604
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/* ccm_mode.h - TinyCrypt interface to a CCM mode implementation */
/*
* Copyright (C) 2017 by Intel Corporation, All Rights Reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* - Neither the name of Intel Corporation nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/**
* @file
* @brief Interface to a CCM mode implementation.
*
* Overview: CCM (for "Counter with CBC-MAC") mode is a NIST approved mode of
* operation defined in SP 800-38C.
*
* TinyCrypt CCM implementation accepts:
*
* 1) Both non-empty payload and associated data (it encrypts and
* authenticates the payload and also authenticates the associated
* data);
* 2) Non-empty payload and empty associated data (it encrypts and
* authenticates the payload);
* 3) Non-empty associated data and empty payload (it degenerates to
* an authentication mode on the associated data).
*
* TinyCrypt CCM implementation accepts associated data of any length
* between 0 and (2^16 - 2^8) bytes.
*
* Security: The mac length parameter is an important parameter to estimate the
* security against collision attacks (that aim at finding different
* messages that produce the same authentication tag). TinyCrypt CCM
* implementation accepts any even integer between 4 and 16, as
* suggested in SP 800-38C.
*
* RFC-3610, which also specifies CCM, presents a few relevant
* security suggestions, such as: it is recommended for most
* applications to use a mac length greater than 8. Besides, the
* usage of the same nonce for two different messages which are
* encrypted with the same key destroys the security of CCM mode.
*
* Requires: AES-128
*
* Usage: 1) call tc_ccm_config to configure.
*
* 2) call tc_ccm_mode_encrypt to encrypt data and generate tag.
*
* 3) call tc_ccm_mode_decrypt to decrypt data and verify tag.
*/
#ifndef __TC_CCM_MODE_H__
#define __TC_CCM_MODE_H__
#include "aes.h"
#include <stddef.h>
#ifdef __cplusplus
extern "C" {
#endif
/* max additional authenticated size in bytes: 2^16 - 2^8 = 65280 */
#define TC_CCM_AAD_MAX_BYTES 0xff00
/* max message size in bytes: 2^(8L) = 2^16 = 65536 */
#define TC_CCM_PAYLOAD_MAX_BYTES 0x10000
/* struct tc_ccm_mode_struct represents the state of a CCM computation */
typedef struct tc_ccm_mode_struct {
TCAesKeySched_t sched; /* AES key schedule */
uint8_t *nonce; /* nonce required by CCM */
unsigned int mlen; /* mac length in bytes (parameter t in SP-800 38C) */
} *TCCcmMode_t;
/**
* @brief CCM configuration procedure
* @return returns TC_CRYPTO_SUCCESS (1)
* returns TC_CRYPTO_FAIL (0) if:
* c == NULL or
* sched == NULL or
* nonce == NULL or
* mlen != {4, 6, 8, 10, 12, 16}
* @param c -- CCM state
* @param sched IN -- AES key schedule
* @param nonce IN - nonce
* @param nlen -- nonce length in bytes
* @param mlen -- mac length in bytes (parameter t in SP-800 38C)
*/
int tc_ccm_config(TCCcmMode_t c, TCAesKeySched_t sched, uint8_t *nonce,
unsigned int nlen, unsigned int mlen);
/**
* @brief CCM tag generation and encryption procedure
* @return returns TC_CRYPTO_SUCCESS (1)
* returns TC_CRYPTO_FAIL (0) if:
* out == NULL or
* c == NULL or
* ((plen > 0) and (payload == NULL)) or
* ((alen > 0) and (associated_data == NULL)) or
* (alen >= TC_CCM_AAD_MAX_BYTES) or
* (plen >= TC_CCM_PAYLOAD_MAX_BYTES) or
* (olen < plen + maclength)
*
* @param out OUT -- encrypted data
* @param olen IN -- output length in bytes
* @param associated_data IN -- associated data
* @param alen IN -- associated data length in bytes
* @param payload IN -- payload
* @param plen IN -- payload length in bytes
* @param c IN -- CCM state
*
* @note: out buffer should be at least (plen + c->mlen) bytes long.
*
* @note: The sequence b for encryption is formatted as follows:
* b = [FLAGS | nonce | counter ], where:
* FLAGS is 1 byte long
* nonce is 13 bytes long
* counter is 2 bytes long
* The byte FLAGS is composed by the following 8 bits:
* 0-2 bits: used to represent the value of q-1
* 3-7 btis: always 0's
*
* @note: The sequence b for authentication is formatted as follows:
* b = [FLAGS | nonce | length(mac length)], where:
* FLAGS is 1 byte long
* nonce is 13 bytes long
* length(mac length) is 2 bytes long
* The byte FLAGS is composed by the following 8 bits:
* 0-2 bits: used to represent the value of q-1
* 3-5 bits: mac length (encoded as: (mlen-2)/2)
* 6: Adata (0 if alen == 0, and 1 otherwise)
* 7: always 0
*/
int tc_ccm_generation_encryption(uint8_t *out, unsigned int olen,
const uint8_t *associated_data,
unsigned int alen, const uint8_t *payload,
unsigned int plen, TCCcmMode_t c);
/**
* @brief CCM decryption and tag verification procedure
* @return returns TC_CRYPTO_SUCCESS (1)
* returns TC_CRYPTO_FAIL (0) if:
* out == NULL or
* c == NULL or
* ((plen > 0) and (payload == NULL)) or
* ((alen > 0) and (associated_data == NULL)) or
* (alen >= TC_CCM_AAD_MAX_BYTES) or
* (plen >= TC_CCM_PAYLOAD_MAX_BYTES) or
* (olen < plen - c->mlen)
*
* @param out OUT -- decrypted data
* @param associated_data IN -- associated data
* @param alen IN -- associated data length in bytes
* @param payload IN -- payload
* @param plen IN -- payload length in bytes
* @param c IN -- CCM state
*
* @note: out buffer should be at least (plen - c->mlen) bytes long.
*
* @note: The sequence b for encryption is formatted as follows:
* b = [FLAGS | nonce | counter ], where:
* FLAGS is 1 byte long
* nonce is 13 bytes long
* counter is 2 bytes long
* The byte FLAGS is composed by the following 8 bits:
* 0-2 bits: used to represent the value of q-1
* 3-7 btis: always 0's
*
* @note: The sequence b for authentication is formatted as follows:
* b = [FLAGS | nonce | length(mac length)], where:
* FLAGS is 1 byte long
* nonce is 13 bytes long
* length(mac length) is 2 bytes long
* The byte FLAGS is composed by the following 8 bits:
* 0-2 bits: used to represent the value of q-1
* 3-5 bits: mac length (encoded as: (mlen-2)/2)
* 6: Adata (0 if alen == 0, and 1 otherwise)
* 7: always 0
*/
int tc_ccm_decryption_verification(uint8_t *out, unsigned int olen,
const uint8_t *associated_data,
unsigned int alen, const uint8_t *payload, unsigned int plen,
TCCcmMode_t c);
#ifdef __cplusplus
}
#endif
#endif /* __TC_CCM_MODE_H__ */
|
mkroman/bl602-604
|
components/network/ble/blestack/src/services/scps.c
|
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "bluetooth.h"
#include "gatt.h"
#include "uuid.h"
#include "scps.h"
struct scan_intvl_win {
u16_t scan_intvl;
u16_t scan_win;
} __packed;
static struct scan_intvl_win intvl_win = {
.scan_intvl = BT_GAP_SCAN_FAST_INTERVAL,
.scan_win = BT_GAP_SCAN_FAST_WINDOW,
};
static ssize_t scan_intvl_win_write(struct bt_conn *conn,
const struct bt_gatt_attr *attr, const void *buf,
u16_t len, u16_t offset, u8_t flags)
{
const u8_t *data = buf;
intvl_win.scan_intvl = sys_get_le16(data);
data += 2;
intvl_win.scan_win = sys_get_le16(data);
}
static struct bt_gatt_attr attrs[]= {
BT_GATT_PRIMARY_SERVICE(BT_UUID_SCPS),
BT_GATT_CHARACTERISTIC(BT_UUID_SCPS_SCAN_INTVL_WIN,
BT_GATT_CHRC_WRITE_WITHOUT_RESP,
BT_GATT_PERM_NONE, NULL, NULL,
&intvl_win)
};
static struct bt_gatt_service scps = BT_GATT_SERVICE(attrs);
bool scps_init(u16_t scan_intvl, u16_t scan_win)
{
int err;
if (scan_intvl < 0x0004 || scan_intvl > 0x4000) {
return false;
}
if (scan_win < 0x0004 || scan_win > 0x4000) {
return false;
}
if (scan_win > scan_intvl) {
return false;
}
intvl_win.scan_intvl = scan_intvl;
intvl_win.scan_win = scan_win;
err = bt_gatt_service_register(&scps);
return err?false:true;
}
|
mkroman/bl602-604
|
customer_app/bl602_demo_event/bl602_demo_event/ble.c
|
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <FreeRTOS.h>
#include <task.h>
#include "bluetooth.h"
#include "stack_cli_cmds.h"
#if defined(CONFIG_BT_MESH)
#include "mesh_cli_cmds.h"
#if defined(CONFIG_BT_MESH_MODEL_GEN_SRV)
#include "gen_srv.h"
#include "bl_gpio.h"
#endif
#endif
#include "hci_driver.h"
#include "ble_lib_api.h"
#if defined(CONFIG_BT_WIFIPROV_SERVER)
#include "wifi_prov.h"
#endif
#include "log.h"
#include "wifi_prov_api.h"
#if defined(CONFIG_BLE_TP_SERVER)
#include "ble_tp_svc.h"
#endif
#if defined(CONFIG_BT_WIFIPROV_SERVER)
static void wifiprov_connect_ap_ind(void)
{
printf("Recevied indication to connect to AP\r\n");
wifi_prov_api_event_trigger_connect();
}
static void wifiprov_disc_from_ap_ind(void)
{
printf("Recevied indication to disconnect to AP\r\n");
wifi_prov_api_event_trigger_disconnect();
}
static void wifiprov_ssid_ind(void *buf,size_t size)
{
printf("Recevied ssid : %s \r\n", bt_hex(buf, size));
wifi_prov_api_event_trigger_ssid(buf, size);
}
static void wifiprov_bssid_ind(void *buf,size_t size)
{
printf("Recevied bssid: %s \r\n", bt_hex(buf, size));
}
static void wifiprov_password_ind(void *buf,size_t size)
{
printf("Recevied password: %s \r\n", bt_hex(buf, size));
wifi_prov_api_event_trigger_password(buf, size);
}
struct conn_callback WifiProv_conn_callback = {
.local_connect_remote_ap = wifiprov_connect_ap_ind,
.local_disconnect_remote_ap = wifiprov_disc_from_ap_ind,
.get_remote_ap_ssid = wifiprov_ssid_ind,
.get_remote_ap_bssid = wifiprov_bssid_ind,
.get_remote_password = <PASSWORD>,
};
#endif
#if defined(CONFIG_BT_MESH_MODEL_GEN_SRV)
//#define LED_PIN (21)
#define LED_PIN (5)
#define LED_PIN_PULLUP (0)
#define LED_PIN_PULDONW (0)
void model_gen_cb(uint8_t value)
{
bl_gpio_output_set(LED_PIN, value);
}
#endif
void bt_enable_cb(int err)
{
if (!err) {
blestack_cli_register();
#if defined(CONFIG_BT_MESH)
blemesh_cli_register();
#if defined(CONFIG_BT_MESH_MODEL_GEN_SRV)
bl_gpio_enable_output(LED_PIN, LED_PIN_PULLUP, LED_PIN_PULDONW);
mesh_gen_srv_callback_register(model_gen_cb);
#endif
#endif
#if defined(CONFIG_BT_WIFIPROV_SERVER)
WifiProv_init(&WifiProv_conn_callback);
#endif
#if defined(CONFIG_BLE_TP_SERVER)
ble_tp_init();
#endif
}
}
void ble_stack_start(void)
{
// Initialize BLE controller
ble_controller_init(configMAX_PRIORITIES - 1);
// Initialize BLE Host stack
hci_driver_init();
bt_enable(bt_enable_cb);
}
|
mkroman/bl602-604
|
components/network/ble/blestack/src/services/bas.c
|
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @file
* @brief GATT Battery Service
*/
/*
* Copyright (c) 2018 Nordic Semiconductor ASA
* Copyright (c) 2016 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <errno.h>
#include <stdbool.h>
#include <zephyr/types.h>
#include "bluetooth.h"
#include "conn.h"
#include "gatt.h"
#include "uuid.h"
#include "bas.h"
#if !defined(BFLB_BLE)
#define LOG_LEVEL CONFIG_BT_GATT_BAS_LOG_LEVEL
#include <logging/log.h>
LOG_MODULE_REGISTER(bas);
#endif
static struct bt_gatt_ccc_cfg blvl_ccc_cfg[BT_GATT_CCC_MAX] = {};
static u8_t battery_level = 100U;
static void blvl_ccc_cfg_changed(const struct bt_gatt_attr *attr,
u16_t value)
{
ARG_UNUSED(attr);
bool notif_enabled = (value == BT_GATT_CCC_NOTIFY);
#if !defined(BFLB_BLE)
LOG_INF("BAS Notifications %s", notif_enabled ? "enabled" : "disabled");
#endif
}
static ssize_t read_blvl(struct bt_conn *conn,
const struct bt_gatt_attr *attr, void *buf,
u16_t len, u16_t offset)
{
u8_t lvl8 = battery_level;
return bt_gatt_attr_read(conn, attr, buf, len, offset, &lvl8,
sizeof(lvl8));
}
static struct bt_gatt_attr attrs[]= {
BT_GATT_PRIMARY_SERVICE(BT_UUID_BAS),
BT_GATT_CHARACTERISTIC(BT_UUID_BAS_BATTERY_LEVEL,
BT_GATT_CHRC_READ | BT_GATT_CHRC_NOTIFY,
BT_GATT_PERM_READ, read_blvl, NULL,
&battery_level),
BT_GATT_CCC(blvl_ccc_cfg, blvl_ccc_cfg_changed),
BT_GATT_DESCRIPTOR(BT_UUID_HIDS_REPORT_REF, BT_GATT_PERM_READ,
NULL, NULL, NULL),
};
struct bt_gatt_service bas = BT_GATT_SERVICE(attrs);
void bas_init(void)
{
bt_gatt_service_register(&bas);
}
u8_t bt_gatt_bas_get_battery_level(void)
{
return battery_level;
}
int bt_gatt_bas_set_battery_level(u8_t level)
{
int rc;
if (level > 100U) {
return -EINVAL;
}
battery_level = level;
rc = bt_gatt_notify(NULL, &bas.attrs[1], &level, sizeof(level));
return rc == -ENOTCONN ? 0 : rc;
}
#if !defined(BFLB_BLE)
SYS_INIT(bas_init, APPLICATION, CONFIG_APPLICATION_INIT_PRIORITY);
#endif
|
mkroman/bl602-604
|
components/hal_drv/bl602_hal/bl_cks.c
|
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdint.h>
#include <string.h>
#include <stdio.h>
#include <FreeRTOS.h>
#include <task.h>
#include "bl_dma.h"
#include "bl_cks.h"
static void _bl_cks_test_case1()
{
/*case from wiki: https://en.wikipedia.org/wiki/IPv4_header_checksum*/
static const uint8_t data_src1[] =
{
0x45, 0x00, 0x00, 0x73, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, 0x00, 0x00, 0xc0, 0xa8, 0x00, 0x01,
0xc0, 0xa8, 0x00, 0xc7
};
static const uint8_t data_src1_cks[] =
{
0xB8, 0x61
};
int i;
uint16_t cks;
*(volatile uint8_t*)0x4000A700 = 0x1;//REST
for (i = 0; i < sizeof(data_src1); i++) {
*(volatile uint8_t*)0x4000A704 = data_src1[i];
}
cks = *(volatile uint16_t*)0x4000A708;
printf("CKS result with LE is %04x, should be %02x%02x\r\n", cks, data_src1_cks[1], data_src1_cks[0]);
*(volatile uint8_t*)0x4000A700 = 0x1;//REST
*(volatile uint8_t*)0x4000A700 = 0x2;//BIG Endian
for (i = 0; i < sizeof(data_src1); i++) {
*(volatile uint8_t*)0x4000A704 = data_src1[i];
}
cks = *(volatile uint16_t*)0x4000A708;
printf("CKS result with BE is %04x, should be %02x%02x\r\n", cks, data_src1_cks[1], data_src1_cks[0]);
}
static void _bl_cks_test_case2()
{
uint16_t data_segment_one = 0x3F1F;
int i;
uint32_t checksum;
uint16_t cks;
*(volatile uint8_t*)0x4000A700 = 0x1;//REST
checksum = 0;
for (i = 0; i < 1; i++) {
checksum += data_segment_one;
*(volatile uint8_t*)0x4000A704 = (data_segment_one >> 0);
*(volatile uint8_t*)0x4000A704 = (data_segment_one >> 8);
}
while (checksum >> 16) {
checksum = (checksum >> 16) + (checksum & 0xFFFF);
}
cks = *(volatile uint16_t*)0x4000A708;
printf("CKS LE result is %04x, %04x\r\n",
cks,
(uint16_t)~checksum
);
*(volatile uint8_t*)0x4000A700 = 0x1;//REST
*(volatile uint8_t*)0x4000A700 = 0x2;//BIG Endian
checksum = 0;
for (i = 0; i < 1; i++) {
checksum += data_segment_one;
*(volatile uint8_t*)0x4000A704 = (data_segment_one >> 0);
*(volatile uint8_t*)0x4000A704 = (data_segment_one >> 8);
}
while (checksum >> 16) {
checksum = (checksum >> 16) + (checksum & 0xFFFF);
}
cks = *(volatile uint16_t*)0x4000A708;
printf("CKS BE result is %04x, %04x\r\n",
cks,
(uint16_t)~checksum
);
if (cks == ((uint16_t)~checksum)) {
printf("====== Success %04X Checksum=====\r\n", cks);
} else {
printf("====== Failed %04X Checksum======\r\n", cks);
}
}
static void _bl_cks_test_case3()
{
uint16_t data_segment_one = 0x3F1F;
int i;
uint32_t checksum;
uint16_t cks;
*(volatile uint8_t*)0x4000A700 = 0x1;//REST
checksum = 0;
for (i = 0; i < 1000; i++) {
checksum += data_segment_one;
*(volatile uint8_t*)0x4000A704 = (data_segment_one >> 0);
*(volatile uint8_t*)0x4000A704 = (data_segment_one >> 8);
}
while (checksum >> 16) {
checksum = (checksum >> 16) + (checksum & 0xFFFF);
}
cks = *(volatile uint16_t*)0x4000A708;
printf("CKS LE result is %04x, %04x\r\n",
cks,
(uint16_t)~checksum
);
*(volatile uint8_t*)0x4000A700 = 0x1;//REST
*(volatile uint8_t*)0x4000A700 = 0x2;//BIG Endian
checksum = 0;
for (i = 0; i < 1000; i++) {
checksum += data_segment_one;
*(volatile uint8_t*)0x4000A704 = (data_segment_one >> 0);
*(volatile uint8_t*)0x4000A704 = (data_segment_one >> 8);
}
while (checksum >> 16) {
checksum = (checksum >> 16) + (checksum & 0xFFFF);
}
cks = *(volatile uint16_t*)0x4000A708;
printf("CKS BE result is %04x, %04x\r\n",
cks,
(uint16_t)~checksum
);
if (cks == ((uint16_t)~checksum)) {
printf("====== Success %04X Checksum=====\r\n", cks);
} else {
printf("====== Failed %04X Checksum======\r\n", cks);
}
}
static void _bl_cks_test_case4()
{
uint16_t data_segment_one = 0x3F1F;
uint8_t data_segment_two = 0xa1;
int i;
uint32_t checksum;
uint16_t cks;
*(volatile uint8_t*)0x4000A700 = 0x1;//REST
checksum = 0;
for (i = 0; i < 1; i++) {
checksum += data_segment_one;
*(volatile uint8_t*)0x4000A704 = (data_segment_one >> 0);
*(volatile uint8_t*)0x4000A704 = (data_segment_one >> 8);
}
checksum += data_segment_two;
while (checksum >> 16) {
checksum = (checksum >> 16) + (checksum & 0xFFFF);
}
*(volatile uint8_t*)0x4000A704 = data_segment_two;
cks = *(volatile uint16_t*)0x4000A708;
printf("CKS LE result is %04x, %04x\r\n",
cks,
(uint16_t)~checksum
);
*(volatile uint8_t*)0x4000A700 = 0x1;//REST
*(volatile uint8_t*)0x4000A700 = 0x2;//BIG Endian
checksum = 0;
for (i = 0; i < 1; i++) {
checksum += data_segment_one;
*(volatile uint8_t*)0x4000A704 = (data_segment_one >> 0);
*(volatile uint8_t*)0x4000A704 = (data_segment_one >> 8);
}
checksum += data_segment_two;
while (checksum >> 16) {
checksum = (checksum >> 16) + (checksum & 0xFFFF);
}
*(volatile uint8_t*)0x4000A704 = data_segment_two;
cks = *(volatile uint16_t*)0x4000A708;
printf("CKS BE result is %04x, %04x\r\n",
cks,
(uint16_t)~checksum
);
if (cks == ((uint16_t)~checksum)) {
printf("====== Success %04X Checksum=====\r\n", cks);
} else {
printf("====== Failed %04X Checksum======\r\n", cks);
}
}
static void _cb_cmd(void *arg)
{
struct bl_dma_item *first;
first = (struct bl_dma_item*)arg;
printf("[DMA] [TEST] Callback is working, arg is %p\r\n", arg);
first->arg = NULL;
}
static void _bl_cks_test_case5()
{
struct bl_dma_item first;
struct bl_dma_item second;
struct bl_dma_item last;
uint16_t data_segment_one = 0x3F1F;
uint16_t cks_result = 0;
uint32_t cks_cmd_list[2] = {
0x1, //reset command
0x2, //Big endian
};
memset(&first, 0, sizeof(struct bl_dma_item));
memset(&second, 0, sizeof(struct bl_dma_item));
memset(&last, 0, sizeof(struct bl_dma_item));
/*cks config section*/
first.src = (uint32_t)&cks_cmd_list;
first.dst = 0x4000A700;
first.next = (uint32_t)&second.src;
first.ctrl = (
//BL_DMA_ITEM_BITS_IRQ_ENABLE |
BL_DMA_ITEM_BITS_SRC_BURST_COUNT_01 |
BL_DMA_ITEM_BITS_SRC_WIDTH_4BYTE |
BL_DMA_ITEM_BITS_SRC_AUTO_INCR_ENABLE |
BL_DMA_ITEM_BITS_DST_BURST_COUNT_01 |
BL_DMA_ITEM_BITS_DST_WIDTH_4BYTE |
(2)
);
first.cb = _cb_cmd;
first.arg = &first;
/*data copy section*/
second.src = (uint32_t)&data_segment_one;
second.dst = 0x4000A704;
second.next = (uint32_t)&last.src;
second.ctrl = (
//BL_DMA_ITEM_BITS_IRQ_ENABLE |
BL_DMA_ITEM_BITS_SRC_BURST_COUNT_01 |
BL_DMA_ITEM_BITS_SRC_WIDTH_2BYTE |
BL_DMA_ITEM_BITS_DST_BURST_COUNT_01 |
BL_DMA_ITEM_BITS_DST_WIDTH_1BYTE |
(1000)
);
second.cb = NULL;
second.arg = NULL;
/*copy result section*/
last.src = 0x4000A708;
last.dst = (uint32_t)&cks_result;
last.next = 0;
last.ctrl = (
BL_DMA_ITEM_BITS_IRQ_ENABLE |
BL_DMA_ITEM_BITS_SRC_BURST_COUNT_01 |
BL_DMA_ITEM_BITS_SRC_WIDTH_2BYTE |
BL_DMA_ITEM_BITS_DST_BURST_COUNT_01 |
BL_DMA_ITEM_BITS_DST_WIDTH_2BYTE |
(1)
);
last.cb = NULL;
last.arg = NULL;
bl_dma_copy(&first);
/*Arg will be set in callback*/
/*XXX volatile may needed*/
while (first.arg) {
vTaskDelay(2);
}
if (0x6DF1 == cks_result) {
printf("====== Success %04X Checksum=====\r\n", cks_result);
} else {
printf("====== Failed %04X Checksum======\r\n", cks_result);
}
}
int bl_cks_test(void)
{
puts("--->>> case1 test\r\n");
_bl_cks_test_case1();
puts("--->>> case2 test\r\n");
_bl_cks_test_case2();
puts("--->>> case3 test\r\n");
_bl_cks_test_case3();
puts("--->>> case4 test\r\n");
_bl_cks_test_case4();
puts("--->>> case5 test\r\n");
_bl_cks_test_case5();
return 0;
}
|
mkroman/bl602-604
|
components/bl602/bl602_wifi/plf/refip/src/driver/phy/bl602_phy_rf/rfc_bl602.c
|
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdio.h>
#include "rfc_bl602.h"
#include "reg/reg_bl_rc2.h"
#include "reg/reg_rf.h"
#include "reg/reg_rf_fsm.h"
#include "reg/reg_rf_epa.h"
#define prefix "[RFC] "
#define RF_PRIVATE_PRESENT
static uint8_t inited = 0;
static double xtalfreq_MHz = 40.0;
static void wait_us(uint32_t);
static void wait_ms(uint32_t);
static void _set_rfc();
static void _set_rf_channel_sw(uint32_t);
static void _set_rf_channel_hw(uint32_t);
static void _calc_sdm_cw(uint32_t xtalfreq,float freq_MHz,uint32_t *sdm_cw);
static void _calc_sdm_params(uint32_t xtalfreq,uint32_t *lo_center_freq_mhz,uint32_t *lo_sdmin_center,uint32_t *lo_sdmin_1m,uint32_t *lo_sdmin_if);
#ifdef RF_PRIVATE_PRESENT
#include "bl602_rf_private.h"
#endif
#ifndef RF_PRIVATE_PRESENT
enum {
RF_PU_PD = 0,
RF_PU_SB = 1,
RF_PU_LO = 2,
RF_PU_LOCAL = 3,
RF_PU_RX = 4,
RF_PU_TX = 6,
RF_PU_AUTO = 5
};
typedef struct rf_backup_item_tag
{
uint32_t addr;
uint32_t value;
} rf_backup_item_t;
typedef struct
{
// uint32_t freq_MHz;
uint32_t count;
uint32_t sdm_cw;
uint8_t sdm_dither;
uint8_t sdm_bypass;
uint8_t vco_freq_cw;
uint8_t vco_idac_cw;
} rf_lo_cfg_t;
static rf_lo_cfg_t lo_lut[21]; // 2404:4:2484
static rf_backup_item_t backup_regs[16] = {
{0x40001004,0},
{0x4000100C,0},
{0x4000101C,0},
{0x40001030,0},
{0x400010B8,0},
{0x400010C0,0},
{0x400010C4,0},
{0x00000000,0},
{0x00000000,0},
{0x00000000,0},
{0x00000000,0},
{0x00000000,0},
{0x00000000,0},
{0x00000000,0},
{0x00000000,0},
{0x00000000,0},
};
static void _save_before_cal()
{
for (uint32_t i = 0; i < sizeof(backup_regs)/sizeof(backup_regs[0]);i++) {
if (backup_regs[i].addr != 0) {
backup_regs[i].value = rfc_read_reg(backup_regs[i].addr);
}
}
}
static void _restore_after_cal()
{
for (uint32_t i = 0; i < sizeof(backup_regs)/sizeof(backup_regs[0]);i++) {
if (backup_regs[i].addr != 0) {
rfc_write_reg(backup_regs[i].addr,backup_regs[i].value);
}
}
}
static void _set_rf_pu(uint32_t pu_mode)
{
if (pu_mode == RF_PU_AUTO) {
rf_pu_ctrl_hw_setf(1);
return;
}
// make sure fbdv is on
// the system crash if fbdv is off and clkpll selects xtal as reference
rf_pu_fbdv_setf(1);
if (pu_mode == RF_PU_LOCAL) {
// configure pu
rf_pu_lna_setf(0);
rf_pu_rmxgm_setf(0);
rf_pu_rmx_setf(0);
rf_pu_rbb_setf(0);
rf_pu_adc_setf(0);
rf_adc_clk_en_setf(0);
rf_pu_pkdet_setf(0);
rf_pu_rosdac_setf(0);
rf_pu_pwrmx_setf(0);
rf_pu_pa_setf(0);
rf_pu_tmx_setf(0);
rf_pu_tbb_setf(0);
rf_pu_dac_setf(0);
rf_pu_rxbuf_setf(0);
rf_pu_txbuf_setf(0);
rf_trsw_en_setf(0);
rf_pu_tosdac_setf(0);
rf_pu_osmx_setf(1);
rf_pu_pfd_setf(1);
rf_pu_fbdv_setf(1);
rf_pu_vco_setf(1);
// switch to software pu
rf_pu_ctrl_hw_setf(0);
}
else {
}
}
uint32_t _fcal_meas(uint32_t cw)
{
uint32_t count1;
// configure capcode
rf_lo_vco_freq_cw_setf(cw);
wait_us(100);
// start fcal
rf_fcal_cnt_start_setf(1);
wait_us(100);
// wait fcal done
while(rf_fcal_cnt_rdy_getf() == 0);
// read fcal count
count1 = rf_fcal_cnt_op_getf();
// stop fcal
rf_fcal_cnt_start_setf(0);
return count1;
}
// (1) search cw for lower boundary of channel frequency (2400) (max of cw,min of count)
// (2) search cw for each channel (2404:4:2484)
static void _fcal_main(void)
{
uint32_t k;
uint32_t count1 = 0xa6a0;
uint32_t count2 = 0xa6e0;
uint32_t ncycles = 0x855;
uint32_t fbdv_div = 4;
uint32_t fbdv_div_sdm = fbdv_div*(1<<22);
uint32_t target_count;
uint32_t bw,cw,cnt,cnt_last,cw_binary;
uint32_t channel_freq;
double vco_freq;
_save_before_cal();
// configure PU for lo calibration
_set_rf_pu(RF_PU_LOCAL);
// turn off hardware control
rf_adda_ctrl_hw_setf(0);
rf_rbb_pkdet_out_rstn_ctrl_hw_setf(0);
rf_rbb_pkdet_en_ctrl_hw_setf(0);
rf_sdm_ctrl_hw_setf(0);
rf_inc_fcal_ctrl_en_hw_setf(0);
rf_inc_acal_ctrl_en_hw_setf(0);
rf_lo_ctrl_hw_setf(0);
rf_trxcal_ctrl_hw_setf(0);
rf_rbb_bw_ctrl_hw_setf(0);
rf_lna_ctrl_hw_setf(0);
rf_tx_gain_ctrl_hw_setf(0);
rf_rx_gain_ctrl_hw_setf(0);
rf_pu_ctrl_hw_setf(0);
// configure for lo fcal
rf_fcal_en_setf(1);
rf_lo_fbdv_sel_fb_clk_setf(0);
rf_fcal_div_setf(ncycles); // configure number cycles of reference clock
rf_lo_sdmin_setf(fbdv_div_sdm); // configure fbdv divider (0x1000000 = 4.0 when sdm is bypassed)
rf_lo_sdm_bypass_setf(1);
rf_lo_sdm_rstb_setf(0);
rf_lo_fbdv_rst_setf(1);
wait_us(100);
rf_lo_sdm_rstb_setf(1);
rf_lo_fbdv_rst_setf(0);
wait_us(100);
// scan vco freq
for (cw = 0; cw < 256; cw += 8) {
cnt = _fcal_meas(cw);
vco_freq = fbdv_div*xtalfreq_MHz*cnt/ncycles;
printf(prefix "capcode %02lx, cnt %lx, vco freq %.2f MHz\r\n",cw,cnt,vco_freq);
}
// build count table
bw = 8;
cw = 1 << (bw - 1);
for (k = 1; k < bw; k++){
cnt = _fcal_meas(cw);
printf(prefix "binary search: fmeas %lx,result %lx\r\n",cw,cnt);
if (cnt >= count1 && cnt <= count2) {
break;
}
else if (cnt < count1) {
cw -= 1 << (bw-1-k);
}
else if (cnt > count2) {
cw += 1 << (bw-1-k);
}
}
cw = (cw + 1 > 255) ? 255 : cw + 1;
cw_binary = cw;
if (cw_binary < 64) {
printf(prefix "fcal binary search error\r\n");
while (1);
}
// build lut
k = 0; cw = cw_binary + 3;
for (k = 0,channel_freq = 2404; channel_freq <= 2484; channel_freq += 4, k += 1) {
vco_freq = (4.0/3.0)*channel_freq;
target_count = (int)(vco_freq/fbdv_div/xtalfreq_MHz*ncycles);
cw = cw + 3;
do {
cnt_last = cnt;
cnt = _fcal_meas(--cw);
} while (cnt < target_count);
// if (cnt - target_count <= target_count - cnt_last) {
// lo_lut[k].vco_freq_cw = cw;
// }
// else {
// lo_lut[k].vco_freq_cw = cw + 1;
// }
lo_lut[k].vco_freq_cw = cw + 1;
lo_lut[k].sdm_cw = (int)(0.5+4.0/3.0*channel_freq/xtalfreq_MHz*(1<<22));
lo_lut[k].count = target_count;
// lo_lut[k].freq_MHz = channel_freq;
printf(prefix "channel %ld (%02ld): sdmin %08lx,c_tgt %04lx,c(%lx)=%04lx,c(%lx)=%04lx,vco_freq_cw %02x\r\n",
channel_freq,k,lo_lut[k].sdm_cw,
target_count,
cw+1,cnt_last,
cw,cnt,
lo_lut[k].vco_freq_cw);
}
// restore registers
_restore_after_cal();
}
#endif
static void wait_us(uint32_t us)
{
volatile uint32_t n;
us = (us >= (1<<24)-1) ? (1<<24)-1 : us;
// if (us < 2) {
// return;
// }
// else
{
n = us << 4;
while(n--);
}
}
__attribute__((unused)) static void wait_ms(uint32_t ms)
{
wait_us(1000*ms);
}
uint32_t rfc_read_reg(uint32_t addr)
{
return *(volatile uint32_t*)addr;
}
void rfc_write_reg(uint32_t addr,uint32_t value)
{
*(volatile uint32_t*)addr = value;
}
void rfc_write_reg_bits(uint32_t addr, uint8_t high_bit, uint8_t low_bit, uint32_t wdata)
{
uint32_t rval = 0;
uint32_t wval = 0;
uint8_t bitsize = high_bit - low_bit + 1;
uint32_t mask_bit = ~(((1 << bitsize) - 1) << low_bit);
if (low_bit > high_bit) {
return;
}
rval = rfc_read_reg(addr);
wval = wdata & ((1 << bitsize) - 1);
wval = (rval & mask_bit) | ( wval << low_bit);
rfc_write_reg(addr,wval);
}
#ifndef RF_PRIVATE_PRESENT
static void _run_cal(void)
{
_fcal_main();
}
static void _set_rf(void)
{
#if 0
// configure capcode
rfc_write_reg_bits(0x4000f884,27,22,60);
rfc_write_reg_bits(0x4000f884,21,16,60);
#endif
// enable/disable incremental calibration
rf_acal_en_setf(0);
rf_fcal_en_setf(0);
rf_inc_acal_ctrl_en_hw_setf(0);
rf_inc_fcal_ctrl_en_hw_setf(0);
rf_inc_acal_sten_setf(0);
rf_inc_fcal_sten_setf(0);
rf_acal_inc_en_setf(0);
rf_fcal_inc_en_setf(0);
// disable LO halfstep due to overflow issue
rf_lo_fbdv_halfstep_en_tx_setf(0);
rf_lo_fbdv_halfstep_en_rx_setf(0);
rf_lo_fbdv_halfstep_en_setf(0);
}
#endif
#define SET_RFG(index,rfg) rf_tbb_ind_gc##index##_setf((rfg))
#define SET_DG(index,dg) rf_tx_dvga_gain_qdb_gc##index##_setf((dg))
static void _set_rfc(uint32_t xtalfreq_hz)
{
uint32_t rf_fsm_lo_time = 52*80; // in 80M cycles
// uint32_t rf_fsm_dly_30_time = 30*50; // 30us in 50M cycles
uint32_t lo_center_freq_mhz,lo_sdmin_center,lo_sdmin_1m,lo_sdmin_if;
uint32_t fcal_cw;
uint32_t acal_cw;
uint32_t lo_cw;
uint32_t rfg_index, dg;
xtalfreq_MHz = xtalfreq_hz/1000/1000;
_calc_sdm_params(xtalfreq_hz,&lo_center_freq_mhz,&lo_sdmin_center,&lo_sdmin_1m,&lo_sdmin_if);
// configure sdm params
rf_lo_center_freq_mhz_setf(lo_center_freq_mhz);
rf_lo_sdmin_center_setf(lo_sdmin_center);
rf_lo_sdmin_1m_setf(lo_sdmin_1m);
rf_lo_sdmin_if_setf(lo_sdmin_if);
// configure fcal table
// f_cw_2408 , a_cw_2408, f_cw_2404, a_cw_2404
// f_cw_2416 , a_cw_2416, f_cw_2412, a_cw_2412
// ...
// f_cw_2424 , a_cw_2424, f_cw_2420, a_cw_2420
// f_cw_2432 , a_cw_2432, f_cw_2428, a_cw_2428
// f_cw_2440 , a_cw_2440, f_cw_2436, a_cw_2436
// f_cw_2448 , a_cw_2448, f_cw_2444, a_cw_2444
// f_cw_2456 , a_cw_2456, f_cw_2452, a_cw_2452
// f_cw_2464 , a_cw_2464, f_cw_2460, a_cw_2460
// f_cw_2472 , a_cw_2472, f_cw_2468, a_cw_2468
// f_cw_2480 , a_cw_2480, f_cw_2476, a_cw_2476
// f_cw_2484, a_cw_2484
lo_cw = 0;
for (int k = 0,freq = 2404; freq <= 2484; freq += 4, k += 1) {
#ifdef RF_PRIVATE_PRESENT
fcal_cw = rf_pri_get_vco_freq_cw(freq);
acal_cw = rf_pri_get_vco_idac_cw(freq);
if (freq == 2404) fcal_cw += 1;
#else
fcal_cw = lo_lut[k].vco_freq_cw;
acal_cw = 6; // lo_lut[k].vco_idac_cw;
#endif
printf("%d: %02lx | %lx\r\n", freq, fcal_cw, acal_cw);
if ((k % 2) == 0) {
lo_cw = (fcal_cw << 8) | acal_cw;
}
else {
lo_cw = (((fcal_cw << 8) | acal_cw) << 16) | lo_cw;
*(volatile uint32_t*)(0x4000113c+((k>>1)<<2)) = lo_cw;
printf(" %08lx\r\n", lo_cw);
}
if (freq == 2484) {
*(volatile uint32_t*)(0x4000113c+((k>>1)<<2)) = lo_cw;
printf(" %08lx\r\n", lo_cw);
}
}
// configure power table
#ifdef RF_PRIVATE_PRESENT
rf_pri_query_txgain_table( 0,&rfg_index,&dg); SET_RFG( 0,rfg_index); SET_DG( 0,dg);
rf_pri_query_txgain_table( 1,&rfg_index,&dg); SET_RFG( 1,rfg_index); SET_DG( 1,dg);
rf_pri_query_txgain_table( 2,&rfg_index,&dg); SET_RFG( 2,rfg_index); SET_DG( 2,dg);
rf_pri_query_txgain_table( 3,&rfg_index,&dg); SET_RFG( 3,rfg_index); SET_DG( 3,dg);
rf_pri_query_txgain_table( 4,&rfg_index,&dg); SET_RFG( 4,rfg_index); SET_DG( 4,dg);
rf_pri_query_txgain_table( 5,&rfg_index,&dg); SET_RFG( 5,rfg_index); SET_DG( 5,dg);
rf_pri_query_txgain_table( 6,&rfg_index,&dg); SET_RFG( 6,rfg_index); SET_DG( 6,dg);
rf_pri_query_txgain_table( 7,&rfg_index,&dg); SET_RFG( 7,rfg_index); SET_DG( 7,dg);
rf_pri_query_txgain_table( 8,&rfg_index,&dg); SET_RFG( 8,rfg_index); SET_DG( 8,dg);
rf_pri_query_txgain_table( 9,&rfg_index,&dg); SET_RFG( 9,rfg_index); SET_DG( 9,dg);
rf_pri_query_txgain_table(10,&rfg_index,&dg); SET_RFG(10,rfg_index); SET_DG(10,dg);
rf_pri_query_txgain_table(11,&rfg_index,&dg); SET_RFG(11,rfg_index); SET_DG(11,dg);
rf_pri_query_txgain_table(12,&rfg_index,&dg); SET_RFG(12,rfg_index); SET_DG(12,dg);
rf_pri_query_txgain_table(13,&rfg_index,&dg); SET_RFG(13,rfg_index); SET_DG(13,dg);
rf_pri_query_txgain_table(14,&rfg_index,&dg); SET_RFG(14,rfg_index); SET_DG(14,dg);
rf_pri_query_txgain_table(15,&rfg_index,&dg); SET_RFG(15,rfg_index); SET_DG(15,dg);
#endif
// configure rf_fsm related params
rf_rc_state_dbg_en_setf(0); // turn off debug port
rf_fsm_st_dbg_en_setf(0); // turn off debug port
rf_fsm_lo_time_setf(rf_fsm_lo_time); // config lo state wait time
rf_fsm_ctrl_en_setf(1); // enable rfc fsm
// configure tx gain control
rf_tx_gain_ctrl_hw_setf(1);
rf_tx_dvga_gain_ctrl_hw_setf(1);
rf_tx_dvga_gain_qdb_setf(0);
// configure rf compensation paramas
// turn off trxcal if ROSDAC table changes vs gain to prevent pkdet false triggers
// caused by the transient response of ROSDAC
rf_trxcal_ctrl_hw_setf(1);
// configure rx gain control
rf_rx_gain_ctrl_hw_setf(1);
}
// static void _set_rfc_channel(void)
// {
// }
static void _set_rfc_powercontrol(uint32_t pc_mode)
{
rf_pa_ib_fix_setf(0);
rf_tmx_cs_setf(6);
if (pc_mode == RFC_PC_AUTO) {
rf_pa_vbcore_11b_setf(0xf);
rf_pa_vbcore_11n_setf(0xa);
rf_pa_vbcore_11g_setf(0xa);
rf_pa_vbcas_11b_setf(5);
rf_pa_vbcas_11n_setf(5);
rf_pa_vbcas_11g_setf(5);
rf_pa_iet_11b_setf(7);
rf_pa_iet_11n_setf(5);
rf_pa_iet_11g_setf(5);
rf_pa_vbcore_setf(0xf); // register control for BLE
rf_pa_vbcas_setf(5); // register control for BLE
rf_pa_iet_setf(7); // register control for BLE
}
else if (pc_mode == RFC_PC_WLAN_11B) {
rf_pa_vbcore_setf(0xf);
rf_pa_vbcas_setf(5);
rf_pa_iet_setf(7);
}
else if (pc_mode == RFC_PC_WLAN_11G) {
rf_pa_vbcore_setf(0xa);
rf_pa_vbcas_setf(5);
rf_pa_iet_setf(5);
}
else if (pc_mode == RFC_PC_WLAN_11N) {
rf_pa_vbcore_setf(0xa);
rf_pa_vbcas_setf(5);
rf_pa_iet_setf(5);
}
else if (pc_mode == RFC_PC_BT_BLE) {
rf_pa_vbcore_setf(0xf);
rf_pa_vbcas_setf(5);
rf_pa_iet_setf(7);
}
// gain setting
rf_gc_tbb_boost_setf(0);
rf_gc_tbb_setf(6);
rf_gc_tmx_setf(5);
rf_dac_bias_sel_setf(1);
}
static void _calc_sdm_cw(uint32_t xtalfreq, float freq_MHz, uint32_t *sdm_cw)
{
float xtal_MHz = xtalfreq/1000000;
*sdm_cw = (uint32_t)(0.5+freq_MHz*4/3/xtal_MHz*(1<<22));
}
static void _calc_sdm_params(uint32_t xtalfreq,uint32_t *lo_center_freq_mhz,uint32_t *lo_sdmin_center,uint32_t *lo_sdmin_1m,uint32_t *lo_sdmin_if)
{
float center_freq_MHz = xtalfreq == 38400000 ? 2448 :
xtalfreq == 40000000 ? 2430 : 2448;
*lo_center_freq_mhz = (uint32_t)center_freq_MHz;
_calc_sdm_cw(xtalfreq,center_freq_MHz,lo_sdmin_center);
_calc_sdm_cw(xtalfreq,1.0,lo_sdmin_1m);
_calc_sdm_cw(xtalfreq,1.25,lo_sdmin_if);
}
void _print_channel_info()
{
int i;
printf("Channel information:\r\n");
printf(" lo_sdmin_hw %lx\r\n",rf_lo_sdmin_hw_getf());
printf(" lo_sdmbypass_hw %ld\r\n",rf_lo_sdm_bypass_hw_getf());
printf(" lo_vco_idac_cw_hw %lx\r\n",rf_lo_vco_idac_cw_hw_getf());
printf(" lo_vco_freq_cw_hw %lx\r\n",rf_lo_vco_freq_cw_hw_getf());
printf(" lo_unlocked %ld\r\n",rf_lo_unlocked_getf());
printf(" lo_halfstep_en_hw %ld\r\n",rf_lo_fbdv_halfstep_en_hw_getf());
printf(" lo_slipped_up ");
for (i = 0; i < 8; i++) {
wait_ms(1);
printf("%ld", rf_lo_slipped_up_getf() ? (uint32_t)1 : (uint32_t)0);
}
printf("\r\n");
printf(" lo_slipped_dn ");
for (i = 0; i < 8; i++) {
wait_ms(1);
printf("%ld", rf_lo_slipped_dn_getf() ? (uint32_t)1 : (uint32_t)0);
}
printf("\r\n");
}
static void _set_rf_channel_sw(uint32_t channel_freq)
{
uint32_t sdmin = (uint32_t)(channel_freq*4.0/3/xtalfreq_MHz*(1<<22));
rf_lo_ctrl_hw_setf(0);
rf_sdm_ctrl_hw_setf(0);
rf_pu_vco_setf(1);
rf_pu_fbdv_setf(1);
rf_pu_pfd_setf(1);
rf_pu_osmx_setf(1);
rf_pu_ctrl_hw_setf(0);
// set channel
// rf_lo_fbdv_halfstep_en_setf(1);
#ifdef RF_PRIVATE_PRESENT
rf_lo_vco_freq_cw_setf(rf_pri_get_vco_freq_cw(channel_freq));
rf_lo_vco_idac_cw_setf(rf_pri_get_vco_idac_cw(channel_freq));
rf_lo_osmx_cap_setf(rf_pri_get_vco_freq_cw(channel_freq) >> 4);
#else
int32_t k = (int32_t)((channel_freq-2404)/4 + 0.5);
k = k < 0 ? 0 : k;
k = k > sizeof(lo_lut)/sizeof(lo_lut[0])-1 ? sizeof(lo_lut)/sizeof(lo_lut[0]) - 1 : k;
rf_lo_vco_freq_cw_setf(lo_lut[k].vco_freq_cw);
rf_lo_vco_idac_cw_setf(6);
rf_lo_osmx_cap_setf(lo_lut[k].vco_freq_cw >> 4);
#endif
rf_lo_sdmin_setf(sdmin);
rf_lo_sdm_bypass_setf(0);
// wait channel lock
do {
rf_lo_fbdv_rst_setf(1);
wait_us(10);
rf_lo_fbdv_rst_setf(0);
wait_us(50);
rf_lo_pfd_rst_csd_setf(1);
wait_us(10);
rf_lo_pfd_rst_csd_setf(0);
wait_us(50);
// if (rf_lo_slipped_dn_getf() || rf_lo_slipped_up_getf()) {
// printf(".");
// }
// else {
// printf("\r\n");
// break;
// }
} while (0);
}
#if 0
static void _set_rf_channel_sw0(uint32_t channel_freq)
{
int32_t k = (int32_t)((channel_freq-2404)/4 + 0.5);
uint32_t sdmin = (uint32_t)(channel_freq*4.0/3/xtalfreq_MHz*(1<<22));
uint32_t vco_freq_cw;
uint32_t vco_idac_cw;
k = k < 0 ? 0 : k;
k = k > sizeof(lo_lut)/sizeof(lo_lut[0])-1 ? sizeof(lo_lut)/sizeof(lo_lut[0]) - 1 : k;
rf_lo_vco_freq_cw_setf(rf_lo_vco_freq_cw_hw_getf());
rf_lo_vco_idac_cw_setf(rf_lo_vco_idac_cw_hw_getf());
rf_lo_fbdv_halfstep_en_setf(1);
rf_lo_sdmin_setf(rf_lo_sdmin_hw_getf());
rf_lo_sdm_bypass_setf(0);
rf_lo_ctrl_hw_setf(0);
// wait channel lock
do {
rf_lo_fbdv_rst_setf(1);
wait_us(10);
rf_lo_fbdv_rst_setf(0);
wait_us(50);
rf_lo_pfd_rst_csd_setf(1);
wait_us(10);
rf_lo_pfd_rst_csd_setf(0);
wait_us(50);
} while (0);
}
static void _set_rf_channel_hw(uint32_t channel_freq)
{
rf_ch_ind_wifi_setf(channel_freq);
// clear LO ready
rf_fsm_lo_rdy_rst_setf(1); wait_us(100);
rf_fsm_lo_rdy_rst_setf(0); wait_us(10);
// toggle rf_fsm_ctrl to reset rf_fsm
rf_fsm_ctrl_en_setf(0); wait_us(10);
rf_fsm_ctrl_en_setf(1); wait_us(10);
// set rf_fsm state using debug port
rf_fsm_st_dbg_setf(RFC_FSM_SB); wait_us(10);
rf_fsm_st_dbg_en_setf(1); wait_us(10);
#if 0
printf("pu_fbdv %ld,pu_vco %ld,pu_pfd %ld,pu_osmx %ld\r\n",
rf_pu_fbdv_hw_getf(),rf_pu_vco_hw_getf(),rf_pu_pfd_hw_getf(),rf_pu_osmx_getf());
printf("sdmin %08lx\r\n",rf_lo_sdmin_hw_getf());
rf_lo_ctrl_hw_setf(0); wait_us(10);
rf_lo_sdmin_setf(0x14599998); wait_us(100);
rf_lo_fbdv_rst_setf(1); wait_us(100);
rf_lo_fbdv_rst_setf(0); wait_us(10);
rf_lo_ctrl_hw_setf(1); wait_us(10);
#endif
/* Controlled by HW */
rf_fsm_st_dbg_setf(RFC_FSM_LO); wait_us(300);
printf("*************************** (1) *****************\r\n");
_print_channel_info();
/* Controlled by SW */
rf_lo_vco_freq_cw_setf(rf_lo_vco_freq_cw_hw_getf());
rf_lo_vco_idac_cw_setf(rf_lo_vco_idac_cw_hw_getf());
rf_lo_sdmin_setf(rf_lo_sdmin_hw_getf());
rf_lo_sdm_bypass_setf(rf_lo_sdm_bypass_hw_getf());
rf_lo_fbdv_halfstep_en_setf(rf_lo_fbdv_halfstep_en_hw_getf());
rf_lo_ctrl_hw_setf(0); wait_us(100);
// rf_lo_pfd_rst_csd_setf(1);
// rf_lo_fbdv_rst_setf(1); wait_us(100);
// rf_lo_fbdv_rst_setf(0); wait_us(10);
// wait_us(100);
// rf_lo_pfd_rst_csd_setf(0);
// wait_us(100);
rf_lo_pfd_rst_csd_setf(1);
rf_lo_fbdv_rst_setf(1);
rf_lo_fbdv_rst_setf(0);
wait_us(100);
rf_lo_pfd_rst_csd_setf(0);
wait_us(100);
printf("*************************** (2) *****************\r\n");
_print_channel_info();
rf_lo_ctrl_hw_setf(1); wait_us(10);
// // _set_rf_channel_sw0(channel_freq);
// printf("*************************** (2-B) *****************\r\n");
// _print_channel_info();
rf_fsm_st_dbg_setf(RFC_FSM_SB); wait_us(300);
printf("*************************** (3) *****************\r\n");
_print_channel_info();
rf_lo_fbdv_halfstep_en_tx_setf(0);
rf_lo_fbdv_halfstep_en_rx_setf(0);
// // // // rf_lo_ctrl_hw_setf(0); wait_us(10);
// // // // rf_lo_fbdv_halfstep_en_setf(0);
// // // // rf_lo_fbdv_halfstep_en_tx_setf(0);
// // // // rf_lo_fbdv_halfstep_en_rx_setf(0);
// // // // rf_lo_ctrl_hw_setf(1); wait_us(10);
rf_fsm_st_dbg_setf(RFC_FSM_LO); wait_us(300);
printf("*************************** (4) *****************\r\n");
_print_channel_info();
// // now debug port is released
// rf_fsm_st_dbg_en_setf(0); wait_us(100);
// wait_us(100);
rf_lo_ctrl_hw_setf(0);
rf_lo_fbdv_rst_setf(1);
rf_lo_fbdv_rst_setf(0);
rf_lo_ctrl_hw_setf(1);
rf_lo_ctrl_hw_setf(0);
rf_lo_pfd_rst_csd_setf(1); wait_us(100);
rf_lo_pfd_rst_csd_setf(0);
rf_lo_ctrl_hw_setf(1);
printf("*************************** (5) *****************\r\n");
_print_channel_info();
printf("\r\n\r\n");
}
#endif
static void _set_rf_channel_hw(uint32_t channel_freq)
{
rf_ch_ind_wifi_setf(channel_freq);
// clear LO ready
rf_fsm_lo_rdy_rst_setf(1); wait_us(100);
rf_fsm_lo_rdy_rst_setf(0); wait_us(10);
// toggle rf_fsm_ctrl to reset rf_fsm
rf_fsm_ctrl_en_setf(0); wait_us(10);
rf_fsm_ctrl_en_setf(1); wait_us(10);
// set rf_fsm state using debug port
rf_fsm_st_dbg_setf(RFC_FSM_SB); wait_us(10);
rf_fsm_st_dbg_en_setf(1); wait_us(10);
// set LO state
rf_fsm_st_dbg_setf(RFC_FSM_LO); wait_us(300);
// now debug port is released
rf_fsm_st_dbg_en_setf(0); wait_us(100);
}
void rfc_config_channel(uint32_t channel_freq)
{
uint8_t ncf_on;
uint8_t ncf_alpha = 1;
int32_t ncf_freq_hz;
int8_t ncf_nrmfc = 0;
double ncf_fs_hz = 40 * 1000 * 1000;
rfif_int_lo_unlocked_mask_setf(1);
rf_lo_ctrl_hw_setf(1);
rf_sdm_ctrl_hw_setf(1);
rf_pu_ctrl_hw_setf(1);
_set_rf_channel_hw(channel_freq);
_print_channel_info();
#ifdef RF_PRIVATE_PRESENT
rf_pri_update_param(channel_freq);
rf_pri_get_notch_param(channel_freq,&ncf_on,&ncf_freq_hz);
ncf_nrmfc = (int8_t)((ncf_freq_hz/ncf_fs_hz)*(1<<8) + 0.5);
rfc_rxdfe_set_notch0(ncf_on,ncf_alpha,ncf_nrmfc);
#endif
rfif_int_lo_unlocked_mask_setf(0);
}
void rfc_config_channel_sw(uint32_t channel_freq)
{
uint8_t ncf_on;
uint8_t ncf_alpha = 1;
int32_t ncf_freq_hz;
int8_t ncf_nrmfc = 0;
double ncf_fs_hz = 40 * 1000 * 1000;
rf_lo_ctrl_hw_setf(0);
rf_sdm_ctrl_hw_setf(0);
rf_pu_ctrl_hw_setf(0);
_set_rf_channel_sw(channel_freq);
_print_channel_info();
#ifdef RF_PRIVATE_PRESENT
rf_pri_update_param(channel_freq);
rf_pri_get_notch_param(channel_freq,&ncf_on,&ncf_freq_hz);
ncf_nrmfc = (int8_t)((ncf_freq_hz/ncf_fs_hz)*(1<<8) + 0.5);
rfc_rxdfe_set_notch0(ncf_on,ncf_alpha,ncf_nrmfc);
#endif
}
#define READ_DG(index) (((int8_t)(rf_tx_dvga_gain_qdb_gc##index##_getf() << 1)) >> 1)
void _check_config()
{
printf("txvector powerlevel[:2] table\r\n");
printf(" 0: %ld, %d\r\n", rf_tbb_ind_gc0_getf(),READ_DG(0));
printf(" 1: %ld, %d\r\n", rf_tbb_ind_gc1_getf(),READ_DG(1));
printf(" 2: %ld, %d\r\n", rf_tbb_ind_gc2_getf(),READ_DG(2));
printf(" 3: %ld, %d\r\n", rf_tbb_ind_gc3_getf(),READ_DG(3));
printf(" 4: %ld, %d\r\n", rf_tbb_ind_gc4_getf(),READ_DG(4));
printf(" 5: %ld, %d\r\n", rf_tbb_ind_gc5_getf(),READ_DG(5));
printf(" 6: %ld, %d\r\n", rf_tbb_ind_gc6_getf(),READ_DG(6));
printf(" 7: %ld, %d\r\n", rf_tbb_ind_gc7_getf(),READ_DG(7));
printf(" 8: %ld, %d\r\n", rf_tbb_ind_gc8_getf(),READ_DG(8));
printf(" 9: %ld, %d\r\n", rf_tbb_ind_gc9_getf(),READ_DG(9));
printf(" a: %ld, %d\r\n", rf_tbb_ind_gc10_getf(),READ_DG(10));
printf(" b: %ld, %d\r\n", rf_tbb_ind_gc11_getf(),READ_DG(11));
printf(" c: %ld, %d\r\n", rf_tbb_ind_gc12_getf(),READ_DG(12));
printf(" d: %ld, %d\r\n", rf_tbb_ind_gc13_getf(),READ_DG(13));
printf(" e: %ld, %d\r\n", rf_tbb_ind_gc14_getf(),READ_DG(14));
printf(" f: %ld, %d\r\n", rf_tbb_ind_gc15_getf(),READ_DG(15));
printf("rf gain table\r\n");
printf(" 0: dac %ld, tbbb %ld, tbb %ld, tmx %ld\r\n", rf_gain_ctrl0_dac_bias_sel_getf(),rf_gain_ctrl0_gc_tbb_boost_getf(),rf_gain_ctrl0_gc_tbb_getf(),rf_gain_ctrl0_gc_tmx_getf());
printf(" 1: dac %ld, tbbb %ld, tbb %ld, tmx %ld\r\n", rf_gain_ctrl1_dac_bias_sel_getf(),rf_gain_ctrl1_gc_tbb_boost_getf(),rf_gain_ctrl1_gc_tbb_getf(),rf_gain_ctrl1_gc_tmx_getf());
printf(" 2: dac %ld, tbbb %ld, tbb %ld, tmx %ld\r\n", rf_gain_ctrl2_dac_bias_sel_getf(),rf_gain_ctrl2_gc_tbb_boost_getf(),rf_gain_ctrl2_gc_tbb_getf(),rf_gain_ctrl2_gc_tmx_getf());
printf(" 3: dac %ld, tbbb %ld, tbb %ld, tmx %ld\r\n", rf_gain_ctrl3_dac_bias_sel_getf(),rf_gain_ctrl3_gc_tbb_boost_getf(),rf_gain_ctrl3_gc_tbb_getf(),rf_gain_ctrl3_gc_tmx_getf());
printf(" 4: dac %ld, tbbb %ld, tbb %ld, tmx %ld\r\n", rf_gain_ctrl4_dac_bias_sel_getf(),rf_gain_ctrl4_gc_tbb_boost_getf(),rf_gain_ctrl4_gc_tbb_getf(),rf_gain_ctrl4_gc_tmx_getf());
printf(" 5: dac %ld, tbbb %ld, tbb %ld, tmx %ld\r\n", rf_gain_ctrl5_dac_bias_sel_getf(),rf_gain_ctrl5_gc_tbb_boost_getf(),rf_gain_ctrl5_gc_tbb_getf(),rf_gain_ctrl5_gc_tmx_getf());
printf(" 6: dac %ld, tbbb %ld, tbb %ld, tmx %ld\r\n", rf_gain_ctrl6_dac_bias_sel_getf(),rf_gain_ctrl6_gc_tbb_boost_getf(),rf_gain_ctrl6_gc_tbb_getf(),rf_gain_ctrl6_gc_tmx_getf());
printf(" 7: dac %ld, tbbb %ld, tbb %ld, tmx %ld\r\n", rf_gain_ctrl7_dac_bias_sel_getf(),rf_gain_ctrl7_gc_tbb_boost_getf(),rf_gain_ctrl7_gc_tbb_getf(),rf_gain_ctrl7_gc_tmx_getf());
printf("tx_gain_ctrl_hw : %ld\r\n",rf_tx_gain_ctrl_hw_getf());
printf("rx_gain_ctrl_hw : %ld\r\n",rf_rx_gain_ctrl_hw_getf());
printf("trxcal_ctrl_hw : %ld\r\n",rf_trxcal_ctrl_hw_getf());
printf("lo_ctrl_hw : %ld\r\n",rf_lo_ctrl_hw_getf());
printf("lna_ctrl_hw : %ld\r\n",rf_lna_ctrl_hw_getf());
printf("pu_ctrl_hw : %ld\r\n",rf_pu_ctrl_hw_getf());
printf("pa setting\r\n");
printf(" 11b: vbcas %ld vbcore %ld iet %ld\r\n",rf_pa_vbcas_11b_getf(),rf_pa_vbcore_11b_getf(),rf_pa_iet_11b_getf());
printf(" 11g: vbcas %ld vbcore %ld iet %ld\r\n",rf_pa_vbcas_11g_getf(),rf_pa_vbcore_11g_getf(),rf_pa_iet_11g_getf());
printf(" 11n: vbcas %ld vbcore %ld iet %ld\r\n",rf_pa_vbcas_11n_getf(),rf_pa_vbcore_11n_getf(),rf_pa_iet_11n_getf());
printf(" half_on_wifi %ld\r\n",rf_pa_half_on_wifi_getf());
printf(" half_on_ble %ld\r\n",rf_pa_half_on_getf());
}
void rfc_init(uint32_t xtalfreq_hz)
{
rf_bbmode_4s_setf(0);
rf_bbmode_4s_en_setf(1);
/* Init RF core */
#ifdef RF_PRIVATE_PRESENT
switch (xtalfreq_hz)
{
case 24 * 1000 * 1000:
rf_pri_xtalfreq(E_RF_XTAL_24M);
break;
case 26 * 1000 * 1000:
rf_pri_xtalfreq(E_RF_XTAL_26M);
break;
case 32 * 1000 * 1000:
rf_pri_xtalfreq(E_RF_XTAL_32M);
break;
case 384 * 100 * 1000:
rf_pri_xtalfreq(E_RF_XTAL_38M4);
break;
case 40 * 1000 * 1000:
rf_pri_xtalfreq(E_RF_XTAL_40M);
break;
case 52 * 1000 * 1000:
rf_pri_xtalfreq(E_RF_XTAL_52M);
break;
default:
rf_pri_xtalfreq(E_RF_XTAL_40M);
break;
}
rf_pri_init(!inited);
inited = 1;
#else
if (inited) {
return;
}
_set_rf();
_run_cal();
inited = 1;
#endif
/* Init RF controller */
_set_rfc(xtalfreq_hz);
/* Release RF force */
rf_bbmode_4s_en_setf(0);
/* RF Optimized Settings */
if (1) {
rf_adc_gt_rm_setf(1);
rf_rx_pf_i_en_setf(0);
rf_rx_pf_q_en_setf(0);
}
/* Enable RF incremental cal */
#if CFG_RF_ICAL
rf_fcal_inc_en_setf(1);
rf_acal_inc_en_setf(1);
rf_roscal_inc_en_setf(1);
rf_fsm_t2r_cal_mode_setf(1);
#else
rf_fcal_inc_en_setf(0);
rf_acal_inc_en_setf(0);
rf_roscal_inc_en_setf(0);
rf_fsm_t2r_cal_mode_setf(0);
#endif
_check_config();
printf("rf controller init done\r\n");
}
void rfc_reset()
{
inited = 0;
rfc_init(xtalfreq_MHz * 1000 * 1000);
}
/*
* TXDFE IMPLEMENTATIONS
****************************************************************************************
*/
void rfc_txdfe_start()
{
rf_tx_dfe_en_4s_setf(1);
rf_tx_dfe_en_4s_en_setf(1);
}
void rfc_txdfe_stop()
{
rf_tx_dfe_en_4s_setf(0);
rf_tx_dfe_en_4s_en_setf(0);
}
void rfc_txdfe_mux(int8_t signal_source)
{
rf_tx_test_sel_setf(signal_source);
}
void rfc_txdfe_set_dvga(int8_t dvga_qdb)
{
if (dvga_qdb < -48 || dvga_qdb > +24) {
printf(prefix "dvga_qdb out of range -48~+24,skip\r\n");
return;
}
rf_tx_dvga_gain_qdb_setf(dvga_qdb);
}
void rfc_txdfe_set_iqgaincomp(uint8_t en,uint16_t coeff)
{
rf_tx_iqc_gain_en_setf(en);
rf_tx_iqc_gain_setf(coeff);
}
void rfc_txdfe_set_iqphasecomp(uint8_t en,int16_t coeff)
{
rf_tx_iqc_phase_en_setf(en);
rf_tx_iqc_phase_setf(coeff);
}
void rfc_txdfe_set_dccomp(int16_t dcc_i,int16_t dcc_q)
{
rf_tx_dac_os_i_setf(dcc_i);
rf_tx_dac_os_q_setf(dcc_q);
}
void rfc_txdfe_set_iqswap(uint8_t swap_on)
{
rf_tx_dac_iq_swap_setf(swap_on);
}
/*
* RXDFE IMPLEMENTATIONS
****************************************************************************************
*/
void rfc_rxdfe_start()
{
rf_rx_dfe_en_4s_setf(1);
rf_rx_dfe_en_4s_en_setf(1);
}
void rfc_rxdfe_stop()
{
rf_rx_dfe_en_4s_setf(0);
rf_rx_dfe_en_4s_en_setf(0);
}
void rfc_rxdfe_set_iqgaincomp(uint8_t en,uint16_t coeff)
{
rf_rx_iqc_gain_en_setf(en);
rf_rx_iqc_gain_setf(coeff);
}
void rfc_rxdfe_set_iqphasecomp(uint8_t en,int16_t coeff)
{
rf_rx_iqc_phase_en_setf(en);
rf_rx_iqc_phase_setf(coeff);
}
void rfc_rxdfe_set_dccomp(int16_t dcc_i,int16_t dcc_q)
{
rf_rx_adc_os_i_setf(dcc_i);
rf_rx_adc_os_q_setf(dcc_q);
}
void rfc_rxdfe_set_iqswap(uint8_t swap_on)
{
rf_rx_adc_iq_swap_setf(swap_on);
}
void rfc_rxdfe_set_notch0(uint8_t en,uint8_t alpha,int8_t nrmfc)
{
rf_rx_notch0_alpha_setf(alpha);
rf_rx_notch0_nrmfc_setf(nrmfc);
rf_rx_notch0_en_setf(en);
}
void rfc_rxdfe_set_notch1(uint8_t en,uint8_t alpha,int8_t nrmfc)
{
rf_rx_notch1_alpha_setf(alpha);
rf_rx_notch1_nrmfc_setf(nrmfc);
rf_rx_notch1_en_setf(en);
}
/*
* SG IMPLEMENTATIONS
****************************************************************************************
*/
void rfc_sg_start(uint32_t inc_step,uint32_t gain_i,uint32_t gain_q,uint32_t addr_i,uint32_t addr_q)
{
rf_singen_en_setf(0);
rf_singen_inc_step0_setf(inc_step);
rf_singen_clkdiv_n_setf(0); // work clock
rf_singen_mode_i_setf(RFC_SG_SINGLE_TONE); // 0: single tone, 1: two tone, 2: ramp
rf_singen_mode_q_setf(RFC_SG_SINGLE_TONE);
rf_singen_gain_i_setf(gain_i);
rf_singen_gain_q_setf(gain_q);
// if (complex) {
// rf_singen_start_addr0_i_setf(0);
// rf_singen_start_addr0_q_setf(768);
// }
// else {
// rf_singen_start_addr0_i_setf(0);
// rf_singen_start_addr0_q_setf(0);
// }
rf_singen_start_addr0_i_setf(addr_i);
rf_singen_start_addr0_q_setf(addr_q);
rf_singen_en_setf(1);
}
/**
* This function only stops signal generator. TxDFE mux and RF state control are left for
* the code using this function.
*/
void rfc_sg_stop()
{
// ~~restore txdfe mux to default path (baseband)~~
// stop signal generator
rf_singen_en_setf(0);
}
/*
* PM IMPLEMENTATIONS
****************************************************************************************
*/
uint32_t rfc_pm_start(uint32_t insel,int32_t freq_cw,uint32_t acclen,uint32_t rshift,
int32_t *raw_acc_i,int32_t *raw_acc_q)
{
int32_t freqshift_en;
int32_t freqshift_cw;
int32_t iqacc_i;
int32_t iqacc_q;
uint64_t pwr64;
uint32_t pwr_hi,pwr_lo;
// int32_t adc_rate;
// adc_rate = insel == PM_ADC ? 80 : insel == PM_IQCOMP ? 40 : 16;
// if (rf_reg->dfe_ctrl_2.BF.rx_adc_low_pow_en) {
// adc_rate = adc_rate >> 1;
// }
// freqshift_en = freq_MHz != 0;
// freqshift_cw = (int32_t)(2*freq_MHz/adc_rate*(1<<19)+0.5);
// turn off and configure power meter
rf_rx_pm_en_setf(0);
// configure freqshift
freqshift_en = freq_cw != 0;
freqshift_cw = freq_cw;
// make sure freq is aligned to singen
// if (freqshift_en) {
// if (insel == RFC_PM_MUX_TO_IQCOMP || rf_rx_adc_low_pow_en_getf()) {
// freqshift_cw <<= 1;
// }
// }
rf_rx_pm_start_ofs_setf(1024);
rf_rx_pm_acc_len_setf(acclen);
rf_rx_pm_freqshift_en_setf(freqshift_en);
rf_rx_pm_freqshift_cw_setf(freqshift_cw);
rf_rx_pm_in_sel_setf(insel);
rf_rx_pm_en_setf(1);
wait_us(100);
iqacc_i = rf_rx_pm_iqacc_i_getf(); // 25BIT
iqacc_q = rf_rx_pm_iqacc_q_getf(); // 25BIT
iqacc_i = iqacc_i << 7 >> 7;
iqacc_q = iqacc_q << 7 >> 7;
if (raw_acc_i) {
*raw_acc_i = iqacc_i;
}
if (raw_acc_q) {
*raw_acc_q = iqacc_q;
}
iqacc_i = iqacc_i >> rshift;
iqacc_q = iqacc_q >> rshift;
pwr64 = (int64_t)iqacc_i*(int64_t)iqacc_i + (int64_t)iqacc_q*(int64_t)iqacc_q;
pwr_hi = (uint32_t)(pwr64 >> 32);
pwr_lo = (uint32_t)(pwr64 & 0xffffffff);
if (pwr_hi != 0) {
printf(prefix "overflow occurred\r\n");
}
return pwr_lo;
}
void rfc_pm_stop()
{
rf_rx_pm_en_setf(0);
rf_rx_pm_freqshift_en_setf(0);
}
/*
* HWCTRL DECLARATIONS
****************************************************************************************
*/
void rfc_hwctrl_txrfgain(uint8_t hwctrl_on)
{
rf_tx_gain_ctrl_hw_setf(hwctrl_on);
}
void rfc_hwctrl_rxgain(uint8_t hwctrl_on)
{
rf_rx_gain_ctrl_hw_setf(hwctrl_on);
}
void rfc_hwctrl_txdvga(uint8_t hwctrl_on)
{
rf_tx_dvga_gain_ctrl_hw_setf(hwctrl_on);
}
void rfc_hwctrl_calparam(uint8_t hwctrl_on)
{
rf_trxcal_ctrl_hw_setf(hwctrl_on);
}
void rfc_fsm_force(uint8_t state)
{
if (state == RFC_FSM_FORCE_OFF) {
rf_fsm_st_dbg_en_setf(0);
}
else {
rf_fsm_st_dbg_setf(state); wait_us(20);
rf_fsm_st_dbg_en_setf(1);
}
}
void rfc_coex_force_to(uint32_t force_enable, uint32_t bbmode)
{
// reset rf_fsm, fpga_fsm, state_cci
// fpga_rf_fsm_en_setf(0);
rf_fsm_ctrl_en_setf(0);
wait_us(10);
// force coex
rf_bbmode_4s_setf(bbmode);
rf_bbmode_4s_en_setf(force_enable ? 1 : 0);
wait_us(10);
// start fsm
// fpga_rf_fsm_en_setf(1);
rf_fsm_ctrl_en_setf(1);
}
void rfc_config_power(uint32_t mode,uint32_t tbb_boost,uint32_t tbb,uint32_t tmx)
{
_set_rfc_powercontrol(mode);
rf_gc_tbb_boost_setf(tbb_boost);
rf_gc_tbb_setf(tbb);
rf_gc_tmx_setf(tmx);
}
void rfc_config_bandwidth(uint32_t mode)
{
if (mode == RFC_BW_20M) {
// dac
rfc_write_reg_bits(0x4000e41c,9,9,0); // clkpll_en_div2_480m
// adc
rf_adc_clk_div_sel_setf(1);
rfckg_rxclk_div2_mode_setf(0);
// rbb bw
rf_rbb_bw_setf(2);
// rmxgm
rf_rmxgm_10m_mode_en_setf(0);
}
else if (mode == RFC_BW_10M) {
// dac
rfc_write_reg_bits(0x4000e41c,9,9,1); // clkpll_en_div2_480m
// adc
rf_adc_clk_div_sel_setf(0);
rfckg_rxclk_div2_mode_setf(1);
// rbb bw
rf_rbb_bw_setf(1);
// rmxgm
rf_rmxgm_10m_mode_en_setf(1);
}
}
uint32_t rfc_get_power_level(uint32_t formatmod, int32_t power)
{
uint32_t power_level;
#ifdef RF_PRIVATE_PRESENT
if (formatmod == RFC_FORMATMOD_11B) {
power_level = rf_pri_get_txgain_index(power,E_RF_MODE_11B);
}
else if (formatmod == RFC_FORMATMOD_11G) {
power_level = rf_pri_get_txgain_index(power,E_RF_MODE_11G);
}
else {
power_level = rf_pri_get_txgain_index(power,E_RF_MODE_11N);
}
#else
return 0;
#endif
return (power_level << 2);
}
struct rfc_test_tag {
/** test read 1 */
uint32_t pkdet_out_raw : 1; //[0]
uint32_t dig_xtal_clk_dbg : 1; //[1]
uint32_t clk_ble_16m_dbg : 1; //[2]
uint32_t clk_rc_dbg0 : 1; //[3]
uint32_t clk_adcpow_dbg : 1; //[4]
uint32_t clk_fetx_dbg : 1; //[5]
uint32_t clk_ferx_dbg : 1; //[6]
uint32_t clkpll_postdiv_outclk_dbg: 1; //[7]
uint32_t clk_soc_480m_dbg : 1; //[8]
uint32_t clk_soc_240m_dbg : 1; //[9]
uint32_t clk_soc_192m_dbg : 1; //[10]
uint32_t clk_soc_160m_dbg : 1; //[11]
uint32_t clk_soc_120m_dbg : 1; //[12]
uint32_t clk_soc_96m_dbg : 1; //[13]
uint32_t clk_soc_80m_dbg : 1; //[14]
uint32_t clk_soc_48m_dbg : 1; //[15]
uint32_t clk_soc_32m_dbg : 1; //[16]
uint32_t pad_pkdet_out : 1; //[17]
uint32_t pad_agc_ctrl :10; //[27:18]
uint32_t rf_pkdet_rst_hw : 1; //[28]
uint32_t rf_cbw_wifi : 2; //[30:29]
uint32_t lo_unlocked : 1; //[31]
/** test read 2 */
uint32_t fsm_pu_txbuf : 1; //[0]
uint32_t fsm_pu_rxbuf : 1; //[1]
uint32_t fsm_pu_tosdac : 1; //[2]
uint32_t fsm_pu_dac : 1; //[3]
uint32_t fsm_trsw_en : 1; //[4]
uint32_t fsm_pu_adc : 1; //[5]
uint32_t fsm_pu_pkdet : 1; //[6]
uint32_t fsm_pu_rbb : 1; //[7]
uint32_t fsm_pu_rmx : 1; //[8]
uint32_t fsm_pu_rmxgm : 1; //[9]
uint32_t fsm_pu_lna : 1; //[10]
uint32_t clk_rc_dbg2 : 1; //[11]
uint32_t rf_lna_ind_hw : 4; //[15:12]
uint32_t rf_rbb_ind_hw : 4; //[19:16]
uint32_t rf_tx_pow_lvl_hw : 4; //[23:20]
uint32_t rf_rc_lo_rdy : 1; //[24]
uint32_t rf_fsm_state : 3; //[27:25]
uint32_t rf_rc_state : 3; //[30:28]
uint32_t clk_rc_dbg : 1; //[31]
};
void rfc_dump()
{
struct rfc_test_tag *p_test_read;
uint32_t test_read[2];
static char* rc_state_str[8] = {
"RC_IDLE",
"RC_RX2ON",
"RC_TX2ON",
"RC_RXON",
"RC_TX2PAON",
"RC_TXPAON",
"UNKNOWN",
"UNKNOWN"
};
static char* rf_state_str[8] = {
"RF_PD",
"RF_SB",
"RF_LO",
"RF_RX",
"RF_TX",
"RF_T2RI",
"RF_R2T",
"RF_MS"
};
rf_test_sel_setf(1);
test_read[0] = rf_test_read_getf();
rf_test_sel_setf(2);
test_read[1] = rf_test_read_getf();
p_test_read = (struct rfc_test_tag*)test_read;
printf("******************************** [RFC DUMP START] *****************************\r\n");
printf(" rc_state : %s\r\n", rc_state_str[p_test_read->rf_rc_state]);
printf(" rf_state : %s\r\n", rf_state_str[p_test_read->rf_fsm_state]);
printf(" fsm_pu_lna : %d\r\n", p_test_read->fsm_pu_lna );
printf(" fsm_pu_rmxgm : %d\r\n", p_test_read->fsm_pu_rmxgm );
printf(" fsm_pu_rmx : %d\r\n", p_test_read->fsm_pu_rmx );
printf(" fsm_pu_rbb : %d\r\n", p_test_read->fsm_pu_rbb );
printf(" fsm_pu_pkdet : %d\r\n", p_test_read->fsm_pu_pkdet );
printf(" fsm_pu_adc : %d\r\n", p_test_read->fsm_pu_adc );
printf(" fsm_trsw_en : %d\r\n", p_test_read->fsm_trsw_en );
printf(" fsm_pu_dac : %d\r\n", p_test_read->fsm_pu_dac );
printf(" fsm_pu_tosdac : %d\r\n", p_test_read->fsm_pu_tosdac);
printf(" fsm_pu_rxbuf : %d\r\n", p_test_read->fsm_pu_rxbuf );
printf(" fsm_pu_txbuf : %d\r\n", p_test_read->fsm_pu_txbuf );
printf("\r\n\r\n");
printf(" tx_gain_ctrl_hw : %ld\r\n", rf_tx_gain_ctrl_hw_getf());
printf(" rx_gain_ctrl_hw : %ld\r\n", rf_rx_gain_ctrl_hw_getf());
printf(" trxcal_ctrl_hw : %ld\r\n", rf_trxcal_ctrl_hw_getf());
printf(" lo_ctrl_hw : %ld\r\n", rf_lo_ctrl_hw_getf());
printf(" lna_ctrl_hw : %ld\r\n", rf_lna_ctrl_hw_getf());
printf(" pu_ctrl_hw : %ld\r\n", rf_pu_ctrl_hw_getf());
printf("\r\n\r\n");
printf(" rf_lo_vco_freq_cw_hw : %ld\r\n", rf_lo_vco_freq_cw_hw_getf());
printf(" rf_lo_vco_idac_cw_hw : %ld\r\n", rf_lo_vco_idac_cw_hw_getf());
printf(" rf_lo_sdmin_hw : %ld\r\n", rf_lo_sdmin_hw_getf());
printf(" rf_ch_ind_wifi : %ld\r\n", rf_ch_ind_wifi_getf());
if (rf_lo_unlocked_getf()) {
printf("rf_lo_unlocked_getf = 1\r\n");
printf("rf_lo_unlocked_getf (after csd reset) = ");
for (int i = 0; i < 8; i++) {
rf_lo_pfd_rst_csd_setf(1);
wait_us(10);
rf_lo_pfd_rst_csd_setf(0);
wait_us(10);
printf("%ld", rf_lo_unlocked_getf());
}
printf("\r\n");
}
else {
printf("rf_lo_unlocked_getf = 0\r\n");
}
printf("******************************** [RFC DUMP END] *****************************\r\n");
}
|
mkroman/bl602-604
|
components/hal_drv/bl602_hal/bl_sys.c
|
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <bl602_romdriver.h>
#include <bl602_glb.h>
#include <stdio.h>
#include "bl_sys.h"
int bl_sys_reset_por(void)
{
RomDriver_GLB_SW_POR_Reset();
return 0;
}
int bl_sys_isxipaddr(uint32_t addr)
{
if (((addr & 0xFF000000) == 0x23000000) || ((addr & 0xFF000000) == 0x43000000)) {
return 1;
}
return 0;
}
int bl_sys_em_config(void)
{
extern uint8_t __LD_CONFIG_EM_SEL;
uint32_t em_size;
em_size = (uint32_t)&__LD_CONFIG_EM_SEL;
switch (em_size) {
case 0 * 1024:
{
GLB_Set_EM_Sel(GLB_EM_0KB);
}
break;
case 8 * 1024:
{
GLB_Set_EM_Sel(GLB_EM_8KB);
}
break;
case 16 * 1024:
{
GLB_Set_EM_Sel(GLB_EM_16KB);
}
break;
default:
{
/*nothing here*/
}
}
return 0;
}
int bl_sys_early_init(void)
{
/*debuger may NOT ready don't print anything*/
return 0;
}
int bl_sys_init(void)
{
bl_sys_em_config();
return 0;
}
|
mkroman/bl602-604
|
components/network/ble/blestack/src/common/log.h
|
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @file
* @brief Bluetooth subsystem logging helpers.
*/
/*
* Copyright (c) 2017 Nordic Semiconductor ASA
* Copyright (c) 2015-2016 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef __BT_LOG_H
#define __BT_LOG_H
#include <zephyr.h>
#include <bluetooth.h>
#include <hci_host.h>
#if defined(BL70X)
#include "bl_print.h"
#endif
#include "FreeRTOS.h"
#include "task.h"
#include "FreeRTOSConfig.h"
#ifdef __cplusplus
extern "C" {
#endif
#if !defined(BT_DBG_ENABLED)
#define BT_DBG_ENABLED 1
#endif
#if BT_DBG_ENABLED
#define LOG_LEVEL LOG_LEVEL_DBG
#else
#define LOG_LEVEL CONFIG_BT_LOG_LEVEL
#endif
//LOG_MODULE_REGISTER(LOG_MODULE_NAME, LOG_LEVEL);
#if defined(BFLB_BLE)
//#if defined(CFG_BLE_STACK_DBG_PRINT)
#define BT_DBG(fmt, ...)
#if defined(BL70X)
#define BT_ERR(fmt, ...) bl_print(SYSTEM_UART_ID, PRINT_MODULE_BLE_STACK, fmt"\r\n", ##__VA_ARGS__)
#elif defined(BL602) || defined(BL702)
#define BT_ERR(fmt, ...) printf(fmt"\r\n", ##__VA_ARGS__)
#if defined(CONFIG_BT_STACK_PTS)
#define BT_STACK_PTS_DBG(fmt, ...) printf(fmt"\r\n", ##__VA_ARGS__)
#endif
//#endif
#define BT_WARN(fmt, ...)
#define BT_INFO(fmt, ...)
#else
#define BT_DBG(fmt, ...)
#define BT_ERR(fmt, ...)
#define BT_WARN(fmt, ...)
#define BT_INFO(fmt, ...)
#endif /*CFG_BLE_STACK_DBG_PRINT*/
#if defined(CONFIG_BT_STACK_PTS)
#define BT_STACK_PTS_SDBG(str, len, reversal) \
{ \
BT_STACK_PTS_DBG("uuid = ["); \
u8_t i = 0; \
for(i=0;i<len;i++){ \
if(reversal) \
BT_STACK_PTS_DBG("%02x", str[len-1-i]); \
else \
BT_STACK_PTS_DBG("%02x", str[i]); \
} \
BT_STACK_PTS_DBG("]\r\n");\
}
#endif
#else
#define BT_DBG(fmt, ...) LOG_DBG(fmt, ##__VA_ARGS__)
#define BT_ERR(fmt, ...) LOG_ERR(fmt, ##__VA_ARGS__)
#define BT_WARN(fmt, ...) LOG_WRN(fmt, ##__VA_ARGS__)
#define BT_INFO(fmt, ...) LOG_INF(fmt, ##__VA_ARGS__)
#if defined(CONFIG_BT_ASSERT_VERBOSE)
#define BT_ASSERT_PRINT(fmt, ...) printk(fmt, ##__VA_ARGS__)
#else
#define BT_ASSERT_PRINT(fmt, ...)
#endif /* CONFIG_BT_ASSERT_VERBOSE */
#if defined(CONFIG_BT_ASSERT_PANIC)
#define BT_ASSERT_DIE k_panic
#else
#define BT_ASSERT_DIE k_oops
#endif /* CONFIG_BT_ASSERT_PANIC */
#endif /*BFLB_BLE*/
#if defined(CONFIG_BT_ASSERT)
#if defined(BFLB_BLE)
extern void user_vAssertCalled(void);
#define BT_ASSERT(cond) if( ( cond ) == 0 ) user_vAssertCalled()
#else
#define BT_ASSERT(cond) if (!(cond)) { \
BT_ASSERT_PRINT("assert: '" #cond \
"' failed\n"); \
BT_ASSERT_DIE(); \
}
#endif/*BFLB_BLE*/
#else
#if defined(BFLB_BLE)
#define BT_ASSERT(cond)
#else
#define BT_ASSERT(cond) __ASSERT_NO_MSG(cond)
#endif /*BFLB_BLE*/
#endif/* CONFIG_BT_ASSERT*/
#define BT_HEXDUMP_DBG(_data, _length, _str) \
LOG_HEXDUMP_DBG((const u8_t *)_data, _length, _str)
#if defined(BFLB_BLE)
static inline char *log_strdup(const char *str)
{
return (char *)str;
}
#endif
/* NOTE: These helper functions always encodes into the same buffer storage.
* It is the responsibility of the user of this function to copy the information
* in this string if needed.
*/
const char *bt_hex_real(const void *buf, size_t len);
const char *bt_addr_str_real(const bt_addr_t *addr);
const char *bt_addr_le_str_real(const bt_addr_le_t *addr);
/* NOTE: log_strdup does not guarantee a duplication of the string.
* It is therefore still the responsibility of the user to handle the
* restrictions in the underlying function call.
*/
#define bt_hex(buf, len) log_strdup(bt_hex_real(buf, len))
#define bt_addr_str(addr) log_strdup(bt_addr_str_real(addr))
#define bt_addr_le_str(addr) log_strdup(bt_addr_le_str_real(addr))
#ifdef __cplusplus
}
#endif
#endif /* __BT_LOG_H */
|
mkroman/bl602-604
|
components/network/ble/blestack/src/include/bluetooth/addr.h
|
<reponame>mkroman/bl602-604<filename>components/network/ble/blestack/src/include/bluetooth/addr.h
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @file
* @brief Bluetooth device address definitions and utilities.
*/
/*
* Copyright (c) 2019 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_INCLUDE_BLUETOOTH_ADDR_H_
#define ZEPHYR_INCLUDE_BLUETOOTH_ADDR_H_
#include <zephyr/types.h>
#ifdef __cplusplus
extern "C" {
#endif
#define BT_ADDR_LE_PUBLIC 0x00
#define BT_ADDR_LE_RANDOM 0x01
#define BT_ADDR_LE_PUBLIC_ID 0x02
#define BT_ADDR_LE_RANDOM_ID 0x03
#if defined(CONFIG_BT_STACK_PTS)
//for app layer to deliver the address type:non rpa ,rpa
#define BT_ADDR_TYPE_NON_RPA 0x01
#define BT_ADDR_TYPE_RPA 0x02
#endif
/** Bluetooth Device Address */
typedef struct {
u8_t val[6];
} bt_addr_t;
/** Bluetooth LE Device Address */
typedef struct {
u8_t type;
bt_addr_t a;
} bt_addr_le_t;
#define BT_ADDR_ANY (&(bt_addr_t) { { 0, 0, 0, 0, 0, 0 } })
#define BT_ADDR_NONE (&(bt_addr_t) { \
{ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff } })
#define BT_ADDR_LE_ANY (&(bt_addr_le_t) { 0, { { 0, 0, 0, 0, 0, 0 } } })
#define BT_ADDR_LE_NONE (&(bt_addr_le_t) { 0, \
{ { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff } } })
static inline int bt_addr_cmp(const bt_addr_t *a, const bt_addr_t *b)
{
return memcmp(a, b, sizeof(*a));
}
static inline int bt_addr_le_cmp(const bt_addr_le_t *a, const bt_addr_le_t *b)
{
return memcmp(a, b, sizeof(*a));
}
static inline void bt_addr_copy(bt_addr_t *dst, const bt_addr_t *src)
{
memcpy(dst, src, sizeof(*dst));
}
static inline void bt_addr_le_copy(bt_addr_le_t *dst, const bt_addr_le_t *src)
{
memcpy(dst, src, sizeof(*dst));
}
#define BT_ADDR_IS_RPA(a) (((a)->val[5] & 0xc0) == 0x40)
#define BT_ADDR_IS_NRPA(a) (((a)->val[5] & 0xc0) == 0x00)
#define BT_ADDR_IS_STATIC(a) (((a)->val[5] & 0xc0) == 0xc0)
#define BT_ADDR_SET_RPA(a) ((a)->val[5] = (((a)->val[5] & 0x3f) | 0x40))
#define BT_ADDR_SET_NRPA(a) ((a)->val[5] &= 0x3f)
#define BT_ADDR_SET_STATIC(a) ((a)->val[5] |= 0xc0)
int bt_addr_le_create_nrpa(bt_addr_le_t *addr);
int bt_addr_le_create_static(bt_addr_le_t *addr);
static inline bool bt_addr_le_is_rpa(const bt_addr_le_t *addr)
{
if (addr->type != BT_ADDR_LE_RANDOM) {
return false;
}
return BT_ADDR_IS_RPA(&addr->a);
}
static inline bool bt_addr_le_is_identity(const bt_addr_le_t *addr)
{
if (addr->type == BT_ADDR_LE_PUBLIC) {
return true;
}
return BT_ADDR_IS_STATIC(&addr->a);
}
#ifdef __cplusplus
}
#endif
#endif /* ZEPHYR_INCLUDE_BLUETOOTH_ADDR_H_ */
|
mkroman/bl602-604
|
components/network/ble/blestack/src/hci_onchip/hci_internal.h
|
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _HCI_CONTROLLER_H_
#define _HCI_CONTROLLER_H_
#if defined(CONFIG_BT_HCI_ACL_FLOW_CONTROL)
extern s32_t hci_hbuf_total;
extern u32_t hci_hbuf_sent;
extern u32_t hci_hbuf_acked;
extern atomic_t hci_state_mask;
#define HCI_STATE_BIT_RESET 0
#endif
#define HCI_CLASS_EVT_REQUIRED 0
#define HCI_CLASS_EVT_DISCARDABLE 1
#define HCI_CLASS_EVT_CONNECTION 2
#define HCI_CLASS_ACL_DATA 3
#if defined(CONFIG_SOC_FAMILY_NRF5)
#define BT_HCI_VS_HW_PLAT BT_HCI_VS_HW_PLAT_NORDIC
#if defined(CONFIG_SOC_SERIES_NRF51X)
#define BT_HCI_VS_HW_VAR BT_HCI_VS_HW_VAR_NORDIC_NRF51X;
#elif defined(CONFIG_SOC_SERIES_NRF52X)
#define BT_HCI_VS_HW_VAR BT_HCI_VS_HW_VAR_NORDIC_NRF52X;
#endif
#else
#define BT_HCI_VS_HW_PLAT 0
#define BT_HCI_VS_HW_VAR 0
#endif /* CONFIG_SOC_FAMILY_NRF5 */
void hci_init(struct k_poll_signal *signal_host_buf);
struct net_buf *hci_cmd_handle(struct net_buf *cmd);
#if !defined(BFLB_BLE)
void hci_evt_encode(struct radio_pdu_node_rx *node_rx, struct net_buf *buf);
s8_t hci_get_class(struct radio_pdu_node_rx *node_rx);
#if defined(CONFIG_BT_CONN)
int hci_acl_handle(struct net_buf *acl, struct net_buf **evt);
void hci_acl_encode(struct radio_pdu_node_rx *node_rx, struct net_buf *buf);
void hci_num_cmplt_encode(struct net_buf *buf, u16_t handle, u8_t num);
#endif
#endif//!defined(BFLB_BLE)
#endif /* _HCI_CONTROLLER_H_ */
|
mkroman/bl602-604
|
components/network/ble/blestack/src/host/crypto.c
|
<reponame>mkroman/bl602-604
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <string.h>
#include <errno.h>
#include <zephyr.h>
#include <misc/byteorder.h>
#include <bluetooth.h>
#include <hci_host.h>
#include <conn.h>
#include <constants.h>
#include <hmac_prng.h>
#include <aes.h>
#include <utils.h>
#define BT_DBG_ENABLED IS_ENABLED(CONFIG_BT_DEBUG_HCI_CORE)
#define LOG_MODULE_NAME bt_crypto
#include "log.h"
#include "hci_core.h"
static struct tc_hmac_prng_struct prng;
static int prng_reseed(struct tc_hmac_prng_struct *h)
{
u8_t seed[32];
s64_t extra;
int ret, i;
for (i = 0; i < (sizeof(seed) / 8); i++) {
struct bt_hci_rp_le_rand *rp;
struct net_buf *rsp;
ret = bt_hci_cmd_send_sync(BT_HCI_OP_LE_RAND, NULL, &rsp);
if (ret) {
return ret;
}
rp = (void *)rsp->data;
memcpy(&seed[i * 8], rp->rand, 8);
net_buf_unref(rsp);
}
extra = k_uptime_get();
ret = tc_hmac_prng_reseed(h, seed, sizeof(seed), (u8_t *)&extra,
sizeof(extra));
if (ret == TC_CRYPTO_FAIL) {
BT_ERR("Failed to re-seed PRNG");
return -EIO;
}
return 0;
}
int prng_init(void)
{
struct bt_hci_rp_le_rand *rp;
struct net_buf *rsp;
int ret;
/* Check first that HCI_LE_Rand is supported */
if (!BT_CMD_TEST(bt_dev.supported_commands, 27, 7)) {
return -ENOTSUP;
}
ret = bt_hci_cmd_send_sync(BT_HCI_OP_LE_RAND, NULL, &rsp);
if (ret) {
return ret;
}
rp = (void *)rsp->data;
ret = tc_hmac_prng_init(&prng, rp->rand, sizeof(rp->rand));
net_buf_unref(rsp);
if (ret == TC_CRYPTO_FAIL) {
BT_ERR("Failed to initialize PRNG");
return -EIO;
}
/* re-seed is needed after init */
return prng_reseed(&prng);
}
int bt_rand(void *buf, size_t len)
{
int ret;
ret = tc_hmac_prng_generate(buf, len, &prng);
if (ret == TC_HMAC_PRNG_RESEED_REQ) {
ret = prng_reseed(&prng);
if (ret) {
return ret;
}
ret = tc_hmac_prng_generate(buf, len, &prng);
}
if (ret == TC_CRYPTO_SUCCESS) {
return 0;
}
return -EIO;
}
int bt_encrypt_le(const u8_t key[16], const u8_t plaintext[16],
u8_t enc_data[16])
{
struct tc_aes_key_sched_struct s;
u8_t tmp[16];
BT_DBG("key %s", bt_hex(key, 16));
BT_DBG("plaintext %s", bt_hex(plaintext, 16));
sys_memcpy_swap(tmp, key, 16);
if (tc_aes128_set_encrypt_key(&s, tmp) == TC_CRYPTO_FAIL) {
return -EINVAL;
}
sys_memcpy_swap(tmp, plaintext, 16);
if (tc_aes_encrypt(enc_data, tmp, &s) == TC_CRYPTO_FAIL) {
return -EINVAL;
}
sys_mem_swap(enc_data, 16);
BT_DBG("enc_data %s", bt_hex(enc_data, 16));
return 0;
}
int bt_encrypt_be(const u8_t key[16], const u8_t plaintext[16],
u8_t enc_data[16])
{
struct tc_aes_key_sched_struct s;
BT_DBG("key %s", bt_hex(key, 16));
BT_DBG("plaintext %s", bt_hex(plaintext, 16));
if (tc_aes128_set_encrypt_key(&s, key) == TC_CRYPTO_FAIL) {
return -EINVAL;
}
if (tc_aes_encrypt(enc_data, plaintext, &s) == TC_CRYPTO_FAIL) {
return -EINVAL;
}
BT_DBG("enc_data %s", bt_hex(enc_data, 16));
return 0;
}
|
mkroman/bl602-604
|
components/network/ble/blestack/src/include/bluetooth/crypto.h
|
<gh_stars>0
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @file
* @brief Bluetooth subsystem crypto APIs.
*/
/*
* Copyright (c) 2017 Nordic Semiconductor ASA
* Copyright (c) 2015-2017 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_INCLUDE_BLUETOOTH_CRYPTO_H_
#define ZEPHYR_INCLUDE_BLUETOOTH_CRYPTO_H_
/**
* @brief Cryptography
* @defgroup bt_crypto Cryptography
* @ingroup bluetooth
* @{
*/
#include <stdbool.h>
#ifdef __cplusplus
extern "C" {
#endif
/** @brief Generate random data.
*
* A random number generation helper which utilizes the Bluetooth
* controller's own RNG.
*
* @param buf Buffer to insert the random data
* @param len Length of random data to generate
*
* @return Zero on success or error code otherwise, positive in case
* of protocol error or negative (POSIX) in case of stack internal error
*/
int bt_rand(void *buf, size_t len);
/** @brief AES encrypt little-endian data.
*
* An AES encrypt helper is used to request the Bluetooth controller's own
* hardware to encrypt the plaintext using the key and returns the encrypted
* data.
*
* @param key 128 bit LS byte first key for the encryption of the plaintext
* @param plaintext 128 bit LS byte first plaintext data block to be encrypted
* @param enc_data 128 bit LS byte first encrypted data block
*
* @return Zero on success or error code otherwise.
*/
int bt_encrypt_le(const u8_t key[16], const u8_t plaintext[16],
u8_t enc_data[16]);
/** @brief AES encrypt big-endian data.
*
* An AES encrypt helper is used to request the Bluetooth controller's own
* hardware to encrypt the plaintext using the key and returns the encrypted
* data.
*
* @param key 128 bit MS byte first key for the encryption of the plaintext
* @param plaintext 128 bit MS byte first plaintext data block to be encrypted
* @param enc_data 128 bit MS byte first encrypted data block
*
* @return Zero on success or error code otherwise.
*/
int bt_encrypt_be(const u8_t key[16], const u8_t plaintext[16],
u8_t enc_data[16]);
#ifdef __cplusplus
}
#endif
/**
* @}
*/
#endif /* ZEPHYR_INCLUDE_BLUETOOTH_CRYPTO_H_ */
|
mkroman/bl602-604
|
components/network/ble/blestack/src/common/dec.c
|
<reponame>mkroman/bl602-604<filename>components/network/ble/blestack/src/common/dec.c
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <util.h>
u8_t u8_to_dec(char *buf, u8_t buflen, u8_t value)
{
u8_t divisor = 100;
u8_t num_digits = 0;
u8_t digit;
while (buflen > 0 && divisor > 0) {
digit = value / divisor;
if (digit != 0 || divisor == 1 || num_digits != 0) {
*buf = (char)digit + '0';
buf++;
buflen--;
num_digits++;
}
value -= digit * divisor;
divisor /= 10;
}
if (buflen) {
*buf = '\0';
}
return num_digits;
}
|
mkroman/bl602-604
|
components/bl602/bl602_wifi/plf/refip/src/driver/phy/bl602_phy_rf/phy_bl602_cli_api.c
|
<reponame>mkroman/bl602-604
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "phy_bl602_cli.c"
#include <bl602_rf_private.h>
#include <rfc_bl602.h>
#include <bl_phy_api.h>
//export api
//equal cmd_init
void bl_mfg_phy_init()
{
printf("start rf/rc/phy init\r\n");
//40Mhz
rfc_init(40*1000*1000);
phy_mdm_reset();
phy_init(&s_phycfg);
phy_set_channel(PHY_BAND_2G4, PHY_CHNL_BW_20, 0, 2412, 2412, 0);
}
void bl_mfg_rf_cal()
{
//alway reset for full calibration flow running
rf_pri_init(1);
}
//equal cmd_rx_start_at
void bl_mfg_rx_start()
{
// reset
phy_mdm_reset();
phy_macbyp_reset();
// clear
phy_macbyp_clr_status();
// start
phy_macbyp_rx_start();
printf("at_rx_start ok\r\n");
}
void bl_mfg_rx_stop()
{
printf("at_rx_poll ok\r\n");
phy_macbyp_rx_print_status_at();
phy_macbyp_reset();
}
void bl_mfg_channel_switch(uint8_t chan_no)
{
static const uint32_t no_to_chanfreq_table[14] = {2412, 2417, 2422, 2427,
2432, 2437, 2442, 2447,
2452, 2457, 2462, 2467,
2472, 2484};
uint32_t chanfreq = no_to_chanfreq_table[chan_no];
printf("switch channel to %ld MHz\r\n",chanfreq);
rfc_config_channel(chanfreq);
// phy_set_channel(PHY_BAND_2G4, PHY_CHNL_BW_20, 0, chanfreq, chanfreq, 0);
}
int8_t bl_mfg_tx11n_start(uint8_t mcs_n, uint16_t frame_len, uint8_t pwr_dbm)
{
int32_t mcs = mcs_n;
int32_t payload_len = frame_len;
int32_t filter_sel = 0;
int32_t diggain = 32;
int32_t dvga = 0;
int32_t ifs_us = 100;
if (mcs < 0 || mcs > 7) {
printf("mcs error\r\n");
return -1;
}
if (frame_len == 0) {
printf("frame_len error\r\n");
return -1;
}
pwr_dbm = pwr_dbm * 10;
// configure txcfg
txcfg_reset(&s_txcfg);
s_txcfg.macbyp_mode = MACBYP_TX_BURST;
s_txcfg.macbyp_nframes_in_burst = 0;
s_txcfg.macbyp_ifs_us = ifs_us;
s_txcfg.formatmod = HT_MM;
s_txcfg.ht_mcs = s_rate_table_11n[mcs];
s_txcfg.ht_length = payload_len;
s_txcfg.fe_ofdm_filter_sel = filter_sel ? 0xff00 : 0x0000;
s_txcfg.fe_ofdm_gain = diggain;
s_txcfg.fe_dvga_qdb = dvga;
s_txcfg.pwrlevel = rfc_get_power_level(RFC_FORMATMOD_11N, pwr_dbm);
// reset
tx_stop();
phy_mdm_reset();
phy_macbyp_reset();
// configure and start transmit
phy_start_transmit(&s_txcfg);
return 0;
}
int8_t bl_mfg_tx11b_start(uint8_t mcs_b, uint16_t frame_len, uint8_t pwr_dbm)
{
int32_t mcs = mcs_b;
int32_t payload_len = frame_len;
int32_t filter_sel = 0;
int32_t diggain_dsss = 32;
int32_t dvga = 0;
int32_t ifs_us = 100;
if (mcs < 1 || mcs > 4) {
printf("mcs error\r\n");
return -1;
}
if (frame_len == 0) {
printf("frame_len error\r\n");
return -1;
}
pwr_dbm = pwr_dbm * 10;
// configure txcfg
txcfg_reset(&s_txcfg);
s_txcfg.macbyp_mode = MACBYP_TX_BURST;
s_txcfg.macbyp_nframes_in_burst = 0;
s_txcfg.macbyp_ifs_us = ifs_us;
s_txcfg.formatmod = NONHT;
s_txcfg.lm_rate = LM11B_MCS1 + (mcs - 1);
s_txcfg.lm_length = payload_len;
s_txcfg.fe_dsss_filter_sel = filter_sel;
s_txcfg.fe_dsss_gain = diggain_dsss;
s_txcfg.fe_dvga_qdb = dvga;
s_txcfg.pwrlevel = rfc_get_power_level(RFC_FORMATMOD_11B, pwr_dbm);
// reset
tx_stop();
phy_macbyp_reset();
phy_mdm_reset();
// configure and start transmit
phy_start_transmit(&s_txcfg);
return 0;
}
void bl_mfg_tx_stop()
{
tx_stop();
}
|
mkroman/bl602-604
|
components/network/ble/blestack/src/host/smp_null.c
|
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/**
* @file smp_null.c
* Security Manager Protocol stub
*/
/*
* Copyright (c) 2015-2016 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr.h>
#include <errno.h>
#include <atomic.h>
#include <misc/util.h>
#include <bluetooth.h>
#include <conn.h>
#include <../include/bluetooth/buf.h>
#define BT_DBG_ENABLED IS_ENABLED(CONFIG_BT_DEBUG_HCI_CORE)
#define LOG_MODULE_NAME bt_smp
#include "log.h"
#include "hci_core.h"
#include "conn_internal.h"
#include "l2cap_internal.h"
#include "smp.h"
static struct bt_l2cap_le_chan bt_smp_pool[CONFIG_BT_MAX_CONN];
int bt_smp_sign_verify(struct bt_conn *conn, struct net_buf *buf)
{
return -ENOTSUP;
}
int bt_smp_sign(struct bt_conn *conn, struct net_buf *buf)
{
return -ENOTSUP;
}
static int bt_smp_recv(struct bt_l2cap_chan *chan, struct net_buf *buf)
{
struct bt_conn *conn = chan->conn;
struct bt_smp_pairing_fail *rsp;
struct bt_smp_hdr *hdr;
/* If a device does not support pairing then it shall respond with
* a Pairing Failed command with the reason set to "Pairing Not
* Supported" when any command is received.
* Core Specification Vol. 3, Part H, 3.3
*/
buf = bt_l2cap_create_pdu(NULL, 0);
/* NULL is not a possible return due to K_FOREVER */
hdr = net_buf_add(buf, sizeof(*hdr));
hdr->code = BT_SMP_CMD_PAIRING_FAIL;
rsp = net_buf_add(buf, sizeof(*rsp));
rsp->reason = BT_SMP_ERR_PAIRING_NOTSUPP;
bt_l2cap_send(conn, BT_L2CAP_CID_SMP, buf);
return 0;
}
static int bt_smp_accept(struct bt_conn *conn, struct bt_l2cap_chan **chan)
{
int i;
static struct bt_l2cap_chan_ops ops = {
.recv = bt_smp_recv,
};
BT_DBG("conn %p handle %u", conn, conn->handle);
for (i = 0; i < ARRAY_SIZE(bt_smp_pool); i++) {
struct bt_l2cap_le_chan *smp = &bt_smp_pool[i];
if (smp->chan.conn) {
continue;
}
smp->chan.ops = &ops;
*chan = &smp->chan;
return 0;
}
BT_ERR("No available SMP context for conn %p", conn);
return -ENOMEM;
}
BT_L2CAP_CHANNEL_DEFINE(smp_fixed_chan, BT_L2CAP_CID_SMP, bt_smp_accept);
int bt_smp_init(void)
{
return 0;
}
|
mkroman/bl602-604
|
components/network/ble/blestack/src/include/bluetooth/att.h
|
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @file
* @brief Attribute Protocol handling.
*/
/*
* Copyright (c) 2016 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_INCLUDE_BLUETOOTH_ATT_H_
#define ZEPHYR_INCLUDE_BLUETOOTH_ATT_H_
#ifdef __cplusplus
extern "C" {
#endif
#include <misc/slist.h>
/* Error codes for Error response PDU */
#define BT_ATT_ERR_INVALID_HANDLE 0x01
#define BT_ATT_ERR_READ_NOT_PERMITTED 0x02
#define BT_ATT_ERR_WRITE_NOT_PERMITTED 0x03
#define BT_ATT_ERR_INVALID_PDU 0x04
#define BT_ATT_ERR_AUTHENTICATION 0x05
#define BT_ATT_ERR_NOT_SUPPORTED 0x06
#define BT_ATT_ERR_INVALID_OFFSET 0x07
#define BT_ATT_ERR_AUTHORIZATION 0x08
#define BT_ATT_ERR_PREPARE_QUEUE_FULL 0x09
#define BT_ATT_ERR_ATTRIBUTE_NOT_FOUND 0x0a
#define BT_ATT_ERR_ATTRIBUTE_NOT_LONG 0x0b
#define BT_ATT_ERR_ENCRYPTION_KEY_SIZE 0x0c
#define BT_ATT_ERR_INVALID_ATTRIBUTE_LEN 0x0d
#define BT_ATT_ERR_UNLIKELY 0x0e
#define BT_ATT_ERR_INSUFFICIENT_ENCRYPTION 0x0f
#define BT_ATT_ERR_UNSUPPORTED_GROUP_TYPE 0x10
#define BT_ATT_ERR_INSUFFICIENT_RESOURCES 0x11
#define BT_ATT_ERR_DB_OUT_OF_SYNC 0x12
#define BT_ATT_ERR_VALUE_NOT_ALLOWED 0x13
/* Common Profile Error Codes (from CSS) */
#define BT_ATT_ERR_WRITE_REQ_REJECTED 0xfc
#define BT_ATT_ERR_CCC_IMPROPER_CONF 0xfd
#define BT_ATT_ERR_PROCEDURE_IN_PROGRESS 0xfe
#define BT_ATT_ERR_OUT_OF_RANGE 0xff
typedef void (*bt_att_func_t)(struct bt_conn *conn, u8_t err,
const void *pdu, u16_t length,
void *user_data);
typedef void (*bt_att_destroy_t)(void *user_data);
/* ATT request context */
struct bt_att_req {
sys_snode_t node;
bt_att_func_t func;
bt_att_destroy_t destroy;
struct net_buf_simple_state state;
struct net_buf *buf;
#if defined(CONFIG_BT_SMP)
bool retrying;
#endif /* CONFIG_BT_SMP */
};
#ifdef __cplusplus
}
#endif
#endif /* ZEPHYR_INCLUDE_BLUETOOTH_ATT_H_ */
|
mkroman/bl602-604
|
components/network/lwip/lwip-port/config/lwipopts.h
|
#ifndef __LWIPOPTS_H__
#define __LWIPOPTS_H__
/**
* SYS_LIGHTWEIGHT_PROT==1: if you want inter-task protection for certain
* critical regions during buffer allocation, deallocation and memory
* allocation and deallocation.
*/
#define SYS_LIGHTWEIGHT_PROT 1
#define LWIP_NETIF_HOSTNAME 1
#define ETHARP_TRUST_IP_MAC 0
#define IP_REASSEMBLY 0
#define IP_FRAG 0
#define ARP_QUEUEING 0
#define LWIP_NETIF_API 1
/**
* NO_SYS==1: Provides VERY minimal functionality. Otherwise,
* use lwIP facilities.
*/
#define NO_SYS 0
#define LWIP_TIMEVAL_PRIVATE 0
/**
* LWIP_TCPIP_CORE_LOCKING_INPUT: when LWIP_TCPIP_CORE_LOCKING is enabled,
* this lets tcpip_input() grab the mutex for input packets as well,
* instead of allocating a message and passing it to tcpip_thread.
*
* ATTENTION: this does not work when tcpip_input() is called from
* interrupt context!
*/
#define LWIP_TCPIP_CORE_LOCKING_INPUT 1
/* ---------- Memory options ---------- */
/* MEM_ALIGNMENT: should be set to the alignment of the CPU for which
lwIP is compiled. 4 byte alignment -> define MEM_ALIGNMENT to 4, 2
byte alignment -> define MEM_ALIGNMENT to 2. */
#define MEM_ALIGNMENT 4
/* MEM_SIZE: the size of the heap memory. If the application will send
a lot of data that needs to be copied, this should be set high. */
#define MEM_SIZE (8*1024)
/* MEMP_NUM_PBUF: the number of memp struct pbufs. If the application
sends a lot of data out of ROM (or other static memory), this
should be set high. */
#define MEMP_NUM_PBUF 26
/* MEMP_NUM_UDP_PCB: the number of UDP protocol control blocks. One
per active UDP "connection". */
#define MEMP_NUM_UDP_PCB 6
/* MEMP_NUM_TCP_PCB: the number of simulatenously active TCP
connections. */
#define MEMP_NUM_TCP_PCB 10
/* MEMP_NUM_TCP_PCB_LISTEN: the number of listening TCP
connections. */
#define MEMP_NUM_TCP_PCB_LISTEN 5
/* MEMP_NUM_TCP_SEG: the number of simultaneously queued TCP
segments. */
#define MEMP_NUM_TCP_SEG 32
#define MEMP_NUM_NETCONN (MEMP_NUM_TCP_PCB + MEMP_NUM_UDP_PCB + MEMP_NUM_TCP_PCB_LISTEN)
/* ---------- Pbuf options ---------- */
/* PBUF_POOL_SIZE: the number of buffers in the pbuf pool. */
#define PBUF_POOL_SIZE 0
/* PBUF_POOL_BUFSIZE: the size of each pbuf in the pbuf pool. */
#define PBUF_POOL_BUFSIZE 760
/* ---------- TCP options ---------- */
#define LWIP_TCP 1
#define TCP_TTL 255
/* Controls if TCP should queue segments that arrive out of
order. Define to 0 if your device is low on memory. */
#define TCP_QUEUE_OOSEQ 1
/* TCP Maximum segment size. */
//#define TCP_MSS (1500 - 40) /* TCP_MSS = (Ethernet MTU - IP header size - TCP header size) */
//#define TCP_MSS (1500 - 80) /* TCP_MSS = (Ethernet MTU - IP header size - TCP header size) */
#define TCP_MSS (800 - 40 - 80 + 8) /* TCP_MSS = (Ethernet MTU - IP header size - TCP header size) */
/* TCP sender buffer space (bytes). */
#define TCP_SND_BUF (8*TCP_MSS)
/* TCP_SND_QUEUELEN: TCP sender buffer space (pbufs). This must be at least
as much as (2 * TCP_SND_BUF/TCP_MSS) for things to work. */
#define TCP_SND_QUEUELEN ((2 * (TCP_SND_BUF) + (TCP_MSS - 1))/(TCP_MSS))
#define MEMP_NUM_TCPIP_MSG_INPKT (32)
/**
* TCP_SNDQUEUELOWAT: TCP writable bufs (pbuf count). This must be less
* than TCP_SND_QUEUELEN. If the number of pbufs queued on a pcb drops below
* this number, select returns writable (combined with TCP_SNDLOWAT).
*/
#define TCP_SNDQUEUELOWAT ((TCP_SND_QUEUELEN)/2)
/* TCP receive window. */
#define TCP_WND (3*TCP_MSS)
/**
* TCP_WND_UPDATE_THRESHOLD: difference in window to trigger an
* explicit window update
*/
#define TCP_WND_UPDATE_THRESHOLD LWIP_MIN((TCP_WND / 2), (TCP_MSS * 6))
/**
* LWIP_SO_SNDTIMEO==1: Enable send timeout for sockets/netconns and
* SO_SNDTIMEO processing.
*/
#define LWIP_SO_SNDTIMEO 1
/**
* LWIP_SO_RCVTIMEO==1: Enable receive timeout for sockets/netconns and
* SO_RCVTIMEO processing.
*/
#define LWIP_SO_RCVTIMEO 1
/* ---------- ICMP options ---------- */
#define LWIP_ICMP 1
/* ---------- DHCP options ---------- */
/* Define LWIP_DHCP to 1 if you want DHCP configuration of
interfaces. DHCP is not implemented in lwIP 0.5.1, however, so
turning this on does currently not work. */
#define LWIP_DHCP 1
/* ---------- UDP options ---------- */
#define LWIP_UDP 1
#define UDP_TTL 255
/* ---------- Statistics options ---------- */
#define LWIP_STATS 0
#define LWIP_PROVIDE_ERRNO 1
/* ---------- link callback options ---------- */
/* LWIP_NETIF_LINK_CALLBACK==1: Support a callback function from an interface
* whenever the link changes (i.e., link down)
*/
#define LWIP_NETIF_LINK_CALLBACK 1
/*
--------------------------------------
---------- Checksum options ----------
--------------------------------------
*/
#define LWIP_CHECKSUM_ON_COPY 1
#define LWIP_NETIF_TX_SINGLE_PBUF 1
#ifdef CHECKSUM_BY_HARDWARE
/* CHECKSUM_GEN_IP==0: Generate checksums by hardware for outgoing IP packets.*/
#define CHECKSUM_GEN_IP 0
/* CHECKSUM_GEN_UDP==0: Generate checksums by hardware for outgoing UDP packets.*/
#define CHECKSUM_GEN_UDP 0
/* CHECKSUM_GEN_TCP==0: Generate checksums by hardware for outgoing TCP packets.*/
#define CHECKSUM_GEN_TCP 0
/* CHECKSUM_CHECK_IP==0: Check checksums by hardware for incoming IP packets.*/
#define CHECKSUM_CHECK_IP 0
/* CHECKSUM_CHECK_UDP==0: Check checksums by hardware for incoming UDP packets.*/
#define CHECKSUM_CHECK_UDP 0
/* CHECKSUM_CHECK_TCP==0: Check checksums by hardware for incoming TCP packets.*/
#define CHECKSUM_CHECK_TCP 0
/* CHECKSUM_CHECK_ICMP==0: Check checksums by hardware for incoming ICMP packets.*/
#define CHECKSUM_GEN_ICMP 0
#else
/* CHECKSUM_GEN_IP==1: Generate checksums in software for outgoing IP packets.*/
#define CHECKSUM_GEN_IP 1
/* CHECKSUM_GEN_UDP==1: Generate checksums in software for outgoing UDP packets.*/
#define CHECKSUM_GEN_UDP 1
/* CHECKSUM_GEN_TCP==1: Generate checksums in software for outgoing TCP packets.*/
#define CHECKSUM_GEN_TCP 1
/* CHECKSUM_CHECK_IP==1: Check checksums in software for incoming IP packets.*/
#define CHECKSUM_CHECK_IP 1
/* CHECKSUM_CHECK_UDP==1: Check checksums in software for incoming UDP packets.*/
#define CHECKSUM_CHECK_UDP 1
/* CHECKSUM_CHECK_TCP==1: Check checksums in software for incoming TCP packets.*/
#define CHECKSUM_CHECK_TCP 1
/* CHECKSUM_CHECK_ICMP==1: Check checksums by hardware for incoming ICMP packets.*/
#define CHECKSUM_GEN_ICMP 1
#endif
/*
----------------------------------------------
---------- Sequential layer options ----------
----------------------------------------------
*/
#define LWIP_CHKSUM_ALGORITHM 3
/**
* LWIP_NETCONN==1: Enable Netconn API (require to use api_lib.c)
*/
#define LWIP_NETCONN 1
/*
------------------------------------
---------- Socket options ----------
------------------------------------
*/
/**
* LWIP_SOCKET==1: Enable Socket API (require to use sockets.c)
*/
#define LWIP_SOCKET 1
/*
-----------------------------------
---------- DEBUG options ----------
-----------------------------------
*/
//#define LWIP_DEBUG 0
/*
---------------------------------
---------- OS options ----------
---------------------------------
*/
#define TCPIP_THREAD_NAME "TCP/IP"
#define TCPIP_THREAD_STACKSIZE 1000
#define TCPIP_MBOX_SIZE 50
#define DEFAULT_UDP_RECVMBOX_SIZE 2000
#define DEFAULT_TCP_RECVMBOX_SIZE 2000
#define DEFAULT_ACCEPTMBOX_SIZE 2000
#define DEFAULT_THREAD_STACKSIZE 500
#define TCPIP_THREAD_PRIO (configMAX_PRIORITIES - 3)
#define LWIP_COMPAT_MUTEX 0
#define LWIP_TCPIP_CORE_LOCKING 1
#define LWIP_SOCKET_SET_ERRNO 1
#define SO_REUSE 1
#define LWIP_TCP_KEEPALIVE 1
/*Enable Status callback and link callback*/
#define LWIP_NETIF_STATUS_CALLBACK 1
#define LWIP_NETIF_LINK_CALLBACK 1
/*Enable dns*/
#define LWIP_DNS 1
#define LWIP_DNS_SECURE 0
#define MEMP_MEM_MALLOC 0
#define LWIP_SUPPORT_CUSTOM_PBUF 1
#define PBUF_LINK_ENCAPSULATION_HLEN 128u
/*
---------------------------------
---------- MISC. options ----------
---------------------------------
*/
/**
* LWIP_RANDOMIZE_INITIAL_LOCAL_PORTS==1: randomize the local port for the first
* local TCP/UDP pcb (default==0). This can prevent creating predictable port
* numbers after booting a device.
*/
extern int bl_rand();
#define LWIP_RANDOMIZE_INITIAL_LOCAL_PORTS 1
#define LWIP_RAND() ((u32_t)bl_rand())
#endif /* __LWIPOPTS_H__ */
|
mkroman/bl602-604
|
components/bl602/bl602_std/bl602_std/StdDriver/Inc/bl602_romdriver.h
|
/**
******************************************************************************
* @file bl602_romdriver.h
* @version V1.0
* @date
* @brief This file is the standard driver header file
******************************************************************************
* @attention
*
* <h2><center>© COPYRIGHT(c) 2019 Bouffalo Lab</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
#ifndef __BL602_ROMDRIVER_H__
#define __BL602_ROMDRIVER_H__
#include "bl602_common.h"
#include "bl602_aon.h"
#include "bl602_glb.h"
#include "bl602_hbn.h"
#include "bl602_xip_sflash.h"
#include "bl602_sflash.h"
#include "bl602_sf_ctrl.h"
#include "softcrc.h"
#define ROMAPI_INDEX_SECT_SIZE (0x800)
#define ROMAPI_INDEX_MAX (ROMAPI_INDEX_SECT_SIZE / 4 - 1)
typedef enum {
ROM_API_INDEX_REV = 0,
ROM_API_INDEX_FUNC_START = 4,
ROM_API_INDEX_AON_Power_On_MBG = ROM_API_INDEX_FUNC_START,
ROM_API_INDEX_AON_Power_Off_MBG,
ROM_API_INDEX_AON_Power_On_XTAL,
ROM_API_INDEX_AON_Set_Xtal_CapCode,
ROM_API_INDEX_AON_Power_Off_XTAL,
ROM_API_INDEX_ASM_Delay_Us,
ROM_API_INDEX_BL602_Delay_US,
ROM_API_INDEX_BL602_Delay_MS,
ROM_API_INDEX_BL602_MemCpy,
ROM_API_INDEX_BL602_MemCpy4,
ROM_API_INDEX_BL602_MemCpy_Fast,
ROM_API_INDEX_BL602_MemSet,
ROM_API_INDEX_BL602_MemSet4,
ROM_API_INDEX_BL602_MemCmp,
ROM_API_INDEX_BFLB_Soft_CRC32,
ROM_API_INDEX_GLB_Get_Root_CLK_Sel,
ROM_API_INDEX_GLB_Set_System_CLK_Div,
ROM_API_INDEX_Update_SystemCoreClockWith_XTAL,
ROM_API_INDEX_GLB_Set_System_CLK,
ROM_API_INDEX_System_Core_Clock_Update_From_RC32M,
ROM_API_INDEX_GLB_Set_SF_CLK,
ROM_API_INDEX_GLB_SW_System_Reset,
ROM_API_INDEX_GLB_SW_CPU_Reset,
ROM_API_INDEX_GLB_SW_POR_Reset,
ROM_API_INDEX_GLB_Select_Internal_Flash,
ROM_API_INDEX_GLB_Swap_Flash_Pin,
ROM_API_INDEX_GLB_GPIO_Init,
ROM_API_INDEX_GLB_Deswap_Flash_Pin,
ROM_API_INDEX_GLB_Select_External_Flash,
ROM_API_INDEX_GLB_GPIO_Get_Fun,
ROM_API_INDEX_EF_Ctrl_Busy,
ROM_API_INDEX_EF_Ctrl_Sw_AHB_Clk_0,
ROM_API_INDEX_EF_Ctrl_Load_Efuse_R0,
ROM_API_INDEX_EF_Ctrl_Get_Trim_Parity,
ROM_API_INDEX_EF_Ctrl_Read_RC32K_Trim,
ROM_API_INDEX_EF_Ctrl_Read_RC32M_Trim,
ROM_API_INDEX_PDS_Trim_RC32M,
ROM_API_INDEX_PDS_Select_RC32M_As_PLL_Ref,
ROM_API_INDEX_PDS_Select_XTAL_As_PLL_Ref,
ROM_API_INDEX_PDS_Power_On_PLL,
ROM_API_INDEX_PDS_Enable_PLL_All_Clks,
ROM_API_INDEX_PDS_Disable_PLL_All_Clks,
ROM_API_INDEX_PDS_Enable_PLL_Clk,
ROM_API_INDEX_PDS_Disable_PLL_Clk,
ROM_API_INDEX_PDS_Power_Off_PLL,
ROM_API_INDEX_HBN_Enable,
ROM_API_INDEX_HBN_Reset,
ROM_API_INDEX_HBN_GPIO7_Dbg_Pull_Cfg,
ROM_API_INDEX_HBN_Trim_RC32K,
ROM_API_INDEX_HBN_Set_ROOT_CLK_Sel,
ROM_API_INDEX_XIP_SFlash_State_Save,
ROM_API_INDEX_XIP_SFlash_State_Restore,
ROM_API_INDEX_XIP_SFlash_Erase_Need_Lock,
ROM_API_INDEX_XIP_SFlash_Write_Need_Lock,
ROM_API_INDEX_XIP_SFlash_Read_Need_Lock,
ROM_API_INDEX_XIP_SFlash_GetJedecId_Need_Lock,
ROM_API_INDEX_XIP_SFlash_GetDeviceId_Need_Lock,
ROM_API_INDEX_XIP_SFlash_GetUniqueId_Need_Lock,
ROM_API_INDEX_XIP_SFlash_Read_Via_Cache_Need_Lock,
ROM_API_INDEX_XIP_SFlash_Read_With_Lock,
ROM_API_INDEX_XIP_SFlash_Write_With_Lock,
ROM_API_INDEX_XIP_SFlash_Erase_With_Lock,
ROM_API_INDEX_SFlash_Init,
ROM_API_INDEX_SFlash_SetSPIMode,
ROM_API_INDEX_SFlash_Read_Reg,
ROM_API_INDEX_SFlash_Write_Reg,
ROM_API_INDEX_SFlash_Busy,
ROM_API_INDEX_SFlash_Write_Enable,
ROM_API_INDEX_SFlash_Qspi_Enable,
ROM_API_INDEX_SFlash_Volatile_Reg_Write_Enable,
ROM_API_INDEX_SFlash_Chip_Erase,
ROM_API_INDEX_SFlash_Sector_Erase,
ROM_API_INDEX_SFlash_Blk32_Erase,
ROM_API_INDEX_SFlash_Blk64_Erase,
ROM_API_INDEX_SFlash_Erase,
ROM_API_INDEX_SFlash_Program,
ROM_API_INDEX_SFlash_GetUniqueId,
ROM_API_INDEX_SFlash_GetJedecId,
ROM_API_INDEX_SFlash_GetDeviceId,
ROM_API_INDEX_SFlash_Powerdown,
ROM_API_INDEX_SFlash_Releae_Powerdown,
ROM_API_INDEX_SFlash_SetBurstWrap,
ROM_API_INDEX_SFlash_DisableBurstWrap,
ROM_API_INDEX_SFlash_Software_Reset,
ROM_API_INDEX_SFlash_Reset_Continue_Read,
ROM_API_INDEX_SFlash_Set_IDbus_Cfg,
ROM_API_INDEX_SFlash_IDbus_Read_Enable,
ROM_API_INDEX_SFlash_Cache_Enable_Set,
ROM_API_INDEX_SFlash_Cache_Flush,
ROM_API_INDEX_SFlash_Cache_Read_Enable,
ROM_API_INDEX_SFlash_Cache_Hit_Count_Get,
ROM_API_INDEX_SFlash_Cache_Miss_Count_Get,
ROM_API_INDEX_SFlash_Cache_Read_Disable,
ROM_API_INDEX_SFlash_Read,
ROM_API_INDEX_SF_Ctrl_Enable,
ROM_API_INDEX_SF_Ctrl_Set_Owner,
ROM_API_INDEX_SF_Ctrl_Disable,
ROM_API_INDEX_SF_Ctrl_Select_Pad,
ROM_API_INDEX_SF_Ctrl_AES_Enable_BE,
ROM_API_INDEX_SF_Ctrl_AES_Enable_LE,
ROM_API_INDEX_SF_Ctrl_AES_Set_Region,
ROM_API_INDEX_SF_Ctrl_AES_Set_Key,
ROM_API_INDEX_SF_Ctrl_AES_Set_Key_BE,
ROM_API_INDEX_SF_Ctrl_AES_Set_IV,
ROM_API_INDEX_SF_Ctrl_AES_Set_IV_BE,
ROM_API_INDEX_SF_Ctrl_AES_Enable,
ROM_API_INDEX_SF_Ctrl_AES_Disable,
ROM_API_INDEX_SF_Ctrl_Set_Flash_Image_Offset,
ROM_API_INDEX_SF_Ctrl_Get_Flash_Image_Offset,
ROM_API_INDEX_SF_Ctrl_Select_Clock,
ROM_API_INDEX_SF_Ctrl_SendCmd,
ROM_API_INDEX_SF_Ctrl_Icache_Set,
ROM_API_INDEX_SF_Ctrl_Icache2_Set,
ROM_API_INDEX_SF_Ctrl_GetBusyState,
ROM_API_INDEX_SF_Cfg_Deinit_Ext_Flash_Gpio,
ROM_API_INDEX_SF_Cfg_Init_Ext_Flash_Gpio,
ROM_API_INDEX_SF_Cfg_Restore_GPIO17_Fun,
ROM_API_INDEX_SF_Cfg_Get_Flash_Cfg_Need_Lock,
ROM_API_INDEX_SF_Cfg_Init_Flash_Gpio,
ROM_API_INDEX_SF_Cfg_Flash_Identify,
ROM_API_INDEX_FUNC_LAST = ROM_API_INDEX_SF_Cfg_Flash_Identify,
ROM_API_INDEX_FUNC_INVALID_START,
ROM_API_INDEX_FUNC_LAST_ENTRY = ROMAPI_INDEX_MAX
} ROM_API_INDEX_e;
/** @addtogroup BL602_Peripheral_Driver
* @{
*/
/** @addtogroup ROMDRIVER
* @{
*/
/** @defgroup ROMDRIVER_Public_Types
* @{
*/
#define ROM_APITABLE ((uint32_t *)0x21010800)
#define RomDriver_AON_Power_On_MBG \
((BL_Err_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_AON_Power_On_MBG])
#define RomDriver_AON_Power_Off_MBG \
((BL_Err_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_AON_Power_Off_MBG])
#define RomDriver_AON_Power_On_XTAL \
((BL_Err_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_AON_Power_On_XTAL])
#define RomDriver_AON_Set_Xtal_CapCode \
((BL_Err_Type (*)(uint8_t capIn,uint8_t capOut))ROM_APITABLE[ROM_API_INDEX_AON_Set_Xtal_CapCode])
#define RomDriver_AON_Power_Off_XTAL \
((BL_Err_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_AON_Power_Off_XTAL])
#define RomDriver_ASM_Delay_Us \
((void (*)(uint32_t core,uint32_t cnt))ROM_APITABLE[ROM_API_INDEX_ASM_Delay_Us])
#define RomDriver_BL602_Delay_US \
((void (*)(uint32_t cnt))ROM_APITABLE[ROM_API_INDEX_BL602_Delay_US])
#define RomDriver_BL602_Delay_MS \
((void (*)(uint32_t cnt))ROM_APITABLE[ROM_API_INDEX_BL602_Delay_MS])
#define RomDriver_BL602_MemCpy \
((void* (*)(void *dst, const void *src, uint32_t n))ROM_APITABLE[ROM_API_INDEX_BL602_MemCpy])
#define RomDriver_BL602_MemCpy4 \
((uint32_t* (*)(uint32_t *dst, const uint32_t *src, uint32_t n))ROM_APITABLE[ROM_API_INDEX_BL602_MemCpy4])
#define RomDriver_BL602_MemCpy_Fast \
((void* (*)(void *pdst, const void *psrc, uint32_t n))ROM_APITABLE[ROM_API_INDEX_BL602_MemCpy_Fast])
#define RomDriver_BL602_MemSet \
((void* (*)(void *s, uint8_t c, uint32_t n))ROM_APITABLE[ROM_API_INDEX_BL602_MemSet])
#define RomDriver_BL602_MemSet4 \
((uint32_t* (*)(uint32_t *dst, const uint32_t val, uint32_t n))ROM_APITABLE[ROM_API_INDEX_BL602_MemSet4])
#define RomDriver_BL602_MemCmp \
((int (*)(const void *s1, const void *s2, uint32_t n))ROM_APITABLE[ROM_API_INDEX_BL602_MemCmp])
#define RomDriver_BFLB_Soft_CRC32 \
((uint32_t (*)(void *dataIn, uint32_t len))ROM_APITABLE[ROM_API_INDEX_BFLB_Soft_CRC32])
#define RomDriver_GLB_Get_Root_CLK_Sel \
((GLB_ROOT_CLK_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_GLB_Get_Root_CLK_Sel])
#define RomDriver_GLB_Set_System_CLK_Div \
((BL_Err_Type (*)(uint8_t hclkDiv,uint8_t bclkDiv))ROM_APITABLE[ROM_API_INDEX_GLB_Set_System_CLK_Div])
#define RomDriver_Update_SystemCoreClockWith_XTAL \
((BL_Err_Type (*)(GLB_PLL_XTAL_Type xtalType))ROM_APITABLE[ROM_API_INDEX_Update_SystemCoreClockWith_XTAL])
#define RomDriver_GLB_Set_System_CLK \
((BL_Err_Type (*)(GLB_PLL_XTAL_Type xtalType,GLB_SYS_CLK_Type clkFreq))ROM_APITABLE[ROM_API_INDEX_GLB_Set_System_CLK])
#define RomDriver_System_Core_Clock_Update_From_RC32M \
((BL_Err_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_System_Core_Clock_Update_From_RC32M])
#define RomDriver_GLB_Set_SF_CLK \
((BL_Err_Type (*)(uint8_t enable,GLB_SFLASH_CLK_Type clkSel,uint8_t div))ROM_APITABLE[ROM_API_INDEX_GLB_Set_SF_CLK])
#define RomDriver_GLB_SW_System_Reset \
((BL_Err_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_GLB_SW_System_Reset])
#define RomDriver_GLB_SW_CPU_Reset \
((BL_Err_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_GLB_SW_CPU_Reset])
#define RomDriver_GLB_SW_POR_Reset \
((BL_Err_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_GLB_SW_POR_Reset])
#define RomDriver_GLB_Select_Internal_Flash \
((BL_Err_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_GLB_Select_Internal_Flash])
#define RomDriver_GLB_Swap_Flash_Pin \
((BL_Err_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_GLB_Swap_Flash_Pin])
#define RomDriver_GLB_GPIO_Init \
((BL_Err_Type (*)(GLB_GPIO_Cfg_Type *cfg))ROM_APITABLE[ROM_API_INDEX_GLB_GPIO_Init])
#define RomDriver_GLB_Deswap_Flash_Pin \
((BL_Err_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_GLB_Deswap_Flash_Pin])
#define RomDriver_GLB_Select_External_Flash \
((BL_Err_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_GLB_Select_External_Flash])
#define RomDriver_GLB_GPIO_Get_Fun \
((uint8_t (*)(GLB_GPIO_Type gpioPin))ROM_APITABLE[ROM_API_INDEX_GLB_GPIO_Get_Fun])
#define RomDriver_EF_Ctrl_Busy \
((BL_Sts_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_EF_Ctrl_Busy])
#define RomDriver_EF_Ctrl_Sw_AHB_Clk_0 \
((void (*)(void))ROM_APITABLE[ROM_API_INDEX_EF_Ctrl_Sw_AHB_Clk_0])
#define RomDriver_EF_Ctrl_Load_Efuse_R0 \
((void (*)(void))ROM_APITABLE[ROM_API_INDEX_EF_Ctrl_Load_Efuse_R0])
#define RomDriver_EF_Ctrl_Get_Trim_Parity \
((uint8_t (*)(uint32_t val,uint8_t len))ROM_APITABLE[ROM_API_INDEX_EF_Ctrl_Get_Trim_Parity])
#define RomDriver_EF_Ctrl_Read_RC32K_Trim \
((void (*)(Efuse_Ana_RC32K_Trim_Type *trim))ROM_APITABLE[ROM_API_INDEX_EF_Ctrl_Read_RC32K_Trim])
#define RomDriver_EF_Ctrl_Read_RC32M_Trim \
((void (*)(Efuse_Ana_RC32M_Trim_Type *trim))ROM_APITABLE[ROM_API_INDEX_EF_Ctrl_Read_RC32M_Trim])
#define RomDriver_EF_Ctrl_Read_Ana_Trim \
((void (*)(uint32_t index, uint32_t *trim))ROM_APITABLE[ROM_API_INDEX_EF_Ctrl_Read_Ana_Trim])
#define RomDriver_PDS_Trim_RC32M \
((BL_Err_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_PDS_Trim_RC32M])
#define RomDriver_PDS_Select_RC32M_As_PLL_Ref \
((BL_Err_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_PDS_Select_RC32M_As_PLL_Ref])
#define RomDriver_PDS_Select_XTAL_As_PLL_Ref \
((BL_Err_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_PDS_Select_XTAL_As_PLL_Ref])
#define RomDriver_PDS_Power_On_PLL \
((BL_Err_Type (*)(PDS_PLL_XTAL_Type xtalType))ROM_APITABLE[ROM_API_INDEX_PDS_Power_On_PLL])
#define RomDriver_PDS_Enable_PLL_All_Clks \
((BL_Err_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_PDS_Enable_PLL_All_Clks])
#define RomDriver_PDS_Disable_PLL_All_Clks \
((BL_Err_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_PDS_Disable_PLL_All_Clks])
#define RomDriver_PDS_Enable_PLL_Clk \
((BL_Err_Type (*)(PDS_PLL_CLK_Type pllClk))ROM_APITABLE[ROM_API_INDEX_PDS_Enable_PLL_Clk])
#define RomDriver_PDS_Disable_PLL_Clk \
((BL_Err_Type (*)(PDS_PLL_CLK_Type pllClk))ROM_APITABLE[ROM_API_INDEX_PDS_Disable_PLL_Clk])
#define RomDriver_PDS_Power_Off_PLL \
((BL_Err_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_PDS_Power_Off_PLL])
#define RomDriver_HBN_Enable \
((void (*)(uint8_t aGPIOIeCfg,HBN_LDO_LEVEL_Type ldoLevel,HBN_LEVEL_Type hbnLevel))ROM_APITABLE[ROM_API_INDEX_HBN_Enable])
#define RomDriver_HBN_Reset \
((BL_Err_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_HBN_Reset])
#define RomDriver_HBN_GPIO7_Dbg_Pull_Cfg \
((BL_Err_Type (*)(BL_Fun_Type pupdEn,BL_Fun_Type iesmtEn,BL_Fun_Type dlyEn,uint8_t dlySec))ROM_APITABLE[ROM_API_INDEX_HBN_GPIO7_Dbg_Pull_Cfg])
#define RomDriver_HBN_Trim_RC32K \
((BL_Err_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_HBN_Trim_RC32K])
#define RomDriver_HBN_Set_ROOT_CLK_Sel \
((BL_Err_Type (*)(HBN_ROOT_CLK_Type rootClk))ROM_APITABLE[ROM_API_INDEX_HBN_Set_ROOT_CLK_Sel])
#define RomDriver_XIP_SFlash_State_Save \
((BL_Err_Type (*)(SPI_Flash_Cfg_Type *pFlashCfg,uint32_t *offset))ROM_APITABLE[ROM_API_INDEX_XIP_SFlash_State_Save])
#define RomDriver_XIP_SFlash_State_Restore \
((BL_Err_Type (*)(SPI_Flash_Cfg_Type *pFlashCfg,uint32_t offset))ROM_APITABLE[ROM_API_INDEX_XIP_SFlash_State_Restore])
#define RomDriver_XIP_SFlash_Erase_Need_Lock \
((BL_Err_Type (*)(SPI_Flash_Cfg_Type *pFlashCfg,uint32_t startaddr,uint32_t endaddr))ROM_APITABLE[ROM_API_INDEX_XIP_SFlash_Erase_Need_Lock])
#define RomDriver_XIP_SFlash_Write_Need_Lock \
((BL_Err_Type (*)(SPI_Flash_Cfg_Type *pFlashCfg,uint32_t addr,uint8_t *data, uint32_t len))ROM_APITABLE[ROM_API_INDEX_XIP_SFlash_Write_Need_Lock])
#define RomDriver_XIP_SFlash_Read_Need_Lock \
((BL_Err_Type (*)(SPI_Flash_Cfg_Type *pFlashCfg,uint32_t addr,uint8_t *data, uint32_t len))ROM_APITABLE[ROM_API_INDEX_XIP_SFlash_Read_Need_Lock])
#define RomDriver_XIP_SFlash_GetJedecId_Need_Lock \
((BL_Err_Type (*)(SPI_Flash_Cfg_Type *pFlashCfg,uint8_t *data))ROM_APITABLE[ROM_API_INDEX_XIP_SFlash_GetJedecId_Need_Lock])
#define RomDriver_XIP_SFlash_GetDeviceId_Need_Lock \
((BL_Err_Type (*)(SPI_Flash_Cfg_Type *pFlashCfg,uint8_t *data))ROM_APITABLE[ROM_API_INDEX_XIP_SFlash_GetDeviceId_Need_Lock])
#define RomDriver_XIP_SFlash_GetUniqueId_Need_Lock \
((BL_Err_Type (*)(SPI_Flash_Cfg_Type *pFlashCfg,uint8_t *data,uint8_t idLen))ROM_APITABLE[ROM_API_INDEX_XIP_SFlash_GetUniqueId_Need_Lock])
#define RomDriver_XIP_SFlash_Read_Via_Cache_Need_Lock \
((BL_Err_Type (*)(uint32_t addr,uint8_t *data, uint32_t len))ROM_APITABLE[ROM_API_INDEX_XIP_SFlash_Read_Via_Cache_Need_Lock])
#define RomDriver_XIP_SFlash_Read_With_Lock \
((int (*)(SPI_Flash_Cfg_Type *pFlashCfg,uint32_t addr, uint8_t *dst, int len))ROM_APITABLE[ROM_API_INDEX_XIP_SFlash_Read_With_Lock])
#define RomDriver_XIP_SFlash_Write_With_Lock \
((int (*)(SPI_Flash_Cfg_Type *pFlashCfg,uint32_t addr, uint8_t *src, int len))ROM_APITABLE[ROM_API_INDEX_XIP_SFlash_Write_With_Lock])
#define RomDriver_XIP_SFlash_Erase_With_Lock \
((int (*)(SPI_Flash_Cfg_Type *pFlashCfg,uint32_t addr, int len))ROM_APITABLE[ROM_API_INDEX_XIP_SFlash_Erase_With_Lock])
#define RomDriver_SFlash_Init \
((void (*)(const SF_Ctrl_Cfg_Type *pSfCtrlCfg))ROM_APITABLE[ROM_API_INDEX_SFlash_Init])
#define RomDriver_SFlash_SetSPIMode \
((BL_Err_Type (*)(SF_Ctrl_Mode_Type mode))ROM_APITABLE[ROM_API_INDEX_SFlash_SetSPIMode])
#define RomDriver_SFlash_Read_Reg \
((BL_Err_Type (*)(SPI_Flash_Cfg_Type *flashCfg,uint8_t regIndex,uint8_t *regValue,uint8_t regLen))ROM_APITABLE[ROM_API_INDEX_SFlash_Read_Reg])
#define RomDriver_SFlash_Write_Reg \
((BL_Err_Type (*)(SPI_Flash_Cfg_Type *flashCfg,uint8_t regIndex,uint8_t *regValue,uint8_t regLen))ROM_APITABLE[ROM_API_INDEX_SFlash_Write_Reg])
#define RomDriver_SFlash_Busy \
((BL_Sts_Type (*)(SPI_Flash_Cfg_Type *flashCfg))ROM_APITABLE[ROM_API_INDEX_SFlash_Busy])
#define RomDriver_SFlash_Write_Enable \
((BL_Err_Type (*)(SPI_Flash_Cfg_Type *flashCfg))ROM_APITABLE[ROM_API_INDEX_SFlash_Write_Enable])
#define RomDriver_SFlash_Qspi_Enable \
((BL_Err_Type (*)(SPI_Flash_Cfg_Type *flashCfg))ROM_APITABLE[ROM_API_INDEX_SFlash_Qspi_Enable])
#define RomDriver_SFlash_Volatile_Reg_Write_Enable \
((void (*)(SPI_Flash_Cfg_Type *flashCfg))ROM_APITABLE[ROM_API_INDEX_SFlash_Volatile_Reg_Write_Enable])
#define RomDriver_SFlash_Chip_Erase \
((BL_Err_Type (*)(SPI_Flash_Cfg_Type *flashCfg))ROM_APITABLE[ROM_API_INDEX_SFlash_Chip_Erase])
#define RomDriver_SFlash_Sector_Erase \
((BL_Err_Type (*)(SPI_Flash_Cfg_Type *flashCfg,uint32_t secNum))ROM_APITABLE[ROM_API_INDEX_SFlash_Sector_Erase])
#define RomDriver_SFlash_Blk32_Erase \
((BL_Err_Type (*)(SPI_Flash_Cfg_Type *flashCfg,uint32_t blkNum))ROM_APITABLE[ROM_API_INDEX_SFlash_Blk32_Erase])
#define RomDriver_SFlash_Blk64_Erase \
((BL_Err_Type (*)(SPI_Flash_Cfg_Type *flashCfg,uint32_t blkNum))ROM_APITABLE[ROM_API_INDEX_SFlash_Blk64_Erase])
#define RomDriver_SFlash_Erase \
((BL_Err_Type (*)(SPI_Flash_Cfg_Type *flashCfg,uint32_t startaddr,uint32_t endaddr))ROM_APITABLE[ROM_API_INDEX_SFlash_Erase])
#define RomDriver_SFlash_Program \
((BL_Err_Type (*)(SPI_Flash_Cfg_Type *flashCfg,SF_Ctrl_IO_Type ioMode,uint32_t addr,uint8_t *data, uint32_t len))ROM_APITABLE[ROM_API_INDEX_SFlash_Program])
#define RomDriver_SFlash_GetUniqueId \
((void (*)(uint8_t *data,uint8_t idLen))ROM_APITABLE[ROM_API_INDEX_SFlash_GetUniqueId])
#define RomDriver_SFlash_GetJedecId \
((void (*)(SPI_Flash_Cfg_Type *flashCfg,uint8_t *data))ROM_APITABLE[ROM_API_INDEX_SFlash_GetJedecId])
#define RomDriver_SFlash_GetDeviceId \
((void (*)(uint8_t *data))ROM_APITABLE[ROM_API_INDEX_SFlash_GetDeviceId])
#define RomDriver_SFlash_Powerdown \
((void (*)(void))ROM_APITABLE[ROM_API_INDEX_SFlash_Powerdown])
#define RomDriver_SFlash_Releae_Powerdown \
((void (*)(SPI_Flash_Cfg_Type *flashCfg))ROM_APITABLE[ROM_API_INDEX_SFlash_Releae_Powerdown])
#define RomDriver_SFlash_SetBurstWrap \
((void (*)(SPI_Flash_Cfg_Type *flashCfg))ROM_APITABLE[ROM_API_INDEX_SFlash_SetBurstWrap])
#define RomDriver_SFlash_DisableBurstWrap \
((void (*)(SPI_Flash_Cfg_Type *flashCfg))ROM_APITABLE[ROM_API_INDEX_SFlash_DisableBurstWrap])
#define RomDriver_SFlash_Software_Reset \
((BL_Err_Type (*)(SPI_Flash_Cfg_Type *flashCfg))ROM_APITABLE[ROM_API_INDEX_SFlash_Software_Reset])
#define RomDriver_SFlash_Reset_Continue_Read \
((void (*)(SPI_Flash_Cfg_Type *flashCfg))ROM_APITABLE[ROM_API_INDEX_SFlash_Reset_Continue_Read])
#define RomDriver_SFlash_Set_IDbus_Cfg \
((BL_Err_Type (*)(SPI_Flash_Cfg_Type *flashCfg,SF_Ctrl_IO_Type ioMode,uint8_t contRead,uint32_t addr,uint32_t len))ROM_APITABLE[ROM_API_INDEX_SFlash_Set_IDbus_Cfg])
#define RomDriver_SFlash_IDbus_Read_Enable \
((BL_Err_Type (*)(SPI_Flash_Cfg_Type *flashCfg,SF_Ctrl_IO_Type ioMode,uint8_t contRead))ROM_APITABLE[ROM_API_INDEX_SFlash_IDbus_Read_Enable])
#define RomDriver_SFlash_Cache_Enable_Set \
((BL_Err_Type (*)(uint8_t wayDisable))ROM_APITABLE[ROM_API_INDEX_SFlash_Cache_Enable_Set])
#define RomDriver_SFlash_Cache_Flush \
((BL_Err_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_SFlash_Cache_Flush])
#define RomDriver_SFlash_Cache_Read_Enable \
((BL_Err_Type (*)(SPI_Flash_Cfg_Type *flashCfg,SF_Ctrl_IO_Type ioMode,uint8_t contRead,uint8_t wayDisable))ROM_APITABLE[ROM_API_INDEX_SFlash_Cache_Read_Enable])
#define RomDriver_SFlash_Cache_Hit_Count_Get \
((void (*)(uint32_t *hitCountLow,uint32_t *hitCountHigh))ROM_APITABLE[ROM_API_INDEX_SFlash_Cache_Hit_Count_Get])
#define RomDriver_SFlash_Cache_Miss_Count_Get \
((uint32_t (*)(void))ROM_APITABLE[ROM_API_INDEX_SFlash_Cache_Miss_Count_Get])
#define RomDriver_SFlash_Cache_Read_Disable \
((void (*)(void))ROM_APITABLE[ROM_API_INDEX_SFlash_Cache_Read_Disable])
#define RomDriver_SFlash_Read \
((BL_Err_Type (*)(SPI_Flash_Cfg_Type *flashCfg,SF_Ctrl_IO_Type ioMode,uint8_t contRead,uint32_t addr,uint8_t *data, uint32_t len))ROM_APITABLE[ROM_API_INDEX_SFlash_Read])
#define RomDriver_SF_Ctrl_Enable \
((void (*)(const SF_Ctrl_Cfg_Type *cfg))ROM_APITABLE[ROM_API_INDEX_SF_Ctrl_Enable])
#define RomDriver_SF_Ctrl_Set_Owner \
((void (*)(SF_Ctrl_Owner_Type owner))ROM_APITABLE[ROM_API_INDEX_SF_Ctrl_Set_Owner])
#define RomDriver_SF_Ctrl_Disable \
((void (*)(void))ROM_APITABLE[ROM_API_INDEX_SF_Ctrl_Disable])
#define RomDriver_SF_Ctrl_Select_Pad \
((void (*)(SF_Ctrl_Pad_Sel sel))ROM_APITABLE[ROM_API_INDEX_SF_Ctrl_Select_Pad])
#define RomDriver_SF_Ctrl_AES_Enable_BE \
((void (*)(void))ROM_APITABLE[ROM_API_INDEX_SF_Ctrl_AES_Enable_BE])
#define RomDriver_SF_Ctrl_AES_Enable_LE \
((void (*)(void))ROM_APITABLE[ROM_API_INDEX_SF_Ctrl_AES_Enable_LE])
#define RomDriver_SF_Ctrl_AES_Set_Region \
((void (*)(uint8_t region,uint8_t enable,uint8_t hwKey,uint32_t startAddr,uint32_t endAddr,uint8_t locked))ROM_APITABLE[ROM_API_INDEX_SF_Ctrl_AES_Set_Region])
#define RomDriver_SF_Ctrl_AES_Set_Key \
((void (*)(uint8_t region,uint8_t *key, SF_Ctrl_AES_Key_Type keyType))ROM_APITABLE[ROM_API_INDEX_SF_Ctrl_AES_Set_Key])
#define RomDriver_SF_Ctrl_AES_Set_Key_BE \
((void (*)(uint8_t region,uint8_t *key, SF_Ctrl_AES_Key_Type keyType))ROM_APITABLE[ROM_API_INDEX_SF_Ctrl_AES_Set_Key_BE])
#define RomDriver_SF_Ctrl_AES_Set_IV \
((void (*)(uint8_t region,uint8_t *iv,uint32_t addrOffset))ROM_APITABLE[ROM_API_INDEX_SF_Ctrl_AES_Set_IV])
#define RomDriver_SF_Ctrl_AES_Set_IV_BE \
((void (*)(uint8_t region,uint8_t *iv,uint32_t addrOffset))ROM_APITABLE[ROM_API_INDEX_SF_Ctrl_AES_Set_IV_BE])
#define RomDriver_SF_Ctrl_AES_Enable \
((void (*)(void))ROM_APITABLE[ROM_API_INDEX_SF_Ctrl_AES_Enable])
#define RomDriver_SF_Ctrl_AES_Disable \
((void (*)(void))ROM_APITABLE[ROM_API_INDEX_SF_Ctrl_AES_Disable])
#define RomDriver_SF_Ctrl_Set_Flash_Image_Offset \
((void (*)(uint32_t addrOffset))ROM_APITABLE[ROM_API_INDEX_SF_Ctrl_Set_Flash_Image_Offset])
#define RomDriver_SF_Ctrl_Get_Flash_Image_Offset \
((uint32_t (*)(void))ROM_APITABLE[ROM_API_INDEX_SF_Ctrl_Get_Flash_Image_Offset])
#define RomDriver_SF_Ctrl_Select_Clock \
((void (*)(SF_Ctrl_Sahb_Type sahbType))ROM_APITABLE[ROM_API_INDEX_SF_Ctrl_Select_Clock])
#define RomDriver_SF_Ctrl_SendCmd \
((void (*)(SF_Ctrl_Cmd_Cfg_Type *cfg))ROM_APITABLE[ROM_API_INDEX_SF_Ctrl_SendCmd])
#define RomDriver_SF_Ctrl_Icache_Set \
((void (*)(SF_Ctrl_Cmd_Cfg_Type *cfg,uint8_t cmdValid))ROM_APITABLE[ROM_API_INDEX_SF_Ctrl_Icache_Set])
#define RomDriver_SF_Ctrl_Icache2_Set \
((void (*)(SF_Ctrl_Cmd_Cfg_Type *cfg,uint8_t cmdValid))ROM_APITABLE[ROM_API_INDEX_SF_Ctrl_Icache2_Set])
#define RomDriver_SF_Ctrl_GetBusyState \
((BL_Sts_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_SF_Ctrl_GetBusyState])
#define RomDriver_SF_Cfg_Deinit_Ext_Flash_Gpio \
((void (*)(uint8_t extFlashPin))ROM_APITABLE[ROM_API_INDEX_SF_Cfg_Deinit_Ext_Flash_Gpio])
#define RomDriver_SF_Cfg_Init_Ext_Flash_Gpio \
((void (*)(uint8_t extFlashPin))ROM_APITABLE[ROM_API_INDEX_SF_Cfg_Init_Ext_Flash_Gpio])
#define RomDriver_SF_Cfg_Restore_GPIO17_Fun \
((void (*)(uint8_t fun))ROM_APITABLE[ROM_API_INDEX_SF_Cfg_Restore_GPIO17_Fun])
#define RomDriver_SF_Cfg_Get_Flash_Cfg_Need_Lock \
((BL_Err_Type (*)(uint32_t flashID,SPI_Flash_Cfg_Type * pFlashCfg))ROM_APITABLE[ROM_API_INDEX_SF_Cfg_Get_Flash_Cfg_Need_Lock])
#define RomDriver_SF_Cfg_Init_Flash_Gpio \
((void (*)(uint8_t flashPinCfg,uint8_t restoreDefault))ROM_APITABLE[ROM_API_INDEX_SF_Cfg_Init_Flash_Gpio])
#define RomDriver_SF_Cfg_Flash_Identify \
((uint32_t (*)(uint8_t callFromFlash,uint32_t autoScan,uint32_t flashPinCfg,uint8_t restoreDefault, SPI_Flash_Cfg_Type * pFlashCfg))ROM_APITABLE[ROM_API_INDEX_SF_Cfg_Flash_Identify])
/*@} end of group ROMDRIVER_Public_Types */
/** @defgroup ROMDRIVER_Public_Constants
* @{
*/
/*@} end of group ROMDRIVER_Public_Constants */
/** @defgroup ROMDRIVER_Public_Macros
* @{
*/
/*@} end of group ROMDRIVER_Public_Macros */
/** @defgroup ROMDRIVER_Public_Functions
* @{
*/
/*@} end of group ROMDRIVER_Public_Functions */
/*@} end of group ROMDRIVER */
/*@} end of group BL602_Peripheral_Driver */
#endif /* __BL602_ROMDRIVER_H__ */
|
mkroman/bl602-604
|
components/bl602/bl602_wifi/plf/refip/src/driver/phy/bl602_phy_rf/agcmem_bl602.c
|
<reponame>mkroman/bl602-604<filename>components/bl602/bl602_wifi/plf/refip/src/driver/phy/bl602_phy_rf/agcmem_bl602.c
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "co_int.h"
const uint32_t agcmem[] = {
0x20000000,
0x0400000f,
0x3000106f,
0x60000000,
0x04000031,
0x3000200f,
0x5b000000,
0x04000034,
0x300030ef,
0x32000000,
0x04000057,
0x20000000,
0x0400000f,
0x2819008f,
0x08000106,
0x38008000,
0x01000000,
0x08000012,
0x38018000,
0x10000821,
0x34200015,
0x38018000,
0x0c004203,
0x34200018,
0x28018000,
0x3420001a,
0x38020005,
0x40000001,
0x0800001d,
0x30000005,
0x44002c01,
0x04000020,
0x30000005,
0x3d000303,
0x04000023,
0x30000005,
0x3e000200,
0x04000026,
0x30000005,
0x9f000001,
0x04000029,
0x30000005,
0x84020200,
0x0400002c,
0x380a208f,
0x1404053e,
0x0800002f,
0x2000339f,
0x041dd40f,
0x38010000,
0x10000231,
0x08d0443f,
0x50002000,
0xa0000001,
0xe4000038,
0xdc00003c,
0x58012000,
0x0d001401,
0x146dc83c,
0x0800003f,
0x38008000,
0x60000000,
0x08000031,
0x38012000,
0x3e000101,
0x08000042,
0x3801a007,
0x3d000101,
0x08000045,
0x380280ef,
0x1f191010,
0x08000048,
0x480a09ef,
0xa400004b,
0x0800002f,
0x20000c2f,
0x0400004d,
0x60000c2f,
0x30b00055,
0x28400053,
0x04000051,
0x28100caf,
0x09b00069,
0x28080caf,
0x09b00069,
0x28050caf,
0x09b00069,
0x400004ef,
0xac00005a,
0x04000060,
0x300004ef,
0x84020201,
0x0400005d,
0x300004ef,
0xa0000001,
0x04000060,
0x380424ef,
0x1f1f1f11,
0x08000063,
0x30000cef,
0x20202031,
0x04000066,
0x48050eef,
0x6da04469,
0x08000069,
0x60000eaf,
0x71b0446d,
0x71b00070,
0x04104473,
0x30000eaf,
0x29000300,
0x04000076,
0x30000eaf,
0x29000100,
0x04000076,
0x30000eaf,
0x29000000,
0x04000076,
0x3801800f,
0x0ef1ef07,
0x36008079,
0x20000000,
0x0400007b,
0x38024005,
0x3e000201,
0x0800007e,
0x30004007,
0x32000000,
0x04000081,
0x30004007,
0x32000001,
0x04000084,
0x30004007,
0x3d000303,
0x04000087,
0x3000400f,
0x3f000102,
0x0400008a,
0x3000400f,
0x20202071,
0x0400008d,
0x380442ef,
0x1f102021,
0x08000090,
0x28104a6f,
0x08000092,
0x30004a6f,
0x4100000f,
0x04000095,
0x30004b6f,
0x21000003,
0x04000098,
0x80004b6f,
0x71b0449d,
0x701044a0,
0x6c1044a0,
0x041044a3,
0x30004f6f,
0x29000301,
0x040000a6,
0x30004f6f,
0x29000101,
0x040000a6,
0x30004f6f,
0x29000001,
0x040000a6,
0x38324bef,
0x34000000,
0x080000a9,
0x30004b6f,
0x21000101,
0x040000ac,
0xe0004b6f,
0x79d044b4,
0x71b044b7,
0x741044ba,
0x6c1044bd,
0x781044ba,
0x701044bd,
0x041044c0,
0x3000430f,
0x29030002,
0x040000f1,
0x3000430f,
0x29000302,
0x040000c6,
0x3000430f,
0x29010002,
0x040000f1,
0x3000430f,
0x29000102,
0x040000c6,
0x3000430f,
0x29000002,
0x040000c3,
0x3000030f,
0x32000000,
0x0400000f,
0x3000438f,
0x34000000,
0x040000c9,
0x7896438f,
0x4100000f,
0x8c0000ce,
0x080000c3,
0x901044ec,
0x8864420f,
0xc00000d7,
0x901044ec,
0x081044d3,
0x941044d5,
0x2000420f,
0x940450ee,
0x2000420f,
0x041044ee,
0x20004005,
0x041044d9,
0x9832400f,
0x3d010101,
0x901044ec,
0x080000d3,
0x941044d5,
0xc40000df,
0x5802800f,
0x0ef1ef07,
0x800000ec,
0x042044e3,
0x30004000,
0x33000001,
0x040000e6,
0x38034005,
0x3d030303,
0x080000e9,
0x30004007,
0x33000000,
0x040000ec,
0x2000400f,
0x940450ee,
0x3801400f,
0x64000101,
0x0810440f,
0x3000030f,
0x32000000,
0x040000f4,
0x3802030f,
0x0ef4ef07,
0x360080f7,
0x3000130f,
0x32000100,
0x040000fa,
0x5aee130f,
0x4100000f,
0x7c000101,
0x080000fe,
0x3000030f,
0x32000000,
0x0400000f,
0x492c110f,
0x8c000104,
0x080000fe,
0x2000100f,
0x9404500f,
0x3000008f,
0x0eeaed0b,
0x36000109,
0x38038000,
0x34000000,
0x0800010c,
0x38010000,
0x0a000000,
0x0800010f,
0x28028005,
0x08000111,
0x2000028f,
0x04000113,
0x2000028f,
0x04000115,
0x3000128f,
0x32000100,
0x04000118,
0x5aee138f,
0x4100000f,
0x7c00011c,
0x080000fe,
0x592c138f,
0x29000000,
0x8c000120,
0x080000fe,
0x2000128f,
0x9404500f,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
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0x00000000,
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0x00000000,
0x00000000,
0x00000000,
0xc0088d03,
};
|
mkroman/bl602-604
|
components/bl602/bl602_wifi/plf/refip/src/driver/phy/bl602_phy_rf/rf/Inc/bl602_rf_calib_data.h
|
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef RF_CALIB_DATA_H
#define RF_CALIB_DATA_H
// #include "co_int.h"
#include "bl602_rf_private.h"
/// Definitions of RF without LO calibration structure
typedef struct
{
uint32_t gpadc_oscode : 12;
uint32_t rx_offset_i : 10;
uint32_t rx_offset_q : 10;
uint32_t rbb_cap1_fc_i : 6;
uint32_t rbb_cap1_fc_q : 6;
uint32_t rbb_cap2_fc_i : 6;
uint32_t rbb_cap2_fc_q : 6;
uint32_t tx_dc_comp_i : 12;
uint32_t tx_dc_comp_q : 12;
uint32_t tmx_cs : 3;
uint32_t txpwr_att_rec : 3;
uint32_t pa_pwrmx_osdac : 4;
uint32_t tmx_csh : 3;
uint32_t tmx_csl : 3;
uint32_t tsen_refcode_rfcal : 12;
uint32_t tsen_refcode_corner : 12;
uint32_t rc32k_code_fr_ext : 10;
uint32_t rc32m_code_fr_ext : 8;
uint32_t saradc_oscode : 10;
uint16_t fcal_4osmx : 4;
} rf_calib1_tag;
/// Definitions of LO dependent calibration structure #pragma pack (2)
typedef struct
{
uint16_t fcal : 8;
uint16_t acal : 5;
} rf_calib2_tag;
//
typedef struct
{
uint32_t rosdac_i : 6;
uint32_t rosdac_q : 6;
uint32_t rx_iq_gain_comp : 11;
uint32_t rx_iq_phase_comp : 10;
} rf_calib3_tag;
//
typedef struct
{
uint32_t tosdac_i : 6;
uint32_t tosdac_q : 6;
uint32_t tx_iq_gain_comp : 11;
uint32_t tx_iq_phase_comp : 10;
} rf_calib4_tag;
/// Definitions of the RF calibration result structure
typedef volatile struct
{
uint32_t inited;
rf_calib1_tag cal;
rf_calib2_tag lo[E_RF_CHANNEL_NUM];
rf_calib3_tag rxcal[E_RF_RXCAL_GAIN_CNT]; // 0:rosdac_ctrl_hw1.rosdac_i/q_gc0 + rxiq_ctrl_hw1, .., 3:rosdac_ctrl_hw2.rosdac_i/q_gc3 + rxiq_ctrl_hw4
rf_calib4_tag txcal[E_RF_TXCAL_GAIN_CNT]; // 0:tosdac_ctrl_hw1.tbb_tosdac_i/q_gc0 + tx_iq_gain_hw0, .., 7:tosdac_ctrl_hw4.tbb_tosdac_i/q_gc7 + tx_iq_gain_hw7
} rf_calib_data_tag;
/// export rf calibration data
extern rf_calib_data_tag* rf_calib_data;
/// init calibration data
void rf_pri_init_calib_mem(void);
#endif
|
mkroman/bl602-604
|
components/network/ble/blestack/src/common/include/toolchain/xcc.h
|
<gh_stars>0
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef ZEPHYR_INCLUDE_TOOLCHAIN_XCC_H_
#define ZEPHYR_INCLUDE_TOOLCHAIN_XCC_H_
/* toolchain/gcc.h errors out if __BYTE_ORDER__ cannot be determined
* there. However, __BYTE_ORDER__ is actually being defined later in
* this file. So define __BYTE_ORDER__ to skip the check in gcc.h
* and undefine after including gcc.h.
*/
#define __BYTE_ORDER__
#include <toolchain/gcc.h>
#undef __BYTE_ORDER__
#include <stdbool.h>
/* XCC doesn't support __COUNTER__ but this should be good enough */
#define __COUNTER__ __LINE__
#undef __in_section_unique
#define __in_section_unique(seg) \
__attribute__((section("." STRINGIFY(seg) "." STRINGIFY(__COUNTER__))))
#ifndef __GCC_LINKER_CMD__
#include <xtensa/config/core.h>
/*
* XCC does not define the following macros with the expected names, but the
* HAL defines similar ones. Thus we include it and define the missing macros
* ourselves.
*/
#if XCHAL_MEMORY_ORDER == XTHAL_BIGENDIAN
#define __BYTE_ORDER__ __ORDER_BIG_ENDIAN__
#elif XCHAL_MEMORY_ORDER == XTHAL_LITTLEENDIAN
#define __BYTE_ORDER__ __ORDER_LITTLE_ENDIAN__
#else
#error "Cannot determine __BYTE_ORDER__"
#endif
#endif /* __GCC_LINKER_CMD__ */
#define __builtin_unreachable() do { __ASSERT(false, "Unreachable code"); } \
while (true)
#endif
|
mkroman/bl602-604
|
components/network/ble/blestack/src/host/ecc.h
|
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/* ecc.h - ECDH helpers */
/*
* Copyright (c) 2016 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
/* @brief Container for public key callback */
struct bt_pub_key_cb {
/** @brief Callback type for Public Key generation.
*
* Used to notify of the local public key or that the local key is not
* available (either because of a failure to read it or because it is
* being regenerated).
*
* @param key The local public key, or NULL in case of no key.
*/
void (*func)(const u8_t key[64]);
struct bt_pub_key_cb *_next;
};
/* @brief Generate a new Public Key.
*
* Generate a new ECC Public Key. The callback will persist even after the
* key has been generated, and will be used to notify of new generation
* processes (NULL as key).
*
* @param cb Callback to notify the new key, or NULL to request an update
* without registering any new callback.
*
* @return Zero on success or negative error code otherwise
*/
int bt_pub_key_gen(struct bt_pub_key_cb *cb);
/* @brief Get the current Public Key.
*
* Get the current ECC Public Key.
*
* @return Current key, or NULL if not available.
*/
const u8_t *bt_pub_key_get(void);
/* @typedef bt_dh_key_cb_t
* @brief Callback type for DH Key calculation.
*
* Used to notify of the calculated DH Key.
*
* @param key The DH Key, or NULL in case of failure.
*/
typedef void (*bt_dh_key_cb_t)(const u8_t key[32]);
/* @brief Calculate a DH Key from a remote Public Key.
*
* Calculate a DH Key from the remote Public Key.
*
* @param remote_pk Remote Public Key.
* @param cb Callback to notify the calculated key.
*
* @return Zero on success or negative error code otherwise
*/
int bt_dh_key_gen(const u8_t remote_pk[64], bt_dh_key_cb_t cb);
|
mkroman/bl602-604
|
components/network/ble/blestack/src/services/scps.h
|
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef INCLUDE_BLUETOOTH_SERVICES_SCPS_H_
#define INCLUDE_BLUETOOTH_SERVICES_SCPS_H_
/**
* @brief Scan Parameters Service (SCPS)
* @defgroup bt_gatt_scps Scan Parameters Service (SCPS)
* @ingroup bluetooth
* @{
*
* [Experimental] Users should note that the APIs can change
* as a part of ongoing development.
*/
#ifdef __cplusplus
extern "C" {
#endif
#include <zephyr/types.h>
bool scps_init(u16_t scan_itvl, u16_t scan_win);
#ifdef __cplusplus
}
#endif
/**
* @}
*/
#endif
|
mkroman/bl602-604
|
components/bl602/bl602_wifi/plf/refip/src/driver/phy/bl602_phy_rf/rfc_bl602.h
|
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _RFC_BL602_H_
#define _RFC_BL602_H_
#include <stdint.h>
enum
{
RFC_OFF = 0,
RFC_ON = 1
};
enum
{
RFC_PM_MUX_TO_ADC = 0,
RFC_PM_MUX_TO_IQCOMP = 1,
RFC_PM_MUX_TO_BLE = 2
};
enum
{
RFC_TXDFE_IN_MUX_TO_BB = 0,
RFC_TXDFE_IN_MUX_TO_SRAM = 1,
RFC_TXDFE_IN_MUX_TO_SINGEN = 2,
RFC_TXDFE_IN_MUX_TO_PAD = 3
};
enum
{
RFC_FSM_PD = 0,
RFC_FSM_SB = 1,
RFC_FSM_LO = 2,
RFC_FSM_RX = 3,
RFC_FSM_TX = 4,
RFC_FSM_FORCE_OFF = 15
};
enum
{
RFC_BBMODE_WLAN = 0,
RFC_BBMODE_BLE = 1
};
enum
{
RFC_SG_SINGLE_TONE = 0,
RFC_SG_TWO_TONE,
RFC_SG_RAMP
};
enum {
RFC_PC_AUTO = 0,
RFC_PC_WLAN_11B,
RFC_PC_WLAN_11G,
RFC_PC_WLAN_11N,
RFC_PC_BT_BLE
};
enum {
RFC_FORMATMOD_11B = 0,
RFC_FORMATMOD_11G = 1,
RFC_FORMATMOD_11N = 2
};
enum {
RFC_BW_20M = 0,
RFC_BW_10M = 1
};
void rfc_init(uint32_t xtalfreq);
void rfc_reset();
void rfc_config_channel(uint32_t channel_freq);
void rfc_config_channel_sw(uint32_t channel_freq);
void rfc_write_reg(uint32_t a, uint32_t d);
uint32_t rfc_read_reg(uint32_t a);
void rfc_config_power(uint32_t mode,uint32_t tbb_boost,uint32_t tbb,uint32_t tmx);
void rfc_config_bandwidth(uint32_t mode);
uint32_t rfc_get_power_level(uint32_t mode, int32_t power);
/*
* TXDFE DECLARATIONS
****************************************************************************************
*/
void rfc_txdfe_start();
void rfc_txdfe_stop();
void rfc_txdfe_mux(int8_t signal_source);
void rfc_txdfe_set_dvga(int8_t dvga_qdb);
void rfc_txdfe_set_iqgaincomp(uint8_t en,uint16_t coeff);
void rfc_txdfe_set_iqphasecomp(uint8_t en,int16_t coeff);
void rfc_txdfe_set_dccomp(int16_t dcc_i,int16_t dcc_q);
void rfc_txdfe_set_iqswap(uint8_t swap_on);
/*
* RXDFE DECLARATIONS
****************************************************************************************
*/
void rfc_rxdfe_start();
void rfc_rxdfe_stop();
void rfc_rxdfe_set_iqgaincomp(uint8_t en,uint16_t coeff);
void rfc_rxdfe_set_iqphasecomp(uint8_t en,int16_t coeff);
void rfc_rxdfe_set_dccomp(int16_t dcc_i,int16_t dcc_q);
void rfc_rxdfe_set_iqswap(uint8_t swap_on);
void rfc_rxdfe_set_notch0(uint8_t en,uint8_t alpha,int8_t nrmfc);
void rfc_rxdfe_set_notch1(uint8_t en,uint8_t alpha,int8_t nrmfc);
/*
* SG DECLARATIONS
****************************************************************************************
*/
void rfc_sg_start(uint32_t inc_step,uint32_t gain_i,uint32_t gain_q,uint32_t addr_i,uint32_t addr_q);
void rfc_sg_stop();
/*
* PM DECLARATIONS
****************************************************************************************
*/
uint32_t rfc_pm_start(uint32_t insel,int32_t freq_cw,uint32_t acclen,uint32_t rshiftlen,
int32_t *raw_acc_i,int32_t *raw_acc_q);
void rfc_pm_stop();
/*
* HWCTRL DECLARATIONS
****************************************************************************************
*/
void rfc_hwctrl_txrfgain(uint8_t hwctrl_on);
void rfc_hwctrl_rxgain(uint8_t hwctrl_on);
void rfc_hwctrl_txdvga(uint8_t hwctrl_on);
void rfc_hwctrl_calparam(uint8_t hwctrl_on);
/*
* FSM DECLARATIONS
****************************************************************************************
*/
void rfc_lo_set_regs(uint32_t xtal_freq);
void rfc_lo_set_fcal_lut(uint32_t* ptr_fcal_2404,uint32_t* ptr_fcal_2484);
void rfc_lo_set_channel(uint32_t chanfreq_MHz);
void rfc_fsm_force(uint8_t state);
/*
* COEX DECLARATIONS
****************************************************************************************
*/
void rfc_coex_force_to(uint32_t force_enable, uint32_t bbmode);
void rfc_dump();
#endif
|
mkroman/bl602-604
|
components/network/ble/blestack/src/common/rpa.c
|
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/**
* @file rpa.c
* Resolvable Private Address Generation and Resolution
*/
/*
* Copyright (c) 2017 Nordic Semiconductor ASA
* Copyright (c) 2015-2016 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr.h>
#include <stddef.h>
#include <errno.h>
#include <string.h>
#include <atomic.h>
#include <misc/util.h>
#include <misc/byteorder.h>
#include <misc/stack.h>
#include <constants.h>
#include <aes.h>
#include <utils.h>
#include <cmac_mode.h>
#include <../include/bluetooth/crypto.h>
#define BT_DBG_ENABLED IS_ENABLED(CONFIG_BT_DEBUG_RPA)
#define LOG_MODULE_NAME bt_rpa
#include "log.h"
static int ah(const u8_t irk[16], const u8_t r[3], u8_t out[3])
{
u8_t res[16];
int err;
BT_DBG("irk %s", bt_hex(irk, 16));
BT_DBG("r %s", bt_hex(r, 3));
/* r' = padding || r */
memcpy(res, r, 3);
(void)memset(res + 3, 0, 13);
err = bt_encrypt_le(irk, res, res);
if (err) {
return err;
}
/* The output of the random address function ah is:
* ah(h, r) = e(k, r') mod 2^24
* The output of the security function e is then truncated to 24 bits
* by taking the least significant 24 bits of the output of e as the
* result of ah.
*/
memcpy(out, res, 3);
return 0;
}
#if defined(CONFIG_BT_SMP) || defined(CONFIG_BT_CTLR_PRIVACY)
bool bt_rpa_irk_matches(const u8_t irk[16], const bt_addr_t *addr)
{
u8_t hash[3];
int err;
BT_DBG("IRK %s bdaddr %s", bt_hex(irk, 16), bt_addr_str(addr));
err = ah(irk, addr->val + 3, hash);
if (err) {
return false;
}
return !memcmp(addr->val, hash, 3);
}
#endif
#if defined(CONFIG_BT_PRIVACY) || defined(CONFIG_BT_CTLR_PRIVACY)
int bt_rpa_create(const u8_t irk[16], bt_addr_t *rpa)
{
int err;
err = bt_rand(rpa->val + 3, 3);
if (err) {
return err;
}
BT_ADDR_SET_RPA(rpa);
err = ah(irk, rpa->val + 3, rpa->val);
if (err) {
return err;
}
BT_DBG("Created RPA %s", bt_addr_str((bt_addr_t *)rpa->val));
return 0;
}
#else
int bt_rpa_create(const u8_t irk[16], bt_addr_t *rpa)
{
return -ENOTSUP;
}
#endif /* CONFIG_BT_PRIVACY */
|
mkroman/bl602-604
|
components/bl602/bl602_wifi/plf/refip/src/driver/phy/bl602_phy_rf/rf/Src/bl602_calib_data.c
|
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <string.h>
#include "bl602_rf_calib_data.h"
#if 0
#define RF_CALIB_DATA_ADDR (0x40020000)
rf_calib_data_tag* rf_calib_data = (rf_calib_data_tag *)RF_CALIB_DATA_ADDR;
#else
static rf_calib_data_tag data;
rf_calib_data_tag* rf_calib_data = &data;
#endif
void rf_pri_init_calib_mem(void)
{
memset((void*)rf_calib_data, 0, sizeof(rf_calib_data_tag));
uint8_t i;
for(i=0;i<4;i++){
rf_calib_data->rxcal[i].rosdac_i = 32;
rf_calib_data->rxcal[i].rosdac_q = 32;
rf_calib_data->rxcal[i].rx_iq_gain_comp = 1024;
rf_calib_data->rxcal[i].rx_iq_phase_comp = 0;
}
// rf_calib_data->cal.rx_offset_i = 0;
// rf_calib_data->cal.rx_offset_q = 0;
rf_calib_data->cal.rbb_cap1_fc_i = 32;
rf_calib_data->cal.rbb_cap1_fc_q = 32;
rf_calib_data->cal.rbb_cap2_fc_i = 32;
rf_calib_data->cal.rbb_cap2_fc_q = 32;
rf_calib_data->cal.tx_dc_comp_i = 0;
rf_calib_data->cal.tx_dc_comp_q = 0;
for(i=0;i<8;i++){
rf_calib_data->txcal[i].tosdac_i = 32;
rf_calib_data->txcal[i].tosdac_q = 32;
rf_calib_data->txcal[i].tx_iq_gain_comp = 1024;
rf_calib_data->txcal[i].tx_iq_phase_comp = 0;
}
rf_calib_data->cal.tmx_csh = 6;
rf_calib_data->cal.tmx_csl = 6;//7;
#if 0
rf_calib_data->lo[E_RF_CHANNEL_2412M-1].fcal = 0x7c;
rf_calib_data->lo[E_RF_CHANNEL_2417M-1].fcal = 0x7b;
rf_calib_data->lo[E_RF_CHANNEL_2422M-1].fcal = 0x7a;
rf_calib_data->lo[E_RF_CHANNEL_2427M-1].fcal = 0x79;
rf_calib_data->lo[E_RF_CHANNEL_2432M-1].fcal = 0x78;
rf_calib_data->lo[E_RF_CHANNEL_2437M-1].fcal = 0x78;
rf_calib_data->lo[E_RF_CHANNEL_2442M-1].fcal = 0x77;
rf_calib_data->lo[E_RF_CHANNEL_2447M-1].fcal = 0x76;
rf_calib_data->lo[E_RF_CHANNEL_2452M-1].fcal = 0x75;
rf_calib_data->lo[E_RF_CHANNEL_2457M-1].fcal = 0x74;
rf_calib_data->lo[E_RF_CHANNEL_2462M-1].fcal = 0x74;
rf_calib_data->lo[E_RF_CHANNEL_2467M-1].fcal = 0x73;
rf_calib_data->lo[E_RF_CHANNEL_2472M-1].fcal = 0x72;
rf_calib_data->lo[E_RF_CHANNEL_2484M-1].fcal = 0x70;
rf_calib_data->lo[E_RF_CHANNEL_2505P6M-1].fcal = 0x67;
rf_calib_data->lo[E_RF_CHANNEL_2412M-1].acal = 0xf;
rf_calib_data->lo[E_RF_CHANNEL_2417M-1].acal = 0xf;
rf_calib_data->lo[E_RF_CHANNEL_2422M-1].acal = 0xf;
rf_calib_data->lo[E_RF_CHANNEL_2427M-1].acal = 0xf;
rf_calib_data->lo[E_RF_CHANNEL_2432M-1].acal = 0xf;
rf_calib_data->lo[E_RF_CHANNEL_2437M-1].acal = 0xf;
rf_calib_data->lo[E_RF_CHANNEL_2442M-1].acal = 0xf;
rf_calib_data->lo[E_RF_CHANNEL_2447M-1].acal = 0xf;
rf_calib_data->lo[E_RF_CHANNEL_2452M-1].acal = 0xf;
rf_calib_data->lo[E_RF_CHANNEL_2457M-1].acal = 0xf;
rf_calib_data->lo[E_RF_CHANNEL_2462M-1].acal = 0xf;
rf_calib_data->lo[E_RF_CHANNEL_2467M-1].acal = 0xf;
rf_calib_data->lo[E_RF_CHANNEL_2472M-1].acal = 0xf;
rf_calib_data->lo[E_RF_CHANNEL_2484M-1].acal = 0xf;
rf_calib_data->lo[E_RF_CHANNEL_2505P6M-1].acal = 0xf;
#endif
rf_calib_data->inited = 0;
}
|
mkroman/bl602-604
|
components/network/ble/blestack/src/host/keys.h
|
/*
* Copyright (c) 2020 Bouffalolab.
*
* This file is part of
* *** Bouffalolab Software Dev Kit ***
* (see www.bouffalolab.com).
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/* keys.h - Bluetooth key handling */
/*
* Copyright (c) 2015-2016 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
enum {
BT_KEYS_SLAVE_LTK = BIT(0),
BT_KEYS_IRK = BIT(1),
BT_KEYS_LTK = BIT(2),
BT_KEYS_LOCAL_CSRK = BIT(3),
BT_KEYS_REMOTE_CSRK = BIT(4),
BT_KEYS_LTK_P256 = BIT(5),
BT_KEYS_ALL = (BT_KEYS_SLAVE_LTK | BT_KEYS_IRK | \
BT_KEYS_LTK | BT_KEYS_LOCAL_CSRK | \
BT_KEYS_REMOTE_CSRK | BT_KEYS_LTK_P256),
};
enum {
BT_KEYS_AUTHENTICATED = BIT(0),
BT_KEYS_DEBUG = BIT(1),
BT_KEYS_ID_PENDING_ADD = BIT(2),
BT_KEYS_ID_PENDING_DEL = BIT(3),
BT_KEYS_SC = BIT(4),
};
struct bt_ltk {
u8_t rand[8];
u8_t ediv[2];
u8_t val[16];
};
struct bt_irk {
u8_t val[16];
bt_addr_t rpa;
};
struct bt_csrk {
u8_t val[16];
u32_t cnt;
};
struct bt_keys {
u8_t id;
bt_addr_le_t addr;
#if !defined(BFLB_BLE)
u8_t storage_start[0];
#endif
u8_t enc_size;
u8_t flags;
u16_t keys;
struct bt_ltk ltk;
struct bt_irk irk;
#if defined(CONFIG_BT_SIGNING)
struct bt_csrk local_csrk;
struct bt_csrk remote_csrk;
#endif /* BT_SIGNING */
#if !defined(CONFIG_BT_SMP_SC_PAIR_ONLY)
struct bt_ltk slave_ltk;
#endif /* CONFIG_BT_SMP_SC_PAIR_ONLY */
#if (defined(CONFIG_BT_KEYS_OVERWRITE_OLDEST))
u32_t aging_counter;
#endif /* CONFIG_BT_KEYS_OVERWRITE_OLDEST */
};
#if !defined(BFLB_BLE)
#define BT_KEYS_STORAGE_LEN (sizeof(struct bt_keys) - \
offsetof(struct bt_keys, storage_start))
#endif
void bt_keys_foreach(int type, void (*func)(struct bt_keys *keys, void *data),
void *data);
struct bt_keys *bt_keys_get_addr(u8_t id, const bt_addr_le_t *addr);
struct bt_keys *bt_keys_get_type(int type, u8_t id, const bt_addr_le_t *addr);
struct bt_keys *bt_keys_find(int type, u8_t id, const bt_addr_le_t *addr);
struct bt_keys *bt_keys_find_irk(u8_t id, const bt_addr_le_t *addr);
struct bt_keys *bt_keys_find_addr(u8_t id, const bt_addr_le_t *addr);
void bt_keys_add_type(struct bt_keys *keys, int type);
void bt_keys_clear(struct bt_keys *keys);
void bt_keys_clear_all(u8_t id);
#if defined(BFLB_BLE)
int keys_commit(void);
int bt_keys_load(void);
#endif
#if defined(CONFIG_BT_SETTINGS)
int bt_keys_store(struct bt_keys *keys);
#else
static inline int bt_keys_store(struct bt_keys *keys)
{
return 0;
}
#endif
enum {
BT_LINK_KEY_AUTHENTICATED = BIT(0),
BT_LINK_KEY_DEBUG = BIT(1),
BT_LINK_KEY_SC = BIT(2),
};
struct bt_keys_link_key {
bt_addr_t addr;
u8_t flags;
u8_t val[16];
};
struct bt_keys_link_key *bt_keys_get_link_key(const bt_addr_t *addr);
struct bt_keys_link_key *bt_keys_find_link_key(const bt_addr_t *addr);
void bt_keys_link_key_clear(struct bt_keys_link_key *link_key);
void bt_keys_link_key_clear_addr(const bt_addr_t *addr);
/* This function is used to signal that the key has been used for paring */
/* It updates the aging counter and saves it to flash if configuration option */
/* BT_KEYS_SAVE_AGING_COUNTER_ON_PAIRING is enabled */
void bt_keys_update_usage(u8_t id, const bt_addr_le_t *addr);
|
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