hexsha stringlengths 40 40 | size int64 6 1.05M | ext stringclasses 3 values | lang stringclasses 1 value | max_stars_repo_path stringlengths 4 232 | max_stars_repo_name stringlengths 7 106 | max_stars_repo_head_hexsha stringlengths 40 40 | max_stars_repo_licenses listlengths 1 7 | max_stars_count int64 1 33.5k ⌀ | max_stars_repo_stars_event_min_datetime stringlengths 24 24 ⌀ | max_stars_repo_stars_event_max_datetime stringlengths 24 24 ⌀ | max_issues_repo_path stringlengths 4 232 | max_issues_repo_name stringlengths 7 106 | max_issues_repo_head_hexsha stringlengths 40 40 | max_issues_repo_licenses listlengths 1 7 | max_issues_count int64 1 37.5k ⌀ | max_issues_repo_issues_event_min_datetime stringlengths 24 24 ⌀ | max_issues_repo_issues_event_max_datetime stringlengths 24 24 ⌀ | max_forks_repo_path stringlengths 4 232 | max_forks_repo_name stringlengths 7 106 | max_forks_repo_head_hexsha stringlengths 40 40 | max_forks_repo_licenses listlengths 1 7 | max_forks_count int64 1 12.6k ⌀ | max_forks_repo_forks_event_min_datetime stringlengths 24 24 ⌀ | max_forks_repo_forks_event_max_datetime stringlengths 24 24 ⌀ | content stringlengths 6 1.05M | avg_line_length float64 1.16 19.7k | max_line_length int64 2 938k | alphanum_fraction float64 0 1 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
05792d25e8359b27be8d3733bae35a2bd9a49e66 | 2,162 | asm | Assembly | savefile/maps/2275_GlitchlandMansion.asm | stranck/fools2018-1 | 1c506b17343fcdfa708aafaf8e596153e2c63254 | [
"MIT"
] | 35 | 2018-04-01T06:55:28.000Z | 2021-05-09T19:09:42.000Z | savefile/maps/2275_GlitchlandMansion.asm | stranck/fools2018-1 | 1c506b17343fcdfa708aafaf8e596153e2c63254 | [
"MIT"
] | 4 | 2018-04-01T15:32:55.000Z | 2019-02-23T20:46:49.000Z | savefile/maps/2275_GlitchlandMansion.asm | stranck/fools2018-1 | 1c506b17343fcdfa708aafaf8e596153e2c63254 | [
"MIT"
] | 12 | 2018-04-01T15:48:09.000Z | 2021-01-27T10:22:33.000Z | SECTION "Map_2275", ROM0[$B800]
Map_2275_Header:
hdr_tileset 22
hdr_dimensions 11, 8
hdr_pointers_a Map_2275_Blocks, Map_2275_TextPointers
hdr_pointers_b Map_2275_Script, Map_2275_Objects
hdr_pointers_c Map_2275_InitScript, Map_2275_RAMScript
hdr_palette $08
hdr_music MUSIC_CINNABAR_MANSION, AUDIO_3
hdr_connection NORTH, $0000, 0, 0
hdr_connection SOUTH, $0000, 0, 0
hdr_connection WEST, $0000, 0, 0
hdr_connection EAST, $0000, 0, 0
Map_2275_Objects:
hdr_border $2e
hdr_warp_count 5
hdr_warp 3, 2, 2, 9, $2276
hdr_warp 7, 15, 4, 6, $223A
hdr_warp 6, 15, 4, 6, $223A
hdr_warp 5, 15, 4, 6, $223A
hdr_warp 4, 15, 4, 6, $223A
hdr_sign_count 1
hdr_signpost 14, 13, $02
hdr_object_count 1
hdr_object SPRITE_HIKER, 11, 3, STAY, NONE, $01
Map_2275_RAMScript:
rs_end
Map_2275_Blocks:
db $3c,$3d,$3d,$3d,$3d,$3c,$3d,$3d,$3d,$3d,$3e
db $44,$6e,$35,$35,$35,$44,$06,$07,$53,$0e,$5d
db $50,$49,$49,$58,$2d,$48,$49,$49,$4a,$0e,$5d
db $44,$0e,$3f,$3b,$0e,$0e,$52,$0e,$0e,$0e,$5d
db $44,$11,$3f,$3b,$0a,$0e,$12,$0e,$47,$0e,$66
db $44,$11,$3f,$3b,$0a,$0e,$12,$0b,$0e,$0e,$46
db $44,$11,$3f,$3b,$0a,$0e,$55,$77,$0e,$47,$46
db $48,$58,$3f,$3b,$57,$49,$49,$49,$49,$49,$4a
Map_2275_TextPointers:
dw Map_2275_TX1
dw Map_2275_TX2
Map_2275_InitScript:
ld hl, Map_2275_ReturnCoords
call ArePlayerCoordsInArray
ret nc
ld a, $0e
ld [$c744], a
ret
Map_2275_Script:
ret
Map_2275_ReturnCoords:
db 2, 3, $ff
Map_2275_TX1:
TX_ASM
jp EnhancedTextOnly
text "This place has a very"
next "unsettling atmosphere..."
para "Well, how do you get"
next "upstairs? I think there"
cont "must be a switch somewhere."
done
Map_2275_TX2:
TX_ASM
ld a, $0e
ld [$c744], a
ld hl, .txt
call PrintTextEnhanced
jp TextScriptEnd
.txt
text "A secret switch."
para "You pressed it."
tx_snd SFX_SWITCH
done
| 26.365854 | 63 | 0.588344 |
68f12a7802c4628be06698b6ba9d706d6d8c1b36 | 12 | asm | Assembly | Testcases/lw.asm | 5ayam5/COL216-A4 | 8052ceccb01c830244ae48cf09540af989896069 | [
"MIT"
] | null | null | null | Testcases/lw.asm | 5ayam5/COL216-A4 | 8052ceccb01c830244ae48cf09540af989896069 | [
"MIT"
] | null | null | null | Testcases/lw.asm | 5ayam5/COL216-A4 | 8052ceccb01c830244ae48cf09540af989896069 | [
"MIT"
] | 2 | 2021-05-17T18:40:48.000Z | 2021-05-19T05:46:05.000Z | lw $t0, 1000 | 12 | 12 | 0.666667 |
daa573fe259b99ec13cc276b1d9301255da0201c | 640 | asm | Assembly | oeis/222/A222963.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/222/A222963.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/222/A222963.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A222963: a(n) = (p-3)*(p+3)/4 where p is the n-th prime.
; Submitted by Jon Maiga
; 0,4,10,28,40,70,88,130,208,238,340,418,460,550,700,868,928,1120,1258,1330,1558,1720,1978,2350,2548,2650,2860,2968,3190,4030,4288,4690,4828,5548,5698,6160,6640,6970,7480,8008,8188,9118,9310,9700,9898,11128,12430,12880,13108,13570,14278,14518,15748,16510,17290,18088,18358,19180,19738,20020,21460,23560,24178,24490,25120,27388,28390,30100,30448,31150,32218,33670,34780,35908,36670,37828,39400,40198,41818,43888,44308,46438,46870,48178,49060,50398,52210,53128,53590,54520,57358,59290,60268,62248,63250
seq $0,65091 ; Odd primes.
pow $0,2
sub $0,9
div $0,4
| 71.111111 | 500 | 0.764063 |
4682bac9678a2d7e4c10a07a623f30120d19d8bb | 275 | asm | Assembly | programs/oeis/056/A056119.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/056/A056119.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/056/A056119.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A056119: a(n) = n*(n+13)/2.
; 0,7,15,24,34,45,57,70,84,99,115,132,150,169,189,210,232,255,279,304,330,357,385,414,444,475,507,540,574,609,645,682,720,759,799,840,882,925,969,1014,1060,1107,1155,1204,1254,1305,1357,1410,1464,1519,1575
add $0,7
bin $0,2
mov $1,$0
sub $1,21
| 34.375 | 205 | 0.683636 |
596536c39a143c389bfc179fbd1fd5d39c01b6cf | 1,694 | asm | Assembly | programs/oeis/017/A017118.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/017/A017118.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/017/A017118.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A017118: a(n) = (8*n + 4)^6.
; 4096,2985984,64000000,481890304,2176782336,7256313856,19770609664,46656000000,98867482624,192699928576,351298031616,606355001344,1000000000000,1586874322944,2436396322816,3635215077376,5289852801024,7529536000000,10509215371264,14412774445056,19456426971136,25892303048704,34012224000000,44151665987584,56693912375296,72074394832896,90785223184384,113379904000000,140478247931904,172771465793536,211027453382656,256096265048064,308915776000000,370517533364224,442032795979776,524698762940416,619864990879744,729000000000000,853698068844544,995686217814016,1156831381426176,1339147769319424,1544804416000000,1776132919332864,2035635367776256,2325992456359936,2650071791407104,3010936384000000,3411853332189184,3856302691946496,4347986536861696,4890838206582784,5489031744000000,6146991521173504,6869402054004736,7661218005651456,8527674378686464,9474296896000000,10506912570445824,11631660463230976,12855002631049216,14183735261958144,15625000000000000,17186295458566144,18875488922505216,20700828238974976,22670953897037824,24794911296000000,27082163202494464,29542602396307456,32186564504948736,35024841026965504,38068692544000000,41329862121590784,44820588898717696,48553621866090496,52542233833181184,56800235584000000,61341990221615104,66182427701415936,71337059553120256,76821993791524864,82653950016000000,88850274698727424,95428956661682176,102408642742358016,109808653648236544,117649000000000000,125950398563487744,134734288670396416,144022848827723776,153839013515956224,164206490176000000,175149776384856064,186694177220038656,198865822812737536,211691686089723904,225199600704000000,239418279154192384,254377331092688896
mul $0,8
add $0,4
pow $0,6
| 242 | 1,634 | 0.921488 |
01ac9712cda470d92b3b5dbfa304cea577385c02 | 5,175 | asm | Assembly | src/asm/x86_64_sysv_elf_nasm.asm | nickelpro/C11-Fibers | 38d64745fce21072c9cc76492bc0decf066bab5d | [
"Zlib"
] | null | null | null | src/asm/x86_64_sysv_elf_nasm.asm | nickelpro/C11-Fibers | 38d64745fce21072c9cc76492bc0decf066bab5d | [
"Zlib"
] | null | null | null | src/asm/x86_64_sysv_elf_nasm.asm | nickelpro/C11-Fibers | 38d64745fce21072c9cc76492bc0decf066bab5d | [
"Zlib"
] | null | null | null | ; This is just Boost.Context in nasm
; https://github.com/boostorg/context
; ****************************************************************************************
; * *
; * ---------------------------------------------------------------------------------- *
; * | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | *
; * ---------------------------------------------------------------------------------- *
; * | 0x0 | 0x4 | 0x8 | 0xc | 0x10 | 0x14 | 0x18 | 0x1c | *
; * ---------------------------------------------------------------------------------- *
; * | fc_mxcsr|fc_x87_cw| R12 | R13 | R14 | *
; * ---------------------------------------------------------------------------------- *
; * ---------------------------------------------------------------------------------- *
; * | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | *
; * ---------------------------------------------------------------------------------- *
; * | 0x20 | 0x24 | 0x28 | 0x2c | 0x30 | 0x34 | 0x38 | 0x3c | *
; * ---------------------------------------------------------------------------------- *
; * | R15 | RBX | RBP | vgc_fiber *return | *
; * ---------------------------------------------------------------------------------- *
; * ---------------------------------------------------------------------------------- *
; * | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | *
; * ---------------------------------------------------------------------------------- *
; * | 0x40 | 0x44 | 0x48 | 0x4c | 0x50 | 0x54 | 0x58 | 0x5c | *
; * ---------------------------------------------------------------------------------- *
; * | RIP | void *data | void *ctx | fiber_data *fd | *
; * ---------------------------------------------------------------------------------- *
; * *
; ****************************************************************************************
section .text
; void *ctx vgc_make(void *base, void *limit, vgc_proc proc);
global vgc_make
vgc_make:
mov rax, rdi ; Grab the bottom of the context stack
sub rax, 68h ; Reserve space on the context stack
stmxcsr [rax] ; Save MMX control/status word
fnstcw [rax + 4h] ; Save x87 control word
mov [rax + 28h], rdx ; Store proc address at RBX
lea rcx, [rax + 48h] ; Calculate/store the address of return ptr
mov [rax + 38h], rcx
lea rcx, [rel finish] ; Calculate/store the address of finish at RBP
mov [rax + 30h], rcx
lea rcx, [rel trampoline] ; Calculate/store the address of trampoline
mov [rax + 40h], rcx
ret ; Return pointer to context
; Fix the stack before jumping into the passed vgc_proc
trampoline:
push rbp ; Set finish as return addr
jmp rbx ; Jump to the context function
; Kill the process if a context returns from the bottom stack frame
finish:
xor rdi, rdi ; Exit code is zero
mov rax, 60d ; Call _exit
syscall
hlt
; vgc_fiber vgc_jump(vgc_fiber)
global vgc_jump
vgc_jump:
mov rsi, [rsp + 8h] ; Grab data pointer
mov rdx, [rsp + 10h] ; Grab context pointer
mov rcx, [rsp + 18h] ; Grab fiber data pointer
sub rsp, 40h ; Allocate stack space
stmxcsr [rsp] ; Save MMX control/status word
fnstcw [rsp + 4h] ; Save x87 control word
mov [rsp + 8h], r12 ; Save R12
mov [rsp + 10h], r13 ; Save R13
mov [rsp + 18h], r14 ; Save R14
mov [rsp + 20h], r15 ; Save R15
mov [rsp + 28h], rbx ; Save RBX
mov [rsp + 30h], rbp ; Save RBP
mov [rsp + 38h], rdi ; Save return fiber struct address
mov rdi, rsp ; Store the current stack pointer
mov rsp, rdx ; Switch into the destination stack
ldmxcsr [rsp] ; Restore MMX control/status word
fldcw [rsp + 4h] ; Restore x87 control word
mov r12, [rsp + 8h] ; Restore R12
mov r13, [rsp + 10h] ; Restore R13
mov r14, [rsp + 18h] ; Restore R14
mov r15, [rsp + 20h] ; Restore R15
mov rbx, [rsp + 28h] ; Restore RBX
mov rbp, [rsp + 30h] ; Restore RBP
mov rax, [rsp + 38h] ; Restore fiber return struct
mov rdx, [rsp + 40h] ; Restore return address
mov [rax], rsi ; Restore user data pointer
mov [rax + 8h], rdi ; Restore parent context
mov [rax + 10h], rcx ; Restore fiber data struct
; Note, don't use ret
; The Return Stack Buffer will miss every time due to the context switch
; Much better to use the general indirect branch predictor and only miss
; _most_ of the time.
add rsp, 48h
jmp rdx
| 45.79646 | 90 | 0.373527 |
35ba6fd0c9b4b71099ce63d1f97e80945193da1d | 7,260 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xa0_notsx.log_21829_1060.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xa0_notsx.log_21829_1060.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xa0_notsx.log_21829_1060.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r12
push %r8
push %r9
push %rax
push %rbx
push %rcx
push %rdi
push %rsi
lea addresses_UC_ht+0x12216, %rsi
add %r9, %r9
movl $0x61626364, (%rsi)
nop
nop
add $35927, %r8
lea addresses_D_ht+0x147b6, %rax
clflush (%rax)
nop
nop
nop
nop
nop
lfence
mov $0x6162636465666768, %r12
movq %r12, %xmm0
and $0xffffffffffffffc0, %rax
movntdq %xmm0, (%rax)
nop
nop
sub %r9, %r9
lea addresses_WT_ht+0x23e, %r12
nop
nop
nop
nop
and $1689, %r9
mov (%r12), %rsi
nop
nop
nop
nop
nop
add %r12, %r12
lea addresses_D_ht+0x1c16, %rsi
xor $25507, %r12
mov $0x6162636465666768, %rdi
movq %rdi, (%rsi)
nop
inc %rbx
lea addresses_normal_ht+0x17116, %rsi
lea addresses_normal_ht+0x1ca16, %rdi
nop
add %r12, %r12
mov $26, %rcx
rep movsw
nop
add %rsi, %rsi
lea addresses_WT_ht+0x518e, %rcx
nop
nop
nop
nop
nop
add %rdi, %rdi
movb (%rcx), %bl
nop
nop
nop
nop
cmp $41514, %rsi
lea addresses_WC_ht+0x16aa6, %rdi
nop
nop
nop
nop
dec %r8
mov (%rdi), %r9
nop
nop
nop
nop
nop
cmp %rax, %rax
lea addresses_D_ht+0x11016, %rsi
lea addresses_UC_ht+0x63da, %rdi
nop
nop
nop
nop
nop
inc %r12
mov $95, %rcx
rep movsl
nop
nop
add %r12, %r12
lea addresses_WC_ht+0xafc6, %rdi
xor $7645, %rsi
vmovups (%rdi), %ymm0
vextracti128 $1, %ymm0, %xmm0
vpextrq $0, %xmm0, %r12
add %rcx, %rcx
lea addresses_A_ht+0x1ce16, %rbx
nop
nop
nop
nop
sub $50423, %rdi
movb (%rbx), %r12b
nop
nop
nop
xor %r8, %r8
lea addresses_UC_ht+0x11296, %r9
nop
nop
nop
nop
cmp $38439, %r12
mov $0x6162636465666768, %rcx
movq %rcx, %xmm1
vmovups %ymm1, (%r9)
nop
inc %rdi
lea addresses_normal_ht+0x1b6d6, %rsi
lea addresses_D_ht+0x16516, %rdi
nop
dec %rbx
mov $13, %rcx
rep movsl
and $50808, %r9
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %rax
pop %r9
pop %r8
pop %r12
ret
.global s_faulty_load
s_faulty_load:
push %r12
push %r13
push %r15
push %r8
push %rbp
push %rdi
push %rdx
// Store
lea addresses_WC+0x10556, %rbp
nop
nop
nop
nop
nop
and $42306, %r8
mov $0x5152535455565758, %rdi
movq %rdi, %xmm1
vmovups %ymm1, (%rbp)
nop
nop
xor %r15, %r15
// Faulty Load
lea addresses_WT+0x8216, %r12
inc %r13
mov (%r12), %r15d
lea oracles, %r13
and $0xff, %r15
shlq $12, %r15
mov (%r13,%r15,1), %r15
pop %rdx
pop %rdi
pop %rbp
pop %r8
pop %r15
pop %r13
pop %r12
ret
/*
<gen_faulty_load>
[REF]
{'src': {'type': 'addresses_WT', 'AVXalign': False, 'size': 1, 'NT': False, 'same': False, 'congruent': 0}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'type': 'addresses_WC', 'AVXalign': False, 'size': 32, 'NT': False, 'same': False, 'congruent': 2}}
[Faulty Load]
{'src': {'type': 'addresses_WT', 'AVXalign': False, 'size': 4, 'NT': False, 'same': True, 'congruent': 0}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'OP': 'STOR', 'dst': {'type': 'addresses_UC_ht', 'AVXalign': True, 'size': 4, 'NT': False, 'same': False, 'congruent': 9}}
{'OP': 'STOR', 'dst': {'type': 'addresses_D_ht', 'AVXalign': False, 'size': 16, 'NT': True, 'same': True, 'congruent': 4}}
{'src': {'type': 'addresses_WT_ht', 'AVXalign': False, 'size': 8, 'NT': False, 'same': False, 'congruent': 2}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'type': 'addresses_D_ht', 'AVXalign': False, 'size': 8, 'NT': False, 'same': False, 'congruent': 8}}
{'src': {'type': 'addresses_normal_ht', 'congruent': 8, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_normal_ht', 'congruent': 11, 'same': False}}
{'src': {'type': 'addresses_WT_ht', 'AVXalign': False, 'size': 1, 'NT': False, 'same': False, 'congruent': 3}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_WC_ht', 'AVXalign': False, 'size': 8, 'NT': False, 'same': False, 'congruent': 4}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_D_ht', 'congruent': 9, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_UC_ht', 'congruent': 1, 'same': False}}
{'src': {'type': 'addresses_WC_ht', 'AVXalign': False, 'size': 32, 'NT': False, 'same': False, 'congruent': 4}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_A_ht', 'AVXalign': False, 'size': 1, 'NT': False, 'same': False, 'congruent': 10}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'type': 'addresses_UC_ht', 'AVXalign': False, 'size': 32, 'NT': False, 'same': False, 'congruent': 6}}
{'src': {'type': 'addresses_normal_ht', 'congruent': 5, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_D_ht', 'congruent': 8, 'same': False}}
{'39': 21829}
39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39
*/
| 34.903846 | 2,999 | 0.658127 |
21ea7b4d850a7c1559ca74b52c226ca2ba250a79 | 286 | asm | Assembly | programs/oeis/291/A291307.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/291/A291307.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/291/A291307.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A291307: The arithmetic function v_6(n,2).
; 0,0,1,2,0,3,3,3,4,5,3,6,6,6,7,8,6,9,9,9,10,11,9,12,12,12,13,14,12,15,15,15,16,17,15,18,18,18,19,20,18,21,21,21,22,23,21,24,24,24,25,26,24,27,27,27,28,29,27,30,30,30,31,32,30,33,33,33,34
add $0,2
mov $1,$0
gcd $1,262146
sub $0,$1
div $0,2
| 31.777778 | 187 | 0.629371 |
05b061d295d78124232e7bf7155d35b53dd37cca | 809 | asm | Assembly | programs/oeis/033/A033487.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/033/A033487.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/033/A033487.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A033487: a(n) = n*(n+1)*(n+2)*(n+3)/4.
; 0,6,30,90,210,420,756,1260,1980,2970,4290,6006,8190,10920,14280,18360,23256,29070,35910,43890,53130,63756,75900,89700,105300,122850,142506,164430,188790,215760,245520,278256,314160,353430,396270,442890,493506,548340,607620,671580,740460,814506,893970,979110,1070190,1167480,1271256,1381800,1499400,1624350,1756950,1897506,2046330,2203740,2370060,2545620,2730756,2925810,3131130,3347070,3573990,3812256,4062240,4324320,4598880,4886310,5187006,5501370,5829810,6172740,6530580,6903756,7292700,7697850,8119650,8558550,9015006,9489480,9982440,10494360,11025720,11577006,12148710,12741330,13355370,13991340,14649756,15331140,16036020,16764930,17518410,18297006,19101270,19931760,20789040,21673680,22586256,23527350,24497550,25497450
sub $1,$0
bin $1,4
mul $1,6
mov $0,$1
| 101.125 | 728 | 0.820766 |
5eac0aaf60bccbcf0f1a0f27016d77f3a758fea8 | 646 | asm | Assembly | oeis/030/A030635.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/030/A030635.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/030/A030635.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A030635: Numbers with 17 divisors.
; Submitted by Jon Maiga
; 65536,43046721,152587890625,33232930569601,45949729863572161,665416609183179841,48661191875666868481,288441413567621167681,6132610415680998648961,250246473680347348787521,727423121747185263828481,12337511914217166362274241,63759030914653054346432641,136614025729312093462315201,566977372488557307219621121,3876269050118516845397872321,21559177407076402401757871041,36751693856637464631913392961,164890958756244164895763202881,416997623116370028124580469121,650377879817809571042122834561
mul $0,2
max $0,1
seq $0,173919 ; Numbers that are prime or one less than a prime.
pow $0,16
| 71.777778 | 489 | 0.894737 |
97909ad4c4443f5e9b25cac2d5b3e43e053a64c4 | 4,106 | asm | Assembly | header.asm | fis/chainlance | 34360847b04e3eeed276b10216d65860ecdd5501 | [
"MIT"
] | 4 | 2015-03-19T17:03:01.000Z | 2019-05-12T14:30:43.000Z | header.asm | fis/chainlance | 34360847b04e3eeed276b10216d65860ecdd5501 | [
"MIT"
] | null | null | null | header.asm | fis/chainlance | 34360847b04e3eeed276b10216d65860ecdd5501 | [
"MIT"
] | 1 | 2016-03-12T00:53:04.000Z | 2016-03-12T00:53:04.000Z | ;;; chainlance asm source -*- mode: nasm -*-
BITS 64
SECTION .text
;;; Symbolic names for fixed registers
%define rTapeSize rdx
%define rTapeSized edx
%define rTapeSizeb dl
%define rTapeA rbx
%define rTapeB rcx
%define rTapeAb bl
%define rTapeBb cl
%define rRepAd r8d
%define rRepBd r9d
%define rRepSA r10
%define rRepSB r11
%define rSaveIP r12
%define rCell2 r13b
%define rTapeBase r14
%define rCycles r15
%define rCyclesd r15d
;;; Top-level logic for BF Joust matches
%define MAXCYCLES 100000
%define MINTAPE 10
%define MAXTAPE 30
global main
main:
;; miscellaneous initialization
mov rbp, rsp
cld ; make stosb and such always advance
xor esi, esi ; sum of wins for progA
;; run through all tape sizes with progA vs progB
xor rTapeSized, rTapeSized
mov rTapeSizeb, MINTAPE
loop1: lea rSaveIP, [rel progB]
call run
inc rTapeSizeb
cmp rTapeSizeb, MAXTAPE
jbe loop1
;; run through all tape sizes with progA vs progB2 (reverse polarity)
xor rTapeSized, rTapeSized
mov rTapeSizeb, MINTAPE
loop2: lea rSaveIP, [rel progB2]
call run
inc rTapeSizeb
cmp rTapeSizeb, MAXTAPE
jbe loop2
;; all done, return the result (-42 .. 42 for tapes 10 .. 30)
mov eax, esi
ret
;;; Single-match execution and initialization
run: ;; runs a single match
;; rSaveIP should be set to either progB or progB2
;; rTapeSize should be set to the proper tape size
;; initialize tape for tape of rTapeSize bytes
;; also sets rTapeBase, rTapeA, rTapeB, rCell2
xor eax, eax
lea rdi, [rel tape]
mov rTapeBase, rdi ; save start of tape
mov ecx, rTapeSized
rep stosb ; tape[0 .. size-1] = 0
xor rTapeA, rTapeA ; tape pointer for A = 0 = left end
lea rTapeB, [rTapeA+rTapeSize-1] ; tape pointer for B = size-1 = right end
mov al, 128
mov [rTapeBase], al ; tape[0] = flagA = 128
mov [rTapeBase+rTapeB], al ; tape[size-1] = flagB = 128
mov rCell2, al ; copy of tape[B] for the first cycle
;; initialize rep counter stack
%if MAXREPS > 1
lea rRepSA, [rel repStackA]
lea rRepSB, [rel repStackB]
%endif
;; start executing this round
mov rCyclesd, MAXCYCLES ; initialize cycle counter
xor edi, edi ; used for "death flags"
runit: jmp progA
;;; Helper macros and snippets for the compiled code
;; context switch ProgA -> ProgB
%macro CTX_ProgA 0
lea rax, [rel %%next]
xchg rax, rSaveIP
jmp (rax)
%%next:
%endmacro
;; context switch ProgB -> ProgA
%macro CTX_ProgB 0
lea rax, [rel %%next]
jmp nextcycle
%%next:
%endmacro
;; end-of-cycle code
nextcycle:
cmp byte [rTapeBase], 0
jz .flagA ; A's flag is zero
btr edi, 1 ; A's flag is nonzero, clear flag
.testB: cmp byte [rTapeBase + rTapeSize - 1], 0
jz .flagB ; B's flag is zero
btr edi, 2 ; B's flag is nonzero, clear flag
.cont: bt edi, 0
jc .winB ; A totally dead, B wins
dec rCycles
jz tie ; tie if out of cycles
mov rCell2, [rTapeBase + rTapeB] ; save a copy for ProgB [ check
xchg rax, rSaveIP
jmp (rax)
.flagA:
bts edi, 1 ; ensure the zero gets flagged
jnc .testB ; first offense, let live and test B
bts edi, 0 ; second offense, flag totally dead
jmp .testB ; test B in case of ties
.flagB:
bts edi, 2 ; make sure it gets flagged
jnc .cont ; first offense, let live
bt edi, 0
jc tie ; A also dead. so tie
inc esi
ret ; A wins (esi +1)
.winB:
dec esi
ret ; B wins (esi -1)
;; A fell of the tape (middle of cycle, must wait for tie)
fallA:
bts edi, 0 ; flag A as totally dead
CTX_ProgA ; let B run to check for tie
;; B fell of the tape (end of cycle, can decide)
fallB:
bt edi, 0
jc tie ; A also totally dead, tie
cmp byte [rTapeBase], 0
jnz .notie ; A known to be alive, A wins
bt edi, 1
jc tie ; A dead by flag now, tie
.notie: inc esi
ret ; A wind (esi +1)
;; in case of a tie
tie: ret ; tie (no change in esi)
;;; Statically allocated memory for tape and such
SECTION .data
tape: times 30 db 0
%if MAXREPS > 1
repStackA:
times MAXREPS-1 dd 0
repStackB:
times MAXREPS-1 dd 0
%endif
SECTION .text
;;; Program code below
| 21.724868 | 75 | 0.677789 |
1dfc7296d04febadc57922e33a7597a339f5f8a5 | 381 | asm | Assembly | programs/oeis/114/A114986.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/114/A114986.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/114/A114986.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A114986: Characteristic function of (A000201 prefixed with 0).
; 1,1,0,1,1,0,1,0,1,1,0,1,1,0,1,0,1,1,0,1,0,1,1,0,1,1,0,1,0,1,1,0,1,1,0,1,0,1,1,0,1,0,1,1,0,1,1,0,1,0,1,1,0,1,0,1,1,0,1,1,0,1,0,1,1,0,1,1,0,1,0,1,1,0,1,0,1,1,0,1,1,0,1,0,1,1,0,1,1,0,1,0,1,1,0,1,0,1,1,0
add $0,1
max $0,2
seq $0,189661 ; Fixed point of the morphism 0->010, 1->10 starting with 0.
pow $1,$0
mov $0,$1
| 42.333333 | 201 | 0.587927 |
3f7d7b78c6ef817a591ad910beee2a557bcef965 | 351 | asm | Assembly | oeis/131/A131026.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/131/A131026.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/131/A131026.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A131026: Periodic sequence (2, 2, 1, 0, 0, 1).
; Submitted by Jon Maiga
; 2,2,1,0,0,1,2,2,1,0,0,1,2,2,1,0,0,1,2,2,1,0,0,1,2,2,1,0,0,1,2,2,1,0,0,1,2,2,1,0,0,1,2,2,1,0,0,1,2,2,1,0,0,1,2,2,1,0,0,1,2,2,1,0,0,1,2,2,1,0,0,1,2,2,1,0,0,1,2,2,1,0,0,1,2,2,1,0,0,1,2,2,1,0,0,1,2,2,1,0
mov $2,1
lpb $0
sub $0,1
add $2,$1
sub $1,$2
lpe
mov $0,$2
add $0,1
| 27 | 201 | 0.527066 |
ed632ce068abf14ce529743033d7befb34617fc9 | 368 | asm | Assembly | programs/oeis/088/A088722.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/088/A088722.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/088/A088722.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A088722: Number of divisors d>1 of n such that also d+1 divides n.
; 0,0,0,0,0,1,0,0,0,0,0,2,0,0,0,0,0,1,0,1,0,0,0,2,0,0,0,0,0,2,0,0,0,0,0,2,0,0,0,1,0,2,0,0,0,0,0,2,0,0,0,0,0,1,0,1,0,0,0,4,0,0,0,0,0,1,0,0,0,0,0,3,0,0,0,0,0,1,0,1,0,0,0,3,0,0,0,0,0,3,0,0,0,0,0,2,0,0,0,1
seq $0,129308 ; a(n) is the number of positive integers k such that k*(k+1) divides n.
trn $0,1
| 61.333333 | 201 | 0.586957 |
a0cc0dbba91f910d0898d8df89846eb17b04bfcc | 423 | asm | Assembly | oeis/133/A133689.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/133/A133689.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/133/A133689.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A133689: a(n) = smallest integer that is > n and is a multiple of every proper divisor of n.
; Submitted by Jamie Morken(s2)
; 3,4,6,6,12,8,12,12,20,12,24,14,28,30,24,18,36,20,40,42,44,24,48,30,52,36,56,30,60,32,48,66,68,70,72,38,76,78,80,42,84,44,88,90,92,48,96,56,100,102,104,54,108,110,112,114,116,60
add $0,1
mov $1,$0
seq $1,48671 ; a(n) is the least common multiple of the proper divisors of n.
add $0,$1
add $0,1
| 42.3 | 178 | 0.680851 |
cd9069831bda82f51be36203466246c9c9e7b6e5 | 3,322 | asm | Assembly | programs/oeis/107/A107959.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/107/A107959.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/107/A107959.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A107959: a(n) = (n+1)(n+2)^2*(n+3)^2*(n+4)(n^2 + 5n + 5)/720.
; 1,22,190,1015,4018,12936,35784,88110,197835,412126,806806,1498861,2662660,4550560,7518624,12058236,18834453,28731990,42909790,62865187,90508726,128250760,179101000,246782250,335859615,451886526,601568982,792949465,1035612040,1340910208,1722219136,2195213944,2778175785,3492327510,4362200766,5416036431,6686220346,8209756360,10028778760,12191106214,14750839411,17769004638,21314245590,25463565765,30303123852,35929084576,42448527520,49980416500,58656632125,68623070230,80040808926,93087347067,107957916990,124866874440,144049168648,165761895586,190285937479,217927691710,249020892310,283928527281,323044855056,366797523456,415649794560,470102878960,530698382929,598020872086,672700555198,755416091815,846897527490,947929360392,1059353743176,1182073824030,1317057230875,1465339702750,1628028872470,1806308204701,2001441093652,2214775124640,2447746503840,2701884660588,2978817026661,3280273997014,3608094076510,3964229217235,4350750351046,4769853122056,5223863823816,5715245546010,6246604535535,6820696776894,7440434796886,8108894698633,8829323430040,9605146291840,10439974690432,11337614140776,12302072524665,13337568609750,14448540834750,15639656366335,16915820433226,18282185943112,19744163388040,21307431043990,22977945470403,24761952315486,26665997433174,28696938317685,30861955861660,33168566443936,35624634353056,38238384552676,41018415795085,43973714089110,47113666528734,50448075488811,53987173194318,57741636669640,61722603074440,65941685432722,70410988761751,75143126607550,80151237993750,85449004790625,91050669511200,96971053541376,103225575811072,109830271913440,116801813679265,124157529213718,131915423402686,140094198895959,148713277574610,157792822509960,167353760421576,177417804641806,188007478594411,199146139794910,210858004380310,223168172175949,236102652307236,249688389364128,263953290126240,278926250856540,294637185171637,311117052496726,328397887113310,346512827807875,365496148129750,385383287266440,406210881544776,428016796566282,450840159985215,474721394937790,499702254131158,525825854600761,553136713144744,581680782444160,611505487877760,642659765040216,675194097972681,709160558114646,744612843986110,781606321609135,820198065677914,860446901486536,902413447623688,946160159443590,991751373322515,1039253351710302,1088734328986326,1140264558129445,1193916358211500,1249764162724000,1307884568747680,1368356386974676,1431260692593117,1496680877043990,1564702700660190,1635414346197723,1708906473269086,1785272273688904,1864607527741960,1947010661383810,2032582804384231,2121427849423806,2213652512154006,2309366392231185,2408682035334960,2511714996181504,2618583902542336,2729410520279248,2844319819406065,2963440041187990,3086902766289342,3214842983980551,3347399162415330,3484713319989000,3626931097789000,3774201833148670,3926678634315451,4084518456244702,4247882177530390,4416934678483965,4591844920372788,4772786025829536,4959935360444064,5153474615549260,5353589892212485,5560471786444246,5774315475635806,5995320806237491,6223692382689510,6459639657617160,6703377023302344,6955123904443386,7215104852215183,7483549639641790,7760693358293590,8046776516321257,8342045137838776,8646750863667840,8961151053456000
add $0,2
mov $1,$0
add $0,1
mul $1,$0
mov $2,$1
bin $2,3
mul $1,$2
div $2,$2
sub $1,$2
div $1,120
add $1,1
| 221.466667 | 3,149 | 0.90578 |
15a1013695699e87fb50a1c0b2205452f1dd922d | 3,194 | asm | Assembly | AssemblyLanguage_Lab/ASB_LAB_4/main1.asm | strawberrylin/Hust_CS_Lab | 2a93d9cdc9bb6d981f9bfa3865af4ffd235a39e1 | [
"MIT"
] | 1 | 2018-09-27T07:30:59.000Z | 2018-09-27T07:30:59.000Z | AssemblyLanguage_Lab/ASB_LAB_4/main1.asm | strawberrylin/Hust_CS_Lab | 2a93d9cdc9bb6d981f9bfa3865af4ffd235a39e1 | [
"MIT"
] | null | null | null | AssemblyLanguage_Lab/ASB_LAB_4/main1.asm | strawberrylin/Hust_CS_Lab | 2a93d9cdc9bb6d981f9bfa3865af4ffd235a39e1 | [
"MIT"
] | null | null | null | ;main source code
;@author strawberrylin
.386
data segment use16
bufc db '1:Input the name and score',0ah,0dh,
'2:Figure the sum and the average score',0ah,0dh,
'3:Sort the score',0ah,0dh,
'4:Output the score from high to low',0ah,0dh,
'Enter your choose:','$'
buft2 db 0ah,0dh,'Input name:$'
buft3 db 0ah,0dh,'Input chinese score:$'
buft4 db 0ah,0dh,'Input math score:$'
buft5 db 0ah,0dh,'Input english score:$'
buf db 20
db ?
db 20 dup(0)
store db 200 dup(0)
sum dw 0
avr db 0
data ends
stack segment use16 stack
db 200 dup(0)
stack ends
code segment use16
assume ds:data,cs:code,ss:stack
start:
mov ax, data
mov ds, ax
lea di, store ; 信息储存位置
mov cx, 0 ; 学生数
show:
lea dx, bufc
mov ah, 9
int 21h
mov ah, 1 ;input choose
int 21h
cmp al, '1'
jz function1
cmp al, '2'
jz function2
cmp al, '3'
jz function3
cmp al, '4'
jz function4
jmp show
function1:
call far ptr INFOIN
jmp show
function2:
function3:
function4:
mov ah, 4ch
int 21h
code ends
;子程序名：INFOIN
;功能：录入学生信息
;入口参数：储存学生信息的内存地址的di
;出口参数：无
proce segment use16
assume cs:proce
INFOIN proc far
inc cx
push dx
push ax
push cx
push si
lea dx, buft2 ;input name
mov ah, 9
int 21h
lea dx, buf
mov ah, 10
int 21h
mov cl, buf+1
mov ch, 0
lea si, buf+2
begin:
mov al, [si]
mov [di], al
inc si
inc di
dec cx
jnz begin
mov cl, buf+1
mov ch, 0
add di, 10
sub di, cx
lea dx, buft3 ;input chns
mov ah, 9
int 21h
call GSCORE
lea dx, buft4 ;Input maths
mov ah, 9
int 21h
call GSCORE
lea dx, buft5 ;Input engs
mov ah, 9
int 21h
call GSCORE
mov ax, 0
mov dx, 0
mov dl, [di-1]
add ax,dx
mov dl, [di-2]
add ax, dx
mov dl, [di-3]
add ax, dx
mov WORD PTR[di], ax
mov dx, 0
mov dl, 3
div dl
inc di
inc di
mov [di], al
inc di
pop si
pop cx
pop ax
pop dx
ret
INFOIN endp
;子程序名：GSCORE
;功能：得到输入的成绩
;入口参数：储存学生信息的偏移地址di
;出口参数：ax，存储对应的成绩
GSCORE proc
push dx
push bx
push si
push cx
lea dx, buf
mov ah, 10
int 21h
mov cl, buf+1
lea si, buf+2
mov ax, 0
loapi:
mov bl, [si]
sub bl, 30h
mov bh, 0
imul ax, 10
add ax, bx
inc si
dec cx
jnz loapi
mov [di], al
inc di
pop cx
pop si
pop bx
pop dx
ret
GSCORE endp
proce ends
end start
| 19.9625 | 61 | 0.456168 |
9c54b9b90b91112e075294e6a5e303e11fa48036 | 308 | asm | Assembly | data/mapHeaders/CinnabarPokecenter.asm | AmateurPanda92/pokemon-rby-dx | f7ba1cc50b22d93ed176571e074a52d73360da93 | [
"MIT"
] | 9 | 2020-07-12T19:44:21.000Z | 2022-03-03T23:32:40.000Z | data/mapHeaders/CinnabarPokecenter.asm | JStar-debug2020/pokemon-rby-dx | c2fdd8145d96683addbd8d9075f946a68d1527a1 | [
"MIT"
] | 7 | 2020-07-16T10:48:52.000Z | 2021-01-28T18:32:02.000Z | data/mapHeaders/CinnabarPokecenter.asm | JStar-debug2020/pokemon-rby-dx | c2fdd8145d96683addbd8d9075f946a68d1527a1 | [
"MIT"
] | 2 | 2021-03-28T18:33:43.000Z | 2021-05-06T13:12:09.000Z | CinnabarPokecenter_h:
db POKECENTER ; tileset
db CINNABAR_POKECENTER_HEIGHT, CINNABAR_POKECENTER_WIDTH ; dimensions (y, x)
dw CinnabarPokecenter_Blocks ; blocks
dw CinnabarPokecenter_TextPointers ; texts
dw CinnabarPokecenter_Script ; scripts
db 0 ; connections
dw CinnabarPokecenter_Object ; objects
| 34.222222 | 77 | 0.834416 |
b92227f169e2dc4dbd8b5c78f73c2694acdd300e | 4,990 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0xca.log_21829_1.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0xca.log_21829_1.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0xca.log_21829_1.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r14
push %r9
push %rbp
push %rbx
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_A_ht+0x16390, %rsi
lea addresses_WC_ht+0x16196, %rdi
clflush (%rdi)
nop
nop
nop
nop
sub %r14, %r14
mov $33, %rcx
rep movsw
nop
nop
sub %r9, %r9
lea addresses_A_ht+0x10f16, %rbx
clflush (%rbx)
nop
cmp %rbp, %rbp
mov $0x6162636465666768, %r14
movq %r14, %xmm4
and $0xffffffffffffffc0, %rbx
movaps %xmm4, (%rbx)
xor $13805, %rbp
lea addresses_A_ht+0x15ca6, %rsi
clflush (%rsi)
nop
nop
nop
nop
nop
and $24977, %rbx
mov (%rsi), %edi
nop
nop
nop
add %r9, %r9
lea addresses_UC_ht+0x18996, %rsi
lea addresses_UC_ht+0x185f6, %rdi
clflush (%rsi)
xor $63650, %rdx
mov $44, %rcx
rep movsb
nop
nop
sub %rbx, %rbx
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbx
pop %rbp
pop %r9
pop %r14
ret
.global s_faulty_load
s_faulty_load:
push %r12
push %r15
push %r9
push %rbx
push %rdx
// Faulty Load
lea addresses_normal+0x1d196, %r9
nop
nop
cmp %rbx, %rbx
mov (%r9), %r15w
lea oracles, %rbx
and $0xff, %r15
shlq $12, %r15
mov (%rbx,%r15,1), %r15
pop %rdx
pop %rbx
pop %r9
pop %r15
pop %r12
ret
/*
<gen_faulty_load>
[REF]
{'src': {'congruent': 0, 'AVXalign': False, 'same': True, 'size': 8, 'NT': True, 'type': 'addresses_normal'}, 'OP': 'LOAD'}
[Faulty Load]
{'src': {'congruent': 0, 'AVXalign': False, 'same': True, 'size': 2, 'NT': False, 'type': 'addresses_normal'}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'congruent': 1, 'same': False, 'type': 'addresses_A_ht'}, 'OP': 'REPM', 'dst': {'congruent': 11, 'same': False, 'type': 'addresses_WC_ht'}}
{'OP': 'STOR', 'dst': {'congruent': 7, 'AVXalign': True, 'same': False, 'size': 16, 'NT': False, 'type': 'addresses_A_ht'}}
{'src': {'congruent': 4, 'AVXalign': False, 'same': False, 'size': 4, 'NT': False, 'type': 'addresses_A_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 8, 'same': False, 'type': 'addresses_UC_ht'}, 'OP': 'REPM', 'dst': {'congruent': 5, 'same': False, 'type': 'addresses_UC_ht'}}
{'34': 21829}
34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34
*/
| 47.980769 | 2,999 | 0.662725 |
395495462cfb599afa87641c663bc2e729dfd44e | 602 | asm | Assembly | oeis/052/A052849.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/052/A052849.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/052/A052849.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A052849: a(0) = 0; a(n+1) = 2*n! (n >= 0).
; 0,2,4,12,48,240,1440,10080,80640,725760,7257600,79833600,958003200,12454041600,174356582400,2615348736000,41845579776000,711374856192000,12804747411456000,243290200817664000,4865804016353280000,102181884343418880000,2248001455555215360000,51704033477769953280000,1240896803466478878720000,31022420086661971968000000,806582922253211271168000000,21777738900836704321536000000,609776689223427721003008000000,17683523987479403909087232000000,530505719624382117272616960000000
mov $2,$0
sub $0,1
mov $3,$0
lpb $3
mul $2,$3
sub $3,1
lpe
mov $0,$2
mul $0,2
| 46.307692 | 473 | 0.830565 |
6b7433131c90d3e1ed1cfc2e2c8331e516afd323 | 3,600 | asm | Assembly | digger/bc02.asm | pdpdds/DOSDev | 5f81c5f94a55b866461f019e9ba8fe27c74039fa | [
"BSD-3-Clause"
] | 92 | 2015-04-10T17:45:11.000Z | 2022-03-30T17:58:51.000Z | digger/bc02.asm | MS-DOS-stuff/reenigne | 0a113990aef398550c6f14d1c7a33af1cb091887 | [
"Unlicense"
] | 2 | 2017-11-05T07:21:35.000Z | 2018-11-04T23:36:13.000Z | digger/bc02.asm | MS-DOS-stuff/reenigne | 0a113990aef398550c6f14d1c7a33af1cb091887 | [
"Unlicense"
] | 18 | 2015-04-11T20:32:44.000Z | 2021-11-06T05:19:57.000Z | ; Digger Remastered
; Copyright (c) Andrew Jenner 1998-2004 */
PUBLIC N_LDIV@,F_LDIV@,LDIV@,N_LUDIV@,LUDIV@,F_LUDIV@,N_LMOD@,LMOD@,F_LMOD@
PUBLIC N_LUMOD@,LUMOD@,F_LUMOD@,N_LXLSH@,F_LXLSH@,LXLSH@,N_LXMUL@,N_PADA@
PUBLIC F_PADA@,PADA@,N_PSBA@,F_PSBA@,PSBA@,N_PADD@,F_PADD@,PADD@,N_PSUB@
PUBLIC F_PSUB@,PSUB@,N_SCOPY@
_TEXT SEGMENT WORD PUBLIC 'CODE'
N_LDIV@:
POP CX
PUSH CS
PUSH CX
F_LDIV@:
LDIV@:
XOR CX,CX
JMP o2d1f
N_LUDIV@:
POP CX
PUSH CS
PUSH CX
LUDIV@:
F_LUDIV@:
MOV CX,1
JMP o2d1f
N_LMOD@:
POP CX
PUSH CS
PUSH CX
LMOD@:
F_LMOD@:
MOV CX,2
JMP o2d1f
N_LUMOD@:
POP CX
PUSH CS
PUSH CX
LUMOD@:
F_LUMOD@:
MOV CX,3
o2d1f:
PUSH BP
PUSH SI
PUSH DI
MOV BP,SP
MOV DI,CX
MOV AX,W[BP+0a]
MOV DX,W[BP+0c]
MOV BX,W[BP+0e]
MOV CX,W[BP+010]
OR CX,CX
JNZ o2d3e
OR DX,DX
JZ o2da3
OR BX,BX
JZ o2da3
o2d3e:
TEST DI,1
JNZ o2d6o
OR DX,DX
JNS o2d52
NEG DX
NEG AX
SBB DX,0
OR DI,0c
o2d52:
OR CX,CX
JNS o2d6o
NEG CX
NEG BX
SBB CX,0
XOR DI,4
o2d6o:
MOV BP,CX
MOV CX,020
PUSH DI
XOR DI,DI
XOR SI,SI
o2d6a:
SHL AX,1
RCL DX,1
RCL SI,1
RCL DI,1
CMP DI,BP
JB o2d81
JA o2d7c
CMP SI,BX
JB o2d81
o2d7c:
SUB SI,BX
SBB DI,BP
INC AX
o2d81:
LOOP o2d6a
POP BX
TEST BX,2
JZ o2d9o
MOV AX,SI
MOV DX,DI
SHR BX,1
o2d9o:
TEST BX,4
JZ o2d9d
NEG DX
NEG AX
SBB DX,0
o2d9d:
POP DI
POP SI
POP BP
RETF 8
o2da3:
DIV BX
TEST DI,2
JZ o2dac
XCHG DX,AX
o2dac:
XOR DX,DX
JMP o2d9d
N_LXLSH@:
POP BX
PUSH CS
PUSH BX
F_LXLSH@:
LXLSH@:
CMP CL,010
JNB o2dc8
MOV BX,AX
SHL AX,CL
SHL DX,CL
NEG CL
ADD CL,010
SHR BX,CL
OR DX,BX
RETF
o2dc8:
SUB CL,010
XCHG DX,AX
XOR AX,AX
SHL DX,CL
RETF
N_LXMUL@:
PUSH SI
XCHG SI,AX
XCHG DX,AX
TEST AX,AX
JZ o2dda
MUL BX
o2dda:
JCXZ o2de1
XCHG CX,AX
MUL SI
ADD AX,CX
o2de1:
XCHG SI,AX
MUL BX
ADD DX,SI
POP SI
RET
N_PADA@:
POP ES
PUSH CS
PUSH ES
F_PADA@:
PADA@:
MOV ES,DX
XCHG BX,AX
ES: MOV DX,W[BX+2]
PUSH BX
ES: MOV BX,W[BX]
OR CX,CX
JGE o1b3e
NOT AX
NOT CX
ADD AX,1
ADC CX,0
JMP o1b82
o1b3e:
ADD BX,AX
JNB o1b46
ADD DX,01000
o1b46:
MOV AH,CL
MOV CL,4
SHL AH,CL
XOR AL,AL
ADD DX,AX
MOV CH,BL
SHR BX,CL
ADD DX,BX
MOV AL,CH
AND AX,0f
POP BX
ES: MOV W[BX],AX
ES: MOV W[BX+2],DX
RETF
N_PSBA@:
POP ES
PUSH CS
PUSH ES
F_PSBA@:
PSBA@:
MOV ES,DX
XCHG BX,AX
ES: MOV DX,W[BX+2]
PUSH BX
ES: MOV BX,W[BX]
OR CX,CX
JGE o1b82
NOT AX
NOT CX
ADD AX,1
ADC CX,0
JMP o1b3e
o1b82:
SUB BX,AX
JNB o1b8a
SUB DX,01000
o1b8a:
MOV AH,CL
MOV CL,4
SHL AH,CL
XOR AL,AL
SUB DX,AX
MOV CH,BL
SHR BX,CL
ADD DX,BX
MOV AL,CH
AND AX,0f
POP BX
ES: MOV W[BX],AX
ES: MOV W[BX+2],DX
RETF
N_PADD@:
POP ES
PUSH CS
PUSH ES
F_PADD@:
PADD@:
OR CX,CX
JGE o1bbb
NOT BX
NOT CX
ADD BX,1
ADC CX,0
JMP o1bea
o1bbb:
ADD AX,BX
JNB o1bc3
ADD DX,01000
o1bc3:
MOV CH,CL
MOV CL,4
SHL CH,CL
ADD DH,CH
MOV CH,AL
SHR AX,CL
ADD DX,AX
MOV AL,CH
AND AX,0f
RETF
N_PSUB@:
POP ES
PUSH CS
PUSH ES
F_PSUB@:
PSUB@:
OR CX,CX
JGE o1bea
NOT BX
NOT CX
ADD BX,1
ADC CX,0
JMP o1bbb
o1bea:
SUB AX,BX
JNB o1bf2
SUB DX,01000
o1bf2:
MOV BH,CL
MOV CL,4
SHL BH,CL
XOR BL,BL
SUB DX,BX
MOV CH,AL
SHR AX,CL
ADD DX,AX
MOV AL,CH
AND AX,0f
RETF
N_SCOPY@:
PUSH BP
MOV BP,SP
PUSH SI
PUSH DI
PUSH DS
LDS SI,W[BP+4]
LES DI,W[BP+8]
CLD
SHR CX,1
REPZ MOVSW
ADC CX,CX
REPZ MOVSB
POP DS
POP DI
POP SI
POP BP
RET 8
| 11.356467 | 75 | 0.610833 |
fb96ca8d3c8c395652a881d3465355f0ff9cbbf0 | 211 | asm | Assembly | CPU/cpu_test/test_storage/sra.asm | SilenceX12138/MIPS-Microsystems | d389b706b0930151a710b544db436c2883af958b | [
"MIT"
] | 55 | 2021-09-06T12:12:47.000Z | 2022-01-15T04:30:53.000Z | CPU/cpu_test/test_storage/sra.asm | SilenceX12138/MIPS-Microsystems | d389b706b0930151a710b544db436c2883af958b | [
"MIT"
] | null | null | null | CPU/cpu_test/test_storage/sra.asm | SilenceX12138/MIPS-Microsystems | d389b706b0930151a710b544db436c2883af958b | [
"MIT"
] | null | null | null | .text
li $t1,-10
li $t2,-20
li $t3,30
li $0,25
li $t4,40
li $t5,-4
li $t6,900
li $t7,0xfff
sra $s1,$t1,31
sra $s2,$t2,31
sra $s3,$t3,4
sra $s4,$t4,6
sra $s5,$t5,2
sra $s6,$t6,31
sra $s7,$t7,5
| 11.105263 | 15 | 0.535545 |
647daf7a6b55190e42cd773a795b871b0b4682af | 678 | asm | Assembly | data/pokemon/base_stats/delibird.asm | Karkino/KarkCrystal16 | 945dde0354016f9357e9d3798312cc6efa52ff7a | [
"blessing"
] | null | null | null | data/pokemon/base_stats/delibird.asm | Karkino/KarkCrystal16 | 945dde0354016f9357e9d3798312cc6efa52ff7a | [
"blessing"
] | null | null | null | data/pokemon/base_stats/delibird.asm | Karkino/KarkCrystal16 | 945dde0354016f9357e9d3798312cc6efa52ff7a | [
"blessing"
] | null | null | null | db 0 ; species ID placeholder
db 70, 95, 70, 85, 95, 70
; hp atk def spd sat sdf
db ICE, FLYING ; type
db 45 ; catch rate
db 183 ; base exp
db NO_ITEM, NO_ITEM ; items
db GENDER_F50 ; gender ratio
db 100 ; unknown 1
db 20 ; step cycles to hatch
db 5 ; unknown 2
INCBIN "gfx/pokemon/delibird/front.dimensions"
db 0, 0, 0, 0 ; padding
db GROWTH_FAST ; growth rate
dn EGG_WATER_1, EGG_GROUND ; egg groups
; tm/hm learnset
tmhm HEADBUTT, CURSE, TOXIC, SNORE, BLIZZARD, HYPER_BEAM, ICY_WIND, PROTECT, RAIN_DANCE, THUNDER, RETURN, SHADOW_BALL, FEATHERDANCE, DOUBLE_TEAM, SWAGGER, SLEEP_TALK, SWIFT, PURSUIT, REST, ATTRACT, THIEF, FLY, ICE_BEAM
; end
| 30.818182 | 219 | 0.705015 |
aad2b70248bace5ddc836dbc8c2d04269821dad7 | 317 | asm | Assembly | programs/oeis/248/A248338.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/248/A248338.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/248/A248338.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A248338: 10^n - 4^n.
; 0,6,84,936,9744,98976,995904,9983616,99934464,999737856,9998951424,99995805696,999983222784,9999932891136,99999731564544,999998926258176,9999995705032704,99999982820130816,999999931280523264,9999999725122093056,99999998900488372224
mov $1,4
pow $1,$0
mov $2,10
pow $2,$0
sub $2,$1
mov $0,$2
| 31.7 | 233 | 0.801262 |
33aab4d255224792fc9cb5b3beed3ba977ec66b3 | 532 | asm | Assembly | code/10/1.asm | GeekHades1/AssemblyCode | 4078d97d8e31093ff7b54b72869f77e340b98391 | [
"BSD-2-Clause"
] | 1 | 2018-07-11T12:35:45.000Z | 2018-07-11T12:35:45.000Z | code/10/1.asm | GeekHades1/AssemblyCode | 4078d97d8e31093ff7b54b72869f77e340b98391 | [
"BSD-2-Clause"
] | null | null | null | code/10/1.asm | GeekHades1/AssemblyCode | 4078d97d8e31093ff7b54b72869f77e340b98391 | [
"BSD-2-Clause"
] | null | null | null | ; 当CPU执行ret指令的时候相当于进行
; POP IP 从栈中读取数据
; 当CPU执行retf指令的时候相当于进行
; POP IP
; POP CS
; 故ret, retf与栈有直接关系
assume cs:code
data segment
db 'Welcome to ASM!','$'
data ends
stack segment
db 16 dup (0)
stack ends
code segment
mov ah, 4ch
int 21h
start: mov ax, stack
mov ss, ax
mov sp, 16
mov ax, 0
push ax
mov ax, data
mov ds, ax
mov bx, 0
lea dx, [bx] ; 正常显示 dx并没改变 在实际执行才会将bx存入dx中
;mov dx, offset ds:[bx]
mov ah, 09H
int 21H
ret ; IP = 0
code ends
end start | 14 | 47 | 0.603383 |
62d90165316a2ebd49abea2269cfa2f024e72ce3 | 1,371 | asm | Assembly | displaying.asm | selectiveduplicate/8086-assembly | c7c1e9e2a0841a9ed775cb10380122fb6c8122b6 | [
"MIT"
] | 2 | 2020-04-11T00:32:34.000Z | 2022-02-05T16:23:25.000Z | Displaying_patterns_of_lab_three.asm | selectiveduplicate/8086-assembly | c7c1e9e2a0841a9ed775cb10380122fb6c8122b6 | [
"MIT"
] | null | null | null | Displaying_patterns_of_lab_three.asm | selectiveduplicate/8086-assembly | c7c1e9e2a0841a9ed775cb10380122fb6c8122b6 | [
"MIT"
] | 3 | 2018-04-16T13:46:18.000Z | 2021-05-07T06:51:31.000Z | TITLE DISPLAYING_SHITS_OF_LAB_3
.MODEL SMALL
.STACK 100H
.DATA
.CODE
MAIN PROC
MOV CX, 4 ;WE ARE TAKING OUR MAIN LOOP COUNTER AS 4, BECAUSE
MOV BX, 4 ;OF THE WAY WE'VE USED OUR INNER LOOP/S
TOP:
DEC BX ;decrement BX to maintain our main loop
MOV CX, BX ;for obvious reasons...
JZ EXIT ;in case BX, CX becomes zero
MOV DL, 'X'
MOV AH, 2
INT 021H
MOV CX, 3 ;for displaying Y three times
DO:
MOV DL, 'Y'
MOV AH, 2
INT 021H
LOOP DO ;keep displaying 'Y' like a retard
MOV DL, 'Z'
MOV AH, 2
INT 021H
LOOP TOP ;go to the starting of our main loop, where we decrement
;our main counter
EXIT:
MAIN ENDP
END MAIN | 33.439024 | 121 | 0.321663 |
4a053936d6188dacb8fc0ae77b83e29f821b3bcc | 750 | asm | Assembly | oeis/335/A335749.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/335/A335749.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/335/A335749.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A335749: a(n) = n!*[x^n] exp(2*x)*(y*sinh(x*y) + cosh(x*y)) and y = sqrt(6).
; Submitted by Jamie Morken(s3)
; 1,8,34,152,676,3008,13384,59552,264976,1179008,5245984,23341952,103859776,462123008,2056211584,9149092352,40708792576,181133355008,805951005184,3586070730752,15956184933376,70996881195008,315899894646784,1405593340977152,6254173153202176,27827879294763008,123819863485456384,550935212531351552,2451380577096318976,10907392733447979008,48532332087984553984,215944113818834173952,960841119451305803776,4275252705442891563008,19022693060674177859584,84641277653582494564352,376610496735678333976576
mov $3,1
lpb $0
sub $0,1
add $2,$3
mul $2,2
mov $3,$1
mov $1,$2
add $3,$2
lpe
mov $0,$2
add $0,$3
add $1,$0
add $1,$2
mov $0,$1
| 39.473684 | 497 | 0.785333 |
4a25d0bb594e1f7c23e045e3ec121dfe9b3e2e26 | 848 | asm | Assembly | programs/oeis/110/A110450.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/110/A110450.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/110/A110450.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A110450: a(n) = n*(n+1)*(n^2+n+1)/2.
; 0,3,21,78,210,465,903,1596,2628,4095,6105,8778,12246,16653,22155,28920,37128,46971,58653,72390,88410,106953,128271,152628,180300,211575,246753,286146,330078,378885,432915,492528,558096,630003,708645,794430,887778,989121,1098903,1217580,1345620,1483503,1631721,1790778,1961190,2143485,2338203,2545896,2767128,3002475,3252525,3517878,3799146,4096953,4411935,4744740,5096028,5466471,5856753,6267570,6699630,7153653,7630371,8130528,8654880,9204195,9779253,10380846,11009778,11666865,12352935,13068828,13815396,14593503,15404025,16247850,17125878,18039021,18988203,19974360,20998440,22061403,23164221,24307878,25493370,26721705,27993903,29310996,30674028,32084055,33542145,35049378,36606846,38215653,39876915,41591760,43361328,45186771,47069253,49009950
mov $1,1
add $1,$0
pow $1,2
sub $1,$0
bin $1,2
mov $0,$1
| 84.8 | 750 | 0.820755 |
9fc935f04df1b2382743c0347164d32f8f42627d | 1,287 | asm | Assembly | sk/sfx/83.asm | Cancer52/flamedriver | 9ee6cf02c137dcd63e85a559907284283421e7ba | [
"0BSD"
] | 9 | 2017-10-09T20:28:45.000Z | 2021-06-29T21:19:20.000Z | sk/sfx/83.asm | Cancer52/flamedriver | 9ee6cf02c137dcd63e85a559907284283421e7ba | [
"0BSD"
] | 12 | 2018-08-01T13:52:20.000Z | 2022-02-21T02:19:37.000Z | sk/sfx/83.asm | Cancer52/flamedriver | 9ee6cf02c137dcd63e85a559907284283421e7ba | [
"0BSD"
] | 2 | 2018-02-17T19:50:36.000Z | 2019-10-30T19:28:06.000Z | Sound_83_Header:
smpsHeaderStartSong 3
smpsHeaderVoice Sound_83_Voices
smpsHeaderTempoSFX $01
smpsHeaderChanSFX $03
smpsHeaderSFXChannel cFM5, Sound_83_FM5, $00, $03
smpsHeaderSFXChannel cFM4, Sound_83_FM4, $DF, $00
smpsHeaderSFXChannel cPSG3, Sound_83_PSG3, $20, $00
; FM5 Data
Sound_83_FM5:
dc.b nRst, $03
; FM4 Data
Sound_83_FM4:
smpsSetvoice $00
smpsModSet $03, $01, $36, $06
dc.b nD0, $22
smpsStop
; PSG3 Data
Sound_83_PSG3:
smpsPSGform $E7
smpsModSet $02, $01, $09, $28
Sound_83_Loop00:
dc.b nC4, $0F
smpsPSGAlterVol $0B
smpsLoop $00, $03, Sound_83_Loop00
smpsStop
Sound_83_Voices:
; Voice $00
; $31
; $4B, $F2, $00, $04, $0F, $0F, $1F, $1F, $0B, $03, $07, $0A
; $10, $0B, $16, $0A, $FF, $0F, $FF, $0F, $50, $07, $10, $80
smpsVcAlgorithm $01
smpsVcFeedback $06
smpsVcUnusedBits $00
smpsVcDetune $00, $00, $0F, $04
smpsVcCoarseFreq $04, $00, $02, $0B
smpsVcRateScale $00, $00, $00, $00
smpsVcAttackRate $1F, $1F, $0F, $0F
smpsVcAmpMod $00, $00, $00, $00
smpsVcDecayRate1 $0A, $07, $03, $0B
smpsVcDecayRate2 $0A, $16, $0B, $10
smpsVcDecayLevel $00, $0F, $00, $0F
smpsVcReleaseRate $0F, $0F, $0F, $0F
smpsVcTotalLevel $00, $10, $07, $50
| 24.75 | 62 | 0.623932 |
03802be08988cb51cceea0878c5a751ae19405c7 | 7,747 | asm | Assembly | Transynther/x86/_processed/NC/_zr_/i3-7100_9_0x84_notsx.log_21829_1383.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NC/_zr_/i3-7100_9_0x84_notsx.log_21829_1383.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NC/_zr_/i3-7100_9_0x84_notsx.log_21829_1383.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r15
push %r8
push %rax
push %rbx
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_WC_ht+0x1984d, %rdx
nop
and %rax, %rax
movb (%rdx), %bl
nop
nop
nop
mfence
lea addresses_WT_ht+0x1644d, %r8
nop
sub $10978, %rsi
mov (%r8), %r15d
nop
nop
nop
nop
add %rbx, %rbx
lea addresses_A_ht+0x142cd, %rsi
lea addresses_D_ht+0x13acd, %rdi
nop
inc %rax
mov $22, %rcx
rep movsb
nop
nop
nop
nop
nop
and $62405, %rdx
lea addresses_WC_ht+0x6a0d, %r8
inc %rbx
mov (%r8), %ax
add %rdi, %rdi
lea addresses_UC_ht+0x149ad, %rsi
lea addresses_UC_ht+0x10d4d, %rdi
nop
sub $28310, %r8
mov $31, %rcx
rep movsw
nop
and %r15, %r15
lea addresses_WC_ht+0x14b4d, %rdi
clflush (%rdi)
nop
nop
xor %rbx, %rbx
movl $0x61626364, (%rdi)
nop
nop
add $17477, %rsi
lea addresses_UC_ht+0x133ed, %rsi
lea addresses_D_ht+0x1bcd, %rdi
nop
nop
nop
nop
nop
inc %r15
mov $88, %rcx
rep movsw
nop
nop
nop
nop
nop
add %rsi, %rsi
lea addresses_UC_ht+0x1744d, %r15
nop
nop
nop
xor $60972, %rcx
movb (%r15), %al
dec %rax
lea addresses_WC_ht+0xbf05, %rsi
clflush (%rsi)
nop
nop
nop
sub %rax, %rax
movups (%rsi), %xmm2
vpextrq $0, %xmm2, %r8
dec %rsi
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbx
pop %rax
pop %r8
pop %r15
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r12
push %rbx
push %rcx
push %rdi
push %rdx
push %rsi
// REPMOV
lea addresses_WC+0x1fdbd, %rsi
lea addresses_RW+0xf04d, %rdi
nop
and $64626, %r12
mov $0, %rcx
rep movsq
nop
nop
nop
nop
nop
and %r10, %r10
// Store
mov $0x34d, %rdi
clflush (%rdi)
nop
nop
nop
xor %rcx, %rcx
mov $0x5152535455565758, %r10
movq %r10, %xmm3
movups %xmm3, (%rdi)
nop
nop
nop
xor %rbx, %rbx
// Store
mov $0x4d, %rsi
nop
nop
xor %rdx, %rdx
movl $0x51525354, (%rsi)
nop
nop
cmp $28811, %r10
// Store
lea addresses_D+0x1204d, %r10
nop
nop
nop
add $23855, %r12
mov $0x5152535455565758, %rcx
movq %rcx, %xmm7
movups %xmm7, (%r10)
nop
nop
nop
add $49732, %rbx
// Store
lea addresses_A+0x4699, %rcx
nop
nop
nop
nop
and %r10, %r10
mov $0x5152535455565758, %rbx
movq %rbx, %xmm6
vmovntdq %ymm6, (%rcx)
nop
nop
nop
nop
dec %rsi
// Store
lea addresses_UC+0x40c, %rbx
nop
nop
nop
nop
nop
add %rdi, %rdi
mov $0x5152535455565758, %r12
movq %r12, %xmm0
vmovaps %ymm0, (%rbx)
and %rdx, %rdx
// Faulty Load
mov $0x431322000000084d, %rbx
nop
nop
nop
nop
nop
sub %rdi, %rdi
movb (%rbx), %dl
lea oracles, %rbx
and $0xff, %rdx
shlq $12, %rdx
mov (%rbx,%rdx,1), %rdx
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbx
pop %r12
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'src': {'type': 'addresses_NC', 'same': False, 'size': 8, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_WC', 'congruent': 4, 'same': False}, 'dst': {'type': 'addresses_RW', 'congruent': 10, 'same': False}, 'OP': 'REPM'}
{'dst': {'type': 'addresses_P', 'same': False, 'size': 16, 'congruent': 7, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_P', 'same': False, 'size': 4, 'congruent': 11, 'NT': False, 'AVXalign': True}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_D', 'same': False, 'size': 16, 'congruent': 11, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_A', 'same': False, 'size': 32, 'congruent': 2, 'NT': True, 'AVXalign': False}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_UC', 'same': False, 'size': 32, 'congruent': 0, 'NT': False, 'AVXalign': True}, 'OP': 'STOR'}
[Faulty Load]
{'src': {'type': 'addresses_NC', 'same': True, 'size': 1, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'type': 'addresses_WC_ht', 'same': False, 'size': 1, 'congruent': 11, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_WT_ht', 'same': False, 'size': 4, 'congruent': 10, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_A_ht', 'congruent': 7, 'same': False}, 'dst': {'type': 'addresses_D_ht', 'congruent': 7, 'same': True}, 'OP': 'REPM'}
{'src': {'type': 'addresses_WC_ht', 'same': False, 'size': 2, 'congruent': 6, 'NT': True, 'AVXalign': True}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_UC_ht', 'congruent': 4, 'same': False}, 'dst': {'type': 'addresses_UC_ht', 'congruent': 6, 'same': False}, 'OP': 'REPM'}
{'dst': {'type': 'addresses_WC_ht', 'same': False, 'size': 4, 'congruent': 7, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'src': {'type': 'addresses_UC_ht', 'congruent': 5, 'same': False}, 'dst': {'type': 'addresses_D_ht', 'congruent': 6, 'same': False}, 'OP': 'REPM'}
{'src': {'type': 'addresses_UC_ht', 'same': False, 'size': 1, 'congruent': 8, 'NT': False, 'AVXalign': True}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_WC_ht', 'same': False, 'size': 16, 'congruent': 3, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'00': 21829}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
| 32.012397 | 2,999 | 0.65264 |
4ab3c8662e755bf5364844453248c47aedf87d7d | 7,340 | asm | Assembly | tk_qsrc/q1source/QW/client/r_varsa.asm | cr88192/bgbtech_btsr1arch | dcee6e5c7bbdac33a6891228f2238f6489e3c29a | [
"MIT"
] | 15 | 2019-05-19T15:51:06.000Z | 2021-12-01T08:12:17.000Z | sh2emu/tk_qsrc/q1source/QW/client/r_varsa.asm | cr88192/bgbtech_shxemu | 0e8c2de32c94631a1c18df17f23385235dc67879 | [
"MIT"
] | null | null | null | sh2emu/tk_qsrc/q1source/QW/client/r_varsa.asm | cr88192/bgbtech_shxemu | 0e8c2de32c94631a1c18df17f23385235dc67879 | [
"MIT"
] | 1 | 2019-11-21T16:57:31.000Z | 2019-11-21T16:57:31.000Z | .386P
.model FLAT
externdef _d_zistepu:dword
externdef _d_pzbuffer:dword
externdef _d_zistepv:dword
externdef _d_zrowbytes:dword
externdef _d_ziorigin:dword
externdef _r_turb_s:dword
externdef _r_turb_t:dword
externdef _r_turb_pdest:dword
externdef _r_turb_spancount:dword
externdef _r_turb_turb:dword
externdef _r_turb_pbase:dword
externdef _r_turb_sstep:dword
externdef _r_turb_tstep:dword
externdef _r_bmodelactive:dword
externdef _d_sdivzstepu:dword
externdef _d_tdivzstepu:dword
externdef _d_sdivzstepv:dword
externdef _d_tdivzstepv:dword
externdef _d_sdivzorigin:dword
externdef _d_tdivzorigin:dword
externdef _sadjust:dword
externdef _tadjust:dword
externdef _bbextents:dword
externdef _bbextentt:dword
externdef _cacheblock:dword
externdef _d_viewbuffer:dword
externdef _cachewidth:dword
externdef _d_pzbuffer:dword
externdef _d_zrowbytes:dword
externdef _d_zwidth:dword
externdef _d_scantable:dword
externdef _r_lightptr:dword
externdef _r_numvblocks:dword
externdef _prowdestbase:dword
externdef _pbasesource:dword
externdef _r_lightwidth:dword
externdef _lightright:dword
externdef _lightrightstep:dword
externdef _lightdeltastep:dword
externdef _lightdelta:dword
externdef _lightright:dword
externdef _lightdelta:dword
externdef _sourcetstep:dword
externdef _surfrowbytes:dword
externdef _lightrightstep:dword
externdef _lightdeltastep:dword
externdef _r_sourcemax:dword
externdef _r_stepback:dword
externdef _colormap:dword
externdef _blocksize:dword
externdef _sourcesstep:dword
externdef _lightleft:dword
externdef _blockdivshift:dword
externdef _blockdivmask:dword
externdef _lightleftstep:dword
externdef _r_origin:dword
externdef _r_ppn:dword
externdef _r_pup:dword
externdef _r_pright:dword
externdef _ycenter:dword
externdef _xcenter:dword
externdef _d_vrectbottom_particle:dword
externdef _d_vrectright_particle:dword
externdef _d_vrecty:dword
externdef _d_vrectx:dword
externdef _d_pix_shift:dword
externdef _d_pix_min:dword
externdef _d_pix_max:dword
externdef _d_y_aspect_shift:dword
externdef _screenwidth:dword
externdef _vright:dword
externdef _vup:dword
externdef _vpn:dword
externdef _BOPS_Error:dword
externdef _snd_scaletable:dword
externdef _paintbuffer:dword
externdef _snd_linear_count:dword
externdef _snd_p:dword
externdef _snd_vol:dword
externdef _snd_out:dword
externdef _r_leftclipped:dword
externdef _r_leftenter:dword
externdef _r_rightclipped:dword
externdef _r_rightenter:dword
externdef _modelorg:dword
externdef _xscale:dword
externdef _r_refdef:dword
externdef _yscale:dword
externdef _r_leftexit:dword
externdef _r_rightexit:dword
externdef _r_lastvertvalid:dword
externdef _cacheoffset:dword
externdef _newedges:dword
externdef _removeedges:dword
externdef _r_pedge:dword
externdef _r_framecount:dword
externdef _r_u1:dword
externdef _r_emitted:dword
externdef _edge_p:dword
externdef _surface_p:dword
externdef _surfaces:dword
externdef _r_lzi1:dword
externdef _r_v1:dword
externdef _r_ceilv1:dword
externdef _r_nearzi:dword
externdef _r_nearzionly:dword
externdef _edge_aftertail:dword
externdef _edge_tail:dword
externdef _current_iv:dword
externdef _edge_head_u_shift20:dword
externdef _span_p:dword
externdef _edge_head:dword
externdef _fv:dword
externdef _edge_tail_u_shift20:dword
externdef _r_apverts:dword
externdef _r_anumverts:dword
externdef _aliastransform:dword
externdef _r_avertexnormals:dword
externdef _r_plightvec:dword
externdef _r_ambientlight:dword
externdef _r_shadelight:dword
externdef _aliasxcenter:dword
externdef _aliasycenter:dword
externdef _a_sstepxfrac:dword
externdef _r_affinetridesc:dword
externdef _acolormap:dword
externdef _d_pcolormap:dword
externdef _r_affinetridesc:dword
externdef _d_sfrac:dword
externdef _d_ptex:dword
externdef _d_pedgespanpackage:dword
externdef _d_tfrac:dword
externdef _d_light:dword
externdef _d_zi:dword
externdef _d_pdest:dword
externdef _d_pz:dword
externdef _d_aspancount:dword
externdef _erroradjustup:dword
externdef _errorterm:dword
externdef _d_xdenom:dword
externdef _r_p0:dword
externdef _r_p1:dword
externdef _r_p2:dword
externdef _a_tstepxfrac:dword
externdef _r_sstepx:dword
externdef _r_tstepx:dword
externdef _a_ststepxwhole:dword
externdef _zspantable:dword
externdef _skintable:dword
externdef _r_zistepx:dword
externdef _erroradjustdown:dword
externdef _d_countextrastep:dword
externdef _ubasestep:dword
externdef _a_ststepxwhole:dword
externdef _a_tstepxfrac:dword
externdef _r_lstepx:dword
externdef _a_spans:dword
externdef _erroradjustdown:dword
externdef _d_pdestextrastep:dword
externdef _d_pzextrastep:dword
externdef _d_sfracextrastep:dword
externdef _d_ptexextrastep:dword
externdef _d_countextrastep:dword
externdef _d_tfracextrastep:dword
externdef _d_lightextrastep:dword
externdef _d_ziextrastep:dword
externdef _d_pdestbasestep:dword
externdef _d_pzbasestep:dword
externdef _d_sfracbasestep:dword
externdef _d_ptexbasestep:dword
externdef _ubasestep:dword
externdef _d_tfracbasestep:dword
externdef _d_lightbasestep:dword
externdef _d_zibasestep:dword
externdef _zspantable:dword
externdef _r_lstepy:dword
externdef _r_sstepy:dword
externdef _r_tstepy:dword
externdef _r_zistepy:dword
externdef _D_PolysetSetEdgeTable:dword
externdef _D_RasterizeAliasPolySmooth:dword
externdef float_point5:dword
externdef Float2ToThe31nd:dword
externdef izistep:dword
externdef izi:dword
externdef FloatMinus2ToThe31nd:dword
externdef float_1:dword
externdef float_particle_z_clip:dword
externdef float_minus_1:dword
externdef float_0:dword
externdef fp_16:dword
externdef fp_64k:dword
externdef fp_1m:dword
externdef fp_1m_minus_1:dword
externdef fp_8:dword
externdef entryvec_table:dword
externdef advancetable:dword
externdef sstep:dword
externdef tstep:dword
externdef pspantemp:dword
externdef counttemp:dword
externdef jumptemp:dword
externdef reciprocal_table:dword
externdef DP_Count:dword
externdef DP_u:dword
externdef DP_v:dword
externdef DP_32768:dword
externdef DP_Color:dword
externdef DP_Pix:dword
externdef DP_EntryTable:dword
externdef pbase:dword
externdef s:dword
externdef t:dword
externdef sfracf:dword
externdef tfracf:dword
externdef snext:dword
externdef tnext:dword
externdef spancountminus1:dword
externdef zi16stepu:dword
externdef sdivz16stepu:dword
externdef tdivz16stepu:dword
externdef zi8stepu:dword
externdef sdivz8stepu:dword
externdef tdivz8stepu:dword
externdef reciprocal_table_16:dword
externdef entryvec_table_16:dword
externdef ceil_cw:dword
externdef single_cw:dword
externdef fp_64kx64k:dword
externdef pz:dword
externdef spr8entryvec_table:dword
_DATA SEGMENT
public float_1, float_particle_z_clip, float_point5
public float_minus_1, float_0
float_0 dd 0.0
float_1 dd 1.0
float_minus_1 dd -1.0
float_particle_z_clip dd 8.0
float_point5 dd 0.5
public fp_16, fp_64k, fp_1m, fp_64kx64k
public fp_1m_minus_1
public fp_8
fp_1m dd 1048576.0
fp_1m_minus_1 dd 1048575.0
fp_64k dd 65536.0
fp_8 dd 8.0
fp_16 dd 16.0
fp_64kx64k dd 04f000000h
public FloatZero, Float2ToThe31nd, FloatMinus2ToThe31nd
FloatZero dd 0
Float2ToThe31nd dd 04f000000h
FloatMinus2ToThe31nd dd 0cf000000h
public _r_bmodelactive
_r_bmodelactive dd 0
_DATA ENDS
END
| 28.339768 | 56 | 0.859673 |
d7d04646b15680327b4474e277341d881c6361da | 261 | asm | Assembly | Lenguajes de interfaz/prac08.asm | Abel-RM/materias-tec | 10043470f5439cf867e1fc30f28d21c622f302de | [
"MIT"
] | null | null | null | Lenguajes de interfaz/prac08.asm | Abel-RM/materias-tec | 10043470f5439cf867e1fc30f28d21c622f302de | [
"MIT"
] | 2 | 2021-01-28T20:30:51.000Z | 2021-01-28T20:31:05.000Z | Lenguajes de interfaz/prac08.asm | Abel-RM/materias-tec | 10043470f5439cf867e1fc30f28d21c622f302de | [
"MIT"
] | null | null | null | title prac08
.model small
.data
divisor db 3
dividendo db 47
coc db 0h,0h
residuo db 0
.code
main proc near
.startup
mov ax,47
aad
div divisor
mov coc,al
mov residuo,ah
;imprimir el resultado
mov bx,0001h
mov ah,02h
mov dl,coc
int 21h
.exit
main endp
end | 8.7 | 22 | 0.750958 |
2285dbfd601d86e854a475e6eb56464a3a589642 | 68 | asm | Assembly | VirtualMachine/Win32/UnitTests/Conditionals/test13_xor_Boolean.asm | ObjectPascalInterpreter/BookPart_3 | 95150d4d02f7e13e5b1ebb58c249073a384f2a0a | [
"Apache-2.0"
] | 8 | 2021-11-07T22:45:25.000Z | 2022-03-12T21:38:53.000Z | VirtualMachine/Win32/UnitTests/Conditionals/test13_xor_Boolean.asm | Irwin1985/BookPart_2 | 4e8c2e47cd09b77c6e5bd3455ddfe7492adf26bf | [
"Apache-2.0"
] | 4 | 2021-09-23T02:13:55.000Z | 2021-12-07T06:08:17.000Z | VirtualMachine/Win32/UnitTests/Conditionals/test13_xor_Boolean.asm | Irwin1985/BookPart_2 | 4e8c2e47cd09b77c6e5bd3455ddfe7492adf26bf | [
"Apache-2.0"
] | 4 | 2021-11-24T17:24:56.000Z | 2021-12-21T04:56:58.000Z | # Test13 - XOR Test
pushb true
pushb false
xor
halt | 11.333333 | 19 | 0.573529 |
c42bcae68e7da7d4a5b258de3b928fa16f36561b | 498 | asm | Assembly | oeis/128/A128424.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/128/A128424.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/128/A128424.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A128424: a(n) = floor(sqrt(a(n-1)^2 + a(n-2)^2 + a(n-1)*a(n-2))), a(1)=1, a(2)=3.
; Submitted by Christian Krause
; 1,3,3,5,7,10,14,20,29,42,61,89,130,190,278,407,596,873,1279,1874,2746,4024,5897,8642,12665,18561,27202,39866,58426,85627,125492,183917,269543,395034,578950,848492,1243525,1822474,2670965,3914489,5736962
mov $1,1
mov $2,1
lpb $0
sub $0,1
add $1,$3
max $3,3
sub $3,$1
add $1,$2
add $2,1
sub $3,1
add $1,$3
sub $1,$2
sub $2,$3
add $3,$2
lpe
mov $0,$3
add $0,1
| 22.636364 | 204 | 0.618474 |
ce47db651fccd194b60460563b89658367833bf6 | 214 | asm | Assembly | ffight/lcs/container/59.asm | zengfr/arcade_game_romhacking_sourcecode_top_secret_data | a4a0c86c200241494b3f1834cd0aef8dc02f7683 | [
"Apache-2.0"
] | 6 | 2020-10-14T15:29:10.000Z | 2022-02-12T18:58:54.000Z | ffight/lcs/container/59.asm | zengfr/arcade_game_romhacking_sourcecode_top_secret_data | a4a0c86c200241494b3f1834cd0aef8dc02f7683 | [
"Apache-2.0"
] | null | null | null | ffight/lcs/container/59.asm | zengfr/arcade_game_romhacking_sourcecode_top_secret_data | a4a0c86c200241494b3f1834cd0aef8dc02f7683 | [
"Apache-2.0"
] | 1 | 2020-12-17T08:59:10.000Z | 2020-12-17T08:59:10.000Z | copyright zengfr site:http://github.com/zengfr/romhack
007E6C move.b D5, ($58,A6) [1p+59, container+59]
007EA0 move.b D5, ($58,A6) [1p+59, container+59]
copyright zengfr site:http://github.com/zengfr/romhack
| 30.571429 | 54 | 0.719626 |
f8a50f4817457793a6470400dc491c2ec3366704 | 1,734 | asm | Assembly | programs/oeis/033/A033138.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/033/A033138.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/033/A033138.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A033138: a(n) = floor(2^(n+2)/7).
; 1,2,4,9,18,36,73,146,292,585,1170,2340,4681,9362,18724,37449,74898,149796,299593,599186,1198372,2396745,4793490,9586980,19173961,38347922,76695844,153391689,306783378,613566756,1227133513,2454267026,4908534052,9817068105,19634136210,39268272420,78536544841,157073089682,314146179364,628292358729,1256584717458,2513169434916,5026338869833,10052677739666,20105355479332,40210710958665,80421421917330,160842843834660,321685687669321,643371375338642,1286742750677284,2573485501354569,5146971002709138,10293942005418276,20587884010836553,41175768021673106,82351536043346212,164703072086692425,329406144173384850,658812288346769700,1317624576693539401,2635249153387078802,5270498306774157604,10540996613548315209,21081993227096630418,42163986454193260836,84327972908386521673,168655945816773043346,337311891633546086692,674623783267092173385,1349247566534184346770,2698495133068368693540,5396990266136737387081,10793980532273474774162,21587961064546949548324,43175922129093899096649,86351844258187798193298,172703688516375596386596,345407377032751192773193,690814754065502385546386,1381629508131004771092772,2763259016262009542185545,5526518032524019084371090,11053036065048038168742180,22106072130096076337484361,44212144260192152674968722,88424288520384305349937444,176848577040768610699874889,353697154081537221399749778,707394308163074442799499556,1414788616326148885598999113,2829577232652297771197998226,5659154465304595542395996452,11318308930609191084791992905,22636617861218382169583985810,45273235722436764339167971620,90546471444873528678335943241,181092942889747057356671886482,362185885779494114713343772964,724371771558988229426687545929
mov $1,2
pow $1,$0
mul $1,32
div $1,28
mov $0,$1
| 192.666667 | 1,647 | 0.917532 |
de0b0f22dc550aa33730f669f473188de5c1cff2 | 1,252 | asm | Assembly | src/main.asm | helgefmi/lttphack | 2d3b80b029c7e5a46e9329856dadff0ed611a596 | [
"MIT"
] | 28 | 2016-02-19T04:33:56.000Z | 2022-02-25T05:30:58.000Z | src/main.asm | helgefmi/lttphack | 2d3b80b029c7e5a46e9329856dadff0ed611a596 | [
"MIT"
] | 4 | 2017-08-01T18:20:49.000Z | 2019-07-28T13:39:01.000Z | src/main.asm | helgefmi/lttphack | 2d3b80b029c7e5a46e9329856dadff0ed611a596 | [
"MIT"
] | 6 | 2016-10-05T10:27:31.000Z | 2019-07-19T14:14:29.000Z | lorom
!FEATURE_HUD ?= 1
!FEATURE_SD2SNES ?= 1
!VERSION ?= "11 ALEPH 1"
incsrc defines.asm
incsrc hexedits.asm
org $208000
incsrc gamemode.asm
incsrc nmi.asm
incsrc draw.asm
if !FEATURE_HUD
incsrc hud.asm
endif
org $22C000
incsrc tiles.asm
org $238000
incsrc init.asm
incsrc rng.asm
incsrc misc.asm
incsrc idle.asm
incsrc glitchedwindow.asm
org $248000
incsrc custom_menu.asm
print pc
org $258000
incsrc presets.asm
org $268000
incsrc poverty_states.asm
org $278000
incsrc music.asm
org $288000
incsrc movie.asm
; ---- data ----
org $308000
incsrc preset_data_nmg.asm
org $318000
incsrc preset_data_hundo.asm
org $328000
incsrc preset_data_low.asm
org $338000
incsrc preset_data_ad.asm
org !SPC_DATA_OVERWORLD
incbin ../resources/spc_overworld.bin
org !SPC_DATA_UNDERWORLD
incbin ../resources/spc_underworld.bin
org !SPC_DATA_CREDITS
incbin ../resources/spc_credits.bin
;========================================================================
; LEAVE THIS HERE
; it's needed for calculating when certain data comes from a possibly
; non-vanilla source, which requires knowing the last bank we write to
;========================================================================
EndOfPracticeROM:
; pad rom to 2mb
org $3FFFFF
db $FF
| 16.051282 | 73 | 0.689297 |
955662a212d7fdb787adfa44e7b8f6a836e7a22c | 2,567 | asm | Assembly | Driver/Printer/PrintCom/Stream/streamStatusPacketInRedwood.asm | steakknife/pcgeos | 95edd7fad36df400aba9bab1d56e154fc126044a | [
"Apache-2.0"
] | 504 | 2018-11-18T03:35:53.000Z | 2022-03-29T01:02:51.000Z | Driver/Printer/PrintCom/Stream/streamStatusPacketInRedwood.asm | steakknife/pcgeos | 95edd7fad36df400aba9bab1d56e154fc126044a | [
"Apache-2.0"
] | 96 | 2018-11-19T21:06:50.000Z | 2022-03-06T10:26:48.000Z | Driver/Printer/PrintCom/Stream/streamStatusPacketInRedwood.asm | steakknife/pcgeos | 95edd7fad36df400aba9bab1d56e154fc126044a | [
"Apache-2.0"
] | 73 | 2018-11-19T20:46:53.000Z | 2022-03-29T00:59:26.000Z | COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
Copyright (c) GeoWorks 1993 -- All Rights Reserved
PROJECT: PC GEOS
MODULE: Printer Drivers
FILE: streamStatusPacketInRedwood.asm
AUTHOR: Dave Durran
ROUTINES:
Name Description
---- -----------
REVISION HISTORY:
Name Date Description
---- ---- -----------
Dave 1/93 Initial version
DESCRIPTION:
contains the routine to read status packets from the gate array in the
Redwood devices
$Id: streamStatusPacketInRedwood.asm,v 1.1 97/04/18 11:49:33 newdeal Exp $
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
StatusPacketIn
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Read the status packet requested from the Gate Array
CALLED BY: INTERNAL
PASS: es - PState segment
RETURN: carry set on error.
Our input buffer PS_redwoodSpecific.RS_status loaded with data
DESTROYED: nothing
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/IDEAS:
none
REVISION HISTORY:
Name Date Description
---- ---- -----------
Dave 09/93 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
StatusPacketIn proc near
uses ax,cx,di
.enter
getAnotherByte:
call GetOneStatusByte ;get a byte from the gate array.
jc exit
test ah,mask HST1_SCD ;see if it is a length byte
jz itsData ;if not length, skip init.
clr cl ;reset the byte counter
mov di,offset PS_redwoodSpecific.RS_status ;point at input buffer
itsData:
stosb ;es:di is our buffer.
inc cl ;add one byte to our counter.
cmp cl,es:PS_redwoodSpecific.RS_status.RSB_length ;are we done?
jle getAnotherByte
clc
exit:
.leave
ret
StatusPacketIn endp
GetOneStatusByte proc near
uses bx,dx
.enter
mov dx,es:[PS_redwoodSpecific].RS_gateArrayBase
add dx,HST1
call TimerGetCount
add ax,WATCHDOG_COUNT_INIT
mov es:[PS_redwoodSpecific].RS_watchDogCount,ax
testLoop:
in al,dx ;read the HST1 reg.
mov ah,al ;save away.
test ah,mask HST1_SDBSY ;do we have data?
jnz tested ;if so, get data
push ax
call TimerGetCount
cmp ax,es:[PS_redwoodSpecific].RS_watchDogCount
pop ax
jne testLoop ;try to read the regs again
stc
jmp exit
tested:
sub dx,HST1 ;back to the data reg.
in al,dx ;get data.
clc ;set no error....
exit:
.leave
ret
GetOneStatusByte endp
| 22.12931 | 79 | 0.591352 |
bb48b0ec361c21af6dd7605659e4f6fbd838082c | 1,889 | asm | Assembly | programs/oeis/004/A004657.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/004/A004657.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/004/A004657.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A004657: Expansion of g.f.: (1+x^3)*(1+x^4)/((1-x)*(1-x^2)^2*(1-x^4)).
; 1,1,3,4,9,11,19,24,37,45,63,76,101,119,151,176,217,249,299,340,401,451,523,584,669,741,839,924,1037,1135,1263,1376,1521,1649,1811,1956,2137,2299,2499,2680,2901,3101,3343,3564,3829,4071,4359,4624,4937,5225,5563,5876,6241,6579,6971,7336,7757,8149,8599,9020,9501,9951,10463,10944,11489,12001,12579,13124,13737,14315,14963,15576,16261,16909,17631,18316,19077,19799,20599,21360,22201,23001,23883,24724,25649,26531,27499,28424,29437,30405,31463,32476,33581,34639,35791,36896,38097,39249,40499,41700,43001,44251,45603,46904,48309,49661,51119,52524,54037,55495,57063,58576,60201,61769,63451,65076,66817,68499,70299,72040,73901,75701,77623,79484,81469,83391,85439,87424,89537,91585,93763,95876,98121,100299,102611,104856,107237,109549,111999,114380,116901,119351,121943,124464,127129,129721,132459,135124,137937,140675,143563,146376,149341,152229,155271,158236,161357,164399,167599,170720,174001,177201,180563,183844,187289,190651,194179,197624,201237,204765,208463,212076,215861,219559,223431,227216,231177,235049,239099,243060,247201,251251,255483,259624,263949,268181,272599,276924,281437,285855,290463,294976,299681,304289,309091,313796,318697,323499,328499,333400,338501,343501,348703,353804,359109,364311,369719,375024,380537,385945,391563,397076,402801,408419,414251,419976,425917,431749,437799,443740,449901,455951,462223,468384,474769,481041,487539,493924,500537,507035,513763,520376,527221,533949,540911,547756,554837,561799,568999,576080,583401,590601,598043,605364,612929,620371,628059,635624,643437,651125
mov $11,$0
mov $13,$0
add $13,1
lpb $13,1
clr $0,11
mov $0,$11
sub $13,1
sub $0,$13
add $8,$0
div $0,2
sub $8,$0
mul $0,2
sub $0,$8
add $0,1
add $2,1
add $4,$2
mov $1,$4
mul $1,2
sub $1,$0
sub $1,2
pow $1,2
add $1,1
mov $5,$1
div $5,2
add $12,$5
lpe
mov $1,$12
| 60.935484 | 1,511 | 0.761249 |
733261c8a3105a4d7bcda9b66f79de2c70358651 | 369 | asm | Assembly | oeis/101/A101602.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/101/A101602.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/101/A101602.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A101602: G.f.: c(3x)^4, c(x) the g.f. of A000108.
; Submitted by Christian Krause
; 1,12,126,1296,13365,138996,1459458,15466464,165297834,1780130520,19301700924,210564010080,2309623985565,25458117777540,281857732537050,3133071216411840,34953325758094590,391242268149428520
add $0,2
mov $1,$0
seq $0,168 ; a(n) = 2*3^n*(2*n)!/(n!*(n+2)!).
sub $1,1
mul $0,$1
div $0,9
| 33.545455 | 190 | 0.726287 |
6ef019ed5c74edad6e4329a032741346ef2e1f7e | 65,660 | asm | Assembly | theora/lib/arm/armidct.asm | tonysergi/theoraplayer | 5fe4bb2a77004bba67b8f7afd2441c3e51674e61 | [
"BSD-3-Clause"
] | 83 | 2015-08-04T06:19:59.000Z | 2022-03-25T03:33:55.000Z | theora/lib/arm/armidct.asm | tonysergi/theoraplayer | 5fe4bb2a77004bba67b8f7afd2441c3e51674e61 | [
"BSD-3-Clause"
] | 32 | 2015-07-31T22:47:16.000Z | 2022-03-16T01:57:49.000Z | theora/lib/arm/armidct.asm | tonysergi/theoraplayer | 5fe4bb2a77004bba67b8f7afd2441c3e51674e61 | [
"BSD-3-Clause"
] | 40 | 2015-07-25T03:01:48.000Z | 2022-03-29T07:55:34.000Z | @********************************************************************
@* *
@* THIS FILE IS PART OF THE OggTheora SOFTWARE CODEC SOURCE CODE. *
@* USE, DISTRIBUTION AND REPRODUCTION OF THIS LIBRARY SOURCE IS *
@* GOVERNED BY A BSD-STYLE SOURCE LICENSE INCLUDED WITH THIS SOURCE *
@* IN 'COPYING'. PLEASE READ THESE TERMS BEFORE DISTRIBUTING. *
@* *
@* THE Theora SOURCE CODE IS COPYRIGHT (C) 2002-2010 *
@* by the Xiph.Org Foundation and contributors http://www.xiph.org/ *
@* *
@********************************************************************
@ Original implementation:
@ Copyright (C) 2009 Robin Watts for Pinknoise Productions Ltd
@ last mod: $Id:
@********************************************************************
.text; .p2align 2
.include "armopts-gnu.S"
.global oc_idct8x8_1_arm
.global oc_idct8x8_arm
.type oc_idct8x8_1_arm, %function; oc_idct8x8_1_arm: @ PROC
@ r0 = ogg_int16_t *_y
@ r1 = ogg_uint16_t _dc
ORR r1, r1, r1, LSL #16
MOV r2, r1
MOV r3, r1
MOV r12,r1
STMIA r0!,{r1,r2,r3,r12}
STMIA r0!,{r1,r2,r3,r12}
STMIA r0!,{r1,r2,r3,r12}
STMIA r0!,{r1,r2,r3,r12}
STMIA r0!,{r1,r2,r3,r12}
STMIA r0!,{r1,r2,r3,r12}
STMIA r0!,{r1,r2,r3,r12}
STMIA r0!,{r1,r2,r3,r12}
MOV PC, r14
.size oc_idct8x8_1_arm, .-oc_idct8x8_1_arm @ ENDP
.type oc_idct8x8_arm, %function; oc_idct8x8_arm: @ PROC
@ r0 = ogg_int16_t *_y
@ r1 = ogg_int16_t *_x
@ r2 = int _last_zzi
CMP r2, #3
BLE oc_idct8x8_3_arm
CMP r2, #6
BLE oc_idct8x8_6_arm
CMP r2, #10
BLE oc_idct8x8_10_arm
oc_idct8x8_slow_arm:
STMFD r13!,{r4-r11,r14}
SUB r13,r13,#64*2
@ Row transforms
STR r0, [r13,#-4]!
ADD r0, r13, #4 @ Write to temp storage.
BL idct8core_arm
BL idct8core_arm
BL idct8core_arm
BL idct8core_arm
BL idct8core_arm
BL idct8core_arm
BL idct8core_arm
BL idct8core_arm
LDR r0, [r13], #4 @ Write to the final destination.
SUB r2, r1, #8*16
@ Clear input data for next block.
MOV r4, #0
MOV r5, #0
MOV r6, #0
MOV r7, #0
STMIA r2!,{r4,r5,r6,r7}
STMIA r2!,{r4,r5,r6,r7}
STMIA r2!,{r4,r5,r6,r7}
STMIA r2!,{r4,r5,r6,r7}
STMIA r2!,{r4,r5,r6,r7}
STMIA r2!,{r4,r5,r6,r7}
STMIA r2!,{r4,r5,r6,r7}
STMIA r2!,{r4,r5,r6,r7}
MOV r1, r13 @ And read from temp storage.
@ Column transforms
BL idct8core_down_arm
BL idct8core_down_arm
BL idct8core_down_arm
BL idct8core_down_arm
BL idct8core_down_arm
BL idct8core_down_arm
BL idct8core_down_arm
BL idct8core_down_arm
ADD r13,r13,#64*2
LDMFD r13!,{r4-r11,PC}
.size oc_idct8x8_arm, .-oc_idct8x8_arm @ ENDP
.type oc_idct8x8_10_arm, %function; oc_idct8x8_10_arm: @ PROC
STMFD r13!,{r4-r11,r14}
SUB r13,r13,#64*2
@ Row transforms
MOV r2, r0
MOV r0, r13 @ Write to temp storage.
BL idct4core_arm
BL idct3core_arm
BL idct2core_arm
BL idct1core_arm
@ Clear input data for next block.
MOV r4, #0
STR r4, [r1,#-4*16]!
STR r4, [r1,#4]
STR r4, [r1,#16]
STR r4, [r1,#20]
STR r4, [r1,#32]
STR r4, [r1,#48]
MOV r1, r13 @ Read from temp storage.
MOV r0, r2 @ Write to the final destination
oc_idct8x8_10_arm_cols:
@ Column transforms
BL idct4core_down_arm
BL idct4core_down_arm
BL idct4core_down_arm
BL idct4core_down_arm
BL idct4core_down_arm
BL idct4core_down_arm
BL idct4core_down_arm
BL idct4core_down_arm
ADD r13,r13,#64*2
LDMFD r13!,{r4-r11,PC}
.size oc_idct8x8_10_arm, .-oc_idct8x8_10_arm @ ENDP
.type oc_idct8x8_6_arm, %function; oc_idct8x8_6_arm: @ PROC
STMFD r13!,{r4-r7,r9-r11,r14}
SUB r13,r13,#64*2
@ Row transforms
MOV r2, r0
MOV r0, r13 @ Write to temp storage.
BL idct3core_arm
BL idct2core_arm
BL idct1core_arm
@ Clear input data for next block.
MOV r4, #0
STR r4, [r1,#-3*16]!
STR r4, [r1,#4]
STR r4, [r1,#16]
STR r4, [r1,#32]
MOV r1, r13 @ Read from temp storage.
MOV r0, r2 @ Write to the final destination
@ Column transforms
BL idct3core_down_arm
BL idct3core_down_arm
BL idct3core_down_arm
BL idct3core_down_arm
BL idct3core_down_arm
BL idct3core_down_arm
BL idct3core_down_arm
BL idct3core_down_arm
ADD r13,r13,#64*2
LDMFD r13!,{r4-r7,r9-r11,PC}
.size oc_idct8x8_6_arm, .-oc_idct8x8_6_arm @ ENDP
.type oc_idct8x8_3_arm, %function; oc_idct8x8_3_arm: @ PROC
STMFD r13!,{r4-r7,r9-r11,r14}
SUB r13,r13,#64*2
@ Row transforms
MOV r2, r0
MOV r0, r13 @ Write to temp storage.
BL idct2core_arm
BL idct1core_arm
@ Clear input data for next block.
MOV r4, #0
STR r4, [r1,#-2*16]!
STR r4, [r1,#16]
MOV r1, r13 @ Read from temp storage.
MOV r0, r2 @ Write to the final destination
@ Column transforms
BL idct2core_down_arm
BL idct2core_down_arm
BL idct2core_down_arm
BL idct2core_down_arm
BL idct2core_down_arm
BL idct2core_down_arm
BL idct2core_down_arm
BL idct2core_down_arm
ADD r13,r13,#64*2
LDMFD r13!,{r4-r7,r9-r11,PC}
.size oc_idct8x8_3_arm, .-oc_idct8x8_3_arm @ ENDP
.type idct1core_arm, %function; idct1core_arm: @ PROC
@ r0 = ogg_int16_t *_y (destination)
@ r1 = const ogg_int16_t *_x (source)
LDRSH r3, [r1], #16
MOV r12,#0x05
ORR r12,r12,#0xB500
MUL r3, r12, r3
@ Stall ?
MOV r3, r3, ASR #16
STRH r3, [r0], #2
STRH r3, [r0, #14]
STRH r3, [r0, #30]
STRH r3, [r0, #46]
STRH r3, [r0, #62]
STRH r3, [r0, #78]
STRH r3, [r0, #94]
STRH r3, [r0, #110]
MOV PC,R14
.size idct1core_arm, .-idct1core_arm @ ENDP
.type idct2core_arm, %function; idct2core_arm: @ PROC
@ r0 = ogg_int16_t *_y (destination)
@ r1 = const ogg_int16_t *_x (source)
LDRSH r9, [r1], #16 @ r9 = x[0]
LDR r12,OC_C4S4
LDRSH r11,[r1, #-14] @ r11= x[1]
LDR r3, OC_C7S1
MUL r9, r12,r9 @ r9 = t[0]<<16 = OC_C4S4*x[0]
LDR r10,OC_C1S7
MUL r3, r11,r3 @ r3 = t[4]<<16 = OC_C7S1*x[1]
MOV r9, r9, ASR #16 @ r9 = t[0]
MUL r11,r10,r11 @ r11= t[7]<<16 = OC_C1S7*x[1]
MOV r3, r3, ASR #16 @ r3 = t[4]
MUL r10,r12,r3 @ r10= t[5]<<16 = OC_C4S4*t[4]
MOV r11,r11,ASR #16 @ r11= t[7]
MUL r12,r11,r12 @ r12= t[6]<<16 = OC_C4S4*t[7]
MOV r10,r10,ASR #16 @ r10= t[5]
ADD r12,r9,r12,ASR #16 @ r12= t[0]+t[6]
ADD r12,r12,r10 @ r12= t[0]+t2[6] = t[0]+t[6]+t[5]
SUB r10,r12,r10,LSL #1 @ r10= t[0]+t2[5] = t[0]+t[6]-t[5]
ADD r3, r3, r9 @ r3 = t[0]+t[4]
ADD r11,r11,r9 @ r11= t[0]+t[7]
STRH r11,[r0], #2 @ y[0] = t[0]+t[7]
STRH r12,[r0, #14] @ y[1] = t[0]+t[6]
STRH r10,[r0, #30] @ y[2] = t[0]+t[5]
STRH r3, [r0, #46] @ y[3] = t[0]+t[4]
RSB r3, r3, r9, LSL #1 @ r3 = t[0]*2-(t[0]+t[4])=t[0]-t[4]
RSB r10,r10,r9, LSL #1 @ r10= t[0]*2-(t[0]+t[5])=t[0]-t[5]
RSB r12,r12,r9, LSL #1 @ r12= t[0]*2-(t[0]+t[6])=t[0]-t[6]
RSB r11,r11,r9, LSL #1 @ r1 = t[0]*2-(t[0]+t[7])=t[0]-t[7]
STRH r3, [r0, #62] @ y[4] = t[0]-t[4]
STRH r10,[r0, #78] @ y[5] = t[0]-t[5]
STRH r12,[r0, #94] @ y[6] = t[0]-t[6]
STRH r11,[r0, #110] @ y[7] = t[0]-t[7]
MOV PC,r14
.size idct2core_arm, .-idct2core_arm @ ENDP
.type idct2core_down_arm, %function; idct2core_down_arm: @ PROC
@ r0 = ogg_int16_t *_y (destination)
@ r1 = const ogg_int16_t *_x (source)
LDRSH r9, [r1], #16 @ r9 = x[0]
LDR r12,OC_C4S4
LDRSH r11,[r1, #-14] @ r11= x[1]
LDR r3, OC_C7S1
MUL r9, r12,r9 @ r9 = t[0]<<16 = OC_C4S4*x[0]
LDR r10,OC_C1S7
MUL r3, r11,r3 @ r3 = t[4]<<16 = OC_C7S1*x[1]
MOV r9, r9, ASR #16 @ r9 = t[0]
MUL r11,r10,r11 @ r11= t[7]<<16 = OC_C1S7*x[1]
ADD r9, r9, #8 @ r9 = t[0]+8
MOV r3, r3, ASR #16 @ r3 = t[4]
MUL r10,r12,r3 @ r10= t[5]<<16 = OC_C4S4*t[4]
MOV r11,r11,ASR #16 @ r11= t[7]
MUL r12,r11,r12 @ r12= t[6]<<16 = OC_C4S4*t[7]
MOV r10,r10,ASR #16 @ r10= t[5]
ADD r12,r9,r12,ASR #16 @ r12= t[0]+t[6]+8
ADD r12,r12,r10 @ r12= t[0]+t2[6] = t[0]+t[6]+t[5]+8
SUB r10,r12,r10,LSL #1 @ r10= t[0]+t2[5] = t[0]+t[6]-t[5]+8
ADD r3, r3, r9 @ r3 = t[0]+t[4]+8
ADD r11,r11,r9 @ r11= t[0]+t[7]+8
@ TODO: This is wrong.
@ The C code truncates to 16 bits by storing to RAM and doing the
@ shifts later; we've got an extra 4 bits here.
MOV r4, r11,ASR #4
MOV r5, r12,ASR #4
MOV r6, r10,ASR #4
MOV r7, r3, ASR #4
RSB r3, r3, r9, LSL #1 @r3 =t[0]*2+8-(t[0]+t[4])=t[0]-t[4]+8
RSB r10,r10,r9, LSL #1 @r10=t[0]*2+8-(t[0]+t[5])=t[0]-t[5]+8
RSB r12,r12,r9, LSL #1 @r12=t[0]*2+8-(t[0]+t[6])=t[0]-t[6]+8
RSB r11,r11,r9, LSL #1 @r11=t[0]*2+8-(t[0]+t[7])=t[0]-t[7]+8
MOV r3, r3, ASR #4
MOV r10,r10,ASR #4
MOV r12,r12,ASR #4
MOV r11,r11,ASR #4
STRH r4, [r0], #2 @ y[0] = t[0]+t[7]
STRH r5, [r0, #14] @ y[1] = t[0]+t[6]
STRH r6, [r0, #30] @ y[2] = t[0]+t[5]
STRH r7, [r0, #46] @ y[3] = t[0]+t[4]
STRH r3, [r0, #62] @ y[4] = t[0]-t[4]
STRH r10,[r0, #78] @ y[5] = t[0]-t[5]
STRH r12,[r0, #94] @ y[6] = t[0]-t[6]
STRH r11,[r0, #110] @ y[7] = t[0]-t[7]
MOV PC,r14
.size idct2core_down_arm, .-idct2core_down_arm @ ENDP
.type idct3core_arm, %function; idct3core_arm: @ PROC
LDRSH r9, [r1], #16 @ r9 = x[0]
LDR r12,OC_C4S4 @ r12= OC_C4S4
LDRSH r3, [r1, #-12] @ r3 = x[2]
LDR r10,OC_C6S2 @ r10= OC_C6S2
MUL r9, r12,r9 @ r9 = t[0]<<16 = OC_C4S4*x[0]
LDR r4, OC_C2S6 @ r4 = OC_C2S6
MUL r10,r3, r10 @ r10= t[2]<<16 = OC_C6S2*x[2]
LDRSH r11,[r1, #-14] @ r11= x[1]
MUL r3, r4, r3 @ r3 = t[3]<<16 = OC_C2S6*x[2]
LDR r4, OC_C7S1 @ r4 = OC_C7S1
LDR r5, OC_C1S7 @ r5 = OC_C1S7
MOV r9, r9, ASR #16 @ r9 = t[0]
MUL r4, r11,r4 @ r4 = t[4]<<16 = OC_C7S1*x[1]
ADD r3, r9, r3, ASR #16 @ r3 = t[0]+t[3]
MUL r11,r5, r11 @ r11= t[7]<<16 = OC_C1S7*x[1]
MOV r4, r4, ASR #16 @ r4 = t[4]
MUL r5, r12,r4 @ r5 = t[5]<<16 = OC_C4S4*t[4]
MOV r11,r11,ASR #16 @ r11= t[7]
MUL r12,r11,r12 @ r12= t[6]<<16 = OC_C4S4*t[7]
ADD r10,r9, r10,ASR #16 @ r10= t[1] = t[0]+t[2]
RSB r6, r10,r9, LSL #1 @ r6 = t[2] = t[0]-t[2]
@ r3 = t2[0] = t[0]+t[3]
RSB r9, r3, r9, LSL #1 @ r9 = t2[3] = t[0]-t[3]
MOV r12,r12,ASR #16 @ r12= t[6]
ADD r5, r12,r5, ASR #16 @ r5 = t2[6] = t[6]+t[5]
RSB r12,r5, r12,LSL #1 @ r12= t2[5] = t[6]-t[5]
ADD r11,r3, r11 @ r11= t2[0]+t[7]
ADD r5, r10,r5 @ r5 = t[1]+t2[6]
ADD r12,r6, r12 @ r12= t[2]+t2[5]
ADD r4, r9, r4 @ r4 = t2[3]+t[4]
STRH r11,[r0], #2 @ y[0] = t[0]+t[7]
STRH r5, [r0, #14] @ y[1] = t[1]+t2[6]
STRH r12,[r0, #30] @ y[2] = t[2]+t2[5]
STRH r4, [r0, #46] @ y[3] = t2[3]+t[4]
RSB r11,r11,r3, LSL #1 @ r11= t2[0] - t[7]
RSB r5, r5, r10,LSL #1 @ r5 = t[1] - t2[6]
RSB r12,r12,r6, LSL #1 @ r6 = t[2] - t2[5]
RSB r4, r4, r9, LSL #1 @ r4 = t2[3] - t[4]
STRH r4, [r0, #62] @ y[4] = t2[3]-t[4]
STRH r12,[r0, #78] @ y[5] = t[2]-t2[5]
STRH r5, [r0, #94] @ y[6] = t[1]-t2[6]
STRH r11,[r0, #110] @ y[7] = t2[0]-t[7]
MOV PC,R14
.size idct3core_arm, .-idct3core_arm @ ENDP
.type idct3core_down_arm, %function; idct3core_down_arm: @ PROC
LDRSH r9, [r1], #16 @ r9 = x[0]
LDR r12,OC_C4S4 @ r12= OC_C4S4
LDRSH r3, [r1, #-12] @ r3 = x[2]
LDR r10,OC_C6S2 @ r10= OC_C6S2
MUL r9, r12,r9 @ r9 = t[0]<<16 = OC_C4S4*x[0]
LDR r4, OC_C2S6 @ r4 = OC_C2S6
MUL r10,r3, r10 @ r10= t[2]<<16 = OC_C6S2*x[2]
LDRSH r11,[r1, #-14] @ r11= x[1]
MUL r3, r4, r3 @ r3 = t[3]<<16 = OC_C2S6*x[2]
LDR r4, OC_C7S1 @ r4 = OC_C7S1
LDR r5, OC_C1S7 @ r5 = OC_C1S7
MOV r9, r9, ASR #16 @ r9 = t[0]
MUL r4, r11,r4 @ r4 = t[4]<<16 = OC_C7S1*x[1]
ADD r9, r9, #8 @ r9 = t[0]+8
MUL r11,r5, r11 @ r11= t[7]<<16 = OC_C1S7*x[1]
ADD r3, r9, r3, ASR #16 @ r3 = t[0]+t[3]+8
MOV r4, r4, ASR #16 @ r4 = t[4]
MUL r5, r12,r4 @ r5 = t[5]<<16 = OC_C4S4*t[4]
MOV r11,r11,ASR #16 @ r11= t[7]
MUL r12,r11,r12 @ r12= t[6]<<16 = OC_C4S4*t[7]
ADD r10,r9, r10,ASR #16 @ r10= t[1]+8 = t[0]+t[2]+8
RSB r6, r10,r9, LSL #1 @ r6 = t[2]+8 = t[0]-t[2]+8
@ r3 = t2[0]+8 = t[0]+t[3]+8
RSB r9, r3, r9, LSL #1 @ r9 = t2[3]+8 = t[0]-t[3]+8
MOV r12,r12,ASR #16 @ r12= t[6]
ADD r5, r12,r5, ASR #16 @ r5 = t2[6] = t[6]+t[5]
RSB r12,r5, r12,LSL #1 @ r12= t2[5] = t[6]-t[5]
ADD r11,r3, r11 @ r11= t2[0]+t[7] +8
ADD r5, r10,r5 @ r5 = t[1] +t2[6]+8
ADD r12,r6, r12 @ r12= t[2] +t2[5]+8
ADD r4, r9, r4 @ r4 = t2[3]+t[4] +8
RSB r3, r11,r3, LSL #1 @ r11= t2[0] - t[7] + 8
RSB r10,r5, r10,LSL #1 @ r5 = t[1] - t2[6] + 8
RSB r6, r12,r6, LSL #1 @ r6 = t[2] - t2[5] + 8
RSB r9, r4, r9, LSL #1 @ r4 = t2[3] - t[4] + 8
@ TODO: This is wrong.
@ The C code truncates to 16 bits by storing to RAM and doing the
@ shifts later; we've got an extra 4 bits here.
MOV r11,r11,ASR #4
MOV r5, r5, ASR #4
MOV r12,r12,ASR #4
MOV r4, r4, ASR #4
MOV r9, r9, ASR #4
MOV r6, r6, ASR #4
MOV r10,r10,ASR #4
MOV r3, r3, ASR #4
STRH r11,[r0], #2 @ y[0] = t[0]+t[7]
STRH r5, [r0, #14] @ y[1] = t[1]+t2[6]
STRH r12,[r0, #30] @ y[2] = t[2]+t2[5]
STRH r4, [r0, #46] @ y[3] = t2[3]+t[4]
STRH r9, [r0, #62] @ y[4] = t2[3]-t[4]
STRH r6, [r0, #78] @ y[5] = t[2]-t2[5]
STRH r10,[r0, #94] @ y[6] = t[1]-t2[6]
STRH r3, [r0, #110] @ y[7] = t2[0]-t[7]
MOV PC,R14
.size idct3core_down_arm, .-idct3core_down_arm @ ENDP
.type idct4core_arm, %function; idct4core_arm: @ PROC
@ r0 = ogg_int16_t *_y (destination)
@ r1 = const ogg_int16_t *_x (source)
LDRSH r9, [r1], #16 @ r9 = x[0]
LDR r10,OC_C4S4 @ r10= OC_C4S4
LDRSH r12,[r1, #-12] @ r12= x[2]
LDR r4, OC_C6S2 @ r4 = OC_C6S2
MUL r9, r10,r9 @ r9 = t[0]<<16 = OC_C4S4*x[0]
LDR r5, OC_C2S6 @ r5 = OC_C2S6
MUL r4, r12,r4 @ r4 = t[2]<<16 = OC_C6S2*x[2]
LDRSH r3, [r1, #-14] @ r3 = x[1]
MUL r5, r12,r5 @ r5 = t[3]<<16 = OC_C2S6*x[2]
LDR r6, OC_C7S1 @ r6 = OC_C7S1
LDR r12,OC_C1S7 @ r12= OC_C1S7
LDRSH r11,[r1, #-10] @ r11= x[3]
MUL r6, r3, r6 @ r6 = t[4]<<16 = OC_C7S1*x[1]
LDR r7, OC_C5S3 @ r7 = OC_C5S3
MUL r3, r12,r3 @ r3 = t[7]<<16 = OC_C1S7*x[1]
LDR r8, OC_C3S5 @ r8 = OC_C3S5
MUL r7, r11,r7 @ r7 = -t[5]<<16 = OC_C5S3*x[3]
MOV r9, r9, ASR #16 @ r9 = t[0]
MUL r11,r8, r11 @ r11= t[6]<<16 = OC_C3S5*x[3]
MOV r6, r6, ASR #16 @ r6 = t[4]
@ TODO: This is wrong; t[4]-t[5] and t[7]-t[6] need to be truncated to 16-bit
@ before multiplying, not after (this is not equivalent)
SUB r7, r6, r7, ASR #16 @ r7 = t2[4]=t[4]+t[5] (as r7=-t[5])
RSB r6, r7, r6, LSL #1 @ r6 = t[4]-t[5]
MUL r6, r10,r6 @ r6 = t2[5]<<16 =OC_C4S4*(t[4]-t[5])
MOV r3, r3, ASR #16 @ r3 = t[7]
ADD r11,r3, r11,ASR #16 @ r11= t2[7]=t[7]+t[6]
RSB r3, r11,r3, LSL #1 @ r3 = t[7]-t[6]
MUL r3, r10,r3 @ r3 = t2[6]<<16 =OC_C4S4*(t[7]-t[6])
ADD r4, r9, r4, ASR #16 @ r4 = t[1] = t[0] + t[2]
RSB r10,r4, r9, LSL #1 @ r10= t[2] = t[0] - t[2]
ADD r5, r9, r5, ASR #16 @ r5 = t[0] = t[0] + t[3]
RSB r9, r5, r9, LSL #1 @ r9 = t[3] = t[0] - t[3]
MOV r3, r3, ASR #16 @ r3 = t2[6]
ADD r6, r3, r6, ASR #16 @ r6 = t3[6] = t2[6]+t2[5]
RSB r3, r6, r3, LSL #1 @ r3 = t3[5] = t2[6]-t2[5]
ADD r11,r5, r11 @ r11= t[0]+t2[7]
ADD r6, r4, r6 @ r6 = t[1]+t3[6]
ADD r3, r10,r3 @ r3 = t[2]+t3[5]
ADD r7, r9, r7 @ r7 = t[3]+t2[4]
STRH r11,[r0], #2 @ y[0] = t[0]+t[7]
STRH r6, [r0, #14] @ y[1] = t[1]+t2[6]
STRH r3, [r0, #30] @ y[2] = t[2]+t2[5]
STRH r7, [r0, #46] @ y[3] = t2[3]+t[4]
RSB r11,r11,r5, LSL #1 @ r11= t[0]-t2[7]
RSB r6, r6, r4, LSL #1 @ r6 = t[1]-t3[6]
RSB r3, r3, r10,LSL #1 @ r3 = t[2]-t3[5]
RSB r7, r7, r9, LSL #1 @ r7 = t[3]-t2[4]
STRH r7, [r0, #62] @ y[4] = t2[3]-t[4]
STRH r3, [r0, #78] @ y[5] = t[2]-t2[5]
STRH r6, [r0, #94] @ y[6] = t[1]-t2[6]
STRH r11, [r0, #110] @ y[7] = t2[0]-t[7]
MOV PC,r14
.size idct4core_arm, .-idct4core_arm @ ENDP
.type idct4core_down_arm, %function; idct4core_down_arm: @ PROC
@ r0 = ogg_int16_t *_y (destination)
@ r1 = const ogg_int16_t *_x (source)
LDRSH r9, [r1], #16 @ r9 = x[0]
LDR r10,OC_C4S4 @ r10= OC_C4S4
LDRSH r12,[r1, #-12] @ r12= x[2]
LDR r4, OC_C6S2 @ r4 = OC_C6S2
MUL r9, r10,r9 @ r9 = t[0]<<16 = OC_C4S4*x[0]
LDR r5, OC_C2S6 @ r5 = OC_C2S6
MUL r4, r12,r4 @ r4 = t[2]<<16 = OC_C6S2*x[2]
LDRSH r3, [r1, #-14] @ r3 = x[1]
MUL r5, r12,r5 @ r5 = t[3]<<16 = OC_C2S6*x[2]
LDR r6, OC_C7S1 @ r6 = OC_C7S1
LDR r12,OC_C1S7 @ r12= OC_C1S7
LDRSH r11,[r1, #-10] @ r11= x[3]
MUL r6, r3, r6 @ r6 = t[4]<<16 = OC_C7S1*x[1]
LDR r7, OC_C5S3 @ r7 = OC_C5S3
MUL r3, r12,r3 @ r3 = t[7]<<16 = OC_C1S7*x[1]
LDR r8, OC_C3S5 @ r8 = OC_C3S5
MUL r7, r11,r7 @ r7 = -t[5]<<16 = OC_C5S3*x[3]
MOV r9, r9, ASR #16 @ r9 = t[0]
MUL r11,r8, r11 @ r11= t[6]<<16 = OC_C3S5*x[3]
MOV r6, r6, ASR #16 @ r6 = t[4]
@ TODO: This is wrong; t[4]-t[5] and t[7]-t[6] need to be truncated to 16-bit
@ before multiplying, not after (this is not equivalent)
SUB r7, r6, r7, ASR #16 @ r7 = t2[4]=t[4]+t[5] (as r7=-t[5])
RSB r6, r7, r6, LSL #1 @ r6 = t[4]-t[5]
MUL r6, r10,r6 @ r6 = t2[5]<<16 =OC_C4S4*(t[4]-t[5])
MOV r3, r3, ASR #16 @ r3 = t[7]
ADD r11,r3, r11,ASR #16 @ r11= t2[7]=t[7]+t[6]
RSB r3, r11,r3, LSL #1 @ r3 = t[7]-t[6]
ADD r9, r9, #8 @ r9 = t[0]+8
MUL r3, r10,r3 @ r3 = t2[6]<<16 =OC_C4S4*(t[7]-t[6])
ADD r4, r9, r4, ASR #16 @ r4 = t[1] = t[0] + t[2] + 8
RSB r10,r4, r9, LSL #1 @ r10= t[2] = t[0] - t[2] + 8
ADD r5, r9, r5, ASR #16 @ r5 = t[0] = t[0] + t[3] + 8
RSB r9, r5, r9, LSL #1 @ r9 = t[3] = t[0] - t[3] + 8
MOV r3, r3, ASR #16 @ r3 = t2[6]
ADD r6, r3, r6, ASR #16 @ r6 = t3[6] = t2[6]+t2[5]
RSB r3, r6, r3, LSL #1 @ r3 = t3[5] = t2[6]-t2[5]
ADD r5, r5, r11 @ r5 = t[0]+t2[7]+8
ADD r4, r4, r6 @ r4 = t[1]+t3[6]+8
ADD r10,r10,r3 @ r10= t[2]+t3[5]+8
ADD r9, r9, r7 @ r9 = t[3]+t2[4]+8
SUB r11,r5, r11,LSL #1 @ r11= t[0]-t2[7]+8
SUB r6, r4, r6, LSL #1 @ r6 = t[1]-t3[6]+8
SUB r3, r10,r3, LSL #1 @ r3 = t[2]-t3[5]+8
SUB r7, r9, r7, LSL #1 @ r7 = t[3]-t2[4]+8
@ TODO: This is wrong.
@ The C code truncates to 16 bits by storing to RAM and doing the
@ shifts later; we've got an extra 4 bits here.
MOV r11,r11,ASR #4
MOV r6, r6, ASR #4
MOV r3, r3, ASR #4
MOV r7, r7, ASR #4
MOV r9, r9, ASR #4
MOV r10,r10,ASR #4
MOV r4, r4, ASR #4
MOV r5, r5, ASR #4
STRH r5,[r0], #2 @ y[0] = t[0]+t[7]
STRH r4, [r0, #14] @ y[1] = t[1]+t2[6]
STRH r10,[r0, #30] @ y[2] = t[2]+t2[5]
STRH r9, [r0, #46] @ y[3] = t2[3]+t[4]
STRH r7, [r0, #62] @ y[4] = t2[3]-t[4]
STRH r3, [r0, #78] @ y[5] = t[2]-t2[5]
STRH r6, [r0, #94] @ y[6] = t[1]-t2[6]
STRH r11,[r0, #110] @ y[7] = t2[0]-t[7]
MOV PC,r14
.size idct4core_down_arm, .-idct4core_down_arm @ ENDP
.type idct8core_arm, %function; idct8core_arm: @ PROC
@ r0 = ogg_int16_t *_y (destination)
@ r1 = const ogg_int16_t *_x (source)
LDRSH r2, [r1],#16 @ r2 = x[0]
STMFD r13!,{r1,r14}
LDRSH r6, [r1, #-8] @ r6 = x[4]
LDR r12,OC_C4S4 @ r12= C4S4
LDRSH r4, [r1, #-12] @ r4 = x[2]
ADD r2, r2, r6 @ r2 = x[0] + x[4]
SUB r6, r2, r6, LSL #1 @ r6 = x[0] - x[4]
@ For spec compliance, these sums must be truncated to 16-bit precision
@ _before_ the multiply (not after).
@ Sadly, ARMv4 provides no simple way to do that.
MOV r2, r2, LSL #16
MOV r6, r6, LSL #16
MOV r2, r2, ASR #16
MOV r6, r6, ASR #16
MUL r2, r12,r2 @ r2 = t[0]<<16 = C4S4*(x[0]+x[4])
LDRSH r8, [r1, #-4] @ r8 = x[6]
LDR r7, OC_C6S2 @ r7 = OC_C6S2
MUL r6, r12,r6 @ r6 = t[1]<<16 = C4S4*(x[0]-x[4])
LDR r14,OC_C2S6 @ r14= OC_C2S6
MUL r3, r4, r7 @ r3 = OC_C6S2*x[2]
LDR r5, OC_C7S1 @ r5 = OC_C7S1
MUL r4, r14,r4 @ r4 = OC_C2S6*x[2]
MOV r3, r3, ASR #16 @ r3 = OC_C6S2*x[2]>>16
MUL r14,r8, r14 @ r14= OC_C2S6*x[6]
MOV r4, r4, ASR #16 @ r4 = OC_C2S6*x[2]>>16
MUL r8, r7, r8 @ r8 = OC_C6S2*x[6]
LDR r7, OC_C1S7 @ r7 = OC_C1S7
SUB r3, r3, r14,ASR #16 @ r3=t[2]=C6S2*x[2]>>16-C2S6*x[6]>>16
LDRSH r14,[r1, #-14] @ r14= x[1]
ADD r4, r4, r8, ASR #16 @ r4=t[3]=C2S6*x[2]>>16+C6S2*x[6]>>16
LDRSH r8, [r1, #-2] @ r8 = x[7]
MUL r9, r5, r14 @ r9 = OC_C7S1*x[1]
LDRSH r10,[r1, #-6] @ r10= x[5]
MUL r14,r7, r14 @ r14= OC_C1S7*x[1]
MOV r9, r9, ASR #16 @ r9 = OC_C7S1*x[1]>>16
MUL r7, r8, r7 @ r7 = OC_C1S7*x[7]
MOV r14,r14,ASR #16 @ r14= OC_C1S7*x[1]>>16
MUL r8, r5, r8 @ r8 = OC_C7S1*x[7]
LDRSH r1, [r1, #-10] @ r1 = x[3]
LDR r5, OC_C3S5 @ r5 = OC_C3S5
LDR r11,OC_C5S3 @ r11= OC_C5S3
ADD r8, r14,r8, ASR #16 @ r8=t[7]=C1S7*x[1]>>16+C7S1*x[7]>>16
MUL r14,r5, r10 @ r14= OC_C3S5*x[5]
SUB r9, r9, r7, ASR #16 @ r9=t[4]=C7S1*x[1]>>16-C1S7*x[7]>>16
MUL r10,r11,r10 @ r10= OC_C5S3*x[5]
MOV r14,r14,ASR #16 @ r14= OC_C3S5*x[5]>>16
MUL r11,r1, r11 @ r11= OC_C5S3*x[3]
MOV r10,r10,ASR #16 @ r10= OC_C5S3*x[5]>>16
MUL r1, r5, r1 @ r1 = OC_C3S5*x[3]
SUB r14,r14,r11,ASR #16 @r14=t[5]=C3S5*x[5]>>16-C5S3*x[3]>>16
ADD r10,r10,r1, ASR #16 @r10=t[6]=C5S3*x[5]>>16+C3S5*x[3]>>16
@ r2=t[0]<<16 r3=t[2] r4=t[3] r6=t[1]<<16 r8=t[7] r9=t[4]
@ r10=t[6] r12=C4S4 r14=t[5]
@ TODO: This is wrong; t[4]-t[5] and t[7]-t[6] need to be truncated to 16-bit
@ before multiplying, not after (this is not equivalent)
@ Stage 2
@ 4-5 butterfly
ADD r9, r9, r14 @ r9 = t2[4] = t[4]+t[5]
SUB r14,r9, r14, LSL #1 @ r14= t[4]-t[5]
MUL r14,r12,r14 @ r14= t2[5]<<16 = C4S4*(t[4]-t[5])
@ 7-6 butterfly
ADD r8, r8, r10 @ r8 = t2[7] = t[7]+t[6]
SUB r10,r8, r10, LSL #1 @ r10= t[7]-t[6]
MUL r10,r12,r10 @ r10= t2[6]<<16 = C4S4*(t[7]+t[6])
@ r2=t[0]<<16 r3=t[2] r4=t[3] r6=t[1]<<16 r8=t2[7] r9=t2[4]
@ r10=t2[6]<<16 r12=C4S4 r14=t2[5]<<16
@ Stage 3
@ 0-3 butterfly
ADD r2, r4, r2, ASR #16 @ r2 = t2[0] = t[0] + t[3]
SUB r4, r2, r4, LSL #1 @ r4 = t2[3] = t[0] - t[3]
@ 1-2 butterfly
ADD r6, r3, r6, ASR #16 @ r6 = t2[1] = t[1] + t[2]
SUB r3, r6, r3, LSL #1 @ r3 = t2[2] = t[1] - t[2]
@ 6-5 butterfly
MOV r14,r14,ASR #16 @ r14= t2[5]
ADD r10,r14,r10,ASR #16 @ r10= t3[6] = t[6] + t[5]
SUB r14,r10,r14,LSL #1 @ r14= t3[5] = t[6] - t[5]
@ r2=t2[0] r3=t2[2] r4=t2[3] r6=t2[1] r8=t2[7] r9=t2[4]
@ r10=t3[6] r14=t3[5]
@ Stage 4
ADD r2, r2, r8 @ r2 = t[0] + t[7]
ADD r6, r6, r10 @ r6 = t[1] + t[6]
ADD r3, r3, r14 @ r3 = t[2] + t[5]
ADD r4, r4, r9 @ r4 = t[3] + t[4]
SUB r8, r2, r8, LSL #1 @ r8 = t[0] - t[7]
SUB r10,r6, r10,LSL #1 @ r10= t[1] - t[6]
SUB r14,r3, r14,LSL #1 @ r14= t[2] - t[5]
SUB r9, r4, r9, LSL #1 @ r9 = t[3] - t[4]
STRH r2, [r0], #2 @ y[0] = t[0]+t[7]
STRH r6, [r0, #14] @ y[1] = t[1]+t[6]
STRH r3, [r0, #30] @ y[2] = t[2]+t[5]
STRH r4, [r0, #46] @ y[3] = t[3]+t[4]
STRH r9, [r0, #62] @ y[4] = t[3]-t[4]
STRH r14,[r0, #78] @ y[5] = t[2]-t[5]
STRH r10,[r0, #94] @ y[6] = t[1]-t[6]
STRH r8, [r0, #110] @ y[7] = t[0]-t[7]
LDMFD r13!,{r1,PC}
.size idct8core_arm, .-idct8core_arm @ ENDP
.type idct8core_down_arm, %function; idct8core_down_arm: @ PROC
@ r0 = ogg_int16_t *_y (destination)
@ r1 = const ogg_int16_t *_x (source)
LDRSH r2, [r1],#16 @ r2 = x[0]
STMFD r13!,{r1,r14}
LDRSH r6, [r1, #-8] @ r6 = x[4]
LDR r12,OC_C4S4 @ r12= C4S4
LDRSH r4, [r1, #-12] @ r4 = x[2]
ADD r2, r2, r6 @ r2 = x[0] + x[4]
SUB r6, r2, r6, LSL #1 @ r6 = x[0] - x[4]
@ For spec compliance, these sums must be truncated to 16-bit precision
@ _before_ the multiply (not after).
@ Sadly, ARMv4 provides no simple way to do that.
MOV r2, r2, LSL #16
MOV r6, r6, LSL #16
MOV r2, r2, ASR #16
MOV r6, r6, ASR #16
MUL r2, r12,r2 @ r2 = t[0]<<16 = C4S4*(x[0]+x[4])
LDRSH r8, [r1, #-4] @ r8 = x[6]
LDR r7, OC_C6S2 @ r7 = OC_C6S2
MUL r6, r12,r6 @ r6 = t[1]<<16 = C4S4*(x[0]-x[4])
LDR r14,OC_C2S6 @ r14= OC_C2S6
MUL r3, r4, r7 @ r3 = OC_C6S2*x[2]
LDR r5, OC_C7S1 @ r5 = OC_C7S1
MUL r4, r14,r4 @ r4 = OC_C2S6*x[2]
MOV r3, r3, ASR #16 @ r3 = OC_C6S2*x[2]>>16
MUL r14,r8, r14 @ r14= OC_C2S6*x[6]
MOV r4, r4, ASR #16 @ r4 = OC_C2S6*x[2]>>16
MUL r8, r7, r8 @ r8 = OC_C6S2*x[6]
LDR r7, OC_C1S7 @ r7 = OC_C1S7
SUB r3, r3, r14,ASR #16 @ r3=t[2]=C6S2*x[2]>>16-C2S6*x[6]>>16
LDRSH r14,[r1, #-14] @ r14= x[1]
ADD r4, r4, r8, ASR #16 @ r4=t[3]=C2S6*x[2]>>16+C6S2*x[6]>>16
LDRSH r8, [r1, #-2] @ r8 = x[7]
MUL r9, r5, r14 @ r9 = OC_C7S1*x[1]
LDRSH r10,[r1, #-6] @ r10= x[5]
MUL r14,r7, r14 @ r14= OC_C1S7*x[1]
MOV r9, r9, ASR #16 @ r9 = OC_C7S1*x[1]>>16
MUL r7, r8, r7 @ r7 = OC_C1S7*x[7]
MOV r14,r14,ASR #16 @ r14= OC_C1S7*x[1]>>16
MUL r8, r5, r8 @ r8 = OC_C7S1*x[7]
LDRSH r1, [r1, #-10] @ r1 = x[3]
LDR r5, OC_C3S5 @ r5 = OC_C3S5
LDR r11,OC_C5S3 @ r11= OC_C5S3
ADD r8, r14,r8, ASR #16 @ r8=t[7]=C1S7*x[1]>>16+C7S1*x[7]>>16
MUL r14,r5, r10 @ r14= OC_C3S5*x[5]
SUB r9, r9, r7, ASR #16 @ r9=t[4]=C7S1*x[1]>>16-C1S7*x[7]>>16
MUL r10,r11,r10 @ r10= OC_C5S3*x[5]
MOV r14,r14,ASR #16 @ r14= OC_C3S5*x[5]>>16
MUL r11,r1, r11 @ r11= OC_C5S3*x[3]
MOV r10,r10,ASR #16 @ r10= OC_C5S3*x[5]>>16
MUL r1, r5, r1 @ r1 = OC_C3S5*x[3]
SUB r14,r14,r11,ASR #16 @r14=t[5]=C3S5*x[5]>>16-C5S3*x[3]>>16
ADD r10,r10,r1, ASR #16 @r10=t[6]=C5S3*x[5]>>16+C3S5*x[3]>>16
@ r2=t[0]<<16 r3=t[2] r4=t[3] r6=t[1]<<16 r8=t[7] r9=t[4]
@ r10=t[6] r12=C4S4 r14=t[5]
@ Stage 2
@ TODO: This is wrong; t[4]-t[5] and t[7]-t[6] need to be truncated to 16-bit
@ before multiplying, not after (this is not equivalent)
@ 4-5 butterfly
ADD r9, r9, r14 @ r9 = t2[4] = t[4]+t[5]
SUB r14,r9, r14, LSL #1 @ r14= t[4]-t[5]
MUL r14,r12,r14 @ r14= t2[5]<<16 = C4S4*(t[4]-t[5])
@ 7-6 butterfly
ADD r8, r8, r10 @ r8 = t2[7] = t[7]+t[6]
SUB r10,r8, r10, LSL #1 @ r10= t[7]-t[6]
MUL r10,r12,r10 @ r10= t2[6]<<16 = C4S4*(t[7]+t[6])
@ r2=t[0]<<16 r3=t[2] r4=t[3] r6=t[1]<<16 r8=t2[7] r9=t2[4]
@ r10=t2[6]<<16 r12=C4S4 r14=t2[5]<<16
@ Stage 3
ADD r2, r2, #8<<16 @ r2 = t[0]+8<<16
ADD r6, r6, #8<<16 @ r6 = t[1]+8<<16
@ 0-3 butterfly
ADD r2, r4, r2, ASR #16 @ r2 = t2[0] = t[0] + t[3] + 8
SUB r4, r2, r4, LSL #1 @ r4 = t2[3] = t[0] - t[3] + 8
@ 1-2 butterfly
ADD r6, r3, r6, ASR #16 @ r6 = t2[1] = t[1] + t[2] + 8
SUB r3, r6, r3, LSL #1 @ r3 = t2[2] = t[1] - t[2] + 8
@ 6-5 butterfly
MOV r14,r14,ASR #16 @ r14= t2[5]
ADD r10,r14,r10,ASR #16 @ r10= t3[6] = t[6] + t[5]
SUB r14,r10,r14,LSL #1 @ r14= t3[5] = t[6] - t[5]
@ r2=t2[0] r3=t2[2] r4=t2[3] r6=t2[1] r8=t2[7] r9=t2[4]
@ r10=t3[6] r14=t3[5]
@ Stage 4
ADD r2, r2, r8 @ r2 = t[0] + t[7] + 8
ADD r6, r6, r10 @ r6 = t[1] + t[6] + 8
ADD r3, r3, r14 @ r3 = t[2] + t[5] + 8
ADD r4, r4, r9 @ r4 = t[3] + t[4] + 8
SUB r8, r2, r8, LSL #1 @ r8 = t[0] - t[7] + 8
SUB r10,r6, r10,LSL #1 @ r10= t[1] - t[6] + 8
SUB r14,r3, r14,LSL #1 @ r14= t[2] - t[5] + 8
SUB r9, r4, r9, LSL #1 @ r9 = t[3] - t[4] + 8
@ TODO: This is wrong.
@ The C code truncates to 16 bits by storing to RAM and doing the
@ shifts later; we've got an extra 4 bits here.
MOV r2, r2, ASR #4
MOV r6, r6, ASR #4
MOV r3, r3, ASR #4
MOV r4, r4, ASR #4
MOV r8, r8, ASR #4
MOV r10,r10,ASR #4
MOV r14,r14,ASR #4
MOV r9, r9, ASR #4
STRH r2, [r0], #2 @ y[0] = t[0]+t[7]
STRH r6, [r0, #14] @ y[1] = t[1]+t[6]
STRH r3, [r0, #30] @ y[2] = t[2]+t[5]
STRH r4, [r0, #46] @ y[3] = t[3]+t[4]
STRH r9, [r0, #62] @ y[4] = t[3]-t[4]
STRH r14,[r0, #78] @ y[5] = t[2]-t[5]
STRH r10,[r0, #94] @ y[6] = t[1]-t[6]
STRH r8, [r0, #110] @ y[7] = t[0]-t[7]
LDMFD r13!,{r1,PC}
.size idct8core_down_arm, .-idct8core_down_arm @ ENDP
.if OC_ARM_ASM_MEDIA
.global oc_idct8x8_1_v6
.global oc_idct8x8_v6
.type oc_idct8x8_1_v6, %function; oc_idct8x8_1_v6: @ PROC
@ r0 = ogg_int16_t *_y
@ r1 = ogg_uint16_t _dc
ORR r2, r1, r1, LSL #16
ORR r3, r1, r1, LSL #16
STRD r2, [r0], #8
STRD r2, [r0], #8
STRD r2, [r0], #8
STRD r2, [r0], #8
STRD r2, [r0], #8
STRD r2, [r0], #8
STRD r2, [r0], #8
STRD r2, [r0], #8
STRD r2, [r0], #8
STRD r2, [r0], #8
STRD r2, [r0], #8
STRD r2, [r0], #8
STRD r2, [r0], #8
STRD r2, [r0], #8
STRD r2, [r0], #8
STRD r2, [r0], #8
MOV PC, r14
.size oc_idct8x8_1_v6, .-oc_idct8x8_1_v6 @ ENDP
.type oc_idct8x8_v6, %function; oc_idct8x8_v6: @ PROC
@ r0 = ogg_int16_t *_y
@ r1 = ogg_int16_t *_x
@ r2 = int _last_zzi
CMP r2, #3
BLE oc_idct8x8_3_v6
@CMP r2, #6
@BLE oc_idct8x8_6_v6
CMP r2, #10
BLE oc_idct8x8_10_v6
oc_idct8x8_slow_v6:
STMFD r13!,{r4-r11,r14}
SUB r13,r13,#64*2
@ Row transforms
STR r0, [r13,#-4]!
ADD r0, r13, #4 @ Write to temp storage.
BL idct8_8core_v6
BL idct8_8core_v6
BL idct8_8core_v6
BL idct8_8core_v6
LDR r0, [r13], #4 @ Write to the final destination.
@ Clear input data for next block.
MOV r4, #0
MOV r5, #0
STRD r4, [r1,#-8*16]!
STRD r4, [r1,#8]
STRD r4, [r1,#16]
STRD r4, [r1,#24]
STRD r4, [r1,#32]
STRD r4, [r1,#40]
STRD r4, [r1,#48]
STRD r4, [r1,#56]
STRD r4, [r1,#64]
STRD r4, [r1,#72]
STRD r4, [r1,#80]
STRD r4, [r1,#88]
STRD r4, [r1,#96]
STRD r4, [r1,#104]
STRD r4, [r1,#112]
STRD r4, [r1,#120]
MOV r1, r13 @ And read from temp storage.
@ Column transforms
BL idct8_8core_down_v6
BL idct8_8core_down_v6
BL idct8_8core_down_v6
BL idct8_8core_down_v6
ADD r13,r13,#64*2
LDMFD r13!,{r4-r11,PC}
.size oc_idct8x8_v6, .-oc_idct8x8_v6 @ ENDP
.type oc_idct8x8_10_v6, %function; oc_idct8x8_10_v6: @ PROC
STMFD r13!,{r4-r11,r14}
SUB r13,r13,#64*2+4
@ Row transforms
MOV r2, r13
STR r0, [r13,#-4]!
AND r0, r2, #4 @ Align the stack.
ADD r0, r0, r2 @ Write to temp storage.
BL idct4_3core_v6
BL idct2_1core_v6
LDR r0, [r13], #4 @ Write to the final destination.
@ Clear input data for next block.
MOV r4, #0
MOV r5, #0
STRD r4, [r1,#-4*16]!
STRD r4, [r1,#16]
STR r4, [r1,#32]
STR r4, [r1,#48]
AND r1, r13,#4 @ Align the stack.
ADD r1, r1, r13 @ And read from temp storage.
@ Column transforms
BL idct4_4core_down_v6
BL idct4_4core_down_v6
BL idct4_4core_down_v6
BL idct4_4core_down_v6
ADD r13,r13,#64*2+4
LDMFD r13!,{r4-r11,PC}
.size oc_idct8x8_10_v6, .-oc_idct8x8_10_v6 @ ENDP
.type oc_idct8x8_3_v6, %function; oc_idct8x8_3_v6: @ PROC
STMFD r13!,{r4-r8,r14}
SUB r13,r13,#64*2
@ Row transforms
MOV r8, r0
MOV r0, r13 @ Write to temp storage.
BL idct2_1core_v6
@ Clear input data for next block.
MOV r4, #0
STR r4, [r1,#-2*16]!
STR r4, [r1,#16]
MOV r1, r13 @ Read from temp storage.
MOV r0, r8 @ Write to the final destination.
@ Column transforms
BL idct2_2core_down_v6
BL idct2_2core_down_v6
BL idct2_2core_down_v6
BL idct2_2core_down_v6
ADD r13,r13,#64*2
LDMFD r13!,{r4-r8,PC}
.size oc_idct8x8_3_v6, .-oc_idct8x8_3_v6 @ ENDP
.type idct2_1core_v6, %function; idct2_1core_v6: @ PROC
@ r0 = ogg_int16_t *_y (destination)
@ r1 = const ogg_int16_t *_x (source)
@ Stage 1:
LDR r2, [r1], #16 @ r2 = <x[0,1]|x[0,0]>
LDR r3, OC_C4S4
LDRSH r6, [r1], #16 @ r6 = x[1,0]
SMULWB r12,r3, r2 @ r12= t[0,0]=OC_C4S4*x[0,0]>>16
LDRD r4, OC_C7S1 @ r4 = OC_C7S1; r5 = OC_C1S7
SMULWB r6, r3, r6 @ r6 = t[1,0]=OC_C4S4*x[1,0]>>16
SMULWT r4, r4, r2 @ r4 = t[0,4]=OC_C7S1*x[0,1]>>16
SMULWT r7, r5, r2 @ r7 = t[0,7]=OC_C1S7*x[0,1]>>16
@ Stage 2:
SMULWB r5, r3, r4 @ r5 = t[0,5]=OC_C4S4*t[0,4]>>16
PKHBT r12,r12,r6, LSL #16 @ r12= <t[1,0]|t[0,0]>
SMULWB r6, r3, r7 @ r6 = t[0,6]=OC_C4S4*t[0,7]>>16
PKHBT r7, r7, r3 @ r7 = <0|t[0,7]>
@ Stage 3:
PKHBT r5, r6, r5, LSL #16 @ r5 = <t[0,5]|t[0,6]>
PKHBT r4, r4, r3 @ r4 = <0|t[0,4]>
SADDSUBX r5, r5, r5 @ r5 = <t[0,6]+t[0,5]|t[0,6]-t[0,5]>
@ Stage 4:
PKHTB r6, r3, r5, ASR #16 @ r6 = <0|t[0,6]>
PKHBT r5, r5, r3 @ r5 = <0|t[0,5]>
SADD16 r3, r12,r7 @ r3 = t[0]+t[7]
STR r3, [r0], #4 @ y[0<<3] = t[0]+t[7]
SADD16 r3, r12,r6 @ r3 = t[0]+t[6]
STR r3, [r0, #12] @ y[1<<3] = t[0]+t[6]
SADD16 r3, r12,r5 @ r3 = t[0]+t[5]
STR r3, [r0, #28] @ y[2<<3] = t[0]+t[5]
SADD16 r3, r12,r4 @ r3 = t[0]+t[4]
STR r3, [r0, #44] @ y[3<<3] = t[0]+t[4]
SSUB16 r4, r12,r4 @ r4 = t[0]-t[4]
STR r4, [r0, #60] @ y[4<<3] = t[0]-t[4]
SSUB16 r5, r12,r5 @ r5 = t[0]-t[5]
STR r5, [r0, #76] @ y[5<<3] = t[0]-t[5]
SSUB16 r6, r12,r6 @ r6 = t[0]-t[6]
STR r6, [r0, #92] @ y[6<<3] = t[0]-t[6]
SSUB16 r7, r12,r7 @ r7 = t[0]-t[7]
STR r7, [r0, #108] @ y[7<<3] = t[0]-t[7]
MOV PC,r14
.size idct2_1core_v6, .-idct2_1core_v6 @ ENDP
.endif
.balign 8
OC_C7S1:
.word 12785 @ 31F1
OC_C1S7:
.word 64277 @ FB15
OC_C6S2:
.word 25080 @ 61F8
OC_C2S6:
.word 60547 @ EC83
OC_C5S3:
.word 36410 @ 8E3A
OC_C3S5:
.word 54491 @ D4DB
OC_C4S4:
.word 46341 @ B505
.if OC_ARM_ASM_MEDIA
.type idct2_2core_down_v6, %function; idct2_2core_down_v6: @ PROC
@ r0 = ogg_int16_t *_y (destination)
@ r1 = const ogg_int16_t *_x (source)
@ Stage 1:
LDR r2, [r1], #16 @ r2 = <x[0,1]|x[0,0]>
LDR r3, OC_C4S4
MOV r7 ,#8 @ r7 = 8
LDR r6, [r1], #16 @ r6 = <x[1,1]|x[1,0]>
SMLAWB r12,r3, r2, r7 @ r12= (t[0,0]=OC_C4S4*x[0,0]>>16)+8
LDRD r4, OC_C7S1 @ r4 = OC_C7S1; r5 = OC_C1S7
SMLAWB r7, r3, r6, r7 @ r7 = (t[1,0]=OC_C4S4*x[1,0]>>16)+8
SMULWT r5, r5, r2 @ r2 = t[0,7]=OC_C1S7*x[0,1]>>16
PKHBT r12,r12,r7, LSL #16 @ r12= <t[1,0]+8|t[0,0]+8>
SMULWT r4, r4, r2 @ r4 = t[0,4]=OC_C7S1*x[0,1]>>16
@ Here we cheat: row 1 had just a DC, so x[0,1]==x[1,1] by definition.
PKHBT r7, r5, r5, LSL #16 @ r7 = <t[0,7]|t[0,7]>
@ Stage 2:
SMULWB r6, r3, r7 @ r6 = t[0,6]=OC_C4S4*t[0,7]>>16
PKHBT r4, r4, r4, LSL #16 @ r4 = <t[0,4]|t[0,4]>
SMULWT r2, r3, r7 @ r2 = t[1,6]=OC_C4S4*t[1,7]>>16
SMULWB r5, r3, r4 @ r5 = t[0,5]=OC_C4S4*t[0,4]>>16
PKHBT r6, r6, r2, LSL #16 @ r6 = <t[1,6]|t[0,6]>
SMULWT r2, r3, r4 @ r2 = t[1,5]=OC_C4S4*t[1,4]>>16
PKHBT r2, r5, r2, LSL #16 @ r2 = <t[1,5]|t[0,5]>
@ Stage 3:
SSUB16 r5, r6, r2 @ r5 = <t[1,6]-t[1,5]|t[0,6]-t[0,5]>
SADD16 r6, r6, r2 @ r6 = <t[1,6]+t[1,5]|t[0,6]+t[0,5]>
@ Stage 4:
SADD16 r2, r12,r7 @ r2 = t[0]+t[7]+8
MOV r3, r2, ASR #4
MOV r2, r2, LSL #16
PKHTB r3, r3, r2, ASR #20 @ r3 = t[0]+t[7]+8>>4
STR r3, [r0], #4 @ y[0<<3] = t[0]+t[7]+8>>4
SADD16 r2, r12,r6 @ r2 = t[0]+t[6]+8
MOV r3, r2, ASR #4
MOV r2, r2, LSL #16
PKHTB r3, r3, r2, ASR #20 @ r3 = t[0]+t[6]+8>>4
STR r3, [r0, #12] @ y[1<<3] = t[0]+t[6]+8>>4
SADD16 r2, r12,r5 @ r2 = t[0]+t[5]+8
MOV r3, r2, ASR #4
MOV r2, r2, LSL #16
PKHTB r3, r3, r2, ASR #20 @ r3 = t[0]+t[5]+8>>4
STR r3, [r0, #28] @ y[2<<3] = t[0]+t[5]+8>>4
SADD16 r2, r12,r4 @ r2 = t[0]+t[4]+8
MOV r3, r2, ASR #4
MOV r2, r2, LSL #16
PKHTB r3, r3, r2, ASR #20 @ r3 = t[0]+t[4]+8>>4
STR r3, [r0, #44] @ y[3<<3] = t[0]+t[4]+8>>4
SSUB16 r4, r12,r4 @ r4 = t[0]-t[4]+8
MOV r3, r4, ASR #4
MOV r4, r4, LSL #16
PKHTB r3, r3, r4, ASR #20 @ r3 = t[0]-t[4]+8>>4
STR r3, [r0, #60] @ y[4<<3] = t[0]-t[4]+8>>4
SSUB16 r5, r12,r5 @ r5 = t[0]-t[5]+8
MOV r3, r5, ASR #4
MOV r5, r5, LSL #16
PKHTB r3, r3, r5, ASR #20 @ r3 = t[0]-t[5]+8>>4
STR r3, [r0, #76] @ y[5<<3] = t[0]-t[5]+8>>4
SSUB16 r6, r12,r6 @ r6 = t[0]-t[6]+8
MOV r3, r6, ASR #4
MOV r6, r6, LSL #16
PKHTB r3, r3, r6, ASR #20 @ r3 = t[0]-t[6]+8>>4
STR r3, [r0, #92] @ y[6<<3] = t[0]-t[6]+8>>4
SSUB16 r7, r12,r7 @ r7 = t[0]-t[7]+8
MOV r3, r7, ASR #4
MOV r7, r7, LSL #16
PKHTB r3, r3, r7, ASR #20 @ r3 = t[0]-t[7]+8>>4
STR r3, [r0, #108] @ y[7<<3] = t[0]-t[7]+8>>4
MOV PC,r14
.size idct2_2core_down_v6, .-idct2_2core_down_v6 @ ENDP
@ In theory this should save ~75 cycles over oc_idct8x8_10, more than enough to
@ pay for increased branch mis-prediction to get here, but in practice it
@ doesn't seem to slow anything down to take it out, and it's less code this
@ way.
.if 0
.type oc_idct8x8_6_v6, %function; oc_idct8x8_6_v6: @ PROC
STMFD r13!,{r4-r8,r10,r11,r14}
SUB r13,r13,#64*2+4
@ Row transforms
MOV r8, r0
AND r0, r13,#4 @ Align the stack.
ADD r0, r0, r13 @ Write to temp storage.
BL idct3_2core_v6
BL idct1core_v6
@ Clear input data for next block.
MOV r4, #0
MOV r5, #0
STRD r4, [r1,#-3*16]!
STR r4, [r1,#16]
STR r4, [r1,#32]
AND r1, r13,#4 @ Align the stack.
MOV r0, r8 @ Write to the final destination.
ADD r1, r1, r13 @ And read from temp storage.
@ Column transforms
BL idct3_3core_down_v6
BL idct3_3core_down_v6
BL idct3_3core_down_v6
BL idct3_3core_down_v6
ADD r13,r13,#64*2+4
LDMFD r13!,{r4-r8,r10,r11,PC}
.size oc_idct8x8_6_v6, .-oc_idct8x8_6_v6 @ ENDP
.type idct1core_v6, %function; idct1core_v6: @ PROC
@ r0 = ogg_int16_t *_y (destination)
@ r1 = const ogg_int16_t *_x (source)
LDRSH r3, [r1], #16
MOV r12,#0x05
ORR r12,r12,#0xB500
MUL r3, r12, r3
@ Stall ?
MOV r3, r3, ASR #16
@ Don't need to actually store the odd lines; they won't be read.
STRH r3, [r0], #2
STRH r3, [r0, #30]
STRH r3, [r0, #62]
STRH r3, [r0, #94]
MOV PC,R14
.size idct1core_v6, .-idct1core_v6 @ ENDP
.type idct3_2core_v6, %function; idct3_2core_v6: @ PROC
@ r0 = ogg_int16_t *_y (destination)
@ r1 = const ogg_int16_t *_x (source)
@ Stage 1:
LDRD r4, [r1], #16 @ r4 = <x[0,1]|x[0,0]>; r5 = <*|x[0,2]>
LDRD r10,OC_C6S2_3_v6 @ r10= OC_C6S2; r11= OC_C2S6
@ Stall
SMULWB r3, r11,r5 @ r3 = t[0,3]=OC_C2S6*x[0,2]>>16
LDR r11,OC_C4S4
SMULWB r2, r10,r5 @ r2 = t[0,2]=OC_C6S2*x[0,2]>>16
LDR r5, [r1], #16 @ r5 = <x[1,1]|x[1,0]>
SMULWB r12,r11,r4 @ r12= (t[0,0]=OC_C4S4*x[0,0]>>16)
LDRD r6, OC_C7S1_3_v6 @ r6 = OC_C7S1; r7 = OC_C1S7
SMULWB r10,r11,r5 @ r10= (t[1,0]=OC_C4S4*x[1,0]>>16)
PKHBT r12,r12,r10,LSL #16 @ r12= <t[1,0]|t[0,0]>
SMULWT r10,r7, r5 @ r10= t[1,7]=OC_C1S7*x[1,1]>>16
PKHBT r2, r2, r11 @ r2 = <0|t[0,2]>
SMULWT r7, r7, r4 @ r7 = t[0,7]=OC_C1S7*x[0,1]>>16
PKHBT r3, r3, r11 @ r3 = <0|t[0,3]>
SMULWT r5, r6, r5 @ r10= t[1,4]=OC_C7S1*x[1,1]>>16
PKHBT r7, r7, r10,LSL #16 @ r7 = <t[1,7]|t[0,7]>
SMULWT r4, r6, r4 @ r4 = t[0,4]=OC_C7S1*x[0,1]>>16
@ Stage 2:
SMULWB r6, r11,r7 @ r6 = t[0,6]=OC_C4S4*t[0,7]>>16
PKHBT r4, r4, r5, LSL #16 @ r4 = <t[1,4]|t[0,4]>
SMULWT r10,r11,r7 @ r10= t[1,6]=OC_C4S4*t[1,7]>>16
SMULWB r5, r11,r4 @ r5 = t[0,5]=OC_C4S4*t[0,4]>>16
PKHBT r6, r6, r10,LSL #16 @ r6 = <t[1,6]|t[0,6]>
SMULWT r10,r11,r4 @ r10= t[1,5]=OC_C4S4*t[1,4]>>16
@ Stage 3:
B idct4_3core_stage3_v6
.size idct3_2core_v6, .-idct3_2core_v6 @ ENDP
@ Another copy so the LDRD offsets are less than +/- 255.
.balign 8
OC_C7S1_3_v6:
.word 12785 @ 31F1
OC_C1S7_3_v6:
.word 64277 @ FB15
OC_C6S2_3_v6:
.word 25080 @ 61F8
OC_C2S6_3_v6:
.word 60547 @ EC83
.type idct3_3core_down_v6, %function; idct3_3core_down_v6: @ PROC
@ r0 = ogg_int16_t *_y (destination)
@ r1 = const ogg_int16_t *_x (source)
@ Stage 1:
LDRD r10,[r1], #16 @ r10= <x[0,1]|x[0,0]>; r11= <??|x[0,2]>
LDRD r6, OC_C6S2_3_v6 @ r6 = OC_C6S2; r7 = OC_C2S6
LDR r4, [r1], #16 @ r4 = <x[1,1]|x[1,0]>
SMULWB r3, r7, r11 @ r3 = t[0,3]=OC_C2S6*x[0,2]>>16
MOV r7,#8
SMULWB r2, r6, r11 @ r2 = t[0,2]=OC_C6S2*x[0,2]>>16
LDR r11,OC_C4S4
SMLAWB r12,r11,r10,r7 @ r12= t[0,0]+8=(OC_C4S4*x[0,0]>>16)+8
@ Here we cheat: row 2 had just a DC, so x[0,2]==x[1,2] by definition.
PKHBT r3, r3, r3, LSL #16 @ r3 = <t[0,3]|t[0,3]>
SMLAWB r5, r11,r4, r7 @ r5 = t[1,0]+8=(OC_C4S4*x[1,0]>>16)+8
PKHBT r2, r2, r2, LSL #16 @ r2 = <t[0,2]|t[0,2]>
LDRD r6, OC_C7S1_3_v6 @ r6 = OC_C7S1; r7 = OC_C1S7
PKHBT r12,r12,r5, LSL #16 @ r12= <t[1,0]+8|t[0,0]+8>
SMULWT r5, r7, r4 @ r5 = t[1,7]=OC_C1S7*x[1,1]>>16
SMULWT r7, r7, r10 @ r7 = t[0,7]=OC_C1S7*x[0,1]>>16
SMULWT r10,r6, r10 @ r10= t[0,4]=OC_C7S1*x[0,1]>>16
PKHBT r7, r7, r5, LSL #16 @ r7 = <t[1,7]|t[0,7]>
SMULWT r4, r6, r4 @ r4 = t[1,4]=OC_C7S1*x[1,1]>>16
@ Stage 2:
SMULWB r6, r11,r7 @ r6 = t[0,6]=OC_C4S4*t[0,7]>>16
PKHBT r4, r10,r4, LSL #16 @ r4 = <t[1,4]|t[0,4]>
SMULWT r10,r11,r7 @ r10= t[1,6]=OC_C4S4*t[1,7]>>16
SMULWB r5, r11,r4 @ r5 = t[0,5]=OC_C4S4*t[0,4]>>16
PKHBT r6, r6, r10,LSL #16 @ r6 = <t[1,6]|t[0,6]>
SMULWT r10,r11,r4 @ r10= t[1,5]=OC_C4S4*t[1,4]>>16
@ Stage 3:
B idct4_4core_down_stage3_v6
.size idct3_3core_down_v6, .-idct3_3core_down_v6 @ ENDP
.endif
.type idct4_3core_v6, %function; idct4_3core_v6: @ PROC
@ r0 = ogg_int16_t *_y (destination)
@ r1 = const ogg_int16_t *_x (source)
@ Stage 1:
LDRD r10,[r1], #16 @ r10= <x[0,1]|x[0,0]>; r11= <x[0,3]|x[0,2]>
LDRD r2, OC_C5S3_4_v6 @ r2 = OC_C5S3; r3 = OC_C3S5
LDRD r4, [r1], #16 @ r4 = <x[1,1]|x[1,0]>; r5 = <??|x[1,2]>
SMULWT r9, r3, r11 @ r9 = t[0,6]=OC_C3S5*x[0,3]>>16
SMULWT r8, r2, r11 @ r8 = -t[0,5]=OC_C5S3*x[0,3]>>16
PKHBT r9, r9, r2 @ r9 = <0|t[0,6]>
LDRD r6, OC_C6S2_4_v6 @ r6 = OC_C6S2; r7 = OC_C2S6
PKHBT r8, r8, r2 @ r9 = <0|-t[0,5]>
SMULWB r3, r7, r11 @ r3 = t[0,3]=OC_C2S6*x[0,2]>>16
SMULWB r2, r6, r11 @ r2 = t[0,2]=OC_C6S2*x[0,2]>>16
LDR r11,OC_C4S4
SMULWB r12,r7, r5 @ r12= t[1,3]=OC_C2S6*x[1,2]>>16
SMULWB r5, r6, r5 @ r5 = t[1,2]=OC_C6S2*x[1,2]>>16
PKHBT r3, r3, r12,LSL #16 @ r3 = <t[1,3]|t[0,3]>
SMULWB r12,r11,r10 @ r12= t[0,0]=OC_C4S4*x[0,0]>>16
PKHBT r2, r2, r5, LSL #16 @ r2 = <t[1,2]|t[0,2]>
SMULWB r5, r11,r4 @ r5 = t[1,0]=OC_C4S4*x[1,0]>>16
LDRD r6, OC_C7S1_4_v6 @ r6 = OC_C7S1; r7 = OC_C1S7
PKHBT r12,r12,r5, LSL #16 @ r12= <t[1,0]|t[0,0]>
SMULWT r5, r7, r4 @ r5 = t[1,7]=OC_C1S7*x[1,1]>>16
SMULWT r7, r7, r10 @ r7 = t[0,7]=OC_C1S7*x[0,1]>>16
SMULWT r10,r6, r10 @ r10= t[0,4]=OC_C7S1*x[0,1]>>16
PKHBT r7, r7, r5, LSL #16 @ r7 = <t[1,7]|t[0,7]>
SMULWT r4, r6, r4 @ r4 = t[1,4]=OC_C7S1*x[1,1]>>16
@ Stage 2:
SSUB16 r6, r7, r9 @ r6 = t[7]-t[6]
PKHBT r4, r10,r4, LSL #16 @ r4 = <t[1,4]|t[0,4]>
SADD16 r7, r7, r9 @ r7 = t[7]=t[7]+t[6]
SMULWT r9, r11,r6 @ r9 = t[1,6]=OC_C4S4*r6T>>16
SADD16 r5, r4, r8 @ r5 = t[4]-t[5]
SMULWB r6, r11,r6 @ r6 = t[0,6]=OC_C4S4*r6B>>16
SSUB16 r4, r4, r8 @ r4 = t[4]=t[4]+t[5]
SMULWT r10,r11,r5 @ r10= t[1,5]=OC_C4S4*r5T>>16
PKHBT r6, r6, r9, LSL #16 @ r6 = <t[1,6]|t[0,6]>
SMULWB r5, r11,r5 @ r5 = t[0,5]=OC_C4S4*r5B>>16
@ Stage 3:
idct4_3core_stage3_v6:
SADD16 r11,r12,r2 @ r11= t[1]=t[0]+t[2]
PKHBT r10,r5, r10,LSL #16 @ r10= <t[1,5]|t[0,5]>
SSUB16 r2, r12,r2 @ r2 = t[2]=t[0]-t[2]
idct4_3core_stage3_5_v6:
SSUB16 r5, r6, r10 @ r5 = t[5]=t[6]-t[5]
SADD16 r6, r6, r10 @ r6 = t[6]=t[6]+t[5]
SADD16 r10,r12,r3 @ r10= t[0]=t[0]+t[3]
SSUB16 r3, r12,r3 @ r3 = t[3]=t[0]-t[3]
@ Stage 4:
SADD16 r12,r10,r7 @ r12= t[0]+t[7]
STR r12,[r0], #4 @ y[0<<3] = t[0]+t[7]
SADD16 r12,r11,r6 @ r12= t[1]+t[6]
STR r12,[r0, #12] @ y[1<<3] = t[1]+t[6]
SADD16 r12,r2, r5 @ r12= t[2]+t[5]
STR r12,[r0, #28] @ y[2<<3] = t[2]+t[5]
SADD16 r12,r3, r4 @ r12= t[3]+t[4]
STR r12,[r0, #44] @ y[3<<3] = t[3]+t[4]
SSUB16 r4, r3, r4 @ r4 = t[3]-t[4]
STR r4, [r0, #60] @ y[4<<3] = t[3]-t[4]
SSUB16 r5, r2, r5 @ r5 = t[2]-t[5]
STR r5, [r0, #76] @ y[5<<3] = t[2]-t[5]
SSUB16 r6, r11,r6 @ r6 = t[1]-t[6]
STR r6, [r0, #92] @ y[6<<3] = t[1]-t[6]
SSUB16 r7, r10,r7 @ r7 = t[0]-t[7]
STR r7, [r0, #108] @ y[7<<3] = t[0]-t[7]
MOV PC,r14
.size idct4_3core_v6, .-idct4_3core_v6 @ ENDP
@ Another copy so the LDRD offsets are less than +/- 255.
.balign 8
OC_C7S1_4_v6:
.word 12785 @ 31F1
OC_C1S7_4_v6:
.word 64277 @ FB15
OC_C6S2_4_v6:
.word 25080 @ 61F8
OC_C2S6_4_v6:
.word 60547 @ EC83
OC_C5S3_4_v6:
.word 36410 @ 8E3A
OC_C3S5_4_v6:
.word 54491 @ D4DB
.type idct4_4core_down_v6, %function; idct4_4core_down_v6: @ PROC
@ r0 = ogg_int16_t *_y (destination)
@ r1 = const ogg_int16_t *_x (source)
@ Stage 1:
LDRD r10,[r1], #16 @ r10= <x[0,1]|x[0,0]>; r11= <x[0,3]|x[0,2]>
LDRD r2, OC_C5S3_4_v6 @ r2 = OC_C5S3; r3 = OC_C3S5
LDRD r4, [r1], #16 @ r4 = <x[1,1]|x[1,0]>; r5 = <x[1,3]|x[1,2]>
SMULWT r9, r3, r11 @ r9 = t[0,6]=OC_C3S5*x[0,3]>>16
LDRD r6, OC_C6S2_4_v6 @ r6 = OC_C6S2; r7 = OC_C2S6
SMULWT r8, r2, r11 @ r8 = -t[0,5]=OC_C5S3*x[0,3]>>16
@ Here we cheat: row 3 had just a DC, so x[0,3]==x[1,3] by definition.
PKHBT r9, r9, r9, LSL #16 @ r9 = <t[0,6]|t[0,6]>
SMULWB r3, r7, r11 @ r3 = t[0,3]=OC_C2S6*x[0,2]>>16
PKHBT r8, r8, r8, LSL #16 @ r8 = <-t[0,5]|-t[0,5]>
SMULWB r2, r6, r11 @ r2 = t[0,2]=OC_C6S2*x[0,2]>>16
LDR r11,OC_C4S4
SMULWB r12,r7, r5 @ r12= t[1,3]=OC_C2S6*x[1,2]>>16
MOV r7,#8
SMULWB r5, r6, r5 @ r5 = t[1,2]=OC_C6S2*x[1,2]>>16
PKHBT r3, r3, r12,LSL #16 @ r3 = <t[1,3]|t[0,3]>
SMLAWB r12,r11,r10,r7 @ r12= t[0,0]+8=(OC_C4S4*x[0,0]>>16)+8
PKHBT r2, r2, r5, LSL #16 @ r2 = <t[1,2]|t[0,2]>
SMLAWB r5, r11,r4 ,r7 @ r5 = t[1,0]+8=(OC_C4S4*x[1,0]>>16)+8
LDRD r6, OC_C7S1_4_v6 @ r6 = OC_C7S1; r7 = OC_C1S7
PKHBT r12,r12,r5, LSL #16 @ r12= <t[1,0]+8|t[0,0]+8>
SMULWT r5, r7, r4 @ r5 = t[1,7]=OC_C1S7*x[1,1]>>16
SMULWT r7, r7, r10 @ r7 = t[0,7]=OC_C1S7*x[0,1]>>16
SMULWT r10,r6, r10 @ r10= t[0,4]=OC_C7S1*x[0,1]>>16
PKHBT r7, r7, r5, LSL #16 @ r7 = <t[1,7]|t[0,7]>
SMULWT r4, r6, r4 @ r4 = t[1,4]=OC_C7S1*x[1,1]>>16
@ Stage 2:
SSUB16 r6, r7, r9 @ r6 = t[7]-t[6]
PKHBT r4, r10,r4, LSL #16 @ r4 = <t[1,4]|t[0,4]>
SADD16 r7, r7, r9 @ r7 = t[7]=t[7]+t[6]
SMULWT r9, r11,r6 @ r9 = t[1,6]=OC_C4S4*r6T>>16
SADD16 r5, r4, r8 @ r5 = t[4]-t[5]
SMULWB r6, r11,r6 @ r6 = t[0,6]=OC_C4S4*r6B>>16
SSUB16 r4, r4, r8 @ r4 = t[4]=t[4]+t[5]
SMULWT r10,r11,r5 @ r10= t[1,5]=OC_C4S4*r5T>>16
PKHBT r6, r6, r9, LSL #16 @ r6 = <t[1,6]|t[0,6]>
SMULWB r5, r11,r5 @ r5 = t[0,5]=OC_C4S4*r5B>>16
@ Stage 3:
idct4_4core_down_stage3_v6:
SADD16 r11,r12,r2 @ r11= t[1]+8=t[0]+t[2]+8
PKHBT r10,r5, r10,LSL #16 @ r10= <t[1,5]|t[0,5]>
SSUB16 r2, r12,r2 @ r2 = t[2]+8=t[0]-t[2]+8
B idct8_8core_down_stage3_5_v6
.size idct4_4core_down_v6, .-idct4_4core_down_v6 @ ENDP
.type idct8_8core_v6, %function; idct8_8core_v6: @ PROC
STMFD r13!,{r0,r14}
@ Stage 1:
@5-6 rotation by 3pi/16
LDRD r10,OC_C5S3_4_v6 @ r10= OC_C5S3, r11= OC_C3S5
LDR r4, [r1,#8] @ r4 = <x[0,5]|x[0,4]>
LDR r7, [r1,#24] @ r7 = <x[1,5]|x[1,4]>
SMULWT r5, r11,r4 @ r5 = OC_C3S5*x[0,5]>>16
LDR r0, [r1,#4] @ r0 = <x[0,3]|x[0,2]>
SMULWT r3, r11,r7 @ r3 = OC_C3S5*x[1,5]>>16
LDR r12,[r1,#20] @ r12= <x[1,3]|x[1,2]>
SMULWT r6, r11,r0 @ r6 = OC_C3S5*x[0,3]>>16
SMULWT r11,r11,r12 @ r11= OC_C3S5*x[1,3]>>16
SMLAWT r6, r10,r4, r6 @ r6 = t[0,6]=r6+(OC_C5S3*x[0,5]>>16)
PKHBT r5, r5, r3, LSL #16 @ r5 = <r3|r5>
SMLAWT r11,r10,r7, r11 @ r11= t[1,6]=r11+(OC_C5S3*x[1,5]>>16)
PKHBT r4, r4, r7, LSL #16 @ r4 = <x[1,4]|x[0,4]>
SMULWT r3, r10,r0 @ r3 = OC_C5S3*x[0,3]>>16
PKHBT r6, r6, r11,LSL #16 @ r6 = <t[1,6]|t[0,6]>
SMULWT r8, r10,r12 @ r8 = OC_C5S3*x[1,3]>>16
@2-3 rotation by 6pi/16
LDRD r10,OC_C6S2_4_v6 @ r10= OC_C6S2, r11= OC_C2S6
PKHBT r3, r3, r8, LSL #16 @ r3 = <r8|r3>
LDR r8, [r1,#12] @ r8 = <x[0,7]|x[0,6]>
SMULWB r2, r10,r0 @ r2 = OC_C6S2*x[0,2]>>16
SSUB16 r5, r5, r3 @ r5 = <t[1,5]|t[0,5]>
SMULWB r9, r10,r12 @ r9 = OC_C6S2*x[1,2]>>16
LDR r7, [r1,#28] @ r7 = <x[1,7]|x[1,6]>
SMULWB r3, r10,r8 @ r3 = OC_C6S2*x[0,6]>>16
SMULWB r10,r10,r7 @ r10= OC_C6S2*x[1,6]>>16
PKHBT r2, r2, r9, LSL #16 @ r2 = <r2|r9>
SMLAWB r3, r11,r0, r3 @ r3 = t[0,3]=r3+(OC_C2S6*x[0,2]>>16)
SMLAWB r10,r11,r12,r10 @ r10= t[1,3]=r10+(OC_C2S6*x[1,2]>>16)
SMULWB r9, r11,r8 @ r9 = OC_C2S6*x[0,6]>>16
PKHBT r3, r3, r10,LSL #16 @ r3 = <t[1,6]|t[0,6]>
SMULWB r12,r11,r7 @ r12= OC_C2S6*x[1,6]>>16
@4-7 rotation by 7pi/16
LDRD r10,OC_C7S1_8_v6 @ r10= OC_C7S1, r11= OC_C1S7
PKHBT r9, r9, r12,LSL #16 @ r9 = <r9|r12>
LDR r0, [r1],#16 @ r0 = <x[0,1]|x[0,0]>
PKHTB r7, r7, r8, ASR #16 @ r7 = <x[1,7]|x[0,7]>
SSUB16 r2, r2, r9 @ r2 = <t[1,2]|t[0,2]>
SMULWB r9, r10,r7 @ r9 = OC_C7S1*x[0,7]>>16
LDR r14,[r1],#16 @ r14= <x[1,1]|x[1,0]>
SMULWT r12,r10,r7 @ r12= OC_C7S1*x[1,7]>>16
SMULWT r8, r10,r0 @ r8 = OC_C7S1*x[0,1]>>16
SMULWT r10,r10,r14 @ r10= OC_C7S1*x[1,1]>>16
SMLAWT r9, r11,r0, r9 @ r9 = t[0,7]=r9+(OC_C1S7*x[0,1]>>16)
PKHBT r8, r8, r10,LSL #16 @ r8 = <r12|r8>
SMLAWT r12,r11,r14,r12 @ r12= t[1,7]=r12+(OC_C1S7*x[1,1]>>16)
PKHBT r0, r0, r14,LSL #16 @ r0 = <x[1,0]|x[0,0]>
SMULWB r10,r11,r7 @ r10= OC_C1S7*x[0,6]>>16
PKHBT r9, r9, r12,LSL #16 @ r9 = <t[1,7]|t[0,7]>
SMULWT r12,r11,r7 @ r12= OC_C1S7*x[1,6]>>16
@0-1 butterfly
LDR r11,OC_C4S4
PKHBT r10,r10,r12,LSL #16 @ r10= <r12|r10>
SADD16 r7, r0, r4 @ r7 = x[0]+x[4]
SSUB16 r10,r8, r10 @ r10= <t[1,4]|t[0,4]>
SSUB16 r4, r0, r4 @ r4 = x[0]-x[4]
SMULWB r8, r11,r7 @ r8 = t[0,0]=OC_C4S4*r7B>>16
SMULWT r12,r11,r7 @ r12= t[1,0]=OC_C4S4*r7T>>16
SMULWB r7, r11,r4 @ r7 = t[0,1]=OC_C4S4*r4B>>16
PKHBT r12,r8, r12,LSL #16 @ r12= <t[1,0]|t[0,0]>
SMULWT r8, r11,r4 @ r8 = t[1,1]=OC_C4S4*r4T>>16
@ Stage 2:
SADD16 r4, r10,r5 @ r4 = t[4]=t[4]+t[5]
PKHBT r8, r7, r8, LSL #16 @ r8 = <t[1,0]|t[0,0]>
SSUB16 r5, r10,r5 @ r5 = t[4]-t[5]
SMULWB r10,r11,r5 @ r10= t[0,5]=OC_C4S4*r5B>>16
SADD16 r7, r9, r6 @ r7 = t[7]=t[7]+t[6]
SMULWT r5, r11,r5 @ r5 = t[1,5]=OC_C4S4*r5T>>16
SSUB16 r6, r9, r6 @ r6 = t[7]-t[6]
SMULWB r9, r11,r6 @ r9 = t[0,6]=OC_C4S4*r6B>>16
PKHBT r10,r10,r5, LSL #16 @ r10= <t[1,5]|t[0,5]>
SMULWT r6, r11,r6 @ r6 = t[1,6]=OC_C4S4*r6T>>16
@ Stage 3:
SADD16 r11,r8, r2 @ r11= t[1]=t[1]+t[2]
PKHBT r6, r9, r6, LSL #16 @ r6 = <t[1,6]|t[0,6]>
SSUB16 r2, r8, r2 @ r2 = t[2]=t[1]-t[2]
LDMFD r13!,{r0,r14}
B idct4_3core_stage3_5_v6
.size idct8_8core_v6, .-idct8_8core_v6 @ ENDP
@ Another copy so the LDRD offsets are less than +/- 255.
.balign 8
OC_C7S1_8_v6:
.word 12785 @ 31F1
OC_C1S7_8_v6:
.word 64277 @ FB15
OC_C6S2_8_v6:
.word 25080 @ 61F8
OC_C2S6_8_v6:
.word 60547 @ EC83
OC_C5S3_8_v6:
.word 36410 @ 8E3A
OC_C3S5_8_v6:
.word 54491 @ D4DB
.type idct8_8core_down_v6, %function; idct8_8core_down_v6: @ PROC
STMFD r13!,{r0,r14}
@ Stage 1:
@5-6 rotation by 3pi/16
LDRD r10,OC_C5S3_8_v6 @ r10= OC_C5S3, r11= OC_C3S5
LDR r4, [r1,#8] @ r4 = <x[0,5]|x[0,4]>
LDR r7, [r1,#24] @ r7 = <x[1,5]|x[1,4]>
SMULWT r5, r11,r4 @ r5 = OC_C3S5*x[0,5]>>16
LDR r0, [r1,#4] @ r0 = <x[0,3]|x[0,2]>
SMULWT r3, r11,r7 @ r3 = OC_C3S5*x[1,5]>>16
LDR r12,[r1,#20] @ r12= <x[1,3]|x[1,2]>
SMULWT r6, r11,r0 @ r6 = OC_C3S5*x[0,3]>>16
SMULWT r11,r11,r12 @ r11= OC_C3S5*x[1,3]>>16
SMLAWT r6, r10,r4, r6 @ r6 = t[0,6]=r6+(OC_C5S3*x[0,5]>>16)
PKHBT r5, r5, r3, LSL #16 @ r5 = <r3|r5>
SMLAWT r11,r10,r7, r11 @ r11= t[1,6]=r11+(OC_C5S3*x[1,5]>>16)
PKHBT r4, r4, r7, LSL #16 @ r4 = <x[1,4]|x[0,4]>
SMULWT r3, r10,r0 @ r3 = OC_C5S3*x[0,3]>>16
PKHBT r6, r6, r11,LSL #16 @ r6 = <t[1,6]|t[0,6]>
SMULWT r8, r10,r12 @ r8 = OC_C5S3*x[1,3]>>16
@2-3 rotation by 6pi/16
LDRD r10,OC_C6S2_8_v6 @ r10= OC_C6S2, r11= OC_C2S6
PKHBT r3, r3, r8, LSL #16 @ r3 = <r8|r3>
LDR r8, [r1,#12] @ r8 = <x[0,7]|x[0,6]>
SMULWB r2, r10,r0 @ r2 = OC_C6S2*x[0,2]>>16
SSUB16 r5, r5, r3 @ r5 = <t[1,5]|t[0,5]>
SMULWB r9, r10,r12 @ r9 = OC_C6S2*x[1,2]>>16
LDR r7, [r1,#28] @ r7 = <x[1,7]|x[1,6]>
SMULWB r3, r10,r8 @ r3 = OC_C6S2*x[0,6]>>16
SMULWB r10,r10,r7 @ r10= OC_C6S2*x[1,6]>>16
PKHBT r2, r2, r9, LSL #16 @ r2 = <r2|r9>
SMLAWB r3, r11,r0, r3 @ r3 = t[0,3]=r3+(OC_C2S6*x[0,2]>>16)
SMLAWB r10,r11,r12,r10 @ r10= t[1,3]=r10+(OC_C2S6*x[1,2]>>16)
SMULWB r9, r11,r8 @ r9 = OC_C2S6*x[0,6]>>16
PKHBT r3, r3, r10,LSL #16 @ r3 = <t[1,6]|t[0,6]>
SMULWB r12,r11,r7 @ r12= OC_C2S6*x[1,6]>>16
@4-7 rotation by 7pi/16
LDRD r10,OC_C7S1_8_v6 @ r10= OC_C7S1, r11= OC_C1S7
PKHBT r9, r9, r12,LSL #16 @ r9 = <r9|r12>
LDR r0, [r1],#16 @ r0 = <x[0,1]|x[0,0]>
PKHTB r7, r7, r8, ASR #16 @ r7 = <x[1,7]|x[0,7]>
SSUB16 r2, r2, r9 @ r2 = <t[1,2]|t[0,2]>
SMULWB r9, r10,r7 @ r9 = OC_C7S1*x[0,7]>>16
LDR r14,[r1],#16 @ r14= <x[1,1]|x[1,0]>
SMULWT r12,r10,r7 @ r12= OC_C7S1*x[1,7]>>16
SMULWT r8, r10,r0 @ r8 = OC_C7S1*x[0,1]>>16
SMULWT r10,r10,r14 @ r10= OC_C7S1*x[1,1]>>16
SMLAWT r9, r11,r0, r9 @ r9 = t[0,7]=r9+(OC_C1S7*x[0,1]>>16)
PKHBT r8, r8, r10,LSL #16 @ r8 = <r12|r8>
SMLAWT r12,r11,r14,r12 @ r12= t[1,7]=r12+(OC_C1S7*x[1,1]>>16)
PKHBT r0, r0, r14,LSL #16 @ r0 = <x[1,0]|x[0,0]>
SMULWB r10,r11,r7 @ r10= OC_C1S7*x[0,6]>>16
PKHBT r9, r9, r12,LSL #16 @ r9 = <t[1,7]|t[0,7]>
SMULWT r12,r11,r7 @ r12= OC_C1S7*x[1,6]>>16
@0-1 butterfly
LDR r11,OC_C4S4
MOV r14,#8
PKHBT r10,r10,r12,LSL #16 @ r10= <r12|r10>
SADD16 r7, r0, r4 @ r7 = x[0]+x[4]
SSUB16 r10,r8, r10 @ r10= <t[1,4]|t[0,4]>
SMLAWB r8, r11,r7, r14 @ r8 = t[0,0]+8=(OC_C4S4*r7B>>16)+8
SSUB16 r4, r0, r4 @ r4 = x[0]-x[4]
SMLAWT r12,r11,r7, r14 @ r12= t[1,0]+8=(OC_C4S4*r7T>>16)+8
SMLAWB r7, r11,r4, r14 @ r7 = t[0,1]+8=(OC_C4S4*r4B>>16)+8
PKHBT r12,r8, r12,LSL #16 @ r12= <t[1,0]+8|t[0,0]+8>
SMLAWT r8, r11,r4, r14 @ r8 = t[1,1]+8=(OC_C4S4*r4T>>16)+8
@ Stage 2:
SADD16 r4, r10,r5 @ r4 = t[4]=t[4]+t[5]
PKHBT r8, r7, r8, LSL #16 @ r8 = <t[1,0]+8|t[0,0]+8>
SSUB16 r5, r10,r5 @ r5 = t[4]-t[5]
SMULWB r10,r11,r5 @ r10= t[0,5]=OC_C4S4*r5B>>16
SADD16 r7, r9, r6 @ r7 = t[7]=t[7]+t[6]
SMULWT r5, r11,r5 @ r5 = t[1,5]=OC_C4S4*r5T>>16
SSUB16 r6, r9, r6 @ r6 = t[7]-t[6]
SMULWB r9, r11,r6 @ r9 = t[0,6]=OC_C4S4*r6B>>16
PKHBT r10,r10,r5, LSL #16 @ r10= <t[1,5]|t[0,5]>
SMULWT r6, r11,r6 @ r6 = t[1,6]=OC_C4S4*r6T>>16
@ Stage 3:
SADD16 r11,r8, r2 @ r11= t[1]+8=t[1]+t[2]+8
PKHBT r6, r9, r6, LSL #16 @ r6 = <t[1,6]|t[0,6]>
SSUB16 r2, r8, r2 @ r2 = t[2]+8=t[1]-t[2]+8
LDMFD r13!,{r0,r14}
idct8_8core_down_stage3_5_v6:
SSUB16 r5, r6, r10 @ r5 = t[5]=t[6]-t[5]
SADD16 r6, r6, r10 @ r6 = t[6]=t[6]+t[5]
SADD16 r10,r12,r3 @ r10= t[0]+8=t[0]+t[3]+8
SSUB16 r3, r12,r3 @ r3 = t[3]+8=t[0]-t[3]+8
@ Stage 4:
SADD16 r12,r10,r7 @ r12= t[0]+t[7]+8
SSUB16 r7, r10,r7 @ r7 = t[0]-t[7]+8
MOV r10,r12,ASR #4
MOV r12,r12,LSL #16
PKHTB r10,r10,r12,ASR #20 @ r10= t[0]+t[7]+8>>4
STR r10,[r0], #4 @ y[0<<3] = t[0]+t[7]+8>>4
SADD16 r12,r11,r6 @ r12= t[1]+t[6]+8
SSUB16 r6, r11,r6 @ r6 = t[1]-t[6]+8
MOV r10,r12,ASR #4
MOV r12,r12,LSL #16
PKHTB r10,r10,r12,ASR #20 @ r10= t[1]+t[6]+8>>4
STR r10,[r0, #12] @ y[1<<3] = t[1]+t[6]+8>>4
SADD16 r12,r2, r5 @ r12= t[2]+t[5]+8
SSUB16 r5, r2, r5 @ r5 = t[2]-t[5]+8
MOV r10,r12,ASR #4
MOV r12,r12,LSL #16
PKHTB r10,r10,r12,ASR #20 @ r10= t[2]+t[5]+8>>4
STR r10,[r0, #28] @ y[2<<3] = t[2]+t[5]+8>>4
SADD16 r12,r3, r4 @ r12= t[3]+t[4]+8
SSUB16 r4, r3, r4 @ r4 = t[3]-t[4]+8
MOV r10,r12,ASR #4
MOV r12,r12,LSL #16
PKHTB r10,r10,r12,ASR #20 @ r10= t[3]+t[4]+8>>4
STR r10,[r0, #44] @ y[3<<3] = t[3]+t[4]+8>>4
MOV r10,r4, ASR #4
MOV r4, r4, LSL #16
PKHTB r10,r10,r4, ASR #20 @ r10= t[3]-t[4]+8>>4
STR r10,[r0, #60] @ y[4<<3] = t[3]-t[4]+8>>4
MOV r10,r5, ASR #4
MOV r5, r5, LSL #16
PKHTB r10,r10,r5, ASR #20 @ r10= t[2]-t[5]+8>>4
STR r10,[r0, #76] @ y[5<<3] = t[2]-t[5]+8>>4
MOV r10,r6, ASR #4
MOV r6, r6, LSL #16
PKHTB r10,r10,r6, ASR #20 @ r10= t[1]-t[6]+8>>4
STR r10,[r0, #92] @ y[6<<3] = t[1]-t[6]+8>>4
MOV r10,r7, ASR #4
MOV r7, r7, LSL #16
PKHTB r10,r10,r7, ASR #20 @ r10= t[0]-t[7]+8>>4
STR r10,[r0, #108] @ y[7<<3] = t[0]-t[7]+8>>4
MOV PC,r14
.size idct8_8core_down_v6, .-idct8_8core_down_v6 @ ENDP
.endif
.if OC_ARM_ASM_NEON
.global oc_idct8x8_1_neon
.global oc_idct8x8_neon
.balign 16
OC_IDCT_CONSTS_NEON:
.short 8
.short 64277 @ FB15 (C1S7)
.short 60547 @ EC83 (C2S6)
.short 54491 @ D4DB (C3S5)
.short 46341 @ B505 (C4S4)
.short 36410 @ 471D (C5S3)
.short 25080 @ 30FC (C6S2)
.short 12785 @ 31F1 (C7S1)
.type oc_idct8x8_1_neon, %function; oc_idct8x8_1_neon: @ PROC
@ r0 = ogg_int16_t *_y
@ r1 = ogg_uint16_t _dc
VDUP.S16 Q0, r1
VMOV Q1, Q0
VST1.64 {D0, D1, D2, D3}, [r0,:128]!
VST1.64 {D0, D1, D2, D3}, [r0,:128]!
VST1.64 {D0, D1, D2, D3}, [r0,:128]!
VST1.64 {D0, D1, D2, D3}, [r0,:128]
MOV PC, r14
.size oc_idct8x8_1_neon, .-oc_idct8x8_1_neon @ ENDP
.type oc_idct8x8_neon, %function; oc_idct8x8_neon: @ PROC
@ r0 = ogg_int16_t *_y
@ r1 = ogg_int16_t *_x
@ r2 = int _last_zzi
CMP r2, #10
BLE oc_idct8x8_10_neon
oc_idct8x8_slow_neon:
VPUSH {D8-D15}
MOV r2, r1
ADR r3, OC_IDCT_CONSTS_NEON
@ Row transforms (input is pre-transposed)
VLD1.64 {D16,D17,D18,D19}, [r2,:128]!
VLD1.64 {D20,D21,D22,D23}, [r2,:128]!
VLD1.64 {D24,D25,D26,D27}, [r2,:128]!
VSUB.S16 Q1, Q8, Q12 @ Q8 = x[0]-x[4]
VLD1.64 {D28,D29,D30,D31}, [r2,:128]
VADD.S16 Q8, Q8, Q12 @ Q1 = x[0]+x[4]
VLD1.64 {D0,D1}, [r3,:128]
MOV r12, r14
BL oc_idct8x8_stage123_neon
@ Stage 4
VSUB.S16 Q15,Q8, Q7 @ Q15 = y[7]=t[0]-t[7]
VADD.S16 Q8, Q8, Q7 @ Q8 = y[0]=t[0]+t[7]
VSUB.S16 Q14,Q9, Q3 @ Q14 = y[6]=t[1]-t[6]
VADD.S16 Q9, Q9, Q3 @ Q9 = y[1]=t[1]+t[6]
VSUB.S16 Q13,Q10,Q5 @ Q13 = y[5]=t[2]-t[5]
VADD.S16 Q10,Q10,Q5 @ Q10 = y[2]=t[2]+t[5]
VTRN.16 Q14,Q15
VSUB.S16 Q12,Q11,Q4 @ Q12 = y[4]=t[3]-t[4]
VADD.S16 Q11,Q11,Q4 @ Q11 = y[3]=t[3]+t[4]
@ 8x8 Transpose
VTRN.16 Q8, Q9
VTRN.16 Q10,Q11
VTRN.16 Q12,Q13
VTRN.32 Q8, Q10
VTRN.32 Q9, Q11
VTRN.32 Q12,Q14
VTRN.32 Q13,Q15
VSWP D17,D24
VSUB.S16 Q1, Q8, Q12 @ Q8 = x[0]-x[4]
VSWP D19,D26
VADD.S16 Q8, Q8, Q12 @ Q1 = x[0]+x[4]
VSWP D21,D28
VSWP D23,D30
@ Column transforms
BL oc_idct8x8_stage123_neon
@ We have to put the return address back in the LR, or the branch
@ predictor will not recognize the function return and mis-predict the
@ entire call stack.
MOV r14, r12
@ Stage 4
VSUB.S16 Q15,Q8, Q7 @ Q15 = y[7]=t[0]-t[7]
VADD.S16 Q8, Q8, Q7 @ Q8 = y[0]=t[0]+t[7]
VSUB.S16 Q14,Q9, Q3 @ Q14 = y[6]=t[1]-t[6]
VADD.S16 Q9, Q9, Q3 @ Q9 = y[1]=t[1]+t[6]
VSUB.S16 Q13,Q10,Q5 @ Q13 = y[5]=t[2]-t[5]
VADD.S16 Q10,Q10,Q5 @ Q10 = y[2]=t[2]+t[5]
VSUB.S16 Q12,Q11,Q4 @ Q12 = y[4]=t[3]-t[4]
VADD.S16 Q11,Q11,Q4 @ Q11 = y[3]=t[3]+t[4]
VMOV.I8 Q2,#0
VPOP {D8-D15}
VMOV.I8 Q3,#0
VRSHR.S16 Q8, Q8, #4 @ Q8 = y[0]+8>>4
VST1.64 {D4, D5, D6, D7}, [r1,:128]!
VRSHR.S16 Q9, Q9, #4 @ Q9 = y[1]+8>>4
VRSHR.S16 Q10,Q10,#4 @ Q10 = y[2]+8>>4
VST1.64 {D4, D5, D6, D7}, [r1,:128]!
VRSHR.S16 Q11,Q11,#4 @ Q11 = y[3]+8>>4
VRSHR.S16 Q12,Q12,#4 @ Q12 = y[4]+8>>4
VST1.64 {D4, D5, D6, D7}, [r1,:128]!
VRSHR.S16 Q13,Q13,#4 @ Q13 = y[5]+8>>4
VRSHR.S16 Q14,Q14,#4 @ Q14 = y[6]+8>>4
VST1.64 {D4, D5, D6, D7}, [r1,:128]
VRSHR.S16 Q15,Q15,#4 @ Q15 = y[7]+8>>4
VSTMIA r0, {D16-D31}
MOV PC, r14
.size oc_idct8x8_neon, .-oc_idct8x8_neon @ ENDP
.type oc_idct8x8_stage123_neon, %function; oc_idct8x8_stage123_neon: @ PROC
@ Stages 1 & 2
VMULL.S16 Q4, D18,D1[3]
VMULL.S16 Q5, D19,D1[3]
VMULL.S16 Q7, D30,D1[3]
VMULL.S16 Q6, D31,D1[3]
VMULL.S16 Q2, D30,D0[1]
VMULL.S16 Q3, D31,D0[1]
VSHRN.S32 D8, Q4, #16
VSHRN.S32 D9, Q5, #16 @ Q4 = (OC_C7S1*x[1]>>16)
VSHRN.S32 D14,Q7, #16
VSHRN.S32 D15,Q6, #16 @ Q7 = (OC_C7S1*x[7]>>16)
VSHRN.S32 D4, Q2, #16
VSHRN.S32 D5, Q3, #16 @ Q2 = (OC_C1S7*x[7]>>16)-x[7]
VSUB.S16 Q4, Q4, Q15
VADD.S16 Q7, Q7, Q9
VSUB.S16 Q4, Q4, Q2 @ Q4 = t[4]
VMULL.S16 Q2, D18,D0[1]
VMULL.S16 Q9, D19,D0[1]
VMULL.S16 Q5, D26,D0[3]
VMULL.S16 Q3, D27,D0[3]
VMULL.S16 Q6, D22,D0[3]
VMULL.S16 Q12,D23,D0[3]
VSHRN.S32 D4, Q2, #16
VSHRN.S32 D5, Q9, #16 @ Q2 = (OC_C1S7*x[1]>>16)-x[1]
VSHRN.S32 D10,Q5, #16
VSHRN.S32 D11,Q3, #16 @ Q5 = (OC_C3S5*x[5]>>16)-x[5]
VSHRN.S32 D12,Q6, #16
VSHRN.S32 D13,Q12,#16 @ Q6 = (OC_C3S5*x[3]>>16)-x[3]
VADD.S16 Q7, Q7, Q2 @ Q7 = t[7]
VSUB.S16 Q5, Q5, Q11
VADD.S16 Q6, Q6, Q11
VADD.S16 Q5, Q5, Q13
VADD.S16 Q6, Q6, Q13
VMULL.S16 Q9, D22,D1[1]
VMULL.S16 Q11,D23,D1[1]
VMULL.S16 Q15,D26,D1[1]
VMULL.S16 Q13,D27,D1[1]
VMULL.S16 Q2, D20,D1[2]
VMULL.S16 Q12,D21,D1[2]
VSHRN.S32 D18,Q9, #16
VSHRN.S32 D19,Q11,#16 @ Q9 = (OC_C5S3*x[3]>>16)-x[3]
VSHRN.S32 D30,Q15,#16
VSHRN.S32 D31,Q13,#16 @ Q15= (OC_C5S3*x[5]>>16)-x[5]
VSHRN.S32 D4, Q2, #16
VSHRN.S32 D5, Q12,#16 @ Q2 = (OC_C6S2*x[2]>>16)
VSUB.S16 Q5, Q5, Q9 @ Q5 = t[5]
VADD.S16 Q6, Q6, Q15 @ Q6 = t[6]
VSUB.S16 Q2, Q2, Q14
VMULL.S16 Q3, D28,D1[2]
VMULL.S16 Q11,D29,D1[2]
VMULL.S16 Q12,D28,D0[2]
VMULL.S16 Q9, D29,D0[2]
VMULL.S16 Q13,D20,D0[2]
VMULL.S16 Q15,D21,D0[2]
VSHRN.S32 D6, Q3, #16
VSHRN.S32 D7, Q11,#16 @ Q3 = (OC_C6S2*x[6]>>16)
VSHRN.S32 D24,Q12,#16
VSHRN.S32 D25,Q9, #16 @ Q12= (OC_C2S6*x[6]>>16)-x[6]
VSHRN.S32 D26,Q13,#16
VSHRN.S32 D27,Q15,#16 @ Q13= (OC_C2S6*x[2]>>16)-x[2]
VSUB.S16 Q9, Q4, Q5 @ Q9 = t[4]-t[5]
VSUB.S16 Q11,Q7, Q6 @ Q11= t[7]-t[6]
VADD.S16 Q3, Q3, Q10
VADD.S16 Q4, Q4, Q5 @ Q4 = t[4]=t[4]+t[5]
VADD.S16 Q7, Q7, Q6 @ Q7 = t[7]=t[7]+t[6]
VSUB.S16 Q2, Q2, Q12 @ Q2 = t[2]
VADD.S16 Q3, Q3, Q13 @ Q3 = t[3]
VMULL.S16 Q12,D16,D1[0]
VMULL.S16 Q13,D17,D1[0]
VMULL.S16 Q14,D2, D1[0]
VMULL.S16 Q15,D3, D1[0]
VMULL.S16 Q5, D18,D1[0]
VMULL.S16 Q6, D22,D1[0]
VSHRN.S32 D24,Q12,#16
VSHRN.S32 D25,Q13,#16
VSHRN.S32 D28,Q14,#16
VSHRN.S32 D29,Q15,#16
VMULL.S16 Q13,D19,D1[0]
VMULL.S16 Q15,D23,D1[0]
VADD.S16 Q8, Q8, Q12 @ Q8 = t[0]
VADD.S16 Q1, Q1, Q14 @ Q1 = t[1]
VSHRN.S32 D10,Q5, #16
VSHRN.S32 D12,Q6, #16
VSHRN.S32 D11,Q13,#16
VSHRN.S32 D13,Q15,#16
VADD.S16 Q5, Q5, Q9 @ Q5 = t[5]=OC_C4S4*(t[4]-t[5])>>16
VADD.S16 Q6, Q6, Q11 @ Q6 = t[6]=OC_C4S4*(t[7]-t[6])>>16
@ Stage 3
VSUB.S16 Q11,Q8, Q3 @ Q11 = t[3]=t[0]-t[3]
VADD.S16 Q8, Q8, Q3 @ Q8 = t[0]=t[0]+t[3]
VADD.S16 Q9, Q1, Q2 @ Q9 = t[1]=t[1]+t[2]
VADD.S16 Q3, Q6, Q5 @ Q3 = t[6]=t[6]+t[5]
VSUB.S16 Q10,Q1, Q2 @ Q10 = t[2]=t[1]-t[2]
VSUB.S16 Q5, Q6, Q5 @ Q5 = t[5]=t[6]-t[5]
MOV PC, r14
.size oc_idct8x8_stage123_neon, .-oc_idct8x8_stage123_neon @ ENDP
.type oc_idct8x8_10_neon, %function; oc_idct8x8_10_neon: @ PROC
ADR r3, OC_IDCT_CONSTS_NEON
VLD1.64 {D0,D1}, [r3,:128]
MOV r2, r1
@ Row transforms (input is pre-transposed)
@ Stage 1
VLD1.64 {D16,D17,D18,D19},[r2,:128]!
MOV r12, #16
VMULL.S16 Q15,D16,D1[0] @ Q15= OC_C4S4*x[0]-(x[0]<<16)
VLD1.64 {D17}, [r2,:64], r12
VMULL.S16 Q2, D18,D0[1] @ Q2 = OC_C1S7*x[1]-(x[1]<<16)
VLD1.64 {D19}, [r2,:64]
VMULL.S16 Q14,D17,D0[2] @ Q14= OC_C2S6*x[2]-(x[2]<<16)
VMULL.S16 Q3, D19,D0[3] @ Q3 = OC_C3S5*x[3]-(x[3]<<16)
VMULL.S16 Q13,D19,D1[1] @ Q13= OC_C5S3*x[3]-(x[3]<<16)
VMULL.S16 Q12,D18,D1[3] @ Q12= OC_C7S1*x[1]
VMULL.S16 Q1, D17,D1[2] @ Q1 = OC_C6S2*x[2]
VSHRN.S32 D30,Q15,#16 @ D30= t[0]-x[0]
VSHRN.S32 D4, Q2, #16 @ D4 = t[7]-x[1]
VSHRN.S32 D31,Q14,#16 @ D31= t[3]-x[2]
VSHRN.S32 D6, Q3, #16 @ D6 = t[6]-x[3]
VSHRN.S32 D7, Q13,#16 @ D7 = -t[5]-x[3]
VSHRN.S32 D5, Q12,#16 @ D5 = t[4]
VSHRN.S32 D2, Q1, #16 @ D2 = t[2]
VADD.S16 D4, D4, D18 @ D4 = t[7]
VADD.S16 D6, D6, D19 @ D6 = t[6]
VADD.S16 D7, D7, D19 @ D7 = -t[5]
VADD.S16 Q15,Q15,Q8 @ D30= t[0]
@ D31= t[3]
@ Stages 2 & 3
VSUB.S16 Q12,Q2, Q3 @ D24= t[7]-t[6]
@ D25= t[4]'=t[4]+t[5]
VADD.S16 Q13,Q2, Q3 @ D26= t[7]=t[7]+t[6]
@ D27= t[4]-t[5]
VMULL.S16 Q11,D24,D1[0] @ Q11= OC_C4S4*(t[7]-t[6])
@ -(t[7]-t[6]<<16)
VMULL.S16 Q14,D27,D1[0] @ Q14= OC_C4S4*(t[4]-t[5])
@ -(t[4]-t[5]<<16)
VADD.S16 D16,D30,D31 @ D16= t[0]=t[0]+t[3]
VSUB.S16 D17,D30,D2 @ D17= t[2]=t[0]-t[2]
VADD.S16 D18,D30,D2 @ D18= t[1]=t[0]+t[2]
VSHRN.S32 D22,Q11,#16 @ D22= (OC_C4S4*(t[7]-t[6])>>16)
@ -(t[7]-t[6])
VSHRN.S32 D23,Q14,#16 @ D23= (OC_C4S4*(t[4]-t[5])>>16)
@ -(t[4]-t[5])
VSUB.S16 D19,D30,D31 @ D19= t[3]=t[0]-t[3]
VADD.S16 D22,D22,D24 @ D22= t[6]=OC_C4S4*(t[7]-t[6])>>16
VADD.S16 D23,D23,D27 @ D23= t[5]=OC_C4S4*(t[4]-t[5])>>16
VSUB.S16 D27,D22,D23 @ D27= t[5]=t[6]-t[5]
VADD.S16 D24,D22,D23 @ D24= t[6]=t[6]+t[5]
@ Stage 4
VSUB.S16 Q11,Q8, Q13 @ D22= y[7]=t[0]-t[7]
@ D23= y[5]=t[2]'-t[5]''
VSUB.S16 Q10,Q9, Q12 @ D20= y[6]=t[1]-t[6]
@ D21= y[4]=t[3]'-t[4]''
VADD.S16 Q8, Q8, Q13 @ D16= y[0]=t[0]+t[7]
@ D17= y[2]=t[2]'+t[5]''
VADD.S16 Q9, Q9, Q12 @ D18= y[1]=t[1]-t[6]
@ D19= y[3]=t[3]'-t[4]''
@ 8x4 transpose
VTRN.16 Q10,Q11 @ Q10= c5c4a5a4 c7c6a7a6
@ Q11= d5d4b5b4 d7d6b7b6
VTRN.16 Q8, Q9 @ Q8 = c3c2a3a2 c1c0a1a0
@ Q9 = d3d2b3b2 d1d0b1b0
VSWP D20,D21 @ Q10= c7c6a7a6 c5c4a5a4
VSWP D22,D23 @ Q11= d7d6b7b6 d5d4b5b4
VUZP.32 Q9, Q11 @ Q9 = b7b6b5b4 b3b2b1b0
@ Q11= d7d6d5d4 d3d2d1d0
VMULL.S16 Q15,D18,D0[1]
VMULL.S16 Q13,D22,D1[1]
VUZP.32 Q8, Q10 @ Q8 = a7a6a5a4 a3a2a1a0
@ Q10= c7c6c5c4 c3c2c1c0
@ Column transforms
@ Stages 1, 2, & 3
VMULL.S16 Q14,D19,D0[1] @ Q14:Q15= OC_C1S7*x[1]-(x[1]<<16)
VMULL.S16 Q12,D23,D1[1] @ Q12:Q13= OC_C5S3*x[3]-(x[3]<<16)
VMULL.S16 Q3, D22,D0[3]
VMULL.S16 Q2, D23,D0[3] @ Q2:Q3 = OC_C3S5*x[3]-(x[3]<<16)
VSHRN.S32 D30,Q15,#16
VSHRN.S32 D31,Q14,#16 @ Q15= (OC_C1S7*x[1]>>16)-x[1]
VSHRN.S32 D26,Q13,#16
VSHRN.S32 D27,Q12,#16 @ Q13= (OC_C5S3*x[3]>>16)-x[3]
VSHRN.S32 D28,Q3, #16
VSHRN.S32 D29,Q2, #16 @ Q14= (OC_C3S5*x[3]>>16)-x[3]
VADD.S16 Q15,Q15,Q9 @ Q15= t[7]
VADD.S16 Q13,Q13,Q11 @ Q13= -t[5]
VADD.S16 Q14,Q14,Q11 @ Q14= t[6]
VMULL.S16 Q12,D18,D1[3]
VMULL.S16 Q2, D19,D1[3] @ Q2:Q12= OC_C7S1*x[1]
VMULL.S16 Q1, D16,D1[0]
VMULL.S16 Q11,D17,D1[0] @ Q11:Q1 = OC_C4S4*x[0]-(x[0]<<16)
VMULL.S16 Q3, D20,D0[2]
VMULL.S16 Q9, D21,D0[2] @ Q9:Q3 = OC_C2S6*x[2]-(x[2]<<16)
VSHRN.S32 D24,Q12,#16
VSHRN.S32 D25,Q2, #16 @ Q12= t[4]
VMULL.S16 Q2, D20,D1[2]
VSHRN.S32 D2, Q1, #16
VSHRN.S32 D3, Q11,#16 @ Q1 = (OC_C4S4*x[0]>>16)-x[0]
VMULL.S16 Q11,D21,D1[2] @ Q2:Q11= OC_C6S2*x[2]
VSHRN.S32 D6, Q3, #16
VSHRN.S32 D7, Q9, #16 @ Q3 = (OC_C2S6*x[2]>>16)-x[2]
VSUB.S16 Q9, Q15,Q14 @ Q9 = t[7]-t[6]
VADD.S16 Q15,Q15,Q14 @ Q15= t[7]=t[7]+t[6]
VSHRN.S32 D4, Q2, #16
VSHRN.S32 D5, Q11,#16 @ Q2 = t[2]
VADD.S16 Q1, Q1, Q8 @ Q1 = t[0]
VADD.S16 Q8, Q12,Q13 @ Q8 = t[4]-t[5]
VADD.S16 Q3, Q3, Q10 @ Q3 = t[3]
VMULL.S16 Q10,D16,D1[0]
VMULL.S16 Q11,D17,D1[0] @ Q11:Q10= OC_C4S4*(t[4]-t[5])
@ -(t[4]-t[5]<<16)
VSUB.S16 Q12,Q12,Q13 @ Q12= t[4]=t[4]+t[5]
VMULL.S16 Q14,D18,D1[0]
VMULL.S16 Q13,D19,D1[0] @ Q13:Q14= OC_C4S4*(t[6]-t[7])
@ -(t[6]-t[7]<<16)
VSHRN.S32 D20,Q10,#16
VSHRN.S32 D21,Q11,#16 @ Q10= (OC_C4S4*(t[4]-t[5])>>16)
@ -(t[4]-t[5])
VADD.S16 Q11,Q1, Q3 @ Q11= t[0]=t[0]+t[3]
VSUB.S16 Q3, Q1, Q3 @ Q3 = t[3]=t[0]-t[3]
VSHRN.S32 D28,Q14,#16
VSHRN.S32 D29,Q13,#16 @ Q14= (OC_C4S4*(t[7]-t[6])>>16)
@ -(t[7]-t[6])
VADD.S16 Q10,Q10,Q8 @ Q10=t[5]
VADD.S16 Q14,Q14,Q9 @ Q14=t[6]
VSUB.S16 Q13,Q14,Q10 @ Q13=t[5]=t[6]-t[5]
VADD.S16 Q14,Q14,Q10 @ Q14=t[6]=t[6]+t[5]
VADD.S16 Q10,Q1, Q2 @ Q10= t[1]=t[0]+t[2]
VSUB.S16 Q2, Q1, Q2 @ Q2 = t[2]=t[0]-t[2]
@ Stage 4
VADD.S16 Q8, Q11,Q15 @ Q8 = y[0]=t[0]+t[7]
VADD.S16 Q9, Q10,Q14 @ Q9 = y[1]=t[1]+t[6]
VSUB.S16 Q15,Q11,Q15 @ Q15 = y[7]=t[0]-t[7]
VSUB.S16 Q14,Q10,Q14 @ Q14 = y[6]=t[1]-t[6]
VADD.S16 Q10,Q2, Q13 @ Q10 = y[2]=t[2]+t[5]
VADD.S16 Q11,Q3, Q12 @ Q11 = y[3]=t[3]+t[4]
VSUB.S16 Q12,Q3, Q12 @ Q12 = y[4]=t[3]-t[4]
VSUB.S16 Q13,Q2, Q13 @ Q13 = y[5]=t[2]-t[5]
VMOV.I8 D2, #0
VRSHR.S16 Q8, Q8, #4 @ Q8 = y[0]+8>>4
VST1.64 {D2}, [r1,:64], r12
VRSHR.S16 Q9, Q9, #4 @ Q9 = y[1]+8>>4
VRSHR.S16 Q10,Q10,#4 @ Q10 = y[2]+8>>4
VST1.64 {D2}, [r1,:64], r12
VRSHR.S16 Q11,Q11,#4 @ Q11 = y[3]+8>>4
VRSHR.S16 Q12,Q12,#4 @ Q12 = y[4]+8>>4
VST1.64 {D2}, [r1,:64], r12
VRSHR.S16 Q13,Q13,#4 @ Q13 = y[5]+8>>4
VRSHR.S16 Q14,Q14,#4 @ Q14 = y[6]+8>>4
VST1.64 {D2}, [r1,:64]
VRSHR.S16 Q15,Q15,#4 @ Q15 = y[7]+8>>4
VSTMIA r0, {D16-D31}
MOV PC, r14
.size oc_idct8x8_10_neon, .-oc_idct8x8_10_neon @ ENDP
.endif
@ END
.section .note.GNU-stack,"",%progbits
| 35.396226 | 79 | 0.569708 |
51c009dcacc56f8ca9ccc975f8fbefa74129e5c9 | 2,830 | asm | Assembly | dino/lcs/123p/68.asm | zengfr/arcade_game_romhacking_sourcecode_top_secret_data | a4a0c86c200241494b3f1834cd0aef8dc02f7683 | [
"Apache-2.0"
] | 6 | 2020-10-14T15:29:10.000Z | 2022-02-12T18:58:54.000Z | dino/lcs/123p/68.asm | zengfr/arcade_game_romhacking_sourcecode_top_secret_data | a4a0c86c200241494b3f1834cd0aef8dc02f7683 | [
"Apache-2.0"
] | null | null | null | dino/lcs/123p/68.asm | zengfr/arcade_game_romhacking_sourcecode_top_secret_data | a4a0c86c200241494b3f1834cd0aef8dc02f7683 | [
"Apache-2.0"
] | 1 | 2020-12-17T08:59:10.000Z | 2020-12-17T08:59:10.000Z | copyright zengfr site:http://github.com/zengfr/romhack
00042A move.l D1, (A0)+
00042C dbra D0, $42a
004D94 move.l D1, (A1)+
004D96 dbra D0, $4d94
010748 move.w A2, ($68,A3)
01074C move.b #$3c, ($cb,A3) [123p+ 68]
010EAC move.w A2, ($68,A3) [123p+ C5]
010EB0 move.b #$3c, ($cb,A3) [123p+ 68]
01165E movea.w ($68,A3), A4
011662 cmpa.w A2, A4 [123p+ 68]
011696 move.w A2, ($68,A3)
01169A move.b #$3c, ($cb,A3) [123p+ 68]
011D76 movea.w ($68,A3), A4
011D7A cmpa.w A2, A4 [123p+ 68]
011DAE move.w A2, ($68,A3)
011DB2 move.b #$3c, ($cb,A3) [123p+ 68]
0125DE move.w A6, ($68,A3)
0125E2 move.b #$2, ($0,A3) [123p+ 68]
016B18 movea.w ($68,A6), A0
016B1C tst.b ($82,A0) [123p+ 68]
01C06E movea.w ($68,A6), A0
01C072 moveq #$0, D1 [123p+ 68]
01C130 movea.w ($68,A6), A0
01C134 moveq #$0, D1 [123p+ 68]
01C1D0 movea.w ($68,A6), A0
01C1D4 moveq #$0, D1 [123p+ 68]
01C3B0 movea.w ($68,A6), A0
01C3B4 moveq #$0, D1 [123p+ 68]
01C704 movea.w ($68,A6), A0
01C708 moveq #$0, D1 [123p+ 68]
01C8EA movea.w ($68,A6), A1 [123p+ 80]
01C8EE moveq #$0, D1 [123p+ 68]
03C22E movea.w ($68,A0), A1
03C232 cmpa.l A1, A6 [123p+ 68]
0AAACA move.l (A0), D2
0AAACC move.w D0, (A0) [123p+11A, 123p+11C, 123p+11E, 123p+120, 123p+122, 123p+124, 123p+126, 123p+128, 123p+12A, enemy+BC, enemy+C0, enemy+C2, enemy+C4, enemy+CC, enemy+CE, enemy+D0, enemy+D2, enemy+D4, enemy+D6, enemy+D8, enemy+DA, enemy+DE, item+86, item+88, item+8A, item+98, item+9A, item+9C, item+9E, item+A0, item+A2, item+A4, item+A6, scr1]
0AAACE move.w D0, ($2,A0)
0AAAD2 cmp.l (A0), D0
0AAAD4 bne $aaafc
0AAAD8 move.l D2, (A0)+
0AAADA cmpa.l A0, A1 [123p+11A, 123p+11C, 123p+11E, 123p+120, 123p+122, 123p+124, 123p+126, 123p+128, 123p+12A, enemy+BC, enemy+C0, enemy+C2, enemy+C4, enemy+CC, enemy+CE, enemy+D0, enemy+D2, enemy+D4, enemy+D6, enemy+D8, enemy+DA, enemy+DE, item+86, item+88, item+8A, item+98, item+9A, item+9C, item+9E, item+A0, item+A2, item+A4, item+A6, scr1]
0AAAE6 move.l (A0), D2
0AAAE8 move.w D0, (A0) [123p+11A, 123p+11C, 123p+11E, 123p+120, 123p+122, 123p+124, 123p+126, 123p+128, 123p+12A, enemy+BC, enemy+C0, enemy+C2, enemy+C4, enemy+CC, enemy+CE, enemy+D0, enemy+D2, enemy+D4, enemy+D6, enemy+D8, enemy+DA, enemy+DE, item+86, item+88, item+8A, item+98, item+9A, item+9C, item+9E, item+A0, item+A2, item+A4, item+A6, scr1]
0AAAF4 move.l D2, (A0)+
0AAAF6 cmpa.l A0, A1 [123p+11A, 123p+11C, 123p+11E, 123p+120, 123p+122, 123p+124, 123p+126, 123p+128, 123p+12A, enemy+BC, enemy+C0, enemy+C2, enemy+C4, enemy+CC, enemy+CE, enemy+D0, enemy+D2, enemy+D4, enemy+D6, enemy+D8, enemy+DA, enemy+DE, item+86, item+88, item+8A, item+98, item+9A, item+9C, item+9E, item+A0, item+A2, item+A4, item+A6, scr1]
copyright zengfr site:http://github.com/zengfr/romhack
| 56.6 | 350 | 0.637456 |
a7c360db369a856770b8324601f7f960d5c8d74f | 170 | asm | Assembly | Working Disassembly/General/Blue Sphere/Map - Copyright.asm | TeamASM-Blur/Sonic-3-Blue-Balls-Edition | 7e8a2c5df02271615ff4cae529521e6b1560d6b1 | [
"Apache-2.0"
] | 5 | 2021-07-09T08:17:56.000Z | 2022-02-27T19:57:47.000Z | Working Disassembly/General/Blue Sphere/Map - Copyright.asm | TeamASM-Blur/Sonic-3-Blue-Balls-Edition | 7e8a2c5df02271615ff4cae529521e6b1560d6b1 | [
"Apache-2.0"
] | null | null | null | Working Disassembly/General/Blue Sphere/Map - Copyright.asm | TeamASM-Blur/Sonic-3-Blue-Balls-Edition | 7e8a2c5df02271615ff4cae529521e6b1560d6b1 | [
"Apache-2.0"
] | null | null | null | Map_4DA68: dc.w word_4DA6A-Map_4DA68
word_4DA6A: dc.w 3
dc.b $FC, 0, 0, 0, $FF, $D4
dc.b $FC, $C, 0, 1, $FF, $E4
dc.b $FC, $C, 0, 5, 0, $C
| 28.333333 | 37 | 0.464706 |
e5910da58e36a36b7fe26493aa1cbb6d6d0892fc | 544 | asm | Assembly | oeis/013/A013784.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/013/A013784.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/013/A013784.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A013784: a(n) = 6^(4*n + 1).
; 6,7776,10077696,13060694016,16926659444736,21936950640377856,28430288029929701376,36845653286788892983296,47751966659678405306351616,61886548790943213277031694336,80204967233062404407033075859456,103945637534048876111514866313854976,134713546244127343440523266742756048896,174588755932389037098918153698611839369216,226267027688376192080197927193400943822503936,293242067884135544935936513642647623193965101056,380041719977839666236973721680871319659378770968576
mul $0,4
add $0,1
mov $1,6
pow $1,$0
mov $0,$1
| 60.444444 | 464 | 0.889706 |
18714935771e1a0998c5deef457b493ecdcfa0ed | 6,739 | asm | Assembly | 45/runtime/rt/grcoord.asm | minblock/msdos | 479ffd237d9bb7cc83cb06361db2c4ef42dfbac0 | [
"Apache-2.0"
] | null | null | null | 45/runtime/rt/grcoord.asm | minblock/msdos | 479ffd237d9bb7cc83cb06361db2c4ef42dfbac0 | [
"Apache-2.0"
] | null | null | null | 45/runtime/rt/grcoord.asm | minblock/msdos | 479ffd237d9bb7cc83cb06361db2c4ef42dfbac0 | [
"Apache-2.0"
] | null | null | null | TITLE GRCOORD - graphics point specification
PAGE 56,132
;***
;GRCOORD - graphics point specification
;
; Copyright <C> 1986 - 1988, Microsoft Corporation
;
;Purpose:
; This module contains point specification routines, and routines which will
; transform and convert those points as required.
;
;******************************************************************************
INCLUDE switch.inc
INCLUDE rmacros.inc ;Runtime Macro Defintions
useSeg _BSS ;Uninitialized data
useSeg _DATA ; Initialized data
useSeg GR_TEXT ;Graphics segments
useSeg RT_TEXT
INCLUDE seg.inc ;segment definitions & cmacros
INCLUDE baslibma.inc ;useful macros
;******************************************************************************
;
; point data structure
;
;******************************************************************************
POINT STRUC
fPoint DB (?) ;content flags
xI2 DW (?) ;x coordinate as an I2
xR4 DW 2 DUP (?) ;x coordinate as an I4
yI2 DW (?) ;y coordinate as an I2
yR4 DW 2 DUP (?) ;y coordinate as an I4
POINT ENDS
fxI2 EQU 00000001B ;xI2 is valid
fxR4 EQU 00000010B ;xR4 is valid
fxStep EQU 00001000B ;x represents a STEP value
fyI2 EQU 00010000B ;yI2 is valid
fyR4 EQU 00100000B ;yR4 is valid
fyStep EQU 10000000B ;y represents a STEP value
b$cbPoint EQU SIZE POINT
PUBLIC b$cbPoint ;Size of the point structure
;******************************************************************************
;
; point data storage
;
;******************************************************************************
sBegin _BSS
globalB b$point1,,<b$cbPoint> ;first coordinate pair
globalB b$point2,,<b$cbPoint> ;second coordinate pair
globalB b$fpoint,,1 ; point statement being processed flag
externB b$ScreenMode
externB B$COPTFL ; CIRCLE option flag
externW B$GRPACX ;graphics accumulator X
externW B$GRPACY ;graphics accumulator Y
externW B$GXPOS
externW B$GYPOS
externW B$VXOFF ;Viewport offset X
externW B$VYOFF ;Viewport offset Y
externB B$WNDWSW ; flag indicates WINDOW active
externB B$DFRACX ;8 bit fraction x after
sEnd _BSS
sBegin _DATA
globalW b$pFPCOORD,B$ERR_FC,1 ; vector to B$FPCOORD
globalW b$pFPCOORDW,B$ERR_FC,1 ; vector to B$FPCOORDW
sEnd _DATA
sBegin RT_TEXT
externNP B$ERR_FC
sEnd
sBegin GR_TEXT
assumes CS,GR_TEXT
externNP B$INVIEW ;determine if points within viewport
SUBTTL Integer point specification entrypoints
PAGE
;***
; B$N1I2, B$S1I2, B$N2I2, B$S2I2 - Integer point specification
; void pascal B$N1I2(I2 x, I2 y)
;
;Purpose:
; Specify integer coordinate pairs.
; B$N1I2 - "normal" first coordinate pair
; B$S1I2 - STEP first coordinate pair
; B$N2I2 - "normal" second coordinate pair
; B$S2I2 - STEP second coordinate pair
;
;Entry:
; x,y = integer x and y values.
;
;Exit:
; None.
;
;Uses:
; per convention
;
;******************************************************************************
cProc B$S1I2,<FAR,PUBLIC> ;First STEP pair
cBegin nogen
MOV CL,fxI2+fxStep+fyI2+fyStep ;indicate type of values
SKIP 2 ;fall into next routine
cEnd nogen
cProc B$N1I2,<FAR,PUBLIC> ;First pair
cBegin nogen
MOV CL,fxI2+fyI2 ;indicate type of values
MOV BX,OFFSET DGROUP: b$point1 ;point at first pair table
cEnd nogen
cProc B$I2POINT,<FAR,PUBLIC> ;Common routine to set point struct
parmW x
parmW y
cBegin nogen
POP AX
POP DX ;[DX:AX] = return address
POP [BX].yI2 ;store y coordinate
POP [BX].xI2 ;store x coordinate
labelNP <PUBLIC,B$STOREFLAGS> ; entry point from R4 code
MOV [BX].fPoint,CL ;store flags
MOV B$COPTFL,0 ; Reset it - CIRCLE may have left it set.
PUSH DX
PUSH AX ;put return address back on stack
RET ;and we are done
cEnd nogen
cProc B$S2I2,<FAR,PUBLIC> ;Second STEP pair
parmW x
parmW y
cBegin nogen
MOV CL,fxI2+fxStep+fyI2+fyStep ;indicate type of values
SKIP 2 ;fall into next routine
cEnd nogen
cProc B$N2I2,<FAR,PUBLIC> ;Second pair
parmW x
parmW y
cBegin nogen
MOV CL,fxI2+fyI2 ;indicate type of values
MOV BX,OFFSET DGROUP: b$point2 ;point at second pair table
JMP B$I2POINT
cEnd nogen
SUBTTL B$COORD - process & return integer coordinates
PAGE
;***
;B$COORD, B$COORD1, B$COORD2 - get a coordinate pair
;
;Purpose:
; Calculate the physical screen coordinates of the given point. Relative
; coordinates, viewports and windowing are all considered in determining the
; final coordinates. Clipping is not done in this routine.
;
;Entry:
; [BX] = pointer to point to be processed (B$COORD only)
;
;Exit:
; [CX] = x value
; [DX] = y value
; Graphics accumulators updated
;
;Modifies:
; per convention
;
;Notes:
; This routine used to be $COORDS, and contained switches for FG_SCRNROT
;
;******************************************************************************
cProc B$COORD2,<NEAR,PUBLIC> ;Get second point in coord pair
cBegin <nogen>
MOV BX,OFFSET DGROUP:b$point2
JMP SHORT B$COORD
cEnd <nogen>
cProc B$COORD1,<NEAR,PUBLIC> ;Get first point
cBegin <nogen>
MOV BX,OFFSET DGROUP:b$point1
cEnd <nogen>
cProc B$COORD,<NEAR,PUBLIC>
cBegin
MOV AL,[BX].fPoint ;[AL] = flags relating to coordinate pair
OR AL,AL ;See if there is a point to process
JNZ COORD_5 ;Jump if there is
MOV CX,B$GRPACX ;Return Graphics Accumulator x
MOV DX,B$GRPACY ;Return Graphics Accumulator y
RET
COORD_5:
PUSH SI ;Save me
MOV SI,BX ;[SI] = pointer to point struct
CMP [B$WNDWSW],0 ; Is window active?
JZ CORINT ;Jump if not, we should have INT's
JMP [b$pFPCOORDW] ; resumes at B$COORD_NOSTEP
;
; No window is active, so we expect to do integer calculations. Make sure that
; we have I2 representations for both our points.
;
CORINT:
TEST AL,fxR4+fyR4 ;Is either coord an R4?
JZ CORINT1 ;brif not - no conversion needed
CALL [b$pFPCOORD] ; make coords I2
CORINT1:
MOV CX,[SI].xI2 ;[CX] = I2 representation of X
MOV DX,[SI].yI2 ;[DX] = I2 representation of Y
CMP b$fpoint,1 ;processing point function ?
JZ B$COORD_NOSTEP ; if so do not add the bases
TEST AL,fxStep ;only need to test one, they come in pairs
JZ B$COORD_NOSTEP ; If not step, then don't add base
ADD CX,B$GRPACX ;Add current graphics accum to create step.
ADD DX,B$GRPACY
JMP SHORT COORD_STEP
labelNP <PUBLIC,B$COORD_NOSTEP> ; B$FPCOORDW returns here
ADD CX,B$VXOFF ;ABSx = Vx1 +x
ADD DX,B$VYOFF ;ABSy = Vy1 +y
COORD_STEP:
MOV B$GRPACX,CX ;Update Graphics Accumulator x
MOV B$GXPOS,CX ;Copy
MOV B$GRPACY,DX ;Update Graphics Accumulator y
MOV B$GYPOS,DX ;Copy
MOV WORD PTR B$DFRACX,8080H ;Set Fractional x,y to 1/2
XOR AX,AX
MOV [SI].fPoint,AL ;clear point flag for next time...
CMP b$ScreenMode,0 ; graphics mode?
JZ FC_ERRR ;Illegal function call
POP SI
JMP B$INVIEW ;See if point in viewport
cEnd nogen
FC_ERRR:
JMP B$ERR_FC ;ILLEGAL FUNCTION CALL
sEnd GR_TEXT
END
| 25.052045 | 79 | 0.674432 |
8998c5c82ddd68502129c0a79bffe7568c90bb00 | 180 | asm | Assembly | libmikeos/src.os/os_clear_screen.asm | mynameispyo/InpyoOS | b6ddb6d9715b027ab65891bd4c4f46dbe5c9890d | [
"BSD-3-Clause",
"MIT"
] | null | null | null | libmikeos/src.os/os_clear_screen.asm | mynameispyo/InpyoOS | b6ddb6d9715b027ab65891bd4c4f46dbe5c9890d | [
"BSD-3-Clause",
"MIT"
] | null | null | null | libmikeos/src.os/os_clear_screen.asm | mynameispyo/InpyoOS | b6ddb6d9715b027ab65891bd4c4f46dbe5c9890d | [
"BSD-3-Clause",
"MIT"
] | null | null | null |
; @@@ void mikeos_clear_screen(void);
%include "os_vector.inc"
section .text
use16
global _mikeos_clear_screen
_mikeos_clear_screen:
mov bx, os_clear_screen
call bx
ret
| 12 | 37 | 0.761111 |
8e5beb86cc3a9c2d3896bf2e573bd2a8e9f3cc64 | 460 | asm | Assembly | src/firmware-tests/Platform/ResetFlagsStubs.asm | pete-restall/Cluck2Sesame-Prototype | 99119b6748847a7b6aeadc4bee42cbed726f7fdc | [
"MIT"
] | 1 | 2019-12-12T09:07:08.000Z | 2019-12-12T09:07:08.000Z | src/firmware-tests/Platform/ResetFlagsStubs.asm | pete-restall/Cluck2Sesame-Prototype | 99119b6748847a7b6aeadc4bee42cbed726f7fdc | [
"MIT"
] | null | null | null | src/firmware-tests/Platform/ResetFlagsStubs.asm | pete-restall/Cluck2Sesame-Prototype | 99119b6748847a7b6aeadc4bee42cbed726f7fdc | [
"MIT"
] | null | null | null | #include "Platform.inc"
#include "ResetFlags.inc"
#include "TestDoubles.inc"
radix decimal
extern resetFlags
ResetFlagsStubs code
global stubIsLastResetDueToBrownOutToReturnTrue
global stubIsLastResetDueToBrownOutToReturnFalse
stubIsLastResetDueToBrownOutToReturnTrue:
banksel resetFlags
bsf resetFlags, RESET_FLAG_BROWNOUT
return
stubIsLastResetDueToBrownOutToReturnFalse:
banksel resetFlags
bcf resetFlags, RESET_FLAG_BROWNOUT
return
end
| 19.166667 | 49 | 0.854348 |
3818e5debf217c1c5424201c18d643670919a0fa | 118 | asm | Assembly | unittests/32Bit_ASM/X87/D9_E8.asm | cobalt2727/FEX | 13087f8425aeaad28dc81bed46a83e1d72ff0db8 | [
"MIT"
] | 628 | 2020-03-06T14:01:32.000Z | 2022-03-31T06:35:14.000Z | unittests/32Bit_ASM/X87/D9_E8.asm | cobalt2727/FEX | 13087f8425aeaad28dc81bed46a83e1d72ff0db8 | [
"MIT"
] | 576 | 2020-03-06T08:25:12.000Z | 2022-03-30T04:05:29.000Z | unittests/32Bit_ASM/X87/D9_E8.asm | cobalt2727/FEX | 13087f8425aeaad28dc81bed46a83e1d72ff0db8 | [
"MIT"
] | 38 | 2020-03-07T06:10:00.000Z | 2022-03-29T09:27:36.000Z | %ifdef CONFIG
{
"RegData": {
"MM7": ["0x8000000000000000", "0x3FFF"]
},
"Mode": "32BIT"
}
%endif
fld1
hlt
| 9.076923 | 43 | 0.559322 |
5e32918b23d9ad247c1b5d13f9295ffafdd8d0a6 | 672 | asm | Assembly | oeis/259/A259321.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/259/A259321.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/259/A259321.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A259321: a(n) = A259110(n)*A259323(n) - A259319(n)^2.
; Submitted by Jon Maiga
; 0,2304,290304,6386688,65235456,424030464,2038772736,7894388736,25960393728,75123949824,196144058880,470584857600,1051840857600,2213790808320,4424337967104,8453141250048,15525242320896,27535076464896,47338548401664,79144486327296,129030886752768,205615957434624,320919084186624,491452517928960,739590829286400,1095272037699840,1598091818678784,2299860354806784,3267700251729408,4587773517916416,6369735934808064,8752028250341376,11908125542117376,16053878844926208,21456096749305344,28442529181578240
mul $0,2
mov $2,$0
add $2,3
bin $2,$0
add $0,5
bin $0,7
mul $0,$2
div $0,10
mul $0,2304
| 48 | 501 | 0.842262 |
527804c22da1e0bf6486963cf67de6d97a5da00f | 1,408 | asm | Assembly | types.asm | SiliconSloth/tri3d | 3a1b848500115045ba33843117d776ddfaad0fb4 | [
"MIT"
] | 8 | 2021-08-23T19:39:46.000Z | 2021-09-19T14:37:32.000Z | types.asm | SiliconSloth/tri3d | 3a1b848500115045ba33843117d776ddfaad0fb4 | [
"MIT"
] | null | null | null | types.asm | SiliconSloth/tri3d | 3a1b848500115045ba33843117d776ddfaad0fb4 | [
"MIT"
] | 1 | 2021-08-24T13:08:14.000Z | 2021-08-24T13:08:14.000Z | V_x equ 0
V_y equ 4
V_z equ 8
V_w equ 12
V_r equ 16
V_g equ 20
V_b equ 24
V_a equ 28
V_s equ 32
V_t equ 36
V_size equ 40
C_header equ 0
C_yl equ 2
C_ym equ 4
C_yh equ 6
C_xl_i equ 8
C_xl_f equ 10
C_dxldy_i equ 12
C_dxldy_f equ 14
C_xh_i equ 16
C_xh_f equ 18
C_dxhdy_i equ 20
C_dxhdy_f equ 22
C_xm_i equ 24
C_xm_f equ 26
C_dxmdy_i equ 28
C_dxmdy_f equ 30
C_r_i equ 32
C_g_i equ 34
C_b_i equ 36
C_a_i equ 38
C_drdx_i equ 40
C_dgdx_i equ 42
C_dbdx_i equ 44
C_dadx_i equ 46
C_r_f equ 48
C_g_f equ 50
C_b_f equ 52
C_a_f equ 54
C_drdx_f equ 56
C_dgdx_f equ 58
C_dbdx_f equ 60
C_dadx_f equ 62
C_drde_i equ 64
C_dgde_i equ 66
C_dbde_i equ 68
C_dade_i equ 70
C_drdy_i equ 72
C_dgdy_i equ 74
C_dbdy_i equ 76
C_dady_i equ 78
C_drde_f equ 80
C_dgde_f equ 82
C_dbde_f equ 84
C_dade_f equ 86
C_drdy_f equ 88
C_dgdy_f equ 90
C_dbdy_f equ 92
C_dady_f equ 94
C_s_i equ 96
C_t_i equ 98
C_w_i equ 100
C_dsdx_i equ 104
C_dtdx_i equ 106
C_dwdx_i equ 108
C_s_f equ 112
C_t_f equ 114
C_w_f equ 116
C_dsdx_f equ 120
C_dtdx_f equ 122
C_dwdx_f equ 124
C_dsde_i equ 128
C_dtde_i equ 130
C_dwde_i equ 132
C_dsdy_i equ 136
C_dtdy_i equ 138
C_dwdy_i equ 140
C_dsde_f equ 144
C_dtde_f equ 146
C_dwde_f equ 148
C_dsdy_f equ 152
C_dtdy_f equ 154
C_dwdy_f equ 156
C_z_i equ 160
C_z_f equ 162
C_dzdx_i equ 164
C_dzdx_f equ 166
C_dzde_i equ 168
C_dzde_f equ 170
C_dzdy_i equ 172
C_dzdy_f equ 174
C_size equ 176
| 11.174603 | 16 | 0.78054 |
975f7e5b343572ee5e880c2666c4e45502f34002 | 366 | asm | Assembly | programs/oeis/132/A132739.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/132/A132739.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/132/A132739.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A132739: Largest divisor of n not divisible by 5.
; 1,2,3,4,1,6,7,8,9,2,11,12,13,14,3,16,17,18,19,4,21,22,23,24,1,26,27,28,29,6,31,32,33,34,7,36,37,38,39,8,41,42,43,44,9,46,47,48,49,2,51,52,53,54,11,56,57,58,59,12,61,62,63,64,13,66,67,68,69,14,71,72,73,74,3,76,77,78,79,16,81,82,83,84,17,86,87,88,89,18,91,92,93,94,19,96,97,98,99,4
add $0,1
lpb $0
dif $0,5
lpe
| 45.75 | 281 | 0.644809 |
260b1ae2dabc610a540e84a6e06cf357267e5500 | 10,017 | asm | Assembly | src/native/third_party/isa-l_crypto/include/memcpy.asm | guptsanj/noobaa-core | 91b01ec8d537780d3b0a7a9a20065000167d882a | [
"Apache-2.0"
] | null | null | null | src/native/third_party/isa-l_crypto/include/memcpy.asm | guptsanj/noobaa-core | 91b01ec8d537780d3b0a7a9a20065000167d882a | [
"Apache-2.0"
] | null | null | null | src/native/third_party/isa-l_crypto/include/memcpy.asm | guptsanj/noobaa-core | 91b01ec8d537780d3b0a7a9a20065000167d882a | [
"Apache-2.0"
] | null | null | null | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright(c) 2011-2016 Intel Corporation All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in
; the documentation and/or other materials provided with the
; distribution.
; * Neither the name of Intel Corporation nor the names of its
; contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
%ifndef __MEMCPY_ASM__
%define __MEMCPY_ASM__
%include "reg_sizes.asm"
; This file defines a series of macros to copy small to medium amounts
; of data from memory to memory, where the size is variable but limited.
;
; The macros are all called as:
; memcpy DST, SRC, SIZE, TMP0, TMP1, XTMP0, XTMP1, XTMP2, XTMP3
; with the parameters defined as:
; DST : register: pointer to dst (not modified)
; SRC : register: pointer to src (not modified)
; SIZE : register: length in bytes (not modified)
; TMP0 : 64-bit temp GPR (clobbered)
; TMP1 : 64-bit temp GPR (clobbered)
; XTMP0 : temp XMM (clobbered)
; XTMP1 : temp XMM (clobbered)
; XTMP2 : temp XMM (clobbered)
; XTMP3 : temp XMM (clobbered)
;
; The name indicates the options. The name is of the form:
; memcpy_<VEC>_<SZ><ZERO><RET>
; where:
; <VEC> is either "sse" or "avx" or "avx2"
; <SZ> is either "64" or "128" and defines largest value of SIZE
; <ZERO> is blank or "_1". If "_1" then the min SIZE is 1 (otherwise 0)
; <RET> is blank or "_ret". If blank, the code falls through. If "ret"
; it does a "ret" at the end
;
; For the avx2 versions, the temp XMM registers need to be YMM registers
; If the SZ is 64, then only two YMM temps are needed, i.e. it is called as:
; memcpy_avx2_64 DST, SRC, SIZE, TMP0, TMP1, YTMP0, YTMP1
; memcpy_avx2_128 DST, SRC, SIZE, TMP0, TMP1, YTMP0, YTMP1, YTMP2, YTMP3
;
; For example:
; memcpy_sse_64 : SSE, 0 <= size < 64, falls through
; memcpy_avx_64_1 : AVX1, 1 <= size < 64, falls through
; memcpy_sse_128_ret : SSE, 0 <= size < 128, ends with ret
; mempcy_avx_128_1_ret : AVX1, 1 <= size < 128, ends with ret
;
%macro memcpy_sse_64 9
__memcpy_int %1,%2,%3,%4,%5,%6,%7,%8,%9, 0, 64, 0, 0
%endm
%macro memcpy_sse_64_1 9
__memcpy_int %1,%2,%3,%4,%5,%6,%7,%8,%9, 1, 64, 0, 0
%endm
%macro memcpy_sse_128 9
__memcpy_int %1,%2,%3,%4,%5,%6,%7,%8,%9, 0, 128, 0, 0
%endm
%macro memcpy_sse_128_1 9
__memcpy_int %1,%2,%3,%4,%5,%6,%7,%8,%9, 1, 128, 0, 0
%endm
%macro memcpy_sse_64_ret 9
__memcpy_int %1,%2,%3,%4,%5,%6,%7,%8,%9, 0, 64, 1, 0
%endm
%macro memcpy_sse_64_1_ret 9
__memcpy_int %1,%2,%3,%4,%5,%6,%7,%8,%9, 1, 64, 1, 0
%endm
%macro memcpy_sse_128_ret 9
__memcpy_int %1,%2,%3,%4,%5,%6,%7,%8,%9, 0, 128, 1, 0
%endm
%macro memcpy_sse_128_1_ret 9
__memcpy_int %1,%2,%3,%4,%5,%6,%7,%8,%9, 1, 128, 1, 0
%endm
%macro memcpy_sse_16 5
__memcpy_int %1,%2,%3,%4,%5,,,,, 0, 16, 0, 0
%endm
%macro memcpy_sse_16_1 5
__memcpy_int %1,%2,%3,%4,%5,,,,, 1, 16, 0, 0
%endm
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
%macro memcpy_avx_64 9
__memcpy_int %1,%2,%3,%4,%5,%6,%7,%8,%9, 0, 64, 0, 1
%endm
%macro memcpy_avx_64_1 9
__memcpy_int %1,%2,%3,%4,%5,%6,%7,%8,%9, 1, 64, 0, 1
%endm
%macro memcpy_avx_128 9
__memcpy_int %1,%2,%3,%4,%5,%6,%7,%8,%9, 0, 128, 0, 1
%endm
%macro memcpy_avx_128_1 9
__memcpy_int %1,%2,%3,%4,%5,%6,%7,%8,%9, 1, 128, 0, 1
%endm
%macro memcpy_avx_64_ret 9
__memcpy_int %1,%2,%3,%4,%5,%6,%7,%8,%9, 0, 64, 1, 1
%endm
%macro memcpy_avx_64_1_ret 9
__memcpy_int %1,%2,%3,%4,%5,%6,%7,%8,%9, 1, 64, 1, 1
%endm
%macro memcpy_avx_128_ret 9
__memcpy_int %1,%2,%3,%4,%5,%6,%7,%8,%9, 0, 128, 1, 1
%endm
%macro memcpy_avx_128_1_ret 9
__memcpy_int %1,%2,%3,%4,%5,%6,%7,%8,%9, 1, 128, 1, 1
%endm
%macro memcpy_avx_16 5
__memcpy_int %1,%2,%3,%4,%5,,,,, 0, 16, 0, 1
%endm
%macro memcpy_avx_16_1 5
__memcpy_int %1,%2,%3,%4,%5,,,,, 1, 16, 0, 1
%endm
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
%macro memcpy_avx2_64 7
__memcpy_int %1,%2,%3,%4,%5,%6,%7,--,--, 0, 64, 0, 2
%endm
%macro memcpy_avx2_64_1 7
__memcpy_int %1,%2,%3,%4,%5,%6,%7,--,--, 1, 64, 0, 2
%endm
%macro memcpy_avx2_128 9
__memcpy_int %1,%2,%3,%4,%5,%6,%7, %8, %9, 0, 128, 0, 2
%endm
%macro memcpy_avx2_128_1 9
__memcpy_int %1,%2,%3,%4,%5,%6,%7, %8, %9, 1, 128, 0, 2
%endm
%macro memcpy_avx2_64_ret 7
__memcpy_int %1,%2,%3,%4,%5,%6,%7,--,--, 0, 64, 1, 2
%endm
%macro memcpy_avx2_64_1_ret 7
__memcpy_int %1,%2,%3,%4,%5,%6,%7,--,--, 1, 64, 1, 2
%endm
%macro memcpy_avx2_128_ret 9
__memcpy_int %1,%2,%3,%4,%5,%6,%7,--,--, 0, 128, 1, 2
%endm
%macro memcpy_avx2_128_1_ret 9
__memcpy_int %1,%2,%3,%4,%5,%6,%7,--,--, 1, 128, 1, 2
%endm
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
%macro __memcpy_int 13
%define %%DST %1 ; register: pointer to dst (not modified)
%define %%SRC %2 ; register: pointer to src (not modified)
%define %%SIZE %3 ; register: length in bytes (not modified)
%define %%TMP0 %4 ; 64-bit temp GPR (clobbered)
%define %%TMP1 %5 ; 64-bit temp GPR (clobbered)
%define %%XTMP0 %6 ; temp XMM (clobbered)
%define %%XTMP1 %7 ; temp XMM (clobbered)
%define %%XTMP2 %8 ; temp XMM (clobbered)
%define %%XTMP3 %9 ; temp XMM (clobbered)
%define %%NOT0 %10 ; if not 0, then assume size cannot be zero
%define %%MAXSIZE %11 ; 128, 64, etc
%define %%USERET %12 ; if not 0, use "ret" at end
%define %%USEAVX %13 ; 0 = SSE, 1 = AVX1, 2 = AVX2
%if (%%USERET != 0)
%define %%DONE ret
%else
%define %%DONE jmp %%end
%endif
%if (%%USEAVX != 0)
%define %%MOVDQU vmovdqu
%else
%define %%MOVDQU movdqu
%endif
%if (%%MAXSIZE >= 128)
test %%SIZE, 64
jz %%lt64
%if (%%USEAVX >= 2)
%%MOVDQU %%XTMP0, [%%SRC + 0*32]
%%MOVDQU %%XTMP1, [%%SRC + 1*32]
%%MOVDQU %%XTMP2, [%%SRC + %%SIZE - 2*32]
%%MOVDQU %%XTMP3, [%%SRC + %%SIZE - 1*32]
%%MOVDQU [%%DST + 0*32], %%XTMP0
%%MOVDQU [%%DST + 1*32], %%XTMP1
%%MOVDQU [%%DST + %%SIZE - 2*32], %%XTMP2
%%MOVDQU [%%DST + %%SIZE - 1*32], %%XTMP3
%else
%%MOVDQU %%XTMP0, [%%SRC + 0*16]
%%MOVDQU %%XTMP1, [%%SRC + 1*16]
%%MOVDQU %%XTMP2, [%%SRC + 2*16]
%%MOVDQU %%XTMP3, [%%SRC + 3*16]
%%MOVDQU [%%DST + 0*16], %%XTMP0
%%MOVDQU [%%DST + 1*16], %%XTMP1
%%MOVDQU [%%DST + 2*16], %%XTMP2
%%MOVDQU [%%DST + 3*16], %%XTMP3
%%MOVDQU %%XTMP0, [%%SRC + %%SIZE - 4*16]
%%MOVDQU %%XTMP1, [%%SRC + %%SIZE - 3*16]
%%MOVDQU %%XTMP2, [%%SRC + %%SIZE - 2*16]
%%MOVDQU %%XTMP3, [%%SRC + %%SIZE - 1*16]
%%MOVDQU [%%DST + %%SIZE - 4*16], %%XTMP0
%%MOVDQU [%%DST + %%SIZE - 3*16], %%XTMP1
%%MOVDQU [%%DST + %%SIZE - 2*16], %%XTMP2
%%MOVDQU [%%DST + %%SIZE - 1*16], %%XTMP3
%endif
%%DONE
%endif
%if (%%MAXSIZE >= 64)
%%lt64
test %%SIZE, 32
jz %%lt32
%if (%%USEAVX >= 2)
%%MOVDQU %%XTMP0, [%%SRC + 0*32]
%%MOVDQU %%XTMP1, [%%SRC + %%SIZE - 1*32]
%%MOVDQU [%%DST + 0*32], %%XTMP0
%%MOVDQU [%%DST + %%SIZE - 1*32], %%XTMP1
%else
%%MOVDQU %%XTMP0, [%%SRC + 0*16]
%%MOVDQU %%XTMP1, [%%SRC + 1*16]
%%MOVDQU %%XTMP2, [%%SRC + %%SIZE - 2*16]
%%MOVDQU %%XTMP3, [%%SRC + %%SIZE - 1*16]
%%MOVDQU [%%DST + 0*16], %%XTMP0
%%MOVDQU [%%DST + 1*16], %%XTMP1
%%MOVDQU [%%DST + %%SIZE - 2*16], %%XTMP2
%%MOVDQU [%%DST + %%SIZE - 1*16], %%XTMP3
%endif
%%DONE
%endif
%if (%%MAXSIZE >= 32)
%%lt32:
test %%SIZE, 16
jz %%lt16
%if (%%USEAVX >= 2)
%%MOVDQU XWORD(%%XTMP0), [%%SRC + 0*16]
%%MOVDQU XWORD(%%XTMP1), [%%SRC + %%SIZE - 1*16]
%%MOVDQU [%%DST + 0*16], XWORD(%%XTMP0)
%%MOVDQU [%%DST + %%SIZE - 1*16], XWORD(%%XTMP1)
%else
%%MOVDQU %%XTMP0, [%%SRC + 0*16]
%%MOVDQU %%XTMP1, [%%SRC + %%SIZE - 1*16]
%%MOVDQU [%%DST + 0*16], %%XTMP0
%%MOVDQU [%%DST + %%SIZE - 1*16], %%XTMP1
%endif
%%DONE
%endif
%if (%%MAXSIZE >= 16)
%%lt16:
test %%SIZE, 8
jz %%lt8
mov %%TMP0, [%%SRC]
mov %%TMP1, [%%SRC + %%SIZE - 8]
mov [%%DST], %%TMP0
mov [%%DST + %%SIZE - 8], %%TMP1
%%DONE
%endif
%if (%%MAXSIZE >= 8)
%%lt8:
test %%SIZE, 4
jz %%lt4
mov DWORD(%%TMP0), [%%SRC]
mov DWORD(%%TMP1), [%%SRC + %%SIZE - 4]
mov [%%DST], DWORD(%%TMP0)
mov [%%DST + %%SIZE - 4], DWORD(%%TMP1)
%%DONE
%endif
%if (%%MAXSIZE >= 4)
%%lt4:
test %%SIZE, 2
jz %%lt2
movzx DWORD(%%TMP0), word [%%SRC]
movzx DWORD(%%TMP1), byte [%%SRC + %%SIZE - 1]
mov [%%DST], WORD(%%TMP0)
mov [%%DST + %%SIZE - 1], BYTE(%%TMP1)
%%DONE
%endif
%%lt2:
%if (%%NOT0 == 0)
test %%SIZE, 1
jz %%end
%endif
movzx DWORD(%%TMP0), byte [%%SRC]
mov [%%DST], BYTE(%%TMP0)
%%end:
%if (%%USERET != 0)
ret
%endif
%endm
%endif ; ifndef __MEMCPY_ASM__
| 28.867435 | 76 | 0.577818 |
29eee807ab92960762997005d644768b9957c7bd | 453 | asm | Assembly | programs/oeis/001/A001953.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/001/A001953.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/001/A001953.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A001953: a(n) = floor((n + 1/2) * sqrt(2)).
; 0,2,3,4,6,7,9,10,12,13,14,16,17,19,20,21,23,24,26,27,28,30,31,33,34,36,37,38,40,41,43,44,45,47,48,50,51,53,54,55,57,58,60,61,62,64,65,67,68,70,71,72,74,75,77,78,79,81,82,84,85,86,88,89,91,92,94,95,96,98,99,101,102,103,105,106,108,109,111,112,113,115,116,118,119,120,122,123,125,126,127,129,130,132,133,135,136,137,139,140
mov $1,$0
mul $0,2
pow $1,2
lpb $1
add $0,2
sub $1,1
trn $1,$0
lpe
div $0,2
| 34.846154 | 323 | 0.631347 |
b63b2a72412ac77a695bfeecf57d06f098b89ff3 | 6,122 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0xca_notsx.log_21829_215.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0xca_notsx.log_21829_215.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0xca_notsx.log_21829_215.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r12
push %r13
push %r14
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_D_ht+0x1a80a, %rsi
lea addresses_A_ht+0x27bc, %rdi
nop
nop
nop
nop
add $62536, %rdx
mov $103, %rcx
rep movsw
nop
nop
sub %rcx, %rcx
lea addresses_UC_ht+0x420e, %rsi
lea addresses_WT_ht+0x1b40a, %rdi
nop
nop
nop
sub $41301, %r13
mov $104, %rcx
rep movsq
nop
nop
nop
nop
xor $14668, %rdx
lea addresses_normal_ht+0x388a, %rsi
lea addresses_UC_ht+0xe20a, %rdi
add %r12, %r12
mov $60, %rcx
rep movsq
nop
nop
nop
nop
nop
xor $35939, %r13
lea addresses_normal_ht+0x974c, %rcx
clflush (%rcx)
mfence
mov (%rcx), %r12w
nop
and %rdx, %rdx
lea addresses_WC_ht+0x1b7ca, %rdx
clflush (%rdx)
nop
nop
nop
add $60752, %rsi
mov $0x6162636465666768, %r13
movq %r13, (%rdx)
nop
nop
nop
sub $57542, %r14
lea addresses_A_ht+0xee8a, %rcx
nop
nop
xor $7067, %rsi
mov $0x6162636465666768, %r13
movq %r13, %xmm7
and $0xffffffffffffffc0, %rcx
movntdq %xmm7, (%rcx)
nop
nop
nop
dec %r13
lea addresses_WC_ht+0x1484a, %rdi
clflush (%rdi)
nop
nop
and $1218, %r14
vmovups (%rdi), %ymm0
vextracti128 $0, %ymm0, %xmm0
vpextrq $0, %xmm0, %r12
nop
nop
nop
nop
nop
cmp %r14, %r14
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %r14
pop %r13
pop %r12
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r14
push %r15
push %rax
push %rbp
push %rdi
push %rsi
// Store
lea addresses_WT+0x7c8a, %rdi
sub %rbp, %rbp
mov $0x5152535455565758, %r11
movq %r11, %xmm3
vmovups %ymm3, (%rdi)
dec %rdi
// Faulty Load
lea addresses_WC+0x1468a, %rax
nop
nop
nop
nop
nop
sub $2965, %rsi
movb (%rax), %r15b
lea oracles, %r11
and $0xff, %r15
shlq $12, %r15
mov (%r11,%r15,1), %r15
pop %rsi
pop %rdi
pop %rbp
pop %rax
pop %r15
pop %r14
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'src': {'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 0, 'same': False, 'type': 'addresses_WC'}, 'OP': 'LOAD'}
{'dst': {'NT': False, 'AVXalign': False, 'size': 32, 'congruent': 0, 'same': False, 'type': 'addresses_WT'}, 'OP': 'STOR'}
[Faulty Load]
{'src': {'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 0, 'same': True, 'type': 'addresses_WC'}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'congruent': 2, 'same': False, 'type': 'addresses_D_ht'}, 'dst': {'congruent': 1, 'same': False, 'type': 'addresses_A_ht'}, 'OP': 'REPM'}
{'src': {'congruent': 2, 'same': True, 'type': 'addresses_UC_ht'}, 'dst': {'congruent': 5, 'same': False, 'type': 'addresses_WT_ht'}, 'OP': 'REPM'}
{'src': {'congruent': 8, 'same': False, 'type': 'addresses_normal_ht'}, 'dst': {'congruent': 7, 'same': True, 'type': 'addresses_UC_ht'}, 'OP': 'REPM'}
{'src': {'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 1, 'same': False, 'type': 'addresses_normal_ht'}, 'OP': 'LOAD'}
{'dst': {'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 5, 'same': True, 'type': 'addresses_WC_ht'}, 'OP': 'STOR'}
{'dst': {'NT': True, 'AVXalign': False, 'size': 16, 'congruent': 9, 'same': False, 'type': 'addresses_A_ht'}, 'OP': 'STOR'}
{'src': {'NT': False, 'AVXalign': False, 'size': 32, 'congruent': 5, 'same': False, 'type': 'addresses_WC_ht'}, 'OP': 'LOAD'}
{'38': 21829}
38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38
*/
| 38.993631 | 2,999 | 0.662365 |
e012519c90ebf1ad0d157b146e45a04676ecc687 | 291 | asm | Assembly | programs/oeis/155/A155607.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/155/A155607.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/155/A155607.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A155607: 9^n+3^n-1.
; 1,11,89,755,6641,59291,532169,4785155,43053281,387440171,3486843449,31381236755,282430067921,2541867422651,22876797237929,205891146443555,1853020231898561,16677181828806731,150094635684419609
mov $1,3
pow $1,$0
add $1,1
bin $1,2
sub $1,1
mul $1,2
add $1,1
mov $0,$1
| 24.25 | 193 | 0.773196 |
aa4f7f4f411bb6537eca6445385a9e8de9202d20 | 530 | asm | Assembly | oeis/338/A338550.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/338/A338550.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/338/A338550.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A338550: Number of binary trees of height n such that the number of nodes at depth d equals d+1 for every d = 0..n.
; Submitted by Jon Maiga
; 1,1,4,60,3360,705600,558835200,1678182105600,19198403288064000,840083731079104512000,141100463472046393835520000,91242050302344912388163665920000,227753296409896438988240405704212480000,2199573010737856838816729366169572868096000000,82356764599728553816070191604819734458909327360000000
mov $2,5
lpb $0
mov $1,$0
sub $0,1
mul $1,2
bin $1,$0
mul $2,$1
lpe
mov $0,$2
div $0,5
| 35.333333 | 288 | 0.8 |
c68592dfb65935c3e7c172d8a8ab53be1d43f19b | 8,314 | asm | Assembly | 45/runtime/rt/rttoul.asm | minblock/msdos | 479ffd237d9bb7cc83cb06361db2c4ef42dfbac0 | [
"Apache-2.0"
] | null | null | null | 45/runtime/rt/rttoul.asm | minblock/msdos | 479ffd237d9bb7cc83cb06361db2c4ef42dfbac0 | [
"Apache-2.0"
] | null | null | null | 45/runtime/rt/rttoul.asm | minblock/msdos | 479ffd237d9bb7cc83cb06361db2c4ef42dfbac0 | [
"Apache-2.0"
] | null | null | null | TITLE RTTOUL - Transfers control to user lib from runtime.
;***
;RTtoUL - Transfers control from QB runtime to UL specific runtime.
;
; Copyright <C> 1986, 1987, Microsoft Corporation
;
;Purpose:
; This module causes control transfers from the QB runtime
; to the user library specific runtime. This module is linked
; into QB.EXE and is used to interface with ULtoRT.asm which is
; linked into the user library.
;
;******************************************************************************
INCLUDE switch.inc
INCLUDE rmacros.inc
;
; Code Segments
;
USESEG <RT_TEXT>
;
; Data Segments
;
USESEG <_DATA>
USESEG <_BSS>
INCLUDE seg.inc
INCLUDE idmac.inc
externFP exStRunFile
externFP exStChain
sBegin _BSS
staticW retseg,,1
staticW retoff,,1
staticW SISave,,1
staticW DISave,,1
externW b$ULSymSeg
externW b$pULVars ;ptr to user lib vars
sEnd _BSS
; Macro to define code externs for UL to RT dispatch table
PURGE RTFar,RTFarOrg,RTNear,RTNearOrg,ULRTFar,ULRTNear,ULEntry
RTFar MACRO name
EXTRN &name:FAR
ENDM ;;RTFar Macro
FirstInclude = TRUE ;define ULVars on first include
INCLUDE ulib.inc
PURGE RTFar,RTFarOrg,RTNear,RTNearOrg,ULRTFar,ULRTNear,ULEntry
assumes CS,RT_TEXT
sBegin RT_TEXT
SUBTTL Compiler entry points handled by interpreter
;***
; Runtime entry points which are handled by the interpreter.
; B$SRUN - RUN entry point
; B$SCHN - CHAIN entry point
;****
cProc B$SRUN,<PUBLIC,FAR>
cBegin <nogen>
ADD SP,4 ; bash return address
JMP exStRunFile ;vector to QB RUN executor
cEnd <nogen>
cProc B$SCHN,<PUBLIC,FAR>
cBegin <nogen>
ADD SP,4 ; bash return address
JMP exStChain ;vector to QB CHAIN executor
cEnd <nogen>
PAGE
SUBTTL User lib RTM entry points
;***
; User library specific entry points (called from compiled code) which are
; present in user libraries.
; These entry points are equated to 0 in the RTM tables to signify
; that the entry point is in the user library. The real address will
; be looked up in a UL resident table.
;****
ULEntry MACRO name
PUBLIC &name ;
&name: ;
DbHalt RT_TEXT,<&name not defined in resident runtime - to call use ULRTFar in ULIB.INC> ;
ENDM
SUBTTL Interface from UL runtime to QB runtime
PAGE
;***
; B$ULtoRTNear - UL rt to resident rt near call mapper
;
;Purpose:
; This routine performs a near call to a requested
; near QB resident runtime routine. This is called
; when a user library specific runtime routine needs to
; call a QB resident runtime routine.
;
;Entry:
; SI - table offset from RTNearStart containing routine address
; Other regs as setup for requested routine (except for DI)
; (cannot be on stack).
;Exit:
; As returned by requested routine (cannot return values through DI).
;Uses:
; As defined by requested routine.
;Exceptions:
; As defined by requested routine.
;****
; Macro to define start of Near UL to RT table
RTNearOrg MACRO
RTNearStart:
ENDM ;;RTNearOrg
; Macro to define Near UL to RT table entry
RTNear MACRO name
EXTRN &name:NEAR
DW &name
ENDM ;;RTNear Macro
cProc B$ULtoRTNear,<PUBLIC,FAR>
cBegin
ADD DI,RT_TEXTOffset RTNearStart
CALL CS:[DI]
cEnd
PAGE
;***
; B$ULtoRTFar - UL rt to resident rt Far call mapper
;
;Purpose:
; This routine performs a far call to a requested
; far QB resident runtime routine. This is called
; when a user library specific runtime routine needs to
; call a QB resident runtime routine.
;
;Entry:
; BX - table offset from RTFarStart containing routine address
; Other regs as setup for requested routine (except for BX).
;Exit:
; As returned by requested routine.
;Uses:
; As defined by requested routine.
;Exceptions:
; As defined by requested routine.
;****
; Macro to define start of Far UL to RT table
RTFarOrg MACRO
RTFarStart:
ENDM ;;RTFarOrg
; Macro to define Far UL to RT table entry
RTFar MACRO name
DD &name
ENDM ;;RTFar Macro
cProc B$ULtoRTFar,<PUBLIC,FAR>
cBegin
ADD BX,RT_TEXTOffset RTFarStart
JMP DWORD PTR CS:[BX] ;jump to routine and let it do the far return
cEnd <nogen>
SUBTTL Interface from QB runtime to UL runtime
PAGE
;***
; CallULFar - perform a Far call to a UL specific runtime routine
;
;Purpose:
; This routine interfaces a Far resident runtime call to
; a UL specific runtime routine that is defined as Far.
; We set up an index into a UL resident table and call
; a far UL specific mapper with the index in AX. The
; mapper will then do a Far call to the requested routine.
;Entry:
; [b$pULVars].RTtoULFarProc - is the far address of the mapper.
; Parameters set up for requested routine. (Cannot be passed
; through BX-CX).
;Exit:
; return value of requested routine.
; DX:AX = 0 if no user lib loaded
;Uses:
; None.
;Exceptions:
; Defined by requested routine.
;****
FarIndex = 0
ULRTFar MACRO name, nParms
PUBLIC &name
&name:
.ERRE (FarIndex * 2) LE 255 ;;index no larger than 1 byte
.ERRE (nParms EQ 0) OR (nParms EQ 1) ;;CallULFar assumes 0 or 1 parm
MOV CX,(nParms SHL 8) + (FarIndex * 2) ;;get offset from ulib table
;; base(CL) num of parms(CH)
JMP CallULFar ;;jump to common code to call UL runtime
FarIndex = FarIndex + 1
ENDM ;;ULRTFar Macro
cProc CallULFar,<FAR>
cBegin <nogen>
CMP b$ULSymSeg,0 ;user lib around?
JZ NoUlib ;brif not
DbAssertRel b$pULVars,NZ,0,RT_TEXT,<Invalid b$pULVars in userlib (CallULFar)>
XOR CH,CH ;clear number of parms
MOV BX,[b$pULVars] ;get ptr to shared user lib variables
JMP DWORD PTR [BX].RTtoULFarProc ;jmp to RT to UL far call helper
NoUlib:
XOR AX,AX
CWD ;return DX:AX = 0 if no user lib loaded
MOV BX,AX ;return BX=0 also in case it's B$ULGetCommon
OR CH,CH ;any parms?
JZ NoParm ;brif not, just RETF
RET 2 ;else RETF and pop a parm
NoParm:
cEnd
PAGE
;***
; CallULNear - perform a near call to a UL specific runtime routine
;
;Purpose:
; This routine interfaces a near resident runtime call to
; a UL specific runtime routine that is defined as near.
; We set up an index into a UL resident table and call
; a far UL specific mapper with the index in SI. The
; mapper will then do a near call to the requested routine.
;Entry:
; [b$pULVars].RTtoULNearProc - is the far address of the mapper.
; Parameters set up for requested routine (cannot be on stack).
; Can't currently use SI or DI to pass to requested routine.
;Exit:
; return value of requested routine (Can't currently return SI or DI).
;Uses:
; None.
;Exceptions:
; Defined by requested routine.
;****
NearIndex = 0
ULRTNear MACRO name
PUBLIC &name
&name:
PUSH SI ;;preserve si
PUSH DI ;;preserve di
MOV DI,NearIndex * 2 ;;get offset from ulib table base
JMP SHORT CallULNear ;;jump to common code to call UL runtime
NearIndex = NearIndex + 1
ENDM ;;ULRTNear Macro
cProc CallULNear,<NEAR>
cBegin
DbAssertRel b$ULSymSeg,NZ,0,RT_TEXT,<Tried to call UL runtime routine when UL not present(CallULNear).>
DbAssertRel b$pULVars,NZ,0,RT_TEXT,<Invalid b$pULVars in userlib (CallULNear)>
MOV SI,[b$pULVars] ;get ptr to shared user lib variables
CALL DWORD PTR [SI].RTtoULNearProc ;call RT to UL near call helper
POP DI ;recover entry di
POP SI ;recover entry si
cEnd
;***
; Define interface routines to user library specific runtime.
;****
FirstInclude = FALSE ;don't define ULVars on second include
INCLUDE ulib.inc ;define entry points
PAGE
;***
;B$FRAMESETUP - set up initial stack frame for error handling.
;void pascal B$FRAMESETUP()
;
;Purpose:
; B$FrameSetup is defined in user library specific runtime.
; Since this is a critical routine with complex entry/exit
; conditions, it is defined seperately from the dispatches
; above.
;
;Entry:
; DX:AX = contains long pointer to start of user module.
; CL = value to which the GOSUB count should be set
;Exit:
; SP - points to stack after initial frame.
; BP - points to initial stack frame.
;Uses:
; BX.
;Exceptions:
; Out of memory. (Will vector to error handler with >old< frame, so that
; the error will be reported on the call, and not the SUB entry, for
; example).
;****
cProc B$FRAMESETUP,<PUBLIC,FAR>
cBegin <nogen>
DbAssertRel b$ULSymSeg,NZ,0,RT_TEXT,<Tried to call UL runtime routine when UL not present(B$FrameSetup)>
DbAssertRel b$pULVars,NZ,0,RT_TEXT,<Invalid b$pULVars in userlib (B$FrameSetup)>
MOV BX,[b$pULVars] ;get ptr to shared user lib variables
JMP DWORD PTR [BX].FrameSetup ;jmp to B$FrameSetup
cEnd <nogen>
sEnd RT_TEXT
END
| 26.227129 | 104 | 0.731537 |
e0b4a4ded724483cd25c51142d058934da5c7b86 | 4,491 | asm | Assembly | Transynther/x86/_processed/NC/_st_zr_un_/i9-9900K_12_0xa0.log_21829_1205.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NC/_st_zr_un_/i9-9900K_12_0xa0.log_21829_1205.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NC/_st_zr_un_/i9-9900K_12_0xa0.log_21829_1205.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
ret
.global s_faulty_load
s_faulty_load:
push %r12
push %r13
push %r14
push %r15
push %r8
push %rcx
push %rdi
// Store
lea addresses_normal+0x1b2ba, %r13
nop
nop
nop
and %r15, %r15
movw $0x5152, (%r13)
nop
nop
nop
and $5006, %rcx
// Store
mov $0x650d100000000b2a, %rcx
nop
nop
nop
dec %r12
movb $0x51, (%rcx)
nop
cmp $51291, %r14
// Store
lea addresses_US+0x1452a, %rdi
nop
nop
nop
nop
nop
cmp $44566, %rcx
movl $0x51525354, (%rdi)
and $60224, %r8
// Faulty Load
mov $0x7fed000000000d2a, %r13
nop
nop
nop
nop
dec %rcx
movups (%r13), %xmm2
vpextrq $1, %xmm2, %r12
lea oracles, %rdi
and $0xff, %r12
shlq $12, %r12
mov (%rdi,%r12,1), %r12
pop %rdi
pop %rcx
pop %r8
pop %r15
pop %r14
pop %r13
pop %r12
ret
/*
<gen_faulty_load>
[REF]
{'src': {'NT': False, 'same': False, 'congruent': 0, 'type': 'addresses_NC', 'AVXalign': False, 'size': 8}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 0, 'type': 'addresses_normal', 'AVXalign': False, 'size': 2}}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 8, 'type': 'addresses_NC', 'AVXalign': False, 'size': 1}}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 11, 'type': 'addresses_US', 'AVXalign': False, 'size': 4}}
[Faulty Load]
{'src': {'NT': False, 'same': True, 'congruent': 0, 'type': 'addresses_NC', 'AVXalign': False, 'size': 16}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'72': 1, '38': 27, '08': 128, '00': 21579, '3c': 94}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 38 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 38 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 38 38 38 38 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
| 54.108434 | 2,999 | 0.656201 |
47856f45f0c25284ced378ced15ad764cc9451ad | 582 | asm | Assembly | oeis/085/A085730.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/085/A085730.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/085/A085730.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A085730: Euler's totient function applied to the sequence of prime powers.
; Submitted by Christian Krause
; 1,1,2,2,4,6,4,6,10,12,8,16,18,22,20,18,28,30,16,36,40,42,46,42,52,58,60,32,66,70,72,78,54,82,88,96,100,102,106,108,112,110,100,126,64,130,136,138,148,150,156,162,166,156,172,178,180,190,192,196,198,210,222,226,228,232,238,240,162,250,128,256,262,268,270,276,280,282,272,292,306,310,312,316,330,336,294,346,348,352,358,342,366,372,378,382,388,396,400,408
seq $0,181062 ; Prime powers minus 1.
seq $0,10 ; Euler totient function phi(n): count numbers <= n and prime to n.
| 83.142857 | 355 | 0.725086 |
b1fa158685af46b606f79294b1b6095267c757e5 | 296 | asm | Assembly | programs/oeis/186/A186294.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/186/A186294.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/186/A186294.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A186294: (A007519(n)+1)/2.
; 9,21,37,45,49,57,69,97,117,121,129,141,157,169,177,201,205,217,225,229,261,285,289,297,301,309,321,337,381,385,405,429,441,465,469,477,489,505,517,525,549,565,577,597,601,609,625,645,649,661,681
seq $0,5123 ; Numbers n such that 8n + 1 is prime.
mul $0,4
add $0,1
| 42.285714 | 196 | 0.692568 |
a23da1102de4a77724a9b5a68c2a39253a02bc0f | 501 | asm | Assembly | programs/oeis/332/A332699.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/332/A332699.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/332/A332699.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A332699: First row of A332662, also main diagonal of A332667.
; 0,2,3,7,8,9,16,17,18,19,30,31,32,33,34,50,51,52,53,54,55,77,78,79,80,81,82,83,112,113,114,115,116,117,118,119,156,157,158,159,160,161,162,163,164,210,211,212,213,214,215,216,217,218,219,275,276,277,278
mov $2,$0
mov $4,$0
lpb $2
mov $0,$4
sub $2,1
sub $0,$2
mov $3,$0
mov $5,0
lpb $0
add $3,1
lpb $0
add $5,1
sub $0,$5
lpe
lpe
lpb $0
mov $0,$6
pow $3,$6
lpe
add $1,$3
lpe
mov $0,$1
| 19.269231 | 203 | 0.578842 |
91b52274105d815da8e60cc61503b35c44caee4b | 2,779 | asm | Assembly | dv3/qlsd/addfd.asm | olifink/smsqe | c546d882b26566a46d71820d1539bed9ea8af108 | [
"BSD-2-Clause"
] | null | null | null | dv3/qlsd/addfd.asm | olifink/smsqe | c546d882b26566a46d71820d1539bed9ea8af108 | [
"BSD-2-Clause"
] | null | null | null | dv3/qlsd/addfd.asm | olifink/smsqe | c546d882b26566a46d71820d1539bed9ea8af108 | [
"BSD-2-Clause"
] | null | null | null | ; DV3 Add Format Dependent Vector V3.00 1992 Tony Tebby
; for qlsd : don't use DV3 thing "create" one address returned in D7
section dv3
xdef dv3_addfd
xref gu_thuse
xref gu_thfre
xref gu_achpp
xref gu_rchp
include 'dev8_dv3_keys'
include 'dev8_mac_assert'
;+++
; This is the routine that is used to add one or more new format dependent
; vectors.
;
; a1 c p pointer to format dependent vector list
;
; d7 r pointer to "thing" ******
;
; Status return standard
; This is a clean routine
;---
dv3_addfd
moveq #0,d0
daf_do
daf.reg reg d1/d2/d6/a0/a1/a2/a3
movem.l daf.reg,-(sp)
move.l a1,a3 ; two copies of new list
move.l a1,a2
move.l d0,d6
; *****
moveq #$60,d0 ; create "thing"
jsr gu_achpp
move.l a0,a1
move.l a0,d7
; *****
move.w sr,d0
trap #0
move.w d0,-(sp) ; supervisor mode for this
; *******
; lea dv3_name,a0 ; use thing
; jsr gu_thuse ; use it
; bne.s daf_user ; how can this happen?
; *******
moveq #-1,d1 ; highest format
moveq #0,d0 ; ***** d0 is already 0
daf_cklp
assert fdv_next,0
add.w d0,a3 ; next vector
cmp.b fdv_ftype(a3),d1 ; highest type so far
bge.s daf_cknxt ; ... no
move.b fdv_ftype(a3),d1
daf_cknxt
move.w fdv_next(a3),d0 ; offset to next vector
bne.s daf_cklp
ext.w d1
cmp.w dv3_fdmax(a1),d1 ; room for these vectors?
ble.s daf_link ; ... yes
move.w d1,d0
addq.w #1,d0 : +1
lsl.w #2,d0 ; four bytes per fdv (upper D0 is zero)
jsr gu_achpp
bne.s daf_free
move.l dv3_fdtab(a1),a3 ; old table
move.l a0,dv3_fdtab(a1) ; set new table address
move.w dv3_fdmax(a1),d2 ; old table length
move.w d1,dv3_fdmax(a1) ; set new length
move.l a3,d0 ; old table
beq.s daf_link ; ... none
bra.s daf_cpelp
daf_cplp
move.l (a3)+,(a0)+ ; copy pointers
daf_cpelp
dbra d2,daf_cplp
move.l d0,a0
jsr gu_rchp ; return old table
daf_link
move.l dv3_fdtab(a1),a0
daf_lklp
assert fdv_next,0
add.w d0,a2 ; next vector
moveq #0,d1
move.b fdv_ftype(a2),d1 ; this type
lsl.w #2,d1
tst.b d6 ; remove or add?
beq.s daf_rep ; add (replace existing entry)
cmp.l (a0,d1.w),a3 ; remove, is this the same?
bne.s daf_lknxt ; ... no
bsr.s daf_zap ; ... yes, zap it
bra.s daf_lknxt
daf_rep
tst.l (a0,d1.w) ; this FDV in use
beq.s daf_add
bsr.s daf_zap ; ... zap old entry
daf_add
move.l a2,(a0,d1.w) ; add new entry
daf_lknxt
move.w fdv_next(a2),d0 ; offset to next vector
bne.s daf_lklp
daf_free
; lea dv3_name,a0 ; use thing
; jsr gu_thfre ; free thing
daf_user
move.w (sp)+,sr
tst.l d0
daf_exit
movem.l (sp)+,daf.reg
rts
;**** zap an entry in the FDV table
;**** now we have problem, we need the tidy up drive definition blocks etc
daf_zap
clr.l (a0,d1.w) ; zap entry
rts
end
| 19.165517 | 74 | 0.650594 |
d04a7c617d07930b09b5a7d9164c83476e83c9cf | 281 | asm | Assembly | src/patch.asm | Pheenoh/TwilightPrincessDebugMenu | 4e2959aedf1d6bcc4bb7902a5d75d5b4758fbe57 | [
"MIT"
] | 6 | 2018-08-15T22:42:38.000Z | 2020-12-13T08:49:35.000Z | src/patch.asm | Pheenoh/TwilightPrincessDebugMenu | 4e2959aedf1d6bcc4bb7902a5d75d5b4758fbe57 | [
"MIT"
] | 14 | 2018-10-22T20:47:10.000Z | 2020-05-01T17:06:01.000Z | src/patch.asm | Pheenoh/TwilightPrincessDebugMenu | 4e2959aedf1d6bcc4bb7902a5d75d5b4758fbe57 | [
"MIT"
] | 1 | 2019-09-01T21:38:35.000Z | 2019-09-01T21:38:35.000Z | [cDyl_InitAsync()] + 0x30:
b init_once
0x8033a0b0:
; lis r3, 0x8050 ; set Arena low to 0x80507be0
; with inject at 0x80460000 gives us 0xA7BE0 bytes
u32 0x3c608050
0x802e7648:
b draw
0x80006444:
bl game_loop
bl fapGm_Execute()
bl mDoAud_Execute()
0x8034f19c:
b read_controller
| 14.789474 | 50 | 0.779359 |
e7f9ecb771cfdb53f137027d92e41f69c963e9e2 | 509 | asm | Assembly | test/sigsub.asm | kspalaiologos/asmbf | c98a51d61724a46855de291a27d68a49a034810b | [
"MIT"
] | 67 | 2020-08-03T06:26:35.000Z | 2022-03-24T19:50:51.000Z | test/sigsub.asm | pyautogui/asmbf | 37c54a8a62df2fc4bab28bdeb43237b4905cbecd | [
"MIT"
] | 55 | 2019-10-02T19:37:08.000Z | 2020-06-12T19:40:53.000Z | test/sigsub.asm | pyautogui/asmbf | 37c54a8a62df2fc4bab28bdeb43237b4905cbecd | [
"MIT"
] | 9 | 2019-05-18T11:59:41.000Z | 2020-06-21T20:40:25.000Z |
mov r1, $(signed(-3))
mov r2, $(signed(-2))
s06 r1, r2
eq r1, 3
add r1, .0
out r1
mov r1, $(signed(-3))
mov r2, $(signed(2))
s06 r1, r2
eq r1, $(0xB)
add r1, .0
out r1
mov r1, $(signed(3))
mov r2, $(signed(-2))
s06 r1, r2
eq r1, $(0xA)
add r1, .0
out r1
mov r1, $(signed(3))
mov r2, $(signed(2))
s06 r1, r2
eq r1, 2
add r1, .0
out r1
mov r1, $(signed(-2))
mov r2, $(signed(-3))
s06 r1, r2
eq r1, 2
add r1, .0
out r1
mov r1, $(signed(2))
mov r2, $(signed(3))
s06 r1, r2
eq r1, 3
add r1, .0
out r1
| 10.18 | 21 | 0.561886 |
ae1ae0dcb0b061d177e80aa93dea1441748a25f1 | 5,520 | asm | Assembly | Transynther/x86/_processed/AVXALIGN/_zr_/i7-7700_9_0x48.log_21829_2394.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/AVXALIGN/_zr_/i7-7700_9_0x48.log_21829_2394.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/AVXALIGN/_zr_/i7-7700_9_0x48.log_21829_2394.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r15
push %rbp
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_WT_ht+0xe8fa, %rbp
nop
nop
nop
nop
nop
and %r11, %r11
mov (%rbp), %cx
xor %rbp, %rbp
lea addresses_WT_ht+0x15aba, %rsi
lea addresses_WT_ht+0x1ad3a, %rdi
clflush (%rsi)
clflush (%rdi)
nop
nop
cmp %r11, %r11
mov $111, %rcx
rep movsq
and %rcx, %rcx
lea addresses_UC_ht+0x130fa, %r15
nop
nop
nop
nop
cmp %rcx, %rcx
movw $0x6162, (%r15)
nop
nop
and $56984, %r15
lea addresses_WC_ht+0x1e4fa, %rcx
nop
nop
nop
nop
nop
xor $8635, %rdx
movups (%rcx), %xmm2
vpextrq $0, %xmm2, %rsi
nop
nop
xor %rdi, %rdi
lea addresses_D_ht+0x1a8fa, %rbp
add $18273, %rsi
movb $0x61, (%rbp)
nop
nop
and $49340, %rcx
lea addresses_UC_ht+0xd0fa, %rdi
nop
nop
nop
and %rbp, %rbp
movw $0x6162, (%rdi)
dec %rbp
lea addresses_WT_ht+0x1381a, %rdi
nop
add %rdx, %rdx
mov (%rdi), %r15w
inc %rcx
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbp
pop %r15
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r13
push %r15
push %rax
push %rdx
push %rsi
// Faulty Load
lea addresses_WC+0x148fa, %r15
clflush (%r15)
nop
nop
nop
add $44836, %rsi
mov (%r15), %r11w
lea oracles, %rax
and $0xff, %r11
shlq $12, %r11
mov (%rax,%r11,1), %r11
pop %rsi
pop %rdx
pop %rax
pop %r15
pop %r13
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'type': 'addresses_WC', 'AVXalign': False, 'congruent': 0, 'size': 32, 'same': False, 'NT': False}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'type': 'addresses_WC', 'AVXalign': False, 'congruent': 0, 'size': 2, 'same': True, 'NT': True}}
<gen_prepare_buffer>
{'OP': 'LOAD', 'src': {'type': 'addresses_WT_ht', 'AVXalign': True, 'congruent': 10, 'size': 2, 'same': False, 'NT': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_WT_ht', 'congruent': 6, 'same': False}, 'dst': {'type': 'addresses_WT_ht', 'congruent': 5, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_UC_ht', 'AVXalign': False, 'congruent': 11, 'size': 2, 'same': True, 'NT': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_WC_ht', 'AVXalign': False, 'congruent': 4, 'size': 16, 'same': False, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_D_ht', 'AVXalign': False, 'congruent': 11, 'size': 1, 'same': False, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_UC_ht', 'AVXalign': False, 'congruent': 8, 'size': 2, 'same': False, 'NT': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_WT_ht', 'AVXalign': False, 'congruent': 4, 'size': 2, 'same': False, 'NT': False}}
{'00': 21829}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
| 44.516129 | 2,999 | 0.656522 |
996f07e0fbdc6de0a601ed916244a781ce0420ca | 173 | asm | Assembly | data/pokemon/dex_entries/magmortar.asm | AtmaBuster/pokeplat-gen2 | fa83b2e75575949b8f72cb2c48f7a1042e97f70f | [
"blessing"
] | 6 | 2021-06-19T06:41:19.000Z | 2022-02-15T17:12:33.000Z | data/pokemon/dex_entries/magmortar.asm | AtmaBuster/pokeplat-gen2-old | 01e42c55db5408d72d89133dc84a46c699d849ad | [
"blessing"
] | null | null | null | data/pokemon/dex_entries/magmortar.asm | AtmaBuster/pokeplat-gen2-old | 01e42c55db5408d72d89133dc84a46c699d849ad | [
"blessing"
] | 3 | 2021-01-15T18:45:40.000Z | 2021-10-16T03:35:27.000Z | db "BLAST@" ; species name
db "It will blast"
next "fireballs of over"
next "3,600 degrees"
page "fahrenheit out of"
next "its arms. Its"
next "breath sizzles.@"
| 17.3 | 27 | 0.66474 |
932db6453d501b3f60b798fdcba4b6e100500815 | 556 | asm | Assembly | oeis/017/A017208.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/017/A017208.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/017/A017208.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A017208: a(n) = (9*n + 3)^12.
; 531441,8916100448256,7355827511386641,531441000000000000,12381557655576425121,149587343098087735296,1176246293903439668001,6831675453247426400256,31676352024078369140625,123410307017276135571456,418596297479370673535601,1268241794562545318301696,3498450596935634189769921,8916100448256000000000000,21236186150528020865123841,47703367363695867545849856,101814121186119595835681841,207728067204059288762843136,407199588611568593994140625,770177770297334467043659776,1410629873249683485564270561
mul $0,9
add $0,3
pow $0,12
| 79.428571 | 494 | 0.902878 |
7ca2496414fa47de5e1420a5c9af6736432f5c87 | 168 | asm | Assembly | kernel/include/kernel.asm | Mcpg/cmike | 4a9494d6394ff9f48c629801275d3049c8fce199 | [
"MIT"
] | 4 | 2020-01-20T20:55:17.000Z | 2022-01-09T23:27:26.000Z | kernel/include/kernel.asm | Mcpg/cmike | 4a9494d6394ff9f48c629801275d3049c8fce199 | [
"MIT"
] | 8 | 2019-11-16T20:11:14.000Z | 2019-11-16T20:19:32.000Z | kernel/include/kernel.asm | Mcpg/cmike | 4a9494d6394ff9f48c629801275d3049c8fce199 | [
"MIT"
] | 1 | 2020-01-20T20:55:20.000Z | 2020-01-20T20:55:20.000Z | %ifndef _KERNEL_ASM
%define _KERNEL_ASM
%ifndef OS_SEGMENT
%define OS_SEGMENT 0x2000
%endif
%ifndef OS_STACK_SIZE
%define OS_STACK_SIZE 2048
%endif
%endif | 14 | 27 | 0.767857 |
be98b5a0ab861d1387e4be3d093877e7151b50be | 599 | asm | Assembly | artwork/music/parasol_a.mus.asm | fjpena/genesis-zx | 78ec682415f51179e928fe37bd75c6f1e75d987a | [
"MIT"
] | 3 | 2019-04-08T06:33:11.000Z | 2022-01-08T09:19:49.000Z | src/parasol_a.mus.asm | fjpena/genesis-zx | 78ec682415f51179e928fe37bd75c6f1e75d987a | [
"MIT"
] | null | null | null | src/parasol_a.mus.asm | fjpena/genesis-zx | 78ec682415f51179e928fe37bd75c6f1e75d987a | [
"MIT"
] | null | null | null | PAUTA_1: DB $20+11,0,10,0,9,0,9,0,8,0,8,0,129
PAUTA_2: DB 8,0,74,0,11,0,43,0,10,0,72,1,8,-1,40,1,8,-1,132
PAUTA_3: DB 4,0,71,0,8,0,40,0,8,0,70,0,5,1,37,-1,5,1,69,-1,132
PAUTA_4: DB $40+9,0,11,0,11,0,10,0,9,0,8,0,7,-1,7,0,7,1,7,1,7,0,7,-1,128+6
PAUTA_5: DB $40+7,1,7,-1,6,1,6,-1,5,1,5,0,5,-1,5,-1,5,0,5,1,128+6
PAUTA_6: DB 7,0,8,0,9,0,8,0,7,0,6,0,129
PAUTA_7: DB 68,0,5,0,5,0,4,0,3,0,3,0,3,0,128+1
SONIDO1: DB 209,62,0,69,171,0,255
SONIDO2: DB 23,61,0,93,90,6,0,9,3,255
SONIDO3: DB 0,10,1,0,6,1,255
SONIDO4: DB 186,58,0,0,102,0,162,131,0,255
SONIDO5: DB 12,63,0,186,108,6,186,185,4,255
| 42.785714 | 75 | 0.599332 |
19848d0009368ead4a7c796e6a801d1e83fdd55d | 695 | asm | Assembly | oeis/000/A000749.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/000/A000749.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/000/A000749.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A000749: a(n) = 4*a(n-1) - 6*a(n-2) + 4*a(n-3), n > 3, with a(0)=a(1)=a(2)=0, a(3)=1.
; Submitted by Jamie Morken(s1.)
; 0,0,0,1,4,10,20,36,64,120,240,496,1024,2080,4160,8256,16384,32640,65280,130816,262144,524800,1049600,2098176,4194304,8386560,16773120,33550336,67108864,134225920,268451840,536887296,1073741824,2147450880,4294901760,8589869056,17179869184,34359869440,68719738880,137439215616,274877906944,549755289600,1099510579200,2199022206976,4398046511104,8796095119360,17592190238720,35184376283136,70368744177664,140737479966720,281474959933440,562949936644096,1125899906842624,2251799847239680
mov $3,$0
add $0,1
lpb $0
sub $0,4
mov $2,$3
bin $2,$0
add $1,$2
lpe
mov $0,$1
| 49.642857 | 485 | 0.766906 |
62873dc0a81fa5116f5c39482ff8c6d9a259184d | 67 | asm | Assembly | Src/Ant32/x.asm | geoffthorpe/ant-architecture | d85952e3050c352d5d715d9749171a335e6768f7 | [
"BSD-3-Clause"
] | null | null | null | Src/Ant32/x.asm | geoffthorpe/ant-architecture | d85952e3050c352d5d715d9749171a335e6768f7 | [
"BSD-3-Clause"
] | null | null | null | Src/Ant32/x.asm | geoffthorpe/ant-architecture | d85952e3050c352d5d715d9749171a335e6768f7 | [
"BSD-3-Clause"
] | 1 | 2020-07-15T04:09:05.000Z | 2020-07-15T04:09:05.000Z |
bezi ze, $foo
bezi ze, $foo
bezi ze, $foo
bezi ze, $foo
foo:
| 8.375 | 14 | 0.58209 |
765dcb04e479664e0f905a57cd5e6d5a0b51653b | 124 | asm | Assembly | CS442/Assignment2/asmCode.asm | BookerLoL/UWLCourses | 2281f147218475a9d289541edcf8d27d6af7c0ef | [
"MIT"
] | null | null | null | CS442/Assignment2/asmCode.asm | BookerLoL/UWLCourses | 2281f147218475a9d289541edcf8d27d6af7c0ef | [
"MIT"
] | null | null | null | CS442/Assignment2/asmCode.asm | BookerLoL/UWLCourses | 2281f147218475a9d289541edcf8d27d6af7c0ef | [
"MIT"
] | 1 | 2021-11-23T00:49:06.000Z | 2021-11-23T00:49:06.000Z | 1. int num1;
2. int num2;
3. num1 = 5 + 5;
4. num2 = 20 * 3 + num1 - num1;
5. num2 = num2 / 2;
6. print num1;
7. print num2; | 17.714286 | 31 | 0.556452 |
43ce8221ddb6e84ef83245a8eb47f4863de2abba | 101 | asm | Assembly | projects/vmt/scratch/and.asm | RobertCurry0216/nand2tetris | 5be3e68b921561f9358b28876e1573b093f1244b | [
"MIT"
] | null | null | null | projects/vmt/scratch/and.asm | RobertCurry0216/nand2tetris | 5be3e68b921561f9358b28876e1573b093f1244b | [
"MIT"
] | null | null | null | projects/vmt/scratch/and.asm | RobertCurry0216/nand2tetris | 5be3e68b921561f9358b28876e1573b093f1244b | [
"MIT"
] | null | null | null | // and
// load top of stack into D
@SP
AM=M-1
D=M
// dec sp
A=A-1
// and top of stack and D
M=D&M
| 7.769231 | 27 | 0.574257 |
85c12fa1539e7d360664757b622574c567ae46ad | 146 | asm | Assembly | libsrc/_DEVELOPMENT/math/float/math48/lm/c/sdcc_iy/___fsgt_callee.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 640 | 2017-01-14T23:33:45.000Z | 2022-03-30T11:28:42.000Z | libsrc/_DEVELOPMENT/math/float/math48/lm/c/sdcc_iy/___fsgt_callee.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 1,600 | 2017-01-15T16:12:02.000Z | 2022-03-31T12:11:12.000Z | libsrc/_DEVELOPMENT/math/float/math48/lm/c/sdcc_iy/___fsgt_callee.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 215 | 2017-01-17T10:43:03.000Z | 2022-03-23T17:25:02.000Z |
SECTION code_clib
SECTION code_fp_math48
PUBLIC ___fsgt_callee
EXTERN cm48_sdcciyp_dsgt_callee
defc ___fsgt_callee = cm48_sdcciyp_dsgt_callee
| 14.6 | 46 | 0.883562 |
b8340d0ecce3d423f6ff66c98a87bfddae572ad7 | 2,062 | asm | Assembly | programs/oeis/008/A008487.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/008/A008487.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/008/A008487.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A008487: Expansion of (1-x^5) / (1-x)^5.
; 1,5,15,35,70,125,205,315,460,645,875,1155,1490,1885,2345,2875,3480,4165,4935,5795,6750,7805,8965,10235,11620,13125,14755,16515,18410,20445,22625,24955,27440,30085,32895,35875,39030,42365,45885,49595,53500,57605,61915,66435,71170,76125,81305,86715,92360,98245,104375,110755,117390,124285,131445,138875,146580,154565,162835,171395,180250,189405,198865,208635,218720,229125,239855,250915,262310,274045,286125,298555,311340,324485,337995,351875,366130,380765,395785,411195,427000,443205,459815,476835,494270,512125,530405,549115,568260,587845,607875,628355,649290,670685,692545,714875,737680,760965,784735,808995,833750,859005,884765,911035,937820,965125,992955,1021315,1050210,1079645,1109625,1140155,1171240,1202885,1235095,1267875,1301230,1335165,1369685,1404795,1440500,1476805,1513715,1551235,1589370,1628125,1667505,1707515,1748160,1789445,1831375,1873955,1917190,1961085,2005645,2050875,2096780,2143365,2190635,2238595,2287250,2336605,2386665,2437435,2488920,2541125,2594055,2647715,2702110,2757245,2813125,2869755,2927140,2985285,3044195,3103875,3164330,3225565,3287585,3350395,3414000,3478405,3543615,3609635,3676470,3744125,3812605,3881915,3952060,4023045,4094875,4167555,4241090,4315485,4390745,4466875,4543880,4621765,4700535,4780195,4860750,4942205,5024565,5107835,5192020,5277125,5363155,5450115,5538010,5626845,5716625,5807355,5899040,5991685,6085295,6179875,6275430,6371965,6469485,6567995,6667500,6768005,6869515,6972035,7075570,7180125,7285705,7392315,7499960,7608645,7718375,7829155,7940990,8053885,8167845,8282875,8398980,8516165,8634435,8753795,8874250,8995805,9118465,9242235,9367120,9493125,9620255,9748515,9877910,10008445,10140125,10272955,10406940,10542085,10678395,10815875,10954530,11094365,11235385,11377595,11521000,11665605,11811415,11958435,12106670,12256125,12406805,12558715,12711860,12866245
mov $1,$0
mov $3,$0
mov $4,2
lpb $0,1
add $3,2
add $3,$2
add $2,4
add $2,$0
sub $0,1
sub $2,4
add $4,$1
sub $4,1
add $3,$4
lpe
add $0,$3
trn $0,1
add $0,1
trn $1,$0
add $1,$0
| 89.652174 | 1,824 | 0.819593 |
94210ce2513ea90484c5ad42bd79b68fcdbe4de4 | 2,114 | asm | Assembly | 3rdParties/src/nasm/nasm-2.15.02/travis/test/fwdoptpp.asm | blue3k/StormForge | 1557e699a673ae9adcc8f987868139f601ec0887 | [
"Apache-2.0"
] | 1 | 2020-06-20T07:35:25.000Z | 2020-06-20T07:35:25.000Z | 3rdParties/src/nasm/nasm-2.15.02/travis/test/fwdoptpp.asm | blue3k/StormForge | 1557e699a673ae9adcc8f987868139f601ec0887 | [
"Apache-2.0"
] | null | null | null | 3rdParties/src/nasm/nasm-2.15.02/travis/test/fwdoptpp.asm | blue3k/StormForge | 1557e699a673ae9adcc8f987868139f601ec0887 | [
"Apache-2.0"
] | null | null | null | %ifndef ERROR
%ifndef FATAL
%ifndef WARNING
%define ERROR 1
%endif
%endif
%endif
n0: jmp n1
n1: jmp n2
n2: jmp n3
n3: jmp n4
n4: jmp n5
n5: jmp n6
n6: jmp n7
n7: jmp n8
n8: jmp n9
n9: jmp n10
n10: jmp n11
n11: jmp n12
n12: jmp n13
n13: jmp n14
n14: jmp n15
n15: jmp n16
n16: jmp n17
n17: jmp n18
n18: jmp n19
n19: jmp n20
n20: jmp n21
n21: jmp n22
n22: jmp n23
n23: jmp n24
n24: jmp n25
n25: jmp n26
n26: jmp n27
n27: jmp n28
n28: jmp n29
n29: jmp n30
n30: jmp n31
n31: jmp n32
n32: jmp n33
n33: jmp n34
n34: jmp n35
n35: jmp n36
n36: jmp n37
n37: jmp n38
n38: jmp n39
n39: jmp n40
n40: jmp n41
n41: jmp n42
n42: jmp n43
n43: jmp n44
n44: jmp n45
n45: jmp n46
n46: jmp n47
n47: jmp n48
n48: jmp n49
n49: jmp n50
n50: jmp n51
n51: jmp n52
n52: jmp n53
n53: jmp n54
n54: jmp n55
n55: jmp n56
n56: jmp n57
n57: jmp n58
n58: jmp n59
n59: jmp n60
n60: jmp n61
n61: jmp n62
n62: jmp n63
n63: jmp n64
n64: jmp n65
n65: jmp n66
n66: jmp n67
n67: jmp n68
n68: jmp n69
n69: jmp n70
n70: jmp n71
n71: jmp n72
n72: jmp n73
n73: jmp n74
n74: jmp n75
n75: jmp n76
n76: jmp n77
n77: jmp n78
n78: jmp n79
n79: jmp n80
n80: jmp n81
n81: jmp n82
n82: jmp n83
n83: jmp n84
n84: jmp n85
n85: jmp n86
n86: jmp n87
n87: jmp n88
n88: jmp n89
n89: jmp n90
n90: jmp n91
n91: jmp n92
n92: jmp n93
n93: jmp n94
n94: jmp n95
n95: jmp n96
n96: jmp n97
n97: jmp n98
n98: jmp n99
n99: jmp n100
n100: jmp n101
n101: jmp n102
n102: jmp n103
n103: jmp n104
n104: jmp n105
n105: jmp n106
n106: jmp n107
n107: jmp n108
n108: jmp n109
n109: jmp n110
n110: jmp n111
n111: jmp n112
n112: jmp n113
n113: jmp n114
n114: jmp n115
n115: jmp n116
n116: jmp n117
n117: jmp n118
n118: jmp n119
n119: jmp n120
n120: jmp n121
n121: jmp n122
n122: jmp n123
n123: jmp n124
n124: jmp n125
n125: jmp n126
n126: jmp n127
n127: jmp n0
%if ($-$$) > 257
%ifdef FATAL
%fatal "Out of space!"
%elifdef ERROR
%error "Out of space!"
%elifdef WARNING
%warning "Out of space!"
%endif
%endif
| 14.380952 | 29 | 0.637654 |
89751060f8cc58d6064f591494eea491c04031c2 | 2,085 | asm | Assembly | Version-3/boot/disk_read.asm | AaronV77/Friday | 1f4c32a01859738b8b7193f655322ac5454e4d52 | [
"MIT"
] | null | null | null | Version-3/boot/disk_read.asm | AaronV77/Friday | 1f4c32a01859738b8b7193f655322ac5454e4d52 | [
"MIT"
] | null | null | null | Version-3/boot/disk_read.asm | AaronV77/Friday | 1f4c32a01859738b8b7193f655322ac5454e4d52 | [
"MIT"
] | null | null | null | ; This file will be used to read in sectors from the disk
; - and load them into memory for us. If there is an error
; - with the read then we make sure to print a message out
; - to the user.
[bits 16] ; Tell our assembler to use 16-bits.
disk_read:
pusha ; Store all the general purpose registers (edi,esi,ebp,esp,ebx,edx,ecx,eax).
push dx ; Save the dx register because it is not a general purpose register so that
; - our kernel offset does not get lost / trashed.
mov ah, 0x02 ; Call the subroutine for reading sectors.
mov al, dh ; Give the ALU register how many sectors we will be reading in.
mov ch, 0x00 ; Load the cylinder number in.
mov cl, 0x02 ; Give the starting sector number to read from. We use the second sector because the first
; - one was our MBR.
mov dh, 0x00 ; Load in the head number in.
int 0x13 ; Call the interupt INT 13 / AH = 02 to read the sectors from the disk and put into memory.
jc disk_read_error ; If the carry flag is set because of an error, then go to the disk_read_error procedure.
pop dx ; Return of dx value that is not a general purpose register.
cmp dh, al ; Do a compare to see if the correct number of sectors were read in.
jne disk_read_error ; If the previous line did not match then call the disk_read_error procedure.
popa ; Restore all the previous general purpose registers (edi,esi,ebp,esp,ebx,edx,ecx,eax).
ret ; Exit this procedure.
disk_read_error:
call print_nl ; Call the print_new_line procedure to well print a new line.
mov bx, DISK_READ_ERROR_MSG ; Load our disk error message for output.
call print_string ; Call the print_string procedure to print the previously loaded message.
call print_nl ; Call the print_new_line procedure to well print a new line.
jmp $ ; Loop infinitely if we come back from the previous procedure.
DISK_READ_ERROR_MSG: db "Disk read error!", 0 ; Save a byte for our disk read error message.
| 54.868421 | 115 | 0.689209 |
c6982f8a6bcfbf2da88fc4912af100553527a947 | 274 | asm | Assembly | wof/lcs/base/194.asm | zengfr/arcade_game_romhacking_sourcecode_top_secret_data | a4a0c86c200241494b3f1834cd0aef8dc02f7683 | [
"Apache-2.0"
] | 6 | 2020-10-14T15:29:10.000Z | 2022-02-12T18:58:54.000Z | wof/lcs/base/194.asm | zengfr/arcade_game_romhacking_sourcecode_top_secret_data | a4a0c86c200241494b3f1834cd0aef8dc02f7683 | [
"Apache-2.0"
] | null | null | null | wof/lcs/base/194.asm | zengfr/arcade_game_romhacking_sourcecode_top_secret_data | a4a0c86c200241494b3f1834cd0aef8dc02f7683 | [
"Apache-2.0"
] | 1 | 2020-12-17T08:59:10.000Z | 2020-12-17T08:59:10.000Z | copyright zengfr site:http://github.com/zengfr/romhack
001DF2 move.l ($6,PC,D1.w), ($192,A5) [base+196]
001DF8 rts [base+192, base+194]
01A610 dbra D1, $1a60e
05E528 move.w ($8e,A0), D0 [base+192, base+194]
copyright zengfr site:http://github.com/zengfr/romhack
| 30.444444 | 54 | 0.693431 |
eb129bf7871da9438cd555077cbfc93260083d12 | 1,601 | asm | Assembly | src/routines/usefulroutines.asm | zdimension/Cesium | bf202346ba89a6b413c0d19dd9faa4be89fc85a3 | [
"BSD-3-Clause"
] | 5 | 2018-08-22T13:26:03.000Z | 2021-08-29T14:31:32.000Z | src/routines/usefulroutines.asm | zdimension/Cesium | bf202346ba89a6b413c0d19dd9faa4be89fc85a3 | [
"BSD-3-Clause"
] | null | null | null | src/routines/usefulroutines.asm | zdimension/Cesium | bf202346ba89a6b413c0d19dd9faa4be89fc85a3 | [
"BSD-3-Clause"
] | null | null | null | ;-------------------------------------------------------------------------------
CheckIfCurrentProgramIsUs: ; returns Z if we try to do anything to this program
ld hl,(prgmNamePtr)
jr +_
CheckIfCurrentTmpProgramIsUs:
ld hl,(tmpPrgmNamePtr)
_: call NamePtrToOP1
ld hl,CesiumPrgmName
ld de,OP1
ld b,8
CheckNameLoop:
ld a,(de)
cp a,(hl)
ret nz
inc hl
inc de
djnz CheckNameLoop
xor a,a
ret
;-------------------------------------------------------------------------------
DrawTime:
ld a,(ClockDisp)
or a,a
ret z
set clockOn,(iy+clockFlags)
set useTokensInString,(iy+clockFlags)
ld de,OP6
push de
call _FormTime
pop hl
ld bc,(posX)
push bc
ld a,(posY)
push af
ld bc,255
ld (posX),bc
ld a,7
ld (posY),a
SetInvertedTextColor()
call DrawString
SetDefaultTextColor()
pop af
ld (posY),a
pop bc
ld (posX),bc
di
ret
;-------------------------------------------------------------------------------
DrawMainOSThings:
call ClearVBuf2
SetInvertedTextColor()
drawRectFilled(1,1,319,21)
call ClearLowerBar
ld a,107
ld (cIndex),a
drawRectOutline(1,22,318,223)
print(CesiumTitle,15,7)
print(RAMFreeStr,4,228)
call _MemChk
call ConvHL
inc hl
call DrawString
print(ROMFreeStr,196,228)
call _ArcChk
ld hl,(tempFreeArc)
call ConvHL
call DrawString
drawSpr255(batterySprite, 3,7)
ld a,255
ld (cIndex),a
batterystatus: =$+1
ld a,0
or a,a
ret z
ld bc,4
ld de,(lcdWidth*8)+7
jp FillRectangle_Computed
ClearLowerBar:
push bc
drawRectFilled(1,225,319,239)
pop bc
ret
| 18.616279 | 84 | 0.576515 |
d70bd7a6d6ca20d1b4f37bb9dc6394294fb72dd8 | 278 | asm | Assembly | libsrc/_DEVELOPMENT/math/float/math48/c/sdcc_iy/cm48_sdcciy_tan_fastcall.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 640 | 2017-01-14T23:33:45.000Z | 2022-03-30T11:28:42.000Z | libsrc/_DEVELOPMENT/math/float/math48/c/sdcc_iy/cm48_sdcciy_tan_fastcall.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 1,600 | 2017-01-15T16:12:02.000Z | 2022-03-31T12:11:12.000Z | libsrc/_DEVELOPMENT/math/float/math48/c/sdcc_iy/cm48_sdcciy_tan_fastcall.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 215 | 2017-01-17T10:43:03.000Z | 2022-03-23T17:25:02.000Z |
; float tan(float x) __z88dk_fastcall
SECTION code_clib
SECTION code_fp_math48
PUBLIC cm48_sdcciy_tan_fastcall
EXTERN cm48_sdcciyp_dx2m48, am48_tan, cm48_sdcciyp_m482d
cm48_sdcciy_tan_fastcall:
call cm48_sdcciyp_dx2m48
call am48_tan
jp cm48_sdcciyp_m482d
| 15.444444 | 56 | 0.816547 |
72cb3af6ae32ec1709d179e1f13b92c17db0025a | 43,925 | asm | Assembly | dist/halt.asm | Mishal-Alajmi/XV6 | ad70221e653577f10666fc79d5c398b96cfc9eb0 | [
"MIT"
] | null | null | null | dist/halt.asm | Mishal-Alajmi/XV6 | ad70221e653577f10666fc79d5c398b96cfc9eb0 | [
"MIT"
] | null | null | null | dist/halt.asm | Mishal-Alajmi/XV6 | ad70221e653577f10666fc79d5c398b96cfc9eb0 | [
"MIT"
] | null | null | null |
_halt: file format elf32-i386
Disassembly of section .text:
00000000 <main>:
// halt the system.
#include "types.h"
#include "user.h"
int
main(void) {
0: 55 push %ebp
1: 89 e5 mov %esp,%ebp
3: 83 e4 f0 and $0xfffffff0,%esp
halt();
6: e8 96 03 00 00 call 3a1 <halt>
exit();
b: e8 f1 02 00 00 call 301 <exit>
00000010 <strcpy>:
#include "user.h"
#include "x86.h"
char*
strcpy(char *s, char *t)
{
10: 55 push %ebp
char *os;
os = s;
while((*s++ = *t++) != 0)
11: 31 d2 xor %edx,%edx
{
13: 89 e5 mov %esp,%ebp
15: 53 push %ebx
16: 8b 45 08 mov 0x8(%ebp),%eax
19: 8b 5d 0c mov 0xc(%ebp),%ebx
1c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
while((*s++ = *t++) != 0)
20: 0f b6 0c 13 movzbl (%ebx,%edx,1),%ecx
24: 88 0c 10 mov %cl,(%eax,%edx,1)
27: 83 c2 01 add $0x1,%edx
2a: 84 c9 test %cl,%cl
2c: 75 f2 jne 20 <strcpy+0x10>
;
return os;
}
2e: 5b pop %ebx
2f: 5d pop %ebp
30: c3 ret
31: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
38: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
3f: 90 nop
00000040 <strcmp>:
int
strcmp(const char *p, const char *q)
{
40: 55 push %ebp
41: 89 e5 mov %esp,%ebp
43: 56 push %esi
44: 53 push %ebx
45: 8b 5d 08 mov 0x8(%ebp),%ebx
48: 8b 75 0c mov 0xc(%ebp),%esi
while(*p && *p == *q)
4b: 0f b6 13 movzbl (%ebx),%edx
4e: 0f b6 0e movzbl (%esi),%ecx
51: 84 d2 test %dl,%dl
53: 74 1e je 73 <strcmp+0x33>
55: b8 01 00 00 00 mov $0x1,%eax
5a: 38 ca cmp %cl,%dl
5c: 74 09 je 67 <strcmp+0x27>
5e: eb 20 jmp 80 <strcmp+0x40>
60: 83 c0 01 add $0x1,%eax
63: 38 ca cmp %cl,%dl
65: 75 19 jne 80 <strcmp+0x40>
67: 0f b6 14 03 movzbl (%ebx,%eax,1),%edx
6b: 0f b6 0c 06 movzbl (%esi,%eax,1),%ecx
6f: 84 d2 test %dl,%dl
71: 75 ed jne 60 <strcmp+0x20>
73: 31 c0 xor %eax,%eax
p++, q++;
return (uchar)*p - (uchar)*q;
}
75: 5b pop %ebx
76: 5e pop %esi
return (uchar)*p - (uchar)*q;
77: 29 c8 sub %ecx,%eax
}
79: 5d pop %ebp
7a: c3 ret
7b: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
7f: 90 nop
80: 0f b6 c2 movzbl %dl,%eax
83: 5b pop %ebx
84: 5e pop %esi
return (uchar)*p - (uchar)*q;
85: 29 c8 sub %ecx,%eax
}
87: 5d pop %ebp
88: c3 ret
89: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
00000090 <strlen>:
uint
strlen(char *s)
{
90: 55 push %ebp
91: 89 e5 mov %esp,%ebp
93: 8b 4d 08 mov 0x8(%ebp),%ecx
int n;
for(n = 0; s[n]; n++)
96: 80 39 00 cmpb $0x0,(%ecx)
99: 74 15 je b0 <strlen+0x20>
9b: 31 d2 xor %edx,%edx
9d: 8d 76 00 lea 0x0(%esi),%esi
a0: 83 c2 01 add $0x1,%edx
a3: 80 3c 11 00 cmpb $0x0,(%ecx,%edx,1)
a7: 89 d0 mov %edx,%eax
a9: 75 f5 jne a0 <strlen+0x10>
;
return n;
}
ab: 5d pop %ebp
ac: c3 ret
ad: 8d 76 00 lea 0x0(%esi),%esi
for(n = 0; s[n]; n++)
b0: 31 c0 xor %eax,%eax
}
b2: 5d pop %ebp
b3: c3 ret
b4: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
bb: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
bf: 90 nop
000000c0 <memset>:
void*
memset(void *dst, int c, uint n)
{
c0: 55 push %ebp
c1: 89 e5 mov %esp,%ebp
c3: 57 push %edi
c4: 8b 55 08 mov 0x8(%ebp),%edx
}
static inline void
stosb(void *addr, int data, int cnt)
{
asm volatile("cld; rep stosb" :
c7: 8b 4d 10 mov 0x10(%ebp),%ecx
ca: 8b 45 0c mov 0xc(%ebp),%eax
cd: 89 d7 mov %edx,%edi
cf: fc cld
d0: f3 aa rep stos %al,%es:(%edi)
stosb(dst, c, n);
return dst;
}
d2: 89 d0 mov %edx,%eax
d4: 5f pop %edi
d5: 5d pop %ebp
d6: c3 ret
d7: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
de: 66 90 xchg %ax,%ax
000000e0 <strchr>:
char*
strchr(const char *s, char c)
{
e0: 55 push %ebp
e1: 89 e5 mov %esp,%ebp
e3: 53 push %ebx
e4: 8b 45 08 mov 0x8(%ebp),%eax
e7: 8b 55 0c mov 0xc(%ebp),%edx
for(; *s; s++)
ea: 0f b6 18 movzbl (%eax),%ebx
ed: 84 db test %bl,%bl
ef: 74 1d je 10e <strchr+0x2e>
f1: 89 d1 mov %edx,%ecx
if(*s == c)
f3: 38 d3 cmp %dl,%bl
f5: 75 0d jne 104 <strchr+0x24>
f7: eb 17 jmp 110 <strchr+0x30>
f9: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
100: 38 ca cmp %cl,%dl
102: 74 0c je 110 <strchr+0x30>
for(; *s; s++)
104: 83 c0 01 add $0x1,%eax
107: 0f b6 10 movzbl (%eax),%edx
10a: 84 d2 test %dl,%dl
10c: 75 f2 jne 100 <strchr+0x20>
return (char*)s;
return 0;
10e: 31 c0 xor %eax,%eax
}
110: 5b pop %ebx
111: 5d pop %ebp
112: c3 ret
113: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
11a: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
00000120 <gets>:
char*
gets(char *buf, int max)
{
120: 55 push %ebp
121: 89 e5 mov %esp,%ebp
123: 57 push %edi
124: 56 push %esi
int i, cc;
char c;
for(i=0; i+1 < max; ){
125: 31 f6 xor %esi,%esi
{
127: 53 push %ebx
128: 89 f3 mov %esi,%ebx
12a: 83 ec 1c sub $0x1c,%esp
12d: 8b 7d 08 mov 0x8(%ebp),%edi
for(i=0; i+1 < max; ){
130: eb 2f jmp 161 <gets+0x41>
132: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
cc = read(0, &c, 1);
138: 83 ec 04 sub $0x4,%esp
13b: 8d 45 e7 lea -0x19(%ebp),%eax
13e: 6a 01 push $0x1
140: 50 push %eax
141: 6a 00 push $0x0
143: e8 d1 01 00 00 call 319 <read>
if(cc < 1)
148: 83 c4 10 add $0x10,%esp
14b: 85 c0 test %eax,%eax
14d: 7e 1c jle 16b <gets+0x4b>
break;
buf[i++] = c;
14f: 0f b6 45 e7 movzbl -0x19(%ebp),%eax
153: 83 c7 01 add $0x1,%edi
156: 88 47 ff mov %al,-0x1(%edi)
if(c == '\n' || c == '\r')
159: 3c 0a cmp $0xa,%al
15b: 74 23 je 180 <gets+0x60>
15d: 3c 0d cmp $0xd,%al
15f: 74 1f je 180 <gets+0x60>
for(i=0; i+1 < max; ){
161: 83 c3 01 add $0x1,%ebx
164: 89 fe mov %edi,%esi
166: 3b 5d 0c cmp 0xc(%ebp),%ebx
169: 7c cd jl 138 <gets+0x18>
16b: 89 f3 mov %esi,%ebx
break;
}
buf[i] = '\0';
return buf;
}
16d: 8b 45 08 mov 0x8(%ebp),%eax
buf[i] = '\0';
170: c6 03 00 movb $0x0,(%ebx)
}
173: 8d 65 f4 lea -0xc(%ebp),%esp
176: 5b pop %ebx
177: 5e pop %esi
178: 5f pop %edi
179: 5d pop %ebp
17a: c3 ret
17b: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
17f: 90 nop
180: 8b 75 08 mov 0x8(%ebp),%esi
183: 8b 45 08 mov 0x8(%ebp),%eax
186: 01 de add %ebx,%esi
188: 89 f3 mov %esi,%ebx
buf[i] = '\0';
18a: c6 03 00 movb $0x0,(%ebx)
}
18d: 8d 65 f4 lea -0xc(%ebp),%esp
190: 5b pop %ebx
191: 5e pop %esi
192: 5f pop %edi
193: 5d pop %ebp
194: c3 ret
195: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
19c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
000001a0 <stat>:
int
stat(char *n, struct stat *st)
{
1a0: 55 push %ebp
1a1: 89 e5 mov %esp,%ebp
1a3: 56 push %esi
1a4: 53 push %ebx
int fd;
int r;
fd = open(n, O_RDONLY);
1a5: 83 ec 08 sub $0x8,%esp
1a8: 6a 00 push $0x0
1aa: ff 75 08 pushl 0x8(%ebp)
1ad: e8 8f 01 00 00 call 341 <open>
if(fd < 0)
1b2: 83 c4 10 add $0x10,%esp
1b5: 85 c0 test %eax,%eax
1b7: 78 27 js 1e0 <stat+0x40>
return -1;
r = fstat(fd, st);
1b9: 83 ec 08 sub $0x8,%esp
1bc: ff 75 0c pushl 0xc(%ebp)
1bf: 89 c3 mov %eax,%ebx
1c1: 50 push %eax
1c2: e8 92 01 00 00 call 359 <fstat>
close(fd);
1c7: 89 1c 24 mov %ebx,(%esp)
r = fstat(fd, st);
1ca: 89 c6 mov %eax,%esi
close(fd);
1cc: e8 58 01 00 00 call 329 <close>
return r;
1d1: 83 c4 10 add $0x10,%esp
}
1d4: 8d 65 f8 lea -0x8(%ebp),%esp
1d7: 89 f0 mov %esi,%eax
1d9: 5b pop %ebx
1da: 5e pop %esi
1db: 5d pop %ebp
1dc: c3 ret
1dd: 8d 76 00 lea 0x0(%esi),%esi
return -1;
1e0: be ff ff ff ff mov $0xffffffff,%esi
1e5: eb ed jmp 1d4 <stat+0x34>
1e7: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
1ee: 66 90 xchg %ax,%ax
000001f0 <atoi>:
#ifdef PDX_XV6
int
atoi(const char *s)
{
1f0: 55 push %ebp
1f1: 89 e5 mov %esp,%ebp
1f3: 56 push %esi
1f4: 8b 55 08 mov 0x8(%ebp),%edx
1f7: 53 push %ebx
int n, sign;
n = 0;
while (*s == ' ') s++;
1f8: 0f b6 0a movzbl (%edx),%ecx
1fb: 80 f9 20 cmp $0x20,%cl
1fe: 75 0b jne 20b <atoi+0x1b>
200: 83 c2 01 add $0x1,%edx
203: 0f b6 0a movzbl (%edx),%ecx
206: 80 f9 20 cmp $0x20,%cl
209: 74 f5 je 200 <atoi+0x10>
sign = (*s == '-') ? -1 : 1;
20b: 80 f9 2d cmp $0x2d,%cl
20e: 74 40 je 250 <atoi+0x60>
210: be 01 00 00 00 mov $0x1,%esi
if (*s == '+' || *s == '-')
215: 80 f9 2b cmp $0x2b,%cl
218: 74 3b je 255 <atoi+0x65>
s++;
while('0' <= *s && *s <= '9')
21a: 0f be 0a movsbl (%edx),%ecx
21d: 8d 41 d0 lea -0x30(%ecx),%eax
220: 3c 09 cmp $0x9,%al
222: b8 00 00 00 00 mov $0x0,%eax
227: 77 1f ja 248 <atoi+0x58>
229: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
n = n*10 + *s++ - '0';
230: 83 c2 01 add $0x1,%edx
233: 8d 04 80 lea (%eax,%eax,4),%eax
236: 8d 44 41 d0 lea -0x30(%ecx,%eax,2),%eax
while('0' <= *s && *s <= '9')
23a: 0f be 0a movsbl (%edx),%ecx
23d: 8d 59 d0 lea -0x30(%ecx),%ebx
240: 80 fb 09 cmp $0x9,%bl
243: 76 eb jbe 230 <atoi+0x40>
245: 0f af c6 imul %esi,%eax
return sign*n;
}
248: 5b pop %ebx
249: 5e pop %esi
24a: 5d pop %ebp
24b: c3 ret
24c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
sign = (*s == '-') ? -1 : 1;
250: be ff ff ff ff mov $0xffffffff,%esi
s++;
255: 83 c2 01 add $0x1,%edx
258: eb c0 jmp 21a <atoi+0x2a>
25a: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
00000260 <atoo>:
int
atoo(const char *s)
{
260: 55 push %ebp
261: 89 e5 mov %esp,%ebp
263: 56 push %esi
264: 8b 55 08 mov 0x8(%ebp),%edx
267: 53 push %ebx
int n, sign;
n = 0;
while (*s == ' ') s++;
268: 0f b6 0a movzbl (%edx),%ecx
26b: 80 f9 20 cmp $0x20,%cl
26e: 75 0b jne 27b <atoo+0x1b>
270: 83 c2 01 add $0x1,%edx
273: 0f b6 0a movzbl (%edx),%ecx
276: 80 f9 20 cmp $0x20,%cl
279: 74 f5 je 270 <atoo+0x10>
sign = (*s == '-') ? -1 : 1;
27b: 80 f9 2d cmp $0x2d,%cl
27e: 74 40 je 2c0 <atoo+0x60>
280: be 01 00 00 00 mov $0x1,%esi
if (*s == '+' || *s == '-')
285: 80 f9 2b cmp $0x2b,%cl
288: 74 3b je 2c5 <atoo+0x65>
s++;
while('0' <= *s && *s <= '7')
28a: 0f be 0a movsbl (%edx),%ecx
28d: 8d 41 d0 lea -0x30(%ecx),%eax
290: 3c 07 cmp $0x7,%al
292: b8 00 00 00 00 mov $0x0,%eax
297: 77 1c ja 2b5 <atoo+0x55>
299: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
n = n*8 + *s++ - '0';
2a0: 83 c2 01 add $0x1,%edx
2a3: 8d 44 c1 d0 lea -0x30(%ecx,%eax,8),%eax
while('0' <= *s && *s <= '7')
2a7: 0f be 0a movsbl (%edx),%ecx
2aa: 8d 59 d0 lea -0x30(%ecx),%ebx
2ad: 80 fb 07 cmp $0x7,%bl
2b0: 76 ee jbe 2a0 <atoo+0x40>
2b2: 0f af c6 imul %esi,%eax
return sign*n;
}
2b5: 5b pop %ebx
2b6: 5e pop %esi
2b7: 5d pop %ebp
2b8: c3 ret
2b9: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
sign = (*s == '-') ? -1 : 1;
2c0: be ff ff ff ff mov $0xffffffff,%esi
s++;
2c5: 83 c2 01 add $0x1,%edx
2c8: eb c0 jmp 28a <atoo+0x2a>
2ca: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
000002d0 <memmove>:
}
#endif // PDX_XV6
void*
memmove(void *vdst, void *vsrc, int n)
{
2d0: 55 push %ebp
2d1: 89 e5 mov %esp,%ebp
2d3: 57 push %edi
2d4: 8b 55 10 mov 0x10(%ebp),%edx
2d7: 8b 45 08 mov 0x8(%ebp),%eax
2da: 56 push %esi
2db: 8b 75 0c mov 0xc(%ebp),%esi
char *dst, *src;
dst = vdst;
src = vsrc;
while(n-- > 0)
2de: 85 d2 test %edx,%edx
2e0: 7e 13 jle 2f5 <memmove+0x25>
2e2: 01 c2 add %eax,%edx
dst = vdst;
2e4: 89 c7 mov %eax,%edi
2e6: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
2ed: 8d 76 00 lea 0x0(%esi),%esi
*dst++ = *src++;
2f0: a4 movsb %ds:(%esi),%es:(%edi)
while(n-- > 0)
2f1: 39 fa cmp %edi,%edx
2f3: 75 fb jne 2f0 <memmove+0x20>
return vdst;
}
2f5: 5e pop %esi
2f6: 5f pop %edi
2f7: 5d pop %ebp
2f8: c3 ret
000002f9 <fork>:
name: \
movl $SYS_ ## name, %eax; \
int $T_SYSCALL; \
ret
SYSCALL(fork)
2f9: b8 01 00 00 00 mov $0x1,%eax
2fe: cd 40 int $0x40
300: c3 ret
00000301 <exit>:
SYSCALL(exit)
301: b8 02 00 00 00 mov $0x2,%eax
306: cd 40 int $0x40
308: c3 ret
00000309 <wait>:
SYSCALL(wait)
309: b8 03 00 00 00 mov $0x3,%eax
30e: cd 40 int $0x40
310: c3 ret
00000311 <pipe>:
SYSCALL(pipe)
311: b8 04 00 00 00 mov $0x4,%eax
316: cd 40 int $0x40
318: c3 ret
00000319 <read>:
SYSCALL(read)
319: b8 05 00 00 00 mov $0x5,%eax
31e: cd 40 int $0x40
320: c3 ret
00000321 <write>:
SYSCALL(write)
321: b8 10 00 00 00 mov $0x10,%eax
326: cd 40 int $0x40
328: c3 ret
00000329 <close>:
SYSCALL(close)
329: b8 15 00 00 00 mov $0x15,%eax
32e: cd 40 int $0x40
330: c3 ret
00000331 <kill>:
SYSCALL(kill)
331: b8 06 00 00 00 mov $0x6,%eax
336: cd 40 int $0x40
338: c3 ret
00000339 <exec>:
SYSCALL(exec)
339: b8 07 00 00 00 mov $0x7,%eax
33e: cd 40 int $0x40
340: c3 ret
00000341 <open>:
SYSCALL(open)
341: b8 0f 00 00 00 mov $0xf,%eax
346: cd 40 int $0x40
348: c3 ret
00000349 <mknod>:
SYSCALL(mknod)
349: b8 11 00 00 00 mov $0x11,%eax
34e: cd 40 int $0x40
350: c3 ret
00000351 <unlink>:
SYSCALL(unlink)
351: b8 12 00 00 00 mov $0x12,%eax
356: cd 40 int $0x40
358: c3 ret
00000359 <fstat>:
SYSCALL(fstat)
359: b8 08 00 00 00 mov $0x8,%eax
35e: cd 40 int $0x40
360: c3 ret
00000361 <link>:
SYSCALL(link)
361: b8 13 00 00 00 mov $0x13,%eax
366: cd 40 int $0x40
368: c3 ret
00000369 <mkdir>:
SYSCALL(mkdir)
369: b8 14 00 00 00 mov $0x14,%eax
36e: cd 40 int $0x40
370: c3 ret
00000371 <chdir>:
SYSCALL(chdir)
371: b8 09 00 00 00 mov $0x9,%eax
376: cd 40 int $0x40
378: c3 ret
00000379 <dup>:
SYSCALL(dup)
379: b8 0a 00 00 00 mov $0xa,%eax
37e: cd 40 int $0x40
380: c3 ret
00000381 <getpid>:
SYSCALL(getpid)
381: b8 0b 00 00 00 mov $0xb,%eax
386: cd 40 int $0x40
388: c3 ret
00000389 <sbrk>:
SYSCALL(sbrk)
389: b8 0c 00 00 00 mov $0xc,%eax
38e: cd 40 int $0x40
390: c3 ret
00000391 <sleep>:
SYSCALL(sleep)
391: b8 0d 00 00 00 mov $0xd,%eax
396: cd 40 int $0x40
398: c3 ret
00000399 <uptime>:
SYSCALL(uptime)
399: b8 0e 00 00 00 mov $0xe,%eax
39e: cd 40 int $0x40
3a0: c3 ret
000003a1 <halt>:
SYSCALL(halt)
3a1: b8 16 00 00 00 mov $0x16,%eax
3a6: cd 40 int $0x40
3a8: c3 ret
000003a9 <date>:
SYSCALL(date)
3a9: b8 17 00 00 00 mov $0x17,%eax
3ae: cd 40 int $0x40
3b0: c3 ret
000003b1 <getgid>:
SYSCALL(getgid)
3b1: b8 18 00 00 00 mov $0x18,%eax
3b6: cd 40 int $0x40
3b8: c3 ret
000003b9 <setgid>:
SYSCALL(setgid)
3b9: b8 19 00 00 00 mov $0x19,%eax
3be: cd 40 int $0x40
3c0: c3 ret
000003c1 <getuid>:
SYSCALL(getuid)
3c1: b8 1a 00 00 00 mov $0x1a,%eax
3c6: cd 40 int $0x40
3c8: c3 ret
000003c9 <setuid>:
SYSCALL(setuid)
3c9: b8 1b 00 00 00 mov $0x1b,%eax
3ce: cd 40 int $0x40
3d0: c3 ret
000003d1 <getppid>:
SYSCALL(getppid)
3d1: b8 1c 00 00 00 mov $0x1c,%eax
3d6: cd 40 int $0x40
3d8: c3 ret
000003d9 <getprocs>:
SYSCALL(getprocs)
3d9: b8 1d 00 00 00 mov $0x1d,%eax
3de: cd 40 int $0x40
3e0: c3 ret
000003e1 <setpriority>:
SYSCALL(setpriority)
3e1: b8 1e 00 00 00 mov $0x1e,%eax
3e6: cd 40 int $0x40
3e8: c3 ret
000003e9 <getpriority>:
SYSCALL(getpriority)
3e9: b8 1f 00 00 00 mov $0x1f,%eax
3ee: cd 40 int $0x40
3f0: c3 ret
000003f1 <chmod>:
SYSCALL(chmod)
3f1: b8 20 00 00 00 mov $0x20,%eax
3f6: cd 40 int $0x40
3f8: c3 ret
000003f9 <chown>:
SYSCALL(chown)
3f9: b8 21 00 00 00 mov $0x21,%eax
3fe: cd 40 int $0x40
400: c3 ret
00000401 <chgrp>:
SYSCALL(chgrp)
401: b8 22 00 00 00 mov $0x22,%eax
406: cd 40 int $0x40
408: c3 ret
409: 66 90 xchg %ax,%ax
40b: 66 90 xchg %ax,%ax
40d: 66 90 xchg %ax,%ax
40f: 90 nop
00000410 <printint>:
write(fd, &c, 1);
}
static void
printint(int fd, int xx, int base, int sgn)
{
410: 55 push %ebp
411: 89 e5 mov %esp,%ebp
413: 57 push %edi
414: 56 push %esi
415: 53 push %ebx
uint x;
neg = 0;
if(sgn && xx < 0){
neg = 1;
x = -xx;
416: 89 d3 mov %edx,%ebx
{
418: 83 ec 3c sub $0x3c,%esp
41b: 89 45 bc mov %eax,-0x44(%ebp)
if(sgn && xx < 0){
41e: 85 d2 test %edx,%edx
420: 0f 89 92 00 00 00 jns 4b8 <printint+0xa8>
426: f6 45 08 01 testb $0x1,0x8(%ebp)
42a: 0f 84 88 00 00 00 je 4b8 <printint+0xa8>
neg = 1;
430: c7 45 c0 01 00 00 00 movl $0x1,-0x40(%ebp)
x = -xx;
437: f7 db neg %ebx
} else {
x = xx;
}
i = 0;
439: c7 45 c4 00 00 00 00 movl $0x0,-0x3c(%ebp)
440: 8d 75 d7 lea -0x29(%ebp),%esi
443: eb 08 jmp 44d <printint+0x3d>
445: 8d 76 00 lea 0x0(%esi),%esi
do{
buf[i++] = digits[x % base];
448: 89 7d c4 mov %edi,-0x3c(%ebp)
}while((x /= base) != 0);
44b: 89 c3 mov %eax,%ebx
buf[i++] = digits[x % base];
44d: 89 d8 mov %ebx,%eax
44f: 31 d2 xor %edx,%edx
451: 8b 7d c4 mov -0x3c(%ebp),%edi
454: f7 f1 div %ecx
456: 83 c7 01 add $0x1,%edi
459: 0f b6 92 40 08 00 00 movzbl 0x840(%edx),%edx
460: 88 14 3e mov %dl,(%esi,%edi,1)
}while((x /= base) != 0);
463: 39 d9 cmp %ebx,%ecx
465: 76 e1 jbe 448 <printint+0x38>
if(neg)
467: 8b 45 c0 mov -0x40(%ebp),%eax
46a: 85 c0 test %eax,%eax
46c: 74 0d je 47b <printint+0x6b>
buf[i++] = '-';
46e: c6 44 3d d8 2d movb $0x2d,-0x28(%ebp,%edi,1)
473: ba 2d 00 00 00 mov $0x2d,%edx
buf[i++] = digits[x % base];
478: 89 7d c4 mov %edi,-0x3c(%ebp)
47b: 8b 45 c4 mov -0x3c(%ebp),%eax
47e: 8b 7d bc mov -0x44(%ebp),%edi
481: 8d 5c 05 d7 lea -0x29(%ebp,%eax,1),%ebx
485: eb 0f jmp 496 <printint+0x86>
487: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
48e: 66 90 xchg %ax,%ax
490: 0f b6 13 movzbl (%ebx),%edx
493: 83 eb 01 sub $0x1,%ebx
write(fd, &c, 1);
496: 83 ec 04 sub $0x4,%esp
499: 88 55 d7 mov %dl,-0x29(%ebp)
49c: 6a 01 push $0x1
49e: 56 push %esi
49f: 57 push %edi
4a0: e8 7c fe ff ff call 321 <write>
while(--i >= 0)
4a5: 83 c4 10 add $0x10,%esp
4a8: 39 de cmp %ebx,%esi
4aa: 75 e4 jne 490 <printint+0x80>
putc(fd, buf[i]);
}
4ac: 8d 65 f4 lea -0xc(%ebp),%esp
4af: 5b pop %ebx
4b0: 5e pop %esi
4b1: 5f pop %edi
4b2: 5d pop %ebp
4b3: c3 ret
4b4: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
neg = 0;
4b8: c7 45 c0 00 00 00 00 movl $0x0,-0x40(%ebp)
4bf: e9 75 ff ff ff jmp 439 <printint+0x29>
4c4: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
4cb: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
4cf: 90 nop
000004d0 <printf>:
// Print to the given fd. Only understands %d, %x, %p, %s.
void
printf(int fd, char *fmt, ...)
{
4d0: 55 push %ebp
4d1: 89 e5 mov %esp,%ebp
4d3: 57 push %edi
4d4: 56 push %esi
4d5: 53 push %ebx
4d6: 83 ec 2c sub $0x2c,%esp
int c, i, state;
uint *ap;
state = 0;
ap = (uint*)(void*)&fmt + 1;
for(i = 0; fmt[i]; i++){
4d9: 8b 75 0c mov 0xc(%ebp),%esi
4dc: 0f b6 1e movzbl (%esi),%ebx
4df: 84 db test %bl,%bl
4e1: 0f 84 b9 00 00 00 je 5a0 <printf+0xd0>
ap = (uint*)(void*)&fmt + 1;
4e7: 8d 45 10 lea 0x10(%ebp),%eax
4ea: 83 c6 01 add $0x1,%esi
write(fd, &c, 1);
4ed: 8d 7d e7 lea -0x19(%ebp),%edi
state = 0;
4f0: 31 d2 xor %edx,%edx
ap = (uint*)(void*)&fmt + 1;
4f2: 89 45 d0 mov %eax,-0x30(%ebp)
4f5: eb 38 jmp 52f <printf+0x5f>
4f7: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
4fe: 66 90 xchg %ax,%ax
500: 89 55 d4 mov %edx,-0x2c(%ebp)
c = fmt[i] & 0xff;
if(state == 0){
if(c == '%'){
state = '%';
503: ba 25 00 00 00 mov $0x25,%edx
if(c == '%'){
508: 83 f8 25 cmp $0x25,%eax
50b: 74 17 je 524 <printf+0x54>
write(fd, &c, 1);
50d: 83 ec 04 sub $0x4,%esp
510: 88 5d e7 mov %bl,-0x19(%ebp)
513: 6a 01 push $0x1
515: 57 push %edi
516: ff 75 08 pushl 0x8(%ebp)
519: e8 03 fe ff ff call 321 <write>
51e: 8b 55 d4 mov -0x2c(%ebp),%edx
} else {
putc(fd, c);
521: 83 c4 10 add $0x10,%esp
524: 83 c6 01 add $0x1,%esi
for(i = 0; fmt[i]; i++){
527: 0f b6 5e ff movzbl -0x1(%esi),%ebx
52b: 84 db test %bl,%bl
52d: 74 71 je 5a0 <printf+0xd0>
c = fmt[i] & 0xff;
52f: 0f be cb movsbl %bl,%ecx
532: 0f b6 c3 movzbl %bl,%eax
if(state == 0){
535: 85 d2 test %edx,%edx
537: 74 c7 je 500 <printf+0x30>
}
} else if(state == '%'){
539: 83 fa 25 cmp $0x25,%edx
53c: 75 e6 jne 524 <printf+0x54>
if(c == 'd'){
53e: 83 f8 64 cmp $0x64,%eax
541: 0f 84 99 00 00 00 je 5e0 <printf+0x110>
printint(fd, *ap, 10, 1);
ap++;
} else if(c == 'x' || c == 'p'){
547: 81 e1 f7 00 00 00 and $0xf7,%ecx
54d: 83 f9 70 cmp $0x70,%ecx
550: 74 5e je 5b0 <printf+0xe0>
printint(fd, *ap, 16, 0);
ap++;
} else if(c == 's'){
552: 83 f8 73 cmp $0x73,%eax
555: 0f 84 d5 00 00 00 je 630 <printf+0x160>
s = "(null)";
while(*s != 0){
putc(fd, *s);
s++;
}
} else if(c == 'c'){
55b: 83 f8 63 cmp $0x63,%eax
55e: 0f 84 8c 00 00 00 je 5f0 <printf+0x120>
putc(fd, *ap);
ap++;
} else if(c == '%'){
564: 83 f8 25 cmp $0x25,%eax
567: 0f 84 b3 00 00 00 je 620 <printf+0x150>
write(fd, &c, 1);
56d: 83 ec 04 sub $0x4,%esp
570: c6 45 e7 25 movb $0x25,-0x19(%ebp)
574: 6a 01 push $0x1
576: 57 push %edi
577: ff 75 08 pushl 0x8(%ebp)
57a: e8 a2 fd ff ff call 321 <write>
putc(fd, c);
} else {
// Unknown % sequence. Print it to draw attention.
putc(fd, '%');
putc(fd, c);
57f: 88 5d e7 mov %bl,-0x19(%ebp)
write(fd, &c, 1);
582: 83 c4 0c add $0xc,%esp
585: 6a 01 push $0x1
587: 83 c6 01 add $0x1,%esi
58a: 57 push %edi
58b: ff 75 08 pushl 0x8(%ebp)
58e: e8 8e fd ff ff call 321 <write>
for(i = 0; fmt[i]; i++){
593: 0f b6 5e ff movzbl -0x1(%esi),%ebx
putc(fd, c);
597: 83 c4 10 add $0x10,%esp
}
state = 0;
59a: 31 d2 xor %edx,%edx
for(i = 0; fmt[i]; i++){
59c: 84 db test %bl,%bl
59e: 75 8f jne 52f <printf+0x5f>
}
}
}
5a0: 8d 65 f4 lea -0xc(%ebp),%esp
5a3: 5b pop %ebx
5a4: 5e pop %esi
5a5: 5f pop %edi
5a6: 5d pop %ebp
5a7: c3 ret
5a8: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
5af: 90 nop
printint(fd, *ap, 16, 0);
5b0: 83 ec 0c sub $0xc,%esp
5b3: b9 10 00 00 00 mov $0x10,%ecx
5b8: 6a 00 push $0x0
5ba: 8b 5d d0 mov -0x30(%ebp),%ebx
5bd: 8b 45 08 mov 0x8(%ebp),%eax
5c0: 8b 13 mov (%ebx),%edx
5c2: e8 49 fe ff ff call 410 <printint>
ap++;
5c7: 89 d8 mov %ebx,%eax
5c9: 83 c4 10 add $0x10,%esp
state = 0;
5cc: 31 d2 xor %edx,%edx
ap++;
5ce: 83 c0 04 add $0x4,%eax
5d1: 89 45 d0 mov %eax,-0x30(%ebp)
5d4: e9 4b ff ff ff jmp 524 <printf+0x54>
5d9: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
printint(fd, *ap, 10, 1);
5e0: 83 ec 0c sub $0xc,%esp
5e3: b9 0a 00 00 00 mov $0xa,%ecx
5e8: 6a 01 push $0x1
5ea: eb ce jmp 5ba <printf+0xea>
5ec: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
putc(fd, *ap);
5f0: 8b 5d d0 mov -0x30(%ebp),%ebx
write(fd, &c, 1);
5f3: 83 ec 04 sub $0x4,%esp
putc(fd, *ap);
5f6: 8b 03 mov (%ebx),%eax
write(fd, &c, 1);
5f8: 6a 01 push $0x1
ap++;
5fa: 83 c3 04 add $0x4,%ebx
write(fd, &c, 1);
5fd: 57 push %edi
5fe: ff 75 08 pushl 0x8(%ebp)
putc(fd, *ap);
601: 88 45 e7 mov %al,-0x19(%ebp)
write(fd, &c, 1);
604: e8 18 fd ff ff call 321 <write>
ap++;
609: 89 5d d0 mov %ebx,-0x30(%ebp)
60c: 83 c4 10 add $0x10,%esp
state = 0;
60f: 31 d2 xor %edx,%edx
611: e9 0e ff ff ff jmp 524 <printf+0x54>
616: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
61d: 8d 76 00 lea 0x0(%esi),%esi
putc(fd, c);
620: 88 5d e7 mov %bl,-0x19(%ebp)
write(fd, &c, 1);
623: 83 ec 04 sub $0x4,%esp
626: e9 5a ff ff ff jmp 585 <printf+0xb5>
62b: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
62f: 90 nop
s = (char*)*ap;
630: 8b 45 d0 mov -0x30(%ebp),%eax
633: 8b 18 mov (%eax),%ebx
ap++;
635: 83 c0 04 add $0x4,%eax
638: 89 45 d0 mov %eax,-0x30(%ebp)
if(s == 0)
63b: 85 db test %ebx,%ebx
63d: 74 17 je 656 <printf+0x186>
while(*s != 0){
63f: 0f b6 03 movzbl (%ebx),%eax
state = 0;
642: 31 d2 xor %edx,%edx
while(*s != 0){
644: 84 c0 test %al,%al
646: 0f 84 d8 fe ff ff je 524 <printf+0x54>
64c: 89 75 d4 mov %esi,-0x2c(%ebp)
64f: 89 de mov %ebx,%esi
651: 8b 5d 08 mov 0x8(%ebp),%ebx
654: eb 1a jmp 670 <printf+0x1a0>
s = "(null)";
656: bb 38 08 00 00 mov $0x838,%ebx
while(*s != 0){
65b: 89 75 d4 mov %esi,-0x2c(%ebp)
65e: b8 28 00 00 00 mov $0x28,%eax
663: 89 de mov %ebx,%esi
665: 8b 5d 08 mov 0x8(%ebp),%ebx
668: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
66f: 90 nop
write(fd, &c, 1);
670: 83 ec 04 sub $0x4,%esp
s++;
673: 83 c6 01 add $0x1,%esi
676: 88 45 e7 mov %al,-0x19(%ebp)
write(fd, &c, 1);
679: 6a 01 push $0x1
67b: 57 push %edi
67c: 53 push %ebx
67d: e8 9f fc ff ff call 321 <write>
while(*s != 0){
682: 0f b6 06 movzbl (%esi),%eax
685: 83 c4 10 add $0x10,%esp
688: 84 c0 test %al,%al
68a: 75 e4 jne 670 <printf+0x1a0>
68c: 8b 75 d4 mov -0x2c(%ebp),%esi
state = 0;
68f: 31 d2 xor %edx,%edx
691: e9 8e fe ff ff jmp 524 <printf+0x54>
696: 66 90 xchg %ax,%ax
698: 66 90 xchg %ax,%ax
69a: 66 90 xchg %ax,%ax
69c: 66 90 xchg %ax,%ax
69e: 66 90 xchg %ax,%ax
000006a0 <free>:
static Header base;
static Header *freep;
void
free(void *ap)
{
6a0: 55 push %ebp
Header *bp, *p;
bp = (Header*)ap - 1;
for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr)
6a1: a1 14 0b 00 00 mov 0xb14,%eax
{
6a6: 89 e5 mov %esp,%ebp
6a8: 57 push %edi
6a9: 56 push %esi
6aa: 53 push %ebx
6ab: 8b 5d 08 mov 0x8(%ebp),%ebx
6ae: 8b 10 mov (%eax),%edx
bp = (Header*)ap - 1;
6b0: 8d 4b f8 lea -0x8(%ebx),%ecx
for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr)
6b3: 39 c8 cmp %ecx,%eax
6b5: 73 19 jae 6d0 <free+0x30>
6b7: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
6be: 66 90 xchg %ax,%ax
6c0: 39 d1 cmp %edx,%ecx
6c2: 72 14 jb 6d8 <free+0x38>
if(p >= p->s.ptr && (bp > p || bp < p->s.ptr))
6c4: 39 d0 cmp %edx,%eax
6c6: 73 10 jae 6d8 <free+0x38>
{
6c8: 89 d0 mov %edx,%eax
6ca: 8b 10 mov (%eax),%edx
for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr)
6cc: 39 c8 cmp %ecx,%eax
6ce: 72 f0 jb 6c0 <free+0x20>
if(p >= p->s.ptr && (bp > p || bp < p->s.ptr))
6d0: 39 d0 cmp %edx,%eax
6d2: 72 f4 jb 6c8 <free+0x28>
6d4: 39 d1 cmp %edx,%ecx
6d6: 73 f0 jae 6c8 <free+0x28>
break;
if(bp + bp->s.size == p->s.ptr){
6d8: 8b 73 fc mov -0x4(%ebx),%esi
6db: 8d 3c f1 lea (%ecx,%esi,8),%edi
6de: 39 fa cmp %edi,%edx
6e0: 74 1e je 700 <free+0x60>
bp->s.size += p->s.ptr->s.size;
bp->s.ptr = p->s.ptr->s.ptr;
} else
bp->s.ptr = p->s.ptr;
6e2: 89 53 f8 mov %edx,-0x8(%ebx)
if(p + p->s.size == bp){
6e5: 8b 50 04 mov 0x4(%eax),%edx
6e8: 8d 34 d0 lea (%eax,%edx,8),%esi
6eb: 39 f1 cmp %esi,%ecx
6ed: 74 28 je 717 <free+0x77>
p->s.size += bp->s.size;
p->s.ptr = bp->s.ptr;
} else
p->s.ptr = bp;
6ef: 89 08 mov %ecx,(%eax)
freep = p;
}
6f1: 5b pop %ebx
freep = p;
6f2: a3 14 0b 00 00 mov %eax,0xb14
}
6f7: 5e pop %esi
6f8: 5f pop %edi
6f9: 5d pop %ebp
6fa: c3 ret
6fb: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
6ff: 90 nop
bp->s.size += p->s.ptr->s.size;
700: 03 72 04 add 0x4(%edx),%esi
703: 89 73 fc mov %esi,-0x4(%ebx)
bp->s.ptr = p->s.ptr->s.ptr;
706: 8b 10 mov (%eax),%edx
708: 8b 12 mov (%edx),%edx
70a: 89 53 f8 mov %edx,-0x8(%ebx)
if(p + p->s.size == bp){
70d: 8b 50 04 mov 0x4(%eax),%edx
710: 8d 34 d0 lea (%eax,%edx,8),%esi
713: 39 f1 cmp %esi,%ecx
715: 75 d8 jne 6ef <free+0x4f>
p->s.size += bp->s.size;
717: 03 53 fc add -0x4(%ebx),%edx
freep = p;
71a: a3 14 0b 00 00 mov %eax,0xb14
p->s.size += bp->s.size;
71f: 89 50 04 mov %edx,0x4(%eax)
p->s.ptr = bp->s.ptr;
722: 8b 53 f8 mov -0x8(%ebx),%edx
725: 89 10 mov %edx,(%eax)
}
727: 5b pop %ebx
728: 5e pop %esi
729: 5f pop %edi
72a: 5d pop %ebp
72b: c3 ret
72c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
00000730 <malloc>:
return freep;
}
void*
malloc(uint nbytes)
{
730: 55 push %ebp
731: 89 e5 mov %esp,%ebp
733: 57 push %edi
734: 56 push %esi
735: 53 push %ebx
736: 83 ec 1c sub $0x1c,%esp
Header *p, *prevp;
uint nunits;
nunits = (nbytes + sizeof(Header) - 1)/sizeof(Header) + 1;
739: 8b 45 08 mov 0x8(%ebp),%eax
if((prevp = freep) == 0){
73c: 8b 3d 14 0b 00 00 mov 0xb14,%edi
nunits = (nbytes + sizeof(Header) - 1)/sizeof(Header) + 1;
742: 8d 70 07 lea 0x7(%eax),%esi
745: c1 ee 03 shr $0x3,%esi
748: 83 c6 01 add $0x1,%esi
if((prevp = freep) == 0){
74b: 85 ff test %edi,%edi
74d: 0f 84 ad 00 00 00 je 800 <malloc+0xd0>
base.s.ptr = freep = prevp = &base;
base.s.size = 0;
}
for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){
753: 8b 17 mov (%edi),%edx
if(p->s.size >= nunits){
755: 8b 4a 04 mov 0x4(%edx),%ecx
758: 39 f1 cmp %esi,%ecx
75a: 73 72 jae 7ce <malloc+0x9e>
75c: 81 fe 00 10 00 00 cmp $0x1000,%esi
762: bb 00 10 00 00 mov $0x1000,%ebx
767: 0f 43 de cmovae %esi,%ebx
p = sbrk(nu * sizeof(Header));
76a: 8d 04 dd 00 00 00 00 lea 0x0(,%ebx,8),%eax
771: 89 45 e4 mov %eax,-0x1c(%ebp)
774: eb 1b jmp 791 <malloc+0x61>
776: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
77d: 8d 76 00 lea 0x0(%esi),%esi
for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){
780: 8b 02 mov (%edx),%eax
if(p->s.size >= nunits){
782: 8b 48 04 mov 0x4(%eax),%ecx
785: 39 f1 cmp %esi,%ecx
787: 73 4f jae 7d8 <malloc+0xa8>
789: 8b 3d 14 0b 00 00 mov 0xb14,%edi
78f: 89 c2 mov %eax,%edx
p->s.size = nunits;
}
freep = prevp;
return (void*)(p + 1);
}
if(p == freep)
791: 39 d7 cmp %edx,%edi
793: 75 eb jne 780 <malloc+0x50>
p = sbrk(nu * sizeof(Header));
795: 83 ec 0c sub $0xc,%esp
798: ff 75 e4 pushl -0x1c(%ebp)
79b: e8 e9 fb ff ff call 389 <sbrk>
if(p == (char*)-1)
7a0: 83 c4 10 add $0x10,%esp
7a3: 83 f8 ff cmp $0xffffffff,%eax
7a6: 74 1c je 7c4 <malloc+0x94>
hp->s.size = nu;
7a8: 89 58 04 mov %ebx,0x4(%eax)
free((void*)(hp + 1));
7ab: 83 ec 0c sub $0xc,%esp
7ae: 83 c0 08 add $0x8,%eax
7b1: 50 push %eax
7b2: e8 e9 fe ff ff call 6a0 <free>
return freep;
7b7: 8b 15 14 0b 00 00 mov 0xb14,%edx
if((p = morecore(nunits)) == 0)
7bd: 83 c4 10 add $0x10,%esp
7c0: 85 d2 test %edx,%edx
7c2: 75 bc jne 780 <malloc+0x50>
return 0;
}
}
7c4: 8d 65 f4 lea -0xc(%ebp),%esp
return 0;
7c7: 31 c0 xor %eax,%eax
}
7c9: 5b pop %ebx
7ca: 5e pop %esi
7cb: 5f pop %edi
7cc: 5d pop %ebp
7cd: c3 ret
if(p->s.size >= nunits){
7ce: 89 d0 mov %edx,%eax
7d0: 89 fa mov %edi,%edx
7d2: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
if(p->s.size == nunits)
7d8: 39 ce cmp %ecx,%esi
7da: 74 54 je 830 <malloc+0x100>
p->s.size -= nunits;
7dc: 29 f1 sub %esi,%ecx
7de: 89 48 04 mov %ecx,0x4(%eax)
p += p->s.size;
7e1: 8d 04 c8 lea (%eax,%ecx,8),%eax
p->s.size = nunits;
7e4: 89 70 04 mov %esi,0x4(%eax)
freep = prevp;
7e7: 89 15 14 0b 00 00 mov %edx,0xb14
}
7ed: 8d 65 f4 lea -0xc(%ebp),%esp
return (void*)(p + 1);
7f0: 83 c0 08 add $0x8,%eax
}
7f3: 5b pop %ebx
7f4: 5e pop %esi
7f5: 5f pop %edi
7f6: 5d pop %ebp
7f7: c3 ret
7f8: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
7ff: 90 nop
base.s.ptr = freep = prevp = &base;
800: c7 05 14 0b 00 00 18 movl $0xb18,0xb14
807: 0b 00 00
base.s.size = 0;
80a: bf 18 0b 00 00 mov $0xb18,%edi
base.s.ptr = freep = prevp = &base;
80f: c7 05 18 0b 00 00 18 movl $0xb18,0xb18
816: 0b 00 00
for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){
819: 89 fa mov %edi,%edx
base.s.size = 0;
81b: c7 05 1c 0b 00 00 00 movl $0x0,0xb1c
822: 00 00 00
if(p->s.size >= nunits){
825: e9 32 ff ff ff jmp 75c <malloc+0x2c>
82a: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
prevp->s.ptr = p->s.ptr;
830: 8b 08 mov (%eax),%ecx
832: 89 0a mov %ecx,(%edx)
834: eb b1 jmp 7e7 <malloc+0xb7>
| 33.633231 | 60 | 0.411497 |
5ee84d55ecace60b167553c64899c7215423dc7c | 731 | asm | Assembly | tests/assembly/DEC.asm | danecreekphotography/6502ts | 85716cf12f879d7c16c297de3251888c32abba6a | [
"MIT"
] | null | null | null | tests/assembly/DEC.asm | danecreekphotography/6502ts | 85716cf12f879d7c16c297de3251888c32abba6a | [
"MIT"
] | null | null | null | tests/assembly/DEC.asm | danecreekphotography/6502ts | 85716cf12f879d7c16c297de3251888c32abba6a | [
"MIT"
] | null | null | null | ; Verifies DEC
.segment "VECTORS"
.word $eaea
.word init
.word $eaea
.segment "ZEROPAGE"
; Used for zero page address mode testing
zp:
.byte %00000000
.byte $00000001
.byte %10000000
zpx:
.byte $00 ; Padding
.byte %00000000
.byte $00000001
.byte %10000000
.code
init:
dec zp
dec zp + 1
dec zp + 2
dec zpx,x ; x will be $01
dec zpx,x ; x will be $02
dec zpx,x ; x will be $03
dec data
dec data + 1
dec data + 2
dec datax,x ; x will be $01
dec datax,x ; x will be $02
dec datax,x ; x will be $03
.segment "DATA"
data:
.byte %00000000
.byte $00000001
.byte %10000000
datax:
.byte $00 ; Padding
.byte %00000000
.byte $00000001
.byte %10000000 | 13.537037 | 41 | 0.604651 |
78231c037fd4c621ec49513b1b1e0b79eb06faa6 | 453 | asm | Assembly | oeis/116/A116089.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/116/A116089.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/116/A116089.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A116089: Riordan array (1, x*(1+x)^3).
; Submitted by Jon Maiga
; 1,0,1,0,3,1,0,3,6,1,0,1,15,9,1,0,0,20,36,12,1,0,0,15,84,66,15,1,0,0,6,126,220,105,18,1,0,0,1,126,495,455,153,21,1,0,0,0,84,792,1365,816,210,24,1,0,0,0,36,924,3003,3060,1330,276,27,1,0,0,0,9,792,5005,8568,5985,2024,351,30,1,0,0,0,1,495,6435,18564,20349,10626,2925,435,33,1,0,0,0,0,220,6435,31824,54264,42504
lpb $0
add $1,1
sub $0,$1
mov $2,$1
sub $2,$0
lpe
mul $0,3
bin $0,$2
| 34.846154 | 308 | 0.633554 |
9905923f84ae912ed7832aad1fac315af24da73b | 807 | asm | Assembly | oeis/193/A193645.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/193/A193645.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/193/A193645.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A193645: Number of arrays of -5..5 integers x(1..n) with every x(i) in a subsequence of length 1 or 2 with sum zero.
; Submitted by Jamie Morken(s3)
; 1,11,31,151,561,2361,9361,38171,153591,621911,2510721,10150321,41008321,165729931,669676751,2706201271,10935546481,44190379881,178571332881,721601251291,2915963545511,11783308434231,47615926483841,192414283987041,777539288279041,3142008774938251,12696746140095871,51307101767976791,207330181431658801,837813923147227801,3385576399515702801,13680994365640886811,55284413850554623831,223402359025752044951,902761023221581967361,3648025332499734918161,14741541209797877620161,59570046102815216552971
lpb $0
sub $0,1
mul $1,6
add $1,$3
add $2,2
add $2,$3
mov $3,$4
mov $4,$2
add $2,$1
mov $1,$4
add $3,$4
lpe
mov $0,$4
mul $0,5
add $0,1
| 40.35 | 498 | 0.791822 |
4f05db984c89c793a5341829ec0e2676b906c89f | 3,301 | asm | Assembly | 2 Year/2015 Pattern/MPL/Assignment 10.asm | bhushanasati25/College | 638ab4f038a783beae297652623e8c6679465fef | [
"MIT"
] | 4 | 2020-10-22T15:37:09.000Z | 2022-02-17T17:30:03.000Z | 2 Year/2015 Pattern/MPL/Assignment 10.asm | mohitkhedkar/College | f713949827d69f13b1bf8fb082e86e8bead7ac6e | [
"MIT"
] | null | null | null | 2 Year/2015 Pattern/MPL/Assignment 10.asm | mohitkhedkar/College | f713949827d69f13b1bf8fb082e86e8bead7ac6e | [
"MIT"
] | 5 | 2021-06-19T01:23:18.000Z | 2022-02-26T14:47:15.000Z | ;Problem Statement:Write 80387 ALP to find the roots of the quadratic equation. All the possible cases must be considered in calculating the roots.
section .data
msg1 db "Complex Root",10
msglen1 equ $-msg1
msg2 db "Root1: "
msglen2 equ $-msg2
msg3 db "Root2: "
msglen3 equ $-msg3
a dd 1.00
b dd 8.00
c dd 15.00
four dd 4.00
two dd 2.00
hdec dq 100
point db "."
section .bss
root1 resd 1
root2 resd 1
resbuff rest 1
temp resb 2
disc resd 1
%macro write 2 ;macro for display
mov rax,1
mov rdi,1
mov rsi,%1
mov rdx,%2
syscall
%endmacro
%macro read 2 ;macro for input
mov rax,0
mov rdi,0
mov rsi,%1
mov rdx,%2
syscall
%endmacro
%macro exit 0 ;macro for exit
mov rax,60
xor rdi,rdi
syscall
%endmacro
section .text
global _start
_start:
finit ; initialise 80387 co-processor
fld dword[b] ; stack: b
fmul dword[b] ; stack: b*b
fld dword[a] ; stack: a, b*b
fmul dword[c] ; stack: a*c, b*b
fmul dword[four] ; stack: 4*a*c,b*b
fsub ; stack: b*b - 4*a*c
ftst ; compares ST0 and 0
fstsw ax ;Stores the coprocessor status word ;into either a word in memory or the AX register
sahf ;Stores the AH register into the FLAGS register.
jb no_real_solutions ; if disc < 0, no real solutions
fsqrt ; stack: sqrt(b*b - 4*a*c)
fst dword[disc] ; store disc= sqrt(b*b - 4*a*c)
fsub dword[b] ; stack: disc-b
fdiv dword[a] ; stack: disc-b/2*a or (-b+disc)/2a
fdiv dword[two]
write msg2,msglen2
call disp_proc
fldz ;stack:0
fsub dword[disc] ;stack:-disc
fsub dword[b] ; stack: -disc - b
fdiv dword[a] ; stack: (-b - disc)/(2*a)
fdiv dword[two]
write msg3,msglen3
call disp_proc
jmp exi
no_real_solutions:
write msg1,msglen1
exi :
mov rax,60
mov rdi,1
syscall
disp_proc:
FIMUL dword[hdec]
FBSTP tword[resbuff]
mov rsi,resbuff+9
mov rcx,09
next1:
push rcx
push rsi
mov bl,[rsi]
call disp
pop rsi
pop rcx
dec rsi
loop next1
push rsi
write point,1
pop rsi
mov bl,[rsi]
call disp
ret
disp:
mov edi,temp ;mov dnum address into edi
mov ecx,02 ;initialize ecx with 2
dispup1:
rol bl,4 ;rotate bl by 4 bits
mov dl,bl ;move bl into dl
and dl,0fh ;and of dl with 0fh
add dl,30h ;add 30h into dl
cmp dl,39h ;compare dl with 39h
jbe dispskip1 ;jump if below and equal to dispskip1
add dl,07h ;add 7h into dl
dispskip1:
mov [edi],dl ;mov dl into dnum
inc edi ;increament edi by a byte
loop dispup1 ;loop dispup1 while ecx not zero
write temp,2 ;Display dnum by calling macro
ret ;return from procedure
| 22.154362 | 148 | 0.524387 |
2ab97957a45996e2a580e8ae6295cab04ab3a293 | 364 | asm | Assembly | programs/oeis/006/A006659.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/006/A006659.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/006/A006659.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A006659: Closed meander systems of order n+1 with n components.
; 2,12,56,240,990,4004,16016,63648,251940,994840,3922512,15452320,60843510,239519700,942871200,3711935040,14615744220,57562286760,226760523600,893550621600,3522078700140,13887053160552,54771314563296,216086506731200,852769964064200,3366382947795504
mov $1,4
add $1,$0
add $1,$0
bin $1,$0
mul $1,2
| 40.444444 | 248 | 0.815934 |
3ffca799f9931b631a878d5835b3566aea35a388 | 2,040 | asm | Assembly | src/shaders/h264/mc/save_8x8_Y.asm | tizenorg/platform.upstream.libva-intel-driver | 9ffc32731bacbfec2cef3d9fb5eb4c0c43952b90 | [
"MIT"
] | null | null | null | src/shaders/h264/mc/save_8x8_Y.asm | tizenorg/platform.upstream.libva-intel-driver | 9ffc32731bacbfec2cef3d9fb5eb4c0c43952b90 | [
"MIT"
] | null | null | null | src/shaders/h264/mc/save_8x8_Y.asm | tizenorg/platform.upstream.libva-intel-driver | 9ffc32731bacbfec2cef3d9fb5eb4c0c43952b90 | [
"MIT"
] | null | null | null | /*
* Save Intra_8x8 decoded Y picture data to frame buffer
* Copyright © <2010>, Intel Corporation.
*
* This program is licensed under the terms and conditions of the
* Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
* http://www.opensource.org/licenses/eclipse-1.0.php.
*
*/
#if !defined(__SAVE_8X8_Y__) // Make sure this is only included once
#define __SAVE_8X8_Y__
// Module name: save_8x8_Y.asm
//
// Save Intra_8x8 decoded Y picture data to frame buffer
// NotE: Every 4 rows of Y data are interleaved with the horizontal neighboring blcok
//
save_8x8_Y:
mov (1) MSGSRC.2:ud 0x000F000F:ud {NoDDClr} // Block width and height (16x16)
mov (2) MSGSRC.0:ud I_ORIX<2;2,1>:w {NoDDChk} // X, Y offset
// Update message descriptor based on previous read setup
//
#ifdef DEV_ILK
add (1) MSGDSC MSGDSC MSG_LEN(8)+DWBWMSGDSC_WC-DWBRMSGDSC_RC-0x00200000:ud // Set message descriptor
#else
add (1) MSGDSC MSGDSC MSG_LEN(8)+DWBWMSGDSC_WC-DWBRMSGDSC_RC-0x00020000:ud // Set message descriptor
#endif // DEV_ILK
mov (16) MSGPAYLOAD(0)<1> DEC_Y(0)<32;8,1>
mov (16) MSGPAYLOAD(0,16)<1> DEC_Y(0,8)<32;8,1>
mov (16) MSGPAYLOAD(1,0)<1> DEC_Y(0,16)<32;8,1>
mov (16) MSGPAYLOAD(1,16)<1> DEC_Y(0,24)<32;8,1>
mov (16) MSGPAYLOAD(2)<1> DEC_Y(2)<32;8,1>
mov (16) MSGPAYLOAD(2,16)<1> DEC_Y(2,8)<32;8,1>
mov (16) MSGPAYLOAD(3,0)<1> DEC_Y(2,16)<32;8,1>
mov (16) MSGPAYLOAD(3,16)<1> DEC_Y(2,24)<32;8,1>
mov (16) MSGPAYLOAD(4)<1> DEC_Y(4)<32;8,1>
mov (16) MSGPAYLOAD(4,16)<1> DEC_Y(4,8)<32;8,1>
mov (16) MSGPAYLOAD(5,0)<1> DEC_Y(4,16)<32;8,1>
mov (16) MSGPAYLOAD(5,16)<1> DEC_Y(4,24)<32;8,1>
mov (16) MSGPAYLOAD(6)<1> DEC_Y(6)<32;8,1>
mov (16) MSGPAYLOAD(6,16)<1> DEC_Y(6,8)<32;8,1>
mov (16) MSGPAYLOAD(7,0)<1> DEC_Y(6,16)<32;8,1>
mov (16) MSGPAYLOAD(7,16)<1> DEC_Y(6,24)<32;8,1>
send (8) REG_WRITE_COMMIT_Y<1>:ud MSGHDR MSGSRC<8;8,1>:ud DAPWRITE MSGDSC
RETURN
// End of save_8x8_Y
#endif // !defined(__SAVE_8X8_Y__)
| 35.789474 | 107 | 0.661275 |
912b809760a27cc0872131ccf0f61b2dba72c1ff | 5,273 | asm | Assembly | Transynther/x86/_processed/NC/_zr_/i7-7700_9_0xca_notsx.log_21829_1549.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NC/_zr_/i7-7700_9_0xca_notsx.log_21829_1549.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NC/_zr_/i7-7700_9_0xca_notsx.log_21829_1549.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r11
push %r13
push %r14
push %r15
push %r9
push %rax
lea addresses_WC_ht+0x10626, %r15
nop
nop
dec %r14
mov (%r15), %r10d
nop
nop
and $30962, %rax
lea addresses_D_ht+0xd08e, %r11
nop
nop
xor $64871, %r13
mov (%r11), %r9
and $47643, %r11
lea addresses_D_ht+0x6f14, %r10
nop
nop
nop
add $31213, %r15
mov $0x6162636465666768, %r11
movq %r11, %xmm2
movups %xmm2, (%r10)
nop
inc %r9
lea addresses_D_ht+0xe134, %rax
nop
nop
nop
nop
nop
and %r10, %r10
mov (%rax), %r13
nop
sub %rax, %rax
lea addresses_WC_ht+0x1a376, %r15
nop
nop
sub %r10, %r10
mov (%r15), %r9d
nop
nop
nop
nop
cmp %r11, %r11
pop %rax
pop %r9
pop %r15
pop %r14
pop %r13
pop %r11
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r13
push %r14
push %r8
push %r9
push %rax
push %rdi
// Store
lea addresses_normal+0xff14, %r9
nop
nop
nop
nop
nop
cmp $39056, %r14
mov $0x5152535455565758, %r11
movq %r11, %xmm5
movups %xmm5, (%r9)
add $22000, %r11
// Faulty Load
mov $0x541abb0000000714, %r11
nop
add %r13, %r13
mov (%r11), %r8
lea oracles, %r9
and $0xff, %r8
shlq $12, %r8
mov (%r9,%r8,1), %r8
pop %rdi
pop %rax
pop %r9
pop %r8
pop %r14
pop %r13
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'src': {'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 0, 'same': False, 'type': 'addresses_NC'}, 'OP': 'LOAD'}
{'dst': {'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 8, 'same': False, 'type': 'addresses_normal'}, 'OP': 'STOR'}
[Faulty Load]
{'src': {'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 0, 'same': True, 'type': 'addresses_NC'}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 0, 'same': False, 'type': 'addresses_WC_ht'}, 'OP': 'LOAD'}
{'src': {'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 0, 'same': False, 'type': 'addresses_D_ht'}, 'OP': 'LOAD'}
{'dst': {'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 11, 'same': False, 'type': 'addresses_D_ht'}, 'OP': 'STOR'}
{'src': {'NT': True, 'AVXalign': False, 'size': 8, 'congruent': 4, 'same': False, 'type': 'addresses_D_ht'}, 'OP': 'LOAD'}
{'src': {'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 0, 'same': False, 'type': 'addresses_WC_ht'}, 'OP': 'LOAD'}
{'00': 21829}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
| 43.941667 | 2,999 | 0.656173 |
f4d36a929ac5b450285b808168ef6e63610d41bb | 376 | asm | Assembly | oeis/119/A119411.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/119/A119411.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/119/A119411.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A119411: Product of the first prime(n) primes.
; Submitted by Jon Maiga
; 6,30,2310,510510,200560490130,304250263527210,1922760350154212639070,7858321551080267055879090,267064515689275851355624017992790,279734996817854936178276161872067809674997230
seq $0,6093 ; a(n) = prime(n) - 1.
seq $0,88860 ; Twice the primorials (first definition), 2*A002110(n).
div $0,12
mul $0,6
| 41.777778 | 176 | 0.795213 |
12fa1228c33bf8edee471f32afa80a26e39d146a | 691 | asm | Assembly | oeis/068/A068203.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/068/A068203.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/068/A068203.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A068203: Chebyshev T-polynomials T(n,15) with Diophantine property.
; Submitted by Jon Maiga
; 1,15,449,13455,403201,12082575,362074049,10850138895,325142092801,9743412645135,291977237261249,8749573705192335,262195233918508801,7857107443850071695,235451028081583642049,7055673735003659189775,211434761022028192051201,6335987156925842102346255,189868179946753234878336449,5689709411245671204247747215,170501414157423382892554080001,5109352715311455815572374652815,153110080045186251084278685504449,4588193048640276076712788190480655,137492681379163096050299367028915201
mov $3,1
lpb $0
sub $0,1
mul $1,28
add $3,$1
add $2,$3
mov $1,$2
add $3,2
lpe
mov $0,$1
mul $0,14
add $0,1
| 40.647059 | 475 | 0.842258 |
549717785f2e0ec09286793f9ea90785cbafbd3d | 460 | asm | Assembly | tests/Arithmetic/Sum_of_n_8b.asm | ZubinGou/8086-emulator | 5087be61609fa571d16f34280211830746beaef1 | [
"MIT"
] | 39 | 2020-09-09T00:04:18.000Z | 2022-03-26T13:12:47.000Z | tests/Arithmetic/Sum_of_n_8b.asm | ZubinGou/8086-emulator | 5087be61609fa571d16f34280211830746beaef1 | [
"MIT"
] | null | null | null | tests/Arithmetic/Sum_of_n_8b.asm | ZubinGou/8086-emulator | 5087be61609fa571d16f34280211830746beaef1 | [
"MIT"
] | 8 | 2020-05-06T07:35:40.000Z | 2021-08-13T14:00:49.000Z | NAME Arithmetic
TITLE Sum_of_n_8b
; Test Passed
assume ds:data,cs:code
data segment
a db 1,2,3,4,5,6,7,8,9,10
data ends
code segment
start:
mov ax,data
mov ds,ax
mov cl,10
lea bx,a
mov ah,00
mov al,00
l1:
add al,byte ptr [bx]
inc bx
dec cl
cmp cl,00
jnz l1
mov ah,4ch
int 21h
code ends
end start | 15.333333 | 29 | 0.473913 |
855a58485a36fe9cbb0fc562c8210c95460760df | 636 | asm | Assembly | oeis/287/A287335.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/287/A287335.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/287/A287335.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A287335: Nonnegative numbers k such that 3*k + 2 is a cube.
; 2,41,170,443,914,1637,2666,4055,5858,8129,10922,14291,18290,22973,28394,34607,41666,49625,58538,68459,79442,91541,104810,119303,135074,152177,170666,190595,212018,234989,259562,285791,313730,343433,374954,408347,443666,480965,520298,561719,605282,651041,699050,749363,802034,857117,914666,974735,1037378,1102649,1170602,1241291,1314770,1391093,1470314,1552487,1637666,1725905,1817258,1911779,2009522,2110541,2214890,2322623,2433794,2548457,2666666,2788475,2913938,3043109,3176042,3312791,3453410
mov $1,6
mul $1,$0
add $1,4
pow $1,3
div $1,72
mul $1,3
add $1,2
mov $0,$1
| 53 | 497 | 0.798742 |
1c40f7100a619fff5068d119aee3cdd5e7fb2604 | 509 | asm | Assembly | oeis/121/A121008.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/121/A121008.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/121/A121008.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A121008: Numerators of partial alternating sums of Catalan numbers scaled by powers of 1/(5*3^2) = 1/45.
; Submitted by Jon Maiga
; 1,44,1982,17837,4013339,60200071,2709003239,121905145612,658287786362,740573759652388,33325819184374256,1499661863296782734,67484783848355431042,607363054635198730798,3036815273175993713422
mul $0,2
mov $1,1
lpb $0
mov $2,$0
sub $0,1
add $3,$1
mul $1,9
mul $3,$0
sub $0,1
mul $1,5
add $2,2
mul $1,$2
mul $3,-4
lpe
add $1,$3
gcd $3,$1
div $1,$3
mov $0,$1
| 22.130435 | 191 | 0.709234 |
4fae87ce608d97daa21df07ecf7cc22fd5239f8b | 3,315 | asm | Assembly | programs/oeis/017/A017140.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/017/A017140.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/017/A017140.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A017140: a(n) = (8*n+6)^4.
; 1296,38416,234256,810000,2085136,4477456,8503056,14776336,24010000,37015056,54700816,78074896,108243216,146410000,193877776,252047376,322417936,406586896,506250000,623201296,759333136,916636176,1097199376,1303210000,1536953616,1800814096,2097273616,2428912656,2798410000,3208542736,3662186256,4162314256,4711998736,5314410000,5972816656,6690585616,7471182096,8318169616,9235210000,10226063376,11294588176,12444741136,13680577296,15006250000,16426010896,17944209936,19565295376,21293813776,23134410000,25091827216,27170906896,29376588816,31713911056,34188010000,36804120336,39567575056,42483805456,45558341136,48796810000,52204938256,55788550416,59553569296,63506016016,67652010000,71997768976,76549608976,81313944336,86297287696,91506250000,96947540496,102627966736,108554434576,114733948176,121173610000,127880620816,134862279696,142125984016,149679229456,157529610000,165684817936,174152643856,182940976656,192057803536,201511210000,211309379856,221460595216,231973236496,242855782416,254116810000,265764994576,277809109776,290258027536,303120718096,316406250000,330123790096,344282603536,358892053776,373961602576,389500810000,405519334416,422026932496,439033459216,456548867856,474583210000,493146635536,512249392656,531901827856,552114385936,572897610000,594262141456,616218720016,638778183696,661951468816,685749610000,710183740176,735265090576,761004990736,787414868496,814506250000,842290759696,870780120336,899986152976,929920776976,960596010000,992023968016,1024216865296,1057187014416,1090946826256,1125508810000,1160885573136,1197089821456,1234134359056,1272032088336,1310796010000,1350439223056,1390974924816,1432416410896,1474777075216,1518070410000,1562310005776,1607509551376,1653682833936,1700843738896,1749006250000,1798184449296,1848392517136,1899644732176,1951955471376,2005339210000,2059810521616,2115384078096,2172074649616,2229897104656,2288866410000,2348997630736,2410305930256,2472806570256,2536514910736,2601446410000,2667616624656,2735041209616,2803735918096,2873716601616,2944999210000,3017599791376,3091534492176,3166819557136,3243471329296,3321506250000,3400940858896,3481791793936,3564075791376,3647809685776,3733010410000,3819694995216,3907880570896,3997584364816,4088823703056,4181616010000,4275978808336,4371929719056,4469486461456,4568666853136,4669488810000,4771970346256,4876129574416,4981984705296,5089554048016,5198856010000,5309909096976,5422731912976,5537343160336,5653761639696,5772006250000,5892095988496,6014049950736,6137887330576,6263627420176,6391289610000,6520893388816,6652458343696,6786004160016,6921550621456,7059117610000,7198725105936,7340393187856,7484142032656,7629991915536,7777963210000,7928076387856,8080352019216,8234810772496,8391473414416,8550360810000,8711493922576,8874893813776,9040581643536,9208578670096,9378906250000,9551585838096,9726638987536,9904087349776,10083952674576,10266256810000,10451021702416,10638269396496,10828022035216,11020301859856,11215131210000,11412532523536,11612528336656,11815141283856,12020394097936,12228309610000,12438910749456,12652220544016,12868262119696,13087058700816,13308633610000,13533010268176,13760212194576,13990263006736,14223186420496,14459006250000,14697746407696,14939430904336,15184083848976,15431729448976,15682392010000,15936095936016
mov $1,$0
mul $1,8
add $1,6
pow $1,4
| 414.375 | 3,247 | 0.913725 |
4b3ea5075a0dbd96db0801fbe4a7026d3b11d679 | 493 | asm | Assembly | oeis/268/A268676.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/268/A268676.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/268/A268676.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A268676: a(n) = A101080(n,A268823(3+n)), where A101080(x,y) gives the Hamming distance between binary expansions of x and y.
; Submitted by Christian Krause
; 1,3,3,1,3,1,1,3,3,1,1,3,1,3,3,1,3,1,1,3,1,3,3,1,1,3,3,1,3,1,1,3,3,1,1,3,1,3,3,1,1,3,3,1,3,1,1,3,1,3,3,1,3,1,1,3,3,1,1,3,1,3,3,1,3,1,1,3,1,3,3,1,1,3,3,1,3,1,1,3,1,3,3,1,3,1,1,3,3,1,1,3,1,3,3,1,1,3,3,1
seq $0,120 ; 1's-counting sequence: number of 1's in binary expansion of n (or the binary weight of n).
mod $0,2
mul $0,2
add $0,1
| 54.777778 | 201 | 0.626775 |
149713f4bc977bf5d351f06eb5bc5de754a83e69 | 5,471 | asm | Assembly | cmd/mem/wintest.asm | minblock/msdos | 479ffd237d9bb7cc83cb06361db2c4ef42dfbac0 | [
"Apache-2.0"
] | null | null | null | cmd/mem/wintest.asm | minblock/msdos | 479ffd237d9bb7cc83cb06361db2c4ef42dfbac0 | [
"Apache-2.0"
] | null | null | null | cmd/mem/wintest.asm | minblock/msdos | 479ffd237d9bb7cc83cb06361db2c4ef42dfbac0 | [
"Apache-2.0"
] | null | null | null | ;/*
; * Microsoft Confidential
; * Copyright (C) Microsoft Corporation 1988 - 1993
; * All Rights Reserved.
; */
;
; Checks to see if Windows is running. Returns 1 if Windows 3.0 or
; above is running, 0 otherwise.
.MODEL SMALL
TRUE EQU 1
NO_WINDOWS EQU 0
WIN_286 EQU 1
WIN_386 EQU 2
WIN_REAL_MODE EQU 3
WIN_STANDARD_MODE EQU 4
WIN_ENHANCED_MODE EQU 5
WIN_UNKNOWN_MODE EQU 6
wWindowsType EQU Word Ptr [bp-02]
wWindowsMajor EQU Word Ptr [bp-04]
wWindowsMinor EQU Word Ptr [bp-06]
fDosShell EQU Word Ptr [bp-08]
.CODE
public _IsWindowsRunning
_IsWindowsRunning proc
; Make room for local variables
push bp
mov bp,sp
sub sp,8
; Set fDosShell to FALSE
xor ax,ax ; Zero out fDosShell
mov fDosShell,ax
;*************************************************************************
;* The following code was taken from MSD 2.01's OSINFO.C, WinVerDetect() *
;*************************************************************************
; Check for Windows 3.1
mov ax,160Ah ; WIN31CHECK
int 2Fh ; check if running under win 3.1
or ax,ax
jnz Win30EnhModeCheck
; Windows 3.1 detected
mov wWindowsMajor,3 ; Set the version number
mov wWindowsMinor,10
; CX = 3 - Enhanced, CX = 2 - Standard, CX = 1 - Real.
cmp cx,1
jne Win31StdChk
mov wWindowsType, WIN_REAL_MODE
jmp WinDetectComplete
Win31StdChk:
cmp cx,2
jne Win31EnhChk
mov wWindowsType, WIN_STANDARD_MODE
jmp WinDetectComplete
Win31EnhChk:
cmp cx,3
jne Win31UnknownMode
mov wWindowsType, WIN_ENHANCED_MODE
jmp WinDetectComplete
Win31UnknownMode:
mov wWindowsType, WIN_UNKNOWN_MODE
jmp WinDetectComplete
; Check for 3.0 Enhanced mode
Win30EnhModeCheck:
mov ax,1600h ; WIN386CHECK
int 2Fh
test al,7Fh
jz Win286Check
; Windows 3.0 Enhanced Mode detected
mov wWindowsMajor,3 ; Set the version number
mov wWindowsMinor,0
; Set the mode
mov wWindowsType, WIN_ENHANCED_MODE
jmp WinDetectComplete
; Check for Windows/286
Win286Check:
mov ax,1700h ; WIN286CHECK
int 2Fh
cmp al,2h ; If /286 installed, ver = AL.AH
jnz WinOldApCheck ; /286 is always 2.x
; Windows/286 detected
xor bh,bh
mov bl,al
mov wWindowsMajor,bx
mov bl,ah
mov wWindowsMinor,bx
mov wWindowsType, WIN_286
jmp WinDetectComplete
; Check for Windows 3.0 WINOLDAP
WinOldApCheck:
mov ax,4680h ; IS_WINOLDAP_ACTIVE
int 2Fh
or ax,ax ; running under 3.0 derivative ?
jz DosShellCheck
; Windows is not running on this computer
jmp NotRunningUnderWin
; Check for DOS 5.0 DOSSHELL Task Switcher
DosShellCheck:
mov ax,4b02h ; detect switcher
push bx
push es
push di
xor bx,bx
mov di,bx
mov es,bx
int 2Fh
pop di
pop es
pop bx
or ax,ax
jnz RunningUnderWinStdReal30
; Running under DOS 5.0 task switcher
mov wWindowsMajor,0 ; Windows is not running
mov wWindowsMinor,0
mov wWindowsType, NO_WINDOWS
mov fDosShell, TRUE ; Set the flag for the DOSSHELL
jmp WinDetectComplete
RunningUnderWinStdReal30:
mov ax,1605h ; PMODE_START
int 2Fh
cmp cx,-1
jnz Running30RealOr386
; Windows 3.0 Standard Mode detected
mov ax,1606h ; PMODE_STOP
int 2Fh ; in case someone is accounting.
mov wWindowsMajor,3 ; Set the version number
mov wWindowsMinor,0
; Set the Windows mode
mov wWindowsType, WIN_STANDARD_MODE
jmp WinDetectComplete
Running30RealOr386:
mov ax,1606h ; PMODE_STOP
int 2Fh ; in case someone is accounting.
cmp al,1 ; WIN386CHECK again
jnz RunningUnderRealMode
cmp al,0FFh
jz RunningUnderWin386
RunningUnderRealMode:
mov wWindowsMajor,3 ; Set the version number
mov wWindowsMinor,0
; Set the Windows mode
mov wWindowsType, WIN_REAL_MODE
jmp WinDetectComplete
RunningUnderWin386:
mov wWindowsMajor,2
mov wWindowsMinor,0FFh
mov wWindowsType, WIN_386
jmp WinDetectComplete
NotRunningUnderWin:
mov wWindowsMajor,0 ; Windows is not running
mov wWindowsMinor,0
mov wWindowsType, NO_WINDOWS
WinDetectComplete:
;************************************************************************
;* The previous code was taken from MSD 2.01's OSINFO.C, WinVerDetect() *
;************************************************************************
; Return 1 if wWindowsType != NO_WINDOWS
mov ax,wWindowsType ; AX == Windows type
or ax,ax ; Is it zero
jz ReturnToCaller ; True: Return
mov ax,1 ; If Windows is active, return 1
ReturnToCaller:
mov sp,bp
pop bp
ret
_IsWindowsRunning endp
end
| 22.795833 | 74 | 0.558947 |
090618a8d14984d92db5b995fcd3d45d52ffd9ec | 447 | asm | Assembly | assets/kernels/asm/interrupt.asm | Mati365/ts-c99-compiler-toolkit | ca0d9a15c955abaedb32b07a44a0801cc22c5802 | [
"MIT",
"Intel",
"Unlicense"
] | 66 | 2016-10-15T23:47:05.000Z | 2022-01-02T06:31:31.000Z | assets/kernels/asm/interrupt.asm | Mati365/ts-c99-compiler-toolkit | ca0d9a15c955abaedb32b07a44a0801cc22c5802 | [
"MIT",
"Intel",
"Unlicense"
] | 22 | 2019-06-19T18:00:27.000Z | 2021-12-18T14:04:54.000Z | assets/kernels/asm/interrupt.asm | Mati365/ts-c99-compiler-toolkit | ca0d9a15c955abaedb32b07a44a0801cc22c5802 | [
"MIT",
"Intel",
"Unlicense"
] | 8 | 2020-04-22T08:46:54.000Z | 2021-11-23T15:01:26.000Z | %macro mount_interrupt 2
; %1 - code
; %2 - handler
mov ax, %1
mov bx, 4
imul bx
mov bx, ax
xor cx, cx
mov es, cx
mov word [es:bx], %2
mov word [es:bx + 0x2], cs
%endmacro
; MAIN
jmp 0x7C0:main
main:
sti
mount_interrupt 0x0, div_by_zero_handler
mov ax, 6
mov bx, 0
idiv bx
hlt
div_by_zero_handler:
xchg bx, bx
iret
; At the end we need the boot sector signature.
times 510-($-$$) db 0
db 0x55
db 0xaa
| 12.771429 | 47 | 0.626398 |
04a9c9fe5eb8f821ba210af0fa62f44aed7cdb70 | 973 | asm | Assembly | wof/lcs/enemy/33.asm | zengfr/arcade_game_romhacking_sourcecode_top_secret_data | a4a0c86c200241494b3f1834cd0aef8dc02f7683 | [
"Apache-2.0"
] | 6 | 2020-10-14T15:29:10.000Z | 2022-02-12T18:58:54.000Z | wof/lcs/enemy/33.asm | zengfr/arcade_game_romhacking_sourcecode_top_secret_data | a4a0c86c200241494b3f1834cd0aef8dc02f7683 | [
"Apache-2.0"
] | null | null | null | wof/lcs/enemy/33.asm | zengfr/arcade_game_romhacking_sourcecode_top_secret_data | a4a0c86c200241494b3f1834cd0aef8dc02f7683 | [
"Apache-2.0"
] | 1 | 2020-12-17T08:59:10.000Z | 2020-12-17T08:59:10.000Z | copyright zengfr site:http://github.com/zengfr/romhack
0252F8 ble $25312 [enemy+33]
0252FE jsr $1426.w [enemy+33]
0255F4 move.b ($33,A0), D0 [enemy+32]
0255F8 beq $25606 [enemy+33]
026AE4 move.b ($33,A0), D0 [enemy+32]
026AE8 beq $26af6 [enemy+33]
02940A move.b ($33,A0), D0 [enemy+32]
02940E beq $2941c [enemy+33]
02A7D8 move.b ($33,A0), D0 [enemy+32]
02A7DC beq $2a7ea [enemy+33]
02B9F8 move.b ($33,A0), D0 [enemy+32]
02B9FC beq $2ba0a [enemy+33]
032BA6 move.b ($33,A0), D0 [enemy+7A]
032BAA beq $32bb8 [enemy+33]
033140 beq $33152 [enemy+33]
0369B0 beq $369be [enemy+33]
036C32 beq $36c68 [enemy+33]
036C4E bra $36c68 [enemy+33]
036C68 tst.w ($68,A0) [enemy+33]
036E12 beq $36e22 [enemy+33]
036F28 beq $36f5e [enemy+33]
046B24 move.b ($33,A0), D0 [enemy+7A]
046B28 beq $46b42 [enemy+33]
04D3E2 beq $4d420 [enemy+33]
copyright zengfr site:http://github.com/zengfr/romhack
| 33.551724 | 54 | 0.632066 |
2adef1e17a7c002884b955a60805381d1bebb613 | 308 | asm | Assembly | programs/oeis/089/A089425.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/089/A089425.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/089/A089425.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A089425: Least common multiple of all cycle sizes (and also the maximum cycle size) in range [A014137(n-1)..A014138(n-1)] of permutation A082351/A082352.
; 1,1,1,3,9,12,15,18,21,24,27,30,33,36,39,42,45,48,51,54,57
mov $1,$0
lpb $1
pow $1,2
div $1,4
lpe
trn $0,2
add $1,$0
add $1,$0
mov $0,$1
add $0,1
| 22 | 155 | 0.659091 |
b478f14caed6044d2ab88833e4826e2569b2c01d | 1,818 | asm | Assembly | PRG/levels/Giant/4-5.asm | narfman0/smb3_pp1 | 38a58adafff67a403591e38875e9fae943a5fe76 | [
"Unlicense"
] | null | null | null | PRG/levels/Giant/4-5.asm | narfman0/smb3_pp1 | 38a58adafff67a403591e38875e9fae943a5fe76 | [
"Unlicense"
] | null | null | null | PRG/levels/Giant/4-5.asm | narfman0/smb3_pp1 | 38a58adafff67a403591e38875e9fae943a5fe76 | [
"Unlicense"
] | null | null | null | ; Original address was $B72C
; 4-5
.word W405_BonusL ; Alternate level layout
.word W405_BonusO ; Alternate object layout
.byte LEVEL1_SIZE_08 | LEVEL1_YSTART_170
.byte LEVEL2_BGPAL_00 | LEVEL2_OBJPAL_08 | LEVEL2_XSTART_18 | LEVEL2_UNUSEDFLAG
.byte LEVEL3_TILESET_01 | LEVEL3_VSCROLL_LOCKLOW | LEVEL3_PIPENOTEXIT
.byte LEVEL4_BGBANK_INDEX(11) | LEVEL4_INITACT_NOTHING
.byte LEVEL5_BGM_OVERWORLD | LEVEL5_TIME_300
.byte $17, $0E, $64, $17, $1A, $20, $15, $10, $63, $13, $12, $62, $11, $14, $60, $15
.byte $18, $40, $15, $03, $05, $19, $00, $74, $11, $08, $10, $19, $0C, $79, $15, $22
.byte $83, $19, $22, $7D, $11, $26, $10, $15, $28, $05, $57, $2C, $31, $16, $2F, $05
.byte $34, $2F, $22, $34, $30, $00, $56, $33, $32, $34, $35, $22, $16, $36, $05, $55
.byte $3A, $33, $57, $42, $30, $38, $42, $41, $30, $43, $82, $12, $44, $10, $18, $47
.byte $82, $39, $4C, $41, $19, $50, $7F, $36, $51, $A2, $25, $56, $40, $09, $57, $10
.byte $57, $55, $31, $56, $56, $32, $2F, $56, $0C, $23, $57, $C2, $22, $57, $41, $16
.byte $59, $05, $58, $5D, $30, $53, $5C, $35, $36, $5B, $0E, $15, $60, $83, $36, $65
.byte $42, $54, $66, $31, $57, $6A, $31, $36, $6D, $42, $19, $6F, $70, $51, $64, $52
.byte $51, $69, $52, $53, $64, $52, $55, $69, $52, $19, $73, $76, $15, $73, $83, $16
.byte $79, $05, $54, $79, $34, $11, $7A, $10, $77, $7C, $61, $20, $7E, $41, $01, $7E
.byte $50, $03, $7E, $50, $05, $7E, $50, $07, $7E, $50, $09, $7E, $50, $0B, $7E, $50
.byte $0D, $7E, $50, $0F, $7E, $50, $11, $7E, $50, $13, $7E, $50, $15, $7E, $50, $17
.byte $7E, $50, $46, $5A, $52, $48, $5E, $50, $49, $5F, $50, $4A, $60, $50, $4C, $62
.byte $50, $4D, $63, $50, $4E, $64, $50, $53, $69, $52, $57, $6D, $52, $E5, $61, $50
.byte $06, $06, $10, $06, $10, $10, $08, $1C, $10, $04, $2A, $10, $06, $3A, $10, $08
.byte $46, $10, $FF
| 64.928571 | 85 | 0.512101 |
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