hexsha stringlengths 40 40 | size int64 6 1.05M | ext stringclasses 3 values | lang stringclasses 1 value | max_stars_repo_path stringlengths 4 232 | max_stars_repo_name stringlengths 7 106 | max_stars_repo_head_hexsha stringlengths 40 40 | max_stars_repo_licenses listlengths 1 7 | max_stars_count int64 1 33.5k ⌀ | max_stars_repo_stars_event_min_datetime stringlengths 24 24 ⌀ | max_stars_repo_stars_event_max_datetime stringlengths 24 24 ⌀ | max_issues_repo_path stringlengths 4 232 | max_issues_repo_name stringlengths 7 106 | max_issues_repo_head_hexsha stringlengths 40 40 | max_issues_repo_licenses listlengths 1 7 | max_issues_count int64 1 37.5k ⌀ | max_issues_repo_issues_event_min_datetime stringlengths 24 24 ⌀ | max_issues_repo_issues_event_max_datetime stringlengths 24 24 ⌀ | max_forks_repo_path stringlengths 4 232 | max_forks_repo_name stringlengths 7 106 | max_forks_repo_head_hexsha stringlengths 40 40 | max_forks_repo_licenses listlengths 1 7 | max_forks_count int64 1 12.6k ⌀ | max_forks_repo_forks_event_min_datetime stringlengths 24 24 ⌀ | max_forks_repo_forks_event_max_datetime stringlengths 24 24 ⌀ | content stringlengths 6 1.05M | avg_line_length float64 1.16 19.7k | max_line_length int64 2 938k | alphanum_fraction float64 0 1 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
d1ea5465b3c444cc71440f5d0683719084c828a3 | 2,225 | asm | Assembly | sprites/vic_regs.asm | cainex/c64_playground | 74587cd884d478eaf0d2cd3660d1b9503a7e728b | [
"Apache-2.0"
] | null | null | null | sprites/vic_regs.asm | cainex/c64_playground | 74587cd884d478eaf0d2cd3660d1b9503a7e728b | [
"Apache-2.0"
] | null | null | null | sprites/vic_regs.asm | cainex/c64_playground | 74587cd884d478eaf0d2cd3660d1b9503a7e728b | [
"Apache-2.0"
] | null | null | null | // VIC-II Base Address
.const VIC_BASE=$d000
.const VIC_BANK0=$0000
.const SPR_PTR_BASE=$07f8
// Sprite Co-ordinate Registers
.const SPR_M0X=VIC_BASE
.const SPR_M0Y=VIC_BASE+1
.const SPR_M1X=VIC_BASE+2
.const SPR_M1Y=VIC_BASE+3
.const SPR_M2X=VIC_BASE+4
.const SPR_M2Y=VIC_BASE+5
.const SPR_M3X=VIC_BASE+6
.const SPR_M3Y=VIC_BASE+7
.const SPR_M4X=VIC_BASE+8
.const SPR_M4Y=VIC_BASE+9
.const SPR_M5X=VIC_BASE+10
.const SPR_M5Y=VIC_BASE+11
.const SPR_M6X=VIC_BASE+12
.const SPR_M6Y=VIC_BASE+13
.const SPR_M7X=VIC_BASE+14
.const SPR_M7Y=VIC_BASE+15
.const SPR_MnX8=VIC_BASE+16
.const VIC_CNTRL1=VIC_BASE+17
.const VIC_RASTER_CNT=VIC_BASE+18
.const VIC_LIGHT_PENX=VIC_BASE+19
.const VIC_LIGHT_PENY=VIC_BASE+20
.const SPR_ENABLE=VIC_BASE+21
.const VIC_CNTRL2=VIC_BASE+22
.const SPR_Y_EXPAND=VIC_BASE+23
.const VIC_MEM_PTRS=VIC_BASE+24
.const VIC_INT_REG=VIC_BASE+25
.const VIC_INT_EN=VIC_BASE+26
.const SPR_DATA_PRI=VIC_BASE+27
.const SPR_MC=VIC_BASE+28
.const SPR_X_EXPAND=VIC_BASE+29
.const SPR_SPR_COLL=VIC_BASE+30
.const SPR_DATA_COLL=VIC_BASE+31
.const VIC_BORDER_COL=VIC_BASE+32
.const VIC_BKGND_COL0=VIC_BASE+33
.const VIC_BKGND_COL1=VIC_BASE+34
.const VIC_BKGND_COL2=VIC_BASE+35
.const VIC_BKGND_COL3=VIC_BASE+36
.const SPR_MC_MM0=VIC_BASE+37
.const SPR_MC_MM1=VIC_BASE+38
.const SPR_COL0=VIC_BASE+39
.const SPR_COL1=VIC_BASE+40
.const SPR_COL2=VIC_BASE+41
.const SPR_COL3=VIC_BASE+42
.const SPR_COL4=VIC_BASE+43
.const SPR_COL5=VIC_BASE+44
.const SPR_COL6=VIC_BASE+45
.const SPR_COL7=VIC_BASE+46
.macro SetSpritePtr(spr, ptr) {
lda #ptr
sta SPR_PTR_BASE+(spr*1)
}
.macro SetSpriteXY(spr, x, y) {
lda #(x&$ff)
sta SPR_M0X+(spr*2)
lda SPR_MnX8
ora #(((x/256)&$1)*(1*spr))
sta SPR_MnX8
lda #y
sta SPR_M0Y+(spr*2)
}
.macro SetSpriteX(spr,x) {
lda #(x&$ff)
sta SPR_M0X+(spr*2)
lda SPR_MnX8
ora #(((x/256)&$1)*(1<<spr))
sta SPR_MnX8
}
.macro SetSpriteY(spr,y) {
lda #y
sta SPR_M0Y+(spr*2)
}
.macro EnableSprite(spr) {
lda SPR_ENABLE
ora #(1<<spr)
sta SPR_ENABLE
}
.macro DisableSprite(spr) {
lda SPR_ENABLE
and #(256 - (1<<spr))
sta SPR_ENABLE
}
.macro ToggleSprite(spr) {
lda SPR_ENABLE
eor #(1<<spr)
sta SPR_ENABLE
} | 22.25 | 33 | 0.742022 |
8bf0154907cfb9f874f4ac617d504ec720410be7 | 358 | asm | Assembly | Tests/other.asm | 13xforever/x86-assembly-textmate-bundle | f1bb62f77b776d87d0fd85b0276d4237ff72c43c | [
"MIT"
] | 69 | 2015-04-16T18:01:22.000Z | 2022-02-15T07:54:26.000Z | Tests/other.asm | javiercbk/x86-assembly-textmate-bundle | 62d700e0196f62ef4353a9b95c2e64beb0a6afda | [
"MIT"
] | 17 | 2016-09-20T08:49:09.000Z | 2021-02-19T15:01:04.000Z | Tests/other.asm | javiercbk/x86-assembly-textmate-bundle | 62d700e0196f62ef4353a9b95c2e64beb0a6afda | [
"MIT"
] | 19 | 2016-05-31T07:11:14.000Z | 2021-07-19T10:17:12.000Z | ; one-line comment
#if
#elif
#endif
%if 0
%endif
#error \sdf\123
#warning wer
#define asdf = 123
word dword qword tword yword
db dw dd dq dt do dy
res resb resw resd resq rest reso resy
incbin equ times
/* multiline
comment
block */
.data
.bss
.text
section test
label1:
test ax, bx
label2: jmp label1
db 'some string'
db "another string\0"
| 9.944444 | 38 | 0.698324 |
775a1109c997b71ce90034c9bdd3b2dbff050595 | 5,861 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_sm_/i9-9900K_12_0xca.log_21829_407.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_sm_/i9-9900K_12_0xca.log_21829_407.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_sm_/i9-9900K_12_0xca.log_21829_407.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r15
push %r8
push %rax
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_WT_ht+0x83f6, %r15
nop
nop
nop
xor $25021, %rdi
mov $0x6162636465666768, %r8
movq %r8, (%r15)
nop
nop
nop
xor %rsi, %rsi
lea addresses_WC_ht+0xa680, %r10
clflush (%r10)
cmp %rax, %rax
mov (%r10), %edx
nop
nop
sub %rax, %rax
lea addresses_WC_ht+0x7280, %rsi
lea addresses_WC_ht+0x1c1d6, %rdi
nop
nop
dec %r8
mov $92, %rcx
rep movsb
nop
nop
nop
add %r15, %r15
lea addresses_normal_ht+0x148cd, %rax
cmp %rdx, %rdx
mov (%rax), %r10d
nop
nop
nop
inc %rsi
lea addresses_normal_ht+0xdbd4, %r10
sub %rsi, %rsi
movw $0x6162, (%r10)
nop
nop
cmp %rax, %rax
lea addresses_A_ht+0x1e530, %r8
clflush (%r8)
nop
nop
nop
mfence
vmovups (%r8), %ymm0
vextracti128 $1, %ymm0, %xmm0
vpextrq $0, %xmm0, %rax
dec %rcx
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rax
pop %r8
pop %r15
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r11
push %r13
push %r15
push %r8
push %r9
push %rbp
// Store
lea addresses_UC+0xeb80, %r13
add %r10, %r10
mov $0x5152535455565758, %r11
movq %r11, %xmm5
movups %xmm5, (%r13)
nop
nop
nop
nop
nop
sub $59629, %r9
// Store
lea addresses_WT+0x12b80, %r8
nop
and %r15, %r15
mov $0x5152535455565758, %r13
movq %r13, (%r8)
sub %r8, %r8
// Faulty Load
lea addresses_WT+0x12b80, %r13
nop
add %r8, %r8
mov (%r13), %r10w
lea oracles, %r8
and $0xff, %r10
shlq $12, %r10
mov (%r8,%r10,1), %r10
pop %rbp
pop %r9
pop %r8
pop %r15
pop %r13
pop %r11
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'size': 2, 'NT': False, 'type': 'addresses_WT', 'same': False, 'AVXalign': False, 'congruent': 0}}
{'OP': 'STOR', 'dst': {'size': 16, 'NT': False, 'type': 'addresses_UC', 'same': False, 'AVXalign': False, 'congruent': 11}}
{'OP': 'STOR', 'dst': {'size': 8, 'NT': False, 'type': 'addresses_WT', 'same': True, 'AVXalign': False, 'congruent': 0}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'size': 2, 'NT': False, 'type': 'addresses_WT', 'same': True, 'AVXalign': False, 'congruent': 0}}
<gen_prepare_buffer>
{'OP': 'STOR', 'dst': {'size': 8, 'NT': False, 'type': 'addresses_WT_ht', 'same': False, 'AVXalign': False, 'congruent': 0}}
{'OP': 'LOAD', 'src': {'size': 4, 'NT': True, 'type': 'addresses_WC_ht', 'same': False, 'AVXalign': False, 'congruent': 6}}
{'OP': 'REPM', 'src': {'same': False, 'type': 'addresses_WC_ht', 'congruent': 6}, 'dst': {'same': False, 'type': 'addresses_WC_ht', 'congruent': 1}}
{'OP': 'LOAD', 'src': {'size': 4, 'NT': False, 'type': 'addresses_normal_ht', 'same': False, 'AVXalign': False, 'congruent': 0}}
{'OP': 'STOR', 'dst': {'size': 2, 'NT': False, 'type': 'addresses_normal_ht', 'same': False, 'AVXalign': True, 'congruent': 1}}
{'OP': 'LOAD', 'src': {'size': 32, 'NT': False, 'type': 'addresses_A_ht', 'same': True, 'AVXalign': False, 'congruent': 4}}
{'58': 21829}
58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58
*/
| 41.864286 | 2,999 | 0.656031 |
f3f4bd765a3b7c83468b4f8d183c2a65ac8cb2be | 427 | asm | Assembly | programs/oeis/180/A180955.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/180/A180955.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/180/A180955.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A180955: Numerator in triangle T(n,k)=A180955/A180956 read by rows. A001790(A004736).
; 1,1,1,3,1,1,5,3,1,1,35,5,3,1,1,63,35,5,3,1,1,231,63,35,5,3,1,1,429,231,63,35,5,3,1,1,6435,429,231,63,35,5,3,1,1,12155,6435,429,231,63,35,5,3,1,1,46189,12155,6435,429,231,63,35,5,3,1,1,88179,46189,12155,6435,429
seq $0,25676 ; Exponent of 8 (value of i) in n-th number of form 8^i*9^j.
mov $1,$0
mul $0,2
bin $0,$1
lpb $0
dif $0,2
lpe
| 38.818182 | 212 | 0.662763 |
c7cfcb9d9f86380270108f377b22a715e68c32a5 | 582 | asm | Assembly | oeis/053/A053136.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/053/A053136.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/053/A053136.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A053136: Binomial coefficients C(2*n+7,7).
; 1,36,330,1716,6435,19448,50388,116280,245157,480700,888030,1560780,2629575,4272048,6724520,10295472,15380937,22481940,32224114,45379620,62891499,85900584,115775100,154143080,202927725,264385836,341149446,436270780,553270671,696190560,869648208,1078897248,1329890705,1629348612,1984829850,2404808340,2898753715,3477216600,4151918628,4935847320,5843355957,6890268572,8093990190,9473622444,11050084695,12846240784,14887031544,17199613200,19813501785,22760723700,26075972546,29796772356,33963647355
mul $0,2
mov $1,-8
bin $1,$0
mov $0,$1
| 72.75 | 496 | 0.848797 |
6625d16034455f911f1525051c3283ff8dec8652 | 1,922 | asm | Assembly | programs/oeis/001/A001535.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/001/A001535.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/001/A001535.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A001535: (10n+1)(10n+9).
; 9,209,609,1209,2009,3009,4209,5609,7209,9009,11009,13209,15609,18209,21009,24009,27209,30609,34209,38009,42009,46209,50609,55209,60009,65009,70209,75609,81209,87009,93009,99209,105609,112209,119009,126009,133209,140609,148209,156009,164009,172209,180609,189209,198009,207009,216209,225609,235209,245009,255009,265209,275609,286209,297009,308009,319209,330609,342209,354009,366009,378209,390609,403209,416009,429009,442209,455609,469209,483009,497009,511209,525609,540209,555009,570009,585209,600609,616209,632009,648009,664209,680609,697209,714009,731009,748209,765609,783209,801009,819009,837209,855609,874209,893009,912009,931209,950609,970209,990009,1010009,1030209,1050609,1071209,1092009,1113009,1134209,1155609,1177209,1199009,1221009,1243209,1265609,1288209,1311009,1334009,1357209,1380609,1404209,1428009,1452009,1476209,1500609,1525209,1550009,1575009,1600209,1625609,1651209,1677009,1703009,1729209,1755609,1782209,1809009,1836009,1863209,1890609,1918209,1946009,1974009,2002209,2030609,2059209,2088009,2117009,2146209,2175609,2205209,2235009,2265009,2295209,2325609,2356209,2387009,2418009,2449209,2480609,2512209,2544009,2576009,2608209,2640609,2673209,2706009,2739009,2772209,2805609,2839209,2873009,2907009,2941209,2975609,3010209,3045009,3080009,3115209,3150609,3186209,3222009,3258009,3294209,3330609,3367209,3404009,3441009,3478209,3515609,3553209,3591009,3629009,3667209,3705609,3744209,3783009,3822009,3861209,3900609,3940209,3980009,4020009,4060209,4100609,4141209,4182009,4223009,4264209,4305609,4347209,4389009,4431009,4473209,4515609,4558209,4601009,4644009,4687209,4730609,4774209,4818009,4862009,4906209,4950609,4995209,5040009,5085009,5130209,5175609,5221209,5267009,5313009,5359209,5405609,5452209,5499009,5546009,5593209,5640609,5688209,5736009,5784009,5832209,5880609,5929209,5978009,6027009,6076209,6125609,6175209,6225009
sub $1,$0
bin $1,2
mul $1,200
add $1,9
| 240.25 | 1,854 | 0.853278 |
53e9b405a4f1d0831d410573839fc522b53af654 | 1,122 | asm | Assembly | programs/oeis/055/A055259.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/055/A055259.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/055/A055259.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A055259: Sums of two powers of 8.
; 2,9,16,65,72,128,513,520,576,1024,4097,4104,4160,4608,8192,32769,32776,32832,33280,36864,65536,262145,262152,262208,262656,266240,294912,524288,2097153,2097160,2097216,2097664,2101248,2129920,2359296,4194304,16777217,16777224,16777280,16777728,16781312,16809984,17039360,18874368,33554432,134217729,134217736,134217792,134218240,134221824,134250496,134479872,136314880,150994944,268435456,1073741825,1073741832,1073741888,1073742336,1073745920,1073774592,1074003968,1075838976,1090519040,1207959552,2147483648,8589934593,8589934600,8589934656,8589935104,8589938688,8589967360,8590196736,8592031744,8606711808,8724152320,9663676416,17179869184,68719476737,68719476744,68719476800,68719477248,68719480832,68719509504,68719738880,68721573888,68736253952,68853694464,69793218560,77309411328,137438953472,549755813889,549755813896,549755813952,549755814400,549755817984,549755846656,549756076032,549757911040,549772591104
seq $0,131437 ; (A000012 * A131436) + (A131436 * A000012) - A000012.
mul $0,2
seq $0,32929 ; Numbers whose set of base 8 digits is {1,2}.
div $0,64
mul $0,7
add $0,2
| 112.2 | 918 | 0.845811 |
d88c6ccafd2dfe0f1f5e71043cfeddf70fdcdb58 | 122,576 | asm | Assembly | target/cos_117/disasm/iop_overlay1/D4ERR.asm | jrrk2/cray-sim | 52c9639808d6890517092637b188282c00cce4f7 | [
"BSL-1.0"
] | 49 | 2020-10-09T12:29:16.000Z | 2022-03-12T02:33:35.000Z | target/cos_117/disasm/iop_overlay1/D4ERR.asm | jrrk2/cray-sim | 52c9639808d6890517092637b188282c00cce4f7 | [
"BSL-1.0"
] | 1 | 2021-12-29T15:59:25.000Z | 2021-12-29T15:59:25.000Z | target/cos_117/disasm/iop_overlay1/D4ERR.asm | jrrk2/cray-sim | 52c9639808d6890517092637b188282c00cce4f7 | [
"BSL-1.0"
] | 6 | 2021-04-12T06:10:32.000Z | 2022-02-08T23:11:19.000Z | 0x0000 (0x000000) 0x2119- f:00020 d: 281 | A = OR[281]
0x0001 (0x000002) 0x2901- f:00024 d: 257 | OR[257] = A
0x0002 (0x000004) 0x2118- f:00020 d: 280 | A = OR[280]
0x0003 (0x000006) 0x2900- f:00024 d: 256 | OR[256] = A
0x0004 (0x000008) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x0005 (0x00000A) 0x291B- f:00024 d: 283 | OR[283] = A
0x0006 (0x00000C) 0x291A- f:00024 d: 282 | OR[282] = A
0x0007 (0x00000E) 0x2922- f:00024 d: 290 | OR[290] = A
0x0008 (0x000010) 0x1001- f:00010 d: 1 | A = 1 (0x0001)
0x0009 (0x000012) 0x2905- f:00024 d: 261 | OR[261] = A
0x000A (0x000014) 0x2100- f:00020 d: 256 | A = OR[256]
0x000B (0x000016) 0x5800- f:00054 d: 0 | B = A
0x000C (0x000018) 0x4400- f:00042 d: 0 | C = 1, IOB = DN
0x000D (0x00001A) 0x8002- f:00100 d: 2 | P = P + 2 (0x000F), C = 0
0x000E (0x00001C) 0x7008- f:00070 d: 8 | P = P + 8 (0x0016)
0x000F (0x00001E) 0x4600- f:00043 d: 0 | C = 1, IOB = BZ
0x0010 (0x000020) 0x8202- f:00101 d: 2 | P = P + 2 (0x0012), C = 1
0x0011 (0x000022) 0x7005- f:00070 d: 5 | P = P + 5 (0x0016)
0x0012 (0x000024) 0x1002- f:00010 d: 2 | A = 2 (0x0002)
0x0013 (0x000026) 0x2920- f:00024 d: 288 | OR[288] = A
0x0014 (0x000028) 0x7E03-0x04BD f:00077 d: 3 | R = OR[3]+1213 (0x04BD)
0x0016 (0x00002C) 0x2101- f:00020 d: 257 | A = OR[257]
0x0017 (0x00002E) 0x1402- f:00012 d: 2 | A = A + 2 (0x0002)
0x0018 (0x000030) 0x2908- f:00024 d: 264 | OR[264] = A
0x0019 (0x000032) 0x3108- f:00030 d: 264 | A = (OR[264])
0x001A (0x000034) 0x1A00-0xF7FF f:00015 d: 0 | A = A & 63487 (0xF7FF)
0x001C (0x000038) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x001D (0x00003A) 0x2101- f:00020 d: 257 | A = OR[257]
0x001E (0x00003C) 0x141E- f:00012 d: 30 | A = A + 30 (0x001E)
0x001F (0x00003E) 0x2908- f:00024 d: 264 | OR[264] = A
0x0020 (0x000040) 0x3108- f:00030 d: 264 | A = (OR[264])
0x0021 (0x000042) 0x2907- f:00024 d: 263 | OR[263] = A
0x0022 (0x000044) 0x3101- f:00030 d: 257 | A = (OR[257])
0x0023 (0x000046) 0x291D- f:00024 d: 285 | OR[285] = A
0x0024 (0x000048) 0x211D- f:00020 d: 285 | A = OR[285]
0x0025 (0x00004A) 0x127F- f:00011 d: 127 | A = A & 127 (0x007F)
0x0026 (0x00004C) 0x291D- f:00024 d: 285 | OR[285] = A
0x0027 (0x00004E) 0x211D- f:00020 d: 285 | A = OR[285]
0x0028 (0x000050) 0x1604- f:00013 d: 4 | A = A - 4 (0x0004)
0x0029 (0x000052) 0x8402- f:00102 d: 2 | P = P + 2 (0x002B), A = 0
0x002A (0x000054) 0x700E- f:00070 d: 14 | P = P + 14 (0x0038)
0x002B (0x000056) 0x2101- f:00020 d: 257 | A = OR[257]
0x002C (0x000058) 0x1404- f:00012 d: 4 | A = A + 4 (0x0004)
0x002D (0x00005A) 0x2908- f:00024 d: 264 | OR[264] = A
0x002E (0x00005C) 0x3108- f:00030 d: 264 | A = (OR[264])
0x002F (0x00005E) 0x0E03- f:00007 d: 3 | A = A << 3 (0x0003)
0x0030 (0x000060) 0x0A05- f:00005 d: 5 | A = A < 5 (0x0005)
0x0031 (0x000062) 0x141F- f:00012 d: 31 | A = A + 31 (0x001F)
0x0032 (0x000064) 0x0C08- f:00006 d: 8 | A = A >> 8 (0x0008)
0x0033 (0x000066) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x0034 (0x000068) 0x7E03-0x0443 f:00077 d: 3 | R = OR[3]+1091 (0x0443)
0x0036 (0x00006C) 0x7A03-0x0288 f:00075 d: 3 | P = OR[3]+648 (0x0288)
0x0038 (0x000070) 0x211D- f:00020 d: 285 | A = OR[285]
0x0039 (0x000072) 0x1640- f:00013 d: 64 | A = A - 64 (0x0040)
0x003A (0x000074) 0x8402- f:00102 d: 2 | P = P + 2 (0x003C), A = 0
0x003B (0x000076) 0x7014- f:00070 d: 20 | P = P + 20 (0x004F)
0x003C (0x000078) 0x2101- f:00020 d: 257 | A = OR[257]
0x003D (0x00007A) 0x1404- f:00012 d: 4 | A = A + 4 (0x0004)
0x003E (0x00007C) 0x2908- f:00024 d: 264 | OR[264] = A
0x003F (0x00007E) 0x3108- f:00030 d: 264 | A = (OR[264])
0x0040 (0x000080) 0x13FF- f:00011 d: 511 | A = A & 511 (0x01FF)
0x0041 (0x000082) 0x2926- f:00024 d: 294 | OR[294] = A
0x0042 (0x000084) 0x2101- f:00020 d: 257 | A = OR[257]
0x0043 (0x000086) 0x1404- f:00012 d: 4 | A = A + 4 (0x0004)
0x0044 (0x000088) 0x2908- f:00024 d: 264 | OR[264] = A
0x0045 (0x00008A) 0x3108- f:00030 d: 264 | A = (OR[264])
0x0046 (0x00008C) 0x0809- f:00004 d: 9 | A = A > 9 (0x0009)
0x0047 (0x00008E) 0x121F- f:00011 d: 31 | A = A & 31 (0x001F)
0x0048 (0x000090) 0x2925- f:00024 d: 293 | OR[293] = A
0x0049 (0x000092) 0x2101- f:00020 d: 257 | A = OR[257]
0x004A (0x000094) 0x1403- f:00012 d: 3 | A = A + 3 (0x0003)
0x004B (0x000096) 0x2908- f:00024 d: 264 | OR[264] = A
0x004C (0x000098) 0x3108- f:00030 d: 264 | A = (OR[264])
0x004D (0x00009A) 0x2924- f:00024 d: 292 | OR[292] = A
0x004E (0x00009C) 0x709F- f:00070 d: 159 | P = P + 159 (0x00ED)
0x004F (0x00009E) 0x2101- f:00020 d: 257 | A = OR[257]
0x0050 (0x0000A0) 0x140C- f:00012 d: 12 | A = A + 12 (0x000C)
0x0051 (0x0000A2) 0x291A- f:00024 d: 282 | OR[282] = A
0x0052 (0x0000A4) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x0053 (0x0000A6) 0x2913- f:00024 d: 275 | OR[275] = A
0x0054 (0x0000A8) 0x2914- f:00024 d: 276 | OR[276] = A
0x0055 (0x0000AA) 0x211A- f:00020 d: 282 | A = OR[282]
0x0056 (0x0000AC) 0x8413- f:00102 d: 19 | P = P + 19 (0x0069), A = 0
0x0057 (0x0000AE) 0x2113- f:00020 d: 275 | A = OR[275]
0x0058 (0x0000B0) 0x2714- f:00023 d: 276 | A = A - OR[276]
0x0059 (0x0000B2) 0x8610- f:00103 d: 16 | P = P + 16 (0x0069), A # 0
0x005A (0x0000B4) 0x311A- f:00030 d: 282 | A = (OR[282])
0x005B (0x0000B6) 0x291A- f:00024 d: 282 | OR[282] = A
0x005C (0x0000B8) 0x8602- f:00103 d: 2 | P = P + 2 (0x005E), A # 0
0x005D (0x0000BA) 0x700B- f:00070 d: 11 | P = P + 11 (0x0068)
0x005E (0x0000BC) 0x211A- f:00020 d: 282 | A = OR[282]
0x005F (0x0000BE) 0x140B- f:00012 d: 11 | A = A + 11 (0x000B)
0x0060 (0x0000C0) 0x2908- f:00024 d: 264 | OR[264] = A
0x0061 (0x0000C2) 0x3108- f:00030 d: 264 | A = (OR[264])
0x0062 (0x0000C4) 0x2913- f:00024 d: 275 | OR[275] = A
0x0063 (0x0000C6) 0x211A- f:00020 d: 282 | A = OR[282]
0x0064 (0x0000C8) 0x140C- f:00012 d: 12 | A = A + 12 (0x000C)
0x0065 (0x0000CA) 0x2908- f:00024 d: 264 | OR[264] = A
0x0066 (0x0000CC) 0x3108- f:00030 d: 264 | A = (OR[264])
0x0067 (0x0000CE) 0x2914- f:00024 d: 276 | OR[276] = A
0x0068 (0x0000D0) 0x7213- f:00071 d: 19 | P = P - 19 (0x0055)
0x0069 (0x0000D2) 0x211A- f:00020 d: 282 | A = OR[282]
0x006A (0x0000D4) 0xB434- f:00132 d: 52 | R = OR[52], A = 0
0x006B (0x0000D6) 0x0028- f:00000 d: 40 | PASS | **** non-standard encoding with D:0x0028 ****
0x006C (0x0000D8) 0x211A- f:00020 d: 282 | A = OR[282]
0x006D (0x0000DA) 0x1416- f:00012 d: 22 | A = A + 22 (0x0016)
0x006E (0x0000DC) 0x2908- f:00024 d: 264 | OR[264] = A
0x006F (0x0000DE) 0x3108- f:00030 d: 264 | A = (OR[264])
0x0070 (0x0000E0) 0x0808- f:00004 d: 8 | A = A > 8 (0x0008)
0x0071 (0x0000E2) 0x291C- f:00024 d: 284 | OR[284] = A
0x0072 (0x0000E4) 0x2101- f:00020 d: 257 | A = OR[257]
0x0073 (0x0000E6) 0x140B- f:00012 d: 11 | A = A + 11 (0x000B)
0x0074 (0x0000E8) 0x2908- f:00024 d: 264 | OR[264] = A
0x0075 (0x0000EA) 0x3108- f:00030 d: 264 | A = (OR[264])
0x0076 (0x0000EC) 0x291E- f:00024 d: 286 | OR[286] = A
0x0077 (0x0000EE) 0x211A- f:00020 d: 282 | A = OR[282]
0x0078 (0x0000F0) 0x1419- f:00012 d: 25 | A = A + 25 (0x0019)
0x0079 (0x0000F2) 0x2908- f:00024 d: 264 | OR[264] = A
0x007A (0x0000F4) 0x3108- f:00030 d: 264 | A = (OR[264])
0x007B (0x0000F6) 0x0809- f:00004 d: 9 | A = A > 9 (0x0009)
0x007C (0x0000F8) 0x2926- f:00024 d: 294 | OR[294] = A
0x007D (0x0000FA) 0x211A- f:00020 d: 282 | A = OR[282]
0x007E (0x0000FC) 0x1418- f:00012 d: 24 | A = A + 24 (0x0018)
0x007F (0x0000FE) 0x2908- f:00024 d: 264 | OR[264] = A
0x0080 (0x000100) 0x3108- f:00030 d: 264 | A = (OR[264])
0x0081 (0x000102) 0x121F- f:00011 d: 31 | A = A & 31 (0x001F)
0x0082 (0x000104) 0x2925- f:00024 d: 293 | OR[293] = A
0x0083 (0x000106) 0x211A- f:00020 d: 282 | A = OR[282]
0x0084 (0x000108) 0x1418- f:00012 d: 24 | A = A + 24 (0x0018)
0x0085 (0x00010A) 0x2908- f:00024 d: 264 | OR[264] = A
0x0086 (0x00010C) 0x3108- f:00030 d: 264 | A = (OR[264])
0x0087 (0x00010E) 0x0805- f:00004 d: 5 | A = A > 5 (0x0005)
0x0088 (0x000110) 0x2924- f:00024 d: 292 | OR[292] = A
0x0089 (0x000112) 0x2101- f:00020 d: 257 | A = OR[257]
0x008A (0x000114) 0x1430- f:00012 d: 48 | A = A + 48 (0x0030)
0x008B (0x000116) 0x2908- f:00024 d: 264 | OR[264] = A
0x008C (0x000118) 0x3108- f:00030 d: 264 | A = (OR[264])
0x008D (0x00011A) 0x13FF- f:00011 d: 511 | A = A & 511 (0x01FF)
0x008E (0x00011C) 0x2917- f:00024 d: 279 | OR[279] = A
0x008F (0x00011E) 0x2101- f:00020 d: 257 | A = OR[257]
0x0090 (0x000120) 0x1430- f:00012 d: 48 | A = A + 48 (0x0030)
0x0091 (0x000122) 0x2908- f:00024 d: 264 | OR[264] = A
0x0092 (0x000124) 0x3108- f:00030 d: 264 | A = (OR[264])
0x0093 (0x000126) 0x0809- f:00004 d: 9 | A = A > 9 (0x0009)
0x0094 (0x000128) 0x121F- f:00011 d: 31 | A = A & 31 (0x001F)
0x0095 (0x00012A) 0x2916- f:00024 d: 278 | OR[278] = A
0x0096 (0x00012C) 0x2101- f:00020 d: 257 | A = OR[257]
0x0097 (0x00012E) 0x142F- f:00012 d: 47 | A = A + 47 (0x002F)
0x0098 (0x000130) 0x2908- f:00024 d: 264 | OR[264] = A
0x0099 (0x000132) 0x3108- f:00030 d: 264 | A = (OR[264])
0x009A (0x000134) 0x2915- f:00024 d: 277 | OR[277] = A
0x009B (0x000136) 0x2126- f:00020 d: 294 | A = OR[294]
0x009C (0x000138) 0x2513- f:00022 d: 275 | A = A + OR[275]
0x009D (0x00013A) 0x2926- f:00024 d: 294 | OR[294] = A
0x009E (0x00013C) 0x2126- f:00020 d: 294 | A = OR[294]
0x009F (0x00013E) 0x2717- f:00023 d: 279 | A = A - OR[279]
0x00A0 (0x000140) 0x8010- f:00100 d: 16 | P = P + 16 (0x00B0), C = 0
0x00A1 (0x000142) 0x2126- f:00020 d: 294 | A = OR[294]
0x00A2 (0x000144) 0x2717- f:00023 d: 279 | A = A - OR[279]
0x00A3 (0x000146) 0x2926- f:00024 d: 294 | OR[294] = A
0x00A4 (0x000148) 0x2D25- f:00026 d: 293 | OR[293] = OR[293] + 1
0x00A5 (0x00014A) 0x2716- f:00023 d: 278 | A = A - OR[278]
0x00A6 (0x00014C) 0x8402- f:00102 d: 2 | P = P + 2 (0x00A8), A = 0
0x00A7 (0x00014E) 0x7008- f:00070 d: 8 | P = P + 8 (0x00AF)
0x00A8 (0x000150) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x00A9 (0x000152) 0x2925- f:00024 d: 293 | OR[293] = A
0x00AA (0x000154) 0x2D24- f:00026 d: 292 | OR[292] = OR[292] + 1
0x00AB (0x000156) 0x4200- f:00041 d: 0 | C = 1, io 0000 (IOR) = BZ
0x00AC (0x000158) 0x2715- f:00023 d: 277 | A = A - OR[277]
0x00AD (0x00015A) 0xB234- f:00131 d: 52 | R = OR[52], C = 1
0x00AE (0x00015C) 0x0028- f:00000 d: 40 | PASS | **** non-standard encoding with D:0x0028 ****
0x00AF (0x00015E) 0x7211- f:00071 d: 17 | P = P - 17 (0x009E)
0x00B0 (0x000160) 0x2101- f:00020 d: 257 | A = OR[257]
0x00B1 (0x000162) 0x1432- f:00012 d: 50 | A = A + 50 (0x0032)
0x00B2 (0x000164) 0x2908- f:00024 d: 264 | OR[264] = A
0x00B3 (0x000166) 0x3108- f:00030 d: 264 | A = (OR[264])
0x00B4 (0x000168) 0x2B26- f:00025 d: 294 | OR[294] = A + OR[294]
0x00B5 (0x00016A) 0x4200- f:00041 d: 0 | C = 1, io 0000 (IOR) = BZ
0x00B6 (0x00016C) 0x2717- f:00023 d: 279 | A = A - OR[279]
0x00B7 (0x00016E) 0x8004- f:00100 d: 4 | P = P + 4 (0x00BB), C = 0
0x00B8 (0x000170) 0x2126- f:00020 d: 294 | A = OR[294]
0x00B9 (0x000172) 0x2717- f:00023 d: 279 | A = A - OR[279]
0x00BA (0x000174) 0x2926- f:00024 d: 294 | OR[294] = A
0x00BB (0x000176) 0x211D- f:00020 d: 285 | A = OR[285]
0x00BC (0x000178) 0x1602- f:00013 d: 2 | A = A - 2 (0x0002)
0x00BD (0x00017A) 0x8402- f:00102 d: 2 | P = P + 2 (0x00BF), A = 0
0x00BE (0x00017C) 0x7022- f:00070 d: 34 | P = P + 34 (0x00E0)
0x00BF (0x00017E) 0x2101- f:00020 d: 257 | A = OR[257]
0x00C0 (0x000180) 0x142A- f:00012 d: 42 | A = A + 42 (0x002A)
0x00C1 (0x000182) 0x2908- f:00024 d: 264 | OR[264] = A
0x00C2 (0x000184) 0x3108- f:00030 d: 264 | A = (OR[264])
0x00C3 (0x000186) 0x2914- f:00024 d: 276 | OR[276] = A
0x00C4 (0x000188) 0x2126- f:00020 d: 294 | A = OR[294]
0x00C5 (0x00018A) 0x8602- f:00103 d: 2 | P = P + 2 (0x00C7), A # 0
0x00C6 (0x00018C) 0x2117- f:00020 d: 279 | A = OR[279]
0x00C7 (0x00018E) 0x1601- f:00013 d: 1 | A = A - 1 (0x0001)
0x00C8 (0x000190) 0x2915- f:00024 d: 277 | OR[277] = A
0x00C9 (0x000192) 0x2114- f:00020 d: 276 | A = OR[276]
0x00CA (0x000194) 0x12FF- f:00011 d: 255 | A = A & 255 (0x00FF)
0x00CB (0x000196) 0x2908- f:00024 d: 264 | OR[264] = A
0x00CC (0x000198) 0x2115- f:00020 d: 277 | A = OR[277]
0x00CD (0x00019A) 0x2708- f:00023 d: 264 | A = A - OR[264]
0x00CE (0x00019C) 0x8402- f:00102 d: 2 | P = P + 2 (0x00D0), A = 0
0x00CF (0x00019E) 0x7011- f:00070 d: 17 | P = P + 17 (0x00E0)
0x00D0 (0x0001A0) 0x2113- f:00020 d: 275 | A = OR[275]
0x00D1 (0x0001A2) 0x8402- f:00102 d: 2 | P = P + 2 (0x00D3), A = 0
0x00D2 (0x0001A4) 0x7003- f:00070 d: 3 | P = P + 3 (0x00D5)
0x00D3 (0x0001A6) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x00D4 (0x0001A8) 0x291A- f:00024 d: 282 | OR[282] = A
0x00D5 (0x0001AA) 0x2114- f:00020 d: 276 | A = OR[276]
0x00D6 (0x0001AC) 0x12FF- f:00011 d: 255 | A = A & 255 (0x00FF)
0x00D7 (0x0001AE) 0x2926- f:00024 d: 294 | OR[294] = A
0x00D8 (0x0001B0) 0x2114- f:00020 d: 276 | A = OR[276]
0x00D9 (0x0001B2) 0x0808- f:00004 d: 8 | A = A > 8 (0x0008)
0x00DA (0x0001B4) 0x1207- f:00011 d: 7 | A = A & 7 (0x0007)
0x00DB (0x0001B6) 0x2925- f:00024 d: 293 | OR[293] = A
0x00DC (0x0001B8) 0x100D- f:00010 d: 13 | A = 13 (0x000D)
0x00DD (0x0001BA) 0x2905- f:00024 d: 261 | OR[261] = A
0x00DE (0x0001BC) 0x1001- f:00010 d: 1 | A = 1 (0x0001)
0x00DF (0x0001BE) 0x2922- f:00024 d: 290 | OR[290] = A
0x00E0 (0x0001C0) 0x2101- f:00020 d: 257 | A = OR[257]
0x00E1 (0x0001C2) 0x1429- f:00012 d: 41 | A = A + 41 (0x0029)
0x00E2 (0x0001C4) 0x2908- f:00024 d: 264 | OR[264] = A
0x00E3 (0x0001C6) 0x3108- f:00030 d: 264 | A = (OR[264])
0x00E4 (0x0001C8) 0x080C- f:00004 d: 12 | A = A > 12 (0x000C)
0x00E5 (0x0001CA) 0x292E- f:00024 d: 302 | OR[302] = A
0x00E6 (0x0001CC) 0x2101- f:00020 d: 257 | A = OR[257]
0x00E7 (0x0001CE) 0x1429- f:00012 d: 41 | A = A + 41 (0x0029)
0x00E8 (0x0001D0) 0x2908- f:00024 d: 264 | OR[264] = A
0x00E9 (0x0001D2) 0x3108- f:00030 d: 264 | A = (OR[264])
0x00EA (0x0001D4) 0x0809- f:00004 d: 9 | A = A > 9 (0x0009)
0x00EB (0x0001D6) 0x1207- f:00011 d: 7 | A = A & 7 (0x0007)
0x00EC (0x0001D8) 0x292F- f:00024 d: 303 | OR[303] = A
0x00ED (0x0001DA) 0x1018- f:00010 d: 24 | A = 24 (0x0018)
0x00EE (0x0001DC) 0x2930- f:00024 d: 304 | OR[304] = A
0x00EF (0x0001DE) 0x1040- f:00010 d: 64 | A = 64 (0x0040)
0x00F0 (0x0001E0) 0x140F- f:00012 d: 15 | A = A + 15 (0x000F)
0x00F1 (0x0001E2) 0x2931- f:00024 d: 305 | OR[305] = A
0x00F2 (0x0001E4) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x00F3 (0x0001E6) 0x2932- f:00024 d: 306 | OR[306] = A
0x00F4 (0x0001E8) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x00F5 (0x0001EA) 0x2933- f:00024 d: 307 | OR[307] = A
0x00F6 (0x0001EC) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x00F7 (0x0001EE) 0x2934- f:00024 d: 308 | OR[308] = A
0x00F8 (0x0001F0) 0x1102- f:00010 d: 258 | A = 258 (0x0102)
0x00F9 (0x0001F2) 0x2935- f:00024 d: 309 | OR[309] = A
0x00FA (0x0001F4) 0x1130- f:00010 d: 304 | A = 304 (0x0130)
0x00FB (0x0001F6) 0x5800- f:00054 d: 0 | B = A
0x00FC (0x0001F8) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x00FD (0x0001FA) 0x7C09- f:00076 d: 9 | R = OR[9]
0x00FE (0x0001FC) 0x8602- f:00103 d: 2 | P = P + 2 (0x0100), A # 0
0x00FF (0x0001FE) 0x700B- f:00070 d: 11 | P = P + 11 (0x010A)
0x0100 (0x000200) 0x1007- f:00010 d: 7 | A = 7 (0x0007)
0x0101 (0x000202) 0x2930- f:00024 d: 304 | OR[304] = A
0x0102 (0x000204) 0x1001- f:00010 d: 1 | A = 1 (0x0001)
0x0103 (0x000206) 0x2931- f:00024 d: 305 | OR[305] = A
0x0104 (0x000208) 0x1130- f:00010 d: 304 | A = 304 (0x0130)
0x0105 (0x00020A) 0x5800- f:00054 d: 0 | B = A
0x0106 (0x00020C) 0x1800-0x3118 f:00014 d: 0 | A = 12568 (0x3118)
0x0108 (0x000210) 0x7C09- f:00076 d: 9 | R = OR[9]
0x0109 (0x000212) 0x721C- f:00071 d: 28 | P = P - 28 (0x00ED)
0x010A (0x000214) 0x2102- f:00020 d: 258 | A = OR[258]
0x010B (0x000216) 0x290E- f:00024 d: 270 | OR[270] = A
0x010C (0x000218) 0x1040- f:00010 d: 64 | A = 64 (0x0040)
0x010D (0x00021A) 0x140F- f:00012 d: 15 | A = A + 15 (0x000F)
0x010E (0x00021C) 0x290D- f:00024 d: 269 | OR[269] = A
0x010F (0x00021E) 0x210D- f:00020 d: 269 | A = OR[269]
0x0110 (0x000220) 0x8406- f:00102 d: 6 | P = P + 6 (0x0116), A = 0
0x0111 (0x000222) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x0112 (0x000224) 0x390E- f:00034 d: 270 | (OR[270]) = A
0x0113 (0x000226) 0x2F0D- f:00027 d: 269 | OR[269] = OR[269] - 1
0x0114 (0x000228) 0x2D0E- f:00026 d: 270 | OR[270] = OR[270] + 1
0x0115 (0x00022A) 0x7206- f:00071 d: 6 | P = P - 6 (0x010F)
0x0116 (0x00022C) 0x2102- f:00020 d: 258 | A = OR[258]
0x0117 (0x00022E) 0x142D- f:00012 d: 45 | A = A + 45 (0x002D)
0x0118 (0x000230) 0x2908- f:00024 d: 264 | OR[264] = A
0x0119 (0x000232) 0x2107- f:00020 d: 263 | A = OR[263]
0x011A (0x000234) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x011B (0x000236) 0x7E03-0x04EA f:00077 d: 3 | R = OR[3]+1258 (0x04EA)
0x011D (0x00023A) 0x2102- f:00020 d: 258 | A = OR[258]
0x011E (0x00023C) 0x1404- f:00012 d: 4 | A = A + 4 (0x0004)
0x011F (0x00023E) 0x2908- f:00024 d: 264 | OR[264] = A
0x0120 (0x000240) 0x2127- f:00020 d: 295 | A = OR[295]
0x0121 (0x000242) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x0122 (0x000244) 0x2102- f:00020 d: 258 | A = OR[258]
0x0123 (0x000246) 0x1405- f:00012 d: 5 | A = A + 5 (0x0005)
0x0124 (0x000248) 0x2908- f:00024 d: 264 | OR[264] = A
0x0125 (0x00024A) 0x2128- f:00020 d: 296 | A = OR[296]
0x0126 (0x00024C) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x0127 (0x00024E) 0x2102- f:00020 d: 258 | A = OR[258]
0x0128 (0x000250) 0x142A- f:00012 d: 42 | A = A + 42 (0x002A)
0x0129 (0x000252) 0x2908- f:00024 d: 264 | OR[264] = A
0x012A (0x000254) 0x2127- f:00020 d: 295 | A = OR[295]
0x012B (0x000256) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x012C (0x000258) 0x2102- f:00020 d: 258 | A = OR[258]
0x012D (0x00025A) 0x142B- f:00012 d: 43 | A = A + 43 (0x002B)
0x012E (0x00025C) 0x2908- f:00024 d: 264 | OR[264] = A
0x012F (0x00025E) 0x2128- f:00020 d: 296 | A = OR[296]
0x0130 (0x000260) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x0131 (0x000262) 0x211D- f:00020 d: 285 | A = OR[285]
0x0132 (0x000264) 0x2906- f:00024 d: 262 | OR[262] = A
0x0133 (0x000266) 0x2107- f:00020 d: 263 | A = OR[263]
0x0134 (0x000268) 0x1606- f:00013 d: 6 | A = A - 6 (0x0006)
0x0135 (0x00026A) 0x8405- f:00102 d: 5 | P = P + 5 (0x013A), A = 0
0x0136 (0x00026C) 0x2107- f:00020 d: 263 | A = OR[263]
0x0137 (0x00026E) 0x1607- f:00013 d: 7 | A = A - 7 (0x0007)
0x0138 (0x000270) 0x8402- f:00102 d: 2 | P = P + 2 (0x013A), A = 0
0x0139 (0x000272) 0x702F- f:00070 d: 47 | P = P + 47 (0x0168)
0x013A (0x000274) 0x2101- f:00020 d: 257 | A = OR[257]
0x013B (0x000276) 0x1428- f:00012 d: 40 | A = A + 40 (0x0028)
0x013C (0x000278) 0x2908- f:00024 d: 264 | OR[264] = A
0x013D (0x00027A) 0x3108- f:00030 d: 264 | A = (OR[264])
0x013E (0x00027C) 0x2913- f:00024 d: 275 | OR[275] = A
0x013F (0x00027E) 0x2101- f:00020 d: 257 | A = OR[257]
0x0140 (0x000280) 0x142A- f:00012 d: 42 | A = A + 42 (0x002A)
0x0141 (0x000282) 0x2908- f:00024 d: 264 | OR[264] = A
0x0142 (0x000284) 0x3108- f:00030 d: 264 | A = (OR[264])
0x0143 (0x000286) 0x2914- f:00024 d: 276 | OR[276] = A
0x0144 (0x000288) 0x2102- f:00020 d: 258 | A = OR[258]
0x0145 (0x00028A) 0x1429- f:00012 d: 41 | A = A + 41 (0x0029)
0x0146 (0x00028C) 0x2908- f:00024 d: 264 | OR[264] = A
0x0147 (0x00028E) 0x2113- f:00020 d: 275 | A = OR[275]
0x0148 (0x000290) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x0149 (0x000292) 0x2102- f:00020 d: 258 | A = OR[258]
0x014A (0x000294) 0x1428- f:00012 d: 40 | A = A + 40 (0x0028)
0x014B (0x000296) 0x2908- f:00024 d: 264 | OR[264] = A
0x014C (0x000298) 0x2114- f:00020 d: 276 | A = OR[276]
0x014D (0x00029A) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x014E (0x00029C) 0x2107- f:00020 d: 263 | A = OR[263]
0x014F (0x00029E) 0x1606- f:00013 d: 6 | A = A - 6 (0x0006)
0x0150 (0x0002A0) 0x8402- f:00102 d: 2 | P = P + 2 (0x0152), A = 0
0x0151 (0x0002A2) 0x7008- f:00070 d: 8 | P = P + 8 (0x0159)
0x0152 (0x0002A4) 0x2101- f:00020 d: 257 | A = OR[257]
0x0153 (0x0002A6) 0x1402- f:00012 d: 2 | A = A + 2 (0x0002)
0x0154 (0x0002A8) 0x2908- f:00024 d: 264 | OR[264] = A
0x0155 (0x0002AA) 0x3108- f:00030 d: 264 | A = (OR[264])
0x0156 (0x0002AC) 0x080F- f:00004 d: 15 | A = A > 15 (0x000F)
0x0157 (0x0002AE) 0x2915- f:00024 d: 277 | OR[277] = A
0x0158 (0x0002B0) 0x7008- f:00070 d: 8 | P = P + 8 (0x0160)
0x0159 (0x0002B2) 0x2101- f:00020 d: 257 | A = OR[257]
0x015A (0x0002B4) 0x1402- f:00012 d: 2 | A = A + 2 (0x0002)
0x015B (0x0002B6) 0x2908- f:00024 d: 264 | OR[264] = A
0x015C (0x0002B8) 0x3108- f:00030 d: 264 | A = (OR[264])
0x015D (0x0002BA) 0x080D- f:00004 d: 13 | A = A > 13 (0x000D)
0x015E (0x0002BC) 0x1201- f:00011 d: 1 | A = A & 1 (0x0001)
0x015F (0x0002BE) 0x2915- f:00024 d: 277 | OR[277] = A
0x0160 (0x0002C0) 0x2115- f:00020 d: 277 | A = OR[277]
0x0161 (0x0002C2) 0x8402- f:00102 d: 2 | P = P + 2 (0x0163), A = 0
0x0162 (0x0002C4) 0x7004- f:00070 d: 4 | P = P + 4 (0x0166)
0x0163 (0x0002C6) 0x1004- f:00010 d: 4 | A = 4 (0x0004)
0x0164 (0x0002C8) 0x2906- f:00024 d: 262 | OR[262] = A
0x0165 (0x0002CA) 0x7003- f:00070 d: 3 | P = P + 3 (0x0168)
0x0166 (0x0002CC) 0x1080- f:00010 d: 128 | A = 128 (0x0080)
0x0167 (0x0002CE) 0x2906- f:00024 d: 262 | OR[262] = A
0x0168 (0x0002D0) 0x2106- f:00020 d: 262 | A = OR[262]
0x0169 (0x0002D2) 0x12FF- f:00011 d: 255 | A = A & 255 (0x00FF)
0x016A (0x0002D4) 0x2906- f:00024 d: 262 | OR[262] = A
0x016B (0x0002D6) 0x2102- f:00020 d: 258 | A = OR[258]
0x016C (0x0002D8) 0x1403- f:00012 d: 3 | A = A + 3 (0x0003)
0x016D (0x0002DA) 0x2908- f:00024 d: 264 | OR[264] = A
0x016E (0x0002DC) 0x3108- f:00030 d: 264 | A = (OR[264])
0x016F (0x0002DE) 0x0A09- f:00005 d: 9 | A = A < 9 (0x0009)
0x0170 (0x0002E0) 0x2506- f:00022 d: 262 | A = A + OR[262]
0x0171 (0x0002E2) 0x0C09- f:00006 d: 9 | A = A >> 9 (0x0009)
0x0172 (0x0002E4) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x0173 (0x0002E6) 0x2100- f:00020 d: 256 | A = OR[256]
0x0174 (0x0002E8) 0x5800- f:00054 d: 0 | B = A
0x0175 (0x0002EA) 0xE000- f:00160 d: 0 | IOB , fn000
0x0176 (0x0002EC) 0x1002- f:00010 d: 2 | A = 2 (0x0002)
0x0177 (0x0002EE) 0x2920- f:00024 d: 288 | OR[288] = A
0x0178 (0x0002F0) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x0179 (0x0002F2) 0x292A- f:00024 d: 298 | OR[298] = A
0x017A (0x0002F4) 0x2102- f:00020 d: 258 | A = OR[258]
0x017B (0x0002F6) 0x1406- f:00012 d: 6 | A = A + 6 (0x0006)
0x017C (0x0002F8) 0x292B- f:00024 d: 299 | OR[299] = A
0x017D (0x0002FA) 0x2101- f:00020 d: 257 | A = OR[257]
0x017E (0x0002FC) 0x1407- f:00012 d: 7 | A = A + 7 (0x0007)
0x017F (0x0002FE) 0x2908- f:00024 d: 264 | OR[264] = A
0x0180 (0x000300) 0x3108- f:00030 d: 264 | A = (OR[264])
0x0181 (0x000302) 0x0809- f:00004 d: 9 | A = A > 9 (0x0009)
0x0182 (0x000304) 0x121F- f:00011 d: 31 | A = A & 31 (0x001F)
0x0183 (0x000306) 0x1603- f:00013 d: 3 | A = A - 3 (0x0003)
0x0184 (0x000308) 0x8402- f:00102 d: 2 | P = P + 2 (0x0186), A = 0
0x0185 (0x00030A) 0x7004- f:00070 d: 4 | P = P + 4 (0x0189)
0x0186 (0x00030C) 0x1018- f:00010 d: 24 | A = 24 (0x0018)
0x0187 (0x00030E) 0x292C- f:00024 d: 300 | OR[300] = A
0x0188 (0x000310) 0x7003- f:00070 d: 3 | P = P + 3 (0x018B)
0x0189 (0x000312) 0x1019- f:00010 d: 25 | A = 25 (0x0019)
0x018A (0x000314) 0x292C- f:00024 d: 300 | OR[300] = A
0x018B (0x000316) 0x212A- f:00020 d: 298 | A = OR[298]
0x018C (0x000318) 0x272C- f:00023 d: 300 | A = A - OR[300]
0x018D (0x00031A) 0x8411- f:00102 d: 17 | P = P + 17 (0x019E), A = 0
0x018E (0x00031C) 0x212A- f:00020 d: 298 | A = OR[298]
0x018F (0x00031E) 0x1C00-0x7000 f:00016 d: 0 | A = A + 28672 (0x7000)
0x0191 (0x000322) 0xE200- f:00161 d: 0 | IOB , fn001
0x0192 (0x000324) 0x7E03-0x04BD f:00077 d: 3 | R = OR[3]+1213 (0x04BD)
0x0194 (0x000328) 0x8402- f:00102 d: 2 | P = P + 2 (0x0196), A = 0
0x0195 (0x00032A) 0x7003- f:00070 d: 3 | P = P + 3 (0x0198)
0x0196 (0x00032C) 0xF600- f:00173 d: 0 | IOB , fn013
0x0197 (0x00032E) 0x7003- f:00070 d: 3 | P = P + 3 (0x019A)
0x0198 (0x000330) 0x1800-0xFFFF f:00014 d: 0 | A = 65535 (0xFFFF)
0x019A (0x000334) 0x392B- f:00034 d: 299 | (OR[299]) = A
0x019B (0x000336) 0x2D2B- f:00026 d: 299 | OR[299] = OR[299] + 1
0x019C (0x000338) 0x2D2A- f:00026 d: 298 | OR[298] = OR[298] + 1
0x019D (0x00033A) 0x7212- f:00071 d: 18 | P = P - 18 (0x018B)
0x019E (0x00033C) 0x2102- f:00020 d: 258 | A = OR[258]
0x019F (0x00033E) 0x1440- f:00012 d: 64 | A = A + 64 (0x0040)
0x01A0 (0x000340) 0x2903- f:00024 d: 259 | OR[259] = A
0x01A1 (0x000342) 0x211D- f:00020 d: 285 | A = OR[285]
0x01A2 (0x000344) 0x1620- f:00013 d: 32 | A = A - 32 (0x0020)
0x01A3 (0x000346) 0x8402- f:00102 d: 2 | P = P + 2 (0x01A5), A = 0
0x01A4 (0x000348) 0x7007- f:00070 d: 7 | P = P + 7 (0x01AB)
0x01A5 (0x00034A) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x01A6 (0x00034C) 0x2904- f:00024 d: 260 | OR[260] = A
0x01A7 (0x00034E) 0x1800-0x005B f:00014 d: 0 | A = 91 (0x005B)
0x01A9 (0x000352) 0x2929- f:00024 d: 297 | OR[297] = A
0x01AA (0x000354) 0x7041- f:00070 d: 65 | P = P + 65 (0x01EB)
0x01AB (0x000356) 0x211D- f:00020 d: 285 | A = OR[285]
0x01AC (0x000358) 0x1608- f:00013 d: 8 | A = A - 8 (0x0008)
0x01AD (0x00035A) 0x8402- f:00102 d: 2 | P = P + 2 (0x01AF), A = 0
0x01AE (0x00035C) 0x7007- f:00070 d: 7 | P = P + 7 (0x01B5)
0x01AF (0x00035E) 0x1001- f:00010 d: 1 | A = 1 (0x0001)
0x01B0 (0x000360) 0x2904- f:00024 d: 260 | OR[260] = A
0x01B1 (0x000362) 0x1800-0x005A f:00014 d: 0 | A = 90 (0x005A)
0x01B3 (0x000366) 0x2929- f:00024 d: 297 | OR[297] = A
0x01B4 (0x000368) 0x7037- f:00070 d: 55 | P = P + 55 (0x01EB)
0x01B5 (0x00036A) 0x211D- f:00020 d: 285 | A = OR[285]
0x01B6 (0x00036C) 0x1610- f:00013 d: 16 | A = A - 16 (0x0010)
0x01B7 (0x00036E) 0x8404- f:00102 d: 4 | P = P + 4 (0x01BB), A = 0
0x01B8 (0x000370) 0x211D- f:00020 d: 285 | A = OR[285]
0x01B9 (0x000372) 0x8402- f:00102 d: 2 | P = P + 2 (0x01BB), A = 0
0x01BA (0x000374) 0x7011- f:00070 d: 17 | P = P + 17 (0x01CB)
0x01BB (0x000376) 0x211C- f:00020 d: 284 | A = OR[284]
0x01BC (0x000378) 0x1201- f:00011 d: 1 | A = A & 1 (0x0001)
0x01BD (0x00037A) 0x2908- f:00024 d: 264 | OR[264] = A
0x01BE (0x00037C) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x01BF (0x00037E) 0x2708- f:00023 d: 264 | A = A - OR[264]
0x01C0 (0x000380) 0x8402- f:00102 d: 2 | P = P + 2 (0x01C2), A = 0
0x01C1 (0x000382) 0x7004- f:00070 d: 4 | P = P + 4 (0x01C5)
0x01C2 (0x000384) 0x1003- f:00010 d: 3 | A = 3 (0x0003)
0x01C3 (0x000386) 0x2904- f:00024 d: 260 | OR[260] = A
0x01C4 (0x000388) 0x7003- f:00070 d: 3 | P = P + 3 (0x01C7)
0x01C5 (0x00038A) 0x1002- f:00010 d: 2 | A = 2 (0x0002)
0x01C6 (0x00038C) 0x2904- f:00024 d: 260 | OR[260] = A
0x01C7 (0x00038E) 0x1800-0x0055 f:00014 d: 0 | A = 85 (0x0055)
0x01C9 (0x000392) 0x2929- f:00024 d: 297 | OR[297] = A
0x01CA (0x000394) 0x7021- f:00070 d: 33 | P = P + 33 (0x01EB)
0x01CB (0x000396) 0x211D- f:00020 d: 285 | A = OR[285]
0x01CC (0x000398) 0x1601- f:00013 d: 1 | A = A - 1 (0x0001)
0x01CD (0x00039A) 0x8402- f:00102 d: 2 | P = P + 2 (0x01CF), A = 0
0x01CE (0x00039C) 0x7007- f:00070 d: 7 | P = P + 7 (0x01D5)
0x01CF (0x00039E) 0x1002- f:00010 d: 2 | A = 2 (0x0002)
0x01D0 (0x0003A0) 0x2904- f:00024 d: 260 | OR[260] = A
0x01D1 (0x0003A2) 0x1800-0x0055 f:00014 d: 0 | A = 85 (0x0055)
0x01D3 (0x0003A6) 0x2929- f:00024 d: 297 | OR[297] = A
0x01D4 (0x0003A8) 0x7017- f:00070 d: 23 | P = P + 23 (0x01EB)
0x01D5 (0x0003AA) 0x211D- f:00020 d: 285 | A = OR[285]
0x01D6 (0x0003AC) 0x1602- f:00013 d: 2 | A = A - 2 (0x0002)
0x01D7 (0x0003AE) 0x8402- f:00102 d: 2 | P = P + 2 (0x01D9), A = 0
0x01D8 (0x0003B0) 0x7007- f:00070 d: 7 | P = P + 7 (0x01DF)
0x01D9 (0x0003B2) 0x1003- f:00010 d: 3 | A = 3 (0x0003)
0x01DA (0x0003B4) 0x2904- f:00024 d: 260 | OR[260] = A
0x01DB (0x0003B6) 0x1800-0x0055 f:00014 d: 0 | A = 85 (0x0055)
0x01DD (0x0003BA) 0x2929- f:00024 d: 297 | OR[297] = A
0x01DE (0x0003BC) 0x700D- f:00070 d: 13 | P = P + 13 (0x01EB)
0x01DF (0x0003BE) 0x211D- f:00020 d: 285 | A = OR[285]
0x01E0 (0x0003C0) 0x1640- f:00013 d: 64 | A = A - 64 (0x0040)
0x01E1 (0x0003C2) 0x8402- f:00102 d: 2 | P = P + 2 (0x01E3), A = 0
0x01E2 (0x0003C4) 0x7007- f:00070 d: 7 | P = P + 7 (0x01E9)
0x01E3 (0x0003C6) 0x1004- f:00010 d: 4 | A = 4 (0x0004)
0x01E4 (0x0003C8) 0x2904- f:00024 d: 260 | OR[260] = A
0x01E5 (0x0003CA) 0x1800-0x0059 f:00014 d: 0 | A = 89 (0x0059)
0x01E7 (0x0003CE) 0x2929- f:00024 d: 297 | OR[297] = A
0x01E8 (0x0003D0) 0x7003- f:00070 d: 3 | P = P + 3 (0x01EB)
0x01E9 (0x0003D2) 0x7C34- f:00076 d: 52 | R = OR[52]
0x01EA (0x0003D4) 0x0028- f:00000 d: 40 | PASS | **** non-standard encoding with D:0x0028 ****
0x01EB (0x0003D6) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x01EC (0x0003D8) 0x2913- f:00024 d: 275 | OR[275] = A
0x01ED (0x0003DA) 0x2104- f:00020 d: 260 | A = OR[260]
0x01EE (0x0003DC) 0x2914- f:00024 d: 276 | OR[276] = A
0x01EF (0x0003DE) 0x2114- f:00020 d: 276 | A = OR[276]
0x01F0 (0x0003E0) 0x8405- f:00102 d: 5 | P = P + 5 (0x01F5), A = 0
0x01F1 (0x0003E2) 0x100F- f:00010 d: 15 | A = 15 (0x000F)
0x01F2 (0x0003E4) 0x2B13- f:00025 d: 275 | OR[275] = A + OR[275]
0x01F3 (0x0003E6) 0x2F14- f:00027 d: 276 | OR[276] = OR[276] - 1
0x01F4 (0x0003E8) 0x7205- f:00071 d: 5 | P = P - 5 (0x01EF)
0x01F5 (0x0003EA) 0x2113- f:00020 d: 275 | A = OR[275]
0x01F6 (0x0003EC) 0x2403- f:00022 d: 3 | A = A + OR[3]
0x01F7 (0x0003EE) 0x1C00-0x05CE f:00016 d: 0 | A = A + 1486 (0x05CE)
0x01F9 (0x0003F2) 0x2913- f:00024 d: 275 | OR[275] = A
0x01FA (0x0003F4) 0x2113- f:00020 d: 275 | A = OR[275]
0x01FB (0x0003F6) 0x290D- f:00024 d: 269 | OR[269] = A
0x01FC (0x0003F8) 0x2103- f:00020 d: 259 | A = OR[259]
0x01FD (0x0003FA) 0x290E- f:00024 d: 270 | OR[270] = A
0x01FE (0x0003FC) 0x100F- f:00010 d: 15 | A = 15 (0x000F)
0x01FF (0x0003FE) 0x290F- f:00024 d: 271 | OR[271] = A
0x0200 (0x000400) 0x7006- f:00070 d: 6 | P = P + 6 (0x0206)
0x0201 (0x000402) 0x310D- f:00030 d: 269 | A = (OR[269])
0x0202 (0x000404) 0x390E- f:00034 d: 270 | (OR[270]) = A
0x0203 (0x000406) 0x2D0D- f:00026 d: 269 | OR[269] = OR[269] + 1
0x0204 (0x000408) 0x2D0E- f:00026 d: 270 | OR[270] = OR[270] + 1
0x0205 (0x00040A) 0x2F0F- f:00027 d: 271 | OR[271] = OR[271] - 1
0x0206 (0x00040C) 0x210F- f:00020 d: 271 | A = OR[271]
0x0207 (0x00040E) 0x8E06- f:00107 d: 6 | P = P - 6 (0x0201), A # 0
0x0208 (0x000410) 0x211A- f:00020 d: 282 | A = OR[282]
0x0209 (0x000412) 0x8602- f:00103 d: 2 | P = P + 2 (0x020B), A # 0
0x020A (0x000414) 0x7025- f:00070 d: 37 | P = P + 37 (0x022F)
0x020B (0x000416) 0x211A- f:00020 d: 282 | A = OR[282]
0x020C (0x000418) 0x140D- f:00012 d: 13 | A = A + 13 (0x000D)
0x020D (0x00041A) 0x2908- f:00024 d: 264 | OR[264] = A
0x020E (0x00041C) 0x3108- f:00030 d: 264 | A = (OR[264])
0x020F (0x00041E) 0x080F- f:00004 d: 15 | A = A > 15 (0x000F)
0x0210 (0x000420) 0x292A- f:00024 d: 298 | OR[298] = A
0x0211 (0x000422) 0x211A- f:00020 d: 282 | A = OR[282]
0x0212 (0x000424) 0x1412- f:00012 d: 18 | A = A + 18 (0x0012)
0x0213 (0x000426) 0x2908- f:00024 d: 264 | OR[264] = A
0x0214 (0x000428) 0x3108- f:00030 d: 264 | A = (OR[264])
0x0215 (0x00042A) 0x0806- f:00004 d: 6 | A = A > 6 (0x0006)
0x0216 (0x00042C) 0x1201- f:00011 d: 1 | A = A & 1 (0x0001)
0x0217 (0x00042E) 0x292B- f:00024 d: 299 | OR[299] = A
0x0218 (0x000430) 0x212A- f:00020 d: 298 | A = OR[298]
0x0219 (0x000432) 0x1601- f:00013 d: 1 | A = A - 1 (0x0001)
0x021A (0x000434) 0x8402- f:00102 d: 2 | P = P + 2 (0x021C), A = 0
0x021B (0x000436) 0x7014- f:00070 d: 20 | P = P + 20 (0x022F)
0x021C (0x000438) 0x212B- f:00020 d: 299 | A = OR[299]
0x021D (0x00043A) 0x1601- f:00013 d: 1 | A = A - 1 (0x0001)
0x021E (0x00043C) 0x8402- f:00102 d: 2 | P = P + 2 (0x0220), A = 0
0x021F (0x00043E) 0x7010- f:00070 d: 16 | P = P + 16 (0x022F)
0x0220 (0x000440) 0x2107- f:00020 d: 263 | A = OR[263]
0x0221 (0x000442) 0x1602- f:00013 d: 2 | A = A - 2 (0x0002)
0x0222 (0x000444) 0x8402- f:00102 d: 2 | P = P + 2 (0x0224), A = 0
0x0223 (0x000446) 0x700A- f:00070 d: 10 | P = P + 10 (0x022D)
0x0224 (0x000448) 0x2128- f:00020 d: 296 | A = OR[296]
0x0225 (0x00044A) 0x13E0- f:00011 d: 480 | A = A & 480 (0x01E0)
0x0226 (0x00044C) 0x2908- f:00024 d: 264 | OR[264] = A
0x0227 (0x00044E) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x0228 (0x000450) 0x2708- f:00023 d: 264 | A = A - OR[264]
0x0229 (0x000452) 0x8602- f:00103 d: 2 | P = P + 2 (0x022B), A # 0
0x022A (0x000454) 0x7003- f:00070 d: 3 | P = P + 3 (0x022D)
0x022B (0x000456) 0x7E03-0x057C f:00077 d: 3 | R = OR[3]+1404 (0x057C)
0x022D (0x00045A) 0x100D- f:00010 d: 13 | A = 13 (0x000D)
0x022E (0x00045C) 0x2905- f:00024 d: 261 | OR[261] = A
0x022F (0x00045E) 0x2129- f:00020 d: 297 | A = OR[297]
0x0230 (0x000460) 0x1E00-0x0055 f:00017 d: 0 | A = A - 85 (0x0055)
0x0232 (0x000464) 0x8402- f:00102 d: 2 | P = P + 2 (0x0234), A = 0
0x0233 (0x000466) 0x700A- f:00070 d: 10 | P = P + 10 (0x023D)
0x0234 (0x000468) 0x211E- f:00020 d: 286 | A = OR[286]
0x0235 (0x00046A) 0x1401- f:00012 d: 1 | A = A + 1 (0x0001)
0x0236 (0x00046C) 0x2908- f:00024 d: 264 | OR[264] = A
0x0237 (0x00046E) 0x3108- f:00030 d: 264 | A = (OR[264])
0x0238 (0x000470) 0x8603- f:00103 d: 3 | P = P + 3 (0x023B), A # 0
0x0239 (0x000472) 0x1005- f:00010 d: 5 | A = 5 (0x0005)
0x023A (0x000474) 0x2904- f:00024 d: 260 | OR[260] = A
0x023B (0x000476) 0x2104- f:00020 d: 260 | A = OR[260]
0x023C (0x000478) 0x3903- f:00034 d: 259 | (OR[259]) = A
0x023D (0x00047A) 0x2105- f:00020 d: 261 | A = OR[261]
0x023E (0x00047C) 0x160D- f:00013 d: 13 | A = A - 13 (0x000D)
0x023F (0x00047E) 0x8402- f:00102 d: 2 | P = P + 2 (0x0241), A = 0
0x0240 (0x000480) 0x7015- f:00070 d: 21 | P = P + 21 (0x0255)
0x0241 (0x000482) 0x2103- f:00020 d: 259 | A = OR[259]
0x0242 (0x000484) 0x1401- f:00012 d: 1 | A = A + 1 (0x0001)
0x0243 (0x000486) 0x290D- f:00024 d: 269 | OR[269] = A
0x0244 (0x000488) 0x310D- f:00030 d: 269 | A = (OR[269])
0x0245 (0x00048A) 0x290E- f:00024 d: 270 | OR[270] = A
0x0246 (0x00048C) 0x210E- f:00020 d: 270 | A = OR[270]
0x0247 (0x00048E) 0x0808- f:00004 d: 8 | A = A > 8 (0x0008)
0x0248 (0x000490) 0x1401- f:00012 d: 1 | A = A + 1 (0x0001)
0x0249 (0x000492) 0x290F- f:00024 d: 271 | OR[271] = A
0x024A (0x000494) 0x210F- f:00020 d: 271 | A = OR[271]
0x024B (0x000496) 0x12FF- f:00011 d: 255 | A = A & 255 (0x00FF)
0x024C (0x000498) 0x290F- f:00024 d: 271 | OR[271] = A
0x024D (0x00049A) 0x210E- f:00020 d: 270 | A = OR[270]
0x024E (0x00049C) 0x0A09- f:00005 d: 9 | A = A < 9 (0x0009)
0x024F (0x00049E) 0x250F- f:00022 d: 271 | A = A + OR[271]
0x0250 (0x0004A0) 0x0C09- f:00006 d: 9 | A = A >> 9 (0x0009)
0x0251 (0x0004A2) 0x290E- f:00024 d: 270 | OR[270] = A
0x0252 (0x0004A4) 0x390D- f:00034 d: 269 | (OR[269]) = A
0x0253 (0x0004A6) 0x210F- f:00020 d: 271 | A = OR[271]
0x0254 (0x0004A8) 0x7012- f:00070 d: 18 | P = P + 18 (0x0266)
0x0255 (0x0004AA) 0x1028- f:00010 d: 40 | A = 40 (0x0028)
0x0256 (0x0004AC) 0x2930- f:00024 d: 304 | OR[304] = A
0x0257 (0x0004AE) 0x2129- f:00020 d: 297 | A = OR[297]
0x0258 (0x0004B0) 0x2931- f:00024 d: 305 | OR[305] = A
0x0259 (0x0004B2) 0x2124- f:00020 d: 292 | A = OR[292]
0x025A (0x0004B4) 0x2932- f:00024 d: 306 | OR[306] = A
0x025B (0x0004B6) 0x2125- f:00020 d: 293 | A = OR[293]
0x025C (0x0004B8) 0x2933- f:00024 d: 307 | OR[307] = A
0x025D (0x0004BA) 0x2126- f:00020 d: 294 | A = OR[294]
0x025E (0x0004BC) 0x2934- f:00024 d: 308 | OR[308] = A
0x025F (0x0004BE) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x0260 (0x0004C0) 0x2935- f:00024 d: 309 | OR[309] = A
0x0261 (0x0004C2) 0x1130- f:00010 d: 304 | A = 304 (0x0130)
0x0262 (0x0004C4) 0x5800- f:00054 d: 0 | B = A
0x0263 (0x0004C6) 0x1800-0x3118 f:00014 d: 0 | A = 12568 (0x3118)
0x0265 (0x0004CA) 0x7C09- f:00076 d: 9 | R = OR[9]
0x0266 (0x0004CC) 0x211A- f:00020 d: 282 | A = OR[282]
0x0267 (0x0004CE) 0x8602- f:00103 d: 2 | P = P + 2 (0x0269), A # 0
0x0268 (0x0004D0) 0x700C- f:00070 d: 12 | P = P + 12 (0x0274)
0x0269 (0x0004D2) 0x2105- f:00020 d: 261 | A = OR[261]
0x026A (0x0004D4) 0x12FF- f:00011 d: 255 | A = A & 255 (0x00FF)
0x026B (0x0004D6) 0x2905- f:00024 d: 261 | OR[261] = A
0x026C (0x0004D8) 0x211A- f:00020 d: 282 | A = OR[282]
0x026D (0x0004DA) 0x1416- f:00012 d: 22 | A = A + 22 (0x0016)
0x026E (0x0004DC) 0x2908- f:00024 d: 264 | OR[264] = A
0x026F (0x0004DE) 0x3108- f:00030 d: 264 | A = (OR[264])
0x0270 (0x0004E0) 0x1A00-0xFF00 f:00015 d: 0 | A = A & 65280 (0xFF00)
0x0272 (0x0004E4) 0x2505- f:00022 d: 261 | A = A + OR[261]
0x0273 (0x0004E6) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x0274 (0x0004E8) 0x2105- f:00020 d: 261 | A = OR[261]
0x0275 (0x0004EA) 0x160D- f:00013 d: 13 | A = A - 13 (0x000D)
0x0276 (0x0004EC) 0x84A5- f:00102 d: 165 | P = P + 165 (0x031B), A = 0
0x0277 (0x0004EE) 0x2105- f:00020 d: 261 | A = OR[261]
0x0278 (0x0004F0) 0x160C- f:00013 d: 12 | A = A - 12 (0x000C)
0x0279 (0x0004F2) 0x84A2- f:00102 d: 162 | P = P + 162 (0x031B), A = 0
0x027A (0x0004F4) 0x2104- f:00020 d: 260 | A = OR[260]
0x027B (0x0004F6) 0x1602- f:00013 d: 2 | A = A - 2 (0x0002)
0x027C (0x0004F8) 0x8429- f:00102 d: 41 | P = P + 41 (0x02A5), A = 0
0x027D (0x0004FA) 0x2104- f:00020 d: 260 | A = OR[260]
0x027E (0x0004FC) 0x1603- f:00013 d: 3 | A = A - 3 (0x0003)
0x027F (0x0004FE) 0x8426- f:00102 d: 38 | P = P + 38 (0x02A5), A = 0
0x0280 (0x000500) 0x7E03-0x0428 f:00077 d: 3 | R = OR[3]+1064 (0x0428)
0x0282 (0x000504) 0x2100- f:00020 d: 256 | A = OR[256]
0x0283 (0x000506) 0x5800- f:00054 d: 0 | B = A
0x0284 (0x000508) 0xE000- f:00160 d: 0 | IOB , fn000
0x0285 (0x00050A) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x0286 (0x00050C) 0x3901- f:00034 d: 257 | (OR[257]) = A
0x0287 (0x00050E) 0x2101- f:00020 d: 257 | A = OR[257]
0x0288 (0x000510) 0x1402- f:00012 d: 2 | A = A + 2 (0x0002)
0x0289 (0x000512) 0x2908- f:00024 d: 264 | OR[264] = A
0x028A (0x000514) 0x3108- f:00030 d: 264 | A = (OR[264])
0x028B (0x000516) 0x1A00-0xFFC0 f:00015 d: 0 | A = A & 65472 (0xFFC0)
0x028D (0x00051A) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x028E (0x00051C) 0x211B- f:00020 d: 283 | A = OR[283]
0x028F (0x00051E) 0x8602- f:00103 d: 2 | P = P + 2 (0x0291), A # 0
0x0290 (0x000520) 0x7008- f:00070 d: 8 | P = P + 8 (0x0298)
0x0291 (0x000522) 0x3101- f:00030 d: 257 | A = (OR[257])
0x0292 (0x000524) 0x0E09- f:00007 d: 9 | A = A << 9 (0x0009)
0x0293 (0x000526) 0x0A01- f:00005 d: 1 | A = A < 1 (0x0001)
0x0294 (0x000528) 0x1401- f:00012 d: 1 | A = A + 1 (0x0001)
0x0295 (0x00052A) 0x0C0A- f:00006 d: 10 | A = A >> 10 (0x000A)
0x0296 (0x00052C) 0x3901- f:00034 d: 257 | (OR[257]) = A
0x0297 (0x00052E) 0x7008- f:00070 d: 8 | P = P + 8 (0x029F)
0x0298 (0x000530) 0x0400- f:00002 d: 0 | I = 0
0x0299 (0x000532) 0x0000- f:00000 d: 0 | PASS
0x029A (0x000534) 0x2101- f:00020 d: 257 | A = OR[257]
0x029B (0x000536) 0x2897- f:00024 d: 151 | OR[151] = A
0x029C (0x000538) 0x7E00-0x1947 f:00077 d: 0 | R = OR[0]+6471 (0x1947)
0x029E (0x00053C) 0x0600- f:00003 d: 0 | I = 1
0x029F (0x00053E) 0x102A- f:00010 d: 42 | A = 42 (0x002A)
0x02A0 (0x000540) 0x2930- f:00024 d: 304 | OR[304] = A
0x02A1 (0x000542) 0x1130- f:00010 d: 304 | A = 304 (0x0130)
0x02A2 (0x000544) 0x5800- f:00054 d: 0 | B = A
0x02A3 (0x000546) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x02A4 (0x000548) 0x7C09- f:00076 d: 9 | R = OR[9]
0x02A5 (0x00054A) 0x211E- f:00020 d: 286 | A = OR[286]
0x02A6 (0x00054C) 0x1402- f:00012 d: 2 | A = A + 2 (0x0002)
0x02A7 (0x00054E) 0x2908- f:00024 d: 264 | OR[264] = A
0x02A8 (0x000550) 0x3108- f:00030 d: 264 | A = (OR[264])
0x02A9 (0x000552) 0x0E01- f:00007 d: 1 | A = A << 1 (0x0001)
0x02AA (0x000554) 0x0A01- f:00005 d: 1 | A = A < 1 (0x0001)
0x02AB (0x000556) 0x1400- f:00012 d: 0 | A = A + 0 (0x0000)
0x02AC (0x000558) 0x0C02- f:00006 d: 2 | A = A >> 2 (0x0002)
0x02AD (0x00055A) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x02AE (0x00055C) 0x211A- f:00020 d: 282 | A = OR[282]
0x02AF (0x00055E) 0x140B- f:00012 d: 11 | A = A + 11 (0x000B)
0x02B0 (0x000560) 0x2908- f:00024 d: 264 | OR[264] = A
0x02B1 (0x000562) 0x3108- f:00030 d: 264 | A = (OR[264])
0x02B2 (0x000564) 0x292A- f:00024 d: 298 | OR[298] = A
0x02B3 (0x000566) 0x2D2A- f:00026 d: 298 | OR[298] = OR[298] + 1
0x02B4 (0x000568) 0x211A- f:00020 d: 282 | A = OR[282]
0x02B5 (0x00056A) 0x140B- f:00012 d: 11 | A = A + 11 (0x000B)
0x02B6 (0x00056C) 0x2908- f:00024 d: 264 | OR[264] = A
0x02B7 (0x00056E) 0x212A- f:00020 d: 298 | A = OR[298]
0x02B8 (0x000570) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x02B9 (0x000572) 0x211C- f:00020 d: 284 | A = OR[284]
0x02BA (0x000574) 0x1201- f:00011 d: 1 | A = A & 1 (0x0001)
0x02BB (0x000576) 0x8402- f:00102 d: 2 | P = P + 2 (0x02BD), A = 0
0x02BC (0x000578) 0x7008- f:00070 d: 8 | P = P + 8 (0x02C4)
0x02BD (0x00057A) 0x211A- f:00020 d: 282 | A = OR[282]
0x02BE (0x00057C) 0x140C- f:00012 d: 12 | A = A + 12 (0x000C)
0x02BF (0x00057E) 0x2908- f:00024 d: 264 | OR[264] = A
0x02C0 (0x000580) 0x3108- f:00030 d: 264 | A = (OR[264])
0x02C1 (0x000582) 0x272A- f:00023 d: 298 | A = A - OR[298]
0x02C2 (0x000584) 0xBC03-0x044F f:00136 d: 3 | R = OR[3]+1103 (0x044F), A = 0
0x02C4 (0x000588) 0x0400- f:00002 d: 0 | I = 0
0x02C5 (0x00058A) 0x0000- f:00000 d: 0 | PASS
0x02C6 (0x00058C) 0x211C- f:00020 d: 284 | A = OR[284]
0x02C7 (0x00058E) 0x1201- f:00011 d: 1 | A = A & 1 (0x0001)
0x02C8 (0x000590) 0x2908- f:00024 d: 264 | OR[264] = A
0x02C9 (0x000592) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x02CA (0x000594) 0x2708- f:00023 d: 264 | A = A - OR[264]
0x02CB (0x000596) 0x8602- f:00103 d: 2 | P = P + 2 (0x02CD), A # 0
0x02CC (0x000598) 0x7035- f:00070 d: 53 | P = P + 53 (0x0301)
0x02CD (0x00059A) 0x211A- f:00020 d: 282 | A = OR[282]
0x02CE (0x00059C) 0x140A- f:00012 d: 10 | A = A + 10 (0x000A)
0x02CF (0x00059E) 0x2908- f:00024 d: 264 | OR[264] = A
0x02D0 (0x0005A0) 0x212A- f:00020 d: 298 | A = OR[298]
0x02D1 (0x0005A2) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x02D2 (0x0005A4) 0x211E- f:00020 d: 286 | A = OR[286]
0x02D3 (0x0005A6) 0x1403- f:00012 d: 3 | A = A + 3 (0x0003)
0x02D4 (0x0005A8) 0x2908- f:00024 d: 264 | OR[264] = A
0x02D5 (0x0005AA) 0x212A- f:00020 d: 298 | A = OR[298]
0x02D6 (0x0005AC) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x02D7 (0x0005AE) 0x211E- f:00020 d: 286 | A = OR[286]
0x02D8 (0x0005B0) 0x1404- f:00012 d: 4 | A = A + 4 (0x0004)
0x02D9 (0x0005B2) 0x2908- f:00024 d: 264 | OR[264] = A
0x02DA (0x0005B4) 0x211A- f:00020 d: 282 | A = OR[282]
0x02DB (0x0005B6) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x02DC (0x0005B8) 0x211E- f:00020 d: 286 | A = OR[286]
0x02DD (0x0005BA) 0x1402- f:00012 d: 2 | A = A + 2 (0x0002)
0x02DE (0x0005BC) 0x2908- f:00024 d: 264 | OR[264] = A
0x02DF (0x0005BE) 0x3108- f:00030 d: 264 | A = (OR[264])
0x02E0 (0x0005C0) 0x0A02- f:00005 d: 2 | A = A < 2 (0x0002)
0x02E1 (0x0005C2) 0x1401- f:00012 d: 1 | A = A + 1 (0x0001)
0x02E2 (0x0005C4) 0x0C02- f:00006 d: 2 | A = A >> 2 (0x0002)
0x02E3 (0x0005C6) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x02E4 (0x0005C8) 0x20B0- f:00020 d: 176 | A = OR[176]
0x02E5 (0x0005CA) 0x1404- f:00012 d: 4 | A = A + 4 (0x0004)
0x02E6 (0x0005CC) 0x2819- f:00024 d: 25 | OR[25] = A
0x02E7 (0x0005CE) 0x211C- f:00020 d: 284 | A = OR[284]
0x02E8 (0x0005D0) 0x1611- f:00013 d: 17 | A = A - 17 (0x0011)
0x02E9 (0x0005D2) 0x8602- f:00103 d: 2 | P = P + 2 (0x02EB), A # 0
0x02EA (0x0005D4) 0x7013- f:00070 d: 19 | P = P + 19 (0x02FD)
0x02EB (0x0005D6) 0x212E- f:00020 d: 302 | A = OR[302]
0x02EC (0x0005D8) 0x1601- f:00013 d: 1 | A = A - 1 (0x0001)
0x02ED (0x0005DA) 0x8602- f:00103 d: 2 | P = P + 2 (0x02EF), A # 0
0x02EE (0x0005DC) 0x700F- f:00070 d: 15 | P = P + 15 (0x02FD)
0x02EF (0x0005DE) 0x212F- f:00020 d: 303 | A = OR[303]
0x02F0 (0x0005E0) 0x2647- f:00023 d: 71 | A = A - OR[71]
0x02F1 (0x0005E2) 0x8402- f:00102 d: 2 | P = P + 2 (0x02F3), A = 0
0x02F2 (0x0005E4) 0x700B- f:00070 d: 11 | P = P + 11 (0x02FD)
0x02F3 (0x0005E6) 0x212E- f:00020 d: 302 | A = OR[302]
0x02F4 (0x0005E8) 0x8402- f:00102 d: 2 | P = P + 2 (0x02F6), A = 0
0x02F5 (0x0005EA) 0x7005- f:00070 d: 5 | P = P + 5 (0x02FA)
0x02F6 (0x0005EC) 0x20B0- f:00020 d: 176 | A = OR[176]
0x02F7 (0x0005EE) 0x1402- f:00012 d: 2 | A = A + 2 (0x0002)
0x02F8 (0x0005F0) 0x2819- f:00024 d: 25 | OR[25] = A
0x02F9 (0x0005F2) 0x7004- f:00070 d: 4 | P = P + 4 (0x02FD)
0x02FA (0x0005F4) 0x20B0- f:00020 d: 176 | A = OR[176]
0x02FB (0x0005F6) 0x1408- f:00012 d: 8 | A = A + 8 (0x0008)
0x02FC (0x0005F8) 0x2819- f:00024 d: 25 | OR[25] = A
0x02FD (0x0005FA) 0x211E- f:00020 d: 286 | A = OR[286]
0x02FE (0x0005FC) 0x281D- f:00024 d: 29 | OR[29] = A
0x02FF (0x0005FE) 0x7E00-0x1D75 f:00077 d: 0 | R = OR[0]+7541 (0x1D75)
0x0301 (0x000602) 0x2101- f:00020 d: 257 | A = OR[257]
0x0302 (0x000604) 0x140A- f:00012 d: 10 | A = A + 10 (0x000A)
0x0303 (0x000606) 0x2908- f:00024 d: 264 | OR[264] = A
0x0304 (0x000608) 0x3108- f:00030 d: 264 | A = (OR[264])
0x0305 (0x00060A) 0x271E- f:00023 d: 286 | A = A - OR[286]
0x0306 (0x00060C) 0x8402- f:00102 d: 2 | P = P + 2 (0x0308), A = 0
0x0307 (0x00060E) 0x7007- f:00070 d: 7 | P = P + 7 (0x030E)
0x0308 (0x000610) 0x2101- f:00020 d: 257 | A = OR[257]
0x0309 (0x000612) 0x1409- f:00012 d: 9 | A = A + 9 (0x0009)
0x030A (0x000614) 0x2908- f:00024 d: 264 | OR[264] = A
0x030B (0x000616) 0x3108- f:00030 d: 264 | A = (OR[264])
0x030C (0x000618) 0x291E- f:00024 d: 286 | OR[286] = A
0x030D (0x00061A) 0x7003- f:00070 d: 3 | P = P + 3 (0x0310)
0x030E (0x00061C) 0x1006- f:00010 d: 6 | A = 6 (0x0006)
0x030F (0x00061E) 0x2B1E- f:00025 d: 286 | OR[286] = A + OR[286]
0x0310 (0x000620) 0x2101- f:00020 d: 257 | A = OR[257]
0x0311 (0x000622) 0x140B- f:00012 d: 11 | A = A + 11 (0x000B)
0x0312 (0x000624) 0x2908- f:00024 d: 264 | OR[264] = A
0x0313 (0x000626) 0x211E- f:00020 d: 286 | A = OR[286]
0x0314 (0x000628) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x0315 (0x00062A) 0x0600- f:00003 d: 0 | I = 1
0x0316 (0x00062C) 0x2105- f:00020 d: 261 | A = OR[261]
0x0317 (0x00062E) 0x160C- f:00013 d: 12 | A = A - 12 (0x000C)
0x0318 (0x000630) 0xBE03-0x0428 f:00137 d: 3 | R = OR[3]+1064 (0x0428), A # 0
0x031A (0x000634) 0x7298- f:00071 d: 152 | P = P - 152 (0x0282)
0x031B (0x000636) 0x2103- f:00020 d: 259 | A = OR[259]
0x031C (0x000638) 0x1401- f:00012 d: 1 | A = A + 1 (0x0001)
0x031D (0x00063A) 0x290D- f:00024 d: 269 | OR[269] = A
0x031E (0x00063C) 0x310D- f:00030 d: 269 | A = (OR[269])
0x031F (0x00063E) 0x290E- f:00024 d: 270 | OR[270] = A
0x0320 (0x000640) 0x210E- f:00020 d: 270 | A = OR[270]
0x0321 (0x000642) 0x0808- f:00004 d: 8 | A = A > 8 (0x0008)
0x0322 (0x000644) 0x1601- f:00013 d: 1 | A = A - 1 (0x0001)
0x0323 (0x000646) 0x290F- f:00024 d: 271 | OR[271] = A
0x0324 (0x000648) 0x210F- f:00020 d: 271 | A = OR[271]
0x0325 (0x00064A) 0x12FF- f:00011 d: 255 | A = A & 255 (0x00FF)
0x0326 (0x00064C) 0x290F- f:00024 d: 271 | OR[271] = A
0x0327 (0x00064E) 0x210E- f:00020 d: 270 | A = OR[270]
0x0328 (0x000650) 0x0A09- f:00005 d: 9 | A = A < 9 (0x0009)
0x0329 (0x000652) 0x250F- f:00022 d: 271 | A = A + OR[271]
0x032A (0x000654) 0x0C09- f:00006 d: 9 | A = A >> 9 (0x0009)
0x032B (0x000656) 0x290E- f:00024 d: 270 | OR[270] = A
0x032C (0x000658) 0x390D- f:00034 d: 269 | (OR[269]) = A
0x032D (0x00065A) 0x210F- f:00020 d: 271 | A = OR[271]
0x032E (0x00065C) 0x7E03-0x0492 f:00077 d: 3 | R = OR[3]+1170 (0x0492)
0x0330 (0x000660) 0x211A- f:00020 d: 282 | A = OR[282]
0x0331 (0x000662) 0x8CB1- f:00106 d: 177 | P = P - 177 (0x0280), A = 0
0x0332 (0x000664) 0x211A- f:00020 d: 282 | A = OR[282]
0x0333 (0x000666) 0x140B- f:00012 d: 11 | A = A + 11 (0x000B)
0x0334 (0x000668) 0x2908- f:00024 d: 264 | OR[264] = A
0x0335 (0x00066A) 0x3108- f:00030 d: 264 | A = (OR[264])
0x0336 (0x00066C) 0x292A- f:00024 d: 298 | OR[298] = A
0x0337 (0x00066E) 0x2913- f:00024 d: 275 | OR[275] = A
0x0338 (0x000670) 0x2122- f:00020 d: 290 | A = OR[290]
0x0339 (0x000672) 0x8402- f:00102 d: 2 | P = P + 2 (0x033B), A = 0
0x033A (0x000674) 0x2F13- f:00027 d: 275 | OR[275] = OR[275] - 1
0x033B (0x000676) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x033C (0x000678) 0x2914- f:00024 d: 276 | OR[276] = A
0x033D (0x00067A) 0x1010- f:00010 d: 16 | A = 16 (0x0010)
0x033E (0x00067C) 0x1609- f:00013 d: 9 | A = A - 9 (0x0009)
0x033F (0x00067E) 0x5800- f:00054 d: 0 | B = A
0x0340 (0x000680) 0x2113- f:00020 d: 275 | A = OR[275]
0x0341 (0x000682) 0x4800- f:00044 d: 0 | A = A > B
0x0342 (0x000684) 0x290D- f:00024 d: 269 | OR[269] = A
0x0343 (0x000686) 0x1009- f:00010 d: 9 | A = 9 (0x0009)
0x0344 (0x000688) 0x5800- f:00054 d: 0 | B = A
0x0345 (0x00068A) 0x2113- f:00020 d: 275 | A = OR[275]
0x0346 (0x00068C) 0x4A00- f:00045 d: 0 | A = A < B
0x0347 (0x00068E) 0x2913- f:00024 d: 275 | OR[275] = A
0x0348 (0x000690) 0x2114- f:00020 d: 276 | A = OR[276]
0x0349 (0x000692) 0x4A00- f:00045 d: 0 | A = A < B
0x034A (0x000694) 0x250D- f:00022 d: 269 | A = A + OR[269]
0x034B (0x000696) 0x2914- f:00024 d: 276 | OR[276] = A
0x034C (0x000698) 0x211A- f:00020 d: 282 | A = OR[282]
0x034D (0x00069A) 0x141A- f:00012 d: 26 | A = A + 26 (0x001A)
0x034E (0x00069C) 0x2908- f:00024 d: 264 | OR[264] = A
0x034F (0x00069E) 0x2114- f:00020 d: 276 | A = OR[276]
0x0350 (0x0006A0) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x0351 (0x0006A2) 0x211A- f:00020 d: 282 | A = OR[282]
0x0352 (0x0006A4) 0x141B- f:00012 d: 27 | A = A + 27 (0x001B)
0x0353 (0x0006A6) 0x2908- f:00024 d: 264 | OR[264] = A
0x0354 (0x0006A8) 0x2113- f:00020 d: 275 | A = OR[275]
0x0355 (0x0006AA) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x0356 (0x0006AC) 0x211A- f:00020 d: 282 | A = OR[282]
0x0357 (0x0006AE) 0x140C- f:00012 d: 12 | A = A + 12 (0x000C)
0x0358 (0x0006B0) 0x2908- f:00024 d: 264 | OR[264] = A
0x0359 (0x0006B2) 0x3108- f:00030 d: 264 | A = (OR[264])
0x035A (0x0006B4) 0x292B- f:00024 d: 299 | OR[299] = A
0x035B (0x0006B6) 0x211A- f:00020 d: 282 | A = OR[282]
0x035C (0x0006B8) 0x140A- f:00012 d: 10 | A = A + 10 (0x000A)
0x035D (0x0006BA) 0x2908- f:00024 d: 264 | OR[264] = A
0x035E (0x0006BC) 0x3108- f:00030 d: 264 | A = (OR[264])
0x035F (0x0006BE) 0x2923- f:00024 d: 291 | OR[291] = A
0x0360 (0x0006C0) 0x211C- f:00020 d: 284 | A = OR[284]
0x0361 (0x0006C2) 0x1201- f:00011 d: 1 | A = A & 1 (0x0001)
0x0362 (0x0006C4) 0x2908- f:00024 d: 264 | OR[264] = A
0x0363 (0x0006C6) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x0364 (0x0006C8) 0x2708- f:00023 d: 264 | A = A - OR[264]
0x0365 (0x0006CA) 0x8402- f:00102 d: 2 | P = P + 2 (0x0367), A = 0
0x0366 (0x0006CC) 0x7074- f:00070 d: 116 | P = P + 116 (0x03DA)
0x0367 (0x0006CE) 0x211A- f:00020 d: 282 | A = OR[282]
0x0368 (0x0006D0) 0x141F- f:00012 d: 31 | A = A + 31 (0x001F)
0x0369 (0x0006D2) 0x2908- f:00024 d: 264 | OR[264] = A
0x036A (0x0006D4) 0x3108- f:00030 d: 264 | A = (OR[264])
0x036B (0x0006D6) 0x0808- f:00004 d: 8 | A = A > 8 (0x0008)
0x036C (0x0006D8) 0x292C- f:00024 d: 300 | OR[300] = A
0x036D (0x0006DA) 0x212F- f:00020 d: 303 | A = OR[303]
0x036E (0x0006DC) 0x2647- f:00023 d: 71 | A = A - OR[71]
0x036F (0x0006DE) 0x863D- f:00103 d: 61 | P = P + 61 (0x03AC), A # 0
0x0370 (0x0006E0) 0x212C- f:00020 d: 300 | A = OR[300]
0x0371 (0x0006E2) 0x8602- f:00103 d: 2 | P = P + 2 (0x0373), A # 0
0x0372 (0x0006E4) 0x703A- f:00070 d: 58 | P = P + 58 (0x03AC)
0x0373 (0x0006E6) 0x212B- f:00020 d: 299 | A = OR[299]
0x0374 (0x0006E8) 0x2723- f:00023 d: 291 | A = A - OR[291]
0x0375 (0x0006EA) 0x8003- f:00100 d: 3 | P = P + 3 (0x0378), C = 0
0x0376 (0x0006EC) 0x8402- f:00102 d: 2 | P = P + 2 (0x0378), A = 0
0x0377 (0x0006EE) 0x7002- f:00070 d: 2 | P = P + 2 (0x0379)
0x0378 (0x0006F0) 0x7034- f:00070 d: 52 | P = P + 52 (0x03AC)
0x0379 (0x0006F2) 0x2101- f:00020 d: 257 | A = OR[257]
0x037A (0x0006F4) 0x1408- f:00012 d: 8 | A = A + 8 (0x0008)
0x037B (0x0006F6) 0x290D- f:00024 d: 269 | OR[269] = A
0x037C (0x0006F8) 0x310D- f:00030 d: 269 | A = (OR[269])
0x037D (0x0006FA) 0x290E- f:00024 d: 270 | OR[270] = A
0x037E (0x0006FC) 0x210E- f:00020 d: 270 | A = OR[270]
0x037F (0x0006FE) 0x0808- f:00004 d: 8 | A = A > 8 (0x0008)
0x0380 (0x000700) 0x272C- f:00023 d: 300 | A = A - OR[300]
0x0381 (0x000702) 0x290F- f:00024 d: 271 | OR[271] = A
0x0382 (0x000704) 0x210F- f:00020 d: 271 | A = OR[271]
0x0383 (0x000706) 0x12FF- f:00011 d: 255 | A = A & 255 (0x00FF)
0x0384 (0x000708) 0x290F- f:00024 d: 271 | OR[271] = A
0x0385 (0x00070A) 0x210E- f:00020 d: 270 | A = OR[270]
0x0386 (0x00070C) 0x0A09- f:00005 d: 9 | A = A < 9 (0x0009)
0x0387 (0x00070E) 0x250F- f:00022 d: 271 | A = A + OR[271]
0x0388 (0x000710) 0x0C09- f:00006 d: 9 | A = A >> 9 (0x0009)
0x0389 (0x000712) 0x290E- f:00024 d: 270 | OR[270] = A
0x038A (0x000714) 0x390D- f:00034 d: 269 | (OR[269]) = A
0x038B (0x000716) 0x210F- f:00020 d: 271 | A = OR[271]
0x038C (0x000718) 0x2101- f:00020 d: 257 | A = OR[257]
0x038D (0x00071A) 0x140F- f:00012 d: 15 | A = A + 15 (0x000F)
0x038E (0x00071C) 0x2908- f:00024 d: 264 | OR[264] = A
0x038F (0x00071E) 0x3108- f:00030 d: 264 | A = (OR[264])
0x0390 (0x000720) 0x12FF- f:00011 d: 255 | A = A & 255 (0x00FF)
0x0391 (0x000722) 0x291F- f:00024 d: 287 | OR[287] = A
0x0392 (0x000724) 0x2101- f:00020 d: 257 | A = OR[257]
0x0393 (0x000726) 0x140E- f:00012 d: 14 | A = A + 14 (0x000E)
0x0394 (0x000728) 0x2908- f:00024 d: 264 | OR[264] = A
0x0395 (0x00072A) 0x3108- f:00030 d: 264 | A = (OR[264])
0x0396 (0x00072C) 0x12FF- f:00011 d: 255 | A = A & 255 (0x00FF)
0x0397 (0x00072E) 0x2921- f:00024 d: 289 | OR[289] = A
0x0398 (0x000730) 0x211F- f:00020 d: 287 | A = OR[287]
0x0399 (0x000732) 0x252C- f:00022 d: 300 | A = A + OR[300]
0x039A (0x000734) 0x291F- f:00024 d: 287 | OR[287] = A
0x039B (0x000736) 0x4200- f:00041 d: 0 | C = 1, io 0000 (IOR) = BZ
0x039C (0x000738) 0x2721- f:00023 d: 289 | A = A - OR[289]
0x039D (0x00073A) 0x8004- f:00100 d: 4 | P = P + 4 (0x03A1), C = 0
0x039E (0x00073C) 0x211F- f:00020 d: 287 | A = OR[287]
0x039F (0x00073E) 0x2721- f:00023 d: 289 | A = A - OR[289]
0x03A0 (0x000740) 0x291F- f:00024 d: 287 | OR[287] = A
0x03A1 (0x000742) 0x211F- f:00020 d: 287 | A = OR[287]
0x03A2 (0x000744) 0x12FF- f:00011 d: 255 | A = A & 255 (0x00FF)
0x03A3 (0x000746) 0x291F- f:00024 d: 287 | OR[287] = A
0x03A4 (0x000748) 0x2101- f:00020 d: 257 | A = OR[257]
0x03A5 (0x00074A) 0x140F- f:00012 d: 15 | A = A + 15 (0x000F)
0x03A6 (0x00074C) 0x2908- f:00024 d: 264 | OR[264] = A
0x03A7 (0x00074E) 0x3108- f:00030 d: 264 | A = (OR[264])
0x03A8 (0x000750) 0x1A00-0xFF00 f:00015 d: 0 | A = A & 65280 (0xFF00)
0x03AA (0x000754) 0x251F- f:00022 d: 287 | A = A + OR[287]
0x03AB (0x000756) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x03AC (0x000758) 0x2123- f:00020 d: 291 | A = OR[291]
0x03AD (0x00075A) 0x272A- f:00023 d: 298 | A = A - OR[298]
0x03AE (0x00075C) 0x8003- f:00100 d: 3 | P = P + 3 (0x03B1), C = 0
0x03AF (0x00075E) 0x8402- f:00102 d: 2 | P = P + 2 (0x03B1), A = 0
0x03B0 (0x000760) 0x7002- f:00070 d: 2 | P = P + 2 (0x03B2)
0x03B1 (0x000762) 0x7027- f:00070 d: 39 | P = P + 39 (0x03D8)
0x03B2 (0x000764) 0x2101- f:00020 d: 257 | A = OR[257]
0x03B3 (0x000766) 0x140A- f:00012 d: 10 | A = A + 10 (0x000A)
0x03B4 (0x000768) 0x2908- f:00024 d: 264 | OR[264] = A
0x03B5 (0x00076A) 0x3108- f:00030 d: 264 | A = (OR[264])
0x03B6 (0x00076C) 0x2917- f:00024 d: 279 | OR[279] = A
0x03B7 (0x00076E) 0x2123- f:00020 d: 291 | A = OR[291]
0x03B8 (0x000770) 0x272A- f:00023 d: 298 | A = A - OR[298]
0x03B9 (0x000772) 0x2916- f:00024 d: 278 | OR[278] = A
0x03BA (0x000774) 0x2116- f:00020 d: 278 | A = OR[278]
0x03BB (0x000776) 0x8418- f:00102 d: 24 | P = P + 24 (0x03D3), A = 0
0x03BC (0x000778) 0x211E- f:00020 d: 286 | A = OR[286]
0x03BD (0x00077A) 0x1402- f:00012 d: 2 | A = A + 2 (0x0002)
0x03BE (0x00077C) 0x2908- f:00024 d: 264 | OR[264] = A
0x03BF (0x00077E) 0x3108- f:00030 d: 264 | A = (OR[264])
0x03C0 (0x000780) 0x0E01- f:00007 d: 1 | A = A << 1 (0x0001)
0x03C1 (0x000782) 0x0A01- f:00005 d: 1 | A = A < 1 (0x0001)
0x03C2 (0x000784) 0x1400- f:00012 d: 0 | A = A + 0 (0x0000)
0x03C3 (0x000786) 0x0C02- f:00006 d: 2 | A = A >> 2 (0x0002)
0x03C4 (0x000788) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x03C5 (0x00078A) 0x211E- f:00020 d: 286 | A = OR[286]
0x03C6 (0x00078C) 0x2717- f:00023 d: 279 | A = A - OR[279]
0x03C7 (0x00078E) 0x8402- f:00102 d: 2 | P = P + 2 (0x03C9), A = 0
0x03C8 (0x000790) 0x7007- f:00070 d: 7 | P = P + 7 (0x03CF)
0x03C9 (0x000792) 0x2101- f:00020 d: 257 | A = OR[257]
0x03CA (0x000794) 0x1409- f:00012 d: 9 | A = A + 9 (0x0009)
0x03CB (0x000796) 0x2908- f:00024 d: 264 | OR[264] = A
0x03CC (0x000798) 0x3108- f:00030 d: 264 | A = (OR[264])
0x03CD (0x00079A) 0x291E- f:00024 d: 286 | OR[286] = A
0x03CE (0x00079C) 0x7003- f:00070 d: 3 | P = P + 3 (0x03D1)
0x03CF (0x00079E) 0x1006- f:00010 d: 6 | A = 6 (0x0006)
0x03D0 (0x0007A0) 0x2B1E- f:00025 d: 286 | OR[286] = A + OR[286]
0x03D1 (0x0007A2) 0x2F16- f:00027 d: 278 | OR[278] = OR[278] - 1
0x03D2 (0x0007A4) 0x7218- f:00071 d: 24 | P = P - 24 (0x03BA)
0x03D3 (0x0007A6) 0x2101- f:00020 d: 257 | A = OR[257]
0x03D4 (0x0007A8) 0x140B- f:00012 d: 11 | A = A + 11 (0x000B)
0x03D5 (0x0007AA) 0x2908- f:00024 d: 264 | OR[264] = A
0x03D6 (0x0007AC) 0x211E- f:00020 d: 286 | A = OR[286]
0x03D7 (0x0007AE) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x03D8 (0x0007B0) 0x7A03-0x0418 f:00075 d: 3 | P = OR[3]+1048 (0x0418)
0x03DA (0x0007B4) 0x2105- f:00020 d: 261 | A = OR[261]
0x03DB (0x0007B6) 0x160C- f:00013 d: 12 | A = A - 12 (0x000C)
0x03DC (0x0007B8) 0x8402- f:00102 d: 2 | P = P + 2 (0x03DE), A = 0
0x03DD (0x0007BA) 0x701A- f:00070 d: 26 | P = P + 26 (0x03F7)
0x03DE (0x0007BC) 0x7E03-0x0428 f:00077 d: 3 | R = OR[3]+1064 (0x0428)
0x03E0 (0x0007C0) 0x212A- f:00020 d: 298 | A = OR[298]
0x03E1 (0x0007C2) 0x1401- f:00012 d: 1 | A = A + 1 (0x0001)
0x03E2 (0x0007C4) 0x2923- f:00024 d: 291 | OR[291] = A
0x03E3 (0x0007C6) 0x211A- f:00020 d: 282 | A = OR[282]
0x03E4 (0x0007C8) 0x140C- f:00012 d: 12 | A = A + 12 (0x000C)
0x03E5 (0x0007CA) 0x2908- f:00024 d: 264 | OR[264] = A
0x03E6 (0x0007CC) 0x2123- f:00020 d: 291 | A = OR[291]
0x03E7 (0x0007CE) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x03E8 (0x0007D0) 0x212F- f:00020 d: 303 | A = OR[303]
0x03E9 (0x0007D2) 0x2647- f:00023 d: 71 | A = A - OR[71]
0x03EA (0x0007D4) 0x8602- f:00103 d: 2 | P = P + 2 (0x03EC), A # 0
0x03EB (0x0007D6) 0x7009- f:00070 d: 9 | P = P + 9 (0x03F4)
0x03EC (0x0007D8) 0x211A- f:00020 d: 282 | A = OR[282]
0x03ED (0x0007DA) 0x1411- f:00012 d: 17 | A = A + 17 (0x0011)
0x03EE (0x0007DC) 0x2908- f:00024 d: 264 | OR[264] = A
0x03EF (0x0007DE) 0x3108- f:00030 d: 264 | A = (OR[264])
0x03F0 (0x0007E0) 0x0807- f:00004 d: 7 | A = A > 7 (0x0007)
0x03F1 (0x0007E2) 0x1203- f:00011 d: 3 | A = A & 3 (0x0003)
0x03F2 (0x0007E4) 0xBE03-0x0521 f:00137 d: 3 | R = OR[3]+1313 (0x0521), A # 0
0x03F4 (0x0007E8) 0x734F- f:00071 d: 335 | P = P - 335 (0x02A5)
0x03F5 (0x0007EA) 0x7A03-0x0418 f:00075 d: 3 | P = OR[3]+1048 (0x0418)
0x03F7 (0x0007EE) 0x212F- f:00020 d: 303 | A = OR[303]
0x03F8 (0x0007F0) 0x2647- f:00023 d: 71 | A = A - OR[71]
0x03F9 (0x0007F2) 0x8403- f:00102 d: 3 | P = P + 3 (0x03FC), A = 0
0x03FA (0x0007F4) 0x7A03-0x0418 f:00075 d: 3 | P = OR[3]+1048 (0x0418)
0x03FC (0x0007F8) 0x211A- f:00020 d: 282 | A = OR[282]
0x03FD (0x0007FA) 0x141F- f:00012 d: 31 | A = A + 31 (0x001F)
0x03FE (0x0007FC) 0x2908- f:00024 d: 264 | OR[264] = A
0x03FF (0x0007FE) 0x3108- f:00030 d: 264 | A = (OR[264])
0x0400 (0x000800) 0x0808- f:00004 d: 8 | A = A > 8 (0x0008)
0x0401 (0x000802) 0x8602- f:00103 d: 2 | P = P + 2 (0x0403), A # 0
0x0402 (0x000804) 0x7010- f:00070 d: 16 | P = P + 16 (0x0412)
0x0403 (0x000806) 0x211A- f:00020 d: 282 | A = OR[282]
0x0404 (0x000808) 0x140C- f:00012 d: 12 | A = A + 12 (0x000C)
0x0405 (0x00080A) 0x2908- f:00024 d: 264 | OR[264] = A
0x0406 (0x00080C) 0x212A- f:00020 d: 298 | A = OR[298]
0x0407 (0x00080E) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x0408 (0x000810) 0x2101- f:00020 d: 257 | A = OR[257]
0x0409 (0x000812) 0x1402- f:00012 d: 2 | A = A + 2 (0x0002)
0x040A (0x000814) 0x2908- f:00024 d: 264 | OR[264] = A
0x040B (0x000816) 0x3108- f:00030 d: 264 | A = (OR[264])
0x040C (0x000818) 0x0E04- f:00007 d: 4 | A = A << 4 (0x0004)
0x040D (0x00081A) 0x0A01- f:00005 d: 1 | A = A < 1 (0x0001)
0x040E (0x00081C) 0x1401- f:00012 d: 1 | A = A + 1 (0x0001)
0x040F (0x00081E) 0x0C05- f:00006 d: 5 | A = A >> 5 (0x0005)
0x0410 (0x000820) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x0411 (0x000822) 0x7391- f:00071 d: 401 | P = P - 401 (0x0280)
0x0412 (0x000824) 0x7410- f:00072 d: 16 | R = P + 16 (0x0422)
0x0413 (0x000826) 0x212F- f:00020 d: 303 | A = OR[303]
0x0414 (0x000828) 0x2647- f:00023 d: 71 | A = A - OR[71]
0x0415 (0x00082A) 0x8602- f:00103 d: 2 | P = P + 2 (0x0417), A # 0
0x0416 (0x00082C) 0x700A- f:00070 d: 10 | P = P + 10 (0x0420)
0x0417 (0x00082E) 0x211A- f:00020 d: 282 | A = OR[282]
0x0418 (0x000830) 0x1411- f:00012 d: 17 | A = A + 17 (0x0011)
0x0419 (0x000832) 0x2908- f:00024 d: 264 | OR[264] = A
0x041A (0x000834) 0x3108- f:00030 d: 264 | A = (OR[264])
0x041B (0x000836) 0x0807- f:00004 d: 7 | A = A > 7 (0x0007)
0x041C (0x000838) 0x1203- f:00011 d: 3 | A = A & 3 (0x0003)
0x041D (0x00083A) 0x8403- f:00102 d: 3 | P = P + 3 (0x0420), A = 0
0x041E (0x00083C) 0x74FD- f:00072 d: 253 | R = P + 253 (0x051B)
0x041F (0x00083E) 0x7002- f:00070 d: 2 | P = P + 2 (0x0421)
0x0420 (0x000840) 0x7429- f:00072 d: 41 | R = P + 41 (0x0449)
0x0421 (0x000842) 0x739F- f:00071 d: 415 | P = P - 415 (0x0282)
0x0422 (0x000844) 0x1028- f:00010 d: 40 | A = 40 (0x0028)
0x0423 (0x000846) 0x2930- f:00024 d: 304 | OR[304] = A
0x0424 (0x000848) 0x1800-0x0056 f:00014 d: 0 | A = 86 (0x0056)
0x0426 (0x00084C) 0x2931- f:00024 d: 305 | OR[305] = A
0x0427 (0x00084E) 0x211A- f:00020 d: 282 | A = OR[282]
0x0428 (0x000850) 0x2932- f:00024 d: 306 | OR[306] = A
0x0429 (0x000852) 0x2124- f:00020 d: 292 | A = OR[292]
0x042A (0x000854) 0x2933- f:00024 d: 307 | OR[307] = A
0x042B (0x000856) 0x2125- f:00020 d: 293 | A = OR[293]
0x042C (0x000858) 0x2934- f:00024 d: 308 | OR[308] = A
0x042D (0x00085A) 0x2126- f:00020 d: 294 | A = OR[294]
0x042E (0x00085C) 0x2935- f:00024 d: 309 | OR[309] = A
0x042F (0x00085E) 0x1130- f:00010 d: 304 | A = 304 (0x0130)
0x0430 (0x000860) 0x5800- f:00054 d: 0 | B = A
0x0431 (0x000862) 0x1800-0x3118 f:00014 d: 0 | A = 12568 (0x3118)
0x0433 (0x000866) 0x7C09- f:00076 d: 9 | R = OR[9]
0x0434 (0x000868) 0x1019- f:00010 d: 25 | A = 25 (0x0019)
0x0435 (0x00086A) 0x2930- f:00024 d: 304 | OR[304] = A
0x0436 (0x00086C) 0x2102- f:00020 d: 258 | A = OR[258]
0x0437 (0x00086E) 0x2931- f:00024 d: 305 | OR[305] = A
0x0438 (0x000870) 0x1130- f:00010 d: 304 | A = 304 (0x0130)
0x0439 (0x000872) 0x5800- f:00054 d: 0 | B = A
0x043A (0x000874) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x043B (0x000876) 0x7C09- f:00076 d: 9 | R = OR[9]
0x043C (0x000878) 0x0200- f:00001 d: 0 | EXIT
0x043D (0x00087A) 0x2100- f:00020 d: 256 | A = OR[256]
0x043E (0x00087C) 0x5800- f:00054 d: 0 | B = A
0x043F (0x00087E) 0xE000- f:00160 d: 0 | IOB , fn000
0x0440 (0x000880) 0x1002- f:00010 d: 2 | A = 2 (0x0002)
0x0441 (0x000882) 0x2B17- f:00025 d: 279 | OR[279] = A + OR[279]
0x0442 (0x000884) 0x1800-0xC000 f:00014 d: 0 | A = 49152 (0xC000)
0x0444 (0x000888) 0xE200- f:00161 d: 0 | IOB , fn001
0x0445 (0x00088A) 0x1002- f:00010 d: 2 | A = 2 (0x0002)
0x0446 (0x00088C) 0x2920- f:00024 d: 288 | OR[288] = A
0x0447 (0x00088E) 0x7470- f:00072 d: 112 | R = P + 112 (0x04B7)
0x0448 (0x000890) 0x0200- f:00001 d: 0 | EXIT
0x0449 (0x000892) 0x0400- f:00002 d: 0 | I = 0
0x044A (0x000894) 0x0000- f:00000 d: 0 | PASS
0x044B (0x000896) 0x2101- f:00020 d: 257 | A = OR[257]
0x044C (0x000898) 0x140C- f:00012 d: 12 | A = A + 12 (0x000C)
0x044D (0x00089A) 0x2819- f:00024 d: 25 | OR[25] = A
0x044E (0x00089C) 0x7E00-0x1D57 f:00077 d: 0 | R = OR[0]+7511 (0x1D57)
0x0450 (0x0008A0) 0x211A- f:00020 d: 282 | A = OR[282]
0x0451 (0x0008A2) 0x2896- f:00024 d: 150 | OR[150] = A
0x0452 (0x0008A4) 0x211A- f:00020 d: 282 | A = OR[282]
0x0453 (0x0008A6) 0x1401- f:00012 d: 1 | A = A + 1 (0x0001)
0x0454 (0x0008A8) 0x2908- f:00024 d: 264 | OR[264] = A
0x0455 (0x0008AA) 0x3108- f:00030 d: 264 | A = (OR[264])
0x0456 (0x0008AC) 0x2913- f:00024 d: 275 | OR[275] = A
0x0457 (0x0008AE) 0x211A- f:00020 d: 282 | A = OR[282]
0x0458 (0x0008B0) 0x1401- f:00012 d: 1 | A = A + 1 (0x0001)
0x0459 (0x0008B2) 0x2908- f:00024 d: 264 | OR[264] = A
0x045A (0x0008B4) 0x1005- f:00010 d: 5 | A = 5 (0x0005)
0x045B (0x0008B6) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x045C (0x0008B8) 0x211C- f:00020 d: 284 | A = OR[284]
0x045D (0x0008BA) 0x1210- f:00011 d: 16 | A = A & 16 (0x0010)
0x045E (0x0008BC) 0x8602- f:00103 d: 2 | P = P + 2 (0x0460), A # 0
0x045F (0x0008BE) 0x700A- f:00070 d: 10 | P = P + 10 (0x0469)
0x0460 (0x0008C0) 0x20AF- f:00020 d: 175 | A = OR[175]
0x0461 (0x0008C2) 0x1404- f:00012 d: 4 | A = A + 4 (0x0004)
0x0462 (0x0008C4) 0x2819- f:00024 d: 25 | OR[25] = A
0x0463 (0x0008C6) 0x211A- f:00020 d: 282 | A = OR[282]
0x0464 (0x0008C8) 0x281D- f:00024 d: 29 | OR[29] = A
0x0465 (0x0008CA) 0x7E00-0x1D75 f:00077 d: 0 | R = OR[0]+7541 (0x1D75)
0x0467 (0x0008CE) 0x0200- f:00001 d: 0 | EXIT
0x0468 (0x0008D0) 0x701B- f:00070 d: 27 | P = P + 27 (0x0483)
0x0469 (0x0008D2) 0x211C- f:00020 d: 284 | A = OR[284]
0x046A (0x0008D4) 0x1606- f:00013 d: 6 | A = A - 6 (0x0006)
0x046B (0x0008D6) 0x8402- f:00102 d: 2 | P = P + 2 (0x046D), A = 0
0x046C (0x0008D8) 0x700A- f:00070 d: 10 | P = P + 10 (0x0476)
0x046D (0x0008DA) 0x2113- f:00020 d: 275 | A = OR[275]
0x046E (0x0008DC) 0x1605- f:00013 d: 5 | A = A - 5 (0x0005)
0x046F (0x0008DE) 0x8402- f:00102 d: 2 | P = P + 2 (0x0471), A = 0
0x0470 (0x0008E0) 0x7003- f:00070 d: 3 | P = P + 3 (0x0473)
0x0471 (0x0008E2) 0x7E00-0x19E9 f:00077 d: 0 | R = OR[0]+6633 (0x19E9)
0x0473 (0x0008E6) 0x7E00-0x19DD f:00077 d: 0 | R = OR[0]+6621 (0x19DD)
0x0475 (0x0008EA) 0x700E- f:00070 d: 14 | P = P + 14 (0x0483)
0x0476 (0x0008EC) 0x211C- f:00020 d: 284 | A = OR[284]
0x0477 (0x0008EE) 0x160C- f:00013 d: 12 | A = A - 12 (0x000C)
0x0478 (0x0008F0) 0x8402- f:00102 d: 2 | P = P + 2 (0x047A), A = 0
0x0479 (0x0008F2) 0x7008- f:00070 d: 8 | P = P + 8 (0x0481)
0x047A (0x0008F4) 0x2113- f:00020 d: 275 | A = OR[275]
0x047B (0x0008F6) 0x1605- f:00013 d: 5 | A = A - 5 (0x0005)
0x047C (0x0008F8) 0x8602- f:00103 d: 2 | P = P + 2 (0x047E), A # 0
0x047D (0x0008FA) 0x7003- f:00070 d: 3 | P = P + 3 (0x0480)
0x047E (0x0008FC) 0x7E00-0x19DD f:00077 d: 0 | R = OR[0]+6621 (0x19DD)
0x0480 (0x000900) 0x7003- f:00070 d: 3 | P = P + 3 (0x0483)
0x0481 (0x000902) 0x7E00-0x19DD f:00077 d: 0 | R = OR[0]+6621 (0x19DD)
0x0483 (0x000906) 0x1017- f:00010 d: 23 | A = 23 (0x0017)
0x0484 (0x000908) 0x2930- f:00024 d: 304 | OR[304] = A
0x0485 (0x00090A) 0x211A- f:00020 d: 282 | A = OR[282]
0x0486 (0x00090C) 0x2931- f:00024 d: 305 | OR[305] = A
0x0487 (0x00090E) 0x1130- f:00010 d: 304 | A = 304 (0x0130)
0x0488 (0x000910) 0x5800- f:00054 d: 0 | B = A
0x0489 (0x000912) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x048A (0x000914) 0x7C09- f:00076 d: 9 | R = OR[9]
0x048B (0x000916) 0x0200- f:00001 d: 0 | EXIT
0x048C (0x000918) 0x2100- f:00020 d: 256 | A = OR[256]
0x048D (0x00091A) 0x5800- f:00054 d: 0 | B = A
0x048E (0x00091C) 0xE000- f:00160 d: 0 | IOB , fn000
0x048F (0x00091E) 0x1002- f:00010 d: 2 | A = 2 (0x0002)
0x0490 (0x000920) 0x2B17- f:00025 d: 279 | OR[279] = A + OR[279]
0x0491 (0x000922) 0x1800-0xB000 f:00014 d: 0 | A = 45056 (0xB000)
0x0493 (0x000926) 0xE200- f:00161 d: 0 | IOB , fn001
0x0494 (0x000928) 0x2101- f:00020 d: 257 | A = OR[257]
0x0495 (0x00092A) 0x1403- f:00012 d: 3 | A = A + 3 (0x0003)
0x0496 (0x00092C) 0x2908- f:00024 d: 264 | OR[264] = A
0x0497 (0x00092E) 0x1800-0xFFFF f:00014 d: 0 | A = 65535 (0xFFFF)
0x0499 (0x000932) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x049A (0x000934) 0x2101- f:00020 d: 257 | A = OR[257]
0x049B (0x000936) 0x1404- f:00012 d: 4 | A = A + 4 (0x0004)
0x049C (0x000938) 0x2908- f:00024 d: 264 | OR[264] = A
0x049D (0x00093A) 0x3108- f:00030 d: 264 | A = (OR[264])
0x049E (0x00093C) 0x0E03- f:00007 d: 3 | A = A << 3 (0x0003)
0x049F (0x00093E) 0x0A05- f:00005 d: 5 | A = A < 5 (0x0005)
0x04A0 (0x000940) 0x141F- f:00012 d: 31 | A = A + 31 (0x001F)
0x04A1 (0x000942) 0x0C08- f:00006 d: 8 | A = A >> 8 (0x0008)
0x04A2 (0x000944) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x04A3 (0x000946) 0x2101- f:00020 d: 257 | A = OR[257]
0x04A4 (0x000948) 0x1402- f:00012 d: 2 | A = A + 2 (0x0002)
0x04A5 (0x00094A) 0x2908- f:00024 d: 264 | OR[264] = A
0x04A6 (0x00094C) 0x3108- f:00030 d: 264 | A = (OR[264])
0x04A7 (0x00094E) 0x1A00-0xFDFF f:00015 d: 0 | A = A & 65023 (0xFDFF)
0x04A9 (0x000952) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x04AA (0x000954) 0x1014- f:00010 d: 20 | A = 20 (0x0014)
0x04AB (0x000956) 0x2920- f:00024 d: 288 | OR[288] = A
0x04AC (0x000958) 0x740B- f:00072 d: 11 | R = P + 11 (0x04B7)
0x04AD (0x00095A) 0x0200- f:00001 d: 0 | EXIT
0x04AE (0x00095C) 0x1800-0x1000 f:00014 d: 0 | A = 4096 (0x1000)
0x04B0 (0x000960) 0x4400- f:00042 d: 0 | C = 1, IOB = DN
0x04B1 (0x000962) 0x8205- f:00101 d: 5 | P = P + 5 (0x04B6), C = 1
0x04B2 (0x000964) 0x1601- f:00013 d: 1 | A = A - 1 (0x0001)
0x04B3 (0x000966) 0x8602- f:00103 d: 2 | P = P + 2 (0x04B5), A # 0
0x04B4 (0x000968) 0x0200- f:00001 d: 0 | EXIT
0x04B5 (0x00096A) 0x7205- f:00071 d: 5 | P = P - 5 (0x04B0)
0x04B6 (0x00096C) 0x0200- f:00001 d: 0 | EXIT
0x04B7 (0x00096E) 0x0400- f:00002 d: 0 | I = 0
0x04B8 (0x000970) 0x0000- f:00000 d: 0 | PASS
0x04B9 (0x000972) 0x2101- f:00020 d: 257 | A = OR[257]
0x04BA (0x000974) 0x1424- f:00012 d: 36 | A = A + 36 (0x0024)
0x04BB (0x000976) 0x281D- f:00024 d: 29 | OR[29] = A
0x04BC (0x000978) 0x2120- f:00020 d: 288 | A = OR[288]
0x04BD (0x00097A) 0x281C- f:00024 d: 28 | OR[28] = A
0x04BE (0x00097C) 0x7E00-0x1E02 f:00077 d: 0 | R = OR[0]+7682 (0x1E02)
0x04C0 (0x000980) 0xEE00- f:00167 d: 0 | IOB , fn007
0x04C1 (0x000982) 0x3101- f:00030 d: 257 | A = (OR[257])
0x04C2 (0x000984) 0x0E08- f:00007 d: 8 | A = A << 8 (0x0008)
0x04C3 (0x000986) 0x0A01- f:00005 d: 1 | A = A < 1 (0x0001)
0x04C4 (0x000988) 0x1401- f:00012 d: 1 | A = A + 1 (0x0001)
0x04C5 (0x00098A) 0x0C09- f:00006 d: 9 | A = A >> 9 (0x0009)
0x04C6 (0x00098C) 0x3901- f:00034 d: 257 | (OR[257]) = A
0x04C7 (0x00098E) 0x2101- f:00020 d: 257 | A = OR[257]
0x04C8 (0x000990) 0x1418- f:00012 d: 24 | A = A + 24 (0x0018)
0x04C9 (0x000992) 0x2913- f:00024 d: 275 | OR[275] = A
0x04CA (0x000994) 0x1001- f:00010 d: 1 | A = 1 (0x0001)
0x04CB (0x000996) 0x2930- f:00024 d: 304 | OR[304] = A
0x04CC (0x000998) 0x2113- f:00020 d: 275 | A = OR[275]
0x04CD (0x00099A) 0x2931- f:00024 d: 305 | OR[305] = A
0x04CE (0x00099C) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x04CF (0x00099E) 0x2932- f:00024 d: 306 | OR[306] = A
0x04D0 (0x0009A0) 0x1130- f:00010 d: 304 | A = 304 (0x0130)
0x04D1 (0x0009A2) 0x5800- f:00054 d: 0 | B = A
0x04D2 (0x0009A4) 0x1800-0x3118 f:00014 d: 0 | A = 12568 (0x3118)
0x04D4 (0x0009A8) 0x7C09- f:00076 d: 9 | R = OR[9]
0x04D5 (0x0009AA) 0x2006- f:00020 d: 6 | A = OR[6]
0x04D6 (0x0009AC) 0x140B- f:00012 d: 11 | A = A + 11 (0x000B)
0x04D7 (0x0009AE) 0x2908- f:00024 d: 264 | OR[264] = A
0x04D8 (0x0009B0) 0x3108- f:00030 d: 264 | A = (OR[264])
0x04D9 (0x0009B2) 0x3101- f:00030 d: 257 | A = (OR[257])
0x04DA (0x0009B4) 0x1A00-0xFEFF f:00015 d: 0 | A = A & 65279 (0xFEFF)
0x04DC (0x0009B8) 0x3901- f:00034 d: 257 | (OR[257]) = A
0x04DD (0x0009BA) 0x2100- f:00020 d: 256 | A = OR[256]
0x04DE (0x0009BC) 0x5800- f:00054 d: 0 | B = A
0x04DF (0x0009BE) 0x2006- f:00020 d: 6 | A = OR[6]
0x04E0 (0x0009C0) 0x140C- f:00012 d: 12 | A = A + 12 (0x000C)
0x04E1 (0x0009C2) 0x2908- f:00024 d: 264 | OR[264] = A
0x04E2 (0x0009C4) 0x3108- f:00030 d: 264 | A = (OR[264])
0x04E3 (0x0009C6) 0x0200- f:00001 d: 0 | EXIT
0x04E4 (0x0009C8) 0x211D- f:00020 d: 285 | A = OR[285]
0x04E5 (0x0009CA) 0x1640- f:00013 d: 64 | A = A - 64 (0x0040)
0x04E6 (0x0009CC) 0x8405- f:00102 d: 5 | P = P + 5 (0x04EB), A = 0
0x04E7 (0x0009CE) 0x211D- f:00020 d: 285 | A = OR[285]
0x04E8 (0x0009D0) 0x1620- f:00013 d: 32 | A = A - 32 (0x0020)
0x04E9 (0x0009D2) 0x8402- f:00102 d: 2 | P = P + 2 (0x04EB), A = 0
0x04EA (0x0009D4) 0x7010- f:00070 d: 16 | P = P + 16 (0x04FA)
0x04EB (0x0009D6) 0x2107- f:00020 d: 263 | A = OR[263]
0x04EC (0x0009D8) 0x1608- f:00013 d: 8 | A = A - 8 (0x0008)
0x04ED (0x0009DA) 0x8602- f:00103 d: 2 | P = P + 2 (0x04EF), A # 0
0x04EE (0x0009DC) 0x700C- f:00070 d: 12 | P = P + 12 (0x04FA)
0x04EF (0x0009DE) 0x2101- f:00020 d: 257 | A = OR[257]
0x04F0 (0x0009E0) 0x1428- f:00012 d: 40 | A = A + 40 (0x0028)
0x04F1 (0x0009E2) 0x2908- f:00024 d: 264 | OR[264] = A
0x04F2 (0x0009E4) 0x3108- f:00030 d: 264 | A = (OR[264])
0x04F3 (0x0009E6) 0x2927- f:00024 d: 295 | OR[295] = A
0x04F4 (0x0009E8) 0x2101- f:00020 d: 257 | A = OR[257]
0x04F5 (0x0009EA) 0x142A- f:00012 d: 42 | A = A + 42 (0x002A)
0x04F6 (0x0009EC) 0x2908- f:00024 d: 264 | OR[264] = A
0x04F7 (0x0009EE) 0x3108- f:00030 d: 264 | A = (OR[264])
0x04F8 (0x0009F0) 0x2928- f:00024 d: 296 | OR[296] = A
0x04F9 (0x0009F2) 0x0200- f:00001 d: 0 | EXIT
0x04FA (0x0009F4) 0x2100- f:00020 d: 256 | A = OR[256]
0x04FB (0x0009F6) 0x5800- f:00054 d: 0 | B = A
0x04FC (0x0009F8) 0x0400- f:00002 d: 0 | I = 0
0x04FD (0x0009FA) 0x0000- f:00000 d: 0 | PASS
0x04FE (0x0009FC) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x04FF (0x0009FE) 0xFE00- f:00177 d: 0 | IOB , fn017
0x0500 (0x000A00) 0x7652- f:00073 d: 82 | R = P - 82 (0x04AE)
0x0501 (0x000A02) 0x8602- f:00103 d: 2 | P = P + 2 (0x0503), A # 0
0x0502 (0x000A04) 0x7003- f:00070 d: 3 | P = P + 3 (0x0505)
0x0503 (0x000A06) 0xF400- f:00172 d: 0 | IOB , fn012
0x0504 (0x000A08) 0x7003- f:00070 d: 3 | P = P + 3 (0x0507)
0x0505 (0x000A0A) 0x1800-0xFFFF f:00014 d: 0 | A = 65535 (0xFFFF)
0x0507 (0x000A0E) 0x2927- f:00024 d: 295 | OR[295] = A
0x0508 (0x000A10) 0x1002- f:00010 d: 2 | A = 2 (0x0002)
0x0509 (0x000A12) 0x2B17- f:00025 d: 279 | OR[279] = A + OR[279]
0x050A (0x000A14) 0xE000- f:00160 d: 0 | IOB , fn000
0x050B (0x000A16) 0x1002- f:00010 d: 2 | A = 2 (0x0002)
0x050C (0x000A18) 0x2B17- f:00025 d: 279 | OR[279] = A + OR[279]
0x050D (0x000A1A) 0x1800-0x8000 f:00014 d: 0 | A = 32768 (0x8000)
0x050F (0x000A1E) 0xE200- f:00161 d: 0 | IOB , fn001
0x0510 (0x000A20) 0x1002- f:00010 d: 2 | A = 2 (0x0002)
0x0511 (0x000A22) 0x2920- f:00024 d: 288 | OR[288] = A
0x0512 (0x000A24) 0x765B- f:00073 d: 91 | R = P - 91 (0x04B7)
0x0513 (0x000A26) 0x8402- f:00102 d: 2 | P = P + 2 (0x0515), A = 0
0x0514 (0x000A28) 0x7003- f:00070 d: 3 | P = P + 3 (0x0517)
0x0515 (0x000A2A) 0xF600- f:00173 d: 0 | IOB , fn013
0x0516 (0x000A2C) 0x7003- f:00070 d: 3 | P = P + 3 (0x0519)
0x0517 (0x000A2E) 0x1800-0xFFFF f:00014 d: 0 | A = 65535 (0xFFFF)
0x0519 (0x000A32) 0x2928- f:00024 d: 296 | OR[296] = A
0x051A (0x000A34) 0x0200- f:00001 d: 0 | EXIT
0x051B (0x000A36) 0x211C- f:00020 d: 284 | A = OR[284]
0x051C (0x000A38) 0x1210- f:00011 d: 16 | A = A & 16 (0x0010)
0x051D (0x000A3A) 0x2908- f:00024 d: 264 | OR[264] = A
0x051E (0x000A3C) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x051F (0x000A3E) 0x2708- f:00023 d: 264 | A = A - OR[264]
0x0520 (0x000A40) 0x8402- f:00102 d: 2 | P = P + 2 (0x0522), A = 0
0x0521 (0x000A42) 0x0200- f:00001 d: 0 | EXIT
0x0522 (0x000A44) 0x1800-0x0C98 f:00014 d: 0 | A = 3224 (0x0C98)
0x0524 (0x000A48) 0x291B- f:00024 d: 283 | OR[283] = A
0x0525 (0x000A4A) 0x211B- f:00020 d: 283 | A = OR[283]
0x0526 (0x000A4C) 0x290E- f:00024 d: 270 | OR[270] = A
0x0527 (0x000A4E) 0x1008- f:00010 d: 8 | A = 8 (0x0008)
0x0528 (0x000A50) 0x290D- f:00024 d: 269 | OR[269] = A
0x0529 (0x000A52) 0x210D- f:00020 d: 269 | A = OR[269]
0x052A (0x000A54) 0x8406- f:00102 d: 6 | P = P + 6 (0x0530), A = 0
0x052B (0x000A56) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x052C (0x000A58) 0x390E- f:00034 d: 270 | (OR[270]) = A
0x052D (0x000A5A) 0x2F0D- f:00027 d: 269 | OR[269] = OR[269] - 1
0x052E (0x000A5C) 0x2D0E- f:00026 d: 270 | OR[270] = OR[270] + 1
0x052F (0x000A5E) 0x7206- f:00071 d: 6 | P = P - 6 (0x0529)
0x0530 (0x000A60) 0x211A- f:00020 d: 282 | A = OR[282]
0x0531 (0x000A62) 0x1408- f:00012 d: 8 | A = A + 8 (0x0008)
0x0532 (0x000A64) 0x290D- f:00024 d: 269 | OR[269] = A
0x0533 (0x000A66) 0x211B- f:00020 d: 283 | A = OR[283]
0x0534 (0x000A68) 0x1408- f:00012 d: 8 | A = A + 8 (0x0008)
0x0535 (0x000A6A) 0x290E- f:00024 d: 270 | OR[270] = A
0x0536 (0x000A6C) 0x1018- f:00010 d: 24 | A = 24 (0x0018)
0x0537 (0x000A6E) 0x290F- f:00024 d: 271 | OR[271] = A
0x0538 (0x000A70) 0x7006- f:00070 d: 6 | P = P + 6 (0x053E)
0x0539 (0x000A72) 0x310D- f:00030 d: 269 | A = (OR[269])
0x053A (0x000A74) 0x390E- f:00034 d: 270 | (OR[270]) = A
0x053B (0x000A76) 0x2D0D- f:00026 d: 269 | OR[269] = OR[269] + 1
0x053C (0x000A78) 0x2D0E- f:00026 d: 270 | OR[270] = OR[270] + 1
0x053D (0x000A7A) 0x2F0F- f:00027 d: 271 | OR[271] = OR[271] - 1
0x053E (0x000A7C) 0x210F- f:00020 d: 271 | A = OR[271]
0x053F (0x000A7E) 0x8E06- f:00107 d: 6 | P = P - 6 (0x0539), A # 0
0x0540 (0x000A80) 0x211B- f:00020 d: 283 | A = OR[283]
0x0541 (0x000A82) 0x1409- f:00012 d: 9 | A = A + 9 (0x0009)
0x0542 (0x000A84) 0x2908- f:00024 d: 264 | OR[264] = A
0x0543 (0x000A86) 0x211A- f:00020 d: 282 | A = OR[282]
0x0544 (0x000A88) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x0545 (0x000A8A) 0x211B- f:00020 d: 283 | A = OR[283]
0x0546 (0x000A8C) 0x140B- f:00012 d: 11 | A = A + 11 (0x000B)
0x0547 (0x000A8E) 0x2908- f:00024 d: 264 | OR[264] = A
0x0548 (0x000A90) 0x2123- f:00020 d: 291 | A = OR[291]
0x0549 (0x000A92) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x054A (0x000A94) 0x2101- f:00020 d: 257 | A = OR[257]
0x054B (0x000A96) 0x141A- f:00012 d: 26 | A = A + 26 (0x001A)
0x054C (0x000A98) 0x2908- f:00024 d: 264 | OR[264] = A
0x054D (0x000A9A) 0x3108- f:00030 d: 264 | A = (OR[264])
0x054E (0x000A9C) 0x2913- f:00024 d: 275 | OR[275] = A
0x054F (0x000A9E) 0x2101- f:00020 d: 257 | A = OR[257]
0x0550 (0x000AA0) 0x141B- f:00012 d: 27 | A = A + 27 (0x001B)
0x0551 (0x000AA2) 0x2908- f:00024 d: 264 | OR[264] = A
0x0552 (0x000AA4) 0x3108- f:00030 d: 264 | A = (OR[264])
0x0553 (0x000AA6) 0x2914- f:00024 d: 276 | OR[276] = A
0x0554 (0x000AA8) 0x211B- f:00020 d: 283 | A = OR[283]
0x0555 (0x000AAA) 0x141C- f:00012 d: 28 | A = A + 28 (0x001C)
0x0556 (0x000AAC) 0x2908- f:00024 d: 264 | OR[264] = A
0x0557 (0x000AAE) 0x2113- f:00020 d: 275 | A = OR[275]
0x0558 (0x000AB0) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x0559 (0x000AB2) 0x211B- f:00020 d: 283 | A = OR[283]
0x055A (0x000AB4) 0x141D- f:00012 d: 29 | A = A + 29 (0x001D)
0x055B (0x000AB6) 0x2908- f:00024 d: 264 | OR[264] = A
0x055C (0x000AB8) 0x2114- f:00020 d: 276 | A = OR[276]
0x055D (0x000ABA) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x055E (0x000ABC) 0x211B- f:00020 d: 283 | A = OR[283]
0x055F (0x000ABE) 0x1401- f:00012 d: 1 | A = A + 1 (0x0001)
0x0560 (0x000AC0) 0x2908- f:00024 d: 264 | OR[264] = A
0x0561 (0x000AC2) 0x1006- f:00010 d: 6 | A = 6 (0x0006)
0x0562 (0x000AC4) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x0563 (0x000AC6) 0x211B- f:00020 d: 283 | A = OR[283]
0x0564 (0x000AC8) 0x1408- f:00012 d: 8 | A = A + 8 (0x0008)
0x0565 (0x000ACA) 0x2908- f:00024 d: 264 | OR[264] = A
0x0566 (0x000ACC) 0x1057- f:00010 d: 87 | A = 87 (0x0057)
0x0567 (0x000ACE) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x0568 (0x000AD0) 0x0400- f:00002 d: 0 | I = 0
0x0569 (0x000AD2) 0x0000- f:00000 d: 0 | PASS
0x056A (0x000AD4) 0x211B- f:00020 d: 283 | A = OR[283]
0x056B (0x000AD6) 0x2896- f:00024 d: 150 | OR[150] = A
0x056C (0x000AD8) 0x7E00-0x19E9 f:00077 d: 0 | R = OR[0]+6633 (0x19E9)
0x056E (0x000ADC) 0x7E00-0x19C5 f:00077 d: 0 | R = OR[0]+6597 (0x19C5)
0x0570 (0x000AE0) 0x212F- f:00020 d: 303 | A = OR[303]
0x0571 (0x000AE2) 0x281E- f:00024 d: 30 | OR[30] = A
0x0572 (0x000AE4) 0x7E00-0x0685 f:00077 d: 0 | R = OR[0]+1669 (0x0685)
0x0574 (0x000AE8) 0x0600- f:00003 d: 0 | I = 1
0x0575 (0x000AEA) 0x0200- f:00001 d: 0 | EXIT
0x0576 (0x000AEC) 0x1018- f:00010 d: 24 | A = 24 (0x0018)
0x0577 (0x000AEE) 0x2930- f:00024 d: 304 | OR[304] = A
0x0578 (0x000AF0) 0x1010- f:00010 d: 16 | A = 16 (0x0010)
0x0579 (0x000AF2) 0x2931- f:00024 d: 305 | OR[305] = A
0x057A (0x000AF4) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x057B (0x000AF6) 0x2932- f:00024 d: 306 | OR[306] = A
0x057C (0x000AF8) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x057D (0x000AFA) 0x2933- f:00024 d: 307 | OR[307] = A
0x057E (0x000AFC) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x057F (0x000AFE) 0x2934- f:00024 d: 308 | OR[308] = A
0x0580 (0x000B00) 0x112A- f:00010 d: 298 | A = 298 (0x012A)
0x0581 (0x000B02) 0x2935- f:00024 d: 309 | OR[309] = A
0x0582 (0x000B04) 0x1130- f:00010 d: 304 | A = 304 (0x0130)
0x0583 (0x000B06) 0x5800- f:00054 d: 0 | B = A
0x0584 (0x000B08) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x0585 (0x000B0A) 0x7C09- f:00076 d: 9 | R = OR[9]
0x0586 (0x000B0C) 0x8602- f:00103 d: 2 | P = P + 2 (0x0588), A # 0
0x0587 (0x000B0E) 0x700B- f:00070 d: 11 | P = P + 11 (0x0592)
0x0588 (0x000B10) 0x1007- f:00010 d: 7 | A = 7 (0x0007)
0x0589 (0x000B12) 0x2930- f:00024 d: 304 | OR[304] = A
0x058A (0x000B14) 0x1001- f:00010 d: 1 | A = 1 (0x0001)
0x058B (0x000B16) 0x2931- f:00024 d: 305 | OR[305] = A
0x058C (0x000B18) 0x1130- f:00010 d: 304 | A = 304 (0x0130)
0x058D (0x000B1A) 0x5800- f:00054 d: 0 | B = A
0x058E (0x000B1C) 0x1800-0x3118 f:00014 d: 0 | A = 12568 (0x3118)
0x0590 (0x000B20) 0x7C09- f:00076 d: 9 | R = OR[9]
0x0591 (0x000B22) 0x721B- f:00071 d: 27 | P = P - 27 (0x0576)
0x0592 (0x000B24) 0x2100- f:00020 d: 256 | A = OR[256]
0x0593 (0x000B26) 0x5800- f:00054 d: 0 | B = A
0x0594 (0x000B28) 0x1014- f:00010 d: 20 | A = 20 (0x0014)
0x0595 (0x000B2A) 0x2920- f:00024 d: 288 | OR[288] = A
0x0596 (0x000B2C) 0x2125- f:00020 d: 293 | A = OR[293]
0x0597 (0x000B2E) 0x0A08- f:00005 d: 8 | A = A < 8 (0x0008)
0x0598 (0x000B30) 0x2526- f:00022 d: 294 | A = A + OR[294]
0x0599 (0x000B32) 0x292B- f:00024 d: 299 | OR[299] = A
0x059A (0x000B34) 0xE000- f:00160 d: 0 | IOB , fn000
0x059B (0x000B36) 0x1002- f:00010 d: 2 | A = 2 (0x0002)
0x059C (0x000B38) 0x2B17- f:00025 d: 279 | OR[279] = A + OR[279]
0x059D (0x000B3A) 0x212A- f:00020 d: 298 | A = OR[298]
0x059E (0x000B3C) 0xF800- f:00174 d: 0 | IOB , fn014
0x059F (0x000B3E) 0x212B- f:00020 d: 299 | A = OR[299]
0x05A0 (0x000B40) 0x1C00-0x5000 f:00016 d: 0 | A = A + 20480 (0x5000)
0x05A2 (0x000B44) 0xE400- f:00162 d: 0 | IOB , fn002
0x05A3 (0x000B46) 0x76EC- f:00073 d: 236 | R = P - 236 (0x04B7)
0x05A4 (0x000B48) 0x212A- f:00020 d: 298 | A = OR[298]
0x05A5 (0x000B4A) 0x290D- f:00024 d: 269 | OR[269] = A
0x05A6 (0x000B4C) 0x2102- f:00020 d: 258 | A = OR[258]
0x05A7 (0x000B4E) 0x1420- f:00012 d: 32 | A = A + 32 (0x0020)
0x05A8 (0x000B50) 0x290E- f:00024 d: 270 | OR[270] = A
0x05A9 (0x000B52) 0x1008- f:00010 d: 8 | A = 8 (0x0008)
0x05AA (0x000B54) 0x290F- f:00024 d: 271 | OR[271] = A
0x05AB (0x000B56) 0x7006- f:00070 d: 6 | P = P + 6 (0x05B1)
0x05AC (0x000B58) 0x310D- f:00030 d: 269 | A = (OR[269])
0x05AD (0x000B5A) 0x390E- f:00034 d: 270 | (OR[270]) = A
0x05AE (0x000B5C) 0x2D0D- f:00026 d: 269 | OR[269] = OR[269] + 1
0x05AF (0x000B5E) 0x2D0E- f:00026 d: 270 | OR[270] = OR[270] + 1
0x05B0 (0x000B60) 0x2F0F- f:00027 d: 271 | OR[271] = OR[271] - 1
0x05B1 (0x000B62) 0x210F- f:00020 d: 271 | A = OR[271]
0x05B2 (0x000B64) 0x8E06- f:00107 d: 6 | P = P - 6 (0x05AC), A # 0
0x05B3 (0x000B66) 0xE000- f:00160 d: 0 | IOB , fn000
0x05B4 (0x000B68) 0x1002- f:00010 d: 2 | A = 2 (0x0002)
0x05B5 (0x000B6A) 0x2B17- f:00025 d: 279 | OR[279] = A + OR[279]
0x05B6 (0x000B6C) 0x2102- f:00020 d: 258 | A = OR[258]
0x05B7 (0x000B6E) 0x1430- f:00012 d: 48 | A = A + 48 (0x0030)
0x05B8 (0x000B70) 0x2913- f:00024 d: 275 | OR[275] = A
0x05B9 (0x000B72) 0xF800- f:00174 d: 0 | IOB , fn014
0x05BA (0x000B74) 0x212B- f:00020 d: 299 | A = OR[299]
0x05BB (0x000B76) 0x1C00-0x4000 f:00016 d: 0 | A = A + 16384 (0x4000)
0x05BD (0x000B7A) 0xE400- f:00162 d: 0 | IOB , fn002
0x05BE (0x000B7C) 0x7707- f:00073 d: 263 | R = P - 263 (0x04B7)
0x05BF (0x000B7E) 0x1019- f:00010 d: 25 | A = 25 (0x0019)
0x05C0 (0x000B80) 0x2930- f:00024 d: 304 | OR[304] = A
0x05C1 (0x000B82) 0x212A- f:00020 d: 298 | A = OR[298]
0x05C2 (0x000B84) 0x2931- f:00024 d: 305 | OR[305] = A
0x05C3 (0x000B86) 0x1130- f:00010 d: 304 | A = 304 (0x0130)
0x05C4 (0x000B88) 0x5800- f:00054 d: 0 | B = A
0x05C5 (0x000B8A) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x05C6 (0x000B8C) 0x7C09- f:00076 d: 9 | R = OR[9]
0x05C7 (0x000B8E) 0x0200- f:00001 d: 0 | EXIT
0x05C8 (0x000B90) 0x0000- f:00000 d: 0 | PASS
0x05C9 (0x000B92) 0x003F- f:00000 d: 63 | PASS | **** non-standard encoding with D:0x003F ****
0x05CA (0x000B94) 0x000F- f:00000 d: 15 | PASS | **** non-standard encoding with D:0x000F ****
0x05CB (0x000B96) 0x000F- f:00000 d: 15 | PASS | **** non-standard encoding with D:0x000F ****
0x05CC (0x000B98) 0x000F- f:00000 d: 15 | PASS | **** non-standard encoding with D:0x000F ****
0x05CD (0x000B9A) 0x000F- f:00000 d: 15 | PASS | **** non-standard encoding with D:0x000F ****
0x05CE (0x000B9C) 0x001E- f:00000 d: 30 | PASS | **** non-standard encoding with D:0x001E ****
0x05CF (0x000B9E) 0x0000- f:00000 d: 0 | PASS
0x05D0 (0x000BA0) 0x0000- f:00000 d: 0 | PASS
0x05D1 (0x000BA2) 0x0005- f:00000 d: 5 | PASS | **** non-standard encoding with D:0x0005 ****
0x05D2 (0x000BA4) 0x0000- f:00000 d: 0 | PASS
0x05D3 (0x000BA6) 0x0000- f:00000 d: 0 | PASS
0x05D4 (0x000BA8) 0x0000- f:00000 d: 0 | PASS
0x05D5 (0x000BAA) 0x0000- f:00000 d: 0 | PASS
0x05D6 (0x000BAC) 0x0000- f:00000 d: 0 | PASS
0x05D7 (0x000BAE) 0x0001- f:00000 d: 1 | PASS | **** non-standard encoding with D:0x0001 ****
0x05D8 (0x000BB0) 0x003F- f:00000 d: 63 | PASS | **** non-standard encoding with D:0x003F ****
0x05D9 (0x000BB2) 0x000F- f:00000 d: 15 | PASS | **** non-standard encoding with D:0x000F ****
0x05DA (0x000BB4) 0x000F- f:00000 d: 15 | PASS | **** non-standard encoding with D:0x000F ****
0x05DB (0x000BB6) 0x0000- f:00000 d: 0 | PASS
0x05DC (0x000BB8) 0x000F- f:00000 d: 15 | PASS | **** non-standard encoding with D:0x000F ****
0x05DD (0x000BBA) 0x001E- f:00000 d: 30 | PASS | **** non-standard encoding with D:0x001E ****
0x05DE (0x000BBC) 0x000F- f:00000 d: 15 | PASS | **** non-standard encoding with D:0x000F ****
0x05DF (0x000BBE) 0x000F- f:00000 d: 15 | PASS | **** non-standard encoding with D:0x000F ****
0x05E0 (0x000BC0) 0x001E- f:00000 d: 30 | PASS | **** non-standard encoding with D:0x001E ****
0x05E1 (0x000BC2) 0x000F- f:00000 d: 15 | PASS | **** non-standard encoding with D:0x000F ****
0x05E2 (0x000BC4) 0x0000- f:00000 d: 0 | PASS
0x05E3 (0x000BC6) 0x0000- f:00000 d: 0 | PASS
0x05E4 (0x000BC8) 0x0000- f:00000 d: 0 | PASS
0x05E5 (0x000BCA) 0x0000- f:00000 d: 0 | PASS
0x05E6 (0x000BCC) 0x0002- f:00000 d: 2 | PASS | **** non-standard encoding with D:0x0002 ****
0x05E7 (0x000BCE) 0x008C- f:00000 d: 140 | PASS | **** non-standard encoding with D:0x008C ****
0x05E8 (0x000BD0) 0x000F- f:00000 d: 15 | PASS | **** non-standard encoding with D:0x000F ****
0x05E9 (0x000BD2) 0x000F- f:00000 d: 15 | PASS | **** non-standard encoding with D:0x000F ****
0x05EA (0x000BD4) 0x0000- f:00000 d: 0 | PASS
0x05EB (0x000BD6) 0x000F- f:00000 d: 15 | PASS | **** non-standard encoding with D:0x000F ****
0x05EC (0x000BD8) 0x001E- f:00000 d: 30 | PASS | **** non-standard encoding with D:0x001E ****
0x05ED (0x000BDA) 0x000F- f:00000 d: 15 | PASS | **** non-standard encoding with D:0x000F ****
0x05EE (0x000BDC) 0x000F- f:00000 d: 15 | PASS | **** non-standard encoding with D:0x000F ****
0x05EF (0x000BDE) 0x001E- f:00000 d: 30 | PASS | **** non-standard encoding with D:0x001E ****
0x05F0 (0x000BE0) 0x000F- f:00000 d: 15 | PASS | **** non-standard encoding with D:0x000F ****
0x05F1 (0x000BE2) 0x000F- f:00000 d: 15 | PASS | **** non-standard encoding with D:0x000F ****
0x05F2 (0x000BE4) 0x002D- f:00000 d: 45 | PASS | **** non-standard encoding with D:0x002D ****
0x05F3 (0x000BE6) 0x0001- f:00000 d: 1 | PASS | **** non-standard encoding with D:0x0001 ****
0x05F4 (0x000BE8) 0x0000- f:00000 d: 0 | PASS
0x05F5 (0x000BEA) 0x0003- f:00000 d: 3 | PASS | **** non-standard encoding with D:0x0003 ****
0x05F6 (0x000BEC) 0x003F- f:00000 d: 63 | PASS | **** non-standard encoding with D:0x003F ****
0x05F7 (0x000BEE) 0x000F- f:00000 d: 15 | PASS | **** non-standard encoding with D:0x000F ****
0x05F8 (0x000BF0) 0x000F- f:00000 d: 15 | PASS | **** non-standard encoding with D:0x000F ****
0x05F9 (0x000BF2) 0x0000- f:00000 d: 0 | PASS
0x05FA (0x000BF4) 0x000F- f:00000 d: 15 | PASS | **** non-standard encoding with D:0x000F ****
0x05FB (0x000BF6) 0x001E- f:00000 d: 30 | PASS | **** non-standard encoding with D:0x001E ****
0x05FC (0x000BF8) 0x000F- f:00000 d: 15 | PASS | **** non-standard encoding with D:0x000F ****
0x05FD (0x000BFA) 0x000F- f:00000 d: 15 | PASS | **** non-standard encoding with D:0x000F ****
0x05FE (0x000BFC) 0x001E- f:00000 d: 30 | PASS | **** non-standard encoding with D:0x001E ****
0x05FF (0x000BFE) 0x000F- f:00000 d: 15 | PASS | **** non-standard encoding with D:0x000F ****
0x0600 (0x000C00) 0x000F- f:00000 d: 15 | PASS | **** non-standard encoding with D:0x000F ****
0x0601 (0x000C02) 0x0003- f:00000 d: 3 | PASS | **** non-standard encoding with D:0x0003 ****
0x0602 (0x000C04) 0x0001- f:00000 d: 1 | PASS | **** non-standard encoding with D:0x0001 ****
0x0603 (0x000C06) 0x000F- f:00000 d: 15 | PASS | **** non-standard encoding with D:0x000F ****
0x0604 (0x000C08) 0x0004- f:00000 d: 4 | PASS | **** non-standard encoding with D:0x0004 ****
0x0605 (0x000C0A) 0x003F- f:00000 d: 63 | PASS | **** non-standard encoding with D:0x003F ****
0x0606 (0x000C0C) 0x000F- f:00000 d: 15 | PASS | **** non-standard encoding with D:0x000F ****
0x0607 (0x000C0E) 0x000F- f:00000 d: 15 | PASS | **** non-standard encoding with D:0x000F ****
0x0608 (0x000C10) 0x000F- f:00000 d: 15 | PASS | **** non-standard encoding with D:0x000F ****
0x0609 (0x000C12) 0x0000- f:00000 d: 0 | PASS
0x060A (0x000C14) 0x0000- f:00000 d: 0 | PASS
0x060B (0x000C16) 0x0000- f:00000 d: 0 | PASS
0x060C (0x000C18) 0x0000- f:00000 d: 0 | PASS
0x060D (0x000C1A) 0x0000- f:00000 d: 0 | PASS
0x060E (0x000C1C) 0x0000- f:00000 d: 0 | PASS
0x060F (0x000C1E) 0x0000- f:00000 d: 0 | PASS
0x0610 (0x000C20) 0x0000- f:00000 d: 0 | PASS
0x0611 (0x000C22) 0x0000- f:00000 d: 0 | PASS
0x0612 (0x000C24) 0x0000- f:00000 d: 0 | PASS
0x0613 (0x000C26) 0x0000- f:00000 d: 0 | PASS
0x0614 (0x000C28) 0x0000- f:00000 d: 0 | PASS
0x0615 (0x000C2A) 0x0000- f:00000 d: 0 | PASS
0x0616 (0x000C2C) 0x0000- f:00000 d: 0 | PASS
0x0617 (0x000C2E) 0x0000- f:00000 d: 0 | PASS
| 81.608522 | 127 | 0.464202 |
f504feb3d8c0371fa25a92dfa4208d1286dd7e3e | 2,707 | asm | Assembly | src/intro1.asm | giomba/snake6502 | a82c9e94fedbd0398b248ed73e2336262e86f10f | [
"Zlib"
] | 1 | 2020-04-24T22:28:18.000Z | 2020-04-24T22:28:18.000Z | src/intro1.asm | giomba/snake6502 | a82c9e94fedbd0398b248ed73e2336262e86f10f | [
"Zlib"
] | null | null | null | src/intro1.asm | giomba/snake6502 | a82c9e94fedbd0398b248ed73e2336262e86f10f | [
"Zlib"
] | null | null | null | #if VERBOSE = 1
LASTINIT SET .
#endif
; Currently statusIntro0 is the same as statusIntro1
; statusIntro1 has just been reserved for future use
statusIntro0:
statusIntro1:
; Decrement interrupt divider for the intro
ldx introCounter
dex
stx introCounter
cpx #0
beq status1do ; if divider is 0, then do status1do ...
rts ; ... else just do nothing and return
status1do:
; Reset introCounter
ldx #5
stx introCounter
; I want to print strings at different columns to make them
; bounce across the screen, so take last introX and add introXinc,
; then print string at that point. If introX is too far right, then
; set introXinc as #$ff (equals -1) so next time introX will be
; decremented by 1. And then, if introX is too far left, then
; set introXinc as #$01 so next time will be moved to right again.
lda introX
clc
adc introXinc ; this is #$01 or #$0ff, so actually it is +1 or -1
sta introX
cmp #19 ; am I too far right?
beq status1setSX ; if yes, set SX (left)
cmp #0 ; am I too far left?
beq status1setDX ; if yes, set DX (right)
jmp status1okset ; else do nothing (aka, next time re-use current
; increment value)
status1setDX:
lda #$01 ; set introXinc as +1
sta introXinc
jmp status1okset
status1setSX:
lda #$ff ; set introXinc as -1
sta introXinc
jmp status1okset
status1okset:
; Print "SNAKE BY GIOMBA" (see above for pointer details)
lda #<intro0string
sta srcStringPointer
lda #>intro0string
sta srcStringPointer + 1
; $0428 is 2nd line (previously filled with color shades by reset routine)
lda #$28
clc
adc introX ; just add X, to make it look like it has moved
sta dstScreenPointer
lda #$04
sta dstScreenPointer + 1
jsr printString
; Print "PRESS SPACE TO PLAY"
lda #<intro1string
sta srcStringPointer
lda #>intro1string
sta srcStringPointer + 1
; $0478 is 4th line (previously filled with color shades by reset routine)
; add #19, then sub introX will make it move to other way of 2nd line
lda #$78
clc
adc #19 ; add #19
sec
sbc introX ; sub introX
sta dstScreenPointer
lda #$04
sta dstScreenPointer + 1
jsr printString
; Some considerations on speed:
; yes, maybe I should have put the string chars once in screen text memory
; and then move it left and right. Should re-think about this.
; For now, just return.
rts
#if VERBOSE = 1
ECHO "intro1.asm @ ",LASTINIT,"len:",(. - LASTINIT)
#endif | 31.476744 | 79 | 0.64167 |
438087744cfd5a26aee8ac48ea256a33bcd53032 | 473 | asm | Assembly | iod/con2/qpc/disp_clear.asm | olifink/smsqe | c546d882b26566a46d71820d1539bed9ea8af108 | [
"BSD-2-Clause"
] | null | null | null | iod/con2/qpc/disp_clear.asm | olifink/smsqe | c546d882b26566a46d71820d1539bed9ea8af108 | [
"BSD-2-Clause"
] | null | null | null | iod/con2/qpc/disp_clear.asm | olifink/smsqe | c546d882b26566a46d71820d1539bed9ea8af108 | [
"BSD-2-Clause"
] | null | null | null | ; QPC clear display 1999 Tony Tebby
section con
xdef cn_disp_clear
include 'dev8_smsq_qpc_keys'
;+++
; Clear screen and copy
;---
cn_disp_clear
cnd.reg reg a0/a1
movem.l cnd.reg,-(sp)
move.l #qpc_scr_work,a1
move.w qpc_scrl(a1),d0
mulu qpc_scry(a1),d0
move.l qpc_scrb(a1),a0
lsr.l #4,d0 ; clear in lumps of 16
subq.l #1,d0
cnd_cls
clr.l (a0)+
clr.l (a0)+
clr.l (a0)+
clr.l (a0)+
dbra d0,cnd_cls
movem.l (sp)+,cnd.reg
moveq #0,d0
rts
end
| 13.514286 | 41 | 0.655391 |
276c6925ecdfa26dea0d34c0dc6e4882e1d86adf | 536 | asm | Assembly | programs/oeis/101/A101184.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/101/A101184.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/101/A101184.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A101184: a(n) = n + pi(n) + pi(pi(n)) + pi(pi(pi(n))) + pi(pi(pi(pi(n)))) + ...
; 1,3,6,7,11,12,14,15,16,17,22,23,25,26,27,28,31,32,34,35,36,37,39,40,41,42,43,44,46,47,53,54,55,56,57,58,60,61,62,63,66,67,69,70,71,72,74,75,76,77,78,79,81,82,83,84,85,86,90,91,93,94,95,96,97,98,101,102,103,104,106,107,109,110,111,112,113,114,116,117,118,119,122,123,124,125,126,127,129,130,131,132,133,134,135,136,138,139,140,141
mov $1,$0
lpb $1
add $0,1
mov $2,$1
seq $2,33270 ; Number of odd primes <= n.
add $0,$2
mov $1,$2
lpe
add $0,1
| 41.230769 | 331 | 0.61194 |
a709dda69e9666aa22073fad224572c11a3a7ec9 | 561 | asm | Assembly | oeis/017/A017044.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/017/A017044.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/017/A017044.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A017044: a(n) = (7*n + 5)^4.
; 625,20736,130321,456976,1185921,2560000,4879681,8503056,13845841,21381376,31640625,45212176,62742241,84934656,112550881,146410000,187388721,236421376,294499921,362673936,442050625,533794816,639128961,759333136,895745041,1049760000,1222830961,1416468496,1632240801,1871773696,2136750625,2428912656,2750058481,3102044416,3486784401,3906250000,4362470401,4857532416,5393580481,5972816656,6597500625,7269949696,7992538801,8767700496,9597924961,10485760000,11433811041,12444741136,13521270961,14666178816
mul $0,7
add $0,5
pow $0,4
| 80.142857 | 501 | 0.85205 |
060e69cd9668f200ee5f178f7ba63bd8717ebb1b | 3,431 | asm | Assembly | 配套代码/L022/L022/1.1.asm | zmrbak/ReverseAnalysis | 994fdc61c8af2eecc2a065a6f5ee0aacf371e836 | [
"MIT"
] | 35 | 2019-11-19T03:12:09.000Z | 2022-02-18T08:38:53.000Z | 配套代码/L022/L022/1.1.asm | zmrbak/ReverseAnalysis | 994fdc61c8af2eecc2a065a6f5ee0aacf371e836 | [
"MIT"
] | null | null | null | 配套代码/L022/L022/1.1.asm | zmrbak/ReverseAnalysis | 994fdc61c8af2eecc2a065a6f5ee0aacf371e836 | [
"MIT"
] | 22 | 2019-08-03T17:07:17.000Z | 2022-02-18T08:38:55.000Z | ; Listing generated by Microsoft (R) Optimizing Compiler Version 19.24.28117.0
TITLE C:\Users\libit\source\repos\L022\L022\L022.cpp
.686P
.XMM
include listing.inc
.model flat
INCLUDELIB LIBCMT
INCLUDELIB OLDNAMES
CONST SEGMENT
$SG5565 DB 'Hello World!', 0aH, 00H
CONST ENDS
PUBLIC ___local_stdio_printf_options
PUBLIC __vfprintf_l
PUBLIC _printf
PUBLIC ?myMax@@YAHHH@Z ; myMax
PUBLIC ?myMin@@YAHHH@Z ; myMin
PUBLIC _main
PUBLIC ?_OptionsStorage@?1??__local_stdio_printf_options@@9@4_KA ; `__local_stdio_printf_options'::`2'::_OptionsStorage
EXTRN ___acrt_iob_func:PROC
EXTRN ___stdio_common_vfprintf:PROC
; COMDAT ?_OptionsStorage@?1??__local_stdio_printf_options@@9@4_KA
_BSS SEGMENT
?_OptionsStorage@?1??__local_stdio_printf_options@@9@4_KA DQ 01H DUP (?) ; `__local_stdio_printf_options'::`2'::_OptionsStorage
_BSS ENDS
; Function compile flags: /Ogtpy
_TEXT SEGMENT
_main PROC
; File C:\Users\libit\source\repos\L022\L022\L022.cpp
; Line 19
push OFFSET $SG5565
call _printf
add esp, 4
; Line 21
xor eax, eax
ret 0
_main ENDP
_TEXT ENDS
; Function compile flags: /Ogtpy
_TEXT SEGMENT
_a$ = 8 ; size = 4
_b$ = 12 ; size = 4
?myMin@@YAHHH@Z PROC ; myMin
; File C:\Users\libit\source\repos\L022\L022\L022.cpp
; Line 13
mov eax, DWORD PTR _b$[esp-4]
cmp DWORD PTR _a$[esp-4], eax
cmovl eax, DWORD PTR _a$[esp-4]
; Line 15
ret 0
?myMin@@YAHHH@Z ENDP ; myMin
_TEXT ENDS
; Function compile flags: /Ogtpy
_TEXT SEGMENT
_a$ = 8 ; size = 4
_b$ = 12 ; size = 4
?myMax@@YAHHH@Z PROC ; myMax
; File C:\Users\libit\source\repos\L022\L022\L022.cpp
; Line 8
mov eax, DWORD PTR _b$[esp-4]
cmp DWORD PTR _a$[esp-4], eax
cmovg eax, DWORD PTR _a$[esp-4]
; Line 10
ret 0
?myMax@@YAHHH@Z ENDP ; myMax
_TEXT ENDS
; Function compile flags: /Ogtpy
; COMDAT _printf
_TEXT SEGMENT
__Format$ = 8 ; size = 4
_printf PROC ; COMDAT
; File C:\Program Files (x86)\Windows Kits\10\include\10.0.17763.0\ucrt\stdio.h
; Line 954
push esi
; Line 958
mov esi, DWORD PTR __Format$[esp]
push 1
call ___acrt_iob_func
add esp, 4
; Line 643
lea ecx, DWORD PTR __Format$[esp+4]
push ecx
push 0
push esi
push eax
call ___local_stdio_printf_options
push DWORD PTR [eax+4]
push DWORD PTR [eax]
call ___stdio_common_vfprintf
add esp, 24 ; 00000018H
; Line 960
pop esi
; Line 961
ret 0
_printf ENDP
_TEXT ENDS
; Function compile flags: /Ogtpy
; COMDAT __vfprintf_l
_TEXT SEGMENT
__Stream$ = 8 ; size = 4
__Format$ = 12 ; size = 4
__Locale$ = 16 ; size = 4
__ArgList$ = 20 ; size = 4
__vfprintf_l PROC ; COMDAT
; File C:\Program Files (x86)\Windows Kits\10\include\10.0.17763.0\ucrt\stdio.h
; Line 643
push DWORD PTR __ArgList$[esp-4]
push DWORD PTR __Locale$[esp]
push DWORD PTR __Format$[esp+4]
push DWORD PTR __Stream$[esp+8]
call ___local_stdio_printf_options
push DWORD PTR [eax+4]
push DWORD PTR [eax]
call ___stdio_common_vfprintf
add esp, 24 ; 00000018H
; Line 644
ret 0
__vfprintf_l ENDP
_TEXT ENDS
; Function compile flags: /Ogtpy
; COMDAT ___local_stdio_printf_options
_TEXT SEGMENT
___local_stdio_printf_options PROC ; COMDAT
; File C:\Program Files (x86)\Windows Kits\10\include\10.0.17763.0\ucrt\corecrt_stdio_config.h
; Line 88
mov eax, OFFSET ?_OptionsStorage@?1??__local_stdio_printf_options@@9@4_KA ; `__local_stdio_printf_options'::`2'::_OptionsStorage
; Line 89
ret 0
___local_stdio_printf_options ENDP
_TEXT ENDS
END
| 25.604478 | 129 | 0.729233 |
1bc2b27a040d2fd08a0c1f21000a01343b60f0f6 | 7,175 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_sm_/i9-9900K_12_0xca.log_21829_1777.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_sm_/i9-9900K_12_0xca.log_21829_1777.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_sm_/i9-9900K_12_0xca.log_21829_1777.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r11
push %r15
push %rax
push %rbx
push %rcx
push %rdi
push %rsi
lea addresses_normal_ht+0x70b2, %r15
nop
sub %rcx, %rcx
movb $0x61, (%r15)
xor %rax, %rax
lea addresses_WC_ht+0x1acf2, %rsi
lea addresses_WT_ht+0xb0f2, %rdi
clflush (%rdi)
inc %rbx
mov $31, %rcx
rep movsl
add $43370, %rdi
lea addresses_A_ht+0x1e4f2, %rsi
lea addresses_WT_ht+0x3afa, %rdi
clflush (%rsi)
nop
xor $62196, %rbx
mov $5, %rcx
rep movsw
nop
and %rax, %rax
lea addresses_WC_ht+0x8352, %rsi
lea addresses_WC_ht+0xedf2, %rdi
nop
nop
nop
cmp $38389, %rbx
mov $28, %rcx
rep movsl
nop
nop
nop
nop
nop
cmp %r11, %r11
lea addresses_D_ht+0x162fa, %rax
nop
nop
cmp $46211, %rsi
mov $0x6162636465666768, %r15
movq %r15, %xmm4
vmovups %ymm4, (%rax)
nop
nop
add $22546, %r15
lea addresses_UC_ht+0x2f72, %rsi
lea addresses_UC_ht+0x8512, %rdi
clflush (%rsi)
nop
nop
nop
nop
cmp %r10, %r10
mov $113, %rcx
rep movsw
add $34659, %rsi
lea addresses_WC_ht+0x1b692, %r11
nop
nop
nop
nop
nop
cmp $17643, %r15
mov (%r11), %cx
nop
nop
add $21431, %rdi
lea addresses_A_ht+0xd772, %rsi
lea addresses_normal_ht+0xdef2, %rdi
nop
nop
sub %r11, %r11
mov $6, %rcx
rep movsw
nop
nop
inc %rax
lea addresses_UC_ht+0xf6ea, %rsi
lea addresses_WT_ht+0x16e52, %rdi
clflush (%rsi)
nop
nop
nop
nop
add %r15, %r15
mov $98, %rcx
rep movsw
nop
nop
nop
nop
nop
and %r10, %r10
lea addresses_WT_ht+0x1dcf2, %rsi
nop
nop
nop
nop
inc %r15
mov (%rsi), %rax
nop
nop
nop
nop
cmp $52166, %r11
lea addresses_normal_ht+0x164f2, %rsi
lea addresses_UC_ht+0x1352d, %rdi
cmp %r11, %r11
mov $81, %rcx
rep movsw
nop
nop
add %rdi, %rdi
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %rax
pop %r15
pop %r11
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r12
push %r13
push %r14
push %r15
push %r8
push %rsi
// Store
lea addresses_UC+0x16cf2, %rsi
nop
inc %r15
mov $0x5152535455565758, %r12
movq %r12, %xmm4
vmovntdq %ymm4, (%rsi)
nop
dec %r12
// Faulty Load
lea addresses_UC+0x16cf2, %r8
clflush (%r8)
nop
nop
nop
nop
sub %r13, %r13
mov (%r8), %r15
lea oracles, %rsi
and $0xff, %r15
shlq $12, %r15
mov (%rsi,%r15,1), %r15
pop %rsi
pop %r8
pop %r15
pop %r14
pop %r13
pop %r12
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'size': 4, 'NT': False, 'type': 'addresses_UC', 'same': False, 'AVXalign': True, 'congruent': 0}}
{'OP': 'STOR', 'dst': {'size': 32, 'NT': True, 'type': 'addresses_UC', 'same': True, 'AVXalign': False, 'congruent': 0}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'size': 8, 'NT': False, 'type': 'addresses_UC', 'same': True, 'AVXalign': False, 'congruent': 0}}
<gen_prepare_buffer>
{'OP': 'STOR', 'dst': {'size': 1, 'NT': False, 'type': 'addresses_normal_ht', 'same': False, 'AVXalign': False, 'congruent': 6}}
{'OP': 'REPM', 'src': {'same': True, 'type': 'addresses_WC_ht', 'congruent': 10}, 'dst': {'same': False, 'type': 'addresses_WT_ht', 'congruent': 7}}
{'OP': 'REPM', 'src': {'same': False, 'type': 'addresses_A_ht', 'congruent': 10}, 'dst': {'same': False, 'type': 'addresses_WT_ht', 'congruent': 3}}
{'OP': 'REPM', 'src': {'same': False, 'type': 'addresses_WC_ht', 'congruent': 1}, 'dst': {'same': False, 'type': 'addresses_WC_ht', 'congruent': 8}}
{'OP': 'STOR', 'dst': {'size': 32, 'NT': False, 'type': 'addresses_D_ht', 'same': False, 'AVXalign': False, 'congruent': 1}}
{'OP': 'REPM', 'src': {'same': False, 'type': 'addresses_UC_ht', 'congruent': 7}, 'dst': {'same': True, 'type': 'addresses_UC_ht', 'congruent': 5}}
{'OP': 'LOAD', 'src': {'size': 2, 'NT': False, 'type': 'addresses_WC_ht', 'same': False, 'AVXalign': False, 'congruent': 1}}
{'OP': 'REPM', 'src': {'same': False, 'type': 'addresses_A_ht', 'congruent': 7}, 'dst': {'same': True, 'type': 'addresses_normal_ht', 'congruent': 6}}
{'OP': 'REPM', 'src': {'same': True, 'type': 'addresses_UC_ht', 'congruent': 3}, 'dst': {'same': False, 'type': 'addresses_WT_ht', 'congruent': 5}}
{'OP': 'LOAD', 'src': {'size': 8, 'NT': False, 'type': 'addresses_WT_ht', 'same': False, 'AVXalign': False, 'congruent': 8}}
{'OP': 'REPM', 'src': {'same': False, 'type': 'addresses_normal_ht', 'congruent': 11}, 'dst': {'same': False, 'type': 'addresses_UC_ht', 'congruent': 0}}
{'58': 21829}
58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58
*/
| 36.237374 | 2,999 | 0.660767 |
db3cf67cc3eda009081f45740f85ca99c1993305 | 357 | asm | Assembly | programs/oeis/194/A194390.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/194/A194390.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/194/A194390.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A194390: Numbers m such that Sum_{k=1..m} (<1/2 + k*r> - <k*r>) = 0, where r=sqrt(12) and < > denotes fractional part.
; 2,4,6,8,10,12,28,30,32,34,36,38,40,56,58,60,62,64,66,68,84,86,88,90,92,94,96,112,114,116,118,120,122,124,140,142,144,146,148,150,152,168,170,172,174,176,178,180
add $0,1
mov $1,$0
mov $2,7
lpb $1
add $0,$2
sub $1,$2
lpe
mul $0,2
| 29.75 | 162 | 0.62465 |
45a1c5ac37323c322c511c0dcb98677e9cd9ae6a | 280 | asm | Assembly | AVR/check_negative.asm | StxGuy/EmbeddedSystems | 6d9bc8b295724d361ea1d82e701e6530f74e2300 | [
"MIT"
] | null | null | null | AVR/check_negative.asm | StxGuy/EmbeddedSystems | 6d9bc8b295724d361ea1d82e701e6530f74e2300 | [
"MIT"
] | null | null | null | AVR/check_negative.asm | StxGuy/EmbeddedSystems | 6d9bc8b295724d361ea1d82e701e6530f74e2300 | [
"MIT"
] | null | null | null | .device ATmega328
.org 0x00 ; Program starts at 0x00
rjmp INICIO
; Negative fixed point?
INICIO: nop
ldi R16,0xA5
andi R16,0x80
breq POS
rjmp NEG
LOOP: rjmp LOOP
POS: nop
rjmp LOOP
NEG: nop
rjmp LOOP
| 14 | 36 | 0.546429 |
d3156dd14354620e7d11cd31264890a70f64e9a8 | 506 | asm | Assembly | module/irq/handler.asm | Crupette/modit-micro | 3a94ccf7289d17452d61e91be3dbc190e4eb6f7a | [
"MIT"
] | 1 | 2020-03-23T21:34:58.000Z | 2020-03-23T21:34:58.000Z | module/irq/handler.asm | Crupette/modit-os | 3a94ccf7289d17452d61e91be3dbc190e4eb6f7a | [
"MIT"
] | null | null | null | module/irq/handler.asm | Crupette/modit-os | 3a94ccf7289d17452d61e91be3dbc190e4eb6f7a | [
"MIT"
] | null | null | null | BITS 32
extern _irq_handler
irq_common:
pushad
push ds
push es
push fs
push gs
mov ax, 0x10
mov ds, ax
mov es, ax
mov fs, ax
mov gs, ax
cld
push esp
call _irq_handler
add esp, 4
pop gs
pop fs
pop es
pop ds
popad
add esp, 8
iret
;Requests
%macro IRQ 1
global _irq%1
_irq%1:
cli
push 0
push %1+32
jmp irq_common
%endmacro
%assign irqno 0
%rep (256 - 32)
IRQ irqno
%assign irqno irqno+1
%endrep
| 10.326531 | 21 | 0.573123 |
6a34aef474197eae29352059c1fd16b13e3e1544 | 8,148 | asm | Assembly | Transynther/x86/_processed/US/_zr_/i7-7700_9_0x48.log_21829_1392.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/US/_zr_/i7-7700_9_0x48.log_21829_1392.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/US/_zr_/i7-7700_9_0x48.log_21829_1392.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r14
push %r9
push %rax
push %rcx
push %rdi
push %rsi
lea addresses_WC_ht+0x14ecd, %rsi
lea addresses_WT_ht+0x11b0d, %rdi
nop
inc %rax
mov $85, %rcx
rep movsq
nop
nop
nop
add %r9, %r9
lea addresses_WC_ht+0x15cd, %rsi
lea addresses_UC_ht+0x1e0ed, %rdi
nop
nop
nop
nop
xor $57710, %r14
mov $103, %rcx
rep movsl
nop
nop
nop
nop
nop
inc %rsi
lea addresses_UC_ht+0x14fcd, %rdi
nop
nop
nop
sub $53328, %rax
mov $0x6162636465666768, %rsi
movq %rsi, %xmm5
movups %xmm5, (%rdi)
nop
nop
nop
add $22552, %rsi
lea addresses_UC_ht+0x177d5, %rsi
lea addresses_WT_ht+0x1724d, %rdi
nop
nop
nop
nop
and $8458, %r11
mov $104, %rcx
rep movsl
nop
nop
nop
nop
nop
cmp $45599, %rax
lea addresses_WC_ht+0xf8cd, %r14
nop
nop
nop
nop
nop
add %r11, %r11
mov $0x6162636465666768, %rsi
movq %rsi, (%r14)
nop
nop
nop
nop
nop
cmp %rdi, %rdi
lea addresses_normal_ht+0x8acd, %rax
sub %r11, %r11
movw $0x6162, (%rax)
nop
and $1844, %rcx
lea addresses_D_ht+0x17001, %r14
and %rdi, %rdi
movl $0x61626364, (%r14)
nop
dec %r9
lea addresses_WC_ht+0xe6cd, %rcx
and %r11, %r11
mov $0x6162636465666768, %r14
movq %r14, (%rcx)
nop
nop
nop
nop
add $26095, %r9
lea addresses_normal_ht+0x8a87, %rsi
lea addresses_A_ht+0xb92f, %rdi
nop
nop
inc %rax
mov $9, %rcx
rep movsb
add $64404, %r14
lea addresses_WT_ht+0xa6cd, %r9
nop
nop
nop
nop
and $17484, %rdi
movl $0x61626364, (%r9)
nop
nop
nop
nop
and $64723, %r9
lea addresses_normal_ht+0xda65, %rsi
lea addresses_D_ht+0x11365, %rdi
inc %r9
mov $120, %rcx
rep movsl
cmp $11428, %rsi
lea addresses_UC_ht+0x1840d, %rsi
lea addresses_A_ht+0x94d, %rdi
nop
nop
nop
nop
cmp %r14, %r14
mov $46, %rcx
rep movsq
nop
nop
nop
cmp %r11, %r11
lea addresses_WC_ht+0x166cd, %r9
nop
nop
xor %r11, %r11
vmovups (%r9), %ymm0
vextracti128 $0, %ymm0, %xmm0
vpextrq $1, %xmm0, %rsi
nop
nop
cmp %rax, %rax
lea addresses_D_ht+0x111cd, %rax
and %rcx, %rcx
movb (%rax), %r14b
nop
nop
nop
add %rdi, %rdi
pop %rsi
pop %rdi
pop %rcx
pop %rax
pop %r9
pop %r14
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r12
push %rbp
push %rbx
push %rcx
push %rdi
push %rsi
// Store
lea addresses_PSE+0xc73d, %rbx
nop
nop
nop
nop
dec %r12
mov $0x5152535455565758, %rsi
movq %rsi, %xmm7
vmovups %ymm7, (%rbx)
nop
nop
nop
and $46109, %r12
// Store
lea addresses_US+0x10ccd, %rsi
clflush (%rsi)
nop
nop
add %r11, %r11
movw $0x5152, (%rsi)
nop
nop
nop
sub $64408, %r12
// Faulty Load
lea addresses_US+0x6cd, %r12
nop
nop
nop
nop
nop
sub %rbp, %rbp
movups (%r12), %xmm6
vpextrq $1, %xmm6, %r11
lea oracles, %rdi
and $0xff, %r11
shlq $12, %r11
mov (%rdi,%r11,1), %r11
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %rbp
pop %r12
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'type': 'addresses_US', 'AVXalign': False, 'congruent': 0, 'size': 4, 'same': False, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_PSE', 'AVXalign': False, 'congruent': 4, 'size': 32, 'same': False, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_US', 'AVXalign': False, 'congruent': 9, 'size': 2, 'same': False, 'NT': False}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'type': 'addresses_US', 'AVXalign': False, 'congruent': 0, 'size': 16, 'same': True, 'NT': False}}
<gen_prepare_buffer>
{'OP': 'REPM', 'src': {'type': 'addresses_WC_ht', 'congruent': 8, 'same': False}, 'dst': {'type': 'addresses_WT_ht', 'congruent': 6, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_WC_ht', 'congruent': 7, 'same': False}, 'dst': {'type': 'addresses_UC_ht', 'congruent': 3, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_UC_ht', 'AVXalign': False, 'congruent': 8, 'size': 16, 'same': False, 'NT': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_UC_ht', 'congruent': 3, 'same': False}, 'dst': {'type': 'addresses_WT_ht', 'congruent': 4, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WC_ht', 'AVXalign': False, 'congruent': 8, 'size': 8, 'same': False, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_normal_ht', 'AVXalign': False, 'congruent': 9, 'size': 2, 'same': False, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_D_ht', 'AVXalign': False, 'congruent': 1, 'size': 4, 'same': True, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WC_ht', 'AVXalign': False, 'congruent': 11, 'size': 8, 'same': False, 'NT': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_normal_ht', 'congruent': 1, 'same': False}, 'dst': {'type': 'addresses_A_ht', 'congruent': 1, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WT_ht', 'AVXalign': False, 'congruent': 10, 'size': 4, 'same': False, 'NT': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_normal_ht', 'congruent': 1, 'same': False}, 'dst': {'type': 'addresses_D_ht', 'congruent': 3, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_UC_ht', 'congruent': 6, 'same': False}, 'dst': {'type': 'addresses_A_ht', 'congruent': 7, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_WC_ht', 'AVXalign': False, 'congruent': 11, 'size': 32, 'same': False, 'NT': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_D_ht', 'AVXalign': True, 'congruent': 8, 'size': 1, 'same': False, 'NT': True}}
{'00': 21829}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
| 32.987854 | 2,999 | 0.658689 |
df267052d85e795aac4324498452a004575d22db | 5,459 | asm | Assembly | coverage/IN_CTS/491-COVERAGE-nir-loop-analyze-838/work/variant/1_spirv_asm/shader.frag.asm | asuonpaa/ShaderTests | 6a3672040dcfa0d164d313224446496d1775a15e | [
"Apache-2.0"
] | null | null | null | coverage/IN_CTS/491-COVERAGE-nir-loop-analyze-838/work/variant/1_spirv_asm/shader.frag.asm | asuonpaa/ShaderTests | 6a3672040dcfa0d164d313224446496d1775a15e | [
"Apache-2.0"
] | 47 | 2021-03-11T07:42:51.000Z | 2022-03-14T06:30:14.000Z | coverage/IN_CTS/491-COVERAGE-nir-loop-analyze-838/work/variant/1_spirv_asm/shader.frag.asm | asuonpaa/ShaderTests | 6a3672040dcfa0d164d313224446496d1775a15e | [
"Apache-2.0"
] | 4 | 2021-03-09T13:37:19.000Z | 2022-02-25T07:32:11.000Z | ; SPIR-V
; Version: 1.0
; Generator: Khronos Glslang Reference Front End; 10
; Bound: 108
; Schema: 0
OpCapability Shader
%1 = OpExtInstImport "GLSL.std.450"
OpMemoryModel Logical GLSL450
OpEntryPoint Fragment %4 "main" %89
OpExecutionMode %4 OriginUpperLeft
OpSource ESSL 320
OpName %4 "main"
OpName %11 "arr"
OpName %14 "buf0"
OpMemberName %14 0 "_GLF_uniform_int_values"
OpName %16 ""
OpName %30 "index"
OpName %89 "_GLF_color"
OpDecorate %13 ArrayStride 16
OpMemberDecorate %14 0 Offset 0
OpDecorate %14 Block
OpDecorate %16 DescriptorSet 0
OpDecorate %16 Binding 0
OpDecorate %89 Location 0
%2 = OpTypeVoid
%3 = OpTypeFunction %2
%6 = OpTypeInt 32 1
%7 = OpTypeInt 32 0
%8 = OpConstant %7 3
%9 = OpTypeArray %6 %8
%10 = OpTypePointer Function %9
%12 = OpConstant %7 6
%13 = OpTypeArray %6 %12
%14 = OpTypeStruct %13
%15 = OpTypePointer Uniform %14
%16 = OpVariable %15 Uniform
%17 = OpConstant %6 0
%18 = OpConstant %6 3
%19 = OpTypePointer Uniform %6
%22 = OpConstant %6 5
%25 = OpConstant %6 2
%29 = OpTypePointer Function %6
%31 = OpConstant %6 1
%37 = OpTypeBool
%38 = OpConstantTrue %37
%69 = OpConstant %6 4
%86 = OpTypeFloat 32
%87 = OpTypeVector %86 4
%88 = OpTypePointer Output %87
%89 = OpVariable %88 Output
%4 = OpFunction %2 None %3
%5 = OpLabel
%11 = OpVariable %10 Function
%30 = OpVariable %29 Function
%20 = OpAccessChain %19 %16 %17 %18
%21 = OpLoad %6 %20
%23 = OpAccessChain %19 %16 %17 %22
%24 = OpLoad %6 %23
%26 = OpAccessChain %19 %16 %17 %25
%27 = OpLoad %6 %26
%28 = OpCompositeConstruct %9 %21 %24 %27
OpStore %11 %28
OpStore %30 %31
OpBranch %32
%32 = OpLabel
OpLoopMerge %34 %35 None
OpBranch %36
%36 = OpLabel
OpSelectionMerge %40 None
OpBranchConditional %38 %39 %40
%39 = OpLabel
%41 = OpAccessChain %19 %16 %17 %17
%42 = OpLoad %6 %41
%43 = OpIEqual %37 %42 %31
%44 = OpLoad %6 %30
%45 = OpSLessThanEqual %37 %44 %31
%46 = OpLogicalAnd %37 %43 %45
%47 = OpLogicalNot %37 %46
OpBranch %40
%40 = OpLabel
%48 = OpPhi %37 %38 %36 %47 %39
%49 = OpLogicalNot %37 %48
OpBranchConditional %49 %33 %34
%33 = OpLabel
%50 = OpLoad %6 %30
%51 = OpAccessChain %29 %11 %50
%52 = OpLoad %6 %51
%53 = OpIAdd %6 %52 %31
OpStore %51 %53
%54 = OpLoad %6 %30
%55 = OpIAdd %6 %54 %31
OpStore %30 %55
OpBranch %35
%35 = OpLabel
OpBranch %32
%34 = OpLabel
%56 = OpAccessChain %19 %16 %17 %31
%57 = OpLoad %6 %56
%58 = OpAccessChain %29 %11 %57
%59 = OpLoad %6 %58
%60 = OpAccessChain %19 %16 %17 %18
%61 = OpLoad %6 %60
%62 = OpIEqual %37 %59 %61
OpSelectionMerge %64 None
OpBranchConditional %62 %63 %64
%63 = OpLabel
%65 = OpAccessChain %19 %16 %17 %17
%66 = OpLoad %6 %65
%67 = OpAccessChain %29 %11 %66
%68 = OpLoad %6 %67
%70 = OpAccessChain %19 %16 %17 %69
%71 = OpLoad %6 %70
%72 = OpIEqual %37 %68 %71
OpBranch %64
%64 = OpLabel
%73 = OpPhi %37 %62 %34 %72 %63
OpSelectionMerge %75 None
OpBranchConditional %73 %74 %75
%74 = OpLabel
%76 = OpAccessChain %19 %16 %17 %18
%77 = OpLoad %6 %76
%78 = OpAccessChain %29 %11 %77
%79 = OpLoad %6 %78
%80 = OpAccessChain %19 %16 %17 %25
%81 = OpLoad %6 %80
%82 = OpIEqual %37 %79 %81
OpBranch %75
%75 = OpLabel
%83 = OpPhi %37 %73 %64 %82 %74
OpSelectionMerge %85 None
OpBranchConditional %83 %84 %103
%84 = OpLabel
%90 = OpAccessChain %19 %16 %17 %17
%91 = OpLoad %6 %90
%92 = OpConvertSToF %86 %91
%93 = OpAccessChain %19 %16 %17 %31
%94 = OpLoad %6 %93
%95 = OpConvertSToF %86 %94
%96 = OpAccessChain %19 %16 %17 %31
%97 = OpLoad %6 %96
%98 = OpConvertSToF %86 %97
%99 = OpAccessChain %19 %16 %17 %17
%100 = OpLoad %6 %99
%101 = OpConvertSToF %86 %100
%102 = OpCompositeConstruct %87 %92 %95 %98 %101
OpStore %89 %102
OpBranch %85
%103 = OpLabel
%104 = OpAccessChain %19 %16 %17 %31
%105 = OpLoad %6 %104
%106 = OpConvertSToF %86 %105
%107 = OpCompositeConstruct %87 %106 %106 %106 %106
OpStore %89 %107
OpBranch %85
%85 = OpLabel
OpReturn
OpFunctionEnd
| 34.550633 | 59 | 0.475362 |
b4c8eac5b13647e2d16503633c886bcb24a18492 | 784 | asm | Assembly | programs/oeis/277/A277237.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/277/A277237.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/277/A277237.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A277237: Number of strings of length n composed of symbols from the circular list [1,2,3,4,5,6] such that adjacent symbols in the string must be adjacent in the list. No runs of length 2 or more are allowed for symbols 1, 3 and 5.
; 1,6,15,39,99,255,651,1671,4275,10959,28059,71895,184131,471711,1208235,3095079,7928019,20308335,52020411,133253751,341335395,874350399,2239691979,5737093575,14695861491,37644235791,96427681755,247004624919,632715351939,1620733851615
cal $0,277236 ; Number of strings of length n composed of symbols from the circular list [1,2,3,4] such that adjacent symbols in the string must be adjacent in the list. No runs of length 2 or more are allowed for symbols 1 and 3.
mul $0,2
mov $1,$0
div $1,2
sub $1,2
div $1,2
sub $0,$1
add $0,1
mov $1,$0
sub $1,2
| 56 | 234 | 0.767857 |
a827aab249c0c27ab69aa04e0827c017466c125e | 513 | asm | Assembly | testsuite/ubivm/expected/while_1.asm | alexgarzao/UOP | 12460841ff2b9991d2f7f461635b1f551413823f | [
"MIT"
] | null | null | null | testsuite/ubivm/expected/while_1.asm | alexgarzao/UOP | 12460841ff2b9991d2f7f461635b1f551413823f | [
"MIT"
] | null | null | null | testsuite/ubivm/expected/while_1.asm | alexgarzao/UOP | 12460841ff2b9991d2f7f461635b1f551413823f | [
"MIT"
] | null | null | null | Entity start
No options
Constants
0 S start
1 S x
2 I 1
3 I 10
4 S x=
5 I 2
6 S io.writeln
End
Valid context (always)
No properties
Def start
No parameters
Local variables
0 int x
End
No results
ldconst 2 --> [1]
stvar 0 --> [x]
2: ldvar 0 --> [x]
ldconst 3 --> [10]
le
ifnot 15 --> [15]
ldconst 4 --> [x=]
ldvar 0 --> [x]
ldconst 5 --> [2]
lcall 6 --> [io.writeln]
ldvar 0 --> [x]
ldconst 2 --> [1]
add
stvar 0 --> [x]
jmp 2 --> [2]
15: stop
End
End
| 13.5 | 26 | 0.536062 |
ae9e0d82197b7fe20f35d097edac8e0096d5e74e | 7,477 | asm | Assembly | Transynther/x86/_processed/NONE/_zr_/i9-9900K_12_0xca.log_21829_1053.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_zr_/i9-9900K_12_0xca.log_21829_1053.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_zr_/i9-9900K_12_0xca.log_21829_1053.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r15
push %r8
push %r9
push %rbp
push %rcx
push %rdi
push %rsi
lea addresses_WC_ht+0xd4f7, %r10
clflush (%r10)
cmp %rcx, %rcx
movups (%r10), %xmm1
vpextrq $1, %xmm1, %r15
and %rbp, %rbp
lea addresses_WC_ht+0x16c37, %rbp
nop
nop
nop
nop
nop
cmp %r8, %r8
mov $0x6162636465666768, %rcx
movq %rcx, (%rbp)
nop
nop
add %rcx, %rcx
lea addresses_UC_ht+0x1c817, %rsi
lea addresses_WT_ht+0x17257, %rdi
clflush (%rdi)
nop
nop
nop
nop
add %r9, %r9
mov $26, %rcx
rep movsq
nop
nop
nop
nop
and $41061, %r8
lea addresses_WT_ht+0xf417, %rsi
nop
nop
xor $8796, %rcx
mov (%rsi), %ebp
nop
nop
nop
nop
cmp %r8, %r8
lea addresses_normal_ht+0xb677, %rdi
nop
and $52024, %rsi
movb (%rdi), %r15b
sub $19399, %rbp
lea addresses_WC_ht+0xd273, %rcx
nop
dec %r8
movups (%rcx), %xmm7
vpextrq $1, %xmm7, %rdi
nop
nop
cmp %r9, %r9
lea addresses_WT_ht+0x108e5, %rbp
add %rsi, %rsi
movw $0x6162, (%rbp)
nop
nop
add $54785, %r9
lea addresses_WC_ht+0xf017, %r15
nop
nop
nop
nop
inc %rdi
mov $0x6162636465666768, %r9
movq %r9, (%r15)
nop
nop
nop
add %rbp, %rbp
lea addresses_WC_ht+0x4a17, %rsi
lea addresses_UC_ht+0xd7a4, %rdi
nop
nop
nop
nop
and $43453, %r10
mov $97, %rcx
rep movsq
nop
nop
nop
and $53956, %rcx
lea addresses_WT_ht+0x13717, %r15
nop
nop
nop
inc %rsi
mov $0x6162636465666768, %rbp
movq %rbp, %xmm3
vmovups %ymm3, (%r15)
nop
nop
nop
nop
xor $65402, %r10
lea addresses_normal_ht+0x67f7, %rdi
nop
nop
nop
nop
inc %r15
movups (%rdi), %xmm4
vpextrq $0, %xmm4, %r10
nop
nop
sub %rsi, %rsi
lea addresses_A_ht+0x1917, %rbp
nop
nop
add $37730, %r10
movb (%rbp), %cl
nop
nop
nop
nop
nop
add %r9, %r9
lea addresses_A_ht+0xcf17, %rsi
lea addresses_A_ht+0xc017, %rdi
clflush (%rsi)
nop
nop
nop
cmp %r10, %r10
mov $63, %rcx
rep movsw
sub %rbp, %rbp
pop %rsi
pop %rdi
pop %rcx
pop %rbp
pop %r9
pop %r8
pop %r15
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r12
push %r9
push %rax
push %rcx
push %rsi
// Store
lea addresses_WT+0x5c6b, %rsi
nop
nop
nop
and $60618, %r12
mov $0x5152535455565758, %rcx
movq %rcx, %xmm1
movups %xmm1, (%rsi)
nop
nop
nop
nop
nop
inc %rsi
// Faulty Load
lea addresses_A+0x11417, %r12
add $41812, %rsi
mov (%r12), %rax
lea oracles, %r12
and $0xff, %rax
shlq $12, %rax
mov (%r12,%rax,1), %rax
pop %rsi
pop %rcx
pop %rax
pop %r9
pop %r12
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'size': 32, 'NT': False, 'type': 'addresses_A', 'same': False, 'AVXalign': False, 'congruent': 0}}
{'OP': 'STOR', 'dst': {'size': 16, 'NT': False, 'type': 'addresses_WT', 'same': False, 'AVXalign': False, 'congruent': 1}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'size': 8, 'NT': False, 'type': 'addresses_A', 'same': True, 'AVXalign': False, 'congruent': 0}}
<gen_prepare_buffer>
{'OP': 'LOAD', 'src': {'size': 16, 'NT': False, 'type': 'addresses_WC_ht', 'same': False, 'AVXalign': False, 'congruent': 3}}
{'OP': 'STOR', 'dst': {'size': 8, 'NT': False, 'type': 'addresses_WC_ht', 'same': False, 'AVXalign': False, 'congruent': 5}}
{'OP': 'REPM', 'src': {'same': False, 'type': 'addresses_UC_ht', 'congruent': 9}, 'dst': {'same': True, 'type': 'addresses_WT_ht', 'congruent': 3}}
{'OP': 'LOAD', 'src': {'size': 4, 'NT': False, 'type': 'addresses_WT_ht', 'same': False, 'AVXalign': False, 'congruent': 9}}
{'OP': 'LOAD', 'src': {'size': 1, 'NT': False, 'type': 'addresses_normal_ht', 'same': False, 'AVXalign': False, 'congruent': 4}}
{'OP': 'LOAD', 'src': {'size': 16, 'NT': False, 'type': 'addresses_WC_ht', 'same': False, 'AVXalign': False, 'congruent': 0}}
{'OP': 'STOR', 'dst': {'size': 2, 'NT': False, 'type': 'addresses_WT_ht', 'same': False, 'AVXalign': False, 'congruent': 1}}
{'OP': 'STOR', 'dst': {'size': 8, 'NT': False, 'type': 'addresses_WC_ht', 'same': False, 'AVXalign': True, 'congruent': 10}}
{'OP': 'REPM', 'src': {'same': False, 'type': 'addresses_WC_ht', 'congruent': 8}, 'dst': {'same': False, 'type': 'addresses_UC_ht', 'congruent': 0}}
{'OP': 'STOR', 'dst': {'size': 32, 'NT': False, 'type': 'addresses_WT_ht', 'same': False, 'AVXalign': False, 'congruent': 5}}
{'OP': 'LOAD', 'src': {'size': 16, 'NT': False, 'type': 'addresses_normal_ht', 'same': False, 'AVXalign': False, 'congruent': 2}}
{'OP': 'LOAD', 'src': {'size': 1, 'NT': False, 'type': 'addresses_A_ht', 'same': True, 'AVXalign': False, 'congruent': 8}}
{'OP': 'REPM', 'src': {'same': False, 'type': 'addresses_A_ht', 'congruent': 6}, 'dst': {'same': False, 'type': 'addresses_A_ht', 'congruent': 10}}
{'00': 21829}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
| 34.298165 | 2,999 | 0.655477 |
9f10971fd71c7e1a3454eafd89fa7003b84806fb | 6,065 | asm | Assembly | Transynther/x86/_processed/AVXALIGN/_ht_zr_un_/i7-7700_9_0x48_notsx.log_21829_1327.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/AVXALIGN/_ht_zr_un_/i7-7700_9_0x48_notsx.log_21829_1327.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/AVXALIGN/_ht_zr_un_/i7-7700_9_0x48_notsx.log_21829_1327.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r12
push %r15
push %rbp
push %rbx
push %rcx
push %rdi
push %rsi
lea addresses_WT_ht+0xd145, %rsi
lea addresses_D_ht+0x1404d, %rdi
nop
nop
nop
nop
nop
mfence
mov $88, %rcx
rep movsw
nop
nop
cmp $27434, %rdi
lea addresses_D_ht+0x8eb7, %rsi
lea addresses_D_ht+0x19465, %rdi
clflush (%rdi)
nop
nop
nop
xor $62655, %rbp
mov $53, %rcx
rep movsl
nop
nop
nop
xor %rcx, %rcx
lea addresses_WT_ht+0xba65, %rsi
lea addresses_A_ht+0xb425, %rdi
nop
nop
nop
and %r15, %r15
mov $84, %rcx
rep movsl
add $53343, %r15
lea addresses_WT_ht+0x4a65, %rsi
lea addresses_D_ht+0xffe5, %rdi
cmp $34299, %rbx
mov $67, %rcx
rep movsl
nop
nop
nop
add %rbp, %rbp
lea addresses_WC_ht+0x3d45, %r15
clflush (%r15)
nop
nop
nop
nop
nop
cmp %r12, %r12
movb $0x61, (%r15)
nop
nop
nop
nop
nop
and %rdi, %rdi
lea addresses_UC_ht+0x1d7a5, %r12
and $38752, %rdi
movb (%r12), %bl
nop
nop
nop
nop
nop
xor $30225, %rbx
lea addresses_UC_ht+0x166b9, %r12
nop
nop
nop
nop
and $6289, %rsi
mov (%r12), %ebx
cmp %r15, %r15
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %rbp
pop %r15
pop %r12
ret
.global s_faulty_load
s_faulty_load:
push %r12
push %r13
push %r15
push %rbx
push %rcx
push %rdx
// Store
lea addresses_UC+0x1320c, %r12
and %rdx, %rdx
mov $0x5152535455565758, %r15
movq %r15, %xmm7
vmovups %ymm7, (%r12)
// Exception!!!
nop
nop
nop
mov (0), %r13
nop
nop
nop
add %r12, %r12
// Faulty Load
mov $0xa65, %rbx
nop
nop
nop
sub %r13, %r13
movntdqa (%rbx), %xmm6
vpextrq $1, %xmm6, %r12
lea oracles, %rbx
and $0xff, %r12
shlq $12, %r12
mov (%rbx,%r12,1), %r12
pop %rdx
pop %rcx
pop %rbx
pop %r15
pop %r13
pop %r12
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 32, 'type': 'addresses_P', 'congruent': 0}}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 32, 'type': 'addresses_UC', 'congruent': 0}, 'OP': 'STOR'}
[Faulty Load]
{'OP': 'LOAD', 'src': {'same': True, 'NT': True, 'AVXalign': False, 'size': 16, 'type': 'addresses_P', 'congruent': 0}}
<gen_prepare_buffer>
{'dst': {'same': False, 'congruent': 3, 'type': 'addresses_D_ht'}, 'OP': 'REPM', 'src': {'same': False, 'congruent': 4, 'type': 'addresses_WT_ht'}}
{'dst': {'same': True, 'congruent': 9, 'type': 'addresses_D_ht'}, 'OP': 'REPM', 'src': {'same': False, 'congruent': 1, 'type': 'addresses_D_ht'}}
{'dst': {'same': False, 'congruent': 4, 'type': 'addresses_A_ht'}, 'OP': 'REPM', 'src': {'same': False, 'congruent': 10, 'type': 'addresses_WT_ht'}}
{'dst': {'same': False, 'congruent': 6, 'type': 'addresses_D_ht'}, 'OP': 'REPM', 'src': {'same': True, 'congruent': 10, 'type': 'addresses_WT_ht'}}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 1, 'type': 'addresses_WC_ht', 'congruent': 5}, 'OP': 'STOR'}
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 1, 'type': 'addresses_UC_ht', 'congruent': 5}}
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 4, 'type': 'addresses_UC_ht', 'congruent': 1}}
{'ff': 2, '46': 176, '49': 21649, '00': 2}
00 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 46 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 46 49 49 46 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49
*/
| 38.144654 | 2,999 | 0.656884 |
bca5f0e6553862585db16f94ade8d452f76e095a | 5,047 | asm | Assembly | coverage/IN_CTS/0538-COVERAGE-constants-h-305/work/variant/1_spirv_asm/shader.frag.asm | asuonpaa/ShaderTests | 6a3672040dcfa0d164d313224446496d1775a15e | [
"Apache-2.0"
] | null | null | null | coverage/IN_CTS/0538-COVERAGE-constants-h-305/work/variant/1_spirv_asm/shader.frag.asm | asuonpaa/ShaderTests | 6a3672040dcfa0d164d313224446496d1775a15e | [
"Apache-2.0"
] | 47 | 2021-03-11T07:42:51.000Z | 2022-03-14T06:30:14.000Z | coverage/IN_CTS/0538-COVERAGE-constants-h-305/work/variant/1_spirv_asm/shader.frag.asm | asuonpaa/ShaderTests | 6a3672040dcfa0d164d313224446496d1775a15e | [
"Apache-2.0"
] | 4 | 2021-03-09T13:37:19.000Z | 2022-02-25T07:32:11.000Z | ; SPIR-V
; Version: 1.0
; Generator: Khronos Glslang Reference Front End; 10
; Bound: 91
; Schema: 0
OpCapability Shader
%1 = OpExtInstImport "GLSL.std.450"
OpMemoryModel Logical GLSL450
OpEntryPoint Fragment %4 "main" %29 %70
OpExecutionMode %4 OriginUpperLeft
OpSource ESSL 320
OpName %4 "main"
OpName %10 "m"
OpName %11 "buf_push"
OpMemberName %11 0 "zero"
OpName %13 ""
OpName %25 "v0"
OpName %29 "gl_FragCoord"
OpName %34 "v1"
OpName %38 "a"
OpName %42 "buf0"
OpMemberName %42 0 "_GLF_uniform_int_values"
OpName %44 ""
OpName %49 "b"
OpName %70 "_GLF_color"
OpMemberDecorate %11 0 Offset 0
OpDecorate %11 Block
OpDecorate %29 BuiltIn FragCoord
OpDecorate %41 ArrayStride 16
OpMemberDecorate %42 0 Offset 0
OpDecorate %42 Block
OpDecorate %44 DescriptorSet 0
OpDecorate %44 Binding 0
OpDecorate %70 Location 0
%2 = OpTypeVoid
%3 = OpTypeFunction %2
%6 = OpTypeFloat 32
%7 = OpTypeVector %6 2
%8 = OpTypeMatrix %7 2
%9 = OpTypePointer Function %8
%11 = OpTypeStruct %6
%12 = OpTypePointer PushConstant %11
%13 = OpVariable %12 PushConstant
%14 = OpTypeInt 32 1
%15 = OpConstant %14 0
%16 = OpTypePointer PushConstant %6
%19 = OpConstant %6 1
%20 = OpConstant %6 0
%24 = OpTypePointer Function %7
%27 = OpTypeVector %6 4
%28 = OpTypePointer Input %27
%29 = OpVariable %28 Input
%37 = OpTypePointer Function %14
%39 = OpTypeInt 32 0
%40 = OpConstant %39 3
%41 = OpTypeArray %14 %40
%42 = OpTypeStruct %41
%43 = OpTypePointer Uniform %42
%44 = OpVariable %43 Uniform
%45 = OpConstant %14 1
%46 = OpTypePointer Uniform %14
%52 = OpTypeBool
%69 = OpTypePointer Output %27
%70 = OpVariable %69 Output
%74 = OpConstant %39 0
%75 = OpTypePointer Function %6
%78 = OpConstant %39 1
%86 = OpConstant %14 2
%4 = OpFunction %2 None %3
%5 = OpLabel
%10 = OpVariable %9 Function
%25 = OpVariable %24 Function
%34 = OpVariable %24 Function
%38 = OpVariable %37 Function
%49 = OpVariable %37 Function
%54 = OpVariable %37 Function
%17 = OpAccessChain %16 %13 %15
%18 = OpLoad %6 %17
%21 = OpCompositeConstruct %7 %18 %20
%22 = OpCompositeConstruct %7 %20 %18
%23 = OpCompositeConstruct %8 %21 %22
OpStore %10 %23
%26 = OpLoad %8 %10
%30 = OpLoad %27 %29
%31 = OpVectorShuffle %7 %30 %30 0 1
%32 = OpMatrixTimesVector %7 %26 %31
%33 = OpExtInst %7 %1 RoundEven %32
OpStore %25 %33
%35 = OpLoad %7 %25
%36 = OpExtInst %7 %1 Asinh %35
OpStore %34 %36
%47 = OpAccessChain %46 %44 %15 %45
%48 = OpLoad %14 %47
OpStore %38 %48
%50 = OpLoad %14 %38
%51 = OpConvertSToF %6 %50
%53 = OpIsNan %52 %51
OpSelectionMerge %56 None
OpBranchConditional %53 %55 %59
%55 = OpLabel
%57 = OpAccessChain %46 %44 %15 %45
%58 = OpLoad %14 %57
OpStore %54 %58
OpBranch %56
%59 = OpLabel
%60 = OpAccessChain %46 %44 %15 %15
%61 = OpLoad %14 %60
OpStore %54 %61
OpBranch %56
%56 = OpLabel
%62 = OpLoad %14 %54
OpStore %49 %62
%63 = OpLoad %14 %49
%64 = OpAccessChain %46 %44 %15 %15
%65 = OpLoad %14 %64
%66 = OpIEqual %52 %63 %65
OpSelectionMerge %68 None
OpBranchConditional %66 %67 %85
%67 = OpLabel
%71 = OpAccessChain %46 %44 %15 %45
%72 = OpLoad %14 %71
%73 = OpConvertSToF %6 %72
%76 = OpAccessChain %75 %34 %74
%77 = OpLoad %6 %76
%79 = OpAccessChain %75 %34 %78
%80 = OpLoad %6 %79
%81 = OpAccessChain %46 %44 %15 %45
%82 = OpLoad %14 %81
%83 = OpConvertSToF %6 %82
%84 = OpCompositeConstruct %27 %73 %77 %80 %83
OpStore %70 %84
OpBranch %68
%85 = OpLabel
%87 = OpAccessChain %46 %44 %15 %86
%88 = OpLoad %14 %87
%89 = OpConvertSToF %6 %88
%90 = OpCompositeConstruct %27 %89 %89 %89 %89
OpStore %70 %90
OpBranch %68
%68 = OpLabel
OpReturn
OpFunctionEnd
| 35.293706 | 59 | 0.48722 |
36b3b3d5673bcea322e358266b50455d7d1cd5af | 25,068 | asm | Assembly | examples/F38x/ADCmul/F38x_ADCmul.asm | FSXAC/ELEC291P2 | 06e570e2205cbd0a87f7864da14cae3bd6c60243 | [
"Unlicense"
] | null | null | null | examples/F38x/ADCmul/F38x_ADCmul.asm | FSXAC/ELEC291P2 | 06e570e2205cbd0a87f7864da14cae3bd6c60243 | [
"Unlicense"
] | null | null | null | examples/F38x/ADCmul/F38x_ADCmul.asm | FSXAC/ELEC291P2 | 06e570e2205cbd0a87f7864da14cae3bd6c60243 | [
"Unlicense"
] | 1 | 2018-03-14T03:01:14.000Z | 2018-03-14T03:01:14.000Z | ;--------------------------------------------------------
; File Created by C51
; Version 1.0.0 #1069 (Apr 23 2015) (MSVC)
; This file was generated Wed Mar 01 14:21:45 2017
;--------------------------------------------------------
$name F38x_ADCmul
$optc51 --model-small
$printf_float
R_DSEG segment data
R_CSEG segment code
R_BSEG segment bit
R_XSEG segment xdata
R_PSEG segment xdata
R_ISEG segment idata
R_OSEG segment data overlay
BIT_BANK segment data overlay
R_HOME segment code
R_GSINIT segment code
R_IXSEG segment xdata
R_CONST segment code
R_XINIT segment code
R_DINIT segment code
;--------------------------------------------------------
; Public variables in this module
;--------------------------------------------------------
public _InitPinADC_PARM_2
public _main
public _Volts_at_Pin
public _ADC_at_Pin
public _InitPinADC
public _InitADC
public _waitms
public _Timer3us
public __c51_external_startup
;--------------------------------------------------------
; Special Function Registers
;--------------------------------------------------------
_P0 DATA 0x80
_SP DATA 0x81
_DPL DATA 0x82
_DPH DATA 0x83
_EMI0TC DATA 0x84
_EMI0CF DATA 0x85
_OSCLCN DATA 0x86
_PCON DATA 0x87
_TCON DATA 0x88
_TMOD DATA 0x89
_TL0 DATA 0x8a
_TL1 DATA 0x8b
_TH0 DATA 0x8c
_TH1 DATA 0x8d
_CKCON DATA 0x8e
_PSCTL DATA 0x8f
_P1 DATA 0x90
_TMR3CN DATA 0x91
_TMR4CN DATA 0x91
_TMR3RLL DATA 0x92
_TMR4RLL DATA 0x92
_TMR3RLH DATA 0x93
_TMR4RLH DATA 0x93
_TMR3L DATA 0x94
_TMR4L DATA 0x94
_TMR3H DATA 0x95
_TMR4H DATA 0x95
_USB0ADR DATA 0x96
_USB0DAT DATA 0x97
_SCON DATA 0x98
_SCON0 DATA 0x98
_SBUF DATA 0x99
_SBUF0 DATA 0x99
_CPT1CN DATA 0x9a
_CPT0CN DATA 0x9b
_CPT1MD DATA 0x9c
_CPT0MD DATA 0x9d
_CPT1MX DATA 0x9e
_CPT0MX DATA 0x9f
_P2 DATA 0xa0
_SPI0CFG DATA 0xa1
_SPI0CKR DATA 0xa2
_SPI0DAT DATA 0xa3
_P0MDOUT DATA 0xa4
_P1MDOUT DATA 0xa5
_P2MDOUT DATA 0xa6
_P3MDOUT DATA 0xa7
_IE DATA 0xa8
_CLKSEL DATA 0xa9
_EMI0CN DATA 0xaa
__XPAGE DATA 0xaa
_SBCON1 DATA 0xac
_P4MDOUT DATA 0xae
_PFE0CN DATA 0xaf
_P3 DATA 0xb0
_OSCXCN DATA 0xb1
_OSCICN DATA 0xb2
_OSCICL DATA 0xb3
_SBRLL1 DATA 0xb4
_SBRLH1 DATA 0xb5
_FLSCL DATA 0xb6
_FLKEY DATA 0xb7
_IP DATA 0xb8
_CLKMUL DATA 0xb9
_SMBTC DATA 0xb9
_AMX0N DATA 0xba
_AMX0P DATA 0xbb
_ADC0CF DATA 0xbc
_ADC0L DATA 0xbd
_ADC0H DATA 0xbe
_SFRPAGE DATA 0xbf
_SMB0CN DATA 0xc0
_SMB1CN DATA 0xc0
_SMB0CF DATA 0xc1
_SMB1CF DATA 0xc1
_SMB0DAT DATA 0xc2
_SMB1DAT DATA 0xc2
_ADC0GTL DATA 0xc3
_ADC0GTH DATA 0xc4
_ADC0LTL DATA 0xc5
_ADC0LTH DATA 0xc6
_P4 DATA 0xc7
_TMR2CN DATA 0xc8
_TMR5CN DATA 0xc8
_REG01CN DATA 0xc9
_TMR2RLL DATA 0xca
_TMR5RLL DATA 0xca
_TMR2RLH DATA 0xcb
_TMR5RLH DATA 0xcb
_TMR2L DATA 0xcc
_TMR5L DATA 0xcc
_TMR2H DATA 0xcd
_TMR5H DATA 0xcd
_SMB0ADM DATA 0xce
_SMB1ADM DATA 0xce
_SMB0ADR DATA 0xcf
_SMB1ADR DATA 0xcf
_PSW DATA 0xd0
_REF0CN DATA 0xd1
_SCON1 DATA 0xd2
_SBUF1 DATA 0xd3
_P0SKIP DATA 0xd4
_P1SKIP DATA 0xd5
_P2SKIP DATA 0xd6
_USB0XCN DATA 0xd7
_PCA0CN DATA 0xd8
_PCA0MD DATA 0xd9
_PCA0CPM0 DATA 0xda
_PCA0CPM1 DATA 0xdb
_PCA0CPM2 DATA 0xdc
_PCA0CPM3 DATA 0xdd
_PCA0CPM4 DATA 0xde
_P3SKIP DATA 0xdf
_ACC DATA 0xe0
_XBR0 DATA 0xe1
_XBR1 DATA 0xe2
_XBR2 DATA 0xe3
_IT01CF DATA 0xe4
_CKCON1 DATA 0xe4
_SMOD1 DATA 0xe5
_EIE1 DATA 0xe6
_EIE2 DATA 0xe7
_ADC0CN DATA 0xe8
_PCA0CPL1 DATA 0xe9
_PCA0CPH1 DATA 0xea
_PCA0CPL2 DATA 0xeb
_PCA0CPH2 DATA 0xec
_PCA0CPL3 DATA 0xed
_PCA0CPH3 DATA 0xee
_RSTSRC DATA 0xef
_B DATA 0xf0
_P0MDIN DATA 0xf1
_P1MDIN DATA 0xf2
_P2MDIN DATA 0xf3
_P3MDIN DATA 0xf4
_P4MDIN DATA 0xf5
_EIP1 DATA 0xf6
_EIP2 DATA 0xf7
_SPI0CN DATA 0xf8
_PCA0L DATA 0xf9
_PCA0H DATA 0xfa
_PCA0CPL0 DATA 0xfb
_PCA0CPH0 DATA 0xfc
_PCA0CPL4 DATA 0xfd
_PCA0CPH4 DATA 0xfe
_VDM0CN DATA 0xff
_DPTR DATA 0x8382
_TMR2RL DATA 0xcbca
_TMR3RL DATA 0x9392
_TMR4RL DATA 0x9392
_TMR5RL DATA 0xcbca
_TMR2 DATA 0xcdcc
_TMR3 DATA 0x9594
_TMR4 DATA 0x9594
_TMR5 DATA 0xcdcc
_SBRL1 DATA 0xb5b4
_ADC0 DATA 0xbebd
_ADC0GT DATA 0xc4c3
_ADC0LT DATA 0xc6c5
_PCA0 DATA 0xfaf9
_PCA0CP1 DATA 0xeae9
_PCA0CP2 DATA 0xeceb
_PCA0CP3 DATA 0xeeed
_PCA0CP0 DATA 0xfcfb
_PCA0CP4 DATA 0xfefd
;--------------------------------------------------------
; special function bits
;--------------------------------------------------------
_P0_0 BIT 0x80
_P0_1 BIT 0x81
_P0_2 BIT 0x82
_P0_3 BIT 0x83
_P0_4 BIT 0x84
_P0_5 BIT 0x85
_P0_6 BIT 0x86
_P0_7 BIT 0x87
_TF1 BIT 0x8f
_TR1 BIT 0x8e
_TF0 BIT 0x8d
_TR0 BIT 0x8c
_IE1 BIT 0x8b
_IT1 BIT 0x8a
_IE0 BIT 0x89
_IT0 BIT 0x88
_P1_0 BIT 0x90
_P1_1 BIT 0x91
_P1_2 BIT 0x92
_P1_3 BIT 0x93
_P1_4 BIT 0x94
_P1_5 BIT 0x95
_P1_6 BIT 0x96
_P1_7 BIT 0x97
_S0MODE BIT 0x9f
_SCON0_6 BIT 0x9e
_MCE0 BIT 0x9d
_REN0 BIT 0x9c
_TB80 BIT 0x9b
_RB80 BIT 0x9a
_TI0 BIT 0x99
_RI0 BIT 0x98
_SCON_6 BIT 0x9e
_MCE BIT 0x9d
_REN BIT 0x9c
_TB8 BIT 0x9b
_RB8 BIT 0x9a
_TI BIT 0x99
_RI BIT 0x98
_P2_0 BIT 0xa0
_P2_1 BIT 0xa1
_P2_2 BIT 0xa2
_P2_3 BIT 0xa3
_P2_4 BIT 0xa4
_P2_5 BIT 0xa5
_P2_6 BIT 0xa6
_P2_7 BIT 0xa7
_EA BIT 0xaf
_ESPI0 BIT 0xae
_ET2 BIT 0xad
_ES0 BIT 0xac
_ET1 BIT 0xab
_EX1 BIT 0xaa
_ET0 BIT 0xa9
_EX0 BIT 0xa8
_P3_0 BIT 0xb0
_P3_1 BIT 0xb1
_P3_2 BIT 0xb2
_P3_3 BIT 0xb3
_P3_4 BIT 0xb4
_P3_5 BIT 0xb5
_P3_6 BIT 0xb6
_P3_7 BIT 0xb7
_IP_7 BIT 0xbf
_PSPI0 BIT 0xbe
_PT2 BIT 0xbd
_PS0 BIT 0xbc
_PT1 BIT 0xbb
_PX1 BIT 0xba
_PT0 BIT 0xb9
_PX0 BIT 0xb8
_MASTER0 BIT 0xc7
_TXMODE0 BIT 0xc6
_STA0 BIT 0xc5
_STO0 BIT 0xc4
_ACKRQ0 BIT 0xc3
_ARBLOST0 BIT 0xc2
_ACK0 BIT 0xc1
_SI0 BIT 0xc0
_MASTER1 BIT 0xc7
_TXMODE1 BIT 0xc6
_STA1 BIT 0xc5
_STO1 BIT 0xc4
_ACKRQ1 BIT 0xc3
_ARBLOST1 BIT 0xc2
_ACK1 BIT 0xc1
_SI1 BIT 0xc0
_TF2 BIT 0xcf
_TF2H BIT 0xcf
_TF2L BIT 0xce
_TF2LEN BIT 0xcd
_TF2CEN BIT 0xcc
_T2SPLIT BIT 0xcb
_TR2 BIT 0xca
_T2CSS BIT 0xc9
_T2XCLK BIT 0xc8
_TF5H BIT 0xcf
_TF5L BIT 0xce
_TF5LEN BIT 0xcd
_TMR5CN_4 BIT 0xcc
_T5SPLIT BIT 0xcb
_TR5 BIT 0xca
_TMR5CN_1 BIT 0xc9
_T5XCLK BIT 0xc8
_CY BIT 0xd7
_AC BIT 0xd6
_F0 BIT 0xd5
_RS1 BIT 0xd4
_RS0 BIT 0xd3
_OV BIT 0xd2
_F1 BIT 0xd1
_PARITY BIT 0xd0
_CF BIT 0xdf
_CR BIT 0xde
_PCA0CN_5 BIT 0xde
_CCF4 BIT 0xdc
_CCF3 BIT 0xdb
_CCF2 BIT 0xda
_CCF1 BIT 0xd9
_CCF0 BIT 0xd8
_ACC_7 BIT 0xe7
_ACC_6 BIT 0xe6
_ACC_5 BIT 0xe5
_ACC_4 BIT 0xe4
_ACC_3 BIT 0xe3
_ACC_2 BIT 0xe2
_ACC_1 BIT 0xe1
_ACC_0 BIT 0xe0
_AD0EN BIT 0xef
_AD0TM BIT 0xee
_AD0INT BIT 0xed
_AD0BUSY BIT 0xec
_AD0WINT BIT 0xeb
_AD0CM2 BIT 0xea
_AD0CM1 BIT 0xe9
_AD0CM0 BIT 0xe8
_B_7 BIT 0xf7
_B_6 BIT 0xf6
_B_5 BIT 0xf5
_B_4 BIT 0xf4
_B_3 BIT 0xf3
_B_2 BIT 0xf2
_B_1 BIT 0xf1
_B_0 BIT 0xf0
_SPIF BIT 0xff
_WCOL BIT 0xfe
_MODF BIT 0xfd
_RXOVRN BIT 0xfc
_NSSMD1 BIT 0xfb
_NSSMD0 BIT 0xfa
_TXBMT BIT 0xf9
_SPIEN BIT 0xf8
;--------------------------------------------------------
; overlayable register banks
;--------------------------------------------------------
rbank0 segment data overlay
;--------------------------------------------------------
; internal ram data
;--------------------------------------------------------
rseg R_DSEG
_main_V_1_60:
ds 16
;--------------------------------------------------------
; overlayable items in internal ram
;--------------------------------------------------------
rseg R_OSEG
rseg R_OSEG
_InitPinADC_PARM_2:
ds 1
rseg R_OSEG
;--------------------------------------------------------
; indirectly addressable internal ram data
;--------------------------------------------------------
rseg R_ISEG
;--------------------------------------------------------
; absolute internal ram data
;--------------------------------------------------------
DSEG
;--------------------------------------------------------
; bit data
;--------------------------------------------------------
rseg R_BSEG
;--------------------------------------------------------
; paged external ram data
;--------------------------------------------------------
rseg R_PSEG
;--------------------------------------------------------
; external ram data
;--------------------------------------------------------
rseg R_XSEG
;--------------------------------------------------------
; absolute external ram data
;--------------------------------------------------------
XSEG
;--------------------------------------------------------
; external initialized ram data
;--------------------------------------------------------
rseg R_IXSEG
rseg R_HOME
rseg R_GSINIT
rseg R_CSEG
;--------------------------------------------------------
; Reset entry point and interrupt vectors
;--------------------------------------------------------
CSEG at 0x0000
ljmp _crt0
;--------------------------------------------------------
; global & static initialisations
;--------------------------------------------------------
rseg R_HOME
rseg R_GSINIT
rseg R_GSINIT
;--------------------------------------------------------
; data variables initialization
;--------------------------------------------------------
rseg R_DINIT
; The linker places a 'ret' at the end of segment R_DINIT.
;--------------------------------------------------------
; code
;--------------------------------------------------------
rseg R_CSEG
;------------------------------------------------------------
;Allocation info for local variables in function '_c51_external_startup'
;------------------------------------------------------------
;------------------------------------------------------------
; F38x_ADCmul.c:19: char _c51_external_startup (void)
; -----------------------------------------
; function _c51_external_startup
; -----------------------------------------
__c51_external_startup:
using 0
; F38x_ADCmul.c:21: PCA0MD&=(~0x40) ; // DISABLE WDT: clear Watchdog Enable bit
anl _PCA0MD,#0xBF
; F38x_ADCmul.c:22: VDM0CN=0x80; // enable VDD monitor
mov _VDM0CN,#0x80
; F38x_ADCmul.c:23: RSTSRC=0x02|0x04; // Enable reset on missing clock detector and VDD
mov _RSTSRC,#0x06
; F38x_ADCmul.c:31: CLKSEL|=0b_0000_0011; // SYSCLK derived from the Internal High-Frequency Oscillator / 1.
orl _CLKSEL,#0x03
; F38x_ADCmul.c:35: OSCICN |= 0x03; // Configure internal oscillator for its maximum frequency
orl _OSCICN,#0x03
; F38x_ADCmul.c:38: SCON0 = 0x10;
mov _SCON0,#0x10
; F38x_ADCmul.c:40: TH1 = 0x10000-((SYSCLK/BAUDRATE)/2L);
mov _TH1,#0x30
; F38x_ADCmul.c:41: CKCON &= ~0x0B; // T1M = 1; SCA1:0 = xx
anl _CKCON,#0xF4
; F38x_ADCmul.c:42: CKCON |= 0x08;
orl _CKCON,#0x08
; F38x_ADCmul.c:55: TL1 = TH1; // Init Timer1
mov _TL1,_TH1
; F38x_ADCmul.c:56: TMOD &= ~0xf0; // TMOD: timer 1 in 8-bit autoreload
anl _TMOD,#0x0F
; F38x_ADCmul.c:57: TMOD |= 0x20;
orl _TMOD,#0x20
; F38x_ADCmul.c:58: TR1 = 1; // START Timer1
setb _TR1
; F38x_ADCmul.c:59: TI = 1; // Indicate TX0 ready
setb _TI
; F38x_ADCmul.c:62: P0MDOUT |= 0x01; // set P0.0 and P0.4 as push-pull outputs
orl _P0MDOUT,#0x01
; F38x_ADCmul.c:63: XBR0 = 0x01; // Enable UART0 on P0.4(TX0) and P0.5(RX0)
mov _XBR0,#0x01
; F38x_ADCmul.c:64: XBR1 = 0x40; // enable crossbar
mov _XBR1,#0x40
; F38x_ADCmul.c:66: return 0;
mov dpl,#0x00
ret
;------------------------------------------------------------
;Allocation info for local variables in function 'Timer3us'
;------------------------------------------------------------
;us Allocated to registers r2
;i Allocated to registers r3
;------------------------------------------------------------
; F38x_ADCmul.c:70: void Timer3us(unsigned char us)
; -----------------------------------------
; function Timer3us
; -----------------------------------------
_Timer3us:
mov r2,dpl
; F38x_ADCmul.c:75: CKCON|=0b_0100_0000;
orl _CKCON,#0x40
; F38x_ADCmul.c:77: TMR3RL = (-(SYSCLK)/1000000L); // Set Timer3 to overflow in 1us.
mov _TMR3RL,#0xD0
mov (_TMR3RL >> 8),#0xFF
; F38x_ADCmul.c:78: TMR3 = TMR3RL; // Initialize Timer3 for first overflow
mov _TMR3,_TMR3RL
mov (_TMR3 >> 8),(_TMR3RL >> 8)
; F38x_ADCmul.c:80: TMR3CN = 0x04; // Sart Timer3 and clear overflow flag
mov _TMR3CN,#0x04
; F38x_ADCmul.c:81: for (i = 0; i < us; i++) // Count <us> overflows
mov r3,#0x00
L003004?:
clr c
mov a,r3
subb a,r2
jnc L003007?
; F38x_ADCmul.c:83: while (!(TMR3CN & 0x80)); // Wait for overflow
L003001?:
mov a,_TMR3CN
jnb acc.7,L003001?
; F38x_ADCmul.c:84: TMR3CN &= ~(0x80); // Clear overflow indicator
anl _TMR3CN,#0x7F
; F38x_ADCmul.c:81: for (i = 0; i < us; i++) // Count <us> overflows
inc r3
sjmp L003004?
L003007?:
; F38x_ADCmul.c:86: TMR3CN = 0 ; // Stop Timer3 and clear overflow flag
mov _TMR3CN,#0x00
ret
;------------------------------------------------------------
;Allocation info for local variables in function 'waitms'
;------------------------------------------------------------
;ms Allocated to registers r2 r3
;j Allocated to registers r2 r3
;------------------------------------------------------------
; F38x_ADCmul.c:89: void waitms (unsigned int ms)
; -----------------------------------------
; function waitms
; -----------------------------------------
_waitms:
mov r2,dpl
mov r3,dph
; F38x_ADCmul.c:92: for(j=ms; j!=0; j--)
L004001?:
cjne r2,#0x00,L004010?
cjne r3,#0x00,L004010?
ret
L004010?:
; F38x_ADCmul.c:94: Timer3us(249);
mov dpl,#0xF9
push ar2
push ar3
lcall _Timer3us
; F38x_ADCmul.c:95: Timer3us(249);
mov dpl,#0xF9
lcall _Timer3us
; F38x_ADCmul.c:96: Timer3us(249);
mov dpl,#0xF9
lcall _Timer3us
; F38x_ADCmul.c:97: Timer3us(250);
mov dpl,#0xFA
lcall _Timer3us
pop ar3
pop ar2
; F38x_ADCmul.c:92: for(j=ms; j!=0; j--)
dec r2
cjne r2,#0xff,L004011?
dec r3
L004011?:
sjmp L004001?
;------------------------------------------------------------
;Allocation info for local variables in function 'InitADC'
;------------------------------------------------------------
;------------------------------------------------------------
; F38x_ADCmul.c:101: void InitADC (void)
; -----------------------------------------
; function InitADC
; -----------------------------------------
_InitADC:
; F38x_ADCmul.c:104: ADC0CF = 0xF8; // SAR clock = 31, Right-justified result
mov _ADC0CF,#0xF8
; F38x_ADCmul.c:105: ADC0CN = 0b_1000_0000; // AD0EN=1, AD0TM=0
mov _ADC0CN,#0x80
; F38x_ADCmul.c:106: REF0CN = 0b_0000_1000; //Select VDD as the voltage reference for the converter
mov _REF0CN,#0x08
ret
;------------------------------------------------------------
;Allocation info for local variables in function 'InitPinADC'
;------------------------------------------------------------
;pinno Allocated with name '_InitPinADC_PARM_2'
;portno Allocated to registers r2
;mask Allocated to registers r3
;------------------------------------------------------------
; F38x_ADCmul.c:109: void InitPinADC (unsigned char portno, unsigned char pinno)
; -----------------------------------------
; function InitPinADC
; -----------------------------------------
_InitPinADC:
mov r2,dpl
; F38x_ADCmul.c:113: mask=1<<pinno;
mov b,_InitPinADC_PARM_2
inc b
mov a,#0x01
sjmp L006012?
L006010?:
add a,acc
L006012?:
djnz b,L006010?
mov r3,a
; F38x_ADCmul.c:115: switch (portno)
mov a,r2
add a,#0xff - 0x03
jc L006007?
mov a,r2
add a,r2
add a,r2
mov dptr,#L006014?
jmp @a+dptr
L006014?:
ljmp L006001?
ljmp L006002?
ljmp L006003?
ljmp L006004?
; F38x_ADCmul.c:117: case 0:
L006001?:
; F38x_ADCmul.c:118: P0MDIN &= (~mask); // Set pin as analog input
mov a,r3
cpl a
anl _P0MDIN,a
; F38x_ADCmul.c:119: P0SKIP |= mask; // Skip Crossbar decoding for this pin
mov a,r3
orl _P0SKIP,a
; F38x_ADCmul.c:120: break;
; F38x_ADCmul.c:121: case 1:
ret
L006002?:
; F38x_ADCmul.c:122: P1MDIN &= (~mask); // Set pin as analog input
mov a,r3
cpl a
anl _P1MDIN,a
; F38x_ADCmul.c:123: P1SKIP |= mask; // Skip Crossbar decoding for this pin
mov a,r3
orl _P1SKIP,a
; F38x_ADCmul.c:124: break;
; F38x_ADCmul.c:125: case 2:
ret
L006003?:
; F38x_ADCmul.c:126: P2MDIN &= (~mask); // Set pin as analog input
mov a,r3
cpl a
anl _P2MDIN,a
; F38x_ADCmul.c:127: P2SKIP |= mask; // Skip Crossbar decoding for this pin
mov a,r3
orl _P2SKIP,a
; F38x_ADCmul.c:128: break;
; F38x_ADCmul.c:129: case 3:
ret
L006004?:
; F38x_ADCmul.c:130: P3MDIN &= (~mask); // Set pin as analog input
mov a,r3
cpl a
mov r2,a
anl _P3MDIN,a
; F38x_ADCmul.c:131: P3SKIP |= mask; // Skip Crossbar decoding for this pin
mov a,r3
orl _P3SKIP,a
; F38x_ADCmul.c:135: }
L006007?:
ret
;------------------------------------------------------------
;Allocation info for local variables in function 'ADC_at_Pin'
;------------------------------------------------------------
;pin Allocated to registers
;------------------------------------------------------------
; F38x_ADCmul.c:138: unsigned int ADC_at_Pin(unsigned char pin)
; -----------------------------------------
; function ADC_at_Pin
; -----------------------------------------
_ADC_at_Pin:
mov _AMX0P,dpl
; F38x_ADCmul.c:141: AMX0N = LQFP32_MUX_GND; // GND is negative input (Single-ended Mode)
mov _AMX0N,#0x1F
; F38x_ADCmul.c:143: AD0BUSY=1;
setb _AD0BUSY
; F38x_ADCmul.c:144: while (AD0BUSY); // Wait for dummy conversion to finish
L007001?:
jb _AD0BUSY,L007001?
; F38x_ADCmul.c:146: AD0BUSY = 1;
setb _AD0BUSY
; F38x_ADCmul.c:147: while (AD0BUSY); // Wait for conversion to complete
L007004?:
jb _AD0BUSY,L007004?
; F38x_ADCmul.c:148: return (ADC0L+(ADC0H*0x100));
mov r2,_ADC0L
mov r3,#0x00
mov r5,_ADC0H
mov r4,#0x00
mov a,r4
add a,r2
mov dpl,a
mov a,r5
addc a,r3
mov dph,a
ret
;------------------------------------------------------------
;Allocation info for local variables in function 'Volts_at_Pin'
;------------------------------------------------------------
;pin Allocated to registers r2
;------------------------------------------------------------
; F38x_ADCmul.c:151: float Volts_at_Pin(unsigned char pin)
; -----------------------------------------
; function Volts_at_Pin
; -----------------------------------------
_Volts_at_Pin:
; F38x_ADCmul.c:153: return ((ADC_at_Pin(pin)*3.30)/1024.0);
lcall _ADC_at_Pin
lcall ___uint2fs
mov r2,dpl
mov r3,dph
mov r4,b
mov r5,a
push ar2
push ar3
push ar4
push ar5
mov dptr,#0x3333
mov b,#0x53
mov a,#0x40
lcall ___fsmul
mov r2,dpl
mov r3,dph
mov r4,b
mov r5,a
mov a,sp
add a,#0xfc
mov sp,a
clr a
push acc
push acc
mov a,#0x80
push acc
mov a,#0x44
push acc
mov dpl,r2
mov dph,r3
mov b,r4
mov a,r5
lcall ___fsdiv
mov r2,dpl
mov r3,dph
mov r4,b
mov r5,a
mov a,sp
add a,#0xfc
mov sp,a
mov dpl,r2
mov dph,r3
mov b,r4
mov a,r5
ret
;------------------------------------------------------------
;Allocation info for local variables in function 'main'
;------------------------------------------------------------
;V Allocated with name '_main_V_1_60'
;------------------------------------------------------------
; F38x_ADCmul.c:156: void main (void)
; -----------------------------------------
; function main
; -----------------------------------------
_main:
; F38x_ADCmul.c:160: printf("\x1b[2J"); // Clear screen using ANSI escape sequence.
mov a,#__str_0
push acc
mov a,#(__str_0 >> 8)
push acc
mov a,#0x80
push acc
lcall _printf
dec sp
dec sp
dec sp
; F38x_ADCmul.c:161: printf("\r\nUsing ADC with arbitrary pins.\r\n");
mov a,#__str_1
push acc
mov a,#(__str_1 >> 8)
push acc
mov a,#0x80
push acc
lcall _printf
dec sp
dec sp
dec sp
; F38x_ADCmul.c:164: InitPinADC(2, 0); // Configure P2.0 as analog input
mov _InitPinADC_PARM_2,#0x00
mov dpl,#0x02
lcall _InitPinADC
; F38x_ADCmul.c:165: InitPinADC(2, 1); // Configure P2.1 as analog input
mov _InitPinADC_PARM_2,#0x01
mov dpl,#0x02
lcall _InitPinADC
; F38x_ADCmul.c:166: InitPinADC(2, 2); // Configure P2.2 as analog input
mov _InitPinADC_PARM_2,#0x02
mov dpl,#0x02
lcall _InitPinADC
; F38x_ADCmul.c:167: InitPinADC(2, 3); // Configure P2.3 as analog input
mov _InitPinADC_PARM_2,#0x03
mov dpl,#0x02
lcall _InitPinADC
; F38x_ADCmul.c:169: InitADC();
lcall _InitADC
; F38x_ADCmul.c:171: while(1)
L009002?:
; F38x_ADCmul.c:173: V[0]=Volts_at_Pin(LQFP32_MUX_P2_0);
mov dpl,#0x08
lcall _Volts_at_Pin
mov r2,dpl
mov r3,dph
mov r4,b
mov r5,a
mov _main_V_1_60,r2
mov (_main_V_1_60 + 1),r3
mov (_main_V_1_60 + 2),r4
mov (_main_V_1_60 + 3),r5
; F38x_ADCmul.c:174: V[1]=Volts_at_Pin(LQFP32_MUX_P2_1);
mov dpl,#0x09
lcall _Volts_at_Pin
mov r2,dpl
mov r3,dph
mov r4,b
mov r5,a
mov (_main_V_1_60 + 0x0004),r2
mov ((_main_V_1_60 + 0x0004) + 1),r3
mov ((_main_V_1_60 + 0x0004) + 2),r4
mov ((_main_V_1_60 + 0x0004) + 3),r5
; F38x_ADCmul.c:175: V[2]=Volts_at_Pin(LQFP32_MUX_P2_2);
mov dpl,#0x0A
lcall _Volts_at_Pin
mov r2,dpl
mov r3,dph
mov r4,b
mov r5,a
mov (_main_V_1_60 + 0x0008),r2
mov ((_main_V_1_60 + 0x0008) + 1),r3
mov ((_main_V_1_60 + 0x0008) + 2),r4
mov ((_main_V_1_60 + 0x0008) + 3),r5
; F38x_ADCmul.c:176: V[3]=Volts_at_Pin(LQFP32_MUX_P2_3);
mov dpl,#0x0B
lcall _Volts_at_Pin
mov r2,dpl
mov r3,dph
mov r4,b
mov r5,a
mov (_main_V_1_60 + 0x000c),r2
mov ((_main_V_1_60 + 0x000c) + 1),r3
mov ((_main_V_1_60 + 0x000c) + 2),r4
mov ((_main_V_1_60 + 0x000c) + 3),r5
; F38x_ADCmul.c:178: V[0], V[1], V[2], V[3]);
; F38x_ADCmul.c:177: printf("V(P2.0)=%5.3f, V(P2.1)=%5.3f, V(P2.2)=%5.3f, V(P2.3)=%5.3f\r",
push (_main_V_1_60 + 0x000c)
push ((_main_V_1_60 + 0x000c) + 1)
push ((_main_V_1_60 + 0x000c) + 2)
push ((_main_V_1_60 + 0x000c) + 3)
push (_main_V_1_60 + 0x0008)
push ((_main_V_1_60 + 0x0008) + 1)
push ((_main_V_1_60 + 0x0008) + 2)
push ((_main_V_1_60 + 0x0008) + 3)
push (_main_V_1_60 + 0x0004)
push ((_main_V_1_60 + 0x0004) + 1)
push ((_main_V_1_60 + 0x0004) + 2)
push ((_main_V_1_60 + 0x0004) + 3)
push _main_V_1_60
push (_main_V_1_60 + 1)
push (_main_V_1_60 + 2)
push (_main_V_1_60 + 3)
mov a,#__str_2
push acc
mov a,#(__str_2 >> 8)
push acc
mov a,#0x80
push acc
lcall _printf
mov a,sp
add a,#0xed
mov sp,a
; F38x_ADCmul.c:179: waitms(500);
mov dptr,#0x01F4
lcall _waitms
ljmp L009002?
rseg R_CSEG
rseg R_XINIT
rseg R_CONST
__str_0:
db 0x1B
db '[2J'
db 0x00
__str_1:
db 0x0D
db 0x0A
db 'Using ADC with arbitrary pins.'
db 0x0D
db 0x0A
db 0x00
__str_2:
db 'V(P2.0)=%5.3f, V(P2.1)=%5.3f, V(P2.2)=%5.3f, V(P2.3)=%5.3f'
db 0x0D
db 0x00
CSEG
end
| 27.853333 | 108 | 0.522778 |
b4c40d4dfe610c9f156bbe6e145de55c1ab4d5ec | 1,059 | asm | Assembly | libc/src/win32/unistd/x86_64/syscall.asm | MobSlicer152/shardc2 | e9ffa9e565c8b4d9ac69e75160265c4b5bb6ff9f | [
"ECL-2.0",
"Apache-2.0"
] | 3 | 2021-09-15T22:46:13.000Z | 2021-12-07T17:04:14.000Z | libc/src/win32/unistd/x86_64/syscall.asm | MobSlicer152/shardc2 | e9ffa9e565c8b4d9ac69e75160265c4b5bb6ff9f | [
"ECL-2.0",
"Apache-2.0"
] | 1 | 2021-12-07T17:05:17.000Z | 2021-12-08T15:49:31.000Z | libc/src/win32/unistd/x86_64/syscall.asm | MobSlicer152/shardc2 | e9ffa9e565c8b4d9ac69e75160265c4b5bb6ff9f | [
"ECL-2.0",
"Apache-2.0"
] | null | null | null | ; Windows NT system call wrapper
;
; Copyright 2022 MobSlicer152
;
; Licensed under the Apache License, Version 2.0 (the "License");
; you may not use this file except in compliance with the License.
; You may obtain a copy of the License at
;
; http://www.apache.org/licenses/LICENSE-2.0
;
; Unless required by applicable law or agreed to in writing, software
; distributed under the License is distributed on an "AS IS" BASIS,
; WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
; See the License for the specific language governing permissions and
; limitations under the License.
OPTION PROLOGUE:NONE
.code
__syscall PROC
push rbp
mov rbp, rsp
; Shift parameters up
mov eax, ecx
mov r10, rdx ; the syscall instruction clobbers RCX, so it goes in R10
mov rdx, r8
mov r8, r9
mov r9, QWORD PTR [rsp + 16]
mov rcx, QWORD PTR [rsp + 24]
mov QWORD PTR [rsp + 16], rcx
mov rcx, QWORD PTR [rsp + 32]
mov QWORD PTR [rsp + 24], rcx
; Do the syscall
syscall
leave
ret
__syscall ENDP
PUBLIC __syscall
END
| 23.021739 | 75 | 0.72238 |
98075157f6eb752f6825f4e669313fe1cd2359f9 | 3,250 | asm | Assembly | programs/oeis/017/A017268.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/017/A017268.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/017/A017268.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A017268: a(n) = (9*n + 8)^12.
; 68719476736,582622237229761,95428956661682176,3379220508056640625,52654090776777588736,491258904256726154641,3226266762397899821056,16409682740640811134241,68719476736000000000000,246990403565262140303521,784716723734800033386496,2252191588960823337718801,5936027041831326482169856,14551915228366851806640625,33516416633376182864121856,73119371471655725294164801,152097843090208773684330496,303326610665644763629211521,582622237229761000000000000,1082022699327332498100696241,1949369609479181830042157056,3416604542324232545384738641,5839916592521948960554356736,9755769237612933691650390625,15957917665472413585874354176,25601832525455335435322705761,40344505040107975043939700736,62529457064557415999535378001,95428956661682176000000000000,143557987030641165766449098161,213077479576736094126128828416,312307749504346137016129649281,452377017219528840630098722816,648034417553121620683837890625,918662051842949959948040605696,1289526489840334121941717217521,1793316748073189235032143691776,2472023231929042220921962513681,3379220508056640625000000000000,4582826154117173651132848229281,6168418401625692825349129240576,8243206936713178643875538610721,10940764150271046150530924548096,14426638435467322602890869140625,18904986924730564508992631996416,24626382453131088146385741940081,31896968649395808729270202863616,41089158014054007099883470298561,52654090776777588736000000000000,67136097368206902852275559609601,85189434637938383810027924033536,107597595648665281034526000582961,135295525131890643183257125912576,169395107664901855540781494140625,211214333490219270978877298446336,262310587822735519273195371913441,324518553658426726783156020576256,399993265701109317068886081212641,491258904256726154641000000000000,601263973011921357734061827559121,733443563726545202295271950647296,891789474247188754533370855326001,1080929014117615599540292857696256,1306213404656667768955230712890625,1573816757937541579976988694675456,1890846701885093112349176364977601,2265467806969183947061026584989696,2707039063979597279155099296535921,3226266762397899821056000000000000,3835374225218664055388955943197841,4548289969010412484014287235321856,5380855977848196027347155641399841,6351057906806684781258041391579136,7479279165296095000367519775390625,8788580972983652729081039184203776,10305010631710575732489979653772561,12057940416038372864241080977063936,14080439653198038396506364992348401,16409682740640811134241000000000000,19087396036478990989280159788445761,22160346755249474672292601545097216,25680877209031137054684866464164481,29707487952410364834653650652041216,34305473619537968466244336181640625,39547615482987120994331486423351296,45514935017748537945243970657738321,52297513019939470846375927698558976,59995379109122034297528468395530081,68719476736000000000000000000000000,78592709124178964457980026660022881,89751071896131775659507344259813376,102344878470020020431744079883779921,116540084666105783194117534432362496,132519719329680300969627773681640625,150485428162284164130255736625238016,170659138355056181006389366115114881,193284852037896134214678570720034816,218630576996344103142807794339760961,246990403565262140303521000000000000,278686737085161968389340529173449201
mul $0,9
add $0,8
pow $0,12
| 464.285714 | 3,188 | 0.959077 |
34aaff14c6f039e9705ce255d76d66677b500fa6 | 2,793 | asm | Assembly | examples/jvm/Test.asm | hfutxqd/fasmg | 3d723e3b3c5f50716873f6f6a2d522c89592d723 | [
"BSD-3-Clause"
] | 2 | 2019-12-05T02:28:51.000Z | 2022-01-21T05:31:59.000Z | external/fasmg/examples/jvm/Test.asm | hpdporg/hpdp | 1ef4c2718cf920223d5cc566eb72c136b2706c48 | [
"BSD-3-Clause"
] | null | null | null | external/fasmg/examples/jvm/Test.asm | hpdporg/hpdp | 1ef4c2718cf920223d5cc566eb72c136b2706c48 | [
"BSD-3-Clause"
] | null | null | null |
; This example uses a very simple set of macroinstructions to generate
; the basic structures of JVM class file.
; Please refer to "The Java Virtual Machine Specification" for the detailed
; information on this file format.
include 'jclass.inc'
format binary as 'class'
u4 0xcafebabe ; magic
u2 0,49 ; minor and major version
constant_pool
_Code constant_utf8 'Code'
_init constant_utf8 '<init>'
_main constant_utf8 'main'
_void_arrstr constant_utf8 '([Ljava/lang/String;)V'
Test_class constant_class _Test
_Test constant_utf8 'Test'
Object_init constant_methodref Object_class,init_method
Object_class constant_class _Object
_Object constant_utf8 'java/lang/Object'
init_method constant_nameandtype _init,_void
_void constant_utf8 '()V'
System.out constant_fieldref System_class,out_field
System_class constant_class _System
_System constant_utf8 'java/lang/System'
out_field constant_nameandtype _out,PrintStream_type
_out constant_utf8 'out'
PrintStream_type constant_utf8 'Ljava/io/PrintStream;'
PrintStream_println constant_methodref PrintStream_class,println_method
PrintStream_class constant_class _PrintStream
_PrintStream constant_utf8 'java/io/PrintStream'
println_method constant_nameandtype _println,_void_str
_println constant_utf8 'println'
_void_str constant_utf8 '(Ljava/lang/String;)V'
Integer_toString constant_methodref Integer_class,toString_method
Integer_class constant_class _Integer
_Integer constant_utf8 'java/lang/Integer'
toString_method constant_nameandtype _toString,_str_int
_toString constant_utf8 'toString'
_str_int constant_utf8 '(I)Ljava/lang/String;'
number constant_integer 17
end constant_pool
u2 ACC_PUBLIC+ACC_SUPER ; access flags
u2 Test_class ; this class
u2 Object_class ; super class
interfaces
end interfaces
fields
end fields
methods
method_info ACC_PUBLIC, _init, _void ; public void Test()
attribute _Code
u2 1 ; max_stack
u2 1 ; max_locals
bytecode
aload 0
invokespecial Object_init
return
end bytecode
exceptions
end exceptions
attributes
end attributes
end attribute
end method_info
method_info ACC_PUBLIC+ACC_STATIC, _main, _void_arrstr ; public static void main(String[] args)
attribute _Code
u2 3 ; max_stack
u2 2 ; max_locals
bytecode
ldc number
istore 1
example_loop:
iload 1
dup
imul
invokestatic Integer_toString
getstatic System.out
swap
invokevirtual PrintStream_println
iinc 1,-1
iload 1
ifne example_loop
return
end bytecode
exceptions
end exceptions
attributes
end attributes
end attribute
end method_info
end methods
attributes
end attributes
| 20.688889 | 101 | 0.761905 |
0da5cdf87bb9606ff852b6e0594d87bb1970283b | 550 | asm | Assembly | oeis/017/A017272.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/017/A017272.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/017/A017272.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A017272: a(n) = (10*n)^4.
; 0,10000,160000,810000,2560000,6250000,12960000,24010000,40960000,65610000,100000000,146410000,207360000,285610000,384160000,506250000,655360000,835210000,1049760000,1303210000,1600000000,1944810000,2342560000,2798410000,3317760000,3906250000,4569760000,5314410000,6146560000,7072810000,8100000000,9235210000,10485760000,11859210000,13363360000,15006250000,16796160000,18741610000,20851360000,23134410000,25600000000,28257610000,31116960000,34188010000,37480960000,41006250000,44774560000,48796810000
mul $0,10
pow $0,4
| 91.666667 | 501 | 0.865455 |
82bbf896be5676f45653833a11b13a49d84bbf09 | 1,274 | asm | Assembly | maps/ViridianMart.asm | Dev727/ancientplatinum | 8b212a1728cc32a95743e1538b9eaa0827d013a7 | [
"blessing"
] | 28 | 2019-11-08T07:19:00.000Z | 2021-12-20T10:17:54.000Z | maps/ViridianMart.asm | Dev727/ancientplatinum | 8b212a1728cc32a95743e1538b9eaa0827d013a7 | [
"blessing"
] | 13 | 2020-01-11T17:00:40.000Z | 2021-09-14T01:27:38.000Z | maps/ViridianMart.asm | Dev727/ancientplatinum | 8b212a1728cc32a95743e1538b9eaa0827d013a7 | [
"blessing"
] | 22 | 2020-05-28T17:31:38.000Z | 2022-03-07T20:49:35.000Z | object_const_def ; object_event constants
const VIRIDIANMART_CLERK
const VIRIDIANMART_LASS
const VIRIDIANMART_COOLTRAINER_M
ViridianMart_MapScripts:
db 0 ; scene scripts
db 0 ; callbacks
ViridianMartClerkScript:
opentext
pokemart MARTTYPE_STANDARD, MART_VIRIDIAN
closetext
end
ViridianMartLassScript:
jumptextfaceplayer ViridianMartLassText
ViridianMartCooltrainerMScript:
jumptextfaceplayer ViridianMartCooltrainerMText
ViridianMartLassText:
text "The GYM LEADER"
line "here is totally"
cont "cool."
done
ViridianMartCooltrainerMText:
text "Have you been to"
line "CINNABAR?"
para "It's an island way"
line "south of here."
done
ViridianMart_MapEvents:
db 0, 0 ; filler
db 2 ; warp events
warp_event 2, 7, VIRIDIAN_CITY, 4
warp_event 3, 7, VIRIDIAN_CITY, 4
db 0 ; coord events
db 0 ; bg events
db 3 ; object events
object_event 1, 3, SPRITE_CLERK, SPRITEMOVEDATA_STANDING_RIGHT, 0, 0, -1, -1, 0, OBJECTTYPE_SCRIPT, 0, ViridianMartClerkScript, -1
object_event 7, 2, SPRITE_LASS, SPRITEMOVEDATA_WALK_LEFT_RIGHT, 2, 0, -1, -1, 0, OBJECTTYPE_SCRIPT, 0, ViridianMartLassScript, -1
object_event 1, 6, SPRITE_COOLTRAINER_M, SPRITEMOVEDATA_STANDING_UP, 0, 0, -1, -1, 0, OBJECTTYPE_SCRIPT, 0, ViridianMartCooltrainerMScript, -1
| 24.5 | 145 | 0.779435 |
702e9dba27f569ec28830d2ceaf5778ad5462006 | 456 | asm | Assembly | oeis/121/A121353.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/121/A121353.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/121/A121353.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A121353: a(n) = (3*n - 2)*a(n-1) - a(n-2) starting a(0)=0, a(1)=1.
; Submitted by Christian Krause
; 0,1,4,27,266,3431,54630,1034539,22705228,566596161,15841987280,490535009519,16662348336366,616016353436023,24623991789104554,1058215630578059799,48653295014801646200,2382953240094702604001,123864915189909733761852,6810187382204940654297859
mov $3,1
lpb $0
mul $1,$0
sub $0,1
mul $1,3
sub $3,$2
add $3,$1
add $2,$3
mov $1,$2
lpe
mov $0,$1
| 28.5 | 241 | 0.723684 |
37d90855e557a6a40f34d4f06ff3f42e4323cca6 | 927 | asm | Assembly | qxl/qxl.port.asm | olifink/smsqe | c546d882b26566a46d71820d1539bed9ea8af108 | [
"BSD-2-Clause"
] | null | null | null | qxl/qxl.port.asm | olifink/smsqe | c546d882b26566a46d71820d1539bed9ea8af108 | [
"BSD-2-Clause"
] | null | null | null | qxl/qxl.port.asm | olifink/smsqe | c546d882b26566a46d71820d1539bed9ea8af108 | [
"BSD-2-Clause"
] | null | null | null | ; QXL_PORT.ASM LPT and COM port redirection
; called with port number - 1 in ah (+$80 for COM)
; calls port specific routine with port index ((number-1)*2) in bx and mode in al or count in ax
qxl_port_open:
xor bx,bx
mov bl,ah
lodsw
add bl,bl ; lpt / com
jc qxl_comp_open ; ... open com
jmp qxl_lptp_open
qxl_port_close:
xor bx,bx
mov bl,ah
lodsw
add bl,bl ; lpt / com
jc qxl_comp_close ; ... close com
jmp qxl_lptp_close
qxl_port_set:
xor bx,bx
mov bl,ah
lodsw
xchg al,ah ; baud rate counter
add bl,bl ; lpt / com
jc qxl_comp_set ; ... set baud rate
jmp qxl_rxm_loop
qxl_port_tx:
; push ax
; push si
; push di
; sub si, 2
; mov di, si
; call deb_cnt_buff
; pop di
; pop si
; pop ax
xor bx,bx
mov bl,ah
lodsw
xchg al,ah ; number of bytes to send
add bl,bl ; lpt / com
jc qxl_comp_tx ; ... send data
jmp qxl_lptp_tx
| 19.3125 | 99 | 0.62891 |
8243cd7135c101907318cfff2da91a2c4747ebd7 | 491 | asm | Assembly | oeis/168/A168463.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/168/A168463.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/168/A168463.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A168463: a(n) = 5 + 11*floor(n/2).
; Submitted by Christian Krause
; 5,16,16,27,27,38,38,49,49,60,60,71,71,82,82,93,93,104,104,115,115,126,126,137,137,148,148,159,159,170,170,181,181,192,192,203,203,214,214,225,225,236,236,247,247,258,258,269,269,280,280,291,291,302,302,313,313,324,324,335,335,346,346,357,357,368,368,379,379,390,390,401,401,412,412,423,423,434,434,445,445,456,456,467,467,478,478,489,489,500,500,511,511,522,522,533,533,544,544,555
add $0,1
div $0,2
mul $0,11
add $0,5
| 54.555556 | 383 | 0.708758 |
73e728b5a09ce4fb98695a61229f2197d234b80c | 1,154 | asm | Assembly | programs/oeis/239/A239907.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/239/A239907.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/239/A239907.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A239907: Let cn(n,k) denote the number of times 11..1 (k 1's) appears in the binary representation of n; a(n) = n - cn(n,1) + cn(n,2) - cn(n,3) + cn(n,4) - ... .
; 0,0,1,2,3,3,5,5,7,7,8,9,11,11,12,13,15,15,16,17,18,18,20,20,23,23,24,25,26,26,28,28,31,31,32,33,34,34,36,36,38,38,39,40,42,42,43,44,47,47,48,49,50,50,52,52,54,54,55,56,58,58,59,60,63,63,64,65,66,66,68,68,70,70,71,72,74,74,75,76,78,78,79,80,81,81,83,83,86,86,87,88,89,89,91,91,95,95,96,97,98,98,100,100,102,102,103,104,106,106,107,108,110,110,111,112,113,113,115,115,118,118,119,120,121,121,123,123,127,127,128,129,130,130,132,132,134,134,135,136,138,138,139,140,142,142,143,144,145,145,147,147,150,150,151,152,153,153,155,155,158,158,159,160,161,161,163,163,165,165,166,167,169,169,170,171,174,174,175,176,177,177,179,179,181,181,182,183,185,185,186,187,191,191,192,193,194,194,196,196,198,198,199,200,202,202,203,204,206,206,207,208,209,209,211,211,214,214,215,216,217,217,219,219,222,222,223,224,225,225,227,227,229,229,230,231,233,233,234,235,238,238,239,240,241,241,243,243,245,245
mov $1,$0
cal $0,329320 ; a(n) = Sum_{k=0..floor(log_2(n))} 1 - A035263(1 + floor(n/2^k)).
sub $1,$0
| 164.857143 | 887 | 0.682842 |
ded6c797d5cf8512ede5d74098f3bc6a9d8f87a6 | 20,387 | asm | Assembly | Source/HBIOS/dsrtc.asm | b1ackmai1er/RomWBW | 711bf1c877d1d4e02add0e9a884aab4316eaf2e9 | [
"DOC",
"MIT"
] | 1 | 2021-11-10T12:31:51.000Z | 2021-11-10T12:31:51.000Z | Source/HBIOS/dsrtc.asm | b1ackmai1er/RomWBW | 711bf1c877d1d4e02add0e9a884aab4316eaf2e9 | [
"DOC",
"MIT"
] | 1 | 2018-08-03T10:46:18.000Z | 2018-08-03T10:46:18.000Z | Source/HBIOS/dsrtc.asm | b1ackmai1er/RomWBW | 711bf1c877d1d4e02add0e9a884aab4316eaf2e9 | [
"DOC",
"MIT"
] | null | null | null | ;
;==================================================================================================
; DALLAS SEMICONDUCTOR DS1302 RTC DRIVER
;==================================================================================================
;
; PROGRAMMING NOTES:
; - ALL SIGNALS ARE ACTIVE HIGH
; - DATA OUTPUT (HOST -> RTC) ON RISING EDGE
; - DATA INPUT (RTC -> HOST) ON FALLING EDGE
; - SIMPLIFIED TIMING CONSTRAINTS:
; @ 50MHZ, 1 TSTATE IS WORTH 20NS, 1 NOP IS WORTH 80NS, 1 EX (SP), IX IS WORTH 23 460NS
; 1) AFTER CHANGING CE, WAIT 1US (2 X EX (SP), IX)
; 2) AFTER CHANGING CLOCK, WAIT 250NS (3 X NOP)
; 3) AFTER SETTING A DATA BIT, WAIT 50NS (1 X NOP)
; 4) PRIOR TO READING A DATA BIT, WAIT 200NS (3 X NOP)
;
; COMMAND BYTE:
;
; 7 6 5 4 3 2 1 0
; +-----+-----+-----+-----+-----+-----+-----+-----+
; | 1 | RAM | A4 | A3 | A2 | A1 | A0 | RD |
; | | ~CK | | | | | | ~WR |
; +-----+-----+-----+-----+-----+-----+-----+-----+
;
; REGISTER ADDRESSES (HEX / BCD):
;
; RD WR D7 D6 D5 D4 D3 D2 D1 D0 RANGE
; +----+----+----+----+----+----+----+----+----+----+-----------+
; | 81 | 80 | CH | 10 SECS | SEC | 00-59 |
; +----+----+----+----+----+----+----+----+----+----+-----------+
; | 83 | 82 | | 10 MINS | MIN | 00-59 |
; +----+----+----+----+----+----+----+----+----+----+-----------+
; | 85 | 84 | TF | 00 | PM | 10 | HOURS | 1-12/0-23 |
; +----+----+----+----+----+----+----+----+----+----+-----------+
; | 87 | 86 | 00 | 00 | 10 DATE | DATE | 1-31 |
; +----+----+----+----+----+----+----+----+----+----+-----------+
; | 89 | 88 | 00 | 10 MONTHS | MONTH | 1-12 |
; +----+----+----+----+----+----+----+----+----+----+-----------+
; | 8B | 8A | 00 | 00 | 00 | 00 | DAY | 1-7 |
; +----+----+----+----+----+----+----+----+----+----+-----------+
; | 8D | 8C | 10 YEARS | YEAR | 0-99 |
; +----+----+----+----+----+----+----+----+----+----+-----------+
; | 8F | 8E | WP | 00 | 00 | 00 | 00 | 00 | 00 | 00 | |
; +----+----+----+----+----+----+----+----+----+----+-----------+
; | 91 | 90 | TCS | DS | RS | |
; +----+----+----+----+----+----+----+----+----+----+-----------+
; | BF | BE | *CLOCK BURST* |
; +----+----+----+----+----+----+----+----+----+----+-----------+
; | C1 | C0 | | |
; | .. | .. | *RAM* | |
; | FD | FC | | |
; +----+----+----+----+----+----+----+----+----+----+-----------+
; | FF | FE | *RAM BURST* | |
; +----+----+----+----+----+----+----+----+----+----+-----------+
;
; CH=CLOCK HALT (1=CLOCK HALTED & OSC STOPPED)
; TF=12 HOUR (1) OR 24 HOUR (0)
; PM=IF 24 HOURS, 0=AM, 1=PM, ELSE 10 HOURS
; WP=WRITE PROTECT (1=PROTECTED)
; TCS=TRICKLE CHARGE ENABLE (1010 TO ENABLE)
; DS=TRICKLE CHARGE DIODE SELECT
; RS=TRICKLE CHARGE RESISTOR SELECT
;
; CONSTANTS
;
; RTC LATCH WRITE
; ---------------
;
; BIT SBC SBC-004 MFPIC N8 N8-CSIO MK4 SC130 SC131 SC126 MBC
; ----- ------- ------- ------- ------- ------- ------- ------- ------- --------------- -------
; D7 RTC_OUT RTC_OUT -- RTC_OUT RTC_OUT RTC_OUT -- -- RTC_OUT,I2C_SDA RTC_OUT
; D6 RTC_CLK RTC_CLK -- RTC_CLK RTC_CLK RTC_CLK -- -- RTC_CLK RTC_CLK
; D5 /RTC_WE /RTC_WE -- /RTC_WE /RTC_WE /RTC_WE -- -- /RTC_WE /RTC_WE
; D4 RTC_CE RTC_CE -- RTC_CE RTC_CE RTC_CE -- -- RTC_CE RTC_CE
; D3 NC CLKSEL /RTC_CE NC NC NC -- -- /SPI_CS2 CLKSEL
; D2 NC SPK RTC_CLK SPI_CS SPI_CS NC /SPI_CS1/SPI_CS1/SPI_CS1 SPK
; D1 -- -- RTC_WE SPI_CLK NC NC -- -- FS LED1
; D0 -- -- RTC_OUT SPI_DI NC NC -- -- I2C_SCL LED0
;
; RTC LATCH READ
; --------------
;
; D7 -- -- -- -- -- -- -- -- I2C_SDA --
; D6 CFG CFG -- SPI_DO CFG -- -- -- -- CFG
; D5 -- -- -- -- -- -- -- -- -- --
; D4 -- -- -- -- -- -- -- -- -- --
; D3 -- -- -- -- -- -- -- -- -- --
; D2 -- -- -- -- -- -- -- -- -- --
; D1 ---- -- -- -- -- -- -- -- -- CLKSEL
; D0 RTC_IN RTC_IN RTC_IN RTC_IN RTC_IN RTC_IN -- -- RTC_IN RTC_IN
;
#IF (DSRTCMODE == DSRTCMODE_STD)
;
DSRTC_IO .EQU RTCIO ; RTC PORT
;
DSRTC_DATA .EQU %10000000 ; BIT 7 IS RTC DATA OUT
DSRTC_CLK .EQU %01000000 ; BIT 6 IS RTC CLOCK (CLK)
DSRTC_RD .EQU %00100000 ; BIT 5 IS DATA DIRECTION (/WE)
DSRTC_CE .EQU %00010000 ; BIT 4 IS CHIP ENABLE (CE)
;
DSRTC_MASK .EQU %11110000 ; MASK FOR BITS WE OWN IN RTC LATCH PORT
DSRTC_IDLE .EQU %00100000 ; QUIESCENT STATE
;
RTCDEF .SET RTCDEF | DSRTC_IDLE ; FOR HBIOS MAINLINE
;
#DEFINE DSRTC_OPRVAL HB_RTCVAL
;
; VALUES FOR DIFFERENT BATTERY OR SUPERCAPACITOR CHARGE RATES
;
DS1d2k .EQU %10100101 ; 1 DIODE 2K RESISTOR (DEFAULT)
DS1d4k .EQU %10100110 ; 1 DIODE 4K RESISTOR
DS1d8k .EQU %10100111 ; 1 DOIDE 8K RESISTOR
DS2d2k .EQU %10101001 ; 2 DIODES 2K RESISTOR
DS2d4k .EQU %10101010 ; 2 DIODES 4K RESISTOR
DS2d8k .EQU %10101011 ; 2 DIODES 8K RESISTOR
;
#ENDIF
;
#IF (DSRTCMODE == DSRTCMODE_MFPIC)
;
DSRTC_IO .EQU $43 ; RTC PORT ON MF/PIC
;
DSRTC_DATA .EQU %00000001 ; BIT 0 IS RTC DATA OUT
DSRTC_CLK .EQU %00000100 ; BIT 2 IS RTC CLOCK (CLK)
DSRTC_WR .EQU %00000010 ; BIT 1 IS DATA DIRECTION (WE)
DSRTC_CE .EQU %00001000 ; BIT 3 CHIP ENABLE (/CE)
;
DSRTC_MASK .EQU %00001111 ; MASK FOR BITS WE OWN IN RTC LATCH PORT
DSRTC_IDLE .EQU %00001000 ; QUIESCENT STATE
;
#DEFINE DSRTC_OPRVAL DSRTC_RTCVAL
;
#ENDIF
;
DSRTC_BUFSIZ .EQU 7 ; 7 BYTE BUFFER (YYMMDDHHMMSSWW)
;
; RTC DEVICE PRE-INITIALIZATION ENTRY
;
DSRTC_PREINIT:
;
;; SET RELEVANT BITS IN RTC LATCH SHADOW REGISTER
;; TO THEIR QUIESENT STATE
;LD A,(DSRTC_OPRVAL) ; GET CURRENT SHADOW REG VAL
;AND ~DSRTC_MASK ; CLEAR OUR BITS
;OR DSRTC_IDLE ; SET OUR IDLE BITS
;LD (DSRTC_OPRVAL),A ; SAVE IT
;
CALL DSRTC_DETECT ; HARDWARE DETECTION
LD (DSRTC_STAT),A ; SAVE RESULT
RET NZ ; ABORT IF ERROR
;
; CHECK FOR CLOCK HALTED
CALL DSRTC_TSTCLK
JR Z,DSRTC_PREINIT1
;PRTS(" INIT CLOCK $")
LD HL,DSRTC_TIMDEF
CALL DSRTC_TIM2CLK
LD HL,DSRTC_BUF
CALL DSRTC_WRCLK
;
DSRTC_PREINIT1:
XOR A ; SIGNAL SUCCESS
RET ; DONE
;
; RTC DEVICE INITIALIZATION ENTRY
;
DSRTC_INIT:
LD A,(RTC_DISPACT) ; RTC DISPATCHER ALREADY SET?
OR A ; SET FLAGS
RET NZ ; IF ALREADY ACTIVE, ABORT
;
CALL NEWLINE ; FORMATTING
PRTS("DSRTC: MODE=$")
;
#IF (DSRTCMODE == DSRTCMODE_STD)
PRTS("STD$")
#ENDIF
#IF (DSRTCMODE == DSRTCMODE_MFPIC)
PRTS("MFPIC$")
#ENDIF
;
; PRINT RTC LATCH PORT ADDRESS
PRTS(" IO=0x$") ; LABEL FOR IO ADDRESS
LD A,DSRTC_IO ; GET IO ADDRESS
CALL PRTHEXBYTE ; PRINT IT
;
; CHECK PRESENCE STATUS
LD A,(DSRTC_STAT) ; GET DEVICE STATUS
OR A ; SET FLAGS
JR Z,DSRTC_INIT1 ; IF ZERO, ALL GOOD
PRTS(" NOT PRESENT$") ; NOT ZERO, H/W NOT PRESENT
OR $FF ; SIGNAL FAILURE
RET ; BAIL OUT
;
DSRTC_INIT1:
; DISPLAY CURRENT TIME
CALL PC_SPACE
LD HL,DSRTC_BUF
CALL DSRTC_RDCLK
LD HL,DSRTC_TIMBUF
CALL DSRTC_CLK2TIM
LD HL,DSRTC_TIMBUF
CALL PRTDT
;
#IF DSRTCCHG ; FORCE_RTC_CHARGE_ENABLE
LD C,$90 ; ACCESS CHARGE REGISTER
LD E,DS1d2k ; STD CHARGE VALUES
CALL DSRTC_WRBYTWP
#ENDIF
;
PRTS(" CHARGE=$") ; DISPLAY
CALL DSRTC_TSTCHG ; CHARGING
JR NZ,NOCHG1 ; STATUS
PRTS("ON$")
JR NOCHG2
NOCHG1:
PRTS("OFF$")
NOCHG2:
;
LD BC,DSRTC_DISPATCH
CALL RTC_SETDISP
;
XOR A ; SIGNAL SUCCESS
RET
;
; RTC DEVICE FUNCTION DISPATCH ENTRY
; A: RESULT (OUT), 0=OK, Z=OK, NZ=ERR
; B: FUNCTION (IN)
;
DSRTC_DISPATCH:
LD A,B ; GET REQUESTED FUNCTION
AND $0F ; ISOLATE SUB-FUNCTION
JP Z,DSRTC_GETTIM ; GET TIME
DEC A
JP Z,DSRTC_SETTIM ; SET TIME
DEC A
JP Z,DSRTC_GETBYT ; GET NVRAM BYTE VALUE
DEC A
JP Z,DSRTC_SETBYT ; SET NVRAM BYTE VALUE
DEC A
JP Z,DSRTC_GETBLK ; GET NVRAM DATA BLOCK VALUES
DEC A
JP Z,DSRTC_SETBLK ; SET NVRAM DATA BLOCK VALUES
DEC A
JP Z,DSRTC_GETALM ; GET ALARM
DEC A
JP Z,DSRTC_SETALM ; SET ALARM
DEC A
JP Z,DSRTC_DEVICE ; REPORT RTC DEVICE INFO
CALL SYSCHK
LD A,ERR_NOFUNC
OR A
RET
;
; NVRAM FUNCTIONS ARE NOT AVAILABLE IN SIMULATOR
;
DSRTC_GETBLK:
DSRTC_SETBLK:
DSRTC_GETALM:
DSRTC_SETALM:
CALL SYSCHK
LD A,ERR_NOTIMPL
OR A
RET
;
; RTC GET TIME
; A: RESULT (OUT), 0=OK, Z=OK, NZ=ERR
; HL: DATE/TIME BUFFER (OUT)
; BUFFER FORMAT IS BCD: YYMMDDHHMMSS
; 24 HOUR TIME FORMAT IS ASSUMED
;
DSRTC_GETTIM:
LD A,(DSRTC_STAT) ; GET DEVICE STATUS
OR A ; SET FLAGS
RET NZ ; BAIL OUT ON ERROR
;
PUSH HL ; SAVE ADR OF OUTPUT BUF
;
; READ THE CLOCK
LD HL,DSRTC_BUF ; POINT TO CLOCK BUFFER
CALL DSRTC_RDCLK ; READ THE CLOCK
LD HL,DSRTC_TIMBUF ; POINT TO TIME BUFFER
CALL DSRTC_CLK2TIM ; CONVERT CLOCK TO TIME
;
; NOW COPY TO REAL DESTINATION (INTERBANK SAFE)
LD A,BID_BIOS ; COPY FROM BIOS BANK
LD (HB_SRCBNK),A ; SET IT
LD A,(HB_INVBNK) ; COPY TO CURRENT USER BANK
LD (HB_DSTBNK),A ; SET IT
LD HL,DSRTC_TIMBUF ; SOURCE ADR
POP DE ; DEST ADR
LD BC,6 ; LENGTH IS 6 BYTES
#IF (INTMODE == 1)
DI
#ENDIF
CALL HB_BNKCPY ; COPY THE CLOCK DATA
#IF (INTMODE == 1)
EI
#ENDIF
;
; CLEAN UP AND RETURN
XOR A ; SIGNAL SUCCESS
RET ; AND RETURN
;
; RTC SET TIME
; A: RESULT (OUT), 0=OK, Z=OK, NZ=ERR
; HL: DATE/TIME BUFFER (IN)
; BUFFER FORMAT IS BCD: YYMMDDHHMMSS
; 24 HOUR TIME FORMAT IS ASSUMED
;
DSRTC_SETTIM:
LD A,(DSRTC_STAT) ; GET DEVICE STATUS
OR A ; SET FLAGS
RET NZ ; BAIL OUT ON ERROR
;
; COPY INCOMING TIME DATA TO OUR TIME BUFFER
LD A,(HB_INVBNK) ; COPY FROM CURRENT USER BANK
LD (HB_SRCBNK),A ; SET IT
LD A,BID_BIOS ; COPY TO BIOS BANK
LD (HB_DSTBNK),A ; SET IT
LD DE,DSRTC_TIMBUF ; DEST ADR
LD BC,6 ; LENGTH IS 6 BYTES
#IF (INTMODE == 1)
DI
#ENDIF
CALL HB_BNKCPY ; COPY THE CLOCK DATA
#IF (INTMODE == 1)
EI
#ENDIF
;
; WRITE TO CLOCK
LD HL,DSRTC_TIMBUF ; POINT TO TIME BUFFER
CALL DSRTC_TIM2CLK ; CONVERT TO CLOCK FORMAT
LD HL,DSRTC_BUF ; POINT TO CLOCK BUFFER
CALL DSRTC_WRCLK ; WRITE TO THE CLOCK
;
; CLEAN UP AND RETURN
XOR A ; SIGNAL SUCCESS
RET ; AND RETURN
;
; RTC GET NVRAM BYTE
; C: INDEX
; E: VALUE (OUTPUT)
;
DSRTC_GETBYT:
LD A,(DSRTC_STAT) ; GET DEVICE STATUS
OR A ; SET FLAGS
RET NZ ; BAIL OUT ON ERROR
LD A,C ; INDEX
SLA A ; SHIFT TO INDEX BITS
ADD A,$C1 ; CMD OFFSET
LD C,A ; SAVE READ CMD BYTE
CALL DSRTC_RDBYT ; DO IT
XOR A ; SIGNAL SUCCESS
RET ; DONE
;
; RTC SET NVRAM BYTE
; C: INDEX
; E: VALUE
;
DSRTC_SETBYT:
LD A,(DSRTC_STAT) ; GET DEVICE STATUS
OR A ; SET FLAGS
RET NZ ; BAIL OUT ON ERROR
LD A,C ; INDEX
SLA A ; SHIFT TO INDEX BITS
ADD A,$C0 ; CMD OFFSET
LD C,A ; SAVE WRITE CMD BYTE
CALL DSRTC_WRBYTWP ; DO IT
XOR A ; SIGNAL SUCCESS
RET ; DONE
;
; REPORT RTC DEVICE INFO
;
DSRTC_DEVICE:
LD D,RTCDEV_DS ; D := DEVICE TYPE
LD E,0 ; E := PHYSICAL DEVICE NUMBER
LD H,DSRTCMODE ; H := MODE
LD L,DSRTC_IO ; L := BASE I/O ADDRESS
XOR A ; SIGNAL SUCCESS
RET
;
; CONVERT DATA IN CLOCK BUFFER TO TIME BUFFER AT HL
;
DSRTC_CLK2TIM:
LD A,(DSRTC_YR)
LD (HL),A
INC HL
LD A,(DSRTC_MON)
LD (HL),A
INC HL
LD A,(DSRTC_DT)
LD (HL),A
INC HL
LD A,(DSRTC_HR)
LD (HL),A
INC HL
LD A,(DSRTC_MIN)
LD (HL),A
INC HL
LD A,(DSRTC_SEC)
LD (HL),A
RET
;
; CONVERT DATA IN TIME BUFFER AT HL TO CLOCK BUFFER
;
DSRTC_TIM2CLK:
PUSH HL
LD A,(HL)
LD (DSRTC_YR),A
INC HL
LD A,(HL)
LD (DSRTC_MON),A
INC HL
LD A,(HL)
LD (DSRTC_DT),A
INC HL
LD A,(HL)
LD (DSRTC_HR),A
INC HL
LD A,(HL)
LD (DSRTC_MIN),A
INC HL
LD A,(HL)
LD (DSRTC_SEC),A
POP HL
CALL TIMDOW
INC A ; CONVERT FROM 0-6 TO 1-7
LD (DSRTC_DAY),A
RET
;
; TEST CLOCK FOR CHARGE DATA
;
DSRTC_TSTCHG:
LD C,$91 ; CHARGE RESISTOR & DIODE VALUES
CALL DSRTC_RDBYT ; GET VALUE
LD A,E ; VALUE TO A
AND %11110000 ; CHECK FOR
CP %10100000 ; ... ENABLED FLAG
RET
;
; DETECT RTC HARDWARE PRESENCE
;
DSRTC_DETECT:
LD C,30 ; NVRAM INDEX 30
CALL DSRTC_GETBYT ; GET VALUE
LD A,E ; TO ACCUM
LD (DSRTC_TEMP),A ; SAVE IT
XOR $FF ; FLIP ALL BITS
LD E,A ; TO E
LD C,30 ; NVRAM INDEX 30
CALL DSRTC_SETBYT ; WRITE IT
LD C,30 ; NVRAM INDEX 30
CALL DSRTC_GETBYT ; GET VALUE
LD A,(DSRTC_TEMP) ; GET SAVED VALUE
XOR $FF ; FLIP ALL BITS
CP E ; COMPARE WITH VALUE READ
LD A,0 ; ASSUME OK
JR Z,DSRTC_DETECT1 ; IF MATCH, GO AHEAD
LD A,$FF ; ELSE STATUS IS ERROR
DSRTC_DETECT1:
PUSH AF ; SAVE STATUS
LD A,(DSRTC_TEMP) ; GET SAVED VALUE
LD C,30 ; NVRAM INDEX 30
CALL DSRTC_SETBYT ; SAVE IT
POP AF ; RECOVER STATUS
OR A ; SET FLAGS
RET ; DONE
;
; TEST CLOCK FOR VALID DATA
; READ CLOCK HALT BIT AND RETURN ZF BASED ON BIT VALUE
; 0 = RUNNING
; 1 = HALTED
;
DSRTC_TSTCLK:
LD C,$81 ; SECONDS REGISTER HAS CLOCK HALT FLAG
CALL DSRTC_RDBYT ; GET REGISTER VALUE
LD A,E ; VALUE TO A
AND %10000000 ; HIGH ORDER BIT IS CLOCK HALT
RET
;
; READ RAW BYTE
; C=READ CMD BYTE
; E=VALUE (OUTPUT)
;
DSRTC_RDBYT:
CALL DSRTC_START
LD E,C
CALL DSRTC_CMD
CALL DSRTC_GET
CALL DSRTC_END
RET
;
; WRITE RAW BYTE
; C=WRITE CMD BYTE
; E=VALUE
;
DSRTC_WRBYT:
CALL DSRTC_START
PUSH DE ; SAVE VALUE TO WRITE
LD E,C ; CMD TO E
CALL DSRTC_CMD
POP DE ; RESTORE VALUE
CALL DSRTC_PUT
CALL DSRTC_END
RET
;
; WRITE RAW BYTE W/ WRITE PROTECT BRACKETING
; C=WRITE CMD BYTE
; E=VALUE
;
DSRTC_WRBYTWP:
LD D,C ; WRITE CMD TO D
PUSH DE ; SAVE PARMS
;
; TURN OFF WRITE PROTECT
LD C,$8E ; CMD
LD E,0 ; WRITE PROTECT OFF
CALL DSRTC_WRBYT ; DO IT
;
; WRITE THE VALUE
POP DE ; RESTORE INPUTS
LD C,D ; WRITE CMD BACK TO C
CALL DSRTC_WRBYT ; DO IT
;
; TURN WRITE PROTECT BACK ON
LD C,$8E ; WRITE CMD TO D
LD E,$80 ; WRITE PROTECT ON
CALL DSRTC_WRBYT ; DO IT
;
RET
;
; BURST READ CLOCK DATA INTO BUFFER AT HL
;
DSRTC_RDCLK:
CALL DSRTC_START
LD E,$BF ; COMMAND = $BF TO BURST READ CLOCK
CALL DSRTC_CMD ; SEND COMMAND TO RTC
LD B,DSRTC_BUFSIZ ; B IS LOOP COUNTER
DSRTC_RDCLK1:
PUSH BC ; PRESERVE BC
CALL DSRTC_GET ; GET NEXT BYTE
LD (HL),E ; SAVE IN BUFFER
INC HL ; INC BUF POINTER
POP BC ; RESTORE BC
DJNZ DSRTC_RDCLK1 ; LOOP IF NOT DONE
JP DSRTC_END ; FINISH IT
;
; BURST WRITE CLOCK DATA FROM BUFFER AT HL
;
DSRTC_WRCLK:
CALL DSRTC_START
LD E,$8E ; COMMAND = $8E TO WRITE CONTROL REGISTER
CALL DSRTC_CMD ; SEND COMMAND
LD E,$00 ; $00 = UNPROTECT
CALL DSRTC_PUT ; SEND VALUE TO CONTROL REGISTER
CALL DSRTC_END ; FINISH IT
;
LD E,$BE ; COMMAND = $BE TO BURST WRITE CLOCK
CALL DSRTC_CMD ; SEND COMMAND TO RTC
LD B,DSRTC_BUFSIZ ; B IS LOOP COUNTER
DSRTC_WRCLK1:
PUSH BC ; PRESERVE BC
LD E,(HL) ; GET NEXT BYTE TO WRITE
CALL DSRTC_PUT ; PUT NEXT BYTE
INC HL ; INC BUF POINTER
POP BC ; RESTORE BC
DJNZ DSRTC_WRCLK1 ; LOOP IF NOT DONE
LD E,$80 ; ADD CONTROL REG BYTE, $80 = PROTECT ON
CALL DSRTC_PUT ; WRITE REQUIRED 8TH BYTE
JP DSRTC_END ; FINISH IT
;
; SEND COMMAND IN E TO RTC
; ALL RTC SEQUENCES MUST CALL THIS FIRST TO SEND THE RTC COMMAND.
; THE COMMAND IS SENT VIA A PUT. CE AND CLK ARE LEFT ASSERTED! THIS
; IS INTENTIONAL BECAUSE WHEN THE CLOCK IS LOWERED, THE FIRST BIT
; WILL BE PRESENTED TO READ (IN THE CASE OF A READ CMD).
;
; N.B. REGISTER A CONTAINS WORKING VALUE OF LATCH PORT AND MUST NOT
; BE MODIFIED BETWEEN CALLS TO DSRTC_CMD, DSRTC_PUT, AND DSRTC_GET.
;
; 0) ASSUME ALL LINES UNDEFINED AT ENTRY
; 1) DEASSERT ALL LINES (CE, RD, CLOCK, & DATA)
; 2) WAIT 1US
; 3) SET CE HI
; 4) WAIT 1US
; 5) PUT COMMAND
;
DSRTC_CMD:
LD A,(DSRTC_OPRVAL) ; INIT A WITH QUIESCENT STATE
OUT (DSRTC_IO),A ; WRITE TO PORT
CALL DLY2 ; DELAY 2 * 27 T-STATES
#IF (DSRTCMODE == DSRTCMODE_MFPIC)
AND ~DSRTC_CE ; ASSERT CE (LOW)
#ELSE
OR DSRTC_CE ; ASSERT CE (HIGH)
#ENDIF
OUT (DSRTC_IO),A ; WRITE TO RTC PORT
CALL DLY2 ; DELAY 2 * 27 T-STATES
CALL DSRTC_PUT ; WRITE IT
RET
;
; WRITE BYTE IN E TO THE RTC
; WRITE BYTE IN E TO THE RTC. CE IS IMPLICITY ASSERTED AT
; THE START. CE AND CLK ARE LEFT ASSERTED AT THE END IN CASE
; NEXT ACTION IS A READ.
;
; 0) ASSUME ENTRY WITH CE HI, OTHERS UNDEFINED
; 1) SET CLK LO
; 2) WAIT 250NS
; 3) SET DATA ACCORDING TO BIT VALUE
; 4) SET CLOCK HI
; 5) WAIT 250NS (CLOCK READS DATA BIT FROM BUS)
; 6) LOOP FOR 8 DATA BITS
; 7) EXIT WITH CE,CLK HI
;
DSRTC_PUT:
LD B,8 ; LOOP FOR 8 BITS
#IF (DSRTCMODE == DSRTCMODE_MFPIC)
OR DSRTC_WR ; SET WRITE MODE
#ELSE
AND ~DSRTC_RD ; SET WRITE MODE
#ENDIF
DSRTC_PUT1:
AND ~DSRTC_CLK ; SET CLOCK LOW
OUT (DSRTC_IO),A ; DO IT
CALL DLY1 ; DELAY 27 T-STATES
#IF (DSRTCMODE == DSRTCMODE_MFPIC)
RRA ; PREP ACCUM TO GET DATA BIT IN CARRY
RR E ; ROTATE NEXT BIT TO SEND INTO CARRY
RLA ; ROTATE BITS BACK TO CORRECT POSTIIONS
#ELSE
RLA ; PREP ACCUM TO GET DATA BIT IN CARRY
RR E ; ROTATE NEXT BIT TO SEND INTO CARRY
RRA ; ROTATE BITS BACK TO CORRECT POSTIIONS
#ENDIF
OUT (DSRTC_IO),A ; ASSERT DATA BIT ON BUS
OR DSRTC_CLK ; SET CLOCK HI
OUT (DSRTC_IO),A ; DO IT
CALL DLY1 ; DELAY 27 T-STATES
DJNZ DSRTC_PUT1 ; LOOP IF NOT DONE
RET
;
; READ BYTE FROM RTC, RETURN VALUE IN E
; READ THE NEXT BYTE FROM THE RTC INTO E. CE IS IMPLICITLY
; ASSERTED AT THE START. CE AND CLK ARE LEFT ASSERTED AT
; THE END. CLOCK *MUST* BE LEFT ASSERTED FROM DSRTC_CMD!
;
; 0) ASSUME ENTRY WITH CE HI, OTHERS UNDEFINED
; 1) SET RD HI AND CLOCK LOW
; 3) WAIT 250NS (CLOCK PUTS DATA BIT ON BUS)
; 4) READ DATA BIT
; 5) SET CLOCK HI
; 6) WAIT 250NS
; 7) LOOP FOR 8 DATA BITS
; 8) EXIT WITH CE,CLK,RD HI
;
DSRTC_GET:
LD E,0 ; INITIALIZE WORKING VALUE TO 0
LD B,8 ; LOOP FOR 8 BITS
#IF (DSRTCMODE == DSRTCMODE_MFPIC)
AND ~DSRTC_WR ; SET READ MODE
#ELSE
OR DSRTC_RD ; SET READ MODE
#ENDIF
DSRTC_GET1:
AND ~DSRTC_CLK ; SET CLK LO
OUT (DSRTC_IO),A ; WRITE TO RTC PORT
CALL DLY1 ; DELAY 2 * 27 T-STATES
PUSH AF ; SAVE PORT VALUE
IN A,(DSRTC_IO) ; READ THE RTC PORT
RRA ; DATA BIT TO CARRY
RR E ; SHIFT INTO WORKING VALUE
POP AF ; RESTORE PORT VALUE
OR DSRTC_CLK ; CLOCK BACK TO HI
OUT (DSRTC_IO),A ; WRITE TO RTC PORT
CALL DLY1 ; DELAY 27 T-STATES
DJNZ DSRTC_GET1 ; LOOP IF NOT DONE (13)
RET
;
; START A COMMAND SEQUENCE
; INITIATES A COMMAND SEQUENCE
; DOES NOT DESTROY ANY REGISTERS.
;
; 1) CAPTURE RTC LATCH BITS
;
DSRTC_START:
; SET RELEVANT BITS IN RTC LATCH SHADOW REGISTER
; TO THEIR QUIESENT STATE
PUSH AF
LD A,(DSRTC_OPRVAL) ; GET CURRENT SHADOW REG VAL
AND ~DSRTC_MASK ; CLEAR OUR BITS
OR DSRTC_IDLE ; SET OUR IDLE BITS
LD (DSRTC_OPRVAL),A ; SAVE IT
POP AF
RET
;
; COMPLETE A COMMAND SEQUENCE
; FINISHES UP A COMMAND SEQUENCE.
; DOES NOT DESTROY ANY REGISTERS.
;
; 1) SET ALL LINES BACK TO QUIESCENT STATE
;
DSRTC_END:
;PUSH AF
LD A,(DSRTC_OPRVAL) ; INIT A WITH QUIESCENT STATE
OUT (DSRTC_IO),A ; WRITE TO PORT
;POP AF
RET ; RETURN
;
; WORKING VARIABLES
;
DSRTC_STAT .DB 0 ; DEVICE STATUS (0=OK)
DSRTC_TEMP .DB 0 ; TEMP VALUE STORAGE
;
#IF (DSRTCMODE == DSRTCMODE_MFPIC)
DSRTC_RTCVAL .DB DSRTC_IDLE ; LOCAL LATCH SHADOW FOR MFPIC
#ENDIF
;
; DSRTC_BUF IS USED FOR BURST READ/WRITE OF CLOCK DATA TO DS-1302
; FIELDS BELOW MATCH ORDER OF DS-1302 FIELDS (BCD)
;
DSRTC_BUF:
DSRTC_SEC .DB 0 ; SECOND
DSRTC_MIN .DB 0 ; MINUTE
DSRTC_HR .DB 0 ; HOUR
DSRTC_DT .DB 0 ; DATE
DSRTC_MON .DB 0 ; MONTH
DSRTC_DAY .DB 0 ; DAY OF WEEK
DSRTC_YR .DB 0 ; YEAR
;
; DSRTC_TIMBUF IS TEMP BUF USED TO STORE TIME TEMPORARILY TO DISPLAY
; IT.
;
DSRTC_TIMBUF .FILL 6,0 ; 6 BYTES FOR GETTIM
;
; DSRTC_TIMDEF IS DEFAULT TIME VALUE TO INITIALIZE CLOCK IF IT IS
; NOT RUNNING.
;
DSRTC_TIMDEF: ; DEFAULT TIME VALUE TO INIT CLOCK
.DB $00,$01,$01 ; 2000-01-01
.DB $00,$00,$00 ; 00:00:00
| 27.328418 | 100 | 0.58037 |
9735eac64bb4b84e830137e2ee26fe4cb3df4baa | 478 | asm | Assembly | non_regression/other_x86_macosx_16b.o.asm | LRGH/plasmasm | 4cd50546c3dc895763d72dd60b7c46179c1916bc | [
"Apache-2.0"
] | 1 | 2021-02-28T21:31:18.000Z | 2021-02-28T21:31:18.000Z | non_regression/other_x86_macosx_16b.o.asm | LRGH/plasmasm | 4cd50546c3dc895763d72dd60b7c46179c1916bc | [
"Apache-2.0"
] | null | null | null | non_regression/other_x86_macosx_16b.o.asm | LRGH/plasmasm | 4cd50546c3dc895763d72dd60b7c46179c1916bc | [
"Apache-2.0"
] | null | null | null | .build_version macos, 10, 14 sdk_version 10, 14
.section __TEXT,__text,regular,pure_instructions
.align 4, 0x90
.globl _main
_main:
testl %edx, %ebx
testl %edx, 4(%ebp)
testl %edx, 4(%ebp)
testb %dh, %dl
testb $32, 1(%edx,%ecx,2)
testl $32896, %eax
xchgl %ebx, %edx
xchgl %edx, 4(%ebp)
xchgl %edx, 4(%ebp)
imull $31, %eax, %eax
imull $31, %eax, %eax
ret
# ----------------------
.subsections_via_symbols
| 22.761905 | 55 | 0.552301 |
975d7325b7464fe398b40eae888fe13573e25784 | 348 | asm | Assembly | src/boot/printf.asm | wsngamerz/wsn_os | 9e35ff19ff642da3b8b15d6a7e155450abf318c8 | [
"MIT"
] | 1 | 2020-06-21T20:25:00.000Z | 2020-06-21T20:25:00.000Z | src/boot/printf.asm | wsngamerz/wsn_os | 9e35ff19ff642da3b8b15d6a7e155450abf318c8 | [
"MIT"
] | null | null | null | src/boot/printf.asm | wsngamerz/wsn_os | 9e35ff19ff642da3b8b15d6a7e155450abf318c8 | [
"MIT"
] | null | null | null | ; output string to screen
printf:
pusha
; loop through the si register one char at a time and output the char
str_loop:
mov al, [si]
cmp al, 0
jne print_char
popa
ret
; 'method' to output the char
print_char:
mov ah, 0x0e
int 0x10
inc si
jmp str_loop
| 19.333333 | 73 | 0.543103 |
034dde19edb190872b6e77922d3bd31dd4b83848 | 621 | asm | Assembly | oeis/138/A138590.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/138/A138590.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/138/A138590.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A138590: a(n) = Fibonacci(9*n).
; Submitted by Jamie Morken(m4)
; 0,34,2584,196418,14930352,1134903170,86267571272,6557470319842,498454011879264,37889062373143906,2880067194370816120,218922995834555169026,16641027750620563662096,1264937032042997393488322,96151855463018422468774568,7308805952221443105020355490,555565404224292694404015791808,42230279526998466217810220532898,3210056809456107725247980776292056,244006547798191185585064349218729154,18547707689471986212190138521399707760,1409869790947669143312035591975596518914
mul $0,9
seq $0,45 ; Fibonacci numbers: F(n) = F(n-1) + F(n-2) with F(0) = 0 and F(1) = 1.
| 88.714286 | 462 | 0.855072 |
aafb3c82303e52cf16f73f0472feb24e206b300a | 275 | asm | Assembly | libsrc/games/trs80/bit_open.asm | meesokim/z88dk | 5763c7778f19a71d936b3200374059d267066bb2 | [
"ClArtistic"
] | null | null | null | libsrc/games/trs80/bit_open.asm | meesokim/z88dk | 5763c7778f19a71d936b3200374059d267066bb2 | [
"ClArtistic"
] | null | null | null | libsrc/games/trs80/bit_open.asm | meesokim/z88dk | 5763c7778f19a71d936b3200374059d267066bb2 | [
"ClArtistic"
] | null | null | null | ; $Id: bit_open.asm,v 1.2 2015/01/19 01:32:45 pauloscustodio Exp $
;
; TRS-80 1 bit sound functions
;
; void bit_open();
;
; Stefano Bodrato - 8/4/2008
;
PUBLIC bit_open
EXTERN snd_tick
.bit_open
ld a,1
ld (snd_tick),a
ret
| 16.176471 | 66 | 0.567273 |
b726f5d0413b2b44b966a1afa90f1b63e681be87 | 333 | asm | Assembly | libsrc/_DEVELOPMENT/compress/zx7/c/sccz80/dzx7_smart_rcs_back_callee.asm | ahjelm/z88dk | c4de367f39a76b41f6390ceeab77737e148178fa | [
"ClArtistic"
] | 640 | 2017-01-14T23:33:45.000Z | 2022-03-30T11:28:42.000Z | libsrc/_DEVELOPMENT/compress/zx7/c/sccz80/dzx7_smart_rcs_back_callee.asm | C-Chads/z88dk | a4141a8e51205c6414b4ae3263b633c4265778e6 | [
"ClArtistic"
] | 1,600 | 2017-01-15T16:12:02.000Z | 2022-03-31T12:11:12.000Z | libsrc/_DEVELOPMENT/compress/zx7/c/sccz80/dzx7_smart_rcs_back_callee.asm | C-Chads/z88dk | a4141a8e51205c6414b4ae3263b633c4265778e6 | [
"ClArtistic"
] | 215 | 2017-01-17T10:43:03.000Z | 2022-03-23T17:25:02.000Z |
; void dzx7_smart_rcs_back_callee(void *src, void *dst)
SECTION code_clib
SECTION code_compress_zx7
PUBLIC dzx7_smart_rcs_back_callee
EXTERN asm_dzx7_smart_rcs_back
dzx7_smart_rcs_back_callee:
IF __CPU_GBZ80__
pop bc
pop de
pop hl
push bc
ELSE
pop hl
pop de
ex (sp),hl
ENDIF
jp asm_dzx7_smart_rcs_back
| 13.32 | 55 | 0.771772 |
c6ac28e2389ae7095ae35b3cc8e96f281dbc0882 | 650 | asm | Assembly | programs/oeis/063/A063915.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/063/A063915.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/063/A063915.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A063915: G.f.: (1 + Sum_{ i >= 0 } 2^i*x^(2^(i+1)-1)) / (1-x)^2.
; 1,3,5,9,13,17,21,29,37,45,53,61,69,77,85,101,117,133,149,165,181,197,213,229,245,261,277,293,309,325,341,373,405,437,469,501,533,565,597,629,661,693,725,757,789,821,853,885,917,949,981,1013,1045,1077,1109,1141,1173,1205,1237,1269,1301,1333,1365,1429,1493,1557,1621,1685,1749,1813,1877,1941,2005,2069,2133,2197,2261,2325,2389,2453,2517,2581,2645,2709,2773,2837,2901,2965,3029,3093,3157,3221,3285,3349,3413,3477,3541,3605,3669,3733
mov $2,$0
add $2,1
mov $4,$0
lpb $2
mov $0,$4
sub $2,1
sub $0,$2
mov $3,1
lpb $0
sub $0,$3
mul $3,2
lpe
add $1,$3
lpe
mov $0,$1
| 34.210526 | 431 | 0.653846 |
05d14e52480a58602c4e24f6532177c58c380a10 | 468 | asm | Assembly | programs/oeis/043/A043566.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/043/A043566.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/043/A043566.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A043566: Number of runs in base 14 representation of n.
; 1,1,1,1,1,1,1,1,1,1,1,1,1,1,2,1,2,2,2,2,2,2,2,2,2,2,2,2,2,2,1,2,2,2,2,2,2,2,2,2,2,2,2,2,2,1,2,2,2,2,2,2,2,2,2,2,2,2,2,2,1,2,2,2,2,2,2,2,2,2,2,2,2,2,2,1,2,2,2,2,2,2,2,2,2,2,2,2,2,2
mov $3,$0
mov $5,2
lpb $5,1
sub $5,1
add $0,$5
sub $0,1
mov $2,$0
div $2,15
add $2,13
mov $4,$0
trn $4,$2
mov $6,$5
lpb $6,1
mov $1,$4
sub $6,1
lpe
lpe
lpb $3,1
sub $1,$4
mov $3,0
lpe
add $1,1
| 18 | 181 | 0.512821 |
f27f9822c10651fac625ac0d68f273873bf33d15 | 480 | asm | Assembly | programs/oeis/154/A154269.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/154/A154269.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/154/A154269.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A154269: Dirichlet inverse of A019590; Fully multiplicative with a(2^e) = (-1)^e, a(p^e) = 0 for odd primes p.
; 1,-1,0,1,0,0,0,-1,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,-1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
seq $0,65883 ; Remove factors of 4 from n (i.e., write n in base 4, drop final zeros, then rewrite in decimal).
mov $1,1
add $2,$0
sub $1,$2
pow $1,$1
mov $0,$1
| 48 | 204 | 0.585417 |
4927d8806bb8c5eb3559d791d58ed85c03c576ae | 496 | asm | Assembly | oeis/186/A186300.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/186/A186300.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/186/A186300.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A186300: (A007521(n)+1)/2.
; Submitted by Jon Maiga
; 3,7,15,19,27,31,51,55,75,79,87,91,99,115,135,139,147,159,175,187,195,199,211,231,255,271,279,307,327,331,339,351,355,367,379,387,399,411,415,427,439,471,499,507,511,531,535,547,555,559,591,607
mov $1,4
mov $2,$0
pow $2,2
lpb $2
mov $3,$1
seq $3,10051 ; Characteristic function of primes: 1 if n is prime, else 0.
sub $0,$3
add $1,8
mov $4,$0
max $4,0
cmp $4,$0
mul $2,$4
sub $2,1
lpe
mov $0,$1
sub $0,4
div $0,2
add $0,3
| 21.565217 | 194 | 0.633065 |
db2750591d10ebc094e26259c6715353612710b5 | 8,005 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0x84_notsx.log_21829_1769.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0x84_notsx.log_21829_1769.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0x84_notsx.log_21829_1769.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r12
push %r13
push %rbp
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_UC_ht+0x1d05a, %rcx
nop
nop
nop
nop
xor %rsi, %rsi
mov (%rcx), %r12d
nop
cmp %r10, %r10
lea addresses_UC_ht+0x19f02, %rdx
nop
nop
and $11165, %r13
mov $0x6162636465666768, %rsi
movq %rsi, %xmm4
movups %xmm4, (%rdx)
nop
nop
nop
nop
nop
inc %rcx
lea addresses_WC_ht+0x1ea32, %r13
nop
nop
nop
nop
nop
add %rbp, %rbp
mov $0x6162636465666768, %rdx
movq %rdx, %xmm4
vmovups %ymm4, (%r13)
nop
cmp $44728, %rdx
lea addresses_D_ht+0xad02, %rsi
lea addresses_A_ht+0x19402, %rdi
nop
nop
add $4544, %r13
mov $41, %rcx
rep movsl
nop
nop
nop
sub $55482, %rsi
lea addresses_D_ht+0xaee2, %rsi
lea addresses_A_ht+0xee5d, %rdi
clflush (%rdi)
nop
nop
nop
sub $30967, %r13
mov $108, %rcx
rep movsq
nop
nop
nop
nop
nop
sub $15490, %rdx
lea addresses_normal_ht+0x17e2, %rbp
nop
nop
nop
sub $48188, %r13
movups (%rbp), %xmm0
vpextrq $0, %xmm0, %rdi
nop
nop
nop
nop
cmp %r13, %r13
lea addresses_A_ht+0xfba2, %rsi
lea addresses_normal_ht+0x5388, %rdi
nop
nop
nop
nop
nop
and $10444, %r13
mov $36, %rcx
rep movsb
nop
nop
nop
nop
nop
and $55898, %rdx
lea addresses_A_ht+0x164b2, %rsi
lea addresses_UC_ht+0x6882, %rdi
clflush (%rdi)
nop
sub %r12, %r12
mov $69, %rcx
rep movsl
nop
xor %r13, %r13
lea addresses_WC_ht+0x51a2, %rdx
nop
nop
nop
nop
dec %rsi
mov $0x6162636465666768, %r13
movq %r13, (%rdx)
nop
nop
cmp %rsi, %rsi
lea addresses_A_ht+0xfe02, %rsi
lea addresses_D_ht+0xf402, %rdi
clflush (%rdi)
nop
sub $3005, %r13
mov $31, %rcx
rep movsw
nop
nop
nop
nop
nop
inc %r12
lea addresses_normal_ht+0x17302, %rbp
nop
nop
nop
xor %rdi, %rdi
movw $0x6162, (%rbp)
nop
nop
nop
add %rcx, %rcx
lea addresses_UC_ht+0x15402, %rsi
lea addresses_D_ht+0x3402, %rdi
sub %rbp, %rbp
mov $117, %rcx
rep movsw
xor %rcx, %rcx
lea addresses_WT_ht+0x6852, %rsi
lea addresses_UC_ht+0x9e02, %rdi
nop
nop
dec %r10
mov $1, %rcx
rep movsl
nop
nop
nop
nop
nop
sub $38978, %rbp
lea addresses_normal_ht+0x2fec, %rsi
nop
nop
nop
nop
cmp %rbp, %rbp
movb (%rsi), %cl
nop
nop
nop
nop
nop
sub %r12, %r12
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbp
pop %r13
pop %r12
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r13
push %r14
push %rax
push %rbx
push %rsi
// Store
lea addresses_PSE+0x1c442, %r10
clflush (%r10)
nop
nop
nop
nop
sub $61439, %rsi
mov $0x5152535455565758, %rax
movq %rax, (%r10)
nop
nop
cmp %rax, %rax
// Faulty Load
lea addresses_UC+0x12802, %r10
xor $19438, %rbx
mov (%r10), %esi
lea oracles, %r13
and $0xff, %rsi
shlq $12, %rsi
mov (%r13,%rsi,1), %rsi
pop %rsi
pop %rbx
pop %rax
pop %r14
pop %r13
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'src': {'type': 'addresses_UC', 'same': False, 'size': 8, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'dst': {'type': 'addresses_PSE', 'same': False, 'size': 8, 'congruent': 6, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
[Faulty Load]
{'src': {'type': 'addresses_UC', 'same': True, 'size': 4, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'type': 'addresses_UC_ht', 'same': False, 'size': 4, 'congruent': 2, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'dst': {'type': 'addresses_UC_ht', 'same': False, 'size': 16, 'congruent': 8, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_WC_ht', 'same': True, 'size': 32, 'congruent': 3, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'src': {'type': 'addresses_D_ht', 'congruent': 7, 'same': True}, 'dst': {'type': 'addresses_A_ht', 'congruent': 6, 'same': False}, 'OP': 'REPM'}
{'src': {'type': 'addresses_D_ht', 'congruent': 3, 'same': False}, 'dst': {'type': 'addresses_A_ht', 'congruent': 0, 'same': True}, 'OP': 'REPM'}
{'src': {'type': 'addresses_normal_ht', 'same': False, 'size': 16, 'congruent': 5, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_A_ht', 'congruent': 1, 'same': False}, 'dst': {'type': 'addresses_normal_ht', 'congruent': 1, 'same': False}, 'OP': 'REPM'}
{'src': {'type': 'addresses_A_ht', 'congruent': 4, 'same': False}, 'dst': {'type': 'addresses_UC_ht', 'congruent': 3, 'same': False}, 'OP': 'REPM'}
{'dst': {'type': 'addresses_WC_ht', 'same': False, 'size': 8, 'congruent': 4, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'src': {'type': 'addresses_A_ht', 'congruent': 8, 'same': False}, 'dst': {'type': 'addresses_D_ht', 'congruent': 8, 'same': True}, 'OP': 'REPM'}
{'dst': {'type': 'addresses_normal_ht', 'same': False, 'size': 2, 'congruent': 8, 'NT': True, 'AVXalign': False}, 'OP': 'STOR'}
{'src': {'type': 'addresses_UC_ht', 'congruent': 9, 'same': False}, 'dst': {'type': 'addresses_D_ht', 'congruent': 10, 'same': False}, 'OP': 'REPM'}
{'src': {'type': 'addresses_WT_ht', 'congruent': 1, 'same': False}, 'dst': {'type': 'addresses_UC_ht', 'congruent': 9, 'same': False}, 'OP': 'REPM'}
{'src': {'type': 'addresses_normal_ht', 'same': False, 'size': 1, 'congruent': 1, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'37': 21829}
37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37
*/
| 32.278226 | 2,999 | 0.660337 |
c553f382ca80803ce813ff25ad2cf19272b199fc | 177 | asm | Assembly | 2.statement/generated-asm/201.type.asm | takenobu-hs/haskell-ghc-cmm-examples | 20938925f242648598b33db1a6a33f9f9562788c | [
"BSD-3-Clause"
] | 1 | 2021-07-05T00:21:19.000Z | 2021-07-05T00:21:19.000Z | 2.statement/generated-asm/201.type.asm | takenobu-hs/haskell-ghc-cmm-examples | 20938925f242648598b33db1a6a33f9f9562788c | [
"BSD-3-Clause"
] | null | null | null | 2.statement/generated-asm/201.type.asm | takenobu-hs/haskell-ghc-cmm-examples | 20938925f242648598b33db1a6a33f9f9562788c | [
"BSD-3-Clause"
] | null | null | null |
==================== Asm code ====================
.section .text
.align 8
.globl func1
.type func1, @function
func1:
_c2:
movl $256,%ebx
jmp *(%rbp)
.size func1, .-func1
| 12.642857 | 50 | 0.502825 |
7401096c2dad8d9c158a2bc46665786bdc3d80d7 | 157 | asm | Assembly | tests/testdata/tbuilder-in-3-bad.asm | roycrippen/sicxe | fdca37f56c95f2a76a78455f86a90e4b89329a54 | [
"MIT"
] | null | null | null | tests/testdata/tbuilder-in-3-bad.asm | roycrippen/sicxe | fdca37f56c95f2a76a78455f86a90e4b89329a54 | [
"MIT"
] | null | null | null | tests/testdata/tbuilder-in-3-bad.asm | roycrippen/sicxe | fdca37f56c95f2a76a78455f86a90e4b89329a54 | [
"MIT"
] | null | null | null | a START 0
b FLOAT
c ADDR A, X
d ADD #10
e WORD 0
d RESB 10 . error: duplicate symbol
END a
| 19.625 | 49 | 0.401274 |
2f0f255eb16a8a8aed30efae304d2b11a19296ec | 167 | asm | Assembly | data/wildPokemon/seafoamislandb1.asm | adhi-thirumala/EvoYellow | 6fb1b1d6a1fa84b02e2d982f270887f6c63cdf4c | [
"Unlicense"
] | 16 | 2018-08-28T21:47:01.000Z | 2022-02-20T20:29:59.000Z | data/wildPokemon/seafoamislandb1.asm | adhi-thirumala/EvoYellow | 6fb1b1d6a1fa84b02e2d982f270887f6c63cdf4c | [
"Unlicense"
] | 5 | 2019-04-03T19:53:11.000Z | 2022-03-11T22:49:34.000Z | data/wildPokemon/seafoamislandb1.asm | adhi-thirumala/EvoYellow | 6fb1b1d6a1fa84b02e2d982f270887f6c63cdf4c | [
"Unlicense"
] | 2 | 2019-12-09T19:46:02.000Z | 2020-12-05T21:36:30.000Z | IslandMonsB1:
db $0A
db 27,ZUBAT
db 26,KRABBY
db 36,ZUBAT
db 28,KRABBY
db 27,GOLBAT
db 29,SLOWPOKE
db 18,ZUBAT
db 28,KINGLER
db 22,SEEL
db 26,SEEL
db $00
| 11.133333 | 15 | 0.694611 |
de1eea89465c37ca1d869201995b9d440240689b | 285 | asm | Assembly | libsrc/_DEVELOPMENT/arch/zx/display/c/sccz80/zx_cyx2saddr_callee.asm | teknoplop/z88dk | bb03fbfd6b2ab0f397a1358559089f9cd3706485 | [
"ClArtistic"
] | null | null | null | libsrc/_DEVELOPMENT/arch/zx/display/c/sccz80/zx_cyx2saddr_callee.asm | teknoplop/z88dk | bb03fbfd6b2ab0f397a1358559089f9cd3706485 | [
"ClArtistic"
] | null | null | null | libsrc/_DEVELOPMENT/arch/zx/display/c/sccz80/zx_cyx2saddr_callee.asm | teknoplop/z88dk | bb03fbfd6b2ab0f397a1358559089f9cd3706485 | [
"ClArtistic"
] | 1 | 2019-12-03T23:57:48.000Z | 2019-12-03T23:57:48.000Z |
; void *zx_cyx2saddr(uchar row, uchar col)
SECTION code_clib
SECTION code_arch
PUBLIC zx_cyx2saddr_callee, l0_zx_cyx2saddr_callee
EXTERN asm_zx_cyx2saddr
zx_cyx2saddr_callee:
pop af
pop hl
pop de
push af
l0_zx_cyx2saddr_callee:
ld h,e
jp asm_zx_cyx2saddr
| 12.391304 | 50 | 0.761404 |
f4c4daf9bb45e6bbf8190b6587e8db761d8a3c0a | 3,813 | asm | Assembly | src/Flow/_SingleStepHandler.asm | fplu/Flow | 99570c1f257b5e4b2698e09a503b8898666d42e5 | [
"MIT"
] | 1 | 2022-03-11T20:13:16.000Z | 2022-03-11T20:13:16.000Z | src/Flow/_SingleStepHandler.asm | fplu/Flow | 99570c1f257b5e4b2698e09a503b8898666d42e5 | [
"MIT"
] | null | null | null | src/Flow/_SingleStepHandler.asm | fplu/Flow | 99570c1f257b5e4b2698e09a503b8898666d42e5 | [
"MIT"
] | 1 | 2022-03-11T20:13:18.000Z | 2022-03-11T20:13:18.000Z |
extern initIncRip
global pContext
;global pContext2
global pStack2
global pDocker
global addressIncRip
global traceLoopData
global traceLoopPreStart
global traceLoopStart
global traceLoopTraceINSTRUCTION
global traceLoopEnd
global START_SAVE_CONTEXT
global START_LOAD_CONTEXT
;global saveRsp
;global loadR10
;global saveR15
;global loadR15
global ADDRESS_PTR
global NEW_CONTEXT_PTR
global START_LOAD_COMPLETE_CONTEXT
global END_LOAD_COMPLETE_CONTEXT
global START_callback
global JMP_RET_callback
global JMP_PTR_callback
global END_callback
global FAST_MEM_CLEAR
%include "_macros.hasm"
align 8
traceLoopData:
pContext : dq 0
pStack2 : dq 0
pDocker : dq 0
addressIncRip : dq 0;or address callback
saveRsp : dq 0
saveR15 : dq 0
ADDRESS_PTR : dq 0
NEW_CONTEXT_PTR : dq 0
traceLoopPreStart:
traceLoopStart:
START_SAVE_CONTEXT:
db 0, 0, 0, 0, 0, 0, 0, 0
db 0, 0, 0, 0, 0, 0, 0, 0
db 0, 0, 0, 0, 0, 0, 0, 0
db 0, 0, 0, 0, 0, 0, 0, 0
db 0, 0, 0, 0, 0, 0, 0, 0
db 0, 0, 0, 0, 0, 0, 0, 0
db 0, 0, 0, 0, 0, 0, 0
db 0, 0, 0, 0, 0, 0, 0
db 0, 0, 0, 0, 0, 0, 0
db 0, 0, 0, 0, 0, 0, 0
db 0, 0, 0, 0, 0, 0, 0
db 0, 0, 0, 0, 0, 0, 0
db 0, 0, 0, 0, 0, 0, 0
db 0, 0, 0, 0, 0, 0, 0
db 0, 0, 0, 0, 0, 0, 0
db 0, 0, 0, 0, 0, 0, 0
db 0, 0, 0, 0, 0, 0, 0
db 0, 0, 0, 0, 0, 0, 0
db 0, 0, 0, 0, 0, 0, 0
db 0, 0, 0, 0, 0, 0, 0
db 0, 0, 0, 0, 0, 0, 0
db 0, 0, 0, 0, 0, 0, 0
;db 0, 0, 0, 0, 0, 0
;db 0, 0, 0, 0, 0, 0
mov rsp, [rel pContext]
lea rsp, [rsp + THREAD_CONTEXT.EFlags + 8]
pushfq
lea rax, [rel END_LOAD_COMPLETE_CONTEXT]
mov QWORD[rel ADDRESS_PTR], rax
mov rsp, [rel pStack2]
mov rcx, [rel pDocker]
mov rax, [rel addressIncRip]
sub rsp, 10h
add rsp, 9000h
;PUSH_REGISTER_XMM_VOLATILE
sub rsp, 20h
call rax
add rsp, 20h
;POP_REGISTER_XMM_VOLATILE
mov rsp, [rel pContext]
lea rsp, [rsp + THREAD_CONTEXT.EFlags]
popfq
START_LOAD_CONTEXT:
db 0, 0, 0, 0, 0, 0, 0, 0
db 0, 0, 0, 0, 0, 0, 0, 0
db 0, 0, 0, 0, 0, 0, 0, 0
db 0, 0, 0, 0, 0, 0, 0, 0
db 0, 0, 0, 0, 0, 0, 0, 0
db 0, 0, 0, 0, 0, 0, 0, 0
db 0, 0, 0, 0, 0, 0, 0
db 0, 0, 0, 0, 0, 0, 0
db 0, 0, 0, 0, 0, 0, 0
db 0, 0, 0, 0, 0, 0, 0
db 0, 0, 0, 0, 0, 0, 0
db 0, 0, 0, 0, 0, 0, 0
db 0, 0, 0, 0, 0, 0, 0
db 0, 0, 0, 0, 0, 0, 0
db 0, 0, 0, 0, 0, 0, 0
;db 0, 0, 0, 0, 0, 0
jmp [rel ADDRESS_PTR]
START_LOAD_COMPLETE_CONTEXT:
mov rcx, [rel NEW_CONTEXT_PTR]
movdqa xmm6, [rcx + CONTEXT.Xmm6]
movdqa xmm7, [rcx + CONTEXT.Xmm7]
movdqa xmm8, [rcx + CONTEXT.Xmm8]
movdqa xmm9, [rcx + CONTEXT.Xmm9]
movdqa xmm10, [rcx + CONTEXT.Xmm10]
movdqa xmm11, [rcx + CONTEXT.Xmm11]
movdqa xmm12, [rcx + CONTEXT.Xmm12]
movdqa xmm13, [rcx + CONTEXT.Xmm13]
movdqa xmm14, [rcx + CONTEXT.Xmm14]
movdqa xmm15, [rcx + CONTEXT.Xmm15]
mov ds, [rcx + CONTEXT.SegDs]
mov es, [rcx + CONTEXT.SegEs]
mov fs, [rcx + CONTEXT.SegFs]
mov gs, [rcx + CONTEXT.SegGs]
mov ss, [rcx + CONTEXT.SegSs]
mov Rbx, [rcx + CONTEXT.Rbx]
mov Rbp, [rcx + CONTEXT.Rbp]
mov Rsi, [rcx + CONTEXT.Rsi]
mov Rdi, [rcx + CONTEXT.Rdi]
mov R12, [rcx + CONTEXT.R12]
mov R13, [rcx + CONTEXT.R13]
mov R14, [rcx + CONTEXT.R14]
mov R15, [rcx + CONTEXT.R15]
mov Rcx, [rcx + CONTEXT.Rcx]
END_LOAD_COMPLETE_CONTEXT :
nop
traceLoopTraceINSTRUCTION:
traceLoopEnd:
dq 0
dq 0
dq 0
dq 0
dq 0
dq 0
dq 0
dq 0
jmp traceLoopStart
START_callback :
;db 0CCh
PUSH_REGISTER_ENTIER_VOLATILE
PUSH_REGISTER_XMM_VOLATILE
call [rel JMP_PTR_callback]
POP_REGISTER_XMM_VOLATILE
POP_REGISTER_ENTIER_VOLATILE
JMP_RET_callback :
db 0E9h
db 090h
db 090h
db 090h
db 090h
JMP_PTR_callback :
dq 0
END_callback :
| 19.065 | 44 | 0.611592 |
c2df980d8c6cb8dd53fe8cb0a733c63fef04e054 | 4,370 | asm | Assembly | Transynther/x86/_processed/NONE/_ht_/i9-9900K_12_0xca.log_2_1223.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_ht_/i9-9900K_12_0xca.log_2_1223.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_ht_/i9-9900K_12_0xca.log_2_1223.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r13
push %r15
push %r9
push %rax
push %rbp
push %rcx
push %rdi
push %rsi
lea addresses_normal_ht+0xc7a7, %r13
clflush (%r13)
nop
and $42309, %r15
movups (%r13), %xmm6
vpextrq $1, %xmm6, %rcx
nop
nop
add %r9, %r9
lea addresses_D_ht+0x177a7, %rbp
nop
nop
nop
nop
sub %rax, %rax
mov (%rbp), %r13w
nop
nop
and $15959, %rbp
lea addresses_D_ht+0x1dea7, %rsi
lea addresses_WT_ht+0x11569, %rdi
nop
nop
nop
nop
nop
dec %r9
mov $73, %rcx
rep movsl
nop
nop
nop
nop
nop
dec %rdi
lea addresses_normal_ht+0x397, %r15
nop
nop
nop
nop
inc %r9
mov $0x6162636465666768, %rcx
movq %rcx, %xmm1
movups %xmm1, (%r15)
nop
nop
lfence
lea addresses_D_ht+0x10367, %rbp
cmp %r9, %r9
mov $0x6162636465666768, %rcx
movq %rcx, (%rbp)
xor %rax, %rax
pop %rsi
pop %rdi
pop %rcx
pop %rbp
pop %rax
pop %r9
pop %r15
pop %r13
ret
.global s_faulty_load
s_faulty_load:
push %r14
push %r15
push %r9
push %rbp
push %rbx
push %rcx
push %rdi
// Store
lea addresses_PSE+0x59a7, %r9
nop
nop
sub $51071, %r15
mov $0x5152535455565758, %rbp
movq %rbp, %xmm0
vmovups %ymm0, (%r9)
nop
nop
xor $41562, %r14
// Store
lea addresses_normal+0x267, %rbx
nop
nop
nop
nop
nop
inc %rbp
mov $0x5152535455565758, %r9
movq %r9, (%rbx)
nop
nop
and %rbp, %rbp
// Load
lea addresses_UC+0xe27b, %rdi
nop
nop
nop
cmp %r15, %r15
mov (%rdi), %bp
nop
nop
nop
dec %r14
// Load
mov $0x79cf2500000005e3, %r15
dec %rcx
mov (%r15), %edi
nop
nop
nop
and %rcx, %rcx
// Load
lea addresses_D+0x97a7, %r15
and %rdi, %rdi
mov (%r15), %r9
nop
nop
xor $53475, %r9
// Store
lea addresses_D+0x10be7, %rdi
xor $39676, %r15
mov $0x5152535455565758, %rbx
movq %rbx, (%rdi)
add %r14, %r14
// Load
lea addresses_WT+0xc7a7, %rdi
cmp $46259, %rbx
movb (%rdi), %cl
nop
nop
nop
sub $27412, %r9
// Store
mov $0xe370b0000000996, %r14
nop
nop
nop
nop
nop
and %rcx, %rcx
movl $0x51525354, (%r14)
nop
nop
nop
nop
xor $52411, %rbx
// Store
lea addresses_US+0x1a3a7, %r15
nop
nop
nop
sub $11072, %rcx
movl $0x51525354, (%r15)
nop
nop
add %r14, %r14
// Faulty Load
lea addresses_WT+0xc7a7, %r15
and $52990, %rbp
vmovups (%r15), %ymm0
vextracti128 $1, %ymm0, %xmm0
vpextrq $1, %xmm0, %rdi
lea oracles, %r9
and $0xff, %rdi
shlq $12, %rdi
mov (%r9,%rdi,1), %rdi
pop %rdi
pop %rcx
pop %rbx
pop %rbp
pop %r9
pop %r15
pop %r14
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'size': 4, 'NT': True, 'type': 'addresses_WT', 'same': False, 'AVXalign': False, 'congruent': 0}}
{'OP': 'STOR', 'dst': {'size': 32, 'NT': False, 'type': 'addresses_PSE', 'same': False, 'AVXalign': False, 'congruent': 9}}
{'OP': 'STOR', 'dst': {'size': 8, 'NT': False, 'type': 'addresses_normal', 'same': False, 'AVXalign': False, 'congruent': 6}}
{'OP': 'LOAD', 'src': {'size': 2, 'NT': False, 'type': 'addresses_UC', 'same': False, 'AVXalign': False, 'congruent': 1}}
{'OP': 'LOAD', 'src': {'size': 4, 'NT': False, 'type': 'addresses_NC', 'same': False, 'AVXalign': False, 'congruent': 1}}
{'OP': 'LOAD', 'src': {'size': 8, 'NT': False, 'type': 'addresses_D', 'same': False, 'AVXalign': False, 'congruent': 9}}
{'OP': 'STOR', 'dst': {'size': 8, 'NT': False, 'type': 'addresses_D', 'same': False, 'AVXalign': False, 'congruent': 1}}
{'OP': 'LOAD', 'src': {'size': 1, 'NT': False, 'type': 'addresses_WT', 'same': True, 'AVXalign': False, 'congruent': 0}}
{'OP': 'STOR', 'dst': {'size': 4, 'NT': False, 'type': 'addresses_NC', 'same': False, 'AVXalign': False, 'congruent': 0}}
{'OP': 'STOR', 'dst': {'size': 4, 'NT': True, 'type': 'addresses_US', 'same': False, 'AVXalign': False, 'congruent': 9}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'size': 32, 'NT': False, 'type': 'addresses_WT', 'same': True, 'AVXalign': False, 'congruent': 0}}
<gen_prepare_buffer>
{'OP': 'LOAD', 'src': {'size': 16, 'NT': False, 'type': 'addresses_normal_ht', 'same': False, 'AVXalign': False, 'congruent': 9}}
{'OP': 'LOAD', 'src': {'size': 2, 'NT': True, 'type': 'addresses_D_ht', 'same': False, 'AVXalign': False, 'congruent': 9}}
{'OP': 'REPM', 'src': {'same': False, 'type': 'addresses_D_ht', 'congruent': 8}, 'dst': {'same': False, 'type': 'addresses_WT_ht', 'congruent': 0}}
{'OP': 'STOR', 'dst': {'size': 16, 'NT': False, 'type': 'addresses_normal_ht', 'same': False, 'AVXalign': False, 'congruent': 2}}
{'OP': 'STOR', 'dst': {'size': 8, 'NT': False, 'type': 'addresses_D_ht', 'same': False, 'AVXalign': False, 'congruent': 5}}
{'46': 2}
46 46
*/
| 19.596413 | 147 | 0.639359 |
c88c081911e9cb8d6e26b902f9b47feb14819cd3 | 42,296 | asm | Assembly | xv6/ln.asm | suriya-1403/suriya-s-XV6 | 20b673c3be1f83f7b3c8bf1de0ef6a77564bcb24 | [
"MIT"
] | 2 | 2022-01-11T20:12:26.000Z | 2022-01-17T19:55:04.000Z | xv6/ln.asm | Aravinda214/XV6 | 20b673c3be1f83f7b3c8bf1de0ef6a77564bcb24 | [
"MIT"
] | null | null | null | xv6/ln.asm | Aravinda214/XV6 | 20b673c3be1f83f7b3c8bf1de0ef6a77564bcb24 | [
"MIT"
] | 1 | 2021-08-20T21:44:41.000Z | 2021-08-20T21:44:41.000Z |
_ln: file format elf32-i386
Disassembly of section .text:
00000000 <main>:
#include "stat.h"
#include "user.h"
int
main(int argc, char *argv[])
{
0: 8d 4c 24 04 lea 0x4(%esp),%ecx
4: 83 e4 f0 and $0xfffffff0,%esp
7: ff 71 fc push -0x4(%ecx)
a: 55 push %ebp
b: 89 e5 mov %esp,%ebp
d: 53 push %ebx
e: 51 push %ecx
f: 89 cb mov %ecx,%ebx
if(argc != 3 && argc != 4){
11: 83 3b 03 cmpl $0x3,(%ebx)
14: 74 1c je 32 <main+0x32>
16: 83 3b 04 cmpl $0x4,(%ebx)
19: 74 17 je 32 <main+0x32>
printf(2, "Usage: ln old new\n");
1b: 83 ec 08 sub $0x8,%esp
1e: 68 5b 08 00 00 push $0x85b
23: 6a 02 push $0x2
25: e8 7a 04 00 00 call 4a4 <printf>
2a: 83 c4 10 add $0x10,%esp
exit();
2d: e8 ce 02 00 00 call 300 <exit>
// if(symlink(argv[2],argv[3]) < 0){
// printf(2,"symbolic link %s %s failed\n",argv[2],argv[3]);
// exit();
// }
// }
else if(link(argv[1], argv[2]) < 0)
32: 8b 43 04 mov 0x4(%ebx),%eax
35: 83 c0 08 add $0x8,%eax
38: 8b 10 mov (%eax),%edx
3a: 8b 43 04 mov 0x4(%ebx),%eax
3d: 83 c0 04 add $0x4,%eax
40: 8b 00 mov (%eax),%eax
42: 83 ec 08 sub $0x8,%esp
45: 52 push %edx
46: 50 push %eax
47: e8 14 03 00 00 call 360 <link>
4c: 83 c4 10 add $0x10,%esp
4f: 85 c0 test %eax,%eax
51: 79 21 jns 74 <main+0x74>
printf(2, "hard link %s %s: failed\n", argv[1], argv[2]);
53: 8b 43 04 mov 0x4(%ebx),%eax
56: 83 c0 08 add $0x8,%eax
59: 8b 10 mov (%eax),%edx
5b: 8b 43 04 mov 0x4(%ebx),%eax
5e: 83 c0 04 add $0x4,%eax
61: 8b 00 mov (%eax),%eax
63: 52 push %edx
64: 50 push %eax
65: 68 6e 08 00 00 push $0x86e
6a: 6a 02 push $0x2
6c: e8 33 04 00 00 call 4a4 <printf>
71: 83 c4 10 add $0x10,%esp
exit();
74: e8 87 02 00 00 call 300 <exit>
00000079 <stosb>:
"cc");
}
static inline void
stosb(void *addr, int data, int cnt)
{
79: 55 push %ebp
7a: 89 e5 mov %esp,%ebp
7c: 57 push %edi
7d: 53 push %ebx
asm volatile("cld; rep stosb" :
7e: 8b 4d 08 mov 0x8(%ebp),%ecx
81: 8b 55 10 mov 0x10(%ebp),%edx
84: 8b 45 0c mov 0xc(%ebp),%eax
87: 89 cb mov %ecx,%ebx
89: 89 df mov %ebx,%edi
8b: 89 d1 mov %edx,%ecx
8d: fc cld
8e: f3 aa rep stos %al,%es:(%edi)
90: 89 ca mov %ecx,%edx
92: 89 fb mov %edi,%ebx
94: 89 5d 08 mov %ebx,0x8(%ebp)
97: 89 55 10 mov %edx,0x10(%ebp)
"=D" (addr), "=c" (cnt) :
"0" (addr), "1" (cnt), "a" (data) :
"memory", "cc");
}
9a: 90 nop
9b: 5b pop %ebx
9c: 5f pop %edi
9d: 5d pop %ebp
9e: c3 ret
0000009f <strcpy>:
#include "user.h"
#include "x86.h"
char*
strcpy(char *s, char *t)
{
9f: 55 push %ebp
a0: 89 e5 mov %esp,%ebp
a2: 83 ec 10 sub $0x10,%esp
char *os;
os = s;
a5: 8b 45 08 mov 0x8(%ebp),%eax
a8: 89 45 fc mov %eax,-0x4(%ebp)
while((*s++ = *t++) != 0)
ab: 90 nop
ac: 8b 55 0c mov 0xc(%ebp),%edx
af: 8d 42 01 lea 0x1(%edx),%eax
b2: 89 45 0c mov %eax,0xc(%ebp)
b5: 8b 45 08 mov 0x8(%ebp),%eax
b8: 8d 48 01 lea 0x1(%eax),%ecx
bb: 89 4d 08 mov %ecx,0x8(%ebp)
be: 0f b6 12 movzbl (%edx),%edx
c1: 88 10 mov %dl,(%eax)
c3: 0f b6 00 movzbl (%eax),%eax
c6: 84 c0 test %al,%al
c8: 75 e2 jne ac <strcpy+0xd>
;
return os;
ca: 8b 45 fc mov -0x4(%ebp),%eax
}
cd: c9 leave
ce: c3 ret
000000cf <strcmp>:
int
strcmp(const char *p, const char *q)
{
cf: 55 push %ebp
d0: 89 e5 mov %esp,%ebp
while(*p && *p == *q)
d2: eb 08 jmp dc <strcmp+0xd>
p++, q++;
d4: 83 45 08 01 addl $0x1,0x8(%ebp)
d8: 83 45 0c 01 addl $0x1,0xc(%ebp)
while(*p && *p == *q)
dc: 8b 45 08 mov 0x8(%ebp),%eax
df: 0f b6 00 movzbl (%eax),%eax
e2: 84 c0 test %al,%al
e4: 74 10 je f6 <strcmp+0x27>
e6: 8b 45 08 mov 0x8(%ebp),%eax
e9: 0f b6 10 movzbl (%eax),%edx
ec: 8b 45 0c mov 0xc(%ebp),%eax
ef: 0f b6 00 movzbl (%eax),%eax
f2: 38 c2 cmp %al,%dl
f4: 74 de je d4 <strcmp+0x5>
return (uchar)*p - (uchar)*q;
f6: 8b 45 08 mov 0x8(%ebp),%eax
f9: 0f b6 00 movzbl (%eax),%eax
fc: 0f b6 d0 movzbl %al,%edx
ff: 8b 45 0c mov 0xc(%ebp),%eax
102: 0f b6 00 movzbl (%eax),%eax
105: 0f b6 c8 movzbl %al,%ecx
108: 89 d0 mov %edx,%eax
10a: 29 c8 sub %ecx,%eax
}
10c: 5d pop %ebp
10d: c3 ret
0000010e <strlen>:
uint
strlen(char *s)
{
10e: 55 push %ebp
10f: 89 e5 mov %esp,%ebp
111: 83 ec 10 sub $0x10,%esp
int n;
for(n = 0; s[n]; n++)
114: c7 45 fc 00 00 00 00 movl $0x0,-0x4(%ebp)
11b: eb 04 jmp 121 <strlen+0x13>
11d: 83 45 fc 01 addl $0x1,-0x4(%ebp)
121: 8b 55 fc mov -0x4(%ebp),%edx
124: 8b 45 08 mov 0x8(%ebp),%eax
127: 01 d0 add %edx,%eax
129: 0f b6 00 movzbl (%eax),%eax
12c: 84 c0 test %al,%al
12e: 75 ed jne 11d <strlen+0xf>
;
return n;
130: 8b 45 fc mov -0x4(%ebp),%eax
}
133: c9 leave
134: c3 ret
00000135 <memset>:
void*
memset(void *dst, int c, uint n)
{
135: 55 push %ebp
136: 89 e5 mov %esp,%ebp
stosb(dst, c, n);
138: 8b 45 10 mov 0x10(%ebp),%eax
13b: 50 push %eax
13c: ff 75 0c push 0xc(%ebp)
13f: ff 75 08 push 0x8(%ebp)
142: e8 32 ff ff ff call 79 <stosb>
147: 83 c4 0c add $0xc,%esp
return dst;
14a: 8b 45 08 mov 0x8(%ebp),%eax
}
14d: c9 leave
14e: c3 ret
0000014f <strchr>:
char*
strchr(const char *s, char c)
{
14f: 55 push %ebp
150: 89 e5 mov %esp,%ebp
152: 83 ec 04 sub $0x4,%esp
155: 8b 45 0c mov 0xc(%ebp),%eax
158: 88 45 fc mov %al,-0x4(%ebp)
for(; *s; s++)
15b: eb 14 jmp 171 <strchr+0x22>
if(*s == c)
15d: 8b 45 08 mov 0x8(%ebp),%eax
160: 0f b6 00 movzbl (%eax),%eax
163: 38 45 fc cmp %al,-0x4(%ebp)
166: 75 05 jne 16d <strchr+0x1e>
return (char*)s;
168: 8b 45 08 mov 0x8(%ebp),%eax
16b: eb 13 jmp 180 <strchr+0x31>
for(; *s; s++)
16d: 83 45 08 01 addl $0x1,0x8(%ebp)
171: 8b 45 08 mov 0x8(%ebp),%eax
174: 0f b6 00 movzbl (%eax),%eax
177: 84 c0 test %al,%al
179: 75 e2 jne 15d <strchr+0xe>
return 0;
17b: b8 00 00 00 00 mov $0x0,%eax
}
180: c9 leave
181: c3 ret
00000182 <gets>:
char*
gets(char *buf, int max)
{
182: 55 push %ebp
183: 89 e5 mov %esp,%ebp
185: 83 ec 18 sub $0x18,%esp
int i, cc;
char c;
for(i=0; i+1 < max; ){
188: c7 45 f4 00 00 00 00 movl $0x0,-0xc(%ebp)
18f: eb 42 jmp 1d3 <gets+0x51>
cc = read(0, &c, 1);
191: 83 ec 04 sub $0x4,%esp
194: 6a 01 push $0x1
196: 8d 45 ef lea -0x11(%ebp),%eax
199: 50 push %eax
19a: 6a 00 push $0x0
19c: e8 77 01 00 00 call 318 <read>
1a1: 83 c4 10 add $0x10,%esp
1a4: 89 45 f0 mov %eax,-0x10(%ebp)
if(cc < 1)
1a7: 83 7d f0 00 cmpl $0x0,-0x10(%ebp)
1ab: 7e 33 jle 1e0 <gets+0x5e>
break;
buf[i++] = c;
1ad: 8b 45 f4 mov -0xc(%ebp),%eax
1b0: 8d 50 01 lea 0x1(%eax),%edx
1b3: 89 55 f4 mov %edx,-0xc(%ebp)
1b6: 89 c2 mov %eax,%edx
1b8: 8b 45 08 mov 0x8(%ebp),%eax
1bb: 01 c2 add %eax,%edx
1bd: 0f b6 45 ef movzbl -0x11(%ebp),%eax
1c1: 88 02 mov %al,(%edx)
if(c == '\n' || c == '\r')
1c3: 0f b6 45 ef movzbl -0x11(%ebp),%eax
1c7: 3c 0a cmp $0xa,%al
1c9: 74 16 je 1e1 <gets+0x5f>
1cb: 0f b6 45 ef movzbl -0x11(%ebp),%eax
1cf: 3c 0d cmp $0xd,%al
1d1: 74 0e je 1e1 <gets+0x5f>
for(i=0; i+1 < max; ){
1d3: 8b 45 f4 mov -0xc(%ebp),%eax
1d6: 83 c0 01 add $0x1,%eax
1d9: 39 45 0c cmp %eax,0xc(%ebp)
1dc: 7f b3 jg 191 <gets+0xf>
1de: eb 01 jmp 1e1 <gets+0x5f>
break;
1e0: 90 nop
break;
}
buf[i] = '\0';
1e1: 8b 55 f4 mov -0xc(%ebp),%edx
1e4: 8b 45 08 mov 0x8(%ebp),%eax
1e7: 01 d0 add %edx,%eax
1e9: c6 00 00 movb $0x0,(%eax)
return buf;
1ec: 8b 45 08 mov 0x8(%ebp),%eax
}
1ef: c9 leave
1f0: c3 ret
000001f1 <stat>:
int
stat(char *n, struct stat *st)
{
1f1: 55 push %ebp
1f2: 89 e5 mov %esp,%ebp
1f4: 83 ec 18 sub $0x18,%esp
int fd;
int r;
fd = open(n, O_RDONLY);
1f7: 83 ec 08 sub $0x8,%esp
1fa: 6a 00 push $0x0
1fc: ff 75 08 push 0x8(%ebp)
1ff: e8 3c 01 00 00 call 340 <open>
204: 83 c4 10 add $0x10,%esp
207: 89 45 f4 mov %eax,-0xc(%ebp)
if(fd < 0)
20a: 83 7d f4 00 cmpl $0x0,-0xc(%ebp)
20e: 79 07 jns 217 <stat+0x26>
return -1;
210: b8 ff ff ff ff mov $0xffffffff,%eax
215: eb 25 jmp 23c <stat+0x4b>
r = fstat(fd, st);
217: 83 ec 08 sub $0x8,%esp
21a: ff 75 0c push 0xc(%ebp)
21d: ff 75 f4 push -0xc(%ebp)
220: e8 33 01 00 00 call 358 <fstat>
225: 83 c4 10 add $0x10,%esp
228: 89 45 f0 mov %eax,-0x10(%ebp)
close(fd);
22b: 83 ec 0c sub $0xc,%esp
22e: ff 75 f4 push -0xc(%ebp)
231: e8 f2 00 00 00 call 328 <close>
236: 83 c4 10 add $0x10,%esp
return r;
239: 8b 45 f0 mov -0x10(%ebp),%eax
}
23c: c9 leave
23d: c3 ret
0000023e <atoi>:
int
atoi(const char *s)
{
23e: 55 push %ebp
23f: 89 e5 mov %esp,%ebp
241: 83 ec 10 sub $0x10,%esp
int n;
n = 0;
244: c7 45 fc 00 00 00 00 movl $0x0,-0x4(%ebp)
while('0' <= *s && *s <= '9')
24b: eb 25 jmp 272 <atoi+0x34>
n = n*10 + *s++ - '0';
24d: 8b 55 fc mov -0x4(%ebp),%edx
250: 89 d0 mov %edx,%eax
252: c1 e0 02 shl $0x2,%eax
255: 01 d0 add %edx,%eax
257: 01 c0 add %eax,%eax
259: 89 c1 mov %eax,%ecx
25b: 8b 45 08 mov 0x8(%ebp),%eax
25e: 8d 50 01 lea 0x1(%eax),%edx
261: 89 55 08 mov %edx,0x8(%ebp)
264: 0f b6 00 movzbl (%eax),%eax
267: 0f be c0 movsbl %al,%eax
26a: 01 c8 add %ecx,%eax
26c: 83 e8 30 sub $0x30,%eax
26f: 89 45 fc mov %eax,-0x4(%ebp)
while('0' <= *s && *s <= '9')
272: 8b 45 08 mov 0x8(%ebp),%eax
275: 0f b6 00 movzbl (%eax),%eax
278: 3c 2f cmp $0x2f,%al
27a: 7e 0a jle 286 <atoi+0x48>
27c: 8b 45 08 mov 0x8(%ebp),%eax
27f: 0f b6 00 movzbl (%eax),%eax
282: 3c 39 cmp $0x39,%al
284: 7e c7 jle 24d <atoi+0xf>
return n;
286: 8b 45 fc mov -0x4(%ebp),%eax
}
289: c9 leave
28a: c3 ret
0000028b <memmove>:
void*
memmove(void *vdst, void *vsrc, int n)
{
28b: 55 push %ebp
28c: 89 e5 mov %esp,%ebp
28e: 83 ec 10 sub $0x10,%esp
char *dst, *src;
dst = vdst;
291: 8b 45 08 mov 0x8(%ebp),%eax
294: 89 45 fc mov %eax,-0x4(%ebp)
src = vsrc;
297: 8b 45 0c mov 0xc(%ebp),%eax
29a: 89 45 f8 mov %eax,-0x8(%ebp)
while(n-- > 0)
29d: eb 17 jmp 2b6 <memmove+0x2b>
*dst++ = *src++;
29f: 8b 55 f8 mov -0x8(%ebp),%edx
2a2: 8d 42 01 lea 0x1(%edx),%eax
2a5: 89 45 f8 mov %eax,-0x8(%ebp)
2a8: 8b 45 fc mov -0x4(%ebp),%eax
2ab: 8d 48 01 lea 0x1(%eax),%ecx
2ae: 89 4d fc mov %ecx,-0x4(%ebp)
2b1: 0f b6 12 movzbl (%edx),%edx
2b4: 88 10 mov %dl,(%eax)
while(n-- > 0)
2b6: 8b 45 10 mov 0x10(%ebp),%eax
2b9: 8d 50 ff lea -0x1(%eax),%edx
2bc: 89 55 10 mov %edx,0x10(%ebp)
2bf: 85 c0 test %eax,%eax
2c1: 7f dc jg 29f <memmove+0x14>
return vdst;
2c3: 8b 45 08 mov 0x8(%ebp),%eax
}
2c6: c9 leave
2c7: c3 ret
000002c8 <restorer>:
2c8: 83 c4 0c add $0xc,%esp
2cb: 5a pop %edx
2cc: 59 pop %ecx
2cd: 58 pop %eax
2ce: c3 ret
000002cf <signal>:
"pop %ecx\n\t"
"pop %eax\n\t"
"ret\n\t");
int signal(int signum, void(*handler)(int))
{
2cf: 55 push %ebp
2d0: 89 e5 mov %esp,%ebp
2d2: 83 ec 08 sub $0x8,%esp
signal_restorer(restorer);
2d5: 83 ec 0c sub $0xc,%esp
2d8: 68 c8 02 00 00 push $0x2c8
2dd: e8 ce 00 00 00 call 3b0 <signal_restorer>
2e2: 83 c4 10 add $0x10,%esp
return signal_register(signum, handler);
2e5: 83 ec 08 sub $0x8,%esp
2e8: ff 75 0c push 0xc(%ebp)
2eb: ff 75 08 push 0x8(%ebp)
2ee: e8 b5 00 00 00 call 3a8 <signal_register>
2f3: 83 c4 10 add $0x10,%esp
2f6: c9 leave
2f7: c3 ret
000002f8 <fork>:
name: \
movl $SYS_ ## name, %eax; \
int $T_SYSCALL; \
ret
SYSCALL(fork)
2f8: b8 01 00 00 00 mov $0x1,%eax
2fd: cd 40 int $0x40
2ff: c3 ret
00000300 <exit>:
SYSCALL(exit)
300: b8 02 00 00 00 mov $0x2,%eax
305: cd 40 int $0x40
307: c3 ret
00000308 <wait>:
SYSCALL(wait)
308: b8 03 00 00 00 mov $0x3,%eax
30d: cd 40 int $0x40
30f: c3 ret
00000310 <pipe>:
SYSCALL(pipe)
310: b8 04 00 00 00 mov $0x4,%eax
315: cd 40 int $0x40
317: c3 ret
00000318 <read>:
SYSCALL(read)
318: b8 05 00 00 00 mov $0x5,%eax
31d: cd 40 int $0x40
31f: c3 ret
00000320 <write>:
SYSCALL(write)
320: b8 10 00 00 00 mov $0x10,%eax
325: cd 40 int $0x40
327: c3 ret
00000328 <close>:
SYSCALL(close)
328: b8 15 00 00 00 mov $0x15,%eax
32d: cd 40 int $0x40
32f: c3 ret
00000330 <kill>:
SYSCALL(kill)
330: b8 06 00 00 00 mov $0x6,%eax
335: cd 40 int $0x40
337: c3 ret
00000338 <exec>:
SYSCALL(exec)
338: b8 07 00 00 00 mov $0x7,%eax
33d: cd 40 int $0x40
33f: c3 ret
00000340 <open>:
SYSCALL(open)
340: b8 0f 00 00 00 mov $0xf,%eax
345: cd 40 int $0x40
347: c3 ret
00000348 <mknod>:
SYSCALL(mknod)
348: b8 11 00 00 00 mov $0x11,%eax
34d: cd 40 int $0x40
34f: c3 ret
00000350 <unlink>:
SYSCALL(unlink)
350: b8 12 00 00 00 mov $0x12,%eax
355: cd 40 int $0x40
357: c3 ret
00000358 <fstat>:
SYSCALL(fstat)
358: b8 08 00 00 00 mov $0x8,%eax
35d: cd 40 int $0x40
35f: c3 ret
00000360 <link>:
SYSCALL(link)
360: b8 13 00 00 00 mov $0x13,%eax
365: cd 40 int $0x40
367: c3 ret
00000368 <mkdir>:
SYSCALL(mkdir)
368: b8 14 00 00 00 mov $0x14,%eax
36d: cd 40 int $0x40
36f: c3 ret
00000370 <chdir>:
SYSCALL(chdir)
370: b8 09 00 00 00 mov $0x9,%eax
375: cd 40 int $0x40
377: c3 ret
00000378 <dup>:
SYSCALL(dup)
378: b8 0a 00 00 00 mov $0xa,%eax
37d: cd 40 int $0x40
37f: c3 ret
00000380 <getpid>:
SYSCALL(getpid)
380: b8 0b 00 00 00 mov $0xb,%eax
385: cd 40 int $0x40
387: c3 ret
00000388 <sbrk>:
SYSCALL(sbrk)
388: b8 0c 00 00 00 mov $0xc,%eax
38d: cd 40 int $0x40
38f: c3 ret
00000390 <sleep>:
SYSCALL(sleep)
390: b8 0d 00 00 00 mov $0xd,%eax
395: cd 40 int $0x40
397: c3 ret
00000398 <uptime>:
SYSCALL(uptime)
398: b8 0e 00 00 00 mov $0xe,%eax
39d: cd 40 int $0x40
39f: c3 ret
000003a0 <halt>:
SYSCALL(halt)
3a0: b8 16 00 00 00 mov $0x16,%eax
3a5: cd 40 int $0x40
3a7: c3 ret
000003a8 <signal_register>:
SYSCALL(signal_register)
3a8: b8 17 00 00 00 mov $0x17,%eax
3ad: cd 40 int $0x40
3af: c3 ret
000003b0 <signal_restorer>:
SYSCALL(signal_restorer)
3b0: b8 18 00 00 00 mov $0x18,%eax
3b5: cd 40 int $0x40
3b7: c3 ret
000003b8 <mprotect>:
SYSCALL(mprotect)
3b8: b8 19 00 00 00 mov $0x19,%eax
3bd: cd 40 int $0x40
3bf: c3 ret
000003c0 <cowfork>:
SYSCALL(cowfork)
3c0: b8 1a 00 00 00 mov $0x1a,%eax
3c5: cd 40 int $0x40
3c7: c3 ret
000003c8 <dsbrk>:
SYSCALL(dsbrk)
3c8: b8 1b 00 00 00 mov $0x1b,%eax
3cd: cd 40 int $0x40
3cf: c3 ret
000003d0 <putc>:
#include "stat.h"
#include "user.h"
static void
putc(int fd, char c)
{
3d0: 55 push %ebp
3d1: 89 e5 mov %esp,%ebp
3d3: 83 ec 18 sub $0x18,%esp
3d6: 8b 45 0c mov 0xc(%ebp),%eax
3d9: 88 45 f4 mov %al,-0xc(%ebp)
write(fd, &c, 1);
3dc: 83 ec 04 sub $0x4,%esp
3df: 6a 01 push $0x1
3e1: 8d 45 f4 lea -0xc(%ebp),%eax
3e4: 50 push %eax
3e5: ff 75 08 push 0x8(%ebp)
3e8: e8 33 ff ff ff call 320 <write>
3ed: 83 c4 10 add $0x10,%esp
}
3f0: 90 nop
3f1: c9 leave
3f2: c3 ret
000003f3 <printint>:
static void
printint(int fd, int xx, int base, int sgn)
{
3f3: 55 push %ebp
3f4: 89 e5 mov %esp,%ebp
3f6: 83 ec 28 sub $0x28,%esp
static char digits[] = "0123456789ABCDEF";
char buf[16];
int i, neg;
uint x;
neg = 0;
3f9: c7 45 f0 00 00 00 00 movl $0x0,-0x10(%ebp)
if(sgn && xx < 0){
400: 83 7d 14 00 cmpl $0x0,0x14(%ebp)
404: 74 17 je 41d <printint+0x2a>
406: 83 7d 0c 00 cmpl $0x0,0xc(%ebp)
40a: 79 11 jns 41d <printint+0x2a>
neg = 1;
40c: c7 45 f0 01 00 00 00 movl $0x1,-0x10(%ebp)
x = -xx;
413: 8b 45 0c mov 0xc(%ebp),%eax
416: f7 d8 neg %eax
418: 89 45 ec mov %eax,-0x14(%ebp)
41b: eb 06 jmp 423 <printint+0x30>
} else {
x = xx;
41d: 8b 45 0c mov 0xc(%ebp),%eax
420: 89 45 ec mov %eax,-0x14(%ebp)
}
i = 0;
423: c7 45 f4 00 00 00 00 movl $0x0,-0xc(%ebp)
do{
buf[i++] = digits[x % base];
42a: 8b 4d 10 mov 0x10(%ebp),%ecx
42d: 8b 45 ec mov -0x14(%ebp),%eax
430: ba 00 00 00 00 mov $0x0,%edx
435: f7 f1 div %ecx
437: 89 d1 mov %edx,%ecx
439: 8b 45 f4 mov -0xc(%ebp),%eax
43c: 8d 50 01 lea 0x1(%eax),%edx
43f: 89 55 f4 mov %edx,-0xc(%ebp)
442: 0f b6 91 90 08 00 00 movzbl 0x890(%ecx),%edx
449: 88 54 05 dc mov %dl,-0x24(%ebp,%eax,1)
}while((x /= base) != 0);
44d: 8b 4d 10 mov 0x10(%ebp),%ecx
450: 8b 45 ec mov -0x14(%ebp),%eax
453: ba 00 00 00 00 mov $0x0,%edx
458: f7 f1 div %ecx
45a: 89 45 ec mov %eax,-0x14(%ebp)
45d: 83 7d ec 00 cmpl $0x0,-0x14(%ebp)
461: 75 c7 jne 42a <printint+0x37>
if(neg)
463: 83 7d f0 00 cmpl $0x0,-0x10(%ebp)
467: 74 2d je 496 <printint+0xa3>
buf[i++] = '-';
469: 8b 45 f4 mov -0xc(%ebp),%eax
46c: 8d 50 01 lea 0x1(%eax),%edx
46f: 89 55 f4 mov %edx,-0xc(%ebp)
472: c6 44 05 dc 2d movb $0x2d,-0x24(%ebp,%eax,1)
while(--i >= 0)
477: eb 1d jmp 496 <printint+0xa3>
putc(fd, buf[i]);
479: 8d 55 dc lea -0x24(%ebp),%edx
47c: 8b 45 f4 mov -0xc(%ebp),%eax
47f: 01 d0 add %edx,%eax
481: 0f b6 00 movzbl (%eax),%eax
484: 0f be c0 movsbl %al,%eax
487: 83 ec 08 sub $0x8,%esp
48a: 50 push %eax
48b: ff 75 08 push 0x8(%ebp)
48e: e8 3d ff ff ff call 3d0 <putc>
493: 83 c4 10 add $0x10,%esp
while(--i >= 0)
496: 83 6d f4 01 subl $0x1,-0xc(%ebp)
49a: 83 7d f4 00 cmpl $0x0,-0xc(%ebp)
49e: 79 d9 jns 479 <printint+0x86>
}
4a0: 90 nop
4a1: 90 nop
4a2: c9 leave
4a3: c3 ret
000004a4 <printf>:
// Print to the given fd. Only understands %d, %x, %p, %s.
void
printf(int fd, char *fmt, ...)
{
4a4: 55 push %ebp
4a5: 89 e5 mov %esp,%ebp
4a7: 83 ec 28 sub $0x28,%esp
char *s;
int c, i, state;
uint *ap;
state = 0;
4aa: c7 45 ec 00 00 00 00 movl $0x0,-0x14(%ebp)
ap = (uint*)(void*)&fmt + 1;
4b1: 8d 45 0c lea 0xc(%ebp),%eax
4b4: 83 c0 04 add $0x4,%eax
4b7: 89 45 e8 mov %eax,-0x18(%ebp)
for(i = 0; fmt[i]; i++){
4ba: c7 45 f0 00 00 00 00 movl $0x0,-0x10(%ebp)
4c1: e9 59 01 00 00 jmp 61f <printf+0x17b>
c = fmt[i] & 0xff;
4c6: 8b 55 0c mov 0xc(%ebp),%edx
4c9: 8b 45 f0 mov -0x10(%ebp),%eax
4cc: 01 d0 add %edx,%eax
4ce: 0f b6 00 movzbl (%eax),%eax
4d1: 0f be c0 movsbl %al,%eax
4d4: 25 ff 00 00 00 and $0xff,%eax
4d9: 89 45 e4 mov %eax,-0x1c(%ebp)
if(state == 0){
4dc: 83 7d ec 00 cmpl $0x0,-0x14(%ebp)
4e0: 75 2c jne 50e <printf+0x6a>
if(c == '%'){
4e2: 83 7d e4 25 cmpl $0x25,-0x1c(%ebp)
4e6: 75 0c jne 4f4 <printf+0x50>
state = '%';
4e8: c7 45 ec 25 00 00 00 movl $0x25,-0x14(%ebp)
4ef: e9 27 01 00 00 jmp 61b <printf+0x177>
} else {
putc(fd, c);
4f4: 8b 45 e4 mov -0x1c(%ebp),%eax
4f7: 0f be c0 movsbl %al,%eax
4fa: 83 ec 08 sub $0x8,%esp
4fd: 50 push %eax
4fe: ff 75 08 push 0x8(%ebp)
501: e8 ca fe ff ff call 3d0 <putc>
506: 83 c4 10 add $0x10,%esp
509: e9 0d 01 00 00 jmp 61b <printf+0x177>
}
} else if(state == '%'){
50e: 83 7d ec 25 cmpl $0x25,-0x14(%ebp)
512: 0f 85 03 01 00 00 jne 61b <printf+0x177>
if(c == 'd'){
518: 83 7d e4 64 cmpl $0x64,-0x1c(%ebp)
51c: 75 1e jne 53c <printf+0x98>
printint(fd, *ap, 10, 1);
51e: 8b 45 e8 mov -0x18(%ebp),%eax
521: 8b 00 mov (%eax),%eax
523: 6a 01 push $0x1
525: 6a 0a push $0xa
527: 50 push %eax
528: ff 75 08 push 0x8(%ebp)
52b: e8 c3 fe ff ff call 3f3 <printint>
530: 83 c4 10 add $0x10,%esp
ap++;
533: 83 45 e8 04 addl $0x4,-0x18(%ebp)
537: e9 d8 00 00 00 jmp 614 <printf+0x170>
} else if(c == 'x' || c == 'p'){
53c: 83 7d e4 78 cmpl $0x78,-0x1c(%ebp)
540: 74 06 je 548 <printf+0xa4>
542: 83 7d e4 70 cmpl $0x70,-0x1c(%ebp)
546: 75 1e jne 566 <printf+0xc2>
printint(fd, *ap, 16, 0);
548: 8b 45 e8 mov -0x18(%ebp),%eax
54b: 8b 00 mov (%eax),%eax
54d: 6a 00 push $0x0
54f: 6a 10 push $0x10
551: 50 push %eax
552: ff 75 08 push 0x8(%ebp)
555: e8 99 fe ff ff call 3f3 <printint>
55a: 83 c4 10 add $0x10,%esp
ap++;
55d: 83 45 e8 04 addl $0x4,-0x18(%ebp)
561: e9 ae 00 00 00 jmp 614 <printf+0x170>
} else if(c == 's'){
566: 83 7d e4 73 cmpl $0x73,-0x1c(%ebp)
56a: 75 43 jne 5af <printf+0x10b>
s = (char*)*ap;
56c: 8b 45 e8 mov -0x18(%ebp),%eax
56f: 8b 00 mov (%eax),%eax
571: 89 45 f4 mov %eax,-0xc(%ebp)
ap++;
574: 83 45 e8 04 addl $0x4,-0x18(%ebp)
if(s == 0)
578: 83 7d f4 00 cmpl $0x0,-0xc(%ebp)
57c: 75 25 jne 5a3 <printf+0xff>
s = "(null)";
57e: c7 45 f4 87 08 00 00 movl $0x887,-0xc(%ebp)
while(*s != 0){
585: eb 1c jmp 5a3 <printf+0xff>
putc(fd, *s);
587: 8b 45 f4 mov -0xc(%ebp),%eax
58a: 0f b6 00 movzbl (%eax),%eax
58d: 0f be c0 movsbl %al,%eax
590: 83 ec 08 sub $0x8,%esp
593: 50 push %eax
594: ff 75 08 push 0x8(%ebp)
597: e8 34 fe ff ff call 3d0 <putc>
59c: 83 c4 10 add $0x10,%esp
s++;
59f: 83 45 f4 01 addl $0x1,-0xc(%ebp)
while(*s != 0){
5a3: 8b 45 f4 mov -0xc(%ebp),%eax
5a6: 0f b6 00 movzbl (%eax),%eax
5a9: 84 c0 test %al,%al
5ab: 75 da jne 587 <printf+0xe3>
5ad: eb 65 jmp 614 <printf+0x170>
}
} else if(c == 'c'){
5af: 83 7d e4 63 cmpl $0x63,-0x1c(%ebp)
5b3: 75 1d jne 5d2 <printf+0x12e>
putc(fd, *ap);
5b5: 8b 45 e8 mov -0x18(%ebp),%eax
5b8: 8b 00 mov (%eax),%eax
5ba: 0f be c0 movsbl %al,%eax
5bd: 83 ec 08 sub $0x8,%esp
5c0: 50 push %eax
5c1: ff 75 08 push 0x8(%ebp)
5c4: e8 07 fe ff ff call 3d0 <putc>
5c9: 83 c4 10 add $0x10,%esp
ap++;
5cc: 83 45 e8 04 addl $0x4,-0x18(%ebp)
5d0: eb 42 jmp 614 <printf+0x170>
} else if(c == '%'){
5d2: 83 7d e4 25 cmpl $0x25,-0x1c(%ebp)
5d6: 75 17 jne 5ef <printf+0x14b>
putc(fd, c);
5d8: 8b 45 e4 mov -0x1c(%ebp),%eax
5db: 0f be c0 movsbl %al,%eax
5de: 83 ec 08 sub $0x8,%esp
5e1: 50 push %eax
5e2: ff 75 08 push 0x8(%ebp)
5e5: e8 e6 fd ff ff call 3d0 <putc>
5ea: 83 c4 10 add $0x10,%esp
5ed: eb 25 jmp 614 <printf+0x170>
} else {
// Unknown % sequence. Print it to draw attention.
putc(fd, '%');
5ef: 83 ec 08 sub $0x8,%esp
5f2: 6a 25 push $0x25
5f4: ff 75 08 push 0x8(%ebp)
5f7: e8 d4 fd ff ff call 3d0 <putc>
5fc: 83 c4 10 add $0x10,%esp
putc(fd, c);
5ff: 8b 45 e4 mov -0x1c(%ebp),%eax
602: 0f be c0 movsbl %al,%eax
605: 83 ec 08 sub $0x8,%esp
608: 50 push %eax
609: ff 75 08 push 0x8(%ebp)
60c: e8 bf fd ff ff call 3d0 <putc>
611: 83 c4 10 add $0x10,%esp
}
state = 0;
614: c7 45 ec 00 00 00 00 movl $0x0,-0x14(%ebp)
for(i = 0; fmt[i]; i++){
61b: 83 45 f0 01 addl $0x1,-0x10(%ebp)
61f: 8b 55 0c mov 0xc(%ebp),%edx
622: 8b 45 f0 mov -0x10(%ebp),%eax
625: 01 d0 add %edx,%eax
627: 0f b6 00 movzbl (%eax),%eax
62a: 84 c0 test %al,%al
62c: 0f 85 94 fe ff ff jne 4c6 <printf+0x22>
}
}
}
632: 90 nop
633: 90 nop
634: c9 leave
635: c3 ret
00000636 <free>:
static Header base;
static Header *freep;
void
free(void *ap)
{
636: 55 push %ebp
637: 89 e5 mov %esp,%ebp
639: 83 ec 10 sub $0x10,%esp
Header *bp, *p;
bp = (Header*)ap - 1;
63c: 8b 45 08 mov 0x8(%ebp),%eax
63f: 83 e8 08 sub $0x8,%eax
642: 89 45 f8 mov %eax,-0x8(%ebp)
for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr)
645: a1 ac 08 00 00 mov 0x8ac,%eax
64a: 89 45 fc mov %eax,-0x4(%ebp)
64d: eb 24 jmp 673 <free+0x3d>
if(p >= p->s.ptr && (bp > p || bp < p->s.ptr))
64f: 8b 45 fc mov -0x4(%ebp),%eax
652: 8b 00 mov (%eax),%eax
654: 39 45 fc cmp %eax,-0x4(%ebp)
657: 72 12 jb 66b <free+0x35>
659: 8b 45 f8 mov -0x8(%ebp),%eax
65c: 3b 45 fc cmp -0x4(%ebp),%eax
65f: 77 24 ja 685 <free+0x4f>
661: 8b 45 fc mov -0x4(%ebp),%eax
664: 8b 00 mov (%eax),%eax
666: 39 45 f8 cmp %eax,-0x8(%ebp)
669: 72 1a jb 685 <free+0x4f>
for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr)
66b: 8b 45 fc mov -0x4(%ebp),%eax
66e: 8b 00 mov (%eax),%eax
670: 89 45 fc mov %eax,-0x4(%ebp)
673: 8b 45 f8 mov -0x8(%ebp),%eax
676: 3b 45 fc cmp -0x4(%ebp),%eax
679: 76 d4 jbe 64f <free+0x19>
67b: 8b 45 fc mov -0x4(%ebp),%eax
67e: 8b 00 mov (%eax),%eax
680: 39 45 f8 cmp %eax,-0x8(%ebp)
683: 73 ca jae 64f <free+0x19>
break;
if(bp + bp->s.size == p->s.ptr){
685: 8b 45 f8 mov -0x8(%ebp),%eax
688: 8b 40 04 mov 0x4(%eax),%eax
68b: 8d 14 c5 00 00 00 00 lea 0x0(,%eax,8),%edx
692: 8b 45 f8 mov -0x8(%ebp),%eax
695: 01 c2 add %eax,%edx
697: 8b 45 fc mov -0x4(%ebp),%eax
69a: 8b 00 mov (%eax),%eax
69c: 39 c2 cmp %eax,%edx
69e: 75 24 jne 6c4 <free+0x8e>
bp->s.size += p->s.ptr->s.size;
6a0: 8b 45 f8 mov -0x8(%ebp),%eax
6a3: 8b 50 04 mov 0x4(%eax),%edx
6a6: 8b 45 fc mov -0x4(%ebp),%eax
6a9: 8b 00 mov (%eax),%eax
6ab: 8b 40 04 mov 0x4(%eax),%eax
6ae: 01 c2 add %eax,%edx
6b0: 8b 45 f8 mov -0x8(%ebp),%eax
6b3: 89 50 04 mov %edx,0x4(%eax)
bp->s.ptr = p->s.ptr->s.ptr;
6b6: 8b 45 fc mov -0x4(%ebp),%eax
6b9: 8b 00 mov (%eax),%eax
6bb: 8b 10 mov (%eax),%edx
6bd: 8b 45 f8 mov -0x8(%ebp),%eax
6c0: 89 10 mov %edx,(%eax)
6c2: eb 0a jmp 6ce <free+0x98>
} else
bp->s.ptr = p->s.ptr;
6c4: 8b 45 fc mov -0x4(%ebp),%eax
6c7: 8b 10 mov (%eax),%edx
6c9: 8b 45 f8 mov -0x8(%ebp),%eax
6cc: 89 10 mov %edx,(%eax)
if(p + p->s.size == bp){
6ce: 8b 45 fc mov -0x4(%ebp),%eax
6d1: 8b 40 04 mov 0x4(%eax),%eax
6d4: 8d 14 c5 00 00 00 00 lea 0x0(,%eax,8),%edx
6db: 8b 45 fc mov -0x4(%ebp),%eax
6de: 01 d0 add %edx,%eax
6e0: 39 45 f8 cmp %eax,-0x8(%ebp)
6e3: 75 20 jne 705 <free+0xcf>
p->s.size += bp->s.size;
6e5: 8b 45 fc mov -0x4(%ebp),%eax
6e8: 8b 50 04 mov 0x4(%eax),%edx
6eb: 8b 45 f8 mov -0x8(%ebp),%eax
6ee: 8b 40 04 mov 0x4(%eax),%eax
6f1: 01 c2 add %eax,%edx
6f3: 8b 45 fc mov -0x4(%ebp),%eax
6f6: 89 50 04 mov %edx,0x4(%eax)
p->s.ptr = bp->s.ptr;
6f9: 8b 45 f8 mov -0x8(%ebp),%eax
6fc: 8b 10 mov (%eax),%edx
6fe: 8b 45 fc mov -0x4(%ebp),%eax
701: 89 10 mov %edx,(%eax)
703: eb 08 jmp 70d <free+0xd7>
} else
p->s.ptr = bp;
705: 8b 45 fc mov -0x4(%ebp),%eax
708: 8b 55 f8 mov -0x8(%ebp),%edx
70b: 89 10 mov %edx,(%eax)
freep = p;
70d: 8b 45 fc mov -0x4(%ebp),%eax
710: a3 ac 08 00 00 mov %eax,0x8ac
}
715: 90 nop
716: c9 leave
717: c3 ret
00000718 <morecore>:
static Header*
morecore(uint nu)
{
718: 55 push %ebp
719: 89 e5 mov %esp,%ebp
71b: 83 ec 18 sub $0x18,%esp
char *p;
Header *hp;
if(nu < 4096)
71e: 81 7d 08 ff 0f 00 00 cmpl $0xfff,0x8(%ebp)
725: 77 07 ja 72e <morecore+0x16>
nu = 4096;
727: c7 45 08 00 10 00 00 movl $0x1000,0x8(%ebp)
p = sbrk(nu * sizeof(Header));
72e: 8b 45 08 mov 0x8(%ebp),%eax
731: c1 e0 03 shl $0x3,%eax
734: 83 ec 0c sub $0xc,%esp
737: 50 push %eax
738: e8 4b fc ff ff call 388 <sbrk>
73d: 83 c4 10 add $0x10,%esp
740: 89 45 f4 mov %eax,-0xc(%ebp)
if(p == (char*)-1)
743: 83 7d f4 ff cmpl $0xffffffff,-0xc(%ebp)
747: 75 07 jne 750 <morecore+0x38>
return 0;
749: b8 00 00 00 00 mov $0x0,%eax
74e: eb 26 jmp 776 <morecore+0x5e>
hp = (Header*)p;
750: 8b 45 f4 mov -0xc(%ebp),%eax
753: 89 45 f0 mov %eax,-0x10(%ebp)
hp->s.size = nu;
756: 8b 45 f0 mov -0x10(%ebp),%eax
759: 8b 55 08 mov 0x8(%ebp),%edx
75c: 89 50 04 mov %edx,0x4(%eax)
free((void*)(hp + 1));
75f: 8b 45 f0 mov -0x10(%ebp),%eax
762: 83 c0 08 add $0x8,%eax
765: 83 ec 0c sub $0xc,%esp
768: 50 push %eax
769: e8 c8 fe ff ff call 636 <free>
76e: 83 c4 10 add $0x10,%esp
return freep;
771: a1 ac 08 00 00 mov 0x8ac,%eax
}
776: c9 leave
777: c3 ret
00000778 <malloc>:
void*
malloc(uint nbytes)
{
778: 55 push %ebp
779: 89 e5 mov %esp,%ebp
77b: 83 ec 18 sub $0x18,%esp
Header *p, *prevp;
uint nunits;
nunits = (nbytes + sizeof(Header) - 1)/sizeof(Header) + 1;
77e: 8b 45 08 mov 0x8(%ebp),%eax
781: 83 c0 07 add $0x7,%eax
784: c1 e8 03 shr $0x3,%eax
787: 83 c0 01 add $0x1,%eax
78a: 89 45 ec mov %eax,-0x14(%ebp)
if((prevp = freep) == 0){
78d: a1 ac 08 00 00 mov 0x8ac,%eax
792: 89 45 f0 mov %eax,-0x10(%ebp)
795: 83 7d f0 00 cmpl $0x0,-0x10(%ebp)
799: 75 23 jne 7be <malloc+0x46>
base.s.ptr = freep = prevp = &base;
79b: c7 45 f0 a4 08 00 00 movl $0x8a4,-0x10(%ebp)
7a2: 8b 45 f0 mov -0x10(%ebp),%eax
7a5: a3 ac 08 00 00 mov %eax,0x8ac
7aa: a1 ac 08 00 00 mov 0x8ac,%eax
7af: a3 a4 08 00 00 mov %eax,0x8a4
base.s.size = 0;
7b4: c7 05 a8 08 00 00 00 movl $0x0,0x8a8
7bb: 00 00 00
}
for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){
7be: 8b 45 f0 mov -0x10(%ebp),%eax
7c1: 8b 00 mov (%eax),%eax
7c3: 89 45 f4 mov %eax,-0xc(%ebp)
if(p->s.size >= nunits){
7c6: 8b 45 f4 mov -0xc(%ebp),%eax
7c9: 8b 40 04 mov 0x4(%eax),%eax
7cc: 39 45 ec cmp %eax,-0x14(%ebp)
7cf: 77 4d ja 81e <malloc+0xa6>
if(p->s.size == nunits)
7d1: 8b 45 f4 mov -0xc(%ebp),%eax
7d4: 8b 40 04 mov 0x4(%eax),%eax
7d7: 39 45 ec cmp %eax,-0x14(%ebp)
7da: 75 0c jne 7e8 <malloc+0x70>
prevp->s.ptr = p->s.ptr;
7dc: 8b 45 f4 mov -0xc(%ebp),%eax
7df: 8b 10 mov (%eax),%edx
7e1: 8b 45 f0 mov -0x10(%ebp),%eax
7e4: 89 10 mov %edx,(%eax)
7e6: eb 26 jmp 80e <malloc+0x96>
else {
p->s.size -= nunits;
7e8: 8b 45 f4 mov -0xc(%ebp),%eax
7eb: 8b 40 04 mov 0x4(%eax),%eax
7ee: 2b 45 ec sub -0x14(%ebp),%eax
7f1: 89 c2 mov %eax,%edx
7f3: 8b 45 f4 mov -0xc(%ebp),%eax
7f6: 89 50 04 mov %edx,0x4(%eax)
p += p->s.size;
7f9: 8b 45 f4 mov -0xc(%ebp),%eax
7fc: 8b 40 04 mov 0x4(%eax),%eax
7ff: c1 e0 03 shl $0x3,%eax
802: 01 45 f4 add %eax,-0xc(%ebp)
p->s.size = nunits;
805: 8b 45 f4 mov -0xc(%ebp),%eax
808: 8b 55 ec mov -0x14(%ebp),%edx
80b: 89 50 04 mov %edx,0x4(%eax)
}
freep = prevp;
80e: 8b 45 f0 mov -0x10(%ebp),%eax
811: a3 ac 08 00 00 mov %eax,0x8ac
return (void*)(p + 1);
816: 8b 45 f4 mov -0xc(%ebp),%eax
819: 83 c0 08 add $0x8,%eax
81c: eb 3b jmp 859 <malloc+0xe1>
}
if(p == freep)
81e: a1 ac 08 00 00 mov 0x8ac,%eax
823: 39 45 f4 cmp %eax,-0xc(%ebp)
826: 75 1e jne 846 <malloc+0xce>
if((p = morecore(nunits)) == 0)
828: 83 ec 0c sub $0xc,%esp
82b: ff 75 ec push -0x14(%ebp)
82e: e8 e5 fe ff ff call 718 <morecore>
833: 83 c4 10 add $0x10,%esp
836: 89 45 f4 mov %eax,-0xc(%ebp)
839: 83 7d f4 00 cmpl $0x0,-0xc(%ebp)
83d: 75 07 jne 846 <malloc+0xce>
return 0;
83f: b8 00 00 00 00 mov $0x0,%eax
844: eb 13 jmp 859 <malloc+0xe1>
for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){
846: 8b 45 f4 mov -0xc(%ebp),%eax
849: 89 45 f0 mov %eax,-0x10(%ebp)
84c: 8b 45 f4 mov -0xc(%ebp),%eax
84f: 8b 00 mov (%eax),%eax
851: 89 45 f4 mov %eax,-0xc(%ebp)
if(p->s.size >= nunits){
854: e9 6d ff ff ff jmp 7c6 <malloc+0x4e>
}
}
859: c9 leave
85a: c3 ret
| 35.217319 | 66 | 0.42056 |
698fd880d4aac356eec91e74a31f625dc484a236 | 3,726 | asm | Assembly | Transynther/x86/_processed/AVXALIGN/_zr_/i7-8650U_0xd2_notsx.log_2_612.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/AVXALIGN/_zr_/i7-8650U_0xd2_notsx.log_2_612.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/AVXALIGN/_zr_/i7-8650U_0xd2_notsx.log_2_612.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r13
push %r8
push %r9
push %rbx
push %rcx
push %rdi
push %rsi
lea addresses_WC_ht+0x144eb, %rbx
nop
nop
nop
nop
nop
xor %r13, %r13
mov (%rbx), %r10d
nop
nop
nop
and %r8, %r8
lea addresses_WC_ht+0x124a3, %rsi
lea addresses_A_ht+0x1211d, %rdi
dec %r9
mov $69, %rcx
rep movsw
xor %r10, %r10
lea addresses_D_ht+0x1dceb, %r13
nop
xor $34422, %rbx
mov $0x6162636465666768, %rdi
movq %rdi, %xmm4
and $0xffffffffffffffc0, %r13
vmovntdq %ymm4, (%r13)
nop
nop
nop
inc %r8
lea addresses_UC_ht+0xa7f1, %rsi
nop
dec %rdi
mov $0x6162636465666768, %r10
movq %r10, %xmm1
movups %xmm1, (%rsi)
nop
dec %r13
lea addresses_normal_ht+0x3f0b, %rdi
nop
nop
and $19010, %rcx
movw $0x6162, (%rdi)
sub $59297, %rdi
lea addresses_D_ht+0x106b, %rsi
lea addresses_UC_ht+0xd6eb, %rdi
nop
nop
nop
nop
add %r10, %r10
mov $0, %rcx
rep movsq
nop
dec %r8
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %r9
pop %r8
pop %r13
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r12
push %r9
push %rcx
push %rdi
push %rdx
push %rsi
// REPMOV
lea addresses_WT+0x180eb, %rsi
lea addresses_A+0x792b, %rdi
clflush (%rsi)
nop
nop
nop
nop
xor %r12, %r12
mov $39, %rcx
rep movsq
nop
nop
nop
nop
xor %rcx, %rcx
// Load
lea addresses_UC+0x13303, %rcx
nop
nop
nop
nop
inc %rdx
movups (%rcx), %xmm0
vpextrq $0, %xmm0, %r11
xor $49800, %rdi
// Store
lea addresses_UC+0x130eb, %rdi
nop
nop
nop
nop
nop
xor %r12, %r12
movb $0x51, (%rdi)
sub $49423, %rdi
// Load
mov $0x42b, %rdx
nop
xor $28314, %r11
mov (%rdx), %r12
nop
nop
nop
and %rdx, %rdx
// Store
lea addresses_WT+0x74eb, %rdi
dec %r11
movw $0x5152, (%rdi)
nop
nop
nop
inc %rdx
// Faulty Load
lea addresses_WT+0x74eb, %rdx
clflush (%rdx)
nop
nop
nop
nop
nop
xor $37957, %rsi
vmovaps (%rdx), %ymm4
vextracti128 $0, %ymm4, %xmm4
vpextrq $0, %xmm4, %rcx
lea oracles, %rdi
and $0xff, %rcx
shlq $12, %rcx
mov (%rdi,%rcx,1), %rcx
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %r9
pop %r12
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'type': 'addresses_WT', 'size': 16, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': True}}
{'OP': 'REPM', 'src': {'type': 'addresses_WT', 'congruent': 9, 'same': False}, 'dst': {'type': 'addresses_A', 'congruent': 6, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_UC', 'size': 16, 'AVXalign': False, 'NT': False, 'congruent': 3, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_UC', 'size': 1, 'AVXalign': False, 'NT': False, 'congruent': 10, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_P', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 6, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WT', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': True}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'type': 'addresses_WT', 'size': 32, 'AVXalign': True, 'NT': False, 'congruent': 0, 'same': True}}
<gen_prepare_buffer>
{'OP': 'LOAD', 'src': {'type': 'addresses_WC_ht', 'size': 4, 'AVXalign': True, 'NT': False, 'congruent': 11, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_WC_ht', 'congruent': 3, 'same': False}, 'dst': {'type': 'addresses_A_ht', 'congruent': 1, 'same': True}}
{'OP': 'STOR', 'dst': {'type': 'addresses_D_ht', 'size': 32, 'AVXalign': False, 'NT': True, 'congruent': 7, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_UC_ht', 'size': 16, 'AVXalign': False, 'NT': False, 'congruent': 1, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_normal_ht', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 5, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_D_ht', 'congruent': 2, 'same': False}, 'dst': {'type': 'addresses_UC_ht', 'congruent': 8, 'same': False}}
{'00': 2}
00 00
*/
| 19.714286 | 147 | 0.644391 |
5b8edb4ed0880069e2c9487bd304683397b9b3a3 | 2,085 | asm | Assembly | test_programs/eae.asm | mfkiwl/QNICE-FPGA-hyperRAM | aabc8291ac1e0c4666c51f84acddf599d7521e53 | [
"BSD-3-Clause"
] | 53 | 2016-04-12T07:22:49.000Z | 2022-03-25T09:24:48.000Z | test_programs/eae.asm | mfkiwl/QNICE-FPGA-hyperRAM | aabc8291ac1e0c4666c51f84acddf599d7521e53 | [
"BSD-3-Clause"
] | 196 | 2020-06-05T04:59:50.000Z | 2021-03-13T21:27:11.000Z | test_programs/eae.asm | mfkiwl/QNICE-FPGA-hyperRAM | aabc8291ac1e0c4666c51f84acddf599d7521e53 | [
"BSD-3-Clause"
] | 15 | 2017-07-31T11:26:56.000Z | 2022-02-22T14:22:46.000Z | ; EAE - Extended Arithmetic Element test
; assumes that each EAE calculation is done combinatorically, i.e. that
; there is no need to wait for the 'busy' signal of the EAE
; done by sy2002 in May 2016
#include "../dist_kit/sysdef.asm"
#include "../dist_kit/monitor.def"
.ORG 0x8000
; EAE registers
MOVE IO$EAE_OPERAND_0, R0
MOVE IO$EAE_OPERAND_1, R1
MOVE IO$EAE_RESULT_LO, R2
MOVE IO$EAE_RESULT_HI, R3
MOVE IO$EAE_CSR, R4
; unsigned: 0x91D9 x 0x2CB1 = 0x19762309
MOVE 0x91D9, @R0
MOVE 0x2CB1, @R1
MOVE EAE$MULU, @R4
MOVE @R3, R8
SYSCALL(puthex, 1)
MOVE @R2, R8
SYSCALL(puthex, 1)
SYSCALL(crlf, 1)
; signed: decimal -13.422 x 50 = -671.100 = 0xFFF5C284
MOVE -13422, @R0
MOVE 50, @R1
MOVE EAE$MULS, @R4
MOVE @R3, R8
SYSCALL(puthex, 1)
MOVE @R2, R8
SYSCALL(puthex, 1)
SYSCALL(crlf, 1)
; unsigned: 0x2309 / 0x0076 = 0x004C and modulo is 0x0001
; so the printed output is 004C0001
MOVE 0x2309, @R0
MOVE 0x0076, @R1
MOVE EAE$DIVU, @R4
MOVE @R2, R8
SYSCALL(puthex, 1)
MOVE @R3, R8
SYSCALL(puthex, 1)
SYSCALL(crlf, 1)
; signed: decimal -32.009 / 16 = -2.000 = modulo is 9
; so the printed output is F8300007
MOVE -32009, @R0
MOVE 16, @R1
MOVE EAE$DIVS, @R4
MOVE @R2, R8
SYSCALL(puthex, 1)
MOVE @R3, R8
SYSCALL(puthex, 1)
SYSCALL(crlf, 1)
SYSCALL(exit, 1)
| 34.180328 | 73 | 0.429736 |
57b21764325c2594a7150e5801be3328f664a748 | 851 | asm | Assembly | smsq/qpc/dos/close.asm | olifink/smsqe | c546d882b26566a46d71820d1539bed9ea8af108 | [
"BSD-2-Clause"
] | null | null | null | smsq/qpc/dos/close.asm | olifink/smsqe | c546d882b26566a46d71820d1539bed9ea8af108 | [
"BSD-2-Clause"
] | null | null | null | smsq/qpc/dos/close.asm | olifink/smsqe | c546d882b26566a46d71820d1539bed9ea8af108 | [
"BSD-2-Clause"
] | null | null | null | ; Close DOS V1.01 1997 Marcel Kilgus
;
; 2018-12-31 1.01 Adapted for new QPC2v5 DOS driver
section dos
xdef dos_close
xref iou_achb
xref iou_rchb
xref ioa_cknm
include 'dev8_keys_err'
include 'dev8_keys_sys'
include 'dev8_keys_chn'
include 'dev8_keys_iod'
include 'dev8_keys_qlv'
include 'dev8_smsq_qpc_dos_data'
include 'dev8_smsq_qpc_keys'
dos_close
reglist reg a3/a4
movem.l reglist,-(sp)
move.l chn_hand(a0),d1
dc.w qpc.dclse
cmp.b #4,chn_accs(a0)
bne.s dos_smsclose
dc.w qpc.ddelt ; Delete temporary directory file
dos_smsclose
move.l chn_ddef(a0),a4 ; Physical definition
subq.b #1,iod_nrfl(a4) ; decrement file count
lea chn_link(a0),a0
lea sys_fsch(a6),a1
move.w mem.rlst,a2
jsr (a2) ; unlink file from list
lea -chn_link(a0),a0
move.w mem.rchp,a2
jsr (a2)
movem.l (sp)+,reglist
rts
end
| 18.911111 | 53 | 0.72738 |
977f9fe1d36aa15f74fe80d96642eeea8a824d9a | 3,467 | asm | Assembly | src/igzip/init_stream.asm | robinmoussu/fastzip | 85f71b7862af0940cadbafb44f80856581ecb023 | [
"RSA-MD"
] | 2 | 2019-02-08T16:53:53.000Z | 2021-03-21T05:09:13.000Z | src/igzip/init_stream.asm | robinmoussu/fastzip | 85f71b7862af0940cadbafb44f80856581ecb023 | [
"RSA-MD"
] | null | null | null | src/igzip/init_stream.asm | robinmoussu/fastzip | 85f71b7862af0940cadbafb44f80856581ecb023 | [
"RSA-MD"
] | 3 | 2017-05-08T04:44:56.000Z | 2018-12-01T16:12:44.000Z | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; The MIT License
;
; Copyright (c) 2014 Intel Corporation
;
; Permission is hereby granted, free of charge, to any person
; obtaining a copy of this software and associated documentation
; files (the "Software"), to deal in the Software without
; restriction, including without limitation the rights to use,
; copy, modify, merge, publish, distribute, sublicense, and/or
; sell copies of the Software, and to permit persons to whom the
; Software is furnished to do so, subject to the following
; conditions:
;
; The above copyright notice and this permission notice shall be
; included in all copies or substantial portions of the
; Software.
;
; THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY
; KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE
; WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
; PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
; COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
; LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
; OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
; SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
%include "options.asm"
%include "lz0a_const.asm"
%include "data_struct2.asm"
; void init_stream(LZ_Stream2 *stream)
; arg 1: rcx: addr of stream
global init_stream : function
init_stream:
%ifndef WIN_CC
mov rcx, rdi
%endif
xor rax, rax
mov [rcx + _total_in], eax
mov [rcx + _total_out], eax
mov [rcx + _internal_state_b_bytes_valid], eax
mov [rcx + _internal_state_b_bytes_processed], eax
mov dword [rcx + _internal_state_state], LZS2_HDR
mov [rcx + _internal_state_count], eax
; tmp_out_start = tmp_out_end = 0
mov [rcx + _internal_state_tmp_out_start], eax
mov [rcx + _internal_state_tmp_out_end], eax
; file_start = &buffer[0];
lea rdx, [rcx + _internal_state_buffer]
mov [rcx + _internal_state_file_start], rdx
; state->bitbuf.init();
mov [rcx + _internal_state_bitbuf_m_bits], rax
mov [rcx + _internal_state_bitbuf_m_bit_count], eax
%if ((MAJOR_VERSION == IGZIP0) || (MAJOR_VERSION == IGZIP1))
; init crc
not rax
mov [rcx + _internal_state_crc], eax
%elif ((MAJOR_VERSION == IGZIP0C) || (MAJOR_VERSION == IGZIP1C))
;;; MAGIC 512-bit number that will become 0xFFFFFFFF after folding
pxor xmm0, xmm0
movdqa [rcx + _internal_state_crc + 48], xmm0
movdqa [rcx + _internal_state_crc + 32], xmm0
movdqa [rcx + _internal_state_crc + 16], xmm0
mov eax, 0x9db42487
movd xmm0, eax
movdqa [rcx + _internal_state_crc], xmm0
%else
%error NO MAJOR VERSION SELECTED
% error
%endif
; for (i=0; i<HASH_SIZE; i++) state->head[i] = (UINT16) -(int)(D + 1);
movdqa xmm0, [init_val wrt rip]
add rcx, _internal_state_head
%if ((MAJOR_VERSION == IGZIP0) || (MAJOR_VERSION == IGZIP0C))
mov rax, HASH_SIZE / (4 * 8)
%elif ((MAJOR_VERSION == IGZIP1) || (MAJOR_VERSION == IGZIP1C))
mov rax, HASH_SIZE / (4 * 2)
%else
%error NO MAJOR VERSION SELECTED
% error
%endif
init_loop:
movdqa [rcx + 16 * 0], xmm0
movdqa [rcx + 16 * 1], xmm0
movdqa [rcx + 16 * 2], xmm0
movdqa [rcx + 16 * 3], xmm0
add rcx, 16*4
sub rax, 1
jne init_loop
ret
section .data
%assign VAL (-(D + 1)) & 0xFFFF
align 16
init_val:
dw VAL, VAL, VAL, VAL, VAL, VAL, VAL, VAL
| 32.401869 | 73 | 0.670609 |
1844cf857134927926e8ba6262dd1941eac0b719 | 144 | asm | Assembly | libsrc/_DEVELOPMENT/math/float/math48/lm/c/sdcc_iy/___fs2slong_callee.asm | meesokim/z88dk | 5763c7778f19a71d936b3200374059d267066bb2 | [
"ClArtistic"
] | null | null | null | libsrc/_DEVELOPMENT/math/float/math48/lm/c/sdcc_iy/___fs2slong_callee.asm | meesokim/z88dk | 5763c7778f19a71d936b3200374059d267066bb2 | [
"ClArtistic"
] | null | null | null | libsrc/_DEVELOPMENT/math/float/math48/lm/c/sdcc_iy/___fs2slong_callee.asm | meesokim/z88dk | 5763c7778f19a71d936b3200374059d267066bb2 | [
"ClArtistic"
] | null | null | null |
SECTION code_fp_math48
PUBLIC ___fs2slong_callee
EXTERN cm48_sdcciyp_ds2slong_callee
defc ___fs2slong_callee = cm48_sdcciyp_ds2slong_callee
| 16 | 54 | 0.895833 |
18a699f2be9bbe7a6322f427e44c1d120961e113 | 356 | asm | Assembly | 22.asm | AsadKhalil/Assembly_x86 | 48aa2a0ab93fd359f5f20369bb9064052c2f2884 | [
"MIT"
] | null | null | null | 22.asm | AsadKhalil/Assembly_x86 | 48aa2a0ab93fd359f5f20369bb9064052c2f2884 | [
"MIT"
] | null | null | null | 22.asm | AsadKhalil/Assembly_x86 | 48aa2a0ab93fd359f5f20369bb9064052c2f2884 | [
"MIT"
] | null | null | null | [org 0x0100]
mov AL, 3
mov BL, [Table]
mul BL
mov [Table], AL
mov AL, 3
mov BL, [Table + 1]
mul BL
mov [Table + 1], AL
mov AL, 3
mov BL, [Table + 2]
mul BL
mov [Table + 2], AL
mov AL, 3
mov BL, [Table + 3]
mul BL
mov [Table + 3], AL
mov AL, 3
mov BL, [Table + 4]
mul BL
mov [Table + 4], AL
int 0x21
Table: db 1,2,3,4,5 | 11.483871 | 20 | 0.536517 |
eeee377e09604f6582f1f0e466497745f5e034f4 | 468 | asm | Assembly | oeis/275/A275778.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/275/A275778.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/275/A275778.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A275778: Tribonacci-like sequence a(n) = a(n-1) + a(n-2) + a(n-3) for n >= 3, with a(0) = 1, a(1) = 2, a(2) = 1.
; Submitted by Jon Maiga
; 1,2,1,4,7,12,23,42,77,142,261,480,883,1624,2987,5494,10105,18586,34185,62876,115647,212708,391231,719586,1323525,2434342,4477453,8235320,15147115,27859888,51242323,94249326,173351537,318843186,586444049
mov $2,1
mov $3,2
lpb $0
sub $0,1
mov $1,$4
mov $4,$2
mov $2,$1
add $2,$3
mov $3,$1
add $4,$1
lpe
mov $0,$2
| 27.529412 | 204 | 0.645299 |
4b385dce246c41d850b3aa7a7481479c8704a8b9 | 42,776 | asm | Assembly | Experiment 3/Debug/List/ex3.asm | hosseindehghanipour1998/micro-processor-lab-2019 | cf70539b716a180f41ae1866ae9832f4ee4bb55c | [
"MIT"
] | 1 | 2019-11-03T15:12:02.000Z | 2019-11-03T15:12:02.000Z | Experiment 3/Debug/List/ex3.asm | hosseindehghanipour1998/micro-processor-lab-2019 | cf70539b716a180f41ae1866ae9832f4ee4bb55c | [
"MIT"
] | null | null | null | Experiment 3/Debug/List/ex3.asm | hosseindehghanipour1998/micro-processor-lab-2019 | cf70539b716a180f41ae1866ae9832f4ee4bb55c | [
"MIT"
] | null | null | null |
;CodeVisionAVR C Compiler V3.12 Advanced
;(C) Copyright 1998-2014 Pavel Haiduc, HP InfoTech s.r.l.
;http://www.hpinfotech.com
;Build configuration : Debug
;Chip type : ATmega32
;Program type : Application
;Clock frequency : 8.000000 MHz
;Memory model : Small
;Optimize for : Size
;(s)printf features : int, width
;(s)scanf features : int, width
;External RAM size : 0
;Data Stack size : 512 byte(s)
;Heap size : 0 byte(s)
;Promote 'char' to 'int': Yes
;'char' is unsigned : Yes
;8 bit enums : Yes
;Global 'const' stored in FLASH: Yes
;Enhanced function parameter passing: Yes
;Enhanced core instructions: On
;Automatic register allocation for global variables: On
;Smart register allocation: On
#define _MODEL_SMALL_
#pragma AVRPART ADMIN PART_NAME ATmega32
#pragma AVRPART MEMORY PROG_FLASH 32768
#pragma AVRPART MEMORY EEPROM 1024
#pragma AVRPART MEMORY INT_SRAM SIZE 2048
#pragma AVRPART MEMORY INT_SRAM START_ADDR 0x60
#define CALL_SUPPORTED 1
.LISTMAC
.EQU UDRE=0x5
.EQU RXC=0x7
.EQU USR=0xB
.EQU UDR=0xC
.EQU SPSR=0xE
.EQU SPDR=0xF
.EQU EERE=0x0
.EQU EEWE=0x1
.EQU EEMWE=0x2
.EQU EECR=0x1C
.EQU EEDR=0x1D
.EQU EEARL=0x1E
.EQU EEARH=0x1F
.EQU WDTCR=0x21
.EQU MCUCR=0x35
.EQU GICR=0x3B
.EQU SPL=0x3D
.EQU SPH=0x3E
.EQU SREG=0x3F
.DEF R0X0=R0
.DEF R0X1=R1
.DEF R0X2=R2
.DEF R0X3=R3
.DEF R0X4=R4
.DEF R0X5=R5
.DEF R0X6=R6
.DEF R0X7=R7
.DEF R0X8=R8
.DEF R0X9=R9
.DEF R0XA=R10
.DEF R0XB=R11
.DEF R0XC=R12
.DEF R0XD=R13
.DEF R0XE=R14
.DEF R0XF=R15
.DEF R0X10=R16
.DEF R0X11=R17
.DEF R0X12=R18
.DEF R0X13=R19
.DEF R0X14=R20
.DEF R0X15=R21
.DEF R0X16=R22
.DEF R0X17=R23
.DEF R0X18=R24
.DEF R0X19=R25
.DEF R0X1A=R26
.DEF R0X1B=R27
.DEF R0X1C=R28
.DEF R0X1D=R29
.DEF R0X1E=R30
.DEF R0X1F=R31
.EQU __SRAM_START=0x0060
.EQU __SRAM_END=0x085F
.EQU __DSTACK_SIZE=0x0200
.EQU __HEAP_SIZE=0x0000
.EQU __CLEAR_SRAM_SIZE=__SRAM_END-__SRAM_START+1
.MACRO __CPD1N
CPI R30,LOW(@0)
LDI R26,HIGH(@0)
CPC R31,R26
LDI R26,BYTE3(@0)
CPC R22,R26
LDI R26,BYTE4(@0)
CPC R23,R26
.ENDM
.MACRO __CPD2N
CPI R26,LOW(@0)
LDI R30,HIGH(@0)
CPC R27,R30
LDI R30,BYTE3(@0)
CPC R24,R30
LDI R30,BYTE4(@0)
CPC R25,R30
.ENDM
.MACRO __CPWRR
CP R@0,R@2
CPC R@1,R@3
.ENDM
.MACRO __CPWRN
CPI R@0,LOW(@2)
LDI R30,HIGH(@2)
CPC R@1,R30
.ENDM
.MACRO __ADDB1MN
SUBI R30,LOW(-@0-(@1))
.ENDM
.MACRO __ADDB2MN
SUBI R26,LOW(-@0-(@1))
.ENDM
.MACRO __ADDW1MN
SUBI R30,LOW(-@0-(@1))
SBCI R31,HIGH(-@0-(@1))
.ENDM
.MACRO __ADDW2MN
SUBI R26,LOW(-@0-(@1))
SBCI R27,HIGH(-@0-(@1))
.ENDM
.MACRO __ADDW1FN
SUBI R30,LOW(-2*@0-(@1))
SBCI R31,HIGH(-2*@0-(@1))
.ENDM
.MACRO __ADDD1FN
SUBI R30,LOW(-2*@0-(@1))
SBCI R31,HIGH(-2*@0-(@1))
SBCI R22,BYTE3(-2*@0-(@1))
.ENDM
.MACRO __ADDD1N
SUBI R30,LOW(-@0)
SBCI R31,HIGH(-@0)
SBCI R22,BYTE3(-@0)
SBCI R23,BYTE4(-@0)
.ENDM
.MACRO __ADDD2N
SUBI R26,LOW(-@0)
SBCI R27,HIGH(-@0)
SBCI R24,BYTE3(-@0)
SBCI R25,BYTE4(-@0)
.ENDM
.MACRO __SUBD1N
SUBI R30,LOW(@0)
SBCI R31,HIGH(@0)
SBCI R22,BYTE3(@0)
SBCI R23,BYTE4(@0)
.ENDM
.MACRO __SUBD2N
SUBI R26,LOW(@0)
SBCI R27,HIGH(@0)
SBCI R24,BYTE3(@0)
SBCI R25,BYTE4(@0)
.ENDM
.MACRO __ANDBMNN
LDS R30,@0+(@1)
ANDI R30,LOW(@2)
STS @0+(@1),R30
.ENDM
.MACRO __ANDWMNN
LDS R30,@0+(@1)
ANDI R30,LOW(@2)
STS @0+(@1),R30
LDS R30,@0+(@1)+1
ANDI R30,HIGH(@2)
STS @0+(@1)+1,R30
.ENDM
.MACRO __ANDD1N
ANDI R30,LOW(@0)
ANDI R31,HIGH(@0)
ANDI R22,BYTE3(@0)
ANDI R23,BYTE4(@0)
.ENDM
.MACRO __ANDD2N
ANDI R26,LOW(@0)
ANDI R27,HIGH(@0)
ANDI R24,BYTE3(@0)
ANDI R25,BYTE4(@0)
.ENDM
.MACRO __ORBMNN
LDS R30,@0+(@1)
ORI R30,LOW(@2)
STS @0+(@1),R30
.ENDM
.MACRO __ORWMNN
LDS R30,@0+(@1)
ORI R30,LOW(@2)
STS @0+(@1),R30
LDS R30,@0+(@1)+1
ORI R30,HIGH(@2)
STS @0+(@1)+1,R30
.ENDM
.MACRO __ORD1N
ORI R30,LOW(@0)
ORI R31,HIGH(@0)
ORI R22,BYTE3(@0)
ORI R23,BYTE4(@0)
.ENDM
.MACRO __ORD2N
ORI R26,LOW(@0)
ORI R27,HIGH(@0)
ORI R24,BYTE3(@0)
ORI R25,BYTE4(@0)
.ENDM
.MACRO __DELAY_USB
LDI R24,LOW(@0)
__DELAY_USB_LOOP:
DEC R24
BRNE __DELAY_USB_LOOP
.ENDM
.MACRO __DELAY_USW
LDI R24,LOW(@0)
LDI R25,HIGH(@0)
__DELAY_USW_LOOP:
SBIW R24,1
BRNE __DELAY_USW_LOOP
.ENDM
.MACRO __GETD1S
LDD R30,Y+@0
LDD R31,Y+@0+1
LDD R22,Y+@0+2
LDD R23,Y+@0+3
.ENDM
.MACRO __GETD2S
LDD R26,Y+@0
LDD R27,Y+@0+1
LDD R24,Y+@0+2
LDD R25,Y+@0+3
.ENDM
.MACRO __PUTD1S
STD Y+@0,R30
STD Y+@0+1,R31
STD Y+@0+2,R22
STD Y+@0+3,R23
.ENDM
.MACRO __PUTD2S
STD Y+@0,R26
STD Y+@0+1,R27
STD Y+@0+2,R24
STD Y+@0+3,R25
.ENDM
.MACRO __PUTDZ2
STD Z+@0,R26
STD Z+@0+1,R27
STD Z+@0+2,R24
STD Z+@0+3,R25
.ENDM
.MACRO __CLRD1S
STD Y+@0,R30
STD Y+@0+1,R30
STD Y+@0+2,R30
STD Y+@0+3,R30
.ENDM
.MACRO __POINTB1MN
LDI R30,LOW(@0+(@1))
.ENDM
.MACRO __POINTW1MN
LDI R30,LOW(@0+(@1))
LDI R31,HIGH(@0+(@1))
.ENDM
.MACRO __POINTD1M
LDI R30,LOW(@0)
LDI R31,HIGH(@0)
LDI R22,BYTE3(@0)
LDI R23,BYTE4(@0)
.ENDM
.MACRO __POINTW1FN
LDI R30,LOW(2*@0+(@1))
LDI R31,HIGH(2*@0+(@1))
.ENDM
.MACRO __POINTD1FN
LDI R30,LOW(2*@0+(@1))
LDI R31,HIGH(2*@0+(@1))
LDI R22,BYTE3(2*@0+(@1))
LDI R23,BYTE4(2*@0+(@1))
.ENDM
.MACRO __POINTB2MN
LDI R26,LOW(@0+(@1))
.ENDM
.MACRO __POINTW2MN
LDI R26,LOW(@0+(@1))
LDI R27,HIGH(@0+(@1))
.ENDM
.MACRO __POINTW2FN
LDI R26,LOW(2*@0+(@1))
LDI R27,HIGH(2*@0+(@1))
.ENDM
.MACRO __POINTD2FN
LDI R26,LOW(2*@0+(@1))
LDI R27,HIGH(2*@0+(@1))
LDI R24,BYTE3(2*@0+(@1))
LDI R25,BYTE4(2*@0+(@1))
.ENDM
.MACRO __POINTBRM
LDI R@0,LOW(@1)
.ENDM
.MACRO __POINTWRM
LDI R@0,LOW(@2)
LDI R@1,HIGH(@2)
.ENDM
.MACRO __POINTBRMN
LDI R@0,LOW(@1+(@2))
.ENDM
.MACRO __POINTWRMN
LDI R@0,LOW(@2+(@3))
LDI R@1,HIGH(@2+(@3))
.ENDM
.MACRO __POINTWRFN
LDI R@0,LOW(@2*2+(@3))
LDI R@1,HIGH(@2*2+(@3))
.ENDM
.MACRO __GETD1N
LDI R30,LOW(@0)
LDI R31,HIGH(@0)
LDI R22,BYTE3(@0)
LDI R23,BYTE4(@0)
.ENDM
.MACRO __GETD2N
LDI R26,LOW(@0)
LDI R27,HIGH(@0)
LDI R24,BYTE3(@0)
LDI R25,BYTE4(@0)
.ENDM
.MACRO __GETB1MN
LDS R30,@0+(@1)
.ENDM
.MACRO __GETB1HMN
LDS R31,@0+(@1)
.ENDM
.MACRO __GETW1MN
LDS R30,@0+(@1)
LDS R31,@0+(@1)+1
.ENDM
.MACRO __GETD1MN
LDS R30,@0+(@1)
LDS R31,@0+(@1)+1
LDS R22,@0+(@1)+2
LDS R23,@0+(@1)+3
.ENDM
.MACRO __GETBRMN
LDS R@0,@1+(@2)
.ENDM
.MACRO __GETWRMN
LDS R@0,@2+(@3)
LDS R@1,@2+(@3)+1
.ENDM
.MACRO __GETWRZ
LDD R@0,Z+@2
LDD R@1,Z+@2+1
.ENDM
.MACRO __GETD2Z
LDD R26,Z+@0
LDD R27,Z+@0+1
LDD R24,Z+@0+2
LDD R25,Z+@0+3
.ENDM
.MACRO __GETB2MN
LDS R26,@0+(@1)
.ENDM
.MACRO __GETW2MN
LDS R26,@0+(@1)
LDS R27,@0+(@1)+1
.ENDM
.MACRO __GETD2MN
LDS R26,@0+(@1)
LDS R27,@0+(@1)+1
LDS R24,@0+(@1)+2
LDS R25,@0+(@1)+3
.ENDM
.MACRO __PUTB1MN
STS @0+(@1),R30
.ENDM
.MACRO __PUTW1MN
STS @0+(@1),R30
STS @0+(@1)+1,R31
.ENDM
.MACRO __PUTD1MN
STS @0+(@1),R30
STS @0+(@1)+1,R31
STS @0+(@1)+2,R22
STS @0+(@1)+3,R23
.ENDM
.MACRO __PUTB1EN
LDI R26,LOW(@0+(@1))
LDI R27,HIGH(@0+(@1))
CALL __EEPROMWRB
.ENDM
.MACRO __PUTW1EN
LDI R26,LOW(@0+(@1))
LDI R27,HIGH(@0+(@1))
CALL __EEPROMWRW
.ENDM
.MACRO __PUTD1EN
LDI R26,LOW(@0+(@1))
LDI R27,HIGH(@0+(@1))
CALL __EEPROMWRD
.ENDM
.MACRO __PUTBR0MN
STS @0+(@1),R0
.ENDM
.MACRO __PUTBMRN
STS @0+(@1),R@2
.ENDM
.MACRO __PUTWMRN
STS @0+(@1),R@2
STS @0+(@1)+1,R@3
.ENDM
.MACRO __PUTBZR
STD Z+@1,R@0
.ENDM
.MACRO __PUTWZR
STD Z+@2,R@0
STD Z+@2+1,R@1
.ENDM
.MACRO __GETW1R
MOV R30,R@0
MOV R31,R@1
.ENDM
.MACRO __GETW2R
MOV R26,R@0
MOV R27,R@1
.ENDM
.MACRO __GETWRN
LDI R@0,LOW(@2)
LDI R@1,HIGH(@2)
.ENDM
.MACRO __PUTW1R
MOV R@0,R30
MOV R@1,R31
.ENDM
.MACRO __PUTW2R
MOV R@0,R26
MOV R@1,R27
.ENDM
.MACRO __ADDWRN
SUBI R@0,LOW(-@2)
SBCI R@1,HIGH(-@2)
.ENDM
.MACRO __ADDWRR
ADD R@0,R@2
ADC R@1,R@3
.ENDM
.MACRO __SUBWRN
SUBI R@0,LOW(@2)
SBCI R@1,HIGH(@2)
.ENDM
.MACRO __SUBWRR
SUB R@0,R@2
SBC R@1,R@3
.ENDM
.MACRO __ANDWRN
ANDI R@0,LOW(@2)
ANDI R@1,HIGH(@2)
.ENDM
.MACRO __ANDWRR
AND R@0,R@2
AND R@1,R@3
.ENDM
.MACRO __ORWRN
ORI R@0,LOW(@2)
ORI R@1,HIGH(@2)
.ENDM
.MACRO __ORWRR
OR R@0,R@2
OR R@1,R@3
.ENDM
.MACRO __EORWRR
EOR R@0,R@2
EOR R@1,R@3
.ENDM
.MACRO __GETWRS
LDD R@0,Y+@2
LDD R@1,Y+@2+1
.ENDM
.MACRO __PUTBSR
STD Y+@1,R@0
.ENDM
.MACRO __PUTWSR
STD Y+@2,R@0
STD Y+@2+1,R@1
.ENDM
.MACRO __MOVEWRR
MOV R@0,R@2
MOV R@1,R@3
.ENDM
.MACRO __INWR
IN R@0,@2
IN R@1,@2+1
.ENDM
.MACRO __OUTWR
OUT @2+1,R@1
OUT @2,R@0
.ENDM
.MACRO __CALL1MN
LDS R30,@0+(@1)
LDS R31,@0+(@1)+1
ICALL
.ENDM
.MACRO __CALL1FN
LDI R30,LOW(2*@0+(@1))
LDI R31,HIGH(2*@0+(@1))
CALL __GETW1PF
ICALL
.ENDM
.MACRO __CALL2EN
PUSH R26
PUSH R27
LDI R26,LOW(@0+(@1))
LDI R27,HIGH(@0+(@1))
CALL __EEPROMRDW
POP R27
POP R26
ICALL
.ENDM
.MACRO __CALL2EX
SUBI R26,LOW(-@0)
SBCI R27,HIGH(-@0)
CALL __EEPROMRDD
ICALL
.ENDM
.MACRO __GETW1STACK
IN R30,SPL
IN R31,SPH
ADIW R30,@0+1
LD R0,Z+
LD R31,Z
MOV R30,R0
.ENDM
.MACRO __GETD1STACK
IN R30,SPL
IN R31,SPH
ADIW R30,@0+1
LD R0,Z+
LD R1,Z+
LD R22,Z
MOVW R30,R0
.ENDM
.MACRO __NBST
BST R@0,@1
IN R30,SREG
LDI R31,0x40
EOR R30,R31
OUT SREG,R30
.ENDM
.MACRO __PUTB1SN
LDD R26,Y+@0
LDD R27,Y+@0+1
SUBI R26,LOW(-@1)
SBCI R27,HIGH(-@1)
ST X,R30
.ENDM
.MACRO __PUTW1SN
LDD R26,Y+@0
LDD R27,Y+@0+1
SUBI R26,LOW(-@1)
SBCI R27,HIGH(-@1)
ST X+,R30
ST X,R31
.ENDM
.MACRO __PUTD1SN
LDD R26,Y+@0
LDD R27,Y+@0+1
SUBI R26,LOW(-@1)
SBCI R27,HIGH(-@1)
CALL __PUTDP1
.ENDM
.MACRO __PUTB1SNS
LDD R26,Y+@0
LDD R27,Y+@0+1
ADIW R26,@1
ST X,R30
.ENDM
.MACRO __PUTW1SNS
LDD R26,Y+@0
LDD R27,Y+@0+1
ADIW R26,@1
ST X+,R30
ST X,R31
.ENDM
.MACRO __PUTD1SNS
LDD R26,Y+@0
LDD R27,Y+@0+1
ADIW R26,@1
CALL __PUTDP1
.ENDM
.MACRO __PUTB1PMN
LDS R26,@0
LDS R27,@0+1
SUBI R26,LOW(-@1)
SBCI R27,HIGH(-@1)
ST X,R30
.ENDM
.MACRO __PUTW1PMN
LDS R26,@0
LDS R27,@0+1
SUBI R26,LOW(-@1)
SBCI R27,HIGH(-@1)
ST X+,R30
ST X,R31
.ENDM
.MACRO __PUTD1PMN
LDS R26,@0
LDS R27,@0+1
SUBI R26,LOW(-@1)
SBCI R27,HIGH(-@1)
CALL __PUTDP1
.ENDM
.MACRO __PUTB1PMNS
LDS R26,@0
LDS R27,@0+1
ADIW R26,@1
ST X,R30
.ENDM
.MACRO __PUTW1PMNS
LDS R26,@0
LDS R27,@0+1
ADIW R26,@1
ST X+,R30
ST X,R31
.ENDM
.MACRO __PUTD1PMNS
LDS R26,@0
LDS R27,@0+1
ADIW R26,@1
CALL __PUTDP1
.ENDM
.MACRO __PUTB1RN
MOVW R26,R@0
SUBI R26,LOW(-@1)
SBCI R27,HIGH(-@1)
ST X,R30
.ENDM
.MACRO __PUTW1RN
MOVW R26,R@0
SUBI R26,LOW(-@1)
SBCI R27,HIGH(-@1)
ST X+,R30
ST X,R31
.ENDM
.MACRO __PUTD1RN
MOVW R26,R@0
SUBI R26,LOW(-@1)
SBCI R27,HIGH(-@1)
CALL __PUTDP1
.ENDM
.MACRO __PUTB1RNS
MOVW R26,R@0
ADIW R26,@1
ST X,R30
.ENDM
.MACRO __PUTW1RNS
MOVW R26,R@0
ADIW R26,@1
ST X+,R30
ST X,R31
.ENDM
.MACRO __PUTD1RNS
MOVW R26,R@0
ADIW R26,@1
CALL __PUTDP1
.ENDM
.MACRO __PUTB1RON
MOV R26,R@0
MOV R27,R@1
SUBI R26,LOW(-@2)
SBCI R27,HIGH(-@2)
ST X,R30
.ENDM
.MACRO __PUTW1RON
MOV R26,R@0
MOV R27,R@1
SUBI R26,LOW(-@2)
SBCI R27,HIGH(-@2)
ST X+,R30
ST X,R31
.ENDM
.MACRO __PUTD1RON
MOV R26,R@0
MOV R27,R@1
SUBI R26,LOW(-@2)
SBCI R27,HIGH(-@2)
CALL __PUTDP1
.ENDM
.MACRO __PUTB1RONS
MOV R26,R@0
MOV R27,R@1
ADIW R26,@2
ST X,R30
.ENDM
.MACRO __PUTW1RONS
MOV R26,R@0
MOV R27,R@1
ADIW R26,@2
ST X+,R30
ST X,R31
.ENDM
.MACRO __PUTD1RONS
MOV R26,R@0
MOV R27,R@1
ADIW R26,@2
CALL __PUTDP1
.ENDM
.MACRO __GETB1SX
MOVW R30,R28
SUBI R30,LOW(-@0)
SBCI R31,HIGH(-@0)
LD R30,Z
.ENDM
.MACRO __GETB1HSX
MOVW R30,R28
SUBI R30,LOW(-@0)
SBCI R31,HIGH(-@0)
LD R31,Z
.ENDM
.MACRO __GETW1SX
MOVW R30,R28
SUBI R30,LOW(-@0)
SBCI R31,HIGH(-@0)
LD R0,Z+
LD R31,Z
MOV R30,R0
.ENDM
.MACRO __GETD1SX
MOVW R30,R28
SUBI R30,LOW(-@0)
SBCI R31,HIGH(-@0)
LD R0,Z+
LD R1,Z+
LD R22,Z+
LD R23,Z
MOVW R30,R0
.ENDM
.MACRO __GETB2SX
MOVW R26,R28
SUBI R26,LOW(-@0)
SBCI R27,HIGH(-@0)
LD R26,X
.ENDM
.MACRO __GETW2SX
MOVW R26,R28
SUBI R26,LOW(-@0)
SBCI R27,HIGH(-@0)
LD R0,X+
LD R27,X
MOV R26,R0
.ENDM
.MACRO __GETD2SX
MOVW R26,R28
SUBI R26,LOW(-@0)
SBCI R27,HIGH(-@0)
LD R0,X+
LD R1,X+
LD R24,X+
LD R25,X
MOVW R26,R0
.ENDM
.MACRO __GETBRSX
MOVW R30,R28
SUBI R30,LOW(-@1)
SBCI R31,HIGH(-@1)
LD R@0,Z
.ENDM
.MACRO __GETWRSX
MOVW R30,R28
SUBI R30,LOW(-@2)
SBCI R31,HIGH(-@2)
LD R@0,Z+
LD R@1,Z
.ENDM
.MACRO __GETBRSX2
MOVW R26,R28
SUBI R26,LOW(-@1)
SBCI R27,HIGH(-@1)
LD R@0,X
.ENDM
.MACRO __GETWRSX2
MOVW R26,R28
SUBI R26,LOW(-@2)
SBCI R27,HIGH(-@2)
LD R@0,X+
LD R@1,X
.ENDM
.MACRO __LSLW8SX
MOVW R30,R28
SUBI R30,LOW(-@0)
SBCI R31,HIGH(-@0)
LD R31,Z
CLR R30
.ENDM
.MACRO __PUTB1SX
MOVW R26,R28
SUBI R26,LOW(-@0)
SBCI R27,HIGH(-@0)
ST X,R30
.ENDM
.MACRO __PUTW1SX
MOVW R26,R28
SUBI R26,LOW(-@0)
SBCI R27,HIGH(-@0)
ST X+,R30
ST X,R31
.ENDM
.MACRO __PUTD1SX
MOVW R26,R28
SUBI R26,LOW(-@0)
SBCI R27,HIGH(-@0)
ST X+,R30
ST X+,R31
ST X+,R22
ST X,R23
.ENDM
.MACRO __CLRW1SX
MOVW R26,R28
SUBI R26,LOW(-@0)
SBCI R27,HIGH(-@0)
ST X+,R30
ST X,R30
.ENDM
.MACRO __CLRD1SX
MOVW R26,R28
SUBI R26,LOW(-@0)
SBCI R27,HIGH(-@0)
ST X+,R30
ST X+,R30
ST X+,R30
ST X,R30
.ENDM
.MACRO __PUTB2SX
MOVW R30,R28
SUBI R30,LOW(-@0)
SBCI R31,HIGH(-@0)
ST Z,R26
.ENDM
.MACRO __PUTW2SX
MOVW R30,R28
SUBI R30,LOW(-@0)
SBCI R31,HIGH(-@0)
ST Z+,R26
ST Z,R27
.ENDM
.MACRO __PUTD2SX
MOVW R30,R28
SUBI R30,LOW(-@0)
SBCI R31,HIGH(-@0)
ST Z+,R26
ST Z+,R27
ST Z+,R24
ST Z,R25
.ENDM
.MACRO __PUTBSRX
MOVW R30,R28
SUBI R30,LOW(-@1)
SBCI R31,HIGH(-@1)
ST Z,R@0
.ENDM
.MACRO __PUTWSRX
MOVW R30,R28
SUBI R30,LOW(-@2)
SBCI R31,HIGH(-@2)
ST Z+,R@0
ST Z,R@1
.ENDM
.MACRO __PUTB1SNX
MOVW R26,R28
SUBI R26,LOW(-@0)
SBCI R27,HIGH(-@0)
LD R0,X+
LD R27,X
MOV R26,R0
SUBI R26,LOW(-@1)
SBCI R27,HIGH(-@1)
ST X,R30
.ENDM
.MACRO __PUTW1SNX
MOVW R26,R28
SUBI R26,LOW(-@0)
SBCI R27,HIGH(-@0)
LD R0,X+
LD R27,X
MOV R26,R0
SUBI R26,LOW(-@1)
SBCI R27,HIGH(-@1)
ST X+,R30
ST X,R31
.ENDM
.MACRO __PUTD1SNX
MOVW R26,R28
SUBI R26,LOW(-@0)
SBCI R27,HIGH(-@0)
LD R0,X+
LD R27,X
MOV R26,R0
SUBI R26,LOW(-@1)
SBCI R27,HIGH(-@1)
ST X+,R30
ST X+,R31
ST X+,R22
ST X,R23
.ENDM
.MACRO __MULBRR
MULS R@0,R@1
MOVW R30,R0
.ENDM
.MACRO __MULBRRU
MUL R@0,R@1
MOVW R30,R0
.ENDM
.MACRO __MULBRR0
MULS R@0,R@1
.ENDM
.MACRO __MULBRRU0
MUL R@0,R@1
.ENDM
.MACRO __MULBNWRU
LDI R26,@2
MUL R26,R@0
MOVW R30,R0
MUL R26,R@1
ADD R31,R0
.ENDM
;NAME DEFINITIONS FOR GLOBAL VARIABLES ALLOCATED TO REGISTERS
.DEF _adcData=R4
.DEF _adcData_msb=R5
.DEF __lcd_x=R7
.DEF __lcd_y=R6
.DEF __lcd_maxx=R9
.CSEG
.ORG 0x00
;START OF CODE MARKER
__START_OF_CODE:
;INTERRUPT VECTORS
JMP __RESET
JMP _ext_int0_isr
JMP _ext_int1_isr
JMP _ext_int2_isr
JMP 0x00
JMP 0x00
JMP 0x00
JMP 0x00
JMP 0x00
JMP 0x00
JMP 0x00
JMP 0x00
JMP 0x00
JMP 0x00
JMP 0x00
JMP 0x00
JMP _adc_isr
JMP 0x00
JMP 0x00
JMP 0x00
JMP 0x00
_tbl10_G100:
.DB 0x10,0x27,0xE8,0x3,0x64,0x0,0xA,0x0
.DB 0x1,0x0
_tbl16_G100:
.DB 0x0,0x10,0x0,0x1,0x10,0x0,0x1,0x0
;GLOBAL REGISTER VARIABLES INITIALIZATION
__REG_VARS:
.DB 0x0,0x0
_0x3:
.DB 0x48,0x65,0x6C,0x6C,0x6F
_0x0:
.DB 0x25,0x64,0x0
_0x2020003:
.DB 0x80,0xC0
__GLOBAL_INI_TBL:
.DW 0x02
.DW 0x04
.DW __REG_VARS*2
.DW 0x05
.DW _str
.DW _0x3*2
.DW 0x02
.DW __base_y_G101
.DW _0x2020003*2
_0xFFFFFFFF:
.DW 0
#define __GLOBAL_INI_TBL_PRESENT 1
__RESET:
CLI
CLR R30
OUT EECR,R30
;INTERRUPT VECTORS ARE PLACED
;AT THE START OF FLASH
LDI R31,1
OUT GICR,R31
OUT GICR,R30
OUT MCUCR,R30
;CLEAR R2-R14
LDI R24,(14-2)+1
LDI R26,2
CLR R27
__CLEAR_REG:
ST X+,R30
DEC R24
BRNE __CLEAR_REG
;CLEAR SRAM
LDI R24,LOW(__CLEAR_SRAM_SIZE)
LDI R25,HIGH(__CLEAR_SRAM_SIZE)
LDI R26,__SRAM_START
__CLEAR_SRAM:
ST X+,R30
SBIW R24,1
BRNE __CLEAR_SRAM
;GLOBAL VARIABLES INITIALIZATION
LDI R30,LOW(__GLOBAL_INI_TBL*2)
LDI R31,HIGH(__GLOBAL_INI_TBL*2)
__GLOBAL_INI_NEXT:
LPM R24,Z+
LPM R25,Z+
SBIW R24,0
BREQ __GLOBAL_INI_END
LPM R26,Z+
LPM R27,Z+
LPM R0,Z+
LPM R1,Z+
MOVW R22,R30
MOVW R30,R0
__GLOBAL_INI_LOOP:
LPM R0,Z+
ST X+,R0
SBIW R24,1
BRNE __GLOBAL_INI_LOOP
MOVW R30,R22
RJMP __GLOBAL_INI_NEXT
__GLOBAL_INI_END:
;HARDWARE STACK POINTER INITIALIZATION
LDI R30,LOW(__SRAM_END-__HEAP_SIZE)
OUT SPL,R30
LDI R30,HIGH(__SRAM_END-__HEAP_SIZE)
OUT SPH,R30
;DATA STACK POINTER INITIALIZATION
LDI R28,LOW(__SRAM_START+__DSTACK_SIZE)
LDI R29,HIGH(__SRAM_START+__DSTACK_SIZE)
JMP _main
.ESEG
.ORG 0
.DSEG
.ORG 0x260
.CSEG
;/*******************************************************
;This program was created by the
;CodeWizardAVR V3.12 Advanced
;Automatic Program Generator
;� Copyright 1998-2014 Pavel Haiduc, HP InfoTech s.r.l.
;http://www.hpinfotech.com
;
;Project :
;Version :
;Date : 10/22/2019
;Author :
;Company :
;Comments:
;
;
;Chip type : ATmega32
;Program type : Application
;AVR Core Clock frequency: 8.000000 MHz
;Memory model : Small
;External RAM size : 0
;Data Stack size : 512
;*******************************************************/
;
;#include <mega32.h>
#ifndef __SLEEP_DEFINED__
#define __SLEEP_DEFINED__
.EQU __se_bit=0x80
.EQU __sm_mask=0x70
.EQU __sm_powerdown=0x20
.EQU __sm_powersave=0x30
.EQU __sm_standby=0x60
.EQU __sm_ext_standby=0x70
.EQU __sm_adc_noise_red=0x10
.SET power_ctrl_reg=mcucr
#endif
;#include <stdio.h>
;#include <delay.h>
;
;// Alphanumeric LCD functions
;#include <alcd.h>
;
;// Declare your global variables here
;char str[10] = "Hello" ;
.DSEG
;int adcData = 0 ;
;// External Interrupt 0 service routine
;interrupt [EXT_INT0] void ext_int0_isr(void)
; 0000 0024 {
.CSEG
_ext_int0_isr:
; .FSTART _ext_int0_isr
; 0000 0025 // Place your code here
; 0000 0026
; 0000 0027 }
RETI
; .FEND
;
;// External Interrupt 1 service routine
;interrupt [EXT_INT1] void ext_int1_isr(void)
; 0000 002B {
_ext_int1_isr:
; .FSTART _ext_int1_isr
; 0000 002C // Place your code here
; 0000 002D
; 0000 002E }
RETI
; .FEND
;
;// External Interrupt 2 service routine
;interrupt [EXT_INT2] void ext_int2_isr(void)
; 0000 0032 {
_ext_int2_isr:
; .FSTART _ext_int2_isr
; 0000 0033 // Place your code here
; 0000 0034
; 0000 0035 }
RETI
; .FEND
;
;// Voltage Reference: AREF pin
;#define ADC_VREF_TYPE ((0<<REFS1) | (0<<REFS0) | (0<<ADLAR))
;
;// ADC interrupt service routine
;interrupt [ADC_INT] void adc_isr(void)
; 0000 003C {
_adc_isr:
; .FSTART _adc_isr
; 0000 003D unsigned int adc_data;
; 0000 003E // Read the AD conversion result
; 0000 003F
; 0000 0040 adc_data=ADCW;
ST -Y,R17
ST -Y,R16
; adc_data -> R16,R17
__INWR 16,17,4
; 0000 0041 // Place your code here
; 0000 0042 adcData = adc_data ;
MOVW R4,R16
; 0000 0043
; 0000 0044 }
LD R16,Y+
LD R17,Y+
RETI
; .FEND
;
;void main(void)
; 0000 0047 {
_main:
; .FSTART _main
; 0000 0048 // Declare your local variables here
; 0000 0049
; 0000 004A // Input/Output Ports initialization
; 0000 004B // Port A initialization
; 0000 004C // Function: Bit7=In Bit6=In Bit5=In Bit4=In Bit3=In Bit2=In Bit1=In Bit0=In
; 0000 004D DDRA=(0<<DDA7) | (0<<DDA6) | (0<<DDA5) | (0<<DDA4) | (0<<DDA3) | (0<<DDA2) | (0<<DDA1) | (0<<DDA0);
LDI R30,LOW(0)
OUT 0x1A,R30
; 0000 004E // State: Bit7=T Bit6=T Bit5=T Bit4=T Bit3=T Bit2=T Bit1=T Bit0=T
; 0000 004F PORTA=(0<<PORTA7) | (0<<PORTA6) | (0<<PORTA5) | (0<<PORTA4) | (0<<PORTA3) | (0<<PORTA2) | (0<<PORTA1) | (0<<PORTA0);
OUT 0x1B,R30
; 0000 0050
; 0000 0051 // Port B initialization
; 0000 0052 // Function: Bit7=In Bit6=In Bit5=In Bit4=In Bit3=In Bit2=In Bit1=In Bit0=In
; 0000 0053 DDRB=(0<<DDB7) | (0<<DDB6) | (0<<DDB5) | (0<<DDB4) | (0<<DDB3) | (0<<DDB2) | (0<<DDB1) | (0<<DDB0);
OUT 0x17,R30
; 0000 0054 // State: Bit7=T Bit6=T Bit5=T Bit4=T Bit3=T Bit2=T Bit1=T Bit0=T
; 0000 0055 PORTB=(0<<PORTB7) | (0<<PORTB6) | (0<<PORTB5) | (0<<PORTB4) | (0<<PORTB3) | (0<<PORTB2) | (0<<PORTB1) | (0<<PORTB0);
OUT 0x18,R30
; 0000 0056
; 0000 0057 // Port C initialization
; 0000 0058 // Function: Bit7=In Bit6=In Bit5=In Bit4=In Bit3=In Bit2=In Bit1=In Bit0=In
; 0000 0059 DDRC=(0<<DDC7) | (0<<DDC6) | (0<<DDC5) | (0<<DDC4) | (0<<DDC3) | (0<<DDC2) | (0<<DDC1) | (0<<DDC0);
OUT 0x14,R30
; 0000 005A // State: Bit7=T Bit6=T Bit5=T Bit4=T Bit3=T Bit2=T Bit1=T Bit0=T
; 0000 005B PORTC=(0<<PORTC7) | (0<<PORTC6) | (0<<PORTC5) | (0<<PORTC4) | (0<<PORTC3) | (0<<PORTC2) | (0<<PORTC1) | (0<<PORTC0);
OUT 0x15,R30
; 0000 005C
; 0000 005D // Port D initialization
; 0000 005E // Function: Bit7=In Bit6=In Bit5=In Bit4=In Bit3=In Bit2=In Bit1=In Bit0=In
; 0000 005F DDRD=(0<<DDD7) | (0<<DDD6) | (0<<DDD5) | (0<<DDD4) | (0<<DDD3) | (0<<DDD2) | (0<<DDD1) | (0<<DDD0);
OUT 0x11,R30
; 0000 0060 // State: Bit7=T Bit6=T Bit5=T Bit4=T Bit3=T Bit2=T Bit1=T Bit0=T
; 0000 0061 PORTD=(0<<PORTD7) | (0<<PORTD6) | (0<<PORTD5) | (0<<PORTD4) | (0<<PORTD3) | (0<<PORTD2) | (0<<PORTD1) | (0<<PORTD0);
OUT 0x12,R30
; 0000 0062
; 0000 0063 // Timer/Counter 0 initialization
; 0000 0064 // Clock source: System Clock
; 0000 0065 // Clock value: Timer 0 Stopped
; 0000 0066 // Mode: Normal top=0xFF
; 0000 0067 // OC0 output: Disconnected
; 0000 0068 TCCR0=(0<<WGM00) | (0<<COM01) | (0<<COM00) | (0<<WGM01) | (0<<CS02) | (0<<CS01) | (0<<CS00);
OUT 0x33,R30
; 0000 0069 TCNT0=0x00;
OUT 0x32,R30
; 0000 006A OCR0=0x00;
OUT 0x3C,R30
; 0000 006B
; 0000 006C // Timer/Counter 1 initialization
; 0000 006D // Clock source: System Clock
; 0000 006E // Clock value: Timer1 Stopped
; 0000 006F // Mode: Normal top=0xFFFF
; 0000 0070 // OC1A output: Disconnected
; 0000 0071 // OC1B output: Disconnected
; 0000 0072 // Noise Canceler: Off
; 0000 0073 // Input Capture on Falling Edge
; 0000 0074 // Timer1 Overflow Interrupt: Off
; 0000 0075 // Input Capture Interrupt: Off
; 0000 0076 // Compare A Match Interrupt: Off
; 0000 0077 // Compare B Match Interrupt: Off
; 0000 0078 TCCR1A=(0<<COM1A1) | (0<<COM1A0) | (0<<COM1B1) | (0<<COM1B0) | (0<<WGM11) | (0<<WGM10);
OUT 0x2F,R30
; 0000 0079 TCCR1B=(0<<ICNC1) | (0<<ICES1) | (0<<WGM13) | (0<<WGM12) | (0<<CS12) | (0<<CS11) | (0<<CS10);
OUT 0x2E,R30
; 0000 007A TCNT1H=0x00;
OUT 0x2D,R30
; 0000 007B TCNT1L=0x00;
OUT 0x2C,R30
; 0000 007C ICR1H=0x00;
OUT 0x27,R30
; 0000 007D ICR1L=0x00;
OUT 0x26,R30
; 0000 007E OCR1AH=0x00;
OUT 0x2B,R30
; 0000 007F OCR1AL=0x00;
OUT 0x2A,R30
; 0000 0080 OCR1BH=0x00;
OUT 0x29,R30
; 0000 0081 OCR1BL=0x00;
OUT 0x28,R30
; 0000 0082
; 0000 0083 // Timer/Counter 2 initialization
; 0000 0084 // Clock source: System Clock
; 0000 0085 // Clock value: Timer2 Stopped
; 0000 0086 // Mode: Normal top=0xFF
; 0000 0087 // OC2 output: Disconnected
; 0000 0088 ASSR=0<<AS2;
OUT 0x22,R30
; 0000 0089 TCCR2=(0<<PWM2) | (0<<COM21) | (0<<COM20) | (0<<CTC2) | (0<<CS22) | (0<<CS21) | (0<<CS20);
OUT 0x25,R30
; 0000 008A TCNT2=0x00;
OUT 0x24,R30
; 0000 008B OCR2=0x00;
OUT 0x23,R30
; 0000 008C
; 0000 008D // Timer(s)/Counter(s) Interrupt(s) initialization
; 0000 008E TIMSK=(0<<OCIE2) | (0<<TOIE2) | (0<<TICIE1) | (0<<OCIE1A) | (0<<OCIE1B) | (0<<TOIE1) | (0<<OCIE0) | (0<<TOIE0);
OUT 0x39,R30
; 0000 008F
; 0000 0090 // External Interrupt(s) initialization
; 0000 0091 // INT0: On
; 0000 0092 // INT0 Mode: Rising Edge
; 0000 0093 // INT1: On
; 0000 0094 // INT1 Mode: Rising Edge
; 0000 0095 // INT2: On
; 0000 0096 // INT2 Mode: Rising Edge
; 0000 0097 GICR|=(1<<INT1) | (1<<INT0) | (1<<INT2);
IN R30,0x3B
ORI R30,LOW(0xE0)
OUT 0x3B,R30
; 0000 0098 MCUCR=(1<<ISC11) | (1<<ISC10) | (1<<ISC01) | (1<<ISC00);
LDI R30,LOW(15)
OUT 0x35,R30
; 0000 0099 MCUCSR=(1<<ISC2);
LDI R30,LOW(64)
OUT 0x34,R30
; 0000 009A GIFR=(1<<INTF1) | (1<<INTF0) | (1<<INTF2);
LDI R30,LOW(224)
OUT 0x3A,R30
; 0000 009B
; 0000 009C // USART initialization
; 0000 009D // USART disabled
; 0000 009E UCSRB=(0<<RXCIE) | (0<<TXCIE) | (0<<UDRIE) | (0<<RXEN) | (0<<TXEN) | (0<<UCSZ2) | (0<<RXB8) | (0<<TXB8);
LDI R30,LOW(0)
OUT 0xA,R30
; 0000 009F
; 0000 00A0 // Analog Comparator initialization
; 0000 00A1 // Analog Comparator: Off
; 0000 00A2 // The Analog Comparator's positive input is
; 0000 00A3 // connected to the AIN0 pin
; 0000 00A4 // The Analog Comparator's negative input is
; 0000 00A5 // connected to the AIN1 pin
; 0000 00A6 ACSR=(1<<ACD) | (0<<ACBG) | (0<<ACO) | (0<<ACI) | (0<<ACIE) | (0<<ACIC) | (0<<ACIS1) | (0<<ACIS0);
LDI R30,LOW(128)
OUT 0x8,R30
; 0000 00A7
; 0000 00A8 // ADC initialization
; 0000 00A9 // ADC Clock frequency: 1000.000 kHz
; 0000 00AA // ADC Voltage Reference: AREF pin
; 0000 00AB // ADC Auto Trigger Source: ADC Stopped
; 0000 00AC ADMUX=ADC_VREF_TYPE;
LDI R30,LOW(0)
OUT 0x7,R30
; 0000 00AD ADCSRA=(1<<ADEN) | (0<<ADSC) | (0<<ADATE) | (0<<ADIF) | (1<<ADIE) | (0<<ADPS2) | (1<<ADPS1) | (1<<ADPS0);
LDI R30,LOW(139)
OUT 0x6,R30
; 0000 00AE SFIOR=(0<<ADTS2) | (0<<ADTS1) | (0<<ADTS0);
LDI R30,LOW(0)
OUT 0x30,R30
; 0000 00AF
; 0000 00B0 // SPI initialization
; 0000 00B1 // SPI disabled
; 0000 00B2 SPCR=(0<<SPIE) | (0<<SPE) | (0<<DORD) | (0<<MSTR) | (0<<CPOL) | (0<<CPHA) | (0<<SPR1) | (0<<SPR0);
OUT 0xD,R30
; 0000 00B3
; 0000 00B4 // TWI initialization
; 0000 00B5 // TWI disabled
; 0000 00B6 TWCR=(0<<TWEA) | (0<<TWSTA) | (0<<TWSTO) | (0<<TWEN) | (0<<TWIE);
OUT 0x36,R30
; 0000 00B7
; 0000 00B8 // Alphanumeric LCD initialization
; 0000 00B9 // Connections are specified in the
; 0000 00BA // Project|Configure|C Compiler|Libraries|Alphanumeric LCD menu:
; 0000 00BB // RS - PORTB Bit 0
; 0000 00BC // RD - PORTB Bit 1
; 0000 00BD // EN - PORTB Bit 2
; 0000 00BE // D4 - PORTB Bit 4
; 0000 00BF // D5 - PORTB Bit 5
; 0000 00C0 // D6 - PORTB Bit 6
; 0000 00C1 // D7 - PORTB Bit 7
; 0000 00C2 // Characters/line: 16
; 0000 00C3 lcd_init(16);
LDI R26,LOW(16)
CALL _lcd_init
; 0000 00C4
; 0000 00C5 // Global enable interrupts
; 0000 00C6 #asm("sei")
sei
; 0000 00C7
; 0000 00C8 while (1)
_0x4:
; 0000 00C9 {
; 0000 00CA sprintf(str , "%d" , adcData ) ;
LDI R30,LOW(_str)
LDI R31,HIGH(_str)
ST -Y,R31
ST -Y,R30
__POINTW1FN _0x0,0
ST -Y,R31
ST -Y,R30
MOVW R30,R4
CALL __CWD1
CALL __PUTPARD1
LDI R24,4
CALL _sprintf
ADIW R28,8
; 0000 00CB lcd_gotoxy(0,0);
LDI R30,LOW(0)
ST -Y,R30
LDI R26,LOW(0)
CALL _lcd_gotoxy
; 0000 00CC delay_ms(1000);
LDI R26,LOW(1000)
LDI R27,HIGH(1000)
CALL _delay_ms
; 0000 00CD lcd_puts(str);
LDI R26,LOW(_str)
LDI R27,HIGH(_str)
CALL _lcd_puts
; 0000 00CE // Place your code here
; 0000 00CF
; 0000 00D0 }
RJMP _0x4
; 0000 00D1 }
_0x7:
RJMP _0x7
; .FEND
#ifndef __SLEEP_DEFINED__
#define __SLEEP_DEFINED__
.EQU __se_bit=0x80
.EQU __sm_mask=0x70
.EQU __sm_powerdown=0x20
.EQU __sm_powersave=0x30
.EQU __sm_standby=0x60
.EQU __sm_ext_standby=0x70
.EQU __sm_adc_noise_red=0x10
.SET power_ctrl_reg=mcucr
#endif
.CSEG
_put_buff_G100:
; .FSTART _put_buff_G100
ST -Y,R27
ST -Y,R26
ST -Y,R17
ST -Y,R16
LDD R26,Y+2
LDD R27,Y+2+1
ADIW R26,2
CALL __GETW1P
SBIW R30,0
BREQ _0x2000010
LDD R26,Y+2
LDD R27,Y+2+1
ADIW R26,4
CALL __GETW1P
MOVW R16,R30
SBIW R30,0
BREQ _0x2000012
__CPWRN 16,17,2
BRLO _0x2000013
MOVW R30,R16
SBIW R30,1
MOVW R16,R30
__PUTW1SNS 2,4
_0x2000012:
LDD R26,Y+2
LDD R27,Y+2+1
ADIW R26,2
LD R30,X+
LD R31,X+
ADIW R30,1
ST -X,R31
ST -X,R30
SBIW R30,1
LDD R26,Y+4
STD Z+0,R26
_0x2000013:
LDD R26,Y+2
LDD R27,Y+2+1
CALL __GETW1P
TST R31
BRMI _0x2000014
LD R30,X+
LD R31,X+
ADIW R30,1
ST -X,R31
ST -X,R30
_0x2000014:
RJMP _0x2000015
_0x2000010:
LDD R26,Y+2
LDD R27,Y+2+1
LDI R30,LOW(65535)
LDI R31,HIGH(65535)
ST X+,R30
ST X,R31
_0x2000015:
LDD R17,Y+1
LDD R16,Y+0
ADIW R28,5
RET
; .FEND
__print_G100:
; .FSTART __print_G100
ST -Y,R27
ST -Y,R26
SBIW R28,6
CALL __SAVELOCR6
LDI R17,0
LDD R26,Y+12
LDD R27,Y+12+1
LDI R30,LOW(0)
LDI R31,HIGH(0)
ST X+,R30
ST X,R31
_0x2000016:
LDD R30,Y+18
LDD R31,Y+18+1
ADIW R30,1
STD Y+18,R30
STD Y+18+1,R31
SBIW R30,1
LPM R30,Z
MOV R18,R30
CPI R30,0
BRNE PC+2
RJMP _0x2000018
MOV R30,R17
CPI R30,0
BRNE _0x200001C
CPI R18,37
BRNE _0x200001D
LDI R17,LOW(1)
RJMP _0x200001E
_0x200001D:
CALL SUBOPT_0x0
_0x200001E:
RJMP _0x200001B
_0x200001C:
CPI R30,LOW(0x1)
BRNE _0x200001F
CPI R18,37
BRNE _0x2000020
CALL SUBOPT_0x0
RJMP _0x20000CC
_0x2000020:
LDI R17,LOW(2)
LDI R20,LOW(0)
LDI R16,LOW(0)
CPI R18,45
BRNE _0x2000021
LDI R16,LOW(1)
RJMP _0x200001B
_0x2000021:
CPI R18,43
BRNE _0x2000022
LDI R20,LOW(43)
RJMP _0x200001B
_0x2000022:
CPI R18,32
BRNE _0x2000023
LDI R20,LOW(32)
RJMP _0x200001B
_0x2000023:
RJMP _0x2000024
_0x200001F:
CPI R30,LOW(0x2)
BRNE _0x2000025
_0x2000024:
LDI R21,LOW(0)
LDI R17,LOW(3)
CPI R18,48
BRNE _0x2000026
ORI R16,LOW(128)
RJMP _0x200001B
_0x2000026:
RJMP _0x2000027
_0x2000025:
CPI R30,LOW(0x3)
BREQ PC+2
RJMP _0x200001B
_0x2000027:
CPI R18,48
BRLO _0x200002A
CPI R18,58
BRLO _0x200002B
_0x200002A:
RJMP _0x2000029
_0x200002B:
LDI R26,LOW(10)
MUL R21,R26
MOV R21,R0
MOV R30,R18
SUBI R30,LOW(48)
ADD R21,R30
RJMP _0x200001B
_0x2000029:
MOV R30,R18
CPI R30,LOW(0x63)
BRNE _0x200002F
CALL SUBOPT_0x1
LDD R30,Y+16
LDD R31,Y+16+1
LDD R26,Z+4
ST -Y,R26
CALL SUBOPT_0x2
RJMP _0x2000030
_0x200002F:
CPI R30,LOW(0x73)
BRNE _0x2000032
CALL SUBOPT_0x1
CALL SUBOPT_0x3
CALL _strlen
MOV R17,R30
RJMP _0x2000033
_0x2000032:
CPI R30,LOW(0x70)
BRNE _0x2000035
CALL SUBOPT_0x1
CALL SUBOPT_0x3
CALL _strlenf
MOV R17,R30
ORI R16,LOW(8)
_0x2000033:
ORI R16,LOW(2)
ANDI R16,LOW(127)
LDI R19,LOW(0)
RJMP _0x2000036
_0x2000035:
CPI R30,LOW(0x64)
BREQ _0x2000039
CPI R30,LOW(0x69)
BRNE _0x200003A
_0x2000039:
ORI R16,LOW(4)
RJMP _0x200003B
_0x200003A:
CPI R30,LOW(0x75)
BRNE _0x200003C
_0x200003B:
LDI R30,LOW(_tbl10_G100*2)
LDI R31,HIGH(_tbl10_G100*2)
STD Y+6,R30
STD Y+6+1,R31
LDI R17,LOW(5)
RJMP _0x200003D
_0x200003C:
CPI R30,LOW(0x58)
BRNE _0x200003F
ORI R16,LOW(8)
RJMP _0x2000040
_0x200003F:
CPI R30,LOW(0x78)
BREQ PC+2
RJMP _0x2000071
_0x2000040:
LDI R30,LOW(_tbl16_G100*2)
LDI R31,HIGH(_tbl16_G100*2)
STD Y+6,R30
STD Y+6+1,R31
LDI R17,LOW(4)
_0x200003D:
SBRS R16,2
RJMP _0x2000042
CALL SUBOPT_0x1
CALL SUBOPT_0x4
LDD R26,Y+11
TST R26
BRPL _0x2000043
LDD R30,Y+10
LDD R31,Y+10+1
CALL __ANEGW1
STD Y+10,R30
STD Y+10+1,R31
LDI R20,LOW(45)
_0x2000043:
CPI R20,0
BREQ _0x2000044
SUBI R17,-LOW(1)
RJMP _0x2000045
_0x2000044:
ANDI R16,LOW(251)
_0x2000045:
RJMP _0x2000046
_0x2000042:
CALL SUBOPT_0x1
CALL SUBOPT_0x4
_0x2000046:
_0x2000036:
SBRC R16,0
RJMP _0x2000047
_0x2000048:
CP R17,R21
BRSH _0x200004A
SBRS R16,7
RJMP _0x200004B
SBRS R16,2
RJMP _0x200004C
ANDI R16,LOW(251)
MOV R18,R20
SUBI R17,LOW(1)
RJMP _0x200004D
_0x200004C:
LDI R18,LOW(48)
_0x200004D:
RJMP _0x200004E
_0x200004B:
LDI R18,LOW(32)
_0x200004E:
CALL SUBOPT_0x0
SUBI R21,LOW(1)
RJMP _0x2000048
_0x200004A:
_0x2000047:
MOV R19,R17
SBRS R16,1
RJMP _0x200004F
_0x2000050:
CPI R19,0
BREQ _0x2000052
SBRS R16,3
RJMP _0x2000053
LDD R30,Y+6
LDD R31,Y+6+1
LPM R18,Z+
STD Y+6,R30
STD Y+6+1,R31
RJMP _0x2000054
_0x2000053:
LDD R26,Y+6
LDD R27,Y+6+1
LD R18,X+
STD Y+6,R26
STD Y+6+1,R27
_0x2000054:
CALL SUBOPT_0x0
CPI R21,0
BREQ _0x2000055
SUBI R21,LOW(1)
_0x2000055:
SUBI R19,LOW(1)
RJMP _0x2000050
_0x2000052:
RJMP _0x2000056
_0x200004F:
_0x2000058:
LDI R18,LOW(48)
LDD R30,Y+6
LDD R31,Y+6+1
CALL __GETW1PF
STD Y+8,R30
STD Y+8+1,R31
LDD R30,Y+6
LDD R31,Y+6+1
ADIW R30,2
STD Y+6,R30
STD Y+6+1,R31
_0x200005A:
LDD R30,Y+8
LDD R31,Y+8+1
LDD R26,Y+10
LDD R27,Y+10+1
CP R26,R30
CPC R27,R31
BRLO _0x200005C
SUBI R18,-LOW(1)
LDD R26,Y+8
LDD R27,Y+8+1
LDD R30,Y+10
LDD R31,Y+10+1
SUB R30,R26
SBC R31,R27
STD Y+10,R30
STD Y+10+1,R31
RJMP _0x200005A
_0x200005C:
CPI R18,58
BRLO _0x200005D
SBRS R16,3
RJMP _0x200005E
SUBI R18,-LOW(7)
RJMP _0x200005F
_0x200005E:
SUBI R18,-LOW(39)
_0x200005F:
_0x200005D:
SBRC R16,4
RJMP _0x2000061
CPI R18,49
BRSH _0x2000063
LDD R26,Y+8
LDD R27,Y+8+1
SBIW R26,1
BRNE _0x2000062
_0x2000063:
RJMP _0x20000CD
_0x2000062:
CP R21,R19
BRLO _0x2000067
SBRS R16,0
RJMP _0x2000068
_0x2000067:
RJMP _0x2000066
_0x2000068:
LDI R18,LOW(32)
SBRS R16,7
RJMP _0x2000069
LDI R18,LOW(48)
_0x20000CD:
ORI R16,LOW(16)
SBRS R16,2
RJMP _0x200006A
ANDI R16,LOW(251)
ST -Y,R20
CALL SUBOPT_0x2
CPI R21,0
BREQ _0x200006B
SUBI R21,LOW(1)
_0x200006B:
_0x200006A:
_0x2000069:
_0x2000061:
CALL SUBOPT_0x0
CPI R21,0
BREQ _0x200006C
SUBI R21,LOW(1)
_0x200006C:
_0x2000066:
SUBI R19,LOW(1)
LDD R26,Y+8
LDD R27,Y+8+1
SBIW R26,2
BRLO _0x2000059
RJMP _0x2000058
_0x2000059:
_0x2000056:
SBRS R16,0
RJMP _0x200006D
_0x200006E:
CPI R21,0
BREQ _0x2000070
SUBI R21,LOW(1)
LDI R30,LOW(32)
ST -Y,R30
CALL SUBOPT_0x2
RJMP _0x200006E
_0x2000070:
_0x200006D:
_0x2000071:
_0x2000030:
_0x20000CC:
LDI R17,LOW(0)
_0x200001B:
RJMP _0x2000016
_0x2000018:
LDD R26,Y+12
LDD R27,Y+12+1
CALL __GETW1P
CALL __LOADLOCR6
ADIW R28,20
RET
; .FEND
_sprintf:
; .FSTART _sprintf
PUSH R15
MOV R15,R24
SBIW R28,6
CALL __SAVELOCR4
CALL SUBOPT_0x5
SBIW R30,0
BRNE _0x2000072
LDI R30,LOW(65535)
LDI R31,HIGH(65535)
RJMP _0x2080002
_0x2000072:
MOVW R26,R28
ADIW R26,6
CALL __ADDW2R15
MOVW R16,R26
CALL SUBOPT_0x5
STD Y+6,R30
STD Y+6+1,R31
LDI R30,LOW(0)
STD Y+8,R30
STD Y+8+1,R30
MOVW R26,R28
ADIW R26,10
CALL __ADDW2R15
CALL __GETW1P
ST -Y,R31
ST -Y,R30
ST -Y,R17
ST -Y,R16
LDI R30,LOW(_put_buff_G100)
LDI R31,HIGH(_put_buff_G100)
ST -Y,R31
ST -Y,R30
MOVW R26,R28
ADIW R26,10
RCALL __print_G100
MOVW R18,R30
LDD R26,Y+6
LDD R27,Y+6+1
LDI R30,LOW(0)
ST X,R30
MOVW R30,R18
_0x2080002:
CALL __LOADLOCR4
ADIW R28,10
POP R15
RET
; .FEND
#ifndef __SLEEP_DEFINED__
#define __SLEEP_DEFINED__
.EQU __se_bit=0x80
.EQU __sm_mask=0x70
.EQU __sm_powerdown=0x20
.EQU __sm_powersave=0x30
.EQU __sm_standby=0x60
.EQU __sm_ext_standby=0x70
.EQU __sm_adc_noise_red=0x10
.SET power_ctrl_reg=mcucr
#endif
.DSEG
.CSEG
__lcd_write_nibble_G101:
; .FSTART __lcd_write_nibble_G101
ST -Y,R26
IN R30,0x18
ANDI R30,LOW(0xF)
MOV R26,R30
LD R30,Y
ANDI R30,LOW(0xF0)
OR R30,R26
OUT 0x18,R30
__DELAY_USB 13
SBI 0x18,2
__DELAY_USB 13
CBI 0x18,2
__DELAY_USB 13
RJMP _0x2080001
; .FEND
__lcd_write_data:
; .FSTART __lcd_write_data
ST -Y,R26
LD R26,Y
RCALL __lcd_write_nibble_G101
ld r30,y
swap r30
st y,r30
LD R26,Y
RCALL __lcd_write_nibble_G101
__DELAY_USB 133
RJMP _0x2080001
; .FEND
_lcd_gotoxy:
; .FSTART _lcd_gotoxy
ST -Y,R26
LD R30,Y
LDI R31,0
SUBI R30,LOW(-__base_y_G101)
SBCI R31,HIGH(-__base_y_G101)
LD R30,Z
LDD R26,Y+1
ADD R26,R30
RCALL __lcd_write_data
LDD R7,Y+1
LDD R6,Y+0
ADIW R28,2
RET
; .FEND
_lcd_clear:
; .FSTART _lcd_clear
LDI R26,LOW(2)
CALL SUBOPT_0x6
LDI R26,LOW(12)
RCALL __lcd_write_data
LDI R26,LOW(1)
CALL SUBOPT_0x6
LDI R30,LOW(0)
MOV R6,R30
MOV R7,R30
RET
; .FEND
_lcd_putchar:
; .FSTART _lcd_putchar
ST -Y,R26
LD R26,Y
CPI R26,LOW(0xA)
BREQ _0x2020005
CP R7,R9
BRLO _0x2020004
_0x2020005:
LDI R30,LOW(0)
ST -Y,R30
INC R6
MOV R26,R6
RCALL _lcd_gotoxy
LD R26,Y
CPI R26,LOW(0xA)
BRNE _0x2020007
RJMP _0x2080001
_0x2020007:
_0x2020004:
INC R7
SBI 0x18,0
LD R26,Y
RCALL __lcd_write_data
CBI 0x18,0
RJMP _0x2080001
; .FEND
_lcd_puts:
; .FSTART _lcd_puts
ST -Y,R27
ST -Y,R26
ST -Y,R17
_0x2020008:
LDD R26,Y+1
LDD R27,Y+1+1
LD R30,X+
STD Y+1,R26
STD Y+1+1,R27
MOV R17,R30
CPI R30,0
BREQ _0x202000A
MOV R26,R17
RCALL _lcd_putchar
RJMP _0x2020008
_0x202000A:
LDD R17,Y+0
ADIW R28,3
RET
; .FEND
_lcd_init:
; .FSTART _lcd_init
ST -Y,R26
IN R30,0x17
ORI R30,LOW(0xF0)
OUT 0x17,R30
SBI 0x17,2
SBI 0x17,0
SBI 0x17,1
CBI 0x18,2
CBI 0x18,0
CBI 0x18,1
LDD R9,Y+0
LD R30,Y
SUBI R30,-LOW(128)
__PUTB1MN __base_y_G101,2
LD R30,Y
SUBI R30,-LOW(192)
__PUTB1MN __base_y_G101,3
LDI R26,LOW(20)
LDI R27,0
CALL _delay_ms
CALL SUBOPT_0x7
CALL SUBOPT_0x7
CALL SUBOPT_0x7
LDI R26,LOW(32)
RCALL __lcd_write_nibble_G101
__DELAY_USW 200
LDI R26,LOW(40)
RCALL __lcd_write_data
LDI R26,LOW(4)
RCALL __lcd_write_data
LDI R26,LOW(133)
RCALL __lcd_write_data
LDI R26,LOW(6)
RCALL __lcd_write_data
RCALL _lcd_clear
_0x2080001:
ADIW R28,1
RET
; .FEND
.CSEG
.CSEG
_strlen:
; .FSTART _strlen
ST -Y,R27
ST -Y,R26
ld r26,y+
ld r27,y+
clr r30
clr r31
strlen0:
ld r22,x+
tst r22
breq strlen1
adiw r30,1
rjmp strlen0
strlen1:
ret
; .FEND
_strlenf:
; .FSTART _strlenf
ST -Y,R27
ST -Y,R26
clr r26
clr r27
ld r30,y+
ld r31,y+
strlenf0:
lpm r0,z+
tst r0
breq strlenf1
adiw r26,1
rjmp strlenf0
strlenf1:
movw r30,r26
ret
; .FEND
.DSEG
_str:
.BYTE 0xA
__base_y_G101:
.BYTE 0x4
.CSEG
;OPTIMIZER ADDED SUBROUTINE, CALLED 5 TIMES, CODE SIZE REDUCTION:13 WORDS
SUBOPT_0x0:
ST -Y,R18
LDD R26,Y+13
LDD R27,Y+13+1
LDD R30,Y+15
LDD R31,Y+15+1
ICALL
RET
;OPTIMIZER ADDED SUBROUTINE, CALLED 5 TIMES, CODE SIZE REDUCTION:9 WORDS
SUBOPT_0x1:
LDD R30,Y+16
LDD R31,Y+16+1
SBIW R30,4
STD Y+16,R30
STD Y+16+1,R31
RET
;OPTIMIZER ADDED SUBROUTINE, CALLED 3 TIMES, CODE SIZE REDUCTION:3 WORDS
SUBOPT_0x2:
LDD R26,Y+13
LDD R27,Y+13+1
LDD R30,Y+15
LDD R31,Y+15+1
ICALL
RET
;OPTIMIZER ADDED SUBROUTINE, CALLED 2 TIMES, CODE SIZE REDUCTION:4 WORDS
SUBOPT_0x3:
LDD R26,Y+16
LDD R27,Y+16+1
ADIW R26,4
CALL __GETW1P
STD Y+6,R30
STD Y+6+1,R31
LDD R26,Y+6
LDD R27,Y+6+1
RET
;OPTIMIZER ADDED SUBROUTINE, CALLED 2 TIMES, CODE SIZE REDUCTION:2 WORDS
SUBOPT_0x4:
LDD R26,Y+16
LDD R27,Y+16+1
ADIW R26,4
CALL __GETW1P
STD Y+10,R30
STD Y+10+1,R31
RET
;OPTIMIZER ADDED SUBROUTINE, CALLED 2 TIMES, CODE SIZE REDUCTION:1 WORDS
SUBOPT_0x5:
MOVW R26,R28
ADIW R26,12
CALL __ADDW2R15
CALL __GETW1P
RET
;OPTIMIZER ADDED SUBROUTINE, CALLED 2 TIMES, CODE SIZE REDUCTION:1 WORDS
SUBOPT_0x6:
CALL __lcd_write_data
LDI R26,LOW(3)
LDI R27,0
JMP _delay_ms
;OPTIMIZER ADDED SUBROUTINE, CALLED 3 TIMES, CODE SIZE REDUCTION:7 WORDS
SUBOPT_0x7:
LDI R26,LOW(48)
CALL __lcd_write_nibble_G101
__DELAY_USW 200
RET
.CSEG
_delay_ms:
adiw r26,0
breq __delay_ms1
__delay_ms0:
__DELAY_USW 0x7D0
wdr
sbiw r26,1
brne __delay_ms0
__delay_ms1:
ret
__ADDW2R15:
CLR R0
ADD R26,R15
ADC R27,R0
RET
__ANEGW1:
NEG R31
NEG R30
SBCI R31,0
RET
__CWD1:
MOV R22,R31
ADD R22,R22
SBC R22,R22
MOV R23,R22
RET
__GETW1P:
LD R30,X+
LD R31,X
SBIW R26,1
RET
__GETW1PF:
LPM R0,Z+
LPM R31,Z
MOV R30,R0
RET
__PUTPARD1:
ST -Y,R23
ST -Y,R22
ST -Y,R31
ST -Y,R30
RET
__SAVELOCR6:
ST -Y,R21
__SAVELOCR5:
ST -Y,R20
__SAVELOCR4:
ST -Y,R19
__SAVELOCR3:
ST -Y,R18
__SAVELOCR2:
ST -Y,R17
ST -Y,R16
RET
__LOADLOCR6:
LDD R21,Y+5
__LOADLOCR5:
LDD R20,Y+4
__LOADLOCR4:
LDD R19,Y+3
__LOADLOCR3:
LDD R18,Y+2
__LOADLOCR2:
LDD R17,Y+1
LD R16,Y
RET
;END OF CODE MARKER
__END_OF_CODE:
| 17.778886 | 132 | 0.605597 |
d92a77ad51b2bf7b9a37df644b9834f0a18b3e71 | 4,769 | asm | Assembly | transformy/tables/gen/0018.asm | mborik/regression | 25b5f2204ce668594449e8ce804779288b895ac0 | [
"MIT"
] | 3 | 2019-09-18T05:34:22.000Z | 2020-12-04T17:46:52.000Z | transformy/tables/gen/0018.asm | mborik/regression | 25b5f2204ce668594449e8ce804779288b895ac0 | [
"MIT"
] | null | null | null | transformy/tables/gen/0018.asm | mborik/regression | 25b5f2204ce668594449e8ce804779288b895ac0 | [
"MIT"
] | 1 | 2020-01-17T01:04:24.000Z | 2020-01-17T01:04:24.000Z | xor a
ld hl, basescradr + #08cc
ld (hl), a
inc h
ld (hl), a
inc h
ld (hl), a
inc h
ld (hl), a
inc h
ld (hl), a
ld hl, basescradr + #0a10
ld (hl), a
inc h
ld (hl), a
inc h
ld (hl), a
ld hl, basescradr + #120b
ld (hl), a
inc h
ld (hl), a
inc h
ld (hl), a
inc h
ld (hl), a
inc h
ld (hl), a
ld (basescradr + #05ef), a
ld (basescradr + #0e31), a
ld (basescradr + #0eac), a
ld (basescradr + #0f31), a
ld (basescradr + #0fac), a
ld (basescradr + #0ff5), a
ld (basescradr + #1015), a
ld (basescradr + #1114), a
ld a, 96
ld (basescradr + #06ef), a
ld a, 112
ld (basescradr + #07ef), a
ld a, 248
ld (basescradr + #080f), a
ld (basescradr + #090f), a
ld (basescradr + #09b3), a
ld (basescradr + #0a30), a
ld (basescradr + #0b30), a
ld (basescradr + #0bd4), a
ld (basescradr + #0f72), a
ld (basescradr + #112d), a
ld (basescradr + #1312), a
ld a, 252
ld (basescradr + #0892), a
ld (basescradr + #0a0f), a
ld (basescradr + #0ab3), a
ld (basescradr + #0c30), a
ld (basescradr + #0cd4), a
ld (basescradr + #0dd4), a
ld (basescradr + #102e), a
ld (basescradr + #170f), a
ld a, 1
ld hl, basescradr + #0b0e
ld (hl), a
inc h
ld (hl), a
inc h
ld (hl), a
ld hl, basescradr + #0dcc
ld (hl), a
inc h
ld (hl), a
inc h
ld (hl), a
ld (basescradr + #0e6d), a
ld a, 254
ld (basescradr + #0992), a
ld (basescradr + #0a92), a
ld (basescradr + #0b0f), a
ld (basescradr + #0bb3), a
ld (basescradr + #0cb3), a
ld (basescradr + #0d30), a
ld (basescradr + #0ed4), a
ld (basescradr + #0ff4), a
ld (basescradr + #1113), a
inc a
ld hl, basescradr + #08f4
ld (hl), a
inc h
ld (hl), a
inc h
ld (hl), a
inc h
ld (hl), a
inc h
ld (hl), a
ld hl, basescradr + #0c0f
ld (hl), a
inc h
ld (hl), a
inc h
ld (hl), a
ld hl, basescradr + #0db3
ld (hl), a
inc h
ld (hl), a
inc h
ld (hl), a
ld d,a
ld e,a
ld (basescradr + #160e), de
ld (basescradr + #170d), de
ld (basescradr + #0871), a
ld (basescradr + #08d3), a
ld (basescradr + #096e), a
ld (basescradr + #0b92), a
ld (basescradr + #0c92), a
ld (basescradr + #0fd4), a
ld (basescradr + #102d), a
ld (basescradr + #1411), a
ld (basescradr + #1510), a
ld a, 128
ld (basescradr + #0851), a
ld (basescradr + #08f5), a
ld (basescradr + #0c93), a
ld (basescradr + #0d10), a
ld (basescradr + #0e10), a
ld (basescradr + #0eb4), a
ld a, 3
ld hl, basescradr + #08ec
ld (hl), a
inc h
ld (hl), a
inc h
ld (hl), a
ld (basescradr + #082e), a
ld (basescradr + #088d), a
ld (basescradr + #098d), a
ld (basescradr + #0e0e), a
ld (basescradr + #0f0e), a
ld a, 192
ld (basescradr + #0951), a
ld (basescradr + #09f5), a
ld (basescradr + #0af5), a
ld (basescradr + #0b72), a
ld (basescradr + #0d93), a
ld (basescradr + #0ef5), a
ld (basescradr + #0f10), a
ld (basescradr + #0fb4), a
ld (basescradr + #1213), a
ld (basescradr + #1511), a
ld a, 224
ld (basescradr + #0830), a
ld (basescradr + #08d4), a
ld (basescradr + #09d4), a
ld (basescradr + #0a51), a
ld (basescradr + #0bf5), a
ld (basescradr + #0c72), a
ld (basescradr + #0e93), a
ld (basescradr + #0f93), a
ld (basescradr + #1014), a
ld a, 7
ld hl, basescradr + #092e
ld (hl), a
inc h
ld (hl), a
inc h
ld (hl), a
ld hl, basescradr + #0b8d
ld (hl), a
inc h
ld (hl), a
inc h
ld (hl), a
ld hl, basescradr + #0bec
ld (hl), a
inc h
ld (hl), a
inc h
ld (hl), a
ld a, 240
ld (basescradr + #08b3), a
ld (basescradr + #0930), a
ld (basescradr + #0ad4), a
ld (basescradr + #0c51), a
ld (basescradr + #0cf5), a
ld (basescradr + #0df5), a
ld (basescradr + #0e72), a
ld (basescradr + #1610), a
ld a, 15
ld hl, basescradr + #0c2e
ld (hl), a
inc h
ld (hl), a
inc h
ld (hl), a
ld (basescradr + #08ad), a
ld (basescradr + #0e8d), a
ld (basescradr + #0eec), a
ld (basescradr + #0f8d), a
ld (basescradr + #0fec), a
ld (basescradr + #100c), a
ld a, 31
ld hl, basescradr + #09ad
ld (hl), a
inc h
ld (hl), a
inc h
ld (hl), a
ld hl, basescradr + #110c
ld (hl), a
inc h
ld (hl), a
inc h
ld (hl), a
ld (basescradr + #084e), a
ld (basescradr + #094e), a
ld (basescradr + #0f2e), a
ld a, 63
ld hl, basescradr + #0cad
ld (hl), a
inc h
ld (hl), a
inc h
ld (hl), a
ld hl, basescradr + #140c
ld (hl), a
inc h
ld (hl), a
inc h
ld (hl), a
inc h
ld (hl), a
ld (basescradr + #0b4e), a
ld (basescradr + #0c4e), a
ld a, 127
ld (basescradr + #08cd), a
ld (basescradr + #09cd), a
ld (basescradr + #0e4e), a
ld (basescradr + #0fad), a
ld (basescradr + #102c), a
ld (basescradr + #112c), a
ret
| 19.788382 | 29 | 0.548962 |
8afbf066dc3499a8e6f99764962443ab0bea2dfd | 2,118 | asm | Assembly | Etapa 02/Aula 11 - Ponto-Flutuante com SSE/codes/a11e01.asm | bellorini/unioeste | 8c3d1f1e26dc3680160820c7219954b6076c9d5e | [
"MIT"
] | 6 | 2021-11-03T20:19:10.000Z | 2022-02-23T17:57:58.000Z | Etapa 02/Aula 11 - Ponto-Flutuante com SSE/codes/a11e01.asm | bellorini/unioeste | 8c3d1f1e26dc3680160820c7219954b6076c9d5e | [
"MIT"
] | null | null | null | Etapa 02/Aula 11 - Ponto-Flutuante com SSE/codes/a11e01.asm | bellorini/unioeste | 8c3d1f1e26dc3680160820c7219954b6076c9d5e | [
"MIT"
] | 5 | 2022-02-02T15:48:45.000Z | 2022-02-22T18:17:52.000Z | ; Aula 11 - Ponto-Flutuante
; a11e01.asm
; Conversão de Inteiro para FP
; Conversão de FP para Inteiro
; nasm -f elf64 a11e01.asm ; gcc -m64 -no-pie a11e01.o -o a11e01.x
%define _exit 60
extern printf
extern scanf
section .data
pfstr1 : db "Digite um Inteiro: ", 0
pfstr2 : db "Inteiro %d convertido para float = %f",10, 0
pfstr3 : db "Inteiro %d convertido para double = %f",10, 0
pfstr4 : db "pi? = %f, int(pi) = %d", 10, 0
sfstr1 : db "%d",0
fppi : dq 3.1415 ; double
section .bss
inteiro1 : resd 1
float1 : resd 1
section .text
global main
main:
; stack-frame
push rbp
mov rbp, rsp
; eax = printf("Digite um Inteiro: ");
xor rax, rax
mov rdi, pfstr1 ; string de controle para printf
call printf
; eax = scanf("%d", &inteiro1);
xor rax, rax
mov rdi, sfstr1
mov rsi, inteiro1
call scanf
; Conversão de Inteiro para FP
; xmm0 = (float) inteiro1
CVTSI2SS xmm0, dword [inteiro1] ; int 2 float
l1:
; eax = printf("Inteiro %d convertido para float = %f\n", inteiro1, xmm0);
mov rax, 1 ; existe um FP a ser impresso e já está em xmm0
mov rdi, pfstr2
mov esi, [inteiro1]
; notas sobre printf e FP
; printf destroi xmmi após chamada, opcional: salvar float/double
MOVSS [float1], xmm0 ; salva FP em float1
; considera %f como double, necessário converter SS para SD
CVTSS2SD xmm0, xmm0 ; float 2 double 4 printf
l11:
call printf
l2:
; eax = printf("Inteiro %d convertido para double = %f\n", inteiro1, xmm0);
mov rax, 1 ; existe um FP a ser impresso
mov rdi, pfstr3
mov esi, [inteiro1]
CVTSS2SD xmm0, [float1] ; float 2 double 4 printf
l21:
call printf
l3:
; eax = printf("pi? = %f, int(pi) = $d", fppi, int(fppi));
; eax = printf("pi? = %f, int(pi) = $d", xmm0, esi);
mov rax, 1 ; existe um FP a ser impresso
mov rdi, pfstr4
MOVSD xmm0, [fppi]
CVTSD2SI esi, qword [fppi]
l31:
call printf
fim:
; "destack-frame!"
mov rsp, rbp
pop rbp
mov rax, _exit
mov rdi, 0
syscall
| 23.274725 | 79 | 0.610954 |
9c03f87be1b31a1e09e9872f9c60f29f9aeb6df2 | 1,978 | asm | Assembly | 03_UTIL_timestamp/win64/timestamp64.asm | jacwil/nasm-on-windows | 331b4252d202817b732a5491baca4173ab8a591b | [
"BSD-3-Clause"
] | 13 | 2016-03-23T19:42:42.000Z | 2022-03-30T21:50:16.000Z | 03_UTIL_timestamp/win64/timestamp64.asm | jacwil/nasm-on-windows | 331b4252d202817b732a5491baca4173ab8a591b | [
"BSD-3-Clause"
] | null | null | null | 03_UTIL_timestamp/win64/timestamp64.asm | jacwil/nasm-on-windows | 331b4252d202817b732a5491baca4173ab8a591b | [
"BSD-3-Clause"
] | 1 | 2020-01-18T13:47:34.000Z | 2020-01-18T13:47:34.000Z | [BITS 64]
DEFAULT REL
GLOBAL _main
EXTERN ExitProcess
EXTERN GetStdHandle
EXTERN WriteFile
SECTION .bss
sHexstring: resb 16
lHexstring equ $-sHexstring
sHexstring_end equ sHexstring+lHexstring-1
SECTION .text
_main:
;align stack to 16 bytes for Win64 calls
and rsp, -10h
;give room to Win64 API calls that don't take stack params
sub rsp, 020h
rdtsc
mov rdi, sHexstring_end
mov rsi, rax
call hex32tostr
mov rsi, rdx
call hex32tostr
mov rcx, -0Bh ;STD_OUTPUT_HANDLE
call GetStdHandle
mov rcx, rax
mov rdx, sHexstring
mov r8, lHexstring
xor r9, r9
push r9
sub rsp, 20h ;Give Win64 API calls room
call WriteFile
add rsp, 28h ;Restore Stack Pointer
mov rcx, 0
call ExitProcess
xor rax, rax
ret
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; hex32tostr ;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Description: ;
; Takes a 32bit value and converts it to ;
; an ASCII string. ;
; Usage and Effects: ;
; RAX: DESTROYED upon return. ;
; RCX: DESTROYED upon return. ;
; ESI: 32bit input value. DESTROYED upon return. ;
; RDI: On function call, must be set to point to ;
; the last character in the output buffer. ;
; Function will decrement EDI for each char ;
; written, totalling 8 times. EDI will be ;
; pointing to the character preceding the ;
; start of the output buffer upon return. ;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
hex32tostr:
xor rcx, rcx
.loop:
mov rax, rsi
and rax, qword 0fh
add rax, 030h
cmp rax, 039h
jle .nonalpha
add rax, 7
.nonalpha:
mov byte [rdi], al
add rcx, 4
dec rdi
shr rsi, 4
cmp rcx, 32
jl .loop
ret
| 26.026316 | 62 | 0.530839 |
3fa0ceda3269c9bd2eab82e35565e06ca1349b74 | 703 | asm | Assembly | uti/cccol.asm | olifink/smsqe | c546d882b26566a46d71820d1539bed9ea8af108 | [
"BSD-2-Clause"
] | null | null | null | uti/cccol.asm | olifink/smsqe | c546d882b26566a46d71820d1539bed9ea8af108 | [
"BSD-2-Clause"
] | null | null | null | uti/cccol.asm | olifink/smsqe | c546d882b26566a46d71820d1539bed9ea8af108 | [
"BSD-2-Clause"
] | null | null | null | ; Calculate Colourway colours 1989 Jochen Merz
section utility
white equ 7
green equ 4
red equ 2
black equ 0
xdef ut_cccol
;+++
; Calculate Colourway colours.
;
; Entry Exit
; D2.b colourway (0-3) normal paper.w / ink.w
; D3 highlight paper.w / ink.w
;---
ut_cccol
moveq #1,d3
and.b d2,d3
lsl.b #2,d3
move.l norm_tab(pc,d3.w),d2
move.l high_tab(pc,d3.w),d3
rts
norm_tab
dc.w white,black
dc.w black,white
high_tab
dc.w green,black
dc.w red,white
end
| 20.085714 | 65 | 0.465149 |
b7ae9589442d8a2f223acdc40ba7b7ac40c16d12 | 44 | asm | Assembly | Array.asm | Invisible-Luna/8086emu_program | 1d665b76a54ffc002f86e6a9f94085ba4c38bc97 | [
"MIT"
] | 1 | 2021-11-12T12:49:50.000Z | 2021-11-12T12:49:50.000Z | Array.asm | Invisible-Luna/8086emu_program | 1d665b76a54ffc002f86e6a9f94085ba4c38bc97 | [
"MIT"
] | null | null | null | Array.asm | Invisible-Luna/8086emu_program | 1d665b76a54ffc002f86e6a9f94085ba4c38bc97 | [
"MIT"
] | null | null | null | ; ARRAY
a DB 1H, 5H, 3H, 4H
MOV AL, a[2] | 11 | 20 | 0.522727 |
5292770f168c93a6a9bd8aa6a73682edca1ff61e | 5,887 | asm | Assembly | Transynther/x86/_processed/NONE/_ht_st_zr_un_/i9-9900K_12_0xa0.log_21829_309.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_ht_st_zr_un_/i9-9900K_12_0xa0.log_21829_309.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_ht_st_zr_un_/i9-9900K_12_0xa0.log_21829_309.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r14
push %r15
push %r8
push %rax
push %rbx
push %rcx
push %rdi
push %rsi
lea addresses_D_ht+0x1236d, %rax
nop
nop
dec %r10
movl $0x61626364, (%rax)
nop
nop
nop
nop
nop
inc %rcx
lea addresses_D_ht+0x16ccd, %r8
nop
and %r14, %r14
mov $0x6162636465666768, %rbx
movq %rbx, %xmm6
vmovups %ymm6, (%r8)
nop
nop
nop
nop
nop
cmp $8690, %r15
lea addresses_WC_ht+0xe3f1, %r15
nop
nop
nop
nop
cmp %r10, %r10
movb $0x61, (%r15)
nop
nop
nop
inc %r10
lea addresses_UC_ht+0x988d, %r15
add $27389, %r14
mov $0x6162636465666768, %rbx
movq %rbx, %xmm4
and $0xffffffffffffffc0, %r15
movntdq %xmm4, (%r15)
nop
nop
dec %rcx
lea addresses_WT_ht+0x18d3d, %rax
nop
nop
nop
nop
add $40564, %r15
movb (%rax), %cl
nop
add $15840, %r15
lea addresses_UC_ht+0x1a5ad, %rsi
lea addresses_A_ht+0x110bd, %rdi
nop
nop
nop
nop
mfence
mov $29, %rcx
rep movsw
sub $60522, %r14
lea addresses_normal_ht+0xa78d, %rsi
lea addresses_normal_ht+0x458d, %rdi
nop
nop
nop
nop
nop
add $37371, %rbx
mov $118, %rcx
rep movsq
nop
nop
nop
xor $22160, %r15
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %rax
pop %r8
pop %r15
pop %r14
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r8
push %rax
push %rbp
push %rdi
push %rdx
// Faulty Load
lea addresses_WC+0x1058d, %rdx
xor %rax, %rax
mov (%rdx), %r11d
lea oracles, %rdi
and $0xff, %r11
shlq $12, %r11
mov (%rdi,%r11,1), %r11
pop %rdx
pop %rdi
pop %rbp
pop %rax
pop %r8
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'src': {'NT': False, 'same': False, 'congruent': 0, 'type': 'addresses_WC', 'AVXalign': False, 'size': 4}, 'OP': 'LOAD'}
[Faulty Load]
{'src': {'NT': False, 'same': True, 'congruent': 0, 'type': 'addresses_WC', 'AVXalign': False, 'size': 4}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'OP': 'STOR', 'dst': {'NT': True, 'same': False, 'congruent': 4, 'type': 'addresses_D_ht', 'AVXalign': False, 'size': 4}}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 6, 'type': 'addresses_D_ht', 'AVXalign': False, 'size': 32}}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 1, 'type': 'addresses_WC_ht', 'AVXalign': False, 'size': 1}}
{'OP': 'STOR', 'dst': {'NT': True, 'same': False, 'congruent': 8, 'type': 'addresses_UC_ht', 'AVXalign': False, 'size': 16}}
{'src': {'NT': False, 'same': False, 'congruent': 4, 'type': 'addresses_WT_ht', 'AVXalign': False, 'size': 1}, 'OP': 'LOAD'}
{'src': {'same': True, 'congruent': 4, 'type': 'addresses_UC_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 4, 'type': 'addresses_A_ht'}}
{'src': {'same': False, 'congruent': 9, 'type': 'addresses_normal_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 10, 'type': 'addresses_normal_ht'}}
{'9b': 1, '63': 16, '7e': 1, '8d': 2, 'ec': 1, '96': 1, '4e': 1, '04': 1, 'ff': 124, '55': 1, '44': 19502, '41': 1, 'd1': 1, '59': 1, '00': 2169, '82': 2, '68': 1, 'b8': 1, '79': 1, '50': 1}
00 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 00 44 44 44 00 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 00 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 00 44 44 44 44 44 44 44 00 00 44 00 44 44 44 44 44 00 44 44 44 44 44 44 00 44 44 44 00 44 44 44 44 44 44 44 44 00 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 00 44 44 44 44 44 44 44 44 44 44 00 44 44 44 00 00 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 00 44 44 44 44 00 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 ff 44 ff 44 ff 00 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 00 44 44 00 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 00 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 00 44 44 44 44 44 00 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 00 44 00 44 00 44 00 44 00 44 00 00 44 44 44 44 44 44 44 44 44 44 00 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 00 44 44 00 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 44 00 00 00 00 00 00 00 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 00 00 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 00 44 00 44 00 44 00 44 00 44 00 44 00 44 00 44 00 44 00 44 00 44 00 44 00 44 00 44 00 44 00 44 00 44 00 44 00 44 00 44 00 44 00 44 00 44 00 44 00 44 00 44 00 44 00 44 00 44 00 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 00 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 00 44 44 44 44 44 44 44 44 44
*/
| 41.751773 | 2,999 | 0.653304 |
4d0061acd386c2fa46c47bc4e055b89c506207ad | 4,298 | asm | Assembly | Transynther/x86/_processed/NC/_zr_/i3-7100_9_0x84_notsx.log_70_1817.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NC/_zr_/i3-7100_9_0x84_notsx.log_70_1817.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NC/_zr_/i3-7100_9_0x84_notsx.log_70_1817.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r9
push %rax
push %rbp
push %rbx
push %rcx
push %rdi
push %rsi
lea addresses_UC_ht+0xe8f1, %rsi
lea addresses_A_ht+0xbe80, %rdi
nop
nop
nop
nop
cmp %rbx, %rbx
mov $50, %rcx
rep movsl
nop
nop
cmp $44764, %rbp
lea addresses_WC_ht+0x1772b, %rax
clflush (%rax)
nop
nop
nop
nop
nop
add $13230, %rbx
movb (%rax), %cl
nop
nop
nop
inc %rcx
lea addresses_D_ht+0x8b2b, %rbx
nop
nop
nop
nop
nop
add %r10, %r10
mov (%rbx), %si
nop
add %rdi, %rdi
lea addresses_WT_ht+0x1ee93, %rsi
lea addresses_WT_ht+0x1872b, %rdi
nop
nop
nop
sub %r9, %r9
mov $127, %rcx
rep movsw
nop
xor $51683, %rdi
lea addresses_WT_ht+0x9b2b, %rax
nop
nop
nop
nop
cmp %rbp, %rbp
vmovups (%rax), %ymm0
vextracti128 $0, %ymm0, %xmm0
vpextrq $0, %xmm0, %rbx
nop
nop
nop
nop
cmp %rdi, %rdi
lea addresses_UC_ht+0x4b2b, %rsi
and %rdi, %rdi
mov (%rsi), %ebp
nop
xor %rax, %rax
lea addresses_WC_ht+0xeb2b, %rbx
nop
nop
nop
sub $35357, %rsi
mov $0x6162636465666768, %rdi
movq %rdi, %xmm2
movups %xmm2, (%rbx)
nop
nop
nop
nop
inc %r9
lea addresses_normal_ht+0x188d7, %rsi
lea addresses_WT_ht+0x16cd, %rdi
clflush (%rdi)
nop
nop
nop
nop
nop
sub $64700, %r10
mov $80, %rcx
rep movsl
nop
nop
nop
sub $30780, %rbp
lea addresses_normal_ht+0x1db2b, %rsi
lea addresses_WC_ht+0x27d3, %rdi
cmp %rbx, %rbx
mov $24, %rcx
rep movsl
nop
nop
nop
nop
add $5543, %r10
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %rbp
pop %rax
pop %r9
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r12
push %r13
push %r8
push %rax
push %rbx
push %rcx
push %rdx
// Store
lea addresses_WC+0xa33e, %rbx
nop
nop
sub %r13, %r13
movw $0x5152, (%rbx)
nop
nop
nop
nop
nop
lfence
// Store
lea addresses_PSE+0xe22b, %rax
nop
nop
nop
nop
xor $25301, %rdx
movb $0x51, (%rax)
nop
nop
add $63559, %rcx
// Store
lea addresses_PSE+0x189ab, %rcx
clflush (%rcx)
nop
nop
nop
lfence
mov $0x5152535455565758, %r8
movq %r8, %xmm6
movups %xmm6, (%rcx)
nop
nop
nop
cmp $23488, %r12
// Faulty Load
mov $0x7ea33b0000000b2b, %rdx
nop
add $64563, %rax
mov (%rdx), %r13
lea oracles, %r12
and $0xff, %r13
shlq $12, %r13
mov (%r12,%r13,1), %r13
pop %rdx
pop %rcx
pop %rbx
pop %rax
pop %r8
pop %r13
pop %r12
ret
/*
<gen_faulty_load>
[REF]
{'src': {'type': 'addresses_NC', 'same': False, 'size': 8, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'dst': {'type': 'addresses_WC', 'same': False, 'size': 2, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_PSE', 'same': False, 'size': 1, 'congruent': 3, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_PSE', 'same': False, 'size': 16, 'congruent': 7, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
[Faulty Load]
{'src': {'type': 'addresses_NC', 'same': True, 'size': 8, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'type': 'addresses_UC_ht', 'congruent': 0, 'same': False}, 'dst': {'type': 'addresses_A_ht', 'congruent': 0, 'same': False}, 'OP': 'REPM'}
{'src': {'type': 'addresses_WC_ht', 'same': False, 'size': 1, 'congruent': 9, 'NT': False, 'AVXalign': True}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_D_ht', 'same': True, 'size': 2, 'congruent': 11, 'NT': False, 'AVXalign': True}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_WT_ht', 'congruent': 1, 'same': False}, 'dst': {'type': 'addresses_WT_ht', 'congruent': 10, 'same': False}, 'OP': 'REPM'}
{'src': {'type': 'addresses_WT_ht', 'same': False, 'size': 32, 'congruent': 8, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_UC_ht', 'same': False, 'size': 4, 'congruent': 10, 'NT': True, 'AVXalign': False}, 'OP': 'LOAD'}
{'dst': {'type': 'addresses_WC_ht', 'same': False, 'size': 16, 'congruent': 9, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'src': {'type': 'addresses_normal_ht', 'congruent': 2, 'same': False}, 'dst': {'type': 'addresses_WT_ht', 'congruent': 0, 'same': False}, 'OP': 'REPM'}
{'src': {'type': 'addresses_normal_ht', 'congruent': 10, 'same': False}, 'dst': {'type': 'addresses_WC_ht', 'congruent': 2, 'same': False}, 'OP': 'REPM'}
{'00': 70}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
| 20.178404 | 209 | 0.651931 |
1d0bab952c39f4a710b740ad3c1b84c52cfa1d12 | 391 | asm | Assembly | C vs Assembly/read and print an integer.asm | zakarialaoui10/HIGH-TO-LOW | 6fba545110b1188e1afc72c414fbf4f48f780070 | [
"MIT"
] | 18 | 2021-07-21T11:01:04.000Z | 2022-01-19T03:38:41.000Z | C vs Assembly/read and print an integer.asm | zakarialaoui10/HIGH-TO-LOW | 6fba545110b1188e1afc72c414fbf4f48f780070 | [
"MIT"
] | null | null | null | C vs Assembly/read and print an integer.asm | zakarialaoui10/HIGH-TO-LOW | 6fba545110b1188e1afc72c414fbf4f48f780070 | [
"MIT"
] | 1 | 2021-06-25T19:48:30.000Z | 2021-06-25T19:48:30.000Z | .data
msg1: .asciiz "enter an integer : "
msg2: .asciiz "your integer is : "
.text
print_msg1:li $v0,4
la $a0,msg1
syscall
read_integer:li $v0,5
syscall
la $s0,($v0) #save_integer_in_s0:
print_msg2:li $v0,4
la $a0,msg2
syscall
print_integer:li $v0,1
la $a0,($s0)
syscall
| 20.578947 | 36 | 0.496164 |
49671952b2c07df50c94e89a6d9aa8e222448aec | 2,645 | asm | Assembly | 2018/asisf/light_fence/test/unencrypt.asm | theKidOfArcrania/ctf-writeups | dc03760ca8e8b9a246a4e4f27357ed427b1a51fe | [
"MIT"
] | 5 | 2019-04-06T19:32:21.000Z | 2020-04-18T07:16:37.000Z | 2018/asisf/light_fence/test/unencrypt.asm | theKidOfArcrania/ctf-writeups | dc03760ca8e8b9a246a4e4f27357ed427b1a51fe | [
"MIT"
] | null | null | null | 2018/asisf/light_fence/test/unencrypt.asm | theKidOfArcrania/ctf-writeups | dc03760ca8e8b9a246a4e4f27357ed427b1a51fe | [
"MIT"
] | null | null | null | BITS 64
%define REL_LOC 0x1CB0
%define REL_HUFF 0x18a0
%define REL_NSG 0x14a0
%macro xcall 1
db 0xe8
dd %1 - (REL_LOC + $ - $$ + 4)
%endmacro
unencrypt: ; file
push rbx
push rbp
mov rbp, rsp
sub rsp, 0x1510
mov rbx, rdi
mov rsi, 0
mov eax, 2 ; open
syscall
mov [rbp - 0x1504], eax
mov edi, eax
lea rsi, [rbp - 0x100]
mov edx, 0x4
mov eax, 0 ; read
syscall
mov al, [rbp - 0x100 + 3]
mov [rbp - 0x150d], al
mov edx, 0x100
mov eax, 0 ; read
syscall
; Create huff extension filename
mov rdx, 0x400
mov rsi, rbx
lea rdi, [rbp - 0x500]
call strncpy
mov rdx, 0x400
lea rsi, [rel huff_file]
lea rdi, [rbp - 0x500]
call strcat
; Copy contents of our encoded file into huff file.
mov edx, 436 ; 0664
mov esi, 65 ; O_WRONLY | O_CREAT
lea rdi, [rbp - 0x500]
mov eax, 2 ; open
syscall
mov [rbp - 0x1508], eax
.copy_loop:
mov edx, 0x1000
lea rsi, [rbp - 0x1500]
mov edi, [rbp - 0x1504]
mov eax, 0 ; read
syscall
cmp eax, 0
jle .end_loop
mov edx, eax
lea rsi, [rbp - 0x1500]
mov edi, [rbp - 0x1508]
mov eax, 1 ; write
syscall
jmp .copy_loop
.end_loop:
mov rdx, 0x400
mov rsi, rbx
lea rax, [rbp - 0x900]
mov rdi, rax
call strncpy
mov rdx, 0x400
lea rsi, [rel nsg_file]
lea rdi, [rbp - 0x900]
call strcat
; Remove extension for output file
mov rdx, 0x400
mov rsi, rbx
lea rdi, [rbp - 0xd00]
call strncpy
lea rdi, [rbp - 0xd00]
call strlen
mov byte [(rbp - 0xd00) + rax - 4], 0
; Call huff decryption
xor ecx, ecx
mov cl, [rbp - 0x150d] ; number of bits to skip
lea rdx, [rbp - 0x100] ; bit lengths
lea rsi, [rbp - 0x900] ; nsg file
lea rdi, [rbp - 0x500] ; huff file
xcall REL_HUFF ; 0x555555555ddd
lea rsi, [rbp - 0xd00] ; output_file
lea rdi, [rbp - 0x900] ; nsg file
xcall REL_NSG
lea rdi, [rbp - 0x900] ; nsg file
mov eax, 87 ; unlink
syscall
lea rdi, [rbp - 0x500] ; huff file
mov eax, 87 ; unlink
syscall
leave
pop rbx
ret
strlen: ; (str)
push rbp
mov rbp, rsp
xor ecx, ecx
xor al, al
not ecx
cld
repne scasb
not ecx
lea eax, [ecx - 1]
leave
ret
strcat: ; (dst, str, len)
push rbp
mov rbp, rsp
xor eax, eax
mov ecx, edx
cld
repne scasb
jnz .exit
dec rdi
mov edx, ecx
call strncpy
.exit:
leave
ret
strncpy: ; (dst, src, len)
push rbp
mov rbp, rsp
mov ecx, edx
test ecx, ecx
jz .end
.loop:
mov al, [rsi]
mov [rdi], al
test al, al
jz .end
inc rdi
inc rsi
dec ecx
jnz .loop
.end:
leave
ret
huff_file:
db ".huff", 0
nsg_file:
db ".nsg", 0
times (0x20e - ($ - $$)) db 0
| 14.859551 | 53 | 0.608318 |
91fbc6c3718147648d894a6d8372b1ba5df516b5 | 26,621 | asm | Assembly | maps/ElmsLab.asm | TastySnax12/pokecrystal16-493-plus | 9de36c8803c9bdf4b8564ed547f988b0b66f0c41 | [
"blessing"
] | 2 | 2021-07-31T07:05:06.000Z | 2021-10-16T03:32:26.000Z | maps/ElmsLab.asm | TastySnax12/pokecrystal16-493-plus | 9de36c8803c9bdf4b8564ed547f988b0b66f0c41 | [
"blessing"
] | null | null | null | maps/ElmsLab.asm | TastySnax12/pokecrystal16-493-plus | 9de36c8803c9bdf4b8564ed547f988b0b66f0c41 | [
"blessing"
] | 3 | 2021-01-15T18:45:40.000Z | 2021-10-16T03:35:27.000Z | object_const_def ; object_event constants
const ELMSLAB_ELM
const ELMSLAB_ELMS_AIDE
const ELMSLAB_POKE_BALL1
const ELMSLAB_POKE_BALL2
const ELMSLAB_POKE_BALL3
const ELMSLAB_OFFICER
ElmsLab_MapScripts:
db 6 ; scene scripts
scene_script .MeetElm ; SCENE_DEFAULT
scene_script .DummyScene1 ; SCENE_ELMSLAB_CANT_LEAVE
scene_script .DummyScene2 ; SCENE_ELMSLAB_NOTHING
scene_script .DummyScene3 ; SCENE_ELMSLAB_MEET_OFFICER
scene_script .DummyScene4 ; SCENE_ELMSLAB_UNUSED
scene_script .DummyScene5 ; SCENE_ELMSLAB_AIDE_GIVES_POTION
db 1 ; callbacks
callback MAPCALLBACK_OBJECTS, .MoveElmCallback
.MeetElm:
prioritysjump .WalkUpToElm
end
.DummyScene1:
end
.DummyScene2:
end
.DummyScene3:
end
.DummyScene4:
end
.DummyScene5:
end
.MoveElmCallback:
checkscene
iftrue .Skip ; not SCENE_DEFAULT
moveobject ELMSLAB_ELM, 3, 4
.Skip:
return
.WalkUpToElm:
applymovement PLAYER, ElmsLab_WalkUpToElmMovement
showemote EMOTE_SHOCK, ELMSLAB_ELM, 15
turnobject ELMSLAB_ELM, RIGHT
opentext
writetext ElmText_Intro
.MustSayYes:
yesorno
iftrue .ElmGetsEmail
writetext ElmText_Refused
sjump .MustSayYes
.ElmGetsEmail:
writetext ElmText_Accepted
buttonsound
writetext ElmText_ResearchAmbitions
waitbutton
closetext
playsound SFX_GLASS_TING
pause 30
showemote EMOTE_SHOCK, ELMSLAB_ELM, 10
turnobject ELMSLAB_ELM, DOWN
opentext
writetext ElmText_GotAnEmail
waitbutton
closetext
opentext
turnobject ELMSLAB_ELM, RIGHT
writetext ElmText_MissionFromMrPokemon
waitbutton
closetext
applymovement ELMSLAB_ELM, ElmsLab_ElmToDefaultPositionMovement1
turnobject PLAYER, UP
applymovement ELMSLAB_ELM, ElmsLab_ElmToDefaultPositionMovement2
turnobject PLAYER, RIGHT
opentext
writetext ElmText_ChooseAPokemon
waitbutton
setscene SCENE_ELMSLAB_CANT_LEAVE
closetext
end
ProfElmScript:
faceplayer
opentext
checkevent EVENT_GOT_SS_TICKET_FROM_ELM
iftrue ElmCheckMasterBall
checkevent EVENT_BEAT_ELITE_FOUR
iftrue ElmGiveTicketScript
ElmCheckMasterBall:
checkevent EVENT_GOT_MASTER_BALL_FROM_ELM
iftrue ElmCheckEverstone
checkflag ENGINE_RISINGBADGE
iftrue ElmGiveMasterBallScript
ElmCheckEverstone:
checkevent EVENT_GOT_EVERSTONE_FROM_ELM
iftrue ElmScript_CallYou
checkevent EVENT_SHOWED_TOGEPI_TO_ELM
iftrue ElmGiveEverstoneScript
checkevent EVENT_TOLD_ELM_ABOUT_TOGEPI_OVER_THE_PHONE
iffalse ElmCheckTogepiEgg
loadmonindex 1, TOGEPI
special FindPartyMonThatSpeciesYourTrainerID
iftrue ShowElmTogepiScript
loadmonindex 2, TOGETIC
special FindPartyMonThatSpeciesYourTrainerID
iftrue ShowElmTogepiScript
writetext ElmThoughtEggHatchedText
waitbutton
closetext
end
ElmEggHatchedScript:
loadmonindex 1, TOGEPI
special FindPartyMonThatSpeciesYourTrainerID
iftrue ShowElmTogepiScript
loadmonindex 2, TOGETIC
special FindPartyMonThatSpeciesYourTrainerID
iftrue ShowElmTogepiScript
sjump ElmCheckGotEggAgain
ElmCheckTogepiEgg:
checkevent EVENT_GOT_TOGEPI_EGG_FROM_ELMS_AIDE
iffalse ElmCheckGotEggAgain
checkevent EVENT_TOGEPI_HATCHED
iftrue ElmEggHatchedScript
ElmCheckGotEggAgain:
checkevent EVENT_GOT_TOGEPI_EGG_FROM_ELMS_AIDE ; why are we checking it again?
iftrue ElmWaitingEggHatchScript
checkflag ENGINE_ZEPHYRBADGE
iftrue ElmAideHasEggScript
checkevent EVENT_GAVE_MYSTERY_EGG_TO_ELM
iftrue ElmStudyingEggScript
checkevent EVENT_GOT_MYSTERY_EGG_FROM_MR_POKEMON
iftrue ElmAfterTheftScript
checkevent EVENT_GOT_A_POKEMON_FROM_ELM
iftrue ElmDescribesMrPokemonScript
writetext ElmText_LetYourMonBattleIt
waitbutton
closetext
end
LabTryToLeaveScript:
turnobject ELMSLAB_ELM, DOWN
opentext
writetext LabWhereGoingText
waitbutton
closetext
applymovement PLAYER, ElmsLab_CantLeaveMovement
end
CyndaquilPokeBallScript:
checkevent EVENT_GOT_A_POKEMON_FROM_ELM
iftrue LookAtElmPokeBallScript
turnobject ELMSLAB_ELM, DOWN
refreshscreen
pokepic CYNDAQUIL
cry CYNDAQUIL
waitbutton
closepokepic
opentext
writetext TakeCyndaquilText
yesorno
iffalse DidntChooseStarterScript
disappear ELMSLAB_POKE_BALL1
setevent EVENT_GOT_CYNDAQUIL_FROM_ELM
writetext ChoseStarterText
buttonsound
waitsfx
getmonname STRING_BUFFER_3, CYNDAQUIL
writetext ReceivedStarterText
playsound SFX_CAUGHT_MON
waitsfx
buttonsound
givepoke CYNDAQUIL, 5, BERRY
closetext
readvar VAR_FACING
ifequal RIGHT, ElmDirectionsScript
applymovement PLAYER, AfterCyndaquilMovement
sjump ElmDirectionsScript
TotodilePokeBallScript:
checkevent EVENT_GOT_A_POKEMON_FROM_ELM
iftrue LookAtElmPokeBallScript
turnobject ELMSLAB_ELM, DOWN
refreshscreen
pokepic TOTODILE
cry TOTODILE
waitbutton
closepokepic
opentext
writetext TakeTotodileText
yesorno
iffalse DidntChooseStarterScript
disappear ELMSLAB_POKE_BALL2
setevent EVENT_GOT_TOTODILE_FROM_ELM
writetext ChoseStarterText
buttonsound
waitsfx
getmonname STRING_BUFFER_3, TOTODILE
writetext ReceivedStarterText
playsound SFX_CAUGHT_MON
waitsfx
buttonsound
givepoke TOTODILE, 5, BERRY
closetext
applymovement PLAYER, AfterTotodileMovement
sjump ElmDirectionsScript
ChikoritaPokeBallScript:
checkevent EVENT_GOT_A_POKEMON_FROM_ELM
iftrue LookAtElmPokeBallScript
turnobject ELMSLAB_ELM, DOWN
refreshscreen
pokepic WAILORD
cry WAILORD
waitbutton
closepokepic
opentext
writetext TakeChikoritaText
yesorno
iffalse DidntChooseStarterScript
disappear ELMSLAB_POKE_BALL3
setevent EVENT_GOT_CHIKORITA_FROM_ELM
writetext ChoseStarterText
buttonsound
waitsfx
getmonname STRING_BUFFER_3, WAILORD
writetext ReceivedStarterText
playsound SFX_CAUGHT_MON
waitsfx
buttonsound
givepoke WAILORD, 20, BERRY
callasm .asm
closetext
applymovement PLAYER, AfterChikoritaMovement
sjump ElmDirectionsScript
.asm
ld hl, wPartyMon1DVs
ld a, $aa
ld [hli], a
ld [hl], a
ret
DidntChooseStarterScript:
writetext DidntChooseStarterText
waitbutton
closetext
end
ElmDirectionsScript:
turnobject PLAYER, UP
opentext
writetext ElmDirectionsText1
waitbutton
closetext
addcellnum PHONE_ELM
opentext
writetext GotElmsNumberText
playsound SFX_REGISTER_PHONE_NUMBER
waitsfx
waitbutton
closetext
turnobject ELMSLAB_ELM, LEFT
opentext
writetext ElmDirectionsText2
waitbutton
closetext
turnobject ELMSLAB_ELM, DOWN
opentext
writetext ElmDirectionsText3
waitbutton
closetext
setevent EVENT_GOT_A_POKEMON_FROM_ELM
setevent EVENT_RIVAL_CHERRYGROVE_CITY
setscene SCENE_ELMSLAB_AIDE_GIVES_POTION
setmapscene NEW_BARK_TOWN, SCENE_FINISHED
end
ElmDescribesMrPokemonScript:
writetext ElmDescribesMrPokemonText
waitbutton
closetext
end
LookAtElmPokeBallScript:
opentext
writetext ElmPokeBallText
waitbutton
closetext
end
ElmsLabHealingMachine:
opentext
checkevent EVENT_GOT_A_POKEMON_FROM_ELM
iftrue .CanHeal
writetext ElmsLabHealingMachineText1
waitbutton
closetext
end
.CanHeal:
writetext ElmsLabHealingMachineText2
yesorno
iftrue ElmsLabHealingMachine_HealParty
closetext
end
ElmsLabHealingMachine_HealParty:
special StubbedTrainerRankings_Healings
special HealParty
playmusic MUSIC_NONE
setval HEALMACHINE_ELMS_LAB
special HealMachineAnim
pause 30
special RestartMapMusic
closetext
end
ElmAfterTheftDoneScript:
waitbutton
closetext
end
ElmAfterTheftScript:
writetext ElmAfterTheftText1
checkitem MYSTERY_EGG
iffalse ElmAfterTheftDoneScript
buttonsound
writetext ElmAfterTheftText2
waitbutton
takeitem MYSTERY_EGG
scall ElmJumpBackScript1
writetext ElmAfterTheftText3
waitbutton
scall ElmJumpBackScript2
writetext ElmAfterTheftText4
buttonsound
writetext ElmAfterTheftText5
buttonsound
setevent EVENT_GAVE_MYSTERY_EGG_TO_ELM
setflag ENGINE_MAIN_MENU_MOBILE_CHOICES
setmapscene ROUTE_29, SCENE_ROUTE29_CATCH_TUTORIAL
clearevent EVENT_ROUTE_30_YOUNGSTER_JOEY
setevent EVENT_ROUTE_30_BATTLE
writetext ElmAfterTheftText6
waitbutton
closetext
setscene SCENE_ELMSLAB_AIDE_GIVES_POKE_BALLS
end
ElmStudyingEggScript:
writetext ElmStudyingEggText
waitbutton
closetext
end
ElmAideHasEggScript:
writetext ElmAideHasEggText
waitbutton
closetext
end
ElmWaitingEggHatchScript:
writetext ElmWaitingEggHatchText
waitbutton
closetext
end
ShowElmTogepiScript:
writetext ShowElmTogepiText1
waitbutton
closetext
showemote EMOTE_SHOCK, ELMSLAB_ELM, 15
setevent EVENT_SHOWED_TOGEPI_TO_ELM
opentext
writetext ShowElmTogepiText2
buttonsound
writetext ShowElmTogepiText3
buttonsound
ElmGiveEverstoneScript:
writetext ElmGiveEverstoneText1
buttonsound
verbosegiveitem EVERSTONE
iffalse ElmScript_NoRoomForEverstone
writetext ElmGiveEverstoneText2
waitbutton
closetext
setevent EVENT_GOT_EVERSTONE_FROM_ELM
end
ElmScript_CallYou:
writetext ElmText_CallYou
waitbutton
ElmScript_NoRoomForEverstone:
closetext
end
ElmGiveMasterBallScript:
writetext ElmGiveMasterBallText1
buttonsound
verbosegiveitem MASTER_BALL
iffalse .notdone
setevent EVENT_GOT_MASTER_BALL_FROM_ELM
writetext ElmGiveMasterBallText2
waitbutton
.notdone
closetext
end
ElmGiveTicketScript:
writetext ElmGiveTicketText1
buttonsound
verbosegiveitem S_S_TICKET
setevent EVENT_GOT_SS_TICKET_FROM_ELM
writetext ElmGiveTicketText2
waitbutton
closetext
end
ElmJumpBackScript1:
closetext
readvar VAR_FACING
ifequal DOWN, ElmJumpDownScript
ifequal UP, ElmJumpUpScript
ifequal LEFT, ElmJumpLeftScript
ifequal RIGHT, ElmJumpRightScript
end
ElmJumpBackScript2:
closetext
readvar VAR_FACING
ifequal DOWN, ElmJumpUpScript
ifequal UP, ElmJumpDownScript
ifequal LEFT, ElmJumpRightScript
ifequal RIGHT, ElmJumpLeftScript
end
ElmJumpUpScript:
applymovement ELMSLAB_ELM, ElmJumpUpMovement
opentext
end
ElmJumpDownScript:
applymovement ELMSLAB_ELM, ElmJumpDownMovement
opentext
end
ElmJumpLeftScript:
applymovement ELMSLAB_ELM, ElmJumpLeftMovement
opentext
end
ElmJumpRightScript:
applymovement ELMSLAB_ELM, ElmJumpRightMovement
opentext
end
AideScript_WalkPotion1:
applymovement ELMSLAB_ELMS_AIDE, AideWalksRight1
turnobject PLAYER, DOWN
scall AideScript_GivePotion
applymovement ELMSLAB_ELMS_AIDE, AideWalksLeft1
end
AideScript_WalkPotion2:
applymovement ELMSLAB_ELMS_AIDE, AideWalksRight2
turnobject PLAYER, DOWN
scall AideScript_GivePotion
applymovement ELMSLAB_ELMS_AIDE, AideWalksLeft2
end
AideScript_GivePotion:
opentext
writetext AideText_GiveYouPotion
buttonsound
verbosegiveitem POTION
writetext AideText_AlwaysBusy
waitbutton
closetext
setscene SCENE_ELMSLAB_NOTHING
end
AideScript_WalkBalls1:
applymovement ELMSLAB_ELMS_AIDE, AideWalksRight1
turnobject PLAYER, DOWN
scall AideScript_GiveYouBalls
applymovement ELMSLAB_ELMS_AIDE, AideWalksLeft1
end
AideScript_WalkBalls2:
applymovement ELMSLAB_ELMS_AIDE, AideWalksRight2
turnobject PLAYER, DOWN
scall AideScript_GiveYouBalls
applymovement ELMSLAB_ELMS_AIDE, AideWalksLeft2
end
AideScript_GiveYouBalls:
opentext
writetext AideText_GiveYouBalls
buttonsound
getitemname STRING_BUFFER_4, POKE_BALL
scall AideScript_ReceiveTheBalls
giveitem POKE_BALL, 5
writetext AideText_ExplainBalls
buttonsound
itemnotify
closetext
setscene SCENE_ELMSLAB_NOTHING
end
AideScript_ReceiveTheBalls:
jumpstd receiveitem
end
ElmsAideScript:
faceplayer
opentext
checkevent EVENT_GOT_TOGEPI_EGG_FROM_ELMS_AIDE
iftrue AideScript_AfterTheft
checkevent EVENT_GAVE_MYSTERY_EGG_TO_ELM
iftrue AideScript_ExplainBalls
checkevent EVENT_GOT_MYSTERY_EGG_FROM_MR_POKEMON
iftrue AideScript_TheftTestimony
writetext AideText_AlwaysBusy
waitbutton
closetext
end
AideScript_TheftTestimony:
writetext AideText_TheftTestimony
waitbutton
closetext
end
AideScript_ExplainBalls:
writetext AideText_ExplainBalls
waitbutton
closetext
end
AideScript_AfterTheft:
writetext AideText_AfterTheft
waitbutton
closetext
end
MeetCopScript2:
applymovement PLAYER, MeetCopScript2_StepLeft
MeetCopScript:
applymovement PLAYER, MeetCopScript_WalkUp
CopScript:
turnobject ELMSLAB_OFFICER, LEFT
opentext
writetext ElmsLabOfficerText1
buttonsound
special NameRival
writetext ElmsLabOfficerText2
waitbutton
closetext
applymovement ELMSLAB_OFFICER, OfficerLeavesMovement
disappear ELMSLAB_OFFICER
setscene SCENE_ELMSLAB_NOTHING
end
ElmsLabWindow:
opentext
checkflag ENGINE_FLYPOINT_VIOLET
iftrue .Normal
checkevent EVENT_ELM_CALLED_ABOUT_STOLEN_POKEMON
iftrue .BreakIn
sjump .Normal
.BreakIn:
writetext ElmsLabWindowText2
waitbutton
closetext
end
.Normal:
writetext ElmsLabWindowText1
waitbutton
closetext
end
ElmsLabTravelTip1:
jumptext ElmsLabTravelTip1Text
ElmsLabTravelTip2:
jumptext ElmsLabTravelTip2Text
ElmsLabTravelTip3:
jumptext ElmsLabTravelTip3Text
ElmsLabTravelTip4:
jumptext ElmsLabTravelTip4Text
ElmsLabTrashcan:
jumptext ElmsLabTrashcanText
ElmsLabPC:
jumptext ElmsLabPCText
ElmsLabTrashcan2:
; unused
jumpstd trashcan
ElmsLabBookshelf:
jumpstd difficultbookshelf
ElmsLab_WalkUpToElmMovement:
step UP
step UP
step UP
step UP
step UP
step UP
step UP
turn_head LEFT
step_end
ElmsLab_CantLeaveMovement:
step UP
step_end
MeetCopScript2_StepLeft:
step LEFT
step_end
MeetCopScript_WalkUp:
step UP
step UP
turn_head RIGHT
step_end
OfficerLeavesMovement:
step DOWN
step DOWN
step DOWN
step DOWN
step DOWN
step_end
AideWalksRight1:
step RIGHT
step RIGHT
turn_head UP
step_end
AideWalksRight2:
step RIGHT
step RIGHT
step RIGHT
turn_head UP
step_end
AideWalksLeft1:
step LEFT
step LEFT
turn_head DOWN
step_end
AideWalksLeft2:
step LEFT
step LEFT
step LEFT
turn_head DOWN
step_end
ElmJumpUpMovement:
fix_facing
big_step UP
remove_fixed_facing
step_end
ElmJumpDownMovement:
fix_facing
big_step DOWN
remove_fixed_facing
step_end
ElmJumpLeftMovement:
fix_facing
big_step LEFT
remove_fixed_facing
step_end
ElmJumpRightMovement:
fix_facing
big_step RIGHT
remove_fixed_facing
step_end
ElmsLab_ElmToDefaultPositionMovement1:
step UP
step_end
ElmsLab_ElmToDefaultPositionMovement2:
step RIGHT
step RIGHT
step UP
turn_head DOWN
step_end
AfterCyndaquilMovement:
step LEFT
step UP
turn_head UP
step_end
AfterTotodileMovement:
step LEFT
step LEFT
step UP
turn_head UP
step_end
AfterChikoritaMovement:
step LEFT
step LEFT
step LEFT
step UP
turn_head UP
step_end
ElmText_Intro:
text "ELM: <PLAY_G>!"
line "There you are!"
para "I needed to ask"
line "you a favor."
para "I'm conducting new"
line "#MON research"
para "right now. I was"
line "wondering if you"
para "could help me with"
line "it, <PLAY_G>."
para "You see…"
para "I'm writing a"
line "paper that I want"
para "to present at a"
line "conference."
para "But there are some"
line "things I don't"
para "quite understand"
line "yet."
para "So!"
para "I'd like you to"
line "raise a #MON"
para "that I recently"
line "caught."
done
ElmText_Accepted:
text "Thanks, <PLAY_G>!"
para "You're a great"
line "help!"
done
ElmText_Refused:
text "But… Please, I"
line "need your help!"
done
ElmText_ResearchAmbitions:
text "When I announce my"
line "findings, I'm sure"
para "we'll delve a bit"
line "deeper into the"
para "many mysteries of"
line "#MON."
para "You can count on"
line "it!"
done
ElmText_GotAnEmail:
text "Oh, hey! I got an"
line "e-mail!"
para "<……><……><……>"
line "Hm… Uh-huh…"
para "Okay…"
done
ElmText_MissionFromMrPokemon:
text "Hey, listen."
para "I have an acquain-"
line "tance called MR."
cont "#MON."
para "He keeps finding"
line "weird things and"
para "raving about his"
line "discoveries."
para "Anyway, I just got"
line "an e-mail from him"
para "saying that this"
line "time it's real."
para "It is intriguing,"
line "but we're busy"
para "with our #MON"
line "research…"
para "Wait!"
para "I know!"
para "<PLAY_G>, can you"
line "go in our place?"
done
ElmText_ChooseAPokemon:
text "I want you to"
line "raise one of the"
para "#MON contained"
line "in these BALLS."
para "You'll be that"
line "#MON's first"
cont "partner, <PLAY_G>!"
para "Go on. Pick one!"
done
ElmText_LetYourMonBattleIt:
text "If a wild #MON"
line "appears, let your"
cont "#MON battle it!"
done
LabWhereGoingText:
text "ELM: Wait! Where"
line "are you going?"
done
TakeCyndaquilText:
text "ELM: You'll take"
line "CYNDAQUIL, the"
cont "fire #MON?"
done
TakeTotodileText:
text "ELM: Do you want"
line "TOTODILE, the"
cont "water #MON?"
done
TakeChikoritaText:
text "ELM: So, you like"
line "CHIKORITA, the"
cont "grass #MON?"
done
DidntChooseStarterText:
text "ELM: Think it over"
line "carefully."
para "Your partner is"
line "important."
done
ChoseStarterText:
text "ELM: I think"
line "that's a great"
cont "#MON too!"
done
ReceivedStarterText:
text "<PLAYER> received"
line "@"
text_ram wStringBuffer3
text "!"
done
ElmDirectionsText1:
text "MR.#MON lives a"
line "little bit beyond"
para "CHERRYGROVE, the"
line "next city over."
para "It's almost a"
line "direct route"
para "there, so you"
line "can't miss it."
para "But just in case,"
line "here's my phone"
para "number. Call me if"
line "anything comes up!"
done
ElmDirectionsText2:
text "If your #MON is"
line "hurt, you should"
para "heal it with this"
line "machine."
para "Feel free to use"
line "it anytime."
done
ElmDirectionsText3:
text "<PLAY_G>, I'm"
line "counting on you!"
done
GotElmsNumberText:
text "<PLAYER> got ELM's"
line "phone number."
done
ElmDescribesMrPokemonText:
text "MR.#MON goes"
line "everywhere and"
cont "finds rarities."
para "Too bad they're"
line "just rare and"
cont "not very useful…"
done
ElmPokeBallText:
text "It contains a"
line "#MON caught by"
cont "PROF.ELM."
done
ElmsLabHealingMachineText1:
text "I wonder what this"
line "does?"
done
ElmsLabHealingMachineText2:
text "Would you like to"
line "heal your #MON?"
done
ElmAfterTheftText1:
text "ELM: <PLAY_G>, this"
line "is terrible…"
para "Oh, yes, what was"
line "MR.#MON's big"
cont "discovery?"
done
ElmAfterTheftText2:
text "<PLAYER> handed"
line "the MYSTERY EGG to"
cont "PROF.ELM."
done
ElmAfterTheftText3:
text "ELM: This?"
done
ElmAfterTheftText4:
text "But… Is it a"
line "#MON EGG?"
para "If it is, it is a"
line "great discovery!"
done
ElmAfterTheftText5:
text "ELM: What?!?"
para "PROF.OAK gave you"
line "a #DEX?"
para "<PLAY_G>, is that"
line "true? Th-that's"
cont "incredible!"
para "He is superb at"
line "seeing the poten-"
cont "tial of people as"
cont "trainers."
para "Wow, <PLAY_G>. You"
line "may have what it"
para "takes to become"
line "the CHAMPION."
para "You seem to be"
line "getting on great"
cont "with #MON too."
para "You should take"
line "the #MON GYM"
cont "challenge."
para "The closest GYM"
line "would be the one"
cont "in VIOLET CITY."
done
ElmAfterTheftText6:
text "…<PLAY_G>. The"
line "road to the"
para "championship will"
line "be a long one."
para "Before you leave,"
line "make sure that you"
cont "talk to your mom."
done
ElmStudyingEggText:
text "ELM: Don't give"
line "up! I'll call if"
para "I learn anything"
line "about that EGG!"
done
ElmAideHasEggText:
text "ELM: <PLAY_G>?"
line "Didn't you meet my"
cont "assistant?"
para "He should have met"
line "you with the EGG"
para "at VIOLET CITY's"
line "#MON CENTER."
para "You must have just"
line "missed him. Try to"
cont "catch him there."
done
ElmWaitingEggHatchText:
text "ELM: Hey, has that"
line "EGG changed any?"
done
ElmThoughtEggHatchedText:
text "<PLAY_G>? I thought"
line "the EGG hatched."
para "Where is the"
line "#MON?"
done
ShowElmTogepiText1:
text "ELM: <PLAY_G>, you"
line "look great!"
done
ShowElmTogepiText2:
text "What?"
line "That #MON!?!"
done
ShowElmTogepiText3:
text "The EGG hatched!"
line "So, #MON are"
cont "born from EGGS…"
para "No, perhaps not"
line "all #MON are."
para "Wow, there's still"
line "a lot of research"
cont "to be done."
done
ElmGiveEverstoneText1:
text "Thanks, <PLAY_G>!"
line "You're helping"
para "unravel #MON"
line "mysteries for us!"
para "I want you to have"
line "this as a token of"
cont "our appreciation."
done
ElmGiveEverstoneText2:
text "That's an"
line "EVERSTONE."
para "Some species of"
line "#MON evolve"
para "when they grow to"
line "certain levels."
para "A #MON holding"
line "the EVERSTONE"
cont "won't evolve."
para "Give it to a #-"
line "MON you don't want"
cont "to evolve."
done
ElmText_CallYou:
text "ELM: <PLAY_G>, I'll"
line "call you if any-"
cont "thing comes up."
done
AideText_AfterTheft:
text "…sigh… That"
line "stolen #MON."
para "I wonder how it's"
line "doing."
para "They say a #MON"
line "raised by a bad"
para "person turns bad"
line "itself."
done
ElmGiveMasterBallText1:
text "ELM: Hi, <PLAY_G>!"
line "Thanks to you, my"
para "research is going"
line "great!"
para "Take this as a"
line "token of my"
cont "appreciation."
done
ElmGiveMasterBallText2:
text "The MASTER BALL is"
line "the best!"
para "It's the ultimate"
line "BALL! It'll catch"
para "any #MON with-"
line "out fail."
para "It's given only to"
line "recognized #MON"
cont "researchers."
para "I think you can"
line "make much better"
para "use of it than I"
line "can, <PLAY_G>!"
done
ElmGiveTicketText1:
text "ELM: <PLAY_G>!"
line "There you are!"
para "I called because I"
line "have something for"
cont "you."
para "See? It's an"
line "S.S.TICKET."
para "Now you can catch"
line "#MON in KANTO."
done
ElmGiveTicketText2:
text "The ship departs"
line "from OLIVINE CITY."
para "But you knew that"
line "already, <PLAY_G>."
para "After all, you've"
line "traveled all over"
cont "with your #MON."
para "Give my regards to"
line "PROF.OAK in KANTO!"
done
ElmsLabSignpostText_Egg:
text "It's the #MON"
line "EGG being studied"
cont "by PROF.ELM."
done
AideText_GiveYouPotion:
text "<PLAY_G>, I want"
line "you to have this"
cont "for your errand."
done
AideText_AlwaysBusy:
text "There are only two"
line "of us, so we're"
cont "always busy."
done
AideText_TheftTestimony:
text "There was a loud"
line "noise outside…"
para "When we went to"
line "look, someone"
cont "stole a #MON."
para "It's unbelievable"
line "that anyone would"
cont "do that!"
para "…sigh… That"
line "stolen #MON."
para "I wonder how it's"
line "doing."
para "They say a #MON"
line "raised by a bad"
para "person turns bad"
line "itself."
done
AideText_GiveYouBalls:
text "<PLAY_G>!"
para "Use these on your"
line "#DEX quest!"
done
AideText_ExplainBalls:
text "To add to your"
line "#DEX, you have"
cont "to catch #MON."
para "Throw # BALLS"
line "at wild #MON"
cont "to get them."
done
ElmsLabOfficerText1:
text "I heard a #MON"
line "was stolen here…"
para "I was just getting"
line "some information"
cont "from PROF.ELM."
para "Apparently, it was"
line "a young male with"
cont "long, red hair…"
para "What?"
para "You battled a"
line "trainer like that?"
para "Did you happen to"
line "get his name?"
done
ElmsLabOfficerText2:
text "OK! So <RIVAL>"
line "was his name."
para "Thanks for helping"
line "my investigation!"
done
ElmsLabWindowText1:
text "The window's open."
para "A pleasant breeze"
line "is blowing in."
done
ElmsLabWindowText2:
text "He broke in"
line "through here!"
done
ElmsLabTravelTip1Text:
text "<PLAYER> opened a"
line "book."
para "Travel Tip 1:"
para "Press START to"
line "open the MENU."
done
ElmsLabTravelTip2Text:
text "<PLAYER> opened a"
line "book."
para "Travel Tip 2:"
para "Record your trip"
line "with SAVE!"
done
ElmsLabTravelTip3Text:
text "<PLAYER> opened a"
line "book."
para "Travel Tip 3:"
para "Open your PACK and"
line "press SELECT to"
cont "move items."
done
ElmsLabTravelTip4Text:
text "<PLAYER> opened a"
line "book."
para "Travel Tip 4:"
para "Check your #MON"
line "moves. Press the"
para "A Button to switch"
line "moves."
done
ElmsLabTrashcanText:
text "The wrapper from"
line "the snack PROF.ELM"
cont "ate is in there…"
done
ElmsLabPCText:
text "OBSERVATIONS ON"
line "#MON EVOLUTION"
para "…It says on the"
line "screen…"
done
ElmsLab_MapEvents:
db 0, 0 ; filler
db 2 ; warp events
warp_event 4, 11, NEW_BARK_TOWN, 1
warp_event 5, 11, NEW_BARK_TOWN, 1
db 8 ; coord events
coord_event 4, 6, SCENE_ELMSLAB_CANT_LEAVE, LabTryToLeaveScript
coord_event 5, 6, SCENE_ELMSLAB_CANT_LEAVE, LabTryToLeaveScript
coord_event 4, 5, SCENE_ELMSLAB_MEET_OFFICER, MeetCopScript
coord_event 5, 5, SCENE_ELMSLAB_MEET_OFFICER, MeetCopScript2
coord_event 4, 8, SCENE_ELMSLAB_AIDE_GIVES_POTION, AideScript_WalkPotion1
coord_event 5, 8, SCENE_ELMSLAB_AIDE_GIVES_POTION, AideScript_WalkPotion2
coord_event 4, 8, SCENE_ELMSLAB_AIDE_GIVES_POKE_BALLS, AideScript_WalkBalls1
coord_event 5, 8, SCENE_ELMSLAB_AIDE_GIVES_POKE_BALLS, AideScript_WalkBalls2
db 16 ; bg events
bg_event 2, 1, BGEVENT_READ, ElmsLabHealingMachine
bg_event 6, 1, BGEVENT_READ, ElmsLabBookshelf
bg_event 7, 1, BGEVENT_READ, ElmsLabBookshelf
bg_event 8, 1, BGEVENT_READ, ElmsLabBookshelf
bg_event 9, 1, BGEVENT_READ, ElmsLabBookshelf
bg_event 0, 7, BGEVENT_READ, ElmsLabTravelTip1
bg_event 1, 7, BGEVENT_READ, ElmsLabTravelTip2
bg_event 2, 7, BGEVENT_READ, ElmsLabTravelTip3
bg_event 3, 7, BGEVENT_READ, ElmsLabTravelTip4
bg_event 6, 7, BGEVENT_READ, ElmsLabBookshelf
bg_event 7, 7, BGEVENT_READ, ElmsLabBookshelf
bg_event 8, 7, BGEVENT_READ, ElmsLabBookshelf
bg_event 9, 7, BGEVENT_READ, ElmsLabBookshelf
bg_event 9, 3, BGEVENT_READ, ElmsLabTrashcan
bg_event 5, 0, BGEVENT_READ, ElmsLabWindow
bg_event 3, 5, BGEVENT_DOWN, ElmsLabPC
db 6 ; object events
object_event 5, 2, SPRITE_ELM, SPRITEMOVEDATA_STANDING_DOWN, 0, 0, -1, -1, 0, OBJECTTYPE_SCRIPT, 0, ProfElmScript, -1
object_event 2, 9, SPRITE_SCIENTIST, SPRITEMOVEDATA_SPINRANDOM_SLOW, 0, 0, -1, -1, PAL_NPC_BLUE, OBJECTTYPE_SCRIPT, 0, ElmsAideScript, EVENT_ELMS_AIDE_IN_LAB
object_event 6, 3, SPRITE_POKE_BALL, SPRITEMOVEDATA_STILL, 0, 0, -1, -1, 0, OBJECTTYPE_SCRIPT, 0, CyndaquilPokeBallScript, EVENT_CYNDAQUIL_POKEBALL_IN_ELMS_LAB
object_event 7, 3, SPRITE_POKE_BALL, SPRITEMOVEDATA_STILL, 0, 0, -1, -1, 0, OBJECTTYPE_SCRIPT, 0, TotodilePokeBallScript, EVENT_TOTODILE_POKEBALL_IN_ELMS_LAB
object_event 8, 3, SPRITE_POKE_BALL, SPRITEMOVEDATA_STILL, 0, 0, -1, -1, 0, OBJECTTYPE_SCRIPT, 0, ChikoritaPokeBallScript, EVENT_CHIKORITA_POKEBALL_IN_ELMS_LAB
object_event 5, 3, SPRITE_OFFICER, SPRITEMOVEDATA_STANDING_UP, 0, 0, -1, -1, PAL_NPC_BLUE, OBJECTTYPE_SCRIPT, 0, CopScript, EVENT_COP_IN_ELMS_LAB
| 18.73399 | 162 | 0.785019 |
89bdcbf3b7bb2491e8e654cf5cea1f9fa6dfe281 | 1,115 | asm | Assembly | Projects/PJZ2/Vector/SectionData_ChipData.asm | jonathanbennett73/amiga-pjz-planet-disco-balls | 1890f797ec7e8061ce4bfb9a8e6844f2ce9f6e1b | [
"MIT"
] | 21 | 2021-04-04T06:00:44.000Z | 2022-01-19T19:12:24.000Z | Projects/PJZ2/Vector/SectionData_ChipData.asm | jonathanbennett73/amiga-pjz-planet-disco-balls | 1890f797ec7e8061ce4bfb9a8e6844f2ce9f6e1b | [
"MIT"
] | null | null | null | Projects/PJZ2/Vector/SectionData_ChipData.asm | jonathanbennett73/amiga-pjz-planet-disco-balls | 1890f797ec7e8061ce4bfb9a8e6844f2ce9f6e1b | [
"MIT"
] | null | null | null | *****************************************************************************
*****************************************************************************
*****************************************************************************
; section FW_ChipData_Copper,data_c ;Chip Data Section for gfx/music
*****************************************************************************
*****************************************************************************
*****************************************************************************
; section FW_ChipBss,bss_c
*****************************************************************************
*****************************************************************************
;CUR_CHIP_BUF set FW_Chip_Buffer_1
;BPL_Phys equ CUR_CHIP_BUF ;3bpl 320x256 = 30720
;CUR_CHIP_BUF set CUR_CHIP_BUF+BPL_BUF_TOTALSIZE
;BPL_Log1 equ CUR_CHIP_BUF ;3bpl = 30720
;CUR_CHIP_BUF set CUR_CHIP_BUF+BPL_BUF_TOTALSIZE
;BPL_Scratch equ CUR_CHIP_BUF ;1bpl
;CUR_CHIP_BUF set CUR_CHIP_BUF+BPL_SCRATCH_TOTALSIZE
;P0_CL_Log1 equ CUR_CHIP_BUF
;CUR_CHIP_BUF set CUR_CHIP_BUF+P0_CL_SIZE
| 34.84375 | 77 | 0.366816 |
b964ebd679929af21cb6ff6933e5bd7ba87466fe | 1,181 | asm | Assembly | insertionSortRICORSIVO.asm | edoardottt/Asm_mars_examples | 4c763ef94a7345a03313b1626aed9642e07e0dad | [
"Unlicense"
] | 21 | 2019-06-29T19:56:20.000Z | 2021-09-08T08:06:52.000Z | insertionSortRICORSIVO.asm | edoardottt/Asm_mars_examples | 4c763ef94a7345a03313b1626aed9642e07e0dad | [
"Unlicense"
] | null | null | null | insertionSortRICORSIVO.asm | edoardottt/Asm_mars_examples | 4c763ef94a7345a03313b1626aed9642e07e0dad | [
"Unlicense"
] | 7 | 2019-10-11T19:30:48.000Z | 2022-02-11T08:08:53.000Z | # INSERTION SORT RICORSIVO
.data
richiesta: .asciiz "inserire la lunghezza del vettore,poi i valori numerici\n"
vettore: .word 0:100
len: .word 0
.text
li $v0,4
la $a0,richiesta
syscall
li $v0,5
syscall
sw $v0,len
lw $s1,len
li $a0,0
riempi:
beq $s0,$s1,main
li $v0,5
syscall
sw $v0,vettore($a0)
addi $a0,$a0,4
addi $s0,$s0,1
j riempi
main:
addi $s1,$s1,1
li $k0,0
jal insertionSort
subi $s1,$s1,1
stampa:
bge $a3,$s1,fine
lw $a2,vettore($a1)
li $v0,1
move $a0,$a2
syscall
addi $a1,$a1,4
addi $a3,$a3,1
j stampa
fine:
li $v0,10
syscall
insertionSort:
subi $sp,$sp,8
sw $ra,0($sp)
sw $s1,4($sp)
ble $s1,2,casobase
subi $s1,$s1,1
jal insertionSort
subi $s2,$s1,1
sll $k1,$s2,2
lw $s3,vettore($k1)
move $s4,$s3
subi $t0,$s2,1
jal while
lw $ra,0($sp)
lw $s1,4($sp)
addi $sp,$sp,8
jr $ra
while:
slt $s5,$t0,$k0
sll $t9,$t0,2
lw $s6,vettore($t9)
sle $s7,$s6,$s4
or $s7,$s5,$s7
beq $s7,1,endWhile
addi $t7,$t0,1
sll $t7,$t7,2
sw $s6,vettore($t7)
subi $t0,$t0,1
addi $t5,$t0,1
sll $t5,$t5,2
sw $s4,vettore($t5)
j while
endWhile:
jr $ra
casobase:
lw $ra,0($sp)
lw $s1,4($sp)
addi $sp,$sp,8
jr $ra
| 14.228916 | 78 | 0.608806 |
670f9355d9ea17917c259d1e18b44417e174a6c3 | 4,455 | asm | Assembly | engine/oak_speech.asm | etdv-thevoid/pokemon-rgb-enhanced | 5b244c1cf46aab98b9c820d1b7888814eb7fa53f | [
"MIT"
] | 1 | 2022-01-09T05:28:52.000Z | 2022-01-09T05:28:52.000Z | engine/oak_speech.asm | ETDV-TheVoid/pokemon-rgb-enhanced | 5b244c1cf46aab98b9c820d1b7888814eb7fa53f | [
"MIT"
] | null | null | null | engine/oak_speech.asm | ETDV-TheVoid/pokemon-rgb-enhanced | 5b244c1cf46aab98b9c820d1b7888814eb7fa53f | [
"MIT"
] | null | null | null | SetDefaultNames:
ld a, [wLetterPrintingDelayFlags]
push af
ld a, [wOptions]
push af
ld a, [wd732]
push af
ld hl, wPlayerName
ld bc, wBoxDataEnd - wPlayerName
xor a
call FillMemory
ld hl, wSpriteStateData1
ld bc, $200
xor a
call FillMemory
pop af
ld [wd732], a
pop af
ld [wOptions], a
pop af
ld [wLetterPrintingDelayFlags], a
ld a, [wOptionsInitialized]
and a
call z, InitOptions
ld hl, NintenText
ld de, wPlayerName
ld bc, NAME_LENGTH
call CopyData
ld hl, SonyText
ld de, wRivalName
ld bc, NAME_LENGTH
jp CopyData
OakSpeech:
ld a,$FF
call PlaySound ; stop music
ld a, BANK(Music_Routes2)
ld c,a
ld a, MUSIC_ROUTES2
call PlayMusic
call ClearScreen
call LoadTextBoxTilePatterns
call SetDefaultNames
predef InitPlayerData2
ld hl,wNumBoxItems
ld a,POTION
ld [wcf91],a
ld a,1
ld [wItemQuantity],a
call AddItemToInventory ; give one potion
ld a,[wDefaultMap]
ld [wDestinationMap],a
call SpecialWarpIn
xor a
ld [hTilesetType],a
ld a, PAL_OAK
call GotPalID ; HAX
nop
nop
nop
;ld a,[wd732]
;bit 1,a ; possibly a debug mode bit
;jp nz,.skipChoosingNames
ld de,ProfOakPic
lb bc, Bank(ProfOakPic), $00
call IntroDisplayPicCenteredOrUpperRight
call FadeInIntroPic
ld hl,OakSpeechText1
call PrintText
call GBFadeOutToWhite
;call ClearScreen
call GetPikachuPalID ; HAX
ld a,PIKACHU
ld [wd0b5],a
ld [wcf91],a
call GetMonHeader
coord hl, 6, 4
call LoadFlippedFrontSpriteByMonIndex
call MovePicLeft
ld hl,OakSpeechText2A
call PrintText
ld hl,OakSpeechText2B
call PrintText
call GBFadeOutToWhite
call GetRedPalID ; HAX
ld de,RedPicFront
lb bc, Bank(RedPicFront), $00
call IntroDisplayPicCenteredOrUpperRight
call MovePicLeft
ld hl,IntroducePlayerText
call PrintText
call ChoosePlayerName
call GBFadeOutToWhite
call GetRivalPalID ; HAX
ld de,Rival1Pic
lb bc, Bank(Rival1Pic), $00
call IntroDisplayPicCenteredOrUpperRight
call FadeInIntroPic
ld hl,IntroduceRivalText
call PrintText
call ChooseRivalName
.skipChoosingNames
call GBFadeOutToWhite
call GetRedPalID ; HAX
ld de,RedPicFront
lb bc, Bank(RedPicFront), $00
call IntroDisplayPicCenteredOrUpperRight
call GBFadeInFromWhite
ld a,[wd72d]
and a
jr nz,.next
ld hl,OakSpeechText3
call PrintText
.next
ld a,[H_LOADEDROMBANK]
push af
ld a,SFX_SHRINK
call PlaySound
pop af
ld [H_LOADEDROMBANK],a
ld [MBC1RomBank],a
ld c,4
call DelayFrames
ld de,RedSprite
ld hl,vSprites
lb bc, BANK(RedSprite), $0C
call CopyVideoData
ld de,ShrinkPic1
lb bc, BANK(ShrinkPic1), $00
call IntroDisplayPicCenteredOrUpperRight
ld c,4
call DelayFrames
ld de,ShrinkPic2
lb bc, BANK(ShrinkPic2), $00
call IntroDisplayPicCenteredOrUpperRight
call ResetPlayerSpriteData
ld a,[H_LOADEDROMBANK]
push af
ld a, BANK(Music_PalletTown)
ld [wAudioROMBank],a
ld [wAudioSavedROMBank],a
ld a, 10
ld [wAudioFadeOutControl],a
ld a,$FF
ld [wNewSoundID],a
call PlaySound ; stop music
pop af
ld [H_LOADEDROMBANK],a
ld [MBC1RomBank],a
ld c,20
call DelayFrames
coord hl, 6, 5
ld b,7
ld c,7
call ClearScreenArea
call LoadTextBoxTilePatterns
ld a,1
ld [wUpdateSpritesEnabled],a
ld c,50
call DelayFrames
call GBFadeOutToWhite
jp ClearScreen
OakSpeechText1:
TX_FAR _OakSpeechText1
db "@"
OakSpeechText2A:
TX_FAR _OakSpeechText2A
TX_ASM
ld a, PIKACHU
call PlayCry
call WaitForSoundToFinish
jp TextScriptEnd
OakSpeechText2B:
TX_FAR _OakSpeechText2B
db "@"
IntroducePlayerText:
TX_FAR _IntroducePlayerText
db "@"
IntroduceRivalText:
TX_FAR _IntroduceRivalText
db "@"
OakSpeechText3:
TX_FAR _OakSpeechText3
db "@"
FadeInIntroPic:
ld hl,IntroFadePalettes
ld b,6
.next
ld a,[hli]
ld [rBGP],a
ld c,10
call DelayFrames
dec b
jr nz,.next
ret
IntroFadePalettes:
db %01010100
db %10101000
db %11111100
db %11111000
db %11110100
db %11100100
MovePicLeft:
ld a,119
ld [rWX],a
call DelayFrame
ld a,%11100100
ld [rBGP],a
.next
call DelayFrame
ld a,[rWX]
sub 8
cp $FF
ret z
ld [rWX],a
jr .next
DisplayPicCenteredOrUpperRight:
call GetPredefRegisters
IntroDisplayPicCenteredOrUpperRight:
; b = bank
; de = address of compressed pic
; c: 0 = centred, non-zero = upper-right
push bc
ld a,b
call UncompressSpriteFromDE
ld hl,sSpriteBuffer1
ld de,sSpriteBuffer0
ld bc,$310
call CopyData
ld de,vFrontPic
call InterlaceMergeSpriteBuffers
pop bc
ld a,c
and a
coord hl, 15, 1
jr nz,.next
coord hl, 6, 4
.next
xor a
ld [hStartTileID],a
predef_jump CopyUncompressedPicToTilemap
| 18.036437 | 43 | 0.762963 |
ac8a89d97a0430c8bf34cf08af48d2098beba410 | 725 | asm | Assembly | oeis/120/A120589.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/120/A120589.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/120/A120589.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A120589: Self-convolution of A120588, such that a(n) = 3*A120588(n) for n >= 2.
; Submitted by Christian Krause
; 1,2,3,6,15,42,126,396,1287,4290,14586,50388,176358,624036,2228700,8023320,29084535,106073010,388934370,1432916100,5301789570,19692361260,73398801060,274447690920,1029178840950,3869712441972,14585839204356,55102059216456,208600652748012,791243855251080,3006726649954104,11444959506276912,43633908117680727,166602194631144594,637008391236729330,2438832126449192292,9348856484721903786,35879395157581360476,137852412973865227092,530201588361020104200,2041276115189927401170,7866381126829476326460
mov $2,1
add $2,$0
trn $2,3
add $2,1
add $0,$2
bin $0,$2
mul $0,12
mul $2,2
mov $1,$2
add $1,1
div $0,$1
div $0,4
| 42.647059 | 495 | 0.81931 |
eff5f803076ce70b4d3678624b3a9cef45560397 | 695 | asm | Assembly | oeis/024/A024903.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/024/A024903.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/024/A024903.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A024903: Numbers k such that 7*k - 4 is prime.
; Submitted by Jamie Morken(s4)
; 1,3,5,9,11,15,23,29,33,35,39,41,45,51,53,59,69,75,81,83,89,93,95,111,113,119,123,135,141,143,149,159,161,165,171,179,183,185,189,195,209,213,221,225,231,233,239,243,251,261,269,273,279,299,305,321,335,341,345,353,365,369,371,375,381,383,389,399,401,413,423,425,429,435,441,453,455,459,465,473,485,491,495,503,509,521,525,533,539,543,551,555,561,573,575,579,585,591,603,605
mov $1,2
mov $2,$0
pow $2,2
lpb $2
mov $3,$1
seq $3,10051 ; Characteristic function of primes: 1 if n is prime, else 0.
sub $0,$3
add $1,14
mov $4,$0
max $4,0
cmp $4,$0
mul $2,$4
sub $2,1
lpe
mov $0,$1
div $0,7
add $0,1
| 31.590909 | 374 | 0.666187 |
8ea52a0a13b2e906c74947f3aca50fe95ea317e8 | 575 | asm | Assembly | programs/oeis/211/A211388.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/211/A211388.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | programs/oeis/211/A211388.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | ; A211388: Expansion of 1/((1-2*x)^6*(1-x)).
; 1,13,97,545,2561,10625,40193,141569,471041,1496065,4571137,13516801,38862849,109051905,299565057,807600129,2141192193,5592842241,14413725697,36698062849,92408905729,230359564289,568965726209,1393398120449,3385776406529,8167484293121,19570018484225,46598247677953,110307645063169,259695197552641,608266153361409,1417850308788225,3290013668212737,7601662617190401
mov $1,2
cal $1,16805 ; (4n)^5.
lpb $0
mov $2,$0
cal $2,82139 ; A transform of binomial(n,5).
sub $0,1
add $1,$2
lpe
sub $1,32768
div $1,2
mul $1,4
add $1,1
| 35.9375 | 363 | 0.777391 |
5e13dc5f93573328a46042fe9e5b15f6242d2e1b | 855 | asm | Assembly | programs/oeis/022/A022784.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/022/A022784.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/022/A022784.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A022784: Place where n-th 1 occurs in A023122.
; 1,3,6,10,15,22,30,39,49,61,74,88,103,119,137,156,176,197,220,244,269,295,322,351,381,412,444,478,513,549,586,624,664,705,747,790,835,881,928,976,1025,1076,1128,1181,1235,1291,1348,1406,1465,1526
mov $2,$0
add $2,1
mov $5,$0
lpb $2
mov $0,$5
sub $2,1
sub $0,$2
mov $6,$0
add $6,1
mov $7,0
mov $8,$0
lpb $6
mov $0,$8
sub $6,1
sub $0,$6
mov $10,2
mov $12,$0
lpb $10
mov $0,$12
sub $10,1
add $0,$10
sub $0,1
mov $4,4
add $4,$0
div $0,10
add $4,3
sub $4,$0
sub $4,8
div $4,4
mov $3,$4
mov $9,$10
lpb $9
sub $9,1
mov $11,$3
lpe
lpe
lpb $12
sub $11,$3
mov $12,0
lpe
mov $3,$11
add $3,1
add $7,$3
lpe
add $1,$7
lpe
mov $0,$1
| 16.764706 | 196 | 0.484211 |
14bdb8de54dffbfe5dff9bb73c31c7e8d16ee453 | 7,720 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xca_notsx.log_21829_229.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xca_notsx.log_21829_229.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xca_notsx.log_21829_229.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r12
push %r14
push %rax
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_WC_ht+0xadac, %rsi
lea addresses_normal_ht+0x1d66e, %rdi
nop
and %r12, %r12
mov $102, %rcx
rep movsb
nop
nop
add %rcx, %rcx
lea addresses_UC_ht+0x1a0f6, %r14
add $61120, %r11
mov $0x6162636465666768, %rdx
movq %rdx, (%r14)
nop
add $42137, %rdx
lea addresses_WT_ht+0x15fc4, %rsi
lea addresses_A_ht+0x7a0c, %rdi
clflush (%rdi)
xor %rdx, %rdx
mov $89, %rcx
rep movsl
nop
nop
nop
nop
nop
add $59699, %r12
lea addresses_A_ht+0x80e7, %r11
nop
nop
dec %r14
movl $0x61626364, (%r11)
nop
nop
cmp %rdi, %rdi
lea addresses_WT_ht+0xddac, %rsi
lea addresses_D_ht+0xb1ac, %rdi
nop
nop
nop
nop
nop
sub $46686, %rax
mov $2, %rcx
rep movsq
nop
nop
nop
nop
nop
sub %rsi, %rsi
lea addresses_D_ht+0x3fac, %rax
clflush (%rax)
nop
nop
nop
nop
inc %rdx
movl $0x61626364, (%rax)
nop
nop
nop
nop
nop
sub %rax, %rax
lea addresses_WC_ht+0x5dac, %rdi
nop
nop
nop
xor %rsi, %rsi
mov (%rdi), %r14d
nop
nop
nop
inc %rax
lea addresses_WC_ht+0x165ac, %rsi
lea addresses_normal_ht+0xd1ac, %rdi
nop
add $23568, %rdx
mov $98, %rcx
rep movsb
nop
nop
and %r14, %r14
lea addresses_WC_ht+0x5dc, %rdi
nop
nop
nop
dec %rdx
mov (%rdi), %esi
nop
xor %rax, %rax
lea addresses_A_ht+0xb1ac, %rsi
xor %r11, %r11
mov (%rsi), %r12
nop
nop
nop
and %r14, %r14
lea addresses_UC_ht+0x893c, %rsi
lea addresses_WT_ht+0xe97a, %rdi
nop
nop
nop
nop
nop
and %r14, %r14
mov $51, %rcx
rep movsq
nop
and $65114, %rdx
lea addresses_WT_ht+0x125ac, %rsi
lea addresses_UC_ht+0x1b7ac, %rdi
sub $58389, %rax
mov $77, %rcx
rep movsb
nop
nop
nop
nop
nop
add $64302, %r11
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rax
pop %r14
pop %r12
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r12
push %r15
push %r8
push %rcx
push %rdi
push %rsi
// REPMOV
lea addresses_D+0xc1ac, %rsi
lea addresses_D+0xc1ac, %rdi
nop
cmp %r11, %r11
mov $79, %rcx
rep movsq
nop
nop
nop
cmp %r11, %r11
// Store
lea addresses_D+0x5ac, %rcx
nop
nop
dec %r12
movw $0x5152, (%rcx)
nop
nop
nop
add $5412, %r11
// Store
lea addresses_PSE+0x1cdac, %r12
inc %rcx
movb $0x51, (%r12)
sub %r11, %r11
// Faulty Load
lea addresses_D+0xc1ac, %r8
dec %rcx
mov (%r8), %r15d
lea oracles, %r12
and $0xff, %r15
shlq $12, %r15
mov (%r12,%r15,1), %r15
pop %rsi
pop %rdi
pop %rcx
pop %r8
pop %r15
pop %r12
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'same': True, 'type': 'addresses_D', 'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 0}}
{'OP': 'REPM', 'src': {'same': True, 'congruent': 0, 'type': 'addresses_D'}, 'dst': {'same': True, 'congruent': 0, 'type': 'addresses_D'}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_D', 'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 8}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_PSE', 'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 10}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'same': True, 'type': 'addresses_D', 'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 0}}
<gen_prepare_buffer>
{'OP': 'REPM', 'src': {'same': False, 'congruent': 7, 'type': 'addresses_WC_ht'}, 'dst': {'same': False, 'congruent': 1, 'type': 'addresses_normal_ht'}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_UC_ht', 'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 1}}
{'OP': 'REPM', 'src': {'same': False, 'congruent': 3, 'type': 'addresses_WT_ht'}, 'dst': {'same': False, 'congruent': 0, 'type': 'addresses_A_ht'}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_A_ht', 'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 0}}
{'OP': 'REPM', 'src': {'same': False, 'congruent': 8, 'type': 'addresses_WT_ht'}, 'dst': {'same': False, 'congruent': 11, 'type': 'addresses_D_ht'}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_D_ht', 'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 9}}
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_WC_ht', 'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 10}}
{'OP': 'REPM', 'src': {'same': False, 'congruent': 10, 'type': 'addresses_WC_ht'}, 'dst': {'same': False, 'congruent': 10, 'type': 'addresses_normal_ht'}}
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_WC_ht', 'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 4}}
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_A_ht', 'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 11}}
{'OP': 'REPM', 'src': {'same': False, 'congruent': 3, 'type': 'addresses_UC_ht'}, 'dst': {'same': False, 'congruent': 1, 'type': 'addresses_WT_ht'}}
{'OP': 'REPM', 'src': {'same': False, 'congruent': 9, 'type': 'addresses_WT_ht'}, 'dst': {'same': False, 'congruent': 9, 'type': 'addresses_UC_ht'}}
{'36': 21829}
36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36
*/
| 34.464286 | 2,999 | 0.656088 |
d5ee35f2ee250b13994b465c026a9bc0fce280fe | 500 | asm | Assembly | LAB9/q2.asm | Avigdor-Kolonimus/ASM | 23327c9765ab1cc6bfe3dfaaa9a129dda5aac77a | [
"MIT"
] | null | null | null | LAB9/q2.asm | Avigdor-Kolonimus/ASM | 23327c9765ab1cc6bfe3dfaaa9a129dda5aac77a | [
"MIT"
] | null | null | null | LAB9/q2.asm | Avigdor-Kolonimus/ASM | 23327c9765ab1cc6bfe3dfaaa9a129dda5aac77a | [
"MIT"
] | null | null | null | EX2DS SEGMENT
is2pow DB ? ; 1- is pow, 0-is not pow
NUM DW 8192
EX2DS ENDS
sseg segment stack
dw 100h dup(?)
sseg ends
cseg segment
assume ds:EX2DS,cs:cseg,ss:sseg
start: mov ax,EX2DS
mov ds,ax
;initialisation
mov si,0
mov is2pow,0
mov cx,15
mov ax,NUM
;check bit number
L2: shl ax,1
jc L1
loop L2
;check that number is pow of 2
L1: cmp ax,0
jnz SOF
mov is2pow,1
SOF: mov ah,4ch
int 21h
cseg ends
end start | 16.666667 | 40 | 0.602 |
5babf93efa9aa50036d5fc2d62d8fae0a974cfed | 816 | asm | Assembly | programs/oeis/069/A069755.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/069/A069755.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/069/A069755.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A069755: Frobenius number of the numerical semigroup generated by 3 consecutive triangular numbers.
; 17,29,89,125,251,323,539,659,989,1169,1637,1889,2519,2855,3671,4103,5129,5669,6929,7589,9107,9899,11699,12635,14741,15833,18269,19529,22319,23759,26927,28559,32129,33965,37961,40013,44459,46739,51659,54179,59597,62369,68309,71345,77831,81143,88199,91799,99449,103349,111617,115829,124739,129275,138851,143723,153989,159209,170189,175769,187487,193439,205919,212255,225521,232253,246329,253469,268379,275939,291707,299699,316349,324785,342341,351233,369719,379079,398519,408359,428777,439109,460529,471365,493811,505163,528659,540539,565109,577529,603197,616169,642959,656495,684431,698543,727649,742349,772649,787949
add $0,2
mov $1,$0
div $0,2
add $1,2
bin $1,2
mul $1,$0
mov $0,$1
sub $0,6
mul $0,3
add $0,17
| 58.285714 | 618 | 0.800245 |
3bfc5bc1816224196ca2f349af2851d49274001d | 390 | asm | Assembly | oeis/262/A262672.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/262/A262672.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/262/A262672.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A262672: Expansion of (3-x-x^3) / ((x-1)^2*(1+x+x^2+x^3)).
; 3,2,2,1,4,3,3,2,5,4,4,3,6,5,5,4,7,6,6,5,8,7,7,6,9,8,8,7,10,9,9,8,11,10,10,9,12,11,11,10,13,12,12,11,14,13,13,12,15,14,14,13,16,15,15,14,17,16,16,15,18,17,17,16,19,18,18,17,20,19,19,18,21,20,20,19,22,21,21,20,23,22,22,21,24,23,23,22,25,24,24,23,26,25,25,24,27,26,26,25
mov $2,$0
mod $0,4
add $2,14
div $2,4
sub $2,$0
mov $0,$2
| 39 | 269 | 0.589744 |
2005d81bc476023372771a4313805317264c43cb | 9,305 | asm | Assembly | Transynther/x86/_processed/NONE/_ht_zr_un_/i9-9900K_12_0xa0.log_21829_111.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_ht_zr_un_/i9-9900K_12_0xa0.log_21829_111.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_ht_zr_un_/i9-9900K_12_0xa0.log_21829_111.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r13
push %r14
push %rbx
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_WC_ht+0x2e84, %rsi
nop
nop
nop
nop
sub %rdx, %rdx
movl $0x61626364, (%rsi)
nop
nop
nop
sub $48354, %rdi
lea addresses_A_ht+0x6e84, %r11
nop
nop
inc %rcx
mov (%r11), %bx
sub %rsi, %rsi
lea addresses_normal_ht+0x1e2a, %rsi
lea addresses_D_ht+0x94d4, %rdi
nop
nop
nop
nop
sub $25095, %r14
mov $4, %rcx
rep movsl
nop
nop
nop
nop
nop
add $39425, %rcx
lea addresses_UC_ht+0x14a44, %rsi
lea addresses_WT_ht+0x1eefc, %rdi
nop
nop
nop
nop
nop
inc %rdx
mov $77, %rcx
rep movsq
nop
nop
nop
nop
nop
inc %rsi
lea addresses_A_ht+0x1589c, %rsi
lea addresses_A_ht+0x2484, %rdi
nop
sub %rbx, %rbx
mov $63, %rcx
rep movsb
lfence
lea addresses_UC_ht+0x1ad84, %rsi
lea addresses_WT_ht+0x14284, %rdi
nop
nop
nop
nop
sub %rbx, %rbx
mov $121, %rcx
rep movsq
nop
mfence
lea addresses_UC_ht+0xa484, %rdx
nop
add %rcx, %rcx
movups (%rdx), %xmm7
vpextrq $0, %xmm7, %rsi
nop
and $4196, %r14
lea addresses_A_ht+0x1ee84, %r11
nop
nop
nop
sub %rdi, %rdi
movb $0x61, (%r11)
nop
nop
cmp %rcx, %rcx
lea addresses_UC_ht+0x7c44, %rdi
nop
nop
cmp %r11, %r11
mov $0x6162636465666768, %rdx
movq %rdx, %xmm5
movups %xmm5, (%rdi)
nop
xor $2499, %rcx
lea addresses_WC_ht+0x15284, %rsi
lea addresses_WT_ht+0xd84, %rdi
nop
inc %r14
mov $67, %rcx
rep movsb
add %rdi, %rdi
lea addresses_normal_ht+0x158c4, %rsi
nop
sub $31317, %rdi
movl $0x61626364, (%rsi)
nop
nop
nop
nop
nop
inc %rbx
lea addresses_normal_ht+0xd704, %rsi
lea addresses_UC_ht+0x17f04, %rdi
nop
cmp %r11, %r11
mov $82, %rcx
rep movsq
nop
nop
nop
sub $53336, %rcx
lea addresses_D_ht+0xf784, %rcx
clflush (%rcx)
nop
nop
xor $63192, %r13
movb (%rcx), %bl
nop
cmp %rsi, %rsi
lea addresses_A_ht+0x1a5a0, %rsi
lea addresses_WT_ht+0x9a84, %rdi
clflush (%rdi)
nop
nop
nop
nop
add $38950, %rdx
mov $118, %rcx
rep movsq
nop
nop
and %rdi, %rdi
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbx
pop %r14
pop %r13
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r13
push %r14
push %r15
push %r8
push %rbp
push %rsi
// Load
lea addresses_RW+0x178a4, %r14
nop
nop
nop
inc %r11
mov (%r14), %r8w
nop
nop
nop
dec %r13
// Store
lea addresses_WT+0x11a84, %r8
nop
sub $8313, %r11
movw $0x5152, (%r8)
nop
nop
dec %r8
// Store
lea addresses_RW+0x1b90, %rsi
dec %r13
movw $0x5152, (%rsi)
nop
nop
add $36530, %r13
// Load
lea addresses_normal+0xb04, %r11
nop
nop
nop
nop
nop
and $53550, %r14
mov (%r11), %r13
xor %rbp, %rbp
// Store
lea addresses_UC+0x7084, %r15
nop
nop
nop
nop
nop
add %r14, %r14
mov $0x5152535455565758, %r8
movq %r8, %xmm2
movups %xmm2, (%r15)
nop
nop
nop
nop
nop
xor %r11, %r11
// Store
lea addresses_WT+0x11a84, %r13
nop
nop
nop
and %r11, %r11
movw $0x5152, (%r13)
nop
nop
nop
nop
nop
cmp $11249, %rbp
// Store
lea addresses_US+0x1a114, %rsi
nop
nop
nop
cmp $6315, %r14
movw $0x5152, (%rsi)
nop
dec %r14
// Faulty Load
lea addresses_WT+0x11a84, %rsi
nop
nop
inc %r13
movups (%rsi), %xmm1
vpextrq $1, %xmm1, %r14
lea oracles, %rsi
and $0xff, %r14
shlq $12, %r14
mov (%rsi,%r14,1), %r14
pop %rsi
pop %rbp
pop %r8
pop %r15
pop %r14
pop %r13
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'src': {'NT': False, 'same': False, 'congruent': 0, 'type': 'addresses_WT', 'AVXalign': False, 'size': 1}, 'OP': 'LOAD'}
{'src': {'NT': False, 'same': False, 'congruent': 3, 'type': 'addresses_RW', 'AVXalign': False, 'size': 2}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'NT': False, 'same': True, 'congruent': 0, 'type': 'addresses_WT', 'AVXalign': False, 'size': 2}}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 1, 'type': 'addresses_RW', 'AVXalign': False, 'size': 2}}
{'src': {'NT': False, 'same': False, 'congruent': 5, 'type': 'addresses_normal', 'AVXalign': False, 'size': 8}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 9, 'type': 'addresses_UC', 'AVXalign': False, 'size': 16}}
{'OP': 'STOR', 'dst': {'NT': False, 'same': True, 'congruent': 0, 'type': 'addresses_WT', 'AVXalign': False, 'size': 2}}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 4, 'type': 'addresses_US', 'AVXalign': False, 'size': 2}}
[Faulty Load]
{'src': {'NT': False, 'same': True, 'congruent': 0, 'type': 'addresses_WT', 'AVXalign': False, 'size': 16}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 9, 'type': 'addresses_WC_ht', 'AVXalign': False, 'size': 4}}
{'src': {'NT': False, 'same': False, 'congruent': 10, 'type': 'addresses_A_ht', 'AVXalign': False, 'size': 2}, 'OP': 'LOAD'}
{'src': {'same': True, 'congruent': 1, 'type': 'addresses_normal_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 3, 'type': 'addresses_D_ht'}}
{'src': {'same': False, 'congruent': 6, 'type': 'addresses_UC_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 3, 'type': 'addresses_WT_ht'}}
{'src': {'same': False, 'congruent': 3, 'type': 'addresses_A_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 9, 'type': 'addresses_A_ht'}}
{'src': {'same': True, 'congruent': 8, 'type': 'addresses_UC_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 8, 'type': 'addresses_WT_ht'}}
{'src': {'NT': False, 'same': False, 'congruent': 9, 'type': 'addresses_UC_ht', 'AVXalign': False, 'size': 16}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 8, 'type': 'addresses_A_ht', 'AVXalign': True, 'size': 1}}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 4, 'type': 'addresses_UC_ht', 'AVXalign': False, 'size': 16}}
{'src': {'same': False, 'congruent': 11, 'type': 'addresses_WC_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 8, 'type': 'addresses_WT_ht'}}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 0, 'type': 'addresses_normal_ht', 'AVXalign': True, 'size': 4}}
{'src': {'same': False, 'congruent': 6, 'type': 'addresses_normal_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 7, 'type': 'addresses_UC_ht'}}
{'src': {'NT': False, 'same': False, 'congruent': 6, 'type': 'addresses_D_ht', 'AVXalign': False, 'size': 1}, 'OP': 'LOAD'}
{'src': {'same': False, 'congruent': 2, 'type': 'addresses_A_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 11, 'type': 'addresses_WT_ht'}}
{'44': 21201, 'c5': 1, 'ff': 2, '00': 301, '42': 1, '45': 318, '95': 1, '08': 4}
00 44 44 44 44 44 44 44 44 44 00 44 44 44 44 44 44 44 44 44 00 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 45 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 45 44 45 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 00 44 00 44 44 44 44 44 44 44 44 44 44 44 44 44 00 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 00 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 45 45 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 45 44 44 44 45 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 45 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 00 44 44 44 44 44 44 44 44 44 45 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 00 44 44 44 45 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 45 44 44 00 44 44 44 45 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 00 44 44 44 44 45 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 45 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 45 44 44 44 44 44 44 44 44 44 44 44 44 44 00 44 44 44 00 00 00 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 00 44 44 44 44 44 44 00 00 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 00 44 44 44 44 44 44 44 44 44 00 44 44 44 44 44 44 44 44 44 44 44 44 44 00 44 00 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44
*/
| 30.709571 | 2,999 | 0.651693 |
1f8b754c862781d4b36f6c576fa10f57bf911951 | 344 | asm | Assembly | programs/oeis/193/A193592.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/193/A193592.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/193/A193592.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A193592: Triangle read by rows having n-th row 1, n, n-1, n-2,..., 2, 1 for n>=0.
; 1,1,1,1,2,1,1,3,2,1,1,4,3,2,1,1,5,4,3,2,1,1,6,5,4,3,2,1,1,7,6,5,4,3,2,1,1,8,7,6,5,4,3,2,1,1,9,8,7,6,5,4,3,2,1,1,10,9,8,7,6,5,4,3,2,1,1,11,10,9,8,7,6,5,4,3,2,1,1,12,11,10,9,8,7,6,5,4,3,2,1
lpb $0,1
mov $1,$2
trn $1,$0
add $2,1
trn $0,$2
lpe
add $1,1
| 31.272727 | 189 | 0.523256 |
fbbfff4f8b78cbe67f5d9525a84569dca8e842e3 | 503 | asm | Assembly | programs/oeis/066/A066714.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/066/A066714.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/066/A066714.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A066714: Coordination sequence for ReO_3 net with respect to Re atom.
; 1,6,6,30,18,78,38,150,66,246,102,366,146,510,198,678,258,870,326,1086,402,1326,486,1590,578,1878,678,2190,786,2526,902,2886,1026,3270,1158,3678,1298,4110,1446,4566,1602,5046,1766,5550,1938,6078,2118,6630,2306
mov $2,1
mov $6,$0
trn $6,1
add $2,$6
mov $7,$0
mod $0,2
mov $3,$2
mov $4,$2
mul $4,2
mul $3,$4
add $6,3
mov $8,2
gcd $8,$6
lpb $0
trn $0,6
add $8,$3
add $8,2
lpe
mov $1,$8
mov $5,$7
mul $5,$7
add $1,$5
mov $0,$1
| 18.62963 | 210 | 0.654076 |
3eab382cc65bde908ad5ffea9c1f22ae4bc32b37 | 5,411 | asm | Assembly | src/spawner/spectators.asm | tomsons26/ts-patches | 326db731f7226d9e803feab475777c730688634e | [
"MIT"
] | 33 | 2016-07-30T14:17:28.000Z | 2021-12-19T15:45:19.000Z | src/spawner/spectators.asm | A-Productions/ts-patches | 326db731f7226d9e803feab475777c730688634e | [
"MIT"
] | 73 | 2018-08-17T00:25:19.000Z | 2021-05-10T08:31:15.000Z | src/spawner/spectators.asm | A-Productions/ts-patches | 326db731f7226d9e803feab475777c730688634e | [
"MIT"
] | 18 | 2017-05-16T11:28:06.000Z | 2022-03-20T20:41:03.000Z | %include "macros/patch.inc"
%include "macros/datatypes.inc"
%include "TiberianSun.inc"
%include "ini.inc"
cglobal IsSpectatorArray
cglobal SpectatorStuffInit
cglobal Load_Spectators_Spawner
cextern INIClass_SPAWN
cextern SpawnerActive
section .bss
IsSpectatorArray RESD 8
SpectatorStuffInit RESB 1
section .rdata
str_Multi1 db "Multi1",0
str_Multi2 db "Multi2",0
str_Multi3 db "Multi3",0
str_Multi4 db "Multi4",0
str_Multi5 db "Multi5",0
str_Multi6 db "Multi6",0
str_Multi7 db "Multi7",0
str_Multi8 db "Multi8",0
str_IsSpectator db "IsSpectator",0
hack 0x0047988B
_DisplayClass__Encroach_Shadow_Spectator:
mov ecx, [PlayerPtr]
call HouseClass__Is_Coach
test al, al
jnz .Reg
mov ecx, [PlayerPtr]
call HouseClass__Is_Spectator
test al, al
jnz 0x0047995C
.Reg:
mov ebp, 0x200
jmp hackend
hack 0x00479974
_DisplayClass__Encroach_Fog_Spectator:
mov ecx, [PlayerPtr]
call HouseClass__Is_Coach
test al, al
jnz .Reg
mov ecx, [PlayerPtr]
call HouseClass__Is_Spectator
test al, al
jnz 0x004799F7
.Reg:
mov ecx, esi
call 0x0051E270
jmp hackend
hack 0x004BF71B
_HouseClass__MPlayer_Defeated_Ignore_Spectator_In_Skirmish:
cmp [PlayerPtr], eax
jnz .Normal_Code
cmp dword [SessionType], 5
jnz .Normal_Code
push eax
mov eax, [eax+0x20]
cmp dword [IsSpectatorArray+eax*4], 1
pop eax
jz .Dont_Count
.Normal_Code:
cmp byte [eax+0CBh], 0
jmp 0x004BF722
.Dont_Count:
jmp 0x004BF74A
hack 0x005DE717
_Create_Units_Dont_Count_Spectators_When_Counting_Players:
lea eax, [edx+ecx]
push ebx
push esi
mov esi, 0
mov ebx, 0
.Loop:
cmp dword [IsSpectatorArray+esi*4], 0
jz .Next_Iter
inc ebx
.Next_Iter:
inc esi
cmp esi, 8
jl .Loop
.Out_Loop:
sub eax, ebx
pop esi
pop ebx
cmp edi, eax
jmp 0x005DE71C
hack 0x004C968E
_sub_4C9560_Spectator_Stuff:
cmp dword [PlayerPtr], esi
jnz .Ret
mov esi, [PlayerPtr]
mov esi, [esi+0x20]
cmp dword [IsSpectatorArray+esi*4], 1
jz .Ret
call 0x005BC080
jmp 0x004C9693
.Ret:
add esp, 4
jmp 0x004C9693
_BuildingClass__Visual_Character_Spectator_Stuff:
@CALL 0x0043852B, HouseClass__Is_Ally_Or_Spec_HH
@CALL 0x00438540, HouseClass__Is_Ally_Or_Spec_HH
_TechnoClass__Visual_Character_Spectator_Stuff:
@CALL 0x00633E85, HouseClass__Is_Ally_Or_Spec_HH
@CALL 0x00633E9F, HouseClass__Is_Ally_Or_Spec_HH
hack 0x004BC608
_HouseClass__AI_Spectator_Stuff:
call 0x004C9560
cmp dword [PlayerPtr], esi
jnz .Ret
cmp byte [SpectatorStuffInit], 0
jnz .Ret
mov ecx, [PlayerPtr]
mov ecx, [ecx+0x20]
cmp dword [IsSpectatorArray+ecx*4], 0
jz .Ret
mov byte [0x00749808], 1
push 1
mov ecx, MouseClass_Map
call 0x005BBEE0
mov byte [SpectatorStuffInit], 1
.Ret:
jmp 0x004BC60D
hack 0x005DE8F9
_Create_Units_Dont_Create_For_Dead_Houses:
mov edx, [HouseClassArray_Vector]
mov esi, [edx+ecx*4]
cmp byte [esi+0x0CB], 1
jz 0x005DEF1D ; if dead jump to next unit
jmp 0x005DE902
hack 0x005B9CFE
_sub_5B9B90_Set_Up_Spectator_Player_Stuff:
cmp dword [SpawnerActive], 1
jne .Ret
mov byte [SpectatorStuffInit], 0
mov ecx, [PlayerPtr]
call HouseClass__Is_Coach
test al, al
jnz .Ret
mov ecx, [PlayerPtr]
call HouseClass__Is_Spectator
test al, al
jz .Ret
mov ecx, dword [PlayerPtr]
cmp byte [ecx+0x0CB], 1
jnz .Ret
mov dword [Message_Input_Player_Dead], 1
mov ecx, MouseClass_Map
call 0x0051E0A0
.Ret:
pop edi
pop esi
pop ebp
add esp, 14h
jmp 0x005B9D04
section .text
Load_Spectators_Spawner:
SpawnINI_Get_Bool str_IsSpectator, str_Multi1, 0
mov dword [IsSpectatorArray+0], eax
SpawnINI_Get_Bool str_IsSpectator, str_Multi2, 0
mov dword [IsSpectatorArray+4], eax
SpawnINI_Get_Bool str_IsSpectator, str_Multi3, 0
mov dword [IsSpectatorArray+8], eax
SpawnINI_Get_Bool str_IsSpectator, str_Multi4, 0
mov dword [IsSpectatorArray+12], eax
SpawnINI_Get_Bool str_IsSpectator, str_Multi5, 0
mov dword [IsSpectatorArray+16], eax
SpawnINI_Get_Bool str_IsSpectator, str_Multi6, 0
mov dword [IsSpectatorArray+20], eax
SpawnINI_Get_Bool str_IsSpectator, str_Multi7, 0
mov dword [IsSpectatorArray+24], eax
SpawnINI_Get_Bool str_IsSpectator, str_Multi8, 0
mov dword [IsSpectatorArray+28], eax
retn
_TechnoClass_Draw_Health_Boxes_unit_draw_pips:
@CALL 0x0062C6CE, HouseClass__Is_Ally_Or_Spec_HH
_TechnoClass_Draw_Health_Boxes_bldg_draw_pips:
@CALL 0x0062CA26, HouseClass__Is_Ally_Or_Spec_HH
_BuildingClass_Draw_Overlays_draw_power:
@CALL 0x00428A23, HouseClass__Is_Ally_Or_Spec_HH
@LJZ 0x00428A88, _Draw_Overlays_spectator_spy
section .text
_Draw_Overlays_spectator_spy:
jnz 0x00428A8E
mov ecx, [PlayerPtr]
call HouseClass__Is_Coach
test al, al
jnz .is_ally
mov ecx, [PlayerPtr]
call HouseClass__Is_Spectator
test al, al
jnz 0x00428A8E
jmp 0x00428B13
.is_ally:
mov eax, [esi+0xE0]
push eax
mov ecx, [PlayerPtr]
call HouseClass__Is_Ally_HH
test al, al
jnz 0x00428A8E
jmp 0x00428B13
| 19.605072 | 59 | 0.703197 |
3eb0790bac468765a7094a4ae6c0cebff41a2321 | 60 | asm | Assembly | gfx/pokemon/arcanine/anim_idle.asm | Dev727/ancientplatinum | 8b212a1728cc32a95743e1538b9eaa0827d013a7 | [
"blessing"
] | 28 | 2019-11-08T07:19:00.000Z | 2021-12-20T10:17:54.000Z | gfx/pokemon/arcanine/anim_idle.asm | Dev727/ancientplatinum | 8b212a1728cc32a95743e1538b9eaa0827d013a7 | [
"blessing"
] | 13 | 2020-01-11T17:00:40.000Z | 2021-09-14T01:27:38.000Z | gfx/pokemon/arcanine/anim_idle.asm | Dev727/ancientplatinum | 8b212a1728cc32a95743e1538b9eaa0827d013a7 | [
"blessing"
] | 22 | 2020-05-28T17:31:38.000Z | 2022-03-07T20:49:35.000Z | setrepeat 4
frame 5, 09
frame 6, 09
dorepeat 1
endanim
| 10 | 12 | 0.7 |
d9a22002bd6af7fc8d319485846ac7b5700eb0ea | 6,890 | asm | Assembly | Transynther/x86/_processed/AVXALIGN/_ht_zr_/i7-8650U_0xd2_notsx.log_2904_726.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/AVXALIGN/_ht_zr_/i7-8650U_0xd2_notsx.log_2904_726.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/AVXALIGN/_ht_zr_/i7-8650U_0xd2_notsx.log_2904_726.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r12
push %r8
push %rax
push %rbx
push %rcx
push %rdi
push %rsi
lea addresses_WT_ht+0x960b, %rax
nop
nop
and $37341, %r12
mov (%rax), %r8
nop
nop
nop
nop
xor %rax, %rax
lea addresses_normal_ht+0x32cb, %rsi
lea addresses_A_ht+0x1760b, %rdi
clflush (%rsi)
nop
nop
inc %rbx
mov $65, %rcx
rep movsb
nop
nop
dec %r12
lea addresses_D_ht+0x8613, %rsi
lea addresses_A_ht+0x196ec, %rdi
sub $59728, %r11
mov $78, %rcx
rep movsw
nop
nop
inc %r12
lea addresses_A_ht+0xeecb, %rsi
lea addresses_A_ht+0x280b, %rdi
nop
nop
nop
nop
nop
xor %r11, %r11
mov $32, %rcx
rep movsl
nop
nop
nop
inc %rax
lea addresses_A_ht+0x1342e, %rsi
lea addresses_normal_ht+0xc0b3, %rdi
sub %r12, %r12
mov $81, %rcx
rep movsl
add $41493, %rcx
lea addresses_A_ht+0x16b21, %r11
clflush (%r11)
nop
nop
nop
nop
add $18045, %rdi
mov $0x6162636465666768, %r8
movq %r8, %xmm1
movups %xmm1, (%r11)
nop
nop
nop
nop
sub $31037, %rsi
lea addresses_D_ht+0xb20b, %rsi
lea addresses_UC_ht+0x2f4b, %rdi
nop
nop
nop
nop
nop
dec %r12
mov $26, %rcx
rep movsl
xor $28461, %rcx
lea addresses_WT_ht+0xf24b, %rsi
lea addresses_WC_ht+0x16e0b, %rdi
nop
dec %rbx
mov $19, %rcx
rep movsw
nop
nop
nop
and $4759, %rax
lea addresses_UC_ht+0x1380b, %rbx
nop
nop
nop
nop
sub %rax, %rax
mov (%rbx), %edi
nop
nop
nop
and $61093, %rcx
lea addresses_UC_ht+0xf94b, %rsi
nop
and %rbx, %rbx
movups (%rsi), %xmm1
vpextrq $1, %xmm1, %r12
nop
nop
nop
nop
nop
inc %rsi
lea addresses_WT_ht+0x1efab, %rsi
nop
cmp $7879, %rdi
vmovups (%rsi), %ymm3
vextracti128 $1, %ymm3, %xmm3
vpextrq $0, %xmm3, %r11
nop
nop
nop
nop
and $32891, %rdi
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %rax
pop %r8
pop %r12
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r13
push %r8
push %r9
push %rbp
push %rcx
// Faulty Load
lea addresses_A+0x10e0b, %rcx
nop
nop
add $5957, %r13
movaps (%rcx), %xmm5
vpextrq $1, %xmm5, %rbp
lea oracles, %r13
and $0xff, %rbp
shlq $12, %rbp
mov (%r13,%rbp,1), %rbp
pop %rcx
pop %rbp
pop %r9
pop %r8
pop %r13
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'type': 'addresses_A', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': True}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'type': 'addresses_A', 'size': 16, 'AVXalign': True, 'NT': False, 'congruent': 0, 'same': True}}
<gen_prepare_buffer>
{'OP': 'LOAD', 'src': {'type': 'addresses_WT_ht', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 9, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_normal_ht', 'congruent': 6, 'same': False}, 'dst': {'type': 'addresses_A_ht', 'congruent': 10, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_D_ht', 'congruent': 2, 'same': False}, 'dst': {'type': 'addresses_A_ht', 'congruent': 0, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_A_ht', 'congruent': 6, 'same': True}, 'dst': {'type': 'addresses_A_ht', 'congruent': 9, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_A_ht', 'congruent': 0, 'same': False}, 'dst': {'type': 'addresses_normal_ht', 'congruent': 3, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_A_ht', 'size': 16, 'AVXalign': False, 'NT': False, 'congruent': 1, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_D_ht', 'congruent': 9, 'same': False}, 'dst': {'type': 'addresses_UC_ht', 'congruent': 6, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_WT_ht', 'congruent': 5, 'same': False}, 'dst': {'type': 'addresses_WC_ht', 'congruent': 11, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_UC_ht', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 7, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_UC_ht', 'size': 16, 'AVXalign': False, 'NT': False, 'congruent': 6, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_WT_ht', 'size': 32, 'AVXalign': False, 'NT': False, 'congruent': 4, 'same': False}}
{'00': 2890, '49': 7, '45': 2, '44': 2, '46': 3}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 49 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 49 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 49 00 00 00 00 00 00 00 00 00 00 00 45 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 44 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 46 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 49 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
| 37.043011 | 2,999 | 0.658491 |
33c45aab5aa5c571414afce5493d4c904e13c910 | 389 | asm | Assembly | libsrc/_DEVELOPMENT/string/c/sccz80/strrev.asm | Frodevan/z88dk | f27af9fe840ff995c63c80a73673ba7ee33fffac | [
"ClArtistic"
] | 640 | 2017-01-14T23:33:45.000Z | 2022-03-30T11:28:42.000Z | libsrc/_DEVELOPMENT/string/c/sccz80/strrev.asm | Frodevan/z88dk | f27af9fe840ff995c63c80a73673ba7ee33fffac | [
"ClArtistic"
] | 1,600 | 2017-01-15T16:12:02.000Z | 2022-03-31T12:11:12.000Z | libsrc/_DEVELOPMENT/string/c/sccz80/strrev.asm | Frodevan/z88dk | f27af9fe840ff995c63c80a73673ba7ee33fffac | [
"ClArtistic"
] | 215 | 2017-01-17T10:43:03.000Z | 2022-03-23T17:25:02.000Z |
; char *strrev(char *s)
SECTION code_clib
SECTION code_string
PUBLIC strrev
EXTERN asm_strrev
defc strrev = asm_strrev
IF __CLASSIC && __CPU_GBZ80__
PUBLIC _strrev
_strrev:
ld hl,sp+2
ld a,(hl+)
ld h,(hl)
ld l,a
call asm_strrev
ld d,h
ld e,l
ret
ENDIF
; SDCC bridge for Classic
IF __CLASSIC && !__CPU_GBZ80__
PUBLIC _strrev
defc _strrev = strrev
ENDIF
| 11.787879 | 30 | 0.696658 |
1dc4496df3e23463c55fb24b739fa0c653cd9b43 | 8,176 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_sm_/i9-9900K_12_0xca.log_21829_356.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_sm_/i9-9900K_12_0xca.log_21829_356.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_sm_/i9-9900K_12_0xca.log_21829_356.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r13
push %r8
push %rax
push %rbp
push %rcx
push %rdi
push %rsi
lea addresses_D_ht+0x1bc22, %r8
nop
cmp %r13, %r13
mov $0x6162636465666768, %rsi
movq %rsi, (%r8)
nop
nop
xor %r13, %r13
lea addresses_WC_ht+0x193fa, %rcx
clflush (%rcx)
nop
nop
nop
lfence
vmovups (%rcx), %ymm1
vextracti128 $1, %ymm1, %xmm1
vpextrq $0, %xmm1, %rax
nop
nop
nop
sub $6529, %rax
lea addresses_D_ht+0xe870, %r13
nop
nop
nop
nop
xor $56949, %r11
movb $0x61, (%r13)
nop
nop
nop
nop
nop
inc %r13
lea addresses_normal_ht+0x1e238, %r11
nop
nop
nop
nop
sub $38517, %rsi
and $0xffffffffffffffc0, %r11
movntdqa (%r11), %xmm0
vpextrq $1, %xmm0, %r13
and %rcx, %rcx
lea addresses_WT_ht+0xa24e, %r13
nop
nop
cmp %r11, %r11
vmovups (%r13), %ymm6
vextracti128 $0, %ymm6, %xmm6
vpextrq $0, %xmm6, %rbp
nop
nop
nop
dec %rbp
lea addresses_UC_ht+0x1bc8, %rax
nop
nop
xor $20225, %r8
mov $0x6162636465666768, %rsi
movq %rsi, %xmm1
vmovups %ymm1, (%rax)
nop
add %r11, %r11
lea addresses_WT_ht+0x14569, %r11
clflush (%r11)
nop
nop
nop
xor %rbp, %rbp
mov $0x6162636465666768, %r8
movq %r8, %xmm0
vmovups %ymm0, (%r11)
nop
nop
sub $7898, %rsi
lea addresses_A_ht+0x1cb8c, %r11
nop
nop
nop
cmp $14359, %rcx
mov (%r11), %r8w
nop
cmp $2849, %rax
lea addresses_normal_ht+0x3144, %rsi
lea addresses_WT_ht+0xb0f4, %rdi
nop
nop
nop
nop
dec %r13
mov $41, %rcx
rep movsq
nop
nop
nop
nop
nop
xor $28049, %rsi
lea addresses_UC_ht+0x1b680, %rdi
nop
nop
nop
xor $22228, %r8
mov $0x6162636465666768, %r13
movq %r13, (%rdi)
cmp %rdi, %rdi
lea addresses_WC_ht+0x15f24, %r8
nop
nop
nop
and $1466, %r13
mov (%r8), %bp
nop
nop
nop
nop
nop
xor $12325, %r11
lea addresses_normal_ht+0x1bf74, %r11
nop
nop
nop
nop
nop
mfence
mov $0x6162636465666768, %rax
movq %rax, (%r11)
dec %rsi
lea addresses_D_ht+0x3e24, %rsi
lea addresses_UC_ht+0xf024, %rdi
nop
nop
nop
sub %r8, %r8
mov $44, %rcx
rep movsq
nop
nop
nop
nop
inc %rax
pop %rsi
pop %rdi
pop %rcx
pop %rbp
pop %rax
pop %r8
pop %r13
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r12
push %r13
push %r8
push %rbx
push %rdi
push %rsi
// Store
lea addresses_WC+0x18824, %r12
nop
nop
nop
nop
nop
sub %r8, %r8
mov $0x5152535455565758, %rdi
movq %rdi, (%r12)
nop
nop
nop
sub %rsi, %rsi
// Store
lea addresses_D+0x16c24, %rbx
nop
nop
nop
nop
sub %r13, %r13
mov $0x5152535455565758, %r8
movq %r8, %xmm5
movups %xmm5, (%rbx)
and %r10, %r10
// Store
mov $0xfa4, %r13
nop
xor %r12, %r12
mov $0x5152535455565758, %rsi
movq %rsi, (%r13)
nop
nop
nop
xor $47015, %rdi
// Faulty Load
lea addresses_WC+0x18824, %rsi
nop
nop
xor %r10, %r10
vmovups (%rsi), %ymm7
vextracti128 $0, %ymm7, %xmm7
vpextrq $0, %xmm7, %r12
lea oracles, %r8
and $0xff, %r12
shlq $12, %r12
mov (%r8,%r12,1), %r12
pop %rsi
pop %rdi
pop %rbx
pop %r8
pop %r13
pop %r12
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'size': 1, 'NT': True, 'type': 'addresses_WC', 'same': False, 'AVXalign': False, 'congruent': 0}}
{'OP': 'STOR', 'dst': {'size': 8, 'NT': False, 'type': 'addresses_WC', 'same': True, 'AVXalign': False, 'congruent': 0}}
{'OP': 'STOR', 'dst': {'size': 16, 'NT': False, 'type': 'addresses_D', 'same': False, 'AVXalign': False, 'congruent': 8}}
{'OP': 'STOR', 'dst': {'size': 8, 'NT': False, 'type': 'addresses_P', 'same': False, 'AVXalign': False, 'congruent': 7}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'size': 32, 'NT': False, 'type': 'addresses_WC', 'same': True, 'AVXalign': False, 'congruent': 0}}
<gen_prepare_buffer>
{'OP': 'STOR', 'dst': {'size': 8, 'NT': False, 'type': 'addresses_D_ht', 'same': False, 'AVXalign': False, 'congruent': 1}}
{'OP': 'LOAD', 'src': {'size': 32, 'NT': False, 'type': 'addresses_WC_ht', 'same': False, 'AVXalign': False, 'congruent': 1}}
{'OP': 'STOR', 'dst': {'size': 1, 'NT': False, 'type': 'addresses_D_ht', 'same': False, 'AVXalign': False, 'congruent': 1}}
{'OP': 'LOAD', 'src': {'size': 16, 'NT': True, 'type': 'addresses_normal_ht', 'same': False, 'AVXalign': False, 'congruent': 1}}
{'OP': 'LOAD', 'src': {'size': 32, 'NT': False, 'type': 'addresses_WT_ht', 'same': False, 'AVXalign': False, 'congruent': 0}}
{'OP': 'STOR', 'dst': {'size': 32, 'NT': False, 'type': 'addresses_UC_ht', 'same': False, 'AVXalign': False, 'congruent': 1}}
{'OP': 'STOR', 'dst': {'size': 32, 'NT': False, 'type': 'addresses_WT_ht', 'same': False, 'AVXalign': False, 'congruent': 0}}
{'OP': 'LOAD', 'src': {'size': 2, 'NT': False, 'type': 'addresses_A_ht', 'same': False, 'AVXalign': False, 'congruent': 2}}
{'OP': 'REPM', 'src': {'same': False, 'type': 'addresses_normal_ht', 'congruent': 5}, 'dst': {'same': False, 'type': 'addresses_WT_ht', 'congruent': 4}}
{'OP': 'STOR', 'dst': {'size': 8, 'NT': False, 'type': 'addresses_UC_ht', 'same': False, 'AVXalign': False, 'congruent': 2}}
{'OP': 'LOAD', 'src': {'size': 2, 'NT': False, 'type': 'addresses_WC_ht', 'same': False, 'AVXalign': True, 'congruent': 8}}
{'OP': 'STOR', 'dst': {'size': 8, 'NT': False, 'type': 'addresses_normal_ht', 'same': True, 'AVXalign': False, 'congruent': 4}}
{'OP': 'REPM', 'src': {'same': False, 'type': 'addresses_D_ht', 'congruent': 8}, 'dst': {'same': False, 'type': 'addresses_UC_ht', 'congruent': 11}}
{'58': 21829}
58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58
*/
| 31.689922 | 2,999 | 0.656311 |
15bb0dd075ed4776a23bd3692b4e668d0575db58 | 574 | asm | Assembly | programs/oeis/175/A175540.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/175/A175540.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | programs/oeis/175/A175540.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | ; A175540: a(n) = A067076(n) + n.
; 1,3,5,8,10,13,15,18,22,24,28,31,33,36,40,44,46,50,53,55,59,62,66,71,74,76,79,81,84,92,95,99,101,107,109,113,117,120,124,128,130,136,138,141,143,150,157,160,162,165,169,171,177,181,185,189,191,195,198,200,206
mov $9,$0
mov $11,2
lpb $11
mov $0,$9
sub $11,1
add $0,$11
mov $2,$0
mov $5,$0
mov $6,$0
cal $0,40 ; The prime numbers.
add $2,$0
mov $3,$5
sub $3,2
add $4,$2
sub $4,$3
mov $7,$11
mov $8,$6
mul $8,2
mov $10,$4
add $10,$8
lpb $7
mov $1,$10
sub $7,1
lpe
lpe
sub $1,7
div $1,2
add $1,1
| 17.9375 | 209 | 0.562718 |
bb0026dec466da6f59a406a95f126179b1833889 | 189 | asm | Assembly | src/test/resources/data/generationtests/z180-ops.asm | cpcitor/mdlz80optimizer | 75070d984e1f08474e6d397c7e0eb66d8be0c432 | [
"Apache-2.0"
] | null | null | null | src/test/resources/data/generationtests/z180-ops.asm | cpcitor/mdlz80optimizer | 75070d984e1f08474e6d397c7e0eb66d8be0c432 | [
"Apache-2.0"
] | null | null | null | src/test/resources/data/generationtests/z180-ops.asm | cpcitor/mdlz80optimizer | 75070d984e1f08474e6d397c7e0eb66d8be0c432 | [
"Apache-2.0"
] | null | null | null | ; Test case for Z180-specific instructions:
org #0000
in0 a, (#01)
mlt bc
out0 (#01), b
otim
otdm
otimr
otdmr
slp
tst c
tst #02
tstio #02
| 12.6 | 44 | 0.513228 |
f4eae3d93f0a1c74007d4c27c562af000697ffac | 649 | asm | Assembly | prot.asm | Klaus073/Assembly-language | 2ddddf9e3ef6ce6c05f56b015be5697d1ac3c0be | [
"BSD-2-Clause"
] | null | null | null | prot.asm | Klaus073/Assembly-language | 2ddddf9e3ef6ce6c05f56b015be5697d1ac3c0be | [
"BSD-2-Clause"
] | null | null | null | prot.asm | Klaus073/Assembly-language | 2ddddf9e3ef6ce6c05f56b015be5697d1ac3c0be | [
"BSD-2-Clause"
] | null | null | null | SECTION .DATA
happ: dq 0
basic_first: dq 123
basic_last: dq 456
SECTION .TEXT
GLOBAL _basic_encrypt
GLOBAL _basic_decrypt
GLOBAL _basic_encrypt_char
GLOBAL _basic_decrypt_char
_basic_encrypt:
mov rax,rdi ;[rbp+16]
add rax, [basic_first]
add rax,[basic_last]
ret
_basic_decrypt:
mov rax,rdi ;[rbp+16]
sub rax, [basic_first]
sub rax,[basic_last]
ret
_basic_encrypt_char:
mov rax,rdi ;[rbp+16]
add rax, [basic_first]
add rax,[basic_last]
_basic_decrypt_char:
mov rax,rdi ;[rbp+16]
sub rax, [basic_first]
sub rax,[basic_last]
ret
| 14.75 | 30 | 0.636364 |
713b6902e3ef14ab7353dcef32c7d73772b242b6 | 4,628 | asm | Assembly | Transynther/x86/_processed/P/_zr_un_/i7-7700_9_0xca.log_1117_617.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/P/_zr_un_/i7-7700_9_0xca.log_1117_617.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/P/_zr_un_/i7-7700_9_0xca.log_1117_617.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r12
push %r13
push %r15
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_D_ht+0x11a9a, %r10
nop
nop
nop
xor $43422, %r15
movb (%r10), %r12b
nop
nop
nop
nop
nop
xor %rdx, %rdx
lea addresses_normal_ht+0xa4ba, %r13
nop
cmp $37768, %rdi
mov $0x6162636465666768, %r12
movq %r12, %xmm7
movups %xmm7, (%r13)
nop
nop
cmp %rdi, %rdi
lea addresses_WT_ht+0x16a3a, %rsi
lea addresses_D_ht+0x106ba, %rdi
xor $628, %r12
mov $54, %rcx
rep movsb
nop
nop
nop
nop
inc %r13
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %r15
pop %r13
pop %r12
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r11
push %r9
push %rcx
push %rsi
// Faulty Load
mov $0xcba, %r9
nop
add %r11, %r11
mov (%r9), %r10
lea oracles, %rsi
and $0xff, %r10
shlq $12, %r10
mov (%rsi,%r10,1), %r10
pop %rsi
pop %rcx
pop %r9
pop %r11
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'src': {'congruent': 0, 'AVXalign': False, 'same': False, 'size': 1, 'NT': False, 'type': 'addresses_P'}, 'OP': 'LOAD'}
[Faulty Load]
{'src': {'congruent': 0, 'AVXalign': False, 'same': True, 'size': 8, 'NT': False, 'type': 'addresses_P'}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'congruent': 5, 'AVXalign': False, 'same': False, 'size': 1, 'NT': False, 'type': 'addresses_D_ht'}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'congruent': 7, 'AVXalign': False, 'same': False, 'size': 16, 'NT': False, 'type': 'addresses_normal_ht'}}
{'src': {'congruent': 7, 'same': False, 'type': 'addresses_WT_ht'}, 'OP': 'REPM', 'dst': {'congruent': 9, 'same': False, 'type': 'addresses_D_ht'}}
{'de': 290, '00': 1, 'ff': 445, 'e0': 381}
00 de e0 e0 ff ff e0 de de e0 e0 ff ff e0 ff e0 e0 ff e0 e0 ff e0 ff e0 de ff ff e0 ff e0 ff de ff ff ff de de ff e0 ff e0 de e0 ff de de ff de de e0 e0 de de e0 ff ff e0 e0 de e0 ff e0 ff e0 ff ff de ff e0 e0 e0 e0 e0 e0 ff ff e0 e0 de de de ff e0 de ff ff e0 de ff ff de de ff de e0 e0 e0 de de e0 ff ff e0 de ff de de de ff de ff ff de de de ff ff ff e0 de de ff e0 ff e0 ff ff ff ff de de ff ff ff ff ff ff ff ff e0 e0 e0 de e0 de ff de e0 e0 e0 de de ff e0 de de ff ff ff ff e0 ff e0 de ff e0 ff ff de ff e0 de ff e0 ff ff ff e0 ff e0 de ff ff ff e0 e0 de ff ff ff ff ff ff de ff ff ff e0 e0 ff ff ff de ff e0 ff e0 ff ff e0 ff ff de e0 e0 ff e0 ff ff ff ff de de e0 e0 de ff e0 de ff ff e0 e0 de e0 e0 de e0 de e0 ff ff e0 e0 ff ff de de ff de ff ff ff de de e0 de de ff de ff e0 ff e0 e0 ff de e0 ff de e0 e0 ff ff e0 ff ff de ff de ff e0 e0 ff de de e0 ff ff ff ff e0 de e0 de ff e0 de ff ff de e0 ff ff ff e0 de e0 ff ff ff de e0 e0 ff ff ff de e0 ff de de e0 ff ff de e0 ff de ff ff ff ff e0 de ff e0 e0 e0 e0 de de ff ff de ff de de de e0 e0 ff e0 ff e0 de e0 de e0 ff ff ff ff de de de de e0 ff de e0 de e0 ff ff de ff de de e0 e0 e0 ff de ff ff e0 ff e0 e0 de de e0 e0 ff de e0 de ff ff ff e0 e0 ff de ff e0 ff de de ff ff e0 ff ff e0 de de e0 ff ff e0 de e0 ff de e0 e0 de e0 e0 e0 de ff ff ff ff de ff ff de ff e0 ff ff ff e0 de ff ff e0 e0 ff ff e0 e0 ff ff e0 de de e0 e0 ff de ff ff de e0 ff e0 ff e0 e0 ff e0 e0 de e0 ff e0 ff de e0 e0 ff ff e0 ff e0 de de ff e0 ff de de e0 de e0 de e0 e0 e0 e0 e0 de de de e0 ff e0 de de de de de ff ff de de ff de ff ff ff ff ff ff e0 e0 ff de ff ff de ff de e0 ff de ff ff de e0 e0 e0 ff e0 e0 ff de e0 de e0 ff e0 de e0 de ff ff ff ff ff e0 ff de ff ff ff de de de de de de e0 e0 ff de ff ff e0 ff e0 ff e0 ff e0 e0 de de ff e0 e0 e0 de e0 e0 e0 e0 de e0 e0 ff ff de de e0 e0 e0 de e0 de de de ff e0 e0 ff e0 e0 e0 de ff ff de ff ff de ff e0 e0 e0 e0 ff e0 e0 ff e0 e0 de de e0 de e0 e0 ff e0 de e0 ff de de e0 e0 de ff ff ff ff ff e0 ff de e0 ff ff e0 e0 e0 ff de e0 ff de e0 e0 de de e0 ff e0 ff e0 ff e0 de e0 ff e0 ff e0 ff e0 e0 e0 e0 e0 de ff de ff de ff e0 ff e0 de ff ff e0 e0 de e0 ff e0 e0 ff e0 de de e0 e0 de e0 ff ff ff e0 de ff ff ff ff e0 de e0 e0 de ff ff de ff de ff e0 ff e0 e0 e0 ff ff ff de ff ff e0 de ff ff ff ff ff ff e0 e0 ff ff ff ff ff e0 e0 e0 de e0 de ff ff e0 e0 ff e0 e0 de de ff ff ff ff ff de de de ff e0 de e0 ff e0 ff ff e0 de ff e0 e0 ff e0 e0 e0 e0 e0 de ff e0 e0 e0 e0 e0 ff e0 de ff ff e0 ff de de e0 de ff ff e0 e0 e0 ff de de e0 e0 e0 ff e0 ff de ff de e0 ff de de e0 e0 de de e0 e0 ff ff e0 ff de de de de de ff de e0 ff de de ff de ff ff ff ff de ff de ff e0 ff de de ff ff ff e0 ff ff e0 ff ff ff ff ff ff de e0 e0 de e0 e0 de ff ff ff ff de ff de ff de e0 de e0 e0 ff e0 ff ff ff de de ff de ff ff e0 e0 e0 de ff ff de e0 de de de de e0 de ff e0 e0 e0 de e0 e0 e0 ff e0 e0 ff ff de ff de ff ff ff e0 e0 ff de e0 ff ff e0 ff ff e0 de ff e0 de ff ff e0 e0 de ff ff ff ff ff de e0 e0 e0 e0 de e0 e0 e0
*/
| 52 | 2,999 | 0.659464 |
6ad986f39ce7db288cc2fb3c0e56858e45ba9480 | 533 | asm | Assembly | programs/oeis/154/A154949.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/154/A154949.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/154/A154949.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A154949: Diagonal sums of Riordan array A154948.
; 1,1,3,5,10,18,34,62,115,211,389,715,1316,2420,4452,8188,15061,27701,50951,93713,172366,317030,583110,1072506,1972647,3628263,6673417,12274327,22576008,41523752,76374088,140473848,258371689,475219625
lpb $0
mov $2,$0
sub $0,2
seq $2,232508 ; Number of (n+1) X (1+1) 0..2 arrays with every element next to itself plus and minus one within the range 0..2 horizontally, diagonally or antidiagonally, with no adjacent elements equal.
add $1,$2
lpe
div $1,4
add $1,1
mov $0,$1
| 41 | 205 | 0.744841 |
41e916199ab13652fa6de16d22c4089cf150fb69 | 2,232 | asm | Assembly | Driver/Video/Dumb/HGC/hgcTables.asm | steakknife/pcgeos | 95edd7fad36df400aba9bab1d56e154fc126044a | [
"Apache-2.0"
] | 504 | 2018-11-18T03:35:53.000Z | 2022-03-29T01:02:51.000Z | Driver/Video/Dumb/HGC/hgcTables.asm | steakknife/pcgeos | 95edd7fad36df400aba9bab1d56e154fc126044a | [
"Apache-2.0"
] | 96 | 2018-11-19T21:06:50.000Z | 2022-03-06T10:26:48.000Z | Driver/Video/Dumb/HGC/hgcTables.asm | steakknife/pcgeos | 95edd7fad36df400aba9bab1d56e154fc126044a | [
"Apache-2.0"
] | 73 | 2018-11-19T20:46:53.000Z | 2022-03-29T00:59:26.000Z |
COMMENT }%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
Copyright (c) GeoWorks 1988 -- All Rights Reserved
PROJECT: PC GEOS
MODULE: Video driver
FILE: hgcTables.asm
AUTHOR: Tony Requist
REVISION HISTORY:
Name Date Description
---- ---- -----------
Tony 10/88 initial version
jeremy 5/91 Added support for HGC compatible cards.
DESCRIPTION:
This file contains a few tables used by the HGC screen driver.
$Id: hgcTables.asm,v 1.1 97/04/18 11:42:36 newdeal Exp $
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%}
;-----------------------------------------------------------------------------
; Tables for HGC Initialization
;-----------------------------------------------------------------------------
BIOSData label byte
db 7 ; CRT Mode
dw 80 ; CRT Columns
dw 8000h ; CRT Length
dw 0 ; CRT Start
dw 8 dup (0) ; Cursor position
dw 0 ; Cursor mode
db 0 ; Active Page
dw CRTC_ADDRESS ; CRT Controller Address
db 0ah ; CRT Mode Set
db 0 ; CRT Palette (unused)
EndBIOSData label byte
BIOS_DATA_LENGTH = EndBIOSData - BIOSData
CRTCParams label word
db 35h ; CRTC_REG_HORIZ_TOTAL
db 2dh ; CRTC_REG_HORIZ_DISPLAYED
db 2eh ; CRTC_REG_HORIZ_SYNC_POS
db 07h ; CRTC_REG_HORIZ_SYNC_WIDTH
db 5bh ; CRTC_REG_VERT_TOTAL
db 02h ; CRTC_REG_VERT_ADJUST
db 57h ; CRTC_REG_VERT_DISPLAYED
db 57h ; CRTC_REG_VERT_SYNC_POS
db 02h ; CRTC_REG_INTERLACE_MODE
db 03h ; CRTC_REG_MAX_SCAN_LINE
; db 00h ; CRTC_REG_CURSOR_START
; db 00h ; CRTC_REG_CURSOR_END
EndCRTCParams label word
CRTC_PARAMS_LENGTH = EndCRTCParams - CRTCParams
VideoMisc segment resource
; this table holds the offsets to the test routines for the devices
vidTestRoutines label nptr
nptr offset VidTestHGC ; VD_HERCULES_HGC
nptr offset VidTestHGCCompat ; VD_HERCULES_HGC_COMPAT
nptr offset VidTestHGC ; VD_HERCULES_HGC_INVERSE
; this table holds the offsets to the test routines for the devices
vidSetRoutines label nptr
nptr offset VidSetHGC ; VD_HERCULES_HGC
nptr offset VidSetHGC ; VD_HERCULES_HGC_COMPAT
nptr offset VidSetInverseHGC ; VD_HERCULES_HGC_INVERSE
VideoMisc ends
| 28.253165 | 79 | 0.634409 |
26e2e69b298002b3d2f768337fce3d5fed6192ff | 303 | asm | Assembly | programs/oeis/047/A047244.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/047/A047244.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/047/A047244.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A047244: Numbers that are congruent to {0, 2, 3} mod 6.
; 0,2,3,6,8,9,12,14,15,18,20,21,24,26,27,30,32,33,36,38,39,42,44,45,48,50,51,54,56,57,60,62,63,66,68,69,72,74,75,78,80,81,84,86,87,90,92,93,96,98,99,102,104,105,108,110,111,114,116,117,120,122,123
mov $1,$0
mul $0,2
mod $1,3
trn $1,1
sub $0,$1
| 33.666667 | 196 | 0.646865 |
f2bd6cf73a6f948df5bc2ee7051e3332e31ec318 | 639 | asm | Assembly | CPU/functions/memory/mips1.asm | SilenceX12138/MIPS-Microsystems | d389b706b0930151a710b544db436c2883af958b | [
"MIT"
] | 55 | 2021-09-06T12:12:47.000Z | 2022-01-15T04:30:53.000Z | CPU/functions/memory/mips1.asm | SilenceX12138/MIPS-Microsystems | d389b706b0930151a710b544db436c2883af958b | [
"MIT"
] | null | null | null | CPU/functions/memory/mips1.asm | SilenceX12138/MIPS-Microsystems | d389b706b0930151a710b544db436c2883af958b | [
"MIT"
] | null | null | null | #cal_set={add,sub,or,and,sll,sllv,srl,srlv}
#Timer 0x7f00-0x7f0b
#UART 0x7f10-0x7f2b
#Switch 0x7f2c-0x7f33
#LED 0x7f34-0x7f37
#Tube 0x7f38-0x7f3f
#Key 0x7f40-0x7f43
.text
initial:
li $t0 0xfc01
mtc0 $t0, $12
wait_data:
j wait_data
nop
.ktext 0x4180
lw $k0,0x7f2c($0) #use $k0 as A
sll $k0,$k0,2 #align
srl $k0,$k0,2
lw $k1,0x7f30($0) #use $k1 as B
lw $t1,0x7f40($0) #use $t1 as key
beq $t1,1,write
nop
beq $t1,2,show
nop
j return
nop
write:
sw $k1,0x7f38($0)
sw $k1,0($k0)
j return
nop
show:
lw $t2,0($k0)
sw $t2,0x7f38($0)
j return
nop
return:
eret
| 12.78 | 43 | 0.599374 |
4a02c63976635935a99c8def6dca0d3bb8bf3d05 | 7,764 | asm | Assembly | private/ntos/dll/i386/emlsbcd.asm | King0987654/windows2000 | 01f9c2e62c4289194e33244aade34b7d19e7c9b8 | [
"MIT"
] | 17 | 2020-11-13T13:42:52.000Z | 2021-09-16T09:13:13.000Z | base/ntdll/i386/emlsbcd.asm | sancho1952007/Windows-Server-2003 | 5c6fe3db626b63a384230a1aa6b92ac416b0765f | [
"Unlicense"
] | 2 | 2020-10-19T08:02:06.000Z | 2020-10-19T08:23:18.000Z | base/ntdll/i386/emlsbcd.asm | sancho1952007/Windows-Server-2003 | 5c6fe3db626b63a384230a1aa6b92ac416b0765f | [
"Unlicense"
] | 14 | 2020-11-14T09:43:20.000Z | 2021-08-28T08:59:57.000Z | subttl emlsbcd.asm - FBSTP and FBLD instructions
page
;*******************************************************************************
;emlsbcd.asm - FBSTP and FBLD instructions
;
; Microsoft Confidential
;
; Copyright (c) Microsoft Corporation 1991
; All Rights Reserved
;
;Purpose:
; FBSTP and FBLD instructions.
;
; These routines convert between 64-bit integer and 18-digit packed BCD
; format. They work by splitting the number being converted in half
; and converting the two halves separately. This works well because
; 9 decimal digits fit nicely within 30 binary bits, so converion of
; each half is strictly a 32-bit operation.
;
;Inputs:
; edi = [CURstk]
; dseg:esi = pointer to memory operand
;
;Revision History:
;
; [] 09/05/91 TP Initial 32-bit version.
;
;*******************************************************************************
;******
eFBLD:
;******
mov eax,dseg:[esi+5] ;Get high 8 digits
or eax,eax ;Anything there?
jz HighDigitsZero
mov ecx,8
call ReadDigits ;Convert first 8 digits to binary
mov eax,dseg:[esi+1] ;Get next 8 digits
xor edi,edi
shld edi,eax,4 ;Shift ninth digit into edi
imul ebx,10
add edi,ebx ;Accumulate ninth digit
SecondNineDigits:
xor ebx,ebx ;In case eax==0
shl eax,4 ;Keep digits left justified
jz LastTwoDigits
mov ecx,7
call ReadDigits ;Convert next 7 digits to binary
LastTwoDigits:
mov al,dseg:[esi] ;Get last two digits
shl eax,24 ;Left justify
mov ecx,2
call InDigitLoop ;Accumulate last two digits
;edi = binary value of high 9 digits
;ebx = binary value of low 9 digits
mov eax,1000000000 ;One billion: shift nine digits left
mul edi ;Left shift 9 digits. 9 cl. if edi==0
add ebx,eax ;Add in low digits
adc edx,0
BcdReadyToNorm:
;edx:ebx = integer converted to binary
mov eax,dseg:[esi+6] ;Get sign to high bit of eax
mov esi,ebx
mov ebx,edx
mov edi,EMSEG:[CURstk]
;mantissa in ebx:esi, sign in high bit of eax
;edi = [CURstk]
jmp NormQuadInt ;in emload.asm
HighDigitsZero:
mov eax,dseg:[esi+1] ;Get next 8 digits
or eax,eax ;Anything there?
jz CheckLastTwo
xor edi,edi
shld edi,eax,4 ;Shift ninth digit into edi
jmp SecondNineDigits
CheckLastTwo:
mov bl,dseg:[esi] ;Get last two digits
or bl,bl
jz ZeroBCD
mov al,bl
shr al,4 ;Bring down upper digit
imul eax,10
and ebx,0FH ;Keep lowest digit only
add ebx,eax
xor edx,edx
jmp BcdReadyToNorm
ZeroBCD:
mov ecx,bTAG_ZERO ;Exponent is zero
mov ch,dseg:[esi+9] ;Get sign byte to ch
xor ebx,ebx
mov esi,ebx
;mantissa in ebx:esi, exp/sign in ecx
;edi = [CURstk]
jmp FldCont ;in emload.asm
;*** ReadDigits
;
;Inputs:
; eax = packed BCD digits, left justified, non-zero
; ecx = no. of digits, 7 or 8
;Outputs:
; ebx = number
SkipZeroDigits:
sub ecx,3
shl eax,12
ReadDigits:
;We start by scanning off leading zeros. This costs 16 cl./nybble in
;the ScanZero loop. To reduce this cost for many leading zeros, we
;check for three leading zeros at a time. Adding this test saves
;26 cl. for 3 leading zeros, 57 cl. for 6 leading zeros, at a cost
;of only 5 cl. if less than 3 zeros. We choose 3 at a time so we
;can repeat it once (there are never more than 7 zeros).
test eax,0FFF00000H ;Check first 3 nybbles for zero
jz SkipZeroDigits
xor ebx,ebx
ScanZero:
;Note that bsr is 3 cl/bit, or 12 cl/nybble. Add in the overhead and
;this loop of 16 cl/nybble is cheaper for the 1 - 3 digits it does.
dec ecx
shld ebx,eax,4 ;Shift digit into ebx
rol eax,4 ;Left justify **Doesn't affect ZF!**
jz ScanZero ;Skip to next digit if zero
jecxz ReadDigitsX
InDigitLoop:
;eax = digits to convert, left justified
;ebx = result accumulation
;ecx = number of digits to convert
xor edx,edx
shld edx,eax,4 ;Shift digit into edx
shl eax,4 ;Keep digits left justified
imul ebx,10 ;Only 10 clocks on 386!
add ebx,edx ;Accumulate number
dec ecx
jnz InDigitLoop
ReadDigitsX:
ret
;*******************************************************************************
ChkInvalidBCD:
ja SetInvalidBCD
cmp edi,0A7640000H ;(1000000000*1000000000) and 0ffffffffh
jb ValidBCD
SetInvalidBCD:
mov EMSEG:[CURerr],Invalid
InvalidBCD:
test EMSEG:[CWmask],Invalid ;Is it masked?
jz ReadDigitsX ;No--leave memory unchanged
;Store Indefinite
mov dword ptr dseg:[esi],0
mov dword ptr dseg:[esi+4],0
mov word ptr dseg:[esi+8],-1 ;0FF00000000H for packed BCD indefinite
jmp PopStack ;in emstore.asm
;******
eFBSTP:
;******
call RoundToInteger ;Get integer in ebx:edi, sign in ch
jc InvalidBCD
cmp ebx,0DE0B6B3H ;(1000000000*1000000000) shr 32
jae ChkInvalidBCD
ValidBCD:
and ch,bSign
mov dseg:[esi+9],ch ;Fill in sign byte
mov edx,ebx
mov eax,edi ;Get number to edx:eax for division
mov ebx,1000000000
div ebx ;Break into two 9-digit halves
xor ecx,ecx ;Initial digits
mov edi,eax ;Save quotient
mov eax,edx
or eax,eax
jz SaveLowBCD
call WriteDigits
shrd ecx,eax,4 ;Pack 8th digit
xor al,al
shl eax,20 ;Move digit in ah to high end
SaveLowBCD:
mov dseg:[esi],ecx ;Save low 8 digits
mov ecx,eax ;Get ready for next 8 digits
mov eax,edi
or eax,eax
jz ZeroHighBCD
call WriteDigits
shl ah,4 ;Move digit to upper nybble
or al,ah ;Combine last two digits
SaveHighBCD:
mov dseg:[esi+4],ecx ;Save lower 8 digits
mov dseg:[esi+8],al
jmp PopStack
ZeroHighBCD:
shr ecx,28 ;Position 9th digit
jmp SaveHighBCD
;*** WriteDigits
;
;Inputs:
; eax = binary number < 1,000,000,000 and > 0
; ecx = Zero or had one BCD digit left justified
;Purpose:
; Convert binary integer to BCD.
;
; The time required for the DIV instruction is dependent on operand
; size, at 6 + (no. of bits) clocks for 386. (In contrast, multiply
; by 10 as used in FBLD/ReadDigits above takes the same amount of
; time regardless of operand size--only 10 clocks.)
;
; The easy way to do this conversion would be to repeatedly do a
; 32-bit division by 10 (at 38 clocks/divide). Instead, the number
; is broken down so that mostly 8-bit division is used (only 14 clocks).
; AAM (17 clocks) is also used to save us from having to load the
; constant 10 and zero ah. AAM is faster than DIV on the 486sx.
;
;Outputs:
; ecx has seven more digits packed into it (from left)
; ah:al = most significant two digits (unpacked)
;esi,edi preserved
WriteDigits:
;eax = binary number < 1,000,000,000
cdq ;Zero edx
mov ebx,10000
div ebx ;Break into 4-digit and 5-digit pieces
mov bl,100
or edx,edx
jz ZeroLowDigits
xchg edx,eax ;Get 4-digit remainder to eax
;Compute low 4 digits
; 0 < eax < 10000
div bl ;Get two 2-digit pieces. 14cl on 386
mov bh,al ;Save high 2 digits
mov al,ah ;Get low digits
aam
shl ah,4 ;Move digit to upper nybble
or al,ah
shrd ecx,eax,8
mov al,bh ;Get high 2 digits
aam
shl ah,4 ;Move digit to upper nybble
or al,ah
shrd ecx,eax,8
;Compute high 5 digits
mov eax,edx ;5-digit quotient to eax
or eax,eax
jz ZeroHighDigits
ConvHigh5:
cdq ;Zero edx
shld edx,eax,16 ;Put quotient in dx:ax
xor bh,bh ;bx = 100
div bx ;Get 2- and 3-digit pieces. 22cl on 386
xchg edx,eax ;Save high 3 digits, get log 2 digits
aam
shl ah,4 ;Move digit to upper nybble
or al,ah
shrd ecx,eax,8
mov eax,edx ;Get high 3 digits
mov bl,10
div bl
mov bl,ah ;Remainder is next digit
shrd ecx,ebx,4
aam ;Get last two digits
;Last two digits in ah:al
ret
ZeroLowDigits:
shr ecx,16
jmp ConvHigh5
ZeroHighDigits:
shr ecx,12
ret
| 27.728571 | 81 | 0.664219 |
0aec143b8483671dd716c87f7f2ea602540eca0b | 2,926 | asm | Assembly | programs/oeis/134/A134163.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/134/A134163.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/134/A134163.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A134163: 1 + 12*n + 81*n^3 + n*(105*n + 81*n^3)/2.
; 1,187,1531,5977,16441,36811,71947,127681,210817,329131,491371,707257,987481,1343707,1788571,2335681,2999617,3795931,4741147,5852761,7149241,8650027,10375531,12347137,14587201,17119051,19966987,23156281,26713177,30664891,35039611,39866497,45175681,50998267,57366331,64312921,71872057,80078731,88968907,98579521,108948481,120114667,132117931,144999097,158799961,173563291,189332827,206153281,224070337,243130651,263381851,284872537,307652281,331771627,357282091,384236161,412687297,442689931,474299467,507572281,542565721,579338107,617948731,658457857,700926721,745417531,791993467,840718681,891658297,944878411,1000446091,1058429377,1118897281,1181919787,1247567851,1315913401,1387029337,1460989531,1537868827,1617743041,1700688961,1786784347,1876107931,1968739417,2064759481,2164249771,2267292907,2373972481,2484373057,2598580171,2716680331,2838761017,2964910681,3095218747,3229775611,3368672641,3512002177,3659857531,3812332987,3969523801,4131526201,4298437387,4470355531,4647379777,4829610241,5017148011,5210095147,5408554681,5612630617,5822427931,6038052571,6259611457,6487212481,6720964507,6960977371,7207361881,7460229817,7719693931,7985867947,8258866561,8538805441,8825801227,9119971531,9421434937,9730311001,10046720251,10370784187,10702625281,11042366977,11390133691,11746050811,12110244697,12482842681,12863973067,13253765131,13652349121,14059856257,14476418731,14902169707,15337243321,15781774681,16235899867,16699755931,17173480897,17657213761,18151094491,18655264027,19169864281,19695038137,20230929451,20777683051,21335444737,21904361281,22484580427,23076250891,23679522361,24294545497,24921471931,25560454267,26211646081,26875201921,27551277307,28240028731,28941613657,29656190521,30383918731,31124958667,31879471681,32647620097,33429567211,34225477291,35035515577,35859848281,36698642587,37552066651,38420289601,39303481537,40201813531,41115457627,42044586841,42989375161,43949997547,44926629931,45919449217,46928633281,47954360971,48996812107,50056167481,51132608857,52226318971,53337481531,54466281217,55612903681,56777535547,57960364411,59161578841,60381368377,61619923531,62877435787,64154097601,65450102401,66765644587,68100919531,69456123577,70831454041,72227109211,73643288347,75080191681,76538020417,78016976731,79517263771,81039085657,82582647481,84148155307,85735816171,87345838081,88978430017,90633801931,92312164747,94013730361,95738711641,97487322427,99259777531,101056292737,102877084801,104722371451,106592371387,108487304281,110407390777,112352852491,114323912011,116320792897,118343719681,120392917867,122468613931,124571035321,126700410457,128856968731,131040940507,133252557121,135492050881,137759655067,140055603931,142380132697,144733477561,147115875691,149527565227,151968785281,154439775937,156940778251
mov $1,2
lpb $0,1
mov $3,$0
sub $0,1
mov $2,54
mul $2,$3
add $1,$2
lpe
add $1,2
pow $1,2
div $1,108
mul $1,6
add $1,1
| 172.117647 | 2,743 | 0.882775 |
a0f4b5c0a6366e7c5e320ebf93409eaea266c9b3 | 5,351 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_sm_/i7-8650U_0xd2_notsx.log_2_60.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_sm_/i7-8650U_0xd2_notsx.log_2_60.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_sm_/i7-8650U_0xd2_notsx.log_2_60.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r12
push %r8
push %rbx
push %rcx
push %rdi
push %rsi
lea addresses_UC_ht+0x1705, %rsi
lea addresses_A_ht+0x197c5, %rdi
clflush (%rdi)
xor $16917, %r8
mov $2, %rcx
rep movsb
nop
add $58639, %rbx
lea addresses_D_ht+0xf713, %r11
clflush (%r11)
nop
nop
nop
nop
nop
dec %r8
and $0xffffffffffffffc0, %r11
movaps (%r11), %xmm2
vpextrq $1, %xmm2, %rcx
cmp %rbx, %rbx
lea addresses_A_ht+0x6285, %r11
nop
nop
add %r12, %r12
movups (%r11), %xmm6
vpextrq $1, %xmm6, %rcx
nop
sub $19636, %rdi
lea addresses_A_ht+0xd7d, %rdi
nop
nop
nop
nop
nop
and %r11, %r11
mov $0x6162636465666768, %r8
movq %r8, (%rdi)
nop
nop
nop
nop
nop
xor %r12, %r12
lea addresses_WT_ht+0x13915, %rcx
nop
nop
nop
nop
sub $793, %rsi
movb (%rcx), %bl
nop
nop
nop
cmp $35823, %rbx
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %r8
pop %r12
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r13
push %r14
push %r8
push %r9
push %rax
push %rbp
// Store
lea addresses_normal+0x15d05, %r9
nop
nop
nop
nop
and $52536, %r13
mov $0x5152535455565758, %r10
movq %r10, (%r9)
nop
xor %r9, %r9
// Store
lea addresses_A+0xe171, %rbp
add $65044, %rax
movw $0x5152, (%rbp)
nop
nop
nop
nop
inc %r8
// Store
lea addresses_PSE+0xae6d, %rbp
nop
nop
nop
dec %r8
mov $0x5152535455565758, %r13
movq %r13, %xmm0
vmovups %ymm0, (%rbp)
nop
nop
and $2058, %r8
// Load
lea addresses_UC+0xed05, %r13
nop
nop
nop
nop
inc %r14
mov (%r13), %r8w
nop
nop
nop
nop
nop
inc %r8
// Store
lea addresses_RW+0x18b29, %rax
cmp $51184, %r9
movb $0x51, (%rax)
nop
nop
nop
sub $59677, %r9
// Store
lea addresses_PSE+0x16c, %r10
sub $45440, %r9
mov $0x5152535455565758, %rax
movq %rax, (%r10)
nop
nop
nop
nop
dec %r8
// Store
lea addresses_PSE+0xb9ed, %r9
nop
nop
nop
cmp %r14, %r14
mov $0x5152535455565758, %r13
movq %r13, %xmm3
vmovups %ymm3, (%r9)
cmp %r10, %r10
// Store
lea addresses_A+0x15d05, %rax
dec %r8
movw $0x5152, (%rax)
nop
nop
nop
and $14114, %r8
// Store
lea addresses_normal+0x1b3c5, %r9
clflush (%r9)
nop
and $30427, %r10
mov $0x5152535455565758, %rbp
movq %rbp, %xmm0
movups %xmm0, (%r9)
nop
nop
nop
xor $16996, %r13
// Store
mov $0xc25, %rax
nop
nop
nop
nop
sub %r8, %r8
movb $0x51, (%rax)
nop
nop
nop
nop
nop
and $3150, %r8
// Load
lea addresses_RW+0x11505, %r9
nop
nop
nop
and %r10, %r10
mov (%r9), %ax
nop
nop
nop
nop
cmp $53453, %r8
// Store
lea addresses_WT+0x2723, %rbp
sub %rax, %rax
movb $0x51, (%rbp)
nop
nop
nop
xor %rbp, %rbp
// Store
lea addresses_A+0x4333, %r9
nop
nop
nop
nop
and $36099, %rbp
movw $0x5152, (%r9)
nop
xor $51076, %r10
// Faulty Load
lea addresses_A+0x15d05, %r9
nop
xor %r10, %r10
mov (%r9), %r14w
lea oracles, %r8
and $0xff, %r14
shlq $12, %r14
mov (%r8,%r14,1), %r14
pop %rbp
pop %rax
pop %r9
pop %r8
pop %r14
pop %r13
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'type': 'addresses_A', 'size': 32, 'AVXalign': True, 'NT': False, 'congruent': 0, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_normal', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 11, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_A', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_PSE', 'size': 32, 'AVXalign': False, 'NT': False, 'congruent': 3, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_UC', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 10, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_RW', 'size': 1, 'AVXalign': False, 'NT': False, 'congruent': 2, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_PSE', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_PSE', 'size': 32, 'AVXalign': False, 'NT': False, 'congruent': 2, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_A', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': True}}
{'OP': 'STOR', 'dst': {'type': 'addresses_normal', 'size': 16, 'AVXalign': False, 'NT': False, 'congruent': 6, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_P', 'size': 1, 'AVXalign': False, 'NT': True, 'congruent': 4, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_RW', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 11, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WT', 'size': 1, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_A', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 1, 'same': False}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'type': 'addresses_A', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': True}}
<gen_prepare_buffer>
{'OP': 'REPM', 'src': {'type': 'addresses_UC_ht', 'congruent': 9, 'same': False}, 'dst': {'type': 'addresses_A_ht', 'congruent': 5, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_D_ht', 'size': 16, 'AVXalign': True, 'NT': False, 'congruent': 1, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_A_ht', 'size': 16, 'AVXalign': False, 'NT': False, 'congruent': 5, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_A_ht', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 1, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_WT_ht', 'size': 1, 'AVXalign': False, 'NT': False, 'congruent': 4, 'same': True}}
{'52': 2}
52 52
*/
| 19.110714 | 147 | 0.634835 |
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