hexsha stringlengths 40 40 | size int64 6 1.05M | ext stringclasses 3 values | lang stringclasses 1 value | max_stars_repo_path stringlengths 4 232 | max_stars_repo_name stringlengths 7 106 | max_stars_repo_head_hexsha stringlengths 40 40 | max_stars_repo_licenses listlengths 1 7 | max_stars_count int64 1 33.5k ⌀ | max_stars_repo_stars_event_min_datetime stringlengths 24 24 ⌀ | max_stars_repo_stars_event_max_datetime stringlengths 24 24 ⌀ | max_issues_repo_path stringlengths 4 232 | max_issues_repo_name stringlengths 7 106 | max_issues_repo_head_hexsha stringlengths 40 40 | max_issues_repo_licenses listlengths 1 7 | max_issues_count int64 1 37.5k ⌀ | max_issues_repo_issues_event_min_datetime stringlengths 24 24 ⌀ | max_issues_repo_issues_event_max_datetime stringlengths 24 24 ⌀ | max_forks_repo_path stringlengths 4 232 | max_forks_repo_name stringlengths 7 106 | max_forks_repo_head_hexsha stringlengths 40 40 | max_forks_repo_licenses listlengths 1 7 | max_forks_count int64 1 12.6k ⌀ | max_forks_repo_forks_event_min_datetime stringlengths 24 24 ⌀ | max_forks_repo_forks_event_max_datetime stringlengths 24 24 ⌀ | content stringlengths 6 1.05M | avg_line_length float64 1.16 19.7k | max_line_length int64 2 938k | alphanum_fraction float64 0 1 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
151cb784afa32c50f021a7ce6ef61e516fa0f157 | 389 | asm | Assembly | programs/oeis/264/A264724.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/264/A264724.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/264/A264724.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A264724: a(n) = n^2 + phi(n).
; 2,5,11,18,29,38,55,68,87,104,131,148,181,202,233,264,305,330,379,408,453,494,551,584,645,688,747,796,869,908,991,1040,1109,1172,1249,1308,1405,1462,1545,1616,1721,1776,1891,1956,2049,2138,2255,2320,2443,2520
mov $1,$0
add $0,2
mov $2,$1
mul $1,$0
seq $2,10 ; Euler totient function phi(n): count numbers <= n and prime to n.
add $1,$2
mov $0,$1
add $0,1
| 32.416667 | 209 | 0.673522 |
8aa2e34ba0cb0c253b4fbf895008d36dc693b148 | 24 | asm | Assembly | src/main/fragment/mos6502-common/vbuaa=vbuxx_minus_vbuaa.asm | jbrandwood/kickc | d4b68806f84f8650d51b0e3ef254e40f38b0ffad | [
"MIT"
] | 2 | 2022-03-01T02:21:14.000Z | 2022-03-01T04:33:35.000Z | src/main/fragment/mos6502-common/vbuaa=vbuxx_minus_vbuaa.asm | jbrandwood/kickc | d4b68806f84f8650d51b0e3ef254e40f38b0ffad | [
"MIT"
] | null | null | null | src/main/fragment/mos6502-common/vbuaa=vbuxx_minus_vbuaa.asm | jbrandwood/kickc | d4b68806f84f8650d51b0e3ef254e40f38b0ffad | [
"MIT"
] | null | null | null | sta $ff
txa
sec
sbc $ff
| 4.8 | 7 | 0.666667 |
f1660db51986554a853a73704319e4a44bb44ebb | 416 | asm | Assembly | oeis/178/A178129.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/178/A178129.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/178/A178129.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A178129: Partial sums of A050508.
; Submitted by Jon Maiga
; 0,2,8,23,47,87,147,224,328,463,623,821,1049,1322,1644,2004,2420,2896,3418,4007,4647,5361,6153,7004,7940,8940,10032,11220,12480,13843,15313,16863,18527,20276,22146,24141,26229,28449,30767,33224,35824,38530
mov $2,$0
mov $4,$0
lpb $2
mov $0,$4
sub $2,1
sub $0,$2
seq $0,50508 ; Golden rectangle numbers: n * A007067(n).
add $3,$0
lpe
mov $0,$3
| 27.733333 | 206 | 0.699519 |
22f3b8ab67c0273c2b9170d9472f6fd3296972ac | 375 | asm | Assembly | programs/oeis/104/A104199.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/104/A104199.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/104/A104199.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A104199: Lower bound on a straddle prime pair.
; 3,5,7,7,7,11,13,13,13,17,19,19,19,23,23,23,23,23,29,31,31,31,31,31,37,37,37,41,43,43,43,47,47,47,47,47,53,53,53,53,53,59,61,61,61,61,61,67,67,67,71,73,73,73,73,73,79,79,79,83,83,83,83,83,89,89,89,89,89,89,89
seq $0,73169 ; a(n)=A002808(n)-n, difference between n-th composite and n.
sub $0,2
seq $0,40 ; The prime numbers.
| 53.571429 | 209 | 0.674667 |
b5c10f773f17338bc88fdc9256d143f006e03bee | 762 | asm | Assembly | oeis/278/A278586.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/278/A278586.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/278/A278586.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A278586: Start with X = n^2. Repeatedly replace X with X - ceiling(X/n); a(n) is the number of steps to reach 0.
; Submitted by Stefano Spezia
; 1,3,5,8,11,14,17,21,24,28,32,36,40,44,49,53,57,62,66,71,75,80,84,90,94,99,103,109,113,118,123,128,133,139,143,149,154,159,164,170,175,180,185,191,196,201,207,212,217,223,229,234,240,246,251,256,262,268,273,279,284,290,296,302,308,313,319,325,330,336,342,348,354,360,366,372,377,384,389,395,401,407,413,419,425,431,437,443,449,456,461,467,474,480,486,492,498,504,510,517
add $0,1
mov $2,$0
mov $5,1
lpb $0
mov $3,$2
mul $3,2
dif $3,$0
sub $0,1
cmp $3,$2
sub $5,$2
sub $3,$5
mov $6,$0
cmp $6,0
add $0,$6
cmp $4,2
sub $4,1
div $5,$0
mul $5,$4
add $5,1
sub $5,$3
lpe
mov $0,$3
add $0,1
| 27.214286 | 371 | 0.636483 |
74252401c59535417225ea764ffbb8b153f59910 | 3,295 | asm | Assembly | scripts_br/items.asm | hansbonini/smd_beyondoasis | fa15eb880fba84a0a9e372e56cc0e77d0892444c | [
"MIT"
] | 2 | 2020-12-13T18:51:06.000Z | 2020-12-15T14:34:44.000Z | scripts_br/items.asm | hansbonini/smd_beyondoasis | fa15eb880fba84a0a9e372e56cc0e77d0892444c | [
"MIT"
] | null | null | null | scripts_br/items.asm | hansbonini/smd_beyondoasis | fa15eb880fba84a0a9e372e56cc0e77d0892444c | [
"MIT"
] | 1 | 2020-12-15T19:09:48.000Z | 2020-12-15T19:09:48.000Z | constant item_length(32)
constant item_column($20)
constant weapon_column($58)
constant item_counter_column($D0)
origin $003F3000
item_names:
gameItem(" ")
gameItem("ADAGA SIMPLES ")
gameItem("ESPADA ")
gameItem("SABRE ")
gameItem("ESPADA DA MORTE ")
gameItem("ESPADA OMEGA ")
gameItem("ARCO ")
gameItem("ARCO DE FOGO ")
gameItem("ARCO DE METAL ")
gameItem("BOMBA SIMPLES ")
gameItem("BOMBA MÉDIA ")
gameItem("BOMBA GRANDE ")
gameItem("ARCO ATÔMICO ")
gameItem(" CHAVE VERMELHA ")
gameItem(" CHAVE AZUL ")
gameItem(" CHAVE VERDE ")
gameItem(" CHAVE DE MADEIRA ")
gameItem(" AUMENTA O SEU NÍVEL EM +1 ")
gameItem("WATER ST ")
gameItem("FIRE ST. ")
gameItem("SHADOW S ")
gameItem("WOOD ST. ")
gameItem(" RECUPERA A SAÚDE ")
gameItem(" IMPULSO ")
gameItem(" RECUPERA A MAGIA ")
gameItem(" ESPECIAL ")
gameItem(" INVOCAR O ESPÍRITO DITTO ")
gameItem(" INVOCAR O ESPÍRITO EFREET ")
gameItem(" INVOCAR O ESPÍRITO SHADE ")
gameItem(" INVOCAR O ESPÍRITO BOW ")
gameItem(" RECUPERA A SAÚDE EM +1/4 ")
gameItem(" RECUPERA A SAÚDE EM +1/2 ")
gameItem(" RECUPERA A SAÚDE EM +3/4 ")
gameItem(" RECUPERA A SAÚDE AO MÁXIMO ")
gameItem(" RECUPERA A MAGIA EM +1/4 ")
gameItem(" RECUPERA A MAGIA EM +1/2 ")
gameItem(" RECUPERA A MAGIA EM +3/4 ")
gameItem(" RECUPERA A MAGIA AO MÁXIMO ")
gameItem(" RECUPERA A SAÚDE/MAGIA EM +1/4 ")
gameItem(" RECUPERA A SAÚDE/MAGIA EM +1/2 ")
gameItem(" RECUPERA A SAÚDE/MAGIA EM +3/4 ")
gameItem("RECUPERA A SAÚDE/MAGIA AO MÁXIMO")
gameItem("RECUPERA A SAÚDE/MAGIA AO MORRER")
gameItem(" ")
gameItem(" ")
gameItem(" ")
gameItem(" ")
gameItem(" ")
gameItem(" ")
gameItem(" ")
gameItem(" UM ESTRANHO E GRANDE CUBO ")
gameItem(" ")
gameItem(" ")
gameItem(" ")
gameItem(" ")
gameItem(" ")
gameItem(" ")
gameItem(" ")
gameItem(" ")
gameItem(" ")
gameItem(" ")
gameItem(" ")
gameItem(" ")
gameItem(" ")
db ENDSTRING | 45.763889 | 48 | 0.385432 |
fbe6ea6605b79ed52149166a13751d86cdb218a8 | 421 | asm | Assembly | oeis/344/A344957.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/344/A344957.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/344/A344957.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A344957: Positions of words in A341258 starting with 0 and ending with 1.
; Submitted by Simon Strandgaard
; 4,8,12,14,21,22,24,33,35,37,38,40,55,56,58,59,61,63,64,66,88,90,92,93,95,97,98,100,101,103,105,106,108,144,145,147,148,150,152,153,155,156,158,160,161,163,165,166,168,169,171,173,174,176,232,234,236
sub $2,$0
seq $0,344958 ; Positions of words in A344953 starting with 1 and ending with 0.
add $0,$2
sub $0,1
| 46.777778 | 200 | 0.724466 |
38b1fbbbfbc93e496fd34065d67797cc770292ce | 81 | asm | Assembly | data/maps/headers/CopycatsHouse2F.asm | opiter09/ASM-Machina | 75d8e457b3e82cc7a99b8e70ada643ab02863ada | [
"CC0-1.0"
] | 1 | 2022-02-15T00:19:44.000Z | 2022-02-15T00:19:44.000Z | data/maps/headers/CopycatsHouse2F.asm | opiter09/ASM-Machina | 75d8e457b3e82cc7a99b8e70ada643ab02863ada | [
"CC0-1.0"
] | null | null | null | data/maps/headers/CopycatsHouse2F.asm | opiter09/ASM-Machina | 75d8e457b3e82cc7a99b8e70ada643ab02863ada | [
"CC0-1.0"
] | null | null | null |
map_header CopycatsHouse2F, COPYCATS_HOUSE_2F, REDS_HOUSE_2, 0
end_map_header
| 20.25 | 63 | 0.851852 |
c4019e92b14714d656cbec0297480cc97d0cefd4 | 359 | asm | Assembly | programs/oeis/115/A115102.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/115/A115102.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/115/A115102.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A115102: a(0)=2, a(1)=8, a(n)=a(n-1)+2*a(n-2).
; 2,8,12,28,52,108,212,428,852,1708,3412,6828,13652,27308,54612,109228,218452,436908,873812,1747628,3495252,6990508,13981012,27962028,55924052,111848108,223696212,447392428,894784852,1789569708,3579139412,7158278828
mov $1,2
pow $1,$0
mov $2,$0
mod $2,2
add $2,4
add $1,$2
mul $1,5
div $1,3
sub $1,7
mul $1,2
| 25.642857 | 215 | 0.707521 |
5df668d6fd43bb228321fcb59756d1f6c6decd43 | 407 | asm | Assembly | programs/oeis/023/A023505.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/023/A023505.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/023/A023505.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A023505: Least odd prime divisor of prime(n) - 1, or 1 if prime(n) - 1 is a power of 2.
; 1,1,1,3,5,3,1,3,11,7,3,3,5,3,23,13,29,3,3,5,3,3,41,11,3,5,3,53,3,7,3,5,17,3,37,3,3,3,83,43,89,3,5,3,7,3,3,3,113,3,29,7,3,5,1,131,67,3,3,5,3,73,3,5,3,79,3,3,173,3,11,179,3,3,3,191,97,3,5,3,11,3,5,3,3
seq $0,40 ; The prime numbers.
sub $0,2
seq $0,78701 ; Least odd prime factor of n, or 1 if no such factor exists.
| 58.142857 | 200 | 0.621622 |
316a16f25711da34f7067eda5cf550a48be67692 | 1,276 | asm | Assembly | maps/CeladonMansion2F.asm | Dev727/ancientplatinum | 8b212a1728cc32a95743e1538b9eaa0827d013a7 | [
"blessing"
] | 28 | 2019-11-08T07:19:00.000Z | 2021-12-20T10:17:54.000Z | maps/CeladonMansion2F.asm | Dev727/ancientplatinum | 8b212a1728cc32a95743e1538b9eaa0827d013a7 | [
"blessing"
] | 13 | 2020-01-11T17:00:40.000Z | 2021-09-14T01:27:38.000Z | maps/CeladonMansion2F.asm | Dev727/ancientplatinum | 8b212a1728cc32a95743e1538b9eaa0827d013a7 | [
"blessing"
] | 22 | 2020-05-28T17:31:38.000Z | 2022-03-07T20:49:35.000Z | CeladonMansion2F_MapScripts:
db 0 ; scene scripts
db 0 ; callbacks
CeladonMansion2FComputer:
jumptext CeladonMansion2FComputerText
CeladonMansion2FMeetingRoomSign:
jumptext CeladonMansion2FMeetingRoomSignText
CeladonMansion2FBookshelf:
jumpstd difficultbookshelf
CeladonMansion2FComputerText:
text "<PLAYER> turned on"
line "the PC."
para "…"
para "Someone was in the"
line "middle of compos-"
cont "ing an e-mail."
para "…I hope you'll"
line "come visit KANTO."
para "I think you'll be"
line "surprised at how"
para "much things have"
line "changed here."
para "You'll also see"
line "many #MON that"
para "aren't native to"
line "JOHTO."
para "To the PRODUCER"
para "…"
done
CeladonMansion2FMeetingRoomSignText:
text "GAME FREAK"
line "MEETING ROOM"
done
CeladonMansion2F_MapEvents:
db 0, 0 ; filler
db 4 ; warp events
warp_event 0, 0, CELADON_MANSION_1F, 4
warp_event 1, 0, CELADON_MANSION_3F, 2
warp_event 6, 0, CELADON_MANSION_3F, 3
warp_event 7, 0, CELADON_MANSION_1F, 5
db 0 ; coord events
db 3 ; bg events
bg_event 0, 3, BGEVENT_READ, CeladonMansion2FComputer
bg_event 5, 8, BGEVENT_UP, CeladonMansion2FMeetingRoomSign
bg_event 2, 3, BGEVENT_READ, CeladonMansion2FBookshelf
db 0 ; object events
| 19.044776 | 61 | 0.747649 |
58aaf8c4c774c5adfa37d8811bf71a9f7a9fab25 | 3,119 | asm | Assembly | iod/con2/ql/recol.asm | olifink/smsqe | c546d882b26566a46d71820d1539bed9ea8af108 | [
"BSD-2-Clause"
] | null | null | null | iod/con2/ql/recol.asm | olifink/smsqe | c546d882b26566a46d71820d1539bed9ea8af108 | [
"BSD-2-Clause"
] | null | null | null | iod/con2/ql/recol.asm | olifink/smsqe | c546d882b26566a46d71820d1539bed9ea8af108 | [
"BSD-2-Clause"
] | null | null | null | ; Recolour a window v0.01 1991 Tony Tebby
;
; 2009-06-06 0.01 Fixed mode 8 (MK)
;
; QL Colour
;
; Registers:
; Entry Exit
; D0 0
; D1-D7 smashed
; A0 CDB preserved
; A1 recolour list smashed
; A2-A5 smashed
;
; All other registers preserved
;
section con
include 'dev8_keys_con'
include 'dev8_keys_sys'
xdef cn_recol
cn_recol
move.b pt_dmode(a3),d4 ; get mode byte now (a3 is used later)
movem.w sd_xmin(a0),d0-d3
move.l sd_scrb(a0),a3
mulu sd_linel(a0),d1
add.l d1,a3 ; start of line
move.l d0,d1
lsr.w #3,d1 ; start pixel -> words
add.w d1,d1 ; -> bytes
add.w d1,a3 ; start address
not.w d0 ; bit number
and.w #7,d0 ; 0 to 7
mulu sd_linel(a0),d3 ; ... number of lines
lea (a3,d3.l),a2 ; off end line
cmp.b #ptm.ql8,d4 ; which mode are we in?
beq.s cnr_8row
cnr_4row
move.l a3,a4 ; running pointers
move.w d0,d4 ; pixel number
move.w d0,d5
addq.w #8,d5
move.w d2,d6 ; pixel counter
cnr_4wrd
move.w (a4),d1 ; our word
cnr_4pix
bclr d5,d1
bne.s cnr_44 ; 4 or 7
bclr d4,d1
bne.s cnr_42 ; 2
move.b (a1),d7 ; = 0
bra.s cnr_4spx
cnr_42
move.b 2(a1),d7 ; = 2
bra.s cnr_4spx
cnr_44
bclr d4,d1
bne.s cnr_47
move.b 4(a1),d7 ; = 4
bra.s cnr_4spx
cnr_47
move.b 7(a1),d7 ; = 7
cnr_4spx
lsr.w #2,d7
bcc.s cnr_4hb
bset d4,d1 ; set lower pixel
cnr_4hb
lsr.w #1,d7
bcc.s cnr_4npx ; set higher pixel
bset d5,d1
cnr_4npx
subq.w #1,d6
ble.s cnr_4nrw
subq.w #1,d5 ; next pixel
subq.w #1,d4
bge.s cnr_4pix ; there is one
move.w d1,(a4)+ ; save word
moveq #15,d5 ; and re-start pixel count
moveq #7,d4
bra.s cnr_4wrd
cnr_4nrw
move.w d1,(a4)
add.w sd_linel(a0),a3 ; next row
cmp.l a2,a3
blt.s cnr_4row
bra.l cnr_ok
cnr_8row
move.l a3,a4 ; running pointers
move.w d0,d3
subq.w #1,d3
move.w d0,d4
move.w d0,d5
addq.w #8,d5
move.w d2,d6 ; pixel counter
cnr_8wrd
move.w (a4),d1 ; our word
cnr_8pix
bclr d5,d1
bne.s cnr_84 ; 4 - 7
bclr d4,d1
bne.s cnr_82 ; 2 - 3
bclr d3,d1
bne.s cnr_81
move.b (a1),d7 ; = 0
bra.s cnr_8spx
cnr_81
move.b 1(a1),d7 ; = 1
bra.s cnr_8spx
cnr_82
bclr d3,d1
bne.s cnr_83
move.b 2(a1),d7 ; = 2
bra.s cnr_8spx
cnr_83
move.b 3(a1),d7 ; = 3
bra.s cnr_8spx
cnr_84
bclr d4,d1
bne.s cnr_86
bclr d3,d1
bne.s cnr_85
move.b 4(a1),d7 ; = 4
bra.s cnr_8spx
cnr_85
move.b 5(a1),d7 ; = 5
bra.s cnr_8spx
cnr_86
bclr d3,d1
bne.s cnr_87
move.b 6(a1),d7 ; = 6
bra.s cnr_8spx
cnr_87
move.b 7(a1),d7 ; = 7
cnr_8spx
lsr.w #1,d7
bcc.s cnr_8mb
bset d3,d1 ; set lower bit
cnr_8mb
lsr.w #1,d7
bcc.s cnr_8hb
bset d4,d1 ; set middle bit
cnr_8hb
lsr.w #1,d7
bcc.s cnr_8npx ; set higher bit
bset d5,d1
cnr_8npx
subq.w #2,d6
ble.s cnr_8nrw
subq.w #2,d5 ; next pixel
subq.w #2,d4
subq.w #2,d3
bge.s cnr_8pix ; there is one
move.w d1,(a4)+ ; save word
moveq #15,d5 ; and re-start pixel count
moveq #7,d4
moveq #6,d3
bra.s cnr_8wrd
cnr_8nrw
move.w d1,(a4)
add.w sd_linel(a0),a3 ; next row
cmp.l a2,a3
blt cnr_8row
cnr_ok
moveq #0,d0
rts
end
| 14.995192 | 64 | 0.627445 |
e0d5ea6952beb35cd8f28ab51e076c0527d41b90 | 403 | asm | Assembly | MD407/Kap2/Uppgift2.6.asm | konglobemeralt/DAT017 | a0d3613ef6675fe7e28f27570bfe3a17a711d117 | [
"MIT"
] | null | null | null | MD407/Kap2/Uppgift2.6.asm | konglobemeralt/DAT017 | a0d3613ef6675fe7e28f27570bfe3a17a711d117 | [
"MIT"
] | null | null | null | MD407/Kap2/Uppgift2.6.asm | konglobemeralt/DAT017 | a0d3613ef6675fe7e28f27570bfe3a17a711d117 | [
"MIT"
] | 1 | 2022-02-01T10:37:58.000Z | 2022-02-01T10:37:58.000Z | @ varför vill de i boken
@ döpa filen till mom5.asm
@ när det är uppg 2.6? smh
start:
LDR R6, =0x55555555 @D som ut
LDR R5, =0x40020C00
STR R6, [R5]
@adressen till port Ds ut data register till R5
LDR R5, =0x40020C14
@adressen till port Es in dataregister till R6
LDR R6, =0x40021010
main:
LDRSB R0, [R6] @read PE0-E7
LDRSB R1, [R6, #1] @read PE8-E15
ADD R0, R0, R1
STRH R0, [R5]
B main
| 20.15 | 47 | 0.677419 |
cc86fee81b15e68c9c6151413479284c6c9a3693 | 1,690 | asm | Assembly | programs/oeis/191/A191627.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/191/A191627.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/191/A191627.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A191627: a(n) = floor(3^n/(3n-1)).
; 1,1,3,7,17,42,109,285,757,2036,5535,15184,41955,116657,326111,915887,2582803,7309820,20754669,59098040,168715374,482785532,1384458512,3977880795,11449846073,33011244523,95319968562,275624005481,798027643777,2313383506681,6713841263955,19505475672124,56725107821995,165120610887787,481072549028843,1402753600906533,4093490053554521,11954439979407009,34935820284646347,102165255958461586,298958986698121200,875351913052098873,2564507557769820918,7517335131172604831,22047109750379355960,64692978975565701430,189920102563982166341,557807294243863705338,1639036501579572120480,4818107299945319387719,14169039230760248462570,41684399285333376122143,122678770048607720865802,361178490702112171990001,1063714701275123043116893,3133818161840482258763542,9235546465188715362591379,27226177440729738930182680,80286284612151900595254608,236822113269364265442985660,698755356184882475510347800,2062272564740247738533242696,6088091879951263270669945193,17977402200484358558418058059,53098203406585244608111068390,156868803972754377471678384789,463547315739489185428809627052,1370090588392578873188599882915,4050413438500390940640084119880,11976820598053787566103215244429,35422011863111909452578848859705,104783253697391508892279757557082,310023846948704235025323135891366,917446135314265021296657605759971,2715476730863204058570017824191345,8038768119559793512594942633729444,23801743867044432095987634493781529,70485850936741022086830333908623413,208769533071110061180908488992066804,618446984997263277473151507139679069
add $0,1
mov $1,2
mov $2,1
mov $3,3
lpb $0
sub $0,1
mul $2,3
add $4,$1
mov $1,$3
lpe
add $0,5
div $2,$4
add $2,4
add $0,$2
sub $0,9
| 88.947368 | 1,511 | 0.9 |
af3411124278ea187b099bb68bda07f3fd30b450 | 647 | asm | Assembly | data/pokemon/base_stats/haunter.asm | opiter09/ASM-Machina | 75d8e457b3e82cc7a99b8e70ada643ab02863ada | [
"CC0-1.0"
] | 1 | 2022-02-15T00:19:44.000Z | 2022-02-15T00:19:44.000Z | data/pokemon/base_stats/haunter.asm | opiter09/ASM-Machina | 75d8e457b3e82cc7a99b8e70ada643ab02863ada | [
"CC0-1.0"
] | null | null | null | data/pokemon/base_stats/haunter.asm | opiter09/ASM-Machina | 75d8e457b3e82cc7a99b8e70ada643ab02863ada | [
"CC0-1.0"
] | null | null | null | db DEX_HAUNTER ; pokedex id
db 45, 50, 45, 95, 115
; hp atk def spd spc
db GHOST, POISON ; type
db 90 ; catch rate
db 126 ; base exp
INCBIN "gfx/pokemon/front/haunter.pic", 0, 1 ; sprite dimensions
dw HaunterPicFront, HaunterPicBack
db LICK, CONFUSE_RAY, NIGHT_SHADE, NO_MOVE ; level 1 learnset
db GROWTH_MEDIUM_SLOW ; growth rate
; tm/hm learnset
tmhm TOXIC, RAGE, MEGA_DRAIN, THUNDERBOLT, THUNDER, \
PSYCHIC_M, MIMIC, DOUBLE_TEAM, BIDE, SELFDESTRUCT, \
DREAM_EATER, REST, PSYWAVE, EXPLOSION, SUBSTITUTE, \
NIGHT_SHADE
; end
db 0 ; padding
| 26.958333 | 77 | 0.632148 |
ab24c709440136897fb5ee4a5688d79ffeaa7828 | 2,402 | asm | Assembly | src/platform/win32/init_stack.asm | mendsley/coroutine | f267f79125f5e6c4efc167c86684c49b4d380919 | [
"BSD-2-Clause"
] | 7 | 2017-07-27T17:40:49.000Z | 2021-07-13T02:31:57.000Z | src/platform/win32/init_stack.asm | mendsley/coroutine | f267f79125f5e6c4efc167c86684c49b4d380919 | [
"BSD-2-Clause"
] | null | null | null | src/platform/win32/init_stack.asm | mendsley/coroutine | f267f79125f5e6c4efc167c86684c49b4d380919 | [
"BSD-2-Clause"
] | null | null | null | ; Copyright 2016-2019 Matthew Endsley
; All rights reserved
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted providing that the following conditions
; are met:
; 1. Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
; 2. Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
; IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
; WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
; ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
; DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
; OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
; HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
; STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
; IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
; POSSIBILITY OF SUCH DAMAGE.
.model flat, C
.686p
.code
EXTERN coroutine_private_switch : PROC
;
; void coroutine_private_init_stack(coroutine::H* coro, coroutine::Entry* entry, void* arg);
;
coroutine_private_init_stack PROC public
; eax: coro, ecx: entry, edx: arg
; Save registers and stack
push ebp
mov ebp, esp
push ebx
push edi
push esi
mov ecx, esp
; Acquire arguments
mov ebx, dword ptr [ebp+8]
mov edi, dword ptr [ebp+12]
mov esi, dword ptr [ebp+16]
; Switch to the new coroutine's stack
mov esp, dword ptr [ebx]
; Return address
push 0
lea eax, coroutine_private_bootstrap
push eax
; Seed volatile registers
push 0 ; ebp
push ebx
push edi
push esi
; Save the new stack pointer
mov dword ptr [ebx], esp
; Restore registers and stack
mov esp, ecx
pop esi
pop edi
pop ebx
pop ebp
ret
coroutine_private_init_stack ENDP
EXTERN coroutine_private_entry : PROC
;
; Entry point for a coroutine
;
coroutine_private_bootstrap PROC public
; push arguments to private_entry
push esi
push edi
push ebx
call coroutine_private_entry
; does not return
coroutine_private_bootstrap ENDP
END
| 25.284211 | 92 | 0.764363 |
7bf67836e18a9d9f3af1ea94e221c3a0345337f4 | 293 | asm | Assembly | libsrc/_DEVELOPMENT/math/float/math16/lm16/c/sccz80/l_f16_fabs.asm | Frodevan/z88dk | f27af9fe840ff995c63c80a73673ba7ee33fffac | [
"ClArtistic"
] | null | null | null | libsrc/_DEVELOPMENT/math/float/math16/lm16/c/sccz80/l_f16_fabs.asm | Frodevan/z88dk | f27af9fe840ff995c63c80a73673ba7ee33fffac | [
"ClArtistic"
] | null | null | null | libsrc/_DEVELOPMENT/math/float/math16/lm16/c/sccz80/l_f16_fabs.asm | Frodevan/z88dk | f27af9fe840ff995c63c80a73673ba7ee33fffac | [
"ClArtistic"
] | null | null | null |
SECTION code_fp_math16
PUBLIC l_f16_fabs
PUBLIC f16_fabs
EXTERN asm_f16_fabs
defc l_f16_fabs = asm_f16_fabs
defc f16_fabs = asm_f16_fabs
; SDCC bridge for Classic
IF __CLASSIC
PUBLIC _f16_fabs
EXTERN cm16_sdcc_fabs
defc _f16_fabs = cm16_sdcc_fabs
ENDIF
| 13.318182 | 34 | 0.740614 |
9ead62ea6cb2df905512961c1e6380d61ea5a12a | 81 | asm | Assembly | worm.asm | timo-cmd2/Coldfire | b43a1c1a06c2ead46453665e2086a2b51583280e | [
"BSD-3-Clause"
] | 1 | 2021-05-10T08:43:09.000Z | 2021-05-10T08:43:09.000Z | worm.asm | timo-cmd2/Coldfire | b43a1c1a06c2ead46453665e2086a2b51583280e | [
"BSD-3-Clause"
] | null | null | null | worm.asm | timo-cmd2/Coldfire | b43a1c1a06c2ead46453665e2086a2b51583280e | [
"BSD-3-Clause"
] | null | null | null | .586p
.model flat
jumps
.radix 16
extrn ExitProcess:PROC
extrn MessageBoxA:PROC
| 10.125 | 22 | 0.802469 |
0606902a3d5621374809e88cdd7b04f550127669 | 336 | asm | Assembly | 8085_programming/PROGS/5_memadd.asm | SayanGhoshBDA/code-backup | 8b6135facc0e598e9686b2e8eb2d69dd68198b80 | [
"MIT"
] | 16 | 2018-11-26T08:39:42.000Z | 2019-05-08T10:09:52.000Z | 8085_programming/PROGS/5_memadd.asm | SayanGhoshBDA/code-backup | 8b6135facc0e598e9686b2e8eb2d69dd68198b80 | [
"MIT"
] | 8 | 2020-05-04T06:29:26.000Z | 2022-02-12T05:33:16.000Z | 8085_programming/PROGS/5_memadd.asm | SayanGhoshBDA/code-backup | 8b6135facc0e598e9686b2e8eb2d69dd68198b80 | [
"MIT"
] | 5 | 2020-02-11T16:02:21.000Z | 2021-02-05T07:48:30.000Z | ; Program to show the use of the memory
; change the contents of the memory before
; check the reset condition
LDA 0005H ; load the contents of memory addr 0005H to A
MOV B,A ; Move the contents of A to B
LDA 0006H ; A have the contents of the addr 0006H
ADD B ; Add B with A
STA 000BH ; store the result to memory location 000BH
HLT | 37.333333 | 55 | 0.75 |
ca207e7afc730b01ffcaf4aecca3ff1077ad38ba | 682 | asm | Assembly | oeis/255/A255821.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/255/A255821.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/255/A255821.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A255821: Numbers of words on {0,1,...,36} having no isolated zeros.
; Submitted by Christian Krause
; 1,36,1297,46729,1683577,60656797,2185374961,78735837637,2836736138665,102203420474269,3682238546710945,132665625592223221,4779746882367738841,172207232713967895181,6204372685172893559377,223534399861459456068709,8053614838585478550631177,290159868049316390123017597,10454032222030641747147402241,376643367099547431827847971797,13569905177939927264777497109305,488903675528186704353862172540269,17614478569352654387106713015039665,634623691333439328347741333240952901
mov $3,3
lpb $0
sub $0,1
add $1,$3
sub $1,$2
mul $3,36
add $3,$2
add $2,$1
lpe
mov $0,$3
div $0,3
| 42.625 | 468 | 0.835777 |
02be175b1afa886c7b67fe09953f991bd90d98f9 | 10,241 | asm | Assembly | diolan-plus2-toad5/fw/xtea.asm | nyholku/TOAD4 | eea9f53fa4afe0c9380bc003212dc6c3064c96ce | [
"BSD-3-Clause"
] | null | null | null | diolan-plus2-toad5/fw/xtea.asm | nyholku/TOAD4 | eea9f53fa4afe0c9380bc003212dc6c3064c96ce | [
"BSD-3-Clause"
] | null | null | null | diolan-plus2-toad5/fw/xtea.asm | nyholku/TOAD4 | eea9f53fa4afe0c9380bc003212dc6c3064c96ce | [
"BSD-3-Clause"
] | 6 | 2016-10-18T04:19:48.000Z | 2020-07-08T23:36:45.000Z | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; BootLoader. ;;
;; Copyright (C) 2007 Diolan ( http://www.diolan.com ) ;;
;; ;;
;; This program is free software: you can redistribute it and/or modify ;;
;; it under the terms of the GNU General Public License as published by ;;
;; the Free Software Foundation, either version 3 of the License, or ;;
;; (at your option) any later version. ;;
;; ;;
;; This program is distributed in the hope that it will be useful, ;;
;; but WITHOUT ANY WARRANTY; without even the implied warranty of ;;
;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ;;
;; GNU General Public License for more details. ;;
;; ;;
;; You should have received a copy of the GNU General Public License ;;
;; along with this program. If not, see <http://www.gnu.org/licenses/> ;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;
; Copyright (c) 2015 Kustaa Nyholm / SpareTimeLabs
; - modified NOT to use Extended Instruction Set (for compatibility with SDCC)
; - extensively optimized to still fit in the 2 kB boot block
;
;-----------------------------------------------------------------------------
; XTEA Encoding / Decoding
;-----------------------------------------------------------------------------
#include "mpasmx.inc"
;-----------------------------------------------------------------------------
; Constants
;-----------------------------------------------------------------------------
; Access to boot_cmd
CODE_SIZE_OFFS equ 5
CODE_START_OFFS equ 6
;-----------------------------------------------------------------------------
; Global Variables
;-----------------------------------------------------------------------------
extern boot_cmd
extern boot_rep
;-----------------------------------------------------------------------------
; Local Variables
;-----------------------------------------------------------------------------
BOOT_DATA UDATA
_sum res 4 ; long sum LSB first
tmp1 res 4 ; long tmp1 LSB first
tmp2 res 4 ; long tmp2 LSB first
iter res 1 ; XTEA iterations
bcntr res 1 ; Encoded/Decoded bytes counter
global _fsr
_fsr res 4 ; Temporary storage for FSR's
;-----------------------------------------------------------------------------
; XTEA Algorithm Definitions
;-----------------------------------------------------------------------------
XTEA_ITERATIONS equ 0x40 ; Number of iterations on x1,x2
;-----------------------------------------------------------------------------
XTEA_KEYS_SECTION CODE_PACK 0x001C ; Place ROM constants after vectors
#ifndef XTEA_KEY
XTEA_KEY_VAL db "0123456789ABCDEF" ; default 16 byte Key
#else
XTEA_KEY_VAL db XTEA_KEY
#endif
;-----------
DELTA db 0xB9,0x79,0x37,0x9E ; Delta
MINUS_DELTA db 0x47,0x86,0xC8,0x61 ; (-)Delta
DELTA_ITER db 0x40,0x6e,0xde,0x8d ; Delta*XTEA_ITERATIONS
;-----------------------------------------------------------------------------
; START
;-----------------------------------------------------------------------------
XTEA_CODE CODE
GLOBAL xtea_encode
GLOBAL xtea_decode
;-----------------------------------------------------------------------------
; xtea_encode
;-----------------------------------------------------------------------------
; DESCR :
; INPUT : boot_cmd
; OUTPUT: xtea_block
; NOTES :
;-----------------------------------------------------------------------------
xtea_encode:
rcall xtea_init ; Set TBLPTR, bcnt
lfsr FSR2, boot_rep + CODE_START_OFFS ; FSR2=&x1[0]
lfsr FSR1, boot_rep + (CODE_START_OFFS + 4) ; FSR1=&x2[0]
; while( bcnt-=8 )
xtea_encode_loop
rcall xtea_init_iters ; sum=0, iter=XTEA_ITERATIONS
; while( iter )
xtea_encode_iter
; x1 += ((x2<<4 ^ x2>>5) + x2) ^ ( sum + key[ sum&0x03 ] )
rcall calc_x1
rcall sum_key_xor_add
; sum += DELTA
movlw LOW(DELTA)
rcall add_sum_const
; x2 += ((x1<<4 ^ x1>>5) + x1) ^ ( sum + key[ (sum>>11)&0x03 ] )
rcall calc_x2
rcall sum_key_xor_add
decfsz iter,f
bra xtea_encode_iter
rcall after_iters
bnz xtea_encode_loop
; Restore FSR1, FSR2
GLOBAL restore_fsr1_fsr2
restore_fsr1_fsr2
movff _fsr, FSR1L
movff _fsr + 1, FSR1H
movff _fsr + 2, FSR2L
movff _fsr + 3, FSR2H
return
;-----------------------------------------------------------------------------
; xtea_decode
;-----------------------------------------------------------------------------
; DESCR :
; INPUT :
; OUTPUT:
; NOTES :
;-----------------------------------------------------------------------------
xtea_decode:
rcall xtea_init ; Set TBLPTR, bcnt
lfsr FSR1, boot_cmd + CODE_START_OFFS ; FSR1=&x1[0]
lfsr FSR2, boot_cmd + (CODE_START_OFFS + 4) ; FSR2=&x2[0]
; while( bcnt-=8 )
xtea_decode_loop
rcall xtea_init_iters ; sum=0, iter=XTEA_ITERATIONS
movlw LOW(DELTA_ITER)
rcall add_sum_const ; sum = DELTA * XTEA_ITERATIONS
; while( iter )
xtea_decode_iter
; x2 -= ((x1<<4 ^ x1>>5) + x1) ^ ( sum + key[ (sum>>11)&0x03 ] )
rcall calc_x2
rcall sum_key_xor_sub
; sum += -DELTA
movlw LOW(MINUS_DELTA)
rcall add_sum_const
; x1 -= ((x2<<4 ^ x2>>5) + x2) ^ ( sum + key[ sum&0x03 ] )
rcall calc_x1
rcall sum_key_xor_sub
decfsz iter,f
bra xtea_decode_iter
rcall after_iters
bnz xtea_decode_loop
bra restore_fsr1_fsr2
;-----------------------------------------------------------------------------
; Local Functions
;-----------------------------------------------------------------------------
;
; Init Encoder/Decoder
; Assume TBLPTRU=0
xtea_init
; Prepare Table Pointer to access KEY
clrf TBLPTRH
movf boot_cmd + CODE_SIZE_OFFS, W
andlw 0x38
movwf boot_cmd + CODE_SIZE_OFFS ; size8 &= 0x38
movwf bcntr ; bcnt = size8
; Store FSR1,FSR2
GLOBAL store_fsr1_fsr2
store_fsr1_fsr2
movff FSR1L, _fsr
movff FSR1H, _fsr + 1
movff FSR2L, _fsr + 2
movff FSR2H, _fsr + 3
return
;
; Init next 8 byte Encode/Decode
;
xtea_init_iters
clrf _sum
clrf _sum + 1
clrf _sum + 2
clrf _sum + 3 ; _sum = 0
movlw XTEA_ITERATIONS
movwf iter ; iter = XTEA_ITERATIONS
return
;
; After 8 byte Encode/Decode
;
after_iters
rcall addfsr_FSR1_4
rcall addfsr_FSR1_4
rcall addfsr_FSR2_4
rcall addfsr_FSR2_4
; bcnt -= 8
movlw 0x08
subwf bcntr,f ; bcntr -=8
return ; Z will be set if bcntr==0
calc_x1
rcall subfsr_FSR1_4
rcall addfsr_FSR2_4
rcall load_shift_xor_add
movf _sum,W
return
;
addfsr_FSR1_4
rcall addfsr_FSR1_2
addfsr_FSR1_2
movf POSTINC1, W
movf POSTINC1, W
return
;
addfsr_FSR2_4
rcall addfsr_FSR2_2
addfsr_FSR2_2
movf POSTINC2, W
movf POSTINC2, W
return
;
calc_x2
rcall addfsr_FSR1_4
rcall subfsr_FSR2_4
load_shift_xor_add
rcall load_shift ; tmp1=tmp2=*FSR2; tmp1<<=4 ; tmp2=>>5
rcall xor_tmp1_tmp2 ; tmp1 = tmp1 ^ tmp2
rcall add_tmp1_FSR2 ; tmp1 = tmp1 + *FSR2
movf _sum + 1, W
rrncf WREG, W
rrncf WREG, W
rrncf WREG, W ; W = sum>>11
return
sum_key_xor_add
rcall sum_key ; tmp2 = sum + key[ w ]
rcall xor_tmp1_tmp2 ; tmp1 = tmp1 ^ tmp2
bra add_FSR1_tmp1 ; *FSR1 = *FSR1 + tmp1
sum_key_xor_sub
rcall sum_key ; tmp2 = sum + key[ w ]
rcall xor_tmp1_tmp2 ; tmp1 = tmp1 ^ tmp2
bra sub_FSR1_tmp1 ; *FSR1 = *FSR1 + tmp1
; tmp1=tmp2=*FSR2; tmp1<<4; tmp2>>5
load_shift
movff INDF2, tmp1
movff POSTINC2, tmp2
movff INDF2, tmp1 + 1
movff POSTINC2, tmp2 + 1
movff INDF2, tmp1 + 2
movff POSTINC2, tmp2 + 2
movff INDF2, tmp1 + 3
movff POSTINC2, tmp2 + 3
rcall subfsr_FSR2_4
; tmp1 <<= 4
rcall tmp1_shft_l_2
rcall tmp1_shft_l_2
; tmp2 >>= 5
rcall tmp2_shft_r_2
rcall tmp2_shft_r_1
tmp2_shft_r_2
rcall tmp2_shft_r_1
tmp2_shft_r_1
bcf STATUS,C ; Carry=0
rrcf tmp2 + 3,f
rrcf tmp2 + 2,f
rrcf tmp2 + 1,f
rrcf tmp2 + 0,f
return
;
tmp1_shft_l_2
rcall tmp1_shft_l_1
tmp1_shft_l_1
bcf STATUS,C ; Carry=0
rlcf tmp1 + 0,f
rlcf tmp1 + 1,f
rlcf tmp1 + 2,f
rlcf tmp1 + 3,f
return
;
; (*FSR1) = (*FSR1) + tmp1
add_FSR1_tmp1
movf tmp1, W
addwf POSTINC1
movf tmp1 + 1, W
addwfc POSTINC1
movf tmp1 + 2, W
addwfc POSTINC1
movf tmp1 + 3, W
addwfc POSTINC1
_xtea_1
subfsr_FSR1_4
rcall subfsr_FSR1_2
subfsr_FSR1_2
movf POSTDEC1, W
movf POSTDEC1, W
return
; (*FSR1) = (*FSR1) - tmp1
sub_FSR1_tmp1
movf tmp1, W
subwf POSTINC1
movf tmp1 + 1, W
subwfb POSTINC1
movf tmp1 + 2, W
subwfb POSTINC1
movf tmp1 + 3, W
subwfb POSTINC1
bra _xtea_1
; tmp1 = tmp1 + *FSR2
add_tmp1_FSR2
movf POSTINC2, W
addwf tmp1,f
movf POSTINC2, W
addwfc tmp1 + 1,f
movf POSTINC2, W
addwfc tmp1 + 2,f
movf POSTINC2, W
addwfc tmp1 + 3,f
subfsr_FSR2_4
rcall subfsr_FSR2_2
subfsr_FSR2_2
movf POSTDEC2, W
movf POSTDEC2, W
return
; tmp1 = tmp1 ^ tmp2
xor_tmp1_tmp2
movf tmp2, W
xorwf tmp1,f
movf tmp2 + 1, W
xorwf tmp1 + 1,f
movf tmp2 + 2, W
xorwf tmp1 + 2,f
movf tmp2 + 3, W
xorwf tmp1 + 3,f
return
; tmp2 = sum + key[ (w&0x03) ]
sum_key
andlw 0x03 ; w = sum & 0x03
; XTEA_KET must be located in first 256 bytes of code ROM
rlncf WREG
rlncf WREG ; W *=4
addlw LOW(XTEA_KEY_VAL)
movwf TBLPTRL ; TBLPTR = &key[ w ]
lfsr FSR0, tmp2
bra add_FSR0_sum_TBLPTR
; sum = sum + *((rom*)w)
add_sum_const
movwf TBLPTRL ; TBLPTR = &const
lfsr FSR0,_sum
; *FSR0 = sum + *TBLPTR
add_FSR0_sum_TBLPTR
tblrd*+
movf _sum, W
addwf TABLAT, W
movwf POSTINC0
tblrd*+
movf _sum + 1, W
addwfc TABLAT, W
movwf POSTINC0
tblrd*+
movf _sum + 2, W
addwfc TABLAT, W
movwf POSTINC0
tblrd*+
movf _sum + 3, W
addwfc TABLAT, W
movwf POSTINC0
return
;-----------------------------------------------------------------------------
END
| 26.879265 | 79 | 0.520164 |
dc7d685c90901f9a5cab85a032e211aae7d64de9 | 436 | asm | Assembly | programs/oeis/017/A017221.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/017/A017221.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/017/A017221.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A017221: a(n) = 9*n + 5.
; 5,14,23,32,41,50,59,68,77,86,95,104,113,122,131,140,149,158,167,176,185,194,203,212,221,230,239,248,257,266,275,284,293,302,311,320,329,338,347,356,365,374,383,392,401,410,419,428,437,446,455,464,473,482,491,500,509,518,527,536,545,554,563,572,581,590,599,608,617,626,635,644,653,662,671,680,689,698,707,716,725,734,743,752,761,770,779,788,797,806,815,824,833,842,851,860,869,878,887,896
mul $0,9
add $0,5
| 72.666667 | 389 | 0.711009 |
b649bf949d62b565ce8d3fb207c45829e4dc4b11 | 191 | asm | Assembly | tests/align/5.asm | NullMember/customasm | 6e34d6432583a41278e6b3596f1817ae82149531 | [
"Apache-2.0"
] | 414 | 2016-10-14T22:39:20.000Z | 2022-03-30T07:52:44.000Z | tests/align/5.asm | NullMember/customasm | 6e34d6432583a41278e6b3596f1817ae82149531 | [
"Apache-2.0"
] | 100 | 2018-03-22T16:12:24.000Z | 2022-03-26T09:19:23.000Z | tests/align/5.asm | NullMember/customasm | 6e34d6432583a41278e6b3596f1817ae82149531 | [
"Apache-2.0"
] | 47 | 2017-06-29T15:12:13.000Z | 2022-03-10T04:50:51.000Z | #ruledef test
{
ld {x} => 0x55 @ x`8
}
#bankdef test { #bits 3, #addr 0, #outp 0 }
#d3 $ ; = 0b000
#align 6 ; = 0b000
label:
#align 12 ; = 0b000_000
#d3 $ ; = 0b100
#d3 label ; = 0b010 | 13.642857 | 43 | 0.544503 |
393ba9065ec38cbd6b6427c8ebc867107173651d | 677 | asm | Assembly | oeis/030/A030426.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/030/A030426.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/030/A030426.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A030426: a(n) = Fibonacci(prime(n)).
; Submitted by Christian Krause
; 1,2,5,13,89,233,1597,4181,28657,514229,1346269,24157817,165580141,433494437,2971215073,53316291173,956722026041,2504730781961,44945570212853,308061521170129,806515533049393,14472334024676221,99194853094755497,1779979416004714189,83621143489848422977,573147844013817084101,1500520536206896083277,10284720757613717413913,26925748508234281076009,184551825793033096366333,155576970220531065681649693,1066340417491710595814572169,19134702400093278081449423917,50095301248058391139327916261
seq $0,6005 ; The odd prime numbers together with 1.
mov $2,1
lpb $0
sub $0,2
add $1,$2
add $2,$1
lpe
mov $0,$2
| 52.076923 | 486 | 0.844904 |
253cc7dd8ee0a15c489d22bc70d2ae4f98118b1c | 13,098 | asm | Assembly | src/asm.run/src/stubs.asm | 0xCM/z0 | b157d3354cfff4630aa83c52ac0faf983ee4aafd | [
"BSD-3-Clause"
] | null | null | null | src/asm.run/src/stubs.asm | 0xCM/z0 | b157d3354cfff4630aa83c52ac0faf983ee4aafd | [
"BSD-3-Clause"
] | null | null | null | src/asm.run/src/stubs.asm | 0xCM/z0 | b157d3354cfff4630aa83c52ac0faf983ee4aafd | [
"BSD-3-Clause"
] | null | null | null | ; ----------------------------------------------------------------------------------------------------------------------------------------------------------------
; IntPtr func_32i_32i_32i(void* f)::located://asmrun/sigs?func_32i_32i_32i#func_32i_32i_32i_(void~ptr)
; public static ReadOnlySpan<byte> func_32i_32i_32i_ᐤvoidᕀptrᐤ => new byte[223]{0xe9,0xc3,0xe4,0x20,0x04,0x5f,0x00,0x01,0xe9,0xdb,0xe9,0x20,0x04,0x5f,0x03,0x00,0x50,0x40,0xbf,0xa4,0xfa,0x7f,0x00,0x00,0xe8,0x8b,0xeb,0xb4,0x5f,0x5e,0x00,0x03,0xe8,0x83,0xeb,0xb4,0x5f,0x5e,0x03,0x02,0xe8,0x7b,0xeb,0xb4,0x5f,0x5e,0x06,0x01,0xe9,0x13,0x77,0x20,0x04,0x5f,0x09,0x00,0x18,0x41,0xbf,0xa4,0xfa,0x7f,0x00,0x00,0xe8,0x63,0xeb,0xb4,0x5f,0x5e,0x00,0x01,0xe8,0x5b,0xeb,0xb4,0x5f,0x5e,0x04,0x00,0x10,0x42,0xbf,0xa4,0xfa,0x7f,0x00,0x00,0xe8,0x4b,0xeb,0xb4,0x5f,0x5e,0x00,0x00,0x40,0x43,0xbf,0xa4,0xfa,0x7f,0x00,0x00,0xe8,0x3b,0xeb,0xb4,0x5f,0x5e,0x00,0x0c,0xe8,0x33,0xeb,0xb4,0x5f,0x5e,0x02,0x0b,0xe8,0x2b,0xeb,0xb4,0x5f,0x5e,0x04,0x0a,0xe8,0x23,0xeb,0xb4,0x5f,0x5e,0x06,0x09,0xe8,0x1b,0xeb,0xb4,0x5f,0x5e,0x08,0x08,0xe8,0x13,0xeb,0xb4,0x5f,0x5e,0x0a,0x07,0xe8,0x0b,0xeb,0xb4,0x5f,0x5e,0x0c,0x06,0xe8,0x03,0xeb,0xb4,0x5f,0x5e,0x0e,0x05,0xe8,0xfb,0xea,0xb4,0x5f,0x5e,0x10,0x04,0xe8,0xf3,0xea,0xb4,0x5f,0x5e,0x12,0x03,0xe8,0xeb,0xea,0xb4,0x5f,0x5e,0x14,0x02,0xe8,0xe3,0xea,0xb4,0x5f,0x5e,0x16,0x01,0xe8,0xdb,0xea,0xb4,0x5f,0x5e,0x18,0x00,0x60,0x44,0xbf,0xa4,0xfa,0x7f,0x00,0x00,0xe9,0xeb,0x42,0x00,0x00,0x5f,0x00};
; BaseAddress = 7ffaa499ac98h
; TermCode = CTC_Zx7
; 00007FFAA499AC93 E9 E8 EA B4 5F jmp CLRStub[MethodDescPrestub]@7ffaa499ac94 (00h)
; 00007FFAA499AC98 E9 C3 E4 20 04 jmp Z0.Sigs.func_32i_32i_32i(Int32, Int32) func_32i_32i_32i(Void*) (07FFAA8BA9160h)
; 00007FFAA499AC9D 5F pop rdi
0000h jmp near ptr 420e4c8h ; JMP rel32 | E9 cd | 5 | e9 c3 e4 20 04
; 00007FFAA8BA9160 48 8B C1 mov rax,rcx
; 00007FFAA8BA9163 C3 ret
; ----------------------------------------------------------------------------------------------------------------------------------------------------------------
; int invoke(IntPtr f, int a, int b)::located://asmrun/sigs?invoke#invoke_(IntPtr,32i,32i)
; public static ReadOnlySpan<byte> invoke_ᐤIntPtrㆍ32iㆍ32iᐤ => new byte[215]{0xe9,0xdb,0xe9,0x20,0x04,0x5f,0x03,0x00,0x50,0x40,0xbf,0xa4,0xfa,0x7f,0x00,0x00,0xe8,0x8b,0xeb,0xb4,0x5f,0x5e,0x00,0x03,0xe8,0x83,0xeb,0xb4,0x5f,0x5e,0x03,0x02,0xe8,0x7b,0xeb,0xb4,0x5f,0x5e,0x06,0x01,0xe9,0x13,0x77,0x20,0x04,0x5f,0x09,0x00,0x18,0x41,0xbf,0xa4,0xfa,0x7f,0x00,0x00,0xe8,0x63,0xeb,0xb4,0x5f,0x5e,0x00,0x01,0xe8,0x5b,0xeb,0xb4,0x5f,0x5e,0x04,0x00,0x10,0x42,0xbf,0xa4,0xfa,0x7f,0x00,0x00,0xe8,0x4b,0xeb,0xb4,0x5f,0x5e,0x00,0x00,0x40,0x43,0xbf,0xa4,0xfa,0x7f,0x00,0x00,0xe8,0x3b,0xeb,0xb4,0x5f,0x5e,0x00,0x0c,0xe8,0x33,0xeb,0xb4,0x5f,0x5e,0x02,0x0b,0xe8,0x2b,0xeb,0xb4,0x5f,0x5e,0x04,0x0a,0xe8,0x23,0xeb,0xb4,0x5f,0x5e,0x06,0x09,0xe8,0x1b,0xeb,0xb4,0x5f,0x5e,0x08,0x08,0xe8,0x13,0xeb,0xb4,0x5f,0x5e,0x0a,0x07,0xe8,0x0b,0xeb,0xb4,0x5f,0x5e,0x0c,0x06,0xe8,0x03,0xeb,0xb4,0x5f,0x5e,0x0e,0x05,0xe8,0xfb,0xea,0xb4,0x5f,0x5e,0x10,0x04,0xe8,0xf3,0xea,0xb4,0x5f,0x5e,0x12,0x03,0xe8,0xeb,0xea,0xb4,0x5f,0x5e,0x14,0x02,0xe8,0xe3,0xea,0xb4,0x5f,0x5e,0x16,0x01,0xe8,0xdb,0xea,0xb4,0x5f,0x5e,0x18,0x00,0x60,0x44,0xbf,0xa4,0xfa,0x7f,0x00,0x00,0xe9,0xeb,0x42,0x00,0x00,0x5f,0x00};
; BaseAddress = 7ffaa499aca0h
; TermCode = CTC_Zx7
0000h jmp near ptr 420e9e0h ; JMP rel32 | E9 cd | 5 | e9 db e9 20 04
0005h pop rdi ; POP r64 | 58 +ro | 1 | 5f
; 00007FFAA499ACA0 E9 DB E9 20 04 jmp Z0.Sigs.invoke(Int32 (Int32, Int32), Int32, Int32) (07FFAA8BA9680h)
; 00007FFAA499ACA5 5F pop rdi
; 00007FFAA8BA9680 55 push rbp
; 00007FFAA8BA9681 41 57 push r15
; 00007FFAA8BA9683 41 56 push r14
; 00007FFAA8BA9685 41 55 push r13
; 00007FFAA8BA9687 41 54 push r12
; 00007FFAA8BA9689 57 push rdi
; 00007FFAA8BA968A 56 push rsi
; 00007FFAA8BA968B 53 push rbx
; 00007FFAA8BA968C 48 83 EC 68 sub rsp,68h
; 00007FFAA8BA9690 48 8D AC 24 A0 00 00 00 lea rbp,[rsp+0A0h]
; 00007FFAA8BA9698 48 8B F1 mov rsi,rcx
; 00007FFAA8BA969B 8B FA mov edi,edx
; 00007FFAA8BA969D 41 8B D8 mov ebx,r8d
; 00007FFAA8BA96A0 48 8D 4D 88 lea rcx,[rbp-78h]
; 00007FFAA8BA96A4 49 8B D2 mov rdx,r10
; 00007FFAA8BA96A7 E8 04 1E 8E 5B call JIT_InitPInvokeFrame (07FFB0448B4B0h)
; 00007FFAA8BA96AC 4C 8B F0 mov r14,rax
; 00007FFAA8BA96AF 48 8B CC mov rcx,rsp
; 00007FFAA8BA96B2 48 89 4D A8 mov qword ptr [rbp-58h],rcx
; 00007FFAA8BA96B6 48 8B CD mov rcx,rbp
; 00007FFAA8BA96B9 48 89 4D B8 mov qword ptr [rbp-48h],rcx
; 00007FFAA8BA96BD 8B CF mov ecx,edi
; 00007FFAA8BA96BF 8B D3 mov edx,ebx
; 00007FFAA8BA96C1 48 8D 05 13 00 00 00 lea rax,[Z0.Sigs.invoke(Int32 (Int32, Int32), Int32, Int32)+05Bh (07FFAA8BA96DBh)]
; 00007FFAA8BA96C8 48 89 45 B0 mov qword ptr [rbp-50h],rax
; 00007FFAA8BA96CC 48 8D 45 88 lea rax,[rbp-78h]
; 00007FFAA8BA96D0 49 89 46 10 mov qword ptr [r14+10h],rax
; 00007FFAA8BA96D4 41 C6 46 0C 00 mov byte ptr [r14+0Ch],0
; 00007FFAA8BA96D9 FF D6 call rsi
; 00007FFAA8BA96DB 41 C6 46 0C 01 mov byte ptr [r14+0Ch],1
; 00007FFAA8BA96E0 83 3D 95 49 CB 5B 00 cmp dword ptr [g_TrapReturningThreads (07FFB0485E07Ch)],0
; 00007FFAA8BA96E7 74 06 je Z0.Sigs.invoke(Int32 (Int32, Int32), Int32, Int32)+06Fh (07FFAA8BA96EFh)
; 00007FFAA8BA96E9 FF 15 79 6C CA 5B call qword ptr [hlpDynamicFuncTable+0A8h (07FFB04850368h)]
; 00007FFAA8BA96EF 48 8B 55 90 mov rdx,qword ptr [rbp-70h]
; 00007FFAA8BA96F3 49 89 56 10 mov qword ptr [r14+10h],rdx
; 00007FFAA8BA96F7 48 8D 65 C8 lea rsp,[rbp-38h]
; 00007FFAA8BA96FB 5B pop rbx
; 00007FFAA8BA96FC 5E pop rsi
; 00007FFAA8BA96FD 5F pop rdi
; 00007FFAA8BA96FE 41 5C pop r12
; 00007FFAA8BA9700 41 5D pop r13
; 00007FFAA8BA9702 41 5E pop r14
; 00007FFAA8BA9704 41 5F pop r15
; 00007FFAA8BA9706 5D pop rbp
; 00007FFAA8BA9707 C3 ret
; --- D:\workspace\_work\1\s\src\coreclr\src\vm\jithelpers.cpp -------------------
; 00007FFB0448B4B0 44 8B 05 79 8A 3C 00 mov r8d,dword ptr [_tls_index (07FFB04853F30h)]
; 00007FFB0448B4B7 4C 8B C9 mov r9,rcx
; 00007FFB0448B4BA 65 48 8B 04 25 58 00 00 00 mov rax,qword ptr gs:[58h]
; 00007FFB0448B4C3 B9 30 01 00 00 mov ecx,130h
; 00007FFB0448B4C8 4A 8B 04 C0 mov rax,qword ptr [rax+r8*8]
; 00007FFB0448B4CC 48 8B 04 01 mov rax,qword ptr [rcx+rax]
; 00007FFB0448B4D0 48 8D 0D 61 87 33 00 lea rcx,[InlinedCallFrame::`vftable' (07FFB047C3C38h)]
; 00007FFB0448B4D7 49 89 09 mov qword ptr [r9],rcx
; 00007FFB0448B4DA 33 C9 xor ecx,ecx
; 00007FFB0448B4DC 4C 8B 05 DD 63 32 00 mov r8,qword ptr [s_gsCookie (07FFB047B18C0h)]
; 00007FFB0448B4E3 4D 89 41 F8 mov qword ptr [r9-8],r8
; 00007FFB0448B4E7 49 89 49 10 mov qword ptr [r9+10h],rcx
; 00007FFB0448B4EB 49 89 49 20 mov qword ptr [r9+20h],rcx
; 00007FFB0448B4EF 49 89 49 28 mov qword ptr [r9+28h],rcx
; 00007FFB0448B4F3 49 89 51 18 mov qword ptr [r9+18h],rdx
; 00007FFB0448B4F7 48 8B 48 10 mov rcx,qword ptr [rax+10h]
; 00007FFB0448B4FB 49 89 49 08 mov qword ptr [r9+8],rcx
; 00007FFB0448B4FF C3 ret
; ----------------------------------------------------------------------------------------------------------------------------------------------------------------
; int run1(in CodeBuffers src)::located://asmrun/sigclient?run1#run1_(CodeBuffers~in)
; public static ReadOnlySpan<byte> run1_ᐤCodeBuffersᕀinᐤ => new byte[191]{0xe9,0xa3,0xca,0x23,0x04,0x5f,0x03,0x02,0xe9,0x5b,0xcb,0x23,0x04,0x5f,0x06,0x01,0xe9,0x13,0x77,0x20,0x04,0x5f,0x09,0x00,0x18,0x41,0xbf,0xa4,0xfa,0x7f,0x00,0x00,0xe8,0x63,0xeb,0xb4,0x5f,0x5e,0x00,0x01,0xe8,0x5b,0xeb,0xb4,0x5f,0x5e,0x04,0x00,0x10,0x42,0xbf,0xa4,0xfa,0x7f,0x00,0x00,0xe8,0x4b,0xeb,0xb4,0x5f,0x5e,0x00,0x00,0x40,0x43,0xbf,0xa4,0xfa,0x7f,0x00,0x00,0xe8,0x3b,0xeb,0xb4,0x5f,0x5e,0x00,0x0c,0xe8,0x33,0xeb,0xb4,0x5f,0x5e,0x02,0x0b,0xe8,0x2b,0xeb,0xb4,0x5f,0x5e,0x04,0x0a,0xe8,0x23,0xeb,0xb4,0x5f,0x5e,0x06,0x09,0xe8,0x1b,0xeb,0xb4,0x5f,0x5e,0x08,0x08,0xe8,0x13,0xeb,0xb4,0x5f,0x5e,0x0a,0x07,0xe8,0x0b,0xeb,0xb4,0x5f,0x5e,0x0c,0x06,0xe8,0x03,0xeb,0xb4,0x5f,0x5e,0x0e,0x05,0xe8,0xfb,0xea,0xb4,0x5f,0x5e,0x10,0x04,0xe8,0xf3,0xea,0xb4,0x5f,0x5e,0x12,0x03,0xe8,0xeb,0xea,0xb4,0x5f,0x5e,0x14,0x02,0xe8,0xe3,0xea,0xb4,0x5f,0x5e,0x16,0x01,0xe8,0xdb,0xea,0xb4,0x5f,0x5e,0x18,0x00,0x60,0x44,0xbf,0xa4,0xfa,0x7f,0x00,0x00,0xe9,0xeb,0x42,0x00,0x00,0x5f,0x00};
; BaseAddress = 7ffaa499acb8h
; TermCode = CTC_Zx7
0000h jmp near ptr 423caa8h ; JMP rel32 | E9 cd | 5 | e9 a3 ca 23 04
0005h pop rdi ; POP r64 | 58 +ro | 1 | 5f
; 00007FFAA499ACB8 E9 A3 CA 23 04 jmp Z0.SigClient.run1(Z0.CodeBuffers ByRef) (07FFAA8BD7760h)
; 00007FFAA499ACBD 5F pop rdi
; 00007FFAA8BD7760 55 push rbp
; 00007FFAA8BD7761 41 57 push r15
; 00007FFAA8BD7763 41 56 push r14
; 00007FFAA8BD7765 41 55 push r13
; 00007FFAA8BD7767 41 54 push r12
; 00007FFAA8BD7769 57 push rdi
; 00007FFAA8BD776A 56 push rsi
; 00007FFAA8BD776B 53 push rbx
; 00007FFAA8BD776C 48 83 EC 68 sub rsp,68h
; 00007FFAA8BD7770 48 8D AC 24 A0 00 00 00 lea rbp,[rsp+0A0h]
; 00007FFAA8BD7778 48 8D 4D 88 lea rcx,[rbp-78h]
; 00007FFAA8BD777C 49 8B D2 mov rdx,r10
; 00007FFAA8BD777F E8 2C 3D 8B 5B call JIT_InitPInvokeFrame (07FFB0448B4B0h)
; 00007FFAA8BD7784 48 8B F0 mov rsi,rax
; 00007FFAA8BD7787 48 8B CC mov rcx,rsp
; 00007FFAA8BD778A 48 89 4D A8 mov qword ptr [rbp-58h],rcx
; 00007FFAA8BD778E 48 8B CD mov rcx,rbp
; 00007FFAA8BD7791 48 89 4D B8 mov qword ptr [rbp-48h],rcx
; 00007FFAA8BD7795 B9 2A 00 00 00 mov ecx,2Ah
; 00007FFAA8BD779A BA 7A 01 00 00 mov edx,17Ah
; 00007FFAA8BD779F 48 8D 05 1C 00 00 00 lea rax,[Z0.SigClient.run1(Z0.CodeBuffers ByRef)+062h (07FFAA8BD77C2h)]
; 00007FFAA8BD77A6 48 89 45 B0 mov qword ptr [rbp-50h],rax
; 00007FFAA8BD77AA 48 8D 45 88 lea rax,[rbp-78h]
; 00007FFAA8BD77AE 48 89 46 10 mov qword ptr [rsi+10h],rax
; 00007FFAA8BD77B2 C6 46 0C 00 mov byte ptr [rsi+0Ch],0
; 00007FFAA8BD77B6 48 B8 B0 13 19 02 FB 7F 00 00 mov rax,7FFB021913B0h
; 00007FFAA8BD77C0 FF D0 call rax
; 00007FFAA8BD77C2 C6 46 0C 01 mov byte ptr [rsi+0Ch],1
; 00007FFAA8BD77C6 83 3D AF 68 C8 5B 00 cmp dword ptr [g_TrapReturningThreads (07FFB0485E07Ch)],0
; 00007FFAA8BD77CD 74 06 je Z0.SigClient.run1(Z0.CodeBuffers ByRef)+075h (07FFAA8BD77D5h)
; 00007FFAA8BD77CF FF 15 93 8B C7 5B call qword ptr [hlpDynamicFuncTable+0A8h (07FFB04850368h)]
; 00007FFAA8BD77D5 48 8B 55 90 mov rdx,qword ptr [rbp-70h]
; 00007FFAA8BD77D9 48 89 56 10 mov qword ptr [rsi+10h],rdx
; 00007FFAA8BD77DD 48 8D 65 C8 lea rsp,[rbp-38h]
; 00007FFAA8BD77E1 5B pop rbx
; 00007FFAA8BD77E2 5E pop rsi
; 00007FFAA8BD77E3 5F pop rdi
; 00007FFAA8BD77E4 41 5C pop r12
; 00007FFAA8BD77E6 41 5D pop r13
; 00007FFAA8BD77E8 41 5E pop r14
; 00007FFAA8BD77EA 41 5F pop r15
; 00007FFAA8BD77EC 5D pop rbp
; 00007FFAA8BD77ED C3 ret
| 89.102041 | 1,196 | 0.593831 |
85472813e015cf3ec69dbda7b2ec2b216dfe890a | 101,046 | asm | Assembly | oslab6/obj/user/faultdie.asm | jasha64/OperatingSystems-lab | 25a473adb754171d5c10c6bde391e0e07a2a43de | [
"MIT"
] | null | null | null | oslab6/obj/user/faultdie.asm | jasha64/OperatingSystems-lab | 25a473adb754171d5c10c6bde391e0e07a2a43de | [
"MIT"
] | null | null | null | oslab6/obj/user/faultdie.asm | jasha64/OperatingSystems-lab | 25a473adb754171d5c10c6bde391e0e07a2a43de | [
"MIT"
] | null | null | null |
obj/user/faultdie.debug： 文件格式 elf32-i386
Disassembly of section .text:
00800020 <_start>:
// starts us running when we are initially loaded into a new environment.
.text
.globl _start
_start:
// See if we were started with arguments on the stack
cmpl $USTACKTOP, %esp
800020: 81 fc 00 e0 bf ee cmp $0xeebfe000,%esp
jne args_exist
800026: 75 04 jne 80002c <args_exist>
// If not, push dummy argc/argv arguments.
// This happens when we are loaded by the kernel,
// because the kernel does not know about passing arguments.
pushl $0
800028: 6a 00 push $0x0
pushl $0
80002a: 6a 00 push $0x0
0080002c <args_exist>:
args_exist:
call libmain
80002c: e8 4f 00 00 00 call 800080 <libmain>
1: jmp 1b
800031: eb fe jmp 800031 <args_exist+0x5>
00800033 <handler>:
#include <inc/lib.h>
void
handler(struct UTrapframe *utf)
{
800033: 55 push %ebp
800034: 89 e5 mov %esp,%ebp
800036: 83 ec 0c sub $0xc,%esp
800039: 8b 55 08 mov 0x8(%ebp),%edx
void *addr = (void*)utf->utf_fault_va;
uint32_t err = utf->utf_err;
cprintf("i faulted at va %x, err %x\n", addr, err & 7);
80003c: 8b 42 04 mov 0x4(%edx),%eax
80003f: 83 e0 07 and $0x7,%eax
800042: 50 push %eax
800043: ff 32 pushl (%edx)
800045: 68 80 10 80 00 push $0x801080
80004a: e8 1e 01 00 00 call 80016d <cprintf>
sys_env_destroy(sys_getenvid());
80004f: e8 f3 0a 00 00 call 800b47 <sys_getenvid>
800054: 89 04 24 mov %eax,(%esp)
800057: e8 aa 0a 00 00 call 800b06 <sys_env_destroy>
}
80005c: 83 c4 10 add $0x10,%esp
80005f: c9 leave
800060: c3 ret
00800061 <umain>:
void
umain(int argc, char **argv)
{
800061: 55 push %ebp
800062: 89 e5 mov %esp,%ebp
800064: 83 ec 14 sub $0x14,%esp
set_pgfault_handler(handler);
800067: 68 33 00 80 00 push $0x800033
80006c: e8 05 0d 00 00 call 800d76 <set_pgfault_handler>
*(int*)0xDeadBeef = 0;
800071: c7 05 ef be ad de 00 movl $0x0,0xdeadbeef
800078: 00 00 00
}
80007b: 83 c4 10 add $0x10,%esp
80007e: c9 leave
80007f: c3 ret
00800080 <libmain>:
const volatile struct Env *thisenv;
const char *binaryname = "<unknown>";
void
libmain(int argc, char **argv)
{
800080: 55 push %ebp
800081: 89 e5 mov %esp,%ebp
800083: 56 push %esi
800084: 53 push %ebx
800085: 8b 5d 08 mov 0x8(%ebp),%ebx
800088: 8b 75 0c mov 0xc(%ebp),%esi
// set thisenv to point at our Env structure in envs[].
// LAB 3: Your code here.
envid_t envid = sys_getenvid();
80008b: e8 b7 0a 00 00 call 800b47 <sys_getenvid>
thisenv = envs + ENVX(envid);
800090: 25 ff 03 00 00 and $0x3ff,%eax
800095: 6b c0 7c imul $0x7c,%eax,%eax
800098: 05 00 00 c0 ee add $0xeec00000,%eax
80009d: a3 04 20 80 00 mov %eax,0x802004
// save the name of the program so that panic() can use it
if (argc > 0)
8000a2: 85 db test %ebx,%ebx
8000a4: 7e 07 jle 8000ad <libmain+0x2d>
binaryname = argv[0];
8000a6: 8b 06 mov (%esi),%eax
8000a8: a3 00 20 80 00 mov %eax,0x802000
// call user main routine
umain(argc, argv);
8000ad: 83 ec 08 sub $0x8,%esp
8000b0: 56 push %esi
8000b1: 53 push %ebx
8000b2: e8 aa ff ff ff call 800061 <umain>
// exit gracefully
exit();
8000b7: e8 0a 00 00 00 call 8000c6 <exit>
}
8000bc: 83 c4 10 add $0x10,%esp
8000bf: 8d 65 f8 lea -0x8(%ebp),%esp
8000c2: 5b pop %ebx
8000c3: 5e pop %esi
8000c4: 5d pop %ebp
8000c5: c3 ret
008000c6 <exit>:
#include <inc/lib.h>
void
exit(void)
{
8000c6: 55 push %ebp
8000c7: 89 e5 mov %esp,%ebp
8000c9: 83 ec 14 sub $0x14,%esp
// close_all();
sys_env_destroy(0);
8000cc: 6a 00 push $0x0
8000ce: e8 33 0a 00 00 call 800b06 <sys_env_destroy>
}
8000d3: 83 c4 10 add $0x10,%esp
8000d6: c9 leave
8000d7: c3 ret
008000d8 <putch>:
};
static void
putch(int ch, struct printbuf *b)
{
8000d8: 55 push %ebp
8000d9: 89 e5 mov %esp,%ebp
8000db: 53 push %ebx
8000dc: 83 ec 04 sub $0x4,%esp
8000df: 8b 5d 0c mov 0xc(%ebp),%ebx
b->buf[b->idx++] = ch;
8000e2: 8b 13 mov (%ebx),%edx
8000e4: 8d 42 01 lea 0x1(%edx),%eax
8000e7: 89 03 mov %eax,(%ebx)
8000e9: 8b 4d 08 mov 0x8(%ebp),%ecx
8000ec: 88 4c 13 08 mov %cl,0x8(%ebx,%edx,1)
if (b->idx == 256-1) {
8000f0: 3d ff 00 00 00 cmp $0xff,%eax
8000f5: 74 09 je 800100 <putch+0x28>
sys_cputs(b->buf, b->idx);
b->idx = 0;
}
b->cnt++;
8000f7: 83 43 04 01 addl $0x1,0x4(%ebx)
}
8000fb: 8b 5d fc mov -0x4(%ebp),%ebx
8000fe: c9 leave
8000ff: c3 ret
sys_cputs(b->buf, b->idx);
800100: 83 ec 08 sub $0x8,%esp
800103: 68 ff 00 00 00 push $0xff
800108: 8d 43 08 lea 0x8(%ebx),%eax
80010b: 50 push %eax
80010c: e8 b8 09 00 00 call 800ac9 <sys_cputs>
b->idx = 0;
800111: c7 03 00 00 00 00 movl $0x0,(%ebx)
800117: 83 c4 10 add $0x10,%esp
80011a: eb db jmp 8000f7 <putch+0x1f>
0080011c <vcprintf>:
int
vcprintf(const char *fmt, va_list ap)
{
80011c: 55 push %ebp
80011d: 89 e5 mov %esp,%ebp
80011f: 81 ec 18 01 00 00 sub $0x118,%esp
struct printbuf b;
b.idx = 0;
800125: c7 85 f0 fe ff ff 00 movl $0x0,-0x110(%ebp)
80012c: 00 00 00
b.cnt = 0;
80012f: c7 85 f4 fe ff ff 00 movl $0x0,-0x10c(%ebp)
800136: 00 00 00
vprintfmt((void*)putch, &b, fmt, ap);
800139: ff 75 0c pushl 0xc(%ebp)
80013c: ff 75 08 pushl 0x8(%ebp)
80013f: 8d 85 f0 fe ff ff lea -0x110(%ebp),%eax
800145: 50 push %eax
800146: 68 d8 00 80 00 push $0x8000d8
80014b: e8 1a 01 00 00 call 80026a <vprintfmt>
sys_cputs(b.buf, b.idx);
800150: 83 c4 08 add $0x8,%esp
800153: ff b5 f0 fe ff ff pushl -0x110(%ebp)
800159: 8d 85 f8 fe ff ff lea -0x108(%ebp),%eax
80015f: 50 push %eax
800160: e8 64 09 00 00 call 800ac9 <sys_cputs>
return b.cnt;
}
800165: 8b 85 f4 fe ff ff mov -0x10c(%ebp),%eax
80016b: c9 leave
80016c: c3 ret
0080016d <cprintf>:
int
cprintf(const char *fmt, ...)
{
80016d: 55 push %ebp
80016e: 89 e5 mov %esp,%ebp
800170: 83 ec 10 sub $0x10,%esp
va_list ap;
int cnt;
va_start(ap, fmt);
800173: 8d 45 0c lea 0xc(%ebp),%eax
cnt = vcprintf(fmt, ap);
800176: 50 push %eax
800177: ff 75 08 pushl 0x8(%ebp)
80017a: e8 9d ff ff ff call 80011c <vcprintf>
va_end(ap);
return cnt;
}
80017f: c9 leave
800180: c3 ret
00800181 <printnum>:
* using specified putch function and associated pointer putdat.
*/
static void
printnum(void (*putch)(int, void*), void *putdat,
unsigned long long num, unsigned base, int width, int padc)
{
800181: 55 push %ebp
800182: 89 e5 mov %esp,%ebp
800184: 57 push %edi
800185: 56 push %esi
800186: 53 push %ebx
800187: 83 ec 1c sub $0x1c,%esp
80018a: 89 c7 mov %eax,%edi
80018c: 89 d6 mov %edx,%esi
80018e: 8b 45 08 mov 0x8(%ebp),%eax
800191: 8b 55 0c mov 0xc(%ebp),%edx
800194: 89 45 d8 mov %eax,-0x28(%ebp)
800197: 89 55 dc mov %edx,-0x24(%ebp)
// first recursively print all preceding (more significant) digits
if (num >= base) {
80019a: 8b 4d 10 mov 0x10(%ebp),%ecx
80019d: bb 00 00 00 00 mov $0x0,%ebx
8001a2: 89 4d e0 mov %ecx,-0x20(%ebp)
8001a5: 89 5d e4 mov %ebx,-0x1c(%ebp)
8001a8: 39 d3 cmp %edx,%ebx
8001aa: 72 05 jb 8001b1 <printnum+0x30>
8001ac: 39 45 10 cmp %eax,0x10(%ebp)
8001af: 77 7a ja 80022b <printnum+0xaa>
printnum(putch, putdat, num / base, base, width - 1, padc);
8001b1: 83 ec 0c sub $0xc,%esp
8001b4: ff 75 18 pushl 0x18(%ebp)
8001b7: 8b 45 14 mov 0x14(%ebp),%eax
8001ba: 8d 58 ff lea -0x1(%eax),%ebx
8001bd: 53 push %ebx
8001be: ff 75 10 pushl 0x10(%ebp)
8001c1: 83 ec 08 sub $0x8,%esp
8001c4: ff 75 e4 pushl -0x1c(%ebp)
8001c7: ff 75 e0 pushl -0x20(%ebp)
8001ca: ff 75 dc pushl -0x24(%ebp)
8001cd: ff 75 d8 pushl -0x28(%ebp)
8001d0: e8 6b 0c 00 00 call 800e40 <__udivdi3>
8001d5: 83 c4 18 add $0x18,%esp
8001d8: 52 push %edx
8001d9: 50 push %eax
8001da: 89 f2 mov %esi,%edx
8001dc: 89 f8 mov %edi,%eax
8001de: e8 9e ff ff ff call 800181 <printnum>
8001e3: 83 c4 20 add $0x20,%esp
8001e6: eb 13 jmp 8001fb <printnum+0x7a>
} else {
// print any needed pad characters before first digit
while (--width > 0)
putch(padc, putdat);
8001e8: 83 ec 08 sub $0x8,%esp
8001eb: 56 push %esi
8001ec: ff 75 18 pushl 0x18(%ebp)
8001ef: ff d7 call *%edi
8001f1: 83 c4 10 add $0x10,%esp
while (--width > 0)
8001f4: 83 eb 01 sub $0x1,%ebx
8001f7: 85 db test %ebx,%ebx
8001f9: 7f ed jg 8001e8 <printnum+0x67>
}
// then print this (the least significant) digit
putch("0123456789abcdef"[num % base], putdat);
8001fb: 83 ec 08 sub $0x8,%esp
8001fe: 56 push %esi
8001ff: 83 ec 04 sub $0x4,%esp
800202: ff 75 e4 pushl -0x1c(%ebp)
800205: ff 75 e0 pushl -0x20(%ebp)
800208: ff 75 dc pushl -0x24(%ebp)
80020b: ff 75 d8 pushl -0x28(%ebp)
80020e: e8 4d 0d 00 00 call 800f60 <__umoddi3>
800213: 83 c4 14 add $0x14,%esp
800216: 0f be 80 a6 10 80 00 movsbl 0x8010a6(%eax),%eax
80021d: 50 push %eax
80021e: ff d7 call *%edi
}
800220: 83 c4 10 add $0x10,%esp
800223: 8d 65 f4 lea -0xc(%ebp),%esp
800226: 5b pop %ebx
800227: 5e pop %esi
800228: 5f pop %edi
800229: 5d pop %ebp
80022a: c3 ret
80022b: 8b 5d 14 mov 0x14(%ebp),%ebx
80022e: eb c4 jmp 8001f4 <printnum+0x73>
00800230 <sprintputch>:
int cnt;
};
static void
sprintputch(int ch, struct sprintbuf *b)
{
800230: 55 push %ebp
800231: 89 e5 mov %esp,%ebp
800233: 8b 45 0c mov 0xc(%ebp),%eax
b->cnt++;
800236: 83 40 08 01 addl $0x1,0x8(%eax)
if (b->buf < b->ebuf)
80023a: 8b 10 mov (%eax),%edx
80023c: 3b 50 04 cmp 0x4(%eax),%edx
80023f: 73 0a jae 80024b <sprintputch+0x1b>
*b->buf++ = ch;
800241: 8d 4a 01 lea 0x1(%edx),%ecx
800244: 89 08 mov %ecx,(%eax)
800246: 8b 45 08 mov 0x8(%ebp),%eax
800249: 88 02 mov %al,(%edx)
}
80024b: 5d pop %ebp
80024c: c3 ret
0080024d <printfmt>:
{
80024d: 55 push %ebp
80024e: 89 e5 mov %esp,%ebp
800250: 83 ec 08 sub $0x8,%esp
va_start(ap, fmt);
800253: 8d 45 14 lea 0x14(%ebp),%eax
vprintfmt(putch, putdat, fmt, ap);
800256: 50 push %eax
800257: ff 75 10 pushl 0x10(%ebp)
80025a: ff 75 0c pushl 0xc(%ebp)
80025d: ff 75 08 pushl 0x8(%ebp)
800260: e8 05 00 00 00 call 80026a <vprintfmt>
}
800265: 83 c4 10 add $0x10,%esp
800268: c9 leave
800269: c3 ret
0080026a <vprintfmt>:
{
80026a: 55 push %ebp
80026b: 89 e5 mov %esp,%ebp
80026d: 57 push %edi
80026e: 56 push %esi
80026f: 53 push %ebx
800270: 83 ec 2c sub $0x2c,%esp
800273: 8b 75 08 mov 0x8(%ebp),%esi
800276: 8b 5d 0c mov 0xc(%ebp),%ebx
800279: 8b 7d 10 mov 0x10(%ebp),%edi
80027c: e9 c1 03 00 00 jmp 800642 <vprintfmt+0x3d8>
padc = ' ';
800281: c6 45 d4 20 movb $0x20,-0x2c(%ebp)
altflag = 0;
800285: c7 45 d8 00 00 00 00 movl $0x0,-0x28(%ebp)
precision = -1;
80028c: c7 45 d0 ff ff ff ff movl $0xffffffff,-0x30(%ebp)
width = -1;
800293: c7 45 e0 ff ff ff ff movl $0xffffffff,-0x20(%ebp)
lflag = 0;
80029a: b9 00 00 00 00 mov $0x0,%ecx
switch (ch = *(unsigned char *) fmt++) {
80029f: 8d 47 01 lea 0x1(%edi),%eax
8002a2: 89 45 e4 mov %eax,-0x1c(%ebp)
8002a5: 0f b6 17 movzbl (%edi),%edx
8002a8: 8d 42 dd lea -0x23(%edx),%eax
8002ab: 3c 55 cmp $0x55,%al
8002ad: 0f 87 12 04 00 00 ja 8006c5 <vprintfmt+0x45b>
8002b3: 0f b6 c0 movzbl %al,%eax
8002b6: ff 24 85 e0 11 80 00 jmp *0x8011e0(,%eax,4)
8002bd: 8b 7d e4 mov -0x1c(%ebp),%edi
padc = '-';
8002c0: c6 45 d4 2d movb $0x2d,-0x2c(%ebp)
8002c4: eb d9 jmp 80029f <vprintfmt+0x35>
switch (ch = *(unsigned char *) fmt++) {
8002c6: 8b 7d e4 mov -0x1c(%ebp),%edi
padc = '0';
8002c9: c6 45 d4 30 movb $0x30,-0x2c(%ebp)
8002cd: eb d0 jmp 80029f <vprintfmt+0x35>
switch (ch = *(unsigned char *) fmt++) {
8002cf: 0f b6 d2 movzbl %dl,%edx
8002d2: 8b 7d e4 mov -0x1c(%ebp),%edi
for (precision = 0; ; ++fmt) {
8002d5: b8 00 00 00 00 mov $0x0,%eax
8002da: 89 4d e4 mov %ecx,-0x1c(%ebp)
precision = precision * 10 + ch - '0';
8002dd: 8d 04 80 lea (%eax,%eax,4),%eax
8002e0: 8d 44 42 d0 lea -0x30(%edx,%eax,2),%eax
ch = *fmt;
8002e4: 0f be 17 movsbl (%edi),%edx
if (ch < '0' || ch > '9')
8002e7: 8d 4a d0 lea -0x30(%edx),%ecx
8002ea: 83 f9 09 cmp $0x9,%ecx
8002ed: 77 55 ja 800344 <vprintfmt+0xda>
for (precision = 0; ; ++fmt) {
8002ef: 83 c7 01 add $0x1,%edi
precision = precision * 10 + ch - '0';
8002f2: eb e9 jmp 8002dd <vprintfmt+0x73>
precision = va_arg(ap, int);
8002f4: 8b 45 14 mov 0x14(%ebp),%eax
8002f7: 8b 00 mov (%eax),%eax
8002f9: 89 45 d0 mov %eax,-0x30(%ebp)
8002fc: 8b 45 14 mov 0x14(%ebp),%eax
8002ff: 8d 40 04 lea 0x4(%eax),%eax
800302: 89 45 14 mov %eax,0x14(%ebp)
switch (ch = *(unsigned char *) fmt++) {
800305: 8b 7d e4 mov -0x1c(%ebp),%edi
if (width < 0)
800308: 83 7d e0 00 cmpl $0x0,-0x20(%ebp)
80030c: 79 91 jns 80029f <vprintfmt+0x35>
width = precision, precision = -1;
80030e: 8b 45 d0 mov -0x30(%ebp),%eax
800311: 89 45 e0 mov %eax,-0x20(%ebp)
800314: c7 45 d0 ff ff ff ff movl $0xffffffff,-0x30(%ebp)
80031b: eb 82 jmp 80029f <vprintfmt+0x35>
80031d: 8b 45 e0 mov -0x20(%ebp),%eax
800320: 85 c0 test %eax,%eax
800322: ba 00 00 00 00 mov $0x0,%edx
800327: 0f 49 d0 cmovns %eax,%edx
80032a: 89 55 e0 mov %edx,-0x20(%ebp)
switch (ch = *(unsigned char *) fmt++) {
80032d: 8b 7d e4 mov -0x1c(%ebp),%edi
800330: e9 6a ff ff ff jmp 80029f <vprintfmt+0x35>
800335: 8b 7d e4 mov -0x1c(%ebp),%edi
altflag = 1;
800338: c7 45 d8 01 00 00 00 movl $0x1,-0x28(%ebp)
goto reswitch;
80033f: e9 5b ff ff ff jmp 80029f <vprintfmt+0x35>
800344: 8b 4d e4 mov -0x1c(%ebp),%ecx
800347: 89 45 d0 mov %eax,-0x30(%ebp)
80034a: eb bc jmp 800308 <vprintfmt+0x9e>
lflag++;
80034c: 83 c1 01 add $0x1,%ecx
switch (ch = *(unsigned char *) fmt++) {
80034f: 8b 7d e4 mov -0x1c(%ebp),%edi
goto reswitch;
800352: e9 48 ff ff ff jmp 80029f <vprintfmt+0x35>
putch(va_arg(ap, int), putdat);
800357: 8b 45 14 mov 0x14(%ebp),%eax
80035a: 8d 78 04 lea 0x4(%eax),%edi
80035d: 83 ec 08 sub $0x8,%esp
800360: 53 push %ebx
800361: ff 30 pushl (%eax)
800363: ff d6 call *%esi
break;
800365: 83 c4 10 add $0x10,%esp
putch(va_arg(ap, int), putdat);
800368: 89 7d 14 mov %edi,0x14(%ebp)
break;
80036b: e9 cf 02 00 00 jmp 80063f <vprintfmt+0x3d5>
err = va_arg(ap, int);
800370: 8b 45 14 mov 0x14(%ebp),%eax
800373: 8d 78 04 lea 0x4(%eax),%edi
800376: 8b 00 mov (%eax),%eax
800378: 99 cltd
800379: 31 d0 xor %edx,%eax
80037b: 29 d0 sub %edx,%eax
if (err >= MAXERROR || (p = error_string[err]) == NULL)
80037d: 83 f8 0f cmp $0xf,%eax
800380: 7f 23 jg 8003a5 <vprintfmt+0x13b>
800382: 8b 14 85 40 13 80 00 mov 0x801340(,%eax,4),%edx
800389: 85 d2 test %edx,%edx
80038b: 74 18 je 8003a5 <vprintfmt+0x13b>
printfmt(putch, putdat, "%s", p);
80038d: 52 push %edx
80038e: 68 c7 10 80 00 push $0x8010c7
800393: 53 push %ebx
800394: 56 push %esi
800395: e8 b3 fe ff ff call 80024d <printfmt>
80039a: 83 c4 10 add $0x10,%esp
err = va_arg(ap, int);
80039d: 89 7d 14 mov %edi,0x14(%ebp)
8003a0: e9 9a 02 00 00 jmp 80063f <vprintfmt+0x3d5>
printfmt(putch, putdat, "error %d", err);
8003a5: 50 push %eax
8003a6: 68 be 10 80 00 push $0x8010be
8003ab: 53 push %ebx
8003ac: 56 push %esi
8003ad: e8 9b fe ff ff call 80024d <printfmt>
8003b2: 83 c4 10 add $0x10,%esp
err = va_arg(ap, int);
8003b5: 89 7d 14 mov %edi,0x14(%ebp)
printfmt(putch, putdat, "error %d", err);
8003b8: e9 82 02 00 00 jmp 80063f <vprintfmt+0x3d5>
if ((p = va_arg(ap, char *)) == NULL)
8003bd: 8b 45 14 mov 0x14(%ebp),%eax
8003c0: 83 c0 04 add $0x4,%eax
8003c3: 89 45 cc mov %eax,-0x34(%ebp)
8003c6: 8b 45 14 mov 0x14(%ebp),%eax
8003c9: 8b 38 mov (%eax),%edi
p = "(null)";
8003cb: 85 ff test %edi,%edi
8003cd: b8 b7 10 80 00 mov $0x8010b7,%eax
8003d2: 0f 44 f8 cmove %eax,%edi
if (width > 0 && padc != '-')
8003d5: 83 7d e0 00 cmpl $0x0,-0x20(%ebp)
8003d9: 0f 8e bd 00 00 00 jle 80049c <vprintfmt+0x232>
8003df: 80 7d d4 2d cmpb $0x2d,-0x2c(%ebp)
8003e3: 75 0e jne 8003f3 <vprintfmt+0x189>
8003e5: 89 75 08 mov %esi,0x8(%ebp)
8003e8: 8b 75 d0 mov -0x30(%ebp),%esi
8003eb: 89 5d 0c mov %ebx,0xc(%ebp)
8003ee: 8b 5d e0 mov -0x20(%ebp),%ebx
8003f1: eb 6d jmp 800460 <vprintfmt+0x1f6>
for (width -= strnlen(p, precision); width > 0; width--)
8003f3: 83 ec 08 sub $0x8,%esp
8003f6: ff 75 d0 pushl -0x30(%ebp)
8003f9: 57 push %edi
8003fa: e8 6e 03 00 00 call 80076d <strnlen>
8003ff: 8b 4d e0 mov -0x20(%ebp),%ecx
800402: 29 c1 sub %eax,%ecx
800404: 89 4d c8 mov %ecx,-0x38(%ebp)
800407: 83 c4 10 add $0x10,%esp
putch(padc, putdat);
80040a: 0f be 45 d4 movsbl -0x2c(%ebp),%eax
80040e: 89 45 e0 mov %eax,-0x20(%ebp)
800411: 89 7d d4 mov %edi,-0x2c(%ebp)
800414: 89 cf mov %ecx,%edi
for (width -= strnlen(p, precision); width > 0; width--)
800416: eb 0f jmp 800427 <vprintfmt+0x1bd>
putch(padc, putdat);
800418: 83 ec 08 sub $0x8,%esp
80041b: 53 push %ebx
80041c: ff 75 e0 pushl -0x20(%ebp)
80041f: ff d6 call *%esi
for (width -= strnlen(p, precision); width > 0; width--)
800421: 83 ef 01 sub $0x1,%edi
800424: 83 c4 10 add $0x10,%esp
800427: 85 ff test %edi,%edi
800429: 7f ed jg 800418 <vprintfmt+0x1ae>
80042b: 8b 7d d4 mov -0x2c(%ebp),%edi
80042e: 8b 4d c8 mov -0x38(%ebp),%ecx
800431: 85 c9 test %ecx,%ecx
800433: b8 00 00 00 00 mov $0x0,%eax
800438: 0f 49 c1 cmovns %ecx,%eax
80043b: 29 c1 sub %eax,%ecx
80043d: 89 75 08 mov %esi,0x8(%ebp)
800440: 8b 75 d0 mov -0x30(%ebp),%esi
800443: 89 5d 0c mov %ebx,0xc(%ebp)
800446: 89 cb mov %ecx,%ebx
800448: eb 16 jmp 800460 <vprintfmt+0x1f6>
if (altflag && (ch < ' ' || ch > '~'))
80044a: 83 7d d8 00 cmpl $0x0,-0x28(%ebp)
80044e: 75 31 jne 800481 <vprintfmt+0x217>
putch(ch, putdat);
800450: 83 ec 08 sub $0x8,%esp
800453: ff 75 0c pushl 0xc(%ebp)
800456: 50 push %eax
800457: ff 55 08 call *0x8(%ebp)
80045a: 83 c4 10 add $0x10,%esp
for (; (ch = *p++) != '\0' && (precision < 0 || --precision >= 0); width--)
80045d: 83 eb 01 sub $0x1,%ebx
800460: 83 c7 01 add $0x1,%edi
800463: 0f b6 57 ff movzbl -0x1(%edi),%edx
800467: 0f be c2 movsbl %dl,%eax
80046a: 85 c0 test %eax,%eax
80046c: 74 59 je 8004c7 <vprintfmt+0x25d>
80046e: 85 f6 test %esi,%esi
800470: 78 d8 js 80044a <vprintfmt+0x1e0>
800472: 83 ee 01 sub $0x1,%esi
800475: 79 d3 jns 80044a <vprintfmt+0x1e0>
800477: 89 df mov %ebx,%edi
800479: 8b 75 08 mov 0x8(%ebp),%esi
80047c: 8b 5d 0c mov 0xc(%ebp),%ebx
80047f: eb 37 jmp 8004b8 <vprintfmt+0x24e>
if (altflag && (ch < ' ' || ch > '~'))
800481: 0f be d2 movsbl %dl,%edx
800484: 83 ea 20 sub $0x20,%edx
800487: 83 fa 5e cmp $0x5e,%edx
80048a: 76 c4 jbe 800450 <vprintfmt+0x1e6>
putch('?', putdat);
80048c: 83 ec 08 sub $0x8,%esp
80048f: ff 75 0c pushl 0xc(%ebp)
800492: 6a 3f push $0x3f
800494: ff 55 08 call *0x8(%ebp)
800497: 83 c4 10 add $0x10,%esp
80049a: eb c1 jmp 80045d <vprintfmt+0x1f3>
80049c: 89 75 08 mov %esi,0x8(%ebp)
80049f: 8b 75 d0 mov -0x30(%ebp),%esi
8004a2: 89 5d 0c mov %ebx,0xc(%ebp)
8004a5: 8b 5d e0 mov -0x20(%ebp),%ebx
8004a8: eb b6 jmp 800460 <vprintfmt+0x1f6>
putch(' ', putdat);
8004aa: 83 ec 08 sub $0x8,%esp
8004ad: 53 push %ebx
8004ae: 6a 20 push $0x20
8004b0: ff d6 call *%esi
for (; width > 0; width--)
8004b2: 83 ef 01 sub $0x1,%edi
8004b5: 83 c4 10 add $0x10,%esp
8004b8: 85 ff test %edi,%edi
8004ba: 7f ee jg 8004aa <vprintfmt+0x240>
if ((p = va_arg(ap, char *)) == NULL)
8004bc: 8b 45 cc mov -0x34(%ebp),%eax
8004bf: 89 45 14 mov %eax,0x14(%ebp)
8004c2: e9 78 01 00 00 jmp 80063f <vprintfmt+0x3d5>
8004c7: 89 df mov %ebx,%edi
8004c9: 8b 75 08 mov 0x8(%ebp),%esi
8004cc: 8b 5d 0c mov 0xc(%ebp),%ebx
8004cf: eb e7 jmp 8004b8 <vprintfmt+0x24e>
if (lflag >= 2)
8004d1: 83 f9 01 cmp $0x1,%ecx
8004d4: 7e 3f jle 800515 <vprintfmt+0x2ab>
return va_arg(*ap, long long);
8004d6: 8b 45 14 mov 0x14(%ebp),%eax
8004d9: 8b 50 04 mov 0x4(%eax),%edx
8004dc: 8b 00 mov (%eax),%eax
8004de: 89 45 d8 mov %eax,-0x28(%ebp)
8004e1: 89 55 dc mov %edx,-0x24(%ebp)
8004e4: 8b 45 14 mov 0x14(%ebp),%eax
8004e7: 8d 40 08 lea 0x8(%eax),%eax
8004ea: 89 45 14 mov %eax,0x14(%ebp)
if ((long long) num < 0) {
8004ed: 83 7d dc 00 cmpl $0x0,-0x24(%ebp)
8004f1: 79 5c jns 80054f <vprintfmt+0x2e5>
putch('-', putdat);
8004f3: 83 ec 08 sub $0x8,%esp
8004f6: 53 push %ebx
8004f7: 6a 2d push $0x2d
8004f9: ff d6 call *%esi
num = -(long long) num;
8004fb: 8b 55 d8 mov -0x28(%ebp),%edx
8004fe: 8b 4d dc mov -0x24(%ebp),%ecx
800501: f7 da neg %edx
800503: 83 d1 00 adc $0x0,%ecx
800506: f7 d9 neg %ecx
800508: 83 c4 10 add $0x10,%esp
base = 10;
80050b: b8 0a 00 00 00 mov $0xa,%eax
800510: e9 10 01 00 00 jmp 800625 <vprintfmt+0x3bb>
else if (lflag)
800515: 85 c9 test %ecx,%ecx
800517: 75 1b jne 800534 <vprintfmt+0x2ca>
return va_arg(*ap, int);
800519: 8b 45 14 mov 0x14(%ebp),%eax
80051c: 8b 00 mov (%eax),%eax
80051e: 89 45 d8 mov %eax,-0x28(%ebp)
800521: 89 c1 mov %eax,%ecx
800523: c1 f9 1f sar $0x1f,%ecx
800526: 89 4d dc mov %ecx,-0x24(%ebp)
800529: 8b 45 14 mov 0x14(%ebp),%eax
80052c: 8d 40 04 lea 0x4(%eax),%eax
80052f: 89 45 14 mov %eax,0x14(%ebp)
800532: eb b9 jmp 8004ed <vprintfmt+0x283>
return va_arg(*ap, long);
800534: 8b 45 14 mov 0x14(%ebp),%eax
800537: 8b 00 mov (%eax),%eax
800539: 89 45 d8 mov %eax,-0x28(%ebp)
80053c: 89 c1 mov %eax,%ecx
80053e: c1 f9 1f sar $0x1f,%ecx
800541: 89 4d dc mov %ecx,-0x24(%ebp)
800544: 8b 45 14 mov 0x14(%ebp),%eax
800547: 8d 40 04 lea 0x4(%eax),%eax
80054a: 89 45 14 mov %eax,0x14(%ebp)
80054d: eb 9e jmp 8004ed <vprintfmt+0x283>
num = getint(&ap, lflag);
80054f: 8b 55 d8 mov -0x28(%ebp),%edx
800552: 8b 4d dc mov -0x24(%ebp),%ecx
base = 10;
800555: b8 0a 00 00 00 mov $0xa,%eax
80055a: e9 c6 00 00 00 jmp 800625 <vprintfmt+0x3bb>
if (lflag >= 2)
80055f: 83 f9 01 cmp $0x1,%ecx
800562: 7e 18 jle 80057c <vprintfmt+0x312>
return va_arg(*ap, unsigned long long);
800564: 8b 45 14 mov 0x14(%ebp),%eax
800567: 8b 10 mov (%eax),%edx
800569: 8b 48 04 mov 0x4(%eax),%ecx
80056c: 8d 40 08 lea 0x8(%eax),%eax
80056f: 89 45 14 mov %eax,0x14(%ebp)
base = 10;
800572: b8 0a 00 00 00 mov $0xa,%eax
800577: e9 a9 00 00 00 jmp 800625 <vprintfmt+0x3bb>
else if (lflag)
80057c: 85 c9 test %ecx,%ecx
80057e: 75 1a jne 80059a <vprintfmt+0x330>
return va_arg(*ap, unsigned int);
800580: 8b 45 14 mov 0x14(%ebp),%eax
800583: 8b 10 mov (%eax),%edx
800585: b9 00 00 00 00 mov $0x0,%ecx
80058a: 8d 40 04 lea 0x4(%eax),%eax
80058d: 89 45 14 mov %eax,0x14(%ebp)
base = 10;
800590: b8 0a 00 00 00 mov $0xa,%eax
800595: e9 8b 00 00 00 jmp 800625 <vprintfmt+0x3bb>
return va_arg(*ap, unsigned long);
80059a: 8b 45 14 mov 0x14(%ebp),%eax
80059d: 8b 10 mov (%eax),%edx
80059f: b9 00 00 00 00 mov $0x0,%ecx
8005a4: 8d 40 04 lea 0x4(%eax),%eax
8005a7: 89 45 14 mov %eax,0x14(%ebp)
base = 10;
8005aa: b8 0a 00 00 00 mov $0xa,%eax
8005af: eb 74 jmp 800625 <vprintfmt+0x3bb>
if (lflag >= 2)
8005b1: 83 f9 01 cmp $0x1,%ecx
8005b4: 7e 15 jle 8005cb <vprintfmt+0x361>
return va_arg(*ap, unsigned long long);
8005b6: 8b 45 14 mov 0x14(%ebp),%eax
8005b9: 8b 10 mov (%eax),%edx
8005bb: 8b 48 04 mov 0x4(%eax),%ecx
8005be: 8d 40 08 lea 0x8(%eax),%eax
8005c1: 89 45 14 mov %eax,0x14(%ebp)
base = 8;
8005c4: b8 08 00 00 00 mov $0x8,%eax
8005c9: eb 5a jmp 800625 <vprintfmt+0x3bb>
else if (lflag)
8005cb: 85 c9 test %ecx,%ecx
8005cd: 75 17 jne 8005e6 <vprintfmt+0x37c>
return va_arg(*ap, unsigned int);
8005cf: 8b 45 14 mov 0x14(%ebp),%eax
8005d2: 8b 10 mov (%eax),%edx
8005d4: b9 00 00 00 00 mov $0x0,%ecx
8005d9: 8d 40 04 lea 0x4(%eax),%eax
8005dc: 89 45 14 mov %eax,0x14(%ebp)
base = 8;
8005df: b8 08 00 00 00 mov $0x8,%eax
8005e4: eb 3f jmp 800625 <vprintfmt+0x3bb>
return va_arg(*ap, unsigned long);
8005e6: 8b 45 14 mov 0x14(%ebp),%eax
8005e9: 8b 10 mov (%eax),%edx
8005eb: b9 00 00 00 00 mov $0x0,%ecx
8005f0: 8d 40 04 lea 0x4(%eax),%eax
8005f3: 89 45 14 mov %eax,0x14(%ebp)
base = 8;
8005f6: b8 08 00 00 00 mov $0x8,%eax
8005fb: eb 28 jmp 800625 <vprintfmt+0x3bb>
putch('0', putdat);
8005fd: 83 ec 08 sub $0x8,%esp
800600: 53 push %ebx
800601: 6a 30 push $0x30
800603: ff d6 call *%esi
putch('x', putdat);
800605: 83 c4 08 add $0x8,%esp
800608: 53 push %ebx
800609: 6a 78 push $0x78
80060b: ff d6 call *%esi
num = (unsigned long long)
80060d: 8b 45 14 mov 0x14(%ebp),%eax
800610: 8b 10 mov (%eax),%edx
800612: b9 00 00 00 00 mov $0x0,%ecx
goto number;
800617: 83 c4 10 add $0x10,%esp
(uintptr_t) va_arg(ap, void *);
80061a: 8d 40 04 lea 0x4(%eax),%eax
80061d: 89 45 14 mov %eax,0x14(%ebp)
base = 16;
800620: b8 10 00 00 00 mov $0x10,%eax
printnum(putch, putdat, num, base, width, padc);
800625: 83 ec 0c sub $0xc,%esp
800628: 0f be 7d d4 movsbl -0x2c(%ebp),%edi
80062c: 57 push %edi
80062d: ff 75 e0 pushl -0x20(%ebp)
800630: 50 push %eax
800631: 51 push %ecx
800632: 52 push %edx
800633: 89 da mov %ebx,%edx
800635: 89 f0 mov %esi,%eax
800637: e8 45 fb ff ff call 800181 <printnum>
break;
80063c: 83 c4 20 add $0x20,%esp
err = va_arg(ap, int);
80063f: 8b 7d e4 mov -0x1c(%ebp),%edi
while ((ch = *(unsigned char *) fmt++) != '%') { //先将非格式化字符输出到控制台。
800642: 83 c7 01 add $0x1,%edi
800645: 0f b6 47 ff movzbl -0x1(%edi),%eax
800649: 83 f8 25 cmp $0x25,%eax
80064c: 0f 84 2f fc ff ff je 800281 <vprintfmt+0x17>
if (ch == '\0') //如果没有格式化字符直接返回
800652: 85 c0 test %eax,%eax
800654: 0f 84 8b 00 00 00 je 8006e5 <vprintfmt+0x47b>
putch(ch, putdat);
80065a: 83 ec 08 sub $0x8,%esp
80065d: 53 push %ebx
80065e: 50 push %eax
80065f: ff d6 call *%esi
800661: 83 c4 10 add $0x10,%esp
800664: eb dc jmp 800642 <vprintfmt+0x3d8>
if (lflag >= 2)
800666: 83 f9 01 cmp $0x1,%ecx
800669: 7e 15 jle 800680 <vprintfmt+0x416>
return va_arg(*ap, unsigned long long);
80066b: 8b 45 14 mov 0x14(%ebp),%eax
80066e: 8b 10 mov (%eax),%edx
800670: 8b 48 04 mov 0x4(%eax),%ecx
800673: 8d 40 08 lea 0x8(%eax),%eax
800676: 89 45 14 mov %eax,0x14(%ebp)
base = 16;
800679: b8 10 00 00 00 mov $0x10,%eax
80067e: eb a5 jmp 800625 <vprintfmt+0x3bb>
else if (lflag)
800680: 85 c9 test %ecx,%ecx
800682: 75 17 jne 80069b <vprintfmt+0x431>
return va_arg(*ap, unsigned int);
800684: 8b 45 14 mov 0x14(%ebp),%eax
800687: 8b 10 mov (%eax),%edx
800689: b9 00 00 00 00 mov $0x0,%ecx
80068e: 8d 40 04 lea 0x4(%eax),%eax
800691: 89 45 14 mov %eax,0x14(%ebp)
base = 16;
800694: b8 10 00 00 00 mov $0x10,%eax
800699: eb 8a jmp 800625 <vprintfmt+0x3bb>
return va_arg(*ap, unsigned long);
80069b: 8b 45 14 mov 0x14(%ebp),%eax
80069e: 8b 10 mov (%eax),%edx
8006a0: b9 00 00 00 00 mov $0x0,%ecx
8006a5: 8d 40 04 lea 0x4(%eax),%eax
8006a8: 89 45 14 mov %eax,0x14(%ebp)
base = 16;
8006ab: b8 10 00 00 00 mov $0x10,%eax
8006b0: e9 70 ff ff ff jmp 800625 <vprintfmt+0x3bb>
putch(ch, putdat);
8006b5: 83 ec 08 sub $0x8,%esp
8006b8: 53 push %ebx
8006b9: 6a 25 push $0x25
8006bb: ff d6 call *%esi
break;
8006bd: 83 c4 10 add $0x10,%esp
8006c0: e9 7a ff ff ff jmp 80063f <vprintfmt+0x3d5>
putch('%', putdat);
8006c5: 83 ec 08 sub $0x8,%esp
8006c8: 53 push %ebx
8006c9: 6a 25 push $0x25
8006cb: ff d6 call *%esi
for (fmt--; fmt[-1] != '%'; fmt--)
8006cd: 83 c4 10 add $0x10,%esp
8006d0: 89 f8 mov %edi,%eax
8006d2: eb 03 jmp 8006d7 <vprintfmt+0x46d>
8006d4: 83 e8 01 sub $0x1,%eax
8006d7: 80 78 ff 25 cmpb $0x25,-0x1(%eax)
8006db: 75 f7 jne 8006d4 <vprintfmt+0x46a>
8006dd: 89 45 e4 mov %eax,-0x1c(%ebp)
8006e0: e9 5a ff ff ff jmp 80063f <vprintfmt+0x3d5>
}
8006e5: 8d 65 f4 lea -0xc(%ebp),%esp
8006e8: 5b pop %ebx
8006e9: 5e pop %esi
8006ea: 5f pop %edi
8006eb: 5d pop %ebp
8006ec: c3 ret
008006ed <vsnprintf>:
int
vsnprintf(char *buf, int n, const char *fmt, va_list ap)
{
8006ed: 55 push %ebp
8006ee: 89 e5 mov %esp,%ebp
8006f0: 83 ec 18 sub $0x18,%esp
8006f3: 8b 45 08 mov 0x8(%ebp),%eax
8006f6: 8b 55 0c mov 0xc(%ebp),%edx
struct sprintbuf b = {buf, buf+n-1, 0};
8006f9: 89 45 ec mov %eax,-0x14(%ebp)
8006fc: 8d 4c 10 ff lea -0x1(%eax,%edx,1),%ecx
800700: 89 4d f0 mov %ecx,-0x10(%ebp)
800703: c7 45 f4 00 00 00 00 movl $0x0,-0xc(%ebp)
if (buf == NULL || n < 1)
80070a: 85 c0 test %eax,%eax
80070c: 74 26 je 800734 <vsnprintf+0x47>
80070e: 85 d2 test %edx,%edx
800710: 7e 22 jle 800734 <vsnprintf+0x47>
return -E_INVAL;
// print the string to the buffer
vprintfmt((void*)sprintputch, &b, fmt, ap);
800712: ff 75 14 pushl 0x14(%ebp)
800715: ff 75 10 pushl 0x10(%ebp)
800718: 8d 45 ec lea -0x14(%ebp),%eax
80071b: 50 push %eax
80071c: 68 30 02 80 00 push $0x800230
800721: e8 44 fb ff ff call 80026a <vprintfmt>
// null terminate the buffer
*b.buf = '\0';
800726: 8b 45 ec mov -0x14(%ebp),%eax
800729: c6 00 00 movb $0x0,(%eax)
return b.cnt;
80072c: 8b 45 f4 mov -0xc(%ebp),%eax
80072f: 83 c4 10 add $0x10,%esp
}
800732: c9 leave
800733: c3 ret
return -E_INVAL;
800734: b8 fd ff ff ff mov $0xfffffffd,%eax
800739: eb f7 jmp 800732 <vsnprintf+0x45>
0080073b <snprintf>:
int
snprintf(char *buf, int n, const char *fmt, ...)
{
80073b: 55 push %ebp
80073c: 89 e5 mov %esp,%ebp
80073e: 83 ec 08 sub $0x8,%esp
va_list ap;
int rc;
va_start(ap, fmt);
800741: 8d 45 14 lea 0x14(%ebp),%eax
rc = vsnprintf(buf, n, fmt, ap);
800744: 50 push %eax
800745: ff 75 10 pushl 0x10(%ebp)
800748: ff 75 0c pushl 0xc(%ebp)
80074b: ff 75 08 pushl 0x8(%ebp)
80074e: e8 9a ff ff ff call 8006ed <vsnprintf>
va_end(ap);
return rc;
}
800753: c9 leave
800754: c3 ret
00800755 <strlen>:
// Primespipe runs 3x faster this way.
#define ASM 1
int
strlen(const char *s)
{
800755: 55 push %ebp
800756: 89 e5 mov %esp,%ebp
800758: 8b 55 08 mov 0x8(%ebp),%edx
int n;
for (n = 0; *s != '\0'; s++)
80075b: b8 00 00 00 00 mov $0x0,%eax
800760: eb 03 jmp 800765 <strlen+0x10>
n++;
800762: 83 c0 01 add $0x1,%eax
for (n = 0; *s != '\0'; s++)
800765: 80 3c 02 00 cmpb $0x0,(%edx,%eax,1)
800769: 75 f7 jne 800762 <strlen+0xd>
return n;
}
80076b: 5d pop %ebp
80076c: c3 ret
0080076d <strnlen>:
int
strnlen(const char *s, size_t size)
{
80076d: 55 push %ebp
80076e: 89 e5 mov %esp,%ebp
800770: 8b 4d 08 mov 0x8(%ebp),%ecx
800773: 8b 55 0c mov 0xc(%ebp),%edx
int n;
for (n = 0; size > 0 && *s != '\0'; s++, size--)
800776: b8 00 00 00 00 mov $0x0,%eax
80077b: eb 03 jmp 800780 <strnlen+0x13>
n++;
80077d: 83 c0 01 add $0x1,%eax
for (n = 0; size > 0 && *s != '\0'; s++, size--)
800780: 39 d0 cmp %edx,%eax
800782: 74 06 je 80078a <strnlen+0x1d>
800784: 80 3c 01 00 cmpb $0x0,(%ecx,%eax,1)
800788: 75 f3 jne 80077d <strnlen+0x10>
return n;
}
80078a: 5d pop %ebp
80078b: c3 ret
0080078c <strcpy>:
char *
strcpy(char *dst, const char *src)
{
80078c: 55 push %ebp
80078d: 89 e5 mov %esp,%ebp
80078f: 53 push %ebx
800790: 8b 45 08 mov 0x8(%ebp),%eax
800793: 8b 4d 0c mov 0xc(%ebp),%ecx
char *ret;
ret = dst;
while ((*dst++ = *src++) != '\0')
800796: 89 c2 mov %eax,%edx
800798: 83 c1 01 add $0x1,%ecx
80079b: 83 c2 01 add $0x1,%edx
80079e: 0f b6 59 ff movzbl -0x1(%ecx),%ebx
8007a2: 88 5a ff mov %bl,-0x1(%edx)
8007a5: 84 db test %bl,%bl
8007a7: 75 ef jne 800798 <strcpy+0xc>
/* do nothing */;
return ret;
}
8007a9: 5b pop %ebx
8007aa: 5d pop %ebp
8007ab: c3 ret
008007ac <strcat>:
char *
strcat(char *dst, const char *src)
{
8007ac: 55 push %ebp
8007ad: 89 e5 mov %esp,%ebp
8007af: 53 push %ebx
8007b0: 8b 5d 08 mov 0x8(%ebp),%ebx
int len = strlen(dst);
8007b3: 53 push %ebx
8007b4: e8 9c ff ff ff call 800755 <strlen>
8007b9: 83 c4 04 add $0x4,%esp
strcpy(dst + len, src);
8007bc: ff 75 0c pushl 0xc(%ebp)
8007bf: 01 d8 add %ebx,%eax
8007c1: 50 push %eax
8007c2: e8 c5 ff ff ff call 80078c <strcpy>
return dst;
}
8007c7: 89 d8 mov %ebx,%eax
8007c9: 8b 5d fc mov -0x4(%ebp),%ebx
8007cc: c9 leave
8007cd: c3 ret
008007ce <strncpy>:
char *
strncpy(char *dst, const char *src, size_t size) {
8007ce: 55 push %ebp
8007cf: 89 e5 mov %esp,%ebp
8007d1: 56 push %esi
8007d2: 53 push %ebx
8007d3: 8b 75 08 mov 0x8(%ebp),%esi
8007d6: 8b 4d 0c mov 0xc(%ebp),%ecx
8007d9: 89 f3 mov %esi,%ebx
8007db: 03 5d 10 add 0x10(%ebp),%ebx
size_t i;
char *ret;
ret = dst;
for (i = 0; i < size; i++) {
8007de: 89 f2 mov %esi,%edx
8007e0: eb 0f jmp 8007f1 <strncpy+0x23>
*dst++ = *src;
8007e2: 83 c2 01 add $0x1,%edx
8007e5: 0f b6 01 movzbl (%ecx),%eax
8007e8: 88 42 ff mov %al,-0x1(%edx)
// If strlen(src) < size, null-pad 'dst' out to 'size' chars
if (*src != '\0')
src++;
8007eb: 80 39 01 cmpb $0x1,(%ecx)
8007ee: 83 d9 ff sbb $0xffffffff,%ecx
for (i = 0; i < size; i++) {
8007f1: 39 da cmp %ebx,%edx
8007f3: 75 ed jne 8007e2 <strncpy+0x14>
}
return ret;
}
8007f5: 89 f0 mov %esi,%eax
8007f7: 5b pop %ebx
8007f8: 5e pop %esi
8007f9: 5d pop %ebp
8007fa: c3 ret
008007fb <strlcpy>:
size_t
strlcpy(char *dst, const char *src, size_t size)
{
8007fb: 55 push %ebp
8007fc: 89 e5 mov %esp,%ebp
8007fe: 56 push %esi
8007ff: 53 push %ebx
800800: 8b 75 08 mov 0x8(%ebp),%esi
800803: 8b 55 0c mov 0xc(%ebp),%edx
800806: 8b 4d 10 mov 0x10(%ebp),%ecx
800809: 89 f0 mov %esi,%eax
80080b: 8d 5c 0e ff lea -0x1(%esi,%ecx,1),%ebx
char *dst_in;
dst_in = dst;
if (size > 0) {
80080f: 85 c9 test %ecx,%ecx
800811: 75 0b jne 80081e <strlcpy+0x23>
800813: eb 17 jmp 80082c <strlcpy+0x31>
while (--size > 0 && *src != '\0')
*dst++ = *src++;
800815: 83 c2 01 add $0x1,%edx
800818: 83 c0 01 add $0x1,%eax
80081b: 88 48 ff mov %cl,-0x1(%eax)
while (--size > 0 && *src != '\0')
80081e: 39 d8 cmp %ebx,%eax
800820: 74 07 je 800829 <strlcpy+0x2e>
800822: 0f b6 0a movzbl (%edx),%ecx
800825: 84 c9 test %cl,%cl
800827: 75 ec jne 800815 <strlcpy+0x1a>
*dst = '\0';
800829: c6 00 00 movb $0x0,(%eax)
}
return dst - dst_in;
80082c: 29 f0 sub %esi,%eax
}
80082e: 5b pop %ebx
80082f: 5e pop %esi
800830: 5d pop %ebp
800831: c3 ret
00800832 <strcmp>:
int
strcmp(const char *p, const char *q)
{
800832: 55 push %ebp
800833: 89 e5 mov %esp,%ebp
800835: 8b 4d 08 mov 0x8(%ebp),%ecx
800838: 8b 55 0c mov 0xc(%ebp),%edx
while (*p && *p == *q)
80083b: eb 06 jmp 800843 <strcmp+0x11>
p++, q++;
80083d: 83 c1 01 add $0x1,%ecx
800840: 83 c2 01 add $0x1,%edx
while (*p && *p == *q)
800843: 0f b6 01 movzbl (%ecx),%eax
800846: 84 c0 test %al,%al
800848: 74 04 je 80084e <strcmp+0x1c>
80084a: 3a 02 cmp (%edx),%al
80084c: 74 ef je 80083d <strcmp+0xb>
return (int) ((unsigned char) *p - (unsigned char) *q);
80084e: 0f b6 c0 movzbl %al,%eax
800851: 0f b6 12 movzbl (%edx),%edx
800854: 29 d0 sub %edx,%eax
}
800856: 5d pop %ebp
800857: c3 ret
00800858 <strncmp>:
int
strncmp(const char *p, const char *q, size_t n)
{
800858: 55 push %ebp
800859: 89 e5 mov %esp,%ebp
80085b: 53 push %ebx
80085c: 8b 45 08 mov 0x8(%ebp),%eax
80085f: 8b 55 0c mov 0xc(%ebp),%edx
800862: 89 c3 mov %eax,%ebx
800864: 03 5d 10 add 0x10(%ebp),%ebx
while (n > 0 && *p && *p == *q)
800867: eb 06 jmp 80086f <strncmp+0x17>
n--, p++, q++;
800869: 83 c0 01 add $0x1,%eax
80086c: 83 c2 01 add $0x1,%edx
while (n > 0 && *p && *p == *q)
80086f: 39 d8 cmp %ebx,%eax
800871: 74 16 je 800889 <strncmp+0x31>
800873: 0f b6 08 movzbl (%eax),%ecx
800876: 84 c9 test %cl,%cl
800878: 74 04 je 80087e <strncmp+0x26>
80087a: 3a 0a cmp (%edx),%cl
80087c: 74 eb je 800869 <strncmp+0x11>
if (n == 0)
return 0;
else
return (int) ((unsigned char) *p - (unsigned char) *q);
80087e: 0f b6 00 movzbl (%eax),%eax
800881: 0f b6 12 movzbl (%edx),%edx
800884: 29 d0 sub %edx,%eax
}
800886: 5b pop %ebx
800887: 5d pop %ebp
800888: c3 ret
return 0;
800889: b8 00 00 00 00 mov $0x0,%eax
80088e: eb f6 jmp 800886 <strncmp+0x2e>
00800890 <strchr>:
// Return a pointer to the first occurrence of 'c' in 's',
// or a null pointer if the string has no 'c'.
char *
strchr(const char *s, char c)
{
800890: 55 push %ebp
800891: 89 e5 mov %esp,%ebp
800893: 8b 45 08 mov 0x8(%ebp),%eax
800896: 0f b6 4d 0c movzbl 0xc(%ebp),%ecx
for (; *s; s++)
80089a: 0f b6 10 movzbl (%eax),%edx
80089d: 84 d2 test %dl,%dl
80089f: 74 09 je 8008aa <strchr+0x1a>
if (*s == c)
8008a1: 38 ca cmp %cl,%dl
8008a3: 74 0a je 8008af <strchr+0x1f>
for (; *s; s++)
8008a5: 83 c0 01 add $0x1,%eax
8008a8: eb f0 jmp 80089a <strchr+0xa>
return (char *) s;
return 0;
8008aa: b8 00 00 00 00 mov $0x0,%eax
}
8008af: 5d pop %ebp
8008b0: c3 ret
008008b1 <strfind>:
// Return a pointer to the first occurrence of 'c' in 's',
// or a pointer to the string-ending null character if the string has no 'c'.
char *
strfind(const char *s, char c)
{
8008b1: 55 push %ebp
8008b2: 89 e5 mov %esp,%ebp
8008b4: 8b 45 08 mov 0x8(%ebp),%eax
8008b7: 0f b6 4d 0c movzbl 0xc(%ebp),%ecx
for (; *s; s++)
8008bb: eb 03 jmp 8008c0 <strfind+0xf>
8008bd: 83 c0 01 add $0x1,%eax
8008c0: 0f b6 10 movzbl (%eax),%edx
if (*s == c)
8008c3: 38 ca cmp %cl,%dl
8008c5: 74 04 je 8008cb <strfind+0x1a>
8008c7: 84 d2 test %dl,%dl
8008c9: 75 f2 jne 8008bd <strfind+0xc>
break;
return (char *) s;
}
8008cb: 5d pop %ebp
8008cc: c3 ret
008008cd <memset>:
#if ASM
void *
memset(void *v, int c, size_t n)
{
8008cd: 55 push %ebp
8008ce: 89 e5 mov %esp,%ebp
8008d0: 57 push %edi
8008d1: 56 push %esi
8008d2: 53 push %ebx
8008d3: 8b 7d 08 mov 0x8(%ebp),%edi
8008d6: 8b 4d 10 mov 0x10(%ebp),%ecx
char *p;
if (n == 0)
8008d9: 85 c9 test %ecx,%ecx
8008db: 74 13 je 8008f0 <memset+0x23>
return v;
if ((int)v%4 == 0 && n%4 == 0) {
8008dd: f7 c7 03 00 00 00 test $0x3,%edi
8008e3: 75 05 jne 8008ea <memset+0x1d>
8008e5: f6 c1 03 test $0x3,%cl
8008e8: 74 0d je 8008f7 <memset+0x2a>
c = (c<<24)|(c<<16)|(c<<8)|c;
asm volatile("cld; rep stosl\n"
:: "D" (v), "a" (c), "c" (n/4)
: "cc", "memory");
} else
asm volatile("cld; rep stosb\n"
8008ea: 8b 45 0c mov 0xc(%ebp),%eax
8008ed: fc cld
8008ee: f3 aa rep stos %al,%es:(%edi)
:: "D" (v), "a" (c), "c" (n)
: "cc", "memory");
return v;
}
8008f0: 89 f8 mov %edi,%eax
8008f2: 5b pop %ebx
8008f3: 5e pop %esi
8008f4: 5f pop %edi
8008f5: 5d pop %ebp
8008f6: c3 ret
c &= 0xFF;
8008f7: 0f b6 55 0c movzbl 0xc(%ebp),%edx
c = (c<<24)|(c<<16)|(c<<8)|c;
8008fb: 89 d3 mov %edx,%ebx
8008fd: c1 e3 08 shl $0x8,%ebx
800900: 89 d0 mov %edx,%eax
800902: c1 e0 18 shl $0x18,%eax
800905: 89 d6 mov %edx,%esi
800907: c1 e6 10 shl $0x10,%esi
80090a: 09 f0 or %esi,%eax
80090c: 09 c2 or %eax,%edx
80090e: 09 da or %ebx,%edx
:: "D" (v), "a" (c), "c" (n/4)
800910: c1 e9 02 shr $0x2,%ecx
asm volatile("cld; rep stosl\n"
800913: 89 d0 mov %edx,%eax
800915: fc cld
800916: f3 ab rep stos %eax,%es:(%edi)
800918: eb d6 jmp 8008f0 <memset+0x23>
0080091a <memmove>:
void *
memmove(void *dst, const void *src, size_t n)
{
80091a: 55 push %ebp
80091b: 89 e5 mov %esp,%ebp
80091d: 57 push %edi
80091e: 56 push %esi
80091f: 8b 45 08 mov 0x8(%ebp),%eax
800922: 8b 75 0c mov 0xc(%ebp),%esi
800925: 8b 4d 10 mov 0x10(%ebp),%ecx
const char *s;
char *d;
s = src;
d = dst;
if (s < d && s + n > d) {
800928: 39 c6 cmp %eax,%esi
80092a: 73 35 jae 800961 <memmove+0x47>
80092c: 8d 14 0e lea (%esi,%ecx,1),%edx
80092f: 39 c2 cmp %eax,%edx
800931: 76 2e jbe 800961 <memmove+0x47>
s += n;
d += n;
800933: 8d 3c 08 lea (%eax,%ecx,1),%edi
if ((int)s%4 == 0 && (int)d%4 == 0 && n%4 == 0)
800936: 89 d6 mov %edx,%esi
800938: 09 fe or %edi,%esi
80093a: f7 c6 03 00 00 00 test $0x3,%esi
800940: 74 0c je 80094e <memmove+0x34>
asm volatile("std; rep movsl\n"
:: "D" (d-4), "S" (s-4), "c" (n/4) : "cc", "memory");
else
asm volatile("std; rep movsb\n"
:: "D" (d-1), "S" (s-1), "c" (n) : "cc", "memory");
800942: 83 ef 01 sub $0x1,%edi
800945: 8d 72 ff lea -0x1(%edx),%esi
asm volatile("std; rep movsb\n"
800948: fd std
800949: f3 a4 rep movsb %ds:(%esi),%es:(%edi)
// Some versions of GCC rely on DF being clear
asm volatile("cld" ::: "cc");
80094b: fc cld
80094c: eb 21 jmp 80096f <memmove+0x55>
if ((int)s%4 == 0 && (int)d%4 == 0 && n%4 == 0)
80094e: f6 c1 03 test $0x3,%cl
800951: 75 ef jne 800942 <memmove+0x28>
:: "D" (d-4), "S" (s-4), "c" (n/4) : "cc", "memory");
800953: 83 ef 04 sub $0x4,%edi
800956: 8d 72 fc lea -0x4(%edx),%esi
800959: c1 e9 02 shr $0x2,%ecx
asm volatile("std; rep movsl\n"
80095c: fd std
80095d: f3 a5 rep movsl %ds:(%esi),%es:(%edi)
80095f: eb ea jmp 80094b <memmove+0x31>
} else {
if ((int)s%4 == 0 && (int)d%4 == 0 && n%4 == 0)
800961: 89 f2 mov %esi,%edx
800963: 09 c2 or %eax,%edx
800965: f6 c2 03 test $0x3,%dl
800968: 74 09 je 800973 <memmove+0x59>
asm volatile("cld; rep movsl\n"
:: "D" (d), "S" (s), "c" (n/4) : "cc", "memory");
else
asm volatile("cld; rep movsb\n"
80096a: 89 c7 mov %eax,%edi
80096c: fc cld
80096d: f3 a4 rep movsb %ds:(%esi),%es:(%edi)
:: "D" (d), "S" (s), "c" (n) : "cc", "memory");
}
return dst;
}
80096f: 5e pop %esi
800970: 5f pop %edi
800971: 5d pop %ebp
800972: c3 ret
if ((int)s%4 == 0 && (int)d%4 == 0 && n%4 == 0)
800973: f6 c1 03 test $0x3,%cl
800976: 75 f2 jne 80096a <memmove+0x50>
:: "D" (d), "S" (s), "c" (n/4) : "cc", "memory");
800978: c1 e9 02 shr $0x2,%ecx
asm volatile("cld; rep movsl\n"
80097b: 89 c7 mov %eax,%edi
80097d: fc cld
80097e: f3 a5 rep movsl %ds:(%esi),%es:(%edi)
800980: eb ed jmp 80096f <memmove+0x55>
00800982 <memcpy>:
}
#endif
void *
memcpy(void *dst, const void *src, size_t n)
{
800982: 55 push %ebp
800983: 89 e5 mov %esp,%ebp
return memmove(dst, src, n);
800985: ff 75 10 pushl 0x10(%ebp)
800988: ff 75 0c pushl 0xc(%ebp)
80098b: ff 75 08 pushl 0x8(%ebp)
80098e: e8 87 ff ff ff call 80091a <memmove>
}
800993: c9 leave
800994: c3 ret
00800995 <memcmp>:
int
memcmp(const void *v1, const void *v2, size_t n)
{
800995: 55 push %ebp
800996: 89 e5 mov %esp,%ebp
800998: 56 push %esi
800999: 53 push %ebx
80099a: 8b 45 08 mov 0x8(%ebp),%eax
80099d: 8b 55 0c mov 0xc(%ebp),%edx
8009a0: 89 c6 mov %eax,%esi
8009a2: 03 75 10 add 0x10(%ebp),%esi
const uint8_t *s1 = (const uint8_t *) v1;
const uint8_t *s2 = (const uint8_t *) v2;
while (n-- > 0) {
8009a5: 39 f0 cmp %esi,%eax
8009a7: 74 1c je 8009c5 <memcmp+0x30>
if (*s1 != *s2)
8009a9: 0f b6 08 movzbl (%eax),%ecx
8009ac: 0f b6 1a movzbl (%edx),%ebx
8009af: 38 d9 cmp %bl,%cl
8009b1: 75 08 jne 8009bb <memcmp+0x26>
return (int) *s1 - (int) *s2;
s1++, s2++;
8009b3: 83 c0 01 add $0x1,%eax
8009b6: 83 c2 01 add $0x1,%edx
8009b9: eb ea jmp 8009a5 <memcmp+0x10>
return (int) *s1 - (int) *s2;
8009bb: 0f b6 c1 movzbl %cl,%eax
8009be: 0f b6 db movzbl %bl,%ebx
8009c1: 29 d8 sub %ebx,%eax
8009c3: eb 05 jmp 8009ca <memcmp+0x35>
}
return 0;
8009c5: b8 00 00 00 00 mov $0x0,%eax
}
8009ca: 5b pop %ebx
8009cb: 5e pop %esi
8009cc: 5d pop %ebp
8009cd: c3 ret
008009ce <memfind>:
void *
memfind(const void *s, int c, size_t n)
{
8009ce: 55 push %ebp
8009cf: 89 e5 mov %esp,%ebp
8009d1: 8b 45 08 mov 0x8(%ebp),%eax
8009d4: 8b 4d 0c mov 0xc(%ebp),%ecx
const void *ends = (const char *) s + n;
8009d7: 89 c2 mov %eax,%edx
8009d9: 03 55 10 add 0x10(%ebp),%edx
for (; s < ends; s++)
8009dc: 39 d0 cmp %edx,%eax
8009de: 73 09 jae 8009e9 <memfind+0x1b>
if (*(const unsigned char *) s == (unsigned char) c)
8009e0: 38 08 cmp %cl,(%eax)
8009e2: 74 05 je 8009e9 <memfind+0x1b>
for (; s < ends; s++)
8009e4: 83 c0 01 add $0x1,%eax
8009e7: eb f3 jmp 8009dc <memfind+0xe>
break;
return (void *) s;
}
8009e9: 5d pop %ebp
8009ea: c3 ret
008009eb <strtol>:
long
strtol(const char *s, char **endptr, int base)
{
8009eb: 55 push %ebp
8009ec: 89 e5 mov %esp,%ebp
8009ee: 57 push %edi
8009ef: 56 push %esi
8009f0: 53 push %ebx
8009f1: 8b 4d 08 mov 0x8(%ebp),%ecx
8009f4: 8b 5d 10 mov 0x10(%ebp),%ebx
int neg = 0;
long val = 0;
// gobble initial whitespace
while (*s == ' ' || *s == '\t')
8009f7: eb 03 jmp 8009fc <strtol+0x11>
s++;
8009f9: 83 c1 01 add $0x1,%ecx
while (*s == ' ' || *s == '\t')
8009fc: 0f b6 01 movzbl (%ecx),%eax
8009ff: 3c 20 cmp $0x20,%al
800a01: 74 f6 je 8009f9 <strtol+0xe>
800a03: 3c 09 cmp $0x9,%al
800a05: 74 f2 je 8009f9 <strtol+0xe>
// plus/minus sign
if (*s == '+')
800a07: 3c 2b cmp $0x2b,%al
800a09: 74 2e je 800a39 <strtol+0x4e>
int neg = 0;
800a0b: bf 00 00 00 00 mov $0x0,%edi
s++;
else if (*s == '-')
800a10: 3c 2d cmp $0x2d,%al
800a12: 74 2f je 800a43 <strtol+0x58>
s++, neg = 1;
// hex or octal base prefix
if ((base == 0 || base == 16) && (s[0] == '0' && s[1] == 'x'))
800a14: f7 c3 ef ff ff ff test $0xffffffef,%ebx
800a1a: 75 05 jne 800a21 <strtol+0x36>
800a1c: 80 39 30 cmpb $0x30,(%ecx)
800a1f: 74 2c je 800a4d <strtol+0x62>
s += 2, base = 16;
else if (base == 0 && s[0] == '0')
800a21: 85 db test %ebx,%ebx
800a23: 75 0a jne 800a2f <strtol+0x44>
s++, base = 8;
else if (base == 0)
base = 10;
800a25: bb 0a 00 00 00 mov $0xa,%ebx
else if (base == 0 && s[0] == '0')
800a2a: 80 39 30 cmpb $0x30,(%ecx)
800a2d: 74 28 je 800a57 <strtol+0x6c>
base = 10;
800a2f: b8 00 00 00 00 mov $0x0,%eax
800a34: 89 5d 10 mov %ebx,0x10(%ebp)
800a37: eb 50 jmp 800a89 <strtol+0x9e>
s++;
800a39: 83 c1 01 add $0x1,%ecx
int neg = 0;
800a3c: bf 00 00 00 00 mov $0x0,%edi
800a41: eb d1 jmp 800a14 <strtol+0x29>
s++, neg = 1;
800a43: 83 c1 01 add $0x1,%ecx
800a46: bf 01 00 00 00 mov $0x1,%edi
800a4b: eb c7 jmp 800a14 <strtol+0x29>
if ((base == 0 || base == 16) && (s[0] == '0' && s[1] == 'x'))
800a4d: 80 79 01 78 cmpb $0x78,0x1(%ecx)
800a51: 74 0e je 800a61 <strtol+0x76>
else if (base == 0 && s[0] == '0')
800a53: 85 db test %ebx,%ebx
800a55: 75 d8 jne 800a2f <strtol+0x44>
s++, base = 8;
800a57: 83 c1 01 add $0x1,%ecx
800a5a: bb 08 00 00 00 mov $0x8,%ebx
800a5f: eb ce jmp 800a2f <strtol+0x44>
s += 2, base = 16;
800a61: 83 c1 02 add $0x2,%ecx
800a64: bb 10 00 00 00 mov $0x10,%ebx
800a69: eb c4 jmp 800a2f <strtol+0x44>
while (1) {
int dig;
if (*s >= '0' && *s <= '9')
dig = *s - '0';
else if (*s >= 'a' && *s <= 'z')
800a6b: 8d 72 9f lea -0x61(%edx),%esi
800a6e: 89 f3 mov %esi,%ebx
800a70: 80 fb 19 cmp $0x19,%bl
800a73: 77 29 ja 800a9e <strtol+0xb3>
dig = *s - 'a' + 10;
800a75: 0f be d2 movsbl %dl,%edx
800a78: 83 ea 57 sub $0x57,%edx
else if (*s >= 'A' && *s <= 'Z')
dig = *s - 'A' + 10;
else
break;
if (dig >= base)
800a7b: 3b 55 10 cmp 0x10(%ebp),%edx
800a7e: 7d 30 jge 800ab0 <strtol+0xc5>
break;
s++, val = (val * base) + dig;
800a80: 83 c1 01 add $0x1,%ecx
800a83: 0f af 45 10 imul 0x10(%ebp),%eax
800a87: 01 d0 add %edx,%eax
if (*s >= '0' && *s <= '9')
800a89: 0f b6 11 movzbl (%ecx),%edx
800a8c: 8d 72 d0 lea -0x30(%edx),%esi
800a8f: 89 f3 mov %esi,%ebx
800a91: 80 fb 09 cmp $0x9,%bl
800a94: 77 d5 ja 800a6b <strtol+0x80>
dig = *s - '0';
800a96: 0f be d2 movsbl %dl,%edx
800a99: 83 ea 30 sub $0x30,%edx
800a9c: eb dd jmp 800a7b <strtol+0x90>
else if (*s >= 'A' && *s <= 'Z')
800a9e: 8d 72 bf lea -0x41(%edx),%esi
800aa1: 89 f3 mov %esi,%ebx
800aa3: 80 fb 19 cmp $0x19,%bl
800aa6: 77 08 ja 800ab0 <strtol+0xc5>
dig = *s - 'A' + 10;
800aa8: 0f be d2 movsbl %dl,%edx
800aab: 83 ea 37 sub $0x37,%edx
800aae: eb cb jmp 800a7b <strtol+0x90>
// we don't properly detect overflow!
}
if (endptr)
800ab0: 83 7d 0c 00 cmpl $0x0,0xc(%ebp)
800ab4: 74 05 je 800abb <strtol+0xd0>
*endptr = (char *) s;
800ab6: 8b 75 0c mov 0xc(%ebp),%esi
800ab9: 89 0e mov %ecx,(%esi)
return (neg ? -val : val);
800abb: 89 c2 mov %eax,%edx
800abd: f7 da neg %edx
800abf: 85 ff test %edi,%edi
800ac1: 0f 45 c2 cmovne %edx,%eax
}
800ac4: 5b pop %ebx
800ac5: 5e pop %esi
800ac6: 5f pop %edi
800ac7: 5d pop %ebp
800ac8: c3 ret
00800ac9 <sys_cputs>:
return ret;
}
void
sys_cputs(const char *s, size_t len)
{
800ac9: 55 push %ebp
800aca: 89 e5 mov %esp,%ebp
800acc: 57 push %edi
800acd: 56 push %esi
800ace: 53 push %ebx
asm volatile("int %1\n" //执行int T_SYSCALL指令
800acf: b8 00 00 00 00 mov $0x0,%eax
800ad4: 8b 55 08 mov 0x8(%ebp),%edx
800ad7: 8b 4d 0c mov 0xc(%ebp),%ecx
800ada: 89 c3 mov %eax,%ebx
800adc: 89 c7 mov %eax,%edi
800ade: 89 c6 mov %eax,%esi
800ae0: cd 30 int $0x30
syscall(SYS_cputs, 0, (uint32_t)s, len, 0, 0, 0);
}
800ae2: 5b pop %ebx
800ae3: 5e pop %esi
800ae4: 5f pop %edi
800ae5: 5d pop %ebp
800ae6: c3 ret
00800ae7 <sys_cgetc>:
int
sys_cgetc(void)
{
800ae7: 55 push %ebp
800ae8: 89 e5 mov %esp,%ebp
800aea: 57 push %edi
800aeb: 56 push %esi
800aec: 53 push %ebx
asm volatile("int %1\n" //执行int T_SYSCALL指令
800aed: ba 00 00 00 00 mov $0x0,%edx
800af2: b8 01 00 00 00 mov $0x1,%eax
800af7: 89 d1 mov %edx,%ecx
800af9: 89 d3 mov %edx,%ebx
800afb: 89 d7 mov %edx,%edi
800afd: 89 d6 mov %edx,%esi
800aff: cd 30 int $0x30
return syscall(SYS_cgetc, 0, 0, 0, 0, 0, 0);
}
800b01: 5b pop %ebx
800b02: 5e pop %esi
800b03: 5f pop %edi
800b04: 5d pop %ebp
800b05: c3 ret
00800b06 <sys_env_destroy>:
int
sys_env_destroy(envid_t envid)
{
800b06: 55 push %ebp
800b07: 89 e5 mov %esp,%ebp
800b09: 57 push %edi
800b0a: 56 push %esi
800b0b: 53 push %ebx
800b0c: 83 ec 0c sub $0xc,%esp
asm volatile("int %1\n" //执行int T_SYSCALL指令
800b0f: b9 00 00 00 00 mov $0x0,%ecx
800b14: 8b 55 08 mov 0x8(%ebp),%edx
800b17: b8 03 00 00 00 mov $0x3,%eax
800b1c: 89 cb mov %ecx,%ebx
800b1e: 89 cf mov %ecx,%edi
800b20: 89 ce mov %ecx,%esi
800b22: cd 30 int $0x30
if(check && ret > 0)
800b24: 85 c0 test %eax,%eax
800b26: 7f 08 jg 800b30 <sys_env_destroy+0x2a>
return syscall(SYS_env_destroy, 1, envid, 0, 0, 0, 0);
}
800b28: 8d 65 f4 lea -0xc(%ebp),%esp
800b2b: 5b pop %ebx
800b2c: 5e pop %esi
800b2d: 5f pop %edi
800b2e: 5d pop %ebp
800b2f: c3 ret
panic("syscall %d returned %d (> 0)", num, ret);
800b30: 83 ec 0c sub $0xc,%esp
800b33: 50 push %eax
800b34: 6a 03 push $0x3
800b36: 68 9f 13 80 00 push $0x80139f
800b3b: 6a 23 push $0x23
800b3d: 68 bc 13 80 00 push $0x8013bc
800b42: e8 ac 02 00 00 call 800df3 <_panic>
00800b47 <sys_getenvid>:
envid_t
sys_getenvid(void)
{
800b47: 55 push %ebp
800b48: 89 e5 mov %esp,%ebp
800b4a: 57 push %edi
800b4b: 56 push %esi
800b4c: 53 push %ebx
asm volatile("int %1\n" //执行int T_SYSCALL指令
800b4d: ba 00 00 00 00 mov $0x0,%edx
800b52: b8 02 00 00 00 mov $0x2,%eax
800b57: 89 d1 mov %edx,%ecx
800b59: 89 d3 mov %edx,%ebx
800b5b: 89 d7 mov %edx,%edi
800b5d: 89 d6 mov %edx,%esi
800b5f: cd 30 int $0x30
return syscall(SYS_getenvid, 0, 0, 0, 0, 0, 0);
}
800b61: 5b pop %ebx
800b62: 5e pop %esi
800b63: 5f pop %edi
800b64: 5d pop %ebp
800b65: c3 ret
00800b66 <sys_yield>:
void
sys_yield(void)
{
800b66: 55 push %ebp
800b67: 89 e5 mov %esp,%ebp
800b69: 57 push %edi
800b6a: 56 push %esi
800b6b: 53 push %ebx
asm volatile("int %1\n" //执行int T_SYSCALL指令
800b6c: ba 00 00 00 00 mov $0x0,%edx
800b71: b8 0b 00 00 00 mov $0xb,%eax
800b76: 89 d1 mov %edx,%ecx
800b78: 89 d3 mov %edx,%ebx
800b7a: 89 d7 mov %edx,%edi
800b7c: 89 d6 mov %edx,%esi
800b7e: cd 30 int $0x30
syscall(SYS_yield, 0, 0, 0, 0, 0, 0);
}
800b80: 5b pop %ebx
800b81: 5e pop %esi
800b82: 5f pop %edi
800b83: 5d pop %ebp
800b84: c3 ret
00800b85 <sys_page_alloc>:
int
sys_page_alloc(envid_t envid, void *va, int perm)
{
800b85: 55 push %ebp
800b86: 89 e5 mov %esp,%ebp
800b88: 57 push %edi
800b89: 56 push %esi
800b8a: 53 push %ebx
800b8b: 83 ec 0c sub $0xc,%esp
asm volatile("int %1\n" //执行int T_SYSCALL指令
800b8e: be 00 00 00 00 mov $0x0,%esi
800b93: 8b 55 08 mov 0x8(%ebp),%edx
800b96: 8b 4d 0c mov 0xc(%ebp),%ecx
800b99: b8 04 00 00 00 mov $0x4,%eax
800b9e: 8b 5d 10 mov 0x10(%ebp),%ebx
800ba1: 89 f7 mov %esi,%edi
800ba3: cd 30 int $0x30
if(check && ret > 0)
800ba5: 85 c0 test %eax,%eax
800ba7: 7f 08 jg 800bb1 <sys_page_alloc+0x2c>
return syscall(SYS_page_alloc, 1, envid, (uint32_t) va, perm, 0, 0);
}
800ba9: 8d 65 f4 lea -0xc(%ebp),%esp
800bac: 5b pop %ebx
800bad: 5e pop %esi
800bae: 5f pop %edi
800baf: 5d pop %ebp
800bb0: c3 ret
panic("syscall %d returned %d (> 0)", num, ret);
800bb1: 83 ec 0c sub $0xc,%esp
800bb4: 50 push %eax
800bb5: 6a 04 push $0x4
800bb7: 68 9f 13 80 00 push $0x80139f
800bbc: 6a 23 push $0x23
800bbe: 68 bc 13 80 00 push $0x8013bc
800bc3: e8 2b 02 00 00 call 800df3 <_panic>
00800bc8 <sys_page_map>:
int
sys_page_map(envid_t srcenv, void *srcva, envid_t dstenv, void *dstva, int perm)
{
800bc8: 55 push %ebp
800bc9: 89 e5 mov %esp,%ebp
800bcb: 57 push %edi
800bcc: 56 push %esi
800bcd: 53 push %ebx
800bce: 83 ec 0c sub $0xc,%esp
asm volatile("int %1\n" //执行int T_SYSCALL指令
800bd1: 8b 55 08 mov 0x8(%ebp),%edx
800bd4: 8b 4d 0c mov 0xc(%ebp),%ecx
800bd7: b8 05 00 00 00 mov $0x5,%eax
800bdc: 8b 5d 10 mov 0x10(%ebp),%ebx
800bdf: 8b 7d 14 mov 0x14(%ebp),%edi
800be2: 8b 75 18 mov 0x18(%ebp),%esi
800be5: cd 30 int $0x30
if(check && ret > 0)
800be7: 85 c0 test %eax,%eax
800be9: 7f 08 jg 800bf3 <sys_page_map+0x2b>
return syscall(SYS_page_map, 1, srcenv, (uint32_t) srcva, dstenv, (uint32_t) dstva, perm);
}
800beb: 8d 65 f4 lea -0xc(%ebp),%esp
800bee: 5b pop %ebx
800bef: 5e pop %esi
800bf0: 5f pop %edi
800bf1: 5d pop %ebp
800bf2: c3 ret
panic("syscall %d returned %d (> 0)", num, ret);
800bf3: 83 ec 0c sub $0xc,%esp
800bf6: 50 push %eax
800bf7: 6a 05 push $0x5
800bf9: 68 9f 13 80 00 push $0x80139f
800bfe: 6a 23 push $0x23
800c00: 68 bc 13 80 00 push $0x8013bc
800c05: e8 e9 01 00 00 call 800df3 <_panic>
00800c0a <sys_page_unmap>:
int
sys_page_unmap(envid_t envid, void *va)
{
800c0a: 55 push %ebp
800c0b: 89 e5 mov %esp,%ebp
800c0d: 57 push %edi
800c0e: 56 push %esi
800c0f: 53 push %ebx
800c10: 83 ec 0c sub $0xc,%esp
asm volatile("int %1\n" //执行int T_SYSCALL指令
800c13: bb 00 00 00 00 mov $0x0,%ebx
800c18: 8b 55 08 mov 0x8(%ebp),%edx
800c1b: 8b 4d 0c mov 0xc(%ebp),%ecx
800c1e: b8 06 00 00 00 mov $0x6,%eax
800c23: 89 df mov %ebx,%edi
800c25: 89 de mov %ebx,%esi
800c27: cd 30 int $0x30
if(check && ret > 0)
800c29: 85 c0 test %eax,%eax
800c2b: 7f 08 jg 800c35 <sys_page_unmap+0x2b>
return syscall(SYS_page_unmap, 1, envid, (uint32_t) va, 0, 0, 0);
}
800c2d: 8d 65 f4 lea -0xc(%ebp),%esp
800c30: 5b pop %ebx
800c31: 5e pop %esi
800c32: 5f pop %edi
800c33: 5d pop %ebp
800c34: c3 ret
panic("syscall %d returned %d (> 0)", num, ret);
800c35: 83 ec 0c sub $0xc,%esp
800c38: 50 push %eax
800c39: 6a 06 push $0x6
800c3b: 68 9f 13 80 00 push $0x80139f
800c40: 6a 23 push $0x23
800c42: 68 bc 13 80 00 push $0x8013bc
800c47: e8 a7 01 00 00 call 800df3 <_panic>
00800c4c <sys_env_set_status>:
// sys_exofork is inlined in lib.h
int
sys_env_set_status(envid_t envid, int status)
{
800c4c: 55 push %ebp
800c4d: 89 e5 mov %esp,%ebp
800c4f: 57 push %edi
800c50: 56 push %esi
800c51: 53 push %ebx
800c52: 83 ec 0c sub $0xc,%esp
asm volatile("int %1\n" //执行int T_SYSCALL指令
800c55: bb 00 00 00 00 mov $0x0,%ebx
800c5a: 8b 55 08 mov 0x8(%ebp),%edx
800c5d: 8b 4d 0c mov 0xc(%ebp),%ecx
800c60: b8 08 00 00 00 mov $0x8,%eax
800c65: 89 df mov %ebx,%edi
800c67: 89 de mov %ebx,%esi
800c69: cd 30 int $0x30
if(check && ret > 0)
800c6b: 85 c0 test %eax,%eax
800c6d: 7f 08 jg 800c77 <sys_env_set_status+0x2b>
return syscall(SYS_env_set_status, 1, envid, status, 0, 0, 0);
}
800c6f: 8d 65 f4 lea -0xc(%ebp),%esp
800c72: 5b pop %ebx
800c73: 5e pop %esi
800c74: 5f pop %edi
800c75: 5d pop %ebp
800c76: c3 ret
panic("syscall %d returned %d (> 0)", num, ret);
800c77: 83 ec 0c sub $0xc,%esp
800c7a: 50 push %eax
800c7b: 6a 08 push $0x8
800c7d: 68 9f 13 80 00 push $0x80139f
800c82: 6a 23 push $0x23
800c84: 68 bc 13 80 00 push $0x8013bc
800c89: e8 65 01 00 00 call 800df3 <_panic>
00800c8e <sys_env_set_trapframe>:
int
sys_env_set_trapframe(envid_t envid, struct Trapframe *tf)
{
800c8e: 55 push %ebp
800c8f: 89 e5 mov %esp,%ebp
800c91: 57 push %edi
800c92: 56 push %esi
800c93: 53 push %ebx
800c94: 83 ec 0c sub $0xc,%esp
asm volatile("int %1\n" //执行int T_SYSCALL指令
800c97: bb 00 00 00 00 mov $0x0,%ebx
800c9c: 8b 55 08 mov 0x8(%ebp),%edx
800c9f: 8b 4d 0c mov 0xc(%ebp),%ecx
800ca2: b8 09 00 00 00 mov $0x9,%eax
800ca7: 89 df mov %ebx,%edi
800ca9: 89 de mov %ebx,%esi
800cab: cd 30 int $0x30
if(check && ret > 0)
800cad: 85 c0 test %eax,%eax
800caf: 7f 08 jg 800cb9 <sys_env_set_trapframe+0x2b>
return syscall(SYS_env_set_trapframe, 1, envid, (uint32_t) tf, 0, 0, 0);
}
800cb1: 8d 65 f4 lea -0xc(%ebp),%esp
800cb4: 5b pop %ebx
800cb5: 5e pop %esi
800cb6: 5f pop %edi
800cb7: 5d pop %ebp
800cb8: c3 ret
panic("syscall %d returned %d (> 0)", num, ret);
800cb9: 83 ec 0c sub $0xc,%esp
800cbc: 50 push %eax
800cbd: 6a 09 push $0x9
800cbf: 68 9f 13 80 00 push $0x80139f
800cc4: 6a 23 push $0x23
800cc6: 68 bc 13 80 00 push $0x8013bc
800ccb: e8 23 01 00 00 call 800df3 <_panic>
00800cd0 <sys_env_set_pgfault_upcall>:
int
sys_env_set_pgfault_upcall(envid_t envid, void *upcall)
{
800cd0: 55 push %ebp
800cd1: 89 e5 mov %esp,%ebp
800cd3: 57 push %edi
800cd4: 56 push %esi
800cd5: 53 push %ebx
800cd6: 83 ec 0c sub $0xc,%esp
asm volatile("int %1\n" //执行int T_SYSCALL指令
800cd9: bb 00 00 00 00 mov $0x0,%ebx
800cde: 8b 55 08 mov 0x8(%ebp),%edx
800ce1: 8b 4d 0c mov 0xc(%ebp),%ecx
800ce4: b8 0a 00 00 00 mov $0xa,%eax
800ce9: 89 df mov %ebx,%edi
800ceb: 89 de mov %ebx,%esi
800ced: cd 30 int $0x30
if(check && ret > 0)
800cef: 85 c0 test %eax,%eax
800cf1: 7f 08 jg 800cfb <sys_env_set_pgfault_upcall+0x2b>
return syscall(SYS_env_set_pgfault_upcall, 1, envid, (uint32_t) upcall, 0, 0, 0);
}
800cf3: 8d 65 f4 lea -0xc(%ebp),%esp
800cf6: 5b pop %ebx
800cf7: 5e pop %esi
800cf8: 5f pop %edi
800cf9: 5d pop %ebp
800cfa: c3 ret
panic("syscall %d returned %d (> 0)", num, ret);
800cfb: 83 ec 0c sub $0xc,%esp
800cfe: 50 push %eax
800cff: 6a 0a push $0xa
800d01: 68 9f 13 80 00 push $0x80139f
800d06: 6a 23 push $0x23
800d08: 68 bc 13 80 00 push $0x8013bc
800d0d: e8 e1 00 00 00 call 800df3 <_panic>
00800d12 <sys_ipc_try_send>:
int
sys_ipc_try_send(envid_t envid, uint32_t value, void *srcva, int perm)
{
800d12: 55 push %ebp
800d13: 89 e5 mov %esp,%ebp
800d15: 57 push %edi
800d16: 56 push %esi
800d17: 53 push %ebx
asm volatile("int %1\n" //执行int T_SYSCALL指令
800d18: 8b 55 08 mov 0x8(%ebp),%edx
800d1b: 8b 4d 0c mov 0xc(%ebp),%ecx
800d1e: b8 0c 00 00 00 mov $0xc,%eax
800d23: be 00 00 00 00 mov $0x0,%esi
800d28: 8b 5d 10 mov 0x10(%ebp),%ebx
800d2b: 8b 7d 14 mov 0x14(%ebp),%edi
800d2e: cd 30 int $0x30
return syscall(SYS_ipc_try_send, 0, envid, value, (uint32_t) srcva, perm, 0);
}
800d30: 5b pop %ebx
800d31: 5e pop %esi
800d32: 5f pop %edi
800d33: 5d pop %ebp
800d34: c3 ret
00800d35 <sys_ipc_recv>:
int
sys_ipc_recv(void *dstva)
{
800d35: 55 push %ebp
800d36: 89 e5 mov %esp,%ebp
800d38: 57 push %edi
800d39: 56 push %esi
800d3a: 53 push %ebx
800d3b: 83 ec 0c sub $0xc,%esp
asm volatile("int %1\n" //执行int T_SYSCALL指令
800d3e: b9 00 00 00 00 mov $0x0,%ecx
800d43: 8b 55 08 mov 0x8(%ebp),%edx
800d46: b8 0d 00 00 00 mov $0xd,%eax
800d4b: 89 cb mov %ecx,%ebx
800d4d: 89 cf mov %ecx,%edi
800d4f: 89 ce mov %ecx,%esi
800d51: cd 30 int $0x30
if(check && ret > 0)
800d53: 85 c0 test %eax,%eax
800d55: 7f 08 jg 800d5f <sys_ipc_recv+0x2a>
return syscall(SYS_ipc_recv, 1, (uint32_t)dstva, 0, 0, 0, 0);
}
800d57: 8d 65 f4 lea -0xc(%ebp),%esp
800d5a: 5b pop %ebx
800d5b: 5e pop %esi
800d5c: 5f pop %edi
800d5d: 5d pop %ebp
800d5e: c3 ret
panic("syscall %d returned %d (> 0)", num, ret);
800d5f: 83 ec 0c sub $0xc,%esp
800d62: 50 push %eax
800d63: 6a 0d push $0xd
800d65: 68 9f 13 80 00 push $0x80139f
800d6a: 6a 23 push $0x23
800d6c: 68 bc 13 80 00 push $0x8013bc
800d71: e8 7d 00 00 00 call 800df3 <_panic>
00800d76 <set_pgfault_handler>:
// at UXSTACKTOP), and tell the kernel to call the assembly-language
// _pgfault_upcall routine when a page fault occurs.
//
void
set_pgfault_handler(void (*handler)(struct UTrapframe *utf))
{
800d76: 55 push %ebp
800d77: 89 e5 mov %esp,%ebp
800d79: 83 ec 08 sub $0x8,%esp
int r;
if (_pgfault_handler == 0) {
800d7c: 83 3d 08 20 80 00 00 cmpl $0x0,0x802008
800d83: 74 0a je 800d8f <set_pgfault_handler+0x19>
}
sys_env_set_pgfault_upcall(0, _pgfault_upcall); //系统调用，设置进程的env_pgfault_upcall属性
}
// Save handler pointer for assembly to call.
_pgfault_handler = handler;
800d85: 8b 45 08 mov 0x8(%ebp),%eax
800d88: a3 08 20 80 00 mov %eax,0x802008
}
800d8d: c9 leave
800d8e: c3 ret
int r = sys_page_alloc(0, (void *)(UXSTACKTOP-PGSIZE), PTE_W | PTE_U | PTE_P); //为当前进程分配异常栈
800d8f: 83 ec 04 sub $0x4,%esp
800d92: 6a 07 push $0x7
800d94: 68 00 f0 bf ee push $0xeebff000
800d99: 6a 00 push $0x0
800d9b: e8 e5 fd ff ff call 800b85 <sys_page_alloc>
if (r < 0) {
800da0: 83 c4 10 add $0x10,%esp
800da3: 85 c0 test %eax,%eax
800da5: 78 14 js 800dbb <set_pgfault_handler+0x45>
sys_env_set_pgfault_upcall(0, _pgfault_upcall); //系统调用，设置进程的env_pgfault_upcall属性
800da7: 83 ec 08 sub $0x8,%esp
800daa: 68 cf 0d 80 00 push $0x800dcf
800daf: 6a 00 push $0x0
800db1: e8 1a ff ff ff call 800cd0 <sys_env_set_pgfault_upcall>
800db6: 83 c4 10 add $0x10,%esp
800db9: eb ca jmp 800d85 <set_pgfault_handler+0xf>
panic("set_pgfault_handler:sys_page_alloc failed");;
800dbb: 83 ec 04 sub $0x4,%esp
800dbe: 68 cc 13 80 00 push $0x8013cc
800dc3: 6a 22 push $0x22
800dc5: 68 f6 13 80 00 push $0x8013f6
800dca: e8 24 00 00 00 call 800df3 <_panic>
00800dcf <_pgfault_upcall>:
.text
.globl _pgfault_upcall
_pgfault_upcall:
// Call the C page fault handler.
pushl %esp // function argument: pointer to UTF
800dcf: 54 push %esp
movl _pgfault_handler, %eax
800dd0: a1 08 20 80 00 mov 0x802008,%eax
call *%eax //调用页处理函数
800dd5: ff d0 call *%eax
addl $4, %esp // pop function argument
800dd7: 83 c4 04 add $0x4,%esp
// LAB 4: Your code here.
// Restore the trap-time registers. After you do this, you
// can no longer modify any general-purpose registers.
// LAB 4: Your code here.
addl $8, %esp //跳过utf_fault_va和utf_err
800dda: 83 c4 08 add $0x8,%esp
movl 40(%esp), %eax //保存中断发生时的esp到eax
800ddd: 8b 44 24 28 mov 0x28(%esp),%eax
movl 32(%esp), %ecx //保存终端发生时的eip到ecx
800de1: 8b 4c 24 20 mov 0x20(%esp),%ecx
movl %ecx, -4(%eax) //将中断发生时的esp值亚入到到原来的栈中
800de5: 89 48 fc mov %ecx,-0x4(%eax)
popal
800de8: 61 popa
addl $4, %esp //跳过eip
800de9: 83 c4 04 add $0x4,%esp
// Restore eflags from the stack. After you do this, you can
// no longer use arithmetic operations or anything else that
// modifies eflags.
// LAB 4: Your code here.
popfl
800dec: 9d popf
// Switch back to the adjusted trap-time stack.
// LAB 4: Your code here.
popl %esp
800ded: 5c pop %esp
// Return to re-execute the instruction that faulted.
// LAB 4: Your code here.
lea -4(%esp), %esp //因为之前压入了eip的值但是没有减esp的值，所以现在需要将esp寄存器中的值减4
800dee: 8d 64 24 fc lea -0x4(%esp),%esp
800df2: c3 ret
00800df3 <_panic>:
* It prints "panic: <message>", then causes a breakpoint exception,
* which causes JOS to enter the JOS kernel monitor.
*/
void
_panic(const char *file, int line, const char *fmt, ...)
{
800df3: 55 push %ebp
800df4: 89 e5 mov %esp,%ebp
800df6: 56 push %esi
800df7: 53 push %ebx
va_list ap;
va_start(ap, fmt);
800df8: 8d 5d 14 lea 0x14(%ebp),%ebx
// Print the panic message
cprintf("[%08x] user panic in %s at %s:%d: ",
800dfb: 8b 35 00 20 80 00 mov 0x802000,%esi
800e01: e8 41 fd ff ff call 800b47 <sys_getenvid>
800e06: 83 ec 0c sub $0xc,%esp
800e09: ff 75 0c pushl 0xc(%ebp)
800e0c: ff 75 08 pushl 0x8(%ebp)
800e0f: 56 push %esi
800e10: 50 push %eax
800e11: 68 04 14 80 00 push $0x801404
800e16: e8 52 f3 ff ff call 80016d <cprintf>
sys_getenvid(), binaryname, file, line);
vcprintf(fmt, ap);
800e1b: 83 c4 18 add $0x18,%esp
800e1e: 53 push %ebx
800e1f: ff 75 10 pushl 0x10(%ebp)
800e22: e8 f5 f2 ff ff call 80011c <vcprintf>
cprintf("\n");
800e27: c7 04 24 9a 10 80 00 movl $0x80109a,(%esp)
800e2e: e8 3a f3 ff ff call 80016d <cprintf>
800e33: 83 c4 10 add $0x10,%esp
// Cause a breakpoint exception
while (1)
asm volatile("int3");
800e36: cc int3
800e37: eb fd jmp 800e36 <_panic+0x43>
800e39: 66 90 xchg %ax,%ax
800e3b: 66 90 xchg %ax,%ax
800e3d: 66 90 xchg %ax,%ax
800e3f: 90 nop
00800e40 <__udivdi3>:
800e40: 55 push %ebp
800e41: 57 push %edi
800e42: 56 push %esi
800e43: 53 push %ebx
800e44: 83 ec 1c sub $0x1c,%esp
800e47: 8b 54 24 3c mov 0x3c(%esp),%edx
800e4b: 8b 6c 24 30 mov 0x30(%esp),%ebp
800e4f: 8b 74 24 34 mov 0x34(%esp),%esi
800e53: 8b 5c 24 38 mov 0x38(%esp),%ebx
800e57: 85 d2 test %edx,%edx
800e59: 75 35 jne 800e90 <__udivdi3+0x50>
800e5b: 39 f3 cmp %esi,%ebx
800e5d: 0f 87 bd 00 00 00 ja 800f20 <__udivdi3+0xe0>
800e63: 85 db test %ebx,%ebx
800e65: 89 d9 mov %ebx,%ecx
800e67: 75 0b jne 800e74 <__udivdi3+0x34>
800e69: b8 01 00 00 00 mov $0x1,%eax
800e6e: 31 d2 xor %edx,%edx
800e70: f7 f3 div %ebx
800e72: 89 c1 mov %eax,%ecx
800e74: 31 d2 xor %edx,%edx
800e76: 89 f0 mov %esi,%eax
800e78: f7 f1 div %ecx
800e7a: 89 c6 mov %eax,%esi
800e7c: 89 e8 mov %ebp,%eax
800e7e: 89 f7 mov %esi,%edi
800e80: f7 f1 div %ecx
800e82: 89 fa mov %edi,%edx
800e84: 83 c4 1c add $0x1c,%esp
800e87: 5b pop %ebx
800e88: 5e pop %esi
800e89: 5f pop %edi
800e8a: 5d pop %ebp
800e8b: c3 ret
800e8c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
800e90: 39 f2 cmp %esi,%edx
800e92: 77 7c ja 800f10 <__udivdi3+0xd0>
800e94: 0f bd fa bsr %edx,%edi
800e97: 83 f7 1f xor $0x1f,%edi
800e9a: 0f 84 98 00 00 00 je 800f38 <__udivdi3+0xf8>
800ea0: 89 f9 mov %edi,%ecx
800ea2: b8 20 00 00 00 mov $0x20,%eax
800ea7: 29 f8 sub %edi,%eax
800ea9: d3 e2 shl %cl,%edx
800eab: 89 54 24 08 mov %edx,0x8(%esp)
800eaf: 89 c1 mov %eax,%ecx
800eb1: 89 da mov %ebx,%edx
800eb3: d3 ea shr %cl,%edx
800eb5: 8b 4c 24 08 mov 0x8(%esp),%ecx
800eb9: 09 d1 or %edx,%ecx
800ebb: 89 f2 mov %esi,%edx
800ebd: 89 4c 24 08 mov %ecx,0x8(%esp)
800ec1: 89 f9 mov %edi,%ecx
800ec3: d3 e3 shl %cl,%ebx
800ec5: 89 c1 mov %eax,%ecx
800ec7: d3 ea shr %cl,%edx
800ec9: 89 f9 mov %edi,%ecx
800ecb: 89 5c 24 0c mov %ebx,0xc(%esp)
800ecf: d3 e6 shl %cl,%esi
800ed1: 89 eb mov %ebp,%ebx
800ed3: 89 c1 mov %eax,%ecx
800ed5: d3 eb shr %cl,%ebx
800ed7: 09 de or %ebx,%esi
800ed9: 89 f0 mov %esi,%eax
800edb: f7 74 24 08 divl 0x8(%esp)
800edf: 89 d6 mov %edx,%esi
800ee1: 89 c3 mov %eax,%ebx
800ee3: f7 64 24 0c mull 0xc(%esp)
800ee7: 39 d6 cmp %edx,%esi
800ee9: 72 0c jb 800ef7 <__udivdi3+0xb7>
800eeb: 89 f9 mov %edi,%ecx
800eed: d3 e5 shl %cl,%ebp
800eef: 39 c5 cmp %eax,%ebp
800ef1: 73 5d jae 800f50 <__udivdi3+0x110>
800ef3: 39 d6 cmp %edx,%esi
800ef5: 75 59 jne 800f50 <__udivdi3+0x110>
800ef7: 8d 43 ff lea -0x1(%ebx),%eax
800efa: 31 ff xor %edi,%edi
800efc: 89 fa mov %edi,%edx
800efe: 83 c4 1c add $0x1c,%esp
800f01: 5b pop %ebx
800f02: 5e pop %esi
800f03: 5f pop %edi
800f04: 5d pop %ebp
800f05: c3 ret
800f06: 8d 76 00 lea 0x0(%esi),%esi
800f09: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
800f10: 31 ff xor %edi,%edi
800f12: 31 c0 xor %eax,%eax
800f14: 89 fa mov %edi,%edx
800f16: 83 c4 1c add $0x1c,%esp
800f19: 5b pop %ebx
800f1a: 5e pop %esi
800f1b: 5f pop %edi
800f1c: 5d pop %ebp
800f1d: c3 ret
800f1e: 66 90 xchg %ax,%ax
800f20: 31 ff xor %edi,%edi
800f22: 89 e8 mov %ebp,%eax
800f24: 89 f2 mov %esi,%edx
800f26: f7 f3 div %ebx
800f28: 89 fa mov %edi,%edx
800f2a: 83 c4 1c add $0x1c,%esp
800f2d: 5b pop %ebx
800f2e: 5e pop %esi
800f2f: 5f pop %edi
800f30: 5d pop %ebp
800f31: c3 ret
800f32: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
800f38: 39 f2 cmp %esi,%edx
800f3a: 72 06 jb 800f42 <__udivdi3+0x102>
800f3c: 31 c0 xor %eax,%eax
800f3e: 39 eb cmp %ebp,%ebx
800f40: 77 d2 ja 800f14 <__udivdi3+0xd4>
800f42: b8 01 00 00 00 mov $0x1,%eax
800f47: eb cb jmp 800f14 <__udivdi3+0xd4>
800f49: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
800f50: 89 d8 mov %ebx,%eax
800f52: 31 ff xor %edi,%edi
800f54: eb be jmp 800f14 <__udivdi3+0xd4>
800f56: 66 90 xchg %ax,%ax
800f58: 66 90 xchg %ax,%ax
800f5a: 66 90 xchg %ax,%ax
800f5c: 66 90 xchg %ax,%ax
800f5e: 66 90 xchg %ax,%ax
00800f60 <__umoddi3>:
800f60: 55 push %ebp
800f61: 57 push %edi
800f62: 56 push %esi
800f63: 53 push %ebx
800f64: 83 ec 1c sub $0x1c,%esp
800f67: 8b 6c 24 3c mov 0x3c(%esp),%ebp
800f6b: 8b 74 24 30 mov 0x30(%esp),%esi
800f6f: 8b 5c 24 34 mov 0x34(%esp),%ebx
800f73: 8b 7c 24 38 mov 0x38(%esp),%edi
800f77: 85 ed test %ebp,%ebp
800f79: 89 f0 mov %esi,%eax
800f7b: 89 da mov %ebx,%edx
800f7d: 75 19 jne 800f98 <__umoddi3+0x38>
800f7f: 39 df cmp %ebx,%edi
800f81: 0f 86 b1 00 00 00 jbe 801038 <__umoddi3+0xd8>
800f87: f7 f7 div %edi
800f89: 89 d0 mov %edx,%eax
800f8b: 31 d2 xor %edx,%edx
800f8d: 83 c4 1c add $0x1c,%esp
800f90: 5b pop %ebx
800f91: 5e pop %esi
800f92: 5f pop %edi
800f93: 5d pop %ebp
800f94: c3 ret
800f95: 8d 76 00 lea 0x0(%esi),%esi
800f98: 39 dd cmp %ebx,%ebp
800f9a: 77 f1 ja 800f8d <__umoddi3+0x2d>
800f9c: 0f bd cd bsr %ebp,%ecx
800f9f: 83 f1 1f xor $0x1f,%ecx
800fa2: 89 4c 24 04 mov %ecx,0x4(%esp)
800fa6: 0f 84 b4 00 00 00 je 801060 <__umoddi3+0x100>
800fac: b8 20 00 00 00 mov $0x20,%eax
800fb1: 89 c2 mov %eax,%edx
800fb3: 8b 44 24 04 mov 0x4(%esp),%eax
800fb7: 29 c2 sub %eax,%edx
800fb9: 89 c1 mov %eax,%ecx
800fbb: 89 f8 mov %edi,%eax
800fbd: d3 e5 shl %cl,%ebp
800fbf: 89 d1 mov %edx,%ecx
800fc1: 89 54 24 0c mov %edx,0xc(%esp)
800fc5: d3 e8 shr %cl,%eax
800fc7: 09 c5 or %eax,%ebp
800fc9: 8b 44 24 04 mov 0x4(%esp),%eax
800fcd: 89 c1 mov %eax,%ecx
800fcf: d3 e7 shl %cl,%edi
800fd1: 89 d1 mov %edx,%ecx
800fd3: 89 7c 24 08 mov %edi,0x8(%esp)
800fd7: 89 df mov %ebx,%edi
800fd9: d3 ef shr %cl,%edi
800fdb: 89 c1 mov %eax,%ecx
800fdd: 89 f0 mov %esi,%eax
800fdf: d3 e3 shl %cl,%ebx
800fe1: 89 d1 mov %edx,%ecx
800fe3: 89 fa mov %edi,%edx
800fe5: d3 e8 shr %cl,%eax
800fe7: 0f b6 4c 24 04 movzbl 0x4(%esp),%ecx
800fec: 09 d8 or %ebx,%eax
800fee: f7 f5 div %ebp
800ff0: d3 e6 shl %cl,%esi
800ff2: 89 d1 mov %edx,%ecx
800ff4: f7 64 24 08 mull 0x8(%esp)
800ff8: 39 d1 cmp %edx,%ecx
800ffa: 89 c3 mov %eax,%ebx
800ffc: 89 d7 mov %edx,%edi
800ffe: 72 06 jb 801006 <__umoddi3+0xa6>
801000: 75 0e jne 801010 <__umoddi3+0xb0>
801002: 39 c6 cmp %eax,%esi
801004: 73 0a jae 801010 <__umoddi3+0xb0>
801006: 2b 44 24 08 sub 0x8(%esp),%eax
80100a: 19 ea sbb %ebp,%edx
80100c: 89 d7 mov %edx,%edi
80100e: 89 c3 mov %eax,%ebx
801010: 89 ca mov %ecx,%edx
801012: 0f b6 4c 24 0c movzbl 0xc(%esp),%ecx
801017: 29 de sub %ebx,%esi
801019: 19 fa sbb %edi,%edx
80101b: 8b 5c 24 04 mov 0x4(%esp),%ebx
80101f: 89 d0 mov %edx,%eax
801021: d3 e0 shl %cl,%eax
801023: 89 d9 mov %ebx,%ecx
801025: d3 ee shr %cl,%esi
801027: d3 ea shr %cl,%edx
801029: 09 f0 or %esi,%eax
80102b: 83 c4 1c add $0x1c,%esp
80102e: 5b pop %ebx
80102f: 5e pop %esi
801030: 5f pop %edi
801031: 5d pop %ebp
801032: c3 ret
801033: 90 nop
801034: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
801038: 85 ff test %edi,%edi
80103a: 89 f9 mov %edi,%ecx
80103c: 75 0b jne 801049 <__umoddi3+0xe9>
80103e: b8 01 00 00 00 mov $0x1,%eax
801043: 31 d2 xor %edx,%edx
801045: f7 f7 div %edi
801047: 89 c1 mov %eax,%ecx
801049: 89 d8 mov %ebx,%eax
80104b: 31 d2 xor %edx,%edx
80104d: f7 f1 div %ecx
80104f: 89 f0 mov %esi,%eax
801051: f7 f1 div %ecx
801053: e9 31 ff ff ff jmp 800f89 <__umoddi3+0x29>
801058: 90 nop
801059: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
801060: 39 dd cmp %ebx,%ebp
801062: 72 08 jb 80106c <__umoddi3+0x10c>
801064: 39 f7 cmp %esi,%edi
801066: 0f 87 21 ff ff ff ja 800f8d <__umoddi3+0x2d>
80106c: 89 da mov %ebx,%edx
80106e: 89 f0 mov %esi,%eax
801070: 29 f8 sub %edi,%eax
801072: 19 ea sbb %ebp,%edx
801074: e9 14 ff ff ff jmp 800f8d <__umoddi3+0x2d>
| 40.564432 | 93 | 0.460592 |
707dbc4984d0dff29c347583efe9247524017afb | 387 | asm | Assembly | libsrc/stdio/nc100/fputc_cons.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 640 | 2017-01-14T23:33:45.000Z | 2022-03-30T11:28:42.000Z | libsrc/stdio/nc100/fputc_cons.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 1,600 | 2017-01-15T16:12:02.000Z | 2022-03-31T12:11:12.000Z | libsrc/stdio/nc100/fputc_cons.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 215 | 2017-01-17T10:43:03.000Z | 2022-03-23T17:25:02.000Z | ;
; Put character to console
;
; fputc_cons(char c)
;
;
; $Id: fputc_cons.asm,v 1.5+ (now on GIT) $
;
SECTION code_clib
PUBLIC fputc_cons_native
.fputc_cons_native
ld hl,2
add hl,sp
ld a,(hl)
cp 12
jp z,$B824 ;TXTCLEARWINDOW (cls)
IF STANDARDESCAPECHARS
cp 10
ELSE
cp 13
ENDIF
jr nz,fputc_cons1
ld a,13
call $B833 ;txtoutput
ld a,10
.fputc_cons1
jp $B833 ;txtoutput
| 11.727273 | 43 | 0.69509 |
f329a0b40042b6a9bb15ab6e50b9c5c94a22a920 | 3,974 | asm | Assembly | kernel.asm | alexbelm48/AtieDOS | 89e10732870ea0cb0d665974966cc19753fe6698 | [
"BSD-3-Clause"
] | 33 | 2020-03-14T16:42:25.000Z | 2022-01-15T21:04:01.000Z | kernel.asm | alexbelm48/AtieDOS | 89e10732870ea0cb0d665974966cc19753fe6698 | [
"BSD-3-Clause"
] | 1 | 2020-03-18T11:35:36.000Z | 2020-03-18T11:35:36.000Z | kernel.asm | alexbelm48/AtieDOS | 89e10732870ea0cb0d665974966cc19753fe6698 | [
"BSD-3-Clause"
] | 6 | 2020-03-15T09:55:26.000Z | 2021-07-06T13:47:43.000Z | ; AtieDOS 2.10 Kernel
; Copyright (c) 2020 AtieSoftware
; See LICENSE in root folder
; KERNEL STARTS HERE
kernel_main:
call os_print_new_line ; calls new line function
mov bx, STARTED_SUCCESS_MSG ; prints "AtieDOS started successfully."
call os_print_string
call os_print_new_line
mov word[PROMPT], word "> " ; moves "> " to prompt
get_input:
call os_print_new_line
mov bx, PROMPT
call os_print_string
call null_input_string
; I am using SI as an index for the DI array of chars.
; I'm making this to handle backspaces well.
; postdata: this time the array starts at 1 because there's no negative
; numbers
mov si, 1
xor di, di
mov di, INPUT
.get_chars:
cmp si, 26
je .get_chars_error
call os_keystroke
cmp ah, [KEY_ENTER]
je .compare
cmp ah, [KEY_BACKSPACE]
je .handle_backspace
inc si
mov ah, 0x0e
int 10h
stosb
jmp .get_chars
.compare:
xor al, al
stosb
mov ax, INPUT
call os_string_to_lowercase
mov si, ABOUT_STR
mov di, INPUT
mov cx, command_about
call os_string_compare_and_jump
mov si, STRA_STR
mov di, INPUT
mov cx, command_stra
call os_string_compare_and_jump
mov si, CLEAR_STR
mov di, INPUT
mov cx, command_clear
call os_string_compare_and_jump
mov si, CHSET_STR
mov di, INPUT
mov cx, command_charset
call os_string_compare_and_jump
mov si, ECHO_STR
mov di, INPUT
mov cx, command_echo
call os_string_compare_and_jump
mov si, HELP_STR
mov di, INPUT
mov cx, command_help
call os_string_compare_and_jump
mov si, PROMPT_STR
mov di, INPUT
mov cx, command_prompt
call os_string_compare_and_jump
mov si, PAUSE_STR
mov di, INPUT
mov cx, command_pause
call os_string_compare_and_jump
mov si, RESTART_STR
mov di, INPUT
mov cx, command_exit
call os_string_compare_and_jump
mov si, SHUTDOWN_STR
mov di, INPUT
mov cx, command_shutdown
call os_string_compare_and_jump
mov si, WRITE_STR
mov di, INPUT
mov cx, command_write
call os_string_compare_and_jump
call os_print_new_line
mov bx, INVALID_CMD_MSG
call os_print_string
mov bx, QUOTE
call os_print_string
mov bx, di
call os_print_string
mov bx, QUOTE
call os_print_string
call os_print_new_line
jmp get_input
.get_chars_error:
call os_print_new_line
mov bx, .GET_CHARS_ERROR
call os_print_string
jmp get_input
.GET_CHARS_ERROR: db "You cannot write something larger than 25 chars to avoid bugs. Sorry.",0
.handle_backspace:
cmp si, 1
je .handle_backspace_no_backspace
dec di
dec si
call os_get_cursor_position
mov ah, 0x02
dec dl
xor bh, bh
int 10h
mov ah, 0x0e
mov al, ' '
int 10h
mov ah, 0x02
dec dl
xor bh, bh
int 10h
mov ah, 0x02
inc dl
xor bh, bh
int 10h
jmp .get_chars
.handle_backspace_no_backspace:
jmp .get_chars
null_input_string:
xor di, di
mov di, INPUT
mov si, 25
.null_input_string_loop:
cmp si, 0
je .null_input_string_done
mov al, 0
stosb
dec si
jmp .null_input_string_loop
.null_input_string_done:
ret
STARTED_SUCCESS_MSG: db "AtieDOS started successfully.", 0
INVALID_CMD_MSG: db "Invalid command: ", 0
QUOTE: db '"', 0
PROMPT: times 25 db 0
INPUT: times 25 db 0
ABOUT_STR: db "about", 0
STRA_STR: db "stra", 0
CLEAR_STR: db "clear", 0
CHSET_STR: db "chset", 0
ECHO_STR: db "echo", 0
HELP_STR: db "help", 0
PROMPT_STR: db "prompt", 0
PAUSE_STR: db "pause", 0
RESTART_STR: db "restart", 0
SHUTDOWN_STR: db "shutdown", 0
WRITE_STR: db "write", 0
%include "syscalls/_syscalls.asm"
%include "commands/_commands.asm"
%include "data/keys.asm"
| 17.12931 | 98 | 0.659034 |
bc866b13a958a03d3bc062a271070ea37d27ebaf | 1,102 | asm | Assembly | test/z80/test_ld.asm | gb-archive/asmotor | c821d8be10b7b66d93e0b68777c8643d9a53955f | [
"Naumen",
"Condor-1.1",
"MS-PL"
] | null | null | null | test/z80/test_ld.asm | gb-archive/asmotor | c821d8be10b7b66d93e0b68777c8643d9a53955f | [
"Naumen",
"Condor-1.1",
"MS-PL"
] | null | null | null | test/z80/test_ld.asm | gb-archive/asmotor | c821d8be10b7b66d93e0b68777c8643d9a53955f | [
"Naumen",
"Condor-1.1",
"MS-PL"
] | null | null | null | SECTION "Test",CODE[0]
Data: EQU $1234
ld (bc),a
ld (de),a
ld (hl),b
ld (hl),l
ld (hl),($21)*2
ld (ix+1),b
ld (ix+2),a
ld (ix+3),$42
ld (iy+4),b
ld (iy+5),l
ld (iy+6),$87
ld (Data),a
ld (Data),bc
ld (Data),de
ld (Data),hl
ld (Data),ix
ld (Data),iy
ld (Data),sp
ld a,(bc)
ld a,(de)
ld a,(hl)
ld a,(ix+1)
ld a,(iy+2)
ld a,(Data)
ld a,b
ld a,l
ld a,i
ld a,$42
ld a,r
ld b,(hl)
ld b,(ix+1)
ld b,(iy+2)
ld b,a
ld b,$87
ld bc,(Data)
ld bc,Data
ld c,(hl)
ld c,(ix+1)
ld c,(iy+2)
ld c,l
ld c,$87
ld d,(hl)
ld d,(ix+1)
ld d,(iy+2)
ld d,l
ld d,$87
ld de,(Data)
ld de,Data
ld e,(hl)
ld e,(ix+1)
ld e,(iy+2)
ld e,l
ld e,$42
ld h,(hl)
ld h,(ix+1)
ld h,(iy+2)
ld h,l
ld h,$87
ld hl,(Data)
ld hl,Data
ld i,a
ld ix,(Data)
ld ix,Data
ld iy,(Data)
ld iy,Data
ld l,(hl)
ld l,(ix+1)
ld l,(iy+2)
ld l,b
ld l,$42
ld r,a
ld sp,(Data)
ld sp,hl
ld sp,ix
ld sp,iy
ld sp,Data
| 12.10989 | 23 | 0.435572 |
7df96d58f9533794d41e17153ab106ed471e3dff | 142 | asm | Assembly | src/main/fragment/mos6502-common/vdum1=vduc1_plus_vdum2.asm | jbrandwood/kickc | d4b68806f84f8650d51b0e3ef254e40f38b0ffad | [
"MIT"
] | 2 | 2022-03-01T02:21:14.000Z | 2022-03-01T04:33:35.000Z | src/main/fragment/mos6502-common/vdum1=vduc1_plus_vdum2.asm | jbrandwood/kickc | d4b68806f84f8650d51b0e3ef254e40f38b0ffad | [
"MIT"
] | null | null | null | src/main/fragment/mos6502-common/vdum1=vduc1_plus_vdum2.asm | jbrandwood/kickc | d4b68806f84f8650d51b0e3ef254e40f38b0ffad | [
"MIT"
] | null | null | null | clc
lda {m2}
adc #<{c1}
sta {m1}
lda {m2}+1
adc #>{c1}
sta {m1}+1
lda {m2}+2
adc #<{c1}>>$10
sta {m1}+2
lda {m2}+3
adc #>{c1}>>$10
sta {m1}+3
| 10.142857 | 15 | 0.514085 |
537a7cc664eaa8db327166b417e13fe285e5cbf4 | 4,779 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0xca_notsx.log_21829_1930.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0xca_notsx.log_21829_1930.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0xca_notsx.log_21829_1930.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
ret
.global s_faulty_load
s_faulty_load:
push %r14
push %r8
push %r9
push %rax
push %rbx
push %rcx
push %rdi
push %rsi
// Load
lea addresses_PSE+0xa0f9, %r8
nop
nop
nop
sub %r14, %r14
mov (%r8), %bx
nop
nop
add $62330, %r9
// Load
lea addresses_WC+0x1f2f9, %r14
nop
add $34260, %rsi
movb (%r14), %bl
nop
xor $48700, %r14
// REPMOV
lea addresses_RW+0x18459, %rsi
lea addresses_D+0x1c8ff, %rdi
nop
nop
and %r9, %r9
mov $38, %rcx
rep movsw
nop
xor %rsi, %rsi
// REPMOV
lea addresses_D+0x162f9, %rsi
lea addresses_WC+0x2af9, %rdi
cmp %r8, %r8
mov $32, %rcx
rep movsb
nop
nop
cmp %r9, %r9
// Faulty Load
lea addresses_PSE+0x192f9, %rdi
nop
add %rax, %rax
vmovups (%rdi), %ymm0
vextracti128 $0, %ymm0, %xmm0
vpextrq $1, %xmm0, %r9
lea oracles, %rdi
and $0xff, %r9
shlq $12, %r9
mov (%rdi,%r9,1), %r9
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %rax
pop %r9
pop %r8
pop %r14
ret
/*
<gen_faulty_load>
[REF]
{'src': {'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 0, 'same': False, 'type': 'addresses_PSE'}, 'OP': 'LOAD'}
{'src': {'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 9, 'same': False, 'type': 'addresses_PSE'}, 'OP': 'LOAD'}
{'src': {'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 9, 'same': False, 'type': 'addresses_WC'}, 'OP': 'LOAD'}
{'src': {'congruent': 3, 'same': False, 'type': 'addresses_RW'}, 'dst': {'congruent': 1, 'same': False, 'type': 'addresses_D'}, 'OP': 'REPM'}
{'src': {'congruent': 8, 'same': False, 'type': 'addresses_D'}, 'dst': {'congruent': 11, 'same': False, 'type': 'addresses_WC'}, 'OP': 'REPM'}
[Faulty Load]
{'src': {'NT': False, 'AVXalign': False, 'size': 32, 'congruent': 0, 'same': True, 'type': 'addresses_PSE'}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'33': 21829}
33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33
*/
| 52.516484 | 2,999 | 0.655367 |
4114a647ae37b744e9d74da5bc77fd4e7f2a2c93 | 217 | asm | Assembly | test/e2e/data/arm1.asm | matanlurey/armv4t.dart | 06235938d16cb1f2b09d26f564b985854e4155c0 | [
"MIT"
] | 8 | 2020-06-21T22:05:00.000Z | 2021-10-06T19:59:20.000Z | test/e2e/data/arm1.asm | matanlurey/armv4t.dart | 06235938d16cb1f2b09d26f564b985854e4155c0 | [
"MIT"
] | 82 | 2020-06-21T22:02:00.000Z | 2020-08-04T01:48:42.000Z | test/e2e/data/arm1.asm | matanlurey/armv4t.dart | 06235938d16cb1f2b09d26f564b985854e4155c0 | [
"MIT"
] | 1 | 2020-06-22T15:16:02.000Z | 2020-06-22T15:16:02.000Z | ; expected result: 0x100 = 5, 0x104 = 5, 0x108 = 5
mov r0, #1
mov r1, #2
mov r2, #3
adds r3, r2, r1
mov r4, #0
movne r4, r3
mov r6, #0x100
str r3, [r6, #0]
str r4, [r6, #4]
ldr r5, [r6, r0, LSL#2]
str r5, [r6, #8]
| 13.5625 | 50 | 0.562212 |
1758b65a0903d59c92f15d1471f6e4a47d2d8ab0 | 562 | asm | Assembly | engine/battle/move_effects/perish_song.asm | Dev727/ancientplatinum | 8b212a1728cc32a95743e1538b9eaa0827d013a7 | [
"blessing"
] | 28 | 2019-11-08T07:19:00.000Z | 2021-12-20T10:17:54.000Z | engine/battle/move_effects/perish_song.asm | Dev727/ancientplatinum | 8b212a1728cc32a95743e1538b9eaa0827d013a7 | [
"blessing"
] | 13 | 2020-01-11T17:00:40.000Z | 2021-09-14T01:27:38.000Z | engine/battle/move_effects/perish_song.asm | Dev727/ancientplatinum | 8b212a1728cc32a95743e1538b9eaa0827d013a7 | [
"blessing"
] | 22 | 2020-05-28T17:31:38.000Z | 2022-03-07T20:49:35.000Z | BattleCommand_PerishSong:
; perishsong
ld hl, wPlayerSubStatus1
ld de, wEnemySubStatus1
bit SUBSTATUS_PERISH, [hl]
jr z, .ok
ld a, [de]
bit SUBSTATUS_PERISH, a
jr nz, .failed
.ok
bit SUBSTATUS_PERISH, [hl]
jr nz, .enemy
set SUBSTATUS_PERISH, [hl]
ld a, 4
ld [wPlayerPerishCount], a
.enemy
ld a, [de]
bit SUBSTATUS_PERISH, a
jr nz, .done
set SUBSTATUS_PERISH, a
ld [de], a
ld a, 4
ld [wEnemyPerishCount], a
.done
call AnimateCurrentMove
ld hl, StartPerishText
jp StdBattleTextbox
.failed
call AnimateFailedMove
jp PrintButItFailed
| 14.410256 | 27 | 0.727758 |
87c8a0770216b3ed33460932c1d03d3c84e418ec | 19,571 | asm | Assembly | tests/bfp-020-multlonger.asm | mtalexander/hyperion | 05ade04006bd53f03dba6ec8c0a0155bae994b84 | [
"BSL-1.0"
] | 187 | 2015-01-10T15:01:43.000Z | 2022-03-03T14:06:17.000Z | tests/bfp-020-multlonger.asm | mtalexander/hyperion | 05ade04006bd53f03dba6ec8c0a0155bae994b84 | [
"BSL-1.0"
] | 246 | 2015-01-04T15:59:06.000Z | 2022-03-19T23:21:55.000Z | tests/bfp-020-multlonger.asm | mtalexander/hyperion | 05ade04006bd53f03dba6ec8c0a0155bae994b84 | [
"BSL-1.0"
] | 83 | 2015-01-11T10:55:01.000Z | 2022-03-25T16:08:57.000Z | TITLE 'bfp-020-multlonger.asm: Test IEEE Multiply'
***********************************************************************
*
*Testcase IEEE MULTIPLY (to longer precision)
* Test case capability includes IEEE exceptions trappable and
* otherwise. Test results, FPCR flags, the Condition code, and any
* DXC are saved for all tests.
*
* The result precision for each instruction is longer than the input
* operands. As a result, the underflow and overflow exceptions will
* never occur. Further, the results are always exact. There is
* no rounding of the result.
*
* The fused multiply operations are not included in this test program,
* nor are the standard multiply instructions. The former are
* are excluded to keep test case complexity manageable, and latter
* because they require a more extensive testing profile (overflow,
* underflow, rounding).
*
***********************************************************************
SPACE 2
***********************************************************************
*
* bfp-020-multlonger.asm
*
* This assembly-language source file is part of the
* Hercules Binary Floating Point Validation Package
* by Stephen R. Orso
*
* Copyright 2016 by Stephen R Orso.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
*
* 3. The name of the author may not be used to endorse or promote
* products derived from this software without specific prior written
* permission.
*
* DISCLAMER: THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* HOLDER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
* OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
***********************************************************************
SPACE 2
***********************************************************************
*
* Tests the following five conversion instructions
* MULTIPLY (short BFP, RRE) (short to long)
* MULTIPLY (long BFP, RRE) (long to extended)
* MULTIPLY (short BFP, RXE) (short to long)
* MULTIPLY (long BFP, RXE) (long to extended)
*
* Test data is compiled into this program. The test script that runs
* this program can provide alternative test data through Hercules R
* commands.
*
* Test Case Order
* 1) Short BFP basic tests, including traps and NaN propagation
* 2) Long BFP basic tests, including traps and NaN propagation
*
* One input test sets are provided each for short and long BFP inputs.
* Test values are the same for each precision.
*
* Also tests the following floating point support instructions
* LOAD (Short)
* LOAD (Long)
* LFPC (Load Floating Point Control Register)
* STORE (Short)
* STORE (Long)
* STFPC (Store Floating Point Control Register)
*
***********************************************************************
SPACE 2
MACRO
PADCSECT &ENDLABL
.*
.* Macro to pad the CSECT to include result data areas if this test
.* program is not being assembled using asma. asma generates a core
.* image that is loaded by the loadcore command, and because the
.* core image is a binary stored in Github, it makes sense to make
.* this small effort to keep the core image small.
.*
AIF (D'&ENDLABL).GOODPAD
MNOTE 4,'Missing or invalid CSECT padding label ''&ENDLABL'''
MNOTE *,'No CSECT padding performed'
MEXIT
.*
.GOODPAD ANOP Label valid. See if we're on asma
AIF ('&SYSASM' EQ 'A SMALL MAINFRAME ASSEMBLER').NOPAD
ORG &ENDLABL-1 Not ASMA. Pad CSECT
MEXIT
.*
.NOPAD ANOP
MNOTE *,'asma detected; no CSECT padding performed'
MEND
*
* Note: for compatibility with the z/CMS test rig, do not change
* or use R11, R14, or R15. Everything else is fair game.
*
BFPMUL2L START 0
STRTLABL EQU *
R0 EQU 0 Work register for cc extraction
R1 EQU 1
R2 EQU 2 Holds count of test input values
R3 EQU 3 Points to next test input value(s)
R4 EQU 4 Rounding tests inner loop control
R5 EQU 5 Rounding tests outer loop control
R6 EQU 6 Rounding tests top of inner loop
R7 EQU 7 Pointer to next result value(s)
R8 EQU 8 Pointer to next FPCR result
R9 EQU 9 Rounding tests top of outer loop
R10 EQU 10 Pointer to test address list
R11 EQU 11 **Reserved for z/CMS test rig
R12 EQU 12 Holds number of test cases in set
R13 EQU 13 Mainline return address
R14 EQU 14 **Return address for z/CMS test rig
R15 EQU 15 **Base register on z/CMS or Hyperion
*
* Floating Point Register equates to keep the cross reference clean
*
FPR0 EQU 0
FPR1 EQU 1
FPR2 EQU 2
FPR3 EQU 3
FPR4 EQU 4
FPR5 EQU 5
FPR6 EQU 6
FPR7 EQU 7
FPR8 EQU 8
FPR9 EQU 9
FPR10 EQU 10
FPR11 EQU 11
FPR12 EQU 12
FPR13 EQU 13
FPR14 EQU 14
FPR15 EQU 15
*
USING *,R15
*
* Above works on real iron (R15=0 after sysclear)
* and in z/CMS (R15 points to start of load module)
*
SPACE 2
***********************************************************************
*
* Low core definitions, Restart PSW, and Program Check Routine.
*
***********************************************************************
SPACE 2
ORG STRTLABL+X'8E' Program check interrution code
PCINTCD DS H
*
PCOLDPSW EQU STRTLABL+X'150' z/Arch Program check old PSW
*
ORG STRTLABL+X'1A0' z/Arch Restart PSW
DC X'0000000180000000',AD(START)
*
ORG STRTLABL+X'1D0' z/Arch Program check old PSW
DC X'0000000000000000',AD(PROGCHK)
*
* Program check routine. If Data Exception, continue execution at
* the instruction following the program check. Otherwise, hard wait.
* No need to collect data. All interesting DXC stuff is captured
* in the FPCR.
*
ORG STRTLABL+X'200'
PROGCHK DS 0H Program check occured...
CLI PCINTCD+1,X'07' Data Exception?
JNE PCNOTDTA ..no, hardwait (not sure if R15 is ok)
LPSWE PCOLDPSW ..yes, resume program execution
PCNOTDTA DS 0H
LTR R14,R14 Return address provided?
BNZR R14 Yes, return to z/CMS test rig.
LPSWE HARDWAIT Not data exception, enter disabled wait
EJECT
***********************************************************************
*
* Main program. Enable Advanced Floating Point, process test cases.
*
***********************************************************************
SPACE 2
START DS 0H
STCTL R0,R0,CTLR0 Store CR0 to enable AFP
OI CTLR0+1,X'04' Turn on AFP bit
LCTL R0,R0,CTLR0 Reload updated CR0
*
LA R10,SHORTNF Point to short BFP non-finite inputs
BAS R13,SBFPNF Multiply short BFP non-finites
*
LA R10,LONGNF Point to long BFP non-finite inputs
BAS R13,LBFPNF Multiply long BFP non-finites
*
LTR R14,R14 Return address provided?
BNZR R14 ..Yes, return to z/CMS test rig.
LPSWE WAITPSW All done
*
DS 0D Ensure correct alignment for psw
WAITPSW DC X'0002000000000000',AD(0) Normal end - disabled wait
HARDWAIT DC X'0002000000000000',XL6'00',X'DEAD' Abnormal end
*
CTLR0 DS F
FPCREGNT DC X'00000000' FPCR, trap all IEEE exceptions, zero flags
FPCREGTR DC X'F8000000' FPCR, trap no IEEE exceptions, zero flags
*
* Input values parameter list, four fullwords for each test data set
* 1) Count,
* 2) Address of inputs,
* 3) Address to place results, and
* 4) Address to place DXC/Flags/cc values.
*
ORG STRTLABL+X'300' Enable run-time replacement
SHORTNF DS 0F Input pairs for short BFP non-finite tests
DC A(SBFPNFCT)
DC A(SBFPNFIN)
DC A(LBFPNFOT)
DC A(LBFPNFFL)
*
LONGNF DS 0F Input pairs for long BFP non-finite testing
DC A(LBFPNFCT)
DC A(LBFPNFIN)
DC A(XBFPNFOT)
DC A(XBFPNFFL)
*
EJECT
***********************************************************************
*
* Perform Multiply using provided short BFP inputs. This set of tests
* checks NaN propagation, operations on values that are not finite
* numbers, and other basic tests. This set generates results that can
* be validated against Figure 19-23 on page 19-28 of SA22-7832-10.
* Each value in this table is tested against every other value in the
* table. Eight entries means 64 result sets.
*
* Four results are generated for each input: one RRE with all
* exceptions non-trappable, a second RRE with all exceptions trappable,
* a third RXE with all exceptions non-trappable, a fourth RXE with all
* exceptions trappable,
*
* The difference, FPCR, and condition code are stored for each result.
*
***********************************************************************
SPACE 2
SBFPNF DS 0H BFP Short non-finite values tests
LM R2,R3,0(R10) Get count and addr of multiplicand values
LM R7,R8,8(R10) Get address of result area and flag area.
LTR R2,R2 Any test cases?
BZR R13 ..No, return to caller
BASR R12,0 Set top of loop
*
LM R4,R5,0(R10) Get count and start of multiplier values
* ..which are the same as the multiplicands
BASR R6,0 Set top of inner loop
*
LE FPR8,0(,R3) Get short BFP multiplicand
LE FPR1,0(,R5) Get short BFP multiplier
LFPC FPCREGNT Set exceptions non-trappable
MDEBR FPR8,FPR1 Multiply short FPR8 by FPR1 RRE
STD FPR8,0(,R7) Store long BFP product
STFPC 0(R8) Store resulting FPCR flags and DXC
*
LE FPR8,0(,R3) Get short BFP multiplicand
LE FPR1,0(,R5) Get short BFP multiplier
LFPC FPCREGTR Set exceptions trappable
MDEBR FPR8,FPR1 Multiply short FPR8 by FPR1 RRE
STD FPR8,8(,R7) Store long BFP product
STFPC 4(R8) Store resulting FPCR flags and DXC
*
LE FPR8,0(,R3) Get short BFP multiplicand
LFPC FPCREGNT Set exceptions non-trappable
MDEB FPR8,0(,R5) Multiply short FPR8 by multiplier RXE
STD FPR8,16(,R7) Store long BFP product
STFPC 8(R8) Store resulting FPCR flags and DXC
*
LE FPR8,0(,R3) Get short BFP multiplicand
LFPC FPCREGTR Set exceptions trappable
MDEB FPR8,0(,R5) Multiply short FPR8 by multiplier RXE
STD FPR8,24(,R7) Store long BFP product
STFPC 12(R8) Store resulting FPCR flags and DXC
*
LA R5,4(,R5) Point to next multiplier value
LA R7,4*8(,R7) Point to next Multiply result area
LA R8,4*4(,R8) Point to next Multiply FPCR area
BCTR R4,R6 Loop through right-hand values
*
LA R3,4(,R3) Point to next input multiplicand
BCTR R2,R12 Loop through left-hand values
BR R13 All converted; return.
EJECT
***********************************************************************
*
* Perform Multiply using provided long BFP inputs. This set of tests
* checks NaN propagation, operations on values that are not finite
* numbers, and other basic tests. This set generates results that can
* validated against Figure 19-23 on page 19-28 of SA22-7832-10. Each
* value in this table is tested against every other value in the table.
* Eight entries means 64 result sets.
*
* Four results are generated for each input: one RRE with all
* exceptions non-trappable, a second RRE with all exceptions trappable,
* a third RXE with all exceptions non-trappable, a fourth RXE with all
* exceptions trappable,
*
* The difference, FPCR, and condition code are stored for each result.
*
***********************************************************************
SPACE 2
LBFPNF DS 0H BFP long non-finite values tests
LM R2,R3,0(R10) Get count and addr of multiplicand values
LM R7,R8,8(R10) Get address of result area and flag area.
LTR R2,R2 Any test cases?
BZR R13 ..No, return to caller
BASR R12,0 Set top of loop
*
LM R4,R5,0(R10) Get count and start of multiplier values
* ..which are the same as the multiplicands
BASR R6,0 Set top of inner loop
*
LD FPR8,0(,R3) Get long BFP multiplicand
LD FPR1,0(,R5) Get long BFP multiplier
LFPC FPCREGNT Set exceptions non-trappable
MXDBR FPR8,FPR1 Multiply long FPR8 by FPR1 RRE
STD FPR8,0(,R7) Store extended BFP product part 1
STD FPR10,8(,R7) Store extended BFP product part 2
STFPC 0(R8) Store resulting FPCR flags and DXC
*
LD FPR8,0(,R3) Get long BFP multiplicand
LD FPR1,0(,R5) Get long BFP multiplier
LFPC FPCREGTR Set exceptions trappable
MXDBR FPR8,FPR1 Multiply long multiplier from FPR8 RRE
STD FPR8,16(,R7) Store extended BFP product part 1
STD FPR10,24(,R7) Store extended BFP product part 2
STFPC 4(R8) Store resulting FPCR flags and DXC
*
LD FPR8,0(,R3) Get long BFP multiplicand
LFPC FPCREGNT Set exceptions non-trappable
MXDB FPR8,0(,R5) Multiply long FPR8 by multiplier RXE
STD FPR8,32(,R7) Store extended BFP product part 1
STD FPR10,40(,R7) Store extended BFP product part 2
STFPC 8(R8) Store resulting FPCR flags and DXC
*
LD FPR8,0(,R3) Get long BFP multiplicand
LFPC FPCREGTR Set exceptions trappable
MXDB FPR8,0(,R5) Multiply long FPR8 by multiplier RXE
STD FPR8,48(,R7) Store extended BFP product part 1
STD FPR10,56(,R7) Store extended BFP product part 2
STFPC 12(R8) Store resulting FPCR flags and DXC
*
LA R5,8(,R5) Point to next multiplier value
LA R7,4*16(,R7) Point to next Multiply result area
LA R8,4*4(,R8) Point to next Multiply FPCR area
BCTR R4,R6 Loop through right-hand values
*
LA R3,8(,R3) Point to next multiplicand value
BCTR R2,R12 Multiply until all cases tested
BR R13 All converted; return.
EJECT
***********************************************************************
*
* Short BFP test data for Multiply to longer precision testing.
*
* The test data set is used for tests of basic functionality, NaN
* propagation, and results from operations involving other than finite
* numbers.
*
* Member values chosen to validate against Figure 19-23 on page 19-28
* of SA22-7832-10. Each value in this table is tested against every
* other value in the table. Eight entries means 64 result sets.
*
* Because Multiply to longer precision cannot generate overflow nor
* underflow exceptions and the result is always exact, there are no
* further tests required. Any more extensive testing would be in
* effect a test of Softfloat, not of the the integration of Softfloat
* to Hercules.
*
***********************************************************************
SPACE 2
SBFPNFIN DS 0F Inputs for short BFP non-finite tests
DC X'FF800000' -inf
DC X'C0000000' -2.0
DC X'80000000' -0
DC X'00000000' +0
DC X'40000000' +2.0
DC X'7F800000' +inf
DC X'FFCB0000' -QNaN
DC X'7F8A0000' +SNaN
SBFPNFCT EQU (*-SBFPNFIN)/4 Count of short BFP in list
EJECT
***********************************************************************
*
* Long BFP test data for Multiply to longer precision testing.
*
* The test data set is used for tests of basic functionality, NaN
* propagation, and results from operations involving other than finite
* numbers.
*
* Member values chosen to validate against Figure 19-23 on page 19-28
* of SA22-7832-10. Each value in this table is tested against every
* other value in the table. Eight entries means 64 result sets.
*
* Because Multiply to longer precision cannot generate overflow nor
* underflow exceptions and the result is always exact, there are no
* further tests required. Any more extensive testing would be in
* effect a test of Softfloat, not of the the integration of Softfloat
* to Hercules.
*
***********************************************************************
SPACE 2
LBFPNFIN DS 0F Inputs for long BFP testing
DC X'FFF0000000000000' -inf
DC X'C000000000000000' -2.0
DC X'8000000000000000' -0
DC X'0000000000000000' +0
DC X'4000000000000000' +2.0
DC X'7FF0000000000000' +inf
DC X'FFF8B00000000000' -QNaN
DC X'7FF0A00000000000' +SNaN
LBFPNFCT EQU (*-LBFPNFIN)/8 Count of long BFP in list
EJECT
*
* Locations for results
*
LBFPNFOT EQU STRTLABL+X'1000' Short non-finite BFP results
* ..room for 64 tests, 64 used
LBFPNFFL EQU STRTLABL+X'1800' FPCR flags and DXC from short BFP
* ..room for 64 tests, 64 used
* ..next location starts at X'1C00'
*
*
XBFPNFOT EQU STRTLABL+X'2000' Long non-finite BFP results
* ..room for 64 tests, 64 used
XBFPNFFL EQU STRTLABL+X'3000' FPCR flags and DXC from long BFP
* ..room for 64 tests, 64 used
* ..next location starts at X'3400'
*
ENDLABL EQU STRTLABL+X'3400'
PADCSECT ENDLABL
END
| 43.013187 | 72 | 0.585254 |
d0c5e16e996de464ca5e57f59478ce639cf532fe | 69 | asm | Assembly | Assembly/room_object_table.asm | CaitSith2/Enemizer | 53be2143063c5ca03216f76821ebbbce67313e34 | [
"WTFPL"
] | null | null | null | Assembly/room_object_table.asm | CaitSith2/Enemizer | 53be2143063c5ca03216f76821ebbbce67313e34 | [
"WTFPL"
] | null | null | null | Assembly/room_object_table.asm | CaitSith2/Enemizer | 53be2143063c5ca03216f76821ebbbce67313e34 | [
"WTFPL"
] | null | null | null | modified_room_object_table:
; Enemizer will write to here
skip #$1000 | 23 | 29 | 0.826087 |
203a3cc6a6646620f976b0b952472e001d166c87 | 2,404 | asm | Assembly | glitched.asm | Catobat/z3randomizer | e82f01ae2f81cfcf2ddd334a93df4a8f953878fb | [
"MIT"
] | 26 | 2018-12-19T03:33:19.000Z | 2021-08-07T19:47:06.000Z | glitched.asm | Catobat/z3randomizer | e82f01ae2f81cfcf2ddd334a93df4a8f953878fb | [
"MIT"
] | 26 | 2019-02-01T05:38:23.000Z | 2022-01-20T21:25:39.000Z | glitched.asm | Catobat/z3randomizer | e82f01ae2f81cfcf2ddd334a93df4a8f953878fb | [
"MIT"
] | 32 | 2018-12-18T13:54:33.000Z | 2022-01-25T23:38:48.000Z | ;================================================================================
; Glitched Mode Fixes
;================================================================================
GetAgahnimPalette:
LDA $A0 ; get room id
CMP.b #13 : BNE + ; Agahnim 2 room
LDA.b #$07 ; Use Agahnim 2
RTL
+ ; Elsewhere
LDA.b #$0b ; Use Agahnim 1
RTL
;--------------------------------------------------------------------------------
GetAgahnimDeath:
STA $0BA0, X ; thing we wrote over
LDA $A0 ; get room id
CMP.b #13 : BNE + ; Agahnim 2 room
LDA.l Bugfix_SetWorldOnAgahnimDeath : BEQ ++
LDA.l InvertedMode : BEQ +++
LDA.b #$00 : STA !DARK_WORLD ; Switch to light world
BRA ++
+++
LDA.b #$40 : STA !DARK_WORLD ; Switch to dark world
++
LDA.b #$01 ; Use Agahnim 2
RTL
+ ; Elsewhere
LDA.l Bugfix_SetWorldOnAgahnimDeath : BEQ ++
LDA.l InvertedMode : BEQ +++
LDA.b #$40 : STA !DARK_WORLD ; Switch to dark world
BRA ++
+++
LDA.b #$00 : STA !DARK_WORLD ; Switch to light world
; (This will later get flipped to DW when Agahnim 1
; warps us to the pyramid)
++
LDA.b #$00 ; Use Agahnim 1
RTL
;--------------------------------------------------------------------------------
GetAgahnimType:
LDA $A0 ; get room id
CMP.b #13 : BNE + ; Agahnim 2 room
LDA.b #$0006 ; Use Agahnim 2
BRA .done
+ ; Elsewhere
LDA.b #$0001 ; Use Agahnim 1
.done
RTL
;--------------------------------------------------------------------------------
GetAgahnimSlot:
PHX ; thing we wrote over
LDA $A0 ; get room id
CMP.b #13 : BNE + ; Agahnim 2 room
LDA.b #$01 ; Use Agahnim 2
JML.l GetAgahnimSlotReturn
+ ; Elsewhere
LDA.b #$00 ; Use Agahnim 1
JML.l GetAgahnimSlotReturn
;--------------------------------------------------------------------------------
GetAgahnimLightning:
INC $0E30, X ; thing we wrote over
LDA $A0 ; get room id
CMP.b #13 : BNE + ; Agahnim 2 room
LDA.b #$01 ; Use Agahnim 2
RTL
+ ; Elsewhere
LDA.b #$00 ; Use Agahnim 1
RTL
;--------------------------------------------------------------------------------
;0 = Allow
;1 = Forbid
AllowJoypadInput:
LDA PermitSQFromBosses : BEQ .fullCheck
LDA $0403 : AND.b #$80 : BEQ .fullCheck
LDA $0112 : ORA $02E4 ; we have heart container, do short check
RTL
.fullCheck
LDA $0112 : ORA $02E4 : ORA $0FFC
RTL
;--------------------------------------------------------------------------------
| 30.05 | 81 | 0.468386 |
6b6174605a10d3dffc6cbc21f062d1aa946dc3e0 | 313 | asm | Assembly | CSE3030: Assembly Programming/Lecture Notes and Codes From Text/Ch3 - Assembly Language Fundamentals/3.1.1-02_AddTwo_02.asm | yoonBot/Sogang-CSE | 34a267a0f4debc2082d6ec11e289e4250019fb96 | [
"MIT"
] | 1 | 2020-11-05T15:55:48.000Z | 2020-11-05T15:55:48.000Z | CSE3030: Assembly Programming/Lecture Notes and Codes From Text/Ch3 - Assembly Language Fundamentals/3.1.1-02_AddTwo_02.asm | yoonBot/Sogang-CSE | 34a267a0f4debc2082d6ec11e289e4250019fb96 | [
"MIT"
] | null | null | null | CSE3030: Assembly Programming/Lecture Notes and Codes From Text/Ch3 - Assembly Language Fundamentals/3.1.1-02_AddTwo_02.asm | yoonBot/Sogang-CSE | 34a267a0f4debc2082d6ec11e289e4250019fb96 | [
"MIT"
] | 1 | 2021-01-13T10:36:51.000Z | 2021-01-13T10:36:51.000Z | .data ; this is the data area
sum DWORD 0 ; create a variable named sum
.code ; this is the code area
main PROC
mov eax, 5 ; move 5 to the eax register
add eax, 6 ; add 6 to the eax register
mov sum, eax ; mov eax register to variable sum
INVOKE ExitProcess ; end the program
main ENDP | 28.454545 | 50 | 0.674121 |
68983cd4de95d59d631501c039d59ed77252969b | 5,079 | asm | Assembly | boot.asm | PenetratingShot/flametest | 5115c5a905d43636926d55cb03187201256d6f83 | [
"MIT"
] | 1 | 2020-02-26T20:53:31.000Z | 2020-02-26T20:53:31.000Z | boot.asm | PenetratingShot/flametest | 5115c5a905d43636926d55cb03187201256d6f83 | [
"MIT"
] | null | null | null | boot.asm | PenetratingShot/flametest | 5115c5a905d43636926d55cb03187201256d6f83 | [
"MIT"
] | 2 | 2019-12-01T21:54:09.000Z | 2020-02-26T21:30:22.000Z | ; boot.asm
[extern __kernel_start]
[extern __kernel_end]
[extern _startup64]
%define KNL_HIGH_VMA 0xFFFFFFFF80000000
ALIGN_MULTIBOOT equ 1<<0
MEMINFO equ 1<<1
;VIDEO_MODE equ 0x00000004
FLAGS equ (ALIGN_MULTIBOOT | MEMINFO); | VIDEO_MODE)
MAGIC equ 0x1BADB002
CHECKSUM equ -(MAGIC + FLAGS)
;VIDMODE equ 0
;WIDTH equ 640
;HEIGHT equ 480
;DEPTH equ 32
section .multiboot
align 4
dd MAGIC
dd FLAGS
dd CHECKSUM
;dd 0
;dd 0
;dd 0
;dd 0
;dd 0
;dd VIDMODE
;dd WIDTH
;dd HEIGHT
;dd DEPTH
%macro gen_pd_2mb 3
%assign i %1
%rep %2
dq (i | 0x83)
%assign i i+0x200000
%endrep
%rep %3
dq 0
%endrep
%endmacro
section .data
gdt: ; Global Descriptor Table (64-bit).
.null: equ $ - gdt ; The null descriptor.
dw 0xFFFF ; Limit (low).
dw 0 ; Base (low).
db 0 ; Base (middle)
db 0 ; Access.
db 0 ; Granularity.
db 0 ; Base (high).
.code: equ $ - gdt ; The code descriptor.
dw 0 ; Limit (low).
dw 0 ; Base (low).
db 0 ; Base (middle)
db 10011010b ; Access (exec/read).
db 10101111b ; Granularity, 64 bits flag, limit19:16.
db 0 ; Base (high).
.data: equ $ - gdt ; The data descriptor.
dw 0 ; Limit (low).
dw 0 ; Base (low).
db 0 ; Base (middle)
db 10010010b ; Access (read/write).
db 00000000b ; Granularity.
db 0 ; Base (high).
.pointer: ; The GDT-pointer.
dw $ - gdt - 1 ; Limit.
dq gdt ; Base.
.pointer32: ; The GDT-pointer for 32 bit mode.
dw $ - gdt - 1 ; Limit.
dd gdt - KNL_HIGH_VMA ; Base.
section .bss
align 16
stack_bottom:
resb 4096
stack_top:
section .data
align 4096
paging_directory1:
gen_pd_2mb 0, 12, 500
paging_directory2:
gen_pd_2mb 0, 512, 0
paging_directory3:
gen_pd_2mb 0x0, 512, 0
paging_directory4:
gen_pd_2mb 0x40000000, 512, 0
pml4t:
dq (pdpt - KNL_HIGH_VMA + 0x3)
times 255 dq 0
dq (pdpt2 - KNL_HIGH_VMA + 0x3)
times 254 dq 0
dq (pdpt3 - KNL_HIGH_VMA + 0x3)
pdpt:
dq (paging_directory1 - KNL_HIGH_VMA + 0x3)
times 511 dq 0
pdpt2:
dq (paging_directory2 - KNL_HIGH_VMA + 0x3)
times 511 dq 0
pdpt3:
times 510 dq 0
dq (paging_directory3 - KNL_HIGH_VMA + 0x3)
dq (paging_directory4 - KNL_HIGH_VMA + 0x3)
section .text
[bits 32]
global _start
_start:
mov edi, ebx ; Multiboot header
mov eax, pml4t - KNL_HIGH_VMA
mov cr3, eax
; Paging
mov eax, cr4 ; Set the A-register to control register 4.
or eax, 1 << 5 ; Set the PAE-bit, which is the 6th bit (bit 5).
;or eax, 1 << 4 ; Set the PSE-bit, which is the 5th bit (bit 4).
mov cr4, eax ; Set control register 4 to the A-register.
; Switch to long mode
mov ecx, 0xC0000080 ; Set the C-register to 0xC0000080, which is the EFER MSR.
rdmsr ; Read from the model-specific register.
or eax, 1 << 8 ; Set the LM-bit which is the 9th bit (bit 8).
wrmsr ; Write to the model-specific register.
mov eax, cr0 ; Set the A-register to control register 0.
or eax, 1 << 31 ; Set the PG-bit, which is the 32nd bit (bit 31).
mov cr0, eax ; Set control register 0 to the A-register.
; Set up GDT
lgdt [gdt.pointer32 - KNL_HIGH_VMA]
jmp gdt.code:loaded - KNL_HIGH_VMA
[bits 64]
loaded:
lgdt [gdt.pointer] ; Load the 64-bit global descriptor table.
mov ax, gdt.data ; Set the A-register to the data descriptor.
mov ds, ax ; Set the data segment to the A-register.
mov es, ax ; Set the extra segment to the A-register.
mov fs, ax ; Set the F-segment to the A-register.
mov gs, ax ; Set the G-segment to the A-register.
mov ss, ax ; Set the stack segment to the A-register.
mov rsp, stack_top ; Set the stack up
; long jump
mov rax, _startup64
jmp rax | 30.969512 | 95 | 0.47529 |
69a3cfab7829a416bd2171d01138200ff49abe9b | 398 | asm | Assembly | oeis/147/A147536.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/147/A147536.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/147/A147536.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A147536: A counting vertex substitution vector matrix Markov 2x2 with characteristic polynomial:12 - 7 x + x=^2
; Submitted by Jamie Morken(s2)
; 5,16,52,172,580,1996,7012,25132,91780,340876,1284772,4902892,18902980,73486156,287567332,1131137452,4467154180,17696429836,70269158692,279526952812,1113458765380
mov $1,4
pow $1,$0
add $1,12
mov $2,3
pow $2,$0
mov $0,$1
mul $2,4
add $0,$2
sub $0,12
| 28.428571 | 163 | 0.756281 |
4974ebcc88dc506dcd1a1cdb0064bba105a897e7 | 647 | asm | Assembly | oeis/181/A181151.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/181/A181151.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/181/A181151.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A181151: a(n) = prime(n)^3 + prime(n)^2 + 1.
; Submitted by Jon Maiga
; 13,37,151,393,1453,2367,5203,7221,12697,25231,30753,52023,70603,81357,106033,151687,208861,230703,305253,362953,394347,499281,578677,712891,922083,1040503,1103337,1236493,1306911,1455667,2064513,2265253,2590123,2704941,3330151,3465753,3894543,4357317,4685353,5207647,5767381,5962503,7004353,7226307,7684183,7920201,9438453,11139297,11748613,12061431,12703627,13709041,14055603,15876253,17040643,18260617,19537471,19975953,21330663,22267003,22745277,25239607,29028693,30176953,30762267,31955503
seq $0,40 ; The prime numbers.
mov $1,$0
pow $0,2
add $1,1
mul $0,$1
add $0,1
| 58.818182 | 495 | 0.799073 |
13ac4ced96478e21ba2d6b660f9e9024c10c5ce5 | 8,133 | asm | Assembly | Transynther/x86/_processed/NONE/_zr_/i9-9900K_12_0xa0.log_21829_827.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_zr_/i9-9900K_12_0xa0.log_21829_827.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_zr_/i9-9900K_12_0xa0.log_21829_827.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r13
push %r8
push %rax
push %rbp
push %rbx
push %rcx
push %rdi
push %rsi
lea addresses_A_ht+0x523e, %rsi
lea addresses_D_ht+0x1847e, %rdi
add $55871, %r8
mov $24, %rcx
rep movsq
nop
cmp %r13, %r13
lea addresses_WT_ht+0x1767e, %rsi
lea addresses_UC_ht+0xfd3e, %rdi
nop
nop
and $55792, %rax
mov $52, %rcx
rep movsq
add $2447, %rdi
lea addresses_normal_ht+0x1a3e, %rdi
nop
xor $8946, %rax
mov (%rdi), %r13d
nop
cmp $58240, %rax
lea addresses_WT_ht+0x1dc8e, %rsi
lea addresses_D_ht+0xb83e, %rdi
nop
nop
nop
nop
dec %rbp
mov $84, %rcx
rep movsl
nop
nop
xor $10733, %rdi
lea addresses_D_ht+0x3c3, %rsi
lea addresses_WT_ht+0x1633e, %rdi
nop
nop
sub %rax, %rax
mov $32, %rcx
rep movsw
nop
nop
nop
add $32555, %r13
lea addresses_normal_ht+0x883e, %rsi
clflush (%rsi)
xor $11152, %rbp
mov (%rsi), %r8w
nop
nop
nop
nop
nop
dec %rax
lea addresses_WC_ht+0x666a, %rsi
lea addresses_UC_ht+0x3cf6, %rdi
nop
sub %rbx, %rbx
mov $106, %rcx
rep movsq
nop
nop
nop
nop
nop
xor $47134, %rax
lea addresses_D_ht+0x17246, %rsi
lea addresses_normal_ht+0x157de, %rdi
nop
cmp $6850, %rbx
mov $72, %rcx
rep movsb
nop
nop
nop
xor $31996, %r8
lea addresses_UC_ht+0x1eb10, %rsi
lea addresses_normal_ht+0x1aa5e, %rdi
nop
nop
nop
nop
nop
inc %rbx
mov $111, %rcx
rep movsb
nop
nop
nop
nop
nop
and %rbx, %rbx
lea addresses_WT_ht+0x1303e, %rsi
lea addresses_WT_ht+0xc3e, %rdi
nop
nop
nop
nop
xor %rbx, %rbx
mov $89, %rcx
rep movsw
nop
nop
nop
nop
cmp %r8, %r8
lea addresses_WT_ht+0x6fee, %rsi
lea addresses_UC_ht+0x19e96, %rdi
nop
nop
nop
and %r8, %r8
mov $4, %rcx
rep movsl
nop
nop
add %rsi, %rsi
lea addresses_A_ht+0x1543e, %r13
nop
nop
nop
nop
and $1634, %r8
mov (%r13), %rbx
nop
nop
and $44732, %rcx
lea addresses_normal_ht+0xc83e, %rbx
nop
nop
nop
nop
nop
cmp %rax, %rax
movl $0x61626364, (%rbx)
nop
nop
nop
nop
nop
cmp %rdi, %rdi
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %rbp
pop %rax
pop %r8
pop %r13
ret
.global s_faulty_load
s_faulty_load:
push %r12
push %r13
push %r14
push %r15
push %r8
push %r9
push %rcx
// Store
lea addresses_RW+0xe03e, %r14
nop
cmp %rcx, %rcx
movw $0x5152, (%r14)
nop
nop
nop
xor %r8, %r8
// Store
mov $0xd11e600000003a6, %r13
nop
nop
inc %r12
movl $0x51525354, (%r13)
nop
nop
nop
nop
nop
add $8667, %r13
// Store
lea addresses_A+0x3dc6, %r14
nop
cmp $59807, %r12
movb $0x51, (%r14)
nop
nop
nop
nop
add %rcx, %rcx
// Faulty Load
lea addresses_A+0x383e, %r13
nop
nop
nop
cmp %r12, %r12
mov (%r13), %r14
lea oracles, %r9
and $0xff, %r14
shlq $12, %r14
mov (%r9,%r14,1), %r14
pop %rcx
pop %r9
pop %r8
pop %r15
pop %r14
pop %r13
pop %r12
ret
/*
<gen_faulty_load>
[REF]
{'src': {'NT': False, 'same': False, 'congruent': 0, 'type': 'addresses_A', 'AVXalign': False, 'size': 16}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 11, 'type': 'addresses_RW', 'AVXalign': True, 'size': 2}}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 0, 'type': 'addresses_NC', 'AVXalign': False, 'size': 4}}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 3, 'type': 'addresses_A', 'AVXalign': False, 'size': 1}}
[Faulty Load]
{'src': {'NT': False, 'same': True, 'congruent': 0, 'type': 'addresses_A', 'AVXalign': False, 'size': 8}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'same': False, 'congruent': 9, 'type': 'addresses_A_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 6, 'type': 'addresses_D_ht'}}
{'src': {'same': True, 'congruent': 6, 'type': 'addresses_WT_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 8, 'type': 'addresses_UC_ht'}}
{'src': {'NT': False, 'same': False, 'congruent': 8, 'type': 'addresses_normal_ht', 'AVXalign': False, 'size': 4}, 'OP': 'LOAD'}
{'src': {'same': False, 'congruent': 2, 'type': 'addresses_WT_ht'}, 'OP': 'REPM', 'dst': {'same': True, 'congruent': 11, 'type': 'addresses_D_ht'}}
{'src': {'same': False, 'congruent': 0, 'type': 'addresses_D_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 7, 'type': 'addresses_WT_ht'}}
{'src': {'NT': False, 'same': False, 'congruent': 11, 'type': 'addresses_normal_ht', 'AVXalign': False, 'size': 2}, 'OP': 'LOAD'}
{'src': {'same': False, 'congruent': 2, 'type': 'addresses_WC_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 3, 'type': 'addresses_UC_ht'}}
{'src': {'same': False, 'congruent': 2, 'type': 'addresses_D_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 4, 'type': 'addresses_normal_ht'}}
{'src': {'same': False, 'congruent': 0, 'type': 'addresses_UC_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 4, 'type': 'addresses_normal_ht'}}
{'src': {'same': False, 'congruent': 9, 'type': 'addresses_WT_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 10, 'type': 'addresses_WT_ht'}}
{'src': {'same': False, 'congruent': 4, 'type': 'addresses_WT_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 3, 'type': 'addresses_UC_ht'}}
{'src': {'NT': False, 'same': False, 'congruent': 9, 'type': 'addresses_A_ht', 'AVXalign': False, 'size': 8}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'NT': True, 'same': True, 'congruent': 11, 'type': 'addresses_normal_ht', 'AVXalign': False, 'size': 4}}
{'00': 21829}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
| 32.27381 | 2,999 | 0.65806 |
969cb1a642cfce2e3c5d098f9a469c4cc453426e | 145 | asm | Assembly | other.7z/SFC.7z/SFC/ソースデータ/ヨッシーアイランド/日本_Ver1/union/ys_mram.asm | prismotizm/gigaleak | d082854866186a05fec4e2fdf1def0199e7f3098 | [
"MIT"
] | null | null | null | other.7z/SFC.7z/SFC/ソースデータ/ヨッシーアイランド/日本_Ver1/union/ys_mram.asm | prismotizm/gigaleak | d082854866186a05fec4e2fdf1def0199e7f3098 | [
"MIT"
] | null | null | null | other.7z/SFC.7z/SFC/ソースデータ/ヨッシーアイランド/日本_Ver1/union/ys_mram.asm | prismotizm/gigaleak | d082854866186a05fec4e2fdf1def0199e7f3098 | [
"MIT"
] | null | null | null | Name: ys_mram.asm
Type: file
Size: 75216
Last-Modified: '2016-05-13T04:51:17Z'
SHA-1: 186125CCE51366D7DB5A8155BFF9A556A6EBCD4B
Description: null
| 20.714286 | 47 | 0.813793 |
51c1d169eaf7e7ab9f743c09718ad81fb76eba62 | 505 | asm | Assembly | oeis/161/A161909.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/161/A161909.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/161/A161909.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A161909: Inverse binomial transform of A181586.
; Submitted by Jon Maiga
; 0,0,1,-3,7,-13,23,-41,79,-161,335,-689,1391,-2769,5487,-10897,21743,-43537,87279,-174865,349935,-699665,1398511,-2795793,5590767,-11182353,22367983,-44740881,89485039,-178966801,357920495,-715821329,1431629551,-2863272209,5726596847
lpb $0
sub $0,1
sub $1,$2
mul $1,6
add $3,1
sub $3,$4
mov $4,$2
add $2,$1
mov $1,$3
add $4,$3
mul $5,-2
add $5,1
add $5,$4
mov $3,$5
add $4,$2
lpe
mov $0,$2
div $0,6
| 21.956522 | 234 | 0.649505 |
edc56412821d590c6bf8c82a019310ac6b6594fb | 1,490 | asm | Assembly | src/unittests/unittest_grow.asm | lawrimon/SnakeV | 619a7e3697ef60950960ac0cce4b2f57f25d526f | [
"MIT"
] | 2 | 2021-12-08T18:10:44.000Z | 2022-03-11T09:24:51.000Z | src/unittests/unittest_grow.asm | lawrimon/SnakeV | 619a7e3697ef60950960ac0cce4b2f57f25d526f | [
"MIT"
] | null | null | null | src/unittests/unittest_grow.asm | lawrimon/SnakeV | 619a7e3697ef60950960ac0cce4b2f57f25d526f | [
"MIT"
] | 1 | 2021-11-03T17:10:56.000Z | 2021-11-03T17:10:56.000Z | .data
.include "../global_constants.asm"
.text
#initialization
la s4,snake #Vector of snake
li t0,3 #inital size of snake
sw t0,0(s4) #store size
li t0, 0x0014000F #first element of the snake
sw t0, 4(s4)
li t0, 0x0015000F #second element of the snake
sw t0, 8(s4)
li t0, 0x0016000F #third element of the snake
sw t0, 12(s4)
jal draw_snake
li s0, 0x00000061 # Value of a
li s1, 0x00000064 # Value of d
li s2, 0x00000073 # Value of s
li s3, 0x00000077 # Value of w
li a0,0x0017000F #dummy address of fruit
addi s9,a0,0 #load coordinate to s9
jal convert_coord
li a3, 0xFFFFFF
jal draw_point
jal turn_right
lw t0, 0(s4) #snake size
li t1, 4
bne t0,t1,error_test #snake size successfully increased to 4
li a0, 5 #if program finishes with code 5 the unittest was successfully
li a7,93
ecall
error_test:
li a0, 10 #if program finishes with code 10 the unittest was error
li a7,93
ecall
game_start:
field_init: # labels are needed for inclusion of ui_controller.asm, but won't affect the outcome of this unittest
.include "../draw_functions/draw_pixel.asm"
.include "../draw_functions/draw_point.asm"
.include "../draw_functions/draw_snake.asm"
.include "../game_logic/turn.asm"
.include "../game_logic/convert_coord.asm"
.include "../game_logic/grow_snake.asm"
.include "../game_logic/verification.asm"
.include "../game_logic/selfverification.asm"
.include "../game_logic/fruit.asm"
.include "../game_logic/keyboard.asm"
.include "../user_interface/ui_controller.asm"
| 21.911765 | 113 | 0.748322 |
4d066767ea432db6f1db35feee09e6af5457f648 | 2,208 | asm | Assembly | Switch case programming exercises and solutions in C/7- C program to find all roots of a quadratic equation using switch case/project.asm | MahmoudFawzy01/C-solutions-Code4win- | 491d86770895ec4c31a69c7e3d47a88dedc4427a | [
"Apache-2.0"
] | null | null | null | Switch case programming exercises and solutions in C/7- C program to find all roots of a quadratic equation using switch case/project.asm | MahmoudFawzy01/C-solutions-Code4win- | 491d86770895ec4c31a69c7e3d47a88dedc4427a | [
"Apache-2.0"
] | null | null | null | Switch case programming exercises and solutions in C/7- C program to find all roots of a quadratic equation using switch case/project.asm | MahmoudFawzy01/C-solutions-Code4win- | 491d86770895ec4c31a69c7e3d47a88dedc4427a | [
"Apache-2.0"
] | null | null | null | .file "project.c"
.def __main; .scl 2; .type 32; .endef
.section .rdata,"dr"
.LC1:
.ascii "WELCOME TO SIMPLE CALCULATOR\0"
.LC2:
.ascii "----------------------------\0"
.align 8
.LC3:
.ascii "Enter [number 1] [+ - * /] [number 2]\0"
.LC4:
.ascii "%f %c %f\0"
.LC5:
.ascii "Invalid operator\0"
.LC6:
.ascii "%.2f %c %.2f = %.2f\0"
.text
.globl main
.def main; .scl 2; .type 32; .endef
.seh_proc main
main:
pushq %rbp
.seh_pushreg %rbp
movq %rsp, %rbp
.seh_setframe %rbp, 0
subq $64, %rsp
.seh_stackalloc 64
.seh_endprologue
call __main
pxor %xmm0, %xmm0
movss %xmm0, -4(%rbp)
leaq .LC1(%rip), %rcx
call puts
leaq .LC2(%rip), %rcx
call puts
leaq .LC3(%rip), %rcx
call puts
leaq -16(%rbp), %rcx
leaq -5(%rbp), %rdx
leaq -12(%rbp), %rax
movq %rcx, %r9
movq %rdx, %r8
movq %rax, %rdx
leaq .LC4(%rip), %rcx
call scanf
movzbl -5(%rbp), %eax
movsbl %al, %eax
cmpl $43, %eax
je .L3
cmpl $43, %eax
jg .L4
cmpl $42, %eax
je .L5
jmp .L2
.L4:
cmpl $45, %eax
je .L6
cmpl $47, %eax
je .L7
jmp .L2
.L3:
movss -12(%rbp), %xmm1
movss -16(%rbp), %xmm0
addss %xmm1, %xmm0
movss %xmm0, -4(%rbp)
jmp .L8
.L6:
movss -12(%rbp), %xmm0
movss -16(%rbp), %xmm1
subss %xmm1, %xmm0
movss %xmm0, -4(%rbp)
jmp .L8
.L5:
movss -12(%rbp), %xmm1
movss -16(%rbp), %xmm0
mulss %xmm1, %xmm0
movss %xmm0, -4(%rbp)
jmp .L8
.L7:
movss -12(%rbp), %xmm0
movss -16(%rbp), %xmm1
divss %xmm1, %xmm0
movss %xmm0, -4(%rbp)
jmp .L8
.L2:
leaq .LC5(%rip), %rcx
call printf
.L8:
cvtss2sd -4(%rbp), %xmm0
movss -16(%rbp), %xmm1
cvtss2sd %xmm1, %xmm2
movzbl -5(%rbp), %eax
movsbl %al, %edx
movss -12(%rbp), %xmm1
cvtss2sd %xmm1, %xmm1
movq %xmm2, %rax
movq %rax, %rcx
movq %rcx, %r8
movq %rax, %xmm2
movq %xmm1, %rax
movq %rax, %rcx
movsd %xmm0, 32(%rsp)
movq %r8, %xmm3
movq %xmm2, %r9
movl %edx, %r8d
movq %rcx, %xmm1
movq %rax, %rdx
leaq .LC6(%rip), %rcx
call printf
call getch
movl $0, %eax
addq $64, %rsp
popq %rbp
ret
.seh_endproc
.ident "GCC: (x86_64-posix-seh-rev1, Built by MinGW-W64 project) 6.2.0"
.def puts; .scl 2; .type 32; .endef
.def scanf; .scl 2; .type 32; .endef
.def printf; .scl 2; .type 32; .endef
.def getch; .scl 2; .type 32; .endef
| 18.247934 | 72 | 0.594656 |
05322e98af7f264f6623476809152d7e8ad83000 | 5,270 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0x84_notsx.log_21829_556.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0x84_notsx.log_21829_556.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0x84_notsx.log_21829_556.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r14
push %rcx
push %rdi
push %rsi
lea addresses_A_ht+0x24c4, %rsi
lea addresses_A_ht+0x1298e, %rdi
nop
nop
nop
nop
cmp %r14, %r14
mov $110, %rcx
rep movsl
nop
nop
nop
cmp %rcx, %rcx
pop %rsi
pop %rdi
pop %rcx
pop %r14
ret
.global s_faulty_load
s_faulty_load:
push %r14
push %r15
push %r9
push %rax
push %rcx
push %rdi
push %rdx
// Store
lea addresses_A+0x6c04, %rdx
nop
cmp $49201, %rdi
movw $0x5152, (%rdx)
nop
nop
nop
xor %rcx, %rcx
// Load
mov $0x374, %rax
nop
nop
nop
nop
xor %rdi, %rdi
mov (%rax), %r9d
nop
nop
nop
nop
nop
cmp $24298, %r14
// Store
lea addresses_US+0xdac4, %rdi
nop
nop
nop
nop
sub $50505, %r9
mov $0x5152535455565758, %rcx
movq %rcx, (%rdi)
cmp %r14, %r14
// Store
lea addresses_US+0x4e24, %rdx
nop
nop
nop
dec %r15
movw $0x5152, (%rdx)
nop
cmp %rdx, %rdx
// Store
lea addresses_PSE+0x1bf70, %r15
xor %r9, %r9
movl $0x51525354, (%r15)
nop
nop
nop
nop
xor %rdi, %rdi
// Faulty Load
lea addresses_WT+0xe4c4, %r14
clflush (%r14)
nop
nop
xor %r15, %r15
mov (%r14), %rdx
lea oracles, %r15
and $0xff, %rdx
shlq $12, %rdx
mov (%r15,%rdx,1), %rdx
pop %rdx
pop %rdi
pop %rcx
pop %rax
pop %r9
pop %r15
pop %r14
ret
/*
<gen_faulty_load>
[REF]
{'src': {'type': 'addresses_WT', 'same': False, 'size': 16, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'dst': {'type': 'addresses_A', 'same': False, 'size': 2, 'congruent': 6, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'src': {'type': 'addresses_P', 'same': False, 'size': 4, 'congruent': 3, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'dst': {'type': 'addresses_US', 'same': False, 'size': 8, 'congruent': 8, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_US', 'same': False, 'size': 2, 'congruent': 5, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_PSE', 'same': False, 'size': 4, 'congruent': 1, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
[Faulty Load]
{'src': {'type': 'addresses_WT', 'same': True, 'size': 8, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'type': 'addresses_A_ht', 'congruent': 10, 'same': False}, 'dst': {'type': 'addresses_A_ht', 'congruent': 1, 'same': True}, 'OP': 'REPM'}
{'39': 21829}
39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39
*/
| 41.171875 | 2,999 | 0.6537 |
5e261e59de281d9ed048afc93ef5bfb0c3427ecd | 775 | asm | Assembly | oeis/157/A157674.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/157/A157674.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/157/A157674.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A157674: G.f.: A(x) = 1 + x/exp( Sum_{k>=1} (A((-1)^k*x) - 1)^k/k ).
; Submitted by Christian Krause
; 1,1,1,-1,-3,1,9,1,-27,-13,81,67,-243,-285,729,1119,-2187,-4215,6561,15505,-19683,-56239,59049,202309,-177147,-724499,531441,2589521,-1594323,-9254363,4782969,33111969,-14348907,-118725597,43046721,426892131,-129140163,-1539965973,387420489,5575175319,-1162261467,-20260052337,3486784401,73908397851,-10460353203,-270657727593,31381059609,994938310059,-94143178827,-3670934157477,282429536481,13592610767079,-847288609443,-50501725104141,2541865828329,188239881456727,-7625597484987,-703786746202189
mov $1,1
mov $3,$0
sub $3,1
mov $4,1
lpb $3
mul $1,2
sub $3,1
mul $1,$3
sub $4,2
add $5,$4
div $1,$5
add $2,$1
sub $3,1
add $4,2
lpe
mov $0,$2
add $0,1
| 35.227273 | 500 | 0.709677 |
01394fcc2e7566dc8a8f46e72e7cd7da379304e0 | 5,604 | asm | Assembly | Library/Text/TextStorage/tsEnum.asm | steakknife/pcgeos | 95edd7fad36df400aba9bab1d56e154fc126044a | [
"Apache-2.0"
] | 504 | 2018-11-18T03:35:53.000Z | 2022-03-29T01:02:51.000Z | Library/Text/TextStorage/tsEnum.asm | steakknife/pcgeos | 95edd7fad36df400aba9bab1d56e154fc126044a | [
"Apache-2.0"
] | 96 | 2018-11-19T21:06:50.000Z | 2022-03-06T10:26:48.000Z | Library/Text/TextStorage/tsEnum.asm | steakknife/pcgeos | 95edd7fad36df400aba9bab1d56e154fc126044a | [
"Apache-2.0"
] | 73 | 2018-11-19T20:46:53.000Z | 2022-03-29T00:59:26.000Z | COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
Copyright (c) GeoWorks 1991 -- All Rights Reserved
PROJECT: PC GEOS
MODULE:
FILE: tsEnum.asm
AUTHOR: Tony Requist, 5/8/92
ROUTINES:
Name Description
---- -----------
EnumTextReference Enumerate a text reference
REVISION HISTORY:
Name Date Description
---- ---- -----------
John 11/20/91 Initial revision
DESCRIPTION:
Code for accessing and manipulating text references.
$Id: tsEnum.asm,v 1.1 97/04/07 11:22:17 newdeal Exp $
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
TextFilter segment resource
COMMENT @----------------------------------------------------------------------
FUNCTION: EnumDSSI_CX
DESCRIPTION: Enumerate characters at ds:si
CALLED BY: INTERNAL
PASS:
ds:si - characters to enumerate
cx - count
di - callback
dxbp - object
RETURN:
carry - set to end
DESTROYED:
si - updated
REGISTER/STACK USAGE:
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/CAVEATS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
Tony 5/ 8/92 Initial version
Chris 10/12/92 Changed to save any changes in cl.
Don't hurt me!
------------------------------------------------------------------------------@
EnumDSSI_CX proc near uses ax, cx, bp, ds, es
.enter
segmov es, ds
xchg si, bp ;es:bp = data
mov ds, dx ;ds:si = object
mov_tr ax, cx ;ax = count
enumLoop:
SBCS < clr cx >
SBCS < mov cl, es:[bp] >
DBCS < mov cx, es:[bp] >
inc bp
DBCS < inc bp >
jcxz doneGood ;a hack for the null-terminator
call di
SBCS < mov es:[bp-1], cl ;save new version in cl, in >
DBCS < mov es:[bp-2], cx ;save new version in cl, in >
; case changed (cbh 10/12/92)
jc done
dec ax
jnz enumLoop
doneGood:
clc
done:
mov si, bp
.leave
ret
EnumDSSI_CX endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
EnumTextFromPointer
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Copy text from a pointer into a buffer.
CALLED BY: EnumTextReference
PASS: es:di = Destination for text
cx = # of bytes to copy
ss:bp = TextReferencePointer
cs:di = callback
RETURN: carry = set if callback aborted
DESTROYED: nothing
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
jcw 11/20/91 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
EnumTextFromPointer proc near
pushdw dssi
movdw dssi, ss:[bp].VTRP_textReference.TR_ref.TRU_pointer.TRP_pointer
mov cx, ss:[bp].VTRP_insCount.low
popdw dxbp
call EnumDSSI_CX
movdw dssi, dxbp
ret
EnumTextFromPointer endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
EnumTextFromHugeArray
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Copy text from a huge-array into a buffer.
CALLED BY: EnumTextReference
ss:bp = TextReferenceHugeArray
dxax = Number of bytes to enum
cs:di = callback for filter
RETURN: carry = set if callback aborted
DESTROYED: ax, bx, cx, dx, bp, es
PSEUDO CODE/STRATEGY:
Lock first element of huge-array
copyLoop:
Copy as many bytes as we can (up to cx)
If we aren't done yet
Release the huge-array and lock the next block of data
jmp copy loop
KNOWN BUGS/SIDE EFFECTS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
jcw 11/20/91 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
EnumTextFromHugeArray proc near
pushdw dssi
push di ; Save callback
mov bx, ss:[bp].VTRP_textReference.TR_ref.TRU_hugeArray.TRHA_file
mov di, ss:[bp].VTRP_textReference.TR_ref.TRU_hugeArray.TRHA_array
clrdw dxax
call HugeArrayLock ; ds:si <- data to copy
pop di ; Restore callback
popdw dxbp ; dxbp = object
enumLoop:
mov_tr cx, ax ; cx <- # of valid bytes
;
; Override file = huge array file
; ds:si = data
; di = callback
; cx = Number of bytes available
;
call EnumDSSI_CX
jc done
LocalPrevChar dssi
push dx
call HugeArrayNext
pop dx
tst_clc ax
jnz enumLoop
done:
pushf
call HugeArrayUnlock
popf
movdw dssi, dxbp ; restore object
ret
EnumTextFromHugeArray endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
TS_EnumTextReference
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Copy bytes referenced by a text-reference into a buffer.
CALLED BY: EXTERNAL
PASS: di = callback
ss:bp = VisTextReplaaceParams
RETURN: carry - from enum routine
DESTROYED: bx, bp
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
jcw 11/20/91 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
TS_EnumTextReference proc near uses ax, bx, cx, dx, di, bp, es
.enter
tstdw ss:[bp].VTRP_insCount
clc
jz common
mov ax, ss:[bp].VTRP_textReference.TR_type
cmp ax, TRT_POINTER
jnz notPointer
call EnumTextFromPointer
jmp common
notPointer:
EC < cmp ax, TRT_HUGE_ARRAY >
EC < ERROR_NZ VIS_TEXT_BAD_TEXT_REFERENCE_TYPE >
call EnumTextFromHugeArray
common:
.leave
ret
TS_EnumTextReference endp
TextFilter ends
| 22.873469 | 80 | 0.55389 |
25479b3d4392c9663ecb15dcf208502172b6cb55 | 752 | asm | Assembly | oeis/203/A203150.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/203/A203150.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/203/A203150.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A203150: (n-1)-st elementary symmetric function of the first n terms of (1,2,1,2,1,2,1,2,1,2,...)=A000034.
; Submitted by Jamie Morken(s4)
; 1,3,5,12,16,36,44,96,112,240,272,576,640,1344,1472,3072,3328,6912,7424,15360,16384,33792,35840,73728,77824,159744,167936,344064,360448,737280,770048,1572864,1638400,3342336,3473408,7077888,7340032,14942208,15466496,31457280,32505856,66060288,68157440,138412032,142606336,289406976,297795584,603979776,620756992,1258291200,1291845632,2617245696,2684354560,5435817984,5570035712,11274289152,11542724608,23353884672,23890755584,48318382080,49392123904,99857989632,102005473280,206158430208,210453397504
add $0,1
mov $1,1
lpb $0
sub $0,1
cmp $2,1
add $2,1
mul $3,$2
add $3,$1
mul $1,$2
lpe
mov $0,$3
| 47 | 501 | 0.776596 |
b134c92cb5c4c9244b4b5d28f578eab08fc94b91 | 5,603 | asm | Assembly | I2C_Master_Code_Dev/I2C_DemoBoard/src/key_matrix_4x4.asm | CmdrZin/chips_avr_examples | d4b57a8efd6aff2a678adef4fd405e6359e891e6 | [
"MIT"
] | 5 | 2017-04-17T15:11:40.000Z | 2021-12-13T23:52:09.000Z | I2C_Master_Code_Dev/I2C_DemoBoard/src/key_matrix_4x4.asm | CmdrZin/chips_avr_examples | d4b57a8efd6aff2a678adef4fd405e6359e891e6 | [
"MIT"
] | null | null | null | I2C_Master_Code_Dev/I2C_DemoBoard/src/key_matrix_4x4.asm | CmdrZin/chips_avr_examples | d4b57a8efd6aff2a678adef4fd405e6359e891e6 | [
"MIT"
] | null | null | null | /*
* Keypad Matrix 4x4
*
* org: 6/24/2014
* auth: Nels "Chip" Pearson
*
* Target: I2C Demo Board w/ display and keypad I/O, 20MHz
*
* Usage:
* .include key_matrix_4x4.asm
*
* Resources
* kms_buff: ; Key Matrix Scan last valid data buffer
* ; d3:0 = data..d7: 0=old..1=new
* kms_state: ; scan state. 0:idle 1:debounce
* kms_db_cnt: ; debounce wait counter
* IO
* GPIOR0.GPIOR01 key scan tic1ms flag
*
*/
.equ COL0 = PORTD0
.equ COL1 = PORTD1
.equ COL2 = PORTD2
.equ COL3 = PORTD3
.equ ROW0 = PORTD4
.equ ROW1 = PORTD5
.equ ROW2 = PORTD6
.equ ROW3 = PORTD7
.equ COL_MASK = (1<<COL3 | 1<<COL2 | 1<<COL1 | 1<<COL0) ; 00001111
.equ KMS_DB_WAIT = 0x0A ; scan wait 10 ms
.DSEG
kms_buff: .BYTE 1 ; Key Matrix Scan last valid data buffer
; d3:0 = data..d7: 0=old..1=new
kms_state: .BYTE 1 ; scan state. 0:idle 1:debounce
kms_db_cnt: .BYTE 1 ; debounce wait counter
.CSEG
/* Initialize Key Pad Service
* input reg: none
* output reg: none
*/
key_pad_init:
call key_pad_init_io
;
clr R16
sts kms_buff, R16
sts kms_state, R16
sts kms_db_cnt, R16
;
ret
/*
* Initialize IO for Key Pad
* input reg: none
* output reg: none
*
* Set Port D control reg for PD3-PD0 as inputs
*
* NOTE: PORTC shared with key pad scan. ALWAYS call this for each scan.
*/
key_pad_init_io:
// Configure 4 inputs and 4 outputs
ldi R16, (1<<ROW3 | 1<<ROW2 | 1<<ROW1 | 1<<ROW0) ; out:1, in:0
out DDRD, R16 ; set 7-4 ouput (1), 3-0 input (0) w/pullup
// Set 0-3 as input w/pullup...4-7 as HIGH
ser R16
out PORTD, R16
;
ret
/*
* Service Key Pad
* input reg: none
* output reg: R17 - Data
* R18 - Data valid. 0:new..1:old data
* Process
* This code is called in a fast loop (<1ms) and is self timed.
* State
* 0: Scan for any key press -> Update data, New=1, state=1
* 1: Key down. Wait for ALL Key up -> Set db_count, state=2
* 2: Key up. Wait for debounce delay -> state=0. IF any key down -> state=1
*/
key_pad_service:
// Only service every 10 ms
sbis GPIOR0, KPAD_1MS_TIC
rjmp kps_skip01 ; return OLD data
; service time delay. dec count
cbi GPIOR0, KPAD_1MS_TIC ; clear tic1ms flag. interrupt sets it.
;
lds R16, kms_db_cnt
dec R16
sts kms_db_cnt, R16
breq kps_skip02 ; run service
rjmp kps_skip01 ; return OLD data
;
kps_skip02:
ldi R17, KMS_DB_WAIT ; reset delay count
sts kms_db_cnt, R17
// Run servcice
; switch(state)
lds R16, kms_state
tst R16
breq kps_skip00 ; case 0?
dec R16
breq kps_skip10 ; case 1?
dec R16
breq kps_skip20 ; case 2?
; default
clr R16
sts kms_state, R16 ; reset..was invalid
rjmp kps_skip01 ; return OLD data
; case: 0
kps_skip00:
call key_pad_scan
tst R18
brne kps_skip01
// store the valid data
sts kms_buff, R17
ldi R16, $1 ; set state=1
sts kms_state, R16
ret ; EXIT..R18 already = 0
; case: 1
kps_skip10:
call key_pad_scan
tst R18
breq kps_skip01 ; key still pressed. Return OLD data.
; key Up
ldi R16, $2 ; set state=2
sts kms_state, R16
rjmp kps_skip01 ; return OLD data
; case: 2
// key up for entire delay time or go back to state=1
kps_skip20:
call key_pad_scan
tst R18
breq kps_skip01 ; still down. return OLD data
; debounce completed. Return to state=0
clr R16
sts kms_state, R16
; ; return OLD data
kps_skip01:
// return old data
lds R17, kms_buff
ldi R18, 1 ; OLD data
ret ; EXIT
/*
* Scan Key Pad
* input reg: none
* output reg: R17 - Data
* R18 - Data valid. 0:valid..1:no data
*
* subcnt = 0
* step through rows
* if !(COL & COL_MASK) != 0 then
* val_cnt = R18 << 2 base from row
* COL>>1 test LSB in Carry Bit
* if COL != 0
* ++sub_cnt
* loop back to shift
* else found bit
* row<<2 + sub_cnt = key number.
* NOTE: Could also decrement to speed up end test.
*/
key_pad_scan:
call key_pad_init_io
ldi R17, (1<<ROW0) ; select row
clr R18 ; row counter = 0
clr R19 ; sub_cnt = 0
kps000:
// scan row
com R17 ; generate scan pattern. 0 on row to scan.
out PORTD, R17 ; set ROWn low
com R17 ; restore
in R16, PIND ; read columns
com R16 ; complement..only 1 bit shoud be set if only 1 key pressed
andi R16, COL_MASK ; mask out col bits
// test for key press
tst R16
brne kps001 ; found a key..skip to process it
// try next row
lsl R17
inc R18 ; ++row_cnt
sbrs R18, $2 ; at 4?
rjmp kps000 ; loop back
ldi R18, $1 ; no data
ret ; EXIT
;
kps001:
// key pressed
lsr R16 ; COL>>1
tst R16
breq kps002 ; skip if 0..create key value
inc R19 ; ++sub_cnt
rjmp kps001 ; try next bit
;
// key decode
kps002:
lsl R18 ; x2
lsl R18 ; x4
add R18, R19 ; row<<2 + sub_cnt
mov R17, R18 ; save data
clr R18 ; data valid
ret
/*
* Translate Key Code to Key Cap
* input reg: R17 - Key Code
* output reg: R17 - Key Cap Value
* resources: TEMP, R21
*
* Use offset read lookup table element
*/
key_pad_trans:
andi R17, $0F ; mask off valid data..could test
ldi ZH, high(key_pad_table<<1) ; Initialize Z pointer
ldi ZL, low(key_pad_table<<1)
add ZL, R17 ; add offset
clr R16
adc ZH, R16 ; propigate carry bit
lpm R17, Z ; Load pattern
; memory pointed to by Z (r31:r30)
ret
key_pad_table:
.db 0x0D, 0x0E ; 0, 1 -> D, #(E)
.db 0x00, 0x0F ; 2, 3 -> 0, *(F)
.db 0x0C, 0x09 ; 4, 5 -> C, 9
.db 0x08, 0x07 ; 6, 7 -> 8, 7
.db 0x0B, 0x06 ; 8, 9 -> B, 6
.db 0x05, 0x04 ; A, B -> 5, 4
.db 0x0A, 0x03 ; C, D -> A, 3
.db 0x02, 0x01 ; E, F -> 2, 1
| 23.443515 | 76 | 0.629127 |
9c3cbcd9a2d799963d63ab01cae2cb32f17dec9b | 262 | asm | Assembly | programs/oeis/070/A070593.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/070/A070593.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/070/A070593.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A070593: a(n) = n^5 mod 7.
; 0,1,4,5,2,3,6,0,1,4,5,2,3,6,0,1,4,5,2,3,6,0,1,4,5,2,3,6,0,1,4,5,2,3,6,0,1,4,5,2,3,6,0,1,4,5,2,3,6,0,1,4,5,2,3,6,0,1,4,5,2,3,6,0,1,4,5,2,3,6,0,1,4,5,2,3,6,0,1,4,5,2,3,6,0,1,4,5,2,3,6,0,1,4,5,2,3,6,0,1,4
mov $1,$0
pow $1,5
mod $1,7
| 37.428571 | 203 | 0.5 |
e4169bd716c488d4fd99e33e860eb5f3209fe1ec | 465 | asm | Assembly | data/pokemon/base_stats/sinnoh/mime_jr.asm | Dev727/ancientplatinum | 8b212a1728cc32a95743e1538b9eaa0827d013a7 | [
"blessing"
] | null | null | null | data/pokemon/base_stats/sinnoh/mime_jr.asm | Dev727/ancientplatinum | 8b212a1728cc32a95743e1538b9eaa0827d013a7 | [
"blessing"
] | null | null | null | data/pokemon/base_stats/sinnoh/mime_jr.asm | Dev727/ancientplatinum | 8b212a1728cc32a95743e1538b9eaa0827d013a7 | [
"blessing"
] | null | null | null | db 0 ; 439 DEX NO
db 20, 25, 45, 60, 70, 90
; hp atk def spd sat sdf
db PSYCHIC, PSYCHIC ; type
db 145 ; catch rate
db 78 ; base exp
db NO_ITEM, NO_ITEM ; items
db GENDER_F50 ; gender ratio
db 100 ; unknown 1
db 25 ; step cycles to hatch
db 5 ; unknown 2
INCBIN "gfx/pokemon/sinnoh/mime_jr/front.dimensions"
db 0, 0, 0, 0 ; padding
db GROWTH_MEDIUM_FAST ; growth rate
dn EGG_NONE, EGG_NONE ; egg groups
; tm/hm learnset
tmhm
; end
| 21.136364 | 53 | 0.664516 |
b3ee190e0783b43a3fcb116a62f603f01e40f54b | 437 | asm | Assembly | reuse/weeks.asm | William0Friend/my_masm | e8073266c03c01424ad84b9ed9cf13e9da1eabb1 | [
"Apache-2.0"
] | null | null | null | reuse/weeks.asm | William0Friend/my_masm | e8073266c03c01424ad84b9ed9cf13e9da1eabb1 | [
"Apache-2.0"
] | null | null | null | reuse/weeks.asm | William0Friend/my_masm | e8073266c03c01424ad84b9ed9cf13e9da1eabb1 | [
"Apache-2.0"
] | null | null | null | ; intExp.asm - calculates the expression A=(A+B)-(C+D)
.386
.model flat, stdcall
.stack 4096
ExitProcess PROTO, dwExitCode:dword
;include Irvine32.inc
.data
Sunday = 1
Monday = 2
Tuesday = 3
Wednesday = 4
Thursday = 5
Friday = 6
Saturday = 7
.code
daysArray BYTE Sunday,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday
main PROC
;Dont do shit
invoke ExitProcess,0
main ENDP
END main | 15.068966 | 76 | 0.670481 |
61d14640dfe65555b0dac3406b62e233c7b55f0e | 503 | asm | Assembly | oeis/129/A129514.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/129/A129514.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/129/A129514.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A129514: a(n) = gcd(Sum_{k|n} k, Sum_{1<k<n, k does not divide n} k) = gcd(sigma(n), n(n+1)/2 - sigma(n)) = gcd(sigma(n), n(n+1)/2), where sigma(n) = A000203(n).
; 1,3,2,1,3,3,4,3,1,1,6,2,7,3,24,1,9,3,10,42,1,1,12,60,1,3,2,14,15,3,16,3,3,1,6,1,19,3,4,10,21,3,22,6,3,1,24,4,1,3,6,2,27,15,4,12,1,1,30,6,31,3,8,1,3,3,34,6,3,1,36,3,37,3,2,14,3,3,40,6
add $0,1
mov $2,$0
lpb $0
add $1,$0
mov $3,$2
dif $3,$0
cmp $3,$2
cmp $3,0
mul $3,$0
sub $0,1
add $4,$3
lpe
add $4,1
gcd $1,$4
mov $0,$1
| 26.473684 | 184 | 0.532803 |
027332e6e45d16f167f6f844efc875c8e0000a2e | 447 | asm | Assembly | oeis/249/A249863.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/249/A249863.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/249/A249863.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A249863: Chebyshev S polynomial (A049310) evaluated at x = 26/7 and multiplied by powers of 7 (A000420).
; Submitted by Jon Maiga
; 1,26,627,15028,360005,8623758,206577463,4948449896,118537401609,2839498396930,68018625641339,1629348845225244,39030157319430733,934945996889162102,22396118210466108735,536486719624549884112
mov $2,$0
mov $3,1
lpb $2
mov $0,$3
mul $0,24
sub $2,1
add $3,$4
add $3,1
add $3,$0
sub $4,$0
lpe
mov $0,$3
| 26.294118 | 191 | 0.740492 |
88c0974618f69e97cbc6e773f05a6f2358956027 | 1,208 | asm | Assembly | source/lib/win2kcompat.asm | krisseyy/Karl | 36600809a348bd3a09d59e335d2897ed16f11ac7 | [
"BSD-3-Clause"
] | 5,460 | 2015-01-01T04:23:00.000Z | 2022-03-31T21:55:33.000Z | source/lib/win2kcompat.asm | krisseyy/Karl | 36600809a348bd3a09d59e335d2897ed16f11ac7 | [
"BSD-3-Clause"
] | 153 | 2015-01-19T21:23:51.000Z | 2021-10-17T03:04:25.000Z | source/lib/win2kcompat.asm | krisseyy/Karl | 36600809a348bd3a09d59e335d2897ed16f11ac7 | [
"BSD-3-Clause"
] | 826 | 2015-01-06T14:27:09.000Z | 2022-03-30T04:03:08.000Z | ; Copyright 2010 Steve Gray aka 'Lexikos'
; Permission is granted to use and/or redistribute this code without restriction.
;
; Visual C++ 2010 ordinarily creates a dependency on EncodePointer and DecodePointer,
; which means XP SP2 or later is required to run the executable. Assembling this file
; and linking the result into the application prevents this dependency at the expense
; of any added security those two functions might've provided.
;
; Note that there are two alternative approaches:
;
; 1) Compile a lib containing the two functions and link that ahead of kernel32.lib.
; This requires the use of the /FORCE:MULTIPLE linker option, which is not ideal.
;
; 2) Compile a dll containing the two functions and use that. This doesn't seem to
; have the same 'multiply defined symbols' problem as #1, but means that the exe
; won't run on *any* OS without a copy of the dll.
;
.model flat
.code
; Override dll import symbols:
__imp__EncodePointer@4 DWORD XxcodePointer
__imp__DecodePointer@4 DWORD XxcodePointer
public __imp__EncodePointer@4
public __imp__DecodePointer@4
; Equivalent: PVOID EncodePointer(PVOID Ptr) { return Ptr; }
XxcodePointer:
mov eax, [esp+4]
ret 4
end | 37.75 | 86 | 0.76904 |
4f00e51dde4f64aca8b5c5da2a0eabed89d8cfb6 | 296 | asm | Assembly | programs/oeis/076/A076040.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/076/A076040.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/076/A076040.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A076040: a(n) = (-1)^n * (3^n - 1)/2.
; 0,-1,4,-13,40,-121,364,-1093,3280,-9841,29524,-88573,265720,-797161,2391484,-7174453,21523360,-64570081,193710244,-581130733,1743392200,-5230176601,15690529804,-47071589413,141214768240,-423644304721,1270932914164
mov $1,-3
pow $1,$0
div $1,2
mov $0,$1
| 37 | 215 | 0.706081 |
ebb5050bfe5e698d885684e1b483038a5fa10f11 | 472 | asm | Assembly | oeis/268/A268228.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/268/A268228.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/268/A268228.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A268228: a(n) = sum of digits of (2n + 1)^2.
; Submitted by Jamie Morken(s2)
; 1,9,7,13,9,4,16,9,19,10,9,16,13,18,13,16,18,10,19,9,16,22,9,13,7,9,19,10,18,16,13,27,13,25,18,10,19,18,25,13,18,31,16,27,19,19,27,16,22,18,4,16,9,19,19,9,25,13,27,13,16,18,19,19,18,16,31,18,31,16,27,19,10,18,7,13,18,13,25,18,19,28,18,34,22,18,31,16,18,10,19,27,16,31,18,22,25,18,28,19
add $0,1
bin $0,2
mul $0,8
mov $1,1
lpb $0
mov $2,$0
div $0,10
mod $2,10
add $1,$2
lpe
mov $0,$1
| 29.5 | 286 | 0.612288 |
ca7dcae9e17268d9d2da5f5e0ce123005ebf7917 | 183 | asm | Assembly | data/pokemon/dex_entries/lotad.asm | AtmaBuster/pokeplat-gen2 | fa83b2e75575949b8f72cb2c48f7a1042e97f70f | [
"blessing"
] | 6 | 2021-06-19T06:41:19.000Z | 2022-02-15T17:12:33.000Z | data/pokemon/dex_entries/lotad.asm | AtmaBuster/pokeplat-gen2-old | 01e42c55db5408d72d89133dc84a46c699d849ad | [
"blessing"
] | null | null | null | data/pokemon/dex_entries/lotad.asm | AtmaBuster/pokeplat-gen2-old | 01e42c55db5408d72d89133dc84a46c699d849ad | [
"blessing"
] | 3 | 2021-01-15T18:45:40.000Z | 2021-10-16T03:35:27.000Z | db "WATER WEED@" ; species name
db "Its leaf grew too"
next "large for it to"
next "live on land. This"
page "is why it chose to"
next "live by floating"
next "on water.@"
| 18.3 | 32 | 0.650273 |
09e642807bf3c8ef9c07d39ac5df1996e03f9a36 | 544 | asm | Assembly | sub16bit.asm | sirdangd/asm | 98a935b3217d7d0af4bf5b883bce71e5a7a2a3bc | [
"MIT"
] | null | null | null | sub16bit.asm | sirdangd/asm | 98a935b3217d7d0af4bf5b883bce71e5a7a2a3bc | [
"MIT"
] | null | null | null | sub16bit.asm | sirdangd/asm | 98a935b3217d7d0af4bf5b883bce71e5a7a2a3bc | [
"MIT"
] | null | null | null |
;sub16bit
;the first number is stored in reg bc
;the second number is stored in reg de
;the 8 bits from reg c are subtracted by the 8 bits in reg e
;the 8 bits from reg b are subtracted by the 8 bits in reg d
;sbb is used for the second subtraction isntead of sub because what is being subtracted is reg d and also whatever is in the borrow flag
jmp start
;data
;code
start: nop
lxi b, 1010h
lxi d, 0101h
mov a, c
sub e
mov l, a
mov a, b
sbb d
jm overflow
mov h, a
jmp end
overflow: lxi h, 0deadh
;mvi h, 0deh
;mvi l, 0adh
end: hlt | 14.702703 | 136 | 0.722426 |
10feedc755d2102b746c60d4619a6a9c73d053da | 511 | asm | Assembly | oeis/131/A131686.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/131/A131686.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/131/A131686.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A131686: Sum of squares of five consecutive primes.
; Submitted by Christian Krause
; 208,373,653,989,1469,2189,2981,4061,5381,6701,8069,9917,12029,14069,16709,19541,22061,24821,27989,31421,35789,40661,45029,49589,53549,56909,62837,69389,76709,84149,93581,100253,107741,115541,124109,131837
mov $2,$0
add $2,1
mov $4,5
lpb $4
mov $0,$2
sub $4,1
add $0,$4
trn $0,1
seq $0,138692 ; Numbers of the form 86+p^2 (where p is a prime).
gcd $3,5
mul $3,$0
add $5,$3
lpe
mov $0,$5
div $0,5
sub $0,430
| 24.333333 | 206 | 0.694716 |
544b6d7e0f5de6eb70a93a911fcb4dfce85adaae | 7,169 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0xca_notsx.log_21829_1223.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0xca_notsx.log_21829_1223.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0xca_notsx.log_21829_1223.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r14
push %r15
push %rax
push %rbx
push %rcx
push %rdi
push %rsi
lea addresses_UC_ht+0x18911, %rsi
lea addresses_normal_ht+0x175b7, %rdi
nop
nop
mfence
mov $95, %rcx
rep movsw
nop
nop
nop
nop
nop
dec %rbx
lea addresses_normal_ht+0xd627, %rsi
lea addresses_WC_ht+0x5e22, %rdi
nop
nop
nop
add $19302, %rax
mov $121, %rcx
rep movsb
nop
nop
nop
sub $64715, %r11
lea addresses_normal_ht+0x18e27, %rsi
lea addresses_D_ht+0xa35b, %rdi
nop
nop
nop
nop
xor %r15, %r15
mov $80, %rcx
rep movsw
nop
nop
xor %r15, %r15
lea addresses_UC_ht+0x61c3, %r15
nop
nop
add %r11, %r11
movl $0x61626364, (%r15)
nop
nop
nop
nop
nop
xor %rdi, %rdi
lea addresses_A_ht+0x16a37, %rdi
nop
nop
nop
nop
nop
cmp %rsi, %rsi
mov $0x6162636465666768, %r15
movq %r15, %xmm3
movups %xmm3, (%rdi)
nop
add $32756, %r15
lea addresses_UC_ht+0x114b7, %rax
nop
nop
nop
nop
xor $62999, %rbx
mov $0x6162636465666768, %rdi
movq %rdi, (%rax)
cmp $10988, %rbx
lea addresses_D_ht+0x72b7, %rdi
nop
nop
nop
nop
nop
inc %rcx
movl $0x61626364, (%rdi)
dec %rbx
lea addresses_UC_ht+0xcf47, %rsi
nop
nop
nop
dec %rax
and $0xffffffffffffffc0, %rsi
vmovaps (%rsi), %ymm2
vextracti128 $0, %ymm2, %xmm2
vpextrq $1, %xmm2, %rdi
nop
nop
nop
nop
xor %rcx, %rcx
lea addresses_UC_ht+0xbac9, %rcx
nop
nop
nop
nop
sub $61554, %rax
mov (%rcx), %r11d
nop
nop
add $53823, %rax
lea addresses_A_ht+0x1b0b7, %r15
nop
nop
and $50071, %rcx
movb $0x61, (%r15)
nop
nop
nop
nop
nop
sub $40952, %rcx
lea addresses_D_ht+0xbcb7, %rsi
lea addresses_D_ht+0x16e2f, %rdi
nop
nop
nop
nop
xor %r14, %r14
mov $72, %rcx
rep movsw
nop
nop
nop
sub %r11, %r11
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %rax
pop %r15
pop %r14
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r14
push %r15
push %r8
push %rax
push %rbp
push %rbx
// Store
lea addresses_normal+0x106db, %r14
nop
cmp %rbp, %rbp
mov $0x5152535455565758, %r10
movq %r10, %xmm6
vmovups %ymm6, (%r14)
and %r10, %r10
// Faulty Load
lea addresses_WT+0x20b7, %r10
nop
xor $54801, %r15
vmovups (%r10), %ymm2
vextracti128 $1, %ymm2, %xmm2
vpextrq $1, %xmm2, %rbp
lea oracles, %r10
and $0xff, %rbp
shlq $12, %rbp
mov (%r10,%rbp,1), %rbp
pop %rbx
pop %rbp
pop %rax
pop %r8
pop %r15
pop %r14
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'src': {'same': False, 'congruent': 0, 'NT': False, 'type': 'addresses_WT', 'size': 4, 'AVXalign': False}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 2, 'NT': False, 'type': 'addresses_normal', 'size': 32, 'AVXalign': False}}
[Faulty Load]
{'src': {'same': True, 'congruent': 0, 'NT': False, 'type': 'addresses_WT', 'size': 32, 'AVXalign': False}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'type': 'addresses_UC_ht', 'congruent': 0, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_normal_ht', 'congruent': 8, 'same': False}}
{'src': {'type': 'addresses_normal_ht', 'congruent': 2, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_WC_ht', 'congruent': 0, 'same': False}}
{'src': {'type': 'addresses_normal_ht', 'congruent': 2, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_D_ht', 'congruent': 0, 'same': True}}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 2, 'NT': False, 'type': 'addresses_UC_ht', 'size': 4, 'AVXalign': False}}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 3, 'NT': False, 'type': 'addresses_A_ht', 'size': 16, 'AVXalign': False}}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 9, 'NT': False, 'type': 'addresses_UC_ht', 'size': 8, 'AVXalign': False}}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 9, 'NT': True, 'type': 'addresses_D_ht', 'size': 4, 'AVXalign': False}}
{'src': {'same': False, 'congruent': 0, 'NT': False, 'type': 'addresses_UC_ht', 'size': 32, 'AVXalign': True}, 'OP': 'LOAD'}
{'src': {'same': False, 'congruent': 0, 'NT': False, 'type': 'addresses_UC_ht', 'size': 4, 'AVXalign': True}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'same': True, 'congruent': 8, 'NT': False, 'type': 'addresses_A_ht', 'size': 1, 'AVXalign': False}}
{'src': {'type': 'addresses_D_ht', 'congruent': 8, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_D_ht', 'congruent': 3, 'same': False}}
{'39': 21829}
39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39
*/
| 34.466346 | 2,999 | 0.66132 |
a5a1eb9d894c6c2ce79c35252ced2278a322917e | 944 | asm | Assembly | oeis/223/A223299.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/223/A223299.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/223/A223299.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A223299: 4 X 4 X 4 triangular graph coloring a rectangular array: number of n X 2 0..9 arrays where 0..9 label nodes of a graph with edges 0,1 0,2 1,2 1,3 1,4 2,4 3,4 2,5 4,5 3,6 3,7 4,7 6,7 4,8 5,8 7,8 5,9 8,9 and every array movement to a horizontal or vertical neighbor moves along an edge of this graph.
; Submitted by Jamie Morken(s2)
; 36,324,3132,30564,298620,2918052,28515132,278649828,2722966524,26608833828,260021573820,2540931306084,24829985481084,242638664618916,2371065485035068,23170056359958756,226417834139125500,2212555499210875428,21621096481650123708,211281395307620855652,2064642190604027927676,20175687352952856936612,197156854595233091170620,1926617152312129719637476,18826906420290629821964796,183976564795451371405963044,1797819335706477527602015932,17568293915225836346750618724,171677401039006469483032614780
mov $1,1
mov $2,1
lpb $0
sub $0,1
mul $2,4
add $1,$2
add $2,$1
mul $1,3
lpe
mov $0,$2
mul $0,36
| 59 | 494 | 0.806144 |
e00e7fdf1dffbafc828e48f02529705423eb1564 | 4,149 | asm | Assembly | Transynther/x86/_processed/US/_zr_/i9-9900K_12_0xca_notsx.log_10_1771.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/US/_zr_/i9-9900K_12_0xca_notsx.log_10_1771.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/US/_zr_/i9-9900K_12_0xca_notsx.log_10_1771.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r12
push %r13
push %r14
push %r8
push %rbx
push %rcx
push %rdi
push %rsi
lea addresses_A_ht+0x11bfe, %rbx
nop
nop
nop
nop
add $54691, %rdi
movups (%rbx), %xmm7
vpextrq $1, %xmm7, %r8
nop
nop
nop
nop
cmp $54376, %r12
lea addresses_normal_ht+0x1b5ae, %r13
nop
nop
nop
nop
xor $751, %rdi
mov (%r13), %ecx
nop
nop
nop
nop
add $15078, %r8
lea addresses_WC_ht+0x87ae, %rbx
nop
nop
nop
nop
xor $27495, %rcx
movb (%rbx), %r8b
nop
nop
nop
sub $10189, %rcx
lea addresses_D_ht+0xfbae, %rsi
lea addresses_normal_ht+0x11d0c, %rdi
and %r14, %r14
mov $8, %rcx
rep movsl
nop
cmp %r12, %r12
lea addresses_WT_ht+0x1174e, %rsi
lea addresses_WT_ht+0x131ee, %rdi
clflush (%rdi)
and $29868, %r12
mov $75, %rcx
rep movsw
nop
nop
add %r8, %r8
lea addresses_A_ht+0x86ae, %r13
nop
nop
nop
and %rbx, %rbx
movl $0x61626364, (%r13)
nop
nop
nop
cmp $33356, %r12
lea addresses_WT_ht+0x45be, %r13
nop
nop
nop
nop
cmp %rcx, %rcx
mov (%r13), %r12w
nop
nop
sub $64263, %rsi
lea addresses_A_ht+0xbc37, %rcx
nop
nop
and $64763, %rdi
movl $0x61626364, (%rcx)
nop
nop
nop
nop
nop
and $45535, %r8
lea addresses_UC_ht+0x27ae, %rcx
nop
nop
and %rdi, %rdi
movw $0x6162, (%rcx)
xor %r13, %r13
lea addresses_UC_ht+0x416e, %rdi
nop
nop
cmp $49043, %r8
mov $0x6162636465666768, %r14
movq %r14, %xmm6
and $0xffffffffffffffc0, %rdi
vmovaps %ymm6, (%rdi)
dec %r8
lea addresses_UC_ht+0x11130, %r8
nop
nop
dec %rsi
movb $0x61, (%r8)
nop
nop
nop
nop
nop
add $9126, %r8
lea addresses_WC_ht+0x4bae, %r12
nop
nop
nop
nop
nop
inc %r13
movl $0x61626364, (%r12)
nop
nop
nop
nop
nop
lfence
lea addresses_UC_ht+0xa4ea, %r8
nop
nop
xor $30482, %rdi
movl $0x61626364, (%r8)
nop
nop
nop
cmp $24302, %rsi
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %r8
pop %r14
pop %r13
pop %r12
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r12
push %r14
push %r9
push %rbx
push %rsi
// Faulty Load
lea addresses_US+0x1ebae, %r14
nop
nop
nop
nop
nop
xor $43263, %rbx
movups (%r14), %xmm3
vpextrq $0, %xmm3, %r9
lea oracles, %rbx
and $0xff, %r9
shlq $12, %r9
mov (%rbx,%r9,1), %r9
pop %rsi
pop %rbx
pop %r9
pop %r14
pop %r12
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_US', 'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 0}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'same': True, 'type': 'addresses_US', 'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 0}}
<gen_prepare_buffer>
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_A_ht', 'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 1}}
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_normal_ht', 'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 8}}
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_WC_ht', 'NT': False, 'AVXalign': True, 'size': 1, 'congruent': 10}}
{'OP': 'REPM', 'src': {'same': False, 'congruent': 8, 'type': 'addresses_D_ht'}, 'dst': {'same': False, 'congruent': 1, 'type': 'addresses_normal_ht'}}
{'OP': 'REPM', 'src': {'same': False, 'congruent': 5, 'type': 'addresses_WT_ht'}, 'dst': {'same': False, 'congruent': 6, 'type': 'addresses_WT_ht'}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_A_ht', 'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 2}}
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_WT_ht', 'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 2}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_A_ht', 'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 0}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_UC_ht', 'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 10}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_UC_ht', 'NT': True, 'AVXalign': True, 'size': 32, 'congruent': 6}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_UC_ht', 'NT': False, 'AVXalign': True, 'size': 1, 'congruent': 1}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_WC_ht', 'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 11}}
{'OP': 'STOR', 'dst': {'same': True, 'type': 'addresses_UC_ht', 'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 1}}
{'00': 10}
00 00 00 00 00 00 00 00 00 00
*/
| 20.043478 | 151 | 0.649072 |
616932a7ffc1eabcd6b4ec41bbc2de2062e4385f | 146 | asm | Assembly | other.7z/NEWS.7z/NEWS/テープリストア/NEWS_05/NEWS_05.tar/home/kimura/kart/risc.lzh/risc/join/c-select.asm | prismotizm/gigaleak | d082854866186a05fec4e2fdf1def0199e7f3098 | [
"MIT"
] | null | null | null | other.7z/NEWS.7z/NEWS/テープリストア/NEWS_05/NEWS_05.tar/home/kimura/kart/risc.lzh/risc/join/c-select.asm | prismotizm/gigaleak | d082854866186a05fec4e2fdf1def0199e7f3098 | [
"MIT"
] | null | null | null | other.7z/NEWS.7z/NEWS/テープリストア/NEWS_05/NEWS_05.tar/home/kimura/kart/risc.lzh/risc/join/c-select.asm | prismotizm/gigaleak | d082854866186a05fec4e2fdf1def0199e7f3098 | [
"MIT"
] | null | null | null | Name: c-select.asm
Type: file
Size: 32785
Last-Modified: '1992-06-30T09:01:37Z'
SHA-1: 8FC2D4B4270678E2DE7A7C9D0850E9679A999F8D
Description: null
| 20.857143 | 47 | 0.808219 |
1100d177c4f508963ed517e323938d806d660794 | 396 | asm | Assembly | oeis/199/A199922.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/199/A199922.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/199/A199922.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A199922: Table read by rows, T(0,0) = 1 and for n>0, 0<=k<=3^(n-1) T(n,k) = gcd(k,3^(n-1)).
; Submitted by Jamie Morken(s2)
; 1,1,1,3,1,1,3,9,1,1,3,1,1,3,1,1,9,27,1,1,3,1,1,3,1,1,9,1,1,3,1,1,3,1,1,9,1,1,3,1,1,3,1,1,27,81,1,1,3,1,1,3,1,1,9,1,1,3,1,1,3,1,1,9,1,1,3,1,1,3,1,1,27,1,1,3,1,1,3,1,1,9,1,1,3,1
sub $0,1
mul $0,2
mov $1,2
lpb $0
sub $0,2
sub $0,$1
mul $1,3
lpe
gcd $0,$1
div $0,2
| 26.4 | 177 | 0.530303 |
345cbadb617fe65e4250bcb42c3dd084b080fbf4 | 608 | asm | Assembly | oeis/129/A129952.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/129/A129952.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/129/A129952.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A129952: Binomial transform of A124625.
; 1,1,2,6,16,40,96,224,512,1152,2560,5632,12288,26624,57344,122880,262144,557056,1179648,2490368,5242880,11010048,23068672,48234496,100663296,209715200,436207616,905969664,1879048192,3892314112,8053063680,16642998272,34359738368,70866960384,146028888064,300647710720,618475290624,1271310319616,2611340115968,5360119185408,10995116277760,22539988369408,46179488366592,94557999988736,193514046488576,395824185999360,809240558043136,1653665488175104,3377699720527872,6896136929411072,14073748835532800
mov $1,2
pow $1,$0
mul $1,$0
sub $1,7
div $1,4
add $1,2
mov $0,$1
| 55.272727 | 498 | 0.845395 |
32af04b62f6944417dfa943988e0f6ed8f4671ee | 3,459 | asm | Assembly | programs/oeis/108/A108647.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/108/A108647.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | programs/oeis/108/A108647.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | ; A108647: a(n) = (n+1)^2*(n+2)^2*(n+3)^2*(n+4)/144.
; 1,20,150,700,2450,7056,17640,39600,81675,157300,286286,496860,828100,1332800,2080800,3162816,4694805,6822900,9728950,13636700,18818646,25603600,34385000,45630000,59889375,77808276,100137870,127747900,161640200,202963200,253027456,313322240,385533225,471561300,573542550,693869436,835213210,1000547600,1193173800,1416746800,1675303091,1973289780,2315595150,2707580700,3155114700,3664607296,4243047200,4898040000,5637848125,6471432500,7408495926,8459528220,9635853150,10949677200,12414140200,14043367856,15852526215,17857878100,20076841550,22528050300,25231416336,28208194560,31481049600,35074124800,39013113425,43325332116,48039796630,53187299900,58800492450,64913965200,71564334696,78790330800,86632886875,95135232500,104342988750,114304266076,125069764820,136692878400,149229799200,162739627200,177284481381,192929613940,209743527350,227798094300,247168680550,267934270736,290177597160,313985271600,339447920175,366660321300,395721546766,426735105980,459809093400,495056339200,532594563200,572546532096,615040220025,660208972500,708191673750,759132917500,813183181226,870499003920,931243167400,995584881200,1063699971075,1135771071156,1211987819790,1292547059100,1377653038300,1467517620800,1562360495136,1662409389760,1767900291725,1879077669300,1996194698550,2119513493916,2249305342830,2385850944400,2529440652200,2680374721200,2838963558871,3005527980500,3180399468750,3363920437500,3556444500000,3758336741376,3969973995520,4191745126400,4424051313825,4667306343700,4921936902806,5188382878140,5467097660850,5758548454800,6063216589800,6381597839536,6714202744235,7061556938100,7424201481550,7802693198300,8197605017316,8609526319680,9039063290400,9486839275200,9953495142325,10439689649396,10946099815350,11473421297500,12022368773750,12593676330000,13188097852776,13806407427120,14449399739775,15117890487700,15812716791950,16534737616956,17284834195240,18063910457600,18872893468800,19712733868800,20584406319561,21488909957460,22427268851350,23400532466300,24409776133050,25456101523216,26540637130280,27664538756400,28828990005075,30035202779700,31284417788046,32577905052700,33916964427500,35302926120000,36737151220000,38221032234176,39755993626845,41343492366900,42985018480950,44682095612700,46436281588606,48249168989840,50122385730600,52057595642800,54056499067175,56120833450836,58252373951310,60452934047100,62724366154800,65068562252800,67487454511616,69983015930880,72557260983025,75212246263700,77950071148950,80772878459196,83682855130050,86682232890000,89773288945000,92958346670000,96239776307451,99619995672820,103101470867150,106686716996700,110378298899700,114178831880256,118090982449440,122117469073600,126261062929925,130524588669300,134910925186486,139423006397660,144063822025350,148836418390800,153743899213800,158789426420016,163976220955855,169307563610900,174786795847950,180417320640700,186202603319096,192146172422400,198251620560000,204522605280000,210962849945625,217576144619476,224366346955670,231337383099900,238493248597450,245838009309200,253375802335656,261110836949040,269047395533475,277189834533300,285542585409550,294110155604636,302897129515260,311908169473600,321148016736800,330621492484800,340333498826541,350289019814580,360493122468150,370950957804700,381667761879950,392648856836496,403899651961000,415425644750000,427232421984375,439325660812500
add $0,4
mov $1,$0
sub $0,1
bin $0,3
pow $0,2
mul $1,$0
mul $1,108
sub $1,432
div $1,432
add $1,1
| 247.071429 | 3,306 | 0.906042 |
54606c3c1d31b5180c7af971592e7361245b8e42 | 1,302 | asm | Assembly | programs/oeis/309/A309231.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/309/A309231.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/309/A309231.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A309231: Column 3 of the array at A326662 see Comments.
; 7,17,25,34,43,53,61,71,79,89,97,106,115,125,133,142,151,161,169,178,187,197,205,215,223,233,241,250,259,269,277,287,295,305,313,322,331,341,349,359,367,377,385,394,403,413,421,430,439,449,457,466,475,485,493,503,511,521,529,538,547,557,565,574,583,593,601,610,619,629,637,647,655,665,673,682,691,701,709,718,727,737,745,754,763,773,781,791,799,809,817,826,835,845,853,863,871,881,889,898,907,917,925,935,943,953,961,970,979,989,997,1006,1015,1025,1033,1042,1051,1061,1069,1079,1087,1097,1105,1114,1123,1133,1141,1151,1159,1169,1177,1186,1195,1205,1213,1223,1231,1241,1249,1258,1267,1277,1285,1294,1303,1313,1321,1330,1339,1349,1357,1367,1375,1385,1393,1402,1411,1421,1429,1439,1447,1457,1465,1474,1483,1493,1501,1511,1519,1529,1537,1546,1555,1565,1573,1582,1591,1601,1609,1618,1627,1637,1645,1655,1663,1673,1681,1690,1699,1709,1717,1726,1735,1745,1753,1762,1771,1781,1789,1799,1807,1817,1825,1834,1843,1853,1861,1870,1879,1889,1897,1906,1915,1925,1933,1943,1951,1961,1969,1978,1987,1997,2005,2015,2023,2033,2041,2050,2059,2069,2077,2087,2095,2105,2113,2122,2131,2141,2149,2158,2167,2177,2185,2194,2203,2213,2221,2231,2239,2249
mov $2,$0
add $2,1
mov $4,$0
mul $0,2
pow $0,7
gcd $0,$2
mov $1,$0
mod $1,3
add $1,6
mov $3,$4
mul $3,9
add $1,$3
| 81.375 | 1,128 | 0.753456 |
6a186d5414653c691f2950bb9cbc580ff9a49b7a | 4,803 | asm | Assembly | src/controls.asm | clach04/Chopper-Command-C64 | 176ee6cfc628692077420b029b28647f840f8b68 | [
"MIT"
] | 36 | 2019-08-23T20:18:40.000Z | 2021-11-07T16:44:26.000Z | src/controls.asm | clach04/Chopper-Command-C64 | 176ee6cfc628692077420b029b28647f840f8b68 | [
"MIT"
] | 1 | 2019-08-26T20:57:18.000Z | 2019-08-28T12:14:08.000Z | src/controls.asm | clach04/Chopper-Command-C64 | 176ee6cfc628692077420b029b28647f840f8b68 | [
"MIT"
] | 7 | 2019-08-23T23:42:17.000Z | 2020-01-22T04:57:55.000Z |
//we don't use 2 complement math in this game, but rather the num + sign format.
//it wastes one byte for each variable and it's slower for adc and sbc, but it's much faster when it comes to translating results to screen coordinates
//We need few macros and functions to handle this weird format though
//
//adds an immediate 8 bit value to a 16 bit signed number
.macro s16u8adcIMM(sign,num1,num2)
{
lda sign
beq simpleadd
//it's negative, so we have to do a subtraction.
sec
lda num1
sbc #num2
sta num1
bcs ok // still negative, exit
lda num1+1 //we should now decrement num1+1
beq reset // check if zero first (decrementing would wrap arouund)
dec num1+1
bcc ok // this branch is always taken, because we are here because the carry is clear
reset:
sec
lda #$00
sbc num1
sta num1
lda #$00
sta sign
sec
bcs ok
simpleadd: // num1 is positive, just add
clc
lda num1
adc #num2
sta num1
bcc ok
inc num1+1
ok:
}
//subtracts an immediate 8 bit value from a 16 bit signed integer
.macro s16u8sbcIMM(sign,num1,num2)
{
lda sign
bne simpleadd // if it's negative, doing a sub is like leaving the sign unaltered and doing add
//it's positive, so we have to do a simple sbc
sec
lda num1
sbc #num2
sta num1
bcs ok // still negative, exit
lda num1+1 //we should now decrement num1+1
beq reset // check if zero first (decrementing would wrap arouund)
dec num1+1
bcc ok // this branch is always taken, because we are here because the carry is clear
reset:
sec
lda #$00
sbc num1
sta num1
lda #$01
sta sign
//dec sign
sec
bcs ok
simpleadd: // num1 is negative, just add
clc
lda num1
adc #num2
sta num1
bcc ok
inc num1+1
ok:
}
controls:
{
lda $dc00
jsr readjoy
lda #$00
rol
sta fire
//first check y
cpy #0
beq !horizontal+
cpy #$ff
beq !goesup+
//goes down
ldy ypos
cpy #MAXY
bcs !horizontal+
iny
sty ypos
jmp !horizontal+
!goesup:
ldy ypos
cpy #MINY
beq !horizontal+
dey
sty ypos
!horizontal:
cpx #1
beq !right+
cpx #0
bne !left+
jmp !decelerate+
!left:
lda #1
cmp facing
beq !skp+
sta facing
lda #4
sta flipclock
!skp:
:s16u8sbcIMM(speed_sign,speed,ACCELERATION)
jmp !clamp+
!right:
lda #0
cmp facing
beq !skp+
sta facing
lda #4
sta flipclock
!skp:
:s16u8adcIMM(speed_sign,speed,ACCELERATION)
!clamp:
lda speed + 1
cmp #MAXSPEED
bcc !updatex+
lda #MAXSPEED
sta speed + 1
lda #0
sta speed
jmp !updatex+
!decelerate:
lda speed
ora speed + 1
bne !moves+
jmp !button+ //no need to update
!moves:
sec
lda speed
sbc #DECELERATION
sta speed
lda speed + 1
sbc #0
sta speed + 1
bcs !ok+
lda #0
sta speed
sta speed + 1
!ok:
jmp !updatex+
!updatex:
lda speed_sign
bne !left+
clc
lda xpos
adc speed
sta xpos
lda xpos + 1
adc speed + 1
sta xpos + 1
lda xpos + 2
adc #0
sta xpos + 2
//we must wrap around at #$0c00 to $200
cmp #$0a
bcc !ok+
!fix:
//sec
lda xpos + 1
sbc #$00
sta xpos + 1
lda xpos + 2
sbc #$0a
sta xpos + 2
sec
lda camera_x + 1
sbc #$00
sta camera_x + 1
lda camera_x + 2
sbc #$0a
sta camera_x + 2
!ok:
jmp !button+
!left:
sec
lda xpos
sbc speed
sta xpos
lda xpos + 1
sbc speed + 1
sta xpos + 1
lda xpos + 2
sbc #0
sta xpos + 2
bcs !ok+
//we must wrap around at #$0000 -> $0a00
lda xpos + 1
adc #$00
sta xpos + 1
lda xpos + 2
adc #$0a
sta xpos + 2
clc
lda camera_x + 1
adc #$00
sta camera_x + 1
lda camera_x + 2
adc #$0a
sta camera_x + 2
!ok:
jmp !button+
!button:
lda fire
bne !next+
jsr beam.fire
!next:
rts
fire:
.byte 0
}
readjoy:
{
djrrb: ldy #0
ldx #0
lsr
bcs djr0
dey
djr0: lsr
bcs djr1
iny
djr1: lsr
bcs djr2
dex
djr2: lsr
bcs djr3
inx
djr3: lsr
rts
} | 16.911972 | 152 | 0.513846 |
533193967ca71481b1c2537a6fd448e60ff68139 | 327 | asm | Assembly | programs/oeis/087/A087799.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/087/A087799.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/087/A087799.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A087799: a(n) = 10*a(n-1) - a(n-2), starting with a(0) = 2 and a(1) = 10.
; 2,10,98,970,9602,95050,940898,9313930,92198402,912670090,9034502498,89432354890,885289046402,8763458109130,86749292044898,858729462339850,8500545331353602
mov $1,2
lpb $0,1
sub $0,1
add $1,$2
add $2,$1
add $1,$2
add $2,$1
add $1,$2
lpe
| 25.153846 | 156 | 0.672783 |
119e314ee39e8121256eba32862a6d9552effcda | 262 | asm | Assembly | BigNum/Mod/Base/bnCmpAbs.asm | FloydZ/Crypto-Hash | 2635450fb16d4d8dc4578d6539cc25ce599f7e21 | [
"MIT"
] | 11 | 2015-03-17T10:31:23.000Z | 2022-01-21T17:42:43.000Z | BigNum/Mod/Base/bnCmpAbs.asm | 0xFF1E071F/Crypto-Hash | 2635450fb16d4d8dc4578d6539cc25ce599f7e21 | [
"MIT"
] | null | null | null | BigNum/Mod/Base/bnCmpAbs.asm | 0xFF1E071F/Crypto-Hash | 2635450fb16d4d8dc4578d6539cc25ce599f7e21 | [
"MIT"
] | 6 | 2018-01-29T16:06:36.000Z | 2021-05-08T19:22:24.000Z | .686
.model flat,stdcall
option casemap:none
include .\bnlib.inc
include .\bignum.inc
.code
bnCmpAbs proc uses edi esi bnX:DWORD,bnY:DWORD
; 0 if |X|=|Y| 1 if |X|>|Y| -1 if |X|<|Y|
mov edi,bnX
mov esi,bnY
call _bn_cmp_array
ret
bnCmpAbs endp
end | 15.411765 | 51 | 0.675573 |
b80c7ccb3801d4c037739feb15e186592afabe11 | 310 | asm | Assembly | programs/oeis/021/A021745.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/021/A021745.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/021/A021745.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A021745: Decimal expansion of 1/741.
; 0,0,1,3,4,9,5,2,7,6,6,5,3,1,7,1,3,9,0,0,1,3,4,9,5,2,7,6,6,5,3,1,7,1,3,9,0,0,1,3,4,9,5,2,7,6,6,5,3,1,7,1,3,9,0,0,1,3,4,9,5,2,7,6,6,5,3,1,7,1,3,9,0,0,1,3,4,9,5,2,7,6,6,5,3,1,7,1,3,9,0,0,1,3,4,9,5,2,7
add $0,1
mov $1,10
pow $1,$0
mul $1,2
div $1,1482
mod $1,10
mov $0,$1
| 28.181818 | 199 | 0.541935 |
3cc61dd7c3d19e0ac9887d9649f38dc2f5560443 | 8,848 | asm | Assembly | Transynther/x86/_processed/AVXALIGN/_st_4k_/i3-7100_9_0x84_notsx.log_21829_486.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/AVXALIGN/_st_4k_/i3-7100_9_0x84_notsx.log_21829_486.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/AVXALIGN/_st_4k_/i3-7100_9_0x84_notsx.log_21829_486.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r12
push %r15
push %r9
push %rbx
push %rcx
push %rdi
push %rsi
lea addresses_normal_ht+0x16b54, %rsi
lea addresses_WT_ht+0x120d4, %rdi
sub $11642, %r9
mov $70, %rcx
rep movsw
nop
nop
nop
add $38408, %r12
lea addresses_WC_ht+0x4bd4, %rsi
lea addresses_UC_ht+0x3bd4, %rdi
nop
nop
nop
nop
nop
add %rbx, %rbx
mov $112, %rcx
rep movsw
nop
add $59969, %r12
lea addresses_A_ht+0x1e2d4, %rsi
lea addresses_WC_ht+0xd1ec, %rdi
nop
nop
nop
nop
nop
cmp %r11, %r11
mov $122, %rcx
rep movsq
nop
nop
xor $25483, %rcx
lea addresses_WT_ht+0x14e59, %rsi
lea addresses_UC_ht+0x6d47, %rdi
sub $59203, %r15
mov $35, %rcx
rep movsw
nop
nop
nop
nop
add %rbx, %rbx
lea addresses_D_ht+0x43d4, %r15
and %rdi, %rdi
movw $0x6162, (%r15)
nop
nop
nop
nop
nop
and %r15, %r15
lea addresses_UC_ht+0x3d4, %r9
nop
nop
sub %r12, %r12
mov $0x6162636465666768, %r15
movq %r15, %xmm1
movups %xmm1, (%r9)
nop
nop
nop
nop
nop
xor $55169, %r12
lea addresses_UC_ht+0xf58c, %r12
inc %r15
movw $0x6162, (%r12)
nop
nop
nop
nop
nop
cmp %rsi, %rsi
lea addresses_normal_ht+0x1b054, %rsi
lea addresses_WT_ht+0x93d4, %rdi
nop
nop
nop
nop
nop
dec %r15
mov $96, %rcx
rep movsl
xor $46920, %r12
lea addresses_WC_ht+0x10d34, %rcx
nop
nop
dec %r9
mov $0x6162636465666768, %rdi
movq %rdi, %xmm5
vmovups %ymm5, (%rcx)
nop
nop
nop
and %rbx, %rbx
lea addresses_WC_ht+0x1db54, %r12
nop
nop
nop
nop
nop
inc %r15
mov $0x6162636465666768, %rbx
movq %rbx, (%r12)
nop
sub $62175, %rbx
lea addresses_UC_ht+0x3eb4, %rbx
clflush (%rbx)
nop
inc %r15
mov (%rbx), %ecx
nop
nop
cmp $57734, %rdi
lea addresses_WC_ht+0xd1d4, %rbx
nop
nop
nop
cmp $52089, %r11
movl $0x61626364, (%rbx)
nop
nop
nop
nop
nop
add %rbx, %rbx
lea addresses_UC_ht+0x83d4, %rsi
lea addresses_WC_ht+0x5c14, %rdi
clflush (%rsi)
clflush (%rdi)
nop
nop
nop
nop
sub %r12, %r12
mov $25, %rcx
rep movsb
nop
nop
nop
nop
nop
sub %rbx, %rbx
lea addresses_normal_ht+0x1cad4, %rcx
sub %rsi, %rsi
movw $0x6162, (%rcx)
mfence
lea addresses_UC_ht+0x18900, %rsi
clflush (%rsi)
nop
nop
xor %r9, %r9
movups (%rsi), %xmm4
vpextrq $1, %xmm4, %rbx
inc %rcx
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %r9
pop %r15
pop %r12
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r12
push %r13
push %r15
push %r9
push %rbp
push %rbx
// Load
mov $0xbd4, %rbx
nop
nop
nop
inc %r11
movb (%rbx), %r9b
nop
nop
nop
nop
nop
cmp $35728, %r15
// Store
lea addresses_WC+0x1b674, %r15
dec %rbp
mov $0x5152535455565758, %r13
movq %r13, (%r15)
nop
nop
add $61141, %rbp
// Store
lea addresses_WT+0x142d4, %r9
nop
sub %r13, %r13
mov $0x5152535455565758, %r15
movq %r15, %xmm3
movups %xmm3, (%r9)
nop
nop
nop
nop
cmp %r13, %r13
// Store
lea addresses_UC+0x183d4, %rbp
nop
nop
nop
nop
cmp %r13, %r13
movb $0x51, (%rbp)
nop
nop
add $10073, %r15
// Faulty Load
lea addresses_A+0x53d4, %r12
nop
nop
nop
sub $9697, %rbp
mov (%r12), %bx
lea oracles, %r9
and $0xff, %rbx
shlq $12, %rbx
mov (%r9,%rbx,1), %rbx
pop %rbx
pop %rbp
pop %r9
pop %r15
pop %r13
pop %r12
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'src': {'type': 'addresses_A', 'same': False, 'size': 32, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_P', 'same': False, 'size': 1, 'congruent': 11, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'dst': {'type': 'addresses_WC', 'same': False, 'size': 8, 'congruent': 5, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_WT', 'same': False, 'size': 16, 'congruent': 8, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_UC', 'same': False, 'size': 1, 'congruent': 11, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
[Faulty Load]
{'src': {'type': 'addresses_A', 'same': True, 'size': 2, 'congruent': 0, 'NT': True, 'AVXalign': True}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'type': 'addresses_normal_ht', 'congruent': 0, 'same': False}, 'dst': {'type': 'addresses_WT_ht', 'congruent': 8, 'same': False}, 'OP': 'REPM'}
{'src': {'type': 'addresses_WC_ht', 'congruent': 11, 'same': True}, 'dst': {'type': 'addresses_UC_ht', 'congruent': 11, 'same': False}, 'OP': 'REPM'}
{'src': {'type': 'addresses_A_ht', 'congruent': 6, 'same': False}, 'dst': {'type': 'addresses_WC_ht', 'congruent': 1, 'same': False}, 'OP': 'REPM'}
{'src': {'type': 'addresses_WT_ht', 'congruent': 0, 'same': False}, 'dst': {'type': 'addresses_UC_ht', 'congruent': 0, 'same': False}, 'OP': 'REPM'}
{'dst': {'type': 'addresses_D_ht', 'same': False, 'size': 2, 'congruent': 10, 'NT': True, 'AVXalign': False}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_UC_ht', 'same': False, 'size': 16, 'congruent': 11, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_UC_ht', 'same': True, 'size': 2, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'src': {'type': 'addresses_normal_ht', 'congruent': 7, 'same': False}, 'dst': {'type': 'addresses_WT_ht', 'congruent': 8, 'same': False}, 'OP': 'REPM'}
{'dst': {'type': 'addresses_WC_ht', 'same': False, 'size': 32, 'congruent': 5, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_WC_ht', 'same': False, 'size': 8, 'congruent': 5, 'NT': False, 'AVXalign': True}, 'OP': 'STOR'}
{'src': {'type': 'addresses_UC_ht', 'same': False, 'size': 4, 'congruent': 5, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'dst': {'type': 'addresses_WC_ht', 'same': False, 'size': 4, 'congruent': 9, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'src': {'type': 'addresses_UC_ht', 'congruent': 10, 'same': False}, 'dst': {'type': 'addresses_WC_ht', 'congruent': 6, 'same': False}, 'OP': 'REPM'}
{'dst': {'type': 'addresses_normal_ht', 'same': False, 'size': 2, 'congruent': 8, 'NT': False, 'AVXalign': True}, 'OP': 'STOR'}
{'src': {'type': 'addresses_UC_ht', 'same': False, 'size': 16, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'51': 21829}
51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
*/
| 31.045614 | 2,999 | 0.655741 |
131581512d0dbcfd4b02fb7fe69957c6c9232c88 | 579 | asm | Assembly | programs/oeis/128/A128473.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/128/A128473.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/128/A128473.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A128473: Numbers of the form 30*k+23 or numbers that cannot be part of a twin prime pair.
; 23,53,83,113,143,173,203,233,263,293,323,353,383,413,443,473,503,533,563,593,623,653,683,713,743,773,803,833,863,893,923,953,983,1013,1043,1073,1103,1133,1163,1193,1223,1253,1283,1313,1343,1373,1403,1433,1463,1493,1523,1553,1583,1613,1643,1673,1703,1733,1763,1793,1823,1853,1883,1913,1943,1973,2003,2033,2063,2093,2123,2153,2183,2213,2243,2273,2303,2333,2363,2393,2423,2453,2483,2513,2543,2573,2603,2633,2663,2693,2723,2753,2783,2813,2843,2873,2903,2933,2963,2993
mul $0,30
add $0,23
| 96.5 | 465 | 0.768566 |
a9d3e1af466de793bb3142c74ebfa9c3699f0863 | 2,428 | asm | Assembly | programs/oeis/229/A229422.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/229/A229422.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/229/A229422.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A229422: Number of n X 2 0..2 arrays with horizontal differences mod 3 never 1, vertical differences mod 3 never -1, rows lexicographically nondecreasing, and columns lexicographically nonincreasing.
; 5,12,27,55,102,175,282,432,635,902,1245,1677,2212,2865,3652,4590,5697,6992,8495,10227,12210,14467,17022,19900,23127,26730,30737,35177,40080,45477,51400,57882,64957,72660,81027,90095,99902,110487,121890,134152,147315,161422,176517,192645,209852,228185,247692,268422,290425,313752,338455,364587,392202,421355,452102,484500,518607,554482,592185,631777,673320,716877,762512,810290,860277,912540,967147,1024167,1083670,1145727,1210410,1277792,1347947,1420950,1496877,1575805,1657812,1742977,1831380,1923102,2018225,2116832,2219007,2324835,2434402,2547795,2665102,2786412,2911815,3041402,3175265,3313497,3456192,3603445,3755352,3912010,4073517,4239972,4411475,4588127,4770030,4957287,5150002,5348280,5552227,5761950,5977557,6199157,6426860,6660777,6901020,7147702,7400937,7660840,7927527,8201115,8481722,8769467,9064470,9366852,9676735,9994242,10319497,10652625,10993752,11343005,11700512,12066402,12440805,12823852,13215675,13616407,14026182,14445135,14873402,15311120,15758427,16215462,16682365,17159277,17646340,18143697,18651492,19169870,19698977,20238960,20789967,21352147,21925650,22510627,23107230,23715612,24335927,24968330,25612977,26270025,26939632,27621957,28317160,29025402,29746845,30481652,31229987,31992015,32767902,33557815,34361922,35180392,36013395,36861102,37723685,38601317,39494172,40402425,41326252,42265830,43221337,44192952,45180855,46185227,47206250,48244107,49298982,50371060,51460527,52567570,53692377,54835137,55996040,57175277,58373040,59589522,60824917,62079420,63353227,64646535,65959542,67292447,68645450,70018752,71412555,72827062,74262477,75719005,77196852,78696225,80217332,81760382,83325585,84913152
mov $18,$0
mov $20,$0
add $20,1
lpb $20,1
clr $0,18
mov $0,$18
sub $20,1
sub $0,$20
mov $15,$0
mov $17,$0
add $17,1
lpb $17,1
mov $0,$15
sub $17,1
sub $0,$17
mov $11,$0
mov $13,2
lpb $13,1
mov $0,$11
sub $13,1
add $0,$13
add $0,3
mov $5,$0
bin $5,3
trn $5,6
add $5,7
mov $1,$5
mov $14,$13
lpb $14,1
mov $12,$1
sub $14,1
lpe
lpe
lpb $11,1
mov $11,0
sub $12,$1
lpe
mov $1,$12
sub $1,2
add $16,$1
lpe
add $19,$16
lpe
mov $1,$19
| 50.583333 | 1,631 | 0.752883 |
4f4f222f062beb7e4aede24c873bbb8fcb0107e0 | 664 | asm | Assembly | oeis/005/A005359.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/005/A005359.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/005/A005359.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A005359: a(n) = n! if n is even, otherwise 0 (from Taylor series for cos x).
; 1,0,2,0,24,0,720,0,40320,0,3628800,0,479001600,0,87178291200,0,20922789888000,0,6402373705728000,0,2432902008176640000,0,1124000727777607680000,0,620448401733239439360000,0,403291461126605635584000000,0,304888344611713860501504000000,0,265252859812191058636308480000000,0,263130836933693530167218012160000000,0,295232799039604140847618609643520000000,0,371993326789901217467999448150835200000000,0,523022617466601111760007224100074291200000000,0,815915283247897734345611269596115894272000000000,0
mov $1,3
lpb $0
mul $1,$0
sub $0,1
mul $1,$0
trn $0,1
lpe
div $1,3
mov $0,$1
| 51.076923 | 498 | 0.826807 |
6b2f635a744963c626b0234b138b02bfe4d3e01a | 1,825 | asm | Assembly | programs/oeis/086/A086225.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/086/A086225.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/086/A086225.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A086225: a(n) = 11*2^n - 1.
; 10,21,43,87,175,351,703,1407,2815,5631,11263,22527,45055,90111,180223,360447,720895,1441791,2883583,5767167,11534335,23068671,46137343,92274687,184549375,369098751,738197503,1476395007,2952790015,5905580031,11811160063,23622320127,47244640255,94489280511,188978561023,377957122047,755914244095,1511828488191,3023656976383,6047313952767,12094627905535,24189255811071,48378511622143,96757023244287,193514046488575,387028092977151,774056185954303,1548112371908607,3096224743817215,6192449487634431,12384898975268863,24769797950537727,49539595901075455,99079191802150911,198158383604301823,396316767208603647,792633534417207295,1585267068834414591,3170534137668829183,6341068275337658367,12682136550675316735,25364273101350633471,50728546202701266943,101457092405402533887,202914184810805067775,405828369621610135551,811656739243220271103,1623313478486440542207,3246626956972881084415,6493253913945762168831,12986507827891524337663,25973015655783048675327,51946031311566097350655,103892062623132194701311,207784125246264389402623,415568250492528778805247,831136500985057557610495,1662273001970115115220991,3324546003940230230441983,6649092007880460460883967,13298184015760920921767935,26596368031521841843535871,53192736063043683687071743,106385472126087367374143487,212770944252174734748286975,425541888504349469496573951,851083777008698938993147903,1702167554017397877986295807,3404335108034795755972591615,6808670216069591511945183231,13617340432139183023890366463,27234680864278366047780732927,54469361728556732095561465855,108938723457113464191122931711,217877446914226928382245863423,435754893828453856764491726847,871509787656907713528983453695,1743019575313815427057966907391,3486039150627630854115933814783,6972078301255261708231867629567
mov $1,2
pow $1,$0
mul $1,11
sub $1,1
mov $0,$1
| 202.777778 | 1,745 | 0.92274 |
4c2b506a5830d4cc80f098635868fca677e0a977 | 13,622 | asm | Assembly | compiler/ti-cgt-arm_18.12.4.LTS/lib/src/fd_add_t2.asm | JosiahCraw/TI-Arm-Docker | 23c0f4caf1638512bf53241531c69289c4e82488 | [
"MIT"
] | null | null | null | compiler/ti-cgt-arm_18.12.4.LTS/lib/src/fd_add_t2.asm | JosiahCraw/TI-Arm-Docker | 23c0f4caf1638512bf53241531c69289c4e82488 | [
"MIT"
] | null | null | null | compiler/ti-cgt-arm_18.12.4.LTS/lib/src/fd_add_t2.asm | JosiahCraw/TI-Arm-Docker | 23c0f4caf1638512bf53241531c69289c4e82488 | [
"MIT"
] | null | null | null | ;******************************************************************************
;* FD_ADD_T2.ASM - THUMB-2 STATE - *
;* *
;* Copyright (c) 1996 Texas Instruments Incorporated *
;* http://www.ti.com/ *
;* *
;* Redistribution and use in source and binary forms, with or without *
;* modification, are permitted provided that the following conditions *
;* are met: *
;* *
;* Redistributions of source code must retain the above copyright *
;* notice, this list of conditions and the following disclaimer. *
;* *
;* Redistributions in binary form must reproduce the above copyright *
;* notice, this list of conditions and the following disclaimer in *
;* the documentation and/or other materials provided with the *
;* distribution. *
;* *
;* Neither the name of Texas Instruments Incorporated nor the names *
;* of its contributors may be used to endorse or promote products *
;* derived from this software without specific prior written *
;* permission. *
;* *
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS *
;* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT *
;* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR *
;* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT *
;* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
;* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT *
;* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, *
;* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY *
;* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
;* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE *
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
;* *
;******************************************************************************
;*****************************************************************************
;* FD$ADD/FD$SUB - ADD / SUBTRACT TWO IEEE 754 FORMAT DOUBLE PRECISION FLOATING
;* POINT NUMBERS.
;*****************************************************************************
;*
;* o INPUT OP1 IS IN r0:r1
;* o INPUT OP2 IS IN r2:r3
;* o RESULT IS RETURNED IN r0:r1
;* o INPUT OP2 IN r2:r3 IS PRESERVED
;*
;* o SUBTRACTION, OP1 - OP2, IS IMPLEMENTED WITH ADDITION, OP1 + (-OP2)
;* o SIGNALLING NOT-A-NUMBER (SNaN) AND QUIET NOT-A-NUMBER (QNaN)
;* ARE TREATED AS INFINITY
;* o OVERFLOW RETURNS +/- INFINITY
;* (0x7ff00000:00000000) or (0xfff00000:00000000)
;* o DENORMALIZED NUMBERS ARE TREATED AS UNDERFLOWS
;* o UNDERFLOW RETURNS ZERO (0x00000000:00000000)
;* o ROUNDING MODE: ROUND TO NEAREST (TIE TO EVEN)
;*
;* o IF OPERATION INVOLVES INFINITY AS AN INPUT, THE FOLLOWING SUMMARIZES
;* THE RESULT:
;* +----------+----------+----------+
;* ADDITION + OP2 !INF | OP2 -INF + OP2 +INF +
;* +----------+==========+==========+==========+
;* + OP1 !INF + - | -INF + +INF +
;* +----------+----------+----------+----------+
;* + OP1 -INF + -INF | -INF + -INF +
;* +----------+----------+----------+----------+
;* + OP1 +INF + +INF | +INF + +INF +
;* +----------+----------+----------+----------+
;*
;* +----------+----------+----------+
;* SUBTRACTION + OP2 !INF | OP2 -INF + OP2 +INF +
;* +----------+==========+==========+==========+
;* + OP1 !INF + - | +INF + -INF +
;* +----------+----------+----------+----------+
;* + OP1 -INF + -INF | -INF + -INF +
;* +----------+----------+----------+----------+
;* + OP1 +INF + +INF | +INF + +INF +
;* +----------+----------+----------+----------+
;*
;****************************************************************************
;*
;* +------------------------------------------------------------------+
;* | DOUBLE PRECISION FLOATING POINT FORMAT |
;* | 64-bit representation |
;* | 31 30 20 19 0 |
;* | +-+----------+---------------------+ |
;* | |S| E | M1 | |
;* | +-+----------+---------------------+ |
;* | |
;* | 31 0 |
;* | +----------------------------------+ |
;* | | M2 | |
;* | +----------------------------------+ |
;* | |
;* | <S> SIGN FIELD : 0 - POSITIVE VALUE |
;* | 1 - NEGATIVE VALUE |
;* | |
;* | <E> EXPONENT FIELD: 0000000000 - ZERO IFF M == 0 |
;* | 0000000001..1111111110 - EXPONENT VALUE(1023 BIAS) |
;* | 1111111111 - INFINITY |
;* | |
;* | <M1:M2> MANTISSA FIELDS: FRACTIONAL MAGNITUDE WITH IMPLIED 1 |
;* +------------------------------------------------------------------+
;*
;****************************************************************************
.thumb
.if __TI_EABI_ASSEMBLER ; ASSIGN EXTERNAL NAMES BASED ON
.asg __aeabi_dadd, __TI_FD$ADD ; RTS BEING BUILT
.asg __aeabi_dsub, __TI_FD$SUB
.else
.clink
.asg FD$ADD, __TI_FD$ADD
.asg FD$SUB, __TI_FD$SUB
.endif
.global __TI_FD$ADD
.global __TI_FD$SUB
.if .TMS470_BIG_DOUBLE
rp1_hi .set r0 ; High word of regpair 1
rp1_lo .set r1 ; Low word of regpair 1
rp2_hi .set r2 ; High word of regpair 2
rp2_lo .set r3 ; Low word of regpair 2
.else
rp1_hi .set r1 ; High word of regpair 1
rp1_lo .set r0 ; Low word of regpair 1
rp2_hi .set r3 ; High word of regpair 2
rp2_lo .set r2 ; Low word of regpair 2
.endif
op1m1 .set r4
op1m2 .set r5
op1e .set r6
op2m1 .set r7
op2m2 .set r8
op2e .set r9
tmp .set r10
sticky .set r11
shift .set lr
.thumbfunc __TI_FD$SUB, __TI_FD$ADD
__TI_FD$SUB: .asmfunc stack_usage(40)
PUSH {r2-r11, lr}
EOR rp2_hi, rp2_hi, #0x80000000 ; NEGATE SECOND OPERAND
B _start
__TI_FD$ADD:
PUSH {r2-r11, lr}
_start: MOVS op2m1, rp2_hi, LSL #12 ; BUILD INPUT #2 MANTISSA
MOVS op2m1, op2m1, LSR #3
ORR op2m1, op2m1, rp2_lo, LSR #23
LSL op2m2, rp2_lo, #9
LSL op2e, rp2_hi, #1 ; BUILD INPUT #2 EXPONENT
LSRS op2e, op2e, #21
BNE $1
ORR tmp, op2m1, op2m2 ; IF DENORMALIZED NUMBER (op2m != 0 AND
ITT NE
MOVNE rp1_hi, #0 ; op2e == 0), THEN UNDERFLOW
MOVNE rp1_lo, #0 ;
POP {r2-r11, pc} ; ELSE IT IS ZERO SO RETURN INPUT #1
$1: ORRS op2m1, op2m1, #0x20000000 ; SET IMPLIED ONE IN MANTISSA
MOVS shift, #0x700 ; INITIALIZE shift WITH 0x7FF
ADDS shift, shift, #0xFF
CMP op2e, shift ; IF op2e==0x7FF, THEN OVERFLOW
BNE $2
MOV rp1_lo, #0
LSRS rp1_hi, rp2_hi, #20
LSLS rp1_hi, rp1_hi, #20
POP {r2-r11, pc}
$2: CMP rp2_hi, #0
BPL $3 ; IF INPUT #2 IS NEGATIVE,
MOVS tmp, #0
RSBS op2m2, op2m2, #0 ; THEN NEGATE THE MANTISSA
SBC op2m1, tmp, op2m1
$3: LSLS op1m1, rp1_hi, #12 ; BUILD INPUT #1 MANTISSA
LSRS op1m1, op1m1, #3
ORR op1m1, op1m1, rp1_lo, LSR #23
LSL op1m2, rp1_lo, #9
LSL op1e, rp1_hi, #1 ; BUILD INPUT #1 EXPONENT
LSRS op1e, op1e, #21
BNE $4
ORR tmp, op1m1, op1m2 ; IF DENORMALIZED NUMBER
ITTEE NE
MOVNE rp1_hi, #0 ; (op1m != 0 AND op1e == 0),
MOVNE rp1_lo, #0 ; THEN UNDERFLOW
MOVEQ rp1_hi, rp2_hi ; ELSE IT IS ZERO SO RETURN
MOVEQ rp1_lo, rp2_lo ; INPUT #2
POP {r2-r11, pc}
$4: ORR op1m1, op1m1, #0x20000000 ; SET IMPLIED ONE IN MANTISSA
CMP op1e, shift ; IF op1e==0x7FF, THEN OVERFLOW
BNE $5
MOVS rp1_lo, #0
LSRS rp1_hi, rp1_hi, #20
LSLS rp1_hi, rp1_hi, #20
POP {r2-r11, pc}
$5: CMP rp1_hi, #0
BPL $6 ; IF INPUT #1 IS NEGATIVE,
MOVS tmp, #0
RSBS op1m2, op1m2, #0 ; THEN NEGATE THE MANTISSA
SBC op1m1, tmp, op1m1
$6: SUBS shift, op1e, op2e ; GET THE SHIFT AMOUNT
BPL $7
CPY tmp, op1m1 ; IF THE SHIFT AMOUNT IS NEGATIVE, THEN
CPY op1m1, op2m1 ; SWAP THE TWO MANTISSA SO THAT op1m
CPY op2m1, tmp ; CONTAINS THE LARGER VALUE,
CPY tmp, op1m2
CPY op1m2, op2m2
CPY op2m2, tmp
RSB shift, shift, #0 ; AND NEGATE THE SHIFT AMOUNT,
CPY op1e, op2e ; AND ENSURE THE LARGER EXP. IS IN op1e
$7: CMP shift, #54 ; IF THE SECOND MANTISSA IS SIGNIFICANT,
ITT PL
MOVPL sticky, #0
BPL no_add
CMP shift, #0 ; ADJUST THE SECOND MANTISSA, BASED
ITT EQ
MOVEQ sticky, #0
BEQ no_sft ; UPON ITS EXPONENT.
RSB tmp, shift, #57 ; CALCULATE STICKY BIT
SUBS op2e, tmp, #32 ; PERFORM LONG LONG LSL by tmp
ITEE CS
MOVCS sticky, op2m2, LSL op2e ; WE DON'T CARE ABOUT THE ACTUAL RESULT
MOVCC sticky, op2m1, LSL tmp
ORRCC sticky, sticky, op2m2 ; ALL OF OP2M2 IS INCLUDED IN STICKY
RSBS tmp, shift, #32 ; tmp := 32 - shift
LSL tmp, op2m1, tmp ; set tmp to op2m1 shifted left by 32 - _shift_ places
IT CC
MOVCC tmp, op2m1
ASR op2m1, op2m1, shift ;
ITEET CS
LSRCS op2m2, op2m2, shift ;
SUBCC shift, shift, #32
ASRCC op2m2, tmp, shift
ADDCS op2m2, op2m2, tmp ; op2m2 is zero everywhere tmp isn't and vice versa
no_sft: ADDS op1m2, op1m2, op2m2 ; ADD IT TO THE FIRST MANTISSA
ADCS op1m1, op1m1, op2m1 ;
no_add: ORRS tmp, op1m1, op1m2 ;
ITTT EQ
MOVEQ rp1_hi, #0 ; IF THE RESULT IS ZERO,
MOVEQ rp1_lo, #0 ;
POPEQ {r2-r11, pc} ; THEN UNDERFLOW
CMP op1m1, #0 ;
IT PL
MOVPL tmp, #0x0 ; IF THE RESULT IS POSITIVE, NOTE SIGN
BPL nloop ;
MOVS tmp, #0x1 ; IF THE RESULT IS NEGATIVE, THEN
MOVS shift, #0
RSBS op1m2, op1m2, #0x0 ; NOTE THE SIGN AND
SBC op1m1, shift, op1m1 ; NEGATE THE RESULT
nloop: SUB op1e, op1e, #1 ; ADJUSTING THE EXPONENT AS NECESSARY
LSLS op1m2, op1m2, #1 ; NORMALIZE THE RESULTING MANTISSA
ADCS op1m1, op1m1, op1m1 ;
BPL nloop ;
ANDS shift, op1m2, #0x400 ; GUARD_BIT
BEQ no_round ; IF GUARD BIT 0, DO NOT ROUND
AND op2e, op1m2, #0x100 ; IF RESULT REQUIRED NORMALIZATION
ORR sticky, sticky, op2e ; BIT 26 MUST BE ADDED TO STICKY
ADDS op1m2, op1m2, #0x400 ; ROUND THE MANTISSA TO THE NEAREST
ADCS op1m1, op1m1, #0 ;
IT CS
ADDCS op1e, op1e, #1 ; ADJUST EXPONENT IF AN OVERFLOW OCCURS
BCS ovfl ; IF OVERFLOW, RESULT IS ALREADY EVEN
AND op2e, op1m2, #0x200 ; GET ROUND BIT
ORRS sticky, sticky, op2e ; (ROUND + STICKY)
IT EQ ; IF (ROUND + STICKY) == 0
BICEQ op1m2, op1m2, #0x800 ; WE HAVE A TIE, ROUND TO EVEN
no_round:
BIC op1m2, op1m2, #0x700 ; CLEAR GUARD, ROUND, AND STICKY BITS
LSLS op1m2, op1m2, #1 ; REMOVE THE IMPLIED ONE
ADC op1m1, op1m1, op1m1 ;
ovfl: ADDS op1e, op1e, #2 ; NORMALIZE THE EXPONENT
ITTT LE
MOVLE rp1_hi, #0 ; CHECK FOR UNDERFLOW
MOVLE rp1_lo, #0 ;
POPLE {r2-r11, pc} ;
MOVS shift, #0x700 ;
ADDS shift, shift, #0xFF ;
CMP op1e, shift ; CHECK FOR OVERFLOW
BCC $9
MOV rp1_lo, #0 ;
ANDS rp2_hi, rp2_hi, #0x80000000
MOVS rp1_hi, #0xFF
LSLS rp1_hi, rp1_hi, #3
ADDS rp1_hi, rp1_hi, #7
LSLS rp1_hi, rp1_hi, #20
ORRS rp1_hi, rp1_hi, rp2_hi
POP {r2-r11, pc}
$9: LSLS op2m1, op1m1, #20 ; REPACK THE MANTISSA INTO
ORR rp1_lo, op2m1, op1m2, LSR #12 ; rp1_hi:rp1_lo
LSRS rp1_hi, op1m1, #12 ;
ORR rp1_hi, rp1_hi, op1e, LSL #20 ; REPACK THE EXPONENT INTO rp1_hi
ORR rp1_hi, rp1_hi, tmp, LSL #31 ; REPACK THE SIGN INTO rp1_hi
POP {r2-r11, pc}
.endasmfunc
.end
| 41.530488 | 81 | 0.460946 |
a1afdfdf4266312286f5ecba49e52f4283d3bd95 | 1,243 | asm | Assembly | programs/oeis/082/A082285.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/082/A082285.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/082/A082285.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A082285: a(n) = 16n + 13.
; 13,29,45,61,77,93,109,125,141,157,173,189,205,221,237,253,269,285,301,317,333,349,365,381,397,413,429,445,461,477,493,509,525,541,557,573,589,605,621,637,653,669,685,701,717,733,749,765,781,797,813,829,845,861,877,893,909,925,941,957,973,989,1005,1021,1037,1053,1069,1085,1101,1117,1133,1149,1165,1181,1197,1213,1229,1245,1261,1277,1293,1309,1325,1341,1357,1373,1389,1405,1421,1437,1453,1469,1485,1501,1517,1533,1549,1565,1581,1597,1613,1629,1645,1661,1677,1693,1709,1725,1741,1757,1773,1789,1805,1821,1837,1853,1869,1885,1901,1917,1933,1949,1965,1981,1997,2013,2029,2045,2061,2077,2093,2109,2125,2141,2157,2173,2189,2205,2221,2237,2253,2269,2285,2301,2317,2333,2349,2365,2381,2397,2413,2429,2445,2461,2477,2493,2509,2525,2541,2557,2573,2589,2605,2621,2637,2653,2669,2685,2701,2717,2733,2749,2765,2781,2797,2813,2829,2845,2861,2877,2893,2909,2925,2941,2957,2973,2989,3005,3021,3037,3053,3069,3085,3101,3117,3133,3149,3165,3181,3197,3213,3229,3245,3261,3277,3293,3309,3325,3341,3357,3373,3389,3405,3421,3437,3453,3469,3485,3501,3517,3533,3549,3565,3581,3597,3613,3629,3645,3661,3677,3693,3709,3725,3741,3757,3773,3789,3805,3821,3837,3853,3869,3885,3901,3917,3933,3949,3965,3981,3997
mov $1,$0
mul $1,16
add $1,13
| 177.571429 | 1,183 | 0.774739 |
9bb92234360965d70a1c9cb1e4ac13a8516d3520 | 473 | asm | Assembly | oeis/349/A349137.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/349/A349137.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/349/A349137.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A349137: a(n) = phi(A003602(n)), where A003602 is Kimberling's paraphrases, and phi is Euler totient function.
; Submitted by Jamie Morken(s2)
; 1,1,1,1,2,1,2,1,4,2,2,1,6,2,4,1,6,4,4,2,10,2,4,1,12,6,6,2,8,4,8,1,16,6,6,4,18,4,8,2,12,10,10,2,22,4,8,1,20,12,12,6,18,6,12,2,28,8,8,4,30,8,16,1,20,16,16,6,24,6,12,4,36,18,18,4,24,8,16,2,40,12,12,10,42,10,20,2,24,22,22,4,46,8,16,1,42,20,20,12
seq $0,25480 ; a(2n) = n, a(2n+1) = a(n).
seq $0,39649 ; a(n) = phi(n)+1.
sub $0,1
| 59.125 | 243 | 0.613108 |
004718e6df47fbe0f23ea3f721e693ee1a6defd7 | 1,259 | asm | Assembly | practica7/combinatoria.asm | ramseslopez/Arqui | da2b4b8b384209417c2aeceeab06fd671f7e29b1 | [
"MIT"
] | null | null | null | practica7/combinatoria.asm | ramseslopez/Arqui | da2b4b8b384209417c2aeceeab06fd671f7e29b1 | [
"MIT"
] | null | null | null | practica7/combinatoria.asm | ramseslopez/Arqui | da2b4b8b384209417c2aeceeab06fd671f7e29b1 | [
"MIT"
] | null | null | null | .data
n: .asciiz "Introduzca n: "
k: .asciiz "Introduzca k: "
sl: .asciiz "\n"
result: .asciiz "El resultado es "
.text
main: addi $sp, $sp, -4
sw $ra, 0($sp)
jal combinaciones
entero: li $v0, 4
syscall
li $v0, 5
syscall
jr $ra
combinaciones: addi $sp, $sp, -4
sw $ra, 0($sp)
la $a0, n
jal entero
move $s0, $v0
la $a0, k
jal entero
move $a1, $v0
move $a0, $s0
jal coeficiente
move $t0, $v0
la $a0, result
li $v0, 4
syscall
move $a0, $t0
li $v0, 1
syscall
la $a0, sl
li $v0, 4
syscall
lw $ra, 0($sp)
addi $sp, $sp, 4
jr $ra
salir: lw $ra, 0($sp)
addi $sp, $sp, 4
jr $ra
coeficiente: addi $sp, $sp, -16
sw $s2, 12($sp)
sw $s1, 8($sp)
sw $s0, 4($sp)
sw $ra, 0($sp)
beq $a0, $a1, Cbase1
beq $a1, 0, Cbase0
move $s0, $a0
move $s1, $a1
subi $a0, $s0, 1 #n - 1 k-1
subi $a1, $s1, 1
jal coeficiente
move $s2, $v0
subi $a0, $s0, 1 #n - 1 k
move $a1, $s1
jal coeficiente
add $v0, $v0, $s2 #sumar ambas partes
j fin
Cbase1: li $v0, 1 #Caso base 1
j fin
Cbase0: li $v0, 1 #Caso base 0
fin: lw $ra, 0($sp)
lw $s0, 4($sp)
lw $s1, 8($sp)
lw $s2, 12($sp)
addi $sp, $sp, 16
jr $ra | 16.350649 | 41 | 0.511517 |
8b2d13a200a1c6c1cd1f49f6b0c7b39ee8d75afe | 5,804 | asm | Assembly | Transynther/x86/_processed/NC/_zr_/i7-7700_9_0xca_notsx.log_9716_947.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NC/_zr_/i7-7700_9_0xca_notsx.log_9716_947.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NC/_zr_/i7-7700_9_0xca_notsx.log_9716_947.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r14
push %r9
push %rbx
push %rcx
push %rdi
push %rsi
lea addresses_UC_ht+0x5227, %rsi
lea addresses_UC_ht+0xaaf0, %rdi
nop
cmp %rbx, %rbx
mov $86, %rcx
rep movsw
sub $1084, %r9
lea addresses_UC_ht+0x87c7, %r14
nop
add %rsi, %rsi
mov (%r14), %di
nop
nop
nop
nop
cmp $54303, %rcx
lea addresses_A_ht+0x6127, %rsi
lea addresses_normal_ht+0x60e7, %rdi
nop
nop
nop
cmp $58824, %r11
mov $43, %rcx
rep movsq
nop
nop
nop
nop
xor %rsi, %rsi
lea addresses_A_ht+0x10c67, %rdi
nop
nop
nop
nop
dec %rbx
movb (%rdi), %r11b
dec %rsi
lea addresses_A_ht+0x1b067, %rcx
dec %rbx
movw $0x6162, (%rcx)
nop
cmp %r11, %r11
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %r9
pop %r14
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r12
push %r14
push %r9
push %rax
push %rbx
push %rcx
push %rdi
// Load
lea addresses_UC+0x6967, %rax
nop
nop
nop
nop
cmp $33236, %rcx
movaps (%rax), %xmm5
vpextrq $1, %xmm5, %r12
nop
nop
nop
dec %r12
// Store
lea addresses_US+0x1a973, %rbx
nop
nop
nop
nop
nop
sub $24609, %rdi
mov $0x5152535455565758, %r12
movq %r12, (%rbx)
xor $64159, %r9
// Store
lea addresses_normal+0x1542f, %rax
nop
nop
xor $41990, %rdi
movb $0x51, (%rax)
nop
add %rcx, %rcx
// Faulty Load
mov $0xf9d170000000867, %rax
add %r9, %r9
mov (%rax), %r12
lea oracles, %rax
and $0xff, %r12
shlq $12, %r12
mov (%rax,%r12,1), %r12
pop %rdi
pop %rcx
pop %rbx
pop %rax
pop %r9
pop %r14
pop %r12
ret
/*
<gen_faulty_load>
[REF]
{'src': {'NT': True, 'AVXalign': False, 'size': 1, 'congruent': 0, 'same': False, 'type': 'addresses_NC'}, 'OP': 'LOAD'}
{'src': {'NT': False, 'AVXalign': True, 'size': 16, 'congruent': 8, 'same': False, 'type': 'addresses_UC'}, 'OP': 'LOAD'}
{'dst': {'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 2, 'same': False, 'type': 'addresses_US'}, 'OP': 'STOR'}
{'dst': {'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 3, 'same': False, 'type': 'addresses_normal'}, 'OP': 'STOR'}
[Faulty Load]
{'src': {'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 0, 'same': True, 'type': 'addresses_NC'}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'congruent': 4, 'same': False, 'type': 'addresses_UC_ht'}, 'dst': {'congruent': 0, 'same': True, 'type': 'addresses_UC_ht'}, 'OP': 'REPM'}
{'src': {'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 4, 'same': False, 'type': 'addresses_UC_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 6, 'same': False, 'type': 'addresses_A_ht'}, 'dst': {'congruent': 6, 'same': True, 'type': 'addresses_normal_ht'}, 'OP': 'REPM'}
{'src': {'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 10, 'same': False, 'type': 'addresses_A_ht'}, 'OP': 'LOAD'}
{'dst': {'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 11, 'same': False, 'type': 'addresses_A_ht'}, 'OP': 'STOR'}
{'00': 9716}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
| 41.163121 | 2,999 | 0.655582 |
ade3873eb80d2a2f936fa4e872a49496d185460b | 108 | asm | Assembly | libsrc/_DEVELOPMENT/math/float/math32/lm32/c/sdcc/sqrt.asm | Frodevan/z88dk | f27af9fe840ff995c63c80a73673ba7ee33fffac | [
"ClArtistic"
] | 640 | 2017-01-14T23:33:45.000Z | 2022-03-30T11:28:42.000Z | libsrc/_DEVELOPMENT/math/float/math32/lm32/c/sdcc/sqrt.asm | Frodevan/z88dk | f27af9fe840ff995c63c80a73673ba7ee33fffac | [
"ClArtistic"
] | 1,600 | 2017-01-15T16:12:02.000Z | 2022-03-31T12:11:12.000Z | libsrc/_DEVELOPMENT/math/float/math32/lm32/c/sdcc/sqrt.asm | Frodevan/z88dk | f27af9fe840ff995c63c80a73673ba7ee33fffac | [
"ClArtistic"
] | 215 | 2017-01-17T10:43:03.000Z | 2022-03-23T17:25:02.000Z |
SECTION code_fp_math32
PUBLIC _sqrt
EXTERN cm32_sdcc_fssqrt
defc _sqrt = cm32_sdcc_fssqrt
| 15.428571 | 33 | 0.731481 |
4ca2973f71ab6fcbb8ad9cb0f51b5f9f5b5a0489 | 27,815 | asm | Assembly | cpm2/RomWBW/Source/Apps/OSLdr.asm | grancier/z180 | e83f35e36c9b4d1457e40585019430e901c86ed9 | [
"ClArtistic"
] | null | null | null | cpm2/RomWBW/Source/Apps/OSLdr.asm | grancier/z180 | e83f35e36c9b4d1457e40585019430e901c86ed9 | [
"ClArtistic"
] | null | null | null | cpm2/RomWBW/Source/Apps/OSLdr.asm | grancier/z180 | e83f35e36c9b4d1457e40585019430e901c86ed9 | [
"ClArtistic"
] | 1 | 2019-12-03T23:57:48.000Z | 2019-12-03T23:57:48.000Z | ;===============================================================================
; OSLdr - Load a new OS image from filesystem on running system.
; Optionally, load a new HBIOS image at the same time.
;===============================================================================
;
; Author: Wayne Warthen (wwarthen@gmail.com)
;_______________________________________________________________________________
;
; Usage:
; OSLDR /F <osimg> [<biosimg>]
; /F (force) overrides all compatibility checking
; ex. OSLDR CPM.SYS
; OSLDR CPM.SYS HBIOS.BIO
;
; <osimg> is an os image file such as cpm.sys or zsys.sys
; <biosimg> is an optional bios image such as hbios.bio
;_______________________________________________________________________________
;
; Operation:
; This application reads an OS image (and optionally HBIOS image)
; into TPA memory from the filesystem. It then copies the images to
; their appropriate locations and restarts the system.
; Note that the application itself is relocated to upper memory
; after starting so that it can manipulate the lower memory bank.
;
; The application uses the following memory layout:
;
; Loc Size Usage
; ----- ----- -----------------------------
; $0400-$3FFF $3C00 OS Image (max of 15K possible)
; $4000-$BFFF $8000 HBIOS Image (32K fixed size)
; $C000-$CFFF $1000 Application (after relocation)
;
; Notes:
; 1) Drive assignments are not retained. Drive assignments are
; reset during the OS boot.
; 2) The OS boot drive is not explicitly set by this app. If a new
; HBIOS image is not loaded, the boot drive passed to the OS will
; be the same as it was at the last boot. If a new HBIOS image
; is being loaded, the boot drive will be the default imbedded in
; the HBIOS image.
; 3) It is not possible to load a new UNA BIOS. However, when the
; app is run under UNA, it can load a new OS image and optionally
; load an HBIOS image.
;_______________________________________________________________________________
;
; Change Log:
;_______________________________________________________________________________
;
; ToDo:
;_______________________________________________________________________________
;
; Known Issues:
; 1) App will fail badly if OS image exceeds 15K
; 2) No attempt is made to match the BIOS image version against
; the running BIOS version. This is intended behavior and is
; to allow a different BIOS version to be tested. A failure
; could occur if the BIOS image does not conform to the
; expected structure (size, meta data location, entry point
; location, etc.)
;_______________________________________________________________________________
;
;===============================================================================
; Definitions
;===============================================================================
;
stksiz .equ $40 ; we are a stack pig
;
restart .equ $0000 ; CP/M restart vector
bdos .equ $0005 ; BDOS invocation vector
;
; Memory layout (see Operation description above)
;
osimg .equ $0400 ; OS image load location (max 15K)
hbimg .equ $4000 ; HBIOS image load location (32K fixed)
runloc .equ $C000 ; running location (after relocation)
;
; Below are offsets in OS image of specific data fields
; The first 1.5K of the OS image is a header
;
hdrsiz .equ $600 ; Len of OS image header (3 sectors)
ossig .equ osimg + $580 ; Signature ($A55A)
osplt .equ osimg + $582 ; Platform ID
osver .equ osimg + $5E3 ; Version (4 bytes, maj, min, up, pat)
osloc .equ osimg + $5FA ; Intended address to load OS image
osend .equ osimg + $5FC ; Ending load address of OS image
osent .equ osimg + $5FE ; Entry point for OS image
osbin .equ osimg + hdrsiz ; Start of actual OS binary (after header)
;
; HBIOS internal info (adjust if HBIOS changes)
;
bfgbnk .equ $F3 ; HBIOS Get Bank function
bfver .equ $F1 ; HBIOS Get Version function
sigptr .equ hbimg + 3 ; HBIOS signature pointer
hbmrk .equ hbimg + $100 ; HBIOS marker
hbver .equ hbimg + $102 ; HBIOS version
hbplt .equ hbimg + $104 ; HBIOS platform
bidusr .equ hbimg + $10B ; User bank id
bidbios .equ hbimg + $10C ; BIOS bank id
pxyimg .equ hbimg + $200 ; Proxy image offset within HBIOS image
pxyloc .equ $FE00 ; Proxy run location
pxysiz .equ $0200 ; Proxy size
srcbnk .equ $FFE4 ; Address of bank copy source bank id
dstbnk .equ $FFE7 ; Address of bank copy destination bank id
curbnk .equ $FFE0 ; Address of current bank id in hbios proxy
hbxbnk .equ $FFF3 ; Bank select function entry address
hbxcpy .equ $FFF6 ; Bank copy function entry address
;
;===============================================================================
; Code Section
;===============================================================================
;
.org $100 ; startup org
; relocate ourselves to upper memory
ld hl,$0000 ; from startup location
ld de,runloc ; to running location
ld bc,$0800 ; assume we are no more that 2048 bytes
ldir ; copy ourselves
jp phase2 ; jump to new location
.org $ + runloc ; adjust for phase 2 location
phase2:
; setup stack (save old value)
ld (stksav),sp ; save stack
ld sp,stack ; set new stack
; processing...
call main ; do the real work
call crlf ; formatting
; return (we only get here if an error occurs)
jp 0 ; return to CP/M via reset
;
; Main routine
;
main:
call init ; initialize
ret nz ; abort on failure
call parse ; parse command tail
ret nz ; abort on failure
; call confirm ; confirm pending action
; ret nz ; abort on failure
call crlf2 ; formatting
; Read OS image into TPA
call rdos ; do the os read
ret nz ; abort on failure
; If specified, read BIOS image
ld a,(newbio) ; get BIOS load flag
or a ; set flags
call nz,rdbio ; do the bios read
ret nz ; abort on failure
call crlf ; formatting
; If force flag set, bypass image validitity checking
ld a,(force) ; load the flag
or a ; set flags
jr nz,main1 ; if set, bypass checks
; Check BIOS Image is acceptable
ld a,(newbio) ; get BIOS load flag
or a ; set flags
call nz,chkbios ; check the bios image
ret nz ; abort on failure
; Check OS Image is acceptable for requested operation
call chkos ; check the os image
ret nz ; abort on failure
main1:
; Load OS image into upper memory OS location
call ldos ; load OS
ret nz ; abort on failure
; If specified, load BIOS image to BIOS bank
ld a,(newbio) ; get BIOS load flag
or a ; set flags
jr z,main3 ; if not set, skip BIOS load and init
call ldbio ; load BIOS
ret nz ; abort on failure
; Initialize BIOS
call initbio ; initialize BIOS
main3:
; Launch...
ld hl,(osent) ; OS entry point
jp (hl) ; jump to OS BOOT vector
;
; Initialization
;
init:
call crlf
ld de,msgban ; point to banner
call prtstr ; display it
; locate cbios function table address
ld hl,(restart+1) ; load address of CP/M restart vector
ld de,-3 ; adjustment for start of table
add hl,de ; HL now has start of table
ld (cbftbl),hl ; save it
; save current drive no
ld c,$19 ; bdos func: get current drive
call bdos ; invoke BDOS function
inc a ; 1-based index for fcb
ld (defdrv),a ; save it
; check for UNA (UBIOS)
ld de,msghb ; assume HBIOS (point to HBIOS mode string)
ld a,($fffd) ; fixed location of UNA API vector
cp $c3 ; jp instruction?
jr nz,init1 ; if not, not UNA
ld hl,($fffe) ; get jp address
ld a,(hl) ; get byte at target address
cp $fd ; first byte of UNA push ix instruction
jr nz,init1 ; if not, not UNA
inc hl ; point to next byte
ld a,(hl) ; get next byte
cp $e5 ; second byte of UNA push ix instruction
jr nz,init1 ; if not, not UNA
ld hl,unamod ; point to UNA mode flag
ld (hl),$ff ; set UNA mode
ld a,6 ; UNA platform ID
ld (bioplt),a ; save it
ld de,msgub ; point to UBIOS string
init1:
call prtstr ; print BIOS name
; if HBIOS active, get version number
ld a,(unamod) ; get UNA mode flag
or a ; set flags
jr nz,init2 ; skip if UNA BIOS active
ld b,bfver ; HBIOS func: get version
rst 08 ; do it
ld a,l ; platform to A
ld (bioplt),a ; save platform
ld h,e ; switch bytes
ld l,d ; ... to save as maj/min, up/pat
ld (biover),hl ; save version
ld b,bfgbnk ; HBIOS func: get current bank
rst 08 ; do it
ld a,c ; move to A
ld (tpabnk),a ; save it
init2:
; return success
xor a
ret
;
; Parse command tail
;
parse:
ld hl,$81 ; point to start of command tail (after length byte)
call nonblank ; locate start of parms
jp z,erruse ; no parms
call options ; process options
ret nz ; abort if error
ld de,osfcb ; point to os image fcb
call convert ; convert destination spec
jp nz,erramb ; Error, ambiguous file specification
call nonblank ; skip blanks
or a ; end of command tail (null)?
jr z,parse1 ; if end, skip bios image fcb
ld de,biofcb ; point to bios image fcb
call convert ; convert spec to fcb
jp nz,erramb ; Error, ambiguous file specification
or $FF ; flag = true
ld (newbio),a ; set newbio flag to true
;
parse1:
; return success
xor a ; signal success
ret ; done parsing
;
options:
; process options
cp '/' ; option introducer?
jr nz,options2 ; if not '/' exit with success
inc hl ; bump past option introducer
ld a,(hl) ; get the next character
cp 'F' ; compare to 'F'
jr z,optf ; handle if so
jp erruse ; bail out if unexpected option
options1:
; post-processing after option
inc hl ; move past option
call nonblank ; skip blanks
jr options ; loop
options2:
; success exit
xor a ; signal success
ret
optf:
; set force flag
or $FF ; load true
ld (force),a ; set flag
jr options1 ; done
;
; Confirm pending action with user
;
confirm:
; ; prompt
; call crlf
; ld de,sconf1
; call prtstr
; ld hl,biofcb
; call prtfcb
; ld de,sconf2
; call prtstr
; ld hl,osfcb
; call prtfcb
; ld de,sconf3
; call prtstr
;;
; ; get input
; ld c,$0A ; get console buffer
; ld de,osimg ; into buf
; ld a,1 ; max of 1 character
; ld (de),a ; set up buffer
; call bdos ; invoke BDOS
; ld a,(osimg+1) ; get num chars entered
; dec a ; check that we got exactly one char
; jr nz,confirm ; bad input, re-prompt
; ld a,(osimg+2) ; get the character
; and $DF ; force upper case
; cp 'Y' ; compare to Y
xor a ; *temp*
ret ; return with Z set appropriately
;
; Read OS image file into memory
;
rdos:
ld de,msgros ; point to "Reading OS" message
call prtstr ; display it
; open the file
ld c,$0F ; bdos open file
ld de,osfcb ; bios image fcb
ld (rwfcb),de ; save it
call bdos ; invoke bdos function
cp $FF ; $FF is error
jp z,errfil ; handle error condition
; read the header
ld a,$14 ; setup for bdos read sequential
ld (rwfun),a ; save bdos function
ld a,12 ; start with 1536 byte header (12 records)
ld (reccnt),a ; init record counter
ld hl,osimg ; start of buffer
ld (bufptr),hl ; init buffer pointer
call rwfil ; read the header
ret nz ; abort on error (no need to close file)
; check header and get image size
call chkhdr ; verifies marker, hl = image size
ret nz ; abort on error (no need to close file)
ld b,7 ; right shift 7 bits to get 128 byte record count
rdos1: srl h ; shift right msb
rr l ; shift lsb w/ carry from msb
djnz rdos1 ; loop till done
ld a,l ; record count to a
ld (reccnt),a ; set remaining records to read
add a,12 ; add the header back
ld (imgsiz),a ; and save the total image size (in records)
call rwfil ; do it
ret nz ; abort on error
; return via close file
jp closefile ; close file
;
;
;
rdbio:
ld de,msgrbio ; point to "Reading BIOS" message
call prtstr ; display it
; open the file
ld c,$0F ; bdos open file
ld de,biofcb ; bios image fcb
ld (rwfcb),de ; save it
call bdos ; invoke bdos function
cp $FF ; $FF is error
jp z,errfil ; handle error condition
; read 32K HBIOS image
ld a,$14 ; setup for bdos read sequential
ld (rwfun),a ; save bdos function
ld a,0 ; 0 means 256 records (32K)
ld (reccnt),a ; init record counter
ld hl,hbimg ; start of buffer
ld (bufptr),hl ; init buffer pointer
call rwfil ; read the header
ret nz ; abort on error (no need to close file)
; return via close file
jp closefile ; close file
;
; Examine the BIOS image loaded. Confirm existence of expected
; BIOS identification marker in first page (fail if not there).
; Display the BIOS identification information. Confirm it is HBIOS
; and fail if not. Save the HBIOS version number.
;
chkbios:
; locate ROM signature in image
ld hl,sigptr ; point to ROM signature adr
ld a,(hl) ; dereference
inc hl ; ... to point
ld h,(hl) ; ... to location
ld l,a ; ... of signature block
ld de,hbimg ; offset by start
add hl,de ; ... of BIOS image
; check signature
ld a,$76 ; first byte value
cp (hl) ; compare
jp nz,errsig ; if not equal, signature error
inc hl ; bump to next byte
ld a,$B5 ; second byte value
cp (hl) ; compare
jp nz,errsig ; if not equal, signature error
inc hl ; bump to next byte
;; display short name
;inc hl ; bump past structure version number
;inc hl ; bump past rom size
;ld e,(hl) ; load rom name
;inc hl ; ... pointer
;ld d,(hl) ; ... into DE
;ld hl,hbimg ; offset by start
;add hl,de ; ... of BIOS image
;ex de,hl ; get pointer to DE
;call crlf ; formatting
;call prtstr ; and display it
; check BIOS variant, only HBIOS supported
ld hl,hbmrk ; get the HBIOS marker
ld a,'W' ; first byte should be 'W'
cp (hl) ; compare
jp nz,errbio ; if not equal, fail
inc hl ; next byte
ld a,~'W' ; ... should be ~'W'
cp (hl) ; compare
jp nz,errbio ; if not equal, fail
; if UNA is running, skip platform/ver stuff
ld a,(unamod) ; get UNA mode flag
or a ; set flags
jr nz,chkbios1 ; skip if UNA
; get and check platform (must match)
ld hl,hbplt ; point to BIOS platform id
ld a,(bioplt) ; get current running platform id
cp (hl) ; match?
jp nz,errplt ; if not, platform error
; get HBIOS image version
ld hl,(hbver) ; get version byte from image
ld (biover),hl ; save it for later
chkbios1:
xor a
ret
;
; Examine the OS image loaded. Confirm existence of expected
; OS identification marker (fail if not there). Check the version
; number in the OS image header. Fail if OS image version does
; not match BIOS version.
;
chkos:
; check for signature
; Already verified in chkhdr
; compare platform id
ld a,(bioplt) ; get current HBIOS platform ID
ld hl,osplt ; point to OS image platform ID
cp (hl) ; compare
jp nz,errplt ; if not equal platform error
; bypass version check if UNA running
ld a,(unamod) ; get UNA mode flag
or a ; set flags
jr nz,chkos1 ; if UNA, bypass
; compare version
ld a,(osver) ; get first OS version byte (major)
rlca ; move low nibble
rlca ; ...
rlca ; ...
rlca ; ... to high nibble
ld b,a ; save in b
ld a,(osver + 1) ; get second OS version byte (minor)
or b ; combine with major nibble
ld hl,biover ; point to HBIOS version
cp (hl) ; compare
jp nz,errver ; if not equal, fail
chkos1:
xor a ; signal success
ret
;
; Load OS image into correct destination
;
ldos:
; compute the image size (does not include size of header)
ld hl,(osend) ; get CPM_END
ld de,(osloc) ; get CPM_LOC
or a ; clear CF
sbc hl,de ; image size := CPM_END - CPM_LOC
push hl ; move image size
pop bc ; ... to BC
ld hl,osbin ; copy from buf, skip header
ld de,(osloc) ; OS location
ldir ; do the copy
xor a
ret
;
; Load BIOS into correct destination
;
ldbio:
;
; copy the proxy to upper memory
ld hl,pxyimg ; location of proxy image
ld de,pxyloc ; target location of proxy
ld bc,pxysiz ; size of proxy
ldir ; copy it
ld a,(tpabnk) ; get active tpa bank id
ld (curbnk),a ; fixup the proxy
;
; copy image to bios bank
ld a,(curbnk) ; load from current bank
ld (srcbnk),a ; set source bank
ld a,(bidbios) ; copy to bios bank
ld (dstbnk),a ; set destination bank
ld hl,hbimg ; set source address
ld de,0 ; set destination address
ld bc,$8000 ; set length
ld a,(curbnk) ; return to current bank
call hbxcpy ; to the inter-bank copy
;
xor a ; signal success
ret
;
;
;
initbio:
;
; initialize HBIOS
ld a,(bidbios) ; get bios bank
call hbxbnk ; ... and activate it
call $0000 ; call bios init entry point
ld a,(tpabnk) ; get active tpa bank id
call hbxbnk ; ... and activate it
;
xor a
ret
;
; Common routine to handle read/write for file system
;
rwfil:
ld c,$1A ; BDOS set dma
ld de,(bufptr) ; current buffer pointer
push de ; save pointer
call bdos ; do it
pop de ; recover pointer
ld hl,128 ; record length
add hl,de ; increment buffer pointer
ld (bufptr),hl ; save it
ld a,(rwfun) ; get the active function
ld c,a ; set it
ld de,(rwfcb) ; active fcb
call bdos ; do it
or a ; check return code
jp nz,errdos ; BDOS err
; call prtdot ; mark progress
ld hl,reccnt ; point to record count
dec (hl) ; decrement record count
jr nz,rwfil ; loop till done
xor a ; signal success
ret ; done
;
; Close file
;
closefile:
ld c,$10 ; BDOS close file
ld de,(rwfcb) ; active fcb
call bdos ; do it
cp $FF ; $FF is error
jp z,errclo ; if error, handle it
xor a ; signal success
ret ; done
;
jphl: jp (hl) ; indirect jump
;
; Verify system image header in osimg by checking the expected signature.
; Compute and return image size (based on header values) in HL. Size
; does not include header. NZ set if signature error.
;
chkhdr:
; check signature
ld hl,(ossig) ; get signature
ld de,$A55A ; signature value
or a ; clear CF
sbc hl,de ; compare
jp nz,errsig ; invalid signature
; compute the image size (does not include size of header)
ld hl,(osend) ; get CPM_END
ld de,(osloc) ; get CPM_LOC
or a ; clear CF
sbc hl,de ; image size := CPM_END - CPM_LOC
xor a ; signal success
ret ; done
;
; Convert a filename at (HL) into an FCB at (DE).
; Includes wildcard expansion.
; On return, A=0 if unambiguous name specified, and
; (HL) points to character following filename spec
;
convert:
push de ; put fcb address on stack
ex de,hl
ld a,(de) ; get first character.
or a
jp z,convrt1
sbc a,'A'-1 ; might be a drive name, convert to binary.
ld b,a ; and save.
inc de ; check next character for a ':'.
ld a,(de)
cp ':'
jp z,convrt2
dec de ; nope, move pointer back to the start of the line.
convrt1:
ld a,(defdrv)
ld (hl),a
jp convrt3
convrt2:
ld a,b
ld (hl),b
inc de
; Convert the base file name.
convrt3:ld b,08h
convrt4:ld a,(de)
call delim
jp z,convrt8
inc hl
cp '*' ; note that an '*' will fill the remaining
jp nz,convrt5 ; field with '?'
ld (hl),'?'
jp convrt6
convrt5:ld (hl),a
inc de
convrt6:dec b
jp nz,convrt4
convrt7:ld a,(de)
call delim ; get next delimiter
jp z,getext
inc de
jp convrt7
convrt8:inc hl ; blank fill the file name
ld (hl),' '
dec b
jp nz,convrt8
getext: ld b,03h
cp '.'
jp nz,getext5
inc de
getext1:ld a,(de)
call delim
jp z,getext5
inc hl
cp '*'
jp nz,getext2
ld (hl),'?'
jp getext3
getext2:ld (hl),a
inc de
getext3:dec b
jp nz,getext1
getext4:ld a,(de)
call delim
jp z,getext6
inc de
jp getext4
getext5:inc hl
ld (hl),' '
dec b
jp nz,getext5
getext6:ld b,3
getext7:inc hl
ld (hl),0
dec b
jp nz,getext7
pop hl ; HL := start of FCB
push de ; save input line pointer
; Check to see if this is an ambiguous file name specification.
; Set the A register to non-zero if it is.
ld bc,11 ; set name length.
getext8:inc hl
ld a,(hl)
cp '?' ; any question marks?
jp nz,getext9
inc b ; count them.
getext9:dec c
jp nz,getext8
ld a,b
or a
pop hl ; return with updated input pointer
ret
;
; Print formatted FCB at (HL)
;
prtfcb:
push hl ; save HL
call chkfcb ; set flags indicating nature of FCB
pop hl ; restore HL
ret z ; nothing to print
push af ; save FCB flags
ld a,(hl) ; get first byte of FCB (drive)
inc hl ; point to next char
or a ; is drive specified (non-zero)?
jr z,prtfcb1 ; if zero, do not print drive letter
add a,'@' ; adjust drive number to alpha
call prtchr ; print it
ld a,':'
call prtchr ; print drive separator
prtfcb1:
pop af ; restore FCB flags
bit 1,a ; bit 1 set if filename specified
ret z ; return if no filename
ld b,8 ; base is 8 characters
call prtfcb2 ; print them
ld a,'.'
call prtchr ; print file extension separator
ld b,3 ; extension is 3 characters
prtfcb2:
ld a,(hl) ; load the next character
inc hl ; point to next character
cp ' ' ; check for blank
call nz,prtchr ; print char if it is not a blank
djnz prtfcb2 ; loop till done
ret ; return
;
; Check FCB to see if a drive and/or filename is specified.
; Set bit 0 for drive and bit 1 for filename in A
;
chkfcb:
ld c,0 ; use C for flags, start with none
ld a,(hl) ; get drive
or a ; anything there?
jr z,chkfcb1 ; skip if nothing there
set 0,c ; set bit zero to indicate a drive spec
chkfcb1:
ld b,11 ; set up to check 11 bytes (base & ext)
chkfcb2:
inc hl ; bump to next byte
ld a,(hl) ; get next
cp 'A' ; blank means empty byte
jr nc,chkfcb3 ; if not blank, we have a filename
djnz chkfcb2 ; loop
jr chkfcb4 ; nothing there
chkfcb3:
set 1,c ; set bit 1 to indicate a file spec
chkfcb4:
ld a,c ; put result in a
or a ; set flags
ret
;
; Print character in A without destroying any registers
;
prtchr:
push bc ; save registers
push de
push hl
ld e,a ; character to print in E
ld c,$02 ; BDOS function to output a character
call bdos ; do it
pop hl ; restore registers
pop de
pop bc
ret
;
prtdot:
push af
ld a,'.'
call prtchr
pop af
ret
;
; Print a zero terminated string at (DE) without destroying any registers
;
prtstr:
push de
;
prtstr1:
ld a,(de) ; get next char
or a
jr z,prtstr2
call prtchr
inc de
jr prtstr1
;
prtstr2:
pop de ; restore registers
ret
;
; Print the value in A in hex without destroying any registers
;
prthex:
push af ; save AF
push de ; save DE
call hexascii ; convert value in A to hex chars in DE
ld a,d ; get the high order hex char
call prtchr ; print it
ld a,e ; get the low order hex char
call prtchr ; print it
pop de ; restore DE
pop af ; restore AF
ret ; done
;
; Convert binary value in A to ascii hex characters in DE
;
hexascii:
ld d,a ; save A in D
call hexconv ; convert low nibble of A to hex
ld e,a ; save it in E
ld a,d ; get original value back
rlca ; rotate high order nibble to low bits
rlca
rlca
rlca
call hexconv ; convert nibble
ld d,a ; save it in D
ret ; done
;
; Convert low nibble of A to ascii hex
;
hexconv:
and $0F ; low nibble only
add a,$90
daa
adc a,$40
daa
ret
;
; Start a new line (or 2)
;
crlf2:
call crlf ; double new line entry
crlf:
ld a,13 ; <CR>
call prtchr ; print it
ld a,10 ; <LF>
jr prtchr ; print it
;
; Get the next non-blank character from (HL).
;
nonblank:
ld a,(hl) ; load next character
or a ; string ends with a null
ret z ; if null, return pointing to null
cp ' ' ; check for blank
ret nz ; return if not blank
inc hl ; if blank, increment character pointer
jr nonblank ; and loop
;
; Check character at (DE) for delimiter.
;
delim: or a
ret z
cp ' ' ; blank
ret z
jr c,delim1 ; handle control characters
cp '=' ; equal
ret z
cp '_' ; underscore
ret z
cp '.' ; period
ret z
cp ':' ; colon
ret z
cp $3b ; semicolon
ret z
cp '<' ; less than
ret z
cp '>' ; greater than
ret
delim1:
; treat control chars as delimiters
xor a ; set Z
ret ; return
;
; Invoke CBIOS function
; The CBIOS function offset must be stored in the byte
; following the call instruction. ex:
; call cbios
; .db $0C ; offset of CONOUT CBIOS function
;
cbios:
ex (sp),hl
ld a,(hl) ; get the function offset
inc hl ; point past value following call instruction
ex (sp),hl ; put address back at top of stack and recover HL
ld hl,(cbftbl) ; address of CBIOS function table to HL
call addhl ; determine specific function address
jp (hl) ; invoke CBIOS
;
; Add the value in A to HL (HL := HL + A)
;
addhl:
add a,l ; A := A + L
ld l,a ; Put result back in L
ret nc ; if no carry, we are done
inc h ; if carry, increment H
ret ; and return
;
; Errors
;
erruse: ; command usage error (syntax)
ld de,msguse
jr err
erramb: ; ambiguous file spec (wild cards) is not allowed
ld de,msgamb
jr err
errdlm: ; invalid delimiter in command tail
ld de,msgdlm
jr err
errfil: ; source file not found
ld de,msgfil
jr err
errclo: ; file close error
ld de,msgclo
jr err
errsig: ; invalid system image signature error
ld de,msgsig
jr err
errbio: ; invalid BIOS image, not HBIOS
ld de,msgbio
jr err
errplt: ; platform mismatch
ld de,msgplt
jr err
errver: ; version mismatch
ld de,msgver
jr err
err: ; print error string and return error signal
call crlf2 ; print newline
call prtstr ; print error string
or $FF ; signal error
ret ; done
errdos: ; handle BDOS errors
push af ; save return code
call crlf2 ; newline
ld de,msgdos ; load
call prtstr ; and print error string
pop af ; recover return code
call prthex ; print error code
or $FF ; signal error
ret ; done
;
;===============================================================================
; Storage Section
;===============================================================================
;
defdrv .db 0 ; default drive for FCB
cbftbl .dw 0 ; address of CBIOS function table
imgsiz .db 0 ; image size (count of 128 byte records)
;
osfcb .fill 36,0 ; os image FCB
biofcb .fill 36,0 ; bios image FCB
;
unamod .db 0 ; UNA move flag (non-zero if UNA running)
newbio .db 0 ; BIOS load flag (non-zero if new BIOS load)
force .db 0 ; force operation (bypass compatibility checks)
tpabnk .db 0 ; bank id of TPA when app starts
bioplt .db 0 ; Platform ID of running HBIOS
biover .dw 0 ; version of BIOS being loaded
;
stksav .dw 0 ; stack pointer saved at start
.fill stksiz,0 ; stack
stack .equ $ ; stack top
;
rwfun .db 0 ; active read/write function
rwfcb .dw 0 ; active read/write FCB
reccnt .db 0 ; active remaining records to read/write
bufptr .dw 0 ; active pointer into buffer
;
; Messages
;
msgban .db "OSLDR v1.1 for RomWBW, 16-Jan-2018",0
msghb .db " (HBIOS Mode)",0
msgub .db " (UBIOS Mode)",0
msguse .db "Usage: OSLDR [/F] <osimg> [<hbiosimg>]\r\n"
.db " /F (force) overrides all compatibility checking",0
msgamb .db "Ambiguous file specification not allowed",0
msgdlm .db "Invalid delimiter",0
msgfil .db "File not found",0
msgclo .db "File close error",0
msgsig .db "Obsolete or invalid BIOS image (BIOS signature)",0
msgbio .db "Obsolete or invalid HBIOS image (HBIOS signature)",0
msgplt .db "Platform (hardware) mismatch",0
msgver .db "Version mismatch",0
msgdos .db "DOS error, return code=0x",0
msgros .db "Reading OS... ",0
msgrbio .db "Reading BIOS... ",0
msglos .db "Loading OS... ",0
msglbio .db "Loading BIOS... ",0
;
.end
| 27.403941 | 81 | 0.64591 |
5f04902a279ff9d340b297280d25112a2dccb6dc | 17,170 | asm | Assembly | lib/third_party/mcu_vendor/renesas/rz_mcu_boards/core_package/generate/compiler/asm/r_cache_l1_rza2.asm | renesas-rx/amazon-freertos | 1f50ef5b1971183c29c6d6748b4a0a3635de2fdf | [
"MIT"
] | 7 | 2018-06-27T10:53:02.000Z | 2020-08-07T05:32:13.000Z | lib/third_party/mcu_vendor/renesas/rz_mcu_boards/core_package/generate/compiler/asm/r_cache_l1_rza2.asm | renesas-rx/amazon-freertos | 1f50ef5b1971183c29c6d6748b4a0a3635de2fdf | [
"MIT"
] | 19 | 2018-12-07T03:41:15.000Z | 2020-02-05T14:42:04.000Z | lib/third_party/mcu_vendor/renesas/rz_mcu_boards/core_package/generate/compiler/asm/r_cache_l1_rza2.asm | renesas-rx/amazon-freertos | 1f50ef5b1971183c29c6d6748b4a0a3635de2fdf | [
"MIT"
] | 11 | 2018-08-03T10:15:33.000Z | 2020-12-07T03:26:10.000Z | @/*******************************************************************************
@* DISCLAIMER
@* This software is supplied by Renesas Electronics Corporation and is only
@* intended for use with Renesas products. No other uses are authorized. This
@* software is owned by Renesas Electronics Corporation and is protected under
@* all applicable laws, including copyright laws.
@* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
@* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
@* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
@* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
@* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
@* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
@* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
@* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
@* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
@* Renesas reserves the right, without notice, to make changes to this software
@* and to discontinue the availability of this software. By using this software,
@* you agree to the additional terms and conditions found by accessing the
@* following link:
@* http://www.renesas.com/disclaimer
@* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved.
@*******************************************************************************/
@/*******************************************************************************
@* File Name : r_cache_l1_rza2.asm
@* Description : Declaration of the Cortex-A9 cache API function.
@*******************************************************************************/
.section .text
.arm
@*******************************************************************************
@ Function Name: r_cache_l1_cache_init
@ Description : Sub function of initialize the Cortex-A9 Cache.
@ Arguments : none
@ Return Value : none
@*******************************************************************************
.section .text.r_cache_l1_cache_init
.global r_cache_l1_cache_init
.type r_cache_l1_cache_init, %function
.func r_cache_l1_cache_init
r_cache_l1_cache_init:
@ Do nothing
BX lr
.endfunc
@*******************************************************************************
@End of function r_cache_l1_cache_init
@*******************************************************************************
@*******************************************************************************
@ Function Name: r_cache_l1_i_inv_all
@ Description : Invalidate whole of the Cortex-A9 instruction cache.
@ Arguments : none
@ Return Value : none
@*******************************************************************************
.section .text.r_cache_l1_i_inv_all
.global r_cache_l1_i_inv_all
.type r_cache_l1_i_inv_all, %function
.func r_cache_l1_i_inv_all
r_cache_l1_i_inv_all:
MOV r0, #0 @ r0 data is ignored
MCR p15, 0, r0, c7, c5, 0 @ ICIALLU
DSB
ISB
BX lr
.endfunc
@*******************************************************************************
@End of function r_cache_l1_i_inv_all
@*******************************************************************************
@*******************************************************************************
@ Function Name: r_cache_l1_d_cache_operation
@ Description : Operate whole of the Cortex-A9 data cache.
@ Arguments : r0 - R_CACHE_L1_OP_D_INV_ALL(0) : Invalidate all
@ - R_CACHE_L1_OP_D_CLEAN_ALL(1) : Clean all
@ - R_CACHE_L1_OP_D_CLEAN_INV_ALL(2) : Clean&Invalidate all
@ Return Value : none
@*******************************************************************************
.section .text.r_cache_l1_d_cache_operation
.global r_cache_l1_d_cache_operation
.type r_cache_l1_d_cache_operation, %function
.func r_cache_l1_d_cache_operation
r_cache_l1_d_cache_operation:
PUSH {r4-r11}
MRC p15, 1, r6, c0, c0, 1 @ Read CLIDR
ANDS r3, r6, #0x07000000 @ Extract coherency level
MOV r3, r3, LSR #23 @ Total cache levels << 1
BEQ Finished @ If 0, no need to clean
MOV r10, #0 @ R10 holds current cache level << 1
Loop1:
ADD r2, r10, r10, LSR #1 @ R2 holds cache "Set" position
MOV r1, r6, LSR r2 @ Bottom 3 bits are the Cache-type for this level
AND r1, r1, #7 @ Isolate those lower 3 bits
CMP r1, #2
BLT Skip @ No cache or only instruction cache at this level
MCR p15, 2, r10, c0, c0, 0 @ Write the Cache Size selection register (CSSELR)
ISB @ ISB to sync the change to the CacheSizeID reg
MRC p15, 1, r1, c0, c0, 0 @ Reads current Cache Size ID register (CCSIDR)
AND r2, r1, #7 @ Extract the line length field
ADD r2, r2, #4 @ Add 4 for the line length offset (log2 16 bytes)
LDR r4, =0x3FF
ANDS r4, r4, r1, LSR #3 @ R4 is the max number on the way size (right aligned)
CLZ r5, r4 @ R5 is the bit position of the way size increment
LDR r7, =0x7FFF
ANDS r7, r7, r1, LSR #13 @ R7 is the max number of the index size (right aligned)
Loop2:
MOV r9, r4 @ R9 working copy of the max way size (right aligned)
Loop3:
ORR r11, r10, r9, LSL r5 @ Factor in the Way number and cache number into R11
ORR r11, r11, r7, LSL r2 @ Factor in the Set number
CMP r0, #0
BNE Dccsw
MCR p15, 0, r11, c7, c6, 2 @ Invalidate by Set/Way (DCISW)
B Count
Dccsw:
CMP r0, #1
BNE Dccisw
MCR p15, 0, r11, c7, c10, 2@ Clean by set/way (DCCSW)
B Count
Dccisw:
MCR p15, 0, r11, c7, c14, 2@ Clean and Invalidate by set/way (DCCISW)
Count:
SUBS r9, r9, #1 @ Decrement the Way number
BGE Loop3
SUBS r7, r7, #1 @ Decrement the Set number
BGE Loop2
Skip:
ADD r10, r10, #2 @ increment the cache number
CMP r3, r10
BGT Loop1
Finished:
DSB
POP {r4-r11}
BX lr
.endfunc
@*******************************************************************************
@End of function r_cache_l1_d_cache_operation
@*******************************************************************************
@*******************************************************************************
@ Function Name: r_cache_l1_d_inv_mva
@ Description : Apply invalidate operation to a cache line which is included
@ in the specified address.
@ Arguments : r0 -
@ Starting address of cache operation (virtual address).
@ Return Value : none
@*******************************************************************************
.section .text.r_cache_l1_d_inv_mva
.global r_cache_l1_d_inv_mva
.type r_cache_l1_d_inv_mva, %function
.func r_cache_l1_d_inv_mva
r_cache_l1_d_inv_mva:
MCR p15, 0, r0, c7, c6, 1 @ DCIMVAC
DMB
BX lr
.endfunc
@*******************************************************************************
@End of function r_cache_l1_d_inv_mva
@*******************************************************************************
@*******************************************************************************
@ Function Name: r_cache_l1_d_clean_mva
@ Description : Apply clean operation to a cache line which is included
@ in the specified address.
@ Arguments : r0 -
@ Starting address of cache operation (virtual address).
@ Return Value : none
@*******************************************************************************
.section .text.r_cache_l1_d_clean_mva
.global r_cache_l1_d_clean_mva
.type r_cache_l1_d_clean_mva, %function
.func r_cache_l1_d_clean_mva
r_cache_l1_d_clean_mva:
MCR p15, 0, r0, c7, c10, 1 @ DCCMVAC
DMB
BX lr
.endfunc
@*******************************************************************************
@End of function r_cache_l1_d_clean_mva
@*******************************************************************************
@*******************************************************************************
@ Function Name: r_cache_l1_d_clean_inv_mva
@ Description : Apply clean&invalidate operation to a cache line which is
@ included in the specified address.
@ Arguments : r0 -
@ Starting address of cache operation (virtual address).
@ Return Value : none
@*******************************************************************************
.section .text.r_cache_l1_d_clean_inv_mva
.global r_cache_l1_d_clean_inv_mva
.type r_cache_l1_d_clean_inv_mva, %function
.func r_cache_l1_d_clean_inv_mva
r_cache_l1_d_clean_inv_mva:
MCR p15, 0, r0, c7, c14, 1 @ DCCIMVAC
DMB
BX lr
.endfunc
@*******************************************************************************
@End of function r_cache_l1_d_clean_inv_mva
@*******************************************************************************
@*******************************************************************************
@ Function Name: r_cache_l1_i_enable
@ Description : Enable the Cortex-A9 instruction cache.
@ Arguments : none
@ Return Value : none
@*******************************************************************************
.section .text.r_cache_l1_i_enable
.global r_cache_l1_i_enable
.type r_cache_l1_i_enable, %function
.func r_cache_l1_i_enable
r_cache_l1_i_enable:
MRC p15, 0, r0, c1, c0, 0 @ Read System Control Register
ORR r0, r0, #(0x1 << 12) @ Enable I Cache
MCR p15, 0, r0, c1, c0, 0 @ Write System Control Register
BX lr
.endfunc
@*******************************************************************************
@End of function r_cache_l1_i_enable
@*******************************************************************************
@*******************************************************************************
@ Function Name: r_cache_l1_i_disable
@ Description : Disable the Cortex-A9 instruction cache.
@ Arguments : none
@ Return Value : none
@*******************************************************************************
.section .text.r_cache_l1_i_disable
.global r_cache_l1_i_disable
.type r_cache_l1_i_disable, %function
.func r_cache_l1_i_disable
r_cache_l1_i_disable:
MRC p15, 0, r0, c1, c0, 0 @ Read System Control Register
BIC r0, r0, #(0x1 << 12) @ Disable I Cache
MCR p15, 0, r0, c1, c0, 0 @ Write System Control Register
BX lr
.endfunc
@*******************************************************************************
@End of function r_cache_l1_i_disable
@*******************************************************************************
@*******************************************************************************
@ Function Name: r_cache_l1_d_enable
@ Description : Enable the Cortex-A9 data cache.
@ Arguments : none
@ Return Value : none
@*******************************************************************************
.section .text.r_cache_l1_d_enable
.global r_cache_l1_d_enable
.type r_cache_l1_d_enable, %function
.func r_cache_l1_d_enable
r_cache_l1_d_enable:
MRC p15, 0, r0, c1, c0, 0 @ Read System Control Register
ORR r0, r0, #(0x1 << 2) @ Enable D Cache
MCR p15, 0, r0, c1, c0, 0 @ Write System Control Register
BX lr
.endfunc
@*******************************************************************************
@End of function r_cache_l1_d_enable
@*******************************************************************************
@*******************************************************************************
@ Function Name: r_cache_l1_d_disable
@ Description : Disable the Cortex-A9 data cache.
@ Arguments : none
@ Return Value : none
@*******************************************************************************
.section .text.r_cache_l1_d_disable
.global r_cache_l1_d_disable
.type r_cache_l1_d_disable, %function
.func r_cache_l1_d_disable
r_cache_l1_d_disable:
MRC p15, 0, r0, c1, c0, 0 @ Read System Control Register
BIC r0, r0, #(0x1 << 2) @ Disable D Cache
MCR p15, 0, r0, c1, c0, 0 @ Write System Control Register
BX lr
.endfunc
@*******************************************************************************
@End of function r_cache_l1_d_disable
@*******************************************************************************
@*******************************************************************************
@ Function Name: r_cache_l1_btac_enable
@ Description : Enable the Cortex-A9 branch prediction.
@ Arguments : none
@ Return Value : none
@*******************************************************************************
.section .text.r_cache_l1_btac_enable
.global r_cache_l1_btac_enable
.type r_cache_l1_btac_enable, %function
.func r_cache_l1_btac_enable
r_cache_l1_btac_enable:
MRC p15, 0, r0, c1, c0, 0 @ Read System Control Register
ORR r0, r0, #(0x1 << 11) @ Enable program flow prediction
MCR p15, 0, r0, c1, c0, 0 @ Write System Control Register
BX lr
.endfunc
@*******************************************************************************
@End of function r_cache_l1_btac_enable
@*******************************************************************************
@*******************************************************************************
@ Function Name: r_cache_l1_btac_disable
@ Description : Disable the Cortex-A9 branch prediction.
@ Arguments : none
@ Return Value : none
@*******************************************************************************
.section .text.r_cache_l1_btac_disable
.global r_cache_l1_btac_disable
.type r_cache_l1_btac_disable, %function
.func r_cache_l1_btac_disable
r_cache_l1_btac_disable:
MRC p15, 0, r0, c1, c0, 0 @ Read CP15 register 1
BIC r0, r0, #(0x1 << 11) @ Disable program flow prediction
MCR p15, 0, r0, c1, c0, 0 @ Write CP15 register 1
BX lr
.endfunc
@*******************************************************************************
@End of function r_cache_l1_btac_disable
@*******************************************************************************
@*******************************************************************************
@ Function Name: r_cache_l1_btac_inv
@ Description : Invalidate whole of the Cortex-A9 branch prediction table.
@ Arguments : none
@ Return Value : none
@*******************************************************************************
.section .text.r_cache_l1_btac_inv
.global r_cache_l1_btac_inv
.type r_cache_l1_btac_inv, %function
.func r_cache_l1_btac_inv
r_cache_l1_btac_inv:
MOV r0, #0 @ r0 data is ignored
MCR p15, 0, r0, c7, c5, 6 @ BPIALL
DSB
ISB
BX lr
.endfunc
@*******************************************************************************
@End of function r_cache_l1_btac_inv
@*******************************************************************************
@*******************************************************************************
@ Function Name: r_cache_l1_prefetch_enable
@ Description : Enable the Cortex-A9 prefetching.
@ Arguments : none
@ Return Value : none
@*******************************************************************************
.section .text.r_cache_l1_prefetch_enable
.global r_cache_l1_prefetch_enable
.type r_cache_l1_prefetch_enable, %function
.func r_cache_l1_prefetch_enable
r_cache_l1_prefetch_enable:
MRC p15, 0, r0, c1, c0, 1 @ Read Auxiliary Control Register
ORR r0, r0, #(0x1 << 2) @ Enable Dside prefetch
MCR p15, 0, r0, c1, c0, 1 @ Write Auxiliary Control Register
BX lr
.endfunc
@*******************************************************************************
@End of function r_cache_l1_prefetch_enable
@*******************************************************************************
@*******************************************************************************
@ Function Name: r_cache_l1_prefetch_disable
@ Description : Disable the Cortex-A9 prefetching.
@ Arguments : none
@ Return Value : none
@*******************************************************************************
.section .text.r_cache_l1_prefetch_disable
.global r_cache_l1_prefetch_disable
.type r_cache_l1_prefetch_disable, %function
.func r_cache_l1_prefetch_disable
r_cache_l1_prefetch_disable:
MRC p15, 0, r0, c1, c0, 1 @ Read Auxiliary Control Register
BIC r0, r0, #(0x1 << 2) @ Disable Dside prefetch
MCR p15, 0, r0, c1, c0, 1 @ Write Auxiliary Control Register
BX lr
.endfunc
@*******************************************************************************
@End of function r_cache_l1_prefetch_disable
@*******************************************************************************
| 39.74537 | 88 | 0.478567 |
6cd7090ca0c012cc0185df99287fe723da0bed87 | 6,119 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0x84_notsx.log_21829_2083.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0x84_notsx.log_21829_2083.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0x84_notsx.log_21829_2083.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r13
push %r14
push %r15
push %r8
push %r9
push %rcx
push %rdi
push %rsi
lea addresses_normal_ht+0x19648, %rsi
nop
nop
sub $1166, %r13
movb $0x61, (%rsi)
cmp %r9, %r9
lea addresses_normal_ht+0x30dc, %r8
nop
nop
nop
and $14689, %r11
mov (%r8), %r15w
nop
nop
nop
cmp $34605, %r8
lea addresses_UC_ht+0x28dc, %rsi
lea addresses_UC_ht+0x143f0, %rdi
nop
nop
nop
nop
nop
add $39061, %r11
mov $9, %rcx
rep movsw
xor %r11, %r11
lea addresses_A_ht+0xeafc, %rsi
lea addresses_normal_ht+0x108dc, %rdi
xor $40300, %r13
mov $77, %rcx
rep movsb
cmp %rcx, %rcx
lea addresses_WT_ht+0x36dc, %r8
clflush (%r8)
nop
nop
nop
and %r9, %r9
movw $0x6162, (%r8)
nop
xor $59774, %rdi
lea addresses_D_ht+0x1e4e4, %r14
dec %rcx
mov $0x6162636465666768, %r13
movq %r13, %xmm0
vmovups %ymm0, (%r14)
nop
nop
nop
cmp %r14, %r14
pop %rsi
pop %rdi
pop %rcx
pop %r9
pop %r8
pop %r15
pop %r14
pop %r13
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r12
push %r15
push %r8
push %r9
push %rax
push %rcx
// Load
lea addresses_WT+0x583c, %r11
nop
nop
nop
and %r15, %r15
mov (%r11), %rcx
nop
add $41635, %r15
// Store
lea addresses_UC+0x53dc, %r12
clflush (%r12)
cmp $5482, %r8
movl $0x51525354, (%r12)
nop
nop
nop
nop
nop
dec %r15
// Load
lea addresses_WT+0x14cdc, %rax
nop
nop
nop
nop
add %rcx, %rcx
mov (%rax), %r11
nop
nop
nop
nop
and %r15, %r15
// Faulty Load
lea addresses_PSE+0x100dc, %r9
nop
nop
nop
inc %r11
movb (%r9), %cl
lea oracles, %r15
and $0xff, %rcx
shlq $12, %rcx
mov (%r15,%rcx,1), %rcx
pop %rcx
pop %rax
pop %r9
pop %r8
pop %r15
pop %r12
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'src': {'type': 'addresses_PSE', 'same': False, 'size': 4, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_WT', 'same': False, 'size': 8, 'congruent': 3, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'dst': {'type': 'addresses_UC', 'same': False, 'size': 4, 'congruent': 4, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'src': {'type': 'addresses_WT', 'same': False, 'size': 8, 'congruent': 9, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
[Faulty Load]
{'src': {'type': 'addresses_PSE', 'same': True, 'size': 1, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'dst': {'type': 'addresses_normal_ht', 'same': False, 'size': 1, 'congruent': 1, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'src': {'type': 'addresses_normal_ht', 'same': False, 'size': 2, 'congruent': 9, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_UC_ht', 'congruent': 10, 'same': False}, 'dst': {'type': 'addresses_UC_ht', 'congruent': 1, 'same': False}, 'OP': 'REPM'}
{'src': {'type': 'addresses_A_ht', 'congruent': 5, 'same': False}, 'dst': {'type': 'addresses_normal_ht', 'congruent': 11, 'same': False}, 'OP': 'REPM'}
{'dst': {'type': 'addresses_WT_ht', 'same': False, 'size': 2, 'congruent': 7, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_D_ht', 'same': False, 'size': 32, 'congruent': 3, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'33': 21829}
33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33
*/
| 38.484277 | 2,999 | 0.655663 |
450fa8dff8555dbba86c2aae7db3508d51a2e017 | 394 | asm | Assembly | oeis/016/A016276.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/016/A016276.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/016/A016276.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A016276: Expansion of 1/((1-2x)(1-3x)(1-7x)).
; Submitted by Jon Maiga
; 1,12,103,786,5713,40656,286651,2012862,14109205,98822460,691932319,4844053578,33909961177,237374494824,1661635779907,11631493440534,81420583092829,569944468808148,3989612443394215
mov $1,1
mov $2,1
mov $3,2
lpb $0
sub $0,1
mul $1,7
mul $3,3
add $3,2
add $1,$3
mul $2,2
add $2,1
sub $1,$2
lpe
mov $0,$1
| 20.736842 | 181 | 0.69797 |
6715c0d9485a74763fbc7709e22f1888bb8237e2 | 767 | asm | Assembly | 2021-2022-sem1/lab05/4-sets/sets.asm | adinasm/iocla-demos | a4109ed9fd3a34b097299f941617a6380267c003 | [
"MIT"
] | null | null | null | 2021-2022-sem1/lab05/4-sets/sets.asm | adinasm/iocla-demos | a4109ed9fd3a34b097299f941617a6380267c003 | [
"MIT"
] | null | null | null | 2021-2022-sem1/lab05/4-sets/sets.asm | adinasm/iocla-demos | a4109ed9fd3a34b097299f941617a6380267c003 | [
"MIT"
] | null | null | null | %include "../io.mac"
section .text
global main
extern printf
main:
;cele doua multimi se gasesc in eax si ebx
mov eax, 139 ; 1000 1011 -> {7, 3, 1, 0}
mov ebx, 169 ; 1010 1001 -> {7, 5, 3, 0}
PRINTF32 `%u\n\x0`, eax ; afiseaza prima multime
PRINTF32 `%u\n\x0`, ebx ; afiseaza cea de-a doua multime
; TODO1: reuniunea a doua multimi
; or
; TODO2: adaugarea unui element in multime
; 0100 0000
; mov edx, 1
; shl edx, 2 -> edx = 4
; or
; TODO3: intersectia a doua multimi
; and
; TODO4: complementul unei multimi
; not ATENTIE
; TODO5: eliminarea unui element
; 1 << x; not; and
; TODO6: diferenta de multimi EAX-EBX
; A \ B = (A ^ B) ^ B
xor eax, eax
ret
| 17.044444 | 60 | 0.571056 |
ed632f1f6ed5494781999e3a627c1d773b21b0b4 | 3,628 | asm | Assembly | NVEncCore/cpu_info_x86.asm | yumetodo/NVEnc | 829b4cb5c7028f813bef51927a403a6d75d8c4cb | [
"MIT"
] | null | null | null | NVEncCore/cpu_info_x86.asm | yumetodo/NVEnc | 829b4cb5c7028f813bef51927a403a6d75d8c4cb | [
"MIT"
] | null | null | null | NVEncCore/cpu_info_x86.asm | yumetodo/NVEnc | 829b4cb5c7028f813bef51927a403a6d75d8c4cb | [
"MIT"
] | null | null | null | section .code
align 16
section .text
global _runl_por
;void __stdcall runl_por(uint32_t count_n) (
; [esp+04] uint32_t size
;)
_runl_por:
push ebp
push edi
push esi
push ebx
; @+16
xor eax, eax
cpuid
rdtscp
mov esi, eax
mov edi, edx
mov ecx, [esp+16+04]; size
align 16
.LOOP:
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
por xmm0, xmm0
dec ecx
jnz .LOOP
rdtscp
sub edx, edi
sbb eax, esi
pop ebx
pop esi
pop edi
pop ebp
ret
| 21.595238 | 45 | 0.461411 |
734d229d6dd4584f85d804c4b5808d9c2feae6ab | 1,037 | asm | Assembly | _build/dispatcher/jmp_ippsRSA_Encrypt_d5494553.asm | zyktrcn/ippcp | b0bbe9bbb750a7cf4af5914dd8e6776a8d544466 | [
"Apache-2.0"
] | 1 | 2021-10-04T10:21:54.000Z | 2021-10-04T10:21:54.000Z | _build/dispatcher/jmp_ippsRSA_Encrypt_d5494553.asm | zyktrcn/ippcp | b0bbe9bbb750a7cf4af5914dd8e6776a8d544466 | [
"Apache-2.0"
] | null | null | null | _build/dispatcher/jmp_ippsRSA_Encrypt_d5494553.asm | zyktrcn/ippcp | b0bbe9bbb750a7cf4af5914dd8e6776a8d544466 | [
"Apache-2.0"
] | null | null | null | extern m7_ippsRSA_Encrypt:function
extern n8_ippsRSA_Encrypt:function
extern y8_ippsRSA_Encrypt:function
extern e9_ippsRSA_Encrypt:function
extern l9_ippsRSA_Encrypt:function
extern n0_ippsRSA_Encrypt:function
extern k0_ippsRSA_Encrypt:function
extern ippcpJumpIndexForMergedLibs
extern ippcpSafeInit:function
segment .data
align 8
dq .Lin_ippsRSA_Encrypt
.Larraddr_ippsRSA_Encrypt:
dq m7_ippsRSA_Encrypt
dq n8_ippsRSA_Encrypt
dq y8_ippsRSA_Encrypt
dq e9_ippsRSA_Encrypt
dq l9_ippsRSA_Encrypt
dq n0_ippsRSA_Encrypt
dq k0_ippsRSA_Encrypt
segment .text
global ippsRSA_Encrypt:function (ippsRSA_Encrypt.LEndippsRSA_Encrypt - ippsRSA_Encrypt)
.Lin_ippsRSA_Encrypt:
db 0xf3, 0x0f, 0x1e, 0xfa
call ippcpSafeInit wrt ..plt
align 16
ippsRSA_Encrypt:
db 0xf3, 0x0f, 0x1e, 0xfa
mov rax, qword [rel ippcpJumpIndexForMergedLibs wrt ..gotpc]
movsxd rax, dword [rax]
lea r11, [rel .Larraddr_ippsRSA_Encrypt]
mov r11, qword [r11+rax*8]
jmp r11
.LEndippsRSA_Encrypt:
| 26.589744 | 87 | 0.78785 |
6dd0a156c3aa97510b19ca5a8519187be27543b5 | 3,040 | asm | Assembly | examples/tiny_sk.asm | kspalaiologos/asmbf | c98a51d61724a46855de291a27d68a49a034810b | [
"MIT"
] | 67 | 2020-08-03T06:26:35.000Z | 2022-03-24T19:50:51.000Z | test/novm_movsem_tiny_sk.asm | pyautogui/asmbf | 37c54a8a62df2fc4bab28bdeb43237b4905cbecd | [
"MIT"
] | 55 | 2019-10-02T19:37:08.000Z | 2020-06-12T19:40:53.000Z | test/novm_movsem_tiny_sk.asm | pyautogui/asmbf | 37c54a8a62df2fc4bab28bdeb43237b4905cbecd | [
"MIT"
] | 9 | 2019-05-18T11:59:41.000Z | 2020-06-21T20:40:25.000Z |
stk 38
org 0
&heap
db 2
&changed
$(
function def_inline(ins)
print("@" .. ins .. "_i\n" .. ins .. " f2, f3\nret\n")
end
function inline(ins, arg1, arg2)
print("mov f2, " .. arg1 .. "\nmov f3, " .. arg2 .. "\n")
call(ins .. "_i")
end
function inline_r(ins, arg1, arg2)
print("mov f3, " .. arg2 .. "\n")
call(ins .. "_i")
print("mov " .. arg1 .. ", f2")
end
)
#call("read")
@loop
#call("eval")
$(inline_r("rcl", "r2", "*changed"))
mov f2, *changed
mov f3, 0
#call("sto_i")
^jnz r2, %loop
^push 0
@P
^push r2
add r1, 2
$(inline_r("rcl", "r2", "r1"))
sub r1, 2
jz r2, %PS
dec r2
jz r2, %PK
out .(
^mov r2, r1
$(inline_r("rcl", "r1", "r2"))
#call("P")
inc r2
$(inline_r("rcl", "r1", "r2"))
#call("P")
out .)
pop r2
ret
@PS
out .S
pop r2
ret
@PK
out .K
pop r2
ret
@A
mov f3, *heap
#call("rcl_i")
add f2, 2
^mov f3, r1
#call("sto_i")
inc f2
ots f2, *heap
sub f2, 3
^mov r1, f2
ret
@read
^push r2
in r2
ceq r2, .S
cjnz %RS
ceq r2, .K
cjnz %RK
mov r1, 2
#call("A")
mov r2, r1
#call("read")
$(inline("sto", "r2", "r1"))
#call("read")
inc r2
$(inline("sto", "r2", "r1"))
dec r2
^mov r1, r2
in r2
pop r2
ret
@RS
mov r1, 0
#call("A")
pop r2
ret
@RK
mov r1, 1
#call("A")
pop r2
ret
@eval
^push r2
^push r3
$(inline_r("rcl", "r2", "r1"))
jz r2, %skip
$(inline_r("rcl", "r3", "r2"))
jz r3, %skip
add r3, 2
$(inline_r("rcl", "r4", "r3"))
cne r4, 1
cjnz %skip
inc r2
$(inline_r("rcl", "r3", "r2"))
mov r1, r3
mov f2, *changed
mov f3, 1
#call("sto_i")
jmp %not_bi
@skip
$(inline_r("rcl", "r2", "r1"))
jz r2, %notS
$(inline_r("rcl", "r3", "r2"))
jz r3, %notS
$(inline_r("rcl", "r4", "r3"))
jz r4, %notS
add r4, 2
$(inline_r("rcl", "r2", "r4"))
jnz r2, %notS
inc r1
$(inline_r("rcl", "r6", "r1"))
dec r1
$(inline_r("rcl", "r2", "r1"))
$(inline_r("rcl", "r3", "r2"))
inc r2
inc r3
$(inline_r("rcl", "r5", "r2"))
$(inline_r("rcl", "r4", "r3"))
mov r1, 2
#call("A")
^mov r2, r1
mov r1, 2
#call("A")
$(inline("sto", "r2", "r1"))
$(inline("sto", "r1", "r4"))
inc r1
$(inline("sto", "r1", "r6"))
mov r1, 2
#call("A")
inc r2
$(inline("sto", "r2", "r1"))
dec r2
$(inline("sto", "r1", "r5"))
inc r1
$(inline("sto", "r1", "r6"))
mov r1, r2
mov f2, *changed
mov f3, 1
#call("sto_i")
jmp %not_bi
@notS
$(inline_r("rcl", "r2", "r1"))
cge r2, 2
cjz %not_bi
^mov r3, r1
$(inline_r("rcl", "r1", "r3"))
#call("eval")
$(inline("sto", "r3", "r1"))
inc r3
$(inline_r("rcl", "r1", "r3"))
#call("eval")
$(inline("sto", "r3", "r1"))
dec r3
^mov r1, r3
@not_bi
pop r3
pop r2
ret
#def_inline("sto")
#def_inline("rcl")
| 16.612022 | 65 | 0.453947 |
1b353ce248fd96dacd177561f2936a9766c34d7a | 1,681 | asm | Assembly | programs/oeis/286/A286927.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/286/A286927.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | programs/oeis/286/A286927.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | ; A286927: Positions of 1 in A286925; complement of A286926.
; 6,12,20,26,34,40,46,54,60,68,74,80,88,94,102,108,116,122,128,136,142,150,156,162,170,176,184,190,198,204,210,218,224,232,238,244,252,258,266,272,278,286,292,300,306,314,320,326,334,340,348,354,360,368,374,382,388,396,402,408,416,422,430,436,442,450,456,464,470,476,484,490,498,504,512,518,524,532,538,546,552,558,566,572,580,586,594,600,606,614,620,628,634,640,648,654,662,668,676,682,688,696,702,710,716,722,730,736,744,750,756,764,770,778,784,792,798,804,812,818,826,832,838,846,852,860,866,874,880,886,894,900,908,914,920,928,934,942,948,954,962,968,976,982,990,996,1002,1010,1016,1024,1030,1036,1044,1050,1058,1064,1072,1078,1084,1092,1098,1106,1112,1118,1126,1132,1140,1146,1154,1160,1166,1174,1180,1188,1194,1200,1208,1214,1222,1228,1234,1242,1248,1256,1262,1270,1276,1282,1290,1296,1304,1310,1316,1324,1330,1338,1344,1352,1358,1364,1372,1378,1386,1392,1398,1406,1412,1420,1426,1432,1440,1446,1454,1460,1468,1474,1480,1488,1494,1502,1508,1514,1522,1528,1536,1542,1550,1556,1562,1570,1576,1584,1590,1596,1604,1610,1618,1624,1630,1638,1644,1652,1658,1666,1672,1678,1686,1692,1700,1706
mov $2,$0
add $2,1
mov $5,$0
lpb $2
mov $0,$5
sub $2,1
sub $0,$2
mov $7,$0
mov $9,2
lpb $9
mov $0,$7
sub $9,1
add $0,$9
sub $0,1
mov $11,$0
add $0,1
add $6,$0
pow $0,2
mul $0,2
trn $3,$6
lpb $0
add $3,2
sub $0,$3
trn $0,1
lpe
mov $4,$3
mov $12,$11
mul $12,2
add $4,$12
mov $8,$9
lpb $8
sub $8,1
mov $10,$4
lpe
lpe
lpb $7
mov $7,0
sub $10,$4
lpe
mov $4,$10
trn $4,4
add $4,6
add $1,$4
lpe
| 35.020833 | 1,090 | 0.653778 |
6d5f29a53d89adc4fb7bd9ee37bbe1e29379c033 | 503 | asm | Assembly | programs/oeis/335/A335025.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/335/A335025.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/335/A335025.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A335025: Largest side lengths of almost-equilateral Heronian triangles.
; 5,15,53,195,725,2703,10085,37635,140453,524175,1956245,7300803,27246965,101687055,379501253,1416317955,5285770565,19726764303,73621286645,274758382275,1025412242453,3826890587535,14282150107685,53301709843203,198924689265125,742397047217295,2770663499604053
mov $1,8
mov $2,$0
mov $3,8
lpb $2,1
lpb $3,1
mov $0,4
sub $3,$3
lpe
add $0,$1
add $0,$1
add $1,$0
sub $2,1
lpe
sub $1,8
div $1,4
mul $1,2
add $1,5
| 23.952381 | 259 | 0.741551 |
1293ce60a5dea48c14a6bbbaba633fc23245a48b | 569 | asm | Assembly | programs/oeis/087/A087323.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/087/A087323.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/087/A087323.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A087323: a(n) = (n+1) * 2^n - 1.
; 0,3,11,31,79,191,447,1023,2303,5119,11263,24575,53247,114687,245759,524287,1114111,2359295,4980735,10485759,22020095,46137343,96468991,201326591,419430399,872415231,1811939327,3758096383,7784628223,16106127359,33285996543,68719476735,141733920767,292057776127,601295421439,1236950581247,2542620639231,5222680231935,10720238370815,21990232555519,45079976738815,92358976733183,189115999977471,387028092977151,791648371998719,1618481116086271,3307330976350207,6755399441055743
mov $1,$0
add $1,1
mov $2,2
pow $2,$0
mul $1,$2
sub $1,1
| 56.9 | 475 | 0.826011 |
0740dc70aafe42264b9f9cd275b96cbf54f990c6 | 845 | asm | Assembly | src/test/ref/loop-for-continue.asm | jbrandwood/kickc | d4b68806f84f8650d51b0e3ef254e40f38b0ffad | [
"MIT"
] | 2 | 2022-03-01T02:21:14.000Z | 2022-03-01T04:33:35.000Z | src/test/ref/loop-for-continue.asm | jbrandwood/kickc | d4b68806f84f8650d51b0e3ef254e40f38b0ffad | [
"MIT"
] | null | null | null | src/test/ref/loop-for-continue.asm | jbrandwood/kickc | d4b68806f84f8650d51b0e3ef254e40f38b0ffad | [
"MIT"
] | null | null | null | // Tests continue statement in a simple for()-loop
// Commodore 64 PRG executable file
.file [name="loop-for-continue.prg", type="prg", segments="Program"]
.segmentdef Program [segments="Basic, Code, Data"]
.segmentdef Basic [start=$0801]
.segmentdef Code [start=$80d]
.segmentdef Data [startAfter="Code"]
.segment Basic
:BasicUpstart(main)
.label SCREEN = $400
.segment Code
main: {
ldy #0
ldx #0
__b1:
// for( char i =0; MESSAGE[i]; i++)
lda MESSAGE,x
cmp #0
bne __b2
// }
rts
__b2:
// if(MESSAGE[i]==' ')
lda MESSAGE,x
cmp #' '
beq __b4
// SCREEN[idx++] = MESSAGE[i]
lda MESSAGE,x
sta SCREEN,y
// SCREEN[idx++] = MESSAGE[i];
iny
__b4:
// for( char i =0; MESSAGE[i]; i++)
inx
jmp __b1
}
.segment Data
MESSAGE: .text "hello brave new world!"
.byte 0
| 21.125 | 68 | 0.601183 |
3d6d6e3058259289c2ea30efe7640d5c9b0224c6 | 3,067 | asm | Assembly | gnutls/nettle/x86_64/aesni/aes-decrypt-internal.asm | TheShellLand/crossover-source | 247b5591f1b059b95553352adb56c45b775c0c24 | [
"MIT"
] | null | null | null | gnutls/nettle/x86_64/aesni/aes-decrypt-internal.asm | TheShellLand/crossover-source | 247b5591f1b059b95553352adb56c45b775c0c24 | [
"MIT"
] | null | null | null | gnutls/nettle/x86_64/aesni/aes-decrypt-internal.asm | TheShellLand/crossover-source | 247b5591f1b059b95553352adb56c45b775c0c24 | [
"MIT"
] | null | null | null | C x86_64/aesni/aes-decrypt-internal.asm
ifelse(<
Copyright (C) 2015, 2018 Niels Möller
This file is part of GNU Nettle.
GNU Nettle is free software: you can redistribute it and/or
modify it under the terms of either:
* the GNU Lesser General Public License as published by the Free
Software Foundation; either version 3 of the License, or (at your
option) any later version.
or
* the GNU General Public License as published by the Free
Software Foundation; either version 2 of the License, or (at your
option) any later version.
or both in parallel, as here.
GNU Nettle is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
General Public License for more details.
You should have received copies of the GNU General Public License and
the GNU Lesser General Public License along with this program. If
not, see http://www.gnu.org/licenses/.
>)
C Input argument
define(<ROUNDS>, <%rdi>)
define(<KEYS>, <%rsi>)
C define(<TABLE>, <%rdx>) C Unused here
define(<LENGTH>,<%rcx>)
define(<DST>, <%r8>)
define(<SRC>, <%r9>)
define(<KEY0>, <%xmm0>)
define(<KEY1>, <%xmm1>)
define(<KEY2>, <%xmm2>)
define(<KEY3>, <%xmm3>)
define(<KEY4>, <%xmm4>)
define(<KEY5>, <%xmm5>)
define(<KEY6>, <%xmm6>)
define(<KEY7>, <%xmm7>)
define(<KEY8>, <%xmm8>)
define(<KEY9>, <%xmm9>)
define(<KEY10>, <%xmm10>)
define(<KEY11>, <%xmm11>)
define(<KEY12>, <%xmm12>)
define(<KEY13>, <%xmm13>)
define(<KEYLAST>, <%xmm14>)
define(<BLOCK>, <%xmm15>)
.file "aes-decrypt-internal.asm"
C _aes_decrypt(unsigned rounds, const uint32_t *keys,
C const struct aes_table *T,
C size_t length, uint8_t *dst,
C uint8_t *src)
.text
ALIGN(16)
PROLOGUE(_nettle_aes_decrypt)
W64_ENTRY(6, 16)
shr $4, LENGTH
test LENGTH, LENGTH
jz .Lend
movups (KEYS), KEY0
movups 16(KEYS), KEY1
movups 32(KEYS), KEY2
movups 48(KEYS), KEY3
movups 64(KEYS), KEY4
movups 80(KEYS), KEY5
movups 96(KEYS), KEY6
movups 112(KEYS), KEY7
movups 128(KEYS), KEY8
movups 144(KEYS), KEY9
lea 160(KEYS), KEYS
sub $10, XREG(ROUNDS) C Also clears high half
je .Lkey_last
movups (KEYS), KEY10
movups 16(KEYS), KEY11
lea (KEYS, ROUNDS, 8), KEYS
lea (KEYS, ROUNDS, 8), KEYS
cmpl $2, XREG(ROUNDS)
je .Lkey_last
movups -32(KEYS), KEY12
movups -16(KEYS), KEY13
.Lkey_last:
movups (KEYS), KEYLAST
.Lblock_loop:
movups (SRC), BLOCK
pxor KEY0, BLOCK
aesdec KEY1, BLOCK
aesdec KEY2, BLOCK
aesdec KEY3, BLOCK
aesdec KEY4, BLOCK
aesdec KEY5, BLOCK
aesdec KEY6, BLOCK
aesdec KEY7, BLOCK
aesdec KEY8, BLOCK
aesdec KEY9, BLOCK
testl XREG(ROUNDS), XREG(ROUNDS)
je .Lblock_end
aesdec KEY10, BLOCK
aesdec KEY11, BLOCK
cmpl $2, XREG(ROUNDS)
je .Lblock_end
aesdec KEY12, BLOCK
aesdec KEY13, BLOCK
.Lblock_end:
aesdeclast KEYLAST, BLOCK
movups BLOCK, (DST)
add $16, SRC
add $16, DST
dec LENGTH
jnz .Lblock_loop
.Lend:
W64_EXIT(6, 16)
ret
EPILOGUE(_nettle_aes_decrypt)
| 22.718519 | 72 | 0.691555 |
7f7da320b2c8d6b4cf08178d6822ccb574723a57 | 373 | asm | Assembly | libsrc/_DEVELOPMENT/math/float/am9511/lam32/z80/asm_fabsf.asm | ahjelm/z88dk | c4de367f39a76b41f6390ceeab77737e148178fa | [
"ClArtistic"
] | 640 | 2017-01-14T23:33:45.000Z | 2022-03-30T11:28:42.000Z | libsrc/_DEVELOPMENT/math/float/am9511/lam32/z80/asm_fabsf.asm | C-Chads/z88dk | a4141a8e51205c6414b4ae3263b633c4265778e6 | [
"ClArtistic"
] | 1,600 | 2017-01-15T16:12:02.000Z | 2022-03-31T12:11:12.000Z | libsrc/_DEVELOPMENT/math/float/am9511/lam32/z80/asm_fabsf.asm | C-Chads/z88dk | a4141a8e51205c6414b4ae3263b633c4265778e6 | [
"ClArtistic"
] | 215 | 2017-01-17T10:43:03.000Z | 2022-03-23T17:25:02.000Z |
; float _fabsf (float number) __z88dk_fastcall
SECTION code_clib
SECTION code_fp_am9511
PUBLIC asm_fabsf
EXTERN asm_am9511_fabs_fastcall
; Takes the absolute value of a float
;
; enter : stack = ret
; DEHL = sccz80_float number
;
; exit : DEHL = |sccz80_float|
;
; uses : de, hl
defc asm_fabsf = asm_am9511_fabs_fastcall
| 17.761905 | 46 | 0.66756 |
a3caf3c7faaaa407d18c376174b2c9b19870441f | 551 | asm | Assembly | test/14_arx.asm | x86128/pymesm | 4f5f2fe9ae06fd7023ef1022040774e157fd0792 | [
"MIT"
] | 2 | 2021-04-30T19:30:58.000Z | 2021-04-30T21:29:44.000Z | test/14_arx.asm | x86128/pymesm | 4f5f2fe9ae06fd7023ef1022040774e157fd0792 | [
"MIT"
] | null | null | null | test/14_arx.asm | x86128/pymesm | 4f5f2fe9ae06fd7023ef1022040774e157fd0792 | [
"MIT"
] | null | null | null | #
# Test for ARX instruction.
#
org 1
lbl start
xta i11
arx i1
aex i12
uia fail
xta cful
arx i1
aex i1
uia fail
xta cful
arx cful
aex cful
uia fail
lbl pass
stop 0o12345,6
lbl fail
stop 0o76543,2
#-------------------------
dorg 0o2000 # данные с адреса 2000
arr cful 0o7777777777777777
arr i1 0o1
arr i11 0o11
arr i12 0o12
| 19.678571 | 48 | 0.411978 |
d4ec6e871c3ccd6ec0a339ed9e21d10c2c1fcd54 | 526 | asm | Assembly | HW3/ChristianWebber-HW3-1.asm | vonderborch/CS260 | ff435317be557c10f131f99184e944ef2ada7cdf | [
"MIT"
] | null | null | null | HW3/ChristianWebber-HW3-1.asm | vonderborch/CS260 | ff435317be557c10f131f99184e944ef2ada7cdf | [
"MIT"
] | null | null | null | HW3/ChristianWebber-HW3-1.asm | vonderborch/CS260 | ff435317be557c10f131f99184e944ef2ada7cdf | [
"MIT"
] | null | null | null | .text
.globl MAIN
MAIN:
#set n
li $a0, 3
# clear v1
li $v1, 0
#call fib
jal FIB
#exit program
li $v0, 10
syscall
FIB:
#if n!=0 then goto FIBMAIN end
bne $a0, $zero, FIBMAIN
#else add 1 to v1 and return
addi $v1, $zero, 1
jr $ra
FIBMAIN:
#setup stack
addi $sp, $sp, -12
sw $ra, 0 ($sp)
sw $a0, 4 ($sp)
#calculate n-1
addi $a0, $a0, -1
jal FIB
#multiply n by 2 and add 1
mul $v1, $v1, 2
addi $v1, $v1, 1
#load return address and pop stack
lw $ra, 0 ($sp)
addi $sp, $sp, 12
#return
jr $ra | 13.15 | 35 | 0.589354 |
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