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|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
e7ab99ca8656cd15d94edea1c9b3bc3ab6ed97e2 | 452 | asm | Assembly | programs/oeis/262/A262685.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/262/A262685.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/262/A262685.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A262685: Least monotonic left inverse for A182859.
; 1,2,2,3,3,3,3,3,4,4,4,5,5,5,5,6,6,7,7,8,8,8,8,9,10,10,10,11,11,12,12,13,13,13,13,13,13,13,13,14,14,15,15,16,17,17,17,18,19,20,20,21,21,22,22,23,23,23,23,23,23,23,24,25,25,26,26,27,27,28,28,28,28,28,29,30,30,31,31,32,33,33,33,33,33,33,33,34,34,34,34,35,35,35,35,35,35,36,37,37
lpb $0
mov $2,$0
sub $0,1
seq $2,262683 ; Characteristic function for A182859.
add $1,$2
lpe
add $1,1
mov $0,$1
| 37.666667 | 277 | 0.646018 |
8877d93e2ba181c9d3d908408084e576e74547d9 | 79,032 | asm | Assembly | src/camera/pixy/src/misc/gcc/m0/Release/rls_m0.asm | wowHollis/SmartCart | f377f34fc452f90866e9d4c8a4e031314e633adb | [
"MIT"
] | null | null | null | src/camera/pixy/src/misc/gcc/m0/Release/rls_m0.asm | wowHollis/SmartCart | f377f34fc452f90866e9d4c8a4e031314e633adb | [
"MIT"
] | null | null | null | src/camera/pixy/src/misc/gcc/m0/Release/rls_m0.asm | wowHollis/SmartCart | f377f34fc452f90866e9d4c8a4e031314e633adb | [
"MIT"
] | null | null | null | 1 .syntax unified
2 .cpu cortex-m0
3 .fpu softvfp
4 .eabi_attribute 20, 1
5 .eabi_attribute 21, 1
6 .eabi_attribute 23, 3
7 .eabi_attribute 24, 1
8 .eabi_attribute 25, 1
9 .eabi_attribute 26, 1
10 .eabi_attribute 30, 6
11 .eabi_attribute 34, 0
12 .eabi_attribute 18, 4
13 .thumb
14 .syntax unified
15 .file "rls_m0.c"
16 .text
17 .Ltext0:
18 .cfi_sections .debug_frame
19 .global g_logLut
20 .section .bss.g_logLut,"aw",%nobits
21 .align 2
24 g_logLut:
25 0000 00000000 .space 4
26 .section .text.lineProcessedRL0A,"ax",%progbits
27 .align 2
28 .global lineProcessedRL0A
29 .code 16
30 .thumb_func
32 lineProcessedRL0A:
33 .LFB32:
34 .file 1 "../src/rls_m0.c"
1:../src/rls_m0.c **** //
2:../src/rls_m0.c **** // begin license header
3:../src/rls_m0.c **** //
4:../src/rls_m0.c **** // This file is part of Pixy CMUcam5 or "Pixy" for short
5:../src/rls_m0.c **** //
6:../src/rls_m0.c **** // All Pixy source code is provided under the terms of the
7:../src/rls_m0.c **** // GNU General Public License v2 (http://www.gnu.org/licenses/gpl-2.0.html).
8:../src/rls_m0.c **** // Those wishing to use Pixy source code, software and/or
9:../src/rls_m0.c **** // technologies under different licensing terms should contact us at
10:../src/rls_m0.c **** // cmucam@cs.cmu.edu. Such licensing terms are available for
11:../src/rls_m0.c **** // all portions of the Pixy codebase presented here.
12:../src/rls_m0.c **** //
13:../src/rls_m0.c **** // end license header
14:../src/rls_m0.c **** //
15:../src/rls_m0.c ****
16:../src/rls_m0.c **** #include "rls_m0.h"
17:../src/rls_m0.c **** #include "frame_m0.h"
18:../src/rls_m0.c **** #include "chirp.h"
19:../src/rls_m0.c **** #include "qqueue.h"
20:../src/rls_m0.c ****
21:../src/rls_m0.c ****
22:../src/rls_m0.c **** //#define RLTEST
23:../src/rls_m0.c **** #define MAX_QVALS_PER_LINE CAM_RES2_WIDTH/5 // width/5 because that's the worst case with noise f
24:../src/rls_m0.c ****
25:../src/rls_m0.c **** uint8_t *g_logLut = NULL;
26:../src/rls_m0.c ****
27:../src/rls_m0.c **** #if 0 // this is the old method, might have use down the road....
28:../src/rls_m0.c **** // assemble blue-green words to look like this
29:../src/rls_m0.c **** // 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
30:../src/rls_m0.c **** // B B B B B G G G G G
31:../src/rls_m0.c **** __asm void lineProcessedRL0(uint32_t *gpio, uint16_t *memory, uint32_t width)
32:../src/rls_m0.c **** {
33:../src/rls_m0.c **** PRESERVE8
34:../src/rls_m0.c **** IMPORT callSyncM1
35:../src/rls_m0.c ****
36:../src/rls_m0.c **** PUSH {r4-r5, lr}
37:../src/rls_m0.c ****
38:../src/rls_m0.c **** // add width to memory pointer so we can compare
39:../src/rls_m0.c **** ADDS r2, r1
40:../src/rls_m0.c **** // generate hsync bit
41:../src/rls_m0.c **** MOVS r5, #0x1
42:../src/rls_m0.c **** LSLS r5, #11
43:../src/rls_m0.c ****
44:../src/rls_m0.c **** PUSH {r0-r3} // save args
45:../src/rls_m0.c **** BL.W callSyncM1 // get pixel sync
46:../src/rls_m0.c **** POP {r0-r3} // restore args
47:../src/rls_m0.c ****
48:../src/rls_m0.c **** // pixel sync starts here
49:../src/rls_m0.c ****
50:../src/rls_m0.c **** // wait for hsync to go high
51:../src/rls_m0.c **** dest10 LDR r3, [r0] // 2
52:../src/rls_m0.c **** TST r3, r5 // 1
53:../src/rls_m0.c **** BEQ dest10 // 3
54:../src/rls_m0.c ****
55:../src/rls_m0.c **** // variable delay --- get correct phase for sampling
56:../src/rls_m0.c **** asm("NOP");
57:../src/rls_m0.c **** asm("NOP");
58:../src/rls_m0.c ****
59:../src/rls_m0.c **** #if 0
60:../src/rls_m0.c **** loop5
61:../src/rls_m0.c **** LDRB r3, [r0]
62:../src/rls_m0.c **** STRB r3, [r1]
63:../src/rls_m0.c **** asm("NOP");
64:../src/rls_m0.c **** asm("NOP");
65:../src/rls_m0.c **** asm("NOP");
66:../src/rls_m0.c **** ADDS r1, #0x01
67:../src/rls_m0.c **** CMP r1, r2
68:../src/rls_m0.c **** BLT loop5
69:../src/rls_m0.c **** #else
70:../src/rls_m0.c **** loop5
71:../src/rls_m0.c **** LDRB r3, [r0] // blue
72:../src/rls_m0.c **** LSRS r3, #3
73:../src/rls_m0.c **** LSLS r3, #10
74:../src/rls_m0.c **** asm("NOP");
75:../src/rls_m0.c **** asm("NOP");
76:../src/rls_m0.c **** asm("NOP");
77:../src/rls_m0.c **** asm("NOP");
78:../src/rls_m0.c **** asm("NOP");
79:../src/rls_m0.c **** asm("NOP");
80:../src/rls_m0.c **** asm("NOP");
81:../src/rls_m0.c **** asm("NOP");
82:../src/rls_m0.c ****
83:../src/rls_m0.c **** LDRB r4, [r0] // green
84:../src/rls_m0.c **** LSRS r4, #3
85:../src/rls_m0.c **** LSLS r4, #5
86:../src/rls_m0.c **** ORRS r3, r4
87:../src/rls_m0.c **** STRH r3, [r1] // store blue/green
88:../src/rls_m0.c **** ADDS r1, #0x02
89:../src/rls_m0.c **** CMP r1, r2
90:../src/rls_m0.c **** BLT loop5
91:../src/rls_m0.c ****
92:../src/rls_m0.c **** #endif
93:../src/rls_m0.c **** // wait for hsync to go low (end of line)
94:../src/rls_m0.c **** dest11 LDR r3, [r0] // 2
95:../src/rls_m0.c **** TST r3, r5 // 1
96:../src/rls_m0.c **** BNE dest11 // 3
97:../src/rls_m0.c ****
98:../src/rls_m0.c **** POP {r4-r5, pc}
99:../src/rls_m0.c **** }
100:../src/rls_m0.c ****
101:../src/rls_m0.c **** __asm uint16_t *lineProcessedRL1(uint32_t *gpio, uint16_t *memory, uint8_t *lut, uint16_t *linestor
102:../src/rls_m0.c **** {
103:../src/rls_m0.c **** // r0: gpio
104:../src/rls_m0.c **** // r1: q memory
105:../src/rls_m0.c **** // r2: lut
106:../src/rls_m0.c **** // r3: prev line
107:../src/rls_m0.c **** // r4: col
108:../src/rls_m0.c **** // r5: scratch
109:../src/rls_m0.c **** // r6: scratch
110:../src/rls_m0.c **** // r7: prev m val
111:../src/rls_m0.c **** PRESERVE8
112:../src/rls_m0.c **** IMPORT callSyncM1
113:../src/rls_m0.c ****
114:../src/rls_m0.c **** PUSH {r4-r7, lr}
115:../src/rls_m0.c **** LDR r4, [sp, #0x14]
116:../src/rls_m0.c ****
117:../src/rls_m0.c **** // add width to memory pointer so we can compare
118:../src/rls_m0.c **** ADDS r4, r3
119:../src/rls_m0.c **** MOV r8, r4
120:../src/rls_m0.c **** // generate hsync bit
121:../src/rls_m0.c **** MOVS r5, #0x1
122:../src/rls_m0.c **** LSLS r5, #11
123:../src/rls_m0.c ****
124:../src/rls_m0.c **** PUSH {r0-r3} // save args
125:../src/rls_m0.c **** BL.W callSyncM1 // get pixel sync
126:../src/rls_m0.c **** POP {r0-r3} // restore args
127:../src/rls_m0.c ****
128:../src/rls_m0.c **** // pixel sync starts here
129:../src/rls_m0.c ****
130:../src/rls_m0.c **** // wait for hsync to go high
131:../src/rls_m0.c **** dest12 LDR r6, [r0] // 2
132:../src/rls_m0.c **** TST r6, r5 // 1
133:../src/rls_m0.c **** BEQ dest12 // 3
134:../src/rls_m0.c ****
135:../src/rls_m0.c **** // variable delay --- get correct phase for sampling
136:../src/rls_m0.c **** asm("NOP");
137:../src/rls_m0.c **** //(borrow asm("NOP"); below)
138:../src/rls_m0.c **** // skip green pixel
139:../src/rls_m0.c **** MOVS r5, #0x00 // clear r5 (which will be copied to r7) This will force a write of a q val
140:../src/rls_m0.c **** MOVS r4, #0x00 // clear col (col is numbered 1 to 320)
141:../src/rls_m0.c **** // 2
142:../src/rls_m0.c **** loop6 MOV r7, r5 // copy lut val (lutPrev)
143:../src/rls_m0.c **** MOV r5, r8
144:../src/rls_m0.c **** CMP r3, r5
145:../src/rls_m0.c **** BGE dest30
146:../src/rls_m0.c **** asm("NOP");
147:../src/rls_m0.c **** asm("NOP");
148:../src/rls_m0.c **** asm("NOP");
149:../src/rls_m0.c **** asm("NOP");
150:../src/rls_m0.c **** asm("NOP");
151:../src/rls_m0.c **** // 9
152:../src/rls_m0.c **** loop7
153:../src/rls_m0.c **** LDRH r5, [r3] // load blue green val
154:../src/rls_m0.c **** // 2
155:../src/rls_m0.c **** LDRB r6, [r0] // load red pixel
156:../src/rls_m0.c **** LSRS r6, #3 // shift into place (5 bits of red)
157:../src/rls_m0.c **** ORRS r5, r6 // form 15-bit lut index
158:../src/rls_m0.c **** ADDS r3, #0x02 // inc prev line pointer
159:../src/rls_m0.c **** ADDS r4, #0x01 // inc col
160:../src/rls_m0.c **** asm("NOP");
161:../src/rls_m0.c **** LDRB r5, [r2, r5] // load lut val
162:../src/rls_m0.c **** EORS r7, r5 // compare with previous lut val
163:../src/rls_m0.c **** // 10
164:../src/rls_m0.c **** BEQ loop6 // if lut vals have haven't changed proceed (else store q val)
165:../src/rls_m0.c **** // 1, 3
166:../src/rls_m0.c **** // calc, store q val
167:../src/rls_m0.c **** LSLS r5, #0x09
168:../src/rls_m0.c **** ORRS r5, r4 // make q val
169:../src/rls_m0.c **** STRH r5, [r1] // write q val
170:../src/rls_m0.c **** ADDS r1, #0x02 // inc q mem
171:../src/rls_m0.c **** MOV r7, r5 // copy lut val (qPrev)
172:../src/rls_m0.c **** // 6
173:../src/rls_m0.c ****
174:../src/rls_m0.c **** MOV r5, r8 // bring in end of row compare val
175:../src/rls_m0.c **** CMP r3, r5
176:../src/rls_m0.c **** BLT loop7
177:../src/rls_m0.c **** // 5
178:../src/rls_m0.c **** dest30
179:../src/rls_m0.c **** MOVS r5, #0x1
180:../src/rls_m0.c **** LSLS r5, #11
181:../src/rls_m0.c **** dest20 LDR r6, [r0] // 2
182:../src/rls_m0.c **** TST r6, r5 // 1
183:../src/rls_m0.c **** BNE dest20 // 3
184:../src/rls_m0.c ****
185:../src/rls_m0.c **** MOV r0, r1 // move result
186:../src/rls_m0.c **** POP {r4-r7, pc}
187:../src/rls_m0.c **** }
188:../src/rls_m0.c **** #endif
189:../src/rls_m0.c ****
190:../src/rls_m0.c **** void lineProcessedRL0A(uint32_t *gpio, uint8_t *memory, uint32_t width) // width in bytes
191:../src/rls_m0.c **** {
35 .loc 1 191 0
36 .cfi_startproc
37 0000 80B5 push {r7, lr}
38 .cfi_def_cfa_offset 8
39 .cfi_offset 7, -8
40 .cfi_offset 14, -4
41 0002 84B0 sub sp, sp, #16
42 .cfi_def_cfa_offset 24
43 0004 00AF add r7, sp, #0
44 .cfi_def_cfa_register 7
45 0006 F860 str r0, [r7, #12]
46 0008 B960 str r1, [r7, #8]
47 000a 7A60 str r2, [r7, #4]
192:../src/rls_m0.c **** // PRESERVE8
193:../src/rls_m0.c ****
194:../src/rls_m0.c **** asm(".syntax unified");
48 .loc 1 194 0
49 .syntax divided
50 @ 194 "../src/rls_m0.c" 1
51 .syntax unified
52 @ 0 "" 2
195:../src/rls_m0.c ****
196:../src/rls_m0.c **** asm("PUSH {r4-r5}");
53 .loc 1 196 0
54 @ 196 "../src/rls_m0.c" 1
55 000c 30B4 PUSH {r4-r5}
56 @ 0 "" 2
197:../src/rls_m0.c ****
198:../src/rls_m0.c **** // add width to memory pointer so we can compare
199:../src/rls_m0.c **** asm("ADDS r2, r1");
57 .loc 1 199 0
58 @ 199 "../src/rls_m0.c" 1
59 000e 5218 ADDS r2, r1
60 @ 0 "" 2
200:../src/rls_m0.c **** // generate hsync bit
201:../src/rls_m0.c **** asm("MOVS r5, #0x1");
61 .loc 1 201 0
62 @ 201 "../src/rls_m0.c" 1
63 0010 0125 MOVS r5, #0x1
64 @ 0 "" 2
202:../src/rls_m0.c **** asm("LSLS r5, #11");
65 .loc 1 202 0
66 @ 202 "../src/rls_m0.c" 1
67 0012 ED02 LSLS r5, #11
68 @ 0 "" 2
203:../src/rls_m0.c ****
204:../src/rls_m0.c **** asm("PUSH {r0-r3}"); // save args
69 .loc 1 204 0
70 @ 204 "../src/rls_m0.c" 1
71 0014 0FB4 PUSH {r0-r3}
72 @ 0 "" 2
205:../src/rls_m0.c **** asm("BL.W callSyncM1"); // get pixel sync
73 .loc 1 205 0
74 @ 205 "../src/rls_m0.c" 1
75 0016 FFF7FEFF BL.W callSyncM1
76 @ 0 "" 2
206:../src/rls_m0.c **** asm("POP {r0-r3}"); // restore args
77 .loc 1 206 0
78 @ 206 "../src/rls_m0.c" 1
79 001a 0FBC POP {r0-r3}
80 @ 0 "" 2
207:../src/rls_m0.c ****
208:../src/rls_m0.c **** // pixel sync starts here
209:../src/rls_m0.c ****
210:../src/rls_m0.c **** // wait for hsync to go high
211:../src/rls_m0.c **** asm("dest10A:");
81 .loc 1 211 0
82 @ 211 "../src/rls_m0.c" 1
83 dest10A:
84 @ 0 "" 2
212:../src/rls_m0.c **** asm("LDR r3, [r0]"); // 2
85 .loc 1 212 0
86 @ 212 "../src/rls_m0.c" 1
87 001c 0368 LDR r3, [r0]
88 @ 0 "" 2
213:../src/rls_m0.c **** asm("TST r3, r5"); // 1
89 .loc 1 213 0
90 @ 213 "../src/rls_m0.c" 1
91 001e 2B42 TST r3, r5
92 @ 0 "" 2
214:../src/rls_m0.c **** asm("BEQ dest10A"); // 3
93 .loc 1 214 0
94 @ 214 "../src/rls_m0.c" 1
95 0020 FCD0 BEQ dest10A
96 @ 0 "" 2
215:../src/rls_m0.c ****
216:../src/rls_m0.c **** // variable delay --- get correct phase for sampling
217:../src/rls_m0.c **** asm("NOP");
97 .loc 1 217 0
98 @ 217 "../src/rls_m0.c" 1
99 0022 C046 NOP
100 @ 0 "" 2
218:../src/rls_m0.c **** asm("NOP");
101 .loc 1 218 0
102 @ 218 "../src/rls_m0.c" 1
103 0024 C046 NOP
104 @ 0 "" 2
219:../src/rls_m0.c ****
220:../src/rls_m0.c **** asm("loop5A:");
105 .loc 1 220 0
106 @ 220 "../src/rls_m0.c" 1
107 loop5A:
108 @ 0 "" 2
221:../src/rls_m0.c **** asm("LDRB r3, [r0]"); // blue
109 .loc 1 221 0
110 @ 221 "../src/rls_m0.c" 1
111 0026 0378 LDRB r3, [r0]
112 @ 0 "" 2
222:../src/rls_m0.c **** // cycle
223:../src/rls_m0.c **** asm("NOP");
113 .loc 1 223 0
114 @ 223 "../src/rls_m0.c" 1
115 0028 C046 NOP
116 @ 0 "" 2
224:../src/rls_m0.c **** asm("NOP");
117 .loc 1 224 0
118 @ 224 "../src/rls_m0.c" 1
119 002a C046 NOP
120 @ 0 "" 2
225:../src/rls_m0.c **** asm("NOP");
121 .loc 1 225 0
122 @ 225 "../src/rls_m0.c" 1
123 002c C046 NOP
124 @ 0 "" 2
226:../src/rls_m0.c **** asm("NOP");
125 .loc 1 226 0
126 @ 226 "../src/rls_m0.c" 1
127 002e C046 NOP
128 @ 0 "" 2
227:../src/rls_m0.c **** asm("NOP");
129 .loc 1 227 0
130 @ 227 "../src/rls_m0.c" 1
131 0030 C046 NOP
132 @ 0 "" 2
228:../src/rls_m0.c **** asm("NOP");
133 .loc 1 228 0
134 @ 228 "../src/rls_m0.c" 1
135 0032 C046 NOP
136 @ 0 "" 2
229:../src/rls_m0.c **** asm("NOP");
137 .loc 1 229 0
138 @ 229 "../src/rls_m0.c" 1
139 0034 C046 NOP
140 @ 0 "" 2
230:../src/rls_m0.c **** asm("NOP");
141 .loc 1 230 0
142 @ 230 "../src/rls_m0.c" 1
143 0036 C046 NOP
144 @ 0 "" 2
231:../src/rls_m0.c **** asm("NOP");
145 .loc 1 231 0
146 @ 231 "../src/rls_m0.c" 1
147 0038 C046 NOP
148 @ 0 "" 2
232:../src/rls_m0.c **** asm("NOP");
149 .loc 1 232 0
150 @ 232 "../src/rls_m0.c" 1
151 003a C046 NOP
152 @ 0 "" 2
233:../src/rls_m0.c ****
234:../src/rls_m0.c **** asm("LDRB r4, [r0]"); // green
153 .loc 1 234 0
154 @ 234 "../src/rls_m0.c" 1
155 003c 0478 LDRB r4, [r0]
156 @ 0 "" 2
235:../src/rls_m0.c **** // cycle
236:../src/rls_m0.c **** asm("SUBS r3, r4"); // blue-green
157 .loc 1 236 0
158 @ 236 "../src/rls_m0.c" 1
159 003e 1B1B SUBS r3, r4
160 @ 0 "" 2
237:../src/rls_m0.c **** asm("ASRS r3, #1");
161 .loc 1 237 0
162 @ 237 "../src/rls_m0.c" 1
163 0040 5B10 ASRS r3, #1
164 @ 0 "" 2
238:../src/rls_m0.c **** asm("STRB r3, [r1]"); // store blue-green
165 .loc 1 238 0
166 @ 238 "../src/rls_m0.c" 1
167 0042 0B70 STRB r3, [r1]
168 @ 0 "" 2
239:../src/rls_m0.c **** // cycle
240:../src/rls_m0.c **** asm("ADDS r1, #0x01");
169 .loc 1 240 0
170 @ 240 "../src/rls_m0.c" 1
171 0044 0131 ADDS r1, #0x01
172 @ 0 "" 2
241:../src/rls_m0.c **** asm("CMP r1, r2");
173 .loc 1 241 0
174 @ 241 "../src/rls_m0.c" 1
175 0046 9142 CMP r1, r2
176 @ 0 "" 2
242:../src/rls_m0.c **** asm("NOP");
177 .loc 1 242 0
178 @ 242 "../src/rls_m0.c" 1
179 0048 C046 NOP
180 @ 0 "" 2
243:../src/rls_m0.c **** asm("BLT loop5A");
181 .loc 1 243 0
182 @ 243 "../src/rls_m0.c" 1
183 004a ECDB BLT loop5A
184 @ 0 "" 2
244:../src/rls_m0.c ****
245:../src/rls_m0.c **** // wait for hsync to go low (end of line)
246:../src/rls_m0.c **** asm("dest11A:");
185 .loc 1 246 0
186 @ 246 "../src/rls_m0.c" 1
187 dest11A:
188 @ 0 "" 2
247:../src/rls_m0.c **** asm("LDR r3, [r0]"); // 2
189 .loc 1 247 0
190 @ 247 "../src/rls_m0.c" 1
191 004c 0368 LDR r3, [r0]
192 @ 0 "" 2
248:../src/rls_m0.c **** asm("TST r3, r5"); // 1
193 .loc 1 248 0
194 @ 248 "../src/rls_m0.c" 1
195 004e 2B42 TST r3, r5
196 @ 0 "" 2
249:../src/rls_m0.c **** asm("BNE dest11A"); // 3
197 .loc 1 249 0
198 @ 249 "../src/rls_m0.c" 1
199 0050 FCD1 BNE dest11A
200 @ 0 "" 2
250:../src/rls_m0.c ****
251:../src/rls_m0.c **** asm("POP {r4-r5}");
201 .loc 1 251 0
202 @ 251 "../src/rls_m0.c" 1
203 0052 30BC POP {r4-r5}
204 @ 0 "" 2
252:../src/rls_m0.c ****
253:../src/rls_m0.c **** asm(".syntax divided");
205 .loc 1 253 0
206 @ 253 "../src/rls_m0.c" 1
207 .syntax divided
208 @ 0 "" 2
254:../src/rls_m0.c **** }
209 .loc 1 254 0
210 .thumb
211 .syntax unified
212 0054 C046 nop
213 0056 BD46 mov sp, r7
214 0058 04B0 add sp, sp, #16
215 @ sp needed
216 005a 80BD pop {r7, pc}
217 .cfi_endproc
218 .LFE32:
220 .section .text.lineProcessedRL1A,"ax",%progbits
221 .align 2
222 .global lineProcessedRL1A
223 .code 16
224 .thumb_func
226 lineProcessedRL1A:
227 .LFB33:
255:../src/rls_m0.c ****
256:../src/rls_m0.c ****
257:../src/rls_m0.c **** uint32_t lineProcessedRL1A(uint32_t *gpio, Qval *memory, uint8_t *lut, uint8_t *linestore, uint32_t
258:../src/rls_m0.c **** Qval *qqMem, uint32_t qqIndex, uint32_t qqSize) // width in bytes
259:../src/rls_m0.c **** {
228 .loc 1 259 0
229 .cfi_startproc
230 0000 80B5 push {r7, lr}
231 .cfi_def_cfa_offset 8
232 .cfi_offset 7, -8
233 .cfi_offset 14, -4
234 0002 84B0 sub sp, sp, #16
235 .cfi_def_cfa_offset 24
236 0004 00AF add r7, sp, #0
237 .cfi_def_cfa_register 7
238 0006 F860 str r0, [r7, #12]
239 0008 B960 str r1, [r7, #8]
240 000a 7A60 str r2, [r7, #4]
241 000c 3B60 str r3, [r7]
260:../src/rls_m0.c **** // The code below does the following---
261:../src/rls_m0.c **** // -- maintain pixel sync, read red and green pixels
262:../src/rls_m0.c **** // -- create r-g, b-g index and look up value in lut
263:../src/rls_m0.c **** // -- filter out noise within the line. An on pixel surrounded by off pixels will be ignored.
264:../src/rls_m0.c **** // An off pixel surrounded by on pixels will be ignored.
265:../src/rls_m0.c **** // -- generate hue line sum and pseudo average
266:../src/rls_m0.c **** // -- generate run-length segments
267:../src/rls_m0.c **** //
268:../src/rls_m0.c **** // Notes:
269:../src/rls_m0.c **** // Run-length segments are 1 pixel larger than actual, and the last hue line value is added twice i
270:../src/rls_m0.c **** // Spurious noise pixels within a run-length segment present a problem. When this happens the last
271:../src/rls_m0.c **** // is added to the sum to keep things unbiased. ie, think of the case where a run-length consists
272:../src/rls_m0.c **** // spurious noise pixels. We don't want the noise to affect the average--- only the pixels that ag
273:../src/rls_m0.c **** // the model number for that run-length.
274:../src/rls_m0.c **** // All pixels are read and used--- the opponent color space (r-g, b-g) works well with the bayer pa
275:../src/rls_m0.c **** // After the red pixel is read, about 12 cycles are used to create the index and look it up. When
276:../src/rls_m0.c **** // created and written it takes about 24 cycles, so a green/red pixel pair is skipped, but the gree
277:../src/rls_m0.c **** // grabbed and put in r5 so that it can be used when we resume.
278:../src/rls_m0.c **** // A shift lut is provided-- it's 321 entries containing the log2 of the index, so it's basically a
279:../src/rls_m0.c **** // that helps us fit the hue line sum in the q value. This value indicates how many bits to shift
280:../src/rls_m0.c **** // the right to reduce the size of the sum. That number is also stored in the q val so that it can
281:../src/rls_m0.c **** // reversed on the m4 side and a real division can take place.
282:../src/rls_m0.c **** //
283:../src/rls_m0.c **** // r0: gpio register
284:../src/rls_m0.c **** // r1: scratch
285:../src/rls_m0.c **** // r2: lut
286:../src/rls_m0.c **** // r3: prev line
287:../src/rls_m0.c **** // r4: column
288:../src/rls_m0.c **** // r5: scratch
289:../src/rls_m0.c **** // r6: scratch
290:../src/rls_m0.c **** // r7: prev model
291:../src/rls_m0.c **** // r8: sum
292:../src/rls_m0.c **** // r9: ending column
293:../src/rls_m0.c **** // r10: beginning column of run-length
294:../src/rls_m0.c **** // r11: last lut val
295:../src/rls_m0.c **** // r12: q memory
296:../src/rls_m0.c ****
297:../src/rls_m0.c **** // PRESERVE8
298:../src/rls_m0.c ****
299:../src/rls_m0.c **** asm(".syntax unified");
242 .loc 1 299 0
243 .syntax divided
244 @ 299 "../src/rls_m0.c" 1
245 .syntax unified
246 @ 0 "" 2
300:../src/rls_m0.c **** asm("PUSH {r1-r7}");
247 .loc 1 300 0
248 @ 300 "../src/rls_m0.c" 1
249 000e FEB4 PUSH {r1-r7}
250 @ 0 "" 2
301:../src/rls_m0.c **** // bring in ending column
302:../src/rls_m0.c **** asm("LDR r4, [sp, #0x20]");
251 .loc 1 302 0
252 @ 302 "../src/rls_m0.c" 1
253 0010 089C LDR r4, [sp, #0x20]
254 @ 0 "" 2
303:../src/rls_m0.c **** asm("MOV r9, r4");
255 .loc 1 303 0
256 @ 303 "../src/rls_m0.c" 1
257 0012 A146 MOV r9, r4
258 @ 0 "" 2
304:../src/rls_m0.c **** asm("MOVS r5, #0x1");
259 .loc 1 304 0
260 @ 304 "../src/rls_m0.c" 1
261 0014 0125 MOVS r5, #0x1
262 @ 0 "" 2
305:../src/rls_m0.c **** asm("LSLS r5, #11");
263 .loc 1 305 0
264 @ 305 "../src/rls_m0.c" 1
265 0016 ED02 LSLS r5, #11
266 @ 0 "" 2
306:../src/rls_m0.c ****
307:../src/rls_m0.c **** asm("PUSH {r0-r3}"); // save args
267 .loc 1 307 0
268 @ 307 "../src/rls_m0.c" 1
269 0018 0FB4 PUSH {r0-r3}
270 @ 0 "" 2
308:../src/rls_m0.c **** asm("BL.W callSyncM1"); // get pixel sync
271 .loc 1 308 0
272 @ 308 "../src/rls_m0.c" 1
273 001a FFF7FEFF BL.W callSyncM1
274 @ 0 "" 2
309:../src/rls_m0.c **** asm("POP {r0-r3}"); // restore args
275 .loc 1 309 0
276 @ 309 "../src/rls_m0.c" 1
277 001e 0FBC POP {r0-r3}
278 @ 0 "" 2
310:../src/rls_m0.c ****
311:../src/rls_m0.c **** // pixel sync starts here
312:../src/rls_m0.c ****
313:../src/rls_m0.c **** // wait for hsync to go high
314:../src/rls_m0.c **** asm("dest12A:");
279 .loc 1 314 0
280 @ 314 "../src/rls_m0.c" 1
281 dest12A:
282 @ 0 "" 2
315:../src/rls_m0.c **** asm("LDR r6, [r0]"); // 2
283 .loc 1 315 0
284 @ 315 "../src/rls_m0.c" 1
285 0020 0668 LDR r6, [r0]
286 @ 0 "" 2
316:../src/rls_m0.c **** asm("TST r6, r5"); // 1
287 .loc 1 316 0
288 @ 316 "../src/rls_m0.c" 1
289 0022 2E42 TST r6, r5
290 @ 0 "" 2
317:../src/rls_m0.c **** asm("BEQ dest12A"); // 3
291 .loc 1 317 0
292 @ 317 "../src/rls_m0.c" 1
293 0024 FCD0 BEQ dest12A
294 @ 0 "" 2
318:../src/rls_m0.c ****
319:../src/rls_m0.c **** // variable delay --- get correct phase for sampling
320:../src/rls_m0.c **** asm("MOV r12, r1"); // save q memory
295 .loc 1 320 0
296 @ 320 "../src/rls_m0.c" 1
297 0026 8C46 MOV r12, r1
298 @ 0 "" 2
321:../src/rls_m0.c **** asm("MOVS r4, #0"); // clear column value
299 .loc 1 321 0
300 @ 321 "../src/rls_m0.c" 1
301 0028 0024 MOVS r4, #0
302 @ 0 "" 2
322:../src/rls_m0.c ****
323:../src/rls_m0.c **** // *** PIXEL SYNC (start reading pixels)
324:../src/rls_m0.c **** asm(GREEN);
303 .loc 1 324 0
304 @ 324 "../src/rls_m0.c" 1
305 002a 0578 LDRB r5, [r0]
306 @ 0 "" 2
325:../src/rls_m0.c **** // cycle
326:../src/rls_m0.c **** asm("NOP");
307 .loc 1 326 0
308 @ 326 "../src/rls_m0.c" 1
309 002c C046 NOP
310 @ 0 "" 2
327:../src/rls_m0.c **** asm("NOP");
311 .loc 1 327 0
312 @ 327 "../src/rls_m0.c" 1
313 002e C046 NOP
314 @ 0 "" 2
328:../src/rls_m0.c **** asm("NOP");
315 .loc 1 328 0
316 @ 328 "../src/rls_m0.c" 1
317 0030 C046 NOP
318 @ 0 "" 2
329:../src/rls_m0.c **** asm("NOP");
319 .loc 1 329 0
320 @ 329 "../src/rls_m0.c" 1
321 0032 C046 NOP
322 @ 0 "" 2
330:../src/rls_m0.c **** asm("NOP");
323 .loc 1 330 0
324 @ 330 "../src/rls_m0.c" 1
325 0034 C046 NOP
326 @ 0 "" 2
331:../src/rls_m0.c **** asm("NOP");
327 .loc 1 331 0
328 @ 331 "../src/rls_m0.c" 1
329 0036 C046 NOP
330 @ 0 "" 2
332:../src/rls_m0.c ****
333:../src/rls_m0.c **** asm("zero0:");
331 .loc 1 333 0
332 @ 333 "../src/rls_m0.c" 1
333 zero0:
334 @ 0 "" 2
334:../src/rls_m0.c **** asm("MOVS r6, #0");
335 .loc 1 334 0
336 @ 334 "../src/rls_m0.c" 1
337 0038 0026 MOVS r6, #0
338 @ 0 "" 2
335:../src/rls_m0.c **** asm("MOV r8, r6"); // clear sum (so we don't think we have an outstanding segment)
339 .loc 1 335 0
340 @ 335 "../src/rls_m0.c" 1
341 003a B046 MOV r8, r6
342 @ 0 "" 2
336:../src/rls_m0.c **** EOL_CHECK;
343 .loc 1 336 0
344 @ 336 "../src/rls_m0.c" 1
345 003c 4C45 CMP r4, r9
346 003e 61DA BGE eol
347 @ 0 "" 2
337:../src/rls_m0.c **** // cycle
338:../src/rls_m0.c **** // *** PIXEL SYNC (check for nonzero lut value)
339:../src/rls_m0.c **** asm("zero1:");
348 .loc 1 339 0
349 @ 339 "../src/rls_m0.c" 1
350 zero1:
351 @ 0 "" 2
340:../src/rls_m0.c **** //LEXT r7
341:../src/rls_m0.c **** // MACRO // create index, lookup, inc col, extract model
342:../src/rls_m0.c **** // $lx LEXT $rx
343:../src/rls_m0.c **** asm(RED);
352 .loc 1 343 0
353 @ 343 "../src/rls_m0.c" 1
354 0040 0678 LDRB r6, [r0]
355 @ 0 "" 2
344:../src/rls_m0.c **** // cycle
345:../src/rls_m0.c **** asm("SUBS r6, r5"); // red-green
356 .loc 1 345 0
357 @ 345 "../src/rls_m0.c" 1
358 0042 761B SUBS r6, r5
359 @ 0 "" 2
346:../src/rls_m0.c **** asm("ASRS r6, #1"); // reduce 9 to 8 bits arithmetically
360 .loc 1 346 0
361 @ 346 "../src/rls_m0.c" 1
362 0044 7610 ASRS r6, #1
363 @ 0 "" 2
347:../src/rls_m0.c **** asm("LSLS r6, #24"); // shift red-green and get rid of higher-order bits
364 .loc 1 347 0
365 @ 347 "../src/rls_m0.c" 1
366 0046 3606 LSLS r6, #24
367 @ 0 "" 2
348:../src/rls_m0.c **** asm("LSRS r6, #16"); // shift red-green back, make it the higher 8 bits of the index
368 .loc 1 348 0
369 @ 348 "../src/rls_m0.c" 1
370 0048 360C LSRS r6, #16
371 @ 0 "" 2
349:../src/rls_m0.c **** asm("LDRB r5, [r3, r4]"); // load blue-green val
372 .loc 1 349 0
373 @ 349 "../src/rls_m0.c" 1
374 004a 1D5D LDRB r5, [r3, r4]
375 @ 0 "" 2
350:../src/rls_m0.c **** // cycle
351:../src/rls_m0.c **** asm("ORRS r5, r6"); // form 16-bit index
376 .loc 1 351 0
377 @ 351 "../src/rls_m0.c" 1
378 004c 3543 ORRS r5, r6
379 @ 0 "" 2
352:../src/rls_m0.c **** asm("LDRB r1, [r2, r5]"); // load lut val
380 .loc 1 352 0
381 @ 352 "../src/rls_m0.c" 1
382 004e 515D LDRB r1, [r2, r5]
383 @ 0 "" 2
353:../src/rls_m0.c **** // cycle
354:../src/rls_m0.c **** asm("ADDS r4, #1"); // inc col
384 .loc 1 354 0
385 @ 354 "../src/rls_m0.c" 1
386 0050 0134 ADDS r4, #1
387 @ 0 "" 2
355:../src/rls_m0.c **** // *** PIXEL SYNC
356:../src/rls_m0.c **** asm(GREEN);
388 .loc 1 356 0
389 @ 356 "../src/rls_m0.c" 1
390 0052 0578 LDRB r5, [r0]
391 @ 0 "" 2
357:../src/rls_m0.c **** // cycle
358:../src/rls_m0.c **** asm("LSLS r7, r1, #29"); // knock off msb's
392 .loc 1 358 0
393 @ 358 "../src/rls_m0.c" 1
394 0054 4F07 LSLS r7, r1, #29
395 @ 0 "" 2
359:../src/rls_m0.c **** asm("LSRS r7, #29"); // extract model, put in rx
396 .loc 1 359 0
397 @ 359 "../src/rls_m0.c" 1
398 0056 7F0F LSRS r7, #29
399 @ 0 "" 2
360:../src/rls_m0.c **** //MEND
361:../src/rls_m0.c ****
362:../src/rls_m0.c **** // cycle
363:../src/rls_m0.c **** // cycle
364:../src/rls_m0.c **** // cycle
365:../src/rls_m0.c **** asm("CMP r7, #0");
400 .loc 1 365 0
401 @ 365 "../src/rls_m0.c" 1
402 0058 002F CMP r7, #0
403 @ 0 "" 2
366:../src/rls_m0.c **** asm("BEQ zero0");
404 .loc 1 366 0
405 @ 366 "../src/rls_m0.c" 1
406 005a EDD0 BEQ zero0
407 @ 0 "" 2
367:../src/rls_m0.c **** asm("MOV r10, r4"); // save start column
408 .loc 1 367 0
409 @ 367 "../src/rls_m0.c" 1
410 005c A246 MOV r10, r4
411 @ 0 "" 2
368:../src/rls_m0.c **** asm("ADD r8, r1"); // add to sum
412 .loc 1 368 0
413 @ 368 "../src/rls_m0.c" 1
414 005e 8844 ADD r8, r1
415 @ 0 "" 2
369:../src/rls_m0.c **** EOL_CHECK;
416 .loc 1 369 0
417 @ 369 "../src/rls_m0.c" 1
418 0060 4C45 CMP r4, r9
419 0062 4FDA BGE eol
420 @ 0 "" 2
370:../src/rls_m0.c **** // cycle
371:../src/rls_m0.c **** asm("NOP");
421 .loc 1 371 0
422 @ 371 "../src/rls_m0.c" 1
423 0064 C046 NOP
424 @ 0 "" 2
372:../src/rls_m0.c **** asm("NOP");
425 .loc 1 372 0
426 @ 372 "../src/rls_m0.c" 1
427 0066 C046 NOP
428 @ 0 "" 2
373:../src/rls_m0.c **** // *** PIXEL SYNC (check nonzero value for consistency)
374:../src/rls_m0.c **** // LEXT r6;
375:../src/rls_m0.c **** asm(RED);
429 .loc 1 375 0
430 @ 375 "../src/rls_m0.c" 1
431 0068 0678 LDRB r6, [r0]
432 @ 0 "" 2
376:../src/rls_m0.c **** asm("SUBS r6, r5"); // red-green
433 .loc 1 376 0
434 @ 376 "../src/rls_m0.c" 1
435 006a 761B SUBS r6, r5
436 @ 0 "" 2
377:../src/rls_m0.c **** asm("ASRS r6, #1"); // reduce 9 to 8 bits arithmetically
437 .loc 1 377 0
438 @ 377 "../src/rls_m0.c" 1
439 006c 7610 ASRS r6, #1
440 @ 0 "" 2
378:../src/rls_m0.c **** asm("LSLS r6, #24"); // shift red-green and get rid of higher-order bits
441 .loc 1 378 0
442 @ 378 "../src/rls_m0.c" 1
443 006e 3606 LSLS r6, #24
444 @ 0 "" 2
379:../src/rls_m0.c **** asm("LSRS r6, #16"); // shift red-green back, make it the higher 8 bits of the index
445 .loc 1 379 0
446 @ 379 "../src/rls_m0.c" 1
447 0070 360C LSRS r6, #16
448 @ 0 "" 2
380:../src/rls_m0.c **** asm("LDRB r5, [r3, r4]"); // load blue-green val
449 .loc 1 380 0
450 @ 380 "../src/rls_m0.c" 1
451 0072 1D5D LDRB r5, [r3, r4]
452 @ 0 "" 2
381:../src/rls_m0.c **** asm("ORRS r5, r6"); // form 16-bit index
453 .loc 1 381 0
454 @ 381 "../src/rls_m0.c" 1
455 0074 3543 ORRS r5, r6
456 @ 0 "" 2
382:../src/rls_m0.c **** asm("LDRB r1, [r2, r5]"); // load lut val
457 .loc 1 382 0
458 @ 382 "../src/rls_m0.c" 1
459 0076 515D LDRB r1, [r2, r5]
460 @ 0 "" 2
383:../src/rls_m0.c **** asm("ADDS r4, #1"); // inc col
461 .loc 1 383 0
462 @ 383 "../src/rls_m0.c" 1
463 0078 0134 ADDS r4, #1
464 @ 0 "" 2
384:../src/rls_m0.c **** // *** PIXEL SYNC
385:../src/rls_m0.c **** asm(GREEN);
465 .loc 1 385 0
466 @ 385 "../src/rls_m0.c" 1
467 007a 0578 LDRB r5, [r0]
468 @ 0 "" 2
386:../src/rls_m0.c **** // cycle
387:../src/rls_m0.c **** asm("LSLS r6, r1, #29"); // knock off msb's
469 .loc 1 387 0
470 @ 387 "../src/rls_m0.c" 1
471 007c 4E07 LSLS r6, r1, #29
472 @ 0 "" 2
388:../src/rls_m0.c **** asm("LSRS r6, #29"); // extract model, put in rx
473 .loc 1 388 0
474 @ 388 "../src/rls_m0.c" 1
475 007e 760F LSRS r6, #29
476 @ 0 "" 2
389:../src/rls_m0.c **** // end of LEXT r6
390:../src/rls_m0.c ****
391:../src/rls_m0.c **** // cycle
392:../src/rls_m0.c **** // cycle
393:../src/rls_m0.c **** // cycle
394:../src/rls_m0.c **** asm("CMP r6, r7");
477 .loc 1 394 0
478 @ 394 "../src/rls_m0.c" 1
479 0080 BE42 CMP r6, r7
480 @ 0 "" 2
395:../src/rls_m0.c **** asm("BNE zero0");
481 .loc 1 395 0
482 @ 395 "../src/rls_m0.c" 1
483 0082 D9D1 BNE zero0
484 @ 0 "" 2
396:../src/rls_m0.c **** asm("NOP");
485 .loc 1 396 0
486 @ 396 "../src/rls_m0.c" 1
487 0084 C046 NOP
488 @ 0 "" 2
397:../src/rls_m0.c **** asm("NOP");
489 .loc 1 397 0
490 @ 397 "../src/rls_m0.c" 1
491 0086 C046 NOP
492 @ 0 "" 2
398:../src/rls_m0.c **** asm("one:");
493 .loc 1 398 0
494 @ 398 "../src/rls_m0.c" 1
495 one:
496 @ 0 "" 2
399:../src/rls_m0.c **** asm("MOV r11, r1"); // save last lut val
497 .loc 1 399 0
498 @ 399 "../src/rls_m0.c" 1
499 0088 8B46 MOV r11, r1
500 @ 0 "" 2
400:../src/rls_m0.c **** asm("ADD r8, r1"); // add to sum
501 .loc 1 400 0
502 @ 400 "../src/rls_m0.c" 1
503 008a 8844 ADD r8, r1
504 @ 0 "" 2
401:../src/rls_m0.c **** EOL_CHECK;
505 .loc 1 401 0
506 @ 401 "../src/rls_m0.c" 1
507 008c 4C45 CMP r4, r9
508 008e 39DA BGE eol
509 @ 0 "" 2
402:../src/rls_m0.c **** // cycle
403:../src/rls_m0.c **** // *** PIXEL SYNC (run-length segment)
404:../src/rls_m0.c ****
405:../src/rls_m0.c **** // LEXT r6
406:../src/rls_m0.c **** asm(RED);
510 .loc 1 406 0
511 @ 406 "../src/rls_m0.c" 1
512 0090 0678 LDRB r6, [r0]
513 @ 0 "" 2
407:../src/rls_m0.c **** // cycle
408:../src/rls_m0.c **** asm("SUBS r6, r5"); // red-green
514 .loc 1 408 0
515 @ 408 "../src/rls_m0.c" 1
516 0092 761B SUBS r6, r5
517 @ 0 "" 2
409:../src/rls_m0.c **** asm("ASRS r6, #1"); // reduce 9 to 8 bits arithmetically
518 .loc 1 409 0
519 @ 409 "../src/rls_m0.c" 1
520 0094 7610 ASRS r6, #1
521 @ 0 "" 2
410:../src/rls_m0.c **** asm("LSLS r6, #24"); // shift red-green and get rid of higher-order bits
522 .loc 1 410 0
523 @ 410 "../src/rls_m0.c" 1
524 0096 3606 LSLS r6, #24
525 @ 0 "" 2
411:../src/rls_m0.c **** asm("LSRS r6, #16"); // shift red-green back, make it the higher 8 bits of the index
526 .loc 1 411 0
527 @ 411 "../src/rls_m0.c" 1
528 0098 360C LSRS r6, #16
529 @ 0 "" 2
412:../src/rls_m0.c **** asm("LDRB r5, [r3, r4]"); // load blue-green val
530 .loc 1 412 0
531 @ 412 "../src/rls_m0.c" 1
532 009a 1D5D LDRB r5, [r3, r4]
533 @ 0 "" 2
413:../src/rls_m0.c **** // cycle
414:../src/rls_m0.c **** asm("ORRS r5, r6"); // form 16-bit index
534 .loc 1 414 0
535 @ 414 "../src/rls_m0.c" 1
536 009c 3543 ORRS r5, r6
537 @ 0 "" 2
415:../src/rls_m0.c **** asm("LDRB r1, [r2, r5]"); // load lut val
538 .loc 1 415 0
539 @ 415 "../src/rls_m0.c" 1
540 009e 515D LDRB r1, [r2, r5]
541 @ 0 "" 2
416:../src/rls_m0.c **** // cycle
417:../src/rls_m0.c **** asm("ADDS r4, #1"); // inc col
542 .loc 1 417 0
543 @ 417 "../src/rls_m0.c" 1
544 00a0 0134 ADDS r4, #1
545 @ 0 "" 2
418:../src/rls_m0.c **** // *** PIXEL SYNC
419:../src/rls_m0.c **** asm(GREEN);
546 .loc 1 419 0
547 @ 419 "../src/rls_m0.c" 1
548 00a2 0578 LDRB r5, [r0]
549 @ 0 "" 2
420:../src/rls_m0.c **** // cycle
421:../src/rls_m0.c **** asm("LSLS r6, r1, #29"); // knock off msb's
550 .loc 1 421 0
551 @ 421 "../src/rls_m0.c" 1
552 00a4 4E07 LSLS r6, r1, #29
553 @ 0 "" 2
422:../src/rls_m0.c **** asm("LSRS r6, #29"); // extract model, put in rx
554 .loc 1 422 0
555 @ 422 "../src/rls_m0.c" 1
556 00a6 760F LSRS r6, #29
557 @ 0 "" 2
423:../src/rls_m0.c **** // end of LEXT
424:../src/rls_m0.c ****
425:../src/rls_m0.c **** // cycle
426:../src/rls_m0.c **** // cycle
427:../src/rls_m0.c **** // cycle
428:../src/rls_m0.c **** asm("CMP r6, r7");
558 .loc 1 428 0
559 @ 428 "../src/rls_m0.c" 1
560 00a8 BE42 CMP r6, r7
561 @ 0 "" 2
429:../src/rls_m0.c **** asm("BEQ one");
562 .loc 1 429 0
563 @ 429 "../src/rls_m0.c" 1
564 00aa EDD0 BEQ one
565 @ 0 "" 2
430:../src/rls_m0.c **** asm("ADD r8, r11"); // need to add something-- use last lut val
566 .loc 1 430 0
567 @ 430 "../src/rls_m0.c" 1
568 00ac D844 ADD r8, r11
569 @ 0 "" 2
431:../src/rls_m0.c **** EOL_CHECK;
570 .loc 1 431 0
571 @ 431 "../src/rls_m0.c" 1
572 00ae 4C45 CMP r4, r9
573 00b0 28DA BGE eol
574 @ 0 "" 2
432:../src/rls_m0.c **** // cycle
433:../src/rls_m0.c **** asm("NOP");
575 .loc 1 433 0
576 @ 433 "../src/rls_m0.c" 1
577 00b2 C046 NOP
578 @ 0 "" 2
434:../src/rls_m0.c **** asm("NOP");
579 .loc 1 434 0
580 @ 434 "../src/rls_m0.c" 1
581 00b4 C046 NOP
582 @ 0 "" 2
435:../src/rls_m0.c **** asm("NOP");
583 .loc 1 435 0
584 @ 435 "../src/rls_m0.c" 1
585 00b6 C046 NOP
586 @ 0 "" 2
436:../src/rls_m0.c **** // *** PIXEL SYNC (1st pixel not equal)
437:../src/rls_m0.c ****
438:../src/rls_m0.c **** // LEXT r6
439:../src/rls_m0.c **** asm(RED);
587 .loc 1 439 0
588 @ 439 "../src/rls_m0.c" 1
589 00b8 0678 LDRB r6, [r0]
590 @ 0 "" 2
440:../src/rls_m0.c **** // cycle
441:../src/rls_m0.c **** asm("SUBS r6, r5"); // red-green
591 .loc 1 441 0
592 @ 441 "../src/rls_m0.c" 1
593 00ba 761B SUBS r6, r5
594 @ 0 "" 2
442:../src/rls_m0.c **** asm("ASRS r6, #1"); // reduce 9 to 8 bits arithmetically
595 .loc 1 442 0
596 @ 442 "../src/rls_m0.c" 1
597 00bc 7610 ASRS r6, #1
598 @ 0 "" 2
443:../src/rls_m0.c **** asm("LSLS r6, #24"); // shift red-green and get rid of higher-order bits
599 .loc 1 443 0
600 @ 443 "../src/rls_m0.c" 1
601 00be 3606 LSLS r6, #24
602 @ 0 "" 2
444:../src/rls_m0.c **** asm("LSRS r6, #16"); // shift red-green back, make it the higher 8 bits of the index
603 .loc 1 444 0
604 @ 444 "../src/rls_m0.c" 1
605 00c0 360C LSRS r6, #16
606 @ 0 "" 2
445:../src/rls_m0.c **** asm("LDRB r5, [r3, r4]"); // load blue-green val
607 .loc 1 445 0
608 @ 445 "../src/rls_m0.c" 1
609 00c2 1D5D LDRB r5, [r3, r4]
610 @ 0 "" 2
446:../src/rls_m0.c **** // cycle
447:../src/rls_m0.c **** asm("ORRS r5, r6"); // form 16-bit index
611 .loc 1 447 0
612 @ 447 "../src/rls_m0.c" 1
613 00c4 3543 ORRS r5, r6
614 @ 0 "" 2
448:../src/rls_m0.c **** asm("LDRB r1, [r2, r5]"); // load lut val
615 .loc 1 448 0
616 @ 448 "../src/rls_m0.c" 1
617 00c6 515D LDRB r1, [r2, r5]
618 @ 0 "" 2
449:../src/rls_m0.c **** // cycle
450:../src/rls_m0.c **** asm("ADDS r4, #1"); // inc col
619 .loc 1 450 0
620 @ 450 "../src/rls_m0.c" 1
621 00c8 0134 ADDS r4, #1
622 @ 0 "" 2
451:../src/rls_m0.c **** // *** PIXEL SYNC
452:../src/rls_m0.c **** asm(GREEN);
623 .loc 1 452 0
624 @ 452 "../src/rls_m0.c" 1
625 00ca 0578 LDRB r5, [r0]
626 @ 0 "" 2
453:../src/rls_m0.c **** // cycle
454:../src/rls_m0.c **** asm("LSLS r6, r1, #29"); // knock off msb's
627 .loc 1 454 0
628 @ 454 "../src/rls_m0.c" 1
629 00cc 4E07 LSLS r6, r1, #29
630 @ 0 "" 2
455:../src/rls_m0.c **** asm("LSRS r6, #29"); // extract model, put in rx
631 .loc 1 455 0
632 @ 455 "../src/rls_m0.c" 1
633 00ce 760F LSRS r6, #29
634 @ 0 "" 2
456:../src/rls_m0.c **** // end of LEXT
457:../src/rls_m0.c ****
458:../src/rls_m0.c **** // cycle
459:../src/rls_m0.c **** // cycle
460:../src/rls_m0.c **** // cycle
461:../src/rls_m0.c **** asm("CMP r6, r7");
635 .loc 1 461 0
636 @ 461 "../src/rls_m0.c" 1
637 00d0 BE42 CMP r6, r7
638 @ 0 "" 2
462:../src/rls_m0.c **** asm("BEQ one");
639 .loc 1 462 0
640 @ 462 "../src/rls_m0.c" 1
641 00d2 D9D0 BEQ one
642 @ 0 "" 2
463:../src/rls_m0.c **** // 2nd pixel not equal--- run length is done
464:../src/rls_m0.c **** QVAL;
643 .loc 1 464 0
644 @ 464 "../src/rls_m0.c" 1
645 00d4 5546 MOV r5, r10
646 @ 0 "" 2
647 @ 464 "../src/rls_m0.c" 1
648 00d6 EE00 LSLS r6, r5, #3
649 @ 0 "" 2
650 @ 464 "../src/rls_m0.c" 1
651 00d8 3E43 ORRS r6, r7
652 @ 0 "" 2
653 @ 464 "../src/rls_m0.c" 1
654 00da 611B SUBS r1, r4, r5
655 @ 0 "" 2
656 @ 464 "../src/rls_m0.c" 1
657 00dc 0D03 LSLS r5, r1, #12
658 @ 0 "" 2
659 @ 464 "../src/rls_m0.c" 1
660 00de 2E43 ORRS r6, r5
661 @ 0 "" 2
662 @ 464 "../src/rls_m0.c" 1
663 00e0 099D LDR r5, [sp, #0x24]
664 @ 0 "" 2
665 @ 464 "../src/rls_m0.c" 1
666 00e2 495D LDRB r1, [r1, r5]
667 @ 0 "" 2
668 @ 464 "../src/rls_m0.c" 1
669 00e4 4546 MOV r5, r8
670 @ 0 "" 2
671 @ 464 "../src/rls_m0.c" 1
672 00e6 CD40 LSRS r5, r1
673 @ 0 "" 2
674 @ 464 "../src/rls_m0.c" 1
675 00e8 6D05 LSLS r5, #21
676 @ 0 "" 2
677 @ 464 "../src/rls_m0.c" 1
678 00ea 2E43 ORRS r6, r5
679 @ 0 "" 2
680 @ 464 "../src/rls_m0.c" 1
681 00ec 0907 LSLS r1, #28
682 @ 0 "" 2
683 @ 464 "../src/rls_m0.c" 1
684 00ee 0E43 ORRS r6, r1
685 @ 0 "" 2
686 @ 464 "../src/rls_m0.c" 1
687 00f0 6146 MOV r1, r12
688 @ 0 "" 2
689 @ 464 "../src/rls_m0.c" 1
690 00f2 0427 MOVS r7, #4
691 @ 0 "" 2
692 @ 464 "../src/rls_m0.c" 1
693 00f4 0578 LDRB r5, [r0]
694 @ 0 "" 2
695 @ 464 "../src/rls_m0.c" 1
696 00f6 0E60 STR r6, [r1]
697 @ 0 "" 2
698 @ 464 "../src/rls_m0.c" 1
699 00f8 BC44 ADD r12, r7
700 @ 0 "" 2
465:../src/rls_m0.c **** asm("MOVS r6, #0");
701 .loc 1 465 0
702 @ 465 "../src/rls_m0.c" 1
703 00fa 0026 MOVS r6, #0
704 @ 0 "" 2
466:../src/rls_m0.c **** asm("MOV r8, r6"); // clear sum
705 .loc 1 466 0
706 @ 466 "../src/rls_m0.c" 1
707 00fc B046 MOV r8, r6
708 @ 0 "" 2
467:../src/rls_m0.c **** asm("ADDS r4, #1"); // add column
709 .loc 1 467 0
710 @ 467 "../src/rls_m0.c" 1
711 00fe 0134 ADDS r4, #1
712 @ 0 "" 2
468:../src/rls_m0.c **** asm("NOP");
713 .loc 1 468 0
714 @ 468 "../src/rls_m0.c" 1
715 0100 C046 NOP
716 @ 0 "" 2
469:../src/rls_m0.c **** asm("B zero1");
717 .loc 1 469 0
718 @ 469 "../src/rls_m0.c" 1
719 0102 9DE7 B zero1
720 @ 0 "" 2
470:../src/rls_m0.c ****
471:../src/rls_m0.c **** asm("eol:");
721 .loc 1 471 0
722 @ 471 "../src/rls_m0.c" 1
723 eol:
724 @ 0 "" 2
472:../src/rls_m0.c **** // check r8 for unfinished q val
473:../src/rls_m0.c **** asm("MOVS r6, #0");
725 .loc 1 473 0
726 @ 473 "../src/rls_m0.c" 1
727 0104 0026 MOVS r6, #0
728 @ 0 "" 2
474:../src/rls_m0.c **** asm("CMP r8, r6");
729 .loc 1 474 0
730 @ 474 "../src/rls_m0.c" 1
731 0106 B045 CMP r8, r6
732 @ 0 "" 2
475:../src/rls_m0.c **** asm("BEQ eol0");
733 .loc 1 475 0
734 @ 475 "../src/rls_m0.c" 1
735 0108 12D0 BEQ eol0
736 @ 0 "" 2
476:../src/rls_m0.c **** QVAL;
737 .loc 1 476 0
738 @ 476 "../src/rls_m0.c" 1
739 010a 5546 MOV r5, r10
740 @ 0 "" 2
741 @ 476 "../src/rls_m0.c" 1
742 010c EE00 LSLS r6, r5, #3
743 @ 0 "" 2
744 @ 476 "../src/rls_m0.c" 1
745 010e 3E43 ORRS r6, r7
746 @ 0 "" 2
747 @ 476 "../src/rls_m0.c" 1
748 0110 611B SUBS r1, r4, r5
749 @ 0 "" 2
750 @ 476 "../src/rls_m0.c" 1
751 0112 0D03 LSLS r5, r1, #12
752 @ 0 "" 2
753 @ 476 "../src/rls_m0.c" 1
754 0114 2E43 ORRS r6, r5
755 @ 0 "" 2
756 @ 476 "../src/rls_m0.c" 1
757 0116 099D LDR r5, [sp, #0x24]
758 @ 0 "" 2
759 @ 476 "../src/rls_m0.c" 1
760 0118 495D LDRB r1, [r1, r5]
761 @ 0 "" 2
762 @ 476 "../src/rls_m0.c" 1
763 011a 4546 MOV r5, r8
764 @ 0 "" 2
765 @ 476 "../src/rls_m0.c" 1
766 011c CD40 LSRS r5, r1
767 @ 0 "" 2
768 @ 476 "../src/rls_m0.c" 1
769 011e 6D05 LSLS r5, #21
770 @ 0 "" 2
771 @ 476 "../src/rls_m0.c" 1
772 0120 2E43 ORRS r6, r5
773 @ 0 "" 2
774 @ 476 "../src/rls_m0.c" 1
775 0122 0907 LSLS r1, #28
776 @ 0 "" 2
777 @ 476 "../src/rls_m0.c" 1
778 0124 0E43 ORRS r6, r1
779 @ 0 "" 2
780 @ 476 "../src/rls_m0.c" 1
781 0126 6146 MOV r1, r12
782 @ 0 "" 2
783 @ 476 "../src/rls_m0.c" 1
784 0128 0427 MOVS r7, #4
785 @ 0 "" 2
786 @ 476 "../src/rls_m0.c" 1
787 012a 0578 LDRB r5, [r0]
788 @ 0 "" 2
789 @ 476 "../src/rls_m0.c" 1
790 012c 0E60 STR r6, [r1]
791 @ 0 "" 2
792 @ 476 "../src/rls_m0.c" 1
793 012e BC44 ADD r12, r7
794 @ 0 "" 2
477:../src/rls_m0.c ****
478:../src/rls_m0.c **** // wait for hsync to go low
479:../src/rls_m0.c **** asm("eol0:");
795 .loc 1 479 0
796 @ 479 "../src/rls_m0.c" 1
797 eol0:
798 @ 0 "" 2
480:../src/rls_m0.c **** asm("MOVS r5, #0x1");
799 .loc 1 480 0
800 @ 480 "../src/rls_m0.c" 1
801 0130 0125 MOVS r5, #0x1
802 @ 0 "" 2
481:../src/rls_m0.c **** asm("LSLS r5, #11");
803 .loc 1 481 0
804 @ 481 "../src/rls_m0.c" 1
805 0132 ED02 LSLS r5, #11
806 @ 0 "" 2
482:../src/rls_m0.c ****
483:../src/rls_m0.c **** asm("dest20A:");
807 .loc 1 483 0
808 @ 483 "../src/rls_m0.c" 1
809 dest20A:
810 @ 0 "" 2
484:../src/rls_m0.c **** asm("LDR r6, [r0]"); // 2
811 .loc 1 484 0
812 @ 484 "../src/rls_m0.c" 1
813 0134 0668 LDR r6, [r0]
814 @ 0 "" 2
485:../src/rls_m0.c **** asm("TST r6, r5"); // 1
815 .loc 1 485 0
816 @ 485 "../src/rls_m0.c" 1
817 0136 2E42 TST r6, r5
818 @ 0 "" 2
486:../src/rls_m0.c **** asm("BNE dest20A"); // 3
819 .loc 1 486 0
820 @ 486 "../src/rls_m0.c" 1
821 0138 FCD1 BNE dest20A
822 @ 0 "" 2
487:../src/rls_m0.c ****
488:../src/rls_m0.c **** // we have approx 1800 cycles to do something here
489:../src/rls_m0.c **** // which is enough time to copy 64 qvals (256 bytes), maximum qvals/line = 320/5
490:../src/rls_m0.c **** // (this has been verified/tested)
491:../src/rls_m0.c **** // The advantage of doing this is that we don't need to buffer much data
492:../src/rls_m0.c **** // and it reduces the latency-- we can start processing qvals immediately
493:../src/rls_m0.c **** // We need to copy these because the memory the qvals comes from must not be
494:../src/rls_m0.c **** // accessed by the M4, or wait states will be thrown in and we'll lose pixel sync for that line
495:../src/rls_m0.c **** asm("MOV r0, r12"); // qval pointer
823 .loc 1 495 0
824 @ 495 "../src/rls_m0.c" 1
825 013a 6046 MOV r0, r12
826 @ 0 "" 2
496:../src/rls_m0.c **** asm("LDR r1, [sp]"); // bring in original q memory location
827 .loc 1 496 0
828 @ 496 "../src/rls_m0.c" 1
829 013c 0099 LDR r1, [sp]
830 @ 0 "" 2
497:../src/rls_m0.c **** asm("SUBS r0, r1"); // get number of qvals*4
831 .loc 1 497 0
832 @ 497 "../src/rls_m0.c" 1
833 013e 401A SUBS r0, r1
834 @ 0 "" 2
498:../src/rls_m0.c ****
499:../src/rls_m0.c **** asm("LDR r2, [sp, #0x28]"); // bring in qq memory pointer
835 .loc 1 499 0
836 @ 499 "../src/rls_m0.c" 1
837 0140 0A9A LDR r2, [sp, #0x28]
838 @ 0 "" 2
500:../src/rls_m0.c **** asm("LDR r3, [sp, #0x2c]"); // bring in qq index
839 .loc 1 500 0
840 @ 500 "../src/rls_m0.c" 1
841 0142 0B9B LDR r3, [sp, #0x2c]
842 @ 0 "" 2
501:../src/rls_m0.c **** asm("LSLS r3, #2"); // qq index in bytes (4 bytes/qval)
843 .loc 1 501 0
844 @ 501 "../src/rls_m0.c" 1
845 0144 9B00 LSLS r3, #2
846 @ 0 "" 2
502:../src/rls_m0.c **** asm("LDR r4, [sp, #0x30]");; // bring in qq size
847 .loc 1 502 0
848 @ 502 "../src/rls_m0.c" 1
849 0146 0C9C LDR r4, [sp, #0x30]
850 @ 0 "" 2
503:../src/rls_m0.c **** asm("LSLS r4, #2"); // qq size in bytes (4 bytes/qval)
851 .loc 1 503 0
852 @ 503 "../src/rls_m0.c" 1
853 0148 A400 LSLS r4, #2
854 @ 0 "" 2
504:../src/rls_m0.c ****
505:../src/rls_m0.c **** asm("MOVS r5, #0");
855 .loc 1 505 0
856 @ 505 "../src/rls_m0.c" 1
857 014a 0025 MOVS r5, #0
858 @ 0 "" 2
506:../src/rls_m0.c ****
507:../src/rls_m0.c **** asm("lcpy:");
859 .loc 1 507 0
860 @ 507 "../src/rls_m0.c" 1
861 lcpy:
862 @ 0 "" 2
508:../src/rls_m0.c **** asm("CMP r0, r5"); // 1 end condition
863 .loc 1 508 0
864 @ 508 "../src/rls_m0.c" 1
865 014c A842 CMP r0, r5
866 @ 0 "" 2
509:../src/rls_m0.c **** asm("BEQ ecpy"); // 1 exit
867 .loc 1 509 0
868 @ 509 "../src/rls_m0.c" 1
869 014e 08D0 BEQ ecpy
870 @ 0 "" 2
510:../src/rls_m0.c ****
511:../src/rls_m0.c **** asm("LDR r6, [r1, r5]"); // 2 copy (read)
871 .loc 1 511 0
872 @ 511 "../src/rls_m0.c" 1
873 0150 4E59 LDR r6, [r1, r5]
874 @ 0 "" 2
512:../src/rls_m0.c **** asm("STR r6, [r2, r3]"); // 2 copy (write)
875 .loc 1 512 0
876 @ 512 "../src/rls_m0.c" 1
877 0152 D650 STR r6, [r2, r3]
878 @ 0 "" 2
513:../src/rls_m0.c ****
514:../src/rls_m0.c **** asm("ADDS r3, #4"); // 1 inc qq index
879 .loc 1 514 0
880 @ 514 "../src/rls_m0.c" 1
881 0154 0433 ADDS r3, #4
882 @ 0 "" 2
515:../src/rls_m0.c **** asm("ADDS r5, #4"); // 1 inc counter
883 .loc 1 515 0
884 @ 515 "../src/rls_m0.c" 1
885 0156 0435 ADDS r5, #4
886 @ 0 "" 2
516:../src/rls_m0.c ****
517:../src/rls_m0.c **** asm("CMP r4, r3"); // 1 check for qq index wrap
887 .loc 1 517 0
888 @ 517 "../src/rls_m0.c" 1
889 0158 9C42 CMP r4, r3
890 @ 0 "" 2
518:../src/rls_m0.c **** asm("BEQ wrap"); // 1
891 .loc 1 518 0
892 @ 518 "../src/rls_m0.c" 1
893 015a 00D0 BEQ wrap
894 @ 0 "" 2
519:../src/rls_m0.c **** asm("B lcpy"); // 3
895 .loc 1 519 0
896 @ 519 "../src/rls_m0.c" 1
897 015c F6E7 B lcpy
898 @ 0 "" 2
520:../src/rls_m0.c ****
521:../src/rls_m0.c **** asm("wrap:");
899 .loc 1 521 0
900 @ 521 "../src/rls_m0.c" 1
901 wrap:
902 @ 0 "" 2
522:../src/rls_m0.c **** asm("MOVS r3, #0"); // reset qq index
903 .loc 1 522 0
904 @ 522 "../src/rls_m0.c" 1
905 015e 0023 MOVS r3, #0
906 @ 0 "" 2
523:../src/rls_m0.c **** asm("B lcpy");
907 .loc 1 523 0
908 @ 523 "../src/rls_m0.c" 1
909 0160 F4E7 B lcpy
910 @ 0 "" 2
524:../src/rls_m0.c ****
525:../src/rls_m0.c **** asm("ecpy:");
911 .loc 1 525 0
912 @ 525 "../src/rls_m0.c" 1
913 ecpy:
914 @ 0 "" 2
526:../src/rls_m0.c **** asm("LSRS r0, #2"); // return number of qvals
915 .loc 1 526 0
916 @ 526 "../src/rls_m0.c" 1
917 0162 8008 LSRS r0, #2
918 @ 0 "" 2
527:../src/rls_m0.c **** asm("POP {r1-r7}");
919 .loc 1 527 0
920 @ 527 "../src/rls_m0.c" 1
921 0164 FEBC POP {r1-r7}
922 @ 0 "" 2
528:../src/rls_m0.c ****
529:../src/rls_m0.c **** asm(".syntax divided");
923 .loc 1 529 0
924 @ 529 "../src/rls_m0.c" 1
925 .syntax divided
926 @ 0 "" 2
530:../src/rls_m0.c ****
531:../src/rls_m0.c **** }
927 .loc 1 531 0
928 .thumb
929 .syntax unified
930 0166 C046 nop
931 0168 1800 movs r0, r3
932 016a BD46 mov sp, r7
933 016c 04B0 add sp, sp, #16
934 @ sp needed
935 016e 80BD pop {r7, pc}
936 .cfi_endproc
937 .LFE33:
939 .section .text.intLog,"ax",%progbits
940 .align 2
941 .global intLog
942 .code 16
943 .thumb_func
945 intLog:
946 .LFB34:
532:../src/rls_m0.c ****
533:../src/rls_m0.c ****
534:../src/rls_m0.c **** uint8_t intLog(int i)
535:../src/rls_m0.c **** {
947 .loc 1 535 0
948 .cfi_startproc
949 0000 80B5 push {r7, lr}
950 .cfi_def_cfa_offset 8
951 .cfi_offset 7, -8
952 .cfi_offset 14, -4
953 0002 82B0 sub sp, sp, #8
954 .cfi_def_cfa_offset 16
955 0004 00AF add r7, sp, #0
956 .cfi_def_cfa_register 7
957 0006 7860 str r0, [r7, #4]
536:../src/rls_m0.c **** return 0;
958 .loc 1 536 0
959 0008 0023 movs r3, #0
537:../src/rls_m0.c **** }
960 .loc 1 537 0
961 000a 1800 movs r0, r3
962 000c BD46 mov sp, r7
963 000e 02B0 add sp, sp, #8
964 @ sp needed
965 0010 80BD pop {r7, pc}
966 .cfi_endproc
967 .LFE34:
969 0012 C046 .section .text.createLogLut,"ax",%progbits
970 .align 2
971 .global createLogLut
972 .code 16
973 .thumb_func
975 createLogLut:
976 .LFB35:
538:../src/rls_m0.c ****
539:../src/rls_m0.c ****
540:../src/rls_m0.c **** void createLogLut(void)
541:../src/rls_m0.c **** {
977 .loc 1 541 0
978 .cfi_startproc
979 0000 90B5 push {r4, r7, lr}
980 .cfi_def_cfa_offset 12
981 .cfi_offset 4, -12
982 .cfi_offset 7, -8
983 .cfi_offset 14, -4
984 0002 83B0 sub sp, sp, #12
985 .cfi_def_cfa_offset 24
986 0004 00AF add r7, sp, #0
987 .cfi_def_cfa_register 7
542:../src/rls_m0.c **** int i;
543:../src/rls_m0.c ****
544:../src/rls_m0.c **** for (i=0; i<CAM_RES2_WIDTH; i++)
988 .loc 1 544 0
989 0006 0023 movs r3, #0
990 0008 7B60 str r3, [r7, #4]
991 000a 0EE0 b .L6
992 .L7:
545:../src/rls_m0.c **** g_logLut[i] = intLog(i) + 3;
993 .loc 1 545 0 discriminator 3
994 000c 0B4B ldr r3, .L8
995 000e 1A68 ldr r2, [r3]
996 0010 7B68 ldr r3, [r7, #4]
997 0012 D418 adds r4, r2, r3
998 0014 7B68 ldr r3, [r7, #4]
999 0016 1800 movs r0, r3
1000 0018 FFF7FEFF bl intLog
1001 001c 0300 movs r3, r0
1002 001e 0333 adds r3, r3, #3
1003 0020 DBB2 uxtb r3, r3
1004 0022 2370 strb r3, [r4]
544:../src/rls_m0.c **** g_logLut[i] = intLog(i) + 3;
1005 .loc 1 544 0 discriminator 3
1006 0024 7B68 ldr r3, [r7, #4]
1007 0026 0133 adds r3, r3, #1
1008 0028 7B60 str r3, [r7, #4]
1009 .L6:
544:../src/rls_m0.c **** g_logLut[i] = intLog(i) + 3;
1010 .loc 1 544 0 is_stmt 0 discriminator 1
1011 002a 7A68 ldr r2, [r7, #4]
1012 002c 4023 movs r3, #64
1013 002e FF33 adds r3, r3, #255
1014 0030 9A42 cmp r2, r3
1015 0032 EBDD ble .L7
546:../src/rls_m0.c **** }
1016 .loc 1 546 0 is_stmt 1
1017 0034 C046 nop
1018 0036 BD46 mov sp, r7
1019 0038 03B0 add sp, sp, #12
1020 @ sp needed
1021 003a 90BD pop {r4, r7, pc}
1022 .L9:
1023 .align 2
1024 .L8:
1025 003c 00000000 .word g_logLut
1026 .cfi_endproc
1027 .LFE35:
1029 .section .text.getRLSFrame,"ax",%progbits
1030 .align 2
1031 .global getRLSFrame
1032 .code 16
1033 .thumb_func
1035 getRLSFrame:
1036 .LFB36:
547:../src/rls_m0.c ****
548:../src/rls_m0.c **** #ifdef RLTEST
549:../src/rls_m0.c **** uint8_t bgData[] =
550:../src/rls_m0.c **** {
551:../src/rls_m0.c **** 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12
552:../src/rls_m0.c **** };
553:../src/rls_m0.c ****
554:../src/rls_m0.c **** uint32_t rgData[] =
555:../src/rls_m0.c **** {
556:../src/rls_m0.c **** 0x08a008a0, 0x08a008a0, 0x08a008a0, 0x08a008a0, 0x08a008a0, 0x08a008a0
557:../src/rls_m0.c **** };
558:../src/rls_m0.c **** #endif
559:../src/rls_m0.c ****
560:../src/rls_m0.c ****
561:../src/rls_m0.c **** int32_t getRLSFrame(uint32_t *m0Mem, uint32_t *lut)
562:../src/rls_m0.c **** {
1037 .loc 1 562 0
1038 .cfi_startproc
1039 0000 F0B5 push {r4, r5, r6, r7, lr}
1040 .cfi_def_cfa_offset 20
1041 .cfi_offset 4, -20
1042 .cfi_offset 5, -16
1043 .cfi_offset 6, -12
1044 .cfi_offset 7, -8
1045 .cfi_offset 14, -4
1046 0002 93B0 sub sp, sp, #76
1047 .cfi_def_cfa_offset 96
1048 0004 06AF add r7, sp, #24
1049 .cfi_def_cfa 7, 72
1050 0006 F860 str r0, [r7, #12]
1051 0008 B960 str r1, [r7, #8]
563:../src/rls_m0.c **** uint8_t *lut2 = (uint8_t *)*lut;
1052 .loc 1 563 0
1053 000a BB68 ldr r3, [r7, #8]
1054 000c 1B68 ldr r3, [r3]
1055 000e 7B62 str r3, [r7, #36]
564:../src/rls_m0.c **** Qval *qvalStore = (Qval *)*m0Mem;
1056 .loc 1 564 0
1057 0010 FB68 ldr r3, [r7, #12]
1058 0012 1B68 ldr r3, [r3]
1059 0014 3B62 str r3, [r7, #32]
565:../src/rls_m0.c **** uint32_t line;
566:../src/rls_m0.c **** uint32_t numQvals;
567:../src/rls_m0.c **** uint32_t totalQvals;
568:../src/rls_m0.c **** uint8_t *lineStore;
569:../src/rls_m0.c **** uint8_t *logLut;
570:../src/rls_m0.c ****
571:../src/rls_m0.c **** lineStore = (uint8_t *)(qvalStore + MAX_QVALS_PER_LINE);
1060 .loc 1 571 0
1061 0016 3B6A ldr r3, [r7, #32]
1062 0018 0133 adds r3, r3, #1
1063 001a FF33 adds r3, r3, #255
1064 001c FB61 str r3, [r7, #28]
572:../src/rls_m0.c **** logLut = lineStore + CAM_RES2_WIDTH + 4;
1065 .loc 1 572 0
1066 001e FB69 ldr r3, [r7, #28]
1067 0020 4533 adds r3, r3, #69
1068 0022 FF33 adds r3, r3, #255
1069 0024 BB61 str r3, [r7, #24]
573:../src/rls_m0.c **** // m0mem needs to be at least 64*4 + CAM_RES2_WIDTH*2 + 4 = 900 ~ 1024
574:../src/rls_m0.c ****
575:../src/rls_m0.c **** if (g_logLut!=logLut)
1070 .loc 1 575 0
1071 0026 444B ldr r3, .L18
1072 0028 1A68 ldr r2, [r3]
1073 002a BB69 ldr r3, [r7, #24]
1074 002c 9A42 cmp r2, r3
1075 002e 04D0 beq .L11
576:../src/rls_m0.c **** {
577:../src/rls_m0.c **** g_logLut = logLut;
1076 .loc 1 577 0
1077 0030 414B ldr r3, .L18
1078 0032 BA69 ldr r2, [r7, #24]
1079 0034 1A60 str r2, [r3]
578:../src/rls_m0.c **** createLogLut();
1080 .loc 1 578 0
1081 0036 FFF7FEFF bl createLogLut
1082 .L11:
579:../src/rls_m0.c **** }
580:../src/rls_m0.c ****
581:../src/rls_m0.c **** // don't even attempt to grab lines if we're lacking space...
582:../src/rls_m0.c **** if (qq_free()<MAX_QVALS_PER_LINE)
1083 .loc 1 582 0
1084 003a FFF7FEFF bl qq_free
1085 003e 031E subs r3, r0, #0
1086 0040 3F2B cmp r3, #63
1087 0042 02D8 bhi .L12
583:../src/rls_m0.c **** return -1;
1088 .loc 1 583 0
1089 0044 0123 movs r3, #1
1090 0046 5B42 rsbs r3, r3, #0
1091 0048 72E0 b .L13
1092 .L12:
584:../src/rls_m0.c ****
585:../src/rls_m0.c **** // indicate start of frame
586:../src/rls_m0.c **** qq_enqueue(0xffffffff);
1093 .loc 1 586 0
1094 004a 0123 movs r3, #1
1095 004c 5B42 rsbs r3, r3, #0
1096 004e 1800 movs r0, r3
1097 0050 FFF7FEFF bl qq_enqueue
587:../src/rls_m0.c **** skipLines(0);
1098 .loc 1 587 0
1099 0054 0020 movs r0, #0
1100 0056 FFF7FEFF bl skipLines
588:../src/rls_m0.c **** for (line=0, totalQvals=1; line<CAM_RES2_HEIGHT; line++) // start totalQvals at 1 because of star
1101 .loc 1 588 0
1102 005a 0023 movs r3, #0
1103 005c FB62 str r3, [r7, #44]
1104 005e 0123 movs r3, #1
1105 0060 BB62 str r3, [r7, #40]
1106 0062 61E0 b .L14
1107 .L17:
589:../src/rls_m0.c **** {
590:../src/rls_m0.c **** // not enough space--- return error
591:../src/rls_m0.c **** if (qq_free()<MAX_QVALS_PER_LINE)
1108 .loc 1 591 0
1109 0064 FFF7FEFF bl qq_free
1110 0068 031E subs r3, r0, #0
1111 006a 3F2B cmp r3, #63
1112 006c 02D8 bhi .L15
592:../src/rls_m0.c **** return -1;
1113 .loc 1 592 0
1114 006e 0123 movs r3, #1
1115 0070 5B42 rsbs r3, r3, #0
1116 0072 5DE0 b .L13
1117 .L15:
593:../src/rls_m0.c **** // mark beginning of this row (column 0 = 0)
594:../src/rls_m0.c **** // column 1 is the first real column of pixels
595:../src/rls_m0.c **** qq_enqueue(0);
1118 .loc 1 595 0
1119 0074 0020 movs r0, #0
1120 0076 FFF7FEFF bl qq_enqueue
596:../src/rls_m0.c **** lineProcessedRL0A((uint32_t *)&CAM_PORT, lineStore, CAM_RES2_WIDTH);
1121 .loc 1 596 0
1122 007a A023 movs r3, #160
1123 007c 5A00 lsls r2, r3, #1
1124 007e FB69 ldr r3, [r7, #28]
1125 0080 2E48 ldr r0, .L18+4
1126 0082 1900 movs r1, r3
1127 0084 FFF7FEFF bl lineProcessedRL0A
597:../src/rls_m0.c **** numQvals = lineProcessedRL1A((uint32_t *)&CAM_PORT, qvalStore, lut2, lineStore, CAM_RES2_WIDTH, g
1128 .loc 1 597 0
1129 0088 2B4B ldr r3, .L18
1130 008a 1A68 ldr r2, [r3]
1131 008c 2C4B ldr r3, .L18+8
1132 008e 1B68 ldr r3, [r3]
1133 0090 0833 adds r3, r3, #8
1134 0092 1900 movs r1, r3
1135 0094 2A4B ldr r3, .L18+8
1136 0096 1B68 ldr r3, [r3]
1137 0098 5B88 ldrh r3, [r3, #2]
1138 009a 9BB2 uxth r3, r3
1139 009c 1E00 movs r6, r3
1140 009e FD69 ldr r5, [r7, #28]
1141 00a0 7C6A ldr r4, [r7, #36]
1142 00a2 386A ldr r0, [r7, #32]
1143 00a4 254B ldr r3, .L18+4
1144 00a6 7B60 str r3, [r7, #4]
1145 00a8 264B ldr r3, .L18+12
1146 00aa 0493 str r3, [sp, #16]
1147 00ac 0396 str r6, [sp, #12]
1148 00ae 0291 str r1, [sp, #8]
1149 00b0 0192 str r2, [sp, #4]
1150 00b2 A023 movs r3, #160
1151 00b4 5B00 lsls r3, r3, #1
1152 00b6 0093 str r3, [sp]
1153 00b8 2B00 movs r3, r5
1154 00ba 2200 movs r2, r4
1155 00bc 0100 movs r1, r0
1156 00be 7868 ldr r0, [r7, #4]
1157 00c0 FFF7FEFF bl lineProcessedRL1A
1158 00c4 0300 movs r3, r0
1159 00c6 7B61 str r3, [r7, #20]
598:../src/rls_m0.c **** // modify qq to reflect added data
599:../src/rls_m0.c **** g_qqueue->writeIndex += numQvals;
1160 .loc 1 599 0
1161 00c8 1D4B ldr r3, .L18+8
1162 00ca 1A68 ldr r2, [r3]
1163 00cc 1C4B ldr r3, .L18+8
1164 00ce 1B68 ldr r3, [r3]
1165 00d0 5B88 ldrh r3, [r3, #2]
1166 00d2 99B2 uxth r1, r3
1167 00d4 7B69 ldr r3, [r7, #20]
1168 00d6 9BB2 uxth r3, r3
1169 00d8 CB18 adds r3, r1, r3
1170 00da 9BB2 uxth r3, r3
1171 00dc 5380 strh r3, [r2, #2]
600:../src/rls_m0.c **** if (g_qqueue->writeIndex>=QQ_MEM_SIZE)
1172 .loc 1 600 0
1173 00de 184B ldr r3, .L18+8
1174 00e0 1B68 ldr r3, [r3]
1175 00e2 5B88 ldrh r3, [r3, #2]
1176 00e4 9BB2 uxth r3, r3
1177 00e6 184A ldr r2, .L18+16
1178 00e8 9342 cmp r3, r2
1179 00ea 0AD9 bls .L16
601:../src/rls_m0.c **** g_qqueue->writeIndex -= QQ_MEM_SIZE;
1180 .loc 1 601 0
1181 00ec 144B ldr r3, .L18+8
1182 00ee 1A68 ldr r2, [r3]
1183 00f0 134B ldr r3, .L18+8
1184 00f2 1B68 ldr r3, [r3]
1185 00f4 5B88 ldrh r3, [r3, #2]
1186 00f6 9BB2 uxth r3, r3
1187 00f8 1449 ldr r1, .L18+20
1188 00fa 8C46 mov ip, r1
1189 00fc 6344 add r3, r3, ip
1190 00fe 9BB2 uxth r3, r3
1191 0100 5380 strh r3, [r2, #2]
1192 .L16:
602:../src/rls_m0.c **** g_qqueue->produced += numQvals;
1193 .loc 1 602 0 discriminator 2
1194 0102 0F4B ldr r3, .L18+8
1195 0104 1A68 ldr r2, [r3]
1196 0106 0E4B ldr r3, .L18+8
1197 0108 1B68 ldr r3, [r3]
1198 010a 9B88 ldrh r3, [r3, #4]
1199 010c 99B2 uxth r1, r3
1200 010e 7B69 ldr r3, [r7, #20]
1201 0110 9BB2 uxth r3, r3
1202 0112 CB18 adds r3, r1, r3
1203 0114 9BB2 uxth r3, r3
1204 0116 9380 strh r3, [r2, #4]
603:../src/rls_m0.c **** totalQvals += numQvals+1; // +1 because of beginning of line
1205 .loc 1 603 0 discriminator 2
1206 0118 7A69 ldr r2, [r7, #20]
1207 011a BB6A ldr r3, [r7, #40]
1208 011c D318 adds r3, r2, r3
1209 011e 0133 adds r3, r3, #1
1210 0120 BB62 str r3, [r7, #40]
588:../src/rls_m0.c **** {
1211 .loc 1 588 0 discriminator 2
1212 0122 FB6A ldr r3, [r7, #44]
1213 0124 0133 adds r3, r3, #1
1214 0126 FB62 str r3, [r7, #44]
1215 .L14:
588:../src/rls_m0.c **** {
1216 .loc 1 588 0 is_stmt 0 discriminator 1
1217 0128 FB6A ldr r3, [r7, #44]
1218 012a C72B cmp r3, #199
1219 012c 9AD9 bls .L17
604:../src/rls_m0.c **** }
605:../src/rls_m0.c **** return 0;
1220 .loc 1 605 0 is_stmt 1
1221 012e 0023 movs r3, #0
1222 .L13:
606:../src/rls_m0.c **** }
1223 .loc 1 606 0
1224 0130 1800 movs r0, r3
1225 0132 BD46 mov sp, r7
1226 0134 0DB0 add sp, sp, #52
1227 @ sp needed
1228 0136 F0BD pop {r4, r5, r6, r7, pc}
1229 .L19:
1230 .align 2
1231 .L18:
1232 0138 00000000 .word g_logLut
1233 013c 04610F40 .word 1074749700
1234 0140 00000000 .word g_qqueue
1235 0144 FE0B0000 .word 3070
1236 0148 FD0B0000 .word 3069
1237 014c 02F4FFFF .word -3070
1238 .cfi_endproc
1239 .LFE36:
1241 .section .rodata
1242 .align 2
1243 .LC4:
1244 0000 67657452 .ascii "getRLSFrame\000"
1244 4C534672
1244 616D6500
1245 .section .text.rls_init,"ax",%progbits
1246 .align 2
1247 .global rls_init
1248 .code 16
1249 .thumb_func
1251 rls_init:
1252 .LFB37:
607:../src/rls_m0.c ****
608:../src/rls_m0.c ****
609:../src/rls_m0.c **** int rls_init(void)
610:../src/rls_m0.c **** {
1253 .loc 1 610 0
1254 .cfi_startproc
1255 0000 80B5 push {r7, lr}
1256 .cfi_def_cfa_offset 8
1257 .cfi_offset 7, -8
1258 .cfi_offset 14, -4
1259 0002 00AF add r7, sp, #0
1260 .cfi_def_cfa_register 7
611:../src/rls_m0.c **** chirpSetProc("getRLSFrame", (ProcPtr)getRLSFrame);
1261 .loc 1 611 0
1262 0004 044A ldr r2, .L22
1263 0006 054B ldr r3, .L22+4
1264 0008 1100 movs r1, r2
1265 000a 1800 movs r0, r3
1266 000c FFF7FEFF bl chirpSetProc
612:../src/rls_m0.c **** return 0;
1267 .loc 1 612 0
1268 0010 0023 movs r3, #0
613:../src/rls_m0.c **** }
1269 .loc 1 613 0
1270 0012 1800 movs r0, r3
1271 0014 BD46 mov sp, r7
1272 @ sp needed
1273 0016 80BD pop {r7, pc}
1274 .L23:
1275 .align 2
1276 .L22:
1277 0018 00000000 .word getRLSFrame
1278 001c 00000000 .word .LC4
1279 .cfi_endproc
1280 .LFE37:
1282 .text
1283 .Letext0:
1284 .file 2 "/usr/local/lpcxpresso_8.1.4_606/lpcxpresso/tools/redlib/include/stdint.h"
1285 .file 3 "/home/weyoui/PROJECTS/SmartCart/Pixy/pixy/misc/gcc/m0/inc/lpc43xx.h"
1286 .file 4 "/home/weyoui/PROJECTS/SmartCart/Pixy/pixy/misc/gcc/m0/inc/chirp.h"
1287 .file 5 "/home/weyoui/PROJECTS/SmartCart/Pixy/pixy/misc/gcc/m0/inc/qqueue.h"
DEFINED SYMBOLS
*ABS*:00000000 rls_m0.c
/tmp/ccAP44Ld.s:24 .bss.g_logLut:00000000 g_logLut
/tmp/ccAP44Ld.s:21 .bss.g_logLut:00000000 $d
/tmp/ccAP44Ld.s:27 .text.lineProcessedRL0A:00000000 $t
/tmp/ccAP44Ld.s:32 .text.lineProcessedRL0A:00000000 lineProcessedRL0A
/tmp/ccAP44Ld.s:83 .text.lineProcessedRL0A:0000001c dest10A
/tmp/ccAP44Ld.s:107 .text.lineProcessedRL0A:00000026 loop5A
/tmp/ccAP44Ld.s:187 .text.lineProcessedRL0A:0000004c dest11A
/tmp/ccAP44Ld.s:221 .text.lineProcessedRL1A:00000000 $t
/tmp/ccAP44Ld.s:226 .text.lineProcessedRL1A:00000000 lineProcessedRL1A
/tmp/ccAP44Ld.s:281 .text.lineProcessedRL1A:00000020 dest12A
/tmp/ccAP44Ld.s:333 .text.lineProcessedRL1A:00000038 zero0
/tmp/ccAP44Ld.s:723 .text.lineProcessedRL1A:00000104 eol
/tmp/ccAP44Ld.s:350 .text.lineProcessedRL1A:00000040 zero1
/tmp/ccAP44Ld.s:495 .text.lineProcessedRL1A:00000088 one
/tmp/ccAP44Ld.s:797 .text.lineProcessedRL1A:00000130 eol0
/tmp/ccAP44Ld.s:809 .text.lineProcessedRL1A:00000134 dest20A
/tmp/ccAP44Ld.s:861 .text.lineProcessedRL1A:0000014c lcpy
/tmp/ccAP44Ld.s:913 .text.lineProcessedRL1A:00000162 ecpy
/tmp/ccAP44Ld.s:901 .text.lineProcessedRL1A:0000015e wrap
/tmp/ccAP44Ld.s:940 .text.intLog:00000000 $t
/tmp/ccAP44Ld.s:945 .text.intLog:00000000 intLog
/tmp/ccAP44Ld.s:970 .text.createLogLut:00000000 $t
/tmp/ccAP44Ld.s:975 .text.createLogLut:00000000 createLogLut
/tmp/ccAP44Ld.s:1025 .text.createLogLut:0000003c $d
/tmp/ccAP44Ld.s:1030 .text.getRLSFrame:00000000 $t
/tmp/ccAP44Ld.s:1035 .text.getRLSFrame:00000000 getRLSFrame
/tmp/ccAP44Ld.s:1232 .text.getRLSFrame:00000138 $d
/tmp/ccAP44Ld.s:1242 .rodata:00000000 $d
/tmp/ccAP44Ld.s:1246 .text.rls_init:00000000 $t
/tmp/ccAP44Ld.s:1251 .text.rls_init:00000000 rls_init
/tmp/ccAP44Ld.s:1277 .text.rls_init:00000018 $d
.debug_frame:00000010 $d
UNDEFINED SYMBOLS
callSyncM1
qq_free
qq_enqueue
skipLines
g_qqueue
chirpSetProc
| 40.843411 | 125 | 0.476857 |
cab6777854c70086e4fff4914643cda25489ff36 | 1,456 | asm | Assembly | programs/oeis/168/A168180.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/168/A168180.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/168/A168180.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A168180: a(n) = n^3*(n^5 + 1)/2.
; 0,1,132,3294,32800,195375,839916,2882572,8388864,21523725,50000500,107180106,214991712,407866459,737895900,1281447000,2147485696,3487881177,5509983204,8491784950,12800004000,18911434311,27437942092,39155498724,55037664000,76293953125,104413541076,141214778082,188901010144,250123218675,328050013500,426445533616,549755830272,703204327089,892896972100,1125937716750,1410554977056,1756239752287,2173896096684,2676004659900,3276800032000,3992462649021,4841326035252,5844100178554,7024111855200,8407562740875,10023806164636,11905643382792,14089640269824,16616465343625,19531250062500,22883972351526,26729864336032,31129845280119,36150980748300,41866969028500,48358655874816,55714578648597,64031540956564,73415218904850,83980800108000,95853656612131,109170052911612,124077890258784,140737488486400,159322406582625,180020303278596,203033838928702,228581619983904,256899187378575,288240050171500,322876765801836,361102068340992,403230046141549,449597370304500,500564575406250,556517393946976,617868146002107,685057185578844,758554405199800,838860800256000,926510094691641,1022070429603172,1126146116355414,1239379455837600,1362452625502375,1496089635850956,1641058358047812,1798172624368384,1968294403203525,2152336050364500,2351262638452546,2566094366077152,2797909048727379,3047844693120700,3317102156874000,3606947895361536,3918716797644817,4253815113379524,4613723472624750
mov $1,$0
pow $0,8
pow $1,3
add $0,$1
div $0,2
| 161.777778 | 1,372 | 0.900412 |
a1494726e0a563f57c2110b67f3452ded5b8121f | 6,911 | asm | Assembly | Transynther/x86/_processed/NC/_zr_/i7-7700_9_0x48_notsx.log_21829_157.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NC/_zr_/i7-7700_9_0x48_notsx.log_21829_157.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NC/_zr_/i7-7700_9_0x48_notsx.log_21829_157.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r12
push %r15
push %r8
push %r9
push %rax
push %rbx
push %rcx
push %rdi
push %rsi
lea addresses_WC_ht+0x17cc2, %rcx
nop
nop
nop
nop
cmp %r15, %r15
vmovups (%rcx), %ymm6
vextracti128 $0, %ymm6, %xmm6
vpextrq $1, %xmm6, %rbx
nop
nop
nop
nop
nop
and %r15, %r15
lea addresses_normal_ht+0x4102, %rbx
nop
cmp $35879, %r8
and $0xffffffffffffffc0, %rbx
vmovaps (%rbx), %ymm1
vextracti128 $1, %ymm1, %xmm1
vpextrq $1, %xmm1, %rax
nop
xor $41217, %rbx
lea addresses_WT_ht+0x1cea8, %r12
nop
nop
cmp %r9, %r9
mov (%r12), %ecx
nop
nop
nop
nop
nop
and %rax, %rax
lea addresses_normal_ht+0x193c2, %rsi
lea addresses_A_ht+0x9f02, %rdi
clflush (%rsi)
nop
nop
nop
nop
and %r15, %r15
mov $107, %rcx
rep movsl
nop
nop
xor %rcx, %rcx
lea addresses_UC_ht+0x4c2, %rsi
lea addresses_normal_ht+0x3a9a, %rdi
nop
nop
nop
nop
add %r15, %r15
mov $53, %rcx
rep movsw
nop
nop
nop
nop
add %rax, %rax
lea addresses_normal_ht+0xacc2, %rcx
nop
nop
nop
nop
inc %rdi
movw $0x6162, (%rcx)
nop
nop
nop
nop
nop
cmp $40627, %rsi
lea addresses_normal_ht+0x1cac2, %r12
nop
nop
nop
nop
cmp %r9, %r9
movups (%r12), %xmm5
vpextrq $0, %xmm5, %rdi
nop
nop
nop
dec %rsi
lea addresses_UC_ht+0x1a5d6, %rbx
nop
inc %r15
mov $0x6162636465666768, %r12
movq %r12, %xmm5
movups %xmm5, (%rbx)
nop
nop
nop
nop
cmp $26545, %rcx
lea addresses_D_ht+0x28c2, %r12
nop
nop
nop
dec %r8
mov $0x6162636465666768, %rcx
movq %rcx, %xmm0
movups %xmm0, (%r12)
nop
nop
nop
nop
nop
add %rdi, %rdi
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %rax
pop %r9
pop %r8
pop %r15
pop %r12
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r12
push %r8
push %r9
push %rbx
push %rdi
push %rdx
// Store
lea addresses_WC+0x722, %r9
sub $6397, %rdi
movb $0x51, (%r9)
// Exception!!!
nop
nop
nop
mov (0), %r9
nop
nop
nop
xor $11556, %r8
// Store
lea addresses_normal+0x1f47a, %rdi
nop
sub %rbx, %rbx
movb $0x51, (%rdi)
nop
nop
nop
dec %r12
// Faulty Load
mov $0x46906d0000000cc2, %rbx
nop
nop
nop
add $51634, %r9
mov (%rbx), %r12d
lea oracles, %rbx
and $0xff, %r12
shlq $12, %r12
mov (%rbx,%r12,1), %r12
pop %rdx
pop %rdi
pop %rbx
pop %r9
pop %r8
pop %r12
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 2, 'type': 'addresses_NC', 'congruent': 0}}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 1, 'type': 'addresses_WC', 'congruent': 3}, 'OP': 'STOR'}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 1, 'type': 'addresses_normal', 'congruent': 2}, 'OP': 'STOR'}
[Faulty Load]
{'OP': 'LOAD', 'src': {'same': True, 'NT': False, 'AVXalign': False, 'size': 4, 'type': 'addresses_NC', 'congruent': 0}}
<gen_prepare_buffer>
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 32, 'type': 'addresses_WC_ht', 'congruent': 11}}
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': True, 'size': 32, 'type': 'addresses_normal_ht', 'congruent': 3}}
{'OP': 'LOAD', 'src': {'same': True, 'NT': False, 'AVXalign': False, 'size': 4, 'type': 'addresses_WT_ht', 'congruent': 1}}
{'dst': {'same': False, 'congruent': 6, 'type': 'addresses_A_ht'}, 'OP': 'REPM', 'src': {'same': False, 'congruent': 8, 'type': 'addresses_normal_ht'}}
{'dst': {'same': False, 'congruent': 3, 'type': 'addresses_normal_ht'}, 'OP': 'REPM', 'src': {'same': False, 'congruent': 7, 'type': 'addresses_UC_ht'}}
{'dst': {'same': True, 'NT': False, 'AVXalign': False, 'size': 2, 'type': 'addresses_normal_ht', 'congruent': 11}, 'OP': 'STOR'}
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 16, 'type': 'addresses_normal_ht', 'congruent': 7}}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 16, 'type': 'addresses_UC_ht', 'congruent': 2}, 'OP': 'STOR'}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 16, 'type': 'addresses_D_ht', 'congruent': 10}, 'OP': 'STOR'}
{'00': 21829}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
| 32.753555 | 2,999 | 0.658371 |
45466804c000af232082c32c5c5e9fb35fe51808 | 3,689 | asm | Assembly | Transynther/x86/_processed/US/_zr_/i7-7700_9_0xca_notsx.log_21829_59.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/US/_zr_/i7-7700_9_0xca_notsx.log_21829_59.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/US/_zr_/i7-7700_9_0xca_notsx.log_21829_59.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r15
push %rax
push %rcx
push %rdx
// Faulty Load
lea addresses_US+0x18e82, %r10
clflush (%r10)
nop
nop
nop
nop
inc %rcx
mov (%r10), %ax
lea oracles, %r15
and $0xff, %rax
shlq $12, %rax
mov (%r15,%rax,1), %rax
pop %rdx
pop %rcx
pop %rax
pop %r15
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'src': {'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 0, 'same': False, 'type': 'addresses_US'}, 'OP': 'LOAD'}
[Faulty Load]
{'src': {'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 0, 'same': True, 'type': 'addresses_US'}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'00': 21829}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
| 85.790698 | 2,999 | 0.663866 |
7fcb9fd28962bf3cbd6e7f6b770f3ab05a86e2f4 | 2,333 | asm | Assembly | MasmEd/Addins/Project/ProjectOption.asm | CherryDT/FbEditMOD | beb0eb22cae1b8f7203d55bd6b293d8ec88231ca | [
"Unlicense"
] | 11 | 2016-12-03T16:35:42.000Z | 2022-03-26T06:02:53.000Z | MasmEd/Addins/Project/ProjectOption.asm | CherryDT/FbEditMOD | beb0eb22cae1b8f7203d55bd6b293d8ec88231ca | [
"Unlicense"
] | 1 | 2018-02-24T20:17:46.000Z | 2018-03-02T08:57:40.000Z | MasmEd/Addins/Project/ProjectOption.asm | CherryDT/FbEditMOD | beb0eb22cae1b8f7203d55bd6b293d8ec88231ca | [
"Unlicense"
] | 4 | 2018-10-19T01:14:55.000Z | 2021-09-11T18:51:48.000Z |
;ProjectOption.dlg
IDD_DLGOPTION equ 3000
IDC_EDTBACKUP equ 1001
IDC_UDNBACKUP equ 1002
IDC_EDTTEXT equ 1003
IDC_EDTBINARY equ 1004
IDC_EDTMINOR equ 1005
.code
ProjectOptionProc proc uses ebx,hWin:HWND,uMsg:UINT,wParam:WPARAM,lParam:LPARAM
LOCAL buffer[MAX_PATH]:BYTE
mov eax,uMsg
.if eax==WM_INITDIALOG
invoke SendDlgItemMessage,hWin,IDC_UDNBACKUP,UDM_SETRANGE,0,9 ; Set range
invoke SendDlgItemMessage,hWin,IDC_UDNBACKUP,UDM_SETPOS,0,nBackup ; Set default value
invoke SendDlgItemMessage,hWin,IDC_EDTTEXT,EM_LIMITTEXT,255,0
invoke SetDlgItemText,hWin,IDC_EDTTEXT,offset szTxt
invoke SendDlgItemMessage,hWin,IDC_EDTBINARY,EM_LIMITTEXT,255,0
invoke SetDlgItemText,hWin,IDC_EDTBINARY,offset szBin
mov ebx,lpData
.if [ebx].ADDINDATA.szSessionFile
invoke GetDlgItem,hWin,IDC_EDTMINOR
invoke EnableWindow,eax,TRUE
invoke GetPrivateProfileString,addr szSession,addr szMinorFiles,addr szNULL,addr buffer,sizeof buffer,addr [ebx].ADDINDATA.szSessionFile
invoke SetDlgItemText,hWin,IDC_EDTMINOR,addr buffer
.endif
.elseif eax==WM_COMMAND
mov edx,wParam
movzx eax,dx
shr edx,16
.if edx==BN_CLICKED
.if eax==IDOK
mov ebx,lpHandles
invoke GetDlgItemInt,hWin,IDC_EDTBACKUP,offset nBackup,FALSE
mov nBackup,eax
invoke RegSetValueEx,[ebx].ADDINHANDLES.hReg,addr szBackups,0,REG_DWORD,addr nBackup,4
invoke GetDlgItemText,hWin,IDC_EDTTEXT,offset szTxt,sizeof szTxt
invoke RegSetValueEx,[ebx].ADDINHANDLES.hReg,addr szTextFiles,0,REG_SZ,addr szTxt,addr [eax+1]
invoke GetDlgItemText,hWin,IDC_EDTBINARY,offset szBin,sizeof szBin
invoke RegSetValueEx,[ebx].ADDINHANDLES.hReg,addr szBinaryFiles,0,REG_SZ,addr szBin,addr [eax+1]
mov ebx,lpData
.if [ebx].ADDINDATA.szSessionFile
invoke GetDlgItemText,hWin,IDC_EDTMINOR,addr buffer,sizeof buffer-1
invoke WritePrivateProfileString,addr szSession,addr szMinorFiles,addr buffer,addr [ebx].ADDINDATA.szSessionFile
.endif
invoke SendMessage,hWin,WM_CLOSE,NULL,NULL
.elseif eax==IDCANCEL
invoke SendMessage,hWin,WM_CLOSE,NULL,NULL
.endif
.endif
.elseif eax==WM_CLOSE
invoke EndDialog,hWin,NULL
.else
mov eax,FALSE
ret
.endif
mov eax,TRUE
ret
ProjectOptionProc endp
| 36.453125 | 140 | 0.756537 |
42be5939ddbab4fa8b2e1bb571e240ae04df04fa | 1,099 | asm | Assembly | libsrc/target/z88/input/in_Inkey.asm | ahjelm/z88dk | c4de367f39a76b41f6390ceeab77737e148178fa | [
"ClArtistic"
] | 640 | 2017-01-14T23:33:45.000Z | 2022-03-30T11:28:42.000Z | libsrc/target/z88/input/in_Inkey.asm | C-Chads/z88dk | a4141a8e51205c6414b4ae3263b633c4265778e6 | [
"ClArtistic"
] | 1,600 | 2017-01-15T16:12:02.000Z | 2022-03-31T12:11:12.000Z | libsrc/target/z88/input/in_Inkey.asm | C-Chads/z88dk | a4141a8e51205c6414b4ae3263b633c4265778e6 | [
"ClArtistic"
] | 215 | 2017-01-17T10:43:03.000Z | 2022-03-23T17:25:02.000Z | ; uint in_Inkey(void)
; Read current state of keyboard
SECTION code_clib
PUBLIC in_Inkey
PUBLIC _in_Inkey
EXTERN in_keytranstbl
; exit : carry set and HL = 0 for no keys registered
; else HL = ASCII character code
; uses : AF,BC,DE,HL
.in_Inkey
._in_Inkey
ld de,0
ld bc,$7fb2
in a,(c)
cpl
and 127 ;Exclude RSH
jr nz,gotkey
rrc b
ld e,8
in a,(c)
cpl
and @10101111 ;Exclude RSH, DIA
jr nz,gotkey
rrc b
ld e,16
read_loop:
in a,(c)
cpl
and a
jr nz,gotkey
ld a,e
add 8
ld e,a
rrc b
jr c,read_loop
nokey:
ld hl,0
scf
ret
gotkey:
rlca
jr c,rot_done
inc e
jr gotkey
rot_done:
; de = key index
; Check for modifiers
ld hl,in_keytranstbl + 64
ld bc,$7fb2
in a,(c)
bit 7,a ;LSH
jr z,add_modifier
rrc b
in a,(c)
bit 6,a ;RSH
jr z,add_modifier
ld hl,in_keytranstbl + 128
bit 4,a ;DIA
jr z,add_modifier
ld hl,in_keytranstbl
add_modifier:
add hl,de
ld a,(hl)
cp 255
jr z,nokey
ld l,a
ld h,0
and a
ret
| 13.911392 | 52 | 0.585077 |
96ab790bf1f3f1c36ecb20cfbe90a54fe8f53b34 | 469 | asm | Assembly | libsrc/graphics/attache/swapgfxbk.asm | Toysoft/z88dk | f930bef9ac4feeec91a07303b79ddd9071131a24 | [
"ClArtistic"
] | null | null | null | libsrc/graphics/attache/swapgfxbk.asm | Toysoft/z88dk | f930bef9ac4feeec91a07303b79ddd9071131a24 | [
"ClArtistic"
] | null | null | null | libsrc/graphics/attache/swapgfxbk.asm | Toysoft/z88dk | f930bef9ac4feeec91a07303b79ddd9071131a24 | [
"ClArtistic"
] | 1 | 2019-12-03T23:28:20.000Z | 2019-12-03T23:28:20.000Z | ;
; Otrona Attachè graphics lib
; Stefano Bodrato 2018
;
;
; Video memory paging.
;
;
; $Id: swapgfxbk.asm $
;
SECTION code_clib
PUBLIC swapgfxbk
PUBLIC _swapgfxbk
PUBLIC swapgfxbk1
PUBLIC _swapgfxbk1
EXTERN GFX_COUT
.swapgfxbk
._swapgfxbk
ret
.swapgfxbk1
._swapgfxbk1
LD C,27
CALL GFX_COUT
LD C,'8' ; 8/9 = plot/unplot mode
JP GFX_COUT
| 13.794118 | 40 | 0.547974 |
37ed2563c6bfbfa5b495b350239cfa38864b7479 | 986 | asm | Assembly | programs/oeis/198/A198794.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/198/A198794.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/198/A198794.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A198794: a(n) = 5*6^n - 1.
; 4,29,179,1079,6479,38879,233279,1399679,8398079,50388479,302330879,1813985279,10883911679,65303470079,391820820479,2350924922879,14105549537279,84633297223679,507799783342079,3046798700052479,18280792200314879,109684753201889279,658108519211335679,3948651115268014079,23691906691608084479,142151440149648506879,852908640897891041279,5117451845387346247679,30704711072324077486079,184228266433944464916479,1105369598603666789498879,6632217591622000736993279,39793305549732004421959679,238759833298392026531758079,1432558999790352159190548479,8595353998742112955143290879,51572123992452677730859745279,309432743954716066385158471679,1856596463728296398310950830079,11139578782369778389865704980479,66837472694218670339194229882879,401024836165312022035165379297279,2406149016991872132210992275783679,14436894101951232793265953654702079,86621364611707396759595721928212479,519728187670244380557574331569274879
mov $1,6
pow $1,$0
mul $1,5
sub $1,1
mov $0,$1
| 109.555556 | 908 | 0.911765 |
24cf95b02d4e45dc8fb78511bb655d64c3f09b94 | 282 | asm | Assembly | libsrc/_DEVELOPMENT/adt/p_forward_list/c/sdcc_iy/p_forward_list_pop_front_fastcall.asm | meesokim/z88dk | 5763c7778f19a71d936b3200374059d267066bb2 | [
"ClArtistic"
] | null | null | null | libsrc/_DEVELOPMENT/adt/p_forward_list/c/sdcc_iy/p_forward_list_pop_front_fastcall.asm | meesokim/z88dk | 5763c7778f19a71d936b3200374059d267066bb2 | [
"ClArtistic"
] | null | null | null | libsrc/_DEVELOPMENT/adt/p_forward_list/c/sdcc_iy/p_forward_list_pop_front_fastcall.asm | meesokim/z88dk | 5763c7778f19a71d936b3200374059d267066bb2 | [
"ClArtistic"
] | null | null | null |
; void *p_forward_list_pop_front_fastcall(p_forward_list_t *list)
SECTION code_adt_p_forward_list
PUBLIC _p_forward_list_pop_front_fastcall
defc _p_forward_list_pop_front_fastcall = asm_p_forward_list_pop_front
INCLUDE "adt/p_forward_list/z80/asm_p_forward_list_pop_front.asm"
| 25.636364 | 70 | 0.890071 |
0277f85155f21b4ae8d21a0060cbb39301100c50 | 9,349 | asm | Assembly | snapgear_linux/lib/libgmp/mpn/x86/k7/mmx/rshift.asm | impedimentToProgress/UCI-BlueChip | 53e5d48b79079eaf60d42f7cb65bb795743d19fc | [
"MIT"
] | null | null | null | snapgear_linux/lib/libgmp/mpn/x86/k7/mmx/rshift.asm | impedimentToProgress/UCI-BlueChip | 53e5d48b79079eaf60d42f7cb65bb795743d19fc | [
"MIT"
] | null | null | null | snapgear_linux/lib/libgmp/mpn/x86/k7/mmx/rshift.asm | impedimentToProgress/UCI-BlueChip | 53e5d48b79079eaf60d42f7cb65bb795743d19fc | [
"MIT"
] | 3 | 2016-06-13T13:20:56.000Z | 2019-12-05T02:31:23.000Z | # AMD K7 mpn_rshift -- mpn right shift.
#
# K7: 1.21 cycles/limb (at 16 limbs/loop).
# Copyright (C) 1999, 2000 Free Software Foundation, Inc.
#
# This file is part of the GNU MP Library.
#
# The GNU MP Library is free software; you can redistribute it and/or modify
# it under the terms of the GNU Library General Public License as published by
# the Free Software Foundation; either version 2 of the License, or (at your
# option) any later version.
#
# The GNU MP Library is distributed in the hope that it will be useful, but
# WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Library General Public
# License for more details.
#
# You should have received a copy of the GNU Library General Public License
# along with the GNU MP Library; see the file COPYING.LIB. If not, write to
# the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston,
# MA 02111-1307, USA.
include(`../config.m4')
dnl K7: UNROLL_COUNT cycles/limb
dnl 4 1.51
dnl 8 1.26
dnl 16 1.21
dnl 32 1.2
dnl Maximum possible with the current code is 64.
deflit(UNROLL_COUNT, 16)
# mp_limb_t mpn_rshift (mp_ptr dst, mp_srcptr src, mp_size_t size,
# unsigned shift);
#
# Shift src,size right by shift many bits and store the result in dst,size.
# Zeros are shifted in at the left. The bits shifted out at the right are
# the return value.
#
# This code uses 64-bit MMX operations, which makes it possible to handle
# two limbs at a time, for a theoretical 1.0 cycles/limb. Plain integer
# code, on the other hand, suffers from shrd being a vector path decode and
# running at 3 cycles back-to-back.
#
# Full speed depends on source and destination being aligned, and some hairy
# setups and finish-ups are done to arrange this for the loop.
ifdef(`PIC',`
deflit(UNROLL_THRESHOLD, 10)
',`
deflit(UNROLL_THRESHOLD, 10)
')
defframe(PARAM_SHIFT,16)
defframe(PARAM_SIZE, 12)
defframe(PARAM_SRC, 8)
defframe(PARAM_DST, 4)
defframe(SAVE_EDI, -4)
defframe(SAVE_ESI, -8)
defframe(SAVE_EBX, -12)
deflit(SAVE_SIZE, 12)
.text
ALIGN(32)
PROLOGUE(mpn_rshift)
deflit(`FRAME',0)
movl PARAM_SIZE, %eax
movl PARAM_SRC, %edx
subl $SAVE_SIZE, %esp
deflit(`FRAME',SAVE_SIZE)
movl PARAM_SHIFT, %ecx
movl %edi, SAVE_EDI
movl PARAM_DST, %edi
decl %eax
jnz L(more_than_one_limb)
movl (%edx), %edx # src limb
shrdl( %cl, %edx, %eax) # eax was decremented to zero
shrl %cl, %edx
movl %edx, (%edi) # dst limb
movl SAVE_EDI, %edi
addl $SAVE_SIZE, %esp
ret
#------------------------------------------------------------------------------
L(more_than_one_limb):
# eax size-1
# ebx
# ecx shift
# edx src
# esi
# edi dst
# ebp
movd PARAM_SHIFT, %mm6 # rshift
movd (%edx), %mm5 # src low limb
cmp $UNROLL_THRESHOLD-1, %eax
jae L(unroll)
leal (%edx,%eax,4), %edx # &src[size-1]
leal -4(%edi,%eax,4), %edi # &dst[size-2]
movd (%edx), %mm4 # src high limb
negl %eax
L(simple_top):
# eax loop counter, limbs, negative
# ebx
# ecx shift
# edx carry
# edx &src[size-1]
# edi &dst[size-2]
# ebp
#
# mm0 scratch
# mm4 src high limb
# mm5 src low limb
# mm6 shift
movq (%edx,%eax,4), %mm0
incl %eax
psrlq %mm6, %mm0
movd %mm0, (%edi,%eax,4)
jnz L(simple_top)
psllq $32, %mm5
psrlq %mm6, %mm4
psrlq %mm6, %mm5
movd %mm4, 4(%edi) # dst high limb
movd %mm5, %eax # return value
movl SAVE_EDI, %edi
addl $SAVE_SIZE, %esp
emms
ret
#--------------------------------------------------------------------------
ALIGN(16)
L(unroll):
# eax size-1
# ebx
# ecx shift
# edx src
# esi
# edi dst
# ebp
#
# mm5 src low limb
# mm6 rshift
testb $4, %dl
movl %esi, SAVE_ESI
movl %ebx, SAVE_EBX
psllq $32, %mm5
jz L(start_src_aligned)
# src isn't aligned, process low limb separately (marked xxx) and
# step src and dst by one limb, making src aligned.
#
# source edx
# --+-------+-------+-------+
# | xxx |
# --+-------+-------+-------+
# 4mod8 0mod8 4mod8
#
# dest edi
# --+-------+-------+
# | | xxx |
# --+-------+-------+
movq (%edx), %mm0 # src low two limbs
addl $4, %edx
movl %eax, PARAM_SIZE # size-1
addl $4, %edi
decl %eax # size-2 is new size-1
psrlq %mm6, %mm0
movl %edi, PARAM_DST # new dst
movd %mm0, -4(%edi)
L(start_src_aligned):
movq (%edx), %mm1 # src low two limbs
decl %eax # size-2, two last limbs handled at end
testl $4, %edi
psrlq %mm6, %mm5
jz L(start_dst_aligned)
# dst isn't aligned, add 4 to make it so, and pretend the shift is
# 32 bits extra. Low limb of dst (marked xxx) handled here separately.
#
# source edx
# --+-------+-------+
# | mm1 |
# --+-------+-------+
# 4mod8 0mod8
#
# dest edi
# --+-------+-------+-------+
# | xxx |
# --+-------+-------+-------+
# 4mod8 0mod8 4mod8
movq %mm1, %mm0
psrlq %mm6, %mm1
addl $32, %ecx # shift+32
movd %mm1, (%edi)
movq %mm0, %mm1
addl $4, %edi # new dst
movd %ecx, %mm6
L(start_dst_aligned):
movq %mm1, %mm2 # copy of src low two limbs
negl %ecx
andl $~1, %eax # round size down to even
movl %eax, %ebx
negl %eax
addl $64, %ecx
andl $UNROLL_MASK, %eax
decl %ebx
shll %eax
movd %ecx, %mm7 # lshift = 64-rshift
ifdef(`PIC',`
call L(pic_calc)
L(here):
',`
leal L(entry) (%eax,%eax,4), %esi
negl %eax
')
shrl $UNROLL_LOG2, %ebx # loop counter
leal ifelse(UNROLL_BYTES,256,128+) 8(%edx,%eax,2), %edx
leal ifelse(UNROLL_BYTES,256,128) (%edi,%eax,2), %edi
movl PARAM_SIZE, %eax # for use at end
jmp *%esi
ifdef(`PIC',`
L(pic_calc):
# See README.family about old gas bugs
leal (%eax,%eax,4), %esi
addl $L(entry)-L(here), %esi
addl (%esp), %esi
negl %eax
ret
')
#------------------------------------------------------------------------------
ALIGN(64)
L(top):
# eax size, for use at end
# ebx loop counter
# ecx lshift
# edx src
# esi was computed jump
# edi dst
# ebp
#
# mm0 scratch
# mm1 \ carry (alternating)
# mm2 /
# mm6 rshift
# mm7 lshift
#
# 10 code bytes/limb
#
# The two chunks differ in whether mm1 or mm2 hold the carry.
# The computed jump puts the initial carry in both mm1 and mm2.
L(entry):
deflit(CHUNK_COUNT, 4)
forloop(i, 0, UNROLL_COUNT/CHUNK_COUNT-1, `
deflit(`disp0', eval(i*CHUNK_COUNT*4 ifelse(UNROLL_BYTES,256,-128)))
deflit(`disp1', eval(disp0 + 8))
movq disp0(%edx), %mm0
psrlq %mm6, %mm2
movq %mm0, %mm1
psllq %mm7, %mm0
por %mm2, %mm0
movq %mm0, disp0(%edi)
movq disp1(%edx), %mm0
psrlq %mm6, %mm1
movq %mm0, %mm2
psllq %mm7, %mm0
por %mm1, %mm0
movq %mm0, disp1(%edi)
')
addl $UNROLL_BYTES, %edx
addl $UNROLL_BYTES, %edi
decl %ebx
jns L(top)
deflit(`disp0', ifelse(UNROLL_BYTES,256,-128))
deflit(`disp1', eval(disp0-0 + 8))
testb $1, %al
psrlq %mm6, %mm2 # wanted rshifted in all cases below
movl SAVE_ESI, %esi
movd %mm5, %eax # return value
movl SAVE_EBX, %ebx
jz L(end_even)
# Size odd, destination was aligned.
#
# source
# edx
# +-------+---------------+--
# | | mm2 |
# +-------+---------------+--
#
# dest edi
# +-------+---------------+---------------+--
# | | | written |
# +-------+---------------+---------------+--
#
# mm6 = shift
# mm7 = ecx = 64-shift
# Size odd, destination was unaligned.
#
# source
# edx
# +-------+---------------+--
# | | mm2 |
# +-------+---------------+--
#
# dest edi
# +---------------+---------------+--
# | | written |
# +---------------+---------------+--
#
# mm6 = shift+32
# mm7 = ecx = 64-(shift+32)
# In both cases there's one extra limb of src to fetch and combine
# with mm2 to make a qword to store, and in the aligned case there's
# a further extra limb of dst to be formed.
movd disp0(%edx), %mm0
movq %mm0, %mm1
psllq %mm7, %mm0
testb $32, %cl
por %mm2, %mm0
psrlq %mm6, %mm1
movq %mm0, disp0(%edi)
jz L(finish_odd_unaligned)
movd %mm1, disp1(%edi)
L(finish_odd_unaligned):
movl SAVE_EDI, %edi
addl $SAVE_SIZE, %esp
emms
ret
L(end_even):
# Size even, destination was aligned.
#
# source
# +---------------+--
# | mm2 |
# +---------------+--
#
# dest edi
# +---------------+---------------+--
# | | mm3 |
# +---------------+---------------+--
#
# mm6 = shift
# mm7 = ecx = 64-shift
# Size even, destination was unaligned.
#
# source
# +---------------+--
# | mm2 |
# +---------------+--
#
# dest edi
# +-------+---------------+--
# | | mm3 |
# +-------+---------------+--
#
# mm6 = shift+32
# mm7 = 64-(shift+32)
# The movd for the unaligned case is the same data as the movq for
# the aligned case, it's just a choice between whether one or two
# limbs should be written.
testb $32, %cl
movd %mm2, disp0(%edi)
jz L(end_even_unaligned)
movq %mm2, disp0(%edi)
L(end_even_unaligned):
movl SAVE_EDI, %edi
addl $SAVE_SIZE, %esp
emms
ret
EPILOGUE()
| 19.807203 | 79 | 0.551717 |
663f44024928d430bc2271faf98cd0502515935c | 794 | asm | Assembly | programs/oeis/173/A173737.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/173/A173737.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/173/A173737.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A173737: (10^n+44)/9 for n>0.
; 6,16,116,1116,11116,111116,1111116,11111116,111111116,1111111116,11111111116,111111111116,1111111111116,11111111111116,111111111111116,1111111111111116,11111111111111116,111111111111111116,1111111111111111116,11111111111111111116,111111111111111111116,1111111111111111111116,11111111111111111111116,111111111111111111111116,1111111111111111111111116,11111111111111111111111116,111111111111111111111111116,1111111111111111111111111116,11111111111111111111111111116,111111111111111111111111111116,1111111111111111111111111111116,11111111111111111111111111111116,111111111111111111111111111111116,1111111111111111111111111111111116,11111111111111111111111111111111116,111111111111111111111111111111111116
add $0,1
mov $1,10
pow $1,$0
div $1,9
add $1,5
mov $0,$1
| 79.4 | 703 | 0.900504 |
ca21b00d7eb220deb889d2d879b6f008531645dd | 528 | asm | Assembly | programs/oeis/007/A007064.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/007/A007064.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/007/A007064.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A007064: Numbers not of form "nearest integer to n*tau", tau=(1+sqrt(5))/2.
; 1,4,7,9,12,14,17,20,22,25,27,30,33,35,38,41,43,46,48,51,54,56,59,62,64,67,69,72,75,77,80,82,85,88,90,93,96,98,101,103,106,109,111,114,117,119,122,124,127,130,132,135,137,140,143,145,148,151,153,156,158,161,164,166,169,171,174,177,179,182,185,187,190,192,195,198,200,203,206,208,211,213,216,219,221,224,226,229,232,234,237,240,242,245,247,250,253,255,258,260
seq $0,184517 ; Upper s-Wythoff sequence, where s=4n-2. Complement of A184516.
div $0,2
| 88 | 359 | 0.710227 |
0f83c9f80f6b61833ce62a1b328c110b738dd280 | 6,246 | asm | Assembly | Transynther/x86/_processed/US/_zr_/i7-8650U_0xd2.log_17071_222.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/US/_zr_/i7-8650U_0xd2.log_17071_222.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/US/_zr_/i7-8650U_0xd2.log_17071_222.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r13
push %rax
push %rbp
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_A_ht+0x1b689, %rsi
lea addresses_A_ht+0x15009, %rdi
nop
nop
xor $15513, %rdx
mov $126, %rcx
rep movsb
nop
xor $17975, %r13
lea addresses_A_ht+0x156fd, %rbp
nop
nop
nop
nop
xor %r13, %r13
mov $0x6162636465666768, %rsi
movq %rsi, %xmm3
vmovups %ymm3, (%rbp)
dec %rsi
lea addresses_normal_ht+0x309, %rbp
nop
nop
add %r10, %r10
movl $0x61626364, (%rbp)
nop
nop
nop
nop
nop
cmp $50839, %rdx
lea addresses_WT_ht+0x1b609, %rsi
nop
nop
nop
nop
xor %rdx, %rdx
mov $0x6162636465666768, %rbp
movq %rbp, (%rsi)
nop
nop
nop
nop
nop
inc %rcx
lea addresses_WT_ht+0x13e09, %rsi
lea addresses_WC_ht+0xf109, %rdi
clflush (%rdi)
nop
nop
nop
nop
lfence
mov $64, %rcx
rep movsq
nop
nop
sub %r10, %r10
lea addresses_WT_ht+0x16af1, %rsi
lea addresses_A_ht+0xff09, %rdi
clflush (%rsi)
nop
nop
nop
nop
nop
and %rax, %rax
mov $35, %rcx
rep movsl
add %rdx, %rdx
lea addresses_WT_ht+0xeb89, %rdx
nop
nop
nop
inc %rbp
movb (%rdx), %al
nop
sub %rdi, %rdi
lea addresses_normal_ht+0x7049, %rsi
lea addresses_normal_ht+0x1e189, %rdi
clflush (%rsi)
xor $35564, %rdx
mov $90, %rcx
rep movsb
nop
nop
cmp %r10, %r10
lea addresses_UC_ht+0x11309, %rax
nop
nop
sub %r10, %r10
mov (%rax), %edx
nop
nop
nop
inc %r10
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbp
pop %rax
pop %r13
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r12
push %r14
push %r8
push %rbp
push %rdx
// Faulty Load
lea addresses_US+0xab09, %rbp
nop
nop
nop
nop
nop
dec %rdx
mov (%rbp), %r12d
lea oracles, %rdx
and $0xff, %r12
shlq $12, %r12
mov (%rdx,%r12,1), %r12
pop %rdx
pop %rbp
pop %r8
pop %r14
pop %r12
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'type': 'addresses_US', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': False}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'type': 'addresses_US', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': True}}
<gen_prepare_buffer>
{'OP': 'REPM', 'src': {'type': 'addresses_A_ht', 'congruent': 7, 'same': False}, 'dst': {'type': 'addresses_A_ht', 'congruent': 8, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_A_ht', 'size': 32, 'AVXalign': False, 'NT': False, 'congruent': 2, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_normal_ht', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 10, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WT_ht', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 8, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_WT_ht', 'congruent': 6, 'same': True}, 'dst': {'type': 'addresses_WC_ht', 'congruent': 8, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_WT_ht', 'congruent': 2, 'same': False}, 'dst': {'type': 'addresses_A_ht', 'congruent': 10, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_WT_ht', 'size': 1, 'AVXalign': False, 'NT': True, 'congruent': 7, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_normal_ht', 'congruent': 6, 'same': True}, 'dst': {'type': 'addresses_normal_ht', 'congruent': 7, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_UC_ht', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 9, 'same': False}}
{'00': 17071}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
| 38.319018 | 2,999 | 0.661864 |
ea13d09cf73713b5e369b3303ee182e2e28cab75 | 581 | asm | Assembly | programs/oeis/031/A031393.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/031/A031393.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/031/A031393.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A031393: a(n) = prime(6*n - 4).
; 3,19,43,71,101,131,163,193,229,263,293,337,373,409,443,479,521,569,601,641,673,719,757,809,839,881,929,971,1013,1049,1091,1123,1181,1223,1277,1301,1361,1423,1451,1487,1531,1571,1609,1657,1699,1747,1789,1861,1889,1949,1997,2029,2083,2129,2161,2237,2273,2311,2357,2393,2441,2503,2551,2617,2663,2693,2729,2777,2819,2861,2917,2969,3023,3079,3137,3191,3251,3301,3331,3373,3449,3491,3533,3571,3617,3671,3709,3767,3821,3863,3917,3947,4013,4057,4111,4157,4219,4259,4297,4363
mul $0,6
seq $0,98090 ; Numbers k such that 2k-3 is prime.
mul $0,2
sub $0,3
| 72.625 | 468 | 0.746988 |
b03cd60837d3eb7ca480c48fdddae08d52e1c67b | 681 | asm | Assembly | oeis/304/A304169.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/304/A304169.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/304/A304169.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A304169: a(n) = 16*3^n + 2^(n+1) - 26 (n>=1).
; Submitted by Jon Maiga
; 26,126,422,1302,3926,11766,35222,105462,315926,946806,2838422,8511222,25525526,76560246,229648022,688878582,2066504726,6199252086,18597232022,55790647542,167369845526,502105342326,1506307638422,4518906138102,13556684859926,40669987470966,122009828195222,366029216150262,1098087111579926,3294260260998006,9882778635510422,29648331611564022,88944986244757526,266834941554403446,800504790303472022,2401514302190939382,7204542769133864726,21613628032523687286,64840883547815248022,194522649543934116342
mov $1,3
pow $1,$0
mul $1,24
mov $2,2
pow $2,$0
mul $2,2
add $1,$2
mov $0,$1
sub $0,26
mul $0,2
add $0,26
| 42.5625 | 500 | 0.816446 |
8198746ebd327bc7f74c1081b8708870f6725103 | 700 | asm | Assembly | oeis/042/A042127.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/042/A042127.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/042/A042127.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A042127: Denominators of continued fraction convergents to sqrt(588).
; Submitted by Jon Maiga
; 1,4,193,776,37441,150540,7263361,29203984,1409054593,5665422356,273349327681,1099062733080,53028360515521,213212504795164,10287228590683393,41362126867528736,1995669318232062721,8024039399795779620,387149560508429484481,1556622281433513717544,75105019069317087926593,301976698558701865423916,14569986549887006628274561,58581922898106728378522160,2826502285659009968797338241,11364591065534146603567875124,548326873431298046940055344193,2204672084790726334363789251896
add $0,1
mov $3,1
lpb $0
sub $0,1
add $2,$3
mov $3,$1
mov $1,$2
dif $2,12
mul $2,24
add $3,$2
lpe
mov $0,$2
div $0,24
| 38.888889 | 469 | 0.831429 |
6b69f8096c75e91b01ba85c8aab10b631a72a718 | 670 | asm | Assembly | oeis/323/A323223.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/323/A323223.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/323/A323223.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A323223: a(n) = [x^n] x/((1 - x)*(1 - 4*x)^(5/2)).
; 0,1,11,81,501,2811,14823,74883,366603,1752273,8218733,37964449,173172249,781607349,3496163949,15517771749,68412846069,299828796219,1307168814519,5672308893819,24511334499219,105519144602439,452695473616239,1936085243038839,8256615564926439,35118869432948739,149014825833363291,630882333681271011,2665434033483548051,11239616196936001291,47310313574218735611,198807242558806219755,834116944752237604875,3494476322687231530065,14619615539506297035405,61083432268574158851825,254903924909828668143177
lpb $0
mov $2,$0
sub $0,1
seq $2,51133 ; a(n) = binomial(2n,n)*n*(2n+1)/2.
add $1,$2
lpe
div $1,3
mov $0,$1
| 55.833333 | 499 | 0.804478 |
dffe59b049ddf7224cf6d5b2805c227c4d761a6d | 209 | asm | Assembly | x86-x64/f1.asm | Unshifted1337/AssemblyExercises | 450296482b0bda667f222749ee31a0e6f6fee026 | [
"MIT"
] | null | null | null | x86-x64/f1.asm | Unshifted1337/AssemblyExercises | 450296482b0bda667f222749ee31a0e6f6fee026 | [
"MIT"
] | null | null | null | x86-x64/f1.asm | Unshifted1337/AssemblyExercises | 450296482b0bda667f222749ee31a0e6f6fee026 | [
"MIT"
] | null | null | null | f1:
xorl %eax, %eax
L2:
movsbq (%rdi), %rdx
subq $48, %rdx
cmpq $9, %rdx
ja L5
imulq $10, %rax, %rax
incq %rdi
addq %rdx, %rax
jmp L2
L5:
ret
| 14.928571 | 27 | 0.416268 |
6a08429900a3714c2b3a3c15c38d215df45be187 | 1,134 | asm | Assembly | primeNumber.asm | nathalie-tate/MIPS | 6804b0699ddbd50a13a620e775d39d1e60de41e5 | [
"MIT"
] | null | null | null | primeNumber.asm | nathalie-tate/MIPS | 6804b0699ddbd50a13a620e775d39d1e60de41e5 | [
"MIT"
] | null | null | null | primeNumber.asm | nathalie-tate/MIPS | 6804b0699ddbd50a13a620e775d39d1e60de41e5 | [
"MIT"
] | null | null | null | # primeNumber.asm
# Nathalie Tate
# This code is freely available to be modified and distrubuted under the terms
# of the MIT License.
#
# Checks if the entered number is prime
# Note that this is an extremely inefficient solution, but I don't feel like
# coding a better solution in assembly code
.data
PROMPT1:.asciiz "Please enter an integer: "
PROMPT2:.asciiz "Your number is prime.\n"
PROMPT3:.asciiz "Your number is not prime.\n"
.text
.globl main
main:
li $v0, 4
la $a0, PROMPT1
syscall #Ask for user input
li $v0, 5
syscall #Accept user input
move $s0, $v0 #Store user input in $s0
li $t1, 1 #initialize variables
li $t2, 2
slt $t0, $s0, $t2 #not prime if < 2
beq $t1, $t0, NOTPRIME
LOOP:
beq $s0, $t2, PRIME #prime
div $s0, $t2
mfhi $t0
beq $t0, $zero, NOTPRIME #not prime if remainder == 0
addi $t2, $t2, 1 #increment
j LOOP
PRIME:
li $v0, 4
la $a0, PROMPT2
syscall #Display results
li $v0, 10
syscall #Exit
NOTPRIME:
li $v0, 4
la $a0, PROMPT3
syscall #Display results
li $v0, 10
syscall #Exit
| 19.894737 | 79 | 0.634921 |
6a0d5957c96f442b1c3dbc4e3584f937f4b430eb | 560 | asm | Assembly | oeis/017/A017506.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/017/A017506.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/017/A017506.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A017506: a(n) = (11*n + 9)^10.
; 3486784401,10240000000000,819628286980801,17080198121677824,174887470365513049,1152921504606846976,5631351470947265625,22130157888803070976,73742412689492826049,215892499727278669824,569468379011812486801,1378584918490000000000,3105926159393528563401,6583182266716099969024,13239635967018160063849,25438557613203014501376,46958831761893056640625,83668255425284801560576,144445313087602911489249,242418040278232804762624,396601930091015154838201,634033809653760000000000,992515310305509690315001
mul $0,11
add $0,9
pow $0,10
| 80 | 496 | 0.9 |
d4bcba9ca2662592bd0d58063fcc1ed876924440 | 775 | asm | Assembly | oeis/031/A031908.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/031/A031908.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/031/A031908.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A031908: a(n) = prime(8*n - 5).
; Submitted by Jon Maiga
; 5,31,67,103,149,191,233,277,331,379,431,467,523,587,631,677,739,797,853,907,967,1019,1063,1117,1187,1237,1297,1367,1433,1483,1543,1597,1637,1709,1777,1847,1901,1979,2027,2087,2141,2221,2281,2341,2389,2447,2539,2609,2671,2711,2767,2833,2897,2963,3037,3109,3187,3253,3319,3371,3457,3517,3559,3623,3691,3761,3823,3889,3943,4019,4091,4153,4229,4273,4357,4441,4507,4567,4643,4703,4787,4861,4933,4987,5039,5107,5189,5273,5347,5417,5477,5527,5623,5669,5741,5813,5861,5927,6037,6091
mov $2,36
mul $2,$0
mul $0,8
mov $4,4
lpb $2
mov $3,$4
seq $3,10051 ; Characteristic function of primes: 1 if n is prime, else 0.
sub $0,$3
mov $1,$0
max $1,0
cmp $1,$0
mul $2,$1
sub $2,1
add $4,2
lpe
mov $0,$4
add $0,1
| 35.227273 | 476 | 0.701935 |
065d2cb266268478eeec67beb3ddbc4dfa1850d5 | 212 | asm | Assembly | libpal/intel_64bit_ms64_masm/cpuid.asm | mars-research/pal | 5977394cda8750ff5dcb89c2bf193ec1ef4cd137 | [
"MIT"
] | 26 | 2020-01-06T23:53:17.000Z | 2022-02-01T08:58:21.000Z | libpal/intel_64bit_ms64_masm/cpuid.asm | mars-research/pal | 5977394cda8750ff5dcb89c2bf193ec1ef4cd137 | [
"MIT"
] | 30 | 2019-11-13T00:55:22.000Z | 2022-01-06T08:09:35.000Z | libpal/intel_64bit_ms64_masm/cpuid.asm | mars-research/pal | 5977394cda8750ff5dcb89c2bf193ec1ef4cd137 | [
"MIT"
] | 14 | 2019-11-15T16:56:22.000Z | 2021-12-22T10:14:17.000Z | .code
pal_execute_cpuid proc
push rcx;
mov eax, edx;
mov ecx, r8d;
cpuid;
pop r8;
mov [r8], eax
mov [r8+4], ebx;
mov [r8+8], ecx;
mov [r8+12], edx;
mov rax, r8;
ret;
pal_execute_cpuid endp
end
| 8.833333 | 22 | 0.617925 |
615f022d0305789a923e688b4afc1baf5f21c0a6 | 638 | asm | Assembly | oeis/178/A178769.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/178/A178769.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/178/A178769.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A178769: a(n) = (5*10^n + 13)/9.
; Submitted by Jamie Morken(m1)
; 2,7,57,557,5557,55557,555557,5555557,55555557,555555557,5555555557,55555555557,555555555557,5555555555557,55555555555557,555555555555557,5555555555555557,55555555555555557,555555555555555557,5555555555555555557,55555555555555555557,555555555555555555557,5555555555555555555557,55555555555555555555557,555555555555555555555557,5555555555555555555555557,55555555555555555555555557,555555555555555555555555557,5555555555555555555555555557,55555555555555555555555555557,555555555555555555555555555557
seq $0,42 ; Unary representation of natural numbers.
add $0,4
div $0,2
| 79.75 | 498 | 0.873041 |
7f503fdcdbdddac4e1f511adc076d2ebaa4ce86a | 277 | asm | Assembly | libsrc/_DEVELOPMENT/adt/bv_priority_queue/c/sdcc_iy/bv_priority_queue_destroy_fastcall.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 640 | 2017-01-14T23:33:45.000Z | 2022-03-30T11:28:42.000Z | libsrc/_DEVELOPMENT/adt/bv_priority_queue/c/sdcc_iy/bv_priority_queue_destroy_fastcall.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 1,600 | 2017-01-15T16:12:02.000Z | 2022-03-31T12:11:12.000Z | libsrc/_DEVELOPMENT/adt/bv_priority_queue/c/sdcc_iy/bv_priority_queue_destroy_fastcall.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 215 | 2017-01-17T10:43:03.000Z | 2022-03-23T17:25:02.000Z |
; void bv_priority_queue_destroy_fastcall(bv_priority_queue_t *q)
SECTION code_clib
SECTION code_adt_bv_priority_queue
PUBLIC _bv_priority_queue_destroy_fastcall
EXTERN asm_bv_priority_queue_destroy
defc _bv_priority_queue_destroy_fastcall = asm_bv_priority_queue_destroy
| 23.083333 | 72 | 0.906137 |
3d55ccff17f1f34c140324fa3c62289354b60d49 | 5,903 | asm | Assembly | Transynther/x86/_processed/AVXALIGN/_st_/i7-8650U_0xd2_notsx.log_85_671.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/AVXALIGN/_st_/i7-8650U_0xd2_notsx.log_85_671.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/AVXALIGN/_st_/i7-8650U_0xd2_notsx.log_85_671.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r12
push %r13
push %r15
push %r9
push %rcx
push %rdi
push %rsi
lea addresses_normal_ht+0x28f5, %rsi
lea addresses_UC_ht+0x1985, %rdi
clflush (%rdi)
nop
nop
nop
nop
dec %r9
mov $80, %rcx
rep movsl
inc %r13
lea addresses_D_ht+0xe845, %r11
nop
nop
nop
nop
nop
add $62752, %r12
movl $0x61626364, (%r11)
sub $36055, %r9
lea addresses_D_ht+0x5c15, %rsi
lea addresses_normal_ht+0x105cf, %rdi
cmp $22380, %r15
mov $65, %rcx
rep movsb
nop
nop
nop
nop
nop
sub %r13, %r13
lea addresses_A_ht+0x1d545, %r15
nop
nop
and $49924, %rcx
mov (%r15), %r13d
nop
nop
nop
nop
nop
xor %r11, %r11
lea addresses_A_ht+0x1bd1d, %r15
nop
nop
nop
xor $4155, %r9
mov $0x6162636465666768, %r11
movq %r11, %xmm4
movups %xmm4, (%r15)
nop
nop
nop
sub $4500, %rsi
lea addresses_UC_ht+0x15325, %r12
nop
nop
cmp $61988, %rdi
movb $0x61, (%r12)
nop
nop
nop
dec %rdi
lea addresses_UC_ht+0x7a85, %rsi
lea addresses_WT_ht+0x4bf4, %rdi
nop
xor %r12, %r12
mov $121, %rcx
rep movsq
nop
nop
and %r9, %r9
lea addresses_A_ht+0x16c1c, %rcx
nop
sub %rsi, %rsi
movups (%rcx), %xmm4
vpextrq $0, %xmm4, %rdi
nop
nop
sub %r9, %r9
lea addresses_UC_ht+0x6a85, %rsi
nop
nop
nop
add %r13, %r13
movb $0x61, (%rsi)
nop
nop
nop
nop
nop
sub $52561, %r9
lea addresses_A_ht+0x15fad, %r11
nop
nop
nop
nop
add %r12, %r12
movw $0x6162, (%r11)
add %r9, %r9
lea addresses_WC_ht+0x1d215, %r12
dec %rdi
mov $0x6162636465666768, %r9
movq %r9, (%r12)
and $45266, %rdi
lea addresses_WC_ht+0x14a85, %rsi
and %rcx, %rcx
mov $0x6162636465666768, %r11
movq %r11, %xmm2
vmovups %ymm2, (%rsi)
nop
nop
nop
nop
xor %r12, %r12
pop %rsi
pop %rdi
pop %rcx
pop %r9
pop %r15
pop %r13
pop %r12
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r13
push %r15
push %r8
push %rax
push %rbp
push %rsi
// Store
lea addresses_WC+0x12b45, %r8
and %r13, %r13
mov $0x5152535455565758, %r11
movq %r11, (%r8)
nop
add %r8, %r8
// Store
lea addresses_RW+0x1e935, %rbp
nop
sub $61031, %rsi
mov $0x5152535455565758, %r13
movq %r13, %xmm4
movups %xmm4, (%rbp)
nop
nop
nop
nop
nop
inc %r8
// Store
lea addresses_normal+0x18185, %rbp
sub $42291, %r8
movw $0x5152, (%rbp)
nop
nop
nop
nop
nop
cmp %r11, %r11
// Store
lea addresses_RW+0x19105, %rbp
nop
inc %r15
mov $0x5152535455565758, %r13
movq %r13, %xmm5
vmovups %ymm5, (%rbp)
and %rbp, %rbp
// Store
lea addresses_WC+0x4285, %r13
nop
nop
nop
add $2542, %r11
movw $0x5152, (%r13)
and $49878, %rsi
// Store
mov $0x298, %r8
nop
nop
nop
nop
nop
cmp $23521, %rax
movw $0x5152, (%r8)
nop
nop
nop
add %r15, %r15
// Store
lea addresses_US+0x1f801, %rsi
nop
nop
nop
nop
nop
xor %rbp, %rbp
movl $0x51525354, (%rsi)
nop
and $23257, %r15
// Faulty Load
lea addresses_PSE+0xa285, %rbp
nop
nop
add $26318, %r15
mov (%rbp), %rsi
lea oracles, %r15
and $0xff, %rsi
shlq $12, %rsi
mov (%r15,%rsi,1), %rsi
pop %rsi
pop %rbp
pop %rax
pop %r8
pop %r15
pop %r13
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'type': 'addresses_PSE', 'size': 16, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WC', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 5, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_RW', 'size': 16, 'AVXalign': False, 'NT': False, 'congruent': 3, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_normal', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 8, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_RW', 'size': 32, 'AVXalign': False, 'NT': False, 'congruent': 7, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WC', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 10, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_P', 'size': 2, 'AVXalign': True, 'NT': False, 'congruent': 0, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_US', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 2, 'same': False}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'type': 'addresses_PSE', 'size': 8, 'AVXalign': False, 'NT': True, 'congruent': 0, 'same': True}}
<gen_prepare_buffer>
{'OP': 'REPM', 'src': {'type': 'addresses_normal_ht', 'congruent': 2, 'same': False}, 'dst': {'type': 'addresses_UC_ht', 'congruent': 7, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_D_ht', 'size': 4, 'AVXalign': False, 'NT': True, 'congruent': 6, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_D_ht', 'congruent': 4, 'same': False}, 'dst': {'type': 'addresses_normal_ht', 'congruent': 1, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_A_ht', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 6, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_A_ht', 'size': 16, 'AVXalign': False, 'NT': False, 'congruent': 2, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_UC_ht', 'size': 1, 'AVXalign': False, 'NT': False, 'congruent': 3, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_UC_ht', 'congruent': 10, 'same': False}, 'dst': {'type': 'addresses_WT_ht', 'congruent': 0, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_A_ht', 'size': 16, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_UC_ht', 'size': 1, 'AVXalign': False, 'NT': False, 'congruent': 10, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_A_ht', 'size': 2, 'AVXalign': False, 'NT': True, 'congruent': 1, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WC_ht', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 4, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WC_ht', 'size': 32, 'AVXalign': False, 'NT': False, 'congruent': 11, 'same': False}}
{'33': 85}
33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33
*/
| 21.782288 | 254 | 0.644418 |
62bd316c9a2ceb42350310b7012d31e43224b8d6 | 10,635 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0xca_notsx.log_21829_1885.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0xca_notsx.log_21829_1885.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0xca_notsx.log_21829_1885.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r13
push %r14
push %r15
push %rax
push %rbp
push %rcx
push %rdi
push %rsi
lea addresses_WT_ht+0xf7b0, %r14
nop
nop
nop
nop
nop
add %r13, %r13
movups (%r14), %xmm0
vpextrq $0, %xmm0, %rbp
nop
dec %rax
lea addresses_WC_ht+0x3664, %rdi
nop
nop
dec %r15
mov $0x6162636465666768, %rax
movq %rax, (%rdi)
sub %r14, %r14
lea addresses_A_ht+0x17b0, %rsi
lea addresses_WC_ht+0xceb0, %rdi
nop
nop
cmp $40315, %r15
mov $32, %rcx
rep movsw
nop
nop
nop
nop
cmp %rcx, %rcx
lea addresses_A_ht+0x32f0, %rsi
lea addresses_A_ht+0x6e90, %rdi
clflush (%rdi)
nop
nop
and %r15, %r15
mov $88, %rcx
rep movsb
nop
xor %rcx, %rcx
lea addresses_D_ht+0x9080, %rsi
lea addresses_WT_ht+0xfbb0, %rdi
nop
nop
cmp %rbp, %rbp
mov $46, %rcx
rep movsw
nop
nop
nop
nop
nop
lfence
lea addresses_WC_ht+0x107b0, %rbp
nop
inc %rdi
vmovups (%rbp), %ymm0
vextracti128 $1, %ymm0, %xmm0
vpextrq $0, %xmm0, %r15
add $50241, %r14
lea addresses_normal_ht+0x127b0, %rcx
nop
nop
nop
nop
xor %rbp, %rbp
movw $0x6162, (%rcx)
nop
nop
nop
nop
nop
and $36668, %r15
lea addresses_UC_ht+0x173b0, %rbp
clflush (%rbp)
nop
nop
nop
nop
nop
inc %r15
movl $0x61626364, (%rbp)
nop
nop
and $20741, %rsi
lea addresses_A_ht+0x1bfb0, %rsi
lea addresses_WC_ht+0x9db8, %rdi
nop
nop
nop
nop
nop
sub %r15, %r15
mov $25, %rcx
rep movsl
nop
nop
nop
nop
nop
and %rax, %rax
lea addresses_UC_ht+0x1b380, %rsi
lea addresses_WT_ht+0x114b0, %rdi
xor $57027, %rax
mov $73, %rcx
rep movsq
nop
nop
add $3823, %rax
lea addresses_normal_ht+0xcb30, %rbp
nop
nop
nop
and %rsi, %rsi
mov $0x6162636465666768, %rax
movq %rax, %xmm3
and $0xffffffffffffffc0, %rbp
movntdq %xmm3, (%rbp)
nop
nop
add $22486, %rax
lea addresses_WC_ht+0xbd90, %rdi
nop
nop
nop
cmp $705, %r15
movb $0x61, (%rdi)
add %r14, %r14
lea addresses_normal_ht+0x1e4fe, %r15
xor %r13, %r13
movups (%r15), %xmm4
vpextrq $1, %xmm4, %rdi
nop
nop
nop
nop
nop
add %r14, %r14
lea addresses_A_ht+0x1d330, %rsi
lea addresses_WT_ht+0xe7f0, %rdi
nop
nop
nop
nop
dec %r15
mov $1, %rcx
rep movsl
nop
nop
nop
and $16378, %r14
lea addresses_WT_ht+0xe250, %rdi
nop
inc %rcx
mov $0x6162636465666768, %rsi
movq %rsi, %xmm3
and $0xffffffffffffffc0, %rdi
vmovaps %ymm3, (%rdi)
nop
and $6452, %r14
pop %rsi
pop %rdi
pop %rcx
pop %rbp
pop %rax
pop %r15
pop %r14
pop %r13
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r15
push %r9
push %rbp
push %rbx
push %rcx
push %rdi
push %rdx
push %rsi
// Store
lea addresses_normal+0xd7b0, %rdx
xor $2914, %r9
movl $0x51525354, (%rdx)
nop
nop
nop
nop
nop
sub %r9, %r9
// Store
lea addresses_normal+0x8870, %rdx
nop
nop
inc %rbx
mov $0x5152535455565758, %r9
movq %r9, %xmm7
vmovups %ymm7, (%rdx)
nop
nop
nop
nop
nop
sub %rbp, %rbp
// Load
lea addresses_A+0x16758, %rdi
nop
nop
nop
nop
nop
and %r15, %r15
mov (%rdi), %edx
nop
sub %r15, %r15
// Store
lea addresses_D+0x15fb0, %r10
and %r15, %r15
movw $0x5152, (%r10)
nop
nop
nop
nop
sub %rbx, %rbx
// Store
lea addresses_A+0x1e3b0, %r10
nop
nop
xor %rbp, %rbp
movb $0x51, (%r10)
nop
sub $2453, %r10
// Load
lea addresses_normal+0xffb0, %rdx
nop
cmp %rbx, %rbx
movb (%rdx), %r9b
nop
nop
nop
nop
dec %rdx
// REPMOV
lea addresses_A+0xf7b0, %rsi
lea addresses_D+0x9f00, %rdi
xor %rbx, %rbx
mov $119, %rcx
rep movsq
nop
nop
nop
xor $23724, %rbp
// Store
lea addresses_A+0xc608, %rbx
clflush (%rbx)
nop
nop
nop
nop
nop
sub $1582, %rdx
mov $0x5152535455565758, %rcx
movq %rcx, %xmm2
vmovups %ymm2, (%rbx)
nop
nop
nop
nop
and $236, %r9
// REPMOV
lea addresses_WT+0x109b0, %rsi
lea addresses_PSE+0xc4, %rdi
nop
nop
nop
nop
and %r10, %r10
mov $16, %rcx
rep movsq
and %r10, %r10
// REPMOV
lea addresses_PSE+0x1ad58, %rsi
lea addresses_A+0x1d9f0, %rdi
clflush (%rdi)
nop
nop
nop
nop
dec %r9
mov $19, %rcx
rep movsw
nop
nop
nop
sub $41309, %rcx
// Faulty Load
lea addresses_A+0xf7b0, %rbx
nop
nop
cmp $21907, %rdi
mov (%rbx), %r10d
lea oracles, %rdx
and $0xff, %r10
shlq $12, %r10
mov (%rdx,%r10,1), %r10
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbx
pop %rbp
pop %r9
pop %r15
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'src': {'NT': False, 'AVXalign': True, 'size': 1, 'congruent': 0, 'same': False, 'type': 'addresses_A'}, 'OP': 'LOAD'}
{'dst': {'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 10, 'same': False, 'type': 'addresses_normal'}, 'OP': 'STOR'}
{'dst': {'NT': False, 'AVXalign': False, 'size': 32, 'congruent': 5, 'same': False, 'type': 'addresses_normal'}, 'OP': 'STOR'}
{'src': {'NT': False, 'AVXalign': True, 'size': 4, 'congruent': 1, 'same': False, 'type': 'addresses_A'}, 'OP': 'LOAD'}
{'dst': {'NT': False, 'AVXalign': True, 'size': 2, 'congruent': 10, 'same': False, 'type': 'addresses_D'}, 'OP': 'STOR'}
{'dst': {'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 8, 'same': False, 'type': 'addresses_A'}, 'OP': 'STOR'}
{'src': {'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 10, 'same': False, 'type': 'addresses_normal'}, 'OP': 'LOAD'}
{'src': {'congruent': 0, 'same': True, 'type': 'addresses_A'}, 'dst': {'congruent': 4, 'same': False, 'type': 'addresses_D'}, 'OP': 'REPM'}
{'dst': {'NT': False, 'AVXalign': False, 'size': 32, 'congruent': 2, 'same': True, 'type': 'addresses_A'}, 'OP': 'STOR'}
{'src': {'congruent': 9, 'same': False, 'type': 'addresses_WT'}, 'dst': {'congruent': 1, 'same': False, 'type': 'addresses_PSE'}, 'OP': 'REPM'}
{'src': {'congruent': 3, 'same': False, 'type': 'addresses_PSE'}, 'dst': {'congruent': 1, 'same': False, 'type': 'addresses_A'}, 'OP': 'REPM'}
[Faulty Load]
{'src': {'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 0, 'same': True, 'type': 'addresses_A'}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 11, 'same': False, 'type': 'addresses_WT_ht'}, 'OP': 'LOAD'}
{'dst': {'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 1, 'same': False, 'type': 'addresses_WC_ht'}, 'OP': 'STOR'}
{'src': {'congruent': 10, 'same': False, 'type': 'addresses_A_ht'}, 'dst': {'congruent': 7, 'same': False, 'type': 'addresses_WC_ht'}, 'OP': 'REPM'}
{'src': {'congruent': 3, 'same': False, 'type': 'addresses_A_ht'}, 'dst': {'congruent': 4, 'same': False, 'type': 'addresses_A_ht'}, 'OP': 'REPM'}
{'src': {'congruent': 4, 'same': False, 'type': 'addresses_D_ht'}, 'dst': {'congruent': 10, 'same': False, 'type': 'addresses_WT_ht'}, 'OP': 'REPM'}
{'src': {'NT': False, 'AVXalign': False, 'size': 32, 'congruent': 10, 'same': False, 'type': 'addresses_WC_ht'}, 'OP': 'LOAD'}
{'dst': {'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 9, 'same': False, 'type': 'addresses_normal_ht'}, 'OP': 'STOR'}
{'dst': {'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 9, 'same': False, 'type': 'addresses_UC_ht'}, 'OP': 'STOR'}
{'src': {'congruent': 11, 'same': False, 'type': 'addresses_A_ht'}, 'dst': {'congruent': 2, 'same': False, 'type': 'addresses_WC_ht'}, 'OP': 'REPM'}
{'src': {'congruent': 4, 'same': False, 'type': 'addresses_UC_ht'}, 'dst': {'congruent': 8, 'same': False, 'type': 'addresses_WT_ht'}, 'OP': 'REPM'}
{'dst': {'NT': True, 'AVXalign': False, 'size': 16, 'congruent': 7, 'same': False, 'type': 'addresses_normal_ht'}, 'OP': 'STOR'}
{'dst': {'NT': True, 'AVXalign': False, 'size': 1, 'congruent': 4, 'same': False, 'type': 'addresses_WC_ht'}, 'OP': 'STOR'}
{'src': {'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 0, 'same': True, 'type': 'addresses_normal_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 7, 'same': False, 'type': 'addresses_A_ht'}, 'dst': {'congruent': 6, 'same': False, 'type': 'addresses_WT_ht'}, 'OP': 'REPM'}
{'dst': {'NT': False, 'AVXalign': True, 'size': 32, 'congruent': 4, 'same': False, 'type': 'addresses_WT_ht'}, 'OP': 'STOR'}
{'35': 21829}
35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35
*/
| 28.435829 | 2,999 | 0.654255 |
089b7bf9d0cc89439715413a8fea8ebdb4642862 | 31,408 | asm | Assembly | library/02_functions_batch1/unknown_1000ae00.asm | SamantazFox/dds140-reverse-engineering | 4c8c286ffc20f2ee07061c83b0a0a68204d90148 | [
"Unlicense"
] | 1 | 2021-06-05T23:41:15.000Z | 2021-06-05T23:41:15.000Z | library/02_functions_batch1/unknown_1000ae00.asm | SamantazFox/dds140-reverse-engineering | 4c8c286ffc20f2ee07061c83b0a0a68204d90148 | [
"Unlicense"
] | null | null | null | library/02_functions_batch1/unknown_1000ae00.asm | SamantazFox/dds140-reverse-engineering | 4c8c286ffc20f2ee07061c83b0a0a68204d90148 | [
"Unlicense"
] | null | null | null | 1000ae00: 55 push ebp
1000ae01: 8b ec mov ebp,esp
1000ae03: 83 ec 7c sub esp,0x7c
1000ae06: a1 10 00 01 10 mov eax,ds:0x10010010
1000ae0b: 33 c5 xor eax,ebp
1000ae0d: 89 45 fc mov DWORD PTR [ebp-0x4],eax
1000ae10: 8b 45 08 mov eax,DWORD PTR [ebp+0x8]
1000ae13: 53 push ebx
1000ae14: 33 db xor ebx,ebx
1000ae16: 56 push esi
1000ae17: 33 f6 xor esi,esi
1000ae19: 89 45 84 mov DWORD PTR [ebp-0x7c],eax
1000ae1c: 8b 45 0c mov eax,DWORD PTR [ebp+0xc]
1000ae1f: 46 inc esi
1000ae20: 33 c9 xor ecx,ecx
1000ae22: 39 5d 24 cmp DWORD PTR [ebp+0x24],ebx
1000ae25: 57 push edi
1000ae26: 89 45 90 mov DWORD PTR [ebp-0x70],eax
1000ae29: 8d 7d e0 lea edi,[ebp-0x20]
1000ae2c: 89 5d 8c mov DWORD PTR [ebp-0x74],ebx
1000ae2f: 89 75 98 mov DWORD PTR [ebp-0x68],esi
1000ae32: 89 5d b4 mov DWORD PTR [ebp-0x4c],ebx
1000ae35: 89 5d a8 mov DWORD PTR [ebp-0x58],ebx
1000ae38: 89 5d a4 mov DWORD PTR [ebp-0x5c],ebx
1000ae3b: 89 5d a0 mov DWORD PTR [ebp-0x60],ebx
1000ae3e: 89 5d 9c mov DWORD PTR [ebp-0x64],ebx
1000ae41: 89 5d b0 mov DWORD PTR [ebp-0x50],ebx
1000ae44: 89 5d 94 mov DWORD PTR [ebp-0x6c],ebx
1000ae47: 75 1f jne 0x1000ae68
1000ae49: e8 f8 9b ff ff call 0x10004a46
1000ae4e: 53 push ebx
1000ae4f: 53 push ebx
1000ae50: 53 push ebx
1000ae51: 53 push ebx
1000ae52: 53 push ebx
1000ae53: c7 00 16 00 00 00 mov DWORD PTR [eax],0x16
1000ae59: e8 18 cd ff ff call 0x10007b76
1000ae5e: 83 c4 14 add esp,0x14
1000ae61: 33 c0 xor eax,eax
1000ae63: e9 19 06 00 00 jmp 0x1000b481
1000ae68: 8b 55 10 mov edx,DWORD PTR [ebp+0x10]
1000ae6b: 89 55 ac mov DWORD PTR [ebp-0x54],edx
1000ae6e: 8a 02 mov al,BYTE PTR [edx]
1000ae70: 3c 20 cmp al,0x20
1000ae72: 74 0c je 0x1000ae80
1000ae74: 3c 09 cmp al,0x9
1000ae76: 74 08 je 0x1000ae80
1000ae78: 3c 0a cmp al,0xa
1000ae7a: 74 04 je 0x1000ae80
1000ae7c: 3c 0d cmp al,0xd
1000ae7e: 75 03 jne 0x1000ae83
1000ae80: 42 inc edx
1000ae81: eb eb jmp 0x1000ae6e
1000ae83: b3 30 mov bl,0x30
1000ae85: 8a 02 mov al,BYTE PTR [edx]
1000ae87: 42 inc edx
1000ae88: 83 f9 0b cmp ecx,0xb
1000ae8b: 0f 87 2f 02 00 00 ja 0x1000b0c0
1000ae91: ff 24 8d 90 b4 00 10 jmp DWORD PTR [ecx*4+0x1000b490]
1000ae98: 8a c8 mov cl,al
1000ae9a: 80 e9 31 sub cl,0x31
1000ae9d: 80 f9 08 cmp cl,0x8
1000aea0: 77 06 ja 0x1000aea8
1000aea2: 6a 03 push 0x3
1000aea4: 59 pop ecx
1000aea5: 4a dec edx
1000aea6: eb dd jmp 0x1000ae85
1000aea8: 8b 4d 24 mov ecx,DWORD PTR [ebp+0x24]
1000aeab: 8b 09 mov ecx,DWORD PTR [ecx]
1000aead: 8b 89 bc 00 00 00 mov ecx,DWORD PTR [ecx+0xbc]
1000aeb3: 8b 09 mov ecx,DWORD PTR [ecx]
1000aeb5: 3a 01 cmp al,BYTE PTR [ecx]
1000aeb7: 75 05 jne 0x1000aebe
1000aeb9: 6a 05 push 0x5
1000aebb: 59 pop ecx
1000aebc: eb c7 jmp 0x1000ae85
1000aebe: 0f be c0 movsx eax,al
1000aec1: 83 e8 2b sub eax,0x2b
1000aec4: 74 1d je 0x1000aee3
1000aec6: 48 dec eax
1000aec7: 48 dec eax
1000aec8: 74 0d je 0x1000aed7
1000aeca: 83 e8 03 sub eax,0x3
1000aecd: 0f 85 8b 01 00 00 jne 0x1000b05e
1000aed3: 8b ce mov ecx,esi
1000aed5: eb ae jmp 0x1000ae85
1000aed7: 6a 02 push 0x2
1000aed9: 59 pop ecx
1000aeda: c7 45 8c 00 80 00 00 mov DWORD PTR [ebp-0x74],0x8000
1000aee1: eb a2 jmp 0x1000ae85
1000aee3: 83 65 8c 00 and DWORD PTR [ebp-0x74],0x0
1000aee7: 6a 02 push 0x2
1000aee9: 59 pop ecx
1000aeea: eb 99 jmp 0x1000ae85
1000aeec: 8a c8 mov cl,al
1000aeee: 80 e9 31 sub cl,0x31
1000aef1: 80 f9 08 cmp cl,0x8
1000aef4: 89 75 a8 mov DWORD PTR [ebp-0x58],esi
1000aef7: 76 a9 jbe 0x1000aea2
1000aef9: 8b 4d 24 mov ecx,DWORD PTR [ebp+0x24]
1000aefc: 8b 09 mov ecx,DWORD PTR [ecx]
1000aefe: 8b 89 bc 00 00 00 mov ecx,DWORD PTR [ecx+0xbc]
1000af04: 8b 09 mov ecx,DWORD PTR [ecx]
1000af06: 3a 01 cmp al,BYTE PTR [ecx]
1000af08: 75 04 jne 0x1000af0e
1000af0a: 6a 04 push 0x4
1000af0c: eb ad jmp 0x1000aebb
1000af0e: 3c 2b cmp al,0x2b
1000af10: 74 28 je 0x1000af3a
1000af12: 3c 2d cmp al,0x2d
1000af14: 74 24 je 0x1000af3a
1000af16: 3a c3 cmp al,bl
1000af18: 74 b9 je 0x1000aed3
1000af1a: 3c 43 cmp al,0x43
1000af1c: 0f 8e 3c 01 00 00 jle 0x1000b05e
1000af22: 3c 45 cmp al,0x45
1000af24: 7e 10 jle 0x1000af36
1000af26: 3c 63 cmp al,0x63
1000af28: 0f 8e 30 01 00 00 jle 0x1000b05e
1000af2e: 3c 65 cmp al,0x65
1000af30: 0f 8f 28 01 00 00 jg 0x1000b05e
1000af36: 6a 06 push 0x6
1000af38: eb 81 jmp 0x1000aebb
1000af3a: 4a dec edx
1000af3b: 6a 0b push 0xb
1000af3d: e9 79 ff ff ff jmp 0x1000aebb
1000af42: 8a c8 mov cl,al
1000af44: 80 e9 31 sub cl,0x31
1000af47: 80 f9 08 cmp cl,0x8
1000af4a: 0f 86 52 ff ff ff jbe 0x1000aea2
1000af50: 8b 4d 24 mov ecx,DWORD PTR [ebp+0x24]
1000af53: 8b 09 mov ecx,DWORD PTR [ecx]
1000af55: 8b 89 bc 00 00 00 mov ecx,DWORD PTR [ecx+0xbc]
1000af5b: 8b 09 mov ecx,DWORD PTR [ecx]
1000af5d: 3a 01 cmp al,BYTE PTR [ecx]
1000af5f: 0f 84 54 ff ff ff je 0x1000aeb9
1000af65: 3a c3 cmp al,bl
1000af67: 0f 84 66 ff ff ff je 0x1000aed3
1000af6d: 8b 55 ac mov edx,DWORD PTR [ebp-0x54]
1000af70: e9 14 01 00 00 jmp 0x1000b089
1000af75: 89 75 a8 mov DWORD PTR [ebp-0x58],esi
1000af78: eb 1a jmp 0x1000af94
1000af7a: 3c 39 cmp al,0x39
1000af7c: 7f 1a jg 0x1000af98
1000af7e: 83 7d b4 19 cmp DWORD PTR [ebp-0x4c],0x19
1000af82: 73 0a jae 0x1000af8e
1000af84: ff 45 b4 inc DWORD PTR [ebp-0x4c]
1000af87: 2a c3 sub al,bl
1000af89: 88 07 mov BYTE PTR [edi],al
1000af8b: 47 inc edi
1000af8c: eb 03 jmp 0x1000af91
1000af8e: ff 45 b0 inc DWORD PTR [ebp-0x50]
1000af91: 8a 02 mov al,BYTE PTR [edx]
1000af93: 42 inc edx
1000af94: 3a c3 cmp al,bl
1000af96: 7d e2 jge 0x1000af7a
1000af98: 8b 4d 24 mov ecx,DWORD PTR [ebp+0x24]
1000af9b: 8b 09 mov ecx,DWORD PTR [ecx]
1000af9d: 8b 89 bc 00 00 00 mov ecx,DWORD PTR [ecx+0xbc]
1000afa3: 8b 09 mov ecx,DWORD PTR [ecx]
1000afa5: 3a 01 cmp al,BYTE PTR [ecx]
1000afa7: 0f 84 5d ff ff ff je 0x1000af0a
1000afad: 3c 2b cmp al,0x2b
1000afaf: 74 89 je 0x1000af3a
1000afb1: 3c 2d cmp al,0x2d
1000afb3: 74 85 je 0x1000af3a
1000afb5: e9 60 ff ff ff jmp 0x1000af1a
1000afba: 83 7d b4 00 cmp DWORD PTR [ebp-0x4c],0x0
1000afbe: 89 75 a8 mov DWORD PTR [ebp-0x58],esi
1000afc1: 89 75 a4 mov DWORD PTR [ebp-0x5c],esi
1000afc4: 75 26 jne 0x1000afec
1000afc6: eb 06 jmp 0x1000afce
1000afc8: ff 4d b0 dec DWORD PTR [ebp-0x50]
1000afcb: 8a 02 mov al,BYTE PTR [edx]
1000afcd: 42 inc edx
1000afce: 3a c3 cmp al,bl
1000afd0: 74 f6 je 0x1000afc8
1000afd2: eb 18 jmp 0x1000afec
1000afd4: 3c 39 cmp al,0x39
1000afd6: 7f d5 jg 0x1000afad
1000afd8: 83 7d b4 19 cmp DWORD PTR [ebp-0x4c],0x19
1000afdc: 73 0b jae 0x1000afe9
1000afde: ff 45 b4 inc DWORD PTR [ebp-0x4c]
1000afe1: 2a c3 sub al,bl
1000afe3: 88 07 mov BYTE PTR [edi],al
1000afe5: 47 inc edi
1000afe6: ff 4d b0 dec DWORD PTR [ebp-0x50]
1000afe9: 8a 02 mov al,BYTE PTR [edx]
1000afeb: 42 inc edx
1000afec: 3a c3 cmp al,bl
1000afee: 7d e4 jge 0x1000afd4
1000aff0: eb bb jmp 0x1000afad
1000aff2: 2a c3 sub al,bl
1000aff4: 3c 09 cmp al,0x9
1000aff6: 89 75 a4 mov DWORD PTR [ebp-0x5c],esi
1000aff9: 0f 87 6e ff ff ff ja 0x1000af6d
1000afff: 6a 04 push 0x4
1000b001: e9 9e fe ff ff jmp 0x1000aea4
1000b006: 8d 4a fe lea ecx,[edx-0x2]
1000b009: 89 4d ac mov DWORD PTR [ebp-0x54],ecx
1000b00c: 8a c8 mov cl,al
1000b00e: 80 e9 31 sub cl,0x31
1000b011: 80 f9 08 cmp cl,0x8
1000b014: 77 07 ja 0x1000b01d
1000b016: 6a 09 push 0x9
1000b018: e9 87 fe ff ff jmp 0x1000aea4
1000b01d: 0f be c0 movsx eax,al
1000b020: 83 e8 2b sub eax,0x2b
1000b023: 74 20 je 0x1000b045
1000b025: 48 dec eax
1000b026: 48 dec eax
1000b027: 74 10 je 0x1000b039
1000b029: 83 e8 03 sub eax,0x3
1000b02c: 0f 85 3b ff ff ff jne 0x1000af6d
1000b032: 6a 08 push 0x8
1000b034: e9 82 fe ff ff jmp 0x1000aebb
1000b039: 83 4d 98 ff or DWORD PTR [ebp-0x68],0xffffffff
1000b03d: 6a 07 push 0x7
1000b03f: 59 pop ecx
1000b040: e9 40 fe ff ff jmp 0x1000ae85
1000b045: 6a 07 push 0x7
1000b047: e9 6f fe ff ff jmp 0x1000aebb
1000b04c: 89 75 a0 mov DWORD PTR [ebp-0x60],esi
1000b04f: eb 03 jmp 0x1000b054
1000b051: 8a 02 mov al,BYTE PTR [edx]
1000b053: 42 inc edx
1000b054: 3a c3 cmp al,bl
1000b056: 74 f9 je 0x1000b051
1000b058: 2c 31 sub al,0x31
1000b05a: 3c 08 cmp al,0x8
1000b05c: 76 b8 jbe 0x1000b016
1000b05e: 4a dec edx
1000b05f: eb 28 jmp 0x1000b089
1000b061: 8a c8 mov cl,al
1000b063: 80 e9 31 sub cl,0x31
1000b066: 80 f9 08 cmp cl,0x8
1000b069: 76 ab jbe 0x1000b016
1000b06b: 3a c3 cmp al,bl
1000b06d: eb bd jmp 0x1000b02c
1000b06f: 83 7d 20 00 cmp DWORD PTR [ebp+0x20],0x0
1000b073: 74 47 je 0x1000b0bc
1000b075: 0f be c0 movsx eax,al
1000b078: 83 e8 2b sub eax,0x2b
1000b07b: 8d 4a ff lea ecx,[edx-0x1]
1000b07e: 89 4d ac mov DWORD PTR [ebp-0x54],ecx
1000b081: 74 c2 je 0x1000b045
1000b083: 48 dec eax
1000b084: 48 dec eax
1000b085: 74 b2 je 0x1000b039
1000b087: 8b d1 mov edx,ecx
1000b089: 83 7d a8 00 cmp DWORD PTR [ebp-0x58],0x0
1000b08d: 8b 45 90 mov eax,DWORD PTR [ebp-0x70]
1000b090: 89 10 mov DWORD PTR [eax],edx
1000b092: 0f 84 a4 03 00 00 je 0x1000b43c
1000b098: 6a 18 push 0x18
1000b09a: 58 pop eax
1000b09b: 39 45 b4 cmp DWORD PTR [ebp-0x4c],eax
1000b09e: 76 10 jbe 0x1000b0b0
1000b0a0: 80 7d f7 05 cmp BYTE PTR [ebp-0x9],0x5
1000b0a4: 7c 03 jl 0x1000b0a9
1000b0a6: fe 45 f7 inc BYTE PTR [ebp-0x9]
1000b0a9: 4f dec edi
1000b0aa: ff 45 b0 inc DWORD PTR [ebp-0x50]
1000b0ad: 89 45 b4 mov DWORD PTR [ebp-0x4c],eax
1000b0b0: 83 7d b4 00 cmp DWORD PTR [ebp-0x4c],0x0
1000b0b4: 0f 86 a9 03 00 00 jbe 0x1000b463
1000b0ba: eb 59 jmp 0x1000b115
1000b0bc: 6a 0a push 0xa
1000b0be: 59 pop ecx
1000b0bf: 4a dec edx
1000b0c0: 83 f9 0a cmp ecx,0xa
1000b0c3: 0f 85 bc fd ff ff jne 0x1000ae85
1000b0c9: eb be jmp 0x1000b089
1000b0cb: 89 75 a0 mov DWORD PTR [ebp-0x60],esi
1000b0ce: 33 c9 xor ecx,ecx
1000b0d0: eb 19 jmp 0x1000b0eb
1000b0d2: 3c 39 cmp al,0x39
1000b0d4: 7f 20 jg 0x1000b0f6
1000b0d6: 6b c9 0a imul ecx,ecx,0xa
1000b0d9: 0f be f0 movsx esi,al
1000b0dc: 8d 4c 31 d0 lea ecx,[ecx+esi*1-0x30]
1000b0e0: 81 f9 50 14 00 00 cmp ecx,0x1450
1000b0e6: 7f 09 jg 0x1000b0f1
1000b0e8: 8a 02 mov al,BYTE PTR [edx]
1000b0ea: 42 inc edx
1000b0eb: 3a c3 cmp al,bl
1000b0ed: 7d e3 jge 0x1000b0d2
1000b0ef: eb 05 jmp 0x1000b0f6
1000b0f1: b9 51 14 00 00 mov ecx,0x1451
1000b0f6: 89 4d 9c mov DWORD PTR [ebp-0x64],ecx
1000b0f9: eb 0b jmp 0x1000b106
1000b0fb: 3c 39 cmp al,0x39
1000b0fd: 0f 8f 5b ff ff ff jg 0x1000b05e
1000b103: 8a 02 mov al,BYTE PTR [edx]
1000b105: 42 inc edx
1000b106: 3a c3 cmp al,bl
1000b108: 7d f1 jge 0x1000b0fb
1000b10a: e9 4f ff ff ff jmp 0x1000b05e
1000b10f: ff 4d b4 dec DWORD PTR [ebp-0x4c]
1000b112: ff 45 b0 inc DWORD PTR [ebp-0x50]
1000b115: 4f dec edi
1000b116: 80 3f 00 cmp BYTE PTR [edi],0x0
1000b119: 74 f4 je 0x1000b10f
1000b11b: 8d 45 c4 lea eax,[ebp-0x3c]
1000b11e: 50 push eax
1000b11f: ff 75 b4 push DWORD PTR [ebp-0x4c]
1000b122: 8d 45 e0 lea eax,[ebp-0x20]
1000b125: 50 push eax
1000b126: e8 e2 17 00 00 call 0x1000c90d
1000b12b: 8b 45 9c mov eax,DWORD PTR [ebp-0x64]
1000b12e: 33 c9 xor ecx,ecx
1000b130: 83 c4 0c add esp,0xc
1000b133: 39 4d 98 cmp DWORD PTR [ebp-0x68],ecx
1000b136: 7d 02 jge 0x1000b13a
1000b138: f7 d8 neg eax
1000b13a: 03 45 b0 add eax,DWORD PTR [ebp-0x50]
1000b13d: 39 4d a0 cmp DWORD PTR [ebp-0x60],ecx
1000b140: 75 03 jne 0x1000b145
1000b142: 03 45 18 add eax,DWORD PTR [ebp+0x18]
1000b145: 39 4d a4 cmp DWORD PTR [ebp-0x5c],ecx
1000b148: 75 03 jne 0x1000b14d
1000b14a: 2b 45 1c sub eax,DWORD PTR [ebp+0x1c]
1000b14d: 3d 50 14 00 00 cmp eax,0x1450
1000b152: 0f 8f ed 02 00 00 jg 0x1000b445
1000b158: 3d b0 eb ff ff cmp eax,0xffffebb0
1000b15d: 0f 8c f9 02 00 00 jl 0x1000b45c
1000b163: be a0 0c 01 10 mov esi,0x10010ca0
1000b168: 83 ee 60 sub esi,0x60
1000b16b: 3b c1 cmp eax,ecx
1000b16d: 89 45 ac mov DWORD PTR [ebp-0x54],eax
1000b170: 0f 84 b4 02 00 00 je 0x1000b42a
1000b176: 7d 0d jge 0x1000b185
1000b178: f7 d8 neg eax
1000b17a: be 00 0e 01 10 mov esi,0x10010e00
1000b17f: 89 45 ac mov DWORD PTR [ebp-0x54],eax
1000b182: 83 ee 60 sub esi,0x60
1000b185: 39 4d 14 cmp DWORD PTR [ebp+0x14],ecx
1000b188: 75 04 jne 0x1000b18e
1000b18a: 66 89 4d c4 mov WORD PTR [ebp-0x3c],cx
1000b18e: 39 4d ac cmp DWORD PTR [ebp-0x54],ecx
1000b191: 0f 84 93 02 00 00 je 0x1000b42a
1000b197: 8b 45 ac mov eax,DWORD PTR [ebp-0x54]
1000b19a: c1 7d ac 03 sar DWORD PTR [ebp-0x54],0x3
1000b19e: 83 c6 54 add esi,0x54
1000b1a1: 83 e0 07 and eax,0x7
1000b1a4: 85 c0 test eax,eax
1000b1a6: 89 75 b4 mov DWORD PTR [ebp-0x4c],esi
1000b1a9: 0f 84 71 02 00 00 je 0x1000b420
1000b1af: 6b c0 0c imul eax,eax,0xc
1000b1b2: 03 c6 add eax,esi
1000b1b4: 8b d8 mov ebx,eax
1000b1b6: 66 81 3b 00 80 cmp WORD PTR [ebx],0x8000
1000b1bb: 89 5d 90 mov DWORD PTR [ebp-0x70],ebx
1000b1be: 72 14 jb 0x1000b1d4
1000b1c0: 8b f3 mov esi,ebx
1000b1c2: 8d 7d b8 lea edi,[ebp-0x48]
1000b1c5: a5 movs DWORD PTR es:[edi],DWORD PTR ds:[esi]
1000b1c6: a5 movs DWORD PTR es:[edi],DWORD PTR ds:[esi]
1000b1c7: a5 movs DWORD PTR es:[edi],DWORD PTR ds:[esi]
1000b1c8: ff 4d ba dec DWORD PTR [ebp-0x46]
1000b1cb: 8b 75 b4 mov esi,DWORD PTR [ebp-0x4c]
1000b1ce: 8d 5d b8 lea ebx,[ebp-0x48]
1000b1d1: 89 5d 90 mov DWORD PTR [ebp-0x70],ebx
1000b1d4: 0f b7 53 0a movzx edx,WORD PTR [ebx+0xa]
1000b1d8: 8b 4d ce mov ecx,DWORD PTR [ebp-0x32]
1000b1db: 33 c0 xor eax,eax
1000b1dd: 89 45 b0 mov DWORD PTR [ebp-0x50],eax
1000b1e0: 89 45 d4 mov DWORD PTR [ebp-0x2c],eax
1000b1e3: 89 45 d8 mov DWORD PTR [ebp-0x28],eax
1000b1e6: 89 45 dc mov DWORD PTR [ebp-0x24],eax
1000b1e9: 8b c2 mov eax,edx
1000b1eb: bf ff 7f 00 00 mov edi,0x7fff
1000b1f0: 33 c1 xor eax,ecx
1000b1f2: 23 cf and ecx,edi
1000b1f4: 23 d7 and edx,edi
1000b1f6: 25 00 80 00 00 and eax,0x8000
1000b1fb: 66 81 f9 ff 7f cmp cx,0x7fff
1000b200: 8d 3c 0a lea edi,[edx+ecx*1]
1000b203: 0f b7 ff movzx edi,di
1000b206: 0f 83 fa 01 00 00 jae 0x1000b406
1000b20c: 66 81 fa ff 7f cmp dx,0x7fff
1000b211: 0f 83 ef 01 00 00 jae 0x1000b406
1000b217: 66 81 ff fd bf cmp di,0xbffd
1000b21c: 0f 87 e4 01 00 00 ja 0x1000b406
1000b222: 66 81 ff bf 3f cmp di,0x3fbf
1000b227: 77 0d ja 0x1000b236
1000b229: 33 c0 xor eax,eax
1000b22b: 89 45 c8 mov DWORD PTR [ebp-0x38],eax
1000b22e: 89 45 c4 mov DWORD PTR [ebp-0x3c],eax
1000b231: e9 e7 01 00 00 jmp 0x1000b41d
1000b236: 66 85 c9 test cx,cx
1000b239: 75 1f jne 0x1000b25a
1000b23b: 47 inc edi
1000b23c: f7 45 cc ff ff ff 7f test DWORD PTR [ebp-0x34],0x7fffffff
1000b243: 75 15 jne 0x1000b25a
1000b245: 83 7d c8 00 cmp DWORD PTR [ebp-0x38],0x0
1000b249: 75 0f jne 0x1000b25a
1000b24b: 83 7d c4 00 cmp DWORD PTR [ebp-0x3c],0x0
1000b24f: 75 09 jne 0x1000b25a
1000b251: 66 21 4d ce and WORD PTR [ebp-0x32],cx
1000b255: e9 c6 01 00 00 jmp 0x1000b420
1000b25a: 33 c9 xor ecx,ecx
1000b25c: 66 3b d1 cmp dx,cx
1000b25f: 75 21 jne 0x1000b282
1000b261: 47 inc edi
1000b262: f7 43 08 ff ff ff 7f test DWORD PTR [ebx+0x8],0x7fffffff
1000b269: 75 17 jne 0x1000b282
1000b26b: 39 4b 04 cmp DWORD PTR [ebx+0x4],ecx
1000b26e: 75 12 jne 0x1000b282
1000b270: 39 0b cmp DWORD PTR [ebx],ecx
1000b272: 75 0e jne 0x1000b282
1000b274: 89 4d cc mov DWORD PTR [ebp-0x34],ecx
1000b277: 89 4d c8 mov DWORD PTR [ebp-0x38],ecx
1000b27a: 89 4d c4 mov DWORD PTR [ebp-0x3c],ecx
1000b27d: e9 9e 01 00 00 jmp 0x1000b420
1000b282: 21 4d 98 and DWORD PTR [ebp-0x68],ecx
1000b285: 8d 75 d8 lea esi,[ebp-0x28]
1000b288: c7 45 a8 05 00 00 00 mov DWORD PTR [ebp-0x58],0x5
1000b28f: 8b 4d 98 mov ecx,DWORD PTR [ebp-0x68]
1000b292: 8b 55 a8 mov edx,DWORD PTR [ebp-0x58]
1000b295: 03 c9 add ecx,ecx
1000b297: 85 d2 test edx,edx
1000b299: 89 55 9c mov DWORD PTR [ebp-0x64],edx
1000b29c: 7e 55 jle 0x1000b2f3
1000b29e: 8d 4c 0d c4 lea ecx,[ebp+ecx*1-0x3c]
1000b2a2: 83 c3 08 add ebx,0x8
1000b2a5: 89 4d a4 mov DWORD PTR [ebp-0x5c],ecx
1000b2a8: 89 5d a0 mov DWORD PTR [ebp-0x60],ebx
1000b2ab: 8b 4d a0 mov ecx,DWORD PTR [ebp-0x60]
1000b2ae: 8b 55 a4 mov edx,DWORD PTR [ebp-0x5c]
1000b2b1: 0f b7 12 movzx edx,WORD PTR [edx]
1000b2b4: 0f b7 09 movzx ecx,WORD PTR [ecx]
1000b2b7: 83 65 88 00 and DWORD PTR [ebp-0x78],0x0
1000b2bb: 0f af ca imul ecx,edx
1000b2be: 8b 56 fc mov edx,DWORD PTR [esi-0x4]
1000b2c1: 8d 1c 0a lea ebx,[edx+ecx*1]
1000b2c4: 3b da cmp ebx,edx
1000b2c6: 72 04 jb 0x1000b2cc
1000b2c8: 3b d9 cmp ebx,ecx
1000b2ca: 73 07 jae 0x1000b2d3
1000b2cc: c7 45 88 01 00 00 00 mov DWORD PTR [ebp-0x78],0x1
1000b2d3: 83 7d 88 00 cmp DWORD PTR [ebp-0x78],0x0
1000b2d7: 89 5e fc mov DWORD PTR [esi-0x4],ebx
1000b2da: 74 03 je 0x1000b2df
1000b2dc: 66 ff 06 inc WORD PTR [esi]
1000b2df: 83 45 a4 02 add DWORD PTR [ebp-0x5c],0x2
1000b2e3: 83 6d a0 02 sub DWORD PTR [ebp-0x60],0x2
1000b2e7: ff 4d 9c dec DWORD PTR [ebp-0x64]
1000b2ea: 83 7d 9c 00 cmp DWORD PTR [ebp-0x64],0x0
1000b2ee: 7f bb jg 0x1000b2ab
1000b2f0: 8b 5d 90 mov ebx,DWORD PTR [ebp-0x70]
1000b2f3: 46 inc esi
1000b2f4: 46 inc esi
1000b2f5: ff 45 98 inc DWORD PTR [ebp-0x68]
1000b2f8: ff 4d a8 dec DWORD PTR [ebp-0x58]
1000b2fb: 83 7d a8 00 cmp DWORD PTR [ebp-0x58],0x0
1000b2ff: 7f 8e jg 0x1000b28f
1000b301: 81 c7 02 c0 00 00 add edi,0xc002
1000b307: 66 85 ff test di,di
1000b30a: 7e 3b jle 0x1000b347
1000b30c: f7 45 dc 00 00 00 80 test DWORD PTR [ebp-0x24],0x80000000
1000b313: 75 2d jne 0x1000b342
1000b315: 8b 75 d8 mov esi,DWORD PTR [ebp-0x28]
1000b318: 8b 4d d4 mov ecx,DWORD PTR [ebp-0x2c]
1000b31b: d1 65 d4 shl DWORD PTR [ebp-0x2c],1
1000b31e: c1 e9 1f shr ecx,0x1f
1000b321: 8b d6 mov edx,esi
1000b323: 03 f6 add esi,esi
1000b325: 0b f1 or esi,ecx
1000b327: 8b 4d dc mov ecx,DWORD PTR [ebp-0x24]
1000b32a: c1 ea 1f shr edx,0x1f
1000b32d: 03 c9 add ecx,ecx
1000b32f: 0b ca or ecx,edx
1000b331: 81 c7 ff ff 00 00 add edi,0xffff
1000b337: 66 85 ff test di,di
1000b33a: 89 75 d8 mov DWORD PTR [ebp-0x28],esi
1000b33d: 89 4d dc mov DWORD PTR [ebp-0x24],ecx
1000b340: 7f ca jg 0x1000b30c
1000b342: 66 85 ff test di,di
1000b345: 7f 4d jg 0x1000b394
1000b347: 81 c7 ff ff 00 00 add edi,0xffff
1000b34d: 66 85 ff test di,di
1000b350: 7d 42 jge 0x1000b394
1000b352: 8b cf mov ecx,edi
1000b354: f7 d9 neg ecx
1000b356: 0f b7 f1 movzx esi,cx
1000b359: 03 fe add edi,esi
1000b35b: f6 45 d4 01 test BYTE PTR [ebp-0x2c],0x1
1000b35f: 74 03 je 0x1000b364
1000b361: ff 45 b0 inc DWORD PTR [ebp-0x50]
1000b364: 8b 4d dc mov ecx,DWORD PTR [ebp-0x24]
1000b367: 8b 5d d8 mov ebx,DWORD PTR [ebp-0x28]
1000b36a: 8b 55 d8 mov edx,DWORD PTR [ebp-0x28]
1000b36d: d1 6d dc shr DWORD PTR [ebp-0x24],1
1000b370: c1 e1 1f shl ecx,0x1f
1000b373: d1 eb shr ebx,1
1000b375: 0b d9 or ebx,ecx
1000b377: 8b 4d d4 mov ecx,DWORD PTR [ebp-0x2c]
1000b37a: c1 e2 1f shl edx,0x1f
1000b37d: d1 e9 shr ecx,1
1000b37f: 0b ca or ecx,edx
1000b381: 4e dec esi
1000b382: 89 5d d8 mov DWORD PTR [ebp-0x28],ebx
1000b385: 89 4d d4 mov DWORD PTR [ebp-0x2c],ecx
1000b388: 75 d1 jne 0x1000b35b
1000b38a: 39 75 b0 cmp DWORD PTR [ebp-0x50],esi
1000b38d: 74 05 je 0x1000b394
1000b38f: 66 83 4d d4 01 or WORD PTR [ebp-0x2c],0x1
1000b394: 66 81 7d d4 00 80 cmp WORD PTR [ebp-0x2c],0x8000
1000b39a: 77 11 ja 0x1000b3ad
1000b39c: 8b 4d d4 mov ecx,DWORD PTR [ebp-0x2c]
1000b39f: 81 e1 ff ff 01 00 and ecx,0x1ffff
1000b3a5: 81 f9 00 80 01 00 cmp ecx,0x18000
1000b3ab: 75 33 jne 0x1000b3e0
1000b3ad: 83 7d d6 ff cmp DWORD PTR [ebp-0x2a],0xffffffff
1000b3b1: 75 2a jne 0x1000b3dd
1000b3b3: 83 65 d6 00 and DWORD PTR [ebp-0x2a],0x0
1000b3b7: 83 7d da ff cmp DWORD PTR [ebp-0x26],0xffffffff
1000b3bb: 75 1b jne 0x1000b3d8
1000b3bd: 83 65 da 00 and DWORD PTR [ebp-0x26],0x0
1000b3c1: 66 81 7d de ff ff cmp WORD PTR [ebp-0x22],0xffff
1000b3c7: 75 09 jne 0x1000b3d2
1000b3c9: 66 c7 45 de 00 80 mov WORD PTR [ebp-0x22],0x8000
1000b3cf: 47 inc edi
1000b3d0: eb 0e jmp 0x1000b3e0
1000b3d2: 66 ff 45 de inc WORD PTR [ebp-0x22]
1000b3d6: eb 08 jmp 0x1000b3e0
1000b3d8: ff 45 da inc DWORD PTR [ebp-0x26]
1000b3db: eb 03 jmp 0x1000b3e0
1000b3dd: ff 45 d6 inc DWORD PTR [ebp-0x2a]
1000b3e0: 66 81 ff ff 7f cmp di,0x7fff
1000b3e5: 8b 75 b4 mov esi,DWORD PTR [ebp-0x4c]
1000b3e8: 73 1c jae 0x1000b406
1000b3ea: 66 8b 4d d6 mov cx,WORD PTR [ebp-0x2a]
1000b3ee: 66 89 4d c4 mov WORD PTR [ebp-0x3c],cx
1000b3f2: 8b 4d d8 mov ecx,DWORD PTR [ebp-0x28]
1000b3f5: 89 4d c6 mov DWORD PTR [ebp-0x3a],ecx
1000b3f8: 8b 4d dc mov ecx,DWORD PTR [ebp-0x24]
1000b3fb: 0b f8 or edi,eax
1000b3fd: 89 4d ca mov DWORD PTR [ebp-0x36],ecx
1000b400: 66 89 7d ce mov WORD PTR [ebp-0x32],di
1000b404: eb 1a jmp 0x1000b420
1000b406: 66 f7 d8 neg ax
1000b409: 1b c0 sbb eax,eax
1000b40b: 83 65 c8 00 and DWORD PTR [ebp-0x38],0x0
1000b40f: 25 00 00 00 80 and eax,0x80000000
1000b414: 05 00 80 ff 7f add eax,0x7fff8000
1000b419: 83 65 c4 00 and DWORD PTR [ebp-0x3c],0x0
1000b41d: 89 45 cc mov DWORD PTR [ebp-0x34],eax
1000b420: 83 7d ac 00 cmp DWORD PTR [ebp-0x54],0x0
1000b424: 0f 85 6d fd ff ff jne 0x1000b197
1000b42a: 8b 45 cc mov eax,DWORD PTR [ebp-0x34]
1000b42d: 0f b7 4d c4 movzx ecx,WORD PTR [ebp-0x3c]
1000b431: 8b 75 c6 mov esi,DWORD PTR [ebp-0x3a]
1000b434: 8b 55 ca mov edx,DWORD PTR [ebp-0x36]
1000b437: c1 e8 10 shr eax,0x10
1000b43a: eb 2f jmp 0x1000b46b
1000b43c: c7 45 94 04 00 00 00 mov DWORD PTR [ebp-0x6c],0x4
1000b443: eb 1e jmp 0x1000b463
1000b445: 33 f6 xor esi,esi
1000b447: b8 ff 7f 00 00 mov eax,0x7fff
1000b44c: ba 00 00 00 80 mov edx,0x80000000
1000b451: 33 c9 xor ecx,ecx
1000b453: c7 45 94 02 00 00 00 mov DWORD PTR [ebp-0x6c],0x2
1000b45a: eb 0f jmp 0x1000b46b
1000b45c: c7 45 94 01 00 00 00 mov DWORD PTR [ebp-0x6c],0x1
1000b463: 33 c9 xor ecx,ecx
1000b465: 33 c0 xor eax,eax
1000b467: 33 d2 xor edx,edx
1000b469: 33 f6 xor esi,esi
1000b46b: 8b 7d 84 mov edi,DWORD PTR [ebp-0x7c]
1000b46e: 0b 45 8c or eax,DWORD PTR [ebp-0x74]
1000b471: 66 89 0f mov WORD PTR [edi],cx
1000b474: 66 89 47 0a mov WORD PTR [edi+0xa],ax
1000b478: 8b 45 94 mov eax,DWORD PTR [ebp-0x6c]
1000b47b: 89 77 02 mov DWORD PTR [edi+0x2],esi
1000b47e: 89 57 06 mov DWORD PTR [edi+0x6],edx
1000b481: 8b 4d fc mov ecx,DWORD PTR [ebp-0x4]
1000b484: 5f pop edi
1000b485: 5e pop esi
1000b486: 33 cd xor ecx,ebp
1000b488: 5b pop ebx
1000b489: e8 8d 86 ff ff call 0x10003b1b
1000b48e: c9 leave
1000b48f: c3 ret
; There's a switch/case somewhere!
1000b490: 98 ae 00 10
1000b494: ec ae 00 10
1000b498: 42 af 00 10
1000b49c: 75 af 00 10
1000b4a0: ba af 00 10
1000b4a4: f2 af 00 10
1000b4a8: 06 b0 00 10
1000b4ac: 61 b0 00 10
1000b4b0: 4c b0 00 10
1000b4b4: cb b0 00 10
1000b4b8: c0 b0 00 10
1000b4bc: 6f b0 00 10
| 52.346667 | 76 | 0.519517 |
659c96f21a312fc3d29502b4c19b147e3bf6d0c9 | 814 | asm | Assembly | programs/oeis/038/A038990.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/038/A038990.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/038/A038990.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A038990: Expansion of (1-x-x^2+2*x^3) / ((1-x)*(1+x)*(1-3*x+x^2)).
; 1,2,5,14,37,98,257,674,1765,4622,12101,31682,82945,217154,568517,1488398,3896677,10201634,26708225,69923042,183060901,479259662,1254718085,3284894594,8599965697,22515002498,58945041797,154320122894,404015326885,1057725857762,2769162246401,7249760881442,18980120397925,49690600312334,130091680539077,340584441304898,891661643375617,2334400488821954,6111539823090245
mov $2,$0
add $2,1
mov $3,$0
lpb $2,1
mov $0,$3
sub $2,1
sub $0,$2
trn $0,1
cal $0,61647 ; Beginning at the well for the topograph of a positive definite quadratic form with values 1, 1, 1 at a superbase (i.e., 1, 1 and 1 are the vonorms of the superbase), these numbers indicate the labels of the edges of the topograph on a path of greatest ascent.
add $1,$0
lpe
| 54.266667 | 366 | 0.759214 |
79ed5f6e51d7f80b54307c98f63e83ef6a2e1ff0 | 2,529 | asm | Assembly | src/firmware-tests/Platform/Buttons/Poll/ButtonPressTest.asm | pete-restall/Cluck2Sesame-Prototype | 99119b6748847a7b6aeadc4bee42cbed726f7fdc | [
"MIT"
] | 1 | 2019-12-12T09:07:08.000Z | 2019-12-12T09:07:08.000Z | src/firmware-tests/Platform/Buttons/Poll/ButtonPressTest.asm | pete-restall/Cluck2Sesame-Prototype | 99119b6748847a7b6aeadc4bee42cbed726f7fdc | [
"MIT"
] | null | null | null | src/firmware-tests/Platform/Buttons/Poll/ButtonPressTest.asm | pete-restall/Cluck2Sesame-Prototype | 99119b6748847a7b6aeadc4bee42cbed726f7fdc | [
"MIT"
] | null | null | null | #include "Platform.inc"
#include "FarCalls.inc"
#include "Timer0.inc"
#include "Buttons.inc"
#include "TestFixture.inc"
radix decimal
udata
global expectedButton1State
global expectedButton2State
global expectedBothButtonsState
expectedButton1State res 1
expectedButton2State res 1
expectedBothButtonsState res 1
ButtonPressTest code
global testArrange
testArrange:
fcall initialiseTimer0
call initialiseTimer1
call initialisePortc
fcall initialiseButtons
call startTimer1
banksel TMR1L
synchroniseWithStimuli:
movf TMR1L, W
btfsc STATUS, Z
goto synchroniseWithStimuli
clrf TMR1L
signalThatTheButtonStimuliCanBeApplied:
banksel PORTC
movlw (1 << RC1) | (1 << RC2)
iorwf PORTC
testAct:
fcall pollButtons
banksel TMR1L
movf TMR1L, W
btfsc STATUS, Z
goto testAct
testAssert:
assertButton1:
banksel buttonFlags
movlw 0
btfsc buttonFlags, BUTTON_FLAG_PRESSED1
movlw 0xff
banksel expectedButton1State
movf expectedButton1State
btfss STATUS, Z
goto assertButton1IsPressed
assertButton1IsReleased:
.aliasWForAssert _a
.assert "_a == 0, 'Expected button 1 to be released.'"
goto assertButton2
assertButton1IsPressed:
.aliasWForAssert _a
.assert "_a != 0, 'Expected button 1 to be pressed.'"
assertButton2:
banksel buttonFlags
movlw 0
btfsc buttonFlags, BUTTON_FLAG_PRESSED2
movlw 0xff
banksel expectedButton2State
movf expectedButton2State
btfss STATUS, Z
goto assertButton2IsPressed
assertButton2IsReleased:
.aliasWForAssert _a
.assert "_a == 0, 'Expected button 2 to be released.'"
goto assertBothButtons
assertButton2IsPressed:
.aliasWForAssert _a
.assert "_a != 0, 'Expected button 2 to be pressed.'"
assertBothButtons:
banksel buttonFlags
movlw 0
btfsc buttonFlags, BUTTON_FLAG_PRESSEDBOTH
movlw 0xff
banksel expectedBothButtonsState
movf expectedBothButtonsState
btfss STATUS, Z
goto assertBothButtonsArePressed
assertBothButtonsAreReleased:
.aliasWForAssert _a
.assert "_a == 0, 'Expected both buttons to be released.'"
return
assertBothButtonsArePressed:
.aliasWForAssert _a
.assert "_a != 0, 'Expected both buttons to be pressed.'"
return
initialiseTimer1:
banksel T1CON
movlw (1 << TMR1CS)
movwf T1CON
banksel TMR1H
clrf TMR1H
clrf TMR1L
return
startTimer1:
banksel T1CON
bsf T1CON, TMR1ON
return
initialisePortc:
banksel ANSEL
movlw ~((1 << ANS5) | (1 << ANS6))
andwf ANSEL
banksel PORTC
movlw ~((1 << RC1) | (1 << RC2))
andwf PORTC
banksel TRISC
movlw ~((1 << TRISC1) | (1 << TRISC2))
andwf TRISC
return
end
| 18.064286 | 59 | 0.778173 |
917787e0de1dfbc2794e8a1ee499d85cf8db202f | 462 | asm | Assembly | masm(msdos)/prueba.asm | GioProyects/ensamblador | c5f42eb3661fa359885f8050495ed46f36a6bbf0 | [
"MIT"
] | null | null | null | masm(msdos)/prueba.asm | GioProyects/ensamblador | c5f42eb3661fa359885f8050495ed46f36a6bbf0 | [
"MIT"
] | null | null | null | masm(msdos)/prueba.asm | GioProyects/ensamblador | c5f42eb3661fa359885f8050495ed46f36a6bbf0 | [
"MIT"
] | null | null | null | page 60,132
title programa
.model small
.stack 64
.data
msg1 db "hola mundo$"
msg2 db "hola mundo$"
msg db "son iguales$"
x dw 0
.code
begin proc far
;assume ss:stacksg,ds:datasg,cs:codesg
mov ax,@data
mov ds,ax
comienzo:
mov si,x
mov al,msg2[si]
cmp msg1[si],al
jne fin
cmp msg1[si],"$"
jz final
inc x
loop comienzo
fin:
ret
final:
mov ah,09h
mov dx,offset msg
mov ax,4c00h
int 21h
begin endp
end begin
| 12.833333 | 40 | 0.638528 |
292bef3fd269ab7ae64ba6e90526caaf786f6ee9 | 11,227 | asm | Assembly | special_inserts.asm | msikma/Complete-Fire-Red-Upgrade | 6a15ece5c180b9d98e1f8cc78e7e8f62f5e48708 | [
"WTFPL"
] | null | null | null | special_inserts.asm | msikma/Complete-Fire-Red-Upgrade | 6a15ece5c180b9d98e1f8cc78e7e8f62f5e48708 | [
"WTFPL"
] | null | null | null | special_inserts.asm | msikma/Complete-Fire-Red-Upgrade | 6a15ece5c180b9d98e1f8cc78e7e8f62f5e48708 | [
"WTFPL"
] | null | null | null | .text
.align 2
.thumb
.include "../asm_defines.s"
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
@ Game Speed Up
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
.org 0x890, 0xFF
main:
ldr r2, .SuperBits
ldrh r3, [r2]
mov r0, #1
bic r3, r0
strh r3, [r2]
loop_label:
swi #2
ldrh r3, [r2]
tst r3, r0
beq loop_label
bx lr
.align 2
.SuperBits: .word 0x0300310C
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
@ Dynamic Overworld Palette - part of hook at 0x779c
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
.org 0x779A, 0xff
.byte 0x0, 0x0
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
@ Hidden Abilities - Change Bit
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
.org 0x013144, 0xFF
HiddenAbilityChange1:
mov r1, r9
ldrb r1, [r1]
mul r1, r7
add r1, r8
ldr r0, [r1, #0x48] @personality
ldrh r2, [r1] @species
ldrb r1, [r1, #0x17]
lsr r1, r1, #0x7 @ability bit
bl HiddenAbilityChange1 + 0x2DC28 @0x08040D6C
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
@ Max Level Limiters
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
.org 0x21CFA, 0xFF
MaxLevelChange2:
.byte MAX_LEVEL
.org 0x21FB6, 0xFF
MaxLevelChange3:
.byte MAX_LEVEL
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
@ Hidden Abilities - Player
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
.org 0x026E34, 0xFF
HiddenAbilityChange2:
ldrb r0, [r4, #0x0] @personality
mov r1, r6 @ability bit
mov r2, r5 @species
bl HiddenAbilityChange2 + 0x19F38 @0x08040D6C
lsl r0, r0, #0x0
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
@ Hidden Abilities - Opponent
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
.org 0x026ECC, 0xFF
HiddenAbilityChange3:
and r0, r1
cmp r0, #0x0
beq HiddenAbilityChange3 + 0x20
ldrb r0, [r4, #0x0] @personality
mov r1, r6 @ability bit
mov r2, r5 @species
bl HiddenAbilityChange3 + 0x19EA0 @0x08040D6C
lsl r0, r0, #0x0
cmp r0, #0x2B
beq HiddenAbilityChange3 + 0x20
mov r0, #0x1
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
@ Hidden Abilities - Player
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
.org 0x02A800, 0xFF
HiddenAbilityChange4_1:
mov r1, #0x41
bl HiddenAbilityChange4_1 + 0x153E8 @get_attr
mov r5, r0
mov r0, r4
mov r1, #0x2E
bl HiddenAbilityChange4_1 + 0x153E8 @get_attr
ldrb r4, [r4, #0x0] @lowest personality byte
lsl r0, r0, #0x18
orr r4, r0 @000000b 00000000 00000000 pppppppp
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
@ Hidden Abilities - Opponent
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
.org 0x02A890, 0xFF
HiddenAbilityChange4_2:
lsl r0, r4, #0x18
lsr r0, r0, #0x18 @personality lowest byte
lsr r1, r4, #0x18 @ability bit
mov r2, r5 @species
bl HiddenAbilityChange4_2 + 0x164DC @0x08040D6C
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
@ Max Level Limiter
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
.org 0x32F6E, 0xFF
MaxLevelChange14:
.byte MAX_LEVEL - 1
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
@ Max Level Limiters
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
.org 0x3E806, 0xFF
MaxLevelChange4:
.byte MAX_LEVEL
.org 0x3E872, 0xFF
MaxLevelChange5:
.byte MAX_LEVEL
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
@ Hidden Abilities - Determine Ability Bit
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
.org 0x40D38, 0xFF
DetermineAbilityMain:
push {lr}
bl offset_to_ability
ldr r2, b_last_copied_ability
strb r0, [r2]
pop {r1}
bx r1
offset_to_ability:
push {r4-r5, lr}
mov r4, r0
mov r1, #0xB
bl DetermineAbilityMain - 0x1150 @0x3FBE8 @get_attr
lsl r5, r0, #0x10
lsr r5, r5, #0x10
mov r0, r4
mov r1, #0x2E
bl DetermineAbilityMain - 0x1150 @0x3FBE8 @get_attr
lsl r1, r0, #0x1F
ldr r0, [r4, #0x0]
mov r2, r5 @species
bl determine_ability
pop {r4-r5}
pop {r1}
bx r1
determine_and_copy:
push {lr}
bl determine_ability
ldr r2, b_last_copied_ability
strb r0, [r2]
pop {r1}
bx r1
determine_ability:
lsl r3, r2, #0x3
sub r3, r3, r2
lsl r3, r3, #0x2
ldr r2, base_stats_table
ldr r2, [r2]
add r3, r2, r3
cmp r1, #0x0
beq no_hidden
ldrb r2, [r3, #0x1A]
cmp r2, #0x0
bne copy_hidden
no_hidden:
lsl r0, r0, #0x1F
cmp r0, #0x0
beq first_slotted
ldrb r0, [r3, #0x17]
cmp r0, #0x0
beq first_slotted
bx lr
first_slotted:
ldrb r0, [r3, #0x16]
bx lr
copy_hidden:
mov r0, r2
bx lr
.align 2
base_stats_table: .word 0x80001BC
b_last_copied_ability: .word 0x02023D6A
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
@ Hidden Abilities - Summary Screen
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
.org 0x041318, 0xFF
@poke summary info
HiddenAbilityChange5:
ldrh r2, [r7] @species
ldrb r1, [r7, #0x17]
lsr r1, r1, #0x7 @ability bit
ldrb r0, [r4, #0x0] @personality
bl HiddenAbilityChange5 - 0x5AC @ 0x08040D6C
add r1, r7, #0x4
strb r0, [r1, #0x1C]
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
@ Max Level Limiters
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
.org 0x41834, 0xFF
MaxLevelChange6:
.byte MAX_LEVEL
.org 0x41B0E, 0xFF
MaxLevelChange13:
.byte MAX_LEVEL - 1
.org 0x41B1E, 0xFF
MaxLevelChange7:
.byte MAX_LEVEL, 0x29, 0x6, 0xD9, MAX_LEVEL
.org 0x420E8, 0xFF
MaxLevelChange9:
.byte MAX_LEVEL
.org 0x420EC, 0xFF
MaxLevelChange10:
.byte MAX_LEVEL
.org 0x4274E, 0xFF
MaxLevelChange11:
.byte MAX_LEVEL
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
@ Max Level - Limiter
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
.org 0x45684, 0xFF
MaxLevelChange12:
.byte MAX_LEVEL
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
@ Hidden Abilities - Egg Hatching 1
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
.org 0x46CA0, 0xFF
HiddenAbilityEggHatching1:
mov r0, r6
mov r1, #0x2E
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
@ Hidden Abilities - Egg Hatching 2
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
.org 0x46D3C, 0xFF
HiddenAbilityEggHatching2:
mov r0, r5
mov r1, #0x2E
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
@ Max Level Hack - Limiter
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
.org 0x4A216, 0xFF
MaxLevelChange1:
.byte MAX_LEVEL
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
@ Character Customization
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
.org 0x5e152, 0xff
mov r1, #0x5
orr r0, r1
strb r0, [r4]
ldrb r0, [r5, #0x3]
strb r0, [r4, #0x1a]
.org 0x5e5d4, 0xff
.byte 0x8, 0x47 @ routine_ptr+1 at 5e5f4
.org 0x5e744, 0xff @ fix size
lsl r4, r4, #0x10
lsr r4, r4, #0x10
lsl r5, r5, #0x10
lsr r5, r5, #0x10
mov r0, #0x0
str r0, [sp, #0x20]
mov r1, r9
ldrb r0, [r1, #0x1]
ldrb r1, [r1, #0x3]
lsl r1, r1, #0x18
lsr r1, r1, #0x10
orr r0, r1
.org 0x5e8f0, 0xff @ change size
lsl r0, r0, #0x10
lsr r0, r0, #0x10
.org 0x5e962, 0xff
.hword 0x0
.org 0x5ea0a, 0xff @ fix createsprite
.word 0x0
.org 0x5ee84, 0xff @ fix link npcs
.byte 0x8, 0x47
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
@ Dynamic Overworld Palettes
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
.org 0x5f093, 0xff @don't auto-load NPC palettes into slot 0 or 0xA
.byte 0xE0
.org 0x5f114, 0xff @don't reset pal slot during player animation or reflection
.hword 0x0
.org 0x5f4ba, 0xff @remove byte casts for NPC palette number
.byte 0x1, 0x0, 0x0, 0x0
.org 0x5f548, 0xff @remove byte casts for NPC palette number
.byte 0xc0, 0x0, 0x9, 0x49
.org 0x5f54c, 0xff @remove byte casts for NPC palette number
.byte 0x0, 0x0
.org 0x5f5d2, 0xff @remove byte casts for NPC palette number
.byte 0x2, 0x0, 0x0, 0x0
.org 0x5f5e8, 0xff @don't auto-load NPC palettes into slot 0 or 0xA
.byte 0x70, 0x47
.org 0x5f658, 0xff @don't auto-load NPC palettes into slot 0 or 0xA
.byte 0x70, 0x47
.org 0x79c18, 0xff @don't load rain palette on entering map
.byte 0x0, 0x25, 0xe, 0xe0
.org 0x7a31f, 0xff @don't treat slot 0xC as weather palette
.byte 0xe0
.org 0x7a85e, 0xff @make it compatible with daniilS' snowflakes routine
.byte 0x80, 0x18
.org 0x7a872, 0xff @make it compatible with daniilS' snowflakes routine
.byte 0x1, 0x22, 0x5, 0xe0
.org 0x7aae7, 0xff @don't record brightened slots
.byte 0xe0
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
@ Ghost Battle - Register Push
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
.org 0x7F904, 0xff
.byte 0x10
.org 0x7f986, 0xff
.byte 0x10, 0xbd
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
@ Triple Layer Blocks
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
.org 0x9B868, 0xFF
.byte 0x2
.org 0x9B86E, 0xFF
.byte 0x2f, 0xd0
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
@ Dynamic Overworld Palettes
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
.org 0xdaec4, 0xff @@don't auto-load NPC palettes into slot 0 or 0xA
.byte 0x70, 0x47
.org 0xdaf20, 0xff @don't auto-load NPC palettes into slot 0 or 0xA
.byte 0x70, 0x47
.org 0xdafb8, 0xff @don't reset pal slot during player animation or reflection
.hword 0x0
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
@ Remove TM Animation
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
.org 0x11CA2C, 0xFF
.byte 0x00, 0xF0, 0x0E, 0xFA
.org 0x11CD9E, 0xFF
.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0xE0
.org 0x11CE6E, 0xFF
.byte 0x0, 0x0
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
@ Max Level Hack - Rare Candies
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
.org 0x1262D2, 0xFF
MaxLevelRareCandies:
.byte MAX_LEVEL
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
@ Max Level Hack - Summary Screen
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
.org 0x136684, 0xFF
SummaryScreenExpDisplay1:
.byte MAX_LEVEL - 1
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
@ Hidden Abilities - Ability Names
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
.org 0x1366EC, 0xFF
HiddenAbilityChange7:
lsl r4, r0, #0x10
ldr r0, [r6]
add r0, r8
ldrb r1, [r0, #0x0] @personality
orr r4, r1 @ssssssss ssssssss 00000000 pppppppp
mov r1, #0x2E
bl HiddenAbilityChange7 - 0xF6B04 @get_attr
lsl r0, r0, #0x18
lsr r1, r0, #0x18 @ability bit
lsl r0, r4, #0x18
lsr r0, r0, #0x18 @personality
lsr r2, r4, #0x10 @species
bl HiddenAbilityChange7 - 0xF5980 @ 0x08040D6C
lsl r0, r0, #0x18
lsr r4, r0, #0x18
ldr r0, [r6]
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
@ Max Level Hack - Summary Screen Exp Display
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
.org 0x13A9DC, 0xFF
SummaryScreenExpDisplay2:
.byte MAX_LEVEL - 1, 0x2D, 0x0, 0xD9
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
@ Dynamic Overworld Palettes
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
.org 0x1d9895, 0xff @don't load sand palette on healing
.byte 0x7, 0x9c, 0xbe, 0x3c, 0x8, 0x8d, 0x3b, 0x8, 0x8, 0x4
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
@ Triple Layer Blocks
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
.org 0x352F0B, 0xFF
.byte 0x70
.org 0x352F16, 0xFF
.byte 0x1C
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
@ Multichoice Pointers
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
.org 0x3E05B0, 0xFF
.word MULTICHOICE_STRING_LOADER
.word 0x2
.word MULTICHOICE_STRING_LOADER
.word 0x3
.word MULTICHOICE_STRING_LOADER
.word 0x4
.word MULTICHOICE_STRING_LOADER
.word 0x5
.word MULTICHOICE_STRING_LOADER
.word 0x6
.word MULTICHOICE_STRING_LOADER
.word 0x7
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
@ Ghost Battle Fix
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
.org 0x3fd35b, 0xff
.byte 0xfd, 0x6, 0xab, 0xfb, 0xfe, 0xff
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
@ Dynamic Overworld Palettes
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
.org 0x45fd52, 0xff @pal slot of scroll arrow in Fame Checker
.byte 0x9
| 22.589537 | 89 | 0.535851 |
71792d328cf22598d7b56d7c561391b4524977f5 | 960 | asm | Assembly | mips/24-1.asm | ping58972/Computer-Organization-Architecture | 0f9377a9e54e3f0494143963aecf1ba7c83eec45 | [
"ISC"
] | null | null | null | mips/24-1.asm | ping58972/Computer-Organization-Architecture | 0f9377a9e54e3f0494143963aecf1ba7c83eec45 | [
"ISC"
] | null | null | null | mips/24-1.asm | ping58972/Computer-Organization-Architecture | 0f9377a9e54e3f0494143963aecf1ba7c83eec45 | [
"ISC"
] | null | null | null | ## MIPS Assignment #4
## Ch24-1.asm
## String Length
.data
prompt: .asciiz "\n\n(Exit if input nothing!)\nInput some string for count:"
strL_prompt: .asciiz "The length of the string is:"
str_space: .space 1024
new_line: .asciiz "\n"
.text
.globl main
main:
#Initialize
li $t0, 0
la $s1, str_space
move $t1, $s1
#prompt user to input string
li $v0, 4
la $a0, prompt
syscall
li $v0, 8
li $a1, 24
move $a0, $t1
move $t2, $a0
syscall
#if input nothing => exit
la $a0, new_line
lb $a0, ($a0)
lb $t1, ($t1)
beq $t1, $a0, done
#loop for count string
loop:
lbu $t3, 0($t2)
nop
beq $t3, $0, result
addiu $t0, $t0, 1
addiu $t2, $t2, 1
j loop
#print the result and loop for enter again.
result:
li $v0, 4
la $a0, strL_prompt
syscall
li $v0, 1
#don't count the '\n' in string.
subiu $t0, $t0, 1
move $a0, $t0
syscall
j main
#finish if user enter nothing.
done:
li $v0, 10 # Exit the program.
syscall
| 18.113208 | 77 | 0.625 |
6521ad89ac9f1ad739c5bd78039a3e963ab199a4 | 418 | asm | Assembly | data/mapHeaders/VermilionCity.asm | AmateurPanda92/pokemon-rby-dx | f7ba1cc50b22d93ed176571e074a52d73360da93 | [
"MIT"
] | 9 | 2020-07-12T19:44:21.000Z | 2022-03-03T23:32:40.000Z | data/mapHeaders/VermilionCity.asm | JStar-debug2020/pokemon-rby-dx | c2fdd8145d96683addbd8d9075f946a68d1527a1 | [
"MIT"
] | 7 | 2020-07-16T10:48:52.000Z | 2021-01-28T18:32:02.000Z | data/mapHeaders/VermilionCity.asm | JStar-debug2020/pokemon-rby-dx | c2fdd8145d96683addbd8d9075f946a68d1527a1 | [
"MIT"
] | 2 | 2021-03-28T18:33:43.000Z | 2021-05-06T13:12:09.000Z | VermilionCity_h:
db OVERWORLD ; tileset
db VERMILION_CITY_HEIGHT, VERMILION_CITY_WIDTH ; dimensions (y, x)
dw VermilionCity_Blocks ; blocks
dw VermilionCity_TextPointers ; texts
dw VermilionCity_Script ; scripts
db NORTH | EAST ; connections
NORTH_MAP_CONNECTION VERMILION_CITY, ROUTE_6, 5, 0, Route6_Blocks
EAST_MAP_CONNECTION VERMILION_CITY, ROUTE_11, 4, 0, Route11_Blocks
dw VermilionCity_Object ; objects
| 38 | 67 | 0.818182 |
7aa92d5758740d0bf778a6a6a90e83b8278d31ef | 250 | asm | Assembly | programs/oeis/037/A037951.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/037/A037951.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/037/A037951.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A037951: binomial(n,[ (n-3)/2 ]).
; 0,0,0,1,1,5,6,21,28,84,120,330,495,1287,2002,5005,8008,19448,31824,75582,125970,293930,497420,1144066,1961256,4457400,7726160,17383860,30421755,67863915,119759850,265182525
mov $1,$0
div $0,2
add $0,2
bin $1,$0
| 31.25 | 174 | 0.72 |
9c7d2d19fd6868e5f00abd6504b93e6c7c2c758e | 13,111 | asm | Assembly | src/win/x86_64/win_x86_64_asm_forwSequentialRead_Word128.asm | csl-ajou/X-mem | 5c2d5c6bf2c899c838bf6af07fadaeb5c0a261e9 | [
"MIT"
] | 28 | 2019-05-11T20:52:32.000Z | 2021-12-06T02:36:23.000Z | src/win/x86_64/win_x86_64_asm_forwSequentialRead_Word128.asm | csl-ajou/X-mem | 5c2d5c6bf2c899c838bf6af07fadaeb5c0a261e9 | [
"MIT"
] | 24 | 2021-05-20T17:12:15.000Z | 2021-09-22T22:19:23.000Z | src/win/x86_64/win_x86_64_asm_forwSequentialRead_Word128.asm | 365andreas/X-Mem | f0d8b64a67647e0b1680d8739338245130b76286 | [
"MIT"
] | 23 | 2019-05-29T00:38:11.000Z | 2021-11-22T21:54:24.000Z | ; The MIT License (MIT)
;
; Copyright (c) 2014 Microsoft
;
; Permission is hereby granted, free of charge, to any person obtaining a copy
; of this software and associated documentation files (the "Software"), to deal
; in the Software without restriction, including without limitation the rights
; to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
; copies of the Software, and to permit persons to whom the Software is
; furnished to do so, subject to the following conditions:
;
; The above copyright notice and this permission notice shall be included in all
; copies or substantial portions of the Software.
;
; THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
; IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
; FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
; AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
; LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
; OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
; SOFTWARE.
;
; Author: Mark Gottscho <mgottscho@ucla.edu>
.code
win_x86_64_asm_forwSequentialRead_Word128 proc
; Arguments:
; rcx is address of the first 128-bit word in the array
; rdx is address of the last 128-bit word in the array
; rax holds current 128-bit word address
; xmm0 holds result from reading the memory 128-bit wide
mov rax,rcx ; initialize current word address to start of the array
cmp rax,rdx ; have we reached the last word yet?
jae done ; if current word address is >= last word address, jump to done
myloop:
; Unroll 256 loads of 128-bit words (16 bytes is 10h) before checking loop condition.
vmovdqa xmm0, xmmword ptr [rax+0000h]
vmovdqa xmm0, xmmword ptr [rax+0010h]
vmovdqa xmm0, xmmword ptr [rax+0020h]
vmovdqa xmm0, xmmword ptr [rax+0030h]
vmovdqa xmm0, xmmword ptr [rax+0040h]
vmovdqa xmm0, xmmword ptr [rax+0050h]
vmovdqa xmm0, xmmword ptr [rax+0060h]
vmovdqa xmm0, xmmword ptr [rax+0070h]
vmovdqa xmm0, xmmword ptr [rax+0080h]
vmovdqa xmm0, xmmword ptr [rax+0090h]
vmovdqa xmm0, xmmword ptr [rax+00A0h]
vmovdqa xmm0, xmmword ptr [rax+00B0h]
vmovdqa xmm0, xmmword ptr [rax+00C0h]
vmovdqa xmm0, xmmword ptr [rax+00D0h]
vmovdqa xmm0, xmmword ptr [rax+00E0h]
vmovdqa xmm0, xmmword ptr [rax+00F0h]
vmovdqa xmm0, xmmword ptr [rax+0100h]
vmovdqa xmm0, xmmword ptr [rax+0110h]
vmovdqa xmm0, xmmword ptr [rax+0120h]
vmovdqa xmm0, xmmword ptr [rax+0130h]
vmovdqa xmm0, xmmword ptr [rax+0140h]
vmovdqa xmm0, xmmword ptr [rax+0150h]
vmovdqa xmm0, xmmword ptr [rax+0160h]
vmovdqa xmm0, xmmword ptr [rax+0170h]
vmovdqa xmm0, xmmword ptr [rax+0180h]
vmovdqa xmm0, xmmword ptr [rax+0190h]
vmovdqa xmm0, xmmword ptr [rax+01A0h]
vmovdqa xmm0, xmmword ptr [rax+01B0h]
vmovdqa xmm0, xmmword ptr [rax+01C0h]
vmovdqa xmm0, xmmword ptr [rax+01D0h]
vmovdqa xmm0, xmmword ptr [rax+01E0h]
vmovdqa xmm0, xmmword ptr [rax+01F0h]
vmovdqa xmm0, xmmword ptr [rax+0200h]
vmovdqa xmm0, xmmword ptr [rax+0210h]
vmovdqa xmm0, xmmword ptr [rax+0220h]
vmovdqa xmm0, xmmword ptr [rax+0230h]
vmovdqa xmm0, xmmword ptr [rax+0240h]
vmovdqa xmm0, xmmword ptr [rax+0250h]
vmovdqa xmm0, xmmword ptr [rax+0260h]
vmovdqa xmm0, xmmword ptr [rax+0270h]
vmovdqa xmm0, xmmword ptr [rax+0280h]
vmovdqa xmm0, xmmword ptr [rax+0290h]
vmovdqa xmm0, xmmword ptr [rax+02A0h]
vmovdqa xmm0, xmmword ptr [rax+02B0h]
vmovdqa xmm0, xmmword ptr [rax+02C0h]
vmovdqa xmm0, xmmword ptr [rax+02D0h]
vmovdqa xmm0, xmmword ptr [rax+02E0h]
vmovdqa xmm0, xmmword ptr [rax+02F0h]
vmovdqa xmm0, xmmword ptr [rax+0300h]
vmovdqa xmm0, xmmword ptr [rax+0310h]
vmovdqa xmm0, xmmword ptr [rax+0320h]
vmovdqa xmm0, xmmword ptr [rax+0330h]
vmovdqa xmm0, xmmword ptr [rax+0340h]
vmovdqa xmm0, xmmword ptr [rax+0350h]
vmovdqa xmm0, xmmword ptr [rax+0360h]
vmovdqa xmm0, xmmword ptr [rax+0370h]
vmovdqa xmm0, xmmword ptr [rax+0380h]
vmovdqa xmm0, xmmword ptr [rax+0390h]
vmovdqa xmm0, xmmword ptr [rax+03A0h]
vmovdqa xmm0, xmmword ptr [rax+03B0h]
vmovdqa xmm0, xmmword ptr [rax+03C0h]
vmovdqa xmm0, xmmword ptr [rax+03D0h]
vmovdqa xmm0, xmmword ptr [rax+03E0h]
vmovdqa xmm0, xmmword ptr [rax+03F0h]
vmovdqa xmm0, xmmword ptr [rax+0400h]
vmovdqa xmm0, xmmword ptr [rax+0410h]
vmovdqa xmm0, xmmword ptr [rax+0420h]
vmovdqa xmm0, xmmword ptr [rax+0430h]
vmovdqa xmm0, xmmword ptr [rax+0440h]
vmovdqa xmm0, xmmword ptr [rax+0450h]
vmovdqa xmm0, xmmword ptr [rax+0460h]
vmovdqa xmm0, xmmword ptr [rax+0470h]
vmovdqa xmm0, xmmword ptr [rax+0480h]
vmovdqa xmm0, xmmword ptr [rax+0490h]
vmovdqa xmm0, xmmword ptr [rax+04A0h]
vmovdqa xmm0, xmmword ptr [rax+04B0h]
vmovdqa xmm0, xmmword ptr [rax+04C0h]
vmovdqa xmm0, xmmword ptr [rax+04D0h]
vmovdqa xmm0, xmmword ptr [rax+04E0h]
vmovdqa xmm0, xmmword ptr [rax+04F0h]
vmovdqa xmm0, xmmword ptr [rax+0500h]
vmovdqa xmm0, xmmword ptr [rax+0510h]
vmovdqa xmm0, xmmword ptr [rax+0520h]
vmovdqa xmm0, xmmword ptr [rax+0530h]
vmovdqa xmm0, xmmword ptr [rax+0540h]
vmovdqa xmm0, xmmword ptr [rax+0550h]
vmovdqa xmm0, xmmword ptr [rax+0560h]
vmovdqa xmm0, xmmword ptr [rax+0570h]
vmovdqa xmm0, xmmword ptr [rax+0580h]
vmovdqa xmm0, xmmword ptr [rax+0590h]
vmovdqa xmm0, xmmword ptr [rax+05A0h]
vmovdqa xmm0, xmmword ptr [rax+05B0h]
vmovdqa xmm0, xmmword ptr [rax+05C0h]
vmovdqa xmm0, xmmword ptr [rax+05D0h]
vmovdqa xmm0, xmmword ptr [rax+05E0h]
vmovdqa xmm0, xmmword ptr [rax+05F0h]
vmovdqa xmm0, xmmword ptr [rax+0600h]
vmovdqa xmm0, xmmword ptr [rax+0610h]
vmovdqa xmm0, xmmword ptr [rax+0620h]
vmovdqa xmm0, xmmword ptr [rax+0630h]
vmovdqa xmm0, xmmword ptr [rax+0640h]
vmovdqa xmm0, xmmword ptr [rax+0650h]
vmovdqa xmm0, xmmword ptr [rax+0660h]
vmovdqa xmm0, xmmword ptr [rax+0670h]
vmovdqa xmm0, xmmword ptr [rax+0680h]
vmovdqa xmm0, xmmword ptr [rax+0690h]
vmovdqa xmm0, xmmword ptr [rax+06A0h]
vmovdqa xmm0, xmmword ptr [rax+06B0h]
vmovdqa xmm0, xmmword ptr [rax+06C0h]
vmovdqa xmm0, xmmword ptr [rax+06D0h]
vmovdqa xmm0, xmmword ptr [rax+06E0h]
vmovdqa xmm0, xmmword ptr [rax+06F0h]
vmovdqa xmm0, xmmword ptr [rax+0700h]
vmovdqa xmm0, xmmword ptr [rax+0710h]
vmovdqa xmm0, xmmword ptr [rax+0720h]
vmovdqa xmm0, xmmword ptr [rax+0730h]
vmovdqa xmm0, xmmword ptr [rax+0740h]
vmovdqa xmm0, xmmword ptr [rax+0750h]
vmovdqa xmm0, xmmword ptr [rax+0760h]
vmovdqa xmm0, xmmword ptr [rax+0770h]
vmovdqa xmm0, xmmword ptr [rax+0780h]
vmovdqa xmm0, xmmword ptr [rax+0790h]
vmovdqa xmm0, xmmword ptr [rax+07A0h]
vmovdqa xmm0, xmmword ptr [rax+07B0h]
vmovdqa xmm0, xmmword ptr [rax+07C0h]
vmovdqa xmm0, xmmword ptr [rax+07D0h]
vmovdqa xmm0, xmmword ptr [rax+07E0h]
vmovdqa xmm0, xmmword ptr [rax+07F0h]
vmovdqa xmm0, xmmword ptr [rax+0800h]
vmovdqa xmm0, xmmword ptr [rax+0810h]
vmovdqa xmm0, xmmword ptr [rax+0820h]
vmovdqa xmm0, xmmword ptr [rax+0830h]
vmovdqa xmm0, xmmword ptr [rax+0840h]
vmovdqa xmm0, xmmword ptr [rax+0850h]
vmovdqa xmm0, xmmword ptr [rax+0860h]
vmovdqa xmm0, xmmword ptr [rax+0870h]
vmovdqa xmm0, xmmword ptr [rax+0880h]
vmovdqa xmm0, xmmword ptr [rax+0890h]
vmovdqa xmm0, xmmword ptr [rax+08A0h]
vmovdqa xmm0, xmmword ptr [rax+08B0h]
vmovdqa xmm0, xmmword ptr [rax+08C0h]
vmovdqa xmm0, xmmword ptr [rax+08D0h]
vmovdqa xmm0, xmmword ptr [rax+08E0h]
vmovdqa xmm0, xmmword ptr [rax+08F0h]
vmovdqa xmm0, xmmword ptr [rax+0900h]
vmovdqa xmm0, xmmword ptr [rax+0910h]
vmovdqa xmm0, xmmword ptr [rax+0920h]
vmovdqa xmm0, xmmword ptr [rax+0930h]
vmovdqa xmm0, xmmword ptr [rax+0940h]
vmovdqa xmm0, xmmword ptr [rax+0950h]
vmovdqa xmm0, xmmword ptr [rax+0960h]
vmovdqa xmm0, xmmword ptr [rax+0970h]
vmovdqa xmm0, xmmword ptr [rax+0980h]
vmovdqa xmm0, xmmword ptr [rax+0990h]
vmovdqa xmm0, xmmword ptr [rax+09A0h]
vmovdqa xmm0, xmmword ptr [rax+09B0h]
vmovdqa xmm0, xmmword ptr [rax+09C0h]
vmovdqa xmm0, xmmword ptr [rax+09D0h]
vmovdqa xmm0, xmmword ptr [rax+09E0h]
vmovdqa xmm0, xmmword ptr [rax+09F0h]
vmovdqa xmm0, xmmword ptr [rax+0A00h]
vmovdqa xmm0, xmmword ptr [rax+0A10h]
vmovdqa xmm0, xmmword ptr [rax+0A20h]
vmovdqa xmm0, xmmword ptr [rax+0A30h]
vmovdqa xmm0, xmmword ptr [rax+0A40h]
vmovdqa xmm0, xmmword ptr [rax+0A50h]
vmovdqa xmm0, xmmword ptr [rax+0A60h]
vmovdqa xmm0, xmmword ptr [rax+0A70h]
vmovdqa xmm0, xmmword ptr [rax+0A80h]
vmovdqa xmm0, xmmword ptr [rax+0A90h]
vmovdqa xmm0, xmmword ptr [rax+0AA0h]
vmovdqa xmm0, xmmword ptr [rax+0AB0h]
vmovdqa xmm0, xmmword ptr [rax+0AC0h]
vmovdqa xmm0, xmmword ptr [rax+0AD0h]
vmovdqa xmm0, xmmword ptr [rax+0AE0h]
vmovdqa xmm0, xmmword ptr [rax+0AF0h]
vmovdqa xmm0, xmmword ptr [rax+0B00h]
vmovdqa xmm0, xmmword ptr [rax+0B10h]
vmovdqa xmm0, xmmword ptr [rax+0B20h]
vmovdqa xmm0, xmmword ptr [rax+0B30h]
vmovdqa xmm0, xmmword ptr [rax+0B40h]
vmovdqa xmm0, xmmword ptr [rax+0B50h]
vmovdqa xmm0, xmmword ptr [rax+0B60h]
vmovdqa xmm0, xmmword ptr [rax+0B70h]
vmovdqa xmm0, xmmword ptr [rax+0B80h]
vmovdqa xmm0, xmmword ptr [rax+0B90h]
vmovdqa xmm0, xmmword ptr [rax+0BA0h]
vmovdqa xmm0, xmmword ptr [rax+0BB0h]
vmovdqa xmm0, xmmword ptr [rax+0BC0h]
vmovdqa xmm0, xmmword ptr [rax+0BD0h]
vmovdqa xmm0, xmmword ptr [rax+0BE0h]
vmovdqa xmm0, xmmword ptr [rax+0BF0h]
vmovdqa xmm0, xmmword ptr [rax+0C00h]
vmovdqa xmm0, xmmword ptr [rax+0C10h]
vmovdqa xmm0, xmmword ptr [rax+0C20h]
vmovdqa xmm0, xmmword ptr [rax+0C30h]
vmovdqa xmm0, xmmword ptr [rax+0C40h]
vmovdqa xmm0, xmmword ptr [rax+0C50h]
vmovdqa xmm0, xmmword ptr [rax+0C60h]
vmovdqa xmm0, xmmword ptr [rax+0C70h]
vmovdqa xmm0, xmmword ptr [rax+0C80h]
vmovdqa xmm0, xmmword ptr [rax+0C90h]
vmovdqa xmm0, xmmword ptr [rax+0CA0h]
vmovdqa xmm0, xmmword ptr [rax+0CB0h]
vmovdqa xmm0, xmmword ptr [rax+0CC0h]
vmovdqa xmm0, xmmword ptr [rax+0CD0h]
vmovdqa xmm0, xmmword ptr [rax+0CE0h]
vmovdqa xmm0, xmmword ptr [rax+0CF0h]
vmovdqa xmm0, xmmword ptr [rax+0D00h]
vmovdqa xmm0, xmmword ptr [rax+0D10h]
vmovdqa xmm0, xmmword ptr [rax+0D20h]
vmovdqa xmm0, xmmword ptr [rax+0D30h]
vmovdqa xmm0, xmmword ptr [rax+0D40h]
vmovdqa xmm0, xmmword ptr [rax+0D50h]
vmovdqa xmm0, xmmword ptr [rax+0D60h]
vmovdqa xmm0, xmmword ptr [rax+0D70h]
vmovdqa xmm0, xmmword ptr [rax+0D80h]
vmovdqa xmm0, xmmword ptr [rax+0D90h]
vmovdqa xmm0, xmmword ptr [rax+0DA0h]
vmovdqa xmm0, xmmword ptr [rax+0DB0h]
vmovdqa xmm0, xmmword ptr [rax+0DC0h]
vmovdqa xmm0, xmmword ptr [rax+0DD0h]
vmovdqa xmm0, xmmword ptr [rax+0DE0h]
vmovdqa xmm0, xmmword ptr [rax+0DF0h]
vmovdqa xmm0, xmmword ptr [rax+0E00h]
vmovdqa xmm0, xmmword ptr [rax+0E10h]
vmovdqa xmm0, xmmword ptr [rax+0E20h]
vmovdqa xmm0, xmmword ptr [rax+0E30h]
vmovdqa xmm0, xmmword ptr [rax+0E40h]
vmovdqa xmm0, xmmword ptr [rax+0E50h]
vmovdqa xmm0, xmmword ptr [rax+0E60h]
vmovdqa xmm0, xmmword ptr [rax+0E70h]
vmovdqa xmm0, xmmword ptr [rax+0E80h]
vmovdqa xmm0, xmmword ptr [rax+0E90h]
vmovdqa xmm0, xmmword ptr [rax+0EA0h]
vmovdqa xmm0, xmmword ptr [rax+0EB0h]
vmovdqa xmm0, xmmword ptr [rax+0EC0h]
vmovdqa xmm0, xmmword ptr [rax+0ED0h]
vmovdqa xmm0, xmmword ptr [rax+0EE0h]
vmovdqa xmm0, xmmword ptr [rax+0EF0h]
vmovdqa xmm0, xmmword ptr [rax+0F00h]
vmovdqa xmm0, xmmword ptr [rax+0F10h]
vmovdqa xmm0, xmmword ptr [rax+0F20h]
vmovdqa xmm0, xmmword ptr [rax+0F30h]
vmovdqa xmm0, xmmword ptr [rax+0F40h]
vmovdqa xmm0, xmmword ptr [rax+0F50h]
vmovdqa xmm0, xmmword ptr [rax+0F60h]
vmovdqa xmm0, xmmword ptr [rax+0F70h]
vmovdqa xmm0, xmmword ptr [rax+0F80h]
vmovdqa xmm0, xmmword ptr [rax+0F90h]
vmovdqa xmm0, xmmword ptr [rax+0FA0h]
vmovdqa xmm0, xmmword ptr [rax+0FB0h]
vmovdqa xmm0, xmmword ptr [rax+0FC0h]
vmovdqa xmm0, xmmword ptr [rax+0FD0h]
vmovdqa xmm0, xmmword ptr [rax+0FE0h]
vmovdqa xmm0, xmmword ptr [rax+0FF0h]
add rax,1000h ; End of one unrolled loop iteration. Increment pointer by 256 words of size 16 bytes, which is 4096 bytes.
cmp rax,rdx ; have we reached the last word yet?
jae done ; if current word address is >= last word address, jump to done
jmp myloop ; continue loop
done:
xor eax,eax ; return 0
ret
win_x86_64_asm_forwSequentialRead_Word128 endp
end
| 42.293548 | 151 | 0.68904 |
9a0df1bc06c26336346906c82012630ed38cd283 | 468 | asm | Assembly | programs/oeis/292/A292586.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/292/A292586.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/292/A292586.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A292586: a(n) = A002110(A001221(n)) = product of first omega(n) primes.
; 1,2,2,2,2,6,2,2,2,6,2,6,2,6,6,2,2,6,2,6,6,6,2,6,2,6,2,6,2,30,2,2,6,6,6,6,2,6,6,6,2,30,2,6,6,6,2,6,2,6,6,6,2,6,6,6,6,6,2,30,2,6,6,2,6,30,2,6,6,30,2,6,2,6,6,6,6,30,2,6,2,6,2,30,6,6,6,6,2,30,6,6,6,6,6,6,2,6,6,6
seq $0,1221 ; Number of distinct primes dividing n (also called omega(n)).
seq $0,2110 ; Primorial numbers (first definition): product of first n primes. Sometimes written prime(n)#.
| 78 | 209 | 0.630342 |
0ec240059e8884fc69fce41699e53c7d64af3a01 | 365 | asm | Assembly | video/atari_ascii_chr_header.asm | puzzud/puzl6502 | c38fa015d0d25f2c29f79fa41de10f8cc8c39693 | [
"MIT"
] | null | null | null | video/atari_ascii_chr_header.asm | puzzud/puzl6502 | c38fa015d0d25f2c29f79fa41de10f8cc8c39693 | [
"MIT"
] | null | null | null | video/atari_ascii_chr_header.asm | puzzud/puzl6502 | c38fa015d0d25f2c29f79fa41de10f8cc8c39693 | [
"MIT"
] | null | null | null | !source "puzl/video/ascii_chr_header.asm"
CHAR_ARROW_CURSOR = 127
CHAR_ARROW_UP = 128
CHAR_ARROW_DOWN = 129
CHAR_ARROW_LEFT = 130
CHAR_ARROW_RIGHT = 131
CHAR_DIAMOND = 132
CHAR_HEART = 133
CHAR_CIRCLE = 134
CHAR_CLUB = 135
CHAR_SPADE = 136
| 28.076923 | 43 | 0.526027 |
7a3bf028ed81e961ff5d5b1ec1c4835694dd1909 | 1,626 | asm | Assembly | programs/oeis/101/A101864.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/101/A101864.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/101/A101864.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A101864: Wythoff BB numbers.
; 5,13,18,26,34,39,47,52,60,68,73,81,89,94,102,107,115,123,128,136,141,149,157,162,170,178,183,191,196,204,212,217,225,233,238,246,251,259,267,272,280,285,293,301,306,314,322,327,335,340,348,356,361,369,374,382,390,395,403,411,416,424,429,437,445,450,458,466,471,479,484,492,500,505,513,518,526,534,539,547,555,560,568,573,581,589,594,602,610,615,623,628,636,644,649,657,662,670,678,683,691,699,704,712,717,725,733,738,746,751,759,767,772,780,788,793,801,806,814,822,827,835,843,848,856,861,869,877,882,890,895,903,911,916,924,932,937,945,950,958,966,971,979,984,992,1000,1005,1013,1021,1026,1034,1039,1047,1055,1060,1068,1076,1081,1089,1094,1102,1110,1115,1123,1128,1136,1144,1149,1157,1165,1170,1178,1183,1191,1199,1204,1212,1220,1225,1233,1238,1246,1254,1259,1267,1272,1280,1288,1293,1301,1309,1314,1322,1327,1335,1343,1348,1356,1361,1369,1377,1382,1390,1398,1403,1411,1416,1424,1432,1437,1445,1453,1458,1466,1471,1479,1487,1492,1500,1505,1513,1521,1526,1534,1542,1547,1555,1560,1568,1576,1581,1589,1597,1602,1610,1615,1623,1631,1636,1644,1649,1657,1665,1670,1678,1686,1691,1699,1704,1712
mov $3,$0
mov $4,$0
add $4,1
lpb $4,1
mov $0,$3
sub $4,1
sub $0,$4
mov $7,$0
mov $9,2
lpb $9,1
sub $9,1
add $0,$9
sub $0,1
mov $2,$0
mov $6,$0
lpb $2,1
add $6,1
lpb $6,1
mov $6,$2
add $2,2
pow $6,2
lpe
sub $2,1
add $6,$0
lpe
mov $5,$2
mov $10,$9
lpb $10,1
mov $8,$5
sub $10,1
lpe
lpe
lpb $7,1
mov $7,0
sub $8,$5
lpe
mov $5,$8
mul $5,3
add $5,5
add $1,$5
lpe
| 36.133333 | 1,091 | 0.651292 |
1f5646a24b652e00a8e86da2c3a0d5ee47807ed2 | 7,002 | asm | Assembly | Transynther/x86/_processed/NONE/_zr_/i9-9900K_12_0xca.log_21829_343.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_zr_/i9-9900K_12_0xca.log_21829_343.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_zr_/i9-9900K_12_0xca.log_21829_343.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r14
push %r15
push %rax
push %rbp
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_WC_ht+0xff7, %r15
nop
inc %rdx
movl $0x61626364, (%r15)
nop
xor %r10, %r10
lea addresses_D_ht+0xb9da, %rbp
inc %rdi
movups (%rbp), %xmm0
vpextrq $0, %xmm0, %rax
inc %rdi
lea addresses_WT_ht+0x14d60, %r10
clflush (%r10)
nop
inc %rdi
movl $0x61626364, (%r10)
nop
nop
nop
nop
add $17006, %rbp
lea addresses_D_ht+0x1bac2, %r10
nop
and $38271, %r14
movb (%r10), %al
nop
nop
inc %rbp
lea addresses_UC_ht+0x12842, %rbp
inc %rdi
movw $0x6162, (%rbp)
nop
nop
nop
nop
nop
inc %r10
lea addresses_WC_ht+0x1d42, %rdx
nop
nop
nop
add %rax, %rax
vmovups (%rdx), %ymm7
vextracti128 $0, %ymm7, %xmm7
vpextrq $1, %xmm7, %r10
nop
nop
nop
inc %r10
lea addresses_UC_ht+0x15482, %rdi
nop
nop
add $3967, %rdx
mov (%rdi), %bp
add %rdx, %rdx
lea addresses_D_ht+0xc842, %rsi
lea addresses_WT_ht+0x1c776, %rdi
nop
xor $21306, %rdx
mov $30, %rcx
rep movsb
nop
nop
nop
nop
and %r14, %r14
lea addresses_UC_ht+0x9042, %r15
nop
nop
dec %rcx
movw $0x6162, (%r15)
nop
nop
nop
nop
inc %r15
lea addresses_UC_ht+0x1e82, %rsi
lea addresses_WT_ht+0xa2b8, %rdi
nop
nop
nop
nop
nop
xor $5655, %r10
mov $36, %rcx
rep movsw
nop
add %rdi, %rdi
lea addresses_UC_ht+0x12d42, %rbp
nop
cmp %rax, %rax
mov (%rbp), %rdi
nop
cmp $36939, %rbp
lea addresses_WT_ht+0x59d9, %rdx
nop
nop
nop
nop
cmp %r15, %r15
mov $0x6162636465666768, %rbp
movq %rbp, %xmm6
vmovups %ymm6, (%rdx)
nop
nop
nop
nop
and %rcx, %rcx
lea addresses_UC_ht+0x1bc42, %rsi
nop
add $12958, %r15
movb $0x61, (%rsi)
nop
nop
cmp %r14, %r14
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbp
pop %rax
pop %r15
pop %r14
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r12
push %r13
push %r8
push %rbp
push %rcx
// Faulty Load
lea addresses_UC+0x13042, %rbp
nop
nop
sub %r10, %r10
mov (%rbp), %cx
lea oracles, %r10
and $0xff, %rcx
shlq $12, %rcx
mov (%r10,%rcx,1), %rcx
pop %rcx
pop %rbp
pop %r8
pop %r13
pop %r12
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'size': 2, 'NT': False, 'type': 'addresses_UC', 'same': False, 'AVXalign': False, 'congruent': 0}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'size': 2, 'NT': False, 'type': 'addresses_UC', 'same': True, 'AVXalign': False, 'congruent': 0}}
<gen_prepare_buffer>
{'OP': 'STOR', 'dst': {'size': 4, 'NT': False, 'type': 'addresses_WC_ht', 'same': False, 'AVXalign': False, 'congruent': 0}}
{'OP': 'LOAD', 'src': {'size': 16, 'NT': False, 'type': 'addresses_D_ht', 'same': False, 'AVXalign': False, 'congruent': 3}}
{'OP': 'STOR', 'dst': {'size': 4, 'NT': False, 'type': 'addresses_WT_ht', 'same': False, 'AVXalign': False, 'congruent': 1}}
{'OP': 'LOAD', 'src': {'size': 1, 'NT': False, 'type': 'addresses_D_ht', 'same': False, 'AVXalign': False, 'congruent': 7}}
{'OP': 'STOR', 'dst': {'size': 2, 'NT': False, 'type': 'addresses_UC_ht', 'same': False, 'AVXalign': False, 'congruent': 11}}
{'OP': 'LOAD', 'src': {'size': 32, 'NT': False, 'type': 'addresses_WC_ht', 'same': False, 'AVXalign': False, 'congruent': 8}}
{'OP': 'LOAD', 'src': {'size': 2, 'NT': False, 'type': 'addresses_UC_ht', 'same': False, 'AVXalign': False, 'congruent': 6}}
{'OP': 'REPM', 'src': {'same': False, 'type': 'addresses_D_ht', 'congruent': 11}, 'dst': {'same': False, 'type': 'addresses_WT_ht', 'congruent': 0}}
{'OP': 'STOR', 'dst': {'size': 2, 'NT': False, 'type': 'addresses_UC_ht', 'same': False, 'AVXalign': False, 'congruent': 11}}
{'OP': 'REPM', 'src': {'same': False, 'type': 'addresses_UC_ht', 'congruent': 6}, 'dst': {'same': True, 'type': 'addresses_WT_ht', 'congruent': 1}}
{'OP': 'LOAD', 'src': {'size': 8, 'NT': False, 'type': 'addresses_UC_ht', 'same': False, 'AVXalign': False, 'congruent': 7}}
{'OP': 'STOR', 'dst': {'size': 32, 'NT': False, 'type': 'addresses_WT_ht', 'same': False, 'AVXalign': False, 'congruent': 0}}
{'OP': 'STOR', 'dst': {'size': 1, 'NT': False, 'type': 'addresses_UC_ht', 'same': False, 'AVXalign': False, 'congruent': 10}}
{'00': 21829}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
| 37.244681 | 2,999 | 0.65467 |
da0a007c8ed5a3059b3a2c77016bd1eef3831874 | 220 | asm | Assembly | libmikeos/src.os/os_print_4hex.asm | mynameispyo/InpyoOS | b6ddb6d9715b027ab65891bd4c4f46dbe5c9890d | [
"BSD-3-Clause",
"MIT"
] | null | null | null | libmikeos/src.os/os_print_4hex.asm | mynameispyo/InpyoOS | b6ddb6d9715b027ab65891bd4c4f46dbe5c9890d | [
"BSD-3-Clause",
"MIT"
] | null | null | null | libmikeos/src.os/os_print_4hex.asm | mynameispyo/InpyoOS | b6ddb6d9715b027ab65891bd4c4f46dbe5c9890d | [
"BSD-3-Clause",
"MIT"
] | null | null | null |
; @@@ void mikeos_print_4hex(unsigned int value);
%include "os_vector.inc"
section .text
use16
global _mikeos_print_4hex
_mikeos_print_4hex:
mov bx, sp
mov ax, [ss:bx + 2]
mov bx, os_print_4hex
call bx
ret
| 12.222222 | 49 | 0.718182 |
ffc0acc495363d2f8ea1d15bdb04e0ddd0c0674e | 550 | asm | Assembly | libsrc/_DEVELOPMENT/alloc/obstack/c/sccz80/obstack_alloc_callee.asm | meesokim/z88dk | 5763c7778f19a71d936b3200374059d267066bb2 | [
"ClArtistic"
] | null | null | null | libsrc/_DEVELOPMENT/alloc/obstack/c/sccz80/obstack_alloc_callee.asm | meesokim/z88dk | 5763c7778f19a71d936b3200374059d267066bb2 | [
"ClArtistic"
] | null | null | null | libsrc/_DEVELOPMENT/alloc/obstack/c/sccz80/obstack_alloc_callee.asm | meesokim/z88dk | 5763c7778f19a71d936b3200374059d267066bb2 | [
"ClArtistic"
] | null | null | null |
; ===============================================================
; Dec 2013
; ===============================================================
;
; void *obstack_alloc(struct obstack *ob, size_t size)
;
; Allocate an uninitialized block of size bytes from the obstack.
; Implicitly closes and growing object.
;
; ===============================================================
SECTION code_alloc_obstack
PUBLIC obstack_alloc_callee
obstack_alloc_callee:
pop hl
pop bc
ex (sp),hl
INCLUDE "alloc/obstack/z80/asm_obstack_alloc.asm"
| 22.916667 | 65 | 0.478182 |
e5bc0de21ed9e7f186ec71a9c8576ccf818e171b | 2,839 | asm | Assembly | mentos/boot.asm | adamantinum/MentOS | d24274f1047a0df0ed925297329c61332b3dab0f | [
"MIT"
] | 1 | 2022-01-10T15:14:10.000Z | 2022-01-10T15:14:10.000Z | mentos/boot.asm | LauraCanaia/MentOS | 9af9701ddb34b7904d9379badc2ba8e19a7b7071 | [
"MIT"
] | null | null | null | mentos/boot.asm | LauraCanaia/MentOS | 9af9701ddb34b7904d9379badc2ba8e19a7b7071 | [
"MIT"
] | null | null | null | ; MentOS, The Mentoring Operating system project
; @file boot.asm
; @brief Kernel start location, multiboot header
; @copyright (c) 2019 This file is distributed under the MIT License.
; See LICENSE.md for details.
[BITS 32] ; All instructions should be 32-bit.
[EXTERN kmain] ; The start point of our C code
; Grub is informed with this flag to load
; the kernel and kernel modules on a page boundary.
MBOOT_PAGE_ALIGN equ 1<<0
; Grub is informed with this flag to provide the kernel
; with memory information.
MBOOT_MEM_INFO equ 1<<1
; This is the multiboot magic value.
MBOOT_HEADER_MAGIC equ 0x1BADB002
; This is the flag combination that we prepare for Grub
; to read at kernel load time.
MBOOT_HEADER_FLAGS equ MBOOT_PAGE_ALIGN | MBOOT_MEM_INFO
; Grub reads this value to make sure it loads a kernel
; and not just garbage.
MBOOT_CHECKSUM equ - (MBOOT_HEADER_MAGIC + MBOOT_HEADER_FLAGS)
LOAD_MEMORY_ADDRESS equ 0x00000000
; reserve (1024*1024) for the stack on a doubleword boundary
KERNEL_STACK_SIZE equ 0x100000
; -----------------------------------------------------------------------------
; SECTION (multiboot_header)
; -----------------------------------------------------------------------------
section .multiboot_header
align 4
; This is the GRUB Multiboot header.
multiboot_header:
dd MBOOT_HEADER_MAGIC
dd MBOOT_HEADER_FLAGS
dd MBOOT_CHECKSUM
; -----------------------------------------------------------------------------
; SECTION (data)
; -----------------------------------------------------------------------------
section .data, nobits
align 4096
[GLOBAL boot_page_dir]
boot_page_dir:
resb 0x1000
boot_page_tabl:
resb 0x1000
; -----------------------------------------------------------------------------
; SECTION (text)
; -----------------------------------------------------------------------------
section .text
[GLOBAL kernel_entry]
kernel_entry:
; Clear interrupt flag [IF = 0]; 0xFA
cli
; To set up a stack, we simply set the esp register to point to the top of
; our stack (as it grows downwards).
mov esp, stack_top
; pass the initial ESP
push esp
;mov ebp, esp
; pass Multiboot info structure
push ebx
; pass Multiboot magic number
push eax
; Call the kmain() function inside kernel.c
call kmain
; Set interrupt flag [IF = 1]; 0xFA
; Clear interrupts and hang if we return from kmain
cli
hang:
hlt
jmp hang
; -----------------------------------------------------------------------------
; SECTION (bss)
; -----------------------------------------------------------------------------
section .bss
[GLOBAL stack_bottom]
[GLOBAL stack_top]
align 16
stack_bottom:
resb KERNEL_STACK_SIZE
stack_top:
; the top of the stack is the bottom because the stack counts down
| 31.544444 | 79 | 0.567101 |
1d00f25c6b526479ad3fef2ea4f0699e69eb0f81 | 238 | asm | Assembly | sprite.asm | TheStormkeeper/c64 | e34fd31a006fae6a0748949905c73787ac287f67 | [
"MIT"
] | 11 | 2016-10-27T19:54:47.000Z | 2021-10-21T23:31:57.000Z | sprite.asm | ennorehling/c64 | e34fd31a006fae6a0748949905c73787ac287f67 | [
"MIT"
] | null | null | null | sprite.asm | ennorehling/c64 | e34fd31a006fae6a0748949905c73787ac287f67 | [
"MIT"
] | 5 | 2015-07-16T15:20:07.000Z | 2020-07-31T19:32:27.000Z | processor 6502
org $0801 ; sys2061
sysline:
.byte $0b,$08,$01,$00,$9e,$32,$30,$36,$31,$00,$00,$00
org $080d ; sys2061
lda #$80
sta $07f8
lda #$01
sta $d015
lda #$80
sta $d000
sta $d001
rts
org $2000
INCBIN "sprite1.spr"
| 12.526316 | 54 | 0.609244 |
5d7bc2f6824931a8b91cd8b3e8d2128e9cd84385 | 262 | asm | Assembly | libsrc/_DEVELOPMENT/alloc/malloc/c/sdcc_iy/calloc_unlocked_callee.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 640 | 2017-01-14T23:33:45.000Z | 2022-03-30T11:28:42.000Z | libsrc/_DEVELOPMENT/alloc/malloc/c/sdcc_iy/calloc_unlocked_callee.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 1,600 | 2017-01-15T16:12:02.000Z | 2022-03-31T12:11:12.000Z | libsrc/_DEVELOPMENT/alloc/malloc/c/sdcc_iy/calloc_unlocked_callee.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 215 | 2017-01-17T10:43:03.000Z | 2022-03-23T17:25:02.000Z |
; void *calloc_unlocked_callee(size_t nmemb, size_t size)
SECTION code_clib
SECTION code_alloc_malloc
PUBLIC _calloc_unlocked_callee
EXTERN asm_calloc_unlocked
_calloc_unlocked_callee:
pop af
pop hl
pop bc
push af
jp asm_calloc_unlocked
| 13.789474 | 57 | 0.78626 |
f2482387cc7e54797a72e4417d148bc478918430 | 15,067 | asm | Assembly | fiat-amd64/105.50_ratio12370_seed1660769872531946_mul_secp256k1.asm | dderjoel/fiat-crypto | 57a9612577d766a0ae83169ea9517bfa7f01ea4e | [
"BSD-1-Clause",
"Apache-2.0",
"MIT-0",
"MIT"
] | 491 | 2015-11-25T23:44:39.000Z | 2022-03-29T17:31:21.000Z | fiat-amd64/105.50_ratio12370_seed1660769872531946_mul_secp256k1.asm | dderjoel/fiat-crypto | 57a9612577d766a0ae83169ea9517bfa7f01ea4e | [
"BSD-1-Clause",
"Apache-2.0",
"MIT-0",
"MIT"
] | 755 | 2016-02-02T14:03:05.000Z | 2022-03-31T16:47:23.000Z | fiat-amd64/105.50_ratio12370_seed1660769872531946_mul_secp256k1.asm | dderjoel/fiat-crypto | 57a9612577d766a0ae83169ea9517bfa7f01ea4e | [
"BSD-1-Clause",
"Apache-2.0",
"MIT-0",
"MIT"
] | 117 | 2015-10-25T16:28:15.000Z | 2022-02-08T23:01:09.000Z | SECTION .text
GLOBAL mul_secp256k1
mul_secp256k1:
sub rsp, 0x110 ; last 0x30 (6) for Caller - save regs
mov [ rsp + 0xe0 ], rbx; saving to stack
mov [ rsp + 0xe8 ], rbp; saving to stack
mov [ rsp + 0xf0 ], r12; saving to stack
mov [ rsp + 0xf8 ], r13; saving to stack
mov [ rsp + 0x100 ], r14; saving to stack
mov [ rsp + 0x108 ], r15; saving to stack
mov rax, [ rsi + 0x0 ]; load m64 x4 to register64
mov r10, [ rsi + 0x10 ]; load m64 x2 to register64
xchg rdx, rax; x4, swapping with arg2, which is currently in rdx
mulx r11, rbx, [ rax + 0x8 ]; x10, x9<- x4 * arg2[1]
mov rbp, [ rsi + 0x8 ]; load m64 x1 to register64
mulx r12, r13, [ rax + 0x0 ]; x12, x11<- x4 * arg2[0]
mov r14, 0xd838091dd2253531 ; moving imm to reg
xchg rdx, r14; 0xd838091dd2253531, swapping with x4, which is currently in rdx
mulx r15, rcx, r13; _, x20<- x11 * 0xd838091dd2253531
mov r15, 0xfffffffefffffc2f ; moving imm to reg
xchg rdx, rcx; x20, swapping with 0xd838091dd2253531, which is currently in rdx
mulx r8, r9, r15; x29, x28<- x20 * 0xfffffffefffffc2f
mov r15, 0xffffffffffffffff ; moving imm to reg
mov [ rsp + 0x0 ], rdi; spilling out1 to mem
mulx rcx, rdi, r15; x25, x24<- x20 * 0xffffffffffffffff
mov [ rsp + 0x8 ], rsi; spilling arg1 to mem
mov [ rsp + 0x10 ], rcx; spilling x25 to mem
mulx rsi, rcx, r15; x27, x26<- x20 * 0xffffffffffffffff
add rbx, r12; could be done better, if r0 has been u8 as well
mov r12, -0x2 ; moving imm to reg
inc r12; OF<-0x0, preserve CF (debug: 6; load -2, increase it, save as -1)
adox r9, r13
xchg rdx, r14; x4, swapping with x20, which is currently in rdx
mulx r9, r13, [ rax + 0x10 ]; x8, x7<- x4 * arg2[2]
setc r12b; spill CF x14 to reg (r12)
clc;
adcx rcx, r8
adcx rdi, rsi
mov r8, rdx; preserving value of x4 into a new reg
mov rdx, [ rax + 0x0 ]; saving arg2[0] in rdx.
mulx rsi, r15, rbp; x54, x53<- x1 * arg2[0]
mov [ rsp + 0x18 ], r9; spilling x8 to mem
setc r9b; spill CF x33 to reg (r9)
clc;
mov [ rsp + 0x20 ], r10; spilling x2 to mem
mov r10, -0x1 ; moving imm to reg
movzx r12, r12b
adcx r12, r10; loading flag
adcx r11, r13
adox rcx, rbx
setc bl; spill CF x16 to reg (rbx)
clc;
adcx r15, rcx
adox rdi, r11
mov r12, 0xd838091dd2253531 ; moving imm to reg
mov rdx, r15; x62 to rdx
mulx r15, r13, r12; _, x72<- x62 * 0xd838091dd2253531
mov r15, 0xfffffffefffffc2f ; moving imm to reg
xchg rdx, r15; 0xfffffffefffffc2f, swapping with x62, which is currently in rdx
mulx r11, rcx, r13; x81, x80<- x72 * 0xfffffffefffffc2f
mov r10, rdx; preserving value of 0xfffffffefffffc2f into a new reg
mov rdx, [ rax + 0x8 ]; saving arg2[1] in rdx.
mov byte [ rsp + 0x28 ], r9b; spilling byte x33 to mem
mulx r12, r9, rbp; x52, x51<- x1 * arg2[1]
mov r10, 0xffffffffffffffff ; moving imm to reg
mov rdx, r13; x72 to rdx
mov [ rsp + 0x30 ], r14; spilling x20 to mem
mulx r13, r14, r10; x79, x78<- x72 * 0xffffffffffffffff
seto r10b; spill OF x42 to reg (r10)
mov [ rsp + 0x38 ], r13; spilling x79 to mem
mov r13, -0x2 ; moving imm to reg
inc r13; OF<-0x0, preserve CF (debug: 6; load -2, increase it, save as -1)
adox r14, r11
seto r11b; spill OF x83 to reg (r11)
inc r13; OF<-0x0, preserve CF (debug: state 2 (y: -1, n: 0))
adox r9, rsi
adcx r9, rdi
xchg rdx, r8; x4, swapping with x72, which is currently in rdx
mulx rdx, rsi, [ rax + 0x18 ]; x6, x5<- x4 * arg2[3]
setc dil; spill CF x65 to reg (rdi)
clc;
adcx rcx, r15
adcx r14, r9
mov rcx, rdx; preserving value of x6 into a new reg
mov rdx, [ rax + 0x0 ]; saving arg2[0] in rdx.
mulx r15, r9, [ rsp + 0x20 ]; x107, x106<- x2 * arg2[0]
mov rdx, [ rax + 0x8 ]; arg2[1] to rdx
mov [ rsp + 0x40 ], rcx; spilling x6 to mem
mulx r13, rcx, [ rsp + 0x20 ]; x105, x104<- x2 * arg2[1]
mov [ rsp + 0x48 ], r13; spilling x105 to mem
setc r13b; spill CF x92 to reg (r13)
clc;
adcx r9, r14
mov r14, 0xd838091dd2253531 ; moving imm to reg
mov rdx, r9; x115 to rdx
mov byte [ rsp + 0x50 ], r13b; spilling byte x92 to mem
mulx r9, r13, r14; _, x125<- x115 * 0xd838091dd2253531
mov r9, 0xfffffffefffffc2f ; moving imm to reg
xchg rdx, r9; 0xfffffffefffffc2f, swapping with x115, which is currently in rdx
mov byte [ rsp + 0x58 ], r11b; spilling byte x83 to mem
mulx r14, r11, r13; x134, x133<- x125 * 0xfffffffefffffc2f
mov rdx, 0xffffffffffffffff ; moving imm to reg
mov byte [ rsp + 0x60 ], dil; spilling byte x65 to mem
mov byte [ rsp + 0x68 ], r10b; spilling byte x42 to mem
mulx rdi, r10, r13; x132, x131<- x125 * 0xffffffffffffffff
mov [ rsp + 0x70 ], rsi; spilling x5 to mem
mov byte [ rsp + 0x78 ], bl; spilling byte x16 to mem
mulx rsi, rbx, r13; x128, x127<- x125 * 0xffffffffffffffff
setc dl; spill CF x116 to reg (rdx)
clc;
adcx r10, r14
xchg rdx, rbp; x1, swapping with x116, which is currently in rdx
mov [ rsp + 0x80 ], r10; spilling x135 to mem
mulx r14, r10, [ rax + 0x10 ]; x50, x49<- x1 * arg2[2]
mov [ rsp + 0x88 ], r14; spilling x50 to mem
mov r14, 0xffffffffffffffff ; moving imm to reg
xchg rdx, r13; x125, swapping with x1, which is currently in rdx
mov byte [ rsp + 0x90 ], bpl; spilling byte x116 to mem
mulx rdx, rbp, r14; x130, x129<- x125 * 0xffffffffffffffff
adox r10, r12
adcx rbp, rdi
xchg rdx, r8; x72, swapping with x130, which is currently in rdx
mulx r12, rdi, r14; x77, x76<- x72 * 0xffffffffffffffff
seto r14b; spill OF x58 to reg (r14)
mov [ rsp + 0x98 ], rbp; spilling x137 to mem
mov rbp, -0x2 ; moving imm to reg
inc rbp; OF<-0x0, preserve CF (debug: 6; load -2, increase it, save as -1)
adox r11, r9
seto r11b; spill OF x143 to reg (r11)
inc rbp; OF<-0x0, preserve CF (debug: state 2 (y: -1, n: 0))
adox rcx, r15
adcx rbx, r8
mov r15, [ rsp + 0x70 ]; load m64 x5 to register64
seto r9b; spill OF x109 to reg (r9)
movzx r8, byte [ rsp + 0x78 ]; load byte memx16 to register64
dec rbp; OF<-0x0, preserve CF (debug: state 3 (y: 0, n: -1))
adox r8, rbp; loading flag
adox r15, [ rsp + 0x18 ]
mov r8, 0x0 ; moving imm to reg
adcx rsi, r8
mov r8, 0xffffffffffffffff ; moving imm to reg
xchg rdx, r8; 0xffffffffffffffff, swapping with x72, which is currently in rdx
mov [ rsp + 0xa0 ], rsi; spilling x141 to mem
mulx rbp, rsi, [ rsp + 0x30 ]; x23, x22<- x20 * 0xffffffffffffffff
movzx rdx, byte [ rsp + 0x28 ]; load byte memx33 to register64
clc;
mov [ rsp + 0xa8 ], rbx; spilling x139 to mem
mov rbx, -0x1 ; moving imm to reg
adcx rdx, rbx; loading flag
adcx rsi, [ rsp + 0x10 ]
seto dl; spill OF x18 to reg (rdx)
movzx rbx, byte [ rsp + 0x68 ]; load byte memx42 to register64
mov byte [ rsp + 0xb0 ], r9b; spilling byte x109 to mem
mov r9, 0x0 ; moving imm to reg
dec r9; OF<-0x0, preserve CF (debug: state 4 (thanks Paul))
adox rbx, r9; loading flag
adox r15, rsi
mov rbx, 0xffffffffffffffff ; moving imm to reg
xchg rdx, r8; x72, swapping with x18, which is currently in rdx
mulx rdx, rsi, rbx; x75, x74<- x72 * 0xffffffffffffffff
mov r9, 0x0 ; moving imm to reg
adcx rbp, r9
movzx r9, byte [ rsp + 0x60 ]; load byte memx65 to register64
clc;
mov rbx, -0x1 ; moving imm to reg
adcx r9, rbx; loading flag
adcx r15, r10
setc r9b; spill CF x67 to reg (r9)
movzx r10, byte [ rsp + 0x58 ]; load byte memx83 to register64
clc;
adcx r10, rbx; loading flag
adcx rdi, [ rsp + 0x38 ]
adcx rsi, r12
movzx r10, r8b; x19, copying x18 here, cause x18 is needed in a reg for other than x19, namely all: , x19, size: 1
mov r12, [ rsp + 0x40 ]; load m64 x6 to register64
lea r10, [ r10 + r12 ]; r8/64 + m8
mov r12, 0x0 ; moving imm to reg
adcx rdx, r12
movzx r8, byte [ rsp + 0x50 ]; load byte memx92 to register64
clc;
adcx r8, rbx; loading flag
adcx r15, rdi
setc r8b; spill CF x94 to reg (r8)
movzx rdi, byte [ rsp + 0x90 ]; load byte memx116 to register64
clc;
adcx rdi, rbx; loading flag
adcx r15, rcx
setc dil; spill CF x118 to reg (rdi)
clc;
movzx r11, r11b
adcx r11, rbx; loading flag
adcx r15, [ rsp + 0x80 ]
adox rbp, r10
mov r11, rdx; preserving value of x88 into a new reg
mov rdx, [ rax + 0x18 ]; saving arg2[3] in rdx.
mulx r13, rcx, r13; x48, x47<- x1 * arg2[3]
seto r10b; spill OF x46 to reg (r10)
dec r12; OF<-0x0, preserve CF (debug: state 1(0x0) (thanks Paul))
movzx r14, r14b
adox r14, r12; loading flag
adox rcx, [ rsp + 0x88 ]
mov rdx, [ rsp + 0x20 ]; x2 to rdx
mulx rbx, r14, [ rax + 0x10 ]; x103, x102<- x2 * arg2[2]
mov r12, 0x0 ; moving imm to reg
adox r13, r12
dec r12; OF<-0x0, preserve CF (debug: state 3 (y: 0, n: -1))
movzx r9, r9b
adox r9, r12; loading flag
adox rbp, rcx
movzx r9, r10b; x70, copying x46 here, cause x46 is needed in a reg for other than x70, namely all: , x70--x71, size: 1
adox r9, r13
setc r10b; spill CF x145 to reg (r10)
clc;
movzx r8, r8b
adcx r8, r12; loading flag
adcx rbp, rsi
mulx rdx, rsi, [ rax + 0x18 ]; x101, x100<- x2 * arg2[3]
adcx r11, r9
setc r8b; spill CF x98 to reg (r8)
movzx rcx, byte [ rsp + 0xb0 ]; load byte memx109 to register64
clc;
adcx rcx, r12; loading flag
adcx r14, [ rsp + 0x48 ]
adcx rsi, rbx
mov rcx, 0x0 ; moving imm to reg
adcx rdx, rcx
mov rbx, [ rsp + 0x8 ]; load m64 arg1 to register64
mov r13, [ rbx + 0x18 ]; load m64 x3 to register64
movzx r9, r8b; x99, copying x98 here, cause x98 is needed in a reg for other than x99, namely all: , x99, size: 1
adox r9, rcx
xchg rdx, r13; x3, swapping with x114, which is currently in rdx
mulx r8, rcx, [ rax + 0x0 ]; x160, x159<- x3 * arg2[0]
add dil, 0x7F; load flag from rm/8 into OF, clears other flag. NODE, if operand1 is not a byte reg, this fails.
seto dil; since that has deps, resore it whereever it was
adox rbp, r14
adox rsi, r11
movzx r10, r10b
adcx r10, r12; loading flag
adcx rbp, [ rsp + 0x98 ]
adox r13, r9
seto dil; spill OF x124 to reg (rdi)
inc r12; OF<-0x0, preserve CF (debug: state 2 (y: -1, n: 0))
adox rcx, r15
mov r15, [ rsp + 0xa8 ]; x148, copying x139 here, cause x139 is needed in a reg for other than x148, namely all: , x148--x149, size: 1
adcx r15, rsi
mov r10, [ rsp + 0xa0 ]; x150, copying x141 here, cause x141 is needed in a reg for other than x150, namely all: , x150--x151, size: 1
adcx r10, r13
mov r11, 0xd838091dd2253531 ; moving imm to reg
xchg rdx, r11; 0xd838091dd2253531, swapping with x3, which is currently in rdx
mulx r14, r9, rcx; _, x178<- x168 * 0xd838091dd2253531
movzx r14, dil; x152, copying x124 here, cause x124 is needed in a reg for other than x152, namely all: , x152, size: 1
adcx r14, r12
xchg rdx, r11; x3, swapping with 0xd838091dd2253531, which is currently in rdx
mulx rsi, rdi, [ rax + 0x8 ]; x158, x157<- x3 * arg2[1]
clc;
adcx rdi, r8
mov r8, 0xfffffffefffffc2f ; moving imm to reg
xchg rdx, r8; 0xfffffffefffffc2f, swapping with x3, which is currently in rdx
mulx r13, r12, r9; x187, x186<- x178 * 0xfffffffefffffc2f
adox rdi, rbp
setc bpl; spill CF x162 to reg (rbp)
clc;
adcx r12, rcx
mov r12, 0xffffffffffffffff ; moving imm to reg
xchg rdx, r12; 0xffffffffffffffff, swapping with 0xfffffffefffffc2f, which is currently in rdx
mulx rcx, r12, r9; x185, x184<- x178 * 0xffffffffffffffff
seto r11b; spill OF x171 to reg (r11)
mov rdx, -0x2 ; moving imm to reg
inc rdx; OF<-0x0, preserve CF (debug: 6; load -2, increase it, save as -1)
adox r12, r13
mov r13, 0xffffffffffffffff ; moving imm to reg
mov rdx, r13; 0xffffffffffffffff to rdx
mov [ rsp + 0xb8 ], r14; spilling x152 to mem
mulx r13, r14, r9; x183, x182<- x178 * 0xffffffffffffffff
adox r14, rcx
xchg rdx, r8; x3, swapping with 0xffffffffffffffff, which is currently in rdx
mulx rcx, r8, [ rax + 0x10 ]; x156, x155<- x3 * arg2[2]
adcx r12, rdi
mulx rdx, rdi, [ rax + 0x18 ]; x154, x153<- x3 * arg2[3]
mov [ rsp + 0xc0 ], r10; spilling x150 to mem
setc r10b; spill CF x198 to reg (r10)
mov [ rsp + 0xc8 ], r14; spilling x190 to mem
seto r14b; spill OF x191 to reg (r14)
mov [ rsp + 0xd0 ], r15; spilling x148 to mem
mov r15, r12; x206, copying x197 here, cause x197 is needed in a reg for other than x206, namely all: , x206--x207, x216, size: 2
mov byte [ rsp + 0xd8 ], r11b; spilling byte x171 to mem
mov r11, 0xfffffffefffffc2f ; moving imm to reg
sub r15, r11
mov r11, -0x1 ; moving imm to reg
inc r11; OF<-0x0, preserve CF (debug: state 5 (thanks Paul))
mov r11, -0x1 ; moving imm to reg
movzx rbp, bpl
adox rbp, r11; loading flag
adox rsi, r8
mov rbp, 0xffffffffffffffff ; moving imm to reg
xchg rdx, rbp; 0xffffffffffffffff, swapping with x154, which is currently in rdx
mulx r9, r8, r9; x181, x180<- x178 * 0xffffffffffffffff
adox rdi, rcx
setc cl; spill CF x207 to reg (rcx)
clc;
movzx r14, r14b
adcx r14, r11; loading flag
adcx r13, r8
mov r14, 0x0 ; moving imm to reg
adcx r9, r14
adox rbp, r14
add byte [ rsp + 0xd8 ], 0xFF; load flag from rm/8 into CF, clears other flag. NODE, if operand1 is not a byte reg, this fails.
setc [ rsp + 0xd8 ]; since that has deps, resore it whereever it was
adcx rsi, [ rsp + 0xd0 ]
movzx r10, r10b
adox r10, r11; loading flag
adox rsi, [ rsp + 0xc8 ]
mov r10, [ rsp + 0xc0 ]; x174, copying x150 here, cause x150 is needed in a reg for other than x174, namely all: , x174--x175, size: 1
adcx r10, rdi
adox r13, r10
mov r8, [ rsp + 0xb8 ]; x176, copying x152 here, cause x152 is needed in a reg for other than x176, namely all: , x176--x177, size: 1
adcx r8, rbp
adox r9, r8
setc dil; spill CF x177 to reg (rdi)
seto bpl; spill OF x204 to reg (rbp)
movzx r10, cl; x207, copying x207 here, cause x207 is needed in a reg for other than x207, namely all: , x208--x209, size: 1
add r10, -0x1
mov r10, rsi; x208, copying x199 here, cause x199 is needed in a reg for other than x208, namely all: , x208--x209, x217, size: 2
sbb r10, rdx
mov rcx, r13; x210, copying x201 here, cause x201 is needed in a reg for other than x210, namely all: , x218, x210--x211, size: 2
sbb rcx, rdx
mov r8, r9; x212, copying x203 here, cause x203 is needed in a reg for other than x212, namely all: , x212--x213, x219, size: 2
sbb r8, rdx
movzx r14, bpl; x205, copying x204 here, cause x204 is needed in a reg for other than x205, namely all: , x205, size: 1
movzx rdi, dil
lea r14, [ r14 + rdi ]
sbb r14, 0x00000000
cmovc r10, rsi; if CF, x217<- x199 (nzVar)
cmovc r8, r9; if CF, x219<- x203 (nzVar)
cmovc r15, r12; if CF, x216<- x197 (nzVar)
mov r14, [ rsp + 0x0 ]; load m64 out1 to register64
mov [ r14 + 0x0 ], r15; out1[0] = x216
cmovc rcx, r13; if CF, x218<- x201 (nzVar)
mov [ r14 + 0x10 ], rcx; out1[2] = x218
mov [ r14 + 0x8 ], r10; out1[1] = x217
mov [ r14 + 0x18 ], r8; out1[3] = x219
mov rbx, [ rsp + 0xe0 ]; restoring from stack
mov rbp, [ rsp + 0xe8 ]; restoring from stack
mov r12, [ rsp + 0xf0 ]; restoring from stack
mov r13, [ rsp + 0xf8 ]; restoring from stack
mov r14, [ rsp + 0x100 ]; restoring from stack
mov r15, [ rsp + 0x108 ]; restoring from stack
add rsp, 0x110
ret
; cpu AMD Ryzen Threadripper 1900X 8-Core Processor
; clocked at 2200 MHz
; first cyclecount 137.56, best 102.5, lastGood 105.5
; seed 1660769872531946
; CC / CFLAGS clang / -march=native -mtune=native -O3
; time needed: 1303784 ms / 60000 runs=> 21.729733333333332ms/run
; Time spent for assembling and measureing (initial batch_size=76, initial num_batches=101): 180013 ms
; Ratio (time for assembling + measure)/(total runtime for 60000runs): 0.13806964957385578
; number reverted permutation/ tried permutation: 23441 / 30160 =77.722%
; number reverted decision/ tried decision: 20654 / 29841 =69.213% | 41.969359 | 134 | 0.696157 |
59123f715cd450ab22691a4b3584aa7951b3dd98 | 5,685 | asm | Assembly | Transynther/x86/_processed/US/_zr_/i9-9900K_12_0xa0.log_21829_1004.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/US/_zr_/i9-9900K_12_0xa0.log_21829_1004.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/US/_zr_/i9-9900K_12_0xa0.log_21829_1004.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r8
push %rax
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_WC_ht+0x5032, %rsi
lea addresses_A_ht+0x11a32, %rdi
clflush (%rdi)
and %r8, %r8
mov $47, %rcx
rep movsq
nop
nop
nop
nop
nop
dec %rax
lea addresses_UC_ht+0xcb96, %rsi
lea addresses_UC_ht+0x9d32, %rdi
nop
nop
sub $19405, %rdx
mov $49, %rcx
rep movsl
nop
nop
sub %rsi, %rsi
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rax
pop %r8
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r11
push %r12
push %r13
push %rbp
push %rcx
push %rdi
// Store
mov $0x34dba80000000832, %r12
nop
xor %rdi, %rdi
movb $0x51, (%r12)
nop
nop
sub $25184, %r13
// Store
mov $0xbba, %rcx
nop
nop
nop
nop
nop
sub %r10, %r10
movl $0x51525354, (%rcx)
nop
and %rdi, %rdi
// Store
lea addresses_UC+0x1ee9a, %r12
nop
nop
nop
nop
nop
inc %r11
mov $0x5152535455565758, %r13
movq %r13, %xmm6
vmovups %ymm6, (%r12)
nop
nop
nop
nop
nop
add $51963, %r11
// Store
lea addresses_WC+0x7432, %r12
cmp $33443, %rcx
movl $0x51525354, (%r12)
nop
nop
nop
add $63222, %r12
// Store
mov $0xc32, %rdi
nop
nop
nop
nop
nop
inc %r13
mov $0x5152535455565758, %rcx
movq %rcx, %xmm2
vmovaps %ymm2, (%rdi)
nop
nop
nop
nop
nop
cmp $36730, %r13
// Faulty Load
lea addresses_US+0xc032, %rdi
clflush (%rdi)
nop
cmp %r12, %r12
movb (%rdi), %cl
lea oracles, %rbp
and $0xff, %rcx
shlq $12, %rcx
mov (%rbp,%rcx,1), %rcx
pop %rdi
pop %rcx
pop %rbp
pop %r13
pop %r12
pop %r11
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'src': {'NT': False, 'same': False, 'congruent': 0, 'type': 'addresses_US', 'AVXalign': False, 'size': 16}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 10, 'type': 'addresses_NC', 'AVXalign': False, 'size': 1}}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 3, 'type': 'addresses_P', 'AVXalign': False, 'size': 4}}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 1, 'type': 'addresses_UC', 'AVXalign': False, 'size': 32}}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 10, 'type': 'addresses_WC', 'AVXalign': True, 'size': 4}}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 7, 'type': 'addresses_P', 'AVXalign': True, 'size': 32}}
[Faulty Load]
{'src': {'NT': False, 'same': True, 'congruent': 0, 'type': 'addresses_US', 'AVXalign': False, 'size': 1}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'same': False, 'congruent': 11, 'type': 'addresses_WC_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 9, 'type': 'addresses_A_ht'}}
{'src': {'same': False, 'congruent': 1, 'type': 'addresses_UC_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 8, 'type': 'addresses_UC_ht'}}
{'00': 21829}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
| 37.649007 | 2,999 | 0.656113 |
f7aa878104892456d2ee4b9e84d45616d5e9cc23 | 405 | asm | Assembly | programs/oeis/163/A163563.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/163/A163563.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | programs/oeis/163/A163563.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | ; A163563: n occurs 1+a(n) times starting with a(1)=1.
; 1,1,2,2,3,3,3,4,4,4,5,5,5,5,6,6,6,6,7,7,7,7,8,8,8,8,8,9,9,9,9,9,10,10,10,10,10,11,11,11,11,11,11,12,12,12,12,12,12,13,13,13,13,13,13,14,14,14,14,14,14,15,15,15,15,15,15,15,16,16,16,16,16,16,16,17,17,17,17,17
pow $0,2
add $0,3
mov $2,1
lpb $0
pow $3,2
sub $0,$3
sub $0,2
mov $1,$2
sub $1,2
mov $3,$2
add $3,$2
add $2,1
lpe
add $1,2
| 22.5 | 209 | 0.57284 |
ab2977649327a09350fe45596c0e28315bb704d3 | 169 | asm | Assembly | src/exit.asm | yoshuawuyts/spec-x86 | b5c52263f944ad9b32893a44204c24e1d4c0bd32 | [
"Apache-2.0",
"MIT"
] | 2 | 2018-06-10T00:40:04.000Z | 2018-06-11T16:49:02.000Z | src/exit.asm | yoshuawuyts/spec-x86 | b5c52263f944ad9b32893a44204c24e1d4c0bd32 | [
"Apache-2.0",
"MIT"
] | null | null | null | src/exit.asm | yoshuawuyts/spec-x86 | b5c52263f944ad9b32893a44204c24e1d4c0bd32 | [
"Apache-2.0",
"MIT"
] | null | null | null | ; Program: exit
;
; Executes the exit system call
;
; No input
;
; Output: only the exit status
segment .text
global _start
_start:
mov eax,1
mov ebx,5
int 0x80
| 10.5625 | 31 | 0.686391 |
769f7043b03fb8661d921f6ccc8362b2f85d4a45 | 761 | asm | Assembly | oeis/039/A039919.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/039/A039919.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/039/A039919.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A039919: Related to enumeration of edge-rooted catafusenes.
; Submitted by Christian Krause
; 0,1,5,21,86,355,1488,6335,27352,119547,528045,2353791,10575810,47849685,217824285,996999525,4585548680,21182609875,98236853415,457211008415,2134851575050,9997848660345,46949087361550,221022160284101,1042916456739696,4931673470809525,23367060132453323,110922448129518465,527456853833738598,2512223096217561243,11983657348733851440,57245398100773968519,273826451615736077280,1311476595605798566131,6288766721427899965191,30189933217917814211535,145085725688603812710498,697957871705058684340905
mul $0,2
mov $1,1
mov $3,$0
mov $4,1
lpb $3
mul $1,$3
mul $1,$4
sub $3,2
dif $5,2
add $5,$4
div $1,$5
add $2,$1
add $4,2
add $5,1
lpe
mov $0,$2
div $0,2
| 34.590909 | 494 | 0.805519 |
b994b43c52a3d45a3e66b4e99cebd0fd4894d8f6 | 377 | asm | Assembly | programs/oeis/228/A228871.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/228/A228871.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/228/A228871.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A228871: Odd numbers producing 3 out-of-order odd numbers in the Collatz (3x+1) iteration.
; 3,227,14563,932067,59652323,3817748707,244335917283,15637498706147,1000799917193443,64051194700380387,4099276460824344803,262353693492758067427,16790636383536516315363,1074600728546337044183267,68774446626965570827729123
mov $1,64
pow $1,$0
div $1,63
mul $1,224
add $1,3
mov $0,$1
| 37.7 | 222 | 0.824934 |
30a9830f06f7cdd5e5b6ed2832dd50805c2879f9 | 1,052 | asm | Assembly | scripts/SSAnneKitchen.asm | opiter09/ASM-Machina | 75d8e457b3e82cc7a99b8e70ada643ab02863ada | [
"CC0-1.0"
] | 1 | 2022-02-15T00:19:44.000Z | 2022-02-15T00:19:44.000Z | scripts/SSAnneKitchen.asm | opiter09/ASM-Machina | 75d8e457b3e82cc7a99b8e70ada643ab02863ada | [
"CC0-1.0"
] | null | null | null | scripts/SSAnneKitchen.asm | opiter09/ASM-Machina | 75d8e457b3e82cc7a99b8e70ada643ab02863ada | [
"CC0-1.0"
] | null | null | null | SSAnneKitchen_Script:
call EnableAutoTextBoxDrawing
ret
SSAnneKitchen_TextPointers:
dw SSAnne6Text1
dw SSAnne6Text2
dw SSAnne6Text3
dw SSAnne6Text4
dw SSAnne6Text5
dw SSAnne6Text6
dw SSAnne6Text7
SSAnne6Text1:
text_far _SSAnne6Text1
text_end
SSAnne6Text2:
text_far _SSAnne6Text2
text_end
SSAnne6Text3:
text_far _SSAnne6Text3
text_end
SSAnne6Text4:
text_far _SSAnne6Text4
text_end
SSAnne6Text5:
text_far _SSAnne6Text5
text_end
SSAnne6Text6:
text_far _SSAnne6Text6
text_end
SSAnne6Text7:
text_asm
ld hl, SSAnne6Text_61807
call PrintText
ldh a, [hRandomAdd]
bit 7, a
jr z, .not_dialog_1
ld hl, SSAnne6Text_6180c
jr .done
.not_dialog_1
bit 4, a
jr z, .not_dialog_2
ld hl, SSAnne6Text_61811
jr .done
.not_dialog_2
ld hl, SSAnne6Text_61816
.done
call PrintText
jp TextScriptEnd
SSAnne6Text_61807:
text_far _SSAnne6Text_61807
text_end
SSAnne6Text_6180c:
text_far _SSAnne6Text_6180c
text_end
SSAnne6Text_61811:
text_far _SSAnne6Text_61811
text_end
SSAnne6Text_61816:
text_far _SSAnne6Text_61816
text_end
| 14.410959 | 30 | 0.821293 |
c6fe924e9bb68aa5a13583ff2aef1dd35d296767 | 7,323 | asm | Assembly | P6/data_P6_2/cal_R_test7.asm | alxzzhou/BUAA_CO_2020 | b54bf367081a5a11701ebc3fc78a23494aecca9e | [
"Apache-2.0"
] | 1 | 2022-01-23T09:24:47.000Z | 2022-01-23T09:24:47.000Z | P6/data_P6_2/cal_R_test7.asm | alxzzhou/BUAA_CO_2020 | b54bf367081a5a11701ebc3fc78a23494aecca9e | [
"Apache-2.0"
] | null | null | null | P6/data_P6_2/cal_R_test7.asm | alxzzhou/BUAA_CO_2020 | b54bf367081a5a11701ebc3fc78a23494aecca9e | [
"Apache-2.0"
] | null | null | null | lui $1,25507
ori $1,$1,60629
lui $2,54447
ori $2,$2,30405
lui $3,9801
ori $3,$3,35127
lui $4,20902
ori $4,$4,17453
lui $5,55959
ori $5,$5,49056
lui $6,4729
ori $6,$6,5615
mthi $1
mtlo $2
sec0:
nop
nop
nop
nor $2,$6,$2
sec1:
nop
nop
and $6,$5,$3
nor $1,$6,$2
sec2:
nop
nop
addiu $6,$1,4346
nor $5,$6,$2
sec3:
nop
nop
mflo $6
nor $4,$6,$2
sec4:
nop
nop
lbu $6,16($0)
nor $2,$6,$2
sec5:
nop
addu $6,$3,$1
nop
nor $3,$6,$2
sec6:
nop
subu $6,$3,$4
or $6,$0,$2
nor $5,$6,$2
sec7:
nop
subu $6,$5,$4
slti $6,$2,25267
nor $0,$6,$2
sec8:
nop
and $6,$3,$2
mflo $6
nor $3,$6,$2
sec9:
nop
slt $6,$3,$1
lbu $6,12($0)
nor $2,$6,$2
sec10:
nop
sltiu $6,$5,-32044
nop
nor $3,$6,$2
sec11:
nop
xori $6,$2,5349
nor $6,$2,$3
nor $3,$6,$2
sec12:
nop
slti $6,$2,-18508
lui $6,65339
nor $6,$6,$2
sec13:
nop
xori $6,$3,16154
mflo $6
nor $1,$6,$2
sec14:
nop
xori $6,$1,36280
lw $6,16($0)
nor $3,$6,$2
sec15:
nop
mfhi $6
nop
nor $4,$6,$2
sec16:
nop
mfhi $6
nor $6,$5,$2
nor $4,$6,$2
sec17:
nop
mfhi $6
sltiu $6,$4,1209
nor $1,$6,$2
sec18:
nop
mfhi $6
mfhi $6
nor $3,$6,$2
sec19:
nop
mfhi $6
lbu $6,16($0)
nor $2,$6,$2
sec20:
nop
lbu $6,1($0)
nop
nor $3,$6,$2
sec21:
nop
lhu $6,10($0)
slt $6,$4,$1
nor $0,$6,$2
sec22:
nop
lbu $6,11($0)
slti $6,$4,-31404
nor $1,$6,$2
sec23:
nop
lh $6,12($0)
mflo $6
nor $2,$6,$2
sec24:
nop
lbu $6,5($0)
lbu $6,9($0)
nor $0,$6,$2
sec25:
xor $6,$2,$0
nop
nop
nor $1,$6,$2
sec26:
xor $6,$5,$4
nop
or $6,$6,$1
nor $1,$6,$2
sec27:
or $6,$3,$4
nop
andi $6,$3,61700
nor $5,$6,$2
sec28:
slt $6,$5,$3
nop
mflo $6
nor $2,$6,$2
sec29:
subu $6,$1,$5
nop
lhu $6,2($0)
nor $3,$6,$2
sec30:
subu $6,$0,$2
and $6,$5,$0
nop
nor $3,$6,$2
sec31:
sltu $6,$2,$4
sltu $6,$5,$2
or $6,$5,$2
nor $3,$6,$2
sec32:
subu $6,$3,$3
or $6,$3,$2
lui $6,54166
nor $1,$6,$2
sec33:
sltu $6,$1,$6
slt $6,$5,$3
mfhi $6
nor $3,$6,$2
sec34:
or $6,$2,$4
subu $6,$3,$4
lbu $6,15($0)
nor $3,$6,$2
sec35:
sltu $6,$4,$0
andi $6,$6,47586
nop
nor $2,$6,$2
sec36:
sltu $6,$3,$1
andi $6,$1,30358
subu $6,$2,$4
nor $4,$6,$2
sec37:
xor $6,$5,$0
slti $6,$4,27289
andi $6,$3,9730
nor $3,$6,$2
sec38:
and $6,$2,$1
addiu $6,$1,14069
mflo $6
nor $5,$6,$2
sec39:
addu $6,$2,$5
lui $6,23414
lw $6,0($0)
nor $2,$6,$2
sec40:
nor $6,$2,$3
mfhi $6
nop
nor $4,$6,$2
sec41:
sltu $6,$4,$5
mfhi $6
sltu $6,$4,$3
nor $4,$6,$2
sec42:
slt $6,$5,$5
mfhi $6
ori $6,$5,8709
nor $3,$6,$2
sec43:
or $6,$1,$4
mflo $6
mflo $6
nor $3,$6,$2
sec44:
or $6,$6,$1
mfhi $6
lh $6,4($0)
nor $3,$6,$2
sec45:
xor $6,$5,$5
lbu $6,9($0)
nop
nor $4,$6,$2
sec46:
xor $6,$0,$1
lw $6,8($0)
xor $6,$3,$3
nor $3,$6,$2
sec47:
xor $6,$2,$1
lw $6,8($0)
sltiu $6,$2,17910
nor $5,$6,$2
sec48:
xor $6,$1,$4
lb $6,4($0)
mflo $6
nor $3,$6,$2
sec49:
or $6,$2,$1
lhu $6,2($0)
lh $6,0($0)
nor $2,$6,$2
sec50:
addiu $6,$1,-3063
nop
nop
nor $5,$6,$2
sec51:
xori $6,$4,13961
nop
subu $6,$4,$4
nor $0,$6,$2
sec52:
addiu $6,$3,-6577
nop
xori $6,$6,55499
nor $3,$6,$2
sec53:
sltiu $6,$2,15481
nop
mfhi $6
nor $3,$6,$2
sec54:
addiu $6,$2,-5923
nop
lhu $6,14($0)
nor $3,$6,$2
sec55:
addiu $6,$4,9741
subu $6,$2,$5
nop
nor $2,$6,$2
sec56:
andi $6,$3,37437
sltu $6,$2,$2
xor $6,$4,$3
nor $3,$6,$2
sec57:
sltiu $6,$3,31940
and $6,$4,$2
addiu $6,$2,10915
nor $3,$6,$2
sec58:
xori $6,$2,30676
sltu $6,$6,$4
mflo $6
nor $3,$6,$2
sec59:
andi $6,$6,45098
or $6,$1,$3
lhu $6,4($0)
nor $5,$6,$2
sec60:
xori $6,$2,53931
slti $6,$5,18643
nop
nor $2,$6,$2
sec61:
andi $6,$3,37906
ori $6,$2,21574
or $6,$2,$2
nor $1,$6,$2
sec62:
ori $6,$3,36699
addiu $6,$4,10537
slti $6,$4,4292
nor $0,$6,$2
sec63:
andi $6,$4,38859
addiu $6,$5,-4359
mflo $6
nor $4,$6,$2
sec64:
andi $6,$3,59461
andi $6,$3,23804
lw $6,12($0)
nor $4,$6,$2
sec65:
ori $6,$1,38249
mfhi $6
nop
nor $4,$6,$2
sec66:
andi $6,$4,59399
mflo $6
xor $6,$4,$2
nor $4,$6,$2
sec67:
addiu $6,$5,-13289
mflo $6
sltiu $6,$3,-13811
nor $0,$6,$2
sec68:
andi $6,$2,47213
mfhi $6
mfhi $6
nor $5,$6,$2
sec69:
andi $6,$4,11909
mfhi $6
lbu $6,14($0)
nor $6,$6,$2
sec70:
andi $6,$2,24960
lw $6,4($0)
nop
nor $1,$6,$2
sec71:
lui $6,14855
lh $6,2($0)
addu $6,$5,$3
nor $1,$6,$2
sec72:
xori $6,$3,63494
lh $6,0($0)
ori $6,$4,45756
nor $3,$6,$2
sec73:
andi $6,$4,32462
lh $6,16($0)
mflo $6
nor $1,$6,$2
sec74:
ori $6,$1,57300
lbu $6,7($0)
lh $6,10($0)
nor $2,$6,$2
sec75:
mflo $6
nop
nop
nor $3,$6,$2
sec76:
mfhi $6
nop
and $6,$2,$2
nor $4,$6,$2
sec77:
mfhi $6
nop
slti $6,$1,-24940
nor $3,$6,$2
sec78:
mflo $6
nop
mflo $6
nor $5,$6,$2
sec79:
mflo $6
nop
lb $6,3($0)
nor $1,$6,$2
sec80:
mflo $6
nor $6,$1,$1
nop
nor $2,$6,$2
sec81:
mflo $6
or $6,$6,$5
slt $6,$0,$2
nor $4,$6,$2
sec82:
mfhi $6
or $6,$6,$5
ori $6,$4,46791
nor $3,$6,$2
sec83:
mflo $6
sltu $6,$4,$5
mflo $6
nor $1,$6,$2
sec84:
mflo $6
sltu $6,$4,$1
lhu $6,10($0)
nor $4,$6,$2
sec85:
mflo $6
slti $6,$3,-32074
nop
nor $1,$6,$2
sec86:
mflo $6
ori $6,$4,24245
or $6,$4,$1
nor $2,$6,$2
sec87:
mfhi $6
slti $6,$1,12894
addiu $6,$3,29529
nor $2,$6,$2
sec88:
mflo $6
xori $6,$1,22508
mfhi $6
nor $4,$6,$2
sec89:
mflo $6
lui $6,53984
lhu $6,14($0)
nor $1,$6,$2
sec90:
mflo $6
mfhi $6
nop
nor $0,$6,$2
sec91:
mflo $6
mfhi $6
or $6,$3,$3
nor $6,$6,$2
sec92:
mfhi $6
mfhi $6
addiu $6,$1,-19713
nor $1,$6,$2
sec93:
mflo $6
mfhi $6
mfhi $6
nor $1,$6,$2
sec94:
mflo $6
mflo $6
lhu $6,6($0)
nor $5,$6,$2
sec95:
mfhi $6
lw $6,4($0)
nop
nor $0,$6,$2
sec96:
mflo $6
lbu $6,14($0)
xor $6,$3,$5
nor $1,$6,$2
sec97:
mflo $6
lb $6,15($0)
sltiu $6,$3,-8620
nor $2,$6,$2
sec98:
mfhi $6
lh $6,6($0)
mflo $6
nor $1,$6,$2
sec99:
mfhi $6
lb $6,5($0)
lb $6,8($0)
nor $4,$6,$2
sec100:
lw $6,0($0)
nop
nop
nor $0,$6,$2
sec101:
lh $6,4($0)
nop
xor $6,$2,$3
nor $2,$6,$2
sec102:
lbu $6,9($0)
nop
sltiu $6,$2,-14054
nor $3,$6,$2
sec103:
lbu $6,2($0)
nop
mflo $6
nor $3,$6,$2
sec104:
lb $6,10($0)
nop
lhu $6,4($0)
nor $6,$6,$2
sec105:
lw $6,0($0)
xor $6,$4,$5
nop
nor $1,$6,$2
sec106:
lbu $6,15($0)
slt $6,$3,$2
sltu $6,$0,$4
nor $3,$6,$2
sec107:
lh $6,16($0)
sltu $6,$4,$3
addiu $6,$3,-17874
nor $3,$6,$2
sec108:
lw $6,4($0)
sltu $6,$3,$6
mfhi $6
nor $1,$6,$2
sec109:
lh $6,12($0)
or $6,$6,$3
lhu $6,6($0)
nor $6,$6,$2
sec110:
lh $6,4($0)
slti $6,$5,-18402
nop
nor $1,$6,$2
sec111:
lhu $6,14($0)
ori $6,$0,19046
or $6,$3,$3
nor $5,$6,$2
sec112:
lh $6,0($0)
addiu $6,$4,11837
xori $6,$2,24359
nor $2,$6,$2
sec113:
lh $6,6($0)
xori $6,$2,41686
mflo $6
nor $3,$6,$2
sec114:
lb $6,5($0)
xori $6,$3,51780
lw $6,16($0)
nor $3,$6,$2
sec115:
lh $6,10($0)
mfhi $6
nop
nor $3,$6,$2
sec116:
lh $6,10($0)
mflo $6
subu $6,$1,$2
nor $4,$6,$2
sec117:
lw $6,0($0)
mfhi $6
ori $6,$3,50497
nor $0,$6,$2
sec118:
lh $6,12($0)
mflo $6
mflo $6
nor $3,$6,$2
sec119:
lhu $6,8($0)
mfhi $6
lbu $6,9($0)
nor $0,$6,$2
sec120:
lbu $6,6($0)
lb $6,16($0)
nop
nor $5,$6,$2
sec121:
lb $6,12($0)
lh $6,2($0)
slt $6,$1,$3
nor $5,$6,$2
sec122:
lb $6,11($0)
lbu $6,15($0)
xori $6,$1,20433
nor $2,$6,$2
sec123:
lw $6,0($0)
lbu $6,0($0)
mfhi $6
nor $2,$6,$2
sec124:
lw $6,12($0)
lhu $6,12($0)
lh $6,14($0)
nor $5,$6,$2
| 11.442188 | 19 | 0.522463 |
85188f30c33f71db2102bf5112992cd94ef5037c | 1,486 | asm | Assembly | programs/oeis/027/A027783.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/027/A027783.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/027/A027783.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A027783: a(n) = 5*(n+1)*binomial(n+2,10).
; 45,550,3630,17160,65065,210210,600600,1555840,3719430,8314020,17551820,35271600,67897830,125847260,225544440,392251200,663966875,1096717050,1771619850,2804201400,4356527175,6652824750,9999397200,14809766400,21636143100,31208497320,44482699800,62699424480,87455744860,120791625240,165293802960,224219881600,301645809465,402640304430,533470207270,701841202920,917178844725,1190955352730,1537068235560,1972277408640,2516708151650,3194427967500,4034106176100,5069765901200,6341638990050,7897135346100,9791939157000,12091245566400,14871152471175,18220223328450,22241238131970,27053151067800,32793274787955,39619712750310,47714062667040,57284415784960,68568678492600,81838244613840,97402048709680,115611032771520,136863060854520,161608318471600,190355235950880,223676977455360,262218539976965,306704509351350,357947523198750,416857493683400,484451646103425,561865432578450,650364383497400,751356962928000,866408497876350,997256255123700,1145825743362300,1314248322507120,1504880206379550,1720322949447180,1963445512964760,2237408010699840,2545687239446835,2892104104739850,3280853057572090,3716533663522680,4204184431484895,4749319035187870,5357965066911600,6036705469217280,6792722797156660,7633846470290040,8568603180937800,9606270632420000,10756934788607700,12031550823923400,13442007970991600,15001198471459200,16723090844084625,18622807693039550,20716708288483350,23022476160863400
mov $1,$0
add $0,10
bin $0,$1
add $1,9
mul $0,$1
mul $0,5
| 148.6 | 1,382 | 0.899058 |
b61f983ae87a0f2924c288d2027eff774f15e8c8 | 757 | asm | Assembly | oeis/237/A237342.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/237/A237342.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/237/A237342.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A237342: For k in {2,3,...,9} define a sequence as follows: a(0)=0; for n>=0, a(n+1)=a(n)+1, unless a(n) ends in k, in which case a(n+1) is obtained by replacing the last digit of a(n) with the digit(s) of k^2. This is k(5).
; Submitted by Jon Maiga
; 0,1,2,3,4,5,25,225,2225,22225,222225,2222225,22222225,222222225,2222222225,22222222225,222222222225,2222222222225,22222222222225,222222222222225,2222222222222225,22222222222222225,222222222222222225,2222222222222222225
mov $2,$0
mov $5,$0
lpb $2
mov $0,$5
sub $2,1
sub $0,$2
add $9,$0
sub $0,5
mov $4,10
pow $4,$0
mul $9,2
lpb $9
mov $7,$4
cmp $7,0
add $4,$7
mov $6,$4
mod $9,2
lpe
mov $8,$4
lpb $6
mod $6,8
add $8,$4
lpe
add $3,$8
lpe
mov $0,$3
| 24.419355 | 226 | 0.635403 |
940d4409bf8dd5f330baa6ceb6b388a23c7fe716 | 663 | asm | Assembly | oeis/170/A170765.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/170/A170765.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/170/A170765.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A170765: Expansion of g.f.: (1+x)/(1-45*x).
; Submitted by Jon Maiga
; 1,46,2070,93150,4191750,188628750,8488293750,381973218750,17188794843750,773495767968750,34807309558593750,1566328930136718750,70484801856152343750,3171816083526855468750,142731723758708496093750,6422927569141882324218750,289031740611384704589843750,13006428327512311706542968750,585289274738054026794433593750,26338017363212431205749511718750,1185210781344559404258728027343750,53334485160505173191642761230468750,2400051832222732793623924255371093750,108002332450022975713076591491699218750
add $0,1
mov $3,1
lpb $0
sub $0,1
add $2,$3
div $3,$2
mul $2,45
lpe
mov $0,$2
div $0,45
| 44.2 | 494 | 0.84917 |
ce892a8637fb1e0e08ea49eb4b7143754c33f9a2 | 296 | asm | Assembly | data/items/pocket_names.asm | AtmaBuster/pokeplat-gen2 | fa83b2e75575949b8f72cb2c48f7a1042e97f70f | [
"blessing"
] | 6 | 2021-06-19T06:41:19.000Z | 2022-02-15T17:12:33.000Z | data/items/pocket_names.asm | AtmaBuster/pokeplat-gen2-old | 01e42c55db5408d72d89133dc84a46c699d849ad | [
"blessing"
] | null | null | null | data/items/pocket_names.asm | AtmaBuster/pokeplat-gen2-old | 01e42c55db5408d72d89133dc84a46c699d849ad | [
"blessing"
] | 3 | 2021-01-15T18:45:40.000Z | 2021-10-16T03:35:27.000Z | ItemPocketNames:
; entries correspond to item type constants
dw .Item
dw .Key
dw .Ball
dw .TM
dw .Berry
dw .Medicine
.Item: db "ITEM POCKET@"
.Key: db "KEY POCKET@"
.Ball: db "BALL POCKET@"
.TM: db "TM POCKET@"
.Berry: db "BERRY POCKET@"
.Medicine: db "MEDS POCKET@"
| 18.5 | 43 | 0.625 |
e43ccba6e68d14712bbc313e836bafa87d961cd1 | 430 | asm | Assembly | programs/oeis/207/A207451.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/207/A207451.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | programs/oeis/207/A207451.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | ; A207451: Number of n X 6 0..1 arrays avoiding 0 0 0 and 0 0 1 horizontally and 0 0 1 and 1 0 1 vertically.
; 26,676,3354,10088,23530,46956,84266,139984,219258,327860,472186,659256,896714,1192828,1556490,1997216,2525146,3151044,3886298,4742920,5733546,6871436,8170474,9645168,11310650,13182676,15277626,17612504,20204938
mov $2,$0
add $2,1
pow $2,2
mov $3,5
add $3,$0
mul $3,$0
mul $3,$2
add $0,$3
mov $1,$0
mul $1,26
add $1,26
| 28.666667 | 212 | 0.734884 |
330543bd45100d67b19c9dc21dad15fce40fd2c1 | 214 | asm | Assembly | libsrc/_DEVELOPMENT/adt/p_list/c/sdcc_iy/p_list_pop_front_fastcall.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 640 | 2017-01-14T23:33:45.000Z | 2022-03-30T11:28:42.000Z | libsrc/_DEVELOPMENT/adt/p_list/c/sdcc_iy/p_list_pop_front_fastcall.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 1,600 | 2017-01-15T16:12:02.000Z | 2022-03-31T12:11:12.000Z | libsrc/_DEVELOPMENT/adt/p_list/c/sdcc_iy/p_list_pop_front_fastcall.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 215 | 2017-01-17T10:43:03.000Z | 2022-03-23T17:25:02.000Z |
; void *p_list_pop_front_fastcall(p_list_t *list)
SECTION code_clib
SECTION code_adt_p_list
PUBLIC _p_list_pop_front_fastcall
EXTERN asm_p_list_pop_front
defc _p_list_pop_front_fastcall = asm_p_list_pop_front
| 17.833333 | 54 | 0.873832 |
7a0db31c0f4e0977e683cfba64d1aa0381fdf567 | 576 | asm | Assembly | programs/oeis/158/A158622.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/158/A158622.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/158/A158622.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A158622: Numerator of the reduced fraction A158620(n)/A158621(n).
; 7,13,7,31,43,19,73,91,37,133,157,61,211,241,91,307,343,127,421,463,169,553,601,217,703,757,271,871,931,331,1057,1123,397,1261,1333,469,1483,1561,547,1723,1807,631,1981,2071,721,2257,2353,817,2551,2653,919,2863,2971,1027,3193,3307,1141,3541,3661,1261,3907,4033,1387,4291,4423,1519,4693,4831,1657,5113,5257,1801,5551,5701,1951,6007,6163,2107,6481,6643,2269,6973,7141,2437,7483,7657,2611,8011,8191,2791,8557,8743,2977,9121,9313,3169,9703,9901,3367,10303
mul $0,2
add $0,5
pow $0,2
add $0,3
dif $0,3
div $0,4
| 57.6 | 452 | 0.751736 |
33bc048d3eada72b0297ca7becbf8429aae301b7 | 394 | asm | Assembly | data/mapObjects/pokemontower2.asm | adhi-thirumala/EvoYellow | 6fb1b1d6a1fa84b02e2d982f270887f6c63cdf4c | [
"Unlicense"
] | 16 | 2018-08-28T21:47:01.000Z | 2022-02-20T20:29:59.000Z | data/mapObjects/pokemontower2.asm | adhi-thirumala/EvoYellow | 6fb1b1d6a1fa84b02e2d982f270887f6c63cdf4c | [
"Unlicense"
] | 5 | 2019-04-03T19:53:11.000Z | 2022-03-11T22:49:34.000Z | data/mapObjects/pokemontower2.asm | adhi-thirumala/EvoYellow | 6fb1b1d6a1fa84b02e2d982f270887f6c63cdf4c | [
"Unlicense"
] | 2 | 2019-12-09T19:46:02.000Z | 2020-12-05T21:36:30.000Z | PokemonTower2Object:
db $1 ; border block
db $2 ; warps
db $9, $3, $0, POKEMONTOWER_3
db $9, $12, $2, POKEMONTOWER_1
db $0 ; signs
db $2 ; objects
object SPRITE_BLUE, $e, $5, STAY, NONE, $1 ; person
object SPRITE_MEDIUM, $3, $7, STAY, RIGHT, $2 ; person
; warp-to
EVENT_DISP POKEMONTOWER_2_WIDTH, $9, $3 ; POKEMONTOWER_3
EVENT_DISP POKEMONTOWER_2_WIDTH, $9, $12 ; POKEMONTOWER_1
| 23.176471 | 58 | 0.680203 |
181961698791b4125ba6ba0c0675354dc7351cc9 | 471 | asm | Assembly | oeis/051/A051452.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/051/A051452.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/051/A051452.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A051452: a(n) = 1 + lcm(1..k) where k is the n-th prime power A000961(n).
; Submitted by Jon Maiga
; 2,3,7,13,61,421,841,2521,27721,360361,720721,12252241,232792561,5354228881,26771144401,80313433201,2329089562801,72201776446801,144403552893601,5342931457063201,219060189739591201
seq $0,961 ; Powers of primes. Alternatively, 1 and the prime powers (p^k, p prime, k >= 1).
seq $0,3418 ; Least common multiple (or LCM) of {1, 2, ..., n} for n >= 1, a(0) = 1.
add $0,1
| 58.875 | 181 | 0.715499 |
35d3628d2e7c0e7bf8e9def0af75001498113356 | 35 | asm | Assembly | src/main/fragment/mos6502-common/pbuc1_derefidx_(_deref_pbuz1)=_inc_pbuc1_derefidx_(_deref_pbuz1).asm | jbrandwood/kickc | d4b68806f84f8650d51b0e3ef254e40f38b0ffad | [
"MIT"
] | 2 | 2022-03-01T02:21:14.000Z | 2022-03-01T04:33:35.000Z | src/main/fragment/mos6502-common/pbuc1_derefidx_(_deref_pbuz1)=_inc_pbuc1_derefidx_(_deref_pbuz1).asm | jbrandwood/kickc | d4b68806f84f8650d51b0e3ef254e40f38b0ffad | [
"MIT"
] | null | null | null | src/main/fragment/mos6502-common/pbuc1_derefidx_(_deref_pbuz1)=_inc_pbuc1_derefidx_(_deref_pbuz1).asm | jbrandwood/kickc | d4b68806f84f8650d51b0e3ef254e40f38b0ffad | [
"MIT"
] | null | null | null | ldy #0
lda ({z1}),y
tax
inc {c1},x
| 7 | 12 | 0.542857 |
fc58de6f3384dfb879146d86bd5f676e59ccc6db | 632 | asm | Assembly | programs/oeis/161/A161124.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/161/A161124.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/161/A161124.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A161124: Number of inversions in all fixed-point-free involutions of {1,2,...,2n}.
; 0,1,12,135,1680,23625,374220,6621615,129729600,2791213425,65472907500,1663666579575,45537716624400,1336089255125625,41837777148667500,1392813754566609375,49126088694402720000,1830138702650463830625,71812362934450726087500,2960486826282278852934375,127932394709151108326250000,5782864071840402974117315625,272909222365402418814806287500,13422735616546290454310875359375,686919279038074055158986801000000,36522400903717045033409671494140625
mul $0,2
mov $1,1
mov $2,$0
lpb $0
mul $2,$0
sub $3,$1
add $0,$3
dif $3,2
lpe
mov $0,$2
div $0,4
| 42.133333 | 440 | 0.832278 |
4811b6264f4d273eca08af4d1192b754c28e4fe6 | 1,430 | asm | Assembly | programs/oeis/027/A027693.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/027/A027693.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/027/A027693.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A027693: a(n) = n^2 + n + 8.
; 8,10,14,20,28,38,50,64,80,98,118,140,164,190,218,248,280,314,350,388,428,470,514,560,608,658,710,764,820,878,938,1000,1064,1130,1198,1268,1340,1414,1490,1568,1648,1730,1814,1900,1988,2078,2170,2264,2360,2458,2558,2660,2764,2870,2978,3088,3200,3314,3430,3548,3668,3790,3914,4040,4168,4298,4430,4564,4700,4838,4978,5120,5264,5410,5558,5708,5860,6014,6170,6328,6488,6650,6814,6980,7148,7318,7490,7664,7840,8018,8198,8380,8564,8750,8938,9128,9320,9514,9710,9908,10108,10310,10514,10720,10928,11138,11350,11564,11780,11998,12218,12440,12664,12890,13118,13348,13580,13814,14050,14288,14528,14770,15014,15260,15508,15758,16010,16264,16520,16778,17038,17300,17564,17830,18098,18368,18640,18914,19190,19468,19748,20030,20314,20600,20888,21178,21470,21764,22060,22358,22658,22960,23264,23570,23878,24188,24500,24814,25130,25448,25768,26090,26414,26740,27068,27398,27730,28064,28400,28738,29078,29420,29764,30110,30458,30808,31160,31514,31870,32228,32588,32950,33314,33680,34048,34418,34790,35164,35540,35918,36298,36680,37064,37450,37838,38228,38620,39014,39410,39808,40208,40610,41014,41420,41828,42238,42650,43064,43480,43898,44318,44740,45164,45590,46018,46448,46880,47314,47750,48188,48628,49070,49514,49960,50408,50858,51310,51764,52220,52678,53138,53600,54064,54530,54998,55468,55940,56414,56890,57368,57848,58330,58814,59300,59788,60278,60770,61264,61760,62258
mov $1,$0
pow $1,2
add $1,$0
add $1,8
| 178.75 | 1,359 | 0.797902 |
3f38ea65ef8a1d2e7971a2a14ae4ed564141550c | 17,453 | asm | Assembly | src/shields.asm | howprice/specnext-invaders | f356f2f0f86203a40cf0ae42a9cb6bbff87e8b89 | [
"MIT"
] | 17 | 2021-01-03T17:10:18.000Z | 2022-01-05T06:01:46.000Z | src/shields.asm | howprice/specnext-invaders | f356f2f0f86203a40cf0ae42a9cb6bbff87e8b89 | [
"MIT"
] | null | null | null | src/shields.asm | howprice/specnext-invaders | f356f2f0f86203a40cf0ae42a9cb6bbff87e8b89 | [
"MIT"
] | null | null | null |
SHIELD_IMAGE_WIDTH_PIXELS EQU 22
SHIELD_IMAGE_WIDTH_BYTES EQU 3
ASSERT (SHIELD_IMAGE_WIDTH_PIXELS + 7) / 8 == SHIELD_IMAGE_WIDTH_BYTES ; pixes should round up to bytes
SHIELD_IMAGE_HEIGHT_PIXELS EQU 16
SHIELD_IMAGE_SIZE_BYTES EQU SHIELD_IMAGE_WIDTH_BYTES*SHIELD_IMAGE_HEIGHT_PIXELS
; 22 pixels wide x 16 pixels high
; n.b. image is not symmetrical!
shieldImage
DB %01111111, %11111111, %11111000
DB %11111111, %11111111, %11111100
DB %11101010, %10101010, %01011100
DB %11011111, %11111111, %11101100
DB %11011111, %11111111, %11101100
DB %11011111, %11111111, %11101100
DB %11011111, %11111111, %11101100
DB %11011111, %11111111, %11101100
DB %11011111, %11111111, %11101100
DB %11011111, %11111111, %11101100
DB %11010111, %11111111, %11101100
DB %11010111, %11111111, %10101100
DB %11010111, %11111111, %10101100
DB %11010111, %11111111, %10101100
DB %11010111, %11111111, %10101100
DB %01111111, %11111111, %11111000
ASSERT $-shieldImage == SHIELD_IMAGE_SIZE_BYTES
SHIELD_COUNT EQU 4
SHIELD0_X_ULA_SPACE EQU 32 ; ULA x coord of left most shield
SHIELD_SPACING_X EQU 52 ; from left hand side to left hand side
SHIELD1_X_ULA_SPACE EQU SHIELD0_X_ULA_SPACE + SHIELD_SPACING_X
SHIELD2_X_ULA_SPACE EQU SHIELD1_X_ULA_SPACE + SHIELD_SPACING_X
SHIELD3_X_ULA_SPACE EQU SHIELD2_X_ULA_SPACE + SHIELD_SPACING_X
SHIELD0_X_SCREEN_SPACE EQU 32 + SHIELD0_X_ULA_SPACE ; screen-space x coord of left-most shield
SHIELD1_X_SCREEN_SPACE EQU 32 + SHIELD1_X_ULA_SPACE
SHIELD2_X_SCREEN_SPACE EQU 32 + SHIELD2_X_ULA_SPACE
SHIELD3_X_SCREEN_SPACE EQU 32 + SHIELD3_X_ULA_SPACE ; screen-space x coord of right-most shield
SHIELD_Y_ULA_SPACE EQU 160 ; all shields are at the same height
SHIELD_Y_SCREEN_SPACE EQU 32 + SHIELD_Y_ULA_SPACE
; Shield hitboxes in sprite screen space (ULA space with extra 32 pixel border around it)
shieldHitboxes Hitbox { SHIELD0_X_SCREEN_SPACE, SHIELD0_X_SCREEN_SPACE + SHIELD_IMAGE_WIDTH_PIXELS - 1, ; x0, x1 (left shield)
SHIELD_Y_SCREEN_SPACE, SHIELD_Y_SCREEN_SPACE + SHIELD_IMAGE_HEIGHT_PIXELS - 1 } ; y0, y1 ; y0, y1
Hitbox { SHIELD1_X_SCREEN_SPACE, SHIELD1_X_SCREEN_SPACE + SHIELD_IMAGE_WIDTH_PIXELS - 1,
SHIELD_Y_SCREEN_SPACE, SHIELD_Y_SCREEN_SPACE + SHIELD_IMAGE_HEIGHT_PIXELS - 1 }
Hitbox { SHIELD2_X_SCREEN_SPACE, SHIELD2_X_SCREEN_SPACE + SHIELD_IMAGE_WIDTH_PIXELS - 1,
SHIELD_Y_SCREEN_SPACE, SHIELD_Y_SCREEN_SPACE + SHIELD_IMAGE_HEIGHT_PIXELS - 1 }
Hitbox { SHIELD3_X_SCREEN_SPACE, SHIELD3_X_SCREEN_SPACE + SHIELD_IMAGE_WIDTH_PIXELS - 1, ; right shield
SHIELD_Y_SCREEN_SPACE, SHIELD_Y_SCREEN_SPACE + SHIELD_IMAGE_HEIGHT_PIXELS - 1 }
ASSERT $-shieldHitboxes == (SHIELD_COUNT * Hitbox)
; colour vertical strip of the ULA screen
SHIELD_Y0_ULA_ATTRIBUTE_SPACE EQU SHIELD_Y_ULA_SPACE / 8 ; 8 pixels per byte
SHIELD_Y1_ULA_ATTRIBUTE_SPACE EQU (SHIELD_Y_ULA_SPACE + SHIELD_IMAGE_HEIGHT_PIXELS - 1) / 8 ; 8 pixels per byte
SHIELD_HEIGHT_ATTRIBUTE_SPACE EQU SHIELD_Y1_ULA_ATTRIBUTE_SPACE - SHIELD_Y0_ULA_ATTRIBUTE_SPACE + 1
SHIELD_ATTRIBUTES_START_ADDRESS EQU ULA_ATTRIBUTES_ADDRESS + (SHIELD_Y0_ULA_ATTRIBUTE_SPACE * ULA_ATTRIBUTES_WIDTH_BYTES)
SHIELD_ATTRIBUTES_SIZE_BYTES EQU ULA_ATTRIBUTES_WIDTH_BYTES * SHIELD_HEIGHT_ATTRIBUTE_SPACE
; In a one player game the shield pixel state is stored directly on screen in the ULA
; bitmap data. In a two player game the shield pixel state needs to be stored per-player.
; While a player is playing the state is in the ULA. When the game switches player the ULA
; data is copied into the outgoing player's off screen buffer, and the incoming player's
; off-screen buffer is copied back into the ULA memory
player1ShieldBitmaps DS SHIELD_IMAGE_SIZE_BYTES * SHIELD_COUNT
player2ShieldBitmaps DS SHIELD_IMAGE_SIZE_BYTES * SHIELD_COUNT
;----------------------------------------------------------------------------------------
;
; Draws all four shields to the ULA screen
; Modifies: AF, BC, DE, HL, IX, IY
;
RestoreFullShields:
; TODO: Could put this in a loop to save few bytes
ld hl,shieldImage
ld a,SHIELD0_X_ULA_SPACE
call drawShieldBitmap
ld hl,shieldImage
ld a,SHIELD1_X_ULA_SPACE
call drawShieldBitmap
ld hl,shieldImage
ld a,SHIELD2_X_ULA_SPACE
call drawShieldBitmap
ld hl,shieldImage
ld a,SHIELD3_X_ULA_SPACE
call drawShieldBitmap
; set attribute cell values for the vertical strip of the screen containing the shields
ld a,ATTR_PAPER_BLACK|ATTR_INK_WHITE ; n.b. not bright
ld hl,SHIELD_ATTRIBUTES_START_ADDRESS
ld de,SHIELD_ATTRIBUTES_START_ADDRESS+1
ld (hl),a ; set first attribute
ld bc,SHIELD_ATTRIBUTES_SIZE_BYTES-1 ; number of attributes to loop over
ldir ; set the rest
ld a,$0f ; set bits 0-3 to indicate that shields 0-3 are intact
ld (shieldState),a
ret
;
; HL = address of off-screen buffer (array)
; Modifies: AF, BC, DE, HL, IX, IY
;
StoreShields:
push hl
ld a,SHIELD0_X_ULA_SPACE
call copyShieldULAToBuffer
pop hl
add hl,SHIELD_IMAGE_SIZE_BYTES
push hl
ld a,SHIELD1_X_ULA_SPACE
call copyShieldULAToBuffer
pop hl
add hl,SHIELD_IMAGE_SIZE_BYTES
push hl
ld a,SHIELD2_X_ULA_SPACE
call copyShieldULAToBuffer
pop hl
add hl,SHIELD_IMAGE_SIZE_BYTES
ld a,SHIELD3_X_ULA_SPACE
call copyShieldULAToBuffer
ret
DrawPlayer1Shields:
ld hl,player1ShieldBitmaps
jp drawBufferedShields
DrawPlayer2Shields:
ld hl,player2ShieldBitmaps
jp drawBufferedShields
;
; HL = address of off-screen buffer (array)
; Modifies: AF, BC, DE, HL, IX, IY
;
drawBufferedShields:
push hl
ld a,SHIELD0_X_ULA_SPACE
call drawShieldBitmap
pop hl
add hl,SHIELD_IMAGE_SIZE_BYTES
push hl
ld a,SHIELD1_X_ULA_SPACE
call drawShieldBitmap
pop hl
add hl,SHIELD_IMAGE_SIZE_BYTES
push hl
ld a,SHIELD2_X_ULA_SPACE
call drawShieldBitmap
pop hl
add hl,SHIELD_IMAGE_SIZE_BYTES
ld a,SHIELD3_X_ULA_SPACE
call drawShieldBitmap
ret
;
; Draws a shield to the ULA bitmap at a specified pixel coordinate
;
; n.b. The shield image is 3 bytes wide, but when not 8 pixel aligned in x it requires
; four bytes to be written to screen
;
; HL = shield bitmap image data, which could be either hardcoded or per-player data
; A = ULA x coord
; Modifies: AF, BC, DE, HL, IX, IY
;
drawShieldBitmap:
push hl ; push image address
ld e,a ; E <- ULA x coord
ld d,SHIELD_Y_ULA_SPACE ; D <- ULA y coord
pixelad ; HL <- ULA pixel address
; calculate and store the right bit shift value [0,7]
and 7 ; keep lower 3 bits
ld ixl,a ; IXL <- shift value
pop de ; DE <- address of image
ld b,SHIELD_IMAGE_HEIGHT_PIXELS ; row loop counter
.rowLoop
; 22 horizontal pixels requires three bytes storage but when shifted right it can require up
; to four bytes to be written to the screen.
; Use C, D, E and A for the four bytes.
ld a,(de) ; A <- first byte
ld c,a ; C <- first byte
inc de ; advance DE to second byte
ld a,(de) ; A <- second byte
ld iyh,a ; IYH <- second byte
inc de ; advance DE to third byte
ld a,(de) ; A <- third byte
ld iyl,a ; IYL <- third byte
inc de ; advance DE to next row of image data
push de
ld d,iyh ; D <- second byte
ld e,iyl ; E <- third byte
; do we need to shift right?
ld a,ixl ; A <- right bit shift value
and a ; set Z flag if shift is 0
jp z,.noshift ; jump if no shift required n.b. A (right byte) will be zero
; shift
ld ixh,b ; IXH <- row loop count
ld b,a ; B <- right shift count (loop count)
xor a ; A <- 0, CF <- 0
.shiftLoop
rr c ; rotate zero into bit 7 of C and bit 0 of C into CF
rr d ; rotate CY into bit 7 of D and bit 0 of D into CF
rr e ; rotate CY into bit 7 of E and bit 0 of E into CF
rra ; rotate CY into bit 7 of A and 0 into CF (A initialised to zero)
djnz .shiftLoop
ld b,ixh ; B <- row loop count
.noshift
; write the four bytes to screen
ld (hl),c ; write first byte to screen
inc hl ; step right
ld (hl),d ; write second byte to screen
inc hl ; step right
ld (hl),e ; write third byte to screen
inc hl ; step right
ld (hl),a ; write fourth byte to screen
add hl,-3 ; step back to first byte
pixeldn ; step down
pop de ; DE <- address of next row of sprite data
djnz .rowLoop
ret
;
; Erases a shield from the ULA bitmap screen
; A = ULA x coord
; Modifies: AF, B, DE, HL
;
eraseShieldBitmap:
; Shield x pos means it straddles wither 3 or 4 bytes horizontally
; There's nothing inbeteen right now, so let's just clear 4 bytes per row
ld e,a ; A <- ULA x coord
ld d,SHIELD_Y_ULA_SPACE
pixelad ; HL <- address of top-left byte
xor a ; A <- 0
ld b,SHIELD_IMAGE_HEIGHT_PIXELS ; row loop counter
.loop ld e,l ; E <- low byte of ULA address (no need to store high byte because doesn't change in a row)
ld (hl),a ; clear first byte of row
inc hl
ld (hl),a ; clear second byte of row
inc hl
ld (hl),a ; clear third byte of row
inc hl
ld (hl),a ; clear fourth byte of row
ld l,e ; L <- low byte of first byte
pixeldn ; HL <- address of first byte on next row
djnz .loop
ret
;
; A = shield x coord (ULA space)
; HL = address of off-screen buffer of size SHIELD_IMAGE_SIZE_BYTES
; Modifies: AF, BC, DE, HL, IX, IY
;
copyShieldULAToBuffer:
push hl ; IX <- address of buffer ..
pop ix ; .. (using Index Registers is slow, but this isn't performance-critical)
ld e,a ; E <- ULA x coord
ld d,SHIELD_Y_ULA_SPACE ; D <- ULA y coord
pixelad ; HL <- ULA pixel address
; calculate offset into ULA bitmap byte
and 7 ; A <- x & 7
ld iyh,a ; IYH <- x & 7
; SHIELD_IMAGE_WIDTH_BYTES == 3 so if (x & 7) > 0 then need to read 4 ULA bytes
; We read a pair from left to right three times, shifting left by the shield's x&7 offset
; and storing a byte into the off-screen buffer
; n.b. This does not clip so may fail if shield against right screen edge
ASSERT SHIELD_IMAGE_WIDTH_BYTES == 3 ; code assumes this
ld b,SHIELD_IMAGE_HEIGHT_PIXELS
.loopY push hl ; push ULA bitmap byte address
; load first ULA bytes into DE
ld d,(hl)
inc l ; next horizontal byte
push bc ; push loopY counter
ld b,3 ; B <- loopX counter - read 3 pairs of bytes per row
.loopX ld c,b ; C <- loopX counter
; load next byte to the right
ld e,(hl)
inc l ; ulaBitmapAddress++
; barrel shift left (Z80N instruction)
ld iyl,e ; preserve second byte for next iteration
ld b,iyh ; B <- shift
bsla de,b ; DE <- DE << b
; store in off-screen buffer
ld (ix+0),d ; store byte in buffer
inc ix ; pBuffer++
ld d,iyl ; D <- next byte over for next iteration (rotate)
; next byte in row
ld b,c ; B <- loopX counter
djnz .loopX
; next row
pop bc ; BC <- loopY counter
pop hl ; HL <- ULA coord
pixeldn ; HL <- next row down
djnz .loopY ; next row
ret
; 2D Gaussian kernel to use a destruction pattern
; Generated at http://dev.theomader.com/gaussian-kernel-calculator/ with sigma=2.0
; Designed to do maximum damage at hitpoint and less with increasing distance
; Almost certainly overkill
gaussianKernel7x7:
DB 28,52, 75, 85, 75, 52, 28
DB 52,96, 139,157,139,96, 52
DB 75,139,200,227,200,139,75
DB 85,157,227,255,227,157,85
DB 75,139,200,227,200,139,75
DB 52,96, 139,157,139,96, 52
DB 28,52, 75, 85, 75, 52, 28
ASSERT $ - gaussianKernel7x7 == 7*7
;
; E = point of impact ULA x coord
; D = point of impact ULA y coord
; Modifies: AF, BC, DE, HL, IXH
;
BlowHoleInShields:
; Affect pixels in a 7x7 square centred around around the point of impact
; Remove the pixels pseudo-randomly using a 2D Gaussian kernel for more damage near centre.
dec d ; y -=3
dec d ; ..
dec d ; ..
dec e ; x -= 3
dec e ; ..
dec e ; ..
ld hl,gaussianKernel7x7
ld ixl,e ; store x0 for looping
ld ixh,7 ; y loop counter
.loopY ld e,ixl ; E <- x0
ld b,7 ; x loop counter
.loopX call CalcRandomByte ; A <- random byte
ld c,a ; C <- random
ld a,(hl) ; A <- Gaussian 7x7 filter kernel element value
inc hl ; next kernel element
cp c ; kernel - random, set CF if random > kernel
jp c,.nextX ; jumpf and leave pixel intact if random > kernel
; clear the pixel
push hl ; push kernel address
pixelad ; HL <- ULA pixel address
ld c,(hl) ; C <- shield pixels
setae ; HL <- pixel mask e.g. 00010000
cpl ; A <= ~A e.g. 11101111
and c ; C <- shield pixels with pixel removed
ld (hl),a ; write ULA byte
pop hl ; HL <- kernel address
.nextX inc e ; x++
djnz .loopX
dec ixh
ld b,ixh
inc d ; y++
djnz .loopY
ret
;
; Erases a shield image from the ULA bitmap and resets its "intact" bit
; A = value with bit set for shield index to erase e.g. $1 = shield 0, $2 = shield 1, $4 = shield 2, $8 = shield 3
; Modifies: AF, B, DE, HL
;
DestroyShield:
; reset the active bit for this shield
ld b,a ; store original value
cpl ; invert bits
ld hl,shieldState
and (hl) ; shieldState &= ~shieldBit
ld (hl),a
ld a,b
cp 1
jp z,eraseShield0Bitmap
cp 2
jp z,eraseShield1Bitmap
cp 4
jp z,eraseShield2Bitmap
cp 8
jp z,eraseShield3Bitmap
ret
eraseShield0Bitmap:
ld a,SHIELD0_X_ULA_SPACE
call eraseShieldBitmap
ret
eraseShield1Bitmap:
ld a,SHIELD1_X_ULA_SPACE
call eraseShieldBitmap
ret
eraseShield2Bitmap:
ld a,SHIELD2_X_ULA_SPACE
call eraseShieldBitmap
ret
eraseShield3Bitmap:
ld a,SHIELD3_X_ULA_SPACE
call eraseShieldBitmap
ret
;
; Erases the bitmap image data from the ULA screen for all shields
; Modifies: AF, B, DE, HL
;
EraseAllShieldBitmaps:
ld a,SHIELD0_X_ULA_SPACE
call eraseShieldBitmap
ld a,SHIELD1_X_ULA_SPACE
call eraseShieldBitmap
ld a,SHIELD2_X_ULA_SPACE
call eraseShieldBitmap
ld a,SHIELD3_X_ULA_SPACE
call eraseShieldBitmap
ret
| 37.614224 | 150 | 0.561623 |
099323d8a9ff805f4bad08d6625aef6a1cc0e34a | 542 | asm | Assembly | 2020 Fall E C E 252/HW08/HW08A/copy2.asm | jsswd888/2020_FALL_UW_MADISON | 8bfb4616ec8d9c609ef0e15111ac98cfb1af9a65 | [
"MIT"
] | null | null | null | 2020 Fall E C E 252/HW08/HW08A/copy2.asm | jsswd888/2020_FALL_UW_MADISON | 8bfb4616ec8d9c609ef0e15111ac98cfb1af9a65 | [
"MIT"
] | null | null | null | 2020 Fall E C E 252/HW08/HW08A/copy2.asm | jsswd888/2020_FALL_UW_MADISON | 8bfb4616ec8d9c609ef0e15111ac98cfb1af9a65 | [
"MIT"
] | null | null | null | ; File name: copy2.asm
; Author:
; Description: copy a value from one memory location
; to another using LDR and STR
.ORIG x0200
START
LEA R0, ANIMALS ; get base address for ANIMALS array
; your code below
LDR R1, R0, #3
STR R1, R0, #8
; your code above
BR START
; program data
ANIMALS .FILL x1234 ; BIRD
.FILL x7890 ; CAT
.FILL xABCD ; DOG
.FILL x00FF ; FISH
.FILL xFF00 ; HORSE
.FILL x1248 ; LIZARD
.FILL x1337 ; MONKEY
.FILL xCAFE ; SALMON
.FILL xFACE ; TURKEY
.FILL xBEEF ; ZEBRA
.END | 19.357143 | 53 | 0.645756 |
c9e23e744a938885b04b137ad32c3a197b8b7e25 | 88,345 | asm | Assembly | Projects/PJZ2/Framework/MusicReplay/P6112-Play.asm | jonathanbennett73/amiga-pjz-planet-disco-balls | 1890f797ec7e8061ce4bfb9a8e6844f2ce9f6e1b | [
"MIT"
] | 21 | 2021-04-04T06:00:44.000Z | 2022-01-19T19:12:24.000Z | Projects/PJZ2/Framework/MusicReplay/P6112-Play.asm | jonathanbennett73/amiga-pjz-planet-disco-balls | 1890f797ec7e8061ce4bfb9a8e6844f2ce9f6e1b | [
"MIT"
] | null | null | null | Projects/PJZ2/Framework/MusicReplay/P6112-Play.asm | jonathanbennett73/amiga-pjz-planet-disco-balls | 1890f797ec7e8061ce4bfb9a8e6844f2ce9f6e1b | [
"MIT"
] | null | null | null |
; #-----+-----------------------------------------#
; |Name:| P6112 - Optimized Player 6.1 Playroutine|
; +-----+-----------------------------------------+
; |V1.06| P6112,E1x/E2x fix |
; |V1.05| P6111, EDx fix,better init/exit,Dxx note|
; |V1.04| P6110, E6x command fix+new option |
; |V1.03| P6109, compatibility changes only. |
; |V1.02| Cleaned up P6108 with minor changes. |
; |V1.01| 2.4-3 scanlines faster than my p6107. |
; | | SLen (song length) bug fixed |
; | | lev6 implemented with "poke DMA here" |
; | | Two options for clickless sound start |
; | | P61_Osc precis samplewindow tracking |
; | | Many optimization options - read the |
; | | info or leave them at defaults. |
; +-----+-----------------------------------------+
; | by Photon/Scoopex |
; #-----------------------------------------------#
;SPECIAL NOTE FOR THIS VERSION:
;-----------------------------
;Tutorial here: http://youtu.be/xBtHO-IuN9E
;Put it in your demo: http://youtu.be/JYLcIR6tyO4
;I'm leaving the P61 project, feeling I've left it in good shape.
;There is nothing left to optimize, and I've gone through everything I could
;find that was bad and fixed it.
;I support this only with the readme.txt and all the comment documentation.
;Please follow the advice in my Youtube tutorial specifically made for adding
;P61 to your demo before deciding the playroutine is at fault. If you are sure
;you have found a bug, fix it yourself.
;A song must fail in the example source and play correctly in P61con, before
;you can suspect the playroutine is at fault.
;A note on syncing: apart from the new options for $1Fx, channel triggers, and
;oscilloscope ptrs I added, you should no longer ask musicians to scatter E8x
;commands in the song. Don't worry, it plays fine in P61 and always has.
;But some non-legacy trackers destroy the loop with a filter where E8x commands
;are used. 80x is an alternative, which works in all trackers, according to
;them. To use it, just replace E8x with 80x in the module and you need change
;nothing else.
;P6112:
;E1x/E2x fix. One line changed in the source, in the GetNote macro used by
;these two effects combined with a note trigger (i.e. for F-3 E1x, not --- E1x)
;P6111:
;- Fix notedelay bug introduced in P6108
;- Fix in legacy code, CIA regs were modified in init/exit even when p61_cia=0.
;- Verified that $9xx offset behavior takes effect at loop end, a behavior
;used by chip musicians.
;Dxx command: P61 has never implemented Dxx support other than for xx=00.
;I took a good look, and the way I see it, only pointers to previously
;decrunched notesteps are stored. This means patternloop backjumps work, but
;forward jumps to some offset from the pattern start pointer - doesn't.
;xx steps must first be decrunched. This will cause a spike in rastertime
;(CPU load) used, which is counter to my efforts to make the P61 playroutine
;match the performance of optimized normal Protracker playroutines.
;So I've decided to not implement it. Instead, musicians are recommended to
;copy the jumped-to pattern and delete xx notes to make the offset=0. Then
;the Dxx command can be changed to a D00 command, which is supported.
;The copied pattern will only add 16 bytes or so to the filesize, and
;performance will remain excellent.
;---
;P6110: A bug regarding Patternloops (E6x) was introduced in P6108 when I added
;super optimization flags. This is fixed, but it also revealed the obvious:
;that Patternloop is incompatible with suppF01=0. The example will set this
;automatically for you, but you will not get the great speed gains if you try
;split4=1 unless you SET THE USECODE PROPERLY.
;Of course all modes will work properly if you leave everything at default
;in the example, but I recommend to set the usecode to get the most out of p61
; - not just the size gain.
;Also, new option: set visuctrs=1 to get elapsed time since last instrument
;trigger in P61visuctr0..3.
;NOTE: vasm users MUST turn optimizations off for the jmp xx(PC) instructions
;in the jump tables and at P61_motuuli. If not, the source will assemble
;without errors, but generate bra.b which WILL cause fatal run-time errors.
;May the Source be with you! //Photon
;Credits to Jarno for V6.1A, and bugfixers up to 6.1.0.6.
;(Notes from previous versions below.)
* The Player 6.1A - by Guru / Sahara Surfers
* Interrupt problem with 060 fixed by NoName/Haujobb^Sector 7
* Some Enforcer Hits fixed by Platon42
* Memory trashing bug in routine P61_End fixed by Tolkien
* Bug in routine P61_Init (when opt020=1) fixed by The Dark Coder/Trinity^Morbid Visions
* for Devpac 3, ASM-One, PhxAss and maybe some other assemblers
*
* NEEDS: Default sizes must be words (ASM-One default...)
* Preferably no optimizations on (the jump table must be word jumps)
*
* Tested with Devpac 3.04 by Guru
* Tested with PhxAss 4.14, Asm-Pro 1.1 and ASM-One 1.29
*
* Note 1:All the bugfixes done after version 610.2 (the latest release from
* Guru / Sahara Surfers) are marked with the comment "* BUGFIX"
* followed by some explanations, so that if can quickly copy them
* into a previous version tailored to your needs.
*
* Note 2:The unelegant double WRITE to INTREQ unforunately seems to be
* the best solution to the "interrupt problem" that occurs on
* some 040/060 equipped Amiga. On many 040/060 Amigas it is enough
* to put an access to whatever hardware register and a NOP between
* the first write to INTREQ and he RTE. However we had reports that
* on some Amiga it is really necessary to do a double write to INTREQ
********************************
* Player 6.1A � *
* All in one-version *
* Version 610.6 *
* � 1992-95 Jarno Paananen *
* All rights reserved *
* Fixed by: NoName, Platon42, *
* Tolkien and The Dark Coder *
********************************
nowaveforms=noshorts
copdma=1-lev6
Custom_Block_Size=16 ;d7 used to replace clr.* instead of this const
ifnd player61_i
player61_i:set 1
ifnd exec_types_i
exec_types_i:set 1
include_version:equ 40
extern_lib:macro
xref _lvo\1
endm
structure:macro
\1:equ 0
soffset:set \2
endm
fptr:macro
\1:equ soffset
soffset:set soffset+4
endm
bool:macro
\1:equ soffset
soffset:set soffset+2
endm
byte:macro
\1:equ soffset
soffset:set soffset+1
endm
ubyte:macro
\1:equ soffset
soffset:set soffset+1
endm
word:macro
\1:equ soffset
soffset:set soffset+2
endm
uword:macro
\1:equ soffset
soffset:set soffset+2
endm
short:macro
\1:equ soffset
soffset:set soffset+2
endm
ushort:macro
\1:equ soffset
soffset:set soffset+2
endm
long:macro
\1:equ soffset
soffset:set soffset+4
endm
ulong:macro
\1:equ soffset
soffset:set soffset+4
endm
float:macro
\1:equ soffset
soffset:set soffset+4
endm
double:macro
\1:equ soffset
soffset:set soffset+8
endm
aptr:macro
\1:equ soffset
soffset:set soffset+4
endm
cptr:macro
\1:equ soffset
soffset:set soffset+4
endm
rptr:macro
\1:equ soffset
soffset:set soffset+2
endm
label:macro
\1:equ soffset
endm
struct:macro
\1:equ soffset
soffset:set soffset+\2
endm
alignword:macro
soffset:set (soffset+1)&$fffffffe
endm
alignlong:macro
soffset:set (soffset+3)&$fffffffc
endm
enum:macro
ifc '\1',''
eoffset:set 0
endc
ifnc '\1',''
eoffset:set \1
endc
endm
eitem:macro
\1:equ eoffset
eoffset:set eoffset+1
endm
bitdef0:macro
\1\3\2:equ \4
endm
bitdef:macro
bitdef0 \1,\2,b_,\3
\@bitdef:set 1<<\3
bitdef0 \1,\2,f_,\@bitdef
endm
library_minimum:equ 33
endc ;ifnd
structure Player_Header,0
ulong P61_InitOffset
ulong P61_MusicOffset
ulong P61_EndOffset
ulong P61_SetRepeatOffset
ulong P61_SetPositionOffset
uword P61_MasterVolume
uword P61_UseTempo
uword P61_PlayFlag
uword P61_E8_info
aptr P61_UseVBR
uword P61_Position
uword P61_Pattern
uword P61_Row
aptr P61_Cha0Offset
aptr P61_Cha1Offset
aptr P61_Cha2Offset
aptr P61_Cha3Offset
label Player_Header_SIZE
structure Channel_Block,0
ubyte P61_SN_Note
ubyte P61_Command
ubyte P61_Info
ubyte P61_Pack
aptr P61_Sample
uword P61_OnOff
aptr P61_ChaPos
aptr P61_TempPos
uword P61_TempLen
uword P61_Note
uword P61_Period
uword P61_Volume
uword P61_Fine
uword P61_Offset
uword P61_LOffset
uword P61_ToPeriod
uword P61_TPSpeed
ubyte P61_VibCmd
ubyte P61_VibPos
ubyte P61_TreCmd
ubyte P61_TrePos
uword P61_RetrigCount
ubyte P61_Funkspd
ubyte P61_Funkoff
aptr P61_Wave
uword P61_TData
aptr P61_TChaPos
aptr P61_TTempPos
uword P61_TTempLen
uword P61_Shadow
ifne oscillo ;Filled in by P61_osc call (div ptrs by 4)
aptr P61_oscptr ;points to end of current frame's sample-chunk.
uword P61_oscptrrem ;remainder for precision (internal use only)
aptr P61_oscptrWrap ;wrap (end) pointer for current Paula soundloop
endc
uword P61_DMABit
label Channel_Block_Size
structure Sample_Block,0
aptr P61_SampleOffset
uword P61_SampleLength
aptr P61_RepeatOffset
uword P61_RepeatLength
uword P61_SampleVolume
uword P61_FineTune
label Sample_Block_SIZE
P61_ft=usecode&1
P61_pu=usecode&2
P61_pd=usecode&4
P61_tp=usecode&40
P61_vib=usecode&80
P61_tpvs=usecode&32
P61_vbvs=usecode&64
P61_tre=usecode&$80
P61_arp=usecode&$100
P61_sof=usecode&$200
P61_vs=usecode&$400
P61_pj=usecode&$800
P61_vl=usecode&$1000
P61_pb=usecode&$2800
P61_sd=usecode&$8000
P61_ec=usecode&$ffff0000
P61_fi=usecode&$10000
P61_fsu=usecode&$20000
P61_fsd=usecode&$40000
P61_sft=usecode&$200000
P61_pl=usecode&$400000&((1-split4)*$400000) ;incompatible with split4.
P61_timing=usecode&$1000000
P61_rt=usecode&$2000000
P61_fvu=usecode&$4000000
P61_fvd=usecode&$8000000
P61_nc=usecode&$10000000
P61_nd=usecode&$20000000
P61_pde=usecode&$40000000
P61_il=usecode&$80000000
endc
ifne asmonereport
********** REPORT **********
printt ""
printt "Options used:"
printt "-------------"
ifne p61fade
printt "Mastervolume on"
else
printt "Mastervolume off"
endc
ifne p61system
printt "System friendly"
else
printt "System killer"
endc
ifne p61cia
printt "CIA-tempo on"
else
printt "CIA-tempo off"
endc
ifne p61exec
printt "ExecBase valid"
else
printt "ExecBase invalid"
endc
;; --- wicked nasty nested ifs ---
ifne lev6
printt "Level 6 IRQ on"
else
ifeq (noshorts&(1-p61system))
printt "FAIL: Non-lev6 NOT available for p61system=1 or noshorts=0!"
else
printt "Non-lev6 implemented with 'poke DMAbits byte to a specified address'."
printt "* READ DOCS for how to specify it and how it works."
endc ;noshorts&(1-p61system)
endc ;lev6
;; --- end of wicked nasty nested ifs ---
ifne opt020
printt "MC68020 optimizations"
else
printt "Normal MC68000 code"
endc
printt "Channels:"
printv channels
ifgt channels-4
printt "FAIL: More than 4 channels."
endc
ifeq channels
printt "FAIL: Can't have 0 channels."
endc
printt "UseCode:"
printv usecode
printt "Player binary size:"
printv P61E-P61B
********** REPORT END **********
endc ;ifne asmonereport
P61B:
P61_motuuli:
jmp P61_Init(PC)
ifeq p61cia
jmp P61_Music(PC)
else
rts
rts
endc
jmp P61_End(PC)
rts ;no P61_SetRepeat
rts
ifne p61jump
jmp P61_SetPosition(PC)
else
rts
rts
endc
P61_Master:
dc.w 64
P61_Tempo:
dc.w 1
P61_Play:
dc.w 1
P61_E8:
dc.w 0
P61_VBR:
dc.l 0
P61_Pos:
dc.w 0
P61_Patt:
dc.w 0
P61_CRow:
dc.w 0
P61_Temp0Offset:
dc.l P61_temp0-P61_motuuli
P61_Temp1Offset:
dc.l P61_temp1-P61_motuuli
P61_Temp2Offset:
dc.l P61_temp2-P61_motuuli
P61_Temp3Offset:
dc.l P61_temp3-P61_motuuli
P61_getnote:macro
moveq #$7e,d0
and.b (a5),d0
beq.b .nonote
ifne P61_vib
clr.b P61_VibPos(a5)
endc
ifne P61_tre
clr.b P61_TrePos(a5)
endc
ifne P61_ft
add P61_Fine(a5),d0
endc
move d0,P61_Note(a5)
move P61_periods-P61_cn(a3,d0),P61_Period(a5) ;P6112 fix.
.nonote:
endm
ifeq p61system
ifne p61cia
P61_intti:
movem.l d0-a6,-(sp)
tst.b $bfdd00
lea $dff000+C,a6
move #$2000,$9c-C(a6)
move #$2000,$9c-C(a6)
bsr P61_Music
movem.l (sp)+,d0-a6
nop
rte
endc
endc
ifne p61system
P61_lev6server:
movem.l d2-d7/a2-a6,-(sp)
lea P61_timeron(pc),a0
tst (a0)
beq.b P61_ohi
lea $dff000+C,a6
move P61_server(pc),d0
beq.b P61_musica
subq #1,d0
beq P61_dmason
ifeq nowaveforms
bra P61_setrepeat
else
bra.b P61_ohi
endc
P61_musica:
bsr P61_Music
P61_ohi:
movem.l (sp)+,d2-d7/a2-a6
moveq #1,d0
rts
endc
********** P61_Init **********
* Input: A0=P61-module addr.
* A1 [LONG] = 0 if samples are internal to the module
* Address of samples otherwise
* A2 [LONG] = Address of sample buffer if the module uses packed
* samples, otherwise can be left uninitialized
* A4 [LONG] = Address where 'DMA ON' byte (low 8 bits of DMACON)
* should be poked. ONLY used together with lev6=0.
* D0 [WORD] = 0 autodetect CIA Timer frequency, if ExecBase
* is valid otherwise assume PAL
* 1 assume PAL
* 2 assume NTSC
* [Used only in CIA-enabled mode]
* Uses: D0-A7, A6 set to $dff000+C (your custombase) at exit.
* Returns: D0=0 if okay (i.e. P61 module!). No need to change D0.l.
* NOTE: the define 'start' has been made runtime. move.w #<startpos>,P61_InitPos instead.
P61_Init:
lea $dff000+C,a6
ifeq p61system
ifne quietstart
move.w #$f,$96-C(A6) ;audiodma off
lea $a0-C(A6),a5 ;chan 0
lea P61_Quiet(PC),a3
moveq #0,d1
moveq #channels-1,d5
.choffl:move.l a3,(a5)+ ;ptr
move.l #1<<16+124,(a5)+ ;len, 'fastest common' period
move.l d1,(a5)+ ;quiet volume & audchan.
addq.w #4,a5
dbf d5,.choffl
endc
endc
cmp.l #"P61A",(a0)+
beq.b .modok
subq.l #4,a0
.modok:
ifne p61cia
move d0,-(sp)
endc
moveq #0,d0
cmp.l d0,a1
bne.b .redirect
move (a0),d0
lea (a0,d0.l),a1
.redirect:
move.l a2,a6
lea 8(a0),a2
moveq #$40,d0
and.b 3(a0),d0
bne.b .buffer
move.l a1,a6
subq.l #4,a2
.buffer:
lea P61_cn(pc),a3
move.w #$ff00,d1
move.w d1,P61_OnOff+P61_temp0-P61_cn(a3) ;stop active decsteps
move.w d1,P61_OnOff+P61_temp1-P61_cn(a3)
move.w d1,P61_OnOff+P61_temp2-P61_cn(a3)
move.w d1,P61_OnOff+P61_temp3-P61_cn(a3)
ifne copdma
move.l a4,p61_DMApokeAddr-P61_cn(a3)
endc
moveq #$1f,d1
and.b 3(a0),d1
move.l a0,-(sp)
;; --- insert pan/echo in this loop ---
lea P61_samples(pc),a4
subq #1,d1
moveq #0,d4
P61_lopos:
move.l a6,(a4)+
move (a2)+,d4
bpl.b P61_kook
neg d4
lea P61_samples-16(pc),a5
ifeq opt020
asl #4,d4
move.l (a5,d4),d6
else
add d4,d4
move.l (a5,d4*8),d6
endc
move.l d6,-4(a4)
ifeq opt020
move 4(a5,d4),d4
else
move 4(a5,d4*8),d4
endc
sub.l d4,a6
sub.l d4,a6
bra.b P61_jatk
P61_kook:
move.l a6,d6
tst.b 3(a0)
bpl.b P61_jatk
tst.b (a2)
bmi.b P61_jatk
move d4,d0
subq #2,d0
bmi.b P61_jatk
move.l a1,a5
move.b (a5)+,d2
sub.b (a5),d2
move.b d2,(a5)+
.loop:sub.b (a5),d2
move.b d2,(a5)+
sub.b (a5),d2
move.b d2,(a5)+
dbf d0,.loop
P61_jatk:
move d4,(a4)+
moveq #0,d2
move.b (a2)+,d2
moveq #0,d3
move.b (a2)+,d3
moveq #0,d0
move (a2)+,d0
bmi.b .norepeat
move d4,d5
sub d0,d5
move.l d6,a5
add.l d0,a5
add.l d0,a5
move.l a5,(a4)+
move d5,(a4)+
bra.b P61_gene
.norepeat:
move.l d6,(a4)+
move #1,(a4)+
P61_gene:
move d3,(a4)+
moveq #$f,d0
and d2,d0
mulu #74,d0
move d0,(a4)+
tst -6(a2)
bmi.b .nobuffer
moveq #$40,d0
and.b 3(a0),d0
beq.b .nobuffer
move d4,d7
tst.b d2
bpl.b .copy
subq #1,d7
moveq #0,d5
moveq #0,d4
.lo: move.b (a1)+,d4
moveq #$f,d3
and d4,d3
lsr #4,d4
sub.b .table(pc,d4),d5
move.b d5,(a6)+
sub.b .table(pc,d3),d5
move.b d5,(a6)+
dbf d7,.lo
bra.b .kop
.copy:
add d7,d7
subq #1,d7
.cob:
move.b (a1)+,(a6)+
dbf d7,.cob
bra.b .kop
.table:
dc.b 0,1,2,4,8,16,32,64,128,-64,-32,-16,-8,-4,-2,-1
.nobuffer:
move.l d4,d6
add.l d6,d6
add.l d6,a6
add.l d6,a1
.kop:
dbf d1,P61_lopos
move.l (sp)+,a0
and.b #$7f,3(a0)
move.l a2,-(sp)
lea P61_temp0(pc),a1
lea P61_temp1(pc),a2
lea P61_temp2(pc),a4
lea P61_temp3(pc),a5
moveq #Channel_Block_Size/2-2,d0
moveq #0,d1
.cl: move d1,(a1)+
move d1,(a2)+
move d1,(a4)+
move d1,(a5)+
dbf d0,.cl
lea P61_temp0-P61_cn(a3),a1
lea P61_emptysample-P61_cn(a3),a2
moveq #channels-1,d0
.loo:
move.l a2,P61_Sample(a1)
lea Channel_Block_Size(a1),a1
dbf d0,.loo
move.l (sp)+,a2
move.l a2,P61_positionbase-P61_cn(a3)
moveq #$7f,d1
and.b 2(a0),d1
ifeq opt020
lsl #3,d1
lea (a2,d1.l),a4
else
lea (a2,d1.l*8),a4
endc
move.l a4,P61_possibase-P61_cn(a3) ;base to pos. indices.
move.l a4,a1
moveq #-1,d0
.search:
cmp.b (a1)+,d0
bne.b .search
move.l a1,P61_patternbase-P61_cn(a3)
move.l a1,d0
sub.l a4,d0
subq.w #1,d0 ;this is the * BUGFIX! whoa!
move d0,P61_slen-P61_cn(a3)
;; --- Bugfix: P61_Init gives P61_slen=actual songlength +1.
;; --- This did not affect NextPattern, because it looks for endbyte flag.
;; --- It did affect Bxx/Dxx, but I guess nobody has tried to jump or
;; --- break to Last Pattern, ever. Now fixed to set correct SLen and
;; --- suddenly Bxx/Dxx/Setposition works as they should. //Photon
add.w P61_InitPos(pc),a4 ;position from which to start playing the song
moveq #0,d0
move.b (a4)+,d0
move.l a4,P61_spos-P61_cn(a3)
lsl #3,d0
add.l d0,a2
move.l a1,a4
moveq #0,d0 ;hi word must be clear to manage >32K of patterns
move (a2)+,d0 ;and no movem-signextend. This code is correct.
lea (a4,d0.l),a1
move.l a1,P61_ChaPos+P61_temp0-P61_cn(a3)
move (a2)+,d0
lea (a4,d0.l),a1
move.l a1,P61_ChaPos+P61_temp1-P61_cn(a3)
move (a2)+,d0
lea (a4,d0.l),a1
move.l a1,P61_ChaPos+P61_temp2-P61_cn(a3)
move (a2)+,d0
lea (a4,d0.l),a1
move.l a1,P61_ChaPos+P61_temp3-P61_cn(a3)
ifeq nowaveforms
lea P61_setrepeat(pc),a0
move.l a0,P61_intaddr-P61_cn(a3)
endc
move #63,P61_rowpos-P61_cn(a3)
move #6,P61_speed-P61_cn(a3)
move #5,P61_speed2-P61_cn(a3)
clr P61_speedis1-P61_cn(a3)
ifne P61_pl
clr.l P61_plcount-P61_cn(a3)
endc
ifne P61_pde
clr P61_pdelay-P61_cn(a3)
clr P61_pdflag-P61_cn(a3)
endc
clr (a3) ;start frame of very first song note.
;"reused" patterns with effects coming out of nowhere
;at start of song require 0. Otherwise F0x speed-2 is
;ok, except if split4=1, set to F-speed - #channels.
;Don't change if you don't need 'the very quickest click to start' speed.
moveq #2,d0
and.b $bfe001,d0
move.b d0,P61_ofilter-P61_cn(a3)
bset #1,$bfe001
ifeq p61system
ifne p61exec
move.l 4.w,a6
moveq #0,d0
btst d0,297(a6)
beq.b .no68010
lea P61_liko(pc),a5
jsr -$1e(a6)
.no68010:
move.l d0,P61_VBR-P61_cn(a3)
endc
move.l P61_VBR-P61_cn(a3),a0
lea $78(a0),a0
move.l a0,P61_vektori-P61_cn(a3)
move.l (a0),P61_oldlev6-P61_cn(a3)
ifeq copdma
lea P61_dmason(pc),a1 ;set 'dma-on-interrupt'.
move.l a1,(a0)
endc
endc
moveq #$f,d0
lea $dff000+C,a6 ;a6 trashed above.
ifeq quietstart
moveq #$0,d1 ;original code
move d1,$a8-C(a6)
move d1,$b8-C(a6)
move d1,$c8-C(a6)
move d1,$d8-C(a6)
move d0,$96-C(a6)
endc
ifne nowaveforms
move.w d0,P61_NewDMA-P61_cn(a3) ;"NEXTframe setloop" to be triggered
endc
ifeq p61system
ifeq copdma
lea P61_dmason(pc),a1 ;again?
move.l a1,(a0)
endc
move #$2000,$9a-C(a6) ;old timerb OFF
lea $bfd000,a0
lea P61_timers(pc),a1
move.b #$7f,$d00(a0)
ifne p61cia ;only affect cia if actually used
move.b #$10,$e00(a0)
endc
move.b #$10,$f00(a0)
ifne p61cia
move.b $400(a0),(a1)+
move.b $500(a0),(a1)+
else
addq.w #2,a1
endc
move.b $600(a0),(a1)+
move.b $700(a0),(a1)
endc
ifeq (p61system+p61cia)
move.b #$82,$d00(a0)
endc
ifne p61cia
move (sp)+,d0
subq #1,d0
beq.b P61_ForcePAL
subq #1,d0
beq.b P61_NTSC
ifne p61exec
move.l 4.w,a1
cmp.b #60,$213(a1)
beq.b P61_NTSC
endc
P61_ForcePAL:
move.l #1773447,d0
bra.b P61_setcia
P61_NTSC:
move.l #1789773,d0
P61_setcia:
move.l d0,P61_timer-P61_cn(a3)
divu #125,d0
move d0,P61_thi2-P61_cn(a3)
sub #$1f0*2,d0
move d0,P61_thi-P61_cn(a3)
ifeq p61system
move P61_thi2-P61_cn(a3),d0
move.b d0,$400(a0)
lsr #8,d0
move.b d0,$500(a0)
lea P61_intti(pc),a1
move.l a1,P61_tintti-P61_cn(a3)
move.l P61_vektori(pc),a2
move.l a1,(a2)
move.b #$83,$d00(a0)
move.b #$11,$e00(a0)
endc
endc
ifeq p61system
ifeq copdma
move #$e000,$9a-C(a6) ;level 6 timer B int, at least for setloop
else
move #$c000,$9a-C(a6) ;no level 6 timer B int, please
;(bit 14 is cleared above.)
endc
ifne quietstart
move.w #$800f,$96-C(A6) ;make all used channels start a quiet loop.
endc
moveq #0,d0
rts
ifne p61exec
P61_liko:
dc.l $4E7A0801
rte
endc
endc
ifne p61system
move.l a6,-(sp)
ifne p61cia
clr P61_server-P61_cn(a3)
else
move #1,P61_server-P61_cn(a3)
endc
move.l 4.w,a6
moveq #-1,d0
jsr -$14a(a6)
move.b d0,P61_sigbit-P61_cn(a3)
bmi P61_err
lea P61_allocport(pc),a1
move.l a1,P61_portti-P61_cn(a3)
move.b d0,15(a1)
move.l a1,-(sp)
suba.l a1,a1
jsr -$126(a6)
move.l (sp)+,a1
move.l d0,16(a1)
lea P61_reqlist(pc),a0
move.l a0,(a0)
addq.l #4,(a0)
clr.l 4(a0)
move.l a0,8(a0)
lea P61_dat(pc),a1
move.l a1,P61_reqdata-P61_cn(a3)
lea P61_allocreq(pc),a1
lea P61_audiodev(pc),a0
moveq #0,d0
moveq #0,d1
jsr -$1bc(a6)
tst.l d0
bne P61_err
st.b P61_audioopen-P61_cn(a3)
lea P61_timerint(pc),a1
move.l a1,P61_timerdata-P61_cn(a3)
lea P61_lev6server(pc),a1
move.l a1,P61_timerdata+8-P61_cn(a3)
moveq #0,d3
lea P61_cianame(pc),a1
P61_openciares:
moveq #0,d0
move.l 4.w,a6
jsr -$1f2(a6)
move.l d0,P61_ciares-P61_cn(a3)
beq.b P61_err
move.l d0,a6
lea P61_timerinterrupt(pc),a1
moveq #0,d0
jsr -6(a6)
tst.l d0
beq.b P61_gottimer
addq.l #4,d3
lea P61_timerinterrupt(pc),a1
moveq #1,d0
jsr -6(a6)
tst.l d0
bne.b P61_err
P61_gottimer:
lea P61_craddr+8(pc),a6
move.l P61_ciaaddr(pc,d3),d0
move.l d0,(a6)
sub #$100,d0
move.l d0,-(a6)
moveq #2,d3
btst #9,d0
bne.b P61_timerB
subq.b #1,d3
add #$100,d0
P61_timerB:
add #$900,d0
move.l d0,-(a6)
move.l d0,a0
and.b #%10000000,(a0)
move.b d3,P61_timeropen-P61_cn(a3)
moveq #0,d0
ifne p61cia
move.l P61_craddr+4(pc),a1
move.b P61_tlo(pc),(a1)
move.b P61_thi(pc),$100(a1)
endc
or.b #$19,(a0)
st P61_timeron-P61_cn(a3)
P61_pois:
move.l (sp)+,a6
rts
P61_err:moveq #-1,d0
bra.b P61_pois
P61_ciaaddr:
dc.l $bfd500,$bfd700
endc
********** P61_End **********
* Input: none.
* Uses: D0-D1/A0-A1/A3/A6, A6 set to $dff000+C (your custombase) at exit.
P61_End:
lea $dff000+C,a6
moveq #0,d0
move d0,$a8-C(a6)
move d0,$b8-C(a6)
move d0,$c8-C(a6)
move d0,$d8-C(a6)
move #$f,$96-C(a6)
and.b #%11111101,$bfe001
move.b P61_ofilter(pc),d0
or.b d0,$bfe001
ifeq p61system
move #$2000,$9a-C(a6)
move.l P61_vektori(pc),a0
move.l P61_oldlev6(pc),(a0)
lea $bfd000,a0
lea P61_timers(pc),a1
ifne p61cia ;only affect cia if used
move.b (a1)+,$400(a0)
move.b (a1)+,$500(a0)
else
addq.w #2,a1
endc
move.b (a1)+,$600(a0)
move.b (a1)+,$700(a0)
ifne p61cia
move.b #$10,$e00(a0)
endc
move.b #$10,$f00(a0)
else
move.l a6,-(sp)
lea P61_cn(pc),a3
moveq #0,d0
clr P61_timeron-P61_cn(a3)
move.b P61_timeropen(pc),d0
beq.b P61_rem1
move.l P61_ciares(pc),a6
lea P61_timerinterrupt(pc),a1
subq.b #1,d0
jsr -12(a6)
P61_rem1:
move.l 4.w,a6
tst.b P61_audioopen-P61_cn(a3)
beq.b P61_rem2
lea P61_allocreq(pc),a1
jsr -$1c2(a6)
clr.b P61_audioopen-P61_cn(a3)
P61_rem2:
moveq #0,d0
move.b P61_sigbit(pc),d0
bmi.b P61_rem3
jsr -$150(a6)
st P61_sigbit-P61_cn(a3)
P61_rem3:
move.l (sp)+,a6
endc
rts
;WHY not just cond-add mulu to where the finalvolume is set??
;"Jag blir s� matt." (c) The Big A/Phenomena.
ifne p61fade
P61_mfade:
lea $dff0a8,a4
move P61_Master(pc),d0
move P61_temp0+P61_Shadow(pc),d1
mulu d0,d1
lsr #6,d1
move d1,(a4)
ifgt channels-1
move P61_temp1+P61_Shadow(pc),d1
mulu d0,d1
lsr #6,d1
move d1,$10(a4)
endc
ifgt channels-2
move P61_temp2+P61_Shadow(pc),d1
mulu d0,d1
lsr #6,d1
move d1,$20(a4)
endc
ifgt channels-3
move P61_temp3+P61_Shadow(pc),d1
mulu d0,d1
lsr #6,d1
move d1,$30(a4)
endc
rts
endc
ifne oscillo
******************************************
;Call directly after P61_Music to get ptr,count of samples playing THIS frame
;Input: a0=P61_temp0/1/2/3 (selects channel)
;Output: d0-d1/d4/a2=WrapCount.w,Count.w,Replen=0,SamplePtr
;Only if d0.w>0:d2/d4/a1=LoopEndPtr,Replen,LoopStartPtr
;Destroys: d0-d4/a1-a2, a0 points to next channel in oscdata.
;Usage:
;If d1=0, this channel has not yet started playing sounds, and there is no
;usable data in the other registers. (I.e. don't start drawing oscilloscope
;for this chan yet.). D1 is tested at exit, so you can just beq to skip the
;channel.
;If d0<=0, just read d1 bytes from a2-ptr.
;If d0>0, subtract it from d1 and read d1 bytes from a2-ptr. Backup Loopstart
;in a1 to (for example) a3. Then read d0 bytes from a1-ptr, if you hit the
;LoopEnd address in d2, then read the remaining bytes from Loopstart that
;you saved in a3.
;----------------
;Most samples have a short loop at the end. If you extend all short loops to
;578 bytes, you won't have to check your sample-read-address vs the WrapPtr
;in d2 in your loop.
;A silent, short loop of 2 bytes at the end is common to end an instrument.
;P61_emptyloop578 has been provided to save this check for you for all
;one-shot instruments.
;Set the oscextloops option to 0 if you haven't extended the other loops. This
;will enable an extra modulo div and disable P61_emptyloop578. You will also
;have to check for "end of replen" yourself in-loop, as mentioned.
;Bonus checkable things:
;If d4=0, the instrument has not yet reached its end loop.
;oscextloops=0: if d4=1, the instrument ended (playing quiet 2-byte loop)
;oscextloops=1: only if d2=P61_emptyloop578E has the instrument ended.
;Some bragging:
;The sample-window start and end points are rounded for convenience.
;They are rounded so that the ptrs and counts generate sample-windows with no
;gap or overlap between each frame, for a perfect sequence of memory areas.
;Internally it calculates with an accuracy of 1/262144, or about 6-7 decimals.
;It supports 128KB samples with <64KB loops.
;It's fully possible to do per-frame mixing directly into playing samples
;using this precision.
oscextloops=0 ;this saves a modulo-div
oscbigempty=0 ;optional buf regardless of oscextloops option
ticksframePAL=70937*4+2 ;50.00028194 Hz
ticksframeNTSC=59719*4+3 ;59.94005233 Hz
P61_osc:
move.w P61_Period(a0),d4 ;check for div0
bne.b .non0
.div0: lea Channel_Block_Size(a0),a0 ;next chan
moveq #0,d1 ;return count of 0.
rts
.non0:
lea P61_oscptr(a0),a0
move.l (a0)+,d0 ;ptr "x4"
moveq #3,d3
and.l d0,d3 ;remainder for wrapcalc
move.l d0,d2
addq.l #2,d2
lsr.l #2,d2
move.l d2,a2 ;ptr result.
move.l #ticksframePAL,d2 ;for NTSC, use the NTSC constant above.
divu d4,d2 ;count.w "x4", (ticks/frame) div period)
moveq #0,d1
move.w d2,d1 ;'cleared hi word'
clr.w d2 ;modulo in hi word (mod<<16)/period
divu d4,d2 ;f.ex. 379/380 converted to 65536ths
add.w d2,(a0)+ ;ptr.rem updated
addx.l d1,d0 ;add count+"carry"=nextframe/'end' ptr
move.l d0,-6(a0) ;saved.
move.l d0,d1
addq.l #2,d1
lsr.l #2,d1
sub.l a2,d1 ;correctly aliased sample-window byte count.
moveq #0,d2 ;default replen 0->d4 later
sub.l (a0)+,d0 ;loopend hit?
blt.b .nowr
;; --- handle overshoot ---
move.l P61_Sample-P61_DMABit(a0),a1 ;a1 "trashed"
ifeq oscbigempty
move.w 10(a1),d2 ;replen
subq.w #1,d2
endc
move.l 6(a1),a1 ;repptr
ifne oscbigempty
bne.b .nol1
lea P61_emptyloop578(PC),a1 ;replace with nice big loopbuffer.
.nol1:
endc
;; --- a1 loopstartptr result done ---
ifeq oscbigempty
addq.l #1,d2 ;128KB support but <64KB loops, see divu.
add.l d2,d2 ;wordlen->bytelen
else
move.l #P61_emptyquiet578E-P61_emptyquiet578,d2
endc
;; --- d2 replen result done ---
move.l a1,d4 ;loopstart
lsl.l #2,d4 ;"x4"
or.b d3,d4 ;keep round-bits, d3 usable now
addq.w #2,d0 ;word size okay cos positive; hi word clr.
lsr.w #2,d0 ;rounded count result.
move.l d0,d3
ifeq oscextloops
divu d2,d3 ;overshoot modulo replen.
clr.w d3 ;(to not accumulate overshoot but stay in loop)
swap d3
endc
add.w d3,d3 ;unrounded count modulized, x4.
add.w d3,d3 ;will be at most 578.
add.l d4,d3
move.l d3,-10(a0) ;jump to near loopstart. remainder kept, ofc.
move.l d2,d4 ;proper replen
add.l a1,d2 ;LoopEndPtr result.
move.l d2,d3
lsl.l #2,d3
move.l d3,-4(a0) ;new endptr(x4) for compare.
bra.s .ct
.nowr:
move.l d2,d4 ;replen, also done in wrap, before adding a1.
addq.l #2,d0 ;long cos negative and 128KB support.
asr.l #2,d0 ;rounded wraplen result.
.ct:
addq.w #2,a0 ;skip P61_DMAbit
tst.w d1 ;test the count.
RTS
ifne oscbigempty
P61_emptyloop578:
dcb.w 578/2,0 ;@@ this "sample" MUST be in chipmem!
P61_emptyloop578E:
endc
endc
ifne p61jump
******************************************
* P61_SetPosition
; Call P61_SetPosition to jump to a specific position in the song
; If called AFTER P61_Music, what's written below will be true but happen one
; frame later.
;� OPTIONALLY Starts from the beginning if out of limits. �
* Input: D0.b=songposition. A6=your custombase ("$dff000")
* Uses: D0-D1/A0-A1/A3
;If you want to change pos 'at next note', call this when P61_cn=(P61_speed2-1)
;if you also need to change pos 'in rhythm', AND P61_CRow with f.ex. 2^n-1.
;if that equals 2^n-1 ("all 1s"), and cn is 'in tempo', you will get a smooth
;transition. If n is 64, you are sure to make the switch at pattern end.
;@@ NOTE: If you use this with split4=1, be aware that it must then decrunch
;up to 2 framesteps before starting to play the song (meaning the song won't
;start playing quite instantly).
P61_SetPosition:
lea P61_cn(pc),a3
ifne split4
move.w P61_speed2(PC),d1 ;if _Speedis1, _cn doesn't matter.
subq.w #3,d1 ;allow 2 more pre-decrunch frames.
else
move.w P61_speed2(PC),d1 ;if _Speedis1, _cn doesn't matter.
subq.w #1,d1
endc
;new pattern reaches your ears NEXT frame or CIA-int, or 3 frames later with
;the split4 option.
move.w d1,(a3) ;instant SetPos, ie. decrunch next NOW
ifne P61_pl
clr P61_plflag-P61_cn(a3)
endc
moveq #0,d1
move.b d0,d1
move.l d1,d0
ifeq optjmp
cmp P61_slen-P61_cn(a3),d0
blo.b .e
moveq #0,d0
.e:
endc
move d0,P61_Pos-P61_cn(a3)
add.l P61_possibase(pc),d0
move.l d0,P61_spos-P61_cn(a3)
moveq #63,d0 ;yeah, the original SetPos is, like, wrong.
move d0,P61_rowpos-P61_cn(a3)
clr P61_CRow-P61_cn(a3)
move.l P61_spos(pc),a1
move.l P61_patternbase(pc),a0
addq #1,P61_Pos-P61_cn(a3)
move.b (a1)+,d0
move.l a1,P61_spos-P61_cn(a3)
move.l P61_positionbase(pc),a1
move d0,P61_Patt-P61_cn(a3)
lsl #3,d0
add.l d0,a1
move.w (a1)+,d0
add.l a0,d0
move.l d0,P61_ChaPos+P61_temp0-P61_cn(a3)
moveq #0,d0 ;actually faster than lea (a0,d0.l)
move.w (a1)+,d0
add.l a0,d0
move.l d0,P61_ChaPos+P61_temp1-P61_cn(a3)
moveq #0,d0 ;actually faster than lea (a0,d0.l)
move.w (a1)+,d0
add.l a0,d0
move.l d0,P61_ChaPos+P61_temp2-P61_cn(a3)
moveq #0,d0 ;actually faster than lea (a0,d0.l)
move.w (a1)+,d0
add.l a0,d0
move.l d0,P61_ChaPos+P61_temp3-P61_cn(a3)
lea P61_temp0(PC),a3
clr.b P61_Pack+Channel_Block_Size*0(a3) ;force new take
clr.b P61_Pack+Channel_Block_Size*1(a3)
clr.b P61_Pack+Channel_Block_Size*2(a3)
clr.b P61_Pack+Channel_Block_Size*3(a3)
clr.b P61_TempLen+1+Channel_Block_Size*0(a3) ;force TakeNORM
clr.b P61_TempLen+1+Channel_Block_Size*1(a3)
clr.b P61_TempLen+1+Channel_Block_Size*2(a3)
clr.b P61_TempLen+1+Channel_Block_Size*3(a3)
move.w #$ff00,d0
move.w d0,P61_OnOff+Channel_Block_Size*0(a3) ;stop active decsteps
move.w d0,P61_OnOff+Channel_Block_Size*1(a3)
move.w d0,P61_OnOff+Channel_Block_Size*2(a3)
move.w d0,P61_OnOff+Channel_Block_Size*3(a3)
clr.b P61_dma+1-P61_temp0(a3) ;stop playing channels
move.w #$000f,$96-C(A6) ;indeed, in speakers too.
ifne nowaveforms
clr P61_NewDMA-P61_temp0(a3) ;stop DMA next note
endc
ifne copdma
move.l p61_DMApokeAddr(PC),a3 ;don't set DMA until playtime
clr.b (a3)
endc
rts
endc
********** Main entry point from CIA/VB int or frame loop **********
* Input: A6=your custombase ("$dff000")
* Uses: D0-A7, A6 set to $dff000+C (your custombase) at exit.
P61_Music:
lea P61_cn(pc),a3
moveq #0,d7 ;replaced clr.* with move.* d7,
lea $a0-C(a6),a4 ;Aud Chan Base.
ifne playflag
tst P61_Play-P61_cn(a3) ;set by init if CIA
bne.b P61_ohitaaa
ifne p61cia
ifne p61system
move.l P61_craddr+4(pc),a0
move.b P61_tlo2(pc),(a0)
move.b P61_thi2(pc),$100(a0)
endc
endc
rts
endc
P61_ohitaaa:
ifne visuctrs ;easy visualizer counters.
addq.w #1,P61_visuctr0-P61_cn(a3) ;inc elapsed #calls since last
addq.w #1,P61_visuctr1-P61_cn(a3)
addq.w #1,P61_visuctr2-P61_cn(a3)
addq.w #1,P61_visuctr3-P61_cn(a3)
endc
ifne p61fade
pea P61_mfade(pc)
endc
move.w (a3),d4
cmp.w P61_speed2(pc),d4 ;Really compares with P61_speed, 1 added later.
beq.w P61_playtime ;if new note frame, handle
;; --- no new note ---
; bsr P61_Synth ;synth/pan/echo cpu-mix routine. Not done yet.
;(note: re-cmp to d4 if you put something here.)
ifeq suppF01
blt.b P61_nowrap ;otherwise last was not playtime-frame.
endc
;; --- first frame of new step ---
;rolled over from playtime to frame after. incompatible with F01.
ifeq suppF01
ifne nowaveforms
move.b P61_dma+1-P61_cn(a3),P61_NewDMA+1-P61_cn(a3) ;or set by fx
endc
clr.w d4
subq #1,P61_rowpos-P61_cn(a3) ;next pattern-step
bpl.b P61_nonewpatt
P61_nextpattern:
ifne P61_pl
move d7,P61_plflag-P61_cn(a3)
endc
move.l P61_patternbase(pc),a0
moveq #63,d0
move d0,P61_rowpos-P61_cn(a3)
move d7,P61_CRow-P61_cn(a3)
move.l P61_spos(pc),a1
addq #1,P61_Pos-P61_cn(a3)
move.b (a1)+,d0
bpl.b P61_dk
move.l P61_possibase(pc),a1
move.b (a1)+,d0
move d7,P61_Pos-P61_cn(a3)
P61_dk:
move.l a1,P61_spos-P61_cn(a3)
move d0,P61_Patt-P61_cn(a3)
lsl #3,d0
move.l P61_positionbase(pc),a1
add.l d0,a1
move.w (a1)+,d0 ;no movem sign-extend... check.
add.l a0,d0
move.l d0,P61_ChaPos+P61_temp0-P61_cn(a3)
moveq #0,d0 ;actually faster than lea (a0,d0.l)
move.w (a1)+,d0
add.l a0,d0
move.l d0,P61_ChaPos+P61_temp1-P61_cn(a3)
moveq #0,d0 ;actually faster than lea (a0,d0.l)
move.w (a1)+,d0
add.l a0,d0
move.l d0,P61_ChaPos+P61_temp2-P61_cn(a3)
moveq #0,d0 ;actually faster than lea (a0,d0.l)
move.w (a1)+,d0
add.l a0,d0
move.l d0,P61_ChaPos+P61_temp3-P61_cn(a3)
bra.b P61_nowrap
P61_nonewpatt:
moveq #63,d0
sub P61_rowpos-P61_cn(a3),d0
move d0,P61_CRow-P61_cn(a3)
endc
;; --- end of rolled over code ---
P61_nowrap:
addq.w #1,d4 ;NOW I do!
move d4,(a3)
P61_delay:
ifne nowaveforms ;nd,rt,sof, or note triggered dmaoff
move.w P61_NewDMA(PC),d5 ;on last P61_Music call?
beq.b .nosetloops
move.l P61_Sample+P61_temp0(PC),a0
move.l 6(a0),(a4) ;loop start
move.w 10(a0),4(a4) ;loop len
ifgt channels-1
move.l P61_Sample+P61_temp1(PC),a0
move.l 6(a0),$10(a4) ;loop start
move.w 10(a0),$14(a4) ;loop len
endc
ifgt channels-2
move.l P61_Sample+P61_temp2(PC),a0
move.l 6(a0),$20(a4) ;loop start
move.w 10(a0),$24(a4) ;loop len
endc
ifgt channels-3
move.l P61_Sample+P61_temp3(PC),a0
move.l 6(a0),$30(a4) ;loop start
move.w 10(a0),$34(a4) ;loop len
endc
move.w d7,P61_NewDMA-P61_cn(a3) ;poll (clear)
.nosetloops:
endc
ifne p61cia
ifne p61system
move.l P61_craddr+4(pc),a0
move.b P61_tlo2(pc),(a0)
move.b P61_thi2(pc),$100(a0)
endc
endc
********** mainfx handling **********
lea P61_temp0(pc),a5
moveq #channels-1,d5
P61_lopas:
tst.b P61_OnOff+1(a5)
beq.w P61_contfxdone
moveq #$f,d0
and (a5),d0
ifeq opt020
add d0,d0
move P61_jtab2(pc,d0),d0
else
move P61_jtab2(pc,d0*2),d0
endc
jmp P61_jtab2(pc,d0)
P61_jtab2:
dc P61_contfxdone-P61_jtab2
ifne P61_pu
dc P61_portup-P61_jtab2
else
dc P61_contfxdone-P61_jtab2
endc
ifne P61_pd
dc P61_portdwn-P61_jtab2
else
dc P61_contfxdone-P61_jtab2
endc
ifne P61_tp
dc P61_toneport-P61_jtab2
else
dc P61_contfxdone-P61_jtab2
endc
ifne P61_vib
dc P61_vib2-P61_jtab2
else
dc P61_contfxdone-P61_jtab2
endc
ifne P61_tpvs
dc P61_tpochvslide-P61_jtab2
else
dc P61_contfxdone-P61_jtab2
endc
ifne P61_vbvs
dc P61_vibochvslide-P61_jtab2
else
dc P61_contfxdone-P61_jtab2
endc
ifne P61_tre
dc P61_tremo-P61_jtab2
else
dc P61_contfxdone-P61_jtab2
endc
ifne P61_arp
dc P61_arpeggio-P61_jtab2
else
dc P61_contfxdone-P61_jtab2
endc
dc P61_contfxdone-P61_jtab2
ifne P61_vs
dc P61_volslide-P61_jtab2
else
dc P61_contfxdone-P61_jtab2
endc
dc P61_contfxdone-P61_jtab2
dc P61_contfxdone-P61_jtab2
dc P61_contfxdone-P61_jtab2
ifne P61_ec
dc P61_contecommands-P61_jtab2
else
dc P61_contfxdone-P61_jtab2
endc
dc P61_contfxdone-P61_jtab2
;; --- end of contfx table ---
ifne P61_ec
P61_contecommands:
move.b P61_Info(a5),d0
and #$f0,d0
lsr #3,d0
move P61_etab2(pc,d0),d0
jmp P61_etab2(pc,d0)
P61_etab2:
dc P61_contfxdone-P61_etab2
ifne P61_fsu
dc P61_fineup2-P61_etab2
else
dc P61_contfxdone-P61_etab2
endc
ifne P61_fsd
dc P61_finedwn2-P61_etab2
else
dc P61_contfxdone-P61_etab2
endc
dc P61_contfxdone-P61_etab2
dc P61_contfxdone-P61_etab2
dc P61_contfxdone-P61_etab2
dc P61_contfxdone-P61_etab2
dc P61_contfxdone-P61_etab2
dc P61_contfxdone-P61_etab2
ifne P61_rt
dc P61_retrig-P61_etab2
else
dc P61_contfxdone-P61_etab2
endc
ifne P61_fvu
dc P61_finevup2-P61_etab2
else
dc P61_contfxdone-P61_etab2
endc
ifne P61_fvd
dc P61_finevdwn2-P61_etab2
else
dc P61_contfxdone-P61_etab2
endc
ifne P61_nc
dc P61_notecut-P61_etab2
else
dc P61_contfxdone-P61_etab2
endc
ifne P61_nd
dc P61_notedelay-P61_etab2
else
dc P61_contfxdone-P61_etab2
endc
dc P61_contfxdone-P61_etab2
dc P61_contfxdone-P61_etab2
endc
ifne P61_fsu
P61_fineup2:
tst (a3)
bne.w P61_contfxdone
moveq #$f,d0
and.b P61_Info(a5),d0
sub d0,P61_Period(a5)
moveq #113,d0
cmp P61_Period(a5),d0
ble.b .jup
move d0,P61_Period(a5)
.jup: move P61_Period(a5),6(a4)
bra.w P61_contfxdone
endc
ifne P61_fsd
P61_finedwn2:
tst (a3)
bne.w P61_contfxdone
moveq #$f,d0
and.b P61_Info(a5),d0
add d0,P61_Period(a5)
cmp #856,P61_Period(a5)
ble.b .jup
move #856,P61_Period(a5)
.jup: move P61_Period(a5),6(a4)
bra.w P61_contfxdone
endc
ifne P61_fvu
P61_finevup2:
tst (a3)
bne.w P61_contfxdone
moveq #$f,d0
and.b P61_Info(a5),d0
add d0,P61_Volume(a5)
moveq #64,d0
cmp P61_Volume(a5),d0
bge.b .jup
move d0,P61_Volume(a5)
.jup: move P61_Volume(a5),8(a4)
bra.w P61_contfxdone
endc
ifne P61_fvd
P61_finevdwn2:
tst (a3)
bne.w P61_contfxdone
moveq #$f,d0
and.b P61_Info(a5),d0
sub d0,P61_Volume(a5)
bpl.b .jup
move d7,P61_Volume(a5)
.jup: move P61_Volume(a5),8(a4)
bra.w P61_contfxdone
endc
ifne P61_nc
P61_notecut:
moveq #$f,d0
and.b P61_Info(a5),d0
cmp (a3),d0
bne.w P61_contfxdone
ifeq p61fade
move d7,8(a4)
else
move d7,P61_Shadow(a5)
endc
move d7,P61_Volume(a5)
bra.w P61_contfxdone
endc
ifne P61_nd
P61_notedelay:
moveq #$f,d0
and.b P61_Info(a5),d0
cmp (a3),d0
bne.w P61_contfxdone
moveq #$7e,d0
and.b (a5),d0
beq.w P61_contfxdone
move P61_DMABit(a5),d0
move d0,$96-C(a6) ;turn chan dma off
or d0,P61_dma-P61_cn(a3) ;flag for turnon later
ifne nowaveforms
or d0,P61_NewDMA-P61_cn(a3) ;no interrupt needed, done next frame.
endc
move.l P61_Sample(a5),a1 ;set new ptr len already
ifeq oscillo
move.l (a1)+,(a4)
move (a1),4(a4)
else
;; --- wohoo oscilloscope ptrs ---
moveq #0,d1
move.l (a1)+,d0
move (a1),d1
move.l d0,(a4)
move.w d1,4(a4)
subq.w #1,d1
addq.l #1,d1 ;128KB support for sample endptr
lsl.l #2,d0 ;clear remainder.
move.l d0,P61_oscptr(a5)
move.w d7,P61_oscptrrem(a5) ;clear remainder.
lsl.l #3,d1
add.l d0,d1
move.l d1,P61_oscptrWrap(a5) ;wrap endptr for compare.
endc
; move P61_Period(a5),(a4)
; subq.l #6,a4
move P61_Period(a5),6(a4) ;bugfix from P6108+
ifne copdma
move.l p61_DMApokeAddr(PC),a0
move.b P61_dma+1-P61_cn(a3),(a0) ;keep updated.
endc
ifeq copdma&nowaveforms ;both must be on to skip int.
ifeq p61system ;int starter.
lea P61_dmason(pc),a1
move.l P61_vektori(pc),a0
move.l a1,(a0)
move.b #$f0,$bfd600
move.b #$01,$bfd700
move.b #$19,$bfdf00
else
move #1,P61_server-P61_cn(a3)
move.l P61_craddr+4(pc),a1
move.b #$f0,(a1)
move.b #1,$100(a1)
endc
endc
bra.w P61_contfxdone
endc
ifne P61_rt
P61_retrig:
subq #1,P61_RetrigCount(a5)
bne.w P61_contfxdone
move P61_DMABit(a5),d0
move d0,$96-C(a6)
or d0,P61_dma-P61_cn(a3)
ifne nowaveforms
or d0,P61_NewDMA-P61_cn(a3) ;no interrupt needed, done next frame.
endc
move.l P61_Sample(a5),a1
ifeq oscillo
move.l (a1)+,(a4)
move (a1),4(a4)
else
;; --- wohoo oscilloscope ptrs ---
moveq #0,d1
move.l (a1)+,d0
move (a1),d1
move.l d0,(a4)
move.w d1,4(a4)
subq.w #1,d1
addq.l #1,d1 ;128KB support for sample endptr
lsl.l #2,d0 ;clear remainder.
move.l d0,P61_oscptr(a5)
move.w d7,P61_oscptrrem(a5) ;clear remainder.
lsl.l #3,d1
add.l d0,d1
move.l d1,P61_oscptrWrap(a5) ;wrap endptr for compare.
endc
ifne copdma
move.l p61_DMApokeAddr(PC),a0
move.b P61_dma+1-P61_cn(a3),(a0) ;keep updated.
endc
ifeq copdma&nowaveforms ;both must be on to skip int.
ifeq p61system ;int starter.
lea P61_dmason(pc),a1
move.l P61_vektori(pc),a0
move.l a1,(a0)
move.b #$f0,$bfd600
move.b #$01,$bfd700
move.b #$19,$bfdf00
else
move #1,P61_server-P61_cn(a3)
move.l P61_craddr+4(pc),a1
move.b #$f0,(a1)
move.b #1,$100(a1)
endc
endc
moveq #$f,d0
and.b P61_Info(a5),d0
move d0,P61_RetrigCount(a5)
bra.w P61_contfxdone
endc
ifne P61_arp
P61_arplist:
dc.b 0,1,-1,0,1,-1,0,1,-1,0,1,-1,0,1,-1,0
dc.b 1,-1,0,1,-1,0,1,-1,0,1,-1,0,1,-1,0,1
P61_arpeggio:
move (a3),d0
move.b P61_arplist(pc,d0),d0
beq.b .arp0
bmi.b .arp1
move.b P61_Info(a5),d0
lsr #4,d0
bra.b .arp3
.arp0:
move P61_Note(a5),d0
move P61_periods-P61_cn(a3,d0),6(a4)
bra.w P61_contfxdone
.arp1:
moveq #$f,d0
and.b P61_Info(a5),d0
.arp3:
add d0,d0
add P61_Note(a5),d0
move P61_periods-P61_cn(a3,d0),6(a4)
bra.w P61_contfxdone
endc
;; --- period table move to before P61_cn ---
ifne P61_vs
P61_volslide:
move.b P61_Info(a5),d0
sub.b d0,P61_Volume+1(a5)
bpl.b .test
move d7,P61_Volume(a5)
ifeq p61fade
move d7,8(a4)
else
move d7,P61_Shadow(a5)
endc
bra.w P61_contfxdone
.test:
moveq #64,d0
cmp P61_Volume(a5),d0
bge.b .ncs
move d0,P61_Volume(a5)
ifeq p61fade
move d0,8(a4)
else
move d0,P61_Shadow(a5)
endc
bra.w P61_contfxdone
.ncs:
ifeq p61fade
move P61_Volume(a5),8(a4)
else
move P61_Volume(a5),P61_Shadow(a5)
endc
bra.w P61_contfxdone
endc
ifne P61_tpvs
P61_tpochvslide:
move.b P61_Info(a5),d0
sub.b d0,P61_Volume+1(a5)
bpl.b .test
move d7,P61_Volume(a5)
ifeq p61fade
move d7,8(a4)
else
move d7,P61_Shadow(a5)
endc
bra.b P61_toneport
.test:
moveq #64,d0
cmp P61_Volume(a5),d0
bge.b .ncs
move d0,P61_Volume(a5)
.ncs:
ifeq p61fade
move P61_Volume(a5),8(a4)
else
move P61_Volume(a5),P61_Shadow(a5)
endc
endc
ifne P61_tp
P61_toneport:
move P61_ToPeriod(a5),d0
beq.w P61_contfxdone
move P61_TPSpeed(a5),d1
cmp P61_Period(a5),d0
blt.b .topoup
add d1,P61_Period(a5)
cmp P61_Period(a5),d0
bgt.b .setper
move d0,P61_Period(a5)
move d7,P61_ToPeriod(a5)
move d0,6(a4)
bra.b P61_contfxdone
.topoup:
sub d1,P61_Period(a5)
cmp P61_Period(a5),d0
blt.b .setper
move d0,P61_Period(a5)
move d7,P61_ToPeriod(a5)
.setper:
move P61_Period(a5),6(a4)
else
nop
endc
bra.w P61_contfxdone
ifne P61_pu
P61_portup:
moveq #0,d0
move.b P61_Info(a5),d0
ifne use1Fx
cmp.b #$f0,d0
bhs.b P61_contfxdone
endc
sub d0,P61_Period(a5)
moveq #113,d0
cmp P61_Period(a5),d0
ble.b .skip
move d0,P61_Period(a5)
move d0,6(a4)
bra.b P61_contfxdone
.skip:
move P61_Period(a5),6(a4)
bra.w P61_contfxdone
endc
ifne P61_pd
P61_portdwn:
moveq #0,d0
move.b P61_Info(a5),d0
add d0,P61_Period(a5)
cmp #856,P61_Period(a5) ;max period=6.95 (7) scanlines per two samples.
ble.b .skip
move #856,d0
move d0,P61_Period(a5)
move d0,6(a4)
bra.b P61_contfxdone
.skip:
move P61_Period(a5),6(a4)
; bra.w P61_contfxdone
endc
********** MainFX returns here from all fx **********
P61_contfxdone:
ifne P61_il
bsr.w P61_funk2
endc
lea Channel_Block_Size(a5),a5
lea Custom_Block_Size(a4),a4
dbf d5,P61_lopas
;; --- splitchans or normal decrunch ---
ifeq split4
cmp P61_speed2(PC),d4 ;'decrunch frame'? (1 before playtime)
bne.w P61_ret2
P61_preplay2:
.pr: ifle (channels-splitchans)
printt "splitchans >= channels! Must be less."
else
moveq #(channels-splitchans)-1,d5 ;do preplay "first" half
lea P61_temp0(pc),a5
bra.w P61_preplay
endc
else ;split4
;; --- split4 decrunch ---
;Copies relevant chandata from a0 to a5
CHANCPY: macro
movem.l (a0),d0-d4
movem.l d0-d4,(a5)
ifne P61_ft
move.l P61_Volume(a0),P61_Volume(a5) ;vol+ft
else
move.w P61_Volume(a0),P61_Volume(a5) ;vol
endc
ifne P61_sof
move.w P61_Offset(a0),P61_Offset(a5)
endc
ifne P61_il
move.l P61_Wave(a0),P61_Wave(a5)
endc
endm
P61_split4:
move.w P61_speed2(PC),d5
cmp.w d5,d4
beq.b .pr2
subq.w #1,d5
cmp.w d5,d4
beq.b .pr1
subq.w #1,d5
cmp.w d5,d4
bne.w P61_ret2 ;last decrunchframe is in playtime
.pr0:
lea P61_temp0copy(PC),a5 ;dst
lea P61_temp0(PC),a0 ;src
CHANCPY
bra.w P61_preplay ;decrunches to copy
.pr1:
ifgt channels-1
lea P61_temp1copy(PC),a5 ;dst
lea P61_temp1(PC),a0 ;src
CHANCPY
bra.w P61_preplay ;decrunches to copy
else
rts
endc
.pr2:
lea P61_temp0copy(PC),a0 ;src
lea P61_temp0(PC),a5 ;dst
CHANCPY
ifgt channels-1
lea P61_temp1copy(PC),a0 ;src
lea P61_temp1(PC),a5 ;dst
CHANCPY
endc
ifgt channels-2
lea P61_temp2(PC),a5 ;...and decrunch this chan to normal
bra.w P61_preplay
else
rts
endc
endc ;if split4
********** My Jump Table **********
P61_MyJpt:;jump table,%x1111xxx,%x111xxxx,%x11xxxxx=note,cmd,all - else empty
; REPT 12
jmp P61_all(PC)
jmp P61_all2(PC)
jmp P61_all(PC)
jmp P61_all2(PC)
jmp P61_all(PC)
jmp P61_all2(PC)
jmp P61_all(PC)
jmp P61_all2(PC)
jmp P61_all(PC)
jmp P61_all2(PC)
jmp P61_all(PC)
jmp P61_all2(PC)
jmp P61_all(PC)
jmp P61_all2(PC)
jmp P61_all(PC)
jmp P61_all2(PC)
jmp P61_all(PC)
jmp P61_all2(PC)
jmp P61_all(PC)
jmp P61_all2(PC)
jmp P61_all(PC)
jmp P61_all2(PC)
jmp P61_all(PC)
jmp P61_all2(PC)
; ENDR
jmp P61_cmd(PC)
jmp P61_cmd2(PC)
jmp P61_cmd(PC)
jmp P61_cmd2(PC)
jmp P61_noote(PC)
jmp P61_note2(PC)
jmp P61_empty(PC)
jmp P61_empty2(PC)
; REPT 12
jmp P61_allS(PC)
jmp P61_all2S(PC)
jmp P61_allS(PC)
jmp P61_all2S(PC)
jmp P61_allS(PC)
jmp P61_all2S(PC)
jmp P61_allS(PC)
jmp P61_all2S(PC)
jmp P61_allS(PC)
jmp P61_all2S(PC)
jmp P61_allS(PC)
jmp P61_all2S(PC)
jmp P61_allS(PC)
jmp P61_all2S(PC)
jmp P61_allS(PC)
jmp P61_all2S(PC)
jmp P61_allS(PC)
jmp P61_all2S(PC)
jmp P61_allS(PC)
jmp P61_all2S(PC)
jmp P61_allS(PC)
jmp P61_all2S(PC)
jmp P61_allS(PC)
jmp P61_all2S(PC)
; ENDR
jmp P61_cmdS(PC)
jmp P61_cmd2S(PC)
jmp P61_cmdS(PC)
jmp P61_cmd2S(PC)
jmp P61_noteS(PC)
jmp P61_note2S(PC)
jmp P61_emptyS(PC)
; jmp P61_empty2S(PC)
********** END OF MYJPT **********
P61_empty2S:
move d7,(a5)+
move.b d7,(a5)+
;; --- alt exit ---
P61_proccompS:
move.b (a0)+,d1
move.b d1,d0
add.b d1,d1
bpl.b P61_permexit ;bit 6 was 0
;; --- stay in chan, repeat ---
.b6set: bcs.b .bit16
.bit8: move.b d7,(a5)
subq.l #3,a5 ;stay tuned to this channel!
and.w d4,d0 ;nec to clr hi byte
move.b d0,P61_TempLen+1(a5)
move.b (a0)+,d0 ;hi word is clear. (constant)
move.l a0,P61_ChaPos(a5) ;dupe of above
sub.l d0,a0 ;this 'repeats' same but doesnt update!
.jedi1: move.b (a0)+,d0 ;used in .empty etc
moveq #-8,d1 ;if sign, new P61_pack, retaddr-2
and.b d0,d1
jmp P61_MyJpt+256(PC,d1.w)
.bit16: move.b d7,(a5)
subq.l #3,a5
and.w d4,d0 ;nec to clr hi byte
move.b d0,P61_TempLen+1(a5)
ifeq opt020
move.b (a0)+,d0 ;hi word is clear. (constant)
lsl #8,d0
move.b (a0)+,d0
else
move.w (a0)+,d0 ;(potentially) odd-address word-read.
endc
move.l a0,P61_ChaPos(a5) ;dupe of above
sub.l d0,a0 ;this 'repeats' same but doesnt update!
.jedi2: move.b (a0)+,d0 ;used in .empty etc
moveq #-8,d1 ;if sign, new P61_pack, retaddr-2
and.b d0,d1
jmp P61_MyJpt+256(PC,d1.w)
P61_Take:
tst.b P61_TempLen+1(a5) ;faster than subq + addq!
bne.b P61_takeone
P61_TakeNorm: ;this is more frequent than takeone
move.l P61_ChaPos(a5),a0 ;dflt - if takenorm
move.b (a0)+,d0 ;used in .empty etc
moveq #-8,d1 ;if sign, new P61_pack, retaddr-2
and.b d0,d1
jmp P61_MyJpt+256+4(PC,d1.w) ;first call can be this...
P61_takeone:
subq.b #1,P61_TempLen+1(a5)
move.l P61_TempPos(a5),a0
P61_Jedi: ;temp/repeat. copy below proccompS.
move.b (a0)+,d0 ;used in .empty etc
moveq #-8,d1 ;if sign, new P61_pack, retaddr-2
and.b d0,d1
jmp P61_MyJpt+256(PC,d1.w) ;but rest is always this
;; --- alt (perm) exit --- ;does not affect maxtime.
P61_permexit:
move.b d0,(a5)
move.l a0,P61_ChaPos-3(a5)
bra.w P61_permdko
ifne P61_pde
P61_return:
rts
endc
********** Replay, Decrunch notes **********
;This routine is optimized absolutely and gets the Henrik-stamp of approval.
;d3,a4,a6 are usable ... if you can find a use for them.
ifne P61_pde
P61_preplay:
tst P61_pdflag-P61_cn(a3)
bne.b P61_return
else
P61_preplay:
endc
;; --- The hipper wilderbeest run gnu linux at midnight! ---
ifne P61_ft
lea (P61_samples-16)-P61_cn(a3),a2
endc
moveq #$3f,d4
moveq #-$10,d6 ;intelligent on/off-flag
moveq #0,d0 ;clear hi word, never dirtied below.
;; --- decrunch loop ---
P61_loaps:
;remember... code with BRAS in it is PANTS!
;As female coders know, they are often quite unnecessary.
ifne P61_pl ;make some backup copy of chanparams
lea P61_TData(a5),a1
move 2(a5),(a1)+
move.l P61_ChaPos(a5),(a1)+
move.l P61_TempPos(a5),(a1)+
move P61_TempLen(a5),(a1)
endc
moveq #-65,d1 ;%10111111 const
and.b P61_Pack(a5),d1
add.b d1,d1 ;sign in carry
beq.b P61_Take ;6 lsb bits 0?
bcc.b P61_nodko
addq #3,a5
subq.b #1,(a5)
bra.w P61_permdko
P61_nodko:
move.b d7,P61_OnOff+1(a5)
subq.b #1,P61_Pack(a5)
addq #3,a5
bra.w P61_koto
;; --- routines ---
P61_empty:
move d7,(a5)+
move.b d7,(a5)+
bra.w P61_ex
P61_all:
move.b d0,(a5)+ ;but this can't...
ifeq opt020
move.b (a0)+,(a5)+
move.b (a0)+,(a5)+
else
move (a0)+,(a5)+
endc
bra.w P61_ex
P61_cmd:
moveq #$f,d1
and d0,d1
move d1,(a5)+
move.b (a0)+,(a5)+ ;join common endcontinues...
bra.w P61_ex
P61_noote:
moveq #7,d1
and d0,d1
lsl #8,d1
move.b (a0)+,d1
lsl #4,d1
move d1,(a5)+
move.b d7,(a5)+
bra.w P61_ex
;; --- copyS ---
P61_emptyS:
move d7,(a5)+
move.b d7,(a5)+
bra.w P61_exS
P61_allS:
move.b d0,(a5)+ ;but this can't...
ifeq opt020
move.b (a0)+,(a5)+
move.b (a0)+,(a5)+
else
move (a0)+,(a5)+
endc
bra.b P61_exS
P61_cmdS:
moveq #$f,d1
and d0,d1
move d1,(a5)+
move.b (a0)+,(a5)+ ;join common endcontinues...
bra.b P61_exS
;; --- ---
********** copy, perm exit **********
P61_empty2:
move d7,(a5)+
move.b d7,(a5)+
move.l a0,P61_ChaPos-3(a5)
bra.b P61_permdko
P61_all2:
move.b d0,(a5)+
ifeq opt020
move.b (a0)+,(a5)+
move.b (a0)+,(a5)+
else
move (a0)+,(a5)+
endc
move.l a0,P61_ChaPos-3(a5)
bra.b P61_permdko
P61_cmd2:
moveq #$f,d1
and d0,d1
move d1,(a5)+
move.b (a0)+,(a5)+
move.l a0,P61_ChaPos-3(a5)
bra.b P61_permdko
P61_note2:
moveq #7,d1
and d0,d1
lsl #8,d1
move.b (a0)+,d1
lsl #4,d1
move d1,(a5)+
move.b d7,(a5)+
move.l a0,P61_ChaPos-3(a5)
bra.b P61_permdko
;; --- copyS, diff exit ---
P61_note2S:
moveq #7,d1
and d0,d1
lsl #8,d1
move.b (a0)+,d1
lsl #4,d1
move d1,(a5)+
move.b d7,(a5)+
bra.w P61_proccompS
P61_all2S:
move.b d0,(a5)+
ifeq opt020
move.b (a0)+,(a5)+
move.b (a0)+,(a5)+
else
move (a0)+,(a5)+
endc
bra.w P61_proccompS
P61_cmd2S:
moveq #$f,d1
and d0,d1
move d1,(a5)+
move.b (a0)+,(a5)+
bra.w P61_proccompS
;; --- ---
P61_noteS:
moveq #7,d1
and d0,d1
lsl #8,d1
move.b (a0)+,d1
lsl #4,d1
move d1,(a5)+
move.b d7,(a5)+
;; --- norm (temp) exit ---
;This exit is called when you have max rastertime.
P61_exS:
move.b (a0)+,(a5)
P61_ex:
move.l a0,P61_TempPos-3(a5)
P61_permdko:
move.w d6,P61_OnOff-3(a5) ;was byte size in word var...
move -3(a5),d0
and #$1f0,d0
beq.b .koto
ifne P61_ft
lea (a2,d0),a1 ;this is not the same a2 as the fix.
else
lea (P61_samples-16)-P61_cn(a3),a1
add d0,a1
endc
move.l a1,P61_Sample-3(a5)
ifne P61_ft
move.l P61_SampleVolume(a1),P61_Volume-3(a5)
else
move P61_SampleVolume(a1),P61_Volume-3(a5)
endc
ifne P61_il
move.l P61_RepeatOffset(a1),P61_Wave-3(a5)
endc
ifne P61_sof
move d7,P61_Offset-3(a5)
endc
.koto:
P61_koto:
ifeq split4 ;split4 means only do once.
lea Channel_Block_Size-3(a5),a5
dbf d5,P61_loaps
endc
P61_ret2:
rts
********** END OF LOAPS LOOP **********
********** here comes another :) **********
ifeq dupedec
P61_playtime:
addq.w #1,(a3) ;inc framecount past _Speed for detection+reset later
ifeq split4
ifgt splitchans
moveq #splitchans-1,d5 ;channels split off?(optimization flag)
lea P61_temp0+Channel_Block_Size*(channels-splitchans)(PC),a5
bsr P61_preplay
endc ;if splitchans
else
ifgt channels-3
lea P61_temp3(PC),a5
bsr P61_preplay
endc
endc ;if split4.
endc ;dupedec=0 ends here
ifgt (splitchans+split4) ;one of these must be on for dupe-code
ifne dupedec ;dupedec...you asked for it...
********** My Jump Table **********
P61_MyJptB:;jump table,%x1111xxx,%x111xxxx,%x11xxxxx=note,cmd,all - else empty
; REPT 12
jmp P61_allB(PC)
jmp P61_all2B(PC)
jmp P61_allB(PC)
jmp P61_all2B(PC)
jmp P61_allB(PC)
jmp P61_all2B(PC)
jmp P61_allB(PC)
jmp P61_all2B(PC)
jmp P61_allB(PC)
jmp P61_all2B(PC)
jmp P61_allB(PC)
jmp P61_all2B(PC)
jmp P61_allB(PC)
jmp P61_all2B(PC)
jmp P61_allB(PC)
jmp P61_all2B(PC)
jmp P61_allB(PC)
jmp P61_all2B(PC)
jmp P61_allB(PC)
jmp P61_all2B(PC)
jmp P61_allB(PC)
jmp P61_all2B(PC)
jmp P61_allB(PC)
jmp P61_all2B(PC)
; ENDR
jmp P61_cmdB(PC)
jmp P61_cmd2B(PC)
jmp P61_cmdB(PC)
jmp P61_cmd2B(PC)
jmp P61_nooteB(PC)
jmp P61_note2B(PC)
jmp P61_emptyB(PC)
jmp P61_empty2B(PC)
; REPT 12
jmp P61_allSB(PC)
jmp P61_all2SB(PC)
jmp P61_allSB(PC)
jmp P61_all2SB(PC)
jmp P61_allSB(PC)
jmp P61_all2SB(PC)
jmp P61_allSB(PC)
jmp P61_all2SB(PC)
jmp P61_allSB(PC)
jmp P61_all2SB(PC)
jmp P61_allSB(PC)
jmp P61_all2SB(PC)
jmp P61_allSB(PC)
jmp P61_all2SB(PC)
jmp P61_allSB(PC)
jmp P61_all2SB(PC)
jmp P61_allSB(PC)
jmp P61_all2SB(PC)
jmp P61_allSB(PC)
jmp P61_all2SB(PC)
jmp P61_allSB(PC)
jmp P61_all2SB(PC)
jmp P61_allSB(PC)
jmp P61_all2SB(PC)
; ENDR
jmp P61_cmdSB(PC)
jmp P61_cmd2SB(PC)
jmp P61_cmdSB(PC)
jmp P61_cmd2SB(PC)
jmp P61_noteSB(PC)
jmp P61_note2SB(PC)
jmp P61_emptySB(PC)
jmp P61_empty2SB(PC)
********** END OF MYJPT **********
P61_empty2SB:
move d7,(a5)+
move.b d7,(a5)+
;; --- alt exit ---
P61_proccompSB:
move.b (a0)+,d1
move.b d1,d0
add.b d1,d1
bpl.b P61_permexitB ;bit 6 was 0
;; --- stay in chan, repeat ---
.b6setB:bcs.b .bit16B
.bit8B: move.b d7,(a5)
subq.l #3,a5 ;stay tuned to this channel!
and.w d4,d0 ;nec to clr hi byte
move.b d0,P61_TempLen+1(a5)
move.b (a0)+,d0 ;hi word is clear. (constant)
move.l a0,P61_ChaPos(a5) ;dupe of above
sub.l d0,a0 ;this 'repeats' same but doesnt update!
.jedi1B:move.b (a0)+,d0 ;used in .empty etc
moveq #-8,d1 ;if sign, new P61_pack, retaddr-2
and.b d0,d1
jmp P61_MyJptB+256(PC,d1.w)
.bit16B:move.b d7,(a5)
subq.l #3,a5
and.w d4,d0 ;nec to clr hi byte
move.b d0,P61_TempLen+1(a5)
ifeq opt020
move.b (a0)+,d0 ;hi word is clear. (constant)
lsl #8,d0
move.b (a0)+,d0
else
move.w (a0)+,d0 ;(potentially) odd-address word-read.
endc
move.l a0,P61_ChaPos(a5) ;dupe of above
sub.l d0,a0 ;this 'repeats' same but doesnt update!
.jedi2B:move.b (a0)+,d0 ;used in .empty etc
moveq #-8,d1 ;if sign, new P61_pack, retaddr-2
and.b d0,d1
jmp P61_MyJptB+256(PC,d1.w)
P61_TakeB:
tst.b P61_TempLen+1(a5) ;faster than sub + add!
bne.b P61_takeoneB
P61_TakeNormB: ;this is more frequent than takeone
move.l P61_ChaPos(a5),a0 ;dflt - if takenorm
move.b (a0)+,d0 ;used in .empty etc
moveq #-8,d1 ;if sign, new P61_pack, retaddr-2
and.b d0,d1
jmp P61_MyJptB+256+4(PC,d1.w) ;first call can be this...
P61_takeoneB:
subq.b #1,P61_TempLen+1(a5)
move.l P61_TempPos(a5),a0
P61_JediB: ;temp/repeat. copy below proccompS.
move.b (a0)+,d0 ;used in .empty etc
moveq #-8,d1 ;if sign, new P61_pack, retaddr-2
and.b d0,d1
jmp P61_MyJptB+256(PC,d1.w) ;but rest is always this
;; --- alt (perm) exit --- ;does not affect maxtime.
P61_permexitB:
move.b d0,(a5)
move.l a0,P61_ChaPos-3(a5)
bra.w P61_permdkoB
********** Replay, Decrunch notes **********
;This routine is optimized absolutely and gets the Henrik-stamp of approval.
;d3,a4,a6 are usable ... if you can find a use for them.
P61_playtime:
addq.w #1,(a3) ;is wrong now, but never used below.
ifne split4
ifgt channels-3
lea P61_temp3(PC),a5
else
bra.w P61_playtimeCont
endc ;ifgt channels-3
else ;not split4, splitchans.
moveq #splitchans-1,d5 ;channels split off?(optimization flag)
lea P61_temp0+Channel_Block_Size*(channels-splitchans)(PC),a5
endc
ifne P61_pde
P61_preplayB:
tst P61_pdflag-P61_cn(a3)
bne.w P61_return
else
P61_preplayB:
endc
;; --- The hipper wilderbeest run gnu linux at midnight! ---
moveq #$3f,d4
moveq #-$10,d6 ;intelligent on/off-flag
moveq #0,d0 ;clear hi word, never dirtied below.
;; --- decrunch loop ---
P61_loapsB:
;remember... code with BRAS in it is PANTS!
;As female coders know, they are often quite unnecessary.
ifne P61_pl ;make some backup copy of chanparams
lea P61_TData(a5),a1
move 2(a5),(a1)+
move.l P61_ChaPos(a5),(a1)+
move.l P61_TempPos(a5),(a1)+
move P61_TempLen(a5),(a1)
endc
moveq #-65,d1 ;%10111111 const
and.b P61_Pack(a5),d1
add.b d1,d1 ;sign in carry
beq.b P61_TakeB ;6 lsb bits 0?
bcc.b P61_nodkoB
addq #3,a5
subq.b #1,(a5)
bra.w P61_permdkoB
P61_nodkoB:
move.b d7,P61_OnOff+1(a5)
subq.b #1,P61_Pack(a5)
addq #3,a5
bra.w P61_kotoB
;; --- routines ---
P61_emptyB:
move d7,(a5)+
move.b d7,(a5)+
bra.w P61_exB
P61_allB:
move.b d0,(a5)+ ;but this can't...
ifeq opt020
move.b (a0)+,(a5)+
move.b (a0)+,(a5)+
else
move (a0)+,(a5)+
endc
bra.w P61_exB
P61_cmdB:
moveq #$f,d1
and d0,d1
move d1,(a5)+
move.b (a0)+,(a5)+ ;join common endcontinues...
bra.w P61_exB
P61_nooteB:
moveq #7,d1
and d0,d1
lsl #8,d1
move.b (a0)+,d1
lsl #4,d1
move d1,(a5)+
move.b d7,(a5)+
bra.w P61_exB
;; --- copyS ---
P61_emptySB:
move d7,(a5)+
move.b d7,(a5)+
bra.w P61_exSB
P61_allSB:
move.b d0,(a5)+ ;but this can't...
ifeq opt020
move.b (a0)+,(a5)+
move.b (a0)+,(a5)+
else
move (a0)+,(a5)+
endc
bra.b P61_exSB
P61_cmdSB:
moveq #$f,d1
and d0,d1
move d1,(a5)+
move.b (a0)+,(a5)+ ;join common endcontinues...
bra.b P61_exSB
;; --- ---
********** copy, perm exit **********
P61_empty2B:
move d7,(a5)+
move.b d7,(a5)+
move.l a0,P61_ChaPos-3(a5)
bra.b P61_permdkoB
P61_all2B:
move.b d0,(a5)+
ifeq opt020
move.b (a0)+,(a5)+
move.b (a0)+,(a5)+
else
move (a0)+,(a5)+
endc
move.l a0,P61_ChaPos-3(a5)
bra.b P61_permdkoB
P61_cmd2B:
moveq #$f,d1
and d0,d1
move d1,(a5)+
move.b (a0)+,(a5)+
move.l a0,P61_ChaPos-3(a5)
bra.b P61_permdkoB
P61_note2B:
moveq #7,d1
and d0,d1
lsl #8,d1
move.b (a0)+,d1
lsl #4,d1
move d1,(a5)+
move.b d7,(a5)+
move.l a0,P61_ChaPos-3(a5)
bra.b P61_permdkoB
;; --- copyS, diff exit ---
P61_note2SB:
moveq #7,d1
and d0,d1
lsl #8,d1
move.b (a0)+,d1
lsl #4,d1
move d1,(a5)+
move.b d7,(a5)+
bra.w P61_proccompSB
P61_all2SB:
move.b d0,(a5)+
ifeq opt020
move.b (a0)+,(a5)+
move.b (a0)+,(a5)+
else
move (a0)+,(a5)+
endc
bra.w P61_proccompSB
P61_cmd2SB:
moveq #$f,d1
and d0,d1
move d1,(a5)+
move.b (a0)+,(a5)+
bra.w P61_proccompSB
;; --- ---
P61_noteSB:
moveq #7,d1
and d0,d1
lsl #8,d1
move.b (a0)+,d1
lsl #4,d1
move d1,(a5)+
move.b d7,(a5)+
;; --- norm (temp) exit ---
;This exit is called when you have max rastertime.
P61_exSB:
move.b (a0)+,(a5)
P61_exB:
move.l a0,P61_TempPos-3(a5)
P61_permdkoB:
move.w d6,P61_OnOff-3(a5) ;was byte size in word var...
move -3(a5),d0
and #$1f0,d0
beq.b .kotoB
lea (P61_samples-16)-P61_cn(a3),a1
add d0,a1
move.l a1,P61_Sample-3(a5)
ifne P61_ft
move.l P61_SampleVolume(a1),P61_Volume-3(a5)
else
move P61_SampleVolume(a1),P61_Volume-3(a5)
endc
ifne P61_il
move.l P61_RepeatOffset(a1),P61_Wave-3(a5)
endc
ifne P61_sof
move d7,P61_Offset-3(a5)
endc
.kotoB:
P61_kotoB:
ifeq split4 ;split4 means only do once.
lea Channel_Block_Size-3(a5),a5
dbf d5,P61_loapsB
endc
;; --- end of dupedec ---
endc
endc
********** playtime continues **********
P61_playtimeCont:
ifne P61_pde
tst P61_pdelay-P61_cn(a3)
beq.b .djdj
subq #1,P61_pdelay-P61_cn(a3)
bne.w P61_delay
tst P61_speedis1-P61_cn(a3)
bne.w P61_delay
move d7,P61_pdflag-P61_cn(a3)
bra.w P61_delay
.djdj:
move d7,P61_pdflag-P61_cn(a3)
endc
ifne suppF01
tst P61_speedis1-P61_cn(a3)
beq.b .mo
lea P61_temp0(pc),a5
moveq #channels-1,d5
.chl: bsr.w P61_preplay ;then do the remaining from prev frame
ifeq split4 ;split4 means preplay is one-shot. So ext loop.
lea Channel_Block_Size-3(a5),a5
dbf d5,.chl
endc
.mo:
endc ;suppF01
ifeq copdma&nowaveforms ;both must be off to skip int.
ifeq p61system ;main 'new note' int starter.
lea P61_dmason(pc),a1
move.l P61_vektori(pc),a0
move.l a1,(a0)
move.b #$f0,$bfd600 ;496 ticks=11.000677 scanlines,
move.b #$01,$bfd700 ;dmaoff $1.38 scanlines later on 68000.
move.b #$19,$bfdf00 ;With unlucky timing and max period 856
;minimum="$1.38->2"+7+1=10 scanlines.
;With nonlev6 (copdma), "9 scanlines from call" is possible, but only with a
;margin of 51 color clocks. If chansplit/split4 is used, you must add 2
;scanlines decrunch time before dmaclr occurs. So 11 is good.
else
move #1,P61_server-P61_cn(a3)
move.l P61_craddr+4(pc),a1
move.b #$f0,(a1)
move.b #1,$100(a1)
endc
endc
moveq #0,d4 ;clr dmamask accumulator
moveq #channels-1,d5
lea P61_temp0(pc),a5
bra.w P61_loscont ;I'd trade a bra for 2 Leias any day!
;; --- start of jtab (jumptable) ---
ifne p61bigjtab
rept 16*15
dc.w P61_nocha-.j
endr
endc
dc P61_fxdone-.j ;$0xx
ifne use1Fx
dc P61_Trigger-.j
else
dc P61_fxdone-.j
endc
dc P61_fxdone-.j
ifne P61_tp
dc P61_settoneport-.j
else
dc P61_fxdone-.j
endc
ifne P61_vib ;$4xx
dc P61_vibrato-.j
else
dc P61_fxdone-.j
endc
ifne P61_tpvs
dc P61_toponochange-.j
else
dc P61_fxdone-.j
endc
dc P61_fxdone-.j
ifne P61_tre
dc P61_settremo-.j
else
dc P61_fxdone-.j
endc
dc P61_fxdone-.j ;$8xx
ifne P61_sof
dc P61_sampleoffse-.j
else
dc P61_fxdone-.j
endc
dc P61_fxdone-.j
ifne P61_pj
dc P61_posjmp-.j
else
dc P61_fxdone-.j
endc
ifne P61_vl ;$Cxx
dc P61_volum-.j
else
dc P61_fxdone-.j
endc
ifne P61_pb
dc P61_pattbreak-.j
else
dc P61_fxdone-.j
endc
ifne P61_ec
dc P61_ecommands-.j
else
dc P61_fxdone-.j
endc
ifne P61_sd ;Fxx
dc P61_cspeed-.j
else
dc P61_fxdone-.j
endc
.j:
P61_jtab:
;; --- end of table ---
P61_los:
lea Custom_Block_Size(a4),a4
lea Channel_Block_Size(a5),a5
P61_loscont:
move P61_OnOff(a5),d0 ;$ff00/$ffff? if off, will goto nocha.
ifeq p61bigjtab
tst.b d0
beq.s P61_nocha
endc
or (a5),d0
add d0,d0 ;->$fe00..$fffe (if big jtab)
move P61_jtab(PC,d0),d0
jmp P61_jtab(PC,d0)
P61_fxdone: ;this sets dma and paula values
moveq #$7e,d0
and.b (a5),d0
beq.b P61_nocha
ifne P61_vib
move.b d7,P61_VibPos(a5)
endc
ifne P61_tre
move.b d7,P61_TrePos(a5)
endc
ifne P61_ft
add P61_Fine(a5),d0
endc
move d0,P61_Note(a5)
move P61_periods-P61_cn(a3,d0),P61_Period(a5)
P61_zample: ;also direct target for finetune retrig
ifne P61_sof
tst P61_Offset(a5)
bne.w P61_pek
endc
;; --- check DMA-mask for pan/echo samplestarts, modify it, mix. ---
; bsr P61_Synth ;synth/pan/echo cpu-mix routine. Not done yet.
;; --- modify below code to not touch synth/pan/echo fixchans ---
or P61_DMABit(a5),d4 ;accumulate channels touched
move.l P61_Sample(a5),a1 ;skipped if nocha
ifeq oscillo
move.l (a1)+,(a4)
move (a1),4(a4)
else
;; --- wohoo oscilloscope ptrs ---
moveq #0,d1
move.l (a1)+,d0
move (a1),d1
move.l d0,(a4)
move.w d1,4(a4)
subq.w #1,d1
addq.l #1,d1 ;128KB support for sample endptr
lsl.l #2,d0 ;clear remainder.
move.l d0,P61_oscptr(a5)
move.w d7,P61_oscptrrem(a5) ;clear remainder.
lsl.l #3,d1
add.l d0,d1
move.l d1,P61_oscptrWrap(a5) ;wrap endptr for compare.
endc ;oscillo
P61_nocha:
ifeq p61fade
move.l P61_Period(a5),6(a4)
else
move P61_Period(a5),6(a4)
move P61_Volume(a5),P61_Shadow(a5)
endc
P61_skip:
ifne P61_il
bsr.w P61_funk2
endc
DBF d5,P61_los
P61_chansdone:
ifne clraudxdat
move.w d4,d5
lsl.w #3,d5
add.b d5,d5
bpl.b .noch3
move.w d7,$da-C(A6) ;clear AUDxDAT
.noch3: add.b d5,d5
bpl.b .noch2
move.w d7,$ca-C(A6) ;clear AUDxDAT
.noch2: add.b d5,d5
bpl.b .noch1
move.w d7,$ba-C(A6) ;clear AUDxDAT
.noch1: add.b d5,d5
bpl.b .noch0
move.w d7,$aa-C(A6) ;clear AUDxDAT
.noch0:
endc
move d4,$96-C(a6) ;DMAclear - changed to not be written 4 times
ifne visuctrs
lea P61_visuctr0+channels*2(PC),a0
moveq #channels-1,d5
.visul: subq.w #2,a0
btst d5,d4
beq.s .noctr0
move.w d7,(a0)
.noctr0:
dbf d5,.visul
endc
ifne copdma
move.l p61_DMApokeAddr(PC),a0
move.b d4,(a0) ;only the low byte is poked, allowing other dma
endc
move.b d4,P61_dma+1-P61_cn(a3)
;; --- non-rolled over code --- compatible with F01.
ifne suppF01 ;moved to here in P6110.
ifne nowaveforms
move.b d4,P61_NewDMA+1-P61_cn(a3) ;or set by fx
endc
move.w d7,(a3) ;clr p61_cn
ifne P61_pl
tst.b P61_plflag+1-P61_cn(a3)
beq.b P61_ohittaa
lea P61_temp0(pc),a1
lea P61_looppos(pc),a0
moveq #channels-1,d0
.talt:
move.b 1(a0),3(a1)
addq.l #2,a0
move.l (a0)+,P61_ChaPos(a1)
move.l (a0)+,P61_TempPos(a1)
move (a0)+,P61_TempLen(a1)
lea Channel_Block_Size(a1),a1
dbf d0,.talt
move P61_plrowpos(pc),P61_rowpos-P61_cn(a3)
move.b d7,P61_plflag+1-P61_cn(a3)
moveq #63,d0
sub P61_rowpos-P61_cn(a3),d0
move d0,P61_CRow-P61_cn(a3)
rts
P61_ohittaa: ;nextrow
endc
subq #1,P61_rowpos-P61_cn(a3) ;next pattern-step
bpl.b P61_nonewpatt
P61_nextpattern:
ifne P61_pl
move d7,P61_plflag-P61_cn(a3)
endc
move.l P61_patternbase(pc),a0
moveq #63,d0
move d0,P61_rowpos-P61_cn(a3)
move d7,P61_CRow-P61_cn(a3)
move.l P61_spos(pc),a1
addq #1,P61_Pos-P61_cn(a3)
move.b (a1)+,d0
bpl.b P61_dk
move.l P61_possibase(pc),a1
move.b (a1)+,d0
move d7,P61_Pos-P61_cn(a3)
P61_dk:
move.l a1,P61_spos-P61_cn(a3)
move d0,P61_Patt-P61_cn(a3)
lsl #3,d0
move.l P61_positionbase(pc),a1
add.l d0,a1
move.w (a1)+,d0 ;no movem sign-extend... check.
add.l a0,d0
move.l d0,P61_ChaPos+P61_temp0-P61_cn(a3)
moveq #0,d0 ;actually faster than lea (a0,d0.l)
move.w (a1)+,d0 ;for some reason this code doesn't
add.l a0,d0 ;use 'ifgt channels-1' etc. Kept as is.
move.l d0,P61_ChaPos+P61_temp1-P61_cn(a3)
moveq #0,d0
move.w (a1)+,d0
add.l a0,d0
move.l d0,P61_ChaPos+P61_temp2-P61_cn(a3)
moveq #0,d0
move.w (a1)+,d0
add.l a0,d0
move.l d0,P61_ChaPos+P61_temp3-P61_cn(a3)
rts
P61_nonewpatt:
moveq #63,d0
sub P61_rowpos-P61_cn(a3),d0
move d0,P61_CRow-P61_cn(a3)
;; --- end of non-rolled over code ---
endc ;suppF01
rts ;end of P61_playtime.
********** FX routines **********
ifne use1Fx
P61_Trigger:
move.b P61_Info(a5),d0
cmp.b #$f0,d0
blo.w P61_fxdone
move.b d0,P61_PTrig+1-P61_cn(a3)
bra.w P61_fxdone
endc
ifne P61_tp
P61_settoneport:
move.b P61_Info(a5),d0
beq.b P61_toponochange
move.b d0,P61_TPSpeed+1(a5)
P61_toponochange:
moveq #$7e,d0
and.b (a5),d0
beq.w P61_nocha
add P61_Fine(a5),d0
move d0,P61_Note(a5)
move P61_periods-P61_cn(a3,d0),P61_ToPeriod(a5)
bra.w P61_nocha
endc
ifne P61_sof
P61_sampleoffse:
moveq #0,d1
move #$ff00,d1
and 2(a5),d1
bne.b .deq
move P61_LOffset(a5),d1
.deq:
move d1,P61_LOffset(a5)
add d1,P61_Offset(a5)
moveq #$7e,d0
and.b (a5),d0
beq.w P61_nocha
move P61_Offset(a5),d2
add d1,P61_Offset(a5)
move d2,d1
ifne P61_vib
move.b d7,P61_VibPos(a5)
endc
ifne P61_tre
move.b d7,P61_TrePos(a5)
endc
ifne P61_ft
add P61_Fine(a5),d0
endc
move d0,P61_Note(a5)
move P61_periods-P61_cn(a3,d0),P61_Period(a5)
bra.b P61_hup
P61_pek:
moveq #0,d1
move P61_Offset(a5),d1
P61_hup:
or P61_DMABit(a5),d4 ;don't write 4 times, please.
move.l P61_Sample(a5),a1
move.l (a1)+,d0
add.l d1,d0
move.l d0,(a4)
lsr #1,d1
move (a1),d6
sub d1,d6
bpl.b P61_offok
move.l -4(a1),(a4)
moveq #1,d6
P61_offok:
move d6,4(a4)
ifne oscillo
;; --- wohoo oscilloscope ptrs ---
moveq #0,d1
move.w d6,d1
subq.w #1,d1
addq.l #1,d1 ;128KB support for sample endptr
lsl.l #2,d0 ;clear remainder.
move.l d0,P61_oscptr(a5)
move.w d7,P61_oscptrrem(a5) ;clear remainder.
lsl.l #3,d1
add.l d0,d1
move.l d1,P61_oscptrWrap(a5) ;wrap endptr for compare.
endc ;oscillo
bra.w P61_nocha ;continues to where ints etc is handled
endc
ifne P61_vl
P61_volum:
move.b P61_Info(a5),P61_Volume+1(a5)
bra.w P61_fxdone
endc
ifne P61_pj
P61_posjmp:
moveq #0,d0
move.b P61_Info(a5),d0
ifeq optjmp
cmp P61_slen-P61_cn(a3),d0
blo.b .e
moveq #0,d0
endc
.e: move d0,P61_Pos-P61_cn(a3)
add.l P61_possibase(pc),d0
move.l d0,P61_spos-P61_cn(a3)
endc
ifne P61_pb
P61_pattbreak: ;needs to be execd if posjmp, and P61_pj>0.
moveq #64,d0
move d0,P61_rowpos-P61_cn(a3)
move d7,P61_CRow-P61_cn(a3)
P61_Bc: move.l P61_spos(pc),a1
move.l P61_patternbase(pc),a0
addq #1,P61_Pos-P61_cn(a3)
move.b (a1)+,d0
bpl.b P61_dk2
move.l P61_possibase(pc),a1
move.b (a1)+,d0
move d7,P61_Pos-P61_cn(a3)
P61_dk2:
move.l a1,P61_spos-P61_cn(a3)
move.l P61_positionbase(pc),a1
move d0,P61_Patt-P61_cn(a3)
lsl #3,d0
add.l d0,a1
move.w (a1)+,d0
add.l a0,d0
move.l d0,P61_ChaPos+P61_temp0-P61_cn(a3)
moveq #0,d0 ;actually faster than lea (a0,d0.l)
move.w (a1)+,d0
add.l a0,d0
move.l d0,P61_ChaPos+P61_temp1-P61_cn(a3)
moveq #0,d0 ;actually faster than lea (a0,d0.l)
move.w (a1)+,d0
add.l a0,d0
move.l d0,P61_ChaPos+P61_temp2-P61_cn(a3)
moveq #0,d0 ;actually faster than lea (a0,d0.l)
move.w (a1)+,d0
add.l a0,d0
move.l d0,P61_ChaPos+P61_temp3-P61_cn(a3)
bra.w P61_fxdone
endc
ifne P61_vib
P61_vibrato:
move.b P61_Info(a5),d0
beq.w P61_fxdone
move.b d0,d1
move.b P61_VibCmd(a5),d2
and.b #$f,d0
beq.b P61_vibskip
and.b #$f0,d2
or.b d0,d2
P61_vibskip:
and.b #$f0,d1
beq.b P61_vibskip2
and.b #$f,d2
or.b d1,d2
P61_vibskip2:
move.b d2,P61_VibCmd(a5)
bra.w P61_fxdone
endc
ifne P61_tre
P61_settremo:
move.b P61_Info(a5),d0
beq.w P61_fxdone
move.b d0,d1
move.b P61_TreCmd(a5),d2
moveq #$f,d3
and.b d3,d0
beq.b P61_treskip
and.b #$f0,d2
or.b d0,d2
P61_treskip:
and.b #$f0,d1
beq.b P61_treskip2
and.b d3,d2
or.b d1,d2
P61_treskip2:
move.b d2,P61_TreCmd(a5)
bra.w P61_fxdone
endc
ifne P61_ec
P61_ecommands:
move.b P61_Info(a5),d0
and.w #$f0,d0
lsr #3,d0
move P61_etab(pc,d0),d0
jmp P61_etab(pc,d0)
P61_etab:
ifne P61_fi
dc P61_filter-P61_etab
else
dc P61_fxdone-P61_etab
endc
ifne P61_fsu
dc P61_fineup-P61_etab
else
dc P61_fxdone-P61_etab
endc
ifne P61_fsd
dc P61_finedwn-P61_etab
else
dc P61_fxdone-P61_etab
endc
dc P61_fxdone-P61_etab ;e3
dc P61_fxdone-P61_etab ;e4
ifne P61_sft ;e5
dc P61_setfinetune-P61_etab
else
dc P61_fxdone-P61_etab
endc
ifne P61_pl ;e6,patternloop
dc P61_patternloop-P61_etab
else
dc P61_fxdone-P61_etab
endc
dc P61_fxdone-P61_etab ;e7
ifne P61_timing
dc P61_sete8-P61_etab
else
dc P61_fxdone-P61_etab
endc
ifne P61_rt
dc P61_setretrig-P61_etab
else
dc P61_fxdone-P61_etab
endc
ifne P61_fvu
dc P61_finevup-P61_etab
else
dc P61_fxdone-P61_etab
endc
ifne P61_fvd
dc P61_finevdwn-P61_etab
else
dc P61_fxdone-P61_etab
endc
dc P61_fxdone-P61_etab
ifne P61_nd
dc P61_ndelay-P61_etab
else
dc P61_fxdone-P61_etab
endc
ifne P61_pde
dc P61_pattdelay-P61_etab
else
dc P61_fxdone-P61_etab
endc
ifne P61_il
dc P61_funk-P61_etab
else
dc P61_fxdone-P61_etab
endc
endc
ifne P61_fi
P61_filter:
move.b P61_Info(a5),d0
and.b #$fd,$bfe001
or.b d0,$bfe001
bra.w P61_fxdone
endc
ifne P61_fsu
P61_fineup:
P61_getnote
moveq #$f,d0
and.b P61_Info(a5),d0
sub d0,P61_Period(a5)
moveq #113,d0
cmp P61_Period(a5),d0
ble.b .jup
move d0,P61_Period(a5)
.jup:
moveq #$7e,d0
and.b (a5),d0
bne.w P61_zample
bra.w P61_nocha
endc
ifne P61_fsd
P61_finedwn:
P61_getnote
moveq #$f,d0
and.b P61_Info(a5),d0
add d0,P61_Period(a5)
cmp #856,P61_Period(a5)
ble.b .jup
move #856,P61_Period(a5)
.jup: moveq #$7e,d0
and.b (a5),d0
bne.w P61_zample
bra.w P61_nocha
endc
ifne P61_sft
P61_setfinetune:
moveq #$f,d0
and.b P61_Info(a5),d0
ifeq opt020
add d0,d0
move P61_mulutab(pc,d0),P61_Fine(a5)
else
move P61_mulutab(pc,d0*2),P61_Fine(a5)
endc
bra.w P61_fxdone
P61_mulutab:
dc 0,74,148,222,296,370,444,518,592,666,740,814,888,962,1036,1110
endc
;; --- E6x start ---
ifne P61_pl
P61_patternloop:
moveq #$f,d0
and.b P61_Info(a5),d0 ;E6x, x=0?
beq.b P61_setloop ;then set loop start point ONLY
tst.b P61_plflag-P61_cn(a3) ;not first encounter?
bne.b P61_noset ;then don't set start count
move d0,P61_plcount-P61_cn(a3) ;set start count
st.b P61_plflag-P61_cn(a3) ;and flag
P61_noset:
tst P61_plcount-P61_cn(a3) ;loop count expired?
bne.b P61_looppaa
move.b d7,P61_plflag-P61_cn(a3) ;then clear flag and done
bra.w P61_fxdone
P61_looppaa:
st.b P61_plflag+1-P61_cn(a3) ;else special-flag jump later
subq #1,P61_plcount-P61_cn(a3) ;and dec loop count
bra.w P61_fxdone
P61_setloop:
tst.b P61_plflag-P61_cn(a3) ;flag already set?
bne.w P61_fxdone ;then do nothing
move P61_rowpos(pc),P61_plrowpos-P61_cn(a3) ;else set pos
lea P61_temp0+P61_TData(pc),a1 ;& prep chans
lea P61_looppos(pc),a0
moveq #channels-1,d0
.talt:
move.l (a1)+,(a0)+
move.l (a1)+,(a0)+
move.l (a1),(a0)+
lea Channel_Block_Size-8(a1),a1
dbf d0,.talt
bra.w P61_fxdone ;and done.
endc
;; --- E6x end ---
ifne P61_fvu
P61_finevup:
moveq #$f,d0
and.b P61_Info(a5),d0
add d0,P61_Volume(a5)
moveq #64,d0
cmp P61_Volume(a5),d0
bge.w P61_fxdone
move d0,P61_Volume(a5)
bra.w P61_fxdone
endc
ifne P61_fvd
P61_finevdwn:
moveq #$f,d0
and.b P61_Info(a5),d0
sub d0,P61_Volume(a5)
bpl.w P61_fxdone
move d7,P61_Volume(a5)
bra.w P61_fxdone
endc
ifne P61_timing
P61_sete8:
moveq #$f,d0
and.b P61_Info(a5),d0
move d0,P61_E8-P61_cn(a3)
bra.w P61_fxdone
endc
ifne P61_rt
P61_setretrig:
moveq #$f,d0
and.b P61_Info(a5),d0
move d0,P61_RetrigCount(a5)
bra.w P61_fxdone
endc
ifne P61_nd
P61_ndelay:
moveq #$7e,d0
and.b (a5),d0
beq.w P61_skip
ifne P61_vib
move.b d7,P61_VibPos(a5)
endc
ifne P61_tre
move.b d7,P61_TrePos(a5)
endc
ifne P61_ft
add P61_Fine(a5),d0
endc
move d0,P61_Note(a5)
move P61_periods-P61_cn(a3,d0),P61_Period(a5)
ifeq p61fade
move P61_Volume(a5),8(a4)
else
move P61_Volume(a5),P61_Shadow(a5)
endc
bra.w P61_skip
endc
ifne P61_pde
P61_pattdelay:
moveq #$f,d0
and.b P61_Info(a5),d0
move d0,P61_pdelay-P61_cn(a3)
st P61_pdflag-P61_cn(a3)
bra.w P61_fxdone
endc
ifne P61_sd
P61_cspeed:
moveq #0,d0
move.b P61_Info(a5),d0
ifne p61cia
tst P61_Tempo-P61_cn(a3)
beq.b P61_VBlank
cmp.b #32,d0
bhs.b P61_STempo
endc
P61_VBlank:
cmp.b #1,d0
beq.b P61_jkd
move.b d0,P61_speed+1-P61_cn(a3)
subq.b #1,d0
move.b d0,P61_speed2+1-P61_cn(a3)
move d7,P61_speedis1-P61_cn(a3)
bra.w P61_fxdone
P61_jkd:
move.b d0,P61_speed+1-P61_cn(a3)
move.b d0,P61_speed2+1-P61_cn(a3)
st P61_speedis1-P61_cn(a3)
bra.w P61_fxdone
ifne p61cia
P61_STempo:
move.l P61_timer(pc),d1
divu d0,d1
move d1,P61_thi2-P61_cn(a3)
sub #$1f0*2,d1
move d1,P61_thi-P61_cn(a3)
ifeq p61system
move P61_thi2-P61_cn(a3),d1
move.b d1,$bfd400
lsr #8,d1
move.b d1,$bfd500
endc
bra P61_fxdone
endc
endc
ifne P61_vbvs
P61_vibochvslide:
move.b P61_Info(a5),d0
sub.b d0,P61_Volume+1(a5)
bpl.b P61_test62
move d7,P61_Volume(a5)
ifeq p61fade
move d7,8(a4)
else
move d7,P61_Shadow(a5)
endc
bra.b P61_vib2
P61_test62:
moveq #64,d0
cmp P61_Volume(a5),d0
bge.b .ncs2
move d0,P61_Volume(a5)
.ncs2:
ifeq p61fade
move P61_Volume(a5),8(a4)
else
move P61_Volume(a5),P61_Shadow(a5)
endc
endc
ifne P61_vib
P61_vib2:
move #$f00,d0
move P61_VibCmd(a5),d1
and d1,d0
lsr #3,d0
lsr #2,d1
and #$1f,d1
add d1,d0
move P61_Period(a5),d1
moveq #0,d2
move.b P61_vibtab(pc,d0),d2
tst.b P61_VibPos(a5)
bmi.b .vibneg
add d2,d1
bra.b P61_vib4
.vibneg:sub d2,d1
P61_vib4:
move d1,6(a4)
move.b P61_VibCmd(a5),d0
lsr.b #2,d0
and #$3c,d0
add.b d0,P61_VibPos(a5)
bra.w P61_contfxdone
endc
ifne P61_tre
P61_tremo:
move #$f00,d0
move P61_TreCmd(a5),d1
and d1,d0
lsr #3,d0
lsr #2,d1
and #$1f,d1
add d1,d0
move P61_Volume(a5),d1
moveq #0,d2
move.b P61_vibtab(pc,d0),d2
tst.b P61_TrePos(a5)
bmi.b .treneg
add d2,d1
cmp #64,d1
ble.b P61_tre4
moveq #64,d1
bra.b P61_tre4
.treneg:
sub d2,d1
bpl.b P61_tre4
moveq #0,d1
P61_tre4:
ifeq p61fade
move d1,8(a4)
else
move d1,P61_Shadow(a5)
endc
move.b P61_TreCmd(a5),d0
lsr.b #2,d0
and #$3c,d0
add.b d0,P61_TrePos(a5)
bra.w P61_contfxdone
endc
ifne (P61_vib+P61_tre)
P61_vibtab:
; incbin "vibtab"
dc.b $00,$00,$00,$00,$00,$00,$00,$00
dc.b $00,$00,$00,$00,$00,$00,$00,$00
dc.b $00,$00,$00,$00,$00,$00,$00,$00
dc.b $00,$00,$00,$00,$00,$00,$00,$00
dc.b $00,$00,$00,$00,$00,$00,$01,$01
dc.b $01,$01,$01,$01,$01,$01,$01,$01
dc.b $01,$01,$01,$01,$01,$01,$01,$01
dc.b $01,$01,$01,$00,$00,$00,$00,$00
dc.b $00,$00,$00,$01,$01,$01,$02,$02
dc.b $02,$03,$03,$03,$03,$03,$03,$03
dc.b $03,$03,$03,$03,$03,$03,$03,$03
dc.b $02,$02,$02,$01,$01,$01,$00,$00
dc.b $00,$00,$01,$01,$02,$02,$03,$03
dc.b $04,$04,$04,$05,$05,$05,$05,$05
dc.b $05,$05,$05,$05,$05,$05,$04,$04
dc.b $04,$03,$03,$02,$02,$01,$01,$00
dc.b $00,$00,$01,$02,$03,$03,$04,$05
dc.b $05,$06,$06,$07,$07,$07,$07,$07
dc.b $07,$07,$07,$07,$07,$07,$06,$06
dc.b $05,$05,$04,$03,$03,$02,$01,$00
dc.b $00,$00,$01,$02,$03,$04,$05,$06
dc.b $07,$07,$08,$08,$09,$09,$09,$09
dc.b $09,$09,$09,$09,$09,$08,$08,$07
dc.b $07,$06,$05,$04,$03,$02,$01,$00
dc.b $00,$01,$02,$03,$04,$05,$06,$07
dc.b $08,$09,$09,$0a,$0b,$0b,$0b,$0b
dc.b $0b,$0b,$0b,$0b,$0b,$0a,$09,$09
dc.b $08,$07,$06,$05,$04,$03,$02,$01
dc.b $00,$01,$02,$04,$05,$06,$07,$08
dc.b $09,$0a,$0b,$0c,$0c,$0d,$0d,$0d
dc.b $0d,$0d,$0d,$0d,$0c,$0c,$0b,$0a
dc.b $09,$08,$07,$06,$05,$04,$02,$01
dc.b $00,$01,$03,$04,$06,$07,$08,$0a
dc.b $0b,$0c,$0d,$0e,$0e,$0f,$0f,$0f
dc.b $0f,$0f,$0f,$0f,$0e,$0e,$0d,$0c
dc.b $0b,$0a,$08,$07,$06,$04,$03,$01
dc.b $00,$01,$03,$05,$06,$08,$09,$0b
dc.b $0c,$0d,$0e,$0f,$10,$11,$11,$11
dc.b $11,$11,$11,$11,$10,$0f,$0e,$0d
dc.b $0c,$0b,$09,$08,$06,$05,$03,$01
dc.b $00,$01,$03,$05,$07,$09,$0b,$0c
dc.b $0e,$0f,$10,$11,$12,$13,$13,$13
dc.b $13,$13,$13,$13,$12,$11,$10,$0f
dc.b $0e,$0c,$0b,$09,$07,$05,$03,$01
dc.b $00,$02,$04,$06,$08,$0a,$0c,$0d
dc.b $0f,$10,$12,$13,$14,$14,$15,$15
dc.b $15,$15,$15,$14,$14,$13,$12,$10
dc.b $0f,$0d,$0c,$0a,$08,$06,$04,$02
dc.b $00,$02,$04,$06,$09,$0b,$0d,$0f
dc.b $10,$12,$13,$15,$16,$16,$17,$17
dc.b $17,$17,$17,$16,$16,$15,$13,$12
dc.b $10,$0f,$0d,$0b,$09,$06,$04,$02
dc.b $00,$02,$04,$07,$09,$0c,$0e,$10
dc.b $12,$14,$15,$16,$17,$18,$19,$19
dc.b $19,$19,$19,$18,$17,$16,$15,$14
dc.b $12,$10,$0e,$0c,$09,$07,$04,$02
dc.b $00,$02,$05,$08,$0a,$0d,$0f,$11
dc.b $13,$15,$17,$18,$19,$1a,$1b,$1b
dc.b $1b,$1b,$1b,$1a,$19,$18,$17,$15
dc.b $13,$11,$0f,$0d,$0a,$08,$05,$02
dc.b $00,$02,$05,$08,$0b,$0e,$10,$12
dc.b $15,$17,$18,$1a,$1b,$1c,$1d,$1d
dc.b $1d,$1d,$1d,$1c,$1b,$1a,$18,$17
dc.b $15,$12,$10,$0e,$0b,$08,$05,$02
endc
ifne P61_il
P61_funk:
moveq #$f,d0
and.b P61_Info(a5),d0
move.b d0,P61_Funkspd(a5)
bra.w P61_fxdone
P61_funk2:
moveq #0,d0
move.b P61_Funkspd(a5),d0
beq.b P61_funkend
move.b P61_FunkTable(pc,d0),d0
add.b d0,P61_Funkoff(a5)
bpl.b P61_funkend
move.b d7,P61_Funkoff(a5)
move.l P61_Sample(a5),a1
move.l P61_RepeatOffset(a1),d1
move P61_RepeatLength(a1),d0
add.l d0,d0
add.l d1,d0
move.l P61_Wave(a5),a0
addq.l #1,a0
cmp.l d0,a0
blo.b P61_funkok
move.l d1,a0
P61_funkok:
move.l a0,P61_Wave(a5)
not.b (a0)
P61_funkend:
rts
P61_FunkTable:
dc.b 0,5,6,7,8,10,11,13,16,19,22,26,32,43,64,128
endc
********** rest is NOT part of P61_music **********
********** timing interrupt entry point **********
;; --- first int, DMAs on again. ---
ifeq copdma
P61_dmason:
ifeq p61system
tst.b $bfdd00
move #$2000,$dff09c
move #$2000,$dff09c
ifeq nowaveforms
move.b #$19,$bfdf00 ;retrigger to chain replen int.
move.l a0,-(sp)
move.l P61_vektori(pc),a0 ;put another int in '$78.w'
move.l P61_intaddr(pc),(a0)
move.l (sp)+,a0
endc
move P61_dma(pc),$dff096 ;on only. includes $8200.
nop
rte
else
move P61_dma(pc),$dff096 ;on only. includes $8200.
lea P61_server(pc),a3
addq #1,(a3)
move.l P61_craddr(pc),a0
move.b #$19,(a0)
bra P61_ohi
endc
endc ;ifeq copdma
;; --- second chained int, replen ---
ifeq nowaveforms
P61_setrepeat:
ifeq p61system
tst.b $bfdd00
movem.l a0/a1,-(sp)
lea $dff0a0,a1
move #$2000,-4(a1)
move #$2000,-4(a1)
else
lea $dff0a0,a1
endc
move.l P61_Sample+P61_temp0(pc),a0
addq.l #6,a0
move.l (a0)+,(a1)+
move (a0),(a1)
ifgt channels-1
move.l P61_Sample+P61_temp1(pc),a0
addq.l #6,a0
move.l (a0)+,12(a1)
move (a0),16(a1)
endc
ifgt channels-2
move.l P61_Sample+P61_temp2(pc),a0
addq.l #6,a0
move.l (a0)+,28(a1)
move (a0),32(a1)
endc
ifgt channels-3
move.l P61_Sample+P61_temp3(pc),a0
addq.l #6,a0
move.l (a0)+,44(a1)
move (a0),48(a1)
endc
ifne p61system
ifne p61cia
lea P61_server(pc),a3
clr (a3)
move.l P61_craddr+4(pc),a0
move.b P61_tlo(pc),(a0)
move.b P61_thi(pc),$100(a0)
endc
bra P61_ohi
endc
ifeq p61system
ifne p61cia
move.l P61_vektori(pc),a0
move.l P61_tintti(pc),(a0)
endc
movem.l (sp)+,a0/a1
nop
rte
endc
endc ;ifeq nowaveforms
P61_temp0:
dcb.b Channel_Block_Size-2,0
dc 1
P61_temp1:
dcb.b Channel_Block_Size-2,0
dc 2
P61_temp2:
dcb.b Channel_Block_Size-2,0
dc 4
P61_temp3:
dcb.b Channel_Block_Size-2,0
dc 8
ifne split4
P61_temp0copy: dcb.b P61_Wave+4,0 ;temp storage for split4.
P61_temp1copy: dcb.b P61_Wave+4,0
endc
P61_cn:
dc 0
P61_periods:
ifne P61_ft
; incbin "A:INC/SND/periods"
dc.w $0358,$0358,$0328,$02fa,$02d0,$02a6,$0280,$025c
dc.w $023a,$021a,$01fc,$01e0,$01c5,$01ac,$0194,$017d
dc.w $0168,$0153,$0140,$012e,$011d,$010d,$00fe,$00f0
dc.w $00e2,$00d6,$00ca,$00be,$00b4,$00aa,$00a0,$0097
dc.w $008f,$0087,$007f,$0078,$0071,$0352,$0352,$0322
dc.w $02f5,$02cb,$02a2,$027d,$0259,$0237,$0217,$01f9
dc.w $01dd,$01c2,$01a9,$0191,$017b,$0165,$0151,$013e
dc.w $012c,$011c,$010c,$00fd,$00ef,$00e1,$00d5,$00c9
dc.w $00bd,$00b3,$00a9,$009f,$0096,$008e,$0086,$007e
dc.w $0077,$0071,$034c,$034c,$031c,$02f0,$02c5,$029e
dc.w $0278,$0255,$0233,$0214,$01f6,$01da,$01bf,$01a6
dc.w $018e,$0178,$0163,$014f,$013c,$012a,$011a,$010a
dc.w $00fb,$00ed,$00e0,$00d3,$00c7,$00bc,$00b1,$00a7
dc.w $009e,$0095,$008d,$0085,$007d,$0076,$0070,$0346
dc.w $0346,$0317,$02ea,$02c0,$0299,$0274,$0250,$022f
dc.w $0210,$01f2,$01d6,$01bc,$01a3,$018b,$0175,$0160
dc.w $014c,$013a,$0128,$0118,$0108,$00f9,$00eb,$00de
dc.w $00d1,$00c6,$00bb,$00b0,$00a6,$009d,$0094,$008c
dc.w $0084,$007d,$0076,$006f,$0340,$0340,$0311,$02e5
dc.w $02bb,$0294,$026f,$024c,$022b,$020c,$01ef,$01d3
dc.w $01b9,$01a0,$0188,$0172,$015e,$014a,$0138,$0126
dc.w $0116,$0106,$00f7,$00e9,$00dc,$00d0,$00c4,$00b9
dc.w $00af,$00a5,$009c,$0093,$008b,$0083,$007c,$0075
dc.w $006e,$033a,$033a,$030b,$02e0,$02b6,$028f,$026b
dc.w $0248,$0227,$0208,$01eb,$01cf,$01b5,$019d,$0186
dc.w $0170,$015b,$0148,$0135,$0124,$0114,$0104,$00f5
dc.w $00e8,$00db,$00ce,$00c3,$00b8,$00ae,$00a4,$009b
dc.w $0092,$008a,$0082,$007b,$0074,$006d,$0334,$0334
dc.w $0306,$02da,$02b1,$028b,$0266,$0244,$0223,$0204
dc.w $01e7,$01cc,$01b2,$019a,$0183,$016d,$0159,$0145
dc.w $0133,$0122,$0112,$0102,$00f4,$00e6,$00d9,$00cd
dc.w $00c1,$00b7,$00ac,$00a3,$009a,$0091,$0089,$0081
dc.w $007a,$0073,$006d,$032e,$032e,$0300,$02d5,$02ac
dc.w $0286,$0262,$023f,$021f,$0201,$01e4,$01c9,$01af
dc.w $0197,$0180,$016b,$0156,$0143,$0131,$0120,$0110
dc.w $0100,$00f2,$00e4,$00d8,$00cc,$00c0,$00b5,$00ab
dc.w $00a1,$0098,$0090,$0088,$0080,$0079,$0072,$006c
dc.w $038b,$038b,$0358,$0328,$02fa,$02d0,$02a6,$0280
dc.w $025c,$023a,$021a,$01fc,$01e0,$01c5,$01ac,$0194
dc.w $017d,$0168,$0153,$0140,$012e,$011d,$010d,$00fe
dc.w $00f0,$00e2,$00d6,$00ca,$00be,$00b4,$00aa,$00a0
dc.w $0097,$008f,$0087,$007f,$0078,$0384,$0384,$0352
dc.w $0322,$02f5,$02cb,$02a3,$027c,$0259,$0237,$0217
dc.w $01f9,$01dd,$01c2,$01a9,$0191,$017b,$0165,$0151
dc.w $013e,$012c,$011c,$010c,$00fd,$00ee,$00e1,$00d4
dc.w $00c8,$00bd,$00b3,$00a9,$009f,$0096,$008e,$0086
dc.w $007e,$0077,$037e,$037e,$034c,$031c,$02f0,$02c5
dc.w $029e,$0278,$0255,$0233,$0214,$01f6,$01da,$01bf
dc.w $01a6,$018e,$0178,$0163,$014f,$013c,$012a,$011a
dc.w $010a,$00fb,$00ed,$00df,$00d3,$00c7,$00bc,$00b1
dc.w $00a7,$009e,$0095,$008d,$0085,$007d,$0076,$0377
dc.w $0377,$0346,$0317,$02ea,$02c0,$0299,$0274,$0250
dc.w $022f,$0210,$01f2,$01d6,$01bc,$01a3,$018b,$0175
dc.w $0160,$014c,$013a,$0128,$0118,$0108,$00f9,$00eb
dc.w $00de,$00d1,$00c6,$00bb,$00b0,$00a6,$009d,$0094
dc.w $008c,$0084,$007d,$0076,$0371,$0371,$0340,$0311
dc.w $02e5,$02bb,$0294,$026f,$024c,$022b,$020c,$01ee
dc.w $01d3,$01b9,$01a0,$0188,$0172,$015e,$014a,$0138
dc.w $0126,$0116,$0106,$00f7,$00e9,$00dc,$00d0,$00c4
dc.w $00b9,$00af,$00a5,$009c,$0093,$008b,$0083,$007b
dc.w $0075,$036b,$036b,$033a,$030b,$02e0,$02b6,$028f
dc.w $026b,$0248,$0227,$0208,$01eb,$01cf,$01b5,$019d
dc.w $0186,$0170,$015b,$0148,$0135,$0124,$0114,$0104
dc.w $00f5,$00e8,$00db,$00ce,$00c3,$00b8,$00ae,$00a4
dc.w $009b,$0092,$008a,$0082,$007b,$0074,$0364,$0364
dc.w $0334,$0306,$02da,$02b1,$028b,$0266,$0244,$0223
dc.w $0204,$01e7,$01cc,$01b2,$019a,$0183,$016d,$0159
dc.w $0145,$0133,$0122,$0112,$0102,$00f4,$00e6,$00d9
dc.w $00cd,$00c1,$00b7,$00ac,$00a3,$009a,$0091,$0089
dc.w $0081,$007a,$0073,$035e,$035e,$032e,$0300,$02d5
dc.w $02ac,$0286,$0262,$023f,$021f,$0201,$01e4,$01c9
dc.w $01af,$0197,$0180,$016b,$0156,$0143,$0131,$0120
dc.w $0110,$0100,$00f2,$00e4,$00d8,$00cb,$00c0,$00b5
dc.w $00ab,$00a1,$0098,$0090,$0088,$0080,$0079,$0072
else
; incbin "periods.nft"
dc.w $0358,$0358,$0328,$02fa,$02d0,$02a6,$0280,$025c
dc.w $023a,$021a,$01fc,$01e0,$01c5,$01ac,$0194,$017d
dc.w $0168,$0153,$0140,$012e,$011d,$010d,$00fe,$00f0
dc.w $00e2,$00d6,$00ca,$00be,$00b4,$00aa,$00a0,$0097
dc.w $008f,$0087,$007f,$0078,$0071
endc
P61_dma:
dc $8200
P61_rowpos:
dc 0
P61_slen:
dc 0
P61_speed:
dc 0
P61_speed2:
dc 0
P61_speedis1:
dc 0
P61_spos:
dc.l 0
ifeq p61system
P61_vektori:
dc.l 0
P61_oldlev6:
dc.l 0
endc
P61_ofilter:
dc 0
P61_timers:
dc.l 0
ifne p61cia
P61_tintti:
dc.l 0
P61_thi:
dc.b 0
P61_tlo:
dc.b 0
P61_thi2:
dc.b 0
P61_tlo2:
dc.b 0
P61_timer:
dc.l 0
endc
ifne P61_pl
P61_plcount:
dc 0
P61_plflag:
dc 0
P61_plreset:
dc 0
P61_plrowpos:
dc 0
P61_looppos:
dcb.b 12*channels,0
endc
ifne P61_pde
P61_pdelay:
dc 0
P61_pdflag:
dc 0
endc
P61_samples:
dcb.b 16*31,0
P61_emptysample:
dcb.b 16,0
P61_positionbase:
dc.l 0
P61_possibase:
dc.l 0
P61_patternbase:
dc.l 0
P61_intaddr:
dc.l 0
ifne p61system
P61_server:
dc 0
P61_miscbase:
dc.l 0
P61_audioopen:
dc.b 0
P61_sigbit:
dc.b -1
P61_ciares:
dc.l 0
P61_craddr:
dc.l 0,0,0
P61_dat:
dc $f00
P61_timerinterrupt:
dc 0,0,0,0,127
P61_timerdata:
dc.l 0,0,0
P61_timeron:
dc 0
P61_allocport:
dc.l 0,0
dc.b 4,0
dc.l 0
dc.b 0,0
dc.l 0
P61_reqlist:
dc.l 0,0,0
dc.b 5,0
P61_allocreq:
dc.l 0,0
dc 127
dc.l 0
P61_portti:
dc.l 0
dc 68
dc.l 0,0,0
dc 0
P61_reqdata:
dc.l 0
dc.l 1,0,0,0,0,0,0
dc 0
P61_audiodev:
dc.b 'audio.device',0
P61_cianame:
dc.b 'ciab.resource',0
P61_timeropen:
dc.b 0
P61_timerint:
dc.b 'P61_TimerInterrupt',0,0
endc
P61_InitPos:
dc.w 0 ;P61_Init starts playing the song from this position.
;; --- optional declares ---
ifne use1Fx
P61_PTrig: dc.w 0 ;Poll this Custom trigger, using 'Bxx',pos $80-$ff
endc
ifne nowaveforms
P61_NewDMA: dc.w 0
endc
ifne copdma
p61_DMApokeAddr:dc.l 0
endc
P61_PattFlag: dc.w 0
P61_etu:
ifne quietstart
P61_Quiet: dc.w 0 ;@@this "sample" MUST be in chipmem!
endc
ifne visuctrs
P61_visuctr0: dc.w $4000 ;pretend long elapsed time at start
P61_visuctr1: dc.w $4000 ;(to not show inital trigger on all channels.)
P61_visuctr2: dc.w $4000
P61_visuctr3: dc.w $4000
endc
P61E: ;end of player binary
samples: ;ds.b 65536 <--declare some space if used.
| 21.749138 | 89 | 0.691516 |
b264daac9091498155dbb49041a1948144a25f44 | 6,826 | asm | Assembly | Transynther/x86/_processed/NC/_ht_zr_/i7-7700_9_0xca.log_21829_72.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NC/_ht_zr_/i7-7700_9_0xca.log_21829_72.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NC/_ht_zr_/i7-7700_9_0xca.log_21829_72.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r12
push %r8
push %r9
push %rbp
push %rcx
push %rdi
push %rsi
lea addresses_normal_ht+0x1a31b, %rsi
lea addresses_WC_ht+0x9a0b, %rdi
nop
nop
and %r9, %r9
mov $102, %rcx
rep movsq
nop
nop
nop
cmp $33681, %r9
lea addresses_WT_ht+0x71b, %rbp
nop
nop
cmp %r8, %r8
mov (%rbp), %r12d
nop
nop
nop
nop
nop
xor %rdi, %rdi
lea addresses_WT_ht+0xcf1b, %r8
nop
cmp %r9, %r9
mov (%r8), %cx
nop
nop
nop
nop
inc %r12
lea addresses_normal_ht+0x13347, %rsi
lea addresses_A_ht+0x4f5b, %rdi
nop
nop
nop
nop
cmp %r10, %r10
mov $85, %rcx
rep movsw
nop
nop
nop
nop
nop
cmp %rbp, %rbp
lea addresses_WT_ht+0x144c5, %rcx
nop
nop
nop
inc %r9
mov (%rcx), %r8d
nop
cmp $12915, %rbp
lea addresses_normal_ht+0xf99b, %rsi
lea addresses_WC_ht+0x12731, %rdi
nop
nop
nop
nop
nop
xor $54757, %r9
mov $114, %rcx
rep movsl
nop
nop
nop
nop
nop
xor %r9, %r9
lea addresses_D_ht+0xca7b, %rbp
cmp %r8, %r8
mov $0x6162636465666768, %r12
movq %r12, %xmm3
movups %xmm3, (%rbp)
nop
nop
nop
nop
nop
add $16109, %r8
lea addresses_A_ht+0x1636b, %rsi
lea addresses_WC_ht+0x16a81, %rdi
nop
nop
nop
nop
nop
cmp $14091, %r10
mov $100, %rcx
rep movsl
nop
nop
nop
add $57465, %rdi
pop %rsi
pop %rdi
pop %rcx
pop %rbp
pop %r9
pop %r8
pop %r12
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r8
push %r9
push %rax
push %rbp
push %rbx
push %rdx
push %rsi
// Load
mov $0x947, %rbp
nop
nop
dec %rax
mov (%rbp), %rdx
nop
nop
nop
add $54022, %rsi
// Load
lea addresses_A+0x17b3b, %r8
nop
cmp $49330, %rbx
mov (%r8), %r9d
nop
nop
nop
nop
nop
sub %rbx, %rbx
// Store
lea addresses_UC+0x18b1b, %rax
and $49786, %r9
mov $0x5152535455565758, %rsi
movq %rsi, %xmm3
vmovups %ymm3, (%rax)
nop
nop
nop
xor $35101, %rbp
// Faulty Load
mov $0xe7289000000031b, %r9
nop
nop
nop
sub $57782, %rax
vmovups (%r9), %ymm0
vextracti128 $1, %ymm0, %xmm0
vpextrq $0, %xmm0, %rbp
lea oracles, %rbx
and $0xff, %rbp
shlq $12, %rbp
mov (%rbx,%rbp,1), %rbp
pop %rsi
pop %rdx
pop %rbx
pop %rbp
pop %rax
pop %r9
pop %r8
ret
/*
<gen_faulty_load>
[REF]
{'src': {'congruent': 0, 'AVXalign': False, 'same': False, 'size': 8, 'NT': False, 'type': 'addresses_NC'}, 'OP': 'LOAD'}
{'src': {'congruent': 0, 'AVXalign': False, 'same': False, 'size': 8, 'NT': False, 'type': 'addresses_P'}, 'OP': 'LOAD'}
{'src': {'congruent': 5, 'AVXalign': False, 'same': False, 'size': 4, 'NT': False, 'type': 'addresses_A'}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'congruent': 11, 'AVXalign': False, 'same': False, 'size': 32, 'NT': False, 'type': 'addresses_UC'}}
[Faulty Load]
{'src': {'congruent': 0, 'AVXalign': False, 'same': True, 'size': 32, 'NT': False, 'type': 'addresses_NC'}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'congruent': 9, 'same': False, 'type': 'addresses_normal_ht'}, 'OP': 'REPM', 'dst': {'congruent': 3, 'same': False, 'type': 'addresses_WC_ht'}}
{'src': {'congruent': 8, 'AVXalign': False, 'same': False, 'size': 4, 'NT': False, 'type': 'addresses_WT_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 9, 'AVXalign': False, 'same': False, 'size': 2, 'NT': True, 'type': 'addresses_WT_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 1, 'same': False, 'type': 'addresses_normal_ht'}, 'OP': 'REPM', 'dst': {'congruent': 5, 'same': True, 'type': 'addresses_A_ht'}}
{'src': {'congruent': 0, 'AVXalign': False, 'same': False, 'size': 4, 'NT': False, 'type': 'addresses_WT_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 3, 'same': False, 'type': 'addresses_normal_ht'}, 'OP': 'REPM', 'dst': {'congruent': 1, 'same': False, 'type': 'addresses_WC_ht'}}
{'OP': 'STOR', 'dst': {'congruent': 4, 'AVXalign': False, 'same': False, 'size': 16, 'NT': False, 'type': 'addresses_D_ht'}}
{'src': {'congruent': 4, 'same': False, 'type': 'addresses_A_ht'}, 'OP': 'REPM', 'dst': {'congruent': 1, 'same': False, 'type': 'addresses_WC_ht'}}
{'44': 12608, '00': 1, '45': 9220}
45 45 44 45 44 44 45 44 45 45 45 45 44 44 45 44 44 45 44 45 45 45 45 45 44 44 44 44 45 45 45 45 44 44 44 45 45 45 45 44 45 44 45 45 44 45 45 44 45 44 44 45 44 44 45 44 44 45 45 45 45 45 44 45 44 44 45 44 45 44 45 45 45 44 44 45 44 44 45 45 44 45 44 44 45 44 44 44 45 45 45 44 44 44 45 45 45 44 44 44 45 45 44 45 44 44 44 45 45 44 44 44 45 44 45 44 44 45 45 45 45 45 45 45 44 44 45 44 45 44 44 45 44 44 45 45 44 44 44 45 44 44 45 45 44 45 44 44 44 45 44 45 45 44 44 44 44 45 44 44 45 44 45 45 45 45 44 44 45 44 44 44 45 45 45 44 45 45 44 44 45 44 45 45 44 45 45 45 45 45 45 45 44 44 45 45 44 44 44 44 44 45 44 44 45 44 44 44 44 45 44 45 44 44 45 45 44 45 45 44 45 44 45 44 44 44 44 44 45 44 44 44 45 44 45 45 45 45 44 44 45 45 44 44 45 45 45 44 44 45 44 44 44 45 44 45 45 44 44 44 45 45 45 44 44 45 44 45 44 44 44 44 45 44 45 45 44 45 45 45 44 44 44 44 44 45 45 44 44 44 44 45 45 45 45 45 44 45 44 44 44 44 44 45 44 44 45 44 44 45 44 45 44 44 45 44 44 45 45 44 44 44 45 44 44 45 45 44 44 45 45 44 45 44 45 44 44 44 44 45 44 44 44 44 44 44 44 45 44 44 45 45 44 45 44 45 45 45 45 45 44 45 44 45 45 44 45 45 45 45 44 45 45 44 45 44 45 44 45 44 44 45 44 45 44 44 45 45 44 45 44 45 44 44 45 45 45 44 45 44 44 45 44 44 44 44 45 45 45 44 45 44 44 44 45 45 45 44 45 44 44 45 44 44 45 44 44 44 44 45 45 45 44 44 45 44 44 45 44 44 44 45 45 44 45 45 44 44 44 44 44 44 44 45 44 45 45 45 44 44 45 44 45 44 44 44 45 45 45 44 44 44 44 44 44 44 45 44 44 45 44 44 45 44 44 44 44 44 44 44 45 44 44 44 45 44 44 45 45 44 44 45 44 45 45 45 45 44 44 44 45 44 45 45 44 44 45 44 45 44 45 44 45 45 44 45 45 44 44 44 44 44 45 44 44 44 45 44 44 44 45 45 44 45 44 44 44 45 44 45 44 45 45 44 45 45 44 44 44 44 44 44 44 44 44 44 44 45 44 45 45 44 45 44 44 45 44 44 44 44 45 45 44 44 44 45 44 44 44 45 45 44 44 44 45 45 44 44 44 44 44 44 44 44 45 44 45 45 45 44 45 44 45 44 45 45 45 44 45 45 45 45 45 44 45 44 44 44 44 45 44 44 45 44 44 44 44 44 44 44 44 44 44 44 44 45 44 44 45 45 45 44 45 44 44 44 45 44 44 45 44 45 45 44 45 44 44 45 45 44 44 44 45 44 45 45 45 44 44 44 44 45 45 44 44 44 45 45 44 44 44 45 44 44 45 44 44 44 45 44 44 44 44 45 45 44 45 44 45 44 44 44 44 45 44 44 44 45 44 45 44 44 44 44 44 45 44 45 44 45 44 44 45 44 44 44 44 45 44 44 44 44 44 44 45 44 44 45 45 45 44 45 45 45 44 45 44 44 44 45 44 44 45 45 44 45 44 45 45 45 44 45 45 44 45 44 44 44 44 45 44 45 45 45 44 44 44 45 44 44 44 44 44 44 45 44 45 45 45 44 44 44 45 44 45 44 44 44 45 45 44 45 44 45 45 44 44 44 44 45 45 44 44 45 44 44 44 44 45 44 45 44 45 44 44 45 45 44 45 44 44 44 44 44 44 45 45 45 44 45 45 45 45 45 45 44 45 44 45 44 45 45 44 44 45 45 44 44 44 44 45 44 45 45 45 45 45 45 45 44 45 44 45 44 44 44 44 45 44 44 45 45 44 44 45 44 44 45 45 44 44 44 44 45 45 45 45 44 44 45 45 44 45 45 44 45 45 45 44 44 44 44 45 44 45 44 45 45 45 44 45 44 44 44 45 44 45 44 44 44 45 45 44 44 44 44 45 45 45 45 44 44 44 44 44 45 45 44 44 44 45 44 44 45 45 44 45 45 44 44 44 44 45 45 44 44 45 45 45 44 44 44 45 45 45 45 44 44 44 45 45 45 45 44 44 44 44 45 44 45
*/
| 33.625616 | 2,999 | 0.655875 |
f47871c78127a6dcfe4a11443fa35f436d66040b | 6,563 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0x48_notsx.log_21829_578.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0x48_notsx.log_21829_578.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0x48_notsx.log_21829_578.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r12
push %r15
push %rax
push %rbx
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_WC_ht+0x1817a, %rsi
lea addresses_A_ht+0xc754, %rdi
nop
nop
nop
xor %r15, %r15
mov $111, %rcx
rep movsw
nop
xor %rbx, %rbx
lea addresses_A_ht+0xbd54, %rax
cmp %r12, %r12
movl $0x61626364, (%rax)
cmp $36662, %rsi
lea addresses_UC_ht+0x18f64, %r15
add %rax, %rax
mov $0x6162636465666768, %rbx
movq %rbx, %xmm7
vmovups %ymm7, (%r15)
nop
nop
nop
nop
dec %rax
lea addresses_D_ht+0xa854, %rsi
lea addresses_UC_ht+0x1edf0, %rdi
nop
nop
nop
mfence
mov $87, %rcx
rep movsl
nop
and %rdi, %rdi
lea addresses_UC_ht+0xf854, %rsi
lea addresses_normal_ht+0x1db54, %rdi
nop
nop
nop
nop
nop
cmp $38835, %rax
mov $106, %rcx
rep movsl
nop
xor $4140, %rsi
lea addresses_normal_ht+0x94d4, %rsi
nop
nop
nop
nop
inc %rbx
mov $0x6162636465666768, %rdx
movq %rdx, (%rsi)
nop
nop
nop
nop
nop
xor %r15, %r15
lea addresses_UC_ht+0xede3, %rax
nop
and $22460, %rbx
mov (%rax), %edx
nop
xor $49490, %r12
lea addresses_WC_ht+0xfe54, %rsi
lea addresses_WT_ht+0x14f00, %rdi
nop
nop
sub $51525, %rdx
mov $120, %rcx
rep movsw
sub $51281, %rdx
lea addresses_normal_ht+0x1e3c4, %rsi
lea addresses_UC_ht+0x1e354, %rdi
clflush (%rdi)
nop
nop
nop
nop
and $11532, %rax
mov $19, %rcx
rep movsl
nop
nop
xor %rax, %rax
lea addresses_UC_ht+0x1a9c4, %rsi
lea addresses_UC_ht+0x9354, %rdi
nop
xor %rax, %rax
mov $9, %rcx
rep movsq
nop
nop
and %rcx, %rcx
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbx
pop %rax
pop %r15
pop %r12
ret
.global s_faulty_load
s_faulty_load:
push %r12
push %r13
push %r15
push %rax
push %rcx
push %rdx
// Faulty Load
lea addresses_WC+0x15f54, %r15
add $7522, %rdx
mov (%r15), %r13d
lea oracles, %rdx
and $0xff, %r13
shlq $12, %r13
mov (%rdx,%r13,1), %r13
pop %rdx
pop %rcx
pop %rax
pop %r15
pop %r13
pop %r12
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 8, 'type': 'addresses_WC', 'congruent': 0}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'same': True, 'NT': False, 'AVXalign': False, 'size': 4, 'type': 'addresses_WC', 'congruent': 0}}
<gen_prepare_buffer>
{'dst': {'same': False, 'congruent': 11, 'type': 'addresses_A_ht'}, 'OP': 'REPM', 'src': {'same': False, 'congruent': 0, 'type': 'addresses_WC_ht'}}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 4, 'type': 'addresses_A_ht', 'congruent': 7}, 'OP': 'STOR'}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 32, 'type': 'addresses_UC_ht', 'congruent': 4}, 'OP': 'STOR'}
{'dst': {'same': False, 'congruent': 2, 'type': 'addresses_UC_ht'}, 'OP': 'REPM', 'src': {'same': False, 'congruent': 7, 'type': 'addresses_D_ht'}}
{'dst': {'same': False, 'congruent': 8, 'type': 'addresses_normal_ht'}, 'OP': 'REPM', 'src': {'same': False, 'congruent': 5, 'type': 'addresses_UC_ht'}}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 8, 'type': 'addresses_normal_ht', 'congruent': 7}, 'OP': 'STOR'}
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': True, 'size': 4, 'type': 'addresses_UC_ht', 'congruent': 0}}
{'dst': {'same': False, 'congruent': 1, 'type': 'addresses_WT_ht'}, 'OP': 'REPM', 'src': {'same': False, 'congruent': 8, 'type': 'addresses_WC_ht'}}
{'dst': {'same': False, 'congruent': 8, 'type': 'addresses_UC_ht'}, 'OP': 'REPM', 'src': {'same': False, 'congruent': 2, 'type': 'addresses_normal_ht'}}
{'dst': {'same': False, 'congruent': 10, 'type': 'addresses_UC_ht'}, 'OP': 'REPM', 'src': {'same': False, 'congruent': 2, 'type': 'addresses_UC_ht'}}
{'38': 21829}
38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38
*/
| 40.512346 | 2,999 | 0.662654 |
79af4123915cbf900ceabda163e3db7ee3bbe0a1 | 596 | asm | Assembly | oeis/261/A261140.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/261/A261140.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/261/A261140.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A261140: a(n) = 3486107472997423 + (n-1)*371891575525470.
; 3486107472997423,3857999048522893,4229890624048363,4601782199573833,4973673775099303,5345565350624773,5717456926150243,6089348501675713,6461240077201183,6833131652726653,7205023228252123,7576914803777593,7948806379303063,8320697954828533,8692589530354003,9064481105879473,9436372681404943,9808264256930413,10180155832455883,10552047407981353,10923938983506823,11295830559032293,11667722134557763,12039613710083233,12411505285608703,12783396861134173,13155288436659643,13527180012185113
mul $0,371891575525470
add $0,3486107472997423
| 99.333333 | 487 | 0.904362 |
19863fd2c9f0de6b9b40ed94a61965781d5d13e3 | 272 | asm | Assembly | Arithmetic operations/Division/division_double.asm | berkcetinsaya/MIPSLanguageExamples | e1ec7ae15a38621e09fcf211f033497c495ee06b | [
"Apache-2.0"
] | null | null | null | Arithmetic operations/Division/division_double.asm | berkcetinsaya/MIPSLanguageExamples | e1ec7ae15a38621e09fcf211f033497c495ee06b | [
"Apache-2.0"
] | null | null | null | Arithmetic operations/Division/division_double.asm | berkcetinsaya/MIPSLanguageExamples | e1ec7ae15a38621e09fcf211f033497c495ee06b | [
"Apache-2.0"
] | null | null | null | .data
number1: .double 5.0 # double variable number1 created
number2: .double 2.0 # double variable number2 created
.text
ldc1 $f2, number1 # number1 loaded into register $f2
ldc1 $f4, number2 # number2 loaded into register $f4
div.d $f0, $f2, $f4 # $f0 = $f2 / $f4 | 34 | 55 | 0.698529 |
e818f1fb4e62da95fd388cf56e7f2e4542b2e91f | 699 | asm | Assembly | oeis/181/A181894.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/181/A181894.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/181/A181894.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A181894: Sum of factors from A050376 in Fermi-Dirac representation of n.
; Submitted by Jon Maiga
; 0,2,3,4,5,5,7,6,9,7,11,7,13,9,8,16,17,11,19,9,10,13,23,9,25,15,12,11,29,10,31,18,14,19,12,13,37,21,16,11,41,12,43,15,14,25,47,19,49,27,20,17,53,14,16,13,22,31,59,12,61,33,16,20,18,16,67,21,26,14,71,15,73,39,28,23,18,18,79,21,81,43,83,14,22,45,32,17,89,16,20,27,34,49,24,21,97,51,20,29
add $0,1
lpb $0
mov $3,$0
lpb $3
mov $4,$0
mov $6,$2
cmp $6,0
add $2,$6
mod $4,$2
cmp $4,0
cmp $4,0
mov $5,$2
add $2,1
cmp $5,1
max $4,$5
sub $3,$4
lpe
mov $5,1
lpb $0
dif $0,$2
mul $5,$2
mov $2,$5
lpe
add $1,$5
mov $2,2
lpe
mov $0,$1
| 21.84375 | 286 | 0.556509 |
75b10a3b566a1bc84a759879fd0543bf4b7ff3b3 | 5,653 | asm | Assembly | Transynther/x86/_processed/NONE/_ht_un_/i9-9900K_12_0xa0.log_21829_47.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_ht_un_/i9-9900K_12_0xa0.log_21829_47.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_ht_un_/i9-9900K_12_0xa0.log_21829_47.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r12
push %r13
push %r8
push %rbx
push %rcx
push %rdi
push %rsi
lea addresses_A_ht+0x35ad, %rsi
lea addresses_D_ht+0x42c5, %rdi
nop
nop
nop
nop
add $3602, %rbx
mov $25, %rcx
rep movsl
and %r12, %r12
lea addresses_normal_ht+0x1a9e9, %rsi
lea addresses_A_ht+0x1e3e9, %rdi
clflush (%rdi)
nop
nop
nop
nop
nop
add %r12, %r12
mov $40, %rcx
rep movsl
nop
nop
nop
nop
nop
and %rbx, %rbx
lea addresses_UC_ht+0x1c509, %r8
add %r13, %r13
mov (%r8), %r12d
nop
nop
nop
nop
and $62564, %rdi
lea addresses_UC_ht+0x127e9, %r8
nop
nop
nop
dec %r12
mov $0x6162636465666768, %rdi
movq %rdi, %xmm1
and $0xffffffffffffffc0, %r8
movaps %xmm1, (%r8)
nop
nop
add %r13, %r13
lea addresses_UC_ht+0x173e9, %rsi
sub %r12, %r12
movw $0x6162, (%rsi)
nop
sub $13259, %rcx
lea addresses_D_ht+0xbde9, %rdi
nop
nop
nop
nop
nop
sub %r8, %r8
mov $0x6162636465666768, %r12
movq %r12, (%rdi)
nop
nop
inc %rcx
lea addresses_A_ht+0xd81, %rdi
xor %r12, %r12
movl $0x61626364, (%rdi)
nop
add %r12, %r12
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %r8
pop %r13
pop %r12
ret
.global s_faulty_load
s_faulty_load:
push %r15
push %r9
push %rax
push %rdi
// Faulty Load
lea addresses_WT+0x1e7e9, %r9
nop
nop
nop
add %rax, %rax
movups (%r9), %xmm4
vpextrq $1, %xmm4, %r15
lea oracles, %r9
and $0xff, %r15
shlq $12, %r15
mov (%r9,%r15,1), %r15
pop %rdi
pop %rax
pop %r9
pop %r15
ret
/*
<gen_faulty_load>
[REF]
{'src': {'NT': False, 'same': False, 'congruent': 0, 'type': 'addresses_WT', 'AVXalign': False, 'size': 1}, 'OP': 'LOAD'}
[Faulty Load]
{'src': {'NT': False, 'same': True, 'congruent': 0, 'type': 'addresses_WT', 'AVXalign': False, 'size': 16}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'same': False, 'congruent': 2, 'type': 'addresses_A_ht'}, 'OP': 'REPM', 'dst': {'same': True, 'congruent': 2, 'type': 'addresses_D_ht'}}
{'src': {'same': False, 'congruent': 9, 'type': 'addresses_normal_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 5, 'type': 'addresses_A_ht'}}
{'src': {'NT': False, 'same': False, 'congruent': 3, 'type': 'addresses_UC_ht', 'AVXalign': False, 'size': 4}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 10, 'type': 'addresses_UC_ht', 'AVXalign': True, 'size': 16}}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 10, 'type': 'addresses_UC_ht', 'AVXalign': False, 'size': 2}}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 7, 'type': 'addresses_D_ht', 'AVXalign': False, 'size': 8}}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 0, 'type': 'addresses_A_ht', 'AVXalign': False, 'size': 4}}
{'44': 15276, '45': 6552, 'ff': 1}
44 44 44 45 44 45 44 44 44 44 44 44 44 44 44 45 45 44 44 44 44 44 45 44 45 45 44 44 44 44 45 44 44 44 44 45 44 44 44 44 44 44 44 44 44 45 45 44 44 44 45 44 44 44 44 45 44 44 45 44 44 44 44 44 44 44 45 44 44 44 44 45 44 44 44 45 44 45 45 44 45 45 44 45 44 45 44 44 44 44 45 45 44 44 44 45 45 44 44 44 45 44 45 44 45 45 44 44 44 44 45 45 44 45 44 44 44 45 44 44 44 44 45 44 45 44 44 45 44 44 44 44 44 44 45 44 45 44 44 45 44 44 44 44 45 44 44 44 44 44 44 44 45 44 45 44 45 45 44 45 44 44 44 45 45 44 45 44 45 44 44 45 45 44 44 45 44 45 45 44 44 44 44 45 44 44 45 44 44 44 45 44 44 44 44 45 45 44 45 44 44 44 44 44 45 45 44 45 44 44 45 44 45 44 44 44 44 45 44 44 44 44 44 44 45 44 45 45 44 44 44 44 45 44 45 44 44 44 45 44 44 44 44 45 44 44 44 45 44 44 44 44 44 45 45 44 44 45 45 45 44 44 44 44 45 44 45 45 44 45 44 44 44 45 45 44 45 44 44 44 44 44 44 44 44 44 44 45 44 44 44 45 45 44 45 44 45 44 45 45 45 44 44 44 44 44 44 44 44 45 44 45 45 44 44 44 45 45 44 45 44 44 45 45 45 44 44 44 44 45 45 44 44 44 44 45 44 44 44 45 44 45 44 44 44 44 45 44 44 44 44 45 44 45 44 44 44 44 44 44 44 45 44 44 44 44 45 44 44 44 44 45 44 45 44 44 44 44 44 44 44 45 44 44 45 44 44 44 45 44 45 44 44 44 45 44 44 44 44 45 44 45 44 44 45 44 44 44 44 44 44 44 45 44 44 44 44 44 44 45 44 44 45 45 44 45 44 44 44 45 44 44 45 44 44 44 44 44 45 44 44 44 44 44 45 44 44 45 44 44 44 44 45 44 44 44 45 45 44 44 44 44 44 45 44 45 44 45 44 44 45 44 44 44 44 44 44 44 44 44 44 44 45 45 44 45 45 45 45 44 45 44 45 44 44 44 45 45 45 44 44 44 45 44 44 44 44 45 44 44 44 44 45 44 44 44 44 45 44 44 45 45 45 44 45 44 44 45 44 45 44 44 44 44 44 45 45 44 44 44 44 44 44 45 44 45 44 44 44 44 45 44 44 44 44 44 44 45 45 45 44 44 44 45 44 45 44 44 44 44 45 44 44 44 44 45 45 45 45 44 44 44 45 45 45 44 44 45 44 45 45 44 44 44 44 45 45 45 44 45 44 44 44 44 44 44 45 44 45 45 44 44 44 44 44 45 45 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 45 44 45 44 44 44 44 45 45 44 44 45 45 44 45 45 44 45 45 45 44 44 45 44 44 44 44 44 45 45 44 44 45 44 45 45 44 44 44 45 44 45 44 44 45 44 45 45 44 44 44 45 44 44 44 44 44 44 44 44 44 44 44 45 45 44 45 44 44 44 45 45 44 44 44 44 44 44 45 44 44 44 44 45 44 44 45 44 44 44 44 44 44 44 45 45 45 45 45 45 44 45 45 44 45 44 45 44 45 44 44 45 45 44 45 44 44 45 44 44 44 45 44 44 44 44 44 44 44 44 44 45 44 44 44 44 45 44 45 45 44 44 44 45 44 45 44 45 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 45 44 45 45 44 44 44 44 44 44 45 44 44 44 44 45 44 44 44 45 44 44 44 45 44 45 44 44 44 44 45 44 45 44 44 44 44 44 45 44 45 44 45 44 45 45 44 45 44 44 44 44 45 44 44 44 44 45 44 45 45 44 45 44 44 44 44 44 44 45 44 44 44 44 45 44 44 44 44 44 44 44 44 44 45 44 44 45 44 45 45 44 44 44 45 44 44 44 44 45 44 45 44 44 45 44 44 44 44 45 44 45 44 44 45 44 45 45 44 45 44 44 45 44 45 44 45 44 44 45 44 44 44 45 45 44 44 44 45 44 44 45 45 44 45 44 44 44 45 44 44 44 44 45 44 44 45 44 44 45 44 44 44 44 44 45 44 44 45 44 44 44 44 45 45 44 45 44 44 45 44 45 44 45 44 44 45 44 44 44 44 44 44 44 45 44 45 44 44 44 45 45 45 44 44
*/
| 43.484615 | 2,999 | 0.658588 |
8ef9840a30c3f13e62f319d757cfb5db8c766a5d | 2,709 | asm | Assembly | buildTools/win32-x64/gbdk/libc/isalpha.asm | asiekierka/gb-studio | 0ff8b7c5bd661a13c2b574e844ae7f2299b439e2 | [
"MIT"
] | 6,433 | 2019-04-17T14:58:27.000Z | 2022-03-31T08:41:22.000Z | buildTools/win32-x64/gbdk/libc/isalpha.asm | asiekierka/gb-studio | 0ff8b7c5bd661a13c2b574e844ae7f2299b439e2 | [
"MIT"
] | 878 | 2019-04-18T18:57:48.000Z | 2022-03-31T19:42:20.000Z | buildTools/win32-x64/gbdk/libc/isalpha.asm | asiekierka/gb-studio | 0ff8b7c5bd661a13c2b574e844ae7f2299b439e2 | [
"MIT"
] | 440 | 2019-04-18T18:10:50.000Z | 2022-03-31T21:30:57.000Z | ;--------------------------------------------------------
; File Created by SDCC : FreeWare ANSI-C Compiler
; Version 2.3.1 Wed Sep 04 21:56:16 2019
;--------------------------------------------------------
.module isalpha
;--------------------------------------------------------
; Public variables in this module
;--------------------------------------------------------
.globl _isalpha
;--------------------------------------------------------
; special function registers
;--------------------------------------------------------
;--------------------------------------------------------
; special function bits
;--------------------------------------------------------
;--------------------------------------------------------
; internal ram data
;--------------------------------------------------------
.area _DATA
;--------------------------------------------------------
; overlayable items in internal ram
;--------------------------------------------------------
.area _OVERLAY
;--------------------------------------------------------
; indirectly addressable internal ram data
;--------------------------------------------------------
.area _ISEG
;--------------------------------------------------------
; bit data
;--------------------------------------------------------
.area _BSEG
;--------------------------------------------------------
; external ram data
;--------------------------------------------------------
.area _XSEG
;--------------------------------------------------------
; global & static initialisations
;--------------------------------------------------------
.area _GSINIT
.area _GSFINAL
.area _GSINIT
;--------------------------------------------------------
; Home
;--------------------------------------------------------
.area _HOME
.area _CODE
;--------------------------------------------------------
; code
;--------------------------------------------------------
.area _CODE
; isalpha.c 3
; genLabel
; genFunction
; ---------------------------------
; Function isalpha
; ---------------------------------
___isalpha_start:
_isalpha:
; isalpha.c 5
; genCmpLt
; AOP_STK for
lda hl,2(sp)
ld a,(hl)
xor a,#0x80
cp #0x61^0x80
jp c,00106$
; genCmpGt
; AOP_STK for
ld e,#0xFA
ld a,(hl)
xor a,#0x80
ld d,a
ld a,e
sub a,d
jp nc,00101$
; genLabel
00106$:
; genCmpLt
; AOP_STK for
lda hl,2(sp)
ld a,(hl)
xor a,#0x80
cp #0x41^0x80
jp c,00102$
; genCmpGt
; AOP_STK for
ld e,#0xDA
ld a,(hl)
xor a,#0x80
ld d,a
ld a,e
sub a,d
jp c,00102$
; genLabel
00101$:
; isalpha.c 6
; genRet
ld e,#0x01
jp 00107$
; genLabel
00102$:
; isalpha.c 8
; genRet
ld e,#0x00
; genLabel
00107$:
; genEndFunction
ret
___isalpha_end:
.area _CODE
| 23.556522 | 57 | 0.31746 |
c9c7a0bd2b9893a2b247f97a122f06c578866552 | 333 | asm | Assembly | oeis/021/A021507.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/021/A021507.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/021/A021507.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A021507: Decimal expansion of 1/503.
; Submitted by Jamie Morken(s1.)
; 0,0,1,9,8,8,0,7,1,5,7,0,5,7,6,5,4,0,7,5,5,4,6,7,1,9,6,8,1,9,0,8,5,4,8,7,0,7,7,5,3,4,7,9,1,2,5,2,4,8,5,0,8,9,4,6,3,2,2,0,6,7,5,9,4,4,3,3,3,9,9,6,0,2,3,8,5,6,8,5,8,8,4,6,9,1,8,4,8,9,0,6,5,6,0,6,3,6,1
add $0,1
mov $1,10
pow $1,$0
div $1,503
mov $0,$1
mod $0,10
| 30.272727 | 199 | 0.558559 |
08299e46bf0776c2bce964b26e9462b40c0e404b | 519 | asm | Assembly | oeis/010/A010638.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/010/A010638.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/010/A010638.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A010638: Decimal expansion of cube root of 68.
; Submitted by Christian Krause
; 4,0,8,1,6,5,5,1,0,1,9,1,7,3,4,8,0,7,0,5,6,5,7,8,1,6,1,3,2,2,6,0,4,2,9,6,5,2,0,7,2,7,6,5,8,2,4,5,3,4,3,8,9,5,5,2,0,9,3,3,9,4,0,1,3,0,2,6,5,2,7,2,8,2,2,3,3,5,6,9,6,4,4,6,3,8,1,1,3,0,9,8,7,5,0,9,9,3,3,3
mov $3,$0
mul $3,2
lpb $3
add $6,$2
add $1,$6
add $1,$2
add $1,64
mov $2,$1
mul $2,16
sub $3,1
add $5,$2
add $6,$5
lpe
mov $1,$5
mov $4,10
pow $4,$0
mul $4,4
div $2,$4
add $2,1
div $1,$2
mov $0,$1
add $0,$4
mod $0,10
| 18.535714 | 201 | 0.537572 |
d691a572be3102073c95c585adc9d04e978beb97 | 810 | asm | Assembly | pwnlib/shellcraft/templates/i386/linux/mprotect_all.asm | kristoff3r/pwntools | 9d94de956501dcf5f60c5a382c9a52078df99533 | [
"MIT"
] | 6 | 2019-05-29T15:02:21.000Z | 2021-04-09T03:52:02.000Z | pwnlib/shellcraft/templates/i386/linux/mprotect_all.asm | kristoff3r/pwntools | 9d94de956501dcf5f60c5a382c9a52078df99533 | [
"MIT"
] | null | null | null | pwnlib/shellcraft/templates/i386/linux/mprotect_all.asm | kristoff3r/pwntools | 9d94de956501dcf5f60c5a382c9a52078df99533 | [
"MIT"
] | 3 | 2018-03-04T03:08:02.000Z | 2020-04-22T18:57:44.000Z | <% from pwnlib.shellcraft import common %>
<%page args="clear_ebx = True, fix_null = False"/>
<%docstring>Calls mprotect(page, 4096, PROT_READ | PROT_WRITE | PROT_EXEC) for every page.
It takes around 0.3 seconds on my box, but your milage may vary.
Args:
clear_ebx(bool): If this is set to False, then the shellcode will assume that ebx has already been zeroed.
fix_null(bool): If this is set to True, then the NULL-page will also be mprotected at the cost of slightly larger shellcode
</%docstring>
<% label = common.label("mprotect_loop") %>
%if clear_ebx:
xor ebx, ebx
%endif
%if fix_null:
xor ecx, ecx
%endif
${label}:
push PROT_READ | PROT_WRITE | PROT_EXEC
pop edx
push SYS_mprotect
pop eax
int 0x80
xor ecx, ecx
mov ch, 0x10
add ebx, ecx
jnz ${label}
| 27.931034 | 125 | 0.697531 |
656333b9b6f90fe57206d71f501c746fb7cb5143 | 1,608 | asm | Assembly | programs/oeis/107/A107660.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/107/A107660.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/107/A107660.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A107660: Sum 3^max(k,n-k),k=0..n.
; 1,6,21,72,225,702,2133,6480,19521,58806,176661,530712,1592865,4780782,14344533,43040160,129127041,387400806,1162222101,3486725352,10460235105,31380882462,94142824533,282429005040,847287546561,2541864234006,7625594296341,22876787671992,68630367798945,205891117745742,617673367586133,1853020145805120,5559060480462081,16677181570526406,50031544840719381,150094634909578632,450283905116156385,1350851716510730622,4052555150694453333,12157665455570144400,36472996370197217601,109418989121052006006,328256967373616371221,984770902152230173272,2954312706488071579425,8862938119558357917102,26588814358769216930133,79766443076590080326880,239299329230052670517121,717897987691005300160806,2153693963073863189091861,6461081889224131433103912,19383245667674936165140065,58149737003032434092905182,174449211009104927876200533,523347633027337660421056560,1570042899082035858055624641,4710128697246176204544238806,14130386091738597244010081301,42391158275215997623162338552,127173474825648198760619110305,381520424476945213955253614862,1144561273430836259539157128533,3433683820292510631637660237440,10301051460877533747933169564161,30903154382632606802860075248006,92709463147897825967640792299541,278128389443693494580104076565192,834385168331080500417493929362145,2503155504993241551284026887086142,7509466514979724703883625760258133,22528399544939174261745512577773520,67585198634817522935331173030319681,202755595904452569256277424981956406,608266787713357708219116180836866581
add $0,1
seq $0,32096 ; "BHK" (reversible, identity, unlabeled) transform of 2,2,2,2,...
sub $0,2
| 229.714286 | 1,472 | 0.920398 |
19bae466b0c24bc53d21cba774ae8e88472d51f3 | 4,821 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xa0_notsx.log_21829_379.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xa0_notsx.log_21829_379.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xa0_notsx.log_21829_379.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r8
push %r9
push %rcx
push %rdi
push %rsi
lea addresses_UC_ht+0x1728f, %rsi
lea addresses_A_ht+0x14556, %rdi
clflush (%rsi)
nop
nop
nop
nop
nop
sub $5389, %r11
mov $91, %rcx
rep movsb
and $56581, %rcx
lea addresses_D_ht+0x1490e, %rsi
lea addresses_WC_ht+0x16e36, %rdi
nop
nop
inc %r9
mov $127, %rcx
rep movsq
nop
nop
nop
nop
nop
and $33439, %r9
lea addresses_WC_ht+0x17c56, %r8
nop
nop
dec %r9
mov (%r8), %r11d
nop
add %rcx, %rcx
lea addresses_WC_ht+0x1ab56, %rsi
nop
nop
nop
add $42682, %r8
movl $0x61626364, (%rsi)
nop
nop
mfence
pop %rsi
pop %rdi
pop %rcx
pop %r9
pop %r8
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r12
push %r13
push %rcx
push %rdx
// Faulty Load
lea addresses_A+0xbc56, %r10
nop
nop
nop
nop
and $31871, %r12
mov (%r10), %cx
lea oracles, %rdx
and $0xff, %rcx
shlq $12, %rcx
mov (%rdx,%rcx,1), %rcx
pop %rdx
pop %rcx
pop %r13
pop %r12
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'src': {'type': 'addresses_A', 'AVXalign': True, 'size': 8, 'NT': False, 'same': False, 'congruent': 0}, 'OP': 'LOAD'}
[Faulty Load]
{'src': {'type': 'addresses_A', 'AVXalign': False, 'size': 2, 'NT': False, 'same': True, 'congruent': 0}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'type': 'addresses_UC_ht', 'congruent': 0, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_A_ht', 'congruent': 8, 'same': False}}
{'src': {'type': 'addresses_D_ht', 'congruent': 3, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_WC_ht', 'congruent': 5, 'same': False}}
{'src': {'type': 'addresses_WC_ht', 'AVXalign': False, 'size': 4, 'NT': False, 'same': True, 'congruent': 8}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'type': 'addresses_WC_ht', 'AVXalign': True, 'size': 4, 'NT': False, 'same': False, 'congruent': 7}}
{'35': 21829}
35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35
*/
| 48.69697 | 2,999 | 0.661481 |
71406f539038dbb6c8b361669b60157399a7f2f8 | 9,573 | asm | Assembly | src/Lib.asm | fostiropoulos/cryptomax | 885b749403ad2292f22a427abb799bd1e60f0113 | [
"MIT"
] | 1 | 2018-10-23T01:49:01.000Z | 2018-10-23T01:49:01.000Z | src/Lib.asm | fostiropoulos/cryptomax | 885b749403ad2292f22a427abb799bd1e60f0113 | [
"MIT"
] | null | null | null | src/Lib.asm | fostiropoulos/cryptomax | 885b749403ad2292f22a427abb799bd1e60f0113 | [
"MIT"
] | null | null | null | ;; Author: Iordanis Fostiropoulos, ifostiropoul2011@my.fit.edu
;; Course: CSE 3120
;; Project: CryptoMax
INCLUDE Irvine32.inc
; Structure used for the mouse pointer
POINT STRUCT
; x coordinate is the horizontal line with 0 being
; the left of the screen and the maximum value being
; the right of the screen
x DWORD ?
; y coordinate is the vertical line with 0 being
; the top of the screen and the maximum value being
; the bottom of the screen
y DWORD ?
POINT ENDS
; Structure that stores the key and its length
CREDENTIALS STRUCT
; key is a pointer to a string
key DWORD ?
; key length is the length of the key initially zero
keyLength DWORD 0
CREDENTIALS ENDS
;---------------INTERNAL PROCEDURES-----------------------
; Opens a file containing encryption key
openEncryptionKey PROTO C, fileName:PTR BYTE
; Saves a key to a file
saveKey PROTO C, fileName:PTR BYTE, keyPTR:PTR CREDENTIALS
; Offsets all the bytes of the file by a rotating keyword
offsetFileBytes PROTO C, fileName:PTR BYTE, keyword:PTR BYTE,
keywordLength:DWORD, isNegativeOffset:BYTE
; generate a key using the mouse
generateMouseKey PROTO C
; generate a random key
generateRandomKey PROTO C
; finds the mod of number%256
modular PROTO
;---------------------------------------------------------
;---------------EXTERNAL PROCEDURES-----------------------
; External C procedure, deletes a file
remove PROTO C, filename:PTR BYTE
; Win32 procedure to get the coordinates of the cursor
GetCursorPos PROTO, p:PTR POINT
; Win32 procedure to get the size of the file to determine how
; many bytes it contains
GetFileSize PROTO, hFile:DWORD,lpFileSizeHigh:PTR DWORD
; Sleep procedure not currently used in the code.
; it can be added to add a bigger randomization factor
; to the mouse generated key.
Sleep PROTO, p:DWORD
;---------------------------------------------------------
.data
; create data segment for key
; size is 256 to have a null terminated
; key. This way it is less error prone for
; buffer overflow.
key BYTE 256 DUP(0)
; Variables used by
; generateMouseKey PROC
prevX DWORD 0
prevY DWORD 0
curX DWORD 0
curY DWORD 0
; Pointer that points at the address of the stack
; that the file buffer is stored.
fileDataStackPtr DWORD 0
; File handlers variables
inputFileHandler DWORD ?
outputFileHandler DWORD ?
; The size of the input file
inputFileSize DWORD ?
; Data structure that is used to return the mouse coordinates
mouseData POINT <>
; Credentials structure that stores the size and address of the key location
credential CREDENTIALS <OFFSET key>
.code
;---------------------------------------------
moveFileToBuffer MACRO fileName
; Opens a file and transfers its contents to
; the stack.
; Input: fileName, the location of the file to be
; opened
; WARNING: If the input file is too big, it will
; cause stack overflow. Workaround is discussed
; in the report.
;---------------------------------------------
; open file segment and save to buffer
mov edx, fileName
call OpenInputFile
;cmp eax,-1
;je returnFalse
mov inputFileHandler,eax
INVOKE GetFileSize,
eax,NULL
mov inputFileSize, eax
sub esp,inputFileSize
mov fileDataStackPtr,esp
mov eax, inputFileHandler
mov edx, esp
mov ecx,inputFileSize
call ReadFromFile
mov eax,inputFileHandler
call CloseFile
; end of open file segment
ENDM
;---------------------------------------------
moveBufferToFile MACRO fileName
; Opens a file and transfers the contents of
; the stack.
; Input: fileName, the location of the file to be
; opened
;---------------------------------------------
; delete existing file and replace it with the buffer we have
INVOKE remove,
fileName
mov edx, fileName
call CreateOutputFile
mov outputFileHandler,eax
; write data to file
mov eax,outputFileHandler
mov edx, fileDataStackPtr
mov ecx,inputFileSize
call WriteToFile
add esp, inputFileSize
; close file
mov eax,outputFileHandler
call CloseFile
ENDM
;---------------------------------------------
modular PROC
; Takes a value and finds its mod of 256
; if the value is negative it adds 256 to the final
; value to normalize it.
; Input: EAX, number whose mod to find
; Output: EAX, final value
;---------------------------------------------
mov eax,[esp+4]
; eax= eax%256
; this code sample was copied and modified from
; http://stackoverflow.com/questions/8231882/how-to-implement-the-mod-operator-in-assembly
MOV ECX,255
CDQ ;this will clear EDX due to the sign extension
IDIV ECX
MOV EAX,EDX
; because modular for negative numbers
; is defined differently, if the final number is negative
; we add the offset of 256
cmp eax,0
jge procedureEnd
add EAX,256
procedureEnd:
mov [esp+4],eax
ret
modular ENDP
;---------------------------------------------
saveKey PROC C,fileName:PTR BYTE,
keyPTR:PTR CREDENTIALS
; Save key to file
; Input: FileName, string to file
; keyPTR, the pointer to the key structure
; Output: no output
;---------------------------------------------
INVOKE remove,
fileName
mov edx, fileName
call CreateOutputFile
mov outputFileHandler,eax
mov eax,[keyPTR]
mov edx, [eax].CREDENTIALS.key
mov ecx,[eax].CREDENTIALS.keyLength
mov eax,outputFileHandler
call WriteToFile
mov eax,inputFileHandler
call CloseFile
ret
saveKey ENDP
;---------------------------------------------
openEncryptionKey PROC C,fileName:PTR BYTE
; Opens encryption key and returns the key in
; a datastructure of type Credentials
; Input: fileName, Path to the file containing the key
; Output: PTR CREDENTIALS, contains the key
;---------------------------------------------
moveFileToBuffer fileName
; error checking
cmp inputFileSize,0
je finish
mov ecx,0
; copy string procedure from buffer to memory
copyStr:
mov edx, fileDataStackPtr
mov eax,0
mov al,BYTE PTR [edx+ecx]
mov key[ecx],al
inc ecx
cmp ecx,inputFileSize
jne copyStr
add esp,inputFileSize
finish:
; output the structure
mov eax, inputFileSize
mov credential.keyLength, eax
mov eax, OFFSET credential
ret
openEncryptionKey ENDP
;---------------------------------------------
offsetFileBytes PROC C,
fileName:PTR BYTE,
keyword:PTR BYTE,
keywordLength:DWORD,
isNegativeOffset:BYTE
; Main encryption function.
; offsets all the bytes upward or downward (addition or substraction)
; to obscure their information.
; Input: fileName, the location of the file to open
; keyword, the keyword string
; keywordLength the size of the keyword
; isNegativeOffset, true for decryption, false for encryption
; it is the offset by which we move the bytes
;---------------------------------------------
moveFileToBuffer fileName
; loop through data in the memory and
; rotate them
mov ecx,0 ; Primary Pointer
mov ebx,0 ; Secondary Pointer
readDataTop:
push ecx
push ebx
mov eax,0
mov edx, fileDataStackPtr
mov al, [edx+ecx]
mov edx, keyword
; negative offset means substraction
cmp isNegativeOffset,0
je fileEncoding
sub al, [edx+ebx] ; decoding
jmp endOfEncoding
fileEncoding:
add al, [edx+ebx] ; encoding
endOfEncoding:
push eax
call modular
pop eax
; restore pointers
pop ebx
pop ecx
; write the data to the memory
mov edx, fileDataStackPtr
mov [edx+ecx],al
inc ecx
inc ebx
cmp ebx, keywordLength
jne keyElementWithinLimits
mov ebx,0
keyElementWithinLimits:
cmp ecx,inputFileSize
jne readDataTop
moveBufferToFile fileName
; return true
mov eax,1
jmp procedureEnd
returnFalse:
; return false
mov eax,0
procedureEnd:
ret
offsetFileBytes ENDP
;---------------------------------------------
generateRandomKey PROC C
; Generates a random key
; Input: no input
; Output: A credentials structure with the key.
;---------------------------------------------
INVOKE Randomize
mov ecx,0
top:
mov eax, 256
push ecx
INVOKE RandomRange
push eax
call modular
pop eax
pop ecx
mov key[ecx],al
inc ecx
cmp ecx,255
jne top
mov credential.keyLength,255
mov eax, OFFSET credential
ret
generateRandomKey ENDP
;---------------------------------------------
generateMouseKey PROC C
;
; Inputs an integer n and displays a
; multiplication table ranging from n * 2^1
; to n * 2^10.
;----------------------------------------------
mov ecx, 0
top:
; calculated time it takes to generate a
; 255 byte key over 20 seconds (20/(255/2))
; 20 seconds divided by 255(key size) divided by 2 (the coordinates)
push ecx
; induce randomize factor
;INVOKE Sleep, 156
INVOKE GetCursorPos,
ADDR mouseData
; find the mod number of the coordinates
push mouseData.x
call modular
pop eax
pop ecx
; compare the data of the cordinates with before
; to avoid repetitive keyword terms
cmp eax,prevX
je top
mov curX, eax
mov prevX,eax
push ecx
; find the mod number of the coordinates
push mouseData.y
call modular
pop eax
pop ecx
cmp eax,prevY
je top
mov curY,eax
mov prevY,eax
; if the coordinates' mod 256 is unique
; move them to the key memory
mov eax, curX
mov key[ecx],al
inc ecx
mov eax, curY
mov key[ecx],al
inc ecx
; generate 255 byte key
cmp ecx,255
jb top
; return
mov credential.keyLength,255
mov eax, OFFSET credential
ret
generateMouseKey ENDP
END | 23.123188 | 95 | 0.653505 |
1de01797795daaa5b7981bbb050899bd524a11e5 | 953 | asm | Assembly | oeis/000/A000912.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/000/A000912.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/000/A000912.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A000912: Expansion of (sqrt(1-4x^2) - sqrt(1-4x))/(2x).
; Submitted by Jon Maiga
; 1,0,2,4,14,40,132,424,1430,4848,16796,58744,208012,742768,2674440,9694416,35357670,129643360,477638700,1767258328,6564120420,24466250224,91482563640,343059554864,1289904147324,4861946193440,18367353072152,69533550173104,263747951750360,1002242213976928,3814986502092304,14544636029532064,55534064877048198,212336130376885440,812944042149730764,3116285494777656472,11959798385860453492,45950804324144103664,176733862787006701400,680425371728208537200,2622127042276492108820,10113918591631334013600
mov $3,$0
mov $5,2
lpb $5
mov $0,$3
mov $1,0
sub $5,1
add $0,$5
trn $0,1
lpb $0
mov $2,$0
sub $0,1
seq $2,150 ; Number of dissections of an n-gon, rooted at an exterior edge, asymmetric with respect to that edge.
add $1,$2
lpe
mov $0,$1
mul $0,2
add $0,1
mov $6,$5
mul $6,$0
add $4,$6
lpe
min $3,1
mul $3,$0
mov $0,$4
sub $0,$3
| 31.766667 | 498 | 0.745016 |
8a836c3bc1f13ecca7ddecb9ace299dca42d400c | 6,721 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0xca_notsx.log_21829_316.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0xca_notsx.log_21829_316.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0xca_notsx.log_21829_316.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r12
push %r13
push %r14
push %r8
push %r9
push %rax
push %rbp
push %rcx
push %rdi
push %rsi
lea addresses_A_ht+0x69ca, %r13
and %rax, %rax
movl $0x61626364, (%r13)
nop
sub $58857, %r9
lea addresses_D_ht+0x20ca, %rbp
nop
nop
nop
xor %r12, %r12
movb (%rbp), %r8b
nop
cmp $18102, %r8
lea addresses_A_ht+0x8f8a, %rsi
lea addresses_WT_ht+0x145ca, %rdi
nop
and %rbp, %rbp
mov $58, %rcx
rep movsl
nop
nop
inc %r9
lea addresses_D_ht+0xb006, %r9
nop
nop
nop
dec %rbp
mov (%r9), %r14
nop
nop
nop
add %rcx, %rcx
lea addresses_normal_ht+0x12c8a, %rsi
lea addresses_normal_ht+0x5ee6, %rdi
nop
nop
nop
cmp %r14, %r14
mov $107, %rcx
rep movsb
nop
nop
nop
xor %r13, %r13
lea addresses_A_ht+0x1da84, %r9
nop
xor %r14, %r14
mov $0x6162636465666768, %rcx
movq %rcx, %xmm4
movups %xmm4, (%r9)
nop
nop
sub $16798, %rbp
lea addresses_normal_ht+0x248a, %rsi
lea addresses_UC_ht+0xa65a, %rdi
nop
xor $55022, %r14
mov $21, %rcx
rep movsw
add $37828, %rax
pop %rsi
pop %rdi
pop %rcx
pop %rbp
pop %rax
pop %r9
pop %r8
pop %r14
pop %r13
pop %r12
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r12
push %r15
push %rbx
push %rdi
push %rdx
push %rsi
// Load
mov $0xdca, %r12
nop
nop
nop
nop
add $47265, %rdx
mov (%r12), %rbx
nop
nop
nop
nop
nop
cmp %r15, %r15
// Store
lea addresses_UC+0x183ca, %rsi
nop
nop
nop
nop
sub $38756, %rdi
mov $0x5152535455565758, %r12
movq %r12, (%rsi)
nop
nop
and %rbx, %rbx
// Store
lea addresses_US+0xc452, %rdi
nop
nop
sub %r15, %r15
mov $0x5152535455565758, %r12
movq %r12, %xmm5
movaps %xmm5, (%rdi)
nop
nop
nop
nop
nop
sub $52996, %rdx
// Load
lea addresses_WT+0x95ca, %rdi
nop
cmp %rsi, %rsi
mov (%rdi), %dx
and $39854, %rsi
// Faulty Load
lea addresses_WT+0x95ca, %rsi
nop
nop
nop
sub %r15, %r15
movups (%rsi), %xmm5
vpextrq $0, %xmm5, %r11
lea oracles, %r12
and $0xff, %r11
shlq $12, %r11
mov (%r12,%r11,1), %r11
pop %rsi
pop %rdx
pop %rdi
pop %rbx
pop %r15
pop %r12
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'src': {'NT': False, 'AVXalign': True, 'size': 32, 'congruent': 0, 'same': False, 'type': 'addresses_WT'}, 'OP': 'LOAD'}
{'src': {'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 11, 'same': False, 'type': 'addresses_P'}, 'OP': 'LOAD'}
{'dst': {'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 9, 'same': False, 'type': 'addresses_UC'}, 'OP': 'STOR'}
{'dst': {'NT': False, 'AVXalign': True, 'size': 16, 'congruent': 2, 'same': False, 'type': 'addresses_US'}, 'OP': 'STOR'}
{'src': {'NT': True, 'AVXalign': False, 'size': 2, 'congruent': 0, 'same': True, 'type': 'addresses_WT'}, 'OP': 'LOAD'}
[Faulty Load]
{'src': {'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 0, 'same': True, 'type': 'addresses_WT'}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'dst': {'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 9, 'same': False, 'type': 'addresses_A_ht'}, 'OP': 'STOR'}
{'src': {'NT': True, 'AVXalign': False, 'size': 1, 'congruent': 8, 'same': False, 'type': 'addresses_D_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 3, 'same': True, 'type': 'addresses_A_ht'}, 'dst': {'congruent': 11, 'same': False, 'type': 'addresses_WT_ht'}, 'OP': 'REPM'}
{'src': {'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 1, 'same': True, 'type': 'addresses_D_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 6, 'same': False, 'type': 'addresses_normal_ht'}, 'dst': {'congruent': 2, 'same': False, 'type': 'addresses_normal_ht'}, 'OP': 'REPM'}
{'dst': {'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 0, 'same': False, 'type': 'addresses_A_ht'}, 'OP': 'STOR'}
{'src': {'congruent': 6, 'same': False, 'type': 'addresses_normal_ht'}, 'dst': {'congruent': 4, 'same': False, 'type': 'addresses_UC_ht'}, 'OP': 'REPM'}
{'39': 21829}
39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39
*/
| 35.941176 | 2,999 | 0.654813 |
8ac1412708dbb53f6e9966eb7e186e8231ac4b8e | 209 | asm | Assembly | Take Home Test/Kamal_Faheem_Code/Kamal_Faheem_2.21.asm | FaheemAKamal/CS342Projects | adf4d5e378f68c40862632ee5b7eb9c4a021f5ed | [
"MIT"
] | null | null | null | Take Home Test/Kamal_Faheem_Code/Kamal_Faheem_2.21.asm | FaheemAKamal/CS342Projects | adf4d5e378f68c40862632ee5b7eb9c4a021f5ed | [
"MIT"
] | null | null | null | Take Home Test/Kamal_Faheem_Code/Kamal_Faheem_2.21.asm | FaheemAKamal/CS342Projects | adf4d5e378f68c40862632ee5b7eb9c4a021f5ed | [
"MIT"
] | null | null | null | .data
a: .word 1
b: .word 2
c: .word 3
d: .word 4
e: .word 5
.text
lw $s0, a
lw $s1, b
lw $s2, c
lw $s3, d
lw $s4, e
# a = b + c
add $s0, $s1, $s2
sw $s0, a
# d = a - e
sub $s3, $s0, $s4
sw $s3, d
| 9.952381 | 17 | 0.464115 |
3fb9ee76dc99e1c384f23ccb2eef58f30307216b | 129 | asm | Assembly | docs/test_files/getc_test.asm | carlosebmachado/little-computer-3 | a6bef1bce2cbdd325649721769cce5b17011c702 | [
"MIT"
] | null | null | null | docs/test_files/getc_test.asm | carlosebmachado/little-computer-3 | a6bef1bce2cbdd325649721769cce5b17011c702 | [
"MIT"
] | null | null | null | docs/test_files/getc_test.asm | carlosebmachado/little-computer-3 | a6bef1bce2cbdd325649721769cce5b17011c702 | [
"MIT"
] | null | null | null | .orig 0x3000
GETC ; ascii val into R0
ADD R3 , R0 , x0
ADD R3 , R3 , #-16
ADD R3 , R3 , #-16
ADD R3 , R3 , #-16
halt
.end | 12.9 | 25 | 0.550388 |
4ae0e5183b33177accdea851f313cf3f047e74ff | 5,326 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_sm_/i9-9900K_12_0xa0_notsx.log_408_1979.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_sm_/i9-9900K_12_0xa0_notsx.log_408_1979.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_sm_/i9-9900K_12_0xa0_notsx.log_408_1979.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r13
push %r14
push %r15
push %r9
push %rbp
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_normal_ht+0xcb4f, %r14
nop
nop
nop
nop
nop
lfence
vmovups (%r14), %ymm7
vextracti128 $0, %ymm7, %xmm7
vpextrq $0, %xmm7, %r9
and $18796, %r9
lea addresses_D_ht+0x724f, %rbp
nop
nop
xor $7225, %rdx
movb $0x61, (%rbp)
xor $167, %r9
lea addresses_A_ht+0xcacf, %r15
nop
add %r13, %r13
mov $0x6162636465666768, %rdx
movq %rdx, %xmm6
movups %xmm6, (%r15)
nop
nop
nop
nop
nop
and %r14, %r14
lea addresses_WC_ht+0x797, %r15
nop
nop
xor $56393, %rbp
movb (%r15), %r13b
nop
inc %r13
lea addresses_D_ht+0xd6cf, %rsi
lea addresses_WT_ht+0x651f, %rdi
clflush (%rsi)
dec %r14
mov $92, %rcx
rep movsb
nop
nop
nop
nop
nop
xor %r9, %r9
lea addresses_WT_ht+0x5ff, %rsi
lea addresses_WT_ht+0x4f0f, %rdi
xor $26695, %rdx
mov $29, %rcx
rep movsb
and %rdi, %rdi
lea addresses_WC_ht+0x41d9, %r13
clflush (%r13)
sub $53931, %rbp
and $0xffffffffffffffc0, %r13
vmovaps (%r13), %ymm3
vextracti128 $1, %ymm3, %xmm3
vpextrq $0, %xmm3, %r9
nop
nop
nop
add %r9, %r9
lea addresses_D_ht+0xe97, %rsi
lea addresses_A_ht+0x18d0f, %rdi
sub %r15, %r15
mov $126, %rcx
rep movsq
nop
nop
nop
nop
nop
cmp $514, %r13
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbp
pop %r9
pop %r15
pop %r14
pop %r13
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r11
push %r12
push %r14
push %r9
push %rbx
push %rdi
// Store
lea addresses_RW+0x7ecf, %r12
nop
nop
cmp %r10, %r10
mov $0x5152535455565758, %r14
movq %r14, %xmm1
vmovups %ymm1, (%r12)
nop
nop
sub $59598, %rdi
// Store
lea addresses_normal+0x16e37, %r10
add %rbx, %rbx
movw $0x5152, (%r10)
nop
nop
nop
nop
xor $18439, %r14
// Store
lea addresses_UC+0x27cd, %rbx
nop
nop
nop
nop
nop
cmp %r9, %r9
mov $0x5152535455565758, %r11
movq %r11, %xmm3
movntdq %xmm3, (%rbx)
nop
sub %rdi, %rdi
// Store
mov $0x7c5b700000000e6f, %r11
nop
dec %r9
movb $0x51, (%r11)
nop
add $48370, %rdi
// Faulty Load
lea addresses_RW+0x7ecf, %r9
nop
nop
nop
xor %r10, %r10
movups (%r9), %xmm7
vpextrq $0, %xmm7, %r12
lea oracles, %r14
and $0xff, %r12
shlq $12, %r12
mov (%r14,%r12,1), %r12
pop %rdi
pop %rbx
pop %r9
pop %r14
pop %r12
pop %r11
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'src': {'type': 'addresses_RW', 'AVXalign': False, 'size': 8, 'NT': False, 'same': False, 'congruent': 0}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'type': 'addresses_RW', 'AVXalign': False, 'size': 32, 'NT': False, 'same': True, 'congruent': 0}}
{'OP': 'STOR', 'dst': {'type': 'addresses_normal', 'AVXalign': False, 'size': 2, 'NT': False, 'same': False, 'congruent': 3}}
{'OP': 'STOR', 'dst': {'type': 'addresses_UC', 'AVXalign': False, 'size': 16, 'NT': True, 'same': False, 'congruent': 1}}
{'OP': 'STOR', 'dst': {'type': 'addresses_NC', 'AVXalign': False, 'size': 1, 'NT': False, 'same': False, 'congruent': 4}}
[Faulty Load]
{'src': {'type': 'addresses_RW', 'AVXalign': False, 'size': 16, 'NT': False, 'same': True, 'congruent': 0}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'type': 'addresses_normal_ht', 'AVXalign': False, 'size': 32, 'NT': False, 'same': False, 'congruent': 7}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'type': 'addresses_D_ht', 'AVXalign': False, 'size': 1, 'NT': False, 'same': False, 'congruent': 2}}
{'OP': 'STOR', 'dst': {'type': 'addresses_A_ht', 'AVXalign': False, 'size': 16, 'NT': False, 'same': True, 'congruent': 10}}
{'src': {'type': 'addresses_WC_ht', 'AVXalign': False, 'size': 1, 'NT': False, 'same': False, 'congruent': 1}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_D_ht', 'congruent': 10, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_WT_ht', 'congruent': 3, 'same': False}}
{'src': {'type': 'addresses_WT_ht', 'congruent': 4, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_WT_ht', 'congruent': 5, 'same': False}}
{'src': {'type': 'addresses_WC_ht', 'AVXalign': True, 'size': 32, 'NT': True, 'same': False, 'congruent': 0}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_D_ht', 'congruent': 3, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_A_ht', 'congruent': 5, 'same': False}}
{'58': 408}
58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58
*/
| 26.89899 | 1,223 | 0.651709 |
7bf15fc688cd1cb93a6733714a5c031c9dac2bcb | 16,758 | asm | Assembly | debug.asm | joker-xii/c-compiler | 73fa86a6d0fc7d6032dbbedc314481d11bccb8c6 | [
"MIT"
] | 6 | 2018-12-24T06:20:17.000Z | 2021-09-05T06:49:11.000Z | debug.asm | joker-xii/c-compiler | 73fa86a6d0fc7d6032dbbedc314481d11bccb8c6 | [
"MIT"
] | null | null | null | debug.asm | joker-xii/c-compiler | 73fa86a6d0fc7d6032dbbedc314481d11bccb8c6 | [
"MIT"
] | 2 | 2018-12-24T12:21:26.000Z | 2020-04-08T07:21:28.000Z | .model flat,stdcall
option casemap :none
includelib kernel32.lib
includelib masm32.lib
includelib msvcrt.lib
printf PROTO C:ptr sbyte,:vararg
scanf PROTO C:ptr sbyte,:vararg
ExitProcess PROTO STDCALL:DWORD
StdOut PROTO STDCALL:DWORD
StdIn PROTO :DWORD,:DWORD
my_inner_struct$ STRUCT
in$ DWORD ?
my_inner_struct$ ENDS
my_struct$ STRUCT
a$ DWORD ?
b$ DWORD ?
c$ DWORD ?
my_struct$ ENDS
.data
$$read_char BYTE '%c',0
i$_1 DWORD ?
$return_value_0 DWORD ?
i$_2 DWORD ?
str$_3 DWORD ?
CONST_42 DWORD 0
$Temp_100_5 DWORD ?
cur$_4 DWORD ?
$Temp_101_7 DWORD ?
$Temp_1_8 DWORD ?
$Temp_2_9 DWORD ?
$Temp_102_11 DWORD ?
str$_14 DWORD ?
n$_15 DWORD ?
$Temp_103_17 DWORD ?
i$_16 DWORD ?
$Temp_104_18 DWORD ?
CONST_86 DWORD 1
$Temp_5_19 DWORD ?
$Temp_105_20 DWORD ?
$Temp_6_21 DWORD ?
$Temp_7_22 DWORD ?
$Temp_106_24 DWORD ?
CONST_102 DWORD 10
$Temp_8_25 DWORD ?
CONST_107 BYTE ' '
$Temp_107_26 DWORD ?
$Temp_9_27 DWORD ?
$Temp_10_28 DWORD ?
$Temp_108_30 BYTE ?
$Temp_109_32 BYTE ?
$return_value_13 DWORD ?
i$_33 DWORD ?
$Temp_110_36 DWORD ?
cnt$_35 DWORD ?
$Temp_111_37 DWORD ?
$Temp_13_38 DWORD ?
$Temp_14_39 DWORD ?
CONST_166 BYTE '-'
$Temp_112_40 DWORD ?
$Temp_113_42 DWORD ?
$Temp_16_43 DWORD ?
CONST_179 BYTE '0'
$Temp_114_44 DWORD ?
$Temp_18_46 DWORD ?
cs$_34 BYTE 20 DUP(?)
$Temp_115_48 DWORD ?
$Temp_20_49 DWORD ?
$Temp_116_50 DWORD ?
$Temp_21_51 DWORD ?
$Temp_117_52 BYTE ?
$Temp_118_53 DWORD ?
$Temp_119_54 DWORD ?
$Temp_120_55 DWORD ?
$Temp_22_56 DWORD ?
$Temp_121_58 DWORD ?
$Temp_122_62 DWORD ?
minus$_61 DWORD ?
$Temp_123_64 DWORD ?
result$_63 DWORD ?
$Temp_25_65 DWORD ?
ch$_66 DWORD ?
$Temp_124_67 DWORD ?
$Temp_26_68 DWORD ?
$Temp_125_69 DWORD ?
$Temp_27_70 DWORD ?
CONST_266 BYTE '9'
$Temp_126_71 DWORD ?
$Temp_28_72 DWORD ?
$Temp_29_73 DWORD ?
$Temp_30_74 DWORD ?
$Temp_127_75 DWORD ?
$Temp_31_76 DWORD ?
$Temp_128_77 DWORD ?
$Temp_129_78 DWORD ?
$Temp_32_79 DWORD ?
$Temp_33_80 DWORD ?
$Temp_130_81 DWORD ?
$Temp_34_82 DWORD ?
$Temp_131_83 DWORD ?
$Temp_35_84 DWORD ?
$Temp_36_85 DWORD ?
$Temp_132_86 DWORD ?
$Temp_37_87 DWORD ?
$Temp_133_88 DWORD ?
$Temp_38_89 DWORD ?
$Temp_134_90 DWORD ?
$Temp_39_91 DWORD ?
$Temp_135_92 DWORD ?
$Temp_40_93 DWORD ?
$return_value_60 DWORD ?
arr$_94 DWORD ?
n$_95 DWORD ?
$Temp_136_98 DWORD ?
i$_96 DWORD ?
$Temp_137_99 DWORD ?
$Temp_41_100 DWORD ?
$Temp_138_101 DWORD ?
$Temp_42_102 DWORD ?
$Temp_43_103 DWORD ?
$Temp_139_104 DWORD ?
j$_97 DWORD ?
$Temp_44_105 DWORD ?
$Temp_140_106 DWORD ?
$Temp_45_107 DWORD ?
$Temp_141_108 DWORD ?
$Temp_46_109 DWORD ?
$Temp_47_110 DWORD ?
$Temp_142_112 DWORD ?
$Temp_49_113 DWORD ?
$Temp_51_115 DWORD ?
tmp$_117 DWORD ?
$Temp_143_119 DWORD ?
$Temp_54_120 DWORD ?
$Temp_144_122 DWORD ?
$Temp_56_123 DWORD ?
arr$_125 DWORD ?
size$_126 DWORD ?
$Temp_145_128 DWORD ?
i$_127 DWORD ?
$Temp_58_129 DWORD ?
$Temp_59_130 DWORD ?
$Temp_146_133 DWORD ?
arr$_136 DWORD ?
n$_137 DWORD ?
$Temp_147_140 DWORD ?
sum$_139 DWORD ?
$Temp_148_141 DWORD ?
i$_138 DWORD ?
$Temp_63_142 DWORD ?
$Temp_149_144 DWORD ?
$return_value_135 DWORD ?
CONST_576 BYTE "Input size:",0
$Temp_66_156 DWORD ?
sz$_150 DWORD ?
$Temp_150_158 DWORD ?
CONST_598 BYTE "Input ",0
CONST_608 BYTE " integers:",0
$Temp_151_163 DWORD ?
i$_157 DWORD ?
$Temp_71_164 DWORD ?
$Temp_72_165 DWORD ?
arr$_151 DWORD 1000 DUP(?)
$Temp_74_167 DWORD ?
CONST_644 BYTE "Array after sort():",0
$Temp_152_171 DWORD ?
CONST_661 BYTE "Array sum:",0
$Temp_80_174 DWORD ?
$Temp_153_176 DWORD ?
CONST_687 BYTE "Test struct",0
my$_154 my_struct$ <>
$Temp_86_181 DWORD ?
$Temp_88_183 DWORD ?
$Temp_90_185 DWORD ?
$Temp_154_188 DWORD ?
$Temp_155_192 DWORD ?
$Temp_156_196 DWORD ?
$Temp_157_198 DWORD ?
$return_value_149 DWORD ?
.stack 100
.code
getchar$ PROC
invoke scanf, offset $$read_char, offset i$_1
mov eax,i$_1
mov $return_value_0,eax
ret
getchar$ ENDP
putchar$ PROC
invoke StdOut, addr i$_2
ret
putchar$ ENDP
print_str$ PROC
xor eax,eax
mov eax,CONST_42
mov $Temp_100_5,eax
mov eax,$Temp_100_5
mov cur$_4,eax
jmp LABEL_3
LABEL_0:nop
xor eax,eax
mov esi,cur$_4
mov ebx,[str$_3]
mov al,byte ptr [ebx+1*esi]
mov $Temp_101_7,eax
mov eax,$Temp_101_7
sub eax,CONST_42
test eax,eax
pushfd
pop eax
and eax,0040h ;ZF == 0x0040
shr eax,6
xor eax,1
mov $Temp_1_8,eax
mov eax,$Temp_1_8
and eax,eax
jnz LABEL_3
mov eax,$Temp_1_8
and eax,eax
jz LABEL_2
LABEL_1:nop
mov eax,cur$_4
mov $Temp_2_9,eax
inc cur$_4
jmp LABEL_0
LABEL_3:nop
xor eax,eax
mov esi,cur$_4
mov ebx,[str$_3]
mov al,byte ptr [ebx+1*esi]
mov $Temp_102_11,eax
mov eax,$Temp_102_11
mov i$_2,eax
call putchar$
jmp LABEL_1
LABEL_2:nop
ret
print_str$ ENDP
read_str$ PROC
xor eax,eax
mov eax,CONST_42
mov $Temp_103_17,eax
mov eax,$Temp_103_17
mov i$_16,eax
LABEL_4:nop
xor eax,eax
mov eax,n$_15
mov $Temp_104_18,eax
mov eax,$Temp_104_18
sub eax,CONST_86
mov $Temp_5_19,eax
xor eax,eax
mov eax,i$_16
mov $Temp_105_20,eax
mov eax,$Temp_105_20
sub eax,$Temp_5_19
shr eax,31
mov $Temp_6_21,eax
mov eax,$Temp_6_21
and eax,eax
jz LABEL_5
call getchar$
mov eax,$return_value_0
mov $Temp_7_22,eax
mov eax,$Temp_7_22
mov n$_15,eax
xor eax,eax
mov eax,n$_15
mov $Temp_106_24,eax
mov eax,CONST_102
sub eax,$Temp_106_24
mov $Temp_8_25,eax
mov eax,$Temp_8_25
and eax,eax
jnz LABEL_7
jmp LABEL_6
LABEL_7:nop
xor eax,eax
mov al,CONST_107
mov $Temp_107_26,eax
mov eax,$Temp_107_26
sub eax,n$_15
mov $Temp_9_27,eax
mov eax,$Temp_9_27
and eax,eax
jnz LABEL_8
jmp LABEL_6
LABEL_8:nop
mov eax,i$_16
mov $Temp_10_28,eax
inc i$_16
xor eax,eax
mov eax,n$_15
mov $Temp_108_30,al
mov al,$Temp_108_30
mov esi,$Temp_10_28
mov ebx,[str$_14]
mov byte ptr [ebx+1*esi],al
LABEL_6:nop
jmp LABEL_4
LABEL_5:nop
xor eax,eax
mov eax,CONST_42
mov $Temp_109_32,al
mov al,$Temp_109_32
mov esi,i$_16
mov ebx,[str$_14]
mov byte ptr [ebx+1*esi],al
mov eax,i$_16
mov $return_value_13,eax
ret
read_str$ ENDP
print_int$ PROC
xor eax,eax
mov eax,CONST_42
mov $Temp_110_36,eax
mov eax,$Temp_110_36
mov cnt$_35,eax
xor eax,eax
mov eax,i$_33
mov $Temp_111_37,eax
mov eax,$Temp_111_37
sub eax,CONST_42
shr eax,31
mov $Temp_13_38,eax
mov eax,$Temp_13_38
and eax,eax
jz LABEL_9
mov eax,i$_33
neg eax
mov $Temp_14_39,eax
mov eax,$Temp_14_39
mov i$_33,eax
xor eax,eax
mov al,CONST_166
mov $Temp_112_40,eax
mov eax,$Temp_112_40
mov i$_2,eax
call putchar$
jmp LABEL_10
LABEL_9:nop
LABEL_10:nop
xor eax,eax
mov eax,i$_33
mov $Temp_113_42,eax
mov eax,$Temp_113_42
sub eax,CONST_42
test eax,eax
pushfd
pop eax
and eax,0040h ;ZF == 0x0040
shr eax,6
mov $Temp_16_43,eax
mov eax,$Temp_16_43
and eax,eax
jz LABEL_11
xor eax,eax
mov al,CONST_179
mov $Temp_114_44,eax
mov eax,$Temp_114_44
mov i$_2,eax
call putchar$
jmp LABEL_12
LABEL_11:nop
LABEL_12:nop
LABEL_13:nop
mov eax,i$_33
and eax,eax
jz LABEL_14
mov eax,cnt$_35
mov $Temp_18_46,eax
inc cnt$_35
xor eax,eax
mov eax,i$_33
mov $Temp_115_48,eax
mov eax,$Temp_115_48
cdq
mov ecx,CONST_102
idiv ecx
mov $Temp_20_49,edx
xor eax,eax
mov al,CONST_179
mov $Temp_116_50,eax
mov eax,$Temp_20_49
add eax,$Temp_116_50
mov $Temp_21_51,eax
xor eax,eax
mov eax,$Temp_21_51
mov $Temp_117_52,al
mov al,$Temp_117_52
mov esi,$Temp_18_46
mov byte ptr cs$_34[1*esi],al
xor eax,eax
mov eax,CONST_102
mov $Temp_118_53,eax
mov eax,i$_33
cdq
idiv $Temp_118_53
mov $Temp_119_54,eax
mov eax,$Temp_119_54
mov i$_33,eax
jmp LABEL_13
LABEL_14:nop
LABEL_15:nop
xor eax,eax
mov eax,cnt$_35
mov $Temp_120_55,eax
mov eax,$Temp_120_55
sub eax,CONST_42
shr eax,31
xor eax,1
mov $Temp_22_56,eax
mov eax,$Temp_22_56
and eax,eax
jz LABEL_16
dec cnt$_35
xor eax,eax
mov esi,cnt$_35
mov al,byte ptr cs$_34[1*esi]
mov $Temp_121_58,eax
mov eax,$Temp_121_58
mov i$_2,eax
call putchar$
jmp LABEL_15
LABEL_16:nop
ret
print_int$ ENDP
read_int$ PROC
xor eax,eax
mov eax,CONST_42
mov $Temp_122_62,eax
mov eax,$Temp_122_62
mov minus$_61,eax
xor eax,eax
mov eax,CONST_42
mov $Temp_123_64,eax
mov eax,$Temp_123_64
mov result$_63,eax
call getchar$
mov eax,$return_value_0
mov $Temp_25_65,eax
mov eax,$Temp_25_65
mov ch$_66,eax
LABEL_17:nop
mov eax,CONST_86
and eax,eax
jz LABEL_18
xor eax,eax
mov al,CONST_166
mov $Temp_124_67,eax
mov eax,ch$_66
sub eax,$Temp_124_67
test eax,eax
pushfd
pop eax
and eax,0040h ;ZF == 0x0040
shr eax,6
mov $Temp_26_68,eax
mov eax,$Temp_26_68
and eax,eax
jz LABEL_19
jmp LABEL_18
jmp LABEL_20
LABEL_19:nop
LABEL_20:nop
xor eax,eax
mov al,CONST_179
mov $Temp_125_69,eax
mov eax,ch$_66
sub eax,$Temp_125_69
shr eax,31
xor eax,1
mov $Temp_27_70,eax
xor eax,eax
mov al,CONST_266
mov $Temp_126_71,eax
mov eax,$Temp_126_71
sub eax,ch$_66
shr eax,31
xor eax,1
mov $Temp_28_72,eax
mov eax,$Temp_28_72
mov ebx,$Temp_27_70
test eax,eax
pushfd
pop ecx
test ebx,ebx
pushfd
pop edx
or ecx,edx
and ecx,0040h ;ZF == 0x0040
shr ecx,6
xor ecx,1
mov $Temp_29_73,ecx
mov eax,$Temp_29_73
and eax,eax
jz LABEL_21
jmp LABEL_18
jmp LABEL_22
LABEL_21:nop
LABEL_22:nop
call getchar$
mov eax,$return_value_0
mov $Temp_30_74,eax
mov eax,$Temp_30_74
mov ch$_66,eax
jmp LABEL_17
LABEL_18:nop
xor eax,eax
mov al,CONST_166
mov $Temp_127_75,eax
mov eax,ch$_66
sub eax,$Temp_127_75
test eax,eax
pushfd
pop eax
and eax,0040h ;ZF == 0x0040
shr eax,6
mov $Temp_31_76,eax
mov eax,$Temp_31_76
and eax,eax
jz LABEL_23
xor eax,eax
mov eax,CONST_86
mov $Temp_128_77,eax
mov eax,$Temp_128_77
mov minus$_61,eax
jmp LABEL_24
LABEL_23:nop
xor eax,eax
mov al,CONST_179
mov $Temp_129_78,eax
mov eax,ch$_66
sub eax,$Temp_129_78
mov $Temp_32_79,eax
mov eax,$Temp_32_79
mov result$_63,eax
LABEL_24:nop
LABEL_25:nop
mov eax,CONST_86
and eax,eax
jz LABEL_26
call getchar$
mov eax,$return_value_0
mov $Temp_33_80,eax
mov eax,$Temp_33_80
mov ch$_66,eax
xor eax,eax
mov al,CONST_179
mov $Temp_130_81,eax
mov eax,ch$_66
sub eax,$Temp_130_81
shr eax,31
mov $Temp_34_82,eax
xor eax,eax
mov al,CONST_266
mov $Temp_131_83,eax
mov eax,$Temp_131_83
sub eax,ch$_66
shr eax,31
mov $Temp_35_84,eax
mov eax,$Temp_35_84
or eax,$Temp_34_82
test eax,eax
pushfd
pop eax
and eax,0040h ;ZF == 0x0040
shr eax,6
xor eax,1
mov $Temp_36_85,eax
mov eax,$Temp_36_85
and eax,eax
jz LABEL_27
jmp LABEL_26
jmp LABEL_28
LABEL_27:nop
LABEL_28:nop
xor eax,eax
mov eax,result$_63
mov $Temp_132_86,eax
mov eax,$Temp_132_86
imul eax,CONST_102
mov $Temp_37_87,eax
xor eax,eax
mov al,CONST_179
mov $Temp_133_88,eax
mov eax,ch$_66
sub eax,$Temp_133_88
mov $Temp_38_89,eax
xor eax,eax
mov eax,$Temp_38_89
mov $Temp_134_90,eax
mov eax,$Temp_37_87
add eax,$Temp_134_90
mov $Temp_39_91,eax
xor eax,eax
mov eax,$Temp_39_91
mov $Temp_135_92,eax
mov eax,$Temp_135_92
mov result$_63,eax
jmp LABEL_25
LABEL_26:nop
mov eax,minus$_61
and eax,eax
jz LABEL_29
mov eax,result$_63
neg eax
mov $Temp_40_93,eax
mov eax,$Temp_40_93
mov $return_value_60,eax
ret
jmp LABEL_30
LABEL_29:nop
mov eax,result$_63
mov $return_value_60,eax
ret
LABEL_30:nop
read_int$ ENDP
bubbleSort$ PROC
xor eax,eax
mov eax,CONST_42
mov $Temp_136_98,eax
mov eax,$Temp_136_98
mov i$_96,eax
jmp LABEL_34
LABEL_31:nop
xor eax,eax
mov eax,n$_95
mov $Temp_137_99,eax
mov eax,$Temp_137_99
sub eax,CONST_86
mov $Temp_41_100,eax
xor eax,eax
mov eax,i$_96
mov $Temp_138_101,eax
mov eax,$Temp_138_101
sub eax,$Temp_41_100
shr eax,31
mov $Temp_42_102,eax
mov eax,$Temp_42_102
and eax,eax
jnz LABEL_34
mov eax,$Temp_42_102
and eax,eax
jz LABEL_33
LABEL_32:nop
mov eax,i$_96
mov $Temp_43_103,eax
inc i$_96
jmp LABEL_31
LABEL_34:nop
xor eax,eax
mov eax,CONST_42
mov $Temp_139_104,eax
mov eax,$Temp_139_104
mov j$_97,eax
jmp LABEL_38
LABEL_35:nop
mov eax,n$_95
sub eax,i$_96
mov $Temp_44_105,eax
xor eax,eax
mov eax,$Temp_44_105
mov $Temp_140_106,eax
mov eax,$Temp_140_106
sub eax,CONST_86
mov $Temp_45_107,eax
xor eax,eax
mov eax,j$_97
mov $Temp_141_108,eax
mov eax,$Temp_141_108
sub eax,$Temp_45_107
shr eax,31
mov $Temp_46_109,eax
mov eax,$Temp_46_109
and eax,eax
jnz LABEL_38
mov eax,$Temp_46_109
and eax,eax
jz LABEL_37
LABEL_36:nop
mov eax,j$_97
mov $Temp_47_110,eax
inc j$_97
jmp LABEL_35
LABEL_38:nop
xor eax,eax
mov eax,j$_97
mov $Temp_142_112,eax
mov eax,$Temp_142_112
add eax,CONST_86
mov $Temp_49_113,eax
mov esi,$Temp_49_113
mov ebx,[arr$_94]
mov eax,dword ptr [ebx+4*esi]
mov esi,j$_97
mov ebx,[arr$_94]
sub eax,dword ptr [ebx+4*esi]
shr eax,31
mov $Temp_51_115,eax
mov eax,$Temp_51_115
and eax,eax
jz LABEL_39
mov esi,j$_97
mov ebx,[arr$_94]
mov eax,dword ptr [ebx+4*esi]
mov tmp$_117,eax
xor eax,eax
mov eax,j$_97
mov $Temp_143_119,eax
mov eax,$Temp_143_119
add eax,CONST_86
mov $Temp_54_120,eax
mov esi,$Temp_54_120
mov ebx,[arr$_94]
mov eax,dword ptr [ebx+4*esi]
mov esi,j$_97
mov ebx,[arr$_94]
mov dword ptr [ebx+4*esi],eax
xor eax,eax
mov eax,j$_97
mov $Temp_144_122,eax
mov eax,$Temp_144_122
add eax,CONST_86
mov $Temp_56_123,eax
mov eax,tmp$_117
mov esi,$Temp_56_123
mov ebx,[arr$_94]
mov dword ptr [ebx+4*esi],eax
jmp LABEL_40
LABEL_39:nop
LABEL_40:nop
jmp LABEL_36
LABEL_37:nop
jmp LABEL_32
LABEL_33:nop
ret
bubbleSort$ ENDP
printArray$ PROC
xor eax,eax
mov eax,CONST_42
mov $Temp_145_128,eax
mov eax,$Temp_145_128
mov i$_127,eax
jmp LABEL_44
LABEL_41:nop
mov eax,i$_127
sub eax,size$_126
shr eax,31
mov $Temp_58_129,eax
mov eax,$Temp_58_129
and eax,eax
jnz LABEL_44
mov eax,$Temp_58_129
and eax,eax
jz LABEL_43
LABEL_42:nop
mov eax,i$_127
mov $Temp_59_130,eax
inc i$_127
jmp LABEL_41
LABEL_44:nop
mov esi,i$_127
mov ebx,[arr$_125]
mov eax,dword ptr [ebx+4*esi]
mov i$_33,eax
call print_int$
xor eax,eax
mov al,CONST_107
mov $Temp_146_133,eax
mov eax,$Temp_146_133
mov i$_2,eax
call putchar$
jmp LABEL_42
LABEL_43:nop
ret
printArray$ ENDP
get_sum$ PROC
xor eax,eax
mov eax,CONST_42
mov $Temp_147_140,eax
mov eax,$Temp_147_140
mov sum$_139,eax
xor eax,eax
mov eax,CONST_42
mov $Temp_148_141,eax
mov eax,$Temp_148_141
mov i$_138,eax
jmp LABEL_48
LABEL_45:nop
mov eax,i$_138
sub eax,n$_137
shr eax,31
mov $Temp_63_142,eax
mov eax,$Temp_63_142
and eax,eax
jnz LABEL_48
mov eax,$Temp_63_142
and eax,eax
jz LABEL_47
LABEL_46:nop
inc i$_138
jmp LABEL_45
LABEL_48:nop
mov eax,sum$_139
mov esi,i$_138
mov ebx,[arr$_136]
add eax,dword ptr [ebx+4*esi]
mov $Temp_149_144,eax
mov eax,$Temp_149_144
mov sum$_139,eax
jmp LABEL_46
LABEL_47:nop
mov eax,sum$_139
mov $return_value_135,eax
ret
get_sum$ ENDP
main PROC
mov eax,offset CONST_576
mov str$_3,eax
call print_str$
LABEL_49:nop
call read_int$
mov eax,$return_value_60
mov $Temp_66_156,eax
mov eax,$Temp_66_156
mov sz$_150,eax
mov eax,sz$_150
and eax,eax
jz LABEL_50
xor eax,eax
mov eax,CONST_102
mov $Temp_150_158,eax
mov eax,$Temp_150_158
mov i$_2,eax
call putchar$
mov eax,offset CONST_598
mov str$_3,eax
call print_str$
mov eax,sz$_150
mov i$_33,eax
call print_int$
mov eax,offset CONST_608
mov str$_3,eax
call print_str$
xor eax,eax
mov eax,CONST_42
mov $Temp_151_163,eax
mov eax,$Temp_151_163
mov i$_157,eax
jmp LABEL_54
LABEL_51:nop
mov eax,i$_157
sub eax,sz$_150
shr eax,31
mov $Temp_71_164,eax
mov eax,$Temp_71_164
and eax,eax
jnz LABEL_54
mov eax,$Temp_71_164
and eax,eax
jz LABEL_53
LABEL_52:nop
mov eax,i$_157
mov $Temp_72_165,eax
inc i$_157
jmp LABEL_51
LABEL_54:nop
call read_int$
mov eax,$return_value_60
mov $Temp_74_167,eax
mov eax,$Temp_74_167
mov esi,i$_157
mov dword ptr arr$_151[4*esi],eax
jmp LABEL_52
LABEL_53:nop
mov eax,offset arr$_151
mov arr$_94,eax
mov eax,sz$_150
mov n$_95,eax
call bubbleSort$
mov eax,offset CONST_644
mov str$_3,eax
call print_str$
mov eax,offset arr$_151
mov arr$_125,eax
mov eax,sz$_150
mov size$_126,eax
call printArray$
xor eax,eax
mov eax,CONST_102
mov $Temp_152_171,eax
mov eax,$Temp_152_171
mov i$_2,eax
call putchar$
mov eax,offset CONST_661
mov str$_3,eax
call print_str$
mov eax,offset arr$_151
mov arr$_136,eax
mov eax,sz$_150
mov n$_137,eax
call get_sum$
mov eax,$return_value_135
mov $Temp_80_174,eax
mov eax,$Temp_80_174
mov i$_33,eax
call print_int$
xor eax,eax
mov eax,CONST_102
mov $Temp_153_176,eax
mov eax,$Temp_153_176
mov i$_2,eax
call putchar$
mov eax,offset CONST_576
mov str$_3,eax
call print_str$
jmp LABEL_49
LABEL_50:nop
mov eax,offset CONST_687
mov str$_3,eax
call print_str$
call read_int$
mov eax,$return_value_60
mov $Temp_86_181,eax
mov eax,$Temp_86_181
mov my$_154.a$,eax
call read_int$
mov eax,$return_value_60
mov $Temp_88_183,eax
mov eax,$Temp_88_183
mov my$_154.b$,eax
call read_int$
mov eax,$return_value_60
mov $Temp_90_185,eax
mov eax,$Temp_90_185
mov my$_154.c$,eax
mov eax,my$_154.a$
mov i$_33,eax
call print_int$
xor eax,eax
mov eax,CONST_102
mov $Temp_154_188,eax
mov eax,$Temp_154_188
mov i$_2,eax
call putchar$
mov eax,my$_154.b$
mov i$_33,eax
call print_int$
xor eax,eax
mov eax,CONST_102
mov $Temp_155_192,eax
mov eax,$Temp_155_192
mov i$_2,eax
call putchar$
mov eax,my$_154.c$
mov i$_33,eax
call print_int$
xor eax,eax
mov eax,CONST_102
mov $Temp_156_196,eax
mov eax,$Temp_156_196
mov i$_2,eax
call putchar$
xor eax,eax
mov eax,CONST_42
mov $Temp_157_198,eax
mov eax,CONST_42
mov $return_value_149,eax
ret
main ENDP
END main
| 17.013198 | 45 | 0.770259 |
b1aa82ec579dae4ca29257ca25e4046872c997c7 | 148 | asm | Assembly | Add Immediate/immadd.asm | adi-075/8085-microproccesor-programs | 39e5f604fc4bab441c59df3ab116e5b3e16dd43a | [
"MIT"
] | 2 | 2021-03-20T07:36:57.000Z | 2021-04-03T11:55:40.000Z | Add Immediate/immadd.asm | adi-075/8085-microproccesor-programs | 39e5f604fc4bab441c59df3ab116e5b3e16dd43a | [
"MIT"
] | null | null | null | Add Immediate/immadd.asm | adi-075/8085-microproccesor-programs | 39e5f604fc4bab441c59df3ab116e5b3e16dd43a | [
"MIT"
] | null | null | null |
;WAP to add 02H and 03H
jmp start
;03+02=05
;code
start: nop
MVI A, 03H ; Immediately move data to accumulator
ADI 02H ; Add Immediately
hlt | 9.866667 | 49 | 0.709459 |
4982437ff2e87133d51cff21ce4085389aef5334 | 468 | asm | Assembly | oeis/033/A033164.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/033/A033164.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/033/A033164.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A033164: Begins with (4, 5); avoids 3-term arithmetic progressions.
; Submitted by Jamie Morken(s1)
; 4,5,7,8,13,14,16,17,31,32,34,35,40,41,43,44,85,86,88,89,94,95,97,98,112,113,115,116,121,122,124,125,247,248,250,251,256,257,259,260,274,275,277,278,283,284,286,287,328,329,331,332,337,338,340,341,355,356,358,359,364
mov $2,$0
div $0,4
seq $0,240400 ; Numbers n having a partition into distinct parts of form 3^k-2^k.
mul $0,2
add $0,$2
mul $0,9
div $0,6
add $0,4
| 36 | 217 | 0.698718 |
d51b4a9418cc0a97744e38595407a965c39e2d90 | 252 | asm | Assembly | kernel/src/arch/x86_64/long_mode_start.asm | doom/foros | b2b1bd94b869e088813c61e397188fbcc0b29780 | [
"MIT"
] | 2 | 2019-04-02T22:00:14.000Z | 2019-09-05T12:41:33.000Z | kernel/src/arch/x86_64/long_mode_start.asm | doom/foros | b2b1bd94b869e088813c61e397188fbcc0b29780 | [
"MIT"
] | null | null | null | kernel/src/arch/x86_64/long_mode_start.asm | doom/foros | b2b1bd94b869e088813c61e397188fbcc0b29780 | [
"MIT"
] | null | null | null |
bits 64
section .text
global long_mode_start
extern kmain
long_mode_start:
; Fill data segment registers with 0's to discard the offsets from the previous GDT
mov ax, 0
mov ss, ax
mov ds, ax
mov es, ax
mov fs, ax
mov gs, ax
call kmain
hlt
| 13.263158 | 84 | 0.730159 |
d5a1c67ad1f49649c652aa7ca7041f2a2c6ab7c0 | 725 | asm | Assembly | oeis/083/A083719.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/083/A083719.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/083/A083719.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A083719: a(n) = n * [1 + sum(k=1 to n-1) prime(k)].
; Submitted by Jamie Morken(s2)
; 0,1,6,18,44,90,174,294,472,702,1010,1430,1932,2574,3346,4230,5264,6494,7938,9538,11380,13440,15686,18216,21000,24100,27586,31374,35420,39788,44430,49414,55072,61116,67626,74480,81972,89836,98230,107172,116600,126608,137214,148264,160116,172440,185334,198716,213072,228438,244450,261018,278252,296270,314874,334510,354984,376314,398518,421378,445140,469700,494946,521388,549312,578110,607662,638108,670140,703248,737730,773048,809352,846800,885558,925500,966644,1008854,1052298,1097152,1143120
mov $1,$0
trn $1,1
seq $1,14284 ; Partial sums of primes, if 1 is regarded as a prime (as it was until quite recently, see A008578).
mul $0,$1
| 80.555556 | 494 | 0.773793 |
cc1e30be9bbacfa9b9f008373751dfe709210706 | 352 | asm | Assembly | libsrc/_DEVELOPMENT/arch/zx/esxdos/c/sdcc_iy/esxdos_f_readdir_callee.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 640 | 2017-01-14T23:33:45.000Z | 2022-03-30T11:28:42.000Z | libsrc/_DEVELOPMENT/arch/zx/esxdos/c/sdcc_iy/esxdos_f_readdir_callee.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 1,600 | 2017-01-15T16:12:02.000Z | 2022-03-31T12:11:12.000Z | libsrc/_DEVELOPMENT/arch/zx/esxdos/c/sdcc_iy/esxdos_f_readdir_callee.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 215 | 2017-01-17T10:43:03.000Z | 2022-03-23T17:25:02.000Z | ; uchar esxdos_f_readdir(uchar handle, void *buf)
SECTION code_clib
SECTION code_esxdos
PUBLIC _esxdos_f_readdir_callee
PUBLIC l0_esxdos_f_readdir_callee
EXTERN asm_esxdos_f_readdir
_esxdos_f_readdir_callee:
pop hl
dec sp
pop af
ex (sp),hl
l0_esxdos_f_readdir_callee:
push iy
call asm_esxdos_f_readdir
pop iy
ret
| 13.538462 | 49 | 0.767045 |
9a69fb32fa2127f48acf849696d7f5cfe4d93010 | 1,298 | asm | Assembly | programs/oeis/007/A007798.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/007/A007798.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/007/A007798.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A007798: Expected number of random moves in Tower of Hanoi problem with n disks starting with a randomly chosen position and ending at a position with all disks on the same peg.
; 0,0,2,18,116,660,3542,18438,94376,478440,2411882,12118458,60769436,304378620,1523487422,7622220078,38125449296,190670293200,953480606162,4767790451298,23840114517956,119204059374180,596030757224102,2980185167180118,14901019979079416,74505382324933560,372527758913277242,1862641336432214538,9313214307758557676,46566094415585243340,232830540708303581582,1164152909432650002558,5820765164836646296736,29103827677203420335520,145519143945077668233122,727595736402570040832178,3637978732044395303160596,18189893810316611812802100,90949469501866964955007862,454747348860186542448031398,2273736748353487865259133256,11368683753925104785352595080,56843418806098520303933761802,284217094139911590651181168218,1421085471027814920650442918716,7105427356123845505435825826460,35527136783573540233729962830942,177635683926730639288302315250638,888178419660242010800469079540976,4440892098380976497079217907568240,22204460492144181814626707067431282,111022302461438807060825387925926658,555111512309347729267202497395944036
mov $1,5
pow $1,$0
mov $2,3
pow $2,$0
sub $1,$2
sub $1,$2
sub $1,7
div $1,8
add $1,1
mul $1,2
mov $0,$1
| 86.533333 | 1,012 | 0.891371 |
c998a6545a522e7417bc5a67b948ca6ca61e4c33 | 746 | asm | Assembly | unittests/ASM/PrimaryGroup/2_D3_02_3.asm | cobalt2727/FEX | 13087f8425aeaad28dc81bed46a83e1d72ff0db8 | [
"MIT"
] | 628 | 2020-03-06T14:01:32.000Z | 2022-03-31T06:35:14.000Z | unittests/ASM/PrimaryGroup/2_D3_02_3.asm | cobalt2727/FEX | 13087f8425aeaad28dc81bed46a83e1d72ff0db8 | [
"MIT"
] | 576 | 2020-03-06T08:25:12.000Z | 2022-03-30T04:05:29.000Z | unittests/ASM/PrimaryGroup/2_D3_02_3.asm | cobalt2727/FEX | 13087f8425aeaad28dc81bed46a83e1d72ff0db8 | [
"MIT"
] | 38 | 2020-03-07T06:10:00.000Z | 2022-03-29T09:27:36.000Z | %ifdef CONFIG
{
"RegData": {
"RBX": "0x0000000000000006",
"RDI": "0x0000000000000004",
"RDX": "0x0000000000000002",
"RSI": "0x0000000000000000",
"R8": "0x0",
"R9": "0x0",
"R10": "0x1",
"R11": "0x1"
}
}
%endif
mov rbx, 0x0000000000000001
mov rdi, 0x0000000000000001
mov rdx, 0x4000000000000000
mov rsi, 0x4000000000000000
mov rcx, 2
stc
rcl rbx, cl
lahf
mov r8w, ax
shr r8, 8
and r8, 1 ; We only care about carry flag here
clc
rcl rdi, cl
lahf
mov r9w, ax
shr r9, 8
and r9, 1 ; We only care about carry flag here
stc
rcl rdx, cl
lahf
mov r10w, ax
shr r10, 8
and r10, 1 ; We only care about carry flag here
clc
rcl rsi, cl
lahf
mov r11w, ax
shr r11, 8
and r11, 1 ; We only care about carry flag here
hlt
| 14.627451 | 47 | 0.660858 |
2029a7ec5da61042294ab86b2ce6ac5082ccba6b | 4,687 | asm | Assembly | Transynther/x86/_processed/NONE/_ht_/i9-9900K_12_0xca.log_3369_367.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_ht_/i9-9900K_12_0xca.log_3369_367.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_ht_/i9-9900K_12_0xca.log_3369_367.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r13
push %r14
push %r8
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_A_ht+0x19dfa, %rsi
lea addresses_WC_ht+0x7dfa, %rdi
nop
nop
and $22654, %r13
mov $3, %rcx
rep movsl
xor $56184, %rdi
lea addresses_normal_ht+0xbefa, %rdx
sub $58130, %rdi
mov (%rdx), %r13w
nop
nop
nop
nop
nop
cmp %rsi, %rsi
lea addresses_WC_ht+0xfb12, %r8
nop
nop
nop
nop
sub %r14, %r14
mov $0x6162636465666768, %r13
movq %r13, %xmm6
vmovups %ymm6, (%r8)
nop
nop
nop
add $12332, %rdi
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %r8
pop %r14
pop %r13
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r13
push %r14
push %r15
push %rbp
push %rdi
// Faulty Load
lea addresses_A+0x18dfa, %r14
nop
nop
nop
nop
cmp $49148, %r13
vmovups (%r14), %ymm7
vextracti128 $0, %ymm7, %xmm7
vpextrq $1, %xmm7, %rbp
lea oracles, %r14
and $0xff, %rbp
shlq $12, %rbp
mov (%r14,%rbp,1), %rbp
pop %rdi
pop %rbp
pop %r15
pop %r14
pop %r13
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'size': 1, 'NT': False, 'type': 'addresses_A', 'same': True, 'AVXalign': False, 'congruent': 0}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'size': 32, 'NT': False, 'type': 'addresses_A', 'same': True, 'AVXalign': False, 'congruent': 0}}
<gen_prepare_buffer>
{'OP': 'REPM', 'src': {'same': False, 'type': 'addresses_A_ht', 'congruent': 8}, 'dst': {'same': False, 'type': 'addresses_WC_ht', 'congruent': 8}}
{'OP': 'LOAD', 'src': {'size': 2, 'NT': False, 'type': 'addresses_normal_ht', 'same': True, 'AVXalign': True, 'congruent': 8}}
{'OP': 'STOR', 'dst': {'size': 32, 'NT': False, 'type': 'addresses_WC_ht', 'same': False, 'AVXalign': False, 'congruent': 3}}
{'45': 3369}
45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45
*/
| 50.397849 | 2,999 | 0.662684 |
83adbf22d5fb89a3ba44606a9e061d21bfb733c0 | 418 | asm | Assembly | oeis/108/A108400.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/108/A108400.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/108/A108400.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A108400: a(n) = Product_{k = 0..n} k!*2^k.
; Submitted by Jon Maiga
; 1,2,16,768,294912,1132462080,52183852646400,33664847019245568000,347485857744891213250560000,64560982045934655213753964953600000,239901585047846581083822477336190648320000000
mov $1,2
mov $2,2
mov $4,23
lpb $0
mov $3,$2
add $2,1
mul $4,$1
lpb $3
mov $3,30
cmp $4,5
lpe
sub $0,1
add $2,1
mul $1,$2
lpe
mov $0,$4
div $0,23
| 19 | 176 | 0.688995 |
7e4b87e926189eeb5b650beb87bb45752278fd72 | 5,406 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0xca_notsx.log_21829_1300.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0xca_notsx.log_21829_1300.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0xca_notsx.log_21829_1300.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r12
push %r14
push %r15
push %rcx
push %rdi
push %rsi
lea addresses_A_ht+0x1998a, %rdi
nop
sub %r12, %r12
movl $0x61626364, (%rdi)
cmp $21829, %r14
lea addresses_UC_ht+0xb546, %rsi
lea addresses_A_ht+0x618a, %rdi
nop
nop
nop
nop
add $10263, %r15
mov $122, %rcx
rep movsw
nop
nop
nop
cmp $4771, %r15
lea addresses_WT_ht+0xa932, %rdi
nop
inc %r10
movb $0x61, (%rdi)
nop
nop
nop
nop
nop
and %r10, %r10
lea addresses_WC_ht+0x1218a, %rsi
lea addresses_D_ht+0x17122, %rdi
nop
nop
sub $54895, %r12
mov $102, %rcx
rep movsb
nop
nop
and $55050, %r14
lea addresses_normal_ht+0x11abc, %r15
nop
nop
sub %rcx, %rcx
vmovups (%r15), %ymm1
vextracti128 $1, %ymm1, %xmm1
vpextrq $1, %xmm1, %rsi
nop
nop
nop
nop
and $43851, %r14
lea addresses_UC_ht+0x11b8a, %rcx
nop
nop
cmp $11095, %r10
movl $0x61626364, (%rcx)
nop
sub %rsi, %rsi
pop %rsi
pop %rdi
pop %rcx
pop %r15
pop %r14
pop %r12
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r12
push %r15
push %r8
push %rcx
push %rdx
push %rsi
// Faulty Load
lea addresses_UC+0x1118a, %r8
nop
xor %rdx, %rdx
movups (%r8), %xmm1
vpextrq $0, %xmm1, %rsi
lea oracles, %rcx
and $0xff, %rsi
shlq $12, %rsi
mov (%rcx,%rsi,1), %rsi
pop %rsi
pop %rdx
pop %rcx
pop %r8
pop %r15
pop %r12
ret
/*
<gen_faulty_load>
[REF]
{'src': {'same': False, 'congruent': 0, 'NT': False, 'type': 'addresses_UC', 'size': 8, 'AVXalign': False}, 'OP': 'LOAD'}
[Faulty Load]
{'src': {'same': True, 'congruent': 0, 'NT': False, 'type': 'addresses_UC', 'size': 16, 'AVXalign': False}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 9, 'NT': False, 'type': 'addresses_A_ht', 'size': 4, 'AVXalign': False}}
{'src': {'type': 'addresses_UC_ht', 'congruent': 2, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_A_ht', 'congruent': 9, 'same': False}}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 2, 'NT': True, 'type': 'addresses_WT_ht', 'size': 1, 'AVXalign': False}}
{'src': {'type': 'addresses_WC_ht', 'congruent': 11, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_D_ht', 'congruent': 1, 'same': False}}
{'src': {'same': False, 'congruent': 0, 'NT': False, 'type': 'addresses_normal_ht', 'size': 32, 'AVXalign': False}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 6, 'NT': False, 'type': 'addresses_UC_ht', 'size': 4, 'AVXalign': False}}
{'37': 21829}
37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37
*/
| 45.428571 | 2,999 | 0.660377 |
375cdce25d62e131c4576894eadf783892cd04e3 | 181 | asm | Assembly | xasm/common/test/sinetest.asm | gb-archive/asmotor | c821d8be10b7b66d93e0b68777c8643d9a53955f | [
"Naumen",
"Condor-1.1",
"MS-PL"
] | null | null | null | xasm/common/test/sinetest.asm | gb-archive/asmotor | c821d8be10b7b66d93e0b68777c8643d9a53955f | [
"Naumen",
"Condor-1.1",
"MS-PL"
] | null | null | null | xasm/common/test/sinetest.asm | gb-archive/asmotor | c821d8be10b7b66d93e0b68777c8643d9a53955f | [
"Naumen",
"Condor-1.1",
"MS-PL"
] | null | null | null |
_count SET 0
REPT 256
_angle SET _count*256
PRINTT "sin({_angle}) == "
PRINTV sin(_angle)
PRINTT " or "
PRINTF sin(_angle)
PRINTT "\n"
_count SET _count+1
ENDR
| 13.923077 | 28 | 0.635359 |
e33911517bde9a3fa0eb4272804f623dbd26d532 | 147 | asm | Assembly | programs/tests/and.asm | rj45/rj32 | a0484913925bebf6459664f72ac3f8cbfa6002e9 | [
"MIT"
] | 28 | 2021-06-27T08:23:41.000Z | 2022-03-26T20:48:37.000Z | programs/tests/and.asm | rj45/rj32 | a0484913925bebf6459664f72ac3f8cbfa6002e9 | [
"MIT"
] | 14 | 2021-06-05T18:13:35.000Z | 2021-07-17T17:16:27.000Z | programs/tests/and.asm | rj45/rj32 | a0484913925bebf6459664f72ac3f8cbfa6002e9 | [
"MIT"
] | 4 | 2021-11-01T22:23:19.000Z | 2022-03-18T01:38:39.000Z | #include "../cpudef.asm"
move r1, 0b0110
move r2, 0b1010
and r1, r2
if.ne r1, 0b0010
error
and r2, 0b1101
if.ne r2, 0b1000
error
halt
| 9.1875 | 24 | 0.653061 |
58d2614855578f6a41d2943e6e366a00030e2e6d | 3,246 | asm | Assembly | uefi-sct/SctPkg/Library/NetLib/Ia32/NetSetMemSSE2.asm | sunnywang-arm/edk2-test | 475be9f7a70d012705eca64dd24a9eeaed643183 | [
"BSD-2-Clause"
] | 47 | 2018-10-15T02:34:39.000Z | 2022-02-07T11:02:45.000Z | uefi-sct/SctPkg/Library/NetLib/Ia32/NetSetMemSSE2.asm | sunnywang-arm/edk2-test | 475be9f7a70d012705eca64dd24a9eeaed643183 | [
"BSD-2-Clause"
] | null | null | null | uefi-sct/SctPkg/Library/NetLib/Ia32/NetSetMemSSE2.asm | sunnywang-arm/edk2-test | 475be9f7a70d012705eca64dd24a9eeaed643183 | [
"BSD-2-Clause"
] | 78 | 2018-10-08T01:17:19.000Z | 2022-03-16T14:33:15.000Z | ;; @file
;
; Copyright 2006 - 2010 Unified EFI, Inc.<BR>
; Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>
;
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
;;
;
;++ TITLE NetSetMem.asm: Optimized setmemory routine
; PROC:PRIVATE
.686P
.MMX
.XMM
.MODEL SMALL
.CODE
NetCommonLibSetMem PROTO C Buffer:PTR DWORD, Count:DWORD, Value:BYTE
;------------------------------------------------------------------------------
; Procedure: NetCommonLibSetMem
;
; VOID
; NetCommonLibSetMem (
; IN VOID *Buffer,
; IN UINTN Count,
; IN UINT8 Value
; )
;
; Input: VOID *Buffer - Pointer to buffer to write
; UINTN Count - Number of bytes to write
; UINT8 Value - Value to write
;
; Output: None.
;
; Saves:
;
; Modifies:
;
; Description: This function is an optimized zero-memory function.
;
; Notes: This function tries to zero memory 8 bytes at a time. As a result,
; it first picks up any misaligned bytes, then words, before getting
; in the main loop that does the 8-byte clears.
;
;------------------------------------------------------------------------------
NetCommonLibSetMem PROC C Buffer:PTR DWORD, Count:DWORD, Value:BYTE
LOCAL QWordValue:QWORD
LOCAL MmxSave:QWORD
mov edx, Count
test edx, edx
je _SetMemDone
push edi
push ebx
mov eax, Buffer
mov bl, Value
mov edi, eax
mov bh, bl
cmp edx, 256
jb _SetRemindingByte
and al, 0fh
test al, al
je _SetBlock
mov eax, edi
shr eax, 4
inc eax
shl eax, 4
sub eax, edi
cmp eax, edx
jnb _SetRemindingByte
sub edx, eax
mov ecx, eax
mov al, bl
rep stosb
_SetBlock:
mov eax, edx
shr eax, 7
test eax, eax
je _SetRemindingByte
shl eax, 7
sub edx, eax
shr eax, 7
mov WORD PTR QWordValue[0], bx
mov WORD PTR QWordValue[2], bx
mov WORD PTR QWordValue[4], bx
mov WORD PTR QWordValue[6], bx
movq MmxSave, mm0
movq mm0, QWordValue
movq2dq xmm1, mm0
pshufd xmm1, xmm1, 0
@@:
movdqa OWORD PTR ds:[edi], xmm1
movdqa OWORD PTR ds:[edi+16], xmm1
movdqa OWORD PTR ds:[edi+32], xmm1
movdqa OWORD PTR ds:[edi+48], xmm1
movdqa OWORD PTR ds:[edi+64], xmm1
movdqa OWORD PTR ds:[edi+80], xmm1
movdqa OWORD PTR ds:[edi+96], xmm1
movdqa OWORD PTR ds:[edi+112], xmm1
add edi, 128
dec eax
jnz @B
; Restore mm0
movq mm0, MmxSave
emms ; Exit MMX Instruction
_SetRemindingByte:
mov ecx, edx
mov eax, ebx
shl eax, 16
mov ax, bx
shr ecx, 2
rep stosd
mov ecx, edx
and ecx, 3
rep stosb
pop ebx
pop edi
_SetMemDone:
ret 0
NetCommonLibSetMem ENDP
END
| 21.077922 | 87 | 0.589341 |
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