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|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
247122c7bfbabbf7664352c1df672872ca4ba904 | 4,130 | asm | Assembly | spriteextend.asm | KScl/z3rasm | 7739c9bd6a0c803b1e4e1f435af3178b8e04207b | [
"MIT"
] | null | null | null | spriteextend.asm | KScl/z3rasm | 7739c9bd6a0c803b1e4e1f435af3178b8e04207b | [
"MIT"
] | null | null | null | spriteextend.asm | KScl/z3rasm | 7739c9bd6a0c803b1e4e1f435af3178b8e04207b | [
"MIT"
] | null | null | null | ;==============================================================================
; Hook into vanilla table loading routine
;------------------------------------------------------------------------------
; uses free space in bank 0 to stay in bank
; to hopefully minimize any possible performance penalty of this code
; on the average case where vanilla assets are being loaded
pushpc
org $00e7b2 ; (LDA $d033, Y : STA $ca)
JMP.w CheckExtendSpriteTable
org $00cf46 ; Unused space filled with FF in vanilla.
dw $FFFF, $FFFF, $FFFF, $FFFF, $FFFF ; vanilla glitch compatibility?
CheckExtendSpriteTable:
{
; 8 bit A + XY
CPY #$7F : !BGE + ; If not extended...
LDA $d033, Y : STA $ca ; bank number
LDA $d112, Y : STA $c9 ; high byte
LDA $d1f1, Y : STA $c8 ; low byte
JMP.w $e7de ; continue where the old function left off
+
PHB : LDA.b #ESPTableBank>>16 : PHA : PLB ; set data bank to extend sprite table bank
TYA : !SUB.b #$80 : TAY
LDA.w ESPTableBank, Y : STA $ca ; bank number
LDA.w ESPTableHigh, Y : STA $c9 ; high byte
LDA.w ESPTableLow, Y : STA $c8 ; low byte
PLB ; restore data bank
JMP.w $e7de
}
warnpc $00cfc0
;==============================================================================
; Overwrite vanilla sprite palette determination
;------------------------------------------------------------------------------
org $00e67c : Convert3BPPTo4BPPLow:
org $00e5ef : Convert3BPPTo4BPPHigh:
org $00e5d0
; 16 bit A, 8 bit X
SEP #$20 ; set 8-bit A
PHB : LDA.b #HiPalFlag>>16 : PHA : PLB ; set data bank to flag table bank
LDA.w HiPalFlag, X : BNE +
PLB : REP #$20 : JMP.w Convert3BPPTo4BPPLow : +
PLB : REP #$20 : JMP.w Convert3BPPTo4BPPHigh
warnpc $00e5ef
;------------------------------------------------------------------------------
pullpc
;==============================================================================
; Extend sprite table
;------------------------------------------------------------------------------
; index: Index of sprite sheet to use
; - <= $6B to overwrite vanilla sheets
; - >= $80 to write to new extend sheets
; label: location of sprite sheet to decompress
;------------------------------------------------------------------------------
macro spritesheet_fromlabel(index, label)
pushpc
if <index> <= $6B ; Replace vanilla sprite tables
org $d033+<index> : db <label>>>16
org $d112+<index> : db <label>>>8
org $d1f1+<index> : db <label>
elseif <index> >= $80 ; Extend sprite table
org ESPTableBank+<index>-$80 : db <label>>>16
org ESPTableHigh+<index>-$80 : db <label>>>8
org ESPTableLow+<index>-$80 : db <label>
else ; Space inbetween the two
error "Invalid sprite bank <index> for <label>"
endif
pullpc
endmacro
;------------------------------------------------------------------------------
; Same as above, but takes a filename instead of a label
; and automatically imports
;------------------------------------------------------------------------------
macro spritesheet(index, filename)
!ESPIDX #= <index>
#ESPEntry!ESPIDX : incbin <filename>
%spritesheet_fromlabel(<index>, ESPEntry!ESPIDX)
endmacro
;------------------------------------------------------------------------------
; Sets the given sprite sheet to use the upper 8 palette entries instead of
; the lower 8 palette entries by default. Usually used by items.
;------------------------------------------------------------------------------
macro spritesheet_hipal(index)
pushpc
org HiPalFlag+<index> : db 1
pullpc
endmacro
;------------------------------------------------------------------------------
ESPTableBank: fillbyte $00 : fill $80
ESPTableHigh: fillbyte $FF : fill $80
ESPTableLow: fillbyte $FF : fill $80
ESPReserved: fillbyte $FF : fill $80
;------------------------------------------------------------------------------
HiPalFlag: fillbyte $00 : fill $100
; vanilla hi palette entries
%spritesheet_hipal($52)
%spritesheet_hipal($53)
%spritesheet_hipal($5A)
%spritesheet_hipal($5B)
%spritesheet_hipal($5C)
%spritesheet_hipal($5E)
%spritesheet_hipal($5F)
;------------------------------------------------------------------------------
| 39.711538 | 86 | 0.502663 |
2e2df045b4c623d1629d7d761a6a06d1e1704116 | 2,118 | asm | Assembly | boot/bootsect.asm | coldnine/alpha | 03586b834f8b16861364126647c42ae1b2b7c0ca | [
"MIT"
] | 8 | 2018-05-09T11:27:17.000Z | 2022-01-28T11:37:06.000Z | boot/bootsect.asm | coldnine/proxima | 03586b834f8b16861364126647c42ae1b2b7c0ca | [
"MIT"
] | null | null | null | boot/bootsect.asm | coldnine/proxima | 03586b834f8b16861364126647c42ae1b2b7c0ca | [
"MIT"
] | 1 | 2018-01-05T09:44:57.000Z | 2018-01-05T09:44:57.000Z | ;; =512
$mbr_size equ 0x200
;; MBR magic number
$mbr_magic equ 0xaa55
$alpha_addr equ 0x7c00
;; init stack accordingly
$bl_ss equ 0x0bc0
$bl_sp equ 0x0200
;; kernel loading addr
$kernel_offset equ 0x1000
[org $alpha_addr]
[bits 16]
_rm_start:
;; set ss, sp
mov [boot_drive], dl
mov dx, $bl_ss
mov ss, dx
mov sp, $bl_sp
;; clear screen
call _rm_reset_screen
call _rm_load_kernel
call _rm_switch_pm ; never returns
jmp $
;; read dh sectors from dl drive into es:bx
_rm_disk_load:
pusha
push dx
mov ah, 0x02 ; ah <- int 0x13 function. 0x02 = 'read'
mov al, dh ; al <- number of sectors to read (0x01 .. 0x80)
mov cl, 0x02 ; cl <- sector (0x01 .. 0x11)
; 0x01 is our boot sector, 0x02 is the first 'available' sector
mov ch, 0x00 ; ch <- cylinder (0x0 .. 0x3FF, upper 2 bits in 'cl')
; dl <- drive number. Our caller sets it as a parameter and gets it from BIOS
; (0 = floppy, 1 = floppy2, 0x80 = hdd, 0x81 = hdd2)
mov dh, 0x00 ; dh <- head number (0x0 .. 0xF)
; [es:bx] <- pointer to buffer where the data will be stored
; caller sets it up for us, and it is actually the standard location for int 13h
int 0x13 ; BIOS interrupt
jc _disk_error ; if error (stored in the carry bit)
pop dx
cmp al, dh ; BIOS also sets 'al' to the # of sectors read. Compare it.
jne _sectors_error
popa
ret
_disk_error:
_sectors_error:
jmp $
_rm_load_kernel:
mov bx, $kernel_offset
mov dh, 54
mov dl, [boot_drive]
call _rm_disk_load
ret
_rm_switch_pm:
;; switch to protected-mode
cli
lgdt [_gdt_descriptor]
mov eax, cr0
or al, 1
mov cr0, eax
jmp CODE_SEG:_init_pm
;; real-mode bios int to reset gfx mode
_rm_reset_screen:
pusha
mov ah, 0x00
mov al, 0x02
int 0x10
popa
ret
[bits 32]
_init_pm:
mov ax, DATA_SEG
mov ds, ax
mov ss, ax
mov es, ax
mov fs, ax
mov gs, ax
mov ebp, 0x40000
mov esp, ebp
call $kernel_offset
jmp $
;; data
%include "boot/gdt.asm"
boot_drive db 0
;; make boot loader exactly 512 bytes long
times ($mbr_size-0x02)-($-$$) db 0x00
dw $mbr_magic
| 18.743363 | 82 | 0.661473 |
582e28ed5712bcb2714209746a3ed9d20b9d287b | 340 | asm | Assembly | oeis/110/A110295.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/110/A110295.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/110/A110295.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A110295: a(n) = prime(n)*2^(n-1).
; Submitted by Jon Maiga
; 2,6,20,56,176,416,1088,2432,5888,14848,31744,75776,167936,352256,770048,1736704,3866624,7995392,17563648,37224448,76546048,165675008,348127232,746586112,1627389952,3388997632,6912212992,14361296896
mov $1,2
pow $1,$0
seq $0,40 ; The prime numbers.
mul $1,2
mul $0,$1
div $0,2
| 30.909091 | 199 | 0.744118 |
10efacecff661c2bc9ca3af3027a4952ee84117e | 356 | asm | Assembly | assembly/book_low-level-programming/ch_2/practice/strlen.asm | ZahFox/systems-programming | 2c6c7f1ab318d2a74bb50503e8308e96bee94bf3 | [
"MIT"
] | null | null | null | assembly/book_low-level-programming/ch_2/practice/strlen.asm | ZahFox/systems-programming | 2c6c7f1ab318d2a74bb50503e8308e96bee94bf3 | [
"MIT"
] | null | null | null | assembly/book_low-level-programming/ch_2/practice/strlen.asm | ZahFox/systems-programming | 2c6c7f1ab318d2a74bb50503e8308e96bee94bf3 | [
"MIT"
] | null | null | null | global _start
section .data
test_string: db "abcdef", 0
section .text
strlen: ; rax will hold the length value
xor rax, rax ; zeroing rax to avoid random values
.loop:
cmp byte [rdi+rax], 0 ; check for the null byte
je .end
inc rax
jmp .loop
.end:
ret
_start:
mov rdi, test_string
call strlen
mov rdi, rax
mov rax, 60
syscall
| 15.478261 | 50 | 0.676966 |
b416d289921ce11a099d2520c28ce6bd9f5fe534 | 1,491 | asm | Assembly | fibonacci.asm | kspalaiologos/cursed-asm | abb1ec73de3840a6d5b31c612f26dd38f3dc4d71 | [
"CC0-1.0"
] | 6 | 2020-08-11T20:28:41.000Z | 2022-03-30T12:56:40.000Z | fibonacci.asm | kspalaiologos/cursed-asm | abb1ec73de3840a6d5b31c612f26dd38f3dc4d71 | [
"CC0-1.0"
] | null | null | null | fibonacci.asm | kspalaiologos/cursed-asm | abb1ec73de3840a6d5b31c612f26dd38f3dc4d71 | [
"CC0-1.0"
] | null | null | null | .text
.globl _start
_start:
pushq %r12
mov rax, QWORD PTR m.2[rip]
leaq z.1(%rip), %r10
push rbp
orl $-1, %r12d
xor r8d, r8d
pushq %rbx
mov BYTE PTR 4[rax], 1
movb $1, 2(%rax)
lea rbx, a.0[rip]
movl $1, %r9d
mov ebp, 1
.L2:
mov rax, QWORD PTR m.2[rip]
cmpb $0, 4(%rax)
je .L13
leaq -3(%rax), %rdx
mov al, BYTE PTR 3[rax]
movq %rdx, m.2(%rip)
add eax, 48
movb %al, z.1(%rip)
mov edi, r8d
movl %r9d, %eax
mov rsi, r10
movq %rbp, %rdx
syscall
jmp .L2
.L13:
movl %r8d, %eax
mov ecx, r12d
movq %rbx, %rdi
mov rsi, rbx
repne scasb
mov eax, r9d
movslq %ecx, %rdx
mov edi, r8d
syscall
mov BYTE PTR z.1[rip], 10
movl %r9d, %eax
mov rsi, r10
movq %rbp, %rdx
syscall
movq m.2(%rip), %rax
xor edx, edx
.L4:
mov cl, BYTE PTR 7[rax]
testb %cl, %cl
je .L14
movb 6(%rax), %dl
lea ecx, -1[rdx+rcx]
addb 5(%rax), %dl
mov BYTE PTR 7[rax], cl
movb %dl, 5(%rax)
mov BYTE PTR 6[rax], dl
cmpb $9, %dl
jbe .L5
subl $10, %edx
inc BYTE PTR 8[rax]
movb $1, 10(%rax)
mov BYTE PTR 6[rax], dl
.L5:
mov BYTE PTR 5[rax], cl
movb $1, 7(%rax)
mov dl, 1
addq $3, %rax
jmp .L4
.L14:
test dl, dl
je .L2
mov QWORD PTR m.2[rip], rax
jmp .L2
.local a.0
.comm a.0,9000,32
.local z.1
.comm z.1,1,1
.section .data.rel.local,"aw"
m.2:
.quad a.0
| 18.182927 | 33 | 0.512408 |
3e15609b327e6bae256ccae68c17f3f7fbc4c217 | 396 | asm | Assembly | oeis/180/A180488.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/180/A180488.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/180/A180488.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A180488: Partial sums of A006864.
; Submitted by Christian Krause
; 0,1,3,9,23,60,152,388,984,2501,6347,16117,40911,103864,263664,669352,1699216,4313673,10950739,27799745,70572839,179157364,454811656,1154592108,2931065640,7440849549,18889457819,47953075565
lpb $0
mov $2,$0
sub $0,1
seq $2,6864 ; Number of Hamiltonian cycles in P_4 X P_n.
add $1,$2
add $1,$2
lpe
mov $0,$1
div $0,2
| 28.285714 | 190 | 0.739899 |
3b5932b9cff8fdd489e4e828c74833b4c7037043 | 193 | asm | Assembly | programs/oeis/031/A031401.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/031/A031401.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/031/A031401.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A031401: Period of continued fraction for sqrt(A031400(n)).
; 1,2,4,8,4,4,4,4,4,4,4
pow $0,2
mov $2,11
sub $2,$0
div $2,4
add $2,1
add $0,$2
mov $3,16
min $3,$0
mov $0,$3
sub $0,2
mod $0,10
| 12.866667 | 61 | 0.601036 |
0edc38e45de2ddb58d0642599ebfc65e1857e29d | 181 | asm | Assembly | engine/battle/move_effects/sunny_day.asm | Dev727/ancientplatinum | 8b212a1728cc32a95743e1538b9eaa0827d013a7 | [
"blessing"
] | 28 | 2019-11-08T07:19:00.000Z | 2021-12-20T10:17:54.000Z | engine/battle/move_effects/sunny_day.asm | Dev727/ancientplatinum | 8b212a1728cc32a95743e1538b9eaa0827d013a7 | [
"blessing"
] | 13 | 2020-01-11T17:00:40.000Z | 2021-09-14T01:27:38.000Z | engine/battle/move_effects/sunny_day.asm | Dev727/ancientplatinum | 8b212a1728cc32a95743e1538b9eaa0827d013a7 | [
"blessing"
] | 22 | 2020-05-28T17:31:38.000Z | 2022-03-07T20:49:35.000Z | BattleCommand_StartSun:
; startsun
ld a, WEATHER_SUN
ld [wBattleWeather], a
ld a, 5
ld [wWeatherCount], a
call AnimateCurrentMove
ld hl, SunGotBrightText
jp StdBattleTextbox
| 18.1 | 24 | 0.779006 |
47bedfd04fd8a0acfc5ff540e53da7dbd26258b2 | 4,078 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0xca.log_21829_1020.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0xca.log_21829_1020.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0xca.log_21829_1020.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r13
push %r9
push %rcx
push %rdi
push %rsi
lea addresses_WT_ht+0x1ac4d, %rsi
lea addresses_WT_ht+0xb12d, %rdi
nop
nop
nop
nop
add $43321, %r9
mov $126, %rcx
rep movsw
nop
add $35589, %r13
pop %rsi
pop %rdi
pop %rcx
pop %r9
pop %r13
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r14
push %r15
push %r8
push %rbx
push %rsi
// Faulty Load
lea addresses_RW+0x1024d, %r10
nop
nop
add $10830, %r15
movb (%r10), %bl
lea oracles, %rsi
and $0xff, %rbx
shlq $12, %rbx
mov (%rsi,%rbx,1), %rbx
pop %rsi
pop %rbx
pop %r8
pop %r15
pop %r14
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'src': {'congruent': 0, 'AVXalign': False, 'same': False, 'size': 8, 'NT': False, 'type': 'addresses_RW'}, 'OP': 'LOAD'}
[Faulty Load]
{'src': {'congruent': 0, 'AVXalign': False, 'same': True, 'size': 1, 'NT': False, 'type': 'addresses_RW'}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'congruent': 7, 'same': False, 'type': 'addresses_WT_ht'}, 'OP': 'REPM', 'dst': {'congruent': 5, 'same': True, 'type': 'addresses_WT_ht'}}
{'32': 21829}
32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32
*/
| 63.71875 | 2,999 | 0.664051 |
39b5b89878f17866b19221db00cdfe294c2fb5cd | 5,369 | asm | Assembly | Transynther/x86/_processed/AVXALIGN/_st_/i7-7700_9_0xca.log_21829_946.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/AVXALIGN/_st_/i7-7700_9_0xca.log_21829_946.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/AVXALIGN/_st_/i7-7700_9_0xca.log_21829_946.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r13
push %r15
push %rax
push %rcx
push %rdi
push %rsi
lea addresses_D_ht+0x2f32, %rsi
lea addresses_WC_ht+0x8e62, %rdi
nop
nop
nop
xor $42373, %r13
mov $89, %rcx
rep movsw
nop
add %rax, %rax
lea addresses_UC_ht+0x1211a, %rsi
lea addresses_WT_ht+0x124e2, %rdi
and %r15, %r15
mov $111, %rcx
rep movsq
nop
nop
nop
nop
nop
and %r15, %r15
pop %rsi
pop %rdi
pop %rcx
pop %rax
pop %r15
pop %r13
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r11
push %r8
push %r9
push %rbp
push %rbx
push %rdi
// Load
lea addresses_PSE+0xe2a2, %rdi
inc %rbx
mov (%rdi), %r10w
nop
nop
cmp $42095, %rdi
// Store
lea addresses_WC+0x16222, %r11
nop
nop
nop
and %rdi, %rdi
mov $0x5152535455565758, %r10
movq %r10, %xmm5
vmovups %ymm5, (%r11)
nop
and $54839, %rbx
// Load
lea addresses_PSE+0xe2a2, %rbx
nop
nop
nop
nop
nop
dec %r11
movb (%rbx), %r8b
nop
nop
nop
add %rdi, %rdi
// Store
mov $0xf22, %r8
nop
xor %rbp, %rbp
mov $0x5152535455565758, %r11
movq %r11, (%r8)
nop
sub %rbx, %rbx
// Faulty Load
lea addresses_PSE+0xe2a2, %rbp
nop
nop
nop
nop
nop
add %rdi, %rdi
mov (%rbp), %r9w
lea oracles, %r11
and $0xff, %r9
shlq $12, %r9
mov (%r11,%r9,1), %r9
pop %rdi
pop %rbx
pop %rbp
pop %r9
pop %r8
pop %r11
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'src': {'congruent': 0, 'AVXalign': False, 'same': False, 'size': 32, 'NT': False, 'type': 'addresses_PSE'}, 'OP': 'LOAD'}
{'src': {'congruent': 0, 'AVXalign': True, 'same': True, 'size': 2, 'NT': False, 'type': 'addresses_PSE'}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'congruent': 6, 'AVXalign': False, 'same': False, 'size': 32, 'NT': False, 'type': 'addresses_WC'}}
{'src': {'congruent': 0, 'AVXalign': False, 'same': True, 'size': 1, 'NT': False, 'type': 'addresses_PSE'}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'congruent': 5, 'AVXalign': False, 'same': False, 'size': 8, 'NT': True, 'type': 'addresses_P'}}
[Faulty Load]
{'src': {'congruent': 0, 'AVXalign': True, 'same': True, 'size': 2, 'NT': False, 'type': 'addresses_PSE'}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'congruent': 4, 'same': False, 'type': 'addresses_D_ht'}, 'OP': 'REPM', 'dst': {'congruent': 6, 'same': False, 'type': 'addresses_WC_ht'}}
{'src': {'congruent': 3, 'same': False, 'type': 'addresses_UC_ht'}, 'OP': 'REPM', 'dst': {'congruent': 6, 'same': False, 'type': 'addresses_WT_ht'}}
{'33': 21829}
33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33
*/
| 41.620155 | 2,999 | 0.656174 |
f924960dd28d299214ef4e422a680a3f25589a62 | 5,549 | asm | Assembly | Transynther/x86/_processed/US/_ht_zr_/i9-9900K_12_0xca.log_21829_1367.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/US/_ht_zr_/i9-9900K_12_0xca.log_21829_1367.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/US/_ht_zr_/i9-9900K_12_0xca.log_21829_1367.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r11
push %r13
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_D_ht+0x16e30, %rsi
lea addresses_A_ht+0x122fc, %rdi
nop
dec %r10
mov $69, %rcx
rep movsq
nop
nop
add $31226, %rsi
lea addresses_normal_ht+0xb9a8, %rsi
lea addresses_D_ht+0x6b40, %rdi
clflush (%rsi)
nop
nop
nop
nop
nop
and %r11, %r11
mov $108, %rcx
rep movsw
nop
nop
nop
sub $24128, %r11
lea addresses_UC_ht+0x19da8, %rsi
lea addresses_UC_ht+0x1a224, %rdi
clflush (%rdi)
add %r13, %r13
mov $25, %rcx
rep movsb
nop
nop
nop
nop
nop
dec %rcx
lea addresses_normal_ht+0x1d4c8, %rcx
nop
nop
nop
nop
nop
xor %rsi, %rsi
movb $0x61, (%rcx)
nop
nop
nop
nop
cmp %r10, %r10
lea addresses_WC_ht+0x15f6d, %rcx
nop
nop
nop
nop
dec %rdx
mov (%rcx), %r11w
add %rcx, %rcx
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %r13
pop %r11
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r11
push %r14
push %r8
push %rbx
push %rdi
// Store
lea addresses_UC+0xfc48, %rbx
nop
sub %r14, %r14
mov $0x5152535455565758, %r8
movq %r8, %xmm4
movups %xmm4, (%rbx)
nop
xor $47081, %r14
// Faulty Load
lea addresses_US+0xa9a8, %rdi
nop
nop
nop
nop
and %r14, %r14
vmovups (%rdi), %ymm1
vextracti128 $1, %ymm1, %xmm1
vpextrq $1, %xmm1, %rbx
lea oracles, %r11
and $0xff, %rbx
shlq $12, %rbx
mov (%r11,%rbx,1), %rbx
pop %rdi
pop %rbx
pop %r8
pop %r14
pop %r11
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'size': 2, 'NT': False, 'type': 'addresses_US', 'same': False, 'AVXalign': False, 'congruent': 0}}
{'OP': 'STOR', 'dst': {'size': 16, 'NT': False, 'type': 'addresses_UC', 'same': False, 'AVXalign': False, 'congruent': 5}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'size': 32, 'NT': False, 'type': 'addresses_US', 'same': True, 'AVXalign': False, 'congruent': 0}}
<gen_prepare_buffer>
{'OP': 'REPM', 'src': {'same': False, 'type': 'addresses_D_ht', 'congruent': 3}, 'dst': {'same': False, 'type': 'addresses_A_ht', 'congruent': 2}}
{'OP': 'REPM', 'src': {'same': False, 'type': 'addresses_normal_ht', 'congruent': 11}, 'dst': {'same': False, 'type': 'addresses_D_ht', 'congruent': 3}}
{'OP': 'REPM', 'src': {'same': False, 'type': 'addresses_UC_ht', 'congruent': 10}, 'dst': {'same': False, 'type': 'addresses_UC_ht', 'congruent': 0}}
{'OP': 'STOR', 'dst': {'size': 1, 'NT': False, 'type': 'addresses_normal_ht', 'same': False, 'AVXalign': False, 'congruent': 5}}
{'OP': 'LOAD', 'src': {'size': 2, 'NT': True, 'type': 'addresses_WC_ht', 'same': False, 'AVXalign': False, 'congruent': 0}}
{'44': 21111, '00': 6, '46': 712}
00 44 44 46 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 46 44 44 44 44 44 44 44 46 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 46 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 46 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 46 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 46 44 44 44 44 44 44 44 44 44 44 44 44 46 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 46 44 44 44 44 46 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 46 44 44 44 44 46 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 46 44 44 46 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 46 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 46 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 46 44 44 44 44 44 44 44 44 44 44 44 44 44 46 44 46 44 44 44 44 44 44 44 44 44 44 46 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 46 44 44 44 44 46 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 46 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 46 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 46 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 46 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 46 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 46 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 46 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 46 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 46 44 44 44 44 44 44 44 44 44 44 44 44 44 46 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 46 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 46 44 44 44 44 44 44
*/
| 41.721805 | 2,999 | 0.66102 |
e936790687a9c151d884c470cef32ecbcdc1ffdd | 2,751 | asm | Assembly | src/win32/932.asm | amindlost/wdosx | 1e256d22c1547e7b1f1ccd23e400f5b81b8bd013 | [
"Unlicense"
] | 7 | 2022-01-20T08:27:54.000Z | 2022-03-17T10:15:31.000Z | src/win32/932.asm | amindlost/wdosx | 1e256d22c1547e7b1f1ccd23e400f5b81b8bd013 | [
"Unlicense"
] | null | null | null | src/win32/932.asm | amindlost/wdosx | 1e256d22c1547e7b1f1ccd23e400f5b81b8bd013 | [
"Unlicense"
] | null | null | null | ; ############################################################################
; ## WDOSX DOS Extender Copyright (c) 1996, 1999, Michael Tippach ##
; ## ##
; ## Released under the terms of the WDOSX license agreement. ##
; ############################################################################
;
; $Header: E:/RCS/WDOSX/0.95/SRC/win32/932.ASM 1.1 1999/03/06 16:23:46 MikeT Exp $
;
; ----------------------------------------------------------------------------
;
; $Log: 932.ASM $
; Revision 1.1 1999/03/06 16:23:46 MikeT
; Initial check in.
;
;
; ----------------------------------------------------------------------------
;
; Contents: XLAT table for code page 932 (Japanese Shift-JIS)
;
; ----------------------------------------------------------------------------
.386
.model flat
.data
PUBLIC CodePage932
CodePage932 LABEL WORD
DW 0
DW 1
DW 2
DW 3
DW 4
DW 5
DW 6
DW 7
DW 8
DW 9
DW 10
DW 11
DW 12
DW 13
DW 14
DW 15
DW 16
DW 17
DW 18
DW 19
DW 20
DW 21
DW 22
DW 23
DW 24
DW 25
DW 26
DW 27
DW 28
DW 29
DW 30
DW 31
DW 32
DW 33
DW 34
DW 35
DW 36
DW 37
DW 38
DW 39
DW 40
DW 41
DW 42
DW 43
DW 44
DW 45
DW 46
DW 47
DW 48
DW 49
DW 50
DW 51
DW 52
DW 53
DW 54
DW 55
DW 56
DW 57
DW 58
DW 59
DW 60
DW 61
DW 62
DW 63
DW 64
DW 65
DW 66
DW 67
DW 68
DW 69
DW 70
DW 71
DW 72
DW 73
DW 74
DW 75
DW 76
DW 77
DW 78
DW 79
DW 80
DW 81
DW 82
DW 83
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DW 85
DW 86
DW 87
DW 88
DW 89
DW 90
DW 91
DW 92
DW 93
DW 94
DW 95
DW 96
DW 97
DW 98
DW 99
DW 100
DW 101
DW 102
DW 103
DW 104
DW 105
DW 106
DW 107
DW 108
DW 109
DW 110
DW 111
DW 112
DW 113
DW 114
DW 115
DW 116
DW 117
DW 118
DW 119
DW 120
DW 121
DW 122
DW 123
DW 124
DW 125
DW 126
DW 127
DW 128
DW 129
DW 130
DW 131
DW 132
DW 133
DW 134
DW 135
DW 136
DW 137
DW 138
DW 139
DW 140
DW 141
DW 142
DW 143
DW 144
DW 145
DW 146
DW 147
DW 148
DW 149
DW 150
DW 151
DW 152
DW 153
DW 154
DW 155
DW 156
DW 157
DW 158
DW 159
DW 160
DW 65377
DW 65378
DW 65379
DW 65380
DW 65381
DW 65382
DW 65383
DW 65384
DW 65385
DW 65386
DW 65387
DW 65388
DW 65389
DW 65390
DW 65391
DW 65392
DW 65393
DW 65394
DW 65395
DW 65396
DW 65397
DW 65398
DW 65399
DW 65400
DW 65401
DW 65402
DW 65403
DW 65404
DW 65405
DW 65406
DW 65407
DW 65408
DW 65409
DW 65410
DW 65411
DW 65412
DW 65413
DW 65414
DW 65415
DW 65416
DW 65417
DW 65418
DW 65419
DW 65420
DW 65421
DW 65422
DW 65423
DW 65424
DW 65425
DW 65426
DW 65427
DW 65428
DW 65429
DW 65430
DW 65431
DW 65432
DW 65433
DW 65434
DW 65435
DW 65436
DW 65437
DW 65438
DW 65439
DW 224
DW 225
DW 226
DW 227
DW 228
DW 229
DW 230
DW 231
DW 232
DW 233
DW 234
DW 235
DW 236
DW 237
DW 238
DW 239
DW 240
DW 241
DW 242
DW 243
DW 244
DW 245
DW 246
DW 247
DW 248
DW 249
DW 250
DW 251
DW 252
DW 253
DW 254
DW 255
END
| 9.652632 | 82 | 0.582334 |
1998cd2cad1150dad66639d1e1cf73aaeb7748f1 | 617 | asm | Assembly | programs/oeis/072/A072400.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/072/A072400.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | programs/oeis/072/A072400.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | ; A072400: (Factors of 4 removed from n) modulo 8.
; 1,2,3,1,5,6,7,2,1,2,3,3,5,6,7,1,1,2,3,5,5,6,7,6,1,2,3,7,5,6,7,2,1,2,3,1,5,6,7,2,1,2,3,3,5,6,7,3,1,2,3,5,5,6,7,6,1,2,3,7,5,6,7,1,1,2,3,1,5,6,7,2,1,2,3,3,5,6,7,5,1,2,3,5,5,6,7,6,1,2,3,7,5,6,7,6,1,2,3,1,5,6,7,2,1,2,3,3,5,6,7,7,1,2,3,5,5,6,7,6,1,2,3,7,5,6,7,2,1,2,3,1,5,6,7,2,1,2,3,3,5,6,7,1,1,2,3,5,5,6,7,6,1,2,3,7,5,6,7,2,1,2,3,1,5,6,7,2,1,2,3,3,5,6,7,3,1,2,3,5,5,6,7,6,1,2,3,7,5,6,7,3,1,2,3,1,5,6,7,2,1,2,3,3,5,6,7,5,1,2,3,5,5,6,7,6,1,2,3,7,5,6,7,6,1,2,3,1,5,6,7,2,1,2,3,3,5,6,7,7,1,2,3,5,5,6,7,6,1,2
add $0,1
lpb $0
dif $0,4
lpe
lpb $0
mod $0,8
lpe
mov $1,$0
| 51.416667 | 501 | 0.518639 |
1fabe448b6372f7df5cf4b974a429660b52ff3ee | 5,382 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0x84_notsx.log_21829_2388.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0x84_notsx.log_21829_2388.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0x84_notsx.log_21829_2388.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r14
push %r15
push %r9
push %rcx
push %rdi
push %rsi
lea addresses_normal_ht+0x16531, %r9
nop
nop
nop
inc %r14
movups (%r9), %xmm1
vpextrq $0, %xmm1, %rcx
nop
nop
nop
nop
and %rdi, %rdi
lea addresses_UC_ht+0x85d5, %rsi
lea addresses_D_ht+0x169d5, %rdi
inc %r14
mov $118, %rcx
rep movsb
nop
nop
nop
and %rdi, %rdi
lea addresses_D_ht+0x10ad5, %r15
nop
cmp %rcx, %rcx
mov (%r15), %rdi
nop
nop
nop
nop
xor %r9, %r9
lea addresses_WT_ht+0x1415, %r15
nop
nop
nop
nop
nop
xor %rcx, %rcx
movl $0x61626364, (%r15)
nop
nop
nop
and $35752, %r9
lea addresses_UC_ht+0x17ea5, %rdi
nop
nop
sub $21550, %r15
mov $0x6162636465666768, %rsi
movq %rsi, %xmm7
and $0xffffffffffffffc0, %rdi
movntdq %xmm7, (%rdi)
nop
nop
nop
nop
nop
cmp %r14, %r14
pop %rsi
pop %rdi
pop %rcx
pop %r9
pop %r15
pop %r14
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r14
push %r15
push %rax
push %rbp
push %rcx
// Load
lea addresses_WC+0x111d5, %r14
nop
sub %r11, %r11
movups (%r14), %xmm3
vpextrq $0, %xmm3, %rcx
xor %r14, %r14
// Faulty Load
lea addresses_PSE+0x5dd5, %r15
nop
nop
nop
nop
sub $59476, %rax
mov (%r15), %ecx
lea oracles, %rax
and $0xff, %rcx
shlq $12, %rcx
mov (%rax,%rcx,1), %rcx
pop %rcx
pop %rbp
pop %rax
pop %r15
pop %r14
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'src': {'type': 'addresses_PSE', 'same': False, 'size': 2, 'congruent': 0, 'NT': False, 'AVXalign': True}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_WC', 'same': False, 'size': 16, 'congruent': 8, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
[Faulty Load]
{'src': {'type': 'addresses_PSE', 'same': True, 'size': 4, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'type': 'addresses_normal_ht', 'same': False, 'size': 16, 'congruent': 2, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_UC_ht', 'congruent': 11, 'same': False}, 'dst': {'type': 'addresses_D_ht', 'congruent': 9, 'same': False}, 'OP': 'REPM'}
{'src': {'type': 'addresses_D_ht', 'same': False, 'size': 8, 'congruent': 7, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'dst': {'type': 'addresses_WT_ht', 'same': False, 'size': 4, 'congruent': 5, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_UC_ht', 'same': False, 'size': 16, 'congruent': 4, 'NT': True, 'AVXalign': False}, 'OP': 'STOR'}
{'33': 21829}
33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33
*/
| 42.714286 | 2,999 | 0.659234 |
ff673240bd7cfce3cf7e7437a7738bc2740eba36 | 101 | asm | Assembly | src/test/resources/data/generationtests/glass-irp.asm | cpcitor/mdlz80optimizer | 75070d984e1f08474e6d397c7e0eb66d8be0c432 | [
"Apache-2.0"
] | 36 | 2020-06-29T06:52:26.000Z | 2022-02-10T19:41:58.000Z | src/test/resources/data/generationtests/glass-irp.asm | cpcitor/mdlz80optimizer | 75070d984e1f08474e6d397c7e0eb66d8be0c432 | [
"Apache-2.0"
] | 39 | 2020-07-02T18:19:34.000Z | 2022-03-27T18:08:54.000Z | src/test/resources/data/generationtests/glass-irp.asm | cpcitor/mdlz80optimizer | 75070d984e1f08474e6d397c7e0eb66d8be0c432 | [
"Apache-2.0"
] | 7 | 2020-07-02T06:00:05.000Z | 2021-11-28T17:31:13.000Z | ; Test case:
xor a
IRP ?value, 1 , 2, 4, 8
or ?value
ENDM
ld (value),a
end:
jp end
value:
db 0
| 9.181818 | 23 | 0.584158 |
bfb66f19233a734f0fd57e858d6d3fa085e1a089 | 343 | asm | Assembly | src/test/resources/data/reorganizertests/test-local3-expected.asm | cpcitor/mdlz80optimizer | 75070d984e1f08474e6d397c7e0eb66d8be0c432 | [
"Apache-2.0"
] | 36 | 2020-06-29T06:52:26.000Z | 2022-02-10T19:41:58.000Z | src/test/resources/data/reorganizertests/test-local3-expected.asm | cpcitor/mdlz80optimizer | 75070d984e1f08474e6d397c7e0eb66d8be0c432 | [
"Apache-2.0"
] | 39 | 2020-07-02T18:19:34.000Z | 2022-03-27T18:08:54.000Z | src/test/resources/data/reorganizertests/test-local3-expected.asm | cpcitor/mdlz80optimizer | 75070d984e1f08474e6d397c7e0eb66d8be0c432 | [
"Apache-2.0"
] | 7 | 2020-07-02T06:00:05.000Z | 2021-11-28T17:31:13.000Z | s__CODE:
_infobar_update_map:
_infobar_update_map00173:
ret
_infobar_update_rupees:
push ix
_infobar_update_rupees00102:
xor a
jp z, _infobar_update_rupees00173
; jr 00104$ ; -mdl
_infobar_update_rupees00104:
xor a
_infobar_update_rupees00173:
pop ix
ret
_infobar_update_rupees00176:
ret
s__INITIALIZER:
s__CABS: | 18.052632 | 37 | 0.784257 |
4bceadfcc1c58ec969d49d57c3138ddb144bacd2 | 722 | asm | Assembly | ffight/lcs/enemy/20.asm | zengfr/arcade_game_romhacking_sourcecode_top_secret_data | a4a0c86c200241494b3f1834cd0aef8dc02f7683 | [
"Apache-2.0"
] | 6 | 2020-10-14T15:29:10.000Z | 2022-02-12T18:58:54.000Z | ffight/lcs/enemy/20.asm | zengfr/arcade_game_romhacking_sourcecode_top_secret_data | a4a0c86c200241494b3f1834cd0aef8dc02f7683 | [
"Apache-2.0"
] | null | null | null | ffight/lcs/enemy/20.asm | zengfr/arcade_game_romhacking_sourcecode_top_secret_data | a4a0c86c200241494b3f1834cd0aef8dc02f7683 | [
"Apache-2.0"
] | 1 | 2020-12-17T08:59:10.000Z | 2020-12-17T08:59:10.000Z | copyright zengfr site:http://github.com/zengfr/romhack
003A06 movem.l D0-D3, -(A6)
003A0A movem.l D0-D3, -(A6)
003AE6 move.w (A1)+, D0 [1p+20, 1p+22, boss+20, boss+22, container+20, container+22, enemy+20, enemy+22, weapon+20, weapon+22]
003B0C movea.l ($20,A6), A1 [1p+20, 1p+22, boss+20, boss+22, container+20, container+22, enemy+20, enemy+22, weapon+20, weapon+22]
003B20 move.w (A1)+, D0 [1p+20, 1p+22, boss+20, boss+22, container+20, container+22, enemy+20, enemy+22, weapon+20, weapon+22]
003B46 movea.l ($20,A6), A1 [boss+20, boss+22, enemy+20, enemy+22]
003B5A move.w (A1)+, D0 [boss+20, boss+22, enemy+20, enemy+22]
009ACA dbra D5, $9ac8
copyright zengfr site:http://github.com/zengfr/romhack
| 55.538462 | 131 | 0.680055 |
4dd8ca38ee29e97aa2c497a6a9cb7db3289b2c56 | 257 | asm | Assembly | asm/blink.asm | dspmathguru/lipsi | ba578a619fbd754fc1f465f068747bdcb6710278 | [
"BSD-2-Clause"
] | 62 | 2017-11-29T01:07:53.000Z | 2022-03-28T00:14:59.000Z | asm/blink.asm | dspmathguru/lipsi | ba578a619fbd754fc1f465f068747bdcb6710278 | [
"BSD-2-Clause"
] | 4 | 2019-03-15T13:29:32.000Z | 2020-06-16T07:07:33.000Z | asm/blink.asm | dspmathguru/lipsi | ba578a619fbd754fc1f465f068747bdcb6710278 | [
"BSD-2-Clause"
] | 14 | 2019-03-04T20:32:30.000Z | 2021-09-13T12:32:59.000Z | #
# A blinking and counting LED as hello world
#
ldi 0x00
st r1
outer:
ld r1
addi 0x01
st r1
io 0x0
ldi 0x7f
st r3
loop3:
ldi 0xff
st r2
loop2:
ldi 0xff
loop:
subi 0x01
brnz loop
ld r2
subi 0x01
st r2
brnz loop2
ld r3
subi 0x01
st r3
brnz loop3
br outer
| 7.787879 | 44 | 0.731518 |
3f7bd9003c22e7431dffee55bdfd8f7b528443f8 | 619 | asm | Assembly | oeis/010/A010548.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/010/A010548.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/010/A010548.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A010548: Decimal expansion of square root of 97.
; 9,8,4,8,8,5,7,8,0,1,7,9,6,1,0,4,7,2,1,7,4,6,2,1,1,4,1,4,9,1,7,6,2,4,4,8,1,6,9,6,1,3,6,2,8,7,4,4,2,7,6,4,1,7,1,7,2,3,1,5,4,5,2,9,8,3,6,4,4,0,5,8,3,7,0,7,6,7,8,6,3,0,0,9,3,2,0,0,7,8,4,1,1,5,4,2,5,7,6,2
mov $1,1
mov $2,1
mov $3,$0
add $3,8
mov $4,$0
add $4,3
mul $4,2
mov $7,10
pow $7,$4
mov $9,10
lpb $3
mov $4,$2
pow $4,2
mul $4,97
mov $5,$1
pow $5,2
add $4,$5
mov $6,$1
mov $1,$4
mul $6,$2
mul $6,2
mov $2,$6
mov $8,$4
div $8,$7
max $8,2
div $1,$8
div $2,$8
sub $3,1
lpe
mov $3,$9
pow $3,$0
div $2,$3
div $1,$2
mod $1,$9
mov $0,$1
| 15.871795 | 201 | 0.50727 |
22e6dcc5842c15d90b84081db13067582d80f3eb | 429 | asm | Assembly | u7bg/itemLabels.asm | JohnGlassmyer/UltimaHacks | f9a114e00c4a1edf1ac7792b465feff2c9b88ced | [
"MIT"
] | 68 | 2018-03-04T22:34:22.000Z | 2022-03-10T15:18:32.000Z | u7bg/itemLabels.asm | ptrie/UltimaHacks | 2c3557a86d94ad8b54b26bc395b9aed1604f8be1 | [
"MIT"
] | 19 | 2018-11-20T04:06:49.000Z | 2021-11-08T16:37:10.000Z | u7bg/itemLabels.asm | ptrie/UltimaHacks | 2c3557a86d94ad8b54b26bc395b9aed1604f8be1 | [
"MIT"
] | 4 | 2020-09-01T17:57:36.000Z | 2022-01-04T20:51:11.000Z | %include "include/u7bg-all-includes.asm"
defineAddress 243, 0x03CF, clickItemInWorld_produceText
defineAddress 243, 0x044A, clickItemInWorld_produceText_end
defineAddress 243, 0x0467, clickItemInWorld_end
defineAddress 340, 0x1895, clickItemInInventory_produceText
defineAddress 340, 0x1907, clickItemInInventory_produceText_end
defineAddress 340, 0x1991, clickItemInInventory_end
%include "../u7-common/patch-itemLabels.asm"
| 35.75 | 63 | 0.86014 |
cc0d0f2290481e3502e6ea8d4533e69c473854a5 | 299 | asm | Assembly | asm/mbr.asm | dyc-it/myos | 8b679feb34663d0c31c2ed88d8936778b42e6b66 | [
"MIT"
] | null | null | null | asm/mbr.asm | dyc-it/myos | 8b679feb34663d0c31c2ed88d8936778b42e6b66 | [
"MIT"
] | null | null | null | asm/mbr.asm | dyc-it/myos | 8b679feb34663d0c31c2ed88d8936778b42e6b66 | [
"MIT"
] | null | null | null | ;boot.asm
org 07c00h
mov ax, cs
mov ds, ax
mov es, ax
call DispStr
jmp $
DispStr:
mov ax, BootMessage
mov bp, ax
mov cx, 16
mov ax, 01301h
mov bx, 000ch
mov dl, 0
int 10h
ret
BootMessage: db "Booting OS..."
times 510-($-$$) db 0
dw 0xaa55
| 14.238095 | 34 | 0.551839 |
ce2d96facf069743e69134da1f17980204410ff8 | 504 | asm | Assembly | programs/oeis/258/A258645.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/258/A258645.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/258/A258645.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A258645: Fifth arithmetic derivative of n.
; 0,0,0,0,4,0,0,0,176,0,0,0,368,0,0,80,752,0,0,0,240,0,0,0,608,0,32,27,752,0,0,0,1520,1,0,176,560,0,0,368,284,0,0,0,1552,176,0,0,3120,1,80,112,560,0,1188,368,1312,0,0,0,1312,0,5,48,36864,1,0,0,288,16,0,0,912,0,176,176,1520,1,0,0,3424,2484,0,0,5056,0,80,752,2368,0,240,112,3312,0,5,240,8976,0,7,80
seq $0,258644 ; Fourth arithmetic derivative of n.
seq $0,3415 ; a(n) = n' = arithmetic derivative of n: a(0) = a(1) = 0, a(prime) = 1, a(mn) = m*a(n) + n*a(m).
| 84 | 296 | 0.642857 |
0af4911fe6e093407388d20664bd4ca43867251f | 279 | asm | Assembly | libsrc/osca/osca_version.asm | meesokim/z88dk | 5763c7778f19a71d936b3200374059d267066bb2 | [
"ClArtistic"
] | null | null | null | libsrc/osca/osca_version.asm | meesokim/z88dk | 5763c7778f19a71d936b3200374059d267066bb2 | [
"ClArtistic"
] | null | null | null | libsrc/osca/osca_version.asm | meesokim/z88dk | 5763c7778f19a71d936b3200374059d267066bb2 | [
"ClArtistic"
] | null | null | null | ;
; Get the OSCA Architecture version number
; by Stefano Bodrato, 2011
;
; int osca_version();
;
;
; $Id: osca_version.asm,v 1.2 2015/01/19 01:33:00 pauloscustodio Exp $
;
INCLUDE "flos.def"
PUBLIC osca_version
osca_version:
call kjt_get_version
ld h,d
ld l,e
ret
| 13.95 | 70 | 0.698925 |
671538f69e153d6ccbc4da616724a5f4faf75954 | 690 | asm | Assembly | Working Disassembly/Levels/CNZ/Misc Object Data/Anim - Balloon.asm | TeamASM-Blur/Sonic-3-Blue-Balls-Edition | 7e8a2c5df02271615ff4cae529521e6b1560d6b1 | [
"Apache-2.0"
] | 5 | 2021-07-09T08:17:56.000Z | 2022-02-27T19:57:47.000Z | Working Disassembly/Levels/CNZ/Misc Object Data/Anim - Balloon.asm | TeamASM-Blur/Sonic-3-Blue-Balls-Edition | 7e8a2c5df02271615ff4cae529521e6b1560d6b1 | [
"Apache-2.0"
] | null | null | null | Working Disassembly/Levels/CNZ/Misc Object Data/Anim - Balloon.asm | TeamASM-Blur/Sonic-3-Blue-Balls-Edition | 7e8a2c5df02271615ff4cae529521e6b1560d6b1 | [
"Apache-2.0"
] | null | null | null | Ani_3185E: dc.w byte_31872-Ani_3185E
dc.w byte_31878-Ani_3185E
dc.w byte_3187C-Ani_3185E
dc.w byte_31882-Ani_3185E
dc.w byte_31886-Ani_3185E
dc.w byte_3188C-Ani_3185E
dc.w byte_31890-Ani_3185E
dc.w byte_31896-Ani_3185E
dc.w byte_3189A-Ani_3185E
dc.w byte_318A0-Ani_3185E
byte_31872: dc.b 7, 0, 1, 2, 1, $FF
byte_31878: dc.b 2, 3, 4, $FB
byte_3187C: dc.b 7, 5, 6, 7, 6, $FF
byte_31882: dc.b 2, 8, 9, $FB
byte_31886: dc.b 7, $A, $B, $C, $B, $FF
byte_3188C: dc.b 2, $D, $E, $FB
byte_31890: dc.b 7, $F, $10, $11, $10, $FF
byte_31896: dc.b 2, $12, $13, $FB
byte_3189A: dc.b 7, $14, $15, $16, $15, $FF
byte_318A0: dc.b 2, $17, $18, $FB
| 32.857143 | 44 | 0.623188 |
9cbfdab8281739558a133df1802c6109d00c33d3 | 645 | asm | Assembly | programs/oeis/338/A338064.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/338/A338064.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/338/A338064.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A338064: Numbers k such that the Enots Wolley sequence A336957(k) is even.
; 2,3,6,7,10,11,14,15,18,19,22,23,26,27,30,31,34,35,38,39,42,43,46,47,50,51,54,55,58,59,62,63,66,67,70,71,74,75,78,79,82,83,86,87,90,91,94,95,98,99,102,103,106,107,110,111,114,115,118,119,122,123,126,127,130,131,134,135,138,139,142,143,146,147,150,151,154,155,158,159,162,163,166,167,170,171,174,175,178,179,182,183,186,187,190,191,194,195,198,199
mov $2,$0
mov $4,$0
add $4,1
lpb $4
mov $0,$2
sub $4,1
sub $0,$4
seq $0,86090 ; 2^n+n3^n.
mul $0,283523
seq $0,21147 ; Decimal expansion of 1/143.
mov $3,$0
div $3,3
add $3,1
add $1,$3
lpe
mov $0,$1
| 32.25 | 347 | 0.654264 |
334fd1acc1882ad6d9ac2d83bca11d6280388a70 | 1,217 | asm | Assembly | Algorithms/Fibonacci/NASM/A2rec.asm | Sandeep228/Algorithm-and-Data-Structure-Collection | 7b85dd1085bc6178aa67af345151b4032b6250fb | [
"MIT"
] | null | null | null | Algorithms/Fibonacci/NASM/A2rec.asm | Sandeep228/Algorithm-and-Data-Structure-Collection | 7b85dd1085bc6178aa67af345151b4032b6250fb | [
"MIT"
] | null | null | null | Algorithms/Fibonacci/NASM/A2rec.asm | Sandeep228/Algorithm-and-Data-Structure-Collection | 7b85dd1085bc6178aa67af345151b4032b6250fb | [
"MIT"
] | 1 | 2021-10-08T12:14:19.000Z | 2021-10-08T12:14:19.000Z | %include "asm_io.inc"
segment .data
segment .bss
segment .text
global asm_main
asm_main:
enter 0,0
pusha
call read_int
push eax
call fib_rec
pop ecx
call print_int
call print_nl
popa
mov eax, 0
leave
ret
fib_rec:
enter 4,0
pusha
mov eax, [ebp + 8] ;eax = n
cmp eax, 0 ;if n == 0
je n_is_zero
cmp eax, 1 ;if n == 1
je n_is_one
dec eax ; eax = n - 1
mov ebx, eax ; ebx = eax wobei ebx = n-2 und eax = n-1 werden soll
push eax ; n-1 auf stack pushen
call fib_rec ; erste rekursion für fib(n-1) danach ist eax = fib(n-1)
mov [ebp - 4], eax ; return wert von fib(n-1) in eax speichern da gleich eax überschrieben wird
pop ecx ; oberstes element wieder entfernen
dec ebx ; ebx = n-2
push ebx ; n-2 auf stack pushen
call fib_rec ; zweite rekursion für fib(n-2) danach ist eax = fib(n-2)
pop ecx ; oberstes element wieder entfernen
add eax, [ebp - 4] ; f(n-1) += f(n-2)
jmp end_function
n_is_zero:
mov eax, 0
jmp end_function
n_is_one:
mov eax, 1
end_function:
mov [ebp - 4], eax
popa
mov eax, [ebp - 4]
leave
ret
| 18.164179 | 98 | 0.585867 |
d65c834b9f6d98a5f92959c8a930b657719ab3b9 | 5,885 | asm | Assembly | Transynther/x86/_processed/NONE/_zr_/i7-8650U_0xd2.log_21829_103.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_zr_/i7-8650U_0xd2.log_21829_103.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_zr_/i7-8650U_0xd2.log_21829_103.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r11
push %r12
push %r14
push %r15
push %rcx
push %rdi
push %rsi
lea addresses_D_ht+0x57b0, %rcx
nop
nop
nop
nop
xor %r10, %r10
mov (%rcx), %r14d
nop
dec %r12
lea addresses_UC_ht+0x9718, %rcx
nop
nop
add %r15, %r15
vmovups (%rcx), %ymm0
vextracti128 $0, %ymm0, %xmm0
vpextrq $1, %xmm0, %r11
xor %r10, %r10
lea addresses_D_ht+0x10f30, %rsi
lea addresses_A_ht+0xbc8, %rdi
nop
nop
sub $45736, %r11
mov $117, %rcx
rep movsq
xor %r15, %r15
lea addresses_WC_ht+0xb890, %rsi
lea addresses_D_ht+0x9df0, %rdi
nop
add $2382, %r14
mov $109, %rcx
rep movsb
nop
nop
xor %r10, %r10
lea addresses_UC_ht+0x2f30, %r15
nop
nop
nop
nop
inc %r10
movb $0x61, (%r15)
and $61637, %r11
lea addresses_WT_ht+0x33b0, %rdi
nop
nop
nop
and $17946, %r15
mov $0x6162636465666768, %r10
movq %r10, (%rdi)
nop
nop
nop
cmp $57357, %rcx
pop %rsi
pop %rdi
pop %rcx
pop %r15
pop %r14
pop %r12
pop %r11
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r13
push %r14
push %r15
push %r8
push %r9
push %rcx
// Load
lea addresses_WT+0x126f0, %r9
nop
nop
nop
add %rcx, %rcx
mov (%r9), %r11w
add $46228, %r13
// Store
lea addresses_UC+0x1444e, %r13
nop
nop
xor $26149, %r14
mov $0x5152535455565758, %r11
movq %r11, %xmm3
movups %xmm3, (%r13)
dec %rcx
// Faulty Load
lea addresses_UC+0x18bb0, %rcx
nop
nop
nop
nop
nop
add %r15, %r15
mov (%rcx), %r9w
lea oracles, %r13
and $0xff, %r9
shlq $12, %r9
mov (%r13,%r9,1), %r9
pop %rcx
pop %r9
pop %r8
pop %r15
pop %r14
pop %r13
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'type': 'addresses_UC', 'size': 16, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_WT', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 6, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_UC', 'size': 16, 'AVXalign': False, 'NT': False, 'congruent': 1, 'same': False}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'type': 'addresses_UC', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': True}}
<gen_prepare_buffer>
{'OP': 'LOAD', 'src': {'type': 'addresses_D_ht', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 9, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_UC_ht', 'size': 32, 'AVXalign': False, 'NT': False, 'congruent': 2, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_D_ht', 'congruent': 7, 'same': False}, 'dst': {'type': 'addresses_A_ht', 'congruent': 1, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_WC_ht', 'congruent': 4, 'same': False}, 'dst': {'type': 'addresses_D_ht', 'congruent': 6, 'same': True}}
{'OP': 'STOR', 'dst': {'type': 'addresses_UC_ht', 'size': 1, 'AVXalign': True, 'NT': False, 'congruent': 7, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WT_ht', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 8, 'same': False}}
{'00': 21829}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
| 41.153846 | 2,999 | 0.656245 |
014c46cdfd65afd6ee355d3e32a2b8a275afd6ed | 1,020 | asm | Assembly | asm/loops/andLoop.asm | IronHeart7334/AssemblyPrograms | e5b0649d2a1eb69bb5632c8219187d72fd69d057 | [
"MIT"
] | null | null | null | asm/loops/andLoop.asm | IronHeart7334/AssemblyPrograms | e5b0649d2a1eb69bb5632c8219187d72fd69d057 | [
"MIT"
] | null | null | null | asm/loops/andLoop.asm | IronHeart7334/AssemblyPrograms | e5b0649d2a1eb69bb5632c8219187d72fd69d057 | [
"MIT"
] | null | null | null | ; general comments
; sum references a named memory doubleword
; count is in ECX
;
; count := 0
; sum := 500
; while ((count <= 60) and (sum > 200))
; subtract count from sum
; add 5 to count
; end while
; preprocessor directives
.586
.MODEL FLAT
; external files to link with
; stack configuration
.STACK 4096
; named memory allocation and initialization
.DATA
sum DWORD 500d
countMax DWORD 60d
sumMin DWORD 200d
; names of procedures defined in other *.asm files in the project
; procedure code
.CODE
main PROC
mov ECX, 0d
mov EBX, sumMin ; can't do cmp with two named memory locations, so I need this
checkLoopCondition: ; need this in case it shouldn't enter the loop at all
cmp ECX, countMax
ja endOfLoop
cmp sum, EBX
jbe endOfLoop
jmp startOfWhileLoop
startOfWhileLoop:
sub sum, ECX
add ECX, 5
jmp checkLoopCondition
endOfLoop:
; done looping
mov EAX, 0
ret
main ENDP
END
| 19.245283 | 86 | 0.65098 |
738e0943c116e82d5dfd276eedfbe90bacfac39e | 164,554 | asm | Assembly | eurasia/services4/srvinit/devices/sgx/sgx_utils.asm | shaqfu786/GFX_Linux_DDK | f184ac914561fa100a5c92a488df777de8785f93 | [
"FSFAP"
] | 3 | 2020-03-13T23:37:00.000Z | 2021-09-03T06:34:04.000Z | eurasia/services4/srvinit/devices/sgx/sgx_utils.asm | zzpianoman/GFX_Linux_DDK | f184ac914561fa100a5c92a488df777de8785f93 | [
"FSFAP"
] | null | null | null | eurasia/services4/srvinit/devices/sgx/sgx_utils.asm | zzpianoman/GFX_Linux_DDK | f184ac914561fa100a5c92a488df777de8785f93 | [
"FSFAP"
] | 6 | 2015-02-05T03:01:01.000Z | 2021-07-24T01:07:18.000Z | /*****************************************************************************
Name : sgx_utils.asm
Title : SGX microkernel utility code
Author : Imagination Technologies
Created : 29/08/2007
Copyright : 2006 by Imagination Technologies Limited. All rights reserved.
No part of this software, either material or conceptual
may be copied or distributed, transmitted, transcribed,
stored in a retrieval system or translated into any
human or computer language in any form by any means,
electronic, mechanical, manual or other-wise, or
disclosed to third parties without the express written
permission of Imagination Technologies Limited, HomePark
Industrial Estate, King's Langley, Hertfordshire,
WD4 8LZ, U.K.
Description : SGX Microkernel utility code
Program Type : USSE assembly language
Modifications :
File: sgx_utils.asm
*****************************************************************************/
/*****************************************************************************
Temporary register usage in sgx_utils code
-------------------------------------------
10 temps are required, r16-r23 & r30-r31, for the utils code:
- 8 for temporary usage in functions
- 1 for pclink copy for calls from utils
- 1 for cache status
*****************************************************************************/
#include "usedefs.h"
#if defined(SUPPORT_EXTERNAL_SYSTEM_CACHE)
/* Pull in system specific code */
#include "extsyscache.h"
#endif
.export InvalidateBIFCache;
.export SetupDirListBase;
#if defined(SGX_FEATURE_MULTIPLE_MEM_CONTEXTS)
.export SetupRequestor;
#if defined(SUPPORT_SGX_EDM_MEMORY_DEBUG)
.export SetupRequestorEDM;
#endif /* SUPPORT_SGX_EDM_MEMORY_DEBUG */
#endif /* SGX_FEATURE_MULTIPLE_MEM_CONTEXTS */
.export DPMThresholdUpdate;
.export DPMReloadFreeList;
.export IdleCore;
.export Resume;
.export LoadTAPB;
.export StoreTAPB;
.export Load3DPB;
.export Store3DPB;
.export SetupDPMPagetable;
#if defined(SGX_FAST_DPM_INIT) && (SGX_FEATURE_NUM_USE_PIPES > 1)
.export SDPT_PDSConstSize;
.export SDPT_PDSDevAddr;
#endif
.export StoreDPMContext;
.export LoadDPMContext;
.export DPMStateClear;
.export DPMStateStore;
.export DPMStateLoad;
.export EmitLoopBack;
.export ELB_PDSConstSize;
.export ELB_PDSDevAddr;
.modulealign 16;
#if defined(FIX_HW_BRN_21590)
/* FIX_HW_BRN_21590 - Code is written so Load/Store operations of the TAAC (TA Control Table)
and LSS (TA State Table) are NOT done simultaneously. */
#endif
#if defined(FIX_HW_BRN_23533)
/* FIX_HW_BRN_23533 - Code is written to only support SGX_SUPPORT_SPM_MODE_1 and this is
SPM_MODE_0 specific. */
#endif
#if defined(FIX_HW_BRN_27006)
/* FIX_HW_BRN_27006 - Code is written to only use IEEE32 format */
#endif
/*****************************************************************************
Macro definitions
*****************************************************************************/
/*****************************************************************************
Start of program
*****************************************************************************/
/*****************************************************************************
InvalidateBIFCache
Invalidate the BIF directory cache.
inputs: r16 - zero for PTE, non-zero for PD
temps: r17, r18
*****************************************************************************/
InvalidateBIFCache:
{
#if defined(DEBUG) && defined(FIX_HW_BRN_28889)
MK_LOAD_STATE(r17, ui32ITAFlags, drc0);
MK_LOAD_STATE(r18, ui32IRenderFlags, drc0);
MK_WAIT_FOR_STATE_LOAD(drc0);
and.testz p0, r17, #TA_IFLAGS_TAINPROGRESS;
/* if the pr_block bit is set the TA is idle, so continue with 3D check */
!p0 shl.tests p0, r17, #(31 - TA_IFLAGS_OOM_PR_BLOCKED_BIT);
p0 and.testz p0, r18, #RENDER_IFLAGS_RENDERINPROGRESS;
p0 ba IBC_CoreIdle;
{
MK_ASSERT_FAIL(MKTC_IBC_ILLEGAL);
}
IBC_CoreIdle:
#endif
INVALIDATE_BIF_CACHE(r16, r17, r18, SGX_Utils_IDC);
lapc;
}
/*****************************************************************************
CheckTAQueue
Checks the TA queue and either emits a loopback or sets ACTIVE_POWER
flag
inputs:
temps: r16, r17, r18
*****************************************************************************/
.export CheckTAQueue;
CheckTAQueue:
{
/* Check all the priority levels */
mov r16, #0;
CTAQ_NextPriority:
{
MK_LOAD_STATE_INDEXED(r18, sPartialRenderContextHead, r16, drc0, r17);
MK_WAIT_FOR_STATE_LOAD(drc0);
and.testnz p2, r18, r18;
p2 mov r16, #USE_LOOPBACK_FINDTA;
p2 ba EmitLoopBack;
/* Move on to the next priority */
iaddu32 r16, r16.low, #1;
xor.testnz p2, r16, #SGX_MAX_CONTEXT_PRIORITY;
p2 ba CTAQ_NextPriority;
}
/* All priorities are empty */
mov r16, #SGX_UKERNEL_APFLAGS_TA;
ba ClearActivePowerFlags;
/* We will never get here as one of the subroutine will be called */
}
/*****************************************************************************
Check3DQueues
Checks the Transfer queue and either emits a loopback or sets ACTIVE_POWER
flag
inputs:
temps: r16, r17, r18, r19, r20
*****************************************************************************/
.export Check3DQueues;
Check3DQueues:
{
/* Check all the priority levels */
mov r16, #0;
C3DQ_NextPriority:
{
MK_LOAD_STATE_INDEXED(r19, sTransferContextHead, r16, drc0, r17);
MK_LOAD_STATE_INDEXED(r20, sCompleteRenderContextHead, r16, drc0, r18);
MK_WAIT_FOR_STATE_LOAD(drc0);
or.testnz p2, r19, r20;
p2 mov r16, #USE_LOOPBACK_FIND3D;
p2 ba EmitLoopBack;
/* Move on to the next priority */
iaddu32 r16, r16.low, #1;
xor.testnz p2, r16, #SGX_MAX_CONTEXT_PRIORITY;
p2 ba C3DQ_NextPriority;
}
/* All priorities are empty */
mov r16, #SGX_UKERNEL_APFLAGS_3D;
ba ClearActivePowerFlags;
/* We will never get here as one of the subroutine will be called */
}
#if defined(SGX_FEATURE_2D_HARDWARE)
/*****************************************************************************
Check2DQueue
Checks the 2D queue and either emits a loopback or sets ACTIVE_POWER
flag
inputs:
temps: r16, r17, r18
*****************************************************************************/
.export Check2DQueue;
Check2DQueue:
{
/* Check all the priority levels */
mov r16, #0;
C2DQ_NextPriority:
{
MK_LOAD_STATE_INDEXED(r18, s2DContextHead, r16, drc0, r17);
MK_WAIT_FOR_STATE_LOAD(drc0);
and.testnz p2, r18, r18;
p2 mov r16, #USE_LOOPBACK_FIND2D;
p2 ba EmitLoopBack;
/* Move on to the next priority */
iaddu32 r16, r16.low, #1;
xor.testnz p2, r16, #SGX_MAX_CONTEXT_PRIORITY;
p2 ba C2DQ_NextPriority;
}
/* All priorities are empty */
mov r16, #SGX_UKERNEL_APFLAGS_2D;
ba ClearActivePowerFlags;
/* We will never get here as one of the subroutine will be called */
}
#endif
/*****************************************************************************
Resume
Resume DMS
inputs: None
temps : r16
predicates: p3
******************************************************************************/
Resume:
{
/* enable all the DMs */
MK_MEM_ACCESS_BPCACHE(ldad) r16, [R_TA3DCtl, HSH(DOFFSET(SGXMK_TA3D_CTL.ui32IdleCoreRefCount))], drc0 ;
wdf drc0 ;
xor.testz p3, r16, #0;
p3 ba RSM_JustResume;
iadd32 r16, r16.low, #-1 ;
MK_MEM_ACCESS_BPCACHE(stad) [R_TA3DCtl, HSH(DOFFSET(SGXMK_TA3D_CTL.ui32IdleCoreRefCount))], r16;
idf drc0, st;
wdf drc0;
xor.testnz p3, r16, #0;
p3 ba RSM_NoResume;
RSM_JustResume:
#if defined(EUR_CR_MASTER_DPM_PROACTIVE_PIM_SPEC)
#if !defined(FIX_HW_BRN_31109)
/* Re-enable proactive PIM spec */
READMASTERCONFIG(r16, #EUR_CR_MASTER_DPM_PROACTIVE_PIM_SPEC >> 2, drc0);
wdf drc0;
and r16, r16, ~#EUR_CR_MASTER_DPM_PROACTIVE_PIM_SPEC_EN_N_MASK;
WRITEMASTERCONFIG(#EUR_CR_MASTER_DPM_PROACTIVE_PIM_SPEC >> 2, r16, r17);
#endif
#endif
ldr r16, HSH(EUR_CR_DMS_CTRL) >> 2, drc0;
wdf drc0;
and r16, r16, HSH(~EUR_CR_DMS_CTRL_DISABLE_DM_MASK);
str HSH(EUR_CR_DMS_CTRL) >> 2, r16;
RSM_NoResume:
lapc;
}
/*****************************************************************************
IdleCore
Ensure the DPM/USSE is idle
inputs: r16 - 0x1 = Idle3D, 0x2= IdleTA, 0x4 = IdleUSSEOnly flag
temps: r17, r18, r19, r20, r21
*****************************************************************************/
IdleCore:
{
/* Before we try to idle anything, check if it is actually busy! */
MK_MEM_ACCESS_BPCACHE(ldad) r17, [R_TA3DCtl, #DOFFSET(SGXMK_TA3D_CTL.ui32IdleCoreRefCount)], drc0;
wdf drc0;
iaddu32 r17, r17.low, #1;
MK_MEM_ACCESS_BPCACHE(stad) [R_TA3DCtl, #DOFFSET(SGXMK_TA3D_CTL.ui32IdleCoreRefCount)], r17;
idf drc0, st;
wdf drc0;
IC_FromTheStart:
/* Before we try to idle anything, check if it is actually busy! */
and r17, r16, #USE_IDLECORE_TA3D_REQ_MASK;
xor.testz p2, r17, #USE_IDLECORE_3D_REQ;
p2 MK_LOAD_STATE(r17, ui32IRenderFlags, drc0);
p2 ba IC_FlagsLoaded;
{
MK_LOAD_STATE(r17, ui32ITAFlags, drc0);
MK_WAIT_FOR_STATE_LOAD(drc0);
/* if we have issued an abort the TA will not be allocating pages, so exit */
and.testnz p2, r17, #TA_IFLAGS_ABORTINPROGRESS;
p2 ba IC_CoreIdle;
}
IC_FlagsLoaded:
MK_WAIT_FOR_STATE_LOAD(drc0);
and.testz p2, r17, #TA_IFLAGS_TAINPROGRESS; // note TA and 3D use same bit for "busy"
p2 ba IC_CoreIdle;
{
/* disable DM events on PDS */
ldr r17, #EUR_CR_DMS_CTRL >> 2, drc0;
wdf drc0;
/* all but loopbacks */
or r17, r17, #(EUR_CR_DMS_CTRL_DISABLE_DM_VERTEX_MASK | \
EUR_CR_DMS_CTRL_DISABLE_DM_PIXEL_MASK | \
EUR_CR_DMS_CTRL_DISABLE_DM_EVENT_MASK);
str #EUR_CR_DMS_CTRL >> 2, r17;
#if defined(EUR_CR_MASTER_DPM_PROACTIVE_PIM_SPEC)
/* Disable proactive PIM spec */
READMASTERCONFIG(r17, #EUR_CR_MASTER_DPM_PROACTIVE_PIM_SPEC >> 2, drc0);
wdf drc0;
or r17, r17, #EUR_CR_MASTER_DPM_PROACTIVE_PIM_SPEC_EN_N_MASK;
WRITEMASTERCONFIG(#EUR_CR_MASTER_DPM_PROACTIVE_PIM_SPEC >> 2, r17, r18);
#endif
IC_RecheckAll:
{
#if defined(FIX_HW_BRN_24549) || defined(FIX_HW_BRN_25615)
and.testnz p2, r16, #USE_IDLECORE_USSEONLY_REQ;
p2 ba IC_PollForUSSEIdle;
#endif
{
/* TA or 3D */
and r17, r16, #USE_IDLECORE_TA3D_REQ_MASK;
xor.testz p2, r17, #USE_IDLECORE_3D_REQ;
p2 ba IC_PollForISPIdle;
{
/* Wait for the MTE sig 1 to go idle */
IC_PollForMTEIdle:
{
#if defined(EUR_CR_MTE_MEM_CHECKSUM)
ldr r17, #EUR_CR_MTE_MEM_CHECKSUM >> 2, drc0;
#else
ldr r17, #EUR_CR_MTE_SIG1 >> 2, drc0;
#endif
mov r18, #1000;
wdf drc0;
IC_PauseBeforeMTERecheck:
{
isub16.testns r18, p2, r18, #1;
p2 ba IC_PauseBeforeMTERecheck;
}
/* capture the registers again */
#if defined(EUR_CR_MTE_MEM_CHECKSUM)
ldr r18, #EUR_CR_MTE_MEM_CHECKSUM >> 2, drc0;
#else
ldr r18, #EUR_CR_MTE_SIG1 >> 2, drc0;
#endif
wdf drc0;
xor.testnz p2, r17, r18;
p2 ba IC_PollForMTEIdle;
}
#if (defined(EUR_CR_MTE_TE_CHECKSUM) && defined(EUR_CR_TE_CHECKSUM)) \
|| defined(EUR_CR_TE_DIAG5) || defined(EUR_CR_TE1)
/* Wait for the TE to go idle */
IC_PollForTEIdle:
{
#if defined(EUR_CR_MTE_TE_CHECKSUM) && defined(EUR_CR_TE_CHECKSUM)
ldr r17, #EUR_CR_MTE_TE_CHECKSUM >> 2, drc0;
ldr r18, #EUR_CR_TE_CHECKSUM >> 2, drc0;
#else
#if defined(EUR_CR_TE_DIAG5)
ldr r17, #EUR_CR_TE_DIAG2 >> 2, drc0;
ldr r18, #EUR_CR_TE_DIAG5 >> 2, drc0;
#else
ldr r17, #EUR_CR_TE1 >> 2, drc0;
ldr r18, #EUR_CR_TE2 >> 2, drc0;
#endif
#endif
wdf drc0;
xor r19, r17, r18;
mov r18, #1000;
IC_PauseBeforeTERecheck:
{
isub16.testns r18, p2, r18, #1;
p2 ba IC_PauseBeforeTERecheck;
}
/* capture the registers again */
#if defined(EUR_CR_MTE_TE_CHECKSUM) && defined(EUR_CR_TE_CHECKSUM)
ldr r17, #EUR_CR_MTE_TE_CHECKSUM >> 2, drc0;
ldr r18, #EUR_CR_TE_CHECKSUM >> 2, drc0;
#else
#if defined(EUR_CR_TE_DIAG5)
ldr r17, #EUR_CR_TE_DIAG2 >> 2, drc0;
ldr r18, #EUR_CR_TE_DIAG5 >> 2, drc0;
#else
ldr r17, #EUR_CR_TE1 >> 2, drc0;
ldr r18, #EUR_CR_TE2 >> 2, drc0;
#endif
#endif
wdf drc0;
xor r17, r17, r18;
xor.testnz p2, r19, r17;
p2 ba IC_PollForTEIdle;
}
#endif
ba IC_PollForUSSEIdle;
}
{
IC_PollForISPIdle:
{
/* Wait for the ISP sigs to go idle */
#if defined(EUR_CR_ISP_PIPE0_SIG3) && defined(EUR_CR_ISP_PIPE0_SIG4)
ldr r17, #EUR_CR_ISP_PIPE0_SIG3 >> 2, drc0;
ldr r18, #EUR_CR_ISP_PIPE0_SIG4 >> 2, drc0;
wdf drc0;
xor r19, r17, r18;
ldr r17, #EUR_CR_ISP_PIPE1_SIG3 >> 2, drc0;
ldr r18, #EUR_CR_ISP_PIPE1_SIG4 >> 2, drc1;
wdf drc0;
xor r19, r17, r19;
wdf drc1;
xor r19, r18, r19;
#else
#if defined(EUR_CR_ISP_TAGWRITE_CHECKSUM) && defined(EUR_CR_ISP_SPAN_CHECKSUM)
ldr r17, #EUR_CR_ISP_TAGWRITE_CHECKSUM >> 2, drc0;
ldr r18, #EUR_CR_ISP_SPAN_CHECKSUM >> 2, drc0;
#else
ldr r17, #EUR_CR_ISP_SIG3 >> 2, drc0;
ldr r18, #EUR_CR_ISP_SIG4 >> 2, drc0;
#endif
wdf drc0;
xor r19, r17, r18;
#endif
mov r18, #1000;
IC_PauseBeforeISPRecheck:
{
isub16.testns r18, p2, r18, #1;
p2 ba IC_PauseBeforeISPRecheck;
}
/* capture the registers again */
#if defined(EUR_CR_ISP_PIPE0_SIG3) && defined(EUR_CR_ISP_PIPE0_SIG4)
ldr r17, #EUR_CR_ISP_PIPE0_SIG3 >> 2, drc0;
ldr r18, #EUR_CR_ISP_PIPE0_SIG4 >> 2, drc0;
wdf drc0;
xor r17, r17, r18;
ldr r18, #EUR_CR_ISP_PIPE1_SIG3 >> 2, drc0;
wdf drc0;
xor r17, r17, r18;
ldr r18, #EUR_CR_ISP_PIPE1_SIG4 >> 2, drc0;
wdf drc0;
xor r17, r17, r18;
#else
#if defined(EUR_CR_ISP_TAGWRITE_CHECKSUM) && defined(EUR_CR_ISP_SPAN_CHECKSUM)
ldr r17, #EUR_CR_ISP_TAGWRITE_CHECKSUM >> 2, drc0;
ldr r18, #EUR_CR_ISP_SPAN_CHECKSUM >> 2, drc0;
#else
ldr r17, #EUR_CR_ISP_SIG3 >> 2, drc0;
ldr r18, #EUR_CR_ISP_SIG4 >> 2, drc0;
#endif
wdf drc0;
xor r17, r17, r18;
#endif
xor.testnz p2, r19, r17;
p2 ba IC_PollForISPIdle;
}
IC_PollForPBEIdle:
{
/* Wait for the PBE sigs to go idle */
#if defined(EUR_CR_PBE_PIXEL_CHECKSUM)
ldr r19, #EUR_CR_PBE_PIXEL_CHECKSUM >> 2, drc0;
#else
ldr r17, #EUR_CR_PIXELBE_SIG01 >> 2, drc0;
ldr r18, #EUR_CR_PIXELBE_SIG02 >> 2, drc0;
wdf drc0;
xor r19, r17, r18;
#if defined(EUR_CR_PIXELBE_SIG11) && defined(EUR_CR_PIXELBE_SIG12)
ldr r17, #EUR_CR_PIXELBE_SIG11 >> 2, drc0;
ldr r18, #EUR_CR_PIXELBE_SIG12 >> 2, drc0;
wdf drc0;
xor r19, r19, r17;
xor r19, r19, r18;
#endif
#endif
mov r18, #1000;
IC_PauseBeforePBERecheck:
{
isub16.testns r18, p2, r18, #1;
p2 ba IC_PauseBeforePBERecheck;
}
/* capture the registers again */
#if defined(EUR_CR_PBE_PIXEL_CHECKSUM)
ldr r17, #EUR_CR_PBE_PIXEL_CHECKSUM >> 2, drc0;
#else
ldr r17, #EUR_CR_PIXELBE_SIG01 >> 2, drc0;
ldr r18, #EUR_CR_PIXELBE_SIG02 >> 2, drc0;
wdf drc0;
xor r17, r17, r18;
#if defined(EUR_CR_PIXELBE_SIG11) && defined(EUR_CR_PIXELBE_SIG12)
ldr r18, #EUR_CR_PIXELBE_SIG11 >> 2, drc0;
wdf drc0;
xor r17, r17, r18;
ldr r18, #EUR_CR_PIXELBE_SIG12 >> 2, drc0;
wdf drc0;
xor r17, r17, r18;
#endif
#endif
xor.testnz p2, r19, r17;
p2 ba IC_PollForPBEIdle;
}
}
}
IC_PollForUSSEIdle:
{
/* Reset the retry counter */
#if defined(SGX_FEATURE_MP)
MK_LOAD_STATE_CORE_COUNT_3D(r19, drc0);
MK_WAIT_FOR_STATE_LOAD(drc0);
isub16 r19, r19, #1;
IC_CheckNextCoreQueue:
#endif
{
mov r20, #USE_FALSE;
mov r21, #25;
/* wait for queued USSE task queues to empty */
IC_PollForUSSEQueueEmpty:
{
/* TA or 3D */
and r17, r16, #USE_IDLECORE_TA3D_REQ_MASK;
xor.testz p2, r17, #USE_IDLECORE_3D_REQ;
p2 ba IC_CheckPixTasks;
{
#if (SGX_FEATURE_NUM_USE_PIPES == 1)
READCORECONFIG(r17, r19, #EUR_CR_USE_SERV_VERTEX >> 2, drc0);
wdf drc0;
#else
#if (SGX_FEATURE_NUM_USE_PIPES >= 2)
READCORECONFIG(r17, r19, #EUR_CR_USE0_SERV_VERTEX >> 2, drc0);
READCORECONFIG(r18, r19, #EUR_CR_USE1_SERV_VERTEX >> 2, drc0);
/* Wait for pipes 0 and 1 to load */
wdf drc0;
/* combine pipes 0 and 1 */
and r17, r17, r18;
#endif
#if (SGX_FEATURE_NUM_USE_PIPES >= 4)
READCORECONFIG(r18, r19, #EUR_CR_USE2_SERV_VERTEX >> 2, drc0);
wdf drc0;
and r17, r17, r18;
READCORECONFIG(r18, r19, #EUR_CR_USE3_SERV_VERTEX >> 2, drc0);
wdf drc0;
and r17, r17, r18;
#endif /* SGX_FEATURE_NUM_USE_PIPES >= 4 */
#if (SGX_FEATURE_NUM_USE_PIPES >= 8)
READCORECONFIG(r18, r19, #EUR_CR_USE4_SERV_VERTEX >> 2, drc0);
wdf drc0;
and r17, r17, r18;
READCORECONFIG(r18, r19, #EUR_CR_USE5_SERV_VERTEX >> 2, drc0);
wdf drc0;
and r17, r17, r18;
READCORECONFIG(r18, r19, #EUR_CR_USE6_SERV_VERTEX >> 2, drc0);
wdf drc0;
and r17, r17, r18;
READCORECONFIG(r18, r19, #EUR_CR_USE7_SERV_VERTEX >> 2, drc0);
wdf drc0;
and r17, r17, r18;
#endif /* SGX_FEATURE_NUM_USE_PIPES >= 8 */
#endif /* SGX_FEATURE_NUM_USE_PIPES == 1 */
ba IC_CheckEmpty;
}
IC_CheckPixTasks:
{
#if (SGX_FEATURE_NUM_USE_PIPES == 1)
READCORECONFIG(r17, r19, #EUR_CR_USE_SERV_PIXEL >> 2, drc0);
wdf drc0;
#else
#if (SGX_FEATURE_NUM_USE_PIPES >= 2)
READCORECONFIG(r17, r19, #EUR_CR_USE0_SERV_PIXEL >> 2, drc0);
READCORECONFIG(r18, r19, #EUR_CR_USE1_SERV_PIXEL >> 2, drc0);
/* Wait for pipes 0 and 1 to load */
wdf drc0;
/* combine pipes 0 and 1 */
and r17, r17, r18;
#endif
#if (SGX_FEATURE_NUM_USE_PIPES >= 4)
READCORECONFIG(r18, r19, #EUR_CR_USE2_SERV_PIXEL >> 2, drc0);
wdf drc0;
and r17, r17, r18;
READCORECONFIG(r18, r19, #EUR_CR_USE3_SERV_PIXEL >> 2, drc0);
wdf drc0;
and r17, r17, r18;
#endif /* SGX_FEATURE_NUM_USE_PIPES >= 4 */
#if (SGX_FEATURE_NUM_USE_PIPES >= 8)
READCORECONFIG(r18, r19, #EUR_CR_USE4_SERV_PIXEL >> 2, drc0);
wdf drc0;
and r17, r17, r18;
READCORECONFIG(r18, r19, #EUR_CR_USE5_SERV_PIXEL >> 2, drc0);
wdf drc0;
and r17, r17, r18;
READCORECONFIG(r18, r19, #EUR_CR_USE6_SERV_PIXEL >> 2, drc0);
wdf drc0;
and r17, r17, r18;
READCORECONFIG(r18, r19, #EUR_CR_USE7_SERV_PIXEL >> 2, drc0);
wdf drc0;
and r17, r17, r18;
#endif /* SGX_FEATURE_NUM_USE_PIPES >= 8 */
#endif /* SGX_FEATURE_NUM_USE_PIPES == 1 */
}
IC_CheckEmpty:
#if defined(EUR_CR_USE_SERV_VERTEX)
mov r18, #EUR_CR_USE_SERV_VERTEX_EMPTY_MASK;
#else
mov r18, #EUR_CR_USE0_SERV_VERTEX_EMPTY_MASK;
#endif
and.testnz p2, r17, r18;
p2 ba IC_USSEQueuesEmpty;
{
/* indicate we have looped atleast once */
mov r20, #USE_TRUE;
/* how many times have we failed */
isub16.tests r21, p2, r21, #1;
/* if loops == 25, then re-enable DMS as we may have hit deadlock */
p2 ba IC_EnableDMS;
/* wait for a bit before checking again */
mov r18, #500;
IC_PauseBeforeQueueRecheck:
{
isub16.testns r18, p2, r18, #1;
p2 ba IC_PauseBeforeQueueRecheck;
}
ba IC_PollForUSSEQueueEmpty;
}
}
IC_USSEQueuesEmpty:
#if defined(SGX_FEATURE_MP)
isub16.testns r19, p2, r19, #1;
p2 ba IC_CheckNextCoreQueue;
#endif
}
#if defined(SGX_FEATURE_MP)
MK_LOAD_STATE_CORE_COUNT_3D(r19, drc0);
MK_WAIT_FOR_STATE_LOAD(drc0);
isub16 r19, r19, #1;
IC_CheckNextCoreSlots:
#endif
{
#if (SGX_FEATURE_NUM_USE_PIPES > 1)
/* Reset the retry counter */
mov r21, #25;
/* wait for all pipes other than 0 to finish their tasks */
IC_PollForUSSEPipesIdle:
{
mov r18, #0xAAAAAAAA;
READCORECONFIG(r17, r19, #EUR_CR_USE1_DM_SLOT >> 2, drc0);
wdf drc0;
#if (SGX_FEATURE_NUM_USE_PIPES >= 4)
xor.testnz p2, r17, r18;
p2 ba IC_PipeNotIdle;
READCORECONFIG(r17, r19, #EUR_CR_USE2_DM_SLOT >> 2, drc0);
wdf drc0;
xor.testnz p2, r17, r18;
p2 ba IC_PipeNotIdle;
READCORECONFIG(r17, r19, #EUR_CR_USE3_DM_SLOT >> 2, drc0);
wdf drc0;
#endif
#if (SGX_FEATURE_NUM_USE_PIPES >= 8)
xor.testnz p2, r17, r18;
p2 ba IC_PipeNotIdle;
READCORECONFIG(r17, r19, #EUR_CR_USE4_DM_SLOT >> 2, drc0);
wdf drc0;
xor.testnz p2, r17, r18;
p2 ba IC_PipeNotIdle;
READCORECONFIG(r17, r19, #EUR_CR_USE5_DM_SLOT >> 2, drc0);
wdf drc0;
xor.testnz p2, r17, r18;
p2 ba IC_PipeNotIdle;
READCORECONFIG(r17, r19, #EUR_CR_USE6_DM_SLOT >> 2, drc0);
wdf drc0;
xor.testnz p2, r17, r18;
p2 ba IC_PipeNotIdle;
READCORECONFIG(r17, r19, #EUR_CR_USE7_DM_SLOT >> 2, drc0);
wdf drc0;
#endif /* SGX_FEATURE_NUM_USE_PIPES >= 8 */
xor.testz p2, r17, r18;
p2 ba IC_PipesIdle;
{
IC_PipeNotIdle:
{
/* indicate we have looped atleast once */
mov r20, #USE_TRUE;
/* how many times have we failed */
isub16.tests r21, p2, r21, #1;
/* if loops == 50, then re-enable DMS as we may have hit deadlock */
p2 ba IC_EnableDMS;
/* wait for a bit before checking again */
mov r18, #500;
IC_PauseBeforePipe1Recheck:
{
isub16.testns r18, p2, r18, #1;
p2 ba IC_PauseBeforePipe1Recheck;
}
ba IC_PollForUSSEPipesIdle;
}
}
}
IC_PipesIdle:
#endif /* SGX_FEATURE_NUM_USE_PIPES > 1 */
/* Reset the retry counter */
mov r21, #25;
/* wait for active pipe 0 tasks to finish */
/* Load the current tasks's mask into r18. */
mov r18, #0xAAAAAAAA;
#if defined(SGX_FEATURE_MP)
/* Are we checking core 0? */
isub16.testns p2, r19, #1;
p2 ba IC_PollForUSSEPipe0Idle;
#endif
{
/* We are checking core 0 pipe 0, make sure we take the ukernel into account */
shl r17, G22, #1;
shl r17, #0x3, r17;
or r17, r17, r18;
}
IC_PollForUSSEPipe0Idle:
{
#if defined(EUR_CR_USE_DM_SLOT)
READCORECONFIG(r18, r19, #EUR_CR_USE_DM_SLOT >> 2, drc0);
#else
READCORECONFIG(r18, r19, #EUR_CR_USE0_DM_SLOT >> 2, drc0);
#endif
wdf drc0;
xor.testz p2, r17, r18;
p2 ba IC_Pipe0Idle;
{
/* indicate we have looped atleast once */
mov r20, #USE_TRUE;
/* how many times have we failed */
isub16.tests r21, p2, r21, #1;
/* if loops == 50, then re-enable DMS as we may have hit deadlock */
p2 ba IC_EnableDMS;
/* wait for a bit before checking again */
mov r18, #500;
IC_PauseBeforePipe0Recheck:
{
isub16.testns r18, p2, r18, #1;
p2 ba IC_PauseBeforePipe0Recheck;
}
ba IC_PollForUSSEPipe0Idle;
}
}
IC_Pipe0Idle:
#if defined(SGX_FEATURE_MP)
/* Are there anymore cores to check? */
isub16.testns r19, p2, r19, #1;
p2 ba IC_CheckNextCoreSlots;
#endif
}
}
/* if we had to wait for a task to flush on the USSE then check all sigs again */
xor.testz p2, r20, #USE_TRUE;
p2 ba IC_RecheckAll;
}
}
IC_CoreIdle:
/* Return */
lapc;
IC_EnableDMS:
{
/* Ok we have re-checked enough, enable the DMS for a bit */
/* enable DM events on PDS */
ldr r17, #EUR_CR_DMS_CTRL >> 2, drc0;
wdf drc0;
/* re-enable all, leaving loopbacks as is */
and r17, r17, ~#(EUR_CR_DMS_CTRL_DISABLE_DM_VERTEX_MASK | \
EUR_CR_DMS_CTRL_DISABLE_DM_PIXEL_MASK | \
EUR_CR_DMS_CTRL_DISABLE_DM_EVENT_MASK);
str #EUR_CR_DMS_CTRL >> 2, r17;
/* now wait for a bit */
mov r18, #1000;
IC_AllowDMSToRun:
{
isub16.testns r18, p2, r18, #1;
p2 ba IC_AllowDMSToRun;
}
/* Start all over again */
ba IC_FromTheStart;
}
}
/*****************************************************************************
DPMThresholdUpdate - routine to update the DPM threshold values
- This should only be called when the TA and 3D are idle
inputs:
temps: r16, r17, r18, r19, r20
*****************************************************************************/
DPMThresholdUpdate:
{
#if defined(FIX_HW_BRN_32302) || defined(SUPPORT_SGX_DOUBLE_PIXEL_PARTITIONS)
xor.testnz p3, r17, #USE_TRUE;
#endif
MK_MEM_ACCESS_BPCACHE(ldad) r16, [R_TA3DCtl, #DOFFSET(SGXMK_TA3D_CTL.sTAHWPBDesc.uiAddr)], drc0;
wdf drc0;
MK_MEM_ACCESS_CACHED(ldad.f4) r17, [r16, #DOFFSET(SGXMKIF_HWPBDESC.ui32TAThreshold)-1], drc0;
wdf drc0;
str #EUR_CR_DPM_TA_PAGE_THRESHOLD >> 2, r17;
MK_MEM_ACCESS(ldad) r17, [r16, #DOFFSET(SGXMKIF_HWPBDESC.ui32PBFlags)], drc0;
and r19, r19, #EUR_CR_DPM_TA_GLOBAL_LIST_SIZE_MASK;
or r19, r19, #EUR_CR_DPM_TA_GLOBAL_LIST_POLICY_MASK;
str #EUR_CR_DPM_TA_GLOBAL_LIST >> 2, r19;
str #EUR_CR_DPM_PDS_PAGE_THRESHOLD >> 2, r20;
#if defined(FIX_HW_BRN_32302) || defined(SUPPORT_SGX_DOUBLE_PIXEL_PARTITIONS)
p3 ba DPTU_SkipZLSThresholdOverride;
and.testz p3, r20, r20;
MK_LOAD_STATE(r20, ui32ITAFlags, drc0);
MK_WAIT_FOR_STATE_LOAD(drc0);
mov r19, #~(TA_IFLAGS_ZLSTHRESHOLD_LOWERED);
and r20, r20, r19;
MK_STORE_STATE(ui32ITAFlags, r20);
MK_WAIT_FOR_STATE_STORE(drc0);
p3 ba DPTU_SkipZLSThresholdOverride;
MK_MEM_ACCESS_BPCACHE(staw) [R_TA3DCtl, #WOFFSET(SGXMK_TA3D_CTL.ui16RealZLSThreshold)], r18;
idf drc0, st;
wdf drc0;
/* The default is a lowered threshold */
mov r19, #TA_IFLAGS_ZLSTHRESHOLD_LOWERED;
or r20, r20, r19;
MK_STORE_STATE(ui32ITAFlags, r20);
MK_WAIT_FOR_STATE_STORE(drc0);
mov r19, #(SGX_THRESHOLD_REDUCTION_FOR_VPCHANGE);
isub16 r18, r18, r19;
DPTU_SkipZLSThresholdOverride:
#endif
str #EUR_CR_DPM_ZLS_PAGE_THRESHOLD >> 2, r18;
wdf drc0;
and r17, r17, ~#HWPBDESC_FLAGS_UPDATE_MASK;
MK_MEM_ACCESS(stad) [r16, #DOFFSET(SGXMKIF_HWPBDESC.ui32PBFlags)], r17;
idf drc0, st;
wdf drc0;
/* Do a free list load to get the hardware to load the thresholds. */
/* Returns directly to our caller. */
ba DPMReloadFreeList;
}
/*****************************************************************************
DPMReloadFreeList - routine to do a TA free list load using the current values
- This should only be called when the TA and 3D are idle
inputs: none
temps: r16, r17, r18, r19
*****************************************************************************/
DPMReloadFreeList:
{
/* DPM thresholds need modifying */
/* First do the dummy store */
/* PB Store: */
ldr r17, #EUR_CR_DPM_TA_ALLOC_FREE_LIST_STATUS1 >> 2, drc0;
ldr r18, #EUR_CR_DPM_TA_ALLOC_FREE_LIST_STATUS2 >> 2, drc0;
ldr r19, #EUR_CR_DPM_PAGE_STATUS >> 2, drc0;
wdf drc0;
and r19, r19, #EUR_CR_DPM_PAGE_STATUS_TA_MASK;
shr r19, r19, #EUR_CR_DPM_PAGE_STATUS_TA_SHIFT;
ldr r16, #EUR_CR_DPM_GLOBAL_PAGE_STATUS >> 2, drc0;
wdf drc0;
and r16, r16, #EUR_CR_DPM_GLOBAL_PAGE_STATUS_TA_MASK;
shr r16, r16, #EUR_CR_DPM_GLOBAL_PAGE_STATUS_TA_SHIFT;
/* PB Load: */
str #EUR_CR_DPM_TA_ALLOC_FREE_LIST >> 2, r17;
shl r18, r18, #16;
str #EUR_CR_DPM_TA_ALLOC >> 2, r18;
shl r16, r16, #EUR_CR_DPM_START_OF_CONTEXT_PAGES_ALLOCATED_GLOBAL_SHIFT;
or r19, r19, r16;
str #EUR_CR_DPM_START_OF_CONTEXT_PAGES_ALLOCATED >> 2, r19;
/* load up the PB on the TA */
str #EUR_CR_DPM_TASK_TA_FREE >> 2, #EUR_CR_DPM_TASK_TA_FREE_LOAD_MASK;
/* Wait for the PB load to finish */
ENTER_UNMATCHABLE_BLOCK;
DPMTU_WaitForPBLoad:
{
ldr r18, #EUR_CR_EVENT_STATUS2 >> 2, drc0;
wdf drc0;
and.testz p2, r18, #EUR_CR_EVENT_STATUS2_DPM_TA_FREE_LOAD_MASK;
p2 ba DPMTU_WaitForPBLoad;
}
LEAVE_UNMATCHABLE_BLOCK;
/* Clear the load event */
str #EUR_CR_EVENT_HOST_CLEAR2 >> 2, #EUR_CR_EVENT_HOST_CLEAR2_DPM_TA_FREE_LOAD_MASK;
lapc;
}
/*****************************************************************************
StoreTAPB - routine to do a TA free list store using the current values
- This should only be called when the TA is idle
inputs: none
temps: r16, r17, r18
*****************************************************************************/
StoreTAPB:
{
/* Load the address of the TA's SGXMKIF_HWPBDESC */
MK_MEM_ACCESS_BPCACHE(ldad) r16, [R_TA3DCtl, #DOFFSET(SGXMK_TA3D_CTL.sTAHWPBDesc.uiAddr)], drc0;
ldr r17, #EUR_CR_DPM_TA_ALLOC_FREE_LIST_STATUS1 >> 2, drc0;
ldr r18, #EUR_CR_DPM_TA_ALLOC_FREE_LIST_STATUS2 >> 2, drc1;
wdf drc0;
MK_MEM_ACCESS(stad) [r16, #DOFFSET(SGXMKIF_HWPBDESC.ui32FreeListHT)], r17;
wdf drc1;
shl r18, r18, #16;
MK_MEM_ACCESS(stad) [r16, #DOFFSET(SGXMKIF_HWPBDESC.ui32FreeListPrev)], r18;
ldr r17, #EUR_CR_DPM_PAGE_STATUS >> 2, drc0;
ldr r18, #EUR_CR_DPM_GLOBAL_PAGE_STATUS >> 2, drc1;
wdf drc0;
and r17, r17, #EUR_CR_DPM_PAGE_STATUS_TA_MASK;
shr r17, r17, #EUR_CR_DPM_PAGE_STATUS_TA_SHIFT;
MK_MEM_ACCESS(stad) [r16, #DOFFSET(SGXMKIF_HWPBDESC.uiLocalPages)], r17;
wdf drc1;
and r18, r18, #EUR_CR_DPM_GLOBAL_PAGE_STATUS_TA_MASK;
shr r18, r18, #EUR_CR_DPM_GLOBAL_PAGE_STATUS_TA_SHIFT;
MK_MEM_ACCESS(stad) [r16, #DOFFSET(SGXMKIF_HWPBDESC.uiGlobalPages)], r18;
idf drc0, st;
wdf drc0;
lapc;
}
/*****************************************************************************
LoadTAPB - routine to do a TA free list load using the values in memory
- This should only be called when the TA is idle
inputs: r16 - SGXMKIF_HWPBDESC
temps: r16, r17, r18
*****************************************************************************/
LoadTAPB:
{
/* save the new HW PB Desc as the current HW PB Desc */
#if defined(FIX_HW_BRN_32302) || defined(SUPPORT_SGX_DOUBLE_PIXEL_PARTITIONS)
xor.testnz p3, r17, #USE_TRUE;
#endif
MK_MEM_ACCESS_BPCACHE(stad) [R_TA3DCtl, #DOFFSET(SGXMK_TA3D_CTL.sTAHWPBDesc.uiAddr)], r16;
idf drc1, st;
MK_MEM_ACCESS(ldad) r17, [r16, #DOFFSET(SGXMKIF_HWPBDESC.sEVMPageTableDevVAddr.uiAddr)], drc0;
wdf drc0;
and r17, r17, #EUR_CR_DPM_TA_ALLOC_PAGE_TABLE_BASE_ADDR_MASK;
str #EUR_CR_DPM_TA_ALLOC_PAGE_TABLE_BASE >> 2, r17;
MK_MEM_ACCESS(ldad) r17, [r16, #DOFFSET(SGXMKIF_HWPBDESC.ui32FreeListHT)], drc0;
wdf drc0;
str #EUR_CR_DPM_TA_ALLOC_FREE_LIST >> 2, r17;
MK_MEM_ACCESS(ldad) r17, [r16, #DOFFSET(SGXMKIF_HWPBDESC.ui32FreeListPrev)], drc0;
wdf drc0;
str #EUR_CR_DPM_TA_ALLOC >> 2, r17;
MK_MEM_ACCESS(ldad) r17, [r16, #DOFFSET(SGXMKIF_HWPBDESC.uiLocalPages)], drc0;
MK_MEM_ACCESS(ldad) r18, [r16, #DOFFSET(SGXMKIF_HWPBDESC.uiGlobalPages)], drc0;
wdf drc0;
shl r18, r18, #EUR_CR_DPM_START_OF_CONTEXT_PAGES_ALLOCATED_GLOBAL_SHIFT;
or r17, r17, r18;
str #EUR_CR_DPM_START_OF_CONTEXT_PAGES_ALLOCATED >> 2, r17;
MK_MEM_ACCESS(ldad) r17, [r16, #DOFFSET(SGXMKIF_HWPBDESC.ui32TAThreshold)], drc0;
wdf drc0;
str #EUR_CR_DPM_TA_PAGE_THRESHOLD>>2, r17;
MK_MEM_ACCESS(ldad) r17, [r16, #DOFFSET(SGXMKIF_HWPBDESC.ui32PDSThreshold)], drc0;
wdf drc0;
str #EUR_CR_DPM_PDS_PAGE_THRESHOLD >> 2, r17;
#if defined(FIX_HW_BRN_32302) || defined(SUPPORT_SGX_DOUBLE_PIXEL_PARTITIONS)
p3 ba LTAPB_NoOverrideZLSThreshold;
and.testz p3, r17, r17;
/* Clear the flag, we do not want it set if
we are going to jump off for PDS threshold
being zero.
*/
MK_LOAD_STATE(r18, ui32ITAFlags, drc0);
MK_WAIT_FOR_STATE_LOAD(drc0);
mov r19, #~(TA_IFLAGS_ZLSTHRESHOLD_LOWERED);
and r18, r18, r19;
MK_STORE_STATE(ui32ITAFlags, r18);
MK_WAIT_FOR_STATE_STORE(drc0);
p3 ba LTAPB_NoOverrideZLSThreshold;
mov r19, #TA_IFLAGS_ZLSTHRESHOLD_LOWERED;
or r18, r18, r19;
MK_STORE_STATE(ui32ITAFlags, r18);
MK_WAIT_FOR_STATE_STORE(drc0);
MK_MEM_ACCESS(ldad) r18, [r16, #DOFFSET(SGXMKIF_HWPBDESC.ui32ZLSThreshold)], drc0;
wdf drc0;
MK_MEM_ACCESS_BPCACHE(staw) [R_TA3DCtl, #WOFFSET(SGXMK_TA3D_CTL.ui16RealZLSThreshold)], r18;
idf drc0, st;
wdf drc0;
mov r19, #(SGX_THRESHOLD_REDUCTION_FOR_VPCHANGE);
isub16 r17, r18, r19;
ba LTAPB_OverrideZLSThreshold;
LTAPB_NoOverrideZLSThreshold:
#endif
MK_MEM_ACCESS(ldad) r17, [r16, #DOFFSET(SGXMKIF_HWPBDESC.ui32ZLSThreshold)], drc0;
wdf drc0;
#if defined(FIX_HW_BRN_32302) || defined(SUPPORT_SGX_DOUBLE_PIXEL_PARTITIONS)
LTAPB_OverrideZLSThreshold:
#endif
str #EUR_CR_DPM_ZLS_PAGE_THRESHOLD>>2, r17;
MK_MEM_ACCESS(ldad) r17, [r16, #DOFFSET(SGXMKIF_HWPBDESC.ui32GlobalThreshold)], drc0;
wdf drc0;
and r17, r17, #EUR_CR_DPM_TA_GLOBAL_LIST_SIZE_MASK;
or r17, r17, #EUR_CR_DPM_TA_GLOBAL_LIST_POLICY_MASK;
str #EUR_CR_DPM_TA_GLOBAL_LIST >> 2, r17;
wdf drc1;
#if defined(EUR_CR_MASTER_DPM_DRAIN_HEAP)
/* Invalidate the Drain Heap head and tail values */
mov r18, #0xFFFFFFFF;
WRITEMASTERCONFIG(#EUR_CR_MASTER_DPM_DRAIN_HEAP >> 2, r18, r17);
#endif
/* call macro to check PB sharing, must start from r17 */
CHECKPBSHARING();
/* load up the PB on the TA */
str #EUR_CR_DPM_TASK_TA_FREE >> 2, #EUR_CR_DPM_TASK_TA_FREE_LOAD_MASK;
/* Wait for the PB load to finish */
ENTER_UNMATCHABLE_BLOCK;
LTAPB_WaitForPBLoad:
{
ldr r17, #EUR_CR_EVENT_STATUS2 >> 2, drc0;
wdf drc0;
and.testz p2, r17, #EUR_CR_EVENT_STATUS2_DPM_TA_FREE_LOAD_MASK;
p2 ba LTAPB_WaitForPBLoad;
}
LEAVE_UNMATCHABLE_BLOCK;
/* Clear the load event */
str #EUR_CR_EVENT_HOST_CLEAR2 >> 2, #EUR_CR_EVENT_HOST_CLEAR2_DPM_TA_FREE_LOAD_MASK;
#if !defined(EUR_CR_DPM_CONTEXT_PB_BASE) || defined(FIX_HW_BRN_25910)
MK_MEM_ACCESS_BPCACHE(ldad) r17, [R_TA3DCtl, #DOFFSET(SGXMK_TA3D_CTL.s3DHWPBDesc.uiAddr)], drc0;
wdf drc0;
/* if the TA and 3D are different, then load onto 3D also (which has already been stored) */
xor.testnz p2, r16, r17;
p2 ba Load3DPB;
#endif
lapc;
}
/*****************************************************************************
Store3DPB - routine to do a 3D free list store using the current values
- This should only be called when the 3D is idle
inputs: none
temps: r16, r17, r18
*****************************************************************************/
Store3DPB:
{
/* Load the address of the 3D's SGXMKIF_HWPBDESC */
MK_MEM_ACCESS_BPCACHE(ldad) r16, [R_TA3DCtl, #DOFFSET(SGXMK_TA3D_CTL.s3DHWPBDesc.uiAddr)], drc0;
ldr r17, #EUR_CR_DPM_3D_FREE_LIST_STATUS1 >> 2, drc0;
ldr r18, #EUR_CR_DPM_3D_FREE_LIST_STATUS2 >> 2, drc1;
wdf drc0;
MK_MEM_ACCESS(stad) [r16, #DOFFSET(SGXMKIF_HWPBDESC.ui32FreeListHT)], r17;
wdf drc1;
shl r18, r18, #16;
MK_MEM_ACCESS(stad) [r16, #DOFFSET(SGXMKIF_HWPBDESC.ui32FreeListPrev)], r18;
ldr r17, #EUR_CR_DPM_PAGE >> 2, drc0;
ldr r18, #EUR_CR_DPM_GLOBAL_PAGE >> 2, drc1;
wdf drc0;
and r17, r17, #EUR_CR_DPM_PAGE_STATUS_3D_MASK;
shr r17, r17, #EUR_CR_DPM_PAGE_STATUS_3D_SHIFT;
MK_MEM_ACCESS(stad) [r16, #DOFFSET(SGXMKIF_HWPBDESC.uiLocalPages)], r17;
wdf drc1;
and r18, r18, #EUR_CR_DPM_GLOBAL_PAGE_STATUS_3D_MASK;
shr r18, r18, #EUR_CR_DPM_GLOBAL_PAGE_STATUS_3D_SHIFT;
MK_MEM_ACCESS(stad) [r16, #DOFFSET(SGXMKIF_HWPBDESC.uiGlobalPages)], r18;
idf drc0, st;
wdf drc0;
lapc;
}
/*****************************************************************************
Load3DPB - routine to do a 3D free list load using the values in memory
- This should only be called when the 3D is idle
inputs: r16 - SGXMKIF_HWPBDESC
temps: r16, r17, r18
*****************************************************************************/
Load3DPB:
{
/* save the new PB as the current PB */
MK_MEM_ACCESS_BPCACHE(stad) [R_TA3DCtl, #DOFFSET(SGXMK_TA3D_CTL.s3DHWPBDesc.uiAddr)], r16;
idf drc1, st;
MK_MEM_ACCESS(ldad) r17, [r16, #DOFFSET(SGXMKIF_HWPBDESC.sEVMPageTableDevVAddr.uiAddr)], drc0;
wdf drc0;
and r17, r17, #EUR_CR_DPM_3D_PAGE_TABLE_BASE_ADDR_MASK;
str #EUR_CR_DPM_3D_PAGE_TABLE_BASE >> 2, r17;
MK_MEM_ACCESS(ldad) r17, [r16, #DOFFSET(SGXMKIF_HWPBDESC.ui32FreeListHT)], drc0;
wdf drc0;
str #EUR_CR_DPM_3D_FREE_LIST >> 2, r17;
MK_MEM_ACCESS(ldad) r17, [r16, #DOFFSET(SGXMKIF_HWPBDESC.ui32FreeListPrev)], drc0;
wdf drc0;
str #EUR_CR_DPM_3D >> 2, r17;
MK_MEM_ACCESS(ldad) r18, [r16, #DOFFSET(SGXMKIF_HWPBDESC.uiGlobalPages)], drc0;
MK_MEM_ACCESS(ldad) r17, [r16, #DOFFSET(SGXMKIF_HWPBDESC.uiLocalPages)], drc1;
wdf drc0;
shl r18, r18, #EUR_CR_DPM_START_OF_3D_CONTEXT_PAGES_ALLOCATED_GLOBAL_SHIFT;
wdf drc1;
or r17, r17, r18;
str #EUR_CR_DPM_START_OF_3D_CONTEXT_PAGES_ALLOCATED >> 2, r17;
/* call macro to check PB sharing, must start from r17 */
CHECKPBSHARING();
/* load up the PB on the 3D */
str #EUR_CR_DPM_TASK_3D_FREE >> 2, #EUR_CR_DPM_TASK_3D_FREE_LOAD_MASK;
/* Wait for the PB load to finish */
ENTER_UNMATCHABLE_BLOCK;
L3DPB_WaitForPBLoad:
{
ldr r17, #EUR_CR_EVENT_STATUS2 >> 2, drc0;
wdf drc0;
and.testz p2, r17, #EUR_CR_EVENT_STATUS2_DPM_3D_FREE_LOAD_MASK;
p2 ba L3DPB_WaitForPBLoad;
}
LEAVE_UNMATCHABLE_BLOCK;
/* Clear the load event */
str #EUR_CR_EVENT_HOST_CLEAR2 >> 2, #EUR_CR_EVENT_HOST_CLEAR2_DPM_3D_FREE_LOAD_MASK;
#if !defined(EUR_CR_DPM_CONTEXT_PB_BASE) || defined(FIX_HW_BRN_25910)
MK_MEM_ACCESS_BPCACHE(ldad) r17, [R_TA3DCtl, #DOFFSET(SGXMK_TA3D_CTL.sTAHWPBDesc.uiAddr)], drc0;
wdf drc0;
/* if the TA and 3D are different, then load onto TA also (which has already been stored) */
xor.testnz p2, r16, r17;
#if defined(FIX_HW_BRN_32302) || defined(SUPPORT_SGX_DOUBLE_PIXEL_PARTITIONS)
mov r17, #USE_FALSE;
#endif
p2 ba LoadTAPB;
#endif
lapc;
}
#if !defined(SGX_FAST_DPM_INIT) || (SGX_FEATURE_NUM_USE_PIPES < 2)
/*****************************************************************************
FUNCTION : SetupDPMPagetable
inputs: r16 - SGXMKIF_HWPBDESC
temps: r16, r17, r18, r19, r20, r21
*****************************************************************************/
SetupDPMPagetable:
{
MK_MEM_ACCESS(ldad) r17, [r16, #DOFFSET(SGXMKIF_HWPBDESC.ui32PBFlags)], drc0;
wdf drc0;
and.testz p2, r17, #HWPBDESC_FLAGS_INITPT;
p2 ba SDPT_NoInitPending;
{
and r17, r17, ~#HWPBDESC_FLAGS_UPDATE_MASK;
MK_MEM_ACCESS(stad) [r16, #DOFFSET(SGXMKIF_HWPBDESC.ui32PBFlags)], r17;
#if defined(FORCE_ENABLE_GROW_SHRINK) && defined(SUPPORT_PERCONTEXT_PB)
MK_MEM_ACCESS(stad) [r16, #DOFFSET(SGXMKIF_HWPBDESC.sGrowListPBBlockDevVAddr)], #0;
#endif
MK_MEM_ACCESS(ldad.f2) r18, [r16, #DOFFSET(SGXMKIF_HWPBDESC.ui32FreeListInitialHT)-1], drc0;
wdf drc0;
MK_MEM_ACCESS(stad.f2) [r16, #DOFFSET(SGXMKIF_HWPBDESC.ui32FreeListHT)-1], r18;
MK_MEM_ACCESS(stad.f2) [r16, #DOFFSET(SGXMKIF_HWPBDESC.uiLocalPages)-1], #0;
MK_MEM_ACCESS(ldad) r17, [r16, #DOFFSET(SGXMKIF_HWPBDESC.sEVMPageTableDevVAddr.uiAddr)], drc1;
MK_MEM_ACCESS(ldad) r16, [r16, #DOFFSET(SGXMKIF_HWPBDESC.sListPBBlockDevVAddr)], drc0;
wdf drc0;
MK_MEM_ACCESS(ldad) r18, [r16, #DOFFSET(SGXMKIF_HWPBBLOCK.ui32PageCount)], drc1;
MK_MEM_ACCESS(ldaw) r19, [r16, #WOFFSET(SGXMKIF_HWPBBLOCK.ui16Head)], drc1;
wdf drc1;
/* Head prev = 0xFFFF */
mov r20, #(0xFFFF << 16);
ba SDPT_SetupPBNextPage;
}
SDPT_NoInitPending:
#if defined(FORCE_ENABLE_GROW_SHRINK) && defined(SUPPORT_PERCONTEXT_PB)
and.testz p2, r17, #HWPBDESC_FLAGS_GROW;
p2 ba SDPT_NoGrowPending;
{
and r17, r17, ~#HWPBDESC_FLAGS_GROW;
MK_MEM_ACCESS(stad) [r16, #DOFFSET(SGXMKIF_HWPBDESC.ui32PBFlags)], r17;
MK_MEM_ACCESS(ldad.f2) r18, [r16, #DOFFSET(SGXMKIF_HWPBDESC.ui32FreeListInitialHT)-1], drc0;
MK_MEM_ACCESS(ldad) r17, [r16, #DOFFSET(SGXMKIF_HWPBDESC.ui32FreeListHT)], drc0;
wdf drc0;
/* Change the tail */
and r18, r18, #EUR_CR_DPM_TA_ALLOC_FREE_LIST_TAIL_MASK;
and r20, r17, #EUR_CR_DPM_TA_ALLOC_FREE_LIST_HEAD_MASK;
or r18, r20, r18;
MK_MEM_ACCESS(stad.f2) [r16, #DOFFSET(SGXMKIF_HWPBDESC.ui32FreeListHT)-1], r18;
mov r18, r16;
/* r16 = hwpbblock */
MK_MEM_ACCESS(ldad) r16, [r18, #DOFFSET(SGXMKIF_HWPBDESC.sGrowListPBBlockDevVAddr)], drc0;
/* r19 = current (Calculate the offset of the current tail) */
and r19, r17, #EUR_CR_DPM_TA_ALLOC_FREE_LIST_TAIL_MASK;
/* r17 = pagetablebase */
MK_MEM_ACCESS(ldad) r17, [r18, #DOFFSET(SGXMKIF_HWPBDESC.sEVMPageTableDevVAddr.uiAddr)], drc1;
shr r19, r19, #EUR_CR_DPM_TA_ALLOC_FREE_LIST_TAIL_SHIFT;
or r19, r19, #0x40000;
/* Wait for the PT base address to load from memory */
wdf drc1;
/* r20 = prev (Load the PT entry for the current tail) */
MK_MEM_ACCESS_BPCACHE(ldad) r20, [r17, r19], drc0;
wdf drc0;
and r20, r20, #EURASIA_PARAM_MANAGE_TABLE_PREV_MASK;
/* There is another block to initialise, get the head of the new block */
MK_MEM_ACCESS(ldaw) r21, [r16, #WOFFSET(SGXMKIF_HWPBBLOCK.ui16Head)], drc0;
/* Combine the prev with the new next value */
wdf drc0;
or r20, r20, r21;
/* re-write the entry */
MK_MEM_ACCESS_BPCACHE(stad) [r17, r19], r20;
/* Prev = Current */
shl r20, r19, #EURASIA_PARAM_MANAGE_TABLE_PREV_SHIFT;
/* Current = Head */
mov r19, r21;
or r19, r19, #0x40000;
/* load the new blocks head entry */
MK_MEM_ACCESS_BPCACHE(ldad) r21, [r17, r19], drc0;
wdf drc0;
/* Change the next with the new prev value */
and r21, r21, #EURASIA_PARAM_MANAGE_TABLE_NEXT_MASK;
or r21, r21, r20;
/* re-write the entry */
MK_MEM_ACCESS_BPCACHE(stad) [r17, r19], r21;
/* The Grow list is about to be linked so clear the pointer */
MK_MEM_ACCESS(stad) [r18, #DOFFSET(SGXMKIF_HWPBDESC.sGrowListPBBlockDevVAddr)], #0;
idf drc0, st;
wdf drc0;
/* Exit as the new block has been linked in */
ba SDPT_EndOfPT;
}
SDPT_NoGrowPending:
#endif
/* If we get here no initialisation is required */
ba SDPT_EndOfPT;
{
/*
r16 = hwpbblock
r17 = pagetablebase
r18 = count
r19 = current
r20 = prev
r21 = next (calculated)
*/
SDPT_SetupPBNextPage:
{
/* or in DWORD size */
or r19, r19, #0x40000;
isub16.testnz r18, p2, r18, #1;
p2 ba SDPT_NotLastEntry;
{
/* We have finished the current block, check if there is another */
MK_MEM_ACCESS(ldad) r16, [r16, #DOFFSET(SGXMKIF_HWPBBLOCK.sNextHWPBBlockDevVAddr)], drc0;
wdf drc0;
and.testz p2, r16, r16;
p2 br SDPT_FinishedAllBlocks;
{
SDPT_LinkPBBlock:
/* There is another block to initialise, get the head of the new block */
MK_MEM_ACCESS(ldaw) r21, [r16, #WOFFSET(SGXMKIF_HWPBBLOCK.ui16Head)], drc0;
MK_MEM_ACCESS(ldad) r18, [r16, #DOFFSET(SGXMKIF_HWPBBLOCK.ui32PageCount)], drc1;
/* Combine the prev with the new next value */
wdf drc0;
or r20, r20, r21;
/* re-write the entry */
MK_MEM_ACCESS_BPCACHE(stad) [r17, r19], r20;
/* Prev = Current */
shl r20, r19, #EURASIA_PARAM_MANAGE_TABLE_PREV_SHIFT;
/* Current = Head */
mov r19, r21;
wdf drc1;
/* setup the new block */
ba SDPT_SetupPBNextPage;
}
SDPT_FinishedAllBlocks:
/* patch the last one */
or r21, r20, #0xFFFF;
MK_MEM_ACCESS_BPCACHE(stad) [r17, r19], r21;
idf drc0, st;
wdf drc0;
ba SDPT_EndOfPT;
}
SDPT_NotLastEntry:
#if defined(FIX_HW_BRN_23281)
iaddu32 r21, r19.low, #2;
#else
iaddu32 r21, r19.low, #1;
#endif
/* Combine the prev and next values */
or r21, r20, r21;
MK_MEM_ACCESS_BPCACHE(stad) [r17, r19], r21;
idf drc0, st;
wdf drc0;
/* Prev = Current */
shl r20, r19, #EURASIA_PARAM_MANAGE_TABLE_PREV_SHIFT;
#if defined(FIX_HW_BRN_23281)
/* Current = Current + 2 */
iaddu32 r19, r19.low, #2;
#else
/* Current = Current + 1 */
iaddu32 r19, r19.low, #1;
#endif
ba SDPT_SetupPBNextPage;
}
}
SDPT_EndOfPT:
lapc;
}
#else /* SGX_FAST_DPM_INIT */
/*****************************************************************************
FUNCTION : SetupDPMPagetable
inputs: r16 - SGXMKIF_HWPBDESC
temps: r16, r17, r18, r19, r20, r21
*****************************************************************************/
SetupDPMPagetable:
{
MK_MEM_ACCESS(ldad) r17, [r16, #DOFFSET(SGXMKIF_HWPBDESC.ui32PBFlags)], drc0;
wdf drc0;
and.testz p2, r17, #HWPBDESC_FLAGS_INITPT;
p2 ba SDPT_NoInitPending;
{
MK_MEM_ACCESS_BPCACHE(stad) [R_TA3DCtl, #DOFFSET(SGXMK_TA3D_CTL.sInitHWPBDesc.uiAddr)], r16;
idf drc0, st;
#if !defined(SGX545)
ENTER_UNMATCHABLE_BLOCK;
SDPT_FifoFull:
{
ldr r19, #EUR_CR_LOOPBACK >> 2, drc1;
wdf drc1;
and.testz p2, r19, #EUR_CR_LOOPBACK_STATUS_MASK;
p2 ba SDPT_FifoFull;
}
LEAVE_UNMATCHABLE_BLOCK;
#endif
/* Clear bit 0 of GLOBCOM1, before emitting loopback */
str #SGX_MP_CORE_SELECT(EUR_CR_USE_GLOBCOM1, 0) >> 2, #0;
/* Save r16 because even-numbered sources are required for emitpds with 64-bit encoding */
mov r17, r16;
/* Setup the Loopback type data */
mov r20, #USE_LOOPBACK_INITPB;
SDPT_PDSConstSize:
mov r16, #0xDEADBEEF;
wdf drc0;
.align 2;
SDPT_PDSDevAddr:
mov r18, #0xDEADBEEF;
/* emit the loop back */
#if defined(EURASIA_PDSSB3_USEPIPE_PIPE1)
emitpds.tasks.taske #0, r16, r18, r20, #((EURASIA_PDSSB3_USEDATAMASTER_EVENT << EURASIA_PDSSB3_USEDATAMASTER_SHIFT) | \
(1 << EURASIA_PDSSB3_USEINSTANCECOUNT_SHIFT) | EURASIA_PDSSB3_USEPIPE_PIPE1);
#else
/* make it emit to pipe 1 */
#if defined(EURASIA_PDSSB1_USEPIPE_SHIFT)
and r18, r18, #EURASIA_PDSSB1_USEPIPE_CLRMSK;
or r18, r18, #(EURASIA_PDSSB1_USEPIPE_PIPE1 << EURASIA_PDSSB1_USEPIPE_SHIFT);
#else
and r16, r16, #EURASIA_PDSSB0_USEPIPE_CLRMSK;
or r16, r16, #(EURASIA_PDSSB0_USEPIPE_PIPE1 << EURASIA_PDSSB0_USEPIPE_SHIFT);
#endif
emitpds.tasks.taske #0, r16, r18, r20, #((EURASIA_PDSSB3_USEDATAMASTER_EVENT << EURASIA_PDSSB3_USEDATAMASTER_SHIFT) | \
(1 << EURASIA_PDSSB3_USEINSTANCECOUNT_SHIFT));
#endif
/* Restore saved value of r16 */
mov r16, r17;
/* wait for signal back */
#if defined(SGX_FEATURE_GLOBAL_REGISTER_MONITORING)
setm #1;
#endif /* SGX_FEATURE_GLOBAL_REGISTER_MONITORING */
ENTER_UNMATCHABLE_BLOCK;
SDPT_WaitForComplete:
{
ldr r17, #SGX_MP_CORE_SELECT(EUR_CR_USE_GLOBCOM1, 0) >> 2, drc0;
wdf drc0;
and.testz p2, r17, #1;
#if defined(SGX_FEATURE_GLOBAL_REGISTER_MONITORING)
p2 ba.mon SDPT_WaitForComplete;
#else
p2 ba SDPT_WaitForComplete;
#endif /* SGX_FEATURE_GLOBAL_REGISTER_MONITORING */
}
LEAVE_UNMATCHABLE_BLOCK;
str #SGX_MP_CORE_SELECT(EUR_CR_USE_GLOBCOM1, 0) >> 2, #0;
MK_MEM_ACCESS(ldad) r17, [r16, #DOFFSET(SGXMKIF_HWPBDESC.ui32PBFlags)], drc0;
wdf drc0;
and r17, r17, ~#HWPBDESC_FLAGS_INITPT;
MK_MEM_ACCESS(stad) [r16, #DOFFSET(SGXMKIF_HWPBDESC.ui32PBFlags)], r17;
idf drc0, st;
wdf drc0;
ba SDPT_EndOfPT;
}
SDPT_NoInitPending:
#if defined(FORCE_ENABLE_GROW_SHRINK) && defined(SUPPORT_PERCONTEXT_PB)
and.testz p2, r17, #HWPBDESC_FLAGS_GROW;
p2 ba SDPT_NoGrowPending;
{
and r17, r17, ~#HWPBDESC_FLAGS_GROW;
MK_MEM_ACCESS(stad) [r16, #DOFFSET(SGXMKIF_HWPBDESC.ui32PBFlags)], r17;
MK_MEM_ACCESS(ldad.f2) r18, [r16, #DOFFSET(SGXMKIF_HWPBDESC.ui32FreeListInitialHT)-1], drc0;
MK_MEM_ACCESS(ldad) r17, [r16, #DOFFSET(SGXMKIF_HWPBDESC.ui32FreeListHT)], drc0;
wdf drc0;
/* Change the tail */
and r18, r18, #EUR_CR_DPM_TA_ALLOC_FREE_LIST_TAIL_MASK;
and r20, r17, #EUR_CR_DPM_TA_ALLOC_FREE_LIST_HEAD_MASK;
or r18, r20, r18;
MK_MEM_ACCESS(stad.f2) [r16, #DOFFSET(SGXMKIF_HWPBDESC.ui32FreeListHT)-1], r18;
mov r18, r16;
/* r16 = hwpbblock */
MK_MEM_ACCESS(ldad) r16, [r18, #DOFFSET(SGXMKIF_HWPBDESC.sGrowListPBBlockDevVAddr)], drc0;
/* r19 = current (Calculate the offset of the current tail) */
and r19, r17, #EUR_CR_DPM_TA_ALLOC_FREE_LIST_TAIL_MASK;
/* r17 = pagetablebase */
MK_MEM_ACCESS(ldad) r17, [r18, #DOFFSET(SGXMKIF_HWPBDESC.sEVMPageTableDevVAddr.uiAddr)], drc1;
shr r19, r19, #EUR_CR_DPM_TA_ALLOC_FREE_LIST_TAIL_SHIFT;
or r19, r19, #0x40000;
/* Wait for the PT base address to load from memory */
wdf drc1;
/* r20 = prev (Load the PT entry for the current tail) */
MK_MEM_ACCESS_CACHED(ldad) r20, [r17, r19], drc0;
wdf drc0;
and r20, r20, #EURASIA_PARAM_MANAGE_TABLE_PREV_MASK;
/* There is another block to initialise, get the head of the new block */
MK_MEM_ACCESS(ldaw) r21, [r16, #WOFFSET(SGXMKIF_HWPBBLOCK.ui16Head)], drc0;
/* Combine the prev with the new next value */
wdf drc0;
or r20, r20, r21;
/* re-write the entry */
MK_MEM_ACCESS_BPCACHE(stad) [r17, r19], r20;
/* Prev = Current */
shl r20, r19, #EURASIA_PARAM_MANAGE_TABLE_PREV_SHIFT;
/* Current = Head */
mov r19, r21;
or r19, r19, #0x40000;
/* load the new blocks head entry */
MK_MEM_ACCESS_BPCACHE(ldad) r21, [r17, r19], drc0;
wdf drc0;
/* Change the next with the new prev value */
and r21, r21, #EURASIA_PARAM_MANAGE_TABLE_NEXT_MASK;
or r21, r21, r20;
/* re-write the entry */
MK_MEM_ACCESS_BPCACHE(stad) [r17, r19], r21;
/* The Grow list is about to be linked so clear the pointer */
MK_MEM_ACCESS(stad) [r18, #DOFFSET(SGXMKIF_HWPBDESC.sGrowListPBBlockDevVAddr)], #0;
idf drc0, st;
wdf drc0;
}
SDPT_NoGrowPending:
#endif
SDPT_EndOfPT:
lapc;
}
/*****************************************************************************
FUNCTION : InitPBLoopback
inputs:
temps: r0 -
*****************************************************************************/
.export InitPBLoopback;
InitPBLoopback:
{
MK_MEM_ACCESS_BPCACHE(ldad) r0, [R_TA3DCtl, #DOFFSET(SGXMK_TA3D_CTL.sInitHWPBDesc)], drc0;
wdf drc0;
/* used for imae later */
mov r19, #0x00010001;
/* What operation is required */
MK_MEM_ACCESS(ldad) r1, [r0, #DOFFSET(SGXMKIF_HWPBDESC.ui32PBFlags)], drc0;
wdf drc0;
and.testz p0, r1, #HWPBDESC_FLAGS_INITPT;
p0 ba IPBL_NoInitPending;
{
and r1, r1, ~#HWPBDESC_FLAGS_UPDATE_MASK;
MK_MEM_ACCESS(stad) [r0, #DOFFSET(SGXMKIF_HWPBDESC.ui32PBFlags)], r1;
#if defined(FORCE_ENABLE_GROW_SHRINK) && defined(SUPPORT_PERCONTEXT_PB)
MK_MEM_ACCESS(stad) [r0, #DOFFSET(SGXMKIF_HWPBDESC.sGrowListPBBlockDevVAddr)], #0;
#endif
MK_MEM_ACCESS(ldad.f2) r1, [r0, #DOFFSET(SGXMKIF_HWPBDESC.ui32FreeListInitialHT)-1], drc0;
wdf drc0;
MK_MEM_ACCESS(stad.f2) [r0, #DOFFSET(SGXMKIF_HWPBDESC.ui32FreeListHT)-1], r1;
MK_MEM_ACCESS(stad.f2) [r0, #DOFFSET(SGXMKIF_HWPBDESC.uiLocalPages)-1], #0;
/* Get the first block within the PB */
MK_MEM_ACCESS(ldad) r1, [r0, #DOFFSET(SGXMKIF_HWPBDESC.sEVMPageTableDevVAddr)], drc1;
MK_MEM_ACCESS(ldad) r21, [r0, #DOFFSET(SGXMKIF_HWPBDESC.sListPBBlockDevVAddr)], drc0;
wdf drc0;
MK_MEM_ACCESS(ldaw) r4, [r21, #WOFFSET(SGXMKIF_HWPBBLOCK.ui16Head)], drc1;
MK_MEM_ACCESS(ldad) r0, [r21, #DOFFSET(SGXMKIF_HWPBBLOCK.ui32PageCount)], drc1;
wdf drc1;
ba IPBL_WritePBHeadEntry;
}
IPBL_NoInitPending:
#if defined(FORCE_ENABLE_GROW_SHRINK) && defined(SUPPORT_PERCONTEXT_PB)
and.testz p0, r1, #HWPBDESC_FLAGS_GROW;
p0 ba IPBL_NoGrowPending;
{
and r1, r1, ~#HWPBDESC_FLAGS_GROW;
MK_MEM_ACCESS(stad) [r0, #DOFFSET(SGXMKIF_HWPBDESC.ui32PBFlags)], r1;
MK_MEM_ACCESS(ldad.f2) r2, [r0, #DOFFSET(SGXMKIF_HWPBDESC.ui32FreeListInitialHT)-1], drc0;
MK_MEM_ACCESS(ldad) r4, [r0, #DOFFSET(SGXMKIF_HWPBDESC.ui32FreeListHT)], drc0;
wdf drc0;
/* Change the tail */
and r2, r2, #EUR_CR_DPM_TA_ALLOC_FREE_LIST_TAIL_MASK;
and r5, r4, #EUR_CR_DPM_TA_ALLOC_FREE_LIST_HEAD_MASK;
or r2, r5, r2;
MK_MEM_ACCESS(stad) [r0, #DOFFSET(SGXMKIF_HWPBDESC.ui32FreeListHT)], r2;
MK_MEM_ACCESS(stad) [r0, #DOFFSET(SGXMKIF_HWPBDESC.ui32FreeListPrev)], r3;
/* Get the first block within the Grow list */
MK_MEM_ACCESS(ldad) r1, [r0, #DOFFSET(SGXMKIF_HWPBDESC.sEVMPageTableDevVAddr.uiAddr)], drc1;
MK_MEM_ACCESS(ldad) r21, [r0, #DOFFSET(SGXMKIF_HWPBDESC.sGrowListPBBlockDevVAddr)], drc0;
/* r1 = current (Calculate the offset of the current tail) */
and r4, r4, #EUR_CR_DPM_TA_ALLOC_FREE_LIST_TAIL_MASK;
shr r4, r4, #EUR_CR_DPM_TA_ALLOC_FREE_LIST_TAIL_SHIFT;
/* Wait for the PT base address to load from memory */
wdf drc1;
/* Offset into the pagetable by the head */
imae r1, r4.low, #SIZEOF(IMG_UINT32), r1, u32;
/* r3 = prev (Load the PT entry for the current tail) */
MK_MEM_ACCESS_CACHED(ldad) r3, [r1], drc0;
/* The Grow list is about to be linked so clear the pointer */
MK_MEM_ACCESS(stad) [r0, #DOFFSET(SGXMKIF_HWPBDESC.sGrowListPBBlockDevVAddr)], #0;
/* r5 = old tail */
mov r5, r4;
/* Initialise the new block, get the head of the new block */
MK_MEM_ACCESS(ldaw) r4, [r21, #WOFFSET(SGXMKIF_HWPBBLOCK.ui16Head)], drc0;
wdf drc0;
/* Make the last entry point to the head of the new block */
and r3, r3, ~#0xFFFF;
or r3, r3, r4;
MK_MEM_ACCESS_BPCACHE(stad) [r1], r3;
/* calculate the address of the first entry in the pagetable for the new block */
MK_MEM_ACCESS(ldad) r1, [r0, #DOFFSET(SGXMKIF_HWPBDESC.sEVMPageTableDevVAddr)], drc0;
wdf drc0;
/* Offset into the pagetable by the head */
imae r1, r4.low, #SIZEOF(IMG_UINT32), r1, u32;
MK_MEM_ACCESS(ldad) r0, [r21, #DOFFSET(SGXMKIF_HWPBBLOCK.ui32PageCount)], drc0;
wdf drc0;
/* write the first entry of the new block */
shl r5, r5, #16;
#if defined(FIX_HW_BRN_23281)
iaddu32 r3, r4.low, #2;
or r3, r5, r3;
MK_MEM_ACCESS_BPCACHE(stad) [r1, #2++], r3;
#else
iaddu32 r3, r4.low, #1;
or r3, r5, r3;
MK_MEM_ACCESS_BPCACHE(stad) [r1, #1++], r3;
#endif
/* remove 1 from the page count */
isub16 r0, r0, #1;
mov r5, #0xFFFF;
and.testz r0, p0, r0, r5;
/* if (!p0) There are still pages left to initialise */
!p0 mov r2, #0xFFFFFFF0;
!p0 br IPBL_SetupNextBlock;
/* If there are no more pages */
ba IPBL_FinishedAllBlocks;
}
IPBL_NoGrowPending:
#endif
/* We should not get here! */
#if defined(DEBUG)
lock;
lock;
#endif
IPBL_WritePBHeadEntry:
mov r2, #0xFFFFFFF0;
/* Offset into the pagetable by the head */
imae r1, r4.low, #SIZEOF(IMG_UINT32), r1, u32;
/* write the first single entry */
mov r3, #0xFFFF0000;
#if defined(FIX_HW_BRN_23281)
iaddu32 r5, r4.low, #2;
or r3, r3, r5;
MK_MEM_ACCESS_BPCACHE(stad) [r1, #2++], r3;
#else
iaddu32 r5, r4.low, #1;
or r3, r3, r5;
MK_MEM_ACCESS_BPCACHE(stad) [r1, #1++], r3;
#endif
isub16.testz r0, p0, r0, #1;
p0 br IPBL_FinishedAllBlocks;
{
IPBL_SetupNextBlock:
{
#if defined(FIX_HW_BRN_23281)
/* are there multiples left? */
/* ((Head-2)<<16) | (head+2) */
and.testz p0, r0, r2;
p0 isub16 r5, r4, #2;
p0 shl r5, r5, #16;
p0 iaddu32 r4, r4.low, #2;
p0 or r3, r5, r4;
p0 br IPBL_SingularPages;
/* ((Head-16)<<16) | (head-12) */
isub16 r5, r4, #16;
shl r5, r5, #16;
isub16 r4, r4, #12;
and r4, r4, #0xFFFF;
or r3, r4, r5;
#else
/* are there >= 16 pages, if so do it in blocks */
and.testz p0, r0, r2;
/* ((Head-1)<<16) | (head+1) */
p0 isub16 r5, r4, #1;
p0 shl r5, r5, #16;
p0 iaddu32 r4, r4.low, #1;
p0 or r3, r5, r4;
p0 br IPBL_SingularPages;
/* ((Head-16)<<16) | (head-14) */
isub16 r5, r4, #16;
shl r5, r5, #16;
isub16 r4, r4, #14;
and r4, r4, #0xFFFF;
or r3, r4, r5;
#endif
{
and r0, r0, #0xFFFF;
shr r2, r0, #4;
/* Set macro operations to increment dst and src1 */
smlsi #1,#0,#1,#0,#0,#0,#0,#0,#0,#0,#0;
#if defined(FIX_HW_BRN_23281)
mov r20, #0x00020002;
ima16.repeat8 r4, r19, r3, r20;
ima16.repeat7 r12, r19, r11, r20;
mov r20, #0x00200020;
#else
mov r20, #0x00010001;
ima16.repeat8 r4, r19, r3, r20;
ima16.repeat7 r12, r19, r11, r20;
mov r20, #0x00100010;
#endif
IPBL_SetupNextBatch:
{
isub16.testz r2, p0, r2, #1;
smlsi #1,#0,#1,#0,#0,#0,#0,#0,#0,#0,#0;
ima16.repeat8 r3, r19, r3, r20;
ima16.repeat8 r11, r19, r11, r20;
smlsi #1,#0,#0,#1,#0,#0,#0,#0,#0,#0,#0;
#if defined(FIX_HW_BRN_23281)
MK_MEM_ACCESS_BPCACHE(stad.repeat16) [r1, #2++], r3;
#else
MK_MEM_ACCESS_BPCACHE(stad.repeat16) [r1, #1++], r3;
#endif
!p0 br IPBL_SetupNextBatch;
}
and.testz p0, r0, #0xF;
mov r3, r18;
p0 br IPBL_LastEntry;
}
IPBL_SingularPages:
{
and r0, r0, #0xF;
#if defined(FIX_HW_BRN_23281)
mov r20, #0x00020002;
#else
mov r20, #0x00010001;
#endif
IPBL_SetupNextPage:
{
isub16.testz r0, p0, r0, #1;
ima16 r3, r19, r3, r20;
#if defined(FIX_HW_BRN_23281)
MK_MEM_ACCESS_BPCACHE(stad) [r1, #2++], r3;
#else
MK_MEM_ACCESS_BPCACHE(stad) [r1, #1++], r3;
#endif
!p0 br IPBL_SetupNextPage;
}
}
IPBL_LastEntry:
/* We have finished this block check if there is another and join them */
MK_MEM_ACCESS(ldad) r21, [r21, #DOFFSET(SGXMKIF_HWPBBLOCK.sNextHWPBBlockDevVAddr)], drc0;
wdf drc0;
and.testz p0, r21, r21;
p0 br IPBL_FinishedAllBlocks;
{
IPBL_LinkPBBlock:
/* There is another block to initialise, get the head of the new block */
MK_MEM_ACCESS(ldaw) r4, [r21, #WOFFSET(SGXMKIF_HWPBBLOCK.ui16Head)], drc0;
wdf drc0;
/* Make the last entry point to the head of the new block */
and r3, r3, ~#0xFFFF;
or r3, r3, r4;
#if defined(FIX_HW_BRN_23281)
MK_MEM_ACCESS_BPCACHE(stad) [r1, -#2], r3;
#else
MK_MEM_ACCESS_BPCACHE(stad) [r1, -#1], r3;
#endif
/* calculate the address of the first entry in the pagetable for the new block */
MK_MEM_ACCESS_BPCACHE(ldad) r0, [R_TA3DCtl, #DOFFSET(SGXMK_TA3D_CTL.sInitHWPBDesc)], drc0;
wdf drc0;
MK_MEM_ACCESS(ldad) r1, [r0, #DOFFSET(SGXMKIF_HWPBDESC.sEVMPageTableDevVAddr)], drc0;
wdf drc0;
/* Offset into the pagetable by the head */
imae r1, r4.low, #SIZEOF(IMG_UINT32), r1, u32;
MK_MEM_ACCESS(ldad) r0, [r21, #DOFFSET(SGXMKIF_HWPBBLOCK.ui32PageCount)], drc0;
wdf drc0;
/* write the first entry of the new block */
shr r3, r3, #16;
#if defined(FIX_HW_BRN_23281)
iaddu32 r3, r3.low, #2;
iaddu32 r5, r4.low, #2;
shl r3, r3, #16;
or r3, r3, r5;
MK_MEM_ACCESS_BPCACHE(stad) [r1, #2++], r3;
#else
iaddu32 r3, r3.low, #1;
iaddu32 r5, r4.low, #1;
shl r3, r3, #16;
or r3, r3, r5;
MK_MEM_ACCESS_BPCACHE(stad) [r1, #1++], r3;
#endif
/* remove 1 from the page count */
isub16 r0, r0, #1;
mov r5, #0xFFFF;
and.testz r0, p0, r0, r5;
/* if (!p0) There are still pages left to initialise */
!p0 mov r2, #0xFFFFFFF0;
!p0 br IPBL_SetupNextBlock;
}
}
}
IPBL_FinishedAllBlocks:
/* patch the last one */
or r3, r3, #0xffff;
#if defined(FIX_HW_BRN_23281)
MK_MEM_ACCESS_BPCACHE(stad) [r1, -#2], r3;
#else
MK_MEM_ACCESS_BPCACHE(stad) [r1, -#1], r3;
#endif
idf drc0, st;
wdf drc0;
str #SGX_MP_CORE_SELECT(EUR_CR_USE_GLOBCOM1, 0) >> 2, #1;
lapc;
}
#endif /* SGX_FAST_DPM_INIT */
#if defined(PVRSRV_USSE_EDM_STATUS_DEBUG)
#if !defined(MKTRACE_CUSTOM_REGISTER)
#if defined(EUR_CR_TIMER)
#define MKTRACE_CUSTOM_REGISTER SGX_MP_CORE_SELECT(EUR_CR_CLKGATESTATUS, 0)
#else
#define MKTRACE_CUSTOM_REGISTER SGX_MP_CORE_SELECT(EUR_CR_EVENT_TIMER, 0)
#endif /* EUR_CR_TIMER */
#endif /* MKTRACE_CUSTOM_REGISTER */
.export MKTrace;
/*****************************************************************************
MKTrace - Write an entry out to the microkernel trace circular buffer.
inputs: r16 - status code
r17 - family mask, matched against ui32MKTraceProfile
temps: r18, r19, r20, r21, p2
*****************************************************************************/
MKTrace:
{
/* Check that one of the families in the mask is enabled in the current profile. */
MK_LOAD_STATE(r18, ui32MKTraceProfile, drc0);
MK_WAIT_FOR_STATE_LOAD(drc0);
and.testz p3, r17, r18;
p3 ba MKTrace_End;
/* Load status buffer base address and offset. */
MK_LOAD_STATE(r18, sMKTraceBuffer, drc0);
MK_LOAD_STATE(r19, ui32MKTBOffset, drc0);
MK_WAIT_FOR_STATE_LOAD(drc0);
MK_MEM_ACCESS_BPCACHE(stad) [r18, #DOFFSET(SGXMK_TRACE_BUFFER.ui32LatestStatusValue)], r16;
/* Calculate address of buffer entry to be written. */
imae r21, r19.low, #SIZEOF(SGXMK_TRACE_BUFFER.asBuffer[0]), #OFFSET(SGXMK_TRACE_BUFFER.asBuffer), u32;
iaddu32 r21, r21.low, r18;
/* Increment CCB write offset. */
iaddu32 r19, r19.low, #1;
and r19, r19, #(SGXMK_TRACE_BUFFER_SIZE - 1);
/* Save new CCB write offset. */
MK_MEM_ACCESS_BPCACHE(stad) [r18, #DOFFSET(SGXMK_TRACE_BUFFER.ui32WriteOffset)], r19;
MK_STORE_STATE(ui32MKTBOffset, r19);
MK_WAIT_FOR_STATE_STORE(drc0);
/* Store status value. */
MK_MEM_ACCESS_BPCACHE(stad) [r21, #DOFFSET(SGXMK_TRACE_BUFFER_ENTRY.ui32StatusValue)], r16;
ENTER_UNMATCHABLE_BLOCK;
/* Load misc info into r16 and store. */
ldr r19, #EUR_CR_BIF_INT_STAT >> 2, drc0;
#if defined(EUR_CR_USE_SERV_EVENT)
ldr r20, #EUR_CR_USE_SERV_EVENT >> 2, drc1;
#else
ldr r20, #EUR_CR_USE0_SERV_EVENT >> 2, drc1;
#endif
#if defined(EUR_CR_BIF_INT_STAT_FAULT_MASK)
mov r16, #EUR_CR_BIF_INT_STAT_FAULT_MASK;
#else
mov r16, #EUR_CR_BIF_INT_STAT_FAULT_REQ_MASK;
#endif /* defined(EUR_CR_BIF_INT_STAT_FAULT_MASK) */
wdf drc0;
and.testnz p3, r19, r16;
mov r16, #0;
p3 or r16, r16, #SGXMK_TRACE_BUFFER_MISC_FAULT_MASK;
wdf drc1;
shl r20, r20, #SGXMK_TRACE_BUFFER_MISC_EVENTS_SHIFT;
or r16, r16, r20;
or r16, r16, G21;
MK_MEM_ACCESS_BPCACHE(stad) [r21, #DOFFSET(SGXMK_TRACE_BUFFER_ENTRY.ui32MiscInfo)], r16;
/* Store timestamp. */
#if defined(EUR_CR_TIMER)
ldr r19, #SGX_MP_CORE_SELECT(EUR_CR_TIMER, 0) >> 2, drc1;
#else
MK_MEM_ACCESS_BPCACHE(ldad) r19, [R_HostCtl, #DOFFSET(SGXMKIF_HOST_CTL.ui32TimeWraps)], drc1;
#endif /* EUR_CR_TIMER */
ldr r16, #MKTRACE_CUSTOM_REGISTER >> 2, drc0;
wdf drc0;
MK_MEM_ACCESS_BPCACHE(stad) [r21, #DOFFSET(SGXMK_TRACE_BUFFER_ENTRY.ui32Custom)], r16;
wdf drc1;
MK_MEM_ACCESS_BPCACHE(stad) [r21, #DOFFSET(SGXMK_TRACE_BUFFER_ENTRY.ui32TimeStamp)], r19;
LEAVE_UNMATCHABLE_BLOCK;
#if !defined(PVRSRV_USSE_EDM_STATUS_DEBUG_NOSYNC)
/*
Flush the writes to the buffer.
*/
idf drc1, st;
wdf drc1;
#endif /* PVRSRV_USSE_EDM_STATUS_DEBUG_NOSYNC */
MKTrace_End:
lapc;
}
#endif /* PVRSRV_USSE_EDM_STATUS_DEBUG */
/*****************************************************************************
WaitForReset - Wait for the host to reset SGX
inputs: none
temps: N/A
*****************************************************************************/
.export WaitForReset;
WaitForReset:
{
/*
Lock the microkernel, in order to protect against further events being
processed which could be disrupted by the host resetting the chip.
FIXME: Is there a cleaner way to do this?
*/
lock; lock;
}
/*****************************************************************************
DPMStateClear - Clears the state table only at the address already setup.
LS bit must be set in EUR_CR_DPM_STATE_CONTEXT_ID before calling.
temps: r16
preds: p2
*****************************************************************************/
DPMStateClear:
{
/*
Clear the DPM state.
*/
str #EUR_CR_DPM_TASK_STATE >> 2, #EUR_CR_DPM_TASK_STATE_CLEAR_MASK;
/* Wait for the Clear to finish. */
ENTER_UNMATCHABLE_BLOCK;
DPMSL_WaitForStateClear:
{
ldr r16, #EUR_CR_EVENT_STATUS >> 2, drc0;
wdf drc0;
and.testz p2, r16, #EUR_CR_EVENT_STATUS_DPM_STATE_CLEAR_MASK;
p2 ba DPMSL_WaitForStateClear;
}
LEAVE_UNMATCHABLE_BLOCK;
/* Clear the store event. */
str #EUR_CR_EVENT_HOST_CLEAR >> 2, #EUR_CR_EVENT_HOST_CLEAR_DPM_STATE_CLEAR_MASK;
/* return */
lapc;
}
/*****************************************************************************
DPMStateStore - Stores the state table only to the address already setup.
LS bit must be set in EUR_CR_DPM_STATE_CONTEXT_ID before calling.
temps: r16, r17
preds: p2
*****************************************************************************/
DPMStateStore:
{
#if defined(FIX_HW_BRN_28705)
ldr r17, #EUR_CR_DPM_LSS_PARTIAL_CONTEXT >> 2, drc0;
wdf drc0;
/* If the partial bit is already set no need to do store twice */
and.testz p2, r17, #EUR_CR_DPM_LSS_PARTIAL_CONTEXT_OPERATION_MASK;
p2 ba DPMSS_DoPartialStore;
{
/* This is a partial store so only do store once */
mov r17, #1;
ba DPMSS_DoStateStore;
}
DPMSS_DoPartialStore:
{
/* First do a partial store then do the full state store */
str #EUR_CR_DPM_LSS_PARTIAL_CONTEXT >> 2, #EUR_CR_DPM_LSS_PARTIAL_CONTEXT_OPERATION_MASK;
mov r17, #2;
}
DPMSS_DoStateStore:
#endif
{
/* Store the DPM state. */
str #EUR_CR_DPM_TASK_STATE >> 2, #EUR_CR_DPM_TASK_STATE_STORE_MASK;
/* Wait for the store to finish. */
ENTER_UNMATCHABLE_BLOCK;
DPMSS_WaitForStateStore:
{
ldr r16, #EUR_CR_EVENT_STATUS >> 2, drc0;
wdf drc0;
and.testz p2, r16, #EUR_CR_EVENT_STATUS_DPM_STATE_STORE_MASK;
p2 ba DPMSS_WaitForStateStore;
}
LEAVE_UNMATCHABLE_BLOCK;
/* Clear the store event. */
str #EUR_CR_EVENT_HOST_CLEAR >> 2, #EUR_CR_EVENT_HOST_CLEAR_DPM_STATE_STORE_MASK;
#if defined(FIX_HW_BRN_28705)
/* Decrement the loop count */
isub16.testz r17, p2, r17, #1;
p2 ba DPMSS_Done;
{
/* Now for the partial load */
str #EUR_CR_DPM_TASK_STATE >> 2, #EUR_CR_DPM_TASK_STATE_LOAD_MASK;
/* Wait for the store to finish. */
ENTER_UNMATCHABLE_BLOCK;
DPMSS_WaitForStateLoad:
{
ldr r16, #EUR_CR_EVENT_STATUS >> 2, drc0;
wdf drc0;
and.testz p2, r16, #EUR_CR_EVENT_STATUS_DPM_STATE_LOAD_MASK;
p2 ba DPMSS_WaitForStateLoad;
}
LEAVE_UNMATCHABLE_BLOCK;
/* Clear the store event. */
str #EUR_CR_EVENT_HOST_CLEAR >> 2, #EUR_CR_EVENT_HOST_CLEAR_DPM_STATE_LOAD_MASK;
/* Now do the full state store */
str #EUR_CR_DPM_LSS_PARTIAL_CONTEXT >> 2, #0;
ba DPMSS_DoStateStore;
}
#endif
}
DPMSS_Done:
/* return */
lapc;
}
/*****************************************************************************
DPMStateLoad - Loads the state table only from the address already setup.
LS bit must be set in EUR_CR_DPM_STATE_CONTEXT_ID before calling.
temps: r16
preds: p2
*****************************************************************************/
DPMStateLoad:
{
/*
Store the DPM state.
*/
str #EUR_CR_DPM_TASK_STATE >> 2, #EUR_CR_DPM_TASK_STATE_LOAD_MASK;
/* Wait for the load to finish. */
ENTER_UNMATCHABLE_BLOCK;
DPMSL_WaitForStateLoad:
{
ldr r16, #EUR_CR_EVENT_STATUS >> 2, drc0;
wdf drc0;
and.testz p2, r16, #EUR_CR_EVENT_STATUS_DPM_STATE_LOAD_MASK;
p2 ba DPMSL_WaitForStateLoad;
}
LEAVE_UNMATCHABLE_BLOCK;
/* Clear the store event. */
str #EUR_CR_EVENT_HOST_CLEAR >> 2, #EUR_CR_EVENT_HOST_CLEAR_DPM_STATE_LOAD_MASK;
/* return */
lapc;
}
/*****************************************************************************
EmitLoopBack - Emits a loopback to handle an event.
inputs: r16 - Data to be emitted back as IR0
temps: r16, r17, r18, r19, r20
*****************************************************************************/
EmitLoopBack:
{
and.testz p2, r16, r16;
p2 ba EmitLoopBack_Return;
{
/* If loopback(s) already pending for these events, don't emit another one */
MK_MEM_ACCESS_BPCACHE(ldad) r17, [R_TA3DCtl, #DOFFSET(SGXMK_TA3D_CTL.ui32PendingLoopbacks)], drc0;
wdf drc0;
or r19, r17, r16;
xor.testz p2, r19, r17;
p2 ba EmitLoopBack_Return;
{
MK_MEM_ACCESS_BPCACHE(stad) [R_TA3DCtl, #DOFFSET(SGXMK_TA3D_CTL.ui32PendingLoopbacks)], r19;
idf drc0, st;
#if !defined(SGX545)
/* FIXME: How does this loop help matters? */
ENTER_UNMATCHABLE_BLOCK;
ELB_FifoFull:
{
ldr r19, #EUR_CR_LOOPBACK >> 2, drc1;
wdf drc1;
and.testz p2, r19, #EUR_CR_LOOPBACK_STATUS_MASK;
p2 ba ELB_FifoFull;
}
LEAVE_UNMATCHABLE_BLOCK;
#endif
ELB_PDSConstSize:
mov r20, #0xDEADBEEF;
/* Wait for store to complete */
wdf drc0;
.align 2;
ELB_PDSDevAddr:
mov r18, #0xDEADBEEF;
/* emit the loop back */
#if !defined(SGX_FEATURE_MULTITHREADED_UKERNEL)
emitpds.tasks.taske #0, r20, r18, r16, #(EURASIA_PDSSB3_USEDATAMASTER_EVENT | \
EURASIA_PDSSB3_PDSSEQDEPENDENCY | \
(1 << EURASIA_PDSSB3_USEINSTANCECOUNT_SHIFT));
#else
emitpds.tasks.taske #0, r20, r18, r16, #((EURASIA_PDSSB3_USEDATAMASTER_EVENT << EURASIA_PDSSB3_USEDATAMASTER_SHIFT) | \
(1 << EURASIA_PDSSB3_USEINSTANCECOUNT_SHIFT));
#endif
}
}
EmitLoopBack_Return:
/* return */
lapc;
}
#if 1 // SPM_PAGE_INJECTION
/*****************************************************************************
DPMPauseAllocations - Pause DPM allocations.
inputs: none
temps: r16, r17
*****************************************************************************/
.export DPMPauseAllocations;
DPMPauseAllocations:
{
/*
Disable the vertex data master to pause TA allocations.
*/
ldr r16, #EUR_CR_DMS_CTRL >> 2, drc0;
wdf drc0;
or r16, r16, #EUR_CR_DMS_CTRL_DISABLE_DM_VERTEX_MASK;
str #EUR_CR_DMS_CTRL >> 2, r16;
/*
Wait for the head/tail of the free list to stop changing.
*/
DPMPA_FlushAllocs:
{
ldr r16, #EUR_CR_DPM_TA_ALLOC_FREE_LIST_STATUS1 >> 2, drc0;
wdf drc0;
mov r17, #400;
DPMPA_Delay:
{
isubu16.testnz r17, p2, r17, #1;
p2 ba DPMPA_Delay;
}
ldr r17, #EUR_CR_DPM_TA_ALLOC_FREE_LIST_STATUS1 >> 2, drc0;
wdf drc0;
xor.testnz p2, r17, r16;
p2 ba DPMPA_FlushAllocs;
}
/* return */
lapc;
}
/*****************************************************************************
DPMResumeAllocations - Resume DPM allocations.
inputs: none
temps: r16
*****************************************************************************/
.export DPMResumeAllocations;
DPMResumeAllocations:
{
/*
Reenable the vertex data master.
*/
ldr r16, #EUR_CR_DMS_CTRL >> 2, drc0;
wdf drc0;
and r16, r16, ~#EUR_CR_DMS_CTRL_DISABLE_DM_VERTEX_MASK;
str #EUR_CR_DMS_CTRL >> 2, r16;
lapc;
}
#endif
#if defined(FIX_HW_BRN_23862)
.export FixBRN23862;
/*****************************************************************************
FixBRN23862 routine - Apply the BRN23862 to the region headers for a
render about to be kicked.
inputs: r9 - Render details structure.
r10 - Macrotile to be rendered - 0x10 if all are being rendered.
R_RTData - RTData structure for the render
temps: p2, r16, r17, r18
*****************************************************************************/
FixBRN23862:
{
/*
Check if process empty region is set - if so the bug doesn't apply.
*/
ldr r16, #EUR_CR_ISP_IPFMISC >> 2, drc0;
wdf drc0;
and r16, r16, #EUR_CR_ISP_IPFMISC_PROCESSEMPTY_MASK;
or.testnz p2, r16, #0;
p2 ba FixBRN23862_ProcessEmptyRegionsSet;
{
/*
Check if we are rendering all macrotiles.
*/
and.testnz p2, r10, #EUR_CR_DPM_ABORT_STATUS_MTILE_GLOBAL_MASK;
p2 ba FixBRN23862_AllMTiles;
{
/*
Load the address of the lookup table for last regions.
*/
MK_MEM_ACCESS_BPCACHE(ldad) r16, [R_RTData, #DOFFSET(SGXMKIF_HWRTDATA.sLastRgnLUTDevAddr)], drc0;
MK_MEM_ACCESS_BPCACHE(ldad) r17, [R_RTData, #DOFFSET(SGXMKIF_HWRTDATA.sRegionArrayDevAddr)], drc1;
wdf drc0;
/*
Load the address of the last region for the aborted macrotile.
*/
and r10, r10, #EUR_CR_DPM_ABORT_STATUS_MTILE_INDEX_MASK;
imae r10, r10.low, #4, r16, u32;
MK_MEM_ACCESS_CACHED(ldad) r18, [r10], drc1;
wdf drc1;
IADD32(r10, r18, r17, r16);
and r10, r10, #EUR_CR_ISP_RGN_BASE_ADDR_MASK;
ba FixBRN23862_CheckRegion;
}
FixBRN23862_AllMTiles:
{
/*
Load the address of the last region for the whole render target.
*/
MK_MEM_ACCESS(ldad) r10, [R_RTData, #DOFFSET(SGXMKIF_HWRTDATA.sLastRegionDevAddr)], drc0;
wdf drc0;
}
FixBRN23862_CheckRegion:
/*
Load the region header for the last region.
*/
MK_MEM_ACCESS_CACHED(ldad) r16, [r10, #0], drc0;
wdf drc0;
/*
Check if it's empty.
*/
and r17, r16, #EURASIA_REGIONHEADER0_EMPTY;
or.testz p0, r17, #0;
p0 ba FixBRN23862_LastRegionNotEmpty;
{
/*
Clear the empty flag and store back into the region array.
*/
and r16, r16, #~EURASIA_REGIONHEADER0_EMPTY;
MK_MEM_ACCESS_BPCACHE(stad) [r10, #0], r16;
idf drc0, st;
wdf drc0;
/*
Load the address of the control stream for the BRN23862 object.
*/
MK_MEM_ACCESS(ldad) r16, [R_RTData, #DOFFSET(SGXMKIF_HWRTDATA.sBRN23862FixObjectDevAddr)], drc0;
wdf drc0;
/*
Store the control stream into the region array.
*/
MK_MEM_ACCESS_BPCACHE(stad) [r10, #1], r16;
/*
Load the location to update with the PDS state.
*/
MK_MEM_ACCESS(ldad) r10, [R_RTData, #DOFFSET(SGXMKIF_HWRTDATA.sBRN23862PDSStateDevAddr)], drc0;
/*
Copy the PDS state from the render details into the parameter buffer.
*/
MK_MEM_ACCESS(ldad.f3) r16, [r9, #DOFFSET(SGXMKIF_HWRENDERDETAILS.aui32SpecObject)-1], drc0;
wdf drc0;
MK_MEM_ACCESS_BPCACHE(stad.f3) [r10, #0++], r16;
idf drc0, st;
wdf drc0;
}
FixBRN23862_LastRegionNotEmpty:
}
FixBRN23862_ProcessEmptyRegionsSet:
lapc;
}
#endif /* defined(FIX_HW_BRN_23862) */
/*****************************************************************************
StoreDPMContext routine - store the specified context data
inputs: r16 - RTData address
r17 - context ID
r18 - bif requestor (0 - TA / 1 - 3D)
temps: r19, r20
p2
*****************************************************************************/
StoreDPMContext:
{
#if defined(SGX_FEATURE_MULTIPLE_MEM_CONTEXTS)
/* Set DPM 3D/TA indicator bit appropriately */
ldr r19, #EUR_CR_BIF_BANK_SET >> 2, drc0;
wdf drc0;
and r19, r19, ~#USE_DPM_3D_TA_INDICATOR_MASK; // clear bit 9 of the register
or r19, r18, r19;
str #EUR_CR_BIF_BANK_SET >> 2, r19;
#endif
/* Load the ui32CommonStatus, to see what we need to store */
MK_MEM_ACCESS(ldad) r18, [r16, #DOFFSET(SGXMKIF_HWRTDATA.ui32CommonStatus)], drc1;
/* Wait for the ui32CommonStatus to load */
wdf drc1;
/* Set load/store context ID */
ldr r19, #EUR_CR_DPM_STATE_CONTEXT_ID >> 2, drc0;
wdf drc0;
#if defined(EUR_CR_DPM_STATE_CONTEXT_ID_NCOP_MASK)
/* Clear the LS and NCOP bits */
and r19, r19, ~#(EUR_CR_DPM_STATE_CONTEXT_ID_LS_MASK | \
EUR_CR_DPM_STATE_CONTEXT_ID_NCOP_MASK);
/* Set the NCOP bit if we are loading an incomplete TA */
and.testz p2, r18, #SGXMKIF_HWRTDATA_CMN_STATUS_TACOMPLETE;
p2 or r19, r19, #EUR_CR_DPM_STATE_CONTEXT_ID_NCOP_MASK;
#else
/* Clear the LS bit */
and r19, r19, ~#EUR_CR_DPM_STATE_CONTEXT_ID_LS_MASK;
#endif
/* set the LS bit according to the selected ID */
or r19, r17, r19;
str #EUR_CR_DPM_STATE_CONTEXT_ID >> 2, r19;
/* Save context state */
MK_MEM_ACCESS(ldad) r19, [r16, #DOFFSET(SGXMKIF_HWRTDATA.sContextStateDevAddr)], drc0;
wdf drc0;
SETUPSTATETABLEBASE(SC, p2, r19, r17);
#if defined(FIX_HW_BRN_28705)
/* First do a partial store then do the full state store */
str #EUR_CR_DPM_LSS_PARTIAL_CONTEXT >> 2, #EUR_CR_DPM_LSS_PARTIAL_CONTEXT_OPERATION_MASK;
mov r19, #2;
#endif
SC_DoStateStore:
{
/* Do the state store */
str #EUR_CR_DPM_TASK_STATE >> 2, #EUR_CR_DPM_TASK_STATE_STORE_MASK;
/* Wait for the store to finish. */
ENTER_UNMATCHABLE_BLOCK;
SC_WaitForStateStore:
{
ldr r17, #EUR_CR_EVENT_STATUS >> 2, drc0;
wdf drc0;
and.testz p2, r17, #EUR_CR_EVENT_STATUS_DPM_STATE_STORE_MASK;
p2 ba SC_WaitForStateStore;
}
LEAVE_UNMATCHABLE_BLOCK;
/* Clear the store event. */
str #EUR_CR_EVENT_HOST_CLEAR >> 2, #EUR_CR_EVENT_HOST_CLEAR_DPM_STATE_STORE_MASK;
#if defined(FIX_HW_BRN_28705)
/* Decrement the loop count */
isub16.testz r19, p2, r19, #1;
p2 ba SC_StateStoreDone;
{
/* Now do a partial state load */
str #EUR_CR_DPM_TASK_STATE >> 2, #EUR_CR_DPM_TASK_STATE_LOAD_MASK;
/* Wait for the store to finish. */
ENTER_UNMATCHABLE_BLOCK;
SC_WaitForStateLoad:
{
ldr r16, #EUR_CR_EVENT_STATUS >> 2, drc0;
wdf drc0;
and.testz p2, r16, #EUR_CR_EVENT_STATUS_DPM_STATE_LOAD_MASK;
p2 ba SC_WaitForStateLoad;
}
LEAVE_UNMATCHABLE_BLOCK;
/* Clear the store event. */
str #EUR_CR_EVENT_HOST_CLEAR >> 2, #EUR_CR_EVENT_HOST_CLEAR_DPM_STATE_LOAD_MASK;
/* Now do the full state store */
str #EUR_CR_DPM_LSS_PARTIAL_CONTEXT >> 2, #0;
ba SC_DoStateStore;
}
#endif
}
SC_StateStoreDone:
/* if the scene has been completed by the TA then we only need the state table */
and.testnz p2, r18, #SGXMKIF_HWRTDATA_CMN_STATUS_TACOMPLETE;
/* Only flush control, OTPM and tail pointers if doing full store */
p2 ba SC_PartialStore;
{
/* Save the context control */
mov r19, #OFFSET(SGXMKIF_HWRTDATA.sContextControlDevAddr[0]);
iaddu32 r17, r19.low, r16;
COPYMEMTOCONFIGREGISTER_TA(SC_PS_ControlTableBase, EUR_CR_DPM_CONTROL_TABLE_BASE, r17, r18, r19, r20);
str #EUR_CR_DPM_TASK_CONTROL >> 2, #EUR_CR_DPM_TASK_CONTROL_STORE_MASK;
mov r19, #OFFSET(SGXMKIF_HWRTDATA.sContextOTPMDevAddr[0]);
iaddu32 r17, r19.low, r16;
#if defined(EUR_CR_MTE_OTPM_CSM_BASE)
/* Flush and Invalidate OTPM */
COPYMEMTOCONFIGREGISTER_TA(SC_PS_OTPMCSBase, EUR_CR_MTE_OTPM_CSM_BASE, r17, r18, r19, r20);
str #EUR_CR_MTE_OTPM_OP >> 2, #EUR_CR_MTE_OTPM_OP_CSM_FLUSH_INV_MASK;
#else /* defined(EUR_CR_MTE_OTPM_CSM_BASE) */
/* Flush OTPM */
COPYMEMTOCONFIGREGISTER_TA(SC_PS_OTPMCSBase, EUR_CR_MTE_OTPM_CSM_FLUSH_BASE, r17, r18, r19, r20);
str #EUR_CR_MTE_OTPM_OP >> 2, #EUR_CR_MTE_OTPM_OP_CSM_FLUSH_MASK;
#endif /* defined(EUR_CR_MTE_OTPM_CSM_BASE) */
/* Flush tail pointer cache */
mov r19, #OFFSET(SGXMKIF_HWRTDATA.asTailPtrDevAddr[0]);
iaddu32 r17, r19.low, r16;
COPYMEMTOCONFIGREGISTER_TA(SC_PS_TETPCBase, EUR_CR_TE_TPC_BASE, r17, r18, r19, r20);
mov r17, #EUR_CR_TE_TPCCONTROL_FLUSH_MASK;
str #EUR_CR_TE_TPCCONTROL >> 2, r17;
/* Wait for all the events to be flagged complete */
#if defined(EUR_CR_EVENT_STATUS2_OTPM_FLUSHED_INV_MASK)
mov r17, #(EUR_CR_EVENT_STATUS_TPC_FLUSH_MASK | \
EUR_CR_EVENT_STATUS_DPM_CONTROL_STORE_MASK);
#else
mov r17, #(EUR_CR_EVENT_STATUS_TPC_FLUSH_MASK | \
EUR_CR_EVENT_STATUS_OTPM_FLUSHED_MASK | \
EUR_CR_EVENT_STATUS_DPM_CONTROL_STORE_MASK);
#endif /* EUR_CR_EVENT_STATUS2_OTPM_FLUSHED_INV_MASK */
ENTER_UNMATCHABLE_BLOCK;
SC_WaitForContextStore:
{
ldr r18, #EUR_CR_EVENT_STATUS >> 2, drc0;
wdf drc0;
and r18, r18, r17;
xor.testnz p2, r18, r17;
p2 ba SC_WaitForContextStore;
}
LEAVE_UNMATCHABLE_BLOCK;
#if defined(EUR_CR_EVENT_STATUS2_OTPM_FLUSHED_INV_MASK)
mov r17, #(EUR_CR_EVENT_HOST_CLEAR_TPC_FLUSH_MASK | \
EUR_CR_EVENT_HOST_CLEAR_DPM_CONTROL_STORE_MASK);
str #EUR_CR_EVENT_HOST_CLEAR >> 2, r17;
/* Wait for the event to be flagged complete */
mov r17, #EUR_CR_EVENT_STATUS2_OTPM_FLUSHED_INV_MASK;
ENTER_UNMATCHABLE_BLOCK;
SC_WaitForOPTM:
{
ldr r18, #EUR_CR_EVENT_STATUS2 >> 2, drc0;
wdf drc0;
and.testz p2, r18, r17;
p2 ba SC_WaitForOPTM;
}
LEAVE_UNMATCHABLE_BLOCK;
mov r17, #EUR_CR_EVENT_HOST_CLEAR2_OTPM_FLUSHED_INV_MASK;
str #EUR_CR_EVENT_HOST_CLEAR >> 2, r17;
#else
mov r17, #(EUR_CR_EVENT_HOST_CLEAR_OTPM_FLUSHED_MASK | \
EUR_CR_EVENT_HOST_CLEAR_TPC_FLUSH_MASK | \
EUR_CR_EVENT_HOST_CLEAR_DPM_CONTROL_STORE_MASK);
str #EUR_CR_EVENT_HOST_CLEAR >> 2, r17;
#endif /* EUR_CR_EVENT_STATUS2_OTPM_FLUSHED_INV_MASK */
#if defined(FIX_HW_BRN_31543)
str #EUR_CR_DPM_TASK_CONTROL >> 2, #EUR_CR_DPM_TASK_CONTROL_LOAD_MASK;
mov r17, #(EUR_CR_EVENT_STATUS_DPM_CONTROL_LOAD_MASK);
ENTER_UNMATCHABLE_BLOCK;
SC_WaitForDPMLoad:
{
ldr r18, #EUR_CR_EVENT_STATUS >> 2, drc0;
wdf drc0;
and r18, r18, r17;
xor.testnz p0, r18, r17;
p0 ba SC_WaitForDPMLoad;
}
LEAVE_UNMATCHABLE_BLOCK;
/* Bits are in the same position for host_clear and event_status */
str #EUR_CR_EVENT_HOST_CLEAR >> 2, r17;
#endif
#if defined(SGX_FEATURE_MP)
#if defined(EUR_CR_MASTER_DPM_MTILE_PARTI_PIM_TABLE_BASE_ADDR)
MK_MEM_ACCESS(ldad) r17, [r16, #DOFFSET(SGXMKIF_HWRTDATA.sPIMTableDevAddr)], drc0;
wdf drc0;
WRITEMASTERCONFIG(#EUR_CR_MASTER_DPM_MTILE_PARTI_PIM_TABLE_BASE_ADDR >> 2, r17, r18);
WRITEMASTERCONFIG(#EUR_CR_MASTER_DPM_TASK_DPLIST >> 2, #EUR_CR_MASTER_DPM_TASK_DPLIST_STORE_MASK, r17);
/* Poll for the DPM PIM cleared event. */
ENTER_UNMATCHABLE_BLOCK;
SC_WaitForDPMPIMStore:
{
READMASTERCONFIG(r17, #EUR_CR_MASTER_DPM_DPLIST_EVENT_STATUS >> 2, drc0);
wdf drc0;
and.testz p2, r17, #EUR_CR_MASTER_DPM_DPLIST_EVENT_STATUS_STORED_MASK;
p2 ba SC_WaitForDPMPIMStore;
}
LEAVE_UNMATCHABLE_BLOCK;
WRITEMASTERCONFIG(#EUR_CR_MASTER_DPM_DPLIST_CLEAR_EVENT >> 2, #EUR_CR_MASTER_DPM_DPLIST_CLEAR_EVENT_STORE_MASK, r17);
#endif
#endif
}
SC_PartialStore:
/* branch back to calling code */
lapc;
}
#if defined(FIX_HW_BRN_33657) && defined(SGX_FEATURE_VDM_CONTEXT_SWITCH)
.export StoreDPMContextPIMUpdate;
/*****************************************************************************
StoreDPMContextPIMUpdate - patch the partial PIMs in memory after
VDM context store
inputs: r16 - RT data to patch
temps: r17, r18, r19, r20, r21
p2
*****************************************************************************/
StoreDPMContextPIMUpdate:
{
MK_MEM_ACCESS(ldad) r17, [r16, #DOFFSET(SGXMKIF_HWRTDATA.sPIMTableDevAddr)], drc0;
MK_MEM_ACCESS(ldad) r18, [r16, #DOFFSET(SGXMKIF_HWRTDATA.ui32VDMPIM)], drc0;
mov r20, #1;
wdf drc0;
/* Patch dplist starting value */
or r19, r18, #(4 << EUR_CR_MASTER_DPM_START_OF_NCPIM0_ACTIVE_SHIFT);
MK_MEM_ACCESS(stad) [r17, #40], r19;
MK_LOAD_STATE_CORE_COUNT_TA(r21, drc0);
MK_WAIT_FOR_STATE_LOAD(drc0);
isub16 r21, r21, #1;
/* Always at least 1 core */
{
/* core0 = N */
or r19, r18, #(5 << EUR_CR_MASTER_DPM_REQUESTOR0_PIM_STATUS_ACTIVE_SHIFT);
MK_MEM_ACCESS(stad) [r17, #36], r19; /* TE */
or r19, r18, #(7 << EUR_CR_MASTER_DPM_REQUESTOR0_PIM_STATUS_ACTIVE_SHIFT);
MK_MEM_ACCESS(stad) [r17, #32], r19; /* MTE */
isub16.tests r21, p2, r21, #1;
p2 ba PIMU_AllCoresDone;
{
/* core1 = N+1 */
iaddu32 r18, r20.low, r18;
or r19, r18, #(5 << EUR_CR_MASTER_DPM_REQUESTOR1_PIM_STATUS_ACTIVE_SHIFT);
MK_MEM_ACCESS(stad) [r17, #37], r19;
or r19, r18, #(7 << EUR_CR_MASTER_DPM_REQUESTOR1_PIM_STATUS_ACTIVE_SHIFT);
MK_MEM_ACCESS(stad) [r17, #33], r19;
MK_MEM_ACCESS(stad) [r17, #23], r19; /* non-committed PIM */
isub16.tests r21, p2, r21, #1;
p2 ba PIMU_AllCoresDone;
{
/* core2 = N+2 */
iaddu32 r18, r20.low, r18;
or r19, r18, #(5 << EUR_CR_MASTER_DPM_REQUESTOR2_PIM_STATUS_ACTIVE_SHIFT);
MK_MEM_ACCESS(stad) [r17, #38], r19;
or r19, r18, #(7 << EUR_CR_MASTER_DPM_REQUESTOR2_PIM_STATUS_ACTIVE_SHIFT);
MK_MEM_ACCESS(stad) [r17, #34], r19;
MK_MEM_ACCESS(stad) [r17, #26], r19; /* non-committed PIM */
isub16.tests r21, p2, r21, #1;
p2 ba PIMU_AllCoresDone;
{
/* core3 = N+3 */
iaddu32 r18, r20.low, r18;
or r19, r18, #(5 << EUR_CR_MASTER_DPM_REQUESTOR3_PIM_STATUS_ACTIVE_SHIFT);
MK_MEM_ACCESS(stad) [r17, #39], r19;
or r19, r18, #(7 << EUR_CR_MASTER_DPM_REQUESTOR3_PIM_STATUS_ACTIVE_SHIFT);
MK_MEM_ACCESS(stad) [r17, #35], r19;
MK_MEM_ACCESS(stad) [r17, #29], r19; /* non-committed PIM */
}
}
}
}
PIMU_AllCoresDone:
/* Fence the stores (12 dwords) */
idf drc0, st;
wdf drc0;
lapc;
}
#endif
/*****************************************************************************
LoadDPMContext routine - load the specified context data
inputs: r16 - RTData address
r17 - context ID
r18 - bif requestor (0 - TA / 1 - 3D)
temps: r19, r20
p2
*****************************************************************************/
LoadDPMContext:
{
#if defined(SGX_FEATURE_MULTIPLE_MEM_CONTEXTS)
/* Set DPM 3D/TA indicator bit to TA */
ldr r19, #EUR_CR_BIF_BANK_SET >> 2, drc0;
wdf drc0;
and r19, r19, ~#USE_DPM_3D_TA_INDICATOR_MASK;
or r19, r18, r19;
str #EUR_CR_BIF_BANK_SET >> 2, r19;
#endif
/* Load the ui32CommonStatus, to see what needs to be loaded */
MK_MEM_ACCESS(ldad) r18, [r16, #DOFFSET(SGXMKIF_HWRTDATA.ui32CommonStatus)], drc1;
/* Wait for the ui32CommonStatus to load */
wdf drc1;
/* Set load/store context ID */
ldr r19, #EUR_CR_DPM_STATE_CONTEXT_ID >> 2, drc0;
wdf drc0;
#if defined(EUR_CR_DPM_STATE_CONTEXT_ID_NCOP_MASK)
/* Clear the LS and NCOP bits */
and r19, r19, ~#(EUR_CR_DPM_STATE_CONTEXT_ID_LS_MASK | \
EUR_CR_DPM_STATE_CONTEXT_ID_NCOP_MASK);
/* Set the NCOP bit if we are loading an incomplete TA */
and.testz p2, r18, #SGXMKIF_HWRTDATA_CMN_STATUS_TACOMPLETE;
p2 or r19, r19, #EUR_CR_DPM_STATE_CONTEXT_ID_NCOP_MASK;
#else
/* Clear the LS bit */
and r19, r19, ~#EUR_CR_DPM_STATE_CONTEXT_ID_LS_MASK;
#endif
or r19, r17, r19;
str #EUR_CR_DPM_STATE_CONTEXT_ID >> 2, r19;
/* Load context state */
MK_MEM_ACCESS(ldad) r19, [r16, #DOFFSET(SGXMKIF_HWRTDATA.sContextStateDevAddr)], drc0;
wdf drc0;
SETUPSTATETABLEBASE(LC, p2, r19, r17);
/* Load the context */
str #EUR_CR_DPM_TASK_STATE >> 2, #EUR_CR_DPM_TASK_STATE_LOAD_MASK;
/* Wait for the load to finish. */
ENTER_UNMATCHABLE_BLOCK;
LC_WaitForStateLoad:
{
ldr r17, #EUR_CR_EVENT_STATUS >> 2, drc0;
wdf drc0;
and.testz p2, r17, #EUR_CR_EVENT_STATUS_DPM_STATE_LOAD_MASK;
p2 ba LC_WaitForStateLoad;
}
LEAVE_UNMATCHABLE_BLOCK;
/* Clear the store event. */
str #EUR_CR_EVENT_HOST_CLEAR >> 2, #EUR_CR_EVENT_HOST_CLEAR_DPM_STATE_LOAD_MASK;
/* if the scene has been completed by the TA then we only need the state table */
and.testnz p2, r18, #SGXMKIF_HWRTDATA_CMN_STATUS_TACOMPLETE;
/* Only flush control, OTPM and tail pointers if doing full store */
p2 ba LC_PartialLoad;
{
#if defined(SGX_FEATURE_MP)
mov r19, #OFFSET(SGXMKIF_HWRTDATA.sContextControlDevAddr[0]);
iaddu32 r17, r19.low, r16;
COPYMEMTOCONFIGREGISTER_TA(LC_PL_ControlTableBase, EUR_CR_DPM_CONTROL_TABLE_BASE, r17, r18, r19, r20);
#else
/* FIXME - use common path above when ready */
MK_MEM_ACCESS(ldad) r17, [r16, #DOFFSET(SGXMKIF_HWRTDATA.sContextControlDevAddr)], drc0;
wdf drc0;
str #EUR_CR_DPM_CONTROL_TABLE_BASE >> 2, r17;
#endif /* SGX_FEATURE_MP */
str #EUR_CR_DPM_TASK_CONTROL >> 2, #EUR_CR_DPM_TASK_CONTROL_LOAD_MASK;
mov r19, #OFFSET(SGXMKIF_HWRTDATA.sContextOTPMDevAddr[0]);
iaddu32 r17, r19.low, r16;
#if defined(EUR_CR_MTE_OTPM_CSM_BASE)
/* Setup the OTPM CSM Base */
COPYMEMTOCONFIGREGISTER_TA(LC_PL_OTPMCSBase, EUR_CR_MTE_OTPM_CSM_BASE, r17, r18, r19, r20);
str #EUR_CR_MTE_OTPM_OP >> 2, #EUR_CR_MTE_OTPM_OP_CSM_INV_MASK;
/* Wait for all the loads to be flagged complete */
mov r17, #(EUR_CR_EVENT_STATUS_OTPM_INV_MASK | \
EUR_CR_EVENT_STATUS_DPM_CONTROL_LOAD_MASK);
#else /* #if defined(EUR_CR_MTE_OTPM_CSM_BASE) */
/* Load OTPM */
COPYMEMTOCONFIGREGISTER_TA(LC_PL_OTPMCSBase, EUR_CR_MTE_OTPM_CSM_LOAD_BASE, r17, r18, r19, r20);
str #EUR_CR_MTE_OTPM_OP >> 2, #EUR_CR_MTE_OTPM_OP_CSM_LOAD_MASK;
/* Wait for all the events to be flagged complete */
mov r17, #(EUR_CR_EVENT_STATUS_OTPM_LOADED_MASK | \
EUR_CR_EVENT_STATUS_DPM_CONTROL_LOAD_MASK);
#endif /* #if defined(EUR_CR_MTE_OTPM_CSM_BASE) */
ENTER_UNMATCHABLE_BLOCK;
LC_WaitForContextLoad:
{
ldr r18, #EUR_CR_EVENT_STATUS >> 2, drc0;
wdf drc0;
and r18, r18, r17;
xor.testnz p2, r18, r17;
p2 ba LC_WaitForContextLoad;
}
LEAVE_UNMATCHABLE_BLOCK;
#if defined(EUR_CR_EVENT_HOST_CLEAR_OTPM_LOADED_MASK)
mov r17, #(EUR_CR_EVENT_HOST_CLEAR_OTPM_LOADED_MASK | \
EUR_CR_EVENT_HOST_CLEAR_DPM_CONTROL_LOAD_MASK);
#else /* #if defined(EUR_CR_EVENT_HOST_CLEAR_OTPM_LOADED_MASK) */
mov r17, #(EUR_CR_EVENT_HOST_CLEAR_OTPM_INV_MASK | \
EUR_CR_EVENT_HOST_CLEAR_DPM_CONTROL_LOAD_MASK);
#endif /* #if defined(EUR_CR_EVENT_HOST_CLEAR_OTPM_LOADED_MASK) */
str #EUR_CR_EVENT_HOST_CLEAR >> 2, r17;
#if defined(SGX_FEATURE_MP)
#if defined(EUR_CR_MASTER_DPM_MTILE_PARTI_PIM_TABLE_BASE_ADDR)
MK_MEM_ACCESS(ldad) r17, [r16, #DOFFSET(SGXMKIF_HWRTDATA.sPIMTableDevAddr)], drc0;
wdf drc0;
WRITEMASTERCONFIG(#EUR_CR_MASTER_DPM_MTILE_PARTI_PIM_TABLE_BASE_ADDR >> 2, r17, r18);
#endif
WRITEMASTERCONFIG(#EUR_CR_MASTER_DPM_TASK_DPLIST >> 2, #EUR_CR_MASTER_DPM_TASK_DPLIST_LOAD_MASK, r17);
/* Poll for the DPM PIM cleared event. */
ENTER_UNMATCHABLE_BLOCK;
LC_WaitForDPMPIMLoad:
{
READMASTERCONFIG(r17, #EUR_CR_MASTER_DPM_DPLIST_EVENT_STATUS >> 2, drc0);
wdf drc0;
and.testz p2, r17, #EUR_CR_MASTER_DPM_DPLIST_EVENT_STATUS_LOADED_MASK;
p2 ba LC_WaitForDPMPIMLoad;
}
LEAVE_UNMATCHABLE_BLOCK;
WRITEMASTERCONFIG(#EUR_CR_MASTER_DPM_DPLIST_CLEAR_EVENT >> 2, #EUR_CR_MASTER_DPM_DPLIST_CLEAR_EVENT_LOAD_MASK, r17);
#if defined(EUR_CR_MASTER_DPM_MTILE_ABORTED) && defined(EUR_CR_DPM_MTILE_ABORTED)
READMASTERCONFIG(r3, #EUR_CR_MASTER_DPM_MTILE_ABORTED >> 2, drc0);
wdf drc0;
str #EUR_CR_DPM_MTILE_ABORTED >> 2, r3;
#endif
#endif
}
LC_PartialLoad:
/* branch back to calling code */
lapc;
}
#if (defined(FIX_HW_BRN_24304) || defined(FIX_HW_BRN_27510)) && defined(SGX_FEATURE_MULTIPLE_MEM_CONTEXTS)
/*****************************************************************************
ConfigureCache - This routine checks which contexts are running and configs
the cache partitions for the best balance between performance
and reliabilty
inputs: r16 - 0 = TA Kick, 1= 3D Kick, 2 = HW Finish (reset partitions)
temps: r17, r18, r19
*****************************************************************************/
.export ConfigureCache;
ConfigureCache:
{
mov r17, #(EUR_CR_CACHE_CTRL_PARTDM0_MASK | EUR_CR_CACHE_CTRL_PARTDM1_MASK);
/* If it is a finished event, reset partitions */
xor.testz p2, r16, #2;
p2 ba CC_CheckValue;
{
ldr r18, #EUR_CR_BIF_BANK0 >> 2, drc0;
wdf drc0;
and r19, r18, #EUR_CR_BIF_BANK0_INDEX_3D_MASK;
shr r19, r19, #(EUR_CR_BIF_BANK0_INDEX_3D_SHIFT - EUR_CR_BIF_BANK0_INDEX_TA_SHIFT);
and r18, r18, #EUR_CR_BIF_BANK0_INDEX_TA_MASK;
xor.testz p2, r18, r19;
/* if the 3D is on the same memory context just exit */
p2 ba CC_Exit;
/* We are about to kick job on the HW work out if the other half is busy */
xor.testz p2, r16, #1;
p2 ba CC_Kick3D;
{
MK_LOAD_STATE(r18, ui32IRenderFlags, drc0);
MK_WAIT_FOR_STATE_LOAD(drc0);
and.testnz p2, r18, #RENDER_IFLAGS_RENDERINPROGRESS;
p2 mov r17, #((0x1 << EUR_CR_CACHE_CTRL_PARTDM0_SHIFT) | \
(0xE << EUR_CR_CACHE_CTRL_PARTDM1_SHIFT));
p2 ba CC_CheckValue;
/* if we get to here, the 3D is inactive and TA will already have all partitions */
ba CC_Exit;
}
CC_Kick3D:
{
MK_LOAD_STATE(r18, ui32ITAFlags, drc0);
MK_WAIT_FOR_STATE_LOAD(drc0);
and.testnz p2, r18, #TA_IFLAGS_TAINPROGRESS;
p2 mov r17, #((0x1 << EUR_CR_CACHE_CTRL_PARTDM0_SHIFT) | \
(0xE << EUR_CR_CACHE_CTRL_PARTDM1_SHIFT));
p2 ba CC_CheckValue;
/* if we get to here, the TA is inactive and 3D will already have all partitions */
ba CC_Exit;
}
}
CC_CheckValue:
ldr r18, #EUR_CR_CACHE_CTRL >> 2, drc0;
wdf drc0;
and r19, r18, #(EUR_CR_CACHE_CTRL_PARTDM0_MASK | EUR_CR_CACHE_CTRL_PARTDM1_MASK);
and r18, r18, ~#(EUR_CR_CACHE_CTRL_PARTDM0_MASK | EUR_CR_CACHE_CTRL_PARTDM1_MASK);
/* if it the same as we have just exit */
xor.testz p2, r17, r19;
p2 ba CC_Exit;
{
or r18, r18, #EUR_CR_CACHE_CTRL_INVALIDATE_MASK;
or r18, r18, r17;
str #EUR_CR_CACHE_CTRL >> 2, r18;
mov r17, #EUR_CR_EVENT_STATUS_MADD_CACHE_INVALCOMPLETE_MASK;
ENTER_UNMATCHABLE_BLOCK;
CC_WaitForMADDInvalidate:
{
ldr r18, #EUR_CR_EVENT_STATUS >> 2, drc0;
wdf drc0;
and.testz p2, r18, r17;
p2 ba CC_WaitForMADDInvalidate;
}
LEAVE_UNMATCHABLE_BLOCK;
mov r17, #EUR_CR_EVENT_HOST_CLEAR_MADD_CACHE_INVALCOMPLETE_MASK;
str #(EUR_CR_EVENT_HOST_CLEAR >> 2), r17;
}
CC_Exit:
/* branch back to calling code */
lapc;
}
#endif
/*****************************************************************************
SetupDirListBase - Set up a directory list base for either TA or 3D requestor.
inputs: r16 = HWRenderContext structure for the application
r17 = Setup TA/3D/2D/EDM requestor, allowed values are:
SETUP_BIF_TA_REQ = TA
SETUP_BIF_3D_REQ = 3D
SETUP_BIF_TQ_REQ = TQ
SETUP_BIF_2D_REQ = 2D only if 2D hardware present
SETUP_BIF_EDM_REQ = EDM only if SUPPORT_SGX_EDM_MEMORY_DEBUG enabled.
temps: r18, r19, r20, r21, p0, p1, p3
p1, p3 are permanent state values (assigned once)
if(SUPPORT_SGX_EDM_MEMORY_DEBUG)
Additional to those above.
inputs: r5 = PDDevPhysAddr if switching EDM to new memory context
r16 = 0 in this case
temps: r22
*****************************************************************************/
#if defined(SGX_FEATURE_MULTIPLE_MEM_CONTEXTS)
SetupDirListBase:
{
#if defined(SUPPORT_SGX_EDM_MEMORY_DEBUG)
mov r18, r5;
and.testz p0, r16, r16;
p0 ba SD_HavePDDevPhysAddr;
{
/* Find out the context's Page Directory Physical Address */
SGXMK_HWCONTEXT_GETDEVPADDR(r18, r16, r19, drc0);
}
SD_HavePDDevPhysAddr:
mov r20, #(EUR_CR_BIF_DIR_LIST_BASE0 >> 2);
ldr r21, r20, drc1;
wdf drc1;
#else
/* Find out the context's Page Directory Physical Address */
mov r20, #(EUR_CR_BIF_DIR_LIST_BASE0 >> 2);
ldr r21, r20, drc0;
/* note: the wdf follows in SGXMK_HWCONTEXT_GETDEVPADDR */
SGXMK_HWCONTEXT_GETDEVPADDR(r18, r16, r19, drc0);
#endif
/* Find out the requestor */
#if defined(SGX_FEATURE_2D_HARDWARE)
xor.testz p3, r17, #SETUP_BIF_2D_REQ;
#endif
and.testnz p1, r17, #(SETUP_BIF_3D_REQ | SETUP_BIF_TQ_REQ);
/* start with dirlist 0 */
mov r19, #0;
/* Check against DirListBase0 */
and.testz p0, r21, r21;
p0 ba SD_SetupDirectory;
{
/* If the value of the DirList is the same */
xor.testz p0, r18, r21;
!p0 ba SD_NotDirList0;
{
/* simply exit */
ba SD_SetupDirectory;
}
SD_NotDirList0:
/* Loop through the DirListBases */
mov r19, #1;
SD_CheckNextDirBase:
{
xor.testz p0, r19, #(SGX_FEATURE_BIF_NUM_DIRLISTS - 1);
p0 ba SD_DirListNotFound;
{
mov r20, #((EUR_CR_BIF_DIR_LIST_BASE1 >> 2)-1);
iaddu32 r20, r19.low, r20;
/* Load the value from current DirListBase */
ldr r21, r20, drc0;
wdf drc0;
/* check if the DirListBase is non-zero */
and.testz p0, r21, r21;
p0 ba SD_SetupDirectory;
/* If the value of the DirList is the same, simply invalidate internal caches and setup requestor */
xor.testz p0, r18, r21;
/* if p0, r18 == r21. */
p0 ba SD_SetupDirectory;
/* Not this one, move onto next DirList */
iaddu32 r19, r19.low, #1;
/* Check whether next one */
ba SD_CheckNextDirBase;
}
}
SD_DirListNotFound:
/* Could not find a free DirListBase or the PhysicalAddr in a DirList, so allocate the next DirListBase */
/* only thing we must check is that the other requestor(s) (TA/3D) is not using it */
/* load the last DirList to be evicted */
MK_MEM_ACCESS_BPCACHE(ldad) r19, [R_TA3DCtl, #DOFFSET(SGXMK_TA3D_CTL.ui32LastDirListBaseAlloc)], drc0;
/* find out if this base is currently being used by the other requestors TA/3D/2D */
ldr r20, #EUR_CR_BIF_BANK0 >> 2, drc1;
wdf drc1;
p1 and r21, r20, #EUR_CR_BIF_BANK0_INDEX_TA_MASK;
!p1 and r21, r20, #EUR_CR_BIF_BANK0_INDEX_3D_MASK;
p1 shr r21, r21, #EUR_CR_BIF_BANK0_INDEX_TA_SHIFT;
!p1 shr r21, r21, #EUR_CR_BIF_BANK0_INDEX_3D_SHIFT;
#if defined(SGX_FEATURE_2D_HARDWARE)
p3 and r20, r20, #EUR_CR_BIF_BANK0_INDEX_TA_MASK;
p3 shr r20, r20, #EUR_CR_BIF_BANK0_INDEX_TA_SHIFT;
p3 ba SD_ReqValuesReady;
{
/* Must be the TA we are setting up */
#if defined(SGX_FEATURE_PTLA)
and r20, r20, #EUR_CR_BIF_BANK0_INDEX_PTLA_MASK;
shr r20, r20, #EUR_CR_BIF_BANK0_INDEX_PTLA_SHIFT;
#else
and r20, r20, #EUR_CR_BIF_BANK0_INDEX_2D_MASK;
shr r20, r20, #EUR_CR_BIF_BANK0_INDEX_2D_SHIFT;
#endif
}
SD_ReqValuesReady:
#endif
wdf drc0;
SD_CheckNextDirAgainstReq:
{
iaddu32 r19, r19.low, #1;
xor.testz p0, r19, #(SGX_FEATURE_BIF_NUM_DIRLISTS - 1);
/* if we have exceeded the max, loop back to zero */
p0 mov r19, #0;
/* compare the requestor(s) */
xor.testnz p0, r21, r19;
#if defined(SGX_FEATURE_2D_HARDWARE)
p0 xor.testnz p0, r20, r19;
#endif
!p0 ba SD_CheckNextDirAgainstReq;
#if defined(SUPPORT_SGX_EDM_MEMORY_DEBUG)
/* if using EDM requestor, we have checked that this dirlistbase
* isn't used by 2D or 3D tasks. Still need to check it's not used
* by the TA
*/
xor.testnz p1, r17, #SETUP_BIF_EDM_REQ;
p1 ba SD_DirListBaseReady;
{
/* Check requestor not used by TA */
ldr r20, #EUR_CR_BIF_BANK0 >> 2, drc1;
wdf drc1;
and r20, r20, #EUR_CR_BIF_BANK0_INDEX_TA_MASK;
shr r20, r20, #EUR_CR_BIF_BANK0_INDEX_TA_SHIFT;
xor.testnz p0, r20, r19;
!p0 ba SD_CheckNextDirAgainstReq;
}
#endif
/* If we have got to here must be ok to use the DirListBase */
}
#if defined(SUPPORT_SGX_EDM_MEMORY_DEBUG)
SD_DirListBaseReady:
/* Reset p1 */
and.testnz p1, r17, #(SETUP_BIF_3D_REQ | SETUP_BIF_TQ_REQ);
#endif
/* Setup registers ready for Writing to DirListBase Register */
and.testz p0, r19, r19;
p0 mov r20, #(EUR_CR_BIF_DIR_LIST_BASE0 >> 2);
p0 ba SD_InvalidateBif;
{
mov r20, #((EUR_CR_BIF_DIR_LIST_BASE1 >> 2)-1);
iaddu32 r20, r19.low, r20;
}
SD_InvalidateBif:
MK_MEM_ACCESS_BPCACHE(stad) [R_TA3DCtl, #DOFFSET(SGXMK_TA3D_CTL.ui32LastDirListBaseAlloc)], r19;
idf drc1, st;
/* invalidate the BIF caches */
mov r17, #1;
#if defined(SUPPORT_SGX_EDM_MEMORY_DEBUG)
INVALIDATE_BIF_CACHE(r17, r22, r21, SetupDirlistBase);
#else
INVALIDATE_BIF_CACHE(r17, r18, r21, SetupDirlistBase);
/* Restore the PD physical address to r18. */
SGXMK_HWCONTEXT_GETDEVPADDR(r18, r16, r17, drc0);
#endif
}
SD_SetupDirectory:
#if defined (SUPPORT_SGX_EDM_MEMORY_DEBUG)
and.testz p0, r16, r16;
p0 ba SD_NotNewContext;
#endif
{
MK_MEM_ACCESS(ldad) r17, [r16, #DOFFSET(SGXMKIF_HWCONTEXT.ui32Flags)], drc0;
wdf drc0;
and.testnz p0, r17, #SGXMKIF_HWCFLAGS_NEWCONTEXT;
/* If the flag is set clear it and invaldc */
!p0 ba SD_NotNewContext;
{
and r17, r17, #~(SGXMKIF_HWCFLAGS_NEWCONTEXT);
MK_MEM_ACCESS(stad) [r16, #DOFFSET(SGXMKIF_HWCONTEXT.ui32Flags)], r17;
idf drc1, st;
wdf drc1;
ba SD_InvalidateBif;
}
}
SD_NotNewContext:
#if defined(SGX_FEATURE_2D_HARDWARE)
p3 ba SD_CachesInvalidated;
#endif
{
p1 ba SD_NoPDSCacheInvalidate;
{
/* Invalidate PDS cache */
str #EUR_CR_PDS_INV0 >> 2, #EUR_CR_PDS_INV0_DSC_MASK;
INVALIDATE_PDS_CODE_CACHE_UTILS();
}
SD_NoPDSCacheInvalidate:
#if defined(EUR_CR_CACHE_CTRL)
/* Invalidate the MADD cache */
ldr r21, #EUR_CR_CACHE_CTRL >> 2, drc0;
wdf drc0;
or r21, r21, #EUR_CR_CACHE_CTRL_INVALIDATE_MASK;
str #EUR_CR_CACHE_CTRL >> 2, r21;
#else
/* Invalidate the data cache */
str #EUR_CR_DCU_ICTRL >> 2, #EUR_CR_DCU_ICTRL_INVALIDATE_MASK;
/* Invalidate the texture cache */
str #EUR_CR_TCU_ICTRL >> 2, #EUR_CR_TCU_ICTRL_INVALTCU_MASK;
#endif
/* Invalidate the USE cache */
#if defined(FIX_HW_BRN_25615)
/* The next three instruction must be done in a cache line */
.align 16;
str #EUR_CR_USE_CACHE >> 2, #EUR_CR_USE_CACHE_INVALIDATE_MASK;
ldr r21, #EUR_CR_USE_CACHE >> 2, drc0;
wdf drc0;
or R_CacheStatus, R_CacheStatus, #CACHE_INVAL_USE;
#else
/* Invalidate the USE cache */
str #EUR_CR_USE_CACHE >> 2, #EUR_CR_USE_CACHE_INVALIDATE_MASK;
or R_CacheStatus, R_CacheStatus, #CACHE_INVAL_USE;
#endif
p1 ba SD_NoWaitForPDSCacheInvalidate;
{
/* Wait for PDS cache to be invalidated */
ENTER_UNMATCHABLE_BLOCK;
SD_PDSCacheNotInvalidated:
{
ldr r21, #EUR_CR_PDS_CACHE_STATUS >> 2, drc0;
wdf drc0;
and r21, r21, #EURASIA_PDS_CACHE_VERTEX_STATUS_MASK;
xor.testnz p0, r21, #EURASIA_PDS_CACHE_VERTEX_STATUS_MASK;
p0 ba SD_PDSCacheNotInvalidated;
}
LEAVE_UNMATCHABLE_BLOCK;
/* Clear the PDS cache flush event */
str #EUR_CR_PDS_CACHE_HOST_CLEAR >> 2, #EURASIA_PDS_CACHE_VERTEX_CLEAR_MASK;
}
SD_NoWaitForPDSCacheInvalidate:
#if defined(EUR_CR_CACHE_CTRL)
mov r17, #EUR_CR_EVENT_STATUS_MADD_CACHE_INVALCOMPLETE_MASK;
ENTER_UNMATCHABLE_BLOCK;
SD_WaitForMaddCacheInvalidate:
{
ldr r21, #EUR_CR_EVENT_STATUS >> 2, drc0;
wdf drc0;
and.testz p0, r21, r17;
p0 ba SD_WaitForMaddCacheInvalidate;
}
LEAVE_UNMATCHABLE_BLOCK;
/* clear the bits */
mov r21, #EUR_CR_EVENT_HOST_CLEAR_MADD_CACHE_INVALCOMPLETE_MASK;
str #EUR_CR_EVENT_HOST_CLEAR >> 2, r21;
#else
/* data cache */
ENTER_UNMATCHABLE_BLOCK;
SD_WaitForDataCacheInvalidate:
{
ldr r21, #EUR_CR_EVENT_STATUS2 >> 2, drc0;
wdf drc0;
shl.testns p0, r21, #(31 - EUR_CR_EVENT_STATUS2_DCU_INVALCOMPLETE_SHIFT);
p0 ba SD_WaitForDataCacheInvalidate;
}
LEAVE_UNMATCHABLE_BLOCK;
/* clear the bits */
mov r21, #EUR_CR_EVENT_HOST_CLEAR2_DCU_INVALCOMPLETE_MASK;
str #EUR_CR_EVENT_HOST_CLEAR2 >> 2, r21;
/* texture cache */
ENTER_UNMATCHABLE_BLOCK;
SD_WaitForTextureCacheInvalidate:
{
ldr r21, #EUR_CR_EVENT_STATUS >> 2, drc0;
wdf drc0;
shl.testns p0, r21, #(31 - EUR_CR_EVENT_STATUS_TCU_INVALCOMPLETE_SHIFT);
p0 ba SD_WaitForTextureCacheInvalidate;
}
LEAVE_UNMATCHABLE_BLOCK;
/* clear the bits */
mov r21, #EUR_CR_EVENT_HOST_CLEAR_TCU_INVALCOMPLETE_MASK;
str #EUR_CR_EVENT_HOST_CLEAR >> 2, r21;
#endif
#if defined(SGX_FEATURE_WRITEBACK_DCU)
p1 mov r21, #SGX545_USE_OTHER2_CFI_DATAMASTER_PIXEL;
!p1 mov r21, #SGX545_USE_OTHER2_CFI_DATAMASTER_VERTEX;
/* Invalidate the DCU cache. */
ci.global r21, #0, #SGX545_USE1_OTHER2_CFI_LEVEL_L0L1L2;
#endif
#if defined(SGX_FEATURE_SYSTEM_CACHE)
#if defined(SGX_FEATURE_MP)
!p1 mov r16, #(EUR_CR_MASTER_SLC_CTRL_INVAL_DM_VERTEX_MASK | \
EUR_CR_MASTER_SLC_CTRL_FLUSH_DM_VERTEX_MASK);
p1 mov r16, #(EUR_CR_MASTER_SLC_CTRL_INVAL_DM_PIXEL_MASK | \
EUR_CR_MASTER_SLC_CTRL_FLUSH_DM_PIXEL_MASK);
INVALIDATE_SYSTEM_CACHE_INLINE(r17, r16, r21, SD);
#else
INVALIDATE_SYSTEM_CACHE_INLINE(r17, r21, SD);
#endif /* SGX_FEATURE_MP */
#endif
#if defined(SUPPORT_EXTERNAL_SYSTEM_CACHE)
INVALIDATE_EXT_SYSTEM_CACHE_INLINE(r17);
#endif
}
SD_CachesInvalidated:
/* check if the value is already setup, if so don't re-write it */
ldr r21, r20, drc0;
wdf drc0;
xor.testz p0, r21, r18;
p0 ba SD_DirListBaseStored;
{
/* As we have found a DirListBase we must set it up */
SGXMK_SPRV_UTILS_WRITE_REG(r20, r18);
}
SD_DirListBaseStored:
lapc;
}
/*****************************************************************************
SetupRequestor - Set up a TA, 3D or 2D requestor for new directory list base.
inputs: r19 = dir list base used for current requestor
p1 = true if using 3D/TQ requestor, false otherwise
temps: r19, r20, r21
if(SGX_FEATURE_2D_HARDWARE)
In addition to above
inputs: p3 = true if using 2D requestor, false otherwise
*****************************************************************************/
SetupRequestor:
{
/* Setup the correct requestor */
ldr r20, #EUR_CR_BIF_BANK0 >> 2, drc1;
wdf drc0;
#if defined(SGX_FEATURE_2D_HARDWARE)
#if defined(SGX_FEATURE_PTLA)
p3 shl r21, r19, #EUR_CR_BIF_BANK0_INDEX_PTLA_SHIFT;
wdf drc1;
p3 and r20, r20, #~(EUR_CR_BIF_BANK0_INDEX_PTLA_MASK);
#else
p3 shl r21, r19, #EUR_CR_BIF_BANK0_INDEX_2D_SHIFT;
wdf drc1;
p3 and r20, r20, #~(EUR_CR_BIF_BANK0_INDEX_2D_MASK);
#endif
p3 ba SD_SetBifBank0;
#endif
{
!p1 shl r21, r19, #EUR_CR_BIF_BANK0_INDEX_TA_SHIFT;
p1 shl r21, r19, #EUR_CR_BIF_BANK0_INDEX_3D_SHIFT;
#if !defined(SGX_FEATURE_2D_HARDWARE)
wdf drc1;
#endif
!p1 and r20, r20, #~(EUR_CR_BIF_BANK0_INDEX_TA_MASK);
p1 and r20, r20, #~(EUR_CR_BIF_BANK0_INDEX_3D_MASK);
}
SD_SetBifBank0:
or r20, r20, r21;
SGXMK_SPRV_UTILS_WRITE_REG(#EUR_CR_BIF_BANK0 >> 2, r20);
/* Read back the register to ensure write has completed */
ldr r20, #EUR_CR_BIF_BANK0 >> 2, drc0;
wdf drc0;
lapc;
}
#if defined(SUPPORT_SGX_EDM_MEMORY_DEBUG)
/*****************************************************************************
SetupRequestorEDM - Set up an EDM requestor for new directory list base.
inputs: r19 = dir list base used for EDM requestor
temps: r19, r20, r21
*****************************************************************************/
SetupRequestorEDM:
{
/* Setup the correct requestor */
ldr r20, #EUR_CR_BIF_BANK0 >> 2, drc1;
wdf drc0;
/* set up EDM requestor in BIF_BANK0 */
ldr r20, #EUR_CR_BIF_BANK0 >> 2, drc0;
wdf drc0;
shl r21, r19, #EUR_CR_BIF_BANK0_INDEX_EDM_SHIFT;
and r20, r20, #~(EUR_CR_BIF_BANK0_INDEX_EDM_MASK);
or r20, r20, r21;
SGXMK_SPRV_UTILS_WRITE_REG(#EUR_CR_BIF_BANK0 >> 2, r20);
/* Read back the register to ensure write has completed */
ldr r20, #EUR_CR_BIF_BANK0 >> 2, drc0;
wdf drc0;
lapc;
}
#endif /* SUPPORT_SGX_EDM_MEMORY_DEBUG */
#else /* SGX_FEATURE_MULTIPLE_MEM_CONTEXTS */
/*****************************************************************************
SetupDirListBase - Set up a directory list base for either TA or 3D requestor.
inputs: r16 = HWRenderContext structure for the application
r17 = Setup TA/3D/EDM requestor
0 = TA, 1 = 3D, 2 = TQ, 4 = 2D if 2D hardware, 8 = EDM
temps: r18, r19, r20, r21
*****************************************************************************/
SetupDirListBase:
{
/* At this point we need to flush the caches and update directory base 0 */
ldr r19, #EUR_CR_BIF_DIR_LIST_BASE0 >> 2, drc1;
/* note: the wdf follows in SGXMK_HWCONTEXT_GETDEVPADDR */
SGXMK_HWCONTEXT_GETDEVPADDR(r18, r16, r20, drc1);
xor.testz p1, r18, r19;
p1 ba SD_NoNewDirBase;
{
#if defined(DEBUG)
/*
Directory base is changing, so assert that everything is idle.
*/
MK_LOAD_STATE(r19, ui32ITAFlags, drc0);
MK_WAIT_FOR_STATE_LOAD(drc0);
mov r21, #TA_IFLAGS_ABORTINPROGRESS;
and.testnz p1, r19, #TA_IFLAGS_TAINPROGRESS;
p1 and.testz p1, r19, r21;
p1 ba SD_Busy;
{
MK_LOAD_STATE(r19, ui32IRenderFlags, drc0);
MK_WAIT_FOR_STATE_LOAD(drc0);
and.testnz p1, r19, #RENDER_IFLAGS_RENDERINPROGRESS;
p1 ba SD_Busy;
{
#if defined(SGX_FEATURE_2D_HARDWARE)
MK_LOAD_STATE(r19, ui32I2DFlags, drc0);
MK_WAIT_FOR_STATE_LOAD(drc0);
and.testnz p1, r19, #TWOD_IFLAGS_2DBLITINPROGRESS;
p1 ba SD_Busy;
#endif
/* If we get here the hardware is idle and it's ok to continue */
ba SD_NotBusy;
}
}
SD_Busy:
{
MK_ASSERT_FAIL(MKTC_SDLB_ILLEGAL);
}
SD_NotBusy:
#endif /* DEBUG */
/* check which caches we need to flush */
and.testnz p1, r17, r17;
/* Clear for later use */
mov r19, #0;
p1 ba SD_NoPDSOrMADDFlush;
{
/* Invalidate the PDS cache */
str #EUR_CR_PDS_INV0 >> 2, #EUR_CR_PDS_INV0_DSC_MASK;
INVALIDATE_PDS_CODE_CACHE_UTILS();
#if defined(EUR_CR_CACHE_CTRL)
/* Invalidate the MADD cache */
ldr r17, #EUR_CR_CACHE_CTRL >> 2, drc0;
wdf drc0;
or r17, r17, #EUR_CR_CACHE_CTRL_INVALIDATE_MASK;
str #EUR_CR_CACHE_CTRL >> 2, r17;
/* Indicate that we need to wait for the MADD to Invalidate */
or r19, r19, #EUR_CR_EVENT_STATUS_MADD_CACHE_INVALCOMPLETE_MASK;
#else
/* Invalidate the data cache */
str #EUR_CR_DCU_ICTRL >> 2, #EUR_CR_DCU_ICTRL_INVALIDATE_MASK;
/* Wait for the DCU to invalidate */
ENTER_UNMATCHABLE_BLOCK;
SD_WaitForDataCacheInvalidate:
{
ldr r17, #EUR_CR_EVENT_STATUS2 >> 2, drc0;
wdf drc0;
shl.testns p0, r17, #(31 - EUR_CR_EVENT_STATUS2_DCU_INVALCOMPLETE_SHIFT);
p0 ba SD_WaitForDataCacheInvalidate;
}
LEAVE_UNMATCHABLE_BLOCK;
/* clear the bits */
mov r17, #EUR_CR_EVENT_HOST_CLEAR2_DCU_INVALCOMPLETE_MASK;
str #EUR_CR_EVENT_HOST_CLEAR2 >> 2, r17;
/* Invalidate the texture cache */
str #EUR_CR_TCU_ICTRL >> 2, #EUR_CR_TCU_ICTRL_INVALTCU_MASK;
/* Indicate that we need to wait for the texture cache to Invalidate */
or r19, r19, #EUR_CR_EVENT_STATUS_TCU_INVALCOMPLETE_MASK;
#endif
/* Wait for the PDS cache invalidate to complete */
ENTER_UNMATCHABLE_BLOCK;
SD_WaitForPDSCacheInvalidate:
{
ldr r17, #EUR_CR_PDS_CACHE_STATUS >> 2, drc0;
wdf drc0;
and r17, r17, #EURASIA_PDS_CACHE_VERTEX_STATUS_MASK;
xor.testnz p0, r17, #EURASIA_PDS_CACHE_VERTEX_STATUS_MASK;
p0 ba SD_WaitForPDSCacheInvalidate;
}
LEAVE_UNMATCHABLE_BLOCK;
/* Clear the PDS cache flush event */
str #EUR_CR_PDS_CACHE_HOST_CLEAR >> 2, #EURASIA_PDS_CACHE_VERTEX_CLEAR_MASK;
}
SD_NoPDSOrMADDFlush:
/* Flush TPC to ensure writes to memory are complete */
mov r17, #EUR_CR_TE_TPCCONTROL_FLUSH_MASK;
str #EUR_CR_TE_TPCCONTROL >> 2, r17;
/* Invalidate the USE cache */
#if defined(FIX_HW_BRN_25615)
/* The next three instruction must be done in a cache line */
.align 16;
str #EUR_CR_USE_CACHE >> 2, #EUR_CR_USE_CACHE_INVALIDATE_MASK;
ldr r17, #EUR_CR_USE_CACHE >> 2, drc0;
wdf drc0;
or R_CacheStatus, R_CacheStatus, #CACHE_INVAL_USE;
#else
/* Invalidate the USE cache */
str #EUR_CR_USE_CACHE >> 2, #EUR_CR_USE_CACHE_INVALIDATE_MASK;
or R_CacheStatus, R_CacheStatus, #CACHE_INVAL_USE;
#endif
or r19, r19, #EUR_CR_EVENT_STATUS_TPC_FLUSH_MASK;
ENTER_UNMATCHABLE_BLOCK;
SD_WaitForOperations:
{
ldr r17, #EUR_CR_EVENT_STATUS >> 2, drc0;
wdf drc0;
and r17, r17, r19;
xor.testnz p0, r17, r19;
p0 ba SD_WaitForOperations;
}
LEAVE_UNMATCHABLE_BLOCK;
/* The clear bits match the status bits */
str #EUR_CR_EVENT_HOST_CLEAR >> 2, r19;
#if defined(SGX_FEATURE_SYSTEM_CACHE)
#if defined(SGX_FEATURE_MP)
!p1 mov r16, #(EUR_CR_MASTER_SLC_CTRL_INVAL_DM_VERTEX_MASK | \
EUR_CR_MASTER_SLC_CTRL_FLUSH_DM_VERTEX_MASK);
p1 mov r16, #(EUR_CR_MASTER_SLC_CTRL_INVAL_DM_PIXEL_MASK | \
EUR_CR_MASTER_SLC_CTRL_FLUSH_DM_PIXEL_MASK);
INVALIDATE_SYSTEM_CACHE_INLINE(r20, r16, r19, SD);
#else
INVALIDATE_SYSTEM_CACHE_INLINE(r17, r19, SD);
#endif /* SGX_FEATURE_MP */
#endif
#if defined(SUPPORT_EXTERNAL_SYSTEM_CACHE)
INVALIDATE_EXT_SYSTEM_CACHE_INLINE(r17);
#endif
/* write new dir base */
SGXMK_SPRV_UTILS_WRITE_REG(#EUR_CR_BIF_DIR_LIST_BASE0 >> 2, r18);
ldr r18, #EUR_CR_BIF_DIR_LIST_BASE0 >> 2, drc0;
wdf drc0;
#if defined(FIX_HW_BRN_31620)
/* refill all the DC cache with the new PD */
REQUEST_DC_LOAD();
/* The call to InvalidateBIFCache will do a PT invalidate */
#endif
/* Invalidate the BIF caches */
mov r17, #1;
INVALIDATE_BIF_CACHE(r17, r18, r21, SetupDirlistBase);
}
SD_NoNewDirBase:
lapc;
}
#endif /* defined(SGX_FEATURE_MULTIPLE_MEM_CONTEXTS) */
.export ClearActivePowerFlags;
/*****************************************************************************
ClearActivePowerFlags - Clear an active power flag and check whether to start the
active power countdown.
inputs: r16 - flag to clear
temps: r17
*****************************************************************************/
ClearActivePowerFlags:
{
MK_LOAD_STATE(r17, ui32ActivePowerFlags, drc0);
MK_WAIT_FOR_STATE_LOAD(drc0);
and.testz p0, r17, r16;
p0 ba ClearActivePowerFlags_End;
xor r16, r16, #~0;
and r17, r17, r16;
MK_STORE_STATE(ui32ActivePowerFlags, r17);
and.testz p0, r17, r17;
MK_WAIT_FOR_STATE_STORE(drc0);
!p0 ba ClearActivePowerFlags_End;
/* All the flags are cleared, so start the active power counter. */
MK_MEM_ACCESS_BPCACHE(ldad) r17, [R_HostCtl, #DOFFSET(SGXMKIF_HOST_CTL.ui32ActivePowManSampleRate)], drc0;
wdf drc0;
MK_STORE_STATE(ui32ActivePowerCounter, r17);
MK_WAIT_FOR_STATE_STORE(drc0);
/* Notify the host that the activity state has changed. */
MK_MEM_ACCESS_BPCACHE(ldad) r17, [R_HostCtl, #DOFFSET(SGXMKIF_HOST_CTL.ui32InterruptFlags)], drc0;
wdf drc0;
or r17, r17, #PVRSRV_USSE_EDM_INTERRUPT_IDLE;
MK_MEM_ACCESS_BPCACHE(stad) [R_HostCtl, #DOFFSET(SGXMKIF_HOST_CTL.ui32InterruptFlags)], r17;
idf drc0, st;
wdf drc0;
/* Send iterrupt to host. */
mov r17, #EUR_CR_EVENT_STATUS_SW_EVENT_MASK;
str #EUR_CR_EVENT_STATUS >> 2, r17;
ClearActivePowerFlags_End:
lapc;
}
#if defined(SGX_FEATURE_MULTIPLE_MEM_CONTEXTS)
.export SwitchEDMBIFBank;
/*****************************************************************************
SwitchEDMBIFBank - Switches the EDM BIF BANK mapping to the TA, 3D
or original EDM view
inputs: r16 - 0=TA, 1=3D, 2=EDM
temps: r17, r18
*****************************************************************************/
SwitchEDMBIFBank:
{
/* load the BIFBANK reg */
ldr r17, #EUR_CR_BIF_BANK0 >> 2, drc0;
/* move to EDM? */
xor.testz p2, r16, #2;
p2 mov r18, #(SGX_BIF_DIR_LIST_INDEX_EDM << EUR_CR_BIF_BANK0_INDEX_EDM_SHIFT);
wdf drc0;
#if defined(SGX_FEATURE_WRITEBACK_DCU)
/* Flush the DCU cache before switching to a new data master */
cf.global #SGX545_USE_OTHER2_CFI_DATAMASTER_EVENT, #0, #SGX545_USE1_OTHER2_CFI_LEVEL_L0L1L2;
#endif
p2 ba SE_DMSelected;
{
/* move to TA? */
xor.testz p2, r16, #0;
p2 and r18, r17, #EUR_CR_BIF_BANK0_INDEX_TA_MASK;
p2 shr r18, r18, #(EUR_CR_BIF_BANK0_INDEX_TA_SHIFT - EUR_CR_BIF_BANK0_INDEX_EDM_SHIFT);
p2 ba SE_DMSelected;
{
/* move to 3D */
and r18, r17, #EUR_CR_BIF_BANK0_INDEX_3D_MASK;
shr r18, r18, #(EUR_CR_BIF_BANK0_INDEX_3D_SHIFT - EUR_CR_BIF_BANK0_INDEX_EDM_SHIFT);
}
}
SE_DMSelected:
/* clear the current EDM mapping */
and r17, r17, ~#EUR_CR_BIF_BANK0_INDEX_EDM_MASK;
/* set the new mapping, store and flush */
or r17, r17, r18;
SGXMK_SPRV_UTILS_WRITE_REG(#EUR_CR_BIF_BANK0 >> 2, r17);
ldr r17, #EUR_CR_BIF_BANK0 >> 2, drc0;
wdf drc0;
xor.testnz p2, r16, #2;
p2 ba SE_NoDummyStoreRequired;
{
MK_MEM_ACCESS_BPCACHE(ldad) r17, [R_TA3DCtl, #0], drc0;
wdf drc0;
MK_MEM_ACCESS_BPCACHE(stad) [R_TA3DCtl, #0], r17;
idf drc0, st;
wdf drc0;
}
SE_NoDummyStoreRequired:
lapc;
}
#endif /* defined(SGX_FEATURE_MULTIPLE_MEM_CONTEXTS) */
#if defined(SGX_FEATURE_SYSTEM_CACHE)
.export InvalidateSLC;
/*****************************************************************************
InvalidateSLC - Invalidate the SLC
inputs: r16 - invalidate mask bits
r17 - flush mask bits
temps: r18, r19, r20
*****************************************************************************/
InvalidateSLC:
{
#if defined(SGX_FEATURE_MP)
/* Combine the Flush and Invalidate masks */
or r16, r16, r17;
INVALIDATE_SYSTEM_CACHE_INLINE(r20, r16, r19, ISLC);
#else
INVALIDATE_SYSTEM_CACHE_INLINE(r17, r19, ISLC);
#endif
lapc;
}
#endif
#if defined(SUPPORT_EXTERNAL_SYSTEM_CACHE)
.export InvalidateExtSysCache;
/*****************************************************************************
InvalidateExtSysCache - Invalidate the external system cache
inputs: none
temps: r17
*****************************************************************************/
InvalidateExtSysCache:
{
INVALIDATE_EXT_SYSTEM_CACHE_INLINE(r17);
lapc;
}
#endif
#if defined(SGX_FEATURE_VDM_CONTEXT_SWITCH)
.export StartTAContextSwitch;
.export STACS_TermState0;
.export STACS_TermState1;
/*****************************************************************************
StartTAContextSwitch
This routines cause the TA to start context switching away from the
current operation.
inputs:
temps: r16: ui32ITAFlags
r17, r18, r19, r20
*****************************************************************************/
StartTAContextSwitch:
{
/*
Check if a context store is already in progress before requesting one
*/
MK_LOAD_STATE(r16, ui32ITAFlags, drc0);
MK_WAIT_FOR_STATE_LOAD(drc0);
and.testnz p2, r16, #TA_IFLAGS_HALTTA;
p2 mov r17, #SGX_UKERNEL_TA_CTXSWITCH_INPROGRESS;
p2 ba STACS_InProgress;
/* Check if reserve pages were added for SPM deadlock condition, if so don't context switch */
shl.tests p2, r16, #(31 - TA_IFLAGS_SPM_DEADLOCK_MEM_BIT);
p2 ba STACS_InProgress;
{
#if defined(FIX_HW_BRN_33657)
#if !defined(SUPPORT_SECURE_33657_FIX)
/* Disable security to allow VDM terminate task to modify the TE_PSG control */
SGXMK_SPRV_UTILS_WRITE_REG(#EUR_CR_USE_SECURITY >> 2, #EUR_CR_USE_SECURITY_DISABLE_MASK );
#endif
#endif
MK_MEM_ACCESS_BPCACHE(ldad) r17, [R_TA3DCtl, #DOFFSET(SGXMK_TA3D_CTL.sTARenderContext)], drc0;
wdf drc0;
#if defined(DEBUG)
/* Count number of stores */
MK_MEM_ACCESS_BPCACHE(ldad) r18, [r17, #DOFFSET(SGXMKIF_HWRENDERCONTEXT.ui32NumTAContextStores)], drc0;
wdf drc0;
mov r19, #1;
iaddu32 r18, r19.low, r18;
MK_MEM_ACCESS_BPCACHE(stad) [r17, #DOFFSET(SGXMKIF_HWRENDERCONTEXT.ui32NumTAContextStores)], r18;
idf drc0, st;
wdf drc0;
#endif
#if defined(SGX_FEATURE_USE_SA_COUNT_REGISTER)
/* Copy the SA buffer address to the TA3D ctl so it is ready for the terminate program */
MK_MEM_ACCESS(ldad) r18, [r17, #DOFFSET(SGXMKIF_HWRENDERCONTEXT.sSABufferDevAddr)], drc0;
#if defined(SGX_FEATURE_MP)
MK_MEM_ACCESS(ldad) r19, [r17, #DOFFSET(SGXMKIF_HWRENDERCONTEXT.ui32SABufferStride)], drc0;
#endif
wdf drc0;
MK_MEM_ACCESS_BPCACHE(stad) [R_TA3DCtl, #DOFFSET(SGXMK_TA3D_CTL.sVDMSABufferDevAddr)], r18;
#if defined(SGX_FEATURE_MP)
MK_MEM_ACCESS_BPCACHE(stad) [R_TA3DCtl, #DOFFSET(SGXMK_TA3D_CTL.ui32VDMSABufferStride)], r19;
#endif
idf drc0, st;
#endif
#if defined(EUR_CR_MASTER_DPM_PAGE_MANAGEOP_SERIAL_MASK)
/* Disable DPM serial mode during context switch */
READMASTERCONFIG(r18, #EUR_CR_MASTER_DPM_PAGE_MANAGEOP >> 2, drc0);
wdf drc0;
and r18, r18, ~#EUR_CR_MASTER_DPM_PAGE_MANAGEOP_SERIAL_MASK;
WRITEMASTERCONFIG(#EUR_CR_MASTER_DPM_PAGE_MANAGEOP >> 2, r18, r19);
#endif
#if defined(SGX_FEATURE_MASTER_VDM_CONTEXT_SWITCH)
/* Enable proactive PIM speculation */
READMASTERCONFIG(r2, #EUR_CR_MASTER_DPM_PROACTIVE_PIM_SPEC >> 2, drc0);
wdf drc0;
and r2, r2, ~#EUR_CR_MASTER_DPM_PROACTIVE_PIM_SPEC_EN_N_MASK;
WRITEMASTERCONFIG(#EUR_CR_MASTER_DPM_PROACTIVE_PIM_SPEC >> 2, r2, r3);
MK_MEM_ACCESS(ldad) r18, [r17, #DOFFSET(SGXMKIF_HWRENDERCONTEXT.sMasterVDMSnapShotBufferDevAddr)], drc0;
wdf drc0;
/* Setup the registers to store out the state */
WRITEMASTERCONFIG(#EUR_CR_MASTER_VDM_CONTEXT_STORE_SNAPSHOT >> 2, r18, r19);
#endif
#if defined(SGX_FEATURE_SLAVE_VDM_CONTEXT_SWITCH)
mov r18, #OFFSET(SGXMKIF_HWRENDERCONTEXT.sVDMSnapShotBufferDevAddr[0]);
iaddu32 r18, r18.low, r17;
COPYMEMTOCONFIGREGISTER_TA(STACS_VDMSnapShotBuffer, EUR_CR_VDM_CONTEXT_STORE_SNAPSHOT, r18, r19, r20, r21);
#endif
STACS_TermState0:
/* The following limms will be replaced at runtime with the ui32TATermState words */
mov r17, #0xDEADBEEF;
STACS_TermState1:
mov r18, #0xDEADBEEF;
/* Setup registers that point to TA terminate state update code */
#if defined(SGX_FEATURE_MASTER_VDM_CONTEXT_SWITCH) && !defined(SGX_FEATURE_SLAVE_VDM_CONTEXT_SWITCH)
WRITEMASTERCONFIG(#EUR_CR_MASTER_VDM_CONTEXT_STORE_STATE0 >> 2, r17, r19);
WRITEMASTERCONFIG(#EUR_CR_MASTER_VDM_CONTEXT_STORE_STATE1 >> 2, r18, r19);
WRITEMASTERCONFIG(#EUR_CR_MASTER_VDM_CONTEXT_STORE_START >> 2, \
#EUR_CR_MASTER_VDM_CONTEXT_STORE_START_PULSE_MASK, r19);
#else
str #EUR_CR_VDM_CONTEXT_STORE_STATE0 >> 2, r17;
str #EUR_CR_VDM_CONTEXT_STORE_STATE1 >> 2, r18;
#if defined(SGX_FEATURE_MASTER_VDM_CONTEXT_SWITCH) // SGX_SUPPORT_MASTER_ONLY_SWITCHING
/* Only start the master state store */
WRITEMASTERCONFIG(#EUR_CR_MASTER_VDM_CONTEXT_STORE_START >> 2, \
#EUR_CR_VDM_CONTEXT_STORE_START_PULSE_MASK, r18);
#else
/* Perform a VDM context store and wait for the store to occur */
str #EUR_CR_VDM_CONTEXT_STORE_START >> 2, #EUR_CR_VDM_CONTEXT_STORE_START_PULSE_MASK;
#endif /* FIX_HW_BRN_31425 */
#endif
{
mov r18, #(SGX_MK_VDM_CTX_STORE_STATUS_COMPLETE_MASK | \
SGX_MK_VDM_CTX_STORE_STATUS_PROCESS_MASK | \
SGX_MK_VDM_CTX_STORE_STATUS_NA_MASK);
mov r19, #3; /* Try 3 times */
STACS_WaitForStoreToStart:
{
#if (defined(SGX_FEATURE_MASTER_VDM_CONTEXT_SWITCH) && !defined(SGX_FEATURE_SLAVE_VDM_CONTEXT_SWITCH)) \
|| defined(FIX_HW_BRN_31425)
READMASTERCONFIG(r17, #EUR_CR_MASTER_VDM_CONTEXT_STORE_STATUS >> 2, drc0);
#else
ldr r17, #EUR_CR_VDM_CONTEXT_STORE_STATUS >> 2, drc0;
#endif
wdf drc0;
and.testz p2, r17, r18;
p2 isub16.testnz r19, p2, r19, #1;
p2 ba STACS_WaitForStoreToStart;
}
/* Check if store has started: if not, it's a normal switch */
and.testz p2, r17, r18;
p2 ba STACS_NotFastSwitch;
#if defined(EUR_CR_TIMER)
/* Only poll for 2400 clks (timer increments in every 16 clks) */
ldr r18, #SGX_MP_CORE_SELECT(EUR_CR_TIMER, 0) >> 2, drc1;
wdf drc1;
mov r19, #(2400 / 16);
iaddu32 r18, r19.low, r18;
#endif
STACS_WaitForProcessToDrop:
{
#if defined(SGX_FEATURE_MASTER_VDM_CONTEXT_SWITCH) // SGX_SUPPORT_MASTER_ONLY_SWITCHING
READMASTERCONFIG(r17, #EUR_CR_MASTER_VDM_CONTEXT_STORE_STATUS >> 2, drc0);
#else
ldr r17, #EUR_CR_VDM_CONTEXT_STORE_STATUS >> 2, drc0;
#endif
#if defined(EUR_CR_TIMER)
/* Check if we have time out. */
ldr r19, #SGX_MP_CORE_SELECT(EUR_CR_TIMER, 0) >> 2, drc0;
wdf drc0;
and.testz p2, r17, #SGX_MK_VDM_CTX_STORE_STATUS_PROCESS_MASK;
p2 ba STACS_NotProcessing;
{
/* We still need to poll, so check if it has timed out */
/* If the new value is > timeout, then exit loop */
isub16.tests p2, r18, r19;
p2 ba STACS_NotFastSwitch;
/* We have not timed out yet */
ba STACS_WaitForProcessToDrop;
}
STACS_NotProcessing:
#else
wdf drc0;
and.testnz p2, r17, #SGX_MK_VDM_CTX_STORE_STATUS_PROCESS_MASK;
p2 ba STACS_WaitForProcessToDrop;
#endif
}
}
STACS_NotFastSwitch:
{
/* Flag we were trying to context switch the TA so we know what caused the
TA finished event */
mov r17, #SGX_UKERNEL_TA_CTXSWITCH_NORMAL;
or r16, r16, #TA_IFLAGS_HALTTA;
}
STACS_Exit:
MK_STORE_STATE(ui32ITAFlags, r16);
MK_WAIT_FOR_STATE_STORE(drc0);
}
STACS_InProgress:
/* return */
lapc;
}
#endif
#if defined(SGX_FEATURE_ISP_CONTEXT_SWITCH)
.export Start3DContextSwitch;
/*****************************************************************************
Start3DContextSwitch
This routines cause the ISP to start context switching away from the
current render.
inputs:
temps: r16, r17, r18, r19
*****************************************************************************/
Start3DContextSwitch:
{
/*
The context store will cause a render finished event so just save whatever is
needed so we can get to the KickRender routine ASAP after this happens
*/
MK_LOAD_STATE(r17, ui32IRenderFlags, drc0);
MK_WAIT_FOR_STATE_LOAD(drc0);
/* indicate that a context store has been requested */
or r17, r17, #RENDER_IFLAGS_HALTRENDER;
MK_STORE_STATE(ui32IRenderFlags, r17);
MK_WAIT_FOR_STATE_STORE(drc0);
#if defined(SGX_FEATURE_ISP_CONTEXT_SWITCH_REV_3)
#if defined(FIX_HW_BRN_31930) || defined(FIX_HW_BRN_32052)
#if defined(SGX_FEATURE_MP)
/* Clear down the slave core EOR event status */
MK_LOAD_STATE_CORE_COUNT_3D(r18, drc0);
MK_WAIT_FOR_STATE_LOAD(drc0);
#else
mov r18, #1;
#endif
S3DCS_NextCore:
{
isub32 r18, r18, #1;
mov r16, #EUR_CR_EVENT_HOST_CLEAR_PIXELBE_END_RENDER_MASK;
WRITECORECONFIG(r18, #EUR_CR_EVENT_HOST_CLEAR >> 2, \
r16, r19);
/* Check next core */
and.testnz p0, r18, r18;
p0 ba S3DCS_NextCore;
}
idf drc0, st;
wdf drc0;
#endif
#endif
/* Load up the context */
MK_LOAD_STATE(r16, s3DContext, drc0);
#if defined(SGX_FEATURE_FAST_RENDER_CONTEXT_SWITCH)
and.testnz p3, r17, #RENDER_IFLAGS_TRANSFERRENDER;
p3 ba S3DCS_FastRender;
{
#endif
/* Wait for the render context to load */
MK_WAIT_FOR_STATE_LOAD(drc0);
#if defined(SGX_FEATURE_ISP_CONTEXT_SWITCH_REV_3)
#if defined(DEBUG)
/* Count number of stores */
MK_MEM_ACCESS_BPCACHE(ldad) r17, [r16, #DOFFSET(SGXMKIF_HWRENDERCONTEXT.ui32Num3DContextStores)], drc0;
wdf drc0;
mov r18, #1;
iaddu32 r17, r18.low, r17;
MK_MEM_ACCESS_BPCACHE(stad) [r16, #DOFFSET(SGXMKIF_HWRENDERCONTEXT.ui32Num3DContextStores)], r17;
idf drc0, st;
wdf drc0;
#endif
/* Setup the buffers to be used during the context store */
mov r17, #OFFSET(SGXMKIF_HWRENDERCONTEXT.sZLSCtxSwitchBaseDevAddr);
iaddu32 r17, r17.low, r16;
COPYMEMTOCONFIGREGISTER_3D(S3DCS_ZBase, EUR_CR_ISP_CONTEXT_SWITCH, r17, r18, r19, r20);
/* We know that there is only 1 PDS */
mov r17, #OFFSET(SGXMKIF_HWRENDERCONTEXT.asPDSStateBaseDevAddr);
iaddu32 r16, r17.low, r16;
COPYMEMTOCONFIGREGISTER_3D(S3DCS_PDSBase, EUR_CR_PDS_CONTEXT_STORE, r16, r17, r18, r19);
#if defined(SGX_FEATURE_MP)
/* Enabled Tile mode context switching */
mov r16, #(SGX_MP_CORE_SELECT(EUR_CR_PDS_CONTEXT_STORE, 0) >> 2);
MK_LOAD_STATE_CORE_COUNT_3D(r17, drc0);
MK_WAIT_FOR_STATE_LOAD(drc0);
S3DCS_SetTileMode:
{
/* Modify the PDS setup so we context switch on a tile granularity */
ldr r18, r16, drc0;
wdf drc0;
or r18, r18, #(EUR_CR_PDS_CONTEXT_STORE_TILE_ONLY_MASK | \
EUR_CR_PDS_CONTEXT_STORE_DISABLE_MASK);
str r16, r18;
isub16.testz r17, p0, r17, #1;
p0 ba S3DCS_SetTileModeDone;
{
mov r18, #(SGX_REG_BANK_SIZE >> 2);
iaddu32 r16, r18.low, r16;
ba S3DCS_SetTileMode;
}
}
S3DCS_SetTileModeDone:
/* configure the 3D to context switch on a tile granularity */
ldr r16, #EUR_CR_ISP_IPFMISC >> 2, drc0;
wdf drc0;
or r16, r16, #EUR_CR_ISP_IPFMISC_CONTEXT_STORE_TILE_ONLY_MASK;
str #EUR_CR_ISP_IPFMISC >> 2, r16;
#else
/* TODO: Fix me! Need to do somthing here for non-mp cores! */
#endif
#if defined(FIX_HW_BRN_31930)
/* Clear potential 3D lockup bit */
ldr r16, #EUR_CR_EVENT_HOST_CLEAR2 >> 2, drc0;
wdf drc0;
and r16, r16, ~#EUR_CR_EVENT_HOST_CLEAR2_TRIG_3D_MASK;
str #EUR_CR_EVENT_HOST_CLEAR2 >> 2, r16;
#endif
#else
MK_MEM_ACCESS(ldad) r18, [r16, #DOFFSET(SGXMKIF_HWRENDERCONTEXT.sZLSCtxSwitchBaseDevAddr)], drc0;
wdf drc0;
/* Setup the registers to store out the state */
str #EUR_CR_ISP2_CONTEXT_SWITCH >> 2, r18;
/* Now setup the PDS state store address */
MK_MEM_ACCESS(ldad) r18, [r16, #DOFFSET(SGXMKIF_HWRENDERCONTEXT.asPDSStateBaseDevAddr[0][0])], drc0;
wdf drc0;
str #EUR_CR_PDS0_CONTEXT_STORE >> 2, r18;
#if defined(EUR_CR_PDS1_CONTEXT_STORE)
MK_MEM_ACCESS(ldad) r18, [r16, #DOFFSET(SGXMKIF_HWRENDERCONTEXT.asPDSStateBaseDevAddr[0][1])], drc0;
wdf drc0;
str #EUR_CR_PDS1_CONTEXT_STORE >> 2, r18;
#endif
#endif
#if defined(SGX_FEATURE_FAST_RENDER_CONTEXT_SWITCH)
ba S3DCS_SetupComplete;
}
S3DCS_FastRender:
{
/* Setup the registers to store out the state */
str #EUR_CR_ISP2_CONTEXT_SWITCH >> 2, #0;
/* Wait for the transfer context to load */
MK_WAIT_FOR_STATE_LOAD(drc0);
#if defined(SGX_FEATURE_MP)
/* Setup the buffers to be used during the context store */
/* We know that there is only 1 PDS */
mov r17, #OFFSET(SGXMKIF_HWTRANSFERCONTEXT.asPDSStateBaseDevAddr);
iaddu32 r16, r17.low, r16;
COPYMEMTOCONFIGREGISTER_3D(S3DCS_PDSBase, EUR_CR_PDS_CONTEXT_STORE, r16, r17, r18, r19);
#else
MK_MEM_ACCESS(ldad) r18, [r16, #DOFFSET(SGXMKIF_HWTRANSFERCONTEXT.asPDSStateBaseDevAddr[0][0])], drc0;
wdf drc0;
str #EUR_CR_PDS0_CONTEXT_STORE >> 2, r18;
#if defined(EUR_CR_PDS1_CONTEXT_STORE)
MK_MEM_ACCESS(ldad) r18, [r16, #DOFFSET(SGXMKIF_HWTRANSFERCONTEXT.asPDSStateBaseDevAddr[0][1])], drc0;
wdf drc0;
str #EUR_CR_PDS1_CONTEXT_STORE >> 2, r18;
#endif
#endif
}
S3DCS_SetupComplete:
#endif /* SGX_FEATURE_FAST_RENDER_CONTEXT_SWITCH */
str #EUR_CR_ISP_3DCONTEXT >> 2, #1;
/* return */
lapc;
}
#endif
/*
FIXME: the following routine does not follow the guidelines for sgx_utils.asm
with respect to temporary register usage, etc.
*/
/*****************************************************************************
FreeContextMemory routine - performs the minimum that is required to free
parameter memory associated with a scene
inputs: r0 - SGXMKIF_HWRENDERCONTEXT of scene to free
R_RTData - SGXMKIF_HWRTDATA for TA command
temps: r2, r3, r4, r5
*****************************************************************************/
.export FreeContextMemory;
FreeContextMemory:
{
MK_TRACE(MKTC_FCM_START, MKTF_SCH);
/*
We need to make sure we maintain the state of any context currently
loaded on the TA if it is different
*/
MK_MEM_ACCESS_BPCACHE(ldad) r2, [R_TA3DCtl, #DOFFSET(SGXMK_TA3D_CTL.sTARTData)], drc0;
wdf drc0;
and.testz p0, r2, r2;
!p0 xor.testz p0, r2, R_RTData;
p0 ba FCM_NoTAContextStore;
{
/* There is a different context loaded in progress, therefore store it out */
MK_MEM_ACCESS_BPCACHE(stad) [R_TA3DCtl, #DOFFSET(SGXMK_TA3D_CTL.sTARTData)], #0;
MK_MEM_ACCESS_BPCACHE(stad) [R_TA3DCtl, #DOFFSET(SGXMK_TA3D_CTL.sTARenderContext)], #0;
MK_MEM_ACCESS_BPCACHE(stad) [R_TA3DCtl, #DOFFSET(SGXMK_TA3D_CTL.sTARenderDetails)], #0;
/* Mark this context as 'free' */
ldr r3, #EUR_CR_DPM_STATE_CONTEXT_ID >> 2, drc0;
wdf drc0;
and r3, r3, #EUR_CR_DPM_STATE_CONTEXT_ID_ALLOC_MASK;
shr r4, r3, #EUR_CR_DPM_STATE_CONTEXT_ID_ALLOC_SHIFT;
and.testz p0, r4, r4;
p0 MK_MEM_ACCESS_BPCACHE(stad) [R_TA3DCtl, #DOFFSET(SGXMK_TA3D_CTL.sContext0RTData)], #0;
!p0 MK_MEM_ACCESS_BPCACHE(stad) [R_TA3DCtl, #DOFFSET(SGXMK_TA3D_CTL.sContext1RTData)], #0;
idf drc0, st;
/* find out the RenderContext of the RTDATA */
MK_MEM_ACCESS(ldad) r3, [r2, #DOFFSET(SGXMKIF_HWRTDATA.sHWRenderContextDevAddr)], drc0;
wdf drc0;
/* Set up the TA for the memory context to be stored. */
SETUPDIRLISTBASE(FCM_STAC1, r3, #SETUP_BIF_TA_REQ);
/* Store the DPM state via the TA Index */
STORETACONTEXT(r2, r4);
}
FCM_NoTAContextStore:
/* Decide which context should be used by freed */
MK_MEM_ACCESS_BPCACHE(ldad) r2, [R_TA3DCtl, #DOFFSET(SGXMK_TA3D_CTL.sContext0RTData)], drc0;
MK_MEM_ACCESS_BPCACHE(ldad) r3, [R_TA3DCtl, #DOFFSET(SGXMK_TA3D_CTL.sContext1RTData)], drc1;
mov r4, #0 << EUR_CR_DPM_STATE_CONTEXT_ID_ALLOC_SHIFT;
wdf drc0;
wdf drc1;
xor.testz p0, R_RTData, r2;
p0 ba FCM_ContextChosen;
{
xor.testz p0, R_RTData, r3;
p0 mov r4, #1 << EUR_CR_DPM_STATE_CONTEXT_ID_ALLOC_SHIFT;
p0 ba FCM_ContextChosen;
{
and.testz p0, r2, r2;
p0 ba FCM_ContextChosen;
{
and.testz p0, r3, r3;
p0 mov r4, #1 << EUR_CR_DPM_STATE_CONTEXT_ID_ALLOC_SHIFT;
p0 ba FCM_ContextChosen;
{
/* Choose the context not being used by 3D */
ldr r4, #EUR_CR_DPM_STATE_CONTEXT_ID >> 2, drc0;
wdf drc0;
and r4, r4, #EUR_CR_DPM_STATE_CONTEXT_ID_DALLOC_MASK;
shr r4, r4, #EUR_CR_DPM_STATE_CONTEXT_ID_DALLOC_SHIFT;
xor r4, r4, #1;
shl r4, r4, #EUR_CR_DPM_STATE_CONTEXT_ID_ALLOC_SHIFT;
}
}
}
}
FCM_ContextChosen:
MK_MEM_ACCESS_BPCACHE(ldad) r5, [R_TA3DCtl, #DOFFSET(SGXMK_TA3D_CTL.sTARTData)], drc0;
wdf drc0;
xor.testz p0, r5, R_RTData;
p0 MK_MEM_ACCESS_BPCACHE(stad) [R_TA3DCtl, #DOFFSET(SGXMK_TA3D_CTL.sTARTData)], #0;
/* Mark the context as freed */
and.testz p0, r4, r4;
p0 MK_MEM_ACCESS_BPCACHE(stad) [R_TA3DCtl, #DOFFSET(SGXMK_TA3D_CTL.sContext0RTData)], #0;
!p0 mov r2, r3;
!p0 MK_MEM_ACCESS_BPCACHE(stad) [R_TA3DCtl, #DOFFSET(SGXMK_TA3D_CTL.sContext1RTData)], #0;
/* Set the context alloc ID */
ldr r5, #EUR_CR_DPM_STATE_CONTEXT_ID >> 2, drc0;
wdf drc0;
#if defined(EUR_CR_DPM_STATE_CONTEXT_ID_NCOP_MASK)
and r5, r5, ~#EUR_CR_DPM_STATE_CONTEXT_ID_ALLOC_MASK;
or r5, r5, #EUR_CR_DPM_STATE_CONTEXT_ID_NCOP_MASK;
#else
and r5, r5, ~#EUR_CR_DPM_STATE_CONTEXT_ID_ALLOC_MASK;
#endif
or r5, r5, r4;
str #EUR_CR_DPM_STATE_CONTEXT_ID >> 2, r5;
/* Convert context alloc ID to load/store ID as this is all that is required from now on */
shr r4, r4, #EUR_CR_DPM_STATE_CONTEXT_ID_ALLOC_SHIFT;
/* If there's something using the chosen context we need to store it first */
and.testz p0, r2, r2;
!p0 xor.testz p0, r2, R_RTData;
p0 ba FCM_NoContextStore;
{
/* find out the RenderContext of the RTDATA */
MK_MEM_ACCESS(ldad) r3, [r2, #DOFFSET(SGXMKIF_HWRTDATA.sHWRenderContextDevAddr)], drc0;
wdf drc0;
/* Set up the TA for the memory context to be stored. */
SETUPDIRLISTBASE(FCM_STAC2, r3, #SETUP_BIF_TA_REQ);
/* Store the DPM state via the TA Index */
STORETACONTEXT(r2, r4);
}
FCM_NoContextStore:
/* Set up the TA for the memory context of this kick. */
SETUPDIRLISTBASE(FCM, r0, #SETUP_BIF_TA_REQ);
xor.testz p0, r2, R_RTData;
p0 ba FCM_NoStateLoad;
{
/* The State needs to be loaded */
/* Set the context LS ID */
ldr r5, #EUR_CR_DPM_STATE_CONTEXT_ID >> 2, drc0;
wdf drc0;
and r5, r5, ~#EUR_CR_DPM_STATE_CONTEXT_ID_LS_MASK;
or r5, r5, r4;
str #EUR_CR_DPM_STATE_CONTEXT_ID >> 2, r5;
#if defined(SGX_FEATURE_MULTIPLE_MEM_CONTEXTS)
/* Set DPM BIF indicator bit for TA */
ldr r5, #EUR_CR_BIF_BANK_SET >> 2, drc0;
wdf drc0;
and r5, r5, ~#USE_DPM_3D_TA_INDICATOR_MASK; // clear bit 9 of the register
str #EUR_CR_BIF_BANK_SET >> 2, r5;
#endif
/* Setup the DPM state table base */
MK_MEM_ACCESS(ldad) r3, [R_RTData, #DOFFSET(SGXMKIF_HWRTDATA.sContextStateDevAddr)], drc0;
wdf drc0;
SETUPSTATETABLEBASE(FCM, p0, r3, r4);
PVRSRV_SGXUTILS_CALL(DPMStateLoad);
}
FCM_NoStateLoad:
/* get the current TA HWPBDesc */
MK_MEM_ACCESS_BPCACHE(ldad) r2, [R_TA3DCtl, #DOFFSET(SGXMK_TA3D_CTL.sTAHWPBDesc.uiAddr)], drc0;
/* get the new TA HWPBDesc */
MK_MEM_ACCESS(ldad) r3, [r0, #DOFFSET(SGXMKIF_HWRENDERCONTEXT.sHWPBDescDevVAddr.uiAddr)], drc0;
/* get the current 3D HWPBDesc */
MK_MEM_ACCESS_BPCACHE(ldad) r4, [R_TA3DCtl, #DOFFSET(SGXMK_TA3D_CTL.s3DHWPBDesc.uiAddr)], drc0;
wdf drc0;
/* if the RC PB matches both current TA and 3D.
Just do the free as everything is setup ready to use */
xor.testz p0, r2, r4;
p0 xor.testz p0, r2, r3;
p0 ba FCM_StartFreeContextNow;
xor.testz p0, r4, #0;
/* NOTE: Only actually need to store/IDLE 3D if ( (3D != NewPB) || ((3D == New) && (TA != New)) ) */
p0 ba FCM_3DIdleNotRequired;
{
mov r16, #USE_IDLECORE_3D_REQ;
PVRSRV_SGXUTILS_CALL(IdleCore);
/* If different store is required to load-back, if same
store is required to loadtapb. */
STORE3DPB();
}
FCM_3DIdleNotRequired:
/* if Current PB == New PB then no store or load required */
xor.testz p0, r2, r3;
p0 ba FCM_NoPBLoad;
{
/* if Current PB == NULL then no store required */
and.testz p0, r2, r2;
p0 ba FCM_NoPBStore;
{
#if defined(SGX_FEATURE_MULTIPLE_MEM_CONTEXTS) && !defined(FIX_HW_BRN_25910)
/* if Current PB == 3D PB then no store required */
xor.testz p0, r2, r4;
p0 ba FCM_NoPBStore;
#endif
{
/* PB Store: No idle required as we know the PB is not in use */
STORETAPB();
}
}
FCM_NoPBStore:
/* PB Load: */
#if defined(FIX_HW_BRN_32302) || defined(SUPPORT_SGX_DOUBLE_PIXEL_PARTITIONS)
mov r5, #USE_FALSE;
LOADTAPB(r3, r5);
#else
LOADTAPB(r3);
#endif
/* As we have just loaded the TAPB there is no need to store it before 3D load */
ba FCM_NoTAStoreRequired;
}
FCM_NoPBLoad:
STORETAPB();
FCM_NoTAStoreRequired:
/* if the RC PB matches the current 3DPB no load is required, as TA and 3D are already sync'd */
xor.testz p0, r3, r4;
p0 ba FCM_StartFreeContextNow;
/* Load3D PB required to set context-pb base correctly */
LOAD3DPB(r3);
FCM_StartFreeContextNow:
#if defined(FIX_HW_BRN_34264)
ldr r5, #EUR_CR_BIF_BANK0 >> 2, drc0;
wdf drc0;
/* Store BIF_BANK0 in r16 to restore it later */
mov r16, r5;
/* Get the TA Dirlist-Index */
and r17, r5, #EUR_CR_BIF_BANK0_INDEX_TA_MASK;
/* Clear the 3D Dirlist-Index */
and r5, r5, #(~EUR_CR_BIF_BANK0_INDEX_3D_MASK);
/* Shift the TA index into the 3D index position */
shl r17, r17, #(EUR_CR_BIF_BANK0_INDEX_3D_SHIFT - EUR_CR_BIF_BANK0_INDEX_TA_SHIFT);
or r5, r5, r17;
SGXMK_SPRV_WRITE_REG(#EUR_CR_BIF_BANK0 >> 2, r5);
/* r16 is lost if any utils calls is made
Allthough there is none, using r5 for safety of compatibility
with future code changes.
, so store in r5 */
mov r5, r16;
#endif
/* Scene has been marked for freeing, so free the pages allocated */
str #EUR_CR_DPM_FREE_CONTEXT >> 2, #EUR_CR_DPM_FREE_CONTEXT_NOW_MASK;
/* Make sure we clear the TPC */
mov r3, #EUR_CR_TE_TPCCONTROL_CLEAR_MASK;
str #EUR_CR_TE_TPCCONTROL >> 2, r3;
/* Wait for the memory to be freed */
mov r3, #EUR_CR_EVENT_STATUS_DPM_TA_MEM_FREE_MASK | EUR_CR_EVENT_STATUS_TPC_CLEAR_MASK;
ENTER_UNMATCHABLE_BLOCK;
FCM_WaitForTAMemFree:
{
ldr r2, #EUR_CR_EVENT_STATUS >> 2, drc0;
wdf drc0;
and r2, r2, r3;
xor.testnz p0, r2, r3;
p0 ba FCM_WaitForTAMemFree;
}
LEAVE_UNMATCHABLE_BLOCK;
/* Clear the event status. */
mov r3, #EUR_CR_EVENT_HOST_CLEAR_DPM_TA_MEM_FREE_MASK | EUR_CR_EVENT_HOST_CLEAR_TPC_CLEAR_MASK;
str #EUR_CR_EVENT_HOST_CLEAR >> 2, r3;
#if defined(FIX_HW_BRN_34264)
SGXMK_SPRV_WRITE_REG(#EUR_CR_BIF_BANK0 >> 2, r5);
#endif
xor.testz p0, r4, #0;
p0 ba FCM_3DResumeNotRequired;
{
/* Dont reload the 3DPB if the original matches the one used for free, just do the resume */
MK_MEM_ACCESS(ldad) r3, [r0, #DOFFSET(SGXMKIF_HWRENDERCONTEXT.sHWPBDescDevVAddr.uiAddr)], drc0;
wdf drc0;
xor.testz p0, r3, r4;
p0 ba FCM_No3DLoadRequired;
STORE3DPB();
LOAD3DPB(r4);
FCM_No3DLoadRequired:
RESUME(r4);
}
FCM_3DResumeNotRequired:
#if defined(SGX_FEATURE_MULTIPLE_MEM_CONTEXTS) && defined(FIX_HW_BRN_23410)
/* Make sure the TA is always pointing at a valid address space. */
ldr r4, #EUR_CR_BIF_BANK0 >> 2, drc1;
mov r3, #SGX_BIF_DIR_LIST_INDEX_EDM;
shl r3, r3, #EUR_CR_BIF_BANK0_INDEX_TA_SHIFT;
wdf drc1;
and r4, r4, #~(EUR_CR_BIF_BANK0_INDEX_TA_MASK);
or r4, r4, r3;
SGXMK_SPRV_UTILS_WRITE_REG(#EUR_CR_BIF_BANK0 >> 2, r4);
#endif /* defined(SGX_FEATURE_MULTIPLE_MEM_CONTEXTS) */
MK_TRACE(MKTC_FCM_END, MKTF_SCH);
/* return */
lapc;
}
/*****************************************************************************
MoveSceneToCompleteList routine - moves a completed partial scene to the
render context complete list and adds the
rendercontext to the CompleteRenderContext list
if required.
inputs: r16 - SGXMKIF_HWRENDERCONTEXT
r17 - SGXMKIF_HWRENDERDETAILS
temps: r18, r19, r20
*****************************************************************************/
.export MoveSceneToCompleteList;
MoveSceneToCompleteList:
{
/* remove it from the partial render list */
MK_MEM_ACCESS(ldad) r18, [r17, #DOFFSET(SGXMKIF_HWRENDERDETAILS.sPrevDevAddr)], drc0;
MK_MEM_ACCESS(ldad) r19, [r17, #DOFFSET(SGXMKIF_HWRENDERDETAILS.sNextDevAddr)], drc1;
wdf drc0;
and.testnz p2, r18, r18;
wdf drc1;
p2 ba MSCL_NotPartialHead;
{
MK_MEM_ACCESS(stad) [r16, #DOFFSET(SGXMKIF_HWRENDERCONTEXT.sHWPartialRendersHead)], r19;
ba MSCL_PartialHeadModified;
}
MSCL_NotPartialHead:
{
MK_MEM_ACCESS(stad) [r18, #DOFFSET(SGXMKIF_HWRENDERDETAILS.sNextDevAddr)], r19;
}
MSCL_PartialHeadModified:
and.testnz p2, r19, r19;
p2 ba MSCL_NotPartialTail;
{
MK_MEM_ACCESS(stad) [r16, #DOFFSET(SGXMKIF_HWRENDERCONTEXT.sHWPartialRendersTail)], r18;
ba MSCL_PartialTailModified;
}
MSCL_NotPartialTail:
{
MK_MEM_ACCESS(stad) [r19, #DOFFSET(SGXMKIF_HWRENDERDETAILS.sPrevDevAddr)], r18;
}
MSCL_PartialTailModified:
/*
No need to wait for stores to complete as these write do not affect insertion
about to insert into complete list so no need to set Next and Prev to 0
*/
/* Add the render to the tail of the context's complete render list */
MK_MEM_ACCESS(ldad) r18, [r16, #DOFFSET(SGXMKIF_HWRENDERCONTEXT.sHWCompleteRendersHead)], drc0;
MK_MEM_ACCESS(ldad) r19, [r16, #DOFFSET(SGXMKIF_HWRENDERCONTEXT.sHWCompleteRendersTail)], drc0;
wdf drc0;
and.testnz p2, r18, r18;
p2 ba MSCL_CompleteListNotEmpty;
{
/* Add to the Head */
MK_MEM_ACCESS(stad) [r16, #DOFFSET(SGXMKIF_HWRENDERCONTEXT.sHWCompleteRendersHead)], r17;
ba MSCL_CompleteHeadModified;
}
MSCL_CompleteListNotEmpty:
{
/* Link to current Tail */
MK_MEM_ACCESS(stad) [r19, #DOFFSET(SGXMKIF_HWRENDERDETAILS.sNextDevAddr)], r17;
}
MSCL_CompleteHeadModified:
MK_MEM_ACCESS(stad) [r16, #DOFFSET(SGXMKIF_HWRENDERCONTEXT.sHWCompleteRendersTail)], r17;
MK_MEM_ACCESS(stad) [r17, #DOFFSET(SGXMKIF_HWRENDERDETAILS.sPrevDevAddr)], r19;
MK_MEM_ACCESS(stad) [r17, #DOFFSET(SGXMKIF_HWRENDERDETAILS.sNextDevAddr)], #0;
idf drc0, st;
wdf drc0;
/* If it already has render on the complete list, then don't add the current context to the tail of the complete render contexts list */
p2 ba MSCL_CompleteListUpdated;
{
/* The sHWCompleteRendersHead must have been empty so add the context to the complete list */
MK_MEM_ACCESS(ldad) r17, [r16, #DOFFSET(SGXMKIF_HWRENDERCONTEXT.sCommon.ui32Priority)], drc0;
wdf drc0;
/* Get the Head and Tails */
MK_LOAD_STATE_INDEXED(r20, sCompleteRenderContextHead, r17, drc0, r18);
MK_LOAD_STATE_INDEXED(r21, sCompleteRenderContextTail, r17, drc0, r19);
MK_WAIT_FOR_STATE_LOAD(drc0);
and.testnz p2, r20, r20;
p2 ba MSCL_ContextListNotEmpty;
{
/* Update the Head */
MK_STORE_STATE_INDEXED(sCompleteRenderContextHead, r17, r16, r18);
ba MSCL_ContextListHeadModified;
}
MSCL_ContextListNotEmpty:
{
/* Link the old tail to the context */
MK_MEM_ACCESS(stad) [r21, #DOFFSET(SGXMKIF_HWRENDERCONTEXT.sNextCompleteDevAddr)], r16;
}
MSCL_ContextListHeadModified:
/* Update the Tail */
MK_STORE_STATE_INDEXED(sCompleteRenderContextTail, r17, r16, r19);
MK_MEM_ACCESS(stad) [r16, #DOFFSET(SGXMKIF_HWRENDERCONTEXT.sPrevCompleteDevAddr)], r21;
idf drc0, st;
wdf drc0;
}
MSCL_CompleteListUpdated:
/* return */
lapc;
}
/*****************************************************************************
CommonProgramEnd routine - This does all the task required before ending a
task
inputs: r16 - Non-zero to flush SLC (where applicable)
temps: r18, r19
*****************************************************************************/
.export CommonProgramEnd;
CommonProgramEnd:
{
#if defined(SGX_FEATURE_WRITEBACK_DCU)
#if defined(FIX_HW_BRN_31939)
/*
* Write a unique value through the DCU before executing the cfi, then read
* it back from memory after the cfi. If the value read is incorrect, the
* cfi was lost due to BRN31939, so retry.
*/
CPE_CFI_retry:
MK_LOAD_STATE(r18, ui32BRN31939SA, drc0);
REG_INCREMENT(r18, p0);
MK_STORE_STATE(ui32BRN31939SA, r18);
stad [R_HostCtl, #DOFFSET(SGXMKIF_HOST_CTL.ui32BRN31939Mem)], r18;
idf drc0, st;
wdf drc0;
#endif /* FIX_HW_BRN_31939 */
/* Flush all write to memory before exiting */
cfi.global #SGX545_USE_OTHER2_CFI_DATAMASTER_EVENT, #0, #SGX545_USE1_OTHER2_CFI_LEVEL_L0L1L2;
#if defined(FIX_HW_BRN_31939)
ldad.bpcache r19, [R_HostCtl, #DOFFSET(SGXMKIF_HOST_CTL.ui32BRN31939Mem)], drc0;
wdf drc0;
xor.testz p0, r18, r19;
!p0 ba CPE_CFI_retry;
#endif /* FIX_HW_BRN_31939 */
#endif
#if defined(SGX_FEATURE_MP)
/*
Write-back SLC - flush if requested by caller.
*/
and.testz p0, r16, r16;
p0 ba CPE_NoSLCFlush;
{
FLUSH_SYSTEM_CACHE_INLINE(p0, r16, #EUR_CR_MASTER_SLC_CTRL_FLUSH_ALL_MASK, r17, CPE);
}
CPE_NoSLCFlush:
#endif /* SGX_FEATURE_MP */
/* Ensure all writes to memory complete */
#if defined(DEBUG)
MK_MEM_ACCESS_BPCACHE(ldad) r18, [R_TA3DCtl, #DOFFSET(SGXMK_TA3D_CTL.ui32IdleCoreRefCount)], drc0;
wdf drc0;
xor.testz p0, r18, #0;
p0 ba CPE_RefCountOK;
{
MK_ASSERT_FAIL(MKTC_IDLECORE_REFCOUNT_FAIL);
}
CPE_RefCountOK:
#endif
idf drc0, st;
wdf drc0;
#if !defined(FIX_HW_BRN_29104)
UKERNEL_PROGRAM_PHAS();
#endif
/* return */
nop.end;
}
#if defined(SGX_FEATURE_MK_SUPERVISOR)
/*****************************************************************************
JumpToSupervisor routine - writes.
inputs: r24 - task identifier
r25 - argument 0 for task
r26 - argument 1 for task
temps: r29
- supervisor thread will use r24-27
*****************************************************************************/
.export JumpToSupervisor;
.export SPRVReturn;
JumpToSupervisor:
{
/*
Note:
- we can use PAs, SAs or Temps in 543 for argument passing from
micorkernel to SPRV
- future cores can only use PAs and SAs
- using SAs for this implementation
*/
/* Save args into SAs */
MK_STORE_STATE(ui32SPRVTask, r24);
MK_STORE_STATE(ui32SPRVArg0, r25);
MK_STORE_STATE(ui32SPRVArg1, r26);
MK_WAIT_FOR_STATE_STORE(drc0);
/*
Save state:
*/
/* pclink */
mov r29, pclink;
shl r29, r29, #4;
/* predicates */
p0 or r29, r29, #0x1;
p1 or r29, r29, #0x2;
p2 or r29, r29, #0x4;
p3 or r29, r29, #0x8;
/* transition to supervisor */
sprvv.end;
SPRVReturn: /* return address to patch sprv phas with */
/* re-specify the smlsi on returning from supervisor */
smlsi #0,#0,#0,#1,#0,#0,#0,#0,#0,#0,#0;
/*
Restore state
*/
/* predicates */
and.testnz p0, r29, #0x1;
and.testnz p1, r29, #0x2;
and.testnz p2, r29, #0x4;
and.testnz p3, r29, #0x8;
/* pclink */
shr r29, r29, #4;
mov pclink, r29;
/* return */
lapc;
}
#endif
/*****************************************************************************
STORE_MISC_COUNTER - helper macro for WriteHWPERFCounters.
name - name of counter register to store
*****************************************************************************/
#define STORE_MISC_COUNTER(name) \
mov r20, HSH((name >> 2)); \
iaddu32 r20, r20.low, r19; \
ldr r20, r20, drc0; \
wdf drc0; \
MK_MEM_ACCESS_BPCACHE(stad) [r21, HSH(1)++], r20;
#if defined(SUPPORT_SGX_HWPERF)
/*****************************************************************************
WriteHWPERFEntry - writes a HWPERF CB entry.
inputs: r16.low - Frame number offset in TA3D_CTL
r16.high - PID offset in TA3D_CTL
r17 - HWPERF_TYPE
r18 - RegInfo
r19.low - RTData offset in TA3D_CTL
temps: r20, r21, r30, r31, p2
*****************************************************************************/
.export WriteHWPERFEntry;
WriteHWPERFEntry:
{
/*
* Perf entry address - r21
* writeoffset - r30
* sHWPerfCBDevVAddr - r31
*/
/* Store SGXMKIF_HWPERF_CB in r31. */
MK_MEM_ACCESS_BPCACHE(ldad) r31, [R_TA3DCtl, HSH(DOFFSET(SGXMK_TA3D_CTL.sHWPerfCBDevVAddr))], drc0;
wdf drc0;
/* Read the CB Woff and store in r30. */
MK_MEM_ACCESS_BPCACHE(ldad) r30, [r31, HSH(DOFFSET(SGXMKIF_HWPERF_CB.ui32Woff))], drc0;
wdf drc0;
/* Calculate the address to write the CCB entry and store in r21.*/
mov r20, HSH(SIZEOF(SGXMKIF_HWPERF_CB_ENTRY));
imae r20, r30.low, r20.low, HSH(OFFSET(SGXMKIF_HWPERF_CB.psHWPerfCBData)), u32;
IADD32(r21, r31, r20, r30);
/* load r30 back*/
MK_MEM_ACCESS_BPCACHE(ldad) r30, [r31, HSH(DOFFSET(SGXMKIF_HWPERF_CB.ui32Woff))], drc0;
/* Read the PID, frame number and RTData from TA3D_CTL */
iaddu32 r20, r16.high, R_TA3DCtl;
MK_MEM_ACCESS_BPCACHE(ldad) r20, [r20], drc0;
iaddu32 r16, r16.low, R_TA3DCtl;
MK_MEM_ACCESS_BPCACHE(ldad) r16, [r16], drc0;
iaddu32 r19, r19.low, R_TA3DCtl;
MK_MEM_ACCESS_BPCACHE(ldad) r19, [r19], drc0;
wdf drc0;
/* Store the data we have at the moment, this frees up registers for the next stage. */
MK_MEM_ACCESS_BPCACHE(stad) [r21, HSH(DOFFSET(SGXMKIF_HWPERF_CB_ENTRY.ui32FrameNo))], r16;
MK_MEM_ACCESS_BPCACHE(stad) [r21, HSH(DOFFSET(SGXMKIF_HWPERF_CB_ENTRY.ui32PID))], r20;
MK_MEM_ACCESS_BPCACHE(stad) [r21, HSH(DOFFSET(SGXMKIF_HWPERF_CB_ENTRY.ui32Type))], r17;
MK_MEM_ACCESS_BPCACHE(stad) [r21, HSH(DOFFSET(SGXMKIF_HWPERF_CB_ENTRY.ui32Info))], r18;
MK_MEM_ACCESS_BPCACHE(stad) [r21, HSH(DOFFSET(SGXMKIF_HWPERF_CB_ENTRY.ui32RTData))], r19;
/*
* Load and store the timestamp. We have to use p0 as the macro checks !regP.
* We also don't have any spare registers so we save p0 in the LSB of pointer to the
* HWPERF_CB who's address is 32-bit aligned so we can safely use the LSB
*/
p0 or r31, r31, HSH(0x1);
WRITEHWPERFCB_TIMESTAMP(p0, r21, r16, r17, r18, r19, r20);
and.testnz p0, r31, HSH(0x1);
and r31, r31, HSH(0xfffffffe);
/* Wait for writes to complete */
idf drc0, st;
wdf drc0;
/* Write the current ordinal value to the CCB entry and then increament, mask and store the value for next time */
MK_MEM_ACCESS_BPCACHE(ldad) r16, [r31, HSH(DOFFSET(SGXMKIF_HWPERF_CB.ui32Ordinal))], drc0;
wdf drc0;
mov r17, r16;
REG_INCREMENT(r16, p2);
/* cut down to a 31-bit value, as bit 32 indicates a SW reset */
and r16, r16, HSH(0x7fffffff);
MK_MEM_ACCESS_BPCACHE(stad) [r31, HSH(DOFFSET(SGXMKIF_HWPERF_CB.ui32Ordinal))], r16;
MK_MEM_ACCESS_BPCACHE(stad) [r21, HSH(DOFFSET(SGXMKIF_HWPERF_CB_ENTRY.ui32Ordinal))], r17;
idf drc0, st;
wdf drc0;
/* Move the pointer to the CCB entry to r16 for the next section */
mov r16, r21;
/*
Sample the performance counters:
r17 - Core counter
r18 - Counter offset
r19 - Config register offset
*/
mov r17, #0;
mov r18, #OFFSET(SGXMKIF_HWPERF_CB_ENTRY.ui32Counters[0][0]);
iaddu32 r21, r18.low, r16;
WHWPC_NextCore_Perf:
{
mov r19, #(SGX_MP_CORE_SELECT(EUR_CR_PERF_COUNTER0, 0)) >> 2;
#if defined(SGX_FEATURE_MP)
mov r18, #(SGX_REG_BANK_SIZE >> 2);
imae r19, r17.low, r18.low, r19, u32;
#endif /* SGX_FEATURE_MP */
mov r18, #0;
WHWPC_NextCounter:
{
/* Store the next performance counter. */
ldr r20, r19, drc0;
wdf drc0;
MK_MEM_ACCESS_BPCACHE(stad) [r21, #1++], r20;
/* Move on to next counter. */
REG_INCREMENT(r18, p2);
REG_INCREMENT(r19, p2);
xor.testnz p2, r18, #PVRSRV_SGX_HWPERF_NUM_COUNTERS;
p2 ba WHWPC_NextCounter;
}
/* Move on to next core. */
REG_INCREMENT(r17, p2);
#if defined(SGX_FEATURE_MP)
MK_LOAD_STATE_CORE_COUNT_3D(r19, drc0);
MK_WAIT_FOR_STATE_LOAD(drc0);
#else
mov r19, #1;
#endif
xor.testnz p2, r17, r19;
p2 ba WHWPC_NextCore_Perf;
}
/*
Sample the misc counters:
r17 - Core counter
*/
mov r17, #0;
mov r18, #OFFSET(SGXMKIF_HWPERF_CB_ENTRY.ui32MiscCounters[0][0]);
iaddu32 r21, r18.low, r16;
WHWPC_NextCore_Misc:
{
mov r19, #(SGX_MP_CORE_SELECT(0, 0)) >> 2;
#if defined(SGX_FEATURE_MP)
mov r18, #(SGX_REG_BANK_SIZE >> 2);
imae r19, r17.low, r18.low, r19, u32;
#endif /* SGX_FEATURE_MP */
/*
Note: the value of PVRSRV_SGX_HWPERF_NUM_MISC_COUNTERS must be
synchronised with the following list.
*/
STORE_MISC_COUNTER(EUR_CR_EMU_TA_PHASE);
STORE_MISC_COUNTER(EUR_CR_EMU_3D_PHASE);
STORE_MISC_COUNTER(EUR_CR_EMU_TA_CYCLE);
STORE_MISC_COUNTER(EUR_CR_EMU_3D_CYCLE);
STORE_MISC_COUNTER(EUR_CR_EMU_TA_OR_3D_CYCLE);
STORE_MISC_COUNTER(EUR_CR_EMU_MEM_READ);
STORE_MISC_COUNTER(EUR_CR_EMU_MEM_WRITE);
STORE_MISC_COUNTER(EUR_CR_EMU_MEM_BYTE_WRITE);
#if defined(SGX_FEATURE_EXTENDED_PERF_COUNTERS)
STORE_MISC_COUNTER(EUR_CR_EMU_INITIAL_TA_CYCLE);
STORE_MISC_COUNTER(EUR_CR_EMU_FINAL_3D_CYCLE);
STORE_MISC_COUNTER(EUR_CR_EMU_MEM_STALL);
#endif /* SGX_FEATURE_EXTENDED_PERF_COUNTERS */
/* Move on to next core. */
REG_INCREMENT(r17, p2);
#if defined(SGX_FEATURE_MP)
MK_LOAD_STATE_CORE_COUNT_3D(r19, drc0);
MK_WAIT_FOR_STATE_LOAD(drc0);
#else
mov r19, #1;
#endif
xor.testnz p2, r17, r19;
p2 ba WHWPC_NextCore_Misc;
}
/* Decide whether the HW Perf CB is full or not. */
MK_MEM_ACCESS_BPCACHE(ldad) r16, [r31, HSH(DOFFSET(SGXMKIF_HWPERF_CB.ui32Roff))], drc0;
iaddu32 r30, r30.low, HSH(1);
and r30, r30, HSH(SGXMKIF_HWPERF_CB_SIZE-1);
wdf drc0;
xor.testnz p2, r16, r30; /* p2 != CB is full (1 space left for invalid) */
/* Increment the Woff - AFTER the packet data is written. */
p2 MK_MEM_ACCESS_BPCACHE(stad) [r31, HSH(DOFFSET(SGXMKIF_HWPERF_CB.ui32Woff))], r30;
/* issue & wait for data fence */
idf drc0, st;
wdf drc0;
lapc;
}
#endif
#if defined(FIX_HW_BRN_27311) && !defined(FIX_HW_BRN_23055)
/*****************************************************************************
InitBRN27311StateTable routine - Clear the DPM state table and Set the
ZLS count fields to (MaxPBSize - PBSize).
To guarantee different MTs are partially
rendered if we hit SPM.
inputs: r16 - SGXMKIF_HWRTDATA
r17 - SGXMKIF_HWPBDESC
temps: r18, r19
*****************************************************************************/
.export InitBRN27311StateTable;
InitBRN27311StateTable:
{
/* Calculate the value to be used for the ZLSCount */
MK_MEM_ACCESS(ldad) r17, [r17, #DOFFSET(SGXMKIF_HWPBDESC.ui32NumPages)], drc0;
wdf drc0;
mov r18, #(EURASIA_PARAMETER_BUFFER_SIZE_IN_PAGES - 1);
isub16 r17, r18, r17;
shl r17, r17, #EURASIA_PARAM_DPM_STATE_MT_ZLSCOUNT_SHIFT;
and r17, r17, ~#EURASIA_PARAM_DPM_STATE_MT_ZLSCOUNT_CLRMSK;
MK_MEM_ACCESS(ldaw) r18, [r16, #WOFFSET(SGXMKIF_HWRTDATA.ui16NumMTs)], drc0;
MK_MEM_ACCESS(ldad) r19, [r16, #DOFFSET(SGXMKIF_HWRTDATA.sContextStateDevAddr)], drc0;
wdf drc0;
/* Clear the Global list entry */
MK_MEM_ACCESS_BPCACHE(stad) [r19, #32], #0;
MK_MEM_ACCESS_BPCACHE(stad) [r19, #33], #0;
IST_NextMTEntry:
{
/* Clear the first word and set the ZLSCnt in the second */
MK_MEM_ACCESS_BPCACHE(stad) [r19, #1++], #0;
MK_MEM_ACCESS_BPCACHE(stad) [r19, #1++], r17;
isub16.testnz r18, p2, r18, #1;
p2 ba IST_NextMTEntry;
}
MK_MEM_ACCESS(staw) [r16, #WOFFSET(SGXMKIF_HWRTDATA.ui16SPMRenderMask)], #0;
idf drc0, st;
wdf drc0;
/* return */
lapc;
}
/*****************************************************************************
ResetBRN27311StateTable routine - Set the ZLS count fields in the DPM state
table to (MaxPBSize - PBSize). To guarantee
different MTs are partially rendered if we
hit SPM.
inputs: r16 - SGXMKIF_HWRTDATA
r17 - SGXMKIF_HWPBDESC
temps: r18, r19
*****************************************************************************/
.export ResetBRN27311StateTable;
ResetBRN27311StateTable:
{
/* Calculate the value to be used for the ZLSCount */
MK_MEM_ACCESS(ldad) r17, [r17, #DOFFSET(SGXMKIF_HWPBDESC.ui32NumPages)], drc0;
wdf drc0;
mov r18, #(EURASIA_PARAMETER_BUFFER_SIZE_IN_PAGES - 1);
isub16 r17, r18, r17;
shl r17, r17, #EURASIA_PARAM_DPM_STATE_MT_ZLSCOUNT_SHIFT;
and r17, r17, ~#EURASIA_PARAM_DPM_STATE_MT_ZLSCOUNT_CLRMSK;
MK_MEM_ACCESS(ldaw) r18, [r16, #WOFFSET(SGXMKIF_HWRTDATA.ui16NumMTs)], drc0;
MK_MEM_ACCESS(ldad) r19, [r16, #DOFFSET(SGXMKIF_HWRTDATA.sContextStateDevAddr)], drc0;
wdf drc0;
RST_NextMTEntry:
{
/* Clear the first word and set the ZLSCnt in the second */
MK_MEM_ACCESS_BPCACHE(ldad) r20, [r19, #1], drc0;
wdf drc0;
and r20, r20, #EURASIA_PARAM_DPM_STATE_MT_ZLSCOUNT_CLRMSK;
or r20, r20, r17;
MK_MEM_ACCESS_BPCACHE(stad) [r19, #1], r20;
mov r20, #8;
iaddu32 r19, r20.low, r19;
isub16.testnz r18, p2, r18, #1;
p2 ba RST_NextMTEntry;
}
MK_MEM_ACCESS(staw) [r16, #WOFFSET(SGXMKIF_HWRTDATA.ui16SPMRenderMask)], #0;
idf drc0, st;
wdf drc0;
/* return */
lapc;
}
#endif
#if (defined(FIX_HW_BRN_30089) || defined(FIX_HW_BRN_29504) || defined(FIX_HW_BRN_33753)) && defined(SGX_FEATURE_MP)
/*****************************************************************************
BRN30089AddLastRgn routine - Modify the region headers so there is an
additional "last region" for the render about
to be started.
inputs: r16 - SGXMKIF_HWRTDATA
r17 - Index of macrotile to be rendered
temps: r18, r19, r20, r21, r22, r30
*****************************************************************************/
.export BRN30089AddLastRgn;
BRN30089AddLastRgn:
{
/* Single MT ? */
and.testnz p2, r17, #EUR_CR_DPM_ABORT_STATUS_MTILE_GLOBAL_MASK;
p2 ba ALR_AllMTs;
{
/* load the address of the last rgn LUT*/
MK_MEM_ACCESS(ldad) r18, [r16, #DOFFSET(SGXMKIF_HWRTDATA.sLastRgnLUTDevAddr)], drc0;
wdf drc0;
/* offset the last rgn LUT with the MT idx*/
imae r18, r17.low, #4, r18, u32;
/* load the rgn offset*/
MK_MEM_ACCESS(ldad) r18, [r18], drc1;
/* the base of the rgn arrays */
mov r17, #OFFSET(SGXMKIF_HWRTDATA.sRegionArrayDevAddr);
wdf drc1;
and r18, r18, #~SGXMKIF_HWRTDATA_RGNOFFSET_VALID;
ba ALR_LUTReady;
}
ALR_AllMTs:
{
/* We are rendering all the MTs so use the sLastRegion */
mov r17, #OFFSET(SGXMKIF_HWRTDATA.sLastRegionDevAddr);
mov r18, #0;
}
ALR_LUTReady:
/* get the address to be loaded in the loop*/
iaddu32 r16, r17.low, r16;
/* Setup the address to save the current values */
mov r17, #OFFSET(SGXMK_TA3D_CTL.ui32SavedRgnHeader);
iaddu32 r17, r17.low, R_TA3DCtl;
/* Now move on the other cores */
MK_LOAD_STATE_CORE_COUNT_TA(r19, drc0);
MK_WAIT_FOR_STATE_LOAD(drc0);
ALR_SetNextLastRgn:
{
/* Look up the Last Region DevAddr */
MK_MEM_ACCESS_CACHED(ldad) r20, [r16, #1++], drc0;
wdf drc0;
/* if it's coming from the LUT it's just an offset rather than address*/
IADD32(r20, r20, r18, r21);
#if defined(FIX_HW_BRN_29504) || defined(FIX_HW_BRN_33753)
/* Unset the last region bit, to avoid PT in last region */
MK_MEM_ACCESS_BPCACHE(ldad) r21, [r20, #0], drc0;
wdf drc0;
and r21, r21, ~#((EURASIA_REGIONHEADER0_LASTREGION) | (EURASIA_REGIONHEADER0_LASTINMACROTILE));
MK_MEM_ACCESS_BPCACHE(stad) [r20, #0], r21;
and r22, r21, #~EURASIA_REGIONHEADER0_MACROTILE_CLRMSK; /* save the macrotile number */
#endif
/* Save the next rgn header 0 */
MK_MEM_ACCESS_BPCACHE(ldad) r30, [r20, #3], drc0;
wdf drc0;
MK_MEM_ACCESS_BPCACHE(stad) [r17, #1++], r30;
mov r30, #~(EURASIA_REGIONHEADER0_XPOS_CLRMSK & EURASIA_REGIONHEADER0_YPOS_CLRMSK);
and r21, r21, r30;
xor.testz p0, r21, r30; /* p0 if last tile of maximum render size => tile (0,0) otherwise (1ff,1ff)*/
p0 mov r21, #0;
(!p0) mov r21, r30;
/* Modify the region header */
or r21, r21, #((EURASIA_REGIONHEADER0_LASTREGION) | (EURASIA_REGIONHEADER0_EMPTY));
#if defined(FIX_HW_BRN_29504) || defined(FIX_HW_BRN_33753)
/* Set up the tileX,Y to 0,0; last macrotile bit and macrotile number correctly */
or r21, r21, #((EURASIA_REGIONHEADER0_LASTREGION) | (EURASIA_REGIONHEADER0_EMPTY) | (EURASIA_REGIONHEADER0_LASTINMACROTILE));
or r21, r21, r22; /* set MT number from previous region hdr */
#endif
MK_MEM_ACCESS_BPCACHE(stad) [r20, #3], r21;
#if defined(FIX_HW_BRN_30089)
/* Save the current rgn header 1 */
MK_MEM_ACCESS_BPCACHE(ldad) r21, [r20, #6], drc0;
wdf drc0;
MK_MEM_ACCESS_BPCACHE(stad) [r17, #1++], r21;
/* Modify the region header */
mov r21, #((EURASIA_REGIONHEADER0_LASTREGION) | (EURASIA_REGIONHEADER0_EMPTY));
MK_MEM_ACCESS_BPCACHE(stad) [r20, #6], r21;
/* Save the current rgn header 2 */
MK_MEM_ACCESS_BPCACHE(ldad) r21, [r20, #9], drc0;
wdf drc0;
MK_MEM_ACCESS_BPCACHE(stad) [r17, #1++], r21;
/* Modify the region header */
mov r21, #((EURASIA_REGIONHEADER0_LASTREGION) | (EURASIA_REGIONHEADER0_EMPTY));
MK_MEM_ACCESS_BPCACHE(stad) [r20, #9], r21;
/* Save the current rgn header 3 */
MK_MEM_ACCESS_BPCACHE(ldad) r21, [r20, #12], drc0;
wdf drc0;
MK_MEM_ACCESS_BPCACHE(stad) [r17, #1++], r21;
/* Modify the region header */
mov r21, #((EURASIA_REGIONHEADER0_LASTREGION) | (EURASIA_REGIONHEADER0_EMPTY));
MK_MEM_ACCESS_BPCACHE(stad) [r20, #12], r21;
#endif
/* Check if there are anymore cores to setup */
isub16.testnz r19, p0, r19, #1;
p0 ba ALR_SetNextLastRgn;
}
/* Flush the writes */
idf drc0, st;
wdf drc0;
/* Return */
lapc;
}
/*****************************************************************************
BRN30089RestoreRgnHdr routine - Modify the region headers back to their original
state now that the render has finished.
inputs: r16 - SGXMKIF_HWRTDATA
r17 - Index of macrotile to be rendered
temps: r18, r19, r20, r21
*****************************************************************************/
.export BRN30089RestoreRgnHdr;
BRN30089RestoreRgnHdr:
{
/* Single MT ? */
and.testnz p2, r17, #EUR_CR_DPM_ABORT_STATUS_MTILE_GLOBAL_MASK;
p2 ba RRH_AllMTs;
{
/* load the address of the last rgn LUT*/
MK_MEM_ACCESS(ldad) r18, [r16, #DOFFSET(SGXMKIF_HWRTDATA.sLastRgnLUTDevAddr)], drc0;
wdf drc0;
/* offset the last rgn LUT with the MT idx*/
imae r18, r17.low, #4, r18, u32;
/* load the rgn offset*/
MK_MEM_ACCESS(ldad) r18, [r18], drc1;
/* the base of the rgn arrays */
mov r17, #OFFSET(SGXMKIF_HWRTDATA.sRegionArrayDevAddr);
wdf drc1;
and r18, r18, #~SGXMKIF_HWRTDATA_RGNOFFSET_VALID;
ba RRH_LUTReady;
}
RRH_AllMTs:
{
/* We are rendering all the MTs so use the sLastRegion */
mov r17, #OFFSET(SGXMKIF_HWRTDATA.sLastRegionDevAddr);
mov r18, #0;
}
RRH_LUTReady:
/* get the address to be loaded in the loop*/
iaddu32 r16, r17.low, r16;
/* Setup the address to read back the saved values */
mov r17, #OFFSET(SGXMK_TA3D_CTL.ui32SavedRgnHeader);
iaddu32 r17, r17.low, R_TA3DCtl;
/* Now move on the other cores */
MK_LOAD_STATE_CORE_COUNT_TA(r19, drc0);
MK_WAIT_FOR_STATE_LOAD(drc0);
RRH_SetNextLastRgn:
{
MK_MEM_ACCESS_CACHED(ldad) r20, [r16, #1++], drc0;
wdf drc0;
/* if it's coming from the LUT it's just an offset rather than address*/
IADD32(r20, r20, r18, r21);
/* Retrieve the saved region header value */
MK_MEM_ACCESS_BPCACHE(ldad) r21, [r17, #1++], drc0;
wdf drc0;
/* Restore the region header */
MK_MEM_ACCESS_BPCACHE(stad) [r20, #3], r21;
#if defined(FIX_HW_BRN_30089)
/* Restrieve the saved region header value 1 */
MK_MEM_ACCESS_BPCACHE(ldad) r21, [r17, #1++], drc0;
wdf drc0;
/* Restore the region header */
MK_MEM_ACCESS_BPCACHE(stad) [r20, #6], r21;
/* Restrieve the saved region header value 2 */
MK_MEM_ACCESS_BPCACHE(ldad) r21, [r17, #1++], drc0;
wdf drc0;
/* Restore the region header */
MK_MEM_ACCESS_BPCACHE(stad) [r20, #9], r21;
/* Restrieve the saved region header value 3 */
MK_MEM_ACCESS_BPCACHE(ldad) r21, [r17, #1++], drc0;
wdf drc0;
/* Restore the region header */
MK_MEM_ACCESS_BPCACHE(stad) [r20, #12], r21;
#endif
/* Check if there are anymore cores to setup */
isub16.testnz r19, p2, r19, #1;
p2 ba RRH_SetNextLastRgn;
}
/* Flush the writes */
idf drc0, st;
wdf drc0;
/* Return */
lapc;
}
#endif /* FIX_HW_BRN_30089 || FIX_HW_BRN_29504 || FIX_HW_BRN_33753*/
#if defined(FIX_HW_BRN_32052) && defined(SGX_FEATURE_ISP_CONTEXT_SWITCH_REV_3)
/*****************************************************************************
BRN32052ClearMCIState routine - Clear down outstanding held state in MCI.
temps: r16, r17, r18
*****************************************************************************/
.export BRN32052ClearMCIState;
BRN32052ClearMCIState:
{
/* Mask out interrupt. TODO: may want the interrupt */
/* Set EOR in each core until we receive the MCI event */
MK_LOAD_STATE_CORE_COUNT_3D(r18, drc0);
MK_WAIT_FOR_STATE_LOAD(drc0);
CMS_NextCore:
{
isub32 r18, r18, #1;
mov r16, #EUR_CR_EVENT_STATUS_PIXELBE_END_RENDER_MASK;
WRITECORECONFIG(r18, #EUR_CR_EVENT_STATUS >> 2, r16, r17);
idf drc0, st;
wdf drc0;
READMASTERCONFIG(r16, #EUR_CR_MASTER_EVENT_STATUS >> 2, drc0);
wdf drc0;
shl.tests p0, r16, #(31 - EUR_CR_MASTER_EVENT_STATUS_PIXELBE_END_RENDER_SHIFT);
p0 ba CMS_MCIStateCleared;
/* Check next core */
and.testnz p0, r18, r18;
p0 ba CMS_NextCore;
}
/* If we arrive here sthg is wrong... */
MK_ASSERT_FAIL(MKTC_MCISTATE_NOT_CLEARED);
CMS_MCIStateCleared:
/* Clear master event */
mov r16, #EUR_CR_MASTER_EVENT_HOST_CLEAR_PIXELBE_END_RENDER_MASK;
WRITEMASTERCONFIG(#EUR_CR_MASTER_EVENT_HOST_CLEAR >> 2, r16, r17);
idf drc0, st;
wdf drc0;
/* Unmask interrupt. TODO: may want the interrupt */
/* Return */
lapc;
}
#endif
/*****************************************************************************
End of file (sgx_utils.asm)
*****************************************************************************/
| 31.59639 | 137 | 0.668996 |
476adb1a8046af62199c0145fdb9f5bcf9a34d88 | 3,938 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0xca_notsx.log_21829_1044.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0xca_notsx.log_21829_1044.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0xca_notsx.log_21829_1044.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
ret
.global s_faulty_load
s_faulty_load:
push %r12
push %r13
push %r15
push %rbp
push %rcx
push %rdx
// Load
lea addresses_WT+0x10644, %rcx
nop
nop
xor $62546, %r12
mov (%rcx), %edx
xor $10105, %rbp
// Faulty Load
lea addresses_normal+0x1fabc, %r15
nop
nop
nop
nop
nop
and $52358, %r12
mov (%r15), %rcx
lea oracles, %r12
and $0xff, %rcx
shlq $12, %rcx
mov (%r12,%rcx,1), %rcx
pop %rdx
pop %rcx
pop %rbp
pop %r15
pop %r13
pop %r12
ret
/*
<gen_faulty_load>
[REF]
{'src': {'NT': True, 'AVXalign': False, 'size': 1, 'congruent': 0, 'same': False, 'type': 'addresses_normal'}, 'OP': 'LOAD'}
{'src': {'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 1, 'same': False, 'type': 'addresses_WT'}, 'OP': 'LOAD'}
[Faulty Load]
{'src': {'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 0, 'same': True, 'type': 'addresses_normal'}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'34': 21829}
34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34
*/
| 72.925926 | 2,999 | 0.662011 |
b112222a7eb016120428a02f19448fd6f13b398d | 901 | asm | Assembly | oeis/176/A176345.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/176/A176345.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/176/A176345.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A176345: Sum of gcd(k,n) from k = 1 to n over "regular" integers only (an integer k is regular if there is an x such that k^2 x == k (mod n))
; Submitted by Simon Strandgaard
; 1,3,5,6,9,15,13,12,15,27,21,30,25,39,45,24,33,45,37,54,65,63,45,60,45,75,45,78,57,135,61,48,105,99,117,90,73,111,125,108,81,195,85,126,135,135,93,120,91,135,165,150,105,135,189,156,185,171,117,270,121,183,195,96,225,315,133,198,225,351,141,180,145,219,225,222,273,375,157,216,135,243,165,390,297,255,285,252,177,405,325,270,305,279,333,240,193,273,315,270
add $0,1
mov $1,1
lpb $0
div $2,$1
mov $3,$0
lpb $3
mov $4,$0
mov $6,$2
cmp $6,0
add $2,$6
mod $4,$2
cmp $4,0
cmp $4,0
mov $5,$2
add $2,1
cmp $5,1
max $4,$5
sub $3,$4
lpe
mov $5,1
lpb $0
dif $0,$2
mul $5,$2
lpe
dif $5,$2
mul $1,$5
sub $2,$4
mul $2,2
add $2,1
mul $1,$2
lpe
mov $0,$1
| 24.351351 | 357 | 0.588235 |
f1266af3031c95bda5e9d1c9262841bb7b2deaeb | 2,874 | asm | Assembly | asm/prt.asm | I8087/Pop | ec54c642f59831df07cf35db94fb25079e69f308 | [
"BSD-2-Clause"
] | 1 | 2022-01-24T18:18:57.000Z | 2022-01-24T18:18:57.000Z | asm/prt.asm | I8087/Pop | ec54c642f59831df07cf35db94fb25079e69f308 | [
"BSD-2-Clause"
] | 8 | 2016-04-26T18:44:38.000Z | 2016-07-29T04:00:34.000Z | asm/prt.asm | I8087/Pop | ec54c642f59831df07cf35db94fb25079e69f308 | [
"BSD-2-Clause"
] | null | null | null | ; This is a stub for GoLink.
; Eventually it will contain needed functions.
global __start
global ___exit
global ___malloc
global ___free
global ___strlen
global ___strcpy
global ___strinit
global ___strcat
global ___striter
global ___strindex
extern _main_E@0
extern _ExitProcess@4
extern _malloc@4
extern _free@4
section .text
%include "asm/err.asm"
__start:
call _main_E@0
push eax
call ___exit
___exit:
push ebp
mov ebp, esp
push dword [ebp+8]
call _ExitProcess@4
pop ebp
ret
___free:
push ebp
mov ebp, esp
push dword [ebp+8]
call _free@4
add esp, 4
mov esp, ebp
pop ebp
ret
___striter:
push ebp
mov ebp, esp
sub esp, 12
push dword [ebp+8]
call ___strlen
add esp, 4
mov [ebp-4], eax
mul dword [ebp+12]
inc eax
push eax
call ___malloc
add esp, 4
mov [ebp-8], eax
mov [ebp-12], eax
.loop:
cmp dword [ebp+12], 0
je .done
dec dword [ebp+12]
push dword [ebp+8]
push eax
call ___strcpy
add esp, 8
mov eax, [ebp-8]
add eax, [ebp-4]
mov [ebp-8], eax
jmp .loop
.done:
mov eax, [ebp-12]
mov esp, ebp
pop ebp
ret
___strinit:
push ebp
mov ebp, esp
push dword [ebp+8]
call ___strlen
add esp, 4
inc eax
push eax
call ___malloc
add esp, 4
mov ebx, eax
push dword [ebp+8]
push eax
call ___strcpy
add esp, 8
mov eax, ebx
mov esp, ebp
pop ebp
ret
___strindex:
push ebp
mov ebp, esp
sub esp, 12
mov ebx, [ebp+8]
push ebx
call ___strlen
add esp, 4
cmp eax, dword [ebp+12]
jbe .error
add ebx, [ebp+12]
xor eax, eax
mov al, [ebx]
mov esp, ebp
pop ebp
ret
.error:
call ___IndexError
; In case a failure.
pop ebp
ret
___strcat:
push ebp
mov ebp, esp
sub esp, 8
push dword [ebp+8]
call ___strlen
add esp, 4
mov [ebp-4], eax
push dword [ebp+12]
call ___strlen
add esp, 4
add eax, dword [ebp-4]
inc eax
push eax
call ___malloc
add esp, 4
mov [ebp-8], eax
push dword [ebp+8]
push eax
call ___strcpy
add esp, 8
push dword [ebp+12]
mov eax, [ebp-8]
add eax, [ebp-4]
push eax
call ___strcpy
add esp, 8
mov eax, [ebp-8]
mov esp, ebp
pop ebp
ret
___strcpy:
push ebp
mov ebp, esp
push esi
push edi
mov edi, [ebp+8]
mov esi, [ebp+12]
cld
.loop:
cmp byte [esi], 0x00
je .done
movsb
jmp .loop
.done:
xor eax, eax
mov byte [edi], al
pop edi
pop esi
mov esp, ebp
pop ebp
ret
___strlen:
push ebp
mov ebp, esp
push esi
push edi
mov edi, [ebp+8]
xor ecx, ecx
not ecx
xor ax, ax
repne scasb
not ecx
dec ecx
mov eax, ecx
pop edi
pop esi
mov esp, ebp
pop ebp
ret
___malloc:
push ebp
mov ebp, esp
push dword [ebp+8]
call _malloc@4
add esp, 4
mov esp, ebp
pop ebp
ret | 13.884058 | 46 | 0.614127 |
cc3eba699630fda143855e7cb23d5fa4d20c52ce | 5,272 | asm | Assembly | savefile/main.asm | stranck/fools2018-1 | 1c506b17343fcdfa708aafaf8e596153e2c63254 | [
"MIT"
] | 35 | 2018-04-01T06:55:28.000Z | 2021-05-09T19:09:42.000Z | savefile/main.asm | stranck/fools2018-1 | 1c506b17343fcdfa708aafaf8e596153e2c63254 | [
"MIT"
] | 4 | 2018-04-01T15:32:55.000Z | 2019-02-23T20:46:49.000Z | savefile/main.asm | stranck/fools2018-1 | 1c506b17343fcdfa708aafaf8e596153e2c63254 | [
"MIT"
] | 12 | 2018-04-01T15:48:09.000Z | 2021-01-27T10:22:33.000Z | ; === main.asm
include "includes/symbols.asm"
include "includes/charmap.asm"
include "includes/macros.asm"
include "main_sram2.asm"
include "main_sram3.asm"
include "main_wram.asm"
include "maps/0000_MysteryZone.asm"
include "maps/0110_CentralSquare.asm"
include "maps/0210_NorthernPassage.asm"
include "maps/0327_GlitchedHouse.asm"
include "maps/0364_GlitchedHouse.asm"
include "maps/043A_TooMuchWater.asm"
include "maps/0523_NorthernPassage.asm"
include "maps/0565_GlitchResearchLab.asm"
include "maps/0566_GlitchResearchLab.asm"
include "maps/062F_NorthernRetreat.asm"
include "maps/0667_NorthernRetreat.asm"
include "maps/0667_NorthernRetreat_Fun.asm"
include "maps/0668_NorthernRetreat.asm"
include "maps/0669_NorthernRetreat.asm"
include "maps/066A_GlitchologyMuseum.asm"
include "maps/0734_Crossroads.asm"
include "maps/0824_ShiftingGrove.asm"
include "maps/0932_WorriedExplorer.asm"
include "maps/096B_WorriedExplorer.asm"
include "maps/098A_Underground.asm"
include "maps/0A32_StrangeBush.asm"
include "maps/0B2D_StrangeRock.asm"
include "maps/0C2C_StrangeSign.asm"
include "maps/0D3E_ShimmeringPass.asm"
include "maps/0E3C_TheTrendsetters.asm"
include "maps/0E6C_TheTrendsetters.asm"
include "maps/0F3B_Boardwalk.asm"
include "maps/103B_TheWiseMan.asm"
include "maps/106D_TheWiseMan.asm"
include "maps/113D_TheHarbor.asm"
include "maps/116E_HarborHouse.asm"
include "maps/123D_UnknownHouse.asm"
include "maps/1321_SeaborgiumSea.asm"
include "maps/1337_Mysterious.asm"
include "maps/1432_ShadyMerchant.asm"
include "maps/146F_ShadyMerchant.asm"
include "maps/152D_World4-4.asm"
include "maps/1631_NorthernEncampment.asm"
include "maps/1670_NorthernEncampment.asm"
include "maps/1671_NorthernEncampment.asm"
include "maps/1672_NorthernEncampment.asm"
include "maps/1720_RoadOfUltimate.asm"
include "maps/1730_AlteringCave.asm"
include "maps/1731_AlteringCave.asm"
include "maps/1732_AlteringCave.asm"
include "maps/182A_WhosThatPokemon.asm"
include "maps/1927_NorthernEdge.asm"
include "maps/1A3C_GameCorner.asm"
include "maps/1A73_GameCorner.asm"
include "maps/1B37_WesternPass.asm"
include "maps/1C2C_CrossingField.asm"
include "maps/1D3B_WindyValley.asm"
include "maps/1E33_GuardPost.asm"
include "maps/1E92_TinyCavern.asm"
include "maps/1F3A_Deliria.asm"
include "maps/1F79_Deliria.asm"
include "maps/1F7A_Deliria.asm"
include "maps/202F_DeliriaPond.asm"
include "maps/2125_BikeShop.asm"
include "maps/2174_BikeShop.asm"
include "maps/223A_MansionEntrance.asm"
include "maps/2275_GlitchlandMansion.asm"
include "maps/2276_GlitchlandMansion.asm"
include "maps/2277_GlitchlandMansion.asm"
include "maps/232D_PathOfPointless.asm"
include "maps/232D_PathOfPointless_Fun.asm"
include "maps/2435_DesolatedCabin.asm"
include "maps/2478_DesolatedCabin.asm"
include "maps/2536_CabinFrontyard.asm"
include "maps/2632_LookoutPoint.asm"
include "maps/2725_DarkCave.asm"
include "maps/2731_CaveEntrance.asm"
include "maps/2791_DarkCave.asm"
include "maps/2B29_WesternEncampment.asm"
include "maps/2B7C_WesternEncampment.asm"
include "maps/2B7D_WesternEncampment.asm"
include "maps/2B7E_ExplorerSindicate.asm"
include "maps/2C29_Route13.5.asm"
include "maps/2D27_WesternEdge.asm"
include "maps/2E2B_EasternPass.asm"
include "maps/2F38_EasternEncampment.asm"
include "maps/2F7F_EasternEncampment.asm"
include "maps/2F80_EasternEncampment.asm"
include "maps/2F81_EasternEncampment.asm"
include "maps/2F81_EasternEncampment_Fun.asm"
include "maps/302C_PathOfRecursion.asm"
include "maps/3120_CrackerCavern.asm"
include "maps/318B_CrackerCavernI.asm"
include "maps/318C_CrackerCavernII.asm"
include "maps/318D_CrackerCavernIII.asm"
include "maps/318E_CrackerCavernIV.asm"
include "maps/318F_CrackerCavernV.asm"
include "maps/323F_ObscuredPath.asm"
include "maps/3336_DownhillRoad.asm"
include "maps/3420_TheStoryteller.asm"
include "maps/353C_StandstillPark.asm"
include "maps/3828_CorruptedPlains.asm"
include "maps/3920_EasternAvenue.asm"
include "maps/3A3E_Grasslands.asm"
include "maps/3B22_LostWoods.asm"
include "maps/3B30_LostWoodsSubA.asm"
include "maps/3B31_LostWoodsSubB.asm"
include "maps/3B31_LostWoodsSubB_Fun.asm"
include "maps/3B32_LostWoodsSubC.asm"
include "maps/3C36_EasternEdge.asm"
include "maps/3D20_TheGreatDesigner.asm"
include "maps/3D83_DesignersHouse.asm"
include "maps/3E31_DesignersCreation.asm"
include "maps/3E90_DesignersCave.asm"
include "maps/3F3D_SouthernPass.asm"
include "maps/4026_BrokenBridge.asm"
include "maps/412E_FragrantFields.asm"
include "maps/423A_BridgeOfHopes.asm"
include "maps/432A_TheLibrary.asm"
include "maps/4384_TheLibrary.asm"
include "maps/4528_BinaryWoodsClearing.asm"
include "maps/4530_BinaryWoodsEntrance.asm"
include "maps/4585_BinaryWoods.asm"
include "maps/472B_SouthernEncampment.asm"
include "maps/4786_SouthernEncampment.asm"
include "maps/4787_SouthernEncampment.asm"
include "maps/4788_SouthernEncampment.asm"
include "maps/482B_TrollHeadquarters.asm"
include "maps/4889_TrollHeadquarters.asm"
include "maps/4933_JumpityJump.asm"
include "maps/4A34_YetAnotherRoute.asm"
include "maps/4B3A_HiddenRetreat.asm"
include "maps/4C21_YetAnotherCave.asm"
include "maps/4C93_YetAnotherCave.asm"
include "maps/4D3A_YetAnotherPathway.asm"
include "maps/4E22_YetAnotherSecret.asm"
include "maps/4F21_SouthernEdge.asm"
| 36.867133 | 45 | 0.841047 |
35498f7fd4a2ad329505aca0227a7bedd6afdbf2 | 17,302 | asm | Assembly | src/credit-block-editor.asm | ras88/stereo-editor | 54fa5b4cb5fdfcfb13f7e06f676a73ad5d5f7261 | [
"0BSD"
] | null | null | null | src/credit-block-editor.asm | ras88/stereo-editor | 54fa5b4cb5fdfcfb13f7e06f676a73ad5d5f7261 | [
"0BSD"
] | null | null | null | src/credit-block-editor.asm | ras88/stereo-editor | 54fa5b4cb5fdfcfb13f7e06f676a73ad5d5f7261 | [
"0BSD"
] | 3 | 2021-03-24T15:17:01.000Z | 2021-10-18T02:10:15.000Z | ; -----------------------------------------------------------------------------
; Copyright (c) 1988-2018 Robert A. Stoerrle
;
; Permission to use, copy, modify, and/or distribute this software for any
; purpose with or without fee is hereby granted, provided that the above
; copyright notice and this permission notice appear in all copies.
;
; THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH
; REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
; AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT,
; INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
; LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
; OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
; PERFORMANCE OF THIS SOFTWARE.
; -----------------------------------------------------------------------------
;This source file contains code for the SID Editor's "Credit Block Editor"
;transient application. Transient applications load at $C000. If SID data
;reside that high, they are moved down, overwriting the player module.
;Transient applictions may use only the memory between $C000 and $CFFF, and
;zero page locations 100-131. Return with carry set ONLY if sid file needs
;to be saved after this application.
.org $c000
.obj "008"
;
;Interface storage
;
cred_block = $5800 ;Editor storage of credit block
voice_start = $02
var = $5c00
stereo_mode = var+113
route = var+114
midi_channel = $5a00+98
expand_value = $5a88
;
;NEW Kernal routine equates:
;
setirq = $e000
print = $e003
lprint = $e006
printchar = $e009
printbyte = $e00c
printword = $e00f
select_string = $e012
save_screen = $e015
recall_screen = $e018
getrom = $e01b
clear_screen = $e01e
menudef = $e021
menuset = $e024
select = $e027
select_0 = $e02a
headerdef = $e02d
sizedef = $e030
s_itemx = $e033
s_itemy = $e036
s_itemlen = $e039
s_itemvecl = $e03c
s_itemvech = $e03f
s_itemvarl = $e042
s_itemvarh = $e045
s_itemmin = $e048
s_itemmax = $e04b
s_itemtype = $e04e
read_item = $e051
cursor_on = $e054
cursor_off = $e057
move_up = $e05a
move_down = $e05d
read_prdir = $e060
init_drive = $e063
load_prfile = $e066
preparef = $e069
releasef = $e06c
setlfs = $e06f
setnam = $e072
open = $e075
close = $e078
chkin = $e07b
chkout = $e07e
clrchn = $e081
chrin = $e084
chrout = $e087
getin = $e08a
set_item = $e08d
get_adr = $e090
backspace = $e093
read_err = $e096
read_error = $e099
;
;Zero-page start of storage equate
;
zp = 100 ;Start of zero page storage for this module
;
;Major storage
;
linebuf = $c780
clinebuf = $c7c0
;
;Zero-page pointers
;
ptr = zp ;General-use pointer
aptr = zp+2 ;Current position in ASCII credit block
line = zp+4 ;Screen pointer
cline = zp+6 ;Color pointer
rvs_flag = zp+8 ;128=reverse, 0=normal
color = zp+9 ;Current color (0-15)
xpos = zp+10 ;Cursor X position (0-32)
ypos = zp+11 ;Cursor row (0-4)
under_char = zp+12 ;Character under cursor
under_color = zp+13 ;Color under cursor
flash = zp+14 ;1=flash cursor, 0=don't
count = zp+15 ;Countdown to next cursor flash
cmode = zp+16 ;128=flash on, 0=flash off
ps1 = zp+17 ;Scrolling pointer
ps2 = zp+19 ;Scrolling pointer
pc1 = zp+21 ;Scrolling pointer
pc2 = zp+23 ;Scrolling pointer
mod_flag = zp+25 ;1=modified, 0=not
play_flag = zp+26 ;1=include player in interrupt, 0=don't!
txtptr = $e0 ;Kernal interface variable
colptr = $e2 ;Kernal interface variable
start_m = $e2 ;Start of block to be moved
end_m = $e4 ;End of block
dest_m = $e6 ;Destination address for block
;
;Constants used by Kernal routines
;
screen = $f400
vic = $d000
kernal_in = %00000110
kernal_out = %00000101
eof = 1
def = 2
tab = 3
rvs = 4
rvsoff = 5
defl = 6
defr = 7
clr = 8
fkey = 10
box = 12
xx = 96
col = 176
yy = 224
eot = 255
dispatch = 1
service = 2
numeric = 3
string = 4
null'item = 5
eom = 0
;
;Player interface equates
;
player = $6000
init_play = player
drop_play = player+3
play_inter = player+6
sim_start = player+9
p$status = player+12
p$error = player+13
p$error_voice = player+14
p$address = player+15
p$expand = player+16
p$mode = player+17
p$musicl = player+18
p$musich = player+24
p$enable = player+30
;
;Transient application ID text
;
.asc "sid/app"
.byte 008 ;File number
.word init ;Starting address
return_vec .word $ffff ;Filled in by main program - Return location
;
;Special interrupt routine for cursor flashing
;
inter = *
lda play_flag
beq +
jsr play_inter
+ lda flash
beq end_int
dec count
bne end_int
lda #20
sta count
ldy xpos
lda cmode
eor #128
sta cmode
bmi +
lda under_char
sta (line),y
lda under_color
sta (cline),y
rts
+ lda under_char
eor #128
sta (line),y
lda color
sta (cline),y
end_int rts
;
;Reset pointer to ASCII credit block
;
reset = *
lda #<cred_block
sta aptr
lda #>cred_block
sta aptr+1
rts
;
;Get next byte from ASCII credit block
;
get_byte = *
sty gbr+1
ldy #0
lda (aptr),y
inc aptr
bne gbr
inc aptr+1
gbr ldy #0
ora #0
rts
;
;Send byte to ASCII credit block
;
send_byte = *
sty sbr+1
ldy #0
sta (aptr),y
inc aptr
bne sbr
inc aptr+1
sbr ldy #0
rts
;
;Convert any ASCII code to its corresponding ROM code.
;Return with carry set only if it's non-printable
ascii_to_rom = *
cmp #160
beq sub128
cmp #32
bcc non_printable
cmp #64
bcc sub0
cmp #96
bcc sub64
cmp #128
bcc sub32
cmp #160
bcc non_printable
cmp #192
bcc sub64
cmp #255
bcc sub128
lda #94
clc
rts
sub128 sec
sbc #32
sub96 sec
sbc #32
sub64 sec
sbc #32
sub32 sec
sbc #32
sub0 clc
rts
non_printable = *
sec
rts
;
;Convert ROM to ASCII.
;
rom_to_ascii = *
cmp #32
bcc add64
cmp #64
bcc add0
cmp #96
bcc add128
bcs add64
add128 clc
adc #64
add64 clc
adc #64
add0 rts
;
;Establish cursor at current position.
;
put_cursor = *
jsr calc_line
ldy xpos
lda (cline),y
sta under_color
lda (line),y
sta under_char
eor #128
sta (line),y
lda color
sta (cline),y
lda #20
sta count
sta flash
lda #128
sta cmode
rts
;
;Remove cursor from current position.
;
remove_cursor = *
lda #0
sta flash
ldy xpos
lda under_color
sta (cline),y
lda under_char
sta (line),y
rts
;
;Calculate screen/color addressed based on cursor position
;
calc_line = *
ldx #4
ldy ypos
iny
iny
iny
jsr get_adr
lda colptr
sta cline
lda colptr+1
sta cline+1
lda txtptr
sta line
lda txtptr+1
sta line+1
rts
;
;Table of screen color changing ASCII codes.
;
color_table .byte 144,5,28,159,156,30,31,158,129,149,150,151,152,153,154
.byte 155
;
;----- Main Program -----
;Set up normal character set at $C800
;
init = *
jsr clear_screen
lda #0
sta play_flag
sei
lda 1
and #%11111011
sta 1
lda #0
sta start_m
sta end_m
sta dest_m
lda #$d8
sta end_m+1
lda #$d0
sta start_m+1
lda #$c8
sta dest_m+1
jsr move_down
lda #kernal_out
sta 1
cli
lda #$d2 ;Switch to normal, upper-case character set we just copied
sta 53272
;
;Draw credit block editing screen
;
lda #0
sta mod_flag
lda #6
ldy #0
- sta $d800,y
sta $d900,y
iny
bne -
jsr print
.byte xx+9,yy+0,col+1
.asc "sid credit block editor"
.byte xx+10,yy+11,col+7
.asc "[f1] "
.byte col+11
.asc "- "
.byte col+15
.asc "delete line"
.byte xx+10,yy+12,col+7
.asc "[f2] "
.byte col+11
.asc "- "
.byte col+15
.asc "insert line"
.byte xx+10,yy+13,col+7
.asc "[f3] "
.byte col+11
.asc "- "
.byte col+15
.asc "center line"
.byte xx+10,yy+14,col+7
.asc "[f4] "
.byte col+11
.asc "- "
.byte col+15
.asc "invert line"
.byte xx+10,yy+15,col+7
.asc "[f5] "
.byte col+11
.asc "- "
.byte col+15
.asc "exit"
.byte xx+10,yy+16,col+7
.asc "[f7] "
.byte col+11
.asc "- "
.byte col+15
.asc "paint line"
.byte xx+10,yy+17,col+7
.asc "[f8] "
.byte col+11
.asc "- "
.byte col+15
.asc "invert/paint"
.byte eot
ldy #31
lda #64
- sta screen+84,y
sta screen+324,y
dey
bpl -
lda #93
sta screen+123
sta screen+163
sta screen+203
sta screen+243
sta screen+283
sta screen+156
sta screen+196
sta screen+236
sta screen+276
sta screen+316
lda #112
sta screen+83
lda #109
sta screen+323
lda #110
sta screen+116
lda #125
sta screen+356
;
;Convert ASCII credit block to screen codes.
;
jsr init_for_convert
lda #1
sta color
conv_in = *
jsr next_line
ldy #0
sty rvs_flag
cin1 = *
jsr get_byte
beq cin3
jsr ascii_to_rom
bcs cin2
ora rvs_flag
sta (line),y
lda color
sta (cline),y
iny
bne cin1
cin2 = *
cmp #13
beq conv_in
cmp #18
bne +
lda #128
sta rvs_flag
bne cin1
+ cmp #18+128
bne +
lda #0
sta rvs_flag
beq cin1
+ ldx #15
- cmp color_table,x
beq +
dex
bpl -
bmi cin1
+ txa
sta color
bpl cin1
cin3 = *
lda #0
sta flash
ldx #<inter
ldy #>inter
jsr setirq
;
;Home cursor
;
home = *
lda #0
sta xpos
sta ypos
loop = *
jsr put_cursor
wait = *
lda play_flag
beq +
lda p$status
bne +
lda p$error
bne +
jsr remove_cursor
jmp restart_sid
+ jsr getin
beq wait
pha
jsr remove_cursor
pla
jsr ascii_to_rom
bcs special_key
ldy xpos
ora rvs_flag
sta (line),y
lda color
sta (cline),y
jsr modify
cright inc xpos
lda xpos
cmp #32
bcc loop
lda #0
sta xpos
inc ypos
lda ypos
cmp #5
bcc loop
lda #0
sta ypos
bne loop
special_key = *
ldx #15
- cmp color_table,x
bne +
txa
sta color
bpl loop
+ dex
bpl -
ldx #cmd_key1-cmd_key-1
- cmp cmd_key,x
beq +
dex
bpl -
jmp loop
+ txa
asl
tax
lda cmd_vec+1,x
pha
lda cmd_vec,x
pha
rts
;
;Command keys and dispatch vectors
;
cmd_key .byte 29,29+128,17+128,17,13,18,18+128,3,135,19,147,136,138
.byte 140,134,20,148,137,133,16
cmd_key1 = *
cmd_vec .word cright-1,cleft-1,cup-1,cdown-1,cret-1,rvs_on-1,rvs_off-1
.word cancel-1,cancel-1,home-1,cclr-1,paint-1,invert-1
.word invert_c-1,center_line-1,edel-1,eins-1
.word insline-1,delline-1,play_toggle-1
;
;Handle cursor movements
;
cleft dec xpos
bpl +
lda #31
sta xpos
dec ypos
bpl +
lda #4
sta ypos
+ jmp loop
cup dec ypos
bpl +
lda #4
sta ypos
+ jmp loop
cdown ldy ypos
iny
cpy #5
bcc +
ldy #0
+ sty ypos
jmp loop
;
;Carriage return
;
cret lda #0
sta xpos
sta rvs_flag
jmp cdown
;
;Reverse on/off
;
rvs_on lda #128
.byte $2c
rvs_off lda #0
sta rvs_flag
jmp loop
;
;Return to main program
;
cancel = *
lda play_flag
beq +
lda #0
sta play_flag
jsr drop_play
+ jsr convert_back
lsr mod_flag
jmp (return_vec)
;
;Clear edit area.
;
cclr = *
ldx #yy+3
- txa
jsr printchar
jsr print
.byte xx+4,tab,36,eot
inx
cpx #yy+8
bcc -
jsr modify
jmp home
;
;"Paint" entire line in current color
;
paint_proc = *
ldy #31
lda color
- sta (cline),y
dey
bpl -
rts
paint jsr paint_proc
jsr modify
jmp loop
;
;Reverse entire line, affecting color.
;
invert_c jsr paint_proc
;
;Reverse entire line, not affecting color.
;
invert = *
ldy #31
- lda (line),y
eor #128
sta (line),y
dey
bpl -
jsr modify
jmp loop
;
;Center current line
;
center_line = *
ldy #0
- lda (line),y
cmp #32
bne +
iny
cpy #32
bcc -
jmp loop
+ ldx #0
- lda (line),y
sta linebuf,x
lda (cline),y
sta clinebuf,x
inx
iny
cpy #32
bcc -
lda #32
- dex
bmi +
cmp linebuf,x
beq -
+ inx
stx ptr
+ lda #33
sec
sbc ptr
lsr
sta ptr+1
ldy #0
lda #32
- cpy ptr+1
bcs +
sta (line),y
iny
bne -
+ ldx #0
- cpx ptr
bcs +
lda linebuf,x
sta (line),y
lda clinebuf,x
sta (cline),y
iny
inx
bne -
+ lda #32
- cpy #32
bcs +
sta (line),y
iny
bne -
+ jsr modify
jmp loop
;
;Delete a character
;
edel jsr modify
ldy xpos
beq cdel2
edel0 cpy #32
bcs +
lda (line),y
dey
sta (line),y
iny
lda (cline),y
dey
sta (cline),y
iny
iny
bne edel0
/ lda #32
dey
sta (line),y
dec xpos
cdel1 jmp loop
cdel2 dec ypos
bpl +
lda #4
sta ypos
+ jsr calc_line
ldy #32
sty xpos
bne -
;
;Insert a character
;
eins ldy #31
lda (line),y
cmp #32
bne cdel1
ldy xpos
dey
sty ptr
ldy #30
- cpy ptr
beq +
lda (line),y
iny
sta (line),y
dey
lda (cline),y
iny
sta (cline),y
dey
dey
bpl -
+ lda #32
iny
sta (line),y
jsr modify
jloop jmp loop
;
;Insert a line
;
insline ldy #31
- lda screen+284,y
cmp #32
bne jloop
dey
bpl -
lda #<screen+284
sta ps1
sta pc1
lda #>screen+284
sta ps1+1
lda #>$d800+284
sta pc1+1
lda #<screen+244
sta ps2
sta pc2
lda #>screen+244
sta ps2+1
lda #>$d800+244
sta pc2+1
ldx #4
il1 cpx ypos
beq il2
ldy #31
- lda (ps2),y
sta (ps1),y
lda (pc2),y
sta (pc1),y
dey
bpl -
lda ps1
sec
sbc #40
sta ps1
sta pc1
bcs +
dec ps1+1
dec pc1+1
+ lda ps2
sec
sbc #40
sta ps2
sta pc2
bcs +
dec ps2+1
dec pc2+1
+ dex
bpl il1
il2 ldy #31
lda #32
- sta (ps1),y
dey
bpl -
jsr modify
jmp loop
;
;Delete a line
;
delline lda line
sta ps1
sta pc1
clc
adc #40
sta ps2
sta pc2
lda line+1
sta ps1+1
adc #0
sta ps2+1
sec
sbc #$1c
sta pc2+1
lda cline+1
sta pc1+1
dl1 lda ps1
cmp #<screen+284
bne +
lda ps1+1
cmp #>screen+284
bcs dl9
+ ldy #31
- lda (ps2),y
sta (ps1),y
lda (pc2),y
sta (pc1),y
dey
bpl -
lda ps1
clc
adc #40
sta ps1
sta pc1
bcc +
inc ps1+1
inc pc1+1
+ lda ps2
clc
adc #40
sta ps2
sta pc2
bcc +
inc ps2+1
inc pc2+1
+ jmp dl1
dl9 ldy #31
lda #32
- sta (ps1),y
dey
bpl -
jsr modify
jmp loop
;
;Set modify flag
;
modify lda #1
sta mod_flag
rts
;
;Initialize pointers for conversion.
;
init_for_convert = *
jsr reset
lda #<screen+124-40
sta line
sta cline
lda #>screen+124-40
sta line+1
lda #$d8
sta cline+1
rts
;
;Go to next line
;
next_line = *
lda line
clc
adc #40
sta line
sta cline
bcc +
inc line+1
inc cline+1
+ rts
;
;--- Convert back to ASCII codes ---
;
convert_back = *
jsr init_for_convert
lda #255
sta color
lda #5
sta ps1
cb1 = *
jsr next_line
ldy #32
lda #32
- dey
bmi +
cmp (line),y
beq -
+ iny
beq justret
sty pc1
lda #255
sta rvs_flag
ldy #0
- lda (line),y
cmp #32
beq skipsp
lda (cline),y
and #15
cmp color
beq +
sta color
tax
lda color_table,x
jsr send_byte
skipsp = *
+ lda (line),y
and #128
cmp rvs_flag
beq ++
sta rvs_flag
cmp #128
bne +
lda #18
.byte $2c
+ lda #18+128
jsr send_byte
+ lda (line),y
and #127
jsr rom_to_ascii
jsr send_byte
iny
cpy pc1
bcc -
justret lda #13
jsr send_byte
dec ps1
bne cb1
lda #0
jmp send_byte
;
;Toggle play mode
;
play_toggle = *
lda play_flag
beq restart_sid
lda #0
sta play_flag
jsr drop_play
jmp loop
restart_sid = *
+ ldy #10
ldx #5
- lda voice_start,y
sta p$musicl,x
lda voice_start+1,y
sta p$musich,x
lda #1
sta p$enable,x
dey
dey
dex
bpl -
lda stereo_mode
beq +
clc
adc #$dd
sta p$address
lda expand_value
sta p$expand
ldx #<midi_channel
ldy #>midi_channel
jsr init_play
lda #63
ldx stereo_mode
bne ++
ldx route
bne +
lda #7
bne ++
+ lda #%00111000
+ sta p$status
lda #0
sta p$mode
lda #1
sta play_flag
jmp loop
| 14.216927 | 79 | 0.566409 |
a5ac78ca11eba460a8416f00c874c71af32bd8a0 | 540 | asm | Assembly | Modules/Module4/Division/division.asm | hackettccp/CSCI213 | c2b5c3e1b5f47fa329a59b0a7261ebeee8e64059 | [
"MIT"
] | null | null | null | Modules/Module4/Division/division.asm | hackettccp/CSCI213 | c2b5c3e1b5f47fa329a59b0a7261ebeee8e64059 | [
"MIT"
] | null | null | null | Modules/Module4/Division/division.asm | hackettccp/CSCI213 | c2b5c3e1b5f47fa329a59b0a7261ebeee8e64059 | [
"MIT"
] | null | null | null | #Demonstrates division with the div mnemonic
#Run and look at the hi (remainder) and lo (quotient) registers
.text
li $t0, 100 #Dividend
li $t1, 7 #Divisor
div $t0, $t1 #Divides $t0 by $t1 (Result is stored to hi and lo)
la $a0, quotient
li $v0, 4
syscall
mflo $a0 #Move the quotient to $a0
li $v0, 1
syscall
la $a0, remainder
li $v0, 4
syscall
mfhi $a0 #Move the remainder to $a0
li $v0, 1
syscall
.data
quotient: .asciiz "Quotient is "
remainder: .asciiz "\nRemainder is: "
| 21.6 | 68 | 0.627778 |
08f92110dc0c9f2ebdfc7d74b2b838bca0b1c6a5 | 28,127 | asm | Assembly | Games/banchorce/source/enemyai.asm | CiaranGruber/Ti-84-Calculator | 96742a4a2b9e21aa9d675575dc7e4f26365430c0 | [
"MIT"
] | 1 | 2019-03-31T11:49:12.000Z | 2019-03-31T11:49:12.000Z | Games/banchorce/source/enemyai.asm | CiaranGruber/Ti-84-Calculator | 96742a4a2b9e21aa9d675575dc7e4f26365430c0 | [
"MIT"
] | null | null | null | Games/banchorce/source/enemyai.asm | CiaranGruber/Ti-84-Calculator | 96742a4a2b9e21aa9d675575dc7e4f26365430c0 | [
"MIT"
] | 1 | 2020-03-09T13:21:19.000Z | 2020-03-09T13:21:19.000Z | ;---------------------------------------------------------------;
; ;
; Banchor ;
; Enemy AI Scripts ;
; ;
;---------------------------------------------------------------;
;------------------------------------------------
; All enemy AI scripts follow
; input: IX => Start of enemy entry
; output: IX => Start of enemy entry
;------------------------------------------------
;------------------------------------------------
; aiKnightNoShoot - early version of the Knight that just wanders (no shooting)
; uses: enemyWander
;------------------------------------------------
aiKnightNoShoot:
call despawnOffScreen
ret c
ld a,(frame)
bit 0,a
call z,enemyWander
ret
;------------------------------------------------
; aiKnight - standard Knight that wanders and occasionally pauses to shoot in a cardinal direction
; aiTroll has identical behaviour
; uses: enemyWander
; enemyShoot
; E_PAUSECNT (counter for pausing to shoot)
;------------------------------------------------
aiKnight:
aiTroll:
call despawnOffScreen
ret c
ld hl,getAngleCardinal
ld de,enemyWander
ld a,50
aiKnightCommon:
ld (__enemyShootAngle),hl
ld (__knightWander),de
ld (__knightPauseCeiling),a
ld a,(ix+E_PAUSECNT)
or a
jr nz,aiKnightPaused ; enemy currently paused
call checkEnemyTileAligned
jr nz,aiKnightContinueWander ; if not tile aligned, continue the wandering
__knightPauseCeiling = $+1
ld b,$00
call random
or a
jr nz,aiKnightContinueWander ; 1-in-B chance of starting a pause, otherwise continue wandering
aiKnightStartPause:
ld (ix+E_PAUSECNT),50
aiKnightPaused:
dec (ix+E_PAUSECNT)
ret nz
jp enemyShoot
aiKnightContinueWander:
ld a,(frame)
bit 0,a
__knightWander = $+1
call z,$000000
call enemyDirToFrame
ret
;------------------------------------------------
; aiKnightAim - endgame Knight that wanders and occasionally pauses to shoot
; uses: aiKnight
;------------------------------------------------
aiKnightAim:
call despawnOffScreen
ret c
ld hl,getAngle
ld de,enemyWander
ld a,50
jr aiKnightCommon
;------------------------------------------------
; aiOctopus - jump on the spot and occasionally shoot at player
; uses: enemyJump
; enemyShoot
;------------------------------------------------
aiOctopus:
call enemyJump
ld hl,getAngle
ld (__enemyShootAngle),hl
ld a,(ix+E_JUMPCNT)
or a
ret nz ; don't shoot if mid-jump
ld b,200
call random
or a
ret nz
jp enemyShoot
;------------------------------------------------
; aiPotatoBug - chase the player every 2nd frame
; aiMummy has identical behaviour
; uses: enemyFollow
;------------------------------------------------
aiPotatoBug:
aiMummy:
call despawnOffScreen
ret c
ld a,(frame)
bit 0,a
call z,enemyFollow
call enemyDirToFrame
ret
;------------------------------------------------
; aiJellyfish - chase the player, but pause between each tile
; uses: enemyFollow
; E_PAUSECNT (counter for pausing between tiles)
;------------------------------------------------
aiJellyfish:
call despawnOffScreen
ret c
ld a,20
ld c,OP_CALLZ
aiJellyfishCommon:
ld (__jellyfishPause),a
ld a,c
ld (__jellyfishSpeed),a
ld a,(ix+E_PAUSECNT)
or a
jr nz,aiJellyfishPaused
call checkEnemyTileAligned
jr nz,aiJellyfishFollow
__jellyfishPause = $+1
ld b,20
call random
add a,30
ld (ix+E_PAUSECNT),a
aiJellyfishPaused:
dec (ix+E_PAUSECNT)
ld a,(ix+E_PAUSECNT)
and %11111110
ret nz
aiJellyfishFollow:
ld a,(frame)
bit 0,a
__jellyfishSpeed = $
call z,enemyFollow
call enemyDirToFrame
ret
;------------------------------------------------
; aiBat - chase player using the 16 directions in arc patterns by slowing down when it needs to alter it's trajectory and speeding up when it's on course
; this is a unique behaviour used only by Bats
; uses: E_SPEED (used to keep track of how fast the Bat is moving
;------------------------------------------------
aiBat:
call despawnOffScreen
ret c
; first, check if E_SPEED has been initialised (only happens once per Bat)
ld a,(ix+E_SPEED)
or a
jr nz,aiBatSpeedSet
; it's a brand new Bat, initialise E_SPEED and E_DIR
ld (ix+E_SPEED),32
call getAngle
inc a
ld (ix+E_DIR),a
aiBatSpeedSet:
; first, check if the Bat is heading towards the player already
call getAngle
ld b,(ix+E_DIR)
dec b
call aiBatCalcAngleDiff
cp 2
jr c,aiBatSpeedUp ; if angle is off by 1 or less, speed up and keep current direction
cp 4
jr c,aiBatAlterDir ; if angle is only off by 3 or less, maintain current speed and adjust angle by 1
; otherwise, slow down before adjusting angle
aiBatSlowDown:
ld a,(frame)
and %00000001
jr nz,aiBatAlterDir ; can only slow down every 2nd frame
ld a,(ix+E_SPEED)
cp 32
jr z,aiBatAlterDir ; already at min speed
inc a
ld (ix+E_SPEED),a
aiBatAlterDir:
ld a,(frame)
and %00000011
jr nz,aiBatMove ; can only alter direction every 4th frame
ld e,(ix+E_DIR)
dec e
ld d,16
mlt de ; dir16Turn row offset
ld hl,0
ld l,c
add hl,de
ld de,dir16Turn
add hl,de
ld a,(hl) ; A = new direction
inc a
ld (ix+E_DIR),a
jr aiBatMove
aiBatSpeedUp:
ld a,(ix+E_SPEED)
cp 8
jr z,aiBatMove ; already at max speed
dec a
ld (ix+E_SPEED),a
aiBatMove:
ld a,(ix+E_DIR)
dec a
ld b,(ix+E_SPEED)
srl b
srl b
srl b
dec b
call moveDir16
ret
aiBatCalcAngleDiff:
ld c,a
sub b
ABSA()
cp 8
ret c
sub 16
ABSA()
ret
;------------------------------------------------
; aiSnake - chase the player and occasionally jump
; uses: enemyFollow
; enemyJump
;------------------------------------------------
aiSnake:
call despawnOffScreen
ret c
call enemyJump
ld a,(ix+E_JUMPCNT)
or a
ret nz ; don't follow if mid-jump
ld a,(frame)
bit 0,a
call z,enemyFollow
call enemyDirToFrame
ret
;------------------------------------------------
; aiBee - move around in a circle either clockwise or counter clockwise, and in one of 3 radii
; this is a unique behaviour used only by Bees
; uses: E_SPEED (used to determine the circle radius by how often the Bee changes it's angle)
; E_FLAGS (bit 0 is the circle direction, either CW or CCW)
;------------------------------------------------
aiBee:
call despawnOffScreen
ret c
; first, check if E_SPEED has been set (not zero), this only happens once per Bee
ld a,(ix+E_SPEED)
or a
ld c,a
jr nz,aiBeeSpeedSet ; if so, skip this next bit
; choose a random speed value (will either be %00000001, %00000011 or %00000111)
; this value will cause the Bee to change it's direction every 2nd, 4th or 8th frame, to get the "random" circle radii
ld b,3
call random
inc a
ld b,a
xor a
ld c,1
aiBeeCalcSpeed:
or c
rlc c
djnz aiBeeCalcSpeed
ld c,a
ld (ix+E_SPEED),c
; choose either CW or CCW direction
ld b,2
call random
ld (ix+E_FLAGS),a
aiBeeSpeedSet:
ld c,-1
bit 0,(ix+E_FLAGS)
jr z,aiBeeCheckFrame
ld c,1
aiBeeCheckFrame:
ld a,(frame)
and (ix+E_SPEED)
ld a,(ix+E_DIR)
jr nz,aiBeeMove
dec a
add a,c
and $0F
inc a
ld (ix+E_DIR),a
aiBeeMove:
dec a
ld b,1
call moveDir16
aiBeeShoot:
ld b,200
call random
or a
ret nz
ld hl,getAngle
ld (__enemyShootAngle),hl
jp enemyShoot
;------------------------------------------------
; aiFrog - jump across the screen either left or right
; this is a unique behaviour used only by Frogs
; uses: E_JUMPCNT (counter for the various tables used to calculate the jump)
;------------------------------------------------
aiFrog:
ld a,(frame)
bit 0,a
ret nz
call despawnOffScreen
ret c
ld a,(ix+E_JUMPCNT)
or a
jr nz,aiFrogContinue
inc (ix+E_JUMPCNT)
ld a,(x)
sub (ix+E_X)
jr c,aiFrogLeft
aiFrogRight:
ld (ix+E_DIR),3
jr aiFrogContinue
aiFrogLeft:
ld (ix+E_DIR),1
aiFrogContinue:
ld bc,0
ld c,(ix+E_JUMPCNT)
dec c
push bc
ld hl,frogYTable
add hl,bc
ld a,(hl)
add a,(ix+E_Y)
ld (ix+E_Y),a
ld a,(ix+E_DIR)
cp 3
ld a,$80
ld b,2
jr nc,aiFrogCalcValues
ld a,$90
ld b,0
aiFrogCalcValues:
ld (__aiFrogAddSub),a
ld a,b
ld (__aiFrogDir),a
pop bc
push bc
ld hl,frogXTable
add hl,bc
ld b,(hl)
ld a,(ix+E_X)
__aiFrogAddSub = $
nop
ld (ix+E_X),a
__aiFrogDir = $+1
ld a,$00
pop bc
ld hl,frogDirTable
add hl,bc
add a,(hl)
ld (ix+E_DIR),a
call enemyDirToFrame
inc (ix+E_JUMPCNT)
ld a,(ix+E_JUMPCNT)
cp FROG_CNT_MAX+1
ret c
ld (ix+E_JUMPCNT),1
ret
;------------------------------------------------
; aiSpider - wanders with no clipping and occasionally pauses to shoot
; uses: aiKnight
;------------------------------------------------
aiSpider:
call despawnOffScreen
ret c
ld hl,getAngle
ld de,enemyWanderNoClip
ld a,100
jp aiKnightCommon
;------------------------------------------------
; aiPigmySkeleton - chase the player fast
; uses: enemyFollow
;------------------------------------------------
aiPigmySkeleton:
call despawnOffScreen
ret c
call enemyFollow
call enemyDirToFrame
ret
;------------------------------------------------
; aiPigmySkeletonJump - chase the player fast and occasionally jump
; uses: enemyFollow
; enemyJump
;------------------------------------------------
aiPigmySkeletonJump:
call despawnOffScreen
ret c
call enemyJump
ld a,(ix+E_JUMPCNT)
or a
call z,enemyFollow ; don't follow if mid-jump
call enemyDirToFrame
ret
;------------------------------------------------
; aiMudman - chase the player every 2nd frame with no wall clipping
; aiShadowBeast has identical behaviour
; uses: enemyFollow
;------------------------------------------------
aiMudman:
aiShadowBeast:
ld a,(frame)
bit 0,a
call z,enemyFollowNoClip
call enemyDirToFrame
ret
;------------------------------------------------
; aiTreeMonster - chase the player like Jellyfish but walks faster and has potential for longer pauses between each tile
; uses: aiJellyfish
;------------------------------------------------
aiTreeMonster:
call despawnOffScreen
ret c
ld a,80
ld c,OP_CALL
jp aiJellyfishCommon
;------------------------------------------------
; aiDeathLord - swoop up/down and left/right around the screen
; uses: E_JUMPCNT (to keep track of the horizontal movement)
; E_SPEED (assigned a random number after spawn to use as an offset for frame counter to track vertical movement)
; E_FLAGS (to track up/down and left/right directions)
;------------------------------------------------
aiDeathLord:
call despawnOffScreen
ret c
; first, check if E_SPEED has been set (not zero), this only happens once per Death Lord
ld a,(ix+E_SPEED)
or a
jr nz,aiDeathLordSpeedSet
; choose a random speed value between 1-16
ld b,16
call random
inc a
ld (ix+E_SPEED),a
aiDeathLordSpeedSet:
; horizontal movement, works off E_JUMPCNT
ld a,(ix+E_JUMPCNT)
LDHLA()
ld de,deathLordHoriz
add hl,de
inc a
cp DEATHLORD_HORIZ_MAX
jr nz,aiDeathLordSaveCount
ld a,(ix+E_FLAGS)
xor %00000001
ld (ix+E_FLAGS),a
xor a
aiDeathLordSaveCount:
ld (ix+E_JUMPCNT),a
bit 0,(ix+E_FLAGS)
ld a,(hl)
jr nz,aiDeathLordHoriz
neg
aiDeathLordHoriz:
add a,(ix+E_X)
ld (ix+E_X),a
; vertical movement, works off the frame counter with E_SPEED being a random offset for each Death Lord
ld a,(frame)
add a,(ix+E_SPEED)
and %00011111
jr nz,aiDeathLordAfterToggle
ld c,a
ld a,(ix+E_FLAGS)
xor %00000010
ld (ix+E_FLAGS),a
ld a,c
aiDeathLordAfterToggle:
LDHLA()
ld de,deathLordVert
add hl,de
bit 1,(ix+E_FLAGS)
ld a,(hl)
jr nz,aiDeathLordVert
neg
aiDeathLordVert:
add a,(ix+E_Y)
ld (ix+E_Y),a
ret
;------------------------------------------------
; aiKoranda - chase the player every 2nd frame with no wall clipping, and occasionally shoot
; uses: enemyFollow
; enemyShoot
;------------------------------------------------
aiKoranda:
ld a,(frame)
bit 0,a
call z,enemyFollowNoClip
ld b,200
call random
or a
ret nz
ld hl,getAngle
ld (__enemyShootAngle),hl
jp enemyShoot
; below are common routines used by various AI scripts
;------------------------------------------------
; enemyWander - enemy wanders around in any cardinal direction
;------------------------------------------------
enemyWander:
call enemySetClip
enemyWanderCommon:
xor a
ld (dirFlags),a
call checkEnemyTileAligned
jp nz,moveEnemyDir ; if enemy is not tile aligned, continue moving in the direction they're facing
; pick a new direction and try to move in it (with a chance enemy will decide to stay idle)
ld b,6
call random ; 0 <= A <= 5
or a
jp z,moveEnemyUp
dec a
jp z,moveEnemyDown
dec a
jp z,moveEnemyLeft
dec a
jp z,moveEnemyRight
ret
;------------------------------------------------
; enemyWanderNoClip - enemy wanders around in any cardinal direction without wall clipping
;------------------------------------------------
enemyWanderNoClip:
call enemySetNoClip
jr enemyWanderCommon
;------------------------------------------------
; enemyFollow - enemy follows the player
;------------------------------------------------
enemyFollow:
call enemySetClip
enemyFollowCommon:
xor a
ld (dirFlags),a
call checkEnemyTileAligned
jp nz,moveEnemyDir ; if enemy is not tile aligned, continue moving in the direction they're facing
; pick a new direction based on player position
; get x-axis position difference
ld a,(x)
sub (ix+E_X)
ld d,a
ABSA()
ld b,a
; get y-axis position difference
ld a,(y)
sub (ix+E_Y)
ld e,a
ABSA()
; which is bigger?
push de ; save x & y differences for later
ld hl,enemyFollow1stAttempt ; RET location for first move attempt
cp b
jr nc,enemyFollowVert ; if y difference is bigger, try to move vertical
enemyFollowHoriz:
; going to try to move horizontally, check if left or right
ld b,0 ; B = moving horizontally
push bc ; save it
bit 7,d
ld a,3
jr z,enemyFollowTryMove
ld a,2
jr enemyFollowTryMove
enemyFollowVert:
; going to try to move vertically, check if up or down
ld b,1 ; B = moving vertically
push bc
bit 7,e
ld a,1
jr z,enemyFollowTryMove
xor a
enemyFollowTryMove:
push hl ; where to RET to after trying to move
or a
jp z,moveEnemyUp
dec a
jp z,moveEnemyDown
dec a
jp z,moveEnemyLeft
jp moveEnemyRight
enemyFollow1stAttempt:
pop bc ; B = axis flag
pop de ; D = x diff, E = y diff
ret nc ; if moved successfully, nothing else to do
ld hl,enemyFollow2ndAttempt
push hl ; where to RET to after trying to move a 2nd time
ld a,b
or a
jr z,enemyFollowVert
jr enemyFollowHoriz
enemyFollow2ndAttempt:
pop bc ; clear stack
ret nc ; if moved successfully, nothing else to do
; if execution gets here, the enemy has tried and failed to move closer to the player on both axes
; whichever two directions were attemped will have had their bits set in dirFlags
call moveEnemyUp
call c,moveEnemyDown
call c,moveEnemyLeft
call c,moveEnemyRight
ret
;------------------------------------------------
; enemyFollowNoClip - enemy follows the player without wall clipping
;------------------------------------------------
enemyFollowNoClip:
call enemySetNoClip
jp enemyFollowCommon
;------------------------------------------------
; enemyShoot - try to shoot at the player
; uses: (__enemyShootAngle) should be either getAngle or getAngleCardinal
;------------------------------------------------
enemyShoot:
call getEmptyBulletEntry
ret c
push hl
__enemyShootAngle = $+1
call $000000
pop hl
inc a
ld (hl),a
inc hl
ld a,(ix+E_X)
inc a
ld (hl),a
inc hl
ld a,(ix+E_Y)
inc a
ld (hl),a
ret
;------------------------------------------------
; enemyJump - occasionally jump in place (used by snakes, octopii and endgame pigmy skeletons
; uses: E_JUMPCNT (counter for jumpTable)
;------------------------------------------------
enemyJump:
ld a,(ix+E_JUMPCNT)
or a
jr nz,enemyJumpContinue
ld b,40
call random
or a ; 1-in-B chance of jumping
ret nz
; A = 0 here for the first jump frame
enemyJumpContinue:
LDHLA()
ld de,jumpTable
add hl,de
ld a,(hl)
add a,(ix+E_Y)
ld (ix+E_Y),a
inc (ix+E_JUMPCNT)
ld a,(ix+E_JUMPCNT)
cp JUMP_MAX
ret c
ld (ix+E_JUMPCNT),0
ret
;------------------------------------------------
; checkEnemyTileAligned - check if enemy is tile aligned
; input: IX => enemy entry
; output: IX => enemy entry
; Z if tile aligned, NZ if not
;------------------------------------------------
checkEnemyTileAligned:
ld a,(ix+E_X)
and %00000111
ret nz
ld a,(ix+E_Y)
and %00000111
ret
;------------------------------------------------
; moveEnemyDir - move enemy in a cardinal direction according to direction value
; input: IX => enemy entry
; output: IX => enemy entry
;------------------------------------------------
moveEnemyDir:
ld a,(ix+E_DIR)
dec a
jp z,moveEnemyUp
dec a
jp z,moveEnemyDown
dec a
jp z,moveEnemyLeft
dec a
jp z,moveEnemyRight
ret
;------------------------------------------------
; moveEnemyUp - try to move an enemy up
; input: IX => Start of enemy entry
; output: IX => Start of enemy entry
; CA = 1 if couldn't move
;------------------------------------------------
moveEnemyUp:
ld hl,dirFlags
bit 0,(hl)
scf
set 0,(hl)
ret nz ; leave if this direction has already been attempted, with carry set to signify move failed
ld a,(ix+E_X)
ld l,(ix+E_Y)
dec l
call enemyGetTile
cp ENEMY_WALL
ccf
ret c
ld a,(ix+E_X)
add a,7
ld l,(ix+E_Y)
dec l
call enemyGetTile
cp ENEMY_WALL
ccf
ret c
dec (ix+E_Y)
ld (ix+E_DIR),1
or a
ret
;------------------------------------------------
; moveEnemyDown - try to move an enemy down
; input: IX => Start of enemy entry
; output: IX => Start of enemy entry
; CA = 1 if couldn't move
;------------------------------------------------
moveEnemyDown:
ld hl,dirFlags
bit 1,(hl)
scf
set 1,(hl)
ret nz
ld a,(ix+E_Y)
add a,8
ld l,a
ld a,(ix+E_X)
call enemyGetTile
cp ENEMY_WALL
ccf
ret c
ld a,(ix+E_Y)
add a,8
ld l,a
ld a,(ix+E_X)
add a,7
call enemyGetTile
cp ENEMY_WALL
ccf
ret c
inc (ix+E_Y)
ld (ix+E_DIR),2
or a
ret
;------------------------------------------------
; moveEnemyLeft - try to move an enemy left
; input: IX => Start of enemy entry
; output: IX => Start of enemy entry
; CA = 1 if couldn't move
;------------------------------------------------
moveEnemyLeft:
ld hl,dirFlags
bit 2,(hl)
scf
set 2,(hl)
ret nz
ld a,(ix+E_X)
dec a
ld l,(ix+E_Y)
call enemyGetTile
cp ENEMY_WALL
ccf
ret c
ld a,(ix+E_Y)
add a,7
ld l,a
ld a,(ix+E_X)
dec a
call enemyGetTile
cp ENEMY_WALL
ccf
ret c
dec (ix+E_X)
ld (ix+E_DIR),3
or a
ret
;------------------------------------------------
; moveEnemyRight - try to move an enemy right
; input: IX => Start of enemy entry
; output: IX => Start of enemy entry
; CA = 1 if couldn't move
;------------------------------------------------
moveEnemyRight:
ld hl,dirFlags
bit 3,(hl)
scf
set 3,(hl)
ret nz
ld a,(ix+E_X)
add a,8
ld l,(ix+E_Y)
call enemyGetTile
cp ENEMY_WALL
ccf
ret c
ld a,(ix+E_Y)
add a,7
ld l,a
ld a,(ix+E_X)
add a,8
call enemyGetTile
cp ENEMY_WALL
ccf
ret c
inc (ix+E_X)
ld (ix+E_DIR),4
or a
ret
;------------------------------------------------
; enemySetClip - modify enemyGetTile for wall clipping
; input: none
; output: none
;------------------------------------------------
enemySetClip:
xor a
ld (__enemyGetTile),a ; load "nop"
ret
;------------------------------------------------
; enemySetNoClip - modify enemyGetTile for NO wall clipping
; input: none
; output: none
;------------------------------------------------
enemySetNoClip:
ld a,OP_XOR_A
ld (__enemyGetTile),a ; load "xor a"
ret
;------------------------------------------------
; enemyGetTile - same as getTile, but can be hacked for flying enemies
; input: A = X Coord
; L = Y Coord
; output: HL => Tile
; A = Tile
;------------------------------------------------
enemyGetTile:
call getTile
__enemyGetTile = $
nop ; this instruction can be changed to "xor a" for flying enemies
ret
;------------------------------------------------
; despawnOffScreen - despawn enemy if off screen
; input: IX => enemy entry
; output: IX => enemy entry
; CA = 1 if enemy was despawned
;------------------------------------------------
despawnOffScreen:
call checkEnemyOnScreen
ret nc
ld (ix+E_DIR),0
ret
;------------------------------------------------
; enemyDirToFrame - convert E_DIR value to E_FRAME value
; input: IX => enemy entry
; output: IX => enemy entry
;------------------------------------------------
enemyDirToFrame:
ld a,(ix+E_DIR)
dec a
ld (ix+E_FRAME),a
ret
.end
| 31.011025 | 153 | 0.429516 |
0efcd19caea5be1257a4642bdd42098c6cef885f | 174 | asm | Assembly | libsrc/_DEVELOPMENT/adt/bv_stack/c/sccz80/bv_stack_empty.asm | teknoplop/z88dk | bb03fbfd6b2ab0f397a1358559089f9cd3706485 | [
"ClArtistic"
] | 8 | 2017-01-18T12:02:17.000Z | 2021-06-12T09:40:28.000Z | libsrc/_DEVELOPMENT/adt/bv_stack/c/sccz80/bv_stack_empty.asm | teknoplop/z88dk | bb03fbfd6b2ab0f397a1358559089f9cd3706485 | [
"ClArtistic"
] | 1 | 2017-03-06T07:41:56.000Z | 2017-03-06T07:41:56.000Z | libsrc/_DEVELOPMENT/adt/bv_stack/c/sccz80/bv_stack_empty.asm | teknoplop/z88dk | bb03fbfd6b2ab0f397a1358559089f9cd3706485 | [
"ClArtistic"
] | 3 | 2017-03-07T03:19:40.000Z | 2021-09-15T17:59:19.000Z |
; int bv_stack_empty(bv_stack_t *s)
SECTION code_clib
SECTION code_adt_bv_stack
PUBLIC bv_stack_empty
EXTERN asm_bv_stack_empty
defc bv_stack_empty = asm_bv_stack_empty
| 14.5 | 40 | 0.850575 |
484ba5f7815f8cb2a867e99a56fce3c6a0bf0cef | 655 | asm | Assembly | oeis/055/A055612.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/055/A055612.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/055/A055612.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A055612: a(n) = Product_{m=1..n} (binomial(n,m)+1).
; Submitted by Christian Krause
; 1,2,6,32,350,8712,526848,80289792,31428168318,31906468445000,84447578671097576,584524457418427932672,10604795873304968964262400,505245441738743508813986275328,63320582170435750241601032951040000,20908669294849228879861552351685432573952,18218185986931789013337257184583689511975529598,41947018866905081917547399417064936413487021265102728,255561302721594894729925794418711649664082279698713102625000,4125043817182827926533243343423323292834951236997434089686488320000
mov $1,1
mov $2,$0
lpb $0
sub $0,1
mov $3,$2
bin $3,$0
add $3,1
mul $1,$3
lpe
mov $0,$1
| 43.666667 | 469 | 0.842748 |
6153dfdb226bdaac748c1b5c42d96a919f8439dc | 626 | asm | Assembly | solutions/10 - Emergency Escapades/size-40_speed-19.asm | michaelgundlach/7billionhumans | 02c6f3963364362c95cb516cbc6ef1efc073bb2e | [
"MIT"
] | 45 | 2018-09-05T04:56:59.000Z | 2021-11-22T08:57:26.000Z | solutions/10 - Emergency Escapades/size-40_speed-19.asm | michaelgundlach/7billionhumans | 02c6f3963364362c95cb516cbc6ef1efc073bb2e | [
"MIT"
] | 36 | 2018-09-01T11:34:26.000Z | 2021-05-19T23:20:49.000Z | solutions/10 - Emergency Escapades/size-40_speed-19.asm | michaelgundlach/7billionhumans | 02c6f3963364362c95cb516cbc6ef1efc073bb2e | [
"MIT"
] | 36 | 2018-09-01T07:44:19.000Z | 2021-09-10T19:07:35.000Z | -- 7 Billion Humans (2053) --
-- 10: Emergency Escapades --
-- Author: soerface
-- Size: 40
-- Speed: 19
a:
step w
step w
b:
step w
if c == 1:
if s == wall:
step n
step nw
jump c
endif
if sw != hole:
step sw
jump d
endif
if nw != hole:
step nw
jump e
endif
if w != hole:
step w
jump f
endif
endif
jump b
if c == 3:
f:
c:
e:
d:
step sw
step s
step sw
g:
step w
step w
step w
step nw
step n
step n
step n
step n
step nw
jump g
endif
if w == hole and
sw != hole:
step sw
endif
if w == hole and
nw != hole:
step nw
endif
if w == hole and
s == wall:
step n
step nw
endif
jump a
| 9.343284 | 29 | 0.586262 |
48b0ccae6bb2220c511622e54271bb166a13c87c | 656 | asm | Assembly | oeis/192/A192832.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/192/A192832.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/192/A192832.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A192832: Molecular topological indices of the lattice graphs.
; 0,48,576,2880,9600,25200,56448,112896,207360,356400,580800,906048,1362816,1987440,2822400,3916800,5326848,7116336,9357120,12129600,15523200,19636848,24579456,30470400,37440000,45630000,55194048,66298176,79121280,93855600,110707200,129896448,151658496,176243760,203918400,234964800,269682048,308386416,351411840,399110400,451852800,510028848,574047936,644339520,721353600,805561200,897454848,997549056,1106380800,1224510000,1352520000,1491018048,1640635776,1802029680,1975881600,2162899200,2363816448
mov $1,1
add $1,$0
mul $0,$1
mul $1,$0
add $1,$0
mul $1,$0
div $1,12
mul $1,48
mov $0,$1
| 50.461538 | 501 | 0.82622 |
2070804642fe6e8352a1a6de673bd9fe94a84027 | 5,891 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0xca_notsx.log_21743_1494.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0xca_notsx.log_21743_1494.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0xca_notsx.log_21743_1494.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r13
push %r15
push %rax
push %rbp
push %rcx
push %rdi
push %rsi
lea addresses_normal_ht+0x12f2c, %rsi
lea addresses_WC_ht+0x12498, %rdi
nop
nop
nop
inc %rax
mov $29, %rcx
rep movsl
nop
nop
xor $40091, %rbp
lea addresses_WC_ht+0x10a2c, %rax
nop
nop
nop
and $17571, %rbp
movups (%rax), %xmm6
vpextrq $0, %xmm6, %rsi
nop
cmp %rdi, %rdi
lea addresses_WC_ht+0x1788c, %rdi
nop
add %r15, %r15
mov $0x6162636465666768, %rcx
movq %rcx, (%rdi)
nop
nop
nop
inc %rbp
lea addresses_normal_ht+0x120ac, %rsi
lea addresses_normal_ht+0x1af2c, %rdi
nop
nop
inc %rbp
mov $62, %rcx
rep movsq
nop
nop
nop
add $13305, %rsi
lea addresses_WC_ht+0x68cf, %r15
nop
nop
nop
nop
nop
sub $53686, %r13
mov (%r15), %ecx
nop
inc %r15
lea addresses_WC_ht+0x13d2c, %rdi
nop
and $53778, %r15
mov (%rdi), %cx
nop
nop
nop
dec %rcx
lea addresses_normal_ht+0x16f2c, %rsi
nop
nop
xor $34806, %rax
mov (%rsi), %rcx
nop
nop
nop
nop
inc %rax
pop %rsi
pop %rdi
pop %rcx
pop %rbp
pop %rax
pop %r15
pop %r13
ret
.global s_faulty_load
s_faulty_load:
push %r9
push %rbx
push %rcx
push %rdi
push %rdx
push %rsi
// REPMOV
lea addresses_normal+0x8d78, %rsi
lea addresses_RW+0x6eb8, %rdi
nop
nop
xor %rdx, %rdx
mov $19, %rcx
rep movsl
nop
nop
inc %rcx
// Faulty Load
lea addresses_PSE+0x14d2c, %rdi
nop
nop
nop
nop
nop
inc %rdx
movb (%rdi), %bl
lea oracles, %rcx
and $0xff, %rbx
shlq $12, %rbx
mov (%rcx,%rbx,1), %rbx
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbx
pop %r9
ret
/*
<gen_faulty_load>
[REF]
{'src': {'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 0, 'same': False, 'type': 'addresses_PSE'}, 'OP': 'LOAD'}
{'src': {'congruent': 2, 'same': False, 'type': 'addresses_normal'}, 'dst': {'congruent': 1, 'same': False, 'type': 'addresses_RW'}, 'OP': 'REPM'}
[Faulty Load]
{'src': {'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 0, 'same': True, 'type': 'addresses_PSE'}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'congruent': 8, 'same': False, 'type': 'addresses_normal_ht'}, 'dst': {'congruent': 2, 'same': False, 'type': 'addresses_WC_ht'}, 'OP': 'REPM'}
{'src': {'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 8, 'same': False, 'type': 'addresses_WC_ht'}, 'OP': 'LOAD'}
{'dst': {'NT': True, 'AVXalign': False, 'size': 8, 'congruent': 3, 'same': False, 'type': 'addresses_WC_ht'}, 'OP': 'STOR'}
{'src': {'congruent': 7, 'same': False, 'type': 'addresses_normal_ht'}, 'dst': {'congruent': 9, 'same': False, 'type': 'addresses_normal_ht'}, 'OP': 'REPM'}
{'src': {'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 0, 'same': False, 'type': 'addresses_WC_ht'}, 'OP': 'LOAD'}
{'src': {'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 10, 'same': True, 'type': 'addresses_WC_ht'}, 'OP': 'LOAD'}
{'src': {'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 9, 'same': False, 'type': 'addresses_normal_ht'}, 'OP': 'LOAD'}
{'33': 21743}
33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33
*/
| 40.07483 | 2,999 | 0.661348 |
5ab971d7fc81092e428cbc049a12cc3627c75ac0 | 2,232 | asm | Assembly | game-projects/Zedda/Objects/TitleScreen/Triangle/Triangle.asm | wide-dot/thomson-to8-game-engine | f305368ff28fba6e6bd03d0138a36ff5ea67e925 | [
"Apache-2.0"
] | 11 | 2021-09-07T18:45:06.000Z | 2022-02-15T06:36:19.000Z | game-projects/Zedda/Objects/TitleScreen/Triangle/Triangle.asm | dougmasten/thomson-to8-game-engine | b1f29e3b650e2296a5058570173e1c9068bccbe4 | [
"Apache-2.0"
] | null | null | null | game-projects/Zedda/Objects/TitleScreen/Triangle/Triangle.asm | dougmasten/thomson-to8-game-engine | b1f29e3b650e2296a5058570173e1c9068bccbe4 | [
"Apache-2.0"
] | 1 | 2021-11-22T08:43:52.000Z | 2021-11-22T08:43:52.000Z | ; ---------------------------------------------------------------------------
; Object - Triangle
;
; input REG : [u] pointer to Object Status Table (OST)
; ---------
;
; Animated full screen Background
;
; ---------------------------------------------------------------------------
INCLUDE "./Engine/Macros.asm"
Triangle
lda routine,u
asla
ldx #Triangle_Routines
jmp [a,x]
Triangle_Routines
fdb Triangle_Init
fdb Triangle_Main
fdb Triangle_MainOdd
fdb Triangle_Final
Triangle_Init
; Init Object
; --------------------------------------------
ldb #3
stb priority,u
lda render_flags,u
ora #render_overlay_mask
sta render_flags,u
ldd #$807F
std xy_pixel,u
ldd #Ani_01
std anim,u
jsr AnimateSprite
Triangle_Main
inc routine,u
jmp DisplaySprite
Triangle_MainOdd
dec routine,u
jsr AnimateSprite
ldd anim,u
cmpd #Ani_08
bne @a
inc routine,u ; go to final state
jmp DisplaySprite
@a jsr GetImgIdA ; preprocessed palette color switch
cmpa oldPal
beq @b
sta oldPal
stu @dyn+1
ldb #0
ldy #Pal_Triangle+2 ; offset because cycling colors indexes are 1-4
ldu #Pal_TriangleTmp
_lsrd
_lsrd
lsrb
lsrb
lsrb
lsrb
lsrb
ldx b,y
stx 8,u
_lsrd
_lsrd
lsrb
lsrb
lsrb
lsrb
lsrb
ldx b,y
stx 6,u
_lsrd
_lsrd
lsrb
lsrb
lsrb
lsrb
lsrb
ldx b,y
stx 4,u
_lsrd
_lsrd
lsrb
lsrb
lsrb
lsrb
lsrb
ldx b,y
stx 2,u
stu Cur_palette
clr Refresh_palette
@dyn ldu #0 ; (dynamic)
@b jmp DisplaySprite
Triangle_Final
jmp DisplaySprite
oldPal fcb 27 ; 0b00011011 means 0 1 2 3, each number on 2 bits | 20.477064 | 86 | 0.436828 |
90d3c45a9f2b180bbfb466ed623bf7a33af93bf0 | 4,827 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xca_notsx.log_21829_1317.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xca_notsx.log_21829_1317.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xca_notsx.log_21829_1317.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r15
push %rbx
push %rcx
push %rdi
push %rsi
lea addresses_UC_ht+0x16f4b, %rsi
lea addresses_D_ht+0xa743, %rdi
nop
nop
inc %rbx
mov $67, %rcx
rep movsw
nop
nop
nop
nop
and $4232, %r15
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %r15
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r14
push %r9
push %rbp
push %rcx
push %rdi
push %rsi
// Store
lea addresses_UC+0x5138, %rcx
nop
nop
nop
xor %r10, %r10
mov $0x5152535455565758, %rbp
movq %rbp, %xmm2
vmovups %ymm2, (%rcx)
sub $17867, %rbp
// Load
mov $0x55a78f000000050b, %rsi
clflush (%rsi)
nop
nop
nop
nop
nop
and $64460, %r9
mov (%rsi), %ebp
nop
nop
add %r9, %r9
// Load
lea addresses_D+0x914b, %r14
nop
and %rdi, %rdi
mov (%r14), %ecx
nop
nop
cmp %r10, %r10
// Faulty Load
lea addresses_D+0x1164b, %r9
nop
add $31883, %rsi
mov (%r9), %bp
lea oracles, %rdi
and $0xff, %rbp
shlq $12, %rbp
mov (%rdi,%rbp,1), %rbp
pop %rsi
pop %rdi
pop %rcx
pop %rbp
pop %r9
pop %r14
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_D', 'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 0}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_UC', 'NT': False, 'AVXalign': False, 'size': 32, 'congruent': 0}}
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_NC', 'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 6}}
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_D', 'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 7}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'same': True, 'type': 'addresses_D', 'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 0}}
<gen_prepare_buffer>
{'OP': 'REPM', 'src': {'same': False, 'congruent': 8, 'type': 'addresses_UC_ht'}, 'dst': {'same': False, 'congruent': 2, 'type': 'addresses_D_ht'}}
{'36': 21829}
36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36
*/
| 46.864078 | 2,999 | 0.657137 |
dbc7094a25f2dac662bdbaffe3f9b7f79e6f31a0 | 6,454 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_sm_/i7-7700_9_0xca.log_6543_704.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_sm_/i7-7700_9_0xca.log_6543_704.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_sm_/i7-7700_9_0xca.log_6543_704.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r12
push %r13
push %r14
push %r15
push %r8
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_WT_ht+0x46c2, %r8
nop
sub $22849, %r12
mov $0x6162636465666768, %r15
movq %r15, %xmm1
movups %xmm1, (%r8)
nop
add $38075, %r14
lea addresses_WC_ht+0x1c6c2, %r13
nop
nop
nop
nop
add $52406, %rdi
mov (%r13), %rdx
add $5228, %r15
lea addresses_normal_ht+0x50c2, %r14
nop
nop
nop
nop
sub %rdx, %rdx
mov $0x6162636465666768, %r15
movq %r15, (%r14)
nop
nop
add %r13, %r13
lea addresses_A_ht+0x5d82, %rsi
lea addresses_WC_ht+0x1c4c2, %rdi
nop
nop
sub $7038, %r12
mov $77, %rcx
rep movsb
nop
add $56623, %rcx
lea addresses_D_ht+0xf422, %r8
nop
nop
nop
nop
nop
add $35460, %rdi
mov $0x6162636465666768, %r15
movq %r15, %xmm0
vmovups %ymm0, (%r8)
nop
nop
add $65227, %r13
lea addresses_WT_ht+0x2242, %r13
nop
nop
dec %rcx
mov (%r13), %r15d
nop
nop
nop
nop
nop
sub $43956, %r14
lea addresses_normal_ht+0x18f22, %r12
nop
nop
nop
nop
nop
add %r8, %r8
mov $0x6162636465666768, %rcx
movq %rcx, %xmm7
movups %xmm7, (%r12)
nop
nop
xor $28193, %rsi
lea addresses_UC_ht+0xa7d2, %r13
nop
nop
add %r15, %r15
movb (%r13), %r8b
sub %rcx, %rcx
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %r8
pop %r15
pop %r14
pop %r13
pop %r12
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r13
push %r9
push %rax
push %rbx
push %rdi
push %rsi
// Store
lea addresses_A+0x10ec2, %r13
nop
nop
add %rsi, %rsi
movl $0x51525354, (%r13)
nop
nop
nop
nop
xor $63547, %rbx
// Store
lea addresses_WC+0x19276, %r11
nop
nop
nop
nop
nop
add $2309, %rax
mov $0x5152535455565758, %r9
movq %r9, %xmm7
movups %xmm7, (%r11)
add $50250, %rbx
// Faulty Load
lea addresses_A+0x10ec2, %rbx
nop
inc %rax
mov (%rbx), %r11
lea oracles, %rbx
and $0xff, %r11
shlq $12, %r11
mov (%rbx,%r11,1), %r11
pop %rsi
pop %rdi
pop %rbx
pop %rax
pop %r9
pop %r13
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'src': {'congruent': 0, 'AVXalign': False, 'same': False, 'size': 16, 'NT': False, 'type': 'addresses_A'}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'congruent': 0, 'AVXalign': False, 'same': True, 'size': 4, 'NT': False, 'type': 'addresses_A'}}
{'OP': 'STOR', 'dst': {'congruent': 1, 'AVXalign': False, 'same': False, 'size': 16, 'NT': False, 'type': 'addresses_WC'}}
[Faulty Load]
{'src': {'congruent': 0, 'AVXalign': False, 'same': True, 'size': 8, 'NT': False, 'type': 'addresses_A'}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'OP': 'STOR', 'dst': {'congruent': 7, 'AVXalign': False, 'same': False, 'size': 16, 'NT': False, 'type': 'addresses_WT_ht'}}
{'src': {'congruent': 11, 'AVXalign': False, 'same': True, 'size': 8, 'NT': False, 'type': 'addresses_WC_ht'}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'congruent': 7, 'AVXalign': False, 'same': True, 'size': 8, 'NT': True, 'type': 'addresses_normal_ht'}}
{'src': {'congruent': 6, 'same': False, 'type': 'addresses_A_ht'}, 'OP': 'REPM', 'dst': {'congruent': 7, 'same': False, 'type': 'addresses_WC_ht'}}
{'OP': 'STOR', 'dst': {'congruent': 3, 'AVXalign': False, 'same': False, 'size': 32, 'NT': False, 'type': 'addresses_D_ht'}}
{'src': {'congruent': 4, 'AVXalign': False, 'same': False, 'size': 4, 'NT': False, 'type': 'addresses_WT_ht'}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'congruent': 5, 'AVXalign': False, 'same': False, 'size': 16, 'NT': False, 'type': 'addresses_normal_ht'}}
{'src': {'congruent': 4, 'AVXalign': False, 'same': False, 'size': 1, 'NT': False, 'type': 'addresses_UC_ht'}, 'OP': 'LOAD'}
{'54': 6543}
54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54
*/
| 36.88 | 2,999 | 0.657267 |
0e8f2e001cb1113f43d14c0f68de125a23a58afe | 714 | asm | Assembly | libsrc/_DEVELOPMENT/math/float/math32/z80/f32_fshexpop.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 640 | 2017-01-14T23:33:45.000Z | 2022-03-30T11:28:42.000Z | libsrc/_DEVELOPMENT/math/float/math32/z80/f32_fshexpop.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 1,600 | 2017-01-15T16:12:02.000Z | 2022-03-31T12:11:12.000Z | libsrc/_DEVELOPMENT/math/float/math32/z80/f32_fshexpop.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 215 | 2017-01-17T10:43:03.000Z | 2022-03-23T17:25:02.000Z |
SECTION code_clib
SECTION code_fp_math32
PUBLIC m32_dhexpop
EXTERN m32_fsmin
m32_dhexpop:
; strtod helper
;
; create double from mantissa on stack
;
; enter : stack = mantissa, ret
;
; exit : DEHL'= double
;
; uses : af, bc', de', hl'
exx
pop bc ; my return
pop hl ; sdcc_float
pop de
dec sp ; pop only 6 significant hex digits
push bc
ld a,$7f
.normmant
bit 7,e
jr NZ,normdone
sla l
rl h
rl e
dec a
jr Z,m32_fsmin ; safety net, in case something is borked
jr normmant
.normdone
ld d,a
sla e
srl d
rr e
exx
ret
| 13.730769 | 73 | 0.521008 |
4d046b91f13edd493165eeeeeed6198facfaad37 | 1,230 | asm | Assembly | cc4x86/tests/regressive/asm_listings/float2__optimize_noregalloc.asm | artyompal/C-compiler | 0c13e96b926d4c3282be8e9629cbc7ba439ea2d4 | [
"MIT"
] | 4 | 2017-03-19T20:10:55.000Z | 2022-01-20T08:34:25.000Z | cc4x86/tests/regressive/asm_listings/float2__optimize_noregalloc.asm | artyompal/C-compiler | 0c13e96b926d4c3282be8e9629cbc7ba439ea2d4 | [
"MIT"
] | null | null | null | cc4x86/tests/regressive/asm_listings/float2__optimize_noregalloc.asm | artyompal/C-compiler | 0c13e96b926d4c3282be8e9629cbc7ba439ea2d4 | [
"MIT"
] | null | null | null |
.686
.model flat
.xmm
.data
___unnamed_float_0 dd 040000000h
public ___unnamed_float_0
___unnamed_float_1 dd 03f800000h
public ___unnamed_float_1
___unnamed_float_2 dd 040400000h
public ___unnamed_float_2
___unnamed_float_3 dd 040800000h
public ___unnamed_float_3
.code
_test proc
create_stack_frame
; start of inline function test1
movss sse10,dword ptr [___unnamed_float_1]
addss sse10,dword ptr [___unnamed_float_0]
; end of inline function test1
comiss sse10,dword ptr [___unnamed_float_2]
je label0000
mov dword3,1
set_retval dword3
destroy_stack_frame
ret
label0000:
; start of inline function test2
movss sse15,dword ptr [___unnamed_float_0]
addss sse15,dword ptr [___unnamed_float_0]
; end of inline function test2
comiss sse15,dword ptr [___unnamed_float_3]
je label0001
mov dword6,2
set_retval dword6
destroy_stack_frame
ret
label0001:
mov dword7,0
set_retval dword7
destroy_stack_frame
ret
_test endp
end
| 24.6 | 53 | 0.634146 |
959ce0d34d48862dcd8a21749a80fea302ae74c2 | 467 | asm | Assembly | oeis/133/A133602.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/133/A133602.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/133/A133602.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A133602: The matrix-vector product A133080 * A000108.
; Submitted by Jamie Morken(w1)
; 1,2,2,7,14,56,132,561,1430,6292,16796,75582,208012,950912,2674440,12369285,35357670,165002460,477638700,2244901890,6564120420,31030387440,91482563640,434542177290,1289904147324,6151850548776
mov $3,$0
mod $0,2
mov $2,$0
add $2,1
lpb $2
mov $0,$3
sub $2,1
sub $0,$2
mov $1,$0
add $1,$0
bin $1,$0
add $0,1
div $1,$0
mul $1,4
add $4,$1
lpe
mov $0,$4
div $0,4
| 20.304348 | 192 | 0.683084 |
14f25fae4b7325053988d81ecc9f17d3dfd69722 | 789 | asm | Assembly | 0-nASM/6stdo.asm | NavinShrinivas/os-dev | 81e8e2f86cc3cbeca45c79dd1457f29aa0c2df35 | [
"MIT"
] | null | null | null | 0-nASM/6stdo.asm | NavinShrinivas/os-dev | 81e8e2f86cc3cbeca45c79dd1457f29aa0c2df35 | [
"MIT"
] | null | null | null | 0-nASM/6stdo.asm | NavinShrinivas/os-dev | 81e8e2f86cc3cbeca45c79dd1457f29aa0c2df35 | [
"MIT"
] | null | null | null | ;ye adding those line feeds in the end of those string worked in last program
;but we cant go around adding line feeds to end of strings is a stupid idea , c thinks otherwise , but still
;hence we are going write an other function to write linefeeds along with strings
;-----------------finds the len-----------------
slen:
push rax
mov rax,rsi
next:
cmp byte[rax],0
jz end
inc rax
jmp next
end:
sub rax,rsi
mov rdx,rax ;rdx has the len now
pop rax ;
ret
;-----------Print the msg-------------
sprint:
mov rax,1 ;syscalll for print
mov rdi,1 ;stdout
call slen
syscall
ret
sprintn:
call sprint
mov rsi,0
call sprint
ret
;------------Exit call----------
exit:
mov rax,60
mov rdi,0
syscall
ret
| 18.785714 | 108 | 0.590621 |
a2b9afbdf7f3a9ef7d37def12ed2c0476d5f0c6f | 10,064 | asm | Assembly | Transynther/x86/_processed/US/_st_zr_sm_/i7-7700_9_0xca.log_21829_1244.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/US/_st_zr_sm_/i7-7700_9_0xca.log_21829_1244.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/US/_st_zr_sm_/i7-7700_9_0xca.log_21829_1244.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r14
push %r15
push %r9
push %rbx
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_WT_ht+0xc480, %r15
nop
nop
nop
cmp %rdx, %rdx
mov $0x6162636465666768, %r14
movq %r14, %xmm1
vmovups %ymm1, (%r15)
nop
sub %rcx, %rcx
lea addresses_UC_ht+0x1b9c0, %r11
nop
and $38406, %rbx
mov (%r11), %dx
nop
sub %rbx, %rbx
lea addresses_normal_ht+0x480, %r14
nop
nop
sub %r9, %r9
mov (%r14), %edx
nop
nop
nop
nop
nop
xor %r14, %r14
lea addresses_D_ht+0x9840, %rdx
nop
nop
nop
and %r15, %r15
mov (%rdx), %r11w
nop
dec %r11
lea addresses_D_ht+0x143b0, %r11
nop
nop
nop
add $37648, %r14
mov (%r11), %cx
nop
nop
nop
nop
nop
and %r11, %r11
lea addresses_A_ht+0x11a5a, %r9
clflush (%r9)
nop
nop
nop
cmp $13655, %r11
movl $0x61626364, (%r9)
nop
nop
nop
nop
cmp $65143, %r9
lea addresses_normal_ht+0x8e00, %rsi
lea addresses_A_ht+0x9e80, %rdi
nop
nop
nop
nop
nop
xor %r15, %r15
mov $54, %rcx
rep movsq
nop
nop
nop
nop
nop
add %rdi, %rdi
lea addresses_A_ht+0x31c0, %r14
inc %rbx
mov $0x6162636465666768, %r15
movq %r15, %xmm4
movups %xmm4, (%r14)
nop
nop
nop
nop
nop
inc %rdi
lea addresses_D_ht+0x1cd80, %rsi
lea addresses_D_ht+0x15368, %rdi
nop
nop
nop
nop
nop
dec %r11
mov $6, %rcx
rep movsq
nop
cmp $6661, %rdx
lea addresses_normal_ht+0x69f0, %rsi
lea addresses_D_ht+0x6548, %rdi
nop
nop
nop
xor %r14, %r14
mov $15, %rcx
rep movsb
nop
nop
xor $28898, %r11
lea addresses_UC_ht+0x165a0, %r14
nop
nop
nop
nop
xor $30866, %rdi
movl $0x61626364, (%r14)
nop
xor %rdi, %rdi
lea addresses_normal_ht+0x19788, %rsi
lea addresses_D_ht+0x1e780, %rdi
nop
nop
nop
and %rdx, %rdx
mov $100, %rcx
rep movsq
nop
nop
nop
nop
nop
cmp $41536, %r11
lea addresses_WT_ht+0xac80, %r9
clflush (%r9)
nop
nop
nop
nop
lfence
movups (%r9), %xmm6
vpextrq $0, %xmm6, %r14
nop
nop
nop
nop
add %rdi, %rdi
lea addresses_A_ht+0xadf0, %r14
nop
nop
nop
sub %rdx, %rdx
movups (%r14), %xmm1
vpextrq $1, %xmm1, %r11
nop
nop
nop
and $35640, %rcx
lea addresses_normal_ht+0x1a080, %rbx
nop
nop
nop
nop
sub %rcx, %rcx
movl $0x61626364, (%rbx)
nop
nop
nop
nop
nop
sub %r14, %r14
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbx
pop %r9
pop %r15
pop %r14
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r13
push %r14
push %r8
push %rbp
push %rcx
push %rdi
// Load
mov $0x7a0, %rbp
nop
nop
nop
nop
cmp $37393, %rdi
mov (%rbp), %r13d
nop
and $46831, %rbp
// Store
lea addresses_WC+0x1f468, %r10
nop
and %r13, %r13
movw $0x5152, (%r10)
nop
nop
xor $36811, %rcx
// Store
mov $0x3ac8840000000c00, %r10
nop
inc %r8
movl $0x51525354, (%r10)
nop
sub %r13, %r13
// Store
lea addresses_PSE+0x5a68, %rcx
nop
nop
nop
nop
nop
and %rdi, %rdi
mov $0x5152535455565758, %r8
movq %r8, (%rcx)
nop
nop
nop
and $30526, %rbp
// Store
lea addresses_US+0x8080, %r10
clflush (%r10)
cmp %r14, %r14
movb $0x51, (%r10)
nop
and %r8, %r8
// Store
lea addresses_UC+0x1d264, %r14
nop
nop
nop
nop
nop
xor %r8, %r8
mov $0x5152535455565758, %rcx
movq %rcx, %xmm7
movups %xmm7, (%r14)
nop
nop
nop
nop
and $61796, %rbp
// Store
lea addresses_US+0x8080, %rdi
nop
nop
nop
cmp $7788, %r8
mov $0x5152535455565758, %rcx
movq %rcx, %xmm2
movups %xmm2, (%rdi)
nop
add $50303, %rbp
// Store
lea addresses_US+0x9cd4, %r13
nop
xor $17454, %rdi
mov $0x5152535455565758, %rcx
movq %rcx, %xmm4
movups %xmm4, (%r13)
nop
nop
nop
nop
nop
xor %rbp, %rbp
// Store
lea addresses_US+0x132c0, %r8
sub %rbp, %rbp
movl $0x51525354, (%r8)
nop
nop
nop
add $51097, %r8
// Faulty Load
lea addresses_US+0x8080, %rbp
nop
sub %r13, %r13
mov (%rbp), %cx
lea oracles, %rdi
and $0xff, %rcx
shlq $12, %rcx
mov (%rdi,%rcx,1), %rcx
pop %rdi
pop %rcx
pop %rbp
pop %r8
pop %r14
pop %r13
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'src': {'congruent': 0, 'AVXalign': True, 'same': False, 'size': 32, 'NT': False, 'type': 'addresses_US'}, 'OP': 'LOAD'}
{'src': {'congruent': 5, 'AVXalign': False, 'same': False, 'size': 4, 'NT': False, 'type': 'addresses_P'}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'congruent': 3, 'AVXalign': False, 'same': False, 'size': 2, 'NT': False, 'type': 'addresses_WC'}}
{'OP': 'STOR', 'dst': {'congruent': 1, 'AVXalign': True, 'same': False, 'size': 4, 'NT': False, 'type': 'addresses_NC'}}
{'OP': 'STOR', 'dst': {'congruent': 3, 'AVXalign': False, 'same': False, 'size': 8, 'NT': True, 'type': 'addresses_PSE'}}
{'OP': 'STOR', 'dst': {'congruent': 0, 'AVXalign': False, 'same': True, 'size': 1, 'NT': False, 'type': 'addresses_US'}}
{'OP': 'STOR', 'dst': {'congruent': 2, 'AVXalign': False, 'same': False, 'size': 16, 'NT': False, 'type': 'addresses_UC'}}
{'OP': 'STOR', 'dst': {'congruent': 0, 'AVXalign': False, 'same': True, 'size': 16, 'NT': False, 'type': 'addresses_US'}}
{'OP': 'STOR', 'dst': {'congruent': 0, 'AVXalign': False, 'same': False, 'size': 16, 'NT': False, 'type': 'addresses_US'}}
{'OP': 'STOR', 'dst': {'congruent': 6, 'AVXalign': False, 'same': False, 'size': 4, 'NT': False, 'type': 'addresses_US'}}
[Faulty Load]
{'src': {'congruent': 0, 'AVXalign': False, 'same': True, 'size': 2, 'NT': False, 'type': 'addresses_US'}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'OP': 'STOR', 'dst': {'congruent': 10, 'AVXalign': False, 'same': True, 'size': 32, 'NT': False, 'type': 'addresses_WT_ht'}}
{'src': {'congruent': 3, 'AVXalign': False, 'same': False, 'size': 2, 'NT': False, 'type': 'addresses_UC_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 9, 'AVXalign': False, 'same': False, 'size': 4, 'NT': False, 'type': 'addresses_normal_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 5, 'AVXalign': False, 'same': True, 'size': 2, 'NT': False, 'type': 'addresses_D_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 4, 'AVXalign': False, 'same': False, 'size': 2, 'NT': True, 'type': 'addresses_D_ht'}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'congruent': 0, 'AVXalign': False, 'same': False, 'size': 4, 'NT': False, 'type': 'addresses_A_ht'}}
{'src': {'congruent': 7, 'same': False, 'type': 'addresses_normal_ht'}, 'OP': 'REPM', 'dst': {'congruent': 9, 'same': False, 'type': 'addresses_A_ht'}}
{'OP': 'STOR', 'dst': {'congruent': 6, 'AVXalign': False, 'same': False, 'size': 16, 'NT': False, 'type': 'addresses_A_ht'}}
{'src': {'congruent': 7, 'same': False, 'type': 'addresses_D_ht'}, 'OP': 'REPM', 'dst': {'congruent': 2, 'same': False, 'type': 'addresses_D_ht'}}
{'src': {'congruent': 4, 'same': False, 'type': 'addresses_normal_ht'}, 'OP': 'REPM', 'dst': {'congruent': 3, 'same': False, 'type': 'addresses_D_ht'}}
{'OP': 'STOR', 'dst': {'congruent': 5, 'AVXalign': False, 'same': False, 'size': 4, 'NT': False, 'type': 'addresses_UC_ht'}}
{'src': {'congruent': 1, 'same': False, 'type': 'addresses_normal_ht'}, 'OP': 'REPM', 'dst': {'congruent': 8, 'same': False, 'type': 'addresses_D_ht'}}
{'src': {'congruent': 10, 'AVXalign': False, 'same': True, 'size': 16, 'NT': False, 'type': 'addresses_WT_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 3, 'AVXalign': False, 'same': False, 'size': 16, 'NT': False, 'type': 'addresses_A_ht'}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'congruent': 10, 'AVXalign': False, 'same': False, 'size': 4, 'NT': False, 'type': 'addresses_normal_ht'}}
{'00': 57, '58': 21772}
58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 00 58 58 58 58 00 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 00 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 00 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 00 58 58 58 58 58 58 58
*/
| 28.111732 | 2,999 | 0.650437 |
bd758c995a6c76a158ce9b9ac00fa79b6fb813c7 | 64,889 | asm | Assembly | uniq.asm | Vignesh-Nadar/xv6 | 601dda244865540bb0ace21a2ff5ae7e6cf181f9 | [
"MIT-0"
] | null | null | null | uniq.asm | Vignesh-Nadar/xv6 | 601dda244865540bb0ace21a2ff5ae7e6cf181f9 | [
"MIT-0"
] | null | null | null | uniq.asm | Vignesh-Nadar/xv6 | 601dda244865540bb0ace21a2ff5ae7e6cf181f9 | [
"MIT-0"
] | null | null | null |
_uniq: file format elf32-i386
Disassembly of section .text:
00000000 <get_line>:
* 3: only print duplicate lines
*/
int output_format = 1;
int ignore_case = 0;
int get_line(char *line_ptr, int max, int fd) {
0: 55 push %ebp
1: 89 e5 mov %esp,%ebp
3: 83 ec 28 sub $0x28,%esp
memset(line_ptr, DEFAULT, MAX_BUF);
6: c7 44 24 08 00 04 00 movl $0x400,0x8(%esp)
d: 00
e: c7 44 24 04 00 00 00 movl $0x0,0x4(%esp)
15: 00
16: 8b 45 08 mov 0x8(%ebp),%eax
19: 89 04 24 mov %eax,(%esp)
1c: e8 a4 06 00 00 call 6c5 <memset>
// int n;
char *dst = line_ptr;
21: 8b 45 08 mov 0x8(%ebp),%eax
24: 89 45 f4 mov %eax,-0xc(%ebp)
while ((read(fd, buf, 1)) > 0) {
27: eb 45 jmp 6e <get_line+0x6e>
if (buf[0] == '\n') {
29: 0f b6 05 80 11 00 00 movzbl 0x1180,%eax
30: 3c 0a cmp $0xa,%al
32: 75 14 jne 48 <get_line+0x48>
*dst++ = buf[0];
34: 8b 45 f4 mov -0xc(%ebp),%eax
37: 8d 50 01 lea 0x1(%eax),%edx
3a: 89 55 f4 mov %edx,-0xc(%ebp)
3d: 0f b6 15 80 11 00 00 movzbl 0x1180,%edx
44: 88 10 mov %dl,(%eax)
break;
46: eb 45 jmp 8d <get_line+0x8d>
} else {
*dst++ = buf[0];
48: 8b 45 f4 mov -0xc(%ebp),%eax
4b: 8d 50 01 lea 0x1(%eax),%edx
4e: 89 55 f4 mov %edx,-0xc(%ebp)
51: 0f b6 15 80 11 00 00 movzbl 0x1180,%edx
58: 88 10 mov %dl,(%eax)
if ((dst - line_ptr) + 1 > max) {
5a: 8b 55 f4 mov -0xc(%ebp),%edx
5d: 8b 45 08 mov 0x8(%ebp),%eax
60: 29 c2 sub %eax,%edx
62: 89 d0 mov %edx,%eax
64: 83 c0 01 add $0x1,%eax
67: 3b 45 0c cmp 0xc(%ebp),%eax
6a: 7e 02 jle 6e <get_line+0x6e>
break;
6c: eb 1f jmp 8d <get_line+0x8d>
int get_line(char *line_ptr, int max, int fd) {
memset(line_ptr, DEFAULT, MAX_BUF);
// int n;
char *dst = line_ptr;
while ((read(fd, buf, 1)) > 0) {
6e: c7 44 24 08 01 00 00 movl $0x1,0x8(%esp)
75: 00
76: c7 44 24 04 80 11 00 movl $0x1180,0x4(%esp)
7d: 00
7e: 8b 45 10 mov 0x10(%ebp),%eax
81: 89 04 24 mov %eax,(%esp)
84: e8 01 08 00 00 call 88a <read>
89: 85 c0 test %eax,%eax
8b: 7f 9c jg 29 <get_line+0x29>
}
}
}
// If the last line doesn't have `\n`, add it manually
if (*(dst - 1) != '\n') *dst = '\n';
8d: 8b 45 f4 mov -0xc(%ebp),%eax
90: 83 e8 01 sub $0x1,%eax
93: 0f b6 00 movzbl (%eax),%eax
96: 3c 0a cmp $0xa,%al
98: 74 06 je a0 <get_line+0xa0>
9a: 8b 45 f4 mov -0xc(%ebp),%eax
9d: c6 00 0a movb $0xa,(%eax)
return dst - line_ptr;
a0: 8b 55 f4 mov -0xc(%ebp),%edx
a3: 8b 45 08 mov 0x8(%ebp),%eax
a6: 29 c2 sub %eax,%edx
a8: 89 d0 mov %edx,%eax
}
aa: c9 leave
ab: c3 ret
000000ac <tolower>:
uchar tolower(uchar ch) {
ac: 55 push %ebp
ad: 89 e5 mov %esp,%ebp
af: 83 ec 04 sub $0x4,%esp
b2: 8b 45 08 mov 0x8(%ebp),%eax
b5: 88 45 fc mov %al,-0x4(%ebp)
if (ch >= 'A' && ch <= 'Z')
b8: 80 7d fc 40 cmpb $0x40,-0x4(%ebp)
bc: 76 0a jbe c8 <tolower+0x1c>
be: 80 7d fc 5a cmpb $0x5a,-0x4(%ebp)
c2: 77 04 ja c8 <tolower+0x1c>
ch = 'a' + (ch - 'A');
c4: 80 45 fc 20 addb $0x20,-0x4(%ebp)
return ch;
c8: 0f b6 45 fc movzbl -0x4(%ebp),%eax
}
cc: c9 leave
cd: c3 ret
000000ce <strcicmp>:
* Comprea two case-insensentive strings
* @param p
* @param q
* @return
*/
int strcicmp(const char *p, const char *q) {
ce: 55 push %ebp
cf: 89 e5 mov %esp,%ebp
d1: 53 push %ebx
d2: 83 ec 04 sub $0x4,%esp
while (*p && tolower(*p) == tolower(*q))
d5: eb 08 jmp df <strcicmp+0x11>
p++, q++;
d7: 83 45 08 01 addl $0x1,0x8(%ebp)
db: 83 45 0c 01 addl $0x1,0xc(%ebp)
* @param p
* @param q
* @return
*/
int strcicmp(const char *p, const char *q) {
while (*p && tolower(*p) == tolower(*q))
df: 8b 45 08 mov 0x8(%ebp),%eax
e2: 0f b6 00 movzbl (%eax),%eax
e5: 84 c0 test %al,%al
e7: 74 28 je 111 <strcicmp+0x43>
e9: 8b 45 08 mov 0x8(%ebp),%eax
ec: 0f b6 00 movzbl (%eax),%eax
ef: 0f b6 c0 movzbl %al,%eax
f2: 89 04 24 mov %eax,(%esp)
f5: e8 b2 ff ff ff call ac <tolower>
fa: 89 c3 mov %eax,%ebx
fc: 8b 45 0c mov 0xc(%ebp),%eax
ff: 0f b6 00 movzbl (%eax),%eax
102: 0f b6 c0 movzbl %al,%eax
105: 89 04 24 mov %eax,(%esp)
108: e8 9f ff ff ff call ac <tolower>
10d: 38 c3 cmp %al,%bl
10f: 74 c6 je d7 <strcicmp+0x9>
p++, q++;
return (uchar) *p - (uchar) *q;
111: 8b 45 08 mov 0x8(%ebp),%eax
114: 0f b6 00 movzbl (%eax),%eax
117: 0f b6 d0 movzbl %al,%edx
11a: 8b 45 0c mov 0xc(%ebp),%eax
11d: 0f b6 00 movzbl (%eax),%eax
120: 0f b6 c0 movzbl %al,%eax
123: 29 c2 sub %eax,%edx
125: 89 d0 mov %edx,%eax
}
127: 83 c4 04 add $0x4,%esp
12a: 5b pop %ebx
12b: 5d pop %ebp
12c: c3 ret
0000012d <output>:
void output(int stdout, char *line, int count, int has_prefix) {
12d: 55 push %ebp
12e: 89 e5 mov %esp,%ebp
130: 83 ec 18 sub $0x18,%esp
if (has_prefix) {
133: 83 7d 14 00 cmpl $0x0,0x14(%ebp)
137: 74 23 je 15c <output+0x2f>
printf(stdout, "%d %s", count, line);
139: 8b 45 0c mov 0xc(%ebp),%eax
13c: 89 44 24 0c mov %eax,0xc(%esp)
140: 8b 45 10 mov 0x10(%ebp),%eax
143: 89 44 24 08 mov %eax,0x8(%esp)
147: c7 44 24 04 de 0d 00 movl $0xdde,0x4(%esp)
14e: 00
14f: 8b 45 08 mov 0x8(%ebp),%eax
152: 89 04 24 mov %eax,(%esp)
155: e8 b8 08 00 00 call a12 <printf>
15a: eb 1a jmp 176 <output+0x49>
} else {
printf(stdout, "%s", line);
15c: 8b 45 0c mov 0xc(%ebp),%eax
15f: 89 44 24 08 mov %eax,0x8(%esp)
163: c7 44 24 04 e4 0d 00 movl $0xde4,0x4(%esp)
16a: 00
16b: 8b 45 08 mov 0x8(%ebp),%eax
16e: 89 04 24 mov %eax,(%esp)
171: e8 9c 08 00 00 call a12 <printf>
}
}
176: c9 leave
177: c3 ret
00000178 <uniq>:
void uniq(int fd) {
178: 55 push %ebp
179: 89 e5 mov %esp,%ebp
17b: 83 ec 38 sub $0x38,%esp
char *prev = NULL, *cur = NULL;
17e: c7 45 f4 00 00 00 00 movl $0x0,-0xc(%ebp)
185: c7 45 f0 00 00 00 00 movl $0x0,-0x10(%ebp)
char *line_ptr = (char *) malloc(MAX_BUF * sizeof(char));
18c: c7 04 24 00 04 00 00 movl $0x400,(%esp)
193: e8 66 0b 00 00 call cfe <malloc>
198: 89 45 e4 mov %eax,-0x1c(%ebp)
int count = 0;
19b: c7 45 ec 00 00 00 00 movl $0x0,-0x14(%ebp)
while ((get_line(line_ptr, MAX_BUF, fd)) > 0) {
1a2: e9 cc 01 00 00 jmp 373 <uniq+0x1fb>
if (prev == NULL) {
1a7: 83 7d f4 00 cmpl $0x0,-0xc(%ebp)
1ab: 0f 85 8e 00 00 00 jne 23f <uniq+0xc7>
prev = (char *) malloc(MAX_BUF * sizeof(char));
1b1: c7 04 24 00 04 00 00 movl $0x400,(%esp)
1b8: e8 41 0b 00 00 call cfe <malloc>
1bd: 89 45 f4 mov %eax,-0xc(%ebp)
cur = (char *) malloc(MAX_BUF * sizeof(char));
1c0: c7 04 24 00 04 00 00 movl $0x400,(%esp)
1c7: e8 32 0b 00 00 call cfe <malloc>
1cc: 89 45 f0 mov %eax,-0x10(%ebp)
memmove(prev, line_ptr, MAX_BUF);
1cf: c7 44 24 08 00 04 00 movl $0x400,0x8(%esp)
1d6: 00
1d7: 8b 45 e4 mov -0x1c(%ebp),%eax
1da: 89 44 24 04 mov %eax,0x4(%esp)
1de: 8b 45 f4 mov -0xc(%ebp),%eax
1e1: 89 04 24 mov %eax,(%esp)
1e4: e8 44 06 00 00 call 82d <memmove>
memmove(cur, line_ptr, MAX_BUF);
1e9: c7 44 24 08 00 04 00 movl $0x400,0x8(%esp)
1f0: 00
1f1: 8b 45 e4 mov -0x1c(%ebp),%eax
1f4: 89 44 24 04 mov %eax,0x4(%esp)
1f8: 8b 45 f0 mov -0x10(%ebp),%eax
1fb: 89 04 24 mov %eax,(%esp)
1fe: e8 2a 06 00 00 call 82d <memmove>
count = 1;
203: c7 45 ec 01 00 00 00 movl $0x1,-0x14(%ebp)
if (output_format == 1) {
20a: a1 30 11 00 00 mov 0x1130,%eax
20f: 83 f8 01 cmp $0x1,%eax
212: 0f 85 41 01 00 00 jne 359 <uniq+0x1e1>
output(1, cur, count, 0);
218: c7 44 24 0c 00 00 00 movl $0x0,0xc(%esp)
21f: 00
220: 8b 45 ec mov -0x14(%ebp),%eax
223: 89 44 24 08 mov %eax,0x8(%esp)
227: 8b 45 f0 mov -0x10(%ebp),%eax
22a: 89 44 24 04 mov %eax,0x4(%esp)
22e: c7 04 24 01 00 00 00 movl $0x1,(%esp)
235: e8 f3 fe ff ff call 12d <output>
23a: e9 1a 01 00 00 jmp 359 <uniq+0x1e1>
}
} else {
memmove(cur, line_ptr, MAX_BUF);
23f: c7 44 24 08 00 04 00 movl $0x400,0x8(%esp)
246: 00
247: 8b 45 e4 mov -0x1c(%ebp),%eax
24a: 89 44 24 04 mov %eax,0x4(%esp)
24e: 8b 45 f0 mov -0x10(%ebp),%eax
251: 89 04 24 mov %eax,(%esp)
254: e8 d4 05 00 00 call 82d <memmove>
int cmp_result;
if (ignore_case) {
259: a1 60 11 00 00 mov 0x1160,%eax
25e: 85 c0 test %eax,%eax
260: 74 17 je 279 <uniq+0x101>
cmp_result = strcicmp(cur, prev);
262: 8b 45 f4 mov -0xc(%ebp),%eax
265: 89 44 24 04 mov %eax,0x4(%esp)
269: 8b 45 f0 mov -0x10(%ebp),%eax
26c: 89 04 24 mov %eax,(%esp)
26f: e8 5a fe ff ff call ce <strcicmp>
274: 89 45 e8 mov %eax,-0x18(%ebp)
277: eb 15 jmp 28e <uniq+0x116>
} else {
cmp_result = strcmp(cur, prev);
279: 8b 45 f4 mov -0xc(%ebp),%eax
27c: 89 44 24 04 mov %eax,0x4(%esp)
280: 8b 45 f0 mov -0x10(%ebp),%eax
283: 89 04 24 mov %eax,(%esp)
286: e8 d4 03 00 00 call 65f <strcmp>
28b: 89 45 e8 mov %eax,-0x18(%ebp)
}
if (cmp_result == 0) {
28e: 83 7d e8 00 cmpl $0x0,-0x18(%ebp)
292: 75 30 jne 2c4 <uniq+0x14c>
count++;
294: 83 45 ec 01 addl $0x1,-0x14(%ebp)
if (ignore_case) {
298: a1 60 11 00 00 mov 0x1160,%eax
29d: 85 c0 test %eax,%eax
29f: 0f 84 b4 00 00 00 je 359 <uniq+0x1e1>
memmove(cur, prev, MAX_BUF);
2a5: c7 44 24 08 00 04 00 movl $0x400,0x8(%esp)
2ac: 00
2ad: 8b 45 f4 mov -0xc(%ebp),%eax
2b0: 89 44 24 04 mov %eax,0x4(%esp)
2b4: 8b 45 f0 mov -0x10(%ebp),%eax
2b7: 89 04 24 mov %eax,(%esp)
2ba: e8 6e 05 00 00 call 82d <memmove>
2bf: e9 95 00 00 00 jmp 359 <uniq+0x1e1>
}
} else {
if (output_format == 1) {
2c4: a1 30 11 00 00 mov 0x1130,%eax
2c9: 83 f8 01 cmp $0x1,%eax
2cc: 75 24 jne 2f2 <uniq+0x17a>
output(1, cur, count, 0);
2ce: c7 44 24 0c 00 00 00 movl $0x0,0xc(%esp)
2d5: 00
2d6: 8b 45 ec mov -0x14(%ebp),%eax
2d9: 89 44 24 08 mov %eax,0x8(%esp)
2dd: 8b 45 f0 mov -0x10(%ebp),%eax
2e0: 89 44 24 04 mov %eax,0x4(%esp)
2e4: c7 04 24 01 00 00 00 movl $0x1,(%esp)
2eb: e8 3d fe ff ff call 12d <output>
2f0: eb 60 jmp 352 <uniq+0x1da>
} else if (output_format == 3 && count > 1) {
2f2: a1 30 11 00 00 mov 0x1130,%eax
2f7: 83 f8 03 cmp $0x3,%eax
2fa: 75 2a jne 326 <uniq+0x1ae>
2fc: 83 7d ec 01 cmpl $0x1,-0x14(%ebp)
300: 7e 24 jle 326 <uniq+0x1ae>
output(1, prev, count, 0);
302: c7 44 24 0c 00 00 00 movl $0x0,0xc(%esp)
309: 00
30a: 8b 45 ec mov -0x14(%ebp),%eax
30d: 89 44 24 08 mov %eax,0x8(%esp)
311: 8b 45 f4 mov -0xc(%ebp),%eax
314: 89 44 24 04 mov %eax,0x4(%esp)
318: c7 04 24 01 00 00 00 movl $0x1,(%esp)
31f: e8 09 fe ff ff call 12d <output>
324: eb 2c jmp 352 <uniq+0x1da>
} else if (output_format == 2) {
326: a1 30 11 00 00 mov 0x1130,%eax
32b: 83 f8 02 cmp $0x2,%eax
32e: 75 22 jne 352 <uniq+0x1da>
output(1, prev, count, 1);
330: c7 44 24 0c 01 00 00 movl $0x1,0xc(%esp)
337: 00
338: 8b 45 ec mov -0x14(%ebp),%eax
33b: 89 44 24 08 mov %eax,0x8(%esp)
33f: 8b 45 f4 mov -0xc(%ebp),%eax
342: 89 44 24 04 mov %eax,0x4(%esp)
346: c7 04 24 01 00 00 00 movl $0x1,(%esp)
34d: e8 db fd ff ff call 12d <output>
}
count = 1;
352: c7 45 ec 01 00 00 00 movl $0x1,-0x14(%ebp)
}
}
memmove(prev, cur, MAX_BUF);
359: c7 44 24 08 00 04 00 movl $0x400,0x8(%esp)
360: 00
361: 8b 45 f0 mov -0x10(%ebp),%eax
364: 89 44 24 04 mov %eax,0x4(%esp)
368: 8b 45 f4 mov -0xc(%ebp),%eax
36b: 89 04 24 mov %eax,(%esp)
36e: e8 ba 04 00 00 call 82d <memmove>
void uniq(int fd) {
char *prev = NULL, *cur = NULL;
char *line_ptr = (char *) malloc(MAX_BUF * sizeof(char));
int count = 0;
while ((get_line(line_ptr, MAX_BUF, fd)) > 0) {
373: 8b 45 08 mov 0x8(%ebp),%eax
376: 89 44 24 08 mov %eax,0x8(%esp)
37a: c7 44 24 04 00 04 00 movl $0x400,0x4(%esp)
381: 00
382: 8b 45 e4 mov -0x1c(%ebp),%eax
385: 89 04 24 mov %eax,(%esp)
388: e8 73 fc ff ff call 0 <get_line>
38d: 85 c0 test %eax,%eax
38f: 0f 8f 12 fe ff ff jg 1a7 <uniq+0x2f>
count = 1;
}
}
memmove(prev, cur, MAX_BUF);
}
if ((output_format == 3 && count > 1)) {
395: a1 30 11 00 00 mov 0x1130,%eax
39a: 83 f8 03 cmp $0x3,%eax
39d: 75 2a jne 3c9 <uniq+0x251>
39f: 83 7d ec 01 cmpl $0x1,-0x14(%ebp)
3a3: 7e 24 jle 3c9 <uniq+0x251>
output(1, cur, count, 0);
3a5: c7 44 24 0c 00 00 00 movl $0x0,0xc(%esp)
3ac: 00
3ad: 8b 45 ec mov -0x14(%ebp),%eax
3b0: 89 44 24 08 mov %eax,0x8(%esp)
3b4: 8b 45 f0 mov -0x10(%ebp),%eax
3b7: 89 44 24 04 mov %eax,0x4(%esp)
3bb: c7 04 24 01 00 00 00 movl $0x1,(%esp)
3c2: e8 66 fd ff ff call 12d <output>
3c7: eb 2c jmp 3f5 <uniq+0x27d>
} else if (output_format == 2) {
3c9: a1 30 11 00 00 mov 0x1130,%eax
3ce: 83 f8 02 cmp $0x2,%eax
3d1: 75 22 jne 3f5 <uniq+0x27d>
output(1, cur, count, 1);
3d3: c7 44 24 0c 01 00 00 movl $0x1,0xc(%esp)
3da: 00
3db: 8b 45 ec mov -0x14(%ebp),%eax
3de: 89 44 24 08 mov %eax,0x8(%esp)
3e2: 8b 45 f0 mov -0x10(%ebp),%eax
3e5: 89 44 24 04 mov %eax,0x4(%esp)
3e9: c7 04 24 01 00 00 00 movl $0x1,(%esp)
3f0: e8 38 fd ff ff call 12d <output>
}
free(prev);
3f5: 8b 45 f4 mov -0xc(%ebp),%eax
3f8: 89 04 24 mov %eax,(%esp)
3fb: e8 c5 07 00 00 call bc5 <free>
free(cur);
400: 8b 45 f0 mov -0x10(%ebp),%eax
403: 89 04 24 mov %eax,(%esp)
406: e8 ba 07 00 00 call bc5 <free>
free(line_ptr);
40b: 8b 45 e4 mov -0x1c(%ebp),%eax
40e: 89 04 24 mov %eax,(%esp)
411: e8 af 07 00 00 call bc5 <free>
}
416: c9 leave
417: c3 ret
00000418 <get_next_opt>:
* @return
* -1: reach the end
* -2: invalid option
* others: ASCII
*/
int get_next_opt(int argc, char *argv[], char *opts) {
418: 55 push %ebp
419: 89 e5 mov %esp,%ebp
41b: 83 ec 28 sub $0x28,%esp
if (argidx >= argc - 1) {
41e: 8b 45 08 mov 0x8(%ebp),%eax
421: 8d 50 ff lea -0x1(%eax),%edx
424: a1 2c 11 00 00 mov 0x112c,%eax
429: 39 c2 cmp %eax,%edx
42b: 7f 07 jg 434 <get_next_opt+0x1c>
return -1;
42d: b8 ff ff ff ff mov $0xffffffff,%eax
432: eb 7a jmp 4ae <get_next_opt+0x96>
}
char *arg = argv[argidx];
434: a1 2c 11 00 00 mov 0x112c,%eax
439: 8d 14 85 00 00 00 00 lea 0x0(,%eax,4),%edx
440: 8b 45 0c mov 0xc(%ebp),%eax
443: 01 d0 add %edx,%eax
445: 8b 00 mov (%eax),%eax
447: 89 45 f4 mov %eax,-0xc(%ebp)
if (arg[0] != '-' || (strchr(opts, arg[1]) == 0)) {
44a: 8b 45 f4 mov -0xc(%ebp),%eax
44d: 0f b6 00 movzbl (%eax),%eax
450: 3c 2d cmp $0x2d,%al
452: 75 1f jne 473 <get_next_opt+0x5b>
454: 8b 45 f4 mov -0xc(%ebp),%eax
457: 83 c0 01 add $0x1,%eax
45a: 0f b6 00 movzbl (%eax),%eax
45d: 0f be c0 movsbl %al,%eax
460: 89 44 24 04 mov %eax,0x4(%esp)
464: 8b 45 10 mov 0x10(%ebp),%eax
467: 89 04 24 mov %eax,(%esp)
46a: e8 7a 02 00 00 call 6e9 <strchr>
46f: 85 c0 test %eax,%eax
471: 75 22 jne 495 <get_next_opt+0x7d>
printf(1, "uniq: invalid option %s\n", arg);
473: 8b 45 f4 mov -0xc(%ebp),%eax
476: 89 44 24 08 mov %eax,0x8(%esp)
47a: c7 44 24 04 e7 0d 00 movl $0xde7,0x4(%esp)
481: 00
482: c7 04 24 01 00 00 00 movl $0x1,(%esp)
489: e8 84 05 00 00 call a12 <printf>
return -2;
48e: b8 fe ff ff ff mov $0xfffffffe,%eax
493: eb 19 jmp 4ae <get_next_opt+0x96>
} else {
argidx++;
495: a1 2c 11 00 00 mov 0x112c,%eax
49a: 83 c0 01 add $0x1,%eax
49d: a3 2c 11 00 00 mov %eax,0x112c
return arg[1];
4a2: 8b 45 f4 mov -0xc(%ebp),%eax
4a5: 83 c0 01 add $0x1,%eax
4a8: 0f b6 00 movzbl (%eax),%eax
4ab: 0f be c0 movsbl %al,%eax
}
}
4ae: c9 leave
4af: c3 ret
000004b0 <main>:
int main(int argc, char *argv[]) {
4b0: 55 push %ebp
4b1: 89 e5 mov %esp,%ebp
4b3: 83 e4 f0 and $0xfffffff0,%esp
4b6: 83 ec 20 sub $0x20,%esp
int fd;
int c;
char *options = "cdi";
4b9: c7 44 24 1c 00 0e 00 movl $0xe00,0x1c(%esp)
4c0: 00
if (argc <= 1) {
4c1: 83 7d 08 01 cmpl $0x1,0x8(%ebp)
4c5: 7f 11 jg 4d8 <main+0x28>
uniq(0);
4c7: c7 04 24 00 00 00 00 movl $0x0,(%esp)
4ce: e8 a5 fc ff ff call 178 <uniq>
exit();
4d3: e8 9a 03 00 00 call 872 <exit>
} else if (argc == 2) {
4d8: 83 7d 08 02 cmpl $0x2,0x8(%ebp)
4dc: 75 59 jne 537 <main+0x87>
if ((fd = open(argv[1], 0)) < 0) {
4de: 8b 45 0c mov 0xc(%ebp),%eax
4e1: 83 c0 04 add $0x4,%eax
4e4: 8b 00 mov (%eax),%eax
4e6: c7 44 24 04 00 00 00 movl $0x0,0x4(%esp)
4ed: 00
4ee: 89 04 24 mov %eax,(%esp)
4f1: e8 bc 03 00 00 call 8b2 <open>
4f6: 89 44 24 18 mov %eax,0x18(%esp)
4fa: 83 7c 24 18 00 cmpl $0x0,0x18(%esp)
4ff: 79 25 jns 526 <main+0x76>
printf(1, "uniq: cannot open %s\n", argv[1]);
501: 8b 45 0c mov 0xc(%ebp),%eax
504: 83 c0 04 add $0x4,%eax
507: 8b 00 mov (%eax),%eax
509: 89 44 24 08 mov %eax,0x8(%esp)
50d: c7 44 24 04 04 0e 00 movl $0xe04,0x4(%esp)
514: 00
515: c7 04 24 01 00 00 00 movl $0x1,(%esp)
51c: e8 f1 04 00 00 call a12 <printf>
exit();
521: e8 4c 03 00 00 call 872 <exit>
}
uniq(fd);
526: 8b 44 24 18 mov 0x18(%esp),%eax
52a: 89 04 24 mov %eax,(%esp)
52d: e8 46 fc ff ff call 178 <uniq>
exit();
532: e8 3b 03 00 00 call 872 <exit>
} else if (argc >= 3) {
537: 83 7d 08 02 cmpl $0x2,0x8(%ebp)
53b: 0f 8e c4 00 00 00 jle 605 <main+0x155>
while ((c = get_next_opt(argc, argv, options)) > 0) {
541: eb 36 jmp 579 <main+0xc9>
switch (c) {
543: 8b 44 24 14 mov 0x14(%esp),%eax
547: 83 f8 64 cmp $0x64,%eax
54a: 74 16 je 562 <main+0xb2>
54c: 83 f8 69 cmp $0x69,%eax
54f: 74 1d je 56e <main+0xbe>
551: 83 f8 63 cmp $0x63,%eax
554: 75 23 jne 579 <main+0xc9>
case 'c':
output_format = 2;
556: c7 05 30 11 00 00 02 movl $0x2,0x1130
55d: 00 00 00
break;
560: eb 17 jmp 579 <main+0xc9>
case 'd':
output_format = 3;
562: c7 05 30 11 00 00 03 movl $0x3,0x1130
569: 00 00 00
break;
56c: eb 0b jmp 579 <main+0xc9>
case 'i':
ignore_case = 1;
56e: c7 05 60 11 00 00 01 movl $0x1,0x1160
575: 00 00 00
break;
578: 90 nop
exit();
}
uniq(fd);
exit();
} else if (argc >= 3) {
while ((c = get_next_opt(argc, argv, options)) > 0) {
579: 8b 44 24 1c mov 0x1c(%esp),%eax
57d: 89 44 24 08 mov %eax,0x8(%esp)
581: 8b 45 0c mov 0xc(%ebp),%eax
584: 89 44 24 04 mov %eax,0x4(%esp)
588: 8b 45 08 mov 0x8(%ebp),%eax
58b: 89 04 24 mov %eax,(%esp)
58e: e8 85 fe ff ff call 418 <get_next_opt>
593: 89 44 24 14 mov %eax,0x14(%esp)
597: 83 7c 24 14 00 cmpl $0x0,0x14(%esp)
59c: 7f a5 jg 543 <main+0x93>
case 'i':
ignore_case = 1;
break;
}
}
if ((fd = open(argv[argc - 1], 0)) < 0) {
59e: 8b 45 08 mov 0x8(%ebp),%eax
5a1: 05 ff ff ff 3f add $0x3fffffff,%eax
5a6: 8d 14 85 00 00 00 00 lea 0x0(,%eax,4),%edx
5ad: 8b 45 0c mov 0xc(%ebp),%eax
5b0: 01 d0 add %edx,%eax
5b2: 8b 00 mov (%eax),%eax
5b4: c7 44 24 04 00 00 00 movl $0x0,0x4(%esp)
5bb: 00
5bc: 89 04 24 mov %eax,(%esp)
5bf: e8 ee 02 00 00 call 8b2 <open>
5c4: 89 44 24 18 mov %eax,0x18(%esp)
5c8: 83 7c 24 18 00 cmpl $0x0,0x18(%esp)
5cd: 79 25 jns 5f4 <main+0x144>
printf(1, "uniq: cannot open %s\n", argv[1]);
5cf: 8b 45 0c mov 0xc(%ebp),%eax
5d2: 83 c0 04 add $0x4,%eax
5d5: 8b 00 mov (%eax),%eax
5d7: 89 44 24 08 mov %eax,0x8(%esp)
5db: c7 44 24 04 04 0e 00 movl $0xe04,0x4(%esp)
5e2: 00
5e3: c7 04 24 01 00 00 00 movl $0x1,(%esp)
5ea: e8 23 04 00 00 call a12 <printf>
exit();
5ef: e8 7e 02 00 00 call 872 <exit>
}
uniq(fd);
5f4: 8b 44 24 18 mov 0x18(%esp),%eax
5f8: 89 04 24 mov %eax,(%esp)
5fb: e8 78 fb ff ff call 178 <uniq>
exit();
600: e8 6d 02 00 00 call 872 <exit>
}
exit();
605: e8 68 02 00 00 call 872 <exit>
0000060a <stosb>:
"cc");
}
static inline void
stosb(void *addr, int data, int cnt)
{
60a: 55 push %ebp
60b: 89 e5 mov %esp,%ebp
60d: 57 push %edi
60e: 53 push %ebx
asm volatile("cld; rep stosb" :
60f: 8b 4d 08 mov 0x8(%ebp),%ecx
612: 8b 55 10 mov 0x10(%ebp),%edx
615: 8b 45 0c mov 0xc(%ebp),%eax
618: 89 cb mov %ecx,%ebx
61a: 89 df mov %ebx,%edi
61c: 89 d1 mov %edx,%ecx
61e: fc cld
61f: f3 aa rep stos %al,%es:(%edi)
621: 89 ca mov %ecx,%edx
623: 89 fb mov %edi,%ebx
625: 89 5d 08 mov %ebx,0x8(%ebp)
628: 89 55 10 mov %edx,0x10(%ebp)
"=D" (addr), "=c" (cnt) :
"0" (addr), "1" (cnt), "a" (data) :
"memory", "cc");
}
62b: 5b pop %ebx
62c: 5f pop %edi
62d: 5d pop %ebp
62e: c3 ret
0000062f <strcpy>:
#include "user.h"
#include "x86.h"
char*
strcpy(char *s, char *t)
{
62f: 55 push %ebp
630: 89 e5 mov %esp,%ebp
632: 83 ec 10 sub $0x10,%esp
char *os;
os = s;
635: 8b 45 08 mov 0x8(%ebp),%eax
638: 89 45 fc mov %eax,-0x4(%ebp)
while((*s++ = *t++) != 0)
63b: 90 nop
63c: 8b 45 08 mov 0x8(%ebp),%eax
63f: 8d 50 01 lea 0x1(%eax),%edx
642: 89 55 08 mov %edx,0x8(%ebp)
645: 8b 55 0c mov 0xc(%ebp),%edx
648: 8d 4a 01 lea 0x1(%edx),%ecx
64b: 89 4d 0c mov %ecx,0xc(%ebp)
64e: 0f b6 12 movzbl (%edx),%edx
651: 88 10 mov %dl,(%eax)
653: 0f b6 00 movzbl (%eax),%eax
656: 84 c0 test %al,%al
658: 75 e2 jne 63c <strcpy+0xd>
;
return os;
65a: 8b 45 fc mov -0x4(%ebp),%eax
}
65d: c9 leave
65e: c3 ret
0000065f <strcmp>:
int
strcmp(const char *p, const char *q)
{
65f: 55 push %ebp
660: 89 e5 mov %esp,%ebp
while(*p && *p == *q)
662: eb 08 jmp 66c <strcmp+0xd>
p++, q++;
664: 83 45 08 01 addl $0x1,0x8(%ebp)
668: 83 45 0c 01 addl $0x1,0xc(%ebp)
}
int
strcmp(const char *p, const char *q)
{
while(*p && *p == *q)
66c: 8b 45 08 mov 0x8(%ebp),%eax
66f: 0f b6 00 movzbl (%eax),%eax
672: 84 c0 test %al,%al
674: 74 10 je 686 <strcmp+0x27>
676: 8b 45 08 mov 0x8(%ebp),%eax
679: 0f b6 10 movzbl (%eax),%edx
67c: 8b 45 0c mov 0xc(%ebp),%eax
67f: 0f b6 00 movzbl (%eax),%eax
682: 38 c2 cmp %al,%dl
684: 74 de je 664 <strcmp+0x5>
p++, q++;
return (uchar)*p - (uchar)*q;
686: 8b 45 08 mov 0x8(%ebp),%eax
689: 0f b6 00 movzbl (%eax),%eax
68c: 0f b6 d0 movzbl %al,%edx
68f: 8b 45 0c mov 0xc(%ebp),%eax
692: 0f b6 00 movzbl (%eax),%eax
695: 0f b6 c0 movzbl %al,%eax
698: 29 c2 sub %eax,%edx
69a: 89 d0 mov %edx,%eax
}
69c: 5d pop %ebp
69d: c3 ret
0000069e <strlen>:
uint
strlen(char *s)
{
69e: 55 push %ebp
69f: 89 e5 mov %esp,%ebp
6a1: 83 ec 10 sub $0x10,%esp
int n;
for(n = 0; s[n]; n++)
6a4: c7 45 fc 00 00 00 00 movl $0x0,-0x4(%ebp)
6ab: eb 04 jmp 6b1 <strlen+0x13>
6ad: 83 45 fc 01 addl $0x1,-0x4(%ebp)
6b1: 8b 55 fc mov -0x4(%ebp),%edx
6b4: 8b 45 08 mov 0x8(%ebp),%eax
6b7: 01 d0 add %edx,%eax
6b9: 0f b6 00 movzbl (%eax),%eax
6bc: 84 c0 test %al,%al
6be: 75 ed jne 6ad <strlen+0xf>
;
return n;
6c0: 8b 45 fc mov -0x4(%ebp),%eax
}
6c3: c9 leave
6c4: c3 ret
000006c5 <memset>:
void*
memset(void *dst, int c, uint n)
{
6c5: 55 push %ebp
6c6: 89 e5 mov %esp,%ebp
6c8: 83 ec 0c sub $0xc,%esp
stosb(dst, c, n);
6cb: 8b 45 10 mov 0x10(%ebp),%eax
6ce: 89 44 24 08 mov %eax,0x8(%esp)
6d2: 8b 45 0c mov 0xc(%ebp),%eax
6d5: 89 44 24 04 mov %eax,0x4(%esp)
6d9: 8b 45 08 mov 0x8(%ebp),%eax
6dc: 89 04 24 mov %eax,(%esp)
6df: e8 26 ff ff ff call 60a <stosb>
return dst;
6e4: 8b 45 08 mov 0x8(%ebp),%eax
}
6e7: c9 leave
6e8: c3 ret
000006e9 <strchr>:
char*
strchr(const char *s, char c)
{
6e9: 55 push %ebp
6ea: 89 e5 mov %esp,%ebp
6ec: 83 ec 04 sub $0x4,%esp
6ef: 8b 45 0c mov 0xc(%ebp),%eax
6f2: 88 45 fc mov %al,-0x4(%ebp)
for(; *s; s++)
6f5: eb 14 jmp 70b <strchr+0x22>
if(*s == c)
6f7: 8b 45 08 mov 0x8(%ebp),%eax
6fa: 0f b6 00 movzbl (%eax),%eax
6fd: 3a 45 fc cmp -0x4(%ebp),%al
700: 75 05 jne 707 <strchr+0x1e>
return (char*)s;
702: 8b 45 08 mov 0x8(%ebp),%eax
705: eb 13 jmp 71a <strchr+0x31>
}
char*
strchr(const char *s, char c)
{
for(; *s; s++)
707: 83 45 08 01 addl $0x1,0x8(%ebp)
70b: 8b 45 08 mov 0x8(%ebp),%eax
70e: 0f b6 00 movzbl (%eax),%eax
711: 84 c0 test %al,%al
713: 75 e2 jne 6f7 <strchr+0xe>
if(*s == c)
return (char*)s;
return 0;
715: b8 00 00 00 00 mov $0x0,%eax
}
71a: c9 leave
71b: c3 ret
0000071c <gets>:
char*
gets(char *buf, int max)
{
71c: 55 push %ebp
71d: 89 e5 mov %esp,%ebp
71f: 83 ec 28 sub $0x28,%esp
int i, cc;
char c;
for(i=0; i+1 < max; ){
722: c7 45 f4 00 00 00 00 movl $0x0,-0xc(%ebp)
729: eb 4c jmp 777 <gets+0x5b>
cc = read(0, &c, 1);
72b: c7 44 24 08 01 00 00 movl $0x1,0x8(%esp)
732: 00
733: 8d 45 ef lea -0x11(%ebp),%eax
736: 89 44 24 04 mov %eax,0x4(%esp)
73a: c7 04 24 00 00 00 00 movl $0x0,(%esp)
741: e8 44 01 00 00 call 88a <read>
746: 89 45 f0 mov %eax,-0x10(%ebp)
if(cc < 1)
749: 83 7d f0 00 cmpl $0x0,-0x10(%ebp)
74d: 7f 02 jg 751 <gets+0x35>
break;
74f: eb 31 jmp 782 <gets+0x66>
buf[i++] = c;
751: 8b 45 f4 mov -0xc(%ebp),%eax
754: 8d 50 01 lea 0x1(%eax),%edx
757: 89 55 f4 mov %edx,-0xc(%ebp)
75a: 89 c2 mov %eax,%edx
75c: 8b 45 08 mov 0x8(%ebp),%eax
75f: 01 c2 add %eax,%edx
761: 0f b6 45 ef movzbl -0x11(%ebp),%eax
765: 88 02 mov %al,(%edx)
if(c == '\n' || c == '\r')
767: 0f b6 45 ef movzbl -0x11(%ebp),%eax
76b: 3c 0a cmp $0xa,%al
76d: 74 13 je 782 <gets+0x66>
76f: 0f b6 45 ef movzbl -0x11(%ebp),%eax
773: 3c 0d cmp $0xd,%al
775: 74 0b je 782 <gets+0x66>
gets(char *buf, int max)
{
int i, cc;
char c;
for(i=0; i+1 < max; ){
777: 8b 45 f4 mov -0xc(%ebp),%eax
77a: 83 c0 01 add $0x1,%eax
77d: 3b 45 0c cmp 0xc(%ebp),%eax
780: 7c a9 jl 72b <gets+0xf>
break;
buf[i++] = c;
if(c == '\n' || c == '\r')
break;
}
buf[i] = '\0';
782: 8b 55 f4 mov -0xc(%ebp),%edx
785: 8b 45 08 mov 0x8(%ebp),%eax
788: 01 d0 add %edx,%eax
78a: c6 00 00 movb $0x0,(%eax)
return buf;
78d: 8b 45 08 mov 0x8(%ebp),%eax
}
790: c9 leave
791: c3 ret
00000792 <stat>:
int
stat(char *n, struct stat *st)
{
792: 55 push %ebp
793: 89 e5 mov %esp,%ebp
795: 83 ec 28 sub $0x28,%esp
int fd;
int r;
fd = open(n, O_RDONLY);
798: c7 44 24 04 00 00 00 movl $0x0,0x4(%esp)
79f: 00
7a0: 8b 45 08 mov 0x8(%ebp),%eax
7a3: 89 04 24 mov %eax,(%esp)
7a6: e8 07 01 00 00 call 8b2 <open>
7ab: 89 45 f4 mov %eax,-0xc(%ebp)
if(fd < 0)
7ae: 83 7d f4 00 cmpl $0x0,-0xc(%ebp)
7b2: 79 07 jns 7bb <stat+0x29>
return -1;
7b4: b8 ff ff ff ff mov $0xffffffff,%eax
7b9: eb 23 jmp 7de <stat+0x4c>
r = fstat(fd, st);
7bb: 8b 45 0c mov 0xc(%ebp),%eax
7be: 89 44 24 04 mov %eax,0x4(%esp)
7c2: 8b 45 f4 mov -0xc(%ebp),%eax
7c5: 89 04 24 mov %eax,(%esp)
7c8: e8 fd 00 00 00 call 8ca <fstat>
7cd: 89 45 f0 mov %eax,-0x10(%ebp)
close(fd);
7d0: 8b 45 f4 mov -0xc(%ebp),%eax
7d3: 89 04 24 mov %eax,(%esp)
7d6: e8 bf 00 00 00 call 89a <close>
return r;
7db: 8b 45 f0 mov -0x10(%ebp),%eax
}
7de: c9 leave
7df: c3 ret
000007e0 <atoi>:
int
atoi(const char *s)
{
7e0: 55 push %ebp
7e1: 89 e5 mov %esp,%ebp
7e3: 83 ec 10 sub $0x10,%esp
int n;
n = 0;
7e6: c7 45 fc 00 00 00 00 movl $0x0,-0x4(%ebp)
while('0' <= *s && *s <= '9')
7ed: eb 25 jmp 814 <atoi+0x34>
n = n*10 + *s++ - '0';
7ef: 8b 55 fc mov -0x4(%ebp),%edx
7f2: 89 d0 mov %edx,%eax
7f4: c1 e0 02 shl $0x2,%eax
7f7: 01 d0 add %edx,%eax
7f9: 01 c0 add %eax,%eax
7fb: 89 c1 mov %eax,%ecx
7fd: 8b 45 08 mov 0x8(%ebp),%eax
800: 8d 50 01 lea 0x1(%eax),%edx
803: 89 55 08 mov %edx,0x8(%ebp)
806: 0f b6 00 movzbl (%eax),%eax
809: 0f be c0 movsbl %al,%eax
80c: 01 c8 add %ecx,%eax
80e: 83 e8 30 sub $0x30,%eax
811: 89 45 fc mov %eax,-0x4(%ebp)
atoi(const char *s)
{
int n;
n = 0;
while('0' <= *s && *s <= '9')
814: 8b 45 08 mov 0x8(%ebp),%eax
817: 0f b6 00 movzbl (%eax),%eax
81a: 3c 2f cmp $0x2f,%al
81c: 7e 0a jle 828 <atoi+0x48>
81e: 8b 45 08 mov 0x8(%ebp),%eax
821: 0f b6 00 movzbl (%eax),%eax
824: 3c 39 cmp $0x39,%al
826: 7e c7 jle 7ef <atoi+0xf>
n = n*10 + *s++ - '0';
return n;
828: 8b 45 fc mov -0x4(%ebp),%eax
}
82b: c9 leave
82c: c3 ret
0000082d <memmove>:
void*
memmove(void *vdst, void *vsrc, int n)
{
82d: 55 push %ebp
82e: 89 e5 mov %esp,%ebp
830: 83 ec 10 sub $0x10,%esp
char *dst, *src;
dst = vdst;
833: 8b 45 08 mov 0x8(%ebp),%eax
836: 89 45 fc mov %eax,-0x4(%ebp)
src = vsrc;
839: 8b 45 0c mov 0xc(%ebp),%eax
83c: 89 45 f8 mov %eax,-0x8(%ebp)
while(n-- > 0)
83f: eb 17 jmp 858 <memmove+0x2b>
*dst++ = *src++;
841: 8b 45 fc mov -0x4(%ebp),%eax
844: 8d 50 01 lea 0x1(%eax),%edx
847: 89 55 fc mov %edx,-0x4(%ebp)
84a: 8b 55 f8 mov -0x8(%ebp),%edx
84d: 8d 4a 01 lea 0x1(%edx),%ecx
850: 89 4d f8 mov %ecx,-0x8(%ebp)
853: 0f b6 12 movzbl (%edx),%edx
856: 88 10 mov %dl,(%eax)
{
char *dst, *src;
dst = vdst;
src = vsrc;
while(n-- > 0)
858: 8b 45 10 mov 0x10(%ebp),%eax
85b: 8d 50 ff lea -0x1(%eax),%edx
85e: 89 55 10 mov %edx,0x10(%ebp)
861: 85 c0 test %eax,%eax
863: 7f dc jg 841 <memmove+0x14>
*dst++ = *src++;
return vdst;
865: 8b 45 08 mov 0x8(%ebp),%eax
}
868: c9 leave
869: c3 ret
0000086a <fork>:
name: \
movl $SYS_ ## name, %eax; \
int $T_SYSCALL; \
ret
SYSCALL(fork)
86a: b8 01 00 00 00 mov $0x1,%eax
86f: cd 40 int $0x40
871: c3 ret
00000872 <exit>:
SYSCALL(exit)
872: b8 02 00 00 00 mov $0x2,%eax
877: cd 40 int $0x40
879: c3 ret
0000087a <wait>:
SYSCALL(wait)
87a: b8 03 00 00 00 mov $0x3,%eax
87f: cd 40 int $0x40
881: c3 ret
00000882 <pipe>:
SYSCALL(pipe)
882: b8 04 00 00 00 mov $0x4,%eax
887: cd 40 int $0x40
889: c3 ret
0000088a <read>:
SYSCALL(read)
88a: b8 05 00 00 00 mov $0x5,%eax
88f: cd 40 int $0x40
891: c3 ret
00000892 <write>:
SYSCALL(write)
892: b8 10 00 00 00 mov $0x10,%eax
897: cd 40 int $0x40
899: c3 ret
0000089a <close>:
SYSCALL(close)
89a: b8 15 00 00 00 mov $0x15,%eax
89f: cd 40 int $0x40
8a1: c3 ret
000008a2 <kill>:
SYSCALL(kill)
8a2: b8 06 00 00 00 mov $0x6,%eax
8a7: cd 40 int $0x40
8a9: c3 ret
000008aa <exec>:
SYSCALL(exec)
8aa: b8 07 00 00 00 mov $0x7,%eax
8af: cd 40 int $0x40
8b1: c3 ret
000008b2 <open>:
SYSCALL(open)
8b2: b8 0f 00 00 00 mov $0xf,%eax
8b7: cd 40 int $0x40
8b9: c3 ret
000008ba <mknod>:
SYSCALL(mknod)
8ba: b8 11 00 00 00 mov $0x11,%eax
8bf: cd 40 int $0x40
8c1: c3 ret
000008c2 <unlink>:
SYSCALL(unlink)
8c2: b8 12 00 00 00 mov $0x12,%eax
8c7: cd 40 int $0x40
8c9: c3 ret
000008ca <fstat>:
SYSCALL(fstat)
8ca: b8 08 00 00 00 mov $0x8,%eax
8cf: cd 40 int $0x40
8d1: c3 ret
000008d2 <link>:
SYSCALL(link)
8d2: b8 13 00 00 00 mov $0x13,%eax
8d7: cd 40 int $0x40
8d9: c3 ret
000008da <mkdir>:
SYSCALL(mkdir)
8da: b8 14 00 00 00 mov $0x14,%eax
8df: cd 40 int $0x40
8e1: c3 ret
000008e2 <chdir>:
SYSCALL(chdir)
8e2: b8 09 00 00 00 mov $0x9,%eax
8e7: cd 40 int $0x40
8e9: c3 ret
000008ea <dup>:
SYSCALL(dup)
8ea: b8 0a 00 00 00 mov $0xa,%eax
8ef: cd 40 int $0x40
8f1: c3 ret
000008f2 <getpid>:
SYSCALL(getpid)
8f2: b8 0b 00 00 00 mov $0xb,%eax
8f7: cd 40 int $0x40
8f9: c3 ret
000008fa <sbrk>:
SYSCALL(sbrk)
8fa: b8 0c 00 00 00 mov $0xc,%eax
8ff: cd 40 int $0x40
901: c3 ret
00000902 <sleep>:
SYSCALL(sleep)
902: b8 0d 00 00 00 mov $0xd,%eax
907: cd 40 int $0x40
909: c3 ret
0000090a <uptime>:
SYSCALL(uptime)
90a: b8 0e 00 00 00 mov $0xe,%eax
90f: cd 40 int $0x40
911: c3 ret
00000912 <changepriority>:
SYSCALL(changepriority)
912: b8 16 00 00 00 mov $0x16,%eax
917: cd 40 int $0x40
919: c3 ret
0000091a <processstatus>:
SYSCALL(processstatus)
91a: b8 17 00 00 00 mov $0x17,%eax
91f: cd 40 int $0x40
921: c3 ret
00000922 <randomgen>:
SYSCALL(randomgen)
922: b8 18 00 00 00 mov $0x18,%eax
927: cd 40 int $0x40
929: c3 ret
0000092a <randomgenrange>:
SYSCALL(randomgenrange)
92a: b8 19 00 00 00 mov $0x19,%eax
92f: cd 40 int $0x40
931: c3 ret
00000932 <putc>:
#include "stat.h"
#include "user.h"
static void
putc(int fd, char c)
{
932: 55 push %ebp
933: 89 e5 mov %esp,%ebp
935: 83 ec 18 sub $0x18,%esp
938: 8b 45 0c mov 0xc(%ebp),%eax
93b: 88 45 f4 mov %al,-0xc(%ebp)
write(fd, &c, 1);
93e: c7 44 24 08 01 00 00 movl $0x1,0x8(%esp)
945: 00
946: 8d 45 f4 lea -0xc(%ebp),%eax
949: 89 44 24 04 mov %eax,0x4(%esp)
94d: 8b 45 08 mov 0x8(%ebp),%eax
950: 89 04 24 mov %eax,(%esp)
953: e8 3a ff ff ff call 892 <write>
}
958: c9 leave
959: c3 ret
0000095a <printint>:
static void
printint(int fd, int xx, int base, int sgn)
{
95a: 55 push %ebp
95b: 89 e5 mov %esp,%ebp
95d: 56 push %esi
95e: 53 push %ebx
95f: 83 ec 30 sub $0x30,%esp
static char digits[] = "0123456789ABCDEF";
char buf[16];
int i, neg;
uint x;
neg = 0;
962: c7 45 f0 00 00 00 00 movl $0x0,-0x10(%ebp)
if(sgn && xx < 0){
969: 83 7d 14 00 cmpl $0x0,0x14(%ebp)
96d: 74 17 je 986 <printint+0x2c>
96f: 83 7d 0c 00 cmpl $0x0,0xc(%ebp)
973: 79 11 jns 986 <printint+0x2c>
neg = 1;
975: c7 45 f0 01 00 00 00 movl $0x1,-0x10(%ebp)
x = -xx;
97c: 8b 45 0c mov 0xc(%ebp),%eax
97f: f7 d8 neg %eax
981: 89 45 ec mov %eax,-0x14(%ebp)
984: eb 06 jmp 98c <printint+0x32>
} else {
x = xx;
986: 8b 45 0c mov 0xc(%ebp),%eax
989: 89 45 ec mov %eax,-0x14(%ebp)
}
i = 0;
98c: c7 45 f4 00 00 00 00 movl $0x0,-0xc(%ebp)
do{
buf[i++] = digits[x % base];
993: 8b 4d f4 mov -0xc(%ebp),%ecx
996: 8d 41 01 lea 0x1(%ecx),%eax
999: 89 45 f4 mov %eax,-0xc(%ebp)
99c: 8b 5d 10 mov 0x10(%ebp),%ebx
99f: 8b 45 ec mov -0x14(%ebp),%eax
9a2: ba 00 00 00 00 mov $0x0,%edx
9a7: f7 f3 div %ebx
9a9: 89 d0 mov %edx,%eax
9ab: 0f b6 80 34 11 00 00 movzbl 0x1134(%eax),%eax
9b2: 88 44 0d dc mov %al,-0x24(%ebp,%ecx,1)
}while((x /= base) != 0);
9b6: 8b 75 10 mov 0x10(%ebp),%esi
9b9: 8b 45 ec mov -0x14(%ebp),%eax
9bc: ba 00 00 00 00 mov $0x0,%edx
9c1: f7 f6 div %esi
9c3: 89 45 ec mov %eax,-0x14(%ebp)
9c6: 83 7d ec 00 cmpl $0x0,-0x14(%ebp)
9ca: 75 c7 jne 993 <printint+0x39>
if(neg)
9cc: 83 7d f0 00 cmpl $0x0,-0x10(%ebp)
9d0: 74 10 je 9e2 <printint+0x88>
buf[i++] = '-';
9d2: 8b 45 f4 mov -0xc(%ebp),%eax
9d5: 8d 50 01 lea 0x1(%eax),%edx
9d8: 89 55 f4 mov %edx,-0xc(%ebp)
9db: c6 44 05 dc 2d movb $0x2d,-0x24(%ebp,%eax,1)
while(--i >= 0)
9e0: eb 1f jmp a01 <printint+0xa7>
9e2: eb 1d jmp a01 <printint+0xa7>
putc(fd, buf[i]);
9e4: 8d 55 dc lea -0x24(%ebp),%edx
9e7: 8b 45 f4 mov -0xc(%ebp),%eax
9ea: 01 d0 add %edx,%eax
9ec: 0f b6 00 movzbl (%eax),%eax
9ef: 0f be c0 movsbl %al,%eax
9f2: 89 44 24 04 mov %eax,0x4(%esp)
9f6: 8b 45 08 mov 0x8(%ebp),%eax
9f9: 89 04 24 mov %eax,(%esp)
9fc: e8 31 ff ff ff call 932 <putc>
buf[i++] = digits[x % base];
}while((x /= base) != 0);
if(neg)
buf[i++] = '-';
while(--i >= 0)
a01: 83 6d f4 01 subl $0x1,-0xc(%ebp)
a05: 83 7d f4 00 cmpl $0x0,-0xc(%ebp)
a09: 79 d9 jns 9e4 <printint+0x8a>
putc(fd, buf[i]);
}
a0b: 83 c4 30 add $0x30,%esp
a0e: 5b pop %ebx
a0f: 5e pop %esi
a10: 5d pop %ebp
a11: c3 ret
00000a12 <printf>:
// Print to the given fd. Only understands %d, %x, %p, %s.
void
printf(int fd, char *fmt, ...)
{
a12: 55 push %ebp
a13: 89 e5 mov %esp,%ebp
a15: 83 ec 38 sub $0x38,%esp
char *s;
int c, i, state;
uint *ap;
state = 0;
a18: c7 45 ec 00 00 00 00 movl $0x0,-0x14(%ebp)
ap = (uint*)(void*)&fmt + 1;
a1f: 8d 45 0c lea 0xc(%ebp),%eax
a22: 83 c0 04 add $0x4,%eax
a25: 89 45 e8 mov %eax,-0x18(%ebp)
for(i = 0; fmt[i]; i++){
a28: c7 45 f0 00 00 00 00 movl $0x0,-0x10(%ebp)
a2f: e9 7c 01 00 00 jmp bb0 <printf+0x19e>
c = fmt[i] & 0xff;
a34: 8b 55 0c mov 0xc(%ebp),%edx
a37: 8b 45 f0 mov -0x10(%ebp),%eax
a3a: 01 d0 add %edx,%eax
a3c: 0f b6 00 movzbl (%eax),%eax
a3f: 0f be c0 movsbl %al,%eax
a42: 25 ff 00 00 00 and $0xff,%eax
a47: 89 45 e4 mov %eax,-0x1c(%ebp)
if(state == 0){
a4a: 83 7d ec 00 cmpl $0x0,-0x14(%ebp)
a4e: 75 2c jne a7c <printf+0x6a>
if(c == '%'){
a50: 83 7d e4 25 cmpl $0x25,-0x1c(%ebp)
a54: 75 0c jne a62 <printf+0x50>
state = '%';
a56: c7 45 ec 25 00 00 00 movl $0x25,-0x14(%ebp)
a5d: e9 4a 01 00 00 jmp bac <printf+0x19a>
} else {
putc(fd, c);
a62: 8b 45 e4 mov -0x1c(%ebp),%eax
a65: 0f be c0 movsbl %al,%eax
a68: 89 44 24 04 mov %eax,0x4(%esp)
a6c: 8b 45 08 mov 0x8(%ebp),%eax
a6f: 89 04 24 mov %eax,(%esp)
a72: e8 bb fe ff ff call 932 <putc>
a77: e9 30 01 00 00 jmp bac <printf+0x19a>
}
} else if(state == '%'){
a7c: 83 7d ec 25 cmpl $0x25,-0x14(%ebp)
a80: 0f 85 26 01 00 00 jne bac <printf+0x19a>
if(c == 'd'){
a86: 83 7d e4 64 cmpl $0x64,-0x1c(%ebp)
a8a: 75 2d jne ab9 <printf+0xa7>
printint(fd, *ap, 10, 1);
a8c: 8b 45 e8 mov -0x18(%ebp),%eax
a8f: 8b 00 mov (%eax),%eax
a91: c7 44 24 0c 01 00 00 movl $0x1,0xc(%esp)
a98: 00
a99: c7 44 24 08 0a 00 00 movl $0xa,0x8(%esp)
aa0: 00
aa1: 89 44 24 04 mov %eax,0x4(%esp)
aa5: 8b 45 08 mov 0x8(%ebp),%eax
aa8: 89 04 24 mov %eax,(%esp)
aab: e8 aa fe ff ff call 95a <printint>
ap++;
ab0: 83 45 e8 04 addl $0x4,-0x18(%ebp)
ab4: e9 ec 00 00 00 jmp ba5 <printf+0x193>
} else if(c == 'x' || c == 'p'){
ab9: 83 7d e4 78 cmpl $0x78,-0x1c(%ebp)
abd: 74 06 je ac5 <printf+0xb3>
abf: 83 7d e4 70 cmpl $0x70,-0x1c(%ebp)
ac3: 75 2d jne af2 <printf+0xe0>
printint(fd, *ap, 16, 0);
ac5: 8b 45 e8 mov -0x18(%ebp),%eax
ac8: 8b 00 mov (%eax),%eax
aca: c7 44 24 0c 00 00 00 movl $0x0,0xc(%esp)
ad1: 00
ad2: c7 44 24 08 10 00 00 movl $0x10,0x8(%esp)
ad9: 00
ada: 89 44 24 04 mov %eax,0x4(%esp)
ade: 8b 45 08 mov 0x8(%ebp),%eax
ae1: 89 04 24 mov %eax,(%esp)
ae4: e8 71 fe ff ff call 95a <printint>
ap++;
ae9: 83 45 e8 04 addl $0x4,-0x18(%ebp)
aed: e9 b3 00 00 00 jmp ba5 <printf+0x193>
} else if(c == 's'){
af2: 83 7d e4 73 cmpl $0x73,-0x1c(%ebp)
af6: 75 45 jne b3d <printf+0x12b>
s = (char*)*ap;
af8: 8b 45 e8 mov -0x18(%ebp),%eax
afb: 8b 00 mov (%eax),%eax
afd: 89 45 f4 mov %eax,-0xc(%ebp)
ap++;
b00: 83 45 e8 04 addl $0x4,-0x18(%ebp)
if(s == 0)
b04: 83 7d f4 00 cmpl $0x0,-0xc(%ebp)
b08: 75 09 jne b13 <printf+0x101>
s = "(null)";
b0a: c7 45 f4 1a 0e 00 00 movl $0xe1a,-0xc(%ebp)
while(*s != 0){
b11: eb 1e jmp b31 <printf+0x11f>
b13: eb 1c jmp b31 <printf+0x11f>
putc(fd, *s);
b15: 8b 45 f4 mov -0xc(%ebp),%eax
b18: 0f b6 00 movzbl (%eax),%eax
b1b: 0f be c0 movsbl %al,%eax
b1e: 89 44 24 04 mov %eax,0x4(%esp)
b22: 8b 45 08 mov 0x8(%ebp),%eax
b25: 89 04 24 mov %eax,(%esp)
b28: e8 05 fe ff ff call 932 <putc>
s++;
b2d: 83 45 f4 01 addl $0x1,-0xc(%ebp)
} else if(c == 's'){
s = (char*)*ap;
ap++;
if(s == 0)
s = "(null)";
while(*s != 0){
b31: 8b 45 f4 mov -0xc(%ebp),%eax
b34: 0f b6 00 movzbl (%eax),%eax
b37: 84 c0 test %al,%al
b39: 75 da jne b15 <printf+0x103>
b3b: eb 68 jmp ba5 <printf+0x193>
putc(fd, *s);
s++;
}
} else if(c == 'c'){
b3d: 83 7d e4 63 cmpl $0x63,-0x1c(%ebp)
b41: 75 1d jne b60 <printf+0x14e>
putc(fd, *ap);
b43: 8b 45 e8 mov -0x18(%ebp),%eax
b46: 8b 00 mov (%eax),%eax
b48: 0f be c0 movsbl %al,%eax
b4b: 89 44 24 04 mov %eax,0x4(%esp)
b4f: 8b 45 08 mov 0x8(%ebp),%eax
b52: 89 04 24 mov %eax,(%esp)
b55: e8 d8 fd ff ff call 932 <putc>
ap++;
b5a: 83 45 e8 04 addl $0x4,-0x18(%ebp)
b5e: eb 45 jmp ba5 <printf+0x193>
} else if(c == '%'){
b60: 83 7d e4 25 cmpl $0x25,-0x1c(%ebp)
b64: 75 17 jne b7d <printf+0x16b>
putc(fd, c);
b66: 8b 45 e4 mov -0x1c(%ebp),%eax
b69: 0f be c0 movsbl %al,%eax
b6c: 89 44 24 04 mov %eax,0x4(%esp)
b70: 8b 45 08 mov 0x8(%ebp),%eax
b73: 89 04 24 mov %eax,(%esp)
b76: e8 b7 fd ff ff call 932 <putc>
b7b: eb 28 jmp ba5 <printf+0x193>
} else {
// Unknown % sequence. Print it to draw attention.
putc(fd, '%');
b7d: c7 44 24 04 25 00 00 movl $0x25,0x4(%esp)
b84: 00
b85: 8b 45 08 mov 0x8(%ebp),%eax
b88: 89 04 24 mov %eax,(%esp)
b8b: e8 a2 fd ff ff call 932 <putc>
putc(fd, c);
b90: 8b 45 e4 mov -0x1c(%ebp),%eax
b93: 0f be c0 movsbl %al,%eax
b96: 89 44 24 04 mov %eax,0x4(%esp)
b9a: 8b 45 08 mov 0x8(%ebp),%eax
b9d: 89 04 24 mov %eax,(%esp)
ba0: e8 8d fd ff ff call 932 <putc>
}
state = 0;
ba5: c7 45 ec 00 00 00 00 movl $0x0,-0x14(%ebp)
int c, i, state;
uint *ap;
state = 0;
ap = (uint*)(void*)&fmt + 1;
for(i = 0; fmt[i]; i++){
bac: 83 45 f0 01 addl $0x1,-0x10(%ebp)
bb0: 8b 55 0c mov 0xc(%ebp),%edx
bb3: 8b 45 f0 mov -0x10(%ebp),%eax
bb6: 01 d0 add %edx,%eax
bb8: 0f b6 00 movzbl (%eax),%eax
bbb: 84 c0 test %al,%al
bbd: 0f 85 71 fe ff ff jne a34 <printf+0x22>
putc(fd, c);
}
state = 0;
}
}
}
bc3: c9 leave
bc4: c3 ret
00000bc5 <free>:
static Header base;
static Header *freep;
void
free(void *ap)
{
bc5: 55 push %ebp
bc6: 89 e5 mov %esp,%ebp
bc8: 83 ec 10 sub $0x10,%esp
Header *bp, *p;
bp = (Header*)ap - 1;
bcb: 8b 45 08 mov 0x8(%ebp),%eax
bce: 83 e8 08 sub $0x8,%eax
bd1: 89 45 f8 mov %eax,-0x8(%ebp)
for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr)
bd4: a1 6c 11 00 00 mov 0x116c,%eax
bd9: 89 45 fc mov %eax,-0x4(%ebp)
bdc: eb 24 jmp c02 <free+0x3d>
if(p >= p->s.ptr && (bp > p || bp < p->s.ptr))
bde: 8b 45 fc mov -0x4(%ebp),%eax
be1: 8b 00 mov (%eax),%eax
be3: 3b 45 fc cmp -0x4(%ebp),%eax
be6: 77 12 ja bfa <free+0x35>
be8: 8b 45 f8 mov -0x8(%ebp),%eax
beb: 3b 45 fc cmp -0x4(%ebp),%eax
bee: 77 24 ja c14 <free+0x4f>
bf0: 8b 45 fc mov -0x4(%ebp),%eax
bf3: 8b 00 mov (%eax),%eax
bf5: 3b 45 f8 cmp -0x8(%ebp),%eax
bf8: 77 1a ja c14 <free+0x4f>
free(void *ap)
{
Header *bp, *p;
bp = (Header*)ap - 1;
for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr)
bfa: 8b 45 fc mov -0x4(%ebp),%eax
bfd: 8b 00 mov (%eax),%eax
bff: 89 45 fc mov %eax,-0x4(%ebp)
c02: 8b 45 f8 mov -0x8(%ebp),%eax
c05: 3b 45 fc cmp -0x4(%ebp),%eax
c08: 76 d4 jbe bde <free+0x19>
c0a: 8b 45 fc mov -0x4(%ebp),%eax
c0d: 8b 00 mov (%eax),%eax
c0f: 3b 45 f8 cmp -0x8(%ebp),%eax
c12: 76 ca jbe bde <free+0x19>
if(p >= p->s.ptr && (bp > p || bp < p->s.ptr))
break;
if(bp + bp->s.size == p->s.ptr){
c14: 8b 45 f8 mov -0x8(%ebp),%eax
c17: 8b 40 04 mov 0x4(%eax),%eax
c1a: 8d 14 c5 00 00 00 00 lea 0x0(,%eax,8),%edx
c21: 8b 45 f8 mov -0x8(%ebp),%eax
c24: 01 c2 add %eax,%edx
c26: 8b 45 fc mov -0x4(%ebp),%eax
c29: 8b 00 mov (%eax),%eax
c2b: 39 c2 cmp %eax,%edx
c2d: 75 24 jne c53 <free+0x8e>
bp->s.size += p->s.ptr->s.size;
c2f: 8b 45 f8 mov -0x8(%ebp),%eax
c32: 8b 50 04 mov 0x4(%eax),%edx
c35: 8b 45 fc mov -0x4(%ebp),%eax
c38: 8b 00 mov (%eax),%eax
c3a: 8b 40 04 mov 0x4(%eax),%eax
c3d: 01 c2 add %eax,%edx
c3f: 8b 45 f8 mov -0x8(%ebp),%eax
c42: 89 50 04 mov %edx,0x4(%eax)
bp->s.ptr = p->s.ptr->s.ptr;
c45: 8b 45 fc mov -0x4(%ebp),%eax
c48: 8b 00 mov (%eax),%eax
c4a: 8b 10 mov (%eax),%edx
c4c: 8b 45 f8 mov -0x8(%ebp),%eax
c4f: 89 10 mov %edx,(%eax)
c51: eb 0a jmp c5d <free+0x98>
} else
bp->s.ptr = p->s.ptr;
c53: 8b 45 fc mov -0x4(%ebp),%eax
c56: 8b 10 mov (%eax),%edx
c58: 8b 45 f8 mov -0x8(%ebp),%eax
c5b: 89 10 mov %edx,(%eax)
if(p + p->s.size == bp){
c5d: 8b 45 fc mov -0x4(%ebp),%eax
c60: 8b 40 04 mov 0x4(%eax),%eax
c63: 8d 14 c5 00 00 00 00 lea 0x0(,%eax,8),%edx
c6a: 8b 45 fc mov -0x4(%ebp),%eax
c6d: 01 d0 add %edx,%eax
c6f: 3b 45 f8 cmp -0x8(%ebp),%eax
c72: 75 20 jne c94 <free+0xcf>
p->s.size += bp->s.size;
c74: 8b 45 fc mov -0x4(%ebp),%eax
c77: 8b 50 04 mov 0x4(%eax),%edx
c7a: 8b 45 f8 mov -0x8(%ebp),%eax
c7d: 8b 40 04 mov 0x4(%eax),%eax
c80: 01 c2 add %eax,%edx
c82: 8b 45 fc mov -0x4(%ebp),%eax
c85: 89 50 04 mov %edx,0x4(%eax)
p->s.ptr = bp->s.ptr;
c88: 8b 45 f8 mov -0x8(%ebp),%eax
c8b: 8b 10 mov (%eax),%edx
c8d: 8b 45 fc mov -0x4(%ebp),%eax
c90: 89 10 mov %edx,(%eax)
c92: eb 08 jmp c9c <free+0xd7>
} else
p->s.ptr = bp;
c94: 8b 45 fc mov -0x4(%ebp),%eax
c97: 8b 55 f8 mov -0x8(%ebp),%edx
c9a: 89 10 mov %edx,(%eax)
freep = p;
c9c: 8b 45 fc mov -0x4(%ebp),%eax
c9f: a3 6c 11 00 00 mov %eax,0x116c
}
ca4: c9 leave
ca5: c3 ret
00000ca6 <morecore>:
static Header*
morecore(uint nu)
{
ca6: 55 push %ebp
ca7: 89 e5 mov %esp,%ebp
ca9: 83 ec 28 sub $0x28,%esp
char *p;
Header *hp;
if(nu < 4096)
cac: 81 7d 08 ff 0f 00 00 cmpl $0xfff,0x8(%ebp)
cb3: 77 07 ja cbc <morecore+0x16>
nu = 4096;
cb5: c7 45 08 00 10 00 00 movl $0x1000,0x8(%ebp)
p = sbrk(nu * sizeof(Header));
cbc: 8b 45 08 mov 0x8(%ebp),%eax
cbf: c1 e0 03 shl $0x3,%eax
cc2: 89 04 24 mov %eax,(%esp)
cc5: e8 30 fc ff ff call 8fa <sbrk>
cca: 89 45 f4 mov %eax,-0xc(%ebp)
if(p == (char*)-1)
ccd: 83 7d f4 ff cmpl $0xffffffff,-0xc(%ebp)
cd1: 75 07 jne cda <morecore+0x34>
return 0;
cd3: b8 00 00 00 00 mov $0x0,%eax
cd8: eb 22 jmp cfc <morecore+0x56>
hp = (Header*)p;
cda: 8b 45 f4 mov -0xc(%ebp),%eax
cdd: 89 45 f0 mov %eax,-0x10(%ebp)
hp->s.size = nu;
ce0: 8b 45 f0 mov -0x10(%ebp),%eax
ce3: 8b 55 08 mov 0x8(%ebp),%edx
ce6: 89 50 04 mov %edx,0x4(%eax)
free((void*)(hp + 1));
ce9: 8b 45 f0 mov -0x10(%ebp),%eax
cec: 83 c0 08 add $0x8,%eax
cef: 89 04 24 mov %eax,(%esp)
cf2: e8 ce fe ff ff call bc5 <free>
return freep;
cf7: a1 6c 11 00 00 mov 0x116c,%eax
}
cfc: c9 leave
cfd: c3 ret
00000cfe <malloc>:
void*
malloc(uint nbytes)
{
cfe: 55 push %ebp
cff: 89 e5 mov %esp,%ebp
d01: 83 ec 28 sub $0x28,%esp
Header *p, *prevp;
uint nunits;
nunits = (nbytes + sizeof(Header) - 1)/sizeof(Header) + 1;
d04: 8b 45 08 mov 0x8(%ebp),%eax
d07: 83 c0 07 add $0x7,%eax
d0a: c1 e8 03 shr $0x3,%eax
d0d: 83 c0 01 add $0x1,%eax
d10: 89 45 ec mov %eax,-0x14(%ebp)
if((prevp = freep) == 0){
d13: a1 6c 11 00 00 mov 0x116c,%eax
d18: 89 45 f0 mov %eax,-0x10(%ebp)
d1b: 83 7d f0 00 cmpl $0x0,-0x10(%ebp)
d1f: 75 23 jne d44 <malloc+0x46>
base.s.ptr = freep = prevp = &base;
d21: c7 45 f0 64 11 00 00 movl $0x1164,-0x10(%ebp)
d28: 8b 45 f0 mov -0x10(%ebp),%eax
d2b: a3 6c 11 00 00 mov %eax,0x116c
d30: a1 6c 11 00 00 mov 0x116c,%eax
d35: a3 64 11 00 00 mov %eax,0x1164
base.s.size = 0;
d3a: c7 05 68 11 00 00 00 movl $0x0,0x1168
d41: 00 00 00
}
for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){
d44: 8b 45 f0 mov -0x10(%ebp),%eax
d47: 8b 00 mov (%eax),%eax
d49: 89 45 f4 mov %eax,-0xc(%ebp)
if(p->s.size >= nunits){
d4c: 8b 45 f4 mov -0xc(%ebp),%eax
d4f: 8b 40 04 mov 0x4(%eax),%eax
d52: 3b 45 ec cmp -0x14(%ebp),%eax
d55: 72 4d jb da4 <malloc+0xa6>
if(p->s.size == nunits)
d57: 8b 45 f4 mov -0xc(%ebp),%eax
d5a: 8b 40 04 mov 0x4(%eax),%eax
d5d: 3b 45 ec cmp -0x14(%ebp),%eax
d60: 75 0c jne d6e <malloc+0x70>
prevp->s.ptr = p->s.ptr;
d62: 8b 45 f4 mov -0xc(%ebp),%eax
d65: 8b 10 mov (%eax),%edx
d67: 8b 45 f0 mov -0x10(%ebp),%eax
d6a: 89 10 mov %edx,(%eax)
d6c: eb 26 jmp d94 <malloc+0x96>
else {
p->s.size -= nunits;
d6e: 8b 45 f4 mov -0xc(%ebp),%eax
d71: 8b 40 04 mov 0x4(%eax),%eax
d74: 2b 45 ec sub -0x14(%ebp),%eax
d77: 89 c2 mov %eax,%edx
d79: 8b 45 f4 mov -0xc(%ebp),%eax
d7c: 89 50 04 mov %edx,0x4(%eax)
p += p->s.size;
d7f: 8b 45 f4 mov -0xc(%ebp),%eax
d82: 8b 40 04 mov 0x4(%eax),%eax
d85: c1 e0 03 shl $0x3,%eax
d88: 01 45 f4 add %eax,-0xc(%ebp)
p->s.size = nunits;
d8b: 8b 45 f4 mov -0xc(%ebp),%eax
d8e: 8b 55 ec mov -0x14(%ebp),%edx
d91: 89 50 04 mov %edx,0x4(%eax)
}
freep = prevp;
d94: 8b 45 f0 mov -0x10(%ebp),%eax
d97: a3 6c 11 00 00 mov %eax,0x116c
return (void*)(p + 1);
d9c: 8b 45 f4 mov -0xc(%ebp),%eax
d9f: 83 c0 08 add $0x8,%eax
da2: eb 38 jmp ddc <malloc+0xde>
}
if(p == freep)
da4: a1 6c 11 00 00 mov 0x116c,%eax
da9: 39 45 f4 cmp %eax,-0xc(%ebp)
dac: 75 1b jne dc9 <malloc+0xcb>
if((p = morecore(nunits)) == 0)
dae: 8b 45 ec mov -0x14(%ebp),%eax
db1: 89 04 24 mov %eax,(%esp)
db4: e8 ed fe ff ff call ca6 <morecore>
db9: 89 45 f4 mov %eax,-0xc(%ebp)
dbc: 83 7d f4 00 cmpl $0x0,-0xc(%ebp)
dc0: 75 07 jne dc9 <malloc+0xcb>
return 0;
dc2: b8 00 00 00 00 mov $0x0,%eax
dc7: eb 13 jmp ddc <malloc+0xde>
nunits = (nbytes + sizeof(Header) - 1)/sizeof(Header) + 1;
if((prevp = freep) == 0){
base.s.ptr = freep = prevp = &base;
base.s.size = 0;
}
for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){
dc9: 8b 45 f4 mov -0xc(%ebp),%eax
dcc: 89 45 f0 mov %eax,-0x10(%ebp)
dcf: 8b 45 f4 mov -0xc(%ebp),%eax
dd2: 8b 00 mov (%eax),%eax
dd4: 89 45 f4 mov %eax,-0xc(%ebp)
return (void*)(p + 1);
}
if(p == freep)
if((p = morecore(nunits)) == 0)
return 0;
}
dd7: e9 70 ff ff ff jmp d4c <malloc+0x4e>
}
ddc: c9 leave
ddd: c3 ret
| 36.129733 | 64 | 0.436746 |
d55e593c3328197d7fced02b74055a5f6ab542c9 | 92 | asm | Assembly | tools-src/gnu/binutils/gas/testsuite/gas/tic54x/in_mlib.asm | enfoTek/tomato.linksys.e2000.nvram-mod | 2ce3a5217def49d6df7348522e2bfda702b56029 | [
"FSFAP"
] | 80 | 2015-01-02T10:14:04.000Z | 2021-06-07T06:29:49.000Z | tools-src/gnu/binutils/gas/testsuite/gas/tic54x/in_mlib.asm | unforgiven512/tomato | 96f09fab4929c6ddde5c9113f1b2476ad37133c4 | [
"FSFAP"
] | 9 | 2015-05-14T11:03:12.000Z | 2018-01-04T07:12:58.000Z | tools-src/gnu/binutils/gas/testsuite/gas/tic54x/in_mlib.asm | unforgiven512/tomato | 96f09fab4929c6ddde5c9113f1b2476ad37133c4 | [
"FSFAP"
] | 69 | 2015-01-02T10:45:56.000Z | 2021-09-06T07:52:13.000Z | IN_MLIB .macro AA,BB,CC
ADD #AA,a
ADD #BB,b
ADD #CC,a
.endm
| 15.333333 | 23 | 0.434783 |
3f14add90885275fae7c2a995b8a32fe6e31b930 | 278 | asm | Assembly | 001-helloworld/04-x86-printf/helloworld.asm | mustafagonul/x86-assembly-examples | c84565062b3ccd7dc955f5a08e0c84837d9c3cb8 | [
"MIT"
] | null | null | null | 001-helloworld/04-x86-printf/helloworld.asm | mustafagonul/x86-assembly-examples | c84565062b3ccd7dc955f5a08e0c84837d9c3cb8 | [
"MIT"
] | null | null | null | 001-helloworld/04-x86-printf/helloworld.asm | mustafagonul/x86-assembly-examples | c84565062b3ccd7dc955f5a08e0c84837d9c3cb8 | [
"MIT"
] | null | null | null | section .data
msg db 'Hello World! %d',`\n`, `\0` ; Hello world message
section .text
global main ; declared for the linker
extern printf
main:
push ebp
mov ebp, esp
mov eax, 1
push dword eax
push dword msg
call printf
add esp, 12
mov esp, ebp
pop ebp
ret
| 12.086957 | 58 | 0.669065 |
03d0030d2733c22e711bf792404dc8e8673ed035 | 224 | asm | Assembly | programs/oeis/017/A017529.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/017/A017529.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/017/A017529.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A017529: (12n)^9.
; 0,5159780352,2641807540224,101559956668416,1352605460594688,10077696000000000,51998697814228992,208215748530929664,692533995824480256,1999004627104432128,5159780352000000000
pow $0,9
mul $0,5159780352
| 37.333333 | 175 | 0.861607 |
6a51ad36552ab3c4000f57c53523151637556e72 | 495 | asm | Assembly | src/src/c/borlandc/dpmi32/bios_equ.asm | amindlost/wdosx | 1e256d22c1547e7b1f1ccd23e400f5b81b8bd013 | [
"Unlicense"
] | 7 | 2022-01-20T08:27:54.000Z | 2022-03-17T10:15:31.000Z | src/src/c/borlandc/dpmi32/bios_equ.asm | amindlost/wdosx | 1e256d22c1547e7b1f1ccd23e400f5b81b8bd013 | [
"Unlicense"
] | null | null | null | src/src/c/borlandc/dpmi32/bios_equ.asm | amindlost/wdosx | 1e256d22c1547e7b1f1ccd23e400f5b81b8bd013 | [
"Unlicense"
] | null | null | null | .386
.model flat,C
PUBLIC _bios_equiplist
PUBLIC _bios_memsize
PUBLIC _bios_timeofday
.code
_bios_equiplist proc near
sub eax,eax
int 11h
ret
_bios_equiplist endp
_bios_memsize proc near
sub eax,eax
int 12h
ret
_bios_memsize endp
_bios_timeofday proc near
mov edx,[esp+8]
mov edx,[edx]
shld ecx,edx,16
sub eax,eax
mov ah,[esp+4]
int 1ah
cmp byte ptr [esp+4],0
jnz @@00
shl edx,16
shld ecx,edx,16
mov edx,[esp+8]
mov [edx],ecx
@@00:
ret
_bios_timeofday endp
end
| 10.76087 | 25 | 0.723232 |
574e4708166fa20d99ea1e8368e284e4c730898b | 358 | asm | Assembly | programs/oeis/055/A055962.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/055/A055962.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/055/A055962.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A055962: n + reversal of base 12 digits of n (written in base 10).
; 0,2,4,6,8,10,12,14,16,18,20,22,13,26,39,52,65,78,91,104,117,130,143,156,26,39,52,65,78,91,104,117,130,143,156,169,39,52,65,78,91,104,117,130,143,156,169,182,52,65,78,91,104,117,130,143,156,169,182,195,65,78
mov $1,$0
seq $1,56961 ; Base 12 reversal of n (written in base 10).
add $0,$1
| 51.142857 | 208 | 0.681564 |
f1fc47da17006a871ef5dee75b07e5d3dbbe7ec0 | 453 | asm | Assembly | oeis/330/A330892.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/330/A330892.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/330/A330892.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A330892: Square array of polygonal numbers read by descending antidiagonals (the transpose of A317302).
; Submitted by Christian Krause
; 0,1,0,0,1,0,-3,1,1,0,-8,0,2,1,0,-15,-2,3,3,1,0,-24,-5,4,6,4,1,0,-35,-9,5,10,9,5,1,0,-48,-14,6,15,16,12,6,1,0,-63,-20,7,21,25,22,15,7,1,0,-80,-27,8,28,36,35,28,18,8,1,0,-99,-35,9,36,49,51,45,34,21,9,1,0
lpb $0
add $1,1
sub $0,$1
lpe
sub $1,$0
sub $0,2
sub $1,1
mul $0,$1
add $0,2
mul $1,$0
add $0,$1
div $0,2
| 26.647059 | 203 | 0.611479 |
4654eca3a9de69a04d25c4c5a1f057f32546b0d1 | 1,875 | asm | Assembly | counter24b.asm | erg0dic/Sec_dict | b0ba213fa9b3ae78c3872da303d232b45a9e0c4a | [
"MIT"
] | null | null | null | counter24b.asm | erg0dic/Sec_dict | b0ba213fa9b3ae78c3872da303d232b45a9e0c4a | [
"MIT"
] | null | null | null | counter24b.asm | erg0dic/Sec_dict | b0ba213fa9b3ae78c3872da303d232b45a9e0c4a | [
"MIT"
] | null | null | null | #include p18f87k22.inc
global ac1, ac2, ac3, ac_temp1, ac_temp2, ac_temp3, init_counter24bit, counter24bit
acs0 udata_acs
ac1 res 1
ac2 res 1
ac3 res 1
ac_temp1 res 1
ac_temp2 res 1
ac_temp3 res 1
here_is_some code
init_counter24bit
movlw 0x00
movwf ac_temp1, 0
movwf ac_temp2, 0
movwf ac_temp3, 0
return
counter24bit ; initialize by adding some values to ac1, ac2, ac3 to count up to
; counter increments by 1 each time it is called
; call init_counter24bit
movlw 0x00
cpfseq ac3, 0 ; skips decrementing if already zero
bra temp
bra second_byte_count1
temp
decfsz ac3, 1, 0 ; count down from the lowest byte then move on to the second byte
return
bra second_byte_count1
second_byte_count1
incf ac_temp1, 1, 0 ; increment temp register with 1
bc second_byte_count2 ; branch if carry i.e counted all up to .256
return
second_byte_count2
movlw 0x00
addwfc ac_temp1, 0
clrf ac_temp1, 0 ; reset counter fow second byte
movlw 0x00
cpfseq ac2, 0 ; skips decrementing if already zero
bra temp1
bra third_byte_count1
temp1
decfsz ac2, 1, 0 ; decrement second more significant byte
return
bra third_byte_count1
third_byte_count1
incf ac_temp2, 1, 0
bc third_byte_count2
return
third_byte_count2
movlw 0x00
addwfc ac_temp2, 0
clrf ac_temp2, 0 ; reset lower byte counter 2 fow third byte
decf ac1, 1, 0 ; decrement most significant byte
return
; now add the condition in simple one where writes are called
; loop writes and just add
; call counter24bit (add appropriate bytes to ac1, ac2, ac3 address counters)
; then branch to read once ac1 is 0.
; cond: cpfseq ac1, 0 skips if ac1 is 0 i.e. the same as W
; whole: call counter24bit
; cpfseq ac1, 0
; bra write
; bra read
;
; append condition to end of write module
; also
end
| 22.058824 | 85 | 0.722667 |
94b35f09d4316f57be5f5a8bb3ff00a22f731dbd | 39,708 | asm | Assembly | Appl/GeoWrite/Document/documentPage.asm | steakknife/pcgeos | 95edd7fad36df400aba9bab1d56e154fc126044a | [
"Apache-2.0"
] | 504 | 2018-11-18T03:35:53.000Z | 2022-03-29T01:02:51.000Z | Appl/GeoWrite/Document/documentPage.asm | steakknife/pcgeos | 95edd7fad36df400aba9bab1d56e154fc126044a | [
"Apache-2.0"
] | 96 | 2018-11-19T21:06:50.000Z | 2022-03-06T10:26:48.000Z | Appl/GeoWrite/Document/documentPage.asm | steakknife/pcgeos | 95edd7fad36df400aba9bab1d56e154fc126044a | [
"Apache-2.0"
] | 73 | 2018-11-19T20:46:53.000Z | 2022-03-29T00:59:26.000Z | COMMENT @----------------------------------------------------------------------
Copyright (c) Berkeley Softworks 1992 -- All Rights Reserved
PROJECT: PC GEOS
MODULE: GeoWrite
FILE: documentPage.asm
REVISION HISTORY:
Name Date Description
---- ---- -----------
Tony 3/92 Initial version
DESCRIPTION:
This file contains the section related code for WriteDocumentClass
$Id: documentPage.asm,v 1.1 97/04/04 15:56:50 newdeal Exp $
------------------------------------------------------------------------------@
DocPageCreDest segment resource
COMMENT @----------------------------------------------------------------------
MESSAGE: WriteDocumentAppendPagesViaPosition --
MSG_WRITE_DOCUMENT_APPEND_PAGES_VIA_POSITION
for WriteDocumentClass
DESCRIPTION: Append pages after the given position
PASS:
*ds:si - instance data
es - segment of WriteDocumentClass
ax - The message
cx - x pos
dxbp - y pos
RETURN:
if _REGION_LIMIT - carry set if error
DESTROYED:
bx, si, di, ds, es (message handler)
REGISTER/STACK USAGE:
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/CAVEATS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
Tony 5/27/92 Initial version
------------------------------------------------------------------------------@
WriteDocumentAppendPagesViaPosition method dynamic WriteDocumentClass,
MSG_WRITE_DOCUMENT_APPEND_PAGES_VIA_POSITION
; We know that this happens as a result of an APPEND_SECTION from
; an article. We want to partially suspend the document so that
; the document size is not sent to the view until IS_LAST.
ornf ds:[di].WDI_state, mask WDS_SUSPENDED_FOR_APPENDING_REGIONS
; calculate page number
call LockMapBlockES
call FindPageAndSectionAbs ;cx = section, dx = page
EC < ERROR_C FIND_PAGE_RETURNED_ERROR >
mov_tr ax, dx
call MapPageToSectionPage ;ax = section
;bx = page in section
call VMUnlockES
mov_tr cx, ax ;cx = section #
mov bp, bx ;bp = page # in section
mov dx, MSG_WRITE_DOCUMENT_APPEND_PAGE
mov ax, MSG_WRITE_DOCUMENT_INSERT_APPEND_PAGES_LOW
call ObjCallInstanceNoLock
ret
WriteDocumentAppendPagesViaPosition endm
COMMENT @----------------------------------------------------------------------
MESSAGE: WriteDocumentDeletePagesAfterPosition --
MSG_WRITE_DOCUMENT_DELETE_PAGES_AFTER_POSITION
for WriteDocumentClass
DESCRIPTION: Delete all pages in a section after a given position
PASS:
*ds:si - instance data
es - segment of WriteDocumentClass
ax - The message
cx - x pos
dxbp - y pos
RETURN:
if _REGION_LIMIT - carry clear (always)
DESTROYED:
bx, si, di, ds, es (message handler)
REGISTER/STACK USAGE:
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/CAVEATS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
Tony 5/27/92 Initial version
------------------------------------------------------------------------------@
WriteDocumentDeletePagesAfterPosition method dynamic WriteDocumentClass,
MSG_WRITE_DOCUMENT_DELETE_PAGES_AFTER_POSITION
ornf ds:[di].WDI_state, mask WDS_SUSPENDED_FOR_APPENDING_REGIONS
; calculate page number
call LockMapBlockES
call FindPageAndSectionAbs ;cx = section, dx = page
mov_tr ax, dx
call MapPageToSectionPage ;ax = section
;bx = page in section
inc bx ;bx = page # to nuke
; we want to delete all pages *after* this page
call SectionArrayEToP_ES
mov cx, es:[di].SAE_numPages ;cx = # pages in section
sub cx, bx ;cx = # of pages to nuke
jcxz done
; ax = section, bx = page #
nukeLoop:
push cx
mov cx, 1 ;set delete flag
clr dx ;not direct user action
call AddDeletePageToSection
pop cx
loop nukeLoop
mov ax, MSG_VIS_INVALIDATE
call ObjCallInstanceNoLock
; if there is an invalid area (and we are in automatic recalc mode)
; then something unusual happened (like moving wrap around graphics
; from a deleted page)
push es
call WriteGetDGroupES
test es:[miscSettings], mask WMS_AUTOMATIC_LAYOUT_RECALC
pop es
jz noRecalc
tstdw es:MBH_invalidRect.RD_bottom
jz noRecalc
mov ax, MSG_WRITE_DOCUMENT_RECALC_INVAL
mov bx, ds:[LMBH_handle]
mov di, mask MF_FORCE_QUEUE
call ObjMessage
noRecalc:
done:
; We know that this happens as a result of an IS_LAST from
; an article. We want to take care of any pending suspends
EC < call AssertIsWriteDocument >
mov di, ds:[si]
add di, ds:[di].Gen_offset
andnf ds:[di].WDI_state, not mask WDS_SUSPENDED_FOR_APPENDING_REGIONS
test ds:[di].WDI_state, mask WDS_SEND_SIZE_PENDING
jz noSendSize
andnf ds:[di].WDI_state, not mask WDS_SEND_SIZE_PENDING
call ReallySendDocumentSizeToView
noSendSize:
call VMUnlockES
if _REGION_LIMIT
clc
endif
ret
WriteDocumentDeletePagesAfterPosition endm
COMMENT @----------------------------------------------------------------------
MESSAGE: WriteDocumentInsertAppendPagesLow --
MSG_WRITE_DOCUMENT_INSERT_APPEND_PAGES_LOW
for WriteDocumentClass
DESCRIPTION: Low-level insert/append pages
PASS:
*ds:si - instance data
es - segment of WriteDocumentClass
ax - The message
cx - section #
dx - MSG_WRITE_DOCUMENT_INSERT_PAGE to insert or
MSG_WRITE_DOCUMENT_APPEND_PAGE to append
bp - page # in section
RETURN:
if _REGION_LIMIT - carry set if error
DESTROYED:
bx, si, di, ds, es (message handler)
REGISTER/STACK USAGE:
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/CAVEATS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
Tony 5/27/92 Initial version
------------------------------------------------------------------------------@
WriteDocumentInsertAppendPagesLow method dynamic WriteDocumentClass,
MSG_WRITE_DOCUMENT_INSERT_APPEND_PAGES_LOW
mov_tr ax, cx ;ax = section #
mov bx, bp ;bx = page # in section
call LockMapBlockES
; get the number of pages to insert/delete and the offset to do so
push dx
call SectionArrayEToP_ES ;es:di = SectionArrayElement
xchg ax, bx ;ax = page in section
;bx = section #
clr dx ;dxax = page #
mov cx, es:[di].SAE_numMasterPages
div cx ;ax = set #, dx = remainder
mul cx ;ax = offset of group
xchg ax, bx ;ax = section number
;bx = page in section
pop dx
cmp dx, MSG_WRITE_DOCUMENT_INSERT_PAGE
jz 10$
add bx, cx ;if append then move one page
cmp bx, es:[di].SAE_numPages ;further
; if we are appending at the end then we need only do one page at a time
jb 10$
mov bx, es:[di].SAE_numPages
mov cx, 1
10$:
createLoop:
push cx
clr cx
clr dx ;not direct user action
call AddDeletePageToSection
if _REGION_LIMIT
jc abort
endif
inc bx
pop cx
loop createLoop
call VMDirtyES
; redraw the document (unless we are in galley or draft mode)
cmp es:MBH_displayMode, VLTDM_GALLEY
call VMUnlockES
jae noInvalidate
mov ax, MSG_VIS_INVALIDATE
call ObjCallInstanceNoLock
noInvalidate:
if _REGION_LIMIT
clc
exit:
endif
ret
if _REGION_LIMIT
abort:
pop cx
call VMUnlockES
stc
jmp exit
endif
WriteDocumentInsertAppendPagesLow endm
COMMENT @----------------------------------------------------------------------
FUNCTION: AddDeletePageToSection
DESCRIPTION: Add or delete a set of pages to a section
CALLED BY: INTERNAL
PASS:
*ds:si - document object
es - locked map block
ax - section to add pages to
bx - page number (in section) to insert before
cl - non-zero for delete
ch - non-zero to create only (no insert)
dx - non-zero if this is a direct user action
RETURN:
carry - set if aborted
DESTROYED:
none
REGISTER/STACK USAGE:
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/CAVEATS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
Tony 3/10/92 Initial version
------------------------------------------------------------------------------@
AddDeletePageToSection proc far uses ax, bx, cx, dx, di
section local word push ax
pageNum local word push bx
docobj local fptr push ds, si
mapBlock local sptr push es
flags local word push cx
userActionFlag local word push dx
insDelParam local InsertDeleteSpaceTypes
position local dword
vmFile local word
numRegions local word
insertPos local word
invalRect local RectDWord
ForceRef section
ForceRef docobj
ForceRef mapBlock
ForceRef numRegions
createOnlyFlag equ flags.high
deleteFlag equ flags.low
.enter
EC < call AssertIsWriteDocument >
call IgnoreUndoNoFlush
call SuspendFlowRegionNotifications
call GetFileHandle
mov vmFile, bx
; insertPos keeps the region number to insert AFTER. It starts at
; null because we must search the article table to figure out where
; to put the first region, but subsequent regions on the same page go
; in order so that we maintain the order from the master page
mov insertPos, CA_NULL_ELEMENT
; assume we are biffing objects
mov insDelParam, mask \
IDST_MOVE_OBJECTS_BELOW_AND_RIGHT_OF_INSERT_POINT_OR_DELETED_SPACE or\
mask IDST_RESIZE_OBJECTS_INTERSECTING_SPACE or \
mask IDST_DELETE_OBJECTS_SHRUNK_TO_ZERO_SIZE
; add space to the document
push ax
call SectionArrayEToP_ES
mov ax, es:MBH_pageSize.XYS_height
mov cx, ax ;cx = page height
mul pageNum ;dxax = position in this section
movdw position, dxax
pop ax
call FindSectionPosition ;dxax = y position
adddw position, dxax
mov bx, cx
clr cx ;cxbx = page height (space to add)
movdw dxax, position ;dx.ax = position to add space
tst createOnlyFlag
LONG jnz afterSpace
; if deleting then check for graphic objects on the page
tst deleteFlag
LONG jz doIt
negdw cxbx ;we're deleting so make
;space negative
tst userActionFlag
LONG jnz doIt
push ds
call WriteGetDGroupDS
test ds:[miscSettings], mask WMS_DTP_MODE
pop ds
LONG jnz done
call DoesSpaceContainGraphics ;any graphics on the page?
jnc doIt
; if the user has chosen "do not delete pages with graphics"
; then honor that request
push ds
call WriteGetDGroupDS
test ds:[miscSettings], mask WMS_DO_NOT_DELETE_PAGES_WITH_GRAPHICS
pop ds
jz 10$
toDone:
jmp done
10$:
push cx
mov ax, offset DeleteGraphicsOnPageString
mov cx, offset DeleteGraphicsOnPageTable
mov dx, CustomDialogBoxFlags \
<0, CDT_QUESTION, GIT_MULTIPLE_RESPONSE,0>
call ComplexQuery ;ax = InteractionCommand
pop cx
cmp ax, IC_NULL
stc
jz toDone
cmp ax, IC_DISMISS ;DISMISS = Cancel
stc
jz toDone
cmp ax, IC_NO ;NO = Move
jnz doIt ;YES = Delete
; it is a move -- set the correct flags and force some recalculation
mov insDelParam, mask \
IDST_MOVE_OBJECTS_BELOW_AND_RIGHT_OF_INSERT_POINT_OR_DELETED_SPACE or\
mask IDST_MOVE_OBJECTS_INTERSECTING_DELETED_SPACE or \
mask IDST_MOVE_OBJECTS_INSIDE_DELETED_SPACE_BY_AMOUNT_DELETED
push bx, cx, bp, ds
mov ds, mapBlock
movdw dxax, position
movdw invalRect.RD_bottom, dxax
adddw dxax, cxbx
movdw invalRect.RD_top, dxax
clr dx
clrdw invalRect.RD_left, dx
mov ax, ds:MBH_pageSize.XYS_width
movdw invalRect.RD_right, dxax
lea bp, invalRect
call AddRectToInval
pop bx, cx, bp, ds
doIt:
movdw dxax, position
push di
mov di, insDelParam
call InsertOrDeleteSpace
pop di
; increment/decrement number of pages
mov cx, 1 ;cx = 1 for insert
tst deleteFlag
jz noDelete3
neg cx ;cx = -1 for delete
noDelete3:
add es:[di].SAE_numPages, cx
add es:MBH_totalPages, cx
call VMDirtyES
afterSpace:
tst deleteFlag
jnz noCreate
; suspend all articles
call SuspendDocument
; calculate correct master page to use
mov ax, pageNum
clr dx
div es:[di].SAE_numMasterPages ;dx = remainder
mov bx, dx
shl bx ;make bx offset into MP array
push si, ds
; get master page block and lock it
mov ax, es:[di][bx].SAE_masterPages
call WriteVMBlockToMemBlock
mov_tr bx, ax
call ObjLockObjBlock
mov ds, ax
mov si, offset FlowRegionArray
; *ds:si = flow region array
push bx
mov bx, cs
mov di, offset CreateArticleRegionCallback
call ChunkArrayEnum
pop bx
call MemUnlock
pop si, ds
if _REGION_LIMIT
;
; If the regions could not be created, don't unsuspend the
; articles. They will recalculate, which could cause them
; to try to add more regions, yuck.
;
jc done ;error adding region
endif
; unsuspend all articles (causes redraw)
call UnsuspendDocument
noCreate:
; send updates (since a page has been added)
mov ax, mask NF_PAGE or mask NF_TOTAL_PAGES
call SendNotification
clc
done:
call UnsuspendFlowRegionNotifications
call AcceptUndo
.leave
ret
AddDeletePageToSection endp
COMMENT @----------------------------------------------------------------------
FUNCTION: CreateArticleRegionCallback
DESCRIPTION: Create an article region (as page of creating a page)
CALLED BY: INTERNAL
PASS:
*ds:si - flow region array
ds:di - FlowRegionArrayElement (in master page block)
ss:bp - inherited variables
es - map block (locked)
RETURN:
carry - set to finish (always returned clear)
(except when region limit is exceeded)
DESTROYED:
ax, bx, cx, dx, si, di
REGISTER/STACK USAGE:
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/CAVEATS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
Tony 3/10/92 Initial version
------------------------------------------------------------------------------@
CreateArticleRegionCallback proc far uses es
.enter inherit AddDeletePageToSection
push ds:[LMBH_handle]
; find the article block and lock it into es
push di, ds
mov ax, ds:[di].FRAE_article
segmov ds, es
mov si, offset ArticleArray
call ChunkArrayElementToPtr
mov ax, ds:[di].AAE_articleBlock
movdw dssi, docobj
call WriteVMBlockToMemBlock
mov_tr bx, ax
call ObjLockObjBlock
mov es, ax ;es = article block
pop di, ds
push bx ;save handle to unlock
movdw dxax, position
add ax, ds:[di].FRAE_position.XYO_y
adc dx, 0 ;dx.ax = y position for region
mov bx, ds:[di].FRAE_position.XYO_x
pushdw ds:[di].FRAE_textRegion
pushdw ds:[di].FRAE_size
segxchg ds, es ;ds = article, es = master page
mov si, offset ArticleRegionArray
mov di, ds:[si]
mov cx, ds:[di].CAH_count
mov numRegions, cx
if _REGION_LIMIT
checkLimit::
push cx, es
inc cx ; cx <- # of regions after add
call WriteGetDGroupES
tst es:regionLimit ; is there a limit?
jz noLimit ; no, skip the check
cmp cx, es:regionLimit ; # regions < limit?
LONG jae abort ; No - remember to pop CX, ES!
tst es:regionWarning ; is there a warning limit?
jz noLimit ; no, skip the check
cmp cx, es:regionWarning ; # regions < limit?
LONG jae warning
noLimit:
pop cx, es
endif
cmp insertPos, CA_NULL_ELEMENT
jz searchArray
; this is a subsequent region of the same page
push ax
mov ax, insertPos
sub cx, ax ;cx = regions left
dec cx
inc insertPos
call ChunkArrayElementToPtr
add di, size ArticleRegionArrayElement
pop ax
jmp regionCommon
; search the region array to find the place to insert the region
; easier to traverse ourselves than to use ChunkArrayEnum (faster too)
searchArray:
add di, ds:[di].CAH_offset
jcxz gotRegion
searchLoop:
;
; if we get to the end of our desired section, insert at end of
; our desired section
;
push ax
mov ax, section
cmp ax, ds:[di].ARAE_meta.VLTRAE_section
pop ax
jb gotRegion
cmpdw dxax, ds:[di].ARAE_meta.VLTRAE_spatialPosition.PD_y
jb gotRegion
ja next
cmp bx, ds:[di].ARAE_meta.VLTRAE_spatialPosition.PD_x.low
jbe gotRegion
next:
add di, size ArticleRegionArrayElement
loop searchLoop
gotRegion:
push ax
call ChunkArrayPtrToElement
mov insertPos, ax
pop ax
; We have found the position to insert (before ds:di)
; Rules for setting flags the the new region:
; 1) If this is the first and only region in the section, set IS_LAST
; 2) If inserting after the final region in the section, set EMPTY
; 3) If inserting before an EMPTY region, set EMPTY
; Otherwise set no flags
;
; Luckily the IS_LAST bit isn't used any more :-)
regionCommon:
push ax
mov ax, section ;ax = section we're inserting in
cmp cx, numRegions
jz isFirstRegionOfSection
cmp ax, ds:[di-(size ArticleRegionArrayElement)].VLTRAE_section
jz notFirstRegionOfSection
; This is the first region, is it the only one ?
isFirstRegionOfSection:
jcxz firstAndOnly
cmp ax, ds:[di].VLTRAE_section
jz firstButNotOnly
firstAndOnly:
;;; mov cx, mask VLTRF_IS_LAST
clr cx
jmp gotFlags
firstButNotOnly:
clr cx
jmp gotFlags
; Check for case 2 and 3
notFirstRegionOfSection:
jcxz finalRegionInSection
cmp ax, ds:[di].VLTRAE_section
jz notFinalRegionInSection
finalRegionInSection:
mov cx, mask VLTRF_EMPTY
jmp gotFlags
notFinalRegionInSection:
mov cx, mask VLTRF_EMPTY
test cx, ds:[di].VLTRAE_flags
jnz gotFlags
clr cx
gotFlags:
pop ax
call ChunkArrayInsertAt
call ClearArticleTextCachedRegion
; Now that we've created a new element for this region, store it's
; information.
; We make the text object's region one pixel smaller than the grobj
; object so that things will draw correctly
movdw ds:[di].ARAE_meta.VLTRAE_spatialPosition.PD_y, dxax
mov ds:[di].ARAE_meta.VLTRAE_spatialPosition.PD_x.low, bx
mov ds:[di].ARAE_meta.VLTRAE_flags, cx
popdw cxdx
movdw ds:[di].ARAE_meta.VLTRAE_size, cxdx
mov cx, section
mov ds:[di].ARAE_meta.VLTRAE_section, cx
; if we had deleted any chars/lines/space from this section before
; we need to reclaim them now
push es
mov es, mapBlock
call VMDirtyES
mov_tr ax, cx
push di
call SectionArrayEToP_ES ;es:di = section
mov bx, di ;es:bx = section
pop di
clrdw dxax
xchgdw dxax, es:[bx].SAE_charsDeleted
movdw ds:[di].VLTRAE_charCount, dxax
clrdw dxax
xchgdw dxax, es:[bx].SAE_linesDeleted
movdw ds:[di].VLTRAE_lineCount, dxax
clrdw dxax
xchgwbf dxal, es:[bx].SAE_spaceDeleted
movwbf ds:[di].VLTRAE_calcHeight, dxal
pop es
; copy region (if any)
popdw axdx ;axdx = region
tstdw axdx
jz noRegionToCopy
push di, bp ;save ptr to article reg
mov di, dx ;axdi = source item
mov cx, DB_UNGROUPED ;cx = dest group
mov bx, vmFile ;source file
mov bp, bx ;dest file
call DBCopyDBItem ;axdi = item in dest
mov dx, di ;axdx = item in dest
pop di, bp ;restore ptr to article reg
movdw ds:[di].ARAE_inheritedTextRegion, axdx
noRegionToCopy:
; create a GrObj flow object for the region
push di, ds ;save ptr to article reg
pushdw ds:[di].ARAE_meta.VLTRAE_spatialPosition.PD_y ;y pos
mov es, mapBlock
mov ax, es:MBH_grobjBlock
mov bx, vmFile
call VMVMBlockToMemBlock
pop bx
push ax
mov ax, ds:[di].ARAE_meta.VLTRAE_spatialPosition.PD_x.low
mov cx, ds:[di].ARAE_meta.VLTRAE_size.XYS_width
mov dx, ds:[di].ARAE_meta.VLTRAE_size.XYS_height
mov di, offset MainBody
push di ;push body optr
mov di, segment FlowRegionClass
push di
mov di, offset FlowRegionClass
push di ;push class pointer
mov di, GRAPHIC_STYLE_FLOW_REGION
push di
mov di, CA_NULL_ELEMENT
push di ;textStyle
mov di, DOCUMENT_FLOW_REGION_LOCKS
push di
call CreateGrObj ;cx:dx = new object
pop di, ds ;restore ptr to article reg
; tell the flow region what article block it is associated with
mov bx, ds:[LMBH_handle]
call VMMemBlockToVMBlock ;ax = article VM block
mov_tr bx, ax ;bx = article VM block
clr ax ;ax = master page VM block
call SetFlowRegionAssociation
call MemBlockToVMBlockCX
movdw ds:[di].ARAE_object, cxdx
; calculate the correct text flow region for the flow region, but
; first see if we can optimize by noticing that there are no wrap
; objects
mov es, mapBlock
mov ax, es:MBH_grobjBlock
mov bx, vmFile ;bx = file
call VMVMBlockToMemBlock
push bx
mov_tr bx, ax
mov si, offset MainBody ;bxsi = grobj body
mov ax, MSG_WRITE_GROBJ_BODY_GET_FLAGS
push di, bp
mov di, mask MF_CALL or mask MF_FIXUP_DS
call ObjMessage ;ax = WriteGrObjBodyFlags
pop di, bp
test ax, mask WGOBF_WRAP_AREA_NON_NULL
pop ax ;ax = file
jnz recalcFlow
tstdw ds:[di].ARAE_inheritedTextRegion
jz afterFlow
recalcFlow:
call RecalcOneFlowRegion
afterFlow:
mov si, offset ArticleRegionArray
call ChunkArrayPtrToElement ;ax = region number
; unlock article block
pop bx
call MemUnlock
;
; Recalculate text.
;
; If this region was added because the text object asked for it, then
; we don't need to recalculate (since the text object is in the process
; of doing just that).
;
; If this region was added at the users request, then we have one of
; two situations:
; - This is a new article (we need to create lines/recalculate)
; - This is not a new article (we just need to recalculate)
;
push ax ;save region number
mov si, offset ArticleText
mov ax, MSG_VIS_NOTIFY_GEOMETRY_VALID
call DP_ObjMessageNoFlags
pop cx ;cx = region number
mov si, offset ArticleText
mov ax, MSG_VIS_LARGE_TEXT_REGION_CHANGED
call DP_ObjMessageNoFlags
pop bx
call MemDerefDS
clc
if _REGION_LIMIT
done:
endif
.leave
ret
if _REGION_LIMIT
;
; The region limit would exceeded if another region were added,
; so don't do it - just clean up the stack and exit with error.
;
abort:
pop cx, es
add sp, (2 * size dword) ;clear the stack
pop bx
call MemUnlock ;unlock article block
pop bx
call MemDerefDS ;*ds:si - FlowRegArray
stc ;signal error
jmp done
warning:
push ax, bx, si, di, ds
lds si, ss:docobj
mov bx, ds:[LMBH_handle]
mov ax, MSG_WRITE_DOCUMENT_DO_REGION_LIMIT_WARNING
mov di, mask MF_FORCE_QUEUE or mask MF_CHECK_DUPLICATE or \
mask MF_REPLACE or mask MF_CAN_DISCARD_IF_DESPERATE
call ObjMessage
pop ax, bx, si, di, ds
jmp noLimit
endif
CreateArticleRegionCallback endp
COMMENT @----------------------------------------------------------------------
FUNCTION: ClearArticleTextCachedRegion
DESCRIPTION: Clear the cached region for an ArticleText
CALLED BY: INTERNAL
PASS:
ds - article block
RETURN:
none
DESTROYED:
none
REGISTER/STACK USAGE:
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/CAVEATS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
Tony 6/ 3/92 Initial version
------------------------------------------------------------------------------@
ClearArticleTextCachedRegion proc far
class WriteArticleClass
; clear out the gstate region that we're translated for
push si
mov si, offset ArticleText
mov si, ds:[si]
add si, ds:[si].Vis_offset
cmp ds:[si].VTI_gstateRegion, -1
pop si
ret
ClearArticleTextCachedRegion endp
COMMENT @----------------------------------------------------------------------
FUNCTION: DoesSpaceContainGraphics
DESCRIPTION: See if a given area contains graphics
CALLED BY: INTERNAL
PASS:
*ds:si - document object
es - locked map block
dx.ax - position to add space
cx.bx - (signed) amount of space to add
RETURN:
carry - set if any graphics in space
DESTROYED:
none
REGISTER/STACK USAGE:
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/CAVEATS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
Tony 4/ 1/92 Initial version
------------------------------------------------------------------------------@
DoesSpaceContainGraphics proc near uses ax, bx, cx, dx, si, di, bp
.enter
EC < call AssertIsWriteDocument >
sub sp, size WriteGrObjBodyGraphicsInSpaceParams
mov bp, sp
movdw ss:[bp].WGBGISP_position, dxax
negdw cxbx
movdw ss:[bp].WGBGISP_size, cxbx
mov ax, es:MBH_grobjBlock
call WriteVMBlockToMemBlock
mov_tr bx, ax
mov ax, MSG_WRITE_GROBJ_BODY_GRAPHICS_IN_SPACE
mov si, offset MainBody
mov di, mask MF_CALL or mask MF_FIXUP_DS
call ObjMessage
lahf
add sp, size WriteGrObjBodyGraphicsInSpaceParams
sahf
.leave
ret
DoesSpaceContainGraphics endp
COMMENT @----------------------------------------------------------------------
FUNCTION: SetFlowRegionAssociation
DESCRIPTION: Set the data the associates a flow region with something
CALLED BY: INTERNAL
PASS:
cxdx - flow region
ax - master page VM block
bx - article block
RETURN:
none
DESTROYED:
none
REGISTER/STACK USAGE:
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/CAVEATS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
Tony 9/12/92 Initial version
------------------------------------------------------------------------------@
SetFlowRegionAssociation proc far uses ax, bx, cx, dx, si
.enter
push bx
movdw bxsi, cxdx ;bxsi = flow region
mov_tr cx, ax ;cx = master page
pop dx ;dx = article block
mov ax, MSG_FLOW_REGION_SET_ASSOCIATION
call DP_ObjMessageFixupDS
.leave
ret
SetFlowRegionAssociation endp
COMMENT @----------------------------------------------------------------------
FUNCTION: InsertOrDeleteSpace
DESCRIPTION: Insert vertical space in the document
CALLED BY: INTERNAL
PASS:
*ds:si - document object
es - locked map block
dx.ax - position to add space
cx.bx - (signed) amount of space to add
di - InsertDeleteDeleteTypes
RETURN:
none
DESTROYED:
none
REGISTER/STACK USAGE:
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/CAVEATS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
Tony 3/10/92 Initial version
------------------------------------------------------------------------------@
InsertOrDeleteSpace proc near uses ax, bx, cx, dx, si, di, bp
insDelParams local InsertDeleteSpaceParams
mapBlockSeg local sptr
fileHandle local word
ForceRef mapBlockSeg
.enter
EC < call AssertIsWriteDocument >
; fill in the Parameter structure
mov insDelParams.IDSP_type, di
movdw insDelParams.IDSP_position.PDF_y.DWF_int, dxax
movdw insDelParams.IDSP_space.PDF_y.DWF_int, cxbx
clr ax
mov insDelParams.IDSP_position.PDF_y.DWF_frac, ax
mov insDelParams.IDSP_space.PDF_y.DWF_frac, ax
clrdw insDelParams.IDSP_position.PDF_x.DWF_int
clrdw insDelParams.IDSP_space.PDF_x.DWF_int
mov insDelParams.IDSP_position.PDF_x.DWF_frac, ax
mov insDelParams.IDSP_space.PDF_x.DWF_frac, ax
; for each article:
; - for each text region:
; - move region down if needed
call GetFileHandle
mov fileHandle, bx
push ds:[LMBH_handle], si, es
segmov ds, es
mov si, offset ArticleArray
mov bx, cs
mov di, offset InsDelSpaceInArticleCallback
call ChunkArrayEnum
pop bx, si, es
call MemDerefDS
mov ax, es:MBH_grobjBlock
call WriteVMBlockToMemBlock
mov_tr bx, ax
mov si, offset MainBody
mov ax, MSG_VIS_LAYER_INSERT_OR_DELETE_SPACE
push bp
lea bp, insDelParams
call DP_ObjMessageFixupDS
pop bp
.leave
call SendDocumentSizeToView
ret
InsertOrDeleteSpace endp
COMMENT @----------------------------------------------------------------------
FUNCTION: InsDelSpaceInArticleCallback
DESCRIPTION: Insert or delete space in an article
CALLED BY: INTERNAL
PASS:
ds:di - ArticleArrayElement
ss:bp - inherited variables
RETURN:
carry - set to end (always returned clear)
DESTROYED:
ax, bx, dx, si, di
REGISTER/STACK USAGE:
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/CAVEATS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
Tony 3/10/92 Initial version
------------------------------------------------------------------------------@
InsDelSpaceInArticleCallback proc far uses cx, ds
.enter inherit InsertOrDeleteSpace
mov mapBlockSeg, ds
; lock the article block
mov bx, fileHandle
mov ax, ds:[di].AAE_articleBlock
call VMVMBlockToMemBlock
mov_tr bx, ax
push bx
call ObjLockObjBlock
mov ds, ax ;ds = article block
movdw dxax, insDelParams.IDSP_position.PDF_y.DWF_int
mov si, offset ArticleRegionArray
mov di, ds:[si]
mov cx, ds:[di].CAH_count
jcxz done
add di, ds:[di].CAH_offset
; zip through the article block looking for regions that need to
; be moved
; dxax = position to insert/delete space at
sizeLoop:
jgdw dxax, ds:[di].ARAE_meta.VLTRAE_spatialPosition.PD_y, next
; move this object -- move the text region (grobj will move the
; grobj object)
adddw ds:[di].ARAE_meta.VLTRAE_spatialPosition.PD_y, \
insDelParams.IDSP_space.PDF_y.DWF_int, bx
; see if this object needs to be deleted
jldw dxax, ds:[di].ARAE_meta.VLTRAE_spatialPosition.PD_y, next
deleteObj::
mov es, mapBlockSeg
call DeleteArticleRegion
sub di, size ArticleRegionArrayElement
next:
add di, size ArticleRegionArrayElement
loop sizeLoop
done:
pop bx
call MemUnlock
clc
.leave
ret
InsDelSpaceInArticleCallback endp
COMMENT @----------------------------------------------------------------------
FUNCTION: DeleteArticleRegion
DESCRIPTION: Update the region array (and possibly the section array)
for a deleted region
CALLED BY: INTERNAL
PASS:
ds:di - ArticleRegionArrayElement
es - map block
RETURN:
none
DESTROYED:
none
REGISTER/STACK USAGE:
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/CAVEATS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
Tony 6/ 4/92 Initial version
------------------------------------------------------------------------------@
DeleteArticleRegion proc far uses ax, bx, cx, dx, si, bp
.enter
call ChunkArrayPtrToElement ;ax = region number
mov_tr cx, ax ;cx = region number
push si
movdw bxsi, ds:[di].ARAE_object
call VMBlockToMemBlockRefDS
mov ax, MSG_GO_CLEAR
call DP_ObjMessageNoFlags
push cx
mov si, offset ArticleText
mov ax, MSG_VIS_LARGE_TEXT_REGION_CHANGED
call ObjCallInstanceNoLock
pop ax
pop si
; clear out the gstate region that we're translated for
call ClearArticleTextCachedRegion
call ChunkArrayElementToPtr ;ds:di = region
; we need to update the region array to account for the space lost
; if we are not at the first region in the section then add everything
; to the previous region. If we are at the first region then add
; everything to the next region *unless* we are at the only region for
; the section in which case we store the nuked values in the
; section array
mov ax, ds:[di].VLTRAE_section
mov bx, di ;ds:bx = dest region
mov si, ds:[ArticleRegionArray]
ChunkSizePtr ds, si, cx
add cx, si ;cx = offset past chunk
add si, ds:[si].CAH_offset
;
; ds:si = First region in the region array
; ds:di = Region to nuke
; ax = Section for (ds:di)
; ds:cx = Pointer past end of region array
;
cmp si, di ;first region ?
jz firstRegion
;
; We aren't deleting the very first region. If the preceding region
; is in the same section, then we ripple information from the current
; region backwards into that previous one.
;
lea bx, ds:[di-(size ArticleRegionArrayElement)]
cmp ax, ds:[bx].VLTRAE_section
jz gotRegionToModify
;
; The previous region is not in the same section as (ds:di). We need
; to ripple the information forward to the next region (if possible).
;
firstRegion:
;
; ds:di = Region to delete, it is the first region in its section
; ds:cx = Pointer past the end of the region array
;
; We want to ripple information forward to the next region in the
; array, unless the current region is the last one in the section
; in which case we are suddenly helpless :-)
;
sub cx, size ArticleRegionArrayElement
cmp di, cx ; Check for last in array
je lastInSection ; Branch if it is
lea bx, ds:[di+(size ArticleRegionArrayElement)]
cmp ax, ds:[bx].VLTRAE_section ; Check next not in same section
jne lastInSection ; Branch if it isn't
;
; The next region exists and is in the same section. Check to see if
; it's empty.
;
test ds:[bx].VLTRAE_flags, mask VLTRF_EMPTY
jz gotRegionToModify ; Branch if not empty
lastInSection:
;
; This is the last region in this section. Accumulate the amounts
; into a safe place.
;
push di
call SectionArrayEToP_ES ;es:di = section
mov bx, di ;es:bx = section
pop di
adddw es:[bx].SAE_charsDeleted, ds:[di].VLTRAE_charCount, ax
adddw es:[bx].SAE_linesDeleted, ds:[di].VLTRAE_lineCount, ax
addwbf es:[bx].SAE_spaceDeleted, ds:[di].VLTRAE_calcHeight, ax
call VMDirtyES
jmp afterAdjustment
gotRegionToModify:
adddw ds:[bx].VLTRAE_charCount, ds:[di].VLTRAE_charCount, ax
adddw ds:[bx].VLTRAE_lineCount, ds:[di].VLTRAE_lineCount, ax
addwbf ds:[bx].VLTRAE_calcHeight, ds:[di].VLTRAE_calcHeight, ax
afterAdjustment:
mov si, offset ArticleRegionArray
call ChunkArrayDelete
.leave
ret
DeleteArticleRegion endp
COMMENT @----------------------------------------------------------------------
FUNCTION: SuspendFlowRegionNotifications
DESCRIPTION: Suspend flow region notifications
CALLED BY: INTERNAL
PASS:
none
RETURN:
none
DESTROYED:
none
REGISTER/STACK USAGE:
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/CAVEATS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
Tony 9/13/92 Initial version
------------------------------------------------------------------------------@
SuspendFlowRegionNotifications proc far
pushf
push ds
call WriteGetDGroupDS
inc ds:[suspendNotification]
pop ds
popf
ret
SuspendFlowRegionNotifications endp
UnsuspendFlowRegionNotifications proc far
pushf
push ds
call WriteGetDGroupDS
dec ds:[suspendNotification]
pop ds
popf
ret
UnsuspendFlowRegionNotifications endp
COMMENT @----------------------------------------------------------------------
MESSAGE: WriteDocumentGetGraphicTokensForStyle --
MSG_WRITE_DOCUMENT_GET_GRAPHIC_TOKENS_FOR_STYLE
for WriteDocumentClass
DESCRIPTION: Get the graphic attribute tokens for a style
PASS:
*ds:si - instance data
es - segment of WriteDocumentClass
ax - The message
cx - style token
RETURN:
cx - line attr token
dx - area attr token
DESTROYED:
bx, si, di, ds, es (message handler)
REGISTER/STACK USAGE:
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/CAVEATS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
Tony 11/13/92 Initial version
------------------------------------------------------------------------------@
WriteDocumentGetGraphicTokensForStyle method dynamic WriteDocumentClass,
MSG_WRITE_DOCUMENT_GET_GRAPHIC_TOKENS_FOR_STYLE
call GetFileHandle ;bx = file
call LockMapBlockDS
mov ax, ds:[MBH_graphicStyles]
call VMUnlockDS
call VMLock
mov ds, ax
mov si, VM_ELEMENT_ARRAY_CHUNK ;*ds:si = styles
mov_tr ax, cx
call ChunkArrayElementToPtr
mov cx, ds:[di].GSE_lineAttrToken
mov dx, ds:[di].GSE_areaAttrToken
call VMUnlock
ret
WriteDocumentGetGraphicTokensForStyle endm
COMMENT @----------------------------------------------------------------------
MESSAGE: WriteDocumentGetTextTokensForStyle --
MSG_WRITE_DOCUMENT_GET_TEXT_TOKENS_FOR_STYLE
for WriteDocumentClass
DESCRIPTION: Get the text attribute tokens for a style
PASS:
*ds:si - instance data
es - segment of WriteDocumentClass
ax - The message
cx - style token
RETURN:
cx - char attr token
dx - para attr token
DESTROYED:
bx, si, di, ds, es (message handler)
REGISTER/STACK USAGE:
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/CAVEATS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
Tony 11/13/92 Initial version
------------------------------------------------------------------------------@
WriteDocumentGetTextTokensForStyle method dynamic WriteDocumentClass,
MSG_WRITE_DOCUMENT_GET_TEXT_TOKENS_FOR_STYLE
call GetFileHandle ;bx = file
call LockMapBlockDS
mov ax, ds:[MBH_textStyles]
call VMUnlockDS
call VMLock
mov ds, ax
mov si, VM_ELEMENT_ARRAY_CHUNK ;*ds:si = styles
mov_tr ax, cx
call ChunkArrayElementToPtr
mov cx, ds:[di].TSEH_charAttrToken
mov dx, ds:[di].TSEH_paraAttrToken
call VMUnlock
ret
WriteDocumentGetTextTokensForStyle endm
if _REGION_LIMIT
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
WriteDocumentDoRegionLimitWarning
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: If the current number of regions exceeds the region limit
warning threshold, warn the user.
CALLED BY: MSG_WRITE_DOCUMENT_DO_REGION_LIMIT_WARNING
PASS: *ds:si - instance data
ds:di - *ds:si
es - seg addr of WriteDocumentClass
ax - the message
RETURN: nothing
DESTROYED: bx, si, di, ds, es (method handler)
ax, cx, bp
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
cassie 4/28/95 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
WriteDocumentDoRegionLimitWarning method dynamic WriteDocumentClass,
MSG_WRITE_DOCUMENT_DO_REGION_LIMIT_WARNING
;
; If we're in the process of reverting, we don't care how
; many regions the document has now, because it will have
; fewer than the limit after the revert is completed.
;
cmp ds:[di].GDI_operation, GDO_REVERT_TO_AUTO_SAVE
je done
call GetFileHandle
mov bp, bx
;
; Count all the regions in all the articles.
;
clr cx ; initialize count
call LockMapBlockDS
mov si, offset ArticleArray
mov bx, cs
mov di, offset CountArticleRegionsCallback
call ChunkArrayEnum
call VMUnlockDS
;
; If the number of regions is now above the warning threshold,
; tell the user about it.
;
call WriteGetDGroupDS
EC < tst ds:regionWarning >
EC < ERROR_Z WRITE_INTERNAL_LOGIC_ERROR >
cmp cx, ds:regionWarning
jb done
mov ax, offset RegionWarningString
call DisplayWarning
done:
ret
WriteDocumentDoRegionLimitWarning endm
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
CountArticleRegionsCallback
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: count the total number of regions in all articles
CALLED BY: WriteDocumentDoRegionLimitWarning
PASS: ds:di - ArticleArrayElement
bp - file handle
cx - cumulative count
RETURN: carry clear
DESTROYED: ax, si, di
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
cassie 4/28/95 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
CountArticleRegionsCallback proc far
uses ds
.enter
mov bx, bp
mov ax, ds:[di].AAE_articleBlock
call VMVMBlockToMemBlock
mov bx, ax
push bx
call ObjLockObjBlock
mov ds, ax ;ds = article block
mov si, offset ArticleRegionArray
mov di, ds:[si]
add cx, ds:[di].CAH_count
pop bx
call MemUnlock
clc
.leave
ret
CountArticleRegionsCallback endp
endif
DocPageCreDest ends
| 23.343915 | 80 | 0.666591 |
de9edf0489672af4a44d1738b3092eb0ee837320 | 53 | asm | Assembly | test/jzas/semantic/valid/success03.asm | scoffey/jz80sim | 0de07a5ef51a1e7131b27056744459f29cd11d39 | [
"MIT"
] | 1 | 2015-03-27T15:58:50.000Z | 2015-03-27T15:58:50.000Z | test/jzas/semantic/valid/success03.asm | scoffey/jz80sim | 0de07a5ef51a1e7131b27056744459f29cd11d39 | [
"MIT"
] | null | null | null | test/jzas/semantic/valid/success03.asm | scoffey/jz80sim | 0de07a5ef51a1e7131b27056744459f29cd11d39 | [
"MIT"
] | null | null | null | init mac a
end init
mac macro reg
ld reg, 0
endm
| 7.571429 | 13 | 0.679245 |
e8ad7f507aec9a9e1945995fab561e103f891b50 | 396 | asm | Assembly | oeis/093/A093406.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/093/A093406.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/093/A093406.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A093406: a(n) = 4*a(n-1) - 6*a(n-2) + 4*a(n-3) + a(n-4).
; Submitted by Christian Krause
; 1,3,11,31,71,145,289,601,1321,2979,6683,14743,32111,69697,151777,332113,728689,1598883,3503627,7668079,16774775,36704017,80343361,175916521,385196761,843365379,1846290395,4041672871,8847607391,19368919297,42403014721,92830645537
mov $1,$0
add $1,3
seq $1,97081 ; Sum C(n,4k)2^k, k = 0 . . n.
mov $0,$1
| 44 | 230 | 0.714646 |
891400fb045228fde72149a603905af1bdf6cadc | 367 | asm | Assembly | oeis/158/A158893.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/158/A158893.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/158/A158893.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A158893: Triangle read by rows: T(n,1)=7n-6; T(n,m)= 1+n-m, 1<m<=n.
; Submitted by Christian Krause
; 1,8,1,15,2,1,22,3,2,1,29,4,3,2,1,36,5,4,3,2,1,43,6,5,4,3,2,1,50,7,6,5,4,3,2,1,57,8,7,6,5,4,3,2,1,64,9,8,7,6,5,4,3,2,1
mov $2,$0
lpb $0
add $4,1
mov $3,$4
cmp $3,$2
sub $2,$4
mul $3,$0
mov $0,$2
mul $3,6
sub $3,$2
lpe
add $3,$4
mov $0,$3
add $0,1
| 19.315789 | 119 | 0.53406 |
c1e1ef37fd145c049d056c922d16230d37f7c372 | 1,265 | nasm | Assembly | modules/taskman/path/pathman.nasm | r-tty/radios | fdfaaadd256564ea3ed1b7fc408e7aecf648ae2b | [
"BSD-3-Clause"
] | null | null | null | modules/taskman/path/pathman.nasm | r-tty/radios | fdfaaadd256564ea3ed1b7fc408e7aecf648ae2b | [
"BSD-3-Clause"
] | null | null | null | modules/taskman/path/pathman.nasm | r-tty/radios | fdfaaadd256564ea3ed1b7fc408e7aecf648ae2b | [
"BSD-3-Clause"
] | null | null | null | ;*******************************************************************************
; pathman.nasm - head code of the path manager.
; Copyright (c) 2002 RET & COM Research.
;*******************************************************************************
module tm.pathman
%include "errors.ah"
%include "parameters.ah"
%include "rm/iomsg.ah"
%include "tm/pathmsg.ah"
publicproc TM_InitPathman
externproc RD_Init, RFS_InitOCBpool, TM_SetMHfromTable
section .data
PathMsgHandlers:
mMHTabEnt MH_ResolvePath, PATH_RESOLVE
mMHTabEnt MH_ChDir, PATH_CHDIR
mMHTabEnt MH_ChRoot, PATH_CHROOT
mMHTabEnt 0
section .text
; PTM_Init - initialize path manager.
; Input:
; Output:
proc TM_InitPathman
call RD_Init
jc .Exit
mov eax,MAXOCBS
call RFS_InitOCBpool
jc .Exit
mov esi,PathMsgHandlers
call TM_SetMHfromTable
.Exit: ret
endp ;---------------------------------------------------------------
; PATH_RESOLVE handler
proc MH_ResolvePath
ret
endp ;---------------------------------------------------------------
; PATH_CHDIR handler
proc MH_ChDir
ret
endp ;---------------------------------------------------------------
; PATH_CHROOT handler
proc MH_ChRoot
ret
endp ;---------------------------------------------------------------
| 21.810345 | 80 | 0.506719 |
b7af294cabb54f67507ac4ed241cd31281c0cdd7 | 4,102 | asm | Assembly | Transynther/x86/_processed/NC/_zr_/i9-9900K_12_0xa0_notsx.log_21829_311.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NC/_zr_/i9-9900K_12_0xa0_notsx.log_21829_311.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NC/_zr_/i9-9900K_12_0xa0_notsx.log_21829_311.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r8
push %rax
push %rcx
push %rdi
push %rsi
lea addresses_UC_ht+0x1a092, %rsi
lea addresses_WT_ht+0x1a6fa, %rdi
clflush (%rdi)
nop
nop
and $1664, %rax
mov $86, %rcx
rep movsl
nop
nop
nop
nop
nop
and $79, %r8
pop %rsi
pop %rdi
pop %rcx
pop %rax
pop %r8
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r13
push %r14
push %r8
push %rax
push %rdi
// Faulty Load
mov $0x404fd10000000cfa, %r13
nop
nop
nop
xor $48465, %rdi
mov (%r13), %r14d
lea oracles, %r10
and $0xff, %r14
shlq $12, %r14
mov (%r10,%r14,1), %r14
pop %rdi
pop %rax
pop %r8
pop %r14
pop %r13
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'src': {'type': 'addresses_NC', 'AVXalign': False, 'size': 8, 'NT': False, 'same': False, 'congruent': 0}, 'OP': 'LOAD'}
[Faulty Load]
{'src': {'type': 'addresses_NC', 'AVXalign': False, 'size': 4, 'NT': False, 'same': True, 'congruent': 0}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'type': 'addresses_UC_ht', 'congruent': 2, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_WT_ht', 'congruent': 7, 'same': False}}
{'00': 21829}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
| 60.323529 | 2,999 | 0.664066 |
03041b5a899b93d30894f5c7b51c9e0e526649b7 | 6,685 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0x48.log_21829_2035.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0x48.log_21829_2035.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0x48.log_21829_2035.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r14
push %rax
push %rbp
push %rcx
push %rdi
push %rsi
lea addresses_D_ht+0xe6f8, %rsi
lea addresses_D_ht+0x140f8, %rdi
nop
nop
nop
nop
nop
xor $20134, %r14
mov $61, %rcx
rep movsq
nop
nop
nop
nop
add $43178, %rdi
lea addresses_UC_ht+0x19450, %rsi
lea addresses_UC_ht+0x10ef8, %rdi
nop
nop
nop
nop
cmp %r10, %r10
mov $19, %rcx
rep movsl
nop
nop
add %rsi, %rsi
lea addresses_D_ht+0x1646, %rsi
lea addresses_normal_ht+0x34f8, %rdi
add %rax, %rax
mov $77, %rcx
rep movsw
nop
nop
nop
cmp $9503, %rax
lea addresses_WT_ht+0x6890, %rcx
nop
nop
nop
and %rbp, %rbp
mov (%rcx), %r14
nop
nop
inc %r14
lea addresses_WC_ht+0xc588, %rax
nop
nop
nop
nop
nop
and %rdi, %rdi
mov (%rax), %ecx
nop
nop
nop
xor %rbp, %rbp
lea addresses_normal_ht+0xb5f8, %rax
nop
dec %rdi
movb $0x61, (%rax)
nop
nop
nop
nop
nop
add $50511, %r14
lea addresses_D_ht+0x14420, %rbp
nop
cmp $10133, %r14
mov (%rbp), %rcx
nop
nop
nop
nop
nop
add $49699, %r10
lea addresses_WC_ht+0x84f8, %rbp
nop
nop
nop
nop
nop
add $39198, %r10
movups (%rbp), %xmm0
vpextrq $1, %xmm0, %rax
nop
nop
nop
cmp $31823, %rsi
lea addresses_WC_ht+0x58f8, %r14
nop
nop
nop
nop
add %rsi, %rsi
mov $0x6162636465666768, %rdi
movq %rdi, %xmm7
movups %xmm7, (%r14)
nop
nop
nop
sub $53886, %r14
lea addresses_WC_ht+0x32e4, %rax
nop
nop
nop
nop
nop
cmp $4652, %r10
mov (%rax), %bp
nop
nop
inc %rbp
pop %rsi
pop %rdi
pop %rcx
pop %rbp
pop %rax
pop %r14
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r12
push %r15
push %rbx
push %rcx
push %rdx
// Store
lea addresses_A+0x160a1, %rbx
cmp $5068, %r11
movw $0x5152, (%rbx)
nop
cmp $47450, %rdx
// Faulty Load
lea addresses_PSE+0x100f8, %r12
nop
nop
nop
nop
nop
cmp $25789, %rbx
movups (%r12), %xmm3
vpextrq $0, %xmm3, %rcx
lea oracles, %r15
and $0xff, %rcx
shlq $12, %rcx
mov (%r15,%rcx,1), %rcx
pop %rdx
pop %rcx
pop %rbx
pop %r15
pop %r12
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'type': 'addresses_PSE', 'AVXalign': False, 'congruent': 0, 'size': 16, 'same': False, 'NT': True}}
{'OP': 'STOR', 'dst': {'type': 'addresses_A', 'AVXalign': False, 'congruent': 0, 'size': 2, 'same': False, 'NT': False}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'type': 'addresses_PSE', 'AVXalign': False, 'congruent': 0, 'size': 16, 'same': True, 'NT': False}}
<gen_prepare_buffer>
{'OP': 'REPM', 'src': {'type': 'addresses_D_ht', 'congruent': 9, 'same': False}, 'dst': {'type': 'addresses_D_ht', 'congruent': 10, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_UC_ht', 'congruent': 3, 'same': True}, 'dst': {'type': 'addresses_UC_ht', 'congruent': 9, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_D_ht', 'congruent': 0, 'same': False}, 'dst': {'type': 'addresses_normal_ht', 'congruent': 10, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_WT_ht', 'AVXalign': False, 'congruent': 3, 'size': 8, 'same': False, 'NT': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_WC_ht', 'AVXalign': False, 'congruent': 2, 'size': 4, 'same': False, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_normal_ht', 'AVXalign': False, 'congruent': 8, 'size': 1, 'same': False, 'NT': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_D_ht', 'AVXalign': False, 'congruent': 3, 'size': 8, 'same': True, 'NT': True}}
{'OP': 'LOAD', 'src': {'type': 'addresses_WC_ht', 'AVXalign': False, 'congruent': 9, 'size': 16, 'same': False, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WC_ht', 'AVXalign': False, 'congruent': 7, 'size': 16, 'same': False, 'NT': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_WC_ht', 'AVXalign': False, 'congruent': 2, 'size': 2, 'same': False, 'NT': False}}
{'33': 21829}
33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33
*/
| 34.817708 | 2,999 | 0.657442 |
4b77138d700525922ce89ba3c3b9f0235a9c85df | 69,857 | asm | Assembly | src/x86/looprestoration_sse.asm | EwoutH/rav1e | 39f35d0c94a0523bc6c26042bb54f7dca28efb37 | [
"BSD-2-Clause"
] | 2,877 | 2018-02-16T01:02:07.000Z | 2022-03-30T22:24:56.000Z | src/x86/looprestoration_sse.asm | EwoutH/rav1e | 39f35d0c94a0523bc6c26042bb54f7dca28efb37 | [
"BSD-2-Clause"
] | 2,353 | 2018-02-12T22:13:01.000Z | 2022-03-27T23:45:48.000Z | src/x86/looprestoration_sse.asm | EwoutH/rav1e | 39f35d0c94a0523bc6c26042bb54f7dca28efb37 | [
"BSD-2-Clause"
] | 245 | 2018-02-13T16:56:16.000Z | 2022-02-06T21:53:57.000Z | ; Copyright © 2018, VideoLAN and dav1d authors
; Copyright © 2018, Two Orioles, LLC
; Copyright © 2018, VideoLabs
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
;
; 1. Redistributions of source code must retain the above copyright notice, this
; list of conditions and the following disclaimer.
;
; 2. Redistributions in binary form must reproduce the above copyright notice,
; this list of conditions and the following disclaimer in the documentation
; and/or other materials provided with the distribution.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
; ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
; WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
; ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
; (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
; ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
; SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
%include "config.asm"
%include "ext/x86/x86inc.asm"
SECTION_RODATA 16
wiener_init: db 6, 7, 6, 7, 6, 7, 6, 7, 0, 0, 0, 0, 2, 4, 2, 4
wiener_shufA: db 1, 7, 2, 8, 3, 9, 4, 10, 5, 11, 6, 12, 7, 13, 8, 14
wiener_shufB: db 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10
wiener_shufC: db 6, 5, 7, 6, 8, 7, 9, 8, 10, 9, 11, 10, 12, 11, 13, 12
wiener_shufD: db 4, -1, 5, -1, 6, -1, 7, -1, 8, -1, 9, -1, 10, -1, 11, -1
wiener_l_shuf: db 0, 0, 0, 0, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11
pb_unpcklwdw: db 0, 1, 0, 1, 4, 5, 4, 5, 8, 9, 8, 9, 12, 13, 12, 13
pb_right_ext_mask: times 24 db 0xff
times 8 db 0
pb_0: times 16 db 0
pb_3: times 16 db 3
pb_15: times 16 db 15
pb_0_1: times 8 db 0, 1
pb_14_15: times 8 db 14, 15
pw_1: times 8 dw 1
pw_16: times 8 dw 16
pw_128: times 8 dw 128
pw_256: times 8 dw 256
pw_2048: times 8 dw 2048
pw_2056: times 8 dw 2056
pw_m16380: times 8 dw -16380
pw_5_6: times 4 dw 5, 6
pd_1024: times 4 dd 1024
%if ARCH_X86_32
pd_512: times 4 dd 512
pd_2048: times 4 dd 2048
%endif
pd_0xF0080029: times 4 dd 0xF0080029
pd_0xF00801C7: times 4 dd 0XF00801C7
cextern sgr_x_by_x
SECTION .text
%if ARCH_X86_32
%define PIC_base_offset $$
%macro SETUP_PIC 1-3 1,0 ; PIC_reg, save_PIC_reg, restore_PIC_reg
%assign pic_reg_stk_off 4
%xdefine PIC_reg %1
%if %2 == 1
mov [esp], %1
%endif
LEA PIC_reg, PIC_base_offset
%if %3 == 1
XCHG_PIC_REG
%endif
%endmacro
%macro XCHG_PIC_REG 0
mov [esp+pic_reg_stk_off], PIC_reg
%assign pic_reg_stk_off (pic_reg_stk_off+4) % 8
mov PIC_reg, [esp+pic_reg_stk_off]
%endmacro
%define PIC_sym(sym) (PIC_reg+(sym)-PIC_base_offset)
%else
%macro XCHG_PIC_REG 0
%endmacro
%define PIC_sym(sym) (sym)
%endif
%macro WIENER 0
%if ARCH_X86_64
DECLARE_REG_TMP 4, 10, 7, 11, 12, 13, 14 ; ring buffer pointers
cglobal wiener_filter7_8bpc, 5, 15, 16, -384*12-16, dst, dst_stride, left, lpf, \
lpf_stride, w, edge, flt, h, x
%define base 0
mov fltq, fltmp
mov edged, r8m
mov wd, wm
mov hd, r6m
movq m14, [fltq]
add lpfq, wq
lea t1, [rsp+wq*2+16]
mova m15, [pw_2056]
add dstq, wq
movq m7, [fltq+16]
neg wq
%if cpuflag(ssse3)
pshufb m14, [wiener_init]
mova m8, [wiener_shufA]
pshufd m12, m14, q2222 ; x0 x0
mova m9, [wiener_shufB]
pshufd m13, m14, q3333 ; x1 x2
mova m10, [wiener_shufC]
punpcklqdq m14, m14 ; x3
mova m11, [wiener_shufD]
%else
mova m10, [pw_m16380]
punpcklwd m14, m14
pshufd m11, m14, q0000 ; x0
pshufd m12, m14, q1111 ; x1
pshufd m13, m14, q2222 ; x2
pshufd m14, m14, q3333 ; x3
%endif
%else
DECLARE_REG_TMP 4, 0, _, 5
%if cpuflag(ssse3)
%define m10 [base+wiener_shufC]
%define m11 [base+wiener_shufD]
%define stk_off 96
%else
%define m10 [base+pw_m16380]
%define m11 [stk+96]
%define stk_off 112
%endif
cglobal wiener_filter7_8bpc, 0, 7, 8, -384*12-stk_off, _, x, left, lpf, lpf_stride
%define base r6-pb_right_ext_mask-21
%define stk esp
%define dstq leftq
%define edgeb byte edged
%define edged [stk+ 8]
%define dstmp [stk+12]
%define hd dword [stk+16]
%define wq [stk+20]
%define dst_strideq [stk+24]
%define leftmp [stk+28]
%define t2 [stk+32]
%define t4 [stk+36]
%define t5 [stk+40]
%define t6 [stk+44]
%define m8 [base+wiener_shufA]
%define m9 [base+wiener_shufB]
%define m12 [stk+48]
%define m13 [stk+64]
%define m14 [stk+80]
%define m15 [base+pw_2056]
mov r1, r7m ; flt
mov r0, r0m ; dst
mov r5, r5m ; w
mov lpfq, lpfm
mov r2, r8m ; edge
mov r4, r6m ; h
movq m3, [r1+ 0]
movq m7, [r1+16]
add r0, r5
mov r1, r1m ; dst_stride
add lpfq, r5
mov edged, r2
mov r2, r2m ; left
mov dstmp, r0
lea t1, [rsp+r5*2+stk_off]
mov hd, r4
neg r5
mov lpf_strideq, lpf_stridem
LEA r6, pb_right_ext_mask+21
mov wq, r5
mov dst_strideq, r1
mov leftmp, r2
%if cpuflag(ssse3)
pshufb m3, [base+wiener_init]
pshufd m1, m3, q2222
pshufd m2, m3, q3333
punpcklqdq m3, m3
%else
punpcklwd m3, m3
pshufd m0, m3, q0000
pshufd m1, m3, q1111
pshufd m2, m3, q2222
pshufd m3, m3, q3333
mova m11, m0
%endif
mova m12, m1
mova m13, m2
mova m14, m3
%endif
pshufd m6, m7, q0000 ; y0 y1
pshufd m7, m7, q1111 ; y2 y3
test edgeb, 4 ; LR_HAVE_TOP
jz .no_top
call .h_top
add lpfq, lpf_strideq
mov t6, t1
mov t5, t1
add t1, 384*2
call .h_top
lea t3, [lpfq+lpf_strideq*4]
mov lpfq, dstmp
mov [rsp+gprsize*1], lpf_strideq
add t3, lpf_strideq
mov [rsp+gprsize*0], t3 ; below
mov t4, t1
add t1, 384*2
call .h
mov t3, t1
mov t2, t1
dec hd
jz .v1
add lpfq, dst_strideq
add t1, 384*2
call .h
mov t2, t1
dec hd
jz .v2
add lpfq, dst_strideq
add t1, 384*2
call .h
dec hd
jz .v3
.main:
lea t0, [t1+384*2]
.main_loop:
call .hv
dec hd
jnz .main_loop
test edgeb, 8 ; LR_HAVE_BOTTOM
jz .v3
mov lpfq, [rsp+gprsize*0]
call .hv_bottom
add lpfq, [rsp+gprsize*1]
call .hv_bottom
.v1:
call mangle(private_prefix %+ _wiener_filter7_8bpc_ssse3).v
RET
.no_top:
lea t3, [lpfq+lpf_strideq*4]
mov lpfq, dstmp
mov [rsp+gprsize*1], lpf_strideq
lea t3, [t3+lpf_strideq*2]
mov [rsp+gprsize*0], t3
call .h
mov t6, t1
mov t5, t1
mov t4, t1
mov t3, t1
mov t2, t1
dec hd
jz .v1
add lpfq, dst_strideq
add t1, 384*2
call .h
mov t2, t1
dec hd
jz .v2
add lpfq, dst_strideq
add t1, 384*2
call .h
dec hd
jz .v3
lea t0, [t1+384*2]
call .hv
dec hd
jz .v3
add t0, 384*8
call .hv
dec hd
jnz .main
.v3:
call mangle(private_prefix %+ _wiener_filter7_8bpc_ssse3).v
.v2:
call mangle(private_prefix %+ _wiener_filter7_8bpc_ssse3).v
jmp .v1
.extend_right:
movd m2, [lpfq-4]
%if ARCH_X86_64
push r0
lea r0, [pb_right_ext_mask+21]
movu m0, [r0+xq+0]
movu m1, [r0+xq+8]
pop r0
%else
movu m0, [r6+xq+0]
movu m1, [r6+xq+8]
%endif
%if cpuflag(ssse3)
pshufb m2, [base+pb_3]
%else
punpcklbw m2, m2
pshuflw m2, m2, q3333
punpcklqdq m2, m2
%endif
pand m4, m0
pand m5, m1
pandn m0, m2
pandn m1, m2
por m4, m0
por m5, m1
ret
.h:
%define stk esp+4 ; offset due to call
mov xq, wq
test edgeb, 1 ; LR_HAVE_LEFT
jz .h_extend_left
movifnidn leftq, leftmp
mova m4, [lpfq+xq]
movd m5, [leftq]
add leftq, 4
pslldq m4, 4
por m4, m5
movifnidn leftmp, leftq
jmp .h_main
.h_extend_left:
%if cpuflag(ssse3)
mova m4, [lpfq+xq]
pshufb m4, [base+wiener_l_shuf]
%else
mova m5, [lpfq+xq]
pshufd m4, m5, q2103
punpcklbw m5, m5
punpcklwd m5, m5
movss m4, m5
%endif
jmp .h_main
.h_top:
mov xq, wq
test edgeb, 1 ; LR_HAVE_LEFT
jz .h_extend_left
.h_loop:
movu m4, [lpfq+xq-4]
.h_main:
movu m5, [lpfq+xq+4]
test edgeb, 2 ; LR_HAVE_RIGHT
jnz .h_have_right
cmp xd, -18
jl .h_have_right
call .extend_right
.h_have_right:
%macro %%h7 0
%if cpuflag(ssse3)
pshufb m0, m4, m8
pmaddubsw m0, m12
pshufb m1, m5, m8
pmaddubsw m1, m12
pshufb m2, m4, m9
pmaddubsw m2, m13
pshufb m3, m5, m9
pmaddubsw m3, m13
paddw m0, m2
pshufb m2, m4, m10
pmaddubsw m2, m13
paddw m1, m3
pshufb m3, m5, m10
pmaddubsw m3, m13
pshufb m4, m11
paddw m0, m2
pmullw m2, m14, m4
pshufb m5, m11
paddw m1, m3
pmullw m3, m14, m5
psllw m4, 7
psllw m5, 7
paddw m0, m2
mova m2, [base+pw_m16380]
paddw m1, m3
paddw m4, m2
paddw m5, m2
paddsw m0, m4
paddsw m1, m5
%else
psrldq m0, m4, 1
pslldq m1, m4, 1
pxor m3, m3
punpcklbw m0, m3
punpckhbw m1, m3
paddw m0, m1
pmullw m0, m11
psrldq m1, m4, 2
pslldq m2, m4, 2
punpcklbw m1, m3
punpckhbw m2, m3
paddw m1, m2
pmullw m1, m12
paddw m0, m1
pshufd m2, m4, q0321
punpcklbw m2, m3
pmullw m1, m14, m2
paddw m0, m1
psrldq m1, m4, 3
pslldq m4, 3
punpcklbw m1, m3
punpckhbw m4, m3
paddw m1, m4
pmullw m1, m13
paddw m0, m1
psllw m2, 7
paddw m2, m10
paddsw m0, m2
psrldq m1, m5, 1
pslldq m2, m5, 1
punpcklbw m1, m3
punpckhbw m2, m3
paddw m1, m2
pmullw m1, m11
psrldq m2, m5, 2
pslldq m4, m5, 2
punpcklbw m2, m3
punpckhbw m4, m3
paddw m2, m4
pmullw m2, m12
paddw m1, m2
pshufd m4, m5, q0321
punpcklbw m4, m3
pmullw m2, m14, m4
paddw m1, m2
psrldq m2, m5, 3
pslldq m5, 3
punpcklbw m2, m3
punpckhbw m5, m3
paddw m2, m5
pmullw m2, m13
paddw m1, m2
psllw m4, 7
paddw m4, m10
paddsw m1, m4
%endif
%endmacro
%%h7
psraw m0, 3
psraw m1, 3
paddw m0, m15
paddw m1, m15
mova [t1+xq*2+ 0], m0
mova [t1+xq*2+16], m1
add xq, 16
jl .h_loop
ret
ALIGN function_align
.hv:
add lpfq, dst_strideq
mov xq, wq
test edgeb, 1 ; LR_HAVE_LEFT
jz .hv_extend_left
movifnidn leftq, leftmp
mova m4, [lpfq+xq]
movd m5, [leftq]
add leftq, 4
pslldq m4, 4
por m4, m5
movifnidn leftmp, leftq
jmp .hv_main
.hv_extend_left:
%if cpuflag(ssse3)
mova m4, [lpfq+xq]
pshufb m4, [base+wiener_l_shuf]
%else
mova m5, [lpfq+xq]
pshufd m4, m5, q2103
punpcklbw m5, m5
punpcklwd m5, m5
movss m4, m5
%endif
jmp .hv_main
.hv_bottom:
mov xq, wq
test edgeb, 1 ; LR_HAVE_LEFT
jz .hv_extend_left
.hv_loop:
movu m4, [lpfq+xq-4]
.hv_main:
movu m5, [lpfq+xq+4]
test edgeb, 2 ; LR_HAVE_RIGHT
jnz .hv_have_right
cmp xd, -18
jl .hv_have_right
call .extend_right
.hv_have_right:
%%h7
%if ARCH_X86_64
mova m2, [t4+xq*2]
paddw m2, [t2+xq*2]
%else
mov r2, t4
mova m2, [r2+xq*2]
mov r2, t2
paddw m2, [r2+xq*2]
mov r2, t5
%endif
mova m3, [t3+xq*2]
%if ARCH_X86_64
mova m5, [t5+xq*2]
%else
mova m5, [r2+xq*2]
mov r2, t6
%endif
paddw m5, [t1+xq*2]
psraw m0, 3
psraw m1, 3
paddw m0, m15
paddw m1, m15
%if ARCH_X86_64
paddw m4, m0, [t6+xq*2]
%else
paddw m4, m0, [r2+xq*2]
mov r2, t4
%endif
mova [t0+xq*2], m0
punpcklwd m0, m2, m3
pmaddwd m0, m7
punpckhwd m2, m3
pmaddwd m2, m7
punpcklwd m3, m4, m5
pmaddwd m3, m6
punpckhwd m4, m5
pmaddwd m4, m6
paddd m0, m3
mova m3, [t3+xq*2+16]
paddd m4, m2
%if ARCH_X86_64
mova m2, [t4+xq*2+16]
paddw m2, [t2+xq*2+16]
mova m5, [t5+xq*2+16]
%else
mova m2, [r2+xq*2+16]
mov r2, t2
paddw m2, [r2+xq*2+16]
mov r2, t5
mova m5, [r2+xq*2+16]
mov r2, t6
%endif
paddw m5, [t1+xq*2+16]
psrad m0, 11
psrad m4, 11
packssdw m0, m4
%if ARCH_X86_64
paddw m4, m1, [t6+xq*2+16]
%else
paddw m4, m1, [r2+xq*2+16]
mov dstq, dstmp
%endif
mova [t0+xq*2+16], m1
punpcklwd m1, m2, m3
pmaddwd m1, m7
punpckhwd m2, m3
pmaddwd m2, m7
punpcklwd m3, m4, m5
pmaddwd m3, m6
punpckhwd m4, m5
pmaddwd m4, m6
paddd m1, m3
paddd m2, m4
psrad m1, 11
psrad m2, 11
packssdw m1, m2
packuswb m0, m1
mova [dstq+xq], m0
add xq, 16
jl .hv_loop
add dstq, dst_strideq
%if ARCH_X86_64
mov t6, t5
mov t5, t4
mov t4, t3
mov t3, t2
mov t2, t1
mov t1, t0
mov t0, t6
%else
mov dstmp, dstq
mov r1, t5
mov r2, t4
mov t6, r1
mov t5, r2
mov t4, t3
mov t3, t2
mov t2, t1
mov t1, t0
mov t0, r1
%endif
ret
%if cpuflag(ssse3) ; identical in sse2 and ssse3, so share code
.v:
mov xq, wq
.v_loop:
%if ARCH_X86_64
mova m1, [t4+xq*2]
paddw m1, [t2+xq*2]
%else
mov r2, t4
mova m1, [r2+xq*2]
mov r2, t2
paddw m1, [r2+xq*2]
mov r2, t6
%endif
mova m2, [t3+xq*2]
mova m4, [t1+xq*2]
%if ARCH_X86_64
paddw m3, m4, [t6+xq*2]
paddw m4, [t5+xq*2]
%else
paddw m3, m4, [r2+xq*2]
mov r2, t5
paddw m4, [r2+xq*2]
mov r2, t4
%endif
punpcklwd m0, m1, m2
pmaddwd m0, m7
punpckhwd m1, m2
pmaddwd m1, m7
punpcklwd m2, m3, m4
pmaddwd m2, m6
punpckhwd m3, m4
pmaddwd m3, m6
paddd m0, m2
paddd m1, m3
%if ARCH_X86_64
mova m2, [t4+xq*2+16]
paddw m2, [t2+xq*2+16]
%else
mova m2, [r2+xq*2+16]
mov r2, t2
paddw m2, [r2+xq*2+16]
mov r2, t6
%endif
mova m3, [t3+xq*2+16]
mova m5, [t1+xq*2+16]
%if ARCH_X86_64
paddw m4, m5, [t6+xq*2+16]
paddw m5, [t5+xq*2+16]
%else
paddw m4, m5, [r2+xq*2+16]
mov r2, t5
paddw m5, [r2+xq*2+16]
movifnidn dstq, dstmp
%endif
psrad m0, 11
psrad m1, 11
packssdw m0, m1
punpcklwd m1, m2, m3
pmaddwd m1, m7
punpckhwd m2, m3
pmaddwd m2, m7
punpcklwd m3, m4, m5
pmaddwd m3, m6
punpckhwd m4, m5
pmaddwd m4, m6
paddd m1, m3
paddd m2, m4
psrad m1, 11
psrad m2, 11
packssdw m1, m2
packuswb m0, m1
mova [dstq+xq], m0
add xq, 16
jl .v_loop
add dstq, dst_strideq
%if ARCH_X86_64
mov t6, t5
mov t5, t4
%else
mov dstmp, dstq
mov r1, t5
mov r2, t4
mov t6, r1
mov t5, r2
%endif
mov t4, t3
mov t3, t2
mov t2, t1
ret
%endif
%if ARCH_X86_64
cglobal wiener_filter5_8bpc, 5, 13, 16, 384*8+16, dst, dst_stride, left, lpf, \
lpf_stride, w, edge, flt, h, x
mov fltq, fltmp
mov edged, r8m
mov wd, wm
mov hd, r6m
movq m14, [fltq]
add lpfq, wq
mova m8, [pw_m16380]
lea t1, [rsp+wq*2+16]
mova m15, [pw_2056]
add dstq, wq
movq m7, [fltq+16]
neg wq
%if cpuflag(ssse3)
pshufb m14, [wiener_init]
mova m9, [wiener_shufB]
pshufd m13, m14, q3333 ; x1 x2
mova m10, [wiener_shufC]
punpcklqdq m14, m14 ; x3
mova m11, [wiener_shufD]
mova m12, [wiener_l_shuf]
%else
punpcklwd m14, m14
pshufd m11, m14, q1111 ; x1
pshufd m13, m14, q2222 ; x2
pshufd m14, m14, q3333 ; x3
%endif
%else
%if cpuflag(ssse3)
%define stk_off 80
%else
%define m11 [stk+80]
%define stk_off 96
%endif
cglobal wiener_filter5_8bpc, 0, 7, 8, -384*8-stk_off, _, x, left, lpf, lpf_stride
%define stk esp
%define leftmp [stk+28]
%define m8 [base+pw_m16380]
%define m12 [base+wiener_l_shuf]
%define m14 [stk+48]
mov r1, r7m ; flt
mov r0, r0m ; dst
mov r5, r5m ; w
mov lpfq, lpfm
mov r2, r8m ; edge
mov r4, r6m ; h
movq m2, [r1+ 0]
movq m7, [r1+16]
add r0, r5
mov r1, r1m ; dst_stride
add lpfq, r5
mov edged, r2
mov r2, r2m ; left
mov dstmp, r0
lea t1, [rsp+r5*2+stk_off]
mov hd, r4
neg r5
mov lpf_strideq, lpf_stridem
LEA r6, pb_right_ext_mask+21
mov wq, r5
mov dst_strideq, r1
mov leftmp, r2
%if cpuflag(ssse3)
pshufb m2, [base+wiener_init]
pshufd m1, m2, q3333
punpcklqdq m2, m2
%else
punpcklwd m2, m2
pshufd m0, m2, q1111
pshufd m1, m2, q2222
pshufd m2, m2, q3333
mova m11, m0
%endif
mova m13, m1
mova m14, m2
%endif
pshufd m6, m7, q0000 ; __ y1
pshufd m7, m7, q1111 ; y2 y3
test edgeb, 4 ; LR_HAVE_TOP
jz .no_top
call .h_top
add lpfq, lpf_strideq
mov t4, t1
add t1, 384*2
call .h_top
lea xq, [lpfq+lpf_strideq*4]
mov lpfq, dstmp
mov t3, t1
add t1, 384*2
mov [rsp+gprsize*1], lpf_strideq
add xq, lpf_strideq
mov [rsp+gprsize*0], xq ; below
call .h
mov t2, t1
dec hd
jz .v1
add lpfq, dst_strideq
add t1, 384*2
call .h
dec hd
jz .v2
.main:
mov t0, t4
.main_loop:
call .hv
dec hd
jnz .main_loop
test edgeb, 8 ; LR_HAVE_BOTTOM
jz .v2
mov lpfq, [rsp+gprsize*0]
call .hv_bottom
add lpfq, [rsp+gprsize*1]
call .hv_bottom
.end:
RET
.no_top:
lea t3, [lpfq+lpf_strideq*4]
mov lpfq, dstmp
mov [rsp+gprsize*1], lpf_strideq
lea t3, [t3+lpf_strideq*2]
mov [rsp+gprsize*0], t3
call .h
mov t4, t1
mov t3, t1
mov t2, t1
dec hd
jz .v1
add lpfq, dst_strideq
add t1, 384*2
call .h
dec hd
jz .v2
lea t0, [t1+384*2]
call .hv
dec hd
jz .v2
add t0, 384*6
call .hv
dec hd
jnz .main
.v2:
call mangle(private_prefix %+ _wiener_filter5_8bpc_ssse3).v
add dstq, dst_strideq
mov t4, t3
mov t3, t2
mov t2, t1
movifnidn dstmp, dstq
.v1:
call mangle(private_prefix %+ _wiener_filter5_8bpc_ssse3).v
jmp .end
.h:
%define stk esp+4
mov xq, wq
test edgeb, 1 ; LR_HAVE_LEFT
jz .h_extend_left
movifnidn leftq, leftmp
mova m4, [lpfq+xq]
movd m5, [leftq]
add leftq, 4
pslldq m4, 4
por m4, m5
movifnidn leftmp, leftq
jmp .h_main
.h_extend_left:
%if cpuflag(ssse3)
mova m4, [lpfq+xq]
pshufb m4, m12
%else
mova m5, [lpfq+xq]
pshufd m4, m5, q2103
punpcklbw m5, m5
punpcklwd m5, m5
movss m4, m5
%endif
jmp .h_main
.h_top:
mov xq, wq
test edgeb, 1 ; LR_HAVE_LEFT
jz .h_extend_left
.h_loop:
movu m4, [lpfq+xq-4]
.h_main:
movu m5, [lpfq+xq+4]
test edgeb, 2 ; LR_HAVE_RIGHT
jnz .h_have_right
cmp xd, -17
jl .h_have_right
call mangle(private_prefix %+ _wiener_filter7_8bpc %+ SUFFIX).extend_right
.h_have_right:
%macro %%h5 0
%if cpuflag(ssse3)
pshufb m0, m4, m9
pmaddubsw m0, m13
pshufb m1, m5, m9
pmaddubsw m1, m13
pshufb m2, m4, m10
pmaddubsw m2, m13
pshufb m3, m5, m10
pmaddubsw m3, m13
pshufb m4, m11
paddw m0, m2
pmullw m2, m14, m4
pshufb m5, m11
paddw m1, m3
pmullw m3, m14, m5
psllw m4, 7
psllw m5, 7
paddw m4, m8
paddw m5, m8
paddw m0, m2
paddw m1, m3
paddsw m0, m4
paddsw m1, m5
%else
psrldq m0, m4, 2
pslldq m1, m4, 2
pxor m3, m3
punpcklbw m0, m3
punpckhbw m1, m3
paddw m0, m1
pmullw m0, m11
pshufd m2, m4, q0321
punpcklbw m2, m3
pmullw m1, m14, m2
paddw m0, m1
psrldq m1, m4, 3
pslldq m4, 3
punpcklbw m1, m3
punpckhbw m4, m3
paddw m1, m4
pmullw m1, m13
paddw m0, m1
psllw m2, 7
paddw m2, m8
paddsw m0, m2
psrldq m1, m5, 2
pslldq m4, m5, 2
punpcklbw m1, m3
punpckhbw m4, m3
paddw m1, m4
pmullw m1, m11
pshufd m4, m5, q0321
punpcklbw m4, m3
pmullw m2, m14, m4
paddw m1, m2
psrldq m2, m5, 3
pslldq m5, 3
punpcklbw m2, m3
punpckhbw m5, m3
paddw m2, m5
pmullw m2, m13
paddw m1, m2
psllw m4, 7
paddw m4, m8
paddsw m1, m4
%endif
%endmacro
%%h5
psraw m0, 3
psraw m1, 3
paddw m0, m15
paddw m1, m15
mova [t1+xq*2+ 0], m0
mova [t1+xq*2+16], m1
add xq, 16
jl .h_loop
ret
ALIGN function_align
.hv:
add lpfq, dst_strideq
mov xq, wq
test edgeb, 1 ; LR_HAVE_LEFT
jz .hv_extend_left
movifnidn leftq, leftmp
mova m4, [lpfq+xq]
movd m5, [leftq]
add leftq, 4
pslldq m4, 4
por m4, m5
movifnidn leftmp, leftq
jmp .hv_main
.hv_extend_left:
%if cpuflag(ssse3)
mova m4, [lpfq+xq]
pshufb m4, m12
%else
mova m5, [lpfq+xq]
pshufd m4, m5, q2103
punpcklbw m5, m5
punpcklwd m5, m5
movss m4, m5
%endif
jmp .hv_main
.hv_bottom:
mov xq, wq
test edgeb, 1 ; LR_HAVE_LEFT
jz .hv_extend_left
.hv_loop:
movu m4, [lpfq+xq-4]
.hv_main:
movu m5, [lpfq+xq+4]
test edgeb, 2 ; LR_HAVE_RIGHT
jnz .hv_have_right
cmp xd, -17
jl .hv_have_right
call mangle(private_prefix %+ _wiener_filter7_8bpc %+ SUFFIX).extend_right
.hv_have_right:
%%h5
mova m2, [t3+xq*2]
paddw m2, [t1+xq*2]
psraw m0, 3
psraw m1, 3
paddw m0, m15
paddw m1, m15
%if ARCH_X86_64
mova m3, [t2+xq*2]
paddw m4, m0, [t4+xq*2]
%else
mov r2, t2
mova m3, [r2+xq*2]
mov r2, t4
paddw m4, m0, [r2+xq*2]
%endif
mova [t0+xq*2], m0
punpcklwd m0, m2, m3
pmaddwd m0, m7
punpckhwd m2, m3
pmaddwd m2, m7
punpcklwd m3, m4, m4
pmaddwd m3, m6
punpckhwd m4, m4
pmaddwd m4, m6
paddd m0, m3
paddd m4, m2
mova m2, [t3+xq*2+16]
paddw m2, [t1+xq*2+16]
psrad m0, 11
psrad m4, 11
packssdw m0, m4
%if ARCH_X86_64
mova m3, [t2+xq*2+16]
paddw m4, m1, [t4+xq*2+16]
%else
paddw m4, m1, [r2+xq*2+16]
mov r2, t2
mova m3, [r2+xq*2+16]
mov dstq, dstmp
%endif
mova [t0+xq*2+16], m1
punpcklwd m1, m2, m3
pmaddwd m1, m7
punpckhwd m2, m3
pmaddwd m2, m7
punpcklwd m3, m4, m4
pmaddwd m3, m6
punpckhwd m4, m4
pmaddwd m4, m6
paddd m1, m3
paddd m2, m4
psrad m1, 11
psrad m2, 11
packssdw m1, m2
packuswb m0, m1
mova [dstq+xq], m0
add xq, 16
jl .hv_loop
add dstq, dst_strideq
mov t4, t3
mov t3, t2
mov t2, t1
mov t1, t0
mov t0, t4
movifnidn dstmp, dstq
ret
%if cpuflag(ssse3)
.v:
mov xq, wq
.v_loop:
mova m3, [t1+xq*2]
paddw m1, m3, [t3+xq*2]
%if ARCH_X86_64
mova m2, [t2+xq*2]
paddw m3, [t4+xq*2]
%else
mov r2, t2
mova m2, [r2+xq*2]
mov r2, t4
paddw m3, [r2+xq*2]
%endif
punpcklwd m0, m1, m2
pmaddwd m0, m7
punpckhwd m1, m2
pmaddwd m1, m7
punpcklwd m2, m3
pmaddwd m2, m6
punpckhwd m3, m3
pmaddwd m3, m6
paddd m0, m2
paddd m1, m3
mova m4, [t1+xq*2+16]
paddw m2, m4, [t3+xq*2+16]
%if ARCH_X86_64
mova m3, [t2+xq*2+16]
paddw m4, [t4+xq*2+16]
%else
paddw m4, [r2+xq*2+16]
mov r2, t2
mova m3, [r2+xq*2+16]
mov dstq, dstmp
%endif
psrad m0, 11
psrad m1, 11
packssdw m0, m1
punpcklwd m1, m2, m3
pmaddwd m1, m7
punpckhwd m2, m3
pmaddwd m2, m7
punpcklwd m3, m4
pmaddwd m3, m6
punpckhwd m4, m4
pmaddwd m4, m6
paddd m1, m3
paddd m2, m4
psrad m1, 11
psrad m2, 11
packssdw m1, m2
packuswb m0, m1
mova [dstq+xq], m0
add xq, 16
jl .v_loop
ret
%endif
%endmacro
INIT_XMM sse2
WIENER
INIT_XMM ssse3
WIENER
;;;;;;;;;;;;;;;;;;;;;;;;;;
;; self-guided ;;
;;;;;;;;;;;;;;;;;;;;;;;;;;
%macro MULLD 2
pmulhuw m5, %1, %2
pmullw %1, %2
pslld m5, 16
paddd %1, m5
%endmacro
%macro GATHERDD 2
mova m5, m7
movd r6d, %2
%if ARCH_X86_64
movd %1, [r5+r6]
pextrw r6d, %2, 2
pinsrw m5, [r5+r6+2], 3
pextrw r6d, %2, 4
pinsrw %1, [r5+r6+2], 5
pextrw r6d, %2, 6
pinsrw m5, [r5+r6+2], 7
%else
movd %1, [PIC_sym(sgr_x_by_x-0xF03)+r6]
pextrw r6d, %2, 2
pinsrw m5, [PIC_sym(sgr_x_by_x-0xF03)+r6+2], 3
pextrw r6d, %2, 4
pinsrw %1, [PIC_sym(sgr_x_by_x-0xF03)+r6+2], 5
pextrw r6d, %2, 6
pinsrw m5, [PIC_sym(sgr_x_by_x-0xF03)+r6+2], 7
%endif
por %1, m5
%endmacro
%if ARCH_X86_64
cglobal sgr_box3_h_8bpc, 5, 11, 8, sumsq, sum, left, src, stride, x, h, edge, w, xlim
mov xlimd, edgem
movifnidn xd, xm
mov hd, hm
mov edged, xlimd
and xlimd, 2 ; have_right
add xd, xlimd
xor xlimd, 2 ; 2*!have_right
%else
cglobal sgr_box3_h_8bpc, 6, 7, 8, sumsq, sum, left, src, stride, x, h, edge, w, xlim
%define wq r0m
%define xlimd r1m
%define hd hmp
%define edgeb byte edgem
mov r6, edgem
and r6, 2 ; have_right
add xd, r6
xor r6, 2 ; 2*!have_right
mov xlimd, r6
SETUP_PIC r6, 0
%endif
jnz .no_right
add xd, 7
and xd, ~7
.no_right:
pxor m1, m1
lea srcq, [srcq+xq]
lea sumq, [sumq+xq*2-2]
lea sumsqq, [sumsqq+xq*4-4]
neg xq
mov wq, xq
%if ARCH_X86_64
lea r10, [pb_right_ext_mask+24]
%endif
.loop_y:
mov xq, wq
; load left
test edgeb, 1 ; have_left
jz .no_left
test leftq, leftq
jz .load_left_from_main
movd m0, [leftq]
pslldq m0, 12
add leftq, 4
jmp .expand_x
.no_left:
movd m0, [srcq+xq]
pshufb m0, [PIC_sym(pb_0)]
jmp .expand_x
.load_left_from_main:
movd m0, [srcq+xq-2]
pslldq m0, 14
.expand_x:
punpckhbw xm0, xm1
; when we reach this, m0 contains left two px in highest words
cmp xd, -8
jle .loop_x
.partial_load_and_extend:
movd m3, [srcq-4]
pshufb m3, [PIC_sym(pb_3)]
movq m2, [srcq+xq]
punpcklbw m2, m1
punpcklbw m3, m1
%if ARCH_X86_64
movu m4, [r10+xq*2]
%else
movu m4, [PIC_sym(pb_right_ext_mask)+xd*2+24]
%endif
pand m2, m4
pandn m4, m3
por m2, m4
jmp .loop_x_noload
.right_extend:
pshufb m2, m0, [PIC_sym(pb_14_15)]
jmp .loop_x_noload
.loop_x:
movq m2, [srcq+xq]
punpcklbw m2, m1
.loop_x_noload:
palignr m3, m2, m0, 12
palignr m4, m2, m0, 14
punpcklwd m5, m3, m2
punpckhwd m6, m3, m2
paddw m3, m4
punpcklwd m7, m4, m1
punpckhwd m4, m1
pmaddwd m5, m5
pmaddwd m6, m6
pmaddwd m7, m7
pmaddwd m4, m4
paddd m5, m7
paddd m6, m4
paddw m3, m2
movu [sumq+xq*2], m3
movu [sumsqq+xq*4+ 0], m5
movu [sumsqq+xq*4+16], m6
mova m0, m2
add xq, 8
; if x <= -8 we can reload more pixels
; else if x < 0 we reload and extend (this implies have_right=0)
; else if x < xlimd we extend from previous load (this implies have_right=0)
; else we are done
cmp xd, -8
jle .loop_x
test xd, xd
jl .partial_load_and_extend
cmp xd, xlimd
jl .right_extend
add sumsqq, (384+16)*4
add sumq, (384+16)*2
add srcq, strideq
dec hd
jg .loop_y
RET
%if ARCH_X86_64
cglobal sgr_box3_v_8bpc, 4, 10, 9, sumsq, sum, w, h, edge, x, y, sumsq_base, sum_base, ylim
movifnidn edged, edgem
%else
cglobal sgr_box3_v_8bpc, 3, 7, 8, -28, sumsq, sum, w, edge, h, x, y
%define sumsq_baseq dword [esp+0]
%define sum_baseq dword [esp+4]
%define ylimd dword [esp+8]
%define m8 [esp+12]
mov edged, r4m
mov hd, r3m
%endif
mov xq, -2
%if ARCH_X86_64
mov ylimd, edged
and ylimd, 8 ; have_bottom
shr ylimd, 2
sub ylimd, 2 ; -2 if have_bottom=0, else 0
mov sumsq_baseq, sumsqq
mov sum_baseq, sumq
.loop_x:
mov sumsqq, sumsq_baseq
mov sumq, sum_baseq
lea yd, [hq+ylimq+2]
%else
mov yd, edged
and yd, 8 ; have_bottom
shr yd, 2
sub yd, 2 ; -2 if have_bottom=0, else 0
mov sumsq_baseq, sumsqq
mov sum_baseq, sumq
mov ylimd, yd
.loop_x:
mov sumsqd, sumsq_baseq
mov sumd, sum_baseq
lea yd, [hq+2]
add yd, ylimd
%endif
lea sumsqq, [sumsqq+xq*4+4-(384+16)*4]
lea sumq, [sumq+xq*2+2-(384+16)*2]
test edgeb, 4 ; have_top
jnz .load_top
movu m0, [sumsqq+(384+16)*4*1]
movu m1, [sumsqq+(384+16)*4*1+16]
mova m2, m0
mova m3, m1
mova m4, m0
mova m5, m1
movu m6, [sumq+(384+16)*2*1]
mova m7, m6
mova m8, m6
jmp .loop_y_noload
.load_top:
movu m0, [sumsqq-(384+16)*4*1] ; l2sq [left]
movu m1, [sumsqq-(384+16)*4*1+16] ; l2sq [right]
movu m2, [sumsqq-(384+16)*4*0] ; l1sq [left]
movu m3, [sumsqq-(384+16)*4*0+16] ; l1sq [right]
movu m6, [sumq-(384+16)*2*1] ; l2
movu m7, [sumq-(384+16)*2*0] ; l1
.loop_y:
%if ARCH_X86_64
movu m8, [sumq+(384+16)*2*1] ; l0
%else
movu m4, [sumq+(384+16)*2*1] ; l0
mova m8, m4
%endif
movu m4, [sumsqq+(384+16)*4*1] ; l0sq [left]
movu m5, [sumsqq+(384+16)*4*1+16] ; l0sq [right]
.loop_y_noload:
paddd m0, m2
paddd m1, m3
paddw m6, m7
paddd m0, m4
paddd m1, m5
paddw m6, m8
movu [sumsqq+ 0], m0
movu [sumsqq+16], m1
movu [sumq], m6
; shift position down by one
mova m0, m2
mova m1, m3
mova m2, m4
mova m3, m5
mova m6, m7
mova m7, m8
add sumsqq, (384+16)*4
add sumq, (384+16)*2
dec yd
jg .loop_y
cmp yd, ylimd
jg .loop_y_noload
add xd, 8
cmp xd, wd
jl .loop_x
RET
cglobal sgr_calc_ab1_8bpc, 4, 7, 12, a, b, w, h, s
movifnidn sd, sm
sub aq, (384+16-1)*4
sub bq, (384+16-1)*2
add hd, 2
%if ARCH_X86_64
LEA r5, sgr_x_by_x-0xF03
%else
SETUP_PIC r5, 0
%endif
movd m6, sd
pshuflw m6, m6, q0000
punpcklqdq m6, m6
pxor m7, m7
DEFINE_ARGS a, b, w, h, x
%if ARCH_X86_64
mova m8, [pd_0xF00801C7]
mova m9, [pw_256]
psrld m10, m9, 13 ; pd_2048
mova m11, [pb_unpcklwdw]
%else
%define m8 [PIC_sym(pd_0xF00801C7)]
%define m9 [PIC_sym(pw_256)]
%define m10 [PIC_sym(pd_2048)]
%define m11 [PIC_sym(pb_unpcklwdw)]
%endif
.loop_y:
mov xq, -2
.loop_x:
movq m0, [bq+xq*2]
movq m1, [bq+xq*2+(384+16)*2]
punpcklwd m0, m7
punpcklwd m1, m7
movu m2, [aq+xq*4]
movu m3, [aq+xq*4+(384+16)*4]
pslld m4, m2, 3
pslld m5, m3, 3
paddd m2, m4 ; aa * 9
paddd m3, m5
pmaddwd m4, m0, m0
pmaddwd m5, m1, m1
pmaddwd m0, m8
pmaddwd m1, m8
psubd m2, m4 ; p = aa * 9 - bb * bb
psubd m3, m5
MULLD m2, m6
MULLD m3, m6
paddusw m2, m8
paddusw m3, m8
psrld m2, 20 ; z
psrld m3, 20
GATHERDD m4, m2 ; xx
GATHERDD m2, m3
psrld m4, 24
psrld m2, 24
packssdw m3, m4, m2
pshufb m4, m11
MULLD m0, m4
pshufb m2, m11
MULLD m1, m2
psubw m5, m9, m3
paddd m0, m10
paddd m1, m10
psrld m0, 12
psrld m1, 12
movq [bq+xq*2], m5
psrldq m5, 8
movq [bq+xq*2+(384+16)*2], m5
movu [aq+xq*4], m0
movu [aq+xq*4+(384+16)*4], m1
add xd, 4
cmp xd, wd
jl .loop_x
add aq, (384+16)*4*2
add bq, (384+16)*2*2
sub hd, 2
jg .loop_y
RET
%if ARCH_X86_64
cglobal sgr_finish_filter1_8bpc, 5, 13, 16, t, src, stride, a, b, w, h, \
tmp_base, src_base, a_base, b_base, x, y
movifnidn wd, wm
mov hd, hm
mova m15, [pw_16]
mov tmp_baseq, tq
mov src_baseq, srcq
mov a_baseq, aq
mov b_baseq, bq
xor xd, xd
%else
cglobal sgr_finish_filter1_8bpc, 7, 7, 8, -144, t, src, stride, a, b, x, y
%define tmp_baseq [esp+8]
%define src_baseq [esp+12]
%define a_baseq [esp+16]
%define b_baseq [esp+20]
%define wd [esp+24]
%define hd [esp+28]
mov tmp_baseq, tq
mov src_baseq, srcq
mov a_baseq, aq
mov b_baseq, bq
mov wd, xd
mov hd, yd
xor xd, xd
SETUP_PIC yd, 1, 1
jmp .loop_start
%endif
.loop_x:
mov tq, tmp_baseq
mov srcq, src_baseq
mov aq, a_baseq
mov bq, b_baseq
%if ARCH_X86_32
.loop_start:
movu m0, [bq+xq*2-(384+16)*2-2]
movu m2, [bq+xq*2-(384+16)*2+2]
mova m1, [bq+xq*2-(384+16)*2] ; b:top
paddw m0, m2 ; b:tl+tr
movu m2, [bq+xq*2-2]
movu m3, [bq+xq*2+2]
paddw m1, [bq+xq*2] ; b:top+ctr
paddw m2, m3 ; b:l+r
mova [esp+0x80], m0
mova [esp+0x70], m1
mova [esp+0x60], m2
%endif
movu m0, [aq+xq*4-(384+16)*4-4]
movu m2, [aq+xq*4-(384+16)*4+4]
mova m1, [aq+xq*4-(384+16)*4] ; a:top [first half]
paddd m0, m2 ; a:tl+tr [first half]
movu m2, [aq+xq*4-(384+16)*4-4+16]
movu m4, [aq+xq*4-(384+16)*4+4+16]
mova m3, [aq+xq*4-(384+16)*4+16] ; a:top [second half]
paddd m2, m4 ; a:tl+tr [second half]
movu m4, [aq+xq*4-4]
movu m5, [aq+xq*4+4]
paddd m1, [aq+xq*4] ; a:top+ctr [first half]
paddd m4, m5 ; a:l+r [first half]
movu m5, [aq+xq*4+16-4]
movu m6, [aq+xq*4+16+4]
paddd m3, [aq+xq*4+16] ; a:top+ctr [second half]
paddd m5, m6 ; a:l+r [second half]
%if ARCH_X86_64
movu m6, [bq+xq*2-(384+16)*2-2]
movu m8, [bq+xq*2-(384+16)*2+2]
mova m7, [bq+xq*2-(384+16)*2] ; b:top
paddw m6, m8 ; b:tl+tr
movu m8, [bq+xq*2-2]
movu m9, [bq+xq*2+2]
paddw m7, [bq+xq*2] ; b:top+ctr
paddw m8, m9 ; b:l+r
%endif
lea tq, [tq+xq*2]
lea srcq, [srcq+xq*1]
lea aq, [aq+xq*4+(384+16)*4]
lea bq, [bq+xq*2+(384+16)*2]
mov yd, hd
.loop_y:
%if ARCH_X86_64
movu m9, [bq-2]
movu m10, [bq+2]
paddw m7, [bq] ; b:top+ctr+bottom
paddw m9, m10 ; b:bl+br
paddw m10, m7, m8 ; b:top+ctr+bottom+l+r
paddw m6, m9 ; b:tl+tr+bl+br
psubw m7, [bq-(384+16)*2*2] ; b:ctr+bottom
paddw m10, m6
psllw m10, 2
psubw m10, m6 ; aa
pxor m14, m14
movq m12, [srcq]
punpcklbw m12, m14
punpcklwd m6, m10, m15
punpckhwd m10, m15
punpcklwd m13, m12, m15
punpckhwd m12, m15
pmaddwd m6, m13 ; aa*src[x]+256 [first half]
pmaddwd m10, m12 ; aa*src[x]+256 [second half]
%else
paddd m1, [aq] ; a:top+ctr+bottom [first half]
paddd m3, [aq+16] ; a:top+ctr+bottom [second half]
mova [esp+0x50], m1
mova [esp+0x40], m3
mova [esp+0x30], m4
movu m6, [aq-4]
movu m7, [aq+4]
paddd m1, m4 ; a:top+ctr+bottom+l+r [first half]
paddd m3, m5 ; a:top+ctr+bottom+l+r [second half]
paddd m6, m7 ; a:bl+br [first half]
movu m7, [aq+16-4]
movu m4, [aq+16+4]
paddd m7, m4 ; a:bl+br [second half]
paddd m0, m6 ; a:tl+tr+bl+br [first half]
paddd m2, m7 ; a:tl+tr+bl+br [second half]
paddd m1, m0
paddd m3, m2
pslld m1, 2
pslld m3, 2
psubd m1, m0 ; bb [first half]
psubd m3, m2 ; bb [second half]
%endif
%if ARCH_X86_64
movu m11, [aq-4]
movu m12, [aq+4]
paddd m1, [aq] ; a:top+ctr+bottom [first half]
paddd m11, m12 ; a:bl+br [first half]
movu m12, [aq+16-4]
movu m13, [aq+16+4]
paddd m3, [aq+16] ; a:top+ctr+bottom [second half]
paddd m12, m13 ; a:bl+br [second half]
paddd m13, m1, m4 ; a:top+ctr+bottom+l+r [first half]
paddd m14, m3, m5 ; a:top+ctr+bottom+l+r [second half]
paddd m0, m11 ; a:tl+tr+bl+br [first half]
paddd m2, m12 ; a:tl+tr+bl+br [second half]
paddd m13, m0
paddd m14, m2
pslld m13, 2
pslld m14, 2
psubd m13, m0 ; bb [first half]
psubd m14, m2 ; bb [second half]
psubd m1, [aq-(384+16)*4*2] ; a:ctr+bottom [first half]
psubd m3, [aq-(384+16)*4*2+16] ; a:ctr+bottom [second half]
%else
mova m4, [esp+0x80]
mova [esp+0x80], m5
mova m5, [esp+0x70]
mova [esp+0x70], m6
mova m6, [esp+0x60]
mova [esp+0x60], m7
mova [esp+0x20], m1
movu m7, [bq-2]
movu m1, [bq+2]
paddw m5, [bq] ; b:top+ctr+bottom
paddw m7, m1
paddw m1, m5, m6 ; b:top+ctr+bottom+l+r
paddw m4, m7 ; b:tl+tr+bl+br
psubw m5, [bq-(384+16)*2*2] ; b:ctr+bottom
paddw m1, m4
psllw m1, 2
psubw m1, m4 ; aa
movq m0, [srcq]
XCHG_PIC_REG
punpcklbw m0, [PIC_sym(pb_0)]
punpcklwd m4, m1, [PIC_sym(pw_16)]
punpckhwd m1, [PIC_sym(pw_16)]
punpcklwd m2, m0, [PIC_sym(pw_16)]
punpckhwd m0, [PIC_sym(pw_16)]
XCHG_PIC_REG
pmaddwd m4, m2 ; aa*src[x]+256 [first half]
pmaddwd m1, m0 ; aa*src[x]+256 [second half]
%endif
%if ARCH_X86_64
paddd m6, m13
paddd m10, m14
psrad m6, 9
psrad m10, 9
packssdw m6, m10
mova [tq], m6
%else
paddd m4, [esp+0x20]
paddd m1, m3
psrad m4, 9
psrad m1, 9
packssdw m4, m1
mova [tq], m4
%endif
; shift to next row
%if ARCH_X86_64
mova m0, m4
mova m2, m5
mova m4, m11
mova m5, m12
mova m6, m8
mova m8, m9
%else
mova m1, [esp+0x50]
mova m3, [esp+0x40]
mova m0, [esp+0x30]
mova m2, [esp+0x80]
mova m4, [esp+0x70]
mova [esp+0x70], m5
mova m5, [esp+0x60]
mova [esp+0x80], m6
mova [esp+0x60], m7
psubd m1, [aq-(384+16)*4*2] ; a:ctr+bottom [first half]
psubd m3, [aq-(384+16)*4*2+16] ; a:ctr+bottom [second half]
%endif
add srcq, strideq
add aq, (384+16)*4
add bq, (384+16)*2
add tq, 384*2
dec yd
jg .loop_y
add xd, 8
cmp xd, wd
jl .loop_x
RET
cglobal sgr_weighted1_8bpc, 4, 7, 8, dst, stride, t, w, h, wt
movifnidn hd, hm
%if ARCH_X86_32
SETUP_PIC r6, 0
%endif
movd m0, wtm
pshufb m0, [PIC_sym(pb_0_1)]
psllw m0, 4
pxor m7, m7
DEFINE_ARGS dst, stride, t, w, h, idx
.loop_y:
xor idxd, idxd
.loop_x:
mova m1, [tq+idxq*2+ 0]
mova m4, [tq+idxq*2+16]
mova m5, [dstq+idxq]
punpcklbw m2, m5, m7
punpckhbw m5, m7
psllw m3, m2, 4
psllw m6, m5, 4
psubw m1, m3
psubw m4, m6
pmulhrsw m1, m0
pmulhrsw m4, m0
paddw m1, m2
paddw m4, m5
packuswb m1, m4
mova [dstq+idxq], m1
add idxd, 16
cmp idxd, wd
jl .loop_x
add dstq, strideq
add tq, 384 * 2
dec hd
jg .loop_y
RET
%if ARCH_X86_64
cglobal sgr_box5_h_8bpc, 5, 11, 12, sumsq, sum, left, src, stride, w, h, edge, x, xlim
mov edged, edgem
movifnidn wd, wm
mov hd, hm
mova m10, [pb_0]
mova m11, [pb_0_1]
%else
cglobal sgr_box5_h_8bpc, 7, 7, 8, sumsq, sum, left, src, xlim, x, h, edge
%define edgeb byte edgem
%define wd xd
%define wq wd
%define wm r5m
%define strideq r4m
SUB esp, 8
SETUP_PIC sumsqd, 1, 1
%define m10 [PIC_sym(pb_0)]
%define m11 [PIC_sym(pb_0_1)]
%endif
test edgeb, 2 ; have_right
jz .no_right
xor xlimd, xlimd
add wd, 2
add wd, 15
and wd, ~15
jmp .right_done
.no_right:
mov xlimd, 3
dec wd
.right_done:
pxor m1, m1
lea srcq, [srcq+wq+1]
lea sumq, [sumq+wq*2-2]
lea sumsqq, [sumsqq+wq*4-4]
neg wq
%if ARCH_X86_64
lea r10, [pb_right_ext_mask+24]
%else
mov wm, xd
%define wq wm
%endif
.loop_y:
mov xq, wq
; load left
test edgeb, 1 ; have_left
jz .no_left
test leftq, leftq
jz .load_left_from_main
movd m0, [leftq]
movd m2, [srcq+xq-1]
pslldq m2, 4
por m0, m2
pslldq m0, 11
add leftq, 4
jmp .expand_x
.no_left:
movd m0, [srcq+xq-1]
XCHG_PIC_REG
pshufb m0, m10
XCHG_PIC_REG
jmp .expand_x
.load_left_from_main:
movd m0, [srcq+xq-4]
pslldq m0, 12
.expand_x:
punpckhbw m0, m1
; when we reach this, m0 contains left two px in highest words
cmp xd, -8
jle .loop_x
test xd, xd
jge .right_extend
.partial_load_and_extend:
XCHG_PIC_REG
movd m3, [srcq-1]
movq m2, [srcq+xq]
pshufb m3, m10
punpcklbw m3, m1
punpcklbw m2, m1
%if ARCH_X86_64
movu m4, [r10+xq*2]
%else
movu m4, [PIC_sym(pb_right_ext_mask)+xd*2+24]
XCHG_PIC_REG
%endif
pand m2, m4
pandn m4, m3
por m2, m4
jmp .loop_x_noload
.right_extend:
psrldq m2, m0, 14
XCHG_PIC_REG
pshufb m2, m11
XCHG_PIC_REG
jmp .loop_x_noload
.loop_x:
movq m2, [srcq+xq]
punpcklbw m2, m1
.loop_x_noload:
palignr m3, m2, m0, 8
palignr m4, m2, m0, 10
palignr m5, m2, m0, 12
palignr m6, m2, m0, 14
%if ARCH_X86_64
paddw m0, m3, m2
punpcklwd m7, m3, m2
punpckhwd m3, m2
paddw m0, m4
punpcklwd m8, m4, m5
punpckhwd m4, m5
paddw m0, m5
punpcklwd m9, m6, m1
punpckhwd m5, m6, m1
paddw m0, m6
pmaddwd m7, m7
pmaddwd m3, m3
pmaddwd m8, m8
pmaddwd m4, m4
pmaddwd m9, m9
pmaddwd m5, m5
paddd m7, m8
paddd m3, m4
paddd m7, m9
paddd m3, m5
movu [sumq+xq*2], m0
movu [sumsqq+xq*4+ 0], m7
movu [sumsqq+xq*4+16], m3
%else
paddw m0, m3, m2
paddw m0, m4
paddw m0, m5
paddw m0, m6
movu [sumq+xq*2], m0
punpcklwd m7, m3, m2
punpckhwd m3, m2
punpcklwd m0, m4, m5
punpckhwd m4, m5
punpckhwd m5, m6, m1
pmaddwd m7, m7
pmaddwd m3, m3
pmaddwd m0, m0
pmaddwd m4, m4
pmaddwd m5, m5
paddd m7, m0
paddd m3, m4
paddd m3, m5
punpcklwd m0, m6, m1
pmaddwd m0, m0
paddd m7, m0
movu [sumsqq+xq*4+ 0], m7
movu [sumsqq+xq*4+16], m3
%endif
mova m0, m2
add xq, 8
; if x <= -8 we can reload more pixels
; else if x < 0 we reload and extend (this implies have_right=0)
; else if x < xlimd we extend from previous load (this implies have_right=0)
; else we are done
cmp xd, -8
jle .loop_x
test xd, xd
jl .partial_load_and_extend
cmp xd, xlimd
jl .right_extend
add srcq, strideq
add sumsqq, (384+16)*4
add sumq, (384+16)*2
dec hd
jg .loop_y
%if ARCH_X86_32
ADD esp, 8
%endif
RET
%if ARCH_X86_64
cglobal sgr_box5_v_8bpc, 4, 10, 15, sumsq, sum, w, h, edge, x, y, sumsq_ptr, sum_ptr, ylim
movifnidn edged, edgem
mov ylimd, edged
%else
cglobal sgr_box5_v_8bpc, 5, 7, 8, -44, sumsq, sum, x, y, ylim, sumsq_ptr, sum_ptr
%define wm [esp+0]
%define hm [esp+4]
%define edgem [esp+8]
mov wm, xd
mov hm, yd
mov edgem, ylimd
%endif
and ylimd, 8 ; have_bottom
shr ylimd, 2
sub ylimd, 3 ; -3 if have_bottom=0, else -1
mov xq, -2
%if ARCH_X86_64
.loop_x:
lea yd, [hd+ylimd+2]
lea sumsq_ptrq, [sumsqq+xq*4+4-(384+16)*4]
lea sum_ptrq, [ sumq+xq*2+2-(384+16)*2]
test edgeb, 4 ; have_top
jnz .load_top
movu m0, [sumsq_ptrq+(384+16)*4*1]
movu m1, [sumsq_ptrq+(384+16)*4*1+16]
mova m2, m0
mova m3, m1
mova m4, m0
mova m5, m1
mova m6, m0
mova m7, m1
movu m10, [sum_ptrq+(384+16)*2*1]
mova m11, m10
mova m12, m10
mova m13, m10
jmp .loop_y_second_load
.load_top:
movu m0, [sumsq_ptrq-(384+16)*4*1] ; l3/4sq [left]
movu m1, [sumsq_ptrq-(384+16)*4*1+16] ; l3/4sq [right]
movu m4, [sumsq_ptrq-(384+16)*4*0] ; l2sq [left]
movu m5, [sumsq_ptrq-(384+16)*4*0+16] ; l2sq [right]
mova m2, m0
mova m3, m1
movu m10, [sum_ptrq-(384+16)*2*1] ; l3/4
movu m12, [sum_ptrq-(384+16)*2*0] ; l2
mova m11, m10
.loop_y:
movu m6, [sumsq_ptrq+(384+16)*4*1] ; l1sq [left]
movu m7, [sumsq_ptrq+(384+16)*4*1+16] ; l1sq [right]
movu m13, [sum_ptrq+(384+16)*2*1] ; l1
.loop_y_second_load:
test yd, yd
jle .emulate_second_load
movu m8, [sumsq_ptrq+(384+16)*4*2] ; l0sq [left]
movu m9, [sumsq_ptrq+(384+16)*4*2+16] ; l0sq [right]
movu m14, [sum_ptrq+(384+16)*2*2] ; l0
.loop_y_noload:
paddd m0, m2
paddd m1, m3
paddw m10, m11
paddd m0, m4
paddd m1, m5
paddw m10, m12
paddd m0, m6
paddd m1, m7
paddw m10, m13
paddd m0, m8
paddd m1, m9
paddw m10, m14
movu [sumsq_ptrq+ 0], m0
movu [sumsq_ptrq+16], m1
movu [sum_ptrq], m10
; shift position down by one
mova m0, m4
mova m1, m5
mova m2, m6
mova m3, m7
mova m4, m8
mova m5, m9
mova m10, m12
mova m11, m13
mova m12, m14
add sumsq_ptrq, (384+16)*4*2
add sum_ptrq, (384+16)*2*2
sub yd, 2
jge .loop_y
; l1 = l0
mova m6, m8
mova m7, m9
mova m13, m14
cmp yd, ylimd
jg .loop_y_noload
add xd, 8
cmp xd, wd
jl .loop_x
RET
.emulate_second_load:
mova m8, m6
mova m9, m7
mova m14, m13
jmp .loop_y_noload
%else
.sumsq_loop_x:
lea yd, [ylimd+2]
add yd, hm
lea sumsq_ptrq, [sumsqq+xq*4+4-(384+16)*4]
test byte edgem, 4 ; have_top
jnz .sumsq_load_top
movu m0, [sumsq_ptrq+(384+16)*4*1]
movu m1, [sumsq_ptrq+(384+16)*4*1+16]
mova m4, m0
mova m5, m1
mova m6, m0
mova m7, m1
mova [esp+0x1c], m0
mova [esp+0x0c], m1
jmp .sumsq_loop_y_second_load
.sumsq_load_top:
movu m0, [sumsq_ptrq-(384+16)*4*1] ; l3/4sq [left]
movu m1, [sumsq_ptrq-(384+16)*4*1+16] ; l3/4sq [right]
movu m4, [sumsq_ptrq-(384+16)*4*0] ; l2sq [left]
movu m5, [sumsq_ptrq-(384+16)*4*0+16] ; l2sq [right]
mova [esp+0x1c], m0
mova [esp+0x0c], m1
.sumsq_loop_y:
movu m6, [sumsq_ptrq+(384+16)*4*1] ; l1sq [left]
movu m7, [sumsq_ptrq+(384+16)*4*1+16] ; l1sq [right]
.sumsq_loop_y_second_load:
test yd, yd
jle .sumsq_emulate_second_load
movu m2, [sumsq_ptrq+(384+16)*4*2] ; l0sq [left]
movu m3, [sumsq_ptrq+(384+16)*4*2+16] ; l0sq [right]
.sumsq_loop_y_noload:
paddd m0, [esp+0x1c]
paddd m1, [esp+0x0c]
paddd m0, m4
paddd m1, m5
paddd m0, m6
paddd m1, m7
paddd m0, m2
paddd m1, m3
movu [sumsq_ptrq+ 0], m0
movu [sumsq_ptrq+16], m1
; shift position down by one
mova m0, m4
mova m1, m5
mova m4, m2
mova m5, m3
mova [esp+0x1c], m6
mova [esp+0x0c], m7
add sumsq_ptrq, (384+16)*4*2
sub yd, 2
jge .sumsq_loop_y
; l1 = l0
mova m6, m2
mova m7, m3
cmp yd, ylimd
jg .sumsq_loop_y_noload
add xd, 8
cmp xd, wm
jl .sumsq_loop_x
mov xd, -2
.sum_loop_x:
lea yd, [ylimd+2]
add yd, hm
lea sum_ptrq, [sumq+xq*2+2-(384+16)*2]
test byte edgem, 4 ; have_top
jnz .sum_load_top
movu m0, [sum_ptrq+(384+16)*2*1]
mova m1, m0
mova m2, m0
mova m3, m0
jmp .sum_loop_y_second_load
.sum_load_top:
movu m0, [sum_ptrq-(384+16)*2*1] ; l3/4
movu m2, [sum_ptrq-(384+16)*2*0] ; l2
mova m1, m0
.sum_loop_y:
movu m3, [sum_ptrq+(384+16)*2*1] ; l1
.sum_loop_y_second_load:
test yd, yd
jle .sum_emulate_second_load
movu m4, [sum_ptrq+(384+16)*2*2] ; l0
.sum_loop_y_noload:
paddw m0, m1
paddw m0, m2
paddw m0, m3
paddw m0, m4
movu [sum_ptrq], m0
; shift position down by one
mova m0, m2
mova m1, m3
mova m2, m4
add sum_ptrq, (384+16)*2*2
sub yd, 2
jge .sum_loop_y
; l1 = l0
mova m3, m4
cmp yd, ylimd
jg .sum_loop_y_noload
add xd, 8
cmp xd, wm
jl .sum_loop_x
RET
.sumsq_emulate_second_load:
mova m2, m6
mova m3, m7
jmp .sumsq_loop_y_noload
.sum_emulate_second_load:
mova m4, m3
jmp .sum_loop_y_noload
%endif
cglobal sgr_calc_ab2_8bpc, 4, 7, 11, a, b, w, h, s
movifnidn sd, sm
sub aq, (384+16-1)*4
sub bq, (384+16-1)*2
add hd, 2
%if ARCH_X86_64
LEA r5, sgr_x_by_x-0xF03
%else
SETUP_PIC r5, 0
%endif
movd m6, sd
pshuflw m6, m6, q0000
punpcklqdq m6, m6
pxor m7, m7
DEFINE_ARGS a, b, w, h, x
%if ARCH_X86_64
mova m8, [pd_0xF0080029]
mova m9, [pw_256]
psrld m10, m9, 15 ; pd_512
%else
%define m8 [PIC_sym(pd_0xF0080029)]
%define m9 [PIC_sym(pw_256)]
%define m10 [PIC_sym(pd_512)]
%endif
.loop_y:
mov xq, -2
.loop_x:
movq m0, [bq+xq*2+0]
movq m1, [bq+xq*2+8]
punpcklwd m0, m7
punpcklwd m1, m7
movu m2, [aq+xq*4+ 0]
movu m3, [aq+xq*4+16]
pslld m4, m2, 3 ; aa * 8
pslld m5, m3, 3
paddd m2, m4 ; aa * 9
paddd m3, m5
paddd m4, m4 ; aa * 16
paddd m5, m5
paddd m2, m4 ; aa * 25
paddd m3, m5
pmaddwd m4, m0, m0
pmaddwd m5, m1, m1
psubd m2, m4 ; p = aa * 25 - bb * bb
psubd m3, m5
MULLD m2, m6
MULLD m3, m6
paddusw m2, m8
paddusw m3, m8
psrld m2, 20 ; z
psrld m3, 20
GATHERDD m4, m2 ; xx
GATHERDD m2, m3
psrld m4, 24
psrld m2, 24
packssdw m3, m4, m2
pmullw m4, m8
pmullw m2, m8
psubw m5, m9, m3
pmaddwd m0, m4
pmaddwd m1, m2
paddd m0, m10
paddd m1, m10
psrld m0, 10
psrld m1, 10
movu [bq+xq*2], m5
movu [aq+xq*4+ 0], m0
movu [aq+xq*4+16], m1
add xd, 8
cmp xd, wd
jl .loop_x
add aq, (384+16)*4*2
add bq, (384+16)*2*2
sub hd, 2
jg .loop_y
RET
%if ARCH_X86_64
cglobal sgr_finish_filter2_8bpc, 5, 13, 14, t, src, stride, a, b, w, h, \
tmp_base, src_base, a_base, b_base, x, y
movifnidn wd, wm
mov hd, hm
mov tmp_baseq, tq
mov src_baseq, srcq
mov a_baseq, aq
mov b_baseq, bq
mova m9, [pw_5_6]
mova m12, [pw_256]
psrlw m10, m12, 8 ; pw_1
psrlw m11, m12, 1 ; pw_128
pxor m13, m13
%else
cglobal sgr_finish_filter2_8bpc, 6, 7, 8, t, src, stride, a, b, x, y
%define tmp_baseq r0m
%define src_baseq r1m
%define a_baseq r3m
%define b_baseq r4m
%define wd r5m
%define hd r6m
SUB esp, 8
SETUP_PIC yd
%define m8 m5
%define m9 [PIC_sym(pw_5_6)]
%define m10 [PIC_sym(pw_1)]
%define m11 [PIC_sym(pw_128)]
%define m12 [PIC_sym(pw_256)]
%define m13 m0
%endif
xor xd, xd
.loop_x:
mov tq, tmp_baseq
mov srcq, src_baseq
mov aq, a_baseq
mov bq, b_baseq
movu m0, [aq+xq*4-(384+16)*4-4]
mova m1, [aq+xq*4-(384+16)*4]
movu m2, [aq+xq*4-(384+16)*4+4]
movu m3, [aq+xq*4-(384+16)*4-4+16]
mova m4, [aq+xq*4-(384+16)*4+16]
movu m5, [aq+xq*4-(384+16)*4+4+16]
paddd m0, m2
paddd m3, m5
paddd m0, m1
paddd m3, m4
pslld m2, m0, 2
pslld m5, m3, 2
paddd m2, m0
paddd m5, m3
paddd m0, m2, m1 ; prev_odd_b [first half]
paddd m1, m5, m4 ; prev_odd_b [second half]
movu m3, [bq+xq*2-(384+16)*2-2]
mova m4, [bq+xq*2-(384+16)*2]
movu m5, [bq+xq*2-(384+16)*2+2]
paddw m3, m5
punpcklwd m5, m3, m4
punpckhwd m3, m4
pmaddwd m5, m9
pmaddwd m3, m9
mova m2, m5
packssdw m2, m3 ; prev_odd_a
lea tq, [tq+xq*2]
lea srcq, [srcq+xq*1]
lea aq, [aq+xq*4+(384+16)*4]
lea bq, [bq+xq*2+(384+16)*2]
%if ARCH_X86_32
mov [esp], PIC_reg
%endif
mov yd, hd
XCHG_PIC_REG
.loop_y:
movu m3, [aq-4]
mova m4, [aq]
movu m5, [aq+4]
paddd m3, m5
paddd m3, m4
pslld m5, m3, 2
paddd m5, m3
paddd m5, m4 ; cur_odd_b [first half]
movu m3, [aq+16-4]
mova m6, [aq+16]
movu m7, [aq+16+4]
paddd m3, m7
paddd m3, m6
pslld m7, m3, 2
paddd m7, m3
paddd m4, m7, m6 ; cur_odd_b [second half]
movu m3, [bq-2]
mova m6, [bq]
movu m7, [bq+2]
paddw m3, m7
punpcklwd m7, m3, m6
punpckhwd m3, m6
pmaddwd m7, m9
pmaddwd m3, m9
packssdw m6, m7, m3 ; cur_odd_a
paddd m0, m5 ; cur_even_b [first half]
paddd m1, m4 ; cur_even_b [second half]
paddw m2, m6 ; cur_even_a
movq m3, [srcq]
%if ARCH_X86_64
punpcklbw m3, m13
%else
mova [td], m5
pxor m7, m7
punpcklbw m3, m7
%endif
punpcklwd m7, m3, m10
punpckhwd m3, m10
punpcklwd m8, m2, m12
punpckhwd m2, m12
pmaddwd m7, m8
pmaddwd m3, m2
paddd m7, m0
paddd m3, m1
psrad m7, 9
psrad m3, 9
%if ARCH_X86_32
pxor m13, m13
%endif
movq m8, [srcq+strideq]
punpcklbw m8, m13
punpcklwd m0, m8, m10
punpckhwd m8, m10
punpcklwd m1, m6, m11
punpckhwd m2, m6, m11
pmaddwd m0, m1
pmaddwd m8, m2
%if ARCH_X86_64
paddd m0, m5
%else
paddd m0, [td]
%endif
paddd m8, m4
psrad m0, 8
psrad m8, 8
packssdw m7, m3
packssdw m0, m8
%if ARCH_X86_32
mova m5, [td]
%endif
mova [tq+384*2*0], m7
mova [tq+384*2*1], m0
mova m0, m5
mova m1, m4
mova m2, m6
add aq, (384+16)*4*2
add bq, (384+16)*2*2
add tq, 384*2*2
lea srcq, [srcq+strideq*2]
%if ARCH_X86_64
sub yd, 2
%else
sub dword [esp+4], 2
%endif
jg .loop_y
add xd, 8
cmp xd, wd
jl .loop_x
%if ARCH_X86_32
ADD esp, 8
%endif
RET
%undef t2
cglobal sgr_weighted2_8bpc, 4, 7, 12, dst, stride, t1, t2, w, h, wt
movifnidn wd, wm
movd m0, wtm
%if ARCH_X86_64
movifnidn hd, hm
mova m10, [pd_1024]
pxor m11, m11
%else
SETUP_PIC hd, 0
%define m10 [PIC_sym(pd_1024)]
%define m11 m7
%endif
pshufd m0, m0, 0
DEFINE_ARGS dst, stride, t1, t2, w, h, idx
%if ARCH_X86_32
%define hd hmp
%endif
.loop_y:
xor idxd, idxd
.loop_x:
mova m1, [t1q+idxq*2+ 0]
mova m2, [t1q+idxq*2+16]
mova m3, [t2q+idxq*2+ 0]
mova m4, [t2q+idxq*2+16]
mova m6, [dstq+idxq]
%if ARCH_X86_32
pxor m11, m11
%endif
punpcklbw m5, m6, m11
punpckhbw m6, m11
psllw m7, m5, 4
psubw m1, m7
psubw m3, m7
psllw m7, m6, 4
psubw m2, m7
psubw m4, m7
punpcklwd m7, m1, m3
punpckhwd m1, m3
punpcklwd m3, m2, m4
punpckhwd m2, m4
pmaddwd m7, m0
pmaddwd m1, m0
pmaddwd m3, m0
pmaddwd m2, m0
paddd m7, m10
paddd m1, m10
paddd m3, m10
paddd m2, m10
psrad m7, 11
psrad m1, 11
psrad m3, 11
psrad m2, 11
packssdw m7, m1
packssdw m3, m2
paddw m7, m5
paddw m3, m6
packuswb m7, m3
mova [dstq+idxq], m7
add idxd, 16
cmp idxd, wd
jl .loop_x
add dstq, strideq
add t1q, 384 * 2
add t2q, 384 * 2
dec hd
jg .loop_y
RET
| 28.524704 | 91 | 0.448173 |
1fd2373562d66f46536eda4e28da647de08e1d6d | 1,315 | asm | Assembly | Transynther/x86/_processed/AVXALIGN/_zr_/i7-7700_9_0xca.log_1_745.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/AVXALIGN/_zr_/i7-7700_9_0xca.log_1_745.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/AVXALIGN/_zr_/i7-7700_9_0xca.log_1_745.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %rax
push %rbx
push %rsi
lea addresses_WC_ht+0x955a, %rbx
nop
nop
sub %r10, %r10
mov (%rbx), %si
nop
nop
sub %rax, %rax
pop %rsi
pop %rbx
pop %rax
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r13
push %r14
push %r15
push %rcx
push %rdi
push %rdx
push %rsi
// REPMOV
lea addresses_UC+0x1ba3a, %rsi
mov $0x4eb7ba0000000712, %rdi
nop
nop
nop
dec %rdx
mov $74, %rcx
rep movsw
xor %rcx, %rcx
// Faulty Load
mov $0x53387c0000000a3a, %rdi
nop
nop
nop
and $18567, %r15
movaps (%rdi), %xmm4
vpextrq $0, %xmm4, %rcx
lea oracles, %r14
and $0xff, %rcx
shlq $12, %rcx
mov (%r14,%rcx,1), %rcx
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %r15
pop %r14
pop %r13
ret
/*
<gen_faulty_load>
[REF]
{'src': {'congruent': 0, 'AVXalign': False, 'same': False, 'size': 32, 'NT': False, 'type': 'addresses_NC'}, 'OP': 'LOAD'}
{'src': {'congruent': 8, 'same': False, 'type': 'addresses_UC'}, 'OP': 'REPM', 'dst': {'congruent': 3, 'same': False, 'type': 'addresses_NC'}}
[Faulty Load]
{'src': {'congruent': 0, 'AVXalign': True, 'same': True, 'size': 16, 'NT': False, 'type': 'addresses_NC'}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'congruent': 5, 'AVXalign': False, 'same': False, 'size': 2, 'NT': False, 'type': 'addresses_WC_ht'}, 'OP': 'LOAD'}
{'00': 1}
00
*/
| 17.533333 | 142 | 0.647148 |
9d57b551b670dfa26067aa5931598524a7bce34e | 643 | asm | Assembly | oeis/004/A004552.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/004/A004552.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/004/A004552.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A004552: Expansion of sqrt(3) in base 7.
; Submitted by Christian Krause
; 1,5,0,6,0,4,4,0,2,1,4,1,0,1,6,6,4,5,6,1,4,0,0,0,1,5,3,1,5,0,6,5,3,4,5,3,2,3,4,6,6,1,5,2,0,1,5,5,4,2,4,5,5,6,3,5,2,3,1,3,6,6,0,0,2,1,6,6,2,5,0,0,3,6,4,3,5,6,1,2,5,1,3,6,6,0,3,3,5,5,4,1,1,6,2,2,3,6,6,3
mov $1,1
mov $2,1
mov $3,$0
add $3,2
mov $4,$0
add $4,2
mul $4,2
mov $7,10
pow $7,$4
lpb $3
mov $4,$2
pow $4,2
mul $4,3
mov $5,$1
pow $5,2
add $4,$5
mov $6,$1
mov $1,$4
mul $6,$2
mul $6,2
mov $2,$6
mov $8,$4
div $8,$7
max $8,1
div $1,$8
div $2,$8
sub $3,1
mov $9,7
lpe
mov $3,$9
pow $3,$0
div $2,$3
div $1,$2
mod $1,$9
mov $0,$1
| 16.075 | 201 | 0.511664 |
2894f131c3bfa7af568ca8efc99b39e0476fc8d5 | 12,540 | asm | Assembly | Appl/Calendar/Main/mainMailbox.asm | steakknife/pcgeos | 95edd7fad36df400aba9bab1d56e154fc126044a | [
"Apache-2.0"
] | 504 | 2018-11-18T03:35:53.000Z | 2022-03-29T01:02:51.000Z | Appl/Calendar/Main/mainMailbox.asm | steakknife/pcgeos | 95edd7fad36df400aba9bab1d56e154fc126044a | [
"Apache-2.0"
] | 96 | 2018-11-19T21:06:50.000Z | 2022-03-06T10:26:48.000Z | Appl/Calendar/Main/mainMailbox.asm | steakknife/pcgeos | 95edd7fad36df400aba9bab1d56e154fc126044a | [
"Apache-2.0"
] | 73 | 2018-11-19T20:46:53.000Z | 2022-03-29T00:59:26.000Z | COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
(c) Copyright Geoworks 1996 -- All Rights Reserved
GEOWORKS CONFIDENTIAL
PROJECT: PC GEOS
MODULE: Calendar\Main
FILE: mainMailbox.asm
AUTHOR: Jason Ho, Aug 8, 1996
ROUTINES:
Name Description
---- -----------
MTD MSG_META_MAILBOX_NOTIFY_MESSAGE_AVAILABLE
Handle message from clavin telling us an
appointment has arrived.
MTD MSG_CALENDAR_HANDLE_AVAILABLE_MESSAGE
Handle the available message from mailbox.
INT CreateEventFromMBAppointmentBlock
Create an event based on MBAppointment
block passed.
MTD MSG_CALENDAR_SHOW_SENT_TO_INFO
Show the Sent-to info of currently selected
event.
MTD MSG_CALENDAR_QUERY_ITEM_MONIKER
The message to use in querying for the list
item monikers.
INT ObjMessage_mailbox_call_fixup
INT ObjMessage_mailbox_call
INT ObjMessage_mailbox_send
REVISION HISTORY:
Name Date Description
---- ---- -----------
kho 8/ 8/96 Initial revision
DESCRIPTION:
Code to deal with mailbox notification (new appointment event
defined outside GeoPlanner.)
$Id: mainMailbox.asm,v 1.1 97/04/04 14:48:13 newdeal Exp $
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
if HANDLE_MAILBOX_MSG
MailboxCode segment resource
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
GeoPlannerMetaMailboxNotifyMessageAvailable
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Handle message from clavin telling us an appointment
has arrived.
CALLED BY: MSG_META_MAILBOX_NOTIFY_MESSAGE_AVAILABLE
PASS: ax = message #
cx:dx = MailboxMessage
RETURN: carry set if handled
DESTROYED: ax, cx, dx, bp
SIDE EFFECTS:
PSEUDO CODE/STRATEGY:
Make sure it is an appointment / text / SMS.
Get all the info from clavin and create a new
appointment.
Because of complications from CharsetDialog, need to queue
another message to handle the relevant message.
REVISION HISTORY:
Name Date Description
---- ---- -----------
kho 8/ 8/96 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
GeoPlannerMetaMailboxNotifyMessageAvailable method dynamic GeoPlannerClass,
MSG_META_MAILBOX_NOTIFY_MESSAGE_AVAILABLE
.enter
;
; Make sure that this is an appointment or short message or
; text chain. If it is not, ignore it.
;
; cxdx == MailboxMessage
;
call MailboxGetBodyFormat ; carry set on error (bad msg)
; bxax <- MailboxDataFormat
; ax <- MailboxError if error
jc error
cmp bx, MANUFACTURER_ID_GEOWORKS
jne error
cmp ax, GMDFID_APPOINTMENT
je goodFormat
cmp ax, GMDFID_SHORT_MESSAGE
je goodFormat
cmp ax, GMDFID_TEXT_CHAIN
jne error
goodFormat:
if 0
;
; Dismiss any blocking dialog, especially charset dialog.
;
; Change my mind.. if we do that, then the second received
; appt would close the first dialog, etc.
;
push ax, cx, dx
clr bx
call GeodeGetAppObject ; ^lbx:si <- app obj
mov ax, MSG_GEN_APPLICATION_REMOVE_ALL_BLOCKING_DIALOGS
mov di, mask MF_CALL
call ObjMessage
pop ax, cx, dx
endif
;
; Force queue the message to the process, so that the second
; received appt won't appear until the first one is dismissed.
;
mov_tr bp, ax ; bp <- data format
mov ax, MSG_CALENDAR_HANDLE_AVAILABLE_MESSAGE
call GeodeGetProcessHandle ; bx <- process handle
mov di, mask MF_FORCE_QUEUE
call ObjMessage
stc ; message handled
quit:
.leave
ret
error:
clc ; not handled
jmp quit
GeoPlannerMetaMailboxNotifyMessageAvailable endm
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
GeoPlannerHandleAvailableMessage
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Handle the available message from mailbox.
CALLED BY: MSG_CALENDAR_HANDLE_AVAILABLE_MESSAGE
PASS: ax = message #
cx:dx = MailboxMessage
bp = GeoworksMailboxDataFormatID
RETURN: nothing
DESTROYED: ax, cx, dx
SIDE EFFECTS:
PSEUDO CODE/STRATEGY:
If the file is not valid, lower app window to bottom
because mailbox just raises us. Then sleep for a while
and force queue the message again.
REVISION HISTORY:
Name Date Description
---- ---- -----------
kho 1/16/97 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
GeoPlannerHandleAvailableMessage method dynamic GeoPlannerClass,
MSG_CALENDAR_HANDLE_AVAILABLE_MESSAGE
dataFormat local word push bp
myAppRef local VMTreeAppRef
.enter
;
; Is the file opened yet? If not, force queue the message.
;
GetResourceSegmentNS dgroup, es ; es <- dgroup
test es:[systemStatus], SF_VALID_FILE
jz tryLater
;
; Bring app window to top, because we might have lowered it to
; bottom before.
;
mov ax, MSG_GEN_BRING_TO_TOP
clr bx
call GeodeGetAppObject ; ^lbx:si <- app obj
call ObjMessage_mailbox_send
;
; Tell the mailbox system that it can remove the entry from the inbox.
; cxdx == MailboxMessage
;
call MailboxAcknowledgeMessageReceipt
;
; Get the VMTreeAppRef filled.
;
segmov es, ss, ax
lea di, myAppRef
mov ax, size myAppRef
;cxdx = MailboxMessage
;es:di = place to store app-reference to body
;ax = # bytes pointed to by es:di
call MailboxStealBody ; carry set on error,
; ax <- MailboxError
; else ax <- bytes used in buf
jc error
;
; Find the VM block handle and file handle.
;
mov di, ss:[myAppRef].VMTAR_vmChain.segment
mov bx, ss:[myAppRef].VMTAR_vmFile
oneEvent:
; ----------------------------------------------------------------
mov ax, di
;
; Depend on data format, call routine to deal with it.
;
cmp ss:[dataFormat], GMDFID_APPOINTMENT
je addMBAppoint
;
; It should be an SMS / text then. Deal with it.
;
call HandleEventSMSMsg ; di <- next block
; handle
jmp doneWithBlock
addMBAppoint:
;
; Create an event from the block.
;
call CreateEventFromMBAppointmentBlock ; di <- next block
; handle
doneWithBlock:
;
; Free the block, now that we are done.
; bx == file handle
; ax == block handle
;
call VMFree ; ds destroyed
;
; Any more struct to handle?
;
tst di
jnz oneEvent
; -----------------------------------------------------------------
;
; Done with all events
; bx == file handle
;
call MailboxDoneWithVMFile
;
; Send MSG_DP_RESET_UI_IF_DETAILS_NOT_UP to DayPlan object to
; update the screen.
;
push bp
mov bx, handle DayPlanObject
mov si, offset DayPlanObject ; ^lbx:si = DayPlanObj
mov ax, MSG_DP_RESET_UI_IF_DETAILS_NOT_UP
mov di, mask MF_CALL
call ObjMessage ; ax, cx, dx, bp gone
pop bp
error:
.leave
ret
tryLater:
;
; Lower app window to bottom.
;
EC < WARNING CALENDAR_BOOKING_RETRY_IN_TEN_SECS >
mov ax, MSG_GEN_LOWER_TO_BOTTOM
clr bx
call GeodeGetAppObject ; ^lbx:si <- app obj
call ObjMessage_mailbox_send
;
; Sleep for a while.
;
mov ax, CALENDAR_IMPEX_WAIT_PERIOD ; 10 seconds
call TimerSleep
;
; Force queue message with the passed bp.
;
mov ax, MSG_CALENDAR_HANDLE_AVAILABLE_MESSAGE
call GeodeGetProcessHandle ; bx = process handle
mov di, mask MF_FORCE_QUEUE
push bp
mov bp, ss:[dataFormat]
call ObjMessage
pop bp
jmp error
GeoPlannerHandleAvailableMessage endm
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
CreateEventFromMBAppointmentBlock
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Create an event based on MBAppointment block passed.
CALLED BY: (INTERNAL) GeoPlannerMetaMailboxNotifyMessageAvailable
PASS: ax = VM block handle containing MBAppointment struct
bx = VM file handle
RETURN: di = VM block handle containing next
MBAppointment struct, 0 if none.
DESTROYED: nothing
SIDE EFFECTS:
PSEUDO CODE/STRATEGY:
REVISION HISTORY:
Name Date Description
---- ---- -----------
kho 8/ 8/96 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
CreateEventFromMBAppointmentBlock proc near
uses ax, bx, cx, dx, si
.enter
Assert vmFileHandle, bx
;
; Send the DayPlanObject a message to create an event.
;
mov cx, ax ; VM block handle
mov dx, bx ; VM file handle
GetResourceHandleNS DayPlanObject, bx
mov si, offset DayPlanObject ; ^lbx:si = DayPlanObj,
; dx <- VM file handle
mov ax, MSG_DP_CREATE_EVENT_FROM_CLAVIN
mov di, mask MF_CALL
call ObjMessage ; cx <- next block
mov di, cx
.leave
ret
CreateEventFromMBAppointmentBlock endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
GeoPlannerShowSentToInfo
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Show the Sent-to info of currently selected event.
CALLED BY: MSG_CALENDAR_SHOW_SENT_TO_INFO
PASS: ax = message #
RETURN: nothing
DESTROYED: ax, cx, dx, bp
SIDE EFFECTS:
PSEUDO CODE/STRATEGY:
Find the currently selected event.
Send the event a message.
REVISION HISTORY:
Name Date Description
---- ---- -----------
kho 1/31/97 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
GeoPlannerShowSentToInfo method dynamic GeoPlannerClass,
MSG_CALENDAR_SHOW_SENT_TO_INFO
.enter
;
; Find the currently selected event.
;
GetResourceHandleNS DPResource, bx
mov si, offset DayPlanObject
mov ax, MSG_DP_GET_SELECT
call ObjMessage_mailbox_call ; bp <- DayEvent chunk
;
; If no event is selected, quit.
;
tst bp
EC < WARNING_Z EVENT_HANDLE_DOESNT_EXIST_SO_OPERATION_IGNORED>
jz quit
mov si, bp ; ^lbx:si <- DayEvent
;
; Send it a message to do list initialization and open the
; dilaog.
;
mov ax, MSG_DE_DISPLAY_SENT_TO_INFO
call ObjMessage_mailbox_send
quit:
.leave
Destroy ax, cx, dx, bp
ret
GeoPlannerShowSentToInfo endm
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
GeoPlannerQueryItemMoniker
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: The message to use in querying for the list item monikers.
CALLED BY: MSG_CALENDAR_QUERY_ITEM_MONIKER
PASS: ax = message #
^lcx:dx = the dynamic list requesting the moniker
bp = the position of the item requested
RETURN:
DESTROYED: ax, cx, dx, bp
SIDE EFFECTS:
PSEUDO CODE/STRATEGY:
>> From GenDynamicListClass documentation:
The message will be sent to the destination for the
list. The handler is expected to reply by sending a
MSG_GEN_DYNAMIC_LIST_REPLACE_ITEM_MONIKER back to the
list.
REVISION HISTORY:
Name Date Description
---- ---- -----------
kho 1/31/97 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
GeoPlannerQueryItemMoniker method dynamic GeoPlannerClass,
MSG_CALENDAR_QUERY_ITEM_MONIKER
.enter
Assert optr, cxdx
;
; Find the currently selected event.
;
push bp
GetResourceHandleNS DPResource, bx
mov si, offset DayPlanObject
mov ax, MSG_DP_GET_SELECT
call ObjMessage_mailbox_call ; bp <- DayEvent chunk
mov si, bp ; ^lbx:si <- DayEvent
pop bp
;
; If no event is selected, die.
;
tst si
EC < WARNING_Z EVENT_HANDLE_DOESNT_EXIST_SO_OPERATION_IGNORED>
jz quit
;
; Send it a message to create the moniker.
;
; ^lcx:dx == list item,
; bp == position of the item request
mov ax, MSG_DE_QUERY_SENT_TO_ITEM_MONIKER
call ObjMessage_mailbox_send
quit::
.leave
ret
GeoPlannerQueryItemMoniker endm
ObjMessage_mailbox_call_fixup proc near
push di
mov di, mask MF_CALL or mask MF_FIXUP_DS
; mask MF_FIXUP_ES
call ObjMessage
pop di
ret
ObjMessage_mailbox_call_fixup endp
ObjMessage_mailbox_call proc near
push di
mov di, mask MF_CALL
call ObjMessage
pop di
ret
ObjMessage_mailbox_call endp
ObjMessage_mailbox_send proc near
push di
clr di
call ObjMessage
pop di
ret
ObjMessage_mailbox_send endp
MailboxCode ends
endif
| 26.125 | 79 | 0.621292 |
8f79aa4795bbe0e8a04d026d5a645cf9acd2ba1b | 1,666 | asm | Assembly | Example/Example_Insane.asm | arnaud-carre/LSPlayer | 7187ee0be4f9da9615245c9b33e4532560ccc58b | [
"MIT"
] | 45 | 2021-03-10T21:45:45.000Z | 2022-03-20T16:52:25.000Z | Example/Example_Insane.asm | arnaud-carre/LSPlayer | 7187ee0be4f9da9615245c9b33e4532560ccc58b | [
"MIT"
] | 5 | 2021-03-11T08:37:50.000Z | 2022-02-15T21:40:03.000Z | Example/Example_Insane.asm | arnaud-carre/LSPlayer | 7187ee0be4f9da9615245c9b33e4532560ccc58b | [
"MIT"
] | 2 | 2021-03-15T13:46:33.000Z | 2021-03-15T14:29:51.000Z | ;
; LightSpeedPlayer usage example
;
code
move.w #$7fff,$dff09e
move.w #(1<<5)|(1<<6)|(1<<7)|(1<<8),$dff096
move.w #(1<<5)|(1<<6)|(1<<13),$dff09a
bsr clearSprites
; Init LSP player
lea LSPMusic,a0
lea LSPBank,a1
lea copperDMAConPatch+3,a2
bsr LSP_MusicDriver
; setup copper list & interrupt
move.l #copperInterrupt,$6c.w
move.l #copperMain,$dff080
move.w #(1<<4),$dff09e
move.w #$c000|(1<<4),$dff09a
move.w #$8000|(1<<7),$dff096 ; Copper DMA
; infinite loop ( LSP player tick is called from copper interrupt)
mainLoop: bra.s mainLoop
; Include dedicated ultra fast LSP player (generated by LSPConvert.exe)
include "rink-a-dink_insane.asm"
copperInterrupt:
movem.l d0/a0/a1/a2/a3,-(a7)
move.w #$f00,$dff180
lea $dff0a0,a6 ; always set a6 to dff0a0 before calling LSP tick
bsr LSP_MusicDriver+4 ; player+4 = music tick
move.w #$0,$dff180
movem.l (a7)+,d0/a0/a1/a2/a3
move.w #1<<4,$dff09c ;clear copper interrupt bit
move.w #1<<4,$dff09c ;clear VBL interrupt bit
nop
rte
clearSprites:
lea $dff140,a0
moveq #8-1,d0 ; 8 sprites to clear
moveq #0,d1
.clspr: move.l d1,(a0)+
move.l d1,(a0)+
dbf d0,.clspr
rts
data_c
copperMain:
dc.l $01fc0000
dc.l $01000200
dc.l (50<<24)|($09fffe) ; wait scanline 50
dc.l $009c8000|(1<<4) ; fire copper interrupt
dc.l ((50+11)<<24)|($09fffe) ; wait scanline 50+11
dc.l $0180000f
copperDMAConPatch:
dc.l $00968000
dc.l $01800000
dc.l -2
LSPBank: incbin "rink-a-dink.lsbank"
even
data
LSPMusic: incbin "rink-a-dink.lsmusic"
even
| 18.931818 | 73 | 0.623049 |
7252dda28c13acbc4d20615e0dc969d4ff6b3998 | 19 | asm | Assembly | src/main/fragment/mos6502-common/vbuyy_ge_vbum1_then_la1.asm | jbrandwood/kickc | d4b68806f84f8650d51b0e3ef254e40f38b0ffad | [
"MIT"
] | 2 | 2022-03-01T02:21:14.000Z | 2022-03-01T04:33:35.000Z | src/main/fragment/mos6502-common/vbuyy_ge_vbum1_then_la1.asm | jbrandwood/kickc | d4b68806f84f8650d51b0e3ef254e40f38b0ffad | [
"MIT"
] | null | null | null | src/main/fragment/mos6502-common/vbuyy_ge_vbum1_then_la1.asm | jbrandwood/kickc | d4b68806f84f8650d51b0e3ef254e40f38b0ffad | [
"MIT"
] | null | null | null | cpy {m1}
bcs {la1}
| 6.333333 | 9 | 0.578947 |
e62c2621b0e32b596b84967c3481cd4417bf1394 | 315 | asm | Assembly | programs/oeis/158/A158907.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/158/A158907.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/158/A158907.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A158907: Row sums of triangle A158906.
; 1,3,4,6,6,9,8,11,11,13,12,17,14,17,18,20,18,23,20,25,24,25,24,31,27,29,30,33,30,37,32,37,36,37,38,44,38,41,42,47,42,49,44,49,50,49,48,57,51,55,54,57,54,61,58,63,60,61,60
mov $1,$0
seq $1,5 ; d(n) (also called tau(n) or sigma_0(n)), the number of divisors of n.
add $0,$1
| 45 | 171 | 0.650794 |
486ea34532d3101951e79820f9e2e7f1695054e1 | 9,530 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_sm_/i9-9900K_12_0xa0_notsx.log_21829_346.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_sm_/i9-9900K_12_0xa0_notsx.log_21829_346.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_sm_/i9-9900K_12_0xa0_notsx.log_21829_346.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r13
push %r15
push %r8
push %rax
push %rcx
push %rdi
push %rsi
lea addresses_D_ht+0x5b16, %rsi
lea addresses_normal_ht+0x2824, %rdi
nop
inc %r13
mov $32, %rcx
rep movsq
nop
nop
nop
nop
nop
xor $58718, %r13
lea addresses_UC_ht+0x6616, %rsi
lea addresses_UC_ht+0x12676, %rdi
clflush (%rdi)
nop
nop
nop
nop
nop
cmp $22639, %r15
mov $94, %rcx
rep movsl
nop
nop
nop
nop
sub $26848, %rsi
lea addresses_WT_ht+0x1a616, %r15
nop
nop
nop
nop
xor %r10, %r10
movb (%r15), %al
nop
nop
nop
nop
nop
and $58541, %rax
lea addresses_normal_ht+0x5116, %r10
clflush (%r10)
nop
inc %rsi
movl $0x61626364, (%r10)
dec %r15
lea addresses_normal_ht+0xdf5e, %rsi
nop
nop
nop
nop
cmp %r13, %r13
mov (%rsi), %rcx
nop
nop
nop
nop
xor %rsi, %rsi
lea addresses_A_ht+0x11ac6, %r13
clflush (%r13)
nop
cmp %rsi, %rsi
mov (%r13), %edi
nop
nop
nop
nop
nop
cmp %rsi, %rsi
lea addresses_normal_ht+0x1d78e, %r15
nop
nop
sub $9719, %rcx
mov $0x6162636465666768, %r10
movq %r10, %xmm2
vmovups %ymm2, (%r15)
and $61854, %rcx
lea addresses_normal_ht+0xbc75, %rdi
nop
xor $59198, %rcx
movl $0x61626364, (%rdi)
nop
nop
sub $61134, %rsi
lea addresses_normal_ht+0x5096, %r13
nop
nop
add %rcx, %rcx
movb $0x61, (%r13)
nop
nop
nop
add $31830, %rax
lea addresses_WC_ht+0x12786, %rsi
lea addresses_WT_ht+0x1a116, %rdi
nop
nop
add $20340, %r8
mov $26, %rcx
rep movsl
nop
nop
nop
nop
nop
cmp $43529, %r15
lea addresses_WC_ht+0x14116, %r8
nop
nop
nop
xor $51304, %r10
mov (%r8), %si
nop
nop
nop
nop
nop
and $50640, %r13
lea addresses_WT_ht+0x19116, %rsi
nop
nop
nop
nop
inc %r15
movl $0x61626364, (%rsi)
nop
nop
nop
sub %rcx, %rcx
lea addresses_D_ht+0x87fe, %rsi
lea addresses_WC_ht+0x6e96, %rdi
nop
nop
nop
nop
dec %rax
mov $22, %rcx
rep movsw
nop
nop
nop
nop
dec %rax
pop %rsi
pop %rdi
pop %rcx
pop %rax
pop %r8
pop %r15
pop %r13
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r13
push %r15
push %r9
push %rax
push %rcx
push %rdi
push %rsi
// REPMOV
lea addresses_UC+0x6916, %rsi
lea addresses_WC+0x1156e, %rdi
dec %r13
mov $102, %rcx
rep movsb
nop
nop
nop
add $64912, %rsi
// Store
lea addresses_normal+0xb916, %r13
nop
nop
cmp %rax, %rax
mov $0x5152535455565758, %rcx
movq %rcx, (%r13)
nop
and %rax, %rax
// Store
lea addresses_WC+0x11b32, %rsi
nop
nop
nop
xor $49653, %rax
movl $0x51525354, (%rsi)
nop
nop
xor %r15, %r15
// Store
lea addresses_A+0xae6, %r13
nop
nop
sub $41086, %rdi
mov $0x5152535455565758, %rsi
movq %rsi, %xmm0
vmovups %ymm0, (%r13)
nop
and %rcx, %rcx
// Load
mov $0x263bea000000001e, %rsi
nop
nop
nop
nop
nop
cmp $27504, %rcx
mov (%rsi), %r13
nop
nop
nop
nop
nop
sub %rcx, %rcx
// Store
lea addresses_US+0x649e, %r15
nop
nop
nop
cmp %rax, %rax
movl $0x51525354, (%r15)
nop
cmp $1091, %r13
// Store
mov $0x250de10000000116, %rax
nop
nop
nop
nop
dec %r15
movl $0x51525354, (%rax)
inc %r13
// Store
lea addresses_WC+0x157fe, %rax
clflush (%rax)
nop
nop
xor $50886, %rcx
movb $0x51, (%rax)
nop
and $36281, %r9
// Load
lea addresses_UC+0x16044, %r9
clflush (%r9)
nop
nop
nop
and $48537, %rcx
movb (%r9), %r13b
nop
and %rax, %rax
// Faulty Load
lea addresses_normal+0xb916, %r13
clflush (%r13)
nop
nop
nop
nop
cmp %rax, %rax
mov (%r13), %si
lea oracles, %rdi
and $0xff, %rsi
shlq $12, %rsi
mov (%rdi,%rsi,1), %rsi
pop %rsi
pop %rdi
pop %rcx
pop %rax
pop %r9
pop %r15
pop %r13
ret
/*
<gen_faulty_load>
[REF]
{'src': {'type': 'addresses_normal', 'AVXalign': False, 'size': 8, 'NT': False, 'same': False, 'congruent': 0}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_UC', 'congruent': 10, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_WC', 'congruent': 3, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_normal', 'AVXalign': False, 'size': 8, 'NT': False, 'same': True, 'congruent': 0}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WC', 'AVXalign': False, 'size': 4, 'NT': False, 'same': False, 'congruent': 1}}
{'OP': 'STOR', 'dst': {'type': 'addresses_A', 'AVXalign': False, 'size': 32, 'NT': False, 'same': False, 'congruent': 1}}
{'src': {'type': 'addresses_NC', 'AVXalign': False, 'size': 8, 'NT': False, 'same': False, 'congruent': 2}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'type': 'addresses_US', 'AVXalign': False, 'size': 4, 'NT': False, 'same': False, 'congruent': 3}}
{'OP': 'STOR', 'dst': {'type': 'addresses_NC', 'AVXalign': False, 'size': 4, 'NT': False, 'same': False, 'congruent': 10}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WC', 'AVXalign': False, 'size': 1, 'NT': False, 'same': False, 'congruent': 2}}
{'src': {'type': 'addresses_UC', 'AVXalign': False, 'size': 1, 'NT': False, 'same': False, 'congruent': 1}, 'OP': 'LOAD'}
[Faulty Load]
{'src': {'type': 'addresses_normal', 'AVXalign': False, 'size': 2, 'NT': False, 'same': True, 'congruent': 0}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'type': 'addresses_D_ht', 'congruent': 9, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_normal_ht', 'congruent': 0, 'same': False}}
{'src': {'type': 'addresses_UC_ht', 'congruent': 7, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_UC_ht', 'congruent': 3, 'same': True}}
{'src': {'type': 'addresses_WT_ht', 'AVXalign': False, 'size': 1, 'NT': False, 'same': False, 'congruent': 8}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'type': 'addresses_normal_ht', 'AVXalign': False, 'size': 4, 'NT': False, 'same': False, 'congruent': 11}}
{'src': {'type': 'addresses_normal_ht', 'AVXalign': False, 'size': 8, 'NT': False, 'same': False, 'congruent': 3}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_A_ht', 'AVXalign': False, 'size': 4, 'NT': False, 'same': False, 'congruent': 4}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'type': 'addresses_normal_ht', 'AVXalign': False, 'size': 32, 'NT': False, 'same': False, 'congruent': 2}}
{'OP': 'STOR', 'dst': {'type': 'addresses_normal_ht', 'AVXalign': False, 'size': 4, 'NT': False, 'same': False, 'congruent': 0}}
{'OP': 'STOR', 'dst': {'type': 'addresses_normal_ht', 'AVXalign': False, 'size': 1, 'NT': False, 'same': False, 'congruent': 6}}
{'src': {'type': 'addresses_WC_ht', 'congruent': 4, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_WT_ht', 'congruent': 11, 'same': False}}
{'src': {'type': 'addresses_WC_ht', 'AVXalign': False, 'size': 2, 'NT': False, 'same': False, 'congruent': 10}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'type': 'addresses_WT_ht', 'AVXalign': True, 'size': 4, 'NT': False, 'same': False, 'congruent': 11}}
{'src': {'type': 'addresses_D_ht', 'congruent': 3, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_WC_ht', 'congruent': 6, 'same': False}}
{'58': 21829}
58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58
*/
| 28.966565 | 2,999 | 0.653515 |
bbfab95c498722caf30d7a5d0ae5c9c02d1087b4 | 4,270 | asm | Assembly | Transynther/x86/_processed/AVXALIGN/_zr_/i7-8650U_0xd2.log_5924_1177.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/AVXALIGN/_zr_/i7-8650U_0xd2.log_5924_1177.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/AVXALIGN/_zr_/i7-8650U_0xd2.log_5924_1177.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
ret
.global s_faulty_load
s_faulty_load:
push %r14
push %r15
push %r8
push %r9
push %rbp
push %rcx
push %rdi
push %rsi
// Store
lea addresses_normal+0x1dacb, %r14
nop
nop
add $58194, %r9
movb $0x51, (%r14)
nop
nop
cmp %r8, %r8
// REPMOV
lea addresses_RW+0x13c6b, %rsi
lea addresses_PSE+0x1646b, %rdi
nop
nop
nop
nop
nop
xor $21709, %r15
mov $22, %rcx
rep movsl
nop
nop
nop
nop
nop
cmp %r9, %r9
// Faulty Load
mov $0x4e653a000000006b, %r8
nop
nop
nop
sub %r9, %r9
mov (%r8), %esi
lea oracles, %rcx
and $0xff, %rsi
shlq $12, %rsi
mov (%rcx,%rsi,1), %rsi
pop %rsi
pop %rdi
pop %rcx
pop %rbp
pop %r9
pop %r8
pop %r15
pop %r14
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'type': 'addresses_NC', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_normal', 'size': 1, 'AVXalign': False, 'NT': False, 'congruent': 5, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_RW', 'congruent': 9, 'same': False}, 'dst': {'type': 'addresses_PSE', 'congruent': 9, 'same': False}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'type': 'addresses_NC', 'size': 4, 'AVXalign': False, 'NT': True, 'congruent': 0, 'same': True}}
<gen_prepare_buffer>
{'00': 5924}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
| 55.454545 | 2,999 | 0.660187 |
48796201f1d46c61cf2270c70e1a5b3ebc241332 | 1,461 | asm | Assembly | Benchmarks/quicksort.asm | tim-roderick/simple-cpu-simulator | 334baf1934751527b7e5ffa0ad85d5e53e7215a1 | [
"MIT"
] | 2 | 2019-12-09T12:02:50.000Z | 2019-12-09T22:40:01.000Z | Benchmarks/quicksort.asm | tim-roderick/simple-cpu-simulator | 334baf1934751527b7e5ffa0ad85d5e53e7215a1 | [
"MIT"
] | null | null | null | Benchmarks/quicksort.asm | tim-roderick/simple-cpu-simulator | 334baf1934751527b7e5ffa0ad85d5e53e7215a1 | [
"MIT"
] | 1 | 2020-05-04T09:13:50.000Z | 2020-05-04T09:13:50.000Z |
;r1 is base of Array, r2 is lo, r3 is hi, r4 is SP, r16 is copy slave for r4
LDC r1 0
LDC r2 0
LDC r3 100
MOV r16 r3
ADDI r4 r16 1
;CALL QUICKSORT
ST r1 -re1 r4
MOV r16 r4
ADDI r4 r16 1
J -QUICKSORT
-re1
J -END
-QUICKSORT
CMP r14 r2 r3
BGEZ -re4 r14
ST r1 -re2 r4
MOV r16 r4
ADDI r4 r16 1
J -PARTITION
-re2
ST r1 r3 r4
MOV r16 r4
ADDI r4 r16 1
ST r1 r15 r4
MOV r16 r4
ADDI r4 r16 1
MOV r16 r15
SUBI r15 r16 1
MOV r3 r15
;Call QUICKSORT with lo p-1
ST r1 -re3 r4
MOV r16 r4
ADDI r4 r16 1
J -QUICKSORT
-re3
MOV r16 r4
SUBI r4 r16 1
LD r15 r1 r4
MOV r16 r4
SUBI r4 r16 1
LD r3 r1 r4
MOV r16 r15
ADDI r15 r16 1
MOV r2 r15
;Call QUICKSORT with p+1 hi
ST r1 -re4 r4
MOV r16 r4
ADDI r4 r16 1
J -QUICKSORT
-re4
MOV r16 r4
SUBI r4 r16 1
LD r14 r1 r4
J r14
;pivot r5 is Array[hi = r3]
;i is r6, j is r7
;r15 return value
-PARTITION
LD r5 r1 r3
MOV r6 r2
MOV r7 r2
-pl
CMP r14 r7 r3
MOV r16 r14
SUBI r14 r16 1
BGEZ -afterpl r14
LD r8 r1 r7
CMP r14 r8 r5
BGEZ -incrementloop r14
MOV r10 r6
MOV r11 r7
ST r1 -incrementi r4
MOV r16 r4
ADDI r4 r16 1
J -SWAP
-incrementi
MOV r16 r6
ADDI r6 r16 1
-incrementloop
MOV r16 r7
ADDI r7 r16 1
J -pl
-afterpl
MOV r10 r6
MOV r11 r3
ST r1 -re5 r4
MOV r16 r4
ADDI r4 r16 1
J -SWAP
-re5
MOV r15 r6
MOV r16 r4
SUBI r4 r16 1
LD r14 r1 r4
J r14
; r10, r11 the registers to swap
-SWAP
LD r12 r1 r10
LD r13 r1 r11
ST r1 r12 r11
ST r1 r13 r10
SUBI r16 r4 1
MOV r4 r16
LD r14 r1 r4
J r14
-END
MOV r16 r15
ADDI r15 r16 0 | 10.742647 | 76 | 0.70089 |
212b518aeba10de411edd6e2e9b0a53c57622a31 | 298 | asm | Assembly | programs/oeis/173/A173770.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/173/A173770.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/173/A173770.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A173770: a(n)=(4*10^n-13)/9.
; 3,43,443,4443,44443,444443,4444443,44444443,444444443,4444444443,44444444443,444444444443,4444444444443,44444444444443,444444444444443,4444444444444443,44444444444444443,444444444444444443
add $0,1
mov $1,10
pow $1,$0
sub $1,6
mul $1,4
div $1,9
add $1,2
mov $0,$1
| 24.833333 | 190 | 0.765101 |
bfe66e37f9234f101d694b604a13ad5489a03df0 | 689 | asm | Assembly | oeis/077/A077988.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/077/A077988.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/077/A077988.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A077988: Expansion of 1/(1+2*x-2*x^3).
; Submitted by Jon Maiga
; 1,-2,4,-6,8,-8,4,8,-32,72,-128,192,-240,224,-64,-352,1152,-2432,4160,-6016,7168,-6016,0,14336,-40704,81408,-134144,186880,-210944,153600,66560,-555008,1417216,-2701312,4292608,-5750784,6098944,-3612672,-4276224,20750336,-48726016,88899584,-136298496,175144960,-172490752,72384512,205520896,-756023296,1656815616,-2902589440,4293132288,-5272633344,4740087808,-893911040,-8757444608,26995064832,-55777951744,94041014272,-134091898880,156627894272,-125173760000,-17836277760,348928344064,-948204208128
mov $4,2
lpb $0
sub $0,1
mov $2,$3
mov $3,$5
mov $5,$4
mov $4,$2
mul $5,2
sub $4,$5
lpe
mov $0,$4
div $0,2
| 40.529412 | 500 | 0.731495 |
20a24bbf79dd70b765952590e5c91dbd2eb1b7a6 | 3,100 | asm | Assembly | programs/oeis/168/A168029.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/168/A168029.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/168/A168029.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A168029: n*(n^6+1)/2.
; 0,1,65,1095,8194,39065,139971,411775,1048580,2391489,5000005,9743591,17915910,31374265,52706759,85429695,134217736,205169345,306110025,446935879,640000010,900544281,1247178955,1702412735,2293235724,3051757825,4015905101,5230176615,6746464270,8624938169,10935000015,13756307071,17179869200,21309221505,26261675089,32169648455,39182082066,47465938585,57207791315,68615503359,81920000020,97377136961,115269666645,135909305575,159638904854,186834726585,217908828631,253311560255,293534171160,339111536449,390625000025,448705338951,514035851290,587355569945,669462605019,761217617215,863547424796,977448746625,1103992083805,1244325742439,1399680000030,1571371418041,1760807303135,1969490319615,2199023255584,2451113945345,2727580350561,3030355802695,3361494409250,3723176626329,4117715000035,4547560079231,5015306502180,5523699259585,6075640136549,6674194335975,7322597285926,8024261633465,8782784427495,9601954493119,10485760000040,11438396227521,12464273528425,13568025494855,14754517327914,16028854414105,17396391110891,18862739743935,20433779818540,22115667447809,23914845000045,25838050967911,27892330061870,30085043530425,32423879709679,34916864804735,37572373905456,40399142239105,43406276662385,46603267395399,50000000000050,53606767605401,57434283382515,61493693271295,65796588961844,70355021132865,75181512949621,80289073823975,85691213439030,91401956040889,97435855000055,103808007644991,110534070370360,117630274022465,125113439564409,133000994023495,141310986723386,150062105803545,159273695028475,168965770889279,179159040000060,189874916791681,201135541505405,212963798488935,225383334797374,238418579101625,252094760906751,266437930082815,281474976710720,297233651245569,313742585000065,331031310950471,349130284867650,368070906775705,387885542740739,408607546992255,430271284379716,452912153166785,476566608165765,501272184214759,527067520000070,553992382226361,582087690137095,611395540387775,641959232274504,673823293320385,707033505222281,741636930160455,777681937473610,815218230701849,854296875000075,894970324924351,937292452593740,981318576230145,1027105489078669,1074711488711015,1124196406714446,1175621638768825,1229050175114255,1284546631411839,1342177280000080,1402010081549441,1464114717117585,1528562620607815,1595427011633234,1664782928789145,1736707263336211,1811278793296895,1888578217967700,1968688192849729,2051693365000085,2137680408806631,2226738062188630,2318957163225785,2414430687218199,2513253784179775,2615523816767576,2721340398649665,2830805433313945,2944023153320519,3061100160000090,3182145463600921,3307270523886875,3436589291189055,3570218247913564,3708276450507905,3850885571888541,3998169944332135,4150256602832990,4307275328929209,4469358695000095,4636642109037311,4809263859892320,4987365163002625,5171090206599329,5360586198398535,5556003412779106,5757495238449305,5965218226604835,6179332139580799,6400000000000100,6627388140420801,6861666253484965,7103007442571495,7351588272955494,7607588823476665,7871192738719271,8142587281706175,8421963387109480,8709515714980289,9005442705000105
mov $1,$0
pow $1,7
add $1,$0
div $1,2
| 387.5 | 3,036 | 0.92129 |
03749da91f38b58afa0aa8af80a1b9ee9dec6b29 | 115 | asm | Assembly | OSDev/Try-0/src/boot/entry.asm | Ashwin-Paudel/Tries | 91ea32d715eedca528d143cf5e9dfd9ba70804e3 | [
"Apache-2.0"
] | null | null | null | OSDev/Try-0/src/boot/entry.asm | Ashwin-Paudel/Tries | 91ea32d715eedca528d143cf5e9dfd9ba70804e3 | [
"Apache-2.0"
] | null | null | null | OSDev/Try-0/src/boot/entry.asm | Ashwin-Paudel/Tries | 91ea32d715eedca528d143cf5e9dfd9ba70804e3 | [
"Apache-2.0"
] | null | null | null | ;
; entry.asm
; KripayaOS
;
; Call the kernel
[global _start]
[bits 32]
_start:
[extern main]
call main
jmp $
| 8.214286 | 17 | 0.652174 |
c47216c16b2bb6d1db40796343b6bb30615709b7 | 362 | asm | Assembly | solutions/60 - Understaffed Sorting/size-24_speed-533.asm | michaelgundlach/7billionhumans | 02c6f3963364362c95cb516cbc6ef1efc073bb2e | [
"MIT"
] | 45 | 2018-09-05T04:56:59.000Z | 2021-11-22T08:57:26.000Z | solutions/60 - Understaffed Sorting/size-24_speed-533.asm | michaelgundlach/7billionhumans | 02c6f3963364362c95cb516cbc6ef1efc073bb2e | [
"MIT"
] | 36 | 2018-09-01T11:34:26.000Z | 2021-05-19T23:20:49.000Z | solutions/60 - Understaffed Sorting/size-24_speed-533.asm | michaelgundlach/7billionhumans | 02c6f3963364362c95cb516cbc6ef1efc073bb2e | [
"MIT"
] | 36 | 2018-09-01T07:44:19.000Z | 2021-09-10T19:07:35.000Z | -- 7 Billion Humans (2053) --
-- 60: Understaffed Sorting --
-- Author: soerface
-- Size: 24
-- Speed: 533
a:
b:
if w != wall:
step w
jump b
endif
mem1 = set s
step s
step s
c:
if ne < mem1:
pickup ne
drop
pickup n
step ne
drop
pickup sw
step w
drop
step s
endif
if e != wall:
step e
mem1 = set n
jump c
endif
mem1 = set n
step n
step n
jump a
| 9.05 | 30 | 0.627072 |
21a3766ef0da6d961d8437d74d7ec93c5128dc6d | 1,877 | asm | Assembly | programs/oeis/231/A231667.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/231/A231667.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | programs/oeis/231/A231667.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | ; A231667: a(n) = Sum_{i=0..n} digsum_4(i)^4, where digsum_4(i) = A053737(i).
; 0,1,17,98,99,115,196,452,468,549,805,1430,1511,1767,2392,3688,3689,3705,3786,4042,4058,4139,4395,5020,5101,5357,5982,7278,7534,8159,9455,11856,11872,11953,12209,12834,12915,13171,13796,15092,15348,15973,17269,19670,20295,21591,23992,28088,28169,28425,29050,30346,30602,31227,32523,34924,35549,36845,39246,43342,44638,47039,51135,57696,57697,57713,57794,58050,58066,58147,58403,59028,59109,59365,59990,61286,61542,62167,63463,65864,65880,65961,66217,66842,66923,67179,67804,69100,69356,69981,71277,73678,74303,75599,78000,82096,82177,82433,83058,84354,84610,85235,86531,88932,89557,90853,93254,97350,98646,101047,105143,111704,111960,112585,113881,116282,116907,118203,120604,124700,125996,128397,132493,139054,141455,145551,152112,162112,162128,162209,162465,163090,163171,163427,164052,165348,165604,166229,167525,169926,170551,171847,174248,178344,178425,178681,179306,180602,180858,181483,182779,185180,185805,187101,189502,193598,194894,197295,201391,207952,208208,208833,210129,212530,213155,214451,216852,220948,222244,224645,228741,235302,237703,241799,248360,258360,258985,260281,262682,266778,268074,270475,274571,281132,283533,287629,294190,304190,308286,314847,324847,339488,339569,339825,340450,341746,342002,342627,343923,346324,346949,348245,350646,354742,356038,358439,362535,369096,369352,369977,371273,373674,374299,375595,377996,382092,383388,385789,389885,396446,398847,402943,409504,419504,420129,421425,423826,427922,429218,431619,435715,442276,444677,448773,455334,465334,469430,475991,485991,500632,501928,504329,508425,514986,517387,521483,528044,538044,542140,548701
mov $2,$0
add $2,1
lpb $2
mov $0,$4
sub $2,1
sub $0,$2
cal $0,53737 ; Sum of digits of (n written in base 4).
pow $0,4
mov $3,$0
add $3,2
mul $3,12
sub $3,24
div $3,12
add $1,$3
lpe
| 98.789474 | 1,593 | 0.797549 |
0f5c3ad576178b7751e05c2f680e674e3c8cfd1b | 3,969 | asm | Assembly | Transynther/x86/_processed/AVXALIGN/_ht_st_zr_un_sm_/i7-8650U_0xd2_notsx.log_286_1421.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/AVXALIGN/_ht_st_zr_un_sm_/i7-8650U_0xd2_notsx.log_286_1421.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/AVXALIGN/_ht_st_zr_un_sm_/i7-8650U_0xd2_notsx.log_286_1421.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r11
push %r14
push %rbx
push %rcx
push %rdi
push %rsi
lea addresses_A_ht+0xe25, %rcx
nop
nop
nop
nop
nop
cmp $26041, %r10
mov (%rcx), %rbx
nop
nop
dec %r14
lea addresses_normal_ht+0x14082, %r11
nop
nop
nop
nop
add $50733, %rsi
movb (%r11), %bl
nop
nop
and %r11, %r11
lea addresses_WC_ht+0x136ce, %rcx
nop
nop
nop
nop
cmp $60077, %rdi
mov (%rcx), %ebx
nop
nop
inc %rcx
lea addresses_A_ht+0x1662a, %rsi
nop
nop
nop
nop
xor $58188, %r14
movl $0x61626364, (%rsi)
nop
nop
and $40503, %r14
lea addresses_UC_ht+0x1d836, %r11
nop
nop
nop
nop
sub %rbx, %rbx
movb (%r11), %r14b
nop
nop
nop
nop
inc %r10
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %r14
pop %r11
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r12
push %r13
push %rax
push %rbx
push %rdi
push %rdx
// Store
lea addresses_PSE+0x1562a, %rdx
nop
dec %r13
mov $0x5152535455565758, %rdi
movq %rdi, (%rdx)
nop
nop
nop
dec %rdx
// Faulty Load
lea addresses_PSE+0x1562a, %rax
xor $39755, %r12
vmovaps (%rax), %ymm7
vextracti128 $0, %ymm7, %xmm7
vpextrq $0, %xmm7, %rdi
lea oracles, %rax
and $0xff, %rdi
shlq $12, %rdi
mov (%rax,%rdi,1), %rdi
pop %rdx
pop %rdi
pop %rbx
pop %rax
pop %r13
pop %r12
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'type': 'addresses_PSE', 'size': 16, 'AVXalign': False, 'NT': True, 'congruent': 0, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_PSE', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': True}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'type': 'addresses_PSE', 'size': 32, 'AVXalign': True, 'NT': False, 'congruent': 0, 'same': True}}
<gen_prepare_buffer>
{'OP': 'LOAD', 'src': {'type': 'addresses_A_ht', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_normal_ht', 'size': 1, 'AVXalign': False, 'NT': False, 'congruent': 2, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_WC_ht', 'size': 4, 'AVXalign': True, 'NT': False, 'congruent': 2, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_A_ht', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 11, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_UC_ht', 'size': 1, 'AVXalign': False, 'NT': False, 'congruent': 2, 'same': False}}
{'bc': 3, '00': 121, '1e': 2, 'c2': 1, 'fa': 2, '82': 1, 'be': 1, '24': 3, 'd4': 1, '36': 3, 'a2': 4, '18': 4, '9a': 1, '2a': 1, '6c': 1, '70': 2, '90': 3, 'cc': 3, 'ec': 1, '8e': 2, '44': 1, '34': 1, 'a8': 2, 'e4': 1, 'e2': 2, '58': 8, '3c': 1, '08': 3, 'f4': 2, '48': 2, '10': 3, '40': 1, '52': 1, 'b0': 1, '68': 2, '80': 2, 'e0': 6, '14': 6, 'a6': 1, '3e': 3, '38': 1, 'f6': 2, 'b6': 2, '96': 1, 'f2': 2, 'ba': 1, '1c': 3, '5c': 1, 'ac': 3, '62': 1, 'fe': 1, '3a': 3, '0a': 1, '72': 2, '9e': 2, '6a': 1, 'b4': 2, '4e': 2, 'c4': 2, 'f0': 2, '28': 2, '60': 1, 'd2': 2, 'e6': 1, 'c6': 1, 'd0': 1, '16': 3, 'da': 1, 'a4': 1, 'fc': 1, '7e': 1, '0e': 2, '12': 1, '84': 2, 'd8': 2, 'dc': 1, '78': 1, '98': 1, 'e8': 1, '22': 2, '5a': 2, 'b8': 1, '76': 1, '56': 2, '88': 2, '9c': 1, 'a0': 2, '8a': 1, '30': 1, '74': 1}
bc 00 1e c2 fa 82 be 24 00 00 00 d4 36 00 00 00 a2 00 18 9a 2a 00 6c 70 90 cc ec 8e 44 34 a8 e4 e2 00 58 3c 00 00 e2 00 08 00 f4 00 00 48 10 40 fa 52 b0 00 90 08 00 68 80 e0 00 14 00 18 a6 00 00 00 90 00 58 14 00 3e 00 38 14 00 00 00 00 f6 00 00 00 00 b6 00 00 a2 96 00 00 00 f2 00 00 e0 00 ba 58 00 00 00 1c 00 5c ac 62 00 80 fe 00 00 cc 00 3a 0a 00 48 cc a8 00 72 00 a2 00 00 00 00 1c 00 9e 00 58 00 6a 14 b4 4e 00 00 00 c4 00 58 00 18 f6 00 f0 e0 28 00 58 60 00 00 d2 00 00 00 e6 c6 d0 08 16 00 da ac 00 00 00 a4 00 fc 00 7e f2 00 00 00 00 0e 10 00 00 12 36 24 1e 00 00 4e 84 d8 a2 dc 00 00 70 d2 3e e0 00 00 ac 78 98 3a bc 14 00 10 e8 00 3a 84 00 00 1c 22 00 e0 00 c4 d8 22 00 16 72 00 5a b6 bc 00 00 9e b8 f0 00 76 00 00 28 56 68 00 16 88 88 00 00 00 00 56 00 00 9c a0 f4 36 00 18 a0 e0 00 14 00 00 00 0e 3e b4 8a 24 58 00 8e 30 00 74 58 00 00 00 5a 00
*/
| 31.007813 | 857 | 0.588561 |
f6cfb2a3df8fc2dd22557c68aef4d5739e60e1fb | 200 | asm | Assembly | libsrc/_DEVELOPMENT/libgen/c/sccz80/dirname.asm | Frodevan/z88dk | f27af9fe840ff995c63c80a73673ba7ee33fffac | [
"ClArtistic"
] | 640 | 2017-01-14T23:33:45.000Z | 2022-03-30T11:28:42.000Z | libsrc/_DEVELOPMENT/libgen/c/sccz80/dirname.asm | Frodevan/z88dk | f27af9fe840ff995c63c80a73673ba7ee33fffac | [
"ClArtistic"
] | 1,600 | 2017-01-15T16:12:02.000Z | 2022-03-31T12:11:12.000Z | libsrc/_DEVELOPMENT/libgen/c/sccz80/dirname.asm | Frodevan/z88dk | f27af9fe840ff995c63c80a73673ba7ee33fffac | [
"ClArtistic"
] | 215 | 2017-01-17T10:43:03.000Z | 2022-03-23T17:25:02.000Z | ; char *dirname(char *path)
SECTION code_string
PUBLIC dirname
EXTERN asm_dirname
defc dirname = asm_dirname
; SDCC bridge for Classic
IF __CLASSIC
PUBLIC _dirname
defc _dirname = dirname
ENDIF
| 11.764706 | 27 | 0.79 |
98fc1966ecd45923ee8ff50cadd72ef8ee359bd1 | 346 | asm | Assembly | programs/oeis/074/A074602.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/074/A074602.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/074/A074602.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A074602: a(n) = 2^n + 7^n.
; 2,9,53,351,2417,16839,117713,823671,5765057,40354119,282476273,1977328791,13841291297,96889018599,678223089233,4747561542711,33232930635137,232630514118279,1628413598172593,11398895185897431
mov $2,2
pow $2,$0
add $2,2
mov $3,7
pow $3,$0
add $2,$3
mov $4,$2
add $4,2
mul $4,2
gcd $1,$4
sub $1,12
div $1,2
add $1,2
| 20.352941 | 192 | 0.722543 |
d8b52c75f65f4e0d19128d3582a06e109bf88196 | 107 | asm | Assembly | test/hazard-tests/load-use.asm | skyzh/mips-simulator | 61a319ab776fa30831e75aab906c6ef22bb7755e | [
"MIT"
] | 35 | 2020-04-02T05:15:53.000Z | 2022-03-13T14:15:32.000Z | test/hazard-tests/load-use.asm | skyzh/mips-simulator | 61a319ab776fa30831e75aab906c6ef22bb7755e | [
"MIT"
] | 1 | 2020-04-04T10:12:11.000Z | 2020-04-04T10:12:11.000Z | test/hazard-tests/load-use.asm | skyzh/mips-simulator | 61a319ab776fa30831e75aab906c6ef22bb7755e | [
"MIT"
] | 1 | 2020-12-27T21:15:20.000Z | 2020-12-27T21:15:20.000Z | li $a0, 100
li $a2, 0x2000
sb $a0, ($a2)
lb $a1, ($a2)
addi $a1, $a1, 2000
lb $a0, ($a2)
add $a0, $a0, $a1
| 13.375 | 19 | 0.523364 |
c57879c0fa09b03c13e802484673d02630cb09cd | 3,293 | asm | Assembly | programs/oeis/017/A017068.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/017/A017068.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/017/A017068.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A017068: a(n) = (8*n)^4.
; 0,4096,65536,331776,1048576,2560000,5308416,9834496,16777216,26873856,40960000,59969536,84934656,116985856,157351936,207360000,268435456,342102016,429981696,533794816,655360000,796594176,959512576,1146228736,1358954496,1600000000,1871773696,2176782336,2517630976,2897022976,3317760000,3782742016,4294967296,4857532416,5473632256,6146560000,6879707136,7676563456,8540717056,9475854336,10485760000,11574317056,12745506816,14003408896,15352201216,16796160000,18339659776,19987173376,21743271936,23612624896,25600000000,27710263296,29948379136,32319410176,34828517376,37480960000,40282095616,43237380096,46352367616,49632710656,53084160000,56712564736,60523872256,64524128256,68719476736,73116160000,77720518656,82538991616,87578116096,92844527616,98344960000,104086245376,110075314176,116319195136,122825015296,129600000000,136651472896,143986855936,151613669376,159539531776,167772160000,176319369216,185189072896,194389282816,203928109056,213813760000,224054542336,234658861056,245635219456,256992219136,268738560000,280883040256,293434556416,306402103296,319794774016,333621760000,347892350976,362615934976,377801998336,393460125696,409600000000,426231402496,443364212736,461008408576,479174066176,497871360000,517110562816,536902045696,557256278016,578183827456,599695360000,621801639936,644513529856,667841990656,691798081536,716392960000,741637881856,767544201216,794123370496,821386940416,849346560000,878013976576,907401035776,937519681536,968381956096,1000000000000,1032386052096,1065552449536,1099511627776,1134276120576,1169858560000,1206271676416,1243528298496,1281641353216,1320623865856,1360488960000,1401249857536,1442919878656,1485512441856,1529041063936,1573519360000,1618961043456,1665379926016,1712789917696,1761205026816,1810639360000,1861107122176,1912622616576,1965200244736,2018854506496,2073600000000,2129451421696,2186423566336,2244531326976,2303789694976,2364213760000,2425818710016,2488619831296,2552632508416,2617872224256,2684354560000,2752095195136,2821109907456,2891414573056,2963025166336,3035957760000,3110228525056,3185853730816,3262849744896,3341233033216,3421020160000,3502227787776,3584872677376,3668971687936,3754541776896,3841600000000,3930163511296,4020249563136,4111875506176,4205058789376,4299816960000,4396167663616,4494128644096,4593717743616,4694952902656,4797852160000,4902433652736,5008715616256,5116716384256,5226454388736,5337948160000,5451216326656,5566277615616,5683150852096,5801854959616,5922408960000,6044831973376,6169143218176,6295362011136,6423507767296,6553600000000,6685658320896,6819702439936,6955752165376,7093827403776,7233948160000,7376134537216,7520406736896,7666785058816,7815289901056,7965941760000,8118761230336,8273769005056,8430985875456,8590432731136,8752130560000,8916100448256,9082363580416,9250941239296,9421854806016,9595125760000,9770775678976,9948826238976,10129299214336,10312216477696,10497600000000,10685471850496,10875854196736,11068769304576,11264239538176,11462287360000,11662935330816,11866206109696,12072122454016,12280707219456,12491983360000,12705973927936,12922702073856,13142191046656,13364464193536,13589544960000,13817456889856,14048223625216,14281868906496,14518416572416,14757890560000,15000314904576,15245713739776,15494111297536,15745531908096
mul $0,8
mov $1,$0
pow $1,4
| 470.428571 | 3,236 | 0.914667 |
ff59d71efecbd427409664f6ffa91b324e115788 | 2,857 | asm | Assembly | projects/08/FunctionCalls/NestedCall/Sys.asm | nadavWeisler/Nand2Tetris | 59c2e616c45044c15b99aeb8459d39b59e5e07ba | [
"MIT"
] | null | null | null | projects/08/FunctionCalls/NestedCall/Sys.asm | nadavWeisler/Nand2Tetris | 59c2e616c45044c15b99aeb8459d39b59e5e07ba | [
"MIT"
] | null | null | null | projects/08/FunctionCalls/NestedCall/Sys.asm | nadavWeisler/Nand2Tetris | 59c2e616c45044c15b99aeb8459d39b59e5e07ba | [
"MIT"
] | null | null | null | (Sys.init)
@0
D=A
@i
M=D
D=M
@Sys.init.0
D;JEQ
(Sys.init..0)
@SP
A=M
M=0
@SP
D=M
D=D+1
M=D
@i
D=M
D=D-1
M=D
@Sys.init..0
D;JNE
(Sys.init.0)
@4000
D=A
@SP
A=M
M=D
@SP
M=M+1
@0
D=A
@THIS
D=D+A
@13
M=D
@SP
M=M-1
A=M
D=M
@13
A=M
M=D
@5000
D=A
@SP
A=M
M=D
@SP
M=M+1
@1
D=A
@THIS
D=D+A
@13
M=D
@SP
M=M-1
A=M
D=M
@13
A=M
M=D
@RETURN2
D=A
@SP
A=M
M=D
@SP
M=M+1
@LCL
D=M
@SP
A=M
M=D
@SP
M=M+1
@ARG
D=M
@SP
A=M
M=D
@SP
M=M+1
@THIS
D=M
@SP
A=M
M=D
@SP
M=M+1
@THAT
D=M
@SP
A=M
M=D
@SP
M=M+1
@SP
D=M
@0
D=D-A
@5
D=D-A
@ARG
M=D
@SP
D=M
@LCL
M=D
@Sys.main
0;JMP
(RETURN2)
@1
D=A
@5
D=D+A
@13
M=D
@SP
M=M-1
A=M
D=M
@13
A=M
M=D
(LOOP)
@LOOP
0;JMP
(Sys.main)
@5
D=A
@i
M=D
D=M
@Sys.main.5
D;JEQ
(Sys.main..5)
@SP
A=M
M=0
@SP
D=M
D=D+1
M=D
@i
D=M
D=D-1
M=D
@Sys.main..5
D;JNE
(Sys.main.5)
@4001
D=A
@SP
A=M
M=D
@SP
M=M+1
@0
D=A
@THIS
D=D+A
@13
M=D
@SP
M=M-1
A=M
D=M
@13
A=M
M=D
@5001
D=A
@SP
A=M
M=D
@SP
M=M+1
@1
D=A
@THIS
D=D+A
@13
M=D
@SP
M=M-1
A=M
D=M
@13
A=M
M=D
@200
D=A
@SP
A=M
M=D
@SP
M=M+1
@1
D=A
@LCL
D=D+M
@13
M=D
@SP
M=M-1
A=M
D=M
@13
A=M
M=D
@40
D=A
@SP
A=M
M=D
@SP
M=M+1
@2
D=A
@LCL
D=D+M
@13
M=D
@SP
M=M-1
A=M
D=M
@13
A=M
M=D
@6
D=A
@SP
A=M
M=D
@SP
M=M+1
@3
D=A
@LCL
D=D+M
@13
M=D
@SP
M=M-1
A=M
D=M
@13
A=M
M=D
@123
D=A
@SP
A=M
M=D
@SP
M=M+1
@RETURN4
D=A
@SP
A=M
M=D
@SP
M=M+1
@LCL
D=M
@SP
A=M
M=D
@SP
M=M+1
@ARG
D=M
@SP
A=M
M=D
@SP
M=M+1
@THIS
D=M
@SP
A=M
M=D
@SP
M=M+1
@THAT
D=M
@SP
A=M
M=D
@SP
M=M+1
@SP
D=M
@1
D=D-A
@5
D=D-A
@ARG
M=D
@SP
D=M
@LCL
M=D
@Sys.add12
0;JMP
(RETURN4)
@0
D=A
@5
D=D+A
@13
M=D
@SP
M=M-1
A=M
D=M
@13
A=M
M=D
@0
D=A
@LCL
A=M+D
D=M
@SP
A=M
M=D
@SP
M=M+1
@1
D=A
@LCL
A=M+D
D=M
@SP
A=M
M=D
@SP
M=M+1
@2
D=A
@LCL
A=M+D
D=M
@SP
A=M
M=D
@SP
M=M+1
@3
D=A
@LCL
A=M+D
D=M
@SP
A=M
M=D
@SP
M=M+1
@4
D=A
@LCL
A=M+D
D=M
@SP
A=M
M=D
@SP
M=M+1
@SP
M=M-1
A=M
D=M
A=A-1
M=M+D
@SP
M=M-1
A=M
D=M
A=A-1
M=M+D
@SP
M=M-1
A=M
D=M
A=A-1
M=M+D
@SP
M=M-1
A=M
D=M
A=A-1
M=M+D
@LCL
D=M
@FRAME
M=D
@FRAME
D=M
@5
D=D-A
A=D
D=M
@RET
M=D
@SP
D=M
D=D-1
A=D
D=M
@ARG
A=M
M=D
@ARG
D=M
D=D+1
@SP
M=D
@FRAME
D=M
D=D-1
A=D
D=M
@THAT
M=D
@FRAME
D=M
@2
D=D-A
A=D
D=M
@THIS
M=D
@FRAME
D=M
@3
D=D-A
A=D
D=M
@ARG
M=D
@FRAME
D=M
@4
D=D-A
A=D
D=M
@LCL
M=D
@RET
A=M
0;JMP
(Sys.add12)
@0
D=A
@i
M=D
D=M
@Sys.add12.0
D;JEQ
(Sys.add12..0)
@SP
A=M
M=0
@SP
D=M
D=D+1
M=D
@i
D=M
D=D-1
M=D
@Sys.add12..0
D;JNE
(Sys.add12.0)
@4002
D=A
@SP
A=M
M=D
@SP
M=M+1
@0
D=A
@THIS
D=D+A
@13
M=D
@SP
M=M-1
A=M
D=M
@13
A=M
M=D
@5002
D=A
@SP
A=M
M=D
@SP
M=M+1
@1
D=A
@THIS
D=D+A
@13
M=D
@SP
M=M-1
A=M
D=M
@13
A=M
M=D
@0
D=A
@ARG
A=M+D
D=M
@SP
A=M
M=D
@SP
M=M+1
@12
D=A
@SP
A=M
M=D
@SP
M=M+1
@SP
M=M-1
A=M
D=M
A=A-1
M=M+D
@LCL
D=M
@FRAME
M=D
@FRAME
D=M
@5
D=D-A
A=D
D=M
@RET
M=D
@SP
D=M
D=D-1
A=D
D=M
@ARG
A=M
M=D
@ARG
D=M
D=D+1
@SP
M=D
@FRAME
D=M
D=D-1
A=D
D=M
@THAT
M=D
@FRAME
D=M
@2
D=D-A
A=D
D=M
@THIS
M=D
@FRAME
D=M
@3
D=D-A
A=D
D=M
@ARG
M=D
@FRAME
D=M
@4
D=D-A
A=D
D=M
@LCL
M=D
@RET
A=M
0;JMP
| 4.714521 | 14 | 0.528876 |
f9d5ea5436c3e34f7841f46ac7518d9039535acc | 514 | asm | Assembly | programs/oeis/328/A328478.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/328/A328478.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/328/A328478.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A328478: Divide n by the largest primorial that divides it and repeat until a fixed point is reached; a(n) is the fixed point.
; 1,1,3,1,5,1,7,1,9,5,11,1,13,7,15,1,17,3,19,5,21,11,23,1,25,13,27,7,29,1,31,1,33,17,35,1,37,19,39,5,41,7,43,11,45,23,47,1,49,25,51,13,53,9,55,7,57,29,59,1,61,31,63,1,65,11,67,17,69,35,71,1,73,37,75,19,77,13,79,5,81,41,83,7,85,43,87,11,89,3,91,23,93,47,95,1,97,49,99,25
lpb $0
mov $2,$0
seq $2,53589 ; Greatest primorial number (A002110) which divides n.
div $0,$2
lpe
add $0,1
| 51.4 | 269 | 0.663424 |
0a4784e97d55ba8d397c4e549091ea78376f7513 | 673 | asm | Assembly | oeis/001/A001795.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/001/A001795.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/001/A001795.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A001795: Coefficients of Legendre polynomials.
; Submitted by Jamie Morken(s2)
; 1,1,7,33,715,4199,52003,334305,17678835,119409675,1641030105,11435320455,322476036831,2295919134019,32968493968795,238436656380769,27767032438524099,203236010537432691,2989949596465113373,22091732848375837675,655531760569123027205,4880553738988055494905,72912514949124586636005,546270544470823336877895,32831974560542341369497975,247282707219520081702971807,3733645868221578243767802189,28247482376747091965475594339,856557115980609187193707308039,6505528768070144002093644925755
mul $0,2
seq $0,108 ; Catalan numbers: C(n) = binomial(2n,n)/(n+1) = (2n)!/(n!(n+1)!).
lpb $0
dif $0,2
lpe
| 67.3 | 481 | 0.849926 |
e4d47bb18533b7720af9d260887d0320e9c06183 | 3,067 | asm | Assembly | Library/Ruler/uiControlCommon.asm | steakknife/pcgeos | 95edd7fad36df400aba9bab1d56e154fc126044a | [
"Apache-2.0"
] | 504 | 2018-11-18T03:35:53.000Z | 2022-03-29T01:02:51.000Z | Library/Ruler/uiControlCommon.asm | steakknife/pcgeos | 95edd7fad36df400aba9bab1d56e154fc126044a | [
"Apache-2.0"
] | 96 | 2018-11-19T21:06:50.000Z | 2022-03-06T10:26:48.000Z | Library/Ruler/uiControlCommon.asm | steakknife/pcgeos | 95edd7fad36df400aba9bab1d56e154fc126044a | [
"Apache-2.0"
] | 73 | 2018-11-19T20:46:53.000Z | 2022-03-29T00:59:26.000Z | COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
Copyright (c) GeoWorks 1991 -- All Rights Reserved
PROJECT: PC GEOS
MODULE:
FILE: uiControlCommon.asm
AUTHOR: Jon Witort
FUNCTIONS:
Scope Name Description
----- ---- -----------
REVISION HISTORY:
Name Date Description
---- ---- -----------
jon 11 feb 1992 Initial version.
DESCRIPTION:
Common routines for Ruler controllers
$Id: uiControlCommon.asm,v 1.1 97/04/07 10:43:06 newdeal Exp $
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
RulerUICode segment resource
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
CopyDupInfoCommon
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
Description: Copies GenControlBuildInfo frame from source to dest
Pass: cs:si = source GenControlDupIndo frame
cx:dx = dest
Return: nothing
Destroyed: cx, di, es, ds
Comments:
Revision History:
Name Date Description
---- ------------ -----------
jon Feb 23, 1992 Initial version.
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
CopyDupInfoCommon proc near
mov es, cx
mov di, dx
segmov ds, cs
mov cx, size GenControlBuildInfo / 2
rep movsw
if ((size GenControlBuildInfo AND 1) eq 1)
movsb
endif
ret
CopyDupInfoCommon endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
UpdateRulerUnits
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
Description: Updates the units of the controller
Pass: ss:bp = GenControlUpdateUIParams structure
si = offset of ruler units list
Return: nothing
Destroyed: nothing
Comments:
Revision History:
Name Date Description
---- ------------ -----------
jon Feb 23, 1992 Initial version.
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
UpdateRulerUnits proc near
uses ax, bx, cx, dx, bp, di, ds
.enter
mov bx, ss:[bp].GCUUIP_dataBlock
call MemLock
mov ds, ax
mov cl, ds:[RTNB_type]
call MemUnlock
clr ch
mov bx, ss:[bp].GCUUIP_childBlock
mov ax, MSG_GEN_ITEM_GROUP_SET_SINGLE_SELECTION
clr di, dx
call ObjMessage
.leave
ret
UpdateRulerUnits endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
GetChildBlock
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Return the data block where the children live
CALLED BY:
PASS: *ds:si - GenControl object
RETURN: bx - child block
DESTROYED: nothing
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
CDB 12/27/91 Initial version.
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
GetChildBlock proc near
uses ax
.enter
mov ax, TEMP_GEN_CONTROL_INSTANCE
call ObjVarDerefData ;ds:bx = data
mov bx, ds:[bx].TGCI_childBlock
.leave
ret
GetChildBlock endp
RulerUICode ends
| 21.598592 | 71 | 0.500489 |
2a44a7419f6968a22ead9813426c4d15ac1298f2 | 1,539 | asm | Assembly | libsrc/target/rx78/gencon/generic_console_vpeek.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 640 | 2017-01-14T23:33:45.000Z | 2022-03-30T11:28:42.000Z | libsrc/target/rx78/gencon/generic_console_vpeek.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 1,600 | 2017-01-15T16:12:02.000Z | 2022-03-31T12:11:12.000Z | libsrc/target/rx78/gencon/generic_console_vpeek.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 215 | 2017-01-17T10:43:03.000Z | 2022-03-23T17:25:02.000Z |
MODULE generic_console_vpeek
SECTION code_clib
PUBLIC generic_console_vpeek
EXTERN generic_console_font32
EXTERN generic_console_udg32
EXTERN screendollar
EXTERN screendollar_with_count
EXTERN generic_console_xypos_graphics
generic_console_vpeek:
ld hl,-8
add hl,sp ;hl = buffer, bc = coords
ld sp,hl
push hl ;Save buffer
push hl ;Save buffer
call generic_console_xypos_graphics ;hl = screen
pop de ; de = buffer
ld a,8
loop:
push af
ld a,1
out ($f1),a
ld c,(hl)
ld a,2
out ($f1),a
ld a,(hl)
or c
ld c,a
ld a,3
out ($f1),a
ld a,(hl)
or c
ld bc,(generic_console_font32)
bit 5,b
jr z,rom_font
ld c,a
rlca
rlca
xor c
and 0xaa
xor c
ld c,a
rlca
rlca
rlca
rrc c
xor c
and 0x66
xor c
rom_font:
ld (de),a
inc de
ld bc,24
add hl,bc
pop af
dec a
jr nz,loop
pop de ;de = buffer on stack
ld hl,(generic_console_font32)
call screendollar
jr nc,gotit
ld hl,(generic_console_udg32)
ld b,128
call screendollar_with_count
jr c,gotit
add 128
gotit:
ex af,af
ld hl,8
add hl,sp
ld sp,hl
ex af,af
ret
| 19.987013 | 62 | 0.488629 |
4a3b54c05cce884064e4ca22addb533d15ef001e | 43,937 | asm | Assembly | stressfs.asm | jhyunleehi/xv6-public | 85fb0f281dc198c571553a7f625919c66905de6e | [
"MIT-0"
] | null | null | null | stressfs.asm | jhyunleehi/xv6-public | 85fb0f281dc198c571553a7f625919c66905de6e | [
"MIT-0"
] | 2 | 2021-04-14T15:27:25.000Z | 2022-01-15T15:29:32.000Z | stressfs.asm | jhyunleehi/xv6-public | 85fb0f281dc198c571553a7f625919c66905de6e | [
"MIT-0"
] | null | null | null |
_stressfs: file format elf32-i386
Disassembly of section .text:
00000000 <main>:
#include "fs.h"
#include "fcntl.h"
int
main(int argc, char *argv[])
{
0: f3 0f 1e fb endbr32
4: 8d 4c 24 04 lea 0x4(%esp),%ecx
8: 83 e4 f0 and $0xfffffff0,%esp
b: ff 71 fc pushl -0x4(%ecx)
e: 55 push %ebp
f: 89 e5 mov %esp,%ebp
11: 51 push %ecx
12: 81 ec 24 02 00 00 sub $0x224,%esp
int fd, i;
char path[] = "stressfs0";
18: c7 45 e6 73 74 72 65 movl $0x65727473,-0x1a(%ebp)
1f: c7 45 ea 73 73 66 73 movl $0x73667373,-0x16(%ebp)
26: 66 c7 45 ee 30 00 movw $0x30,-0x12(%ebp)
char data[512];
printf(1, "stressfs starting\n");
2c: 83 ec 08 sub $0x8,%esp
2f: 68 24 09 00 00 push $0x924
34: 6a 01 push $0x1
36: e8 22 05 00 00 call 55d <printf>
3b: 83 c4 10 add $0x10,%esp
memset(data, 'a', sizeof(data));
3e: 83 ec 04 sub $0x4,%esp
41: 68 00 02 00 00 push $0x200
46: 6a 61 push $0x61
48: 8d 85 e6 fd ff ff lea -0x21a(%ebp),%eax
4e: 50 push %eax
4f: e8 ca 01 00 00 call 21e <memset>
54: 83 c4 10 add $0x10,%esp
for(i = 0; i < 4; i++)
57: c7 45 f4 00 00 00 00 movl $0x0,-0xc(%ebp)
5e: eb 0d jmp 6d <main+0x6d>
if(fork() > 0)
60: e8 64 03 00 00 call 3c9 <fork>
65: 85 c0 test %eax,%eax
67: 7f 0c jg 75 <main+0x75>
for(i = 0; i < 4; i++)
69: 83 45 f4 01 addl $0x1,-0xc(%ebp)
6d: 83 7d f4 03 cmpl $0x3,-0xc(%ebp)
71: 7e ed jle 60 <main+0x60>
73: eb 01 jmp 76 <main+0x76>
break;
75: 90 nop
printf(1, "write %d\n", i);
76: 83 ec 04 sub $0x4,%esp
79: ff 75 f4 pushl -0xc(%ebp)
7c: 68 37 09 00 00 push $0x937
81: 6a 01 push $0x1
83: e8 d5 04 00 00 call 55d <printf>
88: 83 c4 10 add $0x10,%esp
path[8] += i;
8b: 0f b6 45 ee movzbl -0x12(%ebp),%eax
8f: 89 c2 mov %eax,%edx
91: 8b 45 f4 mov -0xc(%ebp),%eax
94: 01 d0 add %edx,%eax
96: 88 45 ee mov %al,-0x12(%ebp)
fd = open(path, O_CREATE | O_RDWR);
99: 83 ec 08 sub $0x8,%esp
9c: 68 02 02 00 00 push $0x202
a1: 8d 45 e6 lea -0x1a(%ebp),%eax
a4: 50 push %eax
a5: e8 67 03 00 00 call 411 <open>
aa: 83 c4 10 add $0x10,%esp
ad: 89 45 f0 mov %eax,-0x10(%ebp)
for(i = 0; i < 20; i++)
b0: c7 45 f4 00 00 00 00 movl $0x0,-0xc(%ebp)
b7: eb 1e jmp d7 <main+0xd7>
// printf(fd, "%d\n", i);
write(fd, data, sizeof(data));
b9: 83 ec 04 sub $0x4,%esp
bc: 68 00 02 00 00 push $0x200
c1: 8d 85 e6 fd ff ff lea -0x21a(%ebp),%eax
c7: 50 push %eax
c8: ff 75 f0 pushl -0x10(%ebp)
cb: e8 21 03 00 00 call 3f1 <write>
d0: 83 c4 10 add $0x10,%esp
for(i = 0; i < 20; i++)
d3: 83 45 f4 01 addl $0x1,-0xc(%ebp)
d7: 83 7d f4 13 cmpl $0x13,-0xc(%ebp)
db: 7e dc jle b9 <main+0xb9>
close(fd);
dd: 83 ec 0c sub $0xc,%esp
e0: ff 75 f0 pushl -0x10(%ebp)
e3: e8 11 03 00 00 call 3f9 <close>
e8: 83 c4 10 add $0x10,%esp
printf(1, "read\n");
eb: 83 ec 08 sub $0x8,%esp
ee: 68 41 09 00 00 push $0x941
f3: 6a 01 push $0x1
f5: e8 63 04 00 00 call 55d <printf>
fa: 83 c4 10 add $0x10,%esp
fd = open(path, O_RDONLY);
fd: 83 ec 08 sub $0x8,%esp
100: 6a 00 push $0x0
102: 8d 45 e6 lea -0x1a(%ebp),%eax
105: 50 push %eax
106: e8 06 03 00 00 call 411 <open>
10b: 83 c4 10 add $0x10,%esp
10e: 89 45 f0 mov %eax,-0x10(%ebp)
for (i = 0; i < 20; i++)
111: c7 45 f4 00 00 00 00 movl $0x0,-0xc(%ebp)
118: eb 1e jmp 138 <main+0x138>
read(fd, data, sizeof(data));
11a: 83 ec 04 sub $0x4,%esp
11d: 68 00 02 00 00 push $0x200
122: 8d 85 e6 fd ff ff lea -0x21a(%ebp),%eax
128: 50 push %eax
129: ff 75 f0 pushl -0x10(%ebp)
12c: e8 b8 02 00 00 call 3e9 <read>
131: 83 c4 10 add $0x10,%esp
for (i = 0; i < 20; i++)
134: 83 45 f4 01 addl $0x1,-0xc(%ebp)
138: 83 7d f4 13 cmpl $0x13,-0xc(%ebp)
13c: 7e dc jle 11a <main+0x11a>
close(fd);
13e: 83 ec 0c sub $0xc,%esp
141: ff 75 f0 pushl -0x10(%ebp)
144: e8 b0 02 00 00 call 3f9 <close>
149: 83 c4 10 add $0x10,%esp
wait();
14c: e8 88 02 00 00 call 3d9 <wait>
exit();
151: e8 7b 02 00 00 call 3d1 <exit>
00000156 <stosb>:
: "cc");
}
static inline void
stosb(void *addr, int data, int cnt)
{
156: 55 push %ebp
157: 89 e5 mov %esp,%ebp
159: 57 push %edi
15a: 53 push %ebx
asm volatile("cld; rep stosb"
15b: 8b 4d 08 mov 0x8(%ebp),%ecx
15e: 8b 55 10 mov 0x10(%ebp),%edx
161: 8b 45 0c mov 0xc(%ebp),%eax
164: 89 cb mov %ecx,%ebx
166: 89 df mov %ebx,%edi
168: 89 d1 mov %edx,%ecx
16a: fc cld
16b: f3 aa rep stos %al,%es:(%edi)
16d: 89 ca mov %ecx,%edx
16f: 89 fb mov %edi,%ebx
171: 89 5d 08 mov %ebx,0x8(%ebp)
174: 89 55 10 mov %edx,0x10(%ebp)
: "=D"(addr), "=c"(cnt)
: "0"(addr), "1"(cnt), "a"(data)
: "memory", "cc");
}
177: 90 nop
178: 5b pop %ebx
179: 5f pop %edi
17a: 5d pop %ebp
17b: c3 ret
0000017c <strcpy>:
#include "user.h"
#include "x86.h"
char*
strcpy(char *s, const char *t)
{
17c: f3 0f 1e fb endbr32
180: 55 push %ebp
181: 89 e5 mov %esp,%ebp
183: 83 ec 10 sub $0x10,%esp
char *os;
os = s;
186: 8b 45 08 mov 0x8(%ebp),%eax
189: 89 45 fc mov %eax,-0x4(%ebp)
while((*s++ = *t++) != 0)
18c: 90 nop
18d: 8b 55 0c mov 0xc(%ebp),%edx
190: 8d 42 01 lea 0x1(%edx),%eax
193: 89 45 0c mov %eax,0xc(%ebp)
196: 8b 45 08 mov 0x8(%ebp),%eax
199: 8d 48 01 lea 0x1(%eax),%ecx
19c: 89 4d 08 mov %ecx,0x8(%ebp)
19f: 0f b6 12 movzbl (%edx),%edx
1a2: 88 10 mov %dl,(%eax)
1a4: 0f b6 00 movzbl (%eax),%eax
1a7: 84 c0 test %al,%al
1a9: 75 e2 jne 18d <strcpy+0x11>
;
return os;
1ab: 8b 45 fc mov -0x4(%ebp),%eax
}
1ae: c9 leave
1af: c3 ret
000001b0 <strcmp>:
int
strcmp(const char *p, const char *q)
{
1b0: f3 0f 1e fb endbr32
1b4: 55 push %ebp
1b5: 89 e5 mov %esp,%ebp
while(*p && *p == *q)
1b7: eb 08 jmp 1c1 <strcmp+0x11>
p++, q++;
1b9: 83 45 08 01 addl $0x1,0x8(%ebp)
1bd: 83 45 0c 01 addl $0x1,0xc(%ebp)
while(*p && *p == *q)
1c1: 8b 45 08 mov 0x8(%ebp),%eax
1c4: 0f b6 00 movzbl (%eax),%eax
1c7: 84 c0 test %al,%al
1c9: 74 10 je 1db <strcmp+0x2b>
1cb: 8b 45 08 mov 0x8(%ebp),%eax
1ce: 0f b6 10 movzbl (%eax),%edx
1d1: 8b 45 0c mov 0xc(%ebp),%eax
1d4: 0f b6 00 movzbl (%eax),%eax
1d7: 38 c2 cmp %al,%dl
1d9: 74 de je 1b9 <strcmp+0x9>
return (uchar)*p - (uchar)*q;
1db: 8b 45 08 mov 0x8(%ebp),%eax
1de: 0f b6 00 movzbl (%eax),%eax
1e1: 0f b6 d0 movzbl %al,%edx
1e4: 8b 45 0c mov 0xc(%ebp),%eax
1e7: 0f b6 00 movzbl (%eax),%eax
1ea: 0f b6 c0 movzbl %al,%eax
1ed: 29 c2 sub %eax,%edx
1ef: 89 d0 mov %edx,%eax
}
1f1: 5d pop %ebp
1f2: c3 ret
000001f3 <strlen>:
uint
strlen(const char *s)
{
1f3: f3 0f 1e fb endbr32
1f7: 55 push %ebp
1f8: 89 e5 mov %esp,%ebp
1fa: 83 ec 10 sub $0x10,%esp
int n;
for(n = 0; s[n]; n++)
1fd: c7 45 fc 00 00 00 00 movl $0x0,-0x4(%ebp)
204: eb 04 jmp 20a <strlen+0x17>
206: 83 45 fc 01 addl $0x1,-0x4(%ebp)
20a: 8b 55 fc mov -0x4(%ebp),%edx
20d: 8b 45 08 mov 0x8(%ebp),%eax
210: 01 d0 add %edx,%eax
212: 0f b6 00 movzbl (%eax),%eax
215: 84 c0 test %al,%al
217: 75 ed jne 206 <strlen+0x13>
;
return n;
219: 8b 45 fc mov -0x4(%ebp),%eax
}
21c: c9 leave
21d: c3 ret
0000021e <memset>:
void*
memset(void *dst, int c, uint n)
{
21e: f3 0f 1e fb endbr32
222: 55 push %ebp
223: 89 e5 mov %esp,%ebp
stosb(dst, c, n);
225: 8b 45 10 mov 0x10(%ebp),%eax
228: 50 push %eax
229: ff 75 0c pushl 0xc(%ebp)
22c: ff 75 08 pushl 0x8(%ebp)
22f: e8 22 ff ff ff call 156 <stosb>
234: 83 c4 0c add $0xc,%esp
return dst;
237: 8b 45 08 mov 0x8(%ebp),%eax
}
23a: c9 leave
23b: c3 ret
0000023c <strchr>:
char*
strchr(const char *s, char c)
{
23c: f3 0f 1e fb endbr32
240: 55 push %ebp
241: 89 e5 mov %esp,%ebp
243: 83 ec 04 sub $0x4,%esp
246: 8b 45 0c mov 0xc(%ebp),%eax
249: 88 45 fc mov %al,-0x4(%ebp)
for(; *s; s++)
24c: eb 14 jmp 262 <strchr+0x26>
if(*s == c)
24e: 8b 45 08 mov 0x8(%ebp),%eax
251: 0f b6 00 movzbl (%eax),%eax
254: 38 45 fc cmp %al,-0x4(%ebp)
257: 75 05 jne 25e <strchr+0x22>
return (char*)s;
259: 8b 45 08 mov 0x8(%ebp),%eax
25c: eb 13 jmp 271 <strchr+0x35>
for(; *s; s++)
25e: 83 45 08 01 addl $0x1,0x8(%ebp)
262: 8b 45 08 mov 0x8(%ebp),%eax
265: 0f b6 00 movzbl (%eax),%eax
268: 84 c0 test %al,%al
26a: 75 e2 jne 24e <strchr+0x12>
return 0;
26c: b8 00 00 00 00 mov $0x0,%eax
}
271: c9 leave
272: c3 ret
00000273 <gets>:
char*
gets(char *buf, int max)
{
273: f3 0f 1e fb endbr32
277: 55 push %ebp
278: 89 e5 mov %esp,%ebp
27a: 83 ec 18 sub $0x18,%esp
int i, cc;
char c;
for(i=0; i+1 < max; ){
27d: c7 45 f4 00 00 00 00 movl $0x0,-0xc(%ebp)
284: eb 42 jmp 2c8 <gets+0x55>
cc = read(0, &c, 1);
286: 83 ec 04 sub $0x4,%esp
289: 6a 01 push $0x1
28b: 8d 45 ef lea -0x11(%ebp),%eax
28e: 50 push %eax
28f: 6a 00 push $0x0
291: e8 53 01 00 00 call 3e9 <read>
296: 83 c4 10 add $0x10,%esp
299: 89 45 f0 mov %eax,-0x10(%ebp)
if(cc < 1)
29c: 83 7d f0 00 cmpl $0x0,-0x10(%ebp)
2a0: 7e 33 jle 2d5 <gets+0x62>
break;
buf[i++] = c;
2a2: 8b 45 f4 mov -0xc(%ebp),%eax
2a5: 8d 50 01 lea 0x1(%eax),%edx
2a8: 89 55 f4 mov %edx,-0xc(%ebp)
2ab: 89 c2 mov %eax,%edx
2ad: 8b 45 08 mov 0x8(%ebp),%eax
2b0: 01 c2 add %eax,%edx
2b2: 0f b6 45 ef movzbl -0x11(%ebp),%eax
2b6: 88 02 mov %al,(%edx)
if(c == '\n' || c == '\r')
2b8: 0f b6 45 ef movzbl -0x11(%ebp),%eax
2bc: 3c 0a cmp $0xa,%al
2be: 74 16 je 2d6 <gets+0x63>
2c0: 0f b6 45 ef movzbl -0x11(%ebp),%eax
2c4: 3c 0d cmp $0xd,%al
2c6: 74 0e je 2d6 <gets+0x63>
for(i=0; i+1 < max; ){
2c8: 8b 45 f4 mov -0xc(%ebp),%eax
2cb: 83 c0 01 add $0x1,%eax
2ce: 39 45 0c cmp %eax,0xc(%ebp)
2d1: 7f b3 jg 286 <gets+0x13>
2d3: eb 01 jmp 2d6 <gets+0x63>
break;
2d5: 90 nop
break;
}
buf[i] = '\0';
2d6: 8b 55 f4 mov -0xc(%ebp),%edx
2d9: 8b 45 08 mov 0x8(%ebp),%eax
2dc: 01 d0 add %edx,%eax
2de: c6 00 00 movb $0x0,(%eax)
return buf;
2e1: 8b 45 08 mov 0x8(%ebp),%eax
}
2e4: c9 leave
2e5: c3 ret
000002e6 <stat>:
int
stat(const char *n, struct stat *st)
{
2e6: f3 0f 1e fb endbr32
2ea: 55 push %ebp
2eb: 89 e5 mov %esp,%ebp
2ed: 83 ec 18 sub $0x18,%esp
int fd;
int r;
fd = open(n, O_RDONLY);
2f0: 83 ec 08 sub $0x8,%esp
2f3: 6a 00 push $0x0
2f5: ff 75 08 pushl 0x8(%ebp)
2f8: e8 14 01 00 00 call 411 <open>
2fd: 83 c4 10 add $0x10,%esp
300: 89 45 f4 mov %eax,-0xc(%ebp)
if(fd < 0)
303: 83 7d f4 00 cmpl $0x0,-0xc(%ebp)
307: 79 07 jns 310 <stat+0x2a>
return -1;
309: b8 ff ff ff ff mov $0xffffffff,%eax
30e: eb 25 jmp 335 <stat+0x4f>
r = fstat(fd, st);
310: 83 ec 08 sub $0x8,%esp
313: ff 75 0c pushl 0xc(%ebp)
316: ff 75 f4 pushl -0xc(%ebp)
319: e8 0b 01 00 00 call 429 <fstat>
31e: 83 c4 10 add $0x10,%esp
321: 89 45 f0 mov %eax,-0x10(%ebp)
close(fd);
324: 83 ec 0c sub $0xc,%esp
327: ff 75 f4 pushl -0xc(%ebp)
32a: e8 ca 00 00 00 call 3f9 <close>
32f: 83 c4 10 add $0x10,%esp
return r;
332: 8b 45 f0 mov -0x10(%ebp),%eax
}
335: c9 leave
336: c3 ret
00000337 <atoi>:
int
atoi(const char *s)
{
337: f3 0f 1e fb endbr32
33b: 55 push %ebp
33c: 89 e5 mov %esp,%ebp
33e: 83 ec 10 sub $0x10,%esp
int n;
n = 0;
341: c7 45 fc 00 00 00 00 movl $0x0,-0x4(%ebp)
while('0' <= *s && *s <= '9')
348: eb 25 jmp 36f <atoi+0x38>
n = n*10 + *s++ - '0';
34a: 8b 55 fc mov -0x4(%ebp),%edx
34d: 89 d0 mov %edx,%eax
34f: c1 e0 02 shl $0x2,%eax
352: 01 d0 add %edx,%eax
354: 01 c0 add %eax,%eax
356: 89 c1 mov %eax,%ecx
358: 8b 45 08 mov 0x8(%ebp),%eax
35b: 8d 50 01 lea 0x1(%eax),%edx
35e: 89 55 08 mov %edx,0x8(%ebp)
361: 0f b6 00 movzbl (%eax),%eax
364: 0f be c0 movsbl %al,%eax
367: 01 c8 add %ecx,%eax
369: 83 e8 30 sub $0x30,%eax
36c: 89 45 fc mov %eax,-0x4(%ebp)
while('0' <= *s && *s <= '9')
36f: 8b 45 08 mov 0x8(%ebp),%eax
372: 0f b6 00 movzbl (%eax),%eax
375: 3c 2f cmp $0x2f,%al
377: 7e 0a jle 383 <atoi+0x4c>
379: 8b 45 08 mov 0x8(%ebp),%eax
37c: 0f b6 00 movzbl (%eax),%eax
37f: 3c 39 cmp $0x39,%al
381: 7e c7 jle 34a <atoi+0x13>
return n;
383: 8b 45 fc mov -0x4(%ebp),%eax
}
386: c9 leave
387: c3 ret
00000388 <memmove>:
void*
memmove(void *vdst, const void *vsrc, int n)
{
388: f3 0f 1e fb endbr32
38c: 55 push %ebp
38d: 89 e5 mov %esp,%ebp
38f: 83 ec 10 sub $0x10,%esp
char *dst;
const char *src;
dst = vdst;
392: 8b 45 08 mov 0x8(%ebp),%eax
395: 89 45 fc mov %eax,-0x4(%ebp)
src = vsrc;
398: 8b 45 0c mov 0xc(%ebp),%eax
39b: 89 45 f8 mov %eax,-0x8(%ebp)
while(n-- > 0)
39e: eb 17 jmp 3b7 <memmove+0x2f>
*dst++ = *src++;
3a0: 8b 55 f8 mov -0x8(%ebp),%edx
3a3: 8d 42 01 lea 0x1(%edx),%eax
3a6: 89 45 f8 mov %eax,-0x8(%ebp)
3a9: 8b 45 fc mov -0x4(%ebp),%eax
3ac: 8d 48 01 lea 0x1(%eax),%ecx
3af: 89 4d fc mov %ecx,-0x4(%ebp)
3b2: 0f b6 12 movzbl (%edx),%edx
3b5: 88 10 mov %dl,(%eax)
while(n-- > 0)
3b7: 8b 45 10 mov 0x10(%ebp),%eax
3ba: 8d 50 ff lea -0x1(%eax),%edx
3bd: 89 55 10 mov %edx,0x10(%ebp)
3c0: 85 c0 test %eax,%eax
3c2: 7f dc jg 3a0 <memmove+0x18>
return vdst;
3c4: 8b 45 08 mov 0x8(%ebp),%eax
}
3c7: c9 leave
3c8: c3 ret
000003c9 <fork>:
name: \
movl $SYS_ ## name, %eax; \
int $T_SYSCALL; \
ret
SYSCALL(fork)
3c9: b8 01 00 00 00 mov $0x1,%eax
3ce: cd 40 int $0x40
3d0: c3 ret
000003d1 <exit>:
SYSCALL(exit)
3d1: b8 02 00 00 00 mov $0x2,%eax
3d6: cd 40 int $0x40
3d8: c3 ret
000003d9 <wait>:
SYSCALL(wait)
3d9: b8 03 00 00 00 mov $0x3,%eax
3de: cd 40 int $0x40
3e0: c3 ret
000003e1 <pipe>:
SYSCALL(pipe)
3e1: b8 04 00 00 00 mov $0x4,%eax
3e6: cd 40 int $0x40
3e8: c3 ret
000003e9 <read>:
SYSCALL(read)
3e9: b8 05 00 00 00 mov $0x5,%eax
3ee: cd 40 int $0x40
3f0: c3 ret
000003f1 <write>:
SYSCALL(write)
3f1: b8 10 00 00 00 mov $0x10,%eax
3f6: cd 40 int $0x40
3f8: c3 ret
000003f9 <close>:
SYSCALL(close)
3f9: b8 15 00 00 00 mov $0x15,%eax
3fe: cd 40 int $0x40
400: c3 ret
00000401 <kill>:
SYSCALL(kill)
401: b8 06 00 00 00 mov $0x6,%eax
406: cd 40 int $0x40
408: c3 ret
00000409 <exec>:
SYSCALL(exec)
409: b8 07 00 00 00 mov $0x7,%eax
40e: cd 40 int $0x40
410: c3 ret
00000411 <open>:
SYSCALL(open)
411: b8 0f 00 00 00 mov $0xf,%eax
416: cd 40 int $0x40
418: c3 ret
00000419 <mknod>:
SYSCALL(mknod)
419: b8 11 00 00 00 mov $0x11,%eax
41e: cd 40 int $0x40
420: c3 ret
00000421 <unlink>:
SYSCALL(unlink)
421: b8 12 00 00 00 mov $0x12,%eax
426: cd 40 int $0x40
428: c3 ret
00000429 <fstat>:
SYSCALL(fstat)
429: b8 08 00 00 00 mov $0x8,%eax
42e: cd 40 int $0x40
430: c3 ret
00000431 <link>:
SYSCALL(link)
431: b8 13 00 00 00 mov $0x13,%eax
436: cd 40 int $0x40
438: c3 ret
00000439 <mkdir>:
SYSCALL(mkdir)
439: b8 14 00 00 00 mov $0x14,%eax
43e: cd 40 int $0x40
440: c3 ret
00000441 <chdir>:
SYSCALL(chdir)
441: b8 09 00 00 00 mov $0x9,%eax
446: cd 40 int $0x40
448: c3 ret
00000449 <dup>:
SYSCALL(dup)
449: b8 0a 00 00 00 mov $0xa,%eax
44e: cd 40 int $0x40
450: c3 ret
00000451 <getpid>:
SYSCALL(getpid)
451: b8 0b 00 00 00 mov $0xb,%eax
456: cd 40 int $0x40
458: c3 ret
00000459 <sbrk>:
SYSCALL(sbrk)
459: b8 0c 00 00 00 mov $0xc,%eax
45e: cd 40 int $0x40
460: c3 ret
00000461 <sleep>:
SYSCALL(sleep)
461: b8 0d 00 00 00 mov $0xd,%eax
466: cd 40 int $0x40
468: c3 ret
00000469 <uptime>:
SYSCALL(uptime)
469: b8 0e 00 00 00 mov $0xe,%eax
46e: cd 40 int $0x40
470: c3 ret
00000471 <cps>:
SYSCALL(cps)
471: b8 16 00 00 00 mov $0x16,%eax
476: cd 40 int $0x40
478: c3 ret
00000479 <cdate>:
479: b8 17 00 00 00 mov $0x17,%eax
47e: cd 40 int $0x40
480: c3 ret
00000481 <putc>:
#include "stat.h"
#include "user.h"
static void
putc(int fd, char c)
{
481: f3 0f 1e fb endbr32
485: 55 push %ebp
486: 89 e5 mov %esp,%ebp
488: 83 ec 18 sub $0x18,%esp
48b: 8b 45 0c mov 0xc(%ebp),%eax
48e: 88 45 f4 mov %al,-0xc(%ebp)
write(fd, &c, 1);
491: 83 ec 04 sub $0x4,%esp
494: 6a 01 push $0x1
496: 8d 45 f4 lea -0xc(%ebp),%eax
499: 50 push %eax
49a: ff 75 08 pushl 0x8(%ebp)
49d: e8 4f ff ff ff call 3f1 <write>
4a2: 83 c4 10 add $0x10,%esp
}
4a5: 90 nop
4a6: c9 leave
4a7: c3 ret
000004a8 <printint>:
static void
printint(int fd, int xx, int base, int sgn)
{
4a8: f3 0f 1e fb endbr32
4ac: 55 push %ebp
4ad: 89 e5 mov %esp,%ebp
4af: 83 ec 28 sub $0x28,%esp
static char digits[] = "0123456789ABCDEF";
char buf[16];
int i, neg;
uint x;
neg = 0;
4b2: c7 45 f0 00 00 00 00 movl $0x0,-0x10(%ebp)
if(sgn && xx < 0){
4b9: 83 7d 14 00 cmpl $0x0,0x14(%ebp)
4bd: 74 17 je 4d6 <printint+0x2e>
4bf: 83 7d 0c 00 cmpl $0x0,0xc(%ebp)
4c3: 79 11 jns 4d6 <printint+0x2e>
neg = 1;
4c5: c7 45 f0 01 00 00 00 movl $0x1,-0x10(%ebp)
x = -xx;
4cc: 8b 45 0c mov 0xc(%ebp),%eax
4cf: f7 d8 neg %eax
4d1: 89 45 ec mov %eax,-0x14(%ebp)
4d4: eb 06 jmp 4dc <printint+0x34>
} else {
x = xx;
4d6: 8b 45 0c mov 0xc(%ebp),%eax
4d9: 89 45 ec mov %eax,-0x14(%ebp)
}
i = 0;
4dc: c7 45 f4 00 00 00 00 movl $0x0,-0xc(%ebp)
do{
buf[i++] = digits[x % base];
4e3: 8b 4d 10 mov 0x10(%ebp),%ecx
4e6: 8b 45 ec mov -0x14(%ebp),%eax
4e9: ba 00 00 00 00 mov $0x0,%edx
4ee: f7 f1 div %ecx
4f0: 89 d1 mov %edx,%ecx
4f2: 8b 45 f4 mov -0xc(%ebp),%eax
4f5: 8d 50 01 lea 0x1(%eax),%edx
4f8: 89 55 f4 mov %edx,-0xc(%ebp)
4fb: 0f b6 91 94 0b 00 00 movzbl 0xb94(%ecx),%edx
502: 88 54 05 dc mov %dl,-0x24(%ebp,%eax,1)
}while((x /= base) != 0);
506: 8b 4d 10 mov 0x10(%ebp),%ecx
509: 8b 45 ec mov -0x14(%ebp),%eax
50c: ba 00 00 00 00 mov $0x0,%edx
511: f7 f1 div %ecx
513: 89 45 ec mov %eax,-0x14(%ebp)
516: 83 7d ec 00 cmpl $0x0,-0x14(%ebp)
51a: 75 c7 jne 4e3 <printint+0x3b>
if(neg)
51c: 83 7d f0 00 cmpl $0x0,-0x10(%ebp)
520: 74 2d je 54f <printint+0xa7>
buf[i++] = '-';
522: 8b 45 f4 mov -0xc(%ebp),%eax
525: 8d 50 01 lea 0x1(%eax),%edx
528: 89 55 f4 mov %edx,-0xc(%ebp)
52b: c6 44 05 dc 2d movb $0x2d,-0x24(%ebp,%eax,1)
while(--i >= 0)
530: eb 1d jmp 54f <printint+0xa7>
putc(fd, buf[i]);
532: 8d 55 dc lea -0x24(%ebp),%edx
535: 8b 45 f4 mov -0xc(%ebp),%eax
538: 01 d0 add %edx,%eax
53a: 0f b6 00 movzbl (%eax),%eax
53d: 0f be c0 movsbl %al,%eax
540: 83 ec 08 sub $0x8,%esp
543: 50 push %eax
544: ff 75 08 pushl 0x8(%ebp)
547: e8 35 ff ff ff call 481 <putc>
54c: 83 c4 10 add $0x10,%esp
while(--i >= 0)
54f: 83 6d f4 01 subl $0x1,-0xc(%ebp)
553: 83 7d f4 00 cmpl $0x0,-0xc(%ebp)
557: 79 d9 jns 532 <printint+0x8a>
}
559: 90 nop
55a: 90 nop
55b: c9 leave
55c: c3 ret
0000055d <printf>:
// Print to the given fd. Only understands %d, %x, %p, %s.
void
printf(int fd, const char *fmt, ...)
{
55d: f3 0f 1e fb endbr32
561: 55 push %ebp
562: 89 e5 mov %esp,%ebp
564: 83 ec 28 sub $0x28,%esp
char *s;
int c, i, state;
uint *ap;
state = 0;
567: c7 45 ec 00 00 00 00 movl $0x0,-0x14(%ebp)
ap = (uint*)(void*)&fmt + 1;
56e: 8d 45 0c lea 0xc(%ebp),%eax
571: 83 c0 04 add $0x4,%eax
574: 89 45 e8 mov %eax,-0x18(%ebp)
for(i = 0; fmt[i]; i++){
577: c7 45 f0 00 00 00 00 movl $0x0,-0x10(%ebp)
57e: e9 59 01 00 00 jmp 6dc <printf+0x17f>
c = fmt[i] & 0xff;
583: 8b 55 0c mov 0xc(%ebp),%edx
586: 8b 45 f0 mov -0x10(%ebp),%eax
589: 01 d0 add %edx,%eax
58b: 0f b6 00 movzbl (%eax),%eax
58e: 0f be c0 movsbl %al,%eax
591: 25 ff 00 00 00 and $0xff,%eax
596: 89 45 e4 mov %eax,-0x1c(%ebp)
if(state == 0){
599: 83 7d ec 00 cmpl $0x0,-0x14(%ebp)
59d: 75 2c jne 5cb <printf+0x6e>
if(c == '%'){
59f: 83 7d e4 25 cmpl $0x25,-0x1c(%ebp)
5a3: 75 0c jne 5b1 <printf+0x54>
state = '%';
5a5: c7 45 ec 25 00 00 00 movl $0x25,-0x14(%ebp)
5ac: e9 27 01 00 00 jmp 6d8 <printf+0x17b>
} else {
putc(fd, c);
5b1: 8b 45 e4 mov -0x1c(%ebp),%eax
5b4: 0f be c0 movsbl %al,%eax
5b7: 83 ec 08 sub $0x8,%esp
5ba: 50 push %eax
5bb: ff 75 08 pushl 0x8(%ebp)
5be: e8 be fe ff ff call 481 <putc>
5c3: 83 c4 10 add $0x10,%esp
5c6: e9 0d 01 00 00 jmp 6d8 <printf+0x17b>
}
} else if(state == '%'){
5cb: 83 7d ec 25 cmpl $0x25,-0x14(%ebp)
5cf: 0f 85 03 01 00 00 jne 6d8 <printf+0x17b>
if(c == 'd'){
5d5: 83 7d e4 64 cmpl $0x64,-0x1c(%ebp)
5d9: 75 1e jne 5f9 <printf+0x9c>
printint(fd, *ap, 10, 1);
5db: 8b 45 e8 mov -0x18(%ebp),%eax
5de: 8b 00 mov (%eax),%eax
5e0: 6a 01 push $0x1
5e2: 6a 0a push $0xa
5e4: 50 push %eax
5e5: ff 75 08 pushl 0x8(%ebp)
5e8: e8 bb fe ff ff call 4a8 <printint>
5ed: 83 c4 10 add $0x10,%esp
ap++;
5f0: 83 45 e8 04 addl $0x4,-0x18(%ebp)
5f4: e9 d8 00 00 00 jmp 6d1 <printf+0x174>
} else if(c == 'x' || c == 'p'){
5f9: 83 7d e4 78 cmpl $0x78,-0x1c(%ebp)
5fd: 74 06 je 605 <printf+0xa8>
5ff: 83 7d e4 70 cmpl $0x70,-0x1c(%ebp)
603: 75 1e jne 623 <printf+0xc6>
printint(fd, *ap, 16, 0);
605: 8b 45 e8 mov -0x18(%ebp),%eax
608: 8b 00 mov (%eax),%eax
60a: 6a 00 push $0x0
60c: 6a 10 push $0x10
60e: 50 push %eax
60f: ff 75 08 pushl 0x8(%ebp)
612: e8 91 fe ff ff call 4a8 <printint>
617: 83 c4 10 add $0x10,%esp
ap++;
61a: 83 45 e8 04 addl $0x4,-0x18(%ebp)
61e: e9 ae 00 00 00 jmp 6d1 <printf+0x174>
} else if(c == 's'){
623: 83 7d e4 73 cmpl $0x73,-0x1c(%ebp)
627: 75 43 jne 66c <printf+0x10f>
s = (char*)*ap;
629: 8b 45 e8 mov -0x18(%ebp),%eax
62c: 8b 00 mov (%eax),%eax
62e: 89 45 f4 mov %eax,-0xc(%ebp)
ap++;
631: 83 45 e8 04 addl $0x4,-0x18(%ebp)
if(s == 0)
635: 83 7d f4 00 cmpl $0x0,-0xc(%ebp)
639: 75 25 jne 660 <printf+0x103>
s = "(null)";
63b: c7 45 f4 47 09 00 00 movl $0x947,-0xc(%ebp)
while(*s != 0){
642: eb 1c jmp 660 <printf+0x103>
putc(fd, *s);
644: 8b 45 f4 mov -0xc(%ebp),%eax
647: 0f b6 00 movzbl (%eax),%eax
64a: 0f be c0 movsbl %al,%eax
64d: 83 ec 08 sub $0x8,%esp
650: 50 push %eax
651: ff 75 08 pushl 0x8(%ebp)
654: e8 28 fe ff ff call 481 <putc>
659: 83 c4 10 add $0x10,%esp
s++;
65c: 83 45 f4 01 addl $0x1,-0xc(%ebp)
while(*s != 0){
660: 8b 45 f4 mov -0xc(%ebp),%eax
663: 0f b6 00 movzbl (%eax),%eax
666: 84 c0 test %al,%al
668: 75 da jne 644 <printf+0xe7>
66a: eb 65 jmp 6d1 <printf+0x174>
}
} else if(c == 'c'){
66c: 83 7d e4 63 cmpl $0x63,-0x1c(%ebp)
670: 75 1d jne 68f <printf+0x132>
putc(fd, *ap);
672: 8b 45 e8 mov -0x18(%ebp),%eax
675: 8b 00 mov (%eax),%eax
677: 0f be c0 movsbl %al,%eax
67a: 83 ec 08 sub $0x8,%esp
67d: 50 push %eax
67e: ff 75 08 pushl 0x8(%ebp)
681: e8 fb fd ff ff call 481 <putc>
686: 83 c4 10 add $0x10,%esp
ap++;
689: 83 45 e8 04 addl $0x4,-0x18(%ebp)
68d: eb 42 jmp 6d1 <printf+0x174>
} else if(c == '%'){
68f: 83 7d e4 25 cmpl $0x25,-0x1c(%ebp)
693: 75 17 jne 6ac <printf+0x14f>
putc(fd, c);
695: 8b 45 e4 mov -0x1c(%ebp),%eax
698: 0f be c0 movsbl %al,%eax
69b: 83 ec 08 sub $0x8,%esp
69e: 50 push %eax
69f: ff 75 08 pushl 0x8(%ebp)
6a2: e8 da fd ff ff call 481 <putc>
6a7: 83 c4 10 add $0x10,%esp
6aa: eb 25 jmp 6d1 <printf+0x174>
} else {
// Unknown % sequence. Print it to draw attention.
putc(fd, '%');
6ac: 83 ec 08 sub $0x8,%esp
6af: 6a 25 push $0x25
6b1: ff 75 08 pushl 0x8(%ebp)
6b4: e8 c8 fd ff ff call 481 <putc>
6b9: 83 c4 10 add $0x10,%esp
putc(fd, c);
6bc: 8b 45 e4 mov -0x1c(%ebp),%eax
6bf: 0f be c0 movsbl %al,%eax
6c2: 83 ec 08 sub $0x8,%esp
6c5: 50 push %eax
6c6: ff 75 08 pushl 0x8(%ebp)
6c9: e8 b3 fd ff ff call 481 <putc>
6ce: 83 c4 10 add $0x10,%esp
}
state = 0;
6d1: c7 45 ec 00 00 00 00 movl $0x0,-0x14(%ebp)
for(i = 0; fmt[i]; i++){
6d8: 83 45 f0 01 addl $0x1,-0x10(%ebp)
6dc: 8b 55 0c mov 0xc(%ebp),%edx
6df: 8b 45 f0 mov -0x10(%ebp),%eax
6e2: 01 d0 add %edx,%eax
6e4: 0f b6 00 movzbl (%eax),%eax
6e7: 84 c0 test %al,%al
6e9: 0f 85 94 fe ff ff jne 583 <printf+0x26>
}
}
}
6ef: 90 nop
6f0: 90 nop
6f1: c9 leave
6f2: c3 ret
000006f3 <free>:
static Header base;
static Header *freep;
void
free(void *ap)
{
6f3: f3 0f 1e fb endbr32
6f7: 55 push %ebp
6f8: 89 e5 mov %esp,%ebp
6fa: 83 ec 10 sub $0x10,%esp
Header *bp, *p;
bp = (Header*)ap - 1;
6fd: 8b 45 08 mov 0x8(%ebp),%eax
700: 83 e8 08 sub $0x8,%eax
703: 89 45 f8 mov %eax,-0x8(%ebp)
for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr)
706: a1 b0 0b 00 00 mov 0xbb0,%eax
70b: 89 45 fc mov %eax,-0x4(%ebp)
70e: eb 24 jmp 734 <free+0x41>
if(p >= p->s.ptr && (bp > p || bp < p->s.ptr))
710: 8b 45 fc mov -0x4(%ebp),%eax
713: 8b 00 mov (%eax),%eax
715: 39 45 fc cmp %eax,-0x4(%ebp)
718: 72 12 jb 72c <free+0x39>
71a: 8b 45 f8 mov -0x8(%ebp),%eax
71d: 3b 45 fc cmp -0x4(%ebp),%eax
720: 77 24 ja 746 <free+0x53>
722: 8b 45 fc mov -0x4(%ebp),%eax
725: 8b 00 mov (%eax),%eax
727: 39 45 f8 cmp %eax,-0x8(%ebp)
72a: 72 1a jb 746 <free+0x53>
for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr)
72c: 8b 45 fc mov -0x4(%ebp),%eax
72f: 8b 00 mov (%eax),%eax
731: 89 45 fc mov %eax,-0x4(%ebp)
734: 8b 45 f8 mov -0x8(%ebp),%eax
737: 3b 45 fc cmp -0x4(%ebp),%eax
73a: 76 d4 jbe 710 <free+0x1d>
73c: 8b 45 fc mov -0x4(%ebp),%eax
73f: 8b 00 mov (%eax),%eax
741: 39 45 f8 cmp %eax,-0x8(%ebp)
744: 73 ca jae 710 <free+0x1d>
break;
if(bp + bp->s.size == p->s.ptr){
746: 8b 45 f8 mov -0x8(%ebp),%eax
749: 8b 40 04 mov 0x4(%eax),%eax
74c: 8d 14 c5 00 00 00 00 lea 0x0(,%eax,8),%edx
753: 8b 45 f8 mov -0x8(%ebp),%eax
756: 01 c2 add %eax,%edx
758: 8b 45 fc mov -0x4(%ebp),%eax
75b: 8b 00 mov (%eax),%eax
75d: 39 c2 cmp %eax,%edx
75f: 75 24 jne 785 <free+0x92>
bp->s.size += p->s.ptr->s.size;
761: 8b 45 f8 mov -0x8(%ebp),%eax
764: 8b 50 04 mov 0x4(%eax),%edx
767: 8b 45 fc mov -0x4(%ebp),%eax
76a: 8b 00 mov (%eax),%eax
76c: 8b 40 04 mov 0x4(%eax),%eax
76f: 01 c2 add %eax,%edx
771: 8b 45 f8 mov -0x8(%ebp),%eax
774: 89 50 04 mov %edx,0x4(%eax)
bp->s.ptr = p->s.ptr->s.ptr;
777: 8b 45 fc mov -0x4(%ebp),%eax
77a: 8b 00 mov (%eax),%eax
77c: 8b 10 mov (%eax),%edx
77e: 8b 45 f8 mov -0x8(%ebp),%eax
781: 89 10 mov %edx,(%eax)
783: eb 0a jmp 78f <free+0x9c>
} else
bp->s.ptr = p->s.ptr;
785: 8b 45 fc mov -0x4(%ebp),%eax
788: 8b 10 mov (%eax),%edx
78a: 8b 45 f8 mov -0x8(%ebp),%eax
78d: 89 10 mov %edx,(%eax)
if(p + p->s.size == bp){
78f: 8b 45 fc mov -0x4(%ebp),%eax
792: 8b 40 04 mov 0x4(%eax),%eax
795: 8d 14 c5 00 00 00 00 lea 0x0(,%eax,8),%edx
79c: 8b 45 fc mov -0x4(%ebp),%eax
79f: 01 d0 add %edx,%eax
7a1: 39 45 f8 cmp %eax,-0x8(%ebp)
7a4: 75 20 jne 7c6 <free+0xd3>
p->s.size += bp->s.size;
7a6: 8b 45 fc mov -0x4(%ebp),%eax
7a9: 8b 50 04 mov 0x4(%eax),%edx
7ac: 8b 45 f8 mov -0x8(%ebp),%eax
7af: 8b 40 04 mov 0x4(%eax),%eax
7b2: 01 c2 add %eax,%edx
7b4: 8b 45 fc mov -0x4(%ebp),%eax
7b7: 89 50 04 mov %edx,0x4(%eax)
p->s.ptr = bp->s.ptr;
7ba: 8b 45 f8 mov -0x8(%ebp),%eax
7bd: 8b 10 mov (%eax),%edx
7bf: 8b 45 fc mov -0x4(%ebp),%eax
7c2: 89 10 mov %edx,(%eax)
7c4: eb 08 jmp 7ce <free+0xdb>
} else
p->s.ptr = bp;
7c6: 8b 45 fc mov -0x4(%ebp),%eax
7c9: 8b 55 f8 mov -0x8(%ebp),%edx
7cc: 89 10 mov %edx,(%eax)
freep = p;
7ce: 8b 45 fc mov -0x4(%ebp),%eax
7d1: a3 b0 0b 00 00 mov %eax,0xbb0
}
7d6: 90 nop
7d7: c9 leave
7d8: c3 ret
000007d9 <morecore>:
static Header*
morecore(uint nu)
{
7d9: f3 0f 1e fb endbr32
7dd: 55 push %ebp
7de: 89 e5 mov %esp,%ebp
7e0: 83 ec 18 sub $0x18,%esp
char *p;
Header *hp;
if(nu < 4096)
7e3: 81 7d 08 ff 0f 00 00 cmpl $0xfff,0x8(%ebp)
7ea: 77 07 ja 7f3 <morecore+0x1a>
nu = 4096;
7ec: c7 45 08 00 10 00 00 movl $0x1000,0x8(%ebp)
p = sbrk(nu * sizeof(Header));
7f3: 8b 45 08 mov 0x8(%ebp),%eax
7f6: c1 e0 03 shl $0x3,%eax
7f9: 83 ec 0c sub $0xc,%esp
7fc: 50 push %eax
7fd: e8 57 fc ff ff call 459 <sbrk>
802: 83 c4 10 add $0x10,%esp
805: 89 45 f4 mov %eax,-0xc(%ebp)
if(p == (char*)-1)
808: 83 7d f4 ff cmpl $0xffffffff,-0xc(%ebp)
80c: 75 07 jne 815 <morecore+0x3c>
return 0;
80e: b8 00 00 00 00 mov $0x0,%eax
813: eb 26 jmp 83b <morecore+0x62>
hp = (Header*)p;
815: 8b 45 f4 mov -0xc(%ebp),%eax
818: 89 45 f0 mov %eax,-0x10(%ebp)
hp->s.size = nu;
81b: 8b 45 f0 mov -0x10(%ebp),%eax
81e: 8b 55 08 mov 0x8(%ebp),%edx
821: 89 50 04 mov %edx,0x4(%eax)
free((void*)(hp + 1));
824: 8b 45 f0 mov -0x10(%ebp),%eax
827: 83 c0 08 add $0x8,%eax
82a: 83 ec 0c sub $0xc,%esp
82d: 50 push %eax
82e: e8 c0 fe ff ff call 6f3 <free>
833: 83 c4 10 add $0x10,%esp
return freep;
836: a1 b0 0b 00 00 mov 0xbb0,%eax
}
83b: c9 leave
83c: c3 ret
0000083d <malloc>:
void*
malloc(uint nbytes)
{
83d: f3 0f 1e fb endbr32
841: 55 push %ebp
842: 89 e5 mov %esp,%ebp
844: 83 ec 18 sub $0x18,%esp
Header *p, *prevp;
uint nunits;
nunits = (nbytes + sizeof(Header) - 1)/sizeof(Header) + 1;
847: 8b 45 08 mov 0x8(%ebp),%eax
84a: 83 c0 07 add $0x7,%eax
84d: c1 e8 03 shr $0x3,%eax
850: 83 c0 01 add $0x1,%eax
853: 89 45 ec mov %eax,-0x14(%ebp)
if((prevp = freep) == 0){
856: a1 b0 0b 00 00 mov 0xbb0,%eax
85b: 89 45 f0 mov %eax,-0x10(%ebp)
85e: 83 7d f0 00 cmpl $0x0,-0x10(%ebp)
862: 75 23 jne 887 <malloc+0x4a>
base.s.ptr = freep = prevp = &base;
864: c7 45 f0 a8 0b 00 00 movl $0xba8,-0x10(%ebp)
86b: 8b 45 f0 mov -0x10(%ebp),%eax
86e: a3 b0 0b 00 00 mov %eax,0xbb0
873: a1 b0 0b 00 00 mov 0xbb0,%eax
878: a3 a8 0b 00 00 mov %eax,0xba8
base.s.size = 0;
87d: c7 05 ac 0b 00 00 00 movl $0x0,0xbac
884: 00 00 00
}
for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){
887: 8b 45 f0 mov -0x10(%ebp),%eax
88a: 8b 00 mov (%eax),%eax
88c: 89 45 f4 mov %eax,-0xc(%ebp)
if(p->s.size >= nunits){
88f: 8b 45 f4 mov -0xc(%ebp),%eax
892: 8b 40 04 mov 0x4(%eax),%eax
895: 39 45 ec cmp %eax,-0x14(%ebp)
898: 77 4d ja 8e7 <malloc+0xaa>
if(p->s.size == nunits)
89a: 8b 45 f4 mov -0xc(%ebp),%eax
89d: 8b 40 04 mov 0x4(%eax),%eax
8a0: 39 45 ec cmp %eax,-0x14(%ebp)
8a3: 75 0c jne 8b1 <malloc+0x74>
prevp->s.ptr = p->s.ptr;
8a5: 8b 45 f4 mov -0xc(%ebp),%eax
8a8: 8b 10 mov (%eax),%edx
8aa: 8b 45 f0 mov -0x10(%ebp),%eax
8ad: 89 10 mov %edx,(%eax)
8af: eb 26 jmp 8d7 <malloc+0x9a>
else {
p->s.size -= nunits;
8b1: 8b 45 f4 mov -0xc(%ebp),%eax
8b4: 8b 40 04 mov 0x4(%eax),%eax
8b7: 2b 45 ec sub -0x14(%ebp),%eax
8ba: 89 c2 mov %eax,%edx
8bc: 8b 45 f4 mov -0xc(%ebp),%eax
8bf: 89 50 04 mov %edx,0x4(%eax)
p += p->s.size;
8c2: 8b 45 f4 mov -0xc(%ebp),%eax
8c5: 8b 40 04 mov 0x4(%eax),%eax
8c8: c1 e0 03 shl $0x3,%eax
8cb: 01 45 f4 add %eax,-0xc(%ebp)
p->s.size = nunits;
8ce: 8b 45 f4 mov -0xc(%ebp),%eax
8d1: 8b 55 ec mov -0x14(%ebp),%edx
8d4: 89 50 04 mov %edx,0x4(%eax)
}
freep = prevp;
8d7: 8b 45 f0 mov -0x10(%ebp),%eax
8da: a3 b0 0b 00 00 mov %eax,0xbb0
return (void*)(p + 1);
8df: 8b 45 f4 mov -0xc(%ebp),%eax
8e2: 83 c0 08 add $0x8,%eax
8e5: eb 3b jmp 922 <malloc+0xe5>
}
if(p == freep)
8e7: a1 b0 0b 00 00 mov 0xbb0,%eax
8ec: 39 45 f4 cmp %eax,-0xc(%ebp)
8ef: 75 1e jne 90f <malloc+0xd2>
if((p = morecore(nunits)) == 0)
8f1: 83 ec 0c sub $0xc,%esp
8f4: ff 75 ec pushl -0x14(%ebp)
8f7: e8 dd fe ff ff call 7d9 <morecore>
8fc: 83 c4 10 add $0x10,%esp
8ff: 89 45 f4 mov %eax,-0xc(%ebp)
902: 83 7d f4 00 cmpl $0x0,-0xc(%ebp)
906: 75 07 jne 90f <malloc+0xd2>
return 0;
908: b8 00 00 00 00 mov $0x0,%eax
90d: eb 13 jmp 922 <malloc+0xe5>
for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){
90f: 8b 45 f4 mov -0xc(%ebp),%eax
912: 89 45 f0 mov %eax,-0x10(%ebp)
915: 8b 45 f4 mov -0xc(%ebp),%eax
918: 8b 00 mov (%eax),%eax
91a: 89 45 f4 mov %eax,-0xc(%ebp)
if(p->s.size >= nunits){
91d: e9 6d ff ff ff jmp 88f <malloc+0x52>
}
}
922: c9 leave
923: c3 ret
| 35.576518 | 60 | 0.426019 |
b0fa83461d24296f6f4fccd563bd56a46fd58a26 | 395 | asm | Assembly | programs/oeis/189/A189793.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/189/A189793.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/189/A189793.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A189793: n+[nr/t]+[ns/t]; r=1, s=(sin(1))^2, t=(cos(1))^2.
; 6,12,20,26,34,40,46,54,60,68,74,82,88,94,102,108,116,122,130,136,142,150,156,164,170,178,184,190,198,204,212,218,226,232,238,246,252,260,266,274,280,286,294,300,308,314,320,328,334,342,348,356,362,368,376,382,390,396,404,410,416,424,430,438,444,452,458,464,472,478,486,492,500,506,512,520,526
seq $0,189795 ; (A189793)/2.
mul $0,2
| 65.833333 | 294 | 0.675949 |
1c93cc0bda27889302388601a40aab63ea50ddff | 7,461 | asm | Assembly | Transynther/x86/_processed/AVXALIGN/_zr_/i7-7700_9_0xca_notsx.log_21829_1716.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/AVXALIGN/_zr_/i7-7700_9_0xca_notsx.log_21829_1716.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/AVXALIGN/_zr_/i7-7700_9_0xca_notsx.log_21829_1716.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r13
push %r15
push %r8
push %rax
push %rbx
push %rcx
push %rdi
push %rsi
lea addresses_WC_ht+0x1c65e, %rdi
nop
nop
and %r15, %r15
movups (%rdi), %xmm7
vpextrq $1, %xmm7, %r8
nop
cmp $4708, %rax
lea addresses_D_ht+0x173bc, %rbx
clflush (%rbx)
nop
nop
nop
nop
nop
add %rcx, %rcx
vmovups (%rbx), %ymm3
vextracti128 $0, %ymm3, %xmm3
vpextrq $1, %xmm3, %r13
nop
nop
nop
xor $27666, %r8
lea addresses_UC_ht+0x2a0e, %rbx
nop
and %rcx, %rcx
vmovups (%rbx), %ymm7
vextracti128 $0, %ymm7, %xmm7
vpextrq $0, %xmm7, %r15
nop
nop
nop
nop
cmp $465, %r13
lea addresses_D_ht+0x108d6, %rsi
lea addresses_A_ht+0x1629e, %rdi
nop
nop
nop
sub $27652, %r8
mov $109, %rcx
rep movsw
nop
cmp $52198, %rbx
lea addresses_D_ht+0x2eea, %rdi
nop
inc %r8
mov (%rdi), %eax
nop
nop
nop
nop
and %r13, %r13
lea addresses_WT_ht+0xcde, %rax
nop
nop
nop
nop
nop
add %r15, %r15
and $0xffffffffffffffc0, %rax
movaps (%rax), %xmm4
vpextrq $1, %xmm4, %rdi
nop
nop
nop
nop
add %r8, %r8
lea addresses_WT_ht+0x7b96, %r15
clflush (%r15)
nop
sub $27821, %rbx
mov (%r15), %rcx
nop
nop
and $60134, %rcx
lea addresses_normal_ht+0x8f9e, %rbx
nop
nop
nop
and $55464, %rsi
and $0xffffffffffffffc0, %rbx
vmovntdqa (%rbx), %ymm0
vextracti128 $0, %ymm0, %xmm0
vpextrq $1, %xmm0, %rdi
nop
nop
nop
nop
sub $20334, %rsi
lea addresses_WT_ht+0x1d4de, %r13
nop
nop
inc %r8
movl $0x61626364, (%r13)
nop
nop
sub $25456, %rax
lea addresses_UC_ht+0x19db0, %r8
clflush (%r8)
nop
nop
nop
nop
add $2859, %rcx
movups (%r8), %xmm0
vpextrq $1, %xmm0, %r15
nop
nop
nop
nop
nop
cmp %r13, %r13
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %rax
pop %r8
pop %r15
pop %r13
ret
.global s_faulty_load
s_faulty_load:
push %r13
push %r15
push %r9
push %rbp
push %rcx
push %rdi
push %rsi
// REPMOV
lea addresses_PSE+0x1dade, %rsi
lea addresses_A+0xacde, %rdi
clflush (%rdi)
nop
add %r9, %r9
mov $93, %rcx
rep movsw
// Exception!!!
nop
nop
mov (0), %rdi
nop
nop
nop
xor $37451, %rcx
// Store
lea addresses_RW+0x10fd6, %r15
nop
nop
nop
nop
and %rsi, %rsi
mov $0x5152535455565758, %rcx
movq %rcx, (%r15)
nop
nop
nop
nop
dec %rdi
// Load
lea addresses_UC+0x7950, %rdi
nop
nop
nop
xor %rbp, %rbp
mov (%rdi), %r13
dec %r13
// Faulty Load
lea addresses_A+0xacde, %r15
nop
nop
nop
cmp %rbp, %rbp
vmovaps (%r15), %ymm6
vextracti128 $0, %ymm6, %xmm6
vpextrq $0, %xmm6, %rcx
lea oracles, %r15
and $0xff, %rcx
shlq $12, %rcx
mov (%r15,%rcx,1), %rcx
pop %rsi
pop %rdi
pop %rcx
pop %rbp
pop %r9
pop %r15
pop %r13
ret
/*
<gen_faulty_load>
[REF]
{'src': {'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 0, 'same': False, 'type': 'addresses_A'}, 'OP': 'LOAD'}
{'src': {'congruent': 9, 'same': False, 'type': 'addresses_PSE'}, 'dst': {'congruent': 0, 'same': True, 'type': 'addresses_A'}, 'OP': 'REPM'}
{'dst': {'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 0, 'same': False, 'type': 'addresses_RW'}, 'OP': 'STOR'}
{'src': {'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 1, 'same': False, 'type': 'addresses_UC'}, 'OP': 'LOAD'}
[Faulty Load]
{'src': {'NT': False, 'AVXalign': True, 'size': 32, 'congruent': 0, 'same': True, 'type': 'addresses_A'}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 5, 'same': False, 'type': 'addresses_WC_ht'}, 'OP': 'LOAD'}
{'src': {'NT': False, 'AVXalign': False, 'size': 32, 'congruent': 0, 'same': False, 'type': 'addresses_D_ht'}, 'OP': 'LOAD'}
{'src': {'NT': False, 'AVXalign': False, 'size': 32, 'congruent': 4, 'same': False, 'type': 'addresses_UC_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 3, 'same': False, 'type': 'addresses_D_ht'}, 'dst': {'congruent': 6, 'same': True, 'type': 'addresses_A_ht'}, 'OP': 'REPM'}
{'src': {'NT': False, 'AVXalign': True, 'size': 4, 'congruent': 2, 'same': False, 'type': 'addresses_D_ht'}, 'OP': 'LOAD'}
{'src': {'NT': False, 'AVXalign': True, 'size': 16, 'congruent': 10, 'same': False, 'type': 'addresses_WT_ht'}, 'OP': 'LOAD'}
{'src': {'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 3, 'same': False, 'type': 'addresses_WT_ht'}, 'OP': 'LOAD'}
{'src': {'NT': True, 'AVXalign': False, 'size': 32, 'congruent': 6, 'same': False, 'type': 'addresses_normal_ht'}, 'OP': 'LOAD'}
{'dst': {'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 11, 'same': False, 'type': 'addresses_WT_ht'}, 'OP': 'STOR'}
{'src': {'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 1, 'same': False, 'type': 'addresses_UC_ht'}, 'OP': 'LOAD'}
{'00': 21829}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
| 32.298701 | 2,999 | 0.654068 |
64b112e76e30a31bd7e14fc8b458abc90967285b | 1,670 | asm | Assembly | src/tokens.asm | Veltas/zenv | 71d358d369a9746aa7d38d48157625d1b6ccf5dc | [
"MIT"
] | 6 | 2020-06-01T19:03:05.000Z | 2021-12-21T22:39:05.000Z | src/tokens.asm | Veltas/zenv | 71d358d369a9746aa7d38d48157625d1b6ccf5dc | [
"MIT"
] | 8 | 2020-06-13T13:40:29.000Z | 2021-09-17T15:28:36.000Z | src/tokens.asm | Veltas/zenv | 71d358d369a9746aa7d38d48157625d1b6ccf5dc | [
"MIT"
] | null | null | null | ; vi:syntax=z80
; ZEnv - Forth for the ZX Spectrum
; Copyright 2021 (C) - Christopher Leonard, MIT Licence
; https://github.com/veltas/zenv
; Tokens vector
IF tokenised
ALIGN 0x100
tokens:
exit_tok:
DW exit
dup_tok:
DW dup
question_dup_tok:
DW question_dup
less_than_tok:
DW less_than
greater_than_tok:
DW greater_than
drop_tok:
DW drop
two_drop_tok:
DW two_drop
swap_tok:
DW swap
rot_tok:
DW rot
over_tok:
DW over
nip_tok:
DW nip
tuck_tok:
DW tuck
plus_tok:
DW plus
one_plus_tok:
DW one_plus
one_minus_tok:
DW one_minus
minus_tok:
DW minus
raw_char_tok:
DW raw_char
literal_raw_tok:
DW literal_raw
if_raw_tok:
DW if_raw
else_skip_tok:
DW else_skip
store_tok:
DW store
c_store_tok:
DW c_store
fetch_tok:
DW fetch
c_fetch_tok:
DW c_fetch
two_fetch_tok:
DW two_fetch
two_swap_tok:
DW two_swap
to_r_tok:
DW to_r
r_from_tok:
DW r_from
r_fetch_tok:
DW r_fetch
zero_literal_tok:
DW zero_literal
one_literal_tok:
DW one_literal
true_tok:
DW true
to_in_tok:
DW to_in
postpone_raw_tok:
DW postpone_raw
zero_equals_tok:
DW zero_equals
equals_tok:
DW equals
not_equals_tok:
DW not_equals
until_raw_tok:
DW until_raw
again_raw_tok:
DW again_raw
do_raw_tok:
DW do_raw
question_do_raw_tok:
DW question_do_raw
loop_raw_tok:
DW loop_raw
compile_comma_tok:
DW compile_comma
negate_tok:
DW negate
_abs_tok:
DW _abs
and_tok:
DW and
or_tok:
DW or
xor_tok:
DW xor
invert_tok:
DW invert
tick_in_tok:
DW tick_in
in_size_tok:
DW in_size
dot_quote_raw_tok:
DW dot_quote_raw
abort_quote_raw_tok:
DW abort_quote_raw
t_col_tok:
DW t_col
t_row_tok:
DW t_row
within_tok:
DW within
cell_plus_tok:
DW cell_plus
cells_tok:
DW cells
ENDIF
| 12.846154 | 55 | 0.792814 |
b21ddf90e9456bd8f5b0e6e0fb7e1220e1cecb13 | 268 | asm | Assembly | unittests/ASM/PrimaryGroup/3_F6_07_2.asm | cobalt2727/FEX | 13087f8425aeaad28dc81bed46a83e1d72ff0db8 | [
"MIT"
] | 628 | 2020-03-06T14:01:32.000Z | 2022-03-31T06:35:14.000Z | unittests/ASM/PrimaryGroup/3_F6_07_2.asm | cobalt2727/FEX | 13087f8425aeaad28dc81bed46a83e1d72ff0db8 | [
"MIT"
] | 576 | 2020-03-06T08:25:12.000Z | 2022-03-30T04:05:29.000Z | unittests/ASM/PrimaryGroup/3_F6_07_2.asm | cobalt2727/FEX | 13087f8425aeaad28dc81bed46a83e1d72ff0db8 | [
"MIT"
] | 38 | 2020-03-07T06:10:00.000Z | 2022-03-29T09:27:36.000Z | %ifdef CONFIG
{
"RegData": {
"RAX": "0x0021"
},
"MemoryRegions": {
"0x100000000": "4096"
}
}
%endif
mov rdx, 0xe0000000
mov rax, 0x8
mov [rdx + 8 * 0], rax
; Test that 8bit divide divides a 16bit dividend
mov ax, 0x0108
idiv byte [rdx + 8 * 0]
hlt
| 12.181818 | 48 | 0.604478 |
08188899f15e8a6f6eebb7bcaa83198e33f5973b | 8,346 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xa0_notsx.log_21829_1623.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xa0_notsx.log_21829_1623.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xa0_notsx.log_21829_1623.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r14
push %r8
push %r9
push %rax
push %rbp
push %rcx
push %rdi
push %rsi
lea addresses_D_ht+0x15552, %rsi
lea addresses_UC_ht+0x16452, %rdi
xor $18260, %rax
mov $127, %rcx
rep movsq
add %r9, %r9
lea addresses_WT_ht+0x3c52, %rdi
sub $44825, %r14
vmovups (%rdi), %ymm4
vextracti128 $1, %ymm4, %xmm4
vpextrq $0, %xmm4, %rcx
nop
nop
nop
inc %rax
lea addresses_UC_ht+0x14022, %rsi
lea addresses_UC_ht+0xec52, %rdi
nop
nop
nop
nop
add $60290, %rax
mov $38, %rcx
rep movsl
dec %rax
lea addresses_UC_ht+0xb02, %rsi
dec %rbp
mov (%rsi), %rdi
dec %rdi
lea addresses_WC_ht+0x15c52, %rsi
lea addresses_normal_ht+0xeb3d, %rdi
and $4813, %r8
mov $113, %rcx
rep movsb
nop
nop
nop
nop
nop
inc %rbp
lea addresses_UC_ht+0x1682e, %rsi
nop
cmp $55851, %r9
movb $0x61, (%rsi)
nop
nop
nop
nop
dec %rdi
lea addresses_WC_ht+0x1da51, %rax
clflush (%rax)
nop
nop
nop
xor $7927, %rbp
mov (%rax), %r14d
nop
nop
nop
nop
nop
inc %rbp
lea addresses_WC_ht+0x7552, %rsi
nop
nop
inc %r8
vmovups (%rsi), %ymm4
vextracti128 $0, %ymm4, %xmm4
vpextrq $0, %xmm4, %rax
nop
nop
sub $17014, %rcx
lea addresses_UC_ht+0xbfb2, %r8
nop
nop
nop
nop
cmp $6513, %rax
mov $0x6162636465666768, %rcx
movq %rcx, (%r8)
nop
nop
nop
xor %r8, %r8
lea addresses_normal_ht+0x16e9a, %r8
nop
nop
nop
xor %rbp, %rbp
mov (%r8), %r9
nop
nop
add $42673, %rbp
lea addresses_A_ht+0x10f52, %rax
nop
nop
nop
nop
cmp $42883, %r14
movl $0x61626364, (%rax)
nop
nop
nop
nop
and %rsi, %rsi
lea addresses_WC_ht+0x982, %rcx
nop
nop
nop
nop
nop
xor %rdi, %rdi
movl $0x61626364, (%rcx)
cmp $6805, %rdi
lea addresses_D_ht+0x4552, %rcx
nop
nop
nop
nop
dec %rdi
movw $0x6162, (%rcx)
nop
add %rdi, %rdi
lea addresses_WC_ht+0x88b2, %r8
nop
nop
nop
nop
nop
and %rax, %rax
mov (%r8), %r9
nop
nop
and %rsi, %rsi
pop %rsi
pop %rdi
pop %rcx
pop %rbp
pop %rax
pop %r9
pop %r8
pop %r14
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r12
push %r14
push %r9
push %rax
push %rcx
push %rdi
// Load
lea addresses_WT+0xd52, %r12
nop
nop
nop
nop
nop
xor $49874, %rcx
mov (%r12), %ax
nop
nop
nop
nop
and %rcx, %rcx
// Store
lea addresses_WT+0x4c52, %rdi
nop
sub $7844, %r9
movl $0x51525354, (%rdi)
nop
nop
nop
nop
xor %rax, %rax
// Store
lea addresses_normal+0xc822, %rdi
nop
nop
nop
sub %r11, %r11
movl $0x51525354, (%rdi)
nop
nop
lfence
// Store
lea addresses_PSE+0x15752, %r14
nop
nop
nop
nop
dec %rax
movl $0x51525354, (%r14)
nop
nop
inc %rax
// Faulty Load
lea addresses_PSE+0x17452, %r9
nop
sub $8256, %r12
vmovups (%r9), %ymm5
vextracti128 $1, %ymm5, %xmm5
vpextrq $1, %xmm5, %rdi
lea oracles, %r12
and $0xff, %rdi
shlq $12, %rdi
mov (%r12,%rdi,1), %rdi
pop %rdi
pop %rcx
pop %rax
pop %r9
pop %r14
pop %r12
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'src': {'type': 'addresses_PSE', 'AVXalign': False, 'size': 32, 'NT': True, 'same': True, 'congruent': 0}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_WT', 'AVXalign': False, 'size': 2, 'NT': False, 'same': False, 'congruent': 7}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'type': 'addresses_WT', 'AVXalign': False, 'size': 4, 'NT': False, 'same': False, 'congruent': 11}}
{'OP': 'STOR', 'dst': {'type': 'addresses_normal', 'AVXalign': False, 'size': 4, 'NT': False, 'same': False, 'congruent': 3}}
{'OP': 'STOR', 'dst': {'type': 'addresses_PSE', 'AVXalign': False, 'size': 4, 'NT': False, 'same': False, 'congruent': 8}}
[Faulty Load]
{'src': {'type': 'addresses_PSE', 'AVXalign': False, 'size': 32, 'NT': False, 'same': True, 'congruent': 0}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'type': 'addresses_D_ht', 'congruent': 6, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_UC_ht', 'congruent': 11, 'same': False}}
{'src': {'type': 'addresses_WT_ht', 'AVXalign': False, 'size': 32, 'NT': False, 'same': False, 'congruent': 11}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_UC_ht', 'congruent': 4, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_UC_ht', 'congruent': 8, 'same': False}}
{'src': {'type': 'addresses_UC_ht', 'AVXalign': False, 'size': 8, 'NT': False, 'same': False, 'congruent': 4}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_WC_ht', 'congruent': 8, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_normal_ht', 'congruent': 0, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_UC_ht', 'AVXalign': False, 'size': 1, 'NT': False, 'same': False, 'congruent': 0}}
{'src': {'type': 'addresses_WC_ht', 'AVXalign': False, 'size': 4, 'NT': False, 'same': False, 'congruent': 0}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_WC_ht', 'AVXalign': False, 'size': 32, 'NT': False, 'same': False, 'congruent': 5}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'type': 'addresses_UC_ht', 'AVXalign': False, 'size': 8, 'NT': False, 'same': False, 'congruent': 5}}
{'src': {'type': 'addresses_normal_ht', 'AVXalign': False, 'size': 8, 'NT': False, 'same': False, 'congruent': 2}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'type': 'addresses_A_ht', 'AVXalign': False, 'size': 4, 'NT': True, 'same': True, 'congruent': 5}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WC_ht', 'AVXalign': False, 'size': 4, 'NT': False, 'same': False, 'congruent': 3}}
{'OP': 'STOR', 'dst': {'type': 'addresses_D_ht', 'AVXalign': False, 'size': 2, 'NT': True, 'same': False, 'congruent': 7}}
{'src': {'type': 'addresses_WC_ht', 'AVXalign': False, 'size': 8, 'NT': False, 'same': False, 'congruent': 5}, 'OP': 'LOAD'}
{'33': 21829}
33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33
*/
| 31.854962 | 2,999 | 0.652888 |
6ce3f4c69e08ba7bff6ef5cdce84617f15e058ea | 1,335 | asm | Assembly | programs/oeis/158/A158066.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/158/A158066.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/158/A158066.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A158066: a(n) = 49*n + 1.
; 50,99,148,197,246,295,344,393,442,491,540,589,638,687,736,785,834,883,932,981,1030,1079,1128,1177,1226,1275,1324,1373,1422,1471,1520,1569,1618,1667,1716,1765,1814,1863,1912,1961,2010,2059,2108,2157,2206,2255,2304,2353,2402,2451,2500,2549,2598,2647,2696,2745,2794,2843,2892,2941,2990,3039,3088,3137,3186,3235,3284,3333,3382,3431,3480,3529,3578,3627,3676,3725,3774,3823,3872,3921,3970,4019,4068,4117,4166,4215,4264,4313,4362,4411,4460,4509,4558,4607,4656,4705,4754,4803,4852,4901,4950,4999,5048,5097,5146,5195,5244,5293,5342,5391,5440,5489,5538,5587,5636,5685,5734,5783,5832,5881,5930,5979,6028,6077,6126,6175,6224,6273,6322,6371,6420,6469,6518,6567,6616,6665,6714,6763,6812,6861,6910,6959,7008,7057,7106,7155,7204,7253,7302,7351,7400,7449,7498,7547,7596,7645,7694,7743,7792,7841,7890,7939,7988,8037,8086,8135,8184,8233,8282,8331,8380,8429,8478,8527,8576,8625,8674,8723,8772,8821,8870,8919,8968,9017,9066,9115,9164,9213,9262,9311,9360,9409,9458,9507,9556,9605,9654,9703,9752,9801,9850,9899,9948,9997,10046,10095,10144,10193,10242,10291,10340,10389,10438,10487,10536,10585,10634,10683,10732,10781,10830,10879,10928,10977,11026,11075,11124,11173,11222,11271,11320,11369,11418,11467,11516,11565,11614,11663,11712,11761,11810,11859,11908,11957,12006,12055,12104,12153,12202,12251
mov $1,$0
mul $1,49
add $1,50
| 190.714286 | 1,275 | 0.789513 |
fbe26b3c89f7da30d87998ec89ca276cfe45d628 | 360 | asm | Assembly | programs/oeis/123/A123737.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/123/A123737.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/123/A123737.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A123737: Partial sums of (-1)^floor(n*sqrt(2)).
; -1,0,1,0,-1,0,-1,-2,-1,0,-1,0,1,0,-1,0,1,0,1,2,1,0,1,0,-1,0,1,0,-1,0,-1,-2,-1,0,-1,0,1,0,-1,0,-1,-2,-1,0,-1,-2,-1,-2,-3,-2,-1,-2,-1,0,-1,-2,-1,0,-1,0,1,0,-1,0,-1,-2,-1,0,-1,0,1,0,-1,0,1,0,1,2,1,0,1,0,-1,0,1,0,-1,0,-1,-2,-1,0,-1,0,1,0,-1,0,1,0
seq $0,83037 ; a(n)=2*A083036(n)-n. Also -A123737(n).
mul $0,-1
| 60 | 244 | 0.472222 |
1d75a085fe6dd11c6bacb2cc2af6d7592622c6be | 310 | asm | Assembly | programs/oeis/040/A040557.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/040/A040557.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/040/A040557.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A040557: Continued fraction for sqrt(582).
; 24,8,48,8,48,8,48,8,48,8,48,8,48,8,48,8,48,8,48,8,48,8,48,8,48,8,48,8,48,8,48,8,48,8,48,8,48,8,48,8,48,8,48,8,48,8,48,8,48,8,48,8,48,8,48,8,48,8,48,8,48,8,48,8,48,8,48,8,48,8,48,8,48,8,48
sub $0,1
mod $0,2
mul $0,10
add $0,2
pow $0,2
div $0,26
mul $0,8
add $0,8
| 25.833333 | 189 | 0.609677 |
7a5247ff857e57ea8fff7d403df92fd45f4e5a30 | 8,452 | asm | Assembly | Transynther/x86/_processed/NONE/_zr_/i7-7700_9_0xca.log_21829_340.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_zr_/i7-7700_9_0xca.log_21829_340.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_zr_/i7-7700_9_0xca.log_21829_340.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r15
push %r8
push %r9
push %rax
push %rbx
push %rcx
push %rdi
push %rsi
lea addresses_WT_ht+0xb0f4, %r8
nop
nop
nop
nop
xor %rsi, %rsi
movb $0x61, (%r8)
sub %r9, %r9
lea addresses_normal_ht+0x150f4, %rax
nop
nop
nop
and $40724, %r11
mov (%rax), %r15
nop
and %r9, %r9
lea addresses_WT_ht+0xcdf4, %rbx
clflush (%rbx)
nop
nop
nop
nop
nop
dec %r9
mov $0x6162636465666768, %r11
movq %r11, (%rbx)
xor $26795, %r11
lea addresses_D_ht+0x9a4, %rsi
clflush (%rsi)
sub $51492, %r8
mov (%rsi), %r15
xor $48193, %r11
lea addresses_WT_ht+0xf0f4, %r8
nop
nop
nop
nop
nop
xor %r9, %r9
vmovups (%r8), %ymm7
vextracti128 $0, %ymm7, %xmm7
vpextrq $0, %xmm7, %r15
nop
nop
nop
xor %rsi, %rsi
lea addresses_UC_ht+0x1a916, %rsi
lea addresses_A_ht+0xb412, %rdi
clflush (%rsi)
lfence
mov $28, %rcx
rep movsb
xor $8036, %r9
lea addresses_UC_ht+0x4b34, %r9
nop
nop
nop
nop
nop
xor %rax, %rax
vmovups (%r9), %ymm2
vextracti128 $1, %ymm2, %xmm2
vpextrq $0, %xmm2, %r8
nop
nop
dec %rsi
lea addresses_normal_ht+0xb4f4, %rbx
nop
sub %rcx, %rcx
mov $0x6162636465666768, %r15
movq %r15, %xmm6
vmovups %ymm6, (%rbx)
nop
nop
and %r9, %r9
lea addresses_UC_ht+0xf8f4, %rsi
nop
nop
nop
xor $872, %rax
movb (%rsi), %cl
nop
nop
nop
add %rsi, %rsi
lea addresses_WC_ht+0x3b34, %rsi
nop
nop
and $49977, %rdi
movups (%rsi), %xmm6
vpextrq $0, %xmm6, %r8
nop
cmp %rax, %rax
lea addresses_UC_ht+0x62f4, %rdi
nop
nop
nop
dec %r8
movups (%rdi), %xmm7
vpextrq $0, %xmm7, %r11
nop
xor $14219, %rdi
lea addresses_normal_ht+0xed64, %rsi
lea addresses_A_ht+0x195f4, %rdi
nop
nop
sub %r8, %r8
mov $43, %rcx
rep movsw
nop
nop
nop
nop
nop
cmp $20361, %rax
lea addresses_D_ht+0x1bbf4, %r11
and $17193, %r15
mov (%r11), %ebx
nop
nop
and %r15, %r15
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %rax
pop %r9
pop %r8
pop %r15
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r12
push %r13
push %r15
push %r9
push %rcx
push %rdi
push %rdx
// Store
lea addresses_PSE+0x1192c, %rdi
nop
nop
nop
nop
sub %rcx, %rcx
mov $0x5152535455565758, %rdx
movq %rdx, (%rdi)
cmp $9286, %rdi
// Store
mov $0x3bca8f00000007c6, %rcx
nop
xor $34124, %r15
movl $0x51525354, (%rcx)
nop
nop
nop
nop
nop
add %rcx, %rcx
// Store
lea addresses_UC+0x3cf4, %r15
nop
nop
nop
nop
cmp %r12, %r12
mov $0x5152535455565758, %r13
movq %r13, (%r15)
nop
nop
nop
nop
add %r9, %r9
// Store
mov $0x23f2290000000e0c, %rcx
nop
nop
cmp $36434, %r9
mov $0x5152535455565758, %r12
movq %r12, %xmm1
vmovups %ymm1, (%rcx)
nop
nop
nop
nop
nop
cmp %r15, %r15
// Store
mov $0xe04, %rdi
nop
nop
nop
nop
nop
and %r9, %r9
movw $0x5152, (%rdi)
nop
inc %rdi
// Faulty Load
lea addresses_UC+0x140f4, %rdi
cmp $9258, %r13
mov (%rdi), %rcx
lea oracles, %r12
and $0xff, %rcx
shlq $12, %rcx
mov (%r12,%rcx,1), %rcx
pop %rdx
pop %rdi
pop %rcx
pop %r9
pop %r15
pop %r13
pop %r12
ret
/*
<gen_faulty_load>
[REF]
{'src': {'congruent': 0, 'AVXalign': False, 'same': False, 'size': 16, 'NT': False, 'type': 'addresses_UC'}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'congruent': 3, 'AVXalign': False, 'same': False, 'size': 8, 'NT': False, 'type': 'addresses_PSE'}}
{'OP': 'STOR', 'dst': {'congruent': 1, 'AVXalign': False, 'same': False, 'size': 4, 'NT': False, 'type': 'addresses_NC'}}
{'OP': 'STOR', 'dst': {'congruent': 9, 'AVXalign': False, 'same': False, 'size': 8, 'NT': False, 'type': 'addresses_UC'}}
{'OP': 'STOR', 'dst': {'congruent': 1, 'AVXalign': False, 'same': False, 'size': 32, 'NT': False, 'type': 'addresses_NC'}}
{'OP': 'STOR', 'dst': {'congruent': 4, 'AVXalign': False, 'same': False, 'size': 2, 'NT': False, 'type': 'addresses_P'}}
[Faulty Load]
{'src': {'congruent': 0, 'AVXalign': False, 'same': True, 'size': 8, 'NT': False, 'type': 'addresses_UC'}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'OP': 'STOR', 'dst': {'congruent': 9, 'AVXalign': False, 'same': True, 'size': 1, 'NT': False, 'type': 'addresses_WT_ht'}}
{'src': {'congruent': 11, 'AVXalign': False, 'same': False, 'size': 8, 'NT': False, 'type': 'addresses_normal_ht'}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'congruent': 8, 'AVXalign': False, 'same': True, 'size': 8, 'NT': True, 'type': 'addresses_WT_ht'}}
{'src': {'congruent': 4, 'AVXalign': False, 'same': False, 'size': 8, 'NT': False, 'type': 'addresses_D_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 10, 'AVXalign': False, 'same': False, 'size': 32, 'NT': False, 'type': 'addresses_WT_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 0, 'same': False, 'type': 'addresses_UC_ht'}, 'OP': 'REPM', 'dst': {'congruent': 1, 'same': False, 'type': 'addresses_A_ht'}}
{'src': {'congruent': 5, 'AVXalign': False, 'same': False, 'size': 32, 'NT': False, 'type': 'addresses_UC_ht'}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'congruent': 10, 'AVXalign': False, 'same': False, 'size': 32, 'NT': False, 'type': 'addresses_normal_ht'}}
{'src': {'congruent': 11, 'AVXalign': False, 'same': False, 'size': 1, 'NT': False, 'type': 'addresses_UC_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 6, 'AVXalign': False, 'same': False, 'size': 16, 'NT': False, 'type': 'addresses_WC_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 8, 'AVXalign': False, 'same': False, 'size': 16, 'NT': False, 'type': 'addresses_UC_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 3, 'same': False, 'type': 'addresses_normal_ht'}, 'OP': 'REPM', 'dst': {'congruent': 7, 'same': False, 'type': 'addresses_A_ht'}}
{'src': {'congruent': 8, 'AVXalign': False, 'same': False, 'size': 4, 'NT': False, 'type': 'addresses_D_ht'}, 'OP': 'LOAD'}
{'00': 21829}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
| 32.015152 | 2,999 | 0.650615 |
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