hexsha stringlengths 40 40 | size int64 6 1.05M | ext stringclasses 3 values | lang stringclasses 1 value | max_stars_repo_path stringlengths 4 232 | max_stars_repo_name stringlengths 7 106 | max_stars_repo_head_hexsha stringlengths 40 40 | max_stars_repo_licenses listlengths 1 7 | max_stars_count int64 1 33.5k ⌀ | max_stars_repo_stars_event_min_datetime stringlengths 24 24 ⌀ | max_stars_repo_stars_event_max_datetime stringlengths 24 24 ⌀ | max_issues_repo_path stringlengths 4 232 | max_issues_repo_name stringlengths 7 106 | max_issues_repo_head_hexsha stringlengths 40 40 | max_issues_repo_licenses listlengths 1 7 | max_issues_count int64 1 37.5k ⌀ | max_issues_repo_issues_event_min_datetime stringlengths 24 24 ⌀ | max_issues_repo_issues_event_max_datetime stringlengths 24 24 ⌀ | max_forks_repo_path stringlengths 4 232 | max_forks_repo_name stringlengths 7 106 | max_forks_repo_head_hexsha stringlengths 40 40 | max_forks_repo_licenses listlengths 1 7 | max_forks_count int64 1 12.6k ⌀ | max_forks_repo_forks_event_min_datetime stringlengths 24 24 ⌀ | max_forks_repo_forks_event_max_datetime stringlengths 24 24 ⌀ | content stringlengths 6 1.05M | avg_line_length float64 1.16 19.7k | max_line_length int64 2 938k | alphanum_fraction float64 0 1 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
f83284cbf075360c2d274f7d67662d27f1b26c6f | 235 | asm | Assembly | solutions/10 - Emergency Escapades/size-9_speed-204.asm | michaelgundlach/7billionhumans | 02c6f3963364362c95cb516cbc6ef1efc073bb2e | [
"MIT"
] | 45 | 2018-09-05T04:56:59.000Z | 2021-11-22T08:57:26.000Z | solutions/10 - Emergency Escapades/size-9_speed-204.asm | michaelgundlach/7billionhumans | 02c6f3963364362c95cb516cbc6ef1efc073bb2e | [
"MIT"
] | 36 | 2018-09-01T11:34:26.000Z | 2021-05-19T23:20:49.000Z | solutions/10 - Emergency Escapades/size-9_speed-204.asm | michaelgundlach/7billionhumans | 02c6f3963364362c95cb516cbc6ef1efc073bb2e | [
"MIT"
] | 36 | 2018-09-01T07:44:19.000Z | 2021-09-10T19:07:35.000Z | -- 7 Billion Humans (2053) --
-- 10: Emergency Escapades --
-- Author: ansvonwa
-- Size: 9
-- Speed: 204
a:
if c == 1:
step n
endif
if c == 2:
step e
endif
if c == 3:
step s
endif
if c == 4 or
c != datacube:
step w
endif
jump a
| 10.217391 | 29 | 0.587234 |
1c01fd5db6a05821aa63d0e738570fc06238b8f0 | 277 | asm | Assembly | programs/oeis/036/A036405.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/036/A036405.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/036/A036405.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A036405: a(n) = ceiling(n^2/7).
; 0,1,1,2,3,4,6,7,10,12,15,18,21,25,28,33,37,42,47,52,58,63,70,76,83,90,97,105,112,121,129,138,147,156,166,175,186,196,207,218,229,241,252,265,277,290,303,316,330,343,358,372,387,402,417,433,448
pow $0,2
mov $1,6
add $1,$0
div $1,7
mov $0,$1
| 30.777778 | 194 | 0.649819 |
5a20a60034b5cf3b06bb02a09457a64d88239c4e | 3,926 | asm | Assembly | work/ff3_charcode.h.asm | ypyp-pprn-mnmn/ff3_hack | f6b8590de1bd47ff617e56e2813c25305846c002 | [
"MIT"
] | 4 | 2018-03-29T15:33:26.000Z | 2022-03-09T13:35:31.000Z | work/ff3_charcode.h.asm | take-the-bath/ff3_hack | f6b8590de1bd47ff617e56e2813c25305846c002 | [
"MIT"
] | 45 | 2017-11-17T23:46:35.000Z | 2021-09-27T11:35:47.000Z | work/ff3_charcode.h.asm | take-the-bath/ff3_hack | f6b8590de1bd47ff617e56e2813c25305846c002 | [
"MIT"
] | null | null | null | ; encoding: utf-8
; ff3_charcode.h.asm:
; defines charcter codes of ff3 (respecting the original implementation)
;==================================================================================================
;; codemap:
;; -- 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f
;; 00 \0 \n .. .. .. .. .. .. .. .. .. .. .. .. .. ..
;; 10 .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
;; 20 .. .. .. .. .. .. .. .. .. が ぎ ぐ げ ご ざ じ
;; 30 ず ぜ ぞ だ ぢ づ で ど ば び ぶ べ ぼ ぱ ぴ ぷ
;; 40 ぺ ぽ ヴ ガ ギ グ ゲ ゴ ザ ジ ズ ゼ ゾ ダ ヂ ヅ
;; 50 デ ド バ ビ ブ ベ ボ パ ピ プ ペ ポ C G L V
;; 60 盾 鎧 兜 腕 爪 本 杖 槌 槍 短 斧 剣 刀 琴 弓 鈴
;; 70 投 手 ◎ × ○ ● E H M P X を っ ゃ ゅ ょ
;; 80 _0 _1 _2 _3 _4 _5 _6 _7 _8 _9 あ い う え お か
;; 90 き く け こ さ し す せ そ た ち つ て と な に
;; a0 ぬ ね の は ひ ふ へ ほ ま み む め も や ゆ よ
;; b0 ら り る れ ろ わ ん ァ ィ ゥ ェ ォ ッ ャ ュ ョ
;; c0 ゛ ゜ ー ･･ _! _? _% _/ _: 『 ア イ ウ エ オ カ
;; d0 キ ク ケ コ サ シ ス セ ソ タ チ ツ テ ト ナ ニ
;; e0 ヌ ネ ノ ハ ヒ フ 「 ホ マ ミ ム メ モ ヤ ユ ヨ
;; f0 ラ リ ル レ ロ ワ ン ┏ ━ ┓ ┃ ┃ ┗ ━ ┛ __
;; =======================================================
CHAR.NULL = $00
CHAR.EOL = $01
CHAR.TREASURE_NAME = $02
CHAR.TREASURE_GIL = $03
CHAR.INN_CHARGE = $04
CHAR.PARTY_GIL = $05
CHAR.NOT_IMPL_06 = $06
CHAR.ALLY_NPC_NAME = $07
CHAR.CAPACITY = $08
;CHAR.PADDING_TO_EOL = $09
CHAR.HALF_LINE_FEED = $09
;CHAR.PAGING = $0a
CHAR.DRAW_HALF_LINE = $0a
CHAR.NOT_IMPL_0B = $0b
CHAR.LEADER_NAME = $0c
CHAR.UNKNOWN_0D = $0d
CHAR.NOT_IMPL_0E = $0e
CHAR.DUSTBOX = $0f
.ifdef _FEATURE_STOMACH_AMOUNT_1BYTE
CHAR_X.ITEM_AMOUNT_IN_STOMACH_1BYTE = $0e
.endif
;;
;;10-13: status of a player character. lower 2-bits represents an index of character.
CHAR.PLAYER1_PARAMS = $10 ;param = kind of parameter
CHAR.PLAYER2_PARAMS = $11 ;param = kind of parameter
CHAR.PLAYER3_PARAMS = $12 ;param = kind of parameter
CHAR.PLAYER4_PARAMS = $13 ;param = kind of parameter
;;14: left-align (tabulate) text by the parameter.
CHAR.SPACE_FILL = $14 ;param = fill length
;;15-17: left-align (tabulate) text by the parameter,
;;setup internal structure for later reference,
;;and increment the byte offset of end of menu-item. (stored at $78f1/79f1/7af1)
CHAR.SETUP_WINDOW1_MENUITEM = $15 ;; command dialog. (menu command, inn (yes/no), job, shop command)
CHAR.SETUP_WINDOW2_MENUITEM = $16 ;; target dialog. (magic, item) + shop offerings.
CHAR.SETUP_WINDOW3_MENUITEM = $17 ;; item dialog. (cast, use, equip, withdraw, sell)
CHAR.ITEM_NAME = $18 ;param = item_id (the name will be looked-up via $18:$8800)
CHAR.ITEM_NAME_IN_SHOP = $19 ;param = index into $7b80(shop items).
CHAR.ITEM_NAME_IN_MENU = $1a ;param: item index
CHAR.ITEM_NAME_IN_STOMACH = $1b ;;param: index in the stomach. (of fatty choccobo)
CHAR.ITEM_AMOUNT = $1c ;param: item index
CHAR.ITEM_AMOUNT_IN_STOMACH = $1d ;param: index in the stomach. (of fatty choccobo)
CHAR.JOB_NAME = $1e ;param: job_id
CHAR.JOB_CHANGE_COST = $1f ;param: job_id
CHAR.ITEM_NAME_IN_EQUIP_SELECTION = $20 ;param: item index
CHAR.ITEM_PRICE_IN_SHOP = $21 ;param: item index in the shop offerings list.
CHAR.ITEM_NAME_IN_TARGET = $22 ;param: item index. note: first byte of the name is skipped.
;;
CHAR.REPLACEMENT_BEGIN = $10 ;inclusive
CHAR.REPLACEMENT_END = $28 ;exclusive. ($28 = space)
;;
CHAR.SPACE = $28
;;
CHAR.NEED_COMPOSITION_END = $5c
CHAR.AVAILABLE_ONLY_IN_MENU_BEGIN = $70
;; ----------------------------------------------------------------------------
;; macros.
IS_PRINTABLE_CHAR .macro
.is_printable_char_\@:
;;[in]
;; u8 A: charcode, destructed on exit
;;[out]
;; bool carry: 1 = printable (not a replacement char), 0 = replacement.
sec
sbc #CHAR.REPLACEMENT_BEGIN
cmp #(CHAR.REPLACEMENT_END - CHAR.REPLACEMENT_BEGIN)
;; rts
.endm ;IS_PRINTABLE_CHAR
| 40.895833 | 103 | 0.576668 |
67273b29a73dc499a954f698791a6de030d5916c | 294 | asm | Assembly | libsrc/_DEVELOPMENT/alloc/obstack/c/sccz80/obstack_1grow_fast.asm | teknoplop/z88dk | bb03fbfd6b2ab0f397a1358559089f9cd3706485 | [
"ClArtistic"
] | 8 | 2017-01-18T12:02:17.000Z | 2021-06-12T09:40:28.000Z | libsrc/_DEVELOPMENT/alloc/obstack/c/sccz80/obstack_1grow_fast.asm | teknoplop/z88dk | bb03fbfd6b2ab0f397a1358559089f9cd3706485 | [
"ClArtistic"
] | 1 | 2017-03-06T07:41:56.000Z | 2017-03-06T07:41:56.000Z | libsrc/_DEVELOPMENT/alloc/obstack/c/sccz80/obstack_1grow_fast.asm | teknoplop/z88dk | bb03fbfd6b2ab0f397a1358559089f9cd3706485 | [
"ClArtistic"
] | 3 | 2017-03-07T03:19:40.000Z | 2021-09-15T17:59:19.000Z |
; void *obstack_1grow_fast(struct obstack *ob, char c)
SECTION code_clib
SECTION code_alloc_obstack
PUBLIC obstack_1grow_fast
EXTERN l0_obstack_1grow_fast_callee
obstack_1grow_fast:
pop af
pop de
pop hl
push hl
push de
push af
jp l0_obstack_1grow_fast_callee
| 13.363636 | 54 | 0.755102 |
ba8f6af08b07e7693469ff8fdf3fe7f56bec7560 | 24,643 | asm | Assembly | nrf_loader.asm | LabRat3K/nRFLoader | 38a4624b2237aaae64670930e638c4566a0f7b18 | [
"BSD-3-Clause"
] | null | null | null | nrf_loader.asm | LabRat3K/nRFLoader | 38a4624b2237aaae64670930e638c4566a0f7b18 | [
"BSD-3-Clause"
] | null | null | null | nrf_loader.asm | LabRat3K/nRFLoader | 38a4624b2237aaae64670930e638c4566a0f7b18 | [
"BSD-3-Clause"
] | null | null | null | ; -------------------------------------------------------------
; NRF Loader
; (c) 2019 Andrew Williams, Just Some Guy Productions.
;
; 16F1823
;
; CHANGELOG: Version 1 (underway)
; WHEN WHO WHY
; -------------------------------------------------------------
; 2022-04-15 ADW Race condition on BIND response - add a delay seems to work
; 2022-04-14 ADW Optimizations, and Fix the Audit (it wasn't working)
; 2022-03-27 ADW It works! (a 512 byte OTA bootloader!) (code tidy underway)
; 2021-02-20 ADW Clean-up.. and more clean-up. Remove the unused code and minimize.
; 2021-02-18 ADW Space saving - replace inline with function calls
; and remove uneeded "chip init" (leave that to the APP)
; To Do: Routine to read DevId from EEPROM
; Setup Radio for P2P from 1D<id:4> to 0xC0DEC1
; (Need to tell radio 3 byte addr)
; Attempt to send an "I am here with timeout/ACK" - ACK determined enter BL proper, or APP
;
; 2019-09-02 ADW New file
;
; ---
; 16F1823 SPI to NRF module Connections
;
; PORT PIN CONFIGURATION
; ==================================
; VCC 1 VCC
; A5 2 SPI_CE
; A4 3 PWM3
; A3/MCLR 4 MCLR
; C5 5 SERIAL DEBUG
; C4 6 SERIAL_DEBUG
; C3 7 SPI_CS
; C2 8 SPI_SDO
; C1 9 SPI_SDI
; C0 10 SPI_SCK
; A2 11 SPI_IRQ
; PGC/A1 12 PGC/PWM2
; PGD/A0 13 PGD/PWM1
; VSS 14 GND
;
;list p=16F1823 ; list directive to define processor
#include <p16f1823.inc> ; processor specific variable definitions
errorlevel -302 ; suppress message 302 from list file
; Configuration settings
__CONFIG _CONFIG1, _FOSC_INTOSC & _WDTE_OFF & _PWRTE_ON & _MCLRE_OFF & _CP_OFF & _CPD_OFF & _BOREN_ON & _CLKOUTEN_OFF & _IESO_OFF & _FCMEN_OFF
__CONFIG _CONFIG2, _WRT_BOOT & _PLLEN_ON & _STVREN_OFF & _BORV_LO & _LVP_ON
; NOTE: _WRT_BOOT - lock 0x000-0x1FFF from self-destruction (play it safe)
;
; ** NOTE - change MCLR_EN to MCLR_DIS after debugging completed.
; -------------------------
; User definable options
; -------------------------
#define USER_SPACE_START (0x0200)
#define USER_SPACE_SIZE (0x07FF - USER_SPACE_START)
;#define DISABLE_RESET
; ---------------------------------------------
; These defines will be BOARD specific
;
#define NRF_SPI_CS LATC,3
#define NRF_CE LATA,5 ; LATC,4
; ------------------------------------------------------------------------------
; ------------------------------------------------------------------------------
; System definitions - Users should not be messing below this line.
; (I know you will.. we always do)
;
#define BOOTLOADER_VERSION 0x04 ; <Major>.<Minor> release
#define CLOCKRATE 32000000
#define PAYLOAD_SIZE 32
; --------------------------
; Bank 0 Memory : 80 bytes
; --------------------------
CBLOCK 0x20
; Values read from NRF Packet
rxpayload:PAYLOAD_SIZE
; Used During Device Init
TXADDR:3
; -- The follow block is a cached copy from the EEPROM
; [0-2] Device ID - 24-bit unique identifier
RXADDR:3
; [3]Device Type 0=16F1823 1=16f1825
DEVTYPE
; [4]Bootloader Version
BL_VERSION
; [5]Application Identifier
APP_MAGIC
; [6]Application Version Identifier
APP_VERSION
; [7]..[8] Configuration Parameter
START_CHL
START_CHH
; [9]..[10]Filespace 0x200.. Checksum Range
; Note: 16 word ROWS for checksum calc
APP_SIZEL
APP_SIZEH
; [11]..[12] 16-bit checksum value
APP_CSUML
APP_CSUMH
; [13] NRF RF CHAN config parameter
APP_RFCHAN
end_bank0_vars:0
ENDC
if end_bank0_vars > 0x6F
error "Bank 20 Variable Space overrun"
endif
; --------------------------
; Bank 1 Memory : 32 bytes
; --------------------------
CBLOCK 0xA0
end_bank1_vars:0
ENDC
if end_bank1_vars > 0xBF
error "Bank A0 Variable Space overrun"
endif
; --------------------------
; Global Bank Memory : 16 bytes (all banks)
; --------------------------
CBLOCK 0x70
; Common memory page
; Debugger uses 0x70 - put a dummy value here for now.
dummyData
; local variable to hold value being written to the NRF register
nrfTempByte
; count bytes in the tx or rx transaction
nrfByteCount
; local copy of the nrf STATUS register
nrfStatus
BL_TEMP
BL_CMD
BL_CALC_SUML ; Working copy of the checksum
BL_CALC_SUMH ; Should SUM to 0x0000 when completed
BL_SIZE_L ; Working copy that can be decremented until 0
BL_SIZE_H
BL_WAIT_COUNT ; Countdown value as boot loader determines when to
; test/launch the APPLICATION
nrfTempAA
nrfTempRX
end_bank_global_vars:0
ENDC
if end_bank_global_vars > 0x7F
error "Global Variable Space overrun"
endif
; ------------------------------
; Linear Memory Map
; ------------------------------
CBLOCK 0x2000
; This is a linear mapping of all 112 bytes (80 + 32)
ENDC
if end_bank_global_vars > 0x29AF
error "Linear Map Variable Space overrun"
endif
; NRF Register Definitions
#include "nrf_header.inc"
; NRF Read/Write MACROS
#include "nrf_macros.inc"
; ==================
; -- Main Program --
; ==================
ORG 0x000
clrf PCLATH
goto BL_INIT
ORG 0x004
; -------Interrupt Routine --------------------
BL_IRQ_HANDLER
goto APP_IRQ_HANDLER ; Note: NO IRQ handler in the BootLoader
; ---------- Main Program Starts Here ----------------------------
; BootLoader - Main Loop
; Address has been broadcast to the server
; Loop waiting for incomming NRF packets
; Count down BL_WAIT_COUNT iterations of TMR1 rolling over
; - and then do an AUDIT check
;
; If Audit check passes - Jump to application
; If Audit fails - reset the board
;
BL_MAIN_LOOP
BANKSEL PIR1 ; BANK 0
; Count # times TMR1 rolls over, then do an audit
btfss PIR1,TMR1IF
goto _check_nrf_network
bcf PIR1,TMR1IF
decfsz BL_WAIT_COUNT,F
goto _check_nrf_network
; Timeout
call sub_bl_audit ; Call the CSUM routine
btfss WREG,0 ; WREG contains result of the AUDIT
goto BL_CMD_RESET ; 1=CSUM failure... reset and try again
goto APP_EVENT_HANDLER ; 0=CSUM pass...hand off the APPLICATION
_check_nrf_network
call BL_NRF_HDLR
goto BL_MAIN_LOOP
BL_NRF_HDLR
nrfReadReg NRF_STATUS ; BSR=0
; WARNING - this method is *NOT* the proper way. Race condition can result
; in this bit not being set. Instead need to check if the pipe# (se arduino RF24.cpp)
movwf nrfStatus ; POLL NRF for the Rx of payload
btfss nrfStatus,6
retlw 0x00 ; Repeat Ad Absurdum.
; NRF Packet has been received in the queue
nrfReadPayload rxpayload, PAYLOAD_SIZE ; Read the 32 byte payload
nrfWriteRegL NRF_STATUS, 0x40 ; Clear the RX interrupt flags
; Check the pipe index was 0x01
lsrf nrfStatus,w
andlw 0x07 ; w contains the pipe index...
; only receive on Pipe 1 - ignore others
decfsz WREG,W
retlw 0x01 ; Continue listening
; Appears to be a valid BL packet - reset the timer counter
clrf BL_WAIT_COUNT
BANKSEL rxpayload
;; Based on the CMD byte .. take action (is the upper nibble 0x8n?
movfw rxpayload
andlw 0xF0
xorlw 0x80
btfss STATUS,Z
retlw 0x02 ; Invalid content.. ignore packet and keep listening
movfw rxpayload ; Loop at the lower nibble to determine payload type
clrf PCLATH ; Note: JUMP table - must be kept in the same code page
andlw 0x07
addwf PCL,F
; --- jumptable ---
goto BL_CMD_START ; 0x80 CMD_START
goto BL_CMD_WRITE ; 0x81 CMD_WRITE
goto BL_CMD_COMMIT ; 0x82 CMD_COMMIT
goto BL_CMD_AUDIT ; 0x83 CMD_AUDIT
goto BL_CMD_HEART ; 0x84 CMD_HEARTBEAT
goto BL_CMD_QRY ; 0x85 Re-enable RX mode
goto BL_CMD_RESET ; 0x86 CMD_BOOT
goto BL_CMD_BIND ; 0x87 CMD_BCAST
; --- END OF THE MAIN LOOP
; -----------------------------------------------------------------------
; -----------------------------------------------------------------------
;;----------
BL_CMD_BIND
; Server requests AutoAck Pipe (address in payload)
; 0x87,<DevId0>,<DevId1>,<DevId2>,<Addr0>,<Addr1>,<Addr2>
; Check for address match
movfw RXADDR ; Test Byte 0
xorwf rxpayload+1,W
btfss STATUS,Z ; if matched, keep going
retlw 0x02
xorwf RXADDR+1,W ; Test Byte 1
xorwf rxpayload+2,W
btfss STATUS,Z ; if matched, keep going
retlw 0x02
xorwf RXADDR+2,W ; Test Byte 2
xorwf rxpayload+3,W
btfss STATUS,Z ; Addressed to me?
retlw 0x02
; All three matched, use the P2P address
nrfWriteRegEx NRF_RX_ADDR_P0, rxpayload+4, 3
nrfWriteRegEx NRF_TX_ADDR, rxpayload+4, 3
; Race Condition? - need a delay so we don't reply back before
; Server is ready (or is it the radio isn't ready?)
call delay_130us
bsf nrfTempAA,1
nrfWriteReg NRF_EN_AA, nrfTempAA ; BSR=2
goto _reply_ack ;P2P confirmation BL_MAIN_LOOP
;;----------
BL_CMD_AUDIT
; AUDIT request - verify image checksum
; 0x83,<StartAddrL>,<StartAddrH>,<ImageSizeL>,<ImageSizeH>,<CSUML>,<CSUMH>,<WRITE_REQUEST>
;
; Note: WRITE_REQUEST bit is ignored at this time. If the CSUM matches, the content is
; written to the EEPROM
; Begin bt copying the SIZE and CSUM values to the APP values in RAM,
; Then re-use the 'sub_bl_audit' routine
; If success, then write the SIZE/CSUM into EEPROM
BANKSEL rxpayload
movfw rxpayload+3
movwf APP_SIZEL
movfw rxpayload+4
movwf APP_SIZEH
movfw rxpayload+5
movwf APP_CSUML
movfw rxpayload+6
movwf APP_CSUMH
call sub_bl_audit ; invoke the CSUM routine - results stored in W
decfsz WREG,W ; 1 = success (csum matched)
goto _reply_nack ; 0 = failure (mismatch)
call sub_write_csum
goto _reply_ack ; Return AUDIT results to the caller.
sub_bl_audit
BANKSEL APP_CSUML
movfw APP_CSUML ; Seed the CSUM calculation to the TEMP copy registers
movwf BL_CALC_SUML
movfw APP_CSUMH
movwf BL_CALC_SUMH
movfw APP_SIZEL
movwf BL_SIZE_L
movfw APP_SIZEH
movwf BL_SIZE_H
BANKSEL EEADRL
clrf EEADRL ; Setup to read from the FLASH code space
movlw HIGH USER_SPACE_START
movwf EEADRH
call sub_calcsum ; Zero bit indicates pass/fail
btfss STATUS,Z
retlw 0x00 ; Return 0 = failed CSUM
retlw 0x01 ; Return 1 = passed CSUM
sub_calcsum ; THE CSUM LOOP - both a subroutine, and a loop target
_csum_loop
movlw (1<<EEPGD)|(1<<RD) ;Read from FLASH CODE space
movwf EECON1
NOP
NOP
movfw EEDATL ; Read LOW value of word at EEADR
addwf BL_CALC_SUML,F ; Add to CSUM - handling roll over
btfsc STATUS,C
incf BL_CALC_SUMH,F
movfw EEDATH ; Add HIGH value of word at EEADR
addwf BL_CALC_SUMH,F
incf EEADRL,F ; Increment EEADR to next WORD
btfsc STATUS,Z
incf EEADRH,F
movfw BL_SIZE_L ; Decrement the WORD count
btfsc STATUS,Z ; Check the carry bit
decf BL_SIZE_H,F
decf BL_SIZE_L,F
movfw BL_SIZE_L ; Check if both SIZEL & SIZEH are zero
iorwf BL_SIZE_H, W ; by ORing the 2 bytes into W
btfss STATUS,Z ; and check for Z bit
goto _csum_loop
; Finished looping through CODE space
movfw BL_CALC_SUMH ; Similar - OR the CSUMH&CSUML
iorwf BL_CALC_SUML,W ; 0 = CSUM passed
return ; !0 = CSUM failed
;;----------.
BL_CMD_RESET
; RESET request -
; 0x86
;
#ifdef DISABLE_RESET
retlw 0x00
#else
reset
#endif
;; ----------
BL_CMD_START
; START - first of 3 messages required to write a ROW of FLASH CODE space.
; 0x80,<AddrL>,<AddrH>,<ERASE>
;
; Reset the CSUM calculation for this row, and
; erases the ROW of words at the specified address.
clrf BL_CALC_SUML ; Clear the calculated CHECKSUM
movfw rxpayload+NRF_BL_START_ERASE
movwf BL_CMD ; Store for analysis after the BANKSEL
movfw rxpayload+NRF_BL_START_ADRL
movwf BL_TEMP ; Store for use after the BANKSEL
movfw rxpayload+NRF_BL_START_ADRH
banksel EEADRL ; BSR=3
movwf EEADRH ; Setup the EEADR registers (row to erase)
movfw BL_TEMP
movwf EEADRL
; do we need to erase?
btfss BL_CMD,0 ; If the lower bit is SET, erase first
goto _reply_ack
; Erases the row of flash in PMADRH:PMADRL.
; BSR=3
_bl_erase ; From the Microchip 16F1823 data sheet
bsf EECON1,EEPGD ; Point to program memory
bcf EECON1,CFGS ; Not configuration space
bsf EECON1,FREE ; Specify an erase operation
bsf EECON1,WREN ; Enable writes
call UNLOCK_FLASH ; stalls until erase finishes
bcf EECON1,WREN ; clear write enable flag
goto _reply_ack
;; ----------
BL_CMD_WRITE
; 0x81,<15 words>
; Copies the incoming data into the EEADR latch , keeping a running CSUM for
; validation during the COMMIT command. (Note COMMIT will call into the
; internal _wloop entry point, for 1 of the remaining 2 words, then verify
; the CSUM for the last word. If it passes, it will commit the last word
; and the overall FLASH write)
;
; If the value in the temp register is 0 after all 32/64 bytes have been copied
; to the write latches, proceed with the write.
movlw LOW rxpayload+NRF_BL_WRITE_START ; Load FSR0 to point to the start of the payload
movwf FSR0L
movlw HIGH rxpayload
movwf FSR0H
movlw (1<<EEPGD) | (1<<LWLO)|(1<<WREN) ; write to latches only
banksel EECON1
movwf EECON1
; simultaneously compute the checksum of the 16/32 words and copy them to the
; write latches
movlw 15 ; number of words to write
movwf BL_TEMP ; used for loop count
call sub_wloop
goto _reply_ack ; When completed, send a reply to the server
_wloop_with_incr ; Note: outside of the apparent function. only increment if we are going back into the loop
incf EEADRL,f ; increment write address - note we might exit pointing to last byte written
sub_wloop
moviw FSR0++ ; load lower byte
addwf BL_CALC_SUML,f ; add lower byte to checksum
movwf EEDATL ; copy to write latch
moviw FSR0++ ; load upper byte
addwf BL_CALC_SUML,f ; add upper byte to checksum
movwf EEDATH ; copy to write latch
call UNLOCK_FLASH ; execute unlock sequence
; may still have more words to go
decfsz BL_TEMP,f ; decrement loop count
; if 0, we're done writing for this payload
goto _wloop_with_incr
return
;; ----------
BL_CMD_COMMIT
; 0x82,<??>,<CSUM>,<DATAL>,<DATAH>
;
; Write the final words (with CSUM validation), triggering the FLASH write.
; Note COMMIT will call into the internal sub_wloop_with_incr entry point,
; for the remaining words, then verify the CSUM.
; If it passes, it will commit the overall FLASH write)
movlw LOW rxpayload+NRF_BL_COMMIT_DATA ; Load FSR0 to point to the start of the payload
movwf FSR0L
movlw HIGH rxpayload
movwf FSR0H
movfw rxpayload+NRF_BL_CKSUM ; Load FSR0 to point to the start of the payload
addwf BL_CALC_SUML,f
banksel EECON1
; Write the LAST WORD(s)
movlw 1 ; Will be 2 for the 16f1825
movwf BL_TEMP
call _wloop_with_incr
tstf BL_CALC_SUML ; verify the checksum (should sum to 0)
skpz
goto _commit_fail ; if there's a mismatch, abort the write
; checksum is valid, write the data
bcf EECON1,LWLO
call UNLOCK_FLASH ; stalls until write finishes
movlw 0x01
_commit_exit
bcf EECON1,WREN ; Disable Writes
clrf EECON1
goto _bl_reply
_commit_fail ; if jumping to here WREG !=0
clrw ; set WREG to 0x00
goto _commit_exit
;; ----------
UNLOCK_FLASH
; From the Microship 16F1823 data sheet
; Executes the flash unlock sequence, performing an erase or write.
movlw 0x55 ; Start of required sequence to initiate erase
movwf EECON2 ; Write 55h
movlw 0xAA
movwf EECON2 ; Write AAh
bsf EECON1,WR ; Set WR bit to begin erase
nop ; Any instructions here are ignored as processor
; halts to begin erase sequence
nop ; Processor will stop here and wait for erase complete.
return
;;-----------
BL_CMD_HEART
_reply_ack
movlw 0x01 ; Put 0x01 in the payload
goto _bl_reply
_reply_nack
clrf WREG ; Put 0x00 in the payload
_bl_reply ; Send the ACK packet back to the server
; WREG contains status to write into byte[1]
; 0x00 - success
; 0x01 - fail (NACK)
BANKSEL rxpayload
; This is a P2P message, so enable AutoAck for PIPE0
movwf rxpayload+1
bsf nrfTempAA,0
nrfWriteReg NRF_EN_AA, nrfTempAA ;nrfTempByte ; BSR=2
goto SEND_PAYLOAD ; Re-use a common SEND routine
; --- BOOT LOADER START
BL_INIT
; Init the Chip (incl SPI)
; Init the NRF Registers (via SPI)
; Start Listening <-- should be attempting to determine if the NRF upgrade server is out there
; --- Initialize pins, oscillator, etc -----
; BANK 0 Register INIT
BANKSEL PORTA
movlw 0x7D
movwf T1CON
; BANK 2 Register INIT
BANKSEL LATC
clrf LATA ; All LATA Pins off
clrf LATC
bsf NRF_SPI_CS ; Default to HIGH (active LOW)
bcf NRF_CE ; NRF CE - standby mode
; BANK 1 Register INIT
BANKSEL WDTCON
; bcf WDTCON,0 ; turn off WDT
; We are going to want a Watchdog here, to ensure recovery of failing devices
movlw 0xF0 ; setup internal oscillator
movwf OSCCON ; 32Mhz (8Mhz internal oscillator, 4xPLL )
movfw OSCSTAT
btfss OSCSTAT,PLLR ; Wait for OSCILLATOR to stabilize
goto $-2
clrf TRISA ; outputs:PWM 0,1,4
bsf TRISA,2 ; SPI_IRQ - INPUT
movlw 0x02 ; outputs:CS, SDO, NRF_CE
movwf TRISC ; inputs: SDI
movlw 0x08 ; Enable internal pull-ups, Interrupt on Falling edge
movwf OPTION_REG ; No Prescalar for the TMR0 clock
; BANK 3 Register INIT
BANKSEL ANSELA ; BANK3
clrf ANSELA ; Turn off A/D Converters
clrf ANSELC
; BANK 4 Register INIT (SPI)
BANKSEL SSP1STAT
bcf SSP1STAT,SMP ; Sample in the middle
bsf SSP1STAT,CKE ; from online example with RFM12B
movlw 0x01 ; Go for divide by 8 = 4Mhz clock
movwf SSP1ADD
movlw 0x2A ; Mode 0,0 = CKE=1 CKP=0
movwf SSP1CON1 ; Select SPI clock and enable SSP
; --- RAM Init section ------
; copy EEPROM data to RAM Cache
call BL_POPULATE_CACHE ; Call to read EEPROM data into page 0 variables
; --- Global Parameters
clrf nrfStatus
clrf nrfByteCount
clrf nrfTempByte
clrf BL_WAIT_COUNT
clrf nrfTempAA
; --- NRF Radio Register Init section ------
; Set AUTO_ACK, 0x00 - no P2P setup yet
nrfWriteReg NRF_EN_AA, nrfTempAA ; nrfTempByte
; Set Data Rate - 2MBPS(default) & HIGH Power
nrfReadReg NRF_RF_SETUP ; Results left in W
iorlw 0x06
movwf nrfTempByte
nrfWriteReg NRF_RF_SETUP, nrfTempByte
; Set STATUS, RX_DR | TX_DS | MAX_RT
nrfWriteRegL NRF_STATUS, 0x70
; Set RF_CH, 82 (avoid WIFI interference (we hope))
nrfWriteRegL NRF_RF_CH, 82
nrfFlush NRF_FLUSH_TX ; Flush Tx
; Set CRC Length -
nrfWriteRegL NRF_CONFIG, 0x7E ; CRC0 | EN_CRC | PWR_UP
; Setup for 3 byte address length
nrfWriteRegL NRF_SETUP_AW, 0x01
; Write the payload size for Pipe 0 & 1
movlw PAYLOAD_SIZE
movwf nrfTempByte
nrfWriteReg NRF_RX_PW_P0, nrfTempByte
nrfWriteReg NRF_RX_PW_P1, nrfTempByte
BANKSEL RXADDR ; Address for default Server is C0DEC1
movlw 0xC0
movwf TXADDR+2 ;TxAddr = C0DEC1
movlw 0xDE
movwf TXADDR+1
movlw 0xC1
movwf TXADDR+0
nrfWriteRegEx NRF_TX_ADDR, TXADDR, 3
nrfWriteRegEx NRF_RX_ADDR_P0, TXADDR, 3
nrfWriteRegEx NRF_RX_ADDR_P1, RXADDR, 3
; Setup max number of retries
nrfWriteRegL NRF_SETUP_RETR, 0x0F
call BL_CMD_QRY
goto BL_MAIN_LOOP
;--- End of NRF Register INIT ------
BL_CMD_QRY
;--- Broadcast an "I am Here" message to the Server ----
; Announce to Server 0x87, <RXADD:3>
;LabRat - should change this to 0x88 - so that other clients
; Will ignore it.
BANKSEL rxpayload
movlw 0x88
movwf rxpayload
clrf FSR0H
movlw LOW rxpayload+1
movwf FSR0L
call _read_eeprom ; BSR=3
; Enqueue the payload in the Tx Register
; Place BootLoader version from CODE in the message
BANKSEL rxpayload
movlw BOOTLOADER_VERSION
movwf rxpayload+(BL_VERSION-RXADDR)+1
SEND_PAYLOAD
BANKSEL LATA
bcf NRF_CE
; Turn on Radio in Tx Mode
nrfReadReg NRF_CONFIG ; Results left in W
bcf WREG,0 ; SET PRIM_TX
movwf nrfTempByte
nrfWriteReg NRF_CONFIG, nrfTempByte
call delay_130us
nrfFlush NRF_FLUSH_RX ; Flush Rx
; Enable RXADDR for Pipe0 & 1
movlw 0x03
iorwf nrfTempRX,F
nrfWriteReg NRF_EN_RXADDR, nrfTempRX
nrfWritePayload 0xA0, rxpayload,PAYLOAD_SIZE
_triggerXmit
;Clear any pending flags
nrfWriteRegL NRF_STATUS, 0x70 ; BSR=2
; NRF requires CE for at least 10us
bsf NRF_CE ; Enable Transmitter
movlw 32 ; Scoped at 12 us
decfsz WREG,f ; 8 instructions to make a 10us spin (@ 32Mhz)
goto $-1
bcf NRF_CE
; w4ack - poll the NRF_STATUS unti the TX_DS flag is set
; Note: for Broadcast this is set when the transmit completes, for P2P this is set
; when we get an ACK from the far end. (If no far end this will never get set)
w4ack
nrfReadReg NRF_STATUS
btfsc WREG,5 ; TX_DS flag
goto _ack_done
btfss WREG,4 ; MAX_RT flag
goto w4ack
_handle_max_rt
bsf WREG,4 ; Write a 1 to clear the bit
movwf nrfTempByte
nrfWriteReg NRF_STATUS, nrfTempByte
; Toggle the CE to try and send again..
goto _triggerXmit
_ack_done
; Move Radio into LISTEN mode
nrfReadReg NRF_CONFIG ; Results left in W
bsf WREG,0
movwf nrfTempByte
nrfWriteReg NRF_CONFIG, nrfTempByte ; BSR=2
; Disable RXADDR for Pipe0
; bcf nrfTempRX,0
; nrfWriteReg NRF_EN_RXADDR, nrfTempRX
nrfWriteRegL NRF_STATUS, 0x20 ; Clear the TX_DS bit
;Start receiving
bsf NRF_CE ; From standby into Listening Mode
call delay_130us
retlw 0x04
delay_130us
movlw 216 ; 208=130us, 216=136us
goto $+1 ; Two cycles
decfsz WREG,F
goto $-2
return
; ===============================================
; End of Main BootLoader Loop
; ===============================================
; ------------------------------------------------------------
; NRF/SPI read/write routines
; ------------------------------------------------------------
; W contains register to read
_nrfReadReg
call _nrf_cmd_setup
BANKSEL SSP1BUF
clrf SSP1BUF ; Write 0x00 in order to clock out another byte
btfss SSP1STAT,BF ; Loop until BF (Buffer FULL) status
goto $-1
call _pir_spin
BANKSEL SSP1BUF
movf SSP1BUF,W ; Copy results to output address (W)
_nrf_cmd_done
BANKSEL LATC
bsf NRF_SPI_CS ; Set the CS
return
; ----
; W- contains regId, FSR1 points to the value to write
_nrfWriteReg
call _nrf_cmd_setup
BANKSEL SSP1BUF
movfw FSR1H ; Now clock out the parameter byte
movwf SSP1BUF
call _pir_spin
goto _nrf_cmd_done
; ----
; W has the command to send
_nrfFlush
call _nrf_cmd_setup
goto _nrf_cmd_done
; ----
; W contains the regId, FSR0 the srcAddr, and nrfByteCount the numBytes
_nrfWriteRegEx
call _nrf_cmd_setup
; Time to clock out the bytes
BANKSEL SSP1BUF
moviw FSR0++ ; Copy byte from source address
movwf SSP1BUF ; Write byte to the SPI interface
call _pir_spin
decfsz nrfByteCount,f ; Decrement the number to send.. loop if not done
goto $-5 ; Jump back to BANKSEL SSP1BUF
goto _nrf_cmd_done
; ----
_pir_spin
BANKSEL PIR1
btfss PIR1, SSP1IF ; Loop until SPI IRQ completed
goto $-1
bcf PIR1, SSP1IF ; Clear the interrupt
return
; ----
_nrf_cmd_setup
BANKSEL LATC
bcf NRF_SPI_CS ; Clear the CS
BANKSEL SSP1BUF
movwf SSP1BUF ; Hand the WriteREGID command to the SPI interface
BANKSEL PIR1
btfss PIR1, SSP1IF ; Loop until SPI IRQ completed
goto $-1
bcf PIR1, SSP1IF ; Clear the interrupt flag
return
; ------------------------------------------------------------
; EEPROM read (retrieve Device ID)
; ------------------------------------------------------------
BL_POPULATE_CACHE
clrf FSR0H ; BANK 0 variables
movlw LOW RXADDR
movwf FSR0L ; Point to ID_HIGH
_read_eeprom
movlw 0x10
movwf BL_TEMP ; # bytes to read
BANKSEL EEADRL ; Start reading at 0xF000
clrf EEADRL
_ee_id_clock
bcf EECON1, CFGS ; Deselect Config space
bcf EECON1, EEPGD ; Point to DATA memory
bsf EECON1, RD ; EE Read
movf EEDATL, W ; W contains the value
movwi FSR0++ ; Write to target & continue
incf EEADRL,f
decfsz BL_TEMP,f
goto _ee_id_clock
return
sub_write_csum
movlw rxpayload+3
movwf FSR0L
movlw 4 ;# bytes to copy
movwf BL_TEMP
BANKSEL EEADRL
movlw (APP_SIZEL-RXADDR) ; Offset in the EEPROM
movwf EEADRL
sub_write_csum_loop
WRITE_TO_FLASH
moviw FSR0++
movwf EEDATL
clrf EECON1
bsf EECON1, WREN ; EE Read
call UNLOCK_FLASH
bcf EECON1, WREN
btfsc EECON1,WR
goto $-2
incf EEADRL,f
decfsz BL_TEMP,f
goto sub_write_csum_loop
return
EndofData:
; dt "(c) 2022 Andrew Williams"
;===================================================
; Application (loaded) space.
ORG 0x200
APP_EVENT_HANDLER
goto BL_MAIN_LOOP
ORG 0x204
APP_IRQ_HANDLER
retfie
; ----------------- end! -------
END
| 27.939909 | 145 | 0.675729 |
cd7b5dd157723ef26a41a7f289fb51032ab21929 | 1,110 | asm | Assembly | programs/oeis/276/A276598.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/276/A276598.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/276/A276598.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A276598: Values of n such that n^2 + 3 is a triangular number (A000217).
; 0,5,30,175,1020,5945,34650,201955,1177080,6860525,39986070,233055895,1358349300,7917039905,46143890130,268946300875,1567533915120,9136257189845,53250009223950,310363798153855,1808932779699180,10543232880041225,61450464500548170,358159554123247795,2087506860238938600,12166881607310383805,70913782783623364230,413315815094429801575,2408981107782955445220,14040570831603302869745,81834443881836861773250,476966092459417867769755,2779962110874670344845280,16202806572788604201301925,94436877325856954862966270,550418457382353124976495695,3208073866968261794996007900,18698024744427217644999551705,108980074599595044075001302330,635182422853143046805008262275,3702114462519263236755048271320,21577504352262436373725281365645,125762911651055355005596639922550,732999965554069693659854558169655,4272236881673362806953530709095380,24900421324486107148061329696402625,145130291065243280081414447469320370,845881325066973573340425355119519595
mov $1,5
lpb $0
sub $0,1
add $1,$2
add $2,$1
add $2,$1
add $1,$2
lpe
mov $0,$2
div $0,2
| 79.285714 | 935 | 0.888288 |
443ce49d03ff094d1376eee10c478d2d3320f652 | 394 | asm | Assembly | asm/testy.asm | icefoxen/lang | 628185020123aabe4753f96c6ab4378637a2dbf5 | [
"MIT"
] | null | null | null | asm/testy.asm | icefoxen/lang | 628185020123aabe4753f96c6ab4378637a2dbf5 | [
"MIT"
] | null | null | null | asm/testy.asm | icefoxen/lang | 628185020123aabe4753f96c6ab4378637a2dbf5 | [
"MIT"
] | null | null | null | mov eax, 3 ; 668b 0300 00 --little-endian, least-byte first.
mov ebx, 4
mov ecx, 6
mov edx, 7
mov ecx, eax
mov si, ax ; ax is the lower 16 bits of eax, remember.
add eax, 12 ; eax += 12
add ebx, 18
sub eax, ebx
inc ebx ; ebx++
dec si ; si--
foo equ 0 ; Directive - defines a symbol
%define BAR 100 ; Directive - defines a macro.
add eax, foo ; add eax, 0
mov edx, BAR ; mov edx, 100
| 20.736842 | 62 | 0.647208 |
c772c72bad485d333ea2822f525827759fad550a | 440 | asm | Assembly | oeis/028/A028136.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/028/A028136.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/028/A028136.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A028136: Expansion of 1/((1-4x)(1-6x)(1-8x)(1-10x)).
; Submitted by Jon Maiga
; 1,28,500,7280,94416,1138368,13069120,144981760,1569049856,16674065408,174788490240,1813347594240,18663674269696,190917377179648,1943653403279360,19713779492126720,199364213335719936
mov $1,1
mov $2,$0
mov $3,$0
lpb $2
mov $0,$3
sub $2,1
sub $0,$2
seq $0,19483 ; Expansion of 1/((1-4x)(1-6x)(1-10x)).
sub $0,$1
mul $1,9
add $1,$0
lpe
mov $0,$1
| 24.444444 | 183 | 0.690909 |
5f8e277d830e5eac066e99fe7b36ca522a78b59e | 475 | asm | Assembly | Engine Hacks/SuspendDebuffs/asm/Debuffs/New Initializer.asm | sme23/MekkahRestrictedHackComp1 | 1cc9d2fec557424f358b6bfa21f9f3bb6faf2978 | [
"CC0-1.0"
] | 3 | 2020-06-15T14:22:38.000Z | 2020-06-28T19:44:52.000Z | Wizardry/DependencyHacks/Debuffs/asm/Debuffs/NewInitializer.s | sme23/Smefile | 24a90acff5d652f0619b896b5498042fbbdd69ff | [
"CC0-1.0"
] | null | null | null | Wizardry/DependencyHacks/Debuffs/asm/Debuffs/NewInitializer.s | sme23/Smefile | 24a90acff5d652f0619b896b5498042fbbdd69ff | [
"CC0-1.0"
] | null | null | null | .thumb
ldr r0, AdditionalDataTable
ldrb r1, [r5, #0xB] @Deployment number
lsl r1, #0x3 @*8
add r0, r1
mov r1, #0x00
str r1, [r0] @Clear out the first eight bytes
str r1, [r0, #0x4]
@Code that we replaced to jump here
ldrb r0,[r6,#0x3] @Level
lsr r0,r0,#0x3
strb r0,[r5,#0x8]
mov r1,r5
add r1,#0x10 @Hidden statuses (e.g. Afa's drops)
mov r2,r5
bx lr
AdditionalDataTable:
@Handled in installer
| 21.590909 | 61 | 0.585263 |
227b243a2bc8e99a824524116deb959552b265db | 993 | asm | Assembly | sk/sfx/D7.asm | Cancer52/flamedriver | 9ee6cf02c137dcd63e85a559907284283421e7ba | [
"0BSD"
] | 9 | 2017-10-09T20:28:45.000Z | 2021-06-29T21:19:20.000Z | sk/sfx/D7.asm | Cancer52/flamedriver | 9ee6cf02c137dcd63e85a559907284283421e7ba | [
"0BSD"
] | 12 | 2018-08-01T13:52:20.000Z | 2022-02-21T02:19:37.000Z | sk/sfx/D7.asm | Cancer52/flamedriver | 9ee6cf02c137dcd63e85a559907284283421e7ba | [
"0BSD"
] | 2 | 2018-02-17T19:50:36.000Z | 2019-10-30T19:28:06.000Z | Sound_D7_Header:
smpsHeaderStartSong 3
smpsHeaderVoice Sound_D7_Voices
smpsHeaderTempoSFX $01
smpsHeaderChanSFX $01
smpsHeaderSFXChannel cFM3, Sound_D7_FM3, $00, $06
; FM3 Data
Sound_D7_FM3:
smpsSetvoice $00
smpsModSet $01, $01, $CB, $16
Sound_D7_Loop00:
dc.b nC0, $0B, $0B
smpsContinuousLoop Sound_D7_Loop00
smpsStop
Sound_D7_Voices:
; Voice $00
; $F9
; $20, $30, $12, $30, $13, $1A, $1F, $0F, $05, $18, $09, $02
; $0B, $1F, $10, $05, $1F, $2F, $4F, $2F, $0D, $8C, $03, $80
smpsVcAlgorithm $01
smpsVcFeedback $07
smpsVcUnusedBits $03
smpsVcDetune $03, $01, $03, $02
smpsVcCoarseFreq $00, $02, $00, $00
smpsVcRateScale $00, $00, $00, $00
smpsVcAttackRate $0F, $1F, $1A, $13
smpsVcAmpMod $00, $00, $00, $00
smpsVcDecayRate1 $02, $09, $18, $05
smpsVcDecayRate2 $05, $10, $1F, $0B
smpsVcDecayLevel $02, $04, $02, $01
smpsVcReleaseRate $0F, $0F, $0F, $0F
smpsVcTotalLevel $00, $03, $8C, $0D
| 26.131579 | 62 | 0.620342 |
411701b5ebc3e09332378939bbf3c7f8f4dc89e2 | 753 | asm | Assembly | oeis/281/A281661.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/281/A281661.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/281/A281661.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A281661: The least common multiple of 1 + n^2 and 1 + n^3.
; 1,2,45,140,1105,1638,8029,8600,33345,29930,101101,81252,250705,186830,540765,381488,1052929,712530,1895725,1241660,3208401,2046902,5164765,3224520,7977025,4890938,11899629,7184660,17233105,10268190,24327901,14329952,33588225,19586210,45475885,26282988,60514129,34697990,79291485,45142520,102465601,57963402,130767085,73544900,165003345,92310638,206062429,114725520,254916865,141297650,312627501,172580252,380347345,209173590,459325405,251726888,550910529,300940250,656555245,357566580,777819601
mov $1,$0
pow $1,2
mov $2,$0
trn $3,$0
sub $0,$1
add $3,1
sub $2,$3
add $2,2
mov $4,$0
sub $0,$3
mul $0,$2
dif $0,2
sub $3,2
mul $3,$4
add $2,$3
mul $2,$0
mov $4,1
add $4,$0
sub $0,$4
mul $0,$2
| 31.375 | 496 | 0.762284 |
49aa92119194d61d6f796d7ff197e17e4bed713b | 435 | asm | Assembly | libsrc/_DEVELOPMENT/math/float/math48/z80/am48_dmul.asm | meesokim/z88dk | 5763c7778f19a71d936b3200374059d267066bb2 | [
"ClArtistic"
] | null | null | null | libsrc/_DEVELOPMENT/math/float/math48/z80/am48_dmul.asm | meesokim/z88dk | 5763c7778f19a71d936b3200374059d267066bb2 | [
"ClArtistic"
] | null | null | null | libsrc/_DEVELOPMENT/math/float/math48/z80/am48_dmul.asm | meesokim/z88dk | 5763c7778f19a71d936b3200374059d267066bb2 | [
"ClArtistic"
] | null | null | null |
SECTION code_fp_math48
PUBLIC am48_dmul
EXTERN mm48_fpmul
; compute AC' = AC * AC'
;
; enter : AC'= double x
; AC = double y
;
; exit : AC = double y
;
; success
;
; AC'= x*y
; carry reset
;
; fail if overflow
;
; AC'= +-inf
; carry set, errno set
;
; uses : af, af', bc', de', hl'
defc am48_dmul = mm48_fpmul
| 15.535714 | 35 | 0.445977 |
628aa4e131c11f2f6c8fe2c0c7b9955902008747 | 3,123 | asm | Assembly | src/Native/Runtime/i386/CallDescrWorker.asm | kouvel/corert | c6af4cfc8b625851b91823d9be746c4f7abdc667 | [
"MIT"
] | 3,223 | 2015-11-18T16:04:48.000Z | 2022-03-25T14:40:43.000Z | src/Native/Runtime/i386/CallDescrWorker.asm | kouvel/corert | c6af4cfc8b625851b91823d9be746c4f7abdc667 | [
"MIT"
] | 4,032 | 2015-11-18T15:44:29.000Z | 2020-11-01T06:32:44.000Z | src/Native/Runtime/i386/CallDescrWorker.asm | kouvel/corert | c6af4cfc8b625851b91823d9be746c4f7abdc667 | [
"MIT"
] | 678 | 2015-11-18T15:43:40.000Z | 2022-03-25T07:44:21.000Z | ;; Licensed to the .NET Foundation under one or more agreements.
;; The .NET Foundation licenses this file to you under the MIT license.
.586
.model flat
option casemap:none
.code
include AsmMacros.inc
ifdef FEATURE_DYNAMIC_CODE
;;;;;;;;;;;;;;;;;;;;;;; CallingConventionConverter Thunks Helpers ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;------------------------------------------------------------------------------
; This helper routine enregisters the appropriate arguments and makes the
; actual call.
;------------------------------------------------------------------------------
; void __fastcall CallDescrWorker(CallDescrWorkerParams * pParams)
FASTCALL_FUNC RhCallDescrWorker, 4
push ebp
mov ebp, esp
push ebx
mov ebx, ecx
mov ecx, [ebx + OFFSETOF__CallDescrData__numStackSlots]
mov eax, [ebx + OFFSETOF__CallDescrData__pSrc] ; copy the stack
test ecx, ecx
jz donestack
lea eax, [eax + 4 * ecx - 4] ; last argument
push dword ptr [eax]
dec ecx
jz donestack
sub eax, 4
push dword ptr [eax]
dec ecx
jz donestack
stackloop:
sub eax, 4
push dword ptr [eax]
dec ecx
jnz stackloop
donestack:
; now we must push each field of the ArgumentRegister structure
mov eax, [ebx + OFFSETOF__CallDescrData__pArgumentRegisters]
mov edx, dword ptr [eax]
mov ecx, dword ptr [eax + 4]
mov eax,[ebx + OFFSETOF__CallDescrData__pTarget]
call eax
EXPORT_POINTER_TO_ADDRESS _PointerToReturnFromCallDescrThunk
; Symbol used to identify thunk call to managed function so the special
; case unwinder can unwind through this function. Sadly we cannot directly
; export this symbol right now because it confuses DIA unwinder to believe
; it's the beginning of a new method, therefore we export the address
; by means of an auxiliary variable.
; Save FP return value if necessary
mov ecx, [ebx + OFFSETOF__CallDescrData__fpReturnSize]
cmp ecx, 0
je ReturnsInt
cmp ecx, 4
je ReturnsFloat
cmp ecx, 8
je ReturnsDouble
; unexpected
jmp Epilog
ReturnsInt:
; Unlike desktop returnValue is a pointer to a return buffer, not the buffer itself
mov ebx, [ebx + OFFSETOF__CallDescrData__pReturnBuffer]
mov [ebx], eax
mov [ebx + 4], edx
Epilog:
pop ebx
pop ebp
retn
ReturnsFloat:
mov ebx, [ebx + OFFSETOF__CallDescrData__pReturnBuffer]
fstp dword ptr [ebx] ; Spill the Float return value
jmp Epilog
ReturnsDouble:
mov ebx, [ebx + OFFSETOF__CallDescrData__pReturnBuffer]
fstp qword ptr [ebx] ; Spill the Double return value
jmp Epilog
FASTCALL_ENDFUNC
endif
end
| 32.195876 | 109 | 0.561639 |
754e6ba339a0c2209c0958ba2ec4fb10de61e1a4 | 713 | asm | Assembly | assembly/trabalho-2/src/questao_5.asm | AbnerLimaa/arquitetura-de-computadores | e90fb95968ae9510241c7c2b407181c0a2f9c0a0 | [
"MIT"
] | null | null | null | assembly/trabalho-2/src/questao_5.asm | AbnerLimaa/arquitetura-de-computadores | e90fb95968ae9510241c7c2b407181c0a2f9c0a0 | [
"MIT"
] | null | null | null | assembly/trabalho-2/src/questao_5.asm | AbnerLimaa/arquitetura-de-computadores | e90fb95968ae9510241c7c2b407181c0a2f9c0a0 | [
"MIT"
] | null | null | null | org 0x7C00
bits 16
mov ax, 0
mov ds, ax
cli
mov al, 0x13
int 0x10
main:
mov ax, 0x7E00
call get_tecla
mov ax, 0x7E00
call pinta_tela
jmp main
get_tecla:
push ax
mov di, ax
mov ah, 0x00
int 0x16
mov [ds:di], al
pop ax
ret
pinta_tela:
push ax
push cx
push si
push di
mov si, ax
mov cx, 64000
mov ax, 0xA000
mov es, ax
mov di, 0
pinta_pixel:
cmp cx, 0
je fim_pinta_tela
mov ax, [si]
mov [es:di], ax
inc di
dec cx
jmp pinta_pixel
fim_pinta_tela:
pop di
pop si
pop cx
pop ax
ret
times 510 - ($ - $$) db 0
dw 0xAA55 | 12.084746 | 25 | 0.513324 |
9731abc66dd4fb6b2eab6a2ebc2b017a32f14ad3 | 371 | asm | Assembly | oeis/348/A348416.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/348/A348416.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/348/A348416.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A348416: For n >= 1; a(n) = gcd(n,w(n)) where w(n) is the binary weight of n, A000120(n).
; Submitted by Jamie Morken(s2.)
; 1,1,1,1,1,2,1,1,1,2,1,2,1,1,1,1,1,2,1,2,3,1,1,2,1,1,1,1,1,2,1,1,1,2,1,2,1,1,1,2,1,3,1,1,1,2,1,2,1,1,1,1,1,2,5,1,1,2,1,4,1,1,3,1,1,2,1,2,3,1,1,2,1,1,1,1,1,2,1,2,3,1,1,3
add $0,1
lpb $0
add $2,$0
div $0,2
add $1,$0
lpe
gcd $1,$2
mov $0,$1
| 28.538462 | 169 | 0.539084 |
bb0647dcf6677e49f80cfa5ae1a33461e48f9046 | 533 | asm | Assembly | factorial.asm | dannyvc95/asm-algorithms | e678ccd53ba86ab89eeed044866a35f78ebd9141 | [
"MIT"
] | null | null | null | factorial.asm | dannyvc95/asm-algorithms | e678ccd53ba86ab89eeed044866a35f78ebd9141 | [
"MIT"
] | null | null | null | factorial.asm | dannyvc95/asm-algorithms | e678ccd53ba86ab89eeed044866a35f78ebd9141 | [
"MIT"
] | null | null | null | section .data
mensaje: db "El factorial de 3 = "
longitud: equ $-mensaje
section .bss
resultado: resb 1
section .text
global _start
_start:
mov bx, 3
call factorial
add ax, 0x30
mov [resultado], ax
mov eax, 4
mov ebx, 1
mov ecx, mensaje
mov edx, longitud
int 0x80
mov eax, 4
mov ebx, 1
mov ecx, resultado
mov edx, 1
int 0x80
mov eax, 1
int 0x80
factorial:
cmp bl, 1
jg calcular
mov ax, 1
ret
calcular:
dec bl
call factorial
inc bl
mul bl
ret
| 12.113636 | 35 | 0.609756 |
d375f2e3d088d39cda4c2171604b273d4bb7f8a0 | 125 | asm | Assembly | libsrc/_DEVELOPMENT/font/fzx/fonts/kk/_ff_kk_Fairfax.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 640 | 2017-01-14T23:33:45.000Z | 2022-03-30T11:28:42.000Z | libsrc/_DEVELOPMENT/font/fzx/fonts/kk/_ff_kk_Fairfax.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 1,600 | 2017-01-15T16:12:02.000Z | 2022-03-31T12:11:12.000Z | libsrc/_DEVELOPMENT/font/fzx/fonts/kk/_ff_kk_Fairfax.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 215 | 2017-01-17T10:43:03.000Z | 2022-03-23T17:25:02.000Z |
SECTION rodata_font
SECTION rodata_font_fzx
PUBLIC _ff_kk_Fairfax
_ff_kk_Fairfax:
BINARY "font/fzx/fonts/kk/Fairfax.fzx"
| 12.5 | 38 | 0.832 |
5c5765780b4821ddeba9fd79880795e7f0c8853b | 5,358 | asm | Assembly | src/XenobladeChroniclesX/Mods/BladeGlobalNemesisMissionsOffline/patch_offline_nemesis.asm | lilystudent2016/cemu_graphic_packs | a7aaa6d07df0d5ca3f6475d741fb8b80fadd1a46 | [
"CC0-1.0"
] | 1,002 | 2017-01-10T13:10:55.000Z | 2020-11-20T18:34:19.000Z | src/XenobladeChroniclesX/Mods/BladeGlobalNemesisMissionsOffline/patch_offline_nemesis.asm | lilystudent2016/cemu_graphic_packs | a7aaa6d07df0d5ca3f6475d741fb8b80fadd1a46 | [
"CC0-1.0"
] | 347 | 2017-01-11T21:13:20.000Z | 2020-11-27T11:33:05.000Z | src/XenobladeChroniclesX/Mods/BladeGlobalNemesisMissionsOffline/patch_offline_nemesis.asm | lilystudent2016/cemu_graphic_packs | a7aaa6d07df0d5ca3f6475d741fb8b80fadd1a46 | [
"CC0-1.0"
] | 850 | 2017-01-10T06:06:43.000Z | 2020-11-06T21:16:49.000Z | [XCX_OFFLINEWE]
moduleMatches = 0xF882D5CF, 0x30B6E091 ; 1.0.1E, 1.0.2U
.origin = codecave
; cfs::CfSocialManager::update((float))
0x022879D0 = nop ; (network test?) allow call to cfs::CfSocialQuestManager::update((void))
; cfs::CfSocialManager::refreshOrderQuestInfo (called when select an entry in the network console)
0x022C805C = nop ; network test : lwz r10, 0x1B0(r30) --> rlwinm. r9, r10, 0,30,30
0x022C8060 = nop ; network test
; collectQuestInfoWE__Q2_3cfs15CfSocialManagerFRQ2_2ml45resvector__tm__28_PQ2_3cfs17CfSocialQuestInfo
0x022C6254 = li r3, 1 ; fw::SocialDataStore::getWorldEnemyCount(const(void))
0x022C6280 = li r3, 0x4EE9 ; Quest ID for WE - fw::SocialDataStore::getWorldEnemyQuest(const(unsigned int))
0x022C65A8 = li r3, 1 ; fw::SocialDataStore::getWorldEnemyCount(const(void))
; collectQuestInfoFR__Q2_3cfs15CfSocialManagerFRQ2_2ml45resvector__tm__28_PQ2_3cfs17CfSocialQuestInfo
0x022C66CC = li r3, 1 ; fw::SocialDataStore::getWorldEnemyCount(const(void))
0x022C66FC = li r3, 0x4EED
0x022C6738 = nop ; network test?
0x022C6A5C = li r3, 1 ; fw::SocialDataStore::getWorldEnemyCount(const(void))
0x022863A4 = nop ; or. r0, r6, r7
0x022863CC = nop ; or. r0, r6, r7
0x02286474 = li r7, 1 ; for getWERewardList
; Manage RPs & Appraisal
VarShareRP:
.int 0
;_shareAP = reloc(0x1039C174)
VarShareAP:
.int 0
_loadRP:
lis r12, 0x0022
ori r12, r12, 0x5510
blr
0x0282B2F0 = bla _loadRP ; __CPR86__getWorldEnemyInfo__Q2_2fw15SocialDataStoreCFUiRQ3_2fwJ25J14WorldEnemyInfo
; ######################################### TODO : get WERewardList (Telethia Stem Cell)
; cfs::CfSocialManager::getQuestDetailWE((cfs::CfSocialQuestInfoWE &))
; |- __CPR95__getWorldEnemyInfoFromQuest__Q2_2fw15SocialDataStoreCFUiRQ3_2fwJ34J14WorldEnemyInfo
0x0282B454 = li r3, 0 ; getWorldEnemyIndexFromQuestID / Uncomment to show Appraisal Rewards
; |- |- __CPR86__getWorldEnemyInfo__Q2_2fw15SocialDataStoreCFUiRQ3_2fwJ25J14WorldEnemyInfo
0x0282B0E4 = li r7, 1 ; cmpwi r7, 0
0x0282B0FC = li r0, 1 ; cmpwi r0, 0
0x0282B170 = li r6, 1 ; to store in 8(r26) -> needed for cmpwi r0, 1 after callback
0x0282B264 = nop ; skip deserializeWorldEnemy
0x0282B410 = li r4, 1 ; for getWERewardList
; cfs::CfSocialManager::getQuestDetailFR((cfs::CfSocialQuestInfoFR &))
0x0228989C = nop ; Uncomment to show Appraisal Rewards
[XCX_OFFLINEWE_1E] ############################################################################################
moduleMatches = 0xF882D5CF ; 1.0.1E
.origin = codecave
; menu::MenuMultiQuestOrder::move((void))
; skip BLADE medals requirement on launch mission
0x02B9B0B0 = li r3, 1 ; Disable call to menu::MenuMultiQuestOrder::canOrderWorldEnemy
; menu::CTerminalMenu_PieceExchange::offline((void))
; Allow access to piece exchange from network console
_single:
li r3, 0
blr
0x02AC613C = ba _single ; menu::CBladeHomuMenu::single((void))
; __CPR129__getMultiQuestReward__Q2_3cfs15CfSocialManagerCFUiRQ2_3mtl68fixed_vector__tm__48_Q3_3cfsJ28J11QuestRewardXCUiL_2_46T1 --> OK
0x022CA324 = nop ; always all items?
[XCX_OFFLINEWE_2U] ############################################################################################
moduleMatches = 0x30B6E091 ; 1.0.2U
.origin = codecave
0x02AC5C00 = li r3, 0 ; menu::CTerminalMenu_SquadQuest::offline
0x02B9B0A0 = li r3, 1 ; Disable call to menu::MenuMultiQuestOrder::canOrderWorldEnemy
;0x02BA0CE0 = bla _updateRP ; menu::MenuMultiQuestResult::updateEnemyBoss((menu::MenuObject *))
_single:
li r3, 0
blr
0x02AC612C = ba _single
[XCX_OFFLINEWE_1U] ############################################################################################
moduleMatches = 0xAB97DE6B ; 1.0.1U
.origin = codecave
0x02287960 = nop ; (network test?) allow call to cfs::CfSocialQuestManager::update((void))
0x02AC5B84 = li r3, 0 ; menu::CTerminalMenu_SquadQuest::offline
0x022C7FEC = nop ; network test : lwz r10, 0x1B0(r30) --> rlwinm. r9, r10, 0,30,30
0x022C7FF0 = nop ; network test
0x022C61E4 = li r3, 1 ; fw::SocialDataStore::getWorldEnemyCount(const(void))
0x022C6210 = li r3, 0x4EE9 ; Quest ID for WE - fw::SocialDataStore::getWorldEnemyQuest(const(unsigned int))
0x022C6538 = li r3, 1 ; fw::SocialDataStore::getWorldEnemyCount(const(void))
0x022C668C = li r3, 1 ; fw::SocialDataStore::getWorldEnemyCount(const(void))
0x022C668C = li r3, 0x4EED
0x022C66C8 = nop ; network test?
0x022C69EC = li r3, 1 ; fw::SocialDataStore::getWorldEnemyCount(const(void))
0x022863A4 = nop ; or. r0, r6, r7
0x022863CC = nop ; or. r0, r6, r7
0x02286474 = li r7, 1 ; for getWERewardList
_loadRP:
lis r12, 0x0022
ori r12, r12, 0x5510
blr
0x0282B274 = bla _loadRP ; __CPR86__getWorldEnemyInfo__Q2_2fw15SocialDataStoreCFUiRQ3_2fwJ25J14WorldEnemyInfo
0x0282B3D8 = li r3, 0 ; getWorldEnemyIndexFromQuestID / Uncomment to show Appraisal Rewards
0x0282B068 = li r7, 1 ; cmpwi r7, 0
0x0282B080 = li r0, 1 ; cmpwi r0, 0
0x0282B0F4 = li r6, 1 ; to store in 8(r26) -> needed for cmpwi r0, 1 after callback
0x0282B1E8 = nop ; skip deserializeWorldEnemy
0x0282B394 = li r4, 1 ; for getWERewardList
0x0228982C = nop ; Uncomment to show Appraisal Rewards
0x02B9AFB0 = li r3, 1 ; Disable call to menu::MenuMultiQuestOrder::canOrderWorldEnemy
_single:
li r3, 0
blr
0x02AC60B0 = ba _single ; menu::CBladeHomuMenu::single((void))
0x022CA2B4 = nop ; always all items?
| 40.285714 | 135 | 0.718552 |
6ddb5981022e3dbc85a88a49c763e75087e05093 | 2,810 | asm | Assembly | unused/develop/obj/spritesheet_1_tiles.asm | pau-tomas/gbvm | c2c7a93a42f6e3168b013c93c4a3bd1c9e8b989b | [
"MIT"
] | 33 | 2020-12-27T11:53:23.000Z | 2022-02-19T23:05:12.000Z | unused/develop/obj/spritesheet_1_tiles.asm | pau-tomas/gbvm | c2c7a93a42f6e3168b013c93c4a3bd1c9e8b989b | [
"MIT"
] | 2 | 2020-12-10T16:53:53.000Z | 2022-01-31T21:42:01.000Z | unused/develop/obj/spritesheet_1_tiles.asm | pau-tomas/gbvm | c2c7a93a42f6e3168b013c93c4a3bd1c9e8b989b | [
"MIT"
] | 6 | 2021-04-18T08:09:16.000Z | 2022-01-31T21:52:24.000Z | ;--------------------------------------------------------
; File Created by SDCC : free open source ANSI-C Compiler
; Version 4.1.4 #12246 (Mac OS X x86_64)
;--------------------------------------------------------
.module spritesheet_1_tiles
.optsdcc -mgbz80
;--------------------------------------------------------
; Public variables in this module
;--------------------------------------------------------
.globl _spritesheet_1_tiles
.globl ___bank_spritesheet_1_tiles
;--------------------------------------------------------
; special function registers
;--------------------------------------------------------
;--------------------------------------------------------
; ram data
;--------------------------------------------------------
.area _DATA
;--------------------------------------------------------
; ram data
;--------------------------------------------------------
.area _INITIALIZED
;--------------------------------------------------------
; absolute external ram data
;--------------------------------------------------------
.area _DABS (ABS)
;--------------------------------------------------------
; global & static initialisations
;--------------------------------------------------------
.area _HOME
.area _GSINIT
.area _GSFINAL
.area _GSINIT
;--------------------------------------------------------
; Home
;--------------------------------------------------------
.area _HOME
.area _HOME
;--------------------------------------------------------
; code
;--------------------------------------------------------
.area _CODE_255
.area _CODE_255
___bank_spritesheet_1_tiles = 0x00ff
_spritesheet_1_tiles:
.dw #0x0004
.db #0x7f ; 127
.db #0x7f ; 127
.db #0xff ; 255
.db #0x80 ; 128
.db #0xff ; 255
.db #0x80 ; 128
.db #0xfc ; 252
.db #0x82 ; 130
.db #0xd9 ; 217
.db #0xa4 ; 164
.db #0xb2 ; 178
.db #0xc9 ; 201
.db #0xe5 ; 229
.db #0x92 ; 146
.db #0xca ; 202
.db #0xa5 ; 165
.db #0x94 ; 148
.db #0xca ; 202
.db #0xa9 ; 169
.db #0x94 ; 148
.db #0xd3 ; 211
.db #0xa8 ; 168
.db #0xa6 ; 166
.db #0xd1 ; 209
.db #0xcd ; 205
.db #0xa2 ; 162
.db #0x9a ; 154
.db #0xc4 ; 196
.db #0x7f ; 127
.db #0xff ; 255
.db #0x00 ; 0
.db #0x7f ; 127
.db #0xfe ; 254
.db #0xfe ; 254
.db #0xff ; 255
.db #0x01 ; 1
.db #0xff ; 255
.db #0x01 ; 1
.db #0xa7 ; 167
.db #0x51 ; 81 'Q'
.db #0x4f ; 79 'O'
.db #0xa1 ; 161
.db #0x9f ; 159
.db #0x41 ; 65 'A'
.db #0x37 ; 55 '7'
.db #0x89 ; 137
.db #0x6f ; 111 'o'
.db #0x11 ; 17
.db #0xd7 ; 215
.db #0x21 ; 33
.db #0xa7 ; 167
.db #0x49 ; 73 'I'
.db #0x4f ; 79 'O'
.db #0x91 ; 145
.db #0x9f ; 159
.db #0x21 ; 33
.db #0x37 ; 55 '7'
.db #0x49 ; 73 'I'
.db #0x6f ; 111 'o'
.db #0x91 ; 145
.db #0xfe ; 254
.db #0xff ; 255
.db #0x00 ; 0
.db #0xfe ; 254
.area _INITIALIZER
.area _CABS (ABS)
| 24.649123 | 57 | 0.380427 |
8c869c8affafe34c95ad8e4390e4df88442430d7 | 354 | asm | Assembly | programs/oeis/220/A220944.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/220/A220944.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | programs/oeis/220/A220944.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | ; A220944: Expansion of (1+3*x+5*x^2-x^3)/((1-x^2)*(1-3*x^2).
; 1,3,9,11,33,35,105,107,321,323,969,971,2913,2915,8745,8747,26241,26243,78729,78731,236193,236195,708585,708587,2125761,2125763,6377289,6377291,19131873,19131875,57395625,57395627,172186881,172186883,516560649,516560651
mov $1,2
lpb $0
sub $0,2
mul $1,3
lpe
add $1,$0
mul $1,2
sub $1,3
| 29.5 | 220 | 0.714689 |
52cf9bfbf33cfd780bddb1e6242b6bb8a018798e | 7,226 | asm | Assembly | support/masm/examples/triangle.asm | afxgroup/glfw2 | 192052cad5e849da469d5dd1df24153f72b5f279 | [
"Zlib"
] | null | null | null | support/masm/examples/triangle.asm | afxgroup/glfw2 | 192052cad5e849da469d5dd1df24153f72b5f279 | [
"Zlib"
] | null | null | null | support/masm/examples/triangle.asm | afxgroup/glfw2 | 192052cad5e849da469d5dd1df24153f72b5f279 | [
"Zlib"
] | null | null | null | ;=========================================================================
; This is a small test application for GLFW.
; The program opens a window (640x480), and renders a spinning colored
; triangle (it is controlled with both the GLFW timer and the mouse). It
; also calculates the rendering speed (FPS), which is displayed in the
; window title bar.
;
; This program was converted from C to x86 assembler by Toni Jovanoski.
;=========================================================================
.686
.MODEL FLAT, STDCALL
OPTION CASEMAP:NONE
;#########################################################################
;# INCLUDES #
;#########################################################################
; Standard Windows includes
INCLUDE windows.inc
INCLUDE kernel32.inc
INCLUDE masm32.inc
; OpenGL includes
INCLUDE opengl32.inc
INCLUDE glu32.inc
INCLUDE glfw.inc
; Macros
INCLUDE fpc.mac ; floating point constant macro
;#########################################################################
;# INCLUDE LIBS #
;#########################################################################
; Standard Windows libs
INCLUDELIB kernel32.lib
INCLUDELIB masm32.lib
; OpenGL libs
INCLUDELIB opengl32.lib
INCLUDELIB glu32.lib
INCLUDELIB glfwdll.lib
;#########################################################################
;# INIT DATA #
;#########################################################################
.DATA
;#########################################################################
;# UNINIT DATA #
;#########################################################################
.DATA?
ALIGN 8
t REAL8 ?
t0 REAL8 ?
fps REAL8 ?
ratio REAL8 ?
temp REAL4 ?
windowwidth DWORD ?
windowheight DWORD ?
cursorx DWORD ?
cursory DWORD ?
frames DWORD ?
windowtitle BYTE 64 DUP (?)
;#########################################################################
;# CODE #
;#########################################################################
.CODE
start:
push ebx
;We init GLFW
INVOKE glfwInit
;We open window
INVOKE glfwOpenWindow, 640, 480, 0, 0, 0, 0, 0, 0, GLFW_WINDOW
;If there is a problem with opening window, get out
.IF (!eax)
INVOKE glfwTerminate
INVOKE ExitProcess, NULL
.ENDIF
;Enabling sticky keys
INVOKE glfwEnable, GLFW_STICKY_KEYS
;we don't want vsync on
INVOKE glfwSwapInterval, 0
;in frames we keep how much frames are rendered
and frames, 0
;get a first "reference" time
INVOKE glfwGetTime
fstp t0
;repeat until ESC is pressed or window is closed
.REPEAT
INVOKE glfwGetTime
fst t ;don't pop we gonna use him again
;we find how much time had been elapsed
fsub t0 ;st(0)=t-t0
fld1 ;1, t-t0
;we test if elapsed time is above or below 1 second
fcomip st(0), st(1) ;compare 1 with t-t0 (PPro upward instruction!!!)
ja @F
;if elapsed time is above 1 second calculate fps
fild frames ;frames, t-t0
fdivrp st(1), st(0) ;frames/t-t0
fstp fps ;calculate fps
;convert to string
INVOKE FloatToStr, fps, ADDR windowtitle ;float to string
INVOKE glfwSetWindowTitle, ADDR windowtitle
;update t0, or t is now new "reference" time and reset frames
mov eax, DWORD PTR [t] ;using integer move instead FPU move
mov ecx, DWORD PTR [t+4]
mov DWORD PTR [t0], eax
mov DWORD PTR [t0+4], ecx
and frames, 0 ;reset frames
@@:
fstp st(0) ;free st(0) because st(0)=t-t0
inc frames
;we need mouse position for rotating
INVOKE glfwGetMousePos, ADDR cursorx, ADDR cursory
;we need size of window to setup the viewport and perspective
INVOKE glfwGetWindowSize, ADDR windowwidth, ADDR windowheight
.IF (windowheight==0)
mov windowheight, 1 ;avoid divide with zero
.ENDIF
;setting viewport
INVOKE glViewport, 0, 0, windowwidth, windowheight
;clearing color for framebuffer, pure black
INVOKE glClearColor, fpc(0), fpc(0), fpc(0), fpc(0)
;clear framebuffer
INVOKE glClear, GL_COLOR_BUFFER_BIT
;setting up perspective, first we "reset" projection matrix and
;then we set the perspective
INVOKE glMatrixMode, GL_PROJECTION
INVOKE glLoadIdentity
;calculate ratio (ratio = windowwidth / windowheight)
fild windowwidth
fild windowheight
fdivp st(1), st(0)
fstp ratio
;FOV=65, znear=1, zfar=100
INVOKE gluPerspective, fpc(REAL8 65), ratio, fpc(REAL8 1), fpc(REAL8 100)
;we "reset" the modelview matrix and we place the camera
INVOKE glMatrixMode, GL_MODELVIEW
INVOKE glLoadIdentity
INVOKE gluLookAt, fpc(REAL8 0), fpc(REAL8 1), fpc(REAL8 0),\ ;set camera
fpc(REAL8 0), fpc(REAL8 20), fpc(REAL8 0),\
fpc(REAL8 0), fpc(REAL8 0), fpc(REAL8 1)
INVOKE glTranslatef, fpc(0), fpc(14), fpc(0)
;calculate the angle of rotation
fild cursorx
fmul fpc(0.3) ;0.3*x
fld t ;t, 0.3*x
fmul fpc(100) ;100*t, 0.3*x
faddp st(1), st(0) ;100*t+0.3*x
fstp temp
INVOKE glRotatef, temp, fpc(0), fpc(0), fpc(1)
;draw a triagle
INVOKE glBegin, GL_TRIANGLES
INVOKE glColor3f, fpc(1), fpc(0), fpc(0)
INVOKE glVertex3f, fpc(-5), fpc(0), fpc(-4)
INVOKE glColor3f, fpc(0), fpc(1), fpc(0)
INVOKE glVertex3f, fpc(5), fpc(0), fpc(-4)
INVOKE glColor3f, fpc(0), fpc(0), fpc(1)
INVOKE glVertex3f, fpc(0), fpc(0), fpc(6)
INVOKE glEnd
;swap buffers
INVOKE glfwSwapBuffers
;get state of ESC key
INVOKE glfwGetKey, GLFW_KEY_ESC
mov ebx, eax
;get state of window (opened or closed)
INVOKE glfwGetWindowParam, GLFW_OPENED
.UNTIL (ebx) || (!eax) ;if is pressed ESC or window is closed get out
INVOKE glfwTerminate
pop ebx
INVOKE ExitProcess, NULL
END start
| 31.012876 | 88 | 0.459175 |
1fac17f24dc2ff9e799e7081906def39e3b036e5 | 681 | asm | Assembly | oeis/052/A052559.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/052/A052559.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/052/A052559.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A052559: Expansion of e.g.f. (1-x)/(1 - 2*x - x^2 + x^3).
; Submitted by Christian Krause
; 1,1,6,36,336,3720,50400,791280,14232960,287763840,6466521600,159826867200,4309577395200,125885452492800,3960073877760000,133473015067392000,4798579092443136000,183299247820136448000,7413654242042560512000,316508265108639571968000,14223752361232022568960000,671170109665873935237120000,33178322046583817932308480000,1714673297043336364298403840000,92468062216012039915438080000000,5194346244783747126885089280000000,303461341735286629260004294656000000,18410529025652657162597626281984000000
mov $2,$0
seq $0,77998 ; Expansion of (1-x)/(1-2*x-x^2+x^3).
lpb $2
mul $0,$2
sub $2,1
lpe
| 61.909091 | 492 | 0.837004 |
0059cc609a091741bbcc37b235dee50b67b583d4 | 556 | asm | Assembly | programs/oeis/158/A158131.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/158/A158131.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/158/A158131.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A158131: 121n + 1.
; 122,243,364,485,606,727,848,969,1090,1211,1332,1453,1574,1695,1816,1937,2058,2179,2300,2421,2542,2663,2784,2905,3026,3147,3268,3389,3510,3631,3752,3873,3994,4115,4236,4357,4478,4599,4720,4841,4962,5083,5204,5325,5446,5567,5688,5809,5930,6051,6172,6293,6414,6535,6656,6777,6898,7019,7140,7261,7382,7503,7624,7745,7866,7987,8108,8229,8350,8471,8592,8713,8834,8955,9076,9197,9318,9439,9560,9681,9802,9923,10044,10165,10286,10407,10528,10649,10770,10891,11012,11133,11254,11375,11496,11617,11738,11859,11980,12101
mul $0,121
add $0,122
| 92.666667 | 511 | 0.784173 |
0bf935735fbfa02d743b4066347074f39e6adf30 | 109 | asm | Assembly | Add Immediate/immadd3.asm | adi-075/8085-microproccesor-programs | 39e5f604fc4bab441c59df3ab116e5b3e16dd43a | [
"MIT"
] | 2 | 2021-03-20T07:36:57.000Z | 2021-04-03T11:55:40.000Z | Add Immediate/immadd3.asm | adi-075/8085-microproccesor-programs | 39e5f604fc4bab441c59df3ab116e5b3e16dd43a | [
"MIT"
] | null | null | null | Add Immediate/immadd3.asm | adi-075/8085-microproccesor-programs | 39e5f604fc4bab441c59df3ab116e5b3e16dd43a | [
"MIT"
] | null | null | null |
;<Add two 8 bit number>
jmp start
;12+13=25
;code
start: nop
MVI A, 33H
MVI B, 22H
ADD B
STA 3000H
hlt | 6.411765 | 23 | 0.651376 |
5352734f8ed0862c8c3ff346698e8bb32eeb61fe | 6,447 | asm | Assembly | base/mvdm/wow16/win87em/emarith.asm | npocmaka/Windows-Server-2003 | 5c6fe3db626b63a384230a1aa6b92ac416b0765f | [
"Unlicense"
] | 17 | 2020-11-13T13:42:52.000Z | 2021-09-16T09:13:13.000Z | base/mvdm/wow16/win87em/emarith.asm | sancho1952007/Windows-Server-2003 | 5c6fe3db626b63a384230a1aa6b92ac416b0765f | [
"Unlicense"
] | 2 | 2020-10-19T08:02:06.000Z | 2020-10-19T08:23:18.000Z | base/mvdm/wow16/win87em/emarith.asm | sancho1952007/Windows-Server-2003 | 5c6fe3db626b63a384230a1aa6b92ac416b0765f | [
"Unlicense"
] | 14 | 2020-11-14T09:43:20.000Z | 2021-08-28T08:59:57.000Z | page ,132
subttl emarith.asm - Arithmetic Operations
;***
;emarith.asm -
;
; Copyright (c) 1986-89, Microsoft Corporation
;
;Purpose:
; Arithmetic Operations
;
; This Module contains Proprietary Information of Microsoft
; Corporation and should be treated as Confidential.
;
;Revision History: (Also see emulator.hst)
;
; 12/19/89 WAJ XORSIGN was not masking the sign bit correctly.
;
;*******************************************************************************
;-----------------------------------------------;
; ;
; Double precision arithmetic ;
; ;
;-----------------------------------------------;
; Inputs:
; DI = (op1) NOS (Next on stack)
; SI = (op2) TOS (Top of stack)
;
; Functions:
; ADDRQQ - Addition RESULT <-- [DI] + [SI]
; SUDRQQ - Subtract RESULT <-- [DI] - [SI]
; MUDRQQ - Multiply RESULT <-- [DI] * [SI]
; DIDRQQ - Division RESULT <-- [DI] / [SI]
; SVDRQQ - Subtract Reversed RESULT <-- [SI] - [DI]
; DRDRQQ - Division Reversed RESULT <-- [SI] / [DI]
; Outputs:
; Destination of result is in RESULT
; Registers:
; All except BP destroyed.
; Understanding this code:
;
; Assign the symbol S to SI, assign the symbol D to DI.
;
; Upon entry: SI <-- S, DI <-- D , Performing D - S
ProfBegin ARITH
even
lab SVDRQQ ; Reverse Subtract
MOV DX,Sign*256 ; DH will be flag[SI], prepare to switch sign
JMP short DOADD
even
lab SUDRQQ ; Normal Subtract
MOV DX,Sign ; DL will be flag[DI], prepare to switch sign
JMP short DOADD
even
lab MUDRQQ ; Multiplication
xor idx,idx ; Do not change signs on entry
MOV ibx,offset MULJMPTAB
JMP short INITIL
even
lab DIDRQQ ; Normal Division
xor idx,idx
XCHG isi,idi ; Make SI - Numerator, DI - Denominator
MOV ibx,offset DIVJMPTAB
JMP short INITIL
even
lab DRDRQQ ; Reverse Division
xor idx,idx
MOV ibx,offset DIVJMPTAB
JMP short INITIL
even
lab ADDRQQ ; Double Precision Add
xor idx,idx ; No signs get switched
lab DOADD
MOV ibx,offset ADDJMPTAB
lab INITIL
MOV AL,Tag[idi] ; Get tags to determine special cases.
SHL AL,1
SHL AL,1
OR AL,Tag[isi]
CBI
ifdef i386
SHL iax,2
else
SHL iax,1
endif
ADD ibx,iax ; BX now points to address of proper routine.
XOR DH,Flag[idi] ; Sign A
XOR DL,Flag[isi] ; Sign B
MOV CX,Expon[idi] ; Exponent of operand A
MOV AX,Expon[isi] ; Exponent of operand B
JMP cs:[ibx] ; Go to appropriate routine.
page
;-----------------------------------------------------------;
; ;
; Special Case Routines for Arithmetic Functions ;
; ;
;-----------------------------------------------------------;
lab DDD
mov isi,idi ;return DI with sign from Add/Subtract
mov dl,dh
lab SSS ;Return SI with sign from Add/Subtract
call MOVresult
MOV Flag[idi],dl ;Overstore correct Sign from Add/Subtract
ret
lab D0SSINV ;Return SI, set both Invalid and Zerodivide
OR [CURerr],ZeroDivide
JMP short SSINV
lab DDINV ;Return DI and set Invalid exception
MOV isi,idi
lab SSINV ;Return SI and set INVALID exception
OR [CURerr],Invalid
jmp short MOVresult
lab ZEROS ;Return 0 with xor of signs
MOV isi,offset IEEEzero
lab XORSIGN
XOR DH,DL
AND DH,80h ; Mask to just the sign.
CALL csMOVresult
OR Flag[idi],DH
RET
lab DIV0 ;Set exception, Return Infinity signed
OR [CURerr],ZeroDivide
lab INFS ;Return signed infinity
MOV isi,offset IEEEinfinity
JMP XORSIGN
lab D0INDINV ;Set div 0 exception, Return Indefinate and Invalid
OR [CURerr],ZeroDivide
lab INDINV
MOV isi,offset IEEEindefinite
OR [CURerr],Invalid
lab csMOVresult
mov idi,[RESULT]
lab csMOVRQQ ; as above for constants in CS
ifdef i386
MOVS dword ptr es:[idi],dword ptr cs:[isi]
MOVS dword ptr es:[idi],dword ptr cs:[isi]
MOVS dword ptr es:[idi],dword ptr cs:[isi]
else
MOVS word ptr es:[idi],word ptr cs:[isi]
MOVS word ptr es:[idi],word ptr cs:[isi]
MOVS word ptr es:[idi],word ptr cs:[isi]
MOVS word ptr es:[idi],word ptr cs:[isi]
MOVS word ptr es:[idi],word ptr cs:[isi]
MOVS word ptr es:[idi],word ptr cs:[isi]
endif
SUB idi,Reg87Len
SUB isi,Reg87Len
RET
lab MOVresult
mov idi,[RESULT] ; move to result
cmp isi,idi
je short MOVret ; unless the same
lab MOVRQQ
ifdef i386
MOVS dword ptr es:[idi],dword ptr ds:[isi]
MOVS dword ptr es:[idi],dword ptr ds:[isi]
MOVS dword ptr es:[idi],dword ptr ds:[isi]
else
MOVS word ptr es:[idi],word ptr ds:[isi]
MOVS word ptr es:[idi],word ptr ds:[isi]
MOVS word ptr es:[idi],word ptr ds:[isi]
MOVS word ptr es:[idi],word ptr ds:[isi]
MOVS word ptr es:[idi],word ptr ds:[isi]
MOVS word ptr es:[idi],word ptr ds:[isi]
endif
SUB idi,Reg87Len
SUB isi,Reg87Len
lab MOVret
RET
lab INFINF ; Addition of two infinities was attempted
TEST [CWcntl],InfinityControl ; Invalid if projective closure
JSZ INDINV
XOR DL,DH ; Invalid if signs are different
JSS INDINV
JMP DDD ; Otherwise Inf is the answer, already at DI
lab BIGNAN ; Return the NAN with the Bigger mantissa
mov iax, isi
mov ibx, idi
add isi, MantissaByteCnt-2 ; UNDONE387: Convert SNAN to QNAN
add idi, MantissaByteCnt-2
mov icx, MantissaByteCnt/2
std
repe cmps word ptr ds:[isi], word ptr es:[idi]
cld
JSB DDNAN
mov isi, iax ; Greater NAN was in si
jmp SSINV
lab DDNAN
mov isi, ibx ; Greater NAN was in di
jmp SSINV
page
if fastSP
ifdef i386
BUG ; fastsp and i386 do not work together
endif
;Assumes DL = Flag[SI], DH = Flag[DI]. Will convert the mantissa on
;stack to double if necessary by appending zeros.
;Must not change AX, DX, SI, DI.
lab CoerceToDouble
MOV BX,DX ; get to work reg
AND BX,Single + 256*Single ; mask to single flags only
JSNZ CheckDI
lab CoerceToDoubleReturn
RET
lab CheckDI
XOR BX,BX ; Prepare to zero out mantissa
XCHG AX,BX
TEST DH,Single
JSZ CheckSI
STOSW ; Zero out lower five bytes
STOSW
STOSB
SUB DI,5 ; Reset DI
lab CheckSI
TEST DL,Single
JZ short ExitCoerceToDouble
XCHG DI,SI
STOSW ; Zero out lower five bytes
STOSW
STOSB
SUB DI,5 ; Reset DI
XCHG DI,SI
lab ExitCoerceToDouble
XCHG AX,BX ; Reset AX
XOR BX,BX ; Set zero flag to indicate results now double
RET
endif ;fastSP
ProfEnd ARITH
| 22.541958 | 81 | 0.635024 |
078983c2fd807aba8c4bb184cb24432496914200 | 16,792 | asm | Assembly | lib/avx2/sha512_x4_avx2.asm | edtubbs/intel-ipsec-mb | 27bb66dcdf5aec2aec8cc0a6bee9c1da96898d7f | [
"BSD-3-Clause"
] | null | null | null | lib/avx2/sha512_x4_avx2.asm | edtubbs/intel-ipsec-mb | 27bb66dcdf5aec2aec8cc0a6bee9c1da96898d7f | [
"BSD-3-Clause"
] | null | null | null | lib/avx2/sha512_x4_avx2.asm | edtubbs/intel-ipsec-mb | 27bb66dcdf5aec2aec8cc0a6bee9c1da96898d7f | [
"BSD-3-Clause"
] | null | null | null | ;;
;; Copyright (c) 2012-2021, Intel Corporation
;;
;; Redistribution and use in source and binary forms, with or without
;; modification, are permitted provided that the following conditions are met:
;;
;; * Redistributions of source code must retain the above copyright notice,
;; this list of conditions and the following disclaimer.
;; * Redistributions in binary form must reproduce the above copyright
;; notice, this list of conditions and the following disclaimer in the
;; documentation and/or other materials provided with the distribution.
;; * Neither the name of Intel Corporation nor the names of its contributors
;; may be used to endorse or promote products derived from this software
;; without specific prior written permission.
;;
;; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
;; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
;; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
;; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
;; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
;; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
;; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
;; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
;; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;
;; code to compute quad SHA512 using AVX
;; use YMMs to tackle the larger digest size
;; outer calling routine takes care of save and restore of XMM registers
;; Logic designed/laid out by JDG
;; Function clobbers: rax, rcx, rdx, rbx, rsi, rdi, r9-r15; ymm0-15
;; Stack must be aligned to 32 bytes before call
;; Windows clobbers: rax rbx rdx r8 r9 r10 r11 r12
;; Windows preserves: rcx rsi rdi rbp r13 r14 r15
;;
;; Linux clobbers: rax rbx rcx rdx rsi r8 r9 r10 r11 r12
;; Linux preserves: rcx rdx rdi rbp r13 r14 r15
;;
;; clobbers ymm0-15
%include "include/os.asm"
;%define DO_DBGPRINT
%include "include/dbgprint.asm"
%include "include/transpose_avx2.asm"
%include "include/dbgprint.asm"
%include "include/mb_mgr_datastruct.asm"
%include "include/clear_regs.asm"
%include "include/cet.inc"
section .data
default rel
align 64
K512_4:
dq 0x428a2f98d728ae22, 0x428a2f98d728ae22, 0x428a2f98d728ae22, 0x428a2f98d728ae22
dq 0x7137449123ef65cd, 0x7137449123ef65cd, 0x7137449123ef65cd, 0x7137449123ef65cd
dq 0xb5c0fbcfec4d3b2f, 0xb5c0fbcfec4d3b2f, 0xb5c0fbcfec4d3b2f, 0xb5c0fbcfec4d3b2f
dq 0xe9b5dba58189dbbc, 0xe9b5dba58189dbbc, 0xe9b5dba58189dbbc, 0xe9b5dba58189dbbc
dq 0x3956c25bf348b538, 0x3956c25bf348b538, 0x3956c25bf348b538, 0x3956c25bf348b538
dq 0x59f111f1b605d019, 0x59f111f1b605d019, 0x59f111f1b605d019, 0x59f111f1b605d019
dq 0x923f82a4af194f9b, 0x923f82a4af194f9b, 0x923f82a4af194f9b, 0x923f82a4af194f9b
dq 0xab1c5ed5da6d8118, 0xab1c5ed5da6d8118, 0xab1c5ed5da6d8118, 0xab1c5ed5da6d8118
dq 0xd807aa98a3030242, 0xd807aa98a3030242, 0xd807aa98a3030242, 0xd807aa98a3030242
dq 0x12835b0145706fbe, 0x12835b0145706fbe, 0x12835b0145706fbe, 0x12835b0145706fbe
dq 0x243185be4ee4b28c, 0x243185be4ee4b28c, 0x243185be4ee4b28c, 0x243185be4ee4b28c
dq 0x550c7dc3d5ffb4e2, 0x550c7dc3d5ffb4e2, 0x550c7dc3d5ffb4e2, 0x550c7dc3d5ffb4e2
dq 0x72be5d74f27b896f, 0x72be5d74f27b896f, 0x72be5d74f27b896f, 0x72be5d74f27b896f
dq 0x80deb1fe3b1696b1, 0x80deb1fe3b1696b1, 0x80deb1fe3b1696b1, 0x80deb1fe3b1696b1
dq 0x9bdc06a725c71235, 0x9bdc06a725c71235, 0x9bdc06a725c71235, 0x9bdc06a725c71235
dq 0xc19bf174cf692694, 0xc19bf174cf692694, 0xc19bf174cf692694, 0xc19bf174cf692694
dq 0xe49b69c19ef14ad2, 0xe49b69c19ef14ad2, 0xe49b69c19ef14ad2, 0xe49b69c19ef14ad2
dq 0xefbe4786384f25e3, 0xefbe4786384f25e3, 0xefbe4786384f25e3, 0xefbe4786384f25e3
dq 0x0fc19dc68b8cd5b5, 0x0fc19dc68b8cd5b5, 0x0fc19dc68b8cd5b5, 0x0fc19dc68b8cd5b5
dq 0x240ca1cc77ac9c65, 0x240ca1cc77ac9c65, 0x240ca1cc77ac9c65, 0x240ca1cc77ac9c65
dq 0x2de92c6f592b0275, 0x2de92c6f592b0275, 0x2de92c6f592b0275, 0x2de92c6f592b0275
dq 0x4a7484aa6ea6e483, 0x4a7484aa6ea6e483, 0x4a7484aa6ea6e483, 0x4a7484aa6ea6e483
dq 0x5cb0a9dcbd41fbd4, 0x5cb0a9dcbd41fbd4, 0x5cb0a9dcbd41fbd4, 0x5cb0a9dcbd41fbd4
dq 0x76f988da831153b5, 0x76f988da831153b5, 0x76f988da831153b5, 0x76f988da831153b5
dq 0x983e5152ee66dfab, 0x983e5152ee66dfab, 0x983e5152ee66dfab, 0x983e5152ee66dfab
dq 0xa831c66d2db43210, 0xa831c66d2db43210, 0xa831c66d2db43210, 0xa831c66d2db43210
dq 0xb00327c898fb213f, 0xb00327c898fb213f, 0xb00327c898fb213f, 0xb00327c898fb213f
dq 0xbf597fc7beef0ee4, 0xbf597fc7beef0ee4, 0xbf597fc7beef0ee4, 0xbf597fc7beef0ee4
dq 0xc6e00bf33da88fc2, 0xc6e00bf33da88fc2, 0xc6e00bf33da88fc2, 0xc6e00bf33da88fc2
dq 0xd5a79147930aa725, 0xd5a79147930aa725, 0xd5a79147930aa725, 0xd5a79147930aa725
dq 0x06ca6351e003826f, 0x06ca6351e003826f, 0x06ca6351e003826f, 0x06ca6351e003826f
dq 0x142929670a0e6e70, 0x142929670a0e6e70, 0x142929670a0e6e70, 0x142929670a0e6e70
dq 0x27b70a8546d22ffc, 0x27b70a8546d22ffc, 0x27b70a8546d22ffc, 0x27b70a8546d22ffc
dq 0x2e1b21385c26c926, 0x2e1b21385c26c926, 0x2e1b21385c26c926, 0x2e1b21385c26c926
dq 0x4d2c6dfc5ac42aed, 0x4d2c6dfc5ac42aed, 0x4d2c6dfc5ac42aed, 0x4d2c6dfc5ac42aed
dq 0x53380d139d95b3df, 0x53380d139d95b3df, 0x53380d139d95b3df, 0x53380d139d95b3df
dq 0x650a73548baf63de, 0x650a73548baf63de, 0x650a73548baf63de, 0x650a73548baf63de
dq 0x766a0abb3c77b2a8, 0x766a0abb3c77b2a8, 0x766a0abb3c77b2a8, 0x766a0abb3c77b2a8
dq 0x81c2c92e47edaee6, 0x81c2c92e47edaee6, 0x81c2c92e47edaee6, 0x81c2c92e47edaee6
dq 0x92722c851482353b, 0x92722c851482353b, 0x92722c851482353b, 0x92722c851482353b
dq 0xa2bfe8a14cf10364, 0xa2bfe8a14cf10364, 0xa2bfe8a14cf10364, 0xa2bfe8a14cf10364
dq 0xa81a664bbc423001, 0xa81a664bbc423001, 0xa81a664bbc423001, 0xa81a664bbc423001
dq 0xc24b8b70d0f89791, 0xc24b8b70d0f89791, 0xc24b8b70d0f89791, 0xc24b8b70d0f89791
dq 0xc76c51a30654be30, 0xc76c51a30654be30, 0xc76c51a30654be30, 0xc76c51a30654be30
dq 0xd192e819d6ef5218, 0xd192e819d6ef5218, 0xd192e819d6ef5218, 0xd192e819d6ef5218
dq 0xd69906245565a910, 0xd69906245565a910, 0xd69906245565a910, 0xd69906245565a910
dq 0xf40e35855771202a, 0xf40e35855771202a, 0xf40e35855771202a, 0xf40e35855771202a
dq 0x106aa07032bbd1b8, 0x106aa07032bbd1b8, 0x106aa07032bbd1b8, 0x106aa07032bbd1b8
dq 0x19a4c116b8d2d0c8, 0x19a4c116b8d2d0c8, 0x19a4c116b8d2d0c8, 0x19a4c116b8d2d0c8
dq 0x1e376c085141ab53, 0x1e376c085141ab53, 0x1e376c085141ab53, 0x1e376c085141ab53
dq 0x2748774cdf8eeb99, 0x2748774cdf8eeb99, 0x2748774cdf8eeb99, 0x2748774cdf8eeb99
dq 0x34b0bcb5e19b48a8, 0x34b0bcb5e19b48a8, 0x34b0bcb5e19b48a8, 0x34b0bcb5e19b48a8
dq 0x391c0cb3c5c95a63, 0x391c0cb3c5c95a63, 0x391c0cb3c5c95a63, 0x391c0cb3c5c95a63
dq 0x4ed8aa4ae3418acb, 0x4ed8aa4ae3418acb, 0x4ed8aa4ae3418acb, 0x4ed8aa4ae3418acb
dq 0x5b9cca4f7763e373, 0x5b9cca4f7763e373, 0x5b9cca4f7763e373, 0x5b9cca4f7763e373
dq 0x682e6ff3d6b2b8a3, 0x682e6ff3d6b2b8a3, 0x682e6ff3d6b2b8a3, 0x682e6ff3d6b2b8a3
dq 0x748f82ee5defb2fc, 0x748f82ee5defb2fc, 0x748f82ee5defb2fc, 0x748f82ee5defb2fc
dq 0x78a5636f43172f60, 0x78a5636f43172f60, 0x78a5636f43172f60, 0x78a5636f43172f60
dq 0x84c87814a1f0ab72, 0x84c87814a1f0ab72, 0x84c87814a1f0ab72, 0x84c87814a1f0ab72
dq 0x8cc702081a6439ec, 0x8cc702081a6439ec, 0x8cc702081a6439ec, 0x8cc702081a6439ec
dq 0x90befffa23631e28, 0x90befffa23631e28, 0x90befffa23631e28, 0x90befffa23631e28
dq 0xa4506cebde82bde9, 0xa4506cebde82bde9, 0xa4506cebde82bde9, 0xa4506cebde82bde9
dq 0xbef9a3f7b2c67915, 0xbef9a3f7b2c67915, 0xbef9a3f7b2c67915, 0xbef9a3f7b2c67915
dq 0xc67178f2e372532b, 0xc67178f2e372532b, 0xc67178f2e372532b, 0xc67178f2e372532b
dq 0xca273eceea26619c, 0xca273eceea26619c, 0xca273eceea26619c, 0xca273eceea26619c
dq 0xd186b8c721c0c207, 0xd186b8c721c0c207, 0xd186b8c721c0c207, 0xd186b8c721c0c207
dq 0xeada7dd6cde0eb1e, 0xeada7dd6cde0eb1e, 0xeada7dd6cde0eb1e, 0xeada7dd6cde0eb1e
dq 0xf57d4f7fee6ed178, 0xf57d4f7fee6ed178, 0xf57d4f7fee6ed178, 0xf57d4f7fee6ed178
dq 0x06f067aa72176fba, 0x06f067aa72176fba, 0x06f067aa72176fba, 0x06f067aa72176fba
dq 0x0a637dc5a2c898a6, 0x0a637dc5a2c898a6, 0x0a637dc5a2c898a6, 0x0a637dc5a2c898a6
dq 0x113f9804bef90dae, 0x113f9804bef90dae, 0x113f9804bef90dae, 0x113f9804bef90dae
dq 0x1b710b35131c471b, 0x1b710b35131c471b, 0x1b710b35131c471b, 0x1b710b35131c471b
dq 0x28db77f523047d84, 0x28db77f523047d84, 0x28db77f523047d84, 0x28db77f523047d84
dq 0x32caab7b40c72493, 0x32caab7b40c72493, 0x32caab7b40c72493, 0x32caab7b40c72493
dq 0x3c9ebe0a15c9bebc, 0x3c9ebe0a15c9bebc, 0x3c9ebe0a15c9bebc, 0x3c9ebe0a15c9bebc
dq 0x431d67c49c100d4c, 0x431d67c49c100d4c, 0x431d67c49c100d4c, 0x431d67c49c100d4c
dq 0x4cc5d4becb3e42b6, 0x4cc5d4becb3e42b6, 0x4cc5d4becb3e42b6, 0x4cc5d4becb3e42b6
dq 0x597f299cfc657e2a, 0x597f299cfc657e2a, 0x597f299cfc657e2a, 0x597f299cfc657e2a
dq 0x5fcb6fab3ad6faec, 0x5fcb6fab3ad6faec, 0x5fcb6fab3ad6faec, 0x5fcb6fab3ad6faec
dq 0x6c44198c4a475817, 0x6c44198c4a475817, 0x6c44198c4a475817, 0x6c44198c4a475817
align 32
PSHUFFLE_BYTE_FLIP_MASK: ;ddq 0x08090a0b0c0d0e0f0001020304050607
dq 0x0001020304050607, 0x08090a0b0c0d0e0f
;ddq 0x18191a1b1c1d1e1f1011121314151617
dq 0x1011121314151617, 0x18191a1b1c1d1e1f
section .text
%ifdef LINUX
%define arg1 rdi
%define arg2 rsi
%else
%define arg1 rcx
%define arg2 rdx
%endif
; Common definitions
%define STATE arg1
%define INP_SIZE arg2
%define IDX rax
%define ROUND rbx
%define TBL r8
%define inp0 r9
%define inp1 r10
%define inp2 r11
%define inp3 r12
%define a ymm0
%define b ymm1
%define c ymm2
%define d ymm3
%define e ymm4
%define f ymm5
%define g ymm6
%define h ymm7
%define a0 ymm8
%define a1 ymm9
%define a2 ymm10
%define TT0 ymm14
%define TT1 ymm13
%define TT2 ymm12
%define TT3 ymm11
%define TT4 ymm10
%define TT5 ymm9
%define T1 ymm14
%define TMP ymm15
%define SZ4 4*SHA512_DIGEST_WORD_SIZE ; Size of one vector register
%define ROUNDS 80*SZ4
; Define stack usage
;; Assume stack aligned to 32 bytes before call
;; Therefore FRAMESZ mod 32 must be 32-8 = 24
struc stack_frame
.data resb 16*SZ4
.digest resb NUM_SHA512_DIGEST_WORDS*SZ4
.align resb 24
endstruc
%define _DIGEST stack_frame.digest
%macro ROTATE_ARGS 0
%xdefine TMP_ h
%xdefine h g
%xdefine g f
%xdefine f e
%xdefine e d
%xdefine d c
%xdefine c b
%xdefine b a
%xdefine a TMP_
%endm
; PRORQ reg, imm, tmp
; packed-rotate-right-double
; does a rotate by doing two shifts and an or
%macro PRORQ 3
%define %%reg %1
%define %%imm %2
%define %%tmp %3
vpsllq %%tmp, %%reg, (64-(%%imm))
vpsrlq %%reg, %%reg, %%imm
vpor %%reg, %%reg, %%tmp
%endmacro
; non-destructive
; PRORQ_nd reg, imm, tmp, src
%macro PRORQ_nd 4
%define %%reg %1
%define %%imm %2
%define %%tmp %3
%define %%src %4
vpsllq %%tmp, %%src, (64-(%%imm))
vpsrlq %%reg, %%src, %%imm
vpor %%reg, %%reg, %%tmp
%endmacro
; PRORQ dst/src, amt
%macro PRORQ 2
PRORQ %1, %2, TMP
%endmacro
; PRORQ_nd dst, src, amt
%macro PRORQ_nd 3
PRORQ_nd %1, %3, TMP, %2
%endmacro
;; arguments passed implicitly in preprocessor symbols i, a...h
%macro ROUND_00_15 2
%define %%T1 %1
%define %%i %2
PRORQ_nd a0, e, (18-14) ; sig1: a0 = (e >> 4)
vpxor a2, f, g ; ch: a2 = f^g
vpand a2, a2, e ; ch: a2 = (f^g)&e
vpxor a2, a2, g ; a2 = ch
PRORQ_nd a1, e, 41 ; sig1: a1 = (e >> 41)
vmovdqa [SZ4*(%%i&0xf) + rsp],%%T1
vpaddq %%T1,%%T1,[TBL + ROUND] ; T1 = W + K
vpxor a0, a0, e ; sig1: a0 = e ^ (e >> 5)
PRORQ a0, 14 ; sig1: a0 = (e >> 14) ^ (e >> 18)
vpaddq h, h, a2 ; h = h + ch
PRORQ_nd a2, a, (34-28) ; sig0: a2 = (a >> 6)
vpaddq h, h, %%T1 ; h = h + ch + W + K
vpxor a0, a0, a1 ; a0 = sigma1
vmovdqa %%T1, a ; maj: T1 = a
PRORQ_nd a1, a, 39 ; sig0: a1 = (a >> 39)
vpxor %%T1, %%T1, c ; maj: T1 = a^c
add ROUND, SZ4 ; ROUND++
vpand %%T1, %%T1, b ; maj: T1 = (a^c)&b
vpaddq h, h, a0
vpaddq d, d, h
vpxor a2, a2, a ; sig0: a2 = a ^ (a >> 11)
PRORQ a2, 28 ; sig0: a2 = (a >> 28) ^ (a >> 34)
vpxor a2, a2, a1 ; a2 = sig0
vpand a1, a, c ; maj: a1 = a&c
vpor a1, a1, %%T1 ; a1 = maj
vpaddq h, h, a1 ; h = h + ch + W + K + maj
vpaddq h, h, a2 ; h = h + ch + W + K + maj + sigma0
ROTATE_ARGS
%endm
;; arguments passed implicitly in preprocessor symbols i, a...h
%macro ROUND_16_XX 2
%define %%T1 %1
%define %%i %2
vmovdqa %%T1, [SZ4*((%%i-15)&0xf) + rsp]
vmovdqa a1, [SZ4*((%%i-2)&0xf) + rsp]
vmovdqa a0, %%T1
PRORQ %%T1, 8-1
vmovdqa a2, a1
PRORQ a1, 61-19
vpxor %%T1, %%T1, a0
PRORQ %%T1, 1
vpxor a1, a1, a2
PRORQ a1, 19
vpsrlq a0, a0, 7
vpxor %%T1, %%T1, a0
vpsrlq a2, a2, 6
vpxor a1, a1, a2
vpaddq %%T1, %%T1, [SZ4*((%%i-16)&0xf) + rsp]
vpaddq a1, a1, [SZ4*((%%i-7)&0xf) + rsp]
vpaddq %%T1, %%T1, a1
ROUND_00_15 %%T1, %%i
%endm
;; void sha512_x4_avx2(void *STATE, const int INP_SIZE)
;; arg 1 : STATE : pointer to input data
;; arg 2 : INP_SIZE : size of data in blocks (assumed >= 1)
MKGLOBAL(sha512_x4_avx2,function,internal)
align 32
sha512_x4_avx2:
endbranch64
; general registers preserved in outer calling routine
; outer calling routine saves all the XMM registers
sub rsp, stack_frame_size
;; Load the pre-transposed incoming digest.
vmovdqu a, [STATE+ 0*SHA512_DIGEST_ROW_SIZE]
vmovdqu b, [STATE+ 1*SHA512_DIGEST_ROW_SIZE]
vmovdqu c, [STATE+ 2*SHA512_DIGEST_ROW_SIZE]
vmovdqu d, [STATE+ 3*SHA512_DIGEST_ROW_SIZE]
vmovdqu e, [STATE+ 4*SHA512_DIGEST_ROW_SIZE]
vmovdqu f, [STATE+ 5*SHA512_DIGEST_ROW_SIZE]
vmovdqu g, [STATE+ 6*SHA512_DIGEST_ROW_SIZE]
vmovdqu h, [STATE+ 7*SHA512_DIGEST_ROW_SIZE]
DBGPRINTL_YMM "sha512-avx2 Incoming digest", a, b, c, d, e, f, g, h
lea TBL,[K512_4]
;; load the address of each of the MAX_LANES (4) message lanes
;; getting ready to transpose input onto stack
mov inp0,[STATE + _data_ptr_sha512 + 0*PTR_SZ]
mov inp1,[STATE + _data_ptr_sha512 + 1*PTR_SZ]
mov inp2,[STATE + _data_ptr_sha512 + 2*PTR_SZ]
mov inp3,[STATE + _data_ptr_sha512 + 3*PTR_SZ]
xor IDX, IDX
lloop:
xor ROUND, ROUND
;; save old digest
vmovdqa [rsp + _DIGEST + 0*SZ4], a
vmovdqa [rsp + _DIGEST + 1*SZ4], b
vmovdqa [rsp + _DIGEST + 2*SZ4], c
vmovdqa [rsp + _DIGEST + 3*SZ4], d
vmovdqa [rsp + _DIGEST + 4*SZ4], e
vmovdqa [rsp + _DIGEST + 5*SZ4], f
vmovdqa [rsp + _DIGEST + 6*SZ4], g
vmovdqa [rsp + _DIGEST + 7*SZ4], h
%assign i 0
%rep 4
;; load up the shuffler for little-endian to big-endian format
vmovdqa TMP, [PSHUFFLE_BYTE_FLIP_MASK]
TRANSPOSE4_U64_LOAD4 TT4, TT1, TT5, TT3, inp0, inp1, inp2, inp3, IDX+i*32
TRANSPOSE4_U64 TT4, TT1, TT5, TT3, TT0, TT2
DBGPRINTL_YMM "sha512-avx2 Incoming data", TT0, TT1, TT2, TT3
vpshufb TT0, TT0, TMP
vpshufb TT1, TT1, TMP
vpshufb TT2, TT2, TMP
vpshufb TT3, TT3, TMP
ROUND_00_15 TT0,(i*4+0)
ROUND_00_15 TT1,(i*4+1)
ROUND_00_15 TT2,(i*4+2)
ROUND_00_15 TT3,(i*4+3)
%assign i (i+1)
%endrep
;; Increment IDX by message block size == 8 (loop) * 16 (XMM width in bytes)
add IDX, 4 * 32
%assign i (i*4)
jmp Lrounds_16_xx
align 16
Lrounds_16_xx:
endbranch64
%rep 16
ROUND_16_XX T1, i
%assign i (i+1)
%endrep
cmp ROUND,ROUNDS
jb Lrounds_16_xx
;; add old digest
vpaddq a, a, [rsp + _DIGEST + 0*SZ4]
vpaddq b, b, [rsp + _DIGEST + 1*SZ4]
vpaddq c, c, [rsp + _DIGEST + 2*SZ4]
vpaddq d, d, [rsp + _DIGEST + 3*SZ4]
vpaddq e, e, [rsp + _DIGEST + 4*SZ4]
vpaddq f, f, [rsp + _DIGEST + 5*SZ4]
vpaddq g, g, [rsp + _DIGEST + 6*SZ4]
vpaddq h, h, [rsp + _DIGEST + 7*SZ4]
sub INP_SIZE, 1 ;; consumed one message block
jne lloop
; write back to memory (state object) the transposed digest
vmovdqu [STATE+ 0*SHA512_DIGEST_ROW_SIZE ],a
vmovdqu [STATE+ 1*SHA512_DIGEST_ROW_SIZE ],b
vmovdqu [STATE+ 2*SHA512_DIGEST_ROW_SIZE ],c
vmovdqu [STATE+ 3*SHA512_DIGEST_ROW_SIZE ],d
vmovdqu [STATE+ 4*SHA512_DIGEST_ROW_SIZE ],e
vmovdqu [STATE+ 5*SHA512_DIGEST_ROW_SIZE ],f
vmovdqu [STATE+ 6*SHA512_DIGEST_ROW_SIZE ],g
vmovdqu [STATE+ 7*SHA512_DIGEST_ROW_SIZE ],h
DBGPRINTL_YMM "sha512-avx2 Outgoing digest", a, b, c, d, e, f, g, h
;; update input data pointers
add inp0, IDX
mov [STATE + _data_ptr_sha512 + 0*PTR_SZ], inp0
add inp1, IDX
mov [STATE + _data_ptr_sha512 + 1*PTR_SZ], inp1
add inp2, IDX
mov [STATE + _data_ptr_sha512 + 2*PTR_SZ], inp2
add inp3, IDX
mov [STATE + _data_ptr_sha512 + 3*PTR_SZ], inp3
;;;;;;;;;;;;;;;;
;; Postamble
;; Clear stack frame ((16 + 8)*32 bytes)
%ifdef SAFE_DATA
clear_all_ymms_asm
%assign i 0
%rep (16+NUM_SHA512_DIGEST_WORDS)
vmovdqa [rsp + i*SZ4], ymm0
%assign i (i+1)
%endrep
%endif
add rsp, stack_frame_size
; outer calling routine restores XMM and other GP registers
ret
%ifdef LINUX
section .note.GNU-stack noalloc noexec nowrite progbits
%endif
| 36.824561 | 82 | 0.76328 |
cd1594573500cd4723bbc4b883353c6e7cd8c50d | 4,052 | asm | Assembly | Transynther/x86/_processed/AVXALIGN/_st_zr_sm_/i7-7700_9_0xca.log_35_1610.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/AVXALIGN/_st_zr_sm_/i7-7700_9_0xca.log_35_1610.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/AVXALIGN/_st_zr_sm_/i7-7700_9_0xca.log_35_1610.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r14
push %r15
push %r8
push %rbx
push %rdi
push %rdx
lea addresses_WC_ht+0x4f2f, %rbx
nop
nop
nop
nop
dec %r14
mov $0x6162636465666768, %rdi
movq %rdi, %xmm5
and $0xffffffffffffffc0, %rbx
movntdq %xmm5, (%rbx)
nop
nop
nop
nop
nop
add %r15, %r15
lea addresses_normal_ht+0x5079, %r8
nop
nop
nop
nop
nop
xor $54472, %r10
movups (%r8), %xmm6
vpextrq $1, %xmm6, %rdx
nop
nop
nop
cmp $64366, %rdx
lea addresses_WC_ht+0x57b5, %r10
nop
nop
nop
nop
nop
inc %rdi
mov (%r10), %r8w
nop
nop
nop
nop
xor %r10, %r10
lea addresses_WC_ht+0xb4b5, %rdi
and %rbx, %rbx
movl $0x61626364, (%rdi)
sub %r8, %r8
lea addresses_UC_ht+0x1a3b5, %rbx
nop
nop
nop
nop
inc %r14
mov (%rbx), %rdi
nop
nop
nop
nop
add $47514, %rdi
lea addresses_UC_ht+0x1eab5, %rdx
clflush (%rdx)
nop
nop
xor %r15, %r15
mov $0x6162636465666768, %r8
movq %r8, (%rdx)
nop
nop
nop
cmp %rbx, %rbx
lea addresses_A_ht+0x46bd, %r15
cmp $62291, %rdi
mov (%r15), %ebx
nop
nop
nop
nop
xor $54326, %r14
pop %rdx
pop %rdi
pop %rbx
pop %r8
pop %r15
pop %r14
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r14
push %r15
push %r8
push %rax
push %rbp
push %rbx
push %rsi
// Store
lea addresses_A+0x44b5, %r8
nop
nop
and $27406, %r14
movb $0x51, (%r8)
nop
inc %r15
// Store
lea addresses_D+0x92b5, %r15
nop
nop
nop
nop
inc %rbx
mov $0x5152535455565758, %rbp
movq %rbp, %xmm4
movups %xmm4, (%r15)
nop
nop
nop
nop
nop
sub $21152, %rax
// Store
lea addresses_WC+0xcdb5, %rbx
add %rbp, %rbp
mov $0x5152535455565758, %r8
movq %r8, %xmm3
vmovntdq %ymm3, (%rbx)
nop
nop
nop
nop
xor %r14, %r14
// Store
lea addresses_US+0x1b5, %rbx
nop
add %rax, %rax
mov $0x5152535455565758, %r15
movq %r15, %xmm5
movaps %xmm5, (%rbx)
nop
nop
sub $12058, %rax
// Store
lea addresses_PSE+0x1dbd5, %r8
and $1776, %rsi
mov $0x5152535455565758, %rax
movq %rax, (%r8)
nop
nop
nop
nop
nop
add %r14, %r14
// Faulty Load
lea addresses_D+0x92b5, %r15
add $27304, %rbx
movntdqa (%r15), %xmm4
vpextrq $0, %xmm4, %r14
lea oracles, %r15
and $0xff, %r14
shlq $12, %r14
mov (%r15,%r14,1), %r14
pop %rsi
pop %rbx
pop %rbp
pop %rax
pop %r8
pop %r15
pop %r14
ret
/*
<gen_faulty_load>
[REF]
{'src': {'congruent': 0, 'AVXalign': False, 'same': False, 'size': 32, 'NT': False, 'type': 'addresses_D'}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'congruent': 9, 'AVXalign': False, 'same': False, 'size': 1, 'NT': False, 'type': 'addresses_A'}}
{'OP': 'STOR', 'dst': {'congruent': 0, 'AVXalign': False, 'same': True, 'size': 16, 'NT': False, 'type': 'addresses_D'}}
{'OP': 'STOR', 'dst': {'congruent': 5, 'AVXalign': False, 'same': False, 'size': 32, 'NT': True, 'type': 'addresses_WC'}}
{'OP': 'STOR', 'dst': {'congruent': 7, 'AVXalign': True, 'same': False, 'size': 16, 'NT': False, 'type': 'addresses_US'}}
{'OP': 'STOR', 'dst': {'congruent': 5, 'AVXalign': False, 'same': False, 'size': 8, 'NT': False, 'type': 'addresses_PSE'}}
[Faulty Load]
{'src': {'congruent': 0, 'AVXalign': False, 'same': True, 'size': 16, 'NT': True, 'type': 'addresses_D'}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'OP': 'STOR', 'dst': {'congruent': 1, 'AVXalign': False, 'same': False, 'size': 16, 'NT': True, 'type': 'addresses_WC_ht'}}
{'src': {'congruent': 2, 'AVXalign': False, 'same': False, 'size': 16, 'NT': False, 'type': 'addresses_normal_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 7, 'AVXalign': False, 'same': False, 'size': 2, 'NT': False, 'type': 'addresses_WC_ht'}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'congruent': 9, 'AVXalign': True, 'same': False, 'size': 4, 'NT': False, 'type': 'addresses_WC_ht'}}
{'src': {'congruent': 8, 'AVXalign': False, 'same': False, 'size': 8, 'NT': True, 'type': 'addresses_UC_ht'}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'congruent': 9, 'AVXalign': False, 'same': False, 'size': 8, 'NT': False, 'type': 'addresses_UC_ht'}}
{'src': {'congruent': 3, 'AVXalign': False, 'same': False, 'size': 4, 'NT': False, 'type': 'addresses_A_ht'}, 'OP': 'LOAD'}
{'00': 1, '58': 34}
58 58 58 58 58 58 58 58 58 58 58 58 58 00 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58
*/
| 19.574879 | 129 | 0.64388 |
e72e17b1ce31ce1dc94dcd8e3eb638ad82e9eb04 | 7,833 | asm | Assembly | Transynther/x86/_processed/NONE/_ht_zr_un_/i9-9900K_12_0xa0.log_21829_901.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_ht_zr_un_/i9-9900K_12_0xa0.log_21829_901.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_ht_zr_un_/i9-9900K_12_0xa0.log_21829_901.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r12
push %r15
push %rax
push %rbp
push %rcx
push %rdi
push %rsi
lea addresses_WT_ht+0x1bc79, %rsi
lea addresses_WC_ht+0x2ba9, %rdi
clflush (%rdi)
nop
add $51033, %rax
mov $86, %rcx
rep movsl
xor $34716, %rsi
lea addresses_normal_ht+0x4b6d, %r15
nop
nop
xor %r11, %r11
movups (%r15), %xmm0
vpextrq $0, %xmm0, %rbp
nop
nop
nop
nop
nop
dec %rsi
lea addresses_D_ht+0x156b9, %rsi
nop
nop
nop
nop
nop
xor $39994, %rdi
mov (%rsi), %r11d
add %rax, %rax
lea addresses_D_ht+0x2279, %rbp
nop
nop
xor $16673, %rdi
mov (%rbp), %rsi
nop
nop
nop
add $3019, %r11
lea addresses_D_ht+0x55a9, %rcx
nop
lfence
mov (%rcx), %r11d
nop
nop
nop
and $38999, %r15
lea addresses_A_ht+0x7679, %rcx
nop
nop
cmp $30368, %r15
vmovups (%rcx), %ymm4
vextracti128 $0, %ymm4, %xmm4
vpextrq $0, %xmm4, %rdi
nop
nop
nop
nop
inc %rax
lea addresses_normal_ht+0x17e79, %rsi
lea addresses_A_ht+0x166f9, %rdi
nop
sub $64640, %r12
mov $23, %rcx
rep movsw
nop
nop
nop
nop
dec %rax
lea addresses_normal_ht+0x162b9, %rsi
lea addresses_normal_ht+0x17279, %rdi
nop
and $59188, %r12
mov $83, %rcx
rep movsl
nop
nop
nop
nop
sub $41562, %rdi
lea addresses_WC_ht+0x1c279, %rdi
nop
nop
nop
nop
nop
xor %rax, %rax
mov $0x6162636465666768, %rcx
movq %rcx, %xmm4
vmovups %ymm4, (%rdi)
nop
nop
nop
inc %rdi
lea addresses_A_ht+0x15e9, %rsi
lea addresses_D_ht+0x2b79, %rdi
nop
nop
add $7637, %rbp
mov $34, %rcx
rep movsw
nop
nop
nop
nop
inc %r15
lea addresses_WC_ht+0x16834, %rsi
lea addresses_WC_ht+0x1e479, %rdi
clflush (%rdi)
nop
nop
xor %rbp, %rbp
mov $91, %rcx
rep movsl
nop
nop
nop
xor %r15, %r15
lea addresses_WT_ht+0x8e49, %rsi
lea addresses_WT_ht+0x190f9, %rdi
nop
nop
nop
nop
nop
sub $37998, %r11
mov $32, %rcx
rep movsl
add $31000, %rsi
lea addresses_A_ht+0x2861, %rsi
lea addresses_A_ht+0xb761, %rdi
nop
nop
nop
nop
nop
sub %r12, %r12
mov $97, %rcx
rep movsb
nop
nop
nop
nop
nop
cmp $12561, %rsi
pop %rsi
pop %rdi
pop %rcx
pop %rbp
pop %rax
pop %r15
pop %r12
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r12
push %r15
push %rax
push %rbp
push %rbx
push %rcx
push %rsi
// Store
lea addresses_D+0xc539, %rcx
nop
inc %rsi
mov $0x5152535455565758, %rbp
movq %rbp, (%rcx)
nop
nop
nop
nop
nop
and $42652, %rcx
// Faulty Load
lea addresses_A+0x2a79, %rcx
nop
nop
nop
nop
nop
and %r12, %r12
vmovups (%rcx), %ymm6
vextracti128 $0, %ymm6, %xmm6
vpextrq $1, %xmm6, %rbx
lea oracles, %rax
and $0xff, %rbx
shlq $12, %rbx
mov (%rax,%rbx,1), %rbx
pop %rsi
pop %rcx
pop %rbx
pop %rbp
pop %rax
pop %r15
pop %r12
ret
/*
<gen_faulty_load>
[REF]
{'src': {'NT': False, 'same': False, 'congruent': 0, 'type': 'addresses_A', 'AVXalign': False, 'size': 1}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 6, 'type': 'addresses_D', 'AVXalign': False, 'size': 8}}
[Faulty Load]
{'src': {'NT': False, 'same': True, 'congruent': 0, 'type': 'addresses_A', 'AVXalign': False, 'size': 32}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'same': False, 'congruent': 7, 'type': 'addresses_WT_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 2, 'type': 'addresses_WC_ht'}}
{'src': {'NT': False, 'same': False, 'congruent': 2, 'type': 'addresses_normal_ht', 'AVXalign': False, 'size': 16}, 'OP': 'LOAD'}
{'src': {'NT': False, 'same': False, 'congruent': 2, 'type': 'addresses_D_ht', 'AVXalign': False, 'size': 4}, 'OP': 'LOAD'}
{'src': {'NT': False, 'same': False, 'congruent': 11, 'type': 'addresses_D_ht', 'AVXalign': False, 'size': 8}, 'OP': 'LOAD'}
{'src': {'NT': False, 'same': False, 'congruent': 3, 'type': 'addresses_D_ht', 'AVXalign': False, 'size': 4}, 'OP': 'LOAD'}
{'src': {'NT': False, 'same': False, 'congruent': 10, 'type': 'addresses_A_ht', 'AVXalign': False, 'size': 32}, 'OP': 'LOAD'}
{'src': {'same': False, 'congruent': 9, 'type': 'addresses_normal_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 6, 'type': 'addresses_A_ht'}}
{'src': {'same': False, 'congruent': 5, 'type': 'addresses_normal_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 11, 'type': 'addresses_normal_ht'}}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 11, 'type': 'addresses_WC_ht', 'AVXalign': False, 'size': 32}}
{'src': {'same': True, 'congruent': 4, 'type': 'addresses_A_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 8, 'type': 'addresses_D_ht'}}
{'src': {'same': False, 'congruent': 0, 'type': 'addresses_WC_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 9, 'type': 'addresses_WC_ht'}}
{'src': {'same': False, 'congruent': 2, 'type': 'addresses_WT_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 5, 'type': 'addresses_WT_ht'}}
{'src': {'same': False, 'congruent': 2, 'type': 'addresses_A_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 3, 'type': 'addresses_A_ht'}}
{'44': 99, '48': 10887, '49': 337, '00': 2472, '45': 8033, 'ff': 1}
48 45 48 00 48 45 48 45 48 45 48 00 48 00 45 48 45 48 45 48 00 48 48 49 48 45 48 45 48 45 48 48 45 48 45 48 48 48 48 45 48 45 48 45 48 00 48 48 45 48 45 48 45 48 00 48 00 49 48 00 48 45 48 45 48 45 48 45 48 48 45 48 45 48 45 00 45 48 45 48 00 45 48 45 48 45 48 45 48 00 45 49 00 48 00 45 48 45 48 45 48 00 48 48 45 48 45 48 45 48 48 45 48 45 48 00 48 00 45 48 45 48 45 00 48 45 48 45 48 00 48 48 45 48 45 48 45 48 45 45 48 45 48 48 48 45 48 45 48 45 48 45 48 48 48 45 48 45 48 45 48 45 48 45 48 45 48 48 48 48 45 48 48 00 48 00 48 44 48 00 48 45 45 48 45 48 48 48 45 48 45 48 45 48 00 45 48 45 00 45 48 45 48 48 45 00 45 48 45 48 45 48 45 48 45 48 45 48 45 48 48 48 45 48 45 48 45 48 00 48 45 48 48 45 48 45 48 45 48 00 45 48 45 00 48 48 45 48 48 45 48 49 48 45 48 00 49 44 48 00 45 48 45 48 00 48 48 45 48 45 48 45 48 45 45 48 45 48 45 48 45 48 45 00 45 48 00 48 48 45 48 45 48 45 48 00 45 48 45 00 45 48 00 48 48 45 48 49 48 45 48 45 48 00 45 48 45 00 45 48 45 48 48 45 48 45 48 45 48 45 48 48 45 00 45 48 45 48 00 45 48 45 48 45 48 00 45 48 45 48 45 48 00 48 48 45 48 45 48 45 48 45 48 45 48 45 48 00 45 48 45 48 00 48 45 48 45 48 45 48 45 48 45 48 48 45 48 45 48 00 48 00 45 48 45 48 45 48 45 48 45 48 49 45 48 45 48 45 48 45 48 00 48 48 45 48 45 48 00 48 00 45 48 45 48 45 48 00 45 48 45 00 45 48 45 48 00 45 48 48 48 45 48 45 48 45 48 48 45 48 45 48 45 48 45 48 45 45 00 45 00 45 48 45 48 00 48 45 00 45 48 45 48 48 45 48 45 48 45 48 45 48 45 48 45 48 48 48 48 45 48 45 48 00 45 48 45 48 45 48 45 48 48 45 48 45 48 45 48 00 45 48 45 48 44 48 00 48 00 49 48 45 48 45 48 45 48 00 45 48 45 00 45 48 45 48 48 45 48 45 48 45 48 00 45 48 45 48 45 48 45 48 48 48 45 48 00 48 48 48 48 45 48 45 48 00 48 45 48 00 45 48 45 48 45 48 00 48 48 45 48 45 48 45 48 00 49 00 45 48 45 48 45 48 48 48 00 45 48 48 48 45 48 45 48 45 48 49 45 48 45 48 45 48 00 45 48 45 00 45 48 45 48 45 48 48 00 48 00 48 00 48 45 48 48 45 48 45 48 45 48 45 48 45 45 48 45 48 45 48 45 48 00 48 00 48 00 48 48 48 48 45 48 45 48 45 48 45 48 45 48 48 45 48 45 48 00 48 45 48 00 45 48 45 48 45 48 45 48 48 45 48 44 48 00 48 48 45 48 45 48 45 48 45 48 48 45 48 45 48 00 48 45 48 48 45 48 45 48 45 48 48 45 48 45 48 45 48 45 48 45 00 00 48 48 45 48 45 48 45 48 45 48 45 48 45 48 45 48 00 45 00 45 48 45 48 00 49 48 45 48 45 48 45 48 45 48 49 48 48 45 48 45 48 44 45 48 45 48 45 48 00 48 48 49 48 45 48 45 48 45 45 44 45 48 45 48 00 48 48 45 48 45 48 45 48 45 48 48 45 48 44 48 45 48 48 45 48 45 48 45 48 45 48 45 48 45 48 00 45 48 45 48 00 48 48 45 48 00 48 00 48 45 48 45 48 45 48 45 48 45 48 48 45 48 45 48 00 48 00 45 48 45 48 45 48 45 48 00 45 48 45 00 45 48 45 48 00 45 48 45 48 45 48 45 48 48 45 48 45 48 45 48 48 45 48 45 48 45 48 45 48 45 48 45 48 48 48 48 45 48 45 48 45 00 48 45 48 45 48 00 48 00 45 48 45 48 45 00 48 45 48 45 48 45 48 45 00 49 48 45 48 00 45 48 48 48 45 48 45 48 45 48 45 48 49 48 48 45 48 45 48 45 48 45 48 45 48 45 48 45 48 45 48 45 49 48 45 48 45 48 45 48 45 48 49 48 45 48 45 48 45 48 48 45 48 45 48 00 48
*/
| 33.050633 | 2,999 | 0.659645 |
c3dd54c243219947273cdbb1bc56f889bbbc20a5 | 810 | asm | Assembly | oeis/297/A297583.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/297/A297583.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/297/A297583.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A297583: Number of 2 X n 0..1 arrays with every 1 horizontally, diagonally or antidiagonally adjacent to 1 or 4 neighboring 1s.
; Submitted by Christian Krause
; 1,5,11,17,39,93,183,373,823,1741,3599,7637,16247,34125,71871,152133,321127,676861,1429135,3017909,6367607,13437869,28367775,59874021,126360711,266707549,562939183,1188130069,2507681687,5292853517,11171252159,23578239045,49765016487,105035732157,221691192655,467907736693,987580698295,2084416933229,4399430265311,9285568531877,19598397661383,41364952589085,87306087247215,184270814956501,388927420635607,820881674802637,1732577109123071,3656828421578501,7718209962060263,16290281748157821
add $0,2
mov $5,1
lpb $0
sub $0,1
sub $3,$4
mov $4,$2
mov $2,$3
add $2,$1
add $3,$5
mov $1,$3
mul $2,2
add $5,$4
mov $3,$5
lpe
mov $0,$5
| 40.5 | 489 | 0.78642 |
8b737a22d5c4e54c8bff79d24dd4cd2d84a8ec1f | 386 | asm | Assembly | oeis/194/A194770.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/194/A194770.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/194/A194770.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A194770: E.g.f. 2*sqrt(3)/3*arctan(sqrt(3)*x/(x+2)).
; Submitted by Stefano Spezia
; 1,-1,0,6,-24,0,720,-5040,0,362880,-3628800,0,479001600,-6227020800,0,1307674368000,-20922789888000,0,6402373705728000,-121645100408832000,0,51090942171709440000,-1124000727777607680000
mov $3,1
lpb $0
mov $2,$3
add $3,$1
mov $1,$0
sub $0,1
div $3,-1
mul $3,$1
mul $1,$2
lpe
mov $0,$3
| 24.125 | 186 | 0.676166 |
5c46c61040af78e8f53b9c4a2a4065a21838d5b5 | 1,846 | asm | Assembly | 0x05-libasm/8-strcasecmp.asm | gogomillan/holbertonschool-system_linux | 13c5bff024fd84c37e256977b106216a27d8cde1 | [
"MIT"
] | null | null | null | 0x05-libasm/8-strcasecmp.asm | gogomillan/holbertonschool-system_linux | 13c5bff024fd84c37e256977b106216a27d8cde1 | [
"MIT"
] | null | null | null | 0x05-libasm/8-strcasecmp.asm | gogomillan/holbertonschool-system_linux | 13c5bff024fd84c37e256977b106216a27d8cde1 | [
"MIT"
] | 2 | 2021-01-12T01:57:44.000Z | 2021-03-24T18:24:56.000Z | ; NASM code style
; Prototype when used in C: int asm_strcasecmp(const char *s1, const char *s2)
bits 64
section .text ; Code section
global asm_strcasecmp ; Exporting the function name
asm_strcasecmp:
push rbp ; prologue
mov rbp, rsp
push rdx ; save rdx value in stack
push r11 ; save r11 value in stack
push r12 ; save r12 value in stack
mov rdx, 0 ; start the iterator in 0
mov r11, 0 ; start the registeer compator 0
mov r12, 0 ; start the registeer compator 0
count_c: ; for statement
inc rdx ; increment the iterator
mov r12b, byte [rsi + rdx - 1] ; check if the char in arg1
mov r11b, byte [rdi + rdx - 1] ; check if the char in arg2
cmp r12b, 65 ; convert from uppercase to lowercase
jl next_count1 ; if the byte is in uppercase
cmp r12b, 91
jl conv_lower_arg1
next_count1:
cmp r11b, 65 ; convert from uppercase to lowercase
jl next_count2 ; if the byte is in uppercase
cmp r11b, 91
jl conv_lower_arg2
next_count2:
cmp r12b, 0x00 ; is not a null char
je end ; if it is go out of for loop
cmp r11b, 0x00 ; is not a null char
je end ; if it is go out of for loop
cmp r11b, r12b ; check if char in arg1 is eql to char in arg2
je count_c ; if it is, continue in the for loop
end: ; end lopp
mov rax, 0 ; set the return value in 0
mov rax, r11 ; compare the previous variables
sub rax, r12
pop r12
pop r11 ; set back the previous value of r8
pop rdx ; set back the previous value of rdx
mov rsp, rbp ; epilogue
pop rbp ; set back the previous value of rbp
ret ; return the len value
conv_lower_arg1: ; symbol: function that converts from uppercase to lowercase
add r12b, 32
jmp next_count1
conv_lower_arg2: ; symbol: function that converts from uppercase to lowercase
add r11b, 32
jmp next_count2
| 27.969697 | 79 | 0.692849 |
fa7a029da14b9fb6a496606e37a4d286b4ecc371 | 850 | asm | Assembly | assets/MemoryAccess/PointerTest/PointerTest.asm | jamespolley/VM-Translator | 2d573f5234d956a5fe4d5b9c607b4e98e04b403e | [
"MIT"
] | 1 | 2022-02-21T13:56:28.000Z | 2022-02-21T13:56:28.000Z | assets/MemoryAccess/PointerTest/PointerTest.asm | jamespolley/VM-Translator | 2d573f5234d956a5fe4d5b9c607b4e98e04b403e | [
"MIT"
] | null | null | null | assets/MemoryAccess/PointerTest/PointerTest.asm | jamespolley/VM-Translator | 2d573f5234d956a5fe4d5b9c607b4e98e04b403e | [
"MIT"
] | null | null | null | // push constant 3030
@3030
D=A
@SP
A=M
M=D
@SP
M=M+1
// pop pointer 0
@R3
D=A
@R13
M=D
@SP
AM=M-1
D=M
@R13
A=M
M=D
// push constant 3040
@3040
D=A
@SP
A=M
M=D
@SP
M=M+1
// pop pointer 1
@R4
D=A
@R13
M=D
@SP
AM=M-1
D=M
@R13
A=M
M=D
// push constant 32
@32
D=A
@SP
A=M
M=D
@SP
M=M+1
// pop this 2
@THIS
D=M
@2
A=D+A
D=A
@R13
M=D
@SP
AM=M-1
D=M
@R13
A=M
M=D
// push constant 46
@46
D=A
@SP
A=M
M=D
@SP
M=M+1
// pop that 6
@THAT
D=M
@6
A=D+A
D=A
@R13
M=D
@SP
AM=M-1
D=M
@R13
A=M
M=D
// push pointer 0
@R3
D=M
@SP
A=M
M=D
@SP
M=M+1
// push pointer 1
@R4
D=M
@SP
A=M
M=D
@SP
M=M+1
// add
@SP
AM=M-1
D=M
A=A-1
M=M+D
// push this 2
@THIS
D=M
@2
A=D+A
D=M
@SP
A=M
M=D
@SP
M=M+1
// sub
@SP
AM=M-1
D=M
A=A-1
M=M-D
// push that 6
@THAT
D=M
@6
A=D+A
D=M
@SP
A=M
M=D
@SP
M=M+1
// add
@SP
AM=M-1
D=M
A=A-1
M=M+D
(EXIT)
@EXIT
0;JMP
| 4.94186 | 21 | 0.535294 |
d4db19387890af2148fe84fcdd51bef3db17415e | 265,219 | asm | Assembly | sources/ippcp/asm_intel64_gas_converted/linux/pic/n0/singlecpu/pcpbnumulschoolsrvl9pp.asm | ymarkovitch/ipp-crypto | ac8f1c443cc79e9f2f8508f8c707c9ed0caa22c8 | [
"Apache-2.0"
] | null | null | null | sources/ippcp/asm_intel64_gas_converted/linux/pic/n0/singlecpu/pcpbnumulschoolsrvl9pp.asm | ymarkovitch/ipp-crypto | ac8f1c443cc79e9f2f8508f8c707c9ed0caa22c8 | [
"Apache-2.0"
] | null | null | null | sources/ippcp/asm_intel64_gas_converted/linux/pic/n0/singlecpu/pcpbnumulschoolsrvl9pp.asm | ymarkovitch/ipp-crypto | ac8f1c443cc79e9f2f8508f8c707c9ed0caa22c8 | [
"Apache-2.0"
] | null | null | null | ###############################################################################
# Copyright 2019 Intel Corporation
# All Rights Reserved.
#
# If this software was obtained under the Intel Simplified Software License,
# the following terms apply:
#
# The source code, information and material ("Material") contained herein is
# owned by Intel Corporation or its suppliers or licensors, and title to such
# Material remains with Intel Corporation or its suppliers or licensors. The
# Material contains proprietary information of Intel or its suppliers and
# licensors. The Material is protected by worldwide copyright laws and treaty
# provisions. No part of the Material may be used, copied, reproduced,
# modified, published, uploaded, posted, transmitted, distributed or disclosed
# in any way without Intel's prior express written permission. No license under
# any patent, copyright or other intellectual property rights in the Material
# is granted to or conferred upon you, either expressly, by implication,
# inducement, estoppel or otherwise. Any license under such intellectual
# property rights must be express and approved by Intel in writing.
#
# Unless otherwise agreed by Intel in writing, you may not remove or alter this
# notice or any other notice embedded in Materials by Intel or Intel's
# suppliers or licensors in any way.
#
#
# If this software was obtained under the Apache License, Version 2.0 (the
# "License"), the following terms apply:
#
# You may not use this file except in compliance with the License. You may
# obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0
#
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
#
# See the License for the specific language governing permissions and
# limitations under the License.
###############################################################################
.section .note.GNU-stack,"",%progbits
.text
.p2align 6, 0x90
.type mla_1x1, @function
mla_1x1:
movq (%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (%rdi)
adox %rax, %rbx
mov %rbx, %r8
ret
.Lfe1:
.size mla_1x1, .Lfe1-(mla_1x1)
.p2align 6, 0x90
.type mul_1x1, @function
mul_1x1:
movq (%rcx), %rdx
mulxq (%rsi), %rax, %rdx
movq %rax, (%rdi)
movq %rdx, (8)(%rdi)
ret
.Lfe2:
.size mul_1x1, .Lfe2-(mul_1x1)
.p2align 6, 0x90
.type mla_2x2, @function
mla_2x2:
movq (%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rax, %rbp
adox %rax, %rbp
mov %rbp, %r9
movq (8)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (8)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rax, %rbp
adox %rax, %rbp
mov %rbp, %r9
ret
.Lfe3:
.size mla_2x2, .Lfe3-(mla_2x2)
.p2align 6, 0x90
.type mul_2x2, @function
mul_2x2:
call mla_2x2
movq %r8, (16)(%rdi)
movq %r9, (24)(%rdi)
ret
.Lfe4:
.size mul_2x2, .Lfe4-(mul_2x2)
.p2align 6, 0x90
.type mla_3x3, @function
mla_3x3:
movq (%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rax, %rbx
adox %rax, %rbx
mov %rbx, %r10
movq (8)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (8)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rax, %rbx
adox %rax, %rbx
mov %rbx, %r10
movq (16)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (16)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rax, %rbx
adox %rax, %rbx
mov %rbx, %r10
ret
.Lfe5:
.size mla_3x3, .Lfe5-(mla_3x3)
.p2align 6, 0x90
.type mul_3x3, @function
mul_3x3:
call mla_3x3
movq %r8, (24)(%rdi)
movq %r9, (32)(%rdi)
movq %r10, (40)(%rdi)
ret
.Lfe6:
.size mul_3x3, .Lfe6-(mul_3x3)
.p2align 6, 0x90
.type mla_4x4, @function
mla_4x4:
movq (%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rax, %rbp
adox %rax, %rbp
mov %rbp, %r11
movq (8)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (8)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rax, %rbp
adox %rax, %rbp
mov %rbp, %r11
movq (16)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (16)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rax, %rbp
adox %rax, %rbp
mov %rbp, %r11
movq (24)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (24)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rax, %rbp
adox %rax, %rbp
mov %rbp, %r11
ret
.Lfe7:
.size mla_4x4, .Lfe7-(mla_4x4)
.p2align 6, 0x90
.type mul_4x4, @function
mul_4x4:
call mla_4x4
movq %r8, (32)(%rdi)
movq %r9, (40)(%rdi)
movq %r10, (48)(%rdi)
movq %r11, (56)(%rdi)
ret
.Lfe8:
.size mul_4x4, .Lfe8-(mul_4x4)
.p2align 6, 0x90
.type mla_5x5, @function
mla_5x5:
mov (%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rax, %rbx
adox %rax, %rbx
mov %rbx, %r12
mov (8)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (8)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rax, %rbx
adox %rax, %rbx
mov %rbx, %r12
mov (16)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (16)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rax, %rbx
adox %rax, %rbx
mov %rbx, %r12
mov (24)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (24)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rax, %rbx
adox %rax, %rbx
mov %rbx, %r12
mov (32)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (32)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rax, %rbx
adox %rax, %rbx
mov %rbx, %r12
ret
.Lfe9:
.size mla_5x5, .Lfe9-(mla_5x5)
.p2align 6, 0x90
.type mul_5x5, @function
mul_5x5:
call mla_5x5
movq %r8, (40)(%rdi)
movq %r9, (48)(%rdi)
movq %r10, (56)(%rdi)
movq %r11, (64)(%rdi)
movq %r12, (72)(%rdi)
ret
.Lfe10:
.size mul_5x5, .Lfe10-(mul_5x5)
.p2align 6, 0x90
.type mla_6x6, @function
mla_6x6:
mov (%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rax, %rbp
adox %rax, %rbp
mov %rbp, %r13
mov (8)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (8)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rax, %rbp
adox %rax, %rbp
mov %rbp, %r13
mov (16)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (16)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rax, %rbp
adox %rax, %rbp
mov %rbp, %r13
mov (24)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (24)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rax, %rbp
adox %rax, %rbp
mov %rbp, %r13
mov (32)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (32)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rax, %rbp
adox %rax, %rbp
mov %rbp, %r13
mov (40)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (40)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rax, %rbp
adox %rax, %rbp
mov %rbp, %r13
ret
.Lfe11:
.size mla_6x6, .Lfe11-(mla_6x6)
.p2align 6, 0x90
.type mul_6x6, @function
mul_6x6:
call mla_6x6
movq %r8, (48)(%rdi)
movq %r9, (56)(%rdi)
movq %r10, (64)(%rdi)
movq %r11, (72)(%rdi)
movq %r12, (80)(%rdi)
movq %r13, (88)(%rdi)
ret
.Lfe12:
.size mul_6x6, .Lfe12-(mul_6x6)
.p2align 6, 0x90
.type mla_7x7, @function
mla_7x7:
mov (%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rbp, %r14
mulx (48)(%rsi), %r13, %rbx
adox %r14, %r13
adcx %rax, %rbx
adox %rax, %rbx
mov %rbx, %r14
mov (8)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (8)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rbp, %r14
mulx (48)(%rsi), %r13, %rbx
adox %r14, %r13
adcx %rax, %rbx
adox %rax, %rbx
mov %rbx, %r14
mov (16)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (16)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rbp, %r14
mulx (48)(%rsi), %r13, %rbx
adox %r14, %r13
adcx %rax, %rbx
adox %rax, %rbx
mov %rbx, %r14
mov (24)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (24)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rbp, %r14
mulx (48)(%rsi), %r13, %rbx
adox %r14, %r13
adcx %rax, %rbx
adox %rax, %rbx
mov %rbx, %r14
mov (32)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (32)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rbp, %r14
mulx (48)(%rsi), %r13, %rbx
adox %r14, %r13
adcx %rax, %rbx
adox %rax, %rbx
mov %rbx, %r14
mov (40)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (40)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rbp, %r14
mulx (48)(%rsi), %r13, %rbx
adox %r14, %r13
adcx %rax, %rbx
adox %rax, %rbx
mov %rbx, %r14
mov (48)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (48)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rbp, %r14
mulx (48)(%rsi), %r13, %rbx
adox %r14, %r13
adcx %rax, %rbx
adox %rax, %rbx
mov %rbx, %r14
ret
.Lfe13:
.size mla_7x7, .Lfe13-(mla_7x7)
.p2align 6, 0x90
.type mul_7x7, @function
mul_7x7:
call mla_7x7
movq %r8, (56)(%rdi)
movq %r9, (64)(%rdi)
movq %r10, (72)(%rdi)
movq %r11, (80)(%rdi)
movq %r12, (88)(%rdi)
movq %r13, (96)(%rdi)
movq %r14, (104)(%rdi)
ret
.Lfe14:
.size mul_7x7, .Lfe14-(mul_7x7)
.p2align 6, 0x90
.type mla_8x1, @function
mla_8x1:
mov (%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rbp, %r14
mulx (48)(%rsi), %r13, %rbx
adox %r14, %r13
adcx %r15, %rbx
mulx (56)(%rsi), %r14, %r15
adox %rbx, %r14
adcx %rax, %r15
adox %rax, %r15
ret
.Lfe15:
.size mla_8x1, .Lfe15-(mla_8x1)
.p2align 6, 0x90
.type mla_8x2, @function
mla_8x2:
mov (%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rbp, %r14
mulx (48)(%rsi), %r13, %rbx
adox %r14, %r13
adcx %r15, %rbx
mulx (56)(%rsi), %r14, %r15
adox %rbx, %r14
adcx %rax, %r15
adox %rax, %r15
mov (8)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (8)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rbp, %r14
mulx (48)(%rsi), %r13, %rbx
adox %r14, %r13
adcx %r15, %rbx
mulx (56)(%rsi), %r14, %r15
adox %rbx, %r14
adcx %rax, %r15
adox %rax, %r15
ret
.Lfe16:
.size mla_8x2, .Lfe16-(mla_8x2)
.p2align 6, 0x90
.type mla_8x3, @function
mla_8x3:
mov (%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rbp, %r14
mulx (48)(%rsi), %r13, %rbx
adox %r14, %r13
adcx %r15, %rbx
mulx (56)(%rsi), %r14, %r15
adox %rbx, %r14
adcx %rax, %r15
adox %rax, %r15
mov (8)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (8)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rbp, %r14
mulx (48)(%rsi), %r13, %rbx
adox %r14, %r13
adcx %r15, %rbx
mulx (56)(%rsi), %r14, %r15
adox %rbx, %r14
adcx %rax, %r15
adox %rax, %r15
mov (16)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (16)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rbp, %r14
mulx (48)(%rsi), %r13, %rbx
adox %r14, %r13
adcx %r15, %rbx
mulx (56)(%rsi), %r14, %r15
adox %rbx, %r14
adcx %rax, %r15
adox %rax, %r15
ret
.Lfe17:
.size mla_8x3, .Lfe17-(mla_8x3)
.p2align 6, 0x90
.type mla_8x4, @function
mla_8x4:
mov (%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rbp, %r14
mulx (48)(%rsi), %r13, %rbx
adox %r14, %r13
adcx %r15, %rbx
mulx (56)(%rsi), %r14, %r15
adox %rbx, %r14
adcx %rax, %r15
adox %rax, %r15
mov (8)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (8)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rbp, %r14
mulx (48)(%rsi), %r13, %rbx
adox %r14, %r13
adcx %r15, %rbx
mulx (56)(%rsi), %r14, %r15
adox %rbx, %r14
adcx %rax, %r15
adox %rax, %r15
mov (16)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (16)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rbp, %r14
mulx (48)(%rsi), %r13, %rbx
adox %r14, %r13
adcx %r15, %rbx
mulx (56)(%rsi), %r14, %r15
adox %rbx, %r14
adcx %rax, %r15
adox %rax, %r15
mov (24)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (24)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rbp, %r14
mulx (48)(%rsi), %r13, %rbx
adox %r14, %r13
adcx %r15, %rbx
mulx (56)(%rsi), %r14, %r15
adox %rbx, %r14
adcx %rax, %r15
adox %rax, %r15
ret
.Lfe18:
.size mla_8x4, .Lfe18-(mla_8x4)
.p2align 6, 0x90
.type mla_8x5, @function
mla_8x5:
mov (%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rbp, %r14
mulx (48)(%rsi), %r13, %rbx
adox %r14, %r13
adcx %r15, %rbx
mulx (56)(%rsi), %r14, %r15
adox %rbx, %r14
adcx %rax, %r15
adox %rax, %r15
mov (8)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (8)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rbp, %r14
mulx (48)(%rsi), %r13, %rbx
adox %r14, %r13
adcx %r15, %rbx
mulx (56)(%rsi), %r14, %r15
adox %rbx, %r14
adcx %rax, %r15
adox %rax, %r15
mov (16)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (16)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rbp, %r14
mulx (48)(%rsi), %r13, %rbx
adox %r14, %r13
adcx %r15, %rbx
mulx (56)(%rsi), %r14, %r15
adox %rbx, %r14
adcx %rax, %r15
adox %rax, %r15
mov (24)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (24)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rbp, %r14
mulx (48)(%rsi), %r13, %rbx
adox %r14, %r13
adcx %r15, %rbx
mulx (56)(%rsi), %r14, %r15
adox %rbx, %r14
adcx %rax, %r15
adox %rax, %r15
mov (32)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (32)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rbp, %r14
mulx (48)(%rsi), %r13, %rbx
adox %r14, %r13
adcx %r15, %rbx
mulx (56)(%rsi), %r14, %r15
adox %rbx, %r14
adcx %rax, %r15
adox %rax, %r15
ret
.Lfe19:
.size mla_8x5, .Lfe19-(mla_8x5)
.p2align 6, 0x90
.type mla_8x6, @function
mla_8x6:
mov (%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rbp, %r14
mulx (48)(%rsi), %r13, %rbx
adox %r14, %r13
adcx %r15, %rbx
mulx (56)(%rsi), %r14, %r15
adox %rbx, %r14
adcx %rax, %r15
adox %rax, %r15
mov (8)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (8)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rbp, %r14
mulx (48)(%rsi), %r13, %rbx
adox %r14, %r13
adcx %r15, %rbx
mulx (56)(%rsi), %r14, %r15
adox %rbx, %r14
adcx %rax, %r15
adox %rax, %r15
mov (16)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (16)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rbp, %r14
mulx (48)(%rsi), %r13, %rbx
adox %r14, %r13
adcx %r15, %rbx
mulx (56)(%rsi), %r14, %r15
adox %rbx, %r14
adcx %rax, %r15
adox %rax, %r15
mov (24)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (24)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rbp, %r14
mulx (48)(%rsi), %r13, %rbx
adox %r14, %r13
adcx %r15, %rbx
mulx (56)(%rsi), %r14, %r15
adox %rbx, %r14
adcx %rax, %r15
adox %rax, %r15
mov (32)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (32)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rbp, %r14
mulx (48)(%rsi), %r13, %rbx
adox %r14, %r13
adcx %r15, %rbx
mulx (56)(%rsi), %r14, %r15
adox %rbx, %r14
adcx %rax, %r15
adox %rax, %r15
mov (40)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (40)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rbp, %r14
mulx (48)(%rsi), %r13, %rbx
adox %r14, %r13
adcx %r15, %rbx
mulx (56)(%rsi), %r14, %r15
adox %rbx, %r14
adcx %rax, %r15
adox %rax, %r15
ret
.Lfe20:
.size mla_8x6, .Lfe20-(mla_8x6)
.p2align 6, 0x90
.type mla_8x7, @function
mla_8x7:
mov (%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rbp, %r14
mulx (48)(%rsi), %r13, %rbx
adox %r14, %r13
adcx %r15, %rbx
mulx (56)(%rsi), %r14, %r15
adox %rbx, %r14
adcx %rax, %r15
adox %rax, %r15
mov (8)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (8)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rbp, %r14
mulx (48)(%rsi), %r13, %rbx
adox %r14, %r13
adcx %r15, %rbx
mulx (56)(%rsi), %r14, %r15
adox %rbx, %r14
adcx %rax, %r15
adox %rax, %r15
mov (16)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (16)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rbp, %r14
mulx (48)(%rsi), %r13, %rbx
adox %r14, %r13
adcx %r15, %rbx
mulx (56)(%rsi), %r14, %r15
adox %rbx, %r14
adcx %rax, %r15
adox %rax, %r15
mov (24)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (24)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rbp, %r14
mulx (48)(%rsi), %r13, %rbx
adox %r14, %r13
adcx %r15, %rbx
mulx (56)(%rsi), %r14, %r15
adox %rbx, %r14
adcx %rax, %r15
adox %rax, %r15
mov (32)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (32)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rbp, %r14
mulx (48)(%rsi), %r13, %rbx
adox %r14, %r13
adcx %r15, %rbx
mulx (56)(%rsi), %r14, %r15
adox %rbx, %r14
adcx %rax, %r15
adox %rax, %r15
mov (40)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (40)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rbp, %r14
mulx (48)(%rsi), %r13, %rbx
adox %r14, %r13
adcx %r15, %rbx
mulx (56)(%rsi), %r14, %r15
adox %rbx, %r14
adcx %rax, %r15
adox %rax, %r15
mov (48)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (48)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rbp, %r14
mulx (48)(%rsi), %r13, %rbx
adox %r14, %r13
adcx %r15, %rbx
mulx (56)(%rsi), %r14, %r15
adox %rbx, %r14
adcx %rax, %r15
adox %rax, %r15
ret
.Lfe21:
.size mla_8x7, .Lfe21-(mla_8x7)
.p2align 6, 0x90
.type mla_8x8, @function
mla_8x8:
mov (%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rbp, %r14
mulx (48)(%rsi), %r13, %rbx
adox %r14, %r13
adcx %r15, %rbx
mulx (56)(%rsi), %r14, %r15
adox %rbx, %r14
adcx %rax, %r15
adox %rax, %r15
mov (8)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (8)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rbp, %r14
mulx (48)(%rsi), %r13, %rbx
adox %r14, %r13
adcx %r15, %rbx
mulx (56)(%rsi), %r14, %r15
adox %rbx, %r14
adcx %rax, %r15
adox %rax, %r15
mov (16)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (16)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rbp, %r14
mulx (48)(%rsi), %r13, %rbx
adox %r14, %r13
adcx %r15, %rbx
mulx (56)(%rsi), %r14, %r15
adox %rbx, %r14
adcx %rax, %r15
adox %rax, %r15
mov (24)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (24)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rbp, %r14
mulx (48)(%rsi), %r13, %rbx
adox %r14, %r13
adcx %r15, %rbx
mulx (56)(%rsi), %r14, %r15
adox %rbx, %r14
adcx %rax, %r15
adox %rax, %r15
mov (32)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (32)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rbp, %r14
mulx (48)(%rsi), %r13, %rbx
adox %r14, %r13
adcx %r15, %rbx
mulx (56)(%rsi), %r14, %r15
adox %rbx, %r14
adcx %rax, %r15
adox %rax, %r15
mov (40)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (40)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rbp, %r14
mulx (48)(%rsi), %r13, %rbx
adox %r14, %r13
adcx %r15, %rbx
mulx (56)(%rsi), %r14, %r15
adox %rbx, %r14
adcx %rax, %r15
adox %rax, %r15
mov (48)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (48)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rbp, %r14
mulx (48)(%rsi), %r13, %rbx
adox %r14, %r13
adcx %r15, %rbx
mulx (56)(%rsi), %r14, %r15
adox %rbx, %r14
adcx %rax, %r15
adox %rax, %r15
mov (56)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (56)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rbp, %r14
mulx (48)(%rsi), %r13, %rbx
adox %r14, %r13
adcx %r15, %rbx
mulx (56)(%rsi), %r14, %r15
adox %rbx, %r14
adcx %rax, %r15
adox %rax, %r15
ret
.Lfe22:
.size mla_8x8, .Lfe22-(mla_8x8)
.p2align 6, 0x90
.type mul_8x8, @function
mul_8x8:
call mla_8x8
movq %r8, (64)(%rdi)
movq %r9, (72)(%rdi)
movq %r10, (80)(%rdi)
movq %r11, (88)(%rdi)
movq %r12, (96)(%rdi)
movq %r13, (104)(%rdi)
movq %r14, (112)(%rdi)
movq %r15, (120)(%rdi)
ret
.Lfe23:
.size mul_8x8, .Lfe23-(mul_8x8)
.p2align 6, 0x90
.type mul_9x9, @function
mul_9x9:
call mla_8x8
mov (64)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (64)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rbp, %r14
mulx (48)(%rsi), %r13, %rbx
adox %r14, %r13
adcx %r15, %rbx
mulx (56)(%rsi), %r14, %r15
adox %rbx, %r14
adcx %rax, %r15
adox %rax, %r15
push %r15
mov (64)(%rsi), %rdx
mov (64)(%rdi), %r15
xor %rax, %rax
mulx (%rcx), %rbp, %rbx
adox %rbp, %r15
mov %r15, (64)(%rdi)
adcx %rbx, %r8
mulx (8)(%rcx), %r15, %rbp
adox %r8, %r15
adcx %rbp, %r9
mulx (16)(%rcx), %r8, %rbx
adox %r9, %r8
adcx %rbx, %r10
mulx (24)(%rcx), %r9, %rbp
adox %r10, %r9
adcx %rbp, %r11
mulx (32)(%rcx), %r10, %rbx
adox %r11, %r10
adcx %rbx, %r12
mulx (40)(%rcx), %r11, %rbp
adox %r12, %r11
adcx %rbp, %r13
mulx (48)(%rcx), %r12, %rbx
adox %r13, %r12
adcx %r14, %rbx
mulx (56)(%rcx), %r13, %r14
adox %rbx, %r13
adcx %rax, %r14
adox %rax, %r14
movq %r15, (72)(%rdi)
mulx (64)(%rcx), %rbp, %r15
pop %rax
add %rax, %r14
adc $(0), %r15
add %rbp, %r14
adc $(0), %r15
movq %r8, (80)(%rdi)
movq %r9, (88)(%rdi)
movq %r10, (96)(%rdi)
movq %r11, (104)(%rdi)
movq %r12, (112)(%rdi)
movq %r13, (120)(%rdi)
movq %r14, (128)(%rdi)
movq %r15, (136)(%rdi)
ret
.Lfe24:
.size mul_9x9, .Lfe24-(mul_9x9)
.p2align 6, 0x90
.type mul_10x10, @function
mul_10x10:
call mla_8x8
add $(64), %rdi
add $(64), %rcx
call mla_8x2
push %r15
push %r14
add $(64), %rsi
sub $(64), %rcx
xor %rsi, %rcx
xor %rcx, %rsi
xor %rsi, %rcx
mov %r13, %r15
mov %r12, %r14
mov %r11, %r13
mov %r10, %r12
mov %r9, %r11
mov %r8, %r10
movq (8)(%rdi), %r9
movq (%rdi), %r8
call mla_8x2
movq %r8, (16)(%rdi)
movq %r9, (24)(%rdi)
movq %r10, (32)(%rdi)
movq %r11, (40)(%rdi)
movq %r12, (48)(%rdi)
movq %r13, (56)(%rdi)
add $(64), %rdi
xor %r10, %r10
pop %r8
pop %r9
add %r14, %r8
adc %r15, %r9
adc $(0), %r10
xor %rsi, %rcx
xor %rcx, %rsi
xor %rsi, %rcx
add $(64), %rcx
call mla_2x2
add $(16), %rdi
add %r10, %r8
adc $(0), %r9
movq %r8, (%rdi)
movq %r9, (8)(%rdi)
ret
.Lfe25:
.size mul_10x10, .Lfe25-(mul_10x10)
.p2align 6, 0x90
.type mul_11x11, @function
mul_11x11:
call mla_8x8
add $(64), %rdi
add $(64), %rcx
call mla_8x3
push %r15
push %r14
push %r13
add $(64), %rsi
sub $(64), %rcx
xor %rsi, %rcx
xor %rcx, %rsi
xor %rsi, %rcx
mov %r12, %r15
mov %r11, %r14
mov %r10, %r13
mov %r9, %r12
mov %r8, %r11
movq (16)(%rdi), %r10
movq (8)(%rdi), %r9
movq (%rdi), %r8
call mla_8x3
movq %r8, (24)(%rdi)
movq %r9, (32)(%rdi)
movq %r10, (40)(%rdi)
movq %r11, (48)(%rdi)
movq %r12, (56)(%rdi)
add $(64), %rdi
xor %r11, %r11
pop %r8
pop %r9
pop %r10
add %r13, %r8
adc %r14, %r9
adc %r15, %r10
adc $(0), %r11
xor %rsi, %rcx
xor %rcx, %rsi
xor %rsi, %rcx
add $(64), %rcx
call mla_3x3
add $(24), %rdi
add %r11, %r8
adc $(0), %r9
adc $(0), %r10
movq %r8, (%rdi)
movq %r9, (8)(%rdi)
movq %r10, (16)(%rdi)
ret
.Lfe26:
.size mul_11x11, .Lfe26-(mul_11x11)
.p2align 6, 0x90
.type mul_12x12, @function
mul_12x12:
call mla_8x8
add $(64), %rdi
add $(64), %rcx
call mla_8x4
push %r15
push %r14
push %r13
push %r12
add $(64), %rsi
sub $(64), %rcx
xor %rsi, %rcx
xor %rcx, %rsi
xor %rsi, %rcx
mov %r11, %r15
mov %r10, %r14
mov %r9, %r13
mov %r8, %r12
movq (24)(%rdi), %r11
movq (16)(%rdi), %r10
movq (8)(%rdi), %r9
movq (%rdi), %r8
call mla_8x4
movq %r8, (32)(%rdi)
movq %r9, (40)(%rdi)
movq %r10, (48)(%rdi)
movq %r11, (56)(%rdi)
add $(64), %rdi
xor %rax, %rax
pop %r8
pop %r9
pop %r10
pop %r11
add %r12, %r8
adc %r13, %r9
adc %r14, %r10
adc %r15, %r11
adc $(0), %rax
push %rax
xor %rsi, %rcx
xor %rcx, %rsi
xor %rsi, %rcx
add $(64), %rcx
call mla_4x4
add $(32), %rdi
pop %rax
add %rax, %r8
adc $(0), %r9
adc $(0), %r10
adc $(0), %r11
movq %r8, (%rdi)
movq %r9, (8)(%rdi)
movq %r10, (16)(%rdi)
movq %r11, (24)(%rdi)
ret
.Lfe27:
.size mul_12x12, .Lfe27-(mul_12x12)
.p2align 6, 0x90
.type mul_13x13, @function
mul_13x13:
call mla_8x8
add $(64), %rdi
add $(64), %rcx
call mla_8x5
push %r15
push %r14
push %r13
push %r12
push %r11
add $(64), %rsi
sub $(64), %rcx
xor %rsi, %rcx
xor %rcx, %rsi
xor %rsi, %rcx
mov %r10, %r15
mov %r9, %r14
mov %r8, %r13
movq (32)(%rdi), %r12
movq (24)(%rdi), %r11
movq (16)(%rdi), %r10
movq (8)(%rdi), %r9
movq (%rdi), %r8
call mla_8x5
movq %r8, (40)(%rdi)
movq %r9, (48)(%rdi)
movq %r10, (56)(%rdi)
add $(64), %rdi
xor %rax, %rax
pop %r8
pop %r9
pop %r10
pop %rbx
pop %rbp
add %r11, %r8
adc %r12, %r9
adc %r13, %r10
adc %r14, %rbx
adc %r15, %rbp
adc $(0), %rax
push %rax
mov %rbx, %r11
mov %rbp, %r12
xor %rsi, %rcx
xor %rcx, %rsi
xor %rsi, %rcx
add $(64), %rcx
call mla_5x5
add $(40), %rdi
pop %rax
add %rax, %r8
adc $(0), %r9
adc $(0), %r10
adc $(0), %r11
adc $(0), %r12
movq %r8, (%rdi)
movq %r9, (8)(%rdi)
movq %r10, (16)(%rdi)
movq %r11, (24)(%rdi)
movq %r12, (32)(%rdi)
ret
.Lfe28:
.size mul_13x13, .Lfe28-(mul_13x13)
.p2align 6, 0x90
.type mul_14x14, @function
mul_14x14:
call mla_7x7
add $(56), %rdi
add $(56), %rsi
call mla_7x7
movq %r8, (56)(%rdi)
movq %r9, (64)(%rdi)
movq %r10, (72)(%rdi)
movq %r11, (80)(%rdi)
movq %r12, (88)(%rdi)
movq %r13, (96)(%rdi)
movq %r14, (104)(%rdi)
movq (%rdi), %r8
movq (8)(%rdi), %r9
movq (16)(%rdi), %r10
movq (24)(%rdi), %r11
movq (32)(%rdi), %r12
movq (40)(%rdi), %r13
movq (48)(%rdi), %r14
add $(56), %rcx
sub $(56), %rsi
call mla_7x7
xor %rdx, %rdx
movq (56)(%rdi), %rax
add %rax, %r8
movq (64)(%rdi), %rax
adc %rax, %r9
movq (72)(%rdi), %rax
adc %rax, %r10
movq (80)(%rdi), %rax
adc %rax, %r11
movq (88)(%rdi), %rax
adc %rax, %r12
movq (96)(%rdi), %rax
adc %rax, %r13
movq (104)(%rdi), %rax
adc %rax, %r14
adc $(0), %rdx
push %rdx
add $(56), %rdi
add $(56), %rsi
call mla_7x7
sub $(112), %rdi
sub $(56), %rsi
sub $(56), %rcx
pop %rdx
add %rdx, %r8
adc $(0), %r9
adc $(0), %r10
adc $(0), %r11
adc $(0), %r12
adc $(0), %r13
adc $(0), %r14
movq %r8, (168)(%rdi)
movq %r9, (176)(%rdi)
movq %r10, (184)(%rdi)
movq %r11, (192)(%rdi)
movq %r12, (200)(%rdi)
movq %r13, (208)(%rdi)
movq %r14, (216)(%rdi)
ret
.Lfe29:
.size mul_14x14, .Lfe29-(mul_14x14)
.p2align 6, 0x90
.type mul_15x15, @function
mul_15x15:
call mla_8x8
add $(64), %rdi
add $(64), %rcx
call mla_8x7
movq %r8, (56)(%rdi)
movq %r9, (64)(%rdi)
movq %r10, (72)(%rdi)
movq %r11, (80)(%rdi)
movq %r12, (88)(%rdi)
movq %r13, (96)(%rdi)
movq %r14, (104)(%rdi)
movq %r15, (112)(%rdi)
add $(64), %rsi
sub $(64), %rcx
xor %rsi, %rcx
xor %rcx, %rsi
xor %rsi, %rcx
movq (%rdi), %r8
movq (8)(%rdi), %r9
movq (16)(%rdi), %r10
movq (24)(%rdi), %r11
movq (32)(%rdi), %r12
movq (40)(%rdi), %r13
movq (48)(%rdi), %r14
movq (56)(%rdi), %r15
call mla_8x7
movq %r8, (56)(%rdi)
add $(64), %rdi
xor %rsi, %rcx
xor %rcx, %rsi
xor %rsi, %rcx
add $(64), %rcx
mov %r9, %r8
mov %r10, %r9
mov %r11, %r10
mov %r12, %r11
mov %r13, %r12
mov %r14, %r13
mov %r15, %r14
xor %rdx, %rdx
movq (%rdi), %rax
add %rax, %r8
movq (8)(%rdi), %rax
adc %rax, %r9
movq (16)(%rdi), %rax
adc %rax, %r10
movq (24)(%rdi), %rax
adc %rax, %r11
movq (32)(%rdi), %rax
adc %rax, %r12
movq (40)(%rdi), %rax
adc %rax, %r13
movq (48)(%rdi), %rax
adc %rax, %r14
adc $(0), %rdx
push %rdx
call mla_7x7
add $(56), %rdi
pop %rax
add %rax, %r8
adc $(0), %r9
adc $(0), %r10
adc $(0), %r11
adc $(0), %r12
adc $(0), %r13
adc $(0), %r14
movq %r8, (%rdi)
movq %r9, (8)(%rdi)
movq %r10, (16)(%rdi)
movq %r11, (24)(%rdi)
movq %r12, (32)(%rdi)
movq %r13, (40)(%rdi)
movq %r14, (48)(%rdi)
ret
.Lfe30:
.size mul_15x15, .Lfe30-(mul_15x15)
.p2align 6, 0x90
.type mul_16x16, @function
mul_16x16:
call mla_8x8
add $(64), %rdi
add $(64), %rsi
call mla_8x8
movq %r8, (64)(%rdi)
movq %r9, (72)(%rdi)
movq %r10, (80)(%rdi)
movq %r11, (88)(%rdi)
movq %r12, (96)(%rdi)
movq %r13, (104)(%rdi)
movq %r14, (112)(%rdi)
movq %r15, (120)(%rdi)
movq (%rdi), %r8
movq (8)(%rdi), %r9
movq (16)(%rdi), %r10
movq (24)(%rdi), %r11
movq (32)(%rdi), %r12
movq (40)(%rdi), %r13
movq (48)(%rdi), %r14
movq (56)(%rdi), %r15
add $(64), %rcx
sub $(64), %rsi
call mla_8x8
xor %rdx, %rdx
movq (64)(%rdi), %rax
add %rax, %r8
movq (72)(%rdi), %rax
adc %rax, %r9
movq (80)(%rdi), %rax
adc %rax, %r10
movq (88)(%rdi), %rax
adc %rax, %r11
movq (96)(%rdi), %rax
adc %rax, %r12
movq (104)(%rdi), %rax
adc %rax, %r13
movq (112)(%rdi), %rax
adc %rax, %r14
movq (120)(%rdi), %rax
adc %rax, %r15
adc $(0), %rdx
push %rdx
add $(64), %rdi
add $(64), %rsi
call mla_8x8
sub $(128), %rdi
sub $(64), %rsi
sub $(64), %rcx
pop %rdx
add %rdx, %r8
adc $(0), %r9
adc $(0), %r10
adc $(0), %r11
adc $(0), %r12
adc $(0), %r13
adc $(0), %r14
adc $(0), %r15
movq %r8, (192)(%rdi)
movq %r9, (200)(%rdi)
movq %r10, (208)(%rdi)
movq %r11, (216)(%rdi)
movq %r12, (224)(%rdi)
movq %r13, (232)(%rdi)
movq %r14, (240)(%rdi)
movq %r15, (248)(%rdi)
ret
.Lfe31:
.size mul_16x16, .Lfe31-(mul_16x16)
mul_lxl_basic:
.quad mul_1x1 - mul_lxl_basic
.quad mul_2x2 - mul_lxl_basic
.quad mul_3x3 - mul_lxl_basic
.quad mul_4x4 - mul_lxl_basic
.quad mul_5x5 - mul_lxl_basic
.quad mul_6x6 - mul_lxl_basic
.quad mul_7x7 - mul_lxl_basic
.quad mul_8x8 - mul_lxl_basic
.quad mul_9x9 - mul_lxl_basic
.quad mul_10x10-mul_lxl_basic
.quad mul_11x11-mul_lxl_basic
.quad mul_12x12-mul_lxl_basic
.quad mul_13x13-mul_lxl_basic
.quad mul_14x14-mul_lxl_basic
.quad mul_15x15-mul_lxl_basic
.quad mul_16x16-mul_lxl_basic
mla_lxl_short:
.quad mla_1x1 - mla_lxl_short
.quad mla_2x2 - mla_lxl_short
.quad mla_3x3 - mla_lxl_short
.quad mla_4x4 - mla_lxl_short
.quad mla_5x5 - mla_lxl_short
.quad mla_6x6 - mla_lxl_short
.quad mla_7x7 - mla_lxl_short
mla_8xl_tail:
.quad mla_8x1 - mla_8xl_tail
.quad mla_8x2 - mla_8xl_tail
.quad mla_8x3 - mla_8xl_tail
.quad mla_8x4 - mla_8xl_tail
.quad mla_8x5 - mla_8xl_tail
.quad mla_8x6 - mla_8xl_tail
.quad mla_8x7 - mla_8xl_tail
.p2align 6, 0x90
.type mul_8Nx8M_adcox, @function
mul_8Nx8M_adcox:
push %rbx
push %rdi
push %rsi
push %rdx
.Lmul_loopAgas_32:
push %rdx
call mla_8x8
add $(64), %rdi
add $(64), %rsi
pop %rdx
sub $(8), %rdx
jnz .Lmul_loopAgas_32
movq %r8, (%rdi)
movq %r9, (8)(%rdi)
movq %r10, (16)(%rdi)
movq %r11, (24)(%rdi)
movq %r12, (32)(%rdi)
movq %r13, (40)(%rdi)
movq %r14, (48)(%rdi)
movq %r15, (56)(%rdi)
jmp .Lmla_enrtygas_32
.Lmla_loopBgas_32:
push %rbx
push %rdi
push %rsi
push %rdx
xor %rax, %rax
push %rax
movq (%rdi), %r8
movq (8)(%rdi), %r9
movq (16)(%rdi), %r10
movq (24)(%rdi), %r11
movq (32)(%rdi), %r12
movq (40)(%rdi), %r13
movq (48)(%rdi), %r14
movq (56)(%rdi), %r15
.LloopAgas_32:
push %rdx
call mla_8x8
add $(64), %rdi
add $(64), %rsi
pop %rdx
sub $(8), %rdx
jz .Lexit_loopAgas_32
pop %rax
neg %rax
movq (%rdi), %rax
adc %rax, %r8
movq (8)(%rdi), %rax
adc %rax, %r9
movq (16)(%rdi), %rax
adc %rax, %r10
movq (24)(%rdi), %rax
adc %rax, %r11
movq (32)(%rdi), %rax
adc %rax, %r12
movq (40)(%rdi), %rax
adc %rax, %r13
movq (48)(%rdi), %rax
adc %rax, %r14
movq (56)(%rdi), %rax
adc %rax, %r15
sbb %rax, %rax
push %rax
jmp .LloopAgas_32
.Lexit_loopAgas_32:
pop %rax
neg %rax
adc $(0), %r8
movq %r8, (%rdi)
adc $(0), %r9
movq %r9, (8)(%rdi)
adc $(0), %r10
movq %r10, (16)(%rdi)
adc $(0), %r11
movq %r11, (24)(%rdi)
adc $(0), %r12
movq %r12, (32)(%rdi)
adc $(0), %r13
movq %r13, (40)(%rdi)
adc $(0), %r14
movq %r14, (48)(%rdi)
adc $(0), %r15
movq %r15, (56)(%rdi)
.Lmla_enrtygas_32:
pop %rdx
pop %rsi
pop %rdi
add $(64), %rdi
add $(64), %rcx
pop %rbx
sub $(8), %rbx
jnz .Lmla_loopBgas_32
ret
.Lfe32:
.size mul_8Nx8M_adcox, .Lfe32-(mul_8Nx8M_adcox)
.p2align 6, 0x90
.type mla_simple, @function
mla_simple:
xor %rax, %rax
mov %rdx, %r11
cmp %rbx, %r11
jge .Lms_mla_entrygas_33
xor %rbx, %r11
xor %r11, %rbx
xor %rbx, %r11
xor %rcx, %rsi
xor %rsi, %rcx
xor %rcx, %rsi
jmp .Lms_mla_entrygas_33
.Lms_loopBgas_33:
push %rbx
push %rdi
push %rsi
push %r11
push %rax
movq (%rcx), %rdx
xor %r10, %r10
.Lms_loopAgas_33:
mulxq (%rsi), %r8, %r9
add $(8), %rdi
add $(8), %rsi
add %r10, %r8
adc $(0), %r9
addq (-8)(%rdi), %r8
adc $(0), %r9
movq %r8, (-8)(%rdi)
mov %r9, %r10
sub $(1), %r11
jnz .Lms_loopAgas_33
pop %rax
shr $(1), %rax
adcq (%rdi), %r10
movq %r10, (%rdi)
adc $(0), %rax
pop %r11
pop %rsi
pop %rdi
pop %rbx
add $(8), %rdi
add $(8), %rcx
.Lms_mla_entrygas_33:
sub $(1), %rbx
jnc .Lms_loopBgas_33
ret
.Lfe33:
.size mla_simple, .Lfe33-(mla_simple)
.p2align 6, 0x90
.type mul_NxM_adcox, @function
mul_NxM_adcox:
sub $(56), %rsp
cmp $(8), %rbx
jge .Lregular_entrygas_34
cmp $(8), %rdx
jge .Lirregular_entrygas_34
mov %rdx, %r8
add %rbx, %r8
mov %rdi, %rbp
xor %rax, %rax
.L__0000gas_34:
movq %rax, (%rbp)
add $(8), %rbp
sub $(1), %r8
jnz .L__0000gas_34
call mla_simple
jmp .Lquitgas_34
.Lirregular_entrygas_34:
mov %rbx, (%rsp)
mov %rdx, (24)(%rsp)
mov %rdx, (32)(%rsp)
lea mla_8xl_tail(%rip), %rax
mov (-8)(%rax,%rbx,8), %rbp
add %rbp, %rax
mov %rax, (48)(%rsp)
jmp .Lirr_init_entrygas_34
.Lirr_init_loopgas_34:
mov %rdx, (32)(%rsp)
call *%rax
mov (%rsp), %rbx
movq %r8, (%rdi,%rbx,8)
movq %r9, (8)(%rdi,%rbx,8)
movq %r10, (16)(%rdi,%rbx,8)
movq %r11, (24)(%rdi,%rbx,8)
movq %r12, (32)(%rdi,%rbx,8)
movq %r13, (40)(%rdi,%rbx,8)
movq %r14, (48)(%rdi,%rbx,8)
movq %r15, (56)(%rdi,%rbx,8)
add $(64), %rsi
add $(64), %rdi
xor %r8, %r8
xor %r9, %r9
xor %r10, %r10
xor %r11, %r11
xor %r12, %r12
xor %r13, %r13
xor %r14, %r14
xor %r15, %r15
movq (%rdi), %r8
cmp $(1), %rbx
jz .Lcontinuegas_34
movq (8)(%rdi), %r9
cmp $(2), %rbx
jz .Lcontinuegas_34
movq (16)(%rdi), %r10
cmp $(3), %rbx
jz .Lcontinuegas_34
movq (24)(%rdi), %r11
cmp $(4), %rbx
jz .Lcontinuegas_34
movq (32)(%rdi), %r12
cmp $(5), %rbx
jz .Lcontinuegas_34
movq (40)(%rdi), %r13
cmp $(6), %rbx
jz .Lcontinuegas_34
movq (48)(%rdi), %r14
.Lcontinuegas_34:
mov (32)(%rsp), %rdx
.Lirr_init_entrygas_34:
sub $(8), %rdx
mov (48)(%rsp), %rax
jnc .Lirr_init_loopgas_34
add $(8), %rdx
jz .Lquitgas_34
lea (%rdi,%rbx,8), %rbp
xor %rax, %rax
.L__0001gas_34:
movq %rax, (%rbp)
add $(8), %rbp
sub $(1), %rdx
jnz .L__0001gas_34
mov (32)(%rsp), %rdx
call mla_simple
jmp .Lquitgas_34
.Lregular_entrygas_34:
sub $(8), %rbx
xor %rax, %rax
mov %rbx, (%rsp)
mov %rdi, (8)(%rsp)
mov %rsi, (16)(%rsp)
mov %rdx, (24)(%rsp)
mov %rdx, (32)(%rsp)
mov %rax, (40)(%rsp)
mov %rdx, %rbp
and $(7), %rbp
lea mla_8xl_tail(%rip), %rax
mov (-8)(%rax,%rbp,8), %rbp
add %rbp, %rax
mov %rax, (48)(%rsp)
sub $(8), %rdx
.Linit_loopAgas_34:
mov %rdx, (32)(%rsp)
call mla_8x8
mov (32)(%rsp), %rdx
add $(64), %rdi
add $(64), %rsi
sub $(8), %rdx
jnc .Linit_loopAgas_34
add $(8), %rdx
jz .Linit_completegas_34
mov %rdx, (32)(%rsp)
mov (48)(%rsp), %rax
xor %rsi, %rcx
xor %rcx, %rsi
xor %rsi, %rcx
call *%rax
xor %rsi, %rcx
xor %rcx, %rsi
xor %rsi, %rcx
mov (32)(%rsp), %rdx
lea (%rdi,%rdx,8), %rdi
.Linit_completegas_34:
movq %r8, (%rdi)
movq %r9, (8)(%rdi)
movq %r10, (16)(%rdi)
movq %r11, (24)(%rdi)
movq %r12, (32)(%rdi)
movq %r13, (40)(%rdi)
movq %r14, (48)(%rdi)
movq %r15, (56)(%rdi)
jmp .Lmla_enrtygas_34
.Lmla_loopBgas_34:
mov %rbx, (%rsp)
mov %rdi, (8)(%rsp)
xor %rax, %rax
mov %rax, (40)(%rsp)
movq (%rdi), %r8
movq (8)(%rdi), %r9
movq (16)(%rdi), %r10
movq (24)(%rdi), %r11
movq (32)(%rdi), %r12
movq (40)(%rdi), %r13
movq (48)(%rdi), %r14
movq (56)(%rdi), %r15
sub $(8), %rdx
.LloopAgas_34:
mov %rdx, (32)(%rsp)
call mla_8x8
mov (32)(%rsp), %rdx
add $(64), %rdi
add $(64), %rsi
sub $(8), %rdx
jc .Lexit_loopAgas_34
mov (40)(%rsp), %rax
shr $(1), %rax
movq (%rdi), %rbx
adc %rbx, %r8
movq (8)(%rdi), %rbx
adc %rbx, %r9
movq (16)(%rdi), %rbx
adc %rbx, %r10
movq (24)(%rdi), %rbx
adc %rbx, %r11
movq (32)(%rdi), %rbx
adc %rbx, %r12
movq (40)(%rdi), %rbx
adc %rbx, %r13
movq (48)(%rdi), %rbx
adc %rbx, %r14
movq (56)(%rdi), %rbx
adc %rbx, %r15
adc $(0), %rax
mov %rax, (40)(%rsp)
jmp .LloopAgas_34
.Lexit_loopAgas_34:
add $(8), %rdx
jz .Lcomplete_reg_loopBgas_34
mov %rdx, (32)(%rsp)
xor %rax, %rax
.Lput_zerogas_34:
movq %rax, (%rdi,%rdx,8)
add $(1), %rdx
cmp $(8), %rdx
jl .Lput_zerogas_34
mov (40)(%rsp), %rax
shr $(1), %rax
mov (%rdi), %rbx
adc %rbx, %r8
mov (8)(%rdi), %rbx
adc %rbx, %r9
mov (16)(%rdi), %rbx
adc %rbx, %r10
mov (24)(%rdi), %rbx
adc %rbx, %r11
mov (32)(%rdi), %rbx
adc %rbx, %r12
mov (40)(%rdi), %rbx
adc %rbx, %r13
mov (48)(%rdi), %rbx
adc %rbx, %r14
mov (56)(%rdi), %rbx
adc %rbx, %r15
adc $(0), %rax
mov %rax, (40)(%rsp)
mov (48)(%rsp), %rax
xor %rsi, %rcx
xor %rcx, %rsi
xor %rsi, %rcx
call *%rax
xor %rsi, %rcx
xor %rcx, %rsi
xor %rsi, %rcx
mov (32)(%rsp), %rdx
lea (%rdi,%rdx,8), %rdi
mov (40)(%rsp), %rax
shr $(1), %rax
dec %rdx
jz .Lmt_1gas_34
dec %rdx
jz .Lmt_2gas_34
dec %rdx
jz .Lmt_3gas_34
dec %rdx
jz .Lmt_4gas_34
dec %rdx
jz .Lmt_5gas_34
dec %rdx
jz .Lmt_6gas_34
.Lmt_7gas_34:
adc $(0), %r9
.Lmt_6gas_34:
adc $(0), %r10
.Lmt_5gas_34:
adc $(0), %r11
.Lmt_4gas_34:
adc $(0), %r12
.Lmt_3gas_34:
adc $(0), %r13
.Lmt_2gas_34:
adc $(0), %r14
.Lmt_1gas_34:
adc $(0), %r15
movq %r8, (%rdi)
movq %r9, (8)(%rdi)
movq %r10, (16)(%rdi)
movq %r11, (24)(%rdi)
movq %r12, (32)(%rdi)
movq %r13, (40)(%rdi)
movq %r14, (48)(%rdi)
movq %r15, (56)(%rdi)
jmp .Lmla_enrtygas_34
.Lcomplete_reg_loopBgas_34:
mov (40)(%rsp), %rax
add %rax, %r8
adc $(0), %r9
adc $(0), %r10
adc $(0), %r11
adc $(0), %r12
adc $(0), %r13
adc $(0), %r14
adc $(0), %r15
movq %r8, (%rdi)
movq %r9, (8)(%rdi)
movq %r10, (16)(%rdi)
movq %r11, (24)(%rdi)
movq %r12, (32)(%rdi)
movq %r13, (40)(%rdi)
movq %r14, (48)(%rdi)
movq %r15, (56)(%rdi)
.Lmla_enrtygas_34:
mov (%rsp), %rbx
mov (8)(%rsp), %rdi
mov (24)(%rsp), %rdx
mov (16)(%rsp), %rsi
add $(64), %rcx
add $(64), %rdi
sub $(8), %rbx
jnc .Lmla_loopBgas_34
add $(8), %rbx
jz .Lquitgas_34
mov %rbx, (%rsp)
lea mla_8xl_tail(%rip), %rax
mov (-8)(%rax,%rbx,8), %rbp
add %rbp, %rax
mov %rax, (48)(%rsp)
lea (%rdi,%rdx,8), %rbp
xor %rax, %rax
.L__0002gas_34:
movq %rax, (%rbp)
add $(8), %rbp
sub $(1), %rbx
jnz .L__0002gas_34
xor %rax, %rax
mov %rax, (40)(%rsp)
sub $(8), %rdx
.Ltail_loopAgas_34:
movq (%rdi), %r8
movq (8)(%rdi), %r9
movq (16)(%rdi), %r10
movq (24)(%rdi), %r11
movq (32)(%rdi), %r12
movq (40)(%rdi), %r13
movq (48)(%rdi), %r14
movq (56)(%rdi), %r15
mov %rdx, (32)(%rsp)
mov (48)(%rsp), %rax
call *%rax
.Lenrty_tail_loopAgas_34:
mov (40)(%rsp), %rax
shr $(1), %rax
adc $(0), %r8
adc $(0), %r9
adc $(0), %r10
adc $(0), %r11
adc $(0), %r12
adc $(0), %r13
adc $(0), %r14
adc $(0), %r15
adc $(0), %rax
mov (%rsp), %rbx
mov %rbx, %rbp
dec %rbp
jz .Ltt_1gas_34
dec %rbp
jz .Ltt_2gas_34
dec %rbp
jz .Ltt_3gas_34
dec %rbp
jz .Ltt_4gas_34
dec %rbp
jz .Ltt_5gas_34
dec %rbp
jz .Ltt_6gas_34
.Ltt_7gas_34:
mov (8)(%rdi,%rbx,8), %rbp
adc %rbp, %r9
.Ltt_6gas_34:
mov (16)(%rdi,%rbx,8), %rbp
adc %rbp, %r10
.Ltt_5gas_34:
mov (24)(%rdi,%rbx,8), %rbp
adc %rbp, %r11
.Ltt_4gas_34:
mov (32)(%rdi,%rbx,8), %rbp
adc %rbp, %r12
.Ltt_3gas_34:
mov (40)(%rdi,%rbx,8), %rbp
adc %rbp, %r13
.Ltt_2gas_34:
mov (48)(%rdi,%rbx,8), %rbp
adc %rbp, %r14
.Ltt_1gas_34:
mov (56)(%rdi,%rbx,8), %rbp
adc %rbp, %r15
adc $(0), %rax
mov %rax, (40)(%rsp)
movq %r8, (%rdi,%rbx,8)
movq %r9, (8)(%rdi,%rbx,8)
movq %r10, (16)(%rdi,%rbx,8)
movq %r11, (24)(%rdi,%rbx,8)
movq %r12, (32)(%rdi,%rbx,8)
movq %r13, (40)(%rdi,%rbx,8)
movq %r14, (48)(%rdi,%rbx,8)
movq %r15, (56)(%rdi,%rbx,8)
mov (32)(%rsp), %rdx
add $(64), %rsi
add $(64), %rdi
sub $(8), %rdx
jnc .Ltail_loopAgas_34
add $(8), %rdx
jz .Lquitgas_34
mov (40)(%rsp), %rax
mov %rbx, %rbp
dec %rbp
movq (%rdi,%rbx,8), %r8
add %rax, %r8
movq %r8, (%rdi,%rbx,8)
jz .Lsimplegas_34
dec %rbp
movq (8)(%rdi,%rbx,8), %r9
adc $(0), %r9
movq %r9, (8)(%rdi,%rbx,8)
jz .Lsimplegas_34
dec %rbp
movq (16)(%rdi,%rbx,8), %r10
adc $(0), %r10
movq %r10, (16)(%rdi,%rbx,8)
jz .Lsimplegas_34
dec %rbp
movq (24)(%rdi,%rbx,8), %r11
adc $(0), %r11
movq %r11, (24)(%rdi,%rbx,8)
jz .Lsimplegas_34
dec %rbp
movq (32)(%rdi,%rbx,8), %r12
adc $(0), %r12
movq %r12, (32)(%rdi,%rbx,8)
jz .Lsimplegas_34
dec %rbp
movq (40)(%rdi,%rbx,8), %r13
adc $(0), %r13
movq %r13, (40)(%rdi,%rbx,8)
jz .Lsimplegas_34
dec %rbp
movq (48)(%rdi,%rbx,8), %r14
adc $(0), %r14
movq %r14, (48)(%rdi,%rbx,8)
.Lsimplegas_34:
call mla_simple
.Lquitgas_34:
add $(56), %rsp
ret
.Lfe34:
.size mul_NxM_adcox, .Lfe34-(mul_NxM_adcox)
.p2align 6, 0x90
sqr_1:
movq (%rsi), %rdx
mulx %rdx, %rax, %rdx
movq %rax, (%rdi)
movq %rdx, (8)(%rdi)
ret
.p2align 6, 0x90
.type sqr_2, @function
sqr_2:
movq (8)(%rsi), %rdx
mulxq (%rsi), %r9, %rax
mulx %rdx, %r10, %r11
movq (%rsi), %rdx
mulx %rdx, %r8, %rdx
add %r9, %r9
adc %rax, %rax
adc $(0), %r11
movq %r8, (%rdi)
add %rdx, %r9
movq %r9, (8)(%rdi)
adc %rax, %r10
movq %r10, (16)(%rdi)
adc $(0), %r11
movq %r11, (24)(%rdi)
ret
.Lfe35:
.size sqr_2, .Lfe35-(sqr_2)
.p2align 6, 0x90
.type sqr_3, @function
sqr_3:
mov (%rsi), %rdx
mulx (8)(%rsi), %r8, %r9
mulx (16)(%rsi), %rax, %r10
add %rax, %r9
adc $(0), %r10
mov (8)(%rsi), %rdx
mulx (16)(%rsi), %rax, %r11
add %rax, %r10
adc $(0), %r11
xor %rcx, %rcx
mov (%rsi), %rdx
mulx %rdx, %rax, %rdx
movq %rax, (%rdi)
adcx %r8, %rdx
adox %r8, %rdx
movq %rdx, (8)(%rdi)
mov (8)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx %r9, %rax
adox %r9, %rax
movq %rax, (16)(%rdi)
adcx %r10, %rdx
adox %r10, %rdx
movq %rdx, (24)(%rdi)
mov (16)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx %r11, %rax
adox %r11, %rax
movq %rax, (32)(%rdi)
adcx %rcx, %rdx
adox %rcx, %rdx
movq %rdx, (40)(%rdi)
ret
.Lfe36:
.size sqr_3, .Lfe36-(sqr_3)
.p2align 6, 0x90
.type sqr_4, @function
sqr_4:
mov (%rsi), %rdx
mulx (8)(%rsi), %r8, %r9
xor %rcx, %rcx
mulx (16)(%rsi), %rax, %r10
add %rax, %r9
mulx (24)(%rsi), %rax, %r11
adc %rax, %r10
adc $(0), %r11
mov (8)(%rsi), %rdx
mulx (16)(%rsi), %rax, %rbp
adcx %rax, %r10
adox %rbp, %r11
mulx (24)(%rsi), %rax, %r12
adcx %rax, %r11
adox %rcx, %r12
adc $(0), %r12
mov (16)(%rsi), %rdx
mulx (24)(%rsi), %rax, %r13
add %rax, %r12
adc $(0), %r13
mov (%rsi), %rdx
mulx %rdx, %rax, %rdx
movq %rax, (%rdi)
adcx %r8, %rdx
adox %r8, %rdx
movq %rdx, (8)(%rdi)
mov (8)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx %r9, %rax
adox %r9, %rax
movq %rax, (16)(%rdi)
adcx %r10, %rdx
adox %r10, %rdx
movq %rdx, (24)(%rdi)
mov (16)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx %r11, %rax
adox %r11, %rax
movq %rax, (32)(%rdi)
adcx %r12, %rdx
adox %r12, %rdx
movq %rdx, (40)(%rdi)
mov (24)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx %r13, %rax
adox %r13, %rax
movq %rax, (48)(%rdi)
adcx %rcx, %rdx
adox %rcx, %rdx
movq %rdx, (56)(%rdi)
ret
.Lfe37:
.size sqr_4, .Lfe37-(sqr_4)
.p2align 6, 0x90
.type sqr_5, @function
sqr_5:
mov (%rsi), %rdx
mulx (8)(%rsi), %r8, %r9
xor %rcx, %rcx
mulx (16)(%rsi), %rax, %r10
add %rax, %r9
mulx (24)(%rsi), %rax, %r11
adc %rax, %r10
mulx (32)(%rsi), %rax, %r12
adc %rax, %r11
adc $(0), %r12
mov (8)(%rsi), %rdx
mulx (16)(%rsi), %rax, %rbp
adcx %rax, %r10
adox %rbp, %r11
mulx (24)(%rsi), %rax, %rbp
adcx %rax, %r11
adox %rbp, %r12
mulx (32)(%rsi), %rax, %r13
adcx %rax, %r12
adox %rcx, %r13
adc $(0), %r13
mov (16)(%rsi), %rdx
mulx (24)(%rsi), %rax, %rbp
adcx %rax, %r12
adox %rbp, %r13
mulx (32)(%rsi), %rax, %r14
adcx %rax, %r13
adox %rcx, %r14
adc $(0), %r14
mov (24)(%rsi), %rdx
mulx (32)(%rsi), %rax, %r15
add %rax, %r14
adc $(0), %r15
mov (%rsi), %rdx
mulx %rdx, %rax, %rdx
movq %rax, (%rdi)
adcx %r8, %rdx
adox %r8, %rdx
movq %rdx, (8)(%rdi)
mov (8)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx %r9, %rax
adox %r9, %rax
movq %rax, (16)(%rdi)
adcx %r10, %rdx
adox %r10, %rdx
movq %rdx, (24)(%rdi)
mov (16)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx %r11, %rax
adox %r11, %rax
movq %rax, (32)(%rdi)
adcx %r12, %rdx
adox %r12, %rdx
movq %rdx, (40)(%rdi)
mov (24)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx %r13, %rax
adox %r13, %rax
movq %rax, (48)(%rdi)
adcx %r14, %rdx
adox %r14, %rdx
movq %rdx, (56)(%rdi)
mov (32)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx %r15, %rax
adox %r15, %rax
movq %rax, (64)(%rdi)
adcx %rcx, %rdx
adox %rcx, %rdx
movq %rdx, (72)(%rdi)
ret
.Lfe38:
.size sqr_5, .Lfe38-(sqr_5)
.p2align 6, 0x90
.type sqr_6, @function
sqr_6:
mov (%rsi), %rdx
mulx (8)(%rsi), %r8, %r9
xor %rcx, %rcx
mulx (16)(%rsi), %rax, %r10
add %rax, %r9
mulx (24)(%rsi), %rax, %r11
adc %rax, %r10
mulx (32)(%rsi), %rax, %r12
adc %rax, %r11
mulx (40)(%rsi), %rax, %r13
adc %rax, %r12
adc $(0), %r13
mov (8)(%rsi), %rdx
mulx (16)(%rsi), %rax, %rbp
adcx %rax, %r10
adox %rbp, %r11
mulx (24)(%rsi), %rax, %rbp
adcx %rax, %r11
adox %rbp, %r12
mulx (32)(%rsi), %rax, %rbp
adcx %rax, %r12
adox %rbp, %r13
mulx (40)(%rsi), %rax, %r14
adcx %rax, %r13
adox %rcx, %r14
adc $(0), %r14
mov (16)(%rsi), %rdx
mulx (24)(%rsi), %rax, %rbp
adcx %rax, %r12
adox %rbp, %r13
mulx (32)(%rsi), %rax, %rbp
adcx %rax, %r13
adox %rbp, %r14
mulx (40)(%rsi), %rax, %r15
adcx %rax, %r14
adox %rcx, %r15
adc $(0), %r15
mov (24)(%rsi), %rdx
mulx (32)(%rsi), %rax, %rbp
adcx %rax, %r14
adox %rbp, %r15
mulx (40)(%rsi), %rax, %rbx
adcx %rax, %r15
adox %rcx, %rbx
adc $(0), %rbx
mov (32)(%rsi), %rdx
mulx (40)(%rsi), %rax, %rbp
add %rax, %rbx
adc $(0), %rbp
mov (%rsi), %rdx
mulx %rdx, %rax, %rdx
movq %rax, (%rdi)
adcx %r8, %rdx
adox %r8, %rdx
movq %rdx, (8)(%rdi)
mov (8)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx %r9, %rax
adox %r9, %rax
movq %rax, (16)(%rdi)
adcx %r10, %rdx
adox %r10, %rdx
movq %rdx, (24)(%rdi)
mov (16)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx %r11, %rax
adox %r11, %rax
movq %rax, (32)(%rdi)
adcx %r12, %rdx
adox %r12, %rdx
movq %rdx, (40)(%rdi)
mov (24)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx %r13, %rax
adox %r13, %rax
movq %rax, (48)(%rdi)
adcx %r14, %rdx
adox %r14, %rdx
movq %rdx, (56)(%rdi)
mov (32)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx %r15, %rax
adox %r15, %rax
movq %rax, (64)(%rdi)
adcx %rbx, %rdx
adox %rbx, %rdx
movq %rdx, (72)(%rdi)
mov (40)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx %rbp, %rax
adox %rbp, %rax
movq %rax, (80)(%rdi)
adcx %rcx, %rdx
adox %rcx, %rdx
movq %rdx, (88)(%rdi)
ret
.Lfe39:
.size sqr_6, .Lfe39-(sqr_6)
.p2align 6, 0x90
.type sqr_7, @function
sqr_7:
mov (%rsi), %rdx
mulx (8)(%rsi), %r8, %r9
xor %rcx, %rcx
mulx (16)(%rsi), %rax, %r10
add %rax, %r9
mulx (24)(%rsi), %rax, %r11
adc %rax, %r10
mulx (32)(%rsi), %rax, %r12
adc %rax, %r11
mulx (40)(%rsi), %rax, %r13
adc %rax, %r12
mulx (48)(%rsi), %rax, %r14
adc %rax, %r13
adc $(0), %r14
mov %r8, (8)(%rdi)
mov %r9, (16)(%rdi)
mov (8)(%rsi), %rdx
mulx (16)(%rsi), %rax, %rbp
adcx %rax, %r10
adox %rbp, %r11
mulx (24)(%rsi), %rax, %rbp
adcx %rax, %r11
adox %rbp, %r12
mulx (32)(%rsi), %rax, %rbp
adcx %rax, %r12
adox %rbp, %r13
mulx (40)(%rsi), %rax, %rbp
adcx %rax, %r13
adox %rbp, %r14
mulx (48)(%rsi), %rax, %r15
adcx %rax, %r14
adox %rcx, %r15
adc $(0), %r15
mov %r10, (24)(%rdi)
mov (16)(%rsi), %rdx
mulx (24)(%rsi), %rax, %rbp
adcx %rax, %r12
adox %rbp, %r13
mulx (32)(%rsi), %rax, %rbp
adcx %rax, %r13
adox %rbp, %r14
mulx (40)(%rsi), %rax, %rbp
adcx %rax, %r14
adox %rbp, %r15
mulx (48)(%rsi), %rax, %rbx
adcx %rax, %r15
adox %rcx, %rbx
adc $(0), %rbx
mov (24)(%rsi), %rdx
mulx (32)(%rsi), %rax, %rbp
adcx %rax, %r14
adox %rbp, %r15
mulx (40)(%rsi), %rax, %rbp
adcx %rax, %r15
adox %rbp, %rbx
mulx (48)(%rsi), %rax, %r8
adcx %rax, %rbx
adox %rcx, %r8
adc $(0), %r8
mov (32)(%rsi), %rdx
mulx (40)(%rsi), %rax, %rbp
adcx %rax, %rbx
adox %rbp, %r8
mulx (48)(%rsi), %rax, %r9
adcx %rax, %r8
adox %rcx, %r9
adc $(0), %r9
mov (40)(%rsi), %rdx
mulx (48)(%rsi), %rax, %r10
add %rax, %r9
adc $(0), %r10
mov (%rsi), %rdx
mulx %rdx, %rax, %rdx
movq %rax, (%rdi)
adcx (8)(%rdi), %rdx
adox (8)(%rdi), %rdx
movq %rdx, (8)(%rdi)
mov (8)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (16)(%rdi), %rax
adox (16)(%rdi), %rax
movq %rax, (16)(%rdi)
adcx (24)(%rdi), %rdx
adox (24)(%rdi), %rdx
movq %rdx, (24)(%rdi)
mov (16)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx %r11, %rax
adox %r11, %rax
movq %rax, (32)(%rdi)
adcx %r12, %rdx
adox %r12, %rdx
movq %rdx, (40)(%rdi)
mov (24)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx %r13, %rax
adox %r13, %rax
movq %rax, (48)(%rdi)
adcx %r14, %rdx
adox %r14, %rdx
movq %rdx, (56)(%rdi)
mov (32)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx %r15, %rax
adox %r15, %rax
movq %rax, (64)(%rdi)
adcx %rbx, %rdx
adox %rbx, %rdx
movq %rdx, (72)(%rdi)
mov (40)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx %r8, %rax
adox %r8, %rax
movq %rax, (80)(%rdi)
adcx %r9, %rdx
adox %r9, %rdx
movq %rdx, (88)(%rdi)
mov (48)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx %r10, %rax
adox %r10, %rax
movq %rax, (96)(%rdi)
adcx %rcx, %rdx
adox %rcx, %rdx
movq %rdx, (104)(%rdi)
ret
.Lfe40:
.size sqr_7, .Lfe40-(sqr_7)
.p2align 6, 0x90
.type sqr_8, @function
sqr_8:
mov (%rsi), %rdx
mulx (8)(%rsi), %r8, %r9
xor %rcx, %rcx
mulx (16)(%rsi), %rax, %r10
add %rax, %r9
mulx (24)(%rsi), %rax, %r11
adc %rax, %r10
mulx (32)(%rsi), %rax, %r12
adc %rax, %r11
mulx (40)(%rsi), %rax, %r13
adc %rax, %r12
mulx (48)(%rsi), %rax, %r14
adc %rax, %r13
mulx (56)(%rsi), %rax, %r15
adc %rax, %r14
adc $(0), %r15
mov %r8, (8)(%rdi)
mov %r9, (16)(%rdi)
mov (8)(%rsi), %rdx
mulx (16)(%rsi), %rax, %rbp
adcx %rax, %r10
adox %rbp, %r11
mulx (24)(%rsi), %rax, %rbp
adcx %rax, %r11
adox %rbp, %r12
mulx (32)(%rsi), %rax, %rbp
adcx %rax, %r12
adox %rbp, %r13
mulx (40)(%rsi), %rax, %rbp
adcx %rax, %r13
adox %rbp, %r14
mulx (48)(%rsi), %rax, %rbp
adcx %rax, %r14
adox %rbp, %r15
mulx (56)(%rsi), %rax, %rbx
adcx %rax, %r15
adox %rcx, %rbx
adc $(0), %rbx
mov %r10, (24)(%rdi)
mov %r11, (32)(%rdi)
mov (16)(%rsi), %rdx
mulx (24)(%rsi), %rax, %rbp
adcx %rax, %r12
adox %rbp, %r13
mulx (32)(%rsi), %rax, %rbp
adcx %rax, %r13
adox %rbp, %r14
mulx (40)(%rsi), %rax, %rbp
adcx %rax, %r14
adox %rbp, %r15
mulx (48)(%rsi), %rax, %rbp
adcx %rax, %r15
adox %rbp, %rbx
mulx (56)(%rsi), %rax, %r8
adcx %rax, %rbx
adox %rcx, %r8
adc $(0), %r8
mov (24)(%rsi), %rdx
mulx (32)(%rsi), %rax, %rbp
adcx %rax, %r14
adox %rbp, %r15
mulx (40)(%rsi), %rax, %rbp
adcx %rax, %r15
adox %rbp, %rbx
mulx (48)(%rsi), %rax, %rbp
adcx %rax, %rbx
adox %rbp, %r8
mulx (56)(%rsi), %rax, %r9
adcx %rax, %r8
adox %rcx, %r9
adc $(0), %r9
mov (32)(%rsi), %rdx
mulx (40)(%rsi), %rax, %rbp
adcx %rax, %rbx
adox %rbp, %r8
mulx (48)(%rsi), %rax, %rbp
adcx %rax, %r8
adox %rbp, %r9
mulx (56)(%rsi), %rax, %r10
adcx %rax, %r9
adox %rcx, %r10
adc $(0), %r10
mov (40)(%rsi), %rdx
mulx (48)(%rsi), %rax, %rbp
adcx %rax, %r9
adox %rbp, %r10
mulx (56)(%rsi), %rax, %r11
adcx %rax, %r10
adox %rcx, %r11
adc $(0), %r11
mov (48)(%rsi), %rdx
mulx (56)(%rsi), %rax, %rbp
add %rax, %r11
adc $(0), %rbp
mov (%rsi), %rdx
mulx %rdx, %rax, %rdx
movq %rax, (%rdi)
adcx (8)(%rdi), %rdx
adox (8)(%rdi), %rdx
movq %rdx, (8)(%rdi)
mov (8)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (16)(%rdi), %rax
adox (16)(%rdi), %rax
movq %rax, (16)(%rdi)
adcx (24)(%rdi), %rdx
adox (24)(%rdi), %rdx
movq %rdx, (24)(%rdi)
mov (16)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (32)(%rdi), %rax
adox (32)(%rdi), %rax
movq %rax, (32)(%rdi)
adcx %r12, %rdx
adox %r12, %rdx
movq %rdx, (40)(%rdi)
mov (24)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx %r13, %rax
adox %r13, %rax
movq %rax, (48)(%rdi)
adcx %r14, %rdx
adox %r14, %rdx
movq %rdx, (56)(%rdi)
mov (32)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx %r15, %rax
adox %r15, %rax
movq %rax, (64)(%rdi)
adcx %rbx, %rdx
adox %rbx, %rdx
movq %rdx, (72)(%rdi)
mov (40)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx %r8, %rax
adox %r8, %rax
movq %rax, (80)(%rdi)
adcx %r9, %rdx
adox %r9, %rdx
movq %rdx, (88)(%rdi)
mov (48)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx %r10, %rax
adox %r10, %rax
movq %rax, (96)(%rdi)
adcx %r11, %rdx
adox %r11, %rdx
movq %rdx, (104)(%rdi)
mov (56)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx %rbp, %rax
adox %rbp, %rax
movq %rax, (112)(%rdi)
adcx %rcx, %rdx
adox %rcx, %rdx
movq %rdx, (120)(%rdi)
ret
.Lfe41:
.size sqr_8, .Lfe41-(sqr_8)
.p2align 6, 0x90
.type finalize, @function
finalize:
push %rcx
xor %rax, %rax
movq (%rsi), %rdx
mulx %rdx, %rax, %rdx
lea (8)(%rsi), %rsi
movq %rax, (%rdi)
adcx (8)(%rdi), %rdx
adox (8)(%rdi), %rdx
movq %rdx, (8)(%rdi)
lea (16)(%rdi), %rdi
lea (-2)(%rcx), %rcx
.Lnext_sqrgas_42:
movq (%rsi), %rdx
mulx %rdx, %rax, %rdx
lea (8)(%rsi), %rsi
adcx (%rdi), %rax
adox (%rdi), %rax
movq %rax, (%rdi)
adcx (8)(%rdi), %rdx
adox (8)(%rdi), %rdx
movq %rdx, (8)(%rdi)
lea (16)(%rdi), %rdi
lea (-1)(%rcx), %rcx
jrcxz .Llast_sqrgas_42
jmp .Lnext_sqrgas_42
.Llast_sqrgas_42:
movq (%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (%rdi), %rax
adox (%rdi), %rax
movq %rax, (%rdi)
mov $(0), %rax
adcx %rax, %rdx
adox %rax, %rdx
movq %rdx, (8)(%rdi)
pop %rcx
lea (-8)(,%rcx,8), %rax
sub %rax, %rsi
sub %rax, %rdi
sub %rax, %rdi
ret
.Lfe42:
.size finalize, .Lfe42-(finalize)
.p2align 6, 0x90
.type sqr8_triangle, @function
sqr8_triangle:
mov (%rsi), %rdx
xor %rax, %rax
mov %r8, (%rdi)
mulx (8)(%rsi), %rbx, %rbp
adcx %rbx, %r9
adox %rbp, %r10
mulx (16)(%rsi), %rbx, %rbp
adcx %rbx, %r10
adox %rbp, %r11
mulx (24)(%rsi), %rbx, %rbp
adcx %rbx, %r11
adox %rbp, %r12
mulx (32)(%rsi), %rbx, %rbp
adcx %rbx, %r12
adox %rbp, %r13
mulx (40)(%rsi), %rbx, %rbp
adcx %rbx, %r13
adox %rbp, %r14
mulx (48)(%rsi), %rbx, %rbp
adcx %rbx, %r14
adox %rbp, %r15
mulx (56)(%rsi), %rbx, %r8
adcx %rbx, %r15
adox %rax, %r8
adc $(0), %r8
mov (8)(%rsi), %rdx
xor %rax, %rax
mov %r9, (8)(%rdi)
mulx (16)(%rsi), %rbx, %rbp
adcx %rbx, %r11
adox %rbp, %r12
mulx (24)(%rsi), %rbx, %rbp
adcx %rbx, %r12
adox %rbp, %r13
mulx (32)(%rsi), %rbx, %rbp
adcx %rbx, %r13
adox %rbp, %r14
mulx (40)(%rsi), %rbx, %rbp
adcx %rbx, %r14
adox %rbp, %r15
mulx (48)(%rsi), %rbx, %rbp
adcx %rbx, %r15
adox %rbp, %r8
mulx (56)(%rsi), %rbx, %r9
adcx %rbx, %r8
adox %rax, %r9
adc $(0), %r9
mov (16)(%rsi), %rdx
xor %rax, %rax
mov %r10, (16)(%rdi)
mulx (24)(%rsi), %rbx, %rbp
adcx %rbx, %r13
adox %rbp, %r14
mulx (32)(%rsi), %rbx, %rbp
adcx %rbx, %r14
adox %rbp, %r15
mulx (40)(%rsi), %rbx, %rbp
adcx %rbx, %r15
adox %rbp, %r8
mulx (48)(%rsi), %rbx, %rbp
adcx %rbx, %r8
adox %rbp, %r9
mulx (56)(%rsi), %rbx, %r10
adcx %rbx, %r9
adox %rax, %r10
adc $(0), %r10
mov (24)(%rsi), %rdx
xor %rax, %rax
mov %r11, (24)(%rdi)
mulx (32)(%rsi), %rbx, %rbp
adcx %rbx, %r15
adox %rbp, %r8
mulx (40)(%rsi), %rbx, %rbp
adcx %rbx, %r8
adox %rbp, %r9
mulx (48)(%rsi), %rbx, %rbp
adcx %rbx, %r9
adox %rbp, %r10
mulx (56)(%rsi), %rbx, %r11
adcx %rbx, %r10
adox %rax, %r11
adc $(0), %r11
mov (32)(%rsi), %rdx
xor %rax, %rax
mov %r12, (32)(%rdi)
mulx (40)(%rsi), %rbx, %rbp
adcx %rbx, %r9
adox %rbp, %r10
mulx (48)(%rsi), %rbx, %rbp
adcx %rbx, %r10
adox %rbp, %r11
mulx (56)(%rsi), %rbx, %r12
adcx %rbx, %r11
adox %rax, %r12
adc $(0), %r12
mov (40)(%rsi), %rdx
xor %rax, %rax
mov %r13, (40)(%rdi)
mulx (48)(%rsi), %rbx, %rbp
adcx %rbx, %r11
adox %rbp, %r12
mulx (56)(%rsi), %rbx, %r13
adcx %rbx, %r12
adox %rax, %r13
adc $(0), %r13
mov (48)(%rsi), %rdx
xor %rax, %rax
mov %r14, (48)(%rdi)
mulx (56)(%rsi), %rbx, %r14
adcx %rbx, %r13
adox %rax, %r14
adc $(0), %r14
ret
.Lfe43:
.size sqr8_triangle, .Lfe43-(sqr8_triangle)
.p2align 6, 0x90
.type sqr_9, @function
sqr_9:
call sqr8_triangle
movq %r15, (56)(%rdi)
lea (64)(%rsi), %rcx
add $(64), %rdi
xor %r15, %r15
call mla_8x1
movq %r8, (8)(%rdi)
movq %r9, (16)(%rdi)
movq %r10, (24)(%rdi)
movq %r11, (32)(%rdi)
movq %r12, (40)(%rdi)
movq %r13, (48)(%rdi)
movq %r14, (56)(%rdi)
movq %r15, (64)(%rdi)
xor %rbx, %rbx
movq %rbx, (72)(%rdi)
sub $(64), %rdi
xor %rax, %rax
movq (%rsi), %rdx
mulx %rdx, %rax, %rdx
movq %rax, (%rdi)
adcx (8)(%rdi), %rdx
adox (8)(%rdi), %rdx
movq %rdx, (8)(%rdi)
movq (8)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (16)(%rdi), %rax
adox (16)(%rdi), %rax
movq %rax, (16)(%rdi)
adcx (24)(%rdi), %rdx
adox (24)(%rdi), %rdx
movq %rdx, (24)(%rdi)
movq (16)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (32)(%rdi), %rax
adox (32)(%rdi), %rax
movq %rax, (32)(%rdi)
adcx (40)(%rdi), %rdx
adox (40)(%rdi), %rdx
movq %rdx, (40)(%rdi)
movq (24)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (48)(%rdi), %rax
adox (48)(%rdi), %rax
movq %rax, (48)(%rdi)
adcx (56)(%rdi), %rdx
adox (56)(%rdi), %rdx
movq %rdx, (56)(%rdi)
movq (32)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (64)(%rdi), %rax
adox (64)(%rdi), %rax
movq %rax, (64)(%rdi)
adcx (72)(%rdi), %rdx
adox (72)(%rdi), %rdx
movq %rdx, (72)(%rdi)
movq (40)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (80)(%rdi), %rax
adox (80)(%rdi), %rax
movq %rax, (80)(%rdi)
adcx (88)(%rdi), %rdx
adox (88)(%rdi), %rdx
movq %rdx, (88)(%rdi)
movq (48)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (96)(%rdi), %rax
adox (96)(%rdi), %rax
movq %rax, (96)(%rdi)
adcx (104)(%rdi), %rdx
adox (104)(%rdi), %rdx
movq %rdx, (104)(%rdi)
movq (56)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (112)(%rdi), %rax
adox (112)(%rdi), %rax
movq %rax, (112)(%rdi)
adcx (120)(%rdi), %rdx
adox (120)(%rdi), %rdx
movq %rdx, (120)(%rdi)
movq (64)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (128)(%rdi), %rax
adox (128)(%rdi), %rax
movq %rax, (128)(%rdi)
mov $(0), %rax
adcx %rax, %rdx
adox %rax, %rdx
movq %rdx, (136)(%rdi)
ret
.Lfe44:
.size sqr_9, .Lfe44-(sqr_9)
.p2align 6, 0x90
.type sqr_10, @function
sqr_10:
call sqr8_triangle
movq %r15, (56)(%rdi)
lea (64)(%rsi), %rcx
add $(64), %rdi
xor %r15, %r15
call mla_8x2
movq %r8, (16)(%rdi)
movq %r9, (24)(%rdi)
movq %r10, (32)(%rdi)
movq %r11, (40)(%rdi)
movq %r12, (48)(%rdi)
movq %r13, (56)(%rdi)
movq %r14, (64)(%rdi)
movq (64)(%rsi), %rdx
xor %rax, %rax
mulx (72)(%rsi), %rbx, %r8
adcx %rbx, %r15
adox %rax, %r8
adc $(0), %r8
xor %rbx, %rbx
movq %r15, (72)(%rdi)
movq %r8, (80)(%rdi)
movq %rbx, (88)(%rdi)
sub $(64), %rdi
xor %rax, %rax
movq (%rsi), %rdx
mulx %rdx, %rax, %rdx
movq %rax, (%rdi)
adcx (8)(%rdi), %rdx
adox (8)(%rdi), %rdx
movq %rdx, (8)(%rdi)
movq (8)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (16)(%rdi), %rax
adox (16)(%rdi), %rax
movq %rax, (16)(%rdi)
adcx (24)(%rdi), %rdx
adox (24)(%rdi), %rdx
movq %rdx, (24)(%rdi)
movq (16)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (32)(%rdi), %rax
adox (32)(%rdi), %rax
movq %rax, (32)(%rdi)
adcx (40)(%rdi), %rdx
adox (40)(%rdi), %rdx
movq %rdx, (40)(%rdi)
movq (24)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (48)(%rdi), %rax
adox (48)(%rdi), %rax
movq %rax, (48)(%rdi)
adcx (56)(%rdi), %rdx
adox (56)(%rdi), %rdx
movq %rdx, (56)(%rdi)
movq (32)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (64)(%rdi), %rax
adox (64)(%rdi), %rax
movq %rax, (64)(%rdi)
adcx (72)(%rdi), %rdx
adox (72)(%rdi), %rdx
movq %rdx, (72)(%rdi)
movq (40)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (80)(%rdi), %rax
adox (80)(%rdi), %rax
movq %rax, (80)(%rdi)
adcx (88)(%rdi), %rdx
adox (88)(%rdi), %rdx
movq %rdx, (88)(%rdi)
movq (48)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (96)(%rdi), %rax
adox (96)(%rdi), %rax
movq %rax, (96)(%rdi)
adcx (104)(%rdi), %rdx
adox (104)(%rdi), %rdx
movq %rdx, (104)(%rdi)
movq (56)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (112)(%rdi), %rax
adox (112)(%rdi), %rax
movq %rax, (112)(%rdi)
adcx (120)(%rdi), %rdx
adox (120)(%rdi), %rdx
movq %rdx, (120)(%rdi)
movq (64)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (128)(%rdi), %rax
adox (128)(%rdi), %rax
movq %rax, (128)(%rdi)
adcx (136)(%rdi), %rdx
adox (136)(%rdi), %rdx
movq %rdx, (136)(%rdi)
movq (72)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (144)(%rdi), %rax
adox (144)(%rdi), %rax
movq %rax, (144)(%rdi)
mov $(0), %rax
adcx %rax, %rdx
adox %rax, %rdx
movq %rdx, (152)(%rdi)
ret
.Lfe45:
.size sqr_10, .Lfe45-(sqr_10)
.p2align 6, 0x90
.type sqr_11, @function
sqr_11:
call sqr8_triangle
movq %r15, (56)(%rdi)
lea (64)(%rsi), %rcx
add $(64), %rdi
xor %r15, %r15
call mla_8x1
add $(8), %rdi
add $(8), %rcx
call mla_8x2
sub $(8), %rdi
sub $(8), %rcx
movq %r8, (24)(%rdi)
movq %r9, (32)(%rdi)
movq %r10, (40)(%rdi)
movq %r11, (48)(%rdi)
movq %r12, (56)(%rdi)
movq (64)(%rsi), %rdx
xor %rax, %rax
mov %r13, (64)(%rdi)
mulx (72)(%rsi), %rbx, %rbp
adcx %rbx, %r14
adox %rbp, %r15
mulx (80)(%rsi), %rbx, %r8
adcx %rbx, %r15
adox %rax, %r8
adc $(0), %r8
movq (72)(%rsi), %rdx
xor %rax, %rax
mov %r14, (72)(%rdi)
mulx (80)(%rsi), %rbx, %r9
adcx %rbx, %r8
adox %rax, %r9
adc $(0), %r9
xor %rbx, %rbx
movq %r15, (80)(%rdi)
movq %r8, (88)(%rdi)
movq %r9, (96)(%rdi)
movq %rbx, (104)(%rdi)
sub $(64), %rdi
xor %rax, %rax
movq (%rsi), %rdx
mulx %rdx, %rax, %rdx
movq %rax, (%rdi)
adcx (8)(%rdi), %rdx
adox (8)(%rdi), %rdx
movq %rdx, (8)(%rdi)
movq (8)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (16)(%rdi), %rax
adox (16)(%rdi), %rax
movq %rax, (16)(%rdi)
adcx (24)(%rdi), %rdx
adox (24)(%rdi), %rdx
movq %rdx, (24)(%rdi)
movq (16)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (32)(%rdi), %rax
adox (32)(%rdi), %rax
movq %rax, (32)(%rdi)
adcx (40)(%rdi), %rdx
adox (40)(%rdi), %rdx
movq %rdx, (40)(%rdi)
movq (24)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (48)(%rdi), %rax
adox (48)(%rdi), %rax
movq %rax, (48)(%rdi)
adcx (56)(%rdi), %rdx
adox (56)(%rdi), %rdx
movq %rdx, (56)(%rdi)
movq (32)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (64)(%rdi), %rax
adox (64)(%rdi), %rax
movq %rax, (64)(%rdi)
adcx (72)(%rdi), %rdx
adox (72)(%rdi), %rdx
movq %rdx, (72)(%rdi)
movq (40)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (80)(%rdi), %rax
adox (80)(%rdi), %rax
movq %rax, (80)(%rdi)
adcx (88)(%rdi), %rdx
adox (88)(%rdi), %rdx
movq %rdx, (88)(%rdi)
movq (48)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (96)(%rdi), %rax
adox (96)(%rdi), %rax
movq %rax, (96)(%rdi)
adcx (104)(%rdi), %rdx
adox (104)(%rdi), %rdx
movq %rdx, (104)(%rdi)
movq (56)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (112)(%rdi), %rax
adox (112)(%rdi), %rax
movq %rax, (112)(%rdi)
adcx (120)(%rdi), %rdx
adox (120)(%rdi), %rdx
movq %rdx, (120)(%rdi)
movq (64)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (128)(%rdi), %rax
adox (128)(%rdi), %rax
movq %rax, (128)(%rdi)
adcx (136)(%rdi), %rdx
adox (136)(%rdi), %rdx
movq %rdx, (136)(%rdi)
movq (72)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (144)(%rdi), %rax
adox (144)(%rdi), %rax
movq %rax, (144)(%rdi)
adcx (152)(%rdi), %rdx
adox (152)(%rdi), %rdx
movq %rdx, (152)(%rdi)
movq (80)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (160)(%rdi), %rax
adox (160)(%rdi), %rax
movq %rax, (160)(%rdi)
mov $(0), %rax
adcx %rax, %rdx
adox %rax, %rdx
movq %rdx, (168)(%rdi)
ret
.Lfe46:
.size sqr_11, .Lfe46-(sqr_11)
.p2align 6, 0x90
.type sqr_12, @function
sqr_12:
call sqr8_triangle
movq %r15, (56)(%rdi)
lea (64)(%rsi), %rcx
add $(64), %rdi
xor %r15, %r15
call mla_8x2
add $(16), %rdi
add $(16), %rcx
call mla_8x2
sub $(16), %rdi
sub $(16), %rcx
movq %r8, (32)(%rdi)
movq %r9, (40)(%rdi)
movq %r10, (48)(%rdi)
movq %r11, (56)(%rdi)
movq (64)(%rsi), %rdx
xor %rax, %rax
mov %r12, (64)(%rdi)
mulx (72)(%rsi), %rbx, %rbp
adcx %rbx, %r13
adox %rbp, %r14
mulx (80)(%rsi), %rbx, %rbp
adcx %rbx, %r14
adox %rbp, %r15
mulx (88)(%rsi), %rbx, %r8
adcx %rbx, %r15
adox %rax, %r8
adc $(0), %r8
movq (72)(%rsi), %rdx
xor %rax, %rax
mov %r13, (72)(%rdi)
mulx (80)(%rsi), %rbx, %rbp
adcx %rbx, %r15
adox %rbp, %r8
mulx (88)(%rsi), %rbx, %r9
adcx %rbx, %r8
adox %rax, %r9
adc $(0), %r9
movq (80)(%rsi), %rdx
xor %rax, %rax
mov %r14, (80)(%rdi)
mulx (88)(%rsi), %rbx, %r10
adcx %rbx, %r9
adox %rax, %r10
adc $(0), %r10
xor %rbx, %rbx
movq %r15, (88)(%rdi)
movq %r8, (96)(%rdi)
movq %r9, (104)(%rdi)
movq %r10, (112)(%rdi)
movq %rbx, (120)(%rdi)
sub $(64), %rdi
xor %rax, %rax
movq (%rsi), %rdx
mulx %rdx, %rax, %rdx
movq %rax, (%rdi)
adcx (8)(%rdi), %rdx
adox (8)(%rdi), %rdx
movq %rdx, (8)(%rdi)
movq (8)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (16)(%rdi), %rax
adox (16)(%rdi), %rax
movq %rax, (16)(%rdi)
adcx (24)(%rdi), %rdx
adox (24)(%rdi), %rdx
movq %rdx, (24)(%rdi)
movq (16)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (32)(%rdi), %rax
adox (32)(%rdi), %rax
movq %rax, (32)(%rdi)
adcx (40)(%rdi), %rdx
adox (40)(%rdi), %rdx
movq %rdx, (40)(%rdi)
movq (24)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (48)(%rdi), %rax
adox (48)(%rdi), %rax
movq %rax, (48)(%rdi)
adcx (56)(%rdi), %rdx
adox (56)(%rdi), %rdx
movq %rdx, (56)(%rdi)
movq (32)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (64)(%rdi), %rax
adox (64)(%rdi), %rax
movq %rax, (64)(%rdi)
adcx (72)(%rdi), %rdx
adox (72)(%rdi), %rdx
movq %rdx, (72)(%rdi)
movq (40)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (80)(%rdi), %rax
adox (80)(%rdi), %rax
movq %rax, (80)(%rdi)
adcx (88)(%rdi), %rdx
adox (88)(%rdi), %rdx
movq %rdx, (88)(%rdi)
movq (48)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (96)(%rdi), %rax
adox (96)(%rdi), %rax
movq %rax, (96)(%rdi)
adcx (104)(%rdi), %rdx
adox (104)(%rdi), %rdx
movq %rdx, (104)(%rdi)
movq (56)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (112)(%rdi), %rax
adox (112)(%rdi), %rax
movq %rax, (112)(%rdi)
adcx (120)(%rdi), %rdx
adox (120)(%rdi), %rdx
movq %rdx, (120)(%rdi)
movq (64)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (128)(%rdi), %rax
adox (128)(%rdi), %rax
movq %rax, (128)(%rdi)
adcx (136)(%rdi), %rdx
adox (136)(%rdi), %rdx
movq %rdx, (136)(%rdi)
movq (72)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (144)(%rdi), %rax
adox (144)(%rdi), %rax
movq %rax, (144)(%rdi)
adcx (152)(%rdi), %rdx
adox (152)(%rdi), %rdx
movq %rdx, (152)(%rdi)
movq (80)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (160)(%rdi), %rax
adox (160)(%rdi), %rax
movq %rax, (160)(%rdi)
adcx (168)(%rdi), %rdx
adox (168)(%rdi), %rdx
movq %rdx, (168)(%rdi)
movq (88)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (176)(%rdi), %rax
adox (176)(%rdi), %rax
movq %rax, (176)(%rdi)
mov $(0), %rax
adcx %rax, %rdx
adox %rax, %rdx
movq %rdx, (184)(%rdi)
ret
.Lfe47:
.size sqr_12, .Lfe47-(sqr_12)
.p2align 6, 0x90
.type sqr_13, @function
sqr_13:
call sqr8_triangle
movq %r15, (56)(%rdi)
lea (64)(%rsi), %rcx
add $(64), %rdi
xor %r15, %r15
call mla_8x1
add $(8), %rdi
add $(8), %rcx
call mla_8x2
add $(16), %rdi
add $(16), %rcx
call mla_8x2
sub $(24), %rdi
sub $(24), %rcx
movq %r8, (40)(%rdi)
movq %r9, (48)(%rdi)
movq %r10, (56)(%rdi)
movq (64)(%rsi), %rdx
xor %rax, %rax
mov %r11, (64)(%rdi)
mulx (72)(%rsi), %rbx, %rbp
adcx %rbx, %r12
adox %rbp, %r13
mulx (80)(%rsi), %rbx, %rbp
adcx %rbx, %r13
adox %rbp, %r14
mulx (88)(%rsi), %rbx, %rbp
adcx %rbx, %r14
adox %rbp, %r15
mulx (96)(%rsi), %rbx, %r8
adcx %rbx, %r15
adox %rax, %r8
adc $(0), %r8
movq (72)(%rsi), %rdx
xor %rax, %rax
mov %r12, (72)(%rdi)
mulx (80)(%rsi), %rbx, %rbp
adcx %rbx, %r14
adox %rbp, %r15
mulx (88)(%rsi), %rbx, %rbp
adcx %rbx, %r15
adox %rbp, %r8
mulx (96)(%rsi), %rbx, %r9
adcx %rbx, %r8
adox %rax, %r9
adc $(0), %r9
movq (80)(%rsi), %rdx
xor %rax, %rax
mov %r13, (80)(%rdi)
mulx (88)(%rsi), %rbx, %rbp
adcx %rbx, %r8
adox %rbp, %r9
mulx (96)(%rsi), %rbx, %r10
adcx %rbx, %r9
adox %rax, %r10
adc $(0), %r10
movq (88)(%rsi), %rdx
xor %rax, %rax
mov %r14, (88)(%rdi)
mulx (96)(%rsi), %rbx, %r11
adcx %rbx, %r10
adox %rax, %r11
adc $(0), %r11
xor %rbx, %rbx
movq %r15, (96)(%rdi)
movq %r8, (104)(%rdi)
movq %r9, (112)(%rdi)
movq %r10, (120)(%rdi)
movq %r11, (128)(%rdi)
movq %rbx, (136)(%rdi)
sub $(64), %rdi
xor %rax, %rax
movq (%rsi), %rdx
mulx %rdx, %rax, %rdx
movq %rax, (%rdi)
adcx (8)(%rdi), %rdx
adox (8)(%rdi), %rdx
movq %rdx, (8)(%rdi)
movq (8)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (16)(%rdi), %rax
adox (16)(%rdi), %rax
movq %rax, (16)(%rdi)
adcx (24)(%rdi), %rdx
adox (24)(%rdi), %rdx
movq %rdx, (24)(%rdi)
movq (16)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (32)(%rdi), %rax
adox (32)(%rdi), %rax
movq %rax, (32)(%rdi)
adcx (40)(%rdi), %rdx
adox (40)(%rdi), %rdx
movq %rdx, (40)(%rdi)
movq (24)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (48)(%rdi), %rax
adox (48)(%rdi), %rax
movq %rax, (48)(%rdi)
adcx (56)(%rdi), %rdx
adox (56)(%rdi), %rdx
movq %rdx, (56)(%rdi)
movq (32)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (64)(%rdi), %rax
adox (64)(%rdi), %rax
movq %rax, (64)(%rdi)
adcx (72)(%rdi), %rdx
adox (72)(%rdi), %rdx
movq %rdx, (72)(%rdi)
movq (40)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (80)(%rdi), %rax
adox (80)(%rdi), %rax
movq %rax, (80)(%rdi)
adcx (88)(%rdi), %rdx
adox (88)(%rdi), %rdx
movq %rdx, (88)(%rdi)
movq (48)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (96)(%rdi), %rax
adox (96)(%rdi), %rax
movq %rax, (96)(%rdi)
adcx (104)(%rdi), %rdx
adox (104)(%rdi), %rdx
movq %rdx, (104)(%rdi)
movq (56)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (112)(%rdi), %rax
adox (112)(%rdi), %rax
movq %rax, (112)(%rdi)
adcx (120)(%rdi), %rdx
adox (120)(%rdi), %rdx
movq %rdx, (120)(%rdi)
movq (64)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (128)(%rdi), %rax
adox (128)(%rdi), %rax
movq %rax, (128)(%rdi)
adcx (136)(%rdi), %rdx
adox (136)(%rdi), %rdx
movq %rdx, (136)(%rdi)
movq (72)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (144)(%rdi), %rax
adox (144)(%rdi), %rax
movq %rax, (144)(%rdi)
adcx (152)(%rdi), %rdx
adox (152)(%rdi), %rdx
movq %rdx, (152)(%rdi)
movq (80)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (160)(%rdi), %rax
adox (160)(%rdi), %rax
movq %rax, (160)(%rdi)
adcx (168)(%rdi), %rdx
adox (168)(%rdi), %rdx
movq %rdx, (168)(%rdi)
movq (88)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (176)(%rdi), %rax
adox (176)(%rdi), %rax
movq %rax, (176)(%rdi)
adcx (184)(%rdi), %rdx
adox (184)(%rdi), %rdx
movq %rdx, (184)(%rdi)
movq (96)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (192)(%rdi), %rax
adox (192)(%rdi), %rax
movq %rax, (192)(%rdi)
mov $(0), %rax
adcx %rax, %rdx
adox %rax, %rdx
movq %rdx, (200)(%rdi)
ret
.Lfe48:
.size sqr_13, .Lfe48-(sqr_13)
.p2align 6, 0x90
.type sqr_14, @function
sqr_14:
call sqr8_triangle
movq %r15, (56)(%rdi)
lea (64)(%rsi), %rcx
add $(64), %rdi
xor %r15, %r15
call mla_8x2
add $(16), %rdi
add $(16), %rcx
call mla_8x2
add $(16), %rdi
add $(16), %rcx
call mla_8x2
sub $(32), %rdi
sub $(32), %rcx
movq %r8, (48)(%rdi)
movq %r9, (56)(%rdi)
movq (64)(%rsi), %rdx
xor %rax, %rax
mov %r10, (64)(%rdi)
mulx (72)(%rsi), %rbx, %rbp
adcx %rbx, %r11
adox %rbp, %r12
mulx (80)(%rsi), %rbx, %rbp
adcx %rbx, %r12
adox %rbp, %r13
mulx (88)(%rsi), %rbx, %rbp
adcx %rbx, %r13
adox %rbp, %r14
mulx (96)(%rsi), %rbx, %rbp
adcx %rbx, %r14
adox %rbp, %r15
mulx (104)(%rsi), %rbx, %r8
adcx %rbx, %r15
adox %rax, %r8
adc $(0), %r8
movq (72)(%rsi), %rdx
xor %rax, %rax
mov %r11, (72)(%rdi)
mulx (80)(%rsi), %rbx, %rbp
adcx %rbx, %r13
adox %rbp, %r14
mulx (88)(%rsi), %rbx, %rbp
adcx %rbx, %r14
adox %rbp, %r15
mulx (96)(%rsi), %rbx, %rbp
adcx %rbx, %r15
adox %rbp, %r8
mulx (104)(%rsi), %rbx, %r9
adcx %rbx, %r8
adox %rax, %r9
adc $(0), %r9
movq (80)(%rsi), %rdx
xor %rax, %rax
mov %r12, (80)(%rdi)
mulx (88)(%rsi), %rbx, %rbp
adcx %rbx, %r15
adox %rbp, %r8
mulx (96)(%rsi), %rbx, %rbp
adcx %rbx, %r8
adox %rbp, %r9
mulx (104)(%rsi), %rbx, %r10
adcx %rbx, %r9
adox %rax, %r10
adc $(0), %r10
movq (88)(%rsi), %rdx
xor %rax, %rax
mov %r13, (88)(%rdi)
mulx (96)(%rsi), %rbx, %rbp
adcx %rbx, %r9
adox %rbp, %r10
mulx (104)(%rsi), %rbx, %r11
adcx %rbx, %r10
adox %rax, %r11
adc $(0), %r11
movq (96)(%rsi), %rdx
xor %rax, %rax
mov %r14, (96)(%rdi)
mulx (104)(%rsi), %rbx, %r12
adcx %rbx, %r11
adox %rax, %r12
adc $(0), %r12
xor %rbx, %rbx
movq %r15, (104)(%rdi)
movq %r8, (112)(%rdi)
movq %r9, (120)(%rdi)
movq %r10, (128)(%rdi)
movq %r11, (136)(%rdi)
movq %r12, (144)(%rdi)
movq %rbx, (152)(%rdi)
sub $(64), %rdi
xor %rax, %rax
movq (%rsi), %rdx
mulx %rdx, %rax, %rdx
movq %rax, (%rdi)
adcx (8)(%rdi), %rdx
adox (8)(%rdi), %rdx
movq %rdx, (8)(%rdi)
movq (8)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (16)(%rdi), %rax
adox (16)(%rdi), %rax
movq %rax, (16)(%rdi)
adcx (24)(%rdi), %rdx
adox (24)(%rdi), %rdx
movq %rdx, (24)(%rdi)
movq (16)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (32)(%rdi), %rax
adox (32)(%rdi), %rax
movq %rax, (32)(%rdi)
adcx (40)(%rdi), %rdx
adox (40)(%rdi), %rdx
movq %rdx, (40)(%rdi)
movq (24)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (48)(%rdi), %rax
adox (48)(%rdi), %rax
movq %rax, (48)(%rdi)
adcx (56)(%rdi), %rdx
adox (56)(%rdi), %rdx
movq %rdx, (56)(%rdi)
movq (32)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (64)(%rdi), %rax
adox (64)(%rdi), %rax
movq %rax, (64)(%rdi)
adcx (72)(%rdi), %rdx
adox (72)(%rdi), %rdx
movq %rdx, (72)(%rdi)
movq (40)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (80)(%rdi), %rax
adox (80)(%rdi), %rax
movq %rax, (80)(%rdi)
adcx (88)(%rdi), %rdx
adox (88)(%rdi), %rdx
movq %rdx, (88)(%rdi)
movq (48)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (96)(%rdi), %rax
adox (96)(%rdi), %rax
movq %rax, (96)(%rdi)
adcx (104)(%rdi), %rdx
adox (104)(%rdi), %rdx
movq %rdx, (104)(%rdi)
movq (56)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (112)(%rdi), %rax
adox (112)(%rdi), %rax
movq %rax, (112)(%rdi)
adcx (120)(%rdi), %rdx
adox (120)(%rdi), %rdx
movq %rdx, (120)(%rdi)
movq (64)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (128)(%rdi), %rax
adox (128)(%rdi), %rax
movq %rax, (128)(%rdi)
adcx (136)(%rdi), %rdx
adox (136)(%rdi), %rdx
movq %rdx, (136)(%rdi)
movq (72)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (144)(%rdi), %rax
adox (144)(%rdi), %rax
movq %rax, (144)(%rdi)
adcx (152)(%rdi), %rdx
adox (152)(%rdi), %rdx
movq %rdx, (152)(%rdi)
movq (80)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (160)(%rdi), %rax
adox (160)(%rdi), %rax
movq %rax, (160)(%rdi)
adcx (168)(%rdi), %rdx
adox (168)(%rdi), %rdx
movq %rdx, (168)(%rdi)
movq (88)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (176)(%rdi), %rax
adox (176)(%rdi), %rax
movq %rax, (176)(%rdi)
adcx (184)(%rdi), %rdx
adox (184)(%rdi), %rdx
movq %rdx, (184)(%rdi)
movq (96)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (192)(%rdi), %rax
adox (192)(%rdi), %rax
movq %rax, (192)(%rdi)
adcx (200)(%rdi), %rdx
adox (200)(%rdi), %rdx
movq %rdx, (200)(%rdi)
movq (104)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (208)(%rdi), %rax
adox (208)(%rdi), %rax
movq %rax, (208)(%rdi)
mov $(0), %rax
adcx %rax, %rdx
adox %rax, %rdx
movq %rdx, (216)(%rdi)
ret
.Lfe49:
.size sqr_14, .Lfe49-(sqr_14)
.p2align 6, 0x90
.type sqr_15, @function
sqr_15:
call sqr8_triangle
movq %r15, (56)(%rdi)
lea (64)(%rsi), %rcx
add $(64), %rdi
xor %r15, %r15
call mla_8x1
add $(8), %rdi
add $(8), %rcx
call mla_8x2
add $(16), %rdi
add $(16), %rcx
call mla_8x2
add $(16), %rdi
add $(16), %rcx
call mla_8x2
sub $(40), %rdi
sub $(40), %rcx
movq %r8, (56)(%rdi)
movq (64)(%rsi), %rdx
xor %rax, %rax
mov %r9, (64)(%rdi)
mulx (72)(%rsi), %rbx, %rbp
adcx %rbx, %r10
adox %rbp, %r11
mulx (80)(%rsi), %rbx, %rbp
adcx %rbx, %r11
adox %rbp, %r12
mulx (88)(%rsi), %rbx, %rbp
adcx %rbx, %r12
adox %rbp, %r13
mulx (96)(%rsi), %rbx, %rbp
adcx %rbx, %r13
adox %rbp, %r14
mulx (104)(%rsi), %rbx, %rbp
adcx %rbx, %r14
adox %rbp, %r15
mulx (112)(%rsi), %rbx, %r8
adcx %rbx, %r15
adox %rax, %r8
adc $(0), %r8
movq (72)(%rsi), %rdx
xor %rax, %rax
mov %r10, (72)(%rdi)
mulx (80)(%rsi), %rbx, %rbp
adcx %rbx, %r12
adox %rbp, %r13
mulx (88)(%rsi), %rbx, %rbp
adcx %rbx, %r13
adox %rbp, %r14
mulx (96)(%rsi), %rbx, %rbp
adcx %rbx, %r14
adox %rbp, %r15
mulx (104)(%rsi), %rbx, %rbp
adcx %rbx, %r15
adox %rbp, %r8
mulx (112)(%rsi), %rbx, %r9
adcx %rbx, %r8
adox %rax, %r9
adc $(0), %r9
movq (80)(%rsi), %rdx
xor %rax, %rax
mov %r11, (80)(%rdi)
mulx (88)(%rsi), %rbx, %rbp
adcx %rbx, %r14
adox %rbp, %r15
mulx (96)(%rsi), %rbx, %rbp
adcx %rbx, %r15
adox %rbp, %r8
mulx (104)(%rsi), %rbx, %rbp
adcx %rbx, %r8
adox %rbp, %r9
mulx (112)(%rsi), %rbx, %r10
adcx %rbx, %r9
adox %rax, %r10
adc $(0), %r10
movq (88)(%rsi), %rdx
xor %rax, %rax
mov %r12, (88)(%rdi)
mulx (96)(%rsi), %rbx, %rbp
adcx %rbx, %r8
adox %rbp, %r9
mulx (104)(%rsi), %rbx, %rbp
adcx %rbx, %r9
adox %rbp, %r10
mulx (112)(%rsi), %rbx, %r11
adcx %rbx, %r10
adox %rax, %r11
adc $(0), %r11
movq (96)(%rsi), %rdx
xor %rax, %rax
mov %r13, (96)(%rdi)
mulx (104)(%rsi), %rbx, %rbp
adcx %rbx, %r10
adox %rbp, %r11
mulx (112)(%rsi), %rbx, %r12
adcx %rbx, %r11
adox %rax, %r12
adc $(0), %r12
movq (104)(%rsi), %rdx
xor %rax, %rax
mov %r14, (104)(%rdi)
mulx (112)(%rsi), %rbx, %r13
adcx %rbx, %r12
adox %rax, %r13
adc $(0), %r13
xor %rbx, %rbx
movq %r15, (112)(%rdi)
movq %r8, (120)(%rdi)
movq %r9, (128)(%rdi)
movq %r10, (136)(%rdi)
movq %r11, (144)(%rdi)
movq %r12, (152)(%rdi)
movq %r13, (160)(%rdi)
movq %rbx, (168)(%rdi)
sub $(64), %rdi
xor %rax, %rax
movq (%rsi), %rdx
mulx %rdx, %rax, %rdx
movq %rax, (%rdi)
adcx (8)(%rdi), %rdx
adox (8)(%rdi), %rdx
movq %rdx, (8)(%rdi)
movq (8)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (16)(%rdi), %rax
adox (16)(%rdi), %rax
movq %rax, (16)(%rdi)
adcx (24)(%rdi), %rdx
adox (24)(%rdi), %rdx
movq %rdx, (24)(%rdi)
movq (16)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (32)(%rdi), %rax
adox (32)(%rdi), %rax
movq %rax, (32)(%rdi)
adcx (40)(%rdi), %rdx
adox (40)(%rdi), %rdx
movq %rdx, (40)(%rdi)
movq (24)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (48)(%rdi), %rax
adox (48)(%rdi), %rax
movq %rax, (48)(%rdi)
adcx (56)(%rdi), %rdx
adox (56)(%rdi), %rdx
movq %rdx, (56)(%rdi)
movq (32)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (64)(%rdi), %rax
adox (64)(%rdi), %rax
movq %rax, (64)(%rdi)
adcx (72)(%rdi), %rdx
adox (72)(%rdi), %rdx
movq %rdx, (72)(%rdi)
movq (40)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (80)(%rdi), %rax
adox (80)(%rdi), %rax
movq %rax, (80)(%rdi)
adcx (88)(%rdi), %rdx
adox (88)(%rdi), %rdx
movq %rdx, (88)(%rdi)
movq (48)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (96)(%rdi), %rax
adox (96)(%rdi), %rax
movq %rax, (96)(%rdi)
adcx (104)(%rdi), %rdx
adox (104)(%rdi), %rdx
movq %rdx, (104)(%rdi)
movq (56)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (112)(%rdi), %rax
adox (112)(%rdi), %rax
movq %rax, (112)(%rdi)
adcx (120)(%rdi), %rdx
adox (120)(%rdi), %rdx
movq %rdx, (120)(%rdi)
movq (64)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (128)(%rdi), %rax
adox (128)(%rdi), %rax
movq %rax, (128)(%rdi)
adcx (136)(%rdi), %rdx
adox (136)(%rdi), %rdx
movq %rdx, (136)(%rdi)
movq (72)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (144)(%rdi), %rax
adox (144)(%rdi), %rax
movq %rax, (144)(%rdi)
adcx (152)(%rdi), %rdx
adox (152)(%rdi), %rdx
movq %rdx, (152)(%rdi)
movq (80)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (160)(%rdi), %rax
adox (160)(%rdi), %rax
movq %rax, (160)(%rdi)
adcx (168)(%rdi), %rdx
adox (168)(%rdi), %rdx
movq %rdx, (168)(%rdi)
movq (88)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (176)(%rdi), %rax
adox (176)(%rdi), %rax
movq %rax, (176)(%rdi)
adcx (184)(%rdi), %rdx
adox (184)(%rdi), %rdx
movq %rdx, (184)(%rdi)
movq (96)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (192)(%rdi), %rax
adox (192)(%rdi), %rax
movq %rax, (192)(%rdi)
adcx (200)(%rdi), %rdx
adox (200)(%rdi), %rdx
movq %rdx, (200)(%rdi)
movq (104)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (208)(%rdi), %rax
adox (208)(%rdi), %rax
movq %rax, (208)(%rdi)
adcx (216)(%rdi), %rdx
adox (216)(%rdi), %rdx
movq %rdx, (216)(%rdi)
movq (112)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (224)(%rdi), %rax
adox (224)(%rdi), %rax
movq %rax, (224)(%rdi)
mov $(0), %rax
adcx %rax, %rdx
adox %rax, %rdx
movq %rdx, (232)(%rdi)
ret
.Lfe50:
.size sqr_15, .Lfe50-(sqr_15)
.p2align 6, 0x90
.type sqr_16, @function
sqr_16:
call sqr8_triangle
movq %r15, (56)(%rdi)
mov %rsi, %rcx
add $(64), %rsi
add $(64), %rdi
xor %r15, %r15
call mla_8x2
add $(16), %rdi
add $(16), %rcx
call mla_8x2
add $(16), %rdi
add $(16), %rcx
call mla_8x2
add $(16), %rdi
add $(16), %rcx
call mla_8x2
sub $(48), %rdi
sub $(48), %rcx
add $(64), %rdi
call sqr8_triangle
xor %rbx, %rbx
movq %r15, (56)(%rdi)
movq %r8, (64)(%rdi)
movq %r9, (72)(%rdi)
movq %r10, (80)(%rdi)
movq %r11, (88)(%rdi)
movq %r12, (96)(%rdi)
movq %r13, (104)(%rdi)
movq %r14, (112)(%rdi)
movq %rbx, (120)(%rdi)
sub $(64), %rsi
sub $(128), %rdi
xor %rax, %rax
movq (%rsi), %rdx
mulx %rdx, %rax, %rdx
movq %rax, (%rdi)
adcx (8)(%rdi), %rdx
adox (8)(%rdi), %rdx
movq %rdx, (8)(%rdi)
movq (8)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (16)(%rdi), %rax
adox (16)(%rdi), %rax
movq %rax, (16)(%rdi)
adcx (24)(%rdi), %rdx
adox (24)(%rdi), %rdx
movq %rdx, (24)(%rdi)
movq (16)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (32)(%rdi), %rax
adox (32)(%rdi), %rax
movq %rax, (32)(%rdi)
adcx (40)(%rdi), %rdx
adox (40)(%rdi), %rdx
movq %rdx, (40)(%rdi)
movq (24)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (48)(%rdi), %rax
adox (48)(%rdi), %rax
movq %rax, (48)(%rdi)
adcx (56)(%rdi), %rdx
adox (56)(%rdi), %rdx
movq %rdx, (56)(%rdi)
movq (32)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (64)(%rdi), %rax
adox (64)(%rdi), %rax
movq %rax, (64)(%rdi)
adcx (72)(%rdi), %rdx
adox (72)(%rdi), %rdx
movq %rdx, (72)(%rdi)
movq (40)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (80)(%rdi), %rax
adox (80)(%rdi), %rax
movq %rax, (80)(%rdi)
adcx (88)(%rdi), %rdx
adox (88)(%rdi), %rdx
movq %rdx, (88)(%rdi)
movq (48)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (96)(%rdi), %rax
adox (96)(%rdi), %rax
movq %rax, (96)(%rdi)
adcx (104)(%rdi), %rdx
adox (104)(%rdi), %rdx
movq %rdx, (104)(%rdi)
movq (56)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (112)(%rdi), %rax
adox (112)(%rdi), %rax
movq %rax, (112)(%rdi)
adcx (120)(%rdi), %rdx
adox (120)(%rdi), %rdx
movq %rdx, (120)(%rdi)
movq (64)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (128)(%rdi), %rax
adox (128)(%rdi), %rax
movq %rax, (128)(%rdi)
adcx (136)(%rdi), %rdx
adox (136)(%rdi), %rdx
movq %rdx, (136)(%rdi)
movq (72)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (144)(%rdi), %rax
adox (144)(%rdi), %rax
movq %rax, (144)(%rdi)
adcx (152)(%rdi), %rdx
adox (152)(%rdi), %rdx
movq %rdx, (152)(%rdi)
movq (80)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (160)(%rdi), %rax
adox (160)(%rdi), %rax
movq %rax, (160)(%rdi)
adcx (168)(%rdi), %rdx
adox (168)(%rdi), %rdx
movq %rdx, (168)(%rdi)
movq (88)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (176)(%rdi), %rax
adox (176)(%rdi), %rax
movq %rax, (176)(%rdi)
adcx (184)(%rdi), %rdx
adox (184)(%rdi), %rdx
movq %rdx, (184)(%rdi)
movq (96)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (192)(%rdi), %rax
adox (192)(%rdi), %rax
movq %rax, (192)(%rdi)
adcx (200)(%rdi), %rdx
adox (200)(%rdi), %rdx
movq %rdx, (200)(%rdi)
movq (104)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (208)(%rdi), %rax
adox (208)(%rdi), %rax
movq %rax, (208)(%rdi)
adcx (216)(%rdi), %rdx
adox (216)(%rdi), %rdx
movq %rdx, (216)(%rdi)
movq (112)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (224)(%rdi), %rax
adox (224)(%rdi), %rax
movq %rax, (224)(%rdi)
adcx (232)(%rdi), %rdx
adox (232)(%rdi), %rdx
movq %rdx, (232)(%rdi)
movq (120)(%rsi), %rdx
mulx %rdx, %rax, %rdx
adcx (240)(%rdi), %rax
adox (240)(%rdi), %rax
movq %rax, (240)(%rdi)
mov $(0), %rax
adcx %rax, %rdx
adox %rax, %rdx
movq %rdx, (248)(%rdi)
ret
.Lfe51:
.size sqr_16, .Lfe51-(sqr_16)
.p2align 6, 0x90
.type sqr9_triangle, @function
sqr9_triangle:
call sqr8_triangle
movq %r15, (56)(%rdi)
xor %r15, %r15
lea (64)(%rsi), %rcx
add $(64), %rdi
call mla_8x1
xor %rax, %rax
movq %r8, (8)(%rdi)
movq %r9, (16)(%rdi)
movq %r10, (24)(%rdi)
movq %r11, (32)(%rdi)
movq %r12, (40)(%rdi)
movq %r13, (48)(%rdi)
movq %r14, (56)(%rdi)
movq %r15, (64)(%rdi)
movq %rax, (72)(%rdi)
sub $(64), %rdi
ret
.Lfe52:
.size sqr9_triangle, .Lfe52-(sqr9_triangle)
.p2align 6, 0x90
.type sqr10_triangle, @function
sqr10_triangle:
call sqr8_triangle
movq %r15, (56)(%rdi)
xor %r15, %r15
lea (64)(%rsi), %rcx
add $(64), %rdi
call mla_8x2
movq %r8, (16)(%rdi)
movq %r9, (24)(%rdi)
movq %r10, (32)(%rdi)
movq %r11, (40)(%rdi)
movq %r12, (48)(%rdi)
movq %r13, (56)(%rdi)
movq %r14, (64)(%rdi)
movq (64)(%rsi), %rdx
xor %rax, %rax
mulx (72)(%rsi), %rbx, %r8
adcx %rbx, %r15
adox %rax, %r8
adc $(0), %r8
xor %rax, %rax
movq %r15, (72)(%rdi)
movq %r8, (80)(%rdi)
movq %rax, (88)(%rdi)
sub $(64), %rdi
ret
.Lfe53:
.size sqr10_triangle, .Lfe53-(sqr10_triangle)
.p2align 6, 0x90
.type sqr11_triangle, @function
sqr11_triangle:
call sqr8_triangle
movq %r15, (56)(%rdi)
xor %r15, %r15
lea (64)(%rsi), %rcx
add $(64), %rdi
call mla_8x3
movq %r8, (24)(%rdi)
movq %r9, (32)(%rdi)
movq %r10, (40)(%rdi)
movq %r11, (48)(%rdi)
movq %r12, (56)(%rdi)
movq (64)(%rsi), %rdx
xor %rax, %rax
mov %r13, (64)(%rdi)
mulx (72)(%rsi), %rbx, %rbp
adcx %rbx, %r14
adox %rbp, %r15
mulx (80)(%rsi), %rbx, %r8
adcx %rbx, %r15
adox %rax, %r8
adc $(0), %r8
movq (72)(%rsi), %rdx
xor %rax, %rax
mov %r14, (72)(%rdi)
mulx (80)(%rsi), %rbx, %r9
adcx %rbx, %r8
adox %rax, %r9
adc $(0), %r9
xor %rax, %rax
movq %r15, (80)(%rdi)
movq %r8, (88)(%rdi)
movq %r9, (96)(%rdi)
movq %rax, (104)(%rdi)
sub $(64), %rdi
ret
.Lfe54:
.size sqr11_triangle, .Lfe54-(sqr11_triangle)
.p2align 6, 0x90
.type sqr12_triangle, @function
sqr12_triangle:
call sqr8_triangle
movq %r15, (56)(%rdi)
xor %r15, %r15
lea (64)(%rsi), %rcx
add $(64), %rdi
call mla_8x4
movq %r8, (32)(%rdi)
movq %r9, (40)(%rdi)
movq %r10, (48)(%rdi)
movq %r11, (56)(%rdi)
movq (64)(%rsi), %rdx
xor %rax, %rax
mov %r12, (64)(%rdi)
mulx (72)(%rsi), %rbx, %rbp
adcx %rbx, %r13
adox %rbp, %r14
mulx (80)(%rsi), %rbx, %rbp
adcx %rbx, %r14
adox %rbp, %r15
mulx (88)(%rsi), %rbx, %r8
adcx %rbx, %r15
adox %rax, %r8
adc $(0), %r8
movq (72)(%rsi), %rdx
xor %rax, %rax
mov %r13, (72)(%rdi)
mulx (80)(%rsi), %rbx, %rbp
adcx %rbx, %r15
adox %rbp, %r8
mulx (88)(%rsi), %rbx, %r9
adcx %rbx, %r8
adox %rax, %r9
adc $(0), %r9
movq (80)(%rsi), %rdx
xor %rax, %rax
mov %r14, (80)(%rdi)
mulx (88)(%rsi), %rbx, %r10
adcx %rbx, %r9
adox %rax, %r10
adc $(0), %r10
xor %rax, %rax
movq %r15, (88)(%rdi)
movq %r8, (96)(%rdi)
movq %r9, (104)(%rdi)
movq %r10, (112)(%rdi)
movq %rax, (120)(%rdi)
sub $(64), %rdi
ret
.Lfe55:
.size sqr12_triangle, .Lfe55-(sqr12_triangle)
.p2align 6, 0x90
.type sqr13_triangle, @function
sqr13_triangle:
call sqr8_triangle
movq %r15, (56)(%rdi)
xor %r15, %r15
lea (64)(%rsi), %rcx
add $(64), %rdi
call mla_8x5
movq %r8, (40)(%rdi)
movq %r9, (48)(%rdi)
movq %r10, (56)(%rdi)
movq (64)(%rsi), %rdx
xor %rax, %rax
mov %r11, (64)(%rdi)
mulx (72)(%rsi), %rbx, %rbp
adcx %rbx, %r12
adox %rbp, %r13
mulx (80)(%rsi), %rbx, %rbp
adcx %rbx, %r13
adox %rbp, %r14
mulx (88)(%rsi), %rbx, %rbp
adcx %rbx, %r14
adox %rbp, %r15
mulx (96)(%rsi), %rbx, %r8
adcx %rbx, %r15
adox %rax, %r8
adc $(0), %r8
movq (72)(%rsi), %rdx
xor %rax, %rax
mov %r12, (72)(%rdi)
mulx (80)(%rsi), %rbx, %rbp
adcx %rbx, %r14
adox %rbp, %r15
mulx (88)(%rsi), %rbx, %rbp
adcx %rbx, %r15
adox %rbp, %r8
mulx (96)(%rsi), %rbx, %r9
adcx %rbx, %r8
adox %rax, %r9
adc $(0), %r9
movq (80)(%rsi), %rdx
xor %rax, %rax
mov %r13, (80)(%rdi)
mulx (88)(%rsi), %rbx, %rbp
adcx %rbx, %r8
adox %rbp, %r9
mulx (96)(%rsi), %rbx, %r10
adcx %rbx, %r9
adox %rax, %r10
adc $(0), %r10
movq (88)(%rsi), %rdx
xor %rax, %rax
mov %r14, (88)(%rdi)
mulx (96)(%rsi), %rbx, %r11
adcx %rbx, %r10
adox %rax, %r11
adc $(0), %r11
xor %rax, %rax
movq %r15, (96)(%rdi)
movq %r8, (104)(%rdi)
movq %r9, (112)(%rdi)
movq %r10, (120)(%rdi)
movq %r11, (128)(%rdi)
movq %rax, (136)(%rdi)
sub $(64), %rdi
ret
.Lfe56:
.size sqr13_triangle, .Lfe56-(sqr13_triangle)
.p2align 6, 0x90
.type sqr14_triangle, @function
sqr14_triangle:
call sqr8_triangle
movq %r15, (56)(%rdi)
xor %r15, %r15
lea (64)(%rsi), %rcx
add $(64), %rdi
call mla_8x6
movq %r8, (48)(%rdi)
movq %r9, (56)(%rdi)
movq (64)(%rsi), %rdx
xor %rax, %rax
mov %r10, (64)(%rdi)
mulx (72)(%rsi), %rbx, %rbp
adcx %rbx, %r11
adox %rbp, %r12
mulx (80)(%rsi), %rbx, %rbp
adcx %rbx, %r12
adox %rbp, %r13
mulx (88)(%rsi), %rbx, %rbp
adcx %rbx, %r13
adox %rbp, %r14
mulx (96)(%rsi), %rbx, %rbp
adcx %rbx, %r14
adox %rbp, %r15
mulx (104)(%rsi), %rbx, %r8
adcx %rbx, %r15
adox %rax, %r8
adc $(0), %r8
movq (72)(%rsi), %rdx
xor %rax, %rax
mov %r11, (72)(%rdi)
mulx (80)(%rsi), %rbx, %rbp
adcx %rbx, %r13
adox %rbp, %r14
mulx (88)(%rsi), %rbx, %rbp
adcx %rbx, %r14
adox %rbp, %r15
mulx (96)(%rsi), %rbx, %rbp
adcx %rbx, %r15
adox %rbp, %r8
mulx (104)(%rsi), %rbx, %r9
adcx %rbx, %r8
adox %rax, %r9
adc $(0), %r9
movq (80)(%rsi), %rdx
xor %rax, %rax
mov %r12, (80)(%rdi)
mulx (88)(%rsi), %rbx, %rbp
adcx %rbx, %r15
adox %rbp, %r8
mulx (96)(%rsi), %rbx, %rbp
adcx %rbx, %r8
adox %rbp, %r9
mulx (104)(%rsi), %rbx, %r10
adcx %rbx, %r9
adox %rax, %r10
adc $(0), %r10
movq (88)(%rsi), %rdx
xor %rax, %rax
mov %r13, (88)(%rdi)
mulx (96)(%rsi), %rbx, %rbp
adcx %rbx, %r9
adox %rbp, %r10
mulx (104)(%rsi), %rbx, %r11
adcx %rbx, %r10
adox %rax, %r11
adc $(0), %r11
movq (96)(%rsi), %rdx
xor %rax, %rax
mov %r14, (96)(%rdi)
mulx (104)(%rsi), %rbx, %r12
adcx %rbx, %r11
adox %rax, %r12
adc $(0), %r12
xor %rax, %rax
movq %r15, (104)(%rdi)
movq %r8, (112)(%rdi)
movq %r9, (120)(%rdi)
movq %r10, (128)(%rdi)
movq %r11, (136)(%rdi)
movq %r12, (144)(%rdi)
movq %rax, (152)(%rdi)
sub $(64), %rdi
ret
.Lfe57:
.size sqr14_triangle, .Lfe57-(sqr14_triangle)
.p2align 6, 0x90
.type sqr15_triangle, @function
sqr15_triangle:
call sqr8_triangle
movq %r15, (56)(%rdi)
xor %r15, %r15
lea (64)(%rsi), %rcx
add $(64), %rdi
call mla_8x7
movq %r8, (56)(%rdi)
movq (64)(%rsi), %rdx
xor %rax, %rax
mov %r9, (64)(%rdi)
mulx (72)(%rsi), %rbx, %rbp
adcx %rbx, %r10
adox %rbp, %r11
mulx (80)(%rsi), %rbx, %rbp
adcx %rbx, %r11
adox %rbp, %r12
mulx (88)(%rsi), %rbx, %rbp
adcx %rbx, %r12
adox %rbp, %r13
mulx (96)(%rsi), %rbx, %rbp
adcx %rbx, %r13
adox %rbp, %r14
mulx (104)(%rsi), %rbx, %rbp
adcx %rbx, %r14
adox %rbp, %r15
mulx (112)(%rsi), %rbx, %r8
adcx %rbx, %r15
adox %rax, %r8
adc $(0), %r8
movq (72)(%rsi), %rdx
xor %rax, %rax
mov %r10, (72)(%rdi)
mulx (80)(%rsi), %rbx, %rbp
adcx %rbx, %r12
adox %rbp, %r13
mulx (88)(%rsi), %rbx, %rbp
adcx %rbx, %r13
adox %rbp, %r14
mulx (96)(%rsi), %rbx, %rbp
adcx %rbx, %r14
adox %rbp, %r15
mulx (104)(%rsi), %rbx, %rbp
adcx %rbx, %r15
adox %rbp, %r8
mulx (112)(%rsi), %rbx, %r9
adcx %rbx, %r8
adox %rax, %r9
adc $(0), %r9
movq (80)(%rsi), %rdx
xor %rax, %rax
mov %r11, (80)(%rdi)
mulx (88)(%rsi), %rbx, %rbp
adcx %rbx, %r14
adox %rbp, %r15
mulx (96)(%rsi), %rbx, %rbp
adcx %rbx, %r15
adox %rbp, %r8
mulx (104)(%rsi), %rbx, %rbp
adcx %rbx, %r8
adox %rbp, %r9
mulx (112)(%rsi), %rbx, %r10
adcx %rbx, %r9
adox %rax, %r10
adc $(0), %r10
movq (88)(%rsi), %rdx
xor %rax, %rax
mov %r12, (88)(%rdi)
mulx (96)(%rsi), %rbx, %rbp
adcx %rbx, %r8
adox %rbp, %r9
mulx (104)(%rsi), %rbx, %rbp
adcx %rbx, %r9
adox %rbp, %r10
mulx (112)(%rsi), %rbx, %r11
adcx %rbx, %r10
adox %rax, %r11
adc $(0), %r11
movq (96)(%rsi), %rdx
xor %rax, %rax
mov %r13, (96)(%rdi)
mulx (104)(%rsi), %rbx, %rbp
adcx %rbx, %r10
adox %rbp, %r11
mulx (112)(%rsi), %rbx, %r12
adcx %rbx, %r11
adox %rax, %r12
adc $(0), %r12
movq (104)(%rsi), %rdx
xor %rax, %rax
mov %r14, (104)(%rdi)
mulx (112)(%rsi), %rbx, %r13
adcx %rbx, %r12
adox %rax, %r13
adc $(0), %r13
xor %rax, %rax
movq %r15, (112)(%rdi)
movq %r8, (120)(%rdi)
movq %r9, (128)(%rdi)
movq %r10, (136)(%rdi)
movq %r11, (144)(%rdi)
movq %r12, (152)(%rdi)
movq %r13, (160)(%rdi)
movq %rax, (168)(%rdi)
sub $(64), %rdi
ret
.Lfe58:
.size sqr15_triangle, .Lfe58-(sqr15_triangle)
.p2align 6, 0x90
.type sqr16_triangle, @function
sqr16_triangle:
call sqr8_triangle
movq %r15, (56)(%rdi)
xor %r15, %r15
mov %rsi, %rcx
add $(64), %rsi
add $(64), %rdi
call mla_8x8
add $(64), %rdi
call sqr8_triangle
xor %rax, %rax
movq %r15, (56)(%rdi)
movq %r8, (64)(%rdi)
movq %r9, (72)(%rdi)
movq %r10, (80)(%rdi)
movq %r11, (88)(%rdi)
movq %r12, (96)(%rdi)
movq %r13, (104)(%rdi)
movq %r14, (112)(%rdi)
movq %rax, (120)(%rdi)
sub $(64), %rsi
sub $(128), %rdi
ret
.Lfe59:
.size sqr16_triangle, .Lfe59-(sqr16_triangle)
sqr_l_basic:
.quad sqr_1 - sqr_l_basic
.quad sqr_2 - sqr_l_basic
.quad sqr_3 - sqr_l_basic
.quad sqr_4 - sqr_l_basic
.quad sqr_5 - sqr_l_basic
.quad sqr_6 - sqr_l_basic
.quad sqr_7 - sqr_l_basic
.quad sqr_8 - sqr_l_basic
.quad sqr_9 - sqr_l_basic
.quad sqr_10- sqr_l_basic
.quad sqr_11- sqr_l_basic
.quad sqr_12- sqr_l_basic
.quad sqr_13- sqr_l_basic
.quad sqr_14- sqr_l_basic
.quad sqr_15- sqr_l_basic
.quad sqr_16- sqr_l_basic
sqrN_triangle:
.quad sqr9_triangle - sqrN_triangle
.quad sqr10_triangle - sqrN_triangle
.quad sqr11_triangle - sqrN_triangle
.quad sqr12_triangle - sqrN_triangle
.quad sqr13_triangle - sqrN_triangle
.quad sqr14_triangle - sqrN_triangle
.quad sqr15_triangle - sqrN_triangle
.quad sqr16_triangle - sqrN_triangle
.p2align 6, 0x90
.type sqr_8N_adcox, @function
sqr_8N_adcox:
push %rdi
push %rsi
push %rdx
push %rdi
push %rsi
push %rdx
push %rdx
call sqr8_triangle
pop %rdx
movq %r15, (56)(%rdi)
xor %r15, %r15
add $(64), %rdi
sub $(8), %rdx
mov %rsi, %rcx
add $(64), %rsi
.LinitLoopgas_60:
push %rdx
call mla_8x8
pop %rdx
add $(64), %rsi
add $(64), %rdi
sub $(8), %rdx
jnz .LinitLoopgas_60
movq %r8, (%rdi)
movq %r9, (8)(%rdi)
movq %r10, (16)(%rdi)
movq %r11, (24)(%rdi)
movq %r12, (32)(%rdi)
movq %r13, (40)(%rdi)
movq %r14, (48)(%rdi)
movq %r15, (56)(%rdi)
jmp .Lupdate_Trianglegas_60
.LouterLoopgas_60:
push %rdi
push %rsi
push %rdx
xor %rax, %rax
push %rax
movq (%rdi), %r8
movq (8)(%rdi), %r9
movq (16)(%rdi), %r10
movq (24)(%rdi), %r11
movq (32)(%rdi), %r12
movq (40)(%rdi), %r13
movq (48)(%rdi), %r14
movq (56)(%rdi), %r15
.LinnerLoop_entrygas_60:
push %rdx
call sqr8_triangle
pop %rdx
movq %r15, (56)(%rdi)
xor %r15, %r15
add $(64), %rdi
sub $(8), %rdx
jz .LskipInnerLoopgas_60
mov %rsi, %rcx
add $(64), %rsi
.LinnerLoopgas_60:
pop %rax
neg %rax
movq (%rdi), %rax
adc %rax, %r8
movq (8)(%rdi), %rax
adc %rax, %r9
movq (16)(%rdi), %rax
adc %rax, %r10
movq (24)(%rdi), %rax
adc %rax, %r11
movq (32)(%rdi), %rax
adc %rax, %r12
movq (40)(%rdi), %rax
adc %rax, %r13
movq (48)(%rdi), %rax
adc %rax, %r14
movq (56)(%rdi), %rax
adc %rax, %r15
sbb %rax, %rax
push %rax
push %rdx
call mla_8x8
pop %rdx
add $(64), %rsi
add $(64), %rdi
sub $(8), %rdx
jnz .LinnerLoopgas_60
.LskipInnerLoopgas_60:
pop %rax
neg %rax
adc $(0), %r8
movq %r8, (%rdi)
adc $(0), %r9
movq %r9, (8)(%rdi)
adc $(0), %r10
movq %r10, (16)(%rdi)
adc $(0), %r11
movq %r11, (24)(%rdi)
adc $(0), %r12
movq %r12, (32)(%rdi)
adc $(0), %r13
movq %r13, (40)(%rdi)
adc $(0), %r14
movq %r14, (48)(%rdi)
adc $(0), %r15
movq %r15, (56)(%rdi)
.Lupdate_Trianglegas_60:
pop %rdx
pop %rsi
pop %rdi
add $(64), %rsi
add $(128), %rdi
sub $(8), %rdx
jnz .LouterLoopgas_60
pop %rcx
pop %rsi
pop %rdi
call finalize
ret
.Lfe60:
.size sqr_8N_adcox, .Lfe60-(sqr_8N_adcox)
.p2align 6, 0x90
.type sqr_N_adcox, @function
sqr_N_adcox:
push %rdi
push %rsi
push %rdx
push %rdi
push %rsi
push %rdx
mov %rdx, %rbp
and $(7), %rbp
lea mla_8xl_tail(%rip), %rax
mov (-8)(%rax,%rbp,8), %rbp
add %rbp, %rax
push %rax
sub $(8), %rdx
push %rdx
call sqr8_triangle
pop %rdx
movq %r15, (56)(%rdi)
add $(64), %rdi
xor %r15, %r15
mov %rsi, %rcx
add $(64), %rsi
sub $(8), %rdx
.LinitLoopgas_61:
push %rdx
call mla_8x8
pop %rdx
add $(64), %rsi
add $(64), %rdi
sub $(8), %rdx
jnc .LinitLoopgas_61
add $(8), %rdx
xor %rcx, %rsi
xor %rsi, %rcx
xor %rcx, %rsi
mov (%rsp), %rax
push %rdx
call *%rax
pop %rdx
lea (%rdi,%rdx,8), %rdi
movq %r8, (%rdi)
movq %r9, (8)(%rdi)
movq %r10, (16)(%rdi)
movq %r11, (24)(%rdi)
movq %r12, (32)(%rdi)
movq %r13, (40)(%rdi)
movq %r14, (48)(%rdi)
movq %r15, (56)(%rdi)
jmp .Lupdate_Trianglegas_61
.LouterLoopgas_61:
push %rdi
push %rsi
push %rdx
push %rax
xor %rax, %rax
push %rax
movq (%rdi), %r8
movq (8)(%rdi), %r9
movq (16)(%rdi), %r10
movq (24)(%rdi), %r11
movq (32)(%rdi), %r12
movq (40)(%rdi), %r13
movq (48)(%rdi), %r14
movq (56)(%rdi), %r15
sub $(8), %rdx
push %rdx
call sqr8_triangle
pop %rdx
movq %r15, (56)(%rdi)
add $(64), %rdi
xor %r15, %r15
mov %rsi, %rcx
add $(64), %rsi
sub $(8), %rdx
.LinnerLoopgas_61:
pop %rax
neg %rax
movq (%rdi), %rax
adc %rax, %r8
movq (8)(%rdi), %rax
adc %rax, %r9
movq (16)(%rdi), %rax
adc %rax, %r10
movq (24)(%rdi), %rax
adc %rax, %r11
movq (32)(%rdi), %rax
adc %rax, %r12
movq (40)(%rdi), %rax
adc %rax, %r13
movq (48)(%rdi), %rax
adc %rax, %r14
movq (56)(%rdi), %rax
adc %rax, %r15
sbb %rax, %rax
push %rax
push %rdx
call mla_8x8
pop %rdx
add $(64), %rsi
add $(64), %rdi
sub $(8), %rdx
jnc .LinnerLoopgas_61
add $(8), %rdx
pxor %xmm0, %xmm0
movdqu %xmm0, (%rdi,%rdx,8)
movdqu %xmm0, (16)(%rdi,%rdx,8)
movdqu %xmm0, (32)(%rdi,%rdx,8)
movdqu %xmm0, (48)(%rdi,%rdx,8)
pop %rax
neg %rax
movq (%rdi), %rax
adc %rax, %r8
movq (8)(%rdi), %rax
adc %rax, %r9
movq (16)(%rdi), %rax
adc %rax, %r10
movq (24)(%rdi), %rax
adc %rax, %r11
movq (32)(%rdi), %rax
adc %rax, %r12
movq (40)(%rdi), %rax
adc %rax, %r13
movq (48)(%rdi), %rax
adc %rax, %r14
movq (56)(%rdi), %rax
adc %rax, %r15
sbb %rax, %rax
neg %rax
movq %rax, (64)(%rdi)
xor %rcx, %rsi
xor %rsi, %rcx
xor %rcx, %rsi
mov (%rsp), %rax
push %rdx
call *%rax
pop %rdx
lea (%rdi,%rdx,8), %rdi
xor %rax, %rax
movq (%rdi), %rax
add %rax, %r8
movq %r8, (%rdi)
movq (8)(%rdi), %rax
adc %rax, %r9
movq %r9, (8)(%rdi)
movq (16)(%rdi), %rax
adc %rax, %r10
movq %r10, (16)(%rdi)
movq (24)(%rdi), %rax
adc %rax, %r11
movq %r11, (24)(%rdi)
movq (32)(%rdi), %rax
adc %rax, %r12
movq %r12, (32)(%rdi)
movq (40)(%rdi), %rax
adc %rax, %r13
movq %r13, (40)(%rdi)
movq (48)(%rdi), %rax
adc %rax, %r14
movq %r14, (48)(%rdi)
movq (56)(%rdi), %rax
adc %rax, %r15
movq %r15, (56)(%rdi)
.Lupdate_Trianglegas_61:
pop %rax
pop %rdx
pop %rsi
pop %rdi
add $(64), %rsi
add $(128), %rdi
sub $(8), %rdx
cmp $(16), %rdx
jg .LouterLoopgas_61
mov %rdx, %rbp
sub $(8), %rbp
lea sqrN_triangle(%rip), %rax
mov (-8)(%rax,%rbp,8), %rbp
add %rbp, %rax
sub $(256), %rsp
push %rdi
push %rdx
movq (%rdi), %r8
movq (8)(%rdi), %r9
movq (16)(%rdi), %r10
movq (24)(%rdi), %r11
movq (32)(%rdi), %r12
movq (40)(%rdi), %r13
movq (48)(%rdi), %r14
movq (56)(%rdi), %r15
lea (16)(%rsp), %rdi
call *%rax
mov %rdi, %rsi
pop %rdx
pop %rdi
movdqu (%rsi), %xmm0
movdqu (16)(%rsi), %xmm1
movdqu (32)(%rsi), %xmm2
movdqu (48)(%rsi), %xmm3
add $(64), %rsi
movdqu %xmm0, (%rdi)
movdqu %xmm1, (16)(%rdi)
movdqu %xmm2, (32)(%rdi)
movdqu %xmm3, (48)(%rdi)
add $(64), %rdi
lea (-8)(%rdx), %rax
xor %rbx, %rbx
.Lupdate1gas_61:
movq (%rsi), %r8
movq (%rdi), %r9
add $(8), %rsi
neg %rbx
adc %r9, %r8
sbb %rbx, %rbx
movq %r8, (%rdi)
add $(8), %rdi
sub $(1), %rax
jg .Lupdate1gas_61
.Lupdate2gas_61:
movq (%rsi), %r8
add $(8), %rsi
neg %rbx
adc $(0), %r8
sbb %rbx, %rbx
movq %r8, (%rdi)
add $(8), %rdi
sub $(1), %rdx
jg .Lupdate2gas_61
add $(256), %rsp
.Ladd_diagonalsgas_61:
pop %rcx
pop %rsi
pop %rdi
call finalize
.Lquitgas_61:
ret
.Lfe61:
.size sqr_N_adcox, .Lfe61-(sqr_N_adcox)
.p2align 6, 0x90
.type sub_N, @function
sub_N:
xor %rax, %rax
.Lsub_nextgas_62:
lea (8)(%rdi), %rdi
movq (%rsi), %r8
movq (%rcx), %r9
lea (8)(%rsi), %rsi
lea (8)(%rcx), %rcx
sbb %r9, %r8
movq %r8, (-8)(%rdi)
dec %rdx
jnz .Lsub_nextgas_62
adc $(0), %rax
ret
.Lfe62:
.size sub_N, .Lfe62-(sub_N)
.p2align 6, 0x90
.type copy_ae_N, @function
copy_ae_N:
lea (8)(%rdi), %rdi
movq (%rsi), %r8
movq (%rcx), %r9
lea (8)(%rsi), %rsi
lea (8)(%rcx), %rcx
cmovae %r9, %r8
movq %r8, (-8)(%rdi)
dec %rdx
jnz copy_ae_N
ret
.Lfe63:
.size copy_ae_N, .Lfe63-(copy_ae_N)
.p2align 6, 0x90
.type mred1_start, @function
mred1_start:
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
adox %rax, %rbx
mov %rbx, %r8
ret
.Lfe64:
.size mred1_start, .Lfe64-(mred1_start)
.p2align 6, 0x90
.type mred2_start, @function
mred2_start:
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rax, %rbp
adox %rax, %rbp
mov %rbp, %r9
ret
.Lfe65:
.size mred2_start, .Lfe65-(mred2_start)
.p2align 6, 0x90
.type mred3_start, @function
mred3_start:
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rax, %rbx
adox %rax, %rbx
mov %rbx, %r10
ret
.Lfe66:
.size mred3_start, .Lfe66-(mred3_start)
.p2align 6, 0x90
.type mred4_start, @function
mred4_start:
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rax, %rbp
adox %rax, %rbp
mov %rbp, %r11
ret
.Lfe67:
.size mred4_start, .Lfe67-(mred4_start)
.p2align 6, 0x90
.type mred5_start, @function
mred5_start:
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rax, %rbx
adox %rax, %rbx
mov %rbx, %r12
ret
.Lfe68:
.size mred5_start, .Lfe68-(mred5_start)
.p2align 6, 0x90
.type mred6_start, @function
mred6_start:
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rax, %rbp
adox %rax, %rbp
mov %rbp, %r13
ret
.Lfe69:
.size mred6_start, .Lfe69-(mred6_start)
.p2align 6, 0x90
.type mred7_start, @function
mred7_start:
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rbp, %r14
mulx (48)(%rsi), %r13, %rbx
adox %r14, %r13
adcx %rax, %rbx
adox %rax, %rbx
mov %rbx, %r14
ret
.Lfe70:
.size mred7_start, .Lfe70-(mred7_start)
.p2align 6, 0x90
.type mred8_start, @function
mred8_start:
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (32)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rbx, %r13
mulx (40)(%rsi), %r12, %rbp
adox %r13, %r12
adcx %rbp, %r14
mulx (48)(%rsi), %r13, %rbx
adox %r14, %r13
adcx %r15, %rbx
mulx (56)(%rsi), %r14, %r15
adox %rbx, %r14
adcx %rax, %r15
adox %rax, %r15
ret
.Lfe71:
.size mred8_start, .Lfe71-(mred8_start)
.p2align 6, 0x90
.type mred8x1_start, @function
mred8x1_start:
push %rdx
mulx %r8, %rdx, %rbx
movq %rdx, (%rcx)
call mred8_start
mov %rax, (%rdi)
pop %rdx
ret
.Lfe72:
.size mred8x1_start, .Lfe72-(mred8x1_start)
.p2align 6, 0x90
.type mred8x2_start, @function
mred8x2_start:
push %rdx
mulx %r8, %rdx, %rbx
movq %rdx, (%rcx)
call mred8_start
mov %rax, (%rdi)
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
movq %rdx, (8)(%rcx)
call mred8_start
mov %rax, (8)(%rdi)
pop %rdx
ret
.Lfe73:
.size mred8x2_start, .Lfe73-(mred8x2_start)
.p2align 6, 0x90
.type mred8x3_start, @function
mred8x3_start:
push %rdx
mulx %r8, %rdx, %rbx
movq %rdx, (%rcx)
call mred8_start
mov %rax, (%rdi)
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
movq %rdx, (8)(%rcx)
call mred8_start
mov %rax, (8)(%rdi)
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
movq %rdx, (16)(%rcx)
call mred8_start
mov %rax, (16)(%rdi)
pop %rdx
ret
.Lfe74:
.size mred8x3_start, .Lfe74-(mred8x3_start)
.p2align 6, 0x90
.type mred8x4_start, @function
mred8x4_start:
push %rdx
mulx %r8, %rdx, %rbx
movq %rdx, (%rcx)
call mred8_start
mov %rax, (%rdi)
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
movq %rdx, (8)(%rcx)
call mred8_start
mov %rax, (8)(%rdi)
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
movq %rdx, (16)(%rcx)
call mred8_start
mov %rax, (16)(%rdi)
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
movq %rdx, (24)(%rcx)
call mred8_start
mov %rax, (24)(%rdi)
pop %rdx
ret
.Lfe75:
.size mred8x4_start, .Lfe75-(mred8x4_start)
.p2align 6, 0x90
.type mred8x5_start, @function
mred8x5_start:
push %rdx
mulx %r8, %rdx, %rbx
movq %rdx, (%rcx)
call mred8_start
mov %rax, (%rdi)
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
movq %rdx, (8)(%rcx)
call mred8_start
mov %rax, (8)(%rdi)
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
movq %rdx, (16)(%rcx)
call mred8_start
mov %rax, (16)(%rdi)
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
movq %rdx, (24)(%rcx)
call mred8_start
mov %rax, (24)(%rdi)
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
movq %rdx, (32)(%rcx)
call mred8_start
mov %rax, (32)(%rdi)
pop %rdx
ret
.Lfe76:
.size mred8x5_start, .Lfe76-(mred8x5_start)
.p2align 6, 0x90
.type mred8x6_start, @function
mred8x6_start:
push %rdx
mulx %r8, %rdx, %rbx
movq %rdx, (%rcx)
call mred8_start
mov %rax, (%rdi)
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
movq %rdx, (8)(%rcx)
call mred8_start
mov %rax, (8)(%rdi)
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
movq %rdx, (16)(%rcx)
call mred8_start
mov %rax, (16)(%rdi)
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
movq %rdx, (24)(%rcx)
call mred8_start
mov %rax, (24)(%rdi)
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
movq %rdx, (32)(%rcx)
call mred8_start
mov %rax, (32)(%rdi)
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
movq %rdx, (40)(%rcx)
call mred8_start
mov %rax, (40)(%rdi)
pop %rdx
ret
.Lfe77:
.size mred8x6_start, .Lfe77-(mred8x6_start)
.p2align 6, 0x90
.type mred8x7_start, @function
mred8x7_start:
push %rdx
mulx %r8, %rdx, %rbx
movq %rdx, (%rcx)
call mred8_start
mov %rax, (%rdi)
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
movq %rdx, (8)(%rcx)
call mred8_start
mov %rax, (8)(%rdi)
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
movq %rdx, (16)(%rcx)
call mred8_start
mov %rax, (16)(%rdi)
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
movq %rdx, (24)(%rcx)
call mred8_start
mov %rax, (24)(%rdi)
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
movq %rdx, (32)(%rcx)
call mred8_start
mov %rax, (32)(%rdi)
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
movq %rdx, (40)(%rcx)
call mred8_start
mov %rax, (40)(%rdi)
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
movq %rdx, (48)(%rcx)
call mred8_start
mov %rax, (48)(%rdi)
pop %rdx
ret
.Lfe78:
.size mred8x7_start, .Lfe78-(mred8x7_start)
.p2align 6, 0x90
.type mred8x8_start, @function
mred8x8_start:
push %rdx
mulx %r8, %rdx, %rbx
movq %rdx, (%rcx)
call mred8_start
mov %rax, (%rdi)
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
movq %rdx, (8)(%rcx)
call mred8_start
mov %rax, (8)(%rdi)
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
movq %rdx, (16)(%rcx)
call mred8_start
mov %rax, (16)(%rdi)
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
movq %rdx, (24)(%rcx)
call mred8_start
mov %rax, (24)(%rdi)
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
movq %rdx, (32)(%rcx)
call mred8_start
mov %rax, (32)(%rdi)
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
movq %rdx, (40)(%rcx)
call mred8_start
mov %rax, (40)(%rdi)
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
movq %rdx, (48)(%rcx)
call mred8_start
mov %rax, (48)(%rdi)
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
movq %rdx, (56)(%rcx)
call mred8_start
mov %rax, (56)(%rdi)
pop %rdx
ret
.Lfe79:
.size mred8x8_start, .Lfe79-(mred8x8_start)
.p2align 6, 0x90
.type mred_5, @function
mred_5:
push %r8
movq (%rdi), %r8
movq (8)(%rdi), %r9
movq (16)(%rdi), %r10
movq (24)(%rdi), %r11
movq (32)(%rdi), %r12
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
call mred5_start
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
call mred5_start
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
call mred5_start
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
call mred5_start
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
call mred5_start
pop %rax
xor %rax, %rax
mov (40)(%rdi), %rbx
add %rbx, %r8
movq %r8, (40)(%rdi)
mov (48)(%rdi), %rbx
adc %rbx, %r9
movq %r9, (48)(%rdi)
mov (56)(%rdi), %rbx
adc %rbx, %r10
movq %r10, (56)(%rdi)
mov (64)(%rdi), %rbx
adc %rbx, %r11
movq %r11, (64)(%rdi)
mov (72)(%rdi), %rbx
adc %rbx, %r12
movq %r12, (72)(%rdi)
adc $(0), %rax
mov (%rsi), %rbx
sub %rbx, %r8
mov (8)(%rsi), %rbx
sbb %rbx, %r9
mov (16)(%rsi), %rbx
sbb %rbx, %r10
mov (24)(%rsi), %rbx
sbb %rbx, %r11
mov (32)(%rsi), %rbx
sbb %rbx, %r12
sbb $(0), %rax
movq (40)(%rdi), %rax
movq (48)(%rdi), %rbx
movq (56)(%rdi), %rcx
movq (64)(%rdi), %rdx
movq (72)(%rdi), %rbp
cmovae %r8, %rax
cmovae %r9, %rbx
cmovae %r10, %rcx
cmovae %r11, %rdx
cmovae %r12, %rbp
movq %rax, (%r15)
movq %rbx, (8)(%r15)
movq %rcx, (16)(%r15)
movq %rdx, (24)(%r15)
movq %rbp, (32)(%r15)
ret
.Lfe80:
.size mred_5, .Lfe80-(mred_5)
.p2align 6, 0x90
.type mred_6, @function
mred_6:
push %r8
movq (%rdi), %r8
movq (8)(%rdi), %r9
movq (16)(%rdi), %r10
movq (24)(%rdi), %r11
movq (32)(%rdi), %r12
movq (40)(%rdi), %r13
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
call mred6_start
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
call mred6_start
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
call mred6_start
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
call mred6_start
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
call mred6_start
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
call mred6_start
pop %rax
xor %rax, %rax
mov (48)(%rdi), %rbx
add %rbx, %r8
movq %r8, (48)(%rdi)
mov (56)(%rdi), %rbx
adc %rbx, %r9
movq %r9, (56)(%rdi)
mov (64)(%rdi), %rbx
adc %rbx, %r10
movq %r10, (64)(%rdi)
mov (72)(%rdi), %rbx
adc %rbx, %r11
movq %r11, (72)(%rdi)
mov (80)(%rdi), %rbx
adc %rbx, %r12
movq %r12, (80)(%rdi)
mov (88)(%rdi), %rbx
adc %rbx, %r13
movq %r13, (88)(%rdi)
adc $(0), %rax
mov (%rsi), %rbx
sub %rbx, %r8
mov (8)(%rsi), %rbx
sbb %rbx, %r9
mov (16)(%rsi), %rbx
sbb %rbx, %r10
mov (24)(%rsi), %rbx
sbb %rbx, %r11
mov (32)(%rsi), %rbx
sbb %rbx, %r12
mov (40)(%rsi), %rbx
sbb %rbx, %r13
sbb $(0), %rax
movq (48)(%rdi), %rax
movq (56)(%rdi), %rbx
movq (64)(%rdi), %rcx
movq (72)(%rdi), %rdx
movq (80)(%rdi), %rbp
movq (88)(%rdi), %rsi
cmovae %r8, %rax
cmovae %r9, %rbx
cmovae %r10, %rcx
cmovae %r11, %rdx
cmovae %r12, %rbp
cmovae %r13, %rsi
movq %rax, (%r15)
movq %rbx, (8)(%r15)
movq %rcx, (16)(%r15)
movq %rdx, (24)(%r15)
movq %rbp, (32)(%r15)
movq %rsi, (40)(%r15)
ret
.Lfe81:
.size mred_6, .Lfe81-(mred_6)
.p2align 6, 0x90
.type mred_7, @function
mred_7:
push %r8
movq (%rdi), %r8
movq (8)(%rdi), %r9
movq (16)(%rdi), %r10
movq (24)(%rdi), %r11
movq (32)(%rdi), %r12
movq (40)(%rdi), %r13
movq (48)(%rdi), %r14
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
call mred7_start
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
call mred7_start
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
call mred7_start
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
call mred7_start
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
call mred7_start
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
call mred7_start
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
call mred7_start
pop %rax
xor %rax, %rax
mov (56)(%rdi), %rbx
add %rbx, %r8
movq %r8, (56)(%rdi)
mov (64)(%rdi), %rbx
adc %rbx, %r9
movq %r9, (64)(%rdi)
mov (72)(%rdi), %rbx
adc %rbx, %r10
movq %r10, (72)(%rdi)
mov (80)(%rdi), %rbx
adc %rbx, %r11
movq %r11, (80)(%rdi)
mov (88)(%rdi), %rbx
adc %rbx, %r12
movq %r12, (88)(%rdi)
mov (96)(%rdi), %rbx
adc %rbx, %r13
movq %r13, (96)(%rdi)
mov (104)(%rdi), %rbx
adc %rbx, %r14
movq %r14, (104)(%rdi)
adc $(0), %rax
mov (%rsi), %rbx
sub %rbx, %r8
mov (8)(%rsi), %rbx
sbb %rbx, %r9
mov (16)(%rsi), %rbx
sbb %rbx, %r10
mov (24)(%rsi), %rbx
sbb %rbx, %r11
mov (32)(%rsi), %rbx
sbb %rbx, %r12
mov (40)(%rsi), %rbx
sbb %rbx, %r13
mov (48)(%rsi), %rbx
sbb %rbx, %r14
sbb $(0), %rax
movq (56)(%rdi), %rax
movq (64)(%rdi), %rbx
movq (72)(%rdi), %rcx
movq (80)(%rdi), %rdx
movq (88)(%rdi), %rbp
movq (96)(%rdi), %rsi
movq (104)(%rdi), %rdi
cmovae %r8, %rax
cmovae %r9, %rbx
cmovae %r10, %rcx
cmovae %r11, %rdx
cmovae %r12, %rbp
cmovae %r13, %rsi
cmovae %r14, %rdi
movq %rax, (%r15)
movq %rbx, (8)(%r15)
movq %rcx, (16)(%r15)
movq %rdx, (24)(%r15)
movq %rbp, (32)(%r15)
movq %rsi, (40)(%r15)
movq %rdi, (48)(%r15)
ret
.Lfe82:
.size mred_7, .Lfe82-(mred_7)
.p2align 6, 0x90
.type mred_8, @function
mred_8:
push %r15
push %r8
movq (%rdi), %r8
movq (8)(%rdi), %r9
movq (16)(%rdi), %r10
movq (24)(%rdi), %r11
movq (32)(%rdi), %r12
movq (40)(%rdi), %r13
movq (48)(%rdi), %r14
movq (56)(%rdi), %r15
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
call mred8_start
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
call mred8_start
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
call mred8_start
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
call mred8_start
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
call mred8_start
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
call mred8_start
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
call mred8_start
mov (%rsp), %rdx
mulx %r8, %rdx, %rbx
call mred8_start
pop %rax
xor %rax, %rax
mov (64)(%rdi), %rbx
add %rbx, %r8
movq %r8, (64)(%rdi)
mov (72)(%rdi), %rbx
adc %rbx, %r9
movq %r9, (72)(%rdi)
mov (80)(%rdi), %rbx
adc %rbx, %r10
movq %r10, (80)(%rdi)
mov (88)(%rdi), %rbx
adc %rbx, %r11
movq %r11, (88)(%rdi)
mov (96)(%rdi), %rbx
adc %rbx, %r12
movq %r12, (96)(%rdi)
mov (104)(%rdi), %rbx
adc %rbx, %r13
movq %r13, (104)(%rdi)
mov (112)(%rdi), %rbx
adc %rbx, %r14
movq %r14, (112)(%rdi)
mov (120)(%rdi), %rbx
adc %rbx, %r15
movq %r15, (120)(%rdi)
adc $(0), %rax
mov (%rsi), %rbx
sub %rbx, %r8
mov (8)(%rsi), %rbx
sbb %rbx, %r9
mov (16)(%rsi), %rbx
sbb %rbx, %r10
mov (24)(%rsi), %rbx
sbb %rbx, %r11
mov (32)(%rsi), %rbx
sbb %rbx, %r12
mov (40)(%rsi), %rbx
sbb %rbx, %r13
mov (48)(%rsi), %rbx
sbb %rbx, %r14
mov (56)(%rsi), %rbx
sbb %rbx, %r15
sbb $(0), %rax
pop %rsi
movq (64)(%rdi), %rax
movq (72)(%rdi), %rbx
movq (80)(%rdi), %rcx
movq (88)(%rdi), %rdx
cmovae %r8, %rax
cmovae %r9, %rbx
cmovae %r10, %rcx
cmovae %r11, %rdx
movq %rax, (%rsi)
movq %rbx, (8)(%rsi)
movq %rcx, (16)(%rsi)
movq %rdx, (24)(%rsi)
movq (96)(%rdi), %rax
movq (104)(%rdi), %rbx
movq (112)(%rdi), %rcx
movq (120)(%rdi), %rdx
cmovae %r12, %rax
cmovae %r13, %rbx
cmovae %r14, %rcx
cmovae %r15, %rdx
movq %rax, (32)(%rsi)
movq %rbx, (40)(%rsi)
movq %rcx, (48)(%rsi)
movq %rdx, (56)(%rsi)
ret
.Lfe83:
.size mred_8, .Lfe83-(mred_8)
.p2align 6, 0x90
.type mred_9, @function
mred_9:
push %r15
sub $(64), %rsp
mov %rsp, %rcx
push %r8
mov %r8, %rdx
movq (%rdi), %r8
movq (8)(%rdi), %r9
movq (16)(%rdi), %r10
movq (24)(%rdi), %r11
movq (32)(%rdi), %r12
movq (40)(%rdi), %r13
movq (48)(%rdi), %r14
movq (56)(%rdi), %r15
call mred8x8_start
xor %rax, %rax
mov (64)(%rdi), %rbx
add %rbx, %r8
mov (72)(%rdi), %rbx
adc %rbx, %r9
mov (80)(%rdi), %rbx
adc %rbx, %r10
mov (88)(%rdi), %rbx
adc %rbx, %r11
mov (96)(%rdi), %rbx
adc %rbx, %r12
mov (104)(%rdi), %rbx
adc %rbx, %r13
mov (112)(%rdi), %rbx
adc %rbx, %r14
mov (120)(%rdi), %rbx
adc %rbx, %r15
adc $(0), %rax
push %rax
add $(64), %rdi
add $(64), %rsi
xor %rsi, %rcx
xor %rcx, %rsi
xor %rsi, %rcx
call mla_8x1
xor %rsi, %rcx
xor %rcx, %rsi
xor %rsi, %rcx
pop %rax
shr $(1), %rax
movq %r8, (8)(%rdi)
movq %r9, (16)(%rdi)
movq %r10, (24)(%rdi)
movq %r11, (32)(%rdi)
movq %r12, (40)(%rdi)
movq %r13, (48)(%rdi)
movq %r14, (56)(%rdi)
mov (64)(%rdi), %rbx
adc %rbx, %r15
mov %r15, (64)(%rdi)
adc $(0), %rax
push %rax
sub $(64), %rsi
movq (%rdi), %r8
movq (8)(%rdi), %r9
movq (16)(%rdi), %r10
movq (24)(%rdi), %r11
movq (32)(%rdi), %r12
movq (40)(%rdi), %r13
movq (48)(%rdi), %r14
movq (56)(%rdi), %r15
mov (8)(%rsp), %rdx
call mred8x1_start
xor %rax, %rax
movq %r8, (8)(%rdi)
movq %r9, (16)(%rdi)
movq %r10, (24)(%rdi)
movq %r11, (32)(%rdi)
movq %r12, (40)(%rdi)
movq %r13, (48)(%rdi)
movq %r14, (56)(%rdi)
mov %r15, %r8
addq (64)(%rdi), %r8
adc $(0), %rax
push %rax
add $(64), %rdi
add $(64), %rsi
call mla_1x1
pop %rax
shr $(1), %rax
mov (8)(%rdi), %rbx
adc %rbx, %r8
adc $(0), %rax
pop %rbx
add %rbx, %r8
movq %r8, (8)(%rdi)
adc $(0), %rax
pop %rcx
add $(64), %rsp
lea (-64)(%rsi), %rcx
lea (-56)(%rdi), %rsi
pop %rdi
mov %rax, %rbx
mov $(9), %rdx
call sub_N
sub %rax, %rbx
sub $(72), %rdi
sub $(72), %rsi
mov %rdi, %rcx
mov $(9), %rdx
shr $(1), %rbx
call copy_ae_N
ret
.Lfe84:
.size mred_9, .Lfe84-(mred_9)
.p2align 6, 0x90
.type mred_10, @function
mred_10:
push %r15
sub $(64), %rsp
mov %rsp, %rcx
push %r8
mov %r8, %rdx
movq (%rdi), %r8
movq (8)(%rdi), %r9
movq (16)(%rdi), %r10
movq (24)(%rdi), %r11
movq (32)(%rdi), %r12
movq (40)(%rdi), %r13
movq (48)(%rdi), %r14
movq (56)(%rdi), %r15
call mred8x8_start
xor %rax, %rax
mov (64)(%rdi), %rbx
add %rbx, %r8
mov (72)(%rdi), %rbx
adc %rbx, %r9
mov (80)(%rdi), %rbx
adc %rbx, %r10
mov (88)(%rdi), %rbx
adc %rbx, %r11
mov (96)(%rdi), %rbx
adc %rbx, %r12
mov (104)(%rdi), %rbx
adc %rbx, %r13
mov (112)(%rdi), %rbx
adc %rbx, %r14
mov (120)(%rdi), %rbx
adc %rbx, %r15
adc $(0), %rax
push %rax
add $(64), %rdi
add $(64), %rsi
xor %rsi, %rcx
xor %rcx, %rsi
xor %rsi, %rcx
call mla_8x2
xor %rsi, %rcx
xor %rcx, %rsi
xor %rsi, %rcx
pop %rax
shr $(1), %rax
movq %r8, (16)(%rdi)
movq %r9, (24)(%rdi)
movq %r10, (32)(%rdi)
movq %r11, (40)(%rdi)
movq %r12, (48)(%rdi)
movq %r13, (56)(%rdi)
mov (64)(%rdi), %rbx
adc %rbx, %r14
mov %r14, (64)(%rdi)
mov (72)(%rdi), %rbx
adc %rbx, %r15
mov %r15, (72)(%rdi)
adc $(0), %rax
push %rax
sub $(64), %rsi
movq (%rdi), %r8
movq (8)(%rdi), %r9
movq (16)(%rdi), %r10
movq (24)(%rdi), %r11
movq (32)(%rdi), %r12
movq (40)(%rdi), %r13
movq (48)(%rdi), %r14
movq (56)(%rdi), %r15
mov (8)(%rsp), %rdx
call mred8x2_start
xor %rax, %rax
movq %r8, (16)(%rdi)
movq %r9, (24)(%rdi)
movq %r10, (32)(%rdi)
movq %r11, (40)(%rdi)
movq %r12, (48)(%rdi)
movq %r13, (56)(%rdi)
mov %r14, %r8
mov %r15, %r9
addq (64)(%rdi), %r8
adcq (72)(%rdi), %r9
adc $(0), %rax
push %rax
add $(64), %rdi
add $(64), %rsi
call mla_2x2
pop %rax
shr $(1), %rax
mov (16)(%rdi), %rbx
adc %rbx, %r8
mov (24)(%rdi), %rbx
adc %rbx, %r9
adc $(0), %rax
pop %rbx
add %rbx, %r8
adc $(0), %r9
movq %r8, (16)(%rdi)
movq %r9, (24)(%rdi)
adc $(0), %rax
pop %rcx
add $(64), %rsp
lea (-64)(%rsi), %rcx
lea (-48)(%rdi), %rsi
pop %rdi
mov %rax, %rbx
mov $(10), %rdx
call sub_N
sub %rax, %rbx
sub $(80), %rdi
sub $(80), %rsi
mov %rdi, %rcx
mov $(10), %rdx
shr $(1), %rbx
call copy_ae_N
ret
.Lfe85:
.size mred_10, .Lfe85-(mred_10)
.p2align 6, 0x90
.type mred_11, @function
mred_11:
push %r15
sub $(64), %rsp
mov %rsp, %rcx
push %r8
mov %r8, %rdx
movq (%rdi), %r8
movq (8)(%rdi), %r9
movq (16)(%rdi), %r10
movq (24)(%rdi), %r11
movq (32)(%rdi), %r12
movq (40)(%rdi), %r13
movq (48)(%rdi), %r14
movq (56)(%rdi), %r15
call mred8x8_start
xor %rax, %rax
mov (64)(%rdi), %rbx
add %rbx, %r8
mov (72)(%rdi), %rbx
adc %rbx, %r9
mov (80)(%rdi), %rbx
adc %rbx, %r10
mov (88)(%rdi), %rbx
adc %rbx, %r11
mov (96)(%rdi), %rbx
adc %rbx, %r12
mov (104)(%rdi), %rbx
adc %rbx, %r13
mov (112)(%rdi), %rbx
adc %rbx, %r14
mov (120)(%rdi), %rbx
adc %rbx, %r15
adc $(0), %rax
push %rax
add $(64), %rdi
add $(64), %rsi
xor %rsi, %rcx
xor %rcx, %rsi
xor %rsi, %rcx
call mla_8x3
xor %rsi, %rcx
xor %rcx, %rsi
xor %rsi, %rcx
pop %rax
shr $(1), %rax
movq %r8, (24)(%rdi)
movq %r9, (32)(%rdi)
movq %r10, (40)(%rdi)
movq %r11, (48)(%rdi)
movq %r12, (56)(%rdi)
mov (64)(%rdi), %rbx
adc %rbx, %r13
mov %r13, (64)(%rdi)
mov (72)(%rdi), %rbx
adc %rbx, %r14
mov %r14, (72)(%rdi)
mov (80)(%rdi), %rbx
adc %rbx, %r15
mov %r15, (80)(%rdi)
adc $(0), %rax
push %rax
sub $(64), %rsi
movq (%rdi), %r8
movq (8)(%rdi), %r9
movq (16)(%rdi), %r10
movq (24)(%rdi), %r11
movq (32)(%rdi), %r12
movq (40)(%rdi), %r13
movq (48)(%rdi), %r14
movq (56)(%rdi), %r15
mov (8)(%rsp), %rdx
call mred8x3_start
xor %rax, %rax
movq %r8, (24)(%rdi)
movq %r9, (32)(%rdi)
movq %r10, (40)(%rdi)
movq %r11, (48)(%rdi)
movq %r12, (56)(%rdi)
mov %r13, %r8
mov %r14, %r9
mov %r15, %r10
addq (64)(%rdi), %r8
adcq (72)(%rdi), %r9
adcq (80)(%rdi), %r10
adc $(0), %rax
push %rax
add $(64), %rdi
add $(64), %rsi
call mla_3x3
pop %rax
shr $(1), %rax
mov (24)(%rdi), %rbx
adc %rbx, %r8
mov (32)(%rdi), %rbx
adc %rbx, %r9
mov (40)(%rdi), %rbx
adc %rbx, %r10
adc $(0), %rax
pop %rbx
add %rbx, %r8
adc $(0), %r9
adc $(0), %r10
movq %r8, (24)(%rdi)
movq %r9, (32)(%rdi)
movq %r10, (40)(%rdi)
adc $(0), %rax
pop %rcx
add $(64), %rsp
lea (-64)(%rsi), %rcx
lea (-40)(%rdi), %rsi
pop %rdi
mov %rax, %rbx
mov $(11), %rdx
call sub_N
sub %rax, %rbx
sub $(88), %rdi
sub $(88), %rsi
mov %rdi, %rcx
mov $(11), %rdx
shr $(1), %rbx
call copy_ae_N
ret
.Lfe86:
.size mred_11, .Lfe86-(mred_11)
.p2align 6, 0x90
.type mred_12, @function
mred_12:
push %r15
sub $(64), %rsp
mov %rsp, %rcx
push %r8
mov %r8, %rdx
movq (%rdi), %r8
movq (8)(%rdi), %r9
movq (16)(%rdi), %r10
movq (24)(%rdi), %r11
movq (32)(%rdi), %r12
movq (40)(%rdi), %r13
movq (48)(%rdi), %r14
movq (56)(%rdi), %r15
call mred8x8_start
xor %rax, %rax
mov (64)(%rdi), %rbx
add %rbx, %r8
mov (72)(%rdi), %rbx
adc %rbx, %r9
mov (80)(%rdi), %rbx
adc %rbx, %r10
mov (88)(%rdi), %rbx
adc %rbx, %r11
mov (96)(%rdi), %rbx
adc %rbx, %r12
mov (104)(%rdi), %rbx
adc %rbx, %r13
mov (112)(%rdi), %rbx
adc %rbx, %r14
mov (120)(%rdi), %rbx
adc %rbx, %r15
adc $(0), %rax
push %rax
add $(64), %rdi
add $(64), %rsi
xor %rsi, %rcx
xor %rcx, %rsi
xor %rsi, %rcx
call mla_8x4
xor %rsi, %rcx
xor %rcx, %rsi
xor %rsi, %rcx
pop %rax
shr $(1), %rax
movq %r8, (32)(%rdi)
movq %r9, (40)(%rdi)
movq %r10, (48)(%rdi)
movq %r11, (56)(%rdi)
mov (64)(%rdi), %rbx
adc %rbx, %r12
mov %r12, (64)(%rdi)
mov (72)(%rdi), %rbx
adc %rbx, %r13
mov %r13, (72)(%rdi)
mov (80)(%rdi), %rbx
adc %rbx, %r14
mov %r14, (80)(%rdi)
mov (88)(%rdi), %rbx
adc %rbx, %r15
mov %r15, (88)(%rdi)
adc $(0), %rax
push %rax
sub $(64), %rsi
movq (%rdi), %r8
movq (8)(%rdi), %r9
movq (16)(%rdi), %r10
movq (24)(%rdi), %r11
movq (32)(%rdi), %r12
movq (40)(%rdi), %r13
movq (48)(%rdi), %r14
movq (56)(%rdi), %r15
mov (8)(%rsp), %rdx
call mred8x4_start
xor %rax, %rax
movq %r8, (32)(%rdi)
movq %r9, (40)(%rdi)
movq %r10, (48)(%rdi)
movq %r11, (56)(%rdi)
mov %r12, %r8
mov %r13, %r9
mov %r14, %r10
mov %r15, %r11
addq (64)(%rdi), %r8
adcq (72)(%rdi), %r9
adcq (80)(%rdi), %r10
adcq (88)(%rdi), %r11
adc $(0), %rax
push %rax
add $(64), %rdi
add $(64), %rsi
call mla_4x4
pop %rax
shr $(1), %rax
mov (32)(%rdi), %rbx
adc %rbx, %r8
mov (40)(%rdi), %rbx
adc %rbx, %r9
mov (48)(%rdi), %rbx
adc %rbx, %r10
mov (56)(%rdi), %rbx
adc %rbx, %r11
adc $(0), %rax
pop %rbx
add %rbx, %r8
adc $(0), %r9
adc $(0), %r10
adc $(0), %r11
movq %r8, (32)(%rdi)
movq %r9, (40)(%rdi)
movq %r10, (48)(%rdi)
movq %r11, (56)(%rdi)
adc $(0), %rax
pop %rcx
add $(64), %rsp
lea (-64)(%rsi), %rcx
lea (-32)(%rdi), %rsi
pop %rdi
mov %rax, %rbx
mov $(12), %rdx
call sub_N
sub %rax, %rbx
sub $(96), %rdi
sub $(96), %rsi
mov %rdi, %rcx
mov $(12), %rdx
shr $(1), %rbx
call copy_ae_N
ret
.Lfe87:
.size mred_12, .Lfe87-(mred_12)
.p2align 6, 0x90
.type mred_13, @function
mred_13:
push %r15
sub $(64), %rsp
mov %rsp, %rcx
push %r8
mov %r8, %rdx
movq (%rdi), %r8
movq (8)(%rdi), %r9
movq (16)(%rdi), %r10
movq (24)(%rdi), %r11
movq (32)(%rdi), %r12
movq (40)(%rdi), %r13
movq (48)(%rdi), %r14
movq (56)(%rdi), %r15
call mred8x8_start
xor %rax, %rax
mov (64)(%rdi), %rbx
add %rbx, %r8
mov (72)(%rdi), %rbx
adc %rbx, %r9
mov (80)(%rdi), %rbx
adc %rbx, %r10
mov (88)(%rdi), %rbx
adc %rbx, %r11
mov (96)(%rdi), %rbx
adc %rbx, %r12
mov (104)(%rdi), %rbx
adc %rbx, %r13
mov (112)(%rdi), %rbx
adc %rbx, %r14
mov (120)(%rdi), %rbx
adc %rbx, %r15
adc $(0), %rax
push %rax
add $(64), %rdi
add $(64), %rsi
xor %rsi, %rcx
xor %rcx, %rsi
xor %rsi, %rcx
call mla_8x5
xor %rsi, %rcx
xor %rcx, %rsi
xor %rsi, %rcx
pop %rax
shr $(1), %rax
movq %r8, (40)(%rdi)
movq %r9, (48)(%rdi)
movq %r10, (56)(%rdi)
mov (64)(%rdi), %rbx
adc %rbx, %r11
mov %r11, (64)(%rdi)
mov (72)(%rdi), %rbx
adc %rbx, %r12
mov %r12, (72)(%rdi)
mov (80)(%rdi), %rbx
adc %rbx, %r13
mov %r13, (80)(%rdi)
mov (88)(%rdi), %rbx
adc %rbx, %r14
mov %r14, (88)(%rdi)
mov (96)(%rdi), %rbx
adc %rbx, %r15
mov %r15, (96)(%rdi)
adc $(0), %rax
push %rax
sub $(64), %rsi
movq (%rdi), %r8
movq (8)(%rdi), %r9
movq (16)(%rdi), %r10
movq (24)(%rdi), %r11
movq (32)(%rdi), %r12
movq (40)(%rdi), %r13
movq (48)(%rdi), %r14
movq (56)(%rdi), %r15
mov (8)(%rsp), %rdx
call mred8x5_start
xor %rax, %rax
movq %r8, (40)(%rdi)
movq %r9, (48)(%rdi)
movq %r10, (56)(%rdi)
mov %r11, %r8
mov %r12, %r9
mov %r13, %r10
mov %r14, %r11
mov %r15, %r12
addq (64)(%rdi), %r8
adcq (72)(%rdi), %r9
adcq (80)(%rdi), %r10
adcq (88)(%rdi), %r11
adcq (96)(%rdi), %r12
adc $(0), %rax
push %rax
add $(64), %rdi
add $(64), %rsi
call mla_5x5
pop %rax
shr $(1), %rax
mov (40)(%rdi), %rbx
adc %rbx, %r8
mov (48)(%rdi), %rbx
adc %rbx, %r9
mov (56)(%rdi), %rbx
adc %rbx, %r10
mov (64)(%rdi), %rbx
adc %rbx, %r11
mov (72)(%rdi), %rbx
adc %rbx, %r12
adc $(0), %rax
pop %rbx
add %rbx, %r8
adc $(0), %r9
adc $(0), %r10
adc $(0), %r11
adc $(0), %r12
movq %r8, (40)(%rdi)
movq %r9, (48)(%rdi)
movq %r10, (56)(%rdi)
movq %r11, (64)(%rdi)
movq %r12, (72)(%rdi)
adc $(0), %rax
pop %rcx
add $(64), %rsp
lea (-64)(%rsi), %rcx
lea (-24)(%rdi), %rsi
pop %rdi
mov %rax, %rbx
mov $(13), %rdx
call sub_N
sub %rax, %rbx
sub $(104), %rdi
sub $(104), %rsi
mov %rdi, %rcx
mov $(13), %rdx
shr $(1), %rbx
call copy_ae_N
ret
.Lfe88:
.size mred_13, .Lfe88-(mred_13)
.p2align 6, 0x90
.type mred_14, @function
mred_14:
push %r15
sub $(64), %rsp
mov %rsp, %rcx
push %r8
mov %r8, %rdx
movq (%rdi), %r8
movq (8)(%rdi), %r9
movq (16)(%rdi), %r10
movq (24)(%rdi), %r11
movq (32)(%rdi), %r12
movq (40)(%rdi), %r13
movq (48)(%rdi), %r14
movq (56)(%rdi), %r15
call mred8x8_start
xor %rax, %rax
mov (64)(%rdi), %rbx
add %rbx, %r8
mov (72)(%rdi), %rbx
adc %rbx, %r9
mov (80)(%rdi), %rbx
adc %rbx, %r10
mov (88)(%rdi), %rbx
adc %rbx, %r11
mov (96)(%rdi), %rbx
adc %rbx, %r12
mov (104)(%rdi), %rbx
adc %rbx, %r13
mov (112)(%rdi), %rbx
adc %rbx, %r14
mov (120)(%rdi), %rbx
adc %rbx, %r15
adc $(0), %rax
push %rax
add $(64), %rdi
add $(64), %rsi
xor %rsi, %rcx
xor %rcx, %rsi
xor %rsi, %rcx
call mla_8x6
xor %rsi, %rcx
xor %rcx, %rsi
xor %rsi, %rcx
pop %rax
shr $(1), %rax
movq %r8, (48)(%rdi)
movq %r9, (56)(%rdi)
mov (64)(%rdi), %rbx
adc %rbx, %r10
mov %r10, (64)(%rdi)
mov (72)(%rdi), %rbx
adc %rbx, %r11
mov %r11, (72)(%rdi)
mov (80)(%rdi), %rbx
adc %rbx, %r12
mov %r12, (80)(%rdi)
mov (88)(%rdi), %rbx
adc %rbx, %r13
mov %r13, (88)(%rdi)
mov (96)(%rdi), %rbx
adc %rbx, %r14
mov %r14, (96)(%rdi)
mov (104)(%rdi), %rbx
adc %rbx, %r15
mov %r15, (104)(%rdi)
adc $(0), %rax
push %rax
sub $(64), %rsi
movq (%rdi), %r8
movq (8)(%rdi), %r9
movq (16)(%rdi), %r10
movq (24)(%rdi), %r11
movq (32)(%rdi), %r12
movq (40)(%rdi), %r13
movq (48)(%rdi), %r14
movq (56)(%rdi), %r15
mov (8)(%rsp), %rdx
call mred8x6_start
xor %rax, %rax
movq %r8, (48)(%rdi)
movq %r9, (56)(%rdi)
mov %r10, %r8
mov %r11, %r9
mov %r12, %r10
mov %r13, %r11
mov %r14, %r12
mov %r15, %r13
addq (64)(%rdi), %r8
adcq (72)(%rdi), %r9
adcq (80)(%rdi), %r10
adcq (88)(%rdi), %r11
adcq (96)(%rdi), %r12
adcq (104)(%rdi), %r13
adc $(0), %rax
push %rax
add $(64), %rdi
add $(64), %rsi
call mla_6x6
pop %rax
shr $(1), %rax
mov (48)(%rdi), %rbx
adc %rbx, %r8
mov (56)(%rdi), %rbx
adc %rbx, %r9
mov (64)(%rdi), %rbx
adc %rbx, %r10
mov (72)(%rdi), %rbx
adc %rbx, %r11
mov (80)(%rdi), %rbx
adc %rbx, %r12
mov (88)(%rdi), %rbx
adc %rbx, %r13
adc $(0), %rax
pop %rbx
add %rbx, %r8
adc $(0), %r9
adc $(0), %r10
adc $(0), %r11
adc $(0), %r12
adc $(0), %r13
movq %r8, (48)(%rdi)
movq %r9, (56)(%rdi)
movq %r10, (64)(%rdi)
movq %r11, (72)(%rdi)
movq %r12, (80)(%rdi)
movq %r13, (88)(%rdi)
adc $(0), %rax
pop %rcx
add $(64), %rsp
lea (-64)(%rsi), %rcx
lea (-16)(%rdi), %rsi
pop %rdi
mov %rax, %rbx
mov $(14), %rdx
call sub_N
sub %rax, %rbx
sub $(112), %rdi
sub $(112), %rsi
mov %rdi, %rcx
mov $(14), %rdx
shr $(1), %rbx
call copy_ae_N
ret
.Lfe89:
.size mred_14, .Lfe89-(mred_14)
.p2align 6, 0x90
.type mred_15, @function
mred_15:
push %r15
sub $(64), %rsp
mov %rsp, %rcx
push %r8
mov %r8, %rdx
movq (%rdi), %r8
movq (8)(%rdi), %r9
movq (16)(%rdi), %r10
movq (24)(%rdi), %r11
movq (32)(%rdi), %r12
movq (40)(%rdi), %r13
movq (48)(%rdi), %r14
movq (56)(%rdi), %r15
call mred8x8_start
xor %rax, %rax
mov (64)(%rdi), %rbx
add %rbx, %r8
mov (72)(%rdi), %rbx
adc %rbx, %r9
mov (80)(%rdi), %rbx
adc %rbx, %r10
mov (88)(%rdi), %rbx
adc %rbx, %r11
mov (96)(%rdi), %rbx
adc %rbx, %r12
mov (104)(%rdi), %rbx
adc %rbx, %r13
mov (112)(%rdi), %rbx
adc %rbx, %r14
mov (120)(%rdi), %rbx
adc %rbx, %r15
adc $(0), %rax
push %rax
add $(64), %rdi
add $(64), %rsi
xor %rsi, %rcx
xor %rcx, %rsi
xor %rsi, %rcx
call mla_8x7
xor %rsi, %rcx
xor %rcx, %rsi
xor %rsi, %rcx
pop %rax
shr $(1), %rax
movq %r8, (56)(%rdi)
mov (64)(%rdi), %rbx
adc %rbx, %r9
mov %r9, (64)(%rdi)
mov (72)(%rdi), %rbx
adc %rbx, %r10
mov %r10, (72)(%rdi)
mov (80)(%rdi), %rbx
adc %rbx, %r11
mov %r11, (80)(%rdi)
mov (88)(%rdi), %rbx
adc %rbx, %r12
mov %r12, (88)(%rdi)
mov (96)(%rdi), %rbx
adc %rbx, %r13
mov %r13, (96)(%rdi)
mov (104)(%rdi), %rbx
adc %rbx, %r14
mov %r14, (104)(%rdi)
mov (112)(%rdi), %rbx
adc %rbx, %r15
mov %r15, (112)(%rdi)
adc $(0), %rax
push %rax
sub $(64), %rsi
movq (%rdi), %r8
movq (8)(%rdi), %r9
movq (16)(%rdi), %r10
movq (24)(%rdi), %r11
movq (32)(%rdi), %r12
movq (40)(%rdi), %r13
movq (48)(%rdi), %r14
movq (56)(%rdi), %r15
mov (8)(%rsp), %rdx
call mred8x7_start
xor %rax, %rax
movq %r8, (56)(%rdi)
mov %r9, %r8
mov %r10, %r9
mov %r11, %r10
mov %r12, %r11
mov %r13, %r12
mov %r14, %r13
mov %r15, %r14
addq (64)(%rdi), %r8
adcq (72)(%rdi), %r9
adcq (80)(%rdi), %r10
adcq (88)(%rdi), %r11
adcq (96)(%rdi), %r12
adcq (104)(%rdi), %r13
adcq (112)(%rdi), %r14
adc $(0), %rax
push %rax
add $(64), %rdi
add $(64), %rsi
call mla_7x7
pop %rax
shr $(1), %rax
mov (56)(%rdi), %rbx
adc %rbx, %r8
mov (64)(%rdi), %rbx
adc %rbx, %r9
mov (72)(%rdi), %rbx
adc %rbx, %r10
mov (80)(%rdi), %rbx
adc %rbx, %r11
mov (88)(%rdi), %rbx
adc %rbx, %r12
mov (96)(%rdi), %rbx
adc %rbx, %r13
mov (104)(%rdi), %rbx
adc %rbx, %r14
adc $(0), %rax
pop %rbx
add %rbx, %r8
adc $(0), %r9
adc $(0), %r10
adc $(0), %r11
adc $(0), %r12
adc $(0), %r13
adc $(0), %r14
movq %r8, (56)(%rdi)
movq %r9, (64)(%rdi)
movq %r10, (72)(%rdi)
movq %r11, (80)(%rdi)
movq %r12, (88)(%rdi)
movq %r13, (96)(%rdi)
movq %r14, (104)(%rdi)
adc $(0), %rax
pop %rcx
add $(64), %rsp
lea (-64)(%rsi), %rcx
lea (-8)(%rdi), %rsi
pop %rdi
mov %rax, %rbx
mov $(15), %rdx
call sub_N
sub %rax, %rbx
sub $(120), %rdi
sub $(120), %rsi
mov %rdi, %rcx
mov $(15), %rdx
shr $(1), %rbx
call copy_ae_N
ret
.Lfe90:
.size mred_15, .Lfe90-(mred_15)
.p2align 6, 0x90
.type mred_16, @function
mred_16:
push %r15
sub $(64), %rsp
mov %rsp, %rcx
mov %r8, %rdx
movq (%rdi), %r8
movq (8)(%rdi), %r9
movq (16)(%rdi), %r10
movq (24)(%rdi), %r11
movq (32)(%rdi), %r12
movq (40)(%rdi), %r13
movq (48)(%rdi), %r14
movq (56)(%rdi), %r15
call mred8x8_start
xor %rax, %rax
mov (64)(%rdi), %rbx
add %rbx, %r8
mov (72)(%rdi), %rbx
adc %rbx, %r9
mov (80)(%rdi), %rbx
adc %rbx, %r10
mov (88)(%rdi), %rbx
adc %rbx, %r11
mov (96)(%rdi), %rbx
adc %rbx, %r12
mov (104)(%rdi), %rbx
adc %rbx, %r13
mov (112)(%rdi), %rbx
adc %rbx, %r14
mov (120)(%rdi), %rbx
adc %rbx, %r15
adc $(0), %rax
push %rax
add $(64), %rsi
add $(64), %rdi
push %rdx
call mla_8x8
pop %rdx
pop %rax
shr $(1), %rax
mov (64)(%rdi), %rbx
adc %rbx, %r8
mov %r8, (64)(%rdi)
mov (72)(%rdi), %rbx
adc %rbx, %r9
mov %r9, (72)(%rdi)
mov (80)(%rdi), %rbx
adc %rbx, %r10
mov %r10, (80)(%rdi)
mov (88)(%rdi), %rbx
adc %rbx, %r11
mov %r11, (88)(%rdi)
mov (96)(%rdi), %rbx
adc %rbx, %r12
mov %r12, (96)(%rdi)
mov (104)(%rdi), %rbx
adc %rbx, %r13
mov %r13, (104)(%rdi)
mov (112)(%rdi), %rbx
adc %rbx, %r14
mov %r14, (112)(%rdi)
mov (120)(%rdi), %rbx
adc %rbx, %r15
mov %r15, (120)(%rdi)
adc $(0), %rax
push %rax
sub $(64), %rsi
movq (%rdi), %r8
movq (8)(%rdi), %r9
movq (16)(%rdi), %r10
movq (24)(%rdi), %r11
movq (32)(%rdi), %r12
movq (40)(%rdi), %r13
movq (48)(%rdi), %r14
movq (56)(%rdi), %r15
call mred8x8_start
xor %rax, %rax
mov (64)(%rdi), %rbx
add %rbx, %r8
mov (72)(%rdi), %rbx
adc %rbx, %r9
mov (80)(%rdi), %rbx
adc %rbx, %r10
mov (88)(%rdi), %rbx
adc %rbx, %r11
mov (96)(%rdi), %rbx
adc %rbx, %r12
mov (104)(%rdi), %rbx
adc %rbx, %r13
mov (112)(%rdi), %rbx
adc %rbx, %r14
mov (120)(%rdi), %rbx
adc %rbx, %r15
adc $(0), %rax
push %rax
add $(64), %rdi
add $(64), %rsi
call mla_8x8
sub $(64), %rsi
pop %rax
shr $(1), %rax
mov (64)(%rdi), %rbx
adc %rbx, %r8
mov (72)(%rdi), %rbx
adc %rbx, %r9
mov (80)(%rdi), %rbx
adc %rbx, %r10
mov (88)(%rdi), %rbx
adc %rbx, %r11
mov (96)(%rdi), %rbx
adc %rbx, %r12
mov (104)(%rdi), %rbx
adc %rbx, %r13
mov (112)(%rdi), %rbx
adc %rbx, %r14
mov (120)(%rdi), %rbx
adc %rbx, %r15
adc $(0), %rax
pop %rbx
add %rbx, %r8
adc $(0), %r9
adc $(0), %r10
adc $(0), %r11
adc $(0), %r12
adc $(0), %r13
adc $(0), %r14
adc $(0), %r15
adc $(0), %rax
movq %r8, (64)(%rdi)
movq %r9, (72)(%rdi)
movq %r10, (80)(%rdi)
movq %r11, (88)(%rdi)
movq %r12, (96)(%rdi)
movq %r13, (104)(%rdi)
movq %r14, (112)(%rdi)
movq %r15, (120)(%rdi)
add $(64), %rsp
pop %rbp
mov (%rdi), %rbx
sub (%rsi), %rbx
mov %rbx, (%rbp)
mov (8)(%rdi), %rbx
sbb (8)(%rsi), %rbx
mov %rbx, (8)(%rbp)
mov (16)(%rdi), %rbx
sbb (16)(%rsi), %rbx
mov %rbx, (16)(%rbp)
mov (24)(%rdi), %rbx
sbb (24)(%rsi), %rbx
mov %rbx, (24)(%rbp)
mov (32)(%rdi), %rbx
sbb (32)(%rsi), %rbx
mov %rbx, (32)(%rbp)
mov (40)(%rdi), %rbx
sbb (40)(%rsi), %rbx
mov %rbx, (40)(%rbp)
mov (48)(%rdi), %rbx
sbb (48)(%rsi), %rbx
mov %rbx, (48)(%rbp)
mov (56)(%rdi), %rbx
sbb (56)(%rsi), %rbx
mov %rbx, (56)(%rbp)
mov (64)(%rsi), %rbx
sbb %rbx, %r8
mov (72)(%rsi), %rbx
sbb %rbx, %r9
mov (80)(%rsi), %rbx
sbb %rbx, %r10
mov (88)(%rsi), %rbx
sbb %rbx, %r11
mov (96)(%rsi), %rbx
sbb %rbx, %r12
mov (104)(%rsi), %rbx
sbb %rbx, %r13
mov (112)(%rsi), %rbx
sbb %rbx, %r14
mov (120)(%rsi), %rbx
sbb %rbx, %r15
sbb $(0), %rax
movq (64)(%rdi), %rax
movq (72)(%rdi), %rbx
movq (80)(%rdi), %rcx
movq (88)(%rdi), %rdx
cmovae %r8, %rax
cmovae %r9, %rbx
cmovae %r10, %rcx
cmovae %r11, %rdx
movq %rax, (64)(%rbp)
movq %rbx, (72)(%rbp)
movq %rcx, (80)(%rbp)
movq %rdx, (88)(%rbp)
movq (96)(%rdi), %rax
movq (104)(%rdi), %rbx
movq (112)(%rdi), %rcx
movq (120)(%rdi), %rdx
cmovae %r12, %rax
cmovae %r13, %rbx
cmovae %r14, %rcx
cmovae %r15, %rdx
movq %rax, (96)(%rbp)
movq %rbx, (104)(%rbp)
movq %rcx, (112)(%rbp)
movq %rdx, (120)(%rbp)
movq (%rbp), %r8
movq (8)(%rbp), %r9
movq (16)(%rbp), %r10
movq (24)(%rbp), %r11
movq (32)(%rbp), %r12
movq (40)(%rbp), %r13
movq (48)(%rbp), %r14
movq (56)(%rbp), %r15
movq (%rdi), %rax
movq (8)(%rdi), %rbx
movq (16)(%rdi), %rcx
movq (24)(%rdi), %rdx
cmovae %r8, %rax
cmovae %r9, %rbx
cmovae %r10, %rcx
cmovae %r11, %rdx
movq %rax, (%rbp)
movq %rbx, (8)(%rbp)
movq %rcx, (16)(%rbp)
movq %rdx, (24)(%rbp)
movq (32)(%rdi), %rax
movq (40)(%rdi), %rbx
movq (48)(%rdi), %rcx
movq (56)(%rdi), %rdx
cmovae %r12, %rax
cmovae %r13, %rbx
cmovae %r14, %rcx
cmovae %r15, %rdx
movq %rax, (32)(%rbp)
movq %rbx, (40)(%rbp)
movq %rcx, (48)(%rbp)
movq %rdx, (56)(%rbp)
ret
.Lfe91:
.size mred_16, .Lfe91-(mred_16)
mred_short:
.quad mred_5 - mred_short
.quad mred_6 - mred_short
.quad mred_7 - mred_short
.quad mred_8 - mred_short
.quad mred_9 - mred_short
.quad mred_10 - mred_short
.quad mred_11 - mred_short
.quad mred_12 - mred_short
.quad mred_13 - mred_short
.quad mred_14 - mred_short
.quad mred_15 - mred_short
.quad mred_16 - mred_short
mred8x_start:
.quad mred8x1_start - mred8x_start
.quad mred8x2_start - mred8x_start
.quad mred8x3_start - mred8x_start
.quad mred8x4_start - mred8x_start
.quad mred8x5_start - mred8x_start
.quad mred8x6_start - mred8x_start
.quad mred8x7_start - mred8x_start
.p2align 6, 0x90
.type mred_8N_adcox, @function
mred_8N_adcox:
push %r15
sub $(64), %rsp
mov %rsp, %rcx
mov %rdx, %rbx
xor %rax, %rax
.LpassLoopgas_92:
push %rdi
push %rsi
push %rdx
push %r8
push %rbx
push %rax
push %rdx
mov %r8, %rdx
movq (%rdi), %r8
movq (8)(%rdi), %r9
movq (16)(%rdi), %r10
movq (24)(%rdi), %r11
movq (32)(%rdi), %r12
movq (40)(%rdi), %r13
movq (48)(%rdi), %r14
movq (56)(%rdi), %r15
call mred8x8_start
pop %rdx
xor %rax, %rax
mov (64)(%rdi), %rbx
add %rbx, %r8
mov (72)(%rdi), %rbx
adc %rbx, %r9
mov (80)(%rdi), %rbx
adc %rbx, %r10
mov (88)(%rdi), %rbx
adc %rbx, %r11
mov (96)(%rdi), %rbx
adc %rbx, %r12
mov (104)(%rdi), %rbx
adc %rbx, %r13
mov (112)(%rdi), %rbx
adc %rbx, %r14
mov (120)(%rdi), %rbx
adc %rbx, %r15
adc $(0), %rax
push %rax
jmp .LentryInnerLoopgas_92
.LinnerLoopgas_92:
push %rdx
call mla_8x8
pop %rdx
pop %rax
shr $(1), %rax
mov (64)(%rdi), %rbx
adc %rbx, %r8
mov %r8, (64)(%rdi)
mov (72)(%rdi), %rbx
adc %rbx, %r9
mov %r9, (72)(%rdi)
mov (80)(%rdi), %rbx
adc %rbx, %r10
mov %r10, (80)(%rdi)
mov (88)(%rdi), %rbx
adc %rbx, %r11
mov %r11, (88)(%rdi)
mov (96)(%rdi), %rbx
adc %rbx, %r12
mov %r12, (96)(%rdi)
mov (104)(%rdi), %rbx
adc %rbx, %r13
mov %r13, (104)(%rdi)
mov (112)(%rdi), %rbx
adc %rbx, %r14
mov %r14, (112)(%rdi)
mov (120)(%rdi), %rbx
adc %rbx, %r15
mov %r15, (120)(%rdi)
adc $(0), %rax
push %rax
.LentryInnerLoopgas_92:
add $(64), %rdi
add $(64), %rsi
sub $(8), %rdx
jg .LinnerLoopgas_92
pop %rax
pop %rbx
add %rbx, %r8
adc $(0), %r9
adc $(0), %r10
adc $(0), %r11
adc $(0), %r12
adc $(0), %r13
adc $(0), %r14
adc $(0), %r15
adc $(0), %rax
movq %r8, (%rdi)
movq %r9, (8)(%rdi)
movq %r10, (16)(%rdi)
movq %r11, (24)(%rdi)
movq %r12, (32)(%rdi)
movq %r13, (40)(%rdi)
movq %r14, (48)(%rdi)
movq %r15, (56)(%rdi)
pop %rbx
pop %r8
pop %rdx
pop %rsi
pop %rdi
add $(64), %rdi
sub $(8), %rbx
jg .LpassLoopgas_92
add $(64), %rsp
mov %rdx, %r14
lea (,%rdx,8), %r15
mov %rax, %rbx
mov %rsi, %rcx
mov %rdi, %rsi
pop %rdi
call sub_N
sub %rax, %rbx
mov %r14, %rdx
sub %r15, %rdi
sub %r15, %rsi
mov %rdi, %rcx
shr $(1), %rbx
call copy_ae_N
ret
.Lfe92:
.size mred_8N_adcox, .Lfe92-(mred_8N_adcox)
.p2align 6, 0x90
.type mred_N_adcox, @function
mred_N_adcox:
push %r15
sub $(64), %rsp
mov %rsp, %rcx
mov %rdx, %rbx
sub $(8), %rbx
xor %rax, %rax
mov $(7), %r15
and %rdx, %r15
lea mla_8xl_tail(%rip), %rbp
mov (-8)(%rbp,%r15,8), %r15
add %r15, %rbp
.LpassLoopgas_93:
push %rdi
push %rsi
push %rdx
push %r8
push %rbx
push %rax
push %rbp
sub $(8), %rdx
push %rdx
mov %r8, %rdx
movq (%rdi), %r8
movq (8)(%rdi), %r9
movq (16)(%rdi), %r10
movq (24)(%rdi), %r11
movq (32)(%rdi), %r12
movq (40)(%rdi), %r13
movq (48)(%rdi), %r14
movq (56)(%rdi), %r15
call mred8x8_start
pop %rdx
xor %rax, %rax
push %rax
jmp .LentryInnerLoopgas_93
.LinnerLoopgas_93:
push %rdx
call mla_8x8
pop %rdx
.LentryInnerLoopgas_93:
pop %rax
shr $(1), %rax
mov (64)(%rdi), %rbx
adc %rbx, %r8
mov %r8, (64)(%rdi)
mov (72)(%rdi), %rbx
adc %rbx, %r9
mov %r9, (72)(%rdi)
mov (80)(%rdi), %rbx
adc %rbx, %r10
mov %r10, (80)(%rdi)
mov (88)(%rdi), %rbx
adc %rbx, %r11
mov %r11, (88)(%rdi)
mov (96)(%rdi), %rbx
adc %rbx, %r12
mov %r12, (96)(%rdi)
mov (104)(%rdi), %rbx
adc %rbx, %r13
mov %r13, (104)(%rdi)
mov (112)(%rdi), %rbx
adc %rbx, %r14
mov %r14, (112)(%rdi)
mov (120)(%rdi), %rbx
adc %rbx, %r15
mov %r15, (120)(%rdi)
adc $(0), %rax
push %rax
add $(64), %rdi
add $(64), %rsi
sub $(8), %rdx
jnc .LinnerLoopgas_93
add $(8), %rdx
jz .Lcomplete_regular_passgas_93
mov (8)(%rsp), %rax
xor %rsi, %rcx
xor %rcx, %rsi
xor %rsi, %rcx
push %rdx
call *%rax
pop %rdx
xor %rsi, %rcx
xor %rcx, %rsi
xor %rsi, %rcx
lea (%rdi,%rdx,8), %rdi
pop %rax
shr $(1), %rax
mov %rdx, %rbx
dec %rbx
jz .Lmt_1gas_93
dec %rbx
jz .Lmt_2gas_93
dec %rbx
jz .Lmt_3gas_93
dec %rbx
jz .Lmt_4gas_93
dec %rbx
jz .Lmt_5gas_93
dec %rbx
jz .Lmt_6gas_93
.Lmt_7gas_93:
mov (8)(%rdi), %rbx
adc %rbx, %r9
.Lmt_6gas_93:
mov (16)(%rdi), %rbx
adc %rbx, %r10
.Lmt_5gas_93:
mov (24)(%rdi), %rbx
adc %rbx, %r11
.Lmt_4gas_93:
mov (32)(%rdi), %rbx
adc %rbx, %r12
.Lmt_3gas_93:
mov (40)(%rdi), %rbx
adc %rbx, %r13
.Lmt_2gas_93:
mov (48)(%rdi), %rbx
adc %rbx, %r14
.Lmt_1gas_93:
mov (56)(%rdi), %rbx
adc %rbx, %r15
adc $(0), %rax
push %rax
.Lcomplete_regular_passgas_93:
pop %rax
pop %rbp
pop %rbx
add %rbx, %r8
adc $(0), %r9
adc $(0), %r10
adc $(0), %r11
adc $(0), %r12
adc $(0), %r13
adc $(0), %r14
adc $(0), %r15
adc $(0), %rax
movq %r8, (%rdi)
movq %r9, (8)(%rdi)
movq %r10, (16)(%rdi)
movq %r11, (24)(%rdi)
movq %r12, (32)(%rdi)
movq %r13, (40)(%rdi)
movq %r14, (48)(%rdi)
movq %r15, (56)(%rdi)
pop %rbx
pop %r8
pop %rdx
pop %rsi
pop %rdi
add $(64), %rdi
sub $(8), %rbx
jnc .LpassLoopgas_93
add $(8), %rbx
jz .Lcomplete_reductiongas_93
push %rdi
push %rsi
push %rdx
push %r8
push %rbx
push %rax
push %rbp
sub $(8), %rdx
push %rdx
mov %r8, %rdx
movq (%rdi), %r8
movq (8)(%rdi), %r9
movq (16)(%rdi), %r10
movq (24)(%rdi), %r11
movq (32)(%rdi), %r12
movq (40)(%rdi), %r13
movq (48)(%rdi), %r14
movq (56)(%rdi), %r15
lea mred8x_start(%rip), %rax
mov (-8)(%rax,%rbx,8), %rbp
add %rbp, %rax
call *%rax
pop %rdx
xor %rax, %rax
push %rax
jmp .LentryTailLoopgas_93
.LtailLoopgas_93:
movq (%rdi), %r8
movq (8)(%rdi), %r9
movq (16)(%rdi), %r10
movq (24)(%rdi), %r11
movq (32)(%rdi), %r12
movq (40)(%rdi), %r13
movq (48)(%rdi), %r14
movq (56)(%rdi), %r15
mov (8)(%rsp), %rax
push %rdx
call *%rax
pop %rdx
.LentryTailLoopgas_93:
pop %rax
shr $(1), %rax
adc $(0), %r8
adc $(0), %r9
adc $(0), %r10
adc $(0), %r11
adc $(0), %r12
adc $(0), %r13
adc $(0), %r14
adc $(0), %r15
adc $(0), %rax
mov (16)(%rsp), %rbx
cmp $(1), %rbx
jz .Ltt_1gas_93
cmp $(2), %rbx
jz .Ltt_2gas_93
cmp $(3), %rbx
jz .Ltt_3gas_93
cmp $(4), %rbx
jz .Ltt_4gas_93
cmp $(5), %rbx
jz .Ltt_5gas_93
cmp $(6), %rbx
jz .Ltt_6gas_93
.Ltt_7gas_93:
mov (8)(%rdi,%rbx,8), %rbp
adc %rbp, %r9
.Ltt_6gas_93:
mov (16)(%rdi,%rbx,8), %rbp
adc %rbp, %r10
.Ltt_5gas_93:
mov (24)(%rdi,%rbx,8), %rbp
adc %rbp, %r11
.Ltt_4gas_93:
mov (32)(%rdi,%rbx,8), %rbp
adc %rbp, %r12
.Ltt_3gas_93:
mov (40)(%rdi,%rbx,8), %rbp
adc %rbp, %r13
.Ltt_2gas_93:
mov (48)(%rdi,%rbx,8), %rbp
adc %rbp, %r14
.Ltt_1gas_93:
mov (56)(%rdi,%rbx,8), %rbp
adc %rbp, %r15
adc $(0), %rax
push %rax
movq %r8, (%rdi,%rbx,8)
movq %r9, (8)(%rdi,%rbx,8)
movq %r10, (16)(%rdi,%rbx,8)
movq %r11, (24)(%rdi,%rbx,8)
movq %r12, (32)(%rdi,%rbx,8)
movq %r13, (40)(%rdi,%rbx,8)
movq %r14, (48)(%rdi,%rbx,8)
movq %r15, (56)(%rdi,%rbx,8)
add $(64), %rsi
add $(64), %rdi
sub $(8), %rdx
jnc .LtailLoopgas_93
add $(8), %rdx
mov %rdx, %rbx
movq (%rdi), %r8
dec %rbx
jz .Lget_tail_procgas_93
movq (8)(%rdi), %r9
dec %rbx
jz .Lget_tail_procgas_93
movq (16)(%rdi), %r10
dec %rbx
jz .Lget_tail_procgas_93
movq (24)(%rdi), %r11
dec %rbx
jz .Lget_tail_procgas_93
movq (32)(%rdi), %r12
dec %rbx
jz .Lget_tail_procgas_93
movq (40)(%rdi), %r13
dec %rbx
jz .Lget_tail_procgas_93
movq (48)(%rdi), %r14
.Lget_tail_procgas_93:
lea mla_lxl_short(%rip), %rax
mov (-8)(%rax,%rdx,8), %rbp
add %rbp, %rax
push %rdx
call *%rax
pop %rdx
lea (%rdi,%rdx,8), %rdi
pop %rax
shr $(1), %rax
mov %rdx, %rbx
mov (%rdi), %rbp
adc %rbp, %r8
dec %rbx
jz .Ladd_carry1gas_93
mov (8)(%rdi), %rbp
adc %rbp, %r9
dec %rbx
jz .Ladd_carry1gas_93
mov (16)(%rdi), %rbp
adc %rbp, %r10
dec %rbx
jz .Ladd_carry1gas_93
mov (24)(%rdi), %rbp
adc %rbp, %r11
dec %rbx
jz .Ladd_carry1gas_93
mov (32)(%rdi), %rbp
adc %rbp, %r12
dec %rbx
jz .Ladd_carry1gas_93
mov (40)(%rdi), %rbp
adc %rbp, %r13
dec %rbx
jz .Ladd_carry1gas_93
mov (48)(%rdi), %rbp
adc %rbp, %r14
.Ladd_carry1gas_93:
adc $(0), %rax
pop %rbp
pop %rbx
add %rbx, %r8
movq %r8, (%rdi)
dec %rdx
jz .Ladd_carry2gas_93
adc $(0), %r9
movq %r9, (8)(%rdi)
dec %rdx
jz .Ladd_carry2gas_93
adc $(0), %r10
movq %r10, (16)(%rdi)
dec %rdx
jz .Ladd_carry2gas_93
adc $(0), %r11
movq %r11, (24)(%rdi)
dec %rdx
jz .Ladd_carry2gas_93
adc $(0), %r12
movq %r12, (32)(%rdi)
dec %rdx
jz .Ladd_carry2gas_93
adc $(0), %r13
movq %r13, (40)(%rdi)
dec %rdx
jz .Ladd_carry2gas_93
adc $(0), %r14
movq %r14, (48)(%rdi)
.Ladd_carry2gas_93:
adc $(0), %rax
pop %rbx
pop %r8
pop %rdx
pop %rsi
pop %rdi
lea (%rdi,%rbx,8), %rdi
.Lcomplete_reductiongas_93:
add $(64), %rsp
mov %rdx, %r14
lea (,%rdx,8), %r15
mov %rax, %rbx
mov %rsi, %rcx
mov %rdi, %rsi
pop %rdi
call sub_N
sub %rax, %rbx
mov %r14, %rdx
sub %r15, %rdi
sub %r15, %rsi
mov %rdi, %rcx
shr $(1), %rbx
call copy_ae_N
ret
.Lfe93:
.size mred_N_adcox, .Lfe93-(mred_N_adcox)
.p2align 6, 0x90
.globl cpMulAdx_BNU_school
.type cpMulAdx_BNU_school, @function
cpMulAdx_BNU_school:
push %rbx
push %rbp
push %r12
push %r13
push %r14
push %r15
movslq %edx, %rdx
movslq %r8d, %rbx
xor %r8, %r8
xor %r9, %r9
xor %r10, %r10
xor %r11, %r11
xor %r12, %r12
xor %r13, %r13
xor %r14, %r14
xor %r15, %r15
cmp %rbx, %rdx
jl .Lswap_operansgas_94
jg .Ltest_8N_casegas_94
cmp $(16), %rdx
jg .Ltest_8N_casegas_94
cmp $(4), %rdx
jg .Lmore_then_4gas_94
cmp $(3), %edx
ja .Lmul_4_4gas_94
jz .Lmul_3_3gas_94
jp .Lmul_2_2gas_94
.Lmul_1_1gas_94:
mov (%rcx), %rdx
mulx (%rsi), %rbp, %r8
mov %rbp, (%rdi)
movq %r8, (8)(%rdi)
jmp .Lquitgas_94
.Lmul_2_2gas_94:
mov (%rcx), %rdx
mulx (%rsi), %rbp, %r8
mov %rbp, (%rdi)
mulx (8)(%rsi), %rbx, %r9
add %rbx, %r8
adc $(0), %r9
mov (8)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (8)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rax, %rbp
adox %rax, %rbp
mov %rbp, %r9
movq %r8, (16)(%rdi)
movq %r9, (24)(%rdi)
jmp .Lquitgas_94
.Lmul_3_3gas_94:
mov (%rcx), %rdx
mulx (%rsi), %rbp, %r8
mov %rbp, (%rdi)
mulx (8)(%rsi), %rbx, %r9
add %rbx, %r8
mulx (16)(%rsi), %rbp, %r10
adc %rbp, %r9
adc $(0), %r10
mov (8)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (8)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rax, %rbx
adox %rax, %rbx
mov %rbx, %r10
mov (16)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (16)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rax, %rbx
adox %rax, %rbx
mov %rbx, %r10
movq %r8, (24)(%rdi)
movq %r9, (32)(%rdi)
movq %r10, (40)(%rdi)
jmp .Lquitgas_94
.Lmul_4_4gas_94:
mov (%rcx), %rdx
mulx (%rsi), %rbp, %r8
mov %rbp, (%rdi)
mulx (8)(%rsi), %rbx, %r9
add %rbx, %r8
mulx (16)(%rsi), %rbp, %r10
adc %rbp, %r9
mulx (24)(%rsi), %rbx, %r11
adc %rbx, %r10
adc $(0), %r11
mov (8)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (8)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rax, %rbp
adox %rax, %rbp
mov %rbp, %r11
mov (16)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (16)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rax, %rbp
adox %rax, %rbp
mov %rbp, %r11
mov (24)(%rcx), %rdx
xor %rax, %rax
mulx (%rsi), %rbp, %rbx
adox %rbp, %r8
mov %r8, (24)(%rdi)
adcx %rbx, %r9
mulx (8)(%rsi), %r8, %rbp
adox %r9, %r8
adcx %rbp, %r10
mulx (16)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (24)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rax, %rbp
adox %rax, %rbp
mov %rbp, %r11
movq %r8, (32)(%rdi)
movq %r9, (40)(%rdi)
movq %r10, (48)(%rdi)
movq %r11, (56)(%rdi)
jmp .Lquitgas_94
.Lmore_then_4gas_94:
lea mul_lxl_basic(%rip), %rax
mov (-8)(%rax,%rdx,8), %rbp
add %rbp, %rax
call *%rax
jmp .Lquitgas_94
.Lswap_operansgas_94:
xor %rcx, %rsi
xor %rsi, %rcx
xor %rcx, %rsi
xor %rbx, %rdx
xor %rdx, %rbx
xor %rbx, %rdx
.Ltest_8N_casegas_94:
mov %rdx, %rax
or %rbx, %rax
and $(7), %rax
jnz .Lgeneral_mulgas_94
call mul_8Nx8M_adcox
jmp .Lquitgas_94
.Lgeneral_mulgas_94:
call mul_NxM_adcox
jmp .Lquitgas_94
.Lquitgas_94:
pop %r15
pop %r14
pop %r13
pop %r12
pop %rbp
pop %rbx
ret
.Lfe94:
.size cpMulAdx_BNU_school, .Lfe94-(cpMulAdx_BNU_school)
.p2align 6, 0x90
.globl cpSqrAdx_BNU_school
.type cpSqrAdx_BNU_school, @function
cpSqrAdx_BNU_school:
push %rbx
push %rbp
push %r12
push %r13
push %r14
push %r15
movslq %edx, %rdx
xor %r8, %r8
xor %r9, %r9
xor %r10, %r10
xor %r11, %r11
xor %r12, %r12
xor %r13, %r13
xor %r14, %r14
xor %r15, %r15
cmp $(16), %rdx
jg .Ltest_8N_casegas_95
lea sqr_l_basic(%rip), %rax
mov (-8)(%rax,%rdx,8), %rbp
add %rbp, %rax
call *%rax
jmp .Lquitgas_95
.Ltest_8N_casegas_95:
test $(7), %rdx
jnz .Lgeneral_sqrgas_95
call sqr_8N_adcox
jmp .Lquitgas_95
.Lgeneral_sqrgas_95:
call sqr_N_adcox
.Lquitgas_95:
pop %r15
pop %r14
pop %r13
pop %r12
pop %rbp
pop %rbx
ret
.Lfe95:
.size cpSqrAdx_BNU_school, .Lfe95-(cpSqrAdx_BNU_school)
.p2align 6, 0x90
.globl cpMontRedAdx_BNU
.type cpMontRedAdx_BNU, @function
cpMontRedAdx_BNU:
push %rbx
push %rbp
push %r12
push %r13
push %r14
push %r15
mov %rdi, %r15
mov %rsi, %rdi
mov %rdx, %rsi
movslq %ecx, %rdx
cmp $(16), %rdx
ja .Ltest_8N_casegas_96
cmp $(4), %rdx
ja .Labove4gas_96
cmp $(3), %rdx
ja .Lred_4gas_96
jz .Lred_3gas_96
jp .Lred_2gas_96
.Lred_1gas_96:
movq (%rdi), %r9
mov %r8, %rdx
imul %r9, %rdx
xor %rax, %rax
mulx (%rsi), %rbx, %rbp
adox %rbx, %r9
adox %rax, %rbp
mov %rbp, %r9
xor %rbx, %rbx
addq (8)(%rdi), %r9
movq %r9, (8)(%rdi)
adc $(0), %rbx
subq (%rsi), %r9
sbb $(0), %rbx
movq (8)(%rdi), %rax
cmovae %r9, %rax
movq %rax, (%r15)
jmp .Lquitgas_96
.Lred_2gas_96:
movq (%rdi), %r9
movq (8)(%rdi), %r10
mov %r8, %rdx
imul %r9, %rdx
xor %rax, %rax
mulx (%rsi), %rbx, %rbp
adox %rbx, %r9
adcx %rbp, %r10
mulx (8)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rax, %rbx
adox %rax, %rbx
mov %rbx, %r10
mov %r8, %rdx
imul %r9, %rdx
xor %rax, %rax
mulx (%rsi), %rbx, %rbp
adox %rbx, %r9
adcx %rbp, %r10
mulx (8)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rax, %rbx
adox %rax, %rbx
mov %rbx, %r10
xor %rbx, %rbx
addq (16)(%rdi), %r9
movq %r9, (16)(%rdi)
adcq (24)(%rdi), %r10
movq %r10, (24)(%rdi)
adc $(0), %rbx
subq (%rsi), %r9
sbbq (8)(%rsi), %r10
sbb $(0), %rbx
movq (16)(%rdi), %rax
cmovae %r9, %rax
movq %rax, (%r15)
movq (24)(%rdi), %rax
cmovae %r10, %rax
movq %rax, (8)(%r15)
jmp .Lquitgas_96
.Lred_3gas_96:
movq (%rdi), %r9
movq (8)(%rdi), %r10
movq (16)(%rdi), %r11
mov %r8, %rdx
imul %r9, %rdx
xor %rax, %rax
mulx (%rsi), %rbx, %rbp
adox %rbx, %r9
adcx %rbp, %r10
mulx (8)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (16)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rax, %rbp
adox %rax, %rbp
mov %rbp, %r11
mov %r8, %rdx
imul %r9, %rdx
xor %rax, %rax
mulx (%rsi), %rbx, %rbp
adox %rbx, %r9
adcx %rbp, %r10
mulx (8)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (16)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rax, %rbp
adox %rax, %rbp
mov %rbp, %r11
mov %r8, %rdx
imul %r9, %rdx
xor %rax, %rax
mulx (%rsi), %rbx, %rbp
adox %rbx, %r9
adcx %rbp, %r10
mulx (8)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (16)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rax, %rbp
adox %rax, %rbp
mov %rbp, %r11
xor %rbx, %rbx
addq (24)(%rdi), %r9
movq %r9, (24)(%rdi)
adcq (32)(%rdi), %r10
movq %r10, (32)(%rdi)
adcq (40)(%rdi), %r11
movq %r11, (40)(%rdi)
adc $(0), %rbx
subq (%rsi), %r9
sbbq (8)(%rsi), %r10
sbbq (16)(%rsi), %r11
sbb $(0), %rbx
movq (24)(%rdi), %rax
cmovae %r9, %rax
movq %rax, (%r15)
movq (32)(%rdi), %rax
cmovae %r10, %rax
movq %rax, (8)(%r15)
movq (40)(%rdi), %rax
cmovae %r11, %rax
movq %rax, (16)(%r15)
jmp .Lquitgas_96
.Lred_4gas_96:
movq (%rdi), %r9
movq (8)(%rdi), %r10
movq (16)(%rdi), %r11
movq (24)(%rdi), %r12
mov %r8, %rdx
imul %r9, %rdx
xor %rax, %rax
mulx (%rsi), %rbx, %rbp
adox %rbx, %r9
adcx %rbp, %r10
mulx (8)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (16)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (24)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rax, %rbx
adox %rax, %rbx
mov %rbx, %r12
mov %r8, %rdx
imul %r9, %rdx
xor %rax, %rax
mulx (%rsi), %rbx, %rbp
adox %rbx, %r9
adcx %rbp, %r10
mulx (8)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (16)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (24)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rax, %rbx
adox %rax, %rbx
mov %rbx, %r12
mov %r8, %rdx
imul %r9, %rdx
xor %rax, %rax
mulx (%rsi), %rbx, %rbp
adox %rbx, %r9
adcx %rbp, %r10
mulx (8)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (16)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (24)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rax, %rbx
adox %rax, %rbx
mov %rbx, %r12
mov %r8, %rdx
imul %r9, %rdx
xor %rax, %rax
mulx (%rsi), %rbx, %rbp
adox %rbx, %r9
adcx %rbp, %r10
mulx (8)(%rsi), %r9, %rbx
adox %r10, %r9
adcx %rbx, %r11
mulx (16)(%rsi), %r10, %rbp
adox %r11, %r10
adcx %rbp, %r12
mulx (24)(%rsi), %r11, %rbx
adox %r12, %r11
adcx %rax, %rbx
adox %rax, %rbx
mov %rbx, %r12
xor %rbx, %rbx
addq (32)(%rdi), %r9
movq %r9, (32)(%rdi)
adcq (40)(%rdi), %r10
movq %r10, (40)(%rdi)
adcq (48)(%rdi), %r11
movq %r11, (48)(%rdi)
adcq (56)(%rdi), %r12
movq %r12, (56)(%rdi)
adc $(0), %rbx
subq (%rsi), %r9
sbbq (8)(%rsi), %r10
sbbq (16)(%rsi), %r11
sbbq (24)(%rsi), %r12
sbb $(0), %rbx
movq (32)(%rdi), %rax
cmovae %r9, %rax
movq %rax, (%r15)
movq (40)(%rdi), %rax
cmovae %r10, %rax
movq %rax, (8)(%r15)
movq (48)(%rdi), %rax
cmovae %r11, %rax
movq %rax, (16)(%r15)
movq (56)(%rdi), %rax
cmovae %r12, %rax
movq %rax, (24)(%r15)
jmp .Lquitgas_96
.Labove4gas_96:
mov %rdx, %rbp
sub $(4), %rbp
lea mred_short(%rip), %rax
mov (-8)(%rax,%rbp,8), %rbp
add %rbp, %rax
call *%rax
jmp .Lquitgas_96
.Ltest_8N_casegas_96:
test $(7), %rdx
jnz .Lgeneral_casegas_96
call mred_8N_adcox
jmp .Lquitgas_96
.Lgeneral_casegas_96:
call mred_N_adcox
.Lquitgas_96:
pop %r15
pop %r14
pop %r13
pop %r12
pop %rbp
pop %rbx
ret
.Lfe96:
.size cpMontRedAdx_BNU, .Lfe96-(cpMontRedAdx_BNU)
| 28.277961 | 80 | 0.367376 |
0427cc7794ae5c1bf382db38b7321945b452a96d | 104,723 | asm | Assembly | sh.asm | niknikniknik/nunix | 8f4839dd23554441f671c1a010d476a9bd144bac | [
"MIT-0"
] | null | null | null | sh.asm | niknikniknik/nunix | 8f4839dd23554441f671c1a010d476a9bd144bac | [
"MIT-0"
] | null | null | null | sh.asm | niknikniknik/nunix | 8f4839dd23554441f671c1a010d476a9bd144bac | [
"MIT-0"
] | null | null | null |
_sh: file format elf32-i386
Disassembly of section .text:
00000000 <runcmd>:
struct cmd *parsecmd(char*);
// Execute cmd. Never returns.
void
runcmd(struct cmd *cmd)
{
0: 55 push %ebp
1: 89 e5 mov %esp,%ebp
3: 83 ec 28 sub $0x28,%esp
struct execcmd *ecmd;
struct listcmd *lcmd;
struct pipecmd *pcmd;
struct redircmd *rcmd;
if(cmd == 0)
6: 83 7d 08 00 cmpl $0x0,0x8(%ebp)
a: 75 05 jne 11 <runcmd+0x11>
exit();
c: e8 bc 0e 00 00 call ecd <exit>
switch(cmd->type){
11: 8b 45 08 mov 0x8(%ebp),%eax
14: 8b 00 mov (%eax),%eax
16: 83 f8 05 cmp $0x5,%eax
19: 77 09 ja 24 <runcmd+0x24>
1b: 8b 04 85 2c 14 00 00 mov 0x142c(,%eax,4),%eax
22: ff e0 jmp *%eax
default:
panic("runcmd");
24: 83 ec 0c sub $0xc,%esp
27: 68 00 14 00 00 push $0x1400
2c: e8 6b 03 00 00 call 39c <panic>
31: 83 c4 10 add $0x10,%esp
case EXEC:
ecmd = (struct execcmd*)cmd;
34: 8b 45 08 mov 0x8(%ebp),%eax
37: 89 45 f4 mov %eax,-0xc(%ebp)
if(ecmd->argv[0] == 0)
3a: 8b 45 f4 mov -0xc(%ebp),%eax
3d: 8b 40 04 mov 0x4(%eax),%eax
40: 85 c0 test %eax,%eax
42: 75 05 jne 49 <runcmd+0x49>
exit();
44: e8 84 0e 00 00 call ecd <exit>
exec(ecmd->argv[0], ecmd->argv);
49: 8b 45 f4 mov -0xc(%ebp),%eax
4c: 8d 50 04 lea 0x4(%eax),%edx
4f: 8b 45 f4 mov -0xc(%ebp),%eax
52: 8b 40 04 mov 0x4(%eax),%eax
55: 83 ec 08 sub $0x8,%esp
58: 52 push %edx
59: 50 push %eax
5a: e8 a6 0e 00 00 call f05 <exec>
5f: 83 c4 10 add $0x10,%esp
printf(2, "exec %s failed\n", ecmd->argv[0]);
62: 8b 45 f4 mov -0xc(%ebp),%eax
65: 8b 40 04 mov 0x4(%eax),%eax
68: 83 ec 04 sub $0x4,%esp
6b: 50 push %eax
6c: 68 07 14 00 00 push $0x1407
71: 6a 02 push $0x2
73: e8 d2 0f 00 00 call 104a <printf>
78: 83 c4 10 add $0x10,%esp
break;
7b: e9 c8 01 00 00 jmp 248 <runcmd+0x248>
case REDIR:
rcmd = (struct redircmd*)cmd;
80: 8b 45 08 mov 0x8(%ebp),%eax
83: 89 45 f0 mov %eax,-0x10(%ebp)
close(rcmd->fd);
86: 8b 45 f0 mov -0x10(%ebp),%eax
89: 8b 40 14 mov 0x14(%eax),%eax
8c: 83 ec 0c sub $0xc,%esp
8f: 50 push %eax
90: e8 60 0e 00 00 call ef5 <close>
95: 83 c4 10 add $0x10,%esp
if(open(rcmd->file, rcmd->mode) < 0){
98: 8b 45 f0 mov -0x10(%ebp),%eax
9b: 8b 50 10 mov 0x10(%eax),%edx
9e: 8b 45 f0 mov -0x10(%ebp),%eax
a1: 8b 40 08 mov 0x8(%eax),%eax
a4: 83 ec 08 sub $0x8,%esp
a7: 52 push %edx
a8: 50 push %eax
a9: e8 5f 0e 00 00 call f0d <open>
ae: 83 c4 10 add $0x10,%esp
b1: 85 c0 test %eax,%eax
b3: 79 1e jns d3 <runcmd+0xd3>
printf(2, "open %s failed\n", rcmd->file);
b5: 8b 45 f0 mov -0x10(%ebp),%eax
b8: 8b 40 08 mov 0x8(%eax),%eax
bb: 83 ec 04 sub $0x4,%esp
be: 50 push %eax
bf: 68 17 14 00 00 push $0x1417
c4: 6a 02 push $0x2
c6: e8 7f 0f 00 00 call 104a <printf>
cb: 83 c4 10 add $0x10,%esp
exit();
ce: e8 fa 0d 00 00 call ecd <exit>
}
runcmd(rcmd->cmd);
d3: 8b 45 f0 mov -0x10(%ebp),%eax
d6: 8b 40 04 mov 0x4(%eax),%eax
d9: 83 ec 0c sub $0xc,%esp
dc: 50 push %eax
dd: e8 1e ff ff ff call 0 <runcmd>
e2: 83 c4 10 add $0x10,%esp
break;
e5: e9 5e 01 00 00 jmp 248 <runcmd+0x248>
case LIST:
lcmd = (struct listcmd*)cmd;
ea: 8b 45 08 mov 0x8(%ebp),%eax
ed: 89 45 ec mov %eax,-0x14(%ebp)
if(fork1() == 0)
f0: e8 c7 02 00 00 call 3bc <fork1>
f5: 85 c0 test %eax,%eax
f7: 75 12 jne 10b <runcmd+0x10b>
runcmd(lcmd->left);
f9: 8b 45 ec mov -0x14(%ebp),%eax
fc: 8b 40 04 mov 0x4(%eax),%eax
ff: 83 ec 0c sub $0xc,%esp
102: 50 push %eax
103: e8 f8 fe ff ff call 0 <runcmd>
108: 83 c4 10 add $0x10,%esp
wait();
10b: e8 c5 0d 00 00 call ed5 <wait>
runcmd(lcmd->right);
110: 8b 45 ec mov -0x14(%ebp),%eax
113: 8b 40 08 mov 0x8(%eax),%eax
116: 83 ec 0c sub $0xc,%esp
119: 50 push %eax
11a: e8 e1 fe ff ff call 0 <runcmd>
11f: 83 c4 10 add $0x10,%esp
break;
122: e9 21 01 00 00 jmp 248 <runcmd+0x248>
case PIPE:
pcmd = (struct pipecmd*)cmd;
127: 8b 45 08 mov 0x8(%ebp),%eax
12a: 89 45 e8 mov %eax,-0x18(%ebp)
if(pipe(p) < 0)
12d: 83 ec 0c sub $0xc,%esp
130: 8d 45 dc lea -0x24(%ebp),%eax
133: 50 push %eax
134: e8 a4 0d 00 00 call edd <pipe>
139: 83 c4 10 add $0x10,%esp
13c: 85 c0 test %eax,%eax
13e: 79 10 jns 150 <runcmd+0x150>
panic("pipe");
140: 83 ec 0c sub $0xc,%esp
143: 68 27 14 00 00 push $0x1427
148: e8 4f 02 00 00 call 39c <panic>
14d: 83 c4 10 add $0x10,%esp
if(fork1() == 0){
150: e8 67 02 00 00 call 3bc <fork1>
155: 85 c0 test %eax,%eax
157: 75 4c jne 1a5 <runcmd+0x1a5>
close(1);
159: 83 ec 0c sub $0xc,%esp
15c: 6a 01 push $0x1
15e: e8 92 0d 00 00 call ef5 <close>
163: 83 c4 10 add $0x10,%esp
dup(p[1]);
166: 8b 45 e0 mov -0x20(%ebp),%eax
169: 83 ec 0c sub $0xc,%esp
16c: 50 push %eax
16d: e8 d3 0d 00 00 call f45 <dup>
172: 83 c4 10 add $0x10,%esp
close(p[0]);
175: 8b 45 dc mov -0x24(%ebp),%eax
178: 83 ec 0c sub $0xc,%esp
17b: 50 push %eax
17c: e8 74 0d 00 00 call ef5 <close>
181: 83 c4 10 add $0x10,%esp
close(p[1]);
184: 8b 45 e0 mov -0x20(%ebp),%eax
187: 83 ec 0c sub $0xc,%esp
18a: 50 push %eax
18b: e8 65 0d 00 00 call ef5 <close>
190: 83 c4 10 add $0x10,%esp
runcmd(pcmd->left);
193: 8b 45 e8 mov -0x18(%ebp),%eax
196: 8b 40 04 mov 0x4(%eax),%eax
199: 83 ec 0c sub $0xc,%esp
19c: 50 push %eax
19d: e8 5e fe ff ff call 0 <runcmd>
1a2: 83 c4 10 add $0x10,%esp
}
if(fork1() == 0){
1a5: e8 12 02 00 00 call 3bc <fork1>
1aa: 85 c0 test %eax,%eax
1ac: 75 4c jne 1fa <runcmd+0x1fa>
close(0);
1ae: 83 ec 0c sub $0xc,%esp
1b1: 6a 00 push $0x0
1b3: e8 3d 0d 00 00 call ef5 <close>
1b8: 83 c4 10 add $0x10,%esp
dup(p[0]);
1bb: 8b 45 dc mov -0x24(%ebp),%eax
1be: 83 ec 0c sub $0xc,%esp
1c1: 50 push %eax
1c2: e8 7e 0d 00 00 call f45 <dup>
1c7: 83 c4 10 add $0x10,%esp
close(p[0]);
1ca: 8b 45 dc mov -0x24(%ebp),%eax
1cd: 83 ec 0c sub $0xc,%esp
1d0: 50 push %eax
1d1: e8 1f 0d 00 00 call ef5 <close>
1d6: 83 c4 10 add $0x10,%esp
close(p[1]);
1d9: 8b 45 e0 mov -0x20(%ebp),%eax
1dc: 83 ec 0c sub $0xc,%esp
1df: 50 push %eax
1e0: e8 10 0d 00 00 call ef5 <close>
1e5: 83 c4 10 add $0x10,%esp
runcmd(pcmd->right);
1e8: 8b 45 e8 mov -0x18(%ebp),%eax
1eb: 8b 40 08 mov 0x8(%eax),%eax
1ee: 83 ec 0c sub $0xc,%esp
1f1: 50 push %eax
1f2: e8 09 fe ff ff call 0 <runcmd>
1f7: 83 c4 10 add $0x10,%esp
}
close(p[0]);
1fa: 8b 45 dc mov -0x24(%ebp),%eax
1fd: 83 ec 0c sub $0xc,%esp
200: 50 push %eax
201: e8 ef 0c 00 00 call ef5 <close>
206: 83 c4 10 add $0x10,%esp
close(p[1]);
209: 8b 45 e0 mov -0x20(%ebp),%eax
20c: 83 ec 0c sub $0xc,%esp
20f: 50 push %eax
210: e8 e0 0c 00 00 call ef5 <close>
215: 83 c4 10 add $0x10,%esp
wait();
218: e8 b8 0c 00 00 call ed5 <wait>
wait();
21d: e8 b3 0c 00 00 call ed5 <wait>
break;
222: eb 24 jmp 248 <runcmd+0x248>
case BACK:
bcmd = (struct backcmd*)cmd;
224: 8b 45 08 mov 0x8(%ebp),%eax
227: 89 45 e4 mov %eax,-0x1c(%ebp)
if(fork1() == 0)
22a: e8 8d 01 00 00 call 3bc <fork1>
22f: 85 c0 test %eax,%eax
231: 75 14 jne 247 <runcmd+0x247>
runcmd(bcmd->cmd);
233: 8b 45 e4 mov -0x1c(%ebp),%eax
236: 8b 40 04 mov 0x4(%eax),%eax
239: 83 ec 0c sub $0xc,%esp
23c: 50 push %eax
23d: e8 be fd ff ff call 0 <runcmd>
242: 83 c4 10 add $0x10,%esp
break;
245: eb 00 jmp 247 <runcmd+0x247>
247: 90 nop
}
exit();
248: e8 80 0c 00 00 call ecd <exit>
0000024d <getcmd>:
}
int
getcmd(char *buf, int nbuf)
{
24d: 55 push %ebp
24e: 89 e5 mov %esp,%ebp
250: 83 ec 08 sub $0x8,%esp
printf(2, "$ ");
253: 83 ec 08 sub $0x8,%esp
256: 68 44 14 00 00 push $0x1444
25b: 6a 02 push $0x2
25d: e8 e8 0d 00 00 call 104a <printf>
262: 83 c4 10 add $0x10,%esp
memset(buf, 0, nbuf);
265: 8b 45 0c mov 0xc(%ebp),%eax
268: 83 ec 04 sub $0x4,%esp
26b: 50 push %eax
26c: 6a 00 push $0x0
26e: ff 75 08 pushl 0x8(%ebp)
271: e8 bd 0a 00 00 call d33 <memset>
276: 83 c4 10 add $0x10,%esp
gets(buf, nbuf);
279: 83 ec 08 sub $0x8,%esp
27c: ff 75 0c pushl 0xc(%ebp)
27f: ff 75 08 pushl 0x8(%ebp)
282: e8 f9 0a 00 00 call d80 <gets>
287: 83 c4 10 add $0x10,%esp
if(buf[0] == 0) // EOF
28a: 8b 45 08 mov 0x8(%ebp),%eax
28d: 0f b6 00 movzbl (%eax),%eax
290: 84 c0 test %al,%al
292: 75 07 jne 29b <getcmd+0x4e>
return -1;
294: b8 ff ff ff ff mov $0xffffffff,%eax
299: eb 05 jmp 2a0 <getcmd+0x53>
return 0;
29b: b8 00 00 00 00 mov $0x0,%eax
}
2a0: c9 leave
2a1: c3 ret
000002a2 <main>:
int
main(void)
{
2a2: 8d 4c 24 04 lea 0x4(%esp),%ecx
2a6: 83 e4 f0 and $0xfffffff0,%esp
2a9: ff 71 fc pushl -0x4(%ecx)
2ac: 55 push %ebp
2ad: 89 e5 mov %esp,%ebp
2af: 51 push %ecx
2b0: 83 ec 14 sub $0x14,%esp
static char buf[100];
int fd;
// Assumes three file descriptors open.
while((fd = open("console", O_RDWR)) >= 0){
2b3: eb 16 jmp 2cb <main+0x29>
if(fd >= 3){
2b5: 83 7d f4 02 cmpl $0x2,-0xc(%ebp)
2b9: 7e 10 jle 2cb <main+0x29>
close(fd);
2bb: 83 ec 0c sub $0xc,%esp
2be: ff 75 f4 pushl -0xc(%ebp)
2c1: e8 2f 0c 00 00 call ef5 <close>
2c6: 83 c4 10 add $0x10,%esp
break;
2c9: eb 1b jmp 2e6 <main+0x44>
{
static char buf[100];
int fd;
// Assumes three file descriptors open.
while((fd = open("console", O_RDWR)) >= 0){
2cb: 83 ec 08 sub $0x8,%esp
2ce: 6a 02 push $0x2
2d0: 68 47 14 00 00 push $0x1447
2d5: e8 33 0c 00 00 call f0d <open>
2da: 83 c4 10 add $0x10,%esp
2dd: 89 45 f4 mov %eax,-0xc(%ebp)
2e0: 83 7d f4 00 cmpl $0x0,-0xc(%ebp)
2e4: 79 cf jns 2b5 <main+0x13>
break;
}
}
// Read and run input commands.
while(getcmd(buf, sizeof(buf)) >= 0){
2e6: e9 92 00 00 00 jmp 37d <main+0xdb>
if(buf[0] == 'c' && buf[1] == 'd' && buf[2] == ' '){
2eb: 0f b6 05 c0 19 00 00 movzbl 0x19c0,%eax
2f2: 3c 63 cmp $0x63,%al
2f4: 75 5d jne 353 <main+0xb1>
2f6: 0f b6 05 c1 19 00 00 movzbl 0x19c1,%eax
2fd: 3c 64 cmp $0x64,%al
2ff: 75 52 jne 353 <main+0xb1>
301: 0f b6 05 c2 19 00 00 movzbl 0x19c2,%eax
308: 3c 20 cmp $0x20,%al
30a: 75 47 jne 353 <main+0xb1>
// Clumsy but will have to do for now.
// Chdir has no effect on the parent if run in the child.
buf[strlen(buf)-1] = 0; // chop \n
30c: 83 ec 0c sub $0xc,%esp
30f: 68 c0 19 00 00 push $0x19c0
314: e8 f3 09 00 00 call d0c <strlen>
319: 83 c4 10 add $0x10,%esp
31c: 83 e8 01 sub $0x1,%eax
31f: c6 80 c0 19 00 00 00 movb $0x0,0x19c0(%eax)
if(chdir(buf+3) < 0)
326: 83 ec 0c sub $0xc,%esp
329: 68 c3 19 00 00 push $0x19c3
32e: e8 0a 0c 00 00 call f3d <chdir>
333: 83 c4 10 add $0x10,%esp
336: 85 c0 test %eax,%eax
338: 79 17 jns 351 <main+0xaf>
printf(2, "cannot cd %s\n", buf+3);
33a: 83 ec 04 sub $0x4,%esp
33d: 68 c3 19 00 00 push $0x19c3
342: 68 4f 14 00 00 push $0x144f
347: 6a 02 push $0x2
349: e8 fc 0c 00 00 call 104a <printf>
34e: 83 c4 10 add $0x10,%esp
continue;
351: eb 2a jmp 37d <main+0xdb>
}
if(fork1() == 0)
353: e8 64 00 00 00 call 3bc <fork1>
358: 85 c0 test %eax,%eax
35a: 75 1c jne 378 <main+0xd6>
runcmd(parsecmd(buf));
35c: 83 ec 0c sub $0xc,%esp
35f: 68 c0 19 00 00 push $0x19c0
364: e8 a7 03 00 00 call 710 <parsecmd>
369: 83 c4 10 add $0x10,%esp
36c: 83 ec 0c sub $0xc,%esp
36f: 50 push %eax
370: e8 8b fc ff ff call 0 <runcmd>
375: 83 c4 10 add $0x10,%esp
wait();
378: e8 58 0b 00 00 call ed5 <wait>
break;
}
}
// Read and run input commands.
while(getcmd(buf, sizeof(buf)) >= 0){
37d: 83 ec 08 sub $0x8,%esp
380: 6a 64 push $0x64
382: 68 c0 19 00 00 push $0x19c0
387: e8 c1 fe ff ff call 24d <getcmd>
38c: 83 c4 10 add $0x10,%esp
38f: 85 c0 test %eax,%eax
391: 0f 89 54 ff ff ff jns 2eb <main+0x49>
}
if(fork1() == 0)
runcmd(parsecmd(buf));
wait();
}
exit();
397: e8 31 0b 00 00 call ecd <exit>
0000039c <panic>:
}
void
panic(char *s)
{
39c: 55 push %ebp
39d: 89 e5 mov %esp,%ebp
39f: 83 ec 08 sub $0x8,%esp
printf(2, "%s\n", s);
3a2: 83 ec 04 sub $0x4,%esp
3a5: ff 75 08 pushl 0x8(%ebp)
3a8: 68 5d 14 00 00 push $0x145d
3ad: 6a 02 push $0x2
3af: e8 96 0c 00 00 call 104a <printf>
3b4: 83 c4 10 add $0x10,%esp
exit();
3b7: e8 11 0b 00 00 call ecd <exit>
000003bc <fork1>:
}
int
fork1(void)
{
3bc: 55 push %ebp
3bd: 89 e5 mov %esp,%ebp
3bf: 83 ec 18 sub $0x18,%esp
int pid;
pid = fork();
3c2: e8 fe 0a 00 00 call ec5 <fork>
3c7: 89 45 f4 mov %eax,-0xc(%ebp)
if(pid == -1)
3ca: 83 7d f4 ff cmpl $0xffffffff,-0xc(%ebp)
3ce: 75 10 jne 3e0 <fork1+0x24>
panic("fork");
3d0: 83 ec 0c sub $0xc,%esp
3d3: 68 61 14 00 00 push $0x1461
3d8: e8 bf ff ff ff call 39c <panic>
3dd: 83 c4 10 add $0x10,%esp
return pid;
3e0: 8b 45 f4 mov -0xc(%ebp),%eax
}
3e3: c9 leave
3e4: c3 ret
000003e5 <execcmd>:
//PAGEBREAK!
// Constructors
struct cmd*
execcmd(void)
{
3e5: 55 push %ebp
3e6: 89 e5 mov %esp,%ebp
3e8: 83 ec 18 sub $0x18,%esp
struct execcmd *cmd;
cmd = malloc(sizeof(*cmd));
3eb: 83 ec 0c sub $0xc,%esp
3ee: 6a 54 push $0x54
3f0: e8 26 0f 00 00 call 131b <malloc>
3f5: 83 c4 10 add $0x10,%esp
3f8: 89 45 f4 mov %eax,-0xc(%ebp)
memset(cmd, 0, sizeof(*cmd));
3fb: 83 ec 04 sub $0x4,%esp
3fe: 6a 54 push $0x54
400: 6a 00 push $0x0
402: ff 75 f4 pushl -0xc(%ebp)
405: e8 29 09 00 00 call d33 <memset>
40a: 83 c4 10 add $0x10,%esp
cmd->type = EXEC;
40d: 8b 45 f4 mov -0xc(%ebp),%eax
410: c7 00 01 00 00 00 movl $0x1,(%eax)
return (struct cmd*)cmd;
416: 8b 45 f4 mov -0xc(%ebp),%eax
}
419: c9 leave
41a: c3 ret
0000041b <redircmd>:
struct cmd*
redircmd(struct cmd *subcmd, char *file, char *efile, int mode, int fd)
{
41b: 55 push %ebp
41c: 89 e5 mov %esp,%ebp
41e: 83 ec 18 sub $0x18,%esp
struct redircmd *cmd;
cmd = malloc(sizeof(*cmd));
421: 83 ec 0c sub $0xc,%esp
424: 6a 18 push $0x18
426: e8 f0 0e 00 00 call 131b <malloc>
42b: 83 c4 10 add $0x10,%esp
42e: 89 45 f4 mov %eax,-0xc(%ebp)
memset(cmd, 0, sizeof(*cmd));
431: 83 ec 04 sub $0x4,%esp
434: 6a 18 push $0x18
436: 6a 00 push $0x0
438: ff 75 f4 pushl -0xc(%ebp)
43b: e8 f3 08 00 00 call d33 <memset>
440: 83 c4 10 add $0x10,%esp
cmd->type = REDIR;
443: 8b 45 f4 mov -0xc(%ebp),%eax
446: c7 00 02 00 00 00 movl $0x2,(%eax)
cmd->cmd = subcmd;
44c: 8b 45 f4 mov -0xc(%ebp),%eax
44f: 8b 55 08 mov 0x8(%ebp),%edx
452: 89 50 04 mov %edx,0x4(%eax)
cmd->file = file;
455: 8b 45 f4 mov -0xc(%ebp),%eax
458: 8b 55 0c mov 0xc(%ebp),%edx
45b: 89 50 08 mov %edx,0x8(%eax)
cmd->efile = efile;
45e: 8b 45 f4 mov -0xc(%ebp),%eax
461: 8b 55 10 mov 0x10(%ebp),%edx
464: 89 50 0c mov %edx,0xc(%eax)
cmd->mode = mode;
467: 8b 45 f4 mov -0xc(%ebp),%eax
46a: 8b 55 14 mov 0x14(%ebp),%edx
46d: 89 50 10 mov %edx,0x10(%eax)
cmd->fd = fd;
470: 8b 45 f4 mov -0xc(%ebp),%eax
473: 8b 55 18 mov 0x18(%ebp),%edx
476: 89 50 14 mov %edx,0x14(%eax)
return (struct cmd*)cmd;
479: 8b 45 f4 mov -0xc(%ebp),%eax
}
47c: c9 leave
47d: c3 ret
0000047e <pipecmd>:
struct cmd*
pipecmd(struct cmd *left, struct cmd *right)
{
47e: 55 push %ebp
47f: 89 e5 mov %esp,%ebp
481: 83 ec 18 sub $0x18,%esp
struct pipecmd *cmd;
cmd = malloc(sizeof(*cmd));
484: 83 ec 0c sub $0xc,%esp
487: 6a 0c push $0xc
489: e8 8d 0e 00 00 call 131b <malloc>
48e: 83 c4 10 add $0x10,%esp
491: 89 45 f4 mov %eax,-0xc(%ebp)
memset(cmd, 0, sizeof(*cmd));
494: 83 ec 04 sub $0x4,%esp
497: 6a 0c push $0xc
499: 6a 00 push $0x0
49b: ff 75 f4 pushl -0xc(%ebp)
49e: e8 90 08 00 00 call d33 <memset>
4a3: 83 c4 10 add $0x10,%esp
cmd->type = PIPE;
4a6: 8b 45 f4 mov -0xc(%ebp),%eax
4a9: c7 00 03 00 00 00 movl $0x3,(%eax)
cmd->left = left;
4af: 8b 45 f4 mov -0xc(%ebp),%eax
4b2: 8b 55 08 mov 0x8(%ebp),%edx
4b5: 89 50 04 mov %edx,0x4(%eax)
cmd->right = right;
4b8: 8b 45 f4 mov -0xc(%ebp),%eax
4bb: 8b 55 0c mov 0xc(%ebp),%edx
4be: 89 50 08 mov %edx,0x8(%eax)
return (struct cmd*)cmd;
4c1: 8b 45 f4 mov -0xc(%ebp),%eax
}
4c4: c9 leave
4c5: c3 ret
000004c6 <listcmd>:
struct cmd*
listcmd(struct cmd *left, struct cmd *right)
{
4c6: 55 push %ebp
4c7: 89 e5 mov %esp,%ebp
4c9: 83 ec 18 sub $0x18,%esp
struct listcmd *cmd;
cmd = malloc(sizeof(*cmd));
4cc: 83 ec 0c sub $0xc,%esp
4cf: 6a 0c push $0xc
4d1: e8 45 0e 00 00 call 131b <malloc>
4d6: 83 c4 10 add $0x10,%esp
4d9: 89 45 f4 mov %eax,-0xc(%ebp)
memset(cmd, 0, sizeof(*cmd));
4dc: 83 ec 04 sub $0x4,%esp
4df: 6a 0c push $0xc
4e1: 6a 00 push $0x0
4e3: ff 75 f4 pushl -0xc(%ebp)
4e6: e8 48 08 00 00 call d33 <memset>
4eb: 83 c4 10 add $0x10,%esp
cmd->type = LIST;
4ee: 8b 45 f4 mov -0xc(%ebp),%eax
4f1: c7 00 04 00 00 00 movl $0x4,(%eax)
cmd->left = left;
4f7: 8b 45 f4 mov -0xc(%ebp),%eax
4fa: 8b 55 08 mov 0x8(%ebp),%edx
4fd: 89 50 04 mov %edx,0x4(%eax)
cmd->right = right;
500: 8b 45 f4 mov -0xc(%ebp),%eax
503: 8b 55 0c mov 0xc(%ebp),%edx
506: 89 50 08 mov %edx,0x8(%eax)
return (struct cmd*)cmd;
509: 8b 45 f4 mov -0xc(%ebp),%eax
}
50c: c9 leave
50d: c3 ret
0000050e <backcmd>:
struct cmd*
backcmd(struct cmd *subcmd)
{
50e: 55 push %ebp
50f: 89 e5 mov %esp,%ebp
511: 83 ec 18 sub $0x18,%esp
struct backcmd *cmd;
cmd = malloc(sizeof(*cmd));
514: 83 ec 0c sub $0xc,%esp
517: 6a 08 push $0x8
519: e8 fd 0d 00 00 call 131b <malloc>
51e: 83 c4 10 add $0x10,%esp
521: 89 45 f4 mov %eax,-0xc(%ebp)
memset(cmd, 0, sizeof(*cmd));
524: 83 ec 04 sub $0x4,%esp
527: 6a 08 push $0x8
529: 6a 00 push $0x0
52b: ff 75 f4 pushl -0xc(%ebp)
52e: e8 00 08 00 00 call d33 <memset>
533: 83 c4 10 add $0x10,%esp
cmd->type = BACK;
536: 8b 45 f4 mov -0xc(%ebp),%eax
539: c7 00 05 00 00 00 movl $0x5,(%eax)
cmd->cmd = subcmd;
53f: 8b 45 f4 mov -0xc(%ebp),%eax
542: 8b 55 08 mov 0x8(%ebp),%edx
545: 89 50 04 mov %edx,0x4(%eax)
return (struct cmd*)cmd;
548: 8b 45 f4 mov -0xc(%ebp),%eax
}
54b: c9 leave
54c: c3 ret
0000054d <gettoken>:
char whitespace[] = " \t\r\n\v";
char symbols[] = "<|>&;()";
int
gettoken(char **ps, char *es, char **q, char **eq)
{
54d: 55 push %ebp
54e: 89 e5 mov %esp,%ebp
550: 83 ec 18 sub $0x18,%esp
char *s;
int ret;
s = *ps;
553: 8b 45 08 mov 0x8(%ebp),%eax
556: 8b 00 mov (%eax),%eax
558: 89 45 f4 mov %eax,-0xc(%ebp)
while(s < es && strchr(whitespace, *s))
55b: eb 04 jmp 561 <gettoken+0x14>
s++;
55d: 83 45 f4 01 addl $0x1,-0xc(%ebp)
{
char *s;
int ret;
s = *ps;
while(s < es && strchr(whitespace, *s))
561: 8b 45 f4 mov -0xc(%ebp),%eax
564: 3b 45 0c cmp 0xc(%ebp),%eax
567: 73 1e jae 587 <gettoken+0x3a>
569: 8b 45 f4 mov -0xc(%ebp),%eax
56c: 0f b6 00 movzbl (%eax),%eax
56f: 0f be c0 movsbl %al,%eax
572: 83 ec 08 sub $0x8,%esp
575: 50 push %eax
576: 68 7c 19 00 00 push $0x197c
57b: e8 cd 07 00 00 call d4d <strchr>
580: 83 c4 10 add $0x10,%esp
583: 85 c0 test %eax,%eax
585: 75 d6 jne 55d <gettoken+0x10>
s++;
if(q)
587: 83 7d 10 00 cmpl $0x0,0x10(%ebp)
58b: 74 08 je 595 <gettoken+0x48>
*q = s;
58d: 8b 45 10 mov 0x10(%ebp),%eax
590: 8b 55 f4 mov -0xc(%ebp),%edx
593: 89 10 mov %edx,(%eax)
ret = *s;
595: 8b 45 f4 mov -0xc(%ebp),%eax
598: 0f b6 00 movzbl (%eax),%eax
59b: 0f be c0 movsbl %al,%eax
59e: 89 45 f0 mov %eax,-0x10(%ebp)
switch(*s){
5a1: 8b 45 f4 mov -0xc(%ebp),%eax
5a4: 0f b6 00 movzbl (%eax),%eax
5a7: 0f be c0 movsbl %al,%eax
5aa: 83 f8 29 cmp $0x29,%eax
5ad: 7f 14 jg 5c3 <gettoken+0x76>
5af: 83 f8 28 cmp $0x28,%eax
5b2: 7d 28 jge 5dc <gettoken+0x8f>
5b4: 85 c0 test %eax,%eax
5b6: 0f 84 96 00 00 00 je 652 <gettoken+0x105>
5bc: 83 f8 26 cmp $0x26,%eax
5bf: 74 1b je 5dc <gettoken+0x8f>
5c1: eb 3c jmp 5ff <gettoken+0xb2>
5c3: 83 f8 3e cmp $0x3e,%eax
5c6: 74 1a je 5e2 <gettoken+0x95>
5c8: 83 f8 3e cmp $0x3e,%eax
5cb: 7f 0a jg 5d7 <gettoken+0x8a>
5cd: 83 e8 3b sub $0x3b,%eax
5d0: 83 f8 01 cmp $0x1,%eax
5d3: 77 2a ja 5ff <gettoken+0xb2>
5d5: eb 05 jmp 5dc <gettoken+0x8f>
5d7: 83 f8 7c cmp $0x7c,%eax
5da: 75 23 jne 5ff <gettoken+0xb2>
case '(':
case ')':
case ';':
case '&':
case '<':
s++;
5dc: 83 45 f4 01 addl $0x1,-0xc(%ebp)
break;
5e0: eb 71 jmp 653 <gettoken+0x106>
case '>':
s++;
5e2: 83 45 f4 01 addl $0x1,-0xc(%ebp)
if(*s == '>'){
5e6: 8b 45 f4 mov -0xc(%ebp),%eax
5e9: 0f b6 00 movzbl (%eax),%eax
5ec: 3c 3e cmp $0x3e,%al
5ee: 75 0d jne 5fd <gettoken+0xb0>
ret = '+';
5f0: c7 45 f0 2b 00 00 00 movl $0x2b,-0x10(%ebp)
s++;
5f7: 83 45 f4 01 addl $0x1,-0xc(%ebp)
}
break;
5fb: eb 56 jmp 653 <gettoken+0x106>
5fd: eb 54 jmp 653 <gettoken+0x106>
default:
ret = 'a';
5ff: c7 45 f0 61 00 00 00 movl $0x61,-0x10(%ebp)
while(s < es && !strchr(whitespace, *s) && !strchr(symbols, *s))
606: eb 04 jmp 60c <gettoken+0xbf>
s++;
608: 83 45 f4 01 addl $0x1,-0xc(%ebp)
s++;
}
break;
default:
ret = 'a';
while(s < es && !strchr(whitespace, *s) && !strchr(symbols, *s))
60c: 8b 45 f4 mov -0xc(%ebp),%eax
60f: 3b 45 0c cmp 0xc(%ebp),%eax
612: 73 3c jae 650 <gettoken+0x103>
614: 8b 45 f4 mov -0xc(%ebp),%eax
617: 0f b6 00 movzbl (%eax),%eax
61a: 0f be c0 movsbl %al,%eax
61d: 83 ec 08 sub $0x8,%esp
620: 50 push %eax
621: 68 7c 19 00 00 push $0x197c
626: e8 22 07 00 00 call d4d <strchr>
62b: 83 c4 10 add $0x10,%esp
62e: 85 c0 test %eax,%eax
630: 75 1e jne 650 <gettoken+0x103>
632: 8b 45 f4 mov -0xc(%ebp),%eax
635: 0f b6 00 movzbl (%eax),%eax
638: 0f be c0 movsbl %al,%eax
63b: 83 ec 08 sub $0x8,%esp
63e: 50 push %eax
63f: 68 82 19 00 00 push $0x1982
644: e8 04 07 00 00 call d4d <strchr>
649: 83 c4 10 add $0x10,%esp
64c: 85 c0 test %eax,%eax
64e: 74 b8 je 608 <gettoken+0xbb>
s++;
break;
650: eb 01 jmp 653 <gettoken+0x106>
if(q)
*q = s;
ret = *s;
switch(*s){
case 0:
break;
652: 90 nop
ret = 'a';
while(s < es && !strchr(whitespace, *s) && !strchr(symbols, *s))
s++;
break;
}
if(eq)
653: 83 7d 14 00 cmpl $0x0,0x14(%ebp)
657: 74 08 je 661 <gettoken+0x114>
*eq = s;
659: 8b 45 14 mov 0x14(%ebp),%eax
65c: 8b 55 f4 mov -0xc(%ebp),%edx
65f: 89 10 mov %edx,(%eax)
while(s < es && strchr(whitespace, *s))
661: eb 04 jmp 667 <gettoken+0x11a>
s++;
663: 83 45 f4 01 addl $0x1,-0xc(%ebp)
break;
}
if(eq)
*eq = s;
while(s < es && strchr(whitespace, *s))
667: 8b 45 f4 mov -0xc(%ebp),%eax
66a: 3b 45 0c cmp 0xc(%ebp),%eax
66d: 73 1e jae 68d <gettoken+0x140>
66f: 8b 45 f4 mov -0xc(%ebp),%eax
672: 0f b6 00 movzbl (%eax),%eax
675: 0f be c0 movsbl %al,%eax
678: 83 ec 08 sub $0x8,%esp
67b: 50 push %eax
67c: 68 7c 19 00 00 push $0x197c
681: e8 c7 06 00 00 call d4d <strchr>
686: 83 c4 10 add $0x10,%esp
689: 85 c0 test %eax,%eax
68b: 75 d6 jne 663 <gettoken+0x116>
s++;
*ps = s;
68d: 8b 45 08 mov 0x8(%ebp),%eax
690: 8b 55 f4 mov -0xc(%ebp),%edx
693: 89 10 mov %edx,(%eax)
return ret;
695: 8b 45 f0 mov -0x10(%ebp),%eax
}
698: c9 leave
699: c3 ret
0000069a <peek>:
int
peek(char **ps, char *es, char *toks)
{
69a: 55 push %ebp
69b: 89 e5 mov %esp,%ebp
69d: 83 ec 18 sub $0x18,%esp
char *s;
s = *ps;
6a0: 8b 45 08 mov 0x8(%ebp),%eax
6a3: 8b 00 mov (%eax),%eax
6a5: 89 45 f4 mov %eax,-0xc(%ebp)
while(s < es && strchr(whitespace, *s))
6a8: eb 04 jmp 6ae <peek+0x14>
s++;
6aa: 83 45 f4 01 addl $0x1,-0xc(%ebp)
peek(char **ps, char *es, char *toks)
{
char *s;
s = *ps;
while(s < es && strchr(whitespace, *s))
6ae: 8b 45 f4 mov -0xc(%ebp),%eax
6b1: 3b 45 0c cmp 0xc(%ebp),%eax
6b4: 73 1e jae 6d4 <peek+0x3a>
6b6: 8b 45 f4 mov -0xc(%ebp),%eax
6b9: 0f b6 00 movzbl (%eax),%eax
6bc: 0f be c0 movsbl %al,%eax
6bf: 83 ec 08 sub $0x8,%esp
6c2: 50 push %eax
6c3: 68 7c 19 00 00 push $0x197c
6c8: e8 80 06 00 00 call d4d <strchr>
6cd: 83 c4 10 add $0x10,%esp
6d0: 85 c0 test %eax,%eax
6d2: 75 d6 jne 6aa <peek+0x10>
s++;
*ps = s;
6d4: 8b 45 08 mov 0x8(%ebp),%eax
6d7: 8b 55 f4 mov -0xc(%ebp),%edx
6da: 89 10 mov %edx,(%eax)
return *s && strchr(toks, *s);
6dc: 8b 45 f4 mov -0xc(%ebp),%eax
6df: 0f b6 00 movzbl (%eax),%eax
6e2: 84 c0 test %al,%al
6e4: 74 23 je 709 <peek+0x6f>
6e6: 8b 45 f4 mov -0xc(%ebp),%eax
6e9: 0f b6 00 movzbl (%eax),%eax
6ec: 0f be c0 movsbl %al,%eax
6ef: 83 ec 08 sub $0x8,%esp
6f2: 50 push %eax
6f3: ff 75 10 pushl 0x10(%ebp)
6f6: e8 52 06 00 00 call d4d <strchr>
6fb: 83 c4 10 add $0x10,%esp
6fe: 85 c0 test %eax,%eax
700: 74 07 je 709 <peek+0x6f>
702: b8 01 00 00 00 mov $0x1,%eax
707: eb 05 jmp 70e <peek+0x74>
709: b8 00 00 00 00 mov $0x0,%eax
}
70e: c9 leave
70f: c3 ret
00000710 <parsecmd>:
struct cmd *parseexec(char**, char*);
struct cmd *nulterminate(struct cmd*);
struct cmd*
parsecmd(char *s)
{
710: 55 push %ebp
711: 89 e5 mov %esp,%ebp
713: 53 push %ebx
714: 83 ec 14 sub $0x14,%esp
char *es;
struct cmd *cmd;
es = s + strlen(s);
717: 8b 5d 08 mov 0x8(%ebp),%ebx
71a: 8b 45 08 mov 0x8(%ebp),%eax
71d: 83 ec 0c sub $0xc,%esp
720: 50 push %eax
721: e8 e6 05 00 00 call d0c <strlen>
726: 83 c4 10 add $0x10,%esp
729: 01 d8 add %ebx,%eax
72b: 89 45 f4 mov %eax,-0xc(%ebp)
cmd = parseline(&s, es);
72e: 83 ec 08 sub $0x8,%esp
731: ff 75 f4 pushl -0xc(%ebp)
734: 8d 45 08 lea 0x8(%ebp),%eax
737: 50 push %eax
738: e8 61 00 00 00 call 79e <parseline>
73d: 83 c4 10 add $0x10,%esp
740: 89 45 f0 mov %eax,-0x10(%ebp)
peek(&s, es, "");
743: 83 ec 04 sub $0x4,%esp
746: 68 66 14 00 00 push $0x1466
74b: ff 75 f4 pushl -0xc(%ebp)
74e: 8d 45 08 lea 0x8(%ebp),%eax
751: 50 push %eax
752: e8 43 ff ff ff call 69a <peek>
757: 83 c4 10 add $0x10,%esp
if(s != es){
75a: 8b 45 08 mov 0x8(%ebp),%eax
75d: 3b 45 f4 cmp -0xc(%ebp),%eax
760: 74 26 je 788 <parsecmd+0x78>
printf(2, "leftovers: %s\n", s);
762: 8b 45 08 mov 0x8(%ebp),%eax
765: 83 ec 04 sub $0x4,%esp
768: 50 push %eax
769: 68 67 14 00 00 push $0x1467
76e: 6a 02 push $0x2
770: e8 d5 08 00 00 call 104a <printf>
775: 83 c4 10 add $0x10,%esp
panic("syntax");
778: 83 ec 0c sub $0xc,%esp
77b: 68 76 14 00 00 push $0x1476
780: e8 17 fc ff ff call 39c <panic>
785: 83 c4 10 add $0x10,%esp
}
nulterminate(cmd);
788: 83 ec 0c sub $0xc,%esp
78b: ff 75 f0 pushl -0x10(%ebp)
78e: e8 e9 03 00 00 call b7c <nulterminate>
793: 83 c4 10 add $0x10,%esp
return cmd;
796: 8b 45 f0 mov -0x10(%ebp),%eax
}
799: 8b 5d fc mov -0x4(%ebp),%ebx
79c: c9 leave
79d: c3 ret
0000079e <parseline>:
struct cmd*
parseline(char **ps, char *es)
{
79e: 55 push %ebp
79f: 89 e5 mov %esp,%ebp
7a1: 83 ec 18 sub $0x18,%esp
struct cmd *cmd;
cmd = parsepipe(ps, es);
7a4: 83 ec 08 sub $0x8,%esp
7a7: ff 75 0c pushl 0xc(%ebp)
7aa: ff 75 08 pushl 0x8(%ebp)
7ad: e8 99 00 00 00 call 84b <parsepipe>
7b2: 83 c4 10 add $0x10,%esp
7b5: 89 45 f4 mov %eax,-0xc(%ebp)
while(peek(ps, es, "&")){
7b8: eb 23 jmp 7dd <parseline+0x3f>
gettoken(ps, es, 0, 0);
7ba: 6a 00 push $0x0
7bc: 6a 00 push $0x0
7be: ff 75 0c pushl 0xc(%ebp)
7c1: ff 75 08 pushl 0x8(%ebp)
7c4: e8 84 fd ff ff call 54d <gettoken>
7c9: 83 c4 10 add $0x10,%esp
cmd = backcmd(cmd);
7cc: 83 ec 0c sub $0xc,%esp
7cf: ff 75 f4 pushl -0xc(%ebp)
7d2: e8 37 fd ff ff call 50e <backcmd>
7d7: 83 c4 10 add $0x10,%esp
7da: 89 45 f4 mov %eax,-0xc(%ebp)
parseline(char **ps, char *es)
{
struct cmd *cmd;
cmd = parsepipe(ps, es);
while(peek(ps, es, "&")){
7dd: 83 ec 04 sub $0x4,%esp
7e0: 68 7d 14 00 00 push $0x147d
7e5: ff 75 0c pushl 0xc(%ebp)
7e8: ff 75 08 pushl 0x8(%ebp)
7eb: e8 aa fe ff ff call 69a <peek>
7f0: 83 c4 10 add $0x10,%esp
7f3: 85 c0 test %eax,%eax
7f5: 75 c3 jne 7ba <parseline+0x1c>
gettoken(ps, es, 0, 0);
cmd = backcmd(cmd);
}
if(peek(ps, es, ";")){
7f7: 83 ec 04 sub $0x4,%esp
7fa: 68 7f 14 00 00 push $0x147f
7ff: ff 75 0c pushl 0xc(%ebp)
802: ff 75 08 pushl 0x8(%ebp)
805: e8 90 fe ff ff call 69a <peek>
80a: 83 c4 10 add $0x10,%esp
80d: 85 c0 test %eax,%eax
80f: 74 35 je 846 <parseline+0xa8>
gettoken(ps, es, 0, 0);
811: 6a 00 push $0x0
813: 6a 00 push $0x0
815: ff 75 0c pushl 0xc(%ebp)
818: ff 75 08 pushl 0x8(%ebp)
81b: e8 2d fd ff ff call 54d <gettoken>
820: 83 c4 10 add $0x10,%esp
cmd = listcmd(cmd, parseline(ps, es));
823: 83 ec 08 sub $0x8,%esp
826: ff 75 0c pushl 0xc(%ebp)
829: ff 75 08 pushl 0x8(%ebp)
82c: e8 6d ff ff ff call 79e <parseline>
831: 83 c4 10 add $0x10,%esp
834: 83 ec 08 sub $0x8,%esp
837: 50 push %eax
838: ff 75 f4 pushl -0xc(%ebp)
83b: e8 86 fc ff ff call 4c6 <listcmd>
840: 83 c4 10 add $0x10,%esp
843: 89 45 f4 mov %eax,-0xc(%ebp)
}
return cmd;
846: 8b 45 f4 mov -0xc(%ebp),%eax
}
849: c9 leave
84a: c3 ret
0000084b <parsepipe>:
struct cmd*
parsepipe(char **ps, char *es)
{
84b: 55 push %ebp
84c: 89 e5 mov %esp,%ebp
84e: 83 ec 18 sub $0x18,%esp
struct cmd *cmd;
cmd = parseexec(ps, es);
851: 83 ec 08 sub $0x8,%esp
854: ff 75 0c pushl 0xc(%ebp)
857: ff 75 08 pushl 0x8(%ebp)
85a: e8 ec 01 00 00 call a4b <parseexec>
85f: 83 c4 10 add $0x10,%esp
862: 89 45 f4 mov %eax,-0xc(%ebp)
if(peek(ps, es, "|")){
865: 83 ec 04 sub $0x4,%esp
868: 68 81 14 00 00 push $0x1481
86d: ff 75 0c pushl 0xc(%ebp)
870: ff 75 08 pushl 0x8(%ebp)
873: e8 22 fe ff ff call 69a <peek>
878: 83 c4 10 add $0x10,%esp
87b: 85 c0 test %eax,%eax
87d: 74 35 je 8b4 <parsepipe+0x69>
gettoken(ps, es, 0, 0);
87f: 6a 00 push $0x0
881: 6a 00 push $0x0
883: ff 75 0c pushl 0xc(%ebp)
886: ff 75 08 pushl 0x8(%ebp)
889: e8 bf fc ff ff call 54d <gettoken>
88e: 83 c4 10 add $0x10,%esp
cmd = pipecmd(cmd, parsepipe(ps, es));
891: 83 ec 08 sub $0x8,%esp
894: ff 75 0c pushl 0xc(%ebp)
897: ff 75 08 pushl 0x8(%ebp)
89a: e8 ac ff ff ff call 84b <parsepipe>
89f: 83 c4 10 add $0x10,%esp
8a2: 83 ec 08 sub $0x8,%esp
8a5: 50 push %eax
8a6: ff 75 f4 pushl -0xc(%ebp)
8a9: e8 d0 fb ff ff call 47e <pipecmd>
8ae: 83 c4 10 add $0x10,%esp
8b1: 89 45 f4 mov %eax,-0xc(%ebp)
}
return cmd;
8b4: 8b 45 f4 mov -0xc(%ebp),%eax
}
8b7: c9 leave
8b8: c3 ret
000008b9 <parseredirs>:
struct cmd*
parseredirs(struct cmd *cmd, char **ps, char *es)
{
8b9: 55 push %ebp
8ba: 89 e5 mov %esp,%ebp
8bc: 83 ec 18 sub $0x18,%esp
int tok;
char *q, *eq;
while(peek(ps, es, "<>")){
8bf: e9 b6 00 00 00 jmp 97a <parseredirs+0xc1>
tok = gettoken(ps, es, 0, 0);
8c4: 6a 00 push $0x0
8c6: 6a 00 push $0x0
8c8: ff 75 10 pushl 0x10(%ebp)
8cb: ff 75 0c pushl 0xc(%ebp)
8ce: e8 7a fc ff ff call 54d <gettoken>
8d3: 83 c4 10 add $0x10,%esp
8d6: 89 45 f4 mov %eax,-0xc(%ebp)
if(gettoken(ps, es, &q, &eq) != 'a')
8d9: 8d 45 ec lea -0x14(%ebp),%eax
8dc: 50 push %eax
8dd: 8d 45 f0 lea -0x10(%ebp),%eax
8e0: 50 push %eax
8e1: ff 75 10 pushl 0x10(%ebp)
8e4: ff 75 0c pushl 0xc(%ebp)
8e7: e8 61 fc ff ff call 54d <gettoken>
8ec: 83 c4 10 add $0x10,%esp
8ef: 83 f8 61 cmp $0x61,%eax
8f2: 74 10 je 904 <parseredirs+0x4b>
panic("missing file for redirection");
8f4: 83 ec 0c sub $0xc,%esp
8f7: 68 83 14 00 00 push $0x1483
8fc: e8 9b fa ff ff call 39c <panic>
901: 83 c4 10 add $0x10,%esp
switch(tok){
904: 8b 45 f4 mov -0xc(%ebp),%eax
907: 83 f8 3c cmp $0x3c,%eax
90a: 74 0c je 918 <parseredirs+0x5f>
90c: 83 f8 3e cmp $0x3e,%eax
90f: 74 26 je 937 <parseredirs+0x7e>
911: 83 f8 2b cmp $0x2b,%eax
914: 74 43 je 959 <parseredirs+0xa0>
916: eb 62 jmp 97a <parseredirs+0xc1>
case '<':
cmd = redircmd(cmd, q, eq, O_RDONLY, 0);
918: 8b 55 ec mov -0x14(%ebp),%edx
91b: 8b 45 f0 mov -0x10(%ebp),%eax
91e: 83 ec 0c sub $0xc,%esp
921: 6a 00 push $0x0
923: 6a 00 push $0x0
925: 52 push %edx
926: 50 push %eax
927: ff 75 08 pushl 0x8(%ebp)
92a: e8 ec fa ff ff call 41b <redircmd>
92f: 83 c4 20 add $0x20,%esp
932: 89 45 08 mov %eax,0x8(%ebp)
break;
935: eb 43 jmp 97a <parseredirs+0xc1>
case '>':
cmd = redircmd(cmd, q, eq, O_WRONLY|O_CREATE, 1);
937: 8b 55 ec mov -0x14(%ebp),%edx
93a: 8b 45 f0 mov -0x10(%ebp),%eax
93d: 83 ec 0c sub $0xc,%esp
940: 6a 01 push $0x1
942: 68 01 02 00 00 push $0x201
947: 52 push %edx
948: 50 push %eax
949: ff 75 08 pushl 0x8(%ebp)
94c: e8 ca fa ff ff call 41b <redircmd>
951: 83 c4 20 add $0x20,%esp
954: 89 45 08 mov %eax,0x8(%ebp)
break;
957: eb 21 jmp 97a <parseredirs+0xc1>
case '+': // >>
cmd = redircmd(cmd, q, eq, O_WRONLY|O_CREATE, 1);
959: 8b 55 ec mov -0x14(%ebp),%edx
95c: 8b 45 f0 mov -0x10(%ebp),%eax
95f: 83 ec 0c sub $0xc,%esp
962: 6a 01 push $0x1
964: 68 01 02 00 00 push $0x201
969: 52 push %edx
96a: 50 push %eax
96b: ff 75 08 pushl 0x8(%ebp)
96e: e8 a8 fa ff ff call 41b <redircmd>
973: 83 c4 20 add $0x20,%esp
976: 89 45 08 mov %eax,0x8(%ebp)
break;
979: 90 nop
parseredirs(struct cmd *cmd, char **ps, char *es)
{
int tok;
char *q, *eq;
while(peek(ps, es, "<>")){
97a: 83 ec 04 sub $0x4,%esp
97d: 68 a0 14 00 00 push $0x14a0
982: ff 75 10 pushl 0x10(%ebp)
985: ff 75 0c pushl 0xc(%ebp)
988: e8 0d fd ff ff call 69a <peek>
98d: 83 c4 10 add $0x10,%esp
990: 85 c0 test %eax,%eax
992: 0f 85 2c ff ff ff jne 8c4 <parseredirs+0xb>
case '+': // >>
cmd = redircmd(cmd, q, eq, O_WRONLY|O_CREATE, 1);
break;
}
}
return cmd;
998: 8b 45 08 mov 0x8(%ebp),%eax
}
99b: c9 leave
99c: c3 ret
0000099d <parseblock>:
struct cmd*
parseblock(char **ps, char *es)
{
99d: 55 push %ebp
99e: 89 e5 mov %esp,%ebp
9a0: 83 ec 18 sub $0x18,%esp
struct cmd *cmd;
if(!peek(ps, es, "("))
9a3: 83 ec 04 sub $0x4,%esp
9a6: 68 a3 14 00 00 push $0x14a3
9ab: ff 75 0c pushl 0xc(%ebp)
9ae: ff 75 08 pushl 0x8(%ebp)
9b1: e8 e4 fc ff ff call 69a <peek>
9b6: 83 c4 10 add $0x10,%esp
9b9: 85 c0 test %eax,%eax
9bb: 75 10 jne 9cd <parseblock+0x30>
panic("parseblock");
9bd: 83 ec 0c sub $0xc,%esp
9c0: 68 a5 14 00 00 push $0x14a5
9c5: e8 d2 f9 ff ff call 39c <panic>
9ca: 83 c4 10 add $0x10,%esp
gettoken(ps, es, 0, 0);
9cd: 6a 00 push $0x0
9cf: 6a 00 push $0x0
9d1: ff 75 0c pushl 0xc(%ebp)
9d4: ff 75 08 pushl 0x8(%ebp)
9d7: e8 71 fb ff ff call 54d <gettoken>
9dc: 83 c4 10 add $0x10,%esp
cmd = parseline(ps, es);
9df: 83 ec 08 sub $0x8,%esp
9e2: ff 75 0c pushl 0xc(%ebp)
9e5: ff 75 08 pushl 0x8(%ebp)
9e8: e8 b1 fd ff ff call 79e <parseline>
9ed: 83 c4 10 add $0x10,%esp
9f0: 89 45 f4 mov %eax,-0xc(%ebp)
if(!peek(ps, es, ")"))
9f3: 83 ec 04 sub $0x4,%esp
9f6: 68 b0 14 00 00 push $0x14b0
9fb: ff 75 0c pushl 0xc(%ebp)
9fe: ff 75 08 pushl 0x8(%ebp)
a01: e8 94 fc ff ff call 69a <peek>
a06: 83 c4 10 add $0x10,%esp
a09: 85 c0 test %eax,%eax
a0b: 75 10 jne a1d <parseblock+0x80>
panic("syntax - missing )");
a0d: 83 ec 0c sub $0xc,%esp
a10: 68 b2 14 00 00 push $0x14b2
a15: e8 82 f9 ff ff call 39c <panic>
a1a: 83 c4 10 add $0x10,%esp
gettoken(ps, es, 0, 0);
a1d: 6a 00 push $0x0
a1f: 6a 00 push $0x0
a21: ff 75 0c pushl 0xc(%ebp)
a24: ff 75 08 pushl 0x8(%ebp)
a27: e8 21 fb ff ff call 54d <gettoken>
a2c: 83 c4 10 add $0x10,%esp
cmd = parseredirs(cmd, ps, es);
a2f: 83 ec 04 sub $0x4,%esp
a32: ff 75 0c pushl 0xc(%ebp)
a35: ff 75 08 pushl 0x8(%ebp)
a38: ff 75 f4 pushl -0xc(%ebp)
a3b: e8 79 fe ff ff call 8b9 <parseredirs>
a40: 83 c4 10 add $0x10,%esp
a43: 89 45 f4 mov %eax,-0xc(%ebp)
return cmd;
a46: 8b 45 f4 mov -0xc(%ebp),%eax
}
a49: c9 leave
a4a: c3 ret
00000a4b <parseexec>:
struct cmd*
parseexec(char **ps, char *es)
{
a4b: 55 push %ebp
a4c: 89 e5 mov %esp,%ebp
a4e: 83 ec 28 sub $0x28,%esp
char *q, *eq;
int tok, argc;
struct execcmd *cmd;
struct cmd *ret;
if(peek(ps, es, "("))
a51: 83 ec 04 sub $0x4,%esp
a54: 68 a3 14 00 00 push $0x14a3
a59: ff 75 0c pushl 0xc(%ebp)
a5c: ff 75 08 pushl 0x8(%ebp)
a5f: e8 36 fc ff ff call 69a <peek>
a64: 83 c4 10 add $0x10,%esp
a67: 85 c0 test %eax,%eax
a69: 74 16 je a81 <parseexec+0x36>
return parseblock(ps, es);
a6b: 83 ec 08 sub $0x8,%esp
a6e: ff 75 0c pushl 0xc(%ebp)
a71: ff 75 08 pushl 0x8(%ebp)
a74: e8 24 ff ff ff call 99d <parseblock>
a79: 83 c4 10 add $0x10,%esp
a7c: e9 f9 00 00 00 jmp b7a <parseexec+0x12f>
ret = execcmd();
a81: e8 5f f9 ff ff call 3e5 <execcmd>
a86: 89 45 f0 mov %eax,-0x10(%ebp)
cmd = (struct execcmd*)ret;
a89: 8b 45 f0 mov -0x10(%ebp),%eax
a8c: 89 45 ec mov %eax,-0x14(%ebp)
argc = 0;
a8f: c7 45 f4 00 00 00 00 movl $0x0,-0xc(%ebp)
ret = parseredirs(ret, ps, es);
a96: 83 ec 04 sub $0x4,%esp
a99: ff 75 0c pushl 0xc(%ebp)
a9c: ff 75 08 pushl 0x8(%ebp)
a9f: ff 75 f0 pushl -0x10(%ebp)
aa2: e8 12 fe ff ff call 8b9 <parseredirs>
aa7: 83 c4 10 add $0x10,%esp
aaa: 89 45 f0 mov %eax,-0x10(%ebp)
while(!peek(ps, es, "|)&;")){
aad: e9 88 00 00 00 jmp b3a <parseexec+0xef>
if((tok=gettoken(ps, es, &q, &eq)) == 0)
ab2: 8d 45 e0 lea -0x20(%ebp),%eax
ab5: 50 push %eax
ab6: 8d 45 e4 lea -0x1c(%ebp),%eax
ab9: 50 push %eax
aba: ff 75 0c pushl 0xc(%ebp)
abd: ff 75 08 pushl 0x8(%ebp)
ac0: e8 88 fa ff ff call 54d <gettoken>
ac5: 83 c4 10 add $0x10,%esp
ac8: 89 45 e8 mov %eax,-0x18(%ebp)
acb: 83 7d e8 00 cmpl $0x0,-0x18(%ebp)
acf: 75 05 jne ad6 <parseexec+0x8b>
break;
ad1: e9 82 00 00 00 jmp b58 <parseexec+0x10d>
if(tok != 'a')
ad6: 83 7d e8 61 cmpl $0x61,-0x18(%ebp)
ada: 74 10 je aec <parseexec+0xa1>
panic("syntax");
adc: 83 ec 0c sub $0xc,%esp
adf: 68 76 14 00 00 push $0x1476
ae4: e8 b3 f8 ff ff call 39c <panic>
ae9: 83 c4 10 add $0x10,%esp
cmd->argv[argc] = q;
aec: 8b 4d e4 mov -0x1c(%ebp),%ecx
aef: 8b 45 ec mov -0x14(%ebp),%eax
af2: 8b 55 f4 mov -0xc(%ebp),%edx
af5: 89 4c 90 04 mov %ecx,0x4(%eax,%edx,4)
cmd->eargv[argc] = eq;
af9: 8b 55 e0 mov -0x20(%ebp),%edx
afc: 8b 45 ec mov -0x14(%ebp),%eax
aff: 8b 4d f4 mov -0xc(%ebp),%ecx
b02: 83 c1 08 add $0x8,%ecx
b05: 89 54 88 0c mov %edx,0xc(%eax,%ecx,4)
argc++;
b09: 83 45 f4 01 addl $0x1,-0xc(%ebp)
if(argc >= MAXARGS)
b0d: 83 7d f4 09 cmpl $0x9,-0xc(%ebp)
b11: 7e 10 jle b23 <parseexec+0xd8>
panic("too many args");
b13: 83 ec 0c sub $0xc,%esp
b16: 68 c5 14 00 00 push $0x14c5
b1b: e8 7c f8 ff ff call 39c <panic>
b20: 83 c4 10 add $0x10,%esp
ret = parseredirs(ret, ps, es);
b23: 83 ec 04 sub $0x4,%esp
b26: ff 75 0c pushl 0xc(%ebp)
b29: ff 75 08 pushl 0x8(%ebp)
b2c: ff 75 f0 pushl -0x10(%ebp)
b2f: e8 85 fd ff ff call 8b9 <parseredirs>
b34: 83 c4 10 add $0x10,%esp
b37: 89 45 f0 mov %eax,-0x10(%ebp)
ret = execcmd();
cmd = (struct execcmd*)ret;
argc = 0;
ret = parseredirs(ret, ps, es);
while(!peek(ps, es, "|)&;")){
b3a: 83 ec 04 sub $0x4,%esp
b3d: 68 d3 14 00 00 push $0x14d3
b42: ff 75 0c pushl 0xc(%ebp)
b45: ff 75 08 pushl 0x8(%ebp)
b48: e8 4d fb ff ff call 69a <peek>
b4d: 83 c4 10 add $0x10,%esp
b50: 85 c0 test %eax,%eax
b52: 0f 84 5a ff ff ff je ab2 <parseexec+0x67>
argc++;
if(argc >= MAXARGS)
panic("too many args");
ret = parseredirs(ret, ps, es);
}
cmd->argv[argc] = 0;
b58: 8b 45 ec mov -0x14(%ebp),%eax
b5b: 8b 55 f4 mov -0xc(%ebp),%edx
b5e: c7 44 90 04 00 00 00 movl $0x0,0x4(%eax,%edx,4)
b65: 00
cmd->eargv[argc] = 0;
b66: 8b 45 ec mov -0x14(%ebp),%eax
b69: 8b 55 f4 mov -0xc(%ebp),%edx
b6c: 83 c2 08 add $0x8,%edx
b6f: c7 44 90 0c 00 00 00 movl $0x0,0xc(%eax,%edx,4)
b76: 00
return ret;
b77: 8b 45 f0 mov -0x10(%ebp),%eax
}
b7a: c9 leave
b7b: c3 ret
00000b7c <nulterminate>:
// NUL-terminate all the counted strings.
struct cmd*
nulterminate(struct cmd *cmd)
{
b7c: 55 push %ebp
b7d: 89 e5 mov %esp,%ebp
b7f: 83 ec 28 sub $0x28,%esp
struct execcmd *ecmd;
struct listcmd *lcmd;
struct pipecmd *pcmd;
struct redircmd *rcmd;
if(cmd == 0)
b82: 83 7d 08 00 cmpl $0x0,0x8(%ebp)
b86: 75 0a jne b92 <nulterminate+0x16>
return 0;
b88: b8 00 00 00 00 mov $0x0,%eax
b8d: e9 e4 00 00 00 jmp c76 <nulterminate+0xfa>
switch(cmd->type){
b92: 8b 45 08 mov 0x8(%ebp),%eax
b95: 8b 00 mov (%eax),%eax
b97: 83 f8 05 cmp $0x5,%eax
b9a: 0f 87 d3 00 00 00 ja c73 <nulterminate+0xf7>
ba0: 8b 04 85 d8 14 00 00 mov 0x14d8(,%eax,4),%eax
ba7: ff e0 jmp *%eax
case EXEC:
ecmd = (struct execcmd*)cmd;
ba9: 8b 45 08 mov 0x8(%ebp),%eax
bac: 89 45 f0 mov %eax,-0x10(%ebp)
for(i=0; ecmd->argv[i]; i++)
baf: c7 45 f4 00 00 00 00 movl $0x0,-0xc(%ebp)
bb6: eb 14 jmp bcc <nulterminate+0x50>
*ecmd->eargv[i] = 0;
bb8: 8b 45 f0 mov -0x10(%ebp),%eax
bbb: 8b 55 f4 mov -0xc(%ebp),%edx
bbe: 83 c2 08 add $0x8,%edx
bc1: 8b 44 90 0c mov 0xc(%eax,%edx,4),%eax
bc5: c6 00 00 movb $0x0,(%eax)
return 0;
switch(cmd->type){
case EXEC:
ecmd = (struct execcmd*)cmd;
for(i=0; ecmd->argv[i]; i++)
bc8: 83 45 f4 01 addl $0x1,-0xc(%ebp)
bcc: 8b 45 f0 mov -0x10(%ebp),%eax
bcf: 8b 55 f4 mov -0xc(%ebp),%edx
bd2: 8b 44 90 04 mov 0x4(%eax,%edx,4),%eax
bd6: 85 c0 test %eax,%eax
bd8: 75 de jne bb8 <nulterminate+0x3c>
*ecmd->eargv[i] = 0;
break;
bda: e9 94 00 00 00 jmp c73 <nulterminate+0xf7>
case REDIR:
rcmd = (struct redircmd*)cmd;
bdf: 8b 45 08 mov 0x8(%ebp),%eax
be2: 89 45 ec mov %eax,-0x14(%ebp)
nulterminate(rcmd->cmd);
be5: 8b 45 ec mov -0x14(%ebp),%eax
be8: 8b 40 04 mov 0x4(%eax),%eax
beb: 83 ec 0c sub $0xc,%esp
bee: 50 push %eax
bef: e8 88 ff ff ff call b7c <nulterminate>
bf4: 83 c4 10 add $0x10,%esp
*rcmd->efile = 0;
bf7: 8b 45 ec mov -0x14(%ebp),%eax
bfa: 8b 40 0c mov 0xc(%eax),%eax
bfd: c6 00 00 movb $0x0,(%eax)
break;
c00: eb 71 jmp c73 <nulterminate+0xf7>
case PIPE:
pcmd = (struct pipecmd*)cmd;
c02: 8b 45 08 mov 0x8(%ebp),%eax
c05: 89 45 e8 mov %eax,-0x18(%ebp)
nulterminate(pcmd->left);
c08: 8b 45 e8 mov -0x18(%ebp),%eax
c0b: 8b 40 04 mov 0x4(%eax),%eax
c0e: 83 ec 0c sub $0xc,%esp
c11: 50 push %eax
c12: e8 65 ff ff ff call b7c <nulterminate>
c17: 83 c4 10 add $0x10,%esp
nulterminate(pcmd->right);
c1a: 8b 45 e8 mov -0x18(%ebp),%eax
c1d: 8b 40 08 mov 0x8(%eax),%eax
c20: 83 ec 0c sub $0xc,%esp
c23: 50 push %eax
c24: e8 53 ff ff ff call b7c <nulterminate>
c29: 83 c4 10 add $0x10,%esp
break;
c2c: eb 45 jmp c73 <nulterminate+0xf7>
case LIST:
lcmd = (struct listcmd*)cmd;
c2e: 8b 45 08 mov 0x8(%ebp),%eax
c31: 89 45 e4 mov %eax,-0x1c(%ebp)
nulterminate(lcmd->left);
c34: 8b 45 e4 mov -0x1c(%ebp),%eax
c37: 8b 40 04 mov 0x4(%eax),%eax
c3a: 83 ec 0c sub $0xc,%esp
c3d: 50 push %eax
c3e: e8 39 ff ff ff call b7c <nulterminate>
c43: 83 c4 10 add $0x10,%esp
nulterminate(lcmd->right);
c46: 8b 45 e4 mov -0x1c(%ebp),%eax
c49: 8b 40 08 mov 0x8(%eax),%eax
c4c: 83 ec 0c sub $0xc,%esp
c4f: 50 push %eax
c50: e8 27 ff ff ff call b7c <nulterminate>
c55: 83 c4 10 add $0x10,%esp
break;
c58: eb 19 jmp c73 <nulterminate+0xf7>
case BACK:
bcmd = (struct backcmd*)cmd;
c5a: 8b 45 08 mov 0x8(%ebp),%eax
c5d: 89 45 e0 mov %eax,-0x20(%ebp)
nulterminate(bcmd->cmd);
c60: 8b 45 e0 mov -0x20(%ebp),%eax
c63: 8b 40 04 mov 0x4(%eax),%eax
c66: 83 ec 0c sub $0xc,%esp
c69: 50 push %eax
c6a: e8 0d ff ff ff call b7c <nulterminate>
c6f: 83 c4 10 add $0x10,%esp
break;
c72: 90 nop
}
return cmd;
c73: 8b 45 08 mov 0x8(%ebp),%eax
}
c76: c9 leave
c77: c3 ret
00000c78 <stosb>:
"cc");
}
static inline void
stosb(void *addr, int data, int cnt)
{
c78: 55 push %ebp
c79: 89 e5 mov %esp,%ebp
c7b: 57 push %edi
c7c: 53 push %ebx
asm volatile("cld; rep stosb" :
c7d: 8b 4d 08 mov 0x8(%ebp),%ecx
c80: 8b 55 10 mov 0x10(%ebp),%edx
c83: 8b 45 0c mov 0xc(%ebp),%eax
c86: 89 cb mov %ecx,%ebx
c88: 89 df mov %ebx,%edi
c8a: 89 d1 mov %edx,%ecx
c8c: fc cld
c8d: f3 aa rep stos %al,%es:(%edi)
c8f: 89 ca mov %ecx,%edx
c91: 89 fb mov %edi,%ebx
c93: 89 5d 08 mov %ebx,0x8(%ebp)
c96: 89 55 10 mov %edx,0x10(%ebp)
"=D" (addr), "=c" (cnt) :
"0" (addr), "1" (cnt), "a" (data) :
"memory", "cc");
}
c99: 5b pop %ebx
c9a: 5f pop %edi
c9b: 5d pop %ebp
c9c: c3 ret
00000c9d <strcpy>:
#include "user.h"
#include "x86.h"
char*
strcpy(char *s, char *t)
{
c9d: 55 push %ebp
c9e: 89 e5 mov %esp,%ebp
ca0: 83 ec 10 sub $0x10,%esp
char *os;
os = s;
ca3: 8b 45 08 mov 0x8(%ebp),%eax
ca6: 89 45 fc mov %eax,-0x4(%ebp)
while((*s++ = *t++) != 0)
ca9: 90 nop
caa: 8b 45 08 mov 0x8(%ebp),%eax
cad: 8d 50 01 lea 0x1(%eax),%edx
cb0: 89 55 08 mov %edx,0x8(%ebp)
cb3: 8b 55 0c mov 0xc(%ebp),%edx
cb6: 8d 4a 01 lea 0x1(%edx),%ecx
cb9: 89 4d 0c mov %ecx,0xc(%ebp)
cbc: 0f b6 12 movzbl (%edx),%edx
cbf: 88 10 mov %dl,(%eax)
cc1: 0f b6 00 movzbl (%eax),%eax
cc4: 84 c0 test %al,%al
cc6: 75 e2 jne caa <strcpy+0xd>
;
return os;
cc8: 8b 45 fc mov -0x4(%ebp),%eax
}
ccb: c9 leave
ccc: c3 ret
00000ccd <strcmp>:
int
strcmp(const char *p, const char *q)
{
ccd: 55 push %ebp
cce: 89 e5 mov %esp,%ebp
while(*p && *p == *q)
cd0: eb 08 jmp cda <strcmp+0xd>
p++, q++;
cd2: 83 45 08 01 addl $0x1,0x8(%ebp)
cd6: 83 45 0c 01 addl $0x1,0xc(%ebp)
}
int
strcmp(const char *p, const char *q)
{
while(*p && *p == *q)
cda: 8b 45 08 mov 0x8(%ebp),%eax
cdd: 0f b6 00 movzbl (%eax),%eax
ce0: 84 c0 test %al,%al
ce2: 74 10 je cf4 <strcmp+0x27>
ce4: 8b 45 08 mov 0x8(%ebp),%eax
ce7: 0f b6 10 movzbl (%eax),%edx
cea: 8b 45 0c mov 0xc(%ebp),%eax
ced: 0f b6 00 movzbl (%eax),%eax
cf0: 38 c2 cmp %al,%dl
cf2: 74 de je cd2 <strcmp+0x5>
p++, q++;
return (uchar)*p - (uchar)*q;
cf4: 8b 45 08 mov 0x8(%ebp),%eax
cf7: 0f b6 00 movzbl (%eax),%eax
cfa: 0f b6 d0 movzbl %al,%edx
cfd: 8b 45 0c mov 0xc(%ebp),%eax
d00: 0f b6 00 movzbl (%eax),%eax
d03: 0f b6 c0 movzbl %al,%eax
d06: 29 c2 sub %eax,%edx
d08: 89 d0 mov %edx,%eax
}
d0a: 5d pop %ebp
d0b: c3 ret
00000d0c <strlen>:
uint
strlen(char *s)
{
d0c: 55 push %ebp
d0d: 89 e5 mov %esp,%ebp
d0f: 83 ec 10 sub $0x10,%esp
int n;
for(n = 0; s[n]; n++)
d12: c7 45 fc 00 00 00 00 movl $0x0,-0x4(%ebp)
d19: eb 04 jmp d1f <strlen+0x13>
d1b: 83 45 fc 01 addl $0x1,-0x4(%ebp)
d1f: 8b 55 fc mov -0x4(%ebp),%edx
d22: 8b 45 08 mov 0x8(%ebp),%eax
d25: 01 d0 add %edx,%eax
d27: 0f b6 00 movzbl (%eax),%eax
d2a: 84 c0 test %al,%al
d2c: 75 ed jne d1b <strlen+0xf>
;
return n;
d2e: 8b 45 fc mov -0x4(%ebp),%eax
}
d31: c9 leave
d32: c3 ret
00000d33 <memset>:
void*
memset(void *dst, int c, uint n)
{
d33: 55 push %ebp
d34: 89 e5 mov %esp,%ebp
stosb(dst, c, n);
d36: 8b 45 10 mov 0x10(%ebp),%eax
d39: 50 push %eax
d3a: ff 75 0c pushl 0xc(%ebp)
d3d: ff 75 08 pushl 0x8(%ebp)
d40: e8 33 ff ff ff call c78 <stosb>
d45: 83 c4 0c add $0xc,%esp
return dst;
d48: 8b 45 08 mov 0x8(%ebp),%eax
}
d4b: c9 leave
d4c: c3 ret
00000d4d <strchr>:
char*
strchr(const char *s, char c)
{
d4d: 55 push %ebp
d4e: 89 e5 mov %esp,%ebp
d50: 83 ec 04 sub $0x4,%esp
d53: 8b 45 0c mov 0xc(%ebp),%eax
d56: 88 45 fc mov %al,-0x4(%ebp)
for(; *s; s++)
d59: eb 14 jmp d6f <strchr+0x22>
if(*s == c)
d5b: 8b 45 08 mov 0x8(%ebp),%eax
d5e: 0f b6 00 movzbl (%eax),%eax
d61: 3a 45 fc cmp -0x4(%ebp),%al
d64: 75 05 jne d6b <strchr+0x1e>
return (char*)s;
d66: 8b 45 08 mov 0x8(%ebp),%eax
d69: eb 13 jmp d7e <strchr+0x31>
}
char*
strchr(const char *s, char c)
{
for(; *s; s++)
d6b: 83 45 08 01 addl $0x1,0x8(%ebp)
d6f: 8b 45 08 mov 0x8(%ebp),%eax
d72: 0f b6 00 movzbl (%eax),%eax
d75: 84 c0 test %al,%al
d77: 75 e2 jne d5b <strchr+0xe>
if(*s == c)
return (char*)s;
return 0;
d79: b8 00 00 00 00 mov $0x0,%eax
}
d7e: c9 leave
d7f: c3 ret
00000d80 <gets>:
char*
gets(char *buf, int max)
{
d80: 55 push %ebp
d81: 89 e5 mov %esp,%ebp
d83: 83 ec 18 sub $0x18,%esp
int i, cc;
char c;
for(i=0; i+1 < max; ){
d86: c7 45 f4 00 00 00 00 movl $0x0,-0xc(%ebp)
d8d: eb 44 jmp dd3 <gets+0x53>
cc = read(0, &c, 1);
d8f: 83 ec 04 sub $0x4,%esp
d92: 6a 01 push $0x1
d94: 8d 45 ef lea -0x11(%ebp),%eax
d97: 50 push %eax
d98: 6a 00 push $0x0
d9a: e8 46 01 00 00 call ee5 <read>
d9f: 83 c4 10 add $0x10,%esp
da2: 89 45 f0 mov %eax,-0x10(%ebp)
if(cc < 1)
da5: 83 7d f0 00 cmpl $0x0,-0x10(%ebp)
da9: 7f 02 jg dad <gets+0x2d>
break;
dab: eb 31 jmp dde <gets+0x5e>
buf[i++] = c;
dad: 8b 45 f4 mov -0xc(%ebp),%eax
db0: 8d 50 01 lea 0x1(%eax),%edx
db3: 89 55 f4 mov %edx,-0xc(%ebp)
db6: 89 c2 mov %eax,%edx
db8: 8b 45 08 mov 0x8(%ebp),%eax
dbb: 01 c2 add %eax,%edx
dbd: 0f b6 45 ef movzbl -0x11(%ebp),%eax
dc1: 88 02 mov %al,(%edx)
if(c == '\n' || c == '\r')
dc3: 0f b6 45 ef movzbl -0x11(%ebp),%eax
dc7: 3c 0a cmp $0xa,%al
dc9: 74 13 je dde <gets+0x5e>
dcb: 0f b6 45 ef movzbl -0x11(%ebp),%eax
dcf: 3c 0d cmp $0xd,%al
dd1: 74 0b je dde <gets+0x5e>
gets(char *buf, int max)
{
int i, cc;
char c;
for(i=0; i+1 < max; ){
dd3: 8b 45 f4 mov -0xc(%ebp),%eax
dd6: 83 c0 01 add $0x1,%eax
dd9: 3b 45 0c cmp 0xc(%ebp),%eax
ddc: 7c b1 jl d8f <gets+0xf>
break;
buf[i++] = c;
if(c == '\n' || c == '\r')
break;
}
buf[i] = '\0';
dde: 8b 55 f4 mov -0xc(%ebp),%edx
de1: 8b 45 08 mov 0x8(%ebp),%eax
de4: 01 d0 add %edx,%eax
de6: c6 00 00 movb $0x0,(%eax)
return buf;
de9: 8b 45 08 mov 0x8(%ebp),%eax
}
dec: c9 leave
ded: c3 ret
00000dee <stat>:
int
stat(char *n, struct stat *st)
{
dee: 55 push %ebp
def: 89 e5 mov %esp,%ebp
df1: 83 ec 18 sub $0x18,%esp
int fd;
int r;
fd = open(n, O_RDONLY);
df4: 83 ec 08 sub $0x8,%esp
df7: 6a 00 push $0x0
df9: ff 75 08 pushl 0x8(%ebp)
dfc: e8 0c 01 00 00 call f0d <open>
e01: 83 c4 10 add $0x10,%esp
e04: 89 45 f4 mov %eax,-0xc(%ebp)
if(fd < 0)
e07: 83 7d f4 00 cmpl $0x0,-0xc(%ebp)
e0b: 79 07 jns e14 <stat+0x26>
return -1;
e0d: b8 ff ff ff ff mov $0xffffffff,%eax
e12: eb 25 jmp e39 <stat+0x4b>
r = fstat(fd, st);
e14: 83 ec 08 sub $0x8,%esp
e17: ff 75 0c pushl 0xc(%ebp)
e1a: ff 75 f4 pushl -0xc(%ebp)
e1d: e8 03 01 00 00 call f25 <fstat>
e22: 83 c4 10 add $0x10,%esp
e25: 89 45 f0 mov %eax,-0x10(%ebp)
close(fd);
e28: 83 ec 0c sub $0xc,%esp
e2b: ff 75 f4 pushl -0xc(%ebp)
e2e: e8 c2 00 00 00 call ef5 <close>
e33: 83 c4 10 add $0x10,%esp
return r;
e36: 8b 45 f0 mov -0x10(%ebp),%eax
}
e39: c9 leave
e3a: c3 ret
00000e3b <atoi>:
int
atoi(const char *s)
{
e3b: 55 push %ebp
e3c: 89 e5 mov %esp,%ebp
e3e: 83 ec 10 sub $0x10,%esp
int n;
n = 0;
e41: c7 45 fc 00 00 00 00 movl $0x0,-0x4(%ebp)
while('0' <= *s && *s <= '9')
e48: eb 25 jmp e6f <atoi+0x34>
n = n*10 + *s++ - '0';
e4a: 8b 55 fc mov -0x4(%ebp),%edx
e4d: 89 d0 mov %edx,%eax
e4f: c1 e0 02 shl $0x2,%eax
e52: 01 d0 add %edx,%eax
e54: 01 c0 add %eax,%eax
e56: 89 c1 mov %eax,%ecx
e58: 8b 45 08 mov 0x8(%ebp),%eax
e5b: 8d 50 01 lea 0x1(%eax),%edx
e5e: 89 55 08 mov %edx,0x8(%ebp)
e61: 0f b6 00 movzbl (%eax),%eax
e64: 0f be c0 movsbl %al,%eax
e67: 01 c8 add %ecx,%eax
e69: 83 e8 30 sub $0x30,%eax
e6c: 89 45 fc mov %eax,-0x4(%ebp)
atoi(const char *s)
{
int n;
n = 0;
while('0' <= *s && *s <= '9')
e6f: 8b 45 08 mov 0x8(%ebp),%eax
e72: 0f b6 00 movzbl (%eax),%eax
e75: 3c 2f cmp $0x2f,%al
e77: 7e 0a jle e83 <atoi+0x48>
e79: 8b 45 08 mov 0x8(%ebp),%eax
e7c: 0f b6 00 movzbl (%eax),%eax
e7f: 3c 39 cmp $0x39,%al
e81: 7e c7 jle e4a <atoi+0xf>
n = n*10 + *s++ - '0';
return n;
e83: 8b 45 fc mov -0x4(%ebp),%eax
}
e86: c9 leave
e87: c3 ret
00000e88 <memmove>:
void*
memmove(void *vdst, void *vsrc, int n)
{
e88: 55 push %ebp
e89: 89 e5 mov %esp,%ebp
e8b: 83 ec 10 sub $0x10,%esp
char *dst, *src;
dst = vdst;
e8e: 8b 45 08 mov 0x8(%ebp),%eax
e91: 89 45 fc mov %eax,-0x4(%ebp)
src = vsrc;
e94: 8b 45 0c mov 0xc(%ebp),%eax
e97: 89 45 f8 mov %eax,-0x8(%ebp)
while(n-- > 0)
e9a: eb 17 jmp eb3 <memmove+0x2b>
*dst++ = *src++;
e9c: 8b 45 fc mov -0x4(%ebp),%eax
e9f: 8d 50 01 lea 0x1(%eax),%edx
ea2: 89 55 fc mov %edx,-0x4(%ebp)
ea5: 8b 55 f8 mov -0x8(%ebp),%edx
ea8: 8d 4a 01 lea 0x1(%edx),%ecx
eab: 89 4d f8 mov %ecx,-0x8(%ebp)
eae: 0f b6 12 movzbl (%edx),%edx
eb1: 88 10 mov %dl,(%eax)
{
char *dst, *src;
dst = vdst;
src = vsrc;
while(n-- > 0)
eb3: 8b 45 10 mov 0x10(%ebp),%eax
eb6: 8d 50 ff lea -0x1(%eax),%edx
eb9: 89 55 10 mov %edx,0x10(%ebp)
ebc: 85 c0 test %eax,%eax
ebe: 7f dc jg e9c <memmove+0x14>
*dst++ = *src++;
return vdst;
ec0: 8b 45 08 mov 0x8(%ebp),%eax
}
ec3: c9 leave
ec4: c3 ret
00000ec5 <fork>:
name: \
movl $SYS_ ## name, %eax; \
int $T_SYSCALL; \
ret
SYSCALL(fork)
ec5: b8 01 00 00 00 mov $0x1,%eax
eca: cd 40 int $0x40
ecc: c3 ret
00000ecd <exit>:
SYSCALL(exit)
ecd: b8 02 00 00 00 mov $0x2,%eax
ed2: cd 40 int $0x40
ed4: c3 ret
00000ed5 <wait>:
SYSCALL(wait)
ed5: b8 03 00 00 00 mov $0x3,%eax
eda: cd 40 int $0x40
edc: c3 ret
00000edd <pipe>:
SYSCALL(pipe)
edd: b8 04 00 00 00 mov $0x4,%eax
ee2: cd 40 int $0x40
ee4: c3 ret
00000ee5 <read>:
SYSCALL(read)
ee5: b8 05 00 00 00 mov $0x5,%eax
eea: cd 40 int $0x40
eec: c3 ret
00000eed <write>:
SYSCALL(write)
eed: b8 10 00 00 00 mov $0x10,%eax
ef2: cd 40 int $0x40
ef4: c3 ret
00000ef5 <close>:
SYSCALL(close)
ef5: b8 15 00 00 00 mov $0x15,%eax
efa: cd 40 int $0x40
efc: c3 ret
00000efd <kill>:
SYSCALL(kill)
efd: b8 06 00 00 00 mov $0x6,%eax
f02: cd 40 int $0x40
f04: c3 ret
00000f05 <exec>:
SYSCALL(exec)
f05: b8 07 00 00 00 mov $0x7,%eax
f0a: cd 40 int $0x40
f0c: c3 ret
00000f0d <open>:
SYSCALL(open)
f0d: b8 0f 00 00 00 mov $0xf,%eax
f12: cd 40 int $0x40
f14: c3 ret
00000f15 <mknod>:
SYSCALL(mknod)
f15: b8 11 00 00 00 mov $0x11,%eax
f1a: cd 40 int $0x40
f1c: c3 ret
00000f1d <unlink>:
SYSCALL(unlink)
f1d: b8 12 00 00 00 mov $0x12,%eax
f22: cd 40 int $0x40
f24: c3 ret
00000f25 <fstat>:
SYSCALL(fstat)
f25: b8 08 00 00 00 mov $0x8,%eax
f2a: cd 40 int $0x40
f2c: c3 ret
00000f2d <link>:
SYSCALL(link)
f2d: b8 13 00 00 00 mov $0x13,%eax
f32: cd 40 int $0x40
f34: c3 ret
00000f35 <mkdir>:
SYSCALL(mkdir)
f35: b8 14 00 00 00 mov $0x14,%eax
f3a: cd 40 int $0x40
f3c: c3 ret
00000f3d <chdir>:
SYSCALL(chdir)
f3d: b8 09 00 00 00 mov $0x9,%eax
f42: cd 40 int $0x40
f44: c3 ret
00000f45 <dup>:
SYSCALL(dup)
f45: b8 0a 00 00 00 mov $0xa,%eax
f4a: cd 40 int $0x40
f4c: c3 ret
00000f4d <getpid>:
SYSCALL(getpid)
f4d: b8 0b 00 00 00 mov $0xb,%eax
f52: cd 40 int $0x40
f54: c3 ret
00000f55 <sbrk>:
SYSCALL(sbrk)
f55: b8 0c 00 00 00 mov $0xc,%eax
f5a: cd 40 int $0x40
f5c: c3 ret
00000f5d <sleep>:
SYSCALL(sleep)
f5d: b8 0d 00 00 00 mov $0xd,%eax
f62: cd 40 int $0x40
f64: c3 ret
00000f65 <uptime>:
SYSCALL(uptime)
f65: b8 0e 00 00 00 mov $0xe,%eax
f6a: cd 40 int $0x40
f6c: c3 ret
00000f6d <trace>:
SYSCALL(trace)
f6d: b8 16 00 00 00 mov $0x16,%eax
f72: cd 40 int $0x40
f74: c3 ret
00000f75 <putc>:
#include "stat.h"
#include "user.h"
static void
putc(int fd, char c)
{
f75: 55 push %ebp
f76: 89 e5 mov %esp,%ebp
f78: 83 ec 18 sub $0x18,%esp
f7b: 8b 45 0c mov 0xc(%ebp),%eax
f7e: 88 45 f4 mov %al,-0xc(%ebp)
write(fd, &c, 1);
f81: 83 ec 04 sub $0x4,%esp
f84: 6a 01 push $0x1
f86: 8d 45 f4 lea -0xc(%ebp),%eax
f89: 50 push %eax
f8a: ff 75 08 pushl 0x8(%ebp)
f8d: e8 5b ff ff ff call eed <write>
f92: 83 c4 10 add $0x10,%esp
}
f95: c9 leave
f96: c3 ret
00000f97 <printint>:
static void
printint(int fd, int xx, int base, int sgn)
{
f97: 55 push %ebp
f98: 89 e5 mov %esp,%ebp
f9a: 53 push %ebx
f9b: 83 ec 24 sub $0x24,%esp
static char digits[] = "0123456789ABCDEF";
char buf[16];
int i, neg;
uint x;
neg = 0;
f9e: c7 45 f0 00 00 00 00 movl $0x0,-0x10(%ebp)
if(sgn && xx < 0){
fa5: 83 7d 14 00 cmpl $0x0,0x14(%ebp)
fa9: 74 17 je fc2 <printint+0x2b>
fab: 83 7d 0c 00 cmpl $0x0,0xc(%ebp)
faf: 79 11 jns fc2 <printint+0x2b>
neg = 1;
fb1: c7 45 f0 01 00 00 00 movl $0x1,-0x10(%ebp)
x = -xx;
fb8: 8b 45 0c mov 0xc(%ebp),%eax
fbb: f7 d8 neg %eax
fbd: 89 45 ec mov %eax,-0x14(%ebp)
fc0: eb 06 jmp fc8 <printint+0x31>
} else {
x = xx;
fc2: 8b 45 0c mov 0xc(%ebp),%eax
fc5: 89 45 ec mov %eax,-0x14(%ebp)
}
i = 0;
fc8: c7 45 f4 00 00 00 00 movl $0x0,-0xc(%ebp)
do{
buf[i++] = digits[x % base];
fcf: 8b 4d f4 mov -0xc(%ebp),%ecx
fd2: 8d 41 01 lea 0x1(%ecx),%eax
fd5: 89 45 f4 mov %eax,-0xc(%ebp)
fd8: 8b 5d 10 mov 0x10(%ebp),%ebx
fdb: 8b 45 ec mov -0x14(%ebp),%eax
fde: ba 00 00 00 00 mov $0x0,%edx
fe3: f7 f3 div %ebx
fe5: 89 d0 mov %edx,%eax
fe7: 0f b6 80 8a 19 00 00 movzbl 0x198a(%eax),%eax
fee: 88 44 0d dc mov %al,-0x24(%ebp,%ecx,1)
}while((x /= base) != 0);
ff2: 8b 5d 10 mov 0x10(%ebp),%ebx
ff5: 8b 45 ec mov -0x14(%ebp),%eax
ff8: ba 00 00 00 00 mov $0x0,%edx
ffd: f7 f3 div %ebx
fff: 89 45 ec mov %eax,-0x14(%ebp)
1002: 83 7d ec 00 cmpl $0x0,-0x14(%ebp)
1006: 75 c7 jne fcf <printint+0x38>
if(neg)
1008: 83 7d f0 00 cmpl $0x0,-0x10(%ebp)
100c: 74 0e je 101c <printint+0x85>
buf[i++] = '-';
100e: 8b 45 f4 mov -0xc(%ebp),%eax
1011: 8d 50 01 lea 0x1(%eax),%edx
1014: 89 55 f4 mov %edx,-0xc(%ebp)
1017: c6 44 05 dc 2d movb $0x2d,-0x24(%ebp,%eax,1)
while(--i >= 0)
101c: eb 1d jmp 103b <printint+0xa4>
putc(fd, buf[i]);
101e: 8d 55 dc lea -0x24(%ebp),%edx
1021: 8b 45 f4 mov -0xc(%ebp),%eax
1024: 01 d0 add %edx,%eax
1026: 0f b6 00 movzbl (%eax),%eax
1029: 0f be c0 movsbl %al,%eax
102c: 83 ec 08 sub $0x8,%esp
102f: 50 push %eax
1030: ff 75 08 pushl 0x8(%ebp)
1033: e8 3d ff ff ff call f75 <putc>
1038: 83 c4 10 add $0x10,%esp
buf[i++] = digits[x % base];
}while((x /= base) != 0);
if(neg)
buf[i++] = '-';
while(--i >= 0)
103b: 83 6d f4 01 subl $0x1,-0xc(%ebp)
103f: 83 7d f4 00 cmpl $0x0,-0xc(%ebp)
1043: 79 d9 jns 101e <printint+0x87>
putc(fd, buf[i]);
}
1045: 8b 5d fc mov -0x4(%ebp),%ebx
1048: c9 leave
1049: c3 ret
0000104a <printf>:
// Print to the given fd. Only understands %d, %x, %p, %s.
void
printf(int fd, char *fmt, ...)
{
104a: 55 push %ebp
104b: 89 e5 mov %esp,%ebp
104d: 83 ec 28 sub $0x28,%esp
char *s;
int c, i, state;
uint *ap;
state = 0;
1050: c7 45 ec 00 00 00 00 movl $0x0,-0x14(%ebp)
ap = (uint*)(void*)&fmt + 1;
1057: 8d 45 0c lea 0xc(%ebp),%eax
105a: 83 c0 04 add $0x4,%eax
105d: 89 45 e8 mov %eax,-0x18(%ebp)
for(i = 0; fmt[i]; i++){
1060: c7 45 f0 00 00 00 00 movl $0x0,-0x10(%ebp)
1067: e9 59 01 00 00 jmp 11c5 <printf+0x17b>
c = fmt[i] & 0xff;
106c: 8b 55 0c mov 0xc(%ebp),%edx
106f: 8b 45 f0 mov -0x10(%ebp),%eax
1072: 01 d0 add %edx,%eax
1074: 0f b6 00 movzbl (%eax),%eax
1077: 0f be c0 movsbl %al,%eax
107a: 25 ff 00 00 00 and $0xff,%eax
107f: 89 45 e4 mov %eax,-0x1c(%ebp)
if(state == 0){
1082: 83 7d ec 00 cmpl $0x0,-0x14(%ebp)
1086: 75 2c jne 10b4 <printf+0x6a>
if(c == '%'){
1088: 83 7d e4 25 cmpl $0x25,-0x1c(%ebp)
108c: 75 0c jne 109a <printf+0x50>
state = '%';
108e: c7 45 ec 25 00 00 00 movl $0x25,-0x14(%ebp)
1095: e9 27 01 00 00 jmp 11c1 <printf+0x177>
} else {
putc(fd, c);
109a: 8b 45 e4 mov -0x1c(%ebp),%eax
109d: 0f be c0 movsbl %al,%eax
10a0: 83 ec 08 sub $0x8,%esp
10a3: 50 push %eax
10a4: ff 75 08 pushl 0x8(%ebp)
10a7: e8 c9 fe ff ff call f75 <putc>
10ac: 83 c4 10 add $0x10,%esp
10af: e9 0d 01 00 00 jmp 11c1 <printf+0x177>
}
} else if(state == '%'){
10b4: 83 7d ec 25 cmpl $0x25,-0x14(%ebp)
10b8: 0f 85 03 01 00 00 jne 11c1 <printf+0x177>
if(c == 'd'){
10be: 83 7d e4 64 cmpl $0x64,-0x1c(%ebp)
10c2: 75 1e jne 10e2 <printf+0x98>
printint(fd, *ap, 10, 1);
10c4: 8b 45 e8 mov -0x18(%ebp),%eax
10c7: 8b 00 mov (%eax),%eax
10c9: 6a 01 push $0x1
10cb: 6a 0a push $0xa
10cd: 50 push %eax
10ce: ff 75 08 pushl 0x8(%ebp)
10d1: e8 c1 fe ff ff call f97 <printint>
10d6: 83 c4 10 add $0x10,%esp
ap++;
10d9: 83 45 e8 04 addl $0x4,-0x18(%ebp)
10dd: e9 d8 00 00 00 jmp 11ba <printf+0x170>
} else if(c == 'x' || c == 'p'){
10e2: 83 7d e4 78 cmpl $0x78,-0x1c(%ebp)
10e6: 74 06 je 10ee <printf+0xa4>
10e8: 83 7d e4 70 cmpl $0x70,-0x1c(%ebp)
10ec: 75 1e jne 110c <printf+0xc2>
printint(fd, *ap, 16, 0);
10ee: 8b 45 e8 mov -0x18(%ebp),%eax
10f1: 8b 00 mov (%eax),%eax
10f3: 6a 00 push $0x0
10f5: 6a 10 push $0x10
10f7: 50 push %eax
10f8: ff 75 08 pushl 0x8(%ebp)
10fb: e8 97 fe ff ff call f97 <printint>
1100: 83 c4 10 add $0x10,%esp
ap++;
1103: 83 45 e8 04 addl $0x4,-0x18(%ebp)
1107: e9 ae 00 00 00 jmp 11ba <printf+0x170>
} else if(c == 's'){
110c: 83 7d e4 73 cmpl $0x73,-0x1c(%ebp)
1110: 75 43 jne 1155 <printf+0x10b>
s = (char*)*ap;
1112: 8b 45 e8 mov -0x18(%ebp),%eax
1115: 8b 00 mov (%eax),%eax
1117: 89 45 f4 mov %eax,-0xc(%ebp)
ap++;
111a: 83 45 e8 04 addl $0x4,-0x18(%ebp)
if(s == 0)
111e: 83 7d f4 00 cmpl $0x0,-0xc(%ebp)
1122: 75 07 jne 112b <printf+0xe1>
s = "(null)";
1124: c7 45 f4 f0 14 00 00 movl $0x14f0,-0xc(%ebp)
while(*s != 0){
112b: eb 1c jmp 1149 <printf+0xff>
putc(fd, *s);
112d: 8b 45 f4 mov -0xc(%ebp),%eax
1130: 0f b6 00 movzbl (%eax),%eax
1133: 0f be c0 movsbl %al,%eax
1136: 83 ec 08 sub $0x8,%esp
1139: 50 push %eax
113a: ff 75 08 pushl 0x8(%ebp)
113d: e8 33 fe ff ff call f75 <putc>
1142: 83 c4 10 add $0x10,%esp
s++;
1145: 83 45 f4 01 addl $0x1,-0xc(%ebp)
} else if(c == 's'){
s = (char*)*ap;
ap++;
if(s == 0)
s = "(null)";
while(*s != 0){
1149: 8b 45 f4 mov -0xc(%ebp),%eax
114c: 0f b6 00 movzbl (%eax),%eax
114f: 84 c0 test %al,%al
1151: 75 da jne 112d <printf+0xe3>
1153: eb 65 jmp 11ba <printf+0x170>
putc(fd, *s);
s++;
}
} else if(c == 'c'){
1155: 83 7d e4 63 cmpl $0x63,-0x1c(%ebp)
1159: 75 1d jne 1178 <printf+0x12e>
putc(fd, *ap);
115b: 8b 45 e8 mov -0x18(%ebp),%eax
115e: 8b 00 mov (%eax),%eax
1160: 0f be c0 movsbl %al,%eax
1163: 83 ec 08 sub $0x8,%esp
1166: 50 push %eax
1167: ff 75 08 pushl 0x8(%ebp)
116a: e8 06 fe ff ff call f75 <putc>
116f: 83 c4 10 add $0x10,%esp
ap++;
1172: 83 45 e8 04 addl $0x4,-0x18(%ebp)
1176: eb 42 jmp 11ba <printf+0x170>
} else if(c == '%'){
1178: 83 7d e4 25 cmpl $0x25,-0x1c(%ebp)
117c: 75 17 jne 1195 <printf+0x14b>
putc(fd, c);
117e: 8b 45 e4 mov -0x1c(%ebp),%eax
1181: 0f be c0 movsbl %al,%eax
1184: 83 ec 08 sub $0x8,%esp
1187: 50 push %eax
1188: ff 75 08 pushl 0x8(%ebp)
118b: e8 e5 fd ff ff call f75 <putc>
1190: 83 c4 10 add $0x10,%esp
1193: eb 25 jmp 11ba <printf+0x170>
} else {
// Unknown % sequence. Print it to draw attention.
putc(fd, '%');
1195: 83 ec 08 sub $0x8,%esp
1198: 6a 25 push $0x25
119a: ff 75 08 pushl 0x8(%ebp)
119d: e8 d3 fd ff ff call f75 <putc>
11a2: 83 c4 10 add $0x10,%esp
putc(fd, c);
11a5: 8b 45 e4 mov -0x1c(%ebp),%eax
11a8: 0f be c0 movsbl %al,%eax
11ab: 83 ec 08 sub $0x8,%esp
11ae: 50 push %eax
11af: ff 75 08 pushl 0x8(%ebp)
11b2: e8 be fd ff ff call f75 <putc>
11b7: 83 c4 10 add $0x10,%esp
}
state = 0;
11ba: c7 45 ec 00 00 00 00 movl $0x0,-0x14(%ebp)
int c, i, state;
uint *ap;
state = 0;
ap = (uint*)(void*)&fmt + 1;
for(i = 0; fmt[i]; i++){
11c1: 83 45 f0 01 addl $0x1,-0x10(%ebp)
11c5: 8b 55 0c mov 0xc(%ebp),%edx
11c8: 8b 45 f0 mov -0x10(%ebp),%eax
11cb: 01 d0 add %edx,%eax
11cd: 0f b6 00 movzbl (%eax),%eax
11d0: 84 c0 test %al,%al
11d2: 0f 85 94 fe ff ff jne 106c <printf+0x22>
putc(fd, c);
}
state = 0;
}
}
}
11d8: c9 leave
11d9: c3 ret
000011da <free>:
static Header base;
static Header *freep;
void
free(void *ap)
{
11da: 55 push %ebp
11db: 89 e5 mov %esp,%ebp
11dd: 83 ec 10 sub $0x10,%esp
Header *bp, *p;
bp = (Header*)ap - 1;
11e0: 8b 45 08 mov 0x8(%ebp),%eax
11e3: 83 e8 08 sub $0x8,%eax
11e6: 89 45 f8 mov %eax,-0x8(%ebp)
for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr)
11e9: a1 2c 1a 00 00 mov 0x1a2c,%eax
11ee: 89 45 fc mov %eax,-0x4(%ebp)
11f1: eb 24 jmp 1217 <free+0x3d>
if(p >= p->s.ptr && (bp > p || bp < p->s.ptr))
11f3: 8b 45 fc mov -0x4(%ebp),%eax
11f6: 8b 00 mov (%eax),%eax
11f8: 3b 45 fc cmp -0x4(%ebp),%eax
11fb: 77 12 ja 120f <free+0x35>
11fd: 8b 45 f8 mov -0x8(%ebp),%eax
1200: 3b 45 fc cmp -0x4(%ebp),%eax
1203: 77 24 ja 1229 <free+0x4f>
1205: 8b 45 fc mov -0x4(%ebp),%eax
1208: 8b 00 mov (%eax),%eax
120a: 3b 45 f8 cmp -0x8(%ebp),%eax
120d: 77 1a ja 1229 <free+0x4f>
free(void *ap)
{
Header *bp, *p;
bp = (Header*)ap - 1;
for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr)
120f: 8b 45 fc mov -0x4(%ebp),%eax
1212: 8b 00 mov (%eax),%eax
1214: 89 45 fc mov %eax,-0x4(%ebp)
1217: 8b 45 f8 mov -0x8(%ebp),%eax
121a: 3b 45 fc cmp -0x4(%ebp),%eax
121d: 76 d4 jbe 11f3 <free+0x19>
121f: 8b 45 fc mov -0x4(%ebp),%eax
1222: 8b 00 mov (%eax),%eax
1224: 3b 45 f8 cmp -0x8(%ebp),%eax
1227: 76 ca jbe 11f3 <free+0x19>
if(p >= p->s.ptr && (bp > p || bp < p->s.ptr))
break;
if(bp + bp->s.size == p->s.ptr){
1229: 8b 45 f8 mov -0x8(%ebp),%eax
122c: 8b 40 04 mov 0x4(%eax),%eax
122f: 8d 14 c5 00 00 00 00 lea 0x0(,%eax,8),%edx
1236: 8b 45 f8 mov -0x8(%ebp),%eax
1239: 01 c2 add %eax,%edx
123b: 8b 45 fc mov -0x4(%ebp),%eax
123e: 8b 00 mov (%eax),%eax
1240: 39 c2 cmp %eax,%edx
1242: 75 24 jne 1268 <free+0x8e>
bp->s.size += p->s.ptr->s.size;
1244: 8b 45 f8 mov -0x8(%ebp),%eax
1247: 8b 50 04 mov 0x4(%eax),%edx
124a: 8b 45 fc mov -0x4(%ebp),%eax
124d: 8b 00 mov (%eax),%eax
124f: 8b 40 04 mov 0x4(%eax),%eax
1252: 01 c2 add %eax,%edx
1254: 8b 45 f8 mov -0x8(%ebp),%eax
1257: 89 50 04 mov %edx,0x4(%eax)
bp->s.ptr = p->s.ptr->s.ptr;
125a: 8b 45 fc mov -0x4(%ebp),%eax
125d: 8b 00 mov (%eax),%eax
125f: 8b 10 mov (%eax),%edx
1261: 8b 45 f8 mov -0x8(%ebp),%eax
1264: 89 10 mov %edx,(%eax)
1266: eb 0a jmp 1272 <free+0x98>
} else
bp->s.ptr = p->s.ptr;
1268: 8b 45 fc mov -0x4(%ebp),%eax
126b: 8b 10 mov (%eax),%edx
126d: 8b 45 f8 mov -0x8(%ebp),%eax
1270: 89 10 mov %edx,(%eax)
if(p + p->s.size == bp){
1272: 8b 45 fc mov -0x4(%ebp),%eax
1275: 8b 40 04 mov 0x4(%eax),%eax
1278: 8d 14 c5 00 00 00 00 lea 0x0(,%eax,8),%edx
127f: 8b 45 fc mov -0x4(%ebp),%eax
1282: 01 d0 add %edx,%eax
1284: 3b 45 f8 cmp -0x8(%ebp),%eax
1287: 75 20 jne 12a9 <free+0xcf>
p->s.size += bp->s.size;
1289: 8b 45 fc mov -0x4(%ebp),%eax
128c: 8b 50 04 mov 0x4(%eax),%edx
128f: 8b 45 f8 mov -0x8(%ebp),%eax
1292: 8b 40 04 mov 0x4(%eax),%eax
1295: 01 c2 add %eax,%edx
1297: 8b 45 fc mov -0x4(%ebp),%eax
129a: 89 50 04 mov %edx,0x4(%eax)
p->s.ptr = bp->s.ptr;
129d: 8b 45 f8 mov -0x8(%ebp),%eax
12a0: 8b 10 mov (%eax),%edx
12a2: 8b 45 fc mov -0x4(%ebp),%eax
12a5: 89 10 mov %edx,(%eax)
12a7: eb 08 jmp 12b1 <free+0xd7>
} else
p->s.ptr = bp;
12a9: 8b 45 fc mov -0x4(%ebp),%eax
12ac: 8b 55 f8 mov -0x8(%ebp),%edx
12af: 89 10 mov %edx,(%eax)
freep = p;
12b1: 8b 45 fc mov -0x4(%ebp),%eax
12b4: a3 2c 1a 00 00 mov %eax,0x1a2c
}
12b9: c9 leave
12ba: c3 ret
000012bb <morecore>:
static Header*
morecore(uint nu)
{
12bb: 55 push %ebp
12bc: 89 e5 mov %esp,%ebp
12be: 83 ec 18 sub $0x18,%esp
char *p;
Header *hp;
if(nu < 4096)
12c1: 81 7d 08 ff 0f 00 00 cmpl $0xfff,0x8(%ebp)
12c8: 77 07 ja 12d1 <morecore+0x16>
nu = 4096;
12ca: c7 45 08 00 10 00 00 movl $0x1000,0x8(%ebp)
p = sbrk(nu * sizeof(Header));
12d1: 8b 45 08 mov 0x8(%ebp),%eax
12d4: c1 e0 03 shl $0x3,%eax
12d7: 83 ec 0c sub $0xc,%esp
12da: 50 push %eax
12db: e8 75 fc ff ff call f55 <sbrk>
12e0: 83 c4 10 add $0x10,%esp
12e3: 89 45 f4 mov %eax,-0xc(%ebp)
if(p == (char*)-1)
12e6: 83 7d f4 ff cmpl $0xffffffff,-0xc(%ebp)
12ea: 75 07 jne 12f3 <morecore+0x38>
return 0;
12ec: b8 00 00 00 00 mov $0x0,%eax
12f1: eb 26 jmp 1319 <morecore+0x5e>
hp = (Header*)p;
12f3: 8b 45 f4 mov -0xc(%ebp),%eax
12f6: 89 45 f0 mov %eax,-0x10(%ebp)
hp->s.size = nu;
12f9: 8b 45 f0 mov -0x10(%ebp),%eax
12fc: 8b 55 08 mov 0x8(%ebp),%edx
12ff: 89 50 04 mov %edx,0x4(%eax)
free((void*)(hp + 1));
1302: 8b 45 f0 mov -0x10(%ebp),%eax
1305: 83 c0 08 add $0x8,%eax
1308: 83 ec 0c sub $0xc,%esp
130b: 50 push %eax
130c: e8 c9 fe ff ff call 11da <free>
1311: 83 c4 10 add $0x10,%esp
return freep;
1314: a1 2c 1a 00 00 mov 0x1a2c,%eax
}
1319: c9 leave
131a: c3 ret
0000131b <malloc>:
void*
malloc(uint nbytes)
{
131b: 55 push %ebp
131c: 89 e5 mov %esp,%ebp
131e: 83 ec 18 sub $0x18,%esp
Header *p, *prevp;
uint nunits;
nunits = (nbytes + sizeof(Header) - 1)/sizeof(Header) + 1;
1321: 8b 45 08 mov 0x8(%ebp),%eax
1324: 83 c0 07 add $0x7,%eax
1327: c1 e8 03 shr $0x3,%eax
132a: 83 c0 01 add $0x1,%eax
132d: 89 45 ec mov %eax,-0x14(%ebp)
if((prevp = freep) == 0){
1330: a1 2c 1a 00 00 mov 0x1a2c,%eax
1335: 89 45 f0 mov %eax,-0x10(%ebp)
1338: 83 7d f0 00 cmpl $0x0,-0x10(%ebp)
133c: 75 23 jne 1361 <malloc+0x46>
base.s.ptr = freep = prevp = &base;
133e: c7 45 f0 24 1a 00 00 movl $0x1a24,-0x10(%ebp)
1345: 8b 45 f0 mov -0x10(%ebp),%eax
1348: a3 2c 1a 00 00 mov %eax,0x1a2c
134d: a1 2c 1a 00 00 mov 0x1a2c,%eax
1352: a3 24 1a 00 00 mov %eax,0x1a24
base.s.size = 0;
1357: c7 05 28 1a 00 00 00 movl $0x0,0x1a28
135e: 00 00 00
}
for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){
1361: 8b 45 f0 mov -0x10(%ebp),%eax
1364: 8b 00 mov (%eax),%eax
1366: 89 45 f4 mov %eax,-0xc(%ebp)
if(p->s.size >= nunits){
1369: 8b 45 f4 mov -0xc(%ebp),%eax
136c: 8b 40 04 mov 0x4(%eax),%eax
136f: 3b 45 ec cmp -0x14(%ebp),%eax
1372: 72 4d jb 13c1 <malloc+0xa6>
if(p->s.size == nunits)
1374: 8b 45 f4 mov -0xc(%ebp),%eax
1377: 8b 40 04 mov 0x4(%eax),%eax
137a: 3b 45 ec cmp -0x14(%ebp),%eax
137d: 75 0c jne 138b <malloc+0x70>
prevp->s.ptr = p->s.ptr;
137f: 8b 45 f4 mov -0xc(%ebp),%eax
1382: 8b 10 mov (%eax),%edx
1384: 8b 45 f0 mov -0x10(%ebp),%eax
1387: 89 10 mov %edx,(%eax)
1389: eb 26 jmp 13b1 <malloc+0x96>
else {
p->s.size -= nunits;
138b: 8b 45 f4 mov -0xc(%ebp),%eax
138e: 8b 40 04 mov 0x4(%eax),%eax
1391: 2b 45 ec sub -0x14(%ebp),%eax
1394: 89 c2 mov %eax,%edx
1396: 8b 45 f4 mov -0xc(%ebp),%eax
1399: 89 50 04 mov %edx,0x4(%eax)
p += p->s.size;
139c: 8b 45 f4 mov -0xc(%ebp),%eax
139f: 8b 40 04 mov 0x4(%eax),%eax
13a2: c1 e0 03 shl $0x3,%eax
13a5: 01 45 f4 add %eax,-0xc(%ebp)
p->s.size = nunits;
13a8: 8b 45 f4 mov -0xc(%ebp),%eax
13ab: 8b 55 ec mov -0x14(%ebp),%edx
13ae: 89 50 04 mov %edx,0x4(%eax)
}
freep = prevp;
13b1: 8b 45 f0 mov -0x10(%ebp),%eax
13b4: a3 2c 1a 00 00 mov %eax,0x1a2c
return (void*)(p + 1);
13b9: 8b 45 f4 mov -0xc(%ebp),%eax
13bc: 83 c0 08 add $0x8,%eax
13bf: eb 3b jmp 13fc <malloc+0xe1>
}
if(p == freep)
13c1: a1 2c 1a 00 00 mov 0x1a2c,%eax
13c6: 39 45 f4 cmp %eax,-0xc(%ebp)
13c9: 75 1e jne 13e9 <malloc+0xce>
if((p = morecore(nunits)) == 0)
13cb: 83 ec 0c sub $0xc,%esp
13ce: ff 75 ec pushl -0x14(%ebp)
13d1: e8 e5 fe ff ff call 12bb <morecore>
13d6: 83 c4 10 add $0x10,%esp
13d9: 89 45 f4 mov %eax,-0xc(%ebp)
13dc: 83 7d f4 00 cmpl $0x0,-0xc(%ebp)
13e0: 75 07 jne 13e9 <malloc+0xce>
return 0;
13e2: b8 00 00 00 00 mov $0x0,%eax
13e7: eb 13 jmp 13fc <malloc+0xe1>
nunits = (nbytes + sizeof(Header) - 1)/sizeof(Header) + 1;
if((prevp = freep) == 0){
base.s.ptr = freep = prevp = &base;
base.s.size = 0;
}
for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){
13e9: 8b 45 f4 mov -0xc(%ebp),%eax
13ec: 89 45 f0 mov %eax,-0x10(%ebp)
13ef: 8b 45 f4 mov -0xc(%ebp),%eax
13f2: 8b 00 mov (%eax),%eax
13f4: 89 45 f4 mov %eax,-0xc(%ebp)
return (void*)(p + 1);
}
if(p == freep)
if((p = morecore(nunits)) == 0)
return 0;
}
13f7: e9 6d ff ff ff jmp 1369 <malloc+0x4e>
}
13fc: c9 leave
13fd: c3 ret
| 38.164359 | 71 | 0.411419 |
8da0596fddd67bc7fd7949170fc847daa78cee29 | 9,733 | asm | Assembly | lib/avx/sha512_x2_avx.asm | edtubbs/intel-ipsec-mb | 27bb66dcdf5aec2aec8cc0a6bee9c1da96898d7f | [
"BSD-3-Clause"
] | null | null | null | lib/avx/sha512_x2_avx.asm | edtubbs/intel-ipsec-mb | 27bb66dcdf5aec2aec8cc0a6bee9c1da96898d7f | [
"BSD-3-Clause"
] | null | null | null | lib/avx/sha512_x2_avx.asm | edtubbs/intel-ipsec-mb | 27bb66dcdf5aec2aec8cc0a6bee9c1da96898d7f | [
"BSD-3-Clause"
] | null | null | null | ;;
;; Copyright (c) 2012-2021, Intel Corporation
;;
;; Redistribution and use in source and binary forms, with or without
;; modification, are permitted provided that the following conditions are met:
;;
;; * Redistributions of source code must retain the above copyright notice,
;; this list of conditions and the following disclaimer.
;; * Redistributions in binary form must reproduce the above copyright
;; notice, this list of conditions and the following disclaimer in the
;; documentation and/or other materials provided with the distribution.
;; * Neither the name of Intel Corporation nor the names of its contributors
;; may be used to endorse or promote products derived from this software
;; without specific prior written permission.
;;
;; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
;; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
;; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
;; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
;; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
;; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
;; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
;; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
;; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;
;; code to compute SHA512 by-2 using AVX
;; outer calling routine takes care of save and restore of XMM registers
;; Logic designed/laid out by JDG
;; Function clobbers: rax, rcx, rdx, rbx, rsi, rdi, r9-r15; ymm0-15
;; Stack must be aligned to 16 bytes before call
;; Windows clobbers: rax rdx r8 r9 r10 r11
;; Windows preserves: rbx rcx rsi rdi rbp r12 r13 r14 r15
;;
;; Linux clobbers: rax rsi r8 r9 r10 r11
;; Linux preserves: rbx rcx rdx rdi rbp r12 r13 r14 r15
;;
;; clobbers xmm0-15
%include "include/os.asm"
%include "include/mb_mgr_datastruct.asm"
%include "include/clear_regs.asm"
extern K512_2
section .data
default rel
align 32
; one from sha512_rorx
; this does the big endian to little endian conversion
; over a quad word
PSHUFFLE_BYTE_FLIP_MASK: ;ddq 0x08090a0b0c0d0e0f0001020304050607
dq 0x0001020304050607, 0x08090a0b0c0d0e0f
;ddq 0x18191a1b1c1d1e1f1011121314151617
dq 0x1011121314151617, 0x18191a1b1c1d1e1f
section .text
%ifdef LINUX ; Linux definitions
%define arg1 rdi
%define arg2 rsi
%else ; Windows definitions
%define arg1 rcx
%define arg2 rdx
%endif
; Common definitions
%define STATE arg1
%define INP_SIZE arg2
%define IDX rax
%define ROUND r8
%define TBL r11
%define inp0 r9
%define inp1 r10
%define a xmm0
%define b xmm1
%define c xmm2
%define d xmm3
%define e xmm4
%define f xmm5
%define g xmm6
%define h xmm7
%define a0 xmm8
%define a1 xmm9
%define a2 xmm10
%define TT0 xmm14
%define TT1 xmm13
%define TT2 xmm12
%define TT3 xmm11
%define TT4 xmm10
%define TT5 xmm9
%define T1 xmm14
%define TMP xmm15
%define SZ2 2*SHA512_DIGEST_WORD_SIZE ; Size of one vector register
%define ROUNDS 80*SZ2
; Define stack usage
struc STACK
_DATA: resb SZ2 * 16
_DIGEST: resb SZ2 * NUM_SHA512_DIGEST_WORDS
resb 8 ; for alignment, must be odd multiple of 8
endstruc
%define VMOVPD vmovupd
; transpose r0, r1, t0
; Input looks like {r0 r1}
; r0 = {a1 a0}
; r1 = {b1 b0}
;
; output looks like
; r0 = {b0, a0}
; t0 = {b1, a1}
%macro TRANSPOSE 3
%define %%r0 %1
%define %%r1 %2
%define %%t0 %3
vshufpd %%t0, %%r0, %%r1, 11b ; t0 = b1 a1
vshufpd %%r0, %%r0, %%r1, 00b ; r0 = b0 a0
%endm
%macro ROTATE_ARGS 0
%xdefine TMP_ h
%xdefine h g
%xdefine g f
%xdefine f e
%xdefine e d
%xdefine d c
%xdefine c b
%xdefine b a
%xdefine a TMP_
%endm
; PRORQ reg, imm, tmp
; packed-rotate-right-double
; does a rotate by doing two shifts and an or
%macro PRORQ 3
%define %%reg %1
%define %%imm %2
%define %%tmp %3
vpsllq %%tmp, %%reg, (64-(%%imm))
vpsrlq %%reg, %%reg, %%imm
vpor %%reg, %%reg, %%tmp
%endmacro
; non-destructive
; PRORQ_nd reg, imm, tmp, src
%macro PRORQ_nd 4
%define %%reg %1
%define %%imm %2
%define %%tmp %3
%define %%src %4
vpsllq %%tmp, %%src, (64-(%%imm))
vpsrlq %%reg, %%src, %%imm
vpor %%reg, %%reg, %%tmp
%endmacro
; PRORQ dst/src, amt
%macro PRORQ 2
PRORQ %1, %2, TMP
%endmacro
; PRORQ_nd dst, src, amt
%macro PRORQ_nd 3
PRORQ_nd %1, %3, TMP, %2
%endmacro
;; arguments passed implicitly in preprocessor symbols i, a...h
%macro ROUND_00_15 2
%define %%T1 %1
%define %%i %2
PRORQ_nd a0, e, (18-14) ; sig1: a0 = (e >> 4)
vpxor a2, f, g ; ch: a2 = f^g
vpand a2, a2, e ; ch: a2 = (f^g)&e
vpxor a2, a2, g ; a2 = ch
PRORQ_nd a1, e, 41 ; sig1: a1 = (e >> 41)
vmovdqa [SZ2*(%%i&0xf) + rsp + _DATA],%%T1
vpaddq %%T1,%%T1,[TBL + ROUND] ; T1 = W + K
vpxor a0, a0, e ; sig1: a0 = e ^ (e >> 5)
PRORQ a0, 14 ; sig1: a0 = (e >> 14) ^ (e >> 18)
vpaddq h, h, a2 ; h = h + ch
PRORQ_nd a2, a, (34-28) ; sig0: a2 = (a >> 6)
vpaddq h, h, %%T1 ; h = h + ch + W + K
vpxor a0, a0, a1 ; a0 = sigma1
vmovdqa %%T1, a ; maj: T1 = a
PRORQ_nd a1, a, 39 ; sig0: a1 = (a >> 39)
vpxor %%T1, %%T1, c ; maj: T1 = a^c
add ROUND, SZ2 ; ROUND++
vpand %%T1, %%T1, b ; maj: T1 = (a^c)&b
vpaddq h, h, a0
vpaddq d, d, h
vpxor a2, a2, a ; sig0: a2 = a ^ (a >> 11)
PRORQ a2, 28 ; sig0: a2 = (a >> 28) ^ (a >> 34)
vpxor a2, a2, a1 ; a2 = sig0
vpand a1, a, c ; maj: a1 = a&c
vpor a1, a1, %%T1 ; a1 = maj
vpaddq h, h, a1 ; h = h + ch + W + K + maj
vpaddq h, h, a2 ; h = h + ch + W + K + maj + sigma0
ROTATE_ARGS
%endm
;; arguments passed implicitly in preprocessor symbols i, a...h
%macro ROUND_16_XX 2
%define %%T1 %1
%define %%i %2
vmovdqa %%T1, [SZ2*((%%i-15)&0xf) + rsp + _DATA]
vmovdqa a1, [SZ2*((%%i-2)&0xf) + rsp + _DATA]
vmovdqa a0, %%T1
PRORQ %%T1, 8-1
vmovdqa a2, a1
PRORQ a1, 61-19
vpxor %%T1, %%T1, a0
PRORQ %%T1, 1
vpxor a1, a1, a2
PRORQ a1, 19
vpsrlq a0, a0, 7
vpxor %%T1, %%T1, a0
vpsrlq a2, a2, 6
vpxor a1, a1, a2
vpaddq %%T1, %%T1, [SZ2*((%%i-16)&0xf) + rsp + _DATA]
vpaddq a1, a1, [SZ2*((%%i-7)&0xf) + rsp + _DATA]
vpaddq %%T1, %%T1, a1
ROUND_00_15 %%T1, %%i
%endm
;; SHA512_ARGS:
;; UINT128 digest[8]; // transposed digests
;; UINT8 *data_ptr[2];
;;
;; void sha512_x2_avx(SHA512_ARGS *args, UINT64 msg_size_in_blocks)
;; arg 1 : STATE : pointer args
;; arg 2 : INP_SIZE : size of data in blocks (assumed >= 1)
;;
MKGLOBAL(sha512_x2_avx,function,internal)
align 32
sha512_x2_avx:
; general registers preserved in outer calling routine
; outer calling routine saves all the XMM registers
sub rsp, STACK_size
;; Load the pre-transposed incoming digest.
vmovdqa a,[STATE + 0 * SHA512_DIGEST_ROW_SIZE]
vmovdqa b,[STATE + 1 * SHA512_DIGEST_ROW_SIZE]
vmovdqa c,[STATE + 2 * SHA512_DIGEST_ROW_SIZE]
vmovdqa d,[STATE + 3 * SHA512_DIGEST_ROW_SIZE]
vmovdqa e,[STATE + 4 * SHA512_DIGEST_ROW_SIZE]
vmovdqa f,[STATE + 5 * SHA512_DIGEST_ROW_SIZE]
vmovdqa g,[STATE + 6 * SHA512_DIGEST_ROW_SIZE]
vmovdqa h,[STATE + 7 * SHA512_DIGEST_ROW_SIZE]
lea TBL,[rel K512_2]
;; load the address of each of the 2 message lanes
;; getting ready to transpose input onto stack
mov inp0,[STATE + _data_ptr_sha512 +0*PTR_SZ]
mov inp1,[STATE + _data_ptr_sha512 +1*PTR_SZ]
xor IDX, IDX
lloop:
xor ROUND, ROUND
;; save old digest
vmovdqa [rsp + _DIGEST + 0*SZ2], a
vmovdqa [rsp + _DIGEST + 1*SZ2], b
vmovdqa [rsp + _DIGEST + 2*SZ2], c
vmovdqa [rsp + _DIGEST + 3*SZ2], d
vmovdqa [rsp + _DIGEST + 4*SZ2], e
vmovdqa [rsp + _DIGEST + 5*SZ2], f
vmovdqa [rsp + _DIGEST + 6*SZ2], g
vmovdqa [rsp + _DIGEST + 7*SZ2], h
%assign i 0
%rep 8
;; load up the shuffler for little-endian to big-endian format
vmovdqa TMP, [rel PSHUFFLE_BYTE_FLIP_MASK]
VMOVPD TT0,[inp0+IDX+i*16] ;; double precision is 64 bits
VMOVPD TT2,[inp1+IDX+i*16]
TRANSPOSE TT0, TT2, TT1
vpshufb TT0, TT0, TMP
vpshufb TT1, TT1, TMP
ROUND_00_15 TT0,(i*2+0)
ROUND_00_15 TT1,(i*2+1)
%assign i (i+1)
%endrep
;; Increment IDX by message block size == 8 (loop) * 16 (XMM width in bytes)
add IDX, 8 * 16
%assign i (i*4)
jmp Lrounds_16_xx
align 16
Lrounds_16_xx:
%rep 16
ROUND_16_XX T1, i
%assign i (i+1)
%endrep
cmp ROUND,ROUNDS
jb Lrounds_16_xx
;; add old digest
vpaddq a, a, [rsp + _DIGEST + 0*SZ2]
vpaddq b, b, [rsp + _DIGEST + 1*SZ2]
vpaddq c, c, [rsp + _DIGEST + 2*SZ2]
vpaddq d, d, [rsp + _DIGEST + 3*SZ2]
vpaddq e, e, [rsp + _DIGEST + 4*SZ2]
vpaddq f, f, [rsp + _DIGEST + 5*SZ2]
vpaddq g, g, [rsp + _DIGEST + 6*SZ2]
vpaddq h, h, [rsp + _DIGEST + 7*SZ2]
sub INP_SIZE, 1 ;; consumed one message block
jne lloop
; write back to memory (state object) the transposed digest
vmovdqa [STATE+0*SHA512_DIGEST_ROW_SIZE],a
vmovdqa [STATE+1*SHA512_DIGEST_ROW_SIZE],b
vmovdqa [STATE+2*SHA512_DIGEST_ROW_SIZE],c
vmovdqa [STATE+3*SHA512_DIGEST_ROW_SIZE],d
vmovdqa [STATE+4*SHA512_DIGEST_ROW_SIZE],e
vmovdqa [STATE+5*SHA512_DIGEST_ROW_SIZE],f
vmovdqa [STATE+6*SHA512_DIGEST_ROW_SIZE],g
vmovdqa [STATE+7*SHA512_DIGEST_ROW_SIZE],h
; update input pointers
add inp0, IDX
mov [STATE + _data_ptr_sha512 + 0*PTR_SZ], inp0
add inp1, IDX
mov [STATE + _data_ptr_sha512 + 1*PTR_SZ], inp1
;;;;;;;;;;;;;;;;
;; Postamble
;; Clear stack frame ((16 + 8)*16 bytes)
%ifdef SAFE_DATA
clear_all_xmms_avx_asm
%assign i 0
%rep (16+NUM_SHA512_DIGEST_WORDS)
vmovdqa [rsp + i*SZ2], xmm0
%assign i (i+1)
%endrep
%endif
add rsp, STACK_size
; outer calling routine restores XMM and other GP registers
ret
%ifdef LINUX
section .note.GNU-stack noalloc noexec nowrite progbits
%endif
| 25.412533 | 81 | 0.678311 |
6bcb75a05c26368fbd222eb11d5267d2a39a02d0 | 24,976 | asm | Assembly | add/clean-run-time-system/acompact_rmark_prefetch.asm | ErinvanderVeen/C-to-Clean | 5fcecc9f4f82d8c8c228792bd691a353d2821efa | [
"MIT"
] | null | null | null | add/clean-run-time-system/acompact_rmark_prefetch.asm | ErinvanderVeen/C-to-Clean | 5fcecc9f4f82d8c8c228792bd691a353d2821efa | [
"MIT"
] | null | null | null | add/clean-run-time-system/acompact_rmark_prefetch.asm | ErinvanderVeen/C-to-Clean | 5fcecc9f4f82d8c8c228792bd691a353d2821efa | [
"MIT"
] | null | null | null |
_TEXT ends
_DATA segment
rmarkp_n_queue_items_16:
dq 0
rmarkp_queue_first:
dq 0
rmarkp_queue:
dq 0,0,0,0,0,0,0,0
dq 0,0,0,0,0,0,0,0
dq 0,0,0,0,0,0,0,0
dq 0,0,0,0,0,0,0,0
_DATA ends
_TEXT segment
rmarkp_stack_nodes1:
mov rbx,qword ptr [rcx]
lea rax,1[rsi]
mov qword ptr [rsi],rbx
mov qword ptr [rcx],rax
rmarkp_next_stack_node:
add rsi,8
rmarkp_stack_nodes:
cmp rsi,qword ptr end_vector+0
je end_rmarkp_nodes
rmarkp_more_stack_nodes:
mov rcx,qword ptr [rsi]
mov rax,qword ptr neg_heap_p3+0
add rax,rcx
cmp rax,qword ptr heap_size_64_65+0
jnc rmarkp_next_stack_node
mov rbx,rax
and rax,31*8
shr rbx,8
ifdef PIC
lea r9,bit_set_table2+0
mov eax,dword ptr [r9+rax]
else
mov eax,dword ptr (bit_set_table2)[rax]
endif
mov ebp,dword ptr [rdi+rbx*4]
test rbp,rax
jne rmarkp_stack_nodes1
or rbp,rax
mov dword ptr [rdi+rbx*4],ebp
mov rax,qword ptr [rcx]
call rmarkp_stack_node
add rsi,8
cmp rsi,qword ptr end_vector+0
jne rmarkp_more_stack_nodes
ret
rmarkp_stack_node:
sub rsp,16
mov qword ptr [rsi],rax
lea rbp,1[rsi]
mov qword ptr 8[rsp],rsi
mov rbx,-1
mov qword ptr [rsp],0
mov qword ptr [rcx],rbp
jmp rmarkp_no_reverse
rmarkp_node_d1:
mov rax,qword ptr neg_heap_p3+0
add rax,rcx
cmp rax,qword ptr heap_size_64_65+0
jnc rmarkp_next_node
jmp rmarkp_node_
rmarkp_hnf_2:
lea rbx,8[rcx]
mov rax,qword ptr 8[rcx]
sub rsp,16
mov rsi,rcx
mov rcx,qword ptr [rcx]
mov qword ptr 8[rsp],rbx
mov qword ptr [rsp],rax
cmp rsp,qword ptr end_stack+0
jb rmark_using_reversal
rmarkp_node:
mov rax,qword ptr neg_heap_p3+0
add rax,rcx
cmp rax,qword ptr heap_size_64_65+0
jnc rmarkp_next_node
mov rbx,rsi
rmarkp_node_:
mov rdx,rax
and rax,31*8
shr rdx,8
ifdef PIC
lea r9,bit_set_table2+0
mov eax,dword ptr [r9+rax]
else
mov eax,dword ptr (bit_set_table2)[rax]
endif
test eax,dword ptr [rdi+rdx*4]
jne rmarkp_reverse_and_mark_next_node
mov rbp,qword ptr rmarkp_queue_first+0
mov rdx,qword ptr rmarkp_n_queue_items_16+0
prefetch [rcx]
ifdef PIC
lea r9,rmarkp_queue+0
mov qword ptr [r9+rbp],rcx
mov qword ptr 8[r9+rbp],rsi
mov qword ptr 16[r9+rbp],rbx
else
mov qword ptr rmarkp_queue[rbp],rcx
mov qword ptr rmarkp_queue+8[rbp],rsi
mov qword ptr rmarkp_queue+16[rbp],rbx
endif
lea rbx,[rbp+rdx]
add rbp,32
and rbp,7*32
and rbx,7*32
mov qword ptr rmarkp_queue_first+0,rbp
cmp rdx,-(4*32)
je rmarkp_last_item_in_queue
rmarkp_add_items:
mov rcx,[rsp]
cmp rcx,1
jbe rmarkp_add_stacked_item
mov rsi,8[rsp]
add rsp,16
mov rax,qword ptr neg_heap_p3+0
add rax,rcx
cmp rax,qword ptr heap_size_64_65+0
jnc rmarkp_add_items
mov rdx,rax
and rax,31*8
shr rdx,8
ifdef PIC
lea r9,bit_set_table2+0
mov eax,dword ptr [r9+rax]
else
mov eax,dword ptr bit_set_table2[rax]
endif
mov ebp,dword ptr [rdi+rdx*4]
test rbp,rax
je rmarkp_add_item
cmp rcx,rsi
ja rmarkp_add_items
mov rax,[rcx]
mov [rsi],rax
add rsi,1
mov [rcx],rsi
jmp rmarkp_add_items
rmarkp_add_stacked_item:
je rmarkp_last_item_in_queue
rmarkp_add_items2:
mov rsi,8[rsp]
add rsi,8
cmp rsi,qword ptr end_vector+0
je rmarkp_last_item_in_queue
mov rcx,[rsi]
mov 8[rsp],rsi
mov rax,qword ptr neg_heap_p3+0
add rax,rcx
cmp rax,qword ptr heap_size_64_65+0
jnc rmarkp_add_items2
mov rdx,rax
and rax,31*8
shr rdx,8
ifdef PIC
lea r9,bit_set_table2+0
mov eax,dword ptr [r9+rax]
else
mov eax,dword ptr bit_set_table2[rax]
endif
mov ebp,dword ptr [rdi+rdx*4]
test rbp,rax
je rmarkp_add_item2
mov rax,[rcx]
mov [rsi],rax
add rsi,1
mov [rcx],rsi
jmp rmarkp_add_items2
rmarkp_add_item2:
prefetch [rcx]
mov rbp,qword ptr rmarkp_queue_first+0
mov rdx,qword ptr rmarkp_n_queue_items_16+0
ifdef PIC
lea r9,rmarkp_queue+0
mov qword ptr [r9+rbp],rcx
mov qword ptr 8[r9+rbp],rsi
mov qword ptr 16[r9+rbp],-1
else
mov qword ptr rmarkp_queue[rbp],rcx
mov qword ptr rmarkp_queue+8[rbp],rsi
mov qword ptr rmarkp_queue+16[rbp],-1
endif
add rbp,32
and rbp,7*32
sub rdx,32
mov qword ptr rmarkp_queue_first+0,rbp
mov qword ptr rmarkp_n_queue_items_16+0,rdx
cmp rdx,-(4*32)
jne rmarkp_add_items2
jmp rmarkp_last_item_in_queue
rmarkp_add_items3:
mov rsi,8[rsp]
add rsi,8
cmp rsi,24[rsp]
je rmarkp_last_item_in_queue
mov rcx,[rsi]
mov 8[rsp],rsi
mov rax,qword ptr neg_heap_p3+0
add rax,rcx
cmp rax,qword ptr heap_size_64_65+0
jnc rmarkp_add_items3
mov rdx,rax
and rax,31*8
shr rdx,8
ifdef PIC
lea r9,bit_set_table2+0
mov eax,dword ptr [r9+rax]
else
mov eax,dword ptr bit_set_table2[rax]
endif
mov ebp,[rdi+rdx*4]
test rbp,rax
je rmarkp_add_item3
cmp rcx,rsi
ja rmarkp_add_items3
mov rax,[rcx]
mov [rsi],rax
add rsi,1
mov [rcx],rsi
jmp rmarkp_add_items3
rmarkp_add_item3:
prefetch [rcx]
mov rbp,qword ptr rmarkp_queue_first+0
mov rdx,qword ptr rmarkp_n_queue_items_16+0
ifdef PIC
lea r9,rmarkp_queue+0
mov qword ptr [r9+rbp],rcx
mov qword ptr 8[r9+rbp],rsi
mov qword ptr 16[r9+rbp],rsi
else
mov qword ptr rmarkp_queue[rbp],rcx
mov qword ptr rmarkp_queue+8[rbp],rsi
mov qword ptr rmarkp_queue+16[rbp],rsi
endif
add rbp,32
and rbp,7*32
sub rdx,32
mov qword ptr rmarkp_queue_first+0,rbp
mov qword ptr rmarkp_n_queue_items_16+0,rdx
cmp rdx,-(4*32)
jne rmarkp_add_items3
jmp rmarkp_last_item_in_queue
rmarkp_add_item:
prefetch [rcx]
mov rbp,qword ptr rmarkp_queue_first+0
mov rdx,qword ptr rmarkp_n_queue_items_16+0
ifdef PIC
lea r9,rmarkp_queue+0
mov qword ptr [r9+rbp],rcx
mov qword ptr 8[r9+rbp],rsi
mov qword ptr 16[r9+rbp],rsi
else
mov qword ptr rmarkp_queue[rbp],rcx
mov qword ptr rmarkp_queue+8[rbp],rsi
mov qword ptr rmarkp_queue+16[rbp],rsi
endif
add rbp,32
and rbp,7*32
sub rdx,32
mov qword ptr rmarkp_queue_first+0,rbp
mov qword ptr rmarkp_n_queue_items_16+0,rdx
cmp rdx,-(4*32)
jne rmarkp_add_items
rmarkp_last_item_in_queue:
ifdef PIC
lea r9,rmarkp_queue+0
mov rcx,qword ptr [r9+rbx]
else
mov rcx,qword ptr rmarkp_queue[rbx]
endif
mov rax,qword ptr neg_heap_p3+0
ifdef PIC
mov rsi,qword ptr 8[r9+rbx]
mov rbx,qword ptr 16[r9+rbx]
else
mov rsi,qword ptr rmarkp_queue+8[rbx]
mov rbx,qword ptr rmarkp_queue+16[rbx]
endif
add rax,rcx
rmarkp_node_no_prefetch:
mov rdx,rax
and rax,31*8
shr rdx,8
ifdef PIC
lea r9,bit_set_table2+0
mov eax,dword ptr [r9+rax]
else
mov eax,dword ptr (bit_set_table2)[rax]
endif
mov ebp,dword ptr [rdi+rdx*4]
test rbp,rax
jne rmarkp_reverse_and_mark_next_node
or rbp,rax
mov dword ptr [rdi+rdx*4],ebp
mov rax,qword ptr [rcx]
rmarkp_arguments:
cmp rcx,rbx
ja rmarkp_no_reverse
lea rbp,1[rsi]
mov qword ptr [rsi],rax
mov qword ptr [rcx],rbp
rmarkp_no_reverse:
test al,2
je rmarkp_lazy_node
movzx rbp,word ptr (-2)[rax]
test rbp,rbp
je rmarkp_hnf_0
add rcx,8
cmp rbp,256
jae rmarkp_record
sub rbp,2
je rmarkp_hnf_2
jc rmarkp_hnf_1
rmarkp_hnf_3:
mov rdx,qword ptr 8[rcx]
rmarkp_hnf_3_:
cmp rsp,qword ptr end_stack+0
jb rmark_using_reversal_
mov rax,qword ptr neg_heap_p3+0
add rax,rdx
mov rbx,rax
and rax,31*8
shr rbx,8
ifdef PIC
lea r9,bit_set_table2+0
mov eax,dword ptr [r9+rax]
else
mov eax,dword ptr (bit_set_table2)[rax]
endif
test eax,[rdi+rbx*4]
jne rmarkp_shared_argument_part
or dword ptr [rdi+rbx*4],eax
rmarkp_no_shared_argument_part:
sub rsp,16
mov qword ptr 8[rsp],rcx
lea rsi,8[rcx]
mov rcx,qword ptr [rcx]
lea rdx,[rdx+rbp*8]
mov qword ptr [rsp],rcx
rmarkp_push_hnf_args:
mov rbx,qword ptr [rdx]
sub rsp,16
mov qword ptr 8[rsp],rdx
sub rdx,8
mov qword ptr [rsp],rbx
sub rbp,1
jg rmarkp_push_hnf_args
mov rcx,qword ptr [rdx]
cmp rdx,rsi
ja rmarkp_no_reverse_argument_pointer
lea rbp,3[rsi]
mov qword ptr [rsi],rcx
mov qword ptr [rdx],rbp
mov rax,qword ptr neg_heap_p3+0
add rax,rcx
cmp rax,qword ptr heap_size_64_65+0
jnc rmarkp_next_node
mov rbx,rdx
jmp rmarkp_node_
rmarkp_no_reverse_argument_pointer:
mov rsi,rdx
mov rax,qword ptr neg_heap_p3+0
add rax,rcx
cmp rax,qword ptr heap_size_64_65+0
jnc rmarkp_next_node
mov rbx,rsi
jmp rmarkp_node_no_prefetch
rmarkp_shared_argument_part:
cmp rdx,rcx
ja rmarkp_hnf_1
mov rbx,qword ptr [rdx]
lea rax,(8+2+1)[rcx]
mov qword ptr [rdx],rax
mov qword ptr 8[rcx],rbx
jmp rmarkp_hnf_1
rmarkp_record:
sub rbp,258
je rmarkp_record_2
jb rmarkp_record_1
rmarkp_record_3:
movzx rbp,word ptr (-2+2)[rax]
mov rdx,qword ptr (16-8)[rcx]
sub rbp,1
jb rmarkp_record_3_bb
je rmarkp_record_3_ab
sub rbp,1
je rmarkp_record_3_aab
jmp rmarkp_hnf_3_
rmarkp_record_3_bb:
sub rcx,8
mov rax,qword ptr neg_heap_p3+0
add rax,rdx
mov rbp,rax
and rax,31*8
shr rbp,8
ifdef PIC
lea r9,bit_set_table2+0
mov eax,dword ptr [r9+rax]
else
mov eax,dword ptr (bit_set_table2)[rax]
endif
or dword ptr [rdi+rbp*4],eax
cmp rdx,rcx
ja rmarkp_next_node
add eax,eax
jne rmarkp_bit_in_same_word1
inc rbp
mov rax,1
rmarkp_bit_in_same_word1:
test eax,dword ptr [rdi+rbp*4]
je rmarkp_not_yet_linked_bb
mov rax,qword ptr neg_heap_p3+0
add rax,rcx
add rax,16
mov rbp,rax
and rax,31*8
shr rbp,8
ifdef PIC
lea r9,bit_set_table2+0
mov eax,dword ptr [r9+rax]
else
mov eax,dword ptr (bit_set_table2)[rax]
endif
or dword ptr [rdi+rbp*4],eax
mov rbp,qword ptr [rdx]
lea rax,(16+2+1)[rcx]
mov qword ptr 16[rcx],rbp
mov qword ptr [rdx],rax
jmp rmarkp_next_node
rmarkp_not_yet_linked_bb:
or dword ptr [rdi+rbp*4],eax
mov rbp,qword ptr [rdx]
lea rax,(16+2+1)[rcx]
mov qword ptr 16[rcx],rbp
mov qword ptr [rdx],rax
jmp rmarkp_next_node
rmarkp_record_3_ab:
mov rax,qword ptr neg_heap_p3+0
add rax,rdx
mov rbp,rax
and rax,31*8
shr rbp,8
ifdef PIC
lea r9,bit_set_table2+0
mov eax,dword ptr [r9+rax]
else
mov eax,dword ptr (bit_set_table2)[rax]
endif
or dword ptr [rdi+rbp*4],eax
cmp rdx,rcx
ja rmarkp_hnf_1
add eax,eax
jne rmarkp_bit_in_same_word2
inc rbp
mov rax,1
rmarkp_bit_in_same_word2:
test eax,dword ptr [rdi+rbp*4]
je rmarkp_not_yet_linked_ab
mov rax,qword ptr neg_heap_p3+0
add rax,rcx
add rax,8
mov rbp,rax
and rax,31*8
shr rbp,8
ifdef PIC
lea r9,bit_set_table2+0
mov eax,dword ptr [r9+rax]
else
mov eax,dword ptr (bit_set_table2)[rax]
endif
or dword ptr [rdi+rbp*4],eax
mov rbp,qword ptr [rdx]
lea rax,(8+2+1)[rcx]
mov qword ptr 8[rcx],rbp
mov qword ptr [rdx],rax
jmp rmarkp_hnf_1
rmarkp_not_yet_linked_ab:
or dword ptr [rdi+rbp*4],eax
mov rbp,qword ptr [rdx]
lea rax,(8+2+1)[rcx]
mov qword ptr 8[rcx],rbp
mov qword ptr [rdx],rax
jmp rmarkp_hnf_1
rmarkp_record_3_aab:
cmp rsp,qword ptr end_stack+0
jb rmark_using_reversal_
mov rax,qword ptr neg_heap_p3+0
add rax,rdx
mov rbp,rax
and rax,31*8
shr rbp,8
ifdef PIC
lea r9,bit_set_table2+0
mov eax,dword ptr [r9+rax]
else
mov eax,dword ptr (bit_set_table2)[rax]
endif
test eax,dword ptr [rdi+rbp*4]
jne rmarkp_shared_argument_part
or dword ptr [rdi+rbp*4],eax
sub rsp,16
mov qword ptr 8[rsp],rcx
lea rsi,8[rcx]
mov rcx,qword ptr [rcx]
mov qword ptr [rsp],rcx
mov rcx,qword ptr [rdx]
cmp rdx,rsi
ja rmarkp_no_reverse_argument_pointer
lea rbp,3[rsi]
mov qword ptr [rsi],rcx
mov qword ptr [rdx],rbp
mov rax,qword ptr neg_heap_p3+0
add rax,rcx
cmp rax,qword ptr heap_size_64_65+0
jnc rmarkp_next_node
mov rbx,rdx
jmp rmarkp_node_
rmarkp_record_2:
cmp word ptr (-2+2)[rax],1
ja rmarkp_hnf_2
je rmarkp_hnf_1
jmp rmarkp_next_node
rmarkp_record_1:
cmp word ptr (-2+2)[rax],0
jne rmarkp_hnf_1
jmp rmarkp_next_node
rmarkp_lazy_node_1:
; selectors:
jne rmarkp_selector_node_1
rmarkp_hnf_1:
mov rsi,rcx
mov rcx,qword ptr [rcx]
jmp rmarkp_node
; selectors
rmarkp_indirection_node:
mov rdx,qword ptr neg_heap_p3+0
sub rcx,8
add rdx,rcx
mov rbp,rdx
and rbp,31*8
shr rdx,8
ifdef PIC
lea r9,bit_clear_table2+0
mov ebp,dword ptr [r9+rbp]
else
mov ebp,dword ptr (bit_clear_table2)[rbp]
endif
and dword ptr [rdi+rdx*4],ebp
mov rdx,rcx
cmp rcx,rbx
mov rcx,qword ptr 8[rcx]
mov qword ptr [rsi],rcx
ja rmarkp_node_d1
mov qword ptr [rdx],rax
jmp rmarkp_node_d1
rmarkp_selector_node_1:
add rbp,3
je rmarkp_indirection_node
mov rdx,qword ptr [rcx]
mov qword ptr pointer_compare_address+0,rbx
mov rbx,qword ptr neg_heap_p3+0
add rbx,rdx
shr rbx,3
add rbp,1
jle rmarkp_record_selector_node_1
mov rbp,rbx
shr rbx,5
and rbp,31
ifdef PIC
lea r9,bit_set_table+0
mov ebp,dword ptr [r9+rbp*4]
else
mov ebp,dword ptr (bit_set_table)[rbp*4]
endif
mov ebx,dword ptr [rdi+rbx*4]
and rbx,rbp
jne rmarkp_hnf_1
mov rbx,qword ptr [rdx]
test bl,2
je rmarkp_hnf_1
cmp word ptr (-2)[rbx],2
jbe rmarkp_small_tuple_or_record
rmarkp_large_tuple_or_record:
mov d2,qword ptr 16[rdx]
mov rbx,qword ptr neg_heap_p3+0
add rbx,d2
shr rbx,3
mov rbp,rbx
shr rbx,5
and rbp,31
ifdef PIC
lea r9,bit_set_table+0
mov ebp,dword ptr [r9+rbp*4]
else
mov ebp,dword ptr (bit_set_table)[rbp*4]
endif
mov ebx,dword ptr [rdi+rbx*4]
and rbx,rbp
jne rmarkp_hnf_1
ifdef NEW_DESCRIPTORS
mov rbx,qword ptr neg_heap_p3+0
lea rbx,(-8)[rcx+rbx]
ifdef PIC
movsxd d3,dword ptr(-8)[rax]
add rax,d3
else
mov eax,(-8)[rax]
endif
mov d3,rbx
and d3,31*8
shr rbx,8
ifdef PIC
lea r9,bit_clear_table2+0
mov d3d,dword ptr [r9+d3]
else
mov d3d,dword ptr (bit_clear_table2)[d3]
endif
and dword ptr [rdi+rbx*4],d3d
ifdef PIC
movzx eax,word ptr (4-8)[rax]
else
movzx eax,word ptr 4[rax]
endif
mov rbx,qword ptr pointer_compare_address+0
ifdef PIC
lea r9,__indirection+0
mov qword ptr (-8)[rcx],r9
else
mov qword ptr (-8)[rcx],offset __indirection
endif
cmp rax,16
jl rmarkp_tuple_or_record_selector_node_2
mov rdx,rcx
je rmarkp_tuple_selector_node_2
mov rcx,qword ptr (-24)[d2+rax]
mov qword ptr [rsi],rcx
mov qword ptr [rdx],rcx
jmp rmarkp_node_d1
rmarkp_tuple_selector_node_2:
mov rcx,qword ptr [d2]
mov qword ptr [rsi],rcx
mov qword ptr [rdx],rcx
jmp rmarkp_node_d1
else
rmarkp_small_tuple_or_record:
mov rbx,qword ptr neg_heap_p3
lea rbx,(-8)[rcx+rbx]
push rcx
mov rcx,rbx
and rcx,31*8
shr rbx,8
mov ecx,dword ptr (bit_clear_table2)[rcx]
and dword ptr [rdi+rbx*4],ecx
mov eax,(-8)[rax]
mov rcx,rdx
push rsi
mov eax,4[rax]
call near ptr rax
pop rsi
pop rdx
mov qword ptr [rsi],rcx
mov rbx,qword ptr pointer_compare_address+0
mov qword ptr (-8)[rdx],offset __indirection
mov qword ptr [rdx],rcx
jmp rmarkp_node_d1
endif
rmarkp_record_selector_node_1:
je rmarkp_strict_record_selector_node_1
mov rbp,rbx
shr rbx,5
and rbp,31
ifdef PIC
lea r9,bit_set_table+0
mov ebp,dword ptr [r9+rbp*4]
else
mov ebp,dword ptr (bit_set_table)[rbp*4]
endif
mov ebx,dword ptr [rdi+rbx*4]
and rbx,rbp
jne rmarkp_hnf_1
mov rbx,qword ptr [rdx]
test bl,2
je rmarkp_hnf_1
cmp word ptr (-2)[rbx],258
jbe rmarkp_small_tuple_or_record
ifdef NEW_DESCRIPTORS
mov d2,qword ptr 16[rdx]
mov rbx,qword ptr neg_heap_p3+0
add rbx,d2
shr rbx,3
mov rbp,rbx
shr rbx,5
and rbp,31
ifdef PIC
lea r9,bit_set_table+0
mov ebp,dword ptr [r9+rbp*4]
else
mov ebp,dword ptr (bit_set_table)[rbp*4]
endif
mov ebx,dword ptr [rdi+rbx*4]
and rbx,rbp
jne rmarkp_hnf_1
rmarkp_small_tuple_or_record:
mov rbx,qword ptr neg_heap_p3+0
lea rbx,(-8)[rcx+rbx]
ifdef PIC
movsxd d3,dword ptr(-8)[rax]
add rax,d3
else
mov eax,(-8)[rax]
endif
mov d3,rbx
and d3,31*8
shr rbx,8
ifdef PIC
lea r9,bit_clear_table2+0
mov d3d,dword ptr [r9+d3]
else
mov d3d,dword ptr (bit_clear_table2)[d3]
endif
and dword ptr [rdi+rbx*4],d3d
ifdef PIC
movzx eax,word ptr (4-8)[rax]
else
movzx eax,word ptr 4[rax]
endif
mov rbx,qword ptr pointer_compare_address+0
ifdef PIC
lea r9,__indirection+0
mov qword ptr (-8)[rcx],r9
else
mov qword ptr (-8)[rcx],offset __indirection
endif
cmp rax,16
jle rmarkp_tuple_or_record_selector_node_2
mov rdx,d2
sub rax,24
rmarkp_tuple_or_record_selector_node_2:
mov rbp,rcx
mov rcx,qword ptr [rdx+rax]
mov qword ptr [rsi],rcx
mov qword ptr [rbp],rcx
mov rdx,rbp
jmp rmarkp_node_d1
else
jmp rmarkp_large_tuple_or_record
endif
rmarkp_strict_record_selector_node_1:
mov rbp,rbx
shr rbx,5
and rbp,31
ifdef PIC
lea r9,bit_set_table+0
mov ebp,dword ptr [r9+rbp*4]
else
mov ebp,dword ptr (bit_set_table)[rbp*4]
endif
mov ebx,dword ptr [rdi+rbx*4]
and rbx,rbp
jne rmarkp_hnf_1
mov rbx,qword ptr [rdx]
test bl,2
je rmarkp_hnf_1
cmp word ptr (-2)[rbx],258
jbe rmarkp_select_from_small_record
mov d2,qword ptr 16[rdx]
mov rbx,qword ptr neg_heap_p3+0
add rbx,d2
mov rbp,rbx
shr rbx,8
and rbp,31*8
ifdef PIC
lea r9,bit_set_table2+0
mov ebp,dword ptr [r9+rbp]
else
mov ebp,dword ptr (bit_set_table2)[rbp]
endif
mov ebx,dword ptr [rdi+rbx*4]
and rbx,rbp
jne rmarkp_hnf_1
rmarkp_select_from_small_record:
ifdef PIC
movsxd rbx,dword ptr(-8)[rax]
add rbx,rax
else
mov ebx,(-8)[rax]
endif
sub rcx,8
cmp rcx,qword ptr pointer_compare_address+0
ja rmarkp_selector_pointer_not_reversed
ifdef NEW_DESCRIPTORS
ifdef PIC
movzx eax,word ptr (4-8)[rbx]
else
movzx eax,word ptr 4[rbx]
endif
cmp rax,16
jle rmarkp_strict_record_selector_node_2
mov rax,qword ptr (-24)[d2+rax]
jmp rmarkp_strict_record_selector_node_3
rmarkp_strict_record_selector_node_2:
mov rax,qword ptr [rdx+rax]
rmarkp_strict_record_selector_node_3:
mov qword ptr 8[rcx],rax
ifdef PIC
movzx eax,word ptr (6-8)[rbx]
else
movzx eax,word ptr 6[rbx]
endif
test rax,rax
je rmarkp_strict_record_selector_node_5
cmp rax,16
jle rmarkp_strict_record_selector_node_4
mov rdx,d2
sub rax,24
rmarkp_strict_record_selector_node_4:
mov rax,qword ptr [rdx+rax]
mov qword ptr 16[rcx],rax
rmarkp_strict_record_selector_node_5:
ifdef PIC
mov rax,qword ptr ((-8)-8)[rbx]
else
mov rax,qword ptr (-8)[rbx]
endif
else
mov qword ptr [rcx],rax
mov qword ptr [rsi],rcx
push rsi
mov ebx,4[rbx]
call near ptr rbx
pop rsi
mov rax,qword ptr [rcx]
endif
add rsi,1
mov qword ptr [rcx],rsi
mov qword ptr (-1)[rsi],rax
jmp rmarkp_next_node
rmarkp_selector_pointer_not_reversed:
ifdef NEW_DESCRIPTORS
ifdef PIC
movzx eax,word ptr (4-8)[rbx]
else
movzx eax,word ptr 4[rbx]
endif
cmp rax,16
jle rmarkp_strict_record_selector_node_6
mov rax,qword ptr (-24)[d2+rax]
jmp rmarkp_strict_record_selector_node_7
rmarkp_strict_record_selector_node_6:
mov rax,qword ptr [rdx+rax]
rmarkp_strict_record_selector_node_7:
mov qword ptr 8[rcx],rax
ifdef PIC
movzx eax,word ptr (6-8)[rbx]
else
movzx eax,word ptr 6[rbx]
endif
test rax,rax
je rmarkp_strict_record_selector_node_9
cmp rax,16
jle rmarkp_strict_record_selector_node_8
mov rdx,d2
sub rax,24
rmarkp_strict_record_selector_node_8:
mov rax,qword ptr [rdx+rax]
mov qword ptr 16[rcx],rax
rmarkp_strict_record_selector_node_9:
ifdef PIC
mov rax,qword ptr ((-8)-8)[rbx]
else
mov rax,qword ptr (-8)[rbx]
endif
mov qword ptr [rcx],rax
else
mov ebx,4[rbx]
call near ptr rbx
endif
jmp rmarkp_next_node
rmarkp_reverse_and_mark_next_node:
cmp rcx,rbx
ja rmarkp_next_node
mov rax,qword ptr [rcx]
mov qword ptr [rsi],rax
add rsi,1
mov qword ptr [rcx],rsi
; %rbp ,%rbx : free
rmarkp_next_node:
mov rcx,qword ptr [rsp]
mov rsi,qword ptr 8[rsp]
add rsp,16
cmp rcx,1
ja rmarkp_node
rmarkp_next_node_:
mov rdx,qword ptr rmarkp_n_queue_items_16+0
test rdx,rdx
je end_rmarkp_nodes
sub rsp,16
mov rbp,qword ptr rmarkp_queue_first+0
lea rbx,[rbp+rdx]
add rdx,32
and rbx,7*32
mov qword ptr rmarkp_n_queue_items_16+0,rdx
jmp rmarkp_last_item_in_queue
end_rmarkp_nodes:
ret
rmarkp_lazy_node:
movsxd rbp,dword ptr (-4)[rax]
test rbp,rbp
je rmarkp_next_node
add rcx,8
sub rbp,1
jle rmarkp_lazy_node_1
cmp rbp,255
jge rmarkp_closure_with_unboxed_arguments
rmarkp_closure_with_unboxed_arguments_:
lea rcx,[rcx+rbp*8]
rmarkp_push_lazy_args:
mov rbx,qword ptr [rcx]
sub rsp,16
mov qword ptr 8[rsp],rcx
sub rcx,8
mov qword ptr [rsp],rbx
sub rbp,1
jg rmarkp_push_lazy_args
mov rsi,rcx
mov rcx,qword ptr [rcx]
cmp rsp,qword ptr end_stack+0
jae rmarkp_node
jmp rmark_using_reversal
rmarkp_closure_with_unboxed_arguments:
; (a_size+b_size)+(b_size<<8)
; addl $1,%rbp
mov rax,rbp
and rbp,255
shr rax,8
sub rbp,rax
; subl $1,%rbp
jg rmarkp_closure_with_unboxed_arguments_
je rmarkp_hnf_1
jmp rmarkp_next_node
rmarkp_hnf_0:
ifdef PIC
lea r9,dINT+2+0
cmp rax,r9
else
cmp rax,offset dINT+2
endif
je rmarkp_int_3
ifdef PIC
lea r9,CHAR+2+0
cmp rax,r9
else
cmp rax,offset CHAR+2
endif
je rmarkp_char_3
jb rmarkp_no_normal_hnf_0
mov rbp,qword ptr neg_heap_p3+0
add rbp,rcx
mov rdx,rbp
and rdx,31*8
shr rbp,8
ifdef PIC
lea r9,bit_clear_table2+0
mov edx,dword ptr [r9+rdx]
else
mov edx,dword ptr (bit_clear_table2)[rdx]
endif
and dword ptr [rdi+rbp*4],edx
ifdef NEW_DESCRIPTORS
lea rdx,((-8)-2)[rax]
else
lea rdx,((-12)-2)[rax]
endif
mov qword ptr [rsi],rdx
cmp rcx,rbx
ja rmarkp_next_node
mov qword ptr [rcx],rax
jmp rmarkp_next_node
rmarkp_int_3:
mov rbp,qword ptr 8[rcx]
cmp rbp,33
jnc rmarkp_next_node
shl rbp,4
ifdef PIC
lea rdx,small_integers+0
add rdx,rbp
else
lea rdx,(small_integers)[rbp]
endif
mov rbp,qword ptr neg_heap_p3+0
mov qword ptr [rsi],rdx
add rbp,rcx
mov rdx,rbp
and rdx,31*8
shr rbp,8
ifdef PIC
lea r9,bit_clear_table2+0
mov edx,dword ptr [r9+rdx]
else
mov edx,dword ptr (bit_clear_table2)[rdx]
endif
and dword ptr [rdi+rbp*4],edx
cmp rcx,rbx
ja rmarkp_next_node
mov qword ptr [rcx],rax
jmp rmarkp_next_node
rmarkp_char_3:
movzx rdx,byte ptr 8[rcx]
mov rbp,qword ptr neg_heap_p3+0
shl rdx,4
add rbp,rcx
ifdef PIC
lea r9,static_characters+0
add rdx,r9
else
add rdx,offset static_characters
endif
mov qword ptr [rsi],rdx
mov rdx,rbp
and rdx,31*8
shr rbp,8
ifdef PIC
lea r9,bit_clear_table2+0
mov edx,dword ptr [r9+rdx]
else
mov edx,dword ptr (bit_clear_table2)[rdx]
endif
and dword ptr [rdi+rbp*4],edx
cmp rcx,rbx
ja rmarkp_next_node
mov qword ptr [rcx],rax
jmp rmarkp_next_node
rmarkp_no_normal_hnf_0:
lea r9,__ARRAY__+2+0
cmp rax,r9
jne rmarkp_next_node
mov rax,qword ptr 16[rcx]
test rax,rax
je rmarkp_lazy_array
movzx rdx,word ptr (-2+2)[rax]
test rdx,rdx
je rmarkp_b_array
movzx rax,word ptr (-2)[rax]
test rax,rax
je rmarkp_b_array
cmp rsp,qword ptr end_stack+0
jb rmark_array_using_reversal
sub rax,256
cmp rdx,rax
mov rbx,rdx
je rmarkp_a_record_array
rmarkp_ab_record_array:
mov rdx,qword ptr 8[rcx]
add rcx,16
push rcx
imul rdx,rax
shl rdx,3
sub rax,rbx
add rcx,8
add rdx,rcx
call reorder
pop rcx
mov rax,rbx
imul rax,qword ptr (-8)[rcx]
jmp rmarkp_lr_array
rmarkp_b_array:
mov rax,qword ptr neg_heap_p3+0
add rax,rcx
add rax,8
mov rbp,rax
and rax,31*8
shr rbp,8
ifdef PIC
lea r9,bit_set_table2+0
mov eax,dword ptr [r9+rax]
else
mov eax,dword ptr (bit_set_table2)[rax]
endif
or dword ptr [rdi+rbp*4],eax
jmp rmarkp_next_node
rmarkp_a_record_array:
mov rax,qword ptr 8[rcx]
add rcx,16
cmp rbx,2
jb rmarkp_lr_array
imul rax,rbx
jmp rmarkp_lr_array
rmarkp_lazy_array:
cmp rsp,qword ptr end_stack+0
jb rmark_array_using_reversal
mov rax,qword ptr 8[rcx]
add rcx,16
rmarkp_lr_array:
mov rbx,qword ptr neg_heap_p3+0
add rbx,rcx
shr rbx,3
add rbx,rax
mov rdx,rbx
and rbx,31
shr rdx,5
ifdef PIC
lea r9,bit_set_table+0
mov ebx,dword ptr [r9+rbx*4]
else
mov ebx,dword ptr (bit_set_table)[rbx*4]
endif
or dword ptr [rdi+rdx*4],ebx
cmp rax,1
jbe rmarkp_array_length_0_1
mov rdx,rcx
lea rcx,[rcx+rax*8]
mov rax,qword ptr [rcx]
mov rbx,qword ptr [rdx]
mov qword ptr [rdx],rax
mov qword ptr [rcx],rbx
mov rax,qword ptr (-8)[rcx]
sub rcx,8
mov rbx,qword ptr (-8)[rdx]
sub rdx,8
mov qword ptr [rcx],rbx
mov qword ptr [rdx],rax
push rcx
mov rsi,rdx
jmp rmarkp_array_nodes
rmarkp_array_nodes1:
cmp rcx,rsi
ja rmarkp_next_array_node
mov rbx,qword ptr [rcx]
lea rax,1[rsi]
mov qword ptr [rsi],rbx
mov qword ptr [rcx],rax
rmarkp_next_array_node:
add rsi,8
cmp rsi,qword ptr [rsp]
je end_rmarkp_array_node
rmarkp_array_nodes:
mov rcx,qword ptr [rsi]
mov rax,qword ptr neg_heap_p3+0
add rax,rcx
cmp rax,qword ptr heap_size_64_65+0
jnc rmarkp_next_array_node
mov rbx,rax
and rax,31*8
shr rbx,8
ifdef PIC
lea r9,bit_set_table2+0
mov eax,dword ptr [r9+rax]
else
mov eax,dword ptr (bit_set_table2)[rax]
endif
mov ebp,dword ptr [rdi+rbx*4]
test rbp,rax
jne rmarkp_array_nodes1
or rbp,rax
mov dword ptr [rdi+rbx*4],ebp
mov rax,qword ptr [rcx]
call rmarkp_array_node
add rsi,8
cmp rsi,qword ptr [rsp]
jne rmarkp_array_nodes
end_rmarkp_array_node:
add rsp,8
jmp rmarkp_next_node
rmarkp_array_node:
sub rsp,16
mov qword ptr 8[rsp],rsi
mov rbx,rsi
mov qword ptr [rsp],1
jmp rmarkp_arguments
rmarkp_array_length_0_1:
lea rcx,-16[rcx]
jb rmarkp_next_node
mov rbx,qword ptr 24[rcx]
mov rbp,qword ptr 16[rcx]
mov qword ptr 24[rcx],rbp
mov rbp,qword ptr 8[rcx]
mov qword ptr 16[rcx],rbp
mov qword ptr 8[rcx],rbx
add rcx,8
jmp rmarkp_hnf_1
| 17.236715 | 45 | 0.738229 |
a8c14cc680e464e1d7f8b9a85fe3b4731c64e3b6 | 302 | asm | Assembly | tests/cases/6502_test_13.asm | shazz/shazzam | bd9801f1be5a8b58d0b2f20a937d3a446a0c5f5a | [
"MIT"
] | null | null | null | tests/cases/6502_test_13.asm | shazz/shazzam | bd9801f1be5a8b58d0b2f20a937d3a446a0c5f5a | [
"MIT"
] | null | null | null | tests/cases/6502_test_13.asm | shazz/shazzam | bd9801f1be5a8b58d0b2f20a937d3a446a0c5f5a | [
"MIT"
] | null | null | null | # 6502 Test #13
# Heather Justice 4/10/08
# Tests SEI & CLI & SED & CLD.
# Assumes prior tests pass...
#
test: SEI()
78
test: SED()
f8
test: PHP()
08
test: PLA()
68
test: STA(at(0x20))
85
20
test: CLI()
58
test: CLD()
d8
test: PHP()
08
test: PLA()
68
test: ADC(at(0x20))
65
20
test: STA(at(0x21))
85
21 | 10.066667 | 30 | 0.629139 |
075fa871a5fedd4bb61f8c586963481b2c40ac77 | 586 | asm | Assembly | programs/oeis/312/A312891.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/312/A312891.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/312/A312891.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A312891: Coordination sequence Gal.6.216.5 where G.u.t.v denotes the coordination sequence for a vertex of type v in tiling number t in the Galebach list of u-uniform tilings.
; 1,4,9,13,17,21,25,29,33,37,42,46,50,55,59,63,67,71,75,79,83,88,92,96,101,105,109,113,117,121,125,129,134,138,142,147,151,155,159,163,167,171,175,180,184,188,193,197,201,205
mov $4,$0
sub $0,1
mov $2,11
lpb $0,1
sub $0,1
add $3,1
lpb $2,1
sub $0,1
div $1,5
mul $2,$1
mov $5,$0
sub $0,4
lpe
trn $0,2
mov $1,$5
sub $2,7
mov $5,1
lpe
mov $1,$3
mov $6,$4
mul $6,4
add $1,$6
| 22.538462 | 177 | 0.631399 |
8b7c6447300a5874d58cbd7ebc18590fea93e101 | 7,428 | asm | Assembly | c2000/C2000Ware_1_00_06_00/libraries/math/CLAmath/c28/source/CLAcos.asm | ramok/Themis_ForHPSDR | d0f323a843ac0a488ef816ccb7c828032855a40a | [
"Unlicense"
] | null | null | null | c2000/C2000Ware_1_00_06_00/libraries/math/CLAmath/c28/source/CLAcos.asm | ramok/Themis_ForHPSDR | d0f323a843ac0a488ef816ccb7c828032855a40a | [
"Unlicense"
] | null | null | null | c2000/C2000Ware_1_00_06_00/libraries/math/CLAmath/c28/source/CLAcos.asm | ramok/Themis_ForHPSDR | d0f323a843ac0a488ef816ccb7c828032855a40a | [
"Unlicense"
] | 1 | 2021-07-21T08:10:37.000Z | 2021-07-21T08:10:37.000Z | ;;#############################################################################
;; FILE: CLAcos.asm
;;
;; DESCRIPTION: CLA cosine function
;;
;; Group: C2000
;; Target Family: C28x+CLA
;;
;;#############################################################################
;; $TI Release: CLA Math Library 4.02.02.00 $
;; $Release Date: Oct 18, 2018 $
;; $Copyright: Copyright (C) 2018 Texas Instruments Incorporated -
;; http://www.ti.com/ ALL RIGHTS RESERVED $
;;#############################################################################
.cdecls C,LIST,"CLAmath.h"
.include "CLAeabi.asm"
;;----------------------------------------------------------------------------
;; Description: Implement cosine using taylor series expansion:
;;
;; rad = K + X
;;
;; Cos(rad) = Cos(K) - Sin(K)*X
;; - Cos(K)*X^2/2!
;; + Sin(K)*X^3/3!
;; + Cos(K)*X^4/4!
;; - Sin(K)*X^5/5!
;;
;; = Cos(K) + X*(-1.0*Sin(K)
;; + X*(-0.5*Cos(K)
;; + X*(0.166666*Sin(K)
;; + X*(0.04166666*Cos(K)
;; + X*(-0.00833333*Sin(K))))))
;;
;; = Cos(K) + X*(-Sin(K)
;; + X*(Coef0*Cos(K)
;; + X*(Coef1_pos*Sin(K)
;; + X*(Coef2*Cos(K)
;; + X*(Coef3_neg*Sin(K))))))
;;
;;
;; Equation: y = Cos(rad)
;;
;; Regs Used: MR0, MR1, MR2
;;
;; Input: rad f32 value in memory
;;
;; // TABLE_SIZE = 128
;; CLAsincosTable.Sin0 = 0.0; // sin( 0 * 2*pi/TABLE_SIZE)
;; CLAsincosTable.Sin1 = 0.04906767432742; // sin( 1 * 2*pi/TABLE_SIZE)
;; ...
;; CLAsincosTable.Sin31 = 0.9987954562052; // sin( 31 * 2*pi/TABLE_SIZE)
;; CLAsincosTable.Cos0 = 1.0; // sin( 32 * 2*pi/TABLE_SIZE)
;; CLAsincosTable.Sin33 = 0.9987954562052; // sin( 33 * 2*pi/TABLE_SIZE)
;; ...
;; CLAsincosTable.Sin63 = 0.04906767432742; // sin( 63 * 2*pi/TABLE_SIZE)
;; CLAsincosTable.Sin64 = 0.0; // sin( 64 * 2*pi/TABLE_SIZE)
;; CLAsincosTable.Sin65 = -0.04906767432742; // sin( 65 * 2*pi/TABLE_SIZE)
;; ...
;; CLAsincosTable.Sin95 = -0.9987954562052; // sin( 95 * 2*pi/TABLE_SIZE)
;; CLAsincosTable.Sin96 = -1.0; // sin( 96 * 2*pi/TABLE_SIZE)
;; CLAsincosTable.Sin97 = -0.9987954562052; // sin( 97 * 2*pi/TABLE_SIZE)
;; ...
;; CLAsincosTable.Sin127 = -0.04906767432742; // sin(127 * 2*pi/TABLE_SIZE)
;; CLAsincosTable.Cos96 = 0.0; // sin( 0 * 2*pi/TABLE_SIZE)
;; CLAsincosTable.Cos97 = 0.04906767432742; // sin( 1 * 2*pi/TABLE_SIZE)
;; ...
;; CLAsincosTable.Cos127 = 0.9987954562052; // sin( 31 * 2*pi/TABLE_SIZE)
;; CLAsincosTable.Cos128 = 1.0; // sin( 32 * 2*pi/TABLE_SIZE)
;;
;; // TABLE_SIZE/Pi
;; // 2*Pi/TABLE_SIZE
;; // TABLE_MASK = (TABLE_SIZE*2 - 1) & 0xFFFFFFFE;;
;;
;; CLAsincosTable.TABLE_SIZEDivPi = 40.74366543152;
;; CLAsincosTable.TwoPiDivTABLE_SIZE = 0.04908738521234;
;; CLAsincosTable.TABLE_MASK = 0x000000FE;
;; CLAsincosTable.Coef0 = -0.5;
;; CLAsincosTable.Coef1 = -0.1666666666666;
;; CLAsincosTable.Coef1_pos = 0.1666666666666;
;; CLAsincosTable.Coef2 = 4.1666666666666e-2;
;; CLAsincosTable.Coef3 = 8.3333333333333e-3;
;; CLAsincosTable.Coef3_neg = -8.3333333333333e-3;
;;
;; Output: y f32 value in memory
;; MR0 = y f32 result
;;
;; Benchmark: Cycles = 28
;; Instructions = 28
;;
;; Scratchpad Usage: (Local Function Scratchpad Pointer (SP))
;;
;; |_______|<- MR3 (SP+0)
;;
;;----------------------------------------------------------------------------
.def _CLAcos
.sect "Cla1Prog:_CLAcos"
.align 2
.def __cla_CLAcos_sp
__cla_CLAcos_sp .usect ".scratchpad:Cla1Prog:_CLAcos",2,0,1
_CLAcos:
.asmfunc
.asg __cla_CLAcos_sp + 0, _save_MR3
; Context Save
MMOV32 @_save_MR3, MR3
; MR0 = rad(fAngleRad)
; MR1 = TABLE_SIZE/(2*Pi)
; MR1 = rad*TABLE_SIZE/(2*Pi)
; MR2 = TABLE_MASK
MMOV32 MR1,@_CLAsincosTable_TABLE_SIZEDivTwoPi
MMPYF32 MR1,MR0,MR1
|| MMOV32 MR2,@_CLAsincosTable_TABLE_MASK
; MR3 = K = integer(rad*TABLE_SIZE/(2*Pi))
; MR3 = K & TABLE_MASK
; MR3 = K * 2
; MAR0 = address of Sin(K)
; MR1 = frac(TABLE_SIZE*rad/2*Pi)
; MR0 = 2*Pi/TABLE_SIZE
; MR1 = X = frac(TABLE_SIZE*rad/2*Pi) * (2*Pi/TABLE_SIZE)
; MR0 = Coef3_neg
MF32TOI32 MR3,MR1
MAND32 MR3,MR3,MR2
MLSL32 MR3,#1
MMOV16 MAR0,MR3,#_CLAsincosTable_Sin0
MFRACF32 MR1,MR1
MMOV32 MR0,@_CLAsincosTable_TwoPiDivTABLE_SIZE
MMPYF32 MR1,MR1,MR0
|| MMOV32 MR0,@_CLAsincosTable_Coef3_neg
; MR2 = Sin(K)
; MR3 = Coef3_neg*Sin(K)
; MR2 = Cos(K)
; MR3 = X*Coef3_neg*Sin(K)
MMOV32 MR2,*MAR0[#+64]++
MMPYF32 MR3,MR0,MR2
|| MMOV32 MR2,*MAR0[#-64]++
MMPYF32 MR3,MR3,MR1
|| MMOV32 MR0,@_CLAsincosTable_Coef2
; MR2 = Coef2*Cos(K)
; MR3 = Coef2*Cos(K) + X*Coef3_neg*Sin(K)
; MR2 = Sin(K)
; MR3 = X*Coef2*Cos(K) + X^2*Coef3_neg*Sin(K)
MMPYF32 MR2,MR0,MR2
MADDF32 MR3,MR3,MR2
|| MMOV32 MR2,*MAR0[#+64]++
MMPYF32 MR3,MR3,MR1
|| MMOV32 MR0,@_CLAsincosTable_Coef1_pos
; MR2 = Coef1_pos*Sin(K)
; MR3 = Coef1_pos*Sin(K) + X*Coef2*Cos(K) + X^2*Coef3_neg*Sin(K)
; MR2 = Cos(K)
; MR3 = X*Coef1_pos*Sin(K) + X^2*Coef2*Cos(K) + X^3*Coef3_neg*Sin(K)
MMPYF32 MR2,MR0,MR2
MADDF32 MR3,MR3,MR2
|| MMOV32 MR2,*MAR0[#-64]++
MMPYF32 MR3,MR3,MR1
|| MMOV32 MR0,@_CLAsincosTable_Coef0
; MR2 = Coef0*Cos(K)
; MR3 = Coef0*Cos(K) + X*Coef1_pos*Sin(K) + X^2*Coef2*Cos(K)
; + X^3*Coef3_neg*Sin(K)
;
; MR2 = Sin(K)
; MR3 = X*Coef0*Cos(K) + X^2*Coef1_pos*Sin(K)
; + X^3*Coef2*Cos(K) + X^4*Coef3_neg*Sin(K)
MMPYF32 MR2,MR0,MR2
MADDF32 MR3,MR3,MR2
|| MMOV32 MR2,*MAR0[#+64]++
MMPYF32 MR3,MR3,MR1
; MR3 = -Sin(K) + X^1*Coef0*Cos(K) + X^2*Coef1_pos*Sin(K)
; + X^3*Coef2*Cos(K) + X^4*Coef3_neg*Sin(K)
;
; MR3 = -X*Sin(K) + X^2*Coef0*Cos(K) + X^3*Coef1_pos*Sin(K)
; + X^4*Coef2*Cos(K) + X^5*Coef3_neg*Sin(K)
;
; MR2 = Cos(K)
MSUBF32 MR3,MR3,MR2
MMPYF32 MR3,MR3,MR1
|| MMOV32 MR2,*MAR0[#0]++
; Context Restore and Final Operations
MRCNDD UNC
; MR3 = Cos(K) - X*Sin(K) + X^2*Coef0*Cos(K) + X^3*Coef1_pos*Sin(K)
; + X^4*Coef2*Cos(K) + X^5*Coef3_neg*Sin(K)
; Store Y = Cos(rad)
MADDF32 MR3,MR2,MR3
MMOV32 MR0,MR3
MMOV32 MR3,@_save_MR3
.unasg _save_MR3
.endasmfunc
;; End of File
| 36.955224 | 96 | 0.470921 |
2ed5ff79f895bcdb6ecbda92b63cb40e83aad88f | 508 | asm | Assembly | programs/oeis/108/A108854.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/108/A108854.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/108/A108854.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A108854: Numbers n such that 10*n - 127 is prime.
; 13,14,15,17,18,20,21,23,24,29,30,32,35,36,39,41,42,44,48,50,51,56,57,59,63,65,69,72,74,77,78,80,81,86,87,90,95,98,99,101,108,111,114,116,119,122,123,125,128,129,132,134,135,141,143,150,155,156,158,161,162
mov $1,2
mov $2,$0
add $2,2
pow $2,2
lpb $2
sub $2,1
mov $3,$1
seq $3,10051 ; Characteristic function of primes: 1 if n is prime, else 0.
sub $0,$3
add $1,5
mov $4,$0
max $4,0
cmp $4,$0
mul $2,$4
lpe
div $1,10
add $1,13
mov $0,$1
| 23.090909 | 206 | 0.627953 |
235d4b60435473be2c1ddd5cbe2b185747956430 | 1,650 | asm | Assembly | programs/oeis/017/A017010.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/017/A017010.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/017/A017010.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A017010: a(n) = (7*n+2)^6.
; 64,531441,16777216,148035889,729000000,2565726409,7256313856,17596287801,38068692544,75418890625,139314069504,243087455521,404567235136,646990183449,1000000000000,1500730351849,2194972623936,3138428376721,4398046511104,6053445140625,8198418170944,10942526586601,14412774445056,18755369578009,24137569000000,30749609024289,38806720086016,48551226272641,60254729561664,74220378765625,90785223184384,110322650964681,133244912166976,160005726539569,191102976000000,227081481823729,268535866540096,316113500535561,370517533364224,432510009765625,502915070389824,582622237229761,672589783760896,773848189788129,887503681000000,1014741853230169,1156831381426176,1315127813325481,1491077447838784,1686221298140625,1902199139467264,2140753641621841,2403734586186816,2693103168443689,3010936384000000,3359431500123609,3740910611784256,4157825282402401,4612761269305344,5108443333890625,5647740136496704,6233669215980921,6869402054004736,7558269224026249,8303765625000000,9109555799784049,9979479338254336,10917556365126321,11927993112483904,13015187577015625,14183735261958144,15438435003747001,16784294883374656,18226538222455809,19770609664000000,21422181337891489,23187159111076416,25071688922457241,27082163202494464,29225227377515625,31507786458731584,33937011715960081,36520347436056576,39265517766052369,42180533641000000,45273699796525929,48553621866090496,52029213562955161,55709703946857024,59604644775390625,63723917940097024,68077742987260161,72676684723410496,77531660905535929,82653950016000000,88055199122167369,93747431820736576,99743056266780081,106054873287491584,112696084580640625
mul $0,7
add $0,2
pow $0,6
| 235.714286 | 1,592 | 0.920606 |
2447d3e3aacf3c6b7539779a2b5cb53f40bdcd07 | 527 | asm | Assembly | oeis/303/A303788.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/303/A303788.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/303/A303788.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A303788: a(n) = Sum_{i=0..m} d(i)*5^i, where Sum_{i=0..m} d(i)*6^i is the base-6 representation of n.
; Submitted by Jamie Morken(w3)
; 0,1,2,3,4,5,5,6,7,8,9,10,10,11,12,13,14,15,15,16,17,18,19,20,20,21,22,23,24,25,25,26,27,28,29,30,25,26,27,28,29,30,30,31,32,33,34,35,35,36,37,38,39,40,40,41,42,43,44,45,45,46,47,48,49,50,50,51,52,53,54,55,50,51,52,53,54,55,55,56,57,58,59,60,60,61,62,63,64,65,65,66,67,68,69,70,70,71,72,73
mov $3,1
lpb $0
mov $2,$0
div $0,6
mod $2,6
mul $2,$3
add $1,$2
mul $3,5
lpe
mov $0,$1
| 35.133333 | 290 | 0.612903 |
f63590188d36846f895d1e061a855300434b47f9 | 5,259 | asm | Assembly | Transynther/x86/_processed/NC/_st_zr_sm_/i3-7100_9_0x84_notsx.log_2_2899.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NC/_st_zr_sm_/i3-7100_9_0x84_notsx.log_2_2899.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NC/_st_zr_sm_/i3-7100_9_0x84_notsx.log_2_2899.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r12
push %r13
push %r8
push %r9
push %rax
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_WT_ht+0xf1b2, %r13
clflush (%r13)
and %r9, %r9
mov $0x6162636465666768, %rdi
movq %rdi, %xmm1
vmovups %ymm1, (%r13)
nop
nop
nop
nop
xor %rax, %rax
lea addresses_WC_ht+0x14132, %r12
nop
add $13444, %rdx
movb $0x61, (%r12)
nop
sub %r12, %r12
lea addresses_D_ht+0x4932, %r8
nop
nop
nop
nop
nop
sub %rdi, %rdi
vmovups (%r8), %ymm7
vextracti128 $1, %ymm7, %xmm7
vpextrq $1, %xmm7, %r12
add %rdi, %rdi
lea addresses_D_ht+0x1e332, %rsi
lea addresses_UC_ht+0x739c, %rdi
nop
nop
nop
nop
nop
xor $18646, %r8
mov $50, %rcx
rep movsb
cmp $32278, %r13
lea addresses_normal_ht+0x19c34, %r13
nop
nop
xor $8576, %rdi
movw $0x6162, (%r13)
nop
nop
nop
nop
dec %r8
lea addresses_UC_ht+0x1e532, %rsi
lea addresses_WC_ht+0x14332, %rdi
nop
nop
nop
and $38278, %rdx
mov $73, %rcx
rep movsl
nop
nop
nop
nop
nop
xor $47911, %rsi
lea addresses_WT_ht+0xc85a, %rsi
lea addresses_normal_ht+0x5532, %rdi
cmp $46138, %rax
mov $87, %rcx
rep movsw
add %rcx, %rcx
lea addresses_UC_ht+0x11fb2, %rax
nop
cmp $17075, %r13
mov $0x6162636465666768, %rdx
movq %rdx, %xmm4
and $0xffffffffffffffc0, %rax
vmovaps %ymm4, (%rax)
nop
nop
add %r8, %r8
lea addresses_D_ht+0x14fd2, %r12
nop
nop
nop
nop
nop
dec %rdi
movb (%r12), %r13b
nop
sub $21515, %rdx
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rax
pop %r9
pop %r8
pop %r13
pop %r12
ret
.global s_faulty_load
s_faulty_load:
push %r12
push %r13
push %r14
push %r8
push %r9
push %rbp
push %rbx
// Store
mov $0x8e1620000000932, %r8
dec %r12
movb $0x51, (%r8)
nop
nop
add $349, %r9
// Store
lea addresses_normal+0xa6b2, %r14
nop
nop
nop
nop
and %r12, %r12
movw $0x5152, (%r14)
nop
nop
nop
nop
nop
and $2976, %r9
// Load
lea addresses_normal+0x10532, %r14
nop
nop
nop
nop
sub $61317, %r13
mov (%r14), %r8d
xor %r14, %r14
// Load
lea addresses_D+0x15d32, %rbp
nop
nop
nop
nop
nop
and $27794, %r9
mov (%rbp), %r12w
nop
nop
nop
nop
nop
and $48972, %r8
// Store
lea addresses_WC+0x10732, %r8
nop
nop
and %r13, %r13
movl $0x51525354, (%r8)
nop
nop
nop
nop
nop
add %r8, %r8
// Store
lea addresses_WT+0x1a072, %r12
nop
nop
nop
nop
nop
inc %r8
mov $0x5152535455565758, %r9
movq %r9, %xmm0
vmovups %ymm0, (%r12)
nop
nop
nop
nop
nop
and %r14, %r14
// Store
lea addresses_PSE+0x1e6ca, %r8
and $3484, %r12
movw $0x5152, (%r8)
nop
nop
nop
and %r12, %r12
// Store
lea addresses_US+0x10416, %r8
nop
nop
nop
nop
nop
cmp %r9, %r9
movb $0x51, (%r8)
nop
nop
nop
nop
nop
cmp %r13, %r13
// Faulty Load
mov $0x8e1620000000932, %r8
nop
cmp $51235, %r12
mov (%r8), %r9d
lea oracles, %rbp
and $0xff, %r9
shlq $12, %r9
mov (%rbp,%r9,1), %r9
pop %rbx
pop %rbp
pop %r9
pop %r8
pop %r14
pop %r13
pop %r12
ret
/*
<gen_faulty_load>
[REF]
{'src': {'type': 'addresses_NC', 'same': False, 'size': 8, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'dst': {'type': 'addresses_NC', 'same': True, 'size': 1, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_normal', 'same': False, 'size': 2, 'congruent': 7, 'NT': True, 'AVXalign': False}, 'OP': 'STOR'}
{'src': {'type': 'addresses_normal', 'same': False, 'size': 4, 'congruent': 9, 'NT': False, 'AVXalign': True}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_D', 'same': False, 'size': 2, 'congruent': 9, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'dst': {'type': 'addresses_WC', 'same': False, 'size': 4, 'congruent': 7, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_WT', 'same': False, 'size': 32, 'congruent': 3, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_PSE', 'same': False, 'size': 2, 'congruent': 3, 'NT': True, 'AVXalign': False}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_US', 'same': False, 'size': 1, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
[Faulty Load]
{'src': {'type': 'addresses_NC', 'same': True, 'size': 4, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'dst': {'type': 'addresses_WT_ht', 'same': False, 'size': 32, 'congruent': 6, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_WC_ht', 'same': False, 'size': 1, 'congruent': 10, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'src': {'type': 'addresses_D_ht', 'same': False, 'size': 32, 'congruent': 11, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_D_ht', 'congruent': 9, 'same': False}, 'dst': {'type': 'addresses_UC_ht', 'congruent': 0, 'same': False}, 'OP': 'REPM'}
{'dst': {'type': 'addresses_normal_ht', 'same': False, 'size': 2, 'congruent': 0, 'NT': True, 'AVXalign': False}, 'OP': 'STOR'}
{'src': {'type': 'addresses_UC_ht', 'congruent': 10, 'same': False}, 'dst': {'type': 'addresses_WC_ht', 'congruent': 9, 'same': False}, 'OP': 'REPM'}
{'src': {'type': 'addresses_WT_ht', 'congruent': 3, 'same': True}, 'dst': {'type': 'addresses_normal_ht', 'congruent': 9, 'same': False}, 'OP': 'REPM'}
{'dst': {'type': 'addresses_UC_ht', 'same': False, 'size': 32, 'congruent': 7, 'NT': False, 'AVXalign': True}, 'OP': 'STOR'}
{'src': {'type': 'addresses_D_ht', 'same': False, 'size': 1, 'congruent': 5, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'00': 1, '51': 1}
00 51
*/
| 19.334559 | 151 | 0.642327 |
10637a9578ab5b3a4bfb5b87c0e81ec8d7f2061d | 697 | asm | Assembly | programs/oeis/192/A192243.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/192/A192243.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/192/A192243.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A192243: 0-sequence of reduction of Lucas sequence by x^2 -> x+1.
; 1,1,5,12,34,88,233,609,1597,4180,10946,28656,75025,196417,514229,1346268,3524578,9227464,24157817,63245985,165580141,433494436,1134903170,2971215072,7778742049,20365011073,53316291173,139583862444,365435296162,956722026040,2504730781961,6557470319841,17167680177565,44945570212852,117669030460994,308061521170128,806515533049393,2111485077978049,5527939700884757
mov $3,2
mov $5,$0
lpb $3,1
mov $0,$5
sub $3,1
add $0,$3
cal $0,141752 ; a(n) = Sum_{k=0..n} [ Fibonacci(2k-1) + (n-k)*Fibonacci(2k) ].
div $0,2
mov $2,$3
mov $4,$0
lpb $2,1
mov $1,$4
sub $2,1
lpe
lpe
lpb $5,1
sub $1,$4
mov $5,0
lpe
| 30.304348 | 364 | 0.71736 |
7eb7b71f80e3b14bce91ff5f8f6482699b49ce9e | 752 | asm | Assembly | oeis/250/A250661.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/250/A250661.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/250/A250661.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A250661: Number of (7+1) X (n+1) 0..1 arrays with nondecreasing x(i,j)-x(i,j-1) in the i direction and nondecreasing min(x(i,j),x(i-1,j)) in the j direction.
; 639,1150,1789,2556,3451,4474,5625,6904,8311,9846,11509,13300,15219,17266,19441,21744,24175,26734,29421,32236,35179,38250,41449,44776,48231,51814,55525,59364,63331,67426,71649,76000,80479,85086,89821,94684,99675,104794,110041,115416,120919,126550,132309,138196,144211,150354,156625,163024,169551,176206,182989,189900,196939,204106,211401,218824,226375,234054,241861,249796,257859,266050,274369,282816,291391,300094,308925,317884,326971,336186,345529,355000,364599,374326,384181,394164,404275,414514
mov $2,$0
add $0,4
add $2,3
add $0,$2
mul $0,32
bin $0,2
sub $0,24976
div $0,32
add $0,639
| 57.846154 | 499 | 0.772606 |
73ddb6b60046e9c862972be3c4fdef9fe94e34d6 | 437 | asm | Assembly | programs/oeis/276/A276191.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/276/A276191.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | programs/oeis/276/A276191.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | ; A276191: Sum of the squares of the digits of the base-5 representation of n.
; 0,1,4,9,16,1,2,5,10,17,4,5,8,13,20,9,10,13,18,25,16,17,20,25,32,1,2,5,10,17,2,3,6,11,18,5,6,9,14,21,10,11,14,19,26,17,18,21,26,33,4,5,8,13,20,5,6,9,14,21,8,9,12,17,24,13,14,17,22,29,20,21,24,29,36,9,10,13,18,25,10
lpb $0
mul $0,2
mov $1,$0
div $0,10
mod $1,10
pow $1,2
add $2,$1
lpe
mov $1,272
mov $3,$2
add $3,2
add $1,$3
sub $1,274
div $1,4
| 24.277778 | 215 | 0.608696 |
a70fa7bd56f3c2858444bc8ebb4837d79cd2387a | 3,229 | asm | Assembly | src/bootstub/stub.asm | dc0d32/VCKernel | 364bd31d6c5d20df3179a70b09337efdb12d9b39 | [
"MIT"
] | null | null | null | src/bootstub/stub.asm | dc0d32/VCKernel | 364bd31d6c5d20df3179a70b09337efdb12d9b39 | [
"MIT"
] | null | null | null | src/bootstub/stub.asm | dc0d32/VCKernel | 364bd31d6c5d20df3179a70b09337efdb12d9b39 | [
"MIT"
] | null | null | null |
; irrespective of whether we are (chain)loaded from Windows bootloader or through PXE, we are loaded at 7c0:0
[org 7c00h]
; because i386 is old :P
[CPU P4]
NULL_SEG equ 00h ; unused
CODE_SEG equ 08h ; cs
DATA_SEG equ 10h ; all other segments
section .text
[bits 16]
_entry:
cli ; no interrupts
xor ax, ax
mov ds, ax
lgdt [gdt_desc] ; load GDTR
mov eax, cr0
or al, 1
mov cr0, eax ; set pmode bit
jmp CODE_SEG:clear_pipeline ; far jump ensures a prefetch queue flush and truely enter pmode
[bits 32]
clear_pipeline:
mov ax, DATA_SEG
mov ds, ax
mov es, ax
mov ss, ax
lea esp, [initial_stack_top]
jmp chain
chain:
mov byte [0b8000h], '1' ; just some on-screen deubgging
mov byte [0b8001h], 01bh
EXELOADADDR equ PAYLOAD_ADDRESS ; the load address of payload (kernel) exe
; PE header offsets
sigMZ equ esi
PEheaderOffset equ esi+60
sigPE equ esi
NumSections equ esi+6
BaseOfCode equ esi+52
EntryAddressOffset equ esi+40
SizeOfNT_HEADERS equ 248
SectionSize equ esi+8
SectionBase equ esi+12
SectionFileOffset equ esi+20
SizeOfSECTION_HEADER equ 40
mov esi, EXELOADADDR
mov eax, [sigMZ]
cmp ax, 0x5A4D ; signature check
jnz badPE
mov eax, [PEheaderOffset]
add esi, eax
mov eax, [sigPE]
cmp eax, 0x00004550
jnz badPE
xor edx, edx
mov dx, [NumSections]
mov eax, [BaseOfCode]
mov ebx, [EntryAddressOffset]
add ebx, eax
push ebx
add esi, SizeOfNT_HEADERS
; load each section
.loadloop:
inc BYTE [0xB8000]
mov ecx, [SectionSize]
mov edi, [SectionBase]
add edi, eax
mov ebx, [SectionFileOffset]
add ebx, EXELOADADDR
push esi
mov esi, ebx
rep movsb ; copy each section to its respective load/run address
pop esi
add esi, SizeOfSECTION_HEADER
dec edx
or edx, edx
jnz .loadloop
mov ecx, 0xB8000
mov BYTE [ecx], 'X'
pop ebx ; restore entry
jmp ebx ; jump to entry
; PE image invalid
badPE:
mov eax, 0b8000h
mov byte [eax], '!'
mov byte [eax + 1], 01bh
; spin away!
infloop:
hlt
jmp infloop
; data section
section .data
initial_stack:
times 128 dw 0 ; oughtta be enough
initial_stack_top:
; global descriptor table
gdt:
gdt_null:
dd 0
dd 0
gdt_code:
dw 0FFFFh ; RTFM
dw 0
db 0
db 10011010b
db 11001111b
db 0
gdt_data:
dw 0FFFFh
dw 0
db 0
db 10010010b
db 11001111b
db 0
gdt_end:
gdt_desc: ; The GDT register
dw gdt_end - gdt - 1 ; Limit (size)
dd gdt ; Address of the GDT
align 4
PAYLOAD_ADDRESS: ; this is where the exe is loaded
| 21.965986 | 109 | 0.542893 |
5d0505f286597677db880ef020c468a889fd5513 | 792 | asm | Assembly | programs/oeis/070/A070391.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/070/A070391.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/070/A070391.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A070391: a(n) = 5^n mod 46.
; 1,5,25,33,27,43,31,17,39,11,9,45,41,21,13,19,3,15,29,7,35,37,1,5,25,33,27,43,31,17,39,11,9,45,41,21,13,19,3,15,29,7,35,37,1,5,25,33,27,43,31,17,39,11,9,45,41,21,13,19,3,15,29,7,35,37,1,5,25,33,27,43,31,17,39,11,9,45,41,21,13,19,3,15,29,7,35,37,1,5,25,33,27,43,31,17,39,11,9,45,41,21,13,19,3,15,29,7,35,37,1,5,25,33,27,43,31,17,39,11,9,45,41,21,13,19,3,15,29,7,35,37,1,5,25,33,27,43,31,17,39,11,9,45,41,21,13,19,3,15,29,7,35,37,1,5,25,33,27,43,31,17,39,11,9,45,41,21,13,19,3,15,29,7,35,37,1,5,25,33,27,43,31,17,39,11,9,45,41,21,13,19,3,15,29,7,35,37,1,5,25,33,27,43,31,17,39,11,9,45,41,21,13,19,3,15,29,7,35,37,1,5,25,33,27,43,31,17,39,11,9,45,41,21,13,19,3,15,29,7,35,37,1,5,25,33,27,43,31,17
mov $1,1
mov $2,$0
lpb $2,1
mul $1,5
mod $1,46
sub $2,1
lpe
| 72 | 694 | 0.622475 |
cdd3fd435bae689117f3a46fdf83ca2e403e98dc | 6,862 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_sm_/i7-8650U_0xd2_notsx.log_5916_87.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_sm_/i7-8650U_0xd2_notsx.log_5916_87.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_sm_/i7-8650U_0xd2_notsx.log_5916_87.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r12
push %r13
push %r15
push %r8
push %rcx
push %rdi
push %rsi
lea addresses_A_ht+0xb88c, %r12
nop
nop
nop
nop
nop
xor %r13, %r13
movups (%r12), %xmm5
vpextrq $1, %xmm5, %r8
nop
nop
nop
nop
mfence
lea addresses_WT_ht+0x34c0, %rsi
lea addresses_WT_ht+0x8600, %rdi
nop
nop
add %r12, %r12
mov $38, %rcx
rep movsw
nop
nop
nop
nop
xor $9819, %rcx
lea addresses_D_ht+0x5d10, %rsi
lea addresses_UC_ht+0x3ac0, %rdi
nop
sub %r15, %r15
mov $39, %rcx
rep movsq
and $51904, %rsi
lea addresses_WT_ht+0xd196, %r15
add $45827, %r13
mov (%r15), %r8d
nop
sub %r10, %r10
lea addresses_A_ht+0x15516, %r15
nop
nop
nop
nop
nop
cmp $40348, %rcx
mov $0x6162636465666768, %rsi
movq %rsi, %xmm6
vmovups %ymm6, (%r15)
nop
nop
nop
sub %rcx, %rcx
lea addresses_normal_ht+0x1caa0, %r12
clflush (%r12)
nop
nop
nop
xor %rsi, %rsi
movb $0x61, (%r12)
nop
nop
nop
xor $25401, %rdi
lea addresses_A_ht+0x13b6c, %rsi
lea addresses_normal_ht+0x4140, %rdi
nop
nop
nop
nop
add $49382, %r8
mov $9, %rcx
rep movsl
nop
xor $18249, %r13
lea addresses_WT_ht+0x6b10, %rsi
lea addresses_normal_ht+0x13000, %rdi
nop
nop
nop
nop
nop
cmp %r15, %r15
mov $110, %rcx
rep movsb
nop
nop
nop
nop
nop
xor %r10, %r10
lea addresses_WC_ht+0xabc0, %r10
clflush (%r10)
nop
add $43519, %r13
movups (%r10), %xmm6
vpextrq $1, %xmm6, %r15
nop
nop
nop
nop
and %rsi, %rsi
pop %rsi
pop %rdi
pop %rcx
pop %r8
pop %r15
pop %r13
pop %r12
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r12
push %r13
push %r14
push %r15
push %r9
push %rbx
push %rsi
// Store
lea addresses_A+0x1f2c0, %r15
nop
nop
nop
nop
nop
xor %r14, %r14
movl $0x51525354, (%r15)
nop
nop
nop
nop
nop
xor %r14, %r14
// Store
lea addresses_PSE+0x1f484, %r13
clflush (%r13)
nop
add $30040, %r9
mov $0x5152535455565758, %r15
movq %r15, %xmm2
vmovups %ymm2, (%r13)
nop
xor %r12, %r12
// Faulty Load
lea addresses_A+0x1f2c0, %r12
nop
add %rbx, %rbx
mov (%r12), %r9d
lea oracles, %r14
and $0xff, %r9
shlq $12, %r9
mov (%r14,%r9,1), %r9
pop %rsi
pop %rbx
pop %r9
pop %r15
pop %r14
pop %r13
pop %r12
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'type': 'addresses_A', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': True}}
{'OP': 'STOR', 'dst': {'type': 'addresses_A', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': True}}
{'OP': 'STOR', 'dst': {'type': 'addresses_PSE', 'size': 32, 'AVXalign': False, 'NT': False, 'congruent': 2, 'same': False}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'type': 'addresses_A', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': True}}
<gen_prepare_buffer>
{'OP': 'LOAD', 'src': {'type': 'addresses_A_ht', 'size': 16, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_WT_ht', 'congruent': 9, 'same': False}, 'dst': {'type': 'addresses_WT_ht', 'congruent': 6, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_D_ht', 'congruent': 4, 'same': False}, 'dst': {'type': 'addresses_UC_ht', 'congruent': 11, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_WT_ht', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 1, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_A_ht', 'size': 32, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_normal_ht', 'size': 1, 'AVXalign': False, 'NT': False, 'congruent': 4, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_A_ht', 'congruent': 0, 'same': False}, 'dst': {'type': 'addresses_normal_ht', 'congruent': 6, 'same': True}}
{'OP': 'REPM', 'src': {'type': 'addresses_WT_ht', 'congruent': 3, 'same': False}, 'dst': {'type': 'addresses_normal_ht', 'congruent': 6, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_WC_ht', 'size': 16, 'AVXalign': False, 'NT': False, 'congruent': 6, 'same': True}}
{'54': 5916}
54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54
*/
| 34.656566 | 2,999 | 0.658263 |
04e6e33d07ca65d614ef5d1a07bc3a11fe008c22 | 2,642 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0xca.log_557_164.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0xca.log_557_164.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0xca.log_557_164.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r13
push %r14
push %rax
push %rbx
push %rcx
push %rsi
// Load
lea addresses_US+0x1dfb9, %r11
nop
nop
cmp $54321, %rbx
movups (%r11), %xmm3
vpextrq $1, %xmm3, %r14
nop
cmp $39461, %r14
// Faulty Load
lea addresses_D+0x115e1, %r14
nop
nop
nop
nop
nop
and %rax, %rax
mov (%r14), %rcx
lea oracles, %rax
and $0xff, %rcx
shlq $12, %rcx
mov (%rax,%rcx,1), %rcx
pop %rsi
pop %rcx
pop %rbx
pop %rax
pop %r14
pop %r13
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'src': {'congruent': 0, 'AVXalign': False, 'same': True, 'size': 4, 'NT': False, 'type': 'addresses_D'}, 'OP': 'LOAD'}
{'src': {'congruent': 2, 'AVXalign': False, 'same': False, 'size': 16, 'NT': False, 'type': 'addresses_US'}, 'OP': 'LOAD'}
[Faulty Load]
{'src': {'congruent': 0, 'AVXalign': False, 'same': True, 'size': 8, 'NT': False, 'type': 'addresses_D'}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'36': 557}
36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36
*/
| 45.551724 | 1,670 | 0.657835 |
6e2b6d90d580a7427db0f2da35d6ee6897c10a28 | 739 | asm | Assembly | oeis/253/A253410.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/253/A253410.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/253/A253410.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A253410: Indices of centered pentagonal numbers (A005891) which are also centered octagonal numbers (A016754).
; Submitted by Christian Krause
; 1,96,817,137712,1177393,198579888,1697799169,286352060064,2448225223585,412919472031680,3530339074609681,595429592317621776,5090746497361935697,858609059202538568592,7340852918856836664673,1238113667940468298287168,10585504818245061108522049,1785359050561096083591526944,15264290607056459261652129265,2574486512795432612070683565360,22011096469870596010241261877361,3712407766091963265509842109721456,31739985845262792390308637975024577,5353289424218098233432580251534773472
mov $2,$0
mul $0,2
mod $2,2
add $0,$2
seq $0,221874 ; Numbers m such that 10*m^2 + 6 is a square.
div $0,2
add $0,1
| 61.583333 | 476 | 0.863329 |
5ff7f4f874872b9b6e2e3d4ab473e5a34d906c21 | 301 | asm | Assembly | programs/oeis/072/A072863.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/072/A072863.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/072/A072863.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A072863: a(n) = 2^(n-3)*(n^2+3*n+8).
; 1,3,9,26,72,192,496,1248,3072,7424,17664,41472,96256,221184,503808,1138688,2555904,5701632,12648448,27918336,61341696,134217728,292552704,635437056,1375731712,2969567232,6392119296,13723762688
add $0,2
mov $2,2
pow $2,$0
bin $0,2
add $0,3
mul $0,$2
div $0,16
| 27.363636 | 194 | 0.724252 |
be7b06e2825a2dd65b8e39c144d406692f9998d2 | 15,225 | a51 | Assembly | hand_firmware_micro.cydsn/codegentemp/cymem.a51 | NMMI/socket-master | 3857d12872cb50e8902531f0acbe5cd36c825d62 | [
"BSD-3-Clause"
] | null | null | null | hand_firmware_micro.cydsn/codegentemp/cymem.a51 | NMMI/socket-master | 3857d12872cb50e8902531f0acbe5cd36c825d62 | [
"BSD-3-Clause"
] | null | null | null | hand_firmware_micro.cydsn/codegentemp/cymem.a51 | NMMI/socket-master | 3857d12872cb50e8902531f0acbe5cd36c825d62 | [
"BSD-3-Clause"
] | null | null | null | ;***************************************************************************
; \file cymem.a51
; \version 5.60
;
; \brief
; Specialized memory routines for Keil bootup. These functions accept
; 3-byte pointers, but the pointers are interpreted as absolute locations
; rather than as Keil generic/far pointers. Interrupts should be disabled
; while these functions are executing unless the interrupt handler is
; aware of dual DPTRs (DPS register), extended DPTRs (DPX0/DPX1), and
; extended register-indirect memory access (MXAX register).
;
; C DECLARATIONS:
; extern void cymemzero(void far *addr, unsigned short size);
; extern void cyconfigcpy(unsigned short size, const void far *src, void far *dest) large;
; extern void cyconfigcpycode(unsigned short size, const void code *src, void far *dest);
; extern void cfg_write_bytes_code(const void code *table);
; extern void cfg_write_bytes(const void far *table);
; extern unsigned char cyread8(const void far *addr);
; extern unsigned char cyread8_nodpx(const void far *addr);
; extern void cywrite8(void far *addr, unsigned char value);
; extern void cywrite8_nodpx(void far *addr, unsigned char value);
; extern unsigned int cyread16(const void far *addr);
; extern unsigned int cyread16_nodpx(const void far *addr);
; extern void cywrite16(void far *addr, unsigned int value);
; extern void cywrite16_nodpx(void far *addr, unsigned int value);
; extern unsigned long cyread24(const void far *addr);
; extern unsigned long cyread24_nodpx(const void far *addr);
; extern void cywrite24(void far *addr, unsigned long value);
; extern void cywrite24_nodpx(void far *addr, unsigned long value);
; extern unsigned long cyread32(const void far *addr);
; extern unsigned long cyread32_nodpx(const void far *addr);
; extern void cywrite32(void far *addr, unsigned long value);
; extern void cywrite32_nodpx(void far *addr, unsigned long value);
;
;*******************************************************************************
; Copyright 2008-2017, Cypress Semiconductor Corporation. All rights reserved.
; You may use this file only in accordance with the license, terms, conditions,
; disclaimers, and limitations in the end user license agreement accompanying
; the software package with which this file was provided.
;*******************************************************************************
$NOMOD51
;*******************************************************************************
;* SFRs
;*******************************************************************************
DPL0 EQU 082H
DPH0 EQU 083H
DPL1 EQU 084H
DPH1 EQU 085H
DPS EQU 086H
DPX0 EQU 093H
DPX1 EQU 095H
P2 EQU 0A0H
MXAX EQU 0EAH
;*******************************************************************************
;* Symbols
;*******************************************************************************
NAME CYMEM
PUBLIC _cyconfigcpy
PUBLIC ?_cyconfigcpy?BYTE
PUBLIC _cfg_write_bytes
PUBLIC _cfg_write_bytes_code
PUBLIC _cyconfigcpycode
PUBLIC _cymemzero
PUBLIC _cyread8
PUBLIC _cyread8_nodpx
PUBLIC _cywrite8
PUBLIC _cywrite8_nodpx
PUBLIC _cyread16
PUBLIC _cyread16_nodpx
PUBLIC _cywrite16
PUBLIC _cywrite16_nodpx
PUBLIC _cyread24
PUBLIC _cyread24_nodpx
PUBLIC _cywrite24
PUBLIC _cywrite24_nodpx
PUBLIC _cyread32
PUBLIC _cyread32_nodpx
PUBLIC _cywrite32
PUBLIC _cywrite32_nodpx
;*******************************************************************************
;* void cymemzero(void far *, unsigned short);
;* Zero memory in extended XDATA. Range must not cross a 64k boundary.
;* Parameters:
;* R3: Bits [23:16] of start address
;* R2: Bits [15:8] of start address
;* R1: Bits [7:0] of start address
;* R4: Bits [15:8] of size
;* R5: Bits [7:0] of size
;*******************************************************************************
?PR?CYMEMZERO?CYMEM SEGMENT CODE
RSEG ?PR?CYMEMZERO?CYMEM
_cymemzero:
MOV A,R4
ORL A,R5
JZ _cymemzero_end ; Exit if size is 0
MOV A,R5
JZ _cymemzero_noinc
INC R4 ; Tweak loop count for DJNZ
_cymemzero_noinc:
MOV DPX0,R3
MOV DPH0,R2
MOV DPL0,R1
CLR A
_cymemzero_loop:
MOVX @DPTR,A ; Zero memory
INC DPTR
DJNZ R5,_cymemzero_loop
DJNZ R4,_cymemzero_loop
_cymemzero_end:
MOV DPX0,#0
RET
;*******************************************************************************
;* void cyconfigcpy(unsigned short, const void far *, void far *) large;
;* Copy memory from extended XDATA to extended XDATA. Source and destination
;* ranges must not cross a 64k boundary.
;* Parameters:
;* R6: Bits [15:8] of size
;* R7: Bits [7:0] of size
;* R3: Bits [23:16] of source address
;* R2: Bits [15:8] of source address
;* R1: Bits [7:0] of source address
;* Memory parameters: see ?_cyconfigcpy?BYTE
;*******************************************************************************
?PR?_CYCONFIGCPY?CYMEM SEGMENT CODE
RSEG ?PR?_CYCONFIGCPY?CYMEM
_cyconfigcpy:
MOV DPS,#000h ; Select DP0
MOV A,R7 ; Size in R6:R7 (MSB in R6)
ORL A,R6
JZ _cyconfigcpy_end ; Exit if size is 0
MOV A,R7
JZ _cyconfigcpy_noinc
INC R6 ; Tweak loop count for DJNZ
_cyconfigcpy_noinc:
MOV DPX0,#000h ; Read destination pointer to DPX1:DPH1:DPL1
MOV DPTR,#_cyconfigcpy_dstx
MOVX A,@DPTR
MOV DPX1,A
INC DPTR
MOVX A,@DPTR
MOV DPH1,A
INC DPTR
MOVX A,@DPTR
MOV DPL1,A
MOV DPX0,R3 ; Source address in R3:R2:R1
MOV DPH0,R2
MOV DPL0,R1
_cyconfigcpy_loop:
MOVX A,@DPTR
INC DPTR
INC DPS ; Select DP1
MOVX @DPTR,A
INC DPTR
DEC DPS ; Select DP0
DJNZ R7,_cyconfigcpy_loop
DJNZ R6,_cyconfigcpy_loop
_cyconfigcpy_end:
CLR A
MOV DPX0,A
MOV DPX1,A
RET
?XD?_CYCONFIGCPY?CYMEM SEGMENT XDATA OVERLAYABLE
RSEG ?XD?_CYCONFIGCPY?CYMEM
?_cyconfigcpy?BYTE:
_cyconfigcpy_reserved: DS 5
_cyconfigcpy_dstx: DS 1
_cyconfigcpy_dsth: DS 1
_cyconfigcpy_dstl: DS 1
;*******************************************************************************
;* void cyconfigcpycode(unsigned short, const void code *, void far *);
;* Copy memory from CODE to extended XDATA. Destination range must not cross a
;* 64k boundary.
;* Parameters:
;* R6: Bits [15:8] of size
;* R7: Bits [7:0] of size
;* R3: Bits [23:16] of destination address
;* R2: Bits [15:8] of destination address
;* R1: Bits [7:0] of destination address
;* R4: Bits[15:8] of source address
;* R5: Bits [7:0] of source address
;*******************************************************************************
?PR?CYCONFIGCPYCODE?CYMEM SEGMENT CODE
RSEG ?PR?CYCONFIGCPYCODE?CYMEM
_cyconfigcpycode:
MOV DPS,#000h ; Select DP0
MOV A,R7 ; Size in R6:R7 (MSB in R6)
ORL A,R6
JZ _cyconfigcpycode_end ; Exit if size is 0
MOV A,R7
JZ _cyconfigcpycode_noinc
INC R6 ; Tweak loop count for DJNZ
_cyconfigcpycode_noinc:
MOV DPH0,R4 ; Source address in R4:R5
MOV DPL0,R5
MOV DPX1,R3 ; Destination address in R3:R2:R1
MOV DPH1,R2
MOV DPL1,R1
_cyconfigcpycode_loop:
CLR A
MOVC A,@A+DPTR
INC DPTR
INC DPS ; Select DP1
MOVX @DPTR,A
INC DPTR
DEC DPS ; Select DP0
DJNZ R7,_cyconfigcpycode_loop
DJNZ R6,_cyconfigcpycode_loop
_cyconfigcpycode_end:
CLR A
MOV DPX1,A
RET
;*******************************************************************************
;* void cfg_write_bytes(const void far *table);
;* R3: Bits [23:16] of pointer to start of table
;* R2: Bits [15:8] of pointer to start of table
;* R1: Bits [7:0] of pointer to start of table
;* Reads data from cfg_byte_table and writes it to memory
;* cfg_byte_table contains a byte representing the number of records, followed
;* by a sequence of records:
;* struct cfg_byte_table_record_s {
;* unsigned char dpx;
;* unsigned char dph;
;* unsigned char value[];
;* };
;* Source range must not cross a 64k boundary.
;*******************************************************************************
?PR?CFG_WRITE_BYTES?CYMEM SEGMENT CODE
RSEG ?PR?CFG_WRITE_BYTES?CYMEM
_cfg_write_bytes:
MOV R4,MXAX ; Save
MOV R5,P2
MOV DPX0,R3 ; Start at beginning of table
MOV DPH0,R2
MOV DPL0,R1
MOVX A,@DPTR
MOV R1,A ; Number of ranges
JZ _cfg_write_bytes_end
_cfg_write_bytes_outer:
INC DPTR
MOVX A,@DPTR
MOV MXAX,A ; Extended address byte
INC DPTR
MOVX A,@DPTR
MOV P2,A ; High address byte
INC DPTR
MOVX A,@DPTR
JZ _cfg_write_bytes_outer
MOV R2,A ; Count
_cfg_write_bytes_inner:
INC DPTR
MOVX A,@DPTR
MOV R0,A
INC DPTR
MOVX A,@DPTR
MOVX @R0,A ; Write to MXAX:P2:R0
DJNZ R2,_cfg_write_bytes_inner
DJNZ R1,_cfg_write_bytes_outer
_cfg_write_bytes_end:
MOV P2,R5 ; Restore
MOV MXAX,R4
CLR A
MOV DPX0,A
RET
;*******************************************************************************
;* void cfg_write_bytes_code(const void code *table);
;* R6:R7: Pointer to cfg_byte_table
;* Reads data from cfg_byte_table and writes it to memory
;* cfg_byte_table contains a byte representing the number of records, followed
;* by a sequence of records:
;* struct cfg_byte_table_record_s {
;* unsigned char dpx;
;* unsigned char dph;
;* unsigned char value[];
;* };
;*******************************************************************************
?PR?CY_WRITE_BYTES_CODE?CYMEM SEGMENT CODE
RSEG ?PR?CY_WRITE_BYTES_CODE?CYMEM
_cfg_write_bytes_code:
MOV R4,MXAX ; Save
MOV R5,P2
MOV DPH0,R6 ; Start at beginning of table
MOV DPL0,R7
CLR A
MOVC A,@A+DPTR
MOV R1,A ; Number of ranges
JZ _cfg_write_bytes_code_end
_cfg_write_bytes_code_outer:
INC DPTR
CLR A
MOVC A,@A+DPTR ; Extended address byte
MOV MXAX,A
INC DPTR
CLR A
MOVC A,@A+DPTR ; High address byte
MOV P2,A
INC DPTR
CLR A
MOVC A,@A+DPTR ; Count
JZ _cfg_write_bytes_code_outer
MOV R2,A
_cfg_write_bytes_code_inner:
INC DPTR
CLR A
MOVC A,@A+DPTR ; Low address byte
MOV R0,A
INC DPTR
CLR A
MOVC A,@A+DPTR ; Value
MOVX @R0,A ; Write to MXAX:P2:R0
DJNZ R2,_cfg_write_bytes_code_inner
DJNZ R1,_cfg_write_bytes_code_outer
_cfg_write_bytes_code_end:
MOV P2,R5 ; Restore
MOV MXAX,R4
RET
;*******************************************************************************
;* Read a byte
;* R3:R2:R1: Address
;* Return value in R7
;*******************************************************************************
?PR?CYREAD8?CYMEM SEGMENT CODE
RSEG ?PR?CYREAD8?CYMEM
_cyread8:
MOV DPX0,R3
_cyread8_nodpx:
MOV DPH0,R2
MOV DPL0,R1
MOVX A,@DPTR
MOV DPX0,#0
MOV R7,A
RET
;*******************************************************************************
;* Write a byte
;* R3:R2:R1: Address
;* R5: Value
;*******************************************************************************
?PR?CYWRITE8?CYMEM SEGMENT CODE
RSEG ?PR?CYWRITE8?CYMEM
_cywrite8:
MOV DPX0,R3
_cywrite8_nodpx:
MOV DPH0,R2
MOV DPL0,R1
MOV A,R5
MOVX @DPTR,A
MOV DPX0,#0
RET
;*******************************************************************************
;* Read a little-endian 16-bit value
;* R3:R2:R1: Address
;* May not cross a 64k boundary
;* Return value in R6:R7 (big endian, R6 is MSB)
;*******************************************************************************
?PR?CYREAD16?CYMEM SEGMENT CODE
RSEG ?PR?CYREAD16?CYMEM
_cyread16:
MOV DPX0,R3
_cyread16_nodpx:
MOV DPH0,R2
MOV DPL0,R1
MOVX A,@DPTR
MOV R7,A ; LSB
INC DPTR
MOVX A,@DPTR
MOV R6,A ; MSB
MOV DPX0,#0
RET
;*******************************************************************************
;* Write a little-endian 16-bit value
;* R3:R2:R1: Address
;* R4:R5: Value (big endian, R4 is MSB)
;* May not cross a 64k boundary
;*******************************************************************************
?PR?CYWRITE16?CYMEM SEGMENT CODE
RSEG ?PR?CYWRITE16?CYMEM
_cywrite16:
MOV DPX0,R3
_cywrite16_nodpx:
MOV DPH0,R2
MOV DPL0,R1
MOV A,R5 ; LSB
MOVX @DPTR,A
INC DPTR
MOV A,R4 ; MSB
MOVX @DPTR,A
MOV DPX0,#0
RET
;*******************************************************************************
;* Read a little-endian 24-bit value
;* R3:R2:R1: Address
;* May not cross a 64k boundary
;* Return value in R4:R5:R6:R7 (big endian, R4 is MSB, R4 always 0)
;*******************************************************************************
?PR?CYREAD24?CYMEM SEGMENT CODE
RSEG ?PR?CYREAD24?CYMEM
_cyread24:
MOV DPX0,R3
_cyread24_nodpx:
MOV DPH0,R2
MOV DPL0,R1
MOVX A,@DPTR
MOV R7,A ; LSB
INC DPTR
MOVX A,@DPTR
MOV R6,A
INC DPTR
MOVX A,@DPTR
MOV R5,A
CLR A
MOV R4,A ; MSB
MOV DPX0,A
RET
;*******************************************************************************
;* Write a little-endian 24-bit value
;* R3:R2:R1: Address
;* R4:R5:R6:R7: Value (big endian, R4 is MSB, R4 ignored)
;* May not cross a 64k boundary
;*******************************************************************************
?PR?CYWRITE24?CYMEM SEGMENT CODE
RSEG ?PR?CYWRITE24?CYMEM
_cywrite24:
MOV DPX0,R3
_cywrite24_nodpx:
MOV DPH0,R2
MOV DPL0,R1
MOV A,R7 ; LSB
MOVX @DPTR,A
INC DPTR
MOV A,R6
MOVX @DPTR,A
INC DPTR
MOV A,R5
MOVX @DPTR,A
MOV DPX0,#0
RET
;*******************************************************************************
;* Read a little-endian 32-bit value
;* R3:R2:R1: Address
;* May not cross a 64k boundary
;* Return value in R4:R5:R6:R7 (big endian, R4 is MSB)
;*******************************************************************************
?PR?CYREAD32?CYMEM SEGMENT CODE
RSEG ?PR?CYREAD32?CYMEM
_cyread32:
MOV DPX0,R3
_cyread32_nodpx:
MOV DPH0,R2
MOV DPL0,R1
MOVX A,@DPTR
MOV R7,A ; LSB
INC DPTR
MOVX A,@DPTR
MOV R6,A
INC DPTR
MOVX A,@DPTR
MOV R5,A
INC DPTR
MOVX A,@DPTR
MOV R4,A ; MSB
MOV DPX0,#0
RET
;*******************************************************************************
;* Write a little-endian 32-bit value
;* R3:R2:R1: Address
;* R4:R5:R6:R7: Value (big endian, R4 is MSB)
;* May not cross a 64k boundary
;*******************************************************************************
?PR?CYWRITE32?CYMEM SEGMENT CODE
RSEG ?PR?CYWRITE32?CYMEM
_cywrite32:
MOV DPX0,R3
_cywrite32_nodpx:
MOV DPH0,R2
MOV DPL0,R1
MOV A,R7 ; LSB
MOVX @DPTR,A
INC DPTR
MOV A,R6
MOVX @DPTR,A
INC DPTR
MOV A,R5
MOVX @DPTR,A
INC DPTR
MOV A,R4 ; MSB
MOVX @DPTR,A
MOV DPX0,#0
RET
END
| 29.505814 | 91 | 0.542791 |
a1cea3638a45dba8db371bfc77a823a757743989 | 308 | asm | Assembly | programs/oeis/085/A085535.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/085/A085535.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/085/A085535.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A085535: a(n) = (2n)^(2n-1).
; 2,64,7776,2097152,1000000000,743008370688,793714773254144,1152921504606846976,2185911559738696531968,5242880000000000000000000,15519448971100888972574851072,55572324035428505185378394701824,236773830007967588876795164938469376
mul $0,2
add $0,1
mov $2,$0
add $0,1
pow $0,$2
| 34.222222 | 228 | 0.821429 |
368e3d676be742c0cbfc7e24b72d2e51420e69ca | 47,768 | asm | Assembly | battleshit.asm | dmtucker/battleshit | 0d05840f1f95f26086993e55133028d045f75907 | [
"BSD-3-Clause"
] | null | null | null | battleshit.asm | dmtucker/battleshit | 0d05840f1f95f26086993e55133028d045f75907 | [
"BSD-3-Clause"
] | null | null | null | battleshit.asm | dmtucker/battleshit | 0d05840f1f95f26086993e55133028d045f75907 | [
"BSD-3-Clause"
] | 1 | 2021-04-25T17:02:37.000Z | 2021-04-25T17:02:37.000Z | #include <v2_18g3.asm>
.sect .data
READY: .byte 0
FLEET: .byte 0
PLAYER: .byte 1
MASK: .byte 0
ROW: .byte 0
COL: .byte 0
KEY: .byte 5
boardRows: .byte 4
boardCols: .byte 4
p1shits: .byte 0
p2shits: .byte 0
p1board: .space 16
p2board: .space 16
filler: .asciz " "
title: .asciz " BATTLESHIT "
subtitle: .asciz " A crappy game. "
p1: .asciz " Player 1 "
p2: .asciz " Player 2 "
place: .asciz "Place a shit. "
enter: .asciz "Enter coords. "
shoot: .asciz "Shoot a shit. "
over: .asciz " Game over. "
invalid: .asciz "invalid position"
occupied: .asciz "already occupied"
available: .asciz " Nice shit! "
hit: .asciz " hit! "
miss: .asciz "miss... "
win: .asciz "You're the shit."
loss: .asciz "You're crappy. "
DEBUGinterrupt: .asciz "\nINTERRUPTION DETECTED\n"
DEBUGbegin: .asciz "Begin\n"
DEBUGstrategize: .asciz "Strategizing...\n"
DEBUGfirst: .asciz " -1st ship placed\n"
DEBUGsecond: .asciz " -2nd ship placed\n"
DEBUGthird: .asciz " -3rd ship placed\n"
DEBUGfourth: .asciz " -4th ship placed\n"
DEBUGgetCoord: .asciz "Getting coordinates...\n -waiting for input...\n"
DEBUGgotCoord: .asciz " -input received\n -mapping to board position...\n"
DEBUGgotError: .asciz " -ERROR detected: invalid input received\n"
DEBUGmask: .asciz " -current mask: "
DEBUGrow: .asciz " -current row: "
DEBUGcol: .asciz " -current col: "
DEBUGgotRow: .asciz " -ROW: "
DEBUGgotCol: .asciz " -COL: "
DEBUGgotKey: .asciz " -KEY: "
DEBUGplaceShit: .asciz "Placing shits...\n"
DEBUGplaceError: .asciz " -ERROR detected: invalid shit position (already taken)\n"
DEBUGswitch: .asciz "Switching players...\n"
DEBUGfire: .asciz "Firing at shits...\n"
DEBUGshootP1: .asciz " -shooting at player 1\n"
DEBUGshootP2: .asciz " -shooting at player 2\n"
DEBUGhit: .asciz " -hit\n"
DEBUGmiss: .asciz " -miss\n"
DEBUGupdate: .asciz "Updating the fleets...\n"
DEBUGshits: .asciz " -shits: "
DEBUGfleet: .asciz " -fleet status: "
DEBUGinit: .asciz " -detected p1 initial setup, suppressing p2 status\n"
DEBUGstatus: .asciz " -indicating fleet status\n"
DEBUGcheck: .asciz "Checking for a winner...\n"
DEBUGalive: .asciz " -alive\n"
DEBUGdead: .asciz " -DEAD!\n"
DEBUGwait: .asciz "Waiting through a delay...\n"
DEBUGdone: .asciz "Finish\n"
.sect .text
interrupt:
psha //backup registers
ldaa #1 //set ready bit
staa READY //
pshx
ldx #DEBUGinterrupt
jsr OUTSTRING
pulx
pula //restore registers
rti
main:
pshx
ldx #DEBUGbegin
jsr OUTSTRING
pulx
ldx #interrupt //set interrupt
stx ISR_JUMP15 //
ldaa #0 //clear lights
coma //
staa LEDS //
coma //
ldx #title //print message
ldaa #1 //
jsr LCDLINE //
ldx #subtitle //
ldaa #2 //
jsr LCDLINE //
jsr delay //
strategize:
pshx
ldx #DEBUGstrategize
jsr OUTSTRING
pulx
ldx #p1 //print message
ldaa #1 //
jsr LCDLINE //
jsr delay //
jsr placeShit //position p1 shits
pshx
ldx #DEBUGfirst
jsr OUTSTRING
pulx
ldx #available //print message
ldaa #2 //
jsr LCDLINE //
jsr delay //
jsr placeShit //
pshx
ldx #DEBUGsecond
jsr OUTSTRING
pulx
ldx #available //print message
ldaa #2 //
jsr LCDLINE //
jsr delay //
jsr placeShit //
pshx
ldx #DEBUGthird
jsr OUTSTRING
pulx
ldx #available //print message
ldaa #2 //
jsr LCDLINE //
jsr delay //
jsr placeShit //
pshx
ldx #DEBUGfourth
jsr OUTSTRING
pulx
ldx #available //print message
ldaa #2 //
jsr LCDLINE //
jsr delay //
jsr switchPlayer //
jsr placeShit //position p2 shits
pshx
ldx #DEBUGfirst
jsr OUTSTRING
pulx
ldx #available //print message
ldaa #2 //
jsr LCDLINE //
jsr delay //
jsr placeShit //
pshx
ldx #DEBUGsecond
jsr OUTSTRING
pulx
ldx #available //print message
ldaa #2 //
jsr LCDLINE //
jsr delay //
jsr placeShit //
pshx
ldx #DEBUGthird
jsr OUTSTRING
pulx
ldx #available //print message
ldaa #2 //
jsr LCDLINE //
jsr delay //
jsr placeShit //
pshx
ldx #DEBUGfourth
jsr OUTSTRING
pulx
ldx #available //print message
ldaa #2 //
jsr LCDLINE //
jsr delay //
jsr switchPlayer //randomly choose first shooter
gameLoop:
jsr firePiss //guess
jsr checkWin //check
jsr switchPlayer //switch
bra gameLoop //
getCoord:
psha //backup registers
pshb //
pshx //
pshy //
ldx #enter //print message
ldaa #2 //
jsr LCDLINE //
pshx
ldx #DEBUGgetCoord
jsr OUTSTRING
pulx
ldaa #0 //clear submission
staa READY //
getCoordInput: //
//pshx
//ldx #DEBUGloop
//jsr OUTSTRING
//pulx
ldab SWITCHES //get input
ldaa READY //check for submission
beq getCoordInput //
pshx
ldx #DEBUGgotCoord
jsr OUTSTRING
pulx
ldaa #0 //clear submission
staa READY //
ldaa #5 // row 4: ---x----
staa ROW // 1234(p2)
ldaa #8 //start at: ---x----
staa MASK //
getCoordRow: //
ldaa ROW //move to next switch/row
deca //
beq getCoordError //min row = 1
staa ROW //
//psha
//pshx
//ldx #DEBUGrow
//jsr OUTSTRING
//ldaa ROW
//adda #48
//jsr OUTCHAR
//jsr OUTCRLF
//pulx
//pula
ldaa MASK //shift mask left
lsla //
beq getCoordError //min row = binary 256 = binary 0 w/ carry
staa MASK //
//psha
//pshb
//pshx
//ldx #DEBUGmask
//jsr OUTSTRING
//ldaa #0
//ldab MASK
//jsr CONSOLEINT
//jsr OUTCRLF
//pulx
//pulb
//pula
bitb MASK //apply mask
beq getCoordRow //detect row
getCoordGotRow: //
//psha
//pshx
//ldx #DEBUGgotRow
//jsr OUTSTRING
//ldaa ROW
//adda #48
//jsr OUTCHAR
//jsr OUTCRLF
//pulx
//pula
ldaa #4 // col 4: -------x
staa COL // (p1)1234
ldaa #1 //start at: -------x
staa MASK //
getCoordCol: //
bitb MASK //apply mask
bne getCoordGotCol //detect col
ldaa COL //move to next switch/row
deca //
ble getCoordError //min col = 1
staa COL //
//psha
//pshx
//ldx #DEBUGcol
//jsr OUTSTRING
//ldaa COL
//adda #48
//jsr OUTCHAR
//jsr OUTCRLF
//pulx
//pula
ldaa MASK //
lsla //shift mask left
cmpa #16 //min col = binary 16
beq getCoordError //detect invalid col
staa MASK //
//psha
//pshb
//pshx
//ldx #DEBUGmask
//jsr OUTSTRING
//ldaa #0
//ldab MASK
//jsr CONSOLEINT
//jsr OUTCRLF
//pulx
//pulb
//pula
bra getCoordCol //
getCoordGotCol: //
//psha
//pshx
//ldx #DEBUGgotCol
//jsr OUTSTRING
//ldaa COL
//adda #48
//jsr OUTCHAR
//jsr OUTCRLF
//pulx
//pula
ldaa ROW //KEY = 4(ROW-1)+(COL-1) = 4ROW+COL-5
tab //a = ROW
lsla //a = 2ROW
lsla //a = 4ROW
ldab COL //
aba //a = 4ROW+COL
suba #5 //a = KEY
staa KEY //
//psha
//pshx
//ldx #DEBUGgotKey
//jsr OUTSTRING
//ldaa KEY
//adda #48
//jsr OUTCHAR
//jsr OUTCRLF
//pulx
//pula
puly //restore registers
pulx //
pulb //
pula //
rts //
getCoordError: //
pshx
ldx #DEBUGgotError
jsr OUTSTRING
pulx
ldx #invalid //print message
ldaa #2 //
jsr LCDLINE //
jsr delay //
puly //restore registers
pulx //
pulb //
pula //
bra getCoord //try again
placeShit:
psha //backup registers
pshb //
pshx //
pshy //
ldx #place //print message
ldaa #2 //
jsr LCDLINE //
pshx
ldx #DEBUGplaceShit
jsr OUTSTRING
pulx
ldaa PLAYER //select correct board
cmpa #2 //
beq placeShitP2 //
placeShitP1: //
pshx
ldx #p1
jsr OUTSTRING
jsr OUTCRLF
pulx
ldx #p1board //load p1 board
bra placeShitOnBoard //
placeShitP2: //
pshx
ldx #p2
jsr OUTSTRING
jsr OUTCRLF
pulx
ldx #p2board //load p2 board
placeShitOnBoard: //
jsr getCoord //get position
psha
pshx
ldx #DEBUGgotRow
jsr OUTSTRING
ldaa ROW
adda #48
jsr OUTCHAR
jsr OUTCRLF
ldx #DEBUGgotCol
jsr OUTSTRING
ldaa COL
adda #48
jsr OUTCHAR
jsr OUTCRLF
ldx #DEBUGgotKey
jsr OUTSTRING
ldaa KEY
adda #48
jsr OUTCHAR
jsr OUTCRLF
pulx
pula
ldab KEY //
abx //
ldaa 0, X //make sure a shit isnt already there
bne placeShitTaken //
ldaa #1 //place shit
staa 0, X //
ldaa PLAYER //add shit for the right player
cmpa #2 //
beq placeShitForP2 //
placeShitForP1: //p1
ldaa p1shits //
inca //
staa p1shits //
bra placeShitDone //
placeShitForP2: //p2
ldaa p2shits //
inca //
staa p2shits //
placeShitDone: //
jsr updateFleet //
puly //restore registers
pulx //
pulb //
pula //
rts //
placeShitTaken: //
pshx
ldx #DEBUGplaceError
jsr OUTSTRING
pulx
ldx #occupied //print message
ldaa #2 //
jsr LCDLINE //
puly //restore registers
pulx //
pulb //
pula //
bra placeShit //
switchPlayer:
psha //backup registers
pshb //
pshx //
pshy //
pshx
ldx #DEBUGswitch
jsr OUTSTRING
pulx
ldaa PLAYER //get current player
tab //
inca //a = next player
decb //b = prev player
cmpa #3 //
bge switchPlayerPrev //decide how to toggle based on current player
switchPlayerNext: //
pshx
ldx #p2
jsr OUTSTRING
jsr OUTCRLF
pulx
staa PLAYER //change player
ldx #p2 //change player indicator
ldaa #1 //
jsr LCDLINE //
jsr delay //
bra switchPlayerDone /
switchPlayerPrev: //
pshx
ldx #p1
jsr OUTSTRING
jsr OUTCRLF
pulx
stab PLAYER //change player
ldx #p1 //change player indicator
ldaa #1 //
jsr LCDLINE //
jsr delay //
switchPlayerDone: //
puly //restore registers
pulx //
pulb //
pula //
rts
firePiss:
psha //backup registers
pshb //
pshx //
pshy //
pshx
ldx #DEBUGfire
jsr OUTSTRING
pulx
ldx #shoot //
ldaa #2 //
jsr LCDLINE //
jsr getCoord //get where to fire
ldaa PLAYER //detect who is shooting/getting shot at
cmpa #1 //
beq firePissP2 //
firePissP1: //shooting at player 1
pshx
ldx #DEBUGshootP1
jsr OUTSTRING
pulx
ldx #p1board //check if hit
ldab KEY //
abx //
ldaa 0, X //
beq firePissP2Miss //
bra firePissP2Hit //
firePissP2: //shooting at player 2
pshx
ldx #DEBUGshootP2
jsr OUTSTRING
pulx
ldx #p2board //
ldab KEY //
abx //
ldaa 0, X //
beq firePissP1Miss //
firePissP1Hit: //hit for player 1
pshx
ldx #DEBUGhit
jsr OUTSTRING
pulx
ldaa #0 //remove sunken shit
staa 0, X //
ldaa p2shits //decrease count of p2 shits
deca //
staa p2shits //
jsr updateFleet //change fleet indicator
ldx #hit //print message
ldaa #2 //
jsr LCDLINE //
jsr delay //
bra firePissDone //
firePissP1Miss: //player 1 misses
pshx
ldx #DEBUGmiss
jsr OUTSTRING
pulx
ldx #miss //print message
ldaa #2 //
jsr LCDLINE //
bra firePissDone //
firePissP2Hit: //hit for player 2
pshx
ldx #DEBUGhit
jsr OUTSTRING
pulx
ldaa #0 //remove sunken shit
staa 0, X //
ldaa p1shits //decrease count of p1 shits
deca //
staa p1shits //
jsr updateFleet //change fleet indicator
ldx #hit //print message
ldaa #2 //
jsr LCDLINE //
bra firePissDone //
firePissP2Miss: //player 2 misses
pshx
ldx #DEBUGhit
jsr OUTSTRING
pulx
ldx #miss //print message
ldaa #2 //
jsr LCDLINE //
firePissDone: //
puly //restore registers
pulx //
pulb //
pula //
rts
updateFleet:
psha //backup registers
pshb //
pshx //
pshy //
pshx
ldx #DEBUGupdate
jsr OUTSTRING
pulx
ldaa #1 //a = fleet indicator
ldab p1shits //b = player 1 shits
psha
pshb
pshx
ldx #p1
jsr OUTSTRING
jsr OUTCRLF
ldx #DEBUGshits
jsr OUTSTRING
ldaa #0
ldab p1shits
jsr CONSOLEINT
jsr OUTCRLF
pulx
pulb
pula
updateFleetP1: //
decb //for each shit
beq updateFleetP1Done //detect end of fleet
ble checkWin //catch game over
// blt updateFleetFix //
lsla //make room
inca //add to fleet
bra updateFleetP1 //
//updateFleetFix: //avoid incorrect status by storing 0 mask
// ldaa #0 //
updateFleetP1Done: //
lsla //offset p1 so as not to block p2
lsla //
lsla //
lsla //
staa FLEET //
ldaa #1 //reset status for next player
//ldaa FLEET //
psha
pshb
pshx
ldx #DEBUGfleet
jsr OUTSTRING
ldaa #0
ldab FLEET
jsr CONSOLEINT
jsr OUTCRLF
pulx
pulb
pula
ldab p2shits //switch players
psha
pshb
pshx
ldx #p2
jsr OUTSTRING
jsr OUTCRLF
ldx #DEBUGshits
jsr OUTSTRING
ldaa #0
ldab p2shits
jsr CONSOLEINT
jsr OUTCRLF
pulx
pulb
pula
cmpb #0
bne updateFleetP2 //
pshx
ldx #DEBUGinit
jsr OUTSTRING
pulx
incb //avoid problems in initial placement
deca //
updateFleetP2: //
decb //
ble updateFleetP2Done //
lsla //
inca //
bra updateFleetP2 //
updateFleetP2Done: //
oraa FLEET //combine p1 & p2
staa FLEET //
psha
pshb
pshx
ldx #DEBUGfleet
jsr OUTSTRING
ldaa #0
ldab FLEET
jsr CONSOLEINT
jsr OUTCRLF
pulx
pulb
pula
updateFleetLights: //
pshx
ldx #DEBUGstatus
jsr OUTSTRING
pulx
coma //display updated fleet
staa LEDS //
coma //
puly //restore registers
pulx //
pulb //
pula //
rts
checkWin:
psha //backup registers
pshb //
pshx //
pshy //
pshx
ldx #DEBUGcheck
jsr OUTSTRING
pulx
ldab #0 //b = key counter
ldx #p1board //x = addr. of current key
pshx
ldx #p1
jsr OUTSTRING
jsr OUTCRLF
pulx
checkWinP1: //
ldaa 0, X //
bne checkWinP1Alive //stop as soon as 1 shit is detected
incb //
cmpb #16 //4 rows x 4 cols = 16 positions to check
beq checkWinP1Dead //detect p2 victory
inx //
bra checkWinP1 //
checkWinP1Alive: //
pshx
ldx #DEBUGalive
jsr OUTSTRING
pulx
ldab #0 //reset counter
ldx #p2board //switch player
pshx
ldx #p2
jsr OUTSTRING
jsr OUTCRLF
pulx
checkWinP2: //
ldaa 0, X //
bne checkWinP2Alive //stop as soon as 1 shit is detected
incb //
cmpb #16 //4 rows x 4 cols = 16 positions to check
beq checkWinP2Dead //detect p1 victory
inx //
bra checkWinP2 //
checkWinP1Dead: //
pshx
ldx #DEBUGdead
jsr OUTSTRING
pulx
ldx #p1 //print message
ldaa #1 //
jsr LCDLINE //
ldx #loss //
ldaa #2 //
jsr LCDLINE //
jsr delay //
ldx #p2 //print message
ldaa #1 //
jsr LCDLINE //
ldx #win //
ldaa #2 //
jsr LCDLINE //
bra gameOver //
checkWinP2Dead: //
pshx
ldx #DEBUGdead
jsr OUTSTRING
pulx
ldx #p2 //print message
ldaa #1 //
jsr LCDLINE //
ldx #loss //
ldaa #2 //
jsr LCDLINE //
jsr delay //
ldx #p1 //print message
ldaa #1 //
jsr LCDLINE //
ldx #win //
ldaa #2 //
jsr LCDLINE //
bra gameOver //
checkWinP2Alive: //both players are still alive
pshx
ldx #DEBUGalive
jsr OUTSTRING
pulx
puly //restore registers
pulx //
pulb //
pula //
rts
delay:
psha //backup registers
pshb //
pshx //
pshy //
pshx
ldx #DEBUGwait
jsr OUTSTRING
pulx
ldd #0x80 //3 seconds
jsr WAIT //
jsr WAIT //
jsr WAIT //
jsr WAIT //
jsr WAIT //
jsr WAIT //
puly //restore registers
pulx //
pulb //
pula //
rts
gameOver:
pshx
ldx #DEBUGdone
jsr OUTSTRING
pulx
ldx #title //print message
ldaa #1 //
jsr LCDLINE //
ldx #over //
ldaa #2 //
jsr LCDLINE //
jsr delay //
gameOverAtEnd: //
ldaa READY //wait for submission to restart
bne main //
ldd #0x80 //.5 second delay
jsr WAIT //
bra gameOverAtEnd //
| 57.207186 | 196 | 0.200783 |
3c3afdd69399fc1e57575a22422d365f08bd7e78 | 168 | asm | Assembly | libsrc/_DEVELOPMENT/stdio/c/sdcc_iy/snprintf.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 640 | 2017-01-14T23:33:45.000Z | 2022-03-30T11:28:42.000Z | libsrc/_DEVELOPMENT/stdio/c/sdcc_iy/snprintf.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 1,600 | 2017-01-15T16:12:02.000Z | 2022-03-31T12:11:12.000Z | libsrc/_DEVELOPMENT/stdio/c/sdcc_iy/snprintf.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 215 | 2017-01-17T10:43:03.000Z | 2022-03-23T17:25:02.000Z |
; int snprintf(char *s, size_t n, const char *format, ...)
SECTION code_clib
SECTION code_stdio
PUBLIC _snprintf
EXTERN asm_snprintf
defc _snprintf = asm_snprintf
| 14 | 58 | 0.767857 |
9fcd541a456dd938284765d450f6938189d1f8a8 | 974 | asm | Assembly | oeis/232/A232164.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/232/A232164.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/232/A232164.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A232164: Number of Weyl group elements, not containing an s_r factor, which contribute nonzero terms to Kostant's weight multiplicity formula when computing the multiplicity of the zero-weight in the adjoint representation for the Lie algebra of type C and rank n.
; Submitted by Simon Strandgaard
; 0,1,1,2,6,12,25,57,124,268,588,1285,2801,6118,13362,29168,63685,139057,303608,662888,1447352,3160121,6899745,15064810,32892270,71816436,156802881,342360937,747505396,1632091412,3563482500,7780451037,16987713169,37090703118,80983251898,176817545560,386060619981,842918624353,1840415132912,4018333162768,8773564788720,19156061974577,41825041384513,91320130888018,199386922984982,435338240001116,950510597034665,2075329736878745,4531241976901740,9893441744885596,21601183529458236,47163680941927797
lpb $0
sub $0,1
sub $4,$1
mov $1,$5
sub $4,$5
add $4,1
add $4,$2
add $2,$3
mov $5,$4
mov $4,$2
mov $2,$3
add $3,$1
add $4,$1
add $5,$4
lpe
mov $0,$5
| 46.380952 | 497 | 0.786448 |
ebb180c6b1aa54960415288d6d7061421ea4ab24 | 306 | asm | Assembly | programs/oeis/175/A175922.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/175/A175922.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/175/A175922.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A175922: Period 5: repeat [1, 1, 2, -1, 2].
; 1,1,2,-1,2,1,1,2,-1,2,1,1,2,-1,2,1,1,2,-1,2,1,1,2,-1,2,1,1,2,-1,2,1,1,2,-1,2,1,1,2,-1,2,1,1,2,-1,2,1,1,2,-1,2,1,1,2,-1,2,1,1,2,-1,2,1,1,2,-1,2,1,1,2,-1,2,1,1,2,-1,2,1,1,2,-1,2,1,1,2,-1,2,1,1,2,-1,2,1,1,2,-1,2,1,1,2,-1,2
bin $0,2
add $0,22
mod $0,5
sub $0,1
| 38.25 | 221 | 0.477124 |
816e6086cb572c757814a7f82e62d2d343f6c9c8 | 630 | asm | Assembly | oeis/048/A048396.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/048/A048396.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/048/A048396.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A048396: Sums of consecutive noncubes.
; 0,27,315,1638,5670,15345,35217,71820,134028,233415,384615,605682,918450,1348893,1927485,2689560,3675672,4931955,6510483,8469630,10874430,13796937,17316585,21520548,26504100,32370975,39233727,47214090,56443338,67062645,79223445,93087792,108828720,126630603,146689515,169213590,194423382,222552225,253846593,288566460,326985660,369392247,416088855,467393058,523637730,585171405,652358637,725580360,805234248,891735075,985515075,1087024302,1196730990,1315121913,1442702745,1579998420,1727553492
mov $1,$0
add $0,1
pow $1,2
add $1,$0
mul $0,2
sub $0,1
bin $1,2
mul $1,$0
mov $0,$1
mul $0,3
| 45 | 493 | 0.820635 |
7d2293d60c7f28e524fb0a1975449713ef8830f8 | 1,229 | asm | Assembly | src/tests/echoram.asm | Hacktix/BullyGB | e24fe6fd7f3fbc6021e3ee7f0f29e9166fce5937 | [
"MIT"
] | 10 | 2020-12-18T21:57:20.000Z | 2021-10-31T23:17:37.000Z | src/tests/echoram.asm | Hacktix/BullyGB | e24fe6fd7f3fbc6021e3ee7f0f29e9166fce5937 | [
"MIT"
] | null | null | null | src/tests/echoram.asm | Hacktix/BullyGB | e24fe6fd7f3fbc6021e3ee7f0f29e9166fce5937 | [
"MIT"
] | null | null | null | SECTION "Echo RAM Test", ROMX
TestEchoRAM::
; Load test string into normal RAM
ld de, strEchoRAMTestRead
ld hl, _RAM
call Strcpy
; Read values from echo RAM
ld de, strEchoRAMTestRead
ld hl, $E000
.loopReadNormalRAM
ld a, [de]
and a
jr z, .endReadNormalRAM ; Skip comparison if end of string reached
inc de
cp [hl]
inc hl
jr z, .loopReadNormalRAM ; Jump back to start of loop if string matches up
ld de, strEchoRAMFailRead
ret
.endReadNormalRAM
; Load test string into echo RAM
ld de, strEchoRAMTestWrite
ld hl, $E000
call Strcpy
; Read values from normal RAM
ld de, strEchoRAMTestWrite
ld hl, _RAM
.loopReadEchoRAM
ld a, [de]
and a
jr z, .endReadEchoRAM ; Skip comparison if end of string reached
inc de
cp [hl]
inc hl
jr z, .loopReadEchoRAM ; Jump back to start of loop if string matches up
ld de, strEchoRAMFailRead
ret
.endReadEchoRAM
; Clear DE and return - test passed
ld de, $0000
ret
strEchoRAMTestRead: db "Echo RAM Read Test", 0
strEchoRAMTestWrite: db "Echo RAM Write Test", 0
strEchoRAMFailRead: db "Bad Echo RAM Reads", 0
strEchoRAMFailWrite: db "Bad Echo RAM Writes", 0 | 24.58 | 78 | 0.676973 |
6cb1f81155d93df5d35b1b4c6fa939e92f811e31 | 18,651 | asm | Assembly | src/game_level/enemies_manager.asm | TypeDefinition/NautiBuoy | 25e998158366b424fa1d003c335c036d399985b3 | [
"MIT"
] | 2 | 2021-05-14T13:18:59.000Z | 2021-08-02T08:41:43.000Z | src/game_level/enemies_manager.asm | TypeDefinition/NautiBuoy | 25e998158366b424fa1d003c335c036d399985b3 | [
"MIT"
] | null | null | null | src/game_level/enemies_manager.asm | TypeDefinition/NautiBuoy | 25e998158366b424fa1d003c335c036d399985b3 | [
"MIT"
] | null | null | null | INCLUDE "./src/include/hardware.inc"
INCLUDE "./src/include/structs.inc"
INCLUDE "./src/include/entities.inc"
INCLUDE "./src/definitions/definitions.inc"
INCLUDE "./src/include/util.inc"
INCLUDE "./src/include/movement.inc"
INCLUDE "./src/include/tile_collision.inc"
SECTION "Enemies Data", WRAM0
wEnemiesData::
dstruct Character, wEnemy0
dstruct Character, wEnemy1
dstruct Character, wEnemy2
dstruct Character, wEnemy3
dstruct Character, wEnemy4
dstruct Character, wEnemy5
dstruct Character, wEnemy6
dstruct Character, wEnemy7
wEnemiesDataEnd::
wTotalLevelEnemiesNo:: ds 1 ; original number of enemies in the level
wCurrLevelEnemiesNo:: ds 1 ; curr enemy level
SECTION "Enemies Manager", ROM0
/* Read data on where enemy should be and its type
Initialise the enemy
Parameters:
- bc: EnemyStageData address
*/
InitEnemiesAndPlaceOnMap::
push bc
mem_set_small wEnemiesData, 0, wEnemiesDataEnd - wEnemiesData ; reset all enemy data
pop bc
ld hl, wEnemiesData
ld a, [bc] ; get number of enemies in level
ld d, a ; transfer the numbner of enemies to d
ld [wTotalLevelEnemiesNo], a
ld [wCurrLevelEnemiesNo], a
inc bc
.loop
push de ; PUSH DE = loop counter
ld a, [bc]
ld [hli], a ; store flag
inc bc
inc hl ; skip PosYInterpolateTarget, since init to 0 abv
ld a, [bc]
ld d, a
ld [hli], a ; set first byte of pos y
inc bc
inc hl ; skip second byte of pos y = 0
inc hl ; skip PosXInterpolateTarget = 0
ld a, [bc]
ld e, a
ld [hli], a ; set first byte of pos x
inc hl ; skip second byte of pos x = 0
inc bc
ld a, [bc]
ld [hli], a ; set direction
inc bc
ld a, [bc]
ld [hli], a ; set health
inc bc
ld a, [bc]
ld [hli], a ; set first part of velocity
inc bc
ld a, [bc]
ld [hli], a ; set second part of velocity
inc bc
inc hl ; skip updateFrameCounter
inc hl ; skip updateFrameCounter
inc hl ; skip CurrAnimationFrame = 0
ld a, [bc]
ld [hli], a ; set CurrStateMaxAnimFrame
inc bc
inc hl
inc hl ; skip FlickerEffect
; d = pos y, e = pos x
ld a, d
ld [hli], a ; spawn pos Y
ld a, e
ld [hli], a ; spawn pos X
pop de ; POP DE = loop counter
dec d
jr nz, .loop
.endloop
call UpdateEnemyCounterUI
ret
UpdateAllEnemies::
ld hl, wEnemiesData
ld a, [wTotalLevelEnemiesNo] ; get number of enemies in level
ld d, a
.startOfLoop
push hl ; PUSH HL = enemy address
push de ; push DE = loop counter
ld a, [hl]
bit BIT_FLAG_ACTIVE, a ; check if alive
jr z, .nextLoop
.updateEnemy
and a, BIT_MASK_TYPE ; get the type only
jr z, .updateEnemyA
.enemyTypeA ; turret
cp a, TYPE_ENEMYA_MOV
jr nz, .enemyTypeB
.updateEnemyA
call UpdateEnemyA ; call correct update for enemy
jr .nextLoop
.enemyTypeB ; turtle
cp a, TYPE_ENEMYB
jr nz, .enemyTypeC
call UpdateEnemyB ; call correct update for enemy
jr .nextLoop
.enemyTypeC
cp a, TYPE_ENEMYC
jr nz, .enemyTypeD
call UpdateEnemyC
jr .nextLoop
.enemyTypeD ; ghost
cp a, TYPE_ENEMYD
jr nz, .enemyBoss
call UpdateEnemyD
jr .nextLoop
.enemyBoss
cp a, TYPE_ENEMY_BOSS
jr nz, .nextLoop
call UpdateEnemyBoss
.nextLoop
pop de ; POP de = loop counter
pop hl ; POP HL = enemy address
dec d
jr z, .endOfLoop
ld bc, sizeof_Character
add hl, bc
jr .startOfLoop
.endOfLoop
ret
/* For enemies shooting in directions it is not facing
de - enemy address
registers changed:
- AF
- BC
- DE
- HL
*/
EnemyShootDir::
push de ; PUSH DE = enemy address
ld a, e
add a, Character_Direction
ld e, a
ld a, d
adc a, 0
ld d, a
ld a, [de] ; get direction
and a, SHOOT_DIR_BIT_MASK
.shootUp
bit BIT_SHOOT_UP_CMP, a
jr z, .shootDown
ld c, DIR_UP
pop de ; POP DE = enemy address
push de ; PUSH DE = enemy address
push af ; PUSH AF = dir
call EnemyShoot
pop af ; POP AF = dir
.shootDown
bit BIT_SHOOT_DOWN_CMP, a
jr z, .shootRight
ld c, DIR_DOWN
pop de ; POP DE = enemy address
push de ; PUSH DE = enemy address
push af ; PUSH AF = dir
call EnemyShoot
pop af ; POP AF = dir
.shootRight
bit BIT_SHOOT_RIGHT_CMP, a
jr z, .shootLeft
ld c, DIR_RIGHT
pop de ; POP DE = enemy address
push de ; PUSH DE = enemy address
push af ; PUSH AF = dir
call EnemyShoot
pop af ; POP AF = dir
.shootLeft
bit BIT_SHOOT_LEFT_CMP, a
jr z, .end
ld c, DIR_LEFT
pop de ; POP DE = enemy address
call EnemyShoot
ret
.end
pop de ; POP DE = enemy address
ret
/* Attack
de - enemy address
c - direction the bullet will travel
registers changed:
- AF
- BC
- DE
- HL
*/
EnemyShoot::
; hl - address of bullet, de - address of enemy
ld hl, w_BulletObjectPlayerEnd
ld b, ENEMY_BULLET_NUM
call GetInactiveBullet ; get bullet address, store in hl
ld a, [hl] ; check if bullet is active
bit BIT_FLAG_ACTIVE, a
jr nz, .finishAttack ; if active, finish attack
; check what projectile type it should be
ld a, [de] ; get flags
and a, BIT_MASK_TYPE
jr z, .inkType
.checkType
cp a, TYPE_ENEMYA_MOV ; check if the squid
jr nz, .spikeBullet
.inkType
ld a, TYPE_BULLET_INK
jr .initProjectile
.spikeBullet
cp a, TYPE_ENEMYC ; check if the blowfish
jr nz, .windProjectile
ld a, TYPE_BULLET_SPIKE
jr .initProjectile
.windProjectile
ld a, TYPE_BULLET_WIND
.initProjectile ; set the variables
; a = type, de = enemy address, c = dir
or a, FLAG_ACTIVE | FLAG_ENEMY
ld [hli], a ; its alive
ld a, c ; a = c = dir
ld [hli], a ; load direction
ld a, BULLET_VELOCITY
ld [hli], a ; velocity
xor a
ld [hli], a ; second part of velocity
inc de
inc de ; skip posYinterpolateTarget
ld a, [de] ; pos Y
ld [hli], a ; set first byte of pos Y for bullet
inc de
ld a, [de] ; pos Y second byte
ld [hli], a ; set second byte of pos Y for bullet
inc de ; go to next byte
inc de ; skip PosXInterpolateTarget
ld a, [de] ; pos X first byte
ld [hli], a ; set first byte of pos X for bullet
inc de
ld a, [de] ; pos X second byte
ld [hl], a ; set second byte of pos X for bullet
.finishAttack
ret
/* Movement where you move in a direction and when hit wall, move the other way
hl: enemy starting address
*/
EnemyBounceOnWallMovement::
; movement behaviour, goes in opposite direction when hit wall
push hl ; PUSH HL = enemy starting address
ld de, Character_Velocity
add hl, de
ld a, [hli]
ld c, a
ld a, [hl]
ld b, a ; bc = velocity, note the velocity in data is stored in little endian
dec hl
dec hl
dec hl
ld a, [hl]
and a, DIR_BIT_MASK ; only want the first 2 bits for move direction
dec hl
dec hl
ld d, h ; de = posX address
ld e, l
dec hl ; pos y second half
dec hl
dec hl
; bc = velocity, hl = posY address, de = posX address
.upDirMove
cp a, DIR_UP
jr nz, .downDirMove
push bc ; PUSH BC = velocity
tile_collision_check_up_reg ENEMY_COLLIDER_SIZE, CHARACTER_COLLIDABLE_TILES, .collideOnWall
pop bc ; POP BC = velocity
interpolate_pos_dec_reg
jp .end
.downDirMove
cp a, DIR_DOWN
jr nz, .rightDirMove
push bc ; PUSH BC = velocity
tile_collision_check_down_reg ENEMY_COLLIDER_SIZE, CHARACTER_COLLIDABLE_TILES, .collideOnWall
pop bc ; POP BC = velocity
interpolate_pos_inc_reg
jp .end
.rightDirMove
cp a, DIR_RIGHT
jr nz, .leftDirMove
push bc ; PUSH BC = velocity
tile_collision_check_right_reg ENEMY_COLLIDER_SIZE, CHARACTER_COLLIDABLE_TILES, .collideOnWall
pop bc ; POP BC = velocity
ld h, d
ld l, e ; hl = posX address
interpolate_pos_inc_reg
jr .end
.leftDirMove
push bc ; PUSH BC = velocity
tile_collision_check_left_reg ENEMY_COLLIDER_SIZE, CHARACTER_COLLIDABLE_TILES, .collideOnWall
pop bc ; POP BC = velocity
ld h, d
ld l, e ; hl = posX address
interpolate_pos_dec_reg
jr .end
.collideOnWall ; move the opposite direction
pop bc ; POP BC = velocity
pop hl ; POP HL = enemy starting address
push hl ; PUSH HL = enemy starting address
ld de, Character_Direction
add hl, de
ld a, [hl]
xor a, %00000001 ; invert last bit, get opposite direction
ld [hl], a
.end
pop hl ; POP HL = enemy starting address
ret
/* Enemy just moves in direction set, no collision
hl - enemy starting address
Register changes:
- af
- de
- hl
*/
EnemyMoveBasedOnDir::
ld de, Character_Velocity + 1
add hl, de
ld a, [hl]
ld b, a
dec hl
ld a, [hl]
ld c, a ; bc = velocity, note the velocity in data is stored in little endian
dec hl
dec hl
ld a, [hl]
dec hl
dec hl
and a, DIR_BIT_MASK ; only want the first 2 bits for move direction
ASSERT DIR_UP == 0
and a, a ; cp a, 0
jr z, .upDir
ASSERT DIR_DOWN == 1
dec a
jr z, .downDir
ASSERT DIR_LEFT == 2
dec a
jr z, .leftDir
ASSERT DIR_RIGHT > 2
; bc = velocity, hl = posX address
.rightDir
interpolate_pos_inc_reg
jr .end
.upDir
dec hl
dec hl
dec hl
interpolate_pos_dec_reg
jr .end
.downDir
dec hl
dec hl
dec hl
interpolate_pos_inc_reg
jr .end
.leftDir
interpolate_pos_dec_reg
.end
ret
/* Update the flicker effect in enemy
Parameters:
- hl: address of enemy
Registers changed:
- af
- de
- hl
Return:
- hl: flicker effect int address
*/
UpdateEnemyEffects::
ld de, Character_FlickerEffect
add hl, de
ld a, [hli]
and a, a
jr z, .end
ld d, a ; b = FlickerEffect int portion
ld a, [hl] ; get fractional portion
add a, ENEMY_FLICKER_UPDATE_SPEED
ld [hl], a ; update fractional portion
dec hl
jr nc, .end
dec d
ld a, d
ld [hl], a ; update new interger portion value
.end
ret
/* Render and set enemy OAM data and animation
Parameters:
- hl: address of enemy
- bc: address of enemy animation data
*/
UpdateEnemySpriteOAM::
push hl ; PUSH HL = enemy address
; check if should render this frame
ld de, Character_FlickerEffect
add hl, de
ld a, [hl]
and a, FLICKER_BITMASK
jr z, .startUpdateOAM
pop hl
ret
.startUpdateOAM
dec hl
dec hl
ld a, [hl] ; get curr frame
sla a
sla a ; curr animation frame x 4
add a, c
ld c, a
ld a, b
adc a, 0 ; add offset to animation address: bc + a
ld b, a
pop hl ; POP HL = enemy address
inc hl ; skip flags
inc hl ; skip PosYInterpolateTarget go to y pos
; Convert position from world space to screen space.
ld a, [wShadowSCData]
ld d, a
ld a, [hli] ; get Y pos
sub a, d
add a, 8
ld d, a ; store y screen pos at b
inc hl ; skip second part of y pos
inc hl ; skip the PosXInterpolateTarget
ld a, [wShadowSCData + 1]
ld e, a
ld a, [hl] ; get x pos
sub a, e
ld e, a ; store x screen pos at c
; hl = shadow OAM
ld a, [wCurrentShadowOAMPtr]
ld l, a
ld h, HIGH(wShadowOAM)
; start initialising to shadow OAM
ld a, d
ld [hli], a ; init screen y Pos, first sprite y offset 8
ld a, e
ld [hli], a ; init screen x pos, first sprite x offset 0
ld a, [bc] ; get sprite ID
ld [hli], a
inc bc
ld a, [bc] ; get flags
ld [hli], a
inc bc
; Init second half of enemy sprite to shadow OAM
ld a, d
ld [hli], a ; init screen y Pos, second sprite y offset 8
ld a, e
add a, 8
ld [hli], a ; init screen x pos, second sprite x offset 8
ld a, [bc] ; get sprite ID
ld [hli], a
inc bc
ld a, [bc] ; get flags
ld [hli], a
; update the current address of from hl to the wCurrentShadowOAMPtr
ld a, l
ld [wCurrentShadowOAMPtr], a
.end
ret
/*
Call to loop through whether an entity collided with any enemies
b - entity pos Y
c - entity pos X
d - entity collider size
return value:
a : if more than 0, means collided
hl : enemy collided address
*/
CheckEnemyCollisionLoop::
ld hl, wEnemy0
ld a, [wTotalLevelEnemiesNo]
.startOfEnemyLoop
push af ; PUSH AF = loop counter
ld a, [hl]
bit BIT_FLAG_ACTIVE, a ; check if enemy alive
jr z, .nextEnemyLoop
push hl ; PUSH HL = enemy starting address
inc hl
inc hl
ld e, ENEMY_BULLET_COLLIDER_SIZE
and a, BIT_MASK_TYPE ; check type
cp a, TYPE_ENEMY_BOSS
jr nz, .checkCollision
ld e, BOSS_ENEMY_COLLIDER_SIZE
.checkCollision
push de ; PUSH DE = collider size for enemy and other entity
ld a, [hli] ; get enemy pos Y
ld d, a
inc hl
inc hl
ld a, [hl] ; get enemy pos X
ld e, a ; d = enemy pos Y, e = enemy position X
pop hl ; POP HL = collider size for enemy and other entity
call SpriteCollisionCheck
and a ; check if a = 0
ld d, h
ld e, l ; de = collider size for enemy and other entity
pop hl ; POP HL = enemy starting address
jr z, .nextEnemyLoop
pop af ; POP AF = loop counter
jr .end
.nextEnemyLoop
pop af ; POP AF = loop counter
dec a
jr z, .end
push bc ; PUSH BC = player y and x pos
ld bc, sizeof_Character
add hl, bc
pop bc ; POP BC = player y and x pos
jr .startOfEnemyLoop
.end
ret
/* Call this when enemy has been hit
hl - enemy address
b - bullet damage
WARNING: this is assuming health < 127. Want to prevent underflow, we defined bit 7 to be for -ve
Registers changed:
- af
- de
- hl
*/
HitEnemy::
push hl ; PUSH hl = enemy address
ld a, b
cp a, BULLET_POWER_UP_DAMAGE ; if its powerup damage, can hit regardless
jr z, .hitEnemy
ld a, [hl] ; get enemy flags
and a, BIT_MASK_TYPE
cp a, TYPE_ENEMYB ; check which enemy it is, and whether u can shoot it or not
jr nz, .hitEnemy
.checkCanHit
ld de, Character_UpdateFrameCounter + 1
add hl, de
ld a, [hl]
add a, ENEMY_TYPEB_REST_STATE_FRAME
cp a, ENEMY_TYPEB_REST_STATE_FRAME + ENEMY_TYPEB_ATTACK_STATE_FRAME
pop hl ; POP hl = enemy address
call nc, HitTurtleShellSFX
jr nc, .end ; enemy B is in attack mode
push hl ; PUSH hl = enemy address
.hitEnemy
; b = deduct health
ld a, [hl] ; get flags
and a, BIT_MASK_TYPE
ld c, a
ld de, Character_HP
add hl, de
ld a, [hl]
sub a, b ; deduct health
ld [hl], a ; update hp
; check health <= 0
and a
jr z, .dead
cp a, 127
jr nc, .dead ; value underflowed, go to dead
ld b, a ; b = health
ld a, c
cp a, TYPE_ENEMY_BOSS
pop hl ; POP HL = enemy address
push hl ; PUSH HL = enemy address
call z, BossCheckHealth
.flickerEffect ; not dead, set damage flicker effect
pop hl ; POP HL = enemy address
ld a, DAMAGE_FLICKER_EFFECT
ld de, Character_FlickerEffect
add hl, de
ld [hli], a ; set the integer portion
xor a
ld [hl], a ; reset the fractional portion
call EnemyHitSFX
ret
.dead ; dead, turn it inactive
pop hl ; POP HL = enemy address
ld a, FLAG_INACTIVE
ld [hli], a
; reduce enemy counter by 1
ld a, [wCurrLevelEnemiesNo]
dec a
ld [wCurrLevelEnemiesNo], a
jr nz, .spawnEffects
ld a, GAME_END
ld [wGameEnd], a
.spawnEffects
; spawn particle effects
inc hl
ld a, [hli] ; get y pos
ld d, a
inc hl
inc hl
ld a, [hl] ; get x pos
ld e, a
ld a, b ; a = bullet damage
ld b, TYPE_PARTICLE_KILL_ENEMY
ld c, PARTICLE_KILL_ENEMY_ALIVE_TIME
cp a, BULLET_POWER_UP_DAMAGE ; check bullet type from here based on its damage
jr nz, .continueUpdate
ld b, TYPE_PARTICLE_POWER_KILL_ENEMY
ld c, PARTICLE_POWER_KILL_ENEMY_ALIVE_TIME
.continueUpdate
call SpawnParticleEffect
call EnemyDeathSFX
call UpdateEnemyCounterUI
.end
ret
/* To be called when player gets hit, update things for enemies
registers changed:
- af
- bc
- de
- hl
*/
PlayerGetsHitEnemyBehavior::
push hl ; Please don't remove this. This breaks everything. Took me hours to find this. I really want to cry now.
; loop through enemy, check type, then call the correct function
ld hl, wEnemy0
ld a, [wTotalLevelEnemiesNo]
.startOfEnemyLoop
push af ; PUSH AF = loop counter
ld a, [hl]
bit BIT_FLAG_ACTIVE, a ; check if enemy alive
jr z, .nextEnemyLoop
; get enemy type and check if got the reset
and a, BIT_MASK_TYPE
.enemyTypeD ; ghost
cp a, TYPE_ENEMYD
jr nz, .bossType
push hl ; PUSH hl = enemy address
call ResetEnemyD
pop hl ; POP hl = enemy address
.bossType
cp a, TYPE_ENEMY_BOSS
jr nz, .nextEnemyLoop
push hl ; PUSH hl = enemy address
call ResetBossLocation
pop hl ; POP hl = enemy address
.nextEnemyLoop
pop af ; POP AF = loop counter
dec a
jr z, .end
ld bc, sizeof_Character
add hl, bc
jr .startOfEnemyLoop
.end
pop hl
ret
/* Checks if enemy is on screen
Parameters
- hl - enemy address
- b, y offset
- c, x offset
Return value:
- a = 0/1 for false and true
- hl = pos X address
Registers changed:
- af
- de
- hl
*/
CheckEnemyInScreen::
ld e, 0
ld a, [wShadowSCData] ; get screen pos y
ld d, a
inc hl
inc hl ; offset address to get posY
ld a, [hli] ; get enemy pos Y
add a, b
sub a, d ; enemy y pos - camera pos y
jr c, .endCheck
.checkWithinYAxis
ld d, a
ld a, b
add a, a
add a, VIEWPORT_SIZE_Y ; b * 2 + VIEWPORT_SIZE_Y
cp a, d ; check if enemy pos is within y screen pos
jr c, .endCheck
.checkXOffset
ld a, [wShadowSCData + 1] ; get screen pos x
ld d, a
inc hl
inc hl ; offset address to get posX
ld a, [hl]
add a, c
sub a, d ; enemy x pos - camera pos x
jr c, .endCheck
.checkWithinXAxis
ld d, a
ld a, b
add a, a
add a, VIEWPORT_SIZE_X ; b * 2 + VIEWPORT_SIZE_X
cp a, d
jr c, .endCheck
ld e, 1 ; is within screen
.endCheck
; e = whether on screen or not
ld a, e
ret
| 21.12231 | 117 | 0.623237 |
3d916619ec22538a9ad65c0c3afac79ebdd9f7e1 | 1,958 | asm | Assembly | Transynther/x86/_processed/AVXALIGN/_ht_zr_un_/i7-7700_9_0x48_notsx.log_26_1673.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/AVXALIGN/_ht_zr_un_/i7-7700_9_0x48_notsx.log_26_1673.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/AVXALIGN/_ht_zr_un_/i7-7700_9_0x48_notsx.log_26_1673.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r12
push %rax
push %rcx
push %rdi
push %rsi
lea addresses_WT_ht+0x8832, %rsi
lea addresses_D_ht+0x19a92, %rdi
nop
nop
nop
cmp %rax, %rax
mov $8, %rcx
rep movsb
mfence
lea addresses_UC_ht+0x1e852, %rsi
lea addresses_A_ht+0x169d2, %rdi
nop
nop
nop
nop
add %r12, %r12
mov $33, %rcx
rep movsb
nop
nop
nop
add %r12, %r12
pop %rsi
pop %rdi
pop %rcx
pop %rax
pop %r12
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r11
push %r9
push %rax
push %rcx
push %rdx
// Load
lea addresses_US+0x4952, %r10
nop
add %r9, %r9
mov (%r10), %rax
sub %rax, %rax
// Store
lea addresses_WC+0x18f93, %rcx
nop
cmp $43555, %rdx
movw $0x5152, (%rcx)
nop
nop
and $18428, %r10
// Faulty Load
lea addresses_WC+0x179d2, %r11
nop
nop
nop
nop
nop
cmp %rdx, %rdx
vmovntdqa (%r11), %ymm5
vextracti128 $0, %ymm5, %xmm5
vpextrq $1, %xmm5, %rcx
lea oracles, %r9
and $0xff, %rcx
shlq $12, %rcx
mov (%r9,%rcx,1), %rcx
pop %rdx
pop %rcx
pop %rax
pop %r9
pop %r11
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 4, 'type': 'addresses_WC', 'congruent': 0}}
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': True, 'size': 8, 'type': 'addresses_US', 'congruent': 7}}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 2, 'type': 'addresses_WC', 'congruent': 0}, 'OP': 'STOR'}
[Faulty Load]
{'OP': 'LOAD', 'src': {'same': True, 'NT': True, 'AVXalign': False, 'size': 32, 'type': 'addresses_WC', 'congruent': 0}}
<gen_prepare_buffer>
{'dst': {'same': False, 'congruent': 6, 'type': 'addresses_D_ht'}, 'OP': 'REPM', 'src': {'same': False, 'congruent': 5, 'type': 'addresses_WT_ht'}}
{'dst': {'same': False, 'congruent': 11, 'type': 'addresses_A_ht'}, 'OP': 'REPM', 'src': {'same': False, 'congruent': 7, 'type': 'addresses_UC_ht'}}
{'18': 1, '49': 13, '00': 12}
49 49 00 00 18 49 49 49 49 00 49 49 49 00 00 49 00 00 00 49 00 49 00 00 49 00
*/
| 19.777778 | 148 | 0.645557 |
7752e3b9b1fdf18044d28cd275b008284321f249 | 2,245 | asm | Assembly | programs/oeis/288/A288732.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/288/A288732.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | programs/oeis/288/A288732.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | ; A288732: a(n) = a(n-1) + 2*a(n-4) - 2*a(n-5) for n >= 5, where a(0) = 2, a(1) = 4, a(2) = 6, a(3) = 8, a(4) = 10.
; 2,4,6,8,10,14,18,22,26,34,42,50,58,74,90,106,122,154,186,218,250,314,378,442,506,634,762,890,1018,1274,1530,1786,2042,2554,3066,3578,4090,5114,6138,7162,8186,10234,12282,14330,16378,20474,24570,28666,32762,40954,49146,57338,65530,81914,98298,114682,131066,163834,196602,229370,262138,327674,393210,458746,524282,655354,786426,917498,1048570,1310714,1572858,1835002,2097146,2621434,3145722,3670010,4194298,5242874,6291450,7340026,8388602,10485754,12582906,14680058,16777210,20971514,25165818,29360122,33554426,41943034,50331642,58720250,67108858,83886074,100663290,117440506,134217722,167772154,201326586,234881018,268435450,335544314,402653178,469762042,536870906,671088634,805306362,939524090,1073741818,1342177274,1610612730,1879048186,2147483642,2684354554,3221225466,3758096378,4294967290,5368709114,6442450938,7516192762,8589934586,10737418234,12884901882,15032385530,17179869178,21474836474,25769803770,30064771066,34359738362,42949672954,51539607546,60129542138,68719476730,85899345914,103079215098,120259084282,137438953466,171798691834,206158430202,240518168570,274877906938,343597383674,412316860410,481036337146,549755813882,687194767354,824633720826,962072674298,1099511627770,1374389534714,1649267441658,1924145348602,2199023255546,2748779069434,3298534883322,3848290697210,4398046511098,5497558138874,6597069766650,7696581394426,8796093022202,10995116277754,13194139533306,15393162788858,17592186044410,21990232555514,26388279066618,30786325577722,35184372088826,43980465111034,52776558133242,61572651155450,70368744177658,87960930222074,105553116266490,123145302310906,140737488355322,175921860444154,211106232532986,246290604621818,281474976710650,351843720888314,422212465065978,492581209243642,562949953421306,703687441776634,844424930131962,985162418487290,1125899906842618,1407374883553274,1688849860263930,1970324836974586,2251799813685242,2814749767106554,3377699720527866,3940649673949178,4503599627370490,5629499534213114,6755399441055738,7881299347898362,9007199254740986
mov $2,$0
add $2,8
mov $3,$0
lpb $0
sub $0,1
mov $4,$2
add $2,$3
sub $4,$3
mul $3,2
trn $3,$4
lpe
sub $2,6
add $1,$2
| 132.058824 | 1,998 | 0.848107 |
58b4c1ff96e929ca8bce7cf1ac408181282f3a1a | 704 | asm | Assembly | oeis/321/A321810.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/321/A321810.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/321/A321810.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A321810: Sum of 6th powers of odd divisors of n.
; 1,1,730,1,15626,730,117650,1,532171,15626,1771562,730,4826810,117650,11406980,1,24137570,532171,47045882,15626,85884500,1771562,148035890,730,244156251,4826810,387952660,117650,594823322,11406980,887503682,1,1293240260,24137570,1838398900,532171,2565726410,47045882,3523571300,15626,4750104242,85884500,6321363050,1771562,8315704046,148035890,10779215330,730,13841404851,244156251,17620426100,4826810,22164361130,387952660,27682427812,117650,34343493860,594823322,42180533642,11406980,51520374362
add $0,1
mov $2,$0
lpb $0
dif $2,2
mov $3,$2
dif $3,$0
cmp $3,$2
cmp $3,0
mul $3,$0
sub $0,1
pow $3,6
add $1,$3
lpe
add $1,1
mov $0,$1
| 37.052632 | 498 | 0.774148 |
6bdfac85f4fd9c55e3cf2ac57cb99027b3adc850 | 68 | asm | Assembly | VirtualMachine/Win32/UnitTests/Conditionals/test15_xor_Boolean.asm | ObjectPascalInterpreter/BookPart_3 | 95150d4d02f7e13e5b1ebb58c249073a384f2a0a | [
"Apache-2.0"
] | 8 | 2021-11-07T22:45:25.000Z | 2022-03-12T21:38:53.000Z | VirtualMachine/Win32/UnitTests/Conditionals/test15_xor_Boolean.asm | Irwin1985/BookPart_2 | 4e8c2e47cd09b77c6e5bd3455ddfe7492adf26bf | [
"Apache-2.0"
] | 4 | 2021-09-23T02:13:55.000Z | 2021-12-07T06:08:17.000Z | VirtualMachine/Win32/UnitTests/Conditionals/test15_xor_Boolean.asm | Irwin1985/BookPart_2 | 4e8c2e47cd09b77c6e5bd3455ddfe7492adf26bf | [
"Apache-2.0"
] | 4 | 2021-11-24T17:24:56.000Z | 2021-12-21T04:56:58.000Z | # Test15 - XOR Test
pushb true
pushb true
xor
halt
| 9.714286 | 19 | 0.558824 |
cbc5f725d8de99e57e29ce4a43a90402c281e445 | 1,091 | asm | Assembly | PBAR.asm | hwreverse/PC-G850V | 53a4dca7b31f940412e0ebddba395f2b8deda895 | [
"MIT"
] | 7 | 2020-09-30T19:56:39.000Z | 2021-09-30T12:05:18.000Z | PBAR.asm | hwreverse/PC-G850V | 53a4dca7b31f940412e0ebddba395f2b8deda895 | [
"MIT"
] | 1 | 2021-09-04T02:52:33.000Z | 2021-09-04T02:52:33.000Z | PBAR.asm | hwreverse/PC-G850V | 53a4dca7b31f940412e0ebddba395f2b8deda895 | [
"MIT"
] | 2 | 2021-09-03T12:28:16.000Z | 2021-09-30T13:47:01.000Z | 10 ORG 100H
20 JP MAIN
30RPTCHR EQU 0BFEEH
40GPF EQU 0BFD0H
50AOUT EQU 0BD09H
60PUTSTR EQU 0BFF1H
70WAITK EQU 0BFCDH
100MAIN: CALL CLS
110 LD A,96
120 LD (WIDTH),A
130 LD A,0
140 LD (COUNT),A
150 LD DE,0101H
160 LD (POSXY),DE
170 CALL PBAR
180 LD DE,0101H
190 LD (POSXY),DE
200 LD A,48
210 LD (COUNT),A
220 CALL PBAR
230 LD HL,LABEL
240 LD B,5
250 LD DE,0208H
260 CALL PUTSTR
270 CALL WAIT
280 RET
980LABEL: DB '50%',13,10
990COUNT: DB 0
1000WIDTH: DB 0
1010POSXY: DB 0,0
1020BUFFER: DEFS 96
1030PBAR: LD A,0FFH
1040 LD HL,BUFFER
1050 LD (HL),A
1060 INC HL
1070 LD A,(WIDTH)
1080 DEC A
1090 DEC A
1100 LD B,A
1110PBAR0: LD A,(COUNT)
1120 CP 0
1130 JP NZ,PBAR1
1140 LD A,81H
1150 JP PBAR2
1160PBAR1: DEC A
1170 LD (COUNT),A
1180 LD A,0FFH
1190PBAR2: LD (HL),A
1200 INC HL
1210 DJNZ PBAR0
1220 LD A,0FFH
1230 LD (HL),A
1240 LD HL,BUFFER
1250 LD A,(WIDTH)
1260 LD B,A
1270 LD DE,(POSXY)
1280 CALL GPF
1290 RET
1600WAIT: CALL WAITK
1610 CP 0
1620 JP Z,WAIT
1630 RET
2000CLS: LD B, 144
2010 LD DE, 0
2020CLS0: LD A, 32
2030 CALL RPTCHR
2040 RET
2050CLLN: LD B,24
2060 LD E,0
2070 JP CLS0
| 13.987179 | 24 | 0.72594 |
024799e03bc88386e27b8151ea2777676fe342fa | 360 | asm | Assembly | oeis/100/A100455.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/100/A100455.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/100/A100455.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A100455: a(n) = 2^n + sin(n*Pi/2).
; Submitted by Jon Maiga
; 1,3,4,7,16,33,64,127,256,513,1024,2047,4096,8193,16384,32767,65536,131073,262144,524287,1048576,2097153,4194304,8388607,16777216,33554433,67108864,134217727,268435456,536870913,1073741824,2147483647,4294967296,8589934593
mov $1,2
pow $1,$0
pow $0,5
add $0,1
mod $0,4
add $0,2
add $0,$1
sub $0,3
| 27.692308 | 222 | 0.733333 |
7fc82975e751c6938c625c2c6cedc4e4dfbc4f60 | 416 | asm | Assembly | oeis/122/A122467.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/122/A122467.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/122/A122467.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A122467: Write n-th semiprime in binary, sum as if decimal numbers.
; Submitted by Simon Strandgaard
; 100,210,1211,2221,3331,4442,14543,24653,35654,46664,146665,246675,346686,446796,546907,648017,758018,868029,978140,1089141,1200151,1311261,2311262,3311363,4312373,5313474,6323484,7333585,8343695
lpb $0
mov $2,$0
sub $0,1
seq $2,122466 ; Semiprimes written in base 2.
add $1,$2
lpe
mov $0,$1
add $0,100
| 32 | 196 | 0.754808 |
b478aaa202c508f7e5fc53be0c25c9f5c0cb9b4a | 648 | asm | Assembly | oeis/005/A005994.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/005/A005994.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/005/A005994.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A005994: Alkane (or paraffin) numbers l(7,n).
; Submitted by Jamie Morken(s3)
; 1,3,9,19,38,66,110,170,255,365,511,693,924,1204,1548,1956,2445,3015,3685,4455,5346,6358,7514,8814,10283,11921,13755,15785,18040,20520,23256,26248,29529,33099,36993,41211,45790,50730,56070,61810,67991,74613,81719,89309,97428,106076,115300,125100,135525,146575,158301,170703,183834,197694,212338,227766,244035,261145,279155,298065,317936,338768,360624,383504,407473,432531,458745,486115,514710,544530,575646,608058,641839,676989,713583,751621,791180,832260,874940,919220,965181,1012823,1062229,1113399
add $0,4
mov $1,$0
bin $0,4
div $1,2
bin $1,2
add $0,$1
div $0,2
| 54 | 501 | 0.783951 |
09d8fc74b38d060318cbbb294c4ebd56c0b25ba5 | 28,865 | asm | Assembly | source/falling_soundengine.asm | tragicmuffin/falling-NES | 52dcb8a951200562e696dfc2aba5d4d14edd0078 | [
"MIT"
] | 30 | 2018-01-15T07:36:34.000Z | 2019-07-12T04:57:26.000Z | source/falling_soundengine.asm | tragicmuffin/falling-NES | 52dcb8a951200562e696dfc2aba5d4d14edd0078 | [
"MIT"
] | 1 | 2018-01-18T17:43:36.000Z | 2018-01-18T21:09:38.000Z | source/falling_soundengine.asm | tragicmuffin/falling-NES | 52dcb8a951200562e696dfc2aba5d4d14edd0078 | [
"MIT"
] | 4 | 2019-04-25T11:13:54.000Z | 2019-07-12T04:57:28.000Z | ;;;; Sound Engine (FALLING) ;;;;
;; Based on Nerdy Nights Sound tutorial (http://nintendoage.com/forum/messageview.cfm?catid=22&threadid=23452)
; Sound is organized into 6 streams, including 4 dedicated music streams, and two SFX streams.
; Music/SFX streams are listed by priority.
; Streams with higher indices have higher priority and will overwrite the data coming in from lower priority streams.
; SFX have highest priority so they will always play above music.
; When an SFX stream takes over a sound channel, music streams will continue but that channel's music stream will be overtaken by the SFX.
; Songs and SFX will be loaded from .i files.
; TODO: Implement last features of http://nintendoage.com/forum/messageview.cfm?catid=22&threadid=26247
;;; Approximate tempo chart ;;;;
; Equation: Y = (17/30)*BPM + (2/3)
; 110 BPM = $3F
; 140 BPM = $50
; 450 BPM = $FF
; Store sound engine variables starting at $0300
.rsset $0300
;;; Variables ;;;
sound_disable_flag .rs 1 ; state of sound engine (0=on, 1=off)
sound_temp1 .rs 1 ; temporary variables
sound_temp2 .rs 1
sound_sq1_old .rs 1 ; last value written to $4003 (used to avoid crackling in squares)
sound_sq2_old .rs 1 ; last value written to $4007 (used to avoid crackling in squares)
jmp_ptr .rs 2 ; pointer used for indirect jumping
pause_flag .rs 1 ; flag set on pause to force lower volume envelopes on music streams
pause_temp .rs 1 ; temp variable to store duty and counter settings during pause filter
;; Data streams
stream_curr_sound .rs 6 ; song/sfx currently playing on stream
stream_status .rs 6 ; status byte (Bit0: 0=stream disabled, 1=stream enabled; Bit1: 0=not resting, 1=resting)
stream_channel .rs 6 ; channel that stream is playing on
stream_duty .rs 6 ; initial duty settings for this stream (volume overwritten by envelope)
stream_volenv .rs 6 ; current volume envelope
stream_volenv_index .rs 6 ; current position within the volume envelope
stream_ptr_LO .rs 6 ; low byte of pointer to data stream
stream_ptr_HI .rs 6 ; high byte of pointer to data stream
stream_tempo .rs 6 ; the value to add to our ticker total each frame
stream_note_LO .rs 6 ; low 8 bits of period for the current note playing on the stream
stream_note_HI .rs 6 ; high 3 bits of the note period
stream_ticker_total .rs 6 ; our running ticker total.
stream_note_length_counter .rs 6 ; how long a note should be played (next note will be loaded and played when this reaches 0)
stream_note_length .rs 6 ; keeps track of last note length encountered in stream (this way, several notes can follow one note length)
stream_loop1_counter .rs 6 ; finite looping counter for loop 1
stream_loop1_address .rs 6 ; finite looping address for loop 1
stream_loop2_counter .rs 6 ; finite looping counter for loop 2
stream_loop2_address .rs 6 ; finite looping address for loop 2
;; APU buffering
; Bytes 0-3: Square 1 ports ($4000-$4003)
; Bytes 4-7: Square 2 ports ($4004-$4007)
; Bytes 8-11: Triangle ports ($4008-$400B)
; Bytes 12-15: Noise ports ($400C-$400F)
soft_apu_ports .rs 16 ; reserve 16 bytes for APU buffering
;;; Constants ;;;
NUMSTREAMS = 6 ; number of streams allocated
; Stream aliases
MUSIC_SQ1 = $00 ; Music square wave 1 channel
MUSIC_SQ2 = $01 ; Music square wave 2 channel
MUSIC_TRI = $02 ; Music triangle wave channel
MUSIC_NOI = $03 ; Music noise channel
SFX_1 = $04 ; SFX channel 1 (can be set to any sound channel)
SFX_2 = $05 ; SFX channel 2 (can be set to any sound channel)
; Channel aliases
SQUARE_1 = $00
SQUARE_2 = $01
TRIANGLE = $02
NOISE = $03
;; Note length lookup table (order must match note length aliases)
note_length_table:
.db $01 ; 32nd note (shortest)
.db $02 ; 16th note
.db $04 ; Eighth note
.db $08 ; Quarter note
.db $10 ; Half note
.db $20 ; Whole note
.db $03 ; Dotted 16th note
.db $06 ; Dotted 8th note
.db $0C ; Dotted quarter note
.db $18 ; Dotted half note
.db $30 ; Dotted whole note
.db $05 ; Swing note: 5/32
.db $0A ; Swing note: 5/16 = 10/32
.db $0E ; Swing note: 7/16 = 14/32
.db $07 ; Swing note: 7/32
.db $0B ; Swing note: 11/32
.db $16 ; Swing note: 11/16 = 22/32
; Note length aliases (order must match note lookup table)
n_32 = $80 ; 32nd note
n_16 = $81 ; 16th note
n_8 = $82 ; Eighth note
n_4 = $83 ; Quarter note
n_2 = $84 ; Half note
n_1 = $85 ; Whole note
n_d16 = $86 ; Dotted 16th note
n_d8 = $87 ; Dotted Eighth note
n_d4 = $88 ; Dotted Quarter note
n_d2 = $89 ; Dotted Half note
n_d1 = $8A ; Dotted Whole note
n_s5_32 = $8B ; Swing note: 5/32
n_s5_16 = $8C ; Swing note: 5/16 = 10/32
n_s7_16 = $8D ; Swing note: 7/16 = 14/32
n_s7_32 = $8E ; Swing note: 7/32
n_s11_32 = $8F ; Swing note: 11/32
n_s11_16 = $90 ; Swing note: 11/16 = 22/32
; Volume envelope pointer table
volume_envelopes:
.dw se_ve_muted
.dw se_ve_constant
.dw se_ve_stac1
.dw se_ve_stac2
.dw se_ve_fadein
.dw se_ve_fadeout1
.dw se_ve_fadeout2
.dw se_ve_stac_echo
.dw se_ve_tri1
.dw se_ve_drumkick
.dw se_ve_drumsnare1
.dw se_ve_drumsnare2
.dw se_ve_drumhat
.dw se_ve_drumhat2
.dw se_ve_drumhat3
.dw se_ve_drumhat4
.dw se_ve_drumcrash1
.dw se_ve_drumcrash2
.dw se_ve_fallinghat1
.dw se_ve_fallingsnare1
.dw se_ve_fallingLFO1
.dw se_ve_fallingLFO2
.dw se_ve_fallingconstant0A
.dw se_ve_fallingconstant08
.dw se_ve_fallingshortfadeout
.dw se_ve_fallingsnare2
.dw se_ve_fallingkick1
.dw se_ve_fallingfadeout
; Volume envelope aliases
ve_muted = $00
ve_constant = $01
ve_stac1 = $02
ve_stac2 = $03
ve_fadein = $04
ve_fadeout1 = $05
ve_fadeout2 = $06
ve_stac_echo = $07
ve_tri1 = $08
ve_drumkick = $09
ve_drumsnare1 = $0A
ve_drumsnare2 = $0B
ve_drumhat = $0C
ve_drumhat2 = $0D
ve_drumhat3 = $0E
ve_drumhat4 = $0F
ve_drumcrash1 = $10
ve_drumcrash2 = $11
ve_fallinghat1 = $12
ve_fallingsnare1 = $13
ve_fallingLFO1 = $14
ve_fallingLFO2 = $15
ve_fallingconstant0A = $16
ve_fallingconstant08 = $17
ve_fallingshortfadeout = $18
ve_fallingsnare2 = $19
ve_fallingkick1 = $1A
ve_fallingfadeout = $1B
; Opcode jump table
sound_opcodes:
.dw se_op_endsound ; should be $A0
.dw se_op_change_ve ; should be $A1
.dw se_op_change_duty ; should be $A2
.dw se_op_change_tempo ; should be $A3
.dw se_op_inf_loop ; should be $A4
.dw se_op_loop1_set_counter ; should be $A5
.dw se_op_loop1_set_address ; should be $A6
.dw se_op_loop2_set_counter ; should be $A7
.dw se_op_loop2_set_address ; should be $A8
; Opcode aliases
endsound = $A0
change_ve = $A1
change_duty = $A2
change_tempo = $A3
inf_loopto = $A4
loop1for = $A5
loop1to = $A6
loop2for = $A7
loop2to = $A8
; Alternate opcode aliases
loopfor = $A5
loopto = $A6
;;; Entrances (sound engine accessor functions) ;;;
sound_init:
LDA #%00001111
STA $4015
LDA #$00
STA sound_disable_flag ; clear disable flag
LDA #$FF
STA sound_sq1_old
STA sound_sq2_old
se_silence:
LDA #$30
STA soft_apu_ports+0 ; set SQ1 volume to 0
STA soft_apu_ports+4 ; set SQ2 volume to 0
STA soft_apu_ports+12 ; set NOISE volume to 0
LDA #$80
STA soft_apu_ports+8 ; silence TRIANGLE
RTS ; end of sound_init
sound_disable:
LDA #$00
STA $4015 ; disable all sound channels
LDA #$01
STA sound_disable_flag ; set disable flag
RTS
; sound_load will prepare the sound engine to play a song or sfx.
; input A: song/sfx number to play
sound_load:
STA sound_temp1 ; save song number
ASL A ; multiply by 2. we are indexing into a table of pointers (words)
TAY
LDA song_headers, y ; setup the pointer to our song header
STA sound_ptr
LDA song_headers+1, y
STA sound_ptr+1
LDY #$00
LDA [sound_ptr], y ; read byte: # streams
STA sound_temp2 ; store in a temp variable. we will use this as a loop counter: how many streams to read stream headers for
INY
.loop:
LDA [sound_ptr], y ; read byte: stream number
TAX ; stream number acts as our variable index
INY
LDA [sound_ptr], y ; read byte: status (1=enable, 0=disable)
STA stream_status, x
BEQ .next_stream ; if status byte is 0, stream disabled, so we are done
INY
LDA [sound_ptr], y ; read byte: channel number
STA stream_channel, x
INY
LDA [sound_ptr], y ; read byte: initial duty settings
STA stream_duty, x
INY
LDA [sound_ptr], y ; read byte: volume envelope
STA stream_volenv, x
INY
LDA [sound_ptr], y ; read byte: pointer to stream data, LO byte (little endian, so low byte first)
STA stream_ptr_LO, x
INY
LDA [sound_ptr], y ; read byte: pointer to stream data, HI byte (little endian, so high byte last)
STA stream_ptr_HI, x
INY
LDA [sound_ptr], y ; read byte: initial tempo
STA stream_tempo, x
; Initializations for stream variables not passed through header
LDA #$00 ; initialize volume envelope index (start of envelope)
STA stream_volenv_index, x
LDA #$FF ; initialize ticker counters (large value so first tick will happen quickly)
STA stream_ticker_total, x
LDA #$01 ; initialize note length counters
STA stream_note_length_counter, x
LDA #$00 ; initialize finite loop counters
STA stream_loop1_counter, x
LDA #$00 ; initialize finite loop counters
STA stream_loop2_counter, x
.next_stream:
INY
LDA sound_temp1 ; song number
STA stream_curr_sound, x
DEC sound_temp2 ; our loop counter
BNE .loop
RTS
; sound_play_frame advances the sound engine by one frame
sound_play_frame:
LDA sound_disable_flag
BNE .done ; if disable flag is set, don't advance a frame
LDX #$00
.loop:
LDA stream_status, x
AND #$01 ; check whether the stream is active
BEQ .nextstream ; if not, skip it
LDA stream_ticker_total, x
CLC
ADC stream_tempo, x ; add the tempo to the ticker total. a "tick" will happen on overflow.
STA stream_ticker_total, x
BCC .nextstream ; if no overflow occured, there was no tick. we're done with this stream.
.tick
DEC stream_note_length_counter, x ; also decrement the note length counter
BNE .tick_update ; if counter is non-zero, our note isn't finished playing yet, end
.note_finished
LDA stream_note_length, x ; else our note is finished. reload the note length counter
STA stream_note_length_counter, x
JSR se_fetch_byte ; if the note is finished, advance the stream
.tick_update
JSR se_set_temp_ports ; populate port buffers with new stream data (happens on every tick)
.nextstream:
INX
CPX #NUMSTREAMS ; check if there is another stream
BNE .loop ; end after all streams have been checked and/or played
.endloop
JSR se_set_apu ; write data to APU (streams are buffered above and written all at once)
.done:
RTS
sound_pause:
; Runs when game is paused
LDA #$01
STA pause_flag ; set pause flag to activate volume filter
RTS
sound_unpause:
; Runs when game is unpaused
LDA #$00
STA pause_flag ; clear pause flag to deactivate volume filter
RTS
;;; Internal Subroutines ;;;
; se_fetch_byte reads one byte from a sound data stream and handles it.
; input X: stream number
se_fetch_byte:
LDA stream_ptr_LO, x ; get LO byte of pointer to note data stream
STA sound_ptr
LDA stream_ptr_HI, x ; get HI byte of pointer to note data stream
STA sound_ptr+1
LDY #$00
.fetch:
LDA [sound_ptr], y ; check next byte and determine whether it is Note, Note Length, or Opcode data
BPL .note ; if < $80, it's a Note
CMP #$A0
BCC .note_length ; else if < $A0, it's a Note Length
.opcode: ; else it's an Opcode
JSR se_opcode_launcher ; run opcode launcher (once opcode is run, it will RTS back here)
INY ; next position in the data stream
LDA stream_status, x
AND #%00000001
BNE .fetch ; after our opcode is done, grab another byte unless the stream is disabled
JMP .end ; if the stream is disabled, quit (otherwise, fetch next note).
.note_length:
AND #%01111111 ; zero out Bit7 (subtracts $80 to align note length aliases with lookup table offsets)
STY sound_temp1 ; save Y because we are about to destroy it
TAY
LDA note_length_table, y ; get the note length count value
STA stream_note_length, x ; save the note length in RAM so we can use it to refill the counter
STA stream_note_length_counter, x ; stick it in our note length counter
LDY sound_temp1 ; restore Y
INY ; set index to next byte in the stream
JMP .fetch ; since this was a Note Length, fetch the next byte to get the Note
.note:
STY sound_temp1 ; save our index into the data stream
ASL A ; muliply by 2
TAY
LDA note_table, y
STA stream_note_LO, x
LDA note_table+1, y
STA stream_note_HI, x
LDY sound_temp1 ; restore data stream index
LDA #$00 ; reset volume envelope for next note
STA stream_volenv_index, x
JSR se_check_rest ; check for a rest
.update_pointer:
INY
TYA
CLC
ADC stream_ptr_LO, x ; increment LO byte of pointer
STA stream_ptr_LO, x
BCC .end
INC stream_ptr_HI, x ; if LO byte wrapped, increment HI byte
.end:
RTS
se_opcode_launcher:
STY sound_temp1 ; save y register, because we are about to destroy it
SEC
SBC #$A0 ; turn our opcode byte into a table index by subtracting $A0 ($A0->$00, $A1->$01, $A2->$02, etc. Tables index from $00.)
ASL A ; multiply by 2 because we index into a table of addresses (words)
TAY
LDA sound_opcodes, y ; get low byte of subroutine address
STA jmp_ptr
LDA sound_opcodes+1, y ; get high byte
STA jmp_ptr+1
LDY sound_temp1 ; restore our y register
INY ; set to next position in data stream (assume an argument)
JMP [jmp_ptr] ; indirect jump to our opcode subroutine
; The opcode subroutine will RTS, returning to the JSR call in se_fetch_byte.
; se_check_rest reads the last note byte to see if it is our dummy "rest" note
se_check_rest:
LDA [sound_ptr], y ; read the last note byte again
CMP #rest ; is it a rest ($5E)?
BNE .not_rest
LDA stream_status, x
ORA #%00000010 ; if so, set the rest bit in the status byte
BNE .store ; (this will always branch, but BNE is cheaper than a JMP)
.not_rest:
LDA stream_status, x
AND #%11111101 ; if not, clear the rest bit in the status byte
.store:
STA stream_status, x
RTS
; se_set_apu writes buffered stream data to the APU ports.
; To avoid crackling generated by writing to square ports $4003 and $4007 too often, we only write if there was a note change.
se_set_apu:
.square1:
LDA soft_apu_ports+0
STA $4000
LDA soft_apu_ports+1
STA $4001
LDA soft_apu_ports+2
STA $4002
LDA soft_apu_ports+3
CMP sound_sq1_old ; compare to value last written to $4003
BEQ .square2 ; don't write this frame if it's unchanged
STA $4003
STA sound_sq1_old ; save the value we just wrote to $4003
.square2:
LDA soft_apu_ports+4
STA $4004
LDA soft_apu_ports+5
STA $4005
LDA soft_apu_ports+6
STA $4006
LDA soft_apu_ports+7
CMP sound_sq2_old ; compare to value last written to $4007
BEQ .triangle ; don't write this frame if it's unchanged
STA $4007
STA sound_sq2_old ; save the value we just wrote to $4007
.triangle:
LDA soft_apu_ports+8
STA $4008
LDA soft_apu_ports+10 ; $4009 is unused, so we skip it
STA $400A
LDA soft_apu_ports+11
STA $400B
.noise:
LDA soft_apu_ports+12
STA $400C
LDA soft_apu_ports+14 ; $400D is unused, so we skip it
STA $400E
LDA soft_apu_ports+15
STA $400F;$81E9
RTS
; se_set_temp_ports populates port buffers (soft_apu_ports) with stream data
se_set_temp_ports:
LDA stream_channel, x ; load the channel number of the stream and use it find the soft_apu_ports index for that channel
ASL A
ASL A
TAY
JSR se_set_stream_volume
LDA #$08 ; *disable sweep
STA soft_apu_ports+1, y ; sweep
LDA stream_note_LO, x
STA soft_apu_ports+2, y ; period LO
LDA stream_note_HI, x
STA soft_apu_ports+3, y ; period HI
RTS
; se_set_stream_volume modifies a stream's volume data using its volume envelope
se_set_stream_volume:
STY sound_temp1 ; save our index into soft_apu_ports (we are about to destroy Y)
LDA stream_volenv, x ; which volume envelope?
ASL A ; multiply by 2 because we are indexing into a table of addresses (words)
TAY
LDA volume_envelopes, y ; get the low byte of the address from the pointer table
STA sound_ptr ; put it into our pointer variable
LDA volume_envelopes+1, y ; get the high byte of the address
STA sound_ptr+1
.read_ve:
LDY stream_volenv_index, x ; our current position within the volume envelope.
LDA [sound_ptr], y ; grab the value.
CMP #$FF
BNE .set_vol ; if not FF, set the volume
DEC stream_volenv_index, x ; else if FF, go back one and read again
JMP .read_ve ; ($FF essentially tells us to repeat the last volume value for the remainder of the note)
.set_vol:
STA sound_temp2 ; save our new volume value (about to destroy A)
CPX #TRIANGLE ; triangle needs to be handled specially (a $00 in envelope should clear bits 0-6, not just 0-3)
BNE .squares ; if not triangle channel, go ahead
LDA sound_temp2
BNE .squares ; else if volume not zero, go ahead (treat same as squares)
LDA #$80
BMI .store_vol ; else silence the channel with #$80
.squares:
LDA stream_duty, x ; get current vol/duty settings
AND #$F0 ; zero out the old volume (preserving duty setting)
ORA sound_temp2 ; OR our new volume in
.store_vol:
JSR se_pause_filter ; if a pause state is active, lower volume before writing
LDY sound_temp1 ; get our index into soft_apu_ports
STA soft_apu_ports, y ; store the volume in our temp port
INC stream_volenv_index, x ; set our volume envelop index to the next position
.rest_check
; Check the rest flag. If set, overwrite the volume data we just loaded into buffer with a silence value.
LDA stream_status, x
AND #%00000010 ; check rest flag
BEQ .done ; if clear, no rest, so quit
LDA stream_channel, x
CMP #TRIANGLE ; if triangle, silence with #$80
BEQ .rest_tri
LDA #$30 ; else, silence with #$30
BNE .rest_store ; (this will always branch, but BNE is cheaper than a JMP)
.rest_tri:
LDA #$80
.rest_store:
STA soft_apu_ports, y
.done
RTS
; When a pause state is active, se_pause_filter decreases the incoming volume before a write to soft_apu_ports.
se_pause_filter:
PHA ; save incoming volume to stack
AND #$0F ; clear all duty and counter data from A, leaving only last 4 volume bits
STA pause_temp ; store volume-only data
LDA pause_flag ; check pause flag
BEQ .nopause ; if flag is not set, just return incoming volume
CPX #SFX_1 ; check which stream we're on. we only want to lower music streams.
BCS .nopause ; if X >= SFX_1, just return incoming volume
; SQ_1 usually functions as the bass. Lower this only a little.
LDA stream_channel, x
CMP #SQUARE_1
BNE .sq1_done ; not SQ_1
LDA pause_temp ; load volume-only data
TAY ; copy volume to Y for lookup
SEC
SBC VolumeScaling_SQ1, y ; subtract scaling in lookup table from A
STA pause_temp ; store the new volume
PLA ; retrieve original incoming volume
AND #$F0 ; clear volume bits
ORA pause_temp ; and replace with new volume
JMP .done ; return scaled volume in A
.sq1_done:
; SQ_2 usually functions as treble. Lower this a lot.
LDA stream_channel, x
CMP #SQUARE_2
BNE .sq2_done ; not SQ_2
LDA pause_temp ; load volume-only data
TAY ; copy volume to Y for lookup
SEC
SBC VolumeScaling_SQ2, y ; subtract scaling in lookup table from A
STA pause_temp ; store the new volume
PLA ; retrieve original incoming volume
AND #$F0 ; clear volume bits
ORA pause_temp ; and replace with new volume
JMP .done ; return scaled volume in A
.sq2_done:
; TRI cannot be lowered, so mute it.
LDA stream_channel, x
CMP #TRIANGLE
BNE .tri_done ; not TRI
PLA ; retrieve incoming volume just to get it off the stack
LDA #$80 ; overwrite volume with $80 to mute triangle
JMP .done ; return
.tri_done:
; NOI functions as percussion. Lower this only a little.
LDA stream_channel, x
CMP #NOISE
BNE .noi_done ; not NOI
LDA pause_temp ; load volume-only data
TAY ; copy volume to Y for lookup
SEC
SBC VolumeScaling_NOI, y ; subtract scaling in lookup table from A
STA pause_temp ; store the new volume
PLA ; retrieve original incoming volume
AND #$F0 ; clear volume bits
ORA pause_temp ; and replace with new volume
JMP .done ; return scaled volume in A
.noi_done:
.nopause
PLA ; retrieve original volume from stack and end
.done:
RTS
; Volume scaling lookup tables. If incoming volume is A ($00-$0F), volume will be decreased by byte with index A.
;; $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0A, $0B, $0C, $0D, $0E, $0F ; input
VolumeScaling_SQ1:
.db $00, $00, $00, $01, $02, $03, $04, $04, $05, $06, $06, $07, $07, $07, $08, $08 ; subtraction
VolumeScaling_SQ2:
.db $00, $01, $01, $02, $02, $03, $04, $05, $06, $07, $08, $08, $09, $09, $0A, $0A ; subtraction
VolumeScaling_NOI:
.db $00, $00, $00, $01, $01, $02, $02, $03, $03, $04, $05, $06, $06, $07, $07, $08 ; subtraction
;; Opcode handlers
se_op_endsound:
; Ends all reading of the stream.
; Argument byte(s): N/A
; Usage:
; .db n_4, C4, D4, E4, F4
; .db endsound
LDA stream_status, x ; we've reached end of stream, so disable it and silence
AND #%11111110
STA stream_status, x ; clear enable flag in status byte
LDA stream_channel, x
CMP #TRIANGLE
BEQ .silence_tri ; triangle is silenced differently from squares and noise
LDA #$30 ; squares and noise silenced with $30
BNE .silence
.silence_tri:
LDA #$80 ; triangle silenced with $80
.silence:
STA stream_duty, x ; store silence value in the stream's volume variable.
RTS
se_op_change_ve:
; Changes the volume envelope used by subsequent notes.
; Argument byte(s): [1] Volume envelope number/alias
; Usage:
; .db n_4, C4, D4, E4, F4
; .db change_ve
; .db ve_stac1
; .db n_4, C4, D4, E4, F4
LDA [sound_ptr], y ; read the argument
STA stream_volenv, x ; store it in our volume envelope variable
LDA #$00
STA stream_volenv_index, x ; reset volume envelope index to the beginning
RTS
se_op_change_duty:
; Changes the duty cycle used by subsequent notes.
; Argument byte(s): [1] New duty cycle byte
; Usage:
; .db n_4, C4, D4, E4, F4
; .db change_duty
; .db $B7
; .db n_4, C4, D4, E4, F4
LDA [sound_ptr], y ; read the argument (which duty cycle to change to)
STA stream_duty, x ; store it.
RTS
se_op_change_tempo:
; Changes the tempo used by subsequent notes.
; Argument byte(s): [1] New tempo
; Usage:
; .db n_4, C4, D4, E4, F4
; .db change_tempo
; .db $80
; .db n_4, C4, D4, E4, F4
LDA [sound_ptr], y ; read the argument
STA stream_tempo, x ; store it in our tempo variable
RTS
se_op_inf_loop:
; Loops to a label to repeat a segment of notes (indefinitely).
; Argument byte(s): [1] Loop address (LO byte), [2] Loop address (HI byte)
; Usage:
; .db n_4, C4, D4, E4, F4
; .loop_point
; .db n_4, C5, D5, E5, F5
; .db inf_loopto
; .dw .loop_point
LDA [sound_ptr], y ; read LO byte of the address argument from the data stream
STA stream_ptr_LO, x ; save as our new data stream position
INY
LDA [sound_ptr], y ; read HI byte of the address argument from the data stream
STA stream_ptr_HI, x ; save as our new data stream position data stream position
STA sound_ptr+1 ; update the pointer to reflect the new position.
LDA stream_ptr_LO, x
STA sound_ptr
LDY #$FF ; After opcodes return, we do an INY. Since we reset the stream buffer position, we will want y to start out at $00 again.
RTS
se_op_loop1_set_counter:
; Sets the counter for how many times we should loop. Must be done before label used as finite looping address.
; Argument byte(s): [1] Number of times to loop
; Usage:
; .db n_4, C4, D4, E4, F4
; .db loopfor, $08
; .loop_point
; .db n_4, C5, D5, E5, F5
; ... (see below)
LDA [sound_ptr], y ; read the argument (# times to loop)
STA stream_loop1_counter, x ; store it in the loop counter variable
RTS
se_op_loop1_set_address:
; Sets the address where we will loop to. Loop counter must be set before the label of this address.
; Argument byte(s): [1] Loop address (LO byte), [2] Loop address (HI byte)
; Usage:
; .db n_4, C4, D4, E4, F4
; .db loopfor, $08
; .loop_point
; .db n_4, C5, D5, E5, F5
; .db loopto
; .dw .loop_point
DEC stream_loop1_counter, x ; decrement the counter
LDA stream_loop1_counter, x ; check the counter
BEQ .last_iteration ; if zero, we are done looping
JMP se_op_inf_loop ; if not zero, run a loop
.last_iteration:
INY ; skip the first byte of the address argument. the second byte will be skipped automatically upon return.
RTS
se_op_loop2_set_counter:
; Sets the counter for how many times we should loop. Must be done before label used as finite looping address.
; Argument byte(s): [1] Number of times to loop
; Usage: (Same as se_op_loop1_set_counter)
LDA [sound_ptr], y ; read the argument (# times to loop)
STA stream_loop2_counter, x ; store it in the loop counter variable
RTS
se_op_loop2_set_address:
; Sets the address where we will loop to. Loop counter must be set before the label of this address.
; Argument byte(s): [1] Loop address (LO byte), [2] Loop address (HI byte)
; Usage: (Same as se_op_loop1_set_address)
DEC stream_loop2_counter, x ; decrement the counter
LDA stream_loop2_counter, x ; check the counter
BEQ .last_iteration ; if zero, we are done looping
JMP se_op_inf_loop ; if not zero, run a loop
.last_iteration:
INY ; skip the first byte of the address argument. the second byte will be skipped automatically upon return.
RTS
;;; Tables and Includes ;;;
;; Note period lookup table
.include "se_note_table.i"
;; Constants for percussion noise samples
.include "se_percussion.i"
;; Volume envelopes (aliases and pointers at top)
.include "se_envelopes.i"
.include "se_envelopes_falling.i" ; extra custom envelopes
;; Pointers and song data
; Song pointer table (each entry is a pointer to a song header)
song_headers:
.dw silence_header ; Music: silence
.dw themeTitle_header ; Music: Day mode theme
.dw themeDay_header ; Music: Day mode theme
.dw themeSunset_header ; Music: Sunset mode theme
.dw themeNight_header ; Music: Night mode theme
.dw sfxCoin_header ; SFX: Coin pickup
.dw sfxLife_header ; SFX: Extra life pickup
.dw sfxObst_header ; SFX: Obstacle collision
.dw sfxPause_header ; SFX: Pause
.dw sfxUnpause_header ; SFX: Unpause
.dw sfxGameover_header ; SFX: Game over
;.dw drumtest_header
;.dw noisetest_header
;.dw envtest_header
; Song files
.include "s_silence.i"
.include "s_themeTitle.i"
.include "s_themeDay.i"
.include "s_themeSunset.i"
.include "s_themeNight.i"
.include "s_sfxCoin.i"
.include "s_sfxLife.i"
.include "s_sfxObst.i"
.include "s_sfxPause.i"
.include "s_sfxUnpause.i"
.include "s_sfxGameover.i"
;.include "s_drumtest.i"
;.include "s_noisetest.i"
;.include "s_envtest.i"
; Song aliases
sng_Silence = $00
sng_Title = $01
sng_DayMode = $02
sng_SunsetMode = $03
sng_NightMode = $04
sfx_Coin = $05
sfx_Life = $06
sfx_Obst = $07
sfx_Pause = $08
sfx_Unpause = $09
sfx_Gameover = $0A
| 33.102064 | 139 | 0.674069 |
2d5ea19551251e08ed2ce390468a2401bbc1acba | 2,287 | asm | Assembly | Transynther/x86/_processed/US/_zr_/i9-9900K_12_0xa0_notsx.log_3_1125.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/US/_zr_/i9-9900K_12_0xa0_notsx.log_3_1125.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/US/_zr_/i9-9900K_12_0xa0_notsx.log_3_1125.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r12
push %r13
push %r8
push %rbp
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_normal_ht+0x1bd89, %r12
nop
nop
nop
cmp %rdx, %rdx
mov $0x6162636465666768, %r8
movq %r8, %xmm7
movups %xmm7, (%r12)
nop
nop
nop
dec %r12
lea addresses_WT_ht+0x3189, %r13
sub %rdi, %rdi
mov (%r13), %rbp
nop
nop
inc %rbp
lea addresses_A_ht+0x1bbf1, %rsi
lea addresses_WT_ht+0xb971, %rdi
clflush (%rsi)
nop
nop
nop
nop
nop
cmp $32036, %rbp
mov $121, %rcx
rep movsq
nop
nop
nop
sub $50235, %r8
lea addresses_UC_ht+0x7a69, %r12
clflush (%r12)
nop
cmp $30372, %r8
and $0xffffffffffffffc0, %r12
vmovntdqa (%r12), %ymm6
vextracti128 $1, %ymm6, %xmm6
vpextrq $1, %xmm6, %r13
nop
xor $39908, %rcx
lea addresses_WC_ht+0x12969, %rsi
lea addresses_normal_ht+0xec89, %rdi
nop
nop
nop
nop
and $46264, %r12
mov $5, %rcx
rep movsq
nop
nop
nop
and %rcx, %rcx
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbp
pop %r8
pop %r13
pop %r12
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r8
push %rbp
push %rcx
push %rdi
// Faulty Load
lea addresses_US+0x5a89, %rbp
nop
nop
cmp %r8, %r8
movups (%rbp), %xmm3
vpextrq $0, %xmm3, %rdi
lea oracles, %r8
and $0xff, %rdi
shlq $12, %rdi
mov (%r8,%rdi,1), %rdi
pop %rdi
pop %rcx
pop %rbp
pop %r8
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'src': {'type': 'addresses_US', 'AVXalign': False, 'size': 2, 'NT': False, 'same': False, 'congruent': 0}, 'OP': 'LOAD'}
[Faulty Load]
{'src': {'type': 'addresses_US', 'AVXalign': False, 'size': 16, 'NT': False, 'same': True, 'congruent': 0}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'OP': 'STOR', 'dst': {'type': 'addresses_normal_ht', 'AVXalign': False, 'size': 16, 'NT': False, 'same': False, 'congruent': 8}}
{'src': {'type': 'addresses_WT_ht', 'AVXalign': False, 'size': 8, 'NT': False, 'same': False, 'congruent': 7}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_A_ht', 'congruent': 1, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_WT_ht', 'congruent': 2, 'same': False}}
{'src': {'type': 'addresses_UC_ht', 'AVXalign': False, 'size': 32, 'NT': True, 'same': False, 'congruent': 5}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_WC_ht', 'congruent': 5, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_normal_ht', 'congruent': 9, 'same': False}}
{'00': 3}
00 00 00
*/
| 19.381356 | 152 | 0.657193 |
eb48068cc38f4ad714e6c6f9fa14377d135b1b0c | 794 | asm | Assembly | examples/multisegment.asm | Textmode/TMVM | 3689fb6eec76c44748051d52edae26f96d68091f | [
"Zlib"
] | null | null | null | examples/multisegment.asm | Textmode/TMVM | 3689fb6eec76c44748051d52edae26f96d68091f | [
"Zlib"
] | 1 | 2019-05-11T07:12:05.000Z | 2019-05-11T07:12:05.000Z | examples/multisegment.asm | Textmode/TMVM | 3689fb6eec76c44748051d52edae26f96d68091f | [
"Zlib"
] | null | null | null | ;; A test/example of long-moving data, and jumppads
;; Licence: CC0
LET helloseg, 1
LBL init, initseg
MOV data, A
MOV A, ACC
LBL initloop, null
MOV helloseg, B
LMOV SEG, A, B, A
MOV dataend, B
MOV ACC, A
LTE A, B, RET
INC ACC
JNZ RET, initloop
;; okay, lets do this
MOV helloseg, A
MOV 0, B
LJMP A, B
LBL return, retseg
; print ' again'
MOV 1, A ; Stream device port.
MOV $20, B ; space
OUT A, B
MOV 'a', B
OUT A, B
MOV 'g', B
OUT A, B
MOV 'a', B
OUT A, B
MOV 'i', B
OUT A, B
MOV 'n', B
OUT A, B
; CR, LF :3
MOV $d, B
OUT A, B
MOV $a, B
OUT A, B
HLT
; data
LBL data, null
; print 'hello'
MOV 1, A ; Stream device port.
MOV 'h', B
OUT A, B
MOV 'e', B
OUT A, B
MOV 'l', B
OUT A, B
OUT A, B
MOV 'o', B
OUT A, B
MOV retseg, A
MOV return, B
LJMP A, B
HLT
LBL dataend, null
| 11.850746 | 51 | 0.609572 |
8357edec4a6724cd201160c21d9effedc616af8b | 528 | asm | Assembly | programs/oeis/174/A174939.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/174/A174939.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/174/A174939.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A174939: a(n) = Sum_{k<=n} A007955(k) * A007955(k) = Sum_{k<=n} (A007955(k))^2, where A007955(m) = product of divisors of m.
; 1,5,14,78,103,1399,1448,5544,6273,16273,16394,3002378,3002547,3040963,3091588,4140164,4140453,38152677,38153038,102153038,102347519,102581775,102582304,110177896480,110177912105,110178369081
mov $2,$0
mov $4,$0
add $4,1
lpb $4,1
mov $0,$2
sub $4,1
sub $0,$4
mov $3,$0
add $3,1
cal $0,5 ; d(n) (also called tau(n) or sigma_0(n)), the number of divisors of n.
pow $3,$0
add $1,$3
lpe
| 31.058824 | 192 | 0.672348 |
fde6242bd56fb901f8b76bc1938dd1ddc33b707c | 6,450 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0xca_notsx.log_21829_1707.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0xca_notsx.log_21829_1707.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0xca_notsx.log_21829_1707.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r11
push %r8
push %r9
push %rbp
push %rcx
push %rdi
push %rsi
lea addresses_D_ht+0x4ce4, %rsi
nop
nop
nop
nop
xor %rbp, %rbp
movw $0x6162, (%rsi)
nop
nop
nop
xor %r10, %r10
lea addresses_normal_ht+0x169e4, %rsi
lea addresses_A_ht+0x12764, %rdi
nop
nop
nop
inc %r8
mov $48, %rcx
rep movsq
nop
nop
sub %rcx, %rcx
lea addresses_D_ht+0x103e4, %r8
nop
cmp $8007, %r10
movb $0x61, (%r8)
nop
nop
nop
nop
nop
and %rdi, %rdi
lea addresses_WT_ht+0x163b4, %r11
and $25032, %r10
movl $0x61626364, (%r11)
nop
nop
nop
nop
dec %rsi
lea addresses_D_ht+0x1bc4, %rbp
nop
nop
nop
inc %r10
mov (%rbp), %r11d
nop
nop
nop
xor $40658, %rsi
lea addresses_WC_ht+0x14c98, %rsi
lea addresses_A_ht+0x9ba4, %rdi
nop
nop
nop
dec %r9
mov $116, %rcx
rep movsl
cmp %rdi, %rdi
lea addresses_normal_ht+0xbdd0, %rsi
nop
nop
cmp %r11, %r11
mov (%rsi), %r9
nop
nop
nop
xor $62470, %rcx
pop %rsi
pop %rdi
pop %rcx
pop %rbp
pop %r9
pop %r8
pop %r11
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r13
push %r14
push %rcx
push %rdi
push %rdx
push %rsi
// REPMOV
lea addresses_normal+0x19304, %rsi
lea addresses_normal+0xbe4, %rdi
nop
nop
sub %r14, %r14
mov $106, %rcx
rep movsw
nop
nop
nop
sub $7864, %rsi
// Store
lea addresses_WC+0x3fe4, %rsi
nop
nop
xor $61930, %r14
mov $0x5152535455565758, %r13
movq %r13, %xmm7
vmovups %ymm7, (%rsi)
cmp %rsi, %rsi
// Store
lea addresses_A+0x10e44, %rdi
cmp $11217, %rdx
movl $0x51525354, (%rdi)
nop
nop
nop
add %r13, %r13
// Faulty Load
lea addresses_normal+0xbe4, %r14
nop
nop
nop
add %r13, %r13
vmovups (%r14), %ymm7
vextracti128 $0, %ymm7, %xmm7
vpextrq $1, %xmm7, %rcx
lea oracles, %rsi
and $0xff, %rcx
shlq $12, %rcx
mov (%rsi,%rcx,1), %rcx
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %r14
pop %r13
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'src': {'same': False, 'congruent': 0, 'NT': False, 'type': 'addresses_normal', 'size': 4, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_normal', 'congruent': 4, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_normal', 'congruent': 0, 'same': True}}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 10, 'NT': False, 'type': 'addresses_WC', 'size': 32, 'AVXalign': False}}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 2, 'NT': False, 'type': 'addresses_A', 'size': 4, 'AVXalign': False}}
[Faulty Load]
{'src': {'same': True, 'congruent': 0, 'NT': False, 'type': 'addresses_normal', 'size': 32, 'AVXalign': False}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 8, 'NT': False, 'type': 'addresses_D_ht', 'size': 2, 'AVXalign': False}}
{'src': {'type': 'addresses_normal_ht', 'congruent': 9, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_A_ht', 'congruent': 5, 'same': False}}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 8, 'NT': False, 'type': 'addresses_D_ht', 'size': 1, 'AVXalign': False}}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 4, 'NT': False, 'type': 'addresses_WT_ht', 'size': 4, 'AVXalign': True}}
{'src': {'same': True, 'congruent': 5, 'NT': False, 'type': 'addresses_D_ht', 'size': 4, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_WC_ht', 'congruent': 2, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_A_ht', 'congruent': 1, 'same': False}}
{'src': {'same': False, 'congruent': 2, 'NT': False, 'type': 'addresses_normal_ht', 'size': 8, 'AVXalign': True}, 'OP': 'LOAD'}
{'34': 21829}
34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34
*/
| 37.283237 | 2,999 | 0.657674 |
10a98cbb51232bb722be2409371929ba9dced7b6 | 4,367 | asm | Assembly | src/arch/x86_64/arch_start.asm | justinc1/IncludeOS | 2ce07b04e7a35c8d96e773f041db32a4593ca3d0 | [
"Apache-2.0"
] | null | null | null | src/arch/x86_64/arch_start.asm | justinc1/IncludeOS | 2ce07b04e7a35c8d96e773f041db32a4593ca3d0 | [
"Apache-2.0"
] | null | null | null | src/arch/x86_64/arch_start.asm | justinc1/IncludeOS | 2ce07b04e7a35c8d96e773f041db32a4593ca3d0 | [
"Apache-2.0"
] | null | null | null | ; This file is a part of the IncludeOS unikernel - www.includeos.org
;
; Copyright 2015 Oslo and Akershus University College of Applied Sciences
; and Alfred Bratterud
;
; Licensed under the Apache License, Version 2.0 (the "License");
; you may not use this file except in compliance with the License.
; You may obtain a copy of the License at
;
; http://www.apache.org/licenses/LICENSE-2.0
;
; Unless required by applicable law or agreed to in writing, software
; distributed under the License is distributed on an "AS IS" BASIS,
; WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
; See the License for the specific language governing permissions and
; limitations under the License.
global __arch_start:function
global __gdt64_base_pointer
extern kernel_start
extern __multiboot_magic
extern __multiboot_addr
%define P4_TAB 0x1000
%define P3_TAB 0x2000
%define P2_TAB 0x3000 ;; - 0x7fff
%define NUM_P3_ENTRIES 5
%define NUM_P2_ENTRIES 2560
%define STACK_LOCATION 0x9D3F0
[BITS 32]
__arch_start:
;; disable old paging
mov eax, cr0
and eax, 0x7fffffff ;; clear PG (bit 31)
mov cr0, eax
;; address for Page Map Level 4
mov edi, P4_TAB
mov cr3, edi
;; clear out P4 and P3
mov ecx, 0x2000 / 0x4
xor eax, eax ; Nullify the A-register.
rep stosd
;; create page map entry
mov edi, P4_TAB
mov DWORD [edi], P3_TAB | 0x3 ;; present+write
;; create 1GB mappings
mov ecx, NUM_P3_ENTRIES
mov edi, P3_TAB
mov eax, P2_TAB | 0x3 ;; present + write
mov ebx, 0x0
.p3_loop:
mov DWORD [edi], eax ;; Low word
mov DWORD [edi+4], ebx ;; High word
add eax, 1 << 12 ;; page increments
adc ebx, 0 ;; increment high word when CF set
add edi, 8
loop .p3_loop
;; create 2MB mappings
mov ecx, NUM_P2_ENTRIES
mov edi, P2_TAB
mov eax, 0x0 | 0x3 | 1 << 7 ;; present + write + huge
mov ebx, 0x0
.p2_loop:
mov DWORD [edi], eax ;; Low word
mov DWORD [edi+4], ebx ;; High word
add eax, 1 << 21 ;; 2MB increments
adc ebx, 0 ;; increment high word when CF set
add edi, 8
loop .p2_loop
;; enable PAE
mov eax, cr4
or eax, 1 << 5
mov cr4, eax
;; enable long mode
mov ecx, 0xC0000080 ; EFER MSR
rdmsr
or eax, 1 << 8 ; Long Mode bit
wrmsr
;; enable paging
mov eax, cr0 ; Set the A-register to control register 0.
or eax, 1 << 31
mov cr0, eax ; Set control register 0 to the A-register.
;; load 64-bit GDT
lgdt [__gdt64_base_pointer]
jmp GDT64.Code:long_mode
[BITS 64]
long_mode:
cli
;; segment regs
mov cx, GDT64.Data
mov ds, cx
mov es, cx
mov fs, cx
mov gs, cx
mov ss, cx
;; set up new stack for 64-bit
push rsp
mov rsp, STACK_LOCATION
mov rbp, rsp
;; setup temporary smp table
mov rax, sentinel_table
mov rdx, 0
mov rcx, 0xC0000100 ;; FS BASE
wrmsr
;; geronimo!
mov edi, DWORD[__multiboot_magic]
mov esi, DWORD[__multiboot_addr]
call kernel_start
pop rsp
ret
sentinel_table:
dq sentinel_table ;; 0x0
dq 0 ;; 0x8
dq 0 ;; 0x10
dq 0 ;; 0x18
dq 0 ;; 0x20
dq 0x123456789ABCDEF
SECTION .data
GDT64:
.Null: equ $ - GDT64 ; The null descriptor.
dq 0
.Code: equ $ - GDT64 ; The code descriptor.
dw 0 ; Limit (low).
dw 0 ; Base (low).
db 0 ; Base (middle)
db 10011010b ; Access (exec/read).
db 00100000b ; Granularity.
db 0 ; Base (high).
.Data: equ $ - GDT64 ; The data descriptor.
dw 0 ; Limit (low).
dw 0 ; Base (low).
db 0 ; Base (middle)
db 10010010b ; Access (read/write).
db 00000000b ; Granularity.
db 0 ; Base (high).
.Task: equ $ - GDT64 ; TSS descriptor.
dq 0
dq 0
dw 0x0 ;; alignment padding
__gdt64_base_pointer:
dw $ - GDT64 - 1 ; Limit.
dq GDT64 ; Base.
| 26.95679 | 76 | 0.57133 |
63021e75cf9ab2d8027ab8e66a68c2fd37d08558 | 1,109 | asm | Assembly | lib/core/stack/_int.asm | locodarwin/xc-basic3 | 74d73fb4049980fc0c7b648b4893ce3a53056af3 | [
"MIT"
] | 11 | 2021-08-05T18:13:21.000Z | 2022-03-26T21:44:50.000Z | lib/core/stack/_int.asm | locodarwin/xc-basic3 | 74d73fb4049980fc0c7b648b4893ce3a53056af3 | [
"MIT"
] | 119 | 2021-08-09T06:28:44.000Z | 2022-03-31T07:12:11.000Z | lib/core/stack/_int.asm | locodarwin/xc-basic3 | 74d73fb4049980fc0c7b648b4893ce3a53056af3 | [
"MIT"
] | 3 | 2022-01-22T05:25:09.000Z | 2022-03-26T17:11:55.000Z | ; Push immediate int onto stack
MAC pint ; @push
pword {1}
ENDM
; Push one int variable onto stack
MAC pintvar ; @push
pwordvar {1}
ENDM
; Pull int on stack to variable
MAC plintvar ; @pull
plwordvar {1}
ENDM
; Push int of an array onto stack
; (indexed by a word)
MAC pintarray ; @pull
pwordarray {1}
ENDM
; Push int of an array onto stack
; (indexed by a byte)
MAC pintarrayfast ; @pull @push
pwordarrayfast {1}
ENDM
; Pull int off of stack and store in array
; (indexed by a word)
MAC plintarray ; @pull
plwordarray {1}
ENDM
; Pull int off of stack and store in array
; (indexed by a byte)
MAC plintarrayfast ; @pull
plwordarrayfast {1}
ENDM
; Pull dynamic int on stack to variable
MAC pldynintvar ; @pull
pldynwordvar {1}
ENDM
; Push one dynamic word variable onto stack
MAC pdynintvar ; @push
pdynwordvar {1}
ENDM
; Push relative int variable (e.g this.something)
MAC prelativeintvar
prelativewordvar {1}
ENDM
; Pull int value and store in relative int variable
; (e.g this.something)
MAC plrelativeintvar
plrelativewordvar {1}
ENDM | 18.79661 | 52 | 0.702435 |
5ccecb171d039d86fa9cfc78abdd8be153449a07 | 274 | asm | Assembly | programs/oeis/198/A198845.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/198/A198845.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/198/A198845.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A198845: 8*6^n-1.
; 7,47,287,1727,10367,62207,373247,2239487,13436927,80621567,483729407,2902376447,17414258687,104485552127,626913312767,3761479876607,22568879259647,135413275557887,812479653347327,4874877920083967,29249267520503807
mov $1,6
pow $1,$0
mul $1,8
sub $1,1
| 34.25 | 215 | 0.817518 |
433ab072a4cc8eb2e9564cf57f085e9066ed3974 | 97 | asm | Assembly | libsrc/_DEVELOPMENT/math/float/math32/lm32/c/sdcc/___fsmul_callee.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | null | null | null | libsrc/_DEVELOPMENT/math/float/math32/lm32/c/sdcc/___fsmul_callee.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | null | null | null | libsrc/_DEVELOPMENT/math/float/math32/lm32/c/sdcc/___fsmul_callee.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | null | null | null |
SECTION code_fp_math32
PUBLIC ___fsmul
EXTERN cm32_sdcc_fsmul
defc ___fsmul = cm32_sdcc_fsmul
| 12.125 | 31 | 0.85567 |
df3e5938b08fe084d23a02cc197fa8bb9b2e870a | 7,488 | asm | Assembly | Transynther/x86/_processed/US/_zr_/i7-7700_9_0xca.log_21829_1136.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/US/_zr_/i7-7700_9_0xca.log_21829_1136.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/US/_zr_/i7-7700_9_0xca.log_21829_1136.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r11
push %r8
push %rax
push %rbp
push %rcx
push %rdi
push %rsi
lea addresses_UC_ht+0x13a7b, %rsi
lea addresses_WC_ht+0x6e7b, %rdi
clflush (%rsi)
sub $3145, %r8
mov $103, %rcx
rep movsw
nop
nop
nop
nop
nop
add %rbp, %rbp
lea addresses_WC_ht+0x1a8bb, %rsi
lea addresses_A_ht+0x1bb0b, %rdi
nop
nop
nop
nop
nop
sub %r8, %r8
mov $33, %rcx
rep movsb
nop
nop
nop
nop
add %rcx, %rcx
lea addresses_WC_ht+0x9897, %r10
nop
nop
add $11939, %rax
movups (%r10), %xmm7
vpextrq $1, %xmm7, %r8
nop
xor $56804, %rdi
lea addresses_A_ht+0x1a6fb, %rsi
lea addresses_UC_ht+0xe56b, %rdi
clflush (%rdi)
nop
nop
nop
nop
sub %r11, %r11
mov $87, %rcx
rep movsq
nop
nop
nop
nop
nop
sub %rcx, %rcx
lea addresses_WC_ht+0x38bb, %r11
nop
nop
nop
nop
sub $18713, %rdi
mov $0x6162636465666768, %rbp
movq %rbp, (%r11)
nop
nop
nop
nop
xor $15916, %rcx
lea addresses_WT_ht+0x191b, %r10
nop
nop
nop
nop
nop
xor $17608, %rcx
movb (%r10), %r11b
and %rcx, %rcx
lea addresses_WT_ht+0x10c7b, %rsi
lea addresses_normal_ht+0x1b8bb, %rdi
nop
nop
nop
nop
dec %r8
mov $96, %rcx
rep movsb
nop
nop
cmp %rsi, %rsi
lea addresses_WT_ht+0x1bc7b, %rdi
nop
nop
add %rbp, %rbp
mov $0x6162636465666768, %rsi
movq %rsi, (%rdi)
nop
nop
nop
nop
nop
add %r8, %r8
lea addresses_D_ht+0x15343, %r11
nop
nop
nop
nop
sub $38457, %r8
movb $0x61, (%r11)
nop
nop
nop
add %rax, %rax
lea addresses_WT_ht+0x14ceb, %rsi
lea addresses_D_ht+0x1c61b, %rdi
clflush (%rdi)
nop
nop
nop
nop
nop
xor %rbp, %rbp
mov $45, %rcx
rep movsq
nop
nop
nop
nop
add %rsi, %rsi
lea addresses_A_ht+0x1b43b, %r10
nop
nop
nop
and %rdi, %rdi
vmovups (%r10), %ymm1
vextracti128 $1, %ymm1, %xmm1
vpextrq $0, %xmm1, %rsi
nop
dec %rdi
lea addresses_A_ht+0x1b83b, %rsi
lea addresses_D_ht+0x3abb, %rdi
nop
nop
nop
nop
nop
add $21517, %rbp
mov $65, %rcx
rep movsw
nop
nop
nop
nop
xor $50742, %rbp
lea addresses_UC_ht+0x2feb, %rsi
lea addresses_WT_ht+0x1550b, %rdi
and $65315, %r11
mov $87, %rcx
rep movsl
add %rdi, %rdi
pop %rsi
pop %rdi
pop %rcx
pop %rbp
pop %rax
pop %r8
pop %r11
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r13
push %r9
push %rbp
push %rdi
push %rsi
// Faulty Load
lea addresses_US+0x1747b, %rbp
nop
nop
nop
cmp %r11, %r11
mov (%rbp), %si
lea oracles, %rbp
and $0xff, %rsi
shlq $12, %rsi
mov (%rbp,%rsi,1), %rsi
pop %rsi
pop %rdi
pop %rbp
pop %r9
pop %r13
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'src': {'congruent': 0, 'AVXalign': False, 'same': False, 'size': 32, 'NT': True, 'type': 'addresses_US'}, 'OP': 'LOAD'}
[Faulty Load]
{'src': {'congruent': 0, 'AVXalign': False, 'same': True, 'size': 2, 'NT': False, 'type': 'addresses_US'}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'congruent': 8, 'same': False, 'type': 'addresses_UC_ht'}, 'OP': 'REPM', 'dst': {'congruent': 9, 'same': False, 'type': 'addresses_WC_ht'}}
{'src': {'congruent': 5, 'same': False, 'type': 'addresses_WC_ht'}, 'OP': 'REPM', 'dst': {'congruent': 4, 'same': False, 'type': 'addresses_A_ht'}}
{'src': {'congruent': 2, 'AVXalign': False, 'same': False, 'size': 16, 'NT': False, 'type': 'addresses_WC_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 7, 'same': False, 'type': 'addresses_A_ht'}, 'OP': 'REPM', 'dst': {'congruent': 3, 'same': False, 'type': 'addresses_UC_ht'}}
{'OP': 'STOR', 'dst': {'congruent': 5, 'AVXalign': False, 'same': False, 'size': 8, 'NT': False, 'type': 'addresses_WC_ht'}}
{'src': {'congruent': 4, 'AVXalign': False, 'same': False, 'size': 1, 'NT': False, 'type': 'addresses_WT_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 10, 'same': False, 'type': 'addresses_WT_ht'}, 'OP': 'REPM', 'dst': {'congruent': 6, 'same': False, 'type': 'addresses_normal_ht'}}
{'OP': 'STOR', 'dst': {'congruent': 10, 'AVXalign': False, 'same': False, 'size': 8, 'NT': False, 'type': 'addresses_WT_ht'}}
{'OP': 'STOR', 'dst': {'congruent': 2, 'AVXalign': False, 'same': False, 'size': 1, 'NT': False, 'type': 'addresses_D_ht'}}
{'src': {'congruent': 4, 'same': False, 'type': 'addresses_WT_ht'}, 'OP': 'REPM', 'dst': {'congruent': 1, 'same': False, 'type': 'addresses_D_ht'}}
{'src': {'congruent': 5, 'AVXalign': False, 'same': False, 'size': 32, 'NT': False, 'type': 'addresses_A_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 6, 'same': False, 'type': 'addresses_A_ht'}, 'OP': 'REPM', 'dst': {'congruent': 6, 'same': True, 'type': 'addresses_D_ht'}}
{'src': {'congruent': 4, 'same': False, 'type': 'addresses_UC_ht'}, 'OP': 'REPM', 'dst': {'congruent': 3, 'same': False, 'type': 'addresses_WT_ht'}}
{'00': 21829}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
| 32.986784 | 2,999 | 0.660123 |
f6112ae29afea33fd40b948fe1daffd792ef1485 | 16,184 | asm | Assembly | boot_logo/source/altbios_boot_logo.asm | hra1129/Alternate_BIOS | 4d2f94bd83d63953b3e3f6b5ff5b9baba7beff30 | [
"MIT"
] | 4 | 2021-12-19T02:12:29.000Z | 2021-12-25T05:58:34.000Z | boot_logo/source/altbios_boot_logo.asm | uniabis/Alternate_BIOS | 396440f3481ffe4cbcd9218ff94af4d9bdfbae1f | [
"MIT"
] | 2 | 2021-12-20T13:24:51.000Z | 2021-12-20T20:38:50.000Z | boot_logo/source/altbios_boot_logo.asm | uniabis/Alternate_BIOS | 396440f3481ffe4cbcd9218ff94af4d9bdfbae1f | [
"MIT"
] | 1 | 2021-12-20T09:08:00.000Z | 2021-12-20T09:08:00.000Z | ; -----------------------------------------------------------------------------
; Altenate BIOS Boot Logo Program
;
; MIT License
;
; Copyright (c) 2021 HRA!
;
; Permission is hereby granted, free of charge, to any person obtaining a copy
; of this software and associated documentation files (the "Software"), to deal
; in the Software without restriction, including without limitation the rights
; to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
; copies of the Software, and to permit persons to whom the Software is
; furnished to do so, subject to the following conditions:
;
; The above copyright notice and this permission notice shall be included in all
; copies or substantial portions of the Software.
;
; THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
; IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
; FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
; AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
; LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
; OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
; SOFTWARE.
;
; -----------------------------------------------------------------------------
org 0x7900
vdp_port0 := 0x98
vdp_port1 := 0x99
vdp_port2 := 0x9A
vdp_port3 := 0x9B
rtc_address := 0xB4
rtc_data := 0xB5
work_area := 0xF975 ; PLAY文のワークエリア 384byte
; -----------------------------------------------------------------------------
; Initialize VDP
; -----------------------------------------------------------------------------
scope init_vdp
init_vdp::
di
call write_vdp_regs
vdp_init_data::
db 0x80 | 1, 0x23 ; R#1 = モードレジスタ SCREEN6, 画面非表示
db 0x80 | 0, 0x08 ; R#0 = モードレジスタ SCREEN6
db 0x80 | 8, 0x28 ; R#8 = モードレジスタ palette0は不透明
db 0x80 | 9, 0x00 ; R#9 : モードレジスタ
db 0x80 | 2, 0x1F | (1 << 5) ; R#2 : パターンネームテーブル (表示ページ 1)
db 0x80 | 5, 0x7780 >> 7 ; R#5 : スプライトアトリビュートテーブルの下位
db 0x80 | 11, 0x00 ; R#11 : スプライトアトリビュートテーブルの上位
db 0x80 | 6, 0x7800 >> 11 ; R#6 : スプライトパターンジェネレータテーブルのアドレス
db 0x80 | 7, 0x55 ; R#7 : 背景色
db 0x80 | 15, 2 ; R#15 : ステータスレジスタ 2
db 0x80 | 16, 0 ; R#16 : パレットレジスタ 0
db 0x80 | 25, 3 ; R#25 : モードレジスタ
db 0x80 | 26, 0x20 ; R#26 : 水平スクロールレジスタ
db 0x80 | 27, 0x01 ; R#27 : 水平スクロールレジスタ
db 0x80 | 36, 0 ; R#36 : DX = 0
db 0x80 | 37, 0 ; R#37 :
db 0x80 | 38, 0 ; R#38 : DY = 0
db 0x80 | 39, 0 ; R#39 :
db 0x80 | 40, 0 ; R#40 : NX = 512
db 0x80 | 41, 2 ; R#41 :
db 0x80 | 42, 0 ; R#42 : NY = 512
db 0x80 | 43, 2 ; R#43 :
db 0x80 | 44, 0x55 ; R#44 : CLR = 0x55
db 0x80 | 45, 0 ; R#45 : ARG = 0
db 0x80 | 46, 0b11000000 ; R#46 : CMR = HMMV
db 0x00
wait_vdp_command:
in a, [vdp_port1]
rrca
jr c, wait_vdp_command
endscope
; -----------------------------------------------------------------------------
; Initialize VDP palette
; -----------------------------------------------------------------------------
scope init_palette
init_palette::
ld a, 13 ; read ModeRegister(R#13) of RTC
out [rtc_address], a
in a, [rtc_data]
and a, 0x0C
or a, 0x02 ; [X][X][1][0]
out [rtc_data], a ; Set BLOCK2
ld a, 0x0B
out [rtc_address], a ; Logo Screen設定
in a, [rtc_data]
and a, 0x03
add a, a
add a, a
ld h, 0xFF & (color_data1 >> 8)
add a, 0xFF & color_data1
ld l, a
ld bc, (4 << 8) | vdp_port2
otir
ld l, 0xFF & color_data2
ld b, 4
otir
endscope
; -----------------------------------------------------------------------------
; Initialize VRAM
; -----------------------------------------------------------------------------
scope init_vram
push hl
ld hl, 0x7400 ; sprite color table
ld bc, 16 * 32 ; 16[line/sprite] * 32[sprite]
ld e, 0x05 ; palette#1, palette#1
call fill_vram
ld h, 0x7800 >> 8 ; sprite generator table
ld bc, 0x30 + 256 ; pattern#0 and pattern#1 (half)
ld e, 0xFF
call fill_vram
ld l, 0x7830 & 0xFF ; sprite generator table
ld bc, 0x10 + 256 ; pattern#1 (half)
ld e, 0xF0
call fill_vram
ld hl, 0x7600 ; sprite attribute table
call set_write_vram_address
pop hl
;ld hl, sprite_attrib
ld bc, (sprite_attrib_size << 8) | vdp_port0
;otir
endscope
; -----------------------------------------------------------------------------
; decompress logo image
; -----------------------------------------------------------------------------
scope decompress_logo_image
decompress_logo_image::
call otir_and_write_vdp_regs
db 0x80 | 25, 3 ; MSK = 1, SP2 = 1
db 0x80 | 2, 0x3F ; set page 1
_run_lmcm_command: ; dummy execution
db 0x80 | 46, 0xA0
_run_lmmc_command:
db 0x80 | 17, 36 ; R#17 = 36
db 0x00
;ld hl, logo_draw_command
ld bc, (logo_draw_command_size << 8) | vdp_port3
;otir
call otir_and_write_vdp_regs
db 0x80 | 17, 0x80 | 44 ; R#17 = 0x80 | 44 (非オートインクリメント)
db 0x00
; RLEを展開する
; HL ... 圧縮データのアドレス
; A .... 着目位置の圧縮データの値
; C .... VDP port#3
; E .... 現在の色: 0=黒, 3=白
;ld hl, logo_data
;ld c, vdp_port3
; _decompress_loop ループ開始時点で A = 0 (return value of write_vdp_regs)
_decompress_loop:
ld e, a
ld a, [hl]
inc hl
;or a, a
rra
jr c, _fixed_data ; [N][C3][C2][C1][1]タイプなら fixed_data へ。
; [L5]...[L0][G][0]の場合
; Cy' .... 灰色が付く場合 1, 付かない場合 0
rra
ld d, a
ex af, af' ; GRAY情報を保存
ld a, d
or a, a
jr nz, _skip_non_zero
ld a, 63
_skip_non_zero:
ld b, a ; 63, 1, 2, ... , 63
_run_length_loop:
call wait_tansfer_ready
out [c], e ; output current color
djnz _run_length_loop
ld a, d
or a, a
jr nz, _gray_process ; RUNが0でなかった場合は、ループ終了。
ld d, [hl] ; 次のRUNを取得。
inc hl
ld b, d
inc b
djnz _run_length_loop
dec b
jr _run_length_loop
_gray_process:
ex af, af'
jr nc, _next_color ; 灰色が付かない場合は何もせずに戻る
call wait_tansfer_ready
ld a, 2 ; 灰色
out [c], a
_next_color:
ld a, e
xor a, 3 ; 次の色は反転
jr _decompress_loop
; [N][C3][C2][C1][1]の場合
_fixed_data:
ld b, 3
ld d, a
_fixed_data_loop:
ld a, d
and a, 3
ld e, a
srl d
srl d
call wait_tansfer_ready
out [c], e ; R#44 = C1
djnz _fixed_data_loop
ld a, d
add a, d
add a, d ; A = 0 または 3
jr _decompress_loop
endscope
scope wait_tansfer_ready
loop:
and a, 0x40
ret nz
wait_tansfer_ready::
in a, [vdp_port1]
rrca
jr c, loop
_lmmc_end:
pop de ; dump return address
endscope
; -----------------------------------------------------------------------------
; アニメーション処理
; -----------------------------------------------------------------------------
scope animation_process
animation_process::
call _fill_work_area
dw 0x00FF, 0x0120
_wait_vsync1:
in a, [vdp_port1]
and a, 0x40
jr z, _wait_vsync1
_wait_vsync2:
in a, [vdp_port1]
and a, 0x40
jr nz, _wait_vsync2
call write_vdp_regs
db 0x80 | 15, 0 ; R#15 = 0 (S#0)
db 0x80 | 1, 0x63 ; R#1 = 63h : 画面表示ON
db 0x00
ld bc, (21 << 8) | vdp_port3
_main_loop:
push bc
; -----------------------------------------------------------------------------
; 水平スクロールレジスタを更新する
; -----------------------------------------------------------------------------
set_scroll:
ld b, 80
ld hl, work_area + 2
_line_loop:
ld d, [hl] ; R#26の値
inc hl
ld e, [hl] ; R#27の値
inc hl
inc hl
inc hl
ld a, 26
out [vdp_port1], a
ld a, 0x80 | 17
out [vdp_port1], a ; R#17 = 26
in a, [vdp_port1]
_wait_clash_sprite:
in a, [vdp_port1] ; S#0
and a, 0x20
jp z, _wait_clash_sprite
out [c], d ; R#26
out [c], e ; R#27
djnz _line_loop
ld a, 26
out [vdp_port1], a
ld a, 0x80 | 17
out [vdp_port1], a ; R#17 = 26
out [c], b ; R#26 = 0
out [c], b ; R#27 = 0
_update_scroll_position:
ld ix, work_area
ld iy, animation_data
ld d, b ; D = B = 0
ld b, 40
_update_scroll_loop:
; 値が減っていくライン
ld l, [ix + 0]
ld h, [ix + 1]
ld e, [iy + 0]
;or a, a ; Cy = 0
sbc hl, de
jr nc, _not_borrow1
ld l, d
ld h, d
_not_borrow1:
call calc_reg_value
; 値が増えていくライン
ld l, [ix + 0]
ld h, [ix + 1]
ld e, [iy + 0]
add hl, de
ld a, h
cp a, 2
jr c, _not_carry1
ld hl, 512
_not_carry1:
call calc_reg_value
djnz _update_scroll_loop
pop bc
djnz _main_loop
call write_vdp_regs
db 0x80 | 25, 0 ; R#25 = 0
db 0x80 | 2, 0x1F ; R#2 = 1Fh : 表示ページ0
db 0x00
call _fill_work_area
dw 0, 0
ei
ret
_fill_work_area:
pop hl
ld de, work_area
push de
ld bc, 4
ldir
ex [sp], hl
ld bc, (80 - 1) * 4
ldir
ret
endscope
; -----------------------------------------------------------------------------
; 水平スクロールレジスタに設定する値に変換する
; -----------------------------------------------------------------------------
scope calc_reg_value
calc_reg_value::
ld [ix + 0], l
ld [ix + 1], h
; R#26 の値
dec hl ; HL = [???????][S8][S7][S6][S5][S4][S3][S2][S1][S0]
ld a, l ; A = [S7][S6][S5][S4][S3][S2][S1][S0]
rrc h ; Cy = [S8]
rra ; A = [S8][S7][S6][S5][S4][S3][S2][S1]
rra ; A = [? ][S8][S7][S6][S5][S4][S3][S2]
rra ; A = [? ][? ][S8][S7][S6][S5][S4][S3]
inc a
and a, 0x3F ; A = [0 ][0 ][S8][S7][S6][S5][S4][S3]
ld [ix + 2], a
; R#27 の値
ld a, 7
sub a, l ; A = 7 - [?????][S2][S1][S0]
and a, 0x07
ld [ix + 3], a
inc ix
inc ix
inc ix
inc ix
inc iy
ret
endscope
; -----------------------------------------------------------------------------
; VDPのコントロールレジスタへ値を書き込む
;
; input:
; 呼び出し元の次のコード領域に書き込むデータ列を配置する
; break:
; A,E,F
; comment:
; 割り込み禁止で呼ぶこと。
; -----------------------------------------------------------------------------
scope write_vdp_regs
otir_and_write_vdp_regs::
otir
write_vdp_regs::
ex [sp], hl
jr start1
loop1:
ld e, a
ld a, [hl]
inc hl
out [vdp_port1], a
ld a, e
out [vdp_port1], a
start1:
ld a, [hl]
inc hl
or a, a
jr nz, loop1
ex [sp], hl
ret
endscope
; -----------------------------------------------------------------------------
; fill vram
;
; input:
; HL .... 書き込みアドレス Address[15:0] ※Address[16] は 0 に設定される
; BC .... 書き込むバイト数補正後(バイト数が256の倍数ではない場合256を加算)
; E ..... 書き込む値
; output:
; none
; break:
; A,B,C,F,A',F'
; comment:
; 割り込み禁止で呼ぶこと。
; -----------------------------------------------------------------------------
scope fill_vram
fill_vram::
; ld e, a
call set_write_vram_address
; ld a, c
; or a, a
ld a, e
; jr z, skip
; inc b
;skip:
loop:
out [vdp_port0], a
dec c
jr nz, loop
djnz loop
ret
endscope
; -----------------------------------------------------------------------------
; set write vram address
;
; input:
; HL .... 書き込みアドレス Address[15:0] ※Address[16] は 0 に設定される
; output:
; none
; break:
; A,F,A',F'
; comment:
; 割り込み禁止で呼ぶこと。
; -----------------------------------------------------------------------------
scope set_write_vram_address
set_write_vram_address::
ld a, h
and a, 0x3F
or a, 0x40
ex af, af'
ld a, h
rlca
rlca
and a, 0x03
out [vdp_port1], a
ld a, 0x80 | 14
out [vdp_port1], a
ld a, l
out [vdp_port1], a
ex af, af'
out [vdp_port1], a
ret
endscope
; -----------------------------------------------------------------------------
; アニメーションデータ
; -----------------------------------------------------------------------------
animation_data::
db 0x13, 0x0D
db 0x15, 0x12
db 0x14, 0x0E
db 0x10, 0x17
db 0x13, 0x11
db 0x15, 0x11
db 0x0E, 0x0D
db 0x11, 0x15
db 0x0C, 0x11
db 0x13, 0x11
db 0x15, 0x15
db 0x12, 0x0C
db 0x0F, 0x10
db 0x0E, 0x0E
db 0x15, 0x0D
db 0x0F, 0x11
db 0x11, 0x11
db 0x17, 0x14
db 0x0D, 0x0D
db 0x0C, 0x0C
db 0x0D, 0x10
db 0x15, 0x12
db 0x17, 0x10
db 0x0E, 0x17
db 0x11, 0x0C
db 0x12, 0x13
db 0x17, 0x0E
db 0x16, 0x14
db 0x14, 0x0E
db 0x14, 0x15
db 0x0E, 0x0E
db 0x13, 0x0F
db 0x11, 0x13
db 0x13, 0x0F
db 0x17, 0x15
db 0x0D, 0x15
db 0x0F, 0x17
db 0x0C, 0x0D
db 0x16, 0x0C
db 0x11, 0x0E
; -----------------------------------------------------------------------------
; 色設定データ
; [palette#0 RB], [palette#0 G], [palette#1 RB], [palette#1 G]
; -----------------------------------------------------------------------------
color_data1::
db 0x00, 0x00, 0x07, 0x00 ; Logo Screen 設定が 0 の場合の色
db 0x27, 0x02, 0x20, 0x04 ; Logo Screen 設定が 1 の場合の色
db 0x56, 0x00, 0x72, 0x02 ; Logo Screen 設定が 2 の場合の色
db 0x70, 0x00, 0x70, 0x05 ; Logo Screen 設定が 3 の場合の色
color_data2::
db 0x44, 0x04 ; palette#2 : gray
db 0x77, 0x07 ; palette#3 : white
; -----------------------------------------------------------------------------
; スプライトアトリビュートテーブル初期化データ
; -----------------------------------------------------------------------------
sprite_attrib::
db 0x01F, 0x0E8, 0x000, 0x000 ; Sprite#0 ( 232, 31 ), Pattern 0, Color 0
db 0x01F, 0x0E8, 0x000, 0x000 ; Sprite#1 ( 232, 31 ), Pattern 0, Color 0
db 0x03F, 0x0E8, 0x000, 0x000 ; Sprite#2 ( 232, 63 ), Pattern 0, Color 0
db 0x03F, 0x0E8, 0x000, 0x000 ; Sprite#3 ( 232, 63 ), Pattern 0, Color 0
db 0x04F, 0x0E8, 0x000, 0x000 ; Sprite#4 ( 232, 79 ), Pattern 0, Color 0
db 0x04F, 0x0E8, 0x000, 0x000 ; Sprite#5 ( 232, 79 ), Pattern 0, Color 0
db 0x01F, 0x000, 0x004, 0x000 ; Sprite#6 ( 0, 31 ), Pattern 4, Color 0
db 0x03F, 0x000, 0x004, 0x000 ; Sprite#7 ( 0, 63 ), Pattern 4, Color 0
db 0x04F, 0x000, 0x004, 0x000 ; Sprite#8 ( 0, 79 ), Pattern 4, Color 0
db 0x0D8, 0x000, 0x000, 0x000 ; Sprite#9 ( 0, 216 ), Pattern 0, Color 0 ※ Y = 216 で、これ以降のスプライトを表示禁止
sprite_attrib_end::
sprite_attrib_size := sprite_attrib_end - sprite_attrib
; -----------------------------------------------------------------------------
; ロゴデータ描画用 LMMCコマンド
; -----------------------------------------------------------------------------
logo_draw_command::
dw 45 ; R#36, 37: DX
dw 32 ; R#38, 39: DY
dw 422 ; R#40, 41: NX
dw 80 ; R#42, 43: NY
db 0 ; R#44: CLR
db 0 ; R#45: ARG
db 0b1011_0000 ; R#46: CMD LMMC command
logo_draw_command_end:
logo_draw_command_size := logo_draw_command_end - logo_draw_command
; -----------------------------------------------------------------------------
; ロゴデータ
; -----------------------------------------------------------------------------
logo_data::
binary_link "logo.bin"
end_of_program::
if (color_data1 & 0xFF) + 16 > 0xFF
error "COLOR DATA BOUNDARY EXCEEDED"
endif
if end_of_program > 0x8000
error "LOGO DATA IS TOO BIG!! (Over " + (end_of_program - 0x8000) + "Bytes)"
else
message "FILE SIZE IS OK! (Remain " + (0x8000 - end_of_program) + "Bytes)"
space 0x8000 - end_of_program, 0xFF
endif
| 26.230146 | 107 | 0.464718 |
367ada3ca86b370abfdc65dae9732ae38d1a1f76 | 395 | asm | Assembly | programs/oeis/045/A045930.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/045/A045930.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | programs/oeis/045/A045930.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | ; A045930: The generalized Connell sequence C_{3,5}.
; 1,2,5,8,11,14,17,18,21,24,27,30,33,36,39,42,45,48,49,52,55,58,61,64,67,70,73,76,79,82,85,88,91,94,95,98,101,104,107,110,113,116,119,122,125,128,131,134,137,140,143,146,149,152,155,156,159,162,165,168,171,174,177,180
mov $1,2
mov $2,$0
add $2,$0
add $2,2
add $1,$2
add $1,$0
lpb $0
add $3,5
sub $0,$3
trn $0,1
sub $1,2
lpe
sub $1,3
| 23.235294 | 217 | 0.643038 |
d4f6c745009a50fe69c71d144c1ea05cb69e152b | 121 | asm | Assembly | libsrc/_DEVELOPMENT/inttypes/z80/asm_imaxabs.asm | meesokim/z88dk | 5763c7778f19a71d936b3200374059d267066bb2 | [
"ClArtistic"
] | null | null | null | libsrc/_DEVELOPMENT/inttypes/z80/asm_imaxabs.asm | meesokim/z88dk | 5763c7778f19a71d936b3200374059d267066bb2 | [
"ClArtistic"
] | null | null | null | libsrc/_DEVELOPMENT/inttypes/z80/asm_imaxabs.asm | meesokim/z88dk | 5763c7778f19a71d936b3200374059d267066bb2 | [
"ClArtistic"
] | null | null | null |
; intmax_t imaxabs(intmax_t j)
SECTION code_inttypes
PUBLIC asm_imaxabs
EXTERN asm_labs
defc asm_imaxabs = asm_labs
| 11 | 30 | 0.809917 |
4c55b937216af23d83e1fc3f187cdf5997369516 | 1,254 | asm | Assembly | CInd.asm | ItaiCuker/Assembly8086CrossyRoad | 414e0403edebe376f1151b965daafb9f27c48f7e | [
"MIT"
] | null | null | null | CInd.asm | ItaiCuker/Assembly8086CrossyRoad | 414e0403edebe376f1151b965daafb9f27c48f7e | [
"MIT"
] | null | null | null | CInd.asm | ItaiCuker/Assembly8086CrossyRoad | 414e0403edebe376f1151b965daafb9f27c48f7e | [
"MIT"
] | null | null | null |
;'''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
proc indUpdate
dopush ax,bx,dx
mov ax,[row]
mov bx,28 ;row length. (14*2 because array is word)
mul bx ;multiplying row number by row length (row count starts at 0)
add ax,[cell] ;adding cell value
mov di,ax
add di, offset worldArr
dopop dx,bx,ax
ret
endp indUpdate
;'''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
proc rowDec
dec [row]
call indUpdate
ret
endp rowDec
;'''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
proc rowNext
add [row],1
mov [cell],0
call indUpdate
ret
endp rowNext
;'''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
proc rowSkip
add [row], 1
call indUpdate
ret
endp rowSkip
;'''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
proc indReset
mov [cell],0
mov [row],0
call indUpdate
ret
endp indReset
;'''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
proc incCell
add [cell],2
call indUpdate
ret
endp incCell
;'''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
proc decCell
sub [cell],2
call indUpdate
ret
endp decCell
;'''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
| 22.8 | 72 | 0.388357 |
027e05520a50fdde0afe030cfbb5dcfff31024d8 | 529 | asm | Assembly | libsrc/_DEVELOPMENT/stdlib/z80/__lldiv_store.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 640 | 2017-01-14T23:33:45.000Z | 2022-03-30T11:28:42.000Z | libsrc/_DEVELOPMENT/stdlib/z80/__lldiv_store.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 1,600 | 2017-01-15T16:12:02.000Z | 2022-03-31T12:11:12.000Z | libsrc/_DEVELOPMENT/stdlib/z80/__lldiv_store.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 215 | 2017-01-17T10:43:03.000Z | 2022-03-23T17:25:02.000Z |
SECTION code_clib
SECTION code_stdlib
PUBLIC __lldiv_store
EXTERN l_store_64_dehldehl_mbc
__lldiv_store:
; dehl'dehl = remainder
; stack.numer = quotient
ld c,(ix-2)
ld b,(ix-1) ; bc = & lldivu_t->rem
call l_store_64_dehldehl_mbc ; store remainder
; bc = & lldivu_t->quot
push ix
pop hl ; hl = & quotient
ld e,c
ld d,b ; de = & lldivut_t->quot
ld bc,8
ldir ; store quotient
ret
| 17.064516 | 55 | 0.52741 |
f669aebcbdaffa4c4a376e76b1fe72d2f7aac651 | 6,208 | asm | Assembly | Transynther/x86/_processed/AVXALIGN/_st_/i9-9900K_12_0xa0_notsx.log_21829_1613.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/AVXALIGN/_st_/i9-9900K_12_0xa0_notsx.log_21829_1613.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/AVXALIGN/_st_/i9-9900K_12_0xa0_notsx.log_21829_1613.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r13
push %rax
push %rbx
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_WT_ht+0x1176b, %r13
nop
mfence
movb $0x61, (%r13)
nop
xor %rax, %rax
lea addresses_A_ht+0x32cb, %rsi
lea addresses_normal_ht+0x154cb, %rdi
nop
nop
nop
add $46409, %rdx
mov $113, %rcx
rep movsw
nop
nop
nop
nop
add %rax, %rax
lea addresses_WC_ht+0x195db, %rcx
nop
nop
and $50451, %rdx
mov $0x6162636465666768, %r13
movq %r13, %xmm4
and $0xffffffffffffffc0, %rcx
vmovaps %ymm4, (%rcx)
nop
nop
nop
nop
nop
add %r13, %r13
lea addresses_normal_ht+0x183d3, %rax
sub $57323, %rsi
movb $0x61, (%rax)
nop
sub $61036, %r13
lea addresses_A_ht+0x1e43, %rbx
clflush (%rbx)
xor %rcx, %rcx
movw $0x6162, (%rbx)
nop
nop
nop
nop
nop
xor $14225, %rsi
lea addresses_WC_ht+0x3903, %rdi
nop
add $12034, %rbx
mov $0x6162636465666768, %r13
movq %r13, %xmm6
and $0xffffffffffffffc0, %rdi
vmovaps %ymm6, (%rdi)
nop
nop
nop
and $61301, %rax
lea addresses_WC_ht+0xd1cb, %rbx
nop
nop
nop
nop
nop
and %r13, %r13
mov $0x6162636465666768, %rsi
movq %rsi, (%rbx)
nop
nop
nop
and %rdx, %rdx
lea addresses_D_ht+0x7ccb, %rsi
lea addresses_WC_ht+0x84cb, %rdi
nop
nop
cmp %r11, %r11
mov $30, %rcx
rep movsb
nop
nop
nop
nop
nop
cmp $33675, %r13
lea addresses_A_ht+0x194cb, %rdi
inc %rax
mov (%rdi), %edx
nop
nop
nop
nop
nop
lfence
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbx
pop %rax
pop %r13
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r13
push %r14
push %r15
push %r8
push %rbx
// Faulty Load
lea addresses_D+0x9ccb, %rbx
nop
nop
nop
nop
sub %r14, %r14
mov (%rbx), %r13w
lea oracles, %r8
and $0xff, %r13
shlq $12, %r13
mov (%r8,%r13,1), %r13
pop %rbx
pop %r8
pop %r15
pop %r14
pop %r13
ret
/*
<gen_faulty_load>
[REF]
{'src': {'type': 'addresses_D', 'AVXalign': False, 'size': 1, 'NT': False, 'same': False, 'congruent': 0}, 'OP': 'LOAD'}
[Faulty Load]
{'src': {'type': 'addresses_D', 'AVXalign': True, 'size': 2, 'NT': False, 'same': True, 'congruent': 0}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'OP': 'STOR', 'dst': {'type': 'addresses_WT_ht', 'AVXalign': False, 'size': 1, 'NT': True, 'same': False, 'congruent': 5}}
{'src': {'type': 'addresses_A_ht', 'congruent': 9, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_normal_ht', 'congruent': 10, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WC_ht', 'AVXalign': True, 'size': 32, 'NT': False, 'same': True, 'congruent': 3}}
{'OP': 'STOR', 'dst': {'type': 'addresses_normal_ht', 'AVXalign': False, 'size': 1, 'NT': False, 'same': False, 'congruent': 2}}
{'OP': 'STOR', 'dst': {'type': 'addresses_A_ht', 'AVXalign': False, 'size': 2, 'NT': False, 'same': False, 'congruent': 2}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WC_ht', 'AVXalign': True, 'size': 32, 'NT': False, 'same': False, 'congruent': 1}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WC_ht', 'AVXalign': False, 'size': 8, 'NT': False, 'same': False, 'congruent': 4}}
{'src': {'type': 'addresses_D_ht', 'congruent': 11, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_WC_ht', 'congruent': 9, 'same': False}}
{'src': {'type': 'addresses_A_ht', 'AVXalign': False, 'size': 4, 'NT': True, 'same': False, 'congruent': 11}, 'OP': 'LOAD'}
{'36': 21829}
36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36
*/
| 38.559006 | 2,999 | 0.660921 |
444e3d98fda0a3535456b478f57e85711f3ec5f5 | 246 | asm | Assembly | libsrc/strings/memmove.asm | andydansby/z88dk-mk2 | 51c15f1387293809c496f5eaf7b196f8a0e9b66b | [
"ClArtistic"
] | 1 | 2020-09-15T08:35:49.000Z | 2020-09-15T08:35:49.000Z | libsrc/strings/memmove.asm | dex4er/deb-z88dk | 9ee4f23444fa6f6043462332a1bff7ae20a8504b | [
"ClArtistic"
] | null | null | null | libsrc/strings/memmove.asm | dex4er/deb-z88dk | 9ee4f23444fa6f6043462332a1bff7ae20a8504b | [
"ClArtistic"
] | null | null | null | ; CALLER linkage for function pointers
XLIB memmove
LIB memmove_callee
XREF ASMDISP_MEMMOVE_CALLEE
.memmove
pop af
pop bc
pop de
pop hl
push hl
push de
push bc
push af
jp memmove_callee + ASMDISP_MEMMOVE_CALLEE
| 12.3 | 45 | 0.711382 |
d86f9a0fd50ec9bff98b1a5dc62c298aad9b5e98 | 583 | asm | Assembly | oeis/170/A170793.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/170/A170793.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/170/A170793.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A170793: a(n) = n^10*(n + 1)/2.
; 0,1,1536,118098,2621440,29296875,211631616,1129900996,4831838208,17433922005,55000000000,155624547606,402462867456,965009442943,2169409912320,4613203125000,9345848836096,18143945104041,33919438652928,61310662578010,107520000000000,183478690760211,305439112101376,497118134563788,792542262067200,1239776611328125,1905755791320576,2882475849325086,4294853117083648,6310608499503015,9152595000000000,13114052591692816,18577348462903296,26036842749495633,36126610696046080,49653852363281250
mov $1,$0
pow $0,10
mov $2,$1
mul $2,$0
add $0,$2
div $0,2
| 58.3 | 488 | 0.852487 |
77058557a974f25851ef1e504cb9403fb26a2709 | 408 | asm | Assembly | oeis/037/A037685.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/037/A037685.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/037/A037685.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A037685: Base 8 digits are, in order, the first n terms of the periodic sequence with initial period 1,0,3,2.
; Submitted by Christian Krause
; 1,8,67,538,4305,34440,275523,2204186,17633489,141067912,1128543299,9028346394,72226771153,577814169224,4622513353795,36980106830362,295840854642897,2366726837143176
mov $2,1
lpb $0
sub $0,1
add $1,$2
mul $1,8
add $2,3
mod $2,4
lpe
add $1,$2
mov $0,$1
| 27.2 | 166 | 0.745098 |
dc0f1708e87bfd0a0b407c043f484beb7543c31a | 2,120 | asm | Assembly | oc1/1st-assignment/ex3.asm | brenopoggiali/BCC | f1e08fa8a0f9a132f65de7dbca5bf4681f8e10d4 | [
"MIT"
] | 1 | 2020-04-13T03:50:27.000Z | 2020-04-13T03:50:27.000Z | oc1/1st-assignment/ex3.asm | brenopoggiali/BCC | f1e08fa8a0f9a132f65de7dbca5bf4681f8e10d4 | [
"MIT"
] | null | null | null | oc1/1st-assignment/ex3.asm | brenopoggiali/BCC | f1e08fa8a0f9a132f65de7dbca5bf4681f8e10d4 | [
"MIT"
] | 1 | 2019-06-14T04:36:59.000Z | 2019-06-14T04:36:59.000Z | .data
len_arr1: .word 3
array1:
arr1[0]: .word 1
arr1[1]: .word 2
arr1[2]: .word 3
array2:
arr2[0]: .word 3
arr2[1]: .word 1
arr2[2]: .word 2
checked: .word -1
#checked: .asciiz "checked" --> Caso for considerar os numeros negativos
memory_change: .word 4 # "pulo" entre cada endereco de memória
len_arr2: .word 3
.text
lw s0, len_arr1
lw t5, len_arr2
lw t4, memory_change
# Caso os vetores tenham tamanhos diferentes encerramos o programa
bne s0, t5, is_not_permutation
# Contadores de quantos elementos verificamos nos array1 e array2
addi s3, s3, -1
addi s4, s4, -1
j find_arr1_first_index
load_element:
addi s3, s3, 1
beq s3, s0, is_permutation # Todos os elementos foram verificados
mul t1, s3, t4 # Somando 4 ao endereco
add t1, s1, t1 # Endereco do proximo indice
lw t2, 0(t1) # Guardamos o endereco de arr1[i] no registrador t2
j find_element
# .data alocou os elementos do arr1 sequencialmente na memoria
find_arr1_first_index:
la s1 array1 # Endereco do primeiro elemento do array1
j find_arr2_first_index
# Processo para encontrar o endereco do primeiro elemento do array2
find_arr2_first_index:
la s2 array2 # Endereco do primeiro elemento do array2
j load_element
find_element:
addi s4 s4, 1
beq s4, s0, is_not_permutation # Caso nao tenhamos achado par
mul t1, s4, t4 # Somando 4 ao endereco
add t1, s2, t1 # Endereco do proximo indice
lw t3, 0(t1) # Guardamos o endereco de arr2[j] no registrador t3
bne t2, t3, find_element # Nao encontrou par, continua procurando
lw t3, checked # Caso o numero seja igual, marcamos a posicao
sw t3, 0(t1)
addi, s4, zero, -1 # Contador do arr2 = 0
j load_element # Conferimos o proximo elemento do arr1
is_not_permutation:
addi a1, zero, 0
addi a0, zero, 1
j answer
is_permutation:
addi a1, zero, 1
addi a0, zero, 1
answer:
ecall
| 28.266667 | 79 | 0.636792 |
98e39bf4389b3da21af0aad97586d841afd9e29e | 550 | asm | Assembly | oeis/016/A016822.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/016/A016822.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/016/A016822.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A016822: a(n) = (4n+1)^10.
; 1,9765625,3486784401,137858491849,2015993900449,16679880978201,95367431640625,420707233300201,1531578985264449,4808584372417849,13422659310152401,34050628916015625,79792266297612001,174887470365513049,362033331456891249,713342911662882601,1346274334462890625,2446194060654759801,4297625829703557649,7326680472586200649,12157665459056928801,19687440434072265625,31181719929966183601,48398230717929318249,73742412689492826049,110462212541120451001,162889462677744140625,236736367459211723401
mul $0,4
add $0,1
pow $0,10
| 78.571429 | 491 | 0.894545 |
96fbad930bd668bf03e030c500223a5f73122b72 | 679 | asm | Assembly | oeis/166/A166943.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/166/A166943.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/166/A166943.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A166943: One third of product plus sum of six consecutive nonnegative numbers.
; Submitted by Jon Maiga
; 5,247,1689,6731,20173,50415,110897,221779,411861,720743,1201225,1921947,2970269,4455391,6511713,9302435,13023397,17907159,24227321,32303083,42504045,55255247,71042449,90417651,114004853,142506055,176707497,217486139,265816381,322777023,389558465,467470147,557948229,662563511,783029593,921211275,1079133197,1258988719,1463149041,1694172563,1954814485,2248036647,2577017609,2945162971,3356115933,3813768095,4322270497,4886044899,5509795301,6198519703,6957522105,7792424747,8709180589,9714086031
mov $1,$0
add $0,5
bin $0,$1
mul $0,20
add $0,1
mul $0,$1
mul $0,2
add $0,5
| 52.230769 | 495 | 0.832106 |
f032f37026ecf7a703a5e1c3913d7c0aacf68076 | 809 | asm | Assembly | libsrc/_DEVELOPMENT/l/z80/ascii/txt_to_num/small/l_small_atou.asm | meesokim/z88dk | 5763c7778f19a71d936b3200374059d267066bb2 | [
"ClArtistic"
] | null | null | null | libsrc/_DEVELOPMENT/l/z80/ascii/txt_to_num/small/l_small_atou.asm | meesokim/z88dk | 5763c7778f19a71d936b3200374059d267066bb2 | [
"ClArtistic"
] | null | null | null | libsrc/_DEVELOPMENT/l/z80/ascii/txt_to_num/small/l_small_atou.asm | meesokim/z88dk | 5763c7778f19a71d936b3200374059d267066bb2 | [
"ClArtistic"
] | null | null | null |
SECTION code_l
PUBLIC l_small_atou
l_small_atou:
; ascii to unsigned integer conversion
; whitespace is not skipped
; char consumption stops on overflow
;
; enter : de = char *
;
; exit : de = & next char to interpret in buffer
; hl = unsigned result (0 on invalid input)
; carry set on unsigned overflow
;
; uses : af, bc, de, hl
ld hl,0
dec de
push hl
loop:
pop af
inc de
ld a,(de)
sub '0'
ccf
ret nc
cp 10
ret nc
push hl
add hl,hl
jr c, overflow
ld c,l
ld b,h
add hl,hl
jr c, overflow
add hl,hl
jr c, overflow
add hl,bc
jr c, overflow
add a,l
ld l,a
jr nc, loop
inc h
jr nz, loop
overflow:
pop hl
scf
ret
| 11.897059 | 54 | 0.53152 |
23b08f7e0bfb9b8cc5fe44b84a6c72a87c8cfed5 | 3,943 | asm | Assembly | Chip16 Program Pack/Tests/PaletteFlip/PaletteFlip.asm | faouellet/CHIP-16 | f85aed30d849052ac057092b124321953de80db6 | [
"BSD-3-Clause"
] | null | null | null | Chip16 Program Pack/Tests/PaletteFlip/PaletteFlip.asm | faouellet/CHIP-16 | f85aed30d849052ac057092b124321953de80db6 | [
"BSD-3-Clause"
] | null | null | null | Chip16 Program Pack/Tests/PaletteFlip/PaletteFlip.asm | faouellet/CHIP-16 | f85aed30d849052ac057092b124321953de80db6 | [
"BSD-3-Clause"
] | null | null | null | ; Palette flip (PAL OPCode Test) by Refraction
;
; r0 = line counter
; r1 = vertical position
; r2 = horizontal position
; r3 = colour
; r4 = current byte
; r5 = memory base (for sprite)
; r6 = palette number
; r7 = keycheck
; r8 = temporary value
; r9 = memory addr for palette
importbin flipped.bin 0 48 flipped
importbin original.bin 0 48 original
importbin capitals_font.bin 0 832 capitals_font ;Font data (capital letters)
importbin lowcase_font.bin 0 832 lowcase_font ;Font data (lowcase letters)
importbin special_font.bin 0 320 special_font ;Font data (special characters)
start:
jmp original_palette ;initialize the original palette (and set r6 :P)
init:
cls
spr 0x0707 ; 7x14 - 128 bytes
ldi r0, 16
ldi r1, 0
ldi r2, 0
ldi r3, 0
ldi r4, 128
ldi r5, 2048 ;memory base of sprite
jmp fillmemory
:draw_string ;Draw string on screen
spr #0804 ;Set 8x8 pixel sprites
ldm ra, rd ;Load characted from memory
andi ra, #FF ;Only the lo byte is needed
mov rb, ra ;Copy data to scratchpad
subi rb, 255 ;Remove terminator
jz fret ;Terminator reached, break subroutine
mov rb, ra ;Copy data to scratchpad
muli rb, 32 ;Each character is 32 bytes long
addi rb, capitals_font ;Apply offset to font address
drw re, rf, rb ;Draw 8x8 character on the set coordinates
addi rd, 1 ;Increase memory offset
addi re, 9 ;Increase X coordinate
jmp draw_string
:fret ;Subroutine return function
ret ;Return from a subroutine
fillmemory: ;Putting sprite in memory
stm r3, r5 ;store
addi r5, 1 ;add byte offset
subi r4, 1 ;byte written
jnz, fillmemory
andi r4, 0
ori r4, 128 ;reset byte position
addi r3, 17 ;increase colour by 0x11 (0x22 etc)
subi r0, 1 ;decrease line we are on
jnz, fillmemory ;until we have done every line
andi r1, 0 ;reset everything
andi r2, 0
andi r3, 0
andi r5, 0
ori r5, 2048
draw_lines:
drw r2, r1, r5 ;draw lines going from top to bottom
addi r2, 14
cmpi r2, 322 ;14 doesnt go in to 22 so check 322
jbe draw_lines
andi r2, 0
addi r1, 7 ;move the Y coord down to the next line
addi r5, 128 ;reset the byte counter
cmpi r1, 112 ;make sure we havent reached the bottom of the screen
jbe draw_lines
ldi re, 10 ;Load string X coordinate
ldi rf, 200 ;Load string Y coordinate
ldi rd, ascii_padup ;Load string memory location
call draw_string
ldi re, 10 ;Load string X coordinate
ldi rf, 220 ;Load string Y coordinate
ldi rd, ascii_paddown ;Load string memory location
call draw_string
end_loop: ;loop round!
vblnk
ldm r7, 65520 ;load in keypad to r7
tsti r7, 1 ;check for up being pressed
jnz flipped_palette ;it's pressed so load the flipped palette
tsti r7, 2 ;check if down is pressed
jnz original_palette ;it's pressed so load the original palette
jmp end_loop ;loopyloopy!
flipped_palette:
tsti r6, 65535 ;check r6 to see what palette is set
jz end_loop ;already flipped palette so dont do anything
ldi r6, 0 ;otherwise set r6 as flipped palette
pal flipped ;read in the palette
jmp init ;reload the sprites
original_palette:
tsti r6, 65535 ;check r6 to see what palette is set
jnz end_loop ;already original palette so dont do anything
ldi r6, 1 ;otherwise set r6 as original palette
pal original ;read in the palette
jmp init ;reload the sprites
:ascii_padup
db 15 ;P
db 43 ;r
db 30 ;e
db 44 ;s
db 44 ;s
db 52 ;
db 20 ;U
db 15 ;P
db 52 ;
db 45 ;t
db 40 ;o
db 52 ;
db 31 ;f
db 37 ;l
db 34 ;i
db 41 ;p
db 52 ;
db 41 ;p
db 26 ;a
db 37 ;l
db 30 ;e
db 45 ;t
db 45 ;t
db 30 ;e
db 255 ;/0
:ascii_paddown
db 15 ;P
db 43 ;r
db 30 ;e
db 44 ;s
db 44 ;s
db 52 ;
db 03 ;D
db 14 ;O
db 22 ;W
db 13 ;N
db 52 ;
db 31 ;f
db 40 ;o
db 43 ;r
db 52 ;
db 40 ;o
db 43 ;r
db 34 ;i
db 32 ;g
db 34 ;i
db 39 ;n
db 26 ;a
db 37 ;l
db 255 ;/0 | 23.331361 | 79 | 0.681714 |
78ec6d66bf8ecd13171451d37abefdc8a02b50fb | 591 | asm | Assembly | src/firmware-tests/IsrDummy.asm | pete-restall/Cluck2Sesame-Prototype | 99119b6748847a7b6aeadc4bee42cbed726f7fdc | [
"MIT"
] | 1 | 2019-12-12T09:07:08.000Z | 2019-12-12T09:07:08.000Z | src/firmware-tests/IsrDummy.asm | pete-restall/Cluck2Sesame-Prototype | 99119b6748847a7b6aeadc4bee42cbed726f7fdc | [
"MIT"
] | null | null | null | src/firmware-tests/IsrDummy.asm | pete-restall/Cluck2Sesame-Prototype | 99119b6748847a7b6aeadc4bee42cbed726f7fdc | [
"MIT"
] | null | null | null | #include "Mcu.inc"
radix decimal
IsrRam udata_shr
contextSavingW res 1
contextSavingStatus res 1
contextSavingPclath res 1
IsrDummy code 0x0004
saveContext:
movwf contextSavingW
swapf contextSavingW
swapf STATUS, W
movwf contextSavingStatus
movf PCLATH, W
movwf contextSavingPclath
clrf PCLATH
resetAllInterruptFlags:
banksel INTCON
bcf INTCON, T0IF
bcf INTCON, INTF
bcf INTCON, RABIF
banksel PIR1
clrf PIR1
banksel PIR2
clrf PIR2
endOfIsr:
movf contextSavingPclath, W
movwf PCLATH
swapf contextSavingStatus, W
movwf STATUS
swapf contextSavingW, W
retfie
end
| 14.414634 | 29 | 0.800338 |
6027a052581f2764cdb54d6215848ad774be3b1a | 2,097 | asm | Assembly | programs/oeis/177/A177890.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/177/A177890.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | programs/oeis/177/A177890.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | ; A177890: 15-gonal (or pentadecagonal) pyramidal numbers: a(n) = n*(n+1)*(13*n-10)/6.
; 0,1,16,58,140,275,476,756,1128,1605,2200,2926,3796,4823,6020,7400,8976,10761,12768,15010,17500,20251,23276,26588,30200,34125,38376,42966,47908,53215,58900,64976,71456,78353,85680,93450,101676,110371,119548,129220,139400,150101,161336,173118,185460,198375,211876,225976,240688,256025,272000,288626,305916,323883,342540,361900,381976,402781,424328,446630,469700,493551,518196,543648,569920,597025,624976,653786,683468,714035,745500,777876,811176,845413,880600,916750,953876,991991,1031108,1071240,1112400,1154601,1197856,1242178,1287580,1334075,1381676,1430396,1480248,1531245,1583400,1636726,1691236,1746943,1803860,1862000,1921376,1982001,2043888,2107050,2171500,2237251,2304316,2372708,2442440,2513525,2585976,2659806,2735028,2811655,2889700,2969176,3050096,3132473,3216320,3301650,3388476,3476811,3566668,3658060,3751000,3845501,3941576,4039238,4138500,4239375,4341876,4446016,4551808,4659265,4768400,4879226,4991756,5106003,5221980,5339700,5459176,5580421,5703448,5828270,5954900,6083351,6213636,6345768,6479760,6615625,6753376,6893026,7034588,7178075,7323500,7470876,7620216,7771533,7924840,8080150,8237476,8396831,8558228,8721680,8887200,9054801,9224496,9396298,9570220,9746275,9924476,10104836,10287368,10472085,10659000,10848126,11039476,11233063,11428900,11627000,11827376,12030041,12235008,12442290,12651900,12863851,13078156,13294828,13513880,13735325,13959176,14185446,14414148,14645295,14878900,15114976,15353536,15594593,15838160,16084250,16332876,16584051,16837788,17094100,17353000,17614501,17878616,18145358,18414740,18686775,18961476,19238856,19518928,19801705,20087200,20375426,20666396,20960123,21256620,21555900,21857976,22162861,22470568,22781110,23094500,23410751,23729876,24051888,24376800,24704625,25035376,25369066,25705708,26045315,26387900,26733476,27082056,27433653,27788280,28145950,28506676,28870471,29237348,29607320,29980400,30356601,30735936,31118418,31504060,31892875,32284876,32680076,33078488,33480125
mov $2,$0
lpb $2
add $3,$0
add $0,10
add $1,$3
sub $2,1
lpe
| 190.636364 | 1,939 | 0.847878 |
60cc374c35932ad2a2aefcb338048b2aa7caf0e0 | 16,684 | asm | Assembly | Library/ConView/Main/mainNotify.asm | steakknife/pcgeos | 95edd7fad36df400aba9bab1d56e154fc126044a | [
"Apache-2.0"
] | 504 | 2018-11-18T03:35:53.000Z | 2022-03-29T01:02:51.000Z | Library/ConView/Main/mainNotify.asm | steakknife/pcgeos | 95edd7fad36df400aba9bab1d56e154fc126044a | [
"Apache-2.0"
] | 96 | 2018-11-19T21:06:50.000Z | 2022-03-06T10:26:48.000Z | Library/ConView/Main/mainNotify.asm | steakknife/pcgeos | 95edd7fad36df400aba9bab1d56e154fc126044a | [
"Apache-2.0"
] | 73 | 2018-11-19T20:46:53.000Z | 2022-03-29T00:59:26.000Z | COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
Copyright (c) Geoworks 1994 -- All Rights Reserved
PROJECT: Condo viewer
MODULE: main - view and text
FILE: mainNotify.asm
AUTHOR: Jonathan Magasin, May 10, 1994
ROUTINES:
Name Description
---- -----------
REVISION HISTORY:
Name Date Description
---- ---- -----------
JM 5/10/94 Initial revision
DESCRIPTION:
Code that notifies controllers of changes in the
content's state.
$Id: mainNotify.asm,v 1.1 97/04/04 17:49:27 newdeal Exp $
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
idata segment
notificationCount word
idata ends
BookFileCode segment resource
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
ContentSendNullNotification
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Send an empty notification.
CALLED BY: GLOBAL
PASS: *ds:si - instance data (ContentGenView)
dx - notification type
RETURN: none
DESTROYED: ax, bx, cx, dx, di, es, bp
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
gene 11/ 3/92 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
ContentSendNullNotification proc near
EC < call AssertIsCGV >
; clear the book name from the primary
mov ax, MSG_CGV_CHANGE_PRIMARY_MONIKER
clr bp ; no book title feature
call ObjCallInstanceNoLock
mov dx, GWNT_CONTENT_CONTEXT_CHANGE
clr bx ;no data block
call RecordNotificationEvent ;di <- recorded event
mov cx, GAGCNLT_NOTIFY_CONTENT_CONTEXT_CHANGE
call SendNotifToAppGCN
mov dx, GWNT_CONTENT_BOOK_CHANGE
clr bx ;no data block
call RecordNotificationEvent ;di <- recorded event
mov cx, GAGCNLT_NOTIFY_CONTENT_BOOK_CHANGE
call SendNotifToAppGCN
ret
ContentSendNullNotification endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
ContentSendNotification
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Generate and send a help notification
CALLED BY: GLOBAL
PASS: *ds:si - instance data (ContentGenView)
ax - NotifyNavContextChangeFlags
cx - number of new page
RETURN: nothing
DESTROYED: ax, bx, cx, dx, di, es
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
gene 11/ 3/92 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
ContentSendNotification proc near
uses si, bp
.enter
EC < call AssertIsCGV >
;
; Allocate a notification block
;
mov bx, (size NotifyNavContextChange)
call AllocHelpNotification ;^hbx=es:0 <- NCBC structure
;
; Set the fixed stuff
;
mov es:NNCC_flags, ax
mov es:NNCC_page, cx
;
; Get the bookFeatures
;
call MUGetFeaturesAndTools
mov es:NNCC_bookFeatures, cx
;
; Copy the hyperlink file and context name from notify block
;
mov ax, CONTENT_FILENAME ; Get the filename.
mov di, offset NNCC_filename ;es:di <- dest
call ContentGetStringVardata
EC < ERROR_NC -1 >
mov ax, CONTENT_LINK ; Get the context.
mov di, offset NNCC_context ;es:di <- dest
call ContentGetStringVardata
EC < ERROR_NC -1 >
;
; Unlock the notification and send it off
;
mov cx, GAGCNLT_NOTIFY_CONTENT_CONTEXT_CHANGE
mov dx, GWNT_CONTENT_CONTEXT_CHANGE
;
; inc the counter which makes this notification unique
;
push es
NOFXIP< segmov es, <segment idata>, ax ; es = dgroup >
FXIP < mov ax, bx ; save notif block>
FXIP < mov bx, handle dgroup >
FXIP < call MemDerefES ; ds = dgroup >
FXIP < mov bx, ax ; restore notif block>
inc es:notificationCount
mov ax, es:notificationCount
pop es
mov es:NNCC_counter, ax
call UnlockSendHelpNotification
.leave
EC < call AssertIsCGV >
ret
ContentSendNotification endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
ContentSendBookNotification
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Send a notification that the current book has changed.
CALLED BY: GLOBAL
PASS: *ds:si - ConGenView
ss:bp - ContentTextRequest
CTR_flags - set
CTR_bookname - set to book file
RETURN: nothing
DESTROYED: ax,bx,cx,dx,di,es
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
cassie 8/31/94 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
ContentSendBookNotification proc near
class ContentGenViewClass
uses bp
.enter
EC < call AssertIsCGV >
call MUGetFeaturesAndTools ; cx/dx <- features/tools
;
; Change the primary moniker.
;
push cx, dx, bp
mov ax, MSG_CGV_CHANGE_PRIMARY_MONIKER
lea dx, ss:[bp].CTR_bookname
mov bp, cx ; bp <- feature flags
mov cx, ss ; cx:dx <- book name
call ObjCallInstanceNoLock
;
; Allocate a notification block
;
mov bx, (size NotifyContentBookChange)
call AllocHelpNotification ;^hbx=es:0 <- NCBC structure
pop es:NCBC_features, es:NCBC_tools, bp
;
; Set the flags
;
clr ax
test ss:[bp].CTR_flags, mask CTRF_restoreFromState
jz $10
mov ax, mask NCBCF_retnWithState
$10:
mov es:[NCBC_flags], ax
;
; Copy the book name to the notification block
;
mov ax, CONTENT_BOOKNAME ; Get the book name.
mov di, offset NCBC_bookname ;es:di <- dest
call ContentGetStringVardata
jc done
mov {char}es:[di], 0
done:
mov cx, GAGCNLT_NOTIFY_CONTENT_BOOK_CHANGE
mov dx, GWNT_CONTENT_BOOK_CHANGE
call UnlockSendHelpNotification
.leave
ret
ContentSendBookNotification endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
AllocHelpNotification
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Allocate a notification block
CALLED BY: INTERNAL
PASS: bx - size of block to allocate
RETURN: bx - handle of NotifyNavContextChange
es - seg addr of NotifyNavContextChange
DESTROYED: none
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
gene 11/ 5/92 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
AllocHelpNotification proc near
uses ax, cx
.enter
mov ax, bx
mov cx, ALLOC_DYNAMIC_NO_ERR_LOCK or mask HF_SHARABLE \
or (mask HAF_ZERO_INIT shl 8)
call MemAlloc
mov es, ax ;es <- seg addr of block
.leave
ret
AllocHelpNotification endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
UnlockSendHelpNotification
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Send off a help notification to the appropriate GCN lists
CALLED BY: HelpSendHelpNotification()
PASS: bx - handle of notification
cx - GenAppGCNListType
dx - notification type
RETURN: none
DESTROYED: ax, bx, cx, dx, bp, di
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
gene 4/12/93 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
UnlockSendHelpNotification proc near
;
; Unlock the notification block
;
call MemUnlock
;
; Initialize reference count for one (1) send below
;
mov ax, 1 ; ax <- reference count
call MemInitRefCount
;
; Send the notification to the app GCN list
;
mov ax, cx ; save GenAppGCNListType
call RecordNotificationEvent ; di <- recorded event
mov cx, ax ; cx <- GenAppGCNListType
call SendNotifToAppGCN
ret
UnlockSendHelpNotification endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
RecordNotificationEvent
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Record a notification event for later sending
CALLED BY: ContentSendNullNotification, UnlockSendHelpNotification
PASS: bx - notification data handle
dx - notification type
RETURN: di - recorded event
DESTROYED: cx
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
gene 12/29/92 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
RecordNotificationEvent proc near
uses ax, si, bp
.enter
mov bp, bx ;bp <- handle of notification
mov cx, MANUFACTURER_ID_GEOWORKS ;cx <- ManufacturerID
mov ax, MSG_META_NOTIFY_WITH_DATA_BLOCK
mov di, mask MF_RECORD ;di <- MessageFlags
call ObjMessage ;di <- recorded event
.leave
ret
RecordNotificationEvent endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SendNotifToAppGCN
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Send notification block to app GCN via the process
CALLED BY: ContentSendNullNotification, UnlockSendHelpNotification
PASS: bx - handle of notification block
cx - GenAppGCNListType
di - recorded event
RETURN: none
DESTROYED: ax, cx, dx, di
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
eca 12/19/91 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
SendNotifToAppGCN proc near
uses bx, bp, si
.enter
;
; Send the recorded notification event to the application object
;
mov dx, size GCNListMessageParams ;dx <- size of stack frame
sub sp, dx ;create stack frame
mov bp, sp
mov ss:[bp].GCNLMP_ID.GCNLT_manuf, MANUFACTURER_ID_GEOWORKS
mov ss:[bp].GCNLMP_ID.GCNLT_type, cx
mov ss:[bp].GCNLMP_block, bx
mov ss:[bp].GCNLMP_event, di
;
; Set appropriate flags -- always zero so data isn't cached
;
mov ss:[bp].GCNLMP_flags, mask GCNLSF_SET_STATUS
;
; Send to the GCN list via the process -- NOTE: do not change
; this to send via the app obj, as notification may be sent
; from either the app thread or the UI thread.
;
mov ax, MSG_GEN_PROCESS_SEND_TO_APP_GCN_LIST
call GeodeGetProcessHandle
clr si
mov di, mask MF_STACK
call ObjMessage
add sp, dx ;clean up stack
.leave
ret
SendNotifToAppGCN endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
MNGetPrevNextStatusGivenName
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Figures out if the "Prev" and "Next"
triggers should be enabled/disabled
for a given context (specified by string
in es:di).
Returns page of context, too.
CLEARS other NNCCF flags.
CALLED BY:
PASS: *ds:si - ContentGenView instance
es:di - string = context name
RETURN: ax - NotifyNavContextChangedFlags
with NNCCF_prevEnabled and
NNCCF_nextEnabled set
appropriately
cx - page of context
DESTROYED: nothing
SIDE EFFECTS:
PSEUDO CODE/STRATEGY:
REVISION HISTORY:
Name Date Description
---- ---- -----------
JM 6/ 2/94 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
MNGetPrevNextStatusGivenName proc near
uses ds,si,di,dx
.enter
EC < call AssertIsCGV >
;
; If this file was not generated by studio, it will have
; prev/next buttons, but they will be disabled.
;
call MFGetFileFlags ;cx<-file flags
clr ax ;Assume prev/next
;disabled
test cx, mask HFF_CREATED_BY_STUDIO
jz done ;Not created by Studio.
;
; ax is still clr, which is what we want to pass to this
; routine, so that it doesn't lock the search text object's
; name array...
;
call MNLockNameArray ;*ds:si<- name array
push ax
call MLGetContextElementNumber ;ax<-element number
EC < ERROR_NC CONTEXT_NAME_ELEMENT_NOT_FOUND >
call ChunkArrayElementToPtr ;ds:di <- name elt.
EC < ERROR_C ILLEGAL_CONTEXT_ELEMENT_NUMBER >
pop ax
call MNGetPrevNextStatusCommon ;ax<- NNCC_flags
mov cx, ds:[di].PNAE_pageNumber ;cx<-page
call MNUnlockNameArray
done:
.leave
EC < call AssertIsCGV >
call MNCheckPageValid
ret
MNGetPrevNextStatusGivenName endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
MNGetPrevNextStatusCommon
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Common code for getting the status
of the "Prev" and "Next" triggers
for the given context (specified
by a pointer).
ALSO clears the NNCCF_updateHistory
CALLED BY: MNGetPrevNextStatusGivenToken,
MNGetPrevNextStatusGivenName
PASS: ds:di - name array element
of the context
RETURN: ax - NotifyNavContextChangeFlags
updated for prev/next status
DESTROYED: nothing
SIDE EFFECTS:
PSEUDO CODE/STRATEGY:
REVISION HISTORY:
Name Date Description
---- ---- -----------
JM 6/ 2/94 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
MNGetPrevNextStatusCommon proc near
.enter
clr ax ;assume both disabled
cmp ds:[di].PNAE_prevPage, -1
je getNextStatus
or ax, mask NNCCF_prevEnabled
getNextStatus:
cmp ds:[di].PNAE_nextPage, -1
je done
or ax, mask NNCCF_nextEnabled
done:
.leave
ret
MNGetPrevNextStatusCommon endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
MNCheckPageValid
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Clears the passed page number to zero
if it is an invalid number because
the current file doesn't have any
page numbers. Only files created
with Studio will have valid page
numbers.
CALLED BY:
PASS: *ds:si - ContentGenView instance
cx - page number
RETURN: cx - page number, or 0
if passed page number
wasn't legitimate
DESTROYED: nothing
SIDE EFFECTS:
PSEUDO CODE/STRATEGY:
REVISION HISTORY:
Name Date Description
---- ---- -----------
JM 6/16/94 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
MNCheckPageValid proc near
EC < call AssertIsCGV >
push cx
call MFGetFileFlags ;cx<-CFMB_flags
test cx, mask HFF_CREATED_BY_STUDIO
jnz pageOK
pop cx
clr cx
ret
pageOK:
pop cx
ret
MNCheckPageValid endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
CGVChangePrimaryMoniker
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Changes the primary's moniker to be the passed string
Or to the default moniker if BFF_BOOK_TITLE is not set.
CALLED BY: MSG_CGV_CHANGE_PRIMARY_MONIKER
PASS: *ds:si = ContentGenViewClass object
ds:di = ContentGenViewClass instance data
ds:bx = ContentGenViewClass object (same as *ds:si)
es = segment of ContentGenViewClass
ax = message #
cx:dx = fptr to source null-terminated text string
bp = book features (BookFeatureFlags)
RETURN: nothing
DESTROYED: ax, cx, dx
SIDE EFFECTS:
PSEUDO CODE/STRATEGY:
REVISION HISTORY:
Name Date Description
---- ---- -----------
lester 9/ 6/94 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
CGVChangePrimaryMoniker method dynamic ContentGenViewClass,
MSG_CGV_CHANGE_PRIMARY_MONIKER
.enter
;
; Is title a feature?
;
test bp, mask BFF_BOOK_TITLE
jnz usePassedTitle
;
; No, so use default title.
;
mov bx, handle ContentStrings
call MemLock
mov es, ax
mov di, offset defaultTitleString
mov cx, es
mov dx, es:[di] ;cx:dx <- default title
push bx
mov ax, MSG_GEN_REPLACE_VIS_MONIKER_TEXT
call sendUpdateMessage
pop bx
call MemUnlock
jmp done
;
; Title is a feature, so show filename as title.
;
usePassedTitle:
mov ax, MSG_GEN_REPLACE_VIS_MONIKER_TEXT
;cx:dx <- book name
call sendUpdateMessage
done:
.leave
ret
sendUpdateMessage:
push si
mov bp, VUM_NOW
mov bx, segment GenPrimaryClass
mov si, offset GenPrimaryClass
mov di, mask MF_RECORD
call ObjMessage ;di<-handle recorded event
mov cx, di
pop si
mov ax, MSG_GEN_GUP_CALL_OBJECT_OF_CLASS
call ObjCallInstanceNoLock
retn
CGVChangePrimaryMoniker endm
BookFileCode ends
| 26.028081 | 79 | 0.590506 |
bcf9113f0fad63b24a75b325b6426511959ae3df | 2,928 | asm | Assembly | _incObj/51 Smashable Green Block.asm | kodishmediacenter/msu-md-sonic | 3aa7c5e8add9660df2cd0eceaa214e7d59f2415c | [
"CC0-1.0"
] | 9 | 2021-01-15T13:47:53.000Z | 2022-01-17T15:33:55.000Z | _incObj/51 Smashable Green Block.asm | kodishmediacenter/msu-md-sonic | 3aa7c5e8add9660df2cd0eceaa214e7d59f2415c | [
"CC0-1.0"
] | 7 | 2021-01-14T02:18:48.000Z | 2021-03-24T15:44:30.000Z | _incObj/51 Smashable Green Block.asm | kodishmediacenter/msu-md-sonic | 3aa7c5e8add9660df2cd0eceaa214e7d59f2415c | [
"CC0-1.0"
] | 2 | 2021-01-14T13:14:26.000Z | 2021-01-29T17:46:04.000Z | ; ---------------------------------------------------------------------------
; Object 51 - smashable green block (MZ)
; ---------------------------------------------------------------------------
SmashBlock:
moveq #0,d0
move.b obRoutine(a0),d0
move.w Smab_Index(pc,d0.w),d1
jsr Smab_Index(pc,d1.w)
bra.w RememberState
; ===========================================================================
Smab_Index: dc.w Smab_Main-Smab_Index
dc.w Smab_Solid-Smab_Index
dc.w Smab_Points-Smab_Index
; ===========================================================================
Smab_Main: ; Routine 0
addq.b #2,obRoutine(a0)
move.l #Map_Smab,obMap(a0)
move.w #$42B8,obGfx(a0)
move.b #4,obRender(a0)
move.b #$10,obActWid(a0)
move.b #4,obPriority(a0)
move.b obSubtype(a0),obFrame(a0)
Smab_Solid: ; Routine 2
sonicAniFrame: equ $32 ; Sonic's current animation number
@count: equ $34 ; number of blocks hit + previous stuff
move.w (v_itembonus).w,$34(a0)
move.b (v_player+obAnim).w,sonicAniFrame(a0) ; load Sonic's animation number
move.w #$1B,d1
move.w #$10,d2
move.w #$11,d3
move.w obX(a0),d4
bsr.w SolidObject
btst #3,obStatus(a0) ; has Sonic landed on the block?
bne.s @smash ; if yes, branch
@notspinning:
rts
; ===========================================================================
@smash:
cmpi.b #id_Roll,sonicAniFrame(a0) ; is Sonic rolling/jumping?
bne.s @notspinning ; if not, branch
move.w @count(a0),(v_itembonus).w
bset #2,obStatus(a1)
move.b #$E,obHeight(a1)
move.b #7,obWidth(a1)
move.b #id_Roll,obAnim(a1) ; make Sonic roll
move.w #-$300,obVelY(a1) ; rebound Sonic
bset #1,obStatus(a1)
bclr #3,obStatus(a1)
move.b #2,obRoutine(a1)
bclr #3,obStatus(a0)
clr.b obSolid(a0)
move.b #1,obFrame(a0)
lea (Smab_Speeds).l,a4 ; load broken fragment speed data
moveq #3,d1 ; set number of fragments to 4
move.w #$38,d2
bsr.w SmashObject
bsr.w FindFreeObj
bne.s Smab_Points
move.b #id_Points,0(a1) ; load points object
move.w obX(a0),obX(a1)
move.w obY(a0),obY(a1)
move.w (v_itembonus).w,d2
addq.w #2,(v_itembonus).w ; increment bonus counter
cmpi.w #6,d2 ; have fewer than 3 blocks broken?
bcs.s @bonus ; if yes, branch
moveq #6,d2 ; set cap for points
@bonus:
moveq #0,d0
move.w Smab_Scores(pc,d2.w),d0
cmpi.w #$20,(v_itembonus).w ; have 16 blocks been smashed?
bcs.s @givepoints ; if not, branch
move.w #1000,d0 ; give higher points for 16th block
moveq #10,d2
@givepoints:
jsr (AddPoints).l
lsr.w #1,d2
move.b d2,obFrame(a1)
Smab_Points: ; Routine 4
bsr.w SpeedToPos
addi.w #$38,obVelY(a0)
bsr.w DisplaySprite
tst.b obRender(a0)
bpl.w DeleteObject
rts
; ===========================================================================
Smab_Speeds: dc.w -$200, -$200 ; x-speed, y-speed
dc.w -$100, -$100
dc.w $200, -$200
dc.w $100, -$100
Smab_Scores: dc.w 10, 20, 50, 100
| 28.705882 | 78 | 0.567964 |
3286ef2335a03d5941ec8fd4d523d1740be49547 | 428 | asm | Assembly | programs/oeis/068/A068028.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/068/A068028.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | programs/oeis/068/A068028.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | ; A068028: Decimal expansion of 22/7.
; 3,1,4,2,8,5,7,1,4,2,8,5,7,1,4,2,8,5,7,1,4,2,8,5,7,1,4,2,8,5,7,1,4,2,8,5,7,1,4,2,8,5,7,1,4,2,8,5,7,1,4,2,8,5,7,1,4,2,8,5,7,1,4,2,8,5,7,1,4,2,8,5,7,1,4,2,8,5,7,1,4,2,8,5,7,1,4,2,8,5,7,1,4,2,8,5,7,1,4,2,8,5,7,1,4
mov $3,$0
cal $0,21319 ; Decimal expansion of 1/315.
sub $0,1
mov $2,$3
mov $4,$3
cmp $4,0
add $3,$4
div $2,$3
sub $2,1
cmp $4,0
add $2,$4
div $0,$2
add $0,4
mov $1,$0
sub $1,2
| 22.526316 | 211 | 0.546729 |
fb2428ebb9455a25e654cc0b5a47867b8f83d9d3 | 1,237 | asm | Assembly | include/print_hex.asm | anders-14/osdev | d50ea3d4aa131315855527e7003a054f77fa75ed | [
"MIT"
] | null | null | null | include/print_hex.asm | anders-14/osdev | d50ea3d4aa131315855527e7003a054f77fa75ed | [
"MIT"
] | null | null | null | include/print_hex.asm | anders-14/osdev | d50ea3d4aa131315855527e7003a054f77fa75ed | [
"MIT"
] | null | null | null | ; print_hex
; Params:
; dx - hex word to print
print_hex:
pusha ; Store registers to stack
xor cx, cx ; Set counter to 0
.loop:
mov ax, dx ; move hex word to print into ax
and ax, 0x000F ; keep only the lower 4th
ror dx, 4 ; rotate dx 4 bits to the right, change what bits to keep
add al, 0x30
cmp al, 0x39 ; compare to the number 9
jle .move_into_hex_string
add al, 0x07 ; add 7 to make al equal to the letter of the hex code
.move_into_hex_string:
mov bx, hex_string+5 ; bx = memory of last byte in hex_string
sub bx, cx ; go to correct byte
mov [bx], al ; mov char into hex_string at right position
inc cx ; increment counter
cmp cx, 4 ; if at 4, we are done converting
jl .loop ; else keep looping
mov si, hex_string
call print_string
.done:
popa ; Restore registers
ret
hex_string: db "0x0000",0
| 35.342857 | 97 | 0.476152 |
3d867dee3a6ecc20a4e656c6fdc717c67d2eb2f6 | 260 | asm | Assembly | libsrc/_DEVELOPMENT/adt/wv_stack/c/sdcc_iy/wv_stack_reserve_callee.asm | meesokim/z88dk | 5763c7778f19a71d936b3200374059d267066bb2 | [
"ClArtistic"
] | null | null | null | libsrc/_DEVELOPMENT/adt/wv_stack/c/sdcc_iy/wv_stack_reserve_callee.asm | meesokim/z88dk | 5763c7778f19a71d936b3200374059d267066bb2 | [
"ClArtistic"
] | null | null | null | libsrc/_DEVELOPMENT/adt/wv_stack/c/sdcc_iy/wv_stack_reserve_callee.asm | meesokim/z88dk | 5763c7778f19a71d936b3200374059d267066bb2 | [
"ClArtistic"
] | null | null | null |
; int wv_stack_reserve_callee(wv_stack_t *s, size_t n)
SECTION code_adt_wv_stack
PUBLIC _wv_stack_reserve_callee
EXTERN _w_vector_reserve_callee
defc _wv_stack_reserve_callee = _w_vector_reserve_callee
INCLUDE "adt/wv_stack/z80/asm_wv_stack_reserve.asm"
| 20 | 56 | 0.861538 |
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