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514e23187ca09bbe03a9ee66640731b5f62dd5ce
187
asm
Assembly
tests/video-memory/video-memory.asm
Bigsby/x86_64
52070c59b3399cb22a181af550a3079e629fa566
[ "MIT" ]
null
null
null
tests/video-memory/video-memory.asm
Bigsby/x86_64
52070c59b3399cb22a181af550a3079e629fa566
[ "MIT" ]
null
null
null
tests/video-memory/video-memory.asm
Bigsby/x86_64
52070c59b3399cb22a181af550a3079e629fa566
[ "MIT" ]
null
null
null
mov ax, 0xb800 mov ds, ax mov [0x0], BYTE 'B' mov [0x2], BYTE 'i' mov [0x4], BYTE 'g' mov [0x6], BYTE 's' mov [0x8], BYTE 'b' mov [0xa], BYTE 'y' jmp $ times 510-($-$$) db 0 dw 0xaa55
12.466667
21
0.566845
c2e53cc18d79bf4748af0ea69a91b40916998d50
608
asm
Assembly
oeis/179/A179059.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
11
2021-08-22T19:44:55.000Z
2022-03-20T16:47:57.000Z
oeis/179/A179059.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
9
2021-08-29T13:15:54.000Z
2022-03-09T19:52:31.000Z
oeis/179/A179059.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
3
2021-08-22T20:56:47.000Z
2021-09-29T06:26:12.000Z
; A179059: Number of non-attacking placements of 4 rooks on an n X n board. ; 0,0,0,24,600,5400,29400,117600,381024,1058400,2613600,5880600,12269400,24048024,44717400,79497600,135945600,224726400,360561024,563376600,859685400,1284221400,1881864600,2709885024,3840540000,5364060000,7392060000,10061415000,13538640024,18024816600,23761109400,31034918400,40186713600,51617601024,65797670400,83275176600,104686608600,130767701400,162365448024,200451170400,246134709600,300679797600,365520674400,442280016024,532788240600,639104261400,763537757400,908673033600,1077394545024 add $0,1 bin $0,4 pow $0,2 mul $0,24
76
493
0.856908
174eb45447702dbe043530ef8969cc849664391b
483
asm
Assembly
oeis/333/A333906.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
11
2021-08-22T19:44:55.000Z
2022-03-20T16:47:57.000Z
oeis/333/A333906.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
9
2021-08-29T13:15:54.000Z
2022-03-09T19:52:31.000Z
oeis/333/A333906.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
3
2021-08-22T20:56:47.000Z
2021-09-29T06:26:12.000Z
; A333906: For n >= 2, a(n) = Sum_{k=2..n} prevpower2(k) + nextpower2(k) - 2*k, where prevpower2(k) is the largest power of 2 < k, nextpower2(k) is the smallest power of 2 > k. ; Submitted by Jon Maiga ; 1,1,3,5,5,3,7,13,17,19,19,17,13,7,15,29,41,51,59,65,69,71,71,69,65,59,51,41,29,15,31,61,89,115,139,161,181,199,215,229,241,251,259,265,269,271,271,269,265,259,251,241,229,215,199,181,161 mov $1,1 lpb $0 mul $1,2 sub $0,$1 lpe mul $1,2 sub $1,$0 mul $0,$1 add $0,$1 sub $0,1
32.2
188
0.643892
d5bd7dd32b4e609e78da35a29d3800fe4c6c8321
1,282
asm
Assembly
libsrc/_DEVELOPMENT/math/float/am9511/asm/z80/am32_read_callee.asm
dikdom/z88dk
40c55771062b0ea9bb2f0d5b73e2f754fc12b6b0
[ "ClArtistic" ]
1
2022-03-08T11:55:58.000Z
2022-03-08T11:55:58.000Z
libsrc/_DEVELOPMENT/math/float/am9511/asm/z80/am32_read_callee.asm
dikdom/z88dk
40c55771062b0ea9bb2f0d5b73e2f754fc12b6b0
[ "ClArtistic" ]
2
2022-03-20T22:17:35.000Z
2022-03-24T16:10:00.000Z
libsrc/_DEVELOPMENT/math/float/am9511/asm/z80/am32_read_callee.asm
jorgegv/z88dk
127130cf11f9ff268ba53e308138b12d2b9be90a
[ "ClArtistic" ]
null
null
null
SECTION code_clib SECTION code_fp_am9511 PUBLIC asm_sdcc_readr_callee PUBLIC asm_sdcc_read1_callee .asm_sdcc_readr_callee ; sdcc float primitive ; Read right sdcc float from the stack ; ; enter : stack = sdcc_float right, sdcc_float left, ret1, ret0 ; ; exit : sdcc_float left, ret1 ; DEHL = sdcc_float right ; ; uses : af, bc, de, hl, bc', de', hl' pop af ; my return pop bc ; ret 1 exx pop hl ; sccz80_float right pop de exx pop hl ; sccz80_float left pop de exx push de ; sccz80_float right push hl exx ; sccz80_float left push bc ; ret 1 push af ; my return ret .asm_sdcc_read1_callee ; sdcc float primitive ; Read a single sdcc float from the stack ; ; enter : stack = sdcc_float, ret1, ret0 ; ; exit : ret1 ; DEHL = sdcc_float ; ; uses : af, bc, de, hl pop af ; my return pop bc ; ret 1 pop hl ; sccz80_float or sdcc_float pop de push bc push af ret
22.892857
67
0.49064
485e50f5831c8b2f180f67929c2fdd6d9e21752d
2,865
asm
Assembly
CSES/Introductory_Problems/permutations.asm
eyangch/competitive-programming
59839efcec72cb792e61b7d316f83ad54f16a166
[ "MIT" ]
14
2019-08-14T00:43:10.000Z
2021-12-16T05:43:31.000Z
CSES/Introductory_Problems/permutations.asm
eyangch/competitive-programming
59839efcec72cb792e61b7d316f83ad54f16a166
[ "MIT" ]
null
null
null
CSES/Introductory_Problems/permutations.asm
eyangch/competitive-programming
59839efcec72cb792e61b7d316f83ad54f16a166
[ "MIT" ]
6
2020-12-30T03:30:17.000Z
2022-03-11T03:40:02.000Z
section .bss buffer: resb 64 outbuff: resb 7000000 N: resb 8 echar: resb 8 currpos: resb 8 outlen: resb 8 section .data nosoln db "NO SOLUTION" ,10 nslen equ $ - nosoln section .text atoi: push rbx push rcx push rdx xor rax, rax xor rcx, rcx .pre: mov cl, [rdx] inc rdx cmp rcx, '0' jb .pre cmp rcx, '9' ja .pre dec rdx .compute: mov cl, [rdx] inc rdx cmp rcx, '0' jb .done cmp rcx, '9' ja .done sub rcx, '0' imul rax, 10 add rax, rcx jmp .compute .done: pop rdx pop rcx pop rbx ret itoa: ; rax = num, echar = end char push rax push rbx push rcx push rdx xor rbx, rbx .pre: xor rdx, rdx mov rcx, 10 div rcx push rdx inc rbx test rax, rax jnz .pre mov rcx, rbx mov rdx, [currpos] .compute: pop rax add rax, '0' mov [rdx], rax inc rdx dec rcx cmp rcx, 0 je .done jmp .compute .done: mov rax, [echar] mov [rdx], rax mov rcx, [outlen] add rcx, rbx inc rcx inc rdx mov [outlen], rcx mov [currpos], rdx pop rdx pop rcx pop rbx pop rax ret print: ; print whatever is in buffer mov rdx, [outlen] mov rax, 1 mov rdi, 1 mov rsi, outbuff syscall ret global _start _start: ; read input (CSES reads entire input not just one line !!!) mov rax, 0 mov rdi, 0 mov rsi, buffer mov rdx, 64 syscall mov rbx, outbuff mov [currpos], rbx ; get N mov rdx, buffer call atoi mov [N], rax ; solve problem .solve: cmp rax, 2 je .bad cmp rax, 3 je .bad mov rcx, 2 .l1: cmp rcx, rax jg .f1 push rax mov rax, rcx mov rbx, 32 mov [echar], rbx call itoa pop rax add rcx, 2 jmp .l1 .f1: mov rcx, 1 .l2: cmp rcx, rax jg .f2 push rax mov rax, rcx mov rbx, 10 pop rdx add rcx, 2 cmp rcx, rdx jg .aftersp mov rbx, 32 .aftersp: push rdx mov [echar], rbx call itoa pop rax jmp .l2 .f2: call print jmp .done .bad: mov rdx, nslen mov rax, 1 mov rdi, 1 mov rsi, nosoln syscall .done: mov rax, 60 mov rdi, 0 syscall
17.259036
64
0.426876
daf9773583bbab3143783552afee52678ecd14c8
3,537
asm
Assembly
Transynther/x86/_processed/NONE/_xt_sm_/i7-8650U_0xd2.log_51_97.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
9
2020-08-13T19:41:58.000Z
2022-03-30T12:22:51.000Z
Transynther/x86/_processed/NONE/_xt_sm_/i7-8650U_0xd2.log_51_97.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
1
2021-04-29T06:29:35.000Z
2021-05-13T21:02:30.000Z
Transynther/x86/_processed/NONE/_xt_sm_/i7-8650U_0xd2.log_51_97.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
3
2020-07-14T17:07:07.000Z
2022-03-21T01:12:22.000Z
.global s_prepare_buffers s_prepare_buffers: push %r10 push %r11 push %r15 push %r8 push %r9 push %rcx push %rdi push %rdx push %rsi lea addresses_D_ht+0x9f9f, %rcx nop and %r10, %r10 mov (%rcx), %r15d nop nop nop nop nop xor $3367, %rdx lea addresses_UC_ht+0x131df, %r11 nop dec %rdx mov $0x6162636465666768, %r9 movq %r9, (%r11) nop xor %r9, %r9 lea addresses_A_ht+0x6aff, %r10 cmp $55437, %r8 vmovups (%r10), %ymm0 vextracti128 $0, %ymm0, %xmm0 vpextrq $0, %xmm0, %r15 nop nop nop nop inc %rcx lea addresses_normal_ht+0x15cdf, %r15 nop nop cmp $6402, %r11 movl $0x61626364, (%r15) nop nop nop nop nop and %r8, %r8 lea addresses_D_ht+0x1a89f, %rsi lea addresses_WC_ht+0x1e9df, %rdi add %rdx, %rdx mov $34, %rcx rep movsb nop nop nop nop inc %rsi lea addresses_UC_ht+0xe15f, %rsi lea addresses_D_ht+0x1912b, %rdi nop nop nop add %r9, %r9 mov $93, %rcx rep movsq nop nop nop nop nop add $5269, %rsi pop %rsi pop %rdx pop %rdi pop %rcx pop %r9 pop %r8 pop %r15 pop %r11 pop %r10 ret .global s_faulty_load s_faulty_load: push %r12 push %r15 push %r8 push %rax push %rbp push %rbx push %rsi // Load lea addresses_PSE+0xd1df, %r15 cmp %r8, %r8 mov (%r15), %bx nop nop sub $5944, %r8 // Store lea addresses_WT+0x205f, %rsi nop nop nop nop cmp %rax, %rax mov $0x5152535455565758, %rbp movq %rbp, (%rsi) xor %rsi, %rsi // Store lea addresses_PSE+0x1f25, %rbp add $25440, %rax movw $0x5152, (%rbp) nop nop nop nop nop dec %rax // Store lea addresses_PSE+0xd1df, %rsi nop nop nop nop nop and %r8, %r8 movl $0x51525354, (%rsi) nop nop nop add $21767, %r12 // Faulty Load lea addresses_PSE+0xd1df, %rbp nop cmp %rax, %rax movb (%rbp), %r8b lea oracles, %r12 and $0xff, %r8 shlq $12, %r8 mov (%r12,%r8,1), %r8 pop %rsi pop %rbx pop %rbp pop %rax pop %r8 pop %r15 pop %r12 ret /* <gen_faulty_load> [REF] {'OP': 'LOAD', 'src': {'type': 'addresses_PSE', 'size': 16, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': False}} {'OP': 'LOAD', 'src': {'type': 'addresses_PSE', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': True}} {'OP': 'STOR', 'dst': {'type': 'addresses_WT', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 7, 'same': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_PSE', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 1, 'same': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_PSE', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': True}} [Faulty Load] {'OP': 'LOAD', 'src': {'type': 'addresses_PSE', 'size': 1, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': True}} <gen_prepare_buffer> {'OP': 'LOAD', 'src': {'type': 'addresses_D_ht', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 5, 'same': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_UC_ht', 'size': 8, 'AVXalign': False, 'NT': True, 'congruent': 7, 'same': False}} {'OP': 'LOAD', 'src': {'type': 'addresses_A_ht', 'size': 32, 'AVXalign': False, 'NT': False, 'congruent': 5, 'same': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_normal_ht', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 7, 'same': False}} {'OP': 'REPM', 'src': {'type': 'addresses_D_ht', 'congruent': 6, 'same': False}, 'dst': {'type': 'addresses_WC_ht', 'congruent': 11, 'same': True}} {'OP': 'REPM', 'src': {'type': 'addresses_UC_ht', 'congruent': 6, 'same': False}, 'dst': {'type': 'addresses_D_ht', 'congruent': 2, 'same': False}} {'54': 51} 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 */
19.983051
152
0.644331
c57f3760cce6871a361f596cd290d0ee10097f44
887
asm
Assembly
src/sm/plminject.asm
PJBoy/alttp_sm_combo_randomizer_rom
4f14c87227b512a864d1f298e4a6efe7cbc373b3
[ "MIT" ]
31
2018-05-03T06:43:23.000Z
2021-07-16T13:17:01.000Z
src/sm/plminject.asm
PJBoy/alttp_sm_combo_randomizer_rom
4f14c87227b512a864d1f298e4a6efe7cbc373b3
[ "MIT" ]
13
2018-05-08T20:15:54.000Z
2022-01-20T21:28:53.000Z
src/sm/plminject.asm
PJBoy/alttp_sm_combo_randomizer_rom
4f14c87227b512a864d1f298e4a6efe7cbc373b3
[ "MIT" ]
26
2018-05-04T12:25:41.000Z
2022-03-23T20:27:57.000Z
; ; Code for injecting PLM's into rooms at runtime. ; This is done to minimize the amount of big room edits needed where a lot of room header information would need to be shuffled around otherwise. ; ; Hijack room loading to be able to inject arbitrary PLM:s into a room org $c2e8d5 jsl inject_plms org $c2eb8b jsl inject_plms org $cff700 base $8ff700 inject_plms: ldx #$0000 - ; Check if the PLM goes in this room, if the table is $0000 then exit lda plm_table, x beq .end cmp $079b bne .next ; Ok, Spawn the PLM phx txa clc adc #plm_table+$2 tax lda $0000, x jsl $84846a plx .next txa clc adc #$0008 tax bra - .end jsl $8FE8A3 ; Execute door ASM rtl org $cff800 base $8ff800 plm_table: ; room, plm, yyxx, args dw $0000, $0000, $0000, $0000 ; End of table
17.74
145
0.629087
4db415f429c93a5b3c0fb004ad12589a227852bc
5,189
asm
Assembly
Transynther/x86/_processed/AVXALIGN/_ht_zr_/i7-7700_9_0x48_notsx.log_21829_525.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
9
2020-08-13T19:41:58.000Z
2022-03-30T12:22:51.000Z
Transynther/x86/_processed/AVXALIGN/_ht_zr_/i7-7700_9_0x48_notsx.log_21829_525.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
1
2021-04-29T06:29:35.000Z
2021-05-13T21:02:30.000Z
Transynther/x86/_processed/AVXALIGN/_ht_zr_/i7-7700_9_0x48_notsx.log_21829_525.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
3
2020-07-14T17:07:07.000Z
2022-03-21T01:12:22.000Z
.global s_prepare_buffers s_prepare_buffers: push %r11 push %r13 push %r14 push %rbx push %rcx push %rdi push %rsi lea addresses_normal_ht+0x9299, %rsi lea addresses_WC_ht+0x4a99, %rdi nop nop nop nop nop sub %r14, %r14 mov $32, %rcx rep movsb nop nop nop nop sub %rbx, %rbx lea addresses_WT_ht+0xd919, %r11 nop nop nop nop add %rbx, %rbx movb (%r11), %cl nop nop nop dec %rbx lea addresses_WC_ht+0x18299, %rsi lea addresses_D_ht+0x72fb, %rdi clflush (%rsi) dec %r13 mov $56, %rcx rep movsq nop add $50998, %rsi lea addresses_UC_ht+0xf77, %rcx cmp $55150, %rdi movups (%rcx), %xmm1 vpextrq $1, %xmm1, %r13 nop nop xor $23035, %rsi pop %rsi pop %rdi pop %rcx pop %rbx pop %r14 pop %r13 pop %r11 ret .global s_faulty_load s_faulty_load: push %r10 push %r13 push %r9 push %rax push %rbp push %rdx // Store lea addresses_PSE+0x14459, %r9 inc %rdx mov $0x5152535455565758, %rbp movq %rbp, (%r9) nop nop sub %rbp, %rbp // Faulty Load lea addresses_UC+0x1a99, %rdx nop dec %rax movntdqa (%rdx), %xmm4 vpextrq $1, %xmm4, %rbp lea oracles, %r10 and $0xff, %rbp shlq $12, %rbp mov (%r10,%rbp,1), %rbp pop %rdx pop %rbp pop %rax pop %r9 pop %r13 pop %r10 ret /* <gen_faulty_load> [REF] {'OP': 'LOAD', 'src': {'same': True, 'NT': False, 'AVXalign': False, 'size': 8, 'type': 'addresses_UC', 'congruent': 0}} {'dst': {'same': False, 'NT': False, 'AVXalign': True, 'size': 8, 'type': 'addresses_PSE', 'congruent': 6}, 'OP': 'STOR'} [Faulty Load] {'OP': 'LOAD', 'src': {'same': True, 'NT': True, 'AVXalign': False, 'size': 16, 'type': 'addresses_UC', 'congruent': 0}} <gen_prepare_buffer> {'dst': {'same': False, 'congruent': 10, 'type': 'addresses_WC_ht'}, 'OP': 'REPM', 'src': {'same': False, 'congruent': 11, 'type': 'addresses_normal_ht'}} {'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 1, 'type': 'addresses_WT_ht', 'congruent': 7}} {'dst': {'same': False, 'congruent': 1, 'type': 'addresses_D_ht'}, 'OP': 'REPM', 'src': {'same': False, 'congruent': 11, 'type': 'addresses_WC_ht'}} {'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 16, 'type': 'addresses_UC_ht', 'congruent': 1}} {'48': 11687, '47': 347, '44': 1573, '00': 8222} 00 00 48 48 00 48 48 00 48 44 48 44 48 48 00 48 00 48 00 48 48 00 44 48 48 00 48 00 00 48 00 00 00 48 48 48 44 48 48 44 00 48 00 00 48 48 48 48 00 00 00 00 48 00 44 48 48 00 48 00 00 48 48 48 44 00 48 48 48 00 48 00 44 44 48 00 00 48 44 48 00 48 00 48 00 48 48 00 48 48 00 00 48 00 48 00 48 48 48 00 48 48 00 48 00 00 44 48 00 00 48 48 44 48 00 48 48 00 48 00 48 00 00 48 00 48 00 48 48 48 00 00 48 00 00 48 00 00 00 48 48 48 00 48 00 00 48 44 48 00 00 00 00 48 00 48 00 00 48 00 00 44 00 44 48 48 00 48 48 48 00 00 00 48 00 48 00 48 48 48 00 48 48 00 48 48 00 44 48 48 48 00 48 48 00 00 48 48 48 48 00 48 00 00 48 00 48 48 00 48 00 48 00 48 00 48 48 00 48 48 48 00 44 44 00 48 48 00 00 48 48 48 48 48 48 48 44 00 48 48 48 48 48 44 00 48 48 47 00 48 00 00 00 00 48 00 00 47 44 00 44 00 48 48 48 48 48 48 44 48 00 00 00 44 48 48 00 48 00 48 48 44 00 48 00 00 00 48 48 48 48 00 48 47 48 00 00 44 48 00 48 00 00 48 48 48 48 48 48 00 48 44 00 48 48 48 44 00 00 48 44 48 00 00 00 48 00 44 48 00 48 48 00 48 48 48 48 48 48 00 48 47 48 48 48 00 48 48 00 00 44 00 48 00 44 48 00 47 48 48 00 00 44 00 00 00 48 48 00 48 48 00 48 00 00 48 48 00 00 00 00 47 48 48 48 48 48 48 48 44 48 47 48 48 00 48 44 48 48 00 00 48 48 47 48 48 48 48 00 48 48 48 00 48 48 00 00 48 00 48 48 00 00 48 44 00 48 48 48 48 00 48 00 48 44 00 00 44 48 48 48 44 00 00 00 48 00 48 48 00 00 48 48 00 48 48 00 00 48 00 48 48 00 00 48 48 48 48 00 48 48 48 48 48 00 00 48 44 48 48 00 48 00 48 00 48 00 48 00 47 48 00 48 48 48 00 00 48 00 44 00 00 00 00 48 48 00 00 48 48 48 48 48 47 48 48 48 48 48 00 00 48 48 48 48 00 48 00 48 48 00 00 00 00 00 48 48 48 48 00 48 48 48 00 00 00 00 44 48 48 48 48 48 00 48 44 48 00 48 00 48 44 44 48 00 00 44 44 48 48 48 44 00 44 48 48 00 48 00 48 44 00 00 00 48 48 00 48 00 48 00 44 00 00 44 48 48 00 00 00 48 00 00 00 00 00 48 48 00 48 48 00 00 48 00 48 48 48 00 47 48 48 00 00 48 00 48 48 44 48 48 00 48 47 48 00 48 48 48 00 00 48 00 00 00 00 48 44 48 48 48 44 48 00 48 00 00 48 00 00 00 48 48 48 00 48 00 48 48 48 47 48 00 00 00 00 48 48 00 00 00 48 48 00 48 48 00 48 48 48 48 00 48 48 48 00 48 44 00 48 00 00 00 00 00 00 00 48 00 00 44 44 48 00 48 00 48 48 48 00 48 00 00 00 48 48 48 48 48 48 48 00 48 00 48 44 00 48 00 48 00 00 48 48 44 44 00 48 00 48 48 48 44 48 00 48 00 48 00 44 48 44 44 48 48 00 48 48 48 48 48 48 48 00 00 44 48 48 48 00 48 48 48 00 48 47 48 48 00 48 00 48 48 48 00 48 00 48 44 00 00 00 00 48 00 48 48 48 48 48 48 48 00 48 44 48 48 44 48 44 48 00 48 00 00 00 00 48 00 00 48 48 48 00 48 00 00 48 00 00 44 00 48 48 48 48 00 48 00 48 00 00 48 48 00 44 48 48 48 00 00 00 48 00 44 47 48 48 00 48 00 48 48 00 48 48 00 00 00 48 48 48 00 48 00 48 44 00 48 48 00 00 00 48 48 00 00 00 48 48 48 00 48 00 00 44 00 48 00 48 48 48 48 00 48 48 00 00 48 48 00 48 48 48 00 00 48 00 00 48 00 00 48 00 00 48 48 48 48 48 48 00 00 44 48 00 48 00 48 44 48 00 48 48 48 48 48 00 48 00 00 48 48 00 48 48 48 00 00 00 48 48 48 48 48 00 00 00 48 00 48 48 00 48 00 48 48 00 48 48 48 00 48 00 00 48 48 47 48 48 */
46.747748
2,999
0.659472
4dfb08b0cac09d158795d9e344d91268867c2469
773
asm
Assembly
oeis/208/A208387.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
11
2021-08-22T19:44:55.000Z
2022-03-20T16:47:57.000Z
oeis/208/A208387.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
9
2021-08-29T13:15:54.000Z
2022-03-09T19:52:31.000Z
oeis/208/A208387.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
3
2021-08-22T20:56:47.000Z
2021-09-29T06:26:12.000Z
; A208387: Number of nX3 0..2 arrays with new values 0..2 introduced in row major order and no element equal to more than two of its immediate leftward or upward or right-upward antidiagonal neighbors ; Submitted by Jon Maiga ; 5,117,3042,79092,2056392,53466192,1390120992,36143145792,939721790592,24432766555392,635251930440192,16516550191444992,429430304977569792,11165187929416814592,290294886164837179392,7547667040285766664192,196239343047429933268992,5102222919233178264993792,132657795900062634889838592,3449102693401628507135803392,89676670028442341185530888192,2331593420739500870823803092992,60621428939227022641418880417792,1576157152419902588676890890862592,40980085962917467305599163162427392 mov $1,26 pow $1,$0 mul $1,9 sub $1,1 div $1,2 mov $0,$1 add $0,1
64.416667
479
0.864166
b2f3eafe513e0e1f6edc69b5bba21f6eeaa92066
695
asm
Assembly
oeis/042/A042519.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
11
2021-08-22T19:44:55.000Z
2022-03-20T16:47:57.000Z
oeis/042/A042519.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
9
2021-08-29T13:15:54.000Z
2022-03-09T19:52:31.000Z
oeis/042/A042519.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
3
2021-08-22T20:56:47.000Z
2021-09-29T06:26:12.000Z
; A042519: Denominators of continued fraction convergents to sqrt(788). ; Submitted by Jamie Morken(s1.) ; 1,14,785,11004,617009,8649130,484968289,6798205176,381184458145,5343380619206,299610499133681,4199890368490740,235493471134615121,3301108486253102434,185097568701308351425,2594667070304570022384,145486453505757229604929,2039405016150905784491390,114352167357956481161122769,1602969748027541642040210156,89880658056900288435412891505,1259932182544631579737820691226,70646082880556268753753371600161,990305092510332394132285023093480,55527731263459170340161714664835041 add $0,1 mov $3,1 lpb $0 sub $0,1 add $2,$3 mov $3,$1 mov $1,$2 dif $2,4 mul $2,56 lpe mov $0,$2 div $0,56
40.882353
469
0.840288
47b6a102ddb8f3134e1b494ec3b5afb4754b733b
408
asm
Assembly
data/wildPokemon/safarizone3.asm
AmateurPanda92/pokemon-rby-dx
f7ba1cc50b22d93ed176571e074a52d73360da93
[ "MIT" ]
9
2020-07-12T19:44:21.000Z
2022-03-03T23:32:40.000Z
data/wildPokemon/safarizone3.asm
JStar-debug2020/pokemon-rby-dx
c2fdd8145d96683addbd8d9075f946a68d1527a1
[ "MIT" ]
7
2020-07-16T10:48:52.000Z
2021-01-28T18:32:02.000Z
data/wildPokemon/safarizone3.asm
JStar-debug2020/pokemon-rby-dx
c2fdd8145d96683addbd8d9075f946a68d1527a1
[ "MIT" ]
2
2021-03-28T18:33:43.000Z
2021-05-06T13:12:09.000Z
ZoneMons3: db $1E IF DEF(_RED) db 25,NIDORAN_M db 26,DODUO db 23,VENONAT db 24,EXEGGCUTE db 33,NIDORINO db 26,EXEGGCUTE db 25,NIDORAN_F db 31,VENOMOTH db 26,TAUROS db 28,KANGASKHAN ENDC IF DEF(_BLUE) db 25,NIDORAN_F db 26,DODUO db 23,VENONAT db 24,EXEGGCUTE db 33,NIDORINA db 26,EXEGGCUTE db 25,NIDORAN_M db 31,VENOMOTH db 26,TAUROS db 28,KANGASKHAN ENDC db $00
14.571429
18
0.696078
9a7b94188bcd9e53e844e19f63a179dd23e06244
532
asm
Assembly
dos/02.asm
zrsharp/assembly
e9d68311e7a37b7fec042b8f7de3ed9b537996b8
[ "MIT" ]
null
null
null
dos/02.asm
zrsharp/assembly
e9d68311e7a37b7fec042b8f7de3ed9b537996b8
[ "MIT" ]
null
null
null
dos/02.asm
zrsharp/assembly
e9d68311e7a37b7fec042b8f7de3ed9b537996b8
[ "MIT" ]
null
null
null
datasg segment array db 1h,2h,3h,4h,5h count equ $-array sum dw 0h datasg ends codesg segment assume cs:codesg assume ds:datasg start: mov ax,datasg mov ds,ax ;将数据移入段寄存器 xor ax,ax ;ax归零 mov cx,0 ;cs计数归零 mov bx,0 ;bx用来记偏移,先归零 next: add al,array[bx] ;加一个元素 inc bx ;偏移地址加一 inc cx ;计数器加一 cmp cx,count ;比较计数器和数组长度 jl next ;条件转移 mov byte ptr sum,al mov ah,4ch ;调用中断度21h的4ch号退出功能 int 21h codesg ends end start
19
34
0.578947
2677eb8981d9924c85837d3882795c8c10333722
727
asm
Assembly
programs/oeis/051/A051731.asm
karttu/loda
9c3b0fc57b810302220c044a9d17db733c76a598
[ "Apache-2.0" ]
1
2021-03-15T11:38:20.000Z
2021-03-15T11:38:20.000Z
programs/oeis/051/A051731.asm
karttu/loda
9c3b0fc57b810302220c044a9d17db733c76a598
[ "Apache-2.0" ]
null
null
null
programs/oeis/051/A051731.asm
karttu/loda
9c3b0fc57b810302220c044a9d17db733c76a598
[ "Apache-2.0" ]
null
null
null
; A051731: Triangle read by rows: T(n,k) = 1 if k divides n, T(n,k) = 0 otherwise (for n >= 1 and 1 <= k <= n). ; 1,1,1,1,0,1,1,1,0,1,1,0,0,0,1,1,1,1,0,0,1,1,0,0,0,0,0,1,1,1,0,1,0,0,0,1,1,0,1,0,0,0,0,0,1,1,1,0,0,1,0,0,0,0,1,1,0,0,0,0,0,0,0,0,0,1,1,1,1,1,0,1,0,0,0,0,0,1,1,0,0,0,0,0,0,0,0,0,0,0,1,1,1,0,0,0,0,1,0,0,0,0,0,0,1,1,0,1,0,1,0,0,0,0,0,0,0,0,0,1,1,1,0,1,0,0,0,1,0,0,0,0,0,0,0,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0,1,0,0,1,0,0,0,0,0,0,0,0,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,0,1,1,0,0,0,0,1,0,0,0,0,0,0,0,0,0,1,1,0,1,0,0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 cal $0,48158 ; Triangular array T read by rows: T(n,k) = n mod k, for k=1,2,...,n, n=1,2,... mov $1,$0 cmp $1,0
103.857143
501
0.518569
aa45cd864aaa040976459d6daf73d12314cbc890
4,226
asm
Assembly
Task 7/main.asm
mpetitjean/avrdude
f769629a0d4014d6b84f2089d8802ec075bbaa01
[ "MIT" ]
null
null
null
Task 7/main.asm
mpetitjean/avrdude
f769629a0d4014d6b84f2089d8802ec075bbaa01
[ "MIT" ]
null
null
null
Task 7/main.asm
mpetitjean/avrdude
f769629a0d4014d6b84f2089d8802ec075bbaa01
[ "MIT" ]
null
null
null
; ; testKeyboard.asm ; ; Created: 08/03/2017 17:00:00 ; Author : Mathieu Petitjean .include "m328pdef.inc" ;------------ ; CONSTANTS ;------------ ;BUZZER .equ BUZZER_P = 1 .equ BUZZER_DDR = DDRB .equ BUZZER_PORT = PORTB .equ BUZZER_PIN = PINB ;TCNT 1 RESET VALUE .equ TCNT1_RESET_880 = 47354 ;KEYBOARD - MATRIX LIKE NUMEROTATION .equ KEYB_PIN = PIND .equ KEYB_DDR = DDRD .equ KEYB_PORT = PORTD .equ ROW1 = 7 .equ ROW2 = 6 .equ ROW3 = 5 .equ ROW4 = 4 .equ COL1 = 3 .equ COL2 = 2 .equ COL3 = 1 .equ COL4 = 0 ;LEDs .equ LEDUP_P = 2 .equ LEDDOWN_P = 3 .equ LED_DDR = DDRC .equ LED_PORT = PORTC .equ LED_PIN = PINC ;-------- ; MACROS ;-------- .MACRO keyboardStep2 ; switch in/out for rows and columns LDI r16,(1<<ROW1)|(1<<ROW2)|(1<<ROW3)|(1<<ROW4) OUT KEYB_PORT,r16 LDI r16,(1<<COL1)|(1<<COL2)|(1<<COL3)|(1<<COL4) OUT KEYB_DDR,r16 NOP ; check which row is LOW SBIS KEYB_PIN,ROW1 RJMP @0 SBIS KEYB_PIN,ROW2 RJMP @1 SBIS KEYB_PIN,ROW3 RJMP @2 SBIS KEYB_PIN,ROW4 RJMP @3 RJMP reset .ENDMACRO ;------- ; CODE ;------- .CSEG .ORG 0x0000 rjmp init .ORG 0X001A rjmp timer1_ovf init: ; configure LEDs as outputs - set to HIGH to be off SBI LED_DDR,LEDUP_P SBI LED_DDR,LEDDOWN_P SBI LED_PORT,LEDUP_P SBI LED_PORT,LEDDOWN_P ; configure buzzer as output SBI BUZZER_DDR,BUZZER_P SBI BUZZER_PORT,BUZZER_P ; configure timer 1 in normal mode (count clk signals) ; WGM10 = 0 WGM11 = 0 LDS r16,TCCR1A CBR r16,(1<<WGM10)|(1<<WGM11) STS TCCR1A,r16 ; configure prescaler to 1 ; WGM12=0 WGM13=0 CS12=0 CS11=0 CS10=1 LDS r16,TCCR1B CBR r16,(1<<WGM12)|(1<<WGM13)|(1<<CS12)|(1<<CS11) SBR r16,(1<<CS10) STS TCCR1B,r16 ; activate overflow interrupt timer 1 ; TOIE1 LDS r16,TIMSK1 SBR r16,(1<<TOIE1) STS TIMSK1,r16 rjmp main main: ; Check if all COL are HIGH ; First set all rows to LOW as output and cols as inputs LDI r16,(1<<COL1)|(1<<COL2)|(1<<COL3)|(1<<COL4) LDI r17,(1<<ROW1)|(1<<ROW2)|(1<<ROW3)|(1<<ROW4) OUT KEYB_PORT,r16 OUT KEYB_DDR,r17 NOP ; COL1 is LOW => button 11 pressed SBIS KEYB_PIN,COL1 RJMP C1Pressed SBIS KEYB_PIN,COL2 RJMP C2Pressed SBIS KEYB_PIN,COL3 RJMP C3Pressed SBIS KEYB_PIN,COL4 RJMP C4Pressed RJMP reset reset: SBI LED_PORT,LEDUP_P SBI LED_PORT,LEDDOWN_P CLI RJMP main C1Pressed: keyboardStep2 C1R1Pressed,C1R2Pressed,C1R3Pressed,C1R4Pressed C2Pressed: keyboardStep2 C2R1Pressed,C2R2Pressed,C2R3Pressed,C2R4Pressed C3Pressed: keyboardStep2 C3R1Pressed,C3R2Pressed,C3R3Pressed,C3R4Pressed C4Pressed: keyboardStep2 C4R1Pressed,C4R2Pressed,C4R3Pressed,C4R4Pressed C1R1Pressed: ; 7 pressed -> 2 LEDS on and buzzer off CBI LED_PORT,LEDUP_P CBI LED_PORT,LEDDOWN_P ;disable interrupt CLI RJMP main C1R2Pressed: ; 4 pressed -> LED up OFF, LED down ON SBI LED_PORT,LEDUP_P CBI LED_PORT,LEDDOWN_P CLI RJMP main C1R3Pressed: ; 1 pressed -> buzzer SEI RJMP main C1R4Pressed: ; A pressed -> buzzer SEI RJMP main C2R1Pressed: ; 8 pressed -> LED up ON, LED down OFF, buzzer OFF CBI LED_PORT,LEDUP_P SBI LED_PORT,LEDDOWN_P CLI RJMP main C2R2Pressed: ; 5 pressed -> buzzer SEI RJMP main C2R3Pressed: ; 2 pressed -> buzzer SEI RJMP main C2R4Pressed: ; 0 pressed -> buzzer SEI RJMP main C3R1Pressed: ; 9 pressed -> buzzer SEI RJMP main C3R2Pressed: ; 6 pressed -> buzzer SEI RJMP main C3R3Pressed: ; 3 pressed -> buzzer SEI RJMP main C3R4Pressed: ; B pressed -> buzzer SEI RJMP main C4R1Pressed: ; F pressed -> buzzer SEI RJMP main C4R2Pressed: ; E pressed -> buzzer SEI RJMP main C4R3Pressed: ; D pressed -> buzzer SEI RJMP main C4R4Pressed: ; C pressed -> buzzer SEI RJMP main timer1_ovf: ; interruption routine LDI r16,HIGH(TCNT1_RESET_880) LDI r17,LOW(TCNT1_RESET_880) STS TCNT1H,r16 STS TCNT1L,r17 SBI BUZZER_PIN,BUZZER_P RETI
17.608333
65
0.63275
a0b7ae81e88001da98a174c1ff13538009c9c8dc
4,864
asm
Assembly
Transynther/x86/_processed/P/_zr_/i9-9900K_12_0xca.log_21829_153.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
9
2020-08-13T19:41:58.000Z
2022-03-30T12:22:51.000Z
Transynther/x86/_processed/P/_zr_/i9-9900K_12_0xca.log_21829_153.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
1
2021-04-29T06:29:35.000Z
2021-05-13T21:02:30.000Z
Transynther/x86/_processed/P/_zr_/i9-9900K_12_0xca.log_21829_153.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
3
2020-07-14T17:07:07.000Z
2022-03-21T01:12:22.000Z
.global s_prepare_buffers s_prepare_buffers: push %r12 push %r13 push %r14 push %rax push %rcx push %rdi push %rsi lea addresses_A_ht+0x14f17, %rsi lea addresses_normal_ht+0x97b7, %rdi xor $50680, %r14 mov $74, %rcx rep movsb xor $29797, %r14 lea addresses_UC_ht+0x194f3, %r14 nop cmp $6228, %rax mov $0x6162636465666768, %r13 movq %r13, (%r14) nop nop nop nop nop add $55657, %r14 lea addresses_normal_ht+0x1ac3f, %r14 cmp $31029, %rsi movw $0x6162, (%r14) nop nop nop nop cmp $63273, %rdi lea addresses_WT_ht+0x8dd7, %rsi lea addresses_WC_ht+0x2837, %rdi nop nop nop inc %r12 mov $109, %rcx rep movsl nop sub %r14, %r14 pop %rsi pop %rdi pop %rcx pop %rax pop %r14 pop %r13 pop %r12 ret .global s_faulty_load s_faulty_load: push %r11 push %r13 push %r14 push %rbx push %rsi // Faulty Load mov $0xdb7, %r13 nop nop nop nop nop xor %rsi, %rsi mov (%r13), %r11d lea oracles, %rbx and $0xff, %r11 shlq $12, %r11 mov (%rbx,%r11,1), %r11 pop %rsi pop %rbx pop %r14 pop %r13 pop %r11 ret /* <gen_faulty_load> [REF] {'OP': 'LOAD', 'src': {'size': 32, 'NT': False, 'type': 'addresses_P', 'same': False, 'AVXalign': False, 'congruent': 0}} [Faulty Load] {'OP': 'LOAD', 'src': {'size': 4, 'NT': False, 'type': 'addresses_P', 'same': True, 'AVXalign': False, 'congruent': 0}} <gen_prepare_buffer> {'OP': 'REPM', 'src': {'same': False, 'type': 'addresses_A_ht', 'congruent': 5}, 'dst': {'same': False, 'type': 'addresses_normal_ht', 'congruent': 9}} {'OP': 'STOR', 'dst': {'size': 8, 'NT': False, 'type': 'addresses_UC_ht', 'same': False, 'AVXalign': True, 'congruent': 2}} {'OP': 'STOR', 'dst': {'size': 2, 'NT': False, 'type': 'addresses_normal_ht', 'same': False, 'AVXalign': True, 'congruent': 3}} {'OP': 'REPM', 'src': {'same': False, 'type': 'addresses_WT_ht', 'congruent': 2}, 'dst': {'same': False, 'type': 'addresses_WC_ht', 'congruent': 7}} {'00': 21829} 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 */
50.666667
2,999
0.662418
7596d3a97091204b7d7b556241d8273a78e4e772
266
asm
Assembly
code/lab9.asm
CornPrincess/Assembly
c8bd1a8cda0b019f47ea22b97351f59bea6053b6
[ "MIT" ]
null
null
null
code/lab9.asm
CornPrincess/Assembly
c8bd1a8cda0b019f47ea22b97351f59bea6053b6
[ "MIT" ]
null
null
null
code/lab9.asm
CornPrincess/Assembly
c8bd1a8cda0b019f47ea22b97351f59bea6053b6
[ "MIT" ]
null
null
null
assume cs:codesg codesg segment start: mov ax,0b800h mov ds,ax mov cx,40 mov bx,1664 s: mov al,41h mov ah,02h mov ds:[bx],ax add bx,2 loop s mov ax,4c00h int 21h codesg ends end start
14
24
0.515038
3b9f0d194e4bf77afd87aa83777cb369806332f3
1,921
asm
Assembly
Microprocessors-Homeworks/Lab works/lab01/Sources/main.asm
aliyasineser/GTU_Homeworks
d98502674788b86683edefce442989bb4f7a464b
[ "Apache-2.0" ]
7
2018-10-20T12:50:00.000Z
2021-11-29T23:47:06.000Z
Microprocessors-Homeworks/Lab works/lab01/Sources/main.asm
aliyasineser/GTU_Homeworks
d98502674788b86683edefce442989bb4f7a464b
[ "Apache-2.0" ]
null
null
null
Microprocessors-Homeworks/Lab works/lab01/Sources/main.asm
aliyasineser/GTU_Homeworks
d98502674788b86683edefce442989bb4f7a464b
[ "Apache-2.0" ]
null
null
null
;***************************************************************** ;* This stationery serves as the framework for a * ;* user application (single file, absolute assembly application) * ;* For a more comprehensive program that * ;* demonstrates the more advanced functionality of this * ;* processor, please see the demonstration applications * ;* located in the examples subdirectory of the * ;* Freescale CodeWarrior for the HC12 Program directory * ;***************************************************************** ; export symbols XDEF Entry, _Startup ; export 'Entry' symbol ABSENTRY Entry ; for absolute assembly: mark this as application entry point ; Include derivative-specific definitions INCLUDE 'derivative.inc' ROMStart EQU $4000 ; absolute address to place my code/constant data ; variable/data section ORG RAMStart ; Insert here your data definition. Counter DS.W 1 FiboRes DS.W 1 ; code section ORG $1500 Entry: _Startup: LDAA #$FF ; load hex FF to acc a STAA DDRA ; light STAA DDRB ; light STAA DDRJ ; light LDAA #$FE ; load hex FE to acc a ANDA PTJ ; PTJ && Acc a LDAA #$4A ; load hex 4A to acc a STAA PORTA ; inform port a STAA PORTB ; inform port b ADDA #$01 ; Acc a value + hex 01 -> acc a STAA $1200 ; store acc a value to $1200 address SWI ;************************************************************** ;* Interrupt Vectors * ;************************************************************** ORG $FFFE DC.W Entry ; Reset Vector
33.12069
95
0.46278
aa49a427497a4d8cf3c0b488b0d798e8aabb7097
1,060
asm
Assembly
programs/oeis/050/A050404.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
22
2018-02-06T19:19:31.000Z
2022-01-17T21:53:31.000Z
programs/oeis/050/A050404.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
41
2021-02-22T19:00:34.000Z
2021-08-28T10:47:47.000Z
programs/oeis/050/A050404.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
5
2021-02-24T21:14:16.000Z
2021-08-09T19:48:05.000Z
; A050404: Partial sums of A051878. ; 1,14,77,280,798,1932,4158,8184,15015,26026,43043,68432,105196,157080,228684,325584,454461,623238,841225,1119272,1469930,1907620,2448810,3112200,3918915,4892706,6060159,7450912,9097880,11037488,13309912,15959328,19034169,22587390,26676741,31365048,36720502,42816956,49734230,57558424,66382239,76305306,87434523,99884400,113777412,129244360,146424740,165467120,186529525,209779830,235396161,263567304,294493122,328384980,365466178,405972392,450152123,498267154,550593015,607419456,669050928,735807072,808023216,886050880,970258289,1061030894,1158771901,1263902808,1376863950,1498115052,1628135790,1767426360,1916508055,2075923850,2246238995,2428041616,2621943324,2828579832,3048611580,3282724368,3531629997,3796066918,4076800889,4374625640,4690363546,5024866308,5379015642,5753723976,6149935155,6568625154,7010802799,7477510496,7969824968,8488858000,9035757192,9611706720,10217928105,10855680990,11526263925,12231015160 mov $2,$0 mul $0,4 add $0,4 add $2,5 mov $1,$2 bin $1,5 mul $0,$1 sub $0,$1 sub $0,3 div $0,3 add $0,1
70.666667
919
0.849057
4931043497b2c4a533ea5b58435b12ecb452eb69
243
asm
Assembly
00-hello-world/hello.asm
gashev/assembly-examples
3e7e5d37af00e6d6202a589ffa36a888edb5be16
[ "Unlicense" ]
1
2021-01-06T01:45:37.000Z
2021-01-06T01:45:37.000Z
00-hello-world/hello.asm
gashev/assembly-examples
3e7e5d37af00e6d6202a589ffa36a888edb5be16
[ "Unlicense" ]
null
null
null
00-hello-world/hello.asm
gashev/assembly-examples
3e7e5d37af00e6d6202a589ffa36a888edb5be16
[ "Unlicense" ]
null
null
null
SECTION .data hello: db 'Hello world!', 10 len: equ $-hello SECTION .text GLOBAL _start _start: mov eax, 4 mov ebx, 1 mov ecx, hello mov edx, len int 80h mov eax, 1 mov ebx, 0 int 80h
14.294118
38
0.534979
38c7d361f3d1eddb89539db5b7eb0820cfad2d1f
691
asm
Assembly
oeis/024/A024771.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
11
2021-08-22T19:44:55.000Z
2022-03-20T16:47:57.000Z
oeis/024/A024771.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
9
2021-08-29T13:15:54.000Z
2022-03-09T19:52:31.000Z
oeis/024/A024771.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
3
2021-08-22T20:56:47.000Z
2021-09-29T06:26:12.000Z
; A024771: Expansion of 1/((1-x)(1-8x)(1-9x)(1-10x)). ; Submitted by Jon Maiga ; 1,28,515,7850,107481,1373088,16714975,196403350,2246489861,25160397548,277090599435,3010102678050,32332333478641,344033387428408,3631750686931895,38080468894107950,396993032851849821,4118198909216785668,42536994202463280355,437729691089378309050,4489852277053186179401,45922062062580037909328,468516802227142350652815,4769508280466768342737350,48459542118691923690643381,491518730935266493174959388,4977842504464822989359097275,50345085059673914421618688850,508572896804100401044773817761 add $0,2 lpb $0 sub $0,1 add $2,2 mul $2,8 mul $3,10 add $3,$1 mul $1,9 add $1,$2 lpe mov $0,$3 div $0,16
40.647059
490
0.823444
c288464d9ff60cc016ff1847ccddce46098d1b52
81
asm
Assembly
text/maps/celadon_game_corner_2.asm
adhi-thirumala/EvoYellow
6fb1b1d6a1fa84b02e2d982f270887f6c63cdf4c
[ "Unlicense" ]
16
2018-08-28T21:47:01.000Z
2022-02-20T20:29:59.000Z
text/maps/celadon_game_corner_2.asm
adhi-thirumala/EvoYellow
6fb1b1d6a1fa84b02e2d982f270887f6c63cdf4c
[ "Unlicense" ]
5
2019-04-03T19:53:11.000Z
2022-03-11T22:49:34.000Z
text/maps/celadon_game_corner_2.asm
adhi-thirumala/EvoYellow
6fb1b1d6a1fa84b02e2d982f270887f6c63cdf4c
[ "Unlicense" ]
2
2019-12-09T19:46:02.000Z
2020-12-05T21:36:30.000Z
_CeladonGameCornerText_48f19:: text "Oops! Forgot the" line "COIN CASE!" done
16.2
30
0.753086
59db67895e6add6009b7580f1c0742bd79f4acc2
606
asm
Assembly
programs/oeis/125/A125518.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
22
2018-02-06T19:19:31.000Z
2022-01-17T21:53:31.000Z
programs/oeis/125/A125518.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
41
2021-02-22T19:00:34.000Z
2021-08-28T10:47:47.000Z
programs/oeis/125/A125518.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
5
2021-02-24T21:14:16.000Z
2021-08-09T19:48:05.000Z
; A125518: a(n) = tau(n) * prime(n). ; 2,6,10,21,22,52,34,76,69,116,62,222,82,172,188,265,118,366,134,426,292,316,166,712,291,404,412,642,218,904,254,786,548,556,596,1359,314,652,668,1384,358,1448,382,1158,1182,796,422,2230,681,1374,932,1434,482,2008,1028,2104,1076,1084,554,3372,566,1172,1842,2177,1252,2536,662,2022,1388,2792,706,4308,734,1492,2274,2298,1556,3176,802,4090,2095,1684,862,5196,1756,1772,1796,3656,922,5556,1868,2874,1948,1964,1996,6036,1018,3126,3138,4869 mov $1,$0 seq $0,5 ; d(n) (also called tau(n) or sigma_0(n)), the number of divisors of n. seq $1,40 ; The prime numbers. mul $0,$1
75.75
435
0.721122
8f43c9b37fa668f0c2482a00777ec3bef6a5ce15
747
asm
Assembly
programs/oeis/294/A294937.asm
karttu/loda
9c3b0fc57b810302220c044a9d17db733c76a598
[ "Apache-2.0" ]
1
2021-03-15T11:38:20.000Z
2021-03-15T11:38:20.000Z
programs/oeis/294/A294937.asm
karttu/loda
9c3b0fc57b810302220c044a9d17db733c76a598
[ "Apache-2.0" ]
null
null
null
programs/oeis/294/A294937.asm
karttu/loda
9c3b0fc57b810302220c044a9d17db733c76a598
[ "Apache-2.0" ]
null
null
null
; A294937: Characteristic function for abundant numbers (A005101): a(n) = 1 if A001065(n) > n, 0 otherwise. ; 0,0,0,0,0,0,0,0,0,0,0,1,0,0,0,0,0,1,0,1,0,0,0,1,0,0,0,0,0,1,0,0,0,0,0,1,0,0,0,1,0,1,0,0,0,0,0,1,0,0,0,0,0,1,0,1,0,0,0,1,0,0,0,0,0,1,0,0,0,1,0,1,0,0,0,0,0,1,0,1,0,0,0,1,0,0,0,1,0,1,0,0,0,0,0,1,0,0,0,1,0,1,0,1,0,0,0,1,0,0,0,1,0,1,0,0,0,0,0,1,0,0,0,0,0,1,0,0,0,0,0,1,0,0,0,0,0,1,0,1,0,0,0,1,0,0,0,0,0,1,0,0,0,0,0,1,0,0,0,1,0,1,0,0,0,0,0,1,0,0,0,0,0,1,0,1,0,0,0,1,0,0,0,0,0,1,0,0,0,0,0,1,0,0,0,1,0,1,0,1,0,0,0,1,0,0,0,1,0,1,0,0,0,0,0,1,0,0,0,1,0,1,0,1,0,0,0,1,0,0,0,0,0,1,0,0,0,0,0,1,0,0,0,0,0,1,0,0,0,0 cal $0,294935 ; Characteristic function for nonabundant numbers (A263837): a(n) = 1 if A001065(n) <= n, 0 otherwise. mov $1,$0 cmp $1,0
106.714286
501
0.564926
6f41b211648d033149e0862520f61650da4ecc97
322
asm
Assembly
example/loop.asm
kumavale/vsmi
3826a1621c738718067a44dae7d80ae8efad8911
[ "MIT" ]
1
2021-08-23T18:09:12.000Z
2021-08-23T18:09:12.000Z
example/loop.asm
kumavale/mipsi
3826a1621c738718067a44dae7d80ae8efad8911
[ "MIT" ]
null
null
null
example/loop.asm
kumavale/mipsi
3826a1621c738718067a44dae7d80ae8efad8911
[ "MIT" ]
null
null
null
# i = 1; # while i < 5 { # i = i + 1; # } # printf("%d", i); // 5 main: xor $t0 $t0 $t0 # $t0 = 0 xor $t1 $t1 $t1 # $t1 = 0 addi $t1 $t1 5 # $t1 = %t1 + 5 loop: addi $t0 $t0 1 # $t0 = $t0 + 1 blt $t0 $t1 loop # goto loop if $t0 < $t1 # print result li $v0, 1 move $a0, $t0 syscall
16.947368
48
0.425466
7a73a3c281dc9baa3ec3df0d9bdf8179c0477cd2
260
asm
Assembly
libsrc/_DEVELOPMENT/math/float/am9511/lam32/c/sdcc/__divulong.asm
ahjelm/z88dk
c4de367f39a76b41f6390ceeab77737e148178fa
[ "ClArtistic" ]
640
2017-01-14T23:33:45.000Z
2022-03-30T11:28:42.000Z
libsrc/_DEVELOPMENT/math/float/am9511/lam32/c/sdcc/__divulong.asm
C-Chads/z88dk
a4141a8e51205c6414b4ae3263b633c4265778e6
[ "ClArtistic" ]
1,600
2017-01-15T16:12:02.000Z
2022-03-31T12:11:12.000Z
libsrc/_DEVELOPMENT/math/float/am9511/lam32/c/sdcc/__divulong.asm
C-Chads/z88dk
a4141a8e51205c6414b4ae3263b633c4265778e6
[ "ClArtistic" ]
215
2017-01-17T10:43:03.000Z
2022-03-23T17:25:02.000Z
SECTION code_fp_am9511 PUBLIC __divulong EXTERN cam32_sdcc_ldivu ; divide two 32-bit numbers into a 32-bit quotient ; ; enter : stack = dividend (32-bit), divisor (32-bit), ret ; ; exit : dehl = quotient defc __divulong = cam32_sdcc_ldivu
17.333333
61
0.7
b2e491443b662b6406f8c5eb7c6c34d8f894ed2b
1,571
asm
Assembly
programs/oeis/028/A028896.asm
karttu/loda
9c3b0fc57b810302220c044a9d17db733c76a598
[ "Apache-2.0" ]
1
2021-03-15T11:38:20.000Z
2021-03-15T11:38:20.000Z
programs/oeis/028/A028896.asm
karttu/loda
9c3b0fc57b810302220c044a9d17db733c76a598
[ "Apache-2.0" ]
null
null
null
programs/oeis/028/A028896.asm
karttu/loda
9c3b0fc57b810302220c044a9d17db733c76a598
[ "Apache-2.0" ]
null
null
null
; A028896: 6 times triangular numbers: a(n) = 3*n*(n+1). ; 0,6,18,36,60,90,126,168,216,270,330,396,468,546,630,720,816,918,1026,1140,1260,1386,1518,1656,1800,1950,2106,2268,2436,2610,2790,2976,3168,3366,3570,3780,3996,4218,4446,4680,4920,5166,5418,5676,5940,6210,6486,6768,7056,7350,7650,7956,8268,8586,8910,9240,9576,9918,10266,10620,10980,11346,11718,12096,12480,12870,13266,13668,14076,14490,14910,15336,15768,16206,16650,17100,17556,18018,18486,18960,19440,19926,20418,20916,21420,21930,22446,22968,23496,24030,24570,25116,25668,26226,26790,27360,27936,28518,29106,29700,30300,30906,31518,32136,32760,33390,34026,34668,35316,35970,36630,37296,37968,38646,39330,40020,40716,41418,42126,42840,43560,44286,45018,45756,46500,47250,48006,48768,49536,50310,51090,51876,52668,53466,54270,55080,55896,56718,57546,58380,59220,60066,60918,61776,62640,63510,64386,65268,66156,67050,67950,68856,69768,70686,71610,72540,73476,74418,75366,76320,77280,78246,79218,80196,81180,82170,83166,84168,85176,86190,87210,88236,89268,90306,91350,92400,93456,94518,95586,96660,97740,98826,99918,101016,102120,103230,104346,105468,106596,107730,108870,110016,111168,112326,113490,114660,115836,117018,118206,119400,120600,121806,123018,124236,125460,126690,127926,129168,130416,131670,132930,134196,135468,136746,138030,139320,140616,141918,143226,144540,145860,147186,148518,149856,151200,152550,153906,155268,156636,158010,159390,160776,162168,163566,164970,166380,167796,169218,170646,172080,173520,174966,176418,177876,179340,180810,182286,183768,185256,186750 sub $1,$0 bin $1,2 mul $1,6
224.428571
1,484
0.817314
1d1f727813396496d4b343f1ad77610d819bb174
713
asm
Assembly
oeis/098/A098575.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
11
2021-08-22T19:44:55.000Z
2022-03-20T16:47:57.000Z
oeis/098/A098575.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
9
2021-08-29T13:15:54.000Z
2022-03-09T19:52:31.000Z
oeis/098/A098575.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
3
2021-08-22T20:56:47.000Z
2021-09-29T06:26:12.000Z
; A098575: a(n) = Sum_{k=0..floor(n/4)} C(n-2*k,2*k)*2^k. ; Submitted by Christian Krause ; 1,1,1,1,3,7,13,21,35,63,117,213,379,671,1197,2149,3859,6911,12357,22101,39563,70847,126845,227045,406371,727391,1302101,2330901,4172443,7468767,13369293,23931621,42838835,76683583,137266917,245713493,439837739,787329151,1409354397,2522806629,4515934339,8083720351,14470215157,25902323221,46366299963,82997717407,148569565165,265946059365,476055153491,852159682431,1525403341701,2730539119701,4887785204683,8749350654527,15661722787773,28035173160421,50184193942435,89831916033503,160803083700117 mov $2,1 lpb $0 sub $0,1 sub $3,$4 mul $3,2 mov $4,$2 add $2,$1 mov $1,$3 add $5,$4 mov $3,$5 lpe mov $0,$2
41.941176
497
0.771388
a5431468b0394225a28b92ee9f7706ec983eb0bd
281
asm
Assembly
libsrc/_DEVELOPMENT/adt/wa_priority_queue/c/sdcc_iy/wa_priority_queue_empty_fastcall.asm
meesokim/z88dk
5763c7778f19a71d936b3200374059d267066bb2
[ "ClArtistic" ]
null
null
null
libsrc/_DEVELOPMENT/adt/wa_priority_queue/c/sdcc_iy/wa_priority_queue_empty_fastcall.asm
meesokim/z88dk
5763c7778f19a71d936b3200374059d267066bb2
[ "ClArtistic" ]
null
null
null
libsrc/_DEVELOPMENT/adt/wa_priority_queue/c/sdcc_iy/wa_priority_queue_empty_fastcall.asm
meesokim/z88dk
5763c7778f19a71d936b3200374059d267066bb2
[ "ClArtistic" ]
null
null
null
; int wa_priority_queue_empty_fastcall(wa_priority_queue_t *q) SECTION code_adt_wa_priority_queue PUBLIC _wa_priority_queue_empty_fastcall defc _wa_priority_queue_empty_fastcall = asm_wa_priority_queue_empty INCLUDE "adt/wa_priority_queue/z80/asm_wa_priority_queue_empty.asm"
25.545455
68
0.893238
b22c73e746509e5a9869a2a1e5f9b97d68284837
688
asm
Assembly
programs/oeis/326/A326122.asm
karttu/loda
9c3b0fc57b810302220c044a9d17db733c76a598
[ "Apache-2.0" ]
null
null
null
programs/oeis/326/A326122.asm
karttu/loda
9c3b0fc57b810302220c044a9d17db733c76a598
[ "Apache-2.0" ]
null
null
null
programs/oeis/326/A326122.asm
karttu/loda
9c3b0fc57b810302220c044a9d17db733c76a598
[ "Apache-2.0" ]
null
null
null
; A326122: a(n) = 10 * sigma(n). ; 10,30,40,70,60,120,80,150,130,180,120,280,140,240,240,310,180,390,200,420,320,360,240,600,310,420,400,560,300,720,320,630,480,540,480,910,380,600,560,900,420,960,440,840,780,720,480,1240,570,930,720,980,540,1200,720,1200,800,900,600,1680,620,960 mov $3,$0 mov $5,$0 mov $7,2 lpb $7,1 mov $0,$5 sub $7,1 add $0,$7 sub $0,1 cal $0,244049 ; Sum of all proper divisors of all positive integers <= n. mov $4,$0 mul $4,2 sub $4,3 mov $1,$4 mov $8,$7 lpb $8,1 mov $6,$1 sub $8,1 lpe lpe lpb $5,1 mov $5,0 sub $6,$1 lpe mov $1,$6 add $1,3 mul $1,3 add $1,5 mov $2,$3 mul $2,6 add $1,$2 sub $1,8 div $1,6 mul $1,10 add $1,10
18.105263
247
0.604651
163a99914e6e74f488f46562ae06008241dca51c
6,957
asm
Assembly
Transynther/x86/_processed/NONE/_xt_/i7-8650U_0xd2_notsx.log_11_1665.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
9
2020-08-13T19:41:58.000Z
2022-03-30T12:22:51.000Z
Transynther/x86/_processed/NONE/_xt_/i7-8650U_0xd2_notsx.log_11_1665.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
1
2021-04-29T06:29:35.000Z
2021-05-13T21:02:30.000Z
Transynther/x86/_processed/NONE/_xt_/i7-8650U_0xd2_notsx.log_11_1665.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
3
2020-07-14T17:07:07.000Z
2022-03-21T01:12:22.000Z
.global s_prepare_buffers s_prepare_buffers: push %r11 push %r12 push %r15 push %rax push %rbp push %rbx push %rcx push %rdi push %rsi lea addresses_D_ht+0x1727c, %rbp nop nop nop nop nop and %r11, %r11 mov (%rbp), %bx nop nop nop nop nop inc %r15 lea addresses_D_ht+0xeff0, %rdi nop nop nop nop and $29944, %r11 movups (%rdi), %xmm2 vpextrq $1, %xmm2, %r12 nop nop nop nop nop and $4123, %r15 lea addresses_WT_ht+0xce54, %rdi nop cmp $12302, %rax mov (%rdi), %r15w nop nop cmp %rbp, %rbp lea addresses_UC_ht+0xbd0c, %rsi lea addresses_WC_ht+0x1197c, %rdi nop nop and %r12, %r12 mov $31, %rcx rep movsb nop and $40763, %rbp lea addresses_A_ht+0x1517c, %rsi lea addresses_UC_ht+0x11d7c, %rdi nop nop nop inc %r11 mov $21, %rcx rep movsb nop nop nop xor %r15, %r15 lea addresses_WC_ht+0x1697c, %r12 xor %rax, %rax mov $0x6162636465666768, %rbx movq %rbx, (%r12) nop nop nop cmp %r12, %r12 lea addresses_WC_ht+0x1c77c, %r11 nop cmp %rbp, %rbp movl $0x61626364, (%r11) nop nop nop nop nop and $51364, %r12 lea addresses_WT_ht+0x1477, %rsi nop nop dec %r11 and $0xffffffffffffffc0, %rsi vmovntdqa (%rsi), %ymm2 vextracti128 $0, %ymm2, %xmm2 vpextrq $0, %xmm2, %rax nop nop nop nop xor %rcx, %rcx lea addresses_normal_ht+0xe57c, %r11 nop nop nop add %rcx, %rcx mov (%r11), %si dec %rcx lea addresses_A_ht+0x68fc, %rsi lea addresses_WT_ht+0x1eafc, %rdi nop nop nop nop dec %r12 mov $16, %rcx rep movsl and $43006, %rdi lea addresses_WT_ht+0x12d8c, %rbp clflush (%rbp) nop nop nop nop nop dec %r15 movb $0x61, (%rbp) add %rdi, %rdi lea addresses_normal_ht+0x1b924, %rdi add $8104, %r11 mov (%rdi), %rbx sub $51037, %r11 lea addresses_normal_ht+0x1b18c, %rsi lea addresses_WT_ht+0x1bbec, %rdi clflush (%rdi) nop nop nop nop sub %rax, %rax mov $73, %rcx rep movsw nop nop nop cmp %rsi, %rsi lea addresses_normal_ht+0x1e234, %rsi lea addresses_normal_ht+0x537c, %rdi nop nop nop xor %rbx, %rbx mov $59, %rcx rep movsw nop nop nop nop add %rax, %rax lea addresses_UC_ht+0xdb48, %r11 nop cmp %rax, %rax mov $0x6162636465666768, %rbx movq %rbx, (%r11) inc %rbp pop %rsi pop %rdi pop %rcx pop %rbx pop %rbp pop %rax pop %r15 pop %r12 pop %r11 ret .global s_faulty_load s_faulty_load: push %r13 push %rax push %rbx push %rcx push %rdi push %rdx push %rsi // Store lea addresses_normal+0x15f3a, %rdi nop nop dec %rdx mov $0x5152535455565758, %rcx movq %rcx, (%rdi) nop nop and %r13, %r13 // REPMOV lea addresses_PSE+0x11034, %rsi lea addresses_D+0x134fc, %rdi nop nop nop nop nop xor $31881, %r13 mov $121, %rcx rep movsl add $46310, %rsi // Store mov $0xb0, %rdi nop nop nop nop dec %rax mov $0x5152535455565758, %r13 movq %r13, (%rdi) nop nop inc %rax // Store lea addresses_US+0x192bd, %rdi nop nop nop nop nop cmp %rdx, %rdx mov $0x5152535455565758, %rsi movq %rsi, %xmm4 movups %xmm4, (%rdi) nop nop nop nop cmp $15170, %rbx // Store lea addresses_D+0x4ffc, %rsi nop nop add %rbx, %rbx mov $0x5152535455565758, %rcx movq %rcx, %xmm5 vmovups %ymm5, (%rsi) nop nop nop nop nop xor $33336, %rdi // Store lea addresses_A+0x52cc, %rsi nop nop nop cmp %rcx, %rcx mov $0x5152535455565758, %rdx movq %rdx, (%rsi) nop nop and $15797, %rax // Load mov $0xb7c, %rax nop nop add $5570, %rsi movups (%rax), %xmm5 vpextrq $0, %xmm5, %rdx nop nop nop nop and %rsi, %rsi // Store mov $0x6244e00000006bc, %rcx sub %rsi, %rsi movw $0x5152, (%rcx) nop nop nop nop cmp %rbx, %rbx // Faulty Load lea addresses_D+0x1e97c, %rcx nop nop nop nop add $13679, %rdx mov (%rcx), %ebx lea oracles, %r13 and $0xff, %rbx shlq $12, %rbx mov (%r13,%rbx,1), %rbx pop %rsi pop %rdx pop %rdi pop %rcx pop %rbx pop %rax pop %r13 ret /* <gen_faulty_load> [REF] {'OP': 'LOAD', 'src': {'type': 'addresses_D', 'size': 2, 'AVXalign': False, 'NT': True, 'congruent': 0, 'same': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_normal', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': False}} {'OP': 'REPM', 'src': {'type': 'addresses_PSE', 'congruent': 3, 'same': False}, 'dst': {'type': 'addresses_D', 'congruent': 7, 'same': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_P', 'size': 8, 'AVXalign': True, 'NT': False, 'congruent': 2, 'same': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_US', 'size': 16, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_D', 'size': 32, 'AVXalign': False, 'NT': False, 'congruent': 6, 'same': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_A', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 4, 'same': False}} {'OP': 'LOAD', 'src': {'type': 'addresses_P', 'size': 16, 'AVXalign': False, 'NT': False, 'congruent': 7, 'same': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_NC', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 6, 'same': False}} [Faulty Load] {'OP': 'LOAD', 'src': {'type': 'addresses_D', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': True}} <gen_prepare_buffer> {'OP': 'LOAD', 'src': {'type': 'addresses_D_ht', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 8, 'same': False}} {'OP': 'LOAD', 'src': {'type': 'addresses_D_ht', 'size': 16, 'AVXalign': False, 'NT': False, 'congruent': 1, 'same': False}} {'OP': 'LOAD', 'src': {'type': 'addresses_WT_ht', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 1, 'same': False}} {'OP': 'REPM', 'src': {'type': 'addresses_UC_ht', 'congruent': 4, 'same': False}, 'dst': {'type': 'addresses_WC_ht', 'congruent': 11, 'same': False}} {'OP': 'REPM', 'src': {'type': 'addresses_A_ht', 'congruent': 11, 'same': False}, 'dst': {'type': 'addresses_UC_ht', 'congruent': 10, 'same': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_WC_ht', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 10, 'same': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_WC_ht', 'size': 4, 'AVXalign': False, 'NT': True, 'congruent': 9, 'same': True}} {'OP': 'LOAD', 'src': {'type': 'addresses_WT_ht', 'size': 32, 'AVXalign': False, 'NT': True, 'congruent': 0, 'same': False}} {'OP': 'LOAD', 'src': {'type': 'addresses_normal_ht', 'size': 2, 'AVXalign': True, 'NT': False, 'congruent': 8, 'same': False}} {'OP': 'REPM', 'src': {'type': 'addresses_A_ht', 'congruent': 4, 'same': False}, 'dst': {'type': 'addresses_WT_ht', 'congruent': 2, 'same': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_WT_ht', 'size': 1, 'AVXalign': False, 'NT': False, 'congruent': 3, 'same': False}} {'OP': 'LOAD', 'src': {'type': 'addresses_normal_ht', 'size': 8, 'AVXalign': True, 'NT': False, 'congruent': 3, 'same': False}} {'OP': 'REPM', 'src': {'type': 'addresses_normal_ht', 'congruent': 2, 'same': True}, 'dst': {'type': 'addresses_WT_ht', 'congruent': 4, 'same': False}} {'OP': 'REPM', 'src': {'type': 'addresses_normal_ht', 'congruent': 3, 'same': False}, 'dst': {'type': 'addresses_normal_ht', 'congruent': 6, 'same': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_UC_ht', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': False}} {'36': 11} 36 36 36 36 36 36 36 36 36 36 36 */
20.342105
156
0.647693
b26f62ef1b99631d1f9e6ed28df15281bd4a28b6
852
asm
Assembly
data/mapObjects/route25.asm
adhi-thirumala/EvoYellow
6fb1b1d6a1fa84b02e2d982f270887f6c63cdf4c
[ "Unlicense" ]
16
2018-08-28T21:47:01.000Z
2022-02-20T20:29:59.000Z
data/mapObjects/route25.asm
adhi-thirumala/EvoYellow
6fb1b1d6a1fa84b02e2d982f270887f6c63cdf4c
[ "Unlicense" ]
5
2019-04-03T19:53:11.000Z
2022-03-11T22:49:34.000Z
data/mapObjects/route25.asm
adhi-thirumala/EvoYellow
6fb1b1d6a1fa84b02e2d982f270887f6c63cdf4c
[ "Unlicense" ]
2
2019-12-09T19:46:02.000Z
2020-12-05T21:36:30.000Z
Route25Object: db $2c ; border block db $1 ; warps db $3, $2d, $0, BILLS_HOUSE db $1 ; signs db $3, $2b, $b ; Route25Text11 db $a ; objects object SPRITE_BUG_CATCHER, $e, $2, STAY, DOWN, $1, OPP_YOUNGSTER, $5 object SPRITE_BUG_CATCHER, $12, $5, STAY, UP, $2, OPP_YOUNGSTER, $6 object SPRITE_BLACK_HAIR_BOY_1, $18, $4, STAY, DOWN, $3, OPP_JR_TRAINER_M, $2 object SPRITE_LASS, $12, $8, STAY, RIGHT, $4, OPP_LASS, $9 object SPRITE_BUG_CATCHER, $20, $3, STAY, LEFT, $5, OPP_YOUNGSTER, $7 object SPRITE_LASS, $25, $4, STAY, DOWN, $6, OPP_LASS, $a object SPRITE_HIKER, $8, $4, STAY, RIGHT, $7, OPP_HIKER, $2 object SPRITE_HIKER, $17, $9, STAY, UP, $8, OPP_HIKER, $3 object SPRITE_HIKER, $d, $7, STAY, RIGHT, $9, OPP_HIKER, $4 object SPRITE_BALL, $16, $2, STAY, NONE, $a, TM_19 ; warp-to EVENT_DISP ROUTE_25_WIDTH, $3, $2d ; BILLS_HOUSE
35.5
78
0.666667
050abf399e2120f4d56c22984a38eac27f0239b5
260
asm
Assembly
pin-3.22-98547-g7a303a835-gcc-linux/source/tools/Probes/jmp_in_probe_intel64.asm
ArthasZhang007/15418FinalProject
a71f698ea48ebbc446111734c198f16a55633669
[ "MIT" ]
null
null
null
pin-3.22-98547-g7a303a835-gcc-linux/source/tools/Probes/jmp_in_probe_intel64.asm
ArthasZhang007/15418FinalProject
a71f698ea48ebbc446111734c198f16a55633669
[ "MIT" ]
null
null
null
pin-3.22-98547-g7a303a835-gcc-linux/source/tools/Probes/jmp_in_probe_intel64.asm
ArthasZhang007/15418FinalProject
a71f698ea48ebbc446111734c198f16a55633669
[ "MIT" ]
null
null
null
; ; Copyright (C) 2011-2012 Intel Corporation. ; SPDX-License-Identifier: MIT ; PUBLIC probed_func_asm .code probed_func_asm PROC xor rax, rax cmp rcx, 0 jne $lNOT_ZERO mov rax, 2 $lNOT_ZERO: mov rax, 1 ret probed_func_asm ENDP end
12.380952
44
0.684615
8e40f578951271fdd6feacd393381d79f3864fc0
512
asm
Assembly
src/sub_idle.asm
retro16/blastsdk
572bd8489e6a2c1cc638120aa62241c99badc2e5
[ "MIT" ]
10
2017-01-14T16:22:58.000Z
2021-02-16T21:41:48.000Z
src/sub_idle.asm
retro16/blastsdk
572bd8489e6a2c1cc638120aa62241c99badc2e5
[ "MIT" ]
null
null
null
src/sub_idle.asm
retro16/blastsdk
572bd8489e6a2c1cc638120aa62241c99badc2e5
[ "MIT" ]
null
null
null
if TARGET == TARGET_SCD1 || TARGET == TARGET_SCD2 include blsload_sub.inc include cdbios.inc include bdp_sub.inc SP_INIT clr.b GA_COMMFLAGS_SUB set_wram_default_mode sync_main_sub rts SP_MAIN .1 bra.b .1 ; Endless loop SUB_INT_LEVEL2 blsload_check_main rts endif ; vim: ts=8 sw=8 sts=8 et
21.333333
62
0.455078
94017752f6c8f2eb1edbc86fb8ef623bd03e60b8
4,893
asm
Assembly
asm_code64/asm_code.asm
stolenbytes/apcforthewin
d750972ff35853bc645bcf8eef6f9df712388274
[ "MIT" ]
16
2017-09-05T14:59:09.000Z
2020-08-05T13:50:06.000Z
asm_code64/asm_code.asm
stolenbytes/apcforthewin
d750972ff35853bc645bcf8eef6f9df712388274
[ "MIT" ]
1
2017-09-05T22:46:41.000Z
2017-09-06T10:11:59.000Z
asm_code64/asm_code.asm
stolenbytes/apcforthewin
d750972ff35853bc645bcf8eef6f9df712388274
[ "MIT" ]
9
2017-09-05T16:22:54.000Z
2020-08-05T13:50:09.000Z
include pe64.inc .code public ExportShellcode ExportShellcode: mov dword ptr[rcx], shellcode_end - shellcode mov rax, offset shellcode ret shellcode: ;int 3 ;align and create shadow stack right away... sub rsp, 28h ;is there ActivationContextStack ?? cmp qword ptr gs:[02c8h], 0 jne __noactivation_needed ;Nope, create one... ;by calling ntdll!RtlAllocateActivationContextStack mov ecx, 00135A08Ah call get_api_mshash test rax, rax jz __noactivation_needed mov rcx, qword ptr gs:[030h] lea rcx, [rcx+02c8h] call rax __noactivation_needed: mov ecx, 0BC4DA2A8h call get_api_mshash xor r9, r9 lea r8, msgtitle lea rdx, msgtext xor rcx, rcx call rax add rsp, 28h ret msgtext db "All ok injection worked...", 0 msgtitle db "oki...", 0 get_api_mshash: push rsi push rbx push rdi mov rbx, rcx mov rsi, qword ptr gs:[60h] mov rsi, qword ptr [rsi+018h] lea rdi, qword ptr [rsi+30h] mov rsi, qword ptr [rsi+30h] __loop_api1: cmp rdi, rsi je __exit_gam mov rdx, rbx mov rcx, qword ptr[rsi+10h] call getprocaddress mov rsi, qword ptr[rsi] test rax, rax jz __loop_api1 __exit_gam: pop rdi pop rbx pop rsi ret getprocaddress: push rsi xor rax, rax test rcx, rcx jz __exit_gpa mov r8, rcx mov r9, rdx mov eax, dword ptr[r8+3ch] add rax, r8 mov eax, dword ptr[rax.peheader64.pe_export] test eax, eax jz __exit_gpa add rax, r8 mov r10, rax xor rcx, rcx mov r11d, dword ptr[r10.export_directory.ed_addressofnames] add r11, r8 __loop_names: mov esi, dword ptr[r11] add rsi, r8 xor rax, rax cdq __get_hash: lodsb test al, al jz __cmphash ror edx, 0dh add edx, eax jmp __get_hash __cmphash: cmp r9d, edx jz __get_api add r11, 4 inc ecx cmp ecx, dword ptr[r10.export_directory.ed_numberofnames] jne __loop_names xor eax, eax jmp __exit_gpa __get_api: mov eax, dword ptr[r10.export_directory.ed_addressofordinals] add rax, r8 movzx eax, word ptr[rax+rcx*2] mov ecx, dword ptr[r10.export_directory.ed_addressoffunctions] add rcx, r8 mov eax, dword ptr[rcx+rax*4] add rax, r8 __exit_gpa: pop rsi ret shellcode_end: end
40.438017
103
0.315144
1eed36ca727c341484d2e3b6d2423db6265483ed
43,386
asm
Assembly
procspawn.asm
cherry-99/IOS-Lab
8b23ceafdabb9d27e0a180f46fc65f0c333454a4
[ "MIT-0" ]
null
null
null
procspawn.asm
cherry-99/IOS-Lab
8b23ceafdabb9d27e0a180f46fc65f0c333454a4
[ "MIT-0" ]
null
null
null
procspawn.asm
cherry-99/IOS-Lab
8b23ceafdabb9d27e0a180f46fc65f0c333454a4
[ "MIT-0" ]
null
null
null
_procspawn: file format elf32-i386 Disassembly of section .text: 00000000 <main>: #include "user.h" #include "fcntl.h" int main(int argc, char *argv[]) { 0: 8d 4c 24 04 lea 0x4(%esp),%ecx 4: 83 e4 f0 and $0xfffffff0,%esp 7: ff 71 fc pushl -0x4(%ecx) a: 55 push %ebp b: 89 e5 mov %esp,%ebp d: 56 push %esi e: 53 push %ebx f: 51 push %ecx 10: 83 ec 0c sub $0xc,%esp 13: 8b 19 mov (%ecx),%ebx 15: 8b 71 04 mov 0x4(%ecx),%esi int k, n, id; double x=0, z=0, y=0; printf(1, "Parent: %d\n", getpid()); 18: e8 05 04 00 00 call 422 <getpid> 1d: 83 ec 04 sub $0x4,%esp 20: 50 push %eax 21: 68 20 08 00 00 push $0x820 26: 6a 01 push $0x1 28: e8 d3 04 00 00 call 500 <printf> if(argc < 2) 2d: 83 c4 10 add $0x10,%esp 30: 83 fb 01 cmp $0x1,%ebx 33: 0f 8e 04 01 00 00 jle 13d <main+0x13d> n=1; else n = atoi(argv[1]); 39: 83 ec 0c sub $0xc,%esp 3c: ff 76 04 pushl 0x4(%esi) 3f: e8 ec 02 00 00 call 330 <atoi> if (n<0 || n>20) 44: 83 c4 10 add $0x10,%esp 47: 83 f8 14 cmp $0x14,%eax printf(1, "Parent: %d\n", getpid()); if(argc < 2) n=1; else n = atoi(argv[1]); 4a: 89 c6 mov %eax,%esi if (n<0 || n>20) 4c: 0f 86 f5 00 00 00 jbe 147 <main+0x147> n=2; 52: be 02 00 00 00 mov $0x2,%esi 57: 31 db xor %ebx,%ebx 59: eb 25 jmp 80 <main+0x80> 5b: 90 nop 5c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi exit(); } else if(id > 0) printf(1, "Parent created %d\n", id); else if(id < 0) printf(1, "Fork Failed\n"); 60: 83 ec 08 sub $0x8,%esp n = atoi(argv[1]); if (n<0 || n>20) n=2; x=0; id=0; for(k=0; k<n; k++){ 63: 83 c3 01 add $0x1,%ebx exit(); } else if(id > 0) printf(1, "Parent created %d\n", id); else if(id < 0) printf(1, "Fork Failed\n"); 66: 68 67 08 00 00 push $0x867 6b: 6a 01 push $0x1 6d: e8 8e 04 00 00 call 500 <printf> 72: 83 c4 10 add $0x10,%esp n = atoi(argv[1]); if (n<0 || n>20) n=2; x=0; id=0; for(k=0; k<n; k++){ 75: 39 de cmp %ebx,%esi 77: 7e 2d jle a6 <main+0xa6> 79: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi id = fork(); 80: e8 15 03 00 00 call 39a <fork> if(id==0){ 85: 83 f8 00 cmp $0x0,%eax 88: 74 4a je d4 <main+0xd4> } } printf(1, "Child completed %d\n", getpid()); exit(); } else if(id > 0) 8a: 7e d4 jle 60 <main+0x60> printf(1, "Parent created %d\n", id); 8c: 83 ec 04 sub $0x4,%esp n = atoi(argv[1]); if (n<0 || n>20) n=2; x=0; id=0; for(k=0; k<n; k++){ 8f: 83 c3 01 add $0x1,%ebx } printf(1, "Child completed %d\n", getpid()); exit(); } else if(id > 0) printf(1, "Parent created %d\n", id); 92: 50 push %eax 93: 68 54 08 00 00 push $0x854 98: 6a 01 push $0x1 9a: e8 61 04 00 00 call 500 <printf> 9f: 83 c4 10 add $0x10,%esp n = atoi(argv[1]); if (n<0 || n>20) n=2; x=0; id=0; for(k=0; k<n; k++){ a2: 39 de cmp %ebx,%esi a4: 7f da jg 80 <main+0x80> else if(id > 0) printf(1, "Parent created %d\n", id); else if(id < 0) printf(1, "Fork Failed\n"); } cps(); a6: 31 db xor %ebx,%ebx a8: e8 95 03 00 00 call 442 <cps> ad: 8d 76 00 lea 0x0(%esi),%esi for(k=0; k<n; k++) { printf(1, "W%d\n", k); b0: 83 ec 04 sub $0x4,%esp b3: 53 push %ebx b4: 68 74 08 00 00 push $0x874 printf(1, "Parent created %d\n", id); else if(id < 0) printf(1, "Fork Failed\n"); } cps(); for(k=0; k<n; k++) b9: 83 c3 01 add $0x1,%ebx { printf(1, "W%d\n", k); bc: 6a 01 push $0x1 be: e8 3d 04 00 00 call 500 <printf> wait(); c3: e8 e2 02 00 00 call 3aa <wait> printf(1, "Parent created %d\n", id); else if(id < 0) printf(1, "Fork Failed\n"); } cps(); for(k=0; k<n; k++) c8: 83 c4 10 add $0x10,%esp cb: 39 de cmp %ebx,%esi cd: 7f e1 jg b0 <main+0xb0> { printf(1, "W%d\n", k); wait(); } exit(); cf: e8 ce 02 00 00 call 3a2 <exit> x=0; id=0; for(k=0; k<n; k++){ id = fork(); if(id==0){ printf(1, "Child process %d\n", getpid()); d4: e8 49 03 00 00 call 422 <getpid> d9: 51 push %ecx da: 50 push %eax db: bb 28 00 00 00 mov $0x28,%ebx e0: 68 2c 08 00 00 push $0x82c e5: 6a 01 push $0x1 e7: e8 14 04 00 00 call 500 <printf> ec: 83 c4 10 add $0x10,%esp ef: 90 nop for(y=0; y<4; y+=0.1){ printf(1, "."); f0: 83 ec 08 sub $0x8,%esp f3: 68 3e 08 00 00 push $0x83e f8: 6a 01 push $0x1 fa: e8 01 04 00 00 call 500 <printf> for(x=0; x<40000.0; x+=0.1){ ff: d9 ee fldz id = fork(); if(id==0){ printf(1, "Child process %d\n", getpid()); for(y=0; y<4; y+=0.1){ printf(1, "."); 101: 83 c4 10 add $0x10,%esp for(x=0; x<40000.0; x+=0.1){ 104: dd 05 80 08 00 00 fldl 0x880 10a: 8d b6 00 00 00 00 lea 0x0(%esi),%esi 110: dc c1 fadd %st,%st(1) 112: d9 05 88 08 00 00 flds 0x888 118: df ea fucomip %st(2),%st 11a: 77 f4 ja 110 <main+0x110> 11c: dd d8 fstp %st(0) 11e: dd d8 fstp %st(0) for(k=0; k<n; k++){ id = fork(); if(id==0){ printf(1, "Child process %d\n", getpid()); for(y=0; y<4; y+=0.1){ 120: 83 eb 01 sub $0x1,%ebx 123: 75 cb jne f0 <main+0xf0> printf(1, "."); for(x=0; x<40000.0; x+=0.1){ z+=x; } } printf(1, "Child completed %d\n", getpid()); 125: e8 f8 02 00 00 call 422 <getpid> 12a: 52 push %edx 12b: 50 push %eax 12c: 68 40 08 00 00 push $0x840 131: 6a 01 push $0x1 133: e8 c8 03 00 00 call 500 <printf> exit(); 138: e8 65 02 00 00 call 3a2 <exit> double x=0, z=0, y=0; printf(1, "Parent: %d\n", getpid()); if(argc < 2) n=1; 13d: be 01 00 00 00 mov $0x1,%esi 142: e9 10 ff ff ff jmp 57 <main+0x57> n = atoi(argv[1]); if (n<0 || n>20) n=2; x=0; id=0; for(k=0; k<n; k++){ 147: 85 c0 test %eax,%eax 149: 0f 85 08 ff ff ff jne 57 <main+0x57> else if(id > 0) printf(1, "Parent created %d\n", id); else if(id < 0) printf(1, "Fork Failed\n"); } cps(); 14f: e8 ee 02 00 00 call 442 <cps> 154: e9 76 ff ff ff jmp cf <main+0xcf> 159: 66 90 xchg %ax,%ax 15b: 66 90 xchg %ax,%ax 15d: 66 90 xchg %ax,%ax 15f: 90 nop 00000160 <strcpy>: 160: 55 push %ebp 161: 89 e5 mov %esp,%ebp 163: 53 push %ebx 164: 8b 45 08 mov 0x8(%ebp),%eax 167: 8b 4d 0c mov 0xc(%ebp),%ecx 16a: 89 c2 mov %eax,%edx 16c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi 170: 83 c1 01 add $0x1,%ecx 173: 0f b6 59 ff movzbl -0x1(%ecx),%ebx 177: 83 c2 01 add $0x1,%edx 17a: 84 db test %bl,%bl 17c: 88 5a ff mov %bl,-0x1(%edx) 17f: 75 ef jne 170 <strcpy+0x10> 181: 5b pop %ebx 182: 5d pop %ebp 183: c3 ret 184: 8d b6 00 00 00 00 lea 0x0(%esi),%esi 18a: 8d bf 00 00 00 00 lea 0x0(%edi),%edi 00000190 <strcmp>: 190: 55 push %ebp 191: 89 e5 mov %esp,%ebp 193: 56 push %esi 194: 53 push %ebx 195: 8b 55 08 mov 0x8(%ebp),%edx 198: 8b 4d 0c mov 0xc(%ebp),%ecx 19b: 0f b6 02 movzbl (%edx),%eax 19e: 0f b6 19 movzbl (%ecx),%ebx 1a1: 84 c0 test %al,%al 1a3: 75 1e jne 1c3 <strcmp+0x33> 1a5: eb 29 jmp 1d0 <strcmp+0x40> 1a7: 89 f6 mov %esi,%esi 1a9: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi 1b0: 83 c2 01 add $0x1,%edx 1b3: 0f b6 02 movzbl (%edx),%eax 1b6: 8d 71 01 lea 0x1(%ecx),%esi 1b9: 0f b6 59 01 movzbl 0x1(%ecx),%ebx 1bd: 84 c0 test %al,%al 1bf: 74 0f je 1d0 <strcmp+0x40> 1c1: 89 f1 mov %esi,%ecx 1c3: 38 d8 cmp %bl,%al 1c5: 74 e9 je 1b0 <strcmp+0x20> 1c7: 29 d8 sub %ebx,%eax 1c9: 5b pop %ebx 1ca: 5e pop %esi 1cb: 5d pop %ebp 1cc: c3 ret 1cd: 8d 76 00 lea 0x0(%esi),%esi 1d0: 31 c0 xor %eax,%eax 1d2: 29 d8 sub %ebx,%eax 1d4: 5b pop %ebx 1d5: 5e pop %esi 1d6: 5d pop %ebp 1d7: c3 ret 1d8: 90 nop 1d9: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi 000001e0 <strlen>: 1e0: 55 push %ebp 1e1: 89 e5 mov %esp,%ebp 1e3: 8b 4d 08 mov 0x8(%ebp),%ecx 1e6: 80 39 00 cmpb $0x0,(%ecx) 1e9: 74 12 je 1fd <strlen+0x1d> 1eb: 31 d2 xor %edx,%edx 1ed: 8d 76 00 lea 0x0(%esi),%esi 1f0: 83 c2 01 add $0x1,%edx 1f3: 80 3c 11 00 cmpb $0x0,(%ecx,%edx,1) 1f7: 89 d0 mov %edx,%eax 1f9: 75 f5 jne 1f0 <strlen+0x10> 1fb: 5d pop %ebp 1fc: c3 ret 1fd: 31 c0 xor %eax,%eax 1ff: 5d pop %ebp 200: c3 ret 201: eb 0d jmp 210 <memset> 203: 90 nop 204: 90 nop 205: 90 nop 206: 90 nop 207: 90 nop 208: 90 nop 209: 90 nop 20a: 90 nop 20b: 90 nop 20c: 90 nop 20d: 90 nop 20e: 90 nop 20f: 90 nop 00000210 <memset>: 210: 55 push %ebp 211: 89 e5 mov %esp,%ebp 213: 57 push %edi 214: 8b 55 08 mov 0x8(%ebp),%edx 217: 8b 4d 10 mov 0x10(%ebp),%ecx 21a: 8b 45 0c mov 0xc(%ebp),%eax 21d: 89 d7 mov %edx,%edi 21f: fc cld 220: f3 aa rep stos %al,%es:(%edi) 222: 89 d0 mov %edx,%eax 224: 5f pop %edi 225: 5d pop %ebp 226: c3 ret 227: 89 f6 mov %esi,%esi 229: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi 00000230 <strchr>: 230: 55 push %ebp 231: 89 e5 mov %esp,%ebp 233: 53 push %ebx 234: 8b 45 08 mov 0x8(%ebp),%eax 237: 8b 5d 0c mov 0xc(%ebp),%ebx 23a: 0f b6 10 movzbl (%eax),%edx 23d: 84 d2 test %dl,%dl 23f: 74 1d je 25e <strchr+0x2e> 241: 38 d3 cmp %dl,%bl 243: 89 d9 mov %ebx,%ecx 245: 75 0d jne 254 <strchr+0x24> 247: eb 17 jmp 260 <strchr+0x30> 249: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi 250: 38 ca cmp %cl,%dl 252: 74 0c je 260 <strchr+0x30> 254: 83 c0 01 add $0x1,%eax 257: 0f b6 10 movzbl (%eax),%edx 25a: 84 d2 test %dl,%dl 25c: 75 f2 jne 250 <strchr+0x20> 25e: 31 c0 xor %eax,%eax 260: 5b pop %ebx 261: 5d pop %ebp 262: c3 ret 263: 8d b6 00 00 00 00 lea 0x0(%esi),%esi 269: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi 00000270 <gets>: 270: 55 push %ebp 271: 89 e5 mov %esp,%ebp 273: 57 push %edi 274: 56 push %esi 275: 53 push %ebx 276: 31 f6 xor %esi,%esi 278: 8d 7d e7 lea -0x19(%ebp),%edi 27b: 83 ec 1c sub $0x1c,%esp 27e: eb 29 jmp 2a9 <gets+0x39> 280: 83 ec 04 sub $0x4,%esp 283: 6a 01 push $0x1 285: 57 push %edi 286: 6a 00 push $0x0 288: e8 2d 01 00 00 call 3ba <read> 28d: 83 c4 10 add $0x10,%esp 290: 85 c0 test %eax,%eax 292: 7e 1d jle 2b1 <gets+0x41> 294: 0f b6 45 e7 movzbl -0x19(%ebp),%eax 298: 8b 55 08 mov 0x8(%ebp),%edx 29b: 89 de mov %ebx,%esi 29d: 3c 0a cmp $0xa,%al 29f: 88 44 1a ff mov %al,-0x1(%edx,%ebx,1) 2a3: 74 1b je 2c0 <gets+0x50> 2a5: 3c 0d cmp $0xd,%al 2a7: 74 17 je 2c0 <gets+0x50> 2a9: 8d 5e 01 lea 0x1(%esi),%ebx 2ac: 3b 5d 0c cmp 0xc(%ebp),%ebx 2af: 7c cf jl 280 <gets+0x10> 2b1: 8b 45 08 mov 0x8(%ebp),%eax 2b4: c6 04 30 00 movb $0x0,(%eax,%esi,1) 2b8: 8d 65 f4 lea -0xc(%ebp),%esp 2bb: 5b pop %ebx 2bc: 5e pop %esi 2bd: 5f pop %edi 2be: 5d pop %ebp 2bf: c3 ret 2c0: 8b 45 08 mov 0x8(%ebp),%eax 2c3: 89 de mov %ebx,%esi 2c5: c6 04 30 00 movb $0x0,(%eax,%esi,1) 2c9: 8d 65 f4 lea -0xc(%ebp),%esp 2cc: 5b pop %ebx 2cd: 5e pop %esi 2ce: 5f pop %edi 2cf: 5d pop %ebp 2d0: c3 ret 2d1: eb 0d jmp 2e0 <stat> 2d3: 90 nop 2d4: 90 nop 2d5: 90 nop 2d6: 90 nop 2d7: 90 nop 2d8: 90 nop 2d9: 90 nop 2da: 90 nop 2db: 90 nop 2dc: 90 nop 2dd: 90 nop 2de: 90 nop 2df: 90 nop 000002e0 <stat>: 2e0: 55 push %ebp 2e1: 89 e5 mov %esp,%ebp 2e3: 56 push %esi 2e4: 53 push %ebx 2e5: 83 ec 08 sub $0x8,%esp 2e8: 6a 00 push $0x0 2ea: ff 75 08 pushl 0x8(%ebp) 2ed: e8 f0 00 00 00 call 3e2 <open> 2f2: 83 c4 10 add $0x10,%esp 2f5: 85 c0 test %eax,%eax 2f7: 78 27 js 320 <stat+0x40> 2f9: 83 ec 08 sub $0x8,%esp 2fc: ff 75 0c pushl 0xc(%ebp) 2ff: 89 c3 mov %eax,%ebx 301: 50 push %eax 302: e8 f3 00 00 00 call 3fa <fstat> 307: 89 c6 mov %eax,%esi 309: 89 1c 24 mov %ebx,(%esp) 30c: e8 b9 00 00 00 call 3ca <close> 311: 83 c4 10 add $0x10,%esp 314: 89 f0 mov %esi,%eax 316: 8d 65 f8 lea -0x8(%ebp),%esp 319: 5b pop %ebx 31a: 5e pop %esi 31b: 5d pop %ebp 31c: c3 ret 31d: 8d 76 00 lea 0x0(%esi),%esi 320: b8 ff ff ff ff mov $0xffffffff,%eax 325: eb ef jmp 316 <stat+0x36> 327: 89 f6 mov %esi,%esi 329: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi 00000330 <atoi>: 330: 55 push %ebp 331: 89 e5 mov %esp,%ebp 333: 53 push %ebx 334: 8b 4d 08 mov 0x8(%ebp),%ecx 337: 0f be 11 movsbl (%ecx),%edx 33a: 8d 42 d0 lea -0x30(%edx),%eax 33d: 3c 09 cmp $0x9,%al 33f: b8 00 00 00 00 mov $0x0,%eax 344: 77 1f ja 365 <atoi+0x35> 346: 8d 76 00 lea 0x0(%esi),%esi 349: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi 350: 8d 04 80 lea (%eax,%eax,4),%eax 353: 83 c1 01 add $0x1,%ecx 356: 8d 44 42 d0 lea -0x30(%edx,%eax,2),%eax 35a: 0f be 11 movsbl (%ecx),%edx 35d: 8d 5a d0 lea -0x30(%edx),%ebx 360: 80 fb 09 cmp $0x9,%bl 363: 76 eb jbe 350 <atoi+0x20> 365: 5b pop %ebx 366: 5d pop %ebp 367: c3 ret 368: 90 nop 369: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi 00000370 <memmove>: 370: 55 push %ebp 371: 89 e5 mov %esp,%ebp 373: 56 push %esi 374: 53 push %ebx 375: 8b 5d 10 mov 0x10(%ebp),%ebx 378: 8b 45 08 mov 0x8(%ebp),%eax 37b: 8b 75 0c mov 0xc(%ebp),%esi 37e: 85 db test %ebx,%ebx 380: 7e 14 jle 396 <memmove+0x26> 382: 31 d2 xor %edx,%edx 384: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi 388: 0f b6 0c 16 movzbl (%esi,%edx,1),%ecx 38c: 88 0c 10 mov %cl,(%eax,%edx,1) 38f: 83 c2 01 add $0x1,%edx 392: 39 da cmp %ebx,%edx 394: 75 f2 jne 388 <memmove+0x18> 396: 5b pop %ebx 397: 5e pop %esi 398: 5d pop %ebp 399: c3 ret 0000039a <fork>: 39a: b8 01 00 00 00 mov $0x1,%eax 39f: cd 40 int $0x40 3a1: c3 ret 000003a2 <exit>: 3a2: b8 02 00 00 00 mov $0x2,%eax 3a7: cd 40 int $0x40 3a9: c3 ret 000003aa <wait>: 3aa: b8 03 00 00 00 mov $0x3,%eax 3af: cd 40 int $0x40 3b1: c3 ret 000003b2 <pipe>: 3b2: b8 04 00 00 00 mov $0x4,%eax 3b7: cd 40 int $0x40 3b9: c3 ret 000003ba <read>: 3ba: b8 05 00 00 00 mov $0x5,%eax 3bf: cd 40 int $0x40 3c1: c3 ret 000003c2 <write>: 3c2: b8 10 00 00 00 mov $0x10,%eax 3c7: cd 40 int $0x40 3c9: c3 ret 000003ca <close>: 3ca: b8 15 00 00 00 mov $0x15,%eax 3cf: cd 40 int $0x40 3d1: c3 ret 000003d2 <kill>: 3d2: b8 06 00 00 00 mov $0x6,%eax 3d7: cd 40 int $0x40 3d9: c3 ret 000003da <exec>: 3da: b8 07 00 00 00 mov $0x7,%eax 3df: cd 40 int $0x40 3e1: c3 ret 000003e2 <open>: 3e2: b8 0f 00 00 00 mov $0xf,%eax 3e7: cd 40 int $0x40 3e9: c3 ret 000003ea <mknod>: 3ea: b8 11 00 00 00 mov $0x11,%eax 3ef: cd 40 int $0x40 3f1: c3 ret 000003f2 <unlink>: 3f2: b8 12 00 00 00 mov $0x12,%eax 3f7: cd 40 int $0x40 3f9: c3 ret 000003fa <fstat>: 3fa: b8 08 00 00 00 mov $0x8,%eax 3ff: cd 40 int $0x40 401: c3 ret 00000402 <link>: 402: b8 13 00 00 00 mov $0x13,%eax 407: cd 40 int $0x40 409: c3 ret 0000040a <mkdir>: 40a: b8 14 00 00 00 mov $0x14,%eax 40f: cd 40 int $0x40 411: c3 ret 00000412 <chdir>: 412: b8 09 00 00 00 mov $0x9,%eax 417: cd 40 int $0x40 419: c3 ret 0000041a <dup>: 41a: b8 0a 00 00 00 mov $0xa,%eax 41f: cd 40 int $0x40 421: c3 ret 00000422 <getpid>: 422: b8 0b 00 00 00 mov $0xb,%eax 427: cd 40 int $0x40 429: c3 ret 0000042a <sbrk>: 42a: b8 0c 00 00 00 mov $0xc,%eax 42f: cd 40 int $0x40 431: c3 ret 00000432 <sleep>: 432: b8 0d 00 00 00 mov $0xd,%eax 437: cd 40 int $0x40 439: c3 ret 0000043a <uptime>: 43a: b8 0e 00 00 00 mov $0xe,%eax 43f: cd 40 int $0x40 441: c3 ret 00000442 <cps>: 442: b8 16 00 00 00 mov $0x16,%eax 447: cd 40 int $0x40 449: c3 ret 0000044a <chpr>: 44a: b8 17 00 00 00 mov $0x17,%eax 44f: cd 40 int $0x40 451: c3 ret 452: 66 90 xchg %ax,%ax 454: 66 90 xchg %ax,%ax 456: 66 90 xchg %ax,%ax 458: 66 90 xchg %ax,%ax 45a: 66 90 xchg %ax,%ax 45c: 66 90 xchg %ax,%ax 45e: 66 90 xchg %ax,%ax 00000460 <printint>: write(fd, &c, 1); } static void printint(int fd, int xx, int base, int sgn) { 460: 55 push %ebp 461: 89 e5 mov %esp,%ebp 463: 57 push %edi 464: 56 push %esi 465: 53 push %ebx 466: 89 c6 mov %eax,%esi 468: 83 ec 3c sub $0x3c,%esp char buf[16]; int i, neg; uint x; neg = 0; if(sgn && xx < 0){ 46b: 8b 5d 08 mov 0x8(%ebp),%ebx 46e: 85 db test %ebx,%ebx 470: 74 7e je 4f0 <printint+0x90> 472: 89 d0 mov %edx,%eax 474: c1 e8 1f shr $0x1f,%eax 477: 84 c0 test %al,%al 479: 74 75 je 4f0 <printint+0x90> neg = 1; x = -xx; 47b: 89 d0 mov %edx,%eax int i, neg; uint x; neg = 0; if(sgn && xx < 0){ neg = 1; 47d: c7 45 c4 01 00 00 00 movl $0x1,-0x3c(%ebp) x = -xx; 484: f7 d8 neg %eax 486: 89 75 c0 mov %esi,-0x40(%ebp) } else { x = xx; } i = 0; 489: 31 ff xor %edi,%edi 48b: 8d 5d d7 lea -0x29(%ebp),%ebx 48e: 89 ce mov %ecx,%esi 490: eb 08 jmp 49a <printint+0x3a> 492: 8d b6 00 00 00 00 lea 0x0(%esi),%esi do{ buf[i++] = digits[x % base]; 498: 89 cf mov %ecx,%edi 49a: 31 d2 xor %edx,%edx 49c: 8d 4f 01 lea 0x1(%edi),%ecx 49f: f7 f6 div %esi 4a1: 0f b6 92 94 08 00 00 movzbl 0x894(%edx),%edx }while((x /= base) != 0); 4a8: 85 c0 test %eax,%eax x = xx; } i = 0; do{ buf[i++] = digits[x % base]; 4aa: 88 14 0b mov %dl,(%ebx,%ecx,1) }while((x /= base) != 0); 4ad: 75 e9 jne 498 <printint+0x38> if(neg) 4af: 8b 45 c4 mov -0x3c(%ebp),%eax 4b2: 8b 75 c0 mov -0x40(%ebp),%esi 4b5: 85 c0 test %eax,%eax 4b7: 74 08 je 4c1 <printint+0x61> buf[i++] = '-'; 4b9: c6 44 0d d8 2d movb $0x2d,-0x28(%ebp,%ecx,1) 4be: 8d 4f 02 lea 0x2(%edi),%ecx 4c1: 8d 7c 0d d7 lea -0x29(%ebp,%ecx,1),%edi 4c5: 8d 76 00 lea 0x0(%esi),%esi 4c8: 0f b6 07 movzbl (%edi),%eax #include "user.h" static void putc(int fd, char c) { write(fd, &c, 1); 4cb: 83 ec 04 sub $0x4,%esp 4ce: 83 ef 01 sub $0x1,%edi 4d1: 6a 01 push $0x1 4d3: 53 push %ebx 4d4: 56 push %esi 4d5: 88 45 d7 mov %al,-0x29(%ebp) 4d8: e8 e5 fe ff ff call 3c2 <write> buf[i++] = digits[x % base]; }while((x /= base) != 0); if(neg) buf[i++] = '-'; while(--i >= 0) 4dd: 83 c4 10 add $0x10,%esp 4e0: 39 df cmp %ebx,%edi 4e2: 75 e4 jne 4c8 <printint+0x68> putc(fd, buf[i]); } 4e4: 8d 65 f4 lea -0xc(%ebp),%esp 4e7: 5b pop %ebx 4e8: 5e pop %esi 4e9: 5f pop %edi 4ea: 5d pop %ebp 4eb: c3 ret 4ec: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi neg = 0; if(sgn && xx < 0){ neg = 1; x = -xx; } else { x = xx; 4f0: 89 d0 mov %edx,%eax static char digits[] = "0123456789ABCDEF"; char buf[16]; int i, neg; uint x; neg = 0; 4f2: c7 45 c4 00 00 00 00 movl $0x0,-0x3c(%ebp) 4f9: eb 8b jmp 486 <printint+0x26> 4fb: 90 nop 4fc: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi 00000500 <printf>: } // Print to the given fd. Only understands %d, %x, %p, %s. void printf(int fd, const char *fmt, ...) { 500: 55 push %ebp 501: 89 e5 mov %esp,%ebp 503: 57 push %edi 504: 56 push %esi 505: 53 push %ebx int c, i, state; uint *ap; state = 0; ap = (uint*)(void*)&fmt + 1; for(i = 0; fmt[i]; i++){ 506: 8d 45 10 lea 0x10(%ebp),%eax } // Print to the given fd. Only understands %d, %x, %p, %s. void printf(int fd, const char *fmt, ...) { 509: 83 ec 2c sub $0x2c,%esp int c, i, state; uint *ap; state = 0; ap = (uint*)(void*)&fmt + 1; for(i = 0; fmt[i]; i++){ 50c: 8b 75 0c mov 0xc(%ebp),%esi } // Print to the given fd. Only understands %d, %x, %p, %s. void printf(int fd, const char *fmt, ...) { 50f: 8b 7d 08 mov 0x8(%ebp),%edi int c, i, state; uint *ap; state = 0; ap = (uint*)(void*)&fmt + 1; for(i = 0; fmt[i]; i++){ 512: 89 45 d0 mov %eax,-0x30(%ebp) 515: 0f b6 1e movzbl (%esi),%ebx 518: 83 c6 01 add $0x1,%esi 51b: 84 db test %bl,%bl 51d: 0f 84 b0 00 00 00 je 5d3 <printf+0xd3> 523: 31 d2 xor %edx,%edx 525: eb 39 jmp 560 <printf+0x60> 527: 89 f6 mov %esi,%esi 529: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi c = fmt[i] & 0xff; if(state == 0){ if(c == '%'){ 530: 83 f8 25 cmp $0x25,%eax 533: 89 55 d4 mov %edx,-0x2c(%ebp) state = '%'; 536: ba 25 00 00 00 mov $0x25,%edx state = 0; ap = (uint*)(void*)&fmt + 1; for(i = 0; fmt[i]; i++){ c = fmt[i] & 0xff; if(state == 0){ if(c == '%'){ 53b: 74 18 je 555 <printf+0x55> #include "user.h" static void putc(int fd, char c) { write(fd, &c, 1); 53d: 8d 45 e2 lea -0x1e(%ebp),%eax 540: 83 ec 04 sub $0x4,%esp 543: 88 5d e2 mov %bl,-0x1e(%ebp) 546: 6a 01 push $0x1 548: 50 push %eax 549: 57 push %edi 54a: e8 73 fe ff ff call 3c2 <write> 54f: 8b 55 d4 mov -0x2c(%ebp),%edx 552: 83 c4 10 add $0x10,%esp 555: 83 c6 01 add $0x1,%esi int c, i, state; uint *ap; state = 0; ap = (uint*)(void*)&fmt + 1; for(i = 0; fmt[i]; i++){ 558: 0f b6 5e ff movzbl -0x1(%esi),%ebx 55c: 84 db test %bl,%bl 55e: 74 73 je 5d3 <printf+0xd3> c = fmt[i] & 0xff; if(state == 0){ 560: 85 d2 test %edx,%edx uint *ap; state = 0; ap = (uint*)(void*)&fmt + 1; for(i = 0; fmt[i]; i++){ c = fmt[i] & 0xff; 562: 0f be cb movsbl %bl,%ecx 565: 0f b6 c3 movzbl %bl,%eax if(state == 0){ 568: 74 c6 je 530 <printf+0x30> if(c == '%'){ state = '%'; } else { putc(fd, c); } } else if(state == '%'){ 56a: 83 fa 25 cmp $0x25,%edx 56d: 75 e6 jne 555 <printf+0x55> if(c == 'd'){ 56f: 83 f8 64 cmp $0x64,%eax 572: 0f 84 f8 00 00 00 je 670 <printf+0x170> printint(fd, *ap, 10, 1); ap++; } else if(c == 'x' || c == 'p'){ 578: 81 e1 f7 00 00 00 and $0xf7,%ecx 57e: 83 f9 70 cmp $0x70,%ecx 581: 74 5d je 5e0 <printf+0xe0> printint(fd, *ap, 16, 0); ap++; } else if(c == 's'){ 583: 83 f8 73 cmp $0x73,%eax 586: 0f 84 84 00 00 00 je 610 <printf+0x110> s = "(null)"; while(*s != 0){ putc(fd, *s); s++; } } else if(c == 'c'){ 58c: 83 f8 63 cmp $0x63,%eax 58f: 0f 84 ea 00 00 00 je 67f <printf+0x17f> putc(fd, *ap); ap++; } else if(c == '%'){ 595: 83 f8 25 cmp $0x25,%eax 598: 0f 84 c2 00 00 00 je 660 <printf+0x160> #include "user.h" static void putc(int fd, char c) { write(fd, &c, 1); 59e: 8d 45 e7 lea -0x19(%ebp),%eax 5a1: 83 ec 04 sub $0x4,%esp 5a4: c6 45 e7 25 movb $0x25,-0x19(%ebp) 5a8: 6a 01 push $0x1 5aa: 50 push %eax 5ab: 57 push %edi 5ac: e8 11 fe ff ff call 3c2 <write> 5b1: 83 c4 0c add $0xc,%esp 5b4: 8d 45 e6 lea -0x1a(%ebp),%eax 5b7: 88 5d e6 mov %bl,-0x1a(%ebp) 5ba: 6a 01 push $0x1 5bc: 50 push %eax 5bd: 57 push %edi 5be: 83 c6 01 add $0x1,%esi 5c1: e8 fc fd ff ff call 3c2 <write> int c, i, state; uint *ap; state = 0; ap = (uint*)(void*)&fmt + 1; for(i = 0; fmt[i]; i++){ 5c6: 0f b6 5e ff movzbl -0x1(%esi),%ebx #include "user.h" static void putc(int fd, char c) { write(fd, &c, 1); 5ca: 83 c4 10 add $0x10,%esp } else { // Unknown % sequence. Print it to draw attention. putc(fd, '%'); putc(fd, c); } state = 0; 5cd: 31 d2 xor %edx,%edx int c, i, state; uint *ap; state = 0; ap = (uint*)(void*)&fmt + 1; for(i = 0; fmt[i]; i++){ 5cf: 84 db test %bl,%bl 5d1: 75 8d jne 560 <printf+0x60> putc(fd, c); } state = 0; } } } 5d3: 8d 65 f4 lea -0xc(%ebp),%esp 5d6: 5b pop %ebx 5d7: 5e pop %esi 5d8: 5f pop %edi 5d9: 5d pop %ebp 5da: c3 ret 5db: 90 nop 5dc: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi } else if(state == '%'){ if(c == 'd'){ printint(fd, *ap, 10, 1); ap++; } else if(c == 'x' || c == 'p'){ printint(fd, *ap, 16, 0); 5e0: 83 ec 0c sub $0xc,%esp 5e3: b9 10 00 00 00 mov $0x10,%ecx 5e8: 6a 00 push $0x0 5ea: 8b 5d d0 mov -0x30(%ebp),%ebx 5ed: 89 f8 mov %edi,%eax 5ef: 8b 13 mov (%ebx),%edx 5f1: e8 6a fe ff ff call 460 <printint> ap++; 5f6: 89 d8 mov %ebx,%eax 5f8: 83 c4 10 add $0x10,%esp } else { // Unknown % sequence. Print it to draw attention. putc(fd, '%'); putc(fd, c); } state = 0; 5fb: 31 d2 xor %edx,%edx if(c == 'd'){ printint(fd, *ap, 10, 1); ap++; } else if(c == 'x' || c == 'p'){ printint(fd, *ap, 16, 0); ap++; 5fd: 83 c0 04 add $0x4,%eax 600: 89 45 d0 mov %eax,-0x30(%ebp) 603: e9 4d ff ff ff jmp 555 <printf+0x55> 608: 90 nop 609: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi } else if(c == 's'){ s = (char*)*ap; 610: 8b 45 d0 mov -0x30(%ebp),%eax 613: 8b 18 mov (%eax),%ebx ap++; 615: 83 c0 04 add $0x4,%eax 618: 89 45 d0 mov %eax,-0x30(%ebp) if(s == 0) s = "(null)"; 61b: b8 8c 08 00 00 mov $0x88c,%eax 620: 85 db test %ebx,%ebx 622: 0f 44 d8 cmove %eax,%ebx while(*s != 0){ 625: 0f b6 03 movzbl (%ebx),%eax 628: 84 c0 test %al,%al 62a: 74 23 je 64f <printf+0x14f> 62c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi 630: 88 45 e3 mov %al,-0x1d(%ebp) #include "user.h" static void putc(int fd, char c) { write(fd, &c, 1); 633: 8d 45 e3 lea -0x1d(%ebp),%eax 636: 83 ec 04 sub $0x4,%esp 639: 6a 01 push $0x1 ap++; if(s == 0) s = "(null)"; while(*s != 0){ putc(fd, *s); s++; 63b: 83 c3 01 add $0x1,%ebx #include "user.h" static void putc(int fd, char c) { write(fd, &c, 1); 63e: 50 push %eax 63f: 57 push %edi 640: e8 7d fd ff ff call 3c2 <write> } else if(c == 's'){ s = (char*)*ap; ap++; if(s == 0) s = "(null)"; while(*s != 0){ 645: 0f b6 03 movzbl (%ebx),%eax 648: 83 c4 10 add $0x10,%esp 64b: 84 c0 test %al,%al 64d: 75 e1 jne 630 <printf+0x130> } else { // Unknown % sequence. Print it to draw attention. putc(fd, '%'); putc(fd, c); } state = 0; 64f: 31 d2 xor %edx,%edx 651: e9 ff fe ff ff jmp 555 <printf+0x55> 656: 8d 76 00 lea 0x0(%esi),%esi 659: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi #include "user.h" static void putc(int fd, char c) { write(fd, &c, 1); 660: 83 ec 04 sub $0x4,%esp 663: 88 5d e5 mov %bl,-0x1b(%ebp) 666: 8d 45 e5 lea -0x1b(%ebp),%eax 669: 6a 01 push $0x1 66b: e9 4c ff ff ff jmp 5bc <printf+0xbc> } else { putc(fd, c); } } else if(state == '%'){ if(c == 'd'){ printint(fd, *ap, 10, 1); 670: 83 ec 0c sub $0xc,%esp 673: b9 0a 00 00 00 mov $0xa,%ecx 678: 6a 01 push $0x1 67a: e9 6b ff ff ff jmp 5ea <printf+0xea> 67f: 8b 5d d0 mov -0x30(%ebp),%ebx #include "user.h" static void putc(int fd, char c) { write(fd, &c, 1); 682: 83 ec 04 sub $0x4,%esp 685: 8b 03 mov (%ebx),%eax 687: 6a 01 push $0x1 689: 88 45 e4 mov %al,-0x1c(%ebp) 68c: 8d 45 e4 lea -0x1c(%ebp),%eax 68f: 50 push %eax 690: 57 push %edi 691: e8 2c fd ff ff call 3c2 <write> 696: e9 5b ff ff ff jmp 5f6 <printf+0xf6> 69b: 66 90 xchg %ax,%ax 69d: 66 90 xchg %ax,%ax 69f: 90 nop 000006a0 <free>: 6a0: 55 push %ebp 6a1: a1 34 0b 00 00 mov 0xb34,%eax 6a6: 89 e5 mov %esp,%ebp 6a8: 57 push %edi 6a9: 56 push %esi 6aa: 53 push %ebx 6ab: 8b 5d 08 mov 0x8(%ebp),%ebx 6ae: 8b 10 mov (%eax),%edx 6b0: 8d 4b f8 lea -0x8(%ebx),%ecx 6b3: 39 c8 cmp %ecx,%eax 6b5: 73 19 jae 6d0 <free+0x30> 6b7: 89 f6 mov %esi,%esi 6b9: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi 6c0: 39 d1 cmp %edx,%ecx 6c2: 72 1c jb 6e0 <free+0x40> 6c4: 39 d0 cmp %edx,%eax 6c6: 73 18 jae 6e0 <free+0x40> 6c8: 89 d0 mov %edx,%eax 6ca: 39 c8 cmp %ecx,%eax 6cc: 8b 10 mov (%eax),%edx 6ce: 72 f0 jb 6c0 <free+0x20> 6d0: 39 d0 cmp %edx,%eax 6d2: 72 f4 jb 6c8 <free+0x28> 6d4: 39 d1 cmp %edx,%ecx 6d6: 73 f0 jae 6c8 <free+0x28> 6d8: 90 nop 6d9: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi 6e0: 8b 73 fc mov -0x4(%ebx),%esi 6e3: 8d 3c f1 lea (%ecx,%esi,8),%edi 6e6: 39 d7 cmp %edx,%edi 6e8: 74 19 je 703 <free+0x63> 6ea: 89 53 f8 mov %edx,-0x8(%ebx) 6ed: 8b 50 04 mov 0x4(%eax),%edx 6f0: 8d 34 d0 lea (%eax,%edx,8),%esi 6f3: 39 f1 cmp %esi,%ecx 6f5: 74 23 je 71a <free+0x7a> 6f7: 89 08 mov %ecx,(%eax) 6f9: a3 34 0b 00 00 mov %eax,0xb34 6fe: 5b pop %ebx 6ff: 5e pop %esi 700: 5f pop %edi 701: 5d pop %ebp 702: c3 ret 703: 03 72 04 add 0x4(%edx),%esi 706: 89 73 fc mov %esi,-0x4(%ebx) 709: 8b 10 mov (%eax),%edx 70b: 8b 12 mov (%edx),%edx 70d: 89 53 f8 mov %edx,-0x8(%ebx) 710: 8b 50 04 mov 0x4(%eax),%edx 713: 8d 34 d0 lea (%eax,%edx,8),%esi 716: 39 f1 cmp %esi,%ecx 718: 75 dd jne 6f7 <free+0x57> 71a: 03 53 fc add -0x4(%ebx),%edx 71d: a3 34 0b 00 00 mov %eax,0xb34 722: 89 50 04 mov %edx,0x4(%eax) 725: 8b 53 f8 mov -0x8(%ebx),%edx 728: 89 10 mov %edx,(%eax) 72a: 5b pop %ebx 72b: 5e pop %esi 72c: 5f pop %edi 72d: 5d pop %ebp 72e: c3 ret 72f: 90 nop 00000730 <malloc>: 730: 55 push %ebp 731: 89 e5 mov %esp,%ebp 733: 57 push %edi 734: 56 push %esi 735: 53 push %ebx 736: 83 ec 0c sub $0xc,%esp 739: 8b 45 08 mov 0x8(%ebp),%eax 73c: 8b 15 34 0b 00 00 mov 0xb34,%edx 742: 8d 78 07 lea 0x7(%eax),%edi 745: c1 ef 03 shr $0x3,%edi 748: 83 c7 01 add $0x1,%edi 74b: 85 d2 test %edx,%edx 74d: 0f 84 a3 00 00 00 je 7f6 <malloc+0xc6> 753: 8b 02 mov (%edx),%eax 755: 8b 48 04 mov 0x4(%eax),%ecx 758: 39 cf cmp %ecx,%edi 75a: 76 74 jbe 7d0 <malloc+0xa0> 75c: 81 ff 00 10 00 00 cmp $0x1000,%edi 762: be 00 10 00 00 mov $0x1000,%esi 767: 8d 1c fd 00 00 00 00 lea 0x0(,%edi,8),%ebx 76e: 0f 43 f7 cmovae %edi,%esi 771: ba 00 80 00 00 mov $0x8000,%edx 776: 81 ff ff 0f 00 00 cmp $0xfff,%edi 77c: 0f 46 da cmovbe %edx,%ebx 77f: eb 10 jmp 791 <malloc+0x61> 781: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi 788: 8b 02 mov (%edx),%eax 78a: 8b 48 04 mov 0x4(%eax),%ecx 78d: 39 cf cmp %ecx,%edi 78f: 76 3f jbe 7d0 <malloc+0xa0> 791: 39 05 34 0b 00 00 cmp %eax,0xb34 797: 89 c2 mov %eax,%edx 799: 75 ed jne 788 <malloc+0x58> 79b: 83 ec 0c sub $0xc,%esp 79e: 53 push %ebx 79f: e8 86 fc ff ff call 42a <sbrk> 7a4: 83 c4 10 add $0x10,%esp 7a7: 83 f8 ff cmp $0xffffffff,%eax 7aa: 74 1c je 7c8 <malloc+0x98> 7ac: 89 70 04 mov %esi,0x4(%eax) 7af: 83 ec 0c sub $0xc,%esp 7b2: 83 c0 08 add $0x8,%eax 7b5: 50 push %eax 7b6: e8 e5 fe ff ff call 6a0 <free> 7bb: 8b 15 34 0b 00 00 mov 0xb34,%edx 7c1: 83 c4 10 add $0x10,%esp 7c4: 85 d2 test %edx,%edx 7c6: 75 c0 jne 788 <malloc+0x58> 7c8: 31 c0 xor %eax,%eax 7ca: eb 1c jmp 7e8 <malloc+0xb8> 7cc: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi 7d0: 39 cf cmp %ecx,%edi 7d2: 74 1c je 7f0 <malloc+0xc0> 7d4: 29 f9 sub %edi,%ecx 7d6: 89 48 04 mov %ecx,0x4(%eax) 7d9: 8d 04 c8 lea (%eax,%ecx,8),%eax 7dc: 89 78 04 mov %edi,0x4(%eax) 7df: 89 15 34 0b 00 00 mov %edx,0xb34 7e5: 83 c0 08 add $0x8,%eax 7e8: 8d 65 f4 lea -0xc(%ebp),%esp 7eb: 5b pop %ebx 7ec: 5e pop %esi 7ed: 5f pop %edi 7ee: 5d pop %ebp 7ef: c3 ret 7f0: 8b 08 mov (%eax),%ecx 7f2: 89 0a mov %ecx,(%edx) 7f4: eb e9 jmp 7df <malloc+0xaf> 7f6: c7 05 34 0b 00 00 38 movl $0xb38,0xb34 7fd: 0b 00 00 800: c7 05 38 0b 00 00 38 movl $0xb38,0xb38 807: 0b 00 00 80a: b8 38 0b 00 00 mov $0xb38,%eax 80f: c7 05 3c 0b 00 00 00 movl $0x0,0xb3c 816: 00 00 00 819: e9 3e ff ff ff jmp 75c <malloc+0x2c>
33.842434
59
0.40543
c48765f1260f1703c88850d04714e10cc5de0bde
809
asm
Assembly
oeis/185/A185828.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
11
2021-08-22T19:44:55.000Z
2022-03-20T16:47:57.000Z
oeis/185/A185828.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
9
2021-08-29T13:15:54.000Z
2022-03-09T19:52:31.000Z
oeis/185/A185828.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
3
2021-08-22T20:56:47.000Z
2021-09-29T06:26:12.000Z
; A185828: Half the number of n X 2 binary arrays with every element equal to exactly one or two of its horizontal and vertical neighbors. ; Submitted by Simon Strandgaard ; 1,3,10,23,61,162,421,1103,2890,7563,19801,51842,135721,355323,930250,2435423,6376021,16692642,43701901,114413063,299537290,784198803,2053059121,5374978562,14071876561,36840651123,96450076810,252509579303,661078661101,1730726404002,4531100550901,11862575248703,31056625195210,81307300336923,212865275815561,557288527109762,1459000305513721,3819712389431403,10000136862780490,26180698198910063,68541957733949701,179445175002939042,469793567274867421,1229935526821663223,3220013013190122250 mul $0,2 mov $1,$0 seq $1,199935 ; Size (b^3_n) of unit sphere in a certain graph (see Hazama article for precise definition). mov $0,$1 add $0,1
80.9
489
0.84178
1e3c34154b5844341c5fd0d7322ee4ec64f9fc8f
7,820
asm
Assembly
src/cpu/instr/daa.asm
Hacktix/sketchtests
cf3a3490f444b84b52420949e31e27340bd475d7
[ "MIT" ]
2
2020-08-26T19:07:24.000Z
2020-08-27T11:09:14.000Z
src/cpu/instr/daa.asm
Hacktix/sketchtests
cf3a3490f444b84b52420949e31e27340bd475d7
[ "MIT" ]
3
2020-08-26T21:52:28.000Z
2020-08-29T15:10:57.000Z
src/cpu/instr/daa.asm
Hacktix/sketchtests
cf3a3490f444b84b52420949e31e27340bd475d7
[ "MIT" ]
null
null
null
include "src/inc/hardware.inc" section "Header", rom0[$100] di jp EntryPoint section "Main Code", rom0[$150] EntryPoint: ; Wait for VBlank ld de, $0000 .waitVblank inc de ld a, d cp $50 jr z, .vblankTimeout ld a, [$ff41] and $03 jr nz, .waitVblank .vblankTimeout ; Disable LCD xor a ld [rLCDC], a ; Relocate SP ld sp, $cfff ; Initialize VRAM call InitFont ; Initialize VRAM offset and print title ld a, $02 ld [$c300], a ld de, strTitle call PrintStringSerial call PrintStringGFX ; Add 'VRAM linebreak' ld hl, $c300 inc [hl] inc [hl] ; Load DAA results into RAM ($C000 - $C0FF) ld hl, $c000 xor a .daaLoop ld b, a daa ld [hli], a ld a, b inc a jr nz, .daaLoop ; Compare results ld hl, $c000 ld de, ComparisonData .comparisonLoop ld a, [de] xor [hl] jr z, .comparisonMatch ; On comparison mismatch call PrintFailSerial call PrintFailGFX .comparisonMatch inc de inc hl ld a, l and a jr nz, .comparisonLoop ; Print test pass if OK ld a, [$c300] cp $06 jr nz, .notPassed ld de, strPass call PrintStringSerial call PrintStringGFX .notPassed ; Restart LCD ld a, %10000001 ld [rLCDC], a jr @ ;------------------------------------------------------------------------- ; Prints string pointed to by DE to the screen ;------------------------------------------------------------------------- PrintStringGFX: ; Preserve HL push hl ; Calculate VRAM pointer with offset in $C300 ld hl, $c300 ld a, [hl] swap a and $0F jr z, .noOverflow ; If overflow to H push bc ld b, a ld a, [hl] swap a and $F0 inc [hl] inc [hl] ld hl, $9801 add l ld l, a ld a, b add h ld h, a pop bc jr .writeString .noOverflow ld a, [hl] swap a and $F0 inc [hl] inc [hl] ld hl, $9801 add l ld l, a .writeString ld a, [de] and a jr z, .finishWrite ld [hli], a inc de jr .writeString .finishWrite pop hl ret ;------------------------------------------------------------------------- ; Loads font tiles into VRAM ;------------------------------------------------------------------------- InitFont: ld hl, $9000 ld de, FontTiles ld bc, FontTilesEnd - FontTiles .copyFont ld a, [de] ld [hli], a inc de dec bc ld a, b or c jr nz, .copyFont ret ;------------------------------------------------------------------------- ; Prints a failure state to the screen ;------------------------------------------------------------------------- PrintFailGFX: push bc push hl push de ld hl, $c400 ; Print failed A value ld a, e call AtoASCII ld a, d ld [hli], a ld a, e ld [hli], a ld a, ":" ld [hli], a ; Print "Expected $" ld de, strFailExpected call CopyString ; Print expected value pop de ld a, [de] push de call AtoASCII ld a, d ld [hli], a ld a, e ld [hli], a ; Print string-ending null char xor a ld [hli], a ; Print to screen ld de, $c400 call PrintStringGFX ; Print " got $" ld hl, $c400 ld de, strFailGot call CopyString ; Print tested value ld b, h ld c, l pop de pop hl ld a, [hl] push hl push de ld h, b ld l, c call AtoASCII ld a, d ld [hli], a ld a, e ld [hli], a ; Print string-ending null char xor a ld [hli], a ; Print to screen ld de, $c400 call PrintStringGFX pop de pop hl pop bc ret ;------------------------------------------------------------------------- ; Loads a string pointed to by DE to memory starting at HL ;------------------------------------------------------------------------- CopyString: ld a, [de] and a ret z ld [hli], a inc de jr CopyString ;------------------------------------------------------------------------- ; Prints a failure state to Serial ;------------------------------------------------------------------------- PrintFailSerial: ld a, e call PrintStringA ld a, ":" ld [rSB], a push de ld de, strFailExpected call PrintStringSerial pop de ld a, [de] call PrintStringA push de ld de, strFailGot call PrintStringSerial pop de ld a, [hl] call PrintStringA ld a, "\n" ld [rSB], a ret ;------------------------------------------------------------------------- ; Converts value in A register to ASCII bytes, writes to RAM and ; loads pointer into DE ;------------------------------------------------------------------------- PrintStringA: push af push bc push de push hl call AtoASCII ld hl, $c100 ld a, d ld [hli], a ld a, e ld [hli], a xor a ld [hli], a ld de, $c100 call PrintStringSerial pop hl pop de pop bc pop af ret ;------------------------------------------------------------------------- ; Converts value in A register to ASCII bytes, writes to RAM and ; loads pointer into DE ;------------------------------------------------------------------------- AtoASCII: push hl push bc ld b, a call NibbleToASCII ld e, a ld a, b swap a call NibbleToASCII ld d, a pop bc pop hl ret ;------------------------------------------------------------------------- ; Converts the lower nibble of the value in A to an ASCII hex char ;------------------------------------------------------------------------- NibbleToASCII: and $0f cp 10 jr c, .digit add a, "A" - 10 - "0" .digit add a, "0" ret ;------------------------------------------------------------------------- ; Prints string pointed to by DE to serial port ;------------------------------------------------------------------------- PrintStringSerial: push de .writeString ld a, [de] and a jr z, .finishWrite ld [rSB], a inc de jr .writeString .finishWrite pop de ret section "Comparison Data", rom0[$1000] ComparisonData: db $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $10, $11, $12, $13, $14, $15 db $16, $11, $12, $13, $14, $15, $16, $17, $18, $19, $20, $21, $22, $23, $24, $25 db $26, $21, $22, $23, $24, $25, $26, $27, $28, $29, $30, $31, $32, $33, $34, $35 db $36, $31, $32, $33, $34, $35, $36, $37, $38, $39, $40, $41, $42, $43, $44, $45 db $46, $41, $42, $43, $44, $45, $46, $47, $48, $49, $50, $51, $52, $53, $54, $55 db $56, $51, $52, $53, $54, $55, $56, $57, $58, $59, $60, $61, $62, $63, $64, $65 db $66, $61, $62, $63, $64, $65, $66, $67, $68, $69, $70, $71, $72, $73, $74, $75 db $76, $71, $72, $73, $74, $75, $76, $77, $78, $79, $80, $81, $82, $83, $84, $85 db $86, $81, $82, $83, $84, $85, $86, $87, $88, $89, $90, $91, $92, $93, $94, $95 db $96, $91, $92, $93, $94, $95, $96, $97, $98, $99, $00, $01, $02, $03, $04, $05 db $06, $01, $02, $03, $04, $05, $06, $07, $08, $09, $10, $11, $12, $13, $14, $15 db $16, $11, $12, $13, $14, $15, $16, $17, $18, $19, $20, $21, $22, $23, $24, $25 db $26, $21, $22, $23, $24, $25, $26, $27, $28, $29, $30, $31, $32, $33, $34, $35 db $36, $31, $32, $33, $34, $35, $36, $37, $38, $39, $40, $41, $42, $43, $44, $45 db $46, $41, $42, $43, $44, $45, $46, $47, $48, $49, $50, $51, $52, $53, $54, $55 db $56, $51, $52, $53, $54, $55, $56, $57, $58, $59, $60, $61, $62, $63, $64, $65 section "Graphics", rom0 FontTiles: incbin "src/inc/font.chr" FontTilesEnd: section "Strings", rom0 strTitle: db "daa.gb\n\n", 0 strPass: db "Test OK!", 0 strFailExpected: db "Expected $", 0 strFailGot: db " got $", 0
21.135135
81
0.443606
1aea5c08f511dee747793eb212a000059b93953c
2,600
asm
Assembly
programs/date.asm
re0ah/nameless-OS16
3218ec1e83130a027ec74697ab72e2de75b3bb66
[ "Unlicense" ]
null
null
null
programs/date.asm
re0ah/nameless-OS16
3218ec1e83130a027ec74697ab72e2de75b3bb66
[ "Unlicense" ]
null
null
null
programs/date.asm
re0ah/nameless-OS16
3218ec1e83130a027ec74697ab72e2de75b3bb66
[ "Unlicense" ]
null
null
null
;This is free and unencumbered software released into the public domain. ;Anyone is free to copy, modify, publish, use, compile, sell, or ;distribute this software, either in source code form or as a compiled ;binary, for any purpose, commercial or non-commercial, and by any ;means. ;In jurisdictions that recognize copyright laws, the author or authors ;of this software dedicate any and all copyright interest in the ;software to the public domain. We make this dedication for the benefit ;of the public at large and to the detriment of our heirs and ;successors. We intend this dedication to be an overt act of ;relinquishment in perpetuity of all present and future rights to this ;software under copyright law. ;THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ;EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF ;MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. ;IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR ;OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ;ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ;OTHER DEALINGS IN THE SOFTWARE. ;For more information, please refer to <http://unlicense.org/> %include "../source/syscall.inc" RTC_SELECT_PORT equ 0x70 RTC_RW_PORT equ 0x71 RTC_SECOND equ 0x00 RTC_MINUTE equ 0x02 RTC_HOUR equ 0x04 RTC_WEEK equ 0x06 RTC_DAY equ 0x07 RTC_MONTH equ 0x08 RTC_YEAR equ 0x09 RTC_CENTURY equ 0x32 date: ;print date now in format YEAR-MONTH-DAY HOUR:MIN:SEC + TIMEZONE ;date get from RTC mov si, print_date_buf_end - 4 xor ah, ah mov bx, SYSCALL_RTC_GET_TIMEZONE_UTC int 0x20 mov bx, SYSCALL_UINT_TO_ASCII int 0x20 add si, cx mov byte[si], ')' mov si, print_date_buf_end - 12 mov bp, call_list .lp: mov al, byte[ds:bp] mov bx, SYSCALL_RTC_GET_DATA_BCD int 0x20 call BCD_to_ascii sub si, 3 inc bp cmp bp, CALL_LIST_END jne .lp inc si ;pos on 'y' mov al, RTC_CENTURY mov bx, SYSCALL_RTC_GET_DATA_BCD int 0x20 call BCD_to_ascii dec si ;pos on '\n' mov bx, SYSCALL_TTY_PRINT_ASCII_C int 0x20 xor ax, ax ;exit status retf BCD_to_ascii: ;in: al = BCD byte ; si = address where save time ;out: al = century from CMOS mov ah, al and ah, 0x0F shr al, 4 add ax, 0x3030 mov word[ds:si], ax retn print_date_buf db 0x0A, "year-mn-dy h :m :s UTC(+t", 0x00, 0x00, 0x00 print_date_buf_end equ $ PRINT_DATE_BUF_SIZE equ $-print_date_buf call_list: db RTC_SECOND db RTC_MINUTE db RTC_HOUR db RTC_DAY db RTC_MONTH db RTC_YEAR CALL_LIST_END equ $
26.530612
72
0.748462
5646c33ab6b6ca1d97372e377a38fa5cab6c9a92
2,974
asm
Assembly
irq.asm
RichardTND/ShockRaid
18c6b7caed3880a35d11c5fcbce417bb16c0fe13
[ "OLDAP-2.4" ]
null
null
null
irq.asm
RichardTND/ShockRaid
18c6b7caed3880a35d11c5fcbce417bb16c0fe13
[ "OLDAP-2.4" ]
null
null
null
irq.asm
RichardTND/ShockRaid
18c6b7caed3880a35d11c5fcbce417bb16c0fe13
[ "OLDAP-2.4" ]
null
null
null
;Main Interrupts for the soft scrolling test SEU. ;We use stack control in order to stabilize the interrupts ;Game scrolling background IRQ irq1 sta stacka1+1 stx stackx1+1 sty stacky1+1 lda $dc0d sta $dd0d lda #$00 sta $d01b lda ypos sta $d011 lda #$00 sta $d01b lda #$03 sta $dd00 lda #$1e sta $d018 lda BGColour2 sta $d023 lda BGColour1 sta $d022 lda #$ff sta $d015 sta $d01c ;Main scroll controll routine (this controls the smoothness ;of the scroll connected to the interrupt (irq1) jsr SmartBackgroundScroll ldx #<irq2 ldy #>irq2 lda #$d1 stx $fffe sty $ffff sta $d012 asl $d019 stacka1 lda #$00 stackx1 ldx #$00 stacky1 ldy #$00 rti ;Status Panel IRQ. Before that however a $D011 register ;is triggered to hide the last row before the score panel ;in order to stabilise the score panel. irq2 sta stacka2+1 lda #$00 sta $d015 lda $d011 cmp #$15 beq flip lda #$7b sta $d011 pha pla pha pla nop nop nop nop ;The main score panel IRQ. The panel is set to blue ;and remains that call through all causes. flip stx stackx2+1 lda #$0e sta $d022 lda #$06 sta $d023 lda #$77 sta $d011 sty stacky2+1 ldx #$5a dex bne *-1 lda #$17 sta $d011 lda #$03 sta $dd00 lda #$12 sta $d018 lda #0 sta $d015 sta $d01c jsr SoundPlayer ldx #<irq1 ldy #>irq1 lda #$fa stx $fffe sty $ffff sta $d012 asl $d019 stacka2 lda #$00 stackx2 ldx #$00 stacky2 ldy #$00 rti nmi rti ;PAL & NTSC timed music player SoundPlayer lda #1 sta ST lda SoundOption beq .irqmusic jsr SFXPlay rts .irqmusic jsr PalNTSCPlayer .irqloop rts
20.510345
69
0.372226
7187ca1ba905ea25548df472f34b584f45359620
320
asm
Assembly
programs/oeis/147/A147677.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
22
2018-02-06T19:19:31.000Z
2022-01-17T21:53:31.000Z
programs/oeis/147/A147677.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
41
2021-02-22T19:00:34.000Z
2021-08-28T10:47:47.000Z
programs/oeis/147/A147677.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
5
2021-02-24T21:14:16.000Z
2021-08-09T19:48:05.000Z
; A147677: Subtract 5, add 8, repeat. ; 7,2,10,5,13,8,16,11,19,14,22,17,25,20,28,23,31,26,34,29,37,32,40,35,43,38,46,41,49,44,52,47,55,50,58,53,61,56,64,59,67,62,70,65,73,68,76,71,79,74,82,77,85,80,88,83,91,86,94,89,97,92,100,95,103,98,106,101,109 add $0,5 mul $0,3 seq $0,152833 ; a(0) = -3; a(n) = n-a(n-1). sub $0,4
40
209
0.621875
a0921f249b75993d599d71f46e32f588a9fa8e20
3,088
asm
Assembly
1571/64tass/ssutil.asm
silverdr/assembly
c2851f7033223e089285dce22443b7e219ed4f61
[ "Unlicense" ]
23
2015-03-23T15:16:57.000Z
2022-03-18T12:43:42.000Z
1571/64tass/ssutil.asm
silverdr/assembly
c2851f7033223e089285dce22443b7e219ed4f61
[ "Unlicense" ]
null
null
null
1571/64tass/ssutil.asm
silverdr/assembly
c2851f7033223e089285dce22443b7e219ed4f61
[ "Unlicense" ]
8
2016-04-13T11:19:35.000Z
2021-12-22T07:39:00.000Z
b0tob0 pha ; buff to buff transfr lda #0 sta temp sta temp+2 lda bufind,y sta temp+1 lda bufind,x sta temp+3 pla tay dey b02 lda (temp),y sta (temp+2),y dey bpl b02 rts clrbuf tay ; clr given buffer lda bufind,y ; accm =buff sta temp+1 lda #0 sta temp tay cb10 sta (temp),y iny bne cb10 rts ssset lda #0 ; set ss pntr=0 jsr ssdir ldy #2 lda (dirbuf),y ; accm=ss number rts ssdir sta dirbuf ; set dirbuf w/current ldx lindx ; ss pointer. accm=low byte lda ss,x tax lda bufind,x sta dirbuf+1 rts setssp pha ; set dirbuf and buftbl with jsr ssdir ; current ss pntr. acm=low byte pha txa asl a tax pla sta buftab+1,x pla sta buftab,x rts sspos jsr sstest ; set ss/buftbl to bmi ssp10 ; to ssnum ssind bvc ssp20 ; er0:ok, in range ldx lindx ; er1: possibly in range lda ss,x jsr ibrd ; read ss in jsr sstest ; test again bpl ssp20 ssp10 jsr ssend ; not in range,set end bit er1 rts ; v=1 ssp20 lda ssind ; ok, set ptr w/ index jsr setssp bit er0 rts ; v=0 ibrd sta jobnum ; indir block rd/wr. lda #read ; accm= buf#, x=lindx bne ibop ; dirbuf)y pnts to t&s for r/w sta jobnum lda #write ibop pha lda filtyp,x and #1 sta drvnum pla ora drvnum sta cmd lda (dirbuf),y sta track iny lda (dirbuf),y sta sector lda jobnum jsr seth ldx jobnum jmp doit2 gsspnt ldx lindx lda ss,x jmp gp1 scal1 lda #nssp jsr addt12 ; add (#ss needed)*120 sscalc dex bpl scal1 lda t3 ; add (# ss indices needed) lsr a jsr addt12 lda t4 ; add (# ss blocks needed) addt12 clc ; add .a to t1,t2 adc t1 sta t1 bcc addrts inc t2 addrts rts .comment ; ; calc # of side sectors needed ; ssscal jsr zerres jsr zeracc ldy r3 sssca1 dey bmi sssca2 ldx #>726 lda #<726 jsr addlit jmp sssca1 sssca2 ldy t4 sssca3 dey bmi sssca4 ldx #0 lda #nssp+1 jsr addlit jmp sssca3 sssca4 lda t3 lsr a ldx #0 jmp addlit zeracc ldx #0 stx accum+1 stx accum+2 stx accum+3 rts addlit stx accum+2 sta accum+1 jmp addres .endc
19.3
55
0.440415
5a1552b2c41cf0473e661daba3764f5a09f69956
8,120
asm
Assembly
Transynther/x86/_processed/NONE/_xt_/i7-8650U_0xd2_notsx.log_6492_220.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
9
2020-08-13T19:41:58.000Z
2022-03-30T12:22:51.000Z
Transynther/x86/_processed/NONE/_xt_/i7-8650U_0xd2_notsx.log_6492_220.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
1
2021-04-29T06:29:35.000Z
2021-05-13T21:02:30.000Z
Transynther/x86/_processed/NONE/_xt_/i7-8650U_0xd2_notsx.log_6492_220.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
3
2020-07-14T17:07:07.000Z
2022-03-21T01:12:22.000Z
.global s_prepare_buffers s_prepare_buffers: push %r10 push %r11 push %r12 push %r14 push %r8 push %rax push %rcx push %rdi push %rsi lea addresses_normal_ht+0xa222, %r8 clflush (%r8) nop nop cmp %r12, %r12 mov $0x6162636465666768, %r10 movq %r10, %xmm7 vmovups %ymm7, (%r8) nop nop and %rax, %rax lea addresses_A_ht+0xbfe2, %rsi clflush (%rsi) nop nop nop nop nop sub %r14, %r14 mov $0x6162636465666768, %r11 movq %r11, %xmm7 movups %xmm7, (%rsi) nop nop inc %r10 lea addresses_WC_ht+0x19e35, %rsi lea addresses_UC_ht+0x19722, %rdi nop nop nop and %r8, %r8 mov $15, %rcx rep movsl inc %rax lea addresses_WC_ht+0xceec, %r8 nop sub $12394, %r12 mov $0x6162636465666768, %r14 movq %r14, (%r8) nop nop nop nop xor $24183, %r10 lea addresses_D_ht+0x53e2, %rcx inc %rax movb $0x61, (%rcx) nop nop nop nop cmp %rax, %rax lea addresses_WC_ht+0x1244a, %rsi clflush (%rsi) nop xor %r10, %r10 vmovups (%rsi), %ymm1 vextracti128 $0, %ymm1, %xmm1 vpextrq $0, %xmm1, %r14 nop nop nop nop cmp %r8, %r8 lea addresses_A_ht+0x1266e, %rsi lea addresses_normal_ht+0x6cc2, %rdi clflush (%rdi) nop nop nop nop add $10570, %r11 mov $46, %rcx rep movsw nop nop add $22383, %r10 lea addresses_WC_ht+0x1e9e2, %r14 clflush (%r14) nop nop nop and $27298, %r8 movups (%r14), %xmm6 vpextrq $1, %xmm6, %rcx nop nop nop nop and %rsi, %rsi lea addresses_WT_ht+0x137e2, %rax nop nop nop add $3779, %r12 mov $0x6162636465666768, %r14 movq %r14, (%rax) nop nop nop nop and %r12, %r12 lea addresses_WT_ht+0x11216, %rax nop nop dec %r10 movw $0x6162, (%rax) nop dec %rax lea addresses_UC_ht+0x1cce2, %r8 nop nop nop nop nop and %r14, %r14 mov (%r8), %rsi nop nop cmp %r14, %r14 lea addresses_UC_ht+0x1082, %r12 nop nop nop nop and $8685, %rax mov (%r12), %r8w nop add $23842, %rdi lea addresses_WC_ht+0x181e6, %r8 nop add %rcx, %rcx mov (%r8), %r11w nop nop cmp %rsi, %rsi lea addresses_WC_ht+0x157d2, %r10 nop nop nop sub %rdi, %rdi movb (%r10), %r8b nop nop sub $8779, %rdi pop %rsi pop %rdi pop %rcx pop %rax pop %r8 pop %r14 pop %r12 pop %r11 pop %r10 ret .global s_faulty_load s_faulty_load: push %r12 push %r14 push %r15 push %r9 push %rbx push %rcx push %rdi push %rdx push %rsi // Store lea addresses_WT+0x1fe2, %rbx sub $38486, %r12 mov $0x5152535455565758, %r9 movq %r9, %xmm0 movups %xmm0, (%rbx) nop nop nop nop xor %r12, %r12 // REPMOV lea addresses_UC+0x5076, %rsi lea addresses_WT+0x1f4c2, %rdi clflush (%rsi) nop nop nop nop xor %r14, %r14 mov $123, %rcx rep movsl nop nop nop nop nop sub %rdx, %rdx // Faulty Load lea addresses_D+0x177e2, %rdi nop cmp %r12, %r12 movb (%rdi), %r15b lea oracles, %rbx and $0xff, %r15 shlq $12, %r15 mov (%rbx,%r15,1), %r15 pop %rsi pop %rdx pop %rdi pop %rcx pop %rbx pop %r9 pop %r15 pop %r14 pop %r12 ret /* <gen_faulty_load> [REF] {'OP': 'LOAD', 'src': {'type': 'addresses_D', 'size': 1, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_WT', 'size': 16, 'AVXalign': False, 'NT': False, 'congruent': 11, 'same': False}} {'OP': 'REPM', 'src': {'type': 'addresses_UC', 'congruent': 1, 'same': False}, 'dst': {'type': 'addresses_WT', 'congruent': 5, 'same': False}} [Faulty Load] {'OP': 'LOAD', 'src': {'type': 'addresses_D', 'size': 1, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': True}} <gen_prepare_buffer> {'OP': 'STOR', 'dst': {'type': 'addresses_normal_ht', 'size': 32, 'AVXalign': False, 'NT': False, 'congruent': 6, 'same': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_A_ht', 'size': 16, 'AVXalign': False, 'NT': False, 'congruent': 9, 'same': False}} {'OP': 'REPM', 'src': {'type': 'addresses_WC_ht', 'congruent': 0, 'same': False}, 'dst': {'type': 'addresses_UC_ht', 'congruent': 6, 'same': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_WC_ht', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 1, 'same': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_D_ht', 'size': 1, 'AVXalign': False, 'NT': False, 'congruent': 4, 'same': False}} {'OP': 'LOAD', 'src': {'type': 'addresses_WC_ht', 'size': 32, 'AVXalign': False, 'NT': False, 'congruent': 3, 'same': True}} {'OP': 'REPM', 'src': {'type': 'addresses_A_ht', 'congruent': 1, 'same': False}, 'dst': {'type': 'addresses_normal_ht', 'congruent': 5, 'same': False}} {'OP': 'LOAD', 'src': {'type': 'addresses_WC_ht', 'size': 16, 'AVXalign': False, 'NT': False, 'congruent': 7, 'same': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_WT_ht', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 9, 'same': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_WT_ht', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 2, 'same': False}} {'OP': 'LOAD', 'src': {'type': 'addresses_UC_ht', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 4, 'same': False}} {'OP': 'LOAD', 'src': {'type': 'addresses_UC_ht', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 4, 'same': False}} {'OP': 'LOAD', 'src': {'type': 'addresses_WC_ht', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 2, 'same': False}} {'OP': 'LOAD', 'src': {'type': 'addresses_WC_ht', 'size': 1, 'AVXalign': False, 'NT': False, 'congruent': 4, 'same': False}} {'36': 6492} 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 */
31.71875
2,999
0.654803
e84a8bc26e3c4d594b8e45c3a876723f8e59fd06
7,096
asm
Assembly
Transynther/x86/_processed/NONE/_xt_sm_/i3-7100_9_0xca_notsx.log_21829_1999.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
9
2020-08-13T19:41:58.000Z
2022-03-30T12:22:51.000Z
Transynther/x86/_processed/NONE/_xt_sm_/i3-7100_9_0xca_notsx.log_21829_1999.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
1
2021-04-29T06:29:35.000Z
2021-05-13T21:02:30.000Z
Transynther/x86/_processed/NONE/_xt_sm_/i3-7100_9_0xca_notsx.log_21829_1999.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
3
2020-07-14T17:07:07.000Z
2022-03-21T01:12:22.000Z
.global s_prepare_buffers s_prepare_buffers: push %r12 push %r14 push %r9 push %rbx push %rcx push %rdi push %rsi lea addresses_normal_ht+0x4705, %r12 nop nop nop and $32944, %r14 mov (%r12), %si nop nop nop nop and $65238, %rbx lea addresses_normal_ht+0xed05, %rsi clflush (%rsi) nop nop nop nop sub %rbx, %rbx movb $0x61, (%rsi) add $58677, %rbx lea addresses_WT_ht+0x1ab05, %rsi lea addresses_UC_ht+0x3be5, %rdi nop nop nop nop add %rbx, %rbx mov $97, %rcx rep movsw nop nop nop nop nop sub %rdi, %rdi lea addresses_WT_ht+0x9d05, %r14 cmp %r12, %r12 mov $0x6162636465666768, %rcx movq %rcx, %xmm6 movups %xmm6, (%r14) nop nop nop cmp %rcx, %rcx lea addresses_WT_ht+0x17f05, %r14 nop inc %rsi mov $0x6162636465666768, %rdi movq %rdi, %xmm7 vmovups %ymm7, (%r14) nop nop nop add $13472, %r12 lea addresses_WT_ht+0x1b1dd, %r12 nop nop nop nop nop and $27621, %rsi movb (%r12), %r14b nop nop nop nop nop dec %r9 lea addresses_D_ht+0x17685, %rsi lea addresses_D_ht+0xff05, %rdi nop and $49590, %r14 mov $26, %rcx rep movsl nop cmp $56567, %rdi pop %rsi pop %rdi pop %rcx pop %rbx pop %r9 pop %r14 pop %r12 ret .global s_faulty_load s_faulty_load: push %r10 push %r11 push %rbp push %rcx push %rdi push %rdx push %rsi // REPMOV lea addresses_normal+0x11305, %rsi lea addresses_normal+0x11305, %rdi nop add $17382, %rbp mov $102, %rcx rep movsq nop xor %rbp, %rbp // Store lea addresses_normal+0x9be5, %rbp nop nop nop nop nop and %rdx, %rdx mov $0x5152535455565758, %r10 movq %r10, %xmm1 movups %xmm1, (%rbp) nop nop nop add %rsi, %rsi // Store lea addresses_normal+0x11305, %rsi nop nop nop and %r11, %r11 movb $0x51, (%rsi) nop nop nop nop and $18485, %r10 // Store mov $0x403, %rcx nop nop nop nop nop add $9671, %rdi movw $0x5152, (%rcx) nop nop nop add %r10, %r10 // Store lea addresses_UC+0x190d, %rsi nop sub %rcx, %rcx movl $0x51525354, (%rsi) nop nop nop nop nop and %r10, %r10 // Faulty Load lea addresses_normal+0x11305, %r10 nop nop nop cmp $58009, %rbp vmovups (%r10), %ymm3 vextracti128 $0, %ymm3, %xmm3 vpextrq $0, %xmm3, %rdx lea oracles, %rdi and $0xff, %rdx shlq $12, %rdx mov (%rdi,%rdx,1), %rdx pop %rsi pop %rdx pop %rdi pop %rcx pop %rbp pop %r11 pop %r10 ret /* <gen_faulty_load> [REF] {'src': {'same': False, 'congruent': 0, 'NT': False, 'type': 'addresses_normal', 'size': 4, 'AVXalign': False}, 'OP': 'LOAD'} {'src': {'type': 'addresses_normal', 'congruent': 0, 'same': True}, 'OP': 'REPM', 'dst': {'type': 'addresses_normal', 'congruent': 0, 'same': True}} {'OP': 'STOR', 'dst': {'same': False, 'congruent': 5, 'NT': False, 'type': 'addresses_normal', 'size': 16, 'AVXalign': False}} {'OP': 'STOR', 'dst': {'same': True, 'congruent': 0, 'NT': False, 'type': 'addresses_normal', 'size': 1, 'AVXalign': False}} {'OP': 'STOR', 'dst': {'same': False, 'congruent': 1, 'NT': False, 'type': 'addresses_P', 'size': 2, 'AVXalign': False}} {'OP': 'STOR', 'dst': {'same': False, 'congruent': 2, 'NT': False, 'type': 'addresses_UC', 'size': 4, 'AVXalign': False}} [Faulty Load] {'src': {'same': True, 'congruent': 0, 'NT': False, 'type': 'addresses_normal', 'size': 32, 'AVXalign': False}, 'OP': 'LOAD'} <gen_prepare_buffer> {'src': {'same': False, 'congruent': 10, 'NT': True, 'type': 'addresses_normal_ht', 'size': 2, 'AVXalign': False}, 'OP': 'LOAD'} {'OP': 'STOR', 'dst': {'same': False, 'congruent': 9, 'NT': False, 'type': 'addresses_normal_ht', 'size': 1, 'AVXalign': False}} {'src': {'type': 'addresses_WT_ht', 'congruent': 9, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_UC_ht', 'congruent': 5, 'same': False}} {'OP': 'STOR', 'dst': {'same': False, 'congruent': 5, 'NT': False, 'type': 'addresses_WT_ht', 'size': 16, 'AVXalign': False}} {'OP': 'STOR', 'dst': {'same': False, 'congruent': 9, 'NT': False, 'type': 'addresses_WT_ht', 'size': 32, 'AVXalign': False}} {'src': {'same': False, 'congruent': 2, 'NT': False, 'type': 'addresses_WT_ht', 'size': 1, 'AVXalign': False}, 'OP': 'LOAD'} {'src': {'type': 'addresses_D_ht', 'congruent': 7, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_D_ht', 'congruent': 5, 'same': True}} {'51': 21829} 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 */
33.158879
2,999
0.657694
4d0464ffc600752f7f9d0f5b2c6d5dcab13bb741
1,259
asm
Assembly
samples/sms/common/spr.asm
0x8BitDev/MAPeD-SPReD
da1a8a582980ea5963777a46fd3dfddc0d69aa82
[ "MIT" ]
23
2019-05-16T20:23:49.000Z
2022-03-13T21:53:10.000Z
samples/sms/common/spr.asm
0x8BitDev/MAPeD-SPReD
da1a8a582980ea5963777a46fd3dfddc0d69aa82
[ "MIT" ]
6
2021-03-30T05:51:46.000Z
2022-01-07T13:18:44.000Z
samples/sms/common/spr.asm
0x8BitDev/MAPeD-SPReD
da1a8a582980ea5963777a46fd3dfddc0d69aa82
[ "MIT" ]
null
null
null
;######################################################################## ; ; Copyright 2019-2020 0x8BitDev ( MIT license ) ; ;######################################################################## ; ; Sprite related functions ; .define SPR_BUFF_X_CHR_OFFSET $c080 .define SPR_BUFF_SIZE $ff ; *** push a sprite to the characters "pool" *** ; IN: HL - data addr ; B - data size ; DE - X/Y spr_push: exx ld hl, SPR_BUFF ; Y data addr ld de, SPR_BUFF_X_CHR_OFFSET ; X, CHR_ind offset ld bc, SPR_NUM_ATTRS ld a, (bc) exx cp 64 ret z ; buffer overflows! _push_sprite_loop: ld a, (hl) ; A - Y add a, e ; save a / Y exx ld (hl), a inc hl exx inc hl ld a, (hl) ; A - X add a, d ; save a / X exx ld (de), a inc de exx inc hl ld a, (hl) ; A - CHR index ; save a / CHR_ind exx ld (de), a inc de ld a, (bc) inc a ld (bc), a exx inc hl cp 64 jr z, _exit dec b dec b djnz _push_sprite_loop _exit: exx ld a, $d0 ; the end! ld (hl), a exx ret ; *** characters "pool" initialization *** spr_buff_init: ld hl, SPR_BUFF ld a, $d0 ; the end! ld (hl), a ld hl, SPR_NUM_ATTRS xor a ld (hl), a ret
12.846939
74
0.483717
fc4cc9935c2dd3ed88b76ffce86741904ab521e6
4,029
asm
Assembly
Test/ZXSP/template_rom_with_c_code.asm
codebje/zasm
f8716fc081fa9b45a1acd0b25ef020b4fa0d9873
[ "BSD-2-Clause" ]
null
null
null
Test/ZXSP/template_rom_with_c_code.asm
codebje/zasm
f8716fc081fa9b45a1acd0b25ef020b4fa0d9873
[ "BSD-2-Clause" ]
null
null
null
Test/ZXSP/template_rom_with_c_code.asm
codebje/zasm
f8716fc081fa9b45a1acd0b25ef020b4fa0d9873
[ "BSD-2-Clause" ]
null
null
null
#!/usr/local/bin/zasm -c ../../sdcc/bin/sdcc -o original/ ; ================================================================ ; Example rom with c code for a Z80 system ; Copyright (c) Günter Woigk 1994 - 2015 ; mailto:kio@little-bat.de ; ================================================================ #target rom _rom_start:: equ 0 _rom_end:: equ 0x4000 _ram_start:: equ 0x4000 _ram_end:: equ 0x10000 _min_heap_size:: equ 0x1000 ; ================================================================ ; Define ordering of code segments in ram: ; these segments produce code in the output file! ; ================================================================ #code _HEADER,_rom_start #code _GSINIT ; init code: the compiler adds some code here and there as required #code _HOME ; code that must not be put in a bank switched part of memory. #code _CODE ; most code and const data go here #code _CABS,*,0 ; referenced but never (?) actually used by sdcc #code _GSFINAL,*,0 ; referenced but never (?) actually used by sdcc #code _INITIALIZER ; initializer for initialized data in ram #code _ROM_PADDING ; pad rom file up to rom end defs _rom_end-$$ ; ================================================================ ; Define variables in ram: ; note: data segments do not produce actual code ; ================================================================ #data _DATA, _ram_start ; uninitialized data #data _INITIALIZED ; data initialized from _INITIALIZER #data _DABS,*,0 ; referenced but never (?) actually used by sdcc #data _RSEG,*,0 ; referenced but never (?) actually used by kcc #data _HEAP ; heap: __sdcc_heap_start: ; --> sdcc _malloc.c ds _min_heap_size ; minimum required size ds _ram_end-$-1 ; add all unused memory to the heap __sdcc_heap_end: ; --> sdcc _malloc.c ds 1 ; ================================================================ ; _HEADER segment: ; starts at 0x0000 ; ================================================================ ; reset vector ; RST vectors ; INT vector (IM 1) ; NMI vector #CODE _HEADER ; reset vector RST0:: di ld sp,_ram_end jp init defs 0x08-$ RST1:: reti defs 0x10-$ RST2:: reti defs 0x18-$ RST3:: reti defs 0x20-$ RST4:: reti defs 0x28-$ RST5:: reti defs 0x30-$ RST6:: reti defs 0x38-$ ; maskable interrupt handler in interrupt mode 1: RST7:: RETI ; add INT handler here ; init: ; globals and statics initialization ; starts with copying the fixed data: init: ld bc,_INITIALIZER_len ; length of segment _INITIALIZER ld de,_INITIALIZED ; start of segment _INITIALIZED ld hl,_INITIALIZER ; start of segment _INITIALIZER ld a,b or c jr z,$+4 ldir call _GSINIT ; Initialise global variables call _main ; execute main() ; shut down: ; if main() returns then something went wrong. ; call debugger and on exit restart system. _exit:: di call NMI rst 0 ; non maskable interrupt: ; e.g. call debugger and on exit resume. defs 0x66-$ NMI:: RETN ; add NMI handler here ; ================================================================ ; the payload: ; ================================================================ #CFLAGS $CFLAGS --nostdinc -I../../sdcc/include ; add some flags for sdcc #INCLUDE "main.c" ; compile & include file "main.c" #INCLUDE LIBRARY "../../sdcc/lib/" ; resolve missing global labels #if !defined(__mulint) ; fix for old sdcc 3.4.x: defs 0,__mulint ; make __mulint missing __mulint_rrx_s equ __mulint ; define what we need to be what we have #INCLUDE LIBRARY "../../sdcc/lib/" ; resolve missing global labels #endif ; ================================================================ ; calculate some last labels: ; ================================================================ #CODE _GSINIT ret ; final ret from initialization code #CODE _INITIALIZER _INITIALIZER_len = $ - _INITIALIZER ; calc size of initializer data for ldir in init code
24.717791
89
0.55448
de25305f848c33661959563c0728e8b800385dfe
8,073
asm
Assembly
Transynther/x86/_processed/NC/_ht_zr_/i7-7700_9_0xca.log_21829_1587.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
9
2020-08-13T19:41:58.000Z
2022-03-30T12:22:51.000Z
Transynther/x86/_processed/NC/_ht_zr_/i7-7700_9_0xca.log_21829_1587.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
1
2021-04-29T06:29:35.000Z
2021-05-13T21:02:30.000Z
Transynther/x86/_processed/NC/_ht_zr_/i7-7700_9_0xca.log_21829_1587.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
3
2020-07-14T17:07:07.000Z
2022-03-21T01:12:22.000Z
.global s_prepare_buffers s_prepare_buffers: push %r12 push %rax push %rbp push %rbx push %rcx push %rdi push %rdx push %rsi lea addresses_A_ht+0xf67e, %rsi lea addresses_UC_ht+0xb90d, %rdi nop nop sub $63610, %rbx mov $57, %rcx rep movsw xor $347, %rdx lea addresses_WT_ht+0x1accd, %rsi lea addresses_WT_ht+0x1a50d, %rdi nop nop nop nop and $39986, %rbp mov $101, %rcx rep movsl nop nop and $63914, %rdi lea addresses_UC_ht+0x1eb0d, %rsi nop nop nop nop and %rax, %rax movb (%rsi), %cl nop nop add $19661, %rdi lea addresses_UC_ht+0x14bf5, %rbx nop inc %rcx mov (%rbx), %eax nop nop cmp $29961, %rsi lea addresses_WT_ht+0x128ad, %rdi nop cmp $13096, %rsi mov $0x6162636465666768, %rbx movq %rbx, %xmm5 vmovups %ymm5, (%rdi) nop nop cmp %rdi, %rdi lea addresses_WC_ht+0xb50d, %rsi lea addresses_A_ht+0x18123, %rdi clflush (%rsi) nop nop nop nop nop and %r12, %r12 mov $17, %rcx rep movsl nop nop add $10549, %r12 lea addresses_A_ht+0x7b0d, %rsi lea addresses_UC_ht+0x938d, %rdi nop dec %rax mov $100, %rcx rep movsw nop nop nop nop xor $36946, %rbx lea addresses_WC_ht+0x15bd, %rsi lea addresses_UC_ht+0x1557d, %rdi nop nop nop xor $40474, %rax mov $98, %rcx rep movsb nop nop nop nop inc %rdi lea addresses_A_ht+0xe30d, %rsi lea addresses_A_ht+0x860d, %rdi nop nop nop nop nop and $45212, %rbp mov $44, %rcx rep movsl sub %rsi, %rsi lea addresses_normal_ht+0xfd0d, %rsi lea addresses_WC_ht+0x195cd, %rdi nop sub %rbp, %rbp mov $96, %rcx rep movsb nop nop nop nop and $4422, %rcx lea addresses_UC_ht+0x1a50d, %rsi lea addresses_UC_ht+0x330d, %rdi clflush (%rdi) nop nop and %rbp, %rbp mov $89, %rcx rep movsl nop nop nop lfence lea addresses_normal_ht+0x540d, %rsi lea addresses_normal_ht+0x1dded, %rdi nop nop nop add $14925, %r12 mov $125, %rcx rep movsq nop nop nop nop nop cmp $23202, %r12 pop %rsi pop %rdx pop %rdi pop %rcx pop %rbx pop %rbp pop %rax pop %r12 ret .global s_faulty_load s_faulty_load: push %r10 push %r13 push %r14 push %rbp push %rcx push %rdx push %rsi // Store mov $0xd0d, %r10 nop nop and $43686, %rdx mov $0x5152535455565758, %rcx movq %rcx, (%r10) nop nop nop nop add %r13, %r13 // Store lea addresses_A+0xbdd9, %r14 nop nop nop dec %rsi movb $0x51, (%r14) xor $28558, %rsi // Store lea addresses_normal+0x910d, %r13 nop nop nop inc %r14 movl $0x51525354, (%r13) nop nop nop nop cmp %r10, %r10 // Faulty Load mov $0x321b2c000000050d, %r13 nop nop add $35528, %r14 vmovups (%r13), %ymm6 vextracti128 $0, %ymm6, %xmm6 vpextrq $1, %xmm6, %rcx lea oracles, %r10 and $0xff, %rcx shlq $12, %rcx mov (%r10,%rcx,1), %rcx pop %rsi pop %rdx pop %rcx pop %rbp pop %r14 pop %r13 pop %r10 ret /* <gen_faulty_load> [REF] {'src': {'congruent': 0, 'AVXalign': False, 'same': False, 'size': 4, 'NT': True, 'type': 'addresses_NC'}, 'OP': 'LOAD'} {'OP': 'STOR', 'dst': {'congruent': 10, 'AVXalign': False, 'same': False, 'size': 8, 'NT': False, 'type': 'addresses_P'}} {'OP': 'STOR', 'dst': {'congruent': 2, 'AVXalign': False, 'same': False, 'size': 1, 'NT': True, 'type': 'addresses_A'}} {'OP': 'STOR', 'dst': {'congruent': 10, 'AVXalign': False, 'same': False, 'size': 4, 'NT': False, 'type': 'addresses_normal'}} [Faulty Load] {'src': {'congruent': 0, 'AVXalign': False, 'same': True, 'size': 32, 'NT': False, 'type': 'addresses_NC'}, 'OP': 'LOAD'} <gen_prepare_buffer> {'src': {'congruent': 0, 'same': True, 'type': 'addresses_A_ht'}, 'OP': 'REPM', 'dst': {'congruent': 7, 'same': True, 'type': 'addresses_UC_ht'}} {'src': {'congruent': 5, 'same': False, 'type': 'addresses_WT_ht'}, 'OP': 'REPM', 'dst': {'congruent': 11, 'same': False, 'type': 'addresses_WT_ht'}} {'src': {'congruent': 7, 'AVXalign': False, 'same': False, 'size': 1, 'NT': False, 'type': 'addresses_UC_ht'}, 'OP': 'LOAD'} {'src': {'congruent': 2, 'AVXalign': False, 'same': False, 'size': 4, 'NT': False, 'type': 'addresses_UC_ht'}, 'OP': 'LOAD'} {'OP': 'STOR', 'dst': {'congruent': 3, 'AVXalign': False, 'same': False, 'size': 32, 'NT': False, 'type': 'addresses_WT_ht'}} {'src': {'congruent': 9, 'same': False, 'type': 'addresses_WC_ht'}, 'OP': 'REPM', 'dst': {'congruent': 0, 'same': True, 'type': 'addresses_A_ht'}} {'src': {'congruent': 7, 'same': False, 'type': 'addresses_A_ht'}, 'OP': 'REPM', 'dst': {'congruent': 5, 'same': False, 'type': 'addresses_UC_ht'}} {'src': {'congruent': 4, 'same': False, 'type': 'addresses_WC_ht'}, 'OP': 'REPM', 'dst': {'congruent': 0, 'same': False, 'type': 'addresses_UC_ht'}} {'src': {'congruent': 8, 'same': False, 'type': 'addresses_A_ht'}, 'OP': 'REPM', 'dst': {'congruent': 8, 'same': False, 'type': 'addresses_A_ht'}} {'src': {'congruent': 11, 'same': False, 'type': 'addresses_normal_ht'}, 'OP': 'REPM', 'dst': {'congruent': 5, 'same': False, 'type': 'addresses_WC_ht'}} {'src': {'congruent': 10, 'same': True, 'type': 'addresses_UC_ht'}, 'OP': 'REPM', 'dst': {'congruent': 7, 'same': False, 'type': 'addresses_UC_ht'}} {'src': {'congruent': 7, 'same': False, 'type': 'addresses_normal_ht'}, 'OP': 'REPM', 'dst': {'congruent': 5, 'same': False, 'type': 'addresses_normal_ht'}} {'44': 21, '45': 7114, '48': 52, '00': 14639, '49': 3} 00 00 45 00 45 45 45 45 00 45 00 00 00 00 45 00 45 45 45 00 45 00 45 00 00 00 00 45 00 45 00 00 45 00 00 00 00 00 00 45 00 45 00 00 45 00 45 00 00 00 00 00 00 45 00 45 00 45 00 00 45 00 00 00 00 00 00 00 00 45 00 45 00 45 45 45 45 00 45 00 00 00 00 00 45 45 45 45 00 45 00 00 00 00 00 00 00 45 00 45 45 00 45 00 00 00 00 00 00 00 45 00 45 00 00 45 00 00 00 00 00 00 00 45 45 00 00 45 00 00 00 00 00 00 00 45 00 45 45 00 45 00 45 00 00 00 00 00 00 00 00 45 45 45 45 00 00 00 00 00 00 00 45 00 45 45 00 00 45 00 00 00 00 00 00 45 45 45 00 00 45 00 45 00 00 00 00 00 45 00 45 00 45 45 45 45 00 00 00 00 00 00 00 00 45 00 45 45 45 45 00 00 00 00 00 00 45 00 45 00 00 45 00 00 00 00 00 00 45 00 45 45 45 45 00 00 00 00 00 00 45 00 45 00 00 45 00 00 00 00 00 00 00 45 00 45 00 00 45 00 45 00 00 00 00 00 00 45 00 45 45 00 45 00 45 00 00 00 00 00 45 00 45 00 00 45 00 00 00 00 00 00 00 45 00 45 00 45 45 45 45 00 45 00 00 00 00 00 00 45 45 00 00 45 00 00 00 00 00 00 00 00 45 00 45 45 00 00 45 00 00 00 00 00 00 45 00 45 00 45 45 45 45 00 45 00 00 00 00 00 45 00 45 45 45 45 00 45 00 00 00 00 00 45 00 45 00 00 45 00 45 00 00 00 00 45 00 45 45 45 45 00 45 00 00 00 00 00 00 45 00 45 45 45 45 45 00 45 00 00 00 00 00 00 00 00 45 00 45 00 00 45 00 00 00 00 00 00 00 45 00 45 45 00 45 45 00 45 00 00 00 00 00 00 00 45 00 45 00 00 45 00 45 00 00 00 00 00 00 00 45 00 45 45 00 00 45 00 45 00 00 00 00 00 00 00 45 00 45 45 45 45 00 00 00 00 00 00 00 45 00 45 00 00 48 00 45 00 00 00 00 00 00 00 00 45 00 45 45 00 45 00 00 00 00 00 00 00 00 45 45 00 00 45 00 00 00 00 45 00 45 45 00 45 00 45 00 00 00 00 00 00 00 45 00 45 45 45 48 00 45 00 00 00 00 00 00 00 45 00 45 00 00 45 00 00 00 00 00 00 45 00 45 00 45 00 00 00 00 00 00 45 00 45 45 45 45 00 00 00 00 00 00 00 45 00 45 45 48 00 45 00 00 00 00 00 45 45 45 00 45 00 45 00 00 00 00 00 45 00 45 45 00 45 00 45 00 00 00 00 00 00 00 45 00 45 45 45 00 00 45 00 45 00 00 00 00 00 00 45 00 45 00 45 00 00 45 00 45 00 00 00 00 00 00 00 45 00 45 00 00 45 00 00 00 00 00 00 45 00 45 45 45 00 45 00 00 00 00 00 00 00 45 00 45 45 00 45 00 00 00 00 00 00 45 00 00 45 00 45 00 00 00 00 00 45 00 45 00 45 45 00 00 45 00 45 00 00 00 00 00 00 45 00 45 45 45 45 00 00 00 00 00 00 45 00 45 45 45 45 00 00 00 00 00 00 00 45 00 45 45 00 00 45 00 45 00 00 00 00 45 00 45 00 45 45 45 45 00 45 00 00 00 00 00 00 45 00 45 00 45 45 00 00 45 00 00 00 00 00 00 00 45 45 00 45 00 00 00 00 00 00 00 45 00 45 00 00 45 00 00 00 00 00 00 00 45 45 00 00 45 00 45 00 00 00 00 00 00 45 45 00 00 45 00 45 00 00 00 00 00 00 00 45 45 45 00 45 00 00 00 00 00 45 00 45 00 00 45 00 45 00 00 00 00 00 00 00 45 00 45 45 00 00 45 00 00 00 00 00 00 00 45 00 45 00 00 45 00 00 00 00 00 00 00 00 00 45 45 00 45 45 00 45 00 00 00 00 00 00 00 45 45 45 45 00 00 00 00 00 00 45 45 45 00 00 00 00 00 00 00 00 45 45 00 45 00 00 00 00 00 00 00 45 00 45 00 45 48 00 45 00 00 00 00 00 00 00 45 00 45 45 00 00 45 00 00 00 00 00 00 00 00 45 00 45 00 45 45 00 45 00 00 00 00 00 00 00 45 45 00 00 45 00 00 00 00 45 00 45 */
33.086066
2,999
0.659358
3a8df2ce6844b9ec01f497096153eaa20dcf7e42
8,268
asm
Assembly
Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0x84_notsx.log_5748_3103.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
9
2020-08-13T19:41:58.000Z
2022-03-30T12:22:51.000Z
Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0x84_notsx.log_5748_3103.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
1
2021-04-29T06:29:35.000Z
2021-05-13T21:02:30.000Z
Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0x84_notsx.log_5748_3103.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
3
2020-07-14T17:07:07.000Z
2022-03-21T01:12:22.000Z
.global s_prepare_buffers s_prepare_buffers: push %r10 push %r12 push %r13 push %rbx push %rcx push %rdi push %rsi lea addresses_normal_ht+0x1bbc5, %rcx clflush (%rcx) nop nop and $4000, %rsi mov $0x6162636465666768, %r10 movq %r10, %xmm0 movups %xmm0, (%rcx) nop nop nop nop nop cmp %r10, %r10 lea addresses_A_ht+0x1a745, %r12 sub %rcx, %rcx movw $0x6162, (%r12) nop xor $24326, %rsi lea addresses_UC_ht+0xcc5, %rdi nop nop add %rbx, %rbx movups (%rdi), %xmm6 vpextrq $0, %xmm6, %rsi nop nop nop cmp %rbx, %rbx lea addresses_D_ht+0xbe45, %rdi nop nop nop cmp %r13, %r13 movups (%rdi), %xmm7 vpextrq $1, %xmm7, %r10 nop nop nop and %r10, %r10 lea addresses_WT_ht+0x10515, %rbx nop nop nop nop cmp $9623, %rcx movl $0x61626364, (%rbx) nop nop nop nop nop and %rbx, %rbx pop %rsi pop %rdi pop %rcx pop %rbx pop %r13 pop %r12 pop %r10 ret .global s_faulty_load s_faulty_load: push %r14 push %r9 push %rax push %rbp push %rbx push %rdi push %rsi // Load lea addresses_D+0xa5bd, %r14 nop nop inc %rax vmovups (%r14), %ymm2 vextracti128 $0, %ymm2, %xmm2 vpextrq $0, %xmm2, %rsi nop nop nop nop xor $46900, %rax // Store lea addresses_normal+0x14545, %rdi nop nop nop nop and $26980, %rbp mov $0x5152535455565758, %r14 movq %r14, %xmm1 vmovups %ymm1, (%rdi) nop nop nop nop cmp %r14, %r14 // Store lea addresses_normal+0xcb05, %rsi nop nop nop nop nop and %r14, %r14 mov $0x5152535455565758, %rbx movq %rbx, %xmm5 movups %xmm5, (%rsi) nop nop nop cmp $48174, %rbp // Store lea addresses_WT+0x6fe9, %rbx nop nop sub $7254, %r14 movw $0x5152, (%rbx) nop nop nop dec %r9 // Store lea addresses_D+0x7bad, %rdi nop nop inc %rbp movw $0x5152, (%rdi) nop nop nop nop cmp %rdi, %rdi // Store lea addresses_RW+0xa424, %rbx nop nop nop nop dec %rsi mov $0x5152535455565758, %rdi movq %rdi, (%rbx) nop nop nop nop cmp %rax, %rax // Store lea addresses_US+0x1b3c5, %rbx nop and $46525, %r9 mov $0x5152535455565758, %rax movq %rax, (%rbx) nop nop nop nop add %r14, %r14 // Store lea addresses_PSE+0x185, %rax and $562, %rbx movw $0x5152, (%rax) nop xor $40981, %rsi // Load lea addresses_D+0xe9c5, %r14 nop nop nop nop nop add $38884, %rsi mov (%r14), %rax sub %rsi, %rsi // Store lea addresses_US+0x747, %r9 nop nop nop dec %r14 mov $0x5152535455565758, %rbp movq %rbp, (%r9) nop nop nop nop and $52159, %r14 // Store lea addresses_UC+0xdd43, %r9 nop nop nop nop and %r14, %r14 mov $0x5152535455565758, %rax movq %rax, %xmm5 vmovups %ymm5, (%r9) nop nop nop nop add $13282, %rbp // Store lea addresses_UC+0xb6f5, %rdi nop nop sub %rbp, %rbp mov $0x5152535455565758, %rbx movq %rbx, %xmm5 vmovups %ymm5, (%rdi) nop dec %rax // Faulty Load lea addresses_D+0x1a8c5, %rbp nop cmp $9993, %rsi mov (%rbp), %eax lea oracles, %rbx and $0xff, %rax shlq $12, %rax mov (%rbx,%rax,1), %rax pop %rsi pop %rdi pop %rbx pop %rbp pop %rax pop %r9 pop %r14 ret /* <gen_faulty_load> [REF] {'src': {'type': 'addresses_D', 'same': False, 'size': 16, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'} {'src': {'type': 'addresses_D', 'same': False, 'size': 32, 'congruent': 3, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'} {'dst': {'type': 'addresses_normal', 'same': False, 'size': 32, 'congruent': 4, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'} {'dst': {'type': 'addresses_normal', 'same': False, 'size': 16, 'congruent': 6, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'} {'dst': {'type': 'addresses_WT', 'same': False, 'size': 2, 'congruent': 2, 'NT': False, 'AVXalign': True}, 'OP': 'STOR'} {'dst': {'type': 'addresses_D', 'same': False, 'size': 2, 'congruent': 3, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'} {'dst': {'type': 'addresses_RW', 'same': False, 'size': 8, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'} {'dst': {'type': 'addresses_US', 'same': False, 'size': 8, 'congruent': 8, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'} {'dst': {'type': 'addresses_PSE', 'same': False, 'size': 2, 'congruent': 5, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'} {'src': {'type': 'addresses_D', 'same': False, 'size': 8, 'congruent': 8, 'NT': True, 'AVXalign': False}, 'OP': 'LOAD'} {'dst': {'type': 'addresses_US', 'same': False, 'size': 8, 'congruent': 1, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'} {'dst': {'type': 'addresses_UC', 'same': False, 'size': 32, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'} {'dst': {'type': 'addresses_UC', 'same': False, 'size': 32, 'congruent': 4, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'} [Faulty Load] {'src': {'type': 'addresses_D', 'same': True, 'size': 4, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'} <gen_prepare_buffer> {'dst': {'type': 'addresses_normal_ht', 'same': False, 'size': 16, 'congruent': 7, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'} {'dst': {'type': 'addresses_A_ht', 'same': False, 'size': 2, 'congruent': 6, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'} {'src': {'type': 'addresses_UC_ht', 'same': False, 'size': 16, 'congruent': 10, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'} {'src': {'type': 'addresses_D_ht', 'same': False, 'size': 16, 'congruent': 5, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'} {'dst': {'type': 'addresses_WT_ht', 'same': False, 'size': 4, 'congruent': 4, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'} {'36': 5748} 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 */
29.319149
2,999
0.650339
d59cc2d63c582f16945ca63f8f0e5ef234ecee1a
3,729
asm
Assembly
EEL7030/Rep CAEE/Mic 8085/HexConv.asm
GSimas/MicroC
ac9ef54bbeed027db532885407cc3e783fcb28eb
[ "MIT" ]
null
null
null
EEL7030/Rep CAEE/Mic 8085/HexConv.asm
GSimas/MicroC
ac9ef54bbeed027db532885407cc3e783fcb28eb
[ "MIT" ]
null
null
null
EEL7030/Rep CAEE/Mic 8085/HexConv.asm
GSimas/MicroC
ac9ef54bbeed027db532885407cc3e783fcb28eb
[ "MIT" ]
null
null
null
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;HexConv.asm - conversao de base para numeros hexadecimais ;Recebe do teclado um numero hexadecimal de 4 digitos ;Recebe a base de saida (um numero decimal de 2 digitos) ;A base de saida deve estar entre 2 e 16, inclusive ;Converte o numero para essa base; resultado no display ;Campos de enderecos e dados formam um numero de 6 digitos ;Prof. Roberto M. Ziller - 04.01.2000 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; LETECLA EQU 02E7H MOSTRAD EQU 0363H MOSTRAA EQU 036EH ORG 2000H LXI SP,2100H LOOP: CALL LENUM16 ; DOIS DIGITOS MAIS SIGNIFICATIVOS MOV D,A CALL LENUM16 ; DOIS DIGITOS MENOS SIGNIFICATIVOS MOV E,A PUSH D CALL MOSTRAD ; APRESENTA NUMERO A SER CONVERTIDO POP D CALL LENUM10 ; BASE DE SAIDA MOV C,A CALL HEXCONV ; CONVERTE. RESULTADO EM D, E e A PUSH PSW CALL MOSTRAD POP PSW CALL MOSTRAA JMP LOOP ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;HEXCONV - converte numero hexa para a base de saida ;Recebe numero no par DE e base de saida em C ;Retorna resultado como numero de 6 digitos em D, E e A ;Utiliza todos os regs ;Chama a sub-rotina DIV HEXCONV: MVI B,00H ; CONTADOR DE DIGITOS DO RESULTADO MORE: CALL DIV ; QUOCIENTE EM DE E RESTO EM L PUSH H ; L CONTEM DIGITO DO RESULTADO INR B ; CONTA DIGITOS MOV A,D CPI 00H ; SE D <> 0, TEM MAIS JNZ MORE MOV A,E CPI 00H ; SE D == 0 MAS E <> 0, TEM MAIS JNZ MORE MVI A,00H ; TRIPLA DEA CONTEM 0 PARA COMECAR GETDIG: MVI H,04H ; RESGATE DOS DIGITOS DA PILHA ROTATE: ORA A ; ZERA CARRY FLAG RAL ; BIT MAIS SIGNIFICATIVO DE A EM CY MOV L,A MOV A,E ; ROTACIONA DIGITOS DA TRIPLA DEA RAL ; BIT MAIS SIGNIFICATIVO DE A EM E MOV E,A MOV A,D RAL ; BIT MAIS SIGNIFICATIVO DE E EM D MOV D,A MOV A,L DCR H JNZ ROTATE POP H ; L CONTEM DIGITO PARA A TRIPLA DEA ORA L ; INTRODUZ DIGITO RESGATADO DA PILHA DCR B ; TEM MAIS DIGITOS? JNZ GETDIG RET ; NUMERO CONVERTIDO EM DEA ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;DIV - sub-rotina para divisao ;Recebe dividendo em DE e divisor em C ;Retorna quociente em DE e resto em L ;Utiliza regs A, C, D, E, H e L DIV: LXI H,0000H MOV A,E TEST1: CMP C JC TEST2 BACK: SUB C INX H JMP TEST1 TEST2: MOV E,A MOV A,D CPI 00H JZ DONE DCR D MOV A,E JMP BACK DONE: XCHG RET ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;LENUM10 - le numero decimal de dois digitos ;Retorna valor hexa do numero lido no acumulador ;Utiliza os regs A, B, H e L ;Chama LETECLA LENUM10: CALL LETECLA RLC MOV B,A RLC RLC ADD B MOV B,A CALL LETECLA ADD B RET ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;LENUM16 - le um numero hexadecimal de dois digitos ;Retorna valor do numero lido no acumulador ;Utiliza os regs A, B, H e L ;Chama LETECLA LENUM16: CALL LETECLA RLC RLC RLC RLC MOV B,A CALL LETECLA ADD B RET END
29.832
62
0.49343
05a70083aeb09e46e3c06ff4eac36995160139bd
450
asm
Assembly
oeis/176/A176100.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
11
2021-08-22T19:44:55.000Z
2022-03-20T16:47:57.000Z
oeis/176/A176100.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
9
2021-08-29T13:15:54.000Z
2022-03-09T19:52:31.000Z
oeis/176/A176100.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
3
2021-08-22T20:56:47.000Z
2021-09-29T06:26:12.000Z
; A176100: Even numbers that are not semiprimes, or, twice the nonprimes. ; Submitted by Jamie Morken(m3a) ; 0,2,8,12,16,18,20,24,28,30,32,36,40,42,44,48,50,52,54,56,60,64,66,68,70,72,76,78,80,84,88,90,92,96,98,100,102,104,108,110,112,114,116,120,124,126,128,130,132,136,138,140,144,148,150,152,154,156,160,162,164 mov $2,$0 mul $0,2 trn $2,2 sub $0,$2 trn $0,1 seq $0,122825 ; a(n) = n + number of previous prime terms, a(1) = 1. sub $0,1 mul $0,2
34.615385
207
0.675556
bf5edbbcad86fbc01bca4d7b3a78e972743d2cf4
678
asm
Assembly
oeis/078/A078368.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
11
2021-08-22T19:44:55.000Z
2022-03-20T16:47:57.000Z
oeis/078/A078368.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
9
2021-08-29T13:15:54.000Z
2022-03-09T19:52:31.000Z
oeis/078/A078368.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
3
2021-08-22T20:56:47.000Z
2021-09-29T06:26:12.000Z
; A078368: A Chebyshev S-sequence with Diophantine property. ; Submitted by Jon Maiga ; 1,19,360,6821,129239,2448720,46396441,879083659,16656193080,315588584861,5979526919279,113295422881440,2146633507828081,40672741225852099,770635449783361800,14601400804658022101,276655979838719058119,5241862216131004082160,99318726126650358502921,1881813934190225807473339,35655146023487639983490520,675565960512074933878846541,12800098103705936103714593759,242526298009900711036698434880,4595199564084407573593555668961,87066265419593843187240859275379,1649663843408198612983982770563240 lpb $0 sub $0,1 add $3,1 mov $1,$3 mul $1,17 add $2,$1 add $3,$2 lpe mov $0,$3 add $0,1
45.2
490
0.852507
de74c2c041b48fc37289efbb28c02a19cd1c3d07
1,783
asm
Assembly
Assembler/testDisasm.asm
Rohansi/LoonyVM
6ef3a3e552875cdbe39c92f66c31c3c5eb3059e0
[ "Unlicense" ]
1
2019-01-19T14:15:53.000Z
2019-01-19T14:15:53.000Z
Assembler/testDisasm.asm
Rohansi/LoonyVM
6ef3a3e552875cdbe39c92f66c31c3c5eb3059e0
[ "Unlicense" ]
null
null
null
Assembler/testDisasm.asm
Rohansi/LoonyVM
6ef3a3e552875cdbe39c92f66c31c3c5eb3059e0
[ "Unlicense" ]
null
null
null
include 'loonyvm.inc' ivt interruptTable sti ; long instruction to play with ;cmpxchg word [r0 + -2147483648], word [r0 + -2147483648] @@: rand byte r0 rand byte r1 invoke itoa, byte r0, itoaBuffer invoke printString, itoaBuffer invoke printString, strDiv invoke itoa, byte r1, itoaBuffer invoke printString, itoaBuffer invoke printString, strEq div byte r0, byte r1 invoke itoa, byte r0, itoaBuffer invoke printString, itoaBuffer invoke printChar, 10 jmp @b strDiv: db ' / ', 0 strEq: db ' = ', 0 itoaBuffer: db '-1234567890', 0 exceptionHandler: mov bp, sp invoke printChar, 10 .invalidOpcode: cmp r0, 0 jne .divByZero invoke printString, msgUnknownOpcode jmp @f .divByZero: cmp r0, 1 jne .memoryBounds invoke printString, msgDivByZero jmp @f .memoryBounds: cmp r0, 2 jne .default invoke printString, msgMemoryBounds jmp @f .default: invoke printString, msgUnknownException @@: invoke printChar, ':' invoke printChar, 10 mov r1, [bp + (0xC * 4)] mov r2, 5 @@: invoke disassemble, r1, disasmBuffer cmp r0, r0 jz .error invoke printString, disasmBuffer invoke printChar, 10 add r1, r0 dec r2 jnz @b jmp .return .error: invoke printString, msgDisasmError .return: jmp $ ; hang, returning will not help ; hardcoded interrupts best interruptTable: dd exceptionHandler rd 31 disasmBuffer: rb 75 msgUnknownOpcode: db 'Unknown opcode', 0 msgDivByZero: db 'Divide by zero', 0 msgMemoryBounds: db 'Read/write out of memory bounds', 0 msgUnknownException: db 'Unknown exception', 0 msgDisasmError: db 'Disassemble failed', 0 include 'lib/string.asm' include 'lib/term.asm' include 'lib/disasm.asm'
20.033708
57
0.683118
6f674db7b100def3a584aced50993d43394d2a9b
21,045
asm
Assembly
zxnftp/server/uart.c.asm
varmfskii/zxnext_tools
eddd4e9a4c00cb3fd6882f77b09accf88285dc54
[ "MIT" ]
25
2019-02-15T22:44:50.000Z
2021-09-08T19:01:01.000Z
zxnftp/server/uart.c.asm
varmfskii/zxnext_tools
eddd4e9a4c00cb3fd6882f77b09accf88285dc54
[ "MIT" ]
2
2020-03-06T15:44:55.000Z
2020-03-06T15:45:55.000Z
zxnftp/server/uart.c.asm
varmfskii/zxnext_tools
eddd4e9a4c00cb3fd6882f77b09accf88285dc54
[ "MIT" ]
1
2021-04-01T15:28:49.000Z
2021-04-01T15:28:49.000Z
;-------------------------------------------------------- ; File Created by SDCC : free open source ANSI-C Compiler ; Version 3.9.1 #11310 (Linux) ;-------------------------------------------------------- ; Processed by Z88DK ;-------------------------------------------------------- EXTERN __divschar EXTERN __divschar_callee EXTERN __divsint EXTERN __divsint_callee EXTERN __divslong EXTERN __divslong_callee EXTERN __divslonglong EXTERN __divslonglong_callee EXTERN __divsuchar EXTERN __divsuchar_callee EXTERN __divuchar EXTERN __divuchar_callee EXTERN __divuint EXTERN __divuint_callee EXTERN __divulong EXTERN __divulong_callee EXTERN __divulonglong EXTERN __divulonglong_callee EXTERN __divuschar EXTERN __divuschar_callee EXTERN __modschar EXTERN __modschar_callee EXTERN __modsint EXTERN __modsint_callee EXTERN __modslong EXTERN __modslong_callee EXTERN __modslonglong EXTERN __modslonglong_callee EXTERN __modsuchar EXTERN __modsuchar_callee EXTERN __moduchar EXTERN __moduchar_callee EXTERN __moduint EXTERN __moduint_callee EXTERN __modulong EXTERN __modulong_callee EXTERN __modulonglong EXTERN __modulonglong_callee EXTERN __moduschar EXTERN __moduschar_callee EXTERN __mulint EXTERN __mulint_callee EXTERN __mullong EXTERN __mullong_callee EXTERN __mullonglong EXTERN __mullonglong_callee EXTERN __mulschar EXTERN __mulschar_callee EXTERN __mulsuchar EXTERN __mulsuchar_callee EXTERN __muluschar EXTERN __muluschar_callee EXTERN __rlslonglong EXTERN __rlslonglong_callee EXTERN __rlulonglong EXTERN __rlulonglong_callee EXTERN __rrslonglong EXTERN __rrslonglong_callee EXTERN __rrulonglong EXTERN __rrulonglong_callee EXTERN ___sdcc_call_hl EXTERN ___sdcc_call_iy EXTERN ___sdcc_enter_ix EXTERN _banked_call EXTERN _banked_ret EXTERN ___fs2schar EXTERN ___fs2schar_callee EXTERN ___fs2sint EXTERN ___fs2sint_callee EXTERN ___fs2slong EXTERN ___fs2slong_callee EXTERN ___fs2slonglong EXTERN ___fs2slonglong_callee EXTERN ___fs2uchar EXTERN ___fs2uchar_callee EXTERN ___fs2uint EXTERN ___fs2uint_callee EXTERN ___fs2ulong EXTERN ___fs2ulong_callee EXTERN ___fs2ulonglong EXTERN ___fs2ulonglong_callee EXTERN ___fsadd EXTERN ___fsadd_callee EXTERN ___fsdiv EXTERN ___fsdiv_callee EXTERN ___fseq EXTERN ___fseq_callee EXTERN ___fsgt EXTERN ___fsgt_callee EXTERN ___fslt EXTERN ___fslt_callee EXTERN ___fsmul EXTERN ___fsmul_callee EXTERN ___fsneq EXTERN ___fsneq_callee EXTERN ___fssub EXTERN ___fssub_callee EXTERN ___schar2fs EXTERN ___schar2fs_callee EXTERN ___sint2fs EXTERN ___sint2fs_callee EXTERN ___slong2fs EXTERN ___slong2fs_callee EXTERN ___slonglong2fs EXTERN ___slonglong2fs_callee EXTERN ___uchar2fs EXTERN ___uchar2fs_callee EXTERN ___uint2fs EXTERN ___uint2fs_callee EXTERN ___ulong2fs EXTERN ___ulong2fs_callee EXTERN ___ulonglong2fs EXTERN ___ulonglong2fs_callee EXTERN ____sdcc_2_copy_src_mhl_dst_deix EXTERN ____sdcc_2_copy_src_mhl_dst_bcix EXTERN ____sdcc_4_copy_src_mhl_dst_deix EXTERN ____sdcc_4_copy_src_mhl_dst_bcix EXTERN ____sdcc_4_copy_src_mhl_dst_mbc EXTERN ____sdcc_4_ldi_nosave_bc EXTERN ____sdcc_4_ldi_save_bc EXTERN ____sdcc_4_push_hlix EXTERN ____sdcc_4_push_mhl EXTERN ____sdcc_lib_setmem_hl EXTERN ____sdcc_ll_add_de_bc_hl EXTERN ____sdcc_ll_add_de_bc_hlix EXTERN ____sdcc_ll_add_de_hlix_bc EXTERN ____sdcc_ll_add_de_hlix_bcix EXTERN ____sdcc_ll_add_deix_bc_hl EXTERN ____sdcc_ll_add_deix_hlix EXTERN ____sdcc_ll_add_hlix_bc_deix EXTERN ____sdcc_ll_add_hlix_deix_bc EXTERN ____sdcc_ll_add_hlix_deix_bcix EXTERN ____sdcc_ll_asr_hlix_a EXTERN ____sdcc_ll_asr_mbc_a EXTERN ____sdcc_ll_copy_src_de_dst_hlix EXTERN ____sdcc_ll_copy_src_de_dst_hlsp EXTERN ____sdcc_ll_copy_src_deix_dst_hl EXTERN ____sdcc_ll_copy_src_deix_dst_hlix EXTERN ____sdcc_ll_copy_src_deixm_dst_hlsp EXTERN ____sdcc_ll_copy_src_desp_dst_hlsp EXTERN ____sdcc_ll_copy_src_hl_dst_de EXTERN ____sdcc_ll_copy_src_hlsp_dst_de EXTERN ____sdcc_ll_copy_src_hlsp_dst_deixm EXTERN ____sdcc_ll_lsl_hlix_a EXTERN ____sdcc_ll_lsl_mbc_a EXTERN ____sdcc_ll_lsr_hlix_a EXTERN ____sdcc_ll_lsr_mbc_a EXTERN ____sdcc_ll_push_hlix EXTERN ____sdcc_ll_push_mhl EXTERN ____sdcc_ll_sub_de_bc_hl EXTERN ____sdcc_ll_sub_de_bc_hlix EXTERN ____sdcc_ll_sub_de_hlix_bc EXTERN ____sdcc_ll_sub_de_hlix_bcix EXTERN ____sdcc_ll_sub_deix_bc_hl EXTERN ____sdcc_ll_sub_deix_hlix EXTERN ____sdcc_ll_sub_hlix_bc_deix EXTERN ____sdcc_ll_sub_hlix_deix_bc EXTERN ____sdcc_ll_sub_hlix_deix_bcix EXTERN ____sdcc_load_debc_deix EXTERN ____sdcc_load_dehl_deix EXTERN ____sdcc_load_debc_mhl EXTERN ____sdcc_load_hlde_mhl EXTERN ____sdcc_store_dehl_bcix EXTERN ____sdcc_store_debc_hlix EXTERN ____sdcc_store_debc_mhl EXTERN ____sdcc_cpu_pop_ei EXTERN ____sdcc_cpu_pop_ei_jp EXTERN ____sdcc_cpu_push_di EXTERN ____sdcc_outi EXTERN ____sdcc_outi_128 EXTERN ____sdcc_outi_256 EXTERN ____sdcc_ldi EXTERN ____sdcc_ldi_128 EXTERN ____sdcc_ldi_256 EXTERN ____sdcc_4_copy_srcd_hlix_dst_deix EXTERN ____sdcc_4_and_src_mbc_mhl_dst_deix EXTERN ____sdcc_4_or_src_mbc_mhl_dst_deix EXTERN ____sdcc_4_xor_src_mbc_mhl_dst_deix EXTERN ____sdcc_4_or_src_dehl_dst_bcix EXTERN ____sdcc_4_xor_src_dehl_dst_bcix EXTERN ____sdcc_4_and_src_dehl_dst_bcix EXTERN ____sdcc_4_xor_src_mbc_mhl_dst_debc EXTERN ____sdcc_4_or_src_mbc_mhl_dst_debc EXTERN ____sdcc_4_and_src_mbc_mhl_dst_debc EXTERN ____sdcc_4_cpl_src_mhl_dst_debc EXTERN ____sdcc_4_xor_src_debc_mhl_dst_debc EXTERN ____sdcc_4_or_src_debc_mhl_dst_debc EXTERN ____sdcc_4_and_src_debc_mhl_dst_debc EXTERN ____sdcc_4_and_src_debc_hlix_dst_debc EXTERN ____sdcc_4_or_src_debc_hlix_dst_debc EXTERN ____sdcc_4_xor_src_debc_hlix_dst_debc ;-------------------------------------------------------- ; Public variables in this module ;-------------------------------------------------------- GLOBAL _cmdresponse GLOBAL _uartchar GLOBAL _uartresponse GLOBAL _uartwrite ;-------------------------------------------------------- ; Externals used ;-------------------------------------------------------- GLOBAL _senderr GLOBAL _nettx GLOBAL _netrx GLOBAL _cmd_simple GLOBAL _cmd_rmdir GLOBAL _cmd_rm GLOBAL _cmd_quit GLOBAL _cmd_pwd GLOBAL _cmd_put GLOBAL _cmd_mkdir GLOBAL _cmd_ls GLOBAL _cmd_l_ GLOBAL _cmd_id GLOBAL _cmd_get GLOBAL _cmd_exit GLOBAL _cmd_drive GLOBAL _cmd_cd GLOBAL _cmd_baud GLOBAL _setbaud GLOBAL _ffsll_callee GLOBAL _ffsll GLOBAL _strxfrm_callee GLOBAL _strxfrm GLOBAL _strupr_fastcall GLOBAL _strupr GLOBAL _strtok_r_callee GLOBAL _strtok_r GLOBAL _strtok_callee GLOBAL _strtok GLOBAL _strstrip_fastcall GLOBAL _strstrip GLOBAL _strstr_callee GLOBAL _strstr GLOBAL _strspn_callee GLOBAL _strspn GLOBAL _strsep_callee GLOBAL _strsep GLOBAL _strrstrip_fastcall GLOBAL _strrstrip GLOBAL _strrstr_callee GLOBAL _strrstr GLOBAL _strrspn_callee GLOBAL _strrspn GLOBAL _strrev_fastcall GLOBAL _strrev GLOBAL _strrcspn_callee GLOBAL _strrcspn GLOBAL _strrchr_callee GLOBAL _strrchr GLOBAL _strpbrk_callee GLOBAL _strpbrk GLOBAL _strnlen_callee GLOBAL _strnlen GLOBAL _strnicmp_callee GLOBAL _strnicmp GLOBAL _strndup_callee GLOBAL _strndup GLOBAL _strncpy_callee GLOBAL _strncpy GLOBAL _strncmp_callee GLOBAL _strncmp GLOBAL _strnchr_callee GLOBAL _strnchr GLOBAL _strncat_callee GLOBAL _strncat GLOBAL _strncasecmp_callee GLOBAL _strncasecmp GLOBAL _strlwr_fastcall GLOBAL _strlwr GLOBAL _strlen_fastcall GLOBAL _strlen GLOBAL _strlcpy_callee GLOBAL _strlcpy GLOBAL _strlcat_callee GLOBAL _strlcat GLOBAL _stricmp_callee GLOBAL _stricmp GLOBAL _strerror_fastcall GLOBAL _strerror GLOBAL _strdup_fastcall GLOBAL _strdup GLOBAL _strcspn_callee GLOBAL _strcspn GLOBAL _strcpy_callee GLOBAL _strcpy GLOBAL _strcoll_callee GLOBAL _strcoll GLOBAL _strcmp_callee GLOBAL _strcmp GLOBAL _strchrnul_callee GLOBAL _strchrnul GLOBAL _strchr_callee GLOBAL _strchr GLOBAL _strcat_callee GLOBAL _strcat GLOBAL _strcasecmp_callee GLOBAL _strcasecmp GLOBAL _stpncpy_callee GLOBAL _stpncpy GLOBAL _stpcpy_callee GLOBAL _stpcpy GLOBAL _memswap_callee GLOBAL _memswap GLOBAL _memset_callee GLOBAL _memset GLOBAL _memrchr_callee GLOBAL _memrchr GLOBAL _memmove_callee GLOBAL _memmove GLOBAL _memmem_callee GLOBAL _memmem GLOBAL _memcpy_callee GLOBAL _memcpy GLOBAL _memcmp_callee GLOBAL _memcmp GLOBAL _memchr_callee GLOBAL _memchr GLOBAL _memccpy_callee GLOBAL _memccpy GLOBAL _ffsl_fastcall GLOBAL _ffsl GLOBAL _ffs_fastcall GLOBAL _ffs GLOBAL __strrstrip__fastcall GLOBAL __strrstrip_ GLOBAL __memupr__callee GLOBAL __memupr_ GLOBAL __memstrcpy__callee GLOBAL __memstrcpy_ GLOBAL __memlwr__callee GLOBAL __memlwr_ GLOBAL _rawmemchr_callee GLOBAL _rawmemchr GLOBAL _strnset_callee GLOBAL _strnset GLOBAL _strset_callee GLOBAL _strset GLOBAL _rindex_callee GLOBAL _rindex GLOBAL _index_callee GLOBAL _index GLOBAL _bzero_callee GLOBAL _bzero GLOBAL _bcopy_callee GLOBAL _bcopy GLOBAL _bcmp_callee GLOBAL _bcmp GLOBAL _env_getenv_callee GLOBAL _env_getenv GLOBAL _getenv_ex_callee GLOBAL _getenv_ex GLOBAL _getenv_fastcall GLOBAL _getenv GLOBAL _mkstemp_ex_fastcall GLOBAL _mkstemp_ex GLOBAL _ulltoa_callee GLOBAL _ulltoa GLOBAL _strtoull_callee GLOBAL _strtoull GLOBAL _strtoll_callee GLOBAL _strtoll GLOBAL _lltoa_callee GLOBAL _lltoa GLOBAL _llabs_callee GLOBAL _llabs GLOBAL __lldivu__callee GLOBAL __lldivu_ GLOBAL __lldiv__callee GLOBAL __lldiv_ GLOBAL _atoll_callee GLOBAL _atoll GLOBAL _realloc_unlocked_callee GLOBAL _realloc_unlocked GLOBAL _malloc_unlocked_fastcall GLOBAL _malloc_unlocked GLOBAL _free_unlocked_fastcall GLOBAL _free_unlocked GLOBAL _calloc_unlocked_callee GLOBAL _calloc_unlocked GLOBAL _aligned_alloc_unlocked_callee GLOBAL _aligned_alloc_unlocked GLOBAL _realloc_callee GLOBAL _realloc GLOBAL _malloc_fastcall GLOBAL _malloc GLOBAL _free_fastcall GLOBAL _free GLOBAL _calloc_callee GLOBAL _calloc GLOBAL _aligned_alloc_callee GLOBAL _aligned_alloc GLOBAL _utoa_callee GLOBAL _utoa GLOBAL _ultoa_callee GLOBAL _ultoa GLOBAL _system_fastcall GLOBAL _system GLOBAL _strtoul_callee GLOBAL _strtoul GLOBAL _strtol_callee GLOBAL _strtol GLOBAL _strtof_callee GLOBAL _strtof GLOBAL _strtod_callee GLOBAL _strtod GLOBAL _srand_fastcall GLOBAL _srand GLOBAL _rand GLOBAL _quick_exit_fastcall GLOBAL _quick_exit GLOBAL _qsort_callee GLOBAL _qsort GLOBAL _ltoa_callee GLOBAL _ltoa GLOBAL _labs_fastcall GLOBAL _labs GLOBAL _itoa_callee GLOBAL _itoa GLOBAL _ftoh_callee GLOBAL _ftoh GLOBAL _ftog_callee GLOBAL _ftog GLOBAL _ftoe_callee GLOBAL _ftoe GLOBAL _ftoa_callee GLOBAL _ftoa GLOBAL _exit_fastcall GLOBAL _exit GLOBAL _dtoh_callee GLOBAL _dtoh GLOBAL _dtog_callee GLOBAL _dtog GLOBAL _dtoe_callee GLOBAL _dtoe GLOBAL _dtoa_callee GLOBAL _dtoa GLOBAL _bsearch_callee GLOBAL _bsearch GLOBAL _atol_fastcall GLOBAL _atol GLOBAL _atoi_fastcall GLOBAL _atoi GLOBAL _atof_fastcall GLOBAL _atof GLOBAL _atexit_fastcall GLOBAL _atexit GLOBAL _at_quick_exit_fastcall GLOBAL _at_quick_exit GLOBAL _abs_fastcall GLOBAL _abs GLOBAL _abort GLOBAL __strtou__callee GLOBAL __strtou_ GLOBAL __strtoi__callee GLOBAL __strtoi_ GLOBAL __random_uniform_xor_8__fastcall GLOBAL __random_uniform_xor_8_ GLOBAL __random_uniform_xor_32__fastcall GLOBAL __random_uniform_xor_32_ GLOBAL __random_uniform_cmwc_8__fastcall GLOBAL __random_uniform_cmwc_8_ GLOBAL __shellsort__callee GLOBAL __shellsort_ GLOBAL __quicksort__callee GLOBAL __quicksort_ GLOBAL __insertion_sort__callee GLOBAL __insertion_sort_ GLOBAL __ldivu__callee GLOBAL __ldivu_ GLOBAL __ldiv__callee GLOBAL __ldiv_ GLOBAL __divu__callee GLOBAL __divu_ GLOBAL __div__callee GLOBAL __div_ GLOBAL _tmpnam_ex_fastcall GLOBAL _tmpnam_ex GLOBAL _tmpnam_fastcall GLOBAL _tmpnam GLOBAL _vscanf_unlocked_callee GLOBAL _vscanf_unlocked GLOBAL _vprintf_unlocked_callee GLOBAL _vprintf_unlocked GLOBAL _vfscanf_unlocked_callee GLOBAL _vfscanf_unlocked GLOBAL _vfprintf_unlocked_callee GLOBAL _vfprintf_unlocked GLOBAL _ungetc_unlocked_callee GLOBAL _ungetc_unlocked GLOBAL _scanf_unlocked GLOBAL _rewind_unlocked_fastcall GLOBAL _rewind_unlocked GLOBAL _puts_unlocked_fastcall GLOBAL _puts_unlocked GLOBAL _putchar_unlocked_fastcall GLOBAL _putchar_unlocked GLOBAL _putc_unlocked_callee GLOBAL _putc_unlocked GLOBAL _printf_unlocked GLOBAL _gets_unlocked_fastcall GLOBAL _gets_unlocked GLOBAL _getline_unlocked_callee GLOBAL _getline_unlocked GLOBAL _getdelim_unlocked_callee GLOBAL _getdelim_unlocked GLOBAL _getchar_unlocked GLOBAL _getc_unlocked_fastcall GLOBAL _getc_unlocked GLOBAL _fwrite_unlocked_callee GLOBAL _fwrite_unlocked GLOBAL _ftell_unlocked_fastcall GLOBAL _ftell_unlocked GLOBAL _fsetpos_unlocked_callee GLOBAL _fsetpos_unlocked GLOBAL _fseek_unlocked_callee GLOBAL _fseek_unlocked GLOBAL _fscanf_unlocked GLOBAL _freopen_unlocked_callee GLOBAL _freopen_unlocked GLOBAL _fread_unlocked_callee GLOBAL _fread_unlocked GLOBAL _fputs_unlocked_callee GLOBAL _fputs_unlocked GLOBAL _fputc_unlocked_callee GLOBAL _fputc_unlocked GLOBAL _fprintf_unlocked GLOBAL _fileno_unlocked_fastcall GLOBAL _fileno_unlocked GLOBAL _fgets_unlocked_callee GLOBAL _fgets_unlocked GLOBAL _fgetpos_unlocked_callee GLOBAL _fgetpos_unlocked GLOBAL _fgetc_unlocked_fastcall GLOBAL _fgetc_unlocked GLOBAL _fflush_unlocked_fastcall GLOBAL _fflush_unlocked GLOBAL _ferror_unlocked_fastcall GLOBAL _ferror_unlocked GLOBAL _feof_unlocked_fastcall GLOBAL _feof_unlocked GLOBAL _fclose_unlocked_fastcall GLOBAL _fclose_unlocked GLOBAL _clearerr_unlocked_fastcall GLOBAL _clearerr_unlocked GLOBAL _vsscanf_callee GLOBAL _vsscanf GLOBAL _vsprintf_callee GLOBAL _vsprintf GLOBAL _vsnprintf_callee GLOBAL _vsnprintf GLOBAL _vscanf_callee GLOBAL _vscanf GLOBAL _vprintf_callee GLOBAL _vprintf GLOBAL _vfscanf_callee GLOBAL _vfscanf GLOBAL _vfprintf_callee GLOBAL _vfprintf GLOBAL _vasprintf_callee GLOBAL _vasprintf GLOBAL _ungetc_callee GLOBAL _ungetc GLOBAL _sscanf GLOBAL _sprintf GLOBAL _snprintf GLOBAL _scanf GLOBAL _rewind_fastcall GLOBAL _rewind GLOBAL _puts_fastcall GLOBAL _puts GLOBAL _putchar_fastcall GLOBAL _putchar GLOBAL _putc_callee GLOBAL _putc GLOBAL _printf GLOBAL _perror_fastcall GLOBAL _perror GLOBAL _open_memstream_callee GLOBAL _open_memstream GLOBAL _obstack_vprintf_callee GLOBAL _obstack_vprintf GLOBAL _obstack_printf GLOBAL _gets_fastcall GLOBAL _gets GLOBAL _getline_callee GLOBAL _getline GLOBAL _getdelim_callee GLOBAL _getdelim GLOBAL _getchar GLOBAL _getc_fastcall GLOBAL _getc GLOBAL _fwrite_callee GLOBAL _fwrite GLOBAL _funlockfile_fastcall GLOBAL _funlockfile GLOBAL _ftrylockfile_fastcall GLOBAL _ftrylockfile GLOBAL _ftell_fastcall GLOBAL _ftell GLOBAL _fsetpos_callee GLOBAL _fsetpos GLOBAL _fseek_callee GLOBAL _fseek GLOBAL _fscanf GLOBAL _freopen_callee GLOBAL _freopen GLOBAL _fread_callee GLOBAL _fread GLOBAL _fputs_callee GLOBAL _fputs GLOBAL _fputc_callee GLOBAL _fputc GLOBAL _fprintf GLOBAL _fopen_callee GLOBAL _fopen GLOBAL _fmemopen_callee GLOBAL _fmemopen GLOBAL _flockfile_fastcall GLOBAL _flockfile GLOBAL _fileno_fastcall GLOBAL _fileno GLOBAL _fgets_callee GLOBAL _fgets GLOBAL _fgetpos_callee GLOBAL _fgetpos GLOBAL _fgetc_fastcall GLOBAL _fgetc GLOBAL _fflush_fastcall GLOBAL _fflush GLOBAL _ferror_fastcall GLOBAL _ferror GLOBAL _feof_fastcall GLOBAL _feof GLOBAL _fdopen_callee GLOBAL _fdopen GLOBAL _fclose_fastcall GLOBAL _fclose GLOBAL _clearerr_fastcall GLOBAL _clearerr GLOBAL _asprintf GLOBAL __fmemopen__callee GLOBAL __fmemopen_ GLOBAL _line GLOBAL _bbuf GLOBAL _buf GLOBAL _stderr GLOBAL _stdout GLOBAL _stdin GLOBAL __MAX_FOPEN ;-------------------------------------------------------- ; special function registers ;-------------------------------------------------------- defc _TX = 0x133b defc _RX = 0x143b ;-------------------------------------------------------- ; ram data ;-------------------------------------------------------- SECTION bss_compiler ;-------------------------------------------------------- ; ram data ;-------------------------------------------------------- IF 0 ; .area _INITIALIZED removed by z88dk ENDIF ;-------------------------------------------------------- ; absolute external ram data ;-------------------------------------------------------- SECTION IGNORE ;-------------------------------------------------------- ; global & static initialisations ;-------------------------------------------------------- SECTION code_crt_init ;-------------------------------------------------------- ; Home ;-------------------------------------------------------- SECTION IGNORE ;-------------------------------------------------------- ; code ;-------------------------------------------------------- SECTION code_compiler ; --------------------------------- ; Function cmdresponse ; --------------------------------- _cmdresponse: push ix ld ix,0 add ix,sp ld l,(ix+4) ld h,(ix+5) call _strlen_fastcall push hl ld l,(ix+4) ld h,(ix+5) push hl call _uartwrite pop af pop af pop ix jp _uartresponse SECTION code_compiler ; --------------------------------- ; Function uartchar ; --------------------------------- _uartchar: l_uartchar_00101: ld a, +((_TX) / 256) in a, (((_TX) & 0xFF)) sub a,0x01 ld a,0x00 rla bit 0, a jr NZ,l_uartchar_00101 ld a, +((_RX) / 256) in a, (((_RX) & 0xFF)) ld l, a ret SECTION code_compiler ; --------------------------------- ; Function uartresponse ; --------------------------------- _uartresponse: push ix ld ix,0 add ix,sp ld hl, -277 add hl, sp ld sp, hl ld hl,255 add hl, sp ld (ix-12),l ld (ix-11),h ld l,(ix-12) ld h,(ix-11) ld (hl), +((___str_0) & 0xFF) inc hl ld (hl), +((___str_0) / 256) ld c,(ix-12) ld b,(ix-11) inc bc inc bc ld a, +((___str_1) & 0xFF) ld (bc), a inc bc ld a, +((___str_1) / 256) ld (bc), a ld a,(ix-12) add a,0x04 ld c, a ld a,(ix-11) adc a,0x00 ld b, a ld a, +((___str_2) & 0xFF) ld (bc), a inc bc ld a, +((___str_2) / 256) ld (bc), a ld a,(ix-12) add a,0x06 ld c, a ld a,(ix-11) adc a,0x00 ld b, a ld a, +((___str_3) & 0xFF) ld (bc), a inc bc ld a, +((___str_3) / 256) ld (bc), a ld a,(ix-12) add a,0x08 ld l, a ld a,(ix-11) adc a,0x00 ld h, a ld (hl),0x00 inc hl ld (hl),0x00 ld (ix-2),0x00 ld (ix-1),0x00 ld hl,0 add hl, sp ld (ix-10),l ld (ix-9),h l_uartresponse_00111: ld a,(ix-2) sub a,0xff ld a,(ix-1) rla ccf rra sbc a,0x80 jp NC, l_uartresponse_00106 ld c,(ix-2) ld b,(ix-1) inc (ix-2) jr NZ,l_uartresponse_00145 inc (ix-1) l_uartresponse_00145: ld a, c add a,(ix-10) ld c, a ld a, b adc a,(ix-9) ld b, a push bc call _uartchar ld a, l pop bc ld (bc), a sub a,0x0a jr NZ,l_uartresponse_00111 ld c,(ix-2) ld b,(ix-1) dec bc ld l,(ix-10) ld h,(ix-9) add hl, bc ld (hl),0x00 ld (ix-8),0x00 ld (ix-7),0x00 ld a,(ix-10) ld (ix-6),a ld a,(ix-9) ld (ix-5),a ld (ix-2),0x00 ld (ix-1),0x00 l_uartresponse_00108: ld c,(ix-2) ld b,(ix-1) sla c rl b ld l,(ix-12) ld h,(ix-11) add hl, bc ld c, (hl) inc hl ld b, (hl) ld a, b or a, c jr Z,l_uartresponse_00103 ld e,(ix-6) ld d,(ix-5) push bc push de call _strcmp_callee ld (ix-4),l ld (ix-3),h ld a, h or a,(ix-4) jr NZ,l_uartresponse_00109 ld a,(ix-8) ld (ix-1),a ld l, a jr l_uartresponse_00113 l_uartresponse_00109: inc (ix-2) jr NZ,l_uartresponse_00150 inc (ix-1) l_uartresponse_00150: ld a,(ix-2) ld (ix-8),a ld a,(ix-1) ld (ix-7),a jr l_uartresponse_00108 l_uartresponse_00103: ld (ix-2),0x00 ld (ix-1),0x00 jp l_uartresponse_00111 l_uartresponse_00106: ld hl,___str_4 push hl ld hl, (_stderr) push hl call _fprintf pop af pop af ld hl,0x0001 call _exit_fastcall ld l,0xff l_uartresponse_00113: ld sp, ix pop ix ret SECTION rodata_compiler ___str_0: DEFM "OK" DEFB 0x0d DEFB 0x00 SECTION rodata_compiler ___str_1: DEFM "ERROR" DEFB 0x0d DEFB 0x00 SECTION rodata_compiler ___str_2: DEFM "SEND OK" DEFB 0x0d DEFB 0x00 SECTION rodata_compiler ___str_3: DEFM "SEND FAIL" DEFB 0x0d DEFB 0x00 SECTION rodata_compiler ___str_4: DEFM "Line length exceeded" DEFB 0x0a DEFB 0x00 SECTION code_compiler ; --------------------------------- ; Function uartwrite ; --------------------------------- _uartwrite: push ix ld ix,0 add ix,sp ld bc,0x0000 l_uartwrite_00109: ld a, c sub a,(ix+6) ld a, b sbc a,(ix+7) jp PO, l_uartwrite_00134 xor a,0x80 l_uartwrite_00134: jp P, l_uartwrite_00105 l_uartwrite_00101: ld a, +((_TX) / 256) in a, (((_TX) & 0xFF)) bit 1, a jr NZ,l_uartwrite_00101 ld a,(ix+4) add a, c ld e, a ld a,(ix+5) adc a, b ld d, a ld a, (de) push bc ld bc,_TX out (c),a pop bc inc bc jr l_uartwrite_00109 l_uartwrite_00105: ld a, +((_TX) / 256) in a, (((_TX) & 0xFF)) bit 1, a jr NZ,l_uartwrite_00105 pop ix ret SECTION IGNORE
21.785714
57
0.766405
d0524ed4f3d39747e9a24096c1a6c86e1dbecbca
556
asm
Assembly
programs/oeis/274/A274575.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
22
2018-02-06T19:19:31.000Z
2022-01-17T21:53:31.000Z
programs/oeis/274/A274575.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
41
2021-02-22T19:00:34.000Z
2021-08-28T10:47:47.000Z
programs/oeis/274/A274575.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
5
2021-02-24T21:14:16.000Z
2021-08-09T19:48:05.000Z
; A274575: For m=1,2,3,... write all the 2^m binary vectors of length m in increasing order, and replace each vector with (number of 1's) - (number of 0's). Start with an initial 0 for the empty vector. ; 0,-1,1,-2,0,0,2,-3,-1,-1,1,-1,1,1,3,-4,-2,-2,0,-2,0,0,2,-2,0,0,2,0,2,2,4,-5,-3,-3,-1,-3,-1,-1,1,-3,-1,-1,1,-1,1,1,3,-3,-1,-1,1,-1,1,1,3,-1,1,1,3,1,3,3,5,-6,-4,-4,-2,-4,-2,-2,0,-4,-2,-2,0,-2,0,0,2,-4,-2,-2,0,-2,0,0,2,-2,0,0,2,0,2,2,4,-4,-2,-2,0,-2 add $0,1 seq $0,145037 ; Number of 1's minus number of 0's in the binary representation of n. sub $0,1
79.428571
248
0.573741
435eba1bcff6c124af0f3c74e06383a7dbed60b8
1,223
asm
Assembly
src/arch/x86/lib/io.asm
Eytoue/PencilKernel
f00b331c09a6d0fe7a5df34a25ac9113f9d047d4
[ "MIT" ]
2
2022-02-03T07:32:13.000Z
2022-02-12T11:56:00.000Z
src/arch/x86/lib/io.asm
Eytoue/PencilKernel
f00b331c09a6d0fe7a5df34a25ac9113f9d047d4
[ "MIT" ]
1
2022-02-10T02:59:10.000Z
2022-03-22T06:51:51.000Z
src/arch/x86/lib/io.asm
LinChenjun2008/Pencil-Kernel
f00b331c09a6d0fe7a5df34a25ac9113f9d047d4
[ "MIT" ]
null
null
null
[bits 32] section .text ;io端口操作函数 ;uint32_t io_in8(uint32_t port); global io_in8 io_in8: push ebp mov ebp,esp mov edx,[ebp + 8] mov eax,0 in al,dx pop ebp ret ;uint32_t io_in16(uint32_t port); global io_in16 io_in16: push ebp mov ebp,esp mov edx,[ebp + 8] mov eax,0 in ax,dx pop ebp ret ;uint32_t io_in32(uint32_t port); global io_in32 io_in32: push ebp mov ebp,esp mov edx,[esp + 8] mov eax,0 in eax,dx pop ebp ret ;void io_out8(uint32_t port,uint32_t data); global io_out8 io_out8: push ebp mov ebp,esp mov edx,[esp + 8] mov eax,[esp + 12] out dx,al pop ebp ret ;void io_out16(uint32_t port,uint32_t data); global io_out16 io_out16: push ebp mov ebp,esp mov edx,[ebp + 8] mov eax,[ebp + 12] out dx,ax pop ebp ret ;void io_out32(uint32_t port,uint32_t data); global io_out32 io_out32: push ebp mov ebp,esp mov edx,[esp + 8] mov eax,[esp + 12] out dx,eax pop ebp ret global io_sti io_sti: sti ret global io_cli io_cli: cli ret global get_flages get_flages: push ebp mov ebp,esp pushfd pop eax pop ebp ret
13.588889
44
0.613246
a1c808cb74bcf76bbd6f52c59cafee7ac83af671
259
asm
Assembly
libsrc/_DEVELOPMENT/compress/zx0/c/sccz80/dzx0_standard_back_callee.asm
w5Mike/z88dk
f5090488e1d74ead8c865afe6df48231cd5c70ba
[ "ClArtistic" ]
null
null
null
libsrc/_DEVELOPMENT/compress/zx0/c/sccz80/dzx0_standard_back_callee.asm
w5Mike/z88dk
f5090488e1d74ead8c865afe6df48231cd5c70ba
[ "ClArtistic" ]
null
null
null
libsrc/_DEVELOPMENT/compress/zx0/c/sccz80/dzx0_standard_back_callee.asm
w5Mike/z88dk
f5090488e1d74ead8c865afe6df48231cd5c70ba
[ "ClArtistic" ]
null
null
null
; void dzx0_standard_back_callee(void *src, void *dst) SECTION code_clib SECTION code_compress_zx0 PUBLIC dzx0_standard_back_callee EXTERN asm_dzx0_standard_back dzx0_standard_back_callee: pop hl pop de ex (sp),hl jp asm_dzx0_standard_back
14.388889
54
0.799228
10a7f1f1aab24b7e8eb6a4097629750716d87a66
1,719
asm
Assembly
programs/oeis/011/A011889.asm
karttu/loda
9c3b0fc57b810302220c044a9d17db733c76a598
[ "Apache-2.0" ]
1
2021-03-15T11:38:20.000Z
2021-03-15T11:38:20.000Z
programs/oeis/011/A011889.asm
karttu/loda
9c3b0fc57b810302220c044a9d17db733c76a598
[ "Apache-2.0" ]
null
null
null
programs/oeis/011/A011889.asm
karttu/loda
9c3b0fc57b810302220c044a9d17db733c76a598
[ "Apache-2.0" ]
null
null
null
; A011889: a(n) = floor(n*(n-1)*(n-2)/7). ; 0,0,0,0,3,8,17,30,48,72,102,141,188,245,312,390,480,582,699,830,977,1140,1320,1518,1734,1971,2228,2507,2808,3132,3480,3852,4251,4676,5129,5610,6120,6660,7230,7833,8468,9137,9840,10578,11352,12162,13011,13898,14825,15792,16800,17850,18942,20079,21260,22487,23760,25080,26448,27864,29331,30848,32417,34038,35712,37440,39222,41061,42956,44909,46920,48990,51120,53310,55563,57878,60257,62700,65208,67782,70422,73131,75908,78755,81672,84660,87720,90852,94059,97340,100697,104130,107640,111228,114894,118641,122468,126377,130368,134442,138600,142842,147171,151586,156089,160680,165360,170130,174990,179943,184988,190127,195360,200688,206112,211632,217251,222968,228785,234702,240720,246840,253062,259389,265820,272357,279000,285750,292608,299574,306651,313838,321137,328548,336072,343710,351462,359331,367316,375419,383640,391980,400440,409020,417723,426548,435497,444570,453768,463092,472542,482121,491828,501665,511632,521730,531960,542322,552819,563450,574217,585120,596160,607338,618654,630111,641708,653447,665328,677352,689520,701832,714291,726896,739649,752550,765600,778800,792150,805653,819308,833117,847080,861198,875472,889902,904491,919238,934145,949212,964440,979830,995382,1011099,1026980,1043027,1059240,1075620,1092168,1108884,1125771,1142828,1160057,1177458,1195032,1212780,1230702,1248801,1267076,1285529,1304160,1322970,1341960,1361130,1380483,1400018,1419737,1439640,1459728,1480002,1500462,1521111,1541948,1562975,1584192,1605600,1627200,1648992,1670979,1693160,1715537,1738110,1760880,1783848,1807014,1830381,1853948,1877717,1901688,1925862,1950240,1974822,1999611,2024606,2049809,2075220,2100840,2126670,2152710,2178963 bin $0,3 mul $0,6 div $0,7 mov $1,$0
214.875
1,638
0.830134
10afe6cc72c9e30286f1dc36dca5689e255bf5b1
4,052
asm
Assembly
Transynther/x86/_processed/NONE/_zr_/i7-8650U_0xd2.log_15665_24.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
9
2020-08-13T19:41:58.000Z
2022-03-30T12:22:51.000Z
Transynther/x86/_processed/NONE/_zr_/i7-8650U_0xd2.log_15665_24.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
1
2021-04-29T06:29:35.000Z
2021-05-13T21:02:30.000Z
Transynther/x86/_processed/NONE/_zr_/i7-8650U_0xd2.log_15665_24.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
3
2020-07-14T17:07:07.000Z
2022-03-21T01:12:22.000Z
.global s_prepare_buffers s_prepare_buffers: push %r10 push %r14 push %r9 push %rax lea addresses_normal_ht+0xf6bc, %r14 nop nop nop nop nop xor $34407, %r9 mov (%r14), %r10 nop nop cmp $12000, %rax pop %rax pop %r9 pop %r14 pop %r10 ret .global s_faulty_load s_faulty_load: push %r13 push %r15 push %rax push %rcx push %rdi push %rdx // Faulty Load lea addresses_WC+0x1a368, %rcx nop nop nop nop nop xor %r15, %r15 movups (%rcx), %xmm3 vpextrq $1, %xmm3, %r13 lea oracles, %r15 and $0xff, %r13 shlq $12, %r13 mov (%r15,%r13,1), %r13 pop %rdx pop %rdi pop %rcx pop %rax pop %r15 pop %r13 ret /* <gen_faulty_load> [REF] {'OP': 'LOAD', 'src': {'type': 'addresses_WC', 'size': 16, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': False}} [Faulty Load] {'OP': 'LOAD', 'src': {'type': 'addresses_WC', 'size': 16, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': True}} <gen_prepare_buffer> {'OP': 'LOAD', 'src': {'type': 'addresses_normal_ht', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 1, 'same': False}} {'00': 15665} 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 */
61.393939
2,999
0.663376
3e402d36de5ff1ade6c12859c147d028809606f3
6,747
asm
Assembly
engine/math.asm
richard42/dynosprite
0b83f640a63656087653266baa2ec2499a39538d
[ "BSD-2-Clause" ]
10
2015-04-16T20:48:06.000Z
2021-09-07T02:08:30.000Z
engine/math.asm
jamieleecho/space-bandits
b0f45c4d6e8a2bbf8d1653b7b3c10059fa9ff13d
[ "BSD-2-Clause" ]
1
2016-12-04T23:18:42.000Z
2016-12-05T01:17:49.000Z
engine/math.asm
jamieleecho/space-bandits
b0f45c4d6e8a2bbf8d1653b7b3c10059fa9ff13d
[ "BSD-2-Clause" ]
8
2015-01-04T17:05:42.000Z
2021-01-31T01:46:13.000Z
********************************************************************************* * DynoSprite - math.asm * Copyright (c) 2013, Richard Goedeken * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * * * Redistributions of source code must retain the above copyright notice, this * list of conditions and the following disclaimer. * * * Redistributions in binary form must reproduce the above copyright notice, * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ********************************************************************************* *********************************************************** * Math_Divide16by8: * * This routine divides a 16-bit unsigned integer by an 8-bit unsigned integer, * producing a 16-bit quotient and 8-bit remainder. The algorithm was taken from: * http://www.programmersheaven.com/mb/pharabee/175172/175172/motorola-6809--divison-routines-anyone/ * * - IN: Math_Dividend_16, Math_Divisor_8 * - OUT: Math_Quotient_16, Math_Remainder_8 * - Trashed: A,B,X,Y *********************************************************** Math_Dividend_16 rmd 1 Math_Divisor_8 rmb 1 Math_Quotient_16 rmd 1 Math_Remainder_8 rmb 1 * * 16-bit by 8-bit division * Timing = 18 + 16*(45) + 30 = 768 clock cycles * LoopCount@ rmb 1 * Math_Divide16by8: ldx #16 * 3 sta LoopCount@ * 5 ldy #0 * 4 (clear remainder) ldd Math_Dividend_16 * 6 (working quotient) DivLoop@ rolb * 2 eorb #1 * 2 rola * 2 exg d,y * 8 rola * 2 suba Math_Divisor_8 * 5 bcc DivLoop_NoBorrow@ * 3 adda Math_Divisor_8 * 5 DivLoop_NoBorrow@ exg d,y * 8 leax -1,x * 5 bne DivLoop@ * 3 rolb * 2 eorb #1 * 2 rola * 2 std Math_Quotient_16 * 6 exg d,y * 8 sta Math_Remainder_8 * 5 rts * 5 *********************************************************** * Math_Divide16by16: * * This routine divides a 16-bit unsigned integer by an 16-bit unsigned integer, * producing a 16-bit quotient and 16-bit remainder. * * - IN: Math_Dividend_16, Math_Divisor_16 * - OUT: Math_Quotient_16, Math_Remainder_16 * - Trashed: A,B,X,Y *********************************************************** Math_Divisor_16 rmd 1 Math_Remainder_16 rmd 1 * * 16-bit by 16-bit division * Timing = 18 + 16*(51) + 31 = 865 clock cycles * LoopCount@ rmb 1 * Math_Divide16by16: ldx #16 * 3 sta LoopCount@ * 5 ldy #0 * 4 (clear remainder) ldd Math_Dividend_16 * 6 (working quotient) DivLoop@ rolb * 2 eorb #1 * 2 rola * 2 exg d,y * 8 rolb * 2 rola * 2 subd Math_Divisor_16 * 7 bcc DivLoop_NoBorrow@ * 3 addd Math_Divisor_16 * 7 DivLoop_NoBorrow@ exg d,y * 8 leax -1,x * 5 bne DivLoop@ * 3 rolb * 2 eorb #1 * 2 rola * 2 std Math_Quotient_16 * 6 exg d,y * 8 std Math_Remainder_16 * 6 rts * 5 *********************************************************** * Math_Multiply16by16: * * - IN: Math_Multiplicand_16, Math_Multiplier_16 * - OUT: Math_Product_32 * - Trashed: A,B *********************************************************** Math_Multiplicand_16 rmd 1 Math_Multiplier_16 rmd 1 Math_Product_32 rmd 2 * Math_Multiply16by16: clra clrb std Math_Product_32 std Math_Product_32+2 lda Math_Multiplicand_16+1 ldb Math_Multiplier_16+1 mul std Math_Product_32+2 lda Math_Multiplicand_16 ldb Math_Multiplier_16+1 mul addd Math_Product_32+1 std Math_Product_32+1 bcc > inc Math_Product_32 ! lda Math_Multiplicand_16+1 ldb Math_Multiplier_16 mul addd Math_Product_32+1 std Math_Product_32+1 bcc > inc Math_Product_32 ! lda Math_Multiplicand_16 ldb Math_Multiplier_16 mul addd Math_Product_32 std Math_Product_32 rts
40.890909
104
0.441974
e55df660449aba6f79614ab408e66894821b2778
1,980
asm
Assembly
programs/oeis/048/A048481.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
22
2018-02-06T19:19:31.000Z
2022-01-17T21:53:31.000Z
programs/oeis/048/A048481.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
41
2021-02-22T19:00:34.000Z
2021-08-28T10:47:47.000Z
programs/oeis/048/A048481.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
5
2021-02-24T21:14:16.000Z
2021-08-09T19:48:05.000Z
; A048481: a(n) = T(0,n)+T(1,n-1)+...+T(n,0), array T given by A048472. ; 1,3,9,27,77,207,529,1299,3093,7191,16409,36891,81949,180255,393249,852003,1835045,3932199,8388649,17825835,37748781,79691823,167772209,352321587,738197557,1543503927,3221225529,6710886459,13958643773,28991029311,60129542209,124554051651,257698037829,532575944775,1099511627849,2267742732363,4672924418125,9620726743119,19791209300049,40681930227795,83562883711061,171523813933143,351843720888409,721279627821147,1477743627731037,3025855999639647,6192449487634529,12666373951979619,25895697857380453,52917295621603431,108086391056892009,220676381741154411,450359962737049709,918734323983581295,1873497444986126449,3819052484010180723,7782220156096217205,15852670688344146039,32281802128991715449,65716525762590277755,133738894534394249341,272089475087215886463,553402322211286548609,1125251388496282648707,2287396265139984400517,4648579506574807007367,9444732965739290427529,19184613836657933680779,38959523483674573013133,79099638588066557329551,160560460417567937265809,325843287318005519745171,661131307601750329917589,1341152081134979240689815,2720083094132915643089049,5515724051991745609597083,11182563831435319866032285,22667359117774297025740959,45939181145355908638834849,93087288110326446452375715,188592427859882151254163621,382020558998222819207151783,773712524553362671811952809,1566767862220559410419204267,3172221350668786954429005997,6421813953792910176039207087,12998370412496492886440804529,26306225834814330841606389939,53231421689271351820662341813,107700783417828083916223807671,217877446914226928382245863609,440706653985595377864088223931,891316828285473797927369441469,1802440697199513680253124870335,3644495475656159529303021715649,7368219113826583396199587381443,14894894552681695467586262663365,30106701755420448285546701127879,60847228810955011271841753858249,122962108222138251945180210921675 mov $1,$0 lpb $1 mul $0,2 sub $1,1 add $2,1 sub $0,$2 lpe mul $0,2 add $0,1
152.307692
1,822
0.910101
38b4d498db6d41b108209867254b5292f0dd65c5
389
asm
Assembly
src/XenobladeChroniclesX/Mods/BattleQteSpeed/patch_qte_speed.asm
lilystudent2016/cemu_graphic_packs
a7aaa6d07df0d5ca3f6475d741fb8b80fadd1a46
[ "CC0-1.0" ]
1,002
2017-01-10T13:10:55.000Z
2020-11-20T18:34:19.000Z
src/XenobladeChroniclesX/Mods/BattleQteSpeed/patch_qte_speed.asm
lilystudent2016/cemu_graphic_packs
a7aaa6d07df0d5ca3f6475d741fb8b80fadd1a46
[ "CC0-1.0" ]
347
2017-01-11T21:13:20.000Z
2020-11-27T11:33:05.000Z
src/XenobladeChroniclesX/Mods/BattleQteSpeed/patch_qte_speed.asm
lilystudent2016/cemu_graphic_packs
a7aaa6d07df0d5ca3f6475d741fb8b80fadd1a46
[ "CC0-1.0" ]
850
2017-01-10T06:06:43.000Z
2020-11-06T21:16:49.000Z
[XCX_QTE_SPEED_ALL] ################################################################################################# moduleMatches = 0xF882D5CF, 0x30B6E091, 0xAB97DE6B ; 1.0.1E, 1.0.2U, 1.0.1U ; ---------------------------------------------------------------------------- ; WHO : SoulVoice::CSoulVoice::getDifficulty((void)) ; WHAT : QTE speed does not increase 0x022078D4 = li r3, 1
48.625
117
0.393316
f1d23911ab21795ebbb7ee25db8d6fb2160a4846
305
asm
Assembly
programs/oeis/064/A064099.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
22
2018-02-06T19:19:31.000Z
2022-01-17T21:53:31.000Z
programs/oeis/064/A064099.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
41
2021-02-22T19:00:34.000Z
2021-08-28T10:47:47.000Z
programs/oeis/064/A064099.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
5
2021-02-24T21:14:16.000Z
2021-08-09T19:48:05.000Z
; A064099: a(n) = ceiling(log(3 + 2*n)/log(3)). ; 1,2,2,2,3,3,3,3,3,3,3,3,3,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5 lpb $0 add $1,2 add $0,$1 div $0,3 lpe add $0,1
30.5
201
0.501639
d78886102af3e2d3435b05c938ecb5b86be45594
577
asm
Assembly
oeis/214/A214361.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
11
2021-08-22T19:44:55.000Z
2022-03-20T16:47:57.000Z
oeis/214/A214361.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
9
2021-08-29T13:15:54.000Z
2022-03-09T19:52:31.000Z
oeis/214/A214361.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
3
2021-08-22T20:56:47.000Z
2021-09-29T06:26:12.000Z
; A214361: Expansion of c(q^2) * (c(q) + 2 * c(q^4)) / 9 in powers of q where c() is a cubic AGM theta function. ; Submitted by Jamie Morken(w3) ; 1,3,3,3,6,9,8,3,9,18,12,9,14,24,18,3,18,27,20,18,24,36,24,9,31,42,27,24,30,54,32,3,36,54,48,27,38,60,42,18,42,72,44,36,54,72,48,9,57,93,54,42,54,81,72,24,60,90,60,54,62,96,72,3,84,108,68,54,72,144,72,27,74,114,93,60,96,126,80,18,81,126,84,72,108,132,90,36,90,162,112,72,96,144,120,9,98,171,108,93 mov $2,-1 pow $2,$0 seq $0,121443 ; Sum of divisors d of n which are odd and n/d is not divisible by 3. mul $2,2 bin $2,2 mul $0,$2
52.454545
298
0.649913
0e09c566229f385d89ef05c334667579023cc27d
460
asm
Assembly
data/pokemon/base_stats/combee.asm
TastySnax12/pokecrystal16-493-plus
9de36c8803c9bdf4b8564ed547f988b0b66f0c41
[ "blessing" ]
2
2021-07-31T07:05:06.000Z
2021-10-16T03:32:26.000Z
data/pokemon/base_stats/combee.asm
TastySnax12/pokecrystal16-493-plus
9de36c8803c9bdf4b8564ed547f988b0b66f0c41
[ "blessing" ]
null
null
null
data/pokemon/base_stats/combee.asm
TastySnax12/pokecrystal16-493-plus
9de36c8803c9bdf4b8564ed547f988b0b66f0c41
[ "blessing" ]
3
2021-01-15T18:45:40.000Z
2021-10-16T03:35:27.000Z
db 0 ; species ID placeholder db 30, 30, 42, 70, 30, 42 ; hp atk def spd sat sdf db BUG, FLYING ; type db 120 ; catch rate db 49 ; base exp db HONEY, HONEY ; items db GENDER_F12_5 ; gender ratio db 100 ; unknown 1 db 15 ; step cycles to hatch db 5 ; unknown 2 INCBIN "gfx/pokemon/combee/front.dimensions" db 0, 0, 0, 0 ; padding db GROWTH_MEDIUM_SLOW ; growth rate dn EGG_BUG, EGG_BUG ; egg groups ; tm/hm learnset tmhm ; end
20.909091
45
0.663043
05b996a58a9a434d695a2a8cd45e335c5e8925d8
461
asm
Assembly
data/pokemon/base_stats/sinnoh/mamoswine.asm
Dev727/ancientplatinum
8b212a1728cc32a95743e1538b9eaa0827d013a7
[ "blessing" ]
null
null
null
data/pokemon/base_stats/sinnoh/mamoswine.asm
Dev727/ancientplatinum
8b212a1728cc32a95743e1538b9eaa0827d013a7
[ "blessing" ]
null
null
null
data/pokemon/base_stats/sinnoh/mamoswine.asm
Dev727/ancientplatinum
8b212a1728cc32a95743e1538b9eaa0827d013a7
[ "blessing" ]
null
null
null
db 0 ; 473 DEX NO db 110, 130, 80, 80, 70, 60 ; hp atk def spd sat sdf db ICE, GROUND ; type db 50 ; catch rate db 207 ; base exp db NO_ITEM, NO_ITEM ; items db GENDER_F50 ; gender ratio db 100 ; unknown 1 db 20 ; step cycles to hatch db 5 ; unknown 2 INCBIN "gfx/pokemon/sinnoh/mamoswine/front.dimensions" db 0, 0, 0, 0 ; padding db GROWTH_SLOW ; growth rate dn EGG_GROUND, EGG_GROUND ; egg groups ; tm/hm learnset tmhm ; end
20.954545
55
0.661605
e133cd431f5cd1191128dfb4dff23af622a11068
650
asm
Assembly
progs/h01-num2bin-v02.asm
HKhademian/AssemblyDandamudi
b4d4ccbb7e585953a8d2d22b47d815a3f45f9129
[ "Unlicense" ]
1
2020-05-07T14:20:09.000Z
2020-05-07T14:20:09.000Z
progs/h01-num2bin-v02.asm
HKhademian/AssemblyDandamudi
b4d4ccbb7e585953a8d2d22b47d815a3f45f9129
[ "Unlicense" ]
null
null
null
progs/h01-num2bin-v02.asm
HKhademian/AssemblyDandamudi
b4d4ccbb7e585953a8d2d22b47d815a3f45f9129
[ "Unlicense" ]
null
null
null
%include "lib.asm" extern ExitProcess ; windows syscall to exit section .text ONE db '1', 0 ZERO db '0', 0 section .data buffer times 25 db 0 section .code global _start _start: fgets buffer, 12 ; get n as binary len a2i 12, buffer mov cl, al dec cl mov ebx, 1 ; use ebx as mask shl ebx, cl ; our numbers are N bits fgets buffer, 12 ; get number to convert a2i 12, buffer ; eax = num to convert tester: test eax, ebx jz tester_zero tester_one: puts ONE jmp tester_looper tester_zero: puts ZERO tester_looper: shr ebx, 1 ; shift mask 1 bit to right to test next digit jnz tester _end: push 0 call ExitProcess
16.25
61
0.698462
556e3dde50fcd55380e4c6cdf65a375314541ae2
554
asm
Assembly
oeis/017/A017074.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
11
2021-08-22T19:44:55.000Z
2022-03-20T16:47:57.000Z
oeis/017/A017074.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
9
2021-08-29T13:15:54.000Z
2022-03-09T19:52:31.000Z
oeis/017/A017074.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
3
2021-08-22T20:56:47.000Z
2021-09-29T06:26:12.000Z
; A017074: a(n) = (8*n)^10. ; 0,1073741824,1099511627776,63403380965376,1125899906842624,10485760000000000,64925062108545024,303305489096114176,1152921504606846976,3743906242624487424,10737418240000000000,27850097600940212224,66483263599150104576,148024428491834392576,310584820834420916224,619173642240000000000,1180591620717411303424,2164656967840983678976,3833759992447475122176,6583182266716099969024,10995116277760000000000,17909885825636445978624,28518499943362777317376,44481377712499930955776,68078861925529707085824 pow $0,10 mul $0,1073741824
92.333333
496
0.907942
c8ce92db04cd7c14a7be18ea107353a0703f1181
4,359
asm
Assembly
Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0x84_notsx.log_21829_2391.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
9
2020-08-13T19:41:58.000Z
2022-03-30T12:22:51.000Z
Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0x84_notsx.log_21829_2391.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
1
2021-04-29T06:29:35.000Z
2021-05-13T21:02:30.000Z
Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0x84_notsx.log_21829_2391.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
3
2020-07-14T17:07:07.000Z
2022-03-21T01:12:22.000Z
.global s_prepare_buffers s_prepare_buffers: push %r12 push %r14 push %r15 push %r8 push %rax push %rdi lea addresses_normal_ht+0xa0e1, %r14 nop nop nop nop nop sub %rdi, %rdi mov $0x6162636465666768, %rax movq %rax, (%r14) nop nop nop nop lfence lea addresses_WC_ht+0x18a1, %r8 nop nop nop xor %rdi, %rdi mov $0x6162636465666768, %r15 movq %r15, %xmm3 movups %xmm3, (%r8) nop nop nop nop nop xor %r14, %r14 pop %rdi pop %rax pop %r8 pop %r15 pop %r14 pop %r12 ret .global s_faulty_load s_faulty_load: push %r11 push %r15 push %r8 push %rax push %rbx push %rdi // Faulty Load lea addresses_WT+0xe2e1, %rdi nop nop nop and %r15, %r15 mov (%rdi), %r8 lea oracles, %r15 and $0xff, %r8 shlq $12, %r8 mov (%r15,%r8,1), %r8 pop %rdi pop %rbx pop %rax pop %r8 pop %r15 pop %r11 ret /* <gen_faulty_load> [REF] {'src': {'type': 'addresses_WT', 'same': False, 'size': 8, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'} [Faulty Load] {'src': {'type': 'addresses_WT', 'same': True, 'size': 8, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'} <gen_prepare_buffer> {'dst': {'type': 'addresses_normal_ht', 'same': False, 'size': 8, 'congruent': 7, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'} {'dst': {'type': 'addresses_WC_ht', 'same': False, 'size': 16, 'congruent': 5, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'} {'39': 21829} 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 */
51.282353
2,999
0.663455
2e1ce3a3bdfd514d063539fdcd530dc808065bc6
288
asm
Assembly
programs/oeis/001/A001903.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
22
2018-02-06T19:19:31.000Z
2022-01-17T21:53:31.000Z
programs/oeis/001/A001903.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
41
2021-02-22T19:00:34.000Z
2021-08-28T10:47:47.000Z
programs/oeis/001/A001903.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
5
2021-02-24T21:14:16.000Z
2021-08-09T19:48:05.000Z
; A001903: Final digit of 7^n. ; 1,7,9,3,1,7,9,3,1,7,9,3,1,7,9,3,1,7,9,3,1,7,9,3,1,7,9,3,1,7,9,3,1,7,9,3,1,7,9,3,1,7,9,3,1,7,9,3,1,7,9,3,1,7,9,3,1,7,9,3,1,7,9,3,1,7,9,3,1,7,9,3,1,7,9,3,1,7,9,3,1,7,9,3,1,7,9,3,1,7,9,3,1,7,9,3,1,7,9,3 mul $0,2 mod $0,8 pow $0,3 mod $0,5 mul $0,2 add $0,1
28.8
201
0.524306
5470564062e88bc7e4f1ac0d2d9e0ee2d933d126
317
asm
Assembly
src/test_repeat/test2_inc.asm
hra1129/zma
c2bfc79df45e1d4d01c6faa1b69216245a4e1d2c
[ "MIT" ]
8
2021-03-19T23:44:14.000Z
2022-03-22T07:29:02.000Z
src/test_repeat/test2_inc.asm
hra1129/zma
c2bfc79df45e1d4d01c6faa1b69216245a4e1d2c
[ "MIT" ]
null
null
null
src/test_repeat/test2_inc.asm
hra1129/zma
c2bfc79df45e1d4d01c6faa1b69216245a4e1d2c
[ "MIT" ]
1
2021-11-27T22:37:24.000Z
2021-11-27T22:37:24.000Z
SHOT_ATTRIBUTE macro db 0 ; 0: disable, 1: enable dw 0 ; delta X dw 0 ; X position dw 0 ; delta Y dw 0 ; Y position db 0 ; animation counter 0...15 dw 0 ; reserved dw 0 ; reserved dw 0 ; reserved endm shot_table: repeat I, 32 SHOT_ATTRIBUTE endr dw 1
16.684211
37
0.561514
51f18622f635920e23c5c15210cb8ee9da47a131
114
asm
Assembly
methods/getGameItemUser.asm
caffeinum/pravda-contracts
23b7cc52559f37aa76e50dae9a2590040c0b7246
[ "Apache-2.0" ]
3
2018-07-22T15:55:55.000Z
2018-08-24T18:37:26.000Z
methods/getGameItemUser.asm
caffeinum/pravda.contracts
23b7cc52559f37aa76e50dae9a2590040c0b7246
[ "Apache-2.0" ]
null
null
null
methods/getGameItemUser.asm
caffeinum/pravda.contracts
23b7cc52559f37aa76e50dae9a2590040c0b7246
[ "Apache-2.0" ]
null
null
null
push 1 push "getGameItemUser" push xF5AB1676D87235E4B5B1830C00A5BC783B9A58D2DC9AFE23D5FA387F1C80736E push 2 pcall
19
70
0.903509
33da3a4ab5bb9a0bc1aa85ba3c5bc30781b3361e
647
asm
Assembly
oeis/179/A179001.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
11
2021-08-22T19:44:55.000Z
2022-03-20T16:47:57.000Z
oeis/179/A179001.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
9
2021-08-29T13:15:54.000Z
2022-03-09T19:52:31.000Z
oeis/179/A179001.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
3
2021-08-22T20:56:47.000Z
2021-09-29T06:26:12.000Z
; A179001: Partial sums of floor(Fibonacci(n)/3). ; 0,0,0,0,1,2,4,8,15,26,44,73,121,198,323,526,855,1387,2248,3641,5896,9544,15447,24999,40455,65463,105927,171399,277336,448745,726091,1174847,1900950,3075809,4976771,8052592,13029376,21081981,34111370,55193365,89304750,144498130,233802895,378301040,612103951,990405007,1602508974,2592913998,4195422990,6788337006,10983760014,17772097038,28755857071,46527954128,75283811218,121811765366,197095576605,318907341992,516002918618,834910260631,1350913179271,2185823439924,3536736619217,5722560059164 lpb $0 mov $2,$0 sub $0,1 seq $2,4696 ; a(n) = floor(Fibonacci(n)/3). add $1,$2 lpe mov $0,$1
58.818182
493
0.799073
ce4ffe4fb2e806d41a92a94c381c91bb3adf23b1
766
asm
Assembly
oeis/319/A319953.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
11
2021-08-22T19:44:55.000Z
2022-03-20T16:47:57.000Z
oeis/319/A319953.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
9
2021-08-29T13:15:54.000Z
2022-03-09T19:52:31.000Z
oeis/319/A319953.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
3
2021-08-22T20:56:47.000Z
2021-09-29T06:26:12.000Z
; A319953: List of binary words of lengths 0, 1, 2, etc., including empty word, each prefixed by a 2. ; Submitted by Jon Maiga ; 2,20,21,200,201,210,211,2000,2001,2010,2011,2100,2101,2110,2111,20000,20001,20010,20011,20100,20101,20110,20111,21000,21001,21010,21011,21100,21101,21110,21111,200000,200001,200010,200011,200100,200101,200110,200111,201000,201001,201010,201011,201100,201101,201110,201111,210000,210001,210010,210011,210100,210101,210110,210111,211000,211001,211010,211011,211100,211101,211110,211111,2000000,2000001,2000010,2000011,2000100,2000101,2000110,2000111,2001000,2001001,2001010,2001011,2001100,2001101 add $0,1 mov $3,5 lpb $0 mov $2,$0 div $0,2 mul $2,2 mod $2,4 mul $2,$3 add $1,$2 mul $3,10 lpe add $1,$2 mov $0,$1 div $0,10
40.315789
497
0.75718
c5ae38462251ddda46ffddd4f88ed70cfdfacf25
720
asm
Assembly
src/examples/binaryAddition.asm
digitsensitive/c64
47b0aa02910c26f49bae967f573466b94143ec74
[ "Unlicense" ]
2
2020-12-04T23:25:20.000Z
2021-11-04T21:56:37.000Z
src/examples/binaryAddition.asm
digitsensitive/c64
47b0aa02910c26f49bae967f573466b94143ec74
[ "Unlicense" ]
null
null
null
src/examples/binaryAddition.asm
digitsensitive/c64
47b0aa02910c26f49bae967f573466b94143ec74
[ "Unlicense" ]
1
2022-02-02T12:14:56.000Z
2022-02-02T12:14:56.000Z
; ========================================================== ; COMMODORE 64 - Examples in 6502 Assembly language ; © Digitsensitive; digit.sensitivee@gmail.com ; Binary Addition ; ========================================================== ; ---------------------------------------------------------- ; Main Loop ; ---------------------------------------------------------- *=$02a7 ; sys 679 init jsr $e544 ; Clear the screen lda #%0001 ; 0001 = decimal 1 clc ; Clear Carry flag adc #%0010 ; Add with carry (1+2), so accumulator is 3 now sta $0400 ; store the result (= 3) rts
37.894737
79
0.327778
948d799c8489e55da833afdf2fa1565d990b5d9e
3,940
asm
Assembly
StdLib/syscall.a32.asm
robertmuth/Cwerg
fdf30b06c93b4620c0a45b448b6d92acb81c35f0
[ "Apache-2.0" ]
171
2020-01-30T16:58:07.000Z
2022-03-27T22:12:17.000Z
StdLib/syscall.a32.asm
robertmuth/Cwerg
fdf30b06c93b4620c0a45b448b6d92acb81c35f0
[ "Apache-2.0" ]
14
2021-05-15T02:12:09.000Z
2022-03-16T04:16:18.000Z
StdLib/syscall.a32.asm
robertmuth/Cwerg
fdf30b06c93b4620c0a45b448b6d92acb81c35f0
[ "Apache-2.0" ]
5
2021-03-01T20:52:13.000Z
2022-03-07T06:35:03.000Z
# Prepend this to cwerg IR code before running it through CodeGenA32/codegen.py # syscall overview here: https://chromium.googlesource.com/chromiumos/docs/+/master/constants/syscalls.md # This linkerdef may go away since we can query it with the xbrk syscall .mem $$rw_data_end 4 BUILTIN .fun a32_syscall_clock_gettime SIGNATURE [S32] = [S32 A32] .fun a32_syscall_close SIGNATURE [S32] = [S32] .fun a32_syscall_exit SIGNATURE [] = [S32] .fun a32_syscall_fcntl SIGNATURE [S32] = [S32 U32 A32] .fun a32_syscall_fstat SIGNATURE [S32] = [S32 A32] .fun a32_syscall_getcwd SIGNATURE [S32] = [A32 U32] .fun a32_syscall_getpid SIGNATURE [S32] = [] .fun a32_syscall_kill SIGNATURE [S32] = [S32 S32] .fun a32_syscall_lseek SIGNATURE [S32] = [S32 S32 S32] .fun a32_syscall_open SIGNATURE [S32] = [A32 S32 S32] .fun a32_syscall_read SIGNATURE [S32] = [S32 A32 U32] .fun a32_syscall_write SIGNATURE [S32] = [S32 A32 U32] .fun a32_syscall_xbrk SIGNATURE [A32] = [A32] ############################################################ # Syscall wrappers ############################################################ .fun clock_gettime NORMAL [S32] = [S32 A32] .bbl start poparg clk_id:S32 poparg timespec:A32 pusharg timespec pusharg clk_id syscall a32_syscall_clock_gettime 0xe4:U32 poparg res:S32 pusharg res ret .fun close NORMAL [S32] = [S32] .bbl start poparg fh:S32 pusharg fh syscall a32_syscall_close 6:U32 poparg res:S32 pusharg res ret .fun exit NORMAL [] = [S32] .bbl start poparg out:S32 pusharg out syscall a32_syscall_exit 1:U32 trap .fun fcntl NORMAL [S32] = [S32 U32 A32] .bbl start poparg fd:S32 poparg cmd:U32 poparg arg:A32 pusharg arg pusharg cmd pusharg fd syscall a32_syscall_fcntl 55:U32 poparg res:S32 pusharg res ret .fun fstat NORMAL [S32] = [S32 A32] .bbl start poparg fd:S32 poparg stat:A32 pusharg stat pusharg fd syscall a32_syscall_fstat 108:U32 poparg res:S32 pusharg res ret .fun getcwd NORMAL [S32] = [A32 U32] .bbl start poparg buffer:A32 poparg size:U32 pusharg size pusharg buffer syscall a32_syscall_getcwd 183:U32 poparg res:S32 pusharg res ret .fun getpid NORMAL [S32] = [] .bbl start syscall a32_syscall_getpid 20:U32 poparg res:S32 pusharg res ret .fun kill NORMAL [S32] = [S32 S32] .bbl start poparg pid:S32 poparg sig:S32 pusharg sig pusharg pid syscall a32_syscall_kill 37:U32 poparg res:S32 pusharg res ret .fun lseek NORMAL [S32] = [S32 S32 S32] .bbl start poparg fd:S32 poparg offset:S32 poparg mode:S32 pusharg mode pusharg offset pusharg fd syscall a32_syscall_lseek 19:U32 poparg res:S32 pusharg res ret .fun open NORMAL [S32] = [A32 S32 S32] .bbl start poparg path:A32 poparg flags:S32 poparg mode:S32 pusharg mode pusharg flags pusharg path syscall a32_syscall_open 5:U32 poparg res:S32 pusharg res ret .fun read NORMAL [S32] = [S32 A32 U32] .bbl start poparg fh:S32 poparg buf:A32 poparg len:U32 pusharg len pusharg buf pusharg fh syscall a32_syscall_read 3:U32 poparg res:S32 pusharg res ret .fun write NORMAL [S32] = [S32 A32 U32] .bbl start poparg fh:S32 poparg buf:A32 poparg len:U32 pusharg len pusharg buf pusharg fh syscall a32_syscall_write 4:U32 poparg res:S32 pusharg res ret # Note the syscall behaves differently from the library function: # The Linux system call returns the new program break on success. On failure, # the system call returns the current break. # It also return the current program break when give zero as an argument .fun xbrk NORMAL [A32] = [A32] .bbl start poparg addr:A32 pusharg addr syscall a32_syscall_xbrk 45:U32 poparg res:A32 pusharg res ret
23.313609
105
0.670812
91db95a9d12bb8ca296939274f066f0eb7300a2c
215
asm
Assembly
programs/oeis/016/A016805.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
22
2018-02-06T19:19:31.000Z
2022-01-17T21:53:31.000Z
programs/oeis/016/A016805.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
41
2021-02-22T19:00:34.000Z
2021-08-28T10:47:47.000Z
programs/oeis/016/A016805.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
5
2021-02-24T21:14:16.000Z
2021-08-09T19:48:05.000Z
; A016805: (4n)^5. ; 0,1024,32768,248832,1048576,3200000,7962624,17210368,33554432,60466176,102400000,164916224,254803968,380204032,550731776,777600000,1073741824,1453933568,1934917632,2535525376 mul $0,4 pow $0,5
35.833333
176
0.813953
ebebfd996d1c828a904b38cf0a1bb371247d199a
353
asm
Assembly
programs/oeis/057/A057046.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
22
2018-02-06T19:19:31.000Z
2022-01-17T21:53:31.000Z
programs/oeis/057/A057046.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
41
2021-02-22T19:00:34.000Z
2021-08-28T10:47:47.000Z
programs/oeis/057/A057046.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
5
2021-02-24T21:14:16.000Z
2021-08-09T19:48:05.000Z
; A057046: Let R(i,j) be the rectangle with antidiagonals 1; 2,3; 4,5,6; ...; each k is an R(i(k),j(k)) and A057046(n)=i(2^n). ; 1,1,1,2,1,4,9,8,3,16,34,32,1,64,94,128,195,256,418,512,948,1024,2344,2048,688,4096,8544,8192,22591,16384,20854,32768 seq $0,255047 ; 1 together with the positive terms of A000225. lpb $0 add $2,1 sub $0,$2 lpe add $0,1
35.3
126
0.660057
ad58a4d6a863fdd9d09288ec0d8cca48c6a53160
3,422
asm
Assembly
pwnlib/shellcraft/templates/amd64/linux/syscall.asm
magnologan/pwntools
32b05024d33019e16801cc50ec0108ee783eff27
[ "MIT" ]
7
2015-05-22T03:48:47.000Z
2022-03-30T13:59:48.000Z
pwnlib/shellcraft/templates/amd64/linux/syscall.asm
magnologan/pwntools
32b05024d33019e16801cc50ec0108ee783eff27
[ "MIT" ]
1
2015-06-11T02:22:28.000Z
2015-06-11T02:22:28.000Z
pwnlib/shellcraft/templates/amd64/linux/syscall.asm
magnologan/pwntools
32b05024d33019e16801cc50ec0108ee783eff27
[ "MIT" ]
3
2017-01-24T18:53:29.000Z
2019-04-29T03:41:10.000Z
<% from pwnlib.shellcraft import amd64 from pwnlib.context import context as ctx # Ugly hack, mako will not let it be called context %> <%page args="syscall = None, arg0 = None, arg1 = None, arg2 = None, arg3 = None, arg4 = None, arg5 = None"/> <%docstring> Args: [syscall_number, \*args] Does a syscall Any of the arguments can be expressions to be evaluated by :func:`pwnlib.constants.eval`. Example: >>> print pwnlib.shellcraft.amd64.linux.syscall('SYS_execve', 1, 'rsp', 2, 0).rstrip() /* call execve(1, 'rsp', 2, 0) */ push 0x1 pop rdi mov rsi, rsp push 0x2 pop rdx xor r10d, r10d push 0x3b pop rax syscall >>> print pwnlib.shellcraft.amd64.linux.syscall('SYS_execve', 2, 1, 0, -1).rstrip() /* call execve(2, 1, 0, -1) */ push 0x2 pop rdi push 0x1 pop rsi push -1 pop r10 push 0x3b pop rax cdq /* Set rdx to 0, rax is known to be positive */ syscall >>> print pwnlib.shellcraft.amd64.linux.syscall().rstrip() /* call syscall() */ syscall >>> print pwnlib.shellcraft.amd64.linux.syscall('rax', 'rdi', 'rsi').rstrip() /* call syscall('rax', 'rdi', 'rsi') */ /* moving rdi into rdi, but this is a no-op */ /* moving rsi into rsi, but this is a no-op */ /* moving rax into rax, but this is a no-op */ syscall >>> print pwnlib.shellcraft.amd64.linux.syscall('rbp', None, None, 1).rstrip() /* call syscall('rbp', ?, ?, 1) */ push 0x1 pop rdx mov rax, rbp syscall >>> print pwnlib.shellcraft.amd64.linux.syscall( ... 'SYS_mmap', 0, 0x1000, ... 'PROT_READ | PROT_WRITE | PROT_EXEC', ... 'MAP_PRIVATE | MAP_ANONYMOUS', ... -1, 0).rstrip() /* call mmap(0, 4096, 'PROT_READ | PROT_WRITE | PROT_EXEC', 'MAP_PRIVATE | MAP_ANONYMOUS', -1, 0) */ xor edi, edi mov esi, 0x1010101 xor esi, 0x1011101 push 0x7 pop rdx push 0x22 pop r10 push -1 pop r8 xor r9d, r9d push 0x9 pop rax syscall </%docstring> <% append_cdq = False if isinstance(syscall, (str, unicode)) and syscall.startswith('SYS_'): syscall_repr = syscall[4:] + "(%s)" args = [] else: syscall_repr = 'syscall(%s)' if syscall == None: args = ['?'] else: args = [repr(syscall)] for arg in [arg0, arg1, arg2, arg3, arg4, arg5]: if arg == None: args.append('?') else: args.append(repr(arg)) while args and args[-1] == '?': args.pop() syscall_repr = syscall_repr % ', '.join(args) %>\ /* call ${syscall_repr} */ % for dst, src in zip(['rdi', 'rsi', 'rdx', 'r10', 'r8', 'r9', 'rax'], [arg0, arg1, arg2, arg3, arg4, arg5, syscall]): % if dst == 'rdx' and src == 0: <% append_cdq = True %>\ % elif src != None: ${amd64.linux.mov(dst, src)} % endif % endfor % if append_cdq: cdq /* Set rdx to 0, rax is known to be positive */ % endif syscall
32.283019
118
0.501169
1aafcf31bf69746b83655e751e1b051c68e26f5f
410
asm
Assembly
Lab Assessment Submission/Lab 1/lab.asm
mdhabibulla/CSE331L-Section-10-Fall20-NSU
7b72c12cb7652cc8e4aa26c3be24797c2ccd1fe0
[ "MIT" ]
null
null
null
Lab Assessment Submission/Lab 1/lab.asm
mdhabibulla/CSE331L-Section-10-Fall20-NSU
7b72c12cb7652cc8e4aa26c3be24797c2ccd1fe0
[ "MIT" ]
null
null
null
Lab Assessment Submission/Lab 1/lab.asm
mdhabibulla/CSE331L-Section-10-Fall20-NSU
7b72c12cb7652cc8e4aa26c3be24797c2ccd1fe0
[ "MIT" ]
null
null
null
; You may customize this and other start-up templates; ; The location of this template is c:\emu8086\inc\0_com_template.txt org 100h ;#include <stdio.h> MOV AX, 01 ADD AX, 05 ADD AX, 05 ;int main(){ ;int a=2; ;int b=3; ;int c=a+b; ;printf(c); ;return ; ;} ret
17.083333
68
0.434146
ba4a5b03a9e7de313d16248da6eabf4d8eac7e7e
140,930
asm
Assembly
roms/rom_vubug.asm
fredrequin/j68_cpu
538badf8def66dc900947be665d0eac6f9ff833e
[ "ISC", "MIT" ]
31
2019-05-07T07:27:29.000Z
2021-10-30T20:13:03.000Z
roms/rom_vubug.asm
jotego/j68_cpu
538badf8def66dc900947be665d0eac6f9ff833e
[ "ISC", "MIT" ]
2
2021-05-30T09:18:11.000Z
2021-05-31T06:43:10.000Z
roms/rom_vubug.asm
jotego/j68_cpu
538badf8def66dc900947be665d0eac6f9ff833e
[ "ISC", "MIT" ]
6
2019-05-28T00:52:47.000Z
2021-05-30T05:08:26.000Z
; VUBug: AN M68000 MONITOR PROGRAM ; ; I. Introduction. ; ; VUBug is a primitive single user monitor program designed ; to interface the user to the "Raymatic" M68000 development board ; designed by Raymond Carr at Vanderbilt University in 1988. The ; monitor program itself was originally written by Edward M. Carter ; also while at Vanderbilt in 1983. This documentation relates to ; the 1988 version of the program, about two thirds of which is new. ; The new stuff was added by Russell G. Brown, then of Vanderbilt, but ; lately of Cornell Computer Science. It allows the user to perform ; such operations as are necessary to develop and debug M68000 ; assembly programs in conjunction with a host computer running ; an M68000 assembler which is capable of generating object code in ; the Motorola S-record format. Some functions provided by VUBUG ; are load from host, dump memory, disassemble memory, and run at ; address. Feel free to distribute this source and documentation, ; but make sure that the copyright and like information stays on it. ; Also, please make sure that any modified version of this program ; which you may distribute is obviously marked as being modified. ; ; ; II. Running VUBug ; ; VUbug comes up running as soon as power is applied to the ; system. It asserts its presence by printing the following ; message: ; ; M68000 Monitor VUBug Version 4.0 27 April, 1988 ; ; ; !_ ; ; If there is anything wrong with the system RAM, it will instead ; respond ; ; RAM Error!!!! ; ; Assuming that a RAM error doesn't happen, you can now begin ; entering commands. ; ; ; III. Getting Started ; ; The first thing that you will want to do is to load and ; execute an assembly language program using VUBug. The following ; is an example interactive execution session: ; ; 1. Turn on the system. The VUBug boot message prints at the ; terminal. ; 2. Type 'e'. VUBug responds "Terminal Mode:". ; 3. Log into the host system. Enter vi and type in the ; following program: ; ; org $4400 ; move.l #$00000004,d0 ; movea.l #$000019ca,a3 ; adda.w d0,a3 ; move.l a3,d0 ; trap #$06 ; trap #$0 ; end ; ; 4. Write and quit from vi. Assemble the program by ; typing ; ; mas68k -l <progname>. ; ; where progname is the name of your sample program. 5. ; Examine the listing file produced by mas68k to see the source ; and object code together. The listing file is called ; <progname.l>. ; 6. Type 'cat <progname.o>' but DO NOT! type a carriage return. ; 7. type ctrl-L. VUBug will exit terminal mode, feed a ; carriage return to the host, and accept an Srec format object ; file. ; 8. You are now back in VUBug. Type 'a 4400'. You will see an ; assembly listing which is equivalent to your source code, ; except that it has values substituted for all labels. There ; will be a number of garbage lines following the program. ; disregard these. ; 9. Type 'g 4400'. This is the command meaning "go at $4400". ; VUBug responds with the following: ; ; Program: ; ; 000019ce ; ! ; ; This is approximately how all debugging sessions should ; begin. Once you have become more familiar with VUBug, you will ; learn shortcuts and enhancements, but the commands already used ; will serve for a start. ; ; ; IV. VUBug Commands ; ; This section contains the full, alphabetic listing of the ; commands provided in VUBug. For information on how to get help ; for commands while in VUBug, see the section on 'h'. ; ; ; ; A - Assembly Listing ; ; A provides a source code listing of memory locations ; specified in one of the following ways: ; ; A<cr> List 20 instructions from last ; examined address. ; A xxxx List 20 instructions from address ; xxxx. ; A xxxx,yyyy List from xxxx to yyyy. ; ; B - Set/Remove Breakpoints ; ; B permits the setting and removing of breakpoints in a user ; program. B is invoked as follows: ; ; B<cr> List all breakpoints. ; B+xxxx Add a breakpoint at address xxxx. ; B-xxxx Remove a breakpoint at xxxx. ; B# Remove all breakpoints. ; ; ; ; C - Copy Memory ; ; C allows the copying of a data block from one location to ; another. It is called using: ; ; C xxxx=yyyy,zzzz. ; ; This copies memory from a block which starts at yyyy and ; ends at zzzz to a block starting at xxxx. NOTE: the copy ; routine works from bottom to top. Therefore care must be ; taken when copying between blocks that share address space. ; ; ; ; D - Dump Memory ; ; D is used to provide a hex dump of memory. Memory is ; printed out in lines consisting of an address, 16 hex ; values, and the ascii representation of such of those ; values as have printable characters. The format for ; calling D is as follows: ; ; D<cr> Dump 64 bytes from last examined ; location. ; D xxxx Dump 64 bytes from xxxx. ; D xxxx,yyyy Dump bytes from xxxx to yyyy. ; ; ; ; E - Enter terminal emulator mode ; ; When E is entered, VUBug enters a passthrough mode in which ; any key entered at the keyboard is passed through to the ; host, and vice versa. This is true for all characters ; except for ctrl-X, which causes VUBug to exit terminal ; emulator mode, and ctrl-L, which is the same as ctrl-X, ; except that it causes VUBug to enter load mode. E is ; invoked as follows: ; ; E<cr> ; ; G - Start user program ; ; G is the VUBug command to start a user program running. A ; user program which is properly designed to end will have as ; its last executed line ; ; trap #$00 ; ; G is called in one of the following ways: ; ; G<cr> Go from start address in the last ; executed L command. ; <cr> Same as G<cr>. ; G xxxx Go from address xxxx. ; ; ; ; H - Print help messages. ; ; H is used to print a simple message (consisting mostly of ; instruction syntax) to the terminal. It is called with: ; ; H<cr> Prints a list of commands for ; which help is available. ; Hx Prints the long help message for ; command x. If x is nonexistant, ; Hx acts like H<cr>. ; ; ; ; L - Load user program from host ; ; L causes VUBug to accept an S-record format object file ; from the host. It is called in one of the following ways: ; ; L<cr> Load from host with no offset. ; ctrl-L Same as L<cr> but invoked from ; emulator mode. ; L xxxx Load from host with offset xxxx. ; ; M - Enter memory update mode ; ; M invokes a submode of VUBug in which modifications to ; memory locations can be made. M is invoked as follows: ; ; M<cr> Start memory mode. ; M xxxx Start memory mode at xxxx. ; ; Memory mode subcommands are the following: ; ; .xxxx Set pointer to location xxxx. ; =xx Update current location to xx. ; ,xx Increment pointer, then update. ; + Increment pointer. ; - Decrement pointer ; <cr> Print current pointer and value. ; ; Typing any other character in memory update mode causes an ; exit back into VUBug proper. ; ; ; ; P - Prototype commands in RAM ; ; P allows the user to create new command subroutines in RAM ; and call them without having to burn new ROMs. This is ; significant in that ordinarily user programs cannot make ; use of the interrupt routines and other subroutines ; provided in VUBug. P is set up to allow a user routine to ; make use of these subroutines. It is invoked as follows: ; ; Px xxxx Load address xxxx for prototype ; command x. ; Px<cr> Execute prototype command x. ; ; Note that x must be a 1, 2, or 3. ; ; R - Enter register examine/update mode ; ; R invokes a submode of VUBug in which registers may be ; examined and changed. It is called in the following way: ; ; R<cr> Start register mode. ; R xx Start mode at register xx, ; where xx is one of: ; SR/_sr - status register, ; PC/_pc - program counter, ; dx - data register 0 - 7, ; ax - address reg. 0 - 7. ; ; Register examine/update commands are as follows: ; ; .xx Set pointer to register xx. ; =xxxxxxxx Set current register to xxxxxxxx. ; <cr> Print all registers. ; ; Any other character entered in register submode causes an ; exit to VUBug. ; ; ; ; S - Single step mode ; ; In single step mode, a Go command causes VUBug to execute a ; single instruction and then return to the prompt, allowing ; registers to be examined and changed between instructions. ; S is called in one of two ways: ; ; S+ Turn on single step mode. ; S- Turn off single step mode. ; ; ; ; T - Trace mode ; ; In trace mode, a Go command causes VUBug to execute a ; program, printing out the PC after each instruction. This ; permits tracing of a program's path. It is called as ; follows: ; ; T+ Turn on trace mode. ; T- Turn off trace mode. V. ; ; U - Upload user program from terminal ; ; U allows VUBug to upload an S-record format object file ; from the terminal. This allows the user to connect the ; 68000 board to a microcomputer, using it as both terminal ; and host. Upload is invoked with one of the following ; commands: ; ; U<cr> Upload from terminal with no offset. ; U xxxx Upload from terminal with offset xxxx. ; ; ; V. Troubleshooting ; ; There is not a whole lot that can go wrong with VUBug. ; Most of the possible difficulties actually have their roots in ; hardware. If a RAM error is indicated at boot-up time, then one ; of the system RAM chips needs replacing. If no boot-up message ; is printed, then something is wrong with one of the following: ; the terminal, the terminal cable, the ACIAs on the development ; board, the system RAM, or the VUBug ROM. ; ; If an error is found in VUBug's performance, the thing to ; do is to document carefully when and where the bug appears, and ; report the problem to the nearest digital electronics professor. ; ; ; VI. Caveats ; ; A number of things should be taken into account when using ; VUBug. Most of these have to do with the memory map. Number ; one is that hitting the reset button invokes the RAM test program ; which CLEARS THE RAM! For this reason, ctrl-C should be used to ; recover control from a lost program. ; ; The memory map for the board looks like this: ; ; 0000 - 3FFF System ROM ; 4000 - 43FF System RAM ; 4400 - 7FFF User RAM ; 8000 - 803E PI/T (68230) registers EVEN ONLY! ; A000 Load Port Status Register ; A002 Load Port Data Register ; C000 Terminal Port Status Register ; C002 Terminal Port Data Register ; ; Note that the PI/T and ACIA registers are on even only ; locations. Attempting to write to a peripheral chip on an odd ; location will lock up the system. Similarly, writing to system ; RAM can cause unexpected results, up to and including locking ; up the system. ; ; VII. Conclusion ; ; VUBug 4.0, mas68k, and the Raymatic development board form ; an effective development environment for M68000 assembly ; language programs. While they cannot substitute for ; professional development/analysis systems, it is nevertheless ; possible to complete considerable software endeavors with a ; reasonable minimum of difficulty. ; ; ----------------------------CUT HERE------------------------------------------- ; ; NOTES : PORTED TO PC BY DAVE GOODMAN ; : PORTED TO RAYMATIC 68K BOARD BY RUSSELL G. BROWN ; ASSEMBLE: mas68k -l vubug.68k ; : ASSEMBLER WILL TAKE FILE vubug.68k AND ; : WILL CREATE vubug.o, vubug.l ; VER 3.0 : VUBUG VER 3.0 PORTEd TO PC FOR ASSEMBLE USING a68K 9/84 ; VER 3.1 : VUBUG VER 3.1 FIXED FOR VU68K BOARD 10/86 ; VER 4.0 : VUBUG VER 4.0 PORTED TO RAYMATIC 68K BOARD 4/88 ;******************************************* ;* * ;******** V U B U G ******** ;* * ;* Copyright (C) 1983, 1988 * ;* Vanderbilt Univ. * ;* Comp. Sci. dept. * ;* PO Box 1679 * ;* Station B * ;* Nashville, Tenn. * ;* 37235 * ;* * ;* author: * ;* Edward M. Carter * ;* * ;******************************************* ;* * ;* This software was prepared for distri- * ;* bution by Russell G. Brown. Please * ;* note that it is being distributed at * ;* the request of several readers of the * ;* usenet newsgroup comp.sys.m68k. It has * ;* no warranty of any sort, at all. I * ;* think that the code is fairly self * ;* explanatory. Good luck in modifying * ;* it to work on whatever application you * ;* may have. * ;******************************************* ;* * ;* although the information contained here-* ;* in, as well as any information provided * ;* relative thereto, has been carefully re-* ;* viewed and is believed correct, Vander- * ;* bilt University assumes no liability * ;* arising out of its application or use, * ;* neither does it convey any license under* ;* its patent rights nor the rights of * ;* others. * ;* * ;******************************************* ;* * ;* The commands supported are as follows: * ;* * ;* m - examine/update memory * ;* l - load program from host * ;* u - load program from terminal * ;* d - display blocks of memory * ;* t - single-step a program * ;* s - single-step * ;* g - start a user mode program * ;* <cr> - short g command * ;* b - set/remove breakpoints * ;* r - examine/update registers * ;* p - prototype commands * ;* e - terminal emulator mode * ;* c - copy memory blocks * ;* x - print help messages * ;* * ;* Sub-command under each of these commands* ;* are shown in the source code for each * ;* command. * ;* * ;******************************************* ; ; Queue structure ; head equ $0000 tail equ $0002 count equ $0004 queue equ $0006 ; ; Breakpoint structure ; instr equ $0000 iloc equ $0002 ; ;Terminal port ; ttyst equ $0000c000 ttyd equ $0000c002 ; ;Load port ; lpst equ $0000a000 lpd equ $0000a002 ; ; The following is the exception vector ; table for the monitor. There should be ; no further "org"s to address contained ; herein as this will destroy the vector ; for iterrupts, breakpoints... ; org $00000000 ;Reset Vector dc.l stack ;system stack dc.l start ;initial pc dc.l abhlr ;bus error dc.l abhlr ;address error dc.l bhlr ;illegal instruction vector dc.l ghlr ;zero divide dc.l ghlr ;chk dc.l ghlr ;trapv dc.l phlr ;privileged instruction trap dc.l thlr ;trace handler dc.l bhlr ;emulator trap 1010 dc.l bhlr ;emulator trap 1111 org $0000003C dc.l ghlr ;uninitialized interrupt org $00000060 dc.l ghlr ;spurious interrupt dc.l lpint ;download-line vector dc.l inint ;terminal vector dc.l uav3 ;user auto-vectors dc.l uav4 dc.l uav5 dc.l uav6 dc.l uav7 dc.l texit ;TRAP #0 : exit dc.l tgetb ;TRAP #1 : getb dc.l tgetw ;TRAP #2 : getw dc.l tgetl ;TRAP #3 : getl dc.l twrtb ;TRAP #4 : wrtb dc.l twrtw ;TRAP #5 : wrtw dc.l twrtl ;TRAP #6 : wrtl dc.l tgetc ;TRAP #7 : getc dc.l twrts ;TRAP #8 : wrts dc.l twrtc ;TRAP #9 : wrtc dc.l tcrlf ;TRAP #10 : crlf utrpb: dc.l utrapb ;user trap vectors utrpc: dc.l utrapc utrpd: dc.l utrapd utrpe: dc.l utrape utrpf: dc.l utrapf ;+++++++++++++++++++++++++++++++++++++++++ ; + ; Start of monitor + ; + ;+++++++++++++++++++++++++++++++++++++++++ org $000000C0 csc equ $1b45 ;clear screen (h-19) cr equ $0d lf equ $0a nul equ $00 howdy: dc.w csc dc.b "M68000 Monitor VUBUG " dc.b "Version 4.0 11 Aug 88" rnn0: dc.b cr,lf,lf,nul bcomm: dc.b ": Bad Command" dc.b cr,lf,nul ; ; These are seven user interrupt vectors ; which must remain at address $0100. ; Please ensure that they do ; vect1: dc.l userv1 vect2: dc.l userv2 vect3: dc.l userv3 vect4: dc.l userv4 vect5: dc.l userv5 ssri: dc.w $2000 ;supervisor SR ssrn: dc.w $2700 ;same w/o interrupts prmp: dc.b cr,lf dc.b '!' ; command promdt dc.b nul start: move.b #$03,ttyst ;setup ports move.b #$03,lpst move.b #$15,ttyst move.b #$15,lpst move.w #$ffff,d0 ;load $ffff for first memory test movea.w #$4000,a0 ;start at $4000 move.w #$1fff,d2 ;$2000 words of ram ; move.w #$1f,d2 ;$2000 words of ram mt1: move.w d0,(a0) ;store value move.w (a0)+,d1 ;load it back cmp.w d0,d1 bne memerr ;if not the same, memory error. dbf d2,mt1 move.w #$0000,d0 ;load $0000 for second mem test movea.w #$4000,a0 move.w #$1fff,d2 ; move.w #$1f,d2 mt2: move.w d0,(a0) move.w (a0)+,d1 bne memerr ;if not zero, memory error. dbf d2,mt2 bra gwan memerr: lea memnot,a0 ;RAM doesn't work right. bsr writs bra gwan memnot: dc.b "RAM ERROR!!!!" dc.b cr,lf,nul gwan: lea ibuff,a1 ;setup buffers move.w #$0000,head(a1) move.w #$ffff,tail(a1) move.w #$0000,count(a1) lea lbuff,a1 move.w #$0,head(a1) ;set queue for lp move.w #$ffff,tail(a1) move.w #0,count(a1) move.w #0,exam ;initialize control variables move.b #0,ctrls move.b #0,bkptf moveq #$4,d0 ;clear breakpoint table lea bktab,a1 slp: move.l #0,(a1)+ dbf d0,slp move.w #0,_sr ;clear register save area move.l #$10,d0 lea _pc,a0 slp1: move.l #0,(a0)+ dbf d0,slp1 lea ustck,a0 ;set user stack pointer move.l a0,ar7 lea sarea,a0 ;clear system stack moveq #$3f,d0 slp2: move.l #0,(a0)+ dbf d0,slp2 done: move.w ssri,sr ;enable interrupts at CPU lea howdy,a0 ;say hello bsr writs move.b #$95,ttyst ;enable interrupts from ports move.b #$95,lpst bset #$00,echo ;turn on terminal echo bra comm ;enter command loop ; ; Generalized write facility writes 1 byte ; passed in d0 to tty. ; writ: btst #0,ctrls ;Is ctrl-s active beq cwrit ;no, so write it stop #$2000 ;yes, so wait on next character bra writ ;when awakened try to echo cwrit: move.b d0,ttyd ;write the character to port writa: move.b ttyst,d0 ;sample control register till done btst #$1,d0 beq writa rts ; ; Generalized write facility writes 1 byte ; passed in d0 to serial port. ; writu: move.b d0,lpd ;write it writp: move.b lpst,d0 ;wait for completion btst #$1,d0 beq writp rts ; ; Generalized routine to write a string which ; must terminate in a null ; writs: move.b (a0)+,d0 ;a0 is address of string beq dwrts bsr writ bra writs dwrts: rts ; ;Generalized routine to write ;a word, byte or long word. ; writb: move.w #$1,t1 ;t1 is the number of bytes bra wr writw: move.w #$3,t1 bra wr writl: move.w #$7,t1 wr: movem.l d1/d2/a0/a6,-(a7) ;save registers d1,d2,a0,a6 move.w t1,d2 ;set count move.b #$00,t5+1 ;set a null at end lea t5+1,a6 ;use temps as a stack alp: move.b d0,d1 ;make each hex digit a and.b #$0f,d1 ;writable ascii byte cmp.b #$0a,d1 ;check for abcdef blt or3 or.b #$40,d1 sub.b #$09,d1 bra m1 or3: or.b #$30,d1 ;set high-order bits m1: move.b d1,-(a6) ;put on stack lsr.l #$4,d0 ;get next hex digit dbf d2,alp movea.w a6,a0 ;write the stack with writs bsr writs movem.l (a7)+,d1/d2/a0/a6 ;restore registers d1,d2,a0,a6 rts ; ; Interrupt handler for the keyboard ; interrupt. It simply stashes the input ; character in a buffer pointed to by a1. ; inint: move.w ssrn,sr ;disable interrupts movem.l d0-d2/a1/a2,-(a7) ;save registers d0,d1,d2,a1,a2 move.b ttyd,d1 ;get the character andi.b #$7f,d1 ;mask out the parity, if any btst #$3,bkptf ;In emulator mode ? beq incmp ;No, so continue cmp.b #$0c,d1 ;ctrl-l ? beq inld ;yes, so load cmp.b #$18,d1 ;No, is it a ctrl-x ? bne inwru ;No, so write it inld: bclr #$3,bkptf ;Exit emulator mode lea emudn,a1 ;set up return move.l a1,$16(a7) ;put return deep in stack cmp.b #$0c,d1 ;ctrl-l ? bne out ;No bra incmp ;check for ctrl-s or q inwru: move.b d1,d0 ;write to host bsr writu bra out incmp: cmp.b #$03,d1 ;check for ctrl-c beq rstrt cmp.b #$13,d1 ;check for ctrl-s bne ctrlq move.b #$1,ctrls bra out ctrlq: cmp.b #$11,d1 ;check for ctrl-q bne c1 move.b #$0,ctrls bra out c1: lea ibuff,a1 ;get buffer address cmpi.b #$10,count(a1) ;overflow ? blt cont ;No bra out ;Yes, so ignore character cont: addq.b #$1,tail(a1) ;add chacter to buffer addq.b #$1,count(a1) ;add 1 to count andi.b #$0f,tail(a1) ;modulo-16 move.w tail(a1),d2 ;get offset of new entry ror.w #$08,d2 ;in lower 8 bits of d2 andi.w #$ff,d2 ;mask off what's left lea queue(a1),a1 ;get address of queue move.b d1,$0(a1,d2.w) ;move byte into buffer btst #$00,echo ;is the echo turned on? beq out ;if not, skip the echo, move.b d1,d0 ;else setup for echo bsr writ out: movem.l (a7)+,d0-d2/a1/a2 ;reset registers d0,d1,d2,a1,a2 rte ; ; Interrupt handler for the load port. ; It stashes the character in the buffer ; pointed to by a1. ; lpint: move.w ssrn,sr ;same as above but less complex movem.l d0-d2/a1/a2,-(a7) ;registers d0,d1,d2,a1,a2 move.b lpd,d1 andi.b #$7f,d1 btst #$3,bkptf beq lplea move.b d1,d0 ;echo for emulator mode bsr writ bra lout lplea: lea lbuff,a1 ;queue a character cmpi.b #$10,count(a1) blt lcont bra out lcont: addq.b #$1,tail(a1) addq.b #$1,count(a1) andi.b #$0f,tail(a1) move.w tail(a1),d2 ror.w #$08,d2 andi.w #$ff,d2 lea queue(a1),a1 move.b d1,$0(a1,d2.w) lout: movem.l (a7)+,d0-d2/a1/a2 ;regs d0,d1,d2,a1,a2 rte ; ; Lgch - get a character from the serial port ; queue. If none available then wait for one ; ; lgch: movem.l d2/a1/a2,-(a7) ;save registers d2,a1,a2 lagn: ori.w #$0700,sr ;diable interrupts lea lbuff,a1 ;point at buffer move.w count(a1),t1 ;see if there is a cahracter beq lwait ;No, so wait move.w head(a1),d2 ;Yes, find it and update ror.w #$08,d2 andi.w #$00ff,d2 addq.b #$1,head(a1) subq.b #$1,count(a1) andi.b #$0f,head(a1) lea queue(a1),a1 ;Return character move.b $0(a1,d2.w),d0 andi.w #$f8ff,sr ;enable interrupts and movem.l (a7)+,d2/a1/a2 ;regs d2,a1/a2 rts lwait: stop #$2000 bra lagn ; ; Rstrt - restart from control c ; rstrt: movem.l (a7)+,d0/d1/a1/a2 ;rest regs d0,d1,a1,a2 frm intrpt hndlr movem.l d0-d7/a0-a7,dr0 ;save registers d0-a7 move.l usp,a0 ;save user stack pointer move.l a0,ar7 move.w (a7)+,_sr ;save status register from stack move.l (a7)+,_pc ;save program counter from stack bset #$00,echo ;turn on terminal echo pea comm ;fake a return to command loop move.w ssri,-(a7) ;fake a new status register rte ; ; Getch - get a character from the input ; queue. If none available then wait for it ; getch: movem.l d2/a1/a2,-(a7) ;same as lgch above d2,a1,a2 tryag: ori.w #$0700,sr lea ibuff,a1 move.w count(a1),t1 beq wait moveq #$0,d0 move.w head(a1),d2 ror.w #$08,d2 andi.w #$00ff,d2 addq.b #$1,head(a1) subq.b #$1,count(a1) andi.b #$0f,head(a1) lea queue(a1),a1 move.b $0(a1,d2.w),d0 andi.w #$f8ff,sr movem.l (a7)+,d2/a1/a2 ;regs d2,a1,a2 rts wait: stop #$2000 bra tryag ; ; CRLF - write a carriage return and ; line feed. ; cf: dc.b cr,lf,nul,nul crlf: lea cf,a0 bsr writs rts ; ; Generalized number fetcher ; getb: move.w #$1,t1 ;t1 is byte count bra gb getw: move.w #$3,t1 bra gb getl: move.w #$7,t1 gb: movem.l d1/d2,-(a7) ;save registers d1,d2 move.w t1,d2 moveq #$0,d1 blp: jsr (a0) ;a0 is address of which.. ;routine to use for getting, i.e. ;serial or terminal port cmp.b #$3a,d0 ;check for abcdef blt n1 add.b #$09,d0 n1: and.b #$0f,d0 asl.l #$4,d1 ;place in next hex didgit or.b d0,d1 dbf d2,blp move.l d1,d0 ;setup return in d0 movem.l (a7)+,d1/d2 ;restore registers d1,d2 rts ; ; command interpreter ; ctab: dc.w $4d00 ;m - memory update dc.w mem dc.w $4c00 ;l - load from host (S-format) dc.w load dc.w $0c00 ;ctrl-l - load from host (S-format) dc.w lnoof dc.w $5500 ;u - upload program from terminal port dc.w uload dc.w $4400 ;d - dump contents of memory dc.w dump dc.w $5300 ;s - single step dc.w singl dc.w $5400 ;t - trace a program's path dc.w trace dc.w $4700 ;g - start user program dc.w go dc.w $0d00 ;<cr> - short g command dc.w ggo dc.w $4500 ;e - enter terminal emulator mode dc.w emul dc.w $4200 ;b - set/remove breakpoints dc.w bkpt dc.w $4300 ;c - copy memory blocks dc.w copy dc.w $5200 ;r - display/modify registers dc.w regs dc.w $5000 ;p - prototype commands dc.w proto dc.w $4800 ;h - display help messages dc.w help dc.w $4100 ;a - assembly listing dc.w assem ; ; Structure of each entry is command ; (com) and address of servicing routine ; (code) ; com = $0 code = $2 comm: lea prmp,a0 ;write prompt bsr writs bsr getch ;get command from buffer and.b #$5f,d0 ;make upper-case lea ctab-4,a2 ;set-up search of ctab moveq #$0f,d2 ;count is one less clp: addq.w #4,a2 cmp.b com(a2),d0 dbeq d2,clp bne bad ;search fails movea.w code(a2),a2 ;get address for success jsr (a2) ;go to it bra comm ;loop back for next command bad: lea bcomm,a0 ;say it's bad and return bsr writs bra comm ; ; Copy - Copy memory blocks ; ;*************************************** ;* * ;* Copy is invoked as follows: * ;* * ;* c xxxx=yyyy,zzzz * ;* * ;* Copy locations yyyy thru zzzz to * ;* locations xxxx and upward. * ;* * ;*************************************** ; cdmes: dc.b lf,cr dc.b "Copied",0 ctom: dc.b " to ",0 cform: dc.b " for ",0 cbyt: dc.b " bytes",0 dc.b nul copy: bsr getch ;get past blank lea getch,a0 ;setup for terminal input bsr getw ;get target address move.l d0,d2 ;save it movea.w d0,a2 bsr getch ;get past = bsr getw ;get start address move.l d0,d3 ;save it movea.w d0,a3 ;again bsr getch ;get past , bsr getw ;get ending address sub.l d3,d0 ;calculate byte count move.l d0,d4 ;save it addq.b #$1,d4 colp: move.b (a3)+,(a2)+ ;start moving dbf d0,colp lea cdmes,a0 ;say we're done bsr writs move.l d3,d0 bsr writw lea ctom,a0 bsr writs move.l d2,d0 bsr writw lea cform,a0 bsr writs move.l d4,d0 bsr writw lea cbyt,a0 bsr writs rts ; ; Mem - memory update ; ;******************************************* ;* * ;* Memory sub-commands are as follows: * ;* * ;* m<cr> - start memory mode * ;* m xxxx - start m mode at loca- * ;* tion xxxx * ;* .xxxx - set pointer to location* ;* xxxx * ;* =xx - update current location * ;* to xx * ;* ,xx - increment location and * ;* update it to xx * ;* + - increment location * ;* - - decrement location * ;* <cr> - print current location * ;* and value * ;* * ;******************************************* ; mtab: dc.w $2e00 ;. dc.w mdot dc.w $3d00 ;= dc.w mequ dc.w $2c00 ;, dc.w mcom dc.w $2b00 ;+ dc.w mplu dc.w $2d00 ;- dc.w mmin dc.w $0d00 ;<CR> dc.w mloc mmes: dc.b lf,lf,cr dc.b "Memory Mode",0 mprmp: dc.b lf,cr,':',nul meqm: dc.b " == ",0 mem: bsr getch ;get delimiter cmp.b #$0d,d0 ;if <cr> then enter m beq mnoad lea getch,a0 ;else get the address bsr getw bra mplp ;set the address mnoad: moveq #$0,d0 ;start with no address mplp: move.w d0,exam ;set the address lea mmes,a0 ;load message bsr writs mlp: lea mprmp,a0 ;write memory prompt bsr writs bsr getch ;enter memory command loop moveq #$5,d2 ;set for search lea mtab-4,a0 mmlp: addq.w #$4,a0 ;search loop like comm cmp.b (a0),d0 dbeq d2,mmlp bne mexit ;exit if not found movea.w $2(a0),a0 ;get routine address jsr (a0) ;go to it bra mlp ;stay in memory loop mexit: rts mdot: lea getch,a0 ;handle setting of address bsr getw ;get address move.w d0,exam ;set in p[ointer bsr mloc ;print address and value rts mequ: lea getch,a0 ;handle new value at pointer bsr getb ;get new value movea.w exam,a0 ;set address move.b d0,(a0) ;move new value bsr mloc ;write new value rts mcom: addq.w #$1,exam ;handle pointer increment by , bsr mequ ;write new address and value rts mplu: addq.w #$1,exam ;increment pointer bsr mloc ;write val rts mmin: subq.w #$1,exam ;decrement pointer bsr mloc rts mloc: bsr crlf ;write address and value move.w exam,d0 ;write address bsr writw lea meqm,a0 bsr writs movea.w exam,a0 move.b (a0),d0 ;write value bsr writb rts ; ; Regs - Modify/examine registers ; ;*************************************** ;* * ;* Register subcommands are as follows:* ;* * ;* r<cr> - start register mode * ;* r xx - start r mode at register* ;* xx. Where xx : * ;* SR/_sr - status register * ;* PC/_pc - program counter * ;* d0 - d7 - data registers * ;* a0 - a7 - address regs. * ;* .xx - set pointer to register * ;* =xxxxxxxx - update current reg- * ;* ister to xxxxxxxx * ;* <cr> - print all registers * ;* * ;*************************************** ; rtab: dc.w $2e00 ;. dc.w rdot dc.w $3d00 ;= dc.w requ dc.w $0d00 ;<cr> dc.w rall rtab1: dc.w $cb00 ;internal name/offset dc.b "SR" ;print name dc.w $9c02 dc.b "PC" dc.w $d006 dc.b "d0" dc.w $d10a dc.b "d1" dc.w $d20e dc.b "d2" dc.w $d312 dc.b "d3" dc.w $d416 dc.b "d4" dc.w $d51a dc.b "d5" dc.w $d61e dc.b "d6" dc.w $d722 dc.b "d7" dc.w $a026 dc.b "a0" dc.w $a12a dc.b "a1" dc.w $a22e dc.b "a2" dc.w $a332 dc.b "a3" dc.w $a436 dc.b "a4" dc.w $a53a dc.b "a5" dc.w $a63e dc.b "a6" dc.w $a742 dc.b "a7" rmes: dc.b lf,lf,cr dc.b "Register Mode",0 rprmp: dc.b lf,cr,':',nul reqm: dc.b " == ",0 regs: bsr getch ;get delimiter cmp.b #$0d,d0 ;if <cr> then start at sr beq rnoad lea getch,a0 ;else set for terminal input bsr getb ;get register name bsr raddr ;set address bra rplp ;set register pointer rnoad: lea rtab1,a3 ;set default pointer value move.w a3,rexam rplp: lea rmes,a0 ;say hello bsr writs bsr rloc ;write starting loc value rlp: lea rprmp,a0 ;write register prompt bsr writs bsr getch ;get command moveq #$2,d2 ;set for search lea rtab-4,a0 rmlp: addq.w #$4,a0 ;search cmp.b (a0),d0 dbeq d2,rmlp bne rexit ;exit if not found movea.w $2(a0),a0 ;found it so go to it jsr (a0) bra rlp ;go again rexit: rts rdot: lea getch,a0 ;set register pointer bsr getb bsr raddr ;set input address bsr rloc ;write register and value rts requ: lea getch,a0 ;set new value movea.w rexam,a3 moveq #$0,d1 ;clear d1 move.b $1(a3),d1 ;get offset beq requs ;branch if sr is reg bsr getl ;get new value lea _sr,a4 ;find save area offset adda.l d1,a4 ;add offset move.l d0,(a4) ;move in new value bra requr ;print it requs: bsr getw ;same as above but for sr (word vs. long move.w d0,_sr requr: bsr rloc ;write new value rts rall: lea rtab1-4,a3 ;write all registers moveq #$11,d2 ;set count ralp: addq.w #$4,a3 ;loop move.w a3,rexam bsr rloc dbf d2,ralp rts raddr: move.w #$11,d4 ;find offset in save area lea rtab1-4,a3 radlp: addq.w #$4,a3 cmp.b (a3),d0 dbeq d4,radlp bne rexit move.w a3,rexam ;set register pointer rts rloc: bsr crlf ;print register name and value movea.w rexam,a4 move.b $2(a4),d0 ;write name bsr writ move.b $3(a4),d0 bsr writ lea reqm,a0 bsr writs moveq #$0,d0 move.b $1(a4),d0 ;write value beq rpsr ;branch if sr lea _sr,a0 ;find offset adda.l d0,a0 ;add offset move.l (a0),d0 ;move in new value bsr writl bra rrts rpsr: move.w _sr,d0 ;write sr value bsr writw rrts: rts ; ; Load - Load data from host ; ;**************************************** ;* * ;* Load is invoked as follows: * ;* * ;* l<cr> - load from host with no * ;* offset * ;* <ff> - same as l<cr> but used * ;* only exiting emulator * ;* l xxxx - load with offset xxxx * ;* * ;**************************************** ; lmes: dc.b lf,cr dc.b "Load...",0 slmes: dc.b lf,cr dc.b "User PC == ",0 elmes: dc.b lf,cr dc.b "Load done...",0 dc.b nul load: bsr getch ;get delimiter cmp.b #$0d,d0 ;if <cr> then no offset beq lnoof lea getch,a0 ;get offset bsr getw move.l d0,_pc ;save load point for go command bra ld1 lnoof: move.l #$0,_pc ld1: lea lbuff,a1 ;point at lpbuff move.w #$0,head(a1) ;set queue for lp move.w #$ffff,tail(a1) move.w #$0,count(a1) lea lmes,a0 ;print starting message bsr writs move.b #$0d,d0 ;load a <cr> bsr writu ;send it to the host lea lgch,a0 ;set up for host load routine llp: jsr (a0) ;get S cmp.b #$53,d0 bne llp ;No - start over jsr (a0) ;get 1 or 9 cmp.b #$39,d0 ;9 - then done beq ldone cmp.b #$31,d0 ;1 - then another record bne llp bsr getb ;get byte count move.l d0,d1 subq.b #$4,d1 ;remove count for check bsr getw add.l _pc,d0 ;add offset movea.w d0,a1 ;save starting address lblp: bsr getb ;get actual data byte move.b d0,(a1)+ ;move to memory dbf d1,lblp ;loop for count bsr getw ;gobble up check and crlf bra llp ;try another record ldone: jsr (a0) ;gobble up byte count jsr (a0) bsr getw ;get address from end macro add.l _pc,d0 ;add offset move.l d0,d1 ;save it move.l d0,_pc ;set starting address for go move.w #$0,_sr ;set status register move.l #$10,d0 lea dr0,a1 lreg: move.l #$0,(a1)+ dbf d0,lreg movea.l a0,a2 ;save the port location in a2 lea ustck,a0 move.l a0,ar7 ;set user stack lea slmes,a0 ;write message bsr writs move.l d1,d0 bsr writw ;write starting address move.l #$03,d1 ;gobble up last four bytes movea.l a2,a0 ;restore the port location to a0 ll2: jsr (a0) dbf d1,ll2 lea elmes,a0 ;send last message bsr writs bset #$00,echo ;turn terminal echo back on rts ; ; Upload - upload program from terminal port ; ;**************************************** ;* * ;* Upload is invoked as follows: * ;* * ;* u<cr> - load from terminal * ;* with no offset * ;* u xxxx - load with offset xxxx * ;* * ;**************************************** ; uload: bsr getch ;same as above, except that it cmp.b #$0d,d0 ;uses the terminal port for the beq ulnoof ;load. lea getch,a0 bsr getw move.l d0,_pc bra uld1 ulnoof: move.l #$0,_pc uld1: lea ibuff,a1 move.w #$0,head(a1) move.w #$ffff,tail(a1) move.w #$0,count(a1) lea lmes,a0 bsr writs move.b #$0d,d0 bsr writu lea getch,a0 bclr #$00,echo bra llp ;goes to the load routine above ; ; e - Enter terminal emulator mode * ; ;******************************************** ;* * ;* Invoke emulator mode as follows * ;* * ;* e * ;* * ;* NOTE: That in this mode any char- * ;* except a ctrl-x may be sent to the * ;* host. Ctrl-x is the escape sequence * ;* for getting out of terminal emulator * ;* mode. Ctrl-l does the same thing * ;* except a load (l) command is put * ;* in the command buffer. * ;* * ;******************************************** ; emmes: dc.b lf,cr dc.b "Exit terminal mode",0 enmes: dc.b lf,cr dc.b "Terminal mode:" dc.b lf,cr,nul emul: lea enmes,a0 ;write message bsr writs bset #$3,bkptf ;set emulator mode emu1: stop #$2000 ;wait for interrupt ;if interrupted the handlers ;will buffer and echo input bra emu1 emudn: lea emmes,a0 ;entered from interrupt handler bsr writs rts ; ; Proto - Prototype command in ram ; ;****************************************** ;* * ;* Prototype commands are invoked: * ;* * ;* px xxxx - load address xxxx for * ;* prototype command x. * ;* px<cr> - execute prototype com- * ;* mand x. * ;* * ;* NOTE: x must be a 1, 2, or 3 * ;* * ;****************************************** ; pmess: dc.b lf,cr dc.b "Prototype ",0 pm1: dc.b "running:" dc.b lf,cr,nul pm2: dc.b "installed" dc.b cr,nul,nul proto: bsr getch ;get prototype number move.l d0,d1 ;save number andi.b #$0f,d1 ;strip leading hex digit subq.b #$1,d1 ;normalize to 0 lsl.l #$1,d1 ;multiply by 2 lea ptab,a1 ;set starting address adda.l d1,a1 ;add offset bsr getch ;get delimiter cmp.b #$0d,d0 ;if <cr> then do command beq prun lea getch,a0 ;else install in table bsr getw ;get address move.w d0,(a1) ;move in address lea pmess,a0 bsr writs lea pm2,a0 bsr writs bra prts prun: movea.w (a1),a1 ;run prototype command lea pmess,a0 bsr writs lea pm1,a0 bsr writs jsr (a1) ;go do it prts: rts ; ; Bkpt - Set/Remove breakpoints ; ; ;********************************************** ;* * ;* Breakpoint is invoked as follows: * ;* * ;* b<cr> - display breakpoints * ;* b+xxxx - add a breakpoint at xxxx * ;* b-xxxx - delete breakpoint at xxxx * ;* b# - delete all breakpoints * ;* * ;********************************************** ; brmes: dc.b lf,cr dc.b "Bkpts removed",0 bdmes: dc.b lf,cr dc.b "Bkpts at:" dc.b lf,cr,nul bpmes: dc.b lf,cr dc.b "Bkpt added at ",0 bmmes: dc.b lf,cr dc.b "Bkpt deleted at ",0 bbmes: dc.b lf,cr dc.b "Bkpt error",0 dc.b nul bkin: dc.w $FFFF ;instruction constant bkpt: bsr getch ;get delimiter cmp.b #$0d,d0 ;if <cr> then print all bkpts beq bdis cmp.b #$2b,d0 ;if + then add a bkpt beq bpls cmp.b #$2d,d0 ;if - then delete a bkpt beq bmin cmp.b #$23,d0 ;if # then delete all bkpts bne bbad ;else its a bad message brem: moveq #$4,d1 ;remove all bkpts lea bktab-4,a1 ;set for loop blp1: adda.w #$4,a1 movea.w iloc(a1),a0 ;get address from table cmpa.w #$00,a0 ;if 0 then not an entry beq bno move.w instr(a1),(a0) ;else move instr back move.l #$0,instr(a1) ;clear table entry bno: dbf d1,blp1 ;loop bclr #$0,bkptf ;clear bkpt if in one btst #$2,bkptf ;In trace ? bne brno ;Yes. andi.w #$7fff,_sr ;else clear trace bit brno: lea brmes,a0 ;say done bsr writs bra brts bdis: lea bdmes,a0 ;handle display all bkpts bsr writs lea bktab-4,a1 ;set loop moveq #$4,d1 bdlp: adda.w #$4,a1 ;loop move.w iloc(a1),d0 ;get bkpt beq belp ;if 0 then not an entry bsr writw bsr crlf belp: dbf d1,bdlp ;loop bra brts bpls: lea bktab-4,a1 ;add a bkpt moveq #$4,d1 ;set for loop lea getch,a0 ;setup to get address bsr getw bl2: adda.w #$4,a1 ;loop cmp.w iloc(a1),d0 ;found entry already in table ? bne bmo ;yes movea.w d0,a2 ;reset it for insurance move.w bkin,(a2) ;set instruction bra bfnd ;exit for found bmo: move.w iloc(a1),d2 ;move to set condition codes dbeq d1,bl2 ;exit if 0 entry found bne bbad ;if exit is on count and not 0 then error move.w d0,iloc(a1) ;move in address movea.w d0,a2 ;point at location move.w (a2),instr(a1) ;get instruction into table move.w bkin,(a2) ;set bkpt instruction bfnd: lea bpmes,a0 ;load message bsr writs move.l a2,d0 bsr writw bclr #$1,bkptf ;clear in-single flag btst #$2,bkptf ;In trace ? bne brts ;Yes andi.w #$7fff,_sr ;clear trace bit bra brts bmin: lea bktab-4,a1 ;delete a breakpoint entry moveq #$4,d1 ;setup for search lea getch,a0 ;setup for terminal input bsr getw bl3: adda.w #$4,a1 ;loop cmp.w iloc(a1),d0 ;Is this the one ? dbeq d1,bl3 ;if yes then exit else loop bne bbad ;Exit on count ? movea.w d0,a2 ;no, so get address move.w instr(a1),(a2) ;return instruction move.l #$0,instr(a1) ;clear table entry btst #$0,bkptf ;In breakpoint ? beq bok ;No cmp.l _pc,d0 ;Yes, This breakpoint ? bne bok ;No bclr #$0,bkptf ;Yes, so clear handling it btst #$2,bkptf ;In trace ? bne bok ;Yes andi.w #$7fff,_sr ;else clear trace flag bok: lea bmmes,a0 ;load message bsr writs move.l a2,d0 ;print address bsr writw bra brts bbad: lea bbmes,a0 ;error handler bsr writs brts: rts ; ; dump - dump memory ; ;***************************************** ;* * ;* dump is invoked as follows: * ;* * ;* d<cr> - dump the next 64 bytes from* ;* last examined location * ;* d xxxx<cr> - dump the next 64 bytes* ;* from address xxxx * ;* d xxxx,yyyy - dump the bytes bet- * ;* ween xxxx and yyyy * ;* * ;***************************************** ; dmes: dc.b lf,lf,cr dc.b "Memory dump" dc.b lf,cr,nul dhed: dc.b lf,cr dc.b " 0 1 2 3" dc.b " 4 5 6 7 8 9 a" dc.b " B C d E F" dcr: dc.b lf,cr,nul dump: lea getch,a0 ;set for terminal input bsr getch ;get delimiter cmp.b #$0d,d0 ;if <cr> then dump from pointer bne dexam ;else get address movea.w exam,a1 ;get exam movea.w a1,a2 ;save it for ending address adda.w #$40,a2 ;add 64 for length of dump bra dgo ;go do it dexam: bsr getw ;get starting address movea.w d0,a1 bsr getch ;get delimiter cmp.b #$2c,d0 ;if , the get ending address bne dcom bsr getw ;get address movea.w d0,a2 ;save it bra dgo ;go dump dcom: movea.w a1,a2 ;default to 64 byte dump adda.w #$40,a2 dgo: lea dmes,a0 ;do the dump bsr writs lea dhed,a0 ;print header bsr writs move.l a1,d0 ;set starting address at 16 byte boundary and.b #$f0,d0 movea.w d0,a1 move.l a2,d0 ;round ending address to boundary or.b #$0f,d0 movea.w d0,a2 moveq #$0f,d1 ;move byte count to register dl1: move.l a1,d0 ;write starting address bsr writw movea.w a1,a3 ;save starting address dflp: moveq #$20,d0 ;write a space bsr writ move.b (a1)+,d0 ;get next byte bsr writb ;write it dbf d1,dflp ;loop moveq #$0f,d1 ;reset byte count movea.w a3,a1 ;refetch starting address moveq #$20,d0 ;write a space bsr writ dslp: move.b (a1)+,d0 ;write the byte representation cmp.b #$20,d0 ;if not printable then a dot bge dok move.b #$2e,d0 ;move in the dot bra dwrt dok: cmp.b #$7f,d0 ;printable again ? blt dwrt ;yes move.b #$2e,d0 ;no, move in a dot dwrt: bsr writ ;write it dbf d1,dslp ;line done ? lea dcr,a0 ;yes, so cr-lf bsr writs moveq #$10,d1 ;reset byte count cmpa.l a1,a2 ;done ? dblt d1,dl1 ;NO, so loop move.w a1,exam ;yes, so update exam rts ; ; Trace - Set trace mode ; ;***************************************** ;* * ;* Invoke trace as follows: * ;* * ;* t+ - trace a program's path * ;* t- - turn off trace * ;* * ;***************************************** ; tmes: dc.b lf,cr dc.b "Trace ",0 tonm: dc.b "on",0 toffm: dc.b "off",0 trace: bsr getch ;get command move.l d0,d1 ;save it lea tmes,a0 ;write message bsr writs cmp.b #$2b,d1 ;Is it a + ? beq ton ;yes btst #$0,bkptf ;In breakpoint ? bne tclr ;Yes, so don't clear trace andi.w #$7fff,_sr ;clear trace tclr: bclr #$2,bkptf ;turn-off in-trace flag lea toffm,a0 ;load off message bra tdone ;exit ton: ori.w #$8000,_sr ;set trace bit bclr #$1,bkptf ;clear single step bset #$2,bkptf ;set in-trace flag lea tonm,a0 ;write message tdone: bsr writs rts ; ; Single - set single step ; ;***************************************** ;* * ;* Invoke single step as follows: * ;* * ;* s+ - turn on single step * ;* s- - turn off single step * ;* * ;***************************************** ; smes: dc.b lf,cr dc.b "Single step",0 sonm: dc.b " on ",0 soffm: dc.b " off ",0 dc.b nul singl: bsr getch ;get command move.l d0,d1 ;save it lea smes,a0 ;write message bsr writs cmp.b #$2b,d1 ;+ ? beq son ;yes btst #$0,bkptf ;In breakpoint ? bne sclr ;Yes, so don't clear trace andi.w #$7fff,_sr ;clear trace bit sclr: bclr #$1,bkptf ;turn-off in-single flag lea soffm,a0 ;write off message bsr writs bra sdone ;exit son: bclr #$0,bkptf ;clear in-bkpt flag bset #$1,bkptf ;set in-single flag bclr #$2,bkptf ;clear in-trace flag lea sonm,a0 ;write message bsr writs bsr brem ;remove all breakpoints for single ori.w #$8000,_sr ;set trace bit sdone: rts ; ; Go - Start user program ; ;***************************************** ;* * ;* Invoke go as follows: * ;* * ;* g<cr> - go from start address in * ;* last load * ;* <cr> - same as g<cr> * ;* g xxxx - go from address xxxx * ;* * ;***************************************** ; gmes: dc.w csc dc.b "Program:" dc.b lf,lf,cr,nul go: bsr getch ;get seperator cmp.b #$0d,d0 ;if CR then beq ggo ;start from default gget: lea getch,a0 ;else get start addr bsr getw ;as given in comm. move.l d0,_pc ;set for return ggo: btst #$1,bkptf ;single set ? bne gnom ;Yes so no message lea gmes,a0 ;write message bsr writs gnom: addq.w #$4,a7 ;pop the stack movem.l dr0,d0-d7/a0-a6 ;get saved values d0-a6 move.l a7,t1 ;save system stack pointer movea.l ar7,a7 ;get saved user stack pointer move.l a7,usp ;reset the user stack movea.l t1,a7 ;reset system stack gbmov: move.l _pc,-(a7) ;set up return pc andi.w #$f8ff,_sr ;enable interrupts move.w _sr,-(a7) ;set up return sr rte ;++++++++++++++++++++++++++++++++++++++++ ;+ + ;+ End of commands, Start Handlers + ;+ + ;++++++++++++++++++++++++++++++++++++++++ ; ; Generic trap handler ; ghmes: dc.b lf,cr dc.b "Trap at ",0 dc.b nul ghlr: movem.l d0-d7/a0-a7,dr0 ;save all registers d0-a7 move.l usp,a6 ;get user stack pointer move.l a6,ar7 ;and save it move.w (a7)+,_sr ;save current SR move.l (a7)+,_pc ;save current return value pea comm ;set for return to comm move.w ssri,-(a7) ;enable interrupts on return ghpr: lea ghmes,a0 ;wx message ghpr1: bsr writs move.l _pc,d0 bsr writl rte ; ; Breakpoint handler ; bhmes: dc.b lf,cr dc.b "Breakpoint at ",0 binin: dc.b lf,cr dc.b "Bad Instruction at ",0 dc.b nul bhlr: move.w ssrn,sr ;disable interrupts movem.l d0-d7/a0-a7,dr0 ;save registers d0-a7 move.l usp,a6 ;get and save user stack pointer move.l a6,ar7 move.w (a7)+,_sr ;save status register move.l (a7)+,_pc ;save program counter pea comm ;set for return to comm move.w ssri,-(a7) ;enable interrupts on return movea.l _pc,a0 ;get pc on interrupt cmpi.w #$ffff,(a0) ;was interrupt caused by bkpt instruction ? beq bsnd ;Yes lea binin,a0 ;No, invalid instruction bra ghpr1 ;go wx message bsnd: lea bhmes,a0 ;wx bkpt message bsr writs move.l _pc,d0 bsr writw bsr crlf lea bktab-4,a1 ;find the breakpoint entry move.l #$4,d1 ;maximum of 5 move.l _pc,d0 ;this is where it happened bhl: adda.w #$4,a1 cmp.w iloc(a1),d0 ;is this the entry ? dbeq d1,bhl ;loop if not bne bhrte ;not found so quit movea.w d0,a2 ;point at it move.w instr(a1),(a2) ;move instruction back in ori.w #$8000,_sr ;set trace mode on bset #$0,bkptf ;set in-bkpt flag bhrte: rte ; ; Trace handler ; tlocm: dc.b lf,cr dc.b "PC == ",0 dc.b nul thlr: move.w ssrn,sr ;disable interrupts move.l a0,ar0 ;save used registers move.l d0,dr0 move.l a1,ar1 move.l d1,dr1 move.l a2,ar2 move.l d2,dr2 btst #$0,bkptf ;Handling a breakpoint ? beq treal ;No, so its a real trace movea.l _pc,a0 ;Yes, find where it occurred move.w bkin,(a0) ;reset the bkpt instruction bclr #$0,bkptf ;clear in progress bkpt btst #$2,bkptf ;In trace mode bne treal ;yes, go trace it thma0: andi.w #$7fff,(a7) ;No, so clear the trace bit bra trte treal: move.l $2(a7),_pc ;Not (just) a bkpt but trace or single btst #$1,bkptf ;Trace ? beq trpr ;Yes movem.l d0-d7/a0-a7,dr0 ;No,single-step d0-a7 move.l usp,a6 ;save registers and stack pointer move.l a6,ar7 move.w (a7)+,_sr ;save status register move.l (a7)+,_pc ;save pc pea comm ;fake return to comm move.w ssri,-(a7) ;enable interrupts on return trpr: lea tlocm,a0 ;wx message bsr writs move.l _pc,d0 bsr writl bsr crlf move.l _pc,a1 ;load the current address bsr ass1 ;wx the disassembled instruction trte: movea.l ar0,a0 ;restore used registers move.l dr0,d0 movea.l ar1,a1 move.l dr1,d1 movea.l ar2,a2 move.l dr2,d2 tr: rte ; ; Privilege Violation Handler ; ; See generic handler for details ; prmes: dc.b lf,cr dc.b "Privilege Error at ",0 phlr: movem.l d0-d7/a0-a7,dr0 ;regs d0-a7 move.l usp,a6 move.l a6,ar7 move.w (a7)+,_sr move.l (a7)+,_pc pea comm move.w ssri,-(a7) prpr: lea prmes,a0 bra ghpr1 ; ; address error/bus error trap ; abmes: dc.b lf,cr dc.b "address error at ",0 abhlr: movem.l d0-d7/a0-a7,dr0 ;regs d0-a7 move.l usp,a6 move.l a6,ar7 ;same as above but... move.w $8(a7),_sr ;status register is deeper in stack move.l $a(a7),_pc ;also pc pea comm move.w ssri,-(a7) abpr: lea abmes,a0 bra ghpr1 ; ; Macro instruction handlers ; ; ; Exit ; texit: movem.l d0-d7/a0-a7,dr0 ;save register values d0-a7 move.l usp,a6 ;save user stack pointer move.l a6,ar7 move.w (a7)+,_sr ;save status register move.l (a7)+,_pc ;save pc lea stack,a7 ;reset system mode stack pea comm ;fake return to comm move.w ssri,-(a7) ;ditto for status rte ; ; Getb ; tgetb: lea getch,a0 bsr getb rte ; ; Getw ; tgetw: lea getch,a0 bsr getw rte ; ; Getl ; tgetl: lea getch,a0 bsr getl rte ; ; Wrtb ; twrtb: bsr writb rte ; ; Wrtw ; twrtw: bsr writw rte ; ; Wrtl ; twrtl: bsr writl rte ; ; Getc ; tgetc: bsr getch rte ; ; Wrts ; twrts: bsr writs rte ; ; Wrtc ; twrtc: bsr writ rte ; ; Crlf ; tcrlf: bsr crlf rte ; ; Help - display help messages ; ;***************************************** ;* * ;* Invoke help as follows: * ;* * ;* h<cr> - print list of available * ;* help * ;* hx - print help message for x * ;* * ;***************************************** hlph: dc.b " H - display help messages" dc.b cr,lf,nul hlph1: dc.b " Invoke help as follows:" dc.b cr,lf dc.b " h<cr> - print list of available help" dc.b cr,lf dc.b " hx - print help message for x" dc.b cr,lf,nul hlpc: dc.b " C - Copy memory blocks" dc.b cr,lf,nul hlpc1: dc.b " Copy is invoked as follows:" dc.b cr,lf dc.b " c xxxx=yyyy,zzzz" dc.b cr,lf dc.b " Copy locations yyyy thru zzzz to" dc.b cr,lf dc.b " locations xxxx and upward." dc.b cr,lf,nul hlpm: dc.b " M - memory update" dc.b cr,lf,nul hlpm1: dc.b " Memory sub-commands are as follows:" dc.b cr,lf dc.b cr,lf dc.b " m<cr> - start memory mode" dc.b cr,lf dc.b " m xxxx - start m mode at location xxxx" dc.b cr,lf dc.b " .xxxx - set pointer to location xxxx" dc.b cr,lf dc.b " =xx - update current location to xx" dc.b cr,lf dc.b " ,xx - increment location and update it to xx" dc.b cr,lf dc.b " + - increment location" dc.b cr,lf dc.b " - - decrement location" dc.b cr,lf dc.b " <cr> - print current location and value" dc.b cr,lf,nul hlpr: dc.b " R - Modify/examine registers" dc.b cr,lf,nul hlpr1: dc.b " Register subcommands are as follows:" dc.b cr,lf dc.b cr,lf dc.b " r<cr> - start register mode" dc.b cr,lf dc.b " r xx - start r mode at register xx. Where xx :" dc.b cr,lf dc.b " SR/_sr - status register" dc.b cr,lf dc.b " PC/_pc - program counter" dc.b cr,lf dc.b " d0 - d7 - data registers" dc.b cr,lf dc.b " a0 - a7 - address regs." dc.b cr,lf dc.b " .xx - set pointer to register" dc.b cr,lf dc.b " =xxxxxxxx - update current register to xxxxxxxx" dc.b cr,lf dc.b " <cr> - print all registers" dc.b cr,lf,nul hlpl: dc.b " L - Load data from host" dc.b cr,lf,nul hlpu: dc.b " U - Load data from terminal port" dc.b cr,lf,nul hlpl1: dc.b " Load is invoked as follows:" dc.b cr,lf dc.b " l<cr> - load from host with no offset" dc.b cr,lf dc.b " <ff> - same as l<cr> but used from emulator mode" dc.b cr,lf dc.b " l xxxx - load with offset xxxx" dc.b cr,lf,cr,lf dc.b " Upload is invoked as follows:" dc.b cr,lf dc.b " u<cr> - load from terminal with no offset" dc.b cr,lf dc.b " u xxxx - load from terminal with offset xxxx" dc.b cr,lf,nul hlpe: dc.b " E - Enter terminal emulator mode" dc.b cr,lf,nul hlpe1: dc.b " Invoke emulator mode as follows" dc.b cr,lf dc.b cr,lf dc.b " e" dc.b cr,lf dc.b " NOTE: That in this mode any character except" dc.b cr,lf dc.b " a ctrl-x may be sent to the host. Ctrl-x is the" dc.b cr,lf dc.b " escape sequence for getting out of terminal emulator" dc.b cr,lf dc.b " mode. Ctrl-l does the same thing except a load (l)" dc.b cr,lf dc.b " command is put in the command buffer." dc.b cr,lf,nul hlpp: dc.b " P - Prototype commands in RAM" dc.b cr,lf,nul hlpp1: dc.b " Prototype commands are invoked:" dc.b cr,lf dc.b " px xxxx - load address xxxx for prototype command x." dc.b cr,lf dc.b " px<cr> - execute prototype command x." dc.b cr,lf dc.b cr,lf dc.b " NOTE: x must be a 1, 2, or 3" dc.b cr,lf,nul hlpb: dc.b " B - Set/Remove breakpoints" dc.b cr,lf,nul hlpb1: dc.b " Breakpoint is invoked as follows:" dc.b cr,lf dc.b " b<cr> - display breakpoints" dc.b cr,lf dc.b " b+xxxx - add a breakpoint at xxxx" dc.b cr,lf dc.b " b-xxxx - delete breakpoint at xxxx" dc.b cr,lf dc.b " b# - delete all breakpoints" dc.b cr,lf,nul hlpd: dc.b " D - dump memory" dc.b cr,lf,nul hlpd1: dc.b " dump is invoked as follows:" dc.b cr,lf dc.b cr,lf dc.b " d<cr> - dump the next 64 bytes from last examined location" dc.b cr,lf dc.b " d xxxx<cr> - dump the next 64 bytes from address xxxx" dc.b cr,lf dc.b " d xxxx,yyyy - dump the bytes between xxxx and yyyy" dc.b cr,lf,nul hlpa: dc.b " A - Assembly listing" dc.b cr,lf,nul hlpa1: dc.b " disassembly is invoked as follows:" dc.b cr,lf dc.b cr,lf dc.b " a<cr> - list the next 20 instructions from last location" dc.b cr,lf dc.b " a xxxx<cr> - list the next 20 instructions from address xxxx" dc.b cr,lf dc.b " a xxxx,yyyy - list the instructions between xxxx and yyyy" dc.b cr,lf,nul hlpt: dc.b " T - Set trace mode" dc.b cr,lf,nul hlpt1: dc.b " Invoke trace as follows:" dc.b cr,lf dc.b cr,lf dc.b " t+ - trace a program's path" dc.b cr,lf dc.b " t- - turn off trace" dc.b cr,lf,nul hlps: dc.b " S - set single step" dc.b cr,lf,nul hlps1: dc.b " Invoke single step as follows:" dc.b cr,lf dc.b cr,lf dc.b " s+ - turn on single step" dc.b cr,lf dc.b " s- - turn off single step" dc.b cr,lf,nul hlpg: dc.b " G - Start user program" dc.b cr,lf,nul hlpg1: dc.b " Invoke go as follows:" dc.b cr,lf dc.b cr,lf dc.b " g<cr> - go from start address in last load" dc.b cr,lf dc.b " <cr> - same as g<cr>" dc.b cr,lf dc.b " g xxxx - go from address xxxx " dc.b cr,lf,nul htab: dc.w $4800 ;h - help dc.w hlph,hlph1 dc.w $4d00 ;m - memory dc.w hlpm,hlpm1 dc.w $4c00 ;l - load dc.w hlpl,hlpl1 dc.w $5500 ;u - upload dc.w hlpu,hlpl1 dc.w $4400 ;d - dump dc.w hlpd,hlpd1 dc.w $5300 ;s - single step dc.w hlps,hlps1 dc.w $5400 ;t - trace program dc.w hlpt,hlpt1 dc.w $4700 ;g - start user program dc.w hlpg,hlpg1 dc.w $4500 ;e - emulate mode dc.w hlpe,hlpe1 dc.w $4200 ;b - breakpoints dc.w hlpb,hlpb1 dc.w $4300 ;c - copy dc.w hlpc,hlpc1 dc.w $5200 ;r - register modify dc.w hlpr,hlpr1 dc.w $5000 ;p - prototype commands dc.w hlpp,hlpp1 dc.w $4100 ;a - assembly listing dc.w hlpa,hlpa1 ; ; Structure of entry is topic (top), ; address of short message (hshort), ; and address of long message (hlong). ; help: bsr getch ;get argument andi.b #$5f,d0 ;make it uppercase cmpi.b #$0d,d0 ;is it a carriage return? bne htopic ;no, so decode topic hall: bsr crlf bsr crlf moveq #$0d,d1 ;load total # topics - 1 lea htab+2,a1 ;load location of short help shlp: movea.w (a1),a0 ;copy help location to a0 bsr writs ;write a short help message addq.w #$06,a1 ;increment to next help message dbf d1,shlp ;if not last message, print another one rts htopic: lea htab,a1 ;set up search of ctab moveq #$0d,d1 ;load total # topics - 1 lhlp: cmp.b (a1),d0 ;is the topic equal to the table value? beq hprn ;if so, print the short and long helps addq.w #$06,a1 ;else go to the next table location dbf d1,lhlp ;if not finished, try again bra hall ;if not one of these, print all shorts hprn: bsr crlf bsr crlf addq.w #$02,a1 ;increment a2 to short help location movea.w (a1)+,a0 ;transfer address to a0 bsr writs ;write the short message bsr crlf ;feed an extra line movea.w (a1),a0 ;transfer long help address to a0 bsr writs ;write the long message rts ; ; assem - assembly listing ; ;**************************************** ;* * ;* assem is invoked as follows: * ;* * ;* a<cr> - disassemble the next * ;* 20 instructions from * ;* last examined location * ;* a xxxx<cr> - disassemble 20 * ;* instructions from xxxx * ;* a xxxx,yyyy - disassemble all * ;* instructions from xxxx * ;* to yyyy * ;* * ;**************************************** ames: dc.b lf,lf,cr dc.b "assembly listing:" dc.b lf,cr,nul,nul assem: lea getch,a0 ;set for terminal input bsr getch ;get delimiter cmp.b #$0d,d0 ;if <cr> then list from pointer bne aexam ;else get address movea.w exam,a1 ;get exam lea ames,a0 ;write message bsr writs move.b #$13,d2 ;load 19 into d2 ass20: bsr ass1 ;list a single instruction dbf d2,ass20 ;if not finished, decrement and go again move.w a1,exam ;save new examination pointer rts aexam: bsr getw ;get starting address movea.w d0,a1 bsr getch ;get delimiter cmpi.b #$2c,d0 ;if , then get ending address bne acom bsr getw ;get address move.w d0,aend ;save it lea ames,a0 ;write message bsr writs assxy: bsr ass1 ;list a single instruction cmpa.w aend,a1 ;reached the end of the range yet? ble assxy ;if not, do it again move.w a1,exam ;save new examination pointer rts acom: lea ames,a0 ;write message bsr writs move.b #$13,d2 ;load 19 into d2 bra ass20 ;jump to dump 20 routine ass1: move.w a1,d0 ;load the address bsr writw ;print it out bsr spc bsr spc move.w (a1)+,d0 ;load the instruction word move.w d0,d1 ;make a copy rol.w #$06,d0 ;get a longword offset for and.w #$003c,d0 ;the instruction group (most sig. 4 bits) lea grtab,a2 ;load the address of the group table adda.w d0,a2 ;add the group offset movea.l (a2),a2 ;get the actual address jsr (a2) ;jump to the appropriate subroutine rts ;exit disend: bra crlf ;send crlf after instruction rts ;return from instruction subroutine grtab: dc.l gr0 dc.l gr1 dc.l gr2 dc.l gr3 dc.l gr4 dc.l gr5 dc.l gr6 dc.l gr7 dc.l gr8 dc.l gr9 dc.l gra dc.l grb dc.l grc dc.l grd dc.l gre dc.l grf gr0: move.w d1,d0 cmpi.w #$023c,d0 ;is it ANDIccr? bne ANDIsr ;no. lea mANDI,a0 ;yes, print bsr writs ;write it bsr spc bsr pound bsr dollar move.w (a1)+,d0 ;load the operand bsr writb ;write it bsr comma lea mccr,a0 ;load "ccr" bsr writs bra disend ANDIsr: cmpi.w #$027c,d0 ;is it ANDIsr? bne EORIcr ;no. lea mANDI,a0 ;yes, print bsr writs ;write it bsr spc bsr pound bsr dollar move.w (a1)+,d0 ;load the operand bsr writw ;write it bsr comma lea msr,a0 ;load "sr" bsr writs bra disend EORIcr: cmpi.w #$0a3c,d0 ;is it EORIccr? bne EORIsr ;no. lea mEORI,a0 ;yes, print bsr writs ;write it bsr spc bsr pound bsr dollar move.w (a1)+,d0 ;load the operand bsr writb ;write it bsr comma lea mccr,a0 ;load "ccr" bsr writs bra disend EORIsr: cmpi.w #$0a7c,d0 ;is it EORIsr? bne ORIccr ;no. lea mEORI,a0 ;yes, print bsr writs bsr spc bsr pound bsr dollar move.w (a1)+,d0 ;load the operand bsr writw ;write it bsr comma lea msr,a0 ;load "sr" bsr writs ;write it bra disend ORIccr: cmpi.w #$003c,d0 ;is it ORIccr? bne ORIsr ;no. lea mORI,a0 ;yes, print bsr writs ;write it bsr spc bsr pound bsr dollar move.w (a1)+,d0 ;load the operand bsr writb ;write it bsr comma lea mccr,a0 ;load "ccr" bsr writs bra disend ORIsr: cmpi.w #$007c,d0 ;is it ORIsr? bne ADDI ;no. lea mORI,a0 ;yes, print bsr writs ;write it bsr spc bsr pound bsr dollar move.w (a1)+,d0 ;load the operand bsr writw ;write it bsr comma lea msr,a0 ;load "sr" bsr writs bra disend ADDI: andi.w #$0f00,d0 ;mask operation bits cmpi.w #$0600,d0 ;is it ADDI? bne ANDI ;no. lea mADDI,a0 ;yes, print bsr writs ;write it bra iops ;go print operands ANDI: cmpi.w #$0200,d0 ;is it ANDI? bne CMPI ;no. lea mANDI,a0 ;yes, print bsr writs ;write it bra iops ;go print operands CMPI: cmpi.w #$0c00,d0 ;is it CMPI? bne EORI ;no. lea mCMPI,a0 ;yes, print bsr writs ;write it bra iops ;go print operands EORI: cmpi.w #$0a00,d0 ;is it EORI? bne ORI ;no. lea mEORI,a0 ;yes, print bsr writs ;write it bra iops ;go print operands ORI: cmpi.w #$0000,d0 ;is it ORI? bne SUBI ;no. lea mORI,a0 ;yes, print bsr writs ;write it bra iops ;go print operands SUBI: cmpi.w #$0400,d0 ;is it SUBI? bne MOVEP ;no. lea mSUBI,a0 ;yes, print bsr writs ;write it iops: move.w d1,d0 andi.w #$00c0,d0 ;check the size to see if it is legal cmpi.w #$00c0,d0 ;is it size 11? bne lops ;if not, it is legal bsr spc ;if so, it is not legal bsr spc bra ILLEG lops: bsr dot move.w d1,d0 bsr findsiz ;print the operand size bsr spc bsr pound bsr dollar cmpi.b #$62,siz ;is byte? bne iopsw ;no move.w (a1)+,d0 ;yes bsr writb bra iopsc iopsw: cmpi.b #$77,siz ;is word? bne iopsl ;no move.w (a1)+,d0 ;yes bsr writw bra iopsc iopsl: move.l (a1)+,d0 ;size long bsr writl iopsc: bsr comma move.w d1,d0 bsr writea ;write the operand bra disend MOVEP: move.w d1,d0 andi.w #$0138,d0 ;mask MOVEP bits cmpi.w #$0108,d0 ;is it a MOVEP? bne bitop ;if not, it's a bit operation lea mMOVEP,a0 ;load "MOVEP" bsr writs ;write it bsr dot move.w d1,d0 andi.w #$0040,d0 ;word or longword bne movepl ;longword move.b #$77,d0 ;load a 'W' bsr writ ;write it bra moveps ;go write operands movepl: move.b #$6C,d0 ;load an 'L' bsr writ ;write it moveps: bsr spc move.w d1,d0 andi.w #$0080,d0 ;mask direction bit beq movepr ;if zero, move to reg move.w d1,d0 andi.w #$0e00,d0 ;mask data reg rol.w #$07,d0 ;get into rightmost bits bsr wdreg ;write it bsr comma bsr lparen move.w (a1)+,d0 bsr writw ;write the address bsr comma move.w d1,d0 andi.w #$0007,d0 ;mask address reg bsr wareg ;write it bsr rparen bra disend movepr: move.w d1,d0 bsr lparen move.w (a1)+,d0 bsr writw ;write the address bsr comma move.w d1,d0 andi.w #$0007,d0 ;mask address reg bsr wareg ;write it bsr rparen bsr comma move.w d1,d0 andi.w #$0e00,d0 ;mask data reg rol.w #$07,d0 ;get into rightmost bits bsr wdreg ;write it bra disend bitop: move.w d1,d0 andi.w #$0f00,d0 ;mask the subgroup bits cmpi.w #$0e00,d0 ;and make sure this is not illegal, since beq ILLEG ;a non-MOVEP 00001110xxxxxxxx is invalid move.w d1,d0 andi.w #$00c0,d0 ;mask bitop select bits bne BCHG ;it's not BTST lea mBTST,a0 ;load "BTST" bsr writs ;write it bra bitop2 ;go print operands BCHG: cmpi.w #$0040,d0 bne BCLR ;it's not BCHG lea mBCHG,a0 ;load "BCHG" bsr writs ;write it bra bitop2 ;go print operands BCLR: cmpi.w #$0080,d0 bne BSET ;it's not BCLR lea mBCLR,a0 ;load "BCLR" bsr writs ;write it bra bitop2 ;go print operands BSET: lea mBSET,a0 ;load "BSET" bsr writs ;write it bitop2: bsr spc move.w d1,d0 andi.w #$0100,d0 ;is it reg or immediate operand? bne bitopr ;if nonzero, it's a reg operand bsr pound move.w (a1)+,d0 ;get the bit number andi.b #$07,d0 ;modulo 8 bsr writb ;write it bsr comma move.w d1,d0 bsr writea ;write the destination operand bra disend bitopr: move.w d1,d0 andi.w #$0e00,d0 ;mask off the reg number rol.w #$07,d0 ;get it into rightmost bits bsr wdreg ;write it bsr comma move.w d1,d0 bsr writea ;write the destination operand bra disend gr1: move.b #$62,siz ;make MOVE a byte operation bra MOVE ;go parse the command type gr2: move.b #$6c,siz ;make MOVE a word operation bra MOVE ;go parse the command type gr3: move.b #$77,siz ;make MOVE a long operation MOVE: move.w d1,d0 andi.w #$01c0,d0 ;mask the destination opmode cmpi.w #$0040,d0 ;is it MOVEA? beq MOVEA ;if so, go do MOVEA lea mMOVE,a0 ;load "MOVE" bsr writs ;write it bsr dot bsr findend ;write the size bsr spc move.w d1,d0 bsr writea ;write source operand bsr comma move.w d1,d0 ror.w #$01,d0 ;these rols and rors make dest. op. std. rol.b #$03,d0 ror.w #$08,d0 ror.b #$03,d0 ror.w #$05,d0 ;dest. op. now looks like source op. bsr writea ;write it bra disend MOVEA: move.b siz,d0 ;load the size. cmpi.b #$42,d0 ;is it a byte? beq ILLEG ;if so, this is not a valid instruction lea mMOVEA,a0 ;load "MOVEA" bsr writs ;write it bsr dot bsr findend ;write the size bsr spc move.w d1,d0 bsr writea ;write source operand bsr comma move.w d1,d0 rol.w #$07,d0 ;get destination into rightmost andi.w #$07,d0 ;mask off the destination bits bsr wareg ;write it bra disend gr4: move.w d1,d0 NOP: cmpi.w #$4e71,d0 ;is it a NOP? bne RESET ;no lea mNOP,a0 ;yes, print bsr writs ;write it bra disend RESET: cmpi.w #$4e70,d0 ;is it RESET? bne RTE ;no lea mRESET,a0 ;yes, print bsr writs ;write it bra disend RTE: cmpi.w #$4e73,d0 ;is it RTE? bne RTR ;no lea mRTE,a0 ;yes, print bsr writs ;write it bra disend RTR: cmpi.w #$4e77,d0 ;is it RTR? bne RTS ;no lea mRTR,a0 ;yes, print bsr writs ;write it bra disend RTS: cmpi.w #$4e75,d0 ;is it RTS? bne STOP ;no lea mRTS,a0 ;yes, print bsr writs ;write it bra disend STOP: cmpi.w #$4e72,d0 ;is it STOP? bne TRAPV ;no lea mSTOP,a0 ;yes, print bsr writs ;write it bsr spc bsr pound bsr dollar move.w (a1)+,d0 ;load data word bsr writw ;write it bra disend TRAPV: cmpi.w #$4e76,d0 ;is it TRAPV? bne JMP ;no lea mTRAPV,a0 ;yes, print bsr writs ;write it bra disend JMP: andi.w #$0fc0,d0 ;mask bits for one <ea> operations cmpi.w #$0ec0,d0 ;is it JMP? bne JSR ;no move.w d1,d0 andi.w #$0038,d0 ;check to see if it's a valid mode beq ILLEG cmpi.w #$0008,d0 ;these are not beq ILLEG cmpi.w #$0018,d0 ;valid modes with beq ILLEG cmpi.w #$0020,d0 ;this instruction beq ILLEG lea mJMP,a0 ;yes, print bsr writs bra gtea0 ;go write operand JSR: cmpi.w #$0e80,d0 ;is it JSR? bne MOVtc ;no move.w d1,d0 andi.w #$0038,d0 ;check to see if it's a valid mode beq ILLEG cmpi.w #$0008,d0 ;these are not beq ILLEG cmpi.w #$0018,d0 ;valid modes with beq ILLEG cmpi.w #$0020,d0 ;this instruction beq ILLEG lea mJSR,a0 ;yes, print bsr writs bra gtea0 ;go write operand MOVtc: cmpi.w #$04c0,d0 ;is it MOVEtoccr? bne MOVfc ;no move.w d1,d0 andi.w #$0038,d0 ;check to see if it's a valid mode cmpi.w #$0008,d0 ;these are not beq ILLEG lea mMOVE,a0 ;yes, print bsr writs bsr spc move.w d1,d0 bsr writea ;write the source operand bsr comma lea mccr,a0 ;load "ccr" bsr writs bra disend MOVfc: cmpi.w #$02c0,d0 ;is it MOVEfromccr? bne MOVts ;no move.w d1,d0 andi.w #$0038,d0 ;check to see if it's a valid mode cmpi.w #$0008,d0 ;these are not beq ILLEG lea mMOVE,a0 ;yes, print bsr writs bsr spc lea mccr,a0 ;load "ccr" bsr writs ;write it bsr comma move.w d1,d0 bsr writea ;write the operand bra disend MOVts: cmpi.w #$06c0,d0 ;is it MOVEtosr? bne MOVfs ;no move.w d1,d0 andi.w #$0038,d0 ;check to see if it's a valid mode cmpi.w #$0008,d0 ;these are not beq ILLEG lea mMOVE,a0 ;yes, print bsr writs bsr spc move.w d1,d0 bsr writea ;write the source operand bsr comma lea msr,a0 ;load "sr" bsr writs bra disend MOVfs: cmpi.w #$00c0,d0 ;is it MOVEfromsr? bne NBCD ;no move.w d1,d0 andi.w #$0038,d0 ;check to see if it's a valid mode cmpi.w #$0008,d0 ;these are not beq ILLEG lea mMOVE,a0 ;yes, print bsr writs bsr spc lea msr,a0 ;load "sr" bsr writs bsr comma move.w d1,d0 bsr writea ;write the operand bra disend NBCD: cmpi.w #$0800,d0 ;is it NBCD? bne PEA ;no move.w d1,d0 andi.w #$0038,d0 ;check to see if it's a valid mode cmpi.w #$0008,d0 ;these are not beq ILLEG lea mNBCD,a0 ;yes, print bsr writs bra gtea0 ;go write operand PEA: cmpi.w #$0840,d0 ;is it PEA? bne TAS ;no move.w d1,d0 andi.w #$0038,d0 ;check to see if it's a valid mode beq SWAP cmpi.w #$0008,d0 ;these are not beq ILLEG cmpi.w #$0018,d0 ;valid modes with beq ILLEG cmpi.w #$0020,d0 ;this instruction beq ILLEG lea mPEA,a0 ;yes, print bsr writs bra gtea0 ;go write operand TAS: cmpi.w #$0AC0,d0 ;is it TAS? bne CLR ;no move.w d1,d0 andi.w #$0038,d0 ;check to see if a valid mode cmpi.w #$0008,d0 ;these are not beq ILLEG cmpi.w #$0038,d0 ;special modes bne tasok move.w d1,d0 andi.w #$0006,d0 bne ILLEG ;certain of them are bad tasok: lea mTAS,a0 ;yes, print bsr writs gtea0: bsr spc move.w d1,d0 bsr writea ;write the operand bra disend CLR: andi.w #$0f00,d0 ;mask <ea> + <size> operations cmpi.w #$0200,d0 ;is it clr? bne NEG ;no move.w d1,d0 andi.w #$0038,d0 ;check to see if it's a valid mode cmpi.w #$0008,d0 ;these are not beq ILLEG lea mCLR,a0 ;yes, print bsr writs bra gtea1 ;go write operand NEG: cmpi.w #$0400,d0 ;is it NEG? bne NEGX ;no move.w d1,d0 andi.w #$0038,d0 ;check to see if it's a valid mode cmpi.w #$0008,d0 ;these are not beq ILLEG lea mNEG,a0 ;yes, print bsr writs bra gtea1 ;go write operand NEGX: cmpi.w #$0000,d0 ;is it NEGX? bne NOT ;no move.w d1,d0 andi.w #$0038,d0 ;check to see if it's a valid mode cmpi.w #$0008,d0 ;these are not beq ILLEG lea mNEGX,a0 ;yes, print bsr writs bra gtea1 ;go write operand NOT: cmpi.w #$0600,d0 ;is it NOT? bne TST ;no move.w d1,d0 andi.w #$0038,d0 ;check to see if it's a valid mode cmpi.w #$0008,d0 ;these are not beq ILLEG lea mNOT,a0 ;yes, print bsr writs bra gtea1 ;go write operand TST: cmpi.w #$0A00,d0 ;is it TST? bne BKPT ;no move.w d1,d0 andi.w #$0038,d0 ;check to see if it's a valid mode cmpi.w #$0008,d0 ;these are not beq ILLEG lea mTST,a0 ;yes, print bsr writs gtea1: bsr dot move.w d1,d0 bsr findsiz ;print the operand length bsr spc move.w d1,d0 bsr writea ;print the operand bra disend BKPT: move.w d1,d0 andi.w #$fff8,d0 ;mask out the operand cmpi.w #$4848,d0 ;is it BKPT? bne LINK ;no lea mBKPT,a0 ;yes, print bsr writs ;write it bsr spc move.w d1,d0 andi.w #$0007,d0 ;mask BKPT number addi.b #$30,d0 ;make it an ascii numeral bsr writ ;write it bra disend LINK: move.w d1,d0 andi.w #$0f00,d0 ;look at bits 8-11 cmpi.w #$0e00,d0 ;is it an E? bne SWAP ;no move.w d1,d0 andi.w #$fff8,d0 ;mask off reg number cmpi.w #$4e50,d0 ;is it a LINK? bne MOVEsp ;no lea mLINK,a0 ;load "LINK" bsr writs ;write it bsr spc move.w d1,d0 andi.w #$0007,d0 ;mask reg bits bsr wareg ;write it bsr comma bsr pound bsr dollar move.w (a1)+,d0 ;load displacement bsr writw ;write it bra disend MOVEsp: move.w d1,d0 andi.w #$fff0,d0 ;mask off operand bits cmpi.w #$4e60,d0 ;is it MOVEusp? bne TRAP ;no lea mMOVE,a0 ;yes, so load "MOVE" bsr writs ;write it bsr spc move.w d1,d0 andi.w #$0008,d0 ;mask direction bit bne MOVEts ;if zero, move to usp move.w d1,d0 andi.w #$0007,d0 ;mask reg bits bsr wareg ;write it bsr comma lea musp,a0 ;load "usp" bsr writs ;write it bra disend MOVEts: lea musp,a0 ;load "usp" bsr writs ;write it bsr comma move.w d1,d0 andi.w #$0007,d0 ;mask reg bits bsr wareg ;write it bra disend TRAP: move.w d1,d0 andi.w #$fff0,d0 ;mask operand if TRAP cmpi.w #$4e40,d0 ;is it TRAP? bne SWAP ;no lea mTRAP,a0 ;yes bsr writs bsr spc bsr pound bsr dollar move.b d1,d0 andi.b #$0f,d0 ;mask off trap number bsr writb ;write it bra disend SWAP: move.w d1,d0 andi.w #$fff8,d0 ;mask off operand if SWAP cmpi.w #$4840,d0 ;is it SWAP? bne UNLK ;no lea mSWAP,a0 ;load "swap" bsr writs ;write it bsr spc move.w d1,d0 andi.w #$0007,d0 ;mask off the reg bits bsr wdreg ;write the reg bra disend UNLK: cmpi.w #$4e58,d0 ;is it UNLK? bne LEA ;no lea mUNLK,a0 ;load "UNLK" bsr writs ;write it bsr spc move.w d1,d0 andi.w #$0007,d0 ;mask off reg number bsr wareg ;write it bra disend LEA: move.w d1,d0 andi.w #$f1c0,d0 ;mask for lea cmpi.w #$41c0,d0 ;is it LEA? bne CHK ;no move.w d1,d0 andi.w #$0038,d0 ;check to see if it's a valid mode beq ILLEG cmpi.w #$0008,d0 ;these are not beq ILLEG cmpi.w #$0018,d0 ;valid modes with beq ILLEG cmpi.w #$0020,d0 ;this instruction beq ILLEG lea mLEA,a0 ;load "LEA" bsr writs ;write it bsr spc move.w d1,d0 bsr writea ;write source op bsr comma move.w d1,d0 andi.w #$0e00,d0 ;mask reg number rol.w #$07,d0 ;get reg in rightmost bits bsr wareg ;write it bra disend CHK: cmpi.w #$4180,d0 ;is it CHK? bne EXT ;no move.w d1,d0 andi.w #$0038,d0 ;check to see if it's a valid mode cmpi.w #$0008,d0 ;these are not beq ILLEG lea mCHK,a0 ;load "CHK" bsr writs ;write it move.b #$77,siz ;size is word bsr spc move.w d1,d0 bsr writea ;write source operand bsr comma move.w d1,d0 andi.w #$0e00,d0 ;mask reg number rol.w #$07,d0 ;get into rightmost bits bsr wdreg ;write it bra disend EXT: move.w d1,d0 andi.w #$ffb8,d0 ;mask all pertinent bits cmpi.w #$4880,d0 ;is it EXT? bne MOVEC ;no lea mEXT,a0 ;yes, load "EXT" bsr writs ;write it bsr dot move.w d1,d0 andi.w #$0040,d0 ;mask the size bit bne lext ;size long move.b #$77,d0 ;size word, load 'W' bsr writ ;write it bra ext1 lext: move.b #$6c,d0 ;load 'L' bsr writ ;write it ext1: bsr spc move.w d1,d0 andi.w #$0007,d0 ;mask the reg number bsr wdreg ;write it bra disend MOVEC: move.w d1,d0 andi.w #$fffe,d0 ;mask in appropriate bits cmpi.w #$4e7b,d0 ;is it a MOVEC? bne MOVEM ;no lea mCOPOUT,a0 ;yes, so load "COPOUT" bsr writs ;write it move.w (a1)+,d0 ;compensate for the operand word bra disend MOVEM: move.w d1,d0 andi.w #$fb80,d0 ;mask bits cmpi.w #$4880,d0 ;is it MOVEM? bne ILLEG ;no lea mMOVEM,a0 ;yes, load "MOVEM" bsr writs bsr dot move.w d1,d0 andi.w #$0040,d0 ;mask MOVEM size bit bne MOVEMl ;if nonzero, longword operand move.b #$77,d0 ;load 'W' move.b d0,siz ;save size as 'W' bsr writ ;write it bsr spc bra MOVEMo ;go write operands MOVEMl: move.b #$6c,d0 ;load 'L' move.b d0,siz ;save size as 'L' bsr writ ;write it bsr spc MOVEMo: move.w d1,d0 andi.w #$0400,d0 ;which direction? bne MOVEMr ;to reg bsr dollar move.w (a1)+,d0 ;load the reg list bsr writw ;write it bsr comma move.w d1,d0 bsr writea ;write the address bra disend MOVEMr: move.w (a1)+,t1 ;save the reg list move.w d1,d0 bsr writea ;write the address bsr comma bsr dollar move.w t1,d0 ;reload the reg list bsr writw ;write it bra disend ILLEG: lea mILLEG,a0 ;yes, print bsr writs ;write it bra disend gr5: move.w d1,d0 ;refresh the instruction word and.w #$00c0,d0 ;mask bits 6-7 cmp.w #$00c0,d0 ;DBcc/Scc? bne addq ;no move.w d1,d0 ;yes andi.w #$0038,d0 ;mask DB/S bit cmpi.w #$0008,d0 ;DBcc? bne Sxx ;no move.b #$64,d0 ;load D into d0 bsr writ ;write it move.b #$62,d0 ;load B into d0 bsr writ ;write it move.w d1,d0 ;refresh bsr findcon ;print condition bsr spc move.w d1,d0 ;refresh andi.w #$0007,d0 ;mask out reg bsr wdreg ;write reg bsr comma clr.w d0 ;zero d0 so wdis looks for word disp. bsr wdis ;print the address bra disend Sxx: move.b #$72,d0 ;load S into d0 bsr writ ;write it move.w d1,d0 ;refresh bsr findcon ;print condition bsr spc move.w d1,d0 bsr writea ;write operand bra disend findcon:lea contab,a0 ;load location of beginning of table andi.w #$0f00,d0 ;mask off the condition ror.w #$07,d0 ;make condition a word offset adda.w d0,a0 ;add to table location to get ascii move.b (a0)+,d0 ;load the first byte bsr writ ;write it move.b (a0)+,d0 ;load the second byte bsr writ ;write it rts contab: dc.b "t " dc.b "f " dc.b "hi" dc.b "ls" dc.b "cc" dc.b "cs" dc.b "ne" dc.b "eq" dc.b "vc" dc.b "vs" dc.b "pl" dc.b "mi" dc.b "ge" dc.b "lt" dc.b "gt" dc.b "le" addq: move.w d1,d0 andi.w #$0100,d0 ;addq/subq bne subq lea mADDQ,a0 ;load "addq" bra qwrit subq: lea mSUBQ,a0 ;load "subq" qwrit: bsr writs ;write it bsr dot move.w d1,d0 bsr findsiz ;write size of operand bsr spc bsr pound bsr dollar move.w d1,d0 andi.w #$0e00,d0 ;mask data rol.w #$07,d0 ;get into rightmost bits bne q8 ;if nonzero, range is 1-7 move.b #$08,d0 ;if zero, range is 8 q8: bsr writb ;write byte bsr comma move.w d1,d0 bsr writea ;write dest bra disend gr6: move.w d1,d0 andi.w #$0f00,d0 ;mask the cond bit bne BSR ;not BRA lea mBRA,a0 ;load "bra" bsr writs ;write it bra Bccw ;go write operand BSR: cmp.w #$0100,d0 ;BSR? bne Bcc ;no lea mBSR,a0 ;load "bsr" bsr writs ;write it bra Bccw ;go write operand Bcc: move.b #$62,d0 ;load a B bsr writ ;write it move.w d1,d0 bsr findcon ;print the condition Bccw: bsr spc move.w d1,d0 bsr wdis ;write the address bra disend gr7: move.w d1,d0 andi.w #$0100,d0 ;check to make sure bne ILLEG lea mMOVEQ,a0 ;load "MOVEQ" bsr writs ;write it bsr spc bsr pound bsr dollar move.b d1,d0 ;load data bsr writb ;write it bsr comma move.w d1,d0 andi.w #$0e00,d0 ;mask off the reg bits rol.w #$07,d0 ;get into rightmost bits bsr wdreg ;write it bra disend gr8: move.w d1,d0 andi.w #$01f0,d0 ;mask for SBCD. cmpi.w #$0100,d0 ;is it SBCD? bne DIVS lea mSBCD,a0 ;load "SBCD" xBCD: bsr writs ;write it move.w d1,d0 andi.w #$0008,d0 ;mask reg/memory bit beq sbcdrg ;reg to reg op bsr spc bsr minus bsr lparen move.w d1,d0 andi.w #$0007,d0 ;mask source reg bsr wareg ;print it bsr rparen bsr comma bsr minus bsr lparen move.w d1,d0 andi.w #$0e00,d0 ;mask destination reg rol.w #$07,d0 ;get into rightmost bits bsr wareg ;print it bsr rparen bra disend sbcdrg: bsr spc move.w d1,d0 andi.w #$0007,d0 ;mask source reg bsr wdreg bsr comma move.w d1,d0 andi.w #$0e00,d0 ;mask destination reg rol.w #$07,d0 ;get into rightmost bits bsr wdreg ;print it bra disend DIVS: move.w d1,d0 andi.w #$00c0,d0 ;mask mode bits cmpi.w #$00c0,d0 ;is this a DIV operation bne OR ;no. move.w d1,d0 ;yes. andi.w #$0100,d0 ;mask the sign bit beq DIVU ;it's unsigned divide lea mDIVS,a0 ;load "DIVS" bsr writs ;write it bra divprt ;go decode the rest of the command DIVU: lea mDIVU,a0 ;load "DIVU" bsr writs ;write it divprt: bsr spc move.w d1,d0 bsr writea bsr comma move.w d1,d0 andi.w #$0e00,d0 ;mask data reg rol.w #$07,d0 ;get into rightmost bits bsr wdreg ;print it bra disend OR: lea mOR,a0 ;load "OR" ANDent: bsr writs ;write it bsr dot move.w d1,d0 bsr findsiz ;print operand size bsr spc move.w d1,d0 andi.w #$0100,d0 ;find destination beq ordreg ;if zero, data reg move.w d1,d0 andi.w #$0e00,d0 ;mask the reg bits rol.w #$07,d0 ;get into rightmost bits bsr wdreg ;and print it bsr comma move.w d1,d0 bsr writea ;write the destination bra disend ordreg: move.w d1,d0 bsr writea ;write the source bsr comma move.w d1,d0 andi.w #$0e00,d0 ;mask the reg bits rol.w #$07,d0 ;get into rightmost bits bsr wdreg ;and print it bra disend gr9: lea mSUB,a0 ;load "SUB" bsr writs ;write it ax: move.w d1,d0 andi.w #$00c0,d0 ;mask the size bits cmpi.w #$00c0,d0 ;is it ADDA or SUBA? bne SUB ;no move.b #$61,d0 ;yes, so load an 'A' bsr writ ;write it bsr dot move.w d1,d0 andi.w #$0100,d0 ;mask size bit bne SUBAl ;if set, longword operand move.b #$77,d0 ;load 'W' bsr writ ;write it bra axa ;go print operands SUBAl: move.b #$6c,d0 ;load 'L' bsr writ ;write it bra axa ;go print operands SUB: move.w d1,d0 andi.w #$0130,d0 ;mask appropriate bits cmpi.w #$0100,d0 ;is it ADDX or SUBX? beq SUBX ;yes bsr dot ;no, so continue move.w d1,d0 bsr findsiz ;print the size of the operand axa: bsr spc move.w d1,d0 andi.w #$00c0,d0 ;mask the size bits cmpi.w #$00c0,d0 ;is it ADDA or SUBA beq subea1 ;if so, <ea> is first operand move.w d1,d0 andi.w #$0100,d0 ;mask direction bit bne subea2 ;if bit is set, <ea> is last operand move.w d1,d0 bsr writea ;write the first operand bsr comma move.w d1,d0 andi.w #$0e00,d0 ;mask the reg bits rol.w #$07,d0 ;get into rightmost bits bsr wdreg ;print it bra disend subea1: move.w d1,d0 bsr writea ;write the first operand bsr comma move.w d1,d0 andi.w #$0e00,d0 ;mask the reg bits rol.w #$07,d0 ;get into rightmost bits bsr wareg ;print it bra disend subea2: move.w d1,d0 andi.w #$0e00,d0 ;mask the reg bits rol.w #$07,d0 ;get into rightmost bits bsr wdreg ;print it bsr comma move.w d1,d0 bsr writea ;write second operand bra disend SUBX: move.b #$78,d0 ;load an 'X' bsr writ ;write it bsr dot move.w d1,d0 bsr findsiz ;write the operand length bsr spc move.w d1,d0 andi.w #$0008,d0 ;mask reg/memory bit beq SUBXdr ;reg to reg op bsr minus bsr lparen move.w d1,d0 andi.w #$0007,d0 ;mask source reg bsr wareg ;print it bsr rparen bsr comma bsr minus bsr lparen move.w d1,d0 andi.w #$0e00,d0 ;mask destination reg rol.w #$07,d0 ;get into rightmost bits bsr wareg ;print it bsr rparen bra disend SUBXdr: move.w d1,d0 andi.w #$0007,d0 ;mask source reg bsr wdreg bsr comma move.w d1,d0 andi.w #$0e00,d0 ;mask destination reg rol.w #$07,d0 ;get into rightmost bits bsr wdreg ;print it bra disend gra: bra ILLEG ;not a valid instruction grb: move.w d1,d0 andi.w #$00c0,d0 ;mask size bits cmpi.w #$00c0,d0 ;size = 11 ? bne CMP ;no. lea mCMPA,a0 ;yes, so load "CMPA" bsr writs ;write it bsr dot move.w d1,d0 andi.w #$0100,d0 ;mask CMPA size bit bne CMPAl ;if nonzero, longword operand move.b #$77,d0 ;load 'W' move.b d0,siz ;save size as 'W' bsr writ ;write it bra CMPAop ;go write operands CMPAl: move.b #$6c,d0 ;load 'L' move.b d0,siz ;save size as 'L' bsr writ ;write it CMPAop: bsr spc move.w d1,d0 bsr writea ;go write source operand bsr comma move.w d1,d0 andi.w #$0e00,d0 ;mask reg number rol.w #$07,d0 ;get into rightmost bits bsr wareg ;write it bra disend CMP: move.w d1,d0 andi.w #$0100,d0 ;mask CMP/CMPM bit bne CMPM ;if nonzero, it's CMPM lea mCMP,a0 ;load "CMP" bsr writs ;write it bsr dot move.w d1,d0 bsr findsiz ;write size of operand bsr spc move.w d1,d0 bsr writea ;write source operand bsr comma move.w d1,d0 andi.w #$0e00,d0 ;mask reg number rol.w #$07,d0 ;get into rightmost bits bsr wdreg ;write it bra disend CMPM: move.w d1,d0 andi.w #$0038,d0 ;mask mode bits cmpi.w #$0008,d0 ;is it address reg mode? bne EOR ;if not, it's an EOR lea mCMPM,a0 ;load "CMPM" bsr writs ;write it bsr dot move.w d1,d0 bsr findsiz ;write the operand size bsr spc bsr lparen move.w d1,d0 andi.w #$0007,d0 ;mask source reg bits bsr wareg ;write it bsr rparen bsr plus bsr comma bsr lparen move.w d1,d0 andi.w #$0e00,d0 ;mask destination reg bits rol.w #$07,d0 ;get into rightmost bits bsr wareg ;write it bsr rparen bsr plus bra disend EOR: lea mEOR,a0 ;load "EOR" bsr writs ;write it bsr dot move.w d1,d0 bsr findsiz ;write operand size bsr spc move.w d1,d0 andi.w #$0e00,d0 ;mask reg number rol.w #$07,d0 ;get into rightmost bits bsr wdreg ;write it bsr comma move.w d1,d0 bsr writea ;write destination bra disend grc: move.w d1,d0 andi.w #$01f0,d0 ;mask for ABCD cmpi.w #$0100,d0 ;is it ABCD? bne MULS ;no. lea mABCD,a0 ;load "ABCD" bra xBCD ;go print everything MULS: move.w d1,d0 andi.w #$00c0,d0 ;mask mode bits cmpi.w #$00c0,d0 ;is this a MUL operation? bne EXG ;no. move.w d1,d0 ;yes. andi.w #$0100,d0 ;mask the sign bit beq MULU ;it's unsigned multiply lea mMULS,a0 ;load "MULS" bsr writs ;write it bra divprt ;go decode the rest of the command MULU: lea mMULU,a0 ;load "MULU" bsr writs ;write it bra divprt ;go decode the rest of the command EXG: move.w d1,d0 andi.w #$0130,d0 ;mask for EXG cmpi.w #$0100,d0 ;is it EXG? bne AND ;no. lea mEXG,a0 ;yes, print bsr writs ;write it bsr spc move.w d1,d0 andi.w #$00f8,d0 ;mask op-mode bits cmpi.w #$0040,d0 ;is it Di,Dj? bne EXGaa ;no move.w d1,d0 andi.w #$0e00,d0 ;mask source reg number rol.w #$07,d0 ;get into rightmost bits bsr wdreg ;write it bsr comma move.w d1,d0 andi.w #$0007,d0 ;mask destination reg number bsr wdreg ;write it bra disend EXGaa: cmpi.w #$0048,d0 ;is it Ai,Aj? bne EXGda ;no move.w d1,d0 andi.w #$0e00,d0 ;mask source reg number rol.w #$07,d0 ;get into rightmost bits bsr wareg ;write it bsr comma move.w d1,d0 andi.w #$0007,d0 ;mask destination reg number bsr wareg ;write it bra disend EXGda: cmpi.w #$0088,d0 ;is it Di,Aj? bne ILLEG move.w d1,d0 andi.w #$0e00,d0 ;mask source reg number rol.w #$07,d0 ;get into rightmost bits bsr wdreg ;write it bsr comma move.w d1,d0 andi.w #$0007,d0 ;mask destination reg number bsr wareg ;write it bra disend AND: lea mAND,a0 ;load "AND" bra ANDent ;go write the operation grd: lea mADD,a0 ;load "ADD" bsr writs ;write it, then find out which ADD bra ax ;go find out which ADD it is gre: move.w d1,d0 move.w d1,t1 ;save an extra copy of opcode andi.w #$00c0,d0 ;is this an <ea> instruction? cmpi.w #$00c0,d0 bne fshf ;if not, find out which shift move.w d1,d0 ;else adjust the saved opcode ror.w #$06,d0 ;rightward by six bits to allow proper move.w d0,t1 ;decoding of the shift type fshf: move.w t1,d0 ;load the properly adjusted opcode andi.w #$0018,d0 ;mask operation bits of adjusted opcode bne LS ;not AS lea mAS,a0 ;load "AS" bra lr ;find the direction LS: cmpi.w #$0008,d0 ;is it LS? bne ROX ;no lea mLS,a0 ;yes, so load "LS" bra lr ;find the direction ROX: cmpi.w #$0010,d0 ;is it ROX? bne RO ;no lea mROX,a0 ;yes, so load "ROX" bra lr RO: lea mRO,a0 ;load "RO" lr: bsr writs ;write the operation move.w d1,d0 andi.w #$0100,d0 ;mask the direction bit bne lsh ;left shift if bit set move.b #$72,d0 ;load 'r' bra shtyp ;go find the shift type lsh: move.b #$6c,d0 ;load 'l' shtyp: bsr writ ;write the direction move.w d1,d0 andi.w #$00c0,d0 ;mask the size bits cmpi.w #$00c0,d0 ;is the size 11? bne regsh ;if not, it's a reg shift bsr spc move.w d1,d0 bsr writea ;write the operand bra disend regsh: bsr dot move.w d1,d0 bsr findsiz ;print the operand length bsr spc move.w d1,d0 andi.w #$0020,d0 ;mask the immediate/reg bit beq immsh ;if bit clear, it's an immediate shift move.w d1,d0 andi.w #$0e00,d0 ;mask the count reg rol.w #$07,d0 ;get into rightmost bits bsr wdreg ;write count reg bsr comma move.w d1,d0 andi.w #$0007,d0 ;mask destination reg bsr wdreg ;write destination reg bra disend immsh: bsr spc bsr pound bsr dollar move.w d1,d0 andi.w #$0e00,d0 ;mask the count bits rol.w #$07,d0 ;get into rightmost bits bne sh17 ;if not zero, 1-7 bit shift move.b #$08,d0 ;if zero, 8 bit shift sh17: bsr writb ;write it bsr comma move.w d1,d0 andi.w #$0007,d0 ;mask the reg bits bsr wdreg ;write the destination reg bra disend grf: bra ILLEG ;not a valid instruction ; ; message table -- the ascii strings for the instructions ; mCOPOUT: dc.b "COPOUT",0 mABCD: dc.b "abcd",0 mADD: dc.b "add",0 mADDA: dc.b "adda",0 mADDI: dc.b "addi",0 mADDQ: dc.b "addq",0 mADDX: dc.b "addx",0 mAND: dc.b "and",0 mANDI: dc.b "andi",0 mAS: dc.b "as",0 mBCHG: dc.b "bchg",0 mBCLR: dc.b "bclr",0 mBKPT: dc.b "bkpt",0 mBRA: dc.b "bra",0 mBSET: dc.b "bset",0 mBSR: dc.b "bsr",0 mBTST: dc.b "btst",0 mCHK: dc.b "chk",0 mCLR: dc.b "clr",0 mCMP: dc.b "cmp",0 mCMPA: dc.b "cmpa",0 mCMPI: dc.b "cmpi",0 mCMPM: dc.b "cmpm",0 mDIVS: dc.b "divs",0 mDIVU: dc.b "divu",0 mEOR: dc.b "eor",0 mEORI: dc.b "eori",0 mEORIcr: dc.b "eoriccr",0 mEXG: dc.b "exg",0 mEXT: dc.b "ext",0 mILLEG: dc.b "ILLEGAL",0 mJMP: dc.b "jmp",0 mJSR: dc.b "jsr",0 mLEA: dc.b "lea",0 mLINK: dc.b "link",0 mLS: dc.b "ls",0 mMOVE: dc.b "move",0 mMOVEA: dc.b "movea",0 mMOVEC: dc.b "movec",0 mMOVEM: dc.b "movem",0 mMOVEP: dc.b "movep",0 mMOVEQ: dc.b "moveq",0 mMULS: dc.b "muls",0 mMULU: dc.b "mulu",0 mNBCD: dc.b "nbcd",0 mNEG: dc.b "neg",0 mNEGX: dc.b "negx",0 mNOP: dc.b "nop",0 mNOT: dc.b "not",0 mOR: dc.b "or",0 mORI: dc.b "ori",0 mPEA: dc.b "pea",0 mRESET: dc.b "reset",0 mRO: dc.b "ro",0 mROX: dc.b "rox",0 mRTE: dc.b "rte",0 mRTR: dc.b "rtr",0 mRTS: dc.b "rts",0 mSBCD: dc.b "sbcd",0 mSTOP: dc.b "stop",0 mSUB: dc.b "sub",0 mSUBA: dc.b "suba",0 mSUBI: dc.b "subi",0 mSUBQ: dc.b "subq",0 mSUBX: dc.b "subx",0 mSWAP: dc.b "swap",0 mTAS: dc.b "tas",0 mTRAP: dc.b "trap",0 mTRAPV: dc.b "trapv",0 mTST: dc.b "tst",0 mUNLK: dc.b "unlk",0 mccr: dc.b "ccr",0 msr: dc.b "sr",0 musp: dc.b "usp",0 spc: move.b #$20,d0 ;load a spc bsr writ ;write it rts comma: move.b #$2c,d0 ;load a comma bsr writ ;write it rts lparen: move.b #$28,d0 ;load a left parenthesis bsr writ ;write it rts rparen: move.b #$29,d0 ;load a right parenthesis bsr writ ;write it rts pound: move.b #$23,d0 ;load a pound sign bsr writ ;write it rts dot: move.b #$2e,d0 ;load a period bsr writ ;write it rts plus: move.b #$2b,d0 ;load a plus bsr writ ;write it rts minus: move.b #$2d,d0 ;load a minus bsr writ ;write it rts dollar: move.b #$24,d0 ;load a dollar sign bsr writ ;write it rts findsiz:andi.w #$00c0,d0 ;mask out the size bits bne wsize ;if nonzero, it's not a byte move.b #$62,siz ;set size to byte bra findend wsize: cmpi.w #$0040,d0 ;is it a word operand? bne lsize ;no. move.b #$77,siz ;set size to word bra findend lsize: move.b #$6c,siz ;set size to longword findend:move.b siz,d0 bsr writ ;write the size rts wareg: swap d0 ;save the reg number in upper 16 bits move.b #$61,d0 ;load 'a' bsr writ ;write it swap d0 ;restore the reg number ori.b #$30,d0 ;add offset to get digit bsr writ ;write it rts wdreg: swap d0 ;save the reg number in upper 16 bits move.b #$64,d0 ;load 'a' bsr writ ;write it swap d0 ;restore the reg number ori.b #$30,d0 ;add offset to get digit bsr writ ;write it rts mPC: dc.b "pc",0 mIAM: dc.b "ILLEGAL ADDRESS MODE",0 writea: move.b d0,writm ;save the important part of the opcode andi.b #$38,d0 ;mask off all but the mode bits bne mode1 ;if zero, it's data reg direct move.b writm,d0 andi.b #$07,d0 ;mask the reg number bsr wdreg ;write the data reg bra eaout mode1: cmpi.b #$08,d0 ;is it address reg direct? bne mode2 ;no move.b writm,d0 ;yes andi.b #$07,d0 ;mask reg number bsr wareg ;write address reg bra eaout mode2: cmpi.b #$10,d0 ;is it address reg indirect? bne mode3 ;no bsr lparen ;yes move.b writm,d0 andi.b #$07,d0 ;mask reg number bsr wareg ;write address reg bsr rparen bra eaout mode3: cmpi.b #$18,d0 ;is it postincrement? bne mode4 ;no bsr lparen ;yes move.b writm,d0 andi.b #$07,d0 ;mask reg number bsr wareg ;write address reg bsr rparen bsr plus bra eaout mode4: cmpi.b #$20,d0 ;is it predecrement? bne mode5 ;no bsr minus ;yes bsr lparen move.b writm,d0 andi.b #$07,d0 ;mask reg number bsr wareg ;write address reg bsr rparen bra eaout mode5: cmpi.b #$28,d0 ;is it reg indirect w/ displacement? bne mode6 ;no bsr dollar move.w (a1)+,d0 ;yes, so load 16 bit displacement bsr writw ;write it bsr lparen move.b writm,d0 andi.b #$07,d0 ;mask reg number bsr wareg ;write address reg bsr rparen bra eaout mode6: cmpi.b #$30,d0 ;is it reg indirect w/ index? bne mode7 ;no bsr dollar move.w (a1),d0 ;load the index word bsr writb ;write the 8 bit displacement bsr lparen move.b writm,d0 andi.b #$07,d0 ;mask reg number bsr wareg ;write address reg bsr comma m6ad: move.w (a1),d0 ;load index word again bpl m6d ;if MSB of index word is 0, data reg rol.w #$04,d0 ;rotate reg number into rightmost bits andi.w #$0007,d0 ;mask reg number bsr wareg ;write address reg bra m6no m6d: rol.w #$04,d0 ;rotate reg number into rightmost bits andi.w #$0007,d0 ;mask reg number bsr wdreg ;write data reg m6no: bsr dot move.w (a1)+,d0 ;load the index reg a final time andi.w #$0800,d0 ;mask the length bit bne m6l ;if nonzero, long reg index move.b #$77,d0 ;load 'w' bsr writ ;write it bsr rparen bra eaout m6l: move.b #$6c,d0 ;load 'l' bsr writ ;write it bsr rparen bra eaout mode7: move.b writm,d0 ;mode seven, so decode reg number andi.w #$07,d0 ;mask reg number bne m71 ;if zero, absolute.w bsr dollar move.w (a1)+,d0 ;move the address into d0 bsr writw ;write it bra eaout m71: cmpi.b #$01,d0 ;is it absolute.l? bne m72 ;no bsr dollar move.l (a1)+,d0 ;yes, so move the address into d0 bsr writl ;write it bra eaout m72: cmpi.b #$02,d0 ;is it relative w/ displacement? bne m73 ;no bsr dollar move.w (a1)+,d0 ;yes, so load displacement into d0 bsr writw ;write it bsr lparen lea mPC,a0 ;load "PC" bsr writs ;write it bsr rparen bra eaout m73: cmpi.b #$03,d0 ;is it relative w/ index? bne m74 ;no bsr dollar move.w (a1),d0 ;load the index word bsr writb ;write the 8 bit displacement bsr lparen lea mPC,a0 ;load "PC" bsr writs ;write it bsr comma bra m6ad ;go to reg. indir. routine to finish m74: cmpi.b #$04,d0 ;is it immediate? bne m75 ;no bsr pound bsr dollar move.b siz,d0 ;load the size byte cmpi.b #$62,d0 ;is it byte data? bne m74w ;no move.w (a1)+,d0 ;yes, so load immediate data bsr writb ;write byte data bra eaout m74w: cmpi.b #$77,d0 ;is it word data? bne m74l ;no move.w (a1)+,d0 ;yes, so load immediate data bsr writw ;write word data bra eaout m74l: move.l (a1)+,d0 ;load long immediate data bsr writl ;write long data bra eaout m75: lea mIAM,a0 ;load illegal mode message bsr writs ;write it eaout: rts wdis: swap d0 ;save opcode in upper 16 so we can bsr dollar ;hexidecimalize the displacement swap d0 ;get it back in lower 16 move.l a1,d1 ;copy current address to d1 tst.b d0 ;is displacement zero? beq wdisw ;if so, word displacement andi.l #$00ff,d0 ;mask off the displacement ext.w d0 ;sign extend the displacement ext.l d0 ;to word size add.l d0,d1 ;add 8-bit displacement to address move.l d1,d0 ;copy into d0 bsr writl ;write address bra wdiso wdisw: move.w (a1)+,d0 ;load the displacement word ext.l d0 ;sign extend it add.l d0,d1 ;add displacement move.l d1,d0 ;copy to d0 bsr writl wdiso: rts ; ;************************************ ;* * ;* Monitor data area * ;* * ;************************************ ; org $00004000 utrapb: ds.l 1 utrapc: ds.l 1 utrapd: ds.l 1 utrape: ds.l 1 utrapf: ds.l 1 userv1: ds.l 1 userv2: ds.l 1 userv3: ds.l 1 userv4: ds.l 1 userv5: ds.l 1 uav3: ds.l 1 uav4: ds.l 1 uav5: ds.l 1 uav6: ds.l 1 uav7: ds.l 1 sarea: ds.w 128 ;system stack stack = * bktab: ds.w 10 ;breakpoint table _sr: ds.w 1 ;register save area _pc: ds.l 1 dr0: ds.l 1 dr1: ds.l 1 dr2: ds.l 1 dr3: ds.l 1 dr4: ds.l 1 dr5: ds.l 1 dr6: ds.l 1 dr7: ds.l 1 ar0: ds.l 1 ar1: ds.l 1 ar2: ds.l 1 ar3: ds.l 1 ar4: ds.l 1 ar5: ds.l 1 ar6: ds.l 1 ar7: ds.l 1 ptab: ds.w 3 ;prototype table rexam: ds.w 1 ;register examination pointer exam: ds.w 1 ;memory examination pointer t1: ds.w 1 ;temporary work area t2: ds.w 1 t3: ds.w 1 t4: ds.w 1 t5: ds.w 1 ctrls: ds.w 1 ;ctrl-s,ctrl-q flag bkptf equ *-1 ;breakpoint flag lbuff: ds.w 11 ;load buffer ibuff: ds.w 11 ;terminal buffer users: ds.w 128 ;users stack area ustck equ * aend: ds.w 1 siz: ds.w 1 writm: ds.w 1 echo: ds.w 1 ;terminal port echo flag
37.028376
83
0.436855
4f933ca9faf2ceef6cc474beaa6048c860269c08
578
asm
Assembly
oeis/153/A153373.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
11
2021-08-22T19:44:55.000Z
2022-03-20T16:47:57.000Z
oeis/153/A153373.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
9
2021-08-29T13:15:54.000Z
2022-03-09T19:52:31.000Z
oeis/153/A153373.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
3
2021-08-22T20:56:47.000Z
2021-09-29T06:26:12.000Z
; A153373: Number of zig-zag paths from top to bottom of a rectangle of width 11 with 2n-1 rows whose color is not that of the top right corner. ; Submitted by Jon Maiga ; 5,18,66,244,906,3372,12566,46860,174810,652252,2433942,9083004,33897050,126503148,472111446,1761934444,6575609946,24540472572,91586214806,341804255580,1275630545370,4760717401612,17767238012502 add $0,1 mov $3,$0 seq $0,102091 ; Number of perfect matchings in the C_{2n} X P_3 graph (C_{2n} is the cycle graph on 2n vertices and P_3 is the path graph on 3 vertices). mov $2,2 pow $2,$3 add $0,$2 div $0,6
48.166667
195
0.769896
c44cf6ffa5b13442e0c21a3fa929949cdcc95ab5
753
asm
Assembly
sound/sfxasm/AE.asm
NatsumiFox/Sonic-3-93-Nov-03
032e4fc25f243636d458639c4a4311caca898f96
[ "MIT" ]
7
2019-12-05T00:35:57.000Z
2022-02-27T20:00:33.000Z
sound/sfxasm/AE.asm
NatsumiFox/Sonic-3-93-Nov-03
032e4fc25f243636d458639c4a4311caca898f96
[ "MIT" ]
null
null
null
sound/sfxasm/AE.asm
NatsumiFox/Sonic-3-93-Nov-03
032e4fc25f243636d458639c4a4311caca898f96
[ "MIT" ]
null
null
null
AE_Header: sHeaderInit ; Z80 offset is $D5A9 sHeaderPatch AE_Patches sHeaderTick $01 sHeaderCh $01 sHeaderSFX $80, $05, AE_FM5, $F2, $05 AE_FM5: sPatFM $00 ssModZ80 $01, $01, $EB, $16 dc.b nBb5, $05, nG5, $03, nBb5, $05, nG5, $03 sStop AE_Patches: ; Patch $00 ; $11 ; $0F, $0F, $0B, $0F, $5F, $5F, $5F, $5F ; $1C, $1A, $13, $12, $00, $00, $00, $00 ; $FF, $FF, $FF, $FF, $14, $28, $2A, $80 spAlgorithm $01 spFeedback $02 spDetune $00, $00, $00, $00 spMultiple $0F, $0B, $0F, $0F spRateScale $01, $01, $01, $01 spAttackRt $1F, $1F, $1F, $1F spAmpMod $00, $00, $00, $00 spSustainRt $1C, $13, $1A, $12 spSustainLv $0F, $0F, $0F, $0F spDecayRt $00, $00, $00, $00 spReleaseRt $0F, $0F, $0F, $0F spTotalLv $14, $2A, $28, $00
22.818182
46
0.577689
307d889e658b89d998402dca97a023e9e57a8fe1
40,708
asm
Assembly
Library/Spreadsheet/Spreadsheet/spreadsheetDraw.asm
steakknife/pcgeos
95edd7fad36df400aba9bab1d56e154fc126044a
[ "Apache-2.0" ]
504
2018-11-18T03:35:53.000Z
2022-03-29T01:02:51.000Z
Library/Spreadsheet/Spreadsheet/spreadsheetDraw.asm
steakknife/pcgeos
95edd7fad36df400aba9bab1d56e154fc126044a
[ "Apache-2.0" ]
96
2018-11-19T21:06:50.000Z
2022-03-06T10:26:48.000Z
Library/Spreadsheet/Spreadsheet/spreadsheetDraw.asm
steakknife/pcgeos
95edd7fad36df400aba9bab1d56e154fc126044a
[ "Apache-2.0" ]
73
2018-11-19T20:46:53.000Z
2022-03-29T00:59:26.000Z
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% Copyright (c) GeoWorks 1991 -- All Rights Reserved PROJECT: PC GEOS MODULE: GeoCalc FILE: uiSpreadsheet.asm AUTHOR: Gene Anderson, Feb 12, 1991 ROUTINES: Name Description ---- ----------- INT RestrictToMask Restrict the range of cells to the mask bounds INT CellRedrawDXCX Draw one cell by invalidating INT CellRedraw Draw one cell by invalidating INT BadCellType Draw one cell as part of range INT CellDrawInt Draw one cell as part of range INT SetClipRect Set a clip rectangle for the cell bounds INT ResetClipRect Reset the clip rectangle INT GetDrawBounds Get bounds of cell for drawing INT MoveCellIntoBounds Bring a cell into the coordinate space... INT ScaleDrawBounds Scale the cell bounds if necessary. INT DrawBackground Draw background color of cell, if necessary. INT DrawNoteButton Draw a note thingy in a cell INT CellDrawBorders Draw cell borders for cell INT FormatConstantCellAsText Format a constant cell for display as text INT DrawCellString Draw cell contents as text string INT UpdateDocUIRedrawAll Update the document size, update the UI and redraw everything INT UpdateUIRedrawAll Update the UI and redraw everything INT UpdateUIRedrawSelection Update the UI and redraw the selection INT RedrawSelection Redraw the selection by invalidating INT RedrawRange Redraw a range by invalidating INT GetWinLeftRight Get the left and right of the window for invalidating MSG_VIS_DRAW Handle expose events to spreadsheet EXT CellRedraw Redraw one cell (invalidate it, silly) INT CellDrawInt Draw one cell as part of range INT DrawNoteButton Draw special cell note marker REVISION HISTORY: Name Date Description ---- ---- ----------- Gene 2/12/91 Initial revision DESCRIPTION: Routines to implement the Spreadsheet class $Id: spreadsheetDraw.asm,v 1.1 97/04/07 11:13:21 newdeal Exp $ %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ DrawCode segment resource COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SpreadsheetDraw %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SYNOPSIS: Handle expose events to redraw the spreadsheet CALLED BY: MSG_VIS_DRAW PASS: *ds:si - instance data ds:di - instance specific data es - seg addr of SpreadsheetClass ax - the method bp - handle of GState cl - DrawFlags RETURN: none DESTROYED: bx, si, di, ds, es (method handler) PSEUDO CODE/STRATEGY: KNOWN BUGS/SIDE EFFECTS/IDEAS: REVISION HISTORY: Name Date Description ---- ---- ----------- eca 2/12/91 Initial version %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ SpreadsheetDraw method dynamic SpreadsheetClass, MSG_VIS_DRAW locals local CellLocals mov di, bp ;di <- handle of GState .enter ; ; Save si (for the call to ObjMessage later), but also ; dereference it. ; push si ; #1 store obj handle mov si, ds:[si] add si, ds:[si].Spreadsheet_offset ; ds:si <- SS instance data EC < test ds:[si].SSI_attributes, mask SA_ENGINE_MODE > EC < ERROR_NZ MESSAGE_NOT_HANDLED_IN_ENGINE_MODE > ; ; Save the gstate's transformation matrix for other layers ; call GrSaveState ; ; Get the range of cells in the mask ; call RestrictToMask jc quitPop ;branch if mask NULL ; ; Recalculate what is visible. This expose may be the result of ; the window getting bigger or more of it being uncovered. ; call RecalcVisibleRangeGState ; ; Translate to the appropriate offset for drawing ; call TranslateToVisible ; ; Initialize things for drawing ; call InitGStateForDrawing push ax ; #2 clr ss:locals.CL_printFlags mov ax, ds:[si].SSI_drawFlags mov ss:locals.CL_drawFlags, ax mov ax, ds:[si].SSI_visible.CR_start.CR_row mov ss:locals.CL_origin.CR_row, ax mov ax, ds:[si].SSI_visible.CR_start.CR_column mov ss:locals.CL_origin.CR_column, ax pop ax ; #2 ; ; Redraw the range ; call RangeDraw ;redraw the visible range ; ; Redraw header & footer marks, if appropriate ; test ds:[si].SSI_drawFlags, mask SDF_DRAW_HEADER_FOOTER_BUTTON jz noFooter cmp ds:[si].SSI_header.CR_start.CR_row, -1 je noHeader stc ;carry <- draw header call DrawHeaderFooterMark noHeader: cmp ds:[si].SSI_footer.CR_start.CR_row, -1 je noFooter clc ;carry <- draw footer call DrawHeaderFooterMark noFooter: ; ; If spreadsheet is a layer, don't have to draw. ; test ds:[si].SSI_attributes, mask SA_SSHEET_IS_LAYER jnz quitPop ; ; If we don't have to target or focus, also don't have to draw. ; test ds:[si].SSI_flags, mask SF_IS_SYS_TARGET or mask SF_IS_SYS_FOCUS jz quitPop ; ; Looks like we do want to do the draw here, so go ahead and ; do it. ; pop si ; #1 *ds:si <- ptr to instance push bp ; #3 mov ax, MSG_SPREADSHEET_INVERT_RANGE_LAST mov bp, di ; bp <- gstate handle call ObjCallInstanceNoLock pop bp ; #3 jmp done quitPop: pop si ; #1 restore stack done: call GrRestoreState .leave ret SpreadsheetDraw endm COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SpreadsheetInvertRangeLast %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SYNOPSIS: Want to force the selected range inversion to happen after all the text and graphic objects have been handled, to aviod bug #19095. This should be done by calling this method *after* MSG_VIS_DRAW has been passed to all the grobj's in the document's tree. CALLED BY: GeoCalcDocumentDraw PASS: *ds:si = SpreadsheetClass object ds:di = SpreadsheetClass instance data bp = gstate handle ax = message # RETURN: nothing DESTROYED: nothing PSEUDO CODE/STRATEGY: - Check whether we have the target or focus. - Save the gstate, and perform necessary window translations. - Set graphics area attributes. - Do the inversion - Restore the gstate. REVISION HISTORY: Name Date Description ---- ---- ----------- hirayama 4/29/94 Initial version %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ SpreadsheetInvertRangeLast method dynamic SpreadsheetClass, MSG_SPREADSHEET_INVERT_RANGE_LAST uses ax, cx, bp .enter ; ; Check whether we have the target or focus. If not, bail. ; test ds:[di].SSI_flags, mask SF_IS_SYS_TARGET or mask SF_IS_SYS_FOCUS jz notSelected ; ; Preserve the pointer to instance data and the gstate handle. ; mov si, di ; ds:si <- inst ptr mov di, bp ; di <- gstate handle ; ; Save the gstate ; call GrSaveState ; ; Perform necessary window translation before drawing. ; call TranslateToVisible ; ; Set the area attrs in case they've changed. ; mov al, SDM_100 call GrSetAreaMask mov ax, C_BLACK or (CF_INDEX shl 8) call GrSetAreaColor ; ; Do the inversion. ; call InvertRangeAndActiveCell mov ax, ds:[si].SSI_active.CR_row mov cx, ds:[si].SSI_active.CR_column call InvertSelectedVisibleCell ; ; Done, so restore the gstate. ; call GrRestoreState notSelected: .leave ret SpreadsheetInvertRangeLast endm COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% RestrictToMask %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SYNOPSIS: Restrict the range of cells to the mask bounds CALLED BY: SpreadsheetDraw() PASS: ds:si - ptr to Spreadsheet instance di - handle of GState RETURN: carry - set if mask NULL (ax,cx), (bx,dx) - range to draw DESTROYED: none PSEUDO CODE/STRATEGY: KNOWN BUGS/SIDE EFFECTS/IDEAS: REVISION HISTORY: Name Date Description ---- ---- ----------- eca 7/21/92 Initial version %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ RestrictToMask proc near .enter inherit SpreadsheetDraw ; ; Get the mask bounds ; push ds, si segmov ds, ss lea si, ss:locals.CL_docBounds ;ds:si <- ptr to call GrGetMaskBoundsDWord pop ds, si jc done ;branch if mask NULL ; ; Figure out the upper left cell of the mask. ; lea bx, ss:locals.CL_docBounds.RD_left call Pos32ToVisCell push ax, cx ; ; Figure out the lower right cell of the mask ; lea bx, ss:locals.CL_docBounds.RD_right call Pos32ToVisCell mov bx, ax mov dx, cx ;(bx,dx) <- end of range pop ax, cx ;(ax,cx) <- start of range clc ;carry <- mask not NULL done: .leave ret RestrictToMask endp COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% CellRedraw and CellRedrawDXCX %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SYNOPSIS: Draw one cell by invalidating CALLED BY: EnterDataFromEditBar() PASS: CellRedraw: ds:si - instance data (SpreadsheetClass) (ax,cx) - cell to draw CellRedrawDXCX: ds:si - instance data (SpreadsheetClass) (dx,cx) - cell to draw RETURN: none DESTROYED: ax, bx, cx, dx, di PSEUDO CODE/STRATEGY: KNOWN BUGS/SIDE EFFECTS/IDEAS: Currently calls RangeDraw() with one cell to redraw REVISION HISTORY: Name Date Description ---- ---- ----------- eca 2/25/91 Initial version jeremy 7/24/92 Added CellRedrawDXCX %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ CellRedrawDXCX proc far class SpreadsheetClass mov ax, dx ; Simple, eh? FALL_THRU CellRedraw CellRedrawDXCX endp CellRedraw proc far class SpreadsheetClass uses ds, si .enter EC < call ECCheckInstancePtr ;> ; ; Has drawing been suppressed? ; test ds:[si].SSI_flags, mask SF_SUPPRESS_REDRAW jnz done ; ; Is cell even visible? ; call CellVisible? ;cell visible? jnc done ;branch if not visible call CreateGState ;di <- handle of GState ; ; We've got a GState that is translated to the visible region, ; which is the area we're interested in, so we work relative to ; it and restrict our visible changes to it. ; call FindCellOverlap ;(ax,bx,cx,dx) <- bounds CheckHack <MAX_CELL_BORDER_WIDTH eq 1> dec ax dec bx inc cx inc dx ;bump bounds for borders call GrInvalRect call DestroyGState ;done with GState done: .leave ret CellRedraw endp COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% CellDrawInt %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SYNOPSIS: Draw one cell as part of range CALLED BY: RangeDraw() via RangeEnum() PASS: ss:bp - ptr to RangeDraw() local variables CL_drawFlags - SpreadsheetDrawFlags CL_origin - origin for drawing CL_gstate - GState for drawing CL_styleToken - current style token CL_data1.low - CellBorderInfo --- cell borders that have been seen --- for the range being drawn (ax,cx) - cell coordinates (r,c) carry - set if cell has data *es:di - ptr to cell data, if any RETURN: carry - clear (ie. don't abort enum) ss:bp - ptr to RangeDraw() local variables CL_data1.low - CellBorderInfo (updated) CL_styleToken - current style token (updated) CL_data3 - column to right of overlap (if any) DESTROYED: none ss:bp - ptr to RangeDraw() local variables CL_buffer -- destroyed PSEUDO CODE/STRATEGY: KNOWN BUGS/SIDE EFFECTS/IDEAS: REVISION HISTORY: Name Date Description ---- ---- ----------- eca 2/12/91 Initial version %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ BadCellType proc near EC < ERROR ILLEGAL_CELL_TYPE > NEC < ret > BadCellType endp CellDrawInt proc far uses dx, di class SpreadsheetClass locals local CellLocals .enter inherit EC < call ECCheckInstancePtr ;> EC < ERROR_NC BAD_CALLBACK_FOR_EMPTY_CELL ;> mov dx, es:[di] ;es:dx <- ptr to cell data mov di, ss:locals.CL_gstate ;di <- GState to draw with ; ; es:dx = Pointer to cell data, dx == 0 if no data ; ax/cx = Row/Column of the cell ; ds:si = Spreadsheet instance ; di = GState ; ; ; Get draw bounds. If the bounds are outside the graphics system then ; we want to adjust the graphics system origin to make it OK. ; call GetDrawBounds ; carry set if out of bounds jz quit ; z flag set if hidden pushf ; Save "bounds OK" flag jnc boundsOK call GrSaveState ; Save current status call MoveCellIntoBounds ; Adjust the origin boundsOK: push locals.CL_bounds.R_right ; save for drawing cell push locals.CL_bounds.R_top ; indicator ; ; Format the cell data as text and adjust the bounds if needed to ; account for text larger than the normal cell bounds. ; call FindCellOverlapNoLock ; ; If the text still won't fit, set a clip rectangle so it ; doesn't munge the cells around it. ; pushf ; save "cell clipped" flag jnc notClipped ; ; Save the current GState as there is no other way to reset ; the clip region after we are done. ; call GrSaveState call SetClipRect notClipped: ; ; If we're printing the header and footer, we may need to fudge ; the bounds to account for them spanning the entire page. ; call ScaleDrawBounds ; ; Draw background color if necessary ; call DrawBackground ; ; Draw the cell string (seems sort of anticlimatic by now) ; if there actually is one. Empty strings come from cells ; that have attributes only (like borders or background color). ; LocalIsNull ss:locals.CL_buffer ;any string? jz skipDraw ;branch if no string call DrawCellString skipDraw: ; ; Record cell borders we've seen ; push ax mov al, ss:locals.CL_cellAttrs.CA_border ornf {byte}ss:locals.CL_data1, al pop ax ; ; Check for wanting to draw any note indicator ; popf pop locals.CL_bounds.R_top pop locals.CL_bounds.R_right pushf test ss:locals.CL_drawFlags, mask SDF_DRAW_NOTE_BUTTON jz noNotes ;branch if we don't want this call DrawNoteButton ;draw any note indicator noNotes: ; ; If we set a clip rectangle, get rid of it ; popf ;restore "cell clipped" flag jnc wasntClipped ; ; Restore the GState, and thereby reset the clip region to ; whatever the application may have set it to. ; call GrRestoreState wasntClipped: ; ; If we adjusted the graphics system origin as part of drawing this ; cell then we need to adjust it back. ; popf ;restore "bounds OK" flag jnc quit call GrRestoreState ;restore graphics state quit: clc ;don't abort .leave ret CellDrawInt endp COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SetClipRect %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SYNOPSIS: Set a clip rectangle for the cell bounds CALLED BY: CellDrawInt() PASS: di - handle of GState ss:bp - inherited locals CL_bounds RETURN: none DESTROYED: none PSEUDO CODE/STRATEGY: KNOWN BUGS/SIDE EFFECTS/IDEAS: REVISION HISTORY: Name Date Description ---- ---- ----------- gene 3/23/93 Initial version %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ SetClipRect proc near uses ax, bx, cx, dx, si locals local CellLocals .enter inherit mov ax, ss:locals.CL_bounds.R_left mov bx, ss:locals.CL_bounds.R_top mov cx, ss:locals.CL_bounds.R_right mov dx, ss:locals.CL_bounds.R_bottom mov si, PCT_INTERSECTION call GrSetClipRect .leave ret SetClipRect endp COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% GetDrawBounds %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SYNOPSIS: Get bounds of cell for drawing CALLED BY: CellDrawInt() PASS: ds:si - ptr to Spreadsheet instance (ax,cx) - (r,c) of cell ss:bp - inherited locals di - handle of GState RETURN: CL_bounds - bounds of cell, 16-bit CL_docBounds - bounds of cell, 32-bit carry set if any part of the CL_docBounds falls outside of the area that the graphics system can handle. if carry clear, z flag set if row or column hidden (bounds *not* set for this case) DESTROYED: none PSEUDO CODE/STRATEGY: KNOWN BUGS/SIDE EFFECTS/IDEAS: ASSUMES: assumes MAX(row height) < 64K ASSUMES: assumes MAX(column width) < 64K REVISION HISTORY: Name Date Description ---- ---- ----------- eca 5/28/91 Initial version %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ GetDrawBounds proc near uses ax, bx, cx, dx locals local CellLocals .enter inherit call GetCellRelBounds32 EC < call ECCheckInstancePtr ;> ; ; Check to see if the bounds look reasonable... ; It's not enough to just check the high word. That must be zero of ; course, but the low word cannot be larger than the constant ; LARGEST_POSITIVE_COORDINATE defined by the graphics system. ; mov ax, LARGEST_POSITIVE_COORDINATE tst ss:locals.CL_docBounds.RD_left.high jnz boundsTooFarOut cmp ss:locals.CL_docBounds.RD_left.low, ax ja boundsTooFarOut tst ss:locals.CL_docBounds.RD_top.high jnz boundsTooFarOut cmp ss:locals.CL_docBounds.RD_top.low, ax ja boundsTooFarOut tst ss:locals.CL_docBounds.RD_right.high jnz boundsTooFarOut cmp ss:locals.CL_docBounds.RD_right.low, ax ja boundsTooFarOut tst ss:locals.CL_docBounds.RD_bottom.high jnz boundsTooFarOut cmp ss:locals.CL_docBounds.RD_bottom.low, ax ja boundsTooFarOut ; ; The bounds look OK... Stuff them... ; ...unless the cell is hidden... ; mov ax, ss:locals.CL_docBounds.RD_left.low cmp ax, ss:locals.CL_docBounds.RD_right.low je cellHidden ;branch if (left==right) mov ss:locals.CL_bounds.R_left, ax mov bx, ss:locals.CL_docBounds.RD_top.low cmp bx, ss:locals.CL_docBounds.RD_bottom.low je cellHidden ;branch if (top==bottom) mov ss:locals.CL_bounds.R_top, bx mov cx, ss:locals.CL_docBounds.RD_right.low mov ss:locals.CL_bounds.R_right, cx mov dx, ss:locals.CL_docBounds.RD_bottom.low mov ss:locals.CL_bounds.R_bottom, dx cellHidden: clc ; Signal: bounds are OK quit: .leave ret boundsTooFarOut: ; ; The bounds of the cell fall outside the area we can draw to. Let the ; caller know about the problem. ; stc ; Signal: bounds are not OK jmp quit GetDrawBounds endp COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% MoveCellIntoBounds %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SYNOPSIS: Bring a cell into the coordinate space... CALLED BY: CellDrawInt PASS: ss:bp = Inheritable CellLocals RETURN: ss:bp.CL_docBounds set ss:bp.CL_bounds set ss:bp.CL_gstate modified for new origin DESTROYED: nothing PSEUDO CODE/STRATEGY: KNOWN BUGS/SIDE EFFECTS/IDEAS: REVISION HISTORY: Name Date Description ---- ---- ----------- jcw 8/22/91 Initial version %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ MoveCellIntoBounds proc near uses ax, bx, cx, dx, di locals local CellLocals .enter inherit mov dx, locals.CL_docBounds.RD_left.high mov cx, locals.CL_docBounds.RD_left.low mov bx, locals.CL_docBounds.RD_top.high mov ax, locals.CL_docBounds.RD_top.low mov di, locals.CL_gstate ; di <- gstate call GrApplyTranslationDWord ; Apply the translation ; ; Zero the top/left... ; clr di mov locals.CL_docBounds.RD_left.high, di mov locals.CL_docBounds.RD_left.low, di mov locals.CL_docBounds.RD_top.high, di mov locals.CL_docBounds.RD_top.low, di mov locals.CL_bounds.R_left, di mov locals.CL_bounds.R_top, di ; ; Adjust the bottom/right. ; sub locals.CL_docBounds.RD_right.low, cx sbb locals.CL_docBounds.RD_right.high, dx EC < ERROR_NZ VISIBLE_POSITION_TOO_LARGE > sub locals.CL_docBounds.RD_bottom.low, ax sbb locals.CL_docBounds.RD_bottom.high, bx EC < ERROR_NZ VISIBLE_POSITION_TOO_LARGE > ; ; Copy the bottom-right into the cell bounds. ; mov ax, locals.CL_docBounds.RD_right.low mov locals.CL_bounds.R_right, ax mov ax, locals.CL_docBounds.RD_bottom.low mov locals.CL_bounds.R_bottom, ax .leave ret MoveCellIntoBounds endp COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% ScaleDrawBounds %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SYNOPSIS: Scale the cell bounds if necessary. CALLED BY: CellDrawInt PASS: ss:bp = Inheritable CellLocals RETURN: nothing DESTROYED: nothing PSEUDO CODE/STRATEGY: KNOWN BUGS/SIDE EFFECTS/IDEAS: REVISION HISTORY: Name Date Description ---- ---- ----------- jcw 8/21/91 Initial version %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ ScaleDrawBounds proc near locals local CellLocals .enter inherit ; ; Check for the situation where we want to scale the left/right edges. ; test locals.CL_printFlags, mask SPF_PRINT_HEADER or \ mask SPF_PRINT_FOOTER jz quit ; Branch if not header/footer ; ; We are doing continuous printing in the header or footer. We need ; to scale the bounds in CL_bounds.R_left/right by the amount ; in CL_columnScale. ; push ax, bx, cx, dx ; Save misc registers ; ; Scale the left edge... ; mov dx, locals.CL_bounds.R_left ; dx.cx <- position clr cx mov bx, locals.CL_columnScale.high mov ax, locals.CL_columnScale.low call GrMulWWFixed ; dx.cx <- result mov locals.CL_bounds.R_left, dx ; Save the scaled result ; ; Scale the right edge... ; mov dx, locals.CL_bounds.R_right clr cx call GrMulWWFixed ; dx.cx <- result mov locals.CL_bounds.R_right, dx ; Save the scaled result pop ax, bx, cx, dx ; Restore misc registers quit: .leave ret ScaleDrawBounds endp COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% DrawBackground %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SYNOPSIS: Draw background color of cell, if necessary. CALLED BY: CellDrawInt() PASS: ss:bp - inherited locals (ax,cx) - (r,c) of cell di - handle of GState RETURN: none DESTROYED: none PSEUDO CODE/STRATEGY: KNOWN BUGS/SIDE EFFECTS/IDEAS: REVISION HISTORY: Name Date Description ---- ---- ----------- eca 6/ 3/91 Initial version %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ DrawBackground proc near uses ax, bx, cx, dx locals local CellLocals cmp {word}ss:locals.CL_cellAttrs.CA_bgAttrs, \ (CF_INDEX shl 8) or C_WHITE je done .enter inherit ; ; Set the background color. This is done separately from ; SetCellGStateAttrs() because the normal case of C_WHITE ; does not have to do this. ; mov al, ss:locals.CL_cellAttrs.CA_bgAttrs.AI_grayScreen call GrSetAreaMask mov ah, ss:locals.CL_cellAttrs.CA_bgAttrs.AI_color.CQ_info mov al, ss:locals.CL_cellAttrs.CA_bgAttrs.AI_color.CQ_redOrIndex mov bx, {word}ss:locals.CL_cellAttrs.CA_bgAttrs.AI_color.CQ_green call GrSetAreaColor mov ax, ss:locals.CL_bounds.R_left mov bx, ss:locals.CL_bounds.R_top mov cx, ss:locals.CL_bounds.R_right mov dx, ss:locals.CL_bounds.R_bottom call GrFillRect .leave done: ret DrawBackground endp COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% DrawNoteButton %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SYNOPSIS: Draw a note thingy in a cell CALLED BY: CellDrawInt PASS: es:dx = Pointer to the cell ax/cx = Row/column di = GState ss:bp = inherited CellLocals RETURN: nothing DESTROYED: nothing PSEUDO CODE/STRATEGY: KNOWN BUGS/SIDE EFFECTS/IDEAS: REVISION HISTORY: Name Date Description ---- ---- ----------- jcw 4/15/91 Initial version %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ DrawNoteButton proc near uses ax, bx, cx, dx locals local CellLocals xchg dx, si ;es:si <- ptr to cell data tst es:[si].CC_notes.segment ;check for notes xchg dx, si ;Restore registers jz quit ;branch if no notes .enter inherit ; ; Set the area color and mask to something reasonable. ; NOTE: we don't reset it when we're done, because the ; only other routine affected by area color when drawing ; is DrawBackground(), and it explicitly sets the area ; color and mask itself. ; mov ax, NOTE_TAB_COLOR ;draw it in red please call GrSetAreaColor mov al, SDM_100 call GrSetAreaMask mov ax, ss:locals.CL_bounds.R_right mov bx, ss:locals.CL_bounds.R_top mov cx, ax sub ax, NOTE_TAB_SIZE ;size of thingy is 5 dec cx ;don't draw on the border mov dx, bx add dx, NOTE_TAB_SIZE inc bx ;don't draw on the border call GrFillRect ;draw the thingy .leave quit: ret DrawNoteButton endp COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% CellDrawBorders %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SYNOPSIS: Draw cell borders for cell CALLED BY: RangeDraw() via RangeEnum() PASS: ss:bp - ptr to RangeDraw() local variables CL_drawFlags - SpreadsheetDrawFlags CL_origin - origin for drawing CL_gstate - GState for drawing CL_styleToken - current style token (ax,cx) - cell coordinates (r,c) carry - set if cell has data *es:di - ptr to cell data, if any RETURN: carry - clear (ie. don't abort enum) ss:bp - ptr to RangeDraw() local variables CL_styleToken - current style token (updated) RETURN: none DESTROYED: none PSEUDO CODE/STRATEGY: NOTE: cell borders are drawn separately, because if they are drawn at the same time as the cells themselves, the background color of an adjacent cell will most likely obliterate the border of a cell. KNOWN BUGS/SIDE EFFECTS/IDEAS: REVISION HISTORY: Name Date Description ---- ---- ----------- eca 7/30/92 Initial version %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ CellDrawBorders proc far uses ax, bx, cx, dx, di locals local CellLocals .enter inherit EC < call ECCheckInstancePtr ;> mov bx, ss:locals.CL_gstate ;bx <- GState to draw with xchg bx, di ;*es:bx <- ptr to cell data ;di <- gstate to use EC < ERROR_NC BAD_CALLBACK_FOR_EMPTY_CELL ;> ; ; Get the border info ; push ax mov bx, es:[bx] ;es:bx <- ptr to cell data mov dx, bx ;es:dx <- ptr to cell data mov ax, es:[bx].CC_attrs ;ax <- cell style attrs mov bx, offset CA_border ;bx <- offset of attrs call StyleGetAttrByToken ;al <- CellBorderInfo ; ; See if there are any borders to draw ; test al, mask CBI_LEFT or \ mask CBI_TOP or \ mask CBI_RIGHT or \ mask CBI_BOTTOM pop ax jz quit ;branch if no borders ; ; Get draw bounds. If the bounds are outside the graphics system then ; we want to adjust the graphics system origin to make it OK. ; call GetDrawBounds ; carry set if out of bounds jz quit ; z flag set if hidden pushf ; Save "boundsOK" flag jnc boundsOK call GrSaveState ; Save current status call MoveCellIntoBounds ; Adjust the origin boundsOK: ; ; Format the cell data as text and adjust the bounds if needed to ; account for text larger than the normal cell bounds. This ; is basically what CellDrawInt() does, so we do the same ; calculation to match it so the border goes around the text. ; call FindCellOverlapNoLock ; ; Set line attributes ; movdw bxax, ss:locals.CL_cellAttrs.CA_borderAttrs.AI_color CheckHack <offset CQ_redOrIndex eq 0> CheckHack <offset CQ_info eq 1> CheckHack <offset CQ_green eq 2> CheckHack <offset CQ_blue eq 3> call GrSetLineColor mov al, ss:locals.CL_cellAttrs.CA_borderAttrs.AI_grayScreen call GrSetLineMask ; ; Scale the bounds if we're in the header or footer ; call ScaleDrawBounds ; ; Load the cell bounds, as we'll need at least 3 of them ; mov ax, ss:locals.CL_bounds.R_left mov bx, ss:locals.CL_bounds.R_top mov cx, ss:locals.CL_bounds.R_right mov dx, ss:locals.CL_bounds.R_bottom ; ; Draw the left side, if any ; test ss:locals.CL_cellAttrs.CA_border, mask CBI_LEFT jz noLeft call GrDrawVLine noLeft: ; ; Draw the top, if any ; test ss:locals.CL_cellAttrs.CA_border, mask CBI_TOP jz noTop call GrDrawHLine noTop: ; ; Draw the right, if any ; test ss:locals.CL_cellAttrs.CA_border, mask CBI_RIGHT jz noRight push ax mov ax, cx ;ax <- right side call GrDrawVLine pop ax noRight: ; ; Draw the bottom, if any ; test ss:locals.CL_cellAttrs.CA_border, mask CBI_BOTTOM jz noBottom mov bx, dx ;bx <- bottom call GrDrawHLine noBottom: ; ; If we adjusted the graphics system origin as part of drawing this ; cell then we need to adjust it back. ; popf ;restore "bounds OK" flag jnc quit call GrRestoreState ;restore graphics state quit: .leave ret CellDrawBorders endp COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% FormatConstantCell %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SYNOPSIS: Format a constant cell for display as text CALLED BY: DrawConstantCell() PASS: es:di - ptr to CellCommon data ds:si - ptr to SpreadsheetInstance RETURN: carry - set if error formatting es:di - ptr to CL_buffer (formatted text) DESTROYED: none PSEUDO CODE/STRATEGY: KNOWN BUGS/SIDE EFFECTS/IDEAS: REVISION HISTORY: Name Date Description ---- ---- ----------- gene 3/10/93 broke out from DrawConstantCell() %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ FormatConstantCellAsText proc near uses ax, bx, cx class SpreadsheetClass locals local CellLocals .enter inherit EC < call ECCheckInstancePtr ;> ; ; Format the number into a buffer. ; mov bx, ds:[si].SSI_cellParams.CFP_file mov cx, ds:[si].SSI_formatArray push ds, si segmov ds, es, ax mov si, di add si, offset CC_current ;ds:si <- ptr to float number segmov es, ss, ax lea di, ss:locals.CL_buffer ;es:di <- ptr to the buffer mov ax, ss:locals.CL_cellAttrs.CA_format call FloatFormatNumber ;convert to ASCII pop ds, si ;ds:si <- spreadsheet instance .leave ret FormatConstantCellAsText endp COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% DrawCellString %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SYNOPSIS: Draw cell contents as text string CALLED BY: DrawFormulaCell(), DrawTextCell(), DrawConstantCell() PASS: ds:si - ptr to Spreadsheet instance (ax,cx) - (r,c) of cell ss:bp - inherited locals RETURN: none DESTROYED: none PSEUDO CODE/STRATEGY: KNOWN BUGS/SIDE EFFECTS/IDEAS: REVISION HISTORY: Name Date Description ---- ---- ----------- eca 5/27/91 Initial version %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ CheckHack <(size JustifyTextParams) eq 8> DrawCellString proc near uses ax, bx, cx, dx, ds, si locals local CellLocals .enter inherit EC < call ECCheckInstancePtr ;> push ax ; ; See if the bounds are in the mask region. If we are printing, ; the GState refers to a GString, and the cell is always ; considered "visible" ; mov ax, ss:locals.CL_bounds.R_left mov bx, ss:locals.CL_bounds.R_top mov cx, ss:locals.CL_bounds.R_right mov dx, ss:locals.CL_bounds.R_bottom call GrTestRectInMask cmp al, TRRT_OUT ;visible? pop ax je done ;branch if not visible call RowGetBaseline ;dx <- baseline offset andnf dx, not (ROW_HEIGHT_AUTOMATIC) mov ax, ss:locals.CL_bounds.R_left add ax, CELL_INSET sub cx, CELL_INSET add bx, dx ;bx <- top + baseline mov di, ss:locals.CL_gstate ;di <- handle of GState ; ; Setup params for GrJustifyText() ; mov ss:locals.CL_justParams.JTP_yPos, bx mov ss:locals.CL_justParams.JTP_rightX, cx mov ss:locals.CL_justParams.JTP_leftX, ax lea bx, ss:locals.CL_justParams ;ss:bx <- ptr to args mov dl, ss:locals.CL_justGeneral ;dl <- Justification segmov ds, ss lea si, ss:locals.CL_buffer ;ds:si <- ptr to string clr cx ;cx <- NULL-terminated text call GrJustifyText done: .leave ret DrawCellString endp COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SpreadsheetCompleteRedraw %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SYNOPSIS: Force the spreadsheet and all related objects to redraw. CALLED BY: via MSG_SPREADSHEET_COMPLETE_REDRAW PASS: *ds:si = Instance ptr ds:di = Instance ptr es = Class segment ax = Method RETURN: nothing DESTROYED: everything PSEUDO CODE/STRATEGY: KNOWN BUGS/SIDE EFFECTS/IDEAS: REVISION HISTORY: Name Date Description ---- ---- ----------- jcw 5/ 6/91 Initial version %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ SpreadsheetCompleteRedraw method dynamic SpreadsheetClass, MSG_SPREADSHEET_COMPLETE_REDRAW bounds local RectDWord .enter mov si, di ; ds:si <- instance ptr EC < test ds:[si].SSI_attributes, mask SA_ENGINE_MODE > EC < ERROR_NZ MESSAGE_NOT_HANDLED_IN_ENGINE_MODE > call CreateGStateFar ; di <- handle of GState ; ; Get the window bounds, and invalidate. We don't call ; GetWinBounds32(), as that uses an untranslated GState. ; That would be fine, except the GState we have is translated, ; and the result would be invalidating the wrong area. ; push ds, si segmov ds, ss lea si, ss:bounds ; ds:si <- ptr to win bounds call GrGetWinBoundsDWord call GrInvalRectDWord pop ds, si call DestroyGStateFar ; Nuke gstate ; ; Tell the rulers to update themselves, too. ; call RedrawRulers .leave ret SpreadsheetCompleteRedraw endm COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% UpdateDocUIRedrawAll %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SYNOPSIS: Update the document size, update the UI and redraw everything CALLED BY: UTILITY PASS: ds:si - ptr to Spreadsheet instance ax - SpreadsheetNotifyFlags RETURN: none DESTROYED: none PSEUDO CODE/STRATEGY: KNOWN BUGS/SIDE EFFECTS/IDEAS: REVISION HISTORY: Name Date Description ---- ---- ----------- eca 7/16/92 Initial version %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ UpdateDocUIRedrawAll proc far class SpreadsheetClass .enter ; ; Recalculate the document size for the view ; call RecalcViewDocSize ; ; Update the UI and redraw everything ; call UpdateUIRedrawAll .leave ret UpdateDocUIRedrawAll endp COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% UpdateUIRedrawAll %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SYNOPSIS: Update the UI and redraw everything CALLED BY: UTILITY PASS: ds:si - ptr to Spreadsheet instance ax - SpreadsheetNotifyFlags RETURN: none DESTROYED: none PSEUDO CODE/STRATEGY: KNOWN BUGS/SIDE EFFECTS/IDEAS: NOTE: if you make changes to the spreadsheet that may change the size of the document space (eg. changing a column width), you should call UpdateDocUIRedrawAll(), which recalculates the document size as well. REVISION HISTORY: Name Date Description ---- ---- ----------- gene 8/ 5/92 Initial version %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ UpdateUIRedrawAll proc far uses ax, cx, dx, bp, si class SpreadsheetClass .enter ; ; Update the UI ; call SS_SendNotification ; ; Redraw everything ; mov si, ds:[si].SSI_chunk mov ax, MSG_SPREADSHEET_COMPLETE_REDRAW call ObjCallInstanceNoLock .leave ret UpdateUIRedrawAll endp COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% UpdateUIRedrawSelection %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SYNOPSIS: Update the UI and redraw the selection CALLED BY: UTILITY PASS: ds:si - ptr to Spreadsheet instance ax - SpreadsheetNotifyFlags RETURN: none DESTROYED: none PSEUDO CODE/STRATEGY: KNOWN BUGS/SIDE EFFECTS/IDEAS: REVISION HISTORY: Name Date Description ---- ---- ----------- eca 7/16/92 Initial version %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ UpdateUIRedrawSelection proc far uses di .enter ; ; Update the UI ; call SS_SendNotification ; ; Redraw / invalidate the selection ; call CreateGState call RedrawSelection call DestroyGState .leave ret UpdateUIRedrawSelection endp COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% RedrawSelection %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SYNOPSIS: Redraw the selection by invalidating CALLED BY: UpdateUIRedrawSelection() PASS: ds:si - ptr to Spreadsheet instance di - handle of GState (translated to visible) RETURN: none DESTROYED: none PSEUDO CODE/STRATEGY: KNOWN BUGS/SIDE EFFECTS/IDEAS: REVISION HISTORY: Name Date Description ---- ---- ----------- eca 7/16/92 Initial version %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ RedrawSelection proc far uses ax, cx, dx, bp class SpreadsheetClass .enter ; ; Invalidate the selected area... ; We've got a GState that is translated to the visible region, ; which is the area we're interested in, so we work relative to it. ; mov ax, ds:[si].SSI_selected.CR_start.CR_row mov cx, ds:[si].SSI_selected.CR_start.CR_column mov bp, ds:[si].SSI_selected.CR_end.CR_row mov dx, ds:[si].SSI_selected.CR_end.CR_column call RedrawRange .leave ret RedrawSelection endp COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% RedrawRange %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SYNOPSIS: Redraw a range by invalidating CALLED BY: UTILITY PASS: ds:si - ptr to Spreadsheet instance di - handle of GState (translated to visible) (ax,cx) (bp,dx) - range (r,c),(r,c) RETURN: none DESTROYED: none PSEUDO CODE/STRATEGY: KNOWN BUGS/SIDE EFFECTS/IDEAS: REVISION HISTORY: Name Date Description ---- ---- ----------- eca 7/20/92 Initial version %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ RedrawRange proc far uses ax, bx, cx, dx class SpreadsheetClass .enter ; ; Restrict our changes to the visible range. ; call RestrictToVisible jnc offScreen ;branch if off-screen ; ; Get the top and bottom bound of the range ; mov dx, ds:[si].SSI_visible.CR_start.CR_row call RowGetRelPos16 ;dx <- row #1 position push dx mov ax, bp ;ax <- row #2 inc ax ;ax <- row #2 + 1 mov dx, ds:[si].SSI_visible.CR_start.CR_row call RowGetRelPos16 ;dx <- row #2 position pop bx ;bx <- row #1 position CheckHack < MAX_CELL_BORDER_WIDTH eq 1> dec bx inc dx ;bump bounds for borders ; ; Bump out as far as we can go left and right, mostly ; because it seems a good thing... ; call GetWinLeftRight ; ; Invalidate me jesus... ; call GrInvalRect offScreen: .leave ret RedrawRange endp COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% GetWinLeftRight %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SYNOPSIS: Get the left and right of the window for invalidating CALLED BY: UTILITY PASS: di - handle of GState RETURN: ax - left of window cx - right of window DESTROYED: none PSEUDO CODE/STRATEGY: KNOWN BUGS/SIDE EFFECTS/IDEAS: REVISION HISTORY: Name Date Description ---- ---- ----------- gene 5/ 3/93 Initial version %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ GetWinLeftRight proc near uses bx, dx .enter call GrGetWinBounds .leave ret GetWinLeftRight endp DrawCode ends
25.81357
79
0.613221
e6aff91a7cc77d3710bfdfefbb0fe897431156f9
1,397
asm
Assembly
_build/dispatcher/jmp_ippsRSA_GetSizePrivateKeyType2_a95aa5fb.asm
zyktrcn/ippcp
b0bbe9bbb750a7cf4af5914dd8e6776a8d544466
[ "Apache-2.0" ]
1
2021-10-04T10:21:54.000Z
2021-10-04T10:21:54.000Z
_build/dispatcher/jmp_ippsRSA_GetSizePrivateKeyType2_a95aa5fb.asm
zyktrcn/ippcp
b0bbe9bbb750a7cf4af5914dd8e6776a8d544466
[ "Apache-2.0" ]
null
null
null
_build/dispatcher/jmp_ippsRSA_GetSizePrivateKeyType2_a95aa5fb.asm
zyktrcn/ippcp
b0bbe9bbb750a7cf4af5914dd8e6776a8d544466
[ "Apache-2.0" ]
null
null
null
extern m7_ippsRSA_GetSizePrivateKeyType2:function extern n8_ippsRSA_GetSizePrivateKeyType2:function extern y8_ippsRSA_GetSizePrivateKeyType2:function extern e9_ippsRSA_GetSizePrivateKeyType2:function extern l9_ippsRSA_GetSizePrivateKeyType2:function extern n0_ippsRSA_GetSizePrivateKeyType2:function extern k0_ippsRSA_GetSizePrivateKeyType2:function extern ippcpJumpIndexForMergedLibs extern ippcpSafeInit:function segment .data align 8 dq .Lin_ippsRSA_GetSizePrivateKeyType2 .Larraddr_ippsRSA_GetSizePrivateKeyType2: dq m7_ippsRSA_GetSizePrivateKeyType2 dq n8_ippsRSA_GetSizePrivateKeyType2 dq y8_ippsRSA_GetSizePrivateKeyType2 dq e9_ippsRSA_GetSizePrivateKeyType2 dq l9_ippsRSA_GetSizePrivateKeyType2 dq n0_ippsRSA_GetSizePrivateKeyType2 dq k0_ippsRSA_GetSizePrivateKeyType2 segment .text global ippsRSA_GetSizePrivateKeyType2:function (ippsRSA_GetSizePrivateKeyType2.LEndippsRSA_GetSizePrivateKeyType2 - ippsRSA_GetSizePrivateKeyType2) .Lin_ippsRSA_GetSizePrivateKeyType2: db 0xf3, 0x0f, 0x1e, 0xfa call ippcpSafeInit wrt ..plt align 16 ippsRSA_GetSizePrivateKeyType2: db 0xf3, 0x0f, 0x1e, 0xfa mov rax, qword [rel ippcpJumpIndexForMergedLibs wrt ..gotpc] movsxd rax, dword [rax] lea r11, [rel .Larraddr_ippsRSA_GetSizePrivateKeyType2] mov r11, qword [r11+rax*8] jmp r11 .LEndippsRSA_GetSizePrivateKeyType2:
35.820513
147
0.84252
ac6d8adbc4429b63fcdf300146e02fb112be0bfd
171
asm
Assembly
mastersystem/zxb-sms-2012-02-23/zxb-sms/wip/zxb/library-asm/sqrt.asm
gb-archive/really-old-stuff
ffb39a518cad47e23353b3420b88e2f3521fd3d7
[ "Apache-2.0" ]
10
2016-10-27T20:46:02.000Z
2021-11-01T15:49:13.000Z
mastersystem/zxb-sms-2012-02-23/zxb-sms/wip/zxb/library-asm/sqrt.asm
gb-archive/really-old-stuff
ffb39a518cad47e23353b3420b88e2f3521fd3d7
[ "Apache-2.0" ]
null
null
null
mastersystem/zxb-sms-2012-02-23/zxb-sms/wip/zxb/library-asm/sqrt.asm
gb-archive/really-old-stuff
ffb39a518cad47e23353b3420b88e2f3521fd3d7
[ "Apache-2.0" ]
2
2015-03-11T14:28:08.000Z
2017-11-02T10:57:57.000Z
#include once <stackf.asm> SQRT: ; Computes SQRT(x) using ROM FP-CALC call __FPSTACK_PUSH rst 28h ; ROM CALC defb 28h ; SQRT defb 38h ; END CALC jp __FPSTACK_POP
14.25
42
0.71345
8facdf56b52034993761d334af9c6119c3214a41
3,972
asm
Assembly
inc/header.asm
hansbonini/-SMD-Phantasy-Star-3
f20106a0f8cc76b859124333a5482e015e052769
[ "MIT" ]
1
2022-01-17T16:06:15.000Z
2022-01-17T16:06:15.000Z
inc/header.asm
hansbonini/-SMD-Phantasy-Star-3
f20106a0f8cc76b859124333a5482e015e052769
[ "MIT" ]
null
null
null
inc/header.asm
hansbonini/-SMD-Phantasy-Star-3
f20106a0f8cc76b859124333a5482e015e052769
[ "MIT" ]
null
null
null
if (*) <> 0 fatal "Start of ROM is at address $\{*}, but it should be at address 0." endif VectorTable: dc.l system_stack, EntryPoint, ErrorTrap, ErrorTrap dc.l ErrorTrap, ErrorTrap, ErrorTrap, ErrorTrap dc.l ErrorTrap, ErrorTrap, ErrorTrap, ErrorTrap dc.l ErrorTrap, ErrorTrap, ErrorTrap, ErrorTrap dc.l ErrorTrap, ErrorTrap, ErrorTrap, ErrorTrap dc.l ErrorTrap, ErrorTrap, ErrorTrap, ErrorTrap dc.l ErrorTrap, ErrorTrap, ErrorTrap, ErrorTrap dc.l HBlank, ErrorTrap, VBlank, ErrorTrap dc.l ErrorTrap, ErrorTrap, ErrorTrap, ErrorTrap dc.l ErrorTrap, ErrorTrap, ErrorTrap, ErrorTrap dc.l ErrorTrap, ErrorTrap, ErrorTrap, ErrorTrap dc.l ErrorTrap, ErrorTrap, ErrorTrap, ErrorTrap dc.l ErrorTrap, ErrorTrap, ErrorTrap, ErrorTrap dc.l ErrorTrap, ErrorTrap, ErrorTrap, ErrorTrap dc.l ErrorTrap, ErrorTrap, ErrorTrap, ErrorTrap dc.l ErrorTrap, ErrorTrap, ErrorTrap, ErrorTrap Header: dc.b "SEGA MEGA DRIVE " ; Console name dc.b "(C)SEGA 1991.APL" ; Copyright/Date dc.b "TOKINO KEISHOUSHA PHANTASY STAR 3 " ; Domestic name dc.b "PHANTASY STAR 3 GENERATIONS OF DOOM " ; International name dc.b "GM 1303-01 " ; Version Checksum: dc.w $3A33 ; Checksum dc.b "J " ; I/O Support dc.l StartOfRom ; ROM Start ROMEndLoc: dc.l EndOfRom-1 ; ROM End dc.l ram_start&$FFFFFF ; RAM Start dc.l ram_end&$FFFFFF ; RAM End dc.l $5241F820 ; Backup RAM ID dc.l $200001 ; Backup RAM start address dc.l $203FFF ; Backup RAM end address dc.b " " ; Modem support dc.b " " ; Notes dc.b "UE " ; Country EndOfHeader: if (*) <> $200 fatal "End of header is at address $\{*}, but it should be at address $200. The header + the vector table must be exactly 512 bytes long" endif ErrorTrap: nop nop nop nop EntryPoint: nop nop nop nop nop nop nop nop nop nop nop nop tst.l hw_port_1_control-1 loc_226: bne.w loc_2B8 tst.w hw_expansion_control-1 bne.s loc_226 lea SetupValues(pc), a5 movem.l (a5)+, d5-a4 move.b hw_version-z80_bus_request(a1), d0 ; get hardware version andi.b #$F, d0 beq.s SkipSecurity ; branch if we're using the first hardware model move.l #'SEGA', security_addr-z80_bus_request(a1) ; satisfy the TMSS so that VDP access is enabled SkipSecurity: move.w (a4), d0 ; Read the VDP to see if it works (if we don't put the bytes "SEGA" into the TMSS, access to the VDP will cause the 68000 to lock up) moveq #0, d0 movea.l d0, a6 moveq #(VDPInitValuesEnd-VDPInitValues)-1, d1 VDPInitLoop: move.b (a5)+, d5 move.w d5, (a4) add.w d7, d5 dbf d1, VDPInitLoop move.l #$40000080, (a4) move.w d0, (a3) move.w d7, (a1) move.w d7, (a2) - btst d0, (a1) bne.s - ; wait for Z80 moveq #(Z80StartupCode_End-Z80StartupCode)-1, d2 Z80InitLoop: move.b (a5)+, (a0)+ dbf d2, Z80InitLoop move.w d0, (a2) move.w d0, (a1) ; start the Z80 move.w d7, (a2) ; reset the Z80 ClrRAMLoop: move.l d0, -(a6) dbf d6, ClrRAMLoop move.l #$81048F02, (a4) move.l #$C0000000, (a4) moveq #$1F, d3 ClrCRAMLoop: move.l d0, (a3) dbf d3, ClrCRAMLoop move.l #$40000010, (a4) moveq #$13, d4 ClrVSRAMLoop: move.l d0, (a3) dbf d4, ClrVSRAMLoop moveq #(PSGInitValues_End-PSGInitValues)-1, d5 PSGInitLoop: move.b (a5)+, $11(a3) ; reset the PSG dbf d5, PSGInitLoop move.w d0, (a2) movem.l (a6), d0-a6 ; clear all registers move #$2700, sr loc_2B8: lea (ROMEndLoc).w, a0 move.l (a0), d0 addq.l #1, d0 lea (EndOfHeader).w, a0 sub.l a0, d0 asr.l #1, d0 move.w d0, d2 subq.w #1, d2 swap d0 moveq #0, d1 - add.w (a0)+, d1 dbf d2, - dbf d0, - cmp.w (Checksum).w, d1 beq.s ChecksumOK move.l d1, -(sp) jsr (MainGameVDPSetup).l move.l #$C0000000, vdp_control_port moveq #$3F, d7 - move.w #$E, vdp_data_port dbf d7, - move.l (sp)+, d1 ChecksumErrorLoop: bra.s ChecksumErrorLoop ChecksumOK: move.b hw_version, d0 andi.b #$F, d0 beq.s GameInit move.l #'SEGA', security_addr
23.364706
150
0.672709
b393992be7233a31da6ba0dcd1ba832201b0928d
1,742
asm
Assembly
linux/syscallHelloWorld/HelloWorld.asm
ElecBot/x64-FASM-Programs
5695e35b7856cd99f30a5b1d4882b9f00abf2849
[ "MIT" ]
null
null
null
linux/syscallHelloWorld/HelloWorld.asm
ElecBot/x64-FASM-Programs
5695e35b7856cd99f30a5b1d4882b9f00abf2849
[ "MIT" ]
null
null
null
linux/syscallHelloWorld/HelloWorld.asm
ElecBot/x64-FASM-Programs
5695e35b7856cd99f30a5b1d4882b9f00abf2849
[ "MIT" ]
null
null
null
;Linux Executable 64-bit Program with Executable and Linkable "File" Format (ELF) to be assembled with FASM ;Prints / displays the well known "Hello World!" string in a linux terminal using a write system call (syscall) ;Linux system call useage changes based on the system architecture which changes the calling convention and call numbers: ; http://man7.org/linux/man-pages/man2/syscall.2.html format ELF64 executable 3 ;x86-64 architecture version of ELF targeting linux entry start ;Define Label to Use for the Entry Point ;Assembler Variables ;Fundamental x86-64 linux system call numbers extracted from the proper unistd.h/unistd_64.h definition file syscall_write = 1 syscall_exit = 60 ;Standard output file value extracted from linux LibC Manual: https://www.gnu.org/software/libc/manual/html_mono/libc.html STDOUT_FILENO = 1 segment readable executable ;Read-only Executable Code Segment start: ;Entry Point Label ;The following syscalls utilize the generic x86-64 calling convention alongside the syscall convention. ; Generic calling convention: https://en.wikipedia.org/wiki/X86_calling_conventions#System_V_AMD64_ABI ;Print the string to the terminal mov eax, syscall_write mov edi, STDOUT_FILENO mov esi, helloStr mov edx, helloStr_length syscall ;An x86-64 instruction to processes the system call ;Exit the program mov eax, syscall_exit xor edi, edi ;Clear the system call return code to zero syscall segment readable ;Read-only Data Segment helloStr: ;Label to reference the beginning of the string db 'Hello World!',10 ; String where each character is a byte and 10 represents a new line helloStr_length = $ - helloStr ; Capture length from current position ($) to string label ;End of Program
39.590909
122
0.793341
6291fe0b2d80d231a40b10cb5447da5d1fe8bb28
1,449
asm
Assembly
Micro_Processor_Lab/5b-LCDDisplay/LCDDisplay.asm
MohithGowdaHR/PES-Engineering-Lab-Programs
1d2e854158ad7b4e32c3b39b5801eac38c0b41ca
[ "MIT" ]
null
null
null
Micro_Processor_Lab/5b-LCDDisplay/LCDDisplay.asm
MohithGowdaHR/PES-Engineering-Lab-Programs
1d2e854158ad7b4e32c3b39b5801eac38c0b41ca
[ "MIT" ]
null
null
null
Micro_Processor_Lab/5b-LCDDisplay/LCDDisplay.asm
MohithGowdaHR/PES-Engineering-Lab-Programs
1d2e854158ad7b4e32c3b39b5801eac38c0b41ca
[ "MIT" ]
null
null
null
; Assembly Level Program 5b ; Assume any suitable message of 12 characters length and display it in the rolling fashion on a 7-segment display interface for a suitable period of time. Ensure a flashing rate that makes it easy to read both the messages. (Examiner does not specify these delay values nor is it necessary for the student to compute these values). .model SMALL .data PA EQU 0E400h PB EQU 0E401h PC EQU 0E402h CR EQU 0E403h CW dB 80h MSG dB 0FFh, 0FFh, 0FFh, 0FFh, 8Eh, 0F9h, 88h, 86h, 89h, 86h, 0C7h, 8Ch .code ; Initialize Data Segment MOV AX, @DATA MOV DS, AX ; Set Control Word Format MOV DX, CR MOV AL, CW OUT DX, AL Looper: ; Message Contains 12 Bytes MOV CX, 12d ; Point SI to First Position of Message LEA SI, MSG RepeatDisplay: CALL Display CALL Delay INC SI LOOP RepeatDisplay ; Wait for User Keyboard Input Interrupt MOV AH, 01h INT 16h JZ Looper Exit: ; Terminate the Program MOV AH, 4Ch INT 21h Display PROC NEAR ; Each Character Contains 8 Bits MOV BL, 08h MOV AL, [SI] L1: ; Rotate AL without Carry ROL AL, 01h MOV DX, PB OUT DX, AL PUSH AX ; Toggle 0 to Port C MOV DX, PC MOV AL, 00h OUT DX, AL ; Toggle 1 to Port C MOV DX, PC MOV AL, 01h OUT DX, AL POP AX DEC BL JNZ L1 RET Display ENDP Delay PROC NEAR MOV SI, 0FFFFh Loop1: MOV DI, 04FFFh Loop2: DEC DI JNZ Loop2 DEC SI JNZ Loop1 RET Delay ENDP END
15.75
332
0.689441
6e5a6dd37c03eb88bfcd7b0c859aa4a29d965107
186
asm
Assembly
libsrc/_DEVELOPMENT/adt/b_vector/c/sdcc_iy/b_vector_capacity.asm
jpoikela/z88dk
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
[ "ClArtistic" ]
640
2017-01-14T23:33:45.000Z
2022-03-30T11:28:42.000Z
libsrc/_DEVELOPMENT/adt/b_vector/c/sdcc_iy/b_vector_capacity.asm
jpoikela/z88dk
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
[ "ClArtistic" ]
1,600
2017-01-15T16:12:02.000Z
2022-03-31T12:11:12.000Z
libsrc/_DEVELOPMENT/adt/b_vector/c/sdcc_iy/b_vector_capacity.asm
jpoikela/z88dk
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
[ "ClArtistic" ]
215
2017-01-17T10:43:03.000Z
2022-03-23T17:25:02.000Z
; size_t b_vector_capacity(b_vector_t *v) SECTION code_clib SECTION code_adt_b_vector PUBLIC _b_vector_capacity EXTERN _b_array_capacity defc _b_vector_capacity = _b_array_capacity
15.5
43
0.860215
f3565783fb2a6778d8fa2cf0837a07a7450fefb3
1,394
asm
Assembly
programs/oeis/335/A335025.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
22
2018-02-06T19:19:31.000Z
2022-01-17T21:53:31.000Z
programs/oeis/335/A335025.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
41
2021-02-22T19:00:34.000Z
2021-08-28T10:47:47.000Z
programs/oeis/335/A335025.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
5
2021-02-24T21:14:16.000Z
2021-08-09T19:48:05.000Z
; A335025: Largest side lengths of almost-equilateral Heronian triangles. ; 5,15,53,195,725,2703,10085,37635,140453,524175,1956245,7300803,27246965,101687055,379501253,1416317955,5285770565,19726764303,73621286645,274758382275,1025412242453,3826890587535,14282150107685,53301709843203,198924689265125,742397047217295,2770663499604053,10340256951198915,38590364305191605,144021200269567503,537494436773078405,2005956546822746115,7486331750517906053,27939370455248878095,104271150070477606325,389145229826661547203,1452309769236168582485,5420093847118012782735,20228065619235882548453,75492168629825517411075,281740608900066187095845,1051470266970439230972303,3924140458981690736793365,14645091568956323716201155,54656225816843604128011253,203979811698418092795843855,761263020976828767055364165,2841072272208896975425612803,10603026067858759134647087045,39571031999226139563162735375,147681101929045799118003854453,551153375716957056908852682435,2056932400938782428517406875285,7676576228038172657160774818703,28649372511213908200125692399525,106920913816817460143341994779395,399034282756055932373242286718053,1489216217207406269349627152092815,5557830586073569145025266321653205,20742106127086870310751438134520003,77410593922273912097980486216426805,288900269562008778081170506731187215 mov $1,2 mov $2,1 lpb $0 sub $0,1 add $1,$2 add $2,$1 add $1,$2 lpe mul $1,2 add $1,1 mov $0,$1
92.933333
1,214
0.906743
6e45176472a7aa5338196b54cb7bd61276089d64
10,514
asm
Assembly
MASM x64/asmcbrt.asm
PoCc001/Open-Roots
fc111e753b4efb0683fe39d71968f5697595d388
[ "MIT" ]
null
null
null
MASM x64/asmcbrt.asm
PoCc001/Open-Roots
fc111e753b4efb0683fe39d71968f5697595d388
[ "MIT" ]
null
null
null
MASM x64/asmcbrt.asm
PoCc001/Open-Roots
fc111e753b4efb0683fe39d71968f5697595d388
[ "MIT" ]
null
null
null
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; The MIT License (MIT) ;; ;; ;; ;; Copyright © 2021 Johannes Kloimböck ;; ;; ;; ;; Permission is hereby granted, free of charge, to any person obtaining a copy of this software ;; ;; and associated documentation files (the “Software”), to deal in the Software without ;; ;; restriction, including without limitation the rights to use, copy, modify, merge, publish, ;; ;; distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the ;; ;; Software is furnished to do so, subject to the following conditions: ;; ;; ;; ;; The above copyright notice and this permission notice shall be included in all copies or ;; ;; substantial portions of the Software. ;; ;; ;; ;; THE SOFTWARE IS PROVIDED “AS IS”, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING ;; ;; BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ;; ;; NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, ;; ;; DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,;; ;; OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. ;; ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; IMPORTANT NOTE: Assemble on Windows in MS Visual Studio (MASM) on a AVX2- and FMA3-capable x64 Intel or AMD processor! ; These are important values stored in memory that the following procedures will operate with (for scalar and packed instructions) .data SIGN_64 qword 4 dup(8000000000000000h) SIGN_32 dword 8 dup(80000000h) WITHOUT_SIGN_64 qword 4 dup(7fffffffffffffffh) WITHOUT_SIGN_32 dword 8 dup(7fffffffh) ; There might be better "magical" numbers, but these ones already do a good job. EXP_MAGIC_ADDEND_64 qword 4 dup(2a9f5cc62cb0f9e1h) EXP_MAGIC_ADDEND_32 dword 8 dup(2a501a5bh) DIV_3_64 qword 4 dup(2863311531) DIV_3_32 dword 8 dup(43691) ONE_THIRD_64 qword 4 dup(3fd5555555555555h) ONE_THIRD_32 dword 8 dup(3eaaaaabh) TWO_THIRDS_64 qword 4 dup(3fe5555555555555h) TWO_THIRDS_32 dword 8 dup(3f2aaaabh) FOUR_THIRDS_64 qword 4 dup(3ff5555555555555h) FOUR_THIRDS_32 dword 8 dup(3faaaaabh) EXP_MASK_64 qword 4 dup(7ff0000000000000h) EXP_MASK_32 dword 8 dup(7f800000h) ; There might be better "magical" numbers, but these ones already do a good job. EXP_MAGIC_MINUEND_64 qword 4 dup(-19178652474277888) EXP_MAGIC_MINUEND_32 dword 8 dup(4259184641) FP_INFINITY_64 qword 4 dup(7ff0000000000000h) FP_INFINITY_32 dword 8 dup(7f800000h) FP_ONE_64 real8 4 dup(1.0) FP_ONE_32 real4 8 dup(1.0) ONES_64 qword 4 dup(18446744073709551615) ONES_32 dword 8 dup(4294967295) DIV_3_64_SCALAR qword 5555555500000000h DIV_3_32_SCALAR dword 5555b700h .code ; Calculates the reciprocal value of the cube root of one double-precision floating-point number. ; Use this macro to inline the code macro_orcbrt_sd macro start: vmovq rax, xmm0 mov r9, 8000000000000000h mov r10, [EXP_MASK_64] mov ecx, 4 and r9, rax xor rax, r9 mov r8d, 32 ; omit this and the following 2 instructions, if you know that no subnormal numbers occur test rax, r10 cmovz ecx, r8d sub rax, [EXP_MAGIC_MINUEND_64] not rax mul [DIV_3_64_SCALAR] vpand xmm0, xmm0, [WITHOUT_SIGN_64] newton_iterations: vmovq xmm1, rdx vmovsd xmm5, [FOUR_THIRDS_64] vmulsd xmm3, xmm0, [ONE_THIRD_64] it: vmulsd xmm4, xmm3, xmm1 vmulsd xmm2, xmm1, xmm1 vfnmadd213sd xmm4, xmm2, xmm5 vmulsd xmm1, xmm1, xmm4 dec ecx jnz it vmovsd xmm4, [FP_INFINITY_64] vxorpd xmm5, xmm5, xmm5 vcmpsd xmm2, xmm0, xmm4, 4h vcmpsd xmm3, xmm0, xmm5, 4h vandpd xmm1, xmm1, xmm2 vmovq xmm2, r9 vblendvpd xmm1, xmm4, xmm1, xmm3 vpxor xmm0, xmm2, xmm1 ; vzeroupper ; Uncomment this instruction, if your software contains SSE instructions directly after this macro. ; If you're unsure, read through the disassembly and decide based on that or uncomment it anyway. endm ; Calculates the reciprocal value of the cube root of one double-precision floating-point number. orcbrt_sd proc macro_orcbrt_sd ret orcbrt_sd endp ; Calculates the reciprocal value of the cube root of one single-precision floating-point number. ; Use this macro to inline the code macro_orcbrt_ss macro start: vmovd eax, xmm0 mov r9d, 80000000h mov r10d, [EXP_MASK_32] mov ecx, 3 and r9d, eax xor eax, r9d mov r8d, 30 ; omit this and the following 2 instructions, if you know that no subnormal numbers occur test eax, r10d cmovz ecx, r8d sub eax, [EXP_MAGIC_MINUEND_32] not eax mul dword ptr [DIV_3_32_SCALAR] vpand xmm0, xmm0, dword ptr [WITHOUT_SIGN_32] newton_iterations: vmovd xmm1, edx vmovss xmm5, [FOUR_THIRDS_32] vmulss xmm3, xmm0, [ONE_THIRD_32] it: vmulss xmm4, xmm3, xmm1 vmulss xmm2, xmm1, xmm1 vfnmadd213ss xmm4, xmm2, xmm5 vmulss xmm1, xmm1, xmm4 dec ecx jnz it vmovss xmm4, [FP_INFINITY_32] vxorps xmm5, xmm5, xmm5 vcmpss xmm2, xmm0, xmm4, 4h vcmpss xmm3, xmm0, xmm5, 4h vandps xmm1, xmm1, xmm2 vmovd xmm2, r9d vblendvps xmm1, xmm4, xmm1, xmm3 vpxor xmm0, xmm2, xmm1 ; vzeroupper ; Uncomment this instruction, if your software contains SSE instructions directly after this macro. ; If you're unsure, read through the disassembly and decide based on that or uncomment it anyway. endm ; Calculates the reciprocal value of the cube root of one single-precision floating-point number. orcbrt_ss proc macro_orcbrt_ss ret orcbrt_ss endp ; Calculates the reciprocal value of the cube root of four double-precision floating-point numbers. ; Use this macro to inline the code macro_orcbrt_pd macro start: vpand ymm5, ymm0, [SIGN_64] vpxor ymm0, ymm0, ymm5 vpsubq ymm1, ymm0, [EXP_MAGIC_MINUEND_64] vpxor ymm1, ymm1, [ONES_64] vpsrlq ymm1, ymm1, 33 vpmulhuw ymm1, ymm1, ymmword ptr [DIV_3_64] vpsllq ymm1, ymm1, 32 newton_iterations: vmulpd ymm3, ymm0, [ONE_THIRD_64] mov ecx, 5 ; change to about 32, if you have to deal with denormal numbers (is much slower though) it: vmulpd ymm4, ymm3, ymm1 vmulpd ymm2, ymm1, ymm1 vfnmadd213pd ymm4, ymm2, [FOUR_THIRDS_64] vmulpd ymm1, ymm1, ymm4 dec ecx jnz it vxorpd ymm4, ymm4, ymm4 vcmppd ymm3, ymm0, ymm4, 4h vmovapd ymm4, [FP_INFINITY_64] vblendvpd ymm1, ymm4, ymm1, ymm3 vcmppd ymm2, ymm0, ymm4, 4h vandpd ymm1, ymm1, ymm2 vxorpd ymm0, ymm1, ymm5 endm ; Calculates the reciprocal value of the cube root of four double-precision floating-point numbers. orcbrt_pd proc macro_orcbrt_pd ret orcbrt_pd endp ; Calculates the reciprocal value of the cube root of eight single-precision floating-point numbers. ; Use this macro to inline the code macro_orcbrt_ps macro start: vpand ymm5, ymm0, [SIGN_32] vpxor ymm0, ymm0, ymm5 vpsubd ymm1, ymm0, [EXP_MAGIC_MINUEND_32] vpxor ymm1, ymm1, [ONES_32] vpsrld ymm1, ymm1, 17 vpmulhuw ymm1, ymm1, ymmword ptr [DIV_3_32] vpslld ymm1, ymm1, 16 newton_iterations: vmulps ymm3, ymm0, [ONE_THIRD_32] mov ecx, 3 ; change to about 30, if you have to deal with denormal numbers (is much slower though) it: vmulps ymm4, ymm3, ymm1 vmulps ymm2, ymm1, ymm1 vfnmadd213ps ymm4, ymm2, [FOUR_THIRDS_32] vmulps ymm1, ymm1, ymm4 dec ecx jnz it vxorps ymm4, ymm4, ymm4 vcmpps ymm3, ymm0, ymm4, 4h vmovaps ymm4, [FP_INFINITY_32] vblendvps ymm1, ymm4, ymm1, ymm3 vcmpps ymm2, ymm0, ymm4, 4h vandps ymm1, ymm1, ymm2 vxorps ymm0, ymm1, ymm5 endm ; Calculates the reciprocal value of the cube root of eight single-precision floating-point numbers. orcbrt_ps proc macro_orcbrt_ps ret orcbrt_ps endp ; Calculates the cube root of one double-precision floating-point number. ocbrt_sd proc macro_orcbrt_sd vmovsd xmm1, [FP_ONE_64] vdivsd xmm0, xmm1, xmm0 ret ocbrt_sd endp ; Calculates the cube root of one single-precision floating-point number. ocbrt_ss proc macro_orcbrt_ss vmovss xmm1, [FP_ONE_32] vdivss xmm0, xmm1, xmm0 ret ocbrt_ss endp ; Calculates the cube root of four double-precision floating-point numbers. ocbrt_pd proc macro_orcbrt_pd vmovapd ymm1, [FP_ONE_64] vdivpd ymm0, ymm1, ymm0 ret ocbrt_pd endp ; Calculates the cube root of eight single-precision floating-point numbers. ocbrt_ps proc macro_orcbrt_ps vmovaps ymm1, [FP_ONE_32] vdivps ymm0, ymm1, ymm0 ret ocbrt_ps endp ; Adapted from the famous FISR algorithm ; Use this macro to inline the code macro_fast_invcbrt_ss macro vpsubd xmm1, xmm0, [EXP_MAGIC_MINUEND_32] vpxor xmm1, xmm1, [ONES_32] vpsrld xmm1, xmm1, 17 vpmulhuw xmm1, xmm1, xmmword ptr [DIV_3_32] vpslld xmm1, xmm1, 16 vmulss xmm3, xmm0, [ONE_THIRD_32] vmulss xmm4, xmm3, xmm1 vmulss xmm2, xmm1, xmm1 vfnmadd213ss xmm4, xmm2, [FOUR_THIRDS_32] vmulss xmm0, xmm1, xmm4 endm ; Use this macro to inline the code macro_fast_cbrt_ss macro macro_fast_invcbrt_ss vrcpss xmm0, xmm0, xmm0 endm ; Adapted from the famous FISR algorithm fast_invcbrt_ss proc macro_fast_invcbrt_ss ret fast_invcbrt_ss endp fast_cbrt_ss proc macro_fast_cbrt_ss ret fast_cbrt_ss endp ; Adapted from the famous FISR algorithm ; Use this macro to inline the code macro_fast_invcbrt_ps macro vpsubd ymm1, ymm0, [EXP_MAGIC_MINUEND_32] vpxor ymm1, ymm1, [ONES_32] vpsrld ymm1, ymm1, 17 vpmulhuw ymm1, ymm1, ymmword ptr [DIV_3_32] vpslld ymm1, ymm1, 16 vmulps ymm3, ymm0, [ONE_THIRD_32] vmulps ymm4, ymm3, ymm1 vmulps ymm2, ymm1, ymm1 vfnmadd213ps ymm4, ymm2, [FOUR_THIRDS_32] vmulps ymm0, ymm1, ymm4 endm ; Use this macro to inline the code macro_fast_cbrt_ps macro macro_fast_invcbrt_ps vrcpps ymm0, ymm0 endm ; Adapted from the famous FISR algorithm fast_invcbrt_ps proc macro_fast_invcbrt_ps ret fast_invcbrt_ps endp fast_cbrt_ps proc macro_fast_cbrt_ps ret fast_cbrt_ps endp END
29.784703
130
0.699353
2bc801f03d9ad962c7f63e3699f4bbb23ade1365
833
asm
Assembly
oeis/026/A026010.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
11
2021-08-22T19:44:55.000Z
2022-03-20T16:47:57.000Z
oeis/026/A026010.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
9
2021-08-29T13:15:54.000Z
2022-03-09T19:52:31.000Z
oeis/026/A026010.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
3
2021-08-22T20:56:47.000Z
2021-09-29T06:26:12.000Z
; A026010: a(n) = number of (s(0), s(1), ..., s(n)) such that s(i) is a nonnegative integer and |s(i) - s(i-1)| = 1 for i = 1,2,...,n and s(0) = 2. Also a(n) = sum of numbers in row n+1 of array T defined in A026009. ; Submitted by Christian Krause ; 1,2,4,7,14,25,50,91,182,336,672,1254,2508,4719,9438,17875,35750,68068,136136,260338,520676,999362,1998724,3848222,7696444,14858000,29716000,57500460,115000920,222981435,445962870,866262915,1732525830,3370764540,6741529080,13135064250,26270128500,51250632510,102501265020,200205672810,400411345620,782920544640,1565841089280,3064665881940,6129331763880,12007086477750,24014172955500,47081501377326,94163002754652,184753963255176,369507926510352,725510446350004,1451020892700008,2850875587556164 mov $1,$0 div $0,2 mov $2,$1 add $1,1 bin $1,$0 add $0,1 bin $2,$0 add $2,$1 mov $0,$2
59.5
495
0.763505
d095de4cbed9a050cd2dfbcfe2263504e89a384e
1,915
asm
Assembly
P2/P2_L0_conv.asm
flyinglandlord/BUAA-CO-2021
1aa28b09762dfb2376ed2aac4126839f0e6fcf93
[ "MIT" ]
5
2021-12-05T12:58:26.000Z
2022-03-31T02:05:13.000Z
P2/P2_L0_conv.asm
OliverDu8-24/BUAA-CO-2021
9959abd90de9039d751bab64f153547e76066665
[ "MIT" ]
null
null
null
P2/P2_L0_conv.asm
OliverDu8-24/BUAA-CO-2021
9959abd90de9039d751bab64f153547e76066665
[ "MIT" ]
2
2021-12-19T11:49:48.000Z
2021-12-22T10:25:38.000Z
.data mat: .space 1024 core: .space 1024 .macro input(%in) li $v0, 5 syscall move %in, $v0 .end_macro .macro print(%out) li $v0, 1 move $a0, %out syscall .end_macro .macro println() li $v0, 11 li $a0, '\n' syscall .end_macro .macro printspace() li $v0, 11 li $a0, ' ' syscall .end_macro .macro get(%addr, %i, %j, %target) sll $t9, %i, 4 add $t9, $t9, %j sll $t9, $t9, 2 lw %target, %addr($t9) .end_macro .macro set(%addr, %i, %j, %source) sll $t9, %i, 4 add $t9, $t9, %j sll $t9, $t9, 2 sw %source, %addr($t9) .end_macro .text main: input($s0) input($s1) input($s2) input($s3) li $t0, 0 for_mat_in1: beq $t0, $s0, endfor_mat_in1 li $t1, 0 for_mat_in2: beq $t1, $s1, endfor_mat_in2 input($t2) set(mat, $t0, $t1, $t2) addiu $t1, $t1, 1 j for_mat_in2 endfor_mat_in2: addiu $t0, $t0, 1 j for_mat_in1 endfor_mat_in1: li $t0, 0 for_core_in1: beq $t0, $s2, endfor_core_in1 li $t1, 0 for_core_in2: beq $t1, $s3, endfor_core_in2 input($t2) set(core, $t0, $t1, $t2) addiu $t1, $t1, 1 j for_core_in2 endfor_core_in2: addiu $t0, $t0, 1 j for_core_in1 endfor_core_in1: # i - $t0, j - $t1, k - $t2, l - $t3 sub $t4, $s0, $s2 addiu $t4, $t4, 1 sub $t5, $s1, $s3 addiu $t5, $t5, 1 li $t0, 0 for_calc1: beq $t0, $t4, endfor_calc1 li $t1, 0 for_calc2: beq $t1, $t5, endfor_calc2 li $t2, 0 li $t6, 0 for_calc3: beq $t2, $s2, endfor_calc3 li $t3, 0 for_calc4: beq $t3, $s3, endfor_calc4 get(core, $t2, $t3, $t7) add $s4, $t0, $t2 add $s5, $t1, $t3 get(mat, $s4, $s5, $t8) mult $t7, $t8 mflo $t7 add $t6, $t6, $t7 addiu $t3, $t3, 1 j for_calc4 endfor_calc4: addiu $t2, $t2, 1 j for_calc3 endfor_calc3: print($t6) printspace() addiu $t1, $t1, 1 j for_calc2 endfor_calc2: println() addiu $t0, $t0, 1 j for_calc1 endfor_calc1: li $v0, 10 syscall
16.367521
37
0.583812
a8cda96534f0135d3e4252d38e04f06924addf12
4,075
asm
Assembly
notes/extra/ball_kbd_control.asm
feliposz/nand2tetris
c54766ceb70ccbe85689e0b79bb9073b232b092b
[ "MIT" ]
null
null
null
notes/extra/ball_kbd_control.asm
feliposz/nand2tetris
c54766ceb70ccbe85689e0b79bb9073b232b092b
[ "MIT" ]
null
null
null
notes/extra/ball_kbd_control.asm
feliposz/nand2tetris
c54766ceb70ccbe85689e0b79bb9073b232b092b
[ "MIT" ]
null
null
null
// A simple program to move a ball across the screen using the keyboard arrow keys // init variables // how many cycles to wait between draw and erase (slow down) @10000 D=A @wait_timer M=D // ball x offset @ball_x M=0 @old_ball_x M=0 // ball y offset @ball_y M=0 @old_ball_y M=0 // ball x movement @ball_dx M=1 // actually its a 16 bit pixel column // ball y movement @512 D=A @ball_dy M=D @erase_value M=0 // Load ball sprite into RAM[1000-1015] @0 D=A @1000 M=D @992 D=A @1001 M=D @4088 D=A @1002 M=D @8188 D=A @1003 M=D @16382 D=A @1004 M=D @16382 D=A @1005 M=D @32767 D=A @1006 M=D @32767 D=A @1007 M=D @32767 D=A @1008 M=D @32767 D=A @1009 M=D @32767 D=A @1010 M=D @16382 D=A @1011 M=D @16382 D=A @1012 M=D @8188 D=A @1013 M=D @4088 D=A @1014 M=D @992 D=A @1015 M=D (MOVE_LOOP) // Begin erase ball @old_ball_x D=M @old_ball_y D=D+M @SCREEN D=D+A @pdst M=D @16 D=A @nrows M=D (ERASE_LOOP) @nrows D=M @END_ERASE_LOOP D;JEQ @erase_value D=M @pdst A=M M=D // update counter and pointers @32 D=A @pdst M=D+M @nrows M=M-1 // end loop @ERASE_LOOP 0;JMP (END_ERASE_LOOP) // End erase ball // Draw ball - begin @ball_x D=M @ball_y D=D+M @SCREEN D=D+A @pdst M=D @1000 D=A @psrc M=D @16 D=A @nrows M=D // loop until nrows == 0 (DRAW_LOOP) @nrows D=M @END_DRAW_LOOP D;JEQ // D = *psrc; *pdst = D @psrc A=M D=M @pdst A=M M=D // update counter and pointers @32 D=A @pdst M=D+M @psrc M=M+1 @nrows M=M-1 // end loop @DRAW_LOOP 0;JMP (END_DRAW_LOOP) // draw ball - end // save old position @ball_x D=M @old_ball_x M=D @ball_y D=M @old_ball_y M=D // handle keyboard input (WAIT_KEY_RELEASE) @KBD D=M @WAIT_KEY_RELEASE D;JNE (WAIT_KEY_PRESS) @KBD D=M @WAIT_KEY_PRESS D;JEQ @key_pressed M=D // check key pressed @32 // SPACE D=A @key_pressed D=D-M @TOGGLE_ERASE D;JEQ @130 D=A @key_pressed D=D-M @MOVE_LEFT D;JEQ @131 D=A @key_pressed D=D-M @MOVE_UP D;JEQ @132 D=A @key_pressed D=D-M @MOVE_RIGHT D;JEQ @133 D=A @key_pressed D=D-M @MOVE_DOWN D;JEQ @140 // ESCAPE D=A @key_pressed D=D-M @BREAK D;JEQ @NO_MOVE 0;JMP // move ball according to key pressed (MOVE_RIGHT) @ball_dx D=M @ball_x M=D+M @NO_MOVE 0;JMP (MOVE_LEFT) @ball_dx D=M @ball_x M=M-D @NO_MOVE 0;JMP (MOVE_DOWN) @ball_dy D=M @ball_y M=D+M @NO_MOVE 0;JMP (MOVE_UP) @ball_dy D=M @ball_y M=M-D @NO_MOVE 0;JMP (TOGGLE_ERASE) @erase_value M=!M (NO_MOVE) // check horizontal warp @ball_x D=M @WARP_LEFT D;JLT // warp if x < 0 @32 D=A @ball_x D=M-D @WARP_RIGHT D;JGE // warp if x >= 32 @CHECK_VERTICAL 0;JMP (WARP_LEFT) @31 D=A @ball_x M=D @CHECK_VERTICAL 0;JMP (WARP_RIGHT) @0 D=A @ball_x M=D (CHECK_VERTICAL) // check vertical warp @ball_y D=M @WARP_UP D;JLT // warp if y < 0 @7680 // 240 lines * 32 columns D=A @ball_y D=M-D @WARP_DOWN D;JGE // warp if y >= 7680 @NO_WARP 0;JMP (WARP_UP) @7648 D=A @ball_y M=D @NO_WARP 0;JMP (WARP_DOWN) @0 D=A @ball_y M=D (NO_WARP) @MOVE_LOOP 0;JMP (BREAK) @BREAK 0;JMP
10.584416
82
0.479018
9b1405dfd37284e4c09961d5aace8dc83a625afb
563
asm
Assembly
oeis/017/A017284.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
11
2021-08-22T19:44:55.000Z
2022-03-20T16:47:57.000Z
oeis/017/A017284.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
9
2021-08-29T13:15:54.000Z
2022-03-09T19:52:31.000Z
oeis/017/A017284.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
3
2021-08-22T20:56:47.000Z
2021-09-29T06:26:12.000Z
; A017284: a(n) = (10*n + 1)^4. ; 1,14641,194481,923521,2825761,6765201,13845841,25411681,43046721,68574961,104060401,151807041,214358881,294499921,395254161,519885601,671898241,855036081,1073283121,1330863361,1632240801,1982119441,2385443281,2847396321,3373402561,3969126001,4640470641,5393580481,6234839521,7170871761,8208541201,9354951841,10617447681,12003612721,13521270961,15178486401,16983563041,18945044881,21071715921,23372600161,25856961601,28534304241,31414372081,34507149121,37822859361,41371966801,45165175441,49213429281 mul $0,10 add $0,1 pow $0,4
80.428571
501
0.856128
1b3cf4b4e7609467bc382ceb5a503fa577820cf1
425
asm
Assembly
oeis/203/A203156.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
11
2021-08-22T19:44:55.000Z
2022-03-20T16:47:57.000Z
oeis/203/A203156.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
9
2021-08-29T13:15:54.000Z
2022-03-09T19:52:31.000Z
oeis/203/A203156.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
3
2021-08-22T20:56:47.000Z
2021-09-29T06:26:12.000Z
; A203156: (n-1)-st elementary symmetric function of {4,9,16,25,..., (n+1)^2}. ; Submitted by Jon Maiga ; 1,13,244,6676,254736,13000464,857431296,71077637376,7239445632000,889141110912000,129629670893568000,22136856913815552000,4377599743151480832000,992559996665635184640000,255805371399126806691840000 add $0,1 mov $2,1 lpb $0 mov $1,$0 sub $0,1 add $1,1 pow $1,2 mul $3,$1 add $3,$2 mul $2,$1 lpe mov $0,$3
25
199
0.724706
4b43caebbe6283b748d96080a8592e53b1a46388
13,651
asm
Assembly
mp3/mp3.asm
Candy-Crusher/ece220
18001a82a46711b0451d37b3dd2c747f85abad69
[ "MIT" ]
null
null
null
mp3/mp3.asm
Candy-Crusher/ece220
18001a82a46711b0451d37b3dd2c747f85abad69
[ "MIT" ]
1
2021-04-26T10:50:25.000Z
2021-04-26T10:50:25.000Z
mp3/mp3.asm
Candy-Crusher/ece220
18001a82a46711b0451d37b3dd2c747f85abad69
[ "MIT" ]
null
null
null
.ORIG x3000 ;This program translates a student’s daily ;schedule from a list to a two-dimensional ;matrix of pointers (memory addresses, in this ;case to names of events), then prints the ;schedule. ;First we initialize the content of new schedule to 0. ;Then we translate the old schedule to new schedule. ;Finally we print the new schedule. LD R6,EVENT_LIST AND R5,R5,#0 AND R1,R1,#0 AND R0,R0,#0 LD R2,START ;1.Initialize ;Register ;R5:temporery counter of 75 ;R2:temporery pointer of shedule to 0 initialize shedule ;R1:0 ADD R5,R5,#15 ADD R5,R5,R5 ADD R5,R5,R5 ADD R5,R5,#15 INITIALIZE STR R1,R2,#0 ADD R2,R2,#1 ADD R5,R5,#-1 BRp INITIALIZE ;2.Translating ;Register ;R6:event list pointer ;R5:present day filed content of event list ;R4:1/2/4/8/16 ;R3:counter of 5 ;R2:first address of string ;R1:shedule address calculator ;R0:temporery copy of time_n/temporery check if in the day ;/temporery as x3000/temporery check if conflict EACH_WORDS AND R4,R4,#0 ADD R4,R4,#1 AND R3,R3,#0 ADD R3,R3,#4 LDR R5,R6,#0 ADD R5,R5,#1 BRz CALL ADD R5,R5,#-1 ADD R6,R6,#1 ;R6 points at the first char ADD R2,R6,#0 ;R2 as the first address of words LDR R1,R6,#0 BRz DAY_FIELD ;check if the strings end ADD R6,R6,#1 BRnp #-4 DAY_FIELD ADD R6,R6,#1 ;R6 as the address of day field LDR R1,R6,#0 BRn WARNING1 ADD R1,R1,#-14 BRp WARNING1 ;check if in range 0-14 ADD R1,R1,#14 ADD R0,R1,#0 ;copy R1 to R0 ADD R1,R1,R1 ADD R1,R1,R1 ADD R1,R1,R0 ;R1=R1*5,R0 is free now ADD R1,R1,#4 ;R1=R1+day_n LD R0,START ADD R1,R1,R0 DAY_CHECK AND R0,R5,R4 ;R0 temporery check day BRz #3 ;if in the day,check time LDR R0,R1,#0 BRnp WARNING2 STR R2,R1,#0 ;store address of strings to shedule ADD R4,R4,R4 ;if in the day,check next day ADD R1,R1,#-1 ADD R3,R3,#-1 BRzp DAY_CHECK ADD R6,R6,#1 BRnzp EACH_WORDS CALL JSR MP3 BRz #1 JSR PRINT_SCHEDULE END_MAIN HALT WARNING1 ADD R0,R2,#0 PUTS LEA R0,INVALID_SLOT PUTS BRnzp END_MAIN WARNING2 ADD R0,R2,#0 PUTS LEA R0,CONFLICTS PUTS BRnzp END_MAIN EVENT_LIST .FILL x4000 INVALID_SLOT .STRINGZ " has an invalid slot number.\n" CONFLICTS .STRINGZ " conflicts with an earlier event.\n" PRINT_SCHEDULE ST R0,STORE_0 ST R1,STORE_1 ST R2,STORE_2 ST R3,STORE_3 ST R4,STORE_4 ST R5,STORE_5 ST R6,STORE_6 ST R7,STORE_7 ;3.Printing ;First line ;Register ;R3:counter of 5 ;R2:date ;R1:Address of date ;R0:| LEA R1,NONE JSR PRINT_CENTERED LD R0,VER LEA R1,MON AND R3,R3,#0 ADD R3,R3,#4 FIRST_LINE OUT JSR PRINT_CENTERED ADD R1,R1,#1 LDR R2,R1,#0 BRnp #-3 ADD R1,R1,#1 ADD R3,R3,#-1 BRzp FIRST_LINE LD R0,LINE_FEED OUT ;Latter lines ;Register ;R6:counter of 14 ;R5:counter of 5 ;R4:shedule address counter ;R3:copy of temporery R1 ;R2:x3000 ;R1:things to print ;R0:|/line feed LD R4,START AND R3,R3,#0 AND R1,R1,#0 AND R6,R6,#0 ADD R6,R6,#15 EACH_LINE BRz DONE1 AND R5,R5,#0 ADD R5,R5,#4 LD R0,VER JSR PRINT_SLOT ADD R3,R1,#0 ;copy R1 to R3,as date_n EACH_DAY OUT LDR R1,R4,#0 ;R1 as address of first char to print BRnp #1 LEA R1,NONE JSR PRINT_CENTERED ADD R4,R4,#1 ADD R5,R5,#-1 BRzp EACH_DAY LD R0,LINE_FEED OUT ADD R1,R3,#0 ADD R1,R1,#1 ADD R6,R6,#-1 BRnzp EACH_LINE DONE1 ;load back LD R0,STORE_0 LD R1,STORE_1 LD R2,STORE_2 LD R3,STORE_3 LD R4,STORE_4 LD R5,STORE_5 LD R6,STORE_6 LD R7,STORE_7 RET STORE_0 .BLKW #1 STORE_1 .BLKW #1 STORE_2 .BLKW #1 STORE_3 .BLKW #1 STORE_4 .BLKW #1 STORE_5 .BLKW #1 STORE_6 .BLKW #1 STORE_7 .BLKW #1 NONE .FILL x00 MON .STRINGZ "MONDAY" TUE .STRINGZ "TUESDAY" WED .STRINGZ "WEDNESDAY" THU .STRINGZ "THURSDAY" FRI .STRINGZ "FRIDAY" VER .FILL x7C LINE_FEED .FILL x0A START .FILL x3800 MP3 ;DESCRIPTION ;This subroutine attempts to find a compatible combination of times at which events can be ;inserted into an existing weekly schedule. Given a list of extra events, each of which can ;occur at one or more hours, this program uses a stack to perform a depth-first search ;(DFS) of possible time combinations until a compatible combination is discovered (or until ;all possible combinations are eliminated as incompatible). ;REGISTERS ;R0:(STORE)now_slot_n/(CONFLICT)now_p_slot ;R1:(STORE)possible days ;R2:(STACK PUSH)now_slot checker/(DAY_CHECK)day chekcer/ ;(STORE)day chekcer/;(CONFLICT)now_slot checker ;R3:(STACK PUSH)now_slot_n counter/(DAY_CHECK)day counter/(STORE)day counter ;R4:(DAY_CHECK)sched pointer/(POP)0 ;R5:always extra list pointer ;R6:always stack pointer ST R1,S_MP3_1 ST R2,S_MP3_2 ST R3,S_MP3_3 ST R4,S_MP3_4 ST R5,S_MP3_5 ST R6,S_MP3_6 ST R7,S_MP3_7 ;initialize LD R6,STACK ADD R6,R6,#-1 ;R6 as top of stack LD R5,EXTRA_LIST ;R5 as start of extra list MP3_STACK_PUSH ;stack structure ;now_slot ;now_slot_number(now_slot_n) LDR R0,R5,#0 ;(R0 temporary) BRn MP3_DONE_S ;check if extra list ends,if end ->success LDR R0,R5,#2 ;R0 as now_possible_slot(now_p_slot) AND R2,R2,#0 ADD R2,R2,#1 ;R2 as now_slot checker AND R3,R3,#0 ;R3 as now_slot_n counter AND R1,R2,R0 ;(R1 temporary check T/F) BRp #5 ;Check if the now_slot found,if found,push ADD R3,R3,#1 ;if no found,loop increase ADD R2,R2,R2 ADD R1,R3,#-15 ;(R1 temporary check if finish all 15 slots) BRzp MP3_DONE_F ;no possible slot in all 15 slots ->fail BRn #-7 ;go check if this slot fits STR R2,R6,#-1 ;store now_slot in stack STR R3,R6,#0 ;store now_slot_n in stack MP3_CHECK_DAY AND R2,R2,#0 ADD R2,R2,#1 ;R2 as now_day checker AND R3,R3,#0 ADD R3,R3,#4 ;R3 as now_day counter LD R4,MP3_START ;R4 as sched pointer LDR R1,R6,#0 ;(R1 temporary as now_slot_n) ADD R4,R4,R1 ADD R1,R1,R1 ADD R1,R1,R1 ADD R4,R4,R1 ADD R4,R4,#4 ;R4 as addr of friday in that slot LDR R1,R5,#0 ;R1 as possible days(p_day) BRnzp #4 MP3_CHECK_DAY_LOOP ADD R2,R2,R2 ADD R4,R4,#-1 ADD R3,R3,#-1 BRn MP3_STORE_EXTRA_SCHED AND R0,R2,R1 ;(R0 temporary check if day fits) BRz MP3_CHECK_DAY_LOOP ;if not fit,check next day MP3_CF_DAY_CHECK ;if fits,check if this day conflicts with sched LDR R0,R4,#0 ;(R0 temporary check if sched empty) BRz MP3_CHECK_DAY_LOOP ;if not conflicts,check next day ;if conflicts,check another time MP3_NEW_CHECK LDR R0,R5,#2 ;R0 as now_p_slot LDR R2,R6,#-1 ;R2 as now_slot checker LDR R3,R6,#0 ADD R3,R3,#1 ;try to find another possible slot ADD R2,R2,R2 BRn MP3_POP ;if no other possible slot,pop AND R1,R0,R2 ;(R1 temporary check if this slot p) BRz #-5 ;if this one not psb,check next one STR R2,R6,#-1 ;store new no2_slot in stack STR R3,R6,#0 ;store new now_slot_n in stack BRnzp MP3_CHECK_DAY ;check each day for this slot MP3_STORE_EXTRA_SCHED ;If not conficts,store in schedule AND R2,R2,#0 ;R2 as day checker ADD R2,R2,#1 AND R3,R3,#0 ;R3 as day counter ADD R3,R3,#4 STORE_E_DAY_LOOP LDR R1,R5,#0 ;R1 as p_day AND R0,R2,R1 ;(R0 temporary check if day fits) BRz #9 ;if not fit,don't store LDR R0,R6,#0 ;R0 as now_slot_n LD R4,MP3_START ;R4 as sched pointer ADD R4,R0,R4 ADD R0,R0,R0 ADD R0,R0,R0 ADD R4,R0,R4 ADD R4,R4,R3 LDR R1,R5,#1 ;(R1 temporary as string addr) STR R1,R4,#0 ;store in sched ADD R2,R2,R2 ADD R3,R3,#-1 BRzp STORE_E_DAY_LOOP ;check if store all day,if not,loop ADD R5,R5,#3 ;if so,increase R5,R6 and go store next group ADD R6,R6,#-2 BRnzp MP3_STACK_PUSH MP3_POP AND R4,R4,#0 STR R4,R6,#0 STR R4,R6,#-1 ;pop this group stack ADD R5,R5,#-3 ;go to previous group ADD R6,R6,#2 LD R1,STACK ADD R1,R1,#-1 NOT R1,R1 ADD R1,R1,#1 ADD R1,R1,R6 BRp MP3_DONE_F ;reach the top of stack,so fail ;if not reach top of stack,delete MP3_DELETE_EXTRA_SCHED ;If not conficts,store in schedule AND R2,R2,#0 ;R2 as day checker ADD R2,R2,#1 AND R3,R3,#0 ;R3 as day counter ADD R3,R3,#4 DELETE_E_DAY_LOOP LDR R1,R5,#0 ;R1 as p_day AND R0,R2,R1 ;(R0 temporary check if day fits) BRz #9 ;if not fit,don't delete LDR R0,R6,#0 ;R0 as now_slot_n LD R4,MP3_START ;R4 as sched pointer ADD R4,R0,R4 ADD R0,R0,R0 ADD R0,R0,R0 ADD R4,R0,R4 ADD R4,R4,R3 AND R1,R1,#0 ;(R1 temporary as 0) STR R1,R4,#0 ;store in sched ADD R2,R2,R2 ADD R3,R3,#-1 BRzp DELETE_E_DAY_LOOP ;check if delete all day,if not,loop BRnzp MP3_NEW_CHECK MP3_DONE_F LEA R0,MP3_FAIL PUTS AND R0,R0,#0 BRnzp MP3_DONE MP3_DONE_S AND R0,R0,#0 ADD R0,R0,#1 MP3_DONE ;load back LD R1,S_MP3_1 LD R2,S_MP3_2 LD R3,S_MP3_3 LD R4,S_MP3_4 LD R5,S_MP3_5 LD R6,S_MP3_6 LD R7,S_MP3_7 ADD R0,R0,#0 RET S_MP3_1 .BLKW #1 S_MP3_2 .BLKW #1 S_MP3_3 .BLKW #1 S_MP3_4 .BLKW #1 S_MP3_5 .BLKW #1 S_MP3_6 .BLKW #1 S_MP3_7 .BLKW #1 MP3_START .FILL x3800 EXTRA_LIST .FILL x4800 STACK .FILL x8000 MP3_FAIL .STRINGZ "Could not fit all events into schedule.\n" ;PRINT_SLOT: ;A number from 0 to 14 is passed to this subroutine in R1. ;The subroutine prints the time corresponding to the specified slot.(R1+6) ;If R1=0, for example, your subroutine must print “0600” ;preceded by three spaces (ASCII x20) and followed by two trailing spaces. PRINT_SLOT ;store R0-R7 ST R0,STORE_REGISTER0 ST R1,STORE_REGISTER1 ST R2,STORE_REGISTER2 ST R3,STORE_REGISTER3 ST R4,STORE_REGISTER4 ST R5,STORE_REGISTER5 ST R6,STORE_REGISTER6 ST R7,STORE_REGISTER7 ;print preceded spaces LD R0,SPACE OUT OUT OUT ;print numbers ;test if R1<=3 ADD R2,R1,#-3 BRp FIRSTN_NOT_ZERO ;if R1<=3, first digit should be 0,print LD R0,ZERO OUT ;if R1<=3,second digit should be R1+6;print LD R2,START_TIME ADD R0,R1,R2 OUT BRnzp LATTER ;go to print followed zeros and spaces FIRSTN_NOT_ZERO ;test if R1=14 ADD R2,R1,#-14 BRn FIRSTN_1 ;if R1=14,the first digit should be 2,print LD R0,ZERO ADD R0,R0,#2 OUT ;if R1=14,the second digit should be 0,print LD R0,ZERO OUT BRnzp LATTER ;go to print followed zeros and spaces FIRSTN_1 ;if 3<=R1<14,the first digit should be 1 LD R0,ZERO ADD R0,R0,#1 OUT ;if 3<=R1<14,the second digit should be R1-4 LD R0,ZERO ADD R2,R1,#-4 ADD R0,R0,R2 OUT ;print followed zeros and spaces LATTER LD R0,ZERO OUT OUT LD R0,SPACE OUT OUT ;load back LD R0,STORE_REGISTER0 LD R1,STORE_REGISTER1 LD R2,STORE_REGISTER2 LD R3,STORE_REGISTER3 LD R4,STORE_REGISTER4 LD R5,STORE_REGISTER5 LD R6,STORE_REGISTER6 LD R7,STORE_REGISTER7 RET ;The second subroutine is PRINT_CENTERED. ;A string (the address of the first ASCII character ;in sequence terminated by an ASCII NUL, x00) is passed to your subroutine in R1. ;Your subroutine must print exactly nine characters. ;If the string is longer than nine characters, ;your subroutine must print the first nine characters. ;If the string is shorter than nine characters, ;your subroutine must print additional spaces ;around the string to bring the total length to nine characters. ;If the number of spaces needed is odd, ;the subroutine must use one more leading space than trailing space. PRINT_CENTERED ;store R0-R7 ST R0,STORE_REGISTER0 ST R1,STORE_REGISTER1 ST R2,STORE_REGISTER2 ST R3,STORE_REGISTER3 ST R4,STORE_REGISTER4 ST R5,STORE_REGISTER5 ST R6,STORE_REGISTER6 ST R7,STORE_REGISTER7 ;initialize AND R2,R2,#0 ADD R4,R1,#0;copy R1 to R4 ;count the length of the string COUNT_LENGTH LDR R3,R1,#0;load first character to R3 BRz COMPARE ; check if the string ends ADD R2,R2,#1;the length of the string is stored in R2 ADD R1,R1,#1 BRnzp COUNT_LENGTH ;go to check next character ;compare the length of the string with 9 COMPARE ADD R1,R4,#0;copy the address of the first character to R1 ADD R4,R2,#-9;R4 <- R2-9 BRzp NOT_SMALLER_THAN_9 SMALLER_TAHN_9 NOT R4,R4;R4 <- 9-R2-1 ADD R4,R4,#1;R4 <- 9-R2 AND R5,R5,#0 AND R3,R3,#0 ADD R3,R4,#0;R3 is 9-R2 CULCULATE_SPACE ADD R5,R5,#1;R5 as former spaces counter ADD R4,R4,#-2;R4/2 BRp CULCULATE_SPACE AND R6,R6,#0 ADD R6,R5,R6 ;print former spaces FORMER_SPACE BRz PRINT_STRING LD R0,SPACE OUT ADD R5,R5,#-1 BRnzp FORMER_SPACE ;print string PRINT_STRING ADD R2,R2,#0 BRz LATTER_SPACE1 LDR R0,R1,#0 OUT ADD R1,R1,#1 ADD R2,R2,#-1 BRnzp PRINT_STRING ;print latter spaces LATTER_SPACE1 NOT R6,R6;R6 was the number of former spaces ADD R6,R6,#1 ADD R5,R3,R6;R5 is 9-string length-former spaces length=latter spaces length LATTER_SPACE2 BRz DONE LD R0,SPACE OUT ADD R5,R5,#-1 BRnzp LATTER_SPACE2 NOT_SMALLER_THAN_9 AND R4,R4,#0 ADD R4,R4,#9;R4 as a counter of 9 ;print first 9 characters FIRST_9 BRz DONE LDR R0,R1,#0 ADD R1,R1,#1 OUT ADD R4,R4,#-1 BRnzp FIRST_9 DONE ;load back LD R0,STORE_REGISTER0 LD R1,STORE_REGISTER1 LD R2,STORE_REGISTER2 LD R3,STORE_REGISTER3 LD R4,STORE_REGISTER4 LD R5,STORE_REGISTER5 LD R6,STORE_REGISTER6 LD R7,STORE_REGISTER7 RET SPACE .FILL X20 START_TIME .FILL X36 ZERO .FILL X30 STORE_REGISTER0 .BLKW #1 STORE_REGISTER1 .BLKW #1 STORE_REGISTER2 .BLKW #1 STORE_REGISTER3 .BLKW #1 STORE_REGISTER4 .BLKW #1 STORE_REGISTER5 .BLKW #1 STORE_REGISTER6 .BLKW #1 STORE_REGISTER7 .BLKW #1 .END
22.904362
91
0.686616
372ea6cfd943b286178504350d4243b3458c47a8
687
asm
Assembly
data/mapObjects/Route3.asm
AmateurPanda92/pokemon-rby-dx
f7ba1cc50b22d93ed176571e074a52d73360da93
[ "MIT" ]
9
2020-07-12T19:44:21.000Z
2022-03-03T23:32:40.000Z
data/mapObjects/Route3.asm
JStar-debug2020/pokemon-rby-dx
c2fdd8145d96683addbd8d9075f946a68d1527a1
[ "MIT" ]
7
2020-07-16T10:48:52.000Z
2021-01-28T18:32:02.000Z
data/mapObjects/Route3.asm
JStar-debug2020/pokemon-rby-dx
c2fdd8145d96683addbd8d9075f946a68d1527a1
[ "MIT" ]
2
2021-03-28T18:33:43.000Z
2021-05-06T13:12:09.000Z
Route3_Object: db $2c ; border block db 0 ; warps db 1 ; signs sign 59, 9, 10 ; Route3Text10 db 9 ; objects object SPRITE_BLACK_HAIR_BOY_2, 57, 11, STAY, NONE, 1 ; person object SPRITE_BUG_CATCHER, 10, 6, STAY, RIGHT, 2, OPP_BUG_CATCHER, 4 object SPRITE_BUG_CATCHER, 14, 4, STAY, DOWN, 3, OPP_YOUNGSTER, 1 object SPRITE_LASS, 16, 9, STAY, LEFT, 4, OPP_LASS, 1 object SPRITE_BUG_CATCHER, 19, 5, STAY, DOWN, 5, OPP_BUG_CATCHER, 5 object SPRITE_LASS, 23, 4, STAY, LEFT, 6, OPP_LASS, 2 object SPRITE_BUG_CATCHER, 22, 9, STAY, LEFT, 7, OPP_YOUNGSTER, 2 object SPRITE_BUG_CATCHER, 24, 6, STAY, RIGHT, 8, OPP_BUG_CATCHER, 6 object SPRITE_LASS, 33, 10, STAY, UP, 9, OPP_LASS, 3
36.157895
69
0.719068
8c965efcbb462bf35992f3120bc90632387b925e
691
asm
Assembly
oeis/289/A289488.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
11
2021-08-22T19:44:55.000Z
2022-03-20T16:47:57.000Z
oeis/289/A289488.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
9
2021-08-29T13:15:54.000Z
2022-03-09T19:52:31.000Z
oeis/289/A289488.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
3
2021-08-22T20:56:47.000Z
2021-09-29T06:26:12.000Z
; A289488: a(n) = denominator of Sum_{k=1..n} 1/(2*k-1)!!. ; Submitted by Christian Krause ; 1,3,5,105,945,3465,135135,2027025,883575,654729075,13749310575,8108567775,718713961875,213458046676875,121378104973125,191898783962510625,372509404162520625,73881031825566590625,8200794532637891559375,319830986772877770815625,4371023485895996201146875,43374002283121808457534375,25373791335626257947657609375,36138430084073761319391140625,4495064726611328619496574953125,2980227913743310874726229193921875,1284163247385329076101545912828125,457229703608513221043524110541171875 mov $1,1 lpb $0 mov $2,$0 sub $0,1 mul $2,2 add $2,1 add $3,$1 mul $1,$2 lpe gcd $3,$1 div $1,$3 mov $0,$1
40.647059
479
0.819103
a8fbde304d8aba166ab1c6cdb7167ef203ad81af
362
asm
Assembly
insomni'hack-2015/shellcoding/tldr/list.asm
anarcheuz/CTF
beaccbfe036d90c7d7018978bad288c831d3f8f5
[ "MIT" ]
2
2015-03-24T22:20:08.000Z
2018-05-12T16:41:13.000Z
insomni'hack-2015/shellcoding/tldr/list.asm
anarcheuz/CTF
beaccbfe036d90c7d7018978bad288c831d3f8f5
[ "MIT" ]
null
null
null
insomni'hack-2015/shellcoding/tldr/list.asm
anarcheuz/CTF
beaccbfe036d90c7d7018978bad288c831d3f8f5
[ "MIT" ]
null
null
null
BITS 64 [SECTION .text] global _start _start: xor rdi, rdi xor rdx, rdx mov dl, -100 mov rdi, rdx push 0x2f mov rsi, rsp xor rdx, rdx xor r10, r10 xor rax, rax add ax, 257 syscall mov rdi, rax mov rsi, rsp mov dx, 0xffff xor rax, rax mov al, 78 syscall ;write(1, rsp, 0xffff) xor rdi, rdi inc rdi mov rsi, rsp mov dx, 0xffff xor rax, rax inc rax syscall
9.783784
22
0.698895
f346156b158902fb5e230b7ca72c5667f6d18356
442
asm
Assembly
programs/oeis/127/A127261.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
22
2018-02-06T19:19:31.000Z
2022-01-17T21:53:31.000Z
programs/oeis/127/A127261.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
41
2021-02-22T19:00:34.000Z
2021-08-28T10:47:47.000Z
programs/oeis/127/A127261.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
5
2021-02-24T21:14:16.000Z
2021-08-09T19:48:05.000Z
; A127261: a(0)=2, a(1)=2, a(n) = 2*a(n-1) + 10*a(n-2). ; 2,2,24,68,376,1432,6624,27568,121376,518432,2250624,9685568,41877376,180610432,779994624,3366093568,14532133376,62725202432,270771738624,1168795501568,5045308389376 mov $3,2 mov $4,$0 lpb $3 mov $0,$4 sub $3,1 add $0,$3 trn $0,1 seq $0,83102 ; a(n) = 2*a(n-1) + 10*a(n-2). mov $2,$3 mul $2,$0 add $1,$2 mov $5,$0 lpe min $4,1 mul $4,$5 sub $1,$4 mul $1,2 mov $0,$1
20.090909
166
0.61086