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|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
16f3a819bcc9c85b3e60d65684e7e65f84234286 | 458 | asm | Assembly | oeis/174/A174500.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/174/A174500.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/174/A174500.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A174500: Continued fraction expansion for exp( Sum_{n>=1} 1/(n*A003500(n)) ), where A003500(n) = (2+sqrt(3))^n + (2-sqrt(3))^n.
; Submitted by Jon Maiga
; 1,2,1,12,1,50,1,192,1,722,1,2700,1,10082,1,37632,1,140450,1,524172,1,1956242,1,7300800,1,27246962,1,101687052,1,379501250,1,1416317952,1,5285770562,1,19726764300,1,73621286642,1,274758382272,1
mov $1,2
mov $2,3
lpb $0
sub $0,2
add $2,2
add $1,$2
add $1,$2
add $2,$1
lpe
pow $1,$0
mov $0,$1
| 28.625 | 194 | 0.665939 |
1769db68dcc095cd71c8cf154d688297e2c8a263 | 15,502 | asm | Assembly | sources/ippcp/asm_intel64/pcpbnuaddaddm7as.asm | ntyukaev/ipp-crypto | 19b408cfd21a59f994b64dd47b18eb0c2f94e4e0 | [
"Apache-2.0"
] | 1 | 2021-10-04T10:21:54.000Z | 2021-10-04T10:21:54.000Z | sources/ippcp/asm_intel64/pcpbnuaddaddm7as.asm | ntyukaev/ipp-crypto | 19b408cfd21a59f994b64dd47b18eb0c2f94e4e0 | [
"Apache-2.0"
] | 1 | 2021-02-24T04:43:30.000Z | 2021-02-24T04:43:30.000Z | sources/ippcp/asm_intel64/pcpbnuaddaddm7as.asm | ntyukaev/ipp-crypto | 19b408cfd21a59f994b64dd47b18eb0c2f94e4e0 | [
"Apache-2.0"
] | 1 | 2020-03-06T17:25:31.000Z | 2020-03-06T17:25:31.000Z | ;===============================================================================
; Copyright 2015-2020 Intel Corporation
;
; Licensed under the Apache License, Version 2.0 (the "License");
; you may not use this file except in compliance with the License.
; You may obtain a copy of the License at
;
; http://www.apache.org/licenses/LICENSE-2.0
;
; Unless required by applicable law or agreed to in writing, software
; distributed under the License is distributed on an "AS IS" BASIS,
; WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
; See the License for the specific language governing permissions and
; limitations under the License.
;===============================================================================
;
;
; Purpose: Cryptography Primitive.
; Big Number Operations
;
; Content:
; cpAddAdd_BNU_school()
;
;
%include "asmdefs.inc"
%include "ia_32e.inc"
%include "pcpvariant.inc"
%if _ENABLE_KARATSUBA_
%if (_IPP32E >= _IPP32E_M7)
segment .text align=IPP_ALIGN_FACTOR
;*************************************************************
;* Ipp64u cpAddAdd_BNU(Ipp64u* pDst,
;* const Ipp64u* pSrcA,
;* const Ipp64u* pSrcB,
;* const Ipp64u* pSrcC,
;* int len)
;* returns carry
;*************************************************************
align IPP_ALIGN_FACTOR
IPPASM cpAddAdd_BNU
%assign LOCAL_FRAME 0
USES_GPR rsi,rdi,rbx,rbp,r12,r13,r14
USES_XMM
COMP_ABI 5
; rdi = pDst
; rsi = pSrcA
; rdx = pSrcB
; rcx = pSrcC
; r8 = len
movsxd r8, r8d ; length
xor rax, rax
xor rbx, rbx
cmp r8, 2
jge .ADD_GE2
;********** lenSrcA == 1 *************************************
add rax, rax
mov r8, qword [rsi] ; rsi = a
adc r8, qword [rdx] ; r8 = a+b
sbb rax, rax ;
add rbx, rbx
adc r8, qword [rcx] ; r8 = a+b+c = s
mov qword [rdi], r8 ;
sbb rbx, rbx ;
jmp .FINAL
;********** lenSrcA == 1 END ********************************
.ADD_GE2:
jg .ADD_GT2
;********** lenSrcA == 2 *************************************
add rax, rax
mov r8, qword [rsi] ; r8 = a0
adc r8, qword [rdx] ; r8 = a0+b0
mov r9, qword [rsi+8] ; r9 = a1
adc r9, qword [rdx+8] ; r9 = a1+b1
sbb rax, rax ; rax = carry
add rbx, rbx
adc r8, qword [rcx] ; r8 = a0+b0+c0 = s0
mov qword [rdi], r8 ; save s0
adc r9, qword [rcx+8] ; r9 = a1+b1+c1 = s1
mov qword [rdi+8], r9 ; save s1
sbb rbx, rbx ;
jmp .FINAL
;********** lenSrcA == 2 END *********************************
.ADD_GT2:
cmp r8, 4
jge .ADD_GE4
;********** lenSrcA == 3 *************************************
add rax, rax
mov r8, qword [rsi] ; r8 = a0
adc r8, qword [rdx] ; r8 = a0+b0
mov r9, qword [rsi+8] ; r9 = a1
adc r9, qword [rdx+8] ; r9 = a1+b1
mov r10, qword [rsi+16] ; r10 = a2
adc r10, qword [rdx+16] ; r10 = a2+b2
sbb rax, rax ; rax = carry
add rbx, rbx
adc r8, qword [rcx] ; r8 = a0+b0+c0 = s0
mov qword [rdi], r8 ; save s0
adc r9, qword [rcx+8] ; r9 = a1+b1+c1 = s1
mov qword [rdi+8], r9 ; save s1
adc r10, qword [rcx+16] ; r10 = a2+b2+c2 = s2
mov qword [rdi+16], r10 ; save s2
sbb rbx, rbx ;
jmp .FINAL
;********** lenSrcA == 3 END *********************************
.ADD_GE4:
jg .ADD_GT4
;********** lenSrcA == 4 *************************************
add rax, rax
mov r8, qword [rsi] ; r8 = a0
adc r8, qword [rdx] ; r8 = a0+b0
mov r9, qword [rsi+8] ; r9 = a1
adc r9, qword [rdx+8] ; r9 = a1+b1
mov r10, qword [rsi+16] ; r10 = a2
adc r10, qword [rdx+16] ; r10 = a2+b2
mov r11, qword [rsi+24] ; r11 = a3
adc r11, qword [rdx+24] ; r11 = a3+b3
sbb rax, rax ; rax = carry
add rbx, rbx
adc r8, qword [rcx] ; r8 = a0+b0+c0 = s0
mov qword [rdi], r8 ; save s0
adc r9, qword [rcx+8] ; r9 = a1+b1+c1 = s1
mov qword [rdi+8], r9 ; save s1
adc r10, qword [rcx+16] ; r10 = a2+b2+c2 = s2
mov qword [rdi+16], r10 ; save s2
adc r11, qword [rcx+24] ; r11 = a3+b3+c3 = s3
mov qword [rdi+24], r11 ; save s2
sbb rbx, rbx ; rax = carry
jmp .FINAL
;********** lenSrcA == 4 END *********************************
.ADD_GT4:
cmp r8, 6
jge .ADD_GE6
;********** lenSrcA == 5 *************************************
add rax, rax
mov r8, qword [rsi] ; r8 = a0
adc r8, qword [rdx] ; r8 = a0+b0
mov r9, qword [rsi+8] ; r9 = a1
adc r9, qword [rdx+8] ; r9 = a1+b1
mov r10, qword [rsi+16] ; r10 = a2
adc r10, qword [rdx+16] ; r10 = a2+b2
mov r11, qword [rsi+24] ; r11 = a3
adc r11, qword [rdx+24] ; r11 = a3+b3
mov rsi, qword [rsi+32] ; rsi = a4
adc rsi, qword [rdx+32] ; rsi = a4+b4
sbb rax, rax ; rax = carry
add rbx, rbx
adc r8, qword [rcx] ; r8 = a0+b0+c0 = s0
mov qword [rdi], r8 ; save s0
adc r9, qword [rcx+8] ; r9 = a1+b1+c1 = s1
mov qword [rdi+8], r9 ; save s1
adc r10, qword [rcx+16] ; r10 = a2+b2+c2 = s2
mov qword [rdi+16], r10 ; save s2
adc r11, qword [rcx+24] ; r11 = a3+b3+c3 = s3
mov qword [rdi+24], r11 ; save s3
adc rsi, qword [rcx+32] ; rsi = a4+b4+c4 = s4
mov qword [rdi+32], rsi ; save s4
sbb rbx, rbx ; rax = carry
jmp .FINAL
;********** lenSrcA == 5 END *********************************
.ADD_GE6:
jg .ADD_GT6
;********** lenSrcA == 6 *************************************
add rax, rax
mov r8, qword [rsi] ; r8 = a0
adc r8, qword [rdx] ; r8 = a0+b0
mov r9, qword [rsi+8] ; r9 = a1
adc r9, qword [rdx+8] ; r9 = a1+b1
mov r10, qword [rsi+16] ; r10 = a2
adc r10, qword [rdx+16] ; r10 = a2+b2
mov r11, qword [rsi+24] ; r11 = a3
adc r11, qword [rdx+24] ; r11 = a3+b3
mov r12, qword [rsi+32] ; rbx = a4
adc r12, qword [rdx+32] ; rbx = a4+b4
mov rsi, qword [rsi+40] ; rsi = a5
adc rsi, qword [rdx+40] ; rsi = a5+b5
sbb rax, rax ; rax = carry
add rbx, rbx
adc r8, qword [rcx] ; r8 = a0+b0+c0 = s0
mov qword [rdi], r8 ; save s0
adc r9, qword [rcx+8] ; r9 = a1+b1+c1 = s1
mov qword [rdi+8], r9 ; save s1
adc r10, qword [rcx+16] ; r10 = a2+b2+c2 = s2
mov qword [rdi+16], r10 ; save s2
adc r11, qword [rcx+24] ; r11 = a3+b3+c3 = s3
mov qword [rdi+24], r11 ; save s3
adc r12, qword [rcx+32] ; r12 = a4+b4+c4 = s4
mov qword [rdi+32], r12 ; save s4
adc rsi, qword [rcx+40] ; rsi = a5+b5+c5 = s5
mov qword [rdi+40], rsi ; save s5
sbb rbx, rbx ; rax = carry
jmp .FINAL
;********** lenSrcA == 6 END *********************************
.ADD_GT6:
cmp r8, 8
jge .ADD_GE8
.ADD_EQ7:
;********** lenSrcA == 7 *************************************
add rax, rax
mov r8, qword [rsi] ; r8 = a0
adc r8, qword [rdx] ; r8 = a0+b0 = s0
mov r9, qword [rsi+8] ; r9 = a1
adc r9, qword [rdx+8] ; r9 = a1+b1 = s1
mov r10, qword [rsi+16] ; r10 = a2
adc r10, qword [rdx+16] ; r10 = a2+b2 = s2
mov r11, qword [rsi+24] ; r11 = a3
adc r11, qword [rdx+24] ; r11 = a3+b3 = s3
mov r12, qword [rsi+32] ; r12 = a4
adc r12, qword [rdx+32] ; r12 = a4+b4 = s4
mov r13, qword [rsi+40] ; r13 = a5
adc r13, qword [rdx+40] ; r13 = a5+b5 = s5
mov rsi, qword [rsi+48] ; rsi = a6
adc rsi, qword [rdx+48] ; rsi = a6+b6 = s6
sbb rax, rax ; rax = carry
add rbx, rbx
adc r8, qword [rcx] ; r8 = a0+b0+c0 = s0
mov qword [rdi], r8 ; save s0
adc r9, qword [rcx+8] ; r9 = a1+b1+c1 = s1
mov qword [rdi+8], r9 ; save s1
adc r10, qword [rcx+16] ; r10 = a2+b2+c2 = s2
mov qword [rdi+16], r10 ; save s2
adc r11, qword [rcx+24] ; r11 = a3+b3+c3 = s3
mov qword [rdi+24], r11 ; save s3
adc r12, qword [rcx+32] ; r12 = a4+b4+c4 = s4
mov qword [rdi+32], r12 ; save s4
adc r13, qword [rcx+40] ; r13 = a5+b5+c5 = s5
mov qword [rdi+40], r13 ; save s5
adc rsi, qword [rcx+48] ; rsi = a6+b6+c6 = s6
mov qword [rdi+48], rsi ; save s6
sbb rbx, rbx ; rax = carry
jmp .FINAL
;********** lenSrcA == 7 END *********************************
.ADD_GE8:
jg .ADD_GT8
;********** lenSrcA == 8 *************************************
add rax, rax
mov r8, qword [rsi] ; r8 = a0
adc r8, qword [rdx] ; r8 = a0+b0 = s0
mov r9, qword [rsi+8] ; r9 = a1
adc r9, qword [rdx+8] ; r9 = a1+b1 = s1
mov r10, qword [rsi+16] ; r10 = a2
adc r10, qword [rdx+16] ; r10 = a2+b2 = s2
mov r11, qword [rsi+24] ; r11 = a3
adc r11, qword [rdx+24] ; r11 = a3+b3 = s3
mov r12, qword [rsi+32] ; r12 = a4
adc r12, qword [rdx+32] ; r12 = a4+b4 = s4
mov r13, qword [rsi+40] ; r13 = a5
adc r13, qword [rdx+40] ; r13 = a5+b5 = s5
mov r14, qword [rsi+48] ; r14 = a6
adc r14, qword [rdx+48] ; r14 = a6+b6 = s6
mov rsi, qword [rsi+56] ; rsi = a7
adc rsi, qword [rdx+56] ; rsi = a7+b7 = s7
sbb rax, rax ; rax = carry
add rbx, rbx
adc r8, qword [rcx] ; r8 = a0+b0+c0 = s0
mov qword [rdi], r8 ; save s0
adc r9, qword [rcx+8] ; r9 = a1+b1+c1 = s1
mov qword [rdi+8], r9 ; save s1
adc r10, qword [rcx+16] ; r10 = a2+b2+c2 = s2
mov qword [rdi+16], r10 ; save s2
adc r11, qword [rcx+24] ; r11 = a3+b3+c3 = s3
mov qword [rdi+24], r11 ; save s3
adc r12, qword [rcx+32] ; r12 = a4+b4+c4 = s4
mov qword [rdi+32], r12 ; save s4
adc r13, qword [rcx+40] ; r13 = a5+b5+c5 = s5
mov qword [rdi+40], r13 ; save s5
adc r14, qword [rcx+48] ; r14 = a6+b6+c6 = s6
mov qword [rdi+48], r14 ; save s6
adc rsi, qword [rcx+56] ; rsi = a7+b7+c7 = s7
mov qword [rdi+56], rsi ; save s7
sbb rbx, rbx ; rax = carry
jmp .FINAL
;********** lenSrcA == 8 END *********************************
;********** lenSrcA > 8 *************************************
.ADD_GT8:
mov rbp, rcx ; pC
mov rcx, r8 ; length
and r8, 3 ; length%4
xor rcx, r8 ; length/4
lea rsi, [rsi+rcx*sizeof(qword)]
lea rdx, [rdx+rcx*sizeof(qword)]
lea rbp, [rbp+rcx*sizeof(qword)]
lea rdi, [rdi+rcx*sizeof(qword)]
neg rcx
jmp .ADD_GLOOP
align IPP_ALIGN_FACTOR
.ADD_GLOOP:
add rax, rax
mov r9, qword [rsi+sizeof(qword)*rcx] ; r8 = a0
mov r10, qword [rsi+sizeof(qword)*rcx+sizeof(qword)] ; r9 = a1
mov r11, qword [rsi+sizeof(qword)*rcx+sizeof(qword)*2] ; r10 = a2
mov r12, qword [rsi+sizeof(qword)*rcx+sizeof(qword)*3] ; r11 = a3
adc r9, qword [rdx+sizeof(qword)*rcx] ; r8 = a0+b0
adc r10, qword [rdx+sizeof(qword)*rcx+sizeof(qword)] ; r9 = a1+b1
adc r11, qword [rdx+sizeof(qword)*rcx+sizeof(qword)*2] ; r10 = a2+b2
adc r12, qword [rdx+sizeof(qword)*rcx+sizeof(qword)*3] ; r11 = a3+b3
sbb rax, rax ; al = c0 new
add rbx, rbx ;
adc r9, qword [rbp+sizeof(qword)*rcx] ; r8 = a0+b0+c0
mov qword [rdi+sizeof(qword)*rcx], r9 ;
adc r10, qword [rbp+sizeof(qword)*rcx+sizeof(qword)] ; r9 = a1+b1+c1
mov qword [rdi+sizeof(qword)*rcx+sizeof(qword)], r10 ;
adc r11, qword [rbp+sizeof(qword)*rcx+sizeof(qword)*2] ; r10 = a2+b2+c2
mov qword [rdi+sizeof(qword)*rcx+sizeof(qword)*2], r11 ;
adc r12, qword [rbp+sizeof(qword)*rcx+sizeof(qword)*3] ; r11 = a3+b3+c3
mov qword [rdi+sizeof(qword)*rcx+sizeof(qword)*3], r12 ;
sbb rbx, rbx
lea rcx, [rcx+4]
jrcxz .EXIT_LOOP
jmp .ADD_GLOOP
.EXIT_LOOP:
test r8, r8
jz .FINAL
.ADD_LAST2:
test r8, 2
jz .ADD_LAST1
add rax, rax
mov r9, qword [rsi] ; r8 = a0
mov r10, qword [rsi+sizeof(qword)] ; r9 = a1
lea rsi, [rsi+sizeof(qword)*2]
adc r9, qword [rdx] ; r8 = a0+b0
adc r10, qword [rdx+sizeof(qword)] ; r9 = a1+b1
lea rdx, [rdx+sizeof(qword)*2]
sbb rax, rax
add rbx, rbx
adc r9, qword [rbp] ; r8 = a0+b0+c0
mov qword [rdi], r9 ;
adc r10, qword [rbp+sizeof(qword)] ; r9 = a1+b1+c1
mov qword [rdi+sizeof(qword)], r10 ;
lea rbp, [rbp+sizeof(qword)*2]
lea rdi, [rdi+sizeof(qword)*2]
sbb rbx, rbx
test r8, 1
jz .FINAL
.ADD_LAST1:
add rax, rax
mov r9, qword [rsi] ; r8 = a0
adc r9, qword [rdx] ; r8 = a0+b0
sbb rax, rax ;
add rbx, rbx
adc r9, qword [rbp] ; r8 = a0+b0+c0 = s0
mov qword [rdi], r9
sbb rbx, rbx
;******************* .FINAL ***********************************************************
.FINAL:
add rax, rbx
neg rax
REST_XMM
REST_GPR
ret
ENDFUNC cpAddAdd_BNU
%endif ;; _IPP32E_M7
%endif ;; _ENABLE_KARATSUBA_
| 39.146465 | 87 | 0.411495 |
1ccbfffdefc473d3f9f1ee87ceb0d71dbf2e71cf | 73,037 | asm | Assembly | FreeRTOSv10.4.1/FreeRTOS/Demo/MB96340_Softune/FreeRTOS_96348hs_SK16FX100PMC/Src/mb96348hs.asm | Shiva-D/rtos-course | af277986f4e7b948edaf87ee46ca63b24d93eba2 | [
"BSD-3-Clause"
] | 369 | 2017-01-27T14:40:37.000Z | 2022-03-30T09:34:08.000Z | FreeRTOSv10.4.1/FreeRTOS/Demo/MB96340_Softune/FreeRTOS_96348hs_SK16FX100PMC/Src/mb96348hs.asm | Shiva-D/rtos-course | af277986f4e7b948edaf87ee46ca63b24d93eba2 | [
"BSD-3-Clause"
] | 52 | 2017-04-07T07:24:11.000Z | 2022-03-09T10:54:32.000Z | FreeRTOSv9.0.0/FreeRTOS/Demo/MB96340_Softune/FreeRTOS_96348hs_SK16FX100PMC/Src/mb96348hs.asm | freeRTOSbuddies/freeRtosMain | b37298bdb373e711a06cdc4e5b6c6c5de583a6e8 | [
"MIT"
] | 141 | 2017-01-12T06:19:22.000Z | 2022-03-17T01:49:33.000Z | /* FFMC-16 IO-MAP HEADER FILE */
/* ========================== */
/* SOFTUNE WORKBENCH FORMAT */
/* C-DEFINITIONS FOR IO-SYMBOLS */
/* CREATED BY IO-WIZARD V2.27 */
/* $Id: mb96348hs.asm,v 1.7 2007/09/20 14:23:20 mwilla Exp $ */
/* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */
/* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */
/* ELIGIBILITY FOR ANY PURPOSES. */
/* (C) Fujitsu Microelectronics Europe GmbH */
/* ************************************************************************* */
/* FUJITSU MICROELECTRONICS EUROPE GMBH */
/* Pittlerstrasse 47, 63225 Langen, Germany */
/* Tel.:++49/6103/690-0,Fax - 122 */
/* */
/* The following software is for demonstration purposes only. */
/* It is not fully tested, nor validated in order to fullfill */
/* its task under all circumstances. Therefore, this software */
/* or any part of it must only be used in an evaluation */
/* laboratory environment. */
/* This software is subject to the rules of our standard */
/* DISCLAIMER, that is delivered with our SW-tools on the CD or DVD */
/* "Micros Documentation & Software" (V3.4 or later) or */
/* see our Internet Page - */
/* http://emea.fujitsu.com/microelectronics */
/* ************************************************************************* */
/* */
/* NOTE: */
/* */
/* This header-file covers all features of the chip MB96F348HS. */
/* */
/* */
/* ---------------------------------------------------------------------- */
/* History: */
/* Date Version Author Description */
/* 22.12.2006 1.0 PHu Initial Release: derived from headerfile of */
/* MB96348RS and added Satellite Flash, removed */
/* RTC, Clock Calibration, LIN-USART7-9 */
/* 16.01.2007 1.1 PHu Add 32-bit access names for CAN where */
/* appropriate */
/* 09.02.2007 1.3 PHu skip version 1.2 to be in line with CVS */
/* numbering */
/* correct addresses of LIN-UART3 registers */
/* allow only 16 bit access for the ADSR */
/* 12.04.2007 1.4 Mef Added Voltage Regulator Control Register */
/* Added RD19V bit in Flash Memory Control */
/* Status Register */
/* 03.05.2007 1.5 Mef Added LIN USART 7,8,9 */
/* 15.05.2007 1.6 Mef Added RTC */
/* 20.09.2007 1.7 MWi Completely revised version */
.PROGRAM MB96348HS
.TITLE MB96348HS
;------------------------
; IO-AREA DEFINITIONS :
;------------------------
.section IOBASE, IO, locate=0x0 ;
.GLOBAL __pdr00, __pdr01, __pdr02, __pdr03, __pdr04, __pdr05
.GLOBAL __pdr06, __pdr07, __pdr08, __pdr09, __pdr10, __adcs
.GLOBAL __adcsl, __adcsh, __adcr, __adcrl, __adcrh, __adsr
.GLOBAL __adecr, __tcdt0, __tccs0, __tccsl0, __tccsh0, __tcdt1
.GLOBAL __tccs1, __tccsl1, __tccsh1, __ocs0, __ocs1, __occp0
.GLOBAL __occp1, __ocs2, __ocs3, __occp2, __occp3, __ocs4
.GLOBAL __ocs5, __occp4, __occp5, __ocs6, __ocs7, __occp6
.GLOBAL __occp7, __ics01, __ice01, __ipcp0, __ipcpl0, __ipcph0
.GLOBAL __ipcp1, __ipcpl1, __ipcph1, __ics23, __ice23, __ipcp2
.GLOBAL __ipcpl2, __ipcph2, __ipcp3, __ipcpl3, __ipcph3, __ics45
.GLOBAL __ice45, __ipcp4, __ipcpl4, __ipcph4, __ipcp5, __ipcpl5
.GLOBAL __ipcph5, __ics67, __ice67, __ipcp6, __ipcpl6, __ipcph6
.GLOBAL __ipcp7, __ipcpl7, __ipcph7, __enir0, __eirr0, __elvr0
.GLOBAL __elvrl0, __elvrh0, __enir1, __eirr1, __elvr1, __elvrl1
.GLOBAL __elvrh1, __tmcsr0, __tmcsrl0, __tmcsrh0, __tmrlr0, __tmr0
.GLOBAL __tmcsr1, __tmcsrl1, __tmcsrh1, __tmrlr1, __tmr1, __tmcsr2
.GLOBAL __tmcsrl2, __tmcsrh2, __tmrlr2, __tmr2, __tmcsr3, __tmcsrl3
.GLOBAL __tmcsrh3, __tmrlr3, __tmr3, __tmcsr6, __tmcsrl6, __tmcsrh6
.GLOBAL __tmrlr6, __tmr6, __gcn10, __gcn1l0, __gcn1h0, __gcn20
.GLOBAL __gcn2l0, __gcn2h0, __ptmr0, __pcsr0, __pdut0, __pcn0
.GLOBAL __pcnl0, __pcnh0, __ptmr1, __pcsr1, __pdut1, __pcn1
.GLOBAL __pcnl1, __pcnh1, __ptmr2, __pcsr2, __pdut2, __pcn2
.GLOBAL __pcnl2, __pcnh2, __ptmr3, __pcsr3, __pdut3, __pcn3
.GLOBAL __pcnl3, __pcnh3, __gcn11, __gcn1l1, __gcn1h1, __gcn21
.GLOBAL __gcn2l1, __gcn2h1, __ptmr4, __pcsr4, __pdut4, __pcn4
.GLOBAL __pcnl4, __pcnh4, __ptmr5, __pcsr5, __pdut5, __pcn5
.GLOBAL __pcnl5, __pcnh5, __ibsr0, __ibcr0, __itba0, __itbal0
.GLOBAL __itbah0, __itmk0, __itmkl0, __itmkh0, __isba0, __ismk0
.GLOBAL __idar0, __iccr0, __ibsr1, __ibcr1, __itba1, __itbal1
.GLOBAL __itbah1, __itmk1, __itmkl1, __itmkh1, __isba1, __ismk1
.GLOBAL __idar1, __iccr1, __smr0, __scr0, __tdr0, __rdr0
.GLOBAL __ssr0, __eccr0, __escr0, __bgr0, __bgrl0, __bgrh0
.GLOBAL __esir0, __smr1, __scr1, __tdr1, __rdr1, __ssr1
.GLOBAL __eccr1, __escr1, __bgr1, __bgrl1, __bgrh1, __esir1
.GLOBAL __smr2, __scr2, __tdr2, __rdr2, __ssr2, __eccr2
.GLOBAL __escr2, __bgr2, __bgrl2, __bgrh2, __esir2, __smr3
.GLOBAL __scr3, __tdr3, __rdr3, __ssr3, __eccr3, __escr3
.GLOBAL __bgr3, __bgrl3, __bgrh3, __esir3
__pdr00 .res.b 1 ;000000
PDR00 .equ 0x0000
__pdr01 .res.b 1 ;000001
PDR01 .equ 0x0001
__pdr02 .res.b 1 ;000002
PDR02 .equ 0x0002
__pdr03 .res.b 1 ;000003
PDR03 .equ 0x0003
__pdr04 .res.b 1 ;000004
PDR04 .equ 0x0004
__pdr05 .res.b 1 ;000005
PDR05 .equ 0x0005
__pdr06 .res.b 1 ;000006
PDR06 .equ 0x0006
__pdr07 .res.b 1 ;000007
PDR07 .equ 0x0007
__pdr08 .res.b 1 ;000008
PDR08 .equ 0x0008
__pdr09 .res.b 1 ;000009
PDR09 .equ 0x0009
__pdr10 .res.b 1 ;00000A
PDR10 .equ 0x000A
.org 0x000018
__adcs ; overlay symbol ;000018
ADCS .equ 0x0018
__adcsl .res.b 1 ;000018
ADCSL .equ 0x0018
__adcsh .res.b 1 ;000019
ADCSH .equ 0x0019
__adcr ; overlay symbol ;00001A
ADCR .equ 0x001A
__adcrl .res.b 1 ;00001A
ADCRL .equ 0x001A
__adcrh .res.b 1 ;00001B
ADCRH .equ 0x001B
__adsr .res.b 2 ;00001C
ADSR .equ 0x001C
__adecr .res.b 1 ;00001E
ADECR .equ 0x001E
.org 0x000020
__tcdt0 .res.b 2 ;000020
TCDT0 .equ 0x0020
__tccs0 ; overlay symbol ;000022
TCCS0 .equ 0x0022
__tccsl0 .res.b 1 ;000022
TCCSL0 .equ 0x0022
__tccsh0 .res.b 1 ;000023
TCCSH0 .equ 0x0023
__tcdt1 .res.b 2 ;000024
TCDT1 .equ 0x0024
__tccs1 ; overlay symbol ;000026
TCCS1 .equ 0x0026
__tccsl1 .res.b 1 ;000026
TCCSL1 .equ 0x0026
__tccsh1 .res.b 1 ;000027
TCCSH1 .equ 0x0027
__ocs0 .res.b 1 ;000028
OCS0 .equ 0x0028
__ocs1 .res.b 1 ;000029
OCS1 .equ 0x0029
__occp0 .res.b 2 ;00002A
OCCP0 .equ 0x002A
__occp1 .res.b 2 ;00002C
OCCP1 .equ 0x002C
__ocs2 .res.b 1 ;00002E
OCS2 .equ 0x002E
__ocs3 .res.b 1 ;00002F
OCS3 .equ 0x002F
__occp2 .res.b 2 ;000030
OCCP2 .equ 0x0030
__occp3 .res.b 2 ;000032
OCCP3 .equ 0x0032
__ocs4 .res.b 1 ;000034
OCS4 .equ 0x0034
__ocs5 .res.b 1 ;000035
OCS5 .equ 0x0035
__occp4 .res.b 2 ;000036
OCCP4 .equ 0x0036
__occp5 .res.b 2 ;000038
OCCP5 .equ 0x0038
__ocs6 .res.b 1 ;00003A
OCS6 .equ 0x003A
__ocs7 .res.b 1 ;00003B
OCS7 .equ 0x003B
__occp6 .res.b 2 ;00003C
OCCP6 .equ 0x003C
__occp7 .res.b 2 ;00003E
OCCP7 .equ 0x003E
__ics01 .res.b 1 ;000040
ICS01 .equ 0x0040
__ice01 .res.b 1 ;000041
ICE01 .equ 0x0041
__ipcp0 ; overlay symbol ;000042
IPCP0 .equ 0x0042
__ipcpl0 .res.b 1 ;000042
IPCPL0 .equ 0x0042
__ipcph0 .res.b 1 ;000043
IPCPH0 .equ 0x0043
__ipcp1 ; overlay symbol ;000044
IPCP1 .equ 0x0044
__ipcpl1 .res.b 1 ;000044
IPCPL1 .equ 0x0044
__ipcph1 .res.b 1 ;000045
IPCPH1 .equ 0x0045
__ics23 .res.b 1 ;000046
ICS23 .equ 0x0046
__ice23 .res.b 1 ;000047
ICE23 .equ 0x0047
__ipcp2 ; overlay symbol ;000048
IPCP2 .equ 0x0048
__ipcpl2 .res.b 1 ;000048
IPCPL2 .equ 0x0048
__ipcph2 .res.b 1 ;000049
IPCPH2 .equ 0x0049
__ipcp3 ; overlay symbol ;00004A
IPCP3 .equ 0x004A
__ipcpl3 .res.b 1 ;00004A
IPCPL3 .equ 0x004A
__ipcph3 .res.b 1 ;00004B
IPCPH3 .equ 0x004B
__ics45 .res.b 1 ;00004C
ICS45 .equ 0x004C
__ice45 .res.b 1 ;00004D
ICE45 .equ 0x004D
__ipcp4 ; overlay symbol ;00004E
IPCP4 .equ 0x004E
__ipcpl4 .res.b 1 ;00004E
IPCPL4 .equ 0x004E
__ipcph4 .res.b 1 ;00004F
IPCPH4 .equ 0x004F
__ipcp5 ; overlay symbol ;000050
IPCP5 .equ 0x0050
__ipcpl5 .res.b 1 ;000050
IPCPL5 .equ 0x0050
__ipcph5 .res.b 1 ;000051
IPCPH5 .equ 0x0051
__ics67 .res.b 1 ;000052
ICS67 .equ 0x0052
__ice67 .res.b 1 ;000053
ICE67 .equ 0x0053
__ipcp6 ; overlay symbol ;000054
IPCP6 .equ 0x0054
__ipcpl6 .res.b 1 ;000054
IPCPL6 .equ 0x0054
__ipcph6 .res.b 1 ;000055
IPCPH6 .equ 0x0055
__ipcp7 ; overlay symbol ;000056
IPCP7 .equ 0x0056
__ipcpl7 .res.b 1 ;000056
IPCPL7 .equ 0x0056
__ipcph7 .res.b 1 ;000057
IPCPH7 .equ 0x0057
__enir0 .res.b 1 ;000058
ENIR0 .equ 0x0058
__eirr0 .res.b 1 ;000059
EIRR0 .equ 0x0059
__elvr0 ; overlay symbol ;00005A
ELVR0 .equ 0x005A
__elvrl0 .res.b 1 ;00005A
ELVRL0 .equ 0x005A
__elvrh0 .res.b 1 ;00005B
ELVRH0 .equ 0x005B
__enir1 .res.b 1 ;00005C
ENIR1 .equ 0x005C
__eirr1 .res.b 1 ;00005D
EIRR1 .equ 0x005D
__elvr1 ; overlay symbol ;00005E
ELVR1 .equ 0x005E
__elvrl1 .res.b 1 ;00005E
ELVRL1 .equ 0x005E
__elvrh1 .res.b 1 ;00005F
ELVRH1 .equ 0x005F
__tmcsr0 ; overlay symbol ;000060
TMCSR0 .equ 0x0060
__tmcsrl0 .res.b 1 ;000060
TMCSRL0 .equ 0x0060
__tmcsrh0 .res.b 1 ;000061
TMCSRH0 .equ 0x0061
__tmrlr0 ; overlay symbol ;000062
TMRLR0 .equ 0x0062
__tmr0 .res.b 2 ;000062
TMR0 .equ 0x0062
__tmcsr1 ; overlay symbol ;000064
TMCSR1 .equ 0x0064
__tmcsrl1 .res.b 1 ;000064
TMCSRL1 .equ 0x0064
__tmcsrh1 .res.b 1 ;000065
TMCSRH1 .equ 0x0065
__tmrlr1 ; overlay symbol ;000066
TMRLR1 .equ 0x0066
__tmr1 .res.b 2 ;000066
TMR1 .equ 0x0066
__tmcsr2 ; overlay symbol ;000068
TMCSR2 .equ 0x0068
__tmcsrl2 .res.b 1 ;000068
TMCSRL2 .equ 0x0068
__tmcsrh2 .res.b 1 ;000069
TMCSRH2 .equ 0x0069
__tmrlr2 ; overlay symbol ;00006A
TMRLR2 .equ 0x006A
__tmr2 .res.b 2 ;00006A
TMR2 .equ 0x006A
__tmcsr3 ; overlay symbol ;00006C
TMCSR3 .equ 0x006C
__tmcsrl3 .res.b 1 ;00006C
TMCSRL3 .equ 0x006C
__tmcsrh3 .res.b 1 ;00006D
TMCSRH3 .equ 0x006D
__tmrlr3 ; overlay symbol ;00006E
TMRLR3 .equ 0x006E
__tmr3 .res.b 2 ;00006E
TMR3 .equ 0x006E
__tmcsr6 ; overlay symbol ;000070
TMCSR6 .equ 0x0070
__tmcsrl6 .res.b 1 ;000070
TMCSRL6 .equ 0x0070
__tmcsrh6 .res.b 1 ;000071
TMCSRH6 .equ 0x0071
__tmrlr6 ; overlay symbol ;000072
TMRLR6 .equ 0x0072
__tmr6 .res.b 2 ;000072
TMR6 .equ 0x0072
__gcn10 ; overlay symbol ;000074
GCN10 .equ 0x0074
__gcn1l0 .res.b 1 ;000074
GCN1L0 .equ 0x0074
__gcn1h0 .res.b 1 ;000075
GCN1H0 .equ 0x0075
__gcn20 ; overlay symbol ;000076
GCN20 .equ 0x0076
__gcn2l0 .res.b 1 ;000076
GCN2L0 .equ 0x0076
__gcn2h0 .res.b 1 ;000077
GCN2H0 .equ 0x0077
__ptmr0 .res.b 2 ;000078
PTMR0 .equ 0x0078
__pcsr0 .res.b 2 ;00007A
PCSR0 .equ 0x007A
__pdut0 .res.b 2 ;00007C
PDUT0 .equ 0x007C
__pcn0 ; overlay symbol ;00007E
PCN0 .equ 0x007E
__pcnl0 .res.b 1 ;00007E
PCNL0 .equ 0x007E
__pcnh0 .res.b 1 ;00007F
PCNH0 .equ 0x007F
__ptmr1 .res.b 2 ;000080
PTMR1 .equ 0x0080
__pcsr1 .res.b 2 ;000082
PCSR1 .equ 0x0082
__pdut1 .res.b 2 ;000084
PDUT1 .equ 0x0084
__pcn1 ; overlay symbol ;000086
PCN1 .equ 0x0086
__pcnl1 .res.b 1 ;000086
PCNL1 .equ 0x0086
__pcnh1 .res.b 1 ;000087
PCNH1 .equ 0x0087
__ptmr2 .res.b 2 ;000088
PTMR2 .equ 0x0088
__pcsr2 .res.b 2 ;00008A
PCSR2 .equ 0x008A
__pdut2 .res.b 2 ;00008C
PDUT2 .equ 0x008C
__pcn2 ; overlay symbol ;00008E
PCN2 .equ 0x008E
__pcnl2 .res.b 1 ;00008E
PCNL2 .equ 0x008E
__pcnh2 .res.b 1 ;00008F
PCNH2 .equ 0x008F
__ptmr3 .res.b 2 ;000090
PTMR3 .equ 0x0090
__pcsr3 .res.b 2 ;000092
PCSR3 .equ 0x0092
__pdut3 .res.b 2 ;000094
PDUT3 .equ 0x0094
__pcn3 ; overlay symbol ;000096
PCN3 .equ 0x0096
__pcnl3 .res.b 1 ;000096
PCNL3 .equ 0x0096
__pcnh3 .res.b 1 ;000097
PCNH3 .equ 0x0097
__gcn11 ; overlay symbol ;000098
GCN11 .equ 0x0098
__gcn1l1 .res.b 1 ;000098
GCN1L1 .equ 0x0098
__gcn1h1 .res.b 1 ;000099
GCN1H1 .equ 0x0099
__gcn21 ; overlay symbol ;00009A
GCN21 .equ 0x009A
__gcn2l1 .res.b 1 ;00009A
GCN2L1 .equ 0x009A
__gcn2h1 .res.b 1 ;00009B
GCN2H1 .equ 0x009B
__ptmr4 .res.b 2 ;00009C
PTMR4 .equ 0x009C
__pcsr4 .res.b 2 ;00009E
PCSR4 .equ 0x009E
__pdut4 .res.b 2 ;0000A0
PDUT4 .equ 0x00A0
__pcn4 ; overlay symbol ;0000A2
PCN4 .equ 0x00A2
__pcnl4 .res.b 1 ;0000A2
PCNL4 .equ 0x00A2
__pcnh4 .res.b 1 ;0000A3
PCNH4 .equ 0x00A3
__ptmr5 .res.b 2 ;0000A4
PTMR5 .equ 0x00A4
__pcsr5 .res.b 2 ;0000A6
PCSR5 .equ 0x00A6
__pdut5 .res.b 2 ;0000A8
PDUT5 .equ 0x00A8
__pcn5 ; overlay symbol ;0000AA
PCN5 .equ 0x00AA
__pcnl5 .res.b 1 ;0000AA
PCNL5 .equ 0x00AA
__pcnh5 .res.b 1 ;0000AB
PCNH5 .equ 0x00AB
__ibsr0 .res.b 1 ;0000AC
IBSR0 .equ 0x00AC
__ibcr0 .res.b 1 ;0000AD
IBCR0 .equ 0x00AD
__itba0 ; overlay symbol ;0000AE
ITBA0 .equ 0x00AE
__itbal0 .res.b 1 ;0000AE
ITBAL0 .equ 0x00AE
__itbah0 .res.b 1 ;0000AF
ITBAH0 .equ 0x00AF
__itmk0 ; overlay symbol ;0000B0
ITMK0 .equ 0x00B0
__itmkl0 .res.b 1 ;0000B0
ITMKL0 .equ 0x00B0
__itmkh0 .res.b 1 ;0000B1
ITMKH0 .equ 0x00B1
__isba0 .res.b 1 ;0000B2
ISBA0 .equ 0x00B2
__ismk0 .res.b 1 ;0000B3
ISMK0 .equ 0x00B3
__idar0 .res.b 1 ;0000B4
IDAR0 .equ 0x00B4
__iccr0 .res.b 1 ;0000B5
ICCR0 .equ 0x00B5
__ibsr1 .res.b 1 ;0000B6
IBSR1 .equ 0x00B6
__ibcr1 .res.b 1 ;0000B7
IBCR1 .equ 0x00B7
__itba1 ; overlay symbol ;0000B8
ITBA1 .equ 0x00B8
__itbal1 .res.b 1 ;0000B8
ITBAL1 .equ 0x00B8
__itbah1 .res.b 1 ;0000B9
ITBAH1 .equ 0x00B9
__itmk1 ; overlay symbol ;0000BA
ITMK1 .equ 0x00BA
__itmkl1 .res.b 1 ;0000BA
ITMKL1 .equ 0x00BA
__itmkh1 .res.b 1 ;0000BB
ITMKH1 .equ 0x00BB
__isba1 .res.b 1 ;0000BC
ISBA1 .equ 0x00BC
__ismk1 .res.b 1 ;0000BD
ISMK1 .equ 0x00BD
__idar1 .res.b 1 ;0000BE
IDAR1 .equ 0x00BE
__iccr1 .res.b 1 ;0000BF
ICCR1 .equ 0x00BF
__smr0 .res.b 1 ;0000C0
SMR0 .equ 0x00C0
__scr0 .res.b 1 ;0000C1
SCR0 .equ 0x00C1
__tdr0 ; overlay symbol ;0000C2
TDR0 .equ 0x00C2
__rdr0 .res.b 1 ;0000C2
RDR0 .equ 0x00C2
__ssr0 .res.b 1 ;0000C3
SSR0 .equ 0x00C3
__eccr0 .res.b 1 ;0000C4
ECCR0 .equ 0x00C4
__escr0 .res.b 1 ;0000C5
ESCR0 .equ 0x00C5
__bgr0 ; overlay symbol ;0000C6
BGR0 .equ 0x00C6
__bgrl0 .res.b 1 ;0000C6
BGRL0 .equ 0x00C6
__bgrh0 .res.b 1 ;0000C7
BGRH0 .equ 0x00C7
__esir0 .res.b 1 ;0000C8
ESIR0 .equ 0x00C8
.org 0x0000cA
__smr1 .res.b 1 ;0000CA
SMR1 .equ 0x00CA
__scr1 .res.b 1 ;0000CB
SCR1 .equ 0x00CB
__tdr1 ; overlay symbol ;0000CC
TDR1 .equ 0x00CC
__rdr1 .res.b 1 ;0000CC
RDR1 .equ 0x00CC
__ssr1 .res.b 1 ;0000CD
SSR1 .equ 0x00CD
__eccr1 .res.b 1 ;0000CE
ECCR1 .equ 0x00CE
__escr1 .res.b 1 ;0000CF
ESCR1 .equ 0x00CF
__bgr1 ; overlay symbol ;0000D0
BGR1 .equ 0x00D0
__bgrl1 .res.b 1 ;0000D0
BGRL1 .equ 0x00D0
__bgrh1 .res.b 1 ;0000D1
BGRH1 .equ 0x00D1
__esir1 .res.b 1 ;0000D2
ESIR1 .equ 0x00D2
.org 0x0000d4
__smr2 .res.b 1 ;0000D4
SMR2 .equ 0x00D4
__scr2 .res.b 1 ;0000D5
SCR2 .equ 0x00D5
__tdr2 ; overlay symbol ;0000D6
TDR2 .equ 0x00D6
__rdr2 .res.b 1 ;0000D6
RDR2 .equ 0x00D6
__ssr2 .res.b 1 ;0000D7
SSR2 .equ 0x00D7
__eccr2 .res.b 1 ;0000D8
ECCR2 .equ 0x00D8
__escr2 .res.b 1 ;0000D9
ESCR2 .equ 0x00D9
__bgr2 ; overlay symbol ;0000DA
BGR2 .equ 0x00DA
__bgrl2 .res.b 1 ;0000DA
BGRL2 .equ 0x00DA
__bgrh2 .res.b 1 ;0000DB
BGRH2 .equ 0x00DB
__esir2 .res.b 1 ;0000DC
ESIR2 .equ 0x00DC
.org 0x0000de
__smr3 .res.b 1 ;0000DE
SMR3 .equ 0x00DE
__scr3 .res.b 1 ;0000DF
SCR3 .equ 0x00DF
__tdr3 ; overlay symbol ;0000E0
TDR3 .equ 0x00E0
__rdr3 .res.b 1 ;0000E0
RDR3 .equ 0x00E0
__ssr3 .res.b 1 ;0000E1
SSR3 .equ 0x00E1
__eccr3 .res.b 1 ;0000E2
ECCR3 .equ 0x00E2
__escr3 .res.b 1 ;0000E3
ESCR3 .equ 0x00E3
__bgr3 ; overlay symbol ;0000E4
BGR3 .equ 0x00E4
__bgrl3 .res.b 1 ;0000E4
BGRL3 .equ 0x00E4
__bgrh3 .res.b 1 ;0000E5
BGRH3 .equ 0x00E5
__esir3 .res.b 1 ;0000E6
ESIR3 .equ 0x00E6
.section DMADESCRIPTOR, DATA, locate=0x100 ;
.GLOBAL __bapl0, __bapm0, __baph0, __dmacs0, __ioa0, __ioal0
.GLOBAL __ioah0, __dct0, __dctl0, __dcth0, __bapl1, __bapm1
.GLOBAL __baph1, __dmacs1, __ioa1, __ioal1, __ioah1, __dct1
.GLOBAL __dctl1, __dcth1, __bapl2, __bapm2, __baph2, __dmacs2
.GLOBAL __ioa2, __ioal2, __ioah2, __dct2, __dctl2, __dcth2
.GLOBAL __bapl3, __bapm3, __baph3, __dmacs3, __ioa3, __ioal3
.GLOBAL __ioah3, __dct3, __dctl3, __dcth3, __bapl4, __bapm4
.GLOBAL __baph4, __dmacs4, __ioa4, __ioal4, __ioah4, __dct4
.GLOBAL __dctl4, __dcth4, __bapl5, __bapm5, __baph5, __dmacs5
.GLOBAL __ioa5, __ioal5, __ioah5, __dct5, __dctl5, __dcth5
__bapl0 .res.b 1 ;000100
BAPL0 .equ 0x0100
__bapm0 .res.b 1 ;000101
BAPM0 .equ 0x0101
__baph0 .res.b 1 ;000102
BAPH0 .equ 0x0102
__dmacs0 .res.b 1 ;000103
DMACS0 .equ 0x0103
__ioa0 ; overlay symbol ;000104
IOA0 .equ 0x0104
__ioal0 .res.b 1 ;000104
IOAL0 .equ 0x0104
__ioah0 .res.b 1 ;000105
IOAH0 .equ 0x0105
__dct0 ; overlay symbol ;000106
DCT0 .equ 0x0106
__dctl0 .res.b 1 ;000106
DCTL0 .equ 0x0106
__dcth0 .res.b 1 ;000107
DCTH0 .equ 0x0107
__bapl1 .res.b 1 ;000108
BAPL1 .equ 0x0108
__bapm1 .res.b 1 ;000109
BAPM1 .equ 0x0109
__baph1 .res.b 1 ;00010A
BAPH1 .equ 0x010A
__dmacs1 .res.b 1 ;00010B
DMACS1 .equ 0x010B
__ioa1 ; overlay symbol ;00010C
IOA1 .equ 0x010C
__ioal1 .res.b 1 ;00010C
IOAL1 .equ 0x010C
__ioah1 .res.b 1 ;00010D
IOAH1 .equ 0x010D
__dct1 ; overlay symbol ;00010E
DCT1 .equ 0x010E
__dctl1 .res.b 1 ;00010E
DCTL1 .equ 0x010E
__dcth1 .res.b 1 ;00010F
DCTH1 .equ 0x010F
__bapl2 .res.b 1 ;000110
BAPL2 .equ 0x0110
__bapm2 .res.b 1 ;000111
BAPM2 .equ 0x0111
__baph2 .res.b 1 ;000112
BAPH2 .equ 0x0112
__dmacs2 .res.b 1 ;000113
DMACS2 .equ 0x0113
__ioa2 ; overlay symbol ;000114
IOA2 .equ 0x0114
__ioal2 .res.b 1 ;000114
IOAL2 .equ 0x0114
__ioah2 .res.b 1 ;000115
IOAH2 .equ 0x0115
__dct2 ; overlay symbol ;000116
DCT2 .equ 0x0116
__dctl2 .res.b 1 ;000116
DCTL2 .equ 0x0116
__dcth2 .res.b 1 ;000117
DCTH2 .equ 0x0117
__bapl3 .res.b 1 ;000118
BAPL3 .equ 0x0118
__bapm3 .res.b 1 ;000119
BAPM3 .equ 0x0119
__baph3 .res.b 1 ;00011A
BAPH3 .equ 0x011A
__dmacs3 .res.b 1 ;00011B
DMACS3 .equ 0x011B
__ioa3 ; overlay symbol ;00011C
IOA3 .equ 0x011C
__ioal3 .res.b 1 ;00011C
IOAL3 .equ 0x011C
__ioah3 .res.b 1 ;00011D
IOAH3 .equ 0x011D
__dct3 ; overlay symbol ;00011E
DCT3 .equ 0x011E
__dctl3 .res.b 1 ;00011E
DCTL3 .equ 0x011E
__dcth3 .res.b 1 ;00011F
DCTH3 .equ 0x011F
__bapl4 .res.b 1 ;000120
BAPL4 .equ 0x0120
__bapm4 .res.b 1 ;000121
BAPM4 .equ 0x0121
__baph4 .res.b 1 ;000122
BAPH4 .equ 0x0122
__dmacs4 .res.b 1 ;000123
DMACS4 .equ 0x0123
__ioa4 ; overlay symbol ;000124
IOA4 .equ 0x0124
__ioal4 .res.b 1 ;000124
IOAL4 .equ 0x0124
__ioah4 .res.b 1 ;000125
IOAH4 .equ 0x0125
__dct4 ; overlay symbol ;000126
DCT4 .equ 0x0126
__dctl4 .res.b 1 ;000126
DCTL4 .equ 0x0126
__dcth4 .res.b 1 ;000127
DCTH4 .equ 0x0127
__bapl5 .res.b 1 ;000128
BAPL5 .equ 0x0128
__bapm5 .res.b 1 ;000129
BAPM5 .equ 0x0129
__baph5 .res.b 1 ;00012A
BAPH5 .equ 0x012A
__dmacs5 .res.b 1 ;00012B
DMACS5 .equ 0x012B
__ioa5 ; overlay symbol ;00012C
IOA5 .equ 0x012C
__ioal5 .res.b 1 ;00012C
IOAL5 .equ 0x012C
__ioah5 .res.b 1 ;00012D
IOAH5 .equ 0x012D
__dct5 ; overlay symbol ;00012E
DCT5 .equ 0x012E
__dctl5 .res.b 1 ;00012E
DCTL5 .equ 0x012E
__dcth5 .res.b 1 ;00012F
DCTH5 .equ 0x012F
.section IOXTND, DATA, locate=0x380 ;
.GLOBAL __disel0, __disel1, __disel2, __disel3, __disel4, __disel5
.GLOBAL __dsr, __dsrl, __dsrh, __dssr, __dssrl, __dssrh
.GLOBAL __der, __derl, __derh, __icr, __ilr, __idx
.GLOBAL __tbr, __tbrl, __tbrh, __dirr, __nmi, __edsu2
.GLOBAL __romm, __edsu, __pfcs0, __pfcs1, __pfcs2, __pfcs3
.GLOBAL __pfal0, __pfam0, __pfah0, __pfal1, __pfam1, __pfah1
.GLOBAL __pfal2, __pfam2, __pfah2, __pfal3, __pfam3, __pfah3
.GLOBAL __pfal4, __pfam4, __pfah4, __pfal5, __pfam5, __pfah5
.GLOBAL __pfal6, __pfam6, __pfah6, __pfal7, __pfam7, __pfah7
.GLOBAL __pfd0, __pfdl0, __pfdh0, __pfd1, __pfdl1, __pfdh1
.GLOBAL __pfd2, __pfdl2, __pfdh2, __pfd3, __pfdl3, __pfdh3
.GLOBAL __pfd4, __pfdl4, __pfdh4, __pfd5, __pfdl5, __pfdh5
.GLOBAL __pfd6, __pfdl6, __pfdh6, __pfd7, __pfdl7, __pfdh7
.GLOBAL __mfmcs, __mfmtc, __mfmtcl, __mfmtch, __sfmcs, __sfmtc
.GLOBAL __sfmtcl, __sfmtch, __fmwc0, __fmwc1, __fmwc2, __fmwc3
.GLOBAL __fmwc4, __fmwc5, __smcr, __cksr, __ckssr, __ckmr
.GLOBAL __ckfcr, __ckfcrl, __ckfcrh, __pllcr, __pllcrl, __pllcrh
.GLOBAL __rctcr, __mctcr, __rccsrc, __rcr, __rccsr, __wdtc
.GLOBAL __wdtcp, __coar, __cocr0, __cocr1, __cmcr, __cmpr
.GLOBAL __cmprl, __cmprh, __vrcr, __ddr00, __ddr01, __ddr02
.GLOBAL __ddr03, __ddr04, __ddr05, __ddr06, __ddr07, __ddr08
.GLOBAL __ddr09, __ddr10, __pier00, __pier01, __pier02, __pier03
.GLOBAL __pier04, __pier05, __pier06, __pier07, __pier08, __pier09
.GLOBAL __pier10, __pilr00, __pilr01, __pilr02, __pilr03, __pilr04
.GLOBAL __pilr05, __pilr06, __pilr07, __pilr08, __pilr09, __pilr10
.GLOBAL __epilr00, __epilr01, __epilr02, __epilr03, __epilr04, __epilr05
.GLOBAL __epilr06, __epilr07, __epilr08, __epilr09, __epilr10, __podr00
.GLOBAL __podr01, __podr02, __podr03, __podr04, __podr05, __podr06
.GLOBAL __podr07, __podr08, __podr09, __podr10, __phdr08, __phdr09
.GLOBAL __phdr10, __pucr00, __pucr01, __pucr02, __pucr03, __pucr04
.GLOBAL __pucr05, __pucr06, __pucr07, __pucr08, __pucr09, __pucr10
.GLOBAL __epsr00, __epsr01, __epsr02, __epsr03, __epsr04, __epsr05
.GLOBAL __epsr06, __epsr07, __epsr08, __epsr09, __epsr10, __ader0
.GLOBAL __ader1, __ader2, __prrr0, __prrr1, __prrr2, __prrr3
.GLOBAL __prrr4, __prrr5, __prrr6, __prrr7, __prrr8, __prrr9
.GLOBAL __wtbr0, __wtbrl0, __wtbrh0, __wtbr1, __wtsr, __wtmr
.GLOBAL __wthr, __wtcer, __wtcksr, __wtcr, __wtcrl, __wtcrh
.GLOBAL __cucr, __cutd, __cutdl, __cutdh, __cutr, __cutr2
.GLOBAL __cutr2l, __cutr2h, __cutr1, __cutr1l, __cutr1h, __tmisr
.GLOBAL __smr7, __scr7, __tdr7, __rdr7, __ssr7, __eccr7
.GLOBAL __escr7, __bgr7, __bgrl7, __bgrh7, __esir7, __smr8
.GLOBAL __scr8, __tdr8, __rdr8, __ssr8, __eccr8, __escr8
.GLOBAL __bgr8, __bgrl8, __bgrh8, __esir8, __smr9, __scr9
.GLOBAL __tdr9, __rdr9, __ssr9, __eccr9, __escr9, __bgr9
.GLOBAL __bgrl9, __bgrh9, __esir9, __acsr0, __aecsr0, __acsr1
.GLOBAL __aecsr1, __ptmr6, __pcsr6, __pdut6, __pcn6, __pcnl6
.GLOBAL __pcnh6, __ptmr7, __pcsr7, __pdut7, __pcn7, __pcnl7
.GLOBAL __pcnh7, __gcn12, __gcn1l2, __gcn1h2, __gcn22, __gcn2l2
.GLOBAL __gcn2h2, __ptmr8, __pcsr8, __pdut8, __pcn8, __pcnl8
.GLOBAL __pcnh8, __ptmr9, __pcsr9, __pdut9, __pcn9, __pcnl9
.GLOBAL __pcnh9, __ptmr10, __pcsr10, __pdut10, __pcn10, __pcnl10
.GLOBAL __pcnh10, __ptmr11, __pcsr11, __pdut11, __pcn11, __pcnl11
.GLOBAL __pcnh11, __gcn13, __gcn1l3, __gcn1h3, __gcn23, __gcn2l3
.GLOBAL __gcn2h3, __ptmr12, __pcsr12, __pdut12, __pcn12, __pcnl12
.GLOBAL __pcnh12, __ptmr13, __pcsr13, __pdut13, __pcn13, __pcnl13
.GLOBAL __pcnh13, __ptmr14, __pcsr14, __pdut14, __pcn14, __pcnl14
.GLOBAL __pcnh14, __ptmr15, __pcsr15, __pdut15, __pcn15, __pcnl15
.GLOBAL __pcnh15, __prrr10, __prrr11, __prrr12, __prrr13, __eac0
.GLOBAL __eacl0, __each0, __eac1, __eacl1, __each1, __eac2
.GLOBAL __eacl2, __each2, __eac3, __eacl3, __each3, __eac4
.GLOBAL __eacl4, __each4, __eac5, __eacl5, __each5, __eas2
.GLOBAL __eas3, __eas4, __eas5, __ebm, __ebcf, __ebae0
.GLOBAL __ebae1, __ebae2, __ebcs, __ctrlr0, __ctrlrl0, __ctrlrh0
.GLOBAL __statr0, __statrl0, __statrh0, __errcnt0, __errcntl0, __errcnth0
.GLOBAL __btr0, __btrl0, __btrh0, __intr0, __intrl0, __intrh0
.GLOBAL __testr0, __testrl0, __testrh0, __brper0, __brperl0, __brperh0
.GLOBAL __if1creq0, __if1creql0, __if1creqh0, __if1cmsk0, __if1cmskl0, __if1cmskh0
.GLOBAL __if1msk0, __if1msk10, __if1msk1l0, __if1msk1h0, __if1msk20, __if1msk2l0
.GLOBAL __if1msk2h0, __if1arb0, __if1arb10, __if1arb1l0, __if1arb1h0, __if1arb20
.GLOBAL __if1arb2l0, __if1arb2h0, __if1mctr0, __if1mctrl0, __if1mctrh0, __if1dta0
.GLOBAL __if1dta10, __if1dta1l0, __if1dta1h0, __if1dta20, __if1dta2l0, __if1dta2h0
.GLOBAL __if1dtb0, __if1dtb10, __if1dtb1l0, __if1dtb1h0, __if1dtb20, __if1dtb2l0
.GLOBAL __if1dtb2h0, __if2creq0, __if2creql0, __if2creqh0, __if2cmsk0, __if2cmskl0
.GLOBAL __if2cmskh0, __if2msk0, __if2msk10, __if2msk1l0, __if2msk1h0, __if2msk20
.GLOBAL __if2msk2l0, __if2msk2h0, __if2arb0, __if2arb10, __if2arb1l0, __if2arb1h0
.GLOBAL __if2arb20, __if2arb2l0, __if2arb2h0, __if2mctr0, __if2mctrl0, __if2mctrh0
.GLOBAL __if2dta0, __if2dta10, __if2dta1l0, __if2dta1h0, __if2dta20, __if2dta2l0
.GLOBAL __if2dta2h0, __if2dtb0, __if2dtb10, __if2dtb1l0, __if2dtb1h0, __if2dtb20
.GLOBAL __if2dtb2l0, __if2dtb2h0, __treqr0, __treqr10, __treqr1l0, __treqr1h0
.GLOBAL __treqr20, __treqr2l0, __treqr2h0, __newdt0, __newdt10, __newdt1l0
.GLOBAL __newdt1h0, __newdt20, __newdt2l0, __newdt2h0, __intpnd0, __intpnd10
.GLOBAL __intpnd1l0, __intpnd1h0, __intpnd20, __intpnd2l0, __intpnd2h0, __msgval0
.GLOBAL __msgval10, __msgval1l0, __msgval1h0, __msgval20, __msgval2l0, __msgval2h0
.GLOBAL __coer0, __ctrlr1, __ctrlrl1, __ctrlrh1, __statr1, __statrl1
.GLOBAL __statrh1, __errcnt1, __errcntl1, __errcnth1, __btr1, __btrl1
.GLOBAL __btrh1, __intr1, __intrl1, __intrh1, __testr1, __testrl1
.GLOBAL __testrh1, __brper1, __brperl1, __brperh1, __if1creq1, __if1creql1
.GLOBAL __if1creqh1, __if1cmsk1, __if1cmskl1, __if1cmskh1, __if1msk1, __if1msk11
.GLOBAL __if1msk1l1, __if1msk1h1, __if1msk21, __if1msk2l1, __if1msk2h1, __if1arb1
.GLOBAL __if1arb11, __if1arb1l1, __if1arb1h1, __if1arb21, __if1arb2l1, __if1arb2h1
.GLOBAL __if1mctr1, __if1mctrl1, __if1mctrh1, __if1dta1, __if1dta11, __if1dta1l1
.GLOBAL __if1dta1h1, __if1dta21, __if1dta2l1, __if1dta2h1, __if1dtb1, __if1dtb11
.GLOBAL __if1dtb1l1, __if1dtb1h1, __if1dtb21, __if1dtb2l1, __if1dtb2h1, __if2creq1
.GLOBAL __if2creql1, __if2creqh1, __if2cmsk1, __if2cmskl1, __if2cmskh1, __if2msk1
.GLOBAL __if2msk11, __if2msk1l1, __if2msk1h1, __if2msk21, __if2msk2l1, __if2msk2h1
.GLOBAL __if2arb1, __if2arb11, __if2arb1l1, __if2arb1h1, __if2arb21, __if2arb2l1
.GLOBAL __if2arb2h1, __if2mctr1, __if2mctrl1, __if2mctrh1, __if2dta1, __if2dta11
.GLOBAL __if2dta1l1, __if2dta1h1, __if2dta21, __if2dta2l1, __if2dta2h1, __if2dtb1
.GLOBAL __if2dtb11, __if2dtb1l1, __if2dtb1h1, __if2dtb21, __if2dtb2l1, __if2dtb2h1
.GLOBAL __treqr1, __treqr11, __treqr1l1, __treqr1h1, __treqr21, __treqr2l1
.GLOBAL __treqr2h1, __newdt1, __newdt11, __newdt1l1, __newdt1h1, __newdt21
.GLOBAL __newdt2l1, __newdt2h1, __intpnd1, __intpnd11, __intpnd1l1, __intpnd1h1
.GLOBAL __intpnd21, __intpnd2l1, __intpnd2h1, __msgval1, __msgval11, __msgval1l1
.GLOBAL __msgval1h1, __msgval21, __msgval2l1, __msgval2h1, __coer1
__disel0 .res.b 1 ;000380
DISEL0 .equ 0x0380
__disel1 .res.b 1 ;000381
DISEL1 .equ 0x0381
__disel2 .res.b 1 ;000382
DISEL2 .equ 0x0382
__disel3 .res.b 1 ;000383
DISEL3 .equ 0x0383
__disel4 .res.b 1 ;000384
DISEL4 .equ 0x0384
__disel5 .res.b 1 ;000385
DISEL5 .equ 0x0385
.org 0x000390
__dsr ; overlay symbol ;000390
DSR .equ 0x0390
__dsrl .res.b 1 ;000390
DSRL .equ 0x0390
__dsrh .res.b 1 ;000391
DSRH .equ 0x0391
__dssr ; overlay symbol ;000392
DSSR .equ 0x0392
__dssrl .res.b 1 ;000392
DSSRL .equ 0x0392
__dssrh .res.b 1 ;000393
DSSRH .equ 0x0393
__der ; overlay symbol ;000394
DER .equ 0x0394
__derl .res.b 1 ;000394
DERL .equ 0x0394
__derh .res.b 1 ;000395
DERH .equ 0x0395
.org 0x0003a0
__icr ; overlay symbol ;0003A0
ICR .equ 0x03A0
__ilr .res.b 1 ;0003A0
ILR .equ 0x03A0
__idx .res.b 1 ;0003A1
IDX .equ 0x03A1
__tbr ; overlay symbol ;0003A2
TBR .equ 0x03A2
__tbrl .res.b 1 ;0003A2
TBRL .equ 0x03A2
__tbrh .res.b 1 ;0003A3
TBRH .equ 0x03A3
__dirr .res.b 1 ;0003A4
DIRR .equ 0x03A4
__nmi .res.b 1 ;0003A5
NMI .equ 0x03A5
.org 0x0003ac
__edsu2 .res.b 2 ;0003AC
EDSU2 .equ 0x03AC
__romm .res.b 1 ;0003AE
ROMM .equ 0x03AE
__edsu .res.b 1 ;0003AF
EDSU .equ 0x03AF
__pfcs0 .res.b 2 ;0003B0
PFCS0 .equ 0x03B0
__pfcs1 .res.b 2 ;0003B2
PFCS1 .equ 0x03B2
__pfcs2 .res.b 2 ;0003B4
PFCS2 .equ 0x03B4
__pfcs3 .res.b 2 ;0003B6
PFCS3 .equ 0x03B6
__pfal0 .res.b 1 ;0003B8
PFAL0 .equ 0x03B8
__pfam0 .res.b 1 ;0003B9
PFAM0 .equ 0x03B9
__pfah0 .res.b 1 ;0003BA
PFAH0 .equ 0x03BA
__pfal1 .res.b 1 ;0003BB
PFAL1 .equ 0x03BB
__pfam1 .res.b 1 ;0003BC
PFAM1 .equ 0x03BC
__pfah1 .res.b 1 ;0003BD
PFAH1 .equ 0x03BD
__pfal2 .res.b 1 ;0003BE
PFAL2 .equ 0x03BE
__pfam2 .res.b 1 ;0003BF
PFAM2 .equ 0x03BF
__pfah2 .res.b 1 ;0003C0
PFAH2 .equ 0x03C0
__pfal3 .res.b 1 ;0003C1
PFAL3 .equ 0x03C1
__pfam3 .res.b 1 ;0003C2
PFAM3 .equ 0x03C2
__pfah3 .res.b 1 ;0003C3
PFAH3 .equ 0x03C3
__pfal4 .res.b 1 ;0003C4
PFAL4 .equ 0x03C4
__pfam4 .res.b 1 ;0003C5
PFAM4 .equ 0x03C5
__pfah4 .res.b 1 ;0003C6
PFAH4 .equ 0x03C6
__pfal5 .res.b 1 ;0003C7
PFAL5 .equ 0x03C7
__pfam5 .res.b 1 ;0003C8
PFAM5 .equ 0x03C8
__pfah5 .res.b 1 ;0003C9
PFAH5 .equ 0x03C9
__pfal6 .res.b 1 ;0003CA
PFAL6 .equ 0x03CA
__pfam6 .res.b 1 ;0003CB
PFAM6 .equ 0x03CB
__pfah6 .res.b 1 ;0003CC
PFAH6 .equ 0x03CC
__pfal7 .res.b 1 ;0003CD
PFAL7 .equ 0x03CD
__pfam7 .res.b 1 ;0003CE
PFAM7 .equ 0x03CE
__pfah7 .res.b 1 ;0003CF
PFAH7 .equ 0x03CF
__pfd0 ; overlay symbol ;0003D0
PFD0 .equ 0x03D0
__pfdl0 .res.b 1 ;0003D0
PFDL0 .equ 0x03D0
__pfdh0 .res.b 1 ;0003D1
PFDH0 .equ 0x03D1
__pfd1 ; overlay symbol ;0003D2
PFD1 .equ 0x03D2
__pfdl1 .res.b 1 ;0003D2
PFDL1 .equ 0x03D2
__pfdh1 .res.b 1 ;0003D3
PFDH1 .equ 0x03D3
__pfd2 ; overlay symbol ;0003D4
PFD2 .equ 0x03D4
__pfdl2 .res.b 1 ;0003D4
PFDL2 .equ 0x03D4
__pfdh2 .res.b 1 ;0003D5
PFDH2 .equ 0x03D5
__pfd3 ; overlay symbol ;0003D6
PFD3 .equ 0x03D6
__pfdl3 .res.b 1 ;0003D6
PFDL3 .equ 0x03D6
__pfdh3 .res.b 1 ;0003D7
PFDH3 .equ 0x03D7
__pfd4 ; overlay symbol ;0003D8
PFD4 .equ 0x03D8
__pfdl4 .res.b 1 ;0003D8
PFDL4 .equ 0x03D8
__pfdh4 .res.b 1 ;0003D9
PFDH4 .equ 0x03D9
__pfd5 ; overlay symbol ;0003DA
PFD5 .equ 0x03DA
__pfdl5 .res.b 1 ;0003DA
PFDL5 .equ 0x03DA
__pfdh5 .res.b 1 ;0003DB
PFDH5 .equ 0x03DB
__pfd6 ; overlay symbol ;0003DC
PFD6 .equ 0x03DC
__pfdl6 .res.b 1 ;0003DC
PFDL6 .equ 0x03DC
__pfdh6 .res.b 1 ;0003DD
PFDH6 .equ 0x03DD
__pfd7 ; overlay symbol ;0003DE
PFD7 .equ 0x03DE
__pfdl7 .res.b 1 ;0003DE
PFDL7 .equ 0x03DE
__pfdh7 .res.b 1 ;0003DF
PFDH7 .equ 0x03DF
.org 0x0003f1
__mfmcs .res.b 1 ;0003F1
MFMCS .equ 0x03F1
__mfmtc ; overlay symbol ;0003F2
MFMTC .equ 0x03F2
__mfmtcl .res.b 1 ;0003F2
MFMTCL .equ 0x03F2
__mfmtch .res.b 1 ;0003F3
MFMTCH .equ 0x03F3
.org 0x0003f5
__sfmcs .res.b 1 ;0003F5
SFMCS .equ 0x03F5
__sfmtc ; overlay symbol ;0003F6
SFMTC .equ 0x03F6
__sfmtcl .res.b 1 ;0003F6
SFMTCL .equ 0x03F6
__sfmtch .res.b 1 ;0003F7
SFMTCH .equ 0x03F7
__fmwc0 .res.b 1 ;0003F8
FMWC0 .equ 0x03F8
__fmwc1 .res.b 1 ;0003F9
FMWC1 .equ 0x03F9
__fmwc2 .res.b 1 ;0003FA
FMWC2 .equ 0x03FA
__fmwc3 .res.b 1 ;0003FB
FMWC3 .equ 0x03FB
__fmwc4 .res.b 1 ;0003FC
FMWC4 .equ 0x03FC
__fmwc5 .res.b 1 ;0003FD
FMWC5 .equ 0x03FD
.org 0x000400
__smcr .res.b 1 ;000400
SMCR .equ 0x0400
__cksr .res.b 1 ;000401
CKSR .equ 0x0401
__ckssr .res.b 1 ;000402
CKSSR .equ 0x0402
__ckmr .res.b 1 ;000403
CKMR .equ 0x0403
__ckfcr ; overlay symbol ;000404
CKFCR .equ 0x0404
__ckfcrl .res.b 1 ;000404
CKFCRL .equ 0x0404
__ckfcrh .res.b 1 ;000405
CKFCRH .equ 0x0405
__pllcr ; overlay symbol ;000406
PLLCR .equ 0x0406
__pllcrl .res.b 1 ;000406
PLLCRL .equ 0x0406
__pllcrh .res.b 1 ;000407
PLLCRH .equ 0x0407
__rctcr .res.b 1 ;000408
RCTCR .equ 0x0408
__mctcr .res.b 1 ;000409
MCTCR .equ 0x0409
.org 0x00040b
__rccsrc .res.b 1 ;00040B
RCCSRC .equ 0x040B
__rcr .res.b 1 ;00040C
RCR .equ 0x040C
__rccsr .res.b 1 ;00040D
RCCSR .equ 0x040D
__wdtc .res.b 1 ;00040E
WDTC .equ 0x040E
__wdtcp .res.b 1 ;00040F
WDTCP .equ 0x040F
.org 0x000415
__coar .res.b 1 ;000415
COAR .equ 0x0415
__cocr0 .res.b 1 ;000416
COCR0 .equ 0x0416
__cocr1 .res.b 1 ;000417
COCR1 .equ 0x0417
__cmcr .res.b 1 ;000418
CMCR .equ 0x0418
.org 0x00041a
__cmpr ; overlay symbol ;00041A
CMPR .equ 0x041A
__cmprl .res.b 1 ;00041A
CMPRL .equ 0x041A
__cmprh .res.b 1 ;00041B
CMPRH .equ 0x041B
.org 0x00042c
__vrcr .res.b 1 ;00042C
VRCR .equ 0x042C
.org 0x000430
__ddr00 .res.b 1 ;000430
DDR00 .equ 0x0430
__ddr01 .res.b 1 ;000431
DDR01 .equ 0x0431
__ddr02 .res.b 1 ;000432
DDR02 .equ 0x0432
__ddr03 .res.b 1 ;000433
DDR03 .equ 0x0433
__ddr04 .res.b 1 ;000434
DDR04 .equ 0x0434
__ddr05 .res.b 1 ;000435
DDR05 .equ 0x0435
__ddr06 .res.b 1 ;000436
DDR06 .equ 0x0436
__ddr07 .res.b 1 ;000437
DDR07 .equ 0x0437
__ddr08 .res.b 1 ;000438
DDR08 .equ 0x0438
__ddr09 .res.b 1 ;000439
DDR09 .equ 0x0439
__ddr10 .res.b 1 ;00043A
DDR10 .equ 0x043A
.org 0x000444
__pier00 .res.b 1 ;000444
PIER00 .equ 0x0444
__pier01 .res.b 1 ;000445
PIER01 .equ 0x0445
__pier02 .res.b 1 ;000446
PIER02 .equ 0x0446
__pier03 .res.b 1 ;000447
PIER03 .equ 0x0447
__pier04 .res.b 1 ;000448
PIER04 .equ 0x0448
__pier05 .res.b 1 ;000449
PIER05 .equ 0x0449
__pier06 .res.b 1 ;00044A
PIER06 .equ 0x044A
__pier07 .res.b 1 ;00044B
PIER07 .equ 0x044B
__pier08 .res.b 1 ;00044C
PIER08 .equ 0x044C
__pier09 .res.b 1 ;00044D
PIER09 .equ 0x044D
__pier10 .res.b 1 ;00044E
PIER10 .equ 0x044E
.org 0x000458
__pilr00 .res.b 1 ;000458
PILR00 .equ 0x0458
__pilr01 .res.b 1 ;000459
PILR01 .equ 0x0459
__pilr02 .res.b 1 ;00045A
PILR02 .equ 0x045A
__pilr03 .res.b 1 ;00045B
PILR03 .equ 0x045B
__pilr04 .res.b 1 ;00045C
PILR04 .equ 0x045C
__pilr05 .res.b 1 ;00045D
PILR05 .equ 0x045D
__pilr06 .res.b 1 ;00045E
PILR06 .equ 0x045E
__pilr07 .res.b 1 ;00045F
PILR07 .equ 0x045F
__pilr08 .res.b 1 ;000460
PILR08 .equ 0x0460
__pilr09 .res.b 1 ;000461
PILR09 .equ 0x0461
__pilr10 .res.b 1 ;000462
PILR10 .equ 0x0462
.org 0x00046C
__epilr00 .res.b 1 ;00046C
EPILR00 .equ 0x046C
__epilr01 .res.b 1 ;00046D
EPILR01 .equ 0x046D
__epilr02 .res.b 1 ;00046E
EPILR02 .equ 0x046E
__epilr03 .res.b 1 ;00046F
EPILR03 .equ 0x046F
__epilr04 .res.b 1 ;000470
EPILR04 .equ 0x0470
__epilr05 .res.b 1 ;000471
EPILR05 .equ 0x0471
__epilr06 .res.b 1 ;000472
EPILR06 .equ 0x0472
__epilr07 .res.b 1 ;000473
EPILR07 .equ 0x0473
__epilr08 .res.b 1 ;000474
EPILR08 .equ 0x0474
__epilr09 .res.b 1 ;000475
EPILR09 .equ 0x0475
__epilr10 .res.b 1 ;000476
EPILR10 .equ 0x0476
.org 0x000480
__podr00 .res.b 1 ;000480
PODR00 .equ 0x0480
__podr01 .res.b 1 ;000481
PODR01 .equ 0x0481
__podr02 .res.b 1 ;000482
PODR02 .equ 0x0482
__podr03 .res.b 1 ;000483
PODR03 .equ 0x0483
__podr04 .res.b 1 ;000484
PODR04 .equ 0x0484
__podr05 .res.b 1 ;000485
PODR05 .equ 0x0485
__podr06 .res.b 1 ;000486
PODR06 .equ 0x0486
__podr07 .res.b 1 ;000487
PODR07 .equ 0x0487
__podr08 .res.b 1 ;000488
PODR08 .equ 0x0488
__podr09 .res.b 1 ;000489
PODR09 .equ 0x0489
__podr10 .res.b 1 ;00048A
PODR10 .equ 0x048A
.org 0x00049C
__phdr08 .res.b 1 ;00049C
PHDR08 .equ 0x049C
__phdr09 .res.b 1 ;00049D
PHDR09 .equ 0x049D
__phdr10 .res.b 1 ;00049E
PHDR10 .equ 0x049E
.org 0x0004A8
__pucr00 .res.b 1 ;0004A8
PUCR00 .equ 0x04A8
__pucr01 .res.b 1 ;0004A9
PUCR01 .equ 0x04A9
__pucr02 .res.b 1 ;0004AA
PUCR02 .equ 0x04AA
__pucr03 .res.b 1 ;0004AB
PUCR03 .equ 0x04AB
__pucr04 .res.b 1 ;0004AC
PUCR04 .equ 0x04AC
__pucr05 .res.b 1 ;0004AD
PUCR05 .equ 0x04AD
__pucr06 .res.b 1 ;0004AE
PUCR06 .equ 0x04AE
__pucr07 .res.b 1 ;0004AF
PUCR07 .equ 0x04AF
__pucr08 .res.b 1 ;0004B0
PUCR08 .equ 0x04B0
__pucr09 .res.b 1 ;0004B1
PUCR09 .equ 0x04B1
__pucr10 .res.b 1 ;0004B2
PUCR10 .equ 0x04B2
.org 0x0004BC
__epsr00 .res.b 1 ;0004BC
EPSR00 .equ 0x04BC
__epsr01 .res.b 1 ;0004BD
EPSR01 .equ 0x04BD
__epsr02 .res.b 1 ;0004BE
EPSR02 .equ 0x04BE
__epsr03 .res.b 1 ;0004BF
EPSR03 .equ 0x04BF
__epsr04 .res.b 1 ;0004C0
EPSR04 .equ 0x04C0
__epsr05 .res.b 1 ;0004C1
EPSR05 .equ 0x04C1
__epsr06 .res.b 1 ;0004C2
EPSR06 .equ 0x04C2
__epsr07 .res.b 1 ;0004C3
EPSR07 .equ 0x04C3
__epsr08 .res.b 1 ;0004C4
EPSR08 .equ 0x04C4
__epsr09 .res.b 1 ;0004C5
EPSR09 .equ 0x04C5
__epsr10 .res.b 1 ;0004C6
EPSR10 .equ 0x04C6
.org 0x0004d0
__ader0 .res.b 1 ;0004D0
ADER0 .equ 0x04D0
__ader1 .res.b 1 ;0004D1
ADER1 .equ 0x04D1
__ader2 .res.b 1 ;0004D2
ADER2 .equ 0x04D2
.org 0x0004d6
__prrr0 .res.b 1 ;0004D6
PRRR0 .equ 0x04D6
__prrr1 .res.b 1 ;0004D7
PRRR1 .equ 0x04D7
__prrr2 .res.b 1 ;0004D8
PRRR2 .equ 0x04D8
__prrr3 .res.b 1 ;0004D9
PRRR3 .equ 0x04D9
__prrr4 .res.b 1 ;0004DA
PRRR4 .equ 0x04DA
__prrr5 .res.b 1 ;0004DB
PRRR5 .equ 0x04DB
__prrr6 .res.b 1 ;0004DC
PRRR6 .equ 0x04DC
__prrr7 .res.b 1 ;0004DD
PRRR7 .equ 0x04DD
__prrr8 .res.b 1 ;0004DE
PRRR8 .equ 0x04DE
__prrr9 .res.b 1 ;0004DF
PRRR9 .equ 0x04DF
__wtbr0 ; overlay symbol ;0004E0
WTBR0 .equ 0x04E0
__wtbrl0 .res.b 1 ;0004E0
WTBRL0 .equ 0x04E0
__wtbrh0 .res.b 1 ;0004E1
WTBRH0 .equ 0x04E1
__wtbr1 .res.b 1 ;0004E2
WTBR1 .equ 0x04E2
__wtsr .res.b 1 ;0004E3
WTSR .equ 0x04E3
__wtmr .res.b 1 ;0004E4
WTMR .equ 0x04E4
__wthr .res.b 1 ;0004E5
WTHR .equ 0x04E5
__wtcer .res.b 1 ;0004E6
WTCER .equ 0x04E6
__wtcksr .res.b 1 ;0004E7
WTCKSR .equ 0x04E7
__wtcr ; overlay symbol ;0004E8
WTCR .equ 0x04E8
__wtcrl .res.b 1 ;0004E8
WTCRL .equ 0x04E8
__wtcrh .res.b 1 ;0004E9
WTCRH .equ 0x04E9
__cucr .res.b 1 ;0004EA
CUCR .equ 0x04EA
.org 0x0004ec
__cutd ; overlay symbol ;0004EC
CUTD .equ 0x04EC
__cutdl .res.b 1 ;0004EC
CUTDL .equ 0x04EC
__cutdh .res.b 1 ;0004ED
CUTDH .equ 0x04ED
__cutr ; overlay symbol ;0004EE
CUTR .equ 0x04EE
__cutr2 ; overlay symbol ;0004EE
CUTR2 .equ 0x04EE
__cutr2l .res.b 1 ;0004EE
CUTR2L .equ 0x04EE
__cutr2h .res.b 1 ;0004EF
CUTR2H .equ 0x04EF
__cutr1 ; overlay symbol ;0004F0
CUTR1 .equ 0x04F0
__cutr1l .res.b 1 ;0004F0
CUTR1L .equ 0x04F0
__cutr1h .res.b 1 ;0004F1
CUTR1H .equ 0x04F1
.org 0x0004fa
__tmisr .res.b 1 ;0004FA
TMISR .equ 0x04FA
.org 0x00053e
__smr7 .res.b 1 ;00053E
SMR7 .equ 0x053E
__scr7 .res.b 1 ;00053F
SCR7 .equ 0x053F
__tdr7 ; overlay symbol ;000540
TDR7 .equ 0x0540
__rdr7 .res.b 1 ;000540
RDR7 .equ 0x0540
__ssr7 .res.b 1 ;000541
SSR7 .equ 0x0541
__eccr7 .res.b 1 ;000542
ECCR7 .equ 0x0542
__escr7 .res.b 1 ;000543
ESCR7 .equ 0x0543
__bgr7 ; overlay symbol ;000544
BGR7 .equ 0x0544
__bgrl7 .res.b 1 ;000544
BGRL7 .equ 0x0544
__bgrh7 .res.b 1 ;000545
BGRH7 .equ 0x0545
__esir7 .res.b 1 ;000546
ESIR7 .equ 0x0546
.org 0x000548
__smr8 .res.b 1 ;000548
SMR8 .equ 0x0548
__scr8 .res.b 1 ;000549
SCR8 .equ 0x0549
__tdr8 ; overlay symbol ;00054A
TDR8 .equ 0x054A
__rdr8 .res.b 1 ;00054A
RDR8 .equ 0x054A
__ssr8 .res.b 1 ;00054B
SSR8 .equ 0x054B
__eccr8 .res.b 1 ;00054C
ECCR8 .equ 0x054C
__escr8 .res.b 1 ;00054D
ESCR8 .equ 0x054D
__bgr8 ; overlay symbol ;00054E
BGR8 .equ 0x054E
__bgrl8 .res.b 1 ;00054E
BGRL8 .equ 0x054E
__bgrh8 .res.b 1 ;00054F
BGRH8 .equ 0x054F
__esir8 .res.b 1 ;000550
ESIR8 .equ 0x0550
.org 0x000552
__smr9 .res.b 1 ;000552
SMR9 .equ 0x0552
__scr9 .res.b 1 ;000553
SCR9 .equ 0x0553
__tdr9 ; overlay symbol ;000554
TDR9 .equ 0x0554
__rdr9 .res.b 1 ;000554
RDR9 .equ 0x0554
__ssr9 .res.b 1 ;000555
SSR9 .equ 0x0555
__eccr9 .res.b 1 ;000556
ECCR9 .equ 0x0556
__escr9 .res.b 1 ;000557
ESCR9 .equ 0x0557
__bgr9 ; overlay symbol ;000558
BGR9 .equ 0x0558
__bgrl9 .res.b 1 ;000558
BGRL9 .equ 0x0558
__bgrh9 .res.b 1 ;000559
BGRH9 .equ 0x0559
__esir9 .res.b 1 ;00055A
ESIR9 .equ 0x055A
.org 0x000560
__acsr0 .res.b 1 ;000560
ACSR0 .equ 0x0560
__aecsr0 .res.b 1 ;000561
AECSR0 .equ 0x0561
__acsr1 .res.b 1 ;000562
ACSR1 .equ 0x0562
__aecsr1 .res.b 1 ;000563
AECSR1 .equ 0x0563
__ptmr6 .res.b 2 ;000564
PTMR6 .equ 0x0564
__pcsr6 .res.b 2 ;000566
PCSR6 .equ 0x0566
__pdut6 .res.b 2 ;000568
PDUT6 .equ 0x0568
__pcn6 ; overlay symbol ;00056A
PCN6 .equ 0x056A
__pcnl6 .res.b 1 ;00056A
PCNL6 .equ 0x056A
__pcnh6 .res.b 1 ;00056B
PCNH6 .equ 0x056B
__ptmr7 .res.b 2 ;00056C
PTMR7 .equ 0x056C
__pcsr7 .res.b 2 ;00056E
PCSR7 .equ 0x056E
__pdut7 .res.b 2 ;000570
PDUT7 .equ 0x0570
__pcn7 ; overlay symbol ;000572
PCN7 .equ 0x0572
__pcnl7 .res.b 1 ;000572
PCNL7 .equ 0x0572
__pcnh7 .res.b 1 ;000573
PCNH7 .equ 0x0573
__gcn12 ; overlay symbol ;000574
GCN12 .equ 0x0574
__gcn1l2 .res.b 1 ;000574
GCN1L2 .equ 0x0574
__gcn1h2 .res.b 1 ;000575
GCN1H2 .equ 0x0575
__gcn22 ; overlay symbol ;000576
GCN22 .equ 0x0576
__gcn2l2 .res.b 1 ;000576
GCN2L2 .equ 0x0576
__gcn2h2 .res.b 1 ;000577
GCN2H2 .equ 0x0577
__ptmr8 .res.b 2 ;000578
PTMR8 .equ 0x0578
__pcsr8 .res.b 2 ;00057A
PCSR8 .equ 0x057A
__pdut8 .res.b 2 ;00057C
PDUT8 .equ 0x057C
__pcn8 ; overlay symbol ;00057E
PCN8 .equ 0x057E
__pcnl8 .res.b 1 ;00057E
PCNL8 .equ 0x057E
__pcnh8 .res.b 1 ;00057F
PCNH8 .equ 0x057F
__ptmr9 .res.b 2 ;000580
PTMR9 .equ 0x0580
__pcsr9 .res.b 2 ;000582
PCSR9 .equ 0x0582
__pdut9 .res.b 2 ;000584
PDUT9 .equ 0x0584
__pcn9 ; overlay symbol ;000586
PCN9 .equ 0x0586
__pcnl9 .res.b 1 ;000586
PCNL9 .equ 0x0586
__pcnh9 .res.b 1 ;000587
PCNH9 .equ 0x0587
__ptmr10 .res.b 2 ;000588
PTMR10 .equ 0x0588
__pcsr10 .res.b 2 ;00058A
PCSR10 .equ 0x058A
__pdut10 .res.b 2 ;00058C
PDUT10 .equ 0x058C
__pcn10 ; overlay symbol ;00058E
PCN10 .equ 0x058E
__pcnl10 .res.b 1 ;00058E
PCNL10 .equ 0x058E
__pcnh10 .res.b 1 ;00058F
PCNH10 .equ 0x058F
__ptmr11 .res.b 2 ;000590
PTMR11 .equ 0x0590
__pcsr11 .res.b 2 ;000592
PCSR11 .equ 0x0592
__pdut11 .res.b 2 ;000594
PDUT11 .equ 0x0594
__pcn11 ; overlay symbol ;000596
PCN11 .equ 0x0596
__pcnl11 .res.b 1 ;000596
PCNL11 .equ 0x0596
__pcnh11 .res.b 1 ;000597
PCNH11 .equ 0x0597
__gcn13 ; overlay symbol ;000598
GCN13 .equ 0x0598
__gcn1l3 .res.b 1 ;000598
GCN1L3 .equ 0x0598
__gcn1h3 .res.b 1 ;000599
GCN1H3 .equ 0x0599
__gcn23 ; overlay symbol ;00059A
GCN23 .equ 0x059A
__gcn2l3 .res.b 1 ;00059A
GCN2L3 .equ 0x059A
__gcn2h3 .res.b 1 ;00059B
GCN2H3 .equ 0x059B
__ptmr12 .res.b 2 ;00059C
PTMR12 .equ 0x059C
__pcsr12 .res.b 2 ;00059E
PCSR12 .equ 0x059E
__pdut12 .res.b 2 ;0005A0
PDUT12 .equ 0x05A0
__pcn12 ; overlay symbol ;0005A2
PCN12 .equ 0x05A2
__pcnl12 .res.b 1 ;0005A2
PCNL12 .equ 0x05A2
__pcnh12 .res.b 1 ;0005A3
PCNH12 .equ 0x05A3
__ptmr13 .res.b 2 ;0005A4
PTMR13 .equ 0x05A4
__pcsr13 .res.b 2 ;0005A6
PCSR13 .equ 0x05A6
__pdut13 .res.b 2 ;0005A8
PDUT13 .equ 0x05A8
__pcn13 ; overlay symbol ;0005AA
PCN13 .equ 0x05AA
__pcnl13 .res.b 1 ;0005AA
PCNL13 .equ 0x05AA
__pcnh13 .res.b 1 ;0005AB
PCNH13 .equ 0x05AB
__ptmr14 .res.b 2 ;0005AC
PTMR14 .equ 0x05AC
__pcsr14 .res.b 2 ;0005AE
PCSR14 .equ 0x05AE
__pdut14 .res.b 2 ;0005B0
PDUT14 .equ 0x05B0
__pcn14 ; overlay symbol ;0005B2
PCN14 .equ 0x05B2
__pcnl14 .res.b 1 ;0005B2
PCNL14 .equ 0x05B2
__pcnh14 .res.b 1 ;0005B3
PCNH14 .equ 0x05B3
__ptmr15 .res.b 2 ;0005B4
PTMR15 .equ 0x05B4
__pcsr15 .res.b 2 ;0005B6
PCSR15 .equ 0x05B6
__pdut15 .res.b 2 ;0005B8
PDUT15 .equ 0x05B8
__pcn15 ; overlay symbol ;0005BA
PCN15 .equ 0x05BA
__pcnl15 .res.b 1 ;0005BA
PCNL15 .equ 0x05BA
__pcnh15 .res.b 1 ;0005BB
PCNH15 .equ 0x05BB
.org 0x000660
__prrr10 .res.b 1 ;000660
PRRR10 .equ 0x0660
__prrr11 .res.b 1 ;000661
PRRR11 .equ 0x0661
__prrr12 .res.b 1 ;000662
PRRR12 .equ 0x0662
__prrr13 .res.b 1 ;000663
PRRR13 .equ 0x0663
.org 0x0006e0
__eac0 ; overlay symbol ;0006E0
EAC0 .equ 0x06E0
__eacl0 .res.b 1 ;0006E0
EACL0 .equ 0x06E0
__each0 .res.b 1 ;0006E1
EACH0 .equ 0x06E1
__eac1 ; overlay symbol ;0006E2
EAC1 .equ 0x06E2
__eacl1 .res.b 1 ;0006E2
EACL1 .equ 0x06E2
__each1 .res.b 1 ;0006E3
EACH1 .equ 0x06E3
__eac2 ; overlay symbol ;0006E4
EAC2 .equ 0x06E4
__eacl2 .res.b 1 ;0006E4
EACL2 .equ 0x06E4
__each2 .res.b 1 ;0006E5
EACH2 .equ 0x06E5
__eac3 ; overlay symbol ;0006E6
EAC3 .equ 0x06E6
__eacl3 .res.b 1 ;0006E6
EACL3 .equ 0x06E6
__each3 .res.b 1 ;0006E7
EACH3 .equ 0x06E7
__eac4 ; overlay symbol ;0006E8
EAC4 .equ 0x06E8
__eacl4 .res.b 1 ;0006E8
EACL4 .equ 0x06E8
__each4 .res.b 1 ;0006E9
EACH4 .equ 0x06E9
__eac5 ; overlay symbol ;0006EA
EAC5 .equ 0x06EA
__eacl5 .res.b 1 ;0006EA
EACL5 .equ 0x06EA
__each5 .res.b 1 ;0006EB
EACH5 .equ 0x06EB
__eas2 .res.b 1 ;0006EC
EAS2 .equ 0x06EC
__eas3 .res.b 1 ;0006ED
EAS3 .equ 0x06ED
__eas4 .res.b 1 ;0006EE
EAS4 .equ 0x06EE
__eas5 .res.b 1 ;0006EF
EAS5 .equ 0x06EF
__ebm .res.b 1 ;0006F0
EBM .equ 0x06F0
__ebcf .res.b 1 ;0006F1
EBCF .equ 0x06F1
__ebae0 .res.b 1 ;0006F2
EBAE0 .equ 0x06F2
__ebae1 .res.b 1 ;0006F3
EBAE1 .equ 0x06F3
__ebae2 .res.b 1 ;0006F4
EBAE2 .equ 0x06F4
__ebcs .res.b 1 ;0006F5
EBCS .equ 0x06F5
.org 0x000700
__ctrlr0 ; overlay symbol ;000700
CTRLR0 .equ 0x0700
__ctrlrl0 .res.b 1 ;000700
CTRLRL0 .equ 0x0700
__ctrlrh0 .res.b 1 ;000701
CTRLRH0 .equ 0x0701
__statr0 ; overlay symbol ;000702
STATR0 .equ 0x0702
__statrl0 .res.b 1 ;000702
STATRL0 .equ 0x0702
__statrh0 .res.b 1 ;000703
STATRH0 .equ 0x0703
__errcnt0 ; overlay symbol ;000704
ERRCNT0 .equ 0x0704
__errcntl0 .res.b 1 ;000704
ERRCNTL0 .equ 0x0704
__errcnth0 .res.b 1 ;000705
ERRCNTH0 .equ 0x0705
__btr0 ; overlay symbol ;000706
BTR0 .equ 0x0706
__btrl0 .res.b 1 ;000706
BTRL0 .equ 0x0706
__btrh0 .res.b 1 ;000707
BTRH0 .equ 0x0707
__intr0 ; overlay symbol ;000708
INTR0 .equ 0x0708
__intrl0 .res.b 1 ;000708
INTRL0 .equ 0x0708
__intrh0 .res.b 1 ;000709
INTRH0 .equ 0x0709
__testr0 ; overlay symbol ;00070A
TESTR0 .equ 0x070A
__testrl0 .res.b 1 ;00070A
TESTRL0 .equ 0x070A
__testrh0 .res.b 1 ;00070B
TESTRH0 .equ 0x070B
__brper0 ; overlay symbol ;00070C
BRPER0 .equ 0x070C
__brperl0 .res.b 1 ;00070C
BRPERL0 .equ 0x070C
__brperh0 .res.b 1 ;00070D
BRPERH0 .equ 0x070D
.org 0x000710
__if1creq0 ; overlay symbol ;000710
IF1CREQ0 .equ 0x0710
__if1creql0 .res.b 1 ;000710
IF1CREQL0 .equ 0x0710
__if1creqh0 .res.b 1 ;000711
IF1CREQH0 .equ 0x0711
__if1cmsk0 ; overlay symbol ;000712
IF1CMSK0 .equ 0x0712
__if1cmskl0 .res.b 1 ;000712
IF1CMSKL0 .equ 0x0712
__if1cmskh0 .res.b 1 ;000713
IF1CMSKH0 .equ 0x0713
__if1msk0 ; overlay symbol ;000714
IF1MSK0 .equ 0x0714
__if1msk10 ; overlay symbol ;000714
IF1MSK10 .equ 0x0714
__if1msk1l0 .res.b 1 ;000714
IF1MSK1L0 .equ 0x0714
__if1msk1h0 .res.b 1 ;000715
IF1MSK1H0 .equ 0x0715
__if1msk20 ; overlay symbol ;000716
IF1MSK20 .equ 0x0716
__if1msk2l0 .res.b 1 ;000716
IF1MSK2L0 .equ 0x0716
__if1msk2h0 .res.b 1 ;000717
IF1MSK2H0 .equ 0x0717
__if1arb0 ; overlay symbol ;000718
IF1ARB0 .equ 0x0718
__if1arb10 ; overlay symbol ;000718
IF1ARB10 .equ 0x0718
__if1arb1l0 .res.b 1 ;000718
IF1ARB1L0 .equ 0x0718
__if1arb1h0 .res.b 1 ;000719
IF1ARB1H0 .equ 0x0719
__if1arb20 ; overlay symbol ;00071A
IF1ARB20 .equ 0x071A
__if1arb2l0 .res.b 1 ;00071A
IF1ARB2L0 .equ 0x071A
__if1arb2h0 .res.b 1 ;00071B
IF1ARB2H0 .equ 0x071B
__if1mctr0 ; overlay symbol ;00071C
IF1MCTR0 .equ 0x071C
__if1mctrl0 .res.b 1 ;00071C
IF1MCTRL0 .equ 0x071C
__if1mctrh0 .res.b 1 ;00071D
IF1MCTRH0 .equ 0x071D
__if1dta0 ; overlay symbol ;00071E
IF1DTA0 .equ 0x071E
__if1dta10 ; overlay symbol ;00071E
IF1DTA10 .equ 0x071E
__if1dta1l0 .res.b 1 ;00071E
IF1DTA1L0 .equ 0x071E
__if1dta1h0 .res.b 1 ;00071F
IF1DTA1H0 .equ 0x071F
__if1dta20 ; overlay symbol ;000720
IF1DTA20 .equ 0x0720
__if1dta2l0 .res.b 1 ;000720
IF1DTA2L0 .equ 0x0720
__if1dta2h0 .res.b 1 ;000721
IF1DTA2H0 .equ 0x0721
__if1dtb0 ; overlay symbol ;000722
IF1DTB0 .equ 0x0722
__if1dtb10 ; overlay symbol ;000722
IF1DTB10 .equ 0x0722
__if1dtb1l0 .res.b 1 ;000722
IF1DTB1L0 .equ 0x0722
__if1dtb1h0 .res.b 1 ;000723
IF1DTB1H0 .equ 0x0723
__if1dtb20 ; overlay symbol ;000724
IF1DTB20 .equ 0x0724
__if1dtb2l0 .res.b 1 ;000724
IF1DTB2L0 .equ 0x0724
__if1dtb2h0 .res.b 1 ;000725
IF1DTB2H0 .equ 0x0725
.org 0x000740
__if2creq0 ; overlay symbol ;000740
IF2CREQ0 .equ 0x0740
__if2creql0 .res.b 1 ;000740
IF2CREQL0 .equ 0x0740
__if2creqh0 .res.b 1 ;000741
IF2CREQH0 .equ 0x0741
__if2cmsk0 ; overlay symbol ;000742
IF2CMSK0 .equ 0x0742
__if2cmskl0 .res.b 1 ;000742
IF2CMSKL0 .equ 0x0742
__if2cmskh0 .res.b 1 ;000743
IF2CMSKH0 .equ 0x0743
__if2msk0 ; overlay symbol ;000744
IF2MSK0 .equ 0x0744
__if2msk10 ; overlay symbol ;000744
IF2MSK10 .equ 0x0744
__if2msk1l0 .res.b 1 ;000744
IF2MSK1L0 .equ 0x0744
__if2msk1h0 .res.b 1 ;000745
IF2MSK1H0 .equ 0x0745
__if2msk20 ; overlay symbol ;000746
IF2MSK20 .equ 0x0746
__if2msk2l0 .res.b 1 ;000746
IF2MSK2L0 .equ 0x0746
__if2msk2h0 .res.b 1 ;000747
IF2MSK2H0 .equ 0x0747
__if2arb0 ; overlay symbol ;000748
IF2ARB0 .equ 0x0748
__if2arb10 ; overlay symbol ;000748
IF2ARB10 .equ 0x0748
__if2arb1l0 .res.b 1 ;000748
IF2ARB1L0 .equ 0x0748
__if2arb1h0 .res.b 1 ;000749
IF2ARB1H0 .equ 0x0749
__if2arb20 ; overlay symbol ;00074A
IF2ARB20 .equ 0x074A
__if2arb2l0 .res.b 1 ;00074A
IF2ARB2L0 .equ 0x074A
__if2arb2h0 .res.b 1 ;00074B
IF2ARB2H0 .equ 0x074B
__if2mctr0 ; overlay symbol ;00074C
IF2MCTR0 .equ 0x074C
__if2mctrl0 .res.b 1 ;00074C
IF2MCTRL0 .equ 0x074C
__if2mctrh0 .res.b 1 ;00074D
IF2MCTRH0 .equ 0x074D
__if2dta0 ; overlay symbol ;00074E
IF2DTA0 .equ 0x074E
__if2dta10 ; overlay symbol ;00074E
IF2DTA10 .equ 0x074E
__if2dta1l0 .res.b 1 ;00074E
IF2DTA1L0 .equ 0x074E
__if2dta1h0 .res.b 1 ;00074F
IF2DTA1H0 .equ 0x074F
__if2dta20 ; overlay symbol ;000750
IF2DTA20 .equ 0x0750
__if2dta2l0 .res.b 1 ;000750
IF2DTA2L0 .equ 0x0750
__if2dta2h0 .res.b 1 ;000751
IF2DTA2H0 .equ 0x0751
__if2dtb0 ; overlay symbol ;000752
IF2DTB0 .equ 0x0752
__if2dtb10 ; overlay symbol ;000752
IF2DTB10 .equ 0x0752
__if2dtb1l0 .res.b 1 ;000752
IF2DTB1L0 .equ 0x0752
__if2dtb1h0 .res.b 1 ;000753
IF2DTB1H0 .equ 0x0753
__if2dtb20 ; overlay symbol ;000754
IF2DTB20 .equ 0x0754
__if2dtb2l0 .res.b 1 ;000754
IF2DTB2L0 .equ 0x0754
__if2dtb2h0 .res.b 1 ;000755
IF2DTB2H0 .equ 0x0755
.org 0x000780
__treqr0 ; overlay symbol ;000780
TREQR0 .equ 0x0780
__treqr10 ; overlay symbol ;000780
TREQR10 .equ 0x0780
__treqr1l0 .res.b 1 ;000780
TREQR1L0 .equ 0x0780
__treqr1h0 .res.b 1 ;000781
TREQR1H0 .equ 0x0781
__treqr20 ; overlay symbol ;000782
TREQR20 .equ 0x0782
__treqr2l0 .res.b 1 ;000782
TREQR2L0 .equ 0x0782
__treqr2h0 .res.b 1 ;000783
TREQR2H0 .equ 0x0783
.org 0x000790
__newdt0 ; overlay symbol ;000790
NEWDT0 .equ 0x0790
__newdt10 ; overlay symbol ;000790
NEWDT10 .equ 0x0790
__newdt1l0 .res.b 1 ;000790
NEWDT1L0 .equ 0x0790
__newdt1h0 .res.b 1 ;000791
NEWDT1H0 .equ 0x0791
__newdt20 ; overlay symbol ;000792
NEWDT20 .equ 0x0792
__newdt2l0 .res.b 1 ;000792
NEWDT2L0 .equ 0x0792
__newdt2h0 .res.b 1 ;000793
NEWDT2H0 .equ 0x0793
.org 0x0007A0
__intpnd0 ; overlay symbol ;0007A0
INTPND0 .equ 0x07A0
__intpnd10 ; overlay symbol ;0007A0
INTPND10 .equ 0x07A0
__intpnd1l0 .res.b 1 ;0007A0
INTPND1L0 .equ 0x07A0
__intpnd1h0 .res.b 1 ;0007A1
INTPND1H0 .equ 0x07A1
__intpnd20 ; overlay symbol ;0007A2
INTPND20 .equ 0x07A2
__intpnd2l0 .res.b 1 ;0007A2
INTPND2L0 .equ 0x07A2
__intpnd2h0 .res.b 1 ;0007A3
INTPND2H0 .equ 0x07A3
.org 0x0007B0
__msgval0 ; overlay symbol ;0007B0
MSGVAL0 .equ 0x07B0
__msgval10 ; overlay symbol ;0007B0
MSGVAL10 .equ 0x07B0
__msgval1l0 .res.b 1 ;0007B0
MSGVAL1L0 .equ 0x07B0
__msgval1h0 .res.b 1 ;0007B1
MSGVAL1H0 .equ 0x07B1
__msgval20 ; overlay symbol ;0007B2
MSGVAL20 .equ 0x07B2
__msgval2l0 .res.b 1 ;0007B2
MSGVAL2L0 .equ 0x07B2
__msgval2h0 .res.b 1 ;0007B3
MSGVAL2H0 .equ 0x07B3
.org 0x0007CE
__coer0 .res.b 1 ;0007CE
COER0 .equ 0x07CE
.org 0x000800
__ctrlr1 ; overlay symbol ;000800
CTRLR1 .equ 0x0800
__ctrlrl1 .res.b 1 ;000800
CTRLRL1 .equ 0x0800
__ctrlrh1 .res.b 1 ;000801
CTRLRH1 .equ 0x0801
__statr1 ; overlay symbol ;000802
STATR1 .equ 0x0802
__statrl1 .res.b 1 ;000802
STATRL1 .equ 0x0802
__statrh1 .res.b 1 ;000803
STATRH1 .equ 0x0803
__errcnt1 ; overlay symbol ;000804
ERRCNT1 .equ 0x0804
__errcntl1 .res.b 1 ;000804
ERRCNTL1 .equ 0x0804
__errcnth1 .res.b 1 ;000805
ERRCNTH1 .equ 0x0805
__btr1 ; overlay symbol ;000806
BTR1 .equ 0x0806
__btrl1 .res.b 1 ;000806
BTRL1 .equ 0x0806
__btrh1 .res.b 1 ;000807
BTRH1 .equ 0x0807
__intr1 ; overlay symbol ;000808
INTR1 .equ 0x0808
__intrl1 .res.b 1 ;000808
INTRL1 .equ 0x0808
__intrh1 .res.b 1 ;000809
INTRH1 .equ 0x0809
__testr1 ; overlay symbol ;00080A
TESTR1 .equ 0x080A
__testrl1 .res.b 1 ;00080A
TESTRL1 .equ 0x080A
__testrh1 .res.b 1 ;00080B
TESTRH1 .equ 0x080B
__brper1 ; overlay symbol ;00080C
BRPER1 .equ 0x080C
__brperl1 .res.b 1 ;00080C
BRPERL1 .equ 0x080C
__brperh1 .res.b 1 ;00080D
BRPERH1 .equ 0x080D
.org 0x000810
__if1creq1 ; overlay symbol ;000810
IF1CREQ1 .equ 0x0810
__if1creql1 .res.b 1 ;000810
IF1CREQL1 .equ 0x0810
__if1creqh1 .res.b 1 ;000811
IF1CREQH1 .equ 0x0811
__if1cmsk1 ; overlay symbol ;000812
IF1CMSK1 .equ 0x0812
__if1cmskl1 .res.b 1 ;000812
IF1CMSKL1 .equ 0x0812
__if1cmskh1 .res.b 1 ;000813
IF1CMSKH1 .equ 0x0813
__if1msk1 ; overlay symbol ;000814
IF1MSK1 .equ 0x0814
__if1msk11 ; overlay symbol ;000814
IF1MSK11 .equ 0x0814
__if1msk1l1 .res.b 1 ;000814
IF1MSK1L1 .equ 0x0814
__if1msk1h1 .res.b 1 ;000815
IF1MSK1H1 .equ 0x0815
__if1msk21 ; overlay symbol ;000816
IF1MSK21 .equ 0x0816
__if1msk2l1 .res.b 1 ;000816
IF1MSK2L1 .equ 0x0816
__if1msk2h1 .res.b 1 ;000817
IF1MSK2H1 .equ 0x0817
__if1arb1 ; overlay symbol ;000818
IF1ARB1 .equ 0x0818
__if1arb11 ; overlay symbol ;000818
IF1ARB11 .equ 0x0818
__if1arb1l1 .res.b 1 ;000818
IF1ARB1L1 .equ 0x0818
__if1arb1h1 .res.b 1 ;000819
IF1ARB1H1 .equ 0x0819
__if1arb21 ; overlay symbol ;00081A
IF1ARB21 .equ 0x081A
__if1arb2l1 .res.b 1 ;00081A
IF1ARB2L1 .equ 0x081A
__if1arb2h1 .res.b 1 ;00081B
IF1ARB2H1 .equ 0x081B
__if1mctr1 ; overlay symbol ;00081C
IF1MCTR1 .equ 0x081C
__if1mctrl1 .res.b 1 ;00081C
IF1MCTRL1 .equ 0x081C
__if1mctrh1 .res.b 1 ;00081D
IF1MCTRH1 .equ 0x081D
__if1dta1 ; overlay symbol ;00081E
IF1DTA1 .equ 0x081E
__if1dta11 ; overlay symbol ;00081E
IF1DTA11 .equ 0x081E
__if1dta1l1 .res.b 1 ;00081E
IF1DTA1L1 .equ 0x081E
__if1dta1h1 .res.b 1 ;00081F
IF1DTA1H1 .equ 0x081F
__if1dta21 ; overlay symbol ;000820
IF1DTA21 .equ 0x0820
__if1dta2l1 .res.b 1 ;000820
IF1DTA2L1 .equ 0x0820
__if1dta2h1 .res.b 1 ;000821
IF1DTA2H1 .equ 0x0821
__if1dtb1 ; overlay symbol ;000822
IF1DTB1 .equ 0x0822
__if1dtb11 ; overlay symbol ;000822
IF1DTB11 .equ 0x0822
__if1dtb1l1 .res.b 1 ;000822
IF1DTB1L1 .equ 0x0822
__if1dtb1h1 .res.b 1 ;000823
IF1DTB1H1 .equ 0x0823
__if1dtb21 ; overlay symbol ;000824
IF1DTB21 .equ 0x0824
__if1dtb2l1 .res.b 1 ;000824
IF1DTB2L1 .equ 0x0824
__if1dtb2h1 .res.b 1 ;000825
IF1DTB2H1 .equ 0x0825
.org 0x000840
__if2creq1 ; overlay symbol ;000840
IF2CREQ1 .equ 0x0840
__if2creql1 .res.b 1 ;000840
IF2CREQL1 .equ 0x0840
__if2creqh1 .res.b 1 ;000841
IF2CREQH1 .equ 0x0841
__if2cmsk1 ; overlay symbol ;000842
IF2CMSK1 .equ 0x0842
__if2cmskl1 .res.b 1 ;000842
IF2CMSKL1 .equ 0x0842
__if2cmskh1 .res.b 1 ;000843
IF2CMSKH1 .equ 0x0843
__if2msk1 ; overlay symbol ;000844
IF2MSK1 .equ 0x0844
__if2msk11 ; overlay symbol ;000844
IF2MSK11 .equ 0x0844
__if2msk1l1 .res.b 1 ;000844
IF2MSK1L1 .equ 0x0844
__if2msk1h1 .res.b 1 ;000845
IF2MSK1H1 .equ 0x0845
__if2msk21 ; overlay symbol ;000846
IF2MSK21 .equ 0x0846
__if2msk2l1 .res.b 1 ;000846
IF2MSK2L1 .equ 0x0846
__if2msk2h1 .res.b 1 ;000847
IF2MSK2H1 .equ 0x0847
__if2arb1 ; overlay symbol ;000848
IF2ARB1 .equ 0x0848
__if2arb11 ; overlay symbol ;000848
IF2ARB11 .equ 0x0848
__if2arb1l1 .res.b 1 ;000848
IF2ARB1L1 .equ 0x0848
__if2arb1h1 .res.b 1 ;000849
IF2ARB1H1 .equ 0x0849
__if2arb21 ; overlay symbol ;00084A
IF2ARB21 .equ 0x084A
__if2arb2l1 .res.b 1 ;00084A
IF2ARB2L1 .equ 0x084A
__if2arb2h1 .res.b 1 ;00084B
IF2ARB2H1 .equ 0x084B
__if2mctr1 ; overlay symbol ;00084C
IF2MCTR1 .equ 0x084C
__if2mctrl1 .res.b 1 ;00084C
IF2MCTRL1 .equ 0x084C
__if2mctrh1 .res.b 1 ;00084D
IF2MCTRH1 .equ 0x084D
__if2dta1 ; overlay symbol ;00084E
IF2DTA1 .equ 0x084E
__if2dta11 ; overlay symbol ;00084E
IF2DTA11 .equ 0x084E
__if2dta1l1 .res.b 1 ;00084E
IF2DTA1L1 .equ 0x084E
__if2dta1h1 .res.b 1 ;00084F
IF2DTA1H1 .equ 0x084F
__if2dta21 ; overlay symbol ;000850
IF2DTA21 .equ 0x0850
__if2dta2l1 .res.b 1 ;000850
IF2DTA2L1 .equ 0x0850
__if2dta2h1 .res.b 1 ;000851
IF2DTA2H1 .equ 0x0851
__if2dtb1 ; overlay symbol ;000852
IF2DTB1 .equ 0x0852
__if2dtb11 ; overlay symbol ;000852
IF2DTB11 .equ 0x0852
__if2dtb1l1 .res.b 1 ;000852
IF2DTB1L1 .equ 0x0852
__if2dtb1h1 .res.b 1 ;000853
IF2DTB1H1 .equ 0x0853
__if2dtb21 ; overlay symbol ;000854
IF2DTB21 .equ 0x0854
__if2dtb2l1 .res.b 1 ;000854
IF2DTB2L1 .equ 0x0854
__if2dtb2h1 .res.b 1 ;000855
IF2DTB2H1 .equ 0x0855
.org 0x000880
__treqr1 ; overlay symbol ;000880
TREQR1 .equ 0x0880
__treqr11 ; overlay symbol ;000880
TREQR11 .equ 0x0880
__treqr1l1 .res.b 1 ;000880
TREQR1L1 .equ 0x0880
__treqr1h1 .res.b 1 ;000881
TREQR1H1 .equ 0x0881
__treqr21 ; overlay symbol ;000882
TREQR21 .equ 0x0882
__treqr2l1 .res.b 1 ;000882
TREQR2L1 .equ 0x0882
__treqr2h1 .res.b 1 ;000883
TREQR2H1 .equ 0x0883
.org 0x000890
__newdt1 ; overlay symbol ;000890
NEWDT1 .equ 0x0890
__newdt11 ; overlay symbol ;000890
NEWDT11 .equ 0x0890
__newdt1l1 .res.b 1 ;000890
NEWDT1L1 .equ 0x0890
__newdt1h1 .res.b 1 ;000891
NEWDT1H1 .equ 0x0891
__newdt21 ; overlay symbol ;000892
NEWDT21 .equ 0x0892
__newdt2l1 .res.b 1 ;000892
NEWDT2L1 .equ 0x0892
__newdt2h1 .res.b 1 ;000893
NEWDT2H1 .equ 0x0893
.org 0x0008A0
__intpnd1 ; overlay symbol ;0008A0
INTPND1 .equ 0x08A0
__intpnd11 ; overlay symbol ;0008A0
INTPND11 .equ 0x08A0
__intpnd1l1 .res.b 1 ;0008A0
INTPND1L1 .equ 0x08A0
__intpnd1h1 .res.b 1 ;0008A1
INTPND1H1 .equ 0x08A1
__intpnd21 ; overlay symbol ;0008A2
INTPND21 .equ 0x08A2
__intpnd2l1 .res.b 1 ;0008A2
INTPND2L1 .equ 0x08A2
__intpnd2h1 .res.b 1 ;0008A3
INTPND2H1 .equ 0x08A3
.org 0x0008B0
__msgval1 ; overlay symbol ;0008B0
MSGVAL1 .equ 0x08B0
__msgval11 ; overlay symbol ;0008B0
MSGVAL11 .equ 0x08B0
__msgval1l1 .res.b 1 ;0008B0
MSGVAL1L1 .equ 0x08B0
__msgval1h1 .res.b 1 ;0008B1
MSGVAL1H1 .equ 0x08B1
__msgval21 ; overlay symbol ;0008B2
MSGVAL21 .equ 0x08B2
__msgval2l1 .res.b 1 ;0008B2
MSGVAL2L1 .equ 0x08B2
__msgval2h1 .res.b 1 ;0008B3
MSGVAL2H1 .equ 0x08B3
.org 0x0008CE
__coer1 .res.b 1 ;0008CE
COER1 .equ 0x08CE
.end
| 34.92922 | 83 | 0.581746 |
de49ce06c447381315faaeabd0dcd465cec2795f | 679 | asm | Assembly | files/SLL_SRL.asm | CRThu/carrot_inside_cpu_interpreter | b20bbcb2186a7e1774602395d3f7cb3f589c3e2d | [
"Apache-2.0"
] | 1 | 2019-12-12T06:18:28.000Z | 2019-12-12T06:18:28.000Z | files/SLL_SRL.asm | CRThu/Carrot-Inside-CPU-Interpreter | b20bbcb2186a7e1774602395d3f7cb3f589c3e2d | [
"Apache-2.0"
] | null | null | null | files/SLL_SRL.asm | CRThu/Carrot-Inside-CPU-Interpreter | b20bbcb2186a7e1774602395d3f7cb3f589c3e2d | [
"Apache-2.0"
] | null | null | null | LOCATE 0
ADDI $0,$1,23456 ; $1=23456
SLL $1,$2,0
SW $0,$2,256 ; 23456
SLL $1,$2,1
SW $0,$2,256 ; 46912
SLL $1,$2,2
SW $0,$2,256 ; 93824
SLL $1,$2,3
SW $0,$2,256 ; 187648
SLL $1,$2,4
SW $0,$2,256 ; 375296
SLL $1,$2,5
SW $0,$2,256 ; 750592
SLL $1,$2,6
SW $0,$2,256 ; 1501184
SLL $1,$2,7
SW $0,$2,256 ; 3002368
SRL $1,$2,0
SW $0,$2,256 ; 23456
SRL $1,$2,1
SW $0,$2,256 ; 11728
SRL $1,$2,2
SW $0,$2,256 ; 5864
SRL $1,$2,3
SW $0,$2,256 ; 2932
SRL $1,$2,4
SW $0,$2,256 ; 1466
SRL $1,$2,5
SW $0,$2,256 ; 733
SRL $1,$2,6
SW $0,$2,256 ; 366
SRL $1,$2,7
SW $0,$2,256 ; 183 | 18.861111 | 30 | 0.456554 |
ce3fd341ae59373813d3d8d8eae83a233e2f57e8 | 1,721 | asm | Assembly | examples/kernel/drivers/io/out_byte/out_byte.asm | rostislav-nikitin/socOS | 75e3bbaa16086df5dd1a476ee86052b3073ce075 | [
"MIT"
] | 1 | 2020-07-29T12:30:42.000Z | 2020-07-29T12:30:42.000Z | examples/kernel/drivers/io/out_byte/out_byte.asm | rostislav-nikitin/socOS | 75e3bbaa16086df5dd1a476ee86052b3073ce075 | [
"MIT"
] | null | null | null | examples/kernel/drivers/io/out_byte/out_byte.asm | rostislav-nikitin/socOS | 75e3bbaa16086df5dd1a476ee86052b3073ce075 | [
"MIT"
] | null | null | null | .cseg
.org 0x00
rcall main_thread
; include components interrupts
;.include "../../../../../src/kernel/drivers/{driver_name}_int.asm"
; include components definitions
.include "../../../../../src/kernel/kernel_def.asm"
;.include "../../../../../src/kernel/drivers/{driver_name}_def.asm"
.include "../../../../../src/kernel/drivers/device_def.asm"
.include "../../../../../src/kernel/drivers/io/device_io_def.asm"
.include "../../../../../src/kernel/drivers/io/out_byte_def.asm"
;.include components data segments
;.include "../../../../../src/kernel/drivers/{driver_name}_dseg.asm"
; custom data & descriptors
.dseg
out_byte1: .BYTE SZ_ST_OUT_BYTE
out_byte2: .BYTE SZ_ST_OUT_BYTE
; main thread
.cseg
; skip interrupts vector
.org 0x14
; include components code segments
.include "../../../../../src/extensions/delay_cseg.asm"
.include "../../../../../src/kernel/kernel_cseg.asm"
;.include "../../../../../src/kernel/drivers/{driver_name}_cseg.asm"
.include "../../../../../src/kernel/drivers/device_cseg.asm"
.include "../../../../../src/kernel/drivers/io/device_io_cseg.asm"
.include "../../../../../src/kernel/drivers/io/out_byte_cseg.asm"
main_thread:
; init stack
m_init_stack
; init out bytes
m_out_byte_init out_byte1, DDRC, PORTC
m_out_byte_init out_byte2, DDRB, PORTB
.equ DELAY_TIME = 100000
main_thread_loop:
nop
m_out_byte_on out_byte1
;m_delay DELAY_TIME
nop
m_out_byte_off out_byte1
;m_delay DELAY_TIME
nop
m_out_byte_set out_byte1, 0b01010101
;m_delay DELAY_TIME
nop
m_out_byte_set out_byte1, 0b10101010
;m_delay DELAY_TIME
nop
m_out_byte_toggle out_byte1
;m_delay DELAY_TIME
nop
m_out_byte_toggle out_byte2
;m_delay DELAY_TIME
rjmp main_thread_loop
| 27.31746 | 68 | 0.699012 |
3f36bbe00d0026b98e2e6826a8d9563750d80481 | 827 | asm | Assembly | programs/oeis/062/A062821.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/062/A062821.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | programs/oeis/062/A062821.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | ; A062821: Number of divisors of totient of n.
; 1,1,2,2,3,2,4,3,4,3,4,3,6,4,4,4,5,4,6,4,6,4,4,4,6,6,6,6,6,4,8,5,6,5,8,6,9,6,8,5,8,6,8,6,8,4,4,5,8,6,6,8,6,6,8,8,9,6,4,5,12,8,9,6,10,6,8,6,6,8,8,8,12,9,8,9,12,8,8,6,8,8,4,8,7,8,8,8,8,8,12,6,12,4,12,6,12,8,12,8,9,6,8,10,10,6,4,9,12,8,12,10,10,9,8,8,12,4,12,6,8,12,10,12,9,9,12,7,12,10,8,8,12,8,12,7,8,6,8,10,6,8,16,10,10,12,12,12,6,8,12,12,12,12,16,10,12,8,8,7,12,8,10,10,10,4,4,10,12,7,12,12,6,8,16,10,6,8,4,10,18,12,16,8,15,12,12,6,12,12,8,7,14,12,12,12,9,12,12,10,12,9,16,7,12,8,12,12,18,10,16,8,12,4,16,12,18,12,15,10,14,12,8,12,16,10,4,12,12,8,16,10,8,12,8,6,12,12,8,7,20,8,10,16,16,10,16,16,6,9
cal $0,10 ; Euler totient function phi(n): count numbers <= n and prime to n.
mov $1,$0
sub $1,1
cal $1,5 ; d(n) (also called tau(n) or sigma_0(n)), the number of divisors of n.
| 103.375 | 600 | 0.605804 |
b3b4720e7a2aaa1b383a43765b402b1e1abc57ba | 742 | asm | Assembly | analyze.asm | Byon2/project-hardware-2019 | 5f40f3801ee94b247d1e062bba341dfab574dd7f | [
"BSD-3-Clause"
] | null | null | null | analyze.asm | Byon2/project-hardware-2019 | 5f40f3801ee94b247d1e062bba341dfab574dd7f | [
"BSD-3-Clause"
] | null | null | null | analyze.asm | Byon2/project-hardware-2019 | 5f40f3801ee94b247d1e062bba341dfab574dd7f | [
"BSD-3-Clause"
] | null | null | null | # analyze.asm
# This file written 2015 by F Lundevall
# Copyright abandoned - this file is in the public domain.
.text
main:
addi $t1,$0,0 # 0011 0000 = 48
loop:
slt $t0,$t1,$a0
nop
beq $t0,$0,ddone
nop
nop
lw $s0,4($a1)
lw $s1,8($a1)
and $s0,$s0,$s1
sw $s0,0($a1)
addi $a1,$a1,-12
done: addi $t1,$t1,1
j loop
ddone: # copy from s0 to a0
li $v0,11 # syscall with v0 = 11 will print out
syscall # one byte from a0 to the Run I/O window
addi $s0,$s0,3 # what happens if the constant is changed?
# 1 -> 3
li $t0,0x5b # 5b = 0101 1011 = 91 -> 0101 1101 = 93 = 5d
bne $s0,$t0,loop
nop # delay slot filler (just in case)
stop: j stop # loop forever here
nop # delay slot filler (just in case)
| 16.863636 | 60 | 0.617251 |
849cffda568575cedc54d1dcc78d52d4c043d9f7 | 391 | asm | Assembly | programs/oeis/338/A338852.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/338/A338852.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/338/A338852.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A338852: a(n) = (7*floor(a(n-1)/3)) + (a(n-1) mod 3) with a(1) = 3.
; 3,7,15,35,79,183,427,995,2319,5411,12623,29451,68719,160343,374131,872971,2036931,4752839,11089955,25876559,60378635,140883479,328728115,767032267,1789741955,4176064559,9744150635,22736351479,53051486783
mov $1,1
lpb $0
sub $0,1
seq $1,47320 ; Numbers that are congruent to {0, 5, 6} mod 7.
lpe
add $1,2
mov $0,$1
| 35.545455 | 205 | 0.705882 |
b6ee57193ce779afe19435fe6ac771ebce66a14e | 478 | asm | Assembly | programs/oeis/187/A187576.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/187/A187576.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/187/A187576.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A187576: Rank transform of the sequence 2*floor((n-1)/2)); complement of A187577.
; 1,2,4,5,7,8,11,12,14,15,17,18,20,21,23,24,27,28,30,31,33,34,37,38,40,41,43,44,46,47,49,50,53,54,56,57,59,60,62,63,65,66,69,70,72,73,75,76,79,80,82,83,85,86,88,89,91,92,95,96,98,99,101,102,105,106,108,109,111,112,114,115,117,118,121,122,124,125,127,128,130,131,133,134
mov $2,$0
div $0,2
add $0,2
cal $0,288708 ; Positions of 0 in A288707; complement of A288709.
mov $1,$0
sub $1,3
add $1,$2
| 43.454545 | 269 | 0.679916 |
1d9582a30c36a61f7b8bfe2cf66ec61209ddc4c2 | 348 | asm | Assembly | Lab5/lab5_1.asm | richardhyy/AssemblyLab | 7e0ba3800f3db1e2f5d616ca89905963d1da0996 | [
"MIT"
] | 3 | 2021-06-26T14:52:16.000Z | 2021-11-23T03:48:48.000Z | Lab5/lab5_1.asm | richardhyy/AssemblyLab | 7e0ba3800f3db1e2f5d616ca89905963d1da0996 | [
"MIT"
] | 1 | 2021-06-26T14:12:21.000Z | 2021-06-26T14:18:54.000Z | Lab5/lab5_1.asm | richardhyy/AssemblyLab | 7e0ba3800f3db1e2f5d616ca89905963d1da0996 | [
"MIT"
] | 4 | 2021-11-30T06:06:08.000Z | 2022-03-16T03:55:42.000Z | assume cs:code,ds:data,ss:stack
data segment
dw 0123h,0456h,0789h,0abch,0defh,0fedh,0cbah,0987h
data ends
stack segment
dw 0,0,0,0,0,0,0,0
stack ends
code segment
start: mov ax,stack
mov ss,ax
mov sp,16
mov ax,data
mov ds,ax
push ds:[0]
push ds:[2]
pop ds:[2]
pop ds:[0]
mov ax,4c00h
int 21h
code ends
end start | 11.6 | 51 | 0.663793 |
05e3d86867770da7d99d420330d7c7795aa37c94 | 563 | asm | Assembly | programs/oeis/254/A254006.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/254/A254006.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/254/A254006.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A254006: a(0) = 1, a(n) = 3*a(n-2) if n mod 2 = 0, otherwise a(n) = 0.
; 1,0,3,0,9,0,27,0,81,0,243,0,729,0,2187,0,6561,0,19683,0,59049,0,177147,0,531441,0,1594323,0,4782969,0,14348907,0,43046721,0,129140163,0,387420489,0,1162261467,0,3486784401,0,10460353203,0,31381059609,0,94143178827,0,282429536481,0,847288609443,0,2541865828329,0,7625597484987,0,22876792454961,0,68630377364883,0,205891132094649,0,617673396283947,0,1853020188851841,0,5559060566555523,0
mov $1,1
mov $3,1
lpb $0,1
sub $0,1
mul $1,2
mov $2,$3
trn $2,$1
add $3,$1
mov $1,$2
lpe
| 40.214286 | 387 | 0.714032 |
01d0c055762ced353600916eb23109b7d488b6df | 382 | asm | Assembly | libsrc/target/laser500/gencon/fputc_cons.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 640 | 2017-01-14T23:33:45.000Z | 2022-03-30T11:28:42.000Z | libsrc/target/laser500/gencon/fputc_cons.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 1,600 | 2017-01-15T16:12:02.000Z | 2022-03-31T12:11:12.000Z | libsrc/target/laser500/gencon/fputc_cons.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 215 | 2017-01-17T10:43:03.000Z | 2022-03-23T17:25:02.000Z | ;
; VZ700 C Library
;
; Print character to the screen
;
SECTION code_clib
MODULE fputc_cons_native
PUBLIC fputc_cons_native
.fputc_cons_native
ld hl,2
add hl,sp
push ix ;Save callers
ld a,(hl)
IF STANDARDESCAPECHARS
cp 10
jr nz,notCR
call $57d9
ld a,13
jr setout
.notCR
ENDIF
.setout
call $57d9 ;CHROUT, print charater in a
pop ix
ret
| 11.9375 | 41 | 0.680628 |
f4f1da4bf2d095f3b2a10e19e8c4e2ffdf1a0b01 | 133 | asm | Assembly | moving-a-block-of-data-to-another-address.asm | SubhadeepZilong/GNUSim8085 | c8a12c0ae53e53db1774f93e9e40bff9bfe949c1 | [
"MIT"
] | null | null | null | moving-a-block-of-data-to-another-address.asm | SubhadeepZilong/GNUSim8085 | c8a12c0ae53e53db1774f93e9e40bff9bfe949c1 | [
"MIT"
] | null | null | null | moving-a-block-of-data-to-another-address.asm | SubhadeepZilong/GNUSim8085 | c8a12c0ae53e53db1774f93e9e40bff9bfe949c1 | [
"MIT"
] | null | null | null |
;Moving a block of data to another address
MVI D, 05H
LXI H, 2050H
LXI B, 2070H
MOV A, M
STA X, B
INX H
INX B
DCR D
JNZ 2008H
RST 1 | 10.230769 | 42 | 0.699248 |
51d2b94deecc70a1591b758e8e4d6aa0a16c46e7 | 549 | asm | Assembly | programs/oeis/051/A051489.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/051/A051489.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/051/A051489.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A051489: a(n) = n^(n+2) + (n+2)^n.
; 1,4,32,368,5392,94932,1941760,45136576,1173741824,33739007300,1061917364224,36314872537968,1340612376924160,53132088082450132,2250010931847299072,101388548387203175168,4843806013966239465472,244552822542936127033092,13010380216396078174437376,727457992333704231799337200,42648469498686404044207947776,2616052459228913777816325459284,167566606145758453496034447327232,11187876119071565503348037263205568,777338493235300870639470742394109952
mov $1,$0
add $1,2
mov $2,$0
pow $0,$1
pow $1,$2
add $1,$0
mov $0,$1
| 49.909091 | 441 | 0.846995 |
21e1fe307543fbc2b5aa4f1388ca7b7b355a2efc | 4,240 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xa0_notsx.log_21829_659.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xa0_notsx.log_21829_659.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xa0_notsx.log_21829_659.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r14
push %rax
push %rsi
lea addresses_D_ht+0x17d68, %r14
nop
xor %rsi, %rsi
movl $0x61626364, (%r14)
nop
nop
and $32653, %r10
pop %rsi
pop %rax
pop %r14
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r11
push %r15
push %r8
push %rdi
// Load
lea addresses_A+0x17468, %r10
nop
add %rdi, %rdi
mov (%r10), %r11w
nop
nop
nop
nop
add $18177, %rdi
// Faulty Load
lea addresses_normal+0x1ef68, %rdi
nop
nop
add $23769, %r10
movups (%rdi), %xmm6
vpextrq $1, %xmm6, %r8
lea oracles, %r11
and $0xff, %r8
shlq $12, %r8
mov (%r11,%r8,1), %r8
pop %rdi
pop %r8
pop %r15
pop %r11
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'src': {'type': 'addresses_normal', 'AVXalign': True, 'size': 16, 'NT': False, 'same': False, 'congruent': 0}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_A', 'AVXalign': False, 'size': 2, 'NT': False, 'same': False, 'congruent': 8}, 'OP': 'LOAD'}
[Faulty Load]
{'src': {'type': 'addresses_normal', 'AVXalign': False, 'size': 16, 'NT': False, 'same': True, 'congruent': 0}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'OP': 'STOR', 'dst': {'type': 'addresses_D_ht', 'AVXalign': True, 'size': 4, 'NT': False, 'same': False, 'congruent': 9}}
{'34': 21829}
34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34
*/
| 61.449275 | 2,999 | 0.660377 |
6434b6ccee5761667ebfc992bf276fe4ca01fb9a | 262 | asm | Assembly | arch/lib/math/is_even.asm | Mosseridan/Compiler-Principles | 6c72a462b90ca6c6db380976c2aa60471fa65325 | [
"MIT"
] | null | null | null | arch/lib/math/is_even.asm | Mosseridan/Compiler-Principles | 6c72a462b90ca6c6db380976c2aa60471fa65325 | [
"MIT"
] | null | null | null | arch/lib/math/is_even.asm | Mosseridan/Compiler-Principles | 6c72a462b90ca6c6db380976c2aa60471fa65325 | [
"MIT"
] | null | null | null | /* is_even.asm
* Tests whether its argument is even
*
* Programmer: Mayer Goldberg, 2010
*/
IS_EVEN:
MOV(R0, STARG(0));
AND(R0, IMM(1));
CMP(R0, IMM(0));
JUMP_EQ(L_IS_EVEN_T);
MOV(R0, IMM(0));
RETURN;
L_IS_EVEN_T:
MOV(R0, IMM(1));
RETURN;
| 15.411765 | 37 | 0.614504 |
c147d2522ead7146dd43e88e3064636ca284ea28 | 967 | asm | Assembly | programs/oeis/152/A152776.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/152/A152776.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/152/A152776.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A152776: Numbers such that every run length in base 2 is 3.
; 7,56,455,3640,29127,233016,1864135,14913080,119304647,954437176,7635497415,61083979320,488671834567,3909374676536,31274997412295,250199979298360,2001599834386887,16012798675095096,128102389400760775,1024819115206086200,8198552921648689607,65588423373189516856,524707386985516134855,4197659095884129078840,33581272767073032630727,268650182136584261045816,2149201457092674088366535,17193611656741392706932280,137548893253931141655458247,1100391146031449133243665976,8803129168251593065949327815,70425033346012744527594622520,563400266768101956220756980167,4507202134144815649766055841336,36057617073158525198128446730695,288460936585268201585027573845560,2307687492682145612680220590764487,18461499941457164901441764726115896,147691999531657319211534117808927175
add $0,1
lpb $0
mov $2,$0
trn $0,2
mul $2,2
seq $2,94014 ; Expansion of (1-2x)/(1-8x^2).
add $3,$2
lpe
mov $0,$3
div $0,8
mul $0,7
| 64.466667 | 762 | 0.870734 |
495cb532848e15a761ad7829cf281b52c65cf7a7 | 514 | asm | Assembly | oeis/176/A176014.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/176/A176014.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/176/A176014.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A176014: Decimal expansion of (3+sqrt(21))/6.
; Submitted by Jon Maiga
; 1,2,6,3,7,6,2,6,1,5,8,2,5,9,7,3,3,3,4,4,3,1,3,4,1,1,9,8,9,5,4,6,6,8,0,8,1,4,9,7,4,0,9,4,2,9,4,6,1,3,2,8,6,5,0,4,3,4,5,4,0,3,5,3,9,8,4,4,7,8,0,7,0,9,2,4,6,2,8,4,8,1,1,0,0,7,2,6,9,2,6,5,8,2,2,4,0,8,3,8
mov $1,1
mov $2,1
mov $3,$0
mul $3,4
lpb $3
mul $1,$3
mul $2,$3
add $1,$2
add $2,$1
mov $5,$0
max $5,1
div $1,$5
div $2,$5
add $2,$1
add $2,$1
sub $3,1
lpe
mov $4,10
pow $4,$0
div $2,$4
div $1,$2
mod $1,10
mov $0,$1
| 18.357143 | 201 | 0.51751 |
d71b3d3b173e3da4bb2bc25231d4a8c617decb4c | 540 | asm | Assembly | programs/oeis/198/A198682.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/198/A198682.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/198/A198682.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A198682: Nonnegative multiples of 3 whose sum of base-3 digits are of the form 3*k+2.
; 6,12,18,30,36,51,54,69,75,84,90,105,108,123,129,141,147,153,162,177,183,195,201,207,219,225,240,246,252,267,270,285,291,303,309,315,324,339,345,357,363,369,381,387,402,411,417,423,435,441,456,459,474,480,486,501,507,519,525,531,543,549,564,573,579,585,597,603,618,621,636,642,651,657,672,675,690,696,708,714,720,732,738,753,756,771,777,789,795,801,810,825,831,843,849,855,867,873,888,897
seq $0,287437 ; Positions of 2 in A053838.
sub $0,1
mul $0,3
| 77.142857 | 389 | 0.731481 |
41d339223239615507ca09fe5f68a220636e63f2 | 20,446 | asm | Assembly | kernel.asm | kennu/kfx | fa98fa370808497e0eb3ee75b9091db09a194245 | [
"Unlicense"
] | 1 | 2017-02-13T16:11:19.000Z | 2017-02-13T16:11:19.000Z | kernel.asm | kennu/kfx | fa98fa370808497e0eb3ee75b9091db09a194245 | [
"Unlicense"
] | null | null | null | kernel.asm | kennu/kfx | fa98fa370808497e0eb3ee75b9091db09a194245 | [
"Unlicense"
] | null | null | null | ; KFX kernel - The bootloader loads this to 0x0800:0000 and jumps to 0008
[bits 16]
[org 0x8000] ; use absolute origin 0x8000 (32k)
kernel_header: ; header is 8 bytes
db 'KFX', 0 ; signature 4 bytes
db kernel_length ; kernel length 1 byte in blocks
db 0 ; padding 3 bytes
db 0
db 0
boot_16: ; kernel code starts here in 16-bit real mode
cli ; disable interrupts
push es ; show red boot screen
mov ax, 0xb800
mov es, ax
mov ax, 0x4700
mov edi, 0x0000
mov ecx, 2000
cld
rep stosw
pop es
lgdt [gdt32_desc] ; load 32-bit Global Descriptor Table
lidt [idt32_desc] ; load 32-bit Interrupt Descriptor Table
mov eax, cr0 ; set bit 0 (PE) of CR0 (protected environment enable)
or eax, 0x00000001
mov eax, 0x00000011
mov cr0, eax
mov eax, cr4 ; set bit 5 (PAE) of CR4 (physical address extension)
or eax, 0x00000020
mov cr4, eax
jmp KERNEL32_CODE32:init_32 ; long jump to 32-bit code
[bits 32]
init_32: ; protected mode 32-bit code starts here
mov ax, KERNEL32_DATA
mov ds, ax ; update data segment
mov es, ax ; update alt1 data segment
mov fs, ax ; update alt2 data segment
mov gs, ax ; update alt3 data segment
mov ss, ax ; update stack segment
mov esp, 0x00040000 ; stack pointer at 0x00040000 (256k)
in al, 0x92 ; Fast enable A20
or al, 2
out 0x92, al
jmp boot_32
check_longmode:
mov eax, 80000000h ; Extended-function 8000000h.
cpuid ; Is largest extended function
cmp eax, 80000000h ; any function > 80000000h?
jbe no_long_mode ; If not, no long mode.
mov eax, 80000001h ; Extended-function 8000001h.
cpuid ; Now EDX = extended-features flags.
bt edx, 29 ; Test if long mode is supported.
jnc no_long_mode ; Exit if not supported.
jmp boot_32
no_long_mode: ; CPU won't support 64-bit mode
mov byte [0xb8000], '3'
mov byte [0xb8002], '2'
hlt
jmp $
boot_32:
cld
mov ax, 0x6700 ; show yellow boot screen
mov edi, 0xb8000
mov ecx, 2000
rep stosw
init_pml4_table: ; initialize page map level 4 pointers
cld
mov edi, pml4_table ; clear everything with zeroes
xor eax, eax
mov ecx, 1024 ; 1024 x 32 bits (512 entries)
rep stosd
mov edi, pml4_table ; first entry points to pdp_table
mov eax, pdp_table
or eax, 0x00000007 ; ..., cachedis(0), wrthru(0), user(1), r/w(1), present(1)
stosd
xor eax, eax ; zero higher 32 bits
stosd
init_pdp_table: ; initialize page directory pointers
cld
mov edi, pdp_table ; clear everything with zeroes
xor eax, eax
mov ecx, 1024 ; 1024 x 32 bits (512 entries)
rep stosd
mov edi, pdp_table ; first entry points to page_directory
mov eax, page_directory
or eax, 0x00000007 ; ..., cachedis(0), wrthru(0), user(1), r/w(1), present(1)
stosd
xor eax, eax
stosd ; zero higher 32 bits
init_page_directory: ; initialize page directory
cld
mov edi, page_directory ; clear everything with zeroes
xor eax, eax
mov ecx, 1024 ; 1024 x 32 bit (512 entries)
rep stosd
mov edi, page_directory ; first entry points to identity_table
mov eax, identity_table
or eax, 0x00000007 ; ..., cachedis(0), wrthru(0), user(1), r/w(1), present(1)
stosd
xor eax, eax ; zero higher 32 bits
stosd
init_identity_table: ; identity table will map first 1MB to itself
cld
mov edi, identity_table ; clear everything with zeroes
xor eax, eax
mov ecx, 1024 ; 1024 x 32 bit (512 entries)
rep stosd
mov edi, identity_table ; generate 512 entries
mov ecx, 512
mov ebx, 0x00000000 ; use ebx for the increasing pointer (0k, 4k, 8k..)
init_identity_loop:
mov eax, ebx ; lower 32 bits of entry
or eax, 0x00000007 ; ..., cachedis(0), wrthru(0), user(1), r/w(1), present(1)
stosd
xor eax, eax ; higher 32 bits of entry
stosd
add ebx, 0x1000 ; increment in 4k blocks
dec ecx
jnz init_identity_loop
enter_long_mode:
cld
mov ax, 0x7f00 ; show gray boot screen
mov edi, 0xb8000
mov ecx, 2000
rep stosw
; Step 1: EFER.LME=1 (enable long mode)
mov byte [0xb8000], '1'
mov ecx, 0x0c0000080 ; specify EFER MSR
rdmsr ; read EFER MSR into EAX
or eax, 0x00000100 ; set bit 8 (LME) of EFER (IA-32e mode enable)
wrmsr ; write EFER MSR from EAX
; Step 2: CR3=PML4 (store PML4 address)
mov byte [0xb8000], '2'
mov eax, pml4_table
mov cr3, eax ; store Page Map Level 4 Table address in CR3
; Step 3: LGDT GDT64 (load 64-bit GDT)
mov byte [0xb8000], '3'
lgdt [gdt64_desc]
; Step 4: CR0.PG=1 (enable paging)
mov byte [0xb8000], '4'
mov eax, cr0 ; set bit 31 (PG) of CR0 (enable paging)
or eax, 0x80000000
mov cr0, eax
; 32-bit compatibility mode. Next instruction must be long jump to 64-bit code.
jmp KERNEL64_CODE:boot_64 ; long jump to 64-bit code
[bits 64]
boot_64: ; long mode 64-bit code starts here
lgdt [gdt64_desc] ; reload GDT in 64-bit mode
mov eax, KERNEL64_DATA ; reset segment registers
mov ss, eax
mov ds, eax
mov es, eax
mov fs, eax
mov gs, eax
mov rsp, 0x00040000 ; stack pointer at 0x00040000 (256k)
init_idt_64: ; setup ISR gate descriptors
mov rdi, idt64
mov rax, isr_00
call set_idt_desc
mov rax, isr_01
call set_idt_desc
mov rax, isr_02
call set_idt_desc
mov rax, isr_03
call set_idt_desc
mov rax, isr_04
call set_idt_desc
mov rax, isr_05
call set_idt_desc
mov rax, isr_06
call set_idt_desc
mov rax, isr_07
call set_idt_desc
mov rax, isr_08
call set_idt_desc
mov rax, isr_09
call set_idt_desc
mov rax, isr_0a
call set_idt_desc
mov rax, isr_0b
call set_idt_desc
mov rax, isr_0c
call set_idt_desc
mov rax, isr_0d
call set_idt_desc
mov rax, isr_0e
call set_idt_desc
mov rax, isr_0f
call set_idt_desc
lidt [idt64_desc] ; load 64-bit IDT
jmp kernel_64
set_idt_desc: ; routine to set IDT descriptor at RDI to handler at RAX
push rax
push rbx
push rcx
push rdx
; Build the lower 64-bit word in RBX
mov rbx, rax ; target offset 31-16 (0x00000000ffff0000) at low 0xffff000000000000
shl rbx, 32
mov rcx, 0xffff000000000000
and rbx, rcx
mov rcx, 0x00008e0000000000 ; flags (16 bits) at low 0x0000ffff00000000
or rbx, rcx ; flags: P:1(1) DP:2(00) 0:1(0), Type:4(0x0e), Reserved:5(00000), IST:3(000)
mov rdx, KERNEL64_CODE ; target selector (16 bits) (0x000000000000ffff) at low 0x00000000ffff0000
shl rdx, 16
mov rcx, 0x00000000ffff0000
and rdx, rcx
or rbx, rdx
mov rdx, rax ; target offset 15-0 (0x000000000000ffff) at low 0x000000000000ffff
mov rcx, 0x000000000000ffff
and rdx, rcx
or rbx, rdx
; Build the higher 64-bit word in RDX
mov rdx, rax ; high 0xffffffff00000000 must be zero
shr rdx, 32 ; target offset 64-32 (0xffffffff00000000) at high 0x00000000ffffffff
mov rax, rbx ; First store lower 64-bit word
stosq
mov rax, rdx ; Then the higher 64-bit word
stosq
pop rdx
pop rcx
pop rbx
pop rax
ret ; at end, RDI will point to the next descriptor
kernel_64:
mov ax, 0x1700 ; show blue boot screen
call sub_clear_screen
mov byte [0x00000000000b8000], ':'
mov byte [0x00000000000b8002], '-'
mov byte [0x00000000000b8004], ')'
mov rsi, msg_kernel_boot
call sub_printl
cmp dword [kernel_magic], 0xcaccaac0 ; make sure whole kernel loaded
je magic_ok
mov rsi, msg_kernel_bad_magic
call sub_prints
mov rsi, [kernel_magic]
mov rcx, 4
call sub_printhexs
call sub_newl
magic_ok:
mov rsi, msg_kernel_booted
call sub_printl
call sub_print_idt
sti ; re-enable interrupts
jmp main_loop
main_loop:
hlt
jmp main_loop
read_keyboard:
push rax
push rbx
push rsi
in al, 0x64
and al, 0x01
jz .end
in al, 0x60
mov bl, al
and bl, 0x80
jnz .end
.keydown:
and rax, 0x7f
mov bl, al
mov rsi, keyboard_map
add rsi, rax
mov al, [rsi]
or al, al
jz .unknown
cmp al, 13
je .enter
.ascii: ; process ascii key, ascii in AL, scancode in BL
mov rcx, [command_pos]
mov [command_buffer+rcx], al
inc byte [command_pos]
call sub_printc
call sub_flush
jmp .end
.unknown: ; process unknown key, scancode in BL
mov al, '<'
call sub_printc
mov al, bl
call sub_printhexc
mov al, '>'
call sub_printc
call sub_flush
jmp .end
.enter: ; process enter pressed
call sub_newl
call parse_command
mov byte [command_pos], 0
.end:
pop rsi
pop rbx
pop rax
ret
parse_command:
mov rsi, msg_unknown_command
call sub_prints
mov rcx, [command_pos]
mov byte [command_buffer+rcx], 0
mov rsi, command_buffer
call sub_printl
ret
; Hang
kernel_panic:
mov rsi, msg_kernel_panic
call sub_printl
kernel_panic_halt:
hlt
jmp kernel_panic_halt
; Display the IDT
sub_print_idt:
push rax
push rbx
push rcx
push rsi
mov rsi, msg_idt_start
call sub_printl
mov rsi, idt64 ; start printing IDT
mov rcx, 16 ; print N entries
mov rax, 0
sub_print_idt_loop:
call sub_print_idt_entry
inc rax
dec rcx
jnz sub_print_idt_loop
mov rsi, msg_idt_end
call sub_printl
pop rsi
pop rcx
pop rbx
pop rax
ret
; Display IDT entry #RAX at memory RSI
sub_print_idt_entry:
push rax
push rcx
push rsi
mov rsi, msg_idt_entry
call sub_prints
call sub_printhexc ; print AL from RAX
mov al, ' '
call sub_printc
pop rsi
mov rcx, 16
call sub_printhexs ; print 16 bytes of RSI and increase
push rsi
call sub_newl
pop rsi
pop rcx
pop rax
ret
sub_update_int_status:
push rax
push rbx
push rcx
push rdx
push rsi
push rdi
mov rdi, 0x00000000000b8000
mov rsi, isr_counters
mov rdx, 16
.loopint:
add rdi, 159
mov rcx, 8
.loopbyte:
cld
lodsb ; load next byte to RAX
mov rbx, rax
std
mov rax, 0x4f ; color
stosb
mov rax, rbx
and al, 0x0f
cmp al, 9
jg .hex1
add al, '0'
jmp .go1
.hex1:
add al, 'a'-10
.go1:
stosb ; print nibble to screen
mov rax, 0x4f ; color
stosb
mov rax, rbx
shr al, 4
and al, 0x0f
cmp al, 9
jg .hex2
add al, '0'
jmp .go2
.hex2:
add al, 'a'-10
.go2:
stosb ; print nibble to screen
loopnz .loopbyte
add rdi, 16*2+1
dec rdx
jnz .loopint
pop rdi
pop rsi
pop rdx
pop rcx
pop rbx
pop rax
ret
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Subroutines
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Interrupt Service Routines
align 8
isr_counters:
isr_00_counter dq 0
isr_01_counter dq 0
isr_02_counter dq 0
isr_03_counter dq 0
isr_04_counter dq 0
isr_05_counter dq 0
isr_06_counter dq 0
isr_07_counter dq 0
isr_08_counter dq 0
isr_09_counter dq 0
isr_0a_counter dq 0
isr_0b_counter dq 0
isr_0c_counter dq 0
isr_0d_counter dq 0
isr_0e_counter dq 0
isr_0f_counter dq 0
align 8
isr_00:
inc qword [isr_00_counter]
call sub_update_int_status
mov al, 0x20 ; acknowledge interrupt
out 0x20, al
iretq
isr_01:
inc qword [isr_01_counter]
call sub_update_int_status
mov al, 0x20 ; acknowledge interrupt
out 0x20, al
iretq
isr_02: ; NMI
inc qword [isr_02_counter]
call sub_update_int_status
mov al, 0x20 ; acknowledge interrupt
out 0x20, al
iretq
isr_03:
inc qword [isr_03_counter]
call sub_update_int_status
mov al, 0x20 ; acknowledge interrupt
out 0x20, al
iretq
isr_04:
inc qword [isr_04_counter]
call sub_update_int_status
mov al, 0x20 ; acknowledge interrupt
out 0x20, al
iretq
isr_05:
inc qword [isr_05_counter]
call sub_update_int_status
mov al, 0x20 ; acknowledge interrupt
out 0x20, al
iretq
isr_06:
inc qword [isr_06_counter]
call sub_update_int_status
mov al, 0x20 ; acknowledge interrupt
out 0x20, al
iretq
isr_07:
inc qword [isr_07_counter]
call sub_update_int_status
mov al, 0x20 ; acknowledge interrupt
out 0x20, al
iretq
isr_08: ; IRQ0 - System Timer 18.2 times/second
inc qword [isr_08_counter]
call sub_update_int_status
mov al, 0x20 ; acknowledge interrupt
out 0x20, al
iretq
isr_09: ; IRQ1 - Keyboard Data Ready
inc qword [isr_09_counter]
call sub_update_int_status
call read_keyboard
mov al, 0x20 ; acknowledge interrupt
out 0x20, al
iretq
isr_0a:
inc qword [isr_0a_counter]
call sub_update_int_status
mov al, 0x20 ; acknowledge interrupt
out 0x20, al
iretq
isr_0b:
inc qword [isr_0b_counter]
call sub_update_int_status
mov al, 0x20 ; acknowledge interrupt
out 0x20, al
iretq
isr_0c:
inc qword [isr_0c_counter]
call sub_update_int_status
mov al, 0x20 ; acknowledge interrupt
out 0x20, al
iretq
isr_0d:
inc qword [isr_0d_counter]
call sub_update_int_status
mov al, 0x20 ; acknowledge interrupt
out 0x20, al
iretq
isr_0e:
inc qword [isr_0e_counter]
call sub_update_int_status
mov al, 0x20 ; acknowledge interrupt
out 0x20, al
iretq
isr_0f:
inc qword [isr_0f_counter]
call sub_update_int_status
mov al, 0x20 ; acknowledge interrupt
out 0x20, al
iretq
; Update cursor to VGA
sub_updatecursor:
push rax
push rcx
push rdx
mov cx, [console_cursor]
shr cx, 1 ; divide by 2
mov dx, 0x3d4
mov al, 15
out dx, al
mov dx, 0x3d5
mov al, cl
out dx, al
mov dx, 0x3d4
mov al, 14
out dx, al
mov dx, 0x3d5
mov al, ch
out dx, al
pop rdx
pop rcx
pop rax
ret
; Flush current text buffer to VGA
sub_flush:
pushf
push rcx
push rsi
push rdi
mov rcx, 4000
mov rsi, console_buffer
mov rdi, 0xb8000
cld
rep movsb
call sub_updatecursor
pop rdi
pop rsi
pop rcx
popf
ret
; Clear textmode screen, AX=0x1700 for standard color
sub_clear_screen:
push rax
push rcx
push rdi
mov rdi, console_buffer ; clear screen buffer
mov rcx, 2000
rep stosw
xor rcx, rcx ; move cursor to 0,0
mov [console_cursor], rcx
pop rdi
pop rcx
pop rax
call sub_flush
ret
sub_scroll_line:
push rax
push rcx
push rsi
push rdi
mov rax, [console_cursor] ; get current cursor
sub rax, 160 ; move it one row upwards
mov [console_cursor], rax ; store new cursor
mov rcx, 4000-160 ; move n-1 rows of screen buffer
mov rsi, console_buffer
add rsi, 160
mov rdi, console_buffer
rep movsb
mov rcx, 80 ; clear last row of screen buffer
mov rdi, console_buffer
add rdi, 4000-160
mov ax, 0x1700
rep stosw
pop rdi
pop rsi
pop rcx
pop rax
ret
; Goto beginning of next line
sub_newl:
pushf
push rax
push rbx
push rcx
push rdx
mov rax, [console_cursor] ; get current cursor position
xor rdx, rdx
mov rbx, 160
div rbx ; divide by 160 => eax contains row, edx column
inc rax ; add one row
xor rdx, rdx
mul rbx ; multiply by 160 => eax contains new position
mov [console_cursor], rax ; set new cursor position
cmp rax, 4000
jne sub_newl_no_scroll
call sub_scroll_line
sub_newl_no_scroll:
pop rdx
pop rcx
pop rbx
pop rax
popf
call sub_flush
ret
; Print char
; AL=char
sub_printc:
push rbx
push rsi
mov rbx, [console_cursor]
mov rsi, console_buffer
add rsi, rbx
mov byte [rsi], al
inc rsi
mov byte [rsi], 0x17
inc rbx
inc rbx
mov [console_cursor], rbx
cmp rbx, 4000
jne sub_printc_no_scroll
call sub_scroll_line
sub_printc_no_scroll:
pop rsi
pop rbx
ret
; Print string
; RSI=string start
sub_prints:
pushf
push rax
push rsi
sub_prints_next:
mov al, [rsi]
cmp al, 0
je sub_prints_done
call sub_printc
inc rsi
jmp sub_prints_next
sub_prints_done:
pop rsi
pop rax
popf
ret
; Print string and newline
; RSI=string start
sub_printl:
call sub_prints
call sub_newl
ret
; Print hex nibble
; AL=nibble
sub_printhexnib:
push rax
and al, 0x0f
cmp al, 0x0a
jge sub_printhexnib_letter
add al, '0'
jmp sub_printhexnib_move
sub_printhexnib_letter:
add al, 'a'-0x0a
sub_printhexnib_move:
call sub_printc
pop rax
ret
; Print hex char (byte)
; AL=byte
sub_printhexc:
push rax
push rdx
mov dl, al
shr al, 4
call sub_printhexnib
mov al, dl
call sub_printhexnib
pop rdx
pop rax
ret
; Print hex string, advance RSI to end
; RSI=data
; RCX=len
sub_printhexs:
push rcx
or rcx, rcx
jz sub_printhexs_exit
sub_printhexs_next:
mov al, [rsi]
call sub_printhexc
inc rsi
dec rcx
jz sub_printhexs_exit
jmp sub_printhexs_next
sub_printhexs_exit:
pop rcx
ret
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Data
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
msg_kernel_boot db 'KFX kernel booting...', 0
msg_kernel_bad_magic db 'Bad kernel magic: ', 0
msg_kernel_booted db 'Kernel booted successfully.', 0
msg_kernel_panic db 'Panic - System halted.', 0
msg_idt_start db 'Interrupt Descriptor Table:', 0
msg_idt_entry db 'INT ', 0
msg_idt_end db 'End of IDT.', 0
msg_key_down db 'Key down: ', 0
msg_key_up db 'Key up: ', 0
msg_unknown_command db 'Unknown command: ', 0
keyboard_map db 0, 27, '1', '2', '3', '4', '5', '6', '7', '8', '9', '0', '+', 0, 0, 0
db 'q', 'w', 'e', 'r', 't', 'y', 'u', 'i', 'o', 'p', 0, '^', 13, 0
db 'a', 's', 'd', 'f', 'g', 'h', 'j', 'k', 'l', 0, 0, 0x27, 0, 0
db 'z', 'x', 'c', 'v', 'b', 'n', 'm', ',', '.', '-'
times 255-($-keyboard_map) db 0
console_cursor dq 0
console_buffer times 2000 dw 0
command_buffer times 256 db 0
command_pos dq 0
align 8
idt32_desc: ; Interrupt Descriptor Table info
dw 0x0000 ; IDT length (16-bit)
dd 0x00000000 ; IDT location (32-bit)
align 8
gdt32:
gdt32_null:
dq 0x0000000000000000 ; null segment
KERNEL32_CODE16 equ $-gdt32
gdt32_code16: ; 16-bit code segment with base 0x00000000 limit 0xfffff * 4kb = 4GB
dw 0xffff ; segment limiter bits 0-15
dw 0x0000 ; base address bits 0-15
db 0x00 ; base address bits 16-23
db 10011010b ; present(1), privilege(00), data/code(1), code(1), conform(0), readable(1), access(0)
db 10001111b ; granularity(1), 32bitmode(1) reserved(0), prog(0), segment limiter bits 16-19 (1111)
db 0x00 ; base address bits 24-31
KERNEL32_CODE32 equ $-gdt32
gdt32_code32: ; 32-bit code segment with base 0x00000000 limit 0xfffff * 4kb = 4GB
dw 0xffff ; segment limiter bits 0-15
dw 0x0000 ; base address bits 0-15
db 0x00 ; base address bits 16-23
db 10011010b ; present(1), privilege(00), data/code(1), code(1), conform(0), readable(1), access(0)
db 11001111b ; granularity(1), 32bitmode(1) reserved(0), prog(0), segment limiter bits 16-19 (1111)
db 0x00 ; base address bits 24-31
KERNEL32_DATA equ $-gdt32
gdt32_data: ; Data segment with base 0x00000000 limit 0xfffff * 4kb = 4GB
dw 0xffff ; segment limiter bits 0-15
dw 0x0000 ; base address bits 0-15
db 0x00 ; base address bits 16-23
db 10010010b ; present(1), privilege(00), data/code(1), data(0), direction(0), writable(1), access(0)
db 11001111b ; granularity(1), 32bitmode(1), reserved(0), prog(0), segment limiter bits 16-19 (1111)
db 0x00 ; base address bits 24-31
gdt32_end:
align 8
gdt32_desc: ; Global Descriptor Table info
dw gdt32_end - gdt32 - 1 ; GDT32 length (16 bit)
dd gdt32 ; GDT32 location (32 bit)
idt64: ; 64-bit Interrupt Descriptor Table
times 256 dq 0x0000000000000000 ; space for 256 x 128-bit descriptors
times 256 dq 0x0000000000000000
idt64_end:
align 8
idt64_desc: ; 64-bit Interrupt Descriptor Table info
dw idt64_end - idt64 - 1 ; IDT length (16-bit)
dq idt64 ; IDT location (64-bit)
align 8
gdt64:
gdt64_null:
dq 0x0000000000000000 ; null segment
KERNEL64_CODE equ $-gdt64
gdt64_code: ; Code segment
dw 0x0000 ; segment-limit-15-0
dw 0x0000 ; base-address-15-0
db 0x00 ; base-address-23-16
db 10011000b ; P(1), DPL(00), always(11), C(0), R(0), A(0)
db 00100000b ; G(0), CS.D(0), CS.L(1), AVL(0), segment-limit-19-16(0)
db 0x00 ; base-address-31-24
KERNEL64_DATA equ $-gdt64
gdt64_data: ; Data segment
dw 0x0000 ; segment-limit-15-0
dw 0x0000 ; base-address-15-0
db 0x00 ; base-address-23-16
db 10010010b ; P(1), DPL(00), always(10), E(0), W(1), A(0)
db 00000000b ; G(0), D/B(0), ?(0), AVL(0), segment-limit-19-16(0)
db 0x00 ; base-address-31-24
gdt64_end:
gdt64_desc:
dw gdt64_end - gdt64 - 1 ; 64-bit Global Descriptor Table info
dq gdt64
times 20480-4 - ($-$$) db 0 ; pad to 20kb - 2 bytes
kernel_magic dd 0xcaccaac0 ; add kernel magic at end
kernel_length equ (($-kernel_header)/512)+2 ; calculate kernel length macro
; Paging table data area, not loaded into memory, just reserved.
; These tables must be 4kb aligned in memory
align 4096
pml4_table: ; Page Map Level 4 Table (loc 0x0d000)
times 512 dq 0 ; 512 x 64-bit entries (initialized in code)
align 4096
pdp_table: ; Page Directory Pointer Table (loc 0x0e000)
times 512 dq 0 ; 512 x 64-bit entries (initialized in code)
align 4096
page_directory: ; Page Directory (loc 0x0f000)
times 512 dq 0 ; 512 x 64-bit entries (initialized in code)
align 4096
identity_table: ; Identity Page Pable (loc 0x10000)
times 512 dq 0 ; 512 x 64-bit entries (initialized in code)
; Pad to 10MB
times 10079*1024 + 512 - ($-$$) db 0
| 21.751064 | 104 | 0.703658 |
391a997cb68f7768ce324edca074d38e9bfc5cf5 | 1,647 | asm | Assembly | programs/oeis/157/A157431.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/157/A157431.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | programs/oeis/157/A157431.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | ; A157431: a(n) = 4*n^2 + 73*n + 333.
; 410,495,588,689,798,915,1040,1173,1314,1463,1620,1785,1958,2139,2328,2525,2730,2943,3164,3393,3630,3875,4128,4389,4658,4935,5220,5513,5814,6123,6440,6765,7098,7439,7788,8145,8510,8883,9264,9653,10050,10455,10868,11289,11718,12155,12600,13053,13514,13983,14460,14945,15438,15939,16448,16965,17490,18023,18564,19113,19670,20235,20808,21389,21978,22575,23180,23793,24414,25043,25680,26325,26978,27639,28308,28985,29670,30363,31064,31773,32490,33215,33948,34689,35438,36195,36960,37733,38514,39303,40100,40905,41718,42539,43368,44205,45050,45903,46764,47633,48510,49395,50288,51189,52098,53015,53940,54873,55814,56763,57720,58685,59658,60639,61628,62625,63630,64643,65664,66693,67730,68775,69828,70889,71958,73035,74120,75213,76314,77423,78540,79665,80798,81939,83088,84245,85410,86583,87764,88953,90150,91355,92568,93789,95018,96255,97500,98753,100014,101283,102560,103845,105138,106439,107748,109065,110390,111723,113064,114413,115770,117135,118508,119889,121278,122675,124080,125493,126914,128343,129780,131225,132678,134139,135608,137085,138570,140063,141564,143073,144590,146115,147648,149189,150738,152295,153860,155433,157014,158603,160200,161805,163418,165039,166668,168305,169950,171603,173264,174933,176610,178295,179988,181689,183398,185115,186840,188573,190314,192063,193820,195585,197358,199139,200928,202725,204530,206343,208164,209993,211830,213675,215528,217389,219258,221135,223020,224913,226814,228723,230640,232565,234498,236439,238388,240345,242310,244283,246264,248253,250250,252255,254268,256289,258318,260355,262400,264453,266514,268583
mov $1,$0
mul $0,4
add $0,81
mul $1,$0
add $1,410
| 183 | 1,557 | 0.820886 |
94a0cf41b13e4f981ff94cb5d3a88788fce148f6 | 1,229 | asm | Assembly | tests/dos/hello.asm | wwiv/door86c | bfdc6408bf632da74a1e58d97da3257d715f3f6e | [
"Apache-2.0"
] | 1 | 2021-11-04T03:13:25.000Z | 2021-11-04T03:13:25.000Z | tests/dos/hello.asm | wwiv/door86c | bfdc6408bf632da74a1e58d97da3257d715f3f6e | [
"Apache-2.0"
] | null | null | null | tests/dos/hello.asm | wwiv/door86c | bfdc6408bf632da74a1e58d97da3257d715f3f6e | [
"Apache-2.0"
] | null | null | null | ; ----------------------------------------------------------------------------
; hello1.asm
;
; Displays a silly message to standard output. Illustrates user-defined data.
; The easiest way to do this is to put the data in a data segment, separate
; from the code, and access it via the ds register. Note that you must have
; ds:0 pointing to your data segment (technically to your segment's GROUP)
; before you reference your data. The predefined symbol @data referes to
; the group containing the segments created by .data, .data?, .const,
; .fardata, and .fardata?.
;
; Processor: 386 or later
; Assembler: MASM
; OS: DOS 2.0 or later only
; Assemble and link with "ml hello.asm"
; set WATCOM=C:\WATCOM
; wcl hello.asm
; ----------------------------------------------------------------------------
.model small
.stack 128
.code
start: mov ax, @data
mov ds, ax
mov ah, 9
mov bx, 10h
add bx, 1
add bx, 1
add bx, 1
add bx, 1
lea dx, Msg
int 21h
mov ah, 4ch
int 21h
.data
Msg byte 'Hello, there.', 13, 10, '$'
end start
| 29.261905 | 78 | 0.502848 |
4d364bf77d2a3f75ea905574131ee0785862e7cc | 1,248 | asm | Assembly | test/sample4.asm | bivoje/shic | bb6870a5e565bfb4389c096e2fce6705d66078b3 | [
"MIT"
] | null | null | null | test/sample4.asm | bivoje/shic | bb6870a5e565bfb4389c096e2fce6705d66078b3 | [
"MIT"
] | null | null | null | test/sample4.asm | bivoje/shic | bb6870a5e565bfb4389c096e2fce6705d66078b3 | [
"MIT"
] | null | null | null | CNT START 256
NUM WORD 0 THE NUMBER TO EXAMINE
MASK WORD 1 MASK FOR BIT TESTING
COUNT WORD 0 ONE-WORD VARIABLE INITIALIZED TO 0
ZERO WORD 0 CONSTANT ZERO
ONE WORD 1 CONSTANT ONE
THREE WORD 3 CONSTANT THREE
DEVIN BYTE X'03' INPUT DEVICE NUMBER
DEVOUT BYTE X'06' OUTPUT DEVICE NUMBER
main J readin
readin TD DEVIN TEST DEVICE
JEQ halt
LDX ZERO
loopy RD DEVIN READ FROM DEVICE
STCH NUM,X
TIX THREE
JLT loopy a
start LDA MASK LOAD THE MASK TO `A`
loopf COMP ZERO COMPARE `MASK` WITH 0
JEQ output DONE IF `MASK` HAS OVERFLOWED
AND NUM A = mask & x
COMP ZERO COPARE THE BIT AT THE MASK
JEQ noinc SKIP INCREASING WHEN THE BIT IS 0
LDA COUNT LOAD COUNT
ADD ONE INCREASE COUNT BY ONE
STA COUNT SAVE TO COUNT
noinc LDA MASK LOAD THE MASK AGAIN
ADD MASK DOUBLE THE MASK
STA MASK SAVE MASK
J loopf
output TD DEVOUT TEST DEVICE
JEQ halt
LDX ZERO
loopx LDCH COUNT,X
WD DEVOUT WRITE TO DEVICE
TIX THREE
JLT loopx
halt J 0
END main
. int main()
. {
. int x = ??;
. int count = 0;
. int mask = 1;
. while(mask)
. {
. count += mask & x;
. mask += mask;
. }
. }
.
. we need 3 variable x, count ,k
. but general registers are only 2 S, T
. A = k
. S = 0
. T = x COUNT = count
| 19.2 | 48 | 0.673878 |
1f7b55a545c8f7fa95e629744076488b07cf1f41 | 747 | asm | Assembly | tests/misc/trd/inc_3let_extension.asm | fengjixuchui/sjasmplus | df0fabd2411bf89e23637fce46d273f52dafbe16 | [
"BSD-3-Clause"
] | 220 | 2016-10-22T19:44:39.000Z | 2022-03-29T20:57:04.000Z | tests/misc/trd/inc_3let_extension.asm | ped7g/sjasmplus | 487635c8057cd5594c372d9b70bc00a3f3a1ecc4 | [
"BSD-3-Clause"
] | 153 | 2018-05-07T10:31:23.000Z | 2022-03-30T04:35:59.000Z | tests/misc/trd/inc_3let_extension.asm | ped7g/sjasmplus | 487635c8057cd5594c372d9b70bc00a3f3a1ecc4 | [
"BSD-3-Clause"
] | 51 | 2016-05-12T21:27:36.000Z | 2022-03-27T15:16:16.000Z | OUTPUT "inc_3let_extension.bin"
INCTRD "inc_3let_extension/test.trd", "data.bin" ; file not found
INCTRD "inc_3let_extension/test.trd", "data.bi" ; full 288 bytes
INCTRD "inc_3let_extension/test.trd", "data.bi", 8, 7 ; just "address" chars
INCTRD "inc_3let_extension/test.trd", "data.bi", 287, 1 ; just last "a" byte
INCTRD "inc_3let_extension/test.trd", "data.bi", 287, 2 ; err: length after offset OOB
INCTRD "inc_3let_extension/test.trd", "data.bi", 286 ; just last "ta" bytes
INCTRD "inc_3let_extension/test.trd", "data.bi", 288 ; err: offset after the file
INCTRD "inc_3let_extension/test.trd", "data.bi", , 4 ; add first 4 "Data" bytes
OUTEND
| 67.909091 | 94 | 0.638554 |
17d9b4823adb1a31e61c05074c6a0e2469571207 | 197 | asm | Assembly | ExamplePrograms/Bits.asm | douaumont/i8008_emu | 709a1809f1af443783a7d856f33c5ff05f2e418d | [
"MIT"
] | null | null | null | ExamplePrograms/Bits.asm | douaumont/i8008_emu | 709a1809f1af443783a7d856f33c5ff05f2e418d | [
"MIT"
] | null | null | null | ExamplePrograms/Bits.asm | douaumont/i8008_emu | 709a1809f1af443783a7d856f33c5ff05f2e418d | [
"MIT"
] | null | null | null | ;This program counts, how many significant bits are in the number, read from the port 0
;The output shall be written to port 8
inp 0
lbi 0
loop:
cpi 0
jtz exit
inb
rrc
jmp loop
exit:
lab
out 8
hlt | 13.133333 | 87 | 0.756345 |
b237a5bf619594ca96533390a02dc7a154e3796c | 538 | asm | Assembly | programs/oeis/315/A315405.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/315/A315405.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | programs/oeis/315/A315405.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | ; A315405: Coordination sequence Gal.3.15.3 where G.u.t.v denotes the coordination sequence for a vertex of type v in tiling number t in the Galebach list of u-uniform tilings.
; 1,6,11,15,19,24,30,36,41,45,49,54,60,66,71,75,79,84,90,96,101,105,109,114,120,126,131,135,139,144,150,156,161,165,169,174,180,186,191,195,199,204,210,216,221,225,229,234,240,246
mov $2,$0
mov $3,$0
mov $4,$0
add $4,$0
mov $5,2
lpb $0
sub $0,1
add $1,1
trn $1,$5
mov $5,$3
mov $3,$1
lpe
mov $1,$4
add $1,1
sub $1,$3
lpb $2
add $1,3
sub $2,1
lpe
| 23.391304 | 179 | 0.66171 |
f42d5b843eed7ef92d43cbb516f5c58ca2dcd40b | 878 | asm | Assembly | oeis/152/A152928.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/152/A152928.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/152/A152928.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A152928: Number of sets (in the Hausdorff metric geometry) at each location between two sets defining a polygonal configuration consisting of two m-gonal polygonal components chained with string components of length 1 as m varies.
; Submitted by Jon Maiga
; 113,765,5234,35865,245813,1684818,11547905,79150509,542505650,3718389033,25486217573,174685133970,1197309720209,8206482907485,56248070632178,385530011517753,2642462009992085,18111704058426834,124139466398995745,850864560734543373,5831912458742807858,39972522650465111625,273975746094512973509,1877857700011125702930,12871028153983366946993,88219339377872442926013,604664347491123733535090,4144431093059993691819609,28406353303928832109202165,194700042034441831072595538,1334493940937163985398966593
add $0,2
mov $1,4
lpb $0
sub $0,1
sub $2,1
add $2,$1
add $1,$2
add $2,$1
add $1,$2
lpe
mov $0,$1
add $0,1
| 51.647059 | 500 | 0.83713 |
48a8beadc98921983f06ea3cbbeb8362c097f45c | 1,049 | asm | Assembly | programs/oeis/083/A083089.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/083/A083089.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/083/A083089.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A083089: Numbers that are congruent to {0, 2, 4, 6, 7, 9, 11} mod 12.
; 0,2,4,6,7,9,11,12,14,16,18,19,21,23,24,26,28,30,31,33,35,36,38,40,42,43,45,47,48,50,52,54,55,57,59,60,62,64,66,67,69,71,72,74,76,78,79,81,83,84,86,88,90,91,93,95,96,98,100,102,103,105,107,108,110,112,114,115,117,119,120,122,124,126,127,129,131,132,134,136,138,139,141,143,144,146,148,150,151,153,155,156,158,160,162,163,165,167,168,170,172,174,175,177,179,180,182,184,186,187,189,191,192,194,196,198,199,201,203,204,206,208,210,211,213,215,216,218,220,222,223,225,227,228,230,232,234,235,237,239,240,242,244,246,247,249,251,252,254,256,258,259,261,263,264,266,268,270,271,273,275,276,278,280,282,283,285,287,288,290,292,294,295,297,299,300,302,304,306,307,309,311,312,314,316,318,319,321,323,324,326,328,330,331,333,335,336,338,340,342,343,345,347,348,350,352,354,355,357,359,360,362,364,366,367,369,371,372,374,376,378,379,381,383,384,386,388,390,391,393,395,396,398,400,402,403,405,407,408,410,412,414,415,417,419,420,422,424,426,427
mul $0,2
mov $1,$0
div $0,7
sub $1,$0
| 131.125 | 937 | 0.71592 |
d0117a608b14f93e26749cc1261f9a282dad30c0 | 7,883 | asm | Assembly | Transynther/x86/_processed/NC/_zr_/i3-7100_9_0x84_notsx.log_21829_1740.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NC/_zr_/i3-7100_9_0x84_notsx.log_21829_1740.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NC/_zr_/i3-7100_9_0x84_notsx.log_21829_1740.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r12
push %r13
push %rax
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_WC_ht+0xfb8b, %rsi
nop
nop
and %rax, %rax
and $0xffffffffffffffc0, %rsi
vmovaps (%rsi), %ymm3
vextracti128 $0, %ymm3, %xmm3
vpextrq $0, %xmm3, %rdx
nop
nop
nop
nop
xor %rax, %rax
lea addresses_A_ht+0x7f8b, %r10
nop
nop
xor %r12, %r12
mov $0x6162636465666768, %r13
movq %r13, %xmm1
and $0xffffffffffffffc0, %r10
movntdq %xmm1, (%r10)
nop
nop
nop
nop
nop
sub $54793, %rsi
lea addresses_normal_ht+0x15f8b, %r13
nop
nop
nop
nop
cmp %r12, %r12
movl $0x61626364, (%r13)
nop
nop
nop
nop
nop
inc %r12
lea addresses_normal_ht+0xf3bb, %rsi
lea addresses_normal_ht+0x1647b, %rdi
nop
xor %r12, %r12
mov $121, %rcx
rep movsq
xor $57008, %rdi
lea addresses_A_ht+0x14b8b, %r12
nop
nop
nop
nop
nop
dec %r13
and $0xffffffffffffffc0, %r12
movaps (%r12), %xmm1
vpextrq $0, %xmm1, %rsi
dec %rdx
lea addresses_WC_ht+0x12c03, %rsi
lea addresses_A_ht+0x10367, %rdi
nop
nop
nop
nop
inc %rax
mov $77, %rcx
rep movsb
nop
nop
nop
nop
and $64252, %r13
lea addresses_D_ht+0x738b, %rsi
lea addresses_WC_ht+0x778b, %rdi
nop
nop
nop
nop
sub $54930, %r10
mov $77, %rcx
rep movsq
add %r13, %r13
lea addresses_WC_ht+0x4543, %rsi
lea addresses_normal_ht+0x1a48b, %rdi
nop
nop
cmp $40652, %r13
mov $101, %rcx
rep movsq
nop
nop
nop
nop
nop
inc %rsi
lea addresses_D_ht+0x1e38b, %r13
nop
nop
add $6920, %r12
mov (%r13), %ecx
nop
nop
nop
nop
add %r12, %r12
lea addresses_WT_ht+0xbe2b, %rsi
lea addresses_WC_ht+0x187cb, %rdi
inc %rdx
mov $84, %rcx
rep movsq
cmp %rax, %rax
lea addresses_D_ht+0x138f3, %r10
nop
nop
nop
nop
nop
cmp %rsi, %rsi
movb (%r10), %r12b
nop
nop
nop
nop
sub $13420, %rcx
lea addresses_D_ht+0x12f8b, %rsi
nop
nop
nop
nop
cmp %r12, %r12
movb (%rsi), %r10b
nop
xor $34211, %rsi
lea addresses_WC_ht+0x14a4b, %rcx
nop
nop
nop
nop
nop
inc %r13
mov (%rcx), %edx
nop
nop
nop
xor $59698, %rdi
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rax
pop %r13
pop %r12
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r11
push %r12
push %r15
push %rbx
push %rdi
push %rsi
// Load
lea addresses_WC+0x1bb8b, %r15
nop
nop
nop
nop
mfence
movups (%r15), %xmm1
vpextrq $1, %xmm1, %rbx
nop
nop
inc %r15
// Store
lea addresses_A+0x1ce3b, %r10
nop
nop
nop
nop
add %rsi, %rsi
movb $0x51, (%r10)
nop
nop
nop
and $35738, %r11
// Faulty Load
mov $0x37682f000000038b, %r11
nop
and %r12, %r12
movb (%r11), %r15b
lea oracles, %rsi
and $0xff, %r15
shlq $12, %r15
mov (%rsi,%r15,1), %r15
pop %rsi
pop %rdi
pop %rbx
pop %r15
pop %r12
pop %r11
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'src': {'type': 'addresses_NC', 'same': False, 'size': 8, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_WC', 'same': False, 'size': 16, 'congruent': 9, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'dst': {'type': 'addresses_A', 'same': False, 'size': 1, 'congruent': 3, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
[Faulty Load]
{'src': {'type': 'addresses_NC', 'same': True, 'size': 1, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'type': 'addresses_WC_ht', 'same': False, 'size': 32, 'congruent': 11, 'NT': False, 'AVXalign': True}, 'OP': 'LOAD'}
{'dst': {'type': 'addresses_A_ht', 'same': False, 'size': 16, 'congruent': 6, 'NT': True, 'AVXalign': False}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_normal_ht', 'same': False, 'size': 4, 'congruent': 10, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'src': {'type': 'addresses_normal_ht', 'congruent': 4, 'same': False}, 'dst': {'type': 'addresses_normal_ht', 'congruent': 4, 'same': False}, 'OP': 'REPM'}
{'src': {'type': 'addresses_A_ht', 'same': False, 'size': 16, 'congruent': 8, 'NT': False, 'AVXalign': True}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_WC_ht', 'congruent': 2, 'same': False}, 'dst': {'type': 'addresses_A_ht', 'congruent': 2, 'same': True}, 'OP': 'REPM'}
{'src': {'type': 'addresses_D_ht', 'congruent': 11, 'same': False}, 'dst': {'type': 'addresses_WC_ht', 'congruent': 10, 'same': False}, 'OP': 'REPM'}
{'src': {'type': 'addresses_WC_ht', 'congruent': 3, 'same': False}, 'dst': {'type': 'addresses_normal_ht', 'congruent': 8, 'same': False}, 'OP': 'REPM'}
{'src': {'type': 'addresses_D_ht', 'same': False, 'size': 4, 'congruent': 9, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_WT_ht', 'congruent': 2, 'same': False}, 'dst': {'type': 'addresses_WC_ht', 'congruent': 6, 'same': False}, 'OP': 'REPM'}
{'src': {'type': 'addresses_D_ht', 'same': False, 'size': 1, 'congruent': 3, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_D_ht', 'same': False, 'size': 1, 'congruent': 7, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_WC_ht', 'same': False, 'size': 4, 'congruent': 6, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'00': 21829}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
| 32.17551 | 2,999 | 0.659394 |
4855f0ca3ad194e99cdb052aadc16c3921d25fb3 | 308 | asm | Assembly | programs/oeis/100/A100219.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/100/A100219.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/100/A100219.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A100219: Expansion of (1-2*x)/((1-x)*(1-x+x^2)).
; 1,0,-2,-3,-2,0,1,0,-2,-3,-2,0,1,0,-2,-3,-2,0,1,0,-2,-3,-2,0,1,0,-2,-3,-2,0,1,0,-2,-3,-2,0,1,0,-2,-3,-2,0,1,0,-2,-3,-2,0,1,0,-2,-3,-2,0,1,0,-2,-3,-2,0,1,0,-2,-3,-2,0,1,0,-2,-3,-2,0
mov $1,1
mov $2,6
lpb $2
gcd $2,$0
add $0,1
sub $1,$2
lpe
mov $0,$1
| 25.666667 | 181 | 0.441558 |
e9605605f081e36fd644b3acea6315714292f2f4 | 7,600 | asm | Assembly | Transynther/x86/_processed/NONE/_zr_/i7-7700_9_0x48.log_21829_2501.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_zr_/i7-7700_9_0x48.log_21829_2501.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_zr_/i7-7700_9_0x48.log_21829_2501.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r12
push %r15
push %r9
push %rbp
push %rcx
push %rdi
push %rsi
lea addresses_D_ht+0xe5c4, %r12
nop
cmp $26922, %r10
mov (%r12), %ebp
xor %r9, %r9
lea addresses_UC_ht+0x13b40, %r10
nop
nop
xor %rsi, %rsi
vmovups (%r10), %ymm1
vextracti128 $0, %ymm1, %xmm1
vpextrq $0, %xmm1, %r15
nop
sub $10037, %r9
lea addresses_D_ht+0x12acc, %rsi
lea addresses_D_ht+0x13d60, %rdi
nop
nop
nop
nop
cmp %rbp, %rbp
mov $60, %rcx
rep movsq
nop
nop
nop
add %rcx, %rcx
lea addresses_WC_ht+0x58b4, %rdi
sub $18213, %r9
mov $0x6162636465666768, %rbp
movq %rbp, %xmm5
movups %xmm5, (%rdi)
nop
and %rbp, %rbp
lea addresses_D_ht+0x175cc, %r15
nop
nop
nop
xor %rdi, %rdi
movl $0x61626364, (%r15)
nop
add %r10, %r10
lea addresses_D_ht+0xdecc, %rsi
lea addresses_D_ht+0x4dcc, %rdi
clflush (%rsi)
nop
nop
nop
nop
dec %r9
mov $76, %rcx
rep movsb
nop
sub %r15, %r15
lea addresses_UC_ht+0x91cc, %rsi
lea addresses_D_ht+0x1a146, %rdi
nop
sub %r15, %r15
mov $14, %rcx
rep movsq
nop
nop
nop
nop
cmp $10796, %r10
lea addresses_A_ht+0x11dcc, %rsi
lea addresses_WT_ht+0x16dcc, %rdi
clflush (%rdi)
nop
nop
nop
nop
nop
xor %r9, %r9
mov $27, %rcx
rep movsq
nop
nop
nop
nop
and $42219, %rsi
lea addresses_A_ht+0x1efcc, %rsi
lea addresses_WC_ht+0x53cc, %rdi
nop
nop
nop
nop
nop
add $22345, %r9
mov $71, %rcx
rep movsw
nop
nop
nop
nop
and $10678, %rsi
lea addresses_WC_ht+0x139cc, %r12
and $24038, %rcx
mov $0x6162636465666768, %rsi
movq %rsi, %xmm3
vmovups %ymm3, (%r12)
nop
and $40362, %rcx
pop %rsi
pop %rdi
pop %rcx
pop %rbp
pop %r9
pop %r15
pop %r12
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r12
push %r13
push %r14
push %r9
push %rax
push %rcx
// Load
lea addresses_US+0x1c5cc, %rcx
nop
sub $8708, %r9
movb (%rcx), %r14b
nop
xor $46042, %r10
// Store
lea addresses_US+0x146cc, %r10
nop
nop
inc %r12
mov $0x5152535455565758, %rax
movq %rax, %xmm1
movaps %xmm1, (%r10)
sub %r14, %r14
// Store
lea addresses_WT+0xa7cc, %rcx
nop
nop
nop
nop
sub %rax, %rax
movw $0x5152, (%rcx)
nop
xor $35986, %r12
// Store
lea addresses_D+0x10fcc, %r14
dec %r12
movl $0x51525354, (%r14)
sub %rax, %rax
// Faulty Load
lea addresses_WT+0x155cc, %r12
nop
nop
cmp $14762, %rcx
vmovups (%r12), %ymm0
vextracti128 $0, %ymm0, %xmm0
vpextrq $0, %xmm0, %r13
lea oracles, %r10
and $0xff, %r13
shlq $12, %r13
mov (%r10,%r13,1), %r13
pop %rcx
pop %rax
pop %r9
pop %r14
pop %r13
pop %r12
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'type': 'addresses_WT', 'AVXalign': False, 'congruent': 0, 'size': 32, 'same': False, 'NT': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_US', 'AVXalign': False, 'congruent': 11, 'size': 1, 'same': False, 'NT': True}}
{'OP': 'STOR', 'dst': {'type': 'addresses_US', 'AVXalign': True, 'congruent': 8, 'size': 16, 'same': False, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WT', 'AVXalign': False, 'congruent': 7, 'size': 2, 'same': False, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_D', 'AVXalign': False, 'congruent': 8, 'size': 4, 'same': False, 'NT': False}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'type': 'addresses_WT', 'AVXalign': False, 'congruent': 0, 'size': 32, 'same': True, 'NT': False}}
<gen_prepare_buffer>
{'OP': 'LOAD', 'src': {'type': 'addresses_D_ht', 'AVXalign': True, 'congruent': 1, 'size': 4, 'same': False, 'NT': True}}
{'OP': 'LOAD', 'src': {'type': 'addresses_UC_ht', 'AVXalign': False, 'congruent': 2, 'size': 32, 'same': False, 'NT': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_D_ht', 'congruent': 5, 'same': True}, 'dst': {'type': 'addresses_D_ht', 'congruent': 0, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WC_ht', 'AVXalign': False, 'congruent': 3, 'size': 16, 'same': False, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_D_ht', 'AVXalign': False, 'congruent': 9, 'size': 4, 'same': False, 'NT': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_D_ht', 'congruent': 7, 'same': True}, 'dst': {'type': 'addresses_D_ht', 'congruent': 10, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_UC_ht', 'congruent': 10, 'same': False}, 'dst': {'type': 'addresses_D_ht', 'congruent': 1, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_A_ht', 'congruent': 10, 'same': False}, 'dst': {'type': 'addresses_WT_ht', 'congruent': 10, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_A_ht', 'congruent': 9, 'same': False}, 'dst': {'type': 'addresses_WC_ht', 'congruent': 8, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WC_ht', 'AVXalign': False, 'congruent': 10, 'size': 32, 'same': False, 'NT': False}}
{'00': 21829}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
| 35.514019 | 2,999 | 0.655395 |
f1bbc46a3f614fcb153803491064977539f1c721 | 172 | nasm | Assembly | Chapter03/data-manipulation/move-registers.nasm | firebitsbr/Penetration-Testing-with-Shellcode | 2d756bccace6b727e050b2010ebf23e08d221fdc | [
"MIT"
] | 30 | 2018-05-15T21:45:09.000Z | 2022-03-23T20:04:25.000Z | Chapter03/data-manipulation/move-registers.nasm | naveenselvan/Penetration-Testing-with-Shellcode | 2d756bccace6b727e050b2010ebf23e08d221fdc | [
"MIT"
] | 1 | 2020-10-19T13:03:32.000Z | 2020-11-24T05:50:17.000Z | Chapter03/data-manipulation/move-registers.nasm | naveenselvan/Penetration-Testing-with-Shellcode | 2d756bccace6b727e050b2010ebf23e08d221fdc | [
"MIT"
] | 18 | 2018-02-20T21:21:23.000Z | 2022-01-26T04:19:28.000Z | global _start
section .text
_start:
mov rax, 0x1234
mov rbx, 0x56789
mov rdi, rax
mov rsi, rbx
mov rax, 60
mov rdi, 0
syscall
section .data
| 10.75 | 20 | 0.610465 |
1f2287f01de4e3d2ca6ade9ae9282bee98c15c18 | 6,097 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xa0_notsx.log_21829_1752.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xa0_notsx.log_21829_1752.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xa0_notsx.log_21829_1752.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r12
push %r14
push %r8
push %rax
push %rbx
push %rcx
push %rdi
push %rsi
lea addresses_UC_ht+0x1e6a, %rsi
lea addresses_normal_ht+0x4e0c, %rdi
nop
nop
nop
add $19078, %rbx
mov $72, %rcx
rep movsl
nop
nop
nop
nop
inc %rcx
lea addresses_UC_ht+0x48aa, %rax
sub %rdi, %rdi
and $0xffffffffffffffc0, %rax
vmovntdqa (%rax), %ymm4
vextracti128 $1, %ymm4, %xmm4
vpextrq $1, %xmm4, %r8
nop
nop
nop
nop
nop
xor %rbx, %rbx
lea addresses_WT_ht+0xb2a, %rsi
lea addresses_UC_ht+0x14b7a, %rdi
nop
nop
nop
nop
nop
sub $40209, %r14
mov $19, %rcx
rep movsl
nop
dec %r14
lea addresses_A_ht+0x9caa, %rsi
lea addresses_D_ht+0x7c02, %rdi
nop
nop
nop
cmp %r14, %r14
mov $23, %rcx
rep movsl
nop
nop
nop
nop
cmp $46670, %r14
lea addresses_normal_ht+0x14c2a, %rsi
lea addresses_normal_ht+0x7c1a, %rdi
nop
nop
nop
nop
sub %r12, %r12
mov $12, %rcx
rep movsw
nop
sub $24987, %rcx
lea addresses_WT_ht+0x84aa, %rsi
lea addresses_A_ht+0xf19c, %rdi
nop
nop
nop
add %r12, %r12
mov $37, %rcx
rep movsl
xor %r8, %r8
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %rax
pop %r8
pop %r14
pop %r12
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r13
push %r9
push %rax
push %rbp
push %rcx
push %rsi
// Store
lea addresses_D+0x17c2a, %rsi
nop
nop
nop
nop
dec %rax
mov $0x5152535455565758, %r9
movq %r9, (%rsi)
nop
nop
add %rcx, %rcx
// Store
lea addresses_A+0x652a, %r11
sub %rcx, %rcx
movw $0x5152, (%r11)
sub $2457, %r9
// Faulty Load
lea addresses_UC+0x1a4aa, %r13
dec %rbp
mov (%r13), %rcx
lea oracles, %r11
and $0xff, %rcx
shlq $12, %rcx
mov (%r11,%rcx,1), %rcx
pop %rsi
pop %rcx
pop %rbp
pop %rax
pop %r9
pop %r13
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'src': {'type': 'addresses_UC', 'AVXalign': True, 'size': 32, 'NT': False, 'same': True, 'congruent': 0}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'type': 'addresses_D', 'AVXalign': False, 'size': 8, 'NT': False, 'same': False, 'congruent': 3}}
{'OP': 'STOR', 'dst': {'type': 'addresses_A', 'AVXalign': False, 'size': 2, 'NT': False, 'same': False, 'congruent': 6}}
[Faulty Load]
{'src': {'type': 'addresses_UC', 'AVXalign': False, 'size': 8, 'NT': False, 'same': True, 'congruent': 0}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'type': 'addresses_UC_ht', 'congruent': 5, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_normal_ht', 'congruent': 1, 'same': True}}
{'src': {'type': 'addresses_UC_ht', 'AVXalign': False, 'size': 32, 'NT': True, 'same': False, 'congruent': 10}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_WT_ht', 'congruent': 6, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_UC_ht', 'congruent': 2, 'same': False}}
{'src': {'type': 'addresses_A_ht', 'congruent': 11, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_D_ht', 'congruent': 1, 'same': False}}
{'src': {'type': 'addresses_normal_ht', 'congruent': 3, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_normal_ht', 'congruent': 1, 'same': False}}
{'src': {'type': 'addresses_WT_ht', 'congruent': 11, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_A_ht', 'congruent': 1, 'same': False}}
{'37': 21829}
37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37
*/
| 39.335484 | 2,999 | 0.661637 |
f47926797e58a192b19fec796601624f07152474 | 8,872 | asm | Assembly | memory/misc_rw_registers_gb_mode/video.asm | AntonioND/gbc-hw-tests | 631e60000c885154a8526df0b148847f9c34ce42 | [
"MIT"
] | 6 | 2018-07-21T12:11:21.000Z | 2021-07-23T16:32:47.000Z | video/bg_disabled_gbc/video.asm | PMArkive/gbc-hw-tests | 631e60000c885154a8526df0b148847f9c34ce42 | [
"MIT"
] | null | null | null | video/bg_disabled_gbc/video.asm | PMArkive/gbc-hw-tests | 631e60000c885154a8526df0b148847f9c34ce42 | [
"MIT"
] | 3 | 2016-04-26T07:45:34.000Z | 2018-12-30T05:45:14.000Z |
INCLUDE "hardware.inc"
INCLUDE "header.inc"
SECTION "Video_General",HOME
;--------------------------------------------------------------------------
;- wait_ly() b = ly to wait for -
;--------------------------------------------------------------------------
wait_ly::
ld c,rLY & $FF
.no_same_ly:
ld a,[$FF00+c]
cp a,b
jr nz,.no_same_ly
ret
;--------------------------------------------------------------------------
;- wait_frames() e = frames to wait -
;--------------------------------------------------------------------------
wait_frames::
call wait_vbl
dec e
jr nz,wait_frames
ret
;--------------------------------------------------------------------------
;- screen_off() -
;--------------------------------------------------------------------------
screen_off::
ld a,[rLCDC]
and a,LCDCF_ON
jr z,.lcd_off_
ld b,$91
call wait_ly
xor a,a
ld [rLCDC],a ;Shutdown LCD
.lcd_off_:
ret
;--------------------------------------------------------------------------
;- wait_screen_blank() -
;--------------------------------------------------------------------------
wait_screen_blank::
ld a,[rSTAT]
bit 1,a
jr nz,wait_screen_blank ; Not mode 0 or 1
ret
;--------------------------------------------------------------------------
;- vram_copy() bc = size hl = source address de = dest address -
;--------------------------------------------------------------------------
vram_copy::
ld a,[rSTAT]
bit 1,a
jr nz,vram_copy ; Not mode 0 or 1
ld a,[hl+]
ld [de],a
inc de
dec bc
ld a,b
or a,c
jr nz,vram_copy
ret
;--------------------------------------------------------------------------
;- vram_memset() bc = size d = value hl = dest address -
;--------------------------------------------------------------------------
vram_memset::
ld a,[rSTAT]
bit 1,a
jr nz,vram_memset ; Not mode 0 or 1
ld [hl],d
inc hl
dec bc
ld a,b
or a,c
jr nz,vram_memset
ret
;--------------------------------------------------------------------------
;- vram_copy_tiles() bc = tiles de = start index hl = source -
;--------------------------------------------------------------------------
vram_copy_tiles::
push hl
ld h,d
ld l,e
add hl,hl
add hl,hl
add hl,hl
add hl,hl ; index * 16
ld de,$8000
add hl,de ; dest + base
ld d,h
ld e,l
pop hl
; de = dest
._copy_tile:
push bc
ld bc,$0010
call vram_copy
pop bc
dec bc
ld a,b
or c
jr nz,._copy_tile
ret
;--------------------------------------------------------------------------------------------------
;--------------------------------------------------------------------------------------------------
;-- SPRITES --
;--------------------------------------------------------------------------------------------------
;--------------------------------------------------------------------------------------------------
;--------------------------------------------------------------------------
;- RAM VARIABLES -
;--------------------------------------------------------------------------
SECTION "OAMCopy",BSS[$C000]
OAM_Copy: DS $A0 ; We will use DMA to copy this to OAM
;--------------------------------------------------------------------------
;- FUNCTIONS -
;--------------------------------------------------------------------------
SECTION "Video_Sprites",HOME
;--------------------------------------------------------------------------
;- sprite_get_base_pointer() l = sprite return = hl destroys de -
;--------------------------------------------------------------------------
sprite_get_base_pointer::
ld h,$00
add hl,hl
add hl,hl ; spr number *= 4
ld de,OAM_Copy
add hl,de
ret
;--------------------------------------------------------------------------
;- sprite_set_xy() b = x c = y l = sprite number -
;--------------------------------------------------------------------------
sprite_set_xy::
call sprite_get_base_pointer
ld [hl],c
inc hl
ld [hl],b
ret
;--------------------------------------------------------------------------
;- sprite_set_tile() a = tile l = sprite number -
;--------------------------------------------------------------------------
sprite_set_tile::
call sprite_get_base_pointer
inc hl
inc hl
ld [hl],a
ret
;--------------------------------------------------------------------------
;- sprite_set_params() a = params l = sprite number -
;--------------------------------------------------------------------------
sprite_set_params::
call sprite_get_base_pointer
inc hl
inc hl
inc hl
ld [hl],a
ret
;--------------------------------------------------------------------------
;- spr_set_palette() a = palette number hl = pointer to data -
;--------------------------------------------------------------------------
spr_set_palette::
swap a
rra ; multiply palette by 8
set 7,a ; auto increment
ld [rOCPS],a
ld a,[hl+]
ld [rOCPD],a
ld a,[hl+]
ld [rOCPD],a
ld a,[hl+]
ld [rOCPD],a
ld a,[hl+]
ld [rOCPD],a
ld a,[hl+]
ld [rOCPD],a
ld a,[hl+]
ld [rOCPD],a
ld a,[hl+]
ld [rOCPD],a
ld a,[hl+]
ld [rOCPD],a
ret
;--------------------------------------------------------------------------
;- init_OAM() -
;--------------------------------------------------------------------------
init_OAM::
ld bc,__refresh_OAM_end - __refresh_OAM
ld hl,__refresh_OAM
ld de,refresh_OAM_HRAM
call memcopy
ret
__refresh_OAM:
ld [rDMA],a
ld a,$28 ;delay 200ms
.delay
dec a
jr nz,.delay
ret
__refresh_OAM_end:
;--------------------------------------------------------------------------
;- refresh_OAM() -
;--------------------------------------------------------------------------
refresh_OAM::
ld a,OAM_Copy >> 8
jp refresh_OAM_HRAM
;--------------------------------------------------------------------------
;- refresh_custom_OAM() -
;--------------------------------------------------------------------------
refresh_custom_OAM::
jp refresh_OAM_HRAM
;--------------------------------------------------------------------------
;- HRAM VARIABLES -
;--------------------------------------------------------------------------
SECTION "OAMRefreshFn",HRAM[$FF80]
refresh_OAM_HRAM: DS (__refresh_OAM_end - __refresh_OAM)
;--------------------------------------------------------------------------------------------------
;--------------------------------------------------------------------------------------------------
;-- BACKGROUND --
;--------------------------------------------------------------------------------------------------
;--------------------------------------------------------------------------------------------------
SECTION "Video_Background",HOME
;--------------------------------------------------------------------------
;- bg_set_palette() a = palette number hl = pointer to data -
;--------------------------------------------------------------------------
bg_set_palette::
swap a ; \ multiply
rrca ; / palette by 8
set 7,a ; auto increment
ld [rBCPS],a
ld a,[hl+]
ld [rBCPD],a
ld a,[hl+]
ld [rBCPD],a
ld a,[hl+]
ld [rBCPD],a
ld a,[hl+]
ld [rBCPD],a
ld a,[hl+]
ld [rBCPD],a
ld a,[hl+]
ld [rBCPD],a
ld a,[hl+]
ld [rBCPD],a
ld a,[hl+]
ld [rBCPD],a
ret
;--------------------------------------------------------------------------
;- bg_set_tile_wrap() b = x c = y a = tile index -
;--------------------------------------------------------------------------
bg_set_tile_wrap::
ld l,a
ld h,31
ld a,b
and a,h
ld b,a
ld a,c
and a,h
ld c,a
ld a,l
; Fall through
;--------------------------------------------------------------------------
;- bg_set_tile() b = x c = y a = tile index -
;--------------------------------------------------------------------------
bg_set_tile::
; ld de,$9800
ld d,$98
ld e,b ; de = base + x
ld l,c
ld h,$00 ; hl = y
add hl,hl
add hl,hl
add hl,hl
add hl,hl
add hl,hl ; y * 32
add hl,de ; hl = base + x + (y * 32)
ld [hl],a
ret
| 22.807198 | 99 | 0.276488 |
f1d9d314799185ed0c587a307b2771254606f66d | 7,689 | asm | Assembly | Transynther/x86/_processed/AVXALIGN/_st_/i3-7100_9_0x84_notsx.log_21829_1378.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/AVXALIGN/_st_/i3-7100_9_0x84_notsx.log_21829_1378.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/AVXALIGN/_st_/i3-7100_9_0x84_notsx.log_21829_1378.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r15
push %r8
push %r9
push %rax
push %rbp
push %rcx
push %rdi
push %rsi
lea addresses_normal_ht+0x16a0b, %r9
nop
dec %rax
mov $0x6162636465666768, %rcx
movq %rcx, (%r9)
nop
nop
nop
nop
nop
dec %rbp
lea addresses_normal_ht+0xe4f3, %rsi
lea addresses_A_ht+0x9b0b, %rdi
nop
add $22788, %r8
mov $39, %rcx
rep movsl
nop
nop
sub %rax, %rax
lea addresses_D_ht+0x9d8b, %rsi
lea addresses_normal_ht+0x7eca, %rdi
nop
nop
dec %r15
mov $23, %rcx
rep movsq
nop
nop
add %r9, %r9
lea addresses_A_ht+0x1edb, %rsi
lea addresses_A_ht+0xed47, %rdi
nop
nop
nop
nop
sub $3415, %r15
mov $43, %rcx
rep movsb
nop
nop
nop
nop
inc %r15
lea addresses_UC_ht+0x5454, %rsi
lea addresses_D_ht+0x100fb, %rdi
clflush (%rsi)
nop
nop
nop
dec %rbp
mov $112, %rcx
rep movsq
nop
nop
nop
nop
nop
add %rax, %rax
lea addresses_normal_ht+0x1970b, %r8
nop
add %rcx, %rcx
mov $0x6162636465666768, %rsi
movq %rsi, %xmm0
vmovups %ymm0, (%r8)
nop
add $27328, %rdi
lea addresses_WC_ht+0x6c6b, %rbp
cmp $65258, %rax
mov (%rbp), %rdi
nop
nop
nop
cmp $33171, %r15
lea addresses_WT_ht+0x9beb, %r15
nop
nop
nop
sub %r9, %r9
movb (%r15), %cl
nop
nop
nop
xor $40729, %r15
lea addresses_WC_ht+0x1630b, %rsi
lea addresses_A_ht+0x23fb, %rdi
nop
nop
nop
nop
nop
and $22011, %rax
mov $20, %rcx
rep movsb
nop
nop
xor $4459, %rbp
lea addresses_normal_ht+0x62a4, %rsi
lea addresses_normal_ht+0xf2ef, %rdi
nop
nop
nop
nop
nop
and $44740, %rbp
mov $122, %rcx
rep movsw
nop
nop
nop
nop
add %r8, %r8
lea addresses_WC_ht+0x17e0b, %r15
nop
nop
cmp $8399, %rdi
movb (%r15), %r9b
nop
nop
nop
dec %rcx
lea addresses_normal_ht+0x11a0b, %rsi
lea addresses_D_ht+0x167fb, %rdi
nop
nop
nop
nop
xor %r9, %r9
mov $17, %rcx
rep movsw
nop
nop
add $19098, %rsi
lea addresses_D_ht+0x1c80b, %rbp
nop
nop
nop
nop
cmp %r9, %r9
mov $0x6162636465666768, %rax
movq %rax, %xmm0
vmovups %ymm0, (%rbp)
nop
nop
sub %r8, %r8
lea addresses_A_ht+0x1420b, %rdi
add $18004, %rsi
mov $0x6162636465666768, %rcx
movq %rcx, %xmm0
vmovups %ymm0, (%rdi)
nop
nop
and $33654, %r8
pop %rsi
pop %rdi
pop %rcx
pop %rbp
pop %rax
pop %r9
pop %r8
pop %r15
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r13
push %r14
push %r8
push %rbp
push %rsi
// Faulty Load
lea addresses_WT+0x1ea0b, %rbp
nop
nop
nop
nop
sub $22312, %r13
movb (%rbp), %r11b
lea oracles, %r14
and $0xff, %r11
shlq $12, %r11
mov (%r14,%r11,1), %r11
pop %rsi
pop %rbp
pop %r8
pop %r14
pop %r13
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'src': {'type': 'addresses_WT', 'same': False, 'size': 4, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
[Faulty Load]
{'src': {'type': 'addresses_WT', 'same': True, 'size': 1, 'congruent': 0, 'NT': True, 'AVXalign': False}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'dst': {'type': 'addresses_normal_ht', 'same': False, 'size': 8, 'congruent': 7, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'src': {'type': 'addresses_normal_ht', 'congruent': 3, 'same': False}, 'dst': {'type': 'addresses_A_ht', 'congruent': 8, 'same': False}, 'OP': 'REPM'}
{'src': {'type': 'addresses_D_ht', 'congruent': 0, 'same': True}, 'dst': {'type': 'addresses_normal_ht', 'congruent': 0, 'same': False}, 'OP': 'REPM'}
{'src': {'type': 'addresses_A_ht', 'congruent': 2, 'same': False}, 'dst': {'type': 'addresses_A_ht', 'congruent': 2, 'same': False}, 'OP': 'REPM'}
{'src': {'type': 'addresses_UC_ht', 'congruent': 0, 'same': False}, 'dst': {'type': 'addresses_D_ht', 'congruent': 3, 'same': True}, 'OP': 'REPM'}
{'dst': {'type': 'addresses_normal_ht', 'same': False, 'size': 32, 'congruent': 5, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'src': {'type': 'addresses_WC_ht', 'same': False, 'size': 8, 'congruent': 1, 'NT': False, 'AVXalign': True}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_WT_ht', 'same': False, 'size': 1, 'congruent': 5, 'NT': False, 'AVXalign': True}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_WC_ht', 'congruent': 8, 'same': False}, 'dst': {'type': 'addresses_A_ht', 'congruent': 4, 'same': False}, 'OP': 'REPM'}
{'src': {'type': 'addresses_normal_ht', 'congruent': 0, 'same': False}, 'dst': {'type': 'addresses_normal_ht', 'congruent': 2, 'same': False}, 'OP': 'REPM'}
{'src': {'type': 'addresses_WC_ht', 'same': False, 'size': 1, 'congruent': 10, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_normal_ht', 'congruent': 11, 'same': False}, 'dst': {'type': 'addresses_D_ht', 'congruent': 3, 'same': False}, 'OP': 'REPM'}
{'dst': {'type': 'addresses_D_ht', 'same': False, 'size': 32, 'congruent': 9, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_A_ht', 'same': False, 'size': 32, 'congruent': 8, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'39': 21829}
39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39
*/
| 33.872247 | 2,999 | 0.661855 |
2d6bb4d1881b487d58b341d5b1279a2d453c973c | 1,449 | asm | Assembly | MemExpansion/TestProgram/RAMCheck/memchk1m_1.asm | ja1umi/MUTIF09Project | 8bc8d34c46acbf44be59e1373d2c004a2777db1f | [
"MIT"
] | 8 | 2018-12-30T03:36:48.000Z | 2020-11-07T14:36:05.000Z | MemExpansion/TestProgram/RAMCheck/memchk1m_1.asm | ja1umi/MUTIF09Project | 8bc8d34c46acbf44be59e1373d2c004a2777db1f | [
"MIT"
] | null | null | null | MemExpansion/TestProgram/RAMCheck/memchk1m_1.asm | ja1umi/MUTIF09Project | 8bc8d34c46acbf44be59e1373d2c004a2777db1f | [
"MIT"
] | null | null | null | * MEMCHK - 1Mbit EXTENDED MEMORY CHECK
* Target: ASSIST09 on MUTIF09 6809SBC + 1Mbit SRAM (+ 256Kbit EEPROM)
*
* System definition
banksel equ $B006
startaddr equ $8000
endaddr equ $9fff
*
* ASSIST09 services
OUTCH equ 1
PCRLF equ 6
OUT2H equ 4
OUT4H equ 5
PDATA equ 3
PDATA1 equ 2
SPACE equ 7
*
org $7000
start leax stmsg, pcr
swi
fcb PDATA
swi
fcb PCRLF
* BANK MEM CHECK
leas -1, s
lda #0
memloop sta 0, s ; stack(0) <- current bank number
leax bankm, pcr
swi
fcb PDATA
lda #'$'
swi
fcb OUTCH
leax 0, s
swi
fcb OUT2H
swi
fcb PCRLF
lda 0, s
sta banksel
bsr memchk
lda 0, s
inca
cmpa #16 ; finished? (total of 16 banks)
bne memloop
leas 1, s
swi
fcb PCRLF
swi
fcb PCRLF
rts
*
memchk ldx #startaddr
pshs x ; stack(4) <- start address
ldx #endaddr
pshs x ; stack(2) <- end address
pshs x ; stack(0) <- for late use
lda #'$'
swi
fcb OUTCH
leax 4, s ; print start address
swi
fcb OUT4H
lda #'-'
swi
fcb OUTCH
swi
fcb SPACE
lda #'$'
swi
fcb OUTCH
ldx 4, s ; start address
loop lda 0, x
com 0, x
coma
cmpa 0, x
bne step1
cmpx 2, s ; reached end address?
beq step11
leax 1, x
bra loop
step1 leax -1, x
step11 stx 0, s ; save last address passed
leax 0, s
swi
fcb OUT4H ; print it
leas 6, s
rts
*
* Constants
stmsg fcc /** 128k x 8bit MEMCHECK **/
fcb 4
bankm fcc /BANK:/
fcb 4
*
end
| 13.293578 | 69 | 0.620428 |
c5b236a241d9492109f0a853c1307363aa26f887 | 106 | asm | Assembly | libsrc/_DEVELOPMENT/math/float/math32/lm32/c/sdcc/atanh_fastcall.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 640 | 2017-01-14T23:33:45.000Z | 2022-03-30T11:28:42.000Z | libsrc/_DEVELOPMENT/math/float/math32/lm32/c/sdcc/atanh_fastcall.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 1,600 | 2017-01-15T16:12:02.000Z | 2022-03-31T12:11:12.000Z | libsrc/_DEVELOPMENT/math/float/math32/lm32/c/sdcc/atanh_fastcall.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 215 | 2017-01-17T10:43:03.000Z | 2022-03-23T17:25:02.000Z |
SECTION code_fp_math32
PUBLIC _atanh_fastcall
EXTERN _m32_atanhf
defc _atanh_fastcall = _m32_atanhf
| 15.142857 | 35 | 0.839623 |
304a47e739a7fadb0ee9518f82252b5b57dd750c | 302 | asm | Assembly | libsrc/math/mbf32/c/sccz80/atan.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 38 | 2021-06-18T12:56:15.000Z | 2022-03-12T20:38:40.000Z | libsrc/math/mbf32/c/sccz80/atan.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 2 | 2021-06-20T16:28:12.000Z | 2021-11-17T21:33:56.000Z | libsrc/math/mbf32/c/sccz80/atan.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 6 | 2021-06-18T18:18:36.000Z | 2021-12-22T08:01:32.000Z |
SECTION code_fp_mbf32
PUBLIC atan
EXTERN ___mbf32_setup_single
EXTERN ___mbf32_ATN
EXTERN ___mbf32_return
EXTERN msbios
atan:
call ___mbf32_setup_single
IF __CPU_INTEL__
call ___mbf32_ATN
ELSE
ld ix,___mbf32_ATN
call msbios
ENDIF
jp ___mbf32_return
| 15.894737 | 37 | 0.728477 |
919de20545e50a6df892c4be5493d5cec3fc2a54 | 1,533 | asm | Assembly | 3-8086/ex1.asm | etzinis/micro_lab_ntua | 968bfe3f438c5f10607ec76921bf73214f831254 | [
"MIT"
] | null | null | null | 3-8086/ex1.asm | etzinis/micro_lab_ntua | 968bfe3f438c5f10607ec76921bf73214f831254 | [
"MIT"
] | null | null | null | 3-8086/ex1.asm | etzinis/micro_lab_ntua | 968bfe3f438c5f10607ec76921bf73214f831254 | [
"MIT"
] | null | null | null |
READ MACRO
MOV AH,08H
INT 21H
ENDM
PRINT MACRO CHAR
MOV DL,CHAR
MOV AH,02H
INT 21H
ENDM
PRINT_STR MACRO STRING
MOV DX,OFFSET STRING
MOV AH,09H
INT 21H
ENDM
DATA SEGMENT
MSG1 DB 0AH, 0DH, "GIVE AN 8-BIT BINARY NUMBER: $"
MSG2 DB 0AH, 0DH, "DECIMAL: $"
ENDS
STACK SEGMENT
DW 128 DUP<0>
ENDS
CODE SEGMENT
ASSUME CS:CODE, DS:DATA, SS:STACK, ES:DATA
START:
MOV AX,DATA
MOV DS,AX
MOV ES,AX
PRINT_STR MSG1
MOV BL,00H ;THA APOTHIKEUSW TON BIN
MOV CX,08H ;METRAW 8 LOOPS
IGNORE:
READ
CMP AL,51H ;ASCII CODE FOR 'Q'
JE FINISH
CMP AL,30H ;IF LESS THAN '0' IGNORE
JL IGNORE
CMP AL,31H ;IF MORE THAN '1' IGNORE
JG IGNORE
SAL BL,01H
PUSH AX ;SAVE AL GT EPHREAZETAI APO TIN PRINT
PRINT AL
POP AX
SUB AL,30H ;METAREPW TON ASCII CODE SE ARITHMO
ADD BL,AL ;STO BL KRATAW TO INPUT
LOOP IGNORE
PRINT_STR MSG2
MOV CH,00H
MOV CL,00H
COUNT_HUN: ;METRAW EKATONTADES
CMP BL,64H
JNA COUNT_DEC ;NOT ABOVE GIATI THELW NA ELEKSW KAI TO CF
INC CL
SUB BL,64H
JMP COUNT_HUN
COUNT_DEC: ;METRAW DEKADES
CMP BL,0AH
JL SHOW
INC CH
SUB BL,0AH
JMP COUNT_DEC
SHOW: ;METATREPW SE ASCII XARAKTHRES TO APOTELESMA
ADD CL,30H ;KAI TO EMFANIZW
PRINT CL
ADD CH,30H
PRINT CH
ADD BL,30H
PRINT BL
JMP START
FINISH:
ENDS
| 15.484848 | 68 | 0.581866 |
62507a7eee5c65285b3aeda514a047ee54c31654 | 2,216 | asm | Assembly | tools/asmx2/test/8085u.asm | retro16/blastsdk | 572bd8489e6a2c1cc638120aa62241c99badc2e5 | [
"MIT"
] | 10 | 2017-01-14T16:22:58.000Z | 2021-02-16T21:41:48.000Z | tools/asmx2/test/8085u.asm | retro16/blastsdk | 572bd8489e6a2c1cc638120aa62241c99badc2e5 | [
"MIT"
] | 3 | 2016-09-15T21:45:34.000Z | 2016-09-17T08:06:06.000Z | tools/asmx2/test/8085u.asm | retro16/blastsdk | 572bd8489e6a2c1cc638120aa62241c99badc2e5 | [
"MIT"
] | 2 | 2016-09-15T22:09:38.000Z | 2018-05-21T15:26:30.000Z | CPU 8085U
NOP
LXI B,-1
STAX B
INX B
INR B
DCR B
MVI B,-1
RLC
DSUB ; 08 DSUB => HL = HL - BC
DAD B
LDAX B
DCX B
INR C
DCR C
MVI C,-1
RRC
ARHL ; 10 ARHL => ASR HL
LXI D,-1
STAX D
INX D
INR D
DCR D
MVI D,-1
RAL
RDEL ; 18 RDEL => RL DE (with carry)
DAD D
LDAX D
DCX D
INR E
DCR E
MVI E,-1
RAR
RIM
LXI H,-1
SHLD .
INX H
INR H
DCR H
MVI H,-1
DAA
LDHI -1 ; 28 LDHI nn => DE = HL + nn
DAD H
LHLD .
DCX H
INR L
DCR L
MVI L,-1
CMA
SIM
LXI SP,-1
STA .
INX SP
INR M
DCR M
MVI M,-1
STC
LDSI -1 ; 38 LDSI nn => DE = SP + nn
DAD SP
LDA .
DCX SP
INR A
DCR A
MVI A,-1
CMC
MOV B,B
MOV B,C
MOV B,D
MOV B,E
MOV B,H
MOV B,L
MOV B,M
MOV B,A
MOV C,B
MOV C,C
MOV C,D
MOV C,E
MOV C,H
MOV C,L
MOV C,M
MOV C,A
MOV D,B
MOV D,C
MOV D,D
MOV D,E
MOV D,H
MOV D,L
MOV D,M
MOV D,A
MOV E,B
MOV E,C
MOV E,D
MOV E,E
MOV E,H
MOV E,L
MOV E,M
MOV E,A
MOV H,B
MOV H,C
MOV H,D
MOV H,E
MOV H,H
MOV H,L
MOV H,M
MOV H,A
MOV L,B
MOV L,C
MOV L,D
MOV L,E
MOV L,H
MOV L,L
MOV L,M
MOV L,A
MOV M,B
MOV M,C
MOV M,D
MOV M,E
MOV M,H
MOV M,L
HLT
MOV M,A
MOV A,B
MOV A,C
MOV A,D
MOV A,E
MOV A,H
MOV A,L
MOV A,M
MOV A,A
ADD B
ADD C
ADD D
ADD E
ADD H
ADD L
ADD M
ADD A
ADC B
ADC C
ADC D
ADC E
ADC H
ADC L
ADC M
ADC A
SUB B
SUB C
SUB D
SUB E
SUB H
SUB L
SUB M
SUB A
SBB B
SBB C
SBB D
SBB E
SBB H
SBB L
SBB M
SBB A
ANA B
ANA C
ANA D
ANA E
ANA H
ANA L
ANA M
ANA A
XRA B
XRA C
XRA D
XRA E
XRA H
XRA L
XRA M
XRA A
ORA B
ORA C
ORA D
ORA E
ORA H
ORA L
ORA M
ORA A
CMP B
CMP C
CMP D
CMP E
CMP H
CMP L
CMP M
CMP A
RNZ
POP B
JNZ .
JMP .
CNZ .
PUSH B
ADI -1
RST 0
RZ
RET
JZ .
RSTV ; CB RSTV => call 40H if overflow
CZ .
CALL .
ACI -1
RST 1
RNC
POP D
JNC .
OUT 255
CNC .
PUSH D
SUI -1
RST 2
RC
SHLX ; D9 SHLX => LD (DE),HL
JC .
IN 255
CC .
JNX5 . ; DD JNX5 nnnn
SBI -1
RST 3
RPO
POP H
JPO .
XTHL
CPO .
PUSH H
ANI -1
RST 4
RPE
PCHL
JPE .
XCHG
CPE .
LHLX ; ED LHLX => LD HL,(DE)
XRI -1
RST 5
RP
POP PSW
JP .
DI
CP .
PUSH PSW
ORI -1
RST 6
RM
SPHL
JM .
EI
CM .
JX5 . ; FD JX5 nnnn
CPI -1
RST 7
| 7.641379 | 40 | 0.544675 |
ecfe143e2f3cdc58692c8966a2c4a20dce4698bf | 661 | asm | Assembly | oeis/210/A210378.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/210/A210378.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/210/A210378.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A210378: Number of 2 X 2 matrices with all terms in {0,1,...,n} and even trace.
; 1,8,45,128,325,648,1225,2048,3321,5000,7381,10368,14365,19208,25425,32768,41905,52488,65341,80000,97461,117128,140185,165888,195625,228488,266085,307328,354061,405000,462241,524288,593505,668168,750925,839808,937765,1042568,1157481,1280000,1413721,1555848,1710325,1874048,2051325,2238728,2440945,2654208,2883601,3125000,3383901,3655808,3946645,4251528,4576825,4917248,5279625,5658248,6060421,6480000,6924781,7388168,7878465,8388608,8927425,9487368,10077805,10690688,11335941,12005000,12708361
add $0,1
pow $0,2
mov $2,$0
lpb $0
sub $0,1
trn $0,1
add $1,$2
lpe
mov $0,$1
| 50.846154 | 494 | 0.785174 |
e8468a572b72ac8fa28891e71d181092cf4d57a7 | 154 | asm | Assembly | Tests/yasm-regression/farbasic.asm | 13xforever/x86-assembly-textmate-bundle | f1bb62f77b776d87d0fd85b0276d4237ff72c43c | [
"MIT"
] | 69 | 2015-04-16T18:01:22.000Z | 2022-02-15T07:54:26.000Z | Tests/yasm-regression/farbasic.asm | javiercbk/x86-assembly-textmate-bundle | 62d700e0196f62ef4353a9b95c2e64beb0a6afda | [
"MIT"
] | 17 | 2016-09-20T08:49:09.000Z | 2021-02-19T15:01:04.000Z | Tests/yasm-regression/farbasic.asm | javiercbk/x86-assembly-textmate-bundle | 62d700e0196f62ef4353a9b95c2e64beb0a6afda | [
"MIT"
] | 19 | 2016-05-31T07:11:14.000Z | 2021-07-19T10:17:12.000Z | equval equ 6:7
[bits 32]
jmp 5:4 ; out: ea 04 00 00 00 05 00
jmp far equval ; out: ea 07 00 00 00 06 00
[bits 16]
jmp 8:9 ; out: ea 09 00 08 00
| 12.833333 | 43 | 0.597403 |
20b70520db207147c9de617f34a9bced6671a2de | 1,180 | asm | Assembly | examples/int10_13.asm | AbdulrahmanAbumdas/emu8086 | b99ea60f5dbf8647f278eef60ed1bd8a174468e5 | [
"FSFAP"
] | 287 | 2015-10-01T20:34:49.000Z | 2022-03-31T09:19:39.000Z | examples/int10_13.asm | BurunluVoldi/emu8086 | b99ea60f5dbf8647f278eef60ed1bd8a174468e5 | [
"FSFAP"
] | 6 | 2017-06-13T17:22:24.000Z | 2021-01-29T23:40:11.000Z | examples/int10_13.asm | BurunluVoldi/emu8086 | b99ea60f5dbf8647f278eef60ed1bd8a174468e5 | [
"FSFAP"
] | 239 | 2015-09-13T09:40:53.000Z | 2022-03-29T14:15:16.000Z | ; this is an example of bios function: int 10h / ah=13h.
; refer to short list of dos interrupts for more info:
; c:\emu8086\documentation\
name "int10h"
org 100h
; set es (just in case):
push cs
pop es
mov bh, 0 ; page.
lea bp, msg ; offset.
mov bl, 0f3h ; default attribute.
mov cx, 12 ; char number.
mov dl, 2 ; col.
mov dh, 1 ; row.
mov ah, 13h ; function.
mov al, 1 ; sub-function.
int 10h
; show current cursor position:
mov al, '<'
mov ah, 0eh
int 10h
mov bh, 0 ; page.
lea bp, cmsg ; offset of string with attributes.
mov bl, 0f3h ; default attribute (not used when al=3).
mov cx, 12 ; char number.
mov dl, 2 ; col.
mov dh, 3 ; row.
mov ah, 13h ; function.
mov al, 3 ; sub-function.
int 10h
; show current cursor position:
mov al, '<'
mov ah, 0eh
int 10h
; wait for any key press....
mov ah, 0
int 16h
ret ; return control to the operating system.
msg db 'hello world!'
cmsg db 'h', 0cfh, 'e', 8bh, 'l', 0f0h, 'l', 5fh, 'o', 3ch, ' ', 0e0h
db 'w', 0b3h, 'o', 2eh, 'r', 0cah, 'l', 1ah, 'd', 0ach, '!', 2fh
| 21.454545 | 69 | 0.557627 |
20dc1ac263a9a12bcb95676e7d47e4f4adb7e798 | 537 | asm | Assembly | programs/oeis/293/A293067.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/293/A293067.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/293/A293067.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A293067: Sum of values of vertices of type A at level n of the hyperbolic Pascal pyramid PP_(4,5).
; 0,0,2,6,18,58,194,658,2242,7650,26114,89154,304386,1039234,3548162,12114178,41360386,141213186,482131970,1646101506,5620142082,19188365314,65513177090,223675977730,763677556738,2607358271490,8902077972482,30393595346946,103770225442818,354293711077378,1209634393423874,4129950151540738
lpb $0,1
sub $0,1
add $3,1
add $1,$3
add $2,$3
mov $3,$1
mul $1,2
sub $1,$2
sub $2,$2
trn $3,2
mul $3,2
lpe
add $2,1
trn $1,$2
| 29.833333 | 287 | 0.741155 |
4969f98a8d2fa3e9bc361d61862d97a46bc29ba4 | 192 | asm | Assembly | iod/nul/close.asm | olifink/smsqe | c546d882b26566a46d71820d1539bed9ea8af108 | [
"BSD-2-Clause"
] | null | null | null | iod/nul/close.asm | olifink/smsqe | c546d882b26566a46d71820d1539bed9ea8af108 | [
"BSD-2-Clause"
] | null | null | null | iod/nul/close.asm | olifink/smsqe | c546d882b26566a46d71820d1539bed9ea8af108 | [
"BSD-2-Clause"
] | null | null | null | ; Close NUL Channel V2.01 1996 Tony Tebby
section nul
xdef nul_close
include 'dev8_keys_qlv'
;+++
; NUL channel close operation
;---
nul_close
move.w mem.rchp,a2
jmp (a2)
end
| 12.8 | 49 | 0.677083 |
e6e64bf27dcc86b0eb46c7d39a9fd061b95c2e73 | 393 | asm | Assembly | oeis/083/A083333.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/083/A083333.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/083/A083333.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A083333: a(n)=10a(n-2)-16a(n-4).
; Submitted by Christian Krause
; 1,1,6,10,44,84,344,680,2736,5456,21856,43680,174784,349504,1398144,2796160,11184896,22369536,89478656,178956800,715828224,1431655424,5726623744,11453245440,45812985856,91625967616,366503878656
mov $2,1
lpb $0
sub $0,2
mul $1,4
mul $2,2
add $1,$2
mul $1,2
lpe
lpb $0
div $0,4
add $2,$1
lpe
add $2,$1
mov $0,$2
| 20.684211 | 194 | 0.699746 |
35ac9d41d062bd8c651863f223101d8c9a91dff2 | 182 | asm | Assembly | sw/552tests/inst_tests/xor_0.asm | JPShen-UWM/ThreadKraken | 849c510531f28e36d3469535737b2120bd774935 | [
"MIT"
] | 1 | 2022-02-15T16:03:25.000Z | 2022-02-15T16:03:25.000Z | sw/552tests/inst_tests/xor_0.asm | JPShen-UWM/ThreadKraken | 849c510531f28e36d3469535737b2120bd774935 | [
"MIT"
] | null | null | null | sw/552tests/inst_tests/xor_0.asm | JPShen-UWM/ThreadKraken | 849c510531f28e36d3469535737b2120bd774935 | [
"MIT"
] | null | null | null | // Original test: ./eharris/hw4/problem6/xor_0.asm
// Author: eharris
// Test source code follows
//Tests XOR a zero value with itself
lbi r1, 0x00
xor r2, r1, r1
halt
//r2 = 0x00
| 16.545455 | 50 | 0.703297 |
f7f675c469f22f127701a830f2de0538dc7b5064 | 3,545 | asm | Assembly | src/i686-elf/isrs_asm.asm | Leo2807/yasOS | 9b17b93dbac865a87b1fc064550ebb4a5ef55b39 | [
"MIT"
] | null | null | null | src/i686-elf/isrs_asm.asm | Leo2807/yasOS | 9b17b93dbac865a87b1fc064550ebb4a5ef55b39 | [
"MIT"
] | null | null | null | src/i686-elf/isrs_asm.asm | Leo2807/yasOS | 9b17b93dbac865a87b1fc064550ebb4a5ef55b39 | [
"MIT"
] | null | null | null |
global isr0
global isr1
global isr2
global isr3
global isr4
global isr5
global isr6
global isr7
global isr8
global isr9
global isr10
global isr11
global isr12
global isr13
global isr14
global isr15
global isr16
global isr17
global isr18
global isr19
global isr20
global isr21
global isr22
global isr23
global isr24
global isr25
global isr26
global isr27
global isr28
global isr29
global isr30
global isr31
; 0: Divide By Zero Exception
isr0:
cli
push byte 0 ; A normal ISR stub that pops a dummy error code to keep a
; uniform stack frame
push byte 0
jmp isr_common_stub
; 1: Debug Exception
isr1:
cli
push byte 0
push byte 1
jmp isr_common_stub
isr2:
cli
push byte 0
push byte 1
jmp isr_common_stub
isr3:
cli
push byte 0
push byte 1
jmp isr_common_stub
isr4:
cli
push byte 0
push byte 1
jmp isr_common_stub
isr5:
cli
push byte 0
push byte 1
jmp isr_common_stub
isr6:
cli
push byte 0
push byte 1
jmp isr_common_stub
isr7:
cli
push byte 0
push byte 1
jmp isr_common_stub
; 8: Double Fault Exception (With Error Code!)
isr8:
cli
push byte 8 ; Note that we DON'T push a value on the stack in this one!
; It pushes one already! Use this type of stub for exceptions
; that pop error codes!
jmp isr_common_stub
isr9:
cli
push byte 0
push byte 1
jmp isr_common_stub
isr10:
cli
push byte 0
jmp isr_common_stub
isr11:
cli
push byte 0
jmp isr_common_stub
isr12:
cli
push byte 0
jmp isr_common_stub
isr13:
cli
push byte 0
jmp isr_common_stub
isr14:
cli
push byte 0
jmp isr_common_stub
isr15:
cli
push byte 0
push byte 1
jmp isr_common_stub
isr16:
cli
push byte 0
push byte 1
jmp isr_common_stub
isr17:
cli
push byte 0
push byte 1
jmp isr_common_stub
isr18:
cli
push byte 0
push byte 1
jmp isr_common_stub
isr19:
cli
push byte 0
push byte 1
jmp isr_common_stub
isr20:
cli
push byte 0
push byte 1
jmp isr_common_stub
isr21:
cli
push byte 0
push byte 1
jmp isr_common_stub
isr22:
cli
push byte 0
push byte 1
jmp isr_common_stub
isr23:
cli
push byte 0
push byte 1
jmp isr_common_stub
isr24:
cli
push byte 0
push byte 1
jmp isr_common_stub
isr25:
cli
push byte 0
push byte 1
jmp isr_common_stub
isr26:
cli
push byte 0
push byte 1
jmp isr_common_stub
isr27:
cli
push byte 0
push byte 1
jmp isr_common_stub
isr28:
cli
push byte 0
push byte 1
jmp isr_common_stub
isr29:
cli
push byte 0
push byte 1
jmp isr_common_stub
isr30:
cli
push byte 0
push byte 1
jmp isr_common_stub
isr31:
cli
push byte 0
push byte 1
jmp isr_common_stub
; We call a C function in here. We need to let the assembler know
; that '_fault_handler' exists in another file
extern fault_handler
; This is our common ISR stub. It saves the processor state, sets
; up for kernel mode segments, calls the C-level fault handler,
; and finally restores the stack frame.
isr_common_stub:
pusha
push ds
push es
push fs
push gs
mov ax, 0x10 ; Load the Kernel Data Segment descriptor!
mov ds, ax
mov es, ax
mov fs, ax
mov gs, ax
mov eax, esp ; Push us the stack
push eax
mov eax, fault_handler
call eax ; A special call, preserves the 'eip' register
pop eax
pop gs
pop fs
pop es
pop ds
popa
add esp, 8 ; Cleans up the pushed error code and pushed ISR number
iret ; pops 5 things at once: CS, EIP, EFLAGS, SS, and ESP!
| 13.530534 | 82 | 0.701834 |
d5c216be97635aaca300b356f9c1b91727c12bfe | 1,399 | asm | Assembly | Microsoft Word for Windows Version 1.1a/Word 1.1a CHM Distribution/Opus/asm/sttbn.asm | lborgav/Historical-Source-Codes | c0aeaae1d482718e3b469d9eb7a6d0002faa1ff5 | [
"MIT"
] | 7 | 2017-01-12T17:48:48.000Z | 2021-11-28T04:37:34.000Z | Microsoft Word for Windows Version 1.1a/Word 1.1a CHM Distribution/Opus/asm/sttbn.asm | lborgav/Historical-Source-Codes | c0aeaae1d482718e3b469d9eb7a6d0002faa1ff5 | [
"MIT"
] | null | null | null | Microsoft Word for Windows Version 1.1a/Word 1.1a CHM Distribution/Opus/asm/sttbn.asm | lborgav/Historical-Source-Codes | c0aeaae1d482718e3b469d9eb7a6d0002faa1ff5 | [
"MIT"
] | 5 | 2017-03-28T08:04:30.000Z | 2020-03-25T14:25:29.000Z | include w2.inc
include noxport.inc
include consts.inc
include structs.inc
createSeg sttb_PCODE,sttb,byte,public,CODE
; DEBUGGING DECLARATIONS
; EXTERNAL FUNCTIONS
sBegin data
; EXTERNALS
sEnd data
; CODE SEGMENT _STTB
sBegin sttb
assumes cs,sttb
assumes ds,dgroup
assumes ss,dgroup
;-------------------------------------------------------------------------
; AddDcbToLprgbst(lpbstFirst, ibstMac, dcb, bstThreshold)
;-------------------------------------------------------------------------
;AddDcbToLprgbst(lpbstFirst, ibstMac, dcb, bstThreshold)
;int far *lpbstFirst;
;int ibstMac;
;int dcb;
;int bstThreshold;
;{
; int far *lpbst = lpbstFirst;
;
; for (ibst = 0; ibst < ibstMac; ibst++, lpbst++)
; {
; if (*lpbst >= bstThreshold)
; *lpbst += dcb;
; }
;}
; %%Function:AddDcbToLprgbst %%Owner:BRADV
cProc AddDcbToLprgbst,<PUBLIC,FAR,ATOMIC>,<>
ParmD lpbstFirst
ParmW ibstMac
ParmW dcb
ParmW bstThreshold
cBegin
mov cx,[ibstMac]
jcxz ADTL04
mov dx,[dcb]
les bx,[lpbstFirst]
mov ax,[bstThreshold]
or ax,ax
je ADTL03
ADTL01:
cmp es:[bx],ax
jb ADTL02
add es:[bx],dx
ADTL02:
inc bx
inc bx
loop ADTL01
jmp short ADTL04
ADTL03:
add es:[bx],dx
inc bx
inc bx
loop ADTL03
ADTL04:
cEnd
; End of AddDcbToLprgbst
sEnd sttb
end
| 17.060976 | 75 | 0.571837 |
d0ad7284f644427aa5e0923d73b73d5b091a2d15 | 466 | asm | Assembly | programs/oeis/318/A318608.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/318/A318608.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/318/A318608.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A318608: Moebius function mu(n) defined for the Gaussian integers.
; 1,0,-1,0,1,0,-1,0,0,0,-1,0,1,0,-1,0,1,0,-1,0,1,0,-1,0,0,0,0,0,1,0,-1,0,1,0,-1,0,1,0,-1,0,1,0,-1,0,0,0,-1,0,0,0,-1,0,1,0,-1,0,1,0,-1,0,1,0,0,0,1,0,-1,0,1,0,-1,0,1,0,0,0,1,0,-1,0,0,0,-1,0,1,0,-1,0,1,0,-1,0,1,0,-1,0,1,0,0,0
lpb $0
seq $0,7947 ; Largest squarefree number dividing n: the squarefree kernel of n, rad(n), radical of n.
dif $0,2
lpe
gcd $0,4
sub $0,3
mov $1,1
div $1,$0
mov $0,$1
| 35.846154 | 222 | 0.572961 |
95b1705793b6125a8257686b5d140fd4bdaa632e | 784 | asm | Assembly | header/005/ELROM.asm | freem/nes_corelib | a890aa3c436e931a765866265f24ccf3c432f71d | [
"0BSD"
] | 16 | 2015-06-23T03:17:40.000Z | 2021-10-05T23:40:28.000Z | nes_corelib/header/005/ELROM.asm | master-g/childhood | 7cd2a6a13f7e862df6d239e78371df6222b30a53 | [
"Apache-2.0"
] | null | null | null | nes_corelib/header/005/ELROM.asm | master-g/childhood | 7cd2a6a13f7e862df6d239e78371df6222b30a53 | [
"Apache-2.0"
] | 3 | 2015-11-12T01:29:55.000Z | 2020-07-06T05:15:06.000Z | ; ELROM: (128,256,512,1024)KB PRG-ROM + (128,256,512,1024)KB CHR-ROM
; http://bootgod.dyndns.org:7777/search.php?keywords=ELROM&kwtype=pcb
;------------------------------------------------------------------------------;
; number of 16K PRG banks
; Valid configurations: $08 (128K), $10 (256K), $20 (512K), $40 (1024K)
PRG_BANKS = $08
; number of 8K CHR banks
; Valid values: $10 (128K), $20 (256K), $40 (512K), $80 (1024K)
CHR_BANKS = $04
; ELROM mirroring is controlled by MMC5.
; %0000 = Horizontal
; %0001 = Vertical
MIRRORING = %0001
; Mapper 005 (MMC5 - ELROM) iNES header
.byte "NES",$1A
.byte PRG_BANKS ; 16K PRG banks
.byte CHR_BANKS ; 8K CHR-ROM banks
.byte $50|MIRRORING ; flags 6
.byte $00 ; flags 7
.byte $00 ; no PRG RAM
.dsb 7, $00 ; clear the remaining bytes
| 31.36 | 80 | 0.604592 |
acbb9de373ca415be04e400493a54913cc2bbc18 | 1,273 | asm | Assembly | programs/oeis/120/A120136.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/120/A120136.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/120/A120136.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A120136: a(1)=7; a(n)=floor((14+sum(a(1) to a(n-1)))/2).
; 7,10,15,23,34,51,77,115,173,259,389,583,875,1312,1968,2952,4428,6642,9963,14945,22417,33626,50439,75658,113487,170231,255346,383019,574529,861793,1292690,1939035,2908552,4362828,6544242,9816363,14724545,22086817,33130226,49695339,74543008,111814512,167721768,251582652,377373978,566060967,849091451,1273637176,1910455764,2865683646,4298525469,6447788204,9671682306,14507523459,21761285188,32641927782,48962891673,73444337510,110166506265,165249759397,247874639096,371811958644,557717937966,836576906949,1254865360423,1882298040635,2823447060952,4235170591428,6352755887142,9529133830713,14293700746070,21440551119105,32160826678657,48241240017986,72361860026979,108542790040468,162814185060702,244221277591053,366331916386580,549497874579870,824246811869805,1236370217804707,1854555326707061,2781832990060591,4172749485090887,6259124227636330,9388686341454495,14083029512181743,21124544268272614,31686816402408921,47530224603613382,71295336905420073,106943005358130109,160414508037195164,240621762055792746,360932643083689119,541398964625533678,812098446938300517,1218147670407450776,1827221505611176164
mov $2,1
lpb $0
sub $0,1
add $2,$1
mov $1,6
add $1,$2
div $1,2
add $2,7
lpe
add $1,7
mov $0,$1
| 84.866667 | 1,105 | 0.853103 |
d97faaa4f6e2a4a594b4009fd52454ceae4d4048 | 1,623 | asm | Assembly | mini/startup.asm | OS2World/DRV-VRAID | 7154196d3d06293259354572f72fd3b36f39924c | [
"BSD-3-Clause"
] | null | null | null | mini/startup.asm | OS2World/DRV-VRAID | 7154196d3d06293259354572f72fd3b36f39924c | [
"BSD-3-Clause"
] | null | null | null | mini/startup.asm | OS2World/DRV-VRAID | 7154196d3d06293259354572f72fd3b36f39924c | [
"BSD-3-Clause"
] | null | null | null | ;*
;* $Source: r:/source/driver/mini/RCS/startup.asm,v $
;* $Revision: 1.1 $
;* $Date: 2000/06/12 01:42:52 $
;* $Locker: $
;*
;* Assembler Helper to order segments
;*
;* $Log: startup.asm,v $
;* Revision 1.1 2000/06/12 01:42:52 vitus
;* Initial revision
;*
;* ----------------------------------------
;* Author: Vitus Jensen, 2:2474/424, 1997
;*
.286c ; at least!
PUBLIC _DiskDDHeader
PUBLIC _szDriverName
INCLUDE devhdr.inc ; device header format
;; The very first segment has to contain the
;; device driver header. Use own segment for
;; this purpose (but in DGROUP).
DDHeader SEGMENT DWORD PUBLIC 'CONST'
_DiskDDHeader DD -1
DW DEV_CHAR_DEV OR DEV_30 OR DEVLEV_3
DW OFFSET AsmStrategy
DW 0
_szDriverName DB "Mini$ "
DW 0
DW 0
DW 0
DW 0
DD DEV_INITCOMPLETE OR DEV_ADAPTER_DD OR DEV_16MB OR DEV_IOCTL2
DW 0
DDHeader ENDS
CONST SEGMENT DWORD PUBLIC 'CONST' ; places strings here
CONST ENDS
LIBDATA SEGMENT DWORD PUBLIC 'DATA'
LIBDATA ENDS
_DATA SEGMENT DWORD PUBLIC 'DATA'
_DATA ENDS
_BSS SEGMENT DWORD PUBLIC 'BSS'
_BSS ENDS
;; Start of code segments
;; There is really code contained: small stubs
;; to call C routines and save/restore registers.
_TEXT SEGMENT DWORD PUBLIC 'CODE'
EXTRN _Strategy : NEAR ; C routines
AsmStrategy PROC FAR
push es
push bx
call _Strategy
add sp, 4
retf
AsmStrategy ENDP
_TEXT ENDS
CODE SEGMENT DWORD PUBLIC 'CODE'
CODE ENDS
LIBCODE SEGMENT DWORD PUBLIC 'CODE'
LIBCODE ENDS
;; Group segments together
DGROUP GROUP CONST, _BSS, DDHeader, LIBDATA, _DATA
StaticGroup GROUP CODE, LIBCODE, _TEXT
END
| 17.835165 | 65 | 0.690696 |
b5c99d75b17ffb85170c29a2204835e644584890 | 2,757 | asm | Assembly | 1571/64tass/bamutl.asm | silverdr/assembly | c2851f7033223e089285dce22443b7e219ed4f61 | [
"Unlicense"
] | 23 | 2015-03-23T15:16:57.000Z | 2022-03-18T12:43:42.000Z | 1571/64tass/bamutl.asm | silverdr/assembly | c2851f7033223e089285dce22443b7e219ed4f61 | [
"Unlicense"
] | null | null | null | 1571/64tass/bamutl.asm | silverdr/assembly | c2851f7033223e089285dce22443b7e219ed4f61 | [
"Unlicense"
] | 8 | 2016-04-13T11:19:35.000Z | 2021-12-22T07:39:00.000Z |
wrtbm lda #$ff
bit wbam
beq +
bpl +
bvs +
lda #0
sta wbam
jmp wrt_bam
+ rts
clrbam jmp ptch25
rtch25 ldy #0
tya
- sta (bmpnt),y
iny
bne -
rts
setbam lda t0
pha
lda t1
pha
jmp ptch52
nop
rtch52 beq +
lda #nodriv
jsr cmder2
+ jsr bam2a
sta t0
txa
asl a
sta t1
tax
lda track
cmp bamis,x
beq +
inx
stx t1
cmp bamis,x
beq +
jsr xttu
+ lda t1
ldx drvnum
sta bamlu,x
asl a
asl a
clc
adc #<bami
sta bmpnt
lda #>bami
adc #0
sta bmpnt+1
ldy #0
pla
sta t1
pla
sta t0
rts
xttu ldx t0
jsr redbam
lda drvnum
tax
asl a
ora bamlu,x
eor #1
and #3
sta t1
jsr putbam
lda jobnum
asl a
tax
lda track
asl a
asl a
sta buftab,x
lda t1
asl a
asl a
tay
- lda (buftab,x)
sta bami,y
lda #0
sta (buftab,x)
inc buftab,x
iny
tya
and #3
bne -
ldx t1
lda track
sta bamis,x
lda wbam
bne +
jmp wrt_bam
+
ora #$80
sta wbam
rts
putbam tay
lda bamis,y
beq +
pha
lda #0
sta bamis,y
lda jobnum
asl a
tax
pla
asl a
asl a
sta buftab,x
tya
asl a
asl a
tay
- lda bami,y
sta (buftab,x)
lda #0
sta bami,y
inc buftab,x
iny
tya
and #3
bne -
+ rts
clnbam lda drvnum
asl a
tax
lda #0
sta bamis,x
inx
sta bamis,x
rts
redbam .proc
lda buf0,x
cmp #$ff
bne m1
txa
pha
jsr getbuf
tax
bpl +
lda #nochnl
jsr cmderr
+
stx jobnum
pla
tay
txa
ora #$80
sta buf0,y
asl
tax
lda dirtrk
sta hdrs,x
lda #0
sta hdrs+1,x
jmp ptch23
m1 and #15
sta jobnum
rts
.pend
bam2a lda #mxchns
ldx drvnum
bne +
clc
adc #mxchns+1
+ rts
bam2x jsr bam2a
tax
rts
| 15.316667 | 23 | 0.355459 |
174e8418100a625310ee9fd97577cd16cfee876b | 1,874 | asm | Assembly | _maps/obj78.asm | NatsumiFox/AMPS-Sonic-1-2005 | ac8730799f1b96291358c77a4b64529de94ce8a4 | [
"Apache-2.0"
] | 2 | 2020-04-09T19:36:35.000Z | 2021-01-05T14:20:17.000Z | _maps/obj78.asm | NatsumiFox/AMPS-Sonic-1-2005 | ac8730799f1b96291358c77a4b64529de94ce8a4 | [
"Apache-2.0"
] | null | null | null | _maps/obj78.asm | NatsumiFox/AMPS-Sonic-1-2005 | ac8730799f1b96291358c77a4b64529de94ce8a4 | [
"Apache-2.0"
] | 1 | 2020-06-17T14:16:35.000Z | 2020-06-17T14:16:35.000Z | ; ---------------------------------------------------------------------------
; Sprite mappings - Caterkiller enemy (MZ, SBZ)
; ---------------------------------------------------------------------------
dc.w byte_16D9E-Map_obj78, byte_16DA4-Map_obj78
dc.w byte_16DAA-Map_obj78, byte_16DB0-Map_obj78
dc.w byte_16DB6-Map_obj78, byte_16DBC-Map_obj78
dc.w byte_16DC2-Map_obj78, byte_16DC8-Map_obj78
dc.w byte_16DCE-Map_obj78, byte_16DD4-Map_obj78
dc.w byte_16DDA-Map_obj78, byte_16DE0-Map_obj78
dc.w byte_16DE6-Map_obj78, byte_16DEC-Map_obj78
dc.w byte_16DF2-Map_obj78, byte_16DF8-Map_obj78
dc.w byte_16DFE-Map_obj78, byte_16E04-Map_obj78
dc.w byte_16E0A-Map_obj78, byte_16E10-Map_obj78
dc.w byte_16E16-Map_obj78, byte_16E1C-Map_obj78
dc.w byte_16E22-Map_obj78, byte_16E28-Map_obj78
byte_16D9E: dc.b 1
dc.b $F2, 6, 0, 0, $F8
byte_16DA4: dc.b 1
dc.b $F1, 6, 0, 0, $F8
byte_16DAA: dc.b 1
dc.b $F0, 6, 0, 0, $F8
byte_16DB0: dc.b 1
dc.b $EF, 6, 0, 0, $F8
byte_16DB6: dc.b 1
dc.b $EE, 6, 0, 0, $F8
byte_16DBC: dc.b 1
dc.b $ED, 6, 0, 0, $F8
byte_16DC2: dc.b 1
dc.b $EC, 6, 0, 0, $F8
byte_16DC8: dc.b 1
dc.b $EB, 6, 0, 0, $F8
byte_16DCE: dc.b 1
dc.b $F8, 5, 0, $C, $F8
byte_16DD4: dc.b 1
dc.b $F7, 5, 0, $C, $F8
byte_16DDA: dc.b 1
dc.b $F6, 5, 0, $C, $F8
byte_16DE0: dc.b 1
dc.b $F5, 5, 0, $C, $F8
byte_16DE6: dc.b 1
dc.b $F4, 5, 0, $C, $F8
byte_16DEC: dc.b 1
dc.b $F3, 5, 0, $C, $F8
byte_16DF2: dc.b 1
dc.b $F2, 5, 0, $C, $F8
byte_16DF8: dc.b 1
dc.b $F1, 5, 0, $C, $F8
byte_16DFE: dc.b 1
dc.b $F2, 6, 0, 6, $F8
byte_16E04: dc.b 1
dc.b $F1, 6, 0, 6, $F8
byte_16E0A: dc.b 1
dc.b $F0, 6, 0, 6, $F8
byte_16E10: dc.b 1
dc.b $EF, 6, 0, 6, $F8
byte_16E16: dc.b 1
dc.b $EE, 6, 0, 6, $F8
byte_16E1C: dc.b 1
dc.b $ED, 6, 0, 6, $F8
byte_16E22: dc.b 1
dc.b $EC, 6, 0, 6, $F8
byte_16E28: dc.b 1
dc.b $EB, 6, 0, 6, $F8
even | 29.28125 | 77 | 0.590715 |
877ffad12c0634266522ddd80cd25d4bfe5b0e04 | 641 | asm | Assembly | libsrc/_DEVELOPMENT/stdio/c/sdcc_ix/vprintf_callee.asm | meesokim/z88dk | 5763c7778f19a71d936b3200374059d267066bb2 | [
"ClArtistic"
] | null | null | null | libsrc/_DEVELOPMENT/stdio/c/sdcc_ix/vprintf_callee.asm | meesokim/z88dk | 5763c7778f19a71d936b3200374059d267066bb2 | [
"ClArtistic"
] | null | null | null | libsrc/_DEVELOPMENT/stdio/c/sdcc_ix/vprintf_callee.asm | meesokim/z88dk | 5763c7778f19a71d936b3200374059d267066bb2 | [
"ClArtistic"
] | null | null | null |
; int vprintf_callee(const char *format, void *arg)
INCLUDE "clib_cfg.asm"
SECTION code_stdio
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
IF __CLIB_OPT_MULTITHREAD & $02
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
PUBLIC _vprintf_callee, l0_vprintf_callee
EXTERN asm_vprintf
_vprintf_callee:
pop af
pop de
pop bc
push af
l0_vprintf_callee:
push ix
call asm_vprintf
pop ix
ret
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
ELSE
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
PUBLIC _vprintf_callee
EXTERN _vprintf_unlocked_callee
defc _vprintf_callee = _vprintf_unlocked_callee
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
ENDIF
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
| 14.244444 | 51 | 0.530421 |
1db218412ade5b2fdfeabe84442ff4642ccb99c7 | 723 | asm | Assembly | smsq/hwt/preset.asm | olifink/smsqe | c546d882b26566a46d71820d1539bed9ea8af108 | [
"BSD-2-Clause"
] | null | null | null | smsq/hwt/preset.asm | olifink/smsqe | c546d882b26566a46d71820d1539bed9ea8af108 | [
"BSD-2-Clause"
] | null | null | null | smsq/hwt/preset.asm | olifink/smsqe | c546d882b26566a46d71820d1539bed9ea8af108 | [
"BSD-2-Clause"
] | null | null | null | ; SMSQ Hardware table handling V2.10 1999 Tony Tebby
section hwt
xdef hwt_preset ; preset values
;+++
; Hardware table setup - preset values
;
; d0 s
; a3 c p linkage block
; a4 s
; a5 c u pointer to vector table in driver definition table
; status return arbirary
;---
hwt_preset
move.l a0,-(sp)
move.l a5,a0
move.w (a5)+,d0 ; get pointer to table and move on
beq.s hwtp_exit ; no table
add.w d0,a0
hwtp_loop
move.w (a0)+,d0 ; next location to set
beq.s hwtp_exit ; no more to set
lea (a3,d0.w),a4
move.w (a0)+,d0 ; length to set
hwtp_word
move.w (a0)+,(a4)+ ; copy a word of preset data
subq.w #2,d0
bgt.s hwtp_word
bra.s hwtp_loop
hwtp_exit
move.l (sp)+,a0
rts
end
| 16.431818 | 60 | 0.655602 |
4908f571ae5079911118fb7b0d678e658065d15a | 148 | asm | Assembly | test/link/mapfile/map2.asm | nigelperks/BasicAssembler | 13dcc861254fa6c19f1d450682b4495bbebcf934 | [
"MIT"
] | null | null | null | test/link/mapfile/map2.asm | nigelperks/BasicAssembler | 13dcc861254fa6c19f1d450682b4495bbebcf934 | [
"MIT"
] | null | null | null | test/link/mapfile/map2.asm | nigelperks/BasicAssembler | 13dcc861254fa6c19f1d450682b4495bbebcf934 | [
"MIT"
] | null | null | null | SEGMENT MAIN PUBLIC BYTE
ASSUME CS:MAIN
mov ax, 1
int 13h
ENDS MAIN
SEGMENT SEG2 PUBLIC DWORD
dw 0faceh
ENDS SEG2
GROUP _DATA SEG2
END
| 10.571429 | 26 | 0.72973 |
d0ccde1a8c079cc77393655a6a1e939d8a0984c0 | 546 | asm | Assembly | oeis/016/A016655.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/016/A016655.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/016/A016655.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A016655: Decimal expansion of log(32) = 5*log(2).
; Submitted by Jon Maiga
; 3,4,6,5,7,3,5,9,0,2,7,9,9,7,2,6,5,4,7,0,8,6,1,6,0,6,0,7,2,9,0,8,8,2,8,4,0,3,7,7,5,0,0,6,7,1,8,0,1,2,7,6,2,7,0,6,0,3,4,0,0,0,4,7,4,6,6,9,6,8,1,0,9,8,4,8,4,7,3,5,7,8,0,2,9,3,1,6,6,3,4,9,8,2,0,9,3,4,3,7
mov $1,1
mov $2,1
mov $3,$0
mul $3,5
lpb $3
mul $1,$3
mov $5,$3
mul $5,2
add $5,2
mul $2,$5
add $1,$2
div $5,$2
add $5,$0
div $1,$5
div $2,$5
sub $3,1
lpe
mul $1,10
mov $4,10
pow $4,$0
div $2,$4
mul $2,4
div $1,$2
add $1,$4
mov $0,$1
mod $0,10
| 17.612903 | 201 | 0.520147 |
713a9e22edf827d7d5f70e43c8f9b1634cee7756 | 115 | asm | Assembly | test/hazard-tests/control-hazard.asm | skyzh/mips-simulator | 61a319ab776fa30831e75aab906c6ef22bb7755e | [
"MIT"
] | 35 | 2020-04-02T05:15:53.000Z | 2022-03-13T14:15:32.000Z | test/hazard-tests/control-hazard.asm | skyzh/mips-simulator | 61a319ab776fa30831e75aab906c6ef22bb7755e | [
"MIT"
] | 1 | 2020-04-04T10:12:11.000Z | 2020-04-04T10:12:11.000Z | test/hazard-tests/control-hazard.asm | skyzh/mips-simulator | 61a319ab776fa30831e75aab906c6ef22bb7755e | [
"MIT"
] | 1 | 2020-12-27T21:15:20.000Z | 2020-12-27T21:15:20.000Z | jal test1
test1:
jal test2
test2:
jal test3
test3:
jal test4
test4:
jal test5
test5:
jal test6
test6:
li $a0, 1000
| 8.214286 | 12 | 0.747826 |
b01e9eb47fd5458758476d41a7490bceee8705fd | 147 | asm | Assembly | Mips/Studies/dividingIntergers.asm | otavreis/-Computer-Architecture-and-Organization | 317c7077b1b08a50985767d8114af5be580cc764 | [
"MIT"
] | 1 | 2020-09-03T00:16:24.000Z | 2020-09-03T00:16:24.000Z | Mips/Studies/dividingIntergers.asm | otavreis/-Computer-Architecture-and-Organization | 317c7077b1b08a50985767d8114af5be580cc764 | [
"MIT"
] | null | null | null | Mips/Studies/dividingIntergers.asm | otavreis/-Computer-Architecture-and-Organization | 317c7077b1b08a50985767d8114af5be580cc764 | [
"MIT"
] | null | null | null | .data
.text
addi $t0, $zero, 30
addi $t1, $zero, 5
div $s0, $t0, $t1
#Print it!
li $v0, 1
add $a0, $zero, $s0
syscall | 12.25 | 22 | 0.47619 |
483ca6b96c59045656b2408dec64437e2e2b1782 | 2,330 | asm | Assembly | source/init.asm | samuelgr/Spindle | ee2157dba95eaa6cba02763ca71d46ae8f77f796 | [
"BSD-3-Clause"
] | 3 | 2018-09-03T17:01:32.000Z | 2022-01-14T20:47:47.000Z | source/init.asm | samuelgr/Spindle | ee2157dba95eaa6cba02763ca71d46ae8f77f796 | [
"BSD-3-Clause"
] | null | null | null | source/init.asm | samuelgr/Spindle | ee2157dba95eaa6cba02763ca71d46ae8f77f796 | [
"BSD-3-Clause"
] | null | null | null | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Spindle
; Multi-platform topology-aware thread control library.
; Distributes a set of synchronized tasks over cores in the system.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Authored by Samuel Grossman
; Department of Electrical Engineering, Stanford University
; Copyright (c) 2016-2017
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; init.asm
; Implementation of internal functions for initializing thread information.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
INCLUDE helpers.inc
INCLUDE registers.inc
_TEXT SEGMENT
; --------- FUNCTIONS ---------------------------------------------------------
; See "init.h" for documentation.
spindleSetThreadID PROC PUBLIC
vpinsrd xmm_threadinfo, xmm_threadinfo, e_param1, 0 ; Local thread ID
vpinsrd xmm_threadinfo, xmm_threadinfo, e_param2, 1 ; Global thread ID
vpinsrd xmm_threadinfo, xmm_threadinfo, e_param3, 2 ; Task ID
ret
spindleSetThreadID ENDP
; ---------
spindleSetThreadCounts PROC PUBLIC
vpinsrd xmm_threadinfo, xmm_threadinfo, e_param1, 3 ; Number of threads in the current task
vpinsrd xmm0, xmm0, e_param2, 0 ; Number of threads globally
vpinsrd xmm0, xmm0, e_param3, 1 ; Number of tasks globally
vinsertf128 ymm_threadinfo, ymm_threadinfo, xmm0, 1
ret
spindleSetThreadCounts ENDP
; ---------
spindleInitializeLocalVariable PROC PUBLIC
xor rax, rax
spindleAsmHelperSetLocalVariable rax
ret
spindleInitializeLocalVariable ENDP
_TEXT ENDS
END
| 43.148148 | 151 | 0.418884 |
909a96c35dfed2794f6cc7d6f11c7cf3facd5bbd | 242 | asm | Assembly | programs/oeis/034/A034491.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/034/A034491.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/034/A034491.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A034491: 7^n + 1.
; 2,8,50,344,2402,16808,117650,823544,5764802,40353608,282475250,1977326744,13841287202,96889010408,678223072850,4747561509944,33232930569602,232630513987208,1628413597910450,11398895185373144
mov $1,7
pow $1,$0
add $1,1
| 34.571429 | 192 | 0.809917 |
9dbea9f94988290587e91194c91a58b697b40579 | 83 | asm | Assembly | tests/hello.asm | paul-nameless/lc3-asm | 38ac008c4665515dc82bf0d972920cef62253cee | [
"Unlicense"
] | null | null | null | tests/hello.asm | paul-nameless/lc3-asm | 38ac008c4665515dc82bf0d972920cef62253cee | [
"Unlicense"
] | null | null | null | tests/hello.asm | paul-nameless/lc3-asm | 38ac008c4665515dc82bf0d972920cef62253cee | [
"Unlicense"
] | null | null | null | .ORIG x3000
LEA R0, HELLO_WORLD
PUTS
HALT
HELLO_WORLD .stringz "Hello, World"
.END
| 11.857143 | 35 | 0.771084 |
3348ab138fe69267216ddb94004f5c35f120b721 | 560 | asm | Assembly | oeis/105/A105470.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/105/A105470.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/105/A105470.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A105470: a(n)=1 if there is number of the form 6k+3 with prime(n) <= 6k+3 <= prime(n+1), otherwise 0.
; Submitted by Jon Maiga
; 1,1,0,1,0,1,0,1,1,0,1,1,0,1,1,1,0,1,1,0,1,1,1,1,1,0,1,0,1,1,1,1,0,1,0,1,1,1,1,1,0,1,0,1,0,1,1,1,0,1,1,0,1,1,1,1,0,1,1,0,1,1,1,0,1,1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,0,1,0,1,1,1,1,1,0,1,1,1,1,1,1,1,1,0,1,1
mov $4,1
lpb $0
mov $3,$0
cmp $3,0
add $0,$3
mov $2,$0
div $4,$0
mov $0,0
seq $2,106002 ; a(n)=1 if there is a number of the form 6k+3 such that prime(n) < 6k+3 < prime(n+1), otherwise 0.
add $4,$2
lpe
mov $0,$4
| 32.941176 | 201 | 0.558929 |
2fbc629577d88922b3309f9b57fb4449e6d23bea | 2,115 | asm | Assembly | programs/oeis/062/A062124.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/062/A062124.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/062/A062124.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A062124: Fourth column of A046741.
; 3,26,94,234,473,838,1356,2054,2959,4098,5498,7186,9189,11534,14248,17358,20891,24874,29334,34298,39793,45846,52484,59734,67623,76178,85426,95394,106109,117598,129888,143006,156979,171834,187598,204298,221961,240614,260284,280998,302783,325666,349674,374834,401173,428718,457496,487534,518859,551498,585478,620826,657569,695734,735348,776438,819031,863154,908834,956098,1004973,1055486,1107664,1161534,1217123,1274458,1333566,1394474,1457209,1521798,1588268,1656646,1726959,1799234,1873498,1949778,2028101,2108494,2190984,2275598,2362363,2451306,2542454,2635834,2731473,2829398,2929636,3032214,3137159,3244498,3354258,3466466,3581149,3698334,3818048,3940318,4065171,4192634,4322734,4455498,4590953,4729126,4870044,5013734,5160223,5309538,5461706,5616754,5774709,5935598,6099448,6266286,6436139,6609034,6784998,6964058,7146241,7331574,7520084,7711798,7906743,8104946,8306434,8511234,8719373,8930878,9145776,9364094,9585859,9811098,10039838,10272106,10507929,10747334,10990348,11236998,11487311,11741314,11999034,12260498,12525733,12794766,13067624,13344334,13624923,13909418,14197846,14490234,14786609,15086998,15391428,15699926,16012519,16329234,16650098,16975138,17304381,17637854,17975584,18317598,18663923,19014586,19369614,19729034,20092873,20461158,20833916,21211174,21592959,21979298,22370218,22765746,23165909,23570734,23980248,24394478,24813451,25237194,25665734,26099098,26537313,26980406,27428404,27881334,28339223,28802098,29269986,29742914,30220909,30703998,31192208,31685566,32184099,32687834,33196798,33711018,34230521,34755334,35285484,35820998,36361903,36908226,37459994,38017234,38579973,39148238,39722056,40301454,40886459,41477098,42073398,42675386,43283089,43896534,44515748,45140758,45771591,46408274,47050834,47699298,48353693,49014046,49680384,50352734,51031123,51715578,52406126,53102794,53805609,54514598,55229788,55951206,56678879,57412834,58153098,58899698,59652661,60412014,61177784,61949998,62728683,63513866,64305574,65103834,65908673,66720118,67538196,68362934,69194359,70032498
mov $1,3
mul $1,$0
add $0,$1
add $1,3
bin $1,3
add $1,$0
add $1,2
| 192.272727 | 2,010 | 0.861466 |
fba0bc915e274427574170a859a7c4e5d05c67d3 | 7,459 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0xca_notsx.log_21829_807.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0xca_notsx.log_21829_807.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0xca_notsx.log_21829_807.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r15
push %r8
push %rax
push %rbp
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_normal_ht+0x1a4fd, %r8
nop
nop
nop
add $39821, %rdx
mov (%r8), %rbp
nop
nop
nop
nop
xor $46649, %rdi
lea addresses_WT_ht+0x1c8fd, %rax
nop
nop
nop
dec %rcx
movw $0x6162, (%rax)
nop
nop
nop
cmp $44859, %rax
lea addresses_WT_ht+0x1667d, %rdi
nop
nop
cmp %rbp, %rbp
mov (%rdi), %rcx
add $27689, %r8
lea addresses_WT_ht+0x1da7d, %rax
nop
nop
add $49472, %rdx
movups (%rax), %xmm3
vpextrq $1, %xmm3, %rbp
nop
nop
nop
nop
xor %rdx, %rdx
lea addresses_D_ht+0x7ddd, %rcx
nop
nop
nop
dec %r15
and $0xffffffffffffffc0, %rcx
movntdqa (%rcx), %xmm0
vpextrq $0, %xmm0, %rdx
nop
nop
add $30226, %rdx
lea addresses_A_ht+0x1ac5a, %rdx
nop
nop
nop
xor $30691, %rdi
mov $0x6162636465666768, %rax
movq %rax, (%rdx)
nop
mfence
lea addresses_WC_ht+0x1e6e9, %rdx
nop
nop
add %rbp, %rbp
movl $0x61626364, (%rdx)
add %rbp, %rbp
lea addresses_A_ht+0x1a7d, %rsi
lea addresses_WC_ht+0x6bbd, %rdi
cmp %r8, %r8
mov $113, %rcx
rep movsq
nop
nop
mfence
lea addresses_A_ht+0x155db, %rbp
clflush (%rbp)
nop
nop
cmp %rdi, %rdi
movups (%rbp), %xmm4
vpextrq $0, %xmm4, %rsi
nop
nop
nop
sub %r15, %r15
lea addresses_D_ht+0x1372d, %rax
sub $6430, %rsi
mov $0x6162636465666768, %rcx
movq %rcx, %xmm7
movups %xmm7, (%rax)
sub %rax, %rax
lea addresses_UC_ht+0x22fd, %rsi
lea addresses_WT_ht+0x1211d, %rdi
nop
sub $31620, %rax
mov $73, %rcx
rep movsw
nop
nop
nop
add %rsi, %rsi
lea addresses_A_ht+0x61a3, %r8
nop
nop
nop
nop
nop
xor $43412, %rax
movb $0x61, (%r8)
nop
nop
nop
nop
nop
add %rax, %rax
lea addresses_A_ht+0xc7d, %r8
nop
nop
nop
cmp %rsi, %rsi
mov (%r8), %rdx
nop
nop
nop
nop
nop
and $303, %rax
lea addresses_WC_ht+0x11438, %rsi
lea addresses_normal_ht+0x130fd, %rdi
nop
nop
nop
nop
xor $50631, %rbp
mov $47, %rcx
rep movsb
nop
nop
nop
nop
cmp $57965, %rcx
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbp
pop %rax
pop %r8
pop %r15
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r14
push %r8
push %r9
push %rdi
push %rsi
// Faulty Load
lea addresses_PSE+0xb27d, %rsi
clflush (%rsi)
nop
nop
nop
nop
cmp %r14, %r14
movups (%rsi), %xmm2
vpextrq $0, %xmm2, %r11
lea oracles, %rdi
and $0xff, %r11
shlq $12, %r11
mov (%rdi,%r11,1), %r11
pop %rsi
pop %rdi
pop %r9
pop %r8
pop %r14
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'src': {'same': False, 'congruent': 0, 'NT': False, 'type': 'addresses_PSE', 'size': 32, 'AVXalign': False}, 'OP': 'LOAD'}
[Faulty Load]
{'src': {'same': True, 'congruent': 0, 'NT': False, 'type': 'addresses_PSE', 'size': 16, 'AVXalign': False}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'same': True, 'congruent': 7, 'NT': False, 'type': 'addresses_normal_ht', 'size': 8, 'AVXalign': False}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 6, 'NT': False, 'type': 'addresses_WT_ht', 'size': 2, 'AVXalign': False}}
{'src': {'same': False, 'congruent': 9, 'NT': False, 'type': 'addresses_WT_ht', 'size': 8, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'same': False, 'congruent': 10, 'NT': False, 'type': 'addresses_WT_ht', 'size': 16, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'same': False, 'congruent': 5, 'NT': True, 'type': 'addresses_D_ht', 'size': 16, 'AVXalign': False}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 0, 'NT': True, 'type': 'addresses_A_ht', 'size': 8, 'AVXalign': False}}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 2, 'NT': False, 'type': 'addresses_WC_ht', 'size': 4, 'AVXalign': False}}
{'src': {'type': 'addresses_A_ht', 'congruent': 10, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_WC_ht', 'congruent': 5, 'same': False}}
{'src': {'same': False, 'congruent': 0, 'NT': False, 'type': 'addresses_A_ht', 'size': 16, 'AVXalign': False}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 3, 'NT': False, 'type': 'addresses_D_ht', 'size': 16, 'AVXalign': False}}
{'src': {'type': 'addresses_UC_ht', 'congruent': 6, 'same': True}, 'OP': 'REPM', 'dst': {'type': 'addresses_WT_ht', 'congruent': 5, 'same': False}}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 0, 'NT': False, 'type': 'addresses_A_ht', 'size': 1, 'AVXalign': False}}
{'src': {'same': False, 'congruent': 8, 'NT': False, 'type': 'addresses_A_ht', 'size': 8, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_WC_ht', 'congruent': 0, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_normal_ht', 'congruent': 7, 'same': False}}
{'33': 21829}
33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33
*/
| 34.693023 | 2,999 | 0.656388 |
9d460843043ba411babcd79cb7e05ce4f16e5d73 | 555 | asm | Assembly | programs/oeis/069/A069114.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/069/A069114.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/069/A069114.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A069114: Squarefree part of prime(n)-1 : the smallest number such that a(n)*(prime(n)-1) is a square.
; 1,2,1,6,10,3,1,2,22,7,30,1,10,42,46,13,58,15,66,70,2,78,82,22,6,1,102,106,3,7,14,130,34,138,37,6,39,2,166,43,178,5,190,3,1,22,210,222,226,57,58,238,15,10,1,262,67,30,69,70,282,73,34,310,78,79,330,21,346,87,22,358,366,93,42,382,97,11,1,102,418,105,430,3,438,442,7,114,115,462,466,478,6,10,498,502,127,130,58,15
seq $0,40976 ; a(n) = prime(n) - 2.
seq $0,7913 ; Squarefree part of n: a(n) is the smallest positive number m such that n/m is a square.
| 92.5 | 311 | 0.675676 |
09789b96318362360ed71d680b829aad44a58101 | 259 | asm | Assembly | solutions/59 - Glory Hole/size-6_speed-13.asm | behrmann/7billionhumans | 36d53daf278ef4f3729bc5cba2f2398d5411bd6d | [
"MIT"
] | 45 | 2018-09-05T04:56:59.000Z | 2021-11-22T08:57:26.000Z | solutions/59 - Glory Hole/size-6_speed-13.asm | behrmann/7billionhumans | 36d53daf278ef4f3729bc5cba2f2398d5411bd6d | [
"MIT"
] | 36 | 2018-09-01T11:34:26.000Z | 2021-05-19T23:20:49.000Z | solutions/59 - Glory Hole/size-6_speed-13.asm | behrmann/7billionhumans | 36d53daf278ef4f3729bc5cba2f2398d5411bd6d | [
"MIT"
] | 36 | 2018-09-01T07:44:19.000Z | 2021-09-10T19:07:35.000Z | -- 7 Billion Humans (2053) --
-- 59: Glory Hole --
-- Author: soerface
-- Size: 6
-- Speed: 13
mem1 = set 99
a:
mem2 = foreachdir nw,w,sw,n,s,ne,e,se:
if mem1 == 1 and
mem2 == hole or
mem2 < mem1:
mem1 = set mem2
step mem1
jump a
endif
endfor
| 12.333333 | 38 | 0.594595 |
483bbf154d087543b41926d3c43f5b2c9b258629 | 1,577 | asm | Assembly | programs/oeis/024/A024027.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/024/A024027.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/024/A024027.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A024027: a(n) = 3^n - n^4.
; 1,2,-7,-54,-175,-382,-567,-214,2465,13122,49049,162506,510705,1565762,4744553,14298282,42981185,129056642,387315513,1162131146,3486624401,10460158722,31380825353,94142898986,282429204705,847288218818,2541865371353,7625596953546,22876791840305,68630376657602,205891131284649,617673395360426,1853020187803265,5559060565369602,16677181698330233,50031545097499082,150094635295319505,450283905889123202,1350851717670906953,4052555153016662826,12157665459054368801,36472996377167960642,109418989131509247513,328256967394533658826,984770902183607484785,2954312706550829598018,8862938119652496618473,26588814358957498408106,79766443076872504554945,239299329230617523825282,717897987691852582520249,2153693963075557759545546,6461081889226673291620625,19383245667680019888906242,58149737003040059681887113,174449211009120179062019882,523347633027360537203677025,1570042899082081611629978562,4710128697246244834910287193,14130386091738734504752693706,42391158275216203514281473201,127173474825648610542869453762,381520424476945831628635122473,1144561273430837494885933943466,3433683820292512484657832312065,10301051460877537453973529417218,30903154382632612361920622828793,92709463147897837085761905259466,278128389443693511257285754850385,834385168331080533771857306028162,2503155504993241601315571962075849,7509466514979724803946715932845866,22528399544939174411840147847898785,67585198634817523235520443595919682,202755595904452569706561330842967193,608266787713357709119683992587220682
mov $1,3
pow $1,$0
pow $0,4
add $0,1
sub $1,$0
add $1,1
mov $0,$1
| 143.363636 | 1,480 | 0.916297 |
eedd02d5dca561636fb4fa61bb89c4639eeef701 | 48 | asm | Assembly | src/test/resources/data/messagetests/undefined-symbol.asm | cpcitor/mdlz80optimizer | 75070d984e1f08474e6d397c7e0eb66d8be0c432 | [
"Apache-2.0"
] | 36 | 2020-06-29T06:52:26.000Z | 2022-02-10T19:41:58.000Z | src/test/resources/data/messagetests/undefined-symbol.asm | cpcitor/mdlz80optimizer | 75070d984e1f08474e6d397c7e0eb66d8be0c432 | [
"Apache-2.0"
] | 39 | 2020-07-02T18:19:34.000Z | 2022-03-27T18:08:54.000Z | src/test/resources/data/messagetests/undefined-symbol.asm | cpcitor/mdlz80optimizer | 75070d984e1f08474e6d397c7e0eb66d8be0c432 | [
"Apache-2.0"
] | 7 | 2020-07-02T06:00:05.000Z | 2021-11-28T17:31:13.000Z | ; Test case:
xor a
ld (undefined_symbol), a
| 9.6 | 25 | 0.645833 |
492cfb98ffe1491716ae0b530d1ff7d777942f1f | 1,423 | asm | Assembly | session_07/02-maxmmin/minmax_maxmin.asm | DigiOhhh/LabArchitettura2-2017-2018 | da34b9a75ab2945ac70d5cbf69395d0db5172f6f | [
"MIT"
] | 1 | 2019-03-06T13:26:10.000Z | 2019-03-06T13:26:10.000Z | session_07/02-maxmmin/minmax_maxmin.asm | DigiOhhh/LabArchitettura2-2017-2018 | da34b9a75ab2945ac70d5cbf69395d0db5172f6f | [
"MIT"
] | null | null | null | session_07/02-maxmmin/minmax_maxmin.asm | DigiOhhh/LabArchitettura2-2017-2018 | da34b9a75ab2945ac70d5cbf69395d0db5172f6f | [
"MIT"
] | 1 | 2019-03-06T13:25:28.000Z | 2019-03-06T13:25:28.000Z | # INPUT
# $a0: base address matrice
# $a1: dimensione matrice (righe)
# $a2: dimensione matrice (colonne)
# $a3: se 1 maxmin, se 0 minmax
# OUTPUT
# $v0: massimo tra i minimi su ogni riga se $a3=1, minimo tra i massimi su ogni riga se $a3=0
.data
arr: .space 256
.text
.globl maxmin_minmax
maxmin_minmax:
addi $sp, $sp, -28
# salvo $ra perche procedura non foglia
sw $ra, 0($sp)
# caller saved
sw $s0, 4($sp)
sw $s1, 8($sp)
sw $s2, 12($sp)
sw $s3, 16($sp)
sw $s4, 20($sp)
sw $s5, 24($sp)
# parametri in registri saved
move $s0, $a0
move $s1, $a1
move $s2, $a2
la $s3, arr # dentro arr metterò i minimi di riga
# copia extra di $a1 (numero di righe)
move $s4, $a1
move $s5, $a3
loopr:
beq $s1, $zero, exit_loopr # itero per ogni riga
move $a0, $s0
move $a1, $s2 # il num. di el. per righa è il num. di colonne
li $a2, 1 # passo fissato a 1
beq $s5, 1, L1
jal max
j L2
L1:
jal min
L2:
sw $v0, 0($s3)
addi $s3, $s3, 4
mul $t0, $s2, 4 # t0=offset tra righe (num colonne X 4)
add $s0, $s0, $t0 # in s0 base addr. della prossima riga
add $s1, $s1, -1
j loopr
exit_loopr:
# calcolo il massimo su arr che ora contiene i minimi di riga
la $a0, arr
move $a1, $s4
li $a2, 1
beq $s5, 1, Q1
jal min
j end
Q1:
jal max
end:
lw $ra, 0($sp)
lw $s0, 4($sp)
lw $s1, 8($sp)
lw $s2, 12($sp)
lw $s3, 16($sp)
lw $s4, 20($sp)
lw $s5, 24($sp)
addi $sp, $sp, 28
jr $ra
| 18.24359 | 93 | 0.60506 |
7a84b5518f03e0960a90969e3ee0f0a0a09391c9 | 209 | asm | Assembly | PRG/objects/W8HTrap1.asm | narfman0/smb3_pp1 | 38a58adafff67a403591e38875e9fae943a5fe76 | [
"Unlicense"
] | null | null | null | PRG/objects/W8HTrap1.asm | narfman0/smb3_pp1 | 38a58adafff67a403591e38875e9fae943a5fe76 | [
"Unlicense"
] | null | null | null | PRG/objects/W8HTrap1.asm | narfman0/smb3_pp1 | 38a58adafff67a403591e38875e9fae943a5fe76 | [
"Unlicense"
] | null | null | null | .byte $01 ; Unknown purpose
.byte OBJ_FIREBRO, $0D, $14
.byte OBJ_HAMMERBRO, $1B, $18
.byte OBJ_HAMMERBRO, $1D, $14
.byte OBJ_BOOMERANGBRO, $2D, $13
.byte OBJ_HEAVYBRO, $37, $13
.byte $FF ; Terminator
| 23.222222 | 33 | 0.674641 |
4837de7cca1ae0666d9bec8818e9a3ecde08868a | 422 | asm | Assembly | oeis/053/A053219.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/053/A053219.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/053/A053219.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A053219: Reverse of triangle A053218, read by rows.
; Submitted by Christian Krause
; 1,3,2,8,5,3,20,12,7,4,48,28,16,9,5,112,64,36,20,11,6,256,144,80,44,24,13,7,576,320,176,96,52,28,15,8,1280,704,384,208,112,60,32,17,9,2816,1536,832,448,240,128,68,36,19,10,6144,3328,1792,960,512,272,144,76,40
lpb $0
add $1,1
sub $0,$1
mov $2,$1
sub $2,$0
lpe
add $1,2
add $1,$0
mov $0,2
pow $0,$2
mul $1,$0
mov $0,$1
div $0,2
| 23.444444 | 209 | 0.646919 |
a61be4c7b7ec049945f869d29450f0e0e7181a90 | 571 | asm | Assembly | oeis/051/A051936.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/051/A051936.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/051/A051936.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A051936: Truncated triangular numbers: a(n) = n*(n+1)/2 - 9.
; Submitted by Christian Krause
; 1,6,12,19,27,36,46,57,69,82,96,111,127,144,162,181,201,222,244,267,291,316,342,369,397,426,456,487,519,552,586,621,657,694,732,771,811,852,894,937,981,1026,1072,1119,1167,1216,1266,1317,1369,1422,1476,1531,1587,1644,1702,1761,1821,1882,1944,2007,2071,2136,2202,2269,2337,2406,2476,2547,2619,2692,2766,2841,2917,2994,3072,3151,3231,3312,3394,3477,3561,3646,3732,3819,3907,3996,4086,4177,4269,4362,4456,4551,4647,4744,4842,4941,5041,5142,5244,5347
add $0,5
bin $0,2
sub $0,9
| 71.375 | 447 | 0.747811 |
51056c2164d5fec47b85c3c82185a294369ddf36 | 381 | asm | Assembly | oeis/273/A273385.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/273/A273385.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/273/A273385.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A273385: Number of active (ON,black) cells at stage 2^n-1 of the two-dimensional cellular automaton defined by "Rule 659", based on the 5-celled von Neumann neighborhood.
; Submitted by Jon Maiga
; 1,5,49,225,961,3969,16129,65025,261121,1046529,4190209,16769025,67092481,268402689,1073676289,4294836225
mov $1,$0
min $0,2
mov $2,2
pow $2,$1
bin $2,2
mul $0,$2
mul $0,4
add $0,1
| 29.307692 | 172 | 0.740157 |
760eb9d7d9ccf1c27aebbb0978e1a660eb38ea63 | 291 | asm | Assembly | programs/oeis/156/A156551.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/156/A156551.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/156/A156551.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A156551: Period 10: repeat [8,6,0,4,2,2,4,0,6,8].
; 8,6,0,4,2,2,4,0,6,8,8,6,0,4,2,2,4,0,6,8,8,6,0,4,2,2,4,0,6,8,8,6,0,4,2,2,4,0,6,8,8,6,0,4,2,2,4,0,6,8,8,6,0,4,2,2,4,0,6,8,8,6,0,4,2,2,4,0,6,8,8,6,0,4,2,2,4,0,6,8,8,6,0,4,2,2,4,0,6,8
sub $0,2
mul $0,2
dif $0,4
mul $0,2
add $0,10
mod $0,10
| 29.1 | 181 | 0.525773 |
3ce80cdda00e9e4c9f36aca66a128fd0b00624a2 | 1,562 | asm | Assembly | programs/oeis/100/A100037.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/100/A100037.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/100/A100037.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A100037: Positions of occurrences of the natural numbers as a second subsequence in A100035.
; 4,9,18,31,48,69,94,123,156,193,234,279,328,381,438,499,564,633,706,783,864,949,1038,1131,1228,1329,1434,1543,1656,1773,1894,2019,2148,2281,2418,2559,2704,2853,3006,3163,3324,3489,3658,3831,4008,4189,4374,4563,4756,4953,5154,5359,5568,5781,5998,6219,6444,6673,6906,7143,7384,7629,7878,8131,8388,8649,8914,9183,9456,9733,10014,10299,10588,10881,11178,11479,11784,12093,12406,12723,13044,13369,13698,14031,14368,14709,15054,15403,15756,16113,16474,16839,17208,17581,17958,18339,18724,19113,19506,19903,20304,20709,21118,21531,21948,22369,22794,23223,23656,24093,24534,24979,25428,25881,26338,26799,27264,27733,28206,28683,29164,29649,30138,30631,31128,31629,32134,32643,33156,33673,34194,34719,35248,35781,36318,36859,37404,37953,38506,39063,39624,40189,40758,41331,41908,42489,43074,43663,44256,44853,45454,46059,46668,47281,47898,48519,49144,49773,50406,51043,51684,52329,52978,53631,54288,54949,55614,56283,56956,57633,58314,58999,59688,60381,61078,61779,62484,63193,63906,64623,65344,66069,66798,67531,68268,69009,69754,70503,71256,72013,72774,73539,74308,75081,75858,76639,77424,78213,79006,79803,80604,81409,82218,83031,83848,84669,85494,86323,87156,87993,88834,89679,90528,91381,92238,93099,93964,94833,95706,96583,97464,98349,99238,100131,101028,101929,102834,103743,104656,105573,106494,107419,108348,109281,110218,111159,112104,113053,114006,114963,115924,116889,117858,118831,119808,120789,121774,122763,123756,124753
mul $0,2
mov $1,-3
bin $1,$0
add $1,3
| 195.25 | 1,427 | 0.814981 |
2b71a6bb889921b054b81ed570b57b6f172c33d5 | 434 | asm | Assembly | src/mods/horv_via_undeploysinto.asm | mvdhout1992/ts-patches | a426970abeb6993eea6703d1a756fd74489ffed2 | [
"MIT"
] | 33 | 2016-07-30T14:17:28.000Z | 2021-12-19T15:45:19.000Z | src/mods/horv_via_undeploysinto.asm | A-Productions/ts-patches | 326db731f7226d9e803feab475777c730688634e | [
"MIT"
] | 73 | 2018-08-17T00:25:19.000Z | 2021-05-10T08:31:15.000Z | src/mods/horv_via_undeploysinto.asm | A-Productions/ts-patches | 326db731f7226d9e803feab475777c730688634e | [
"MIT"
] | 18 | 2017-05-16T11:28:06.000Z | 2022-03-20T20:41:03.000Z | %include "macros/patch.inc"
; This hack allows specifying different "harvester without back" units
; for different harvesters via the UndeploysInto= key
; With this we're able to have unique refineries and harvesters for TD and RA factions
; Credits to AlexB for the original hack
@SET 0x00653D89, {mov cl, [esi+36Dh]}
@SET 0x00653D8F, {test cl, cl}
@SET 0x00653D93, {mov eax, [eax+278h]}
@SET 0x00653D99, nop
@SET 0x00653D9A, nop
| 31 | 86 | 0.75576 |
dbe26b4dc5657134f6f1949e3dfce026ede3ee23 | 148 | asm | Assembly | code/5-E-1.asm | gdzhang2012/Assembly-Language-by-Wangshuang | 7c53cfc60d83c19165e674d66015759f49663985 | [
"Apache-2.0"
] | null | null | null | code/5-E-1.asm | gdzhang2012/Assembly-Language-by-Wangshuang | 7c53cfc60d83c19165e674d66015759f49663985 | [
"Apache-2.0"
] | null | null | null | code/5-E-1.asm | gdzhang2012/Assembly-Language-by-Wangshuang | 7c53cfc60d83c19165e674d66015759f49663985 | [
"Apache-2.0"
] | null | null | null | assume cs:code
code segment
mov ax,0020h
mov ds,ax
mov bx,0
mov cx,0040h
s: mov [bx],bl
inc bx
loop s
mov ax,4c00h
int 21h
code ends
end
| 8.705882 | 14 | 0.682432 |
06988add6011dcbac6248c6c407f5e25bec67e6c | 147 | asm | Assembly | other.7z/SFC.7z/SFC/ソースデータ/ゼルダの伝説神々のトライフォース/英語_PAL/pal_asm/zel_init.asm | prismotizm/gigaleak | d082854866186a05fec4e2fdf1def0199e7f3098 | [
"MIT"
] | null | null | null | other.7z/SFC.7z/SFC/ソースデータ/ゼルダの伝説神々のトライフォース/英語_PAL/pal_asm/zel_init.asm | prismotizm/gigaleak | d082854866186a05fec4e2fdf1def0199e7f3098 | [
"MIT"
] | null | null | null | other.7z/SFC.7z/SFC/ソースデータ/ゼルダの伝説神々のトライフォース/英語_PAL/pal_asm/zel_init.asm | prismotizm/gigaleak | d082854866186a05fec4e2fdf1def0199e7f3098 | [
"MIT"
] | null | null | null | Name: zel_init.asm
Type: file
Size: 278960
Last-Modified: '2016-05-13T04:25:37Z'
SHA-1: C4B0A41AEEE0E53A0F810839B6936E96A8AE26E9
Description: null
| 21 | 47 | 0.816327 |
639c9c824ba89d8a85ba5e7c76e4a46962fcbf0f | 505 | asm | Assembly | oeis/068/A068637.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/068/A068637.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/068/A068637.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A068637: a(n) = Max(n, R(n)), where R(n) (A004086) = digit reversal of n.
; Submitted by Simon Strandgaard
; 1,2,3,4,5,6,7,8,9,10,11,21,31,41,51,61,71,81,91,20,21,22,32,42,52,62,72,82,92,30,31,32,33,43,53,63,73,83,93,40,41,42,43,44,54,64,74,84,94,50,51,52,53,54,55,65,75,85,95,60,61,62,63,64,65,66,76,86,96,70,71,72,73,74,75,76,77,87,97,80,81,82,83,84,85,86,87,88,98,90,91,92,93,94,95,96,97,98,99,100
add $0,1
mov $1,$0
seq $0,4086 ; Read n backwards (referred to as R(n) in many sequences).
max $0,$1
| 56.111111 | 293 | 0.653465 |
b4f0b3e16d43a334f7a363483767829532f5ac83 | 4,666 | asm | Assembly | asm/debug.asm | hansbonini/smd_castlevania_bloodlines | f94395868af3381238097a2fa955da3bbeb8f488 | [
"MIT"
] | 1 | 2018-06-11T15:41:48.000Z | 2018-06-11T15:41:48.000Z | asm/debug.asm | hansbonini/smd_castlevania_bloodlines | f94395868af3381238097a2fa955da3bbeb8f488 | [
"MIT"
] | null | null | null | asm/debug.asm | hansbonini/smd_castlevania_bloodlines | f94395868af3381238097a2fa955da3bbeb8f488 | [
"MIT"
] | null | null | null |
// ********************************************************
// * Debug Mode *
// ********************************************************
if ({DEBUG} == 1) {
if ({DEBUG_INVENCIBILITY} == 1) {
disablePlayerCollision()
}
if ({DEBUG_STAGE} == 1 ) {
if ({DEBUG_SUBSTAGE} == 2) {
selectStage($0001)
}
if ({DEBUG_SUBSTAGE} == 3) {
selectStage($0002)
}
if ({DEBUG_SUBSTAGE} == 4) {
selectStage($0003)
}
if ({DEBUG_SUBSTAGE} == 5) {
selectStage($0007)
}
if ({DEBUG_SUBSTAGE} == 6) {
selectStage($0008)
}
if ({DEBUG_SUBSTAGE} == 7) {
selectStage($0009)
}
if ({DEBUG_SUBSTAGE} == 8) {
selectStage($000A)
}
if ({DEBUG_SUBSTAGE} == 9) {
selectStage($000B)
}
if ({DEBUG_SUBSTAGE} == 10) {
selectStage($000C)
}
if ({DEBUG_SUBSTAGE} == 11) {
selectStage($000D)
}
}
if ({DEBUG_STAGE} == 2 ) {
if ({DEBUG_SUBSTAGE} == 1) {
selectStage($0011)
}
if ({DEBUG_SUBSTAGE} == 2) {
selectStage($0012)
}
if ({DEBUG_SUBSTAGE} == 3) {
selectStage($0013)
}
if ({DEBUG_SUBSTAGE} == 4) {
selectStage($0015)
}
if ({DEBUG_SUBSTAGE} == 5) {
selectStage($0017)
}
if ({DEBUG_SUBSTAGE} == 6) {
selectStage($0019)
}
if ({DEBUG_SUBSTAGE} == 7) {
selectStage($0018)
}
}
if ({DEBUG_STAGE} == 3 ) {
if ({DEBUG_SUBSTAGE} == 1) {
selectStage($001A)
}
if ({DEBUG_SUBSTAGE} == 2) {
selectStage($001B)
}
if ({DEBUG_SUBSTAGE} == 3) {
selectStage($001F)
}
if ({DEBUG_SUBSTAGE} == 4) {
selectStage($0031)
}
if ({DEBUG_SUBSTAGE} == 5) {
selectStage($001C)
}
if ({DEBUG_SUBSTAGE} == 6) {
selectStage($0032)
}
if ({DEBUG_SUBSTAGE} == 7) {
selectStage($001E)
}
if ({DEBUG_SUBSTAGE} == 8) {
selectStage($0024)
}
if ({DEBUG_SUBSTAGE} == 9) {
selectStage($001D)
}
}
if ({DEBUG_STAGE} == 4 ) {
if ({DEBUG_SUBSTAGE} == 1) {
selectStage($0020)
}
if ({DEBUG_SUBSTAGE} == 2) {
selectStage($0021)
}
if ({DEBUG_SUBSTAGE} == 3) {
selectStage($0022)
}
if ({DEBUG_SUBSTAGE} == 4) {
selectStage($0023)
}
if ({DEBUG_SUBSTAGE} == 5) {
selectStage($0029)
}
if ({DEBUG_SUBSTAGE} == 6) {
selectStage($002A)
}
if ({DEBUG_SUBSTAGE} == 7) {
selectStage($0048)
}
if ({DEBUG_SUBSTAGE} == 8) {
selectStage($0035)
}
if ({DEBUG_SUBSTAGE} == 9) {
selectStage($002C)
}
if ({DEBUG_SUBSTAGE} == 10) {
selectStage($002D)
}
if ({DEBUG_SUBSTAGE} == 11) {
selectStage($002E)
}
}
if ({DEBUG_STAGE} == 5 ) {
if ({DEBUG_SUBSTAGE} == 1) {
selectStage($0036)
}
if ({DEBUG_SUBSTAGE} == 2) {
selectStage($0037)
}
if ({DEBUG_SUBSTAGE} == 3) {
selectStage($0038)
}
if ({DEBUG_SUBSTAGE} == 4) {
selectStage($0039)
}
if ({DEBUG_SUBSTAGE} == 5) {
selectStage($003C)
}
if ({DEBUG_SUBSTAGE} == 6) {
selectStage($0047)
}
if ({DEBUG_SUBSTAGE} == 7) {
selectStage($003E)
}
if ({DEBUG_SUBSTAGE} == 8) {
selectStage($003F)
}
}
if ({DEBUG_STAGE} == 6 ) {
if ({DEBUG_SUBSTAGE} == 1) {
selectStage($0042)
}
if ({DEBUG_SUBSTAGE} == 2) {
selectStage($0043)
}
if ({DEBUG_SUBSTAGE} == 3) {
selectStage($0045)
}
if ({DEBUG_SUBSTAGE} == 4) {
selectStage($0044)
}
if ({DEBUG_SUBSTAGE} == 5) {
selectStage($0027)
}
if ({DEBUG_SUBSTAGE} == 6) {
selectStage($0016)
}
if ({DEBUG_SUBSTAGE} == 7) {
selectStage($0028)
}
}
} | 24.051546 | 59 | 0.388556 |
e62e1f41c8a557edb3d43deb278a281b457773fb | 791 | asm | Assembly | oeis/192/A192936.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/192/A192936.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/192/A192936.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A192936: Constant term of the reduction by x^2 -> x + 1 of the polynomial p(n,x) = Product_{k=1..n} (x+k).
; Submitted by Jon Maiga
; 1,1,3,13,71,463,3497,29975,287265,3042545,35284315,444617525,6048575335,88347242335,1378930649745,22903345844335,403342641729665,7506843094993825,147226845692229875,3034786640911840925,65592491119118514375,1483309024460916256175,35027458670366680144825,862192041484104577293575,22085088263864978950293025,587801380344270305715799825,16232449494653684558481417675,464503505089965481851220877125,13756696916574535142014898774375,421176078533361032455523997565375,13315995091498390908920492818990625
mov $2,1
mov $3,$0
add $0,1
lpb $3
mov $0,$2
sub $2,$1
add $3,1
mul $2,$3
add $1,$2
mod $2,$0
mul $2,$3
add $2,$1
mov $1,$0
sub $3,2
lpe
| 39.55 | 498 | 0.792668 |
f2bdbc7d9f2fa9d7265c936cd63a3a3f222e9458 | 541 | asm | Assembly | src/Compiler/ASM/Runtime/asm/write_error.asm | PetukhovVictor/compiler2 | 0bf87393ce9ecdd421393165fc14cb7f03f5e3b8 | [
"MIT"
] | 3 | 2017-09-08T21:35:31.000Z | 2019-04-24T11:48:59.000Z | src/Compiler/ASM/Runtime/asm/write_error.asm | PetukhovVictor/compiler2 | 0bf87393ce9ecdd421393165fc14cb7f03f5e3b8 | [
"MIT"
] | 1 | 2018-11-19T15:34:00.000Z | 2018-11-19T15:35:52.000Z | src/Compiler/ASM/Runtime/asm/write_error.asm | PetukhovVictor/compiler2 | 0bf87393ce9ecdd421393165fc14cb7f03f5e3b8 | [
"MIT"
] | 4 | 2017-03-13T06:16:48.000Z | 2019-04-24T11:49:00.000Z | %define STDERR 2
%define WRITE_SYS_CALL 4
global write_error
write_error:
push ebx ; value size
push eax ; pointer to the value
push STDERR ; file descriptor 2 = STDERR
mov eax, WRITE_SYS_CALL ; 'write' system call = 4
sub esp, 4 ; align the stack by moving the stack pointer 4 more bytes (16 - 4 * 3)
int 0x80 ; interrupt of the syscall type
add esp, 20 ; restore stack state
ret | 41.615385 | 103 | 0.528651 |
49ebc4e706eab6a896ce1fd613b022a7dc48e2ce | 75 | asm | Assembly | data/maps/headers/PokemonTower3F.asm | opiter09/ASM-Machina | 75d8e457b3e82cc7a99b8e70ada643ab02863ada | [
"CC0-1.0"
] | 1 | 2022-02-15T00:19:44.000Z | 2022-02-15T00:19:44.000Z | data/maps/headers/PokemonTower3F.asm | opiter09/ASM-Machina | 75d8e457b3e82cc7a99b8e70ada643ab02863ada | [
"CC0-1.0"
] | null | null | null | data/maps/headers/PokemonTower3F.asm | opiter09/ASM-Machina | 75d8e457b3e82cc7a99b8e70ada643ab02863ada | [
"CC0-1.0"
] | null | null | null |
map_header PokemonTower3F, POKEMON_TOWER_3F, CEMETERY, 0
end_map_header
| 18.75 | 57 | 0.84 |
64637b4ba9bda831de654df91b3497b33e6dc449 | 397 | asm | Assembly | oeis/279/A279318.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/279/A279318.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/279/A279318.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A279318: Permutation of the nonnegative integers [6k+3, 6k+2, 6k+1, 6k, 6k+5, 6k+4].
; Submitted by Jamie Morken(s3)
; 3,2,1,0,5,4,9,8,7,6,11,10,15,14,13,12,17,16,21,20,19,18,23,22,27,26,25,24,29,28,33,32,31,30,35,34,39,38,37,36,41,40,45,44,43,42,47,46,51,50,49,48,53,52,57,56,55,54,59,58,63,62,61,60,65,64,69
mov $2,$0
div $0,2
mul $0,2
div $0,3
add $0,2
mul $0,6
div $2,-1
add $0,$2
sub $0,9
| 28.357143 | 192 | 0.634761 |
acf55a6ea95e3f9d4f3ab38aed56b3d8f4c172e1 | 1,421 | asm | Assembly | src/arch/x86/mach-i386/entry.asm | HumbleHunger/xbook2 | 40ed7b3992fdab35d6f518c00c364302c950a510 | [
"MIT"
] | null | null | null | src/arch/x86/mach-i386/entry.asm | HumbleHunger/xbook2 | 40ed7b3992fdab35d6f518c00c364302c950a510 | [
"MIT"
] | 1 | 2021-04-05T14:21:21.000Z | 2021-04-05T14:21:21.000Z | src/arch/x86/mach-i386/entry.asm | HumbleHunger/xbook2 | 40ed7b3992fdab35d6f518c00c364302c950a510 | [
"MIT"
] | null | null | null | %include "arch/const.inc"
[bits 32]
[section .text]
extern kernel_main
extern arch_init
extern setup_paging
global kernel_start
;这个标签是整个内核的入口，从loader跳转到这儿
kernel_start:
mov esp, KERNEL_STACK_TOP_PHY
mov byte [TEXT_START_ADDR_PHY+160*4+0], 'K'
mov byte [TEXT_START_ADDR_PHY+160*4+1], 0X07
mov byte [TEXT_START_ADDR_PHY+160*4+2], 'E'
mov byte [TEXT_START_ADDR_PHY+160*4+3], 0X07
mov byte [TEXT_START_ADDR_PHY+160*4+4], 'R'
mov byte [TEXT_START_ADDR_PHY+160*4+5], 0X07
mov byte [TEXT_START_ADDR_PHY+160*4+6], 'N'
mov byte [TEXT_START_ADDR_PHY+160*4+7], 0X07
mov byte [TEXT_START_ADDR_PHY+160*4+8], 'E'
mov byte [TEXT_START_ADDR_PHY+160*4+9], 0X07
mov byte [TEXT_START_ADDR_PHY+160*4+10], 'L'
mov byte [TEXT_START_ADDR_PHY+160*4+11], 0X07
; setup pageing, runing in virtual address
call setup_paging
; set eip & esp to high addr
xor ebp, ebp
jmp .virtual_addr + KERN_BASE_VIR_ADDR
.virtual_addr:
mov esp, KERNEL_STACK_TOP_VIR
mov byte [TEXT_START_ADDR_VIR+160*5+0], 'P'
mov byte [TEXT_START_ADDR_VIR+160*5+1], 0X07
mov byte [TEXT_START_ADDR_VIR+160*5+2], 'A'
mov byte [TEXT_START_ADDR_VIR+160*5+3], 0X07
mov byte [TEXT_START_ADDR_VIR+160*5+4], 'G'
mov byte [TEXT_START_ADDR_VIR+160*5+5], 0X07
mov byte [TEXT_START_ADDR_VIR+160*5+6], 'E'
mov byte [TEXT_START_ADDR_VIR+160*5+7], 0X07
call arch_init
call kernel_main
kernel_stop:
hlt
jmp kernel_stop
jmp $
| 27.326923 | 47 | 0.736101 |
e44268265b54e84faf9c40132650afe73530890b | 5,587 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0xca.log_21829_1536.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0xca.log_21829_1536.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0xca.log_21829_1536.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r8
push %rax
push %rbx
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_D_ht+0x1e988, %rsi
lea addresses_A_ht+0x12354, %rdi
nop
nop
nop
nop
nop
and %r8, %r8
mov $6, %rcx
rep movsl
and $24716, %rdx
lea addresses_UC_ht+0x1ba0a, %r11
nop
nop
cmp $3231, %rdi
movb $0x61, (%r11)
nop
and %rcx, %rcx
lea addresses_WT_ht+0x17708, %r11
nop
nop
sub %rbx, %rbx
mov (%r11), %rsi
nop
nop
and $38670, %rsi
lea addresses_WC_ht+0x11308, %rdi
nop
nop
nop
dec %r8
movw $0x6162, (%rdi)
nop
nop
nop
nop
add $5416, %rbx
lea addresses_WC_ht+0x4e20, %r8
nop
cmp %rbx, %rbx
movb (%r8), %cl
nop
nop
nop
and %r8, %r8
lea addresses_A_ht+0xb688, %rsi
lea addresses_D_ht+0xa188, %rdi
and $14126, %rax
mov $96, %rcx
rep movsq
nop
xor %rcx, %rcx
lea addresses_WC_ht+0xf202, %r11
nop
nop
nop
nop
nop
cmp %r8, %r8
mov $0x6162636465666768, %rsi
movq %rsi, %xmm4
movups %xmm4, (%r11)
nop
nop
nop
nop
nop
and $19796, %rsi
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbx
pop %rax
pop %r8
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r11
push %r12
push %r14
push %rcx
push %rdx
// Faulty Load
lea addresses_PSE+0x8188, %rdx
cmp %r12, %r12
movb (%rdx), %r11b
lea oracles, %r10
and $0xff, %r11
shlq $12, %r11
mov (%r10,%r11,1), %r11
pop %rdx
pop %rcx
pop %r14
pop %r12
pop %r11
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'src': {'congruent': 0, 'AVXalign': True, 'same': False, 'size': 32, 'NT': True, 'type': 'addresses_PSE'}, 'OP': 'LOAD'}
[Faulty Load]
{'src': {'congruent': 0, 'AVXalign': False, 'same': True, 'size': 1, 'NT': False, 'type': 'addresses_PSE'}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'congruent': 11, 'same': False, 'type': 'addresses_D_ht'}, 'OP': 'REPM', 'dst': {'congruent': 1, 'same': False, 'type': 'addresses_A_ht'}}
{'OP': 'STOR', 'dst': {'congruent': 1, 'AVXalign': False, 'same': False, 'size': 1, 'NT': False, 'type': 'addresses_UC_ht'}}
{'src': {'congruent': 7, 'AVXalign': False, 'same': False, 'size': 8, 'NT': False, 'type': 'addresses_WT_ht'}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'congruent': 6, 'AVXalign': False, 'same': False, 'size': 2, 'NT': False, 'type': 'addresses_WC_ht'}}
{'src': {'congruent': 2, 'AVXalign': False, 'same': False, 'size': 1, 'NT': False, 'type': 'addresses_WC_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 6, 'same': False, 'type': 'addresses_A_ht'}, 'OP': 'REPM', 'dst': {'congruent': 11, 'same': False, 'type': 'addresses_D_ht'}}
{'OP': 'STOR', 'dst': {'congruent': 1, 'AVXalign': False, 'same': False, 'size': 16, 'NT': False, 'type': 'addresses_WC_ht'}}
{'33': 21829}
33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33
*/
| 42.648855 | 2,999 | 0.657777 |
2d128cc58bebbb93e113cb8b6f7a6af0f45c2015 | 475 | asm | Assembly | data/pokemon/base_stats/sinnoh/gallade.asm | Dev727/ancientplatinum | 8b212a1728cc32a95743e1538b9eaa0827d013a7 | [
"blessing"
] | null | null | null | data/pokemon/base_stats/sinnoh/gallade.asm | Dev727/ancientplatinum | 8b212a1728cc32a95743e1538b9eaa0827d013a7 | [
"blessing"
] | null | null | null | data/pokemon/base_stats/sinnoh/gallade.asm | Dev727/ancientplatinum | 8b212a1728cc32a95743e1538b9eaa0827d013a7 | [
"blessing"
] | null | null | null | db 0 ; 475 DEX NO
db 68, 125, 65, 80, 65, 115
; hp atk def spd sat sdf
db PSYCHIC, FIGHTING ; type
db 45 ; catch rate
db 208 ; base exp
db NO_ITEM, NO_ITEM ; items
db GENDER_F0 ; gender ratio
db 100 ; unknown 1
db 20 ; step cycles to hatch
db 5 ; unknown 2
INCBIN "gfx/pokemon/sinnoh/gallade/front.dimensions"
db 0, 0, 0, 0 ; padding
db GROWTH_SLOW ; growth rate
dn EGG_HUMANSHAPE, EGG_INDETERMINATE ; egg groups
; tm/hm learnset
tmhm
; end
| 21.590909 | 53 | 0.671579 |
9f144700668cb42894e3e2f55e31d0fe024fdb6c | 361 | nasm | Assembly | slae32/assignment/3/egg_hunter.nasm | rbctee/SlaeExam | f21ae27ac2a0edbd49869d08469b4b9105b20b6a | [
"MIT"
] | null | null | null | slae32/assignment/3/egg_hunter.nasm | rbctee/SlaeExam | f21ae27ac2a0edbd49869d08469b4b9105b20b6a | [
"MIT"
] | null | null | null | slae32/assignment/3/egg_hunter.nasm | rbctee/SlaeExam | f21ae27ac2a0edbd49869d08469b4b9105b20b6a | [
"MIT"
] | null | null | null | ; Author: Robert C. Raducioiu (rbct)
global _start
section .text
_start:
xor ebx, ebx
mul ebx
CheckAddress:
inc ebx
xor eax, eax
mov al, 12
int 0x80
cmp al, 0xf2
jz CheckAddress
CheckBytes:
mov edx, DWORD[ebx]
mov esi, 0x72626373
inc esi
cmp edx, esi
jnz CheckAddress
add ebx, 4
call ebx
| 10.314286 | 36 | 0.603878 |
b00252a20b9d114936c14849f039408fe0b4d5cf | 321 | asm | Assembly | oeis/067/A067408.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/067/A067408.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/067/A067408.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A067408: Eighth column of triangle A067402.
; 1,15,960,61440,3932160,251658240,16106127360,1030792151040,65970697666560,4222124650659840,270215977642229760,17293822569102704640,1106804644422573096960,70835497243044678205440
mul $0,2
seq $0,132433 ; a(1) = 2; for n>=2, a(n) = 8*a(n-1) + 1.
div $0,64
mul $0,7
add $0,1
| 35.666667 | 179 | 0.766355 |
f616452ff7b85621fcdaf5abc39ac7dc3f747b14 | 40,612 | asm | Assembly | fiat-amd64/178.66_ratio06168_seed42736280487937_mul_p448_solinas.asm | dderjoel/fiat-crypto | 57a9612577d766a0ae83169ea9517bfa7f01ea4e | [
"BSD-1-Clause",
"Apache-2.0",
"MIT-0",
"MIT"
] | 491 | 2015-11-25T23:44:39.000Z | 2022-03-29T17:31:21.000Z | fiat-amd64/178.66_ratio06168_seed42736280487937_mul_p448_solinas.asm | dderjoel/fiat-crypto | 57a9612577d766a0ae83169ea9517bfa7f01ea4e | [
"BSD-1-Clause",
"Apache-2.0",
"MIT-0",
"MIT"
] | 755 | 2016-02-02T14:03:05.000Z | 2022-03-31T16:47:23.000Z | fiat-amd64/178.66_ratio06168_seed42736280487937_mul_p448_solinas.asm | dderjoel/fiat-crypto | 57a9612577d766a0ae83169ea9517bfa7f01ea4e | [
"BSD-1-Clause",
"Apache-2.0",
"MIT-0",
"MIT"
] | 117 | 2015-10-25T16:28:15.000Z | 2022-02-08T23:01:09.000Z | SECTION .text
GLOBAL mul_p448_solinas
mul_p448_solinas:
sub rsp, 0x508 ; last 0x30 (6) for Caller - save regs
mov [ rsp + 0x4d8 ], rbx; saving to stack
mov [ rsp + 0x4e0 ], rbp; saving to stack
mov [ rsp + 0x4e8 ], r12; saving to stack
mov [ rsp + 0x4f0 ], r13; saving to stack
mov [ rsp + 0x4f8 ], r14; saving to stack
mov [ rsp + 0x500 ], r15; saving to stack
mov rax, rdx; preserving value of arg2 into a new reg
mov rdx, [ rsi + 0x0 ]; saving arg1[0] in rdx.
mulx r10, r11, [ rax + 0x38 ]; x182, x181<- arg1[0] * arg2[7]
mov rdx, [ rax + 0x28 ]; arg2[5] to rdx
mulx rbx, rbp, [ rsi + 0x10 ]; x156, x155<- arg1[2] * arg2[5]
mov rdx, [ rax + 0x30 ]; arg2[6] to rdx
mulx r12, r13, [ rsi + 0x8 ]; x168, x167<- arg1[1] * arg2[6]
mov rdx, [ rax + 0x20 ]; arg2[4] to rdx
mulx r14, r15, [ rsi + 0x18 ]; x146, x145<- arg1[3] * arg2[4]
mov rdx, [ rsi + 0x20 ]; arg1[4] to rdx
mulx rcx, r8, [ rax + 0x18 ]; x138, x137<- arg1[4] * arg2[3]
mov rdx, [ rax + 0x10 ]; arg2[2] to rdx
mov [ rsp + 0x0 ], rdi; spilling out1 to mem
mulx r9, rdi, [ rsi + 0x28 ]; x132, x131<- arg1[5] * arg2[2]
mov rdx, [ rax + 0x38 ]; arg2[7] to rdx
mov [ rsp + 0x8 ], r10; spilling x182 to mem
mov [ rsp + 0x10 ], r12; spilling x168 to mem
mulx r10, r12, [ rsi + 0x20 ]; x106, x105<- arg1[4] * arg2[7]
mov rdx, [ rax + 0x8 ]; arg2[1] to rdx
mov [ rsp + 0x18 ], rbx; spilling x156 to mem
mov [ rsp + 0x20 ], r14; spilling x146 to mem
mulx rbx, r14, [ rsi + 0x30 ]; x128, x127<- arg1[6] * arg2[1]
mov rdx, [ rax + 0x0 ]; arg2[0] to rdx
mov [ rsp + 0x28 ], rcx; spilling x138 to mem
mov [ rsp + 0x30 ], r9; spilling x132 to mem
mulx rcx, r9, [ rsi + 0x38 ]; x126, x125<- arg1[7] * arg2[0]
mov rdx, [ rsi + 0x28 ]; arg1[5] to rdx
mov [ rsp + 0x38 ], rbx; spilling x128 to mem
mov [ rsp + 0x40 ], rcx; spilling x126 to mem
mulx rbx, rcx, [ rax + 0x30 ]; x98, x97<- arg1[5] * arg2[6]
mov rdx, [ rax + 0x20 ]; arg2[4] to rdx
mov [ rsp + 0x48 ], r10; spilling x106 to mem
mov [ rsp + 0x50 ], rbx; spilling x98 to mem
mulx r10, rbx, [ rsi + 0x38 ]; x82, x81<- arg1[7] * arg2[4]
mov rdx, [ rax + 0x28 ]; arg2[5] to rdx
mov [ rsp + 0x58 ], r10; spilling x82 to mem
mov [ rsp + 0x60 ], r11; spilling x181 to mem
mulx r10, r11, [ rsi + 0x30 ]; x90, x89<- arg1[6] * arg2[5]
mov [ rsp + 0x68 ], r10; spilling x90 to mem
xor r10, r10
adox rbx, r11
adcx rbx, rcx
seto cl; spill OF x228 to reg (rcx)
mov r11, -0x3 ; moving imm to reg
inc r11; OF<-0x0, preserve CF (debug 7; load -3, increase it, save it as -2). #last resort
adox rbx, r12
seto r12b; spill OF x236 to reg (r12)
mov r11, -0x3 ; moving imm to reg
inc r11; OF<-0x0, preserve CF (debug 7; load -3, increase it, save it as -2). #last resort
adox rbx, r9
setc r9b; spill CF x232 to reg (r9)
clc;
adcx rbx, r14
seto r14b; spill OF x240 to reg (r14)
mov r11, -0x3 ; moving imm to reg
inc r11; OF<-0x0, preserve CF (debug 7; load -3, increase it, save it as -2). #last resort
adox rbx, rdi
seto dil; spill OF x248 to reg (rdi)
mov r11, -0x3 ; moving imm to reg
inc r11; OF<-0x0, preserve CF (debug 7; load -3, increase it, save it as -2). #last resort
adox rbx, r8
setc r8b; spill CF x244 to reg (r8)
clc;
adcx rbx, r15
setc r15b; spill CF x256 to reg (r15)
clc;
adcx rbx, rbp
setc bpl; spill CF x260 to reg (rbp)
clc;
adcx rbx, r13
seto r13b; spill OF x252 to reg (r13)
mov r11, -0x3 ; moving imm to reg
inc r11; OF<-0x0, preserve CF (debug 7; load -3, increase it, save it as -2). #last resort
adox rbx, [ rsp + 0x60 ]
mov r10, [ rsp + 0x58 ]; load m64 x82 to register64
movzx rcx, cl
lea r10, [ rcx + r10 ]
mov rcx, [ rsp + 0x68 ]
lea r10, [rcx+r10]
movzx r9, r9b
lea r10, [ r9 + r10 ]
mov r9, [ rsp + 0x50 ]
lea r10, [r9+r10]
movzx r12, r12b
lea r10, [ r12 + r10 ]
mov r12, [ rsp + 0x48 ]
lea r10, [r12+r10]
movzx r14, r14b
lea r10, [ r14 + r10 ]
mov r14, [ rsp + 0x40 ]
lea r10, [r14+r10]
movzx r8, r8b
lea r10, [ r8 + r10 ]
mov r8, [ rsp + 0x38 ]
lea r10, [r8+r10]
movzx rdi, dil
lea r10, [ rdi + r10 ]
mov rdi, [ rsp + 0x30 ]
lea r10, [rdi+r10]
movzx r13, r13b
lea r10, [ r13 + r10 ]
mov r13, [ rsp + 0x28 ]
lea r10, [r13+r10]
movzx r15, r15b
lea r10, [ r15 + r10 ]
mov r15, [ rsp + 0x20 ]
lea r10, [r15+r10]
movzx rbp, bpl
lea r10, [ rbp + r10 ]
mov rbp, [ rsp + 0x18 ]
lea r10, [rbp+r10]
adcx r10, [ rsp + 0x10 ]
adox r10, [ rsp + 0x8 ]
mov rcx, rbx; x562, copying x267 here, cause x267 is needed in a reg for other than x562, namely all: , x562, x563, size: 2
shrd rcx, r10, 56; x562 <- x269||x267 >> 56
mov rdx, [ rsi + 0x10 ]; arg1[2] to rdx
mulx r9, r12, [ rax + 0x8 ]; x164, x163<- arg1[2] * arg2[1]
mov rdx, [ rsi + 0x8 ]; arg1[1] to rdx
mulx r14, r8, [ rax + 0x10 ]; x176, x175<- arg1[1] * arg2[2]
mov rdx, [ rax + 0x18 ]; arg2[3] to rdx
mulx rdi, r13, [ rsi + 0x0 ]; x190, x189<- arg1[0] * arg2[3]
mov rdx, [ rax + 0x0 ]; arg2[0] to rdx
mulx r15, rbp, [ rsi + 0x18 ]; x154, x153<- arg1[3] * arg2[0]
mov rdx, [ rax + 0x38 ]; arg2[7] to rdx
mulx r10, r11, [ rsi + 0x20 ]; x62, x61<- arg1[4] * arg2[7]
mov rdx, [ rsi + 0x28 ]; arg1[5] to rdx
mov [ rsp + 0x70 ], rcx; spilling x562 to mem
mov [ rsp + 0x78 ], rdi; spilling x190 to mem
mulx rcx, rdi, [ rax + 0x30 ]; x54, x53<- arg1[5] * arg2[6]
mov rdx, [ rax + 0x28 ]; arg2[5] to rdx
mov [ rsp + 0x80 ], r14; spilling x176 to mem
mov [ rsp + 0x88 ], r9; spilling x164 to mem
mulx r14, r9, [ rsi + 0x30 ]; x44, x43<- arg1[6] * arg2[5]
mov rdx, [ rsi + 0x38 ]; arg1[7] to rdx
mov [ rsp + 0x90 ], r15; spilling x154 to mem
mov [ rsp + 0x98 ], r10; spilling x62 to mem
mulx r15, r10, [ rax + 0x20 ]; x32, x31<- arg1[7] * arg2[4]
add r10, r9; could be done better, if r0 has been u8 as well
mov r9, -0x2 ; moving imm to reg
inc r9; OF<-0x0, preserve CF (debug: 6; load -2, increase it, save as -1)
adox r10, rdi
setc dil; spill CF x198 to reg (rdi)
clc;
adcx r10, r11
seto r11b; spill OF x202 to reg (r11)
inc r9; OF<-0x0, preserve CF (debug: state 2 (y: -1, n: 0))
adox r10, rbp
movzx rdi, dil
lea r14, [ r14 + r15 ]
lea r14, [ r14 + rdi ]
movzx r11, r11b
lea rcx, [ rcx + r14 ]
lea rcx, [ rcx + r11 ]
setc bpl; spill CF x206 to reg (rbp)
clc;
adcx r10, r12
setc r12b; spill CF x214 to reg (r12)
clc;
adcx r10, r8
setc r8b; spill CF x218 to reg (r8)
clc;
adcx r10, r13
movzx rbp, bpl
lea rcx, [ rbp + rcx ]
mov rbp, [ rsp + 0x98 ]
lea rcx, [rbp+rcx]
adox rcx, [ rsp + 0x90 ]
movzx r12, r12b
lea rcx, [ r12 + rcx ]
mov r12, [ rsp + 0x88 ]
lea rcx, [r12+rcx]
movzx r8, r8b
lea rcx, [ r8 + rcx ]
mov r8, [ rsp + 0x80 ]
lea rcx, [r8+rcx]
adcx rcx, [ rsp + 0x78 ]
mov r13, r10; x225, copying x221 here, cause x221 is needed in a reg for other than x225, namely all: , x226, x225, size: 2
shrd r13, rcx, 56; x225 <- x223||x221 >> 56
mov rdx, [ rax + 0x20 ]; arg2[4] to rdx
mulx r15, rdi, [ rsi + 0x0 ]; x188, x187<- arg1[0] * arg2[4]
mov rdx, [ rax + 0x18 ]; arg2[3] to rdx
mulx r11, rbp, [ rsi + 0x8 ]; x174, x173<- arg1[1] * arg2[3]
mov rdx, [ rax + 0x10 ]; arg2[2] to rdx
mulx r14, r12, [ rsi + 0x10 ]; x162, x161<- arg1[2] * arg2[2]
mov rdx, [ rax + 0x8 ]; arg2[1] to rdx
mulx r8, rcx, [ rsi + 0x18 ]; x152, x151<- arg1[3] * arg2[1]
mov rdx, [ rsi + 0x20 ]; arg1[4] to rdx
mov [ rsp + 0xa0 ], r15; spilling x188 to mem
mulx r9, r15, [ rax + 0x0 ]; x144, x143<- arg1[4] * arg2[0]
mov rdx, [ rax + 0x30 ]; arg2[6] to rdx
mov [ rsp + 0xa8 ], r11; spilling x174 to mem
mov [ rsp + 0xb0 ], r14; spilling x162 to mem
mulx r11, r14, [ rsi + 0x10 ]; x122, x121<- arg1[2] * arg2[6]
mov rdx, [ rsi + 0x8 ]; arg1[1] to rdx
mov [ rsp + 0xb8 ], r8; spilling x152 to mem
mov [ rsp + 0xc0 ], r9; spilling x144 to mem
mulx r8, r9, [ rax + 0x38 ]; x124, x123<- arg1[1] * arg2[7]
mov rdx, [ rax + 0x28 ]; arg2[5] to rdx
mov [ rsp + 0xc8 ], r8; spilling x124 to mem
mov [ rsp + 0xd0 ], r11; spilling x122 to mem
mulx r8, r11, [ rsi + 0x18 ]; x118, x117<- arg1[3] * arg2[5]
mov rdx, [ rsi + 0x20 ]; arg1[4] to rdx
mov [ rsp + 0xd8 ], r8; spilling x118 to mem
mov [ rsp + 0xe0 ], r13; spilling x225 to mem
mulx r8, r13, [ rax + 0x20 ]; x112, x111<- arg1[4] * arg2[4]
mov rdx, [ rsi + 0x28 ]; arg1[5] to rdx
mov [ rsp + 0xe8 ], r8; spilling x112 to mem
mov [ rsp + 0xf0 ], rdi; spilling x187 to mem
mulx r8, rdi, [ rax + 0x18 ]; x104, x103<- arg1[5] * arg2[3]
mov rdx, [ rsi + 0x30 ]; arg1[6] to rdx
mov [ rsp + 0xf8 ], r8; spilling x104 to mem
mov [ rsp + 0x100 ], rbp; spilling x173 to mem
mulx r8, rbp, [ rax + 0x10 ]; x96, x95<- arg1[6] * arg2[2]
mov rdx, [ rsi + 0x38 ]; arg1[7] to rdx
mov [ rsp + 0x108 ], r8; spilling x96 to mem
mov [ rsp + 0x110 ], r12; spilling x161 to mem
mulx r8, r12, [ rax + 0x8 ]; x88, x87<- arg1[7] * arg2[1]
mov rdx, [ rax + 0x38 ]; arg2[7] to rdx
mov [ rsp + 0x118 ], r8; spilling x88 to mem
mov [ rsp + 0x120 ], rcx; spilling x151 to mem
mulx r8, rcx, [ rsi + 0x28 ]; x52, x51<- arg1[5] * arg2[7]
mov rdx, [ rsi + 0x38 ]; arg1[7] to rdx
mov [ rsp + 0x128 ], r8; spilling x52 to mem
mov [ rsp + 0x130 ], r15; spilling x143 to mem
mulx r8, r15, [ rax + 0x28 ]; x30, x29<- arg1[7] * arg2[5]
mov rdx, [ rsi + 0x30 ]; arg1[6] to rdx
mov [ rsp + 0x138 ], r8; spilling x30 to mem
mov [ rsp + 0x140 ], r9; spilling x123 to mem
mulx r8, r9, [ rax + 0x30 ]; x22, x21<- arg1[6] * arg2[6]
mov rdx, [ rsi + 0x30 ]; arg1[6] to rdx
mov [ rsp + 0x148 ], r8; spilling x22 to mem
mov [ rsp + 0x150 ], r14; spilling x121 to mem
mulx r8, r14, [ rax + 0x30 ]; x42, x41<- arg1[6] * arg2[6]
mov rdx, [ rax + 0x38 ]; arg2[7] to rdx
mov [ rsp + 0x158 ], r8; spilling x42 to mem
mov [ rsp + 0x160 ], r11; spilling x117 to mem
mulx r8, r11, [ rsi + 0x28 ]; x24, x23<- arg1[5] * arg2[7]
mov rdx, [ rsi + 0x38 ]; arg1[7] to rdx
mov [ rsp + 0x168 ], r8; spilling x24 to mem
mov [ rsp + 0x170 ], r13; spilling x111 to mem
mulx r8, r13, [ rax + 0x28 ]; x18, x17<- arg1[7] * arg2[5]
mov [ rsp + 0x178 ], r8; spilling x18 to mem
xor r8, r8
adox r13, r9
adcx r13, r11
setc r9b; spill CF x388 to reg (r9)
clc;
adcx r13, r15
seto r15b; spill OF x384 to reg (r15)
mov r11, -0x3 ; moving imm to reg
inc r11; OF<-0x0, preserve CF (debug 7; load -3, increase it, save it as -2). #last resort
adox r13, r14
seto r14b; spill OF x396 to reg (r14)
mov r11, -0x3 ; moving imm to reg
inc r11; OF<-0x0, preserve CF (debug 7; load -3, increase it, save it as -2). #last resort
adox r13, rcx
seto cl; spill OF x400 to reg (rcx)
mov r11, -0x3 ; moving imm to reg
inc r11; OF<-0x0, preserve CF (debug 7; load -3, increase it, save it as -2). #last resort
adox r13, r12
setc r12b; spill CF x392 to reg (r12)
clc;
adcx r13, rbp
setc bpl; spill CF x408 to reg (rbp)
clc;
adcx r13, rdi
setc dil; spill CF x412 to reg (rdi)
clc;
adcx r13, [ rsp + 0x170 ]
seto r11b; spill OF x404 to reg (r11)
mov byte [ rsp + 0x180 ], dil; spilling byte x412 to mem
mov rdi, -0x3 ; moving imm to reg
inc rdi; OF<-0x0, preserve CF (debug 7; load -3, increase it, save it as -2). #last resort
adox r13, [ rsp + 0x160 ]
seto dil; spill OF x420 to reg (rdi)
mov byte [ rsp + 0x188 ], bpl; spilling byte x408 to mem
mov rbp, -0x3 ; moving imm to reg
inc rbp; OF<-0x0, preserve CF (debug 7; load -3, increase it, save it as -2). #last resort
adox r13, [ rsp + 0x150 ]
setc bpl; spill CF x416 to reg (rbp)
clc;
adcx r13, [ rsp + 0x140 ]
mov byte [ rsp + 0x190 ], dil; spilling byte x420 to mem
setc dil; spill CF x428 to reg (rdi)
clc;
adcx r13, [ rsp + 0x130 ]
mov byte [ rsp + 0x198 ], dil; spilling byte x428 to mem
setc dil; spill CF x432 to reg (rdi)
clc;
adcx r13, [ rsp + 0x120 ]
mov byte [ rsp + 0x1a0 ], dil; spilling byte x432 to mem
setc dil; spill CF x436 to reg (rdi)
clc;
adcx r13, [ rsp + 0x110 ]
mov byte [ rsp + 0x1a8 ], dil; spilling byte x436 to mem
seto dil; spill OF x424 to reg (rdi)
mov byte [ rsp + 0x1b0 ], bpl; spilling byte x416 to mem
mov rbp, -0x3 ; moving imm to reg
inc rbp; OF<-0x0, preserve CF (debug 7; load -3, increase it, save it as -2). #last resort
adox r13, [ rsp + 0x100 ]
seto bpl; spill OF x444 to reg (rbp)
mov byte [ rsp + 0x1b8 ], dil; spilling byte x424 to mem
mov rdi, -0x3 ; moving imm to reg
inc rdi; OF<-0x0, preserve CF (debug 7; load -3, increase it, save it as -2). #last resort
adox r13, [ rsp + 0xf0 ]
seto dil; spill OF x448 to reg (rdi)
mov byte [ rsp + 0x1c0 ], bpl; spilling byte x444 to mem
mov rbp, -0x3 ; moving imm to reg
inc rbp; OF<-0x0, preserve CF (debug 7; load -3, increase it, save it as -2). #last resort
adox r13, [ rsp + 0xe0 ]
mov r8, [ rsp + 0x178 ]; load m64 x18 to register64
movzx r15, r15b
lea r8, [ r15 + r8 ]
mov r15, [ rsp + 0x148 ]
lea r8, [r15+r8]
movzx r9, r9b
lea r8, [ r9 + r8 ]
mov r9, [ rsp + 0x168 ]
lea r8, [r9+r8]
movzx r12, r12b
lea r8, [ r12 + r8 ]
mov r12, [ rsp + 0x138 ]
lea r8, [r12+r8]
movzx r14, r14b
lea r8, [ r14 + r8 ]
mov r14, [ rsp + 0x158 ]
lea r8, [r14+r8]
movzx rcx, cl
lea r8, [ rcx + r8 ]
mov rcx, [ rsp + 0x128 ]
lea r8, [rcx+r8]
movzx r11, r11b
lea r8, [ r11 + r8 ]
mov r11, [ rsp + 0x118 ]
lea r8, [r11+r8]
movzx r15, byte [ rsp + 0x188 ]; load byte memx408 to register64
lea r8, [ r15 + r8 ]
mov r15, [ rsp + 0x108 ]
lea r8, [r15+r8]
movzx r9, byte [ rsp + 0x180 ]; load byte memx412 to register64
lea r8, [ r9 + r8 ]
mov r9, [ rsp + 0xf8 ]
lea r8, [r9+r8]
movzx r12, byte [ rsp + 0x1b0 ]; load byte memx416 to register64
lea r8, [ r12 + r8 ]
mov r12, [ rsp + 0xe8 ]
lea r8, [r12+r8]
movzx r14, byte [ rsp + 0x190 ]; load byte memx420 to register64
lea r8, [ r14 + r8 ]
mov r14, [ rsp + 0xd8 ]
lea r8, [r14+r8]
movzx rcx, byte [ rsp + 0x1b8 ]; load byte memx424 to register64
lea r8, [ rcx + r8 ]
mov rcx, [ rsp + 0xd0 ]
lea r8, [rcx+r8]
movzx r11, byte [ rsp + 0x198 ]; load byte memx428 to register64
lea r8, [ r11 + r8 ]
mov r11, [ rsp + 0xc8 ]
lea r8, [r11+r8]
movzx r15, byte [ rsp + 0x1a0 ]; load byte memx432 to register64
lea r8, [ r15 + r8 ]
mov r15, [ rsp + 0xc0 ]
lea r8, [r15+r8]
movzx r9, byte [ rsp + 0x1a8 ]; load byte memx436 to register64
lea r8, [ r9 + r8 ]
mov r9, [ rsp + 0xb8 ]
lea r8, [r9+r8]
adcx r8, [ rsp + 0xb0 ]
movzx r12, byte [ rsp + 0x1c0 ]; load byte memx444 to register64
lea r8, [ r12 + r8 ]
mov r12, [ rsp + 0xa8 ]
lea r8, [r12+r8]
movzx rdi, dil
lea r8, [ rdi + r8 ]
mov rdi, [ rsp + 0xa0 ]
lea r8, [rdi+r8]
mov r14, 0x0 ; moving imm to reg
adox r8, r14
mov rdx, [ rax + 0x0 ]; arg2[0] to rdx
mulx rcx, r11, [ rsi + 0x0 ]; x196, x195<- arg1[0] * arg2[0]
mov rdx, [ rsi + 0x8 ]; arg1[1] to rdx
mulx r15, r9, [ rax + 0x38 ]; x80, x79<- arg1[1] * arg2[7]
mov rdx, [ rsi + 0x10 ]; arg1[2] to rdx
mulx r12, rdi, [ rax + 0x30 ]; x78, x77<- arg1[2] * arg2[6]
mov rdx, [ rsi + 0x18 ]; arg1[3] to rdx
mulx r14, rbp, [ rax + 0x28 ]; x74, x73<- arg1[3] * arg2[5]
mov rdx, [ rax + 0x20 ]; arg2[4] to rdx
mov [ rsp + 0x1c8 ], rbx; spilling x267 to mem
mov [ rsp + 0x1d0 ], r8; spilling x561 to mem
mulx rbx, r8, [ rsi + 0x20 ]; x68, x67<- arg1[4] * arg2[4]
mov rdx, [ rax + 0x18 ]; arg2[3] to rdx
mov [ rsp + 0x1d8 ], r13; spilling x559 to mem
mov [ rsp + 0x1e0 ], rcx; spilling x196 to mem
mulx r13, rcx, [ rsi + 0x28 ]; x60, x59<- arg1[5] * arg2[3]
mov rdx, [ rsi + 0x30 ]; arg1[6] to rdx
mov [ rsp + 0x1e8 ], r15; spilling x80 to mem
mov [ rsp + 0x1f0 ], r12; spilling x78 to mem
mulx r15, r12, [ rax + 0x10 ]; x50, x49<- arg1[6] * arg2[2]
mov rdx, [ rax + 0x38 ]; arg2[7] to rdx
mov [ rsp + 0x1f8 ], r14; spilling x74 to mem
mov [ rsp + 0x200 ], rbx; spilling x68 to mem
mulx r14, rbx, [ rsi + 0x28 ]; x12, x11<- arg1[5] * arg2[7]
mov rdx, [ rsi + 0x38 ]; arg1[7] to rdx
mov [ rsp + 0x208 ], r13; spilling x60 to mem
mov [ rsp + 0x210 ], r15; spilling x50 to mem
mulx r13, r15, [ rax + 0x8 ]; x38, x37<- arg1[7] * arg2[1]
mov rdx, [ rax + 0x30 ]; arg2[6] to rdx
mov [ rsp + 0x218 ], r13; spilling x38 to mem
mov [ rsp + 0x220 ], r14; spilling x12 to mem
mulx r13, r14, [ rsi + 0x30 ]; x10, x9<- arg1[6] * arg2[6]
mov rdx, [ rsi + 0x38 ]; arg1[7] to rdx
mov [ rsp + 0x228 ], r13; spilling x10 to mem
mov [ rsp + 0x230 ], r11; spilling x195 to mem
mulx r13, r11, [ rax + 0x28 ]; x6, x5<- arg1[7] * arg2[5]
add r11, r14; could be done better, if r0 has been u8 as well
mov r14, -0x2 ; moving imm to reg
inc r14; OF<-0x0, preserve CF (debug: 6; load -2, increase it, save as -1)
adox r11, rbx
setc bl; spill CF x520 to reg (rbx)
clc;
adcx r11, r15
seto r15b; spill OF x524 to reg (r15)
inc r14; OF<-0x0, preserve CF (debug: state 2 (y: -1, n: 0))
adox r11, r12
setc r12b; spill CF x528 to reg (r12)
clc;
adcx r11, rcx
seto cl; spill OF x532 to reg (rcx)
mov byte [ rsp + 0x238 ], r12b; spilling byte x528 to mem
mov r12, -0x3 ; moving imm to reg
inc r12; OF<-0x0, preserve CF (debug 7; load -3, increase it, save it as -2). #last resort
adox r11, r8
seto r8b; spill OF x540 to reg (r8)
mov r12, -0x3 ; moving imm to reg
inc r12; OF<-0x0, preserve CF (debug 7; load -3, increase it, save it as -2). #last resort
adox r11, rbp
setc bpl; spill CF x536 to reg (rbp)
clc;
adcx r11, rdi
seto dil; spill OF x544 to reg (rdi)
mov r12, -0x3 ; moving imm to reg
inc r12; OF<-0x0, preserve CF (debug 7; load -3, increase it, save it as -2). #last resort
adox r11, r9
setc r9b; spill CF x548 to reg (r9)
clc;
adcx r11, [ rsp + 0x230 ]
setc r12b; spill CF x556 to reg (r12)
clc;
adcx r11, [ rsp + 0x70 ]
movzx rbx, bl
lea r13, [ rbx + r13 ]
mov rbx, [ rsp + 0x228 ]
lea r13, [rbx+r13]
movzx r15, r15b
lea r13, [ r15 + r13 ]
mov r15, [ rsp + 0x220 ]
lea r13, [r15+r13]
movzx rbx, byte [ rsp + 0x238 ]; load byte memx528 to register64
lea r13, [ rbx + r13 ]
mov rbx, [ rsp + 0x218 ]
lea r13, [rbx+r13]
movzx rcx, cl
lea r13, [ rcx + r13 ]
mov rcx, [ rsp + 0x210 ]
lea r13, [rcx+r13]
movzx rbp, bpl
lea r13, [ rbp + r13 ]
mov rbp, [ rsp + 0x208 ]
lea r13, [rbp+r13]
movzx r8, r8b
lea r13, [ r8 + r13 ]
mov r8, [ rsp + 0x200 ]
lea r13, [r8+r13]
movzx rdi, dil
lea r13, [ rdi + r13 ]
mov rdi, [ rsp + 0x1f8 ]
lea r13, [rdi+r13]
movzx r9, r9b
lea r13, [ r9 + r13 ]
mov r9, [ rsp + 0x1f0 ]
lea r13, [r9+r13]
adox r13, [ rsp + 0x1e8 ]
movzx r12, r12b
lea r13, [ r12 + r13 ]
mov r12, [ rsp + 0x1e0 ]
lea r13, [r12+r13]
mov rdx, [ rax + 0x8 ]; arg2[1] to rdx
mulx r15, rbx, [ rsi + 0x0 ]; x194, x193<- arg1[0] * arg2[1]
adc r13, 0x0
mov rcx, r11; x575, copying x569 here, cause x569 is needed in a reg for other than x575, namely all: , x576, x575, size: 2
shrd rcx, r13, 56; x575 <- x571||x569 >> 56
mov rdx, [ rax + 0x0 ]; arg2[0] to rdx
mulx rbp, r8, [ rsi + 0x8 ]; x180, x179<- arg1[1] * arg2[0]
mov rdx, [ rax + 0x38 ]; arg2[7] to rdx
mulx rdi, r9, [ rsi + 0x10 ]; x76, x75<- arg1[2] * arg2[7]
mov rdx, [ rax + 0x28 ]; arg2[5] to rdx
mulx r12, r13, [ rsi + 0x20 ]; x66, x65<- arg1[4] * arg2[5]
mov rdx, [ rsi + 0x18 ]; arg1[3] to rdx
mov [ rsp + 0x240 ], r15; spilling x194 to mem
mulx r14, r15, [ rax + 0x30 ]; x72, x71<- arg1[3] * arg2[6]
mov rdx, [ rax + 0x10 ]; arg2[2] to rdx
mov [ rsp + 0x248 ], rbp; spilling x180 to mem
mov [ rsp + 0x250 ], rdi; spilling x76 to mem
mulx rbp, rdi, [ rsi + 0x38 ]; x36, x35<- arg1[7] * arg2[2]
mov rdx, [ rsi + 0x28 ]; arg1[5] to rdx
mov [ rsp + 0x258 ], r14; spilling x72 to mem
mov [ rsp + 0x260 ], r12; spilling x66 to mem
mulx r14, r12, [ rax + 0x20 ]; x58, x57<- arg1[5] * arg2[4]
mov rdx, [ rax + 0x38 ]; arg2[7] to rdx
mov [ rsp + 0x268 ], r14; spilling x58 to mem
mov [ rsp + 0x270 ], rbp; spilling x36 to mem
mulx r14, rbp, [ rsi + 0x30 ]; x8, x7<- arg1[6] * arg2[7]
mov rdx, [ rsi + 0x30 ]; arg1[6] to rdx
mov [ rsp + 0x278 ], r14; spilling x8 to mem
mov [ rsp + 0x280 ], rcx; spilling x575 to mem
mulx r14, rcx, [ rax + 0x18 ]; x48, x47<- arg1[6] * arg2[3]
mov rdx, [ rax + 0x30 ]; arg2[6] to rdx
mov [ rsp + 0x288 ], r14; spilling x48 to mem
mov [ rsp + 0x290 ], rbx; spilling x193 to mem
mulx r14, rbx, [ rsi + 0x38 ]; x4, x3<- arg1[7] * arg2[6]
add rbx, rbp; could be done better, if r0 has been u8 as well
mov rbp, -0x2 ; moving imm to reg
inc rbp; OF<-0x0, preserve CF (debug: 6; load -2, increase it, save as -1)
adox rbx, rdi
setc dil; spill CF x484 to reg (rdi)
clc;
adcx rbx, rcx
setc cl; spill CF x492 to reg (rcx)
clc;
adcx rbx, r12
seto r12b; spill OF x488 to reg (r12)
inc rbp; OF<-0x0, preserve CF (debug: state 2 (y: -1, n: 0))
adox rbx, r13
seto r13b; spill OF x500 to reg (r13)
mov byte [ rsp + 0x298 ], cl; spilling byte x492 to mem
mov rcx, -0x3 ; moving imm to reg
inc rcx; OF<-0x0, preserve CF (debug 7; load -3, increase it, save it as -2). #last resort
adox rbx, r15
seto r15b; spill OF x504 to reg (r15)
mov rcx, -0x3 ; moving imm to reg
inc rcx; OF<-0x0, preserve CF (debug 7; load -3, increase it, save it as -2). #last resort
adox rbx, r9
seto r9b; spill OF x508 to reg (r9)
mov rcx, -0x3 ; moving imm to reg
inc rcx; OF<-0x0, preserve CF (debug 7; load -3, increase it, save it as -2). #last resort
adox rbx, r8
setc r8b; spill CF x496 to reg (r8)
clc;
adcx rbx, [ rsp + 0x290 ]
setc cl; spill CF x516 to reg (rcx)
clc;
adcx rbx, [ rsp + 0x280 ]
movzx rdi, dil
lea r14, [ rdi + r14 ]
mov rdi, [ rsp + 0x278 ]
lea r14, [rdi+r14]
movzx r12, r12b
lea r14, [ r12 + r14 ]
mov r12, [ rsp + 0x270 ]
lea r14, [r12+r14]
movzx rdi, byte [ rsp + 0x298 ]; load byte memx492 to register64
lea r14, [ rdi + r14 ]
mov rdi, [ rsp + 0x288 ]
lea r14, [rdi+r14]
movzx r8, r8b
lea r14, [ r8 + r14 ]
mov r8, [ rsp + 0x268 ]
lea r14, [r8+r14]
movzx r13, r13b
lea r14, [ r13 + r14 ]
mov r13, [ rsp + 0x260 ]
lea r14, [r13+r14]
movzx r15, r15b
lea r14, [ r15 + r14 ]
mov r15, [ rsp + 0x258 ]
lea r14, [r15+r14]
movzx r9, r9b
lea r14, [ r9 + r14 ]
mov r9, [ rsp + 0x250 ]
lea r14, [r9+r14]
adox r14, [ rsp + 0x248 ]
movzx rcx, cl
lea r14, [ rcx + r14 ]
mov rcx, [ rsp + 0x240 ]
lea r14, [rcx+r14]
adc r14, 0x0
mov r12, [ rsp + 0x1d8 ]; load m64 x559 to register64
add r12, [ rsp + 0x70 ]; could be done better, if r0 has been u8 as well
mov rdi, 0xffffffffffffff ; moving imm to reg
setc r8b; spill CF x565 to reg (r8)
mov r13, r12; x568, copying x564 here, cause x564 is needed in a reg for other than x568, namely all: , x568, x567, size: 2
and r13, rdi; x568 <- x564&0xffffffffffffff
mov rdx, [ rsi + 0x0 ]; arg1[0] to rdx
mulx r15, r9, [ rax + 0x28 ]; x186, x185<- arg1[0] * arg2[5]
movzx rcx, r8b; x566, copying x565 here, cause x565 is needed in a reg for other than x566, namely all: , x566, size: 1
add rcx, [ rsp + 0x1d0 ]
shrd r12, rcx, 56; x567 <- x566||x564 >> 56
mov rdx, [ rax + 0x18 ]; arg2[3] to rdx
mulx r8, rcx, [ rsi + 0x10 ]; x160, x159<- arg1[2] * arg2[3]
mov rdx, [ rsi + 0x8 ]; arg1[1] to rdx
mulx rbp, rdi, [ rax + 0x20 ]; x172, x171<- arg1[1] * arg2[4]
mov rdx, [ rax + 0x10 ]; arg2[2] to rdx
mov [ rsp + 0x2a0 ], r13; spilling x568 to mem
mov [ rsp + 0x2a8 ], r14; spilling x579 to mem
mulx r13, r14, [ rsi + 0x18 ]; x150, x149<- arg1[3] * arg2[2]
mov rdx, [ rax + 0x8 ]; arg2[1] to rdx
mov [ rsp + 0x2b0 ], rbx; spilling x577 to mem
mov [ rsp + 0x2b8 ], r15; spilling x186 to mem
mulx rbx, r15, [ rsi + 0x20 ]; x142, x141<- arg1[4] * arg2[1]
mov rdx, [ rax + 0x0 ]; arg2[0] to rdx
mov [ rsp + 0x2c0 ], rbp; spilling x172 to mem
mov [ rsp + 0x2c8 ], r8; spilling x160 to mem
mulx rbp, r8, [ rsi + 0x28 ]; x136, x135<- arg1[5] * arg2[0]
mov rdx, [ rsi + 0x10 ]; arg1[2] to rdx
mov [ rsp + 0x2d0 ], r13; spilling x150 to mem
mov [ rsp + 0x2d8 ], rbx; spilling x142 to mem
mulx r13, rbx, [ rax + 0x38 ]; x120, x119<- arg1[2] * arg2[7]
mov rdx, [ rsi + 0x18 ]; arg1[3] to rdx
mov [ rsp + 0x2e0 ], rbp; spilling x136 to mem
mov [ rsp + 0x2e8 ], r13; spilling x120 to mem
mulx rbp, r13, [ rax + 0x30 ]; x116, x115<- arg1[3] * arg2[6]
mov rdx, [ rax + 0x18 ]; arg2[3] to rdx
mov [ rsp + 0x2f0 ], rbp; spilling x116 to mem
mov [ rsp + 0x2f8 ], r12; spilling x567 to mem
mulx rbp, r12, [ rsi + 0x30 ]; x94, x93<- arg1[6] * arg2[3]
mov rdx, [ rax + 0x28 ]; arg2[5] to rdx
mov [ rsp + 0x300 ], rbp; spilling x94 to mem
mov [ rsp + 0x308 ], r9; spilling x185 to mem
mulx rbp, r9, [ rsi + 0x20 ]; x110, x109<- arg1[4] * arg2[5]
mov rdx, [ rax + 0x20 ]; arg2[4] to rdx
mov [ rsp + 0x310 ], rbp; spilling x110 to mem
mov [ rsp + 0x318 ], rdi; spilling x171 to mem
mulx rbp, rdi, [ rsi + 0x28 ]; x102, x101<- arg1[5] * arg2[4]
mov rdx, [ rsi + 0x30 ]; arg1[6] to rdx
mov [ rsp + 0x320 ], rbp; spilling x102 to mem
mov [ rsp + 0x328 ], rcx; spilling x159 to mem
mulx rbp, rcx, [ rax + 0x38 ]; x40, x39<- arg1[6] * arg2[7]
mov rdx, [ rax + 0x10 ]; arg2[2] to rdx
mov [ rsp + 0x330 ], r10; spilling x221 to mem
mov [ rsp + 0x338 ], rbp; spilling x40 to mem
mulx r10, rbp, [ rsi + 0x38 ]; x86, x85<- arg1[7] * arg2[2]
mov rdx, [ rax + 0x30 ]; arg2[6] to rdx
mov [ rsp + 0x340 ], r10; spilling x86 to mem
mov [ rsp + 0x348 ], r14; spilling x149 to mem
mulx r10, r14, [ rsi + 0x38 ]; x28, x27<- arg1[7] * arg2[6]
mov rdx, [ rsi + 0x30 ]; arg1[6] to rdx
mov [ rsp + 0x350 ], r10; spilling x28 to mem
mov [ rsp + 0x358 ], r15; spilling x141 to mem
mulx r10, r15, [ rax + 0x38 ]; x20, x19<- arg1[6] * arg2[7]
mov rdx, [ rsi + 0x38 ]; arg1[7] to rdx
mov [ rsp + 0x360 ], r10; spilling x20 to mem
mov [ rsp + 0x368 ], r8; spilling x135 to mem
mulx r10, r8, [ rax + 0x30 ]; x16, x15<- arg1[7] * arg2[6]
test al, al
adox r8, r15
adcx r8, r14
seto r14b; spill OF x324 to reg (r14)
mov r15, -0x2 ; moving imm to reg
inc r15; OF<-0x0, preserve CF (debug: 6; load -2, increase it, save as -1)
adox r8, rcx
setc cl; spill CF x328 to reg (rcx)
clc;
adcx r8, rbp
setc bpl; spill CF x336 to reg (rbp)
clc;
adcx r8, r12
seto r12b; spill OF x332 to reg (r12)
inc r15; OF<-0x0, preserve CF (debug: state 2 (y: -1, n: 0))
adox r8, rdi
seto dil; spill OF x344 to reg (rdi)
mov byte [ rsp + 0x370 ], bpl; spilling byte x336 to mem
mov rbp, -0x3 ; moving imm to reg
inc rbp; OF<-0x0, preserve CF (debug 7; load -3, increase it, save it as -2). #last resort
adox r8, r9
setc r9b; spill CF x340 to reg (r9)
clc;
adcx r8, r13
setc r13b; spill CF x352 to reg (r13)
clc;
adcx r8, rbx
seto bl; spill OF x348 to reg (rbx)
mov rbp, -0x3 ; moving imm to reg
inc rbp; OF<-0x0, preserve CF (debug 7; load -3, increase it, save it as -2). #last resort
adox r8, [ rsp + 0x368 ]
setc bpl; spill CF x356 to reg (rbp)
clc;
adcx r8, [ rsp + 0x358 ]
mov byte [ rsp + 0x378 ], bpl; spilling byte x356 to mem
seto bpl; spill OF x360 to reg (rbp)
mov byte [ rsp + 0x380 ], r13b; spilling byte x352 to mem
mov r13, -0x3 ; moving imm to reg
inc r13; OF<-0x0, preserve CF (debug 7; load -3, increase it, save it as -2). #last resort
adox r8, [ rsp + 0x348 ]
setc r13b; spill CF x364 to reg (r13)
clc;
adcx r8, [ rsp + 0x328 ]
mov byte [ rsp + 0x388 ], r13b; spilling byte x364 to mem
seto r13b; spill OF x368 to reg (r13)
mov byte [ rsp + 0x390 ], bpl; spilling byte x360 to mem
mov rbp, -0x3 ; moving imm to reg
inc rbp; OF<-0x0, preserve CF (debug 7; load -3, increase it, save it as -2). #last resort
adox r8, [ rsp + 0x318 ]
movzx r14, r14b
lea r10, [ r14 + r10 ]
mov r14, [ rsp + 0x360 ]
lea r10, [r14+r10]
seto r14b; spill OF x376 to reg (r14)
mov rbp, -0x3 ; moving imm to reg
inc rbp; OF<-0x0, preserve CF (debug 7; load -3, increase it, save it as -2). #last resort
adox r8, [ rsp + 0x308 ]
seto bpl; spill OF x380 to reg (rbp)
mov byte [ rsp + 0x398 ], r14b; spilling byte x376 to mem
mov r14, -0x3 ; moving imm to reg
inc r14; OF<-0x0, preserve CF (debug 7; load -3, increase it, save it as -2). #last resort
adox r8, [ rsp + 0x2f8 ]
movzx rcx, cl
lea r10, [ rcx + r10 ]
mov rcx, [ rsp + 0x350 ]
lea r10, [rcx+r10]
movzx r12, r12b
lea r10, [ r12 + r10 ]
mov r12, [ rsp + 0x338 ]
lea r10, [r12+r10]
movzx rcx, byte [ rsp + 0x370 ]; load byte memx336 to register64
lea r10, [ rcx + r10 ]
mov rcx, [ rsp + 0x340 ]
lea r10, [rcx+r10]
movzx r9, r9b
lea r10, [ r9 + r10 ]
mov r9, [ rsp + 0x300 ]
lea r10, [r9+r10]
movzx rdi, dil
lea r10, [ rdi + r10 ]
mov rdi, [ rsp + 0x320 ]
lea r10, [rdi+r10]
movzx rbx, bl
lea r10, [ rbx + r10 ]
mov rbx, [ rsp + 0x310 ]
lea r10, [rbx+r10]
movzx r12, byte [ rsp + 0x380 ]; load byte memx352 to register64
lea r10, [ r12 + r10 ]
mov r12, [ rsp + 0x2f0 ]
lea r10, [r12+r10]
movzx rcx, byte [ rsp + 0x378 ]; load byte memx356 to register64
lea r10, [ rcx + r10 ]
mov rcx, [ rsp + 0x2e8 ]
lea r10, [rcx+r10]
movzx r9, byte [ rsp + 0x390 ]; load byte memx360 to register64
lea r10, [ r9 + r10 ]
mov r9, [ rsp + 0x2e0 ]
lea r10, [r9+r10]
movzx rdi, byte [ rsp + 0x388 ]; load byte memx364 to register64
lea r10, [ rdi + r10 ]
mov rdi, [ rsp + 0x2d8 ]
lea r10, [rdi+r10]
movzx r13, r13b
lea r10, [ r13 + r10 ]
mov r13, [ rsp + 0x2d0 ]
lea r10, [r13+r10]
adcx r10, [ rsp + 0x2c8 ]
movzx rbx, byte [ rsp + 0x398 ]; load byte memx376 to register64
lea r10, [ rbx + r10 ]
mov rbx, [ rsp + 0x2c0 ]
lea r10, [rbx+r10]
movzx rbp, bpl
lea r10, [ rbp + r10 ]
mov rbp, [ rsp + 0x2b8 ]
lea r10, [rbp+r10]
adox r10, r15
mov r12, r8; x580, copying x572 here, cause x572 is needed in a reg for other than x580, namely all: , x580, x581, size: 2
shrd r12, r10, 56; x580 <- x574||x572 >> 56
mov rdx, [ rsi + 0x0 ]; arg1[0] to rdx
mulx rcx, r9, [ rax + 0x30 ]; x184, x183<- arg1[0] * arg2[6]
mov rdx, [ rsi + 0x8 ]; arg1[1] to rdx
mulx rdi, r13, [ rax + 0x28 ]; x170, x169<- arg1[1] * arg2[5]
mov rdx, [ rsi + 0x18 ]; arg1[3] to rdx
mulx rbx, rbp, [ rax + 0x18 ]; x148, x147<- arg1[3] * arg2[3]
mov rdx, [ rax + 0x20 ]; arg2[4] to rdx
mulx r10, r15, [ rsi + 0x10 ]; x158, x157<- arg1[2] * arg2[4]
mov rdx, [ rsi + 0x28 ]; arg1[5] to rdx
mov [ rsp + 0x3a0 ], rcx; spilling x184 to mem
mulx r14, rcx, [ rax + 0x8 ]; x134, x133<- arg1[5] * arg2[1]
mov rdx, [ rsi + 0x20 ]; arg1[4] to rdx
mov [ rsp + 0x3a8 ], rdi; spilling x170 to mem
mov [ rsp + 0x3b0 ], r10; spilling x158 to mem
mulx rdi, r10, [ rax + 0x10 ]; x140, x139<- arg1[4] * arg2[2]
mov rdx, [ rax + 0x0 ]; arg2[0] to rdx
mov [ rsp + 0x3b8 ], rbx; spilling x148 to mem
mov [ rsp + 0x3c0 ], rdi; spilling x140 to mem
mulx rbx, rdi, [ rsi + 0x30 ]; x130, x129<- arg1[6] * arg2[0]
mov rdx, [ rsi + 0x20 ]; arg1[4] to rdx
mov [ rsp + 0x3c8 ], r14; spilling x134 to mem
mov [ rsp + 0x3d0 ], rbx; spilling x130 to mem
mulx r14, rbx, [ rax + 0x30 ]; x108, x107<- arg1[4] * arg2[6]
mov rdx, [ rax + 0x38 ]; arg2[7] to rdx
mov [ rsp + 0x3d8 ], r14; spilling x108 to mem
mov [ rsp + 0x3e0 ], r12; spilling x580 to mem
mulx r14, r12, [ rsi + 0x18 ]; x114, x113<- arg1[3] * arg2[7]
mov rdx, [ rsi + 0x30 ]; arg1[6] to rdx
mov [ rsp + 0x3e8 ], r14; spilling x114 to mem
mov [ rsp + 0x3f0 ], r9; spilling x183 to mem
mulx r14, r9, [ rax + 0x20 ]; x92, x91<- arg1[6] * arg2[4]
mov rdx, [ rsi + 0x28 ]; arg1[5] to rdx
mov [ rsp + 0x3f8 ], r14; spilling x92 to mem
mov [ rsp + 0x400 ], r13; spilling x169 to mem
mulx r14, r13, [ rax + 0x28 ]; x100, x99<- arg1[5] * arg2[5]
mov rdx, [ rsi + 0x38 ]; arg1[7] to rdx
mov [ rsp + 0x408 ], r14; spilling x100 to mem
mov [ rsp + 0x410 ], r15; spilling x157 to mem
mulx r14, r15, [ rax + 0x18 ]; x84, x83<- arg1[7] * arg2[3]
mov rdx, [ rsi + 0x38 ]; arg1[7] to rdx
mov [ rsp + 0x418 ], r14; spilling x84 to mem
mov [ rsp + 0x420 ], rbp; spilling x147 to mem
mulx r14, rbp, [ rax + 0x38 ]; x14, x13<- arg1[7] * arg2[7]
mov rdx, [ rax + 0x38 ]; arg2[7] to rdx
mov [ rsp + 0x428 ], r14; spilling x14 to mem
mov [ rsp + 0x430 ], r10; spilling x139 to mem
mulx r14, r10, [ rsi + 0x38 ]; x26, x25<- arg1[7] * arg2[7]
add rbp, r10; could be done better, if r0 has been u8 as well
mov r10, -0x2 ; moving imm to reg
inc r10; OF<-0x0, preserve CF (debug: 6; load -2, increase it, save as -1)
adox rbp, r15
setc r15b; spill CF x272 to reg (r15)
clc;
adcx rbp, r9
seto r9b; spill OF x276 to reg (r9)
inc r10; OF<-0x0, preserve CF (debug: state 2 (y: -1, n: 0))
adox rbp, r13
seto r13b; spill OF x284 to reg (r13)
mov byte [ rsp + 0x438 ], r9b; spilling byte x276 to mem
mov r9, -0x3 ; moving imm to reg
inc r9; OF<-0x0, preserve CF (debug 7; load -3, increase it, save it as -2). #last resort
adox rbp, rbx
seto bl; spill OF x288 to reg (rbx)
mov r9, -0x3 ; moving imm to reg
inc r9; OF<-0x0, preserve CF (debug 7; load -3, increase it, save it as -2). #last resort
adox rbp, r12
setc r12b; spill CF x280 to reg (r12)
clc;
adcx rbp, rdi
setc dil; spill CF x296 to reg (rdi)
clc;
adcx rbp, rcx
setc cl; spill CF x300 to reg (rcx)
clc;
adcx rbp, [ rsp + 0x430 ]
setc r9b; spill CF x304 to reg (r9)
clc;
adcx rbp, [ rsp + 0x420 ]
mov byte [ rsp + 0x440 ], r9b; spilling byte x304 to mem
seto r9b; spill OF x292 to reg (r9)
mov byte [ rsp + 0x448 ], cl; spilling byte x300 to mem
mov rcx, -0x3 ; moving imm to reg
inc rcx; OF<-0x0, preserve CF (debug 7; load -3, increase it, save it as -2). #last resort
adox rbp, [ rsp + 0x410 ]
seto cl; spill OF x312 to reg (rcx)
mov byte [ rsp + 0x450 ], dil; spilling byte x296 to mem
mov rdi, -0x3 ; moving imm to reg
inc rdi; OF<-0x0, preserve CF (debug 7; load -3, increase it, save it as -2). #last resort
adox rbp, [ rsp + 0x400 ]
setc dil; spill CF x308 to reg (rdi)
clc;
adcx rbp, [ rsp + 0x3f0 ]
mov byte [ rsp + 0x458 ], cl; spilling byte x312 to mem
setc cl; spill CF x320 to reg (rcx)
clc;
adcx rbp, [ rsp + 0x3e0 ]
movzx r15, r15b
lea r14, [ r15 + r14 ]
mov r15, [ rsp + 0x428 ]
lea r14, [r15+r14]
movzx r15, byte [ rsp + 0x438 ]; load byte memx276 to register64
lea r14, [ r15 + r14 ]
mov r15, [ rsp + 0x418 ]
lea r14, [r15+r14]
movzx r12, r12b
lea r14, [ r12 + r14 ]
mov r12, [ rsp + 0x3f8 ]
lea r14, [r12+r14]
movzx r13, r13b
lea r14, [ r13 + r14 ]
mov r13, [ rsp + 0x408 ]
lea r14, [r13+r14]
movzx rbx, bl
lea r14, [ rbx + r14 ]
mov rbx, [ rsp + 0x3d8 ]
lea r14, [rbx+r14]
movzx r9, r9b
lea r14, [ r9 + r14 ]
mov r9, [ rsp + 0x3e8 ]
lea r14, [r9+r14]
movzx r15, byte [ rsp + 0x450 ]; load byte memx296 to register64
lea r14, [ r15 + r14 ]
mov r15, [ rsp + 0x3d0 ]
lea r14, [r15+r14]
movzx r12, byte [ rsp + 0x448 ]; load byte memx300 to register64
lea r14, [ r12 + r14 ]
mov r12, [ rsp + 0x3c8 ]
lea r14, [r12+r14]
movzx r13, byte [ rsp + 0x440 ]; load byte memx304 to register64
lea r14, [ r13 + r14 ]
mov r13, [ rsp + 0x3c0 ]
lea r14, [r13+r14]
movzx rdi, dil
lea r14, [ rdi + r14 ]
mov rdi, [ rsp + 0x3b8 ]
lea r14, [rdi+r14]
movzx rbx, byte [ rsp + 0x458 ]; load byte memx312 to register64
lea r14, [ rbx + r14 ]
mov rbx, [ rsp + 0x3b0 ]
lea r14, [rbx+r14]
adox r14, [ rsp + 0x3a8 ]
movzx rcx, cl
lea r14, [ rcx + r14 ]
mov rcx, [ rsp + 0x3a0 ]
lea r14, [rcx+r14]
adc r14, 0x0
mov r9, [ rsp + 0x2b0 ]; load m64 x577 to register64
mov r15, [ rsp + 0x2a8 ]; load m64 x579 to register64
mov r12, r9; x585, copying x577 here, cause x577 is needed in a reg for other than x585, namely all: , x585, x586, size: 2
shrd r12, r15, 56; x585 <- x579||x577 >> 56
mov rdx, [ rax + 0x10 ]; arg2[2] to rdx
mulx r15, r13, [ rsi + 0x0 ]; x192, x191<- arg1[0] * arg2[2]
mov rdx, [ rax + 0x8 ]; arg2[1] to rdx
mulx rdi, rbx, [ rsi + 0x8 ]; x178, x177<- arg1[1] * arg2[1]
mov rdx, [ rax + 0x0 ]; arg2[0] to rdx
mulx rcx, r10, [ rsi + 0x10 ]; x166, x165<- arg1[2] * arg2[0]
mov [ rsp + 0x460 ], r15; spilling x192 to mem
mov r15, rbp; x590, copying x582 here, cause x582 is needed in a reg for other than x590, namely all: , x590, x591, size: 2
shrd r15, r14, 56; x590 <- x584||x582 >> 56
mov rdx, [ rsi + 0x20 ]; arg1[4] to rdx
mov [ rsp + 0x468 ], r15; spilling x590 to mem
mulx r14, r15, [ rax + 0x30 ]; x64, x63<- arg1[4] * arg2[6]
mov rdx, [ rsi + 0x18 ]; arg1[3] to rdx
mov [ rsp + 0x470 ], rdi; spilling x178 to mem
mov [ rsp + 0x478 ], rcx; spilling x166 to mem
mulx rdi, rcx, [ rax + 0x38 ]; x70, x69<- arg1[3] * arg2[7]
mov rdx, [ rax + 0x18 ]; arg2[3] to rdx
mov [ rsp + 0x480 ], rdi; spilling x70 to mem
mov [ rsp + 0x488 ], r14; spilling x64 to mem
mulx rdi, r14, [ rsi + 0x38 ]; x34, x33<- arg1[7] * arg2[3]
mov rdx, [ rax + 0x28 ]; arg2[5] to rdx
mov [ rsp + 0x490 ], rdi; spilling x34 to mem
mov [ rsp + 0x498 ], r12; spilling x585 to mem
mulx rdi, r12, [ rsi + 0x28 ]; x56, x55<- arg1[5] * arg2[5]
mov rdx, [ rsi + 0x30 ]; arg1[6] to rdx
mov [ rsp + 0x4a0 ], rdi; spilling x56 to mem
mov [ rsp + 0x4a8 ], r13; spilling x191 to mem
mulx rdi, r13, [ rax + 0x20 ]; x46, x45<- arg1[6] * arg2[4]
mov rdx, [ rax + 0x38 ]; arg2[7] to rdx
mov [ rsp + 0x4b0 ], rdi; spilling x46 to mem
mov [ rsp + 0x4b8 ], rbx; spilling x177 to mem
mulx rdi, rbx, [ rsi + 0x38 ]; x2, x1<- arg1[7] * arg2[7]
test al, al
adox rbx, r14
adcx rbx, r13
setc r14b; spill CF x456 to reg (r14)
clc;
adcx rbx, r12
seto r12b; spill OF x452 to reg (r12)
mov r13, -0x2 ; moving imm to reg
inc r13; OF<-0x0, preserve CF (debug: 6; load -2, increase it, save as -1)
adox rbx, r15
seto r15b; spill OF x464 to reg (r15)
inc r13; OF<-0x0, preserve CF (debug: state 2 (y: -1, n: 0))
adox rbx, rcx
setc cl; spill CF x460 to reg (rcx)
clc;
adcx rbx, r10
setc r10b; spill CF x472 to reg (r10)
clc;
adcx rbx, [ rsp + 0x4b8 ]
mov byte [ rsp + 0x4c0 ], r10b; spilling byte x472 to mem
seto r10b; spill OF x468 to reg (r10)
mov byte [ rsp + 0x4c8 ], r15b; spilling byte x464 to mem
mov r15, -0x3 ; moving imm to reg
inc r15; OF<-0x0, preserve CF (debug 7; load -3, increase it, save it as -2). #last resort
adox rbx, [ rsp + 0x4a8 ]
seto r15b; spill OF x480 to reg (r15)
mov byte [ rsp + 0x4d0 ], r10b; spilling byte x468 to mem
mov r10, -0x3 ; moving imm to reg
inc r10; OF<-0x0, preserve CF (debug 7; load -3, increase it, save it as -2). #last resort
adox rbx, [ rsp + 0x498 ]
movzx r12, r12b
lea rdi, [ r12 + rdi ]
mov r12, [ rsp + 0x490 ]
lea rdi, [r12+rdi]
movzx r14, r14b
lea rdi, [ r14 + rdi ]
mov r14, [ rsp + 0x4b0 ]
lea rdi, [r14+rdi]
movzx rcx, cl
lea rdi, [ rcx + rdi ]
mov rcx, [ rsp + 0x4a0 ]
lea rdi, [rcx+rdi]
movzx r12, byte [ rsp + 0x4c8 ]; load byte memx464 to register64
lea rdi, [ r12 + rdi ]
mov r12, [ rsp + 0x488 ]
lea rdi, [r12+rdi]
movzx r14, byte [ rsp + 0x4d0 ]; load byte memx468 to register64
lea rdi, [ r14 + rdi ]
mov r14, [ rsp + 0x480 ]
lea rdi, [r14+rdi]
movzx rcx, byte [ rsp + 0x4c0 ]; load byte memx472 to register64
lea rdi, [ rcx + rdi ]
mov rcx, [ rsp + 0x478 ]
lea rdi, [rcx+rdi]
adcx rdi, [ rsp + 0x470 ]
movzx r15, r15b
lea rdi, [ r15 + rdi ]
mov r15, [ rsp + 0x460 ]
lea rdi, [r15+rdi]
adox rdi, r13
mov r12, 0xffffffffffffff ; moving imm to reg
mov r14, [ rsp + 0x330 ]; x226, copying x221 here, cause x221 is needed in a reg for other than x226, namely all: , x226, size: 1
and r14, r12; x226 <- x221&0xffffffffffffff
mov rcx, rbx; x593, copying x587 here, cause x587 is needed in a reg for other than x593, namely all: , x593, x594, size: 2
shrd rcx, rdi, 56; x593 <- x589||x587 >> 56
and r11, r12; x576 <- x569&0xffffffffffffff
lea rcx, [ rcx + r14 ]
mov r15, rcx; x599, copying x595 here, cause x595 is needed in a reg for other than x599, namely all: , x598, x599, size: 2
and r15, r12; x599 <- x595&0xffffffffffffff
mov rdi, [ rsp + 0x1c8 ]; x563, copying x267 here, cause x267 is needed in a reg for other than x563, namely all: , x563, size: 1
and rdi, r12; x563 <- x267&0xffffffffffffff
shr rcx, 56; x598 <- x595>> 56
mov r14, [ rsp + 0x0 ]; load m64 out1 to register64
mov [ r14 + 0x18 ], r15; out1[3] = x599
add rdi, [ rsp + 0x468 ]
mov r15, rdi; x596, copying x592 here, cause x592 is needed in a reg for other than x596, namely all: , x596, x597, size: 2
shr r15, 56; x596 <- x592>> 56
mov r13, r15; x600, copying x596 here, cause x596 is needed in a reg for other than x600, namely all: , x600, x601, size: 2
add r13, [ rsp + 0x2a0 ]
lea rcx, [ rcx + r13 ]
mov r13, rcx; x603, copying x602 here, cause x602 is needed in a reg for other than x603, namely all: , x603, x604, size: 2
shr r13, 56; x603 <- x602>> 56
and rbp, r12; x591 <- x582&0xffffffffffffff
lea r11, [ r11 + r15 ]
mov [ r14 + 0x30 ], rbp; out1[6] = x591
mov r15, r11; x607, copying x601 here, cause x601 is needed in a reg for other than x607, namely all: , x606, x607, size: 2
and r15, r12; x607 <- x601&0xffffffffffffff
mov [ r14 + 0x0 ], r15; out1[0] = x607
shr r11, 56; x606 <- x601>> 56
and r8, r12; x581 <- x572&0xffffffffffffff
lea r13, [ r13 + r8 ]
and r9, r12; x586 <- x577&0xffffffffffffff
mov [ r14 + 0x28 ], r13; out1[5] = x605
lea r11, [ r11 + r9 ]
and rcx, r12; x604 <- x602&0xffffffffffffff
mov [ r14 + 0x20 ], rcx; out1[4] = x604
mov [ r14 + 0x8 ], r11; out1[1] = x608
and rdi, r12; x597 <- x592&0xffffffffffffff
and rbx, r12; x594 <- x587&0xffffffffffffff
mov [ r14 + 0x38 ], rdi; out1[7] = x597
mov [ r14 + 0x10 ], rbx; out1[2] = x594
mov rbx, [ rsp + 0x4d8 ]; restoring from stack
mov rbp, [ rsp + 0x4e0 ]; restoring from stack
mov r12, [ rsp + 0x4e8 ]; restoring from stack
mov r13, [ rsp + 0x4f0 ]; restoring from stack
mov r14, [ rsp + 0x4f8 ]; restoring from stack
mov r15, [ rsp + 0x500 ]; restoring from stack
add rsp, 0x508
ret
; cpu Intel(R) Core(TM) i7-10710U CPU @ 1.10GHz
; clocked at 1600 MHz
; first cyclecount 183.31, best 177.85955056179776, lastGood 178.6627906976744
; seed 42736280487937
; CC / CFLAGS clang / -march=native -mtune=native -O3
; time needed: 60669 ms / 500 runs=> 121.338ms/run
; Time spent for assembling and measureing (initial batch_size=89, initial num_batches=101): 3490 ms
; Ratio (time for assembling + measure)/(total runtime for 500runs): 0.05752526001747185
; number reverted permutation/ tried permutation: 173 / 244 =70.902%
; number reverted decision/ tried decision: 150 / 257 =58.366% | 37.534196 | 129 | 0.632916 |
2ce4543e01fe76e0fe2871d964ddc99027e1d38d | 965 | asm | Assembly | dv3/dv3/version.asm | olifink/smsqe | c546d882b26566a46d71820d1539bed9ea8af108 | [
"BSD-2-Clause"
] | null | null | null | dv3/dv3/version.asm | olifink/smsqe | c546d882b26566a46d71820d1539bed9ea8af108 | [
"BSD-2-Clause"
] | null | null | null | dv3/dv3/version.asm | olifink/smsqe | c546d882b26566a46d71820d1539bed9ea8af108 | [
"BSD-2-Clause"
] | null | null | null | ; DV3 Version V3.00 1992 Tony Tebby
section version
xdef dv3_vers
; V3.01 Fetch line initial conditions corrected.
;
; V3.02 Delete file does not leave old channel block lying around.
; QLF delete directory check corrected.
;
; V3.03 Compatibility with old QDOS drivers improved
;
; V3.04 Compatibility with C68 improved (length of channel block etc.)
; Errors in read header of directory corrected/
;
; V3.05 Truncate sector list (QLWA) sets correct sectors of map to update.
;
; V3.06 MSDOS format problems (make_dir, delete) fixed
; FORMAT waits for flush at end.
;
; V3.07 QWA format truncate error return fixed.
; QWA disk change checks first 32 bytes (including update count).
;
; V3.08 EXn extension on MSDOS file treated as exec with 512.2^n data space.
; MSDOS file overwrite and close problem (zero length file) fixed.
;
dv3_vers equ '3.08'
dv3_vmess
dc.w 'Directory Device Driver V'
dc.l dv3_vers
dc.b ' ',$a
dv3_vmend
ds.w 0
end
| 26.081081 | 76 | 0.737824 |
9575d055b849ec77744accac5390f7847efa1b4d | 1,247 | asm | Assembly | libsrc/stdio/pc6001/printc_MODE1.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | null | null | null | libsrc/stdio/pc6001/printc_MODE1.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | null | null | null | libsrc/stdio/pc6001/printc_MODE1.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 1 | 2019-12-03T23:28:20.000Z | 2019-12-03T23:28:20.000Z |
SECTION code_clib
PUBLIC printc_MODE1
EXTERN generic_console_udg32
EXTERN generic_console_font32
EXTERN generic_console_flags
EXTERN __pc6001_attr
INCLUDE "target/pc6001/def/pc6001.def"
; c = x
; b = y
; a' = d = character to print
; e = raw
printc_MODE1:
ld l,d
ld h,0
ld de,(generic_console_font32)
bit 7,l
jr z,not_udg
res 7,l
ld de,(generic_console_udg32)
inc d
not_udg:
add hl,hl
add hl,hl
add hl,hl
add hl,de
dec h
ex de,hl ;de = font
ld h,b ;32 * 8
ld l,c
ld bc,(SYSVAR_screen - 1)
ld c,0
add hl,bc
inc h
inc h ;hl = screen address
ld a,(__pc6001_attr)
rrca
sbc a,a
ld c,a ;x = 0 / 255
ld b,8
hires_printc_1:
ld a,(de)
xor c
ld (hl),a
inc de
ld a,l
add 32
ld l,a
jr nc,no_overflow
inc h
no_overflow:
djnz hires_printc_1
ret
| 21.5 | 52 | 0.429832 |
026b5726863759c8e0891a86dd0302c43a804537 | 1,181 | asm | Assembly | _build/dispatcher/jmp_ippsAES_GCMProcessAAD_8822b0f1.asm | zyktrcn/ippcp | b0bbe9bbb750a7cf4af5914dd8e6776a8d544466 | [
"Apache-2.0"
] | 1 | 2021-10-04T10:21:54.000Z | 2021-10-04T10:21:54.000Z | _build/dispatcher/jmp_ippsAES_GCMProcessAAD_8822b0f1.asm | zyktrcn/ippcp | b0bbe9bbb750a7cf4af5914dd8e6776a8d544466 | [
"Apache-2.0"
] | null | null | null | _build/dispatcher/jmp_ippsAES_GCMProcessAAD_8822b0f1.asm | zyktrcn/ippcp | b0bbe9bbb750a7cf4af5914dd8e6776a8d544466 | [
"Apache-2.0"
] | null | null | null | extern m7_ippsAES_GCMProcessAAD:function
extern n8_ippsAES_GCMProcessAAD:function
extern y8_ippsAES_GCMProcessAAD:function
extern e9_ippsAES_GCMProcessAAD:function
extern l9_ippsAES_GCMProcessAAD:function
extern n0_ippsAES_GCMProcessAAD:function
extern k0_ippsAES_GCMProcessAAD:function
extern ippcpJumpIndexForMergedLibs
extern ippcpSafeInit:function
segment .data
align 8
dq .Lin_ippsAES_GCMProcessAAD
.Larraddr_ippsAES_GCMProcessAAD:
dq m7_ippsAES_GCMProcessAAD
dq n8_ippsAES_GCMProcessAAD
dq y8_ippsAES_GCMProcessAAD
dq e9_ippsAES_GCMProcessAAD
dq l9_ippsAES_GCMProcessAAD
dq n0_ippsAES_GCMProcessAAD
dq k0_ippsAES_GCMProcessAAD
segment .text
global ippsAES_GCMProcessAAD:function (ippsAES_GCMProcessAAD.LEndippsAES_GCMProcessAAD - ippsAES_GCMProcessAAD)
.Lin_ippsAES_GCMProcessAAD:
db 0xf3, 0x0f, 0x1e, 0xfa
call ippcpSafeInit wrt ..plt
align 16
ippsAES_GCMProcessAAD:
db 0xf3, 0x0f, 0x1e, 0xfa
mov rax, qword [rel ippcpJumpIndexForMergedLibs wrt ..gotpc]
movsxd rax, dword [rax]
lea r11, [rel .Larraddr_ippsAES_GCMProcessAAD]
mov r11, qword [r11+rax*8]
jmp r11
.LEndippsAES_GCMProcessAAD:
| 30.282051 | 111 | 0.813717 |
992a5d79bccd8f3573d0903162d99ecc1b10d882 | 218 | asm | Assembly | solutions/15 - Shred Lines/size-9_speed-23.asm | michaelgundlach/7billionhumans | 02c6f3963364362c95cb516cbc6ef1efc073bb2e | [
"MIT"
] | 45 | 2018-09-05T04:56:59.000Z | 2021-11-22T08:57:26.000Z | solutions/15 - Shred Lines/size-9_speed-23.asm | michaelgundlach/7billionhumans | 02c6f3963364362c95cb516cbc6ef1efc073bb2e | [
"MIT"
] | 36 | 2018-09-01T11:34:26.000Z | 2021-05-19T23:20:49.000Z | solutions/15 - Shred Lines/size-9_speed-23.asm | michaelgundlach/7billionhumans | 02c6f3963364362c95cb516cbc6ef1efc073bb2e | [
"MIT"
] | 36 | 2018-09-01T07:44:19.000Z | 2021-09-10T19:07:35.000Z | -- 7 Billion Humans (2053) --
-- 15: Shred Lines --
-- Author: soerface
-- Size: 9
-- Speed: 23
a:
b:
step n
if n == datacube:
pickup n
c:
step s
if s == shredder:
giveto s
jump a
endif
jump c
endif
jump b
| 9.909091 | 29 | 0.59633 |
a53ce7490ce0d32c84005316e42d8da65dbc0b9e | 640 | asm | Assembly | oeis/099/A099754.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/099/A099754.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/099/A099754.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A099754: a(n) = (3^n +1)/2 + 2^n.
; Submitted by Jamie Morken(s2)
; 2,4,9,22,57,154,429,1222,3537,10354,30549,90622,269817,805354,2407869,7207222,21588897,64701154,193972389,581655022,1744440777,5232273754,15694724109,47079978022,141231545457,423677859154,1271000023029,3812932960222,11438664662937,34315725553354,102946639789149,308838845625622,926514389393217,2779538873212354,8338608029702469,25015806909238222,75047386367976297,225142090384452154,675426133714402989,2026278126265302022,6078833829040092177,18236500387608648754,54709498963802690709
mov $1,3
pow $1,$0
mov $2,2
pow $2,$0
mul $2,2
add $1,$2
mov $0,$1
div $0,2
add $0,1
| 45.714286 | 485 | 0.820313 |
89e6df77456634416ac0e3a362d4873c2d3d9e20 | 536 | asm | Assembly | Miei-sorgenti/new/Bonus/Maxmin e minmax/main.asm | DigiOhhh/LabArchitettura2-2017-2018 | da34b9a75ab2945ac70d5cbf69395d0db5172f6f | [
"MIT"
] | 1 | 2019-03-06T13:26:10.000Z | 2019-03-06T13:26:10.000Z | Miei-sorgenti/old/Bonus/Maxmin e minmax/main.asm | DigiOhhh/LabArchitettura2-2017-2018 | da34b9a75ab2945ac70d5cbf69395d0db5172f6f | [
"MIT"
] | null | null | null | Miei-sorgenti/old/Bonus/Maxmin e minmax/main.asm | DigiOhhh/LabArchitettura2-2017-2018 | da34b9a75ab2945ac70d5cbf69395d0db5172f6f | [
"MIT"
] | 1 | 2019-03-06T13:25:28.000Z | 2019-03-06T13:25:28.000Z | # Si implementi infine il main che acquisisca i dati, chiami maxmin e minmax e stampi i risultati.
.data
arr_max: .space 400
.align 2
arr_min: .space 400
M: .byte 21 0 0 0, 1 0 0 0, 2 0 0 0, 3 0 0 0, 20 0 0 0, 2 0 0 0, 3 0 0 0, 4 0 0 0, 19 0 0 0, 3 0 0 0, 4 0 0 0, 5 0 0 0, 18 0 0 0, 20 0 0 0, 5 0 0 0, 6 0 0 0
output: .asciiz "Il minimo dei massimi è: "
.text
.globl main
main:
la $a0, M
li $a1, 4
la $a2, arr_max
jal minmax
move $s0, $v0
li $v0, 56
la $a0, output
move $a1, $s0
syscall
li $v0, 10
syscall | 19.851852 | 157 | 0.600746 |
14b4e7316ef910abc67db54938bf3d08022d85f3 | 7,247 | asm | Assembly | Transynther/x86/_processed/NONE/_zr_/i3-7100_9_0xca_notsx.log_21829_1789.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_zr_/i3-7100_9_0xca_notsx.log_21829_1789.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_zr_/i3-7100_9_0xca_notsx.log_21829_1789.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r12
push %r14
push %r15
push %rbp
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_UC_ht+0x10701, %rbp
clflush (%rbp)
nop
xor %rsi, %rsi
movb $0x61, (%rbp)
nop
nop
nop
nop
nop
cmp $41154, %r15
lea addresses_A_ht+0x1cc01, %rsi
lea addresses_WC_ht+0x1c7f, %rdi
cmp %rdx, %rdx
mov $89, %rcx
rep movsw
nop
nop
nop
nop
sub $31519, %rcx
lea addresses_normal_ht+0xde51, %rsi
lea addresses_D_ht+0x18241, %rdi
nop
and $39738, %r12
mov $45, %rcx
rep movsq
nop
nop
nop
nop
xor $57988, %rbp
lea addresses_A_ht+0x14f11, %r14
nop
nop
nop
nop
and %rdi, %rdi
movw $0x6162, (%r14)
nop
sub %rbp, %rbp
lea addresses_A_ht+0x5f01, %rdx
nop
nop
nop
nop
and $13057, %r15
vmovups (%rdx), %ymm2
vextracti128 $1, %ymm2, %xmm2
vpextrq $0, %xmm2, %r12
nop
xor $30381, %rbp
lea addresses_A_ht+0x24e1, %rsi
nop
nop
sub $44756, %r12
movl $0x61626364, (%rsi)
nop
nop
cmp %rdi, %rdi
lea addresses_WT_ht+0x10e01, %rsi
nop
inc %r14
mov (%rsi), %ecx
nop
nop
nop
nop
add $55150, %r12
lea addresses_UC_ht+0x2f41, %rsi
lea addresses_UC_ht+0x1bc39, %rdi
nop
nop
xor $3315, %r12
mov $106, %rcx
rep movsb
nop
and %r14, %r14
lea addresses_D_ht+0x17ac9, %rsi
lea addresses_normal_ht+0x19e01, %rdi
nop
nop
nop
sub %r12, %r12
mov $67, %rcx
rep movsq
nop
nop
cmp $22919, %rdx
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbp
pop %r15
pop %r14
pop %r12
ret
.global s_faulty_load
s_faulty_load:
push %r12
push %r14
push %r9
push %rax
push %rbp
push %rbx
push %rdi
// Load
lea addresses_WC+0x10d7d, %rax
nop
nop
dec %rbp
movb (%rax), %r9b
nop
nop
dec %r12
// Store
mov $0x55acb30000000c29, %rax
nop
sub %r14, %r14
movb $0x51, (%rax)
nop
nop
nop
nop
nop
and %rdi, %rdi
// Store
lea addresses_WT+0x181, %r14
nop
nop
nop
xor %rbp, %rbp
mov $0x5152535455565758, %rax
movq %rax, %xmm1
movups %xmm1, (%r14)
nop
nop
nop
nop
cmp $44782, %rdi
// Load
lea addresses_WC+0x137f1, %rdi
dec %rbx
vmovaps (%rdi), %ymm7
vextracti128 $0, %ymm7, %xmm7
vpextrq $1, %xmm7, %rbp
nop
nop
nop
nop
add %rbp, %rbp
// Faulty Load
lea addresses_A+0x2701, %rdi
xor %r12, %r12
movb (%rdi), %al
lea oracles, %r14
and $0xff, %rax
shlq $12, %rax
mov (%r14,%rax,1), %rax
pop %rdi
pop %rbx
pop %rbp
pop %rax
pop %r9
pop %r14
pop %r12
ret
/*
<gen_faulty_load>
[REF]
{'src': {'same': False, 'congruent': 0, 'NT': False, 'type': 'addresses_A', 'size': 4, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'same': False, 'congruent': 2, 'NT': False, 'type': 'addresses_WC', 'size': 1, 'AVXalign': False}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 1, 'NT': False, 'type': 'addresses_NC', 'size': 1, 'AVXalign': False}}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 7, 'NT': False, 'type': 'addresses_WT', 'size': 16, 'AVXalign': False}}
{'src': {'same': False, 'congruent': 4, 'NT': False, 'type': 'addresses_WC', 'size': 32, 'AVXalign': True}, 'OP': 'LOAD'}
[Faulty Load]
{'src': {'same': True, 'congruent': 0, 'NT': False, 'type': 'addresses_A', 'size': 1, 'AVXalign': False}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'OP': 'STOR', 'dst': {'same': True, 'congruent': 8, 'NT': False, 'type': 'addresses_UC_ht', 'size': 1, 'AVXalign': False}}
{'src': {'type': 'addresses_A_ht', 'congruent': 8, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_WC_ht', 'congruent': 0, 'same': False}}
{'src': {'type': 'addresses_normal_ht', 'congruent': 4, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_D_ht', 'congruent': 6, 'same': False}}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 4, 'NT': False, 'type': 'addresses_A_ht', 'size': 2, 'AVXalign': False}}
{'src': {'same': True, 'congruent': 5, 'NT': False, 'type': 'addresses_A_ht', 'size': 32, 'AVXalign': False}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 4, 'NT': False, 'type': 'addresses_A_ht', 'size': 4, 'AVXalign': False}}
{'src': {'same': False, 'congruent': 8, 'NT': False, 'type': 'addresses_WT_ht', 'size': 4, 'AVXalign': True}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_UC_ht', 'congruent': 5, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_UC_ht', 'congruent': 3, 'same': False}}
{'src': {'type': 'addresses_D_ht', 'congruent': 3, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_normal_ht', 'congruent': 8, 'same': False}}
{'00': 21829}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
| 34.674641 | 2,999 | 0.654892 |
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