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|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
d68898fe5a863b939eddb223a5b2f44fdde028ed | 227 | asm | Assembly | libsrc/games/pc88/bit_close.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 640 | 2017-01-14T23:33:45.000Z | 2022-03-30T11:28:42.000Z | libsrc/games/pc88/bit_close.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 1,600 | 2017-01-15T16:12:02.000Z | 2022-03-31T12:11:12.000Z | libsrc/games/pc88/bit_close.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 215 | 2017-01-17T10:43:03.000Z | 2022-03-23T17:25:02.000Z | ; $Id: bit_close.asm $
;
; NEC PC-8801 - 1 bit sound functions
;
; void bit_close();
;
; Stefano Bodrato - 2018
;
SECTION code_clib
PUBLIC bit_close
PUBLIC _bit_close
.bit_close
._bit_close
ret
| 12.611111 | 37 | 0.621145 |
fe425b07ff351ca535804bf147ae206d3976b24d | 1,115 | asm | Assembly | programs/oeis/100/A100152.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/100/A100152.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/100/A100152.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A100152: Structured truncated cubic numbers.
; 1,24,100,260,535,956,1554,2360,3405,4720,6336,8284,10595,13300,16430,20016,24089,28680,33820,39540,45871,52844,60490,68840,77925,87776,98424,109900,122235,135460,149606,164704,180785,197880,216020,235236,255559,277020,299650,323480,348541,374864,402480,431420,461715,493396,526494,561040,597065,634600,673676,714324,756575,800460,846010,893256,942229,992960,1045480,1099820,1156011,1214084,1274070,1336000,1399905,1465816,1533764,1603780,1675895,1750140,1826546,1905144,1985965,2069040,2154400,2242076,2332099,2424500,2519310,2616560,2716281,2818504,2923260,3030580,3140495,3253036,3368234,3486120,3606725,3730080,3856216,3985164,4116955,4251620,4389190,4529696,4673169,4819640,4969140,5121700
mov $1,1
mov $2,$0
mov $7,$0
add $0,2
lpb $2
add $1,3
lpb $0
add $3,$0
sub $0,1
lpe
add $3,2
sub $3,$2
add $1,$3
sub $2,1
lpe
mov $5,$7
mov $8,$7
lpb $5
sub $5,1
add $6,$8
lpe
mov $4,8
mov $8,$6
lpb $4
add $1,$8
sub $4,1
lpe
mov $5,$7
mov $6,0
lpb $5
sub $5,1
add $6,$8
lpe
mov $4,5
mov $8,$6
lpb $4
add $1,$8
sub $4,1
lpe
mov $0,$1
| 25.340909 | 695 | 0.730045 |
ccf876bfc844e87a77222a22dbdbc8113001c7e7 | 396 | asm | Assembly | Chapter_6/Program 6.1/x86_64/Program_6.1_NASM.asm | chen150182055/Assembly | e5e76bea438a3752b59775098205a77aa7087110 | [
"MIT"
] | 272 | 2016-12-28T02:24:21.000Z | 2022-03-30T21:05:37.000Z | Chapter_6/Program 6.1/x86_64/Program_6.1_NASM.asm | chen150182055/Assembly | e5e76bea438a3752b59775098205a77aa7087110 | [
"MIT"
] | 1 | 2018-04-17T19:47:52.000Z | 2018-04-17T19:47:52.000Z | Chapter_6/Program 6.1/x86_64/Program_6.1_NASM.asm | chen150182055/Assembly | e5e76bea438a3752b59775098205a77aa7087110 | [
"MIT"
] | 62 | 2017-02-02T14:39:37.000Z | 2022-01-04T09:02:07.000Z | ; Program 6.1
; Sum Program - NASM (64-bit)
; Copyright (c) 2020 Hall & Slonka
section .data
num1: dd 2
num2: dd 4
section .text
global _main, _sum
_main:
mov rax, 10
dec rax
mov rbx, 5
movsx rdi, DWORD [rel num1]
movsx rsi, DWORD [rel num2]
call _sum
add rax, rbx
dec rax
mov rax, 60
xor rdi, rdi
syscall
_sum:
push rbp
mov rbp, rsp
push rbx
mov rax, rdi
add rax, rsi
pop rbx
pop rbp
ret
| 10.702703 | 34 | 0.69697 |
e8d217405b251431417604627895b89587d826ed | 11,794 | asm | Assembly | Source/Apps/Timer.asm | vipoo/RomWBW | e463959fee431da2de3da962bd70cb0c556ffaed | [
"DOC",
"MIT"
] | 1 | 2021-11-10T12:31:51.000Z | 2021-11-10T12:31:51.000Z | Source/Apps/Timer.asm | vipoo/RomWBW | e463959fee431da2de3da962bd70cb0c556ffaed | [
"DOC",
"MIT"
] | 1 | 2018-08-03T10:46:18.000Z | 2018-08-03T10:46:18.000Z | Source/Apps/Timer.asm | vipoo/RomWBW | e463959fee431da2de3da962bd70cb0c556ffaed | [
"DOC",
"MIT"
] | null | null | null | ;===============================================================================
; TIMER - Display system timer value
;
;===============================================================================
;
; Author: Wayne Warthen (wwarthen@gmail.com)
;_______________________________________________________________________________
;
; Usage:
; TIMER [/C] [/?]
; ex: TIMER (display current timer value)
; TIMER /? (display version and usage)
; TIMER /C (display timer value continuously)
;
; Operation:
; Reads and displays system timer value.
;_______________________________________________________________________________
;
; Change Log:
; 2018-01-14 [WBW] Initial release
; 2018-01-17 [WBW] Add HBIOS check
; 2019-11-08 [WBW] Add seconds support
;_______________________________________________________________________________
;
; ToDo:
;_______________________________________________________________________________
;
;===============================================================================
; Definitions
;===============================================================================
;
stksiz .equ $40 ; Working stack size
;
restart .equ $0000 ; CP/M restart vector
bdos .equ $0005 ; BDOS invocation vector
;
ident .equ $FFFE ; loc of RomWBW HBIOS ident ptr
;
rmj .equ 3 ; intended CBIOS version - major
rmn .equ 1 ; intended CBIOS version - minor
;
bf_sysver .equ $F1 ; BIOS: VER function
bf_sysget .equ $F8 ; HBIOS: SYSGET function
bf_sysset .equ $F9 ; HBIOS: SYSGET function
bf_sysgettimer .equ $D0 ; TIMER subfunction
bf_syssettimer .equ $D0 ; TIMER subfunction
bf_sysgetsecs .equ $D1 ; SECONDS subfunction
bf_syssetsecs .equ $D1 ; SECONDS subfunction
;
;===============================================================================
; Code Section
;===============================================================================
;
.org $100
;
; setup stack (save old value)
ld (stksav),sp ; save stack
ld sp,stack ; set new stack
;
; initialization
call init ; initialize
jr nz,exit ; abort if init fails
;
; process
call process ; do main processing
jr nz,exit ; abort on error
;
exit: ; clean up and return to command processor
call crlf ; formatting
ld sp,(stksav) ; restore stack
;jp restart ; return to CP/M via restart
ret ; return to CP/M w/o restart
;
; Initialization
;
init:
call crlf ; formatting
ld de,msgban ; point to version message part 1
call prtstr ; print it
;
call idbio ; identify active BIOS
cp 1 ; check for HBIOS
jp nz,errbio ; handle BIOS error
;
ld a,rmj << 4 | rmn ; expected HBIOS ver
cp d ; compare with result above
jp nz,errbio ; handle BIOS error
;
initx
; initialization complete
xor a ; signal success
ret ; return
;
; Process
;
process:
; look for start of parms
ld hl,$81 ; point to start of parm area (past len byte)
;
process00:
call nonblank ; skip to next non-blank char
jp z,process0 ; no more parms, go to display
;
; check for option, introduced by a "/"
cp '/' ; start of options?
jp nz,usage ; yes, handle option
call option ; do option processing
ret nz ; done if non-zero return
jr process00 ; continue looking for options
;
process0:
;
; Test of API function to set seconds value
;ld b,bf_sysset ; HBIOS SYSGET function
;ld c,bf_syssetsecs ; SECONDS subfunction
;ld de,0 ; set seconds value
;ld hl,1000 ; ... to 1000
;rst 08 ; call HBIOS, DE:HL := seconds value
;
; get and print seconds value
call crlf2 ; formatting
;
process1:
ld b,bf_sysget ; HBIOS SYSGET function
ld c,bf_sysgettimer ; TIMER subfunction
rst 08 ; call HBIOS, DE:HL := timer value
ld a,(first)
or a
ld a,0
ld (first),a
jr nz,process1a
; test for new value
ld a,(last) ; last LSB value to A
cp l ; compare to current LSB
jr z,process2 ; if equal, bypass display
process1a:
; save and print new value
ld a,l ; new LSB value to A
ld (last),a ; save as last value
call prtcr ; back to start of line
;call nz,prthex32 ; display it
call prthex32 ; display it
ld de,strtick ; tag
call prtstr ; display it
; get and print seconds value
ld b,bf_sysget ; HBIOS SYSGET function
ld c,bf_sysgetsecs ; SECONDS subfunction
rst 08 ; call HBIOS, DE:HL := seconds value
call prthex32 ; display it
ld a,'.' ; fraction separator
call prtchr ; print it
ld a,c ; get fractional component
call prthex ; print it
ld de,strsec ; tag
call prtstr ; display it
;
process2:
ld a,(cont) ; continuous display?
or a ; test for true/false
jr z,process3 ; if false, get out
;
ld c,6 ; BDOS: direct console I/O
ld e,$FF ; input char
call bdos ; call BDOS, A := char
or a ; test for zero
jr z,process1 ; loop until char pressed
;
process3:
xor a ; signal success
ret
;
; Handle special options
;
option:
;
inc hl ; next char
ld a,(hl) ; get it
or a ; zero terminator?
ret z ; done if so
cp ' ' ; blank?
ret z ; done if so
cp '?' ; is it a '?'?
jp z,usage ; yes, display usage
cp 'C' ; is it a 'C', continuous?
jp z,setcont ; yes, set continuous display
jp errprm ; anything else is an error
;
usage:
;
jp erruse ; display usage and get out
;
setcont:
;
or $FF ; set A to true
ld (cont),a ; and set continuous flag
jr option ; check for more option letters
;
; Identify active BIOS. RomWBW HBIOS=1, UNA UBIOS=2, else 0
;
idbio:
;
; Check for UNA (UBIOS)
ld a,($FFFD) ; fixed location of UNA API vector
cp $C3 ; jp instruction?
jr nz,idbio1 ; if not, not UNA
ld hl,($FFFE) ; get jp address
ld a,(hl) ; get byte at target address
cp $FD ; first byte of UNA push ix instruction
jr nz,idbio1 ; if not, not UNA
inc hl ; point to next byte
ld a,(hl) ; get next byte
cp $E5 ; second byte of UNA push ix instruction
jr nz,idbio1 ; if not, not UNA, check others
;
ld bc,$04FA ; UNA: get BIOS date and version
rst 08 ; DE := ver, HL := date
;
ld a,2 ; UNA BIOS id = 2
ret ; and done
;
idbio1:
; Check for RomWBW (HBIOS)
ld hl,($FFFE) ; HL := HBIOS ident location
ld a,'W' ; First byte of ident
cp (hl) ; Compare
jr nz,idbio2 ; Not HBIOS
inc hl ; Next byte of ident
ld a,~'W' ; Second byte of ident
cp (hl) ; Compare
jr nz,idbio2 ; Not HBIOS
;
ld b,bf_sysver ; HBIOS: VER function
ld c,0 ; required reserved value
rst 08 ; DE := version, L := platform id
;
ld a,1 ; HBIOS BIOS id = 1
ret ; and done
;
idbio2:
; No idea what this is
xor a ; Setup return value of 0
ret ; and done
;
; Print character in A without destroying any registers
;
prtchr:
push bc ; save registers
push de
push hl
ld e,a ; character to print in E
ld c,$02 ; BDOS function to output a character
call bdos ; do it
pop hl ; restore registers
pop de
pop bc
ret
;
prtdot:
;
; shortcut to print a dot preserving all regs
push af ; save af
ld a,'.' ; load dot char
call prtchr ; print it
pop af ; restore af
ret ; done
;
prtcr:
;
; shortcut to print a dot preserving all regs
push af ; save af
ld a,13 ; load CR value
call prtchr ; print it
pop af ; restore af
ret ; done
;
; Print a zero terminated string at (DE) without destroying any registers
;
prtstr:
push de
;
prtstr1:
ld a,(de) ; get next char
or a
jr z,prtstr2
call prtchr
inc de
jr prtstr1
;
prtstr2:
pop de ; restore registers
ret
;
; Print the value in A in hex without destroying any registers
;
prthex:
push af ; save AF
push de ; save DE
call hexascii ; convert value in A to hex chars in DE
ld a,d ; get the high order hex char
call prtchr ; print it
ld a,e ; get the low order hex char
call prtchr ; print it
pop de ; restore DE
pop af ; restore AF
ret ; done
;
; print the hex word value in bc
;
prthexword:
push af
ld a,b
call prthex
ld a,c
call prthex
pop af
ret
;
; print the hex dword value in de:hl
;
prthex32:
push bc
push de
pop bc
call prthexword
push hl
pop bc
call prthexword
pop bc
ret
;
; Convert binary value in A to ascii hex characters in DE
;
hexascii:
ld d,a ; save A in D
call hexconv ; convert low nibble of A to hex
ld e,a ; save it in E
ld a,d ; get original value back
rlca ; rotate high order nibble to low bits
rlca
rlca
rlca
call hexconv ; convert nibble
ld d,a ; save it in D
ret ; done
;
; Convert low nibble of A to ascii hex
;
hexconv:
and $0F ; low nibble only
add a,$90
daa
adc a,$40
daa
ret
;
; Print value of A or HL in decimal with leading zero suppression
; Use prtdecb for A or prtdecw for HL
;
prtdecb:
push hl
ld h,0
ld l,a
call prtdecw ; print it
pop hl
ret
;
prtdecw:
push af
push bc
push de
push hl
call prtdec0
pop hl
pop de
pop bc
pop af
ret
;
prtdec0:
ld e,'0'
ld bc,-10000
call prtdec1
ld bc,-1000
call prtdec1
ld bc,-100
call prtdec1
ld c,-10
call prtdec1
ld e,0
ld c,-1
prtdec1:
ld a,'0' - 1
prtdec2:
inc a
add hl,bc
jr c,prtdec2
sbc hl,bc
cp e
ret z
ld e,0
call prtchr
ret
;
; Start a new line
;
crlf2:
call crlf ; two of them
crlf:
push af ; preserve AF
ld a,13 ; <CR>
call prtchr ; print it
ld a,10 ; <LF>
call prtchr ; print it
pop af ; restore AF
ret
;
; Get the next non-blank character from (HL).
;
nonblank:
ld a,(hl) ; load next character
or a ; string ends with a null
ret z ; if null, return pointing to null
cp ' ' ; check for blank
ret nz ; return if not blank
inc hl ; if blank, increment character pointer
jr nonblank ; and loop
;
; Convert character in A to uppercase
;
ucase:
cp 'a' ; if below 'a'
ret c ; ... do nothing and return
cp 'z' + 1 ; if above 'z'
ret nc ; ... do nothing and return
res 5,a ; clear bit 5 to make lower case -> upper case
ret ; and return
;
; Add the value in A to HL (HL := HL + A)
;
addhl:
add a,l ; A := A + L
ld l,a ; Put result back in L
ret nc ; if no carry, we are done
inc h ; if carry, increment H
ret ; and return
;
; Jump indirect to address in HL
;
jphl:
jp (hl)
;
; Errors
;
erruse: ; command usage error (syntax)
ld de,msguse
jr err
;
errprm: ; command parameter error (syntax)
ld de,msgprm
jr err
;
errbio: ; invalid BIOS or version
ld de,msgbio
jr err
;
err: ; print error string and return error signal
call crlf2 ; print newline
;
err1: ; without the leading crlf
call prtstr ; print error string
;
err2: ; without the string
; call crlf ; print newline
or $FF ; signal error
ret ; done
;
;===============================================================================
; Storage Section
;===============================================================================
;
last .db 0 ; last LSB of timer value
cont .db 0 ; non-zero indicates continuous display
first .db $FF ; first pass flag (true at start)
;
stksav .dw 0 ; stack pointer saved at start
.fill stksiz,0 ; stack
stack .equ $ ; stack top
;
; Messages
;
msgban .db "TIMER v1.1, 10-Nov-2019",13,10
.db "Copyright (C) 2019, Wayne Warthen, GNU GPL v3",0
msguse .db "Usage: TIMER [/C] [/?]",13,10
.db " ex. TIMER (display current timer value)",13,10
.db " TIMER /? (display version and usage)",13,10
.db " TIMER /C (display timer value continuously)",0
msgprm .db "Parameter error (TIMER /? for usage)",0
msgbio .db "Incompatible BIOS or version, "
.db "HBIOS v", '0' + rmj, ".", '0' + rmn, " required",0
strtick .db " Ticks, ",0
strsec .db " Seconds",0
;
.end
| 23.216535 | 81 | 0.608445 |
572ed730e7711383640593c4cd253e279e0c42a6 | 962 | asm | Assembly | MicroProcessor Lab Programs/time.asm | vallabhiaf/4thSemIse | 55ed3c6fc29e4d2dd2c1fb71e31f5283ad47b9bf | [
"Apache-2.0"
] | null | null | null | MicroProcessor Lab Programs/time.asm | vallabhiaf/4thSemIse | 55ed3c6fc29e4d2dd2c1fb71e31f5283ad47b9bf | [
"Apache-2.0"
] | null | null | null | MicroProcessor Lab Programs/time.asm | vallabhiaf/4thSemIse | 55ed3c6fc29e4d2dd2c1fb71e31f5283ad47b9bf | [
"Apache-2.0"
] | null | null | null | assume cs:code
code segment
start:
mov ah,2ch ;function 2C under INT 21h returns time in ch(hrs), cl(mins)
int 21h ; in hex ( seconds and milliseconds omitted)
mov al,ch
call hex_bcd ; first convert the hrs into 24 hrs formatted bcd
call disp ; then, display it
mov dl,':'
mov ah,2
int 21h ; to display “ : “ in between HH and MM
mov al,cl ; same thing with minutes
call hex_bcd
call disp
mov ah,4ch
int 21h
disp proc ; procedure to display 2 bcd digits
push cx
mov ah,00h
mov cx,4
shl ax,cl
shr al,cl
add ax,3030h
push ax
mov dl,ah
mov ah,2
int 21h
pop ax
mov ah,2
mov dl,al
int 21h
pop cx
ret
disp endp
hex_bcd proc ; procedure to convert hex to bcd
push cx
mov cl,al
mov ch,0
mov al,0
next:
add al,1
daa
loop next
pop cx
ret
hex_bcd endp
code ends
end start
| 18.150943 | 77 | 0.586279 |
178d9d7a25a883a60ee7ab36f611fea0ee285c68 | 6,313 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0x84_notsx.log_21829_1270.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0x84_notsx.log_21829_1270.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0x84_notsx.log_21829_1270.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r13
push %r15
push %r8
push %r9
push %rcx
push %rdi
push %rsi
lea addresses_UC_ht+0xb7fa, %rsi
lea addresses_UC_ht+0x1287a, %rdi
nop
nop
nop
nop
inc %r15
mov $5, %rcx
rep movsw
nop
nop
nop
nop
nop
xor $6290, %r9
lea addresses_WT_ht+0x6f3e, %r13
nop
nop
nop
nop
nop
add $31656, %r8
movb $0x61, (%r13)
nop
xor $10267, %r9
lea addresses_normal_ht+0xa3fa, %r9
inc %r8
movl $0x61626364, (%r9)
nop
and $16739, %r8
lea addresses_normal_ht+0x9d1a, %rsi
nop
nop
nop
sub %r8, %r8
vmovups (%rsi), %ymm2
vextracti128 $0, %ymm2, %xmm2
vpextrq $1, %xmm2, %r15
add %r9, %r9
lea addresses_WT_ht+0x23a, %rsi
sub %r13, %r13
mov $0x6162636465666768, %r9
movq %r9, (%rsi)
nop
nop
dec %r9
pop %rsi
pop %rdi
pop %rcx
pop %r9
pop %r8
pop %r15
pop %r13
ret
.global s_faulty_load
s_faulty_load:
push %r13
push %r15
push %r8
push %rbp
push %rbx
push %rcx
push %rdi
// Store
mov $0x6fa, %rdi
nop
dec %r8
mov $0x5152535455565758, %rcx
movq %rcx, %xmm0
vmovups %ymm0, (%rdi)
nop
and $46084, %r15
// Store
lea addresses_US+0x17e3a, %rdi
clflush (%rdi)
nop
dec %rbx
movw $0x5152, (%rdi)
nop
nop
sub $39304, %r15
// Store
lea addresses_D+0x1c18a, %rcx
nop
nop
nop
nop
cmp $45741, %rbp
movb $0x51, (%rcx)
inc %rbx
// Store
lea addresses_PSE+0x11c7a, %rdi
nop
xor %r15, %r15
movb $0x51, (%rdi)
nop
nop
nop
xor $19132, %rcx
// Store
lea addresses_UC+0x1b3fa, %rcx
nop
sub %rbx, %rbx
mov $0x5152535455565758, %rbp
movq %rbp, %xmm7
movaps %xmm7, (%rcx)
dec %r8
// Faulty Load
lea addresses_D+0x17bfa, %rdi
nop
nop
nop
nop
nop
sub %rbp, %rbp
mov (%rdi), %r13d
lea oracles, %rbx
and $0xff, %r13
shlq $12, %r13
mov (%rbx,%r13,1), %r13
pop %rdi
pop %rcx
pop %rbx
pop %rbp
pop %r8
pop %r15
pop %r13
ret
/*
<gen_faulty_load>
[REF]
{'src': {'type': 'addresses_D', 'same': False, 'size': 32, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'dst': {'type': 'addresses_P', 'same': False, 'size': 32, 'congruent': 8, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_US', 'same': False, 'size': 2, 'congruent': 6, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_D', 'same': False, 'size': 1, 'congruent': 4, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_PSE', 'same': False, 'size': 1, 'congruent': 7, 'NT': True, 'AVXalign': False}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_UC', 'same': False, 'size': 16, 'congruent': 7, 'NT': False, 'AVXalign': True}, 'OP': 'STOR'}
[Faulty Load]
{'src': {'type': 'addresses_D', 'same': True, 'size': 4, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'type': 'addresses_UC_ht', 'congruent': 6, 'same': False}, 'dst': {'type': 'addresses_UC_ht', 'congruent': 7, 'same': False}, 'OP': 'REPM'}
{'dst': {'type': 'addresses_WT_ht', 'same': False, 'size': 1, 'congruent': 1, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_normal_ht', 'same': False, 'size': 4, 'congruent': 11, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'src': {'type': 'addresses_normal_ht', 'same': False, 'size': 32, 'congruent': 1, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'dst': {'type': 'addresses_WT_ht', 'same': False, 'size': 8, 'congruent': 4, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'36': 21829}
36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36
*/
| 38.03012 | 2,999 | 0.653255 |
a0dd90404d2ff8b547a12e938d1d3d06ce1c128e | 471 | asm | Assembly | programs/oeis/249/A249020.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/249/A249020.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/249/A249020.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A249020: a(n) = floor( n * (n+5) / 10) + 1.
; 1,1,2,3,4,6,7,9,11,13,16,18,21,24,27,31,34,38,42,46,51,55,60,65,70,76,81,87,93,99,106,112,119,126,133,141,148,156,164,172,181,189,198,207,216,226,235,245,255,265,276,286,297,308,319,331,342,354,366,378,391,403,416,429,442,456,469,483,497,511,526,540,555,570,585,601,616,632,648,664,681,697,714,731,748,766,783,801,819,837,856,874,893,912,931,951,970,990,1010,1030
mov $1,5
add $1,$0
mul $1,$0
div $1,10
add $1,1
mov $0,$1
| 47.1 | 365 | 0.66879 |
1a646d5e307c37853b75f6d96aed3f3181e2b001 | 8,537 | asm | Assembly | bahamut/source/menu-dispatcher.asm | higan-emu/bahamut-lagoon-translation-kit | 6f08de5b92b597c0b9ecebd485cc975b99acfc13 | [
"0BSD"
] | 2 | 2021-08-15T04:10:10.000Z | 2021-08-15T20:14:13.000Z | bahamut/source/menu-dispatcher.asm | higan-emu/bahamut-lagoon-translation-kit | 6f08de5b92b597c0b9ecebd485cc975b99acfc13 | [
"0BSD"
] | 1 | 2022-02-16T02:46:39.000Z | 2022-02-16T04:30:29.000Z | bahamut/source/menu-dispatcher.asm | higan-emu/bahamut-lagoon-translation-kit | 6f08de5b92b597c0b9ecebd485cc975b99acfc13 | [
"0BSD"
] | 1 | 2021-12-25T11:34:57.000Z | 2021-12-25T11:34:57.000Z | namespace menu {
seek(codeCursor)
//Bahamut Lagoon shares a lot of code routines between each screen,
//which interferes greatly with tile allocation strategies.
//the dispatcher attempts to record when screens are entered into,
//in order to disambiguate shared routines, and call handlers for
//specific screens instead.
namespace dispatcher {
enqueue pc
seek($ee7b64); jsl hookCampaignMenu
seek($ee7947); jsl hookPartyMenu; nop
seek($ee6f83); jsl party
seek($eea74d); string.hook(party.other)
seek($eea512); string.hook(party.other)
seek($ee6f6c); string.skip() //"Party" static text (used by several screens)
//unit and status screens
seek($ee6fe4); string.hook(mp.setType) //"MP"
seek($ee6ff1); string.hook(mp.setType) //"SP"
seek($ee705a); jsl mp.setCurrent
seek($ee707f); jsl mp.setMaximum
seek($ee701c); jsl mp.setCurrentUnavailable
seek($ee7039); jsl mp.setMaximumUnavailable
//formations and dragons screens
seek($ee99f8); jsl technique.name
seek($eea5cd); jsl technique.blank
seek($ee9a05); jsl technique.level
seek($ee9a1e); jsl technique.multiplier; nop #5
seek($ee9a2c); jsl technique.count
//formations, equipments, information, shop screens
seek($eef02b); jsl page.index
seek($eef01b); jsl page.total
seek($eee6b6); string.hook(page.noItems) //"No Items" text (shop screen)
seek($eeefa8); string.hook(page.noItems) //"No Items" text (information screen)
//shared positions
seek($ee700f); adc #$0000 //"MP"- position (magic, item, unit screens)
seek($ee702c); adc #$0000 //"MP"/ position (magic, item, unit screens)
seek($ee7044); adc #$0000 //"SP"# position (magic, item, unit screens)
dequeue pc
namespace screen {
variable(2, id)
constant unknown = 0
constant formations = 1
constant dragons = 2
constant information = 3
constant equipments = 4
constant magicItem = 5
constant equipment = 6
constant status = 7
constant unit = 8
}
constant menuIndex = $4c
function hookCampaignMenu {
lda.b menuIndex
enter
cmp #$0000; bne +; lda.w #screen.formations; sta screen.id; jmp return; +
cmp #$0001; bne +; lda.w #screen.dragons; sta screen.id; jmp return; +
cmp #$0002; bne +; lda.w #screen.information; sta screen.id; jmp return; +
cmp #$0003; bne +; lda.w #screen.equipments; sta screen.id; jmp return; +
lda.w #screen.unknown; sta screen.id
return:
leave
asl; tax; rtl
}
function hookPartyMenu {
lda.b menuIndex
enter
cmp #$0000; bne +; lda.w #screen.magicItem; sta screen.id; jmp return; + //Magic
cmp #$0001; bne +; lda.w #screen.magicItem; sta screen.id; jmp return; + //Item
cmp #$0002; bne +; lda.w #screen.equipment; sta screen.id; jmp return; +
cmp #$0003; bne +; lda.w #screen.information; sta screen.id; jmp return; +
lda.w #screen.unknown; sta screen.id
return:
leave
cmp #$0003; rtl
}
//A => party#
function party {
enter
dec; and #$0007
pha; lda $0f,s; tax; pla //X => caller
cpx #$8052; bne +; jsl party.party; leave; rtl; + //Party and Campaign
cpx #$a570; bne +; jsl formations.party; leave; rtl; + //Formations (selected)
cpx #$a75e; bne +; jsl overviews.party; leave; rtl; + //Formations and Equipments (list)
cpx #$cb3e; bne +; jsl dragons.party; leave; rtl; + //Dragon Formation
leave; rtl
//other party
function other {
php; rep #$20; pha
lda $04,s //A => caller
cmp #$a515; bne +; lda #$0006; jsl formations.party; pla; plp; rtl; + //Formations (selected)
cmp #$a750; bne +; lda #$0006; jsl overviews.party; pla; plp; rtl; + //Formations and Equipments (list)
pla; plp; rtl
}
}
namespace mp {
variable(2, screen)
variable(2, type)
//A => type ($00 = MP, $80 = SP)
function setType {
php; rep #$20; pha
and #$0080; sta type
lda $0c,s //A => caller
cmp #$8fb5; bne +; lda.w #screen.magicItem; sta screen; lda type; jsl magicItem.mp.setType; pla; plp; rtl; +
cmp #$9679; bne +; lda.w #screen.status; sta screen; lda type; jsl status.mp.setType; pla; plp; rtl; +
cmp #$ae65; bne +; lda.w #screen.unit; sta screen; lda type; jsl unit.mp.setType; pla; plp; rtl; +
cmp #$b7bf; bne +; lda.w #screen.equipment; sta screen; lda type; jsl equipment.mp.setType; pla; plp; rtl; +
lda.w #screen.unknown; sta screen; pla; plp; rtl
}
//A => current value
function setCurrent {
php; rep #$20; pha
lda screen
cmp.w #screen.magicItem; bne +; pla; jsl magicItem.mp.setCurrent; plp; rtl; +
cmp.w #screen.status; bne +; pla; jsl status.mp.setCurrent; plp; rtl; +
cmp.w #screen.unit; bne +; pla; jsl unit.mp.setCurrent; plp; rtl; +
cmp.w #screen.equipment; bne +; pla; jsl equipment.mp.setCurrent; plp; rtl; +
pla; plp; rtl
}
//A => maximum value
function setMaximum {
php; rep #$20; pha
lda screen
cmp.w #screen.magicItem; bne +; pla; jsl magicItem.mp.setMaximum; plp; rtl; +
cmp.w #screen.status; bne +; pla; jsl status.mp.setMaximum; plp; rtl; +
cmp.w #screen.unit; bne +; pla; jsl unit.mp.setMaximum; plp; rtl; +
cmp.w #screen.equipment; bne +; pla; jsl equipment.mp.setMaximum; plp; rtl; +
pla; plp; rtl
}
function setCurrentUnavailable {
php; rep #$20; pha
lda #$ffff; jsl setCurrent
pla; plp; rtl
}
function setMaximumUnavailable {
php; rep #$20; pha
lda #$ffff; jsl setMaximum
pla; plp; rtl
}
}
namespace technique {
//A => technique name
function name {
php; rep #$20; pha
lda screen.id
cmp.w #screen.formations; bne +; pla; jsl formations.technique.name; plp; rtl; +
cmp.w #screen.dragons; bne +; pla; jsl dragons.technique.name; plp; rtl; +
pla; plp; rtl
}
function blank {
php; rep #$20; pha
lda #$00ff //position of "---------" in technique list
jsl name
pla; plp; rtl
}
//A => technique level
function level {
php; rep #$20; pha
lda screen.id
cmp.w #screen.formations; bne +; pla; jsl formations.technique.level; plp; rtl; +
cmp.w #screen.dragons; bne +; pla; jsl dragons.technique.level; plp; rtl; +
pla; plp; rtl
}
//------
//ee9a1e lda #$00e7
//ee9a21 ora $1862
//ee9a24 sta $c400,x
//------
function multiplier {
enter
tilemap.decrementAddress(2)
tilemap.setColorIvory()
tilemap.write(glyph.multiplier)
leave; rtl
}
//A => technique count
function count {
enter
tilemap.setColorIvory()
and #$00ff; add.w #glyph.numbers; pha
lda tilemap.address; tax; pla
ora tilemap.attributes; sta tilemap.location,x
leave; rtl
}
}
namespace page {
variable(2, pageIndex)
variable(2, pageTotal)
variable(2, counter)
//A => current page
function index {
enter
and #$00ff; sta pageIndex
leave; rtl
}
//A => total number of pages
function total {
enter
tilemap.setColorWhite()
and #$00ff; sta pageTotal
ldx #$0000
append.styleTiny()
append.alignSkip(2)
append.literal("Page")
lda pageTotal; cmp.w #10; jcs total_2
total_1: {
tilemap.write($a0fc)
append.alignLeft()
append.alignSkip(24)
lda pageIndex; append.integer1(); append.literal("/")
lda pageTotal; append.integer1()
lda #$0005; render.small.bpp2()
getTileIndex(counter, 2); mul(6); add #$03f4; tax
lda #$0005; write.bpp2()
leave; rtl
}
total_2: {
append.alignLeft()
append.alignSkip(23)
lda pageIndex; append.integer_2(); append.literal("/")
append.alignLeft()
append.alignSkip(37)
lda pageTotal; append.integer_2()
lda #$0006; render.small.bpp2()
getTileIndex(counter, 2); mul(6); add #$03f4; tax
lda #$0006; write.bpp2()
leave; rtl
}
}
function noItems {
enter
tilemap.setColorWhite()
tilemap.write($a0fc)
ldx #$0000; append.styleTiny()
append.alignSkip(2); append.literal("No Items!")
lda #$0005; render.small.bpp2()
getTileIndex(counter, 2); mul(6); add #$03f4; tax
lda #$0005; write.bpp2()
leave; rtl
}
}
}
codeCursor = pc()
}
| 30.708633 | 114 | 0.606068 |
397abf0a6e87080dd849df7e8eadfddfe0db4163 | 2,155 | asm | Assembly | Sources/Elastos/Runtime/Core/carapi/invokeCallback_ievc.asm | jingcao80/Elastos | d0f39852356bdaf3a1234743b86364493a0441bc | [
"Apache-2.0"
] | 7 | 2017-07-13T10:34:54.000Z | 2021-04-16T05:40:35.000Z | Sources/Elastos/Runtime/Core/carapi/invokeCallback_ievc.asm | jingcao80/Elastos | d0f39852356bdaf3a1234743b86364493a0441bc | [
"Apache-2.0"
] | null | null | null | Sources/Elastos/Runtime/Core/carapi/invokeCallback_ievc.asm | jingcao80/Elastos | d0f39852356bdaf3a1234743b86364493a0441bc | [
"Apache-2.0"
] | 9 | 2017-07-13T12:33:20.000Z | 2021-06-19T02:46:48.000Z | ;;=========================================================================
;; Copyright (C) 2012 The Elastos Open Source Project
;;
;; Licensed under the Apache License, Version 2.0 (the "License");
;; you may not use this file except in compliance with the License.
;; You may obtain a copy of the License at
;;
;; http://www.apache.org/licenses/LICENSE-2.0
;;
;; Unless required by applicable law or agreed to in writing, software
;; distributed under the License is distributed on an "AS IS" BASIS,
;; WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
;; See the License for the specific language governing permissions and
;; limitations under the License.
;;=========================================================================
AREA |.text|,ALIGN=2,CODE, READONLY
EXPORT invoke
invoke
mov ip, sp
stmdb sp!, {r4, r5, fp, ip, lr}
mov fp, ip
mov r5, r0
cmp r2, #0
beq call_func
mov r4, r1
sub r2, r2, #16 ; 0x10
cmp r2, #0 ; 0x0
ble setreg
add r1, r1, #16 ; 0x10
mov r0, #0 ; 0x0
sub sp, sp, r2
setsp
ldr r3, [r1, r0]
str r3, [sp, r0]
add r0, r0, #4 ; 0x4
sub r2, r2, #4 ; 0x4
cmp r2, #0 ; 0x0
bgt setsp
setreg
ldmia r4!, {r0, r1, r2, r3}
call_func
mov lr, pc
mov pc, r5
ldmdb fp, {r4, r5, fp, sp, pc}
END
AREA |.text|,ALIGN=2,CODE, READONLY
EXPORT invoke
invoke
mov ip, sp
stmdb sp!, {r4, r5, fp, ip, lr}
mov fp, ip
mov r5, r0
cmp r2, #0
beq call_func
mov r4, r1
sub r2, r2, #16 ; 0x10
cmp r2, #0 ; 0x0
ble setreg
add r1, r1, #16 ; 0x10
mov r0, #0 ; 0x0
sub sp, sp, r2
setsp
ldr r3, [r1, r0]
str r3, [sp, r0]
add r0, r0, #4 ; 0x4
sub r2, r2, #4 ; 0x4
cmp r2, #0 ; 0x0
bgt setsp
setreg
ldmia r4!, {r0, r1, r2, r3}
call_func
mov lr, pc
mov pc, r5
ldmdb fp, {r4, r5, fp, sp, pc}
END
| 23.423913 | 75 | 0.485847 |
6afcac3da73e8bebf903beec9ae035c1eb3d3049 | 7,512 | asm | Assembly | examples/3rd-party/Mancala/M.asm | brickpool/hp35s | 14fc5881af7f72e1dbbf408d0201b411e16a9190 | [
"MIT"
] | 3 | 2020-12-08T08:13:46.000Z | 2021-12-15T06:06:57.000Z | examples/3rd-party/Mancala/M.asm | brickpool/hp35s | 14fc5881af7f72e1dbbf408d0201b411e16a9190 | [
"MIT"
] | null | null | null | examples/3rd-party/Mancala/M.asm | brickpool/hp35s | 14fc5881af7f72e1dbbf408d0201b411e16a9190 | [
"MIT"
] | null | null | null | ; Mancala for the HP-35s
; This program is by Dan B. (brianddk) and is used here by permission.
; https://brianddk.github.io/prog/mancala/mancala.asm
MODEL P35S
SEGMENT Mancala CODE
;Main Mancala program
LBL M
XEQ init ; Init the game registers
main: ; Main game loop
XEQ check_winner ; Check for a winner
FS? 3 ; Flag3 = Winner Found!
GTO done ; Finished when a winner is found
redisplay: ; Come here if we pick bad
XEQ display_board ; Display the game board
XEQ pick ; Pick a move
FS? 4 ; Invalid move?
GTO redisplay ; .. Redisplay
XEQ move ; Move the beans
XEQ switch ; Swithch players
GTO main ; Loop for next move
done: ; This is where we finish
XEQ cleanup ; Cleanup we are done
RTN
;
; .Init registers
init: ; Init the game registers
CF 1 ; Clear our flag regs
CF 2
CF 3
CF 4
13 ; For i in 13..1
STO I ; i
4 ; st-x = 4
init_loop:
STO (I) ; 4->(i)
DSE I ; DSE i
GTO init_loop
0 ; i now equals zero
STO (I) ; 0->(i), i = 0
7
STO I
x<>y
STO (I) ; 0->(i), i = 7
SF 1 ; P1'S Turn
; GRAD ; 42s Only, P1 indicator
RTN
; ; This routine will check for
; Check for winner ; .. the winner by looking at
check_winner: ; .. the 'home pits'
SF 10 ; For 35s prompting
CF 3 ; Clear winner found flag
0 ; i = P1-home
STO J ; j = P2-home
7 ; Compare P1-home to 24
STO I ; .. if it is .gte. then won!
RCL (I) ; p1-home,7,0
24 ; 24,p1h,7,0
x<=y?
GTO p1_winner
RCL (J) ; p2h,24,p1h,7
x<>y ; 24,p2h,p1h,7
x<=y?
GTO p2_winner
GTO winner_rtn
p1_winner:
eqn 'PLAYER 1 WON'
GTO winner_done
p2_winner:
eqn 'PLAYER 2 WON'
winner_done:
SF 3 ; Set winner found flag
; PROMPT ; The 41c or 42s uses prompt command
winner_rtn: ; .. But the 35s uses Flag 10
CF 10 ; Restore (35s) default
RTN
;
; Display the board
display_board:
1.006
STO I ; i
14
STO J ; "$(j)" == "$(14)"
1000000
STO (J) ; (j)=1,000,000
p1_board: ; 1m,14,1..
;STOP
10 ; WARN Base 10 for now
6 ; 6,10,1m,14
RCL I ; i,6,10,1m
IP
- ; 6-ip,10,1m,1m
y^x ; 10^(6-ip(i)),1m,1m,1m
RCL (I) ; Ri,10^6-i,1m,1m
* ; 10^(6-ip(i)) * $(i)
STO+ (J) ; @(j) += i^(6-ip(i)) + $(i)
ISG I ; loop
GTO p1_board
15
STO J ; j = P2-vector
2000000
STO (J)
13.007
STO I
p2_board:
;STOP
10 ; WARN Base 10 for now
RCL I ; i,10,13.,2m
IP
8 ; 8,i,10,13.
- ; i-8,10,13.,13.
y^x ; 10^(i-8),13.,13.
RCL (I) ; Ri, 10^..,13,13
* ; Ri*10^..13,13,13
STO+ (J)
DSE I
GTO p2_board
7 ; Now we get the score and tack
STO I ;.. it to the end of the number
0 ;.. as the FP
STO J ; i = p1-home, j=p2-home
0.01 ; .01,0,7
RCL (J) ; R0,.01,0,7
* ; R0%,0,7,7
0.01 ; .01,R0%,0,7
RCL (I) ; R7,.01,R0%,0
* ; R7%,R0%,0,0
14 ; .. st-y = p2-score/100
STO I
15
STO J ; i = p1 vector, j=p2-vector
Rv ; st-x = p1-score/100
Rv ; .. st-y = p2-score/100
STO+ (I)
x<>y
STO+ (J)
RCL (J) ; P2
RCL (I) ; P1
; FS? 2 ; 41c Only
; x<>y ; 41c Only
FIX 2
STOP
RTN
;
; Pick a pit to move
pick:
CF 4
IP ; INT
1
x<>y
x<y?
SF 4
6
x<>y
x>y?
SF 4
FS? 4
GTO pick_done
STO I ; i=PICK
FS? 1
GTO check_pick
14
x<>y
-
STO I ; i
check_pick:
RCL (I) ; (i)
x=0?
SF 4
pick_done:
RCL I ; i
RTN
;
; Move beans from selected pit
move:
0
x<> (I) ; (i)= 0 (MOVE BEANS OUT)
STO J ; j=VALUE PREVIOUSLY IN (i)
move_loop:
; INCI SUBROUTINE-INLINE
1
RCL I ; i++ (MOVE REGISTER FORWARD)
+
14
RMDR ; MOD
STO I ; i=(i+1)MOD(14)
FS? 1 ; P1?
GTO skip0 ; SKIP0 IF P1
FS? 2
GTO skip7 ; SKIP7 IF P2
; INCI END-SUBROUTINE-INLINE
1
STO+ (I) ; (i)=(i)+1
DSE J ; j--
GTO move_loop
1
RCL (I)
x=y?
GTO win_beans
RTN
;
; SKIP0
skip0:
x=0?
ISG I
CF 0 ; NOP
RTN
;
; SKIP7
skip7:
7
x<>y
x=y?
ISG I
CF 0 ; NOP
RTN
;
; WIN-BEANS
win_beans:
;STOP
RCL I
x=0?
RTN
7
x=y?
RTN
FS? 1
GTO p1_winbeans
FS? 2
GTO p2_winbeans
RTN
p1_winbeans:
STO J
x<y? ; 7 < I ?
RTN
GTO done_winbeans
p2_winbeans:
0
STO J
Rv
x>y?
RTN
done_winbeans:
CLx
x<> (I)
STO+ (J)
CLx
14
x<>y
-
STO I
0
x<> (I)
STO+ (J)
RTN
;
; Switch to other players turn
switch:
7
RCL I ; i contains the final register of move
x=y? ; if i=7, landed in a bank, free move
RTN
x=0? ; if i=0, landed in a bank, free move
RTN
FS? 1
GTO switchto_p2
CF 2
SF 1
; GRAD
GTO switch_done
switchto_p2:
CF 1
SF 2
RAD
switch_done:
RTN
;
; Clean up after game
cleanup:
CF 1
CF 2
CF 3
CF 4
FIX 4
DEG
RTN
ENDS Mancala
END
| 25.99308 | 75 | 0.347577 |
9d4cc111b1f0061841a5d51339806bd4b0006149 | 109 | asm | Assembly | 3° Período/Arquiterura-e-Organiza-o-de-Computadores/Operações Básicas MIPS 1.asm | sullyvan15/UVV | 2390cc2881792d036db1d8b098fe366f47cd98c3 | [
"MIT"
] | null | null | null | 3° Período/Arquiterura-e-Organiza-o-de-Computadores/Operações Básicas MIPS 1.asm | sullyvan15/UVV | 2390cc2881792d036db1d8b098fe366f47cd98c3 | [
"MIT"
] | 1 | 2020-10-07T23:33:21.000Z | 2020-10-08T01:15:11.000Z | 3° Período/Arquiterura-e-Organiza-o-de-Computadores/Operações Básicas MIPS 1.asm | sullyvan15/Universidade-Vila-Velha | 2390cc2881792d036db1d8b098fe366f47cd98c3 | [
"MIT"
] | null | null | null | .data
out_string: .ascii "\nHello, World!\n"
.text
main:
li $v0, 4
la $a0, out_string
syscall | 12.111111 | 39 | 0.59633 |
9d725982bd52176029ce6e59d58617f6c33a1135 | 1,061 | asm | Assembly | _build/dispatcher/jmp_ippsSHA256Unpack_cb89815c.asm | zyktrcn/ippcp | b0bbe9bbb750a7cf4af5914dd8e6776a8d544466 | [
"Apache-2.0"
] | 1 | 2021-10-04T10:21:54.000Z | 2021-10-04T10:21:54.000Z | _build/dispatcher/jmp_ippsSHA256Unpack_cb89815c.asm | zyktrcn/ippcp | b0bbe9bbb750a7cf4af5914dd8e6776a8d544466 | [
"Apache-2.0"
] | null | null | null | _build/dispatcher/jmp_ippsSHA256Unpack_cb89815c.asm | zyktrcn/ippcp | b0bbe9bbb750a7cf4af5914dd8e6776a8d544466 | [
"Apache-2.0"
] | null | null | null | extern m7_ippsSHA256Unpack:function
extern n8_ippsSHA256Unpack:function
extern y8_ippsSHA256Unpack:function
extern e9_ippsSHA256Unpack:function
extern l9_ippsSHA256Unpack:function
extern n0_ippsSHA256Unpack:function
extern k0_ippsSHA256Unpack:function
extern ippcpJumpIndexForMergedLibs
extern ippcpSafeInit:function
segment .data
align 8
dq .Lin_ippsSHA256Unpack
.Larraddr_ippsSHA256Unpack:
dq m7_ippsSHA256Unpack
dq n8_ippsSHA256Unpack
dq y8_ippsSHA256Unpack
dq e9_ippsSHA256Unpack
dq l9_ippsSHA256Unpack
dq n0_ippsSHA256Unpack
dq k0_ippsSHA256Unpack
segment .text
global ippsSHA256Unpack:function (ippsSHA256Unpack.LEndippsSHA256Unpack - ippsSHA256Unpack)
.Lin_ippsSHA256Unpack:
db 0xf3, 0x0f, 0x1e, 0xfa
call ippcpSafeInit wrt ..plt
align 16
ippsSHA256Unpack:
db 0xf3, 0x0f, 0x1e, 0xfa
mov rax, qword [rel ippcpJumpIndexForMergedLibs wrt ..gotpc]
movsxd rax, dword [rax]
lea r11, [rel .Larraddr_ippsSHA256Unpack]
mov r11, qword [r11+rax*8]
jmp r11
.LEndippsSHA256Unpack:
| 27.205128 | 91 | 0.792648 |
39e22a08ea893b123c61730e49177bac7c91e8cb | 318 | asm | Assembly | sort.asm | creativcoder/asm8085 | 94eee431aec7e49df6ea8df01cc4c5a370e86df7 | [
"MIT"
] | null | null | null | sort.asm | creativcoder/asm8085 | 94eee431aec7e49df6ea8df01cc4c5a370e86df7 | [
"MIT"
] | null | null | null | sort.asm | creativcoder/asm8085 | 94eee431aec7e49df6ea8df01cc4c5a370e86df7 | [
"MIT"
] | null | null | null | ;Rahul Sharma
;In place sorting of an array of numbers in memory
jmp start
;data
;code
start: lxi h,0000h ;stores array length
mov b,m
dcr b
oloop: mov c,b
lxi h,0001h ; top most data of array
iloop: mov a,m
inx h
cmp m
jz skip
jc skip
mov e,m
mov m,a
dcx h
mov m,e
inx h
skip: dcr c
jnz iloop
dcr b
jnz oloop
hlt
| 10.6 | 50 | 0.716981 |
6c337ac2c4f6de0d641335814866600e3635d66e | 5,296 | asm | Assembly | Transynther/x86/_processed/AVXALIGN/_st_sm_/i9-9900K_12_0xca.log_21829_1614.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/AVXALIGN/_st_sm_/i9-9900K_12_0xca.log_21829_1614.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/AVXALIGN/_st_sm_/i9-9900K_12_0xca.log_21829_1614.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r12
push %r14
push %r15
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_D_ht+0x3f3d, %rdx
nop
nop
nop
nop
inc %r12
mov $0x6162636465666768, %r14
movq %r14, (%rdx)
nop
nop
nop
dec %rdx
lea addresses_WT_ht+0x1e83d, %rsi
lea addresses_UC_ht+0x11707, %rdi
and %r15, %r15
mov $79, %rcx
rep movsl
nop
nop
nop
nop
xor $57371, %rdi
lea addresses_UC_ht+0xda3d, %r12
dec %rcx
mov (%r12), %r15d
nop
nop
nop
nop
add $47418, %rsi
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %r15
pop %r14
pop %r12
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r12
push %r13
push %r14
push %r9
push %rbp
push %rcx
// Store
lea addresses_WT+0x1948d, %rbp
clflush (%rbp)
nop
nop
nop
sub $33034, %r13
movb $0x51, (%rbp)
dec %r11
// Store
lea addresses_D+0xae3d, %r9
nop
cmp $30004, %r14
movl $0x51525354, (%r9)
nop
xor %r12, %r12
// Store
lea addresses_D+0x9fbd, %r12
nop
nop
nop
xor %r11, %r11
movl $0x51525354, (%r12)
nop
nop
sub $45776, %rcx
// Faulty Load
lea addresses_D+0xae3d, %r11
nop
nop
nop
and $42815, %r13
mov (%r11), %r12w
lea oracles, %r14
and $0xff, %r12
shlq $12, %r12
mov (%r14,%r12,1), %r12
pop %rcx
pop %rbp
pop %r9
pop %r14
pop %r13
pop %r12
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'size': 32, 'NT': False, 'type': 'addresses_D', 'same': False, 'AVXalign': False, 'congruent': 0}}
{'OP': 'STOR', 'dst': {'size': 1, 'NT': False, 'type': 'addresses_WT', 'same': False, 'AVXalign': False, 'congruent': 3}}
{'OP': 'STOR', 'dst': {'size': 4, 'NT': False, 'type': 'addresses_D', 'same': True, 'AVXalign': False, 'congruent': 0}}
{'OP': 'STOR', 'dst': {'size': 4, 'NT': False, 'type': 'addresses_D', 'same': False, 'AVXalign': False, 'congruent': 6}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'size': 2, 'NT': True, 'type': 'addresses_D', 'same': True, 'AVXalign': False, 'congruent': 0}}
<gen_prepare_buffer>
{'OP': 'STOR', 'dst': {'size': 8, 'NT': False, 'type': 'addresses_D_ht', 'same': False, 'AVXalign': False, 'congruent': 8}}
{'OP': 'REPM', 'src': {'same': False, 'type': 'addresses_WT_ht', 'congruent': 9}, 'dst': {'same': False, 'type': 'addresses_UC_ht', 'congruent': 1}}
{'OP': 'LOAD', 'src': {'size': 4, 'NT': False, 'type': 'addresses_UC_ht', 'same': False, 'AVXalign': False, 'congruent': 8}}
{'54': 21829}
54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54
*/
| 42.709677 | 2,999 | 0.656722 |
c54dfb90033f1dca2fa25001276df42a7d81a4ce | 511 | asm | Assembly | programs/oeis/025/A025710.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/025/A025710.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/025/A025710.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A025710: Index of 5^n within sequence of numbers of form 5^i*9^j.
; 1,2,4,7,10,14,19,25,31,38,46,55,64,74,85,96,108,121,135,149,164,180,197,214,232,251,271,291,312,334,356,379,403,428,453,479,506,534,562,591,621,652,683,715,748,781,815,850,886,922,959,997,1036,1075,1115,1156,1198
mov $2,$0
add $2,1
mov $6,$0
lpb $2
mov $0,$6
sub $2,1
sub $0,$2
mov $3,$0
mul $3,2
lpb $0
mov $0,0
mov $5,$3
mul $5,11
sub $5,1
div $5,30
lpe
pow $4,$7
add $4,$5
add $1,$4
lpe
mov $0,$1
| 20.44 | 214 | 0.598826 |
fbec8503ce6d9971463e241885b62a687b178f00 | 2,843 | asm | Assembly | Lab05/Task04.asm | PrabalChowdhury/CSE-341-MICROPROCESSOR | 88f0dea914890c5aa5bc10d0131233b2ebd27586 | [
"MIT"
] | null | null | null | Lab05/Task04.asm | PrabalChowdhury/CSE-341-MICROPROCESSOR | 88f0dea914890c5aa5bc10d0131233b2ebd27586 | [
"MIT"
] | null | null | null | Lab05/Task04.asm | PrabalChowdhury/CSE-341-MICROPROCESSOR | 88f0dea914890c5aa5bc10d0131233b2ebd27586 | [
"MIT"
] | null | null | null | .MODEL SMalL
.STACK 100H
.DATA
X DB "ENTER A HEX DIGIT: $"
Y DB "IN DECIMAL IT IS 1$"
Z DB "IN DECIMAL IT IS $"
P DB "DO YOU WANT TO DO IT AGAIN? :$"
Q DB "ILLEGAL CHARACTER, $"
R DB "INSERT AGAIN: $"
.CODE
MAIN PROC
MOV AX,@DATA
MOV DS,AX
SRT:
lea dx,X
mov ah,9
int 21H
mov ah,1
int 21H
mov cl,al
mov ah,2
mov dl,0DH
int 21H
mov dl,0ah
int 21H
cmp cl,41H
je AB
cmp cl,42H
je AB
cmp cl,43H
je AB
cmp cl,44H
je AB
cmp cl,45H
je AB
cmp cl,46H
je AB
cmp cl,30H
je AD
cmp cl,31H
je AD
cmp cl,32H
je AD
cmp cl,33H
je AD
cmp cl,34H
je AD
cmp cl,35H
je AD
cmp cl,36H
je AD
cmp cl,37H
je AD
cmp cl,38H
je AD
cmp cl,39H
je AD
JMP AC
AB:
sub cl,11H
lea DX, Y
mov ah,9
int 21H
mov dl, cl
mov ah,2
int 21H
mov ah,2
mov dl,0DH
int 21H
mov dl,0ah
int 21H
lea DX,P
mov ah,9
int 21H
mov ah,1
int 21H
mov cl,al
mov ah,2
mov dl,0DH
int 21H
mov dl,0ah
int 21H
cmp cl,59H
je SRT
cmp cl,79H
je SRT
cmp cl,4EH
je EXT
cmp cl,6EH
je EXT
AD:
lea DX,Z
mov ah,9
int 21H
mov dl, cl
mov ah,2
int 21H
mov ah,2
mov dl,0DH
int 21H
mov dl,0ah
int 21H
lea DX,P
mov ah,9
int 21H
mov ah,1
int 21H
mov cl,al
mov ah,2
mov dl,0DH
int 21H
mov dl,0ah
int 21H
cmp cl,59H
je SRT
cmp cl,79H
je SRT
cmp cl,4Eh
je EXT
cmp cl,6Eh
je EXT
AC:
lea DX,Q
mov ah,9
int 21H
JMP SRT2
SRT2:
lea DX,R
mov ah,9
int 21H
mov ah,1
int 21H
mov cl,al
mov ah,2
mov dl,0DH
int 21H
mov dl,0ah
int 21H
cmp cl,41H
je AB
cmp cl,42H
je AB
cmp cl,43H
je AB
cmp cl,44H
je AB
cmp cl,45H
je AB
cmp cl,46H
je AB
cmp cl,30H
je AD
cmp cl,31H
je AD
cmp cl,32H
je AD
cmp cl,33H
je AD
cmp cl,34H
je AD
cmp cl,35H
je AD
cmp cl,36H
je AD
cmp cl,37H
je AD
cmp cl,38H
je AD
cmp cl,39H
je AD
JMP AC
EXT:
MOV AX,4C00H
INT 21H
MAIN ENDP
END MAIN | 14.286432 | 38 | 0.408371 |
3a3debaadd52b90249d60a493853af0c96672fe8 | 378 | asm | Assembly | programs/oeis/335/A335115.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/335/A335115.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/335/A335115.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A335115: a(2*n) = 2*n - a(n), a(2*n+1) = 2*n + 1.
; 1,1,3,3,5,3,7,5,9,5,11,9,13,7,15,11,17,9,19,15,21,11,23,15,25,13,27,21,29,15,31,21,33,17,35,27,37,19,39,25,41,21,43,33,45,23,47,33,49,25,51,39,53,27,55,35,57,29,59,45,61,31,63,43,65,33,67,51,69,35,71,45,73,37,75
lpb $0,1
mov $2,$0
gcd $0,2
bin $0,2
sub $0,1
div $2,2
mul $0,$2
add $1,$2
lpe
mul $1,2
add $1,1
| 25.2 | 213 | 0.558201 |
0c8f8409a5896333840a33bb235f11e68ee35c5e | 599 | asm | Assembly | programs/oeis/244/A244413.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/244/A244413.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | programs/oeis/244/A244413.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | ; A244413: Exponent of highest power of 8 dividing n.
; 0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,2,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,2,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,2,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,1,0,0
add $0,1
lpb $0
dif $0,8
add $1,1
lpe
| 66.555556 | 501 | 0.522538 |
ceceab83803e09fc77cedb8b5aa8c26bc04c0fa1 | 8,524 | asm | Assembly | Transynther/x86/_processed/AVXALIGN/_st_4k_/i9-9900K_12_0xa0.log_21829_1084.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/AVXALIGN/_st_4k_/i9-9900K_12_0xa0.log_21829_1084.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/AVXALIGN/_st_4k_/i9-9900K_12_0xa0.log_21829_1084.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r14
push %r8
push %r9
push %rcx
push %rdi
push %rsi
lea addresses_WT_ht+0x1bcd6, %rsi
lea addresses_UC_ht+0x14ad6, %rdi
clflush (%rsi)
nop
nop
add $46527, %r14
mov $87, %rcx
rep movsq
sub $21669, %r8
lea addresses_normal_ht+0xb856, %rsi
lea addresses_normal_ht+0x15fd2, %rdi
nop
nop
nop
nop
and $13443, %r11
mov $65, %rcx
rep movsq
nop
nop
nop
nop
inc %r8
lea addresses_UC_ht+0xe97e, %rsi
lea addresses_UC_ht+0xae7f, %rdi
clflush (%rsi)
nop
nop
and $44165, %r9
mov $3, %rcx
rep movsb
nop
nop
nop
nop
cmp %r11, %r11
lea addresses_WC_ht+0x1b8b2, %rsi
nop
nop
nop
nop
nop
add %r8, %r8
movb (%rsi), %r9b
and $51480, %r9
lea addresses_UC_ht+0x11ad6, %r8
nop
nop
nop
nop
and %rdi, %rdi
mov $0x6162636465666768, %rsi
movq %rsi, (%r8)
nop
nop
nop
nop
nop
sub %rcx, %rcx
lea addresses_UC_ht+0xe2d6, %r11
nop
nop
nop
nop
cmp $36467, %rsi
movl $0x61626364, (%r11)
nop
nop
xor %r14, %r14
lea addresses_WT_ht+0x1c782, %r8
nop
nop
nop
nop
nop
xor %rsi, %rsi
movl $0x61626364, (%r8)
nop
nop
nop
mfence
lea addresses_normal_ht+0xee16, %r11
nop
nop
nop
nop
nop
xor %r9, %r9
mov (%r11), %rdi
nop
nop
xor $26322, %r14
lea addresses_D_ht+0x16dfa, %r14
clflush (%r14)
nop
nop
nop
and $54116, %rcx
mov $0x6162636465666768, %r9
movq %r9, (%r14)
nop
nop
nop
xor %r14, %r14
lea addresses_A_ht+0x11086, %r14
nop
nop
sub %rcx, %rcx
movw $0x6162, (%r14)
nop
sub %r8, %r8
lea addresses_WT_ht+0x3016, %rdi
sub %rcx, %rcx
mov (%rdi), %r11
cmp %rdi, %rdi
lea addresses_normal_ht+0x11480, %r8
nop
nop
xor %r14, %r14
mov (%r8), %ecx
nop
sub $44522, %rcx
pop %rsi
pop %rdi
pop %rcx
pop %r9
pop %r8
pop %r14
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r12
push %r8
push %rbx
push %rcx
push %rdx
push %rsi
// Load
lea addresses_WC+0x1aad6, %rdx
nop
nop
nop
nop
nop
dec %rsi
vmovntdqa (%rdx), %ymm5
vextracti128 $0, %ymm5, %xmm5
vpextrq $1, %xmm5, %r10
nop
nop
nop
xor %r8, %r8
// Load
lea addresses_WC+0x3ed6, %r8
nop
nop
nop
nop
add %rcx, %rcx
mov (%r8), %si
nop
nop
nop
xor $19219, %rsi
// Store
lea addresses_A+0x866e, %rsi
nop
nop
sub $4151, %r12
mov $0x5152535455565758, %r8
movq %r8, %xmm6
movups %xmm6, (%rsi)
nop
sub $35035, %rsi
// Store
lea addresses_PSE+0x19ad6, %rdx
and $56117, %rbx
mov $0x5152535455565758, %r10
movq %r10, %xmm2
movups %xmm2, (%rdx)
nop
nop
nop
nop
cmp $3309, %rsi
// Store
lea addresses_RW+0x3ad6, %r12
nop
nop
nop
nop
nop
sub $46268, %r10
movl $0x51525354, (%r12)
nop
inc %r12
// Store
lea addresses_UC+0x1f396, %rdx
add %r8, %r8
mov $0x5152535455565758, %r12
movq %r12, %xmm6
movups %xmm6, (%rdx)
// Exception!!!
mov (0), %r8
nop
nop
nop
nop
nop
inc %r10
// Faulty Load
lea addresses_WC+0x1aad6, %rbx
nop
nop
nop
nop
nop
inc %rdx
mov (%rbx), %r12
lea oracles, %rbx
and $0xff, %r12
shlq $12, %r12
mov (%rbx,%r12,1), %r12
pop %rsi
pop %rdx
pop %rcx
pop %rbx
pop %r8
pop %r12
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'src': {'NT': False, 'same': False, 'congruent': 0, 'type': 'addresses_WC', 'AVXalign': False, 'size': 32}, 'OP': 'LOAD'}
{'src': {'NT': True, 'same': True, 'congruent': 0, 'type': 'addresses_WC', 'AVXalign': False, 'size': 32}, 'OP': 'LOAD'}
{'src': {'NT': False, 'same': False, 'congruent': 10, 'type': 'addresses_WC', 'AVXalign': False, 'size': 2}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 3, 'type': 'addresses_A', 'AVXalign': False, 'size': 16}}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 9, 'type': 'addresses_PSE', 'AVXalign': False, 'size': 16}}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 11, 'type': 'addresses_RW', 'AVXalign': False, 'size': 4}}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 6, 'type': 'addresses_UC', 'AVXalign': False, 'size': 16}}
[Faulty Load]
{'src': {'NT': True, 'same': True, 'congruent': 0, 'type': 'addresses_WC', 'AVXalign': False, 'size': 8}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'same': False, 'congruent': 9, 'type': 'addresses_WT_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 10, 'type': 'addresses_UC_ht'}}
{'src': {'same': False, 'congruent': 6, 'type': 'addresses_normal_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 2, 'type': 'addresses_normal_ht'}}
{'src': {'same': False, 'congruent': 2, 'type': 'addresses_UC_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 0, 'type': 'addresses_UC_ht'}}
{'src': {'NT': False, 'same': False, 'congruent': 1, 'type': 'addresses_WC_ht', 'AVXalign': False, 'size': 1}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 10, 'type': 'addresses_UC_ht', 'AVXalign': False, 'size': 8}}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 9, 'type': 'addresses_UC_ht', 'AVXalign': False, 'size': 4}}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 2, 'type': 'addresses_WT_ht', 'AVXalign': False, 'size': 4}}
{'src': {'NT': False, 'same': True, 'congruent': 6, 'type': 'addresses_normal_ht', 'AVXalign': False, 'size': 8}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 1, 'type': 'addresses_D_ht', 'AVXalign': False, 'size': 8}}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 2, 'type': 'addresses_A_ht', 'AVXalign': False, 'size': 2}}
{'src': {'NT': False, 'same': True, 'congruent': 5, 'type': 'addresses_WT_ht', 'AVXalign': False, 'size': 8}, 'OP': 'LOAD'}
{'src': {'NT': False, 'same': False, 'congruent': 0, 'type': 'addresses_normal_ht', 'AVXalign': False, 'size': 4}, 'OP': 'LOAD'}
{'54': 21829}
54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54
*/
| 30.33452 | 2,999 | 0.652863 |
da8507dcc8ce5dc0b2b66962fbf1a0eef9a4faf6 | 439 | asm | Assembly | unix-x64/printhex.asm | mazoti/adler32 | a7d27786344277a6fe589ba98c0210d96c88fc8e | [
"BSD-3-Clause"
] | null | null | null | unix-x64/printhex.asm | mazoti/adler32 | a7d27786344277a6fe589ba98c0210d96c88fc8e | [
"BSD-3-Clause"
] | null | null | null | unix-x64/printhex.asm | mazoti/adler32 | a7d27786344277a6fe589ba98c0210d96c88fc8e | [
"BSD-3-Clause"
] | null | null | null | ; void printhex(int stdout_stderr, int number);
global printhex
section .data
hex_table db '0123456789abcdef'
section .text
printhex:
mov rbx,rsp
mov rdx,1 ; write 1 character
divide:
mov rcx,rsi
and rcx,15 ; push mod 16
push rcx
shr rsi,4
jnz divide
print_stack:
mov rax,4 ; write syscall
pop rcx
lea rsi,[rel hex_table+rcx]
syscall
cmp rbx,rsp
jne print_stack
ret
| 14.633333 | 47 | 0.646925 |
335a4441ef30c33d5cad3d5359502e7ca96e5802 | 363 | asm | Assembly | verify/alfy/1_variable_definition/variable_list_with_value.alfy.asm | alexandruradovici/alf-alfy-asm-public | 43a73cc13c38f39125620fb9bd566c261cff1c73 | [
"BSD-2-Clause"
] | null | null | null | verify/alfy/1_variable_definition/variable_list_with_value.alfy.asm | alexandruradovici/alf-alfy-asm-public | 43a73cc13c38f39125620fb9bd566c261cff1c73 | [
"BSD-2-Clause"
] | 2 | 2017-05-18T20:29:57.000Z | 2017-05-19T19:03:07.000Z | verify/alfy/1_variable_definition/variable_list_with_value.alfy.asm | alexandruradovici/alf-alfy-asm-language-public | 43a73cc13c38f39125620fb9bd566c261cff1c73 | [
"BSD-2-Clause"
] | null | null | null |
; script
start:
; attribution
; value int 3
set r2 3
; n: r3
set r3 0
store r3 r2
; attribution
; value real 3.7
set r2 3700
; r: r3
set r3 4
store r3 r2
; attribution
; value logic false
set r2 0
; l: r3
set r3 8
store r3 r2
stop | 16.5 | 27 | 0.435262 |
e449b287a88e69b5759519061cf8c72a7fd34069 | 572 | asm | Assembly | oeis/058/A058344.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/058/A058344.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/058/A058344.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A058344: Difference between the sum of the odd aliquot divisors of n and the sum of the even aliquot divisors of n.
; 0,1,1,-1,1,2,1,-5,4,4,1,-8,1,6,9,-13,1,5,1,-10,11,10,1,-28,6,12,13,-12,1,6,1,-29,15,16,13,-29,1,18,17,-38,1,10,1,-16,33,22,1,-68,8,19,21,-18,1,14,17,-48,23,28,1,-60,1,30,41,-61,19,18,1,-22,27,22,1,-97,1,36,49,-24,19,22,1,-94,40,40,1,-76,23,42,33,-68,1,12,21,-28,35,46,25,-148,1,41,57,-55
mov $4,$0
add $0,1
mov $1,$0
mov $2,$0
sub $4,$0
lpb $1
div $0,$4
mov $3,$2
dif $3,$1
cmp $3,$2
cmp $3,0
mul $3,$1
add $0,$3
sub $1,1
lpe
add $0,1
| 28.6 | 289 | 0.58042 |
9caa289597cc4959510611aae8b514c6ea6e5dcb | 75 | asm | Assembly | Scripts/game/gameplay/play.asm | 1888games/golf | 5078fc0699e5f91a53761cc30526b510d49e955c | [
"BSD-2-Clause"
] | 1 | 2022-02-13T16:09:18.000Z | 2022-02-13T16:09:18.000Z | Scripts/game/gameplay/play.asm | 1888games/golf | 5078fc0699e5f91a53761cc30526b510d49e955c | [
"BSD-2-Clause"
] | null | null | null | Scripts/game/gameplay/play.asm | 1888games/golf | 5078fc0699e5f91a53761cc30526b510d49e955c | [
"BSD-2-Clause"
] | null | null | null | PLAY: {
* = * "-Play"
Init: {
jsr ROUND_MANAGER.Init
rts
}
} | 5.357143 | 24 | 0.466667 |
7983c20492b8ecc3e03fa850049bd4ec80d3b75e | 914 | asm | Assembly | test/test.Array.splitb.asm | richRemer/atlatl | 169c0c9c29d277dc1295e6c37b0963af6e02741a | [
"MIT"
] | null | null | null | test/test.Array.splitb.asm | richRemer/atlatl | 169c0c9c29d277dc1295e6c37b0963af6e02741a | [
"MIT"
] | null | null | null | test/test.Array.splitb.asm | richRemer/atlatl | 169c0c9c29d277dc1295e6c37b0963af6e02741a | [
"MIT"
] | null | null | null | global test_case
extern Array.splitb
extern Array.eachb
extern std.outb
extern std.outln
extern sys.error
%include "Array.inc"
section .text
test_case:
mov rax, test_array ; Array to split
mov rbx, 4 ; delimit with value 4
call Array.splitb ; split into two arrays (plus delimiter)
push qword[rcx+Array.length] ; preserve leftover length
mov rbx, std.outb ; fn to call
call Array.eachb ; print values from array
mov rax, empty_str ; empty message
call std.outln ; end line
pop rax ; restore length
call sys.error ; exit with array length
section .data
test_bytes: db 0x1, 0x2, 0x3, 0x4, 0x5, 0x6
empty_str: db 0x0
test_array:
istruc Array
at Array.pdata, dq test_bytes
at Array.length, dq 6
iend
| 25.388889 | 76 | 0.588621 |
c1e91081ee5426617560e096c1c686c4daf79988 | 469 | asm | Assembly | data/pokemon/base_stats/sinnoh/tangrowth.asm | Dev727/ancientplatinum | 8b212a1728cc32a95743e1538b9eaa0827d013a7 | [
"blessing"
] | null | null | null | data/pokemon/base_stats/sinnoh/tangrowth.asm | Dev727/ancientplatinum | 8b212a1728cc32a95743e1538b9eaa0827d013a7 | [
"blessing"
] | null | null | null | data/pokemon/base_stats/sinnoh/tangrowth.asm | Dev727/ancientplatinum | 8b212a1728cc32a95743e1538b9eaa0827d013a7 | [
"blessing"
] | null | null | null | db 0 ; 465 DEX NO
db 100, 100, 125, 50, 110, 50
; hp atk def spd sat sdf
db GRASS, GRASS ; type
db 30 ; catch rate
db 211 ; base exp
db NO_ITEM, NO_ITEM ; items
db GENDER_F50 ; gender ratio
db 100 ; unknown 1
db 20 ; step cycles to hatch
db 5 ; unknown 2
INCBIN "gfx/pokemon/sinnoh/tangrowth/front.dimensions"
db 0, 0, 0, 0 ; padding
db GROWTH_MEDIUM_FAST ; growth rate
dn EGG_PLANT, EGG_PLANT ; egg groups
; tm/hm learnset
tmhm
; end
| 21.318182 | 55 | 0.667377 |
565d3fd4f8bf4d2bbb0f0ddac73eed3e399ee2be | 1,100 | asm | Assembly | If else programming exercises and solutions in C/3- C program to check whether a number is positive, negative or zero/project.asm | MahmoudFawzy01/C-solutions-Code4win- | 491d86770895ec4c31a69c7e3d47a88dedc4427a | [
"Apache-2.0"
] | null | null | null | If else programming exercises and solutions in C/3- C program to check whether a number is positive, negative or zero/project.asm | MahmoudFawzy01/C-solutions-Code4win- | 491d86770895ec4c31a69c7e3d47a88dedc4427a | [
"Apache-2.0"
] | null | null | null | If else programming exercises and solutions in C/3- C program to check whether a number is positive, negative or zero/project.asm | MahmoudFawzy01/C-solutions-Code4win- | 491d86770895ec4c31a69c7e3d47a88dedc4427a | [
"Apache-2.0"
] | null | null | null | .file "project.c"
.def __main; .scl 2; .type 32; .endef
.section .rdata,"dr"
.LC0:
.ascii "\12Input num1: \0"
.LC1:
.ascii "%d\0"
.LC2:
.ascii "Number is positive.\0"
.LC3:
.ascii "Number is negative.\0"
.LC4:
.ascii "Number is zero.\0"
.text
.globl main
.def main; .scl 2; .type 32; .endef
.seh_proc main
main:
pushq %rbp
.seh_pushreg %rbp
movq %rsp, %rbp
.seh_setframe %rbp, 0
subq $48, %rsp
.seh_stackalloc 48
.seh_endprologue
call __main
leaq .LC0(%rip), %rcx
call printf
leaq -4(%rbp), %rax
movq %rax, %rdx
leaq .LC1(%rip), %rcx
call scanf
movl -4(%rbp), %eax
testl %eax, %eax
jle .L2
leaq .LC2(%rip), %rcx
call puts
jmp .L3
.L2:
movl -4(%rbp), %eax
testl %eax, %eax
jns .L4
leaq .LC3(%rip), %rcx
call puts
jmp .L3
.L4:
leaq .LC4(%rip), %rcx
call puts
.L3:
call getch
movl $0, %eax
addq $48, %rsp
popq %rbp
ret
.seh_endproc
.ident "GCC: (x86_64-posix-seh-rev1, Built by MinGW-W64 project) 6.2.0"
.def printf; .scl 2; .type 32; .endef
.def scanf; .scl 2; .type 32; .endef
.def puts; .scl 2; .type 32; .endef
.def getch; .scl 2; .type 32; .endef
| 18.032787 | 72 | 0.626364 |
841134aef66eaf1e4db76592adc76d3eb50bd16d | 1,000 | asm | Assembly | programs/oeis/014/A014217.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/014/A014217.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/014/A014217.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A014217: a(n) = floor(phi^n), where phi = (1+sqrt(5))/2 is the golden ratio.
; 1,1,2,4,6,11,17,29,46,76,122,199,321,521,842,1364,2206,3571,5777,9349,15126,24476,39602,64079,103681,167761,271442,439204,710646,1149851,1860497,3010349,4870846,7881196,12752042,20633239,33385281,54018521,87403802,141422324,228826126,370248451,599074577,969323029,1568397606,2537720636,4106118242,6643838879,10749957121,17393796001,28143753122,45537549124,73681302246,119218851371,192900153617,312119004989,505019158606,817138163596,1322157322202,2139295485799,3461452808001,5600748293801,9062201101802,14662949395604,23725150497406,38388099893011,62113250390417,100501350283429,162614600673846,263115950957276,425730551631122,688846502588399,1114577054219521,1803423556807921,2918000611027442,4721424167835364,7639424778862806
add $0,1
mov $3,4
lpb $0,1
sub $0,1
trn $2,4
trn $3,3
sub $5,$4
mov $4,$5
add $5,$2
add $2,$1
add $4,2
add $2,$4
add $5,$3
mov $1,$5
add $1,2
mov $5,3
lpe
sub $1,2
| 45.454545 | 729 | 0.788 |
2fe83084c67bcb0373c8e4c68de4ff6007084142 | 13,624 | asm | Assembly | aom_20170505/aom_dsp/x86/halfpix_variance_impl_sse2.asm | rainliu/aom_analyzer | 440652d155140c00a2827512a54103be3d6ff7e4 | [
"MIT"
] | null | null | null | aom_20170505/aom_dsp/x86/halfpix_variance_impl_sse2.asm | rainliu/aom_analyzer | 440652d155140c00a2827512a54103be3d6ff7e4 | [
"MIT"
] | null | null | null | aom_20170505/aom_dsp/x86/halfpix_variance_impl_sse2.asm | rainliu/aom_analyzer | 440652d155140c00a2827512a54103be3d6ff7e4 | [
"MIT"
] | null | null | null | ;
; Copyright (c) 2016, Alliance for Open Media. All rights reserved
;
; This source code is subject to the terms of the BSD 2 Clause License and
; the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License
; was not distributed with this source code in the LICENSE file, you can
; obtain it at www.aomedia.org/license/software. If the Alliance for Open
; Media Patent License 1.0 was not distributed with this source code in the
; PATENTS file, you can obtain it at www.aomedia.org/license/patent.
;
;
%include "aom_ports/x86_abi_support.asm"
;void aom_half_horiz_vert_variance16x_h_sse2(unsigned char *ref,
; int ref_stride,
; unsigned char *src,
; int src_stride,
; unsigned int height,
; int *sum,
; unsigned int *sumsquared)
global sym(aom_half_horiz_vert_variance16x_h_sse2) PRIVATE
sym(aom_half_horiz_vert_variance16x_h_sse2):
push rbp
mov rbp, rsp
SHADOW_ARGS_TO_STACK 7
SAVE_XMM 7
GET_GOT rbx
push rsi
push rdi
; end prolog
pxor xmm6, xmm6 ; error accumulator
pxor xmm7, xmm7 ; sse eaccumulator
mov rsi, arg(0) ;ref
mov rdi, arg(2) ;src
movsxd rcx, dword ptr arg(4) ;height
movsxd rax, dword ptr arg(1) ;ref_stride
movsxd rdx, dword ptr arg(3) ;src_stride
pxor xmm0, xmm0 ;
movdqu xmm5, XMMWORD PTR [rsi]
movdqu xmm3, XMMWORD PTR [rsi+1]
pavgb xmm5, xmm3 ; xmm5 = avg(xmm1,xmm3) horizontal line 1
lea rsi, [rsi + rax]
aom_half_horiz_vert_variance16x_h_1:
movdqu xmm1, XMMWORD PTR [rsi] ;
movdqu xmm2, XMMWORD PTR [rsi+1] ;
pavgb xmm1, xmm2 ; xmm1 = avg(xmm1,xmm3) horizontal line i+1
pavgb xmm5, xmm1 ; xmm = vertical average of the above
movdqa xmm4, xmm5
punpcklbw xmm5, xmm0 ; xmm5 = words of above
punpckhbw xmm4, xmm0
movq xmm3, QWORD PTR [rdi] ; xmm3 = d0,d1,d2..d7
punpcklbw xmm3, xmm0 ; xmm3 = words of above
psubw xmm5, xmm3 ; xmm5 -= xmm3
movq xmm3, QWORD PTR [rdi+8]
punpcklbw xmm3, xmm0
psubw xmm4, xmm3
paddw xmm6, xmm5 ; xmm6 += accumulated column differences
paddw xmm6, xmm4
pmaddwd xmm5, xmm5 ; xmm5 *= xmm5
pmaddwd xmm4, xmm4
paddd xmm7, xmm5 ; xmm7 += accumulated square column differences
paddd xmm7, xmm4
movdqa xmm5, xmm1 ; save xmm1 for use on the next row
lea rsi, [rsi + rax]
lea rdi, [rdi + rdx]
sub rcx, 1 ;
jnz aom_half_horiz_vert_variance16x_h_1 ;
pxor xmm1, xmm1
pxor xmm5, xmm5
punpcklwd xmm0, xmm6
punpckhwd xmm1, xmm6
psrad xmm0, 16
psrad xmm1, 16
paddd xmm0, xmm1
movdqa xmm1, xmm0
movdqa xmm6, xmm7
punpckldq xmm6, xmm5
punpckhdq xmm7, xmm5
paddd xmm6, xmm7
punpckldq xmm0, xmm5
punpckhdq xmm1, xmm5
paddd xmm0, xmm1
movdqa xmm7, xmm6
movdqa xmm1, xmm0
psrldq xmm7, 8
psrldq xmm1, 8
paddd xmm6, xmm7
paddd xmm0, xmm1
mov rsi, arg(5) ;[Sum]
mov rdi, arg(6) ;[SSE]
movd [rsi], xmm0
movd [rdi], xmm6
; begin epilog
pop rdi
pop rsi
RESTORE_GOT
RESTORE_XMM
UNSHADOW_ARGS
pop rbp
ret
;void aom_half_vert_variance16x_h_sse2(unsigned char *ref,
; int ref_stride,
; unsigned char *src,
; int src_stride,
; unsigned int height,
; int *sum,
; unsigned int *sumsquared)
global sym(aom_half_vert_variance16x_h_sse2) PRIVATE
sym(aom_half_vert_variance16x_h_sse2):
push rbp
mov rbp, rsp
SHADOW_ARGS_TO_STACK 7
SAVE_XMM 7
GET_GOT rbx
push rsi
push rdi
; end prolog
pxor xmm6, xmm6 ; error accumulator
pxor xmm7, xmm7 ; sse eaccumulator
mov rsi, arg(0) ;ref
mov rdi, arg(2) ;src
movsxd rcx, dword ptr arg(4) ;height
movsxd rax, dword ptr arg(1) ;ref_stride
movsxd rdx, dword ptr arg(3) ;src_stride
movdqu xmm5, XMMWORD PTR [rsi]
lea rsi, [rsi + rax ]
pxor xmm0, xmm0
aom_half_vert_variance16x_h_1:
movdqu xmm3, XMMWORD PTR [rsi]
pavgb xmm5, xmm3 ; xmm5 = avg(xmm1,xmm3)
movdqa xmm4, xmm5
punpcklbw xmm5, xmm0
punpckhbw xmm4, xmm0
movq xmm2, QWORD PTR [rdi]
punpcklbw xmm2, xmm0
psubw xmm5, xmm2
movq xmm2, QWORD PTR [rdi+8]
punpcklbw xmm2, xmm0
psubw xmm4, xmm2
paddw xmm6, xmm5 ; xmm6 += accumulated column differences
paddw xmm6, xmm4
pmaddwd xmm5, xmm5 ; xmm5 *= xmm5
pmaddwd xmm4, xmm4
paddd xmm7, xmm5 ; xmm7 += accumulated square column differences
paddd xmm7, xmm4
movdqa xmm5, xmm3
lea rsi, [rsi + rax]
lea rdi, [rdi + rdx]
sub rcx, 1
jnz aom_half_vert_variance16x_h_1
pxor xmm1, xmm1
pxor xmm5, xmm5
punpcklwd xmm0, xmm6
punpckhwd xmm1, xmm6
psrad xmm0, 16
psrad xmm1, 16
paddd xmm0, xmm1
movdqa xmm1, xmm0
movdqa xmm6, xmm7
punpckldq xmm6, xmm5
punpckhdq xmm7, xmm5
paddd xmm6, xmm7
punpckldq xmm0, xmm5
punpckhdq xmm1, xmm5
paddd xmm0, xmm1
movdqa xmm7, xmm6
movdqa xmm1, xmm0
psrldq xmm7, 8
psrldq xmm1, 8
paddd xmm6, xmm7
paddd xmm0, xmm1
mov rsi, arg(5) ;[Sum]
mov rdi, arg(6) ;[SSE]
movd [rsi], xmm0
movd [rdi], xmm6
; begin epilog
pop rdi
pop rsi
RESTORE_GOT
RESTORE_XMM
UNSHADOW_ARGS
pop rbp
ret
;void aom_half_horiz_variance16x_h_sse2(unsigned char *ref,
; int ref_stride
; unsigned char *src,
; int src_stride,
; unsigned int height,
; int *sum,
; unsigned int *sumsquared)
global sym(aom_half_horiz_variance16x_h_sse2) PRIVATE
sym(aom_half_horiz_variance16x_h_sse2):
push rbp
mov rbp, rsp
SHADOW_ARGS_TO_STACK 7
SAVE_XMM 7
GET_GOT rbx
push rsi
push rdi
; end prolog
pxor xmm6, xmm6 ; error accumulator
pxor xmm7, xmm7 ; sse eaccumulator
mov rsi, arg(0) ;ref
mov rdi, arg(2) ;src
movsxd rcx, dword ptr arg(4) ;height
movsxd rax, dword ptr arg(1) ;ref_stride
movsxd rdx, dword ptr arg(3) ;src_stride
pxor xmm0, xmm0 ;
aom_half_horiz_variance16x_h_1:
movdqu xmm5, XMMWORD PTR [rsi] ; xmm5 = s0,s1,s2..s15
movdqu xmm3, XMMWORD PTR [rsi+1] ; xmm3 = s1,s2,s3..s16
pavgb xmm5, xmm3 ; xmm5 = avg(xmm1,xmm3)
movdqa xmm1, xmm5
punpcklbw xmm5, xmm0 ; xmm5 = words of above
punpckhbw xmm1, xmm0
movq xmm3, QWORD PTR [rdi] ; xmm3 = d0,d1,d2..d7
punpcklbw xmm3, xmm0 ; xmm3 = words of above
movq xmm2, QWORD PTR [rdi+8]
punpcklbw xmm2, xmm0
psubw xmm5, xmm3 ; xmm5 -= xmm3
psubw xmm1, xmm2
paddw xmm6, xmm5 ; xmm6 += accumulated column differences
paddw xmm6, xmm1
pmaddwd xmm5, xmm5 ; xmm5 *= xmm5
pmaddwd xmm1, xmm1
paddd xmm7, xmm5 ; xmm7 += accumulated square column differences
paddd xmm7, xmm1
lea rsi, [rsi + rax]
lea rdi, [rdi + rdx]
sub rcx, 1 ;
jnz aom_half_horiz_variance16x_h_1 ;
pxor xmm1, xmm1
pxor xmm5, xmm5
punpcklwd xmm0, xmm6
punpckhwd xmm1, xmm6
psrad xmm0, 16
psrad xmm1, 16
paddd xmm0, xmm1
movdqa xmm1, xmm0
movdqa xmm6, xmm7
punpckldq xmm6, xmm5
punpckhdq xmm7, xmm5
paddd xmm6, xmm7
punpckldq xmm0, xmm5
punpckhdq xmm1, xmm5
paddd xmm0, xmm1
movdqa xmm7, xmm6
movdqa xmm1, xmm0
psrldq xmm7, 8
psrldq xmm1, 8
paddd xmm6, xmm7
paddd xmm0, xmm1
mov rsi, arg(5) ;[Sum]
mov rdi, arg(6) ;[SSE]
movd [rsi], xmm0
movd [rdi], xmm6
; begin epilog
pop rdi
pop rsi
RESTORE_GOT
RESTORE_XMM
UNSHADOW_ARGS
pop rbp
ret
SECTION_RODATA
; short xmm_bi_rd[8] = { 64, 64, 64, 64,64, 64, 64, 64};
align 16
xmm_bi_rd:
times 8 dw 64
align 16
aom_bilinear_filters_sse2:
dw 128, 128, 128, 128, 128, 128, 128, 128, 0, 0, 0, 0, 0, 0, 0, 0
dw 112, 112, 112, 112, 112, 112, 112, 112, 16, 16, 16, 16, 16, 16, 16, 16
dw 96, 96, 96, 96, 96, 96, 96, 96, 32, 32, 32, 32, 32, 32, 32, 32
dw 80, 80, 80, 80, 80, 80, 80, 80, 48, 48, 48, 48, 48, 48, 48, 48
dw 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64
dw 48, 48, 48, 48, 48, 48, 48, 48, 80, 80, 80, 80, 80, 80, 80, 80
dw 32, 32, 32, 32, 32, 32, 32, 32, 96, 96, 96, 96, 96, 96, 96, 96
dw 16, 16, 16, 16, 16, 16, 16, 16, 112, 112, 112, 112, 112, 112, 112, 112
| 38.925714 | 109 | 0.388359 |
055262e9ead3933be7857eb1a59a17fe78e2353f | 1,477 | asm | Assembly | programs/oeis/135/A135673.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/135/A135673.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | programs/oeis/135/A135673.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | ; A135673: Ceiling(n + n^(2/3)).
; 2,4,6,7,8,10,11,12,14,15,16,18,19,20,22,23,24,25,27,28,29,30,32,33,34,35,36,38,39,40,41,43,44,45,46,47,49,50,51,52,53,55,56,57,58,59,61,62,63,64,65,66,68,69,70,71,72,73,75,76,77,78,79,80,82,83,84,85,86,87,89,90,91,92,93,94,96,97,98,99,100,101,103,104,105,106,107,108,109,111,112,113,114,115,116,117,119,120,121,122,123,124,125,127,128,129,130,131,132,133,135,136,137,138,139,140,141,143,144,145,146,147,148,149,150,152,153,154,155,156,157,158,160,161,162,163,164,165,166,167,169,170,171,172,173,174,175,176,178,179,180,181,182,183,184,185,187,188,189,190,191,192,193,194,196,197,198,199,200,201,202,203,205,206,207,208,209,210,211,212,213,215,216,217,218,219,220,221,222,224,225,226,227,228,229,230,231,232,234,235,236,237,238,239,240,241,242,244,245,246,247,248,249,250,251,252,254,255,256,257,258,259,260,261,262,264,265,266,267,268,269,270,271,272,274,275,276,277,278,279,280,281,282,284,285,286,287,288,289,290
mov $9,$0
mov $11,$0
add $11,1
lpb $11
mov $0,$9
sub $11,1
sub $0,$11
mov $5,$0
mov $7,2
lpb $7
clr $0,5
mov $0,$5
sub $7,1
add $0,$7
sub $0,1
add $1,1
add $0,$1
pow $0,2
sub $0,1
cal $0,48766 ; Integer part of cube root of n. Or, number of cubes <= n. Or, n appears 3n^2 + 3n + 1 times.
mov $1,$0
mov $8,$7
lpb $8
mov $6,$1
sub $8,1
lpe
lpe
lpb $5
mov $5,1
sub $6,$1
lpe
mov $1,$6
add $1,1
add $10,$1
lpe
mov $1,$10
add $1,1
| 36.02439 | 916 | 0.628301 |
bd34b0d2aaca2466ff1fda1b981fe7fc3336a3d2 | 1,104 | asm | Assembly | programs/oeis/198/A198263.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/198/A198263.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | programs/oeis/198/A198263.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | ; A198263: Ceiling(n*sqrt(8)).
; 0,3,6,9,12,15,17,20,23,26,29,32,34,37,40,43,46,49,51,54,57,60,63,66,68,71,74,77,80,83,85,88,91,94,97,99,102,105,108,111,114,116,119,122,125,128,131,133,136,139,142,145,148,150,153,156,159,162,165,167,170,173,176,179,182,184,187,190,193,196,198,201,204,207,210,213,215,218,221,224,227,230,232,235,238,241,244,247,249,252,255,258,261,264,266,269,272,275,278,281,283,286,289,292,295,297,300,303,306,309,312,314,317,320,323,326,329,331,334,337,340,343,346,348,351,354,357,360,363,365,368,371,374,377,380,382,385,388,391,394,396,399,402,405,408,411,413,416,419,422,425,428,430,433,436,439,442,445,447,450,453,456,459,462,464,467,470,473,476,479,481,484,487,490,493,495,498,501,504,507,510,512,515,518,521,524,527,529,532,535,538,541,544,546,549,552,555,558,561,563,566,569,572,575,577,580,583,586,589,592,594,597,600,603,606,609,611,614,617,620,623,626,628,631,634,637,640,643,645,648,651,654,657,660,662,665,668,671,674,676,679,682,685,688,691,693,696,699,702,705
mul $0,4
pow $0,2
mov $1,1
mov $2,4
lpb $0
sub $0,1
trn $0,$1
add $1,$2
lpe
add $1,$2
sub $1,5
div $1,4
| 69 | 961 | 0.712862 |
7c819cac5ea1ecade764464f9a6501721392d500 | 1,003 | asm | Assembly | books_and_notes/professional_courses/Assembly_language_and_programming/sources/汇编语言程序设计教程第四版/codes/9_3.asm | gxw1/review_the_national_post-graduate_entrance_examination | 8812779a7a4ce185a531d120562d5194b697c0c9 | [
"MIT"
] | 640 | 2019-03-30T11:32:43.000Z | 2022-03-31T14:05:18.000Z | books_and_notes/professional_courses/Assembly_language_and_programming/sources/汇编语言程序设计教程第四版/codes/9_3.asm | yyzVegst/review_the_national_post-graduate_entrance_examination | 8812779a7a4ce185a531d120562d5194b697c0c9 | [
"MIT"
] | 6 | 2019-07-22T01:57:24.000Z | 2022-01-20T15:03:16.000Z | books_and_notes/professional_courses/Assembly_language_and_programming/sources/汇编语言程序设计教程第四版/codes/9_3.asm | yyzVegst/review_the_national_post-graduate_entrance_examination | 8812779a7a4ce185a531d120562d5194b697c0c9 | [
"MIT"
] | 212 | 2019-04-10T02:31:50.000Z | 2022-03-30T02:32:47.000Z | STACK SEGMENT STACK
DW 100 DUP(?)
STACK ENDS
CODE SEGMENT
ASSUME CS:CODE,SS:STACK
START: MOV AH,1
INT 21H
SUB AL,20H
CMP AL,'A'
JB STOP
JZ ZAB
CMP AL,'Z'
JA STOP
JZ YZA
DEC AL
MOV DL,AL
MOV CX,3
AGAIN: CALL DISCH
INC DL
LOOP AGAIN
JMP STOP
ZAB: MOV BL,AL
ADD AL,25
MOV DL,AL
CALL DISCH
MOV DL,BL
CALL DISCH
INC DL
CALL DISCH
JMP STOP
YZA: MOV BL,AL
DEC AL
MOV DL,AL
CALL DISCH
INC DL
CALL DISCH
SUB DL,25
CALL DISCH
STOP: MOV AH,4CH
INT 21H
DISCH PROC NEAR
MOV AH,2
INT 21H
RET
DISCH ENDP
CODE ENDS
END START
| 20.895833 | 33 | 0.376869 |
f3273b2f85b392796edf2a5f5ae870949bc301cf | 168 | asm | Assembly | data/pokemon/dex_entries/slowpoke.asm | AtmaBuster/pokeplat-gen2 | fa83b2e75575949b8f72cb2c48f7a1042e97f70f | [
"blessing"
] | 6 | 2021-06-19T06:41:19.000Z | 2022-02-15T17:12:33.000Z | data/pokemon/dex_entries/slowpoke.asm | AtmaBuster/pokeplat-gen2-old | 01e42c55db5408d72d89133dc84a46c699d849ad | [
"blessing"
] | null | null | null | data/pokemon/dex_entries/slowpoke.asm | AtmaBuster/pokeplat-gen2-old | 01e42c55db5408d72d89133dc84a46c699d849ad | [
"blessing"
] | 3 | 2021-01-15T18:45:40.000Z | 2021-10-16T03:35:27.000Z | db "DOPEY@" ; species name
db "It is always so"
next "absent-minded that"
next "it won't react,"
page "even if its"
next "flavorful tail is"
next "bitten.@"
| 16.8 | 27 | 0.64881 |
273f4094d3cfab27992b2cd686796822249b1ffc | 5,891 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0x84_notsx.log_21829_40.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0x84_notsx.log_21829_40.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0x84_notsx.log_21829_40.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r12
push %r13
push %r15
push %rax
push %rcx
push %rdx
lea addresses_D_ht+0x1cf28, %r15
nop
nop
inc %r12
mov $0x6162636465666768, %rax
movq %rax, %xmm1
movups %xmm1, (%r15)
nop
nop
nop
nop
nop
and $57587, %rdx
lea addresses_UC_ht+0x19aa8, %rcx
nop
nop
nop
and $34837, %r13
movw $0x6162, (%rcx)
nop
nop
nop
xor %rax, %rax
lea addresses_A_ht+0x16028, %r11
nop
nop
nop
nop
cmp %r12, %r12
movl $0x61626364, (%r11)
nop
nop
nop
nop
nop
dec %rdx
pop %rdx
pop %rcx
pop %rax
pop %r15
pop %r13
pop %r12
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r11
push %r12
push %rax
push %rbp
push %rcx
push %rdi
push %rsi
// Store
lea addresses_A+0x8768, %rax
cmp %rdi, %rdi
movl $0x51525354, (%rax)
nop
nop
nop
add $10303, %rsi
// REPMOV
lea addresses_normal+0x8428, %rsi
lea addresses_UC+0xdb28, %rdi
nop
nop
nop
nop
add $63215, %rbp
mov $49, %rcx
rep movsq
nop
nop
nop
nop
and %rsi, %rsi
// Store
lea addresses_PSE+0x2628, %r12
nop
nop
nop
and $9564, %rbp
movb $0x51, (%r12)
nop
nop
nop
nop
nop
sub %rcx, %rcx
// Store
lea addresses_WT+0x13428, %rsi
nop
nop
nop
inc %rbp
movb $0x51, (%rsi)
nop
nop
sub %r11, %r11
// Store
lea addresses_PSE+0xe428, %r10
clflush (%r10)
sub %rbp, %rbp
movb $0x51, (%r10)
nop
nop
nop
cmp %rdi, %rdi
// Faulty Load
lea addresses_normal+0xe828, %rdi
nop
nop
nop
nop
nop
inc %rbp
mov (%rdi), %r11
lea oracles, %rsi
and $0xff, %r11
shlq $12, %r11
mov (%rsi,%r11,1), %r11
pop %rsi
pop %rdi
pop %rcx
pop %rbp
pop %rax
pop %r12
pop %r11
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'src': {'type': 'addresses_normal', 'same': False, 'size': 32, 'congruent': 0, 'NT': True, 'AVXalign': False}, 'OP': 'LOAD'}
{'dst': {'type': 'addresses_A', 'same': False, 'size': 4, 'congruent': 6, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'src': {'type': 'addresses_normal', 'congruent': 8, 'same': False}, 'dst': {'type': 'addresses_UC', 'congruent': 8, 'same': True}, 'OP': 'REPM'}
{'dst': {'type': 'addresses_PSE', 'same': False, 'size': 1, 'congruent': 6, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_WT', 'same': False, 'size': 1, 'congruent': 10, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_PSE', 'same': False, 'size': 1, 'congruent': 10, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
[Faulty Load]
{'src': {'type': 'addresses_normal', 'same': True, 'size': 8, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'dst': {'type': 'addresses_D_ht', 'same': False, 'size': 16, 'congruent': 6, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_UC_ht', 'same': False, 'size': 2, 'congruent': 7, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_A_ht', 'same': False, 'size': 4, 'congruent': 10, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'34': 21829}
34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34
*/
| 35.275449 | 2,999 | 0.656425 |
6b694d9ce2965cab26f631d10e3f09b1d304052a | 3,987 | asm | Assembly | data/tilesets/cinnabar_collision.asm | Trap-Master/spacworld97-thingy | a144827abecacdfec6cdc3baa32098e9290adf70 | [
"blessing"
] | null | null | null | data/tilesets/cinnabar_collision.asm | Trap-Master/spacworld97-thingy | a144827abecacdfec6cdc3baa32098e9290adf70 | [
"blessing"
] | null | null | null | data/tilesets/cinnabar_collision.asm | Trap-Master/spacworld97-thingy | a144827abecacdfec6cdc3baa32098e9290adf70 | [
"blessing"
] | null | null | null | tilecoll FLOOR, FLOOR, FLOOR, FLOOR ; 00
tilecoll FLOOR, FLOOR, FLOOR, FLOOR ; 01
tilecoll FLOOR, FLOOR, FLOOR, FLOOR ; 02
tilecoll FLOOR, FLOOR, FLOOR, FLOOR ; 03
tilecoll WALL, WALL, WALL, WALL ; 04
tilecoll WALL, WALL, DOOR, WALL ; 05
tilecoll WALL, WALL, WALL, WALL ; 06
tilecoll WALL, WALL, WALL, WALL ; 07
tilecoll WALL, WALL, WALL, WALL ; 08
tilecoll WALL, WALL, WALL, WALL ; 09
tilecoll WALL, WALL, WALL, DOOR ; 0a
tilecoll WALL, WALL, WALL, WALL ; 0b
tilecoll WALL, WALL, WALL, WALL ; 0c
tilecoll WALL, WALL, WALL, DOOR ; 0d
tilecoll WALL, WALL, WALL, WALL ; 0e
tilecoll WALL, WALL, WALL, WALL ; 0f
tilecoll WALL, WALL, WALL, WALL ; 10
tilecoll WALL, WALL, DOOR, WALL ; 11
tilecoll WALL, WALL, WALL, WALL ; 12
tilecoll WALL, WALL, WALL, WALL ; 13
tilecoll WALL, WALL, WALL, DOOR ; 14
tilecoll WALL, WALL, WALL, WALL ; 15
tilecoll WALL, WALL, WALL, WALL ; 16
tilecoll WALL, WALL, WALL, WALL ; 17
tilecoll WALL, WALL, WALL, WALL ; 18
tilecoll WALL, WALL, WALL, WALL ; 19
tilecoll WALL, WALL, WALL, WALL ; 1a
tilecoll WALL, WALL, WALL, WALL ; 1b
tilecoll WALL, WALL, WALL, WALL ; 1c
tilecoll WALL, WALL, WALL, DOOR ; 1d
tilecoll WALL, WALL, DOOR, WALL ; 1e
tilecoll WALL, WALL, WALL, WALL ; 1f
tilecoll WALL, WALL, WALL, WALL ; 20
tilecoll WALL, WALL, WALL, WALL ; 21
tilecoll FLOOR, FLOOR, FLOOR, FLOOR ; 22
tilecoll FLOOR, FLOOR, FLOOR, FLOOR ; 23
tilecoll FLOOR, FLOOR, FLOOR, FLOOR ; 24
tilecoll FLOOR, FLOOR, FLOOR, FLOOR ; 25
tilecoll FLOOR, FLOOR, FLOOR, FLOOR ; 26
tilecoll FLOOR, FLOOR, FLOOR, FLOOR ; 27
tilecoll FLOOR, FLOOR, FLOOR, FLOOR ; 28
tilecoll FLOOR, FLOOR, FLOOR, FLOOR ; 29
tilecoll FLOOR, FLOOR, FLOOR, FLOOR ; 2a
tilecoll WATER, WATER, WATER, WATER ; 2b
tilecoll WALL, WALL, WALL, DOOR ; 2c
tilecoll WALL, WALL, WALL, WALL ; 2d
tilecoll FLOOR, FLOOR, FLOOR, FLOOR ; 2e
tilecoll HOP_DOWN, HOP_DOWN, WALL, WALL ; 2f
tilecoll WATER, WATER, WATER, WATER ; 30
tilecoll WATER, WATER, WATER, WATER ; 31
tilecoll WATER, WATER, WATER, WATER ; 32
tilecoll FLOOR, FLOOR, FLOOR, FLOOR ; 33
tilecoll WATER, WATER, WATER, WATER ; 34
tilecoll WATER, WATER, WATER, WATER ; 35
tilecoll WATER, WATER, WATER, WATER ; 36
tilecoll WATER, WATER, WATER, WATER ; 37
tilecoll WATER, WATER, WATER, WATER ; 38
tilecoll FLOOR, FLOOR, FLOOR, FLOOR ; 39
tilecoll FLOOR, FLOOR, FLOOR, FLOOR ; 3a
tilecoll WALL, WALL, WALL, WALL ; 3b
tilecoll WALL, HOP_DOWN_LEFT, WALL, WALL ; 3c
tilecoll HOP_DOWN_RIGHT, WALL, WALL, WALL ; 3d
tilecoll WALL, WALL, WALL, WALL ; 3e
tilecoll WALL, WALL, WALL, WALL ; 3f
tilecoll FLOOR, FLOOR, FLOOR, FLOOR ; 40
tilecoll FLOOR, HOP_DOWN, FLOOR, WALL ; 41
tilecoll WALL, WALL, WALL, WALL ; 42
tilecoll FLOOR, FLOOR, WALL, FLOOR ; 43
tilecoll WALL, FLOOR, WALL, FLOOR ; 44
tilecoll HOP_RIGHT, WALL, HOP_RIGHT, WALL ; 45
tilecoll FLOOR, FLOOR, FLOOR, WALL ; 46
tilecoll FLOOR, FLOOR, FLOOR, FLOOR ; 47
tilecoll FLOOR, FLOOR, FLOOR, FLOOR ; 48
tilecoll WALL, WALL, WALL, WALL ; 49
tilecoll WALL, WALL, WALL, WALL ; 4a
tilecoll WALL, WALL, WALL, WALL ; 4b
tilecoll WALL, WALL, WALL, WALL ; 4c
tilecoll WALL, WALL, WALL, WALL ; 4d
tilecoll WALL, WALL, WALL, WALL ; 4e
tilecoll WALL, WALL, WALL, WALL ; 4f
tilecoll WALL, WALL, WALL, WALL ; 50
tilecoll WALL, WALL, WALL, WALL ; 51
tilecoll WALL, WALL, WALL, WALL ; 52
tilecoll WALL, WALL, WALL, WALL ; 53
tilecoll WALL, WALL, WALL, WALL ; 54
tilecoll WALL, WALL, WALL, WALL ; 55
tilecoll WALL, WALL, WALL, WALL ; 56
tilecoll FLOOR, WALL, FLOOR, CUT_TREE ; 57
tilecoll FLOOR, WALL, FLOOR, WALL ; 58
tilecoll WALL, FLOOR, WALL, FLOOR ; 59
tilecoll CUT_TREE, FLOOR, FLOOR, CUT_TREE ; 5a
tilecoll FLOOR, CUT_TREE, FLOOR, FLOOR ; 5b
tilecoll CUT_TREE, CUT_TREE, FLOOR, FLOOR ; 5c
tilecoll FLOOR, CUT_TREE, CUT_TREE, FLOOR ; 5d
tilecoll FLOOR, FLOOR, CUT_TREE, FLOOR ; 5e
tilecoll WALL, WALL, WALL, WALL ; 5f
tilecoll WALL, WALL, WALL, WALL ; 60
tilecoll WALL, WALL, WALL, WALL ; 61
tilecoll FLOOR, FLOOR, FLOOR, FLOOR ; 62
| 39.87 | 47 | 0.702032 |
37ea87ab21463867dfc47a6f7a05e02c4e1ffc7f | 341 | asm | Assembly | programs/oeis/111/A111648.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/111/A111648.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/111/A111648.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A111648: a(n) = A001541(n)^2 + A001653(n)^2 + A002315(n)^2.
; 3,83,2811,95483,3243603,110187011,3743114763,127155714923,4319551192611,146737584833843,4984758333158043,169335045742539611,5752406796913188723,195412496049305876963
seq $0,38762 ; a(n) = 6*a(n-1) - a(n-2) for n >= 2, with a(0)=3, a(1)=13.
pow $0,2
sub $0,9
div $0,2
add $0,3
| 37.888889 | 167 | 0.709677 |
8c94df4da911d834988f60373b47f3960029885a | 627 | asm | Assembly | oeis/100/A100178.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/100/A100178.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/100/A100178.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A100178: Structured hexagonal diamond numbers (vertex structure 5).
; 1,8,29,72,145,256,413,624,897,1240,1661,2168,2769,3472,4285,5216,6273,7464,8797,10280,11921,13728,15709,17872,20225,22776,25533,28504,31697,35120,38781,42688,46849,51272,55965,60936,66193,71744,77597,83760,90241,97048,104189,111672,119505,127696,136253,145184,154497,164200,174301,184808,195729,207072,218845,231056,243713,256824,270397,284440,298961,313968,329469,345472,361985,379016,396573,414664,433297,452480,472221,492528,513409,534872,556925,579576,602833,626704,651197,676320,702081,728488
mul $0,4
add $0,4
mov $1,$0
bin $0,3
add $0,$1
div $0,8
| 62.7 | 499 | 0.800638 |
0e42bd208eea589803186be20308448fe136c16b | 210 | asm | Assembly | src/test/resources/data/searchtests/opt-test3.asm | cpcitor/mdlz80optimizer | 75070d984e1f08474e6d397c7e0eb66d8be0c432 | [
"Apache-2.0"
] | 36 | 2020-06-29T06:52:26.000Z | 2022-02-10T19:41:58.000Z | src/test/resources/data/searchtests/opt-test3.asm | cpcitor/mdlz80optimizer | 75070d984e1f08474e6d397c7e0eb66d8be0c432 | [
"Apache-2.0"
] | 39 | 2020-07-02T18:19:34.000Z | 2022-03-27T18:08:54.000Z | src/test/resources/data/searchtests/opt-test3.asm | cpcitor/mdlz80optimizer | 75070d984e1f08474e6d397c7e0eb66d8be0c432 | [
"Apache-2.0"
] | 7 | 2020-07-02T06:00:05.000Z | 2021-11-28T17:31:13.000Z | org #4000
call f1
loop:
jr loop
f1:
ld a, b
or d
or c
jr nz, label1
ld l, 0
jr label2
label1:
ld a, b
cp c
ret
label2:
ld a, b
or d
or e
ret
| 8.076923 | 17 | 0.438095 |
0ef90a33dbf11f8606bf553d9cabbc74344e2e2e | 5,871 | asm | Assembly | Transynther/x86/_processed/NC/_zr_/i7-8650U_0xd2.log_21829_1415.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NC/_zr_/i7-8650U_0xd2.log_21829_1415.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NC/_zr_/i7-8650U_0xd2.log_21829_1415.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r12
push %r13
push %r15
push %rcx
push %rdi
push %rsi
lea addresses_A_ht+0x795d, %r15
nop
dec %r10
mov $0x6162636465666768, %r12
movq %r12, %xmm6
movups %xmm6, (%r15)
nop
nop
inc %r13
lea addresses_normal_ht+0x191e9, %rsi
lea addresses_D_ht+0x130bd, %rdi
sub $9763, %r10
mov $67, %rcx
rep movsl
nop
xor $2937, %rsi
pop %rsi
pop %rdi
pop %rcx
pop %r15
pop %r13
pop %r12
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r12
push %r8
push %rax
push %rbp
push %rbx
push %rdi
// Store
mov $0x70d, %r11
nop
nop
add %rdi, %rdi
movb $0x51, (%r11)
nop
nop
nop
nop
and %rax, %rax
// Store
lea addresses_WC+0x325d, %rax
nop
nop
nop
nop
nop
sub %r12, %r12
mov $0x5152535455565758, %rdi
movq %rdi, (%rax)
nop
nop
nop
add $4463, %r8
// Store
lea addresses_UC+0x10cdd, %r12
nop
nop
nop
nop
nop
xor $16626, %r11
mov $0x5152535455565758, %r8
movq %r8, (%r12)
add $705, %rbx
// Load
lea addresses_RW+0x3de5, %r12
nop
nop
nop
nop
nop
and $5492, %rbp
mov (%r12), %rdi
nop
nop
nop
sub $33838, %rbx
// Load
lea addresses_WC+0x86a1, %r11
nop
nop
nop
nop
nop
and %rax, %rax
movb (%r11), %r12b
nop
nop
nop
sub %r8, %r8
// Store
lea addresses_D+0x1d15d, %r11
nop
nop
nop
nop
nop
and $18495, %rdi
movl $0x51525354, (%r11)
nop
nop
nop
nop
and $13265, %rdi
// Faulty Load
mov $0x4a1fbb000000095d, %rax
nop
nop
nop
dec %rbp
mov (%rax), %r12w
lea oracles, %rax
and $0xff, %r12
shlq $12, %r12
mov (%rax,%r12,1), %r12
pop %rdi
pop %rbx
pop %rbp
pop %rax
pop %r8
pop %r12
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'type': 'addresses_NC', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_P', 'size': 1, 'AVXalign': True, 'NT': False, 'congruent': 4, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WC', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 8, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_UC', 'size': 8, 'AVXalign': True, 'NT': False, 'congruent': 5, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_RW', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 3, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_WC', 'size': 1, 'AVXalign': False, 'NT': False, 'congruent': 1, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_D', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 11, 'same': False}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'type': 'addresses_NC', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': True}}
<gen_prepare_buffer>
{'OP': 'STOR', 'dst': {'type': 'addresses_A_ht', 'size': 16, 'AVXalign': False, 'NT': False, 'congruent': 11, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_normal_ht', 'congruent': 2, 'same': False}, 'dst': {'type': 'addresses_D_ht', 'congruent': 5, 'same': False}}
{'00': 21829}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
| 35.581818 | 2,999 | 0.654233 |
4d31830da7fc714dbc08d07687c0ce931e8d8de9 | 895 | asm | Assembly | programs/oeis/314/A314205.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/314/A314205.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | programs/oeis/314/A314205.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | ; A314205: Coordination sequence Gal.5.133.5 where G.u.t.v denotes the coordination sequence for a vertex of type v in tiling number t in the Galebach list of u-uniform tilings.
; 1,5,11,17,22,26,31,37,43,48,53,59,65,70,74,79,85,91,96,101,107,113,118,122,127,133,139,144,149,155,161,166,170,175,181,187,192,197,203,209,214,218,223,229,235,240,245,251,257,262
mov $2,$0
add $2,1
mov $5,$0
lpb $2
mov $0,$5
sub $2,1
sub $0,$2
mov $3,$0
mov $7,2
lpb $7
mov $0,$3
sub $7,1
add $0,$7
sub $0,1
mul $0,2
cal $0,312975 ; Coordination sequence Gal.5.110.2 where G.u.t.v denotes the coordination sequence for a vertex of type v in tiling number t in the Galebach list of u-uniform tilings.
add $0,4
mov $4,$0
mov $6,$7
lpb $6
sub $6,1
mov $8,$4
lpe
lpe
lpb $3
mov $3,0
sub $8,$4
lpe
mov $4,$8
sub $4,4
add $1,$4
lpe
| 24.861111 | 186 | 0.620112 |
394409342b3e677bea8ec6d8071e8210e0a2a17b | 588 | asm | Assembly | src/hook_deploy_pfx_ninja.asm | szapp/Ninja | 7b018a5aa82bdb9f1eadea910ed1ff4711d4485a | [
"MIT"
] | 17 | 2018-07-11T20:53:46.000Z | 2022-03-01T18:20:42.000Z | src/hook_deploy_pfx_ninja.asm | szapp/Ninja | 7b018a5aa82bdb9f1eadea910ed1ff4711d4485a | [
"MIT"
] | 24 | 2018-10-23T07:47:33.000Z | 2021-02-09T09:06:25.000Z | src/hook_deploy_pfx_ninja.asm | szapp/Ninja | 7b018a5aa82bdb9f1eadea910ed1ff4711d4485a | [
"MIT"
] | null | null | null | ; Hook PFX parser in zCParticleFX::ParseParticleFXScript
%include "inc/macros.inc"
%if GOTHIC_BASE_VERSION == 1
%include "inc/symbols_g1.inc"
%elif GOTHIC_BASE_VERSION == 2
%include "inc/symbols_g2.inc"
%endif
%ifidn __OUTPUT_FORMAT__, bin
org g1g2(0x58CA22,0x5AC7BC)
%endif
bits 32
section .text align=1 ; Prevent auto-alignment
jmp deploy_pfx_ninja
; Overwrites
; resetStackoffset g1g2(0x8C,0xC8)
; lea eax, [esp+stackoffset+g1g2(-0x79,-0xB5)]
; push eax
| 22.615385 | 99 | 0.605442 |
f7086d6f5b921925feb05d37f00cfeb443c43dcf | 1,451 | asm | Assembly | programs/oeis/073/A073929.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/073/A073929.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/073/A073929.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A073929: a(1) = 1, a(n) = smallest number not included earlier such that the n-th partial sum (n>1) is divisible by n+1.
; 1,2,5,7,3,10,4,13,15,6,18,20,8,23,9,26,28,11,31,12,34,36,14,39,41,16,44,17,47,49,19,52,54,21,57,22,60,62,24,65,25,68,70,27,73,75,29,78,30,81,83,32,86,33,89,91,35,94,96,37,99,38,102,104,40,107,109,42,112,43,115,117,45,120,46,123,125,48,128,130,50,133,51,136,138,53,141,143,55,146,56,149,151,58,154,59,157,159,61,162,164,63,167,64,170,172,66,175,67,178,180,69,183,185,71,188,72,191,193,74,196,198,76,201,77,204,206,79,209,80,212,214,82,217,219,84,222,85,225,227,87,230,88,233,235,90,238,240,92,243,93,246,248,95,251,253,97,256,98,259,261,100,264,101,267,269,103,272,274,105,277,106,280,282,108,285,287,110,290,111,293,295,113,298,114,301,303,116,306,308,118,311,119,314,316,121,319,122,322,324,124,327,329,126,332,127,335,337,129,340,342,131,345,132,348,350,134,353,135,356,358,137,361,363,139,366,140,369,371,142,374,376,144,379,145,382,384,147,387,148,390,392,150,395,397,152,400,153,403,405
mov $4,2
mov $5,$0
lpb $4,1
mov $0,$5
sub $4,1
add $0,$4
add $3,5
cal $0,19445 ; Form a permutation of the positive integers, p_1, p_2, ..., such that the average of each initial segment is an integer, using the greedy algorithm to define p_n; sequence gives p_1+..+p_n.
trn $3,$0
sub $0,$3
sub $0,1
mov $2,$4
mov $6,$0
lpb $2,1
mov $1,$6
sub $2,1
lpe
lpe
lpb $5,1
sub $1,$6
mov $5,0
lpe
sub $1,1
| 53.740741 | 893 | 0.678842 |
1e8ad7e2176beb38269d8130db19ff50cbb24e84 | 407 | asm | Assembly | programs/oeis/192/A192466.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/192/A192466.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/192/A192466.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A192466: Coefficient of x in the reduction by x^2->x+2 of the polynomial p(n,x)=1+x^n+x^(2n).
; 2,6,24,90,352,1386,5504,21930,87552,349866,1398784,5593770,22372352,89483946,357924864,1431677610,5726666752,22906579626,91626143744,366504225450,1466016202752,5864063412906,23456250855424,93824997829290
add $0,3
mov $1,4
mov $2,2
pow $2,$0
add $1,$2
mul $1,$2
div $1,16
sub $1,6
div $1,3
add $1,2
mov $0,$1
| 27.133333 | 205 | 0.739558 |
ee2e46ca2dc2941a16e5db5282909a7a651c1571 | 80 | asm | Assembly | data/maps/headers/PewterNidoranHouse.asm | opiter09/ASM-Machina | 75d8e457b3e82cc7a99b8e70ada643ab02863ada | [
"CC0-1.0"
] | 1 | 2022-02-15T00:19:44.000Z | 2022-02-15T00:19:44.000Z | data/maps/headers/PewterNidoranHouse.asm | opiter09/ASM-Machina | 75d8e457b3e82cc7a99b8e70ada643ab02863ada | [
"CC0-1.0"
] | null | null | null | data/maps/headers/PewterNidoranHouse.asm | opiter09/ASM-Machina | 75d8e457b3e82cc7a99b8e70ada643ab02863ada | [
"CC0-1.0"
] | null | null | null |
map_header PewterNidoranHouse, PEWTER_NIDORAN_HOUSE, HOUSE, 0
end_map_header
| 20 | 62 | 0.85 |
3c2aa1708083cd3363112f3517857bafff6162e5 | 37,041 | asm | Assembly | uprogs/echo.asm | zhiyihuang/xv6_rpi_port | 6dc126f558d0a9aecb60db92cf516d7597944689 | [
"MIT"
] | 36 | 2015-03-19T09:26:31.000Z | 2021-09-23T09:04:44.000Z | uprogs/echo.asm | zhiyihuang/xv6_rpi_port | 6dc126f558d0a9aecb60db92cf516d7597944689 | [
"MIT"
] | 4 | 2015-04-21T00:14:20.000Z | 2020-07-06T06:03:03.000Z | uprogs/echo.asm | zhiyihuang/xv6_rpi_port | 6dc126f558d0a9aecb60db92cf516d7597944689 | [
"MIT"
] | 15 | 2015-10-31T10:31:01.000Z | 2019-10-12T01:45:17.000Z |
_echo: file format elf32-littlearm
Disassembly of section .text:
00000000 <main>:
int
main(int argc, char *argv[])
{
int i;
for(i = 1; i < argc; i++)
0: e3500001 cmp r0, #1
#include "stat.h"
#include "user.h"
int
main(int argc, char *argv[])
{
4: e92d4878 push {r3, r4, r5, r6, fp, lr}
8: e1a06000 mov r6, r0
c: e28db014 add fp, sp, #20
int i;
for(i = 1; i < argc; i++)
10: da000011 ble 5c <main+0x5c>
14: e3a04001 mov r4, #1
18: e1a05001 mov r5, r1
printf(1, "%s%s", argv[i], i+1 < argc ? " " : "\n");
1c: e2844001 add r4, r4, #1
20: e1540006 cmp r4, r6
24: e5b52004 ldr r2, [r5, #4]!
28: e3a00001 mov r0, #1
2c: e59f102c ldr r1, [pc, #44] ; 60 <main+0x60>
30: 0a000007 beq 54 <main+0x54>
34: e59f3028 ldr r3, [pc, #40] ; 64 <main+0x64>
38: e2844001 add r4, r4, #1
3c: eb000205 bl 858 <printf>
40: e1540006 cmp r4, r6
44: e5b52004 ldr r2, [r5, #4]!
48: e3a00001 mov r0, #1
4c: e59f100c ldr r1, [pc, #12] ; 60 <main+0x60>
50: 1afffff7 bne 34 <main+0x34>
54: e59f300c ldr r3, [pc, #12] ; 68 <main+0x68>
58: eb0001fe bl 858 <printf>
exit();
5c: eb0000aa bl 30c <exit>
60: 00000b40 .word 0x00000b40
64: 00000b48 .word 0x00000b48
68: 00000b4c .word 0x00000b4c
0000006c <strcpy>:
#include "user.h"
#include "arm.h"
char*
strcpy(char *s, char *t)
{
6c: e52db004 push {fp} ; (str fp, [sp, #-4]!)
char *os;
os = s;
while((*s++ = *t++) != 0)
70: e1a02000 mov r2, r0
#include "user.h"
#include "arm.h"
char*
strcpy(char *s, char *t)
{
74: e28db000 add fp, sp, #0
char *os;
os = s;
while((*s++ = *t++) != 0)
78: e4d13001 ldrb r3, [r1], #1
7c: e3530000 cmp r3, #0
80: e4c23001 strb r3, [r2], #1
84: 1afffffb bne 78 <strcpy+0xc>
;
return os;
}
88: e28bd000 add sp, fp, #0
8c: e8bd0800 pop {fp}
90: e12fff1e bx lr
00000094 <strcmp>:
int
strcmp(const char *p, const char *q)
{
94: e52db004 push {fp} ; (str fp, [sp, #-4]!)
98: e28db000 add fp, sp, #0
while(*p && *p == *q)
9c: e5d03000 ldrb r3, [r0]
a0: e5d12000 ldrb r2, [r1]
a4: e3530000 cmp r3, #0
a8: 1a000004 bne c0 <strcmp+0x2c>
ac: ea000005 b c8 <strcmp+0x34>
b0: e5f03001 ldrb r3, [r0, #1]!
b4: e3530000 cmp r3, #0
b8: 0a000006 beq d8 <strcmp+0x44>
bc: e5f12001 ldrb r2, [r1, #1]!
c0: e1530002 cmp r3, r2
c4: 0afffff9 beq b0 <strcmp+0x1c>
p++, q++;
return (uchar)*p - (uchar)*q;
}
c8: e0620003 rsb r0, r2, r3
cc: e28bd000 add sp, fp, #0
d0: e8bd0800 pop {fp}
d4: e12fff1e bx lr
}
int
strcmp(const char *p, const char *q)
{
while(*p && *p == *q)
d8: e5d12001 ldrb r2, [r1, #1]
dc: eafffff9 b c8 <strcmp+0x34>
000000e0 <strlen>:
return (uchar)*p - (uchar)*q;
}
uint
strlen(char *s)
{
e0: e52db004 push {fp} ; (str fp, [sp, #-4]!)
e4: e28db000 add fp, sp, #0
int n;
for(n = 0; s[n]; n++)
e8: e5d03000 ldrb r3, [r0]
ec: e3530000 cmp r3, #0
f0: 01a00003 moveq r0, r3
f4: 0a000006 beq 114 <strlen+0x34>
f8: e1a02000 mov r2, r0
fc: e3a03000 mov r3, #0
100: e5f21001 ldrb r1, [r2, #1]!
104: e2833001 add r3, r3, #1
108: e1a00003 mov r0, r3
10c: e3510000 cmp r1, #0
110: 1afffffa bne 100 <strlen+0x20>
;
return n;
}
114: e28bd000 add sp, fp, #0
118: e8bd0800 pop {fp}
11c: e12fff1e bx lr
00000120 <memset>:
memset(void *dst, int c, uint n)
{
char *p=dst;
u32 rc=n;
while (rc-- > 0) *p++ = c;
120: e3520000 cmp r2, #0
return n;
}
void*
memset(void *dst, int c, uint n)
{
124: e52db004 push {fp} ; (str fp, [sp, #-4]!)
128: e28db000 add fp, sp, #0
char *p=dst;
u32 rc=n;
while (rc-- > 0) *p++ = c;
12c: 0a000006 beq 14c <memset+0x2c>
130: e6ef1071 uxtb r1, r1
134: e1a03002 mov r3, r2
}
void*
memset(void *dst, int c, uint n)
{
char *p=dst;
138: e1a0c000 mov ip, r0
u32 rc=n;
while (rc-- > 0) *p++ = c;
13c: e2533001 subs r3, r3, #1
140: e4cc1001 strb r1, [ip], #1
144: 1afffffc bne 13c <memset+0x1c>
148: e0800002 add r0, r0, r2
return (void *)p;
}
14c: e28bd000 add sp, fp, #0
150: e8bd0800 pop {fp}
154: e12fff1e bx lr
00000158 <strchr>:
char*
strchr(const char *s, char c)
{
158: e52db004 push {fp} ; (str fp, [sp, #-4]!)
15c: e28db000 add fp, sp, #0
for(; *s; s++)
160: e5d03000 ldrb r3, [r0]
164: e3530000 cmp r3, #0
168: 1a000004 bne 180 <strchr+0x28>
16c: ea000008 b 194 <strchr+0x3c>
170: e5d03001 ldrb r3, [r0, #1]
174: e2800001 add r0, r0, #1
178: e3530000 cmp r3, #0
17c: 0a000004 beq 194 <strchr+0x3c>
if(*s == c)
180: e1530001 cmp r3, r1
184: 1afffff9 bne 170 <strchr+0x18>
return (char*)s;
return 0;
}
188: e28bd000 add sp, fp, #0
18c: e8bd0800 pop {fp}
190: e12fff1e bx lr
strchr(const char *s, char c)
{
for(; *s; s++)
if(*s == c)
return (char*)s;
return 0;
194: e1a00003 mov r0, r3
198: eafffffa b 188 <strchr+0x30>
0000019c <gets>:
}
char*
gets(char *buf, int max)
{
19c: e92d49f0 push {r4, r5, r6, r7, r8, fp, lr}
1a0: e28db018 add fp, sp, #24
1a4: e24dd00c sub sp, sp, #12
1a8: e1a08000 mov r8, r0
1ac: e1a07001 mov r7, r1
int i, cc;
char c;
for(i=0; i+1 < max; ){
1b0: e1a06000 mov r6, r0
1b4: e3a05000 mov r5, #0
1b8: ea000008 b 1e0 <gets+0x44>
cc = read(0, &c, 1);
1bc: eb000079 bl 3a8 <read>
if(cc < 1)
1c0: e3500000 cmp r0, #0
1c4: da00000b ble 1f8 <gets+0x5c>
break;
buf[i++] = c;
1c8: e55b301d ldrb r3, [fp, #-29]
if(c == '\n' || c == '\r')
1cc: e1a05004 mov r5, r4
1d0: e353000a cmp r3, #10
1d4: 1353000d cmpne r3, #13
for(i=0; i+1 < max; ){
cc = read(0, &c, 1);
if(cc < 1)
break;
buf[i++] = c;
1d8: e4c63001 strb r3, [r6], #1
if(c == '\n' || c == '\r')
1dc: 0a00000a beq 20c <gets+0x70>
{
int i, cc;
char c;
for(i=0; i+1 < max; ){
cc = read(0, &c, 1);
1e0: e3a02001 mov r2, #1
gets(char *buf, int max)
{
int i, cc;
char c;
for(i=0; i+1 < max; ){
1e4: e0854002 add r4, r5, r2
1e8: e1540007 cmp r4, r7
cc = read(0, &c, 1);
1ec: e3a00000 mov r0, #0
1f0: e24b101d sub r1, fp, #29
gets(char *buf, int max)
{
int i, cc;
char c;
for(i=0; i+1 < max; ){
1f4: bafffff0 blt 1bc <gets+0x20>
break;
buf[i++] = c;
if(c == '\n' || c == '\r')
break;
}
buf[i] = '\0';
1f8: e3a03000 mov r3, #0
1fc: e7c83005 strb r3, [r8, r5]
return buf;
}
200: e1a00008 mov r0, r8
204: e24bd018 sub sp, fp, #24
208: e8bd89f0 pop {r4, r5, r6, r7, r8, fp, pc}
gets(char *buf, int max)
{
int i, cc;
char c;
for(i=0; i+1 < max; ){
20c: e1a05004 mov r5, r4
210: eafffff8 b 1f8 <gets+0x5c>
00000214 <stat>:
return buf;
}
int
stat(char *n, struct stat *st)
{
214: e92d4830 push {r4, r5, fp, lr}
218: e1a05001 mov r5, r1
21c: e28db00c add fp, sp, #12
int fd;
int r;
fd = open(n, O_RDONLY);
220: e3a01000 mov r1, #0
224: eb0000a0 bl 4ac <open>
if(fd < 0)
228: e2504000 subs r4, r0, #0
return -1;
22c: b3e05000 mvnlt r5, #0
{
int fd;
int r;
fd = open(n, O_RDONLY);
if(fd < 0)
230: ba000004 blt 248 <stat+0x34>
return -1;
r = fstat(fd, st);
234: e1a01005 mov r1, r5
238: eb0000c2 bl 548 <fstat>
23c: e1a05000 mov r5, r0
close(fd);
240: e1a00004 mov r0, r4
244: eb000071 bl 410 <close>
return r;
}
248: e1a00005 mov r0, r5
24c: e8bd8830 pop {r4, r5, fp, pc}
00000250 <atoi>:
int
atoi(const char *s)
{
250: e52db004 push {fp} ; (str fp, [sp, #-4]!)
254: e28db000 add fp, sp, #0
int n;
n = 0;
while('0' <= *s && *s <= '9')
258: e5d03000 ldrb r3, [r0]
25c: e2432030 sub r2, r3, #48 ; 0x30
260: e6ef2072 uxtb r2, r2
264: e3520009 cmp r2, #9
int
atoi(const char *s)
{
int n;
n = 0;
268: 83a00000 movhi r0, #0
while('0' <= *s && *s <= '9')
26c: 8a000009 bhi 298 <atoi+0x48>
270: e1a02000 mov r2, r0
int
atoi(const char *s)
{
int n;
n = 0;
274: e3a00000 mov r0, #0
while('0' <= *s && *s <= '9')
n = n*10 + *s++ - '0';
278: e0800100 add r0, r0, r0, lsl #2
27c: e0830080 add r0, r3, r0, lsl #1
atoi(const char *s)
{
int n;
n = 0;
while('0' <= *s && *s <= '9')
280: e5f23001 ldrb r3, [r2, #1]!
n = n*10 + *s++ - '0';
284: e2400030 sub r0, r0, #48 ; 0x30
atoi(const char *s)
{
int n;
n = 0;
while('0' <= *s && *s <= '9')
288: e2431030 sub r1, r3, #48 ; 0x30
28c: e6ef1071 uxtb r1, r1
290: e3510009 cmp r1, #9
294: 9afffff7 bls 278 <atoi+0x28>
n = n*10 + *s++ - '0';
return n;
}
298: e28bd000 add sp, fp, #0
29c: e8bd0800 pop {fp}
2a0: e12fff1e bx lr
000002a4 <memmove>:
{
char *dst, *src;
dst = vdst;
src = vsrc;
while(n-- > 0)
2a4: e3520000 cmp r2, #0
return n;
}
void*
memmove(void *vdst, void *vsrc, int n)
{
2a8: e52db004 push {fp} ; (str fp, [sp, #-4]!)
2ac: e28db000 add fp, sp, #0
char *dst, *src;
dst = vdst;
src = vsrc;
while(n-- > 0)
2b0: da000005 ble 2cc <memmove+0x28>
n = n*10 + *s++ - '0';
return n;
}
void*
memmove(void *vdst, void *vsrc, int n)
2b4: e0802002 add r2, r0, r2
{
char *dst, *src;
dst = vdst;
2b8: e1a03000 mov r3, r0
src = vsrc;
while(n-- > 0)
*dst++ = *src++;
2bc: e4d1c001 ldrb ip, [r1], #1
2c0: e4c3c001 strb ip, [r3], #1
{
char *dst, *src;
dst = vdst;
src = vsrc;
while(n-- > 0)
2c4: e1530002 cmp r3, r2
2c8: 1afffffb bne 2bc <memmove+0x18>
*dst++ = *src++;
return vdst;
}
2cc: e28bd000 add sp, fp, #0
2d0: e8bd0800 pop {fp}
2d4: e12fff1e bx lr
000002d8 <fork>:
2d8: e92d4000 push {lr}
2dc: e92d0008 push {r3}
2e0: e92d0004 push {r2}
2e4: e92d0002 push {r1}
2e8: e92d0001 push {r0}
2ec: e3a00001 mov r0, #1
2f0: ef000040 svc 0x00000040
2f4: e8bd0002 pop {r1}
2f8: e8bd0002 pop {r1}
2fc: e8bd0004 pop {r2}
300: e8bd0008 pop {r3}
304: e8bd4000 pop {lr}
308: e12fff1e bx lr
0000030c <exit>:
30c: e92d4000 push {lr}
310: e92d0008 push {r3}
314: e92d0004 push {r2}
318: e92d0002 push {r1}
31c: e92d0001 push {r0}
320: e3a00002 mov r0, #2
324: ef000040 svc 0x00000040
328: e8bd0002 pop {r1}
32c: e8bd0002 pop {r1}
330: e8bd0004 pop {r2}
334: e8bd0008 pop {r3}
338: e8bd4000 pop {lr}
33c: e12fff1e bx lr
00000340 <wait>:
340: e92d4000 push {lr}
344: e92d0008 push {r3}
348: e92d0004 push {r2}
34c: e92d0002 push {r1}
350: e92d0001 push {r0}
354: e3a00003 mov r0, #3
358: ef000040 svc 0x00000040
35c: e8bd0002 pop {r1}
360: e8bd0002 pop {r1}
364: e8bd0004 pop {r2}
368: e8bd0008 pop {r3}
36c: e8bd4000 pop {lr}
370: e12fff1e bx lr
00000374 <pipe>:
374: e92d4000 push {lr}
378: e92d0008 push {r3}
37c: e92d0004 push {r2}
380: e92d0002 push {r1}
384: e92d0001 push {r0}
388: e3a00004 mov r0, #4
38c: ef000040 svc 0x00000040
390: e8bd0002 pop {r1}
394: e8bd0002 pop {r1}
398: e8bd0004 pop {r2}
39c: e8bd0008 pop {r3}
3a0: e8bd4000 pop {lr}
3a4: e12fff1e bx lr
000003a8 <read>:
3a8: e92d4000 push {lr}
3ac: e92d0008 push {r3}
3b0: e92d0004 push {r2}
3b4: e92d0002 push {r1}
3b8: e92d0001 push {r0}
3bc: e3a00005 mov r0, #5
3c0: ef000040 svc 0x00000040
3c4: e8bd0002 pop {r1}
3c8: e8bd0002 pop {r1}
3cc: e8bd0004 pop {r2}
3d0: e8bd0008 pop {r3}
3d4: e8bd4000 pop {lr}
3d8: e12fff1e bx lr
000003dc <write>:
3dc: e92d4000 push {lr}
3e0: e92d0008 push {r3}
3e4: e92d0004 push {r2}
3e8: e92d0002 push {r1}
3ec: e92d0001 push {r0}
3f0: e3a00010 mov r0, #16
3f4: ef000040 svc 0x00000040
3f8: e8bd0002 pop {r1}
3fc: e8bd0002 pop {r1}
400: e8bd0004 pop {r2}
404: e8bd0008 pop {r3}
408: e8bd4000 pop {lr}
40c: e12fff1e bx lr
00000410 <close>:
410: e92d4000 push {lr}
414: e92d0008 push {r3}
418: e92d0004 push {r2}
41c: e92d0002 push {r1}
420: e92d0001 push {r0}
424: e3a00015 mov r0, #21
428: ef000040 svc 0x00000040
42c: e8bd0002 pop {r1}
430: e8bd0002 pop {r1}
434: e8bd0004 pop {r2}
438: e8bd0008 pop {r3}
43c: e8bd4000 pop {lr}
440: e12fff1e bx lr
00000444 <kill>:
444: e92d4000 push {lr}
448: e92d0008 push {r3}
44c: e92d0004 push {r2}
450: e92d0002 push {r1}
454: e92d0001 push {r0}
458: e3a00006 mov r0, #6
45c: ef000040 svc 0x00000040
460: e8bd0002 pop {r1}
464: e8bd0002 pop {r1}
468: e8bd0004 pop {r2}
46c: e8bd0008 pop {r3}
470: e8bd4000 pop {lr}
474: e12fff1e bx lr
00000478 <exec>:
478: e92d4000 push {lr}
47c: e92d0008 push {r3}
480: e92d0004 push {r2}
484: e92d0002 push {r1}
488: e92d0001 push {r0}
48c: e3a00007 mov r0, #7
490: ef000040 svc 0x00000040
494: e8bd0002 pop {r1}
498: e8bd0002 pop {r1}
49c: e8bd0004 pop {r2}
4a0: e8bd0008 pop {r3}
4a4: e8bd4000 pop {lr}
4a8: e12fff1e bx lr
000004ac <open>:
4ac: e92d4000 push {lr}
4b0: e92d0008 push {r3}
4b4: e92d0004 push {r2}
4b8: e92d0002 push {r1}
4bc: e92d0001 push {r0}
4c0: e3a0000f mov r0, #15
4c4: ef000040 svc 0x00000040
4c8: e8bd0002 pop {r1}
4cc: e8bd0002 pop {r1}
4d0: e8bd0004 pop {r2}
4d4: e8bd0008 pop {r3}
4d8: e8bd4000 pop {lr}
4dc: e12fff1e bx lr
000004e0 <mknod>:
4e0: e92d4000 push {lr}
4e4: e92d0008 push {r3}
4e8: e92d0004 push {r2}
4ec: e92d0002 push {r1}
4f0: e92d0001 push {r0}
4f4: e3a00011 mov r0, #17
4f8: ef000040 svc 0x00000040
4fc: e8bd0002 pop {r1}
500: e8bd0002 pop {r1}
504: e8bd0004 pop {r2}
508: e8bd0008 pop {r3}
50c: e8bd4000 pop {lr}
510: e12fff1e bx lr
00000514 <unlink>:
514: e92d4000 push {lr}
518: e92d0008 push {r3}
51c: e92d0004 push {r2}
520: e92d0002 push {r1}
524: e92d0001 push {r0}
528: e3a00012 mov r0, #18
52c: ef000040 svc 0x00000040
530: e8bd0002 pop {r1}
534: e8bd0002 pop {r1}
538: e8bd0004 pop {r2}
53c: e8bd0008 pop {r3}
540: e8bd4000 pop {lr}
544: e12fff1e bx lr
00000548 <fstat>:
548: e92d4000 push {lr}
54c: e92d0008 push {r3}
550: e92d0004 push {r2}
554: e92d0002 push {r1}
558: e92d0001 push {r0}
55c: e3a00008 mov r0, #8
560: ef000040 svc 0x00000040
564: e8bd0002 pop {r1}
568: e8bd0002 pop {r1}
56c: e8bd0004 pop {r2}
570: e8bd0008 pop {r3}
574: e8bd4000 pop {lr}
578: e12fff1e bx lr
0000057c <link>:
57c: e92d4000 push {lr}
580: e92d0008 push {r3}
584: e92d0004 push {r2}
588: e92d0002 push {r1}
58c: e92d0001 push {r0}
590: e3a00013 mov r0, #19
594: ef000040 svc 0x00000040
598: e8bd0002 pop {r1}
59c: e8bd0002 pop {r1}
5a0: e8bd0004 pop {r2}
5a4: e8bd0008 pop {r3}
5a8: e8bd4000 pop {lr}
5ac: e12fff1e bx lr
000005b0 <mkdir>:
5b0: e92d4000 push {lr}
5b4: e92d0008 push {r3}
5b8: e92d0004 push {r2}
5bc: e92d0002 push {r1}
5c0: e92d0001 push {r0}
5c4: e3a00014 mov r0, #20
5c8: ef000040 svc 0x00000040
5cc: e8bd0002 pop {r1}
5d0: e8bd0002 pop {r1}
5d4: e8bd0004 pop {r2}
5d8: e8bd0008 pop {r3}
5dc: e8bd4000 pop {lr}
5e0: e12fff1e bx lr
000005e4 <chdir>:
5e4: e92d4000 push {lr}
5e8: e92d0008 push {r3}
5ec: e92d0004 push {r2}
5f0: e92d0002 push {r1}
5f4: e92d0001 push {r0}
5f8: e3a00009 mov r0, #9
5fc: ef000040 svc 0x00000040
600: e8bd0002 pop {r1}
604: e8bd0002 pop {r1}
608: e8bd0004 pop {r2}
60c: e8bd0008 pop {r3}
610: e8bd4000 pop {lr}
614: e12fff1e bx lr
00000618 <dup>:
618: e92d4000 push {lr}
61c: e92d0008 push {r3}
620: e92d0004 push {r2}
624: e92d0002 push {r1}
628: e92d0001 push {r0}
62c: e3a0000a mov r0, #10
630: ef000040 svc 0x00000040
634: e8bd0002 pop {r1}
638: e8bd0002 pop {r1}
63c: e8bd0004 pop {r2}
640: e8bd0008 pop {r3}
644: e8bd4000 pop {lr}
648: e12fff1e bx lr
0000064c <getpid>:
64c: e92d4000 push {lr}
650: e92d0008 push {r3}
654: e92d0004 push {r2}
658: e92d0002 push {r1}
65c: e92d0001 push {r0}
660: e3a0000b mov r0, #11
664: ef000040 svc 0x00000040
668: e8bd0002 pop {r1}
66c: e8bd0002 pop {r1}
670: e8bd0004 pop {r2}
674: e8bd0008 pop {r3}
678: e8bd4000 pop {lr}
67c: e12fff1e bx lr
00000680 <sbrk>:
680: e92d4000 push {lr}
684: e92d0008 push {r3}
688: e92d0004 push {r2}
68c: e92d0002 push {r1}
690: e92d0001 push {r0}
694: e3a0000c mov r0, #12
698: ef000040 svc 0x00000040
69c: e8bd0002 pop {r1}
6a0: e8bd0002 pop {r1}
6a4: e8bd0004 pop {r2}
6a8: e8bd0008 pop {r3}
6ac: e8bd4000 pop {lr}
6b0: e12fff1e bx lr
000006b4 <sleep>:
6b4: e92d4000 push {lr}
6b8: e92d0008 push {r3}
6bc: e92d0004 push {r2}
6c0: e92d0002 push {r1}
6c4: e92d0001 push {r0}
6c8: e3a0000d mov r0, #13
6cc: ef000040 svc 0x00000040
6d0: e8bd0002 pop {r1}
6d4: e8bd0002 pop {r1}
6d8: e8bd0004 pop {r2}
6dc: e8bd0008 pop {r3}
6e0: e8bd4000 pop {lr}
6e4: e12fff1e bx lr
000006e8 <uptime>:
6e8: e92d4000 push {lr}
6ec: e92d0008 push {r3}
6f0: e92d0004 push {r2}
6f4: e92d0002 push {r1}
6f8: e92d0001 push {r0}
6fc: e3a0000e mov r0, #14
700: ef000040 svc 0x00000040
704: e8bd0002 pop {r1}
708: e8bd0002 pop {r1}
70c: e8bd0004 pop {r2}
710: e8bd0008 pop {r3}
714: e8bd4000 pop {lr}
718: e12fff1e bx lr
0000071c <putc>:
#include "stat.h"
#include "user.h"
static void
putc(int fd, char c)
{
71c: e92d4800 push {fp, lr}
720: e28db004 add fp, sp, #4
724: e24b3004 sub r3, fp, #4
728: e24dd008 sub sp, sp, #8
write(fd, &c, 1);
72c: e3a02001 mov r2, #1
#include "stat.h"
#include "user.h"
static void
putc(int fd, char c)
{
730: e5631001 strb r1, [r3, #-1]!
write(fd, &c, 1);
734: e1a01003 mov r1, r3
738: ebffff27 bl 3dc <write>
}
73c: e24bd004 sub sp, fp, #4
740: e8bd8800 pop {fp, pc}
00000744 <printint>:
return q;
}
static void
printint(int fd, int xx, int base, int sgn)
{
744: e92d4ff0 push {r4, r5, r6, r7, r8, r9, sl, fp, lr}
748: e1a04000 mov r4, r0
char buf[16];
int i, neg;
uint x, y, b;
neg = 0;
if(sgn && xx < 0){
74c: e1a00fa1 lsr r0, r1, #31
750: e3530000 cmp r3, #0
754: 03a03000 moveq r3, #0
758: 12003001 andne r3, r0, #1
return q;
}
static void
printint(int fd, int xx, int base, int sgn)
{
75c: e28db020 add fp, sp, #32
char buf[16];
int i, neg;
uint x, y, b;
neg = 0;
if(sgn && xx < 0){
760: e3530000 cmp r3, #0
return q;
}
static void
printint(int fd, int xx, int base, int sgn)
{
764: e24dd014 sub sp, sp, #20
768: e59f909c ldr r9, [pc, #156] ; 80c <printint+0xc8>
uint x, y, b;
neg = 0;
if(sgn && xx < 0){
neg = 1;
x = -xx;
76c: 12611000 rsbne r1, r1, #0
int i, neg;
uint x, y, b;
neg = 0;
if(sgn && xx < 0){
neg = 1;
770: 13a03001 movne r3, #1
} else {
x = xx;
}
b = base;
i = 0;
774: e3a0a000 mov sl, #0
778: e24b6034 sub r6, fp, #52 ; 0x34
for(i=31;i>=0;i--){
r = r << 1;
r = r | ((n >> i) & 1);
if(r >= d) {
r = r - d;
q = q | (1 << i);
77c: e3a08001 mov r8, #1
write(fd, &c, 1);
}
u32 div(u32 n, u32 d) // long division
{
u32 q=0, r=0;
780: e3a07000 mov r7, #0
int i;
for(i=31;i>=0;i--){
784: e3a0001f mov r0, #31
write(fd, &c, 1);
}
u32 div(u32 n, u32 d) // long division
{
u32 q=0, r=0;
788: e1a0c007 mov ip, r7
int i;
for(i=31;i>=0;i--){
r = r << 1;
r = r | ((n >> i) & 1);
78c: e1a0e031 lsr lr, r1, r0
790: e20ee001 and lr, lr, #1
794: e18ec08c orr ip, lr, ip, lsl #1
if(r >= d) {
798: e152000c cmp r2, ip
r = r - d;
q = q | (1 << i);
79c: 91877018 orrls r7, r7, r8, lsl r0
for(i=31;i>=0;i--){
r = r << 1;
r = r | ((n >> i) & 1);
if(r >= d) {
r = r - d;
7a0: 9062c00c rsbls ip, r2, ip
u32 div(u32 n, u32 d) // long division
{
u32 q=0, r=0;
int i;
for(i=31;i>=0;i--){
7a4: e2500001 subs r0, r0, #1
7a8: 2afffff7 bcs 78c <printint+0x48>
b = base;
i = 0;
do{
y = div(x, b);
buf[i++] = digits[x - y * b];
7ac: e0000792 mul r0, r2, r7
}while((x = y) != 0);
7b0: e3570000 cmp r7, #0
b = base;
i = 0;
do{
y = div(x, b);
buf[i++] = digits[x - y * b];
7b4: e0601001 rsb r1, r0, r1
7b8: e28a5001 add r5, sl, #1
7bc: e7d91001 ldrb r1, [r9, r1]
7c0: e7c6100a strb r1, [r6, sl]
}while((x = y) != 0);
7c4: 11a01007 movne r1, r7
b = base;
i = 0;
do{
y = div(x, b);
buf[i++] = digits[x - y * b];
7c8: 11a0a005 movne sl, r5
7cc: 1affffeb bne 780 <printint+0x3c>
}while((x = y) != 0);
if(neg)
7d0: e3530000 cmp r3, #0
buf[i++] = '-';
7d4: 124b2024 subne r2, fp, #36 ; 0x24
7d8: 10823005 addne r3, r2, r5
7dc: 128a5002 addne r5, sl, #2
while(--i >= 0)
7e0: e2455001 sub r5, r5, #1
do{
y = div(x, b);
buf[i++] = digits[x - y * b];
}while((x = y) != 0);
if(neg)
buf[i++] = '-';
7e4: 13a0202d movne r2, #45 ; 0x2d
7e8: 15432010 strbne r2, [r3, #-16]
while(--i >= 0)
putc(fd, buf[i]);
7ec: e7d61005 ldrb r1, [r6, r5]
7f0: e1a00004 mov r0, r4
buf[i++] = digits[x - y * b];
}while((x = y) != 0);
if(neg)
buf[i++] = '-';
while(--i >= 0)
7f4: e2455001 sub r5, r5, #1
putc(fd, buf[i]);
7f8: ebffffc7 bl 71c <putc>
buf[i++] = digits[x - y * b];
}while((x = y) != 0);
if(neg)
buf[i++] = '-';
while(--i >= 0)
7fc: e3750001 cmn r5, #1
800: 1afffff9 bne 7ec <printint+0xa8>
putc(fd, buf[i]);
}
804: e24bd020 sub sp, fp, #32
808: e8bd8ff0 pop {r4, r5, r6, r7, r8, r9, sl, fp, pc}
80c: 00000b50 .word 0x00000b50
00000810 <div>:
write(fd, &c, 1);
}
u32 div(u32 n, u32 d) // long division
{
u32 q=0, r=0;
810: e3a03000 mov r3, #0
{
write(fd, &c, 1);
}
u32 div(u32 n, u32 d) // long division
{
814: e92d0830 push {r4, r5, fp}
818: e1a02000 mov r2, r0
81c: e28db008 add fp, sp, #8
u32 q=0, r=0;
int i;
for(i=31;i>=0;i--){
820: e3a0c01f mov ip, #31
write(fd, &c, 1);
}
u32 div(u32 n, u32 d) // long division
{
u32 q=0, r=0;
824: e1a00003 mov r0, r3
for(i=31;i>=0;i--){
r = r << 1;
r = r | ((n >> i) & 1);
if(r >= d) {
r = r - d;
q = q | (1 << i);
828: e3a05001 mov r5, #1
u32 q=0, r=0;
int i;
for(i=31;i>=0;i--){
r = r << 1;
r = r | ((n >> i) & 1);
82c: e1a04c32 lsr r4, r2, ip
830: e2044001 and r4, r4, #1
834: e1843083 orr r3, r4, r3, lsl #1
if(r >= d) {
838: e1530001 cmp r3, r1
r = r - d;
q = q | (1 << i);
83c: 21800c15 orrcs r0, r0, r5, lsl ip
for(i=31;i>=0;i--){
r = r << 1;
r = r | ((n >> i) & 1);
if(r >= d) {
r = r - d;
840: 20613003 rsbcs r3, r1, r3
u32 div(u32 n, u32 d) // long division
{
u32 q=0, r=0;
int i;
for(i=31;i>=0;i--){
844: e25cc001 subs ip, ip, #1
848: 2afffff7 bcs 82c <div+0x1c>
r = r - d;
q = q | (1 << i);
}
}
return q;
}
84c: e24bd008 sub sp, fp, #8
850: e8bd0830 pop {r4, r5, fp}
854: e12fff1e bx lr
00000858 <printf>:
}
// Print to the given fd. Only understands %d, %x, %p, %s.
void
printf(int fd, char *fmt, ...)
{
858: e92d000e push {r1, r2, r3}
85c: e92d4ff0 push {r4, r5, r6, r7, r8, r9, sl, fp, lr}
860: e28db020 add fp, sp, #32
864: e1a05000 mov r5, r0
int c, i, state;
uint *ap;
state = 0;
ap = (uint*)(void*)&fmt + 1;
for(i = 0; fmt[i]; i++){
868: e59b4004 ldr r4, [fp, #4]
86c: e5d48000 ldrb r8, [r4]
870: e3580000 cmp r8, #0
874: 0a000027 beq 918 <printf+0xc0>
ap++;
} else if(c == 's'){
s = (char*)*ap;
ap++;
if(s == 0)
s = "(null)";
878: e59f712c ldr r7, [pc, #300] ; 9ac <printf+0x154>
char *s;
int c, i, state;
uint *ap;
state = 0;
ap = (uint*)(void*)&fmt + 1;
87c: e28b6008 add r6, fp, #8
{
char *s;
int c, i, state;
uint *ap;
state = 0;
880: e3a0a000 mov sl, #0
884: ea000008 b 8ac <printf+0x54>
ap = (uint*)(void*)&fmt + 1;
for(i = 0; fmt[i]; i++){
c = fmt[i] & 0xff;
if(state == 0){
if(c == '%'){
888: e3580025 cmp r8, #37 ; 0x25
state = '%';
88c: 01a0a008 moveq sl, r8
state = 0;
ap = (uint*)(void*)&fmt + 1;
for(i = 0; fmt[i]; i++){
c = fmt[i] & 0xff;
if(state == 0){
if(c == '%'){
890: 0a000002 beq 8a0 <printf+0x48>
state = '%';
} else {
putc(fd, c);
894: e1a00005 mov r0, r5
898: e1a01008 mov r1, r8
89c: ebffff9e bl 71c <putc>
int c, i, state;
uint *ap;
state = 0;
ap = (uint*)(void*)&fmt + 1;
for(i = 0; fmt[i]; i++){
8a0: e5f48001 ldrb r8, [r4, #1]!
8a4: e3580000 cmp r8, #0
8a8: 0a00001a beq 918 <printf+0xc0>
c = fmt[i] & 0xff;
if(state == 0){
8ac: e35a0000 cmp sl, #0
8b0: 0afffff4 beq 888 <printf+0x30>
if(c == '%'){
state = '%';
} else {
putc(fd, c);
}
} else if(state == '%'){
8b4: e35a0025 cmp sl, #37 ; 0x25
8b8: 1afffff8 bne 8a0 <printf+0x48>
if(c == 'd'){
8bc: e3580064 cmp r8, #100 ; 0x64
8c0: 0a00002c beq 978 <printf+0x120>
printint(fd, *ap, 10, 1);
ap++;
} else if(c == 'x' || c == 'p'){
8c4: e3580078 cmp r8, #120 ; 0x78
8c8: 13580070 cmpne r8, #112 ; 0x70
8cc: 13a09000 movne r9, #0
8d0: 03a09001 moveq r9, #1
8d4: 0a000013 beq 928 <printf+0xd0>
printint(fd, *ap, 16, 0);
ap++;
} else if(c == 's'){
8d8: e3580073 cmp r8, #115 ; 0x73
8dc: 0a000018 beq 944 <printf+0xec>
s = "(null)";
while(*s != 0){
putc(fd, *s);
s++;
}
} else if(c == 'c'){
8e0: e3580063 cmp r8, #99 ; 0x63
8e4: 0a00002a beq 994 <printf+0x13c>
putc(fd, *ap);
ap++;
} else if(c == '%'){
8e8: e3580025 cmp r8, #37 ; 0x25
putc(fd, c);
8ec: e1a0100a mov r1, sl
8f0: e1a00005 mov r0, r5
s++;
}
} else if(c == 'c'){
putc(fd, *ap);
ap++;
} else if(c == '%'){
8f4: 0a000002 beq 904 <printf+0xac>
putc(fd, c);
} else {
// Unknown % sequence. Print it to draw attention.
putc(fd, '%');
8f8: ebffff87 bl 71c <putc>
putc(fd, c);
8fc: e1a00005 mov r0, r5
900: e1a01008 mov r1, r8
904: ebffff84 bl 71c <putc>
int c, i, state;
uint *ap;
state = 0;
ap = (uint*)(void*)&fmt + 1;
for(i = 0; fmt[i]; i++){
908: e5f48001 ldrb r8, [r4, #1]!
} else {
// Unknown % sequence. Print it to draw attention.
putc(fd, '%');
putc(fd, c);
}
state = 0;
90c: e1a0a009 mov sl, r9
int c, i, state;
uint *ap;
state = 0;
ap = (uint*)(void*)&fmt + 1;
for(i = 0; fmt[i]; i++){
910: e3580000 cmp r8, #0
914: 1affffe4 bne 8ac <printf+0x54>
putc(fd, c);
}
state = 0;
}
}
}
918: e24bd020 sub sp, fp, #32
91c: e8bd4ff0 pop {r4, r5, r6, r7, r8, r9, sl, fp, lr}
920: e28dd00c add sp, sp, #12
924: e12fff1e bx lr
} else if(state == '%'){
if(c == 'd'){
printint(fd, *ap, 10, 1);
ap++;
} else if(c == 'x' || c == 'p'){
printint(fd, *ap, 16, 0);
928: e1a00005 mov r0, r5
92c: e4961004 ldr r1, [r6], #4
930: e3a02010 mov r2, #16
934: e3a03000 mov r3, #0
938: ebffff81 bl 744 <printint>
} else {
// Unknown % sequence. Print it to draw attention.
putc(fd, '%');
putc(fd, c);
}
state = 0;
93c: e3a0a000 mov sl, #0
940: eaffffd6 b 8a0 <printf+0x48>
ap++;
} else if(c == 'x' || c == 'p'){
printint(fd, *ap, 16, 0);
ap++;
} else if(c == 's'){
s = (char*)*ap;
944: e4968004 ldr r8, [r6], #4
ap++;
if(s == 0)
s = "(null)";
948: e3580000 cmp r8, #0
94c: 01a08007 moveq r8, r7
while(*s != 0){
950: e5d81000 ldrb r1, [r8]
954: e3510000 cmp r1, #0
958: 0a000004 beq 970 <printf+0x118>
putc(fd, *s);
95c: e1a00005 mov r0, r5
960: ebffff6d bl 71c <putc>
} else if(c == 's'){
s = (char*)*ap;
ap++;
if(s == 0)
s = "(null)";
while(*s != 0){
964: e5f81001 ldrb r1, [r8, #1]!
968: e3510000 cmp r1, #0
96c: 1afffffa bne 95c <printf+0x104>
} else {
// Unknown % sequence. Print it to draw attention.
putc(fd, '%');
putc(fd, c);
}
state = 0;
970: e1a0a001 mov sl, r1
974: eaffffc9 b 8a0 <printf+0x48>
} else {
putc(fd, c);
}
} else if(state == '%'){
if(c == 'd'){
printint(fd, *ap, 10, 1);
978: e1a00005 mov r0, r5
97c: e4961004 ldr r1, [r6], #4
980: e3a0200a mov r2, #10
984: e3a03001 mov r3, #1
988: ebffff6d bl 744 <printint>
} else {
// Unknown % sequence. Print it to draw attention.
putc(fd, '%');
putc(fd, c);
}
state = 0;
98c: e3a0a000 mov sl, #0
990: eaffffc2 b 8a0 <printf+0x48>
while(*s != 0){
putc(fd, *s);
s++;
}
} else if(c == 'c'){
putc(fd, *ap);
994: e4961004 ldr r1, [r6], #4
998: e1a00005 mov r0, r5
} else {
// Unknown % sequence. Print it to draw attention.
putc(fd, '%');
putc(fd, c);
}
state = 0;
99c: e1a0a009 mov sl, r9
while(*s != 0){
putc(fd, *s);
s++;
}
} else if(c == 'c'){
putc(fd, *ap);
9a0: e6ef1071 uxtb r1, r1
9a4: ebffff5c bl 71c <putc>
9a8: eaffffbc b 8a0 <printf+0x48>
9ac: 00000b64 .word 0x00000b64
000009b0 <free>:
free(void *ap)
{
Header *bp, *p;
bp = (Header*)ap - 1;
for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr)
9b0: e59f3098 ldr r3, [pc, #152] ; a50 <free+0xa0>
static Header base;
static Header *freep;
void
free(void *ap)
{
9b4: e92d0830 push {r4, r5, fp}
Header *bp, *p;
bp = (Header*)ap - 1;
9b8: e240c008 sub ip, r0, #8
for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr)
9bc: e5932000 ldr r2, [r3]
static Header base;
static Header *freep;
void
free(void *ap)
{
9c0: e28db008 add fp, sp, #8
Header *bp, *p;
bp = (Header*)ap - 1;
for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr)
9c4: e152000c cmp r2, ip
9c8: e5921000 ldr r1, [r2]
9cc: 2a000001 bcs 9d8 <free+0x28>
9d0: e15c0001 cmp ip, r1
9d4: 3a000007 bcc 9f8 <free+0x48>
if(p >= p->s.ptr && (bp > p || bp < p->s.ptr))
9d8: e1520001 cmp r2, r1
9dc: 3a000003 bcc 9f0 <free+0x40>
9e0: e152000c cmp r2, ip
9e4: 3a000003 bcc 9f8 <free+0x48>
9e8: e15c0001 cmp ip, r1
9ec: 3a000001 bcc 9f8 <free+0x48>
static Header base;
static Header *freep;
void
free(void *ap)
{
9f0: e1a02001 mov r2, r1
9f4: eafffff2 b 9c4 <free+0x14>
bp = (Header*)ap - 1;
for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr)
if(p >= p->s.ptr && (bp > p || bp < p->s.ptr))
break;
if(bp + bp->s.size == p->s.ptr){
9f8: e5104004 ldr r4, [r0, #-4]
if(p + p->s.size == bp){
p->s.size += bp->s.size;
p->s.ptr = bp->s.ptr;
} else
p->s.ptr = bp;
freep = p;
9fc: e5832000 str r2, [r3]
bp = (Header*)ap - 1;
for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr)
if(p >= p->s.ptr && (bp > p || bp < p->s.ptr))
break;
if(bp + bp->s.size == p->s.ptr){
a00: e08c5184 add r5, ip, r4, lsl #3
a04: e1550001 cmp r5, r1
bp->s.size += p->s.ptr->s.size;
a08: 05911004 ldreq r1, [r1, #4]
a0c: 00814004 addeq r4, r1, r4
a10: 05004004 streq r4, [r0, #-4]
bp->s.ptr = p->s.ptr->s.ptr;
a14: 05921000 ldreq r1, [r2]
a18: 05911000 ldreq r1, [r1]
} else
bp->s.ptr = p->s.ptr;
a1c: e5001008 str r1, [r0, #-8]
if(p + p->s.size == bp){
a20: e5921004 ldr r1, [r2, #4]
a24: e0824181 add r4, r2, r1, lsl #3
a28: e15c0004 cmp ip, r4
p->s.size += bp->s.size;
p->s.ptr = bp->s.ptr;
} else
p->s.ptr = bp;
a2c: 1582c000 strne ip, [r2]
bp->s.size += p->s.ptr->s.size;
bp->s.ptr = p->s.ptr->s.ptr;
} else
bp->s.ptr = p->s.ptr;
if(p + p->s.size == bp){
p->s.size += bp->s.size;
a30: 0510c004 ldreq ip, [r0, #-4]
a34: 008c1001 addeq r1, ip, r1
a38: 05821004 streq r1, [r2, #4]
p->s.ptr = bp->s.ptr;
a3c: 05101008 ldreq r1, [r0, #-8]
a40: 05821000 streq r1, [r2]
} else
p->s.ptr = bp;
freep = p;
}
a44: e24bd008 sub sp, fp, #8
a48: e8bd0830 pop {r4, r5, fp}
a4c: e12fff1e bx lr
a50: 00000b6c .word 0x00000b6c
00000a54 <malloc>:
return freep;
}
void*
malloc(uint nbytes)
{
a54: e92d49f8 push {r3, r4, r5, r6, r7, r8, fp, lr}
Header *p, *prevp;
uint nunits;
nunits = (nbytes + sizeof(Header) - 1)/sizeof(Header) + 1;
a58: e2804007 add r4, r0, #7
if((prevp = freep) == 0){
a5c: e59f50d4 ldr r5, [pc, #212] ; b38 <malloc+0xe4>
malloc(uint nbytes)
{
Header *p, *prevp;
uint nunits;
nunits = (nbytes + sizeof(Header) - 1)/sizeof(Header) + 1;
a60: e1a041a4 lsr r4, r4, #3
return freep;
}
void*
malloc(uint nbytes)
{
a64: e28db01c add fp, sp, #28
Header *p, *prevp;
uint nunits;
nunits = (nbytes + sizeof(Header) - 1)/sizeof(Header) + 1;
if((prevp = freep) == 0){
a68: e5953000 ldr r3, [r5]
malloc(uint nbytes)
{
Header *p, *prevp;
uint nunits;
nunits = (nbytes + sizeof(Header) - 1)/sizeof(Header) + 1;
a6c: e2844001 add r4, r4, #1
if((prevp = freep) == 0){
a70: e3530000 cmp r3, #0
a74: 0a00002b beq b28 <malloc+0xd4>
a78: e5930000 ldr r0, [r3]
a7c: e5902004 ldr r2, [r0, #4]
base.s.ptr = freep = prevp = &base;
base.s.size = 0;
}
for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){
if(p->s.size >= nunits){
a80: e1520004 cmp r2, r4
a84: 2a00001b bcs af8 <malloc+0xa4>
morecore(uint nu)
{
char *p;
Header *hp;
if(nu < 4096)
a88: e59f80ac ldr r8, [pc, #172] ; b3c <malloc+0xe8>
p->s.size -= nunits;
p += p->s.size;
p->s.size = nunits;
}
freep = prevp;
return (void*)(p + 1);
a8c: e1a07184 lsl r7, r4, #3
a90: ea000003 b aa4 <malloc+0x50>
nunits = (nbytes + sizeof(Header) - 1)/sizeof(Header) + 1;
if((prevp = freep) == 0){
base.s.ptr = freep = prevp = &base;
base.s.size = 0;
}
for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){
a94: e5930000 ldr r0, [r3]
if(p->s.size >= nunits){
a98: e5902004 ldr r2, [r0, #4]
a9c: e1540002 cmp r4, r2
aa0: 9a000014 bls af8 <malloc+0xa4>
p->s.size = nunits;
}
freep = prevp;
return (void*)(p + 1);
}
if(p == freep)
aa4: e5952000 ldr r2, [r5]
aa8: e1a03000 mov r3, r0
aac: e1500002 cmp r0, r2
ab0: 1afffff7 bne a94 <malloc+0x40>
morecore(uint nu)
{
char *p;
Header *hp;
if(nu < 4096)
ab4: e1540008 cmp r4, r8
nu = 4096;
p = sbrk(nu * sizeof(Header));
ab8: 81a00007 movhi r0, r7
abc: 93a00902 movls r0, #32768 ; 0x8000
morecore(uint nu)
{
char *p;
Header *hp;
if(nu < 4096)
ac0: 81a06004 movhi r6, r4
ac4: 93a06a01 movls r6, #4096 ; 0x1000
nu = 4096;
p = sbrk(nu * sizeof(Header));
ac8: ebfffeec bl 680 <sbrk>
acc: e1a03000 mov r3, r0
if(p == (char*)-1)
ad0: e3730001 cmn r3, #1
return 0;
hp = (Header*)p;
hp->s.size = nu;
free((void*)(hp + 1));
ad4: e2800008 add r0, r0, #8
Header *hp;
if(nu < 4096)
nu = 4096;
p = sbrk(nu * sizeof(Header));
if(p == (char*)-1)
ad8: 0a000010 beq b20 <malloc+0xcc>
return 0;
hp = (Header*)p;
hp->s.size = nu;
adc: e5836004 str r6, [r3, #4]
free((void*)(hp + 1));
ae0: ebffffb2 bl 9b0 <free>
return freep;
ae4: e5953000 ldr r3, [r5]
}
freep = prevp;
return (void*)(p + 1);
}
if(p == freep)
if((p = morecore(nunits)) == 0)
ae8: e3530000 cmp r3, #0
aec: 1affffe8 bne a94 <malloc+0x40>
return 0;
af0: e1a00003 mov r0, r3
}
}
af4: e8bd89f8 pop {r3, r4, r5, r6, r7, r8, fp, pc}
base.s.ptr = freep = prevp = &base;
base.s.size = 0;
}
for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){
if(p->s.size >= nunits){
if(p->s.size == nunits)
af8: e1540002 cmp r4, r2
prevp->s.ptr = p->s.ptr;
else {
p->s.size -= nunits;
afc: 10642002 rsbne r2, r4, r2
b00: 15802004 strne r2, [r0, #4]
base.s.size = 0;
}
for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){
if(p->s.size >= nunits){
if(p->s.size == nunits)
prevp->s.ptr = p->s.ptr;
b04: 05902000 ldreq r2, [r0]
else {
p->s.size -= nunits;
p += p->s.size;
b08: 10800182 addne r0, r0, r2, lsl #3
base.s.size = 0;
}
for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){
if(p->s.size >= nunits){
if(p->s.size == nunits)
prevp->s.ptr = p->s.ptr;
b0c: 05832000 streq r2, [r3]
else {
p->s.size -= nunits;
p += p->s.size;
p->s.size = nunits;
b10: 15804004 strne r4, [r0, #4]
}
freep = prevp;
b14: e5853000 str r3, [r5]
return (void*)(p + 1);
b18: e2800008 add r0, r0, #8
b1c: e8bd89f8 pop {r3, r4, r5, r6, r7, r8, fp, pc}
}
if(p == freep)
if((p = morecore(nunits)) == 0)
return 0;
b20: e3a00000 mov r0, #0
b24: e8bd89f8 pop {r3, r4, r5, r6, r7, r8, fp, pc}
Header *p, *prevp;
uint nunits;
nunits = (nbytes + sizeof(Header) - 1)/sizeof(Header) + 1;
if((prevp = freep) == 0){
base.s.ptr = freep = prevp = &base;
b28: e2850004 add r0, r5, #4
b2c: e5850000 str r0, [r5]
base.s.size = 0;
b30: e9850009 stmib r5, {r0, r3}
b34: eaffffd3 b a88 <malloc+0x34>
b38: 00000b6c .word 0x00000b6c
b3c: 00000fff .word 0x00000fff
| 22.233493 | 60 | 0.555979 |
74adb1ea8d5ed70ee0963a9c7d7a8e1cfd5c6874 | 374 | asm | Assembly | ee/hot/pick.asm | olifink/smsqe | c546d882b26566a46d71820d1539bed9ea8af108 | [
"BSD-2-Clause"
] | null | null | null | ee/hot/pick.asm | olifink/smsqe | c546d882b26566a46d71820d1539bed9ea8af108 | [
"BSD-2-Clause"
] | null | null | null | ee/hot/pick.asm | olifink/smsqe | c546d882b26566a46d71820d1539bed9ea8af108 | [
"BSD-2-Clause"
] | null | null | null | ; Function to set PICK HOTKEY V2.00 1988 Tony Tebby QJUMP
section hotkey
xdef hot_pick
xref hot_seti
include 'dev8_ee_hk_data'
;+++
; Set up a PICK HOTKEY
;
; error = HOT_PICK (key,name)
;---
hot_pick
moveq #hki.pick,d6 ; set pick
jmp hot_seti ; using utility
end
| 18.7 | 66 | 0.52139 |
4397f5b04cb3d26d23a921e0cf5fe163f2919933 | 332 | asm | Assembly | programs/oeis/070/A070386.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/070/A070386.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/070/A070386.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A070386: a(n) = 5^n mod 39.
; 1,5,25,8,1,5,25,8,1,5,25,8,1,5,25,8,1,5,25,8,1,5,25,8,1,5,25,8,1,5,25,8,1,5,25,8,1,5,25,8,1,5,25,8,1,5,25,8,1,5,25,8,1,5,25,8,1,5,25,8,1,5,25,8,1,5,25,8,1,5,25,8,1,5,25,8,1,5,25,8,1,5,25,8,1,5,25,8,1,5,25,8,1,5,25,8,1,5,25,8
mov $1,1
mov $2,$0
lpb $2
mul $1,5
mod $1,39
sub $2,1
lpe
mov $0,$1
| 27.666667 | 226 | 0.539157 |
44ba472678a2dbb1a2d89ebf957d01a2fd8a95e8 | 690 | asm | Assembly | data/types/names.asm | opiter09/ASM-Machina | 75d8e457b3e82cc7a99b8e70ada643ab02863ada | [
"CC0-1.0"
] | 1 | 2022-02-15T00:19:44.000Z | 2022-02-15T00:19:44.000Z | data/types/names.asm | opiter09/ASM-Machina | 75d8e457b3e82cc7a99b8e70ada643ab02863ada | [
"CC0-1.0"
] | null | null | null | data/types/names.asm | opiter09/ASM-Machina | 75d8e457b3e82cc7a99b8e70ada643ab02863ada | [
"CC0-1.0"
] | null | null | null | TypeNames:
table_width 2, TypeNames
dw .Sound
dw .Fighting
dw .Flying
dw .Poison
dw .Ground
dw .Rock
dw .Bird
dw .Bug
dw .Ghost
REPT FIRE - GHOST - 1
dw .Normal
ENDR
dw .Fire
dw .Water
dw .Grass
dw .Electric
dw .Psychic
dw .Ice
dw .Dragon
assert_table_length NUM_TYPES
.Sound: db "SOUND@"
.Fighting: db "FIGHTING@"
.Flying: db "FLYING@"
.Poison: db "POISON@"
.Fire: db "FIRE@"
.Water: db "WATER@"
.Grass: db "GRASS@"
.Electric: db "ELECTRIC@"
.Psychic: db "PSYCHIC@"
.Ice: db "ICE@"
.Ground: db "GROUND@"
.Rock: db "ROCK@"
.Bird: db "BIRD@"
.Bug: db "BUG@"
.Ghost: db "GHOST@"
.Dragon: db "DRAGON@"
.Normal db "NORMAL@"
| 15.333333 | 30 | 0.604348 |
3ea9e18da21190c4fd2076e105c903fdc81f0317 | 10,463 | asm | Assembly | nes-test-roms/stomper/smwstomp.asm | joebentley/ones | d2c7d21bd94dda9d312c56a197cddec164035d4f | [
"BSD-2-Clause"
] | 1,461 | 2022-02-25T17:44:34.000Z | 2022-03-30T06:18:29.000Z | nes-test-roms/stomper/smwstomp.asm | joebentley/ones | d2c7d21bd94dda9d312c56a197cddec164035d4f | [
"BSD-2-Clause"
] | 20 | 2020-11-09T19:57:25.000Z | 2021-12-24T07:09:53.000Z | nes-test-roms/stomper/smwstomp.asm | joebentley/ones | d2c7d21bd94dda9d312c56a197cddec164035d4f | [
"BSD-2-Clause"
] | 34 | 2022-02-25T19:53:56.000Z | 2022-03-31T07:25:28.000Z | ;SMW Stomper
;A Demonstration of Smooth Mid-Screen Vertical Scrolling
;WITHOUT the need for an 8 scanline 'buffer' region
;Quietust, 2002/05/18
temp:
temp_l: .block 1
temp_h: .block 1
even_frame: .block 1
shake_y: .block 1
screen_x: .block 1
screen_y: .block 1
stomper_x: .block 1
stomper_y: .block 1
irq_num: .block 1
stomper_mode: .block 1
stomper_timer: .block 1
stompershake_y: .block 1
.org $8000
.include "smwstomp/smwnsf.dat"
.org $C000
stomper:
.db $00,$00,$01,$02,$03,$04,$05,$06,$07,$08,$09,$0A,$06,$0B,$0C,$0D
.db $0E,$0E,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00
.db $00,$00,$0F,$10,$11,$12,$13,$14,$0C,$15,$16,$09,$17,$18,$19,$1A
.db $0E,$0E,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00
.db $00,$00,$1B,$1C,$1D,$1E,$07,$08,$1F,$06,$0C,$20,$21,$22,$23,$24
.db $0E,$0E,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00
.db $00,$00,$25,$26,$27,$28,$29,$15,$2A,$2B,$2C,$2D,$15,$2E,$2F,$30
.db $0E,$0E,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00
.db $00,$00,$01,$02,$03,$04,$05,$06,$07,$08,$09,$0A,$06,$0B,$0C,$0D
.db $0E,$0E,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00
.db $00,$00,$0F,$10,$11,$12,$13,$14,$0C,$15,$16,$09,$17,$18,$19,$1A
.db $0E,$0E,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00
.db $00,$00,$1B,$1C,$1D,$1E,$07,$08,$1F,$06,$0C,$20,$21,$22,$23,$24
.db $0E,$0E,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00
.db $00,$00,$25,$26,$27,$28,$29,$15,$2A,$2B,$2C,$2D,$15,$2E,$2F,$30
.db $0E,$0E,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00
.db $00,$00,$01,$02,$03,$04,$05,$06,$07,$08,$09,$0A,$06,$0B,$0C,$0D
.db $0E,$0E,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00
.db $00,$00,$0F,$10,$11,$12,$13,$14,$0C,$15,$16,$09,$17,$18,$19,$1A
.db $0E,$0E,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00
.db $00,$00,$1B,$1C,$1D,$1E,$07,$08,$1F,$06,$0C,$20,$21,$22,$23,$24
.db $0E,$0E,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00
.db $00,$00,$25,$26,$27,$28,$29,$15,$2A,$2B,$2C,$2D,$15,$2E,$2F,$30
.db $0E,$0E,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00
.db $00,$00,$01,$02,$03,$04,$05,$06,$07,$08,$09,$0A,$06,$0B,$0C,$0D
.db $0E,$0E,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00
.db $00,$00,$0F,$10,$11,$12,$13,$14,$0C,$15,$16,$09,$17,$18,$19,$1A
.db $0E,$0E,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00
.db $00,$00,$1B,$1C,$1D,$1E,$07,$08,$1F,$06,$0C,$20,$21,$22,$23,$24
.db $0E,$0E,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00
.db $00,$00,$25,$26,$27,$28,$29,$15,$2A,$2B,$2C,$2D,$15,$2E,$2F,$30
.db $0E,$0E,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00
.db $00,$00,$01,$02,$03,$04,$05,$06,$07,$08,$09,$0A,$06,$0B,$0C,$0D
.db $0E,$0E,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00
.db $00,$00,$0F,$10,$11,$12,$13,$14,$0C,$15,$16,$09,$17,$18,$19,$1A
.db $0E,$0E,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00
.db $00,$00,$1B,$1C,$1D,$1E,$07,$08,$1F,$06,$0C,$20,$21,$22,$23,$24
.db $0E,$0E,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00
.db $00,$00,$25,$26,$27,$28,$29,$15,$2A,$2B,$2C,$2D,$15,$2E,$2F,$30
.db $0E,$0E,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00
.db $00,$00,$01,$02,$03,$04,$05,$06,$07,$08,$09,$0A,$06,$0B,$0C,$0D
.db $0E,$0E,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00
.db $00,$00,$0F,$10,$11,$12,$13,$14,$0C,$15,$16,$09,$17,$18,$19,$1A
.db $0E,$0E,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00
.db $00,$00,$1B,$1C,$1D,$1E,$07,$08,$1F,$06,$0C,$20,$21,$22,$23,$24
.db $0E,$0E,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00
.db $00,$00,$25,$26,$27,$28,$29,$15,$2A,$2B,$2C,$2D,$15,$2E,$2F,$30
.db $0E,$0E,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00
.db $00,$00,$01,$02,$03,$04,$05,$06,$07,$08,$09,$0A,$06,$0B,$0C,$0D
.db $0E,$0E,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00
.db $00,$00,$0F,$10,$11,$12,$13,$14,$0C,$15,$16,$09,$17,$18,$19,$1A
.db $0E,$0E,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00
.db $00,$00,$1B,$1C,$1D,$1E,$07,$08,$1F,$06,$0C,$20,$21,$22,$23,$24
.db $0E,$0E,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00
.db $00,$00,$25,$26,$27,$28,$29,$15,$2A,$2B,$2C,$2D,$15,$2E,$2F,$30
.db $0E,$0E,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00
.db $00,$31,$32,$33,$34,$35,$36,$37,$38,$39,$3A,$3B,$3C,$3D,$3E,$3F
.db $40,$41,$42,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00
.db $00,$43,$44,$45,$46,$47,$44,$45,$46,$47,$44,$45,$46,$47,$44,$45
.db $46,$47,$48,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00
.db $44,$00,$00,$00,$00,$00,$00,$00,$44,$00,$00,$00,$00,$00,$00,$00
.db $44,$00,$00,$00,$00,$00,$00,$00,$44,$00,$00,$00,$00,$00,$00,$00
.db $44,$00,$00,$00,$00,$00,$00,$00,$44,$00,$00,$00,$00,$00,$00,$00
.db $44,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00
palette:
.db $2D,$0F,$07,$17,$2D,$0F,$27,$17,$2D,$0F,$0C,$1C,$2D,$0F,$0F,$0F
.fill $E000-*,$00
reset: SEI
CLD
LDX #$00
STX $8000 ;reset PRG/CHR swap
STX $2000
STX $2001
INX
STX $A000 ;and mirroring
ppuinit: LDA $2002
BPL ppuinit
DEX
BPL ppuinit
TXS
INX
LDA $2002
LDY #$20
STY $2006
STX $2006
LDY #$80 ;init the 'playfield' nametable
LDA #$4E
init_vram_1: STA $2007 ;bricks (top)
DEY
BNE init_vram_1
LDY #$10
init_vram_2: LDA #$4C ;ceiling pattern
STA $2007
LDA #$4D
STA $2007
DEY
BNE init_vram_2
LDA #$00
LDY #$80
LDX #$03
init_vram_3: STA $2007 ;the room
DEY
BNE init_vram_3
DEX
BNE init_vram_3
LDY #$10
init_vram_5: LDA #$49 ;floor pattern
STA $2007
LDA #$4A
STA $2007
DEY
BNE init_vram_5
LDY #$80
LDA #$4B
init_vram_6: STA $2007 ;more bricks (bottom)
DEY
BNE init_vram_6
LDY #$40
LDA #$AA
init_vram_7: STA $2007 ;and attrib table
DEY
BNE init_vram_7
LDA #$28
STA $2006
LDA #$00
STA $2006
STA temp_l
LDA #$C0
STA temp_h
LDY #$00
init_vram_8: LDA (temp),y ;and now, the stomper
STA $2007
INC temp_l
BNE skip1
INC temp_h
skip1: LDA temp_h
CMP #$C4
BNE init_vram_8
LDA #$3F
STA $2006
STX $2006
init_pal: LDA palette,x ;load palette
STA $2007
INX
CPX #$10
BNE init_pal
LDX #$00
LDY #$00
init_chr: STX $8000 ;setup CHR banks
STY $8001
INX
INY
CPX #$03
BPL chr_not1k
INY
chr_not1k: CPX #$06
BNE init_chr
LDY #$00
STX $8000
STY $8001
INX
INY
STX $8000
STY $8001
LDA #$C0
STA $4017
JSR sound_reset ;init the sound code (stolen from SMW pirate)
INC $0700
LDA #$00
STA shake_y
STA screen_x
STA screen_y
STA stomper_mode
STA stomper_timer
STA stompershake_y
LDA #$FF
STA stomper_y
LDA #$2C
JSR sound_init ;start playing the castle tune
LDA #$88
STA $2000
CLI
JMP waitframe
nmi: CLC
LDA even_frame
ADC #$01
AND #$03
STA even_frame
BNE no_scroll
INC screen_x
INC stomper_x
no_scroll: LDA #$88
STA $2000
LDA screen_x
STA $2005
LDA shake_y
STA $2005
LDA #$88
STA $2000
LDA #$1E
STA $2001 ;main screen turn on
LDX stomper_mode ;okay, what are we doing?
BEQ stomp_init
DEX
BEQ stomp_wait
DEX
BEQ stomp_creep
DEX
BEQ stomp_fall
DEX
BEQ stomp_shake
DEX
BEQ stomp_riseshake
DEX
BEQ stomp_rise
JMP drawpipe
stomp_init: INC stomper_mode ;setup, start a delay timer
LDA #$80
STA stomper_timer
JMP drawpipe
stomp_wait: DEC stomper_timer ;wait a bit before it appears
BEQ wait_done
JMP drawpipe
stomp_creep: DEC stomper_timer ;creep down a little bit...
BEQ creep_alldone
LDA stomper_timer
AND #$03
CMP #$03
BNE creep_done
DEC stomper_y
creep_done: JMP drawpipe
stomp_fall: DEC stomper_timer ;and then fall down at full speed
BEQ fall_alldone
DEC stomper_y
DEC stomper_y
DEC stomper_y
DEC stomper_y
JMP drawpipe
stomp_shake: DEC stomper_timer ;and slam into the floor
BEQ shake_alldone
LDA even_frame
AND #$01
BEQ shake_up
LDA #$FE
STA shake_y
JMP shake_done
shake_up: LDA #$02
STA shake_y
shake_done: JMP drawpipe
stomp_riseshake:DEC stomper_timer ;keep shaking the floor a bit
BEQ riseshake_alldone ;while it's rising
INC stomper_y
INC stomper_y
LDA even_frame
AND #$01
BEQ riseshake_up
LDA #$FE
STA shake_y
JMP riseshake_done
riseshake_up: LDA #$02
STA shake_y
riseshake_done: STA stompershake_y
JMP drawpipe
stomp_rise: DEC stomper_timer ;done shaking, rise back into the ceiling
BEQ rise_alldone
INC stomper_y
INC stomper_y
JMP drawpipe
wait_done: INC stomper_mode
LDA #$4C
STA stomper_timer
LDA #$A0
STA stomper_x
LDA #$EF
STA stomper_y
JMP drawpipe
creep_alldone: INC stomper_mode
LDA #$24
STA stomper_timer
DEC stomper_y
JMP drawpipe
fall_alldone: INC stomper_mode
LDA #$40
STA stomper_timer
LDA #$1D
JSR sound_init
LDA #$0F
JSR sound_init ;play a suitable sound
JMP drawpipe
shake_alldone: INC stomper_mode
LDA #$20
STA stomper_timer
JMP drawpipe
riseshake_alldone:
INC stomper_mode
LDA #$32
STA stomper_timer
LDA #$00
STA shake_y
STA stompershake_y
JMP drawpipe
rise_alldone: LDA #$00
STA stomper_mode
JMP drawpipe
drawpipe: LDA stomper_y ;set up MMC3 interrupts
CMP #$80
BPL maybe_pipe
CMP #$4F
BMI no_pipe
BPL yes_pipe
maybe_pipe: CMP #$EE
BPL no_pipe
yes_pipe: LDA #$27
CLC
ADC shake_y
STA $C000
STA $C001
STA $E001
LDA #$FF
STA irq_num
no_pipe: JSR sound_play ;play music
RTI
irq: INC irq_num ;where is it?
BEQ first_irq ;(yeah, I *should* save regs)
BNE second_irq ;(but this is timing-critical code)
first_irq: LDA stomper_y ;top of pipe
CLC
ADC stompershake_y
STA screen_y
ASL A
ASL A
AND #$E0
LDY #$8A
STY $2000
LDY screen_y
LDX #$08
spin1: DEX
BNE spin1
LDX stomper_x
STX $2005
STY $2005
STX $2005
STA $2006
STX $2005
STY $2005
LDA stomper_y
CLC
ADC #$12
CLC
ADC stompershake_y
EOR #$FF
STA $E000
STA $C000
STA $C001
STA $E001
JMP end_irq
second_irq: LDX stomper_y ;bottom of pipe
INX
TXA
CLC
ADC #$10
EOR #$FF
CLC
ADC #$28
CLC
ADC stompershake_y
STA screen_y
ASL A
ASL A
AND #$E0
LDY #$88
STY $2000
LDY screen_y
LDX #$05
spin2: DEX
BNE spin2
NOP
NOP
LDX screen_x
STX $2005
STY $2005
STX $2005
STA $2006
STX $2005
STY $2005
STA $E000
end_irq: RTI
waitframe: JMP waitframe ;wait forever
sound_reset: .equ $85D6
sound_init: .equ $8E2F
sound_play: .equ $862A
.fill $FFFA-*,$00
.org $FFFA ;interrupt vectors
.dw nmi
.dw reset
.dw irq
.end
| 23.199557 | 71 | 0.609481 |
c44d6d4b9f6b2e0ed01bd304bbc6e894c53f9e77 | 8,106 | asm | Assembly | dino/lc/scene.asm | zengfr/arcade_game_romhacking_sourcecode_top_secret_data | a4a0c86c200241494b3f1834cd0aef8dc02f7683 | [
"Apache-2.0"
] | 6 | 2020-10-14T15:29:10.000Z | 2022-02-12T18:58:54.000Z | dino/lc/scene.asm | zengfr/arcade_game_romhacking_sourcecode_top_secret_data | a4a0c86c200241494b3f1834cd0aef8dc02f7683 | [
"Apache-2.0"
] | null | null | null | dino/lc/scene.asm | zengfr/arcade_game_romhacking_sourcecode_top_secret_data | a4a0c86c200241494b3f1834cd0aef8dc02f7683 | [
"Apache-2.0"
] | 1 | 2020-12-17T08:59:10.000Z | 2020-12-17T08:59:10.000Z | copyright zengfr site:http://github.com/zengfr/romhack
018078 move.b ($4d9,A5), D0
01807C lsl.w #2, D0
01807E moveq #$0, D1
018080 move.b ($786,A5), D1
018084 add.w D1, D0
018086 move.b ($c,PC,D0.w), D1
01808A subq.b #1, D1
;--------
01E3C4 lsl.w #4, D0
01E3C6 lea ($2c,PC,D0.w), A0
01E3CA moveq #$0, D0
01E3CC move.b ($786,A5), D0
01E3D0 lsl.w #2, D0
01E3D2 lea (A0,D0.w), A0
01E3D6 move.w (A0)+, D0
;--------
0AAAC4 move.l #$0, D0
0AAACA move.l (A0), D2
0AAACC move.w D0, (A0)
0AAACE move.w D0, ($2,A0)
0AAAD2 cmp.l (A0), D0
0AAAD4 bne $aaafc
0AAAD8 move.l D2, (A0)+
;--------
020D3E movea.l ($56,A6), A4
020D42 tst.w ($0,A4)
020D46 beq $20d56
020D56 move.b ($a,A4), ($4a,A6)
020D5C jsr $acd0.l
020D62 lea ($73c,A5), A6
020D66 jsr $8a44.l
;--------
0089E0 dbra D6, $89c0
0089E4 rts
0089E6 move.b ($4d9,A5), -(A7)
0089EA move.b ($786,A5), -(A7)
0089EE asl.w #3, D0
0089F0 lea ($6c,PC,D0.w), A0
0089F4 move.b (A0)+, ($4d9,A5)
;--------
02072C bge $2073a
02072E cmpi.b #$f, ($5,A6)
020734 bge $2073a
020736 clr.b ($4a,A6)
02073A clr.b ($6d,A6)
02073E clr.b ($78,A6)
020742 clr.b ($6c,A6)
;--------
00FC0A movea.l ($22,PC,D0.w), A0
00FC0E movea.l ($3e,PC,D0.w), A1
00FC12 moveq #$0, D0
00FC14 move.b ($786,A5), D0
00FC18 add.w D0, D0
00FC1A add.w D0, D0
00FC1C move.l (A0,D0.w), ($8,A4)
;--------
0AAABC jmp $4ce.l
0AAAC2 movea.l A0, A3
0AAAC4 move.l #$0, D0
0AAACA move.l (A0), D2
0AAACC move.w D0, (A0)
0AAACE move.w D0, ($2,A0)
0AAAD2 cmp.l (A0), D0
;--------
004E22 move.w ($32,PC,D0.w), D0
004E26 lea ($2e,PC,D0.w), A0
004E2A moveq #$0, D0
004E2C move.b ($786,A5), D0
004E30 add.w D0, D0
004E32 move.w D0, D1
004E34 lsl.w #3, D0
;--------
008A28 bsr $8c20
008A2C movea.l (A7)+, A0
008A2E move.b (A0)+, ($4d9,A5)
008A32 move.b (A0)+, ($786,A5)
008A36 bsr $8d92
008A3A move.b (A7)+, ($786,A5)
008A3E move.b (A7)+, ($4d9,A5)
;--------
01D97C add.w D0, D0
01D97E movea.l ($30,PC,D0.w), A0
01D982 moveq #$0, D0
01D984 move.b ($786,A5), D0
01D988 add.w D0, D0
01D98A adda.w D0, A0
01D98C move.b (A0)+, ($4de,A5)
;--------
008A04 bsr $8e4c
008A08 movea.l (A7)+, A0
008A0A move.b (A0)+, ($4d9,A5)
008A0E move.b (A0)+, ($786,A5)
008A12 move.l A0, -(A7)
008A14 bsr $8a8e
008A18 bsr $8aae
;--------
018A9E bsr $18c88
018AA2 move.b #$2, ($4,A6)
018AA8 jsr $655e.l
018AAE tst.b ($786,A5)
018AB2 bne $18b36
018AB6 cmpi.b #$1, ($4d9,A5)
018ABC beq $18aca
;--------
022CCC movea.l #$2311e, A0
022CD2 movea.l (A0,D0.w), A0
022CD6 moveq #$0, D0
022CD8 move.b ($786,A5), D0
022CDC move.w D0, D1
022CDE add.w D0, D0
022CE0 lsl.w #3, D1
;--------
022DCE move.w ($14,PC,D0.w), D0
022DD2 lea ($10,PC,D0.w), A0
022DD6 moveq #$0, D0
022DD8 move.b ($786,A5), D0
022DDC adda.l D0, A0
022DDE move.b (A0), ($5f,A6)
022DE2 rts
;--------
0130FC moveq #$0, D3
0130FE move.b ($4d9,A5), D3
013102 lsl.w #3, D3
013104 move.b ($786,A5), D4
013108 add.w D4, D4
01310A add.w D4, D3
01310C move.w (A0,D3.w), D3
;--------
01DA2C lsl.w #2, D0
01DA2E movea.l ($34,PC,D0.w), A0
01DA32 moveq #$0, D0
01DA34 move.b ($786,A5), D0
01DA38 add.w D0, D0
01DA3A adda.w D0, A0
01DA3C move.b (A0)+, ($4de,A5)
;--------
0089EE asl.w #3, D0
0089F0 lea ($6c,PC,D0.w), A0
0089F4 move.b (A0)+, ($4d9,A5)
0089F8 move.b (A0)+, ($786,A5)
0089FC move.l A0, -(A7)
0089FE clr.w $9157fe.l
008A04 bsr $8e4c
;--------
00A56A add.w D0, D0
00A56C add.w D0, D0
00A56E moveq #$0, D1
00A570 move.b ($786,A5), D1
00A574 add.w D1, D0
00A576 move.b ($a,PC,D0.w), D0
00A57A moveq #$0, D1
;--------
008A2E move.b (A0)+, ($4d9,A5)
008A32 move.b (A0)+, ($786,A5)
008A36 bsr $8d92
008A3A move.b (A7)+, ($786,A5)
008A3E move.b (A7)+, ($4d9,A5)
008A42 rts
008A44 clr.w $9157fe.l
;--------
01E088 lsl.w #2, D0
01E08A movea.l (A0,D0.w), A0
01E08E moveq #$0, D0
01E090 move.b ($786,A5), D0
01E094 lsl.w #4, D0
01E096 lea (A0,D0.w), A0
01E09A tst.b ($4cf,A5)
;--------
008E4E move.b ($4d9,A5), D0
008E52 lsl.w #4, D0
008E54 moveq #$0, D1
008E56 move.b ($786,A5), D1
008E5A add.w D1, D1
008E5C add.w D1, D1
008E5E add.w D1, D0
;--------
0AAADC bne $aaaca
0AAADE movea.l A3, A0
0AAAE0 move.l #$ffffffff, D0
0AAAE6 move.l (A0), D2
0AAAE8 move.w D0, (A0)
0AAAEA move.w D0, ($2,A0)
0AAAEE cmp.l (A0), D0
;--------
01DA40 move.b ($4e4,A5), ($4dd,A5)
01DA46 tst.b ($4d9,A5)
01DA4A bne $1da56
01DA4C cmpi.b #$2, ($786,A5)
01DA52 bne $1da56
01DA54 rts
01DA56 clr.b ($3334,A5)
;--------
0209CC move.w ($4,A4), ($50,A6)
0209D2 move.w ($6,A4), ($52,A6)
0209D8 move.w ($8,A4), ($54,A6)
0209DE move.b ($a,A4), ($4a,A6)
0209E4 move.b ($b,A4), ($5,A6)
0209EA clr.w ($6,A6)
0209EE move.b ($c,A4), ($4b,A6)
;--------
012BF6 move.w (A0,D0.w), D1
012BFA adda.w D1, A0
012BFC moveq #$0, D0
012BFE move.b ($786,A5), D0
012C02 add.w D0, D0
012C04 move.w (A0,D0.w), D0
012C08 adda.w D0, A0
;--------
008A18 bsr $8aae
008A1C movea.l (A7)+, A0
008A1E move.b (A0)+, ($4d9,A5)
008A22 move.b (A0)+, ($786,A5)
008A26 move.l A0, -(A7)
008A28 bsr $8c20
008A2C movea.l (A7)+, A0
;--------
0207D0 lsl.w #2, D0
0207D2 movea.l #$21580, A0
0207D8 movea.l (A0,D0.w), A0
0207DC move.b ($786,A5), D0
0207E0 move.w D0, D1
0207E2 add.w D0, D0
0207E4 lsl.w #3, D1
;--------
008AB0 move.b ($4d9,A5), D0
008AB4 lsl.w #4, D0
008AB6 moveq #$0, D1
008AB8 move.b ($786,A5), D1
008ABC add.w D1, D1
008ABE add.w D1, D1
008AC0 add.w D1, D0
;--------
020C76 movea.l ($56,A6), A4
020C7A tst.w ($0,A4)
020C7E beq $20c8e
020C8E move.b ($a,A4), ($4a,A6)
020C94 jsr $acd0.l
020C9A lea ($73c,A5), A6
020C9E jsr $8a44.l
;--------
022E24 move.b ($4d9,A5), D0
022E28 add.w D0, D0
022E2A add.w D0, D0
022E2C move.b ($786,A5), D2
022E30 add.w D2, D0
022E32 move.b ($20,PC,D0.w), D0
022E36 beq $22e50
;--------
020F44 move.b ($4d9,A5), D1
020F48 add.w D1, D1
020F4A add.w D1, D1
020F4C add.b ($786,A5), D1
020F50 move.b ($6,PC,D1.w), ($74,A6)
020F56 rts
021086 tst.b ($6,A6)
;--------
0AAACE move.w D0, ($2,A0)
0AAAD2 cmp.l (A0), D0
0AAAD4 bne $aaafc
0AAAD8 move.l D2, (A0)+
0AAADA cmpa.l A0, A1
0AAADC bne $aaaca
0AAADE movea.l A3, A0
;--------
00041E movea.l #$ff0000, A0
000424 move.w #$3fff, D0
000428 moveq #$0, D1
00042A move.l D1, (A0)+
00042C dbra D0, $42a
000430 reset
000432 move.b #$80, $800030.l
;--------
004D1C moveq #$0, D0
004D1E move.l D0, (A4)+
004D20 move.l D0, (A4)+
004D22 move.l D0, (A4)+
004D24 move.l D0, (A4)+
004D26 move.l D0, (A4)+
004D28 move.l D0, (A4)+
;--------
008C22 move.b ($4d9,A5), D0
008C26 lsl.w #4, D0
008C28 moveq #$0, D1
008C2A move.b ($786,A5), D1
008C2E add.w D1, D1
008C30 add.w D1, D1
008C32 add.w D1, D0
;--------
0AAACA move.l (A0), D2
0AAACC move.w D0, (A0)
0AAACE move.w D0, ($2,A0)
0AAAD2 cmp.l (A0), D0
0AAAD4 bne $aaafc
0AAAD8 move.l D2, (A0)+
0AAADA cmpa.l A0, A1
;--------
0AAAEA move.w D0, ($2,A0)
0AAAEE cmp.l (A0), D0
0AAAF0 bne $aaafc
0AAAF4 move.l D2, (A0)+
0AAAF6 cmpa.l A0, A1
0AAAF8 bne $aaae6
0AAAFA jmp (A6)
;--------
01031C move.b ($4d9,A5), D0
010320 lsl.w #3, D0
010322 moveq #$0, D1
010324 move.b ($786,A5), D1
010328 add.w D1, D1
01032A add.w D1, D0
01032C move.w ($10,PC,D0.w), ($4e8,A5)
;--------
copyright zengfr site:http://github.com/zengfr/romhack
| 25.570978 | 54 | 0.533925 |
758fbba2198c60ddd2e3b4a7dba5176d419753a8 | 12,114 | nasm | Assembly | AmdSevPkg/ResumeFromEfi/RestoreState.nasm | secure-migration/resume-from-efi-edk2 | 5decc7e941353f10a50ea0736f93811a0d3f2e99 | [
"Python-2.0",
"Zlib",
"BSD-2-Clause",
"MIT",
"BSD-2-Clause-Patent",
"BSD-3-Clause"
] | null | null | null | AmdSevPkg/ResumeFromEfi/RestoreState.nasm | secure-migration/resume-from-efi-edk2 | 5decc7e941353f10a50ea0736f93811a0d3f2e99 | [
"Python-2.0",
"Zlib",
"BSD-2-Clause",
"MIT",
"BSD-2-Clause-Patent",
"BSD-3-Clause"
] | null | null | null | AmdSevPkg/ResumeFromEfi/RestoreState.nasm | secure-migration/resume-from-efi-edk2 | 5decc7e941353f10a50ea0736f93811a0d3f2e99 | [
"Python-2.0",
"Zlib",
"BSD-2-Clause",
"MIT",
"BSD-2-Clause-Patent",
"BSD-3-Clause"
] | null | null | null | #include "StateLayout.h"
%define ENABLE_DEBUG
DEFAULT REL
SECTION .text
extern ASM_PFX(gIntermediateCR3)
extern ASM_PFX(gSourceCpuStateCR4)
extern ASM_PFX(gRelocatedResumeCpuStatePhase2)
extern ASM_PFX(gRelocatedResumeCpuStatePhase3)
%define X86_CR4_PGE BIT7
%define FLAG_POSITION 0xf00
%define FLAG_RESTORE_MEMORY_AND_DEVICES_FINISHED 0x3c3c3c3c3c3c3c3c
;
;arg 1:Char to print
;dx must be already set to the debug console port (0x402)
;
%macro DBG_PUT_CHAR 1
mov al, %1
out dx, al
%endmacro
%macro DBG_PUT_REG 1
%ifdef ENABLE_DEBUG
mov dx, 0x402
DBG_PUT_CHAR 'H'
DBG_PUT_CHAR 'E'
DBG_PUT_CHAR 'X'
DBG_PUT_CHAR '|'
mov rax, %1
%rep 8
out dx, al
shr rax, 8
%endrep
DBG_PUT_CHAR '|'
DBG_PUT_CHAR 0x0d
DBG_PUT_CHAR 0x0a
%endif
%endmacro
%macro DBG_PUT_TIME 0
%ifdef ENABLE_DEBUG
rdtsc
mov r14, rdx
shl r14, 32
or r14, rax
DBG_PUT_REG r14
%endif
%endmacro
%macro DBG_PUT_CHARS 1
%strlen len %1
%assign i 0
%rep len
%assign i i+1
%substr curr_char %1 i
DBG_PUT_CHAR curr_char
%endrep
%endmacro
;
;arg 1: String to print (CRLF is added)
;
%macro DBG_PRINT 1
%ifdef ENABLE_DEBUG
mov dx, 0x402
DBG_PUT_CHARS %1
DBG_PUT_CHAR 0x0d
DBG_PUT_CHAR 0x0a
%endif
%endmacro
;
; arg 1: MSR address
; arg 2: Offset of value in CPU_DATA
;
%macro RESTORE_MSR 2
mov ecx, %1 ; MSR address
mov eax, [CPU_DATA + %2] ; Load low 32-bits into eax
mov edx, [CPU_DATA + %2 + 4] ; Load high 32-bits into edx
wrmsr ; Write edx:eax into the MSR
%endmacro
;
; arg 1: MSR address
; arg 2: Lower 32-bit value to set
;
%macro WRITE_MSR32 2
mov ecx, %1 ; MSR address
mov eax, %2 ; Load low 32-bits into eax
xor edx, edx ; Load high 32-bits into edx (=0)
wrmsr ; Write edx:eax into the MSR
%endmacro
;
; Phase 1 prepares copies all needed values from global variables into
; registers so that phase 2 and 3 don't need to use the stack.
;
global ASM_PFX(ResumeCpuStatePhase1)
ASM_PFX(ResumeCpuStatePhase1):
DBG_PRINT 'RSTR1:74'
mov r8, qword [gRelocatedResumeCpuStatePhase3]
DBG_PRINT 'RSTR1:78'
mov r11, qword [gIntermediateCR3]
mov rbx, qword [gSourceCpuStateCR4]
DBG_PRINT 'RSTR1:81'
mov rcx, qword [gRelocatedResumeCpuStatePhase2]
jmp rcx
;
; Phase 2 switches from the OVMF page tables to the intermediate page tables. It
; is relocated to a page which has the same virtual address in both the OVMF
; page tables and the intermediate page tables, so it keeps executing after CR3
; is switched.
;
; We don't set up proper space for stack, so this code doesn't use the stack at
; all.
;
; Inputs:
; r11 - Intermediate CR3
; rbx - Value of CR4
; r8 - Address of the relocated ResumeCpuStatePhase3 (must be mapped both
; in intermediate and source page tables)
;
ALIGN EFI_PAGE_SIZE
global ASM_PFX(ResumeCpuStatePhase2)
ASM_PFX(ResumeCpuStatePhase2):
; Switch to intermediate PGD (from r11)
DBG_PRINT 'RSTR2:96'
mov cr3, r11
DBG_PRINT 'RSTR2:98'
; Turn off PGE (Page Global Enabled)
DBG_PRINT 'RSTR2:101'
mov rcx, rbx
DBG_PRINT 'RSTR2:103'
and rcx, ~X86_CR4_PGE
DBG_PRINT 'RSTR2:105'
mov cr4, rcx
DBG_PRINT 'RSTR2:107'
; Force flush TLB
mov rcx, cr3
mov cr3, rcx
; Enable PGE back on
mov cr4, rbx
; Jump to the relocated ResumeCpuStatePhase3
jmp r8
; The CpuStateDataPage (which holds the struct cpu_state) is
; positioned exactly 1 page (0x1000 bytes) after ResumeCpuStatePhase3. From any
; instruction inside ResumeCpuStatePhase3 we can use this RIP-relative
; addressing to access the cpu_state struct.
%define CPU_DATA rel ResumeCpuStatePhase3 + 0x1000 + CPU_STATE_OFFSET_IN_PAGE
;
; Phase 3 switches from the intermediate page table to the source page table
; (the same one that was active in the source VM), and then continues to
; restore all the CPU registers.
;
; We don't set up proper space for stack, so this code doesn't use the stack at
; all.
;
; Inputs:
; As explained above in CPU_DATA, this code expects the CpuStateDataPage
; which holds struct cpu_state to be exactly one page (0x1000 bytes) after
; the beginning of this function.
;
; rbx - Value of CR4
;
ALIGN EFI_PAGE_SIZE
global ASM_PFX(ResumeCpuStatePhase3)
ASM_PFX(ResumeCpuStatePhase3):
ResumeCpuStatePhase3Start:
; Prevent interrupts during this restore; the final iretq will restore
; RFLAGS, which will return the interrupt flag back to its original state
cli
; Switch to the source page tables
DBG_PRINT 'DBG:70'
mov rcx, [CPU_DATA + STATE_CR3]
mov cr3, rcx
DBG_PRINT 'DBG:cr3='
DBG_PUT_REG rcx
; Turn off PGE (Page Global Enabled)
DBG_PRINT 'DBG:PGEOFF'
mov rcx, rbx
and rcx, ~X86_CR4_PGE
DBG_PRINT 'DBG:SETCR4_A'
mov cr4, rcx
; Force flush TLB
DBG_PRINT 'DBG:FLUSHTLB'
mov rcx, cr3
mov cr3, rcx
; Restore CR4: Enable PGE back on
DBG_PRINT 'DBG:SETCR4_B'
mov cr4, rbx
; Restore CR0 (but with the WP turned off)
DBG_PRINT 'DBG:110'
mov r9, qword [CPU_DATA + STATE_CR0]
; Clear WP (Write-Protect) bit of CR0 - this is needed to allow
; executing `ltr` later in the process
btr r9, 16
mov cr0, r9
; Restore CR2
DBG_PRINT 'DBG:120'
mov r9, qword [CPU_DATA + STATE_CR2]
mov cr2, r9
DBG_PRINT 'DBG:EFER'
RESTORE_MSR 0xc0000080, STATE_EFER
; --- Start memory and devices restore
;
; At this point the handler stalls in a busy loop until the memory
; location of the flag holds the a value that indicates the restore is
; finished (FLAG_RESTORE_MEMORY_AND_DEVICES_FINISHED).
;
; Out tooling instructions QEMU to load the the target VM's memory and
; devices state. After these are restored, QEMU sets the flag memory
; location to the expected flag value which causes the resume state
; code to continue running.
;
DBG_PRINT 'TIME1'
DBG_PUT_TIME
DBG_PRINT 'DBG:STALL'
mov r11, FLAG_RESTORE_MEMORY_AND_DEVICES_FINISHED
lea r10, [CPU_DATA + FLAG_POSITION]
DBG_PUT_REG r10
mov r10, [CPU_DATA + FLAG_POSITION]
DBG_PUT_REG r10
.loop_wait_for_memory_restore:
mov r10, [CPU_DATA + FLAG_POSITION]
cmp r10, r11 ; Check if memory was already restored
jz .wait_done
pause
jmp .loop_wait_for_memory_restore
.wait_done:
DBG_PRINT 'TIME2'
DBG_PUT_TIME
;
; --- End memory and devices restore
; Force flush TLB again because memory was reloaded
mov rcx, cr3
mov cr3, rcx
; Restore all registers except rax
mov rsp, [CPU_DATA + STATE_REGS_SP]
mov rbp, [CPU_DATA + STATE_REGS_BP]
mov rsi, [CPU_DATA + STATE_REGS_SI]
mov rdi, [CPU_DATA + STATE_REGS_DI]
mov rbx, [CPU_DATA + STATE_REGS_BX]
mov rcx, [CPU_DATA + STATE_REGS_CX]
mov rdx, [CPU_DATA + STATE_REGS_DX]
mov r8, [CPU_DATA + STATE_REGS_R8]
mov r9, [CPU_DATA + STATE_REGS_R9]
mov r10, [CPU_DATA + STATE_REGS_R10]
mov r11, [CPU_DATA + STATE_REGS_R11]
mov r12, [CPU_DATA + STATE_REGS_R12]
mov r13, [CPU_DATA + STATE_REGS_R13]
mov r14, [CPU_DATA + STATE_REGS_R14]
mov r15, [CPU_DATA + STATE_REGS_R15]
DBG_PRINT 'DBG:260'
; Restore GDT
lgdt [CPU_DATA + STATE_GDT_DESC]
DBG_PRINT 'DBG:270'
; Restore IDT
lidt [CPU_DATA + STATE_IDT]
DBG_PRINT 'DBG:LDT'
; Restore LDT to zero (note: maybe need to restore from the saved state)
xor ax, ax
lldt ax
; Restore segment registers
DBG_PRINT 'DBG:SEG_DS'
mov ax, [CPU_DATA + STATE_DS]
mov ds, ax
DBG_PRINT 'DBG:SEG_ES'
mov ax, [CPU_DATA + STATE_ES]
mov es, ax
DBG_PRINT 'DBG:SEG_FS'
mov ax, [CPU_DATA + STATE_FS]
mov fs, ax
DBG_PRINT 'DBG:SEG_GS'
mov ax, [CPU_DATA + STATE_GS]
mov gs, ax
; Restore selected MSRs
DBG_PRINT 'DBG:STAR'
RESTORE_MSR 0xc0000081, STATE_STAR
DBG_PRINT 'DBG:LSTAR'
RESTORE_MSR 0xc0000082, STATE_LSTAR
DBG_PRINT 'DBG:CSTAR'
RESTORE_MSR 0xc0000083, STATE_CSTAR
DBG_PRINT 'DBG:FMASK'
RESTORE_MSR 0xc0000084, STATE_FMASK
DBG_PRINT 'DBG:FS_BASE'
RESTORE_MSR 0xc0000100, STATE_FS_BASE
DBG_PRINT 'DBG:GS_BASE'
RESTORE_MSR 0xc0000101, STATE_GS_BASE
DBG_PRINT 'DBG:KERNELGS_BASE'
RESTORE_MSR 0xc0000102, STATE_KERNELGS_BASE
DBG_PRINT 'DBG:TSC_AUX'
RESTORE_MSR 0xc0000103, STATE_TSC_AUX
; Restore task register
DBG_PRINT 'DBG:TR'
mov ax, [CPU_DATA + STATE_TR]
ltr ax
; Re-enable the original CR0 with WP (Write-Protect) bit turned on
DBG_PRINT 'DBG:CR0'
mov r9, qword [CPU_DATA + STATE_CR0]
mov cr0, r9
; ------------------------------------------------------------------------
; Note: This section contains hard-coded values that eventually should be
; extracted from the source VM state.
;
DBG_PRINT 'DBG:TSC'
mov ecx, 0x10 ; MSR address 10h TSC
mov eax, 0 ; Load low 32-bits into eax
mov edx, 9 ; Load high 32-bits into edx
wrmsr ; Write edx:eax into the MSR
DBG_PRINT 'DBG:APIC0'
WRITE_MSR32 0x835, 0x10700 ; APIC register 350h LVT0
WRITE_MSR32 0x80f, 0x1ff ; APIC register 0f0h SPIV Spurious Interrupt Vector Register
WRITE_MSR32 0x838, 0x3cf53 ; APIC register 380h Timer Initial Count Register
WRITE_MSR32 0x832, 0xec ; APIC register 320h Timer Local Vector Table Entry
;
; End of hard-coded values section
; ------------------------------------------------------------------------
; Clear any waiting EOIs
%define APIC_IR_REGS 8
%define APIC_IR_BITS (APIC_IR_REGS * 32)
%define REPETITIONS 16
mov ecx, 0x80b ; MSR address = APIC register 0b0h End Of Interrupt (EOI)
xor eax, eax ; Load low 32-bits into eax
xor edx, edx ; Load high 32-bits into edx
mov rdi, (REPETITIONS * APIC_IR_BITS)
.innerloop:
wrmsr ; Write edx:eax into the MSR
dec rdi
cmp rdi, 0
jne .innerloop
DBG_PRINT 'DBG:400'
; Restored clobbered registers
mov rdi, [CPU_DATA + STATE_REGS_DI]
mov rcx, [CPU_DATA + STATE_REGS_CX]
mov rdx, [CPU_DATA + STATE_REGS_DX]
mov rax, [CPU_DATA + STATE_REGS_ORIG_AX]
; Point RSP to to the iretq frame structure
lea rsp, [CPU_DATA + STATE_REGS_IP]
; Atomically restore SS, RSP, RFLAGS, CS and RIP - and resume execution
; from the saved CPU state
iretq
jmp $ ; Never reached
ResumeCpuStatePhase3End:
;
; Verify that ResumeCpuStatePhase3 fits in one page
;
%if (ResumeCpuStatePhase3End - ResumeCpuStatePhase3Start) >= EFI_PAGE_SIZE
%assign phase3_size ResumeCpuStatePhase3End - ResumeCpuStatePhase3Start
%error Size of ResumeCpuStatePhase3 ( phase3_size bytes ) is bigger than one page ( EFI_PAGE_SIZE bytes )
%endif
SECTION .data
;
; The CpuStateDataPage is located exactly 4096 bytes after the phase 3 page
; such that all the references to it inside phase 3 are relative.
;
ALIGN EFI_PAGE_SIZE
CpuStateDataPage:
TIMES EFI_PAGE_SIZE DB 0
; ---------------------------------------------------------
;
; Save pages for the intermediate page table (4 levels).
;
global ASM_PFX(pgd)
global ASM_PFX(pud)
global ASM_PFX(pmd)
global ASM_PFX(pte)
ALIGN EFI_PAGE_SIZE
ASM_PFX(pgd):
TIMES EFI_PAGE_SIZE DB 0
ALIGN EFI_PAGE_SIZE
ASM_PFX(pud):
TIMES EFI_PAGE_SIZE DB 0
ALIGN EFI_PAGE_SIZE
ASM_PFX(pmd):
TIMES EFI_PAGE_SIZE DB 0
ALIGN EFI_PAGE_SIZE
ASM_PFX(pte):
TIMES EFI_PAGE_SIZE DB 0
| 27.848276 | 107 | 0.653376 |
3bf0f8e2e91c55d347f5b8bea68c97b8eb936561 | 321 | asm | Assembly | programs/oeis/004/A004966.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/004/A004966.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/004/A004966.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A004966: a(n) = ceiling(n*phi^11), where phi is the golden ratio, A001622.
; 0,200,399,598,797,996,1195,1394,1593,1792,1991,2190,2389,2588,2787,2986,3185,3384,3583,3782,3981,4180,4379,4578,4777,4976,5175,5374,5573,5772,5971,6170,6369,6568,6767
mov $1,$0
trn $1,1
mov $2,$0
sub $0,$1
lpb $2
add $0,199
sub $2,1
lpe
| 26.75 | 168 | 0.697819 |
30e85a733c609fb92e41390a76668f09858dcde1 | 685 | asm | Assembly | programs/oeis/078/A078734.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/078/A078734.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/078/A078734.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A078734: Start with 1,2, concatenate 2^k previous terms and change last term as follows: 1->2, 2->3, 3->1.
; 1,2,1,3,1,2,1,1,1,2,1,3,1,2,1,2,1,2,1,3,1,2,1,1,1,2,1,3,1,2,1,3,1,2,1,3,1,2,1,1,1,2,1,3,1,2,1,2,1,2,1,3,1,2,1,1,1,2,1,3,1,2,1,1,1,2,1,3,1,2,1,1,1,2,1,3,1,2,1,2,1,2,1,3,1,2,1,1,1,2,1,3,1,2,1,3,1,2,1,3,1,2,1,1,1,2,1,3,1,2,1,2,1,2,1,3,1,2,1,1,1,2,1,3,1,2,1,2,1,2,1,3,1,2,1,1,1,2,1,3,1,2,1,2,1,2,1,3,1,2,1,1,1,2,1,3,1,2,1,3,1,2,1,3,1,2,1,1,1,2,1,3,1,2,1,2,1,2,1,3,1,2,1,1,1,2,1,3,1,2,1,1,1,2,1,3,1,2,1,1,1,2,1,3,1,2,1,2,1,2,1,3,1,2,1,1,1,2,1,3,1,2,1,3,1,2,1,3,1,2,1,1,1,2,1,3,1,2,1,2,1,2,1,3,1,2,1,1,1,2
add $0,1
pow $0,2
gcd $0,1073741824
mod $0,9
mov $1,$0
div $1,3
add $1,1
| 62.272727 | 501 | 0.540146 |
159b19a9a779be00fd24d7fb5acee99a67c88352 | 133 | asm | Assembly | Bank_H/3_startinit.asm | ndf-zz/fv1testing | 1ea474b6d93e888f091de15bcaed0d5a57905f22 | [
"CC0-1.0"
] | null | null | null | Bank_H/3_startinit.asm | ndf-zz/fv1testing | 1ea474b6d93e888f091de15bcaed0d5a57905f22 | [
"CC0-1.0"
] | null | null | null | Bank_H/3_startinit.asm | ndf-zz/fv1testing | 1ea474b6d93e888f091de15bcaed0d5a57905f22 | [
"CC0-1.0"
] | 1 | 2019-11-26T12:02:28.000Z | 2019-11-26T12:02:28.000Z | ; FV-1 Testing
;
; Program: Prepare Test 4
;
or 0x7fffff
skp RUN,main
wrax REG0,1.0
main: wrax DACL,0.0
ldax REG0
wrax DACR,0.0
| 12.090909 | 25 | 0.684211 |
398e6bbfb12dfb67e58137e1178b183b1ee9f02b | 6,010 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0x84_notsx.log_21829_2078.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0x84_notsx.log_21829_2078.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0x84_notsx.log_21829_2078.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r12
push %r13
push %r14
push %rax
push %rbx
push %rdx
lea addresses_WC_ht+0x1a85e, %r13
nop
xor $45889, %rdx
mov $0x6162636465666768, %r14
movq %r14, (%r13)
nop
nop
nop
nop
nop
inc %r13
lea addresses_UC_ht+0xbec2, %rdx
nop
nop
nop
nop
nop
sub %rax, %rax
movw $0x6162, (%rdx)
nop
nop
nop
nop
nop
xor %r11, %r11
lea addresses_normal_ht+0x136ba, %r12
nop
nop
and %r14, %r14
movl $0x61626364, (%r12)
nop
nop
nop
and %rdx, %rdx
lea addresses_A_ht+0xd0f1, %rdx
nop
nop
nop
nop
xor $4435, %rbx
mov $0x6162636465666768, %r12
movq %r12, %xmm6
movups %xmm6, (%rdx)
nop
nop
nop
nop
xor %rbx, %rbx
lea addresses_WT_ht+0x1dc9a, %rax
sub $15569, %rbx
movups (%rax), %xmm0
vpextrq $0, %xmm0, %r14
nop
nop
nop
xor %r14, %r14
lea addresses_normal_ht+0x13b1a, %r11
sub %r14, %r14
mov (%r11), %rax
nop
nop
nop
nop
xor %r14, %r14
lea addresses_WT_ht+0x1e042, %r11
nop
cmp %r13, %r13
mov (%r11), %r12w
nop
cmp $27407, %r12
lea addresses_D_ht+0xfc9a, %r11
nop
cmp %rbx, %rbx
mov (%r11), %r14
nop
nop
nop
nop
nop
cmp %r14, %r14
pop %rdx
pop %rbx
pop %rax
pop %r14
pop %r13
pop %r12
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r11
push %r13
push %rbp
push %rbx
push %rcx
push %rdx
// Store
mov $0x89a, %rcx
nop
nop
nop
dec %r11
movw $0x5152, (%rcx)
nop
nop
add $11768, %r13
// Faulty Load
lea addresses_D+0x1b09a, %rcx
nop
cmp %rbp, %rbp
mov (%rcx), %r10
lea oracles, %r11
and $0xff, %r10
shlq $12, %r10
mov (%r11,%r10,1), %r10
pop %rdx
pop %rcx
pop %rbx
pop %rbp
pop %r13
pop %r11
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'src': {'type': 'addresses_D', 'same': True, 'size': 16, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'dst': {'type': 'addresses_P', 'same': False, 'size': 2, 'congruent': 8, 'NT': False, 'AVXalign': True}, 'OP': 'STOR'}
[Faulty Load]
{'src': {'type': 'addresses_D', 'same': True, 'size': 8, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'dst': {'type': 'addresses_WC_ht', 'same': False, 'size': 8, 'congruent': 2, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_UC_ht', 'same': True, 'size': 2, 'congruent': 1, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_normal_ht', 'same': False, 'size': 4, 'congruent': 4, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_A_ht', 'same': False, 'size': 16, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'src': {'type': 'addresses_WT_ht', 'same': False, 'size': 16, 'congruent': 9, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_normal_ht', 'same': False, 'size': 8, 'congruent': 7, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_WT_ht', 'same': False, 'size': 2, 'congruent': 1, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_D_ht', 'same': False, 'size': 8, 'congruent': 10, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'36': 21829}
36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36
*/
| 38.280255 | 2,999 | 0.654742 |
dd92ac440589c135eb00fba2115250ba17a492cf | 7,009 | asm | Assembly | scripts/Route17.asm | AmateurPanda92/pokemon-rby-dx | f7ba1cc50b22d93ed176571e074a52d73360da93 | [
"MIT"
] | 9 | 2020-07-12T19:44:21.000Z | 2022-03-03T23:32:40.000Z | scripts/Route17.asm | JStar-debug2020/pokemon-rby-dx | c2fdd8145d96683addbd8d9075f946a68d1527a1 | [
"MIT"
] | 7 | 2020-07-16T10:48:52.000Z | 2021-01-28T18:32:02.000Z | scripts/Route17.asm | JStar-debug2020/pokemon-rby-dx | c2fdd8145d96683addbd8d9075f946a68d1527a1 | [
"MIT"
] | 2 | 2021-03-28T18:33:43.000Z | 2021-05-06T13:12:09.000Z | Route17_Script:
call EnableAutoTextBoxDrawing
ld hl, Route17TrainerHeader0
ld de, Route17_ScriptPointers
ld a, [wRoute17CurScript]
call ExecuteCurMapScriptInTable
ld [wRoute17CurScript], a
ret
Route17_ScriptPointers:
dw CheckFightingMapTrainers
dw DisplayEnemyTrainerTextAndStartBattle
dw EndTrainerBattle
Route17_TextPointers:
dw Route17Text1
dw Route17Text2
dw Route17Text3
dw Route17Text4
dw Route17Text5
dw Route17Text6
dw Route17Text7
dw Route17Text8
dw Route17Text9
dw Route17Text10
dw Route17Text11
dw Route17Text12
dw Route17Text13
dw Route17Text14
dw Route17Text15
dw Route17Text16
Route17TrainerHeader0:
dbEventFlagBit EVENT_BEAT_ROUTE_17_TRAINER_0
db ($3 << 4) ; trainer's view range
dwEventFlagAddress EVENT_BEAT_ROUTE_17_TRAINER_0
dw Route17BattleText1 ; TextBeforeBattle
dw Route17AfterBattleText1 ; TextAfterBattle
dw Route17EndBattleText1 ; TextEndBattle
dw Route17EndBattleText1 ; TextEndBattle
Route17TrainerHeader1:
dbEventFlagBit EVENT_BEAT_ROUTE_17_TRAINER_1
db ($4 << 4) ; trainer's view range
dwEventFlagAddress EVENT_BEAT_ROUTE_17_TRAINER_1
dw Route17BattleText2 ; TextBeforeBattle
dw Route17AfterBattleText2 ; TextAfterBattle
dw Route17EndBattleText2 ; TextEndBattle
dw Route17EndBattleText2 ; TextEndBattle
Route17TrainerHeader2:
dbEventFlagBit EVENT_BEAT_ROUTE_17_TRAINER_2
db ($4 << 4) ; trainer's view range
dwEventFlagAddress EVENT_BEAT_ROUTE_17_TRAINER_2
dw Route17BattleText3 ; TextBeforeBattle
dw Route17AfterBattleText3 ; TextAfterBattle
dw Route17EndBattleText3 ; TextEndBattle
dw Route17EndBattleText3 ; TextEndBattle
Route17TrainerHeader3:
dbEventFlagBit EVENT_BEAT_ROUTE_17_TRAINER_3
db ($4 << 4) ; trainer's view range
dwEventFlagAddress EVENT_BEAT_ROUTE_17_TRAINER_3
dw Route17BattleText4 ; TextBeforeBattle
dw Route17AfterBattleText4 ; TextAfterBattle
dw Route17EndBattleText4 ; TextEndBattle
dw Route17EndBattleText4 ; TextEndBattle
Route17TrainerHeader4:
dbEventFlagBit EVENT_BEAT_ROUTE_17_TRAINER_4
db ($3 << 4) ; trainer's view range
dwEventFlagAddress EVENT_BEAT_ROUTE_17_TRAINER_4
dw Route17BattleText5 ; TextBeforeBattle
dw Route17AfterBattleText5 ; TextAfterBattle
dw Route17EndBattleText5 ; TextEndBattle
dw Route17EndBattleText5 ; TextEndBattle
Route17TrainerHeader5:
dbEventFlagBit EVENT_BEAT_ROUTE_17_TRAINER_5
db ($2 << 4) ; trainer's view range
dwEventFlagAddress EVENT_BEAT_ROUTE_17_TRAINER_5
dw Route17BattleText6 ; TextBeforeBattle
dw Route17AfterBattleText6 ; TextAfterBattle
dw Route17EndBattleText6 ; TextEndBattle
dw Route17EndBattleText6 ; TextEndBattle
Route17TrainerHeader6:
dbEventFlagBit EVENT_BEAT_ROUTE_17_TRAINER_6
db ($4 << 4) ; trainer's view range
dwEventFlagAddress EVENT_BEAT_ROUTE_17_TRAINER_6
dw Route17BattleText7 ; TextBeforeBattle
dw Route17AfterBattleText7 ; TextAfterBattle
dw Route17EndBattleText7 ; TextEndBattle
dw Route17EndBattleText7 ; TextEndBattle
Route17TrainerHeader7:
dbEventFlagBit EVENT_BEAT_ROUTE_17_TRAINER_7, 1
db ($2 << 4) ; trainer's view range
dwEventFlagAddress EVENT_BEAT_ROUTE_17_TRAINER_7, 1
dw Route17BattleText8 ; TextBeforeBattle
dw Route17AfterBattleText8 ; TextAfterBattle
dw Route17EndBattleText8 ; TextEndBattle
dw Route17EndBattleText8 ; TextEndBattle
Route17TrainerHeader8:
dbEventFlagBit EVENT_BEAT_ROUTE_17_TRAINER_8, 1
db ($3 << 4) ; trainer's view range
dwEventFlagAddress EVENT_BEAT_ROUTE_17_TRAINER_8, 1
dw Route17BattleText9 ; TextBeforeBattle
dw Route17AfterBattleText9 ; TextAfterBattle
dw Route17EndBattleText9 ; TextEndBattle
dw Route17EndBattleText9 ; TextEndBattle
Route17TrainerHeader9:
dbEventFlagBit EVENT_BEAT_ROUTE_17_TRAINER_9, 1
db ($4 << 4) ; trainer's view range
dwEventFlagAddress EVENT_BEAT_ROUTE_17_TRAINER_9, 1
dw Route17BattleText10 ; TextBeforeBattle
dw Route17AfterBattleText10 ; TextAfterBattle
dw Route17EndBattleText10 ; TextEndBattle
dw Route17EndBattleText10 ; TextEndBattle
db $ff
Route17Text1:
TX_ASM
ld hl, Route17TrainerHeader0
call TalkToTrainer
jp TextScriptEnd
Route17BattleText1:
TX_FAR _Route17BattleText1
db "@"
Route17EndBattleText1:
TX_FAR _Route17EndBattleText1
db "@"
Route17AfterBattleText1:
TX_FAR _Route17AfterBattleText1
db "@"
Route17Text2:
TX_ASM
ld hl, Route17TrainerHeader1
call TalkToTrainer
jp TextScriptEnd
Route17BattleText2:
TX_FAR _Route17BattleText2
db "@"
Route17EndBattleText2:
TX_FAR _Route17EndBattleText2
db "@"
Route17AfterBattleText2:
TX_FAR _Route17AfterBattleText2
db "@"
Route17Text3:
TX_ASM
ld hl, Route17TrainerHeader2
call TalkToTrainer
jp TextScriptEnd
Route17BattleText3:
TX_FAR _Route17BattleText3
db "@"
Route17EndBattleText3:
TX_FAR _Route17EndBattleText3
db "@"
Route17AfterBattleText3:
TX_FAR _Route17AfterBattleText3
db "@"
Route17Text4:
TX_ASM
ld hl, Route17TrainerHeader3
call TalkToTrainer
jp TextScriptEnd
Route17BattleText4:
TX_FAR _Route17BattleText4
db "@"
Route17EndBattleText4:
TX_FAR _Route17EndBattleText4
db "@"
Route17AfterBattleText4:
TX_FAR _Route17AfterBattleText4
db "@"
Route17Text5:
TX_ASM
ld hl, Route17TrainerHeader4
call TalkToTrainer
jp TextScriptEnd
Route17BattleText5:
TX_FAR _Route17BattleText5
db "@"
Route17EndBattleText5:
TX_FAR _Route17EndBattleText5
db "@"
Route17AfterBattleText5:
TX_FAR _Route17AfterBattleText5
db "@"
Route17Text6:
TX_ASM
ld hl, Route17TrainerHeader5
call TalkToTrainer
jp TextScriptEnd
Route17BattleText6:
TX_FAR _Route17BattleText6
db "@"
Route17EndBattleText6:
TX_FAR _Route17EndBattleText6
db "@"
Route17AfterBattleText6:
TX_FAR _Route17AfterBattleText6
db "@"
Route17Text7:
TX_ASM
ld hl, Route17TrainerHeader6
call TalkToTrainer
jp TextScriptEnd
Route17BattleText7:
TX_FAR _Route17BattleText7
db "@"
Route17EndBattleText7:
TX_FAR _Route17EndBattleText7
db "@"
Route17AfterBattleText7:
TX_FAR _Route17AfterBattleText7
db "@"
Route17Text8:
TX_ASM
ld hl, Route17TrainerHeader7
call TalkToTrainer
jp TextScriptEnd
Route17BattleText8:
TX_FAR _Route17BattleText8
db "@"
Route17EndBattleText8:
TX_FAR _Route17EndBattleText8
db "@"
Route17AfterBattleText8:
TX_FAR _Route17AfterBattleText8
db "@"
Route17Text9:
TX_ASM
ld hl, Route17TrainerHeader8
call TalkToTrainer
jp TextScriptEnd
Route17BattleText9:
TX_FAR _Route17BattleText9
db "@"
Route17EndBattleText9:
TX_FAR _Route17EndBattleText9
db "@"
Route17AfterBattleText9:
TX_FAR _Route17AfterBattleText9
db "@"
Route17Text10:
TX_ASM
ld hl, Route17TrainerHeader9
call TalkToTrainer
jp TextScriptEnd
Route17BattleText10:
TX_FAR _Route17BattleText10
db "@"
Route17EndBattleText10:
TX_FAR _Route17EndBattleText10
db "@"
Route17AfterBattleText10:
TX_FAR _Route17AfterBattleText10
db "@"
Route17Text11:
TX_FAR _Route17Text11
db "@"
Route17Text12:
TX_FAR _Route17Text12
db "@"
Route17Text13:
TX_FAR _Route17Text13
db "@"
Route17Text14:
TX_FAR _Route17Text14
db "@"
Route17Text15:
TX_FAR _Route17Text15
db "@"
Route17Text16:
TX_FAR _Route17Text16
db "@"
| 21.368902 | 52 | 0.829362 |
342576309213c9c9800e2b9633f08f4382bc1779 | 2,029 | asm | Assembly | Source/Levels/L0609.asm | AbePralle/FGB | 52f004b8d9d4091a2a242a012dc8c1f90d4c160d | [
"MIT"
] | null | null | null | Source/Levels/L0609.asm | AbePralle/FGB | 52f004b8d9d4091a2a242a012dc8c1f90d4c160d | [
"MIT"
] | null | null | null | Source/Levels/L0609.asm | AbePralle/FGB | 52f004b8d9d4091a2a242a012dc8c1f90d4c160d | [
"MIT"
] | null | null | null | ; L0609.asm outback farm
; Generated 11.05.2000 by mlevel
; Modified 11.05.2000 by Abe Pralle
INCLUDE "Source/Defs.inc"
INCLUDE "Source/Levels.inc"
WATERINDEX EQU 4
VAR_WATER EQU 0
;---------------------------------------------------------------------
SECTION "Level0609Section",ROMX
;---------------------------------------------------------------------
L0609_Contents::
DW L0609_Load
DW L0609_Init
DW L0609_Check
DW L0609_Map
;---------------------------------------------------------------------
; Load
;---------------------------------------------------------------------
L0609_Load:
DW ((L0609_LoadFinished - L0609_Load2)) ;size
L0609_Load2:
call ParseMap
ret
L0609_LoadFinished:
;---------------------------------------------------------------------
; Map
;---------------------------------------------------------------------
L0609_Map:
INCBIN "Data/Levels/L0609_outback.lvl"
;---------------------------------------------------------------------
; Init
;---------------------------------------------------------------------
L0609_Init:
DW ((L0609_InitFinished - L0609_Init2)) ;size
L0609_Init2:
ld a,[bgTileMap + WATERINDEX]
ld [levelVars + VAR_WATER],a
ret
L0609_InitFinished:
;---------------------------------------------------------------------
; Check
;---------------------------------------------------------------------
L0609_Check:
DW ((L0609_CheckFinished - L0609_Check2)) ;size
L0609_Check2:
call ((.animateWater-L0609_Check2)+levelCheckRAM)
ret
.animateWater
ldio a,[updateTimer]
swap a
and %11
ld hl,levelVars + VAR_WATER
add [hl]
ld [bgTileMap + WATERINDEX],a
ret
L0609_CheckFinished:
PRINT "0609 Script Sizes (Load/Init/Check) (of $500): "
PRINT (L0609_LoadFinished - L0609_Load2)
PRINT " / "
PRINT (L0609_InitFinished - L0609_Init2)
PRINT " / "
PRINT (L0609_CheckFinished - L0609_Check2)
PRINT "\n"
| 27.053333 | 70 | 0.426811 |
134459625d51bde8c097eb41a36e38d38d3cca55 | 760 | asm | Assembly | asm/showtext/main.asm | BoKoIsMe/J1900_FreeBSD | 19c4f7f01a37f4eda11a64040dad307a06563fb9 | [
"BSD-2-Clause"
] | null | null | null | asm/showtext/main.asm | BoKoIsMe/J1900_FreeBSD | 19c4f7f01a37f4eda11a64040dad307a06563fb9 | [
"BSD-2-Clause"
] | null | null | null | asm/showtext/main.asm | BoKoIsMe/J1900_FreeBSD | 19c4f7f01a37f4eda11a64040dad307a06563fb9 | [
"BSD-2-Clause"
] | null | null | null | .286
.model small,stdcall
include showtext.inc
includelib showtext.lib
drawChar proto,location:WORD,char:BYTE,color:BYTE
.data
currentPosition COORD <0,0>
szString db "Welcom to the ASM world.",0dh,0ah,0
LENSTRING EQU $ - szString
.stack 200h
.code
.startup
push ds
pop es
mov ah,0002h
int 10h
mov ax,10
mov currentPosition.X,ax
mov ax,12
mov currentPosition.Y,ax
mov si,offset szString
mov cx,LENSTRING - 3
@@:
invoke drawChar,offset currentPosition,[si],foreGroundYellow or highlight or backGroundBlue
inc currentPosition.X
.IF currentPosition.X == 79
mov currentPosition.X,0
inc currentPosition.Y
.ENDIF
.IF currentPosition.Y == 24
mov currentPosition.Y,0
.ENDIF
inc si
loop @B
.exit
end
| 19 | 93 | 0.717105 |
59fd2e53ab77246c06d8db1c21f90c4b710321bc | 330 | asm | Assembly | oeis/005/A005856.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/005/A005856.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/005/A005856.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A005856: The coding-theoretic function A(n,10,8).
; 1,1,1,1,1,2,2,3,4,6,9,12,17,21
mov $2,$0
lpb $0
sub $2,5
mov $0,$2
add $1,1
lpb $2
add $1,1
lpb $2
mov $4,$3
cmp $4,0
add $3,$4
sub $0,$3
sub $1,$3
add $1,$0
trn $2,2
lpe
trn $2,8
lpe
lpe
mov $0,$1
add $0,1
| 13.2 | 51 | 0.457576 |
c6657dc9b1a33f56e8d1a8d859729dd0d52edb37 | 416 | asm | Assembly | programs/oeis/332/A332126.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/332/A332126.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/332/A332126.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A332126: a(n) = 2*(10^(2n+1)-1)/9 + 4*10^n.
; 6,262,22622,2226222,222262222,22222622222,2222226222222,222222262222222,22222222622222222,2222222226222222222,222222222262222222222,22222222222622222222222,2222222222226222222222222,222222222222262222222222222,22222222222222622222222222222,2222222222222226222222222222222
mov $1,10
pow $1,$0
mul $1,5
add $1,5
bin $1,2
sub $1,45
div $1,45
mul $1,8
add $1,6
mov $0,$1
| 29.714286 | 273 | 0.793269 |
6fd28ac31142f526d3111c590137adf17778f223 | 35,067 | asm | Assembly | s3d/music-original/Credits.asm | Cancer52/flamedriver | 9ee6cf02c137dcd63e85a559907284283421e7ba | [
"0BSD"
] | 9 | 2017-10-09T20:28:45.000Z | 2021-06-29T21:19:20.000Z | s3d/music-original/Credits.asm | Cancer52/flamedriver | 9ee6cf02c137dcd63e85a559907284283421e7ba | [
"0BSD"
] | 12 | 2018-08-01T13:52:20.000Z | 2022-02-21T02:19:37.000Z | s3d/music-original/Credits.asm | Cancer52/flamedriver | 9ee6cf02c137dcd63e85a559907284283421e7ba | [
"0BSD"
] | 2 | 2018-02-17T19:50:36.000Z | 2019-10-30T19:28:06.000Z | Snd_Credits_Header:
smpsHeaderStartSong 3
smpsHeaderVoice Snd_Credits_Voices
smpsHeaderChan $06, $03
smpsHeaderTempo $01, $40
smpsHeaderDAC Snd_Credits_DAC
smpsHeaderFM Snd_Credits_FM1, $00, $12
smpsHeaderFM Snd_Credits_FM2, $F4, $19
smpsHeaderFM Snd_Credits_FM3, $F4, $18
smpsHeaderFM Snd_Credits_FM4, $00, $13
smpsHeaderFM Snd_Credits_FM5, $00, $12
smpsHeaderPSG Snd_Credits_PSG1, $DC, $02, $00, $00
smpsHeaderPSG Snd_Credits_PSG2, $DC, $02, $00, $00
smpsHeaderPSG Snd_Credits_PSG3, $23, $02, $00, $00
; FM1 Data
Snd_Credits_FM1:
smpsSetvoice $00
smpsPan panCenter, $00
smpsModSet $07, $01, $03, $05
dc.b nA3, $0C, nRst, $08, nA4, $04, nRst, $08, nA4, $04, nG4, $08
dc.b nA4, $06, nRst, $0A, nG3, $0C, nA3, nC4, nRst, $08, nC4, $04
dc.b nRst, $08, nBb4, $04, nC4, $08, nRst, $04, nC4, $08, nC5, $04
dc.b nRst, $0C, nC4, nC5, nC4, nF3, $08, nF4, $04, nRst, $08, nE4
dc.b $04, nF3, $0C, nE4, $08, nF4, $04, nRst, $0C, nF3, nF4, nE3
dc.b nRst, nE3, $04, nRst, nE5, nF3, nRst, nD5, nE5, $08, nRst, $04
dc.b nE3, $08, nE5, $04, nE3, $0C, nE3, nE3, $08, nB4, $04, nA3
dc.b $0C, nRst, $08, nA4, $04, nRst, $0C, nA3, $08, nG4, $04, nRst
dc.b $08, nG4, $04, nA4, nRst, $08, nG4, nC3, $04, nC4, $0C, smpsNoAttack
dc.b $04, nRst, $08, nC4, nC3, $04, nD4, $08, nRst, $04, nD4, $08
dc.b nD3, $04, nE4, $0C, nE4, nC4, nC4, nF4, $18, nE4, $03, nF4
dc.b $09, nE4, $18, $03, nF4, $09, nE4, $0C, nD4, smpsNoAttack, nD4, $14
dc.b nD3, $04, nG4, $03, nA4, $09, nG4, $18
smpsSetvoice $01
dc.b nG2, $02, nA2, nB2, nC3, nD3, nE3, nFs4, nF4, nE4, nD4, nC4
dc.b nB3, nA3, nG3, nFs3, nE3, nD3, nC3
Snd_Credits_Jump05:
dc.b nA2, $08, nRst, $0C, nA3, $04, nRst, $08, nA3, $04, nG3, $08
dc.b nA3, $04, nRst, $0C, nG2, nA2, nA2, $08, nG3, $04, nC3, $08
dc.b nC4, $04, nRst, $08, nBb3, $04, nC3, $08, nRst, $04, nC3, $08
dc.b nC4, $04, nRst, $0C, nC3, nC4, nC3, $08, nC4, $04, nF2, $08
dc.b nF3, $04, nRst, $08, nE3, $04, nF2, $0C, nE3, $08, nF3, $04
dc.b nRst, $0C, nF2, nF3, nE2, smpsNoAttack, nE2, $04, nRst, nE2, $08, nRst
dc.b $04, nE4, nF2, $08, nD4, $04, nE4, $08, nRst, $04, nE2, $08
dc.b nE4, $04, nE2, $0C, nE2, nE2, $08, nB3, $04, nA2, $08, nRst
dc.b $0C, nA3, $04, nRst, $0C, nA2, $08, nG3, $04, nRst, $08, nG3
dc.b $04, nA3, $06, nRst, nG3, $08, nC2, $04, nC3, $0C, smpsNoAttack, $04
dc.b nRst, $08, nC3, nC2, $04, nD3, $08, nRst, $04, nD3, $08, nD2
dc.b $04, nE3, $0C, nE3, nC3, nC3, nF2, nF2, $04, nRst, nF3, nRst
dc.b $0C, nF2, $08, nF3, $04, nRst, $08, nF3, $04, nF2, $08, nRst
dc.b $04, nF2, $08, nRst, $04, nE2, $0C, smpsNoAttack, $04, nRst, $08, nE2
dc.b $04, nRst, nE3, nRst, $0C, nE2, $08, nE3, $04, nRst, $08, nE3
dc.b $04, nE2, $0C, nE2, nE2, $08, nE3, $04, nD2, $08, nRst, $0C
dc.b nA3, $04, nRst, $08, nA3, $04, nG3, $08, nA3, $04, nRst, $0C
dc.b nG2, nD2, nC2, nRst, $08, nC3, $04, nRst, $08, nBb3, $04, nC3
dc.b $08, nRst, $04, nC3, $08, nC4, $04, nRst, $0C, nC3, nC4, nC3
dc.b $08, nC4, $04, nD2, $08, nRst, $0C, nA3, $04, nRst, $08, nA3
dc.b $04, nG3, $08, nA3, $04, nRst, $0C, nG2, nD2, nC2, nRst, $08
dc.b nC3, $04, nRst, $08, nBb3, $04, nC3, $08, nRst, $04, nC3, $08
dc.b nC4, $04, nRst, $0C, nC3, nC4, nC3, $08, nC4, $04, nD2, $08
dc.b nRst, $0C, nA3, $04, nRst, $0C, nA2, $08, nG3, $04, nRst, $08
dc.b nG3, $04, nA3, nRst, $08, nD3, $0C, nC3, smpsNoAttack, nC3, $04, nRst
dc.b $08, nC3, nC2, $04, nD3, $08, nRst, $04, nD3, $08, nD2, $04
dc.b nE3, $0C, nE3, nC3, nB2, smpsNoAttack, nB2, $04, nRst, $08, nB1, $04
dc.b nRst, nB2, nRst, $0C, nB1, $08, nB2, $04, nRst, $08, nB2, $04
dc.b nB1, $08, nRst, $04, nB1, $08, nRst, $04, nE2, $0C, smpsNoAttack, $04
dc.b nRst, $08, nE2, $04, nRst, nE3, nRst, $08, nE2, $04, nRst, $08
dc.b nE3, $04, nRst, $08, nE3, $04, nE2, $08, nRst, $04, nE2, $08
dc.b nRst, $04, nE2, $08, nE3, $04, nA2, $08, nRst, $0C, nA3, $04
dc.b nRst, $08, nA3, $04, nG3, $08, nA3, $04, nRst, $0C, nG2, nA2
dc.b nC3, nRst, $08, nC3, $04, nRst, $08, nBb3, $04, nC3, $08, nRst
dc.b $04, nC3, $08, nC4, $04, nRst, $0C, nC3, nC4, nC3, $08, nC4
dc.b $04, nF2, $08, nF3, $04, nRst, $08, nE3, $04, nF2, $0C, nE3
dc.b $08, nF3, $04, nRst, $0C, nF2, nF3, nE2, nRst, nE2, $04, nRst
dc.b nE4, nF2, nRst, nD4, nE4, $08, nRst, $04, nE2, $08, nE4, $04
dc.b nE2, $08, nRst, $04, nE2, $08, nRst, $04, nE2, $08, nB3, $04
dc.b nA2, $08, nRst, $0C, nA3, $04, nRst, $0C, nA2, $08, nG3, $04
dc.b nRst, $08, nG3, $04, nA3, nRst, $08, nG3, nC2, $04, nC3, $0C
dc.b smpsNoAttack, $04, nRst, $08, nC3, nC2, $04, nD3, $08, nRst, $04, nD3
dc.b $08, nD2, $04, nE3, $0C, nE3, nC3, nC3, nF2, nF2, $04, nRst
dc.b nF3, nRst, $0C, nE2, $04, nRst, nE3, nRst, $08, nE3, $04, nE2
dc.b $0C, nE2, nD2, smpsNoAttack, nD2, $04, nRst, $08, nD2, $04, nRst, nD3
dc.b nRst, $0C, nG2, $08, nG3, $04, nRst, $08, nG3, $04, nG2, $0C
dc.b nG2, nG2, $06, nG3
smpsJump Snd_Credits_Jump05
; FM2 Data
Snd_Credits_FM2:
smpsSetvoice $02
smpsPan panLeft, $00
smpsModSet $07, $01, $03, $05
dc.b nRst, $0C, nG4, $04, nRst, $10, nG4, $04, nRst, $0C, nG4, $06
dc.b nRst, $0E, nG4, $04, nRst, $0C, nF4, smpsNoAttack, nF4, nBb4, $04, nRst
dc.b $10, nF4, $04, nRst, $0C, nF4, $06, nRst, $0E, nF4, $06, nRst
dc.b $16, nRst, $0C, nG4, $06, nRst, $0E, nG4, $04, nRst, $0C, nG4
dc.b $06, nRst, $0E, nG4, $04, nRst, $0C, nA4, nRst, nA4, $06, nRst
dc.b $0E, nA4, $04, nRst, $0C, nAb4, $06, nRst, $0E, nAb4, $0C, nRst
dc.b $04, nAb4, nRst, $08, nRst, $0C, nG4, $04, nRst, $10, nG4, $04
dc.b nRst, $0C, nG4, $06, nRst, $0E, nG4, $04, nRst, $0C, nF4, smpsNoAttack
dc.b nF4, nF4, $04, nRst, $10, nF4, $04, nRst, $0C, nBb4, $06, nRst
dc.b nBb4, nRst, nEb5, $04, nRst, $14, nRst, $0C, nG4, $06, nRst, $0E
dc.b nG4, $04, nRst, $0C, nG4, $06, nRst, $0E, nG4, $04, nRst, $18
dc.b nRst, $08, nG4, $04, nRst, $0C, nG4, $0C, nRst, $08, nF4, $04
dc.b nRst, $0C, nF4, $0C, nRst, $08
smpsSetvoice $06
dc.b nG3, $02, nA3, nB3, nC4, nD4, nE4, nF4, nG4
Snd_Credits_Jump04:
smpsSetvoice $06
smpsFMAlterVol $F9
smpsPan panRight, $00
dc.b nB5, $10, nC5, $04, nRst, nC3, nRst, nC5, nRst, $08, nC5, $04
smpsSetvoice $02
smpsFMAlterVol $07
smpsPan panLeft, $00
dc.b nG4, $06, nRst, $0E, nG4, $04, nRst, $0C, nF4, $0C, smpsNoAttack, nF4
dc.b $0C, nBb4, $04, nRst, $08
smpsSetvoice $06
smpsFMAlterVol $F9
smpsPan panRight, $00
dc.b nC5, $08, nRst, $04, nC5, $08, nRst, $04, nC3, nRst, nC5, nRst
dc.b $08, nC5, $04, nRst, $18, nRst, $0C, nF3, $03, nG3, nA3, nB3
dc.b nG5, $0C, nC5, $08, nRst, $04
smpsSetvoice $02
smpsFMAlterVol $07
smpsPan panLeft, $00
dc.b nG4, $06, nRst, $0E, nG4, $04, nRst, $0C, nA4, $0C, nRst, $14
dc.b nB2, $04, nD5, $08, nRst, $04, nD5, $08, nRst, $04
smpsSetvoice $06
smpsFMAlterVol $F9
smpsPan panRight, $00
dc.b nAb4, $06, nRst, $0E, nAb4, $0C, nRst, $04, nAb4, $04, nRst, $08
smpsSetvoice $02
smpsFMAlterVol $07
smpsPan panLeft, $00
dc.b nRst, $0C, nAb4, $06, nRst, $02
smpsSetvoice $06
smpsFMAlterVol $F9
smpsPan panRight, $00
dc.b nA4, $04, nC3, $04, nRst, $04, nA4, $04, nRst, $08, nA4, $04
smpsSetvoice $02
smpsFMAlterVol $07
smpsPan panLeft, $00
dc.b nAb4, $06, nRst, $0E, nAb4, $04, nRst, $0C, nF4, $0C, smpsNoAttack, nF4
dc.b $0C, nF4, $04, nRst, $14
smpsSetvoice $06
smpsFMAlterVol $F9
smpsPan panRight, $00
dc.b nC3, $04, nRst, nC5, nC3, nRst, nC5, nRst, $08, nC5, $04
smpsSetvoice $02
smpsFMAlterVol $07
smpsPan panLeft, $00
dc.b nEb5, $04, nRst, $14, nRst, $0C, nG4, $06, nRst, $0E, nG4, $04
dc.b nRst, $0C, nG4, $06, nRst, $0E, nG4, $04, nRst, $18, nRst, $08
dc.b nA4, $04, nRst, $08
smpsSetvoice $06
smpsFMAlterVol $F9
smpsPan panRight, $00
dc.b nB2, $04, nD5, $04, nRst, $04, nD5, $08
smpsSetvoice $02
smpsFMAlterVol $07
smpsPan panLeft, $00
dc.b nRst, $0C, nAb4, $0C
smpsSetvoice $06
smpsFMAlterVol $FC
smpsPan panRight, $00
dc.b nA5, $02, nG5, nF5, nE5, nD5, nC5, nB4, nA4, nG4, nF4, nE4
dc.b nD4, nC4, nB3, nA3, nG3, nA5, $0C
smpsSetvoice $02
smpsFMAlterVol $04
smpsPan panLeft, $00
dc.b nG4, $04, nRst, $10, nG4, $04, nRst, $0C, nG4, $06, nRst, $0E
dc.b nG4, $04, nRst, $18, nRst, $0C, nD4, $04, nRst, $10, nC4, $04
dc.b nRst, $0C, nD4, $06, nRst, $2A
smpsSetvoice $06
smpsFMAlterVol $F9
smpsPan panRight, $00
dc.b nRst, $0C, nA2, $04, nB2, nC3, nA5, $0C
smpsSetvoice $02
smpsFMAlterVol $07
smpsPan panLeft, $00
dc.b nRst, $0C, nG4, $06, nRst, $0E, nG4, $04, nRst, $18, nRst, $0C
dc.b nG4, $04, nRst, $10, nC4, $04, nRst, $0C, nD4, $06, nRst, $02
dc.b nD6, $06, nRst, $06, nG4, $06, nRst, $0A
smpsSetvoice $06
smpsFMAlterVol $F9
smpsPan panRight, $00
dc.b nA2, $04, nB2, $04, nC3, $04, nA5, $0C
smpsSetvoice $02
smpsFMAlterVol $07
smpsPan panLeft, $00
dc.b nG4, $04, nRst, $10, nG4, $04, nRst, $0C, nG4, $06, nRst, $0E
dc.b nG4, $04, nRst, $18, nRst, $0C, nG4, $04, nRst, $10, nG4, $04
dc.b nRst, $0C, nG4, $06, nRst, $2A, nRst, $60
smpsSetvoice $06
smpsFMAlterVol $F9
smpsPan panRight, $00
dc.b nRst, $12, nE3, $06, nRst, $12, nE3, $06, nRst, $0C, nE3, nRst
dc.b $06, nE3, nRst, $0C
smpsSetvoice $02
smpsFMAlterVol $07
smpsPan panLeft, $00
dc.b nRst, $0C, nG4, $04, nRst, $10, nG4, $04, nRst, $08, nA3, $04
dc.b nG4, $06, nRst, $02, nA5, $06, nRst, nG4, $04, nRst, $0C, nF4
dc.b $0C, smpsNoAttack, nF4, $0C, nBb4, $04, nRst, $10, nF4, $04, nRst, $0C
dc.b nF4, $06, nRst, $0E, nF4, $06, nRst, $16, nRst, $0C, nG4, $06
dc.b nRst, $0E, nG4, $04, nRst, $0C, nG4, $06, nRst, $0E, nG4, $04
dc.b nRst, $0C, nA4, $0C, nRst, $0C, nA4, $04
smpsSetvoice $06
smpsFMAlterVol $F9
smpsPan panRight, $00
dc.b nB2, $04, nRst, $04, nD5, $08, nRst, $04, nD5, $08, nRst, $04
smpsSetvoice $02
smpsFMAlterVol $07
smpsPan panLeft, $00
dc.b nAb4, $06, nRst, $0E, nAb4, $0C, nRst, $04, nAb4, nRst, $08, nRst
dc.b $0C, nG4, $04, nRst, $10, nG4, $04, nRst, $08, nA3, $04, nG4
dc.b $06, nRst, $02, nA5, $06, nRst, nG4, $04, nRst, $0C, nF4, $0C
dc.b smpsNoAttack, nF4, $0C, nF4, $04, nRst, $10, nF4, $04, nRst, $0C, nBb4
dc.b $06, nRst, nBb4, nRst, nEb5, $04, nRst, $14, nRst, $0C, nG4, $06
dc.b nRst, $0E, nG4, $04, nRst, $0C, nG4, $06, nRst, $0E, nG4, $04
dc.b nRst, $18, nRst, $08, nF4, $04, nRst, $0C, nF4, nRst, $08, nF4
dc.b $04, nRst, $0C, nF4, nRst, $08, nF4, $04, nRst, $0C
smpsJump Snd_Credits_Jump04
; FM3 Data
Snd_Credits_FM3:
smpsSetvoice $02
smpsPan panLeft, $00
smpsModSet $07, $01, $03, $05
dc.b nRst, $0C, nC5, $04, nRst, $08, nA3, $04, nRst, nC5, nRst, $08
dc.b nA3, $04, nC5, $06, nRst, $0E, nC5, $04, nG3, $0C, nD5, smpsNoAttack
dc.b nD5, nC5, $04, nRst, $08, nC4, $06, nRst, $02, nC5, $04, nRst
dc.b $08, nBb3, $04, nC5, $06, nRst, $0E, nC5, $06, nRst, $16, nRst
dc.b $0C, nE5, $06, nRst, nF2, $04, nRst, nC5, nRst, $0C, nC5, $06
dc.b nRst, $0E, nC5, $04, nRst, $0C, nD5, nRst, nD5, $06, nRst, nB3
dc.b $04, nRst, nD5, nB3, nRst, $08, nG5, $06, nRst, $0E, nG5, $0C
dc.b nRst, $04, nF5, nRst, nA3, nRst, $0C, nC5, $04, nRst, $08, nA3
dc.b $04, nRst, nC5, nRst, $08, nA3, $04, nC5, $06, nRst, $0E, nC5
dc.b $04, nG3, $0C, nD5, smpsNoAttack, nD5, nC5, $04, nRst, $10, nC5, $04
dc.b nRst, $08, nBb3, $04, nA5, $06, nRst, nG5, nRst, $02, nC4, $04
dc.b nE5, $06, nRst, nD5, nRst, $02, nC5, $04, nRst, $0C, nE5, $06
dc.b nRst, nF2, nRst, $02, nC5, $04, nRst, $0C, nD5, $06, nRst, $0E
dc.b nD5, $04, nRst, $18, nRst, $08, nC5, $04, nRst, $0C, nC5, nRst
dc.b $08, nC5, $04, nRst, $0C, nC5, nRst, $08, nC5, $04, nRst, $0C
Snd_Credits_Jump03:
dc.b nRst, nC5, $04, nRst, $08, nA3, $04, nRst, nC5, nRst, $08, nA3
dc.b $04, nC5, $06, nRst, $0E, nC5, $04, nG3, $0C, nD5, smpsNoAttack, nD5
dc.b nC5, $04, nRst, $08, nC4, $06, nRst, $02, nC5, $04, nRst, $08
dc.b nBb3, $04, nC5, $06, nRst, $0E, nC5, $06, nRst, $16, nRst, $0C
dc.b nE5, $06, nRst, nF2, $04, nRst, nC5, nRst, $0C, nC5, $06, nRst
dc.b $0E, nC5, $04, nRst, $0C, nD5, nRst, nD5, $06, nRst, nB3, $04
dc.b nRst, nD5, nB3, nRst, $08, nG5, $06, nRst, $0E, nG5, $0C, nRst
dc.b $04, nF5, nRst, nA3, nA2, $0C, nE5, $06, nRst, nA3, $04, nRst
dc.b nE5, nRst, $08, nA3, $04, nE5, $06, nRst, $0E, nE5, $04, nRst
dc.b $08, nA3, $04, nD5, $0C, nC3, $04, nRst, $08, nC5, $04, nRst
dc.b $10, nC5, $04, nRst, $08, nBb3, $04, nA5, $06, nRst, nG5, nRst
dc.b $02, nC4, $04, nE5, $06, nRst, nD5, nRst, $02, nC5, $04, nRst
dc.b $0C, nE5, $06, nRst, nF2, nRst, $02, nC5, $04, nRst, $0C, nC5
dc.b $06, nRst, $0E, nC5, $04, nRst, $18, nRst, $08, nD5, $04, nRst
dc.b $0C, nD5, nRst, $08, nD5, $04, nRst, $0C, nD5, nRst, $08, nD5
dc.b $04, nRst, $0C, nRst, nC5, $04, nRst, $08, nA3, $04, nRst, nC5
dc.b nRst, $08, nA3, $04, nC5, $06, nRst, $0E, nC5, $04, nG3, $0C
dc.b nRst, nRst, nG4, $04, nRst, $08, nC3, $06, nRst, $02, nG4, $04
dc.b nRst, $08, nG3, $04, nG4, $06, nRst, $02, nG5, $04, nA5, $06
dc.b nRst, $02, nC6, $04, nRst, $18, nRst, $0C, nC5, $04, nRst, $08
dc.b nA3, $04, nRst, nC5, nRst, $08, nA3, $04, nC5, $06, nRst, $0E
dc.b nC5, $04, nG3, $0C, nRst, nRst, nD5, $04, nRst, $08, nC3, $06
dc.b nRst, $02, nD5, $04, nRst, $08, nG3, $04, nG4, $06, nRst, $02
dc.b nG6, $06, nRst, nE6, nRst, $0A, nD6, $06, nRst, $02, nC6, $04
dc.b nRst, $0C, nC5, $04, nRst, $08, nA3, $04, nRst, nC5, nRst, $08
dc.b nA3, $04, nC5, $06, nRst, $0E, nC5, $04, nG3, $0C, nRst, nRst
dc.b nD5, $04, nRst, $08, nC3, $06, nRst, $02, nD5, $04, nRst, $08
dc.b nG3, $04, nD5, $06, nRst, $02, nG5, $04, nA5, $06, nRst, $02
dc.b nC6, $04, nRst, $18, nRst, $60, nRst, nRst, $0C, nC5, $04, nRst
dc.b $08, nA3, $04, nRst, nG6, nRst, $08, nE6, $04, nC5, $06, nRst
dc.b $02, nD6, $06, nRst, nC6, $04, nG3, $0C, nD5, smpsNoAttack, nD5, nC5
dc.b $04, nRst, $08, nC4, $06, nRst, $02, nC5, $04, nRst, $08, nBb3
dc.b $04, nC5, $06, nRst, $0E, nC5, $06, nRst, $16, nRst, $0C, nE5
dc.b $06, nRst, nF2, $04, nRst, nC5, nRst, $0C, nC5, $06, nRst, $0E
dc.b nC5, $04, nRst, $0C, nD5, nRst, nD5, $06, nRst, nB3, $04, nRst
dc.b nD5, nB3, nRst, $08, nG5, $06, nRst, $0E, nG5, $0C, nRst, $04
dc.b nF5, nRst, nA3, nRst, $0C, nC5, $04, nRst, $08, nA3, $04, nRst
dc.b nG6, nRst, $08, nE6, $04, nC5, $06, nRst, $02, nD6, $06, nRst
dc.b nC6, $04, nG3, $0C, nD5, smpsNoAttack, nD5, nC5, $04, nRst, $10, nC5
dc.b $04, nRst, $08, nBb3, $04, nA5, $06, nRst, nG5, nRst, $02, nC4
dc.b $04, nE5, $06, nRst, nD5, nRst, $02, nC5, $04, nRst, $0C, nE5
dc.b $06, nRst, nF2, nRst, $02, nC5, $04, nRst, $0C, nC5, $06, nRst
dc.b $0E, nC5, $04, nRst, $18, nRst, $08, nC5, $04, nRst, $0C, nC5
dc.b nRst, $08, nC5, $04, nRst, $0C, nC5, nRst, $08, nC5, $04, nRst
dc.b $0C
smpsJump Snd_Credits_Jump03
; FM4 Data
Snd_Credits_FM4:
smpsModSet $07, $01, $03, $05
smpsSetvoice $03
smpsPan panRight, $00
dc.b nG4, $24, $06, nRst, $12, nG4, $06, nRst, $12, nBb4, $0C, smpsNoAttack
dc.b $30, $18, nBb4, nA4, $2A, nRst, $12, nA4, $06, nRst, $12, nA4
dc.b $0C, smpsNoAttack, $24, nAb4, $3C
smpsSetvoice $04
smpsAlterPitch $F4
smpsFMAlterVol $04
smpsPan panCenter, $00
dc.b nB6, $3C, nG6, $0C, nE6, $0C, nA6, $0C, smpsNoAttack, nA6, $3C, nG6
dc.b $0C, nE6, $18
smpsSetvoice $03
smpsAlterPitch $0C
smpsFMAlterVol $FC
smpsPan panRight, $00
dc.b nRst, $0C, nG4, $02, nA4, $0A, nG4, $0C, nC4, $18, nD4, $02
dc.b nE4, $0A, nD4, $0C, nG3, smpsNoAttack, nG3, $30, nRst
Snd_Credits_Jump02:
smpsSetvoice $07
smpsFMAlterVol $06
smpsPan panLeft, $00
dc.b nD5, $10, nG4, $04, nRst, $0C, nG4, $04, nRst, $08, nG4, $04
smpsSetvoice $03
smpsFMAlterVol $FA
smpsPan panRight, $00
dc.b nRst, $08, nG4, $04, nA4, $08, nC5, $08, nRst, $14
smpsSetvoice $07
smpsFMAlterVol $06
smpsPan panLeft, $00
dc.b nRst, $18, nF4, $08, nRst, $04, nF4, $08, nRst, $0C, nG4, $04
dc.b nRst, $08, nG4, $04, nRst, $18, nRst, $18, nA4, $0C, nE4, $08
dc.b nRst, $0C
smpsSetvoice $03
smpsFMAlterVol $FA
smpsPan panRight, $00
dc.b nG4, $04, nA4, $08, nC5, $08, nRst, $14
smpsSetvoice $07
smpsFMAlterVol $06
smpsPan panLeft, $00
dc.b nRst, $18, nE4, $08, nRst, $04, nE4, $08, nRst, $34
smpsSetvoice $03
smpsFMAlterVol $FA
smpsPan panRight, $00
dc.b nRst, $08, nAb4, $04, nRst, $08
smpsSetvoice $07
smpsFMAlterVol $06
smpsPan panLeft, $00
dc.b nE4, $04, nRst, $08, nE4, $04, nRst, $08, nE4, $04, nRst, $08
smpsSetvoice $03
smpsFMAlterVol $FA
smpsPan panRight, $00
dc.b nAb4, $04, nRst, $24
smpsSetvoice $07
smpsFMAlterVol $06
smpsPan panLeft, $00
dc.b nRst, $2C, nG4, $04, nRst, $08, nG4, $04, nRst, $08, nG4, $04
dc.b nRst, $18
smpsSetvoice $03
smpsFMAlterVol $FA
smpsPan panRight, $00
dc.b nRst, $08, nG4, $04, nRst, $20, nG4, $04, nRst, $08, nG4, $04
dc.b nRst, $20, nG4, $04, nA4, $08, nRst, $04, nA4, $08, nRst, $04
smpsSetvoice $07
smpsFMAlterVol $06
smpsPan panLeft, $00
dc.b nE4, $08, nRst, $04, nE4, $08, nRst, $04
smpsSetvoice $03
smpsFMAlterVol $FA
smpsPan panRight, $00
dc.b nAb4, $0C, nRst, $08, nAb4, $04, nRst, $18
smpsSetvoice $07
smpsFMAlterVol $06
smpsPan panLeft, $00
dc.b nD3, $0C
smpsSetvoice $03
smpsFMAlterVol $FA
smpsPan panRight, $00
dc.b nRst, $2C, nG4, $08, nRst, $20, nRst, $60
smpsSetvoice $07
smpsFMAlterVol $06
smpsPan panLeft, $00
dc.b nRst, $18, nD3, $0C
smpsSetvoice $03
smpsFMAlterVol $FA
smpsPan panRight, $00
dc.b nRst, $14, nG4, $08, nRst, $20, nRst, $60
smpsSetvoice $07
smpsFMAlterVol $06
smpsPan panLeft, $00
dc.b nD3, $0C
smpsSetvoice $03
smpsFMAlterVol $FA
smpsPan panRight, $00
dc.b nRst, $2C, nG4, $08, nRst, $20, nRst, $60
smpsSetvoice $04
smpsFMAlterVol $04
smpsPan panCenter, $00
dc.b nFs5, $18, nA5, $18, nRst, $0C, nCs6, $0C, nD6, $0C, nE6, $0C
dc.b nRst, $0C, nE5, $06, nRst, $06, nE5, $12, nE5, $06, nRst, $30
smpsSetvoice $05
smpsAlterPitch $F4
smpsFMAlterVol $04
smpsModSet $07, $01, $05, $07
dc.b nB6, $30, nG6, $24, nE6, $0C, smpsNoAttack, $2A, nRst, $06, nE6, $0C
dc.b nF6, $0C, nG6, $18, nE6, $18, nD6, $0C, nC6, $0C, nRst, $0C
dc.b nD6, $0C, nRst, $0C, nE6, $0C, smpsNoAttack, nE6, $18, nF6, $0C, nD6
dc.b $24, nC6, $0C, nB5, $0C, nB6, $30, nG6, $24, nE6, $0C, smpsNoAttack
dc.b $60
smpsSetvoice $03
smpsAlterPitch $0C
smpsFMAlterVol $F8
smpsModSet $07, $01, $03, $05
smpsPan panRight, $00
dc.b nRst, $06, nG4, nRst, $0C, nG4, $12, $06, nRst, $30
smpsSetvoice $07
smpsFMAlterVol $02
smpsPan panLeft, $00
dc.b nRst, $40, nA5, $02, nG5, nF5, nE5, nD5, nC5, nB4, nA4, nG4
dc.b nF4, nE4, nD4, nC4, nB3, nA3, nG3
smpsFMAlterVol $FE
smpsPan panRight, $00
smpsJump Snd_Credits_Jump02
; FM5 Data
Snd_Credits_FM5:
smpsSetvoice $03
smpsPan panRight, $00
smpsModSet $07, $01, $03, $05
dc.b nRst, $02, nC5, nD5, nE5, $12, nD5, $0C, nC5, $06, nRst, $12
dc.b nD5, $06, nRst, $12, nE5, $0C, smpsNoAttack, $30, $0C, nF5, nG5, $18
dc.b nE5, nD5, $0C, nC5, $06, nRst, $12, nD5, $06, nRst, $12, nE5
dc.b $0C, smpsNoAttack, $18, nF5, $0C, nD5, $3C, nRst, $02, nC5, nD5, nE5
dc.b $12, nD5, $0C, nC5, $06, nRst, $12, nD5, $06, nRst, $12, nE5
dc.b $0C, smpsNoAttack, $30, $0C, nF5, nG5, $18, nRst, $0C, nG5, $02, nA5
dc.b $0A, nG5, $0C, nC5, $18, nD5, $02, nE5, $0A, nD5, $0C, nG4
dc.b smpsNoAttack, nG4, $30, nRst
Snd_Credits_Jump01:
dc.b nRst, $38, nC5, $04, nA4, $08, nC5, nRst, $14, nRst, $38, nC5
dc.b $08, nRst, $20, nRst, $38, nC5, $04, nA4, $08, nC5, nRst, $14
dc.b nRst, $60, nRst, $08, nCs5, $04, nRst, $2C, nCs5, $04, nRst, $24
dc.b nRst, $60, nRst, $08, nC5, $04, nRst, $20, nC5, $04, nRst, $08
dc.b nC5, $04, nRst, $20, nC5, $04, nD5, $08, nRst, $04, nD5, $08
dc.b nRst, $0C, nD5, $04, nRst, $0C, nD5, nRst, $08, nD5, $04, nRst
dc.b $18, nRst, $38, nC5, $08, nRst, $20, nRst, $60, nRst, $38, nC5
dc.b $08, nRst, $20, nRst, $60, nRst, $38, nC5, $08, nRst, $20, nRst
dc.b $60, nRst
smpsSetvoice $07
smpsFMAlterVol $07
smpsPan panLeft, $00
dc.b nRst, $12, nE3, $06, nRst, $12, nE3, $06, nRst, $0C, nE3, nRst
dc.b $06, nE3, nRst, $0C
smpsSetvoice $03
smpsFMAlterVol $F9
smpsPan panRight, $00
dc.b nRst, $02, nC5, nD5, nE5, $12, nD5, $0C, nC5, $06, nRst, $12
dc.b nD5, $06, nRst, $12, nE5, $0C, smpsNoAttack, $30, $0C, nF5, nG5, $18
dc.b nE5, nD5, $0C, nC5, $06, nRst, $12, nD5, $06, nRst, $12, nE5
dc.b $0C, smpsNoAttack, nE5, $10
smpsSetvoice $07
smpsFMAlterVol $07
smpsPan panLeft, $00
dc.b nB2, $04, nRst, $04, nD5, $08, nRst, $04, nD5, $08
smpsSetvoice $03
smpsFMAlterVol $F9
smpsPan panRight, $00
dc.b nD5, $34, nRst, $02, nC5, nD5, nE5, $12, nD5, $0C, nC5, $06
dc.b nRst, $12, nD5, $06, nRst, $12, nE5, $0C, smpsNoAttack, $60, nRst, $06
dc.b nC5, nRst, $0C, nC5, $12, $06, nRst, $30, nRst, $60
smpsJump Snd_Credits_Jump01
; PSG1 Data
Snd_Credits_PSG1:
smpsPSGvoice sTone_06
smpsAlterPitch $0C
smpsPSGAlterVol $01
dc.b nG4, $24, $06, nRst, $12, nG4, $06, nRst, $12, nBb4, $0C, smpsNoAttack
dc.b $30, $18, nBb4, nA4, $2A, nRst, $12, nA4, $06, nRst, $12, nA4
dc.b $0C, smpsNoAttack, $24, nAb4, $36
smpsAlterPitch $F4
dc.b nB6, $02, nG6, $02, nE6, $02, nD6, $54, nBb5, $0C, smpsNoAttack, $30
dc.b $0C, nG5, nE5, nE5, smpsNoAttack, nE5, $24, nD5, nC5, $0C, nC5, smpsNoAttack
dc.b nC5, $30, nRst, $30
smpsPSGAlterVol $FF
Snd_Credits_Jump07:
dc.b nRst, $60, nRst, nRst, nRst
smpsPSGvoice sTone_22
dc.b nRst, $0C, nB6, $08, nE6, $04, nAb5, $48, nRst, $60, nRst
smpsPSGAlterVol $FE
dc.b nRst, $30, nAb5, $18, nBb5, $18, nRst, $48, nC5, $0C, nB4, $0C
dc.b smpsNoAttack, nB4, $60, nRst, $48, nC5, $0C, nB4, $0C, smpsNoAttack, nB4, $60
dc.b nRst, $48, nC5, $0C, nB4, $0C, smpsNoAttack, nB4, $48, nB4, $0C, nA4
dc.b $0C, smpsNoAttack, nA4, $60, nRst
smpsPSGAlterVol $02
smpsAlterPitch $0C
smpsPSGAlterVol $01
dc.b nG4, $24, $06, nRst, $12, nG4, $06, nRst, $12, nBb4, $0C, smpsNoAttack
dc.b $30, $18, nBb4, nA4, $2A, nRst, $12, nA4, $06, nRst, $12, nA4
dc.b $0C, smpsNoAttack, $24, nAb4, $3C, nG4, $24, $06, nRst, $12, nG4, $06
dc.b nRst, $12, nBb4, $0C, smpsNoAttack, $60
smpsAlterPitch $F4
smpsPSGAlterVol $FF
dc.b nRst, nRst
smpsJump Snd_Credits_Jump07
; PSG2 Data
Snd_Credits_PSG2:
smpsPSGvoice sTone_06
smpsAlterPitch $0C
smpsPSGAlterVol $01
dc.b nRst, $02, nC5, nD5, nE5, $12, nD5, $0C, nC5, $06, nRst, $12
dc.b nD5, $06, nRst, $12, nE5, $0C, smpsNoAttack, $30, $0C, nF5, nG5, $18
dc.b nE5, nD5, $0C, nC5, $06, nRst, $12, nD5, $06, nRst, $12, nE5
dc.b $0C, smpsNoAttack, $18, nF5, $0C, nD5, $36
smpsAlterPitch $F4
dc.b nB6, $02, nG6, $02, nE6, $02, nB6, $54, nE6, $0C, smpsNoAttack, nE6
dc.b $30, nG6, $0C, nA6, $06, nRst, $12, nC6, $0C, smpsNoAttack, $24, nB5
dc.b $24, nA5, $0C, nA5, $0C, smpsNoAttack, nA5, $30, nRst, $30
smpsPSGAlterVol $FF
Snd_Credits_Jump06:
dc.b nRst, $60, nRst, nRst, nRst
smpsPSGvoice sTone_22
dc.b nRst, $0C, nB6, $04, nAb6, $08, nCs6, $48, nRst, $60, nRst
smpsPSGAlterVol $FE
dc.b nRst, $30, nG6, $18, nF6, $18, nRst, $48, nA5, $0C, nG5, $0C
dc.b smpsNoAttack, nG5, $60, nRst, $48, nA5, $0C, nG5, $0C, smpsNoAttack, nG5, $60
dc.b nRst, $48, nA5, $0C, nG5, smpsNoAttack, nG5, $48, nG5, $0C, nFs5, $0C
dc.b smpsNoAttack, nFs5, $60, nRst
smpsPSGAlterVol $02
smpsAlterPitch $0C
smpsPSGAlterVol $01
dc.b nRst, $02, nC5, nD5, nE5, $12, nD5, $0C, nC5, $06, nRst, $12
dc.b nD5, $06, nRst, $12, nE5, $0C, smpsNoAttack, $30, $0C, nF5, nG5, $18
dc.b nE5, nD5, $0C, nC5, $06, nRst, $12, nD5, $06, nRst, $12, nE5
dc.b $0C, smpsNoAttack, $18, nF5, $0C, nD5, $3C, nRst, $02, nC5, nD5, nE5
dc.b $12, nD5, $0C, nC5, $06, nRst, $12, nD5, $06, nRst, $12, nE5
dc.b $0C
smpsAlterPitch $F4
smpsPSGAlterVol $FF
dc.b smpsNoAttack, $60, nRst, nRst
smpsJump Snd_Credits_Jump06
; PSG3 Data
Snd_Credits_PSG3:
smpsPSGform $E7
Snd_Credits_Loop00:
smpsCall Snd_Credits_Call05
smpsLoop $00, $03, Snd_Credits_Loop00
smpsCall Snd_Credits_Call06
smpsCall Snd_Credits_Call07
Snd_Credits_Loop01:
smpsCall Snd_Credits_Call05
smpsLoop $00, $03, Snd_Credits_Loop01
smpsCall Snd_Credits_Call08
smpsCall Snd_Credits_Call09
Snd_Credits_Loop02:
smpsCall Snd_Credits_Call05
smpsLoop $00, $03, Snd_Credits_Loop02
smpsCall Snd_Credits_Call08
smpsCall Snd_Credits_Call0A
Snd_Credits_Loop03:
smpsCall Snd_Credits_Call05
smpsLoop $00, $03, Snd_Credits_Loop03
smpsCall Snd_Credits_Call08
smpsCall Snd_Credits_Call0B
smpsJump Snd_Credits_Loop01
Snd_Credits_Call08:
smpsPSGvoice sTone_0F
dc.b (nMaxPSG2-$23)&$FF, $0C, $0C
smpsPSGvoice sTone_12
dc.b $0C
smpsPSGvoice sTone_0F
dc.b $08
smpsPSGvoice sTone_12
dc.b $0C
smpsPSGvoice sTone_0F
dc.b $04
smpsPSGvoice sTone_12
dc.b $0C
smpsPSGvoice sTone_0F
dc.b $0C
smpsPSGvoice sTone_12
dc.b $0C
smpsReturn
Snd_Credits_Call05:
smpsPSGvoice sTone_0F
dc.b $0C, $0C
smpsPSGvoice sTone_12
dc.b $0C
smpsPSGvoice sTone_0F
dc.b $08
smpsPSGvoice sTone_12
dc.b $0C
smpsPSGvoice sTone_0F
dc.b $04
smpsPSGvoice sTone_12
dc.b $0C
smpsPSGvoice sTone_0F
dc.b $0C
smpsPSGvoice sTone_12
dc.b $0C
smpsPSGvoice sTone_0F
dc.b $0C, $0C
smpsPSGvoice sTone_12
dc.b $0C
smpsPSGvoice sTone_0F
dc.b $08
smpsPSGvoice sTone_12
dc.b $0C
smpsPSGvoice sTone_0F
dc.b $04
smpsPSGvoice sTone_12
dc.b $0C
smpsPSGvoice sTone_0F
dc.b $08, $04
smpsPSGvoice sTone_12
dc.b $0C
smpsReturn
Snd_Credits_Call06:
smpsPSGvoice sTone_0F
dc.b $08, $04
smpsPSGvoice sTone_12
dc.b $0C
smpsPSGvoice sTone_0F
dc.b $0C, $08, $04
smpsPSGvoice sTone_12
dc.b $0C
smpsPSGvoice sTone_0F
dc.b $0C, $08, $04
smpsPSGvoice sTone_12
dc.b $0C
smpsReturn
Snd_Credits_Call07:
smpsPSGvoice sTone_12
dc.b $18, $18, $14
smpsPSGvoice sTone_0F
dc.b $04, $08, $04
smpsPSGvoice sTone_12
dc.b $0C
smpsReturn
Snd_Credits_Call09:
smpsPSGvoice sTone_0F
dc.b $08, $04
smpsPSGvoice sTone_12
dc.b $0C
smpsPSGvoice sTone_0F
dc.b $08
smpsPSGvoice sTone_12
dc.b $0C
smpsPSGvoice sTone_0F
dc.b $04, $0C, $0C
smpsPSGvoice sTone_12
dc.b $08
smpsPSGvoice sTone_0F
dc.b $04
smpsPSGvoice sTone_12
dc.b $08
smpsPSGvoice sTone_0F
dc.b $04
smpsReturn
Snd_Credits_Call0A:
smpsPSGvoice sTone_0F
dc.b $08, $04
smpsPSGvoice sTone_12
dc.b $0C
smpsPSGvoice sTone_0F
dc.b $08, $04
smpsPSGvoice sTone_12
dc.b $0C, $14
smpsPSGvoice sTone_0F
dc.b $04, $08, $04
smpsPSGvoice sTone_12
dc.b $0C
smpsReturn
Snd_Credits_Call0B:
smpsPSGvoice sTone_0F
dc.b $08, $04
smpsPSGvoice sTone_12
dc.b $0C
smpsPSGvoice sTone_0F
dc.b $08
smpsPSGvoice sTone_12
dc.b $0C
smpsPSGvoice sTone_0F
dc.b $04, $14, $04
smpsPSGvoice sTone_12
dc.b $08
smpsPSGvoice sTone_0F
dc.b $04
smpsPSGvoice sTone_12
dc.b $08
smpsPSGvoice sTone_0F
dc.b $04
smpsReturn
; DAC Data
Snd_Credits_DAC:
dc.b nRst, $60
smpsLoop $00, $07, Snd_Credits_DAC
dc.b nRst, $30, dMuffledSnare, $12, $18, $06
Snd_Credits_Jump00:
smpsCall Snd_Credits_Call00
smpsCall Snd_Credits_Call01
smpsCall Snd_Credits_Call00
smpsCall Snd_Credits_Call02
smpsCall Snd_Credits_Call00
smpsCall Snd_Credits_Call01
smpsCall Snd_Credits_Call00
smpsCall Snd_Credits_Call03
smpsCall Snd_Credits_Call00
smpsCall Snd_Credits_Call01
smpsCall Snd_Credits_Call00
smpsCall Snd_Credits_Call04
smpsJump Snd_Credits_Jump00
Snd_Credits_Call00:
dc.b dKickS3, $0C, dFloorTomS3, $0C, dSnareS3, $12, dKickS3, $06, $0C, $0C, dSnareS3, $06
dc.b dFloorTomS3, $12, dKickS3, $18, dSnareS3, $12, dKickS3, $06, $0C, $0C, dSnareS3, $06
dc.b dFloorTomS3, $12, dKickS3, $0C, dFloorTomS3, $0C, dSnareS3, $12, dKickS3, $06, $0C, $0C
dc.b dSnareS3, $06, dFloorTomS3, $12
smpsReturn
Snd_Credits_Call01:
dc.b dKickS3, $18, dSnareS3, $12, dKickS3, $06, $0C, $0C, dSnareS3, $06, dFloorTomS3, $0C
dc.b dMuffledSnare, $06
smpsReturn
Snd_Credits_Call02:
dc.b dKickS3, $18, dSnareS3, $12, dKickS3, $06, $0C, $06, dMuffledSnare, $06, dSnareS3, $06
dc.b dFloorTomS3, $0C, dMuffledSnare, $06
smpsReturn
Snd_Credits_Call03:
dc.b dKickS3, $0C, dMuffledSnare, $0C, dSnareS3, $12, dKickS3, $06, $0C, $06, dMuffledSnare, $06
dc.b dSnareS3, $06, dMuffledSnare, $12
smpsReturn
Snd_Credits_Call04:
dc.b dKickS3, $0C, dMuffledSnare, $0C, dSnareS3, $12, dKickS3, $06, $06, dMuffledSnare, $06, dKickS3
dc.b $0C, dSnareS3, $06, dFloorTomS3, $0C, dMuffledSnare, $06
smpsReturn
Snd_Credits_Voices:
; Voice $00
; $08
; $0A, $70, $30, $00, $1F, $1F, $5F, $5F, $12, $0E, $0A, $0A
; $00, $04, $04, $03, $2F, $2F, $2F, $2F, $24, $2D, $13, $80
smpsVcAlgorithm $00
smpsVcFeedback $01
smpsVcUnusedBits $00
smpsVcDetune $00, $03, $07, $00
smpsVcCoarseFreq $00, $00, $00, $0A
smpsVcRateScale $01, $01, $00, $00
smpsVcAttackRate $1F, $1F, $1F, $1F
smpsVcAmpMod $00, $00, $00, $00
smpsVcDecayRate1 $0A, $0A, $0E, $12
smpsVcDecayRate2 $03, $04, $04, $00
smpsVcDecayLevel $02, $02, $02, $02
smpsVcReleaseRate $0F, $0F, $0F, $0F
smpsVcTotalLevel $00, $13, $2D, $24
; Voice $01
; $18
; $37, $30, $30, $31, $9E, $DC, $1C, $9C, $0D, $06, $04, $01
; $08, $0A, $03, $05, $BF, $BF, $3F, $2F, $2C, $22, $14, $80
smpsVcAlgorithm $00
smpsVcFeedback $03
smpsVcUnusedBits $00
smpsVcDetune $03, $03, $03, $03
smpsVcCoarseFreq $01, $00, $00, $07
smpsVcRateScale $02, $00, $03, $02
smpsVcAttackRate $1C, $1C, $1C, $1E
smpsVcAmpMod $00, $00, $00, $00
smpsVcDecayRate1 $01, $04, $06, $0D
smpsVcDecayRate2 $05, $03, $0A, $08
smpsVcDecayLevel $02, $03, $0B, $0B
smpsVcReleaseRate $0F, $0F, $0F, $0F
smpsVcTotalLevel $00, $14, $22, $2C
; Voice $02
; $3A
; $31, $7F, $61, $0A, $9C, $DB, $9C, $9A, $04, $08, $03, $09
; $03, $01, $00, $00, $1F, $0F, $FF, $FF, $23, $25, $1B, $80
smpsVcAlgorithm $02
smpsVcFeedback $07
smpsVcUnusedBits $00
smpsVcDetune $00, $06, $07, $03
smpsVcCoarseFreq $0A, $01, $0F, $01
smpsVcRateScale $02, $02, $03, $02
smpsVcAttackRate $1A, $1C, $1B, $1C
smpsVcAmpMod $00, $00, $00, $00
smpsVcDecayRate1 $09, $03, $08, $04
smpsVcDecayRate2 $00, $00, $01, $03
smpsVcDecayLevel $0F, $0F, $00, $01
smpsVcReleaseRate $0F, $0F, $0F, $0F
smpsVcTotalLevel $00, $1B, $25, $23
; Voice $03
; $3B
; $0F, $06, $00, $01, $DF, $1F, $1F, $DF, $0C, $00, $0A, $03
; $0F, $00, $00, $01, $FF, $0F, $5F, $5F, $22, $22, $22, $80
smpsVcAlgorithm $03
smpsVcFeedback $07
smpsVcUnusedBits $00
smpsVcDetune $00, $00, $00, $00
smpsVcCoarseFreq $01, $00, $06, $0F
smpsVcRateScale $03, $00, $00, $03
smpsVcAttackRate $1F, $1F, $1F, $1F
smpsVcAmpMod $00, $00, $00, $00
smpsVcDecayRate1 $03, $0A, $00, $0C
smpsVcDecayRate2 $01, $00, $00, $0F
smpsVcDecayLevel $05, $05, $00, $0F
smpsVcReleaseRate $0F, $0F, $0F, $0F
smpsVcTotalLevel $00, $22, $22, $22
; Voice $04
; $3C
; $31, $52, $50, $30, $1F, $11, $1F, $11, $1F, $1F, $1F, $1F
; $00, $00, $00, $00, $0F, $0F, $0F, $0F, $1A, $86, $16, $86
smpsVcAlgorithm $04
smpsVcFeedback $07
smpsVcUnusedBits $00
smpsVcDetune $03, $05, $05, $03
smpsVcCoarseFreq $00, $00, $02, $01
smpsVcRateScale $00, $00, $00, $00
smpsVcAttackRate $11, $1F, $11, $1F
smpsVcAmpMod $00, $00, $00, $00
smpsVcDecayRate1 $1F, $1F, $1F, $1F
smpsVcDecayRate2 $00, $00, $00, $00
smpsVcDecayLevel $00, $00, $00, $00
smpsVcReleaseRate $0F, $0F, $0F, $0F
smpsVcTotalLevel $06, $16, $06, $1A
; Voice $05
; $38
; $31, $51, $31, $71, $17, $18, $1A, $11, $17, $16, $0B, $00
; $00, $00, $00, $00, $1F, $1F, $0F, $0F, $20, $11, $21, $80
smpsVcAlgorithm $00
smpsVcFeedback $07
smpsVcUnusedBits $00
smpsVcDetune $07, $03, $05, $03
smpsVcCoarseFreq $01, $01, $01, $01
smpsVcRateScale $00, $00, $00, $00
smpsVcAttackRate $11, $1A, $18, $17
smpsVcAmpMod $00, $00, $00, $00
smpsVcDecayRate1 $00, $0B, $16, $17
smpsVcDecayRate2 $00, $00, $00, $00
smpsVcDecayLevel $00, $00, $01, $01
smpsVcReleaseRate $0F, $0F, $0F, $0F
smpsVcTotalLevel $00, $21, $11, $20
; Voice $06
; $3B
; $52, $31, $31, $51, $12, $14, $12, $14, $0E, $00, $0E, $02
; $00, $00, $00, $01, $4F, $0F, $5F, $3F, $1C, $18, $1D, $80
smpsVcAlgorithm $03
smpsVcFeedback $07
smpsVcUnusedBits $00
smpsVcDetune $05, $03, $03, $05
smpsVcCoarseFreq $01, $01, $01, $02
smpsVcRateScale $00, $00, $00, $00
smpsVcAttackRate $14, $12, $14, $12
smpsVcAmpMod $00, $00, $00, $00
smpsVcDecayRate1 $02, $0E, $00, $0E
smpsVcDecayRate2 $01, $00, $00, $00
smpsVcDecayLevel $03, $05, $00, $04
smpsVcReleaseRate $0F, $0F, $0F, $0F
smpsVcTotalLevel $00, $1D, $18, $1C
; Voice $07
; $3C
; $31, $52, $50, $30, $52, $53, $52, $53, $08, $00, $08, $00
; $04, $00, $04, $00, $1F, $0F, $1F, $0F, $1A, $80, $16, $80
smpsVcAlgorithm $04
smpsVcFeedback $07
smpsVcUnusedBits $00
smpsVcDetune $03, $05, $05, $03
smpsVcCoarseFreq $00, $00, $02, $01
smpsVcRateScale $01, $01, $01, $01
smpsVcAttackRate $13, $12, $13, $12
smpsVcAmpMod $00, $00, $00, $00
smpsVcDecayRate1 $00, $08, $00, $08
smpsVcDecayRate2 $00, $04, $00, $04
smpsVcDecayLevel $00, $01, $00, $01
smpsVcReleaseRate $0F, $0F, $0F, $0F
smpsVcTotalLevel $00, $16, $00, $1A
| 38.87694 | 101 | 0.572932 |
01fd370aa2741bbcf42c4f1339668c0ef55014bf | 335 | asm | Assembly | lab_06/output.asm | ak-karimzai/asm | e5433922cbb69cae3c03be86447e0e83fbd8cb0b | [
"Unlicense"
] | null | null | null | lab_06/output.asm | ak-karimzai/asm | e5433922cbb69cae3c03be86447e0e83fbd8cb0b | [
"Unlicense"
] | null | null | null | lab_06/output.asm | ak-karimzai/asm | e5433922cbb69cae3c03be86447e0e83fbd8cb0b | [
"Unlicense"
] | 2 | 2021-06-07T06:29:31.000Z | 2021-06-08T16:52:03.000Z | extern new_line:byte
public print
code_seg segment para public 'code'
assume cs:code_seg
start:
print proc near
mov dx, offset new_line
mov ah, 09
int 21h
mov dx, bx
int 21h
mov dx, offset new_line
int 21h
ret
print endp
code_seg ends
end start | 16.75 | 35 | 0.579104 |
a6929e8f8beb72af2b1cbb81b07babede6f313a2 | 6,787 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0x48.log_12370_73.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0x48.log_12370_73.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0x48.log_12370_73.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r13
push %r8
push %rbp
push %rbx
push %rcx
push %rdi
push %rsi
lea addresses_WC_ht+0xcf7a, %rsi
lea addresses_UC_ht+0x8756, %rdi
nop
nop
nop
and %r13, %r13
mov $118, %rcx
rep movsw
nop
nop
nop
sub $57065, %r10
lea addresses_UC_ht+0x16a56, %rbp
add $12755, %rbx
and $0xffffffffffffffc0, %rbp
vmovntdqa (%rbp), %ymm6
vextracti128 $0, %ymm6, %xmm6
vpextrq $0, %xmm6, %r10
nop
nop
xor $50808, %rbp
lea addresses_UC_ht+0x8256, %rsi
lea addresses_A_ht+0x1ceba, %rdi
nop
dec %r8
mov $117, %rcx
rep movsq
nop
nop
nop
nop
xor %rbp, %rbp
lea addresses_WT_ht+0xcc56, %rbx
nop
nop
nop
nop
inc %rsi
movups (%rbx), %xmm1
vpextrq $1, %xmm1, %rcx
nop
nop
and %rbx, %rbx
lea addresses_D_ht+0x1ebb6, %r13
add $62392, %rbx
mov (%r13), %r8w
nop
nop
nop
nop
nop
xor %rsi, %rsi
lea addresses_normal_ht+0x8d56, %r8
nop
xor $6603, %r13
movl $0x61626364, (%r8)
nop
nop
nop
nop
nop
add %r13, %r13
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %rbp
pop %r8
pop %r13
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r13
push %r15
push %r8
push %rax
push %rbx
push %rdi
// Store
lea addresses_A+0x12656, %r8
nop
nop
nop
xor %rax, %rax
mov $0x5152535455565758, %r15
movq %r15, %xmm6
vmovups %ymm6, (%r8)
nop
nop
nop
nop
nop
sub %rbx, %rbx
// Load
lea addresses_PSE+0x6146, %r8
nop
nop
nop
and %rdi, %rdi
mov (%r8), %r11w
nop
nop
nop
nop
and $42704, %r8
// Store
lea addresses_UC+0x9256, %r8
nop
nop
nop
nop
nop
and $56237, %rax
mov $0x5152535455565758, %r13
movq %r13, (%r8)
nop
nop
nop
and $9071, %r15
// Store
lea addresses_PSE+0x1ccd6, %rax
nop
nop
nop
nop
add $44788, %rdi
movw $0x5152, (%rax)
// Exception!!!
mov (0), %rax
nop
nop
nop
nop
nop
inc %r13
// Load
lea addresses_normal+0xa056, %r13
nop
cmp %r8, %r8
mov (%r13), %edi
nop
nop
sub $43062, %rdi
// Faulty Load
lea addresses_normal+0x16a56, %rax
nop
nop
add $58359, %r15
mov (%rax), %r8d
lea oracles, %rax
and $0xff, %r8
shlq $12, %r8
mov (%rax,%r8,1), %r8
pop %rdi
pop %rbx
pop %rax
pop %r8
pop %r15
pop %r13
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'type': 'addresses_normal', 'AVXalign': True, 'congruent': 0, 'size': 16, 'same': False, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_A', 'AVXalign': False, 'congruent': 10, 'size': 32, 'same': False, 'NT': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_PSE', 'AVXalign': False, 'congruent': 4, 'size': 2, 'same': False, 'NT': True}}
{'OP': 'STOR', 'dst': {'type': 'addresses_UC', 'AVXalign': False, 'congruent': 11, 'size': 8, 'same': False, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_PSE', 'AVXalign': False, 'congruent': 4, 'size': 2, 'same': False, 'NT': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_normal', 'AVXalign': False, 'congruent': 7, 'size': 4, 'same': False, 'NT': False}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'type': 'addresses_normal', 'AVXalign': False, 'congruent': 0, 'size': 4, 'same': True, 'NT': False}}
<gen_prepare_buffer>
{'OP': 'REPM', 'src': {'type': 'addresses_WC_ht', 'congruent': 2, 'same': False}, 'dst': {'type': 'addresses_UC_ht', 'congruent': 8, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_UC_ht', 'AVXalign': False, 'congruent': 11, 'size': 32, 'same': False, 'NT': True}}
{'OP': 'REPM', 'src': {'type': 'addresses_UC_ht', 'congruent': 5, 'same': False}, 'dst': {'type': 'addresses_A_ht', 'congruent': 2, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_WT_ht', 'AVXalign': False, 'congruent': 9, 'size': 16, 'same': True, 'NT': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_D_ht', 'AVXalign': False, 'congruent': 5, 'size': 2, 'same': False, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_normal_ht', 'AVXalign': True, 'congruent': 7, 'size': 4, 'same': False, 'NT': False}}
{'34': 12370}
34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34
*/
| 33.269608 | 2,999 | 0.655223 |
3a4862bc19ecc57b41016fcce55d132acac62ab6 | 2,186 | asm | Assembly | libsrc/target/vz/stdio/generic_console_ioctl.asm | Frodevan/z88dk | f27af9fe840ff995c63c80a73673ba7ee33fffac | [
"ClArtistic"
] | 640 | 2017-01-14T23:33:45.000Z | 2022-03-30T11:28:42.000Z | libsrc/target/vz/stdio/generic_console_ioctl.asm | Frodevan/z88dk | f27af9fe840ff995c63c80a73673ba7ee33fffac | [
"ClArtistic"
] | 1,600 | 2017-01-15T16:12:02.000Z | 2022-03-31T12:11:12.000Z | libsrc/target/vz/stdio/generic_console_ioctl.asm | Frodevan/z88dk | f27af9fe840ff995c63c80a73673ba7ee33fffac | [
"ClArtistic"
] | 215 | 2017-01-17T10:43:03.000Z | 2022-03-23T17:25:02.000Z |
MODULE generic_console_ioctl
PUBLIC generic_console_ioctl
SECTION code_clib
EXTERN generic_console_cls
EXTERN __console_h
EXTERN __console_w
EXTERN __vz200_mode
EXTERN generic_console_font32
EXTERN generic_console_udg32
INCLUDE "ioctl.def"
EXTERN generic_console_caps
PUBLIC CLIB_GENCON_CAPS
defc CLIB_GENCON_CAPS = CAPS_MODE0
defc CAPS_MODE0 = CAP_GENCON_FG_COLOUR | CAP_GENCON_BG_COLOUR
defc CAPS_MODE1 = CAP_GENCON_INVERSE | CAP_GENCON_CUSTOM_FONT | CAP_GENCON_UDGS | CAP_GENCON_FG_COLOUR | CAP_GENCON_BG_COLOUR
; a = ioctl
; de = arg
generic_console_ioctl:
ex de,hl
ld c,(hl) ;bc = where we point to
inc hl
ld b,(hl)
cp IOCTL_GENCON_SET_FONT32
jr nz,check_set_udg
ld (generic_console_font32),bc
success:
and a
ret
check_set_udg:
cp IOCTL_GENCON_SET_UDGS
jr nz,check_mode
ld (generic_console_udg32),bc
jr success
check_mode:
cp IOCTL_GENCON_SET_MODE
jr nz,failure
ld a,c ; The mode
and 31
ld h,0 ;MODE_0
ld e,32 ;columns
ld l,16
and a
jr z,set_mode
ld l,8 ;rows
ld h,8 ;AGW mode
ld e,16 ;columns
cp 1 ;CG2 mode
jr nz,failure
set_mode:
bit 5,c
jr z,not_css
set 4,h ;Sets CSS on the latch
not_css:
ld (__vz200_mode),a
ld a,h
ld ($783b),a ;SYS VAR
ld ($6800),a ;Latch
ld a,e
ld (__console_w),a
ld a,l
ld (__console_h),a
call generic_console_cls
and a
ret
failure:
scf
ret
| 28.763158 | 137 | 0.467521 |
d90a791ae0c1045fdfd93bc853bbca99faa35522 | 638 | asm | Assembly | malban/Release/VRelease/Release.History/VRelease_2017_04_23/Song/track_09_08.asm | mikepea/vectrex-playground | 0de7d2d6db0914d915f4334402f747ab3bcdc7e6 | [
"0BSD"
] | 5 | 2018-01-14T10:03:50.000Z | 2020-01-17T13:53:49.000Z | malban/Release/VRelease/Release.History/VRelease_2017_04_23/Song/track_09_08.asm | mikepea/vectrex-playground | 0de7d2d6db0914d915f4334402f747ab3bcdc7e6 | [
"0BSD"
] | null | null | null | malban/Release/VRelease/Release.History/VRelease_2017_04_23/Song/track_09_08.asm | mikepea/vectrex-playground | 0de7d2d6db0914d915f4334402f747ab3bcdc7e6 | [
"0BSD"
] | null | null | null | dw $0040
track_09_08:
db $FF, $18, $97, $DE, $63, $FE, $1A, $7E, $E6, $34
db $ED, $FC, $70, $30, $FF, $BC, $9E, $3F, $18, $F9
db $DE, $8E, $3D, $6F, $27, $8F, $FD, $E8, $E9, $C4
db $BE, $EA, $A3, $EE, $FD, $2F, $3F, $A8, $F6, $8C
db $4B, $AC, $E1, $D3, $48, $FF, $18, $7D, $E6, $3F
db $E1, $A7, $EE, $63, $4E, $DF, $C7, $03, $0F, $34
db $38, $69, $13, $D5, $0D, $E6, $44, $D4, $37, $03
db $0F, $33, $C6, $8F, $3D, $4F, $1E, $63, $CD, $3C
db $70, $30, $FF, $DE, $8E, $9C, $4B, $EE, $AA, $3E
db $EF, $D2, $F3, $FA, $8F, $68, $C4, $BA, $CE, $1D
db $34, $8F, $53, $C8, $6F, $7B, $1E, $4F, $17, $77
db $7F, $7B, $B1, $C2, $EE, $00 | 45.571429 | 52 | 0.4279 |
198e500af4267ca77cc07f7a50896384de647598 | 289 | asm | Assembly | programs/oeis/176/A176514.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/176/A176514.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/176/A176514.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A176514: Period 6: repeat [3, 1, 1, 3, 2, 1].
; 3,1,1,3,2,1,3,1,1,3,2,1,3,1,1,3,2,1,3,1,1,3,2,1,3,1,1,3,2,1,3,1,1,3,2,1,3,1,1,3,2,1,3,1,1,3,2,1,3,1,1,3,2,1,3,1,1,3,2,1,3,1,1,3,2,1,3,1,1,3,2,1,3,1,1,3,2,1,3,1,1,3,2,1,3,1,1,3,2,1,3,1,1,3,2,1,3,1,1,3
mov $2,$0
mod $0,3
sub $0,3
gcd $0,$2
| 36.125 | 201 | 0.50519 |
776fc54afa45f0147e659408594b131a5bc357e1 | 140 | asm | Assembly | test_data/ligador_carregador/moodle_B.asm | Perruci/sb20172 | c7e803c97e389ff7455e6a10cfa238175a186cb4 | [
"MIT"
] | null | null | null | test_data/ligador_carregador/moodle_B.asm | Perruci/sb20172 | c7e803c97e389ff7455e6a10cfa238175a186cb4 | [
"MIT"
] | 1 | 2017-10-22T01:43:05.000Z | 2017-10-22T01:46:29.000Z | test_data/ligador_carregador/moodle_B.asm | Perruci/sb20172 | c7e803c97e389ff7455e6a10cfa238175a186cb4 | [
"MIT"
] | null | null | null |
mod_b: begin
section text
val: extern
l1: extern
public y
public mod_b
output y
output val
output y + 2
jmp l1
section data
y: space 3
end
| 9.333333 | 12 | 0.757143 |
448f87c4cd31acc6529c986d637a1223e20acfaa | 828 | asm | Assembly | oeis/083/A083559.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/083/A083559.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/083/A083559.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A083559: Nearest integer to 1/(Sum_{k>=n} 1/k^4).
; 1,12,50,134,280,507,834,1277,1855,2586,3489,4580,5878,7401,9168,11195,13501,16104,19023,22274,25876,29847,34206,38969,44155,49782,55869,62432,69490,77061,85164,93815,103033,112836,123243,134270,145936,158259,171258,184949,199351,214482,230361,247004,264430,282657,301704,321587,342325,363936,386439,409850,434188,459471,485718,512945,541171,570414,600693,632024,664426,697917,732516,768239,805105,843132,882339,922742,964360,1007211,1051314,1096685,1143343,1191306,1240593,1291220,1343206,1396569
mov $4,$0
mul $0,2
add $0,1
seq $0,24195 ; Integer part of (4th elementary symmetric function of S(n))/(3rd elementary symmetric of S(n)), where S(n) = {3,4, ..., n+5}.
sub $0,1
add $0,$4
mov $3,$4
mul $3,$4
mov $2,$3
mul $2,4
add $0,$2
mul $3,$4
mov $2,$3
mul $2,3
add $0,$2
| 43.578947 | 498 | 0.742754 |
2edf58c0177046ae18385469679671b1b5dff220 | 3,129 | asm | Assembly | src/setup.asm | freem/freem_pong | e7236e05d304cafe5ac7341bbc05607e5c3172c4 | [
"Unlicense"
] | 1 | 2021-09-13T18:05:13.000Z | 2021-09-13T18:05:13.000Z | src/setup.asm | freem/freem_pong | e7236e05d304cafe5ac7341bbc05607e5c3172c4 | [
"Unlicense"
] | 4 | 2016-07-10T20:59:49.000Z | 2016-07-10T21:02:25.000Z | src/setup.asm | freem/freem_pong | e7236e05d304cafe5ac7341bbc05607e5c3172c4 | [
"Unlicense"
] | null | null | null | ; Program Setup
;==============================================================================;
ProgramSetup:
; lots of this will differ for PCE/NES.
;==============================================================================;
; NES-specific section
;==============================================================================;
.ifdef __NES__
;-- set palette --;
ldx #>$3F00
ldy #<$3F00
stx PPU_ADDR
sty PPU_ADDR
; 32 values in tbl_paletteNES
ldy #0
@Reset_nes_LoadPalette:
lda tbl_paletteNES,y
sta PPU_DATA
iny
cpy #32
bne @Reset_nes_LoadPalette
; reset PPU addresses
ldx #$3F
ldy #$00
stx PPU_ADDR ; palette 1/2
sty PPU_ADDR ; palette 2/2
sty PPU_ADDR ; regular ppu 1/2
sty PPU_ADDR ; regular ppu 2/2
;-- clear nametables --;
;jsr ppu_ClearNT_All
;-- load CHR data --;
; BG tiles
ldx #<nes_tilesBG
ldy #>nes_tilesBG
stx tmp00
sty tmp01
lda #80 ; 80 2BPP NES tiles
sta tmp02
jsr nes_LoadTiles
; sprite tiles
ldx #>$1000
ldy #<$0000
stx PPU_ADDR
sty PPU_ADDR
ldx #<nes_tilesSPR
ldy #>nes_tilesSPR
stx tmp00
sty tmp01
lda #7 ; 7 8x8 sprite tiles
sta tmp02
jsr nes_LoadTiles
; reset PPU address
lda #0
sta PPU_ADDR
sta PPU_ADDR
;-- reset scroll --;
sta PPU_SCROLL
sta PPU_SCROLL
.endif
;==============================================================================;
; PCE-specific section
;==============================================================================;
.ifdef __PCE__
;-- set palette --;
; first 16 background colors tbl_palettePCE_BG1
ldx #<VCE_BGPAL_START
ldy #>VCE_BGPAL_START
stx VCE_ADDR_LO
sty VCE_ADDR_HI
tia tbl_palettePCE_BG1,VCE_DATA_LO,4*2
; second 16 background colors tbl_palettePCE_BG2
ldx #<VCE_BGPAL_START+(VCE_PALSET_SIZE*1)
ldy #>VCE_BGPAL_START+(VCE_PALSET_SIZE*1)
stx VCE_ADDR_LO
sty VCE_ADDR_HI
tia tbl_palettePCE_BG2,VCE_DATA_LO,4*2
; third 16 background colors tbl_palettePCE_BG3
ldx #<VCE_BGPAL_START+(VCE_PALSET_SIZE*2)
ldy #>VCE_BGPAL_START+(VCE_PALSET_SIZE*2)
stx VCE_ADDR_LO
sty VCE_ADDR_HI
tia tbl_palettePCE_BG3,VCE_DATA_LO,4*2
; first 16 sprite colors tbl_palettePCE_SPR
ldx #<VCE_SPRPAL_START
ldy #>VCE_SPRPAL_START
stx VCE_ADDR_LO
sty VCE_ADDR_HI
tia tbl_palettePCE_SPR,VCE_DATA_LO,10*2
;-- set up self-modifying transfer code --;
ldx #$E3 ; TIA opcode
ldy #$60 ; RTS opcode
stx pce_quickTIA
sty pce_quickTIA+7
;-- load BG tiles --;
; BAT takes up first $0800 of VRAM, so put BG tiles at $1000
ldx #<pce_tilesBG
ldy #>pce_tilesBG
stx tmp00
sty tmp01
ldx #<$1000
ldy #>$1000
stx tmp02
sty tmp03
lda #80 ; 80 4BPP BG tiles
sta tmp04
jsr pce_LoadTilesBG
;-- load SPR tiles --;
; put SPR tiles at $2000
ldx #<pce_tilesSPR
ldy #>pce_tilesSPR
stx tmp00
sty tmp01
ldx #<$2000
ldy #>$2000
stx tmp02
sty tmp03
lda #5 ; 5 16x16 sprite tiles
sta tmp04
jsr pce_LoadTilesSPR
;-- clear BAT --;
; BG characters are loaded, fill the BAT with the first tile ($0100).
ldx #<$0100
ldy #>$0100
stx tmp00
sty tmp01
jsr vdc_ClearBat
.endif
;==============================================================================;
; execution is handed to the program
| 21 | 80 | 0.613934 |
c778f1c556466aabd5720197af154973f1b3324c | 86 | asm | Assembly | gfx/pokemon/ivysaur/anim_idle.asm | Dev727/ancientplatinum | 8b212a1728cc32a95743e1538b9eaa0827d013a7 | [
"blessing"
] | 28 | 2019-11-08T07:19:00.000Z | 2021-12-20T10:17:54.000Z | gfx/pokemon/ivysaur/anim_idle.asm | Dev727/ancientplatinum | 8b212a1728cc32a95743e1538b9eaa0827d013a7 | [
"blessing"
] | 13 | 2020-01-11T17:00:40.000Z | 2021-09-14T01:27:38.000Z | gfx/pokemon/ivysaur/anim_idle.asm | Dev727/ancientplatinum | 8b212a1728cc32a95743e1538b9eaa0827d013a7 | [
"blessing"
] | 22 | 2020-05-28T17:31:38.000Z | 2022-03-07T20:49:35.000Z | setrepeat 2
frame 0, 07
frame 3, 07
dorepeat 1
frame 0, 08
frame 1, 06
endanim
| 10.75 | 12 | 0.674419 |
8ce5e7a78d070fdb15b66f608843b4ca66e9b7b4 | 35,405 | asm | Assembly | Appl/Calendar/DayPlan/dayplanPrint.asm | steakknife/pcgeos | 95edd7fad36df400aba9bab1d56e154fc126044a | [
"Apache-2.0"
] | 504 | 2018-11-18T03:35:53.000Z | 2022-03-29T01:02:51.000Z | Appl/Calendar/DayPlan/dayplanPrint.asm | steakknife/pcgeos | 95edd7fad36df400aba9bab1d56e154fc126044a | [
"Apache-2.0"
] | 96 | 2018-11-19T21:06:50.000Z | 2022-03-06T10:26:48.000Z | Appl/Calendar/DayPlan/dayplanPrint.asm | steakknife/pcgeos | 95edd7fad36df400aba9bab1d56e154fc126044a | [
"Apache-2.0"
] | 73 | 2018-11-19T20:46:53.000Z | 2022-03-29T00:59:26.000Z | COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
Copyright (c) GeoWorks 1989 -- All Rights Reserved
PROJECT: PC GEOS
MODULE: Calendar/DayPlan
FILE: dayplanPrint.asm
AUTHOR: Don Reeves, May 27, 1990
ROUTINES:
Name Description
---- -----------
DayPlanPrint High level print routine for EventWindow
DayPlanPrintsetup Internal setup for printing EventWindow
DayPlanPrintDatesEvents High level printing of events in a month
DayPlanPrintSingleDate High level printing of single date in month
DayPlanPrintEngine Medium level print routine for events
DayPlanCreatePrintEvent Creates a PrintEvent object used for printing
DayPlanNukePrintEvent Destroys the forementioned object
DayPlanPrintAllEvents Medium level routine to print built EventTable
DayPlanPrintOneEvent Low level print rouinte for a single event
DayPlanPrepareDateEvent Specialized routine to max space used in date
DayPlanPrintEventCrossesPage
Handles events that cross 1 or more pages
DayPlanPrintCalcNextOffset
Sub-routine for events that cross page boundary
InitPagePosition Simple routine to create new page
REVISION HISTORY:
Name Date Description
---- ---- -----------
Don 5/27/90 Initial revision
DESCRIPTION:
$Id: dayplanPrint.asm,v 1.1 97/04/04 14:47:30 newdeal Exp $
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
PrintCode segment resource
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
DayPlanStartPrinting
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Responds to all printing requests from the PrintControl
for event information.
CALLED BY: GLOBAL (MSG_PRINT_START_PRINTING)
PASS: DS:*SI = DayPlanClass instance data
DS:DI = DayPlanClass specific instance data
BP = GState
CX:DX = PrintControl OD
RETURN: Nothing
DESTROYED: AX, BX, CX, DX, DI, SI, BP
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/IDEAS:
none
REVISION HISTORY:
Name Date Description
---- ---- -----------
Don 5/27/90 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
DayPlanStartPrinting method DayPlanClass, MSG_PRINT_START_PRINTING
.enter
; Some set-up work
;
push cx, dx ; save the SPC OutputDesc.
call DayPlanPrintSetup ; => CX:DX width, height
sub sp, size PrintRangeStruct ; allocate this structure
mov bx, sp ; PrintRangeStruct => SS:BX
mov ss:[bx].PRS_width, cx
mov ss:[bx].PRS_height, dx
mov ss:[bx].PRS_gstate, bp ; store the GState
mov ss:[bx].PRS_pointSize, 12 ; twelve point text
mov ss:[bx].PRS_specialValue, 2 ; normal event printing
mov dx, ds:[di].DPI_startYear
mov ss:[bx].PRS_range.RS_startYear, dx
mov dx, ds:[di].DPI_endYear
mov ss:[bx].PRS_range.RS_endYear, dx
mov dx, {word} ds:[di].DPI_startDay
mov {word} ss:[bx].PRS_range.RS_startDay, dx
mov dx, {word} ds:[di].DPI_endDay
mov {word} ss:[bx].PRS_range.RS_endDay, dx
mov ss:[bx].PRS_currentSizeObj, 0 ; no handle allocated
; Perform the actual printing
;
mov cx, {word} ds:[di].DPI_flags ; DayPlanInfoFlags => CL
; DayPlanPrintFlags => CH
cmp ds:[di].DPI_rangeLength, 1
jne doPrinting
or ch, mask DPPF_FORCE_HEADERS ; if 1 day, force a header
doPrinting:
mov bp, bx ; PrintRangeStruct => SS:BP
mov ax, MSG_DP_PRINT_ENGINE ; now do the real work
call ObjCallInstanceNoLock
; End the page properly
;
mov_tr dx, ax ; number of pages => DX
mov di, ss:[bp].PRS_gstate
mov al, PEC_FORM_FEED
call GrNewPage
add sp, size PrintRangeStruct ; clean up the stack
; Now clean up
;
pop bx, si ; PrintControl OD => BX:SI
mov cx, 1
mov ax, MSG_PRINT_CONTROL_SET_TOTAL_PAGE_RANGE
call ObjMessage_print_send ; number of pages = (DX-CX+1)
mov ax, MSG_PRINT_CONTROL_PRINTING_COMPLETED
call ObjMessage_print_send
.leave
ret
DayPlanStartPrinting endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
DayPlanPrintSetup
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Sets up the DayPlan for printing, and returns the print
information.
CALLED BY: INTERNAL - DayPlanStartPrinting
PASS: DS:*SI = DayPlanClass instance data
ES = DGroup
CX:DX = PrintControl OD
BP = GState to print with
RETURN: CX = Usable width of document
DX = Usable height of document
DS:DI = DayPlanClass specific instance data
DESTROYED: AX, BX
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/IDEAS:
none
REVISION HISTORY:
Name Date Description
---- ---- -----------
Don 5/27/90 Initial version
Don 6/28/90 Took out unnecessary calls
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
DayPlanPrintSetup proc near
.enter
; Set the inital translation
;
mov di, bp ; GState => DI
call InitPagePosition ; account for the page borders
mov di, ds:[si] ; dereference the handle
add di, ds:[di].DayPlan_offset ; access the instance data
mov cx, es:[printWidth]
mov dx, es:[printHeight]
.leave
ret
DayPlanPrintSetup endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
DayPlanPrintDatesEvents
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Print a date's worth of events - designed to work with
printing events inside of a Calendar.
CALLED BY: GLOBAL (MSG_DP_PRINT_DATES_EVENTS)
PASS: DS:*SI = DayPlanClass instance data
ES = DGroup
SS:BP = MonthPrintRangeStruct
CL = DOW of 1st day
CH = Last day in month
RETURN: Nothing
DESTROYED: TBD
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/IDEAS:
none
REVISION HISTORY:
Name Date Description
---- ---- -----------
Don 6/2/90 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
DayPlanPrintDatesEvents method DayPlanClass, MSG_DP_PRINT_DATES_EVENTS
.enter
; Some set-up work
;
push ds:[di].DPI_rangeLength ; save the range length
mov ds:[di].DPI_rangeLength, 1 ; to avoid header events
or es:[systemStatus], SF_PRINT_MONTH_EVENTS
mov dl, 7 ; seven columns
sub dl, cl ; start at DOW
mov cl, 1 ; start with 1st day in month
mov ax, mask PEI_IN_DATE ; PrintEventInfo => AX
call DayPlanCreatePrintEvent ; print event => DS:*BX
mov ss:[bp].PRS_currentSizeObj, bx ; store the handle
jnc printDates ; if carry clear, A-OK
; Else ask the user what to do
;
push cx, dx, bp ; save MonthPrintRangeStruct
mov bp, CAL_ERROR_EVENTS_WONT_FIT ; message to display
mov bx, ds:[LMBH_handle] ; block handle => BX
call MemOwner ; process handle => BX
mov ax, MSG_CALENDAR_DISPLAY_ERROR
mov di, mask MF_FIXUP_DS or mask MF_CALL
call ObjMessage
pop cx, dx, bp ; restore MonthPrintRangeStruct
cmp ax, IC_YES ; print empty month ?
je cleanUpOK ; yes
mov ax, MSG_PRINT_CONTROL_PRINTING_CANCELLED
jmp cleanUp
; Draw the events, day by day
;
printDates:
mov ax, ss:[bp].MPRS_newXOffset ; X position => AX
mov bx, ss:[bp].MPRS_newYOffset ; Y position => BX
anotherDay:
mov ss:[bp].MPRS_newXOffset, ax ; store the current X offset
mov ss:[bp].MPRS_newYOffset, bx ; store the current Y offset
push ax, bx, cx, dx ; save important data
mov ss:[bp].PRS_range.RS_startDay, cl
mov ss:[bp].PRS_range.RS_endDay, cl
call DayPlanPrintSingleDate ; print this date
pop ax, bx, cx, dx ; restore the important data
add ax, ss:[bp].MPRS_dateWidth ; move over one date
dec dl ; one less column in this row
jnz nextDate ; if not done, next
add bx, ss:[bp].MPRS_dateHeight ; else go down one row...
mov ax, MONTH_BORDER_HORIZ ; and to the left column
mov dl, 7 ; reset the day counter
nextDate:
inc cl ; increment the day
cmp cl, ch ; are we done yet ??
jle anotherDay
; Clean up
;
cleanUpOK:
mov ax, MSG_PRINT_CONTROL_PRINTING_COMPLETED
cleanUp:
mov di, ds:[si]
add di, ds:[di].DayPlan_offset
pop ds:[di].DPI_rangeLength ; restore range length
push ax ; save the method to send
and es:[systemStatus], not SF_PRINT_MONTH_EVENTS
mov dx, ss:[bp].PRS_currentSizeObj ; size object => DS:*DX
call DayPlanNukePrintEvent ; free up the event
; End the page properly
;
mov di, ss:[bp].PRS_gstate
mov al, PEC_FORM_FEED
call GrNewPage
; Now tell the PrintControl that we're done
;
pop ax ; method to send
GetResourceHandleNS CalendarPrintControl, bx
mov si, offset CalendarPrintControl
call ObjMessage_print_call ; send that method
.leave
ret
DayPlanPrintDatesEvents endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
DayPlanPrintSingleDate
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Print a single date's events, that appear inside of
a month.
CALLED BY: INTERNAL - DayPlanPrintDatesEvents
PASS: DS:*SI = DayPlanClass instance data
SS:BP = MonthPrintRangeStruct
ES = DGroup
RETURN: Nothing
DESTROYED: AX, BX, CX, DX, DI
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/IDEAS:
none
REVISION HISTORY:
Name Date Description
---- ---- -----------
Don 10/1/90 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
DayPlanPrintSingleDate proc near
.enter
; First translate
;
push si ; save the DayPlan handle
mov di, ss:[bp].PRS_gstate ; GState => DI
call GrSetNullTransform ; go back to 0,0
mov dx, ss:[bp].MPRS_newXOffset ; raw X offset => DX
add dx, es:[printMarginLeft]
inc dx
mov bx, ss:[bp].MPRS_newYOffset ; raw Y offset => BX
add bx, es:[printMarginTop] ; y offset => BX
clr ax ; no fractions
clr cx ; no fractions
call GrApplyTranslation ; perform the translation
; Now set the clip region
;
mov bx, ax ; top (and left) zero
mov cx, ss:[bp].PRS_width ; right
mov dx, ss:[bp].PRS_height ; bottom
mov si, PCT_REPLACE
call GrSetClipRect ; set the clip rectangle
; Now do the real printing
;
pop si ; restore the DayPlan handle
clr cx ; no template or headers
mov ax, MSG_DP_PRINT_ENGINE ; do the real work
call ObjCallInstanceNoLock
.leave
ret
DayPlanPrintSingleDate endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
DayPlanPrintEngine
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Performs the actual printing of events that fall within the
desired range.
CALLED BY: GLOBAL
PASS: ES = DGroup
DS:*SI = DayPlanClass instance data
SS:BP = PrintRangeStruct
CL = DayPlanInfoFlags
DP_TEMPLATE (attempt template mode)
DP_HEADERS (attempt headers mode)
CH = DayPlanPrintFlags
RETURN: AX = Number of pages that were printed
DESTROYED: BX, DI, SI
NOTES: PRS_currentSizeObj must be accurately filled in when passed
If no current print object, then zero
Else, valid handle in DPResource block
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/IDEAS:
none
REVISION HISTORY:
Name Date Description
---- ---- -----------
Don 5/27/90 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
DayPlanPrintEngine method DayPlanClass, MSG_DP_PRINT_ENGINE
uses cx, dx, bp
.enter
; First call for everything to be updated
;
mov ax, 1 ; assume 1 page printed
test es:[systemStatus], SF_VALID_FILE
LONG jz done ; if no file, do nothing!
push cx ; save the flags
mov ax, MSG_DP_UPDATE_ALL_EVENTS
call ObjCallInstanceNoLock
cmp ds:[LMBH_blockSize], LARGE_BLOCK_SIZE
jb eventTable ; if smaller, don't worry
mov ax, MSG_DP_FREE_MEM ; free as much mem as possible
call ObjCallInstanceNoLock ; do the work now!
; Allocate an EventTable, and initialize it
eventTable:
mov cx, size EventTableHeader ; allocate an EventTable
mov al, mask OCF_IGNORE_DIRTY ; not dirty
call LMemAlloc ; chunk handle => AX
mov bx, ax ; table handle => BX
mov di, ds:[bx] ; derference the handle
mov ds:[di].ETH_last, cx ; initialize the header...
mov ds:[di].ETH_screenFirst, OFF_SCREEN_TOP
mov ds:[di].ETH_screenLast, OFF_SCREEN_BOTTOM
; Save some important values, and reload them
;
mov di, ds:[si] ; dereference the handle
add di, ds:[di].DayPlan_offset ; access my instance data
pop cx ; restore the flags
push ds:[di].DPI_eventTable ; save these values...
push {word} ds:[di].DPI_flags ; save InfoFlags & PrintFlags
push ds:[di].DPI_textHeight ; save one-line text height
push ds:[di].DPI_viewWidth ; save the view width
push ds:[di].DPI_docHeight ; save the document height
mov ds:[di].DPI_eventTable, ax ; store the new EventTable
mov {word} ds:[di].DPI_flags, cx ; store some new flags
or ds:[di].DPI_flags, DP_LOADING ; to avoid re-draw requests
mov cx, ss:[bp].PRS_width ; screen width => CX
mov ds:[di].DPI_viewWidth, cx ; store the width here
mov bx, ss:[bp].PRS_currentSizeObj ; current handle => BX
tst bx ; check for valid handle
jnz havePrintEvent ; if exists, then print
if SUPPORT_ONE_LINE_PRINT
clr ax ; assume not one-line print
test ds:[di].DPI_printFlags, mask DPPF_ONE_LINE_EVENT
jz notOneLine
mov ax, mask PEI_ONE_LINE_PRINT
notOneLine:
else
clr ax ; PrintEventInfo => AX
endif
call DayPlanCreatePrintEvent ; print event => DS:*BX
havePrintEvent:
EC < push si ; save DayPlan handle >
EC < mov si, bx ; move event handle >
EC < call ECCheckLMemObject ; object in DS:*SI >
EC < pop si ; restore DayPlan handle>
mov es:[timeOffset], 0 ; no time offset !
push bp, bx ; save structure & DayEvent
; Load the events, and then print them out
;
call DayPlanLoadEvents ; load all of the events
pop bp, dx ; restore structure & DayEvent
call DayPlanPrintAllEvents ; print all of the events
; number of pages => CX
; Clean up
;
tst ss:[bp].PRS_currentSizeObj ; start with a size object ??
jnz finishUp ; yes, so don't kill it
call DayPlanNukePrintEvent ; else destroy the print event
finishUp:
mov di, ds:[si] ; dereference the chunk
add di, ds:[di].DayPlan_offset ; access my instace data
mov ax, ds:[di].DPI_eventTable ; print EventTable => AX
pop ds:[di].DPI_docHeight ; restore the document height
pop ds:[di].DPI_viewWidth ; restore the view width
pop ds:[di].DPI_textHeight ; resotre one-line text height
pop {word} ds:[di].DPI_flags ; restore InfoFlags & PrintFlags
pop ds:[di].DPI_eventTable ; save these values...
call LMemFree ; free up the print table
mov ax, cx ; number of pages => AX
done:
.leave
ret
DayPlanPrintEngine endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
DayPlanCreatePrintEvent
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Create a DayEvent to use only for printing. Also use one
of the MyText Objects created as the SizeObject, so that
all the text heights will be correctly calculated.
CALLED BY: DayPlanPrintEngine
PASS: DS:*SI = DayPlanClass instance data
ES = DGroup
SS:BP = PrintRangeStruct
AX = PrintEventInfo
RETURN: DS:*BX = DayEventClass object to print with
Carry = Clear if sufficient room to print
= Set if not
DESTROYED: Nothing
PSEUDO CODE/STRATEGY:
Query the SPC for the print mode
Create the event buffer
Set the proper font
Calculate the height of a one-line TEO
KNOWN BUGS/SIDE EFFECTS/IDEAS:
none
REVISION HISTORY:
Name Date Description
---- ---- -----------
Don 6/29/90 Initial version
kho 12/18/96 One-line printing added
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
DayPlanCreatePrintEvent proc near
class DayEventClass
uses ax, cx, dx, di
.enter
; Store some important information
;
push bp, si ; save DayPlan, structure
push ax ; save PrintEventInfo
if SUPPORT_ONE_LINE_PRINT
push ax ; one more time
endif
mov ax, es:[SizeTextObject]
mov ss:[bp].PRS_sizeTextObj, ax
mov ax, es:[oneLineTextHeight]
mov ss:[bp].PRS_oneLineText, ax
mov ax, es:[timeWidth]
mov ss:[bp].PRS_timeWidth, ax
mov ax, es:[timeOffset]
mov ss:[bp].PRS_timeOffset, ax
; Query the MyPrint for the output mode
;
push ss:[bp].PRS_pointSize ; save the pointsize
GetResourceHandleNS CalendarPrintOptions, bx
mov si, offset CalendarPrintOptions ; OD => BX:SI
mov ax, MSG_MY_PRINT_GET_INFO
call ObjMessage_print_call
push cx ; save the FontID
mov di, offset PrintEventClass ; parent Event class => ES:DI
call BufferCreate ; PrintEvent => CX:*DX
EC < cmp cx, ds:[LMBH_handle] ; must be in this block >
EC < ERROR_NE DP_CREATE_PRINT_EVENT_WRONG_RESOURCE >
; Now tell the DayEvent to set a new font & size
;
mov si, dx ; DayEvent OD => DS:*SI
pop cx ; FontID => CX
pop dx ; pointsize => DX
pop bp ; PrintEventInfo => BP
mov ax, MSG_PE_SET_FONT_AND_SIZE ; set the font and pointsize
call ObjCallInstanceNoLock ; send the method
; Set up the event text for multiple rulers
;
mov bx, si ; DayEvent handle => BX
mov di, ds:[si] ; dereference the DayEvent
add di, ds:[di].DayEvent_offset ; instance data => DS:DI
mov si, ds:[di].DEI_textHandle ; text MyText => DS:*DI
mov es:[SizeTextObject], si ; store the handle here
if SUPPORT_ONE_LINE_PRINT
; If one-line-print, set the VisTextStates of event text accordingly
;
pop ax
test ax, mask PEI_ONE_LINE_PRINT
jz notOneLine
mov ax, MSG_VIS_TEXT_MODIFY_EDITABLE_SELECTABLE
mov cx, (0 shl 8) or mask VTS_ONE_LINE ; Set VTS_ONE_LINE
call ObjCallInstanceNoLock
notOneLine:
endif
mov ax, MSG_VIS_TEXT_CREATE_STORAGE
mov cx, mask VTSF_MULTIPLE_PARA_ATTRS
call ObjCallInstanceNoLock ; send the method
mov ax, MSG_VIS_TEXT_SET_MAX_LENGTH
mov cx, MAX_TEXT_FIELD_LENGTH+1 ; possibly 1 character too big
call ObjCallInstanceNoLock ; send the method
; Finally, calculate the one line height
;
pop si ; DayPlan handle => SI
mov ax, MSG_DP_CALC_ONE_LINE_HEIGHT
call ObjCallInstanceNoLock ; perform the calculation
pop bp ; PrintRangeStruct => SS:BP
mov ss:[bp].PRS_oneLineHeight, dx ; store the height
; Check to see if there is sufficient room to print events
;
mov ax, es:[timeWidth] ; move the time width => AX
cmp ss:[bp].PRS_width,ax ; compare with widths
; this sets/clears the carry
.leave
ret
DayPlanCreatePrintEvent endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
DayPlanNukePrintEvent
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Destory the DayEvent object used to print with
CALLED BY: DayPlanPrintEngine
PASS: DS:*DX = DayEventClass object to nuke
SS:BP = PrintRangeStruct
ES = DGroup
RETURN: Nothing
DESTROYED: Nothing
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/IDEAS:
none
REVISION HISTORY:
Name Date Description
---- ---- -----------
Don 6/29/90 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
DayPlanNukePrintEvent proc near
uses ax, cx, dx, bp, si
.enter
; Restore some important information
;
mov ax, ss:[bp].PRS_sizeTextObj
mov es:[SizeTextObject], ax
mov ax, ss:[bp].PRS_oneLineText
mov es:[oneLineTextHeight], ax
mov ax, ss:[bp].PRS_timeWidth
mov es:[timeWidth], ax
mov ax, ss:[bp].PRS_timeOffset
mov es:[timeOffset], ax
; Now destroy the print event
;
mov si, dx ; OD => DS:*SI
mov ax, MSG_VIS_DESTROY ; destroy the entire branch
mov dl, VUM_NOW ; destroy stuff now
call ObjCallInstanceNoLock ; send the method
.leave
ret
DayPlanNukePrintEvent endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
DayPlanPrintAllEvents
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Prints all of the events in the EventTable
CALLED BY: DayPlanPrintEngine
PASS: ES = DGroup
DS:SI = DayPlanClass instance data
SS:BP = PrintRangeStruct
DS:DX = DayEventClass object to use for printing
RETURN: CX = Number of pages printed
DESTROYED: AX, BX, DI
PSEUDO CODE/STRATEGY:
A PrintPositionStruct is allocated on the stack, which is
used to pass values to PositionDayEvent(), and to
maintain some internal state. Note that a PositionStruct
is the first element of a PrintPositionStruct.
KNOWN BUGS/SIDE EFFECTS/IDEAS:
none
REVISION HISTORY:
Name Date Description
---- ---- -----------
Don 5/27/90 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
DayPlanPrintAllEvents proc near
class DayPlanClass
uses dx, si, bp
.enter
; Some set-up work
;
sub sp, size PrintPositionStruct ; allocate the PositionStruct
mov bx, sp ; structure => SS:BX
mov ax, ss:[bp].PRS_width
mov ss:[bx].PS_totalWidth, ax ; store the document width
mov ss:[bx].PS_timeLeft, 0 ; never draw the icons
mov ax, ss:[bp].PRS_oneLineHeight
mov ss:[bx].PS_timeHeight, ax ; store the one line height
mov ax, ss:[bp].PRS_height
mov ss:[bx].PPS_pageHeight, ax ; store the page height
mov ax, ss:[bp].PRS_specialValue ; either 1 or 2
mov ss:[bx].PPS_singlePage, al ; store the page boolean
mov ss:[bx].PPS_numPages, 1 ; initally, one page
mov ss:[bx].PPS_nextOffset, 0 ; no next offset
mov ax, dx ; PrintEvent => DS:*AX
mov dx, bx ; PositionStruct => SS:DX
mov bp, ss:[bp].PRS_gstate ; GState => BP
mov si, ds:[si] ; dereference the handle
add si, ds:[si].DayPlan_offset ; access my instance data
mov si, ds:[si].DPI_eventTable ; event table handle => SI
mov di, ds:[si] ; dereference the handle
mov bx, size EventTableHeader ; go to the first event
clr cx ; start at the top!
jmp midLoop ; start looping
; Loop here
eventLoop:
call DayPlanPrintOneEvent ; print the event
jc done ; if carry set, abort
add bx, size EventTableEntry
midLoop:
cmp bx, ds:[di].ETH_last ; are we done ??
jl eventLoop
; Let's do some clean up work
;
done:
mov bp, dx ; PrintPositionStruct => SS:BP
mov cx, ss:[bp].PPS_numPages ; number of pages => AX
add sp, size PrintPositionStruct ; clean up the stack
.leave
ret
DayPlanPrintAllEvents endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
DayPlanPrintOneEvent
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Prints one event corresponding to the EventTableEntry
CALLED BY: DayPlanPrintEngine()
PASS: ES = DGroup
DS:*SI = EventTable
DS:DI = EventTable
DS:*AX = PrintEvent to use
SS:DX = PrintPositionStruct
BP = GState
CX = Y-position
BX = Offset to the EventTableEntry to be printed
RETURN: DS:DI = EventTable (updated)
CX = Y-position in document (updated)
Carry = Set to stop printing of this range
DESTROYED: Nothing
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/IDEAS:
none
REVISION HISTORY:
Name Date Description
---- ---- -----------
Don 5/27/90 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
DayPlanPrintOneEvent proc near
.enter
; First stuff the event
;
push si, bp, dx ; table handle, GState, struct
add di, bx ; go to the proper ETE
mov bp, ds:[di].ETE_size ; event height => BP
mov dx, DO_NOT_INSERT_VALUE ; don't insert into vistree
call StuffDayEvent ; load time & text strings
mov si, ax ; DayEvent => SI
mov dx, bp ; event height => DX
pop bp ; PositionStruct => SS:BP
pop di ; GState => DI
cmp ss:[bp].PPS_singlePage, 1 ; printing events in a month?
jnz position ; no, so use regular values
call DayPlanPrintPrepareDateEvent ; set some styles, etc...
; Now position the sucker (possibly on a new page)
;
position:
mov ax, cx ; y-position => AX
add ax, dx ; calculate to end of event
cmp ss:[bp].PPS_pageHeight, ax ; does it fit on the page ??
jge positionNow ; yes, so jump
printAgain:
call DayPlanPrintEventCrossesPage ; determine what to do
positionNow:
pushf ; save the carry flag
call PositionDayEvent ; position the event (at CX)
add cx, dx ; update the document position
; Enable the event for printing
;
mov ax, MSG_PE_PRINT_ENABLE
call ObjCallInstanceNoLock ; CX, DX, BP are preserved
; Finally draw the event
;
push bp, dx, cx ; save doc offset & struct
mov bp, di ; GState => BP
mov ax, MSG_VIS_DRAW
mov cl, mask DF_PRINT ; we're printing
call ObjCallInstanceNoLock ; draw the event
pop bp, dx, cx ; restore doc offset, struct
cmp ss:[bp].PPS_singlePage, 1 ; print to single page only ?
je noLoop ; yes, so don't loop again
popf ; restore the carry flag
jc printAgain ; multiple-page event
pushf ; else store CF=0
noLoop:
popf ; restore the CF
; Clean up work
;
mov dx, bp ; PrintPositionStruct => SS:DX
mov bp, di ; GState => BP
mov ax, si ; PrintEvent => DS:*AX
pop si ; restore the EventTable chunk
mov di, ds:[si] ; dereference the handle
.leave
ret
DayPlanPrintOneEvent endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
DayPlanPrintPrepareDateEvent
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Set the margin and border information for this event
to fully utilize the space inside of a date.
CALLED BY: GLOBAL
PASS: DS:*SI = DayEventClass object used for printing
SS:BP = PrintPositionStruct
ES = DGroup
RETURN: DX = Height of the event
DESTROYED: Nothing
PSEUDO CODE/STRATEGY:
We are being very tricky here, because the SizeTextObject,
at this point, holds the text of the event. All we need to
do is determine if there is a valid time, and if so,
set up the first paragraph and the rest of the object
rulers.
KNOWN BUGS/SIDE EFFECTS/IDEAS:
none
REVISION HISTORY:
Name Date Description
---- ---- -----------
Don 10/4/90 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
TEXT_INDENT_LEVEL = 2 ; basic text indentation level
CRString byte '\r', 0 ; a carriage return
VTRP_textPtr equ <VTRP_textReference.TR_ref.TRU_pointer.TRP_pointer>
DayPlanPrintPrepareDateEvent proc near
uses ax, bx, cx, di, si, bp
class VisTextClass
.enter
; Set the default margin
;
mov di, bp ; PrintPositionStruct => SS:DI
push si ; save the DayEvent handle
mov si, es:[SizeTextObject] ; OD => DS:*SI
sub sp, size VisTextSetMarginParams
mov bp, sp
clrdw ss:[bp].VTSMP_range.VTR_start
movdw ss:[bp].VTSMP_range.VTR_end, TEXT_ADDRESS_PAST_END
mov ss:[bp].VTSMP_position, TEXT_INDENT_LEVEL * 8
mov ax, MSG_VIS_TEXT_SET_LEFT_AND_PARA_MARGIN
call ObjCallInstanceNoLock ; send the method
add sp, size VisTextSetMarginParams
; Do we have any time ?
;
mov bx, si ; MyText handle => BX
pop si ; DayEvent handle => SI
mov ax, MSG_DE_GET_TIME
call ObjCallInstanceNoLock ; time => CX
mov si, bx ; MyText handle => SI
cmp cx, -1 ; no time ??
je calcSize ; just re-calculate the size
; Check if the space between the time and the border is wide enough
; to hold some text. If it is not, insert a CR at the front of the
; text.
;
mov cx, ss:[di].PPS_posStruct.PS_totalWidth
sub cx, es:[timeWidth] ; 1st line's wdith => CX
cmp cx, VIS_TEXT_MIN_TEXT_FIELD_WIDTH
jge setMargin ; if big enough, continue
sub sp, size VisTextReplaceParameters
mov bp, sp ; structure => SS:BP
clr ax
mov ss:[bp].VTRP_flags, ax
clrdw ss:[bp].VTRP_range.VTR_start, ax
clrdw ss:[bp].VTRP_range.VTR_end, ax
mov ss:[bp].VTRP_insCount.high, ax
inc ax
mov ss:[bp].VTRP_insCount.low, ax ; insert one character
mov ss:[bp].VTRP_textReference.TR_type, TRT_POINTER
mov ss:[bp].VTRP_textPtr.segment, cs
mov ss:[bp].VTRP_textPtr.offset, offset CRString
mov ax, MSG_VIS_TEXT_REPLACE_TEXT
call ObjCallInstanceNoLock ; insert the CR.
add sp, size VisTextReplaceParameters
jmp calcSize ; finish up
; Else set the paragraph margin for the first paragraph
;
setMargin:
sub sp, size VisTextSetMarginParams
mov bp, sp
clr ax
clrdw ss:[bp].VTSMP_range.VTR_start, ax
clrdw ss:[bp].VTSMP_range.VTR_end, ax
mov ax, es:[timeWidth] ; time width => AX
shl ax, 1
shl ax, 1
shl ax, 1
mov ss:[bp].VTSMP_position, ax
mov ax, MSG_VIS_TEXT_SET_PARA_MARGIN
call ObjCallInstanceNoLock ; set paragraph margin in BP
add sp, size VisTextSetMarginParams
; Calculate the final size. I had to add a horrible hack to
; clear a field in the text object, so that the actual height
; of the text will be properly returned, rather than the height
; of the first text to be drawn. -Don 9/29/93
;
calcSize:
mov cx, ss:[di].PPS_posStruct.PS_totalWidth
clr dx ; don't cache the height
mov di, ds:[si]
add di, ds:[di].Vis_offset
clr ds:[di].VTI_lastWidth
mov ax, MSG_VIS_TEXT_CALC_HEIGHT ; using width in CX
call ObjCallInstanceNoLock ; height => DX
.leave
ret
DayPlanPrintPrepareDateEvent endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
DayPlanPrintEventCrossesPage
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: An event does not fit on one page, by the amount in AX.
Determine where to print the event.
CALLED BY: DayPlanPrintOneEvent
PASS: ES = DGroup
SS:BP = PrintPositionStruct
CX = Offset in page to the top of the event
DX = Length of the event
DI = GState
RETURN: CX = Offset at which we should print the event.
Carry = Set to print this event again
DESTROYED: AX
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/IDEAS:
none
REVISION HISTORY:
Name Date Description
---- ---- -----------
Don 6/30/90 Initial version
Don 7/19/90 Deal with multi-page events better
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
MAX_SPACE_AT_BOTTOM_OF_PAGE = 36 ; (up to 3 lines of 12pt text)
DayPlanPrintEventCrossesPage proc near
uses bx, dx
.enter
; Will we need to draw again ??
;
mov bx, ss:[bp].PPS_pageHeight ; height of a page => BX
cmp ss:[bp].PPS_singlePage, 1 ; keep on one page ??
je forceClip ; force event to be clipped
; Are we in the middle of a multi-page event
;
tst ss:[bp].PPS_nextOffset ; is there a next offset ??
jz firstTime ; no, so continue
mov cx, ss:[bp].PPS_nextOffset ; grab the next offset
jmp newPage
; See where we should place this event
;
firstTime:
mov ax, bx ; bottom of page => AX
sub ax, cx ; how far from the bottom => AX
cmp ax, MAX_SPACE_AT_BOTTOM_OF_PAGE ; split on two pages ??
jg nextPageCalc ; yes, so calc next offset
clr cx ; else offset = 0 on a new page
; Create a new page
;
newPage:
inc ss:[bp].PPS_numPages ; count the number of pages
mov al, PEC_FORM_FEED
call GrNewPage ; new page to the GString
call InitPagePosition ; initialize the drawing
; See if it will now fit on the rest of this page
;
nextPageCalc:
mov ss:[bp].PPS_nextOffset, 0 ; assume no next offset
mov ax, cx ; offset => AX
add ax, dx ; length of the page
cmp bx, ax ; does it fit on the page ??
jge done ; yes
forceClip:
call DayPlanPrintCalcNextOffset ; else do the dirty work!
stc ; ensure the carry is set!
done:
.leave
ret
DayPlanPrintEventCrossesPage endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
DayPlanPrintCalcNextOffset
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Calculate the offset of the event text for the next page,
to ensure the text starts with a complete line. Also sets
the clip rectangle (if any) for the bottom of the current
page.
CALLED BY: DayPlanPrintEventCrossesPage
PASS: ES = DGroup
SS:BP = PrintPositionStruct
BX = Page length
CX = Offset of the event text
DX = Length of the event text
DI = GState
RETURN: Nothing
DESTROYED: AX, BX, DX
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/IDEAS:
none
REVISION HISTORY:
Name Date Description
---- ---- -----------
Don 7/19/90 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
DayPlanPrintCalcNextOffset proc near
uses cx
.enter
; Calculate the raw offset to the next page
;
mov ss:[bp].PPS_nextOffset, cx ; store the current offset
sub ss:[bp].PPS_nextOffset, bx ; subtract offset to next page
; See if we break between lines
;
mov ax, bx ; page width => AX
sub ax, cx ; space left on page => AX
sub ax, EVENT_TB_MARGIN ; allow for top margin
mov cx, es:[oneLineTextHeight]
sub cx, 2 * EVENT_TB_MARGIN ; space per line => CX
clr dx ; difference => DX:AX
div cx ; perform the division
tst dx ; any remainder ??
jz done ; no, so we're done
; Else we must set a clip rectangle, and adjust the next offset
;
push si ; save this register
add ss:[bp].PPS_nextOffset, dx ; adjust next offset!
sub bx, dx ; offset to end of text
;;; dec bx ; text goes from 0->N-1
mov dx, bx ; bottom edge
mov cx, ss:[bp].PS_totalWidth ; right edge
clr ax ; left edge
mov bx, ax ; top edge
mov si, PCT_REPLACE ; set a new clip rectangle
call GrSetClipRect ; set the clip rectangle
pop si ; restore this register
done:
.leave
ret
DayPlanPrintCalcNextOffset endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
InitPagePosition
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Account for the page borders by translating the page down
and right by the border amount
CALLED BY: INTERNAL
PASS: DI = GString
RETURN: Nothing
DESTROYED: Nothing
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/IDEAS:
none
REVISION HISTORY:
Name Date Description
---- ---- -----------
Don 6/29/90 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
InitPagePosition proc near
uses ax, bx, cx, dx, si
.enter
; Initialize the page position
;
mov dx, es:[printMarginLeft]
clr cx ; x translation => DX:CX
mov bx, es:[printMarginTop]
mov ax, cx ; y translation => BX:AX
call GrApplyTranslation ; allow fro print margins
; Alse set the color mapping mode
;
mov al, ColorMapMode <1, 0, CMT_CLOSEST>
call GrSetAreaColorMap ; map to solid colors
; Set a clip rectangle for the entire page
;
clr ax, bx
mov cx, es:[printWidth]
mov dx, es:[printHeight]
mov si, PCT_REPLACE ; set a new clip rectangle
call GrSetClipRect ; set the clip rectangle
.leave
ret
InitPagePosition endp
PrintCode ends
| 29.260331 | 79 | 0.632679 |
3ef4fc3504d723bdd2d8a5558ca21180fc73b4ba | 37,111 | asm | Assembly | tmp1/c55x-sim2/foo/Debug/sd_test.asm | jwestmoreland/eZdsp-DBG-sim | f6eacd75d4f928dec9c751545e9e919d052e4ade | [
"MIT"
] | 1 | 2020-08-27T11:31:13.000Z | 2020-08-27T11:31:13.000Z | tmp1/c55x-sim2/foo/Debug/sd_test.asm | jwestmoreland/eZdsp-DBG-sim | f6eacd75d4f928dec9c751545e9e919d052e4ade | [
"MIT"
] | null | null | null | tmp1/c55x-sim2/foo/Debug/sd_test.asm | jwestmoreland/eZdsp-DBG-sim | f6eacd75d4f928dec9c751545e9e919d052e4ade | [
"MIT"
] | null | null | null | ;*******************************************************************************
;* TMS320C55x C/C++ Codegen PC v4.4.1 *
;* Date/Time created: Sat Sep 29 23:07:17 2018 *
;*******************************************************************************
.compiler_opts --hll_source=on --mem_model:code=flat --mem_model:data=large --object_format=coff --silicon_core_3_3 --symdebug:dwarf
.mmregs
.cpl_on
.arms_on
.c54cm_off
.asg AR6, FP
.asg XAR6, XFP
.asg DPH, MDP
.model call=c55_std
.model mem=large
.noremark 5002 ; code respects overwrite rules
;*******************************************************************************
;* GLOBAL FILE PARAMETERS *
;* *
;* Architecture : TMS320C55x *
;* Optimizing for : Speed *
;* Memory : Large Model (23-Bit Data Pointers) *
;* Calls : Normal Library ASM calls *
;* Debug Info : Standard TI Debug Information *
;*******************************************************************************
$C$DW$CU .dwtag DW_TAG_compile_unit
.dwattr $C$DW$CU, DW_AT_name("../c5535_bsl_revc/ezdsp5535_v1/tests/sd/sd_test.c")
.dwattr $C$DW$CU, DW_AT_producer("TMS320C55x C/C++ Codegen PC v4.4.1 Copyright (c) 1996-2012 Texas Instruments Incorporated")
.dwattr $C$DW$CU, DW_AT_TI_version(0x01)
.dwattr $C$DW$CU, DW_AT_comp_dir("F:\eZdsp_DBG\tmp1\c55x-sim2\foo\Debug")
$C$DW$1 .dwtag DW_TAG_subprogram, DW_AT_name("EZDSP5535_SDCARD_init")
.dwattr $C$DW$1, DW_AT_TI_symbol_name("_EZDSP5535_SDCARD_init")
.dwattr $C$DW$1, DW_AT_type(*$C$DW$T$19)
.dwattr $C$DW$1, DW_AT_declaration
.dwattr $C$DW$1, DW_AT_external
$C$DW$2 .dwtag DW_TAG_subprogram, DW_AT_name("EZDSP5535_SDCARD_write")
.dwattr $C$DW$2, DW_AT_TI_symbol_name("_EZDSP5535_SDCARD_write")
.dwattr $C$DW$2, DW_AT_type(*$C$DW$T$19)
.dwattr $C$DW$2, DW_AT_declaration
.dwattr $C$DW$2, DW_AT_external
$C$DW$3 .dwtag DW_TAG_formal_parameter
.dwattr $C$DW$3, DW_AT_type(*$C$DW$T$22)
$C$DW$4 .dwtag DW_TAG_formal_parameter
.dwattr $C$DW$4, DW_AT_type(*$C$DW$T$22)
$C$DW$5 .dwtag DW_TAG_formal_parameter
.dwattr $C$DW$5, DW_AT_type(*$C$DW$T$24)
.dwendtag $C$DW$2
$C$DW$6 .dwtag DW_TAG_subprogram, DW_AT_name("EZDSP5535_SDCARD_read")
.dwattr $C$DW$6, DW_AT_TI_symbol_name("_EZDSP5535_SDCARD_read")
.dwattr $C$DW$6, DW_AT_type(*$C$DW$T$19)
.dwattr $C$DW$6, DW_AT_declaration
.dwattr $C$DW$6, DW_AT_external
$C$DW$7 .dwtag DW_TAG_formal_parameter
.dwattr $C$DW$7, DW_AT_type(*$C$DW$T$22)
$C$DW$8 .dwtag DW_TAG_formal_parameter
.dwattr $C$DW$8, DW_AT_type(*$C$DW$T$22)
$C$DW$9 .dwtag DW_TAG_formal_parameter
.dwattr $C$DW$9, DW_AT_type(*$C$DW$T$24)
.dwendtag $C$DW$6
$C$DW$10 .dwtag DW_TAG_subprogram, DW_AT_name("EZDSP5535_SDCARD_close")
.dwattr $C$DW$10, DW_AT_TI_symbol_name("_EZDSP5535_SDCARD_close")
.dwattr $C$DW$10, DW_AT_type(*$C$DW$T$19)
.dwattr $C$DW$10, DW_AT_declaration
.dwattr $C$DW$10, DW_AT_external
$C$DW$11 .dwtag DW_TAG_subprogram, DW_AT_name("printf")
.dwattr $C$DW$11, DW_AT_TI_symbol_name("_printf")
.dwattr $C$DW$11, DW_AT_type(*$C$DW$T$10)
.dwattr $C$DW$11, DW_AT_declaration
.dwattr $C$DW$11, DW_AT_external
$C$DW$12 .dwtag DW_TAG_formal_parameter
.dwattr $C$DW$12, DW_AT_type(*$C$DW$T$31)
$C$DW$13 .dwtag DW_TAG_unspecified_parameters
.dwendtag $C$DW$11
$C$DW$14 .dwtag DW_TAG_subprogram, DW_AT_name("scanf")
.dwattr $C$DW$14, DW_AT_TI_symbol_name("_scanf")
.dwattr $C$DW$14, DW_AT_type(*$C$DW$T$10)
.dwattr $C$DW$14, DW_AT_declaration
.dwattr $C$DW$14, DW_AT_external
$C$DW$15 .dwtag DW_TAG_formal_parameter
.dwattr $C$DW$15, DW_AT_type(*$C$DW$T$31)
$C$DW$16 .dwtag DW_TAG_unspecified_parameters
.dwendtag $C$DW$14
.global _ReadBuff
.bss _ReadBuff,256,0,0
$C$DW$17 .dwtag DW_TAG_variable, DW_AT_name("ReadBuff")
.dwattr $C$DW$17, DW_AT_TI_symbol_name("_ReadBuff")
.dwattr $C$DW$17, DW_AT_location[DW_OP_addr _ReadBuff]
.dwattr $C$DW$17, DW_AT_type(*$C$DW$T$28)
.dwattr $C$DW$17, DW_AT_external
.global _WriteBuff
.bss _WriteBuff,256,0,0
$C$DW$18 .dwtag DW_TAG_variable, DW_AT_name("WriteBuff")
.dwattr $C$DW$18, DW_AT_TI_symbol_name("_WriteBuff")
.dwattr $C$DW$18, DW_AT_location[DW_OP_addr _WriteBuff]
.dwattr $C$DW$18, DW_AT_type(*$C$DW$T$28)
.dwattr $C$DW$18, DW_AT_external
; F:\t\cc5p5\ccsv5\tools\compiler\c5500_4.4.1\bin\acp55.exe -@f:\\AppData\\Local\\Temp\\1750812
.sect ".text"
.align 4
.global _sd_test
$C$DW$19 .dwtag DW_TAG_subprogram, DW_AT_name("sd_test")
.dwattr $C$DW$19, DW_AT_low_pc(_sd_test)
.dwattr $C$DW$19, DW_AT_high_pc(0x00)
.dwattr $C$DW$19, DW_AT_TI_symbol_name("_sd_test")
.dwattr $C$DW$19, DW_AT_external
.dwattr $C$DW$19, DW_AT_type(*$C$DW$T$23)
.dwattr $C$DW$19, DW_AT_TI_begin_file("../c5535_bsl_revc/ezdsp5535_v1/tests/sd/sd_test.c")
.dwattr $C$DW$19, DW_AT_TI_begin_line(0x3b)
.dwattr $C$DW$19, DW_AT_TI_begin_column(0x08)
.dwattr $C$DW$19, DW_AT_TI_max_frame_size(0x08)
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/tests/sd/sd_test.c",line 60,column 1,is_stmt,address _sd_test
.dwfde $C$DW$CIE, _sd_test
;*******************************************************************************
;* FUNCTION NAME: sd_test *
;* *
;* Function Uses Regs : AC0,AC0,AC1,AC1,T0,AR0,XAR0,AR1,AR2,AR3,XAR3,SP, *
;* CARRY,TC1,M40,SATA,SATD,RDM,FRCT,SMUL *
;* Stack Frame : Compact (No Frame Pointer, w/ debug) *
;* Total Frame Size : 8 words *
;* (1 return address/alignment) *
;* (4 function parameters) *
;* (3 local values) *
;* Min System Stack : 1 word *
;*******************************************************************************
_sd_test:
.dwcfi cfa_offset, 1
.dwcfi save_reg_to_mem, 91, -1
AADD #-7, SP
.dwcfi cfa_offset, 8
$C$DW$20 .dwtag DW_TAG_variable, DW_AT_name("count")
.dwattr $C$DW$20, DW_AT_TI_symbol_name("_count")
.dwattr $C$DW$20, DW_AT_type(*$C$DW$T$23)
.dwattr $C$DW$20, DW_AT_location[DW_OP_bregx 0x24 4]
$C$DW$21 .dwtag DW_TAG_variable, DW_AT_name("status")
.dwattr $C$DW$21, DW_AT_TI_symbol_name("_status")
.dwattr $C$DW$21, DW_AT_type(*$C$DW$T$23)
.dwattr $C$DW$21, DW_AT_location[DW_OP_bregx 0x24 5]
$C$DW$22 .dwtag DW_TAG_variable, DW_AT_name("c")
.dwattr $C$DW$22, DW_AT_TI_symbol_name("_c")
.dwattr $C$DW$22, DW_AT_type(*$C$DW$T$29)
.dwattr $C$DW$22, DW_AT_location[DW_OP_bregx 0x24 6]
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/tests/sd/sd_test.c",line 64,column 2,is_stmt
AMOV #$C$FSL1, XAR3 ; |64|
MOV XAR3, dbl(*SP(#0))
$C$DW$23 .dwtag DW_TAG_TI_branch
.dwattr $C$DW$23, DW_AT_low_pc(0x00)
.dwattr $C$DW$23, DW_AT_name("_printf")
.dwattr $C$DW$23, DW_AT_TI_call
CALL #_printf ; |64|
; call occurs [#_printf] ; |64|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/tests/sd/sd_test.c",line 65,column 2,is_stmt
AMOV #$C$FSL2, XAR3 ; |65|
MOV XAR3, dbl(*SP(#0))
$C$DW$24 .dwtag DW_TAG_TI_branch
.dwattr $C$DW$24, DW_AT_low_pc(0x00)
.dwattr $C$DW$24, DW_AT_name("_printf")
.dwattr $C$DW$24, DW_AT_TI_call
CALL #_printf ; |65|
; call occurs [#_printf] ; |65|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/tests/sd/sd_test.c",line 66,column 2,is_stmt
AMOV #$C$FSL3, XAR3 ; |66|
MOV XAR3, dbl(*SP(#0))
AMAR *SP(#6), XAR3
MOV XAR3, dbl(*SP(#2))
$C$DW$25 .dwtag DW_TAG_TI_branch
.dwattr $C$DW$25, DW_AT_low_pc(0x00)
.dwattr $C$DW$25, DW_AT_name("_scanf")
.dwattr $C$DW$25, DW_AT_TI_call
CALL #_scanf ; |66|
; call occurs [#_scanf] ; |66|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/tests/sd/sd_test.c",line 67,column 2,is_stmt
CMP *SP(#6) == #89, TC1 ; |67|
BCC $C$L1,TC1 ; |67|
; branchcc occurs ; |67|
CMP *SP(#6) == #121, TC1 ; |67|
BCC $C$L1,TC1 ; |67|
; branchcc occurs ; |67|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/tests/sd/sd_test.c",line 69,column 3,is_stmt
AMOV #$C$FSL4, XAR3 ; |69|
MOV XAR3, dbl(*SP(#0))
$C$DW$26 .dwtag DW_TAG_TI_branch
.dwattr $C$DW$26, DW_AT_low_pc(0x00)
.dwattr $C$DW$26, DW_AT_name("_printf")
.dwattr $C$DW$26, DW_AT_TI_call
CALL #_printf ; |69|
; call occurs [#_printf] ; |69|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/tests/sd/sd_test.c",line 70,column 3,is_stmt
MOV #1, T0
B $C$L10 ; |70|
; branch occurs ; |70|
$C$L1:
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/tests/sd/sd_test.c",line 74,column 2,is_stmt
$C$DW$27 .dwtag DW_TAG_TI_branch
.dwattr $C$DW$27, DW_AT_low_pc(0x00)
.dwattr $C$DW$27, DW_AT_name("_EZDSP5535_SDCARD_init")
.dwattr $C$DW$27, DW_AT_TI_call
CALL #_EZDSP5535_SDCARD_init ; |74|
; call occurs [#_EZDSP5535_SDCARD_init] ; |74|
MOV T0, *SP(#5) ; |74|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/tests/sd/sd_test.c",line 75,column 2,is_stmt
MOV T0, AR1
BCC $C$L2,AR1 == #0 ; |75|
; branchcc occurs ; |75|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/tests/sd/sd_test.c",line 76,column 9,is_stmt
AMOV #$C$FSL5, XAR3 ; |76|
MOV XAR3, dbl(*SP(#0))
$C$DW$28 .dwtag DW_TAG_TI_branch
.dwattr $C$DW$28, DW_AT_low_pc(0x00)
.dwattr $C$DW$28, DW_AT_name("_printf")
.dwattr $C$DW$28, DW_AT_TI_call
CALL #_printf ; |76|
; call occurs [#_printf] ; |76|
$C$L2:
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/tests/sd/sd_test.c",line 79,column 6,is_stmt
MOV #0, *SP(#4) ; |79|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/tests/sd/sd_test.c",line 79,column 17,is_stmt
MOV #256, AR2 ; |79|
MOV *SP(#4), AR1 ; |79|
CMPU AR1 >= AR2, TC1 ; |79|
BCC $C$L4,TC1 ; |79|
; branchcc occurs ; |79|
$C$L3:
$C$DW$L$_sd_test$7$B:
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/tests/sd/sd_test.c",line 81,column 6,is_stmt
MOV *SP(#4), T0 ; |81|
AMOV #_ReadBuff, XAR3 ; |81|
MOV #0, *AR3(T0) ; |81|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/tests/sd/sd_test.c",line 82,column 3,is_stmt
MOV *SP(#4), T0 ; |82|
MOV *SP(#4), AR1 ; |82|
AMOV #_WriteBuff, XAR3 ; |82|
MOV AR1, *AR3(T0) ; |82|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/tests/sd/sd_test.c",line 79,column 46,is_stmt
ADD #1, *SP(#4) ; |79|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/tests/sd/sd_test.c",line 79,column 17,is_stmt
MOV *SP(#4), AR1 ; |79|
CMPU AR1 < AR2, TC1 ; |79|
BCC $C$L3,TC1 ; |79|
; branchcc occurs ; |79|
$C$DW$L$_sd_test$7$E:
$C$L4:
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/tests/sd/sd_test.c",line 86,column 5,is_stmt
AMOV #1024000, XAR3 ; |86|
AMOV #_WriteBuff, XAR0 ; |86|
MOV #512, AC1 ; |86|
MOV XAR3, AC0
$C$DW$29 .dwtag DW_TAG_TI_branch
.dwattr $C$DW$29, DW_AT_low_pc(0x00)
.dwattr $C$DW$29, DW_AT_name("_EZDSP5535_SDCARD_write")
.dwattr $C$DW$29, DW_AT_TI_call
CALL #_EZDSP5535_SDCARD_write ; |86|
; call occurs [#_EZDSP5535_SDCARD_write] ; |86|
MOV T0, *SP(#5) ; |86|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/tests/sd/sd_test.c",line 87,column 5,is_stmt
MOV T0, AR1
BCC $C$L5,AR1 == #0 ; |87|
; branchcc occurs ; |87|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/tests/sd/sd_test.c",line 88,column 9,is_stmt
AMOV #$C$FSL6, XAR3 ; |88|
MOV XAR3, dbl(*SP(#0))
$C$DW$30 .dwtag DW_TAG_TI_branch
.dwattr $C$DW$30, DW_AT_low_pc(0x00)
.dwattr $C$DW$30, DW_AT_name("_printf")
.dwattr $C$DW$30, DW_AT_TI_call
CALL #_printf ; |88|
; call occurs [#_printf] ; |88|
$C$L5:
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/tests/sd/sd_test.c",line 91,column 5,is_stmt
AMOV #1024000, XAR3 ; |91|
AMOV #_ReadBuff, XAR0 ; |91|
MOV #512, AC1 ; |91|
MOV XAR3, AC0
$C$DW$31 .dwtag DW_TAG_TI_branch
.dwattr $C$DW$31, DW_AT_low_pc(0x00)
.dwattr $C$DW$31, DW_AT_name("_EZDSP5535_SDCARD_read")
.dwattr $C$DW$31, DW_AT_TI_call
CALL #_EZDSP5535_SDCARD_read ; |91|
; call occurs [#_EZDSP5535_SDCARD_read] ; |91|
MOV T0, *SP(#5) ; |91|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/tests/sd/sd_test.c",line 92,column 5,is_stmt
MOV T0, AR1
BCC $C$L6,AR1 == #0 ; |92|
; branchcc occurs ; |92|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/tests/sd/sd_test.c",line 93,column 9,is_stmt
AMOV #$C$FSL7, XAR3 ; |93|
MOV XAR3, dbl(*SP(#0))
$C$DW$32 .dwtag DW_TAG_TI_branch
.dwattr $C$DW$32, DW_AT_low_pc(0x00)
.dwattr $C$DW$32, DW_AT_name("_printf")
.dwattr $C$DW$32, DW_AT_TI_call
CALL #_printf ; |93|
; call occurs [#_printf] ; |93|
$C$L6:
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/tests/sd/sd_test.c",line 96,column 6,is_stmt
MOV #0, *SP(#4) ; |96|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/tests/sd/sd_test.c",line 96,column 17,is_stmt
MOV #256, AR2 ; |96|
MOV *SP(#4), AR1 ; |96|
CMPU AR1 >= AR2, TC1 ; |96|
BCC $C$L9,TC1 ; |96|
; branchcc occurs ; |96|
$C$L7:
$C$DW$L$_sd_test$13$B:
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/tests/sd/sd_test.c",line 98,column 3,is_stmt
MOV *SP(#4), T0 ; |98|
AMOV #_WriteBuff, XAR3 ; |98|
MOV *AR3(T0), AR1 ; |98|
AMOV #_ReadBuff, XAR3 ; |98|
MOV *AR3(T0), AR2 ; |98|
CMPU AR2 == AR1, TC1 ; |98|
BCC $C$L8,TC1 ; |98|
; branchcc occurs ; |98|
$C$DW$L$_sd_test$13$E:
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/tests/sd/sd_test.c",line 100,column 4,is_stmt
AMOV #$C$FSL8, XAR3 ; |100|
MOV XAR3, dbl(*SP(#0))
MOV *SP(#4), AR1 ; |100|
MOV AR1, *SP(#2) ; |100|
$C$DW$33 .dwtag DW_TAG_TI_branch
.dwattr $C$DW$33, DW_AT_low_pc(0x00)
.dwattr $C$DW$33, DW_AT_name("_printf")
.dwattr $C$DW$33, DW_AT_TI_call
CALL #_printf ; |100|
; call occurs [#_printf] ; |100|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/tests/sd/sd_test.c",line 101,column 4,is_stmt
MOV #1, T0
B $C$L10 ; |101|
; branch occurs ; |101|
$C$L8:
$C$DW$L$_sd_test$15$B:
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/tests/sd/sd_test.c",line 96,column 48,is_stmt
ADD #1, *SP(#4) ; |96|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/tests/sd/sd_test.c",line 96,column 17,is_stmt
MOV #256, AR2 ; |96|
MOV *SP(#4), AR1 ; |96|
CMPU AR1 < AR2, TC1 ; |96|
BCC $C$L7,TC1 ; |96|
; branchcc occurs ; |96|
$C$DW$L$_sd_test$15$E:
$C$L9:
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/tests/sd/sd_test.c",line 105,column 2,is_stmt
AMOV #$C$FSL9, XAR3 ; |105|
MOV XAR3, dbl(*SP(#0))
$C$DW$34 .dwtag DW_TAG_TI_branch
.dwattr $C$DW$34, DW_AT_low_pc(0x00)
.dwattr $C$DW$34, DW_AT_name("_printf")
.dwattr $C$DW$34, DW_AT_TI_call
CALL #_printf ; |105|
; call occurs [#_printf] ; |105|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/tests/sd/sd_test.c",line 107,column 5,is_stmt
$C$DW$35 .dwtag DW_TAG_TI_branch
.dwattr $C$DW$35, DW_AT_low_pc(0x00)
.dwattr $C$DW$35, DW_AT_name("_EZDSP5535_SDCARD_close")
.dwattr $C$DW$35, DW_AT_TI_call
CALL #_EZDSP5535_SDCARD_close ; |107|
; call occurs [#_EZDSP5535_SDCARD_close] ; |107|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/tests/sd/sd_test.c",line 109,column 5,is_stmt
MOV #0, T0
$C$L10:
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/tests/sd/sd_test.c",line 110,column 1,is_stmt
AADD #7, SP
.dwcfi cfa_offset, 1
$C$DW$36 .dwtag DW_TAG_TI_branch
.dwattr $C$DW$36, DW_AT_low_pc(0x00)
.dwattr $C$DW$36, DW_AT_TI_return
RET
; return occurs
$C$DW$37 .dwtag DW_TAG_TI_loop
.dwattr $C$DW$37, DW_AT_name("F:\eZdsp_DBG\tmp1\c55x-sim2\foo\Debug\sd_test.asm:$C$L7:1:1538287637")
.dwattr $C$DW$37, DW_AT_TI_begin_file("../c5535_bsl_revc/ezdsp5535_v1/tests/sd/sd_test.c")
.dwattr $C$DW$37, DW_AT_TI_begin_line(0x60)
.dwattr $C$DW$37, DW_AT_TI_end_line(0x67)
$C$DW$38 .dwtag DW_TAG_TI_loop_range
.dwattr $C$DW$38, DW_AT_low_pc($C$DW$L$_sd_test$13$B)
.dwattr $C$DW$38, DW_AT_high_pc($C$DW$L$_sd_test$13$E)
$C$DW$39 .dwtag DW_TAG_TI_loop_range
.dwattr $C$DW$39, DW_AT_low_pc($C$DW$L$_sd_test$15$B)
.dwattr $C$DW$39, DW_AT_high_pc($C$DW$L$_sd_test$15$E)
.dwendtag $C$DW$37
$C$DW$40 .dwtag DW_TAG_TI_loop
.dwattr $C$DW$40, DW_AT_name("F:\eZdsp_DBG\tmp1\c55x-sim2\foo\Debug\sd_test.asm:$C$L3:1:1538287637")
.dwattr $C$DW$40, DW_AT_TI_begin_file("../c5535_bsl_revc/ezdsp5535_v1/tests/sd/sd_test.c")
.dwattr $C$DW$40, DW_AT_TI_begin_line(0x4f)
.dwattr $C$DW$40, DW_AT_TI_end_line(0x53)
$C$DW$41 .dwtag DW_TAG_TI_loop_range
.dwattr $C$DW$41, DW_AT_low_pc($C$DW$L$_sd_test$7$B)
.dwattr $C$DW$41, DW_AT_high_pc($C$DW$L$_sd_test$7$E)
.dwendtag $C$DW$40
.dwattr $C$DW$19, DW_AT_TI_end_file("../c5535_bsl_revc/ezdsp5535_v1/tests/sd/sd_test.c")
.dwattr $C$DW$19, DW_AT_TI_end_line(0x6e)
.dwattr $C$DW$19, DW_AT_TI_end_column(0x01)
.dwendentry
.dwendtag $C$DW$19
;*******************************************************************************
;* FAR STRINGS *
;*******************************************************************************
.sect ".const:.string"
.align 2
$C$FSL1: .string "Using the SD card provided with the board may erase the dem"
.string "o!!",10,0
.align 2
$C$FSL2: .string "Do you want to continue Y/N:",0
.align 2
$C$FSL3: .string "%c",0
.align 2
$C$FSL4: .string "Test Cancelled.",10,0
.align 2
$C$FSL5: .string "SD card Initialization failed.",10,0
.align 2
$C$FSL6: .string "SD card write fail.",10,0
.align 2
$C$FSL7: .string "SD card read fail.",10,0
.align 2
$C$FSL8: .string "Buffer miss matched at position %d",10,0
.align 2
$C$FSL9: .string " SD Card Read & Write Buffer Matched",10,0
;******************************************************************************
;* UNDEFINED EXTERNAL REFERENCES *
;******************************************************************************
.global _EZDSP5535_SDCARD_init
.global _EZDSP5535_SDCARD_write
.global _EZDSP5535_SDCARD_read
.global _EZDSP5535_SDCARD_close
.global _printf
.global _scanf
;*******************************************************************************
;* TYPE INFORMATION *
;*******************************************************************************
$C$DW$T$4 .dwtag DW_TAG_base_type
.dwattr $C$DW$T$4, DW_AT_encoding(DW_ATE_boolean)
.dwattr $C$DW$T$4, DW_AT_name("bool")
.dwattr $C$DW$T$4, DW_AT_byte_size(0x01)
$C$DW$T$5 .dwtag DW_TAG_base_type
.dwattr $C$DW$T$5, DW_AT_encoding(DW_ATE_signed_char)
.dwattr $C$DW$T$5, DW_AT_name("signed char")
.dwattr $C$DW$T$5, DW_AT_byte_size(0x01)
$C$DW$T$6 .dwtag DW_TAG_base_type
.dwattr $C$DW$T$6, DW_AT_encoding(DW_ATE_unsigned_char)
.dwattr $C$DW$T$6, DW_AT_name("unsigned char")
.dwattr $C$DW$T$6, DW_AT_byte_size(0x01)
$C$DW$T$7 .dwtag DW_TAG_base_type
.dwattr $C$DW$T$7, DW_AT_encoding(DW_ATE_signed_char)
.dwattr $C$DW$T$7, DW_AT_name("wchar_t")
.dwattr $C$DW$T$7, DW_AT_byte_size(0x01)
$C$DW$T$8 .dwtag DW_TAG_base_type
.dwattr $C$DW$T$8, DW_AT_encoding(DW_ATE_signed)
.dwattr $C$DW$T$8, DW_AT_name("short")
.dwattr $C$DW$T$8, DW_AT_byte_size(0x01)
$C$DW$T$19 .dwtag DW_TAG_typedef, DW_AT_name("Int16")
.dwattr $C$DW$T$19, DW_AT_type(*$C$DW$T$8)
.dwattr $C$DW$T$19, DW_AT_language(DW_LANG_C)
$C$DW$T$9 .dwtag DW_TAG_base_type
.dwattr $C$DW$T$9, DW_AT_encoding(DW_ATE_unsigned)
.dwattr $C$DW$T$9, DW_AT_name("unsigned short")
.dwattr $C$DW$T$9, DW_AT_byte_size(0x01)
$C$DW$T$23 .dwtag DW_TAG_typedef, DW_AT_name("Uint16")
.dwattr $C$DW$T$23, DW_AT_type(*$C$DW$T$9)
.dwattr $C$DW$T$23, DW_AT_language(DW_LANG_C)
$C$DW$T$24 .dwtag DW_TAG_pointer_type
.dwattr $C$DW$T$24, DW_AT_type(*$C$DW$T$23)
.dwattr $C$DW$T$24, DW_AT_address_class(0x17)
$C$DW$T$28 .dwtag DW_TAG_array_type
.dwattr $C$DW$T$28, DW_AT_type(*$C$DW$T$23)
.dwattr $C$DW$T$28, DW_AT_language(DW_LANG_C)
.dwattr $C$DW$T$28, DW_AT_byte_size(0x100)
$C$DW$42 .dwtag DW_TAG_subrange_type
.dwattr $C$DW$42, DW_AT_upper_bound(0xff)
.dwendtag $C$DW$T$28
$C$DW$T$10 .dwtag DW_TAG_base_type
.dwattr $C$DW$T$10, DW_AT_encoding(DW_ATE_signed)
.dwattr $C$DW$T$10, DW_AT_name("int")
.dwattr $C$DW$T$10, DW_AT_byte_size(0x01)
$C$DW$T$11 .dwtag DW_TAG_base_type
.dwattr $C$DW$T$11, DW_AT_encoding(DW_ATE_unsigned)
.dwattr $C$DW$T$11, DW_AT_name("unsigned int")
.dwattr $C$DW$T$11, DW_AT_byte_size(0x01)
$C$DW$T$12 .dwtag DW_TAG_base_type
.dwattr $C$DW$T$12, DW_AT_encoding(DW_ATE_signed)
.dwattr $C$DW$T$12, DW_AT_name("long")
.dwattr $C$DW$T$12, DW_AT_byte_size(0x02)
$C$DW$T$13 .dwtag DW_TAG_base_type
.dwattr $C$DW$T$13, DW_AT_encoding(DW_ATE_unsigned)
.dwattr $C$DW$T$13, DW_AT_name("unsigned long")
.dwattr $C$DW$T$13, DW_AT_byte_size(0x02)
$C$DW$T$22 .dwtag DW_TAG_typedef, DW_AT_name("Uint32")
.dwattr $C$DW$T$22, DW_AT_type(*$C$DW$T$13)
.dwattr $C$DW$T$22, DW_AT_language(DW_LANG_C)
$C$DW$T$14 .dwtag DW_TAG_base_type
.dwattr $C$DW$T$14, DW_AT_encoding(DW_ATE_signed)
.dwattr $C$DW$T$14, DW_AT_name("long long")
.dwattr $C$DW$T$14, DW_AT_byte_size(0x04)
.dwattr $C$DW$T$14, DW_AT_bit_size(0x28)
.dwattr $C$DW$T$14, DW_AT_bit_offset(0x18)
$C$DW$T$15 .dwtag DW_TAG_base_type
.dwattr $C$DW$T$15, DW_AT_encoding(DW_ATE_unsigned)
.dwattr $C$DW$T$15, DW_AT_name("unsigned long long")
.dwattr $C$DW$T$15, DW_AT_byte_size(0x04)
.dwattr $C$DW$T$15, DW_AT_bit_size(0x28)
.dwattr $C$DW$T$15, DW_AT_bit_offset(0x18)
$C$DW$T$16 .dwtag DW_TAG_base_type
.dwattr $C$DW$T$16, DW_AT_encoding(DW_ATE_float)
.dwattr $C$DW$T$16, DW_AT_name("float")
.dwattr $C$DW$T$16, DW_AT_byte_size(0x02)
$C$DW$T$17 .dwtag DW_TAG_base_type
.dwattr $C$DW$T$17, DW_AT_encoding(DW_ATE_float)
.dwattr $C$DW$T$17, DW_AT_name("double")
.dwattr $C$DW$T$17, DW_AT_byte_size(0x02)
$C$DW$T$18 .dwtag DW_TAG_base_type
.dwattr $C$DW$T$18, DW_AT_encoding(DW_ATE_float)
.dwattr $C$DW$T$18, DW_AT_name("long double")
.dwattr $C$DW$T$18, DW_AT_byte_size(0x02)
$C$DW$T$29 .dwtag DW_TAG_base_type
.dwattr $C$DW$T$29, DW_AT_encoding(DW_ATE_signed_char)
.dwattr $C$DW$T$29, DW_AT_name("signed char")
.dwattr $C$DW$T$29, DW_AT_byte_size(0x01)
$C$DW$43 .dwtag DW_TAG_TI_far_type
.dwattr $C$DW$43, DW_AT_type(*$C$DW$T$29)
$C$DW$T$30 .dwtag DW_TAG_const_type
.dwattr $C$DW$T$30, DW_AT_type(*$C$DW$43)
$C$DW$T$31 .dwtag DW_TAG_pointer_type
.dwattr $C$DW$T$31, DW_AT_type(*$C$DW$T$30)
.dwattr $C$DW$T$31, DW_AT_address_class(0x17)
.dwattr $C$DW$CU, DW_AT_language(DW_LANG_C)
;***************************************************************
;* DWARF CIE ENTRIES *
;***************************************************************
$C$DW$CIE .dwcie 91
.dwcfi cfa_register, 36
.dwcfi cfa_offset, 0
.dwcfi undefined, 0
.dwcfi undefined, 1
.dwcfi undefined, 2
.dwcfi undefined, 3
.dwcfi undefined, 4
.dwcfi undefined, 5
.dwcfi undefined, 6
.dwcfi undefined, 7
.dwcfi undefined, 8
.dwcfi undefined, 9
.dwcfi undefined, 10
.dwcfi undefined, 11
.dwcfi undefined, 12
.dwcfi undefined, 13
.dwcfi same_value, 14
.dwcfi same_value, 15
.dwcfi undefined, 16
.dwcfi undefined, 17
.dwcfi undefined, 18
.dwcfi undefined, 19
.dwcfi undefined, 20
.dwcfi undefined, 21
.dwcfi undefined, 22
.dwcfi undefined, 23
.dwcfi undefined, 24
.dwcfi undefined, 25
.dwcfi same_value, 26
.dwcfi same_value, 27
.dwcfi same_value, 28
.dwcfi same_value, 29
.dwcfi same_value, 30
.dwcfi same_value, 31
.dwcfi undefined, 32
.dwcfi undefined, 33
.dwcfi undefined, 34
.dwcfi undefined, 35
.dwcfi undefined, 36
.dwcfi undefined, 37
.dwcfi undefined, 38
.dwcfi undefined, 39
.dwcfi undefined, 40
.dwcfi undefined, 41
.dwcfi undefined, 42
.dwcfi undefined, 43
.dwcfi undefined, 44
.dwcfi undefined, 45
.dwcfi undefined, 46
.dwcfi undefined, 47
.dwcfi undefined, 48
.dwcfi undefined, 49
.dwcfi undefined, 50
.dwcfi undefined, 51
.dwcfi undefined, 52
.dwcfi undefined, 53
.dwcfi undefined, 54
.dwcfi undefined, 55
.dwcfi undefined, 56
.dwcfi undefined, 57
.dwcfi undefined, 58
.dwcfi undefined, 59
.dwcfi undefined, 60
.dwcfi undefined, 61
.dwcfi undefined, 62
.dwcfi undefined, 63
.dwcfi undefined, 64
.dwcfi undefined, 65
.dwcfi undefined, 66
.dwcfi undefined, 67
.dwcfi undefined, 68
.dwcfi undefined, 69
.dwcfi undefined, 70
.dwcfi undefined, 71
.dwcfi undefined, 72
.dwcfi undefined, 73
.dwcfi undefined, 74
.dwcfi undefined, 75
.dwcfi undefined, 76
.dwcfi undefined, 77
.dwcfi undefined, 78
.dwcfi undefined, 79
.dwcfi undefined, 80
.dwcfi undefined, 81
.dwcfi undefined, 82
.dwcfi undefined, 83
.dwcfi undefined, 84
.dwcfi undefined, 85
.dwcfi undefined, 86
.dwcfi undefined, 87
.dwcfi undefined, 88
.dwcfi undefined, 89
.dwcfi undefined, 90
.dwcfi undefined, 91
.dwendentry
;***************************************************************
;* DWARF REGISTER MAP *
;***************************************************************
$C$DW$44 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AC0")
.dwattr $C$DW$44, DW_AT_location[DW_OP_reg0]
$C$DW$45 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AC0")
.dwattr $C$DW$45, DW_AT_location[DW_OP_reg1]
$C$DW$46 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AC0_G")
.dwattr $C$DW$46, DW_AT_location[DW_OP_reg2]
$C$DW$47 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AC1")
.dwattr $C$DW$47, DW_AT_location[DW_OP_reg3]
$C$DW$48 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AC1")
.dwattr $C$DW$48, DW_AT_location[DW_OP_reg4]
$C$DW$49 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AC1_G")
.dwattr $C$DW$49, DW_AT_location[DW_OP_reg5]
$C$DW$50 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AC2")
.dwattr $C$DW$50, DW_AT_location[DW_OP_reg6]
$C$DW$51 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AC2")
.dwattr $C$DW$51, DW_AT_location[DW_OP_reg7]
$C$DW$52 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AC2_G")
.dwattr $C$DW$52, DW_AT_location[DW_OP_reg8]
$C$DW$53 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AC3")
.dwattr $C$DW$53, DW_AT_location[DW_OP_reg9]
$C$DW$54 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AC3")
.dwattr $C$DW$54, DW_AT_location[DW_OP_reg10]
$C$DW$55 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AC3_G")
.dwattr $C$DW$55, DW_AT_location[DW_OP_reg11]
$C$DW$56 .dwtag DW_TAG_TI_assign_register, DW_AT_name("T0")
.dwattr $C$DW$56, DW_AT_location[DW_OP_reg12]
$C$DW$57 .dwtag DW_TAG_TI_assign_register, DW_AT_name("T1")
.dwattr $C$DW$57, DW_AT_location[DW_OP_reg13]
$C$DW$58 .dwtag DW_TAG_TI_assign_register, DW_AT_name("T2")
.dwattr $C$DW$58, DW_AT_location[DW_OP_reg14]
$C$DW$59 .dwtag DW_TAG_TI_assign_register, DW_AT_name("T3")
.dwattr $C$DW$59, DW_AT_location[DW_OP_reg15]
$C$DW$60 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AR0")
.dwattr $C$DW$60, DW_AT_location[DW_OP_reg16]
$C$DW$61 .dwtag DW_TAG_TI_assign_register, DW_AT_name("XAR0")
.dwattr $C$DW$61, DW_AT_location[DW_OP_reg17]
$C$DW$62 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AR1")
.dwattr $C$DW$62, DW_AT_location[DW_OP_reg18]
$C$DW$63 .dwtag DW_TAG_TI_assign_register, DW_AT_name("XAR1")
.dwattr $C$DW$63, DW_AT_location[DW_OP_reg19]
$C$DW$64 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AR2")
.dwattr $C$DW$64, DW_AT_location[DW_OP_reg20]
$C$DW$65 .dwtag DW_TAG_TI_assign_register, DW_AT_name("XAR2")
.dwattr $C$DW$65, DW_AT_location[DW_OP_reg21]
$C$DW$66 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AR3")
.dwattr $C$DW$66, DW_AT_location[DW_OP_reg22]
$C$DW$67 .dwtag DW_TAG_TI_assign_register, DW_AT_name("XAR3")
.dwattr $C$DW$67, DW_AT_location[DW_OP_reg23]
$C$DW$68 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AR4")
.dwattr $C$DW$68, DW_AT_location[DW_OP_reg24]
$C$DW$69 .dwtag DW_TAG_TI_assign_register, DW_AT_name("XAR4")
.dwattr $C$DW$69, DW_AT_location[DW_OP_reg25]
$C$DW$70 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AR5")
.dwattr $C$DW$70, DW_AT_location[DW_OP_reg26]
$C$DW$71 .dwtag DW_TAG_TI_assign_register, DW_AT_name("XAR5")
.dwattr $C$DW$71, DW_AT_location[DW_OP_reg27]
$C$DW$72 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AR6")
.dwattr $C$DW$72, DW_AT_location[DW_OP_reg28]
$C$DW$73 .dwtag DW_TAG_TI_assign_register, DW_AT_name("XAR6")
.dwattr $C$DW$73, DW_AT_location[DW_OP_reg29]
$C$DW$74 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AR7")
.dwattr $C$DW$74, DW_AT_location[DW_OP_reg30]
$C$DW$75 .dwtag DW_TAG_TI_assign_register, DW_AT_name("XAR7")
.dwattr $C$DW$75, DW_AT_location[DW_OP_reg31]
$C$DW$76 .dwtag DW_TAG_TI_assign_register, DW_AT_name("FP")
.dwattr $C$DW$76, DW_AT_location[DW_OP_regx 0x20]
$C$DW$77 .dwtag DW_TAG_TI_assign_register, DW_AT_name("XFP")
.dwattr $C$DW$77, DW_AT_location[DW_OP_regx 0x21]
$C$DW$78 .dwtag DW_TAG_TI_assign_register, DW_AT_name("PC")
.dwattr $C$DW$78, DW_AT_location[DW_OP_regx 0x22]
$C$DW$79 .dwtag DW_TAG_TI_assign_register, DW_AT_name("SP")
.dwattr $C$DW$79, DW_AT_location[DW_OP_regx 0x23]
$C$DW$80 .dwtag DW_TAG_TI_assign_register, DW_AT_name("XSP")
.dwattr $C$DW$80, DW_AT_location[DW_OP_regx 0x24]
$C$DW$81 .dwtag DW_TAG_TI_assign_register, DW_AT_name("BKC")
.dwattr $C$DW$81, DW_AT_location[DW_OP_regx 0x25]
$C$DW$82 .dwtag DW_TAG_TI_assign_register, DW_AT_name("BK03")
.dwattr $C$DW$82, DW_AT_location[DW_OP_regx 0x26]
$C$DW$83 .dwtag DW_TAG_TI_assign_register, DW_AT_name("BK47")
.dwattr $C$DW$83, DW_AT_location[DW_OP_regx 0x27]
$C$DW$84 .dwtag DW_TAG_TI_assign_register, DW_AT_name("ST0")
.dwattr $C$DW$84, DW_AT_location[DW_OP_regx 0x28]
$C$DW$85 .dwtag DW_TAG_TI_assign_register, DW_AT_name("ST1")
.dwattr $C$DW$85, DW_AT_location[DW_OP_regx 0x29]
$C$DW$86 .dwtag DW_TAG_TI_assign_register, DW_AT_name("ST2")
.dwattr $C$DW$86, DW_AT_location[DW_OP_regx 0x2a]
$C$DW$87 .dwtag DW_TAG_TI_assign_register, DW_AT_name("ST3")
.dwattr $C$DW$87, DW_AT_location[DW_OP_regx 0x2b]
$C$DW$88 .dwtag DW_TAG_TI_assign_register, DW_AT_name("MDP")
.dwattr $C$DW$88, DW_AT_location[DW_OP_regx 0x2c]
$C$DW$89 .dwtag DW_TAG_TI_assign_register, DW_AT_name("MDP05")
.dwattr $C$DW$89, DW_AT_location[DW_OP_regx 0x2d]
$C$DW$90 .dwtag DW_TAG_TI_assign_register, DW_AT_name("MDP67")
.dwattr $C$DW$90, DW_AT_location[DW_OP_regx 0x2e]
$C$DW$91 .dwtag DW_TAG_TI_assign_register, DW_AT_name("BRC0")
.dwattr $C$DW$91, DW_AT_location[DW_OP_regx 0x2f]
$C$DW$92 .dwtag DW_TAG_TI_assign_register, DW_AT_name("RSA0")
.dwattr $C$DW$92, DW_AT_location[DW_OP_regx 0x30]
$C$DW$93 .dwtag DW_TAG_TI_assign_register, DW_AT_name("RSA0_H")
.dwattr $C$DW$93, DW_AT_location[DW_OP_regx 0x31]
$C$DW$94 .dwtag DW_TAG_TI_assign_register, DW_AT_name("REA0")
.dwattr $C$DW$94, DW_AT_location[DW_OP_regx 0x32]
$C$DW$95 .dwtag DW_TAG_TI_assign_register, DW_AT_name("REA0_H")
.dwattr $C$DW$95, DW_AT_location[DW_OP_regx 0x33]
$C$DW$96 .dwtag DW_TAG_TI_assign_register, DW_AT_name("BRS1")
.dwattr $C$DW$96, DW_AT_location[DW_OP_regx 0x34]
$C$DW$97 .dwtag DW_TAG_TI_assign_register, DW_AT_name("BRC1")
.dwattr $C$DW$97, DW_AT_location[DW_OP_regx 0x35]
$C$DW$98 .dwtag DW_TAG_TI_assign_register, DW_AT_name("RSA1")
.dwattr $C$DW$98, DW_AT_location[DW_OP_regx 0x36]
$C$DW$99 .dwtag DW_TAG_TI_assign_register, DW_AT_name("RSA1_H")
.dwattr $C$DW$99, DW_AT_location[DW_OP_regx 0x37]
$C$DW$100 .dwtag DW_TAG_TI_assign_register, DW_AT_name("REA1")
.dwattr $C$DW$100, DW_AT_location[DW_OP_regx 0x38]
$C$DW$101 .dwtag DW_TAG_TI_assign_register, DW_AT_name("REA1_H")
.dwattr $C$DW$101, DW_AT_location[DW_OP_regx 0x39]
$C$DW$102 .dwtag DW_TAG_TI_assign_register, DW_AT_name("CSR")
.dwattr $C$DW$102, DW_AT_location[DW_OP_regx 0x3a]
$C$DW$103 .dwtag DW_TAG_TI_assign_register, DW_AT_name("RPTC")
.dwattr $C$DW$103, DW_AT_location[DW_OP_regx 0x3b]
$C$DW$104 .dwtag DW_TAG_TI_assign_register, DW_AT_name("CDP")
.dwattr $C$DW$104, DW_AT_location[DW_OP_regx 0x3c]
$C$DW$105 .dwtag DW_TAG_TI_assign_register, DW_AT_name("XCDP")
.dwattr $C$DW$105, DW_AT_location[DW_OP_regx 0x3d]
$C$DW$106 .dwtag DW_TAG_TI_assign_register, DW_AT_name("TRN0")
.dwattr $C$DW$106, DW_AT_location[DW_OP_regx 0x3e]
$C$DW$107 .dwtag DW_TAG_TI_assign_register, DW_AT_name("TRN1")
.dwattr $C$DW$107, DW_AT_location[DW_OP_regx 0x3f]
$C$DW$108 .dwtag DW_TAG_TI_assign_register, DW_AT_name("BSA01")
.dwattr $C$DW$108, DW_AT_location[DW_OP_regx 0x40]
$C$DW$109 .dwtag DW_TAG_TI_assign_register, DW_AT_name("BSA23")
.dwattr $C$DW$109, DW_AT_location[DW_OP_regx 0x41]
$C$DW$110 .dwtag DW_TAG_TI_assign_register, DW_AT_name("BSA45")
.dwattr $C$DW$110, DW_AT_location[DW_OP_regx 0x42]
$C$DW$111 .dwtag DW_TAG_TI_assign_register, DW_AT_name("BSA67")
.dwattr $C$DW$111, DW_AT_location[DW_OP_regx 0x43]
$C$DW$112 .dwtag DW_TAG_TI_assign_register, DW_AT_name("BSAC")
.dwattr $C$DW$112, DW_AT_location[DW_OP_regx 0x44]
$C$DW$113 .dwtag DW_TAG_TI_assign_register, DW_AT_name("CARRY")
.dwattr $C$DW$113, DW_AT_location[DW_OP_regx 0x45]
$C$DW$114 .dwtag DW_TAG_TI_assign_register, DW_AT_name("TC1")
.dwattr $C$DW$114, DW_AT_location[DW_OP_regx 0x46]
$C$DW$115 .dwtag DW_TAG_TI_assign_register, DW_AT_name("TC2")
.dwattr $C$DW$115, DW_AT_location[DW_OP_regx 0x47]
$C$DW$116 .dwtag DW_TAG_TI_assign_register, DW_AT_name("M40")
.dwattr $C$DW$116, DW_AT_location[DW_OP_regx 0x48]
$C$DW$117 .dwtag DW_TAG_TI_assign_register, DW_AT_name("SXMD")
.dwattr $C$DW$117, DW_AT_location[DW_OP_regx 0x49]
$C$DW$118 .dwtag DW_TAG_TI_assign_register, DW_AT_name("ARMS")
.dwattr $C$DW$118, DW_AT_location[DW_OP_regx 0x4a]
$C$DW$119 .dwtag DW_TAG_TI_assign_register, DW_AT_name("C54CM")
.dwattr $C$DW$119, DW_AT_location[DW_OP_regx 0x4b]
$C$DW$120 .dwtag DW_TAG_TI_assign_register, DW_AT_name("SATA")
.dwattr $C$DW$120, DW_AT_location[DW_OP_regx 0x4c]
$C$DW$121 .dwtag DW_TAG_TI_assign_register, DW_AT_name("SATD")
.dwattr $C$DW$121, DW_AT_location[DW_OP_regx 0x4d]
$C$DW$122 .dwtag DW_TAG_TI_assign_register, DW_AT_name("RDM")
.dwattr $C$DW$122, DW_AT_location[DW_OP_regx 0x4e]
$C$DW$123 .dwtag DW_TAG_TI_assign_register, DW_AT_name("FRCT")
.dwattr $C$DW$123, DW_AT_location[DW_OP_regx 0x4f]
$C$DW$124 .dwtag DW_TAG_TI_assign_register, DW_AT_name("SMUL")
.dwattr $C$DW$124, DW_AT_location[DW_OP_regx 0x50]
$C$DW$125 .dwtag DW_TAG_TI_assign_register, DW_AT_name("INTM")
.dwattr $C$DW$125, DW_AT_location[DW_OP_regx 0x51]
$C$DW$126 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AR0LC")
.dwattr $C$DW$126, DW_AT_location[DW_OP_regx 0x52]
$C$DW$127 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AR1LC")
.dwattr $C$DW$127, DW_AT_location[DW_OP_regx 0x53]
$C$DW$128 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AR2LC")
.dwattr $C$DW$128, DW_AT_location[DW_OP_regx 0x54]
$C$DW$129 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AR3LC")
.dwattr $C$DW$129, DW_AT_location[DW_OP_regx 0x55]
$C$DW$130 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AR4LC")
.dwattr $C$DW$130, DW_AT_location[DW_OP_regx 0x56]
$C$DW$131 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AR5LC")
.dwattr $C$DW$131, DW_AT_location[DW_OP_regx 0x57]
$C$DW$132 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AR6LC")
.dwattr $C$DW$132, DW_AT_location[DW_OP_regx 0x58]
$C$DW$133 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AR7LC")
.dwattr $C$DW$133, DW_AT_location[DW_OP_regx 0x59]
$C$DW$134 .dwtag DW_TAG_TI_assign_register, DW_AT_name("CDPLC")
.dwattr $C$DW$134, DW_AT_location[DW_OP_regx 0x5a]
$C$DW$135 .dwtag DW_TAG_TI_assign_register, DW_AT_name("CIE_RETA")
.dwattr $C$DW$135, DW_AT_location[DW_OP_regx 0x5b]
.dwendtag $C$DW$CU
| 44.391148 | 134 | 0.645307 |
16c4d2d24372c599ec03cdb4b86346137448ff3b | 3,426 | asm | Assembly | B2G/external/libvpx/vp8/common/arm/neon/shortidct4x4llm_neon.asm | wilebeast/FireFox-OS | 43067f28711d78c429a1d6d58c77130f6899135f | [
"Apache-2.0"
] | 3 | 2015-08-31T15:24:31.000Z | 2020-04-24T20:31:29.000Z | third_party/libvpx/source/libvpx/vp8/common/arm/neon/shortidct4x4llm_neon.asm | roisagiv/webrtc-ios | 953395a7d7a0922c825edb2304d2e458f3392686 | [
"BSD-3-Clause"
] | null | null | null | third_party/libvpx/source/libvpx/vp8/common/arm/neon/shortidct4x4llm_neon.asm | roisagiv/webrtc-ios | 953395a7d7a0922c825edb2304d2e458f3392686 | [
"BSD-3-Clause"
] | 4 | 2015-09-16T11:40:39.000Z | 2019-06-10T01:08:46.000Z | ;
; Copyright (c) 2010 The WebM project authors. All Rights Reserved.
;
; Use of this source code is governed by a BSD-style license
; that can be found in the LICENSE file in the root of the source
; tree. An additional intellectual property rights grant can be found
; in the file PATENTS. All contributing project authors may
; be found in the AUTHORS file in the root of the source tree.
;
EXPORT |vp8_short_idct4x4llm_neon|
ARM
REQUIRE8
PRESERVE8
AREA ||.text||, CODE, READONLY, ALIGN=2
;*************************************************************
;void vp8_short_idct4x4llm_c(short *input, short *output, int pitch)
;r0 short * input
;r1 short * output
;r2 int pitch
;*************************************************************
;static const int cospi8sqrt2minus1=20091;
;static const int sinpi8sqrt2 =35468;
;static const int rounding = 0;
;Optimization note: The resulted data from dequantization are signed 13-bit data that is
;in the range of [-4096, 4095]. This allows to use "vqdmulh"(neon) instruction since
;it won't go out of range (13+16+1=30bits<32bits). This instruction gives the high half
;result of the multiplication that is needed in IDCT.
|vp8_short_idct4x4llm_neon| PROC
ldr r12, _idct_coeff_
vld1.16 {q1, q2}, [r0]
vld1.16 {d0}, [r12]
vswp d3, d4 ;q2(vp[4] vp[12])
vqdmulh.s16 q3, q2, d0[2]
vqdmulh.s16 q4, q2, d0[0]
vqadd.s16 d12, d2, d3 ;a1
vqsub.s16 d13, d2, d3 ;b1
vshr.s16 q3, q3, #1
vshr.s16 q4, q4, #1
vqadd.s16 q3, q3, q2 ;modify since sinpi8sqrt2 > 65536/2 (negtive number)
vqadd.s16 q4, q4, q2
;d6 - c1:temp1
;d7 - d1:temp2
;d8 - d1:temp1
;d9 - c1:temp2
vqsub.s16 d10, d6, d9 ;c1
vqadd.s16 d11, d7, d8 ;d1
vqadd.s16 d2, d12, d11
vqadd.s16 d3, d13, d10
vqsub.s16 d4, d13, d10
vqsub.s16 d5, d12, d11
vtrn.32 d2, d4
vtrn.32 d3, d5
vtrn.16 d2, d3
vtrn.16 d4, d5
vswp d3, d4
vqdmulh.s16 q3, q2, d0[2]
vqdmulh.s16 q4, q2, d0[0]
vqadd.s16 d12, d2, d3 ;a1
vqsub.s16 d13, d2, d3 ;b1
vshr.s16 q3, q3, #1
vshr.s16 q4, q4, #1
vqadd.s16 q3, q3, q2 ;modify since sinpi8sqrt2 > 65536/2 (negtive number)
vqadd.s16 q4, q4, q2
vqsub.s16 d10, d6, d9 ;c1
vqadd.s16 d11, d7, d8 ;d1
vqadd.s16 d2, d12, d11
vqadd.s16 d3, d13, d10
vqsub.s16 d4, d13, d10
vqsub.s16 d5, d12, d11
vrshr.s16 d2, d2, #3
vrshr.s16 d3, d3, #3
vrshr.s16 d4, d4, #3
vrshr.s16 d5, d5, #3
add r3, r1, r2
add r12, r3, r2
add r0, r12, r2
vtrn.32 d2, d4
vtrn.32 d3, d5
vtrn.16 d2, d3
vtrn.16 d4, d5
vst1.16 {d2}, [r1]
vst1.16 {d3}, [r3]
vst1.16 {d4}, [r12]
vst1.16 {d5}, [r0]
bx lr
ENDP
;-----------------
_idct_coeff_
DCD idct_coeff
idct_coeff
DCD 0x4e7b4e7b, 0x8a8c8a8c
;20091, 20091, 35468, 35468
END
| 27.408 | 96 | 0.508173 |
1954c6a27a3d0ecf3cd7b969239d2b674f81a20d | 6,841 | asm | Assembly | Transynther/x86/_processed/NC/_zr_/i9-9900K_12_0xca_notsx.log_21829_801.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NC/_zr_/i9-9900K_12_0xca_notsx.log_21829_801.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NC/_zr_/i9-9900K_12_0xca_notsx.log_21829_801.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r12
push %r14
push %r15
push %rax
push %rbp
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_normal_ht+0x19689, %rbp
nop
nop
nop
add $9520, %rdx
mov (%rbp), %rax
nop
nop
add $29769, %r14
lea addresses_D_ht+0x1e6c1, %rdi
nop
cmp %r15, %r15
mov $0x6162636465666768, %r12
movq %r12, %xmm2
vmovups %ymm2, (%rdi)
nop
nop
xor $53788, %rax
lea addresses_A_ht+0x12b31, %r14
clflush (%r14)
nop
nop
cmp $44480, %rdx
movw $0x6162, (%r14)
nop
nop
dec %rdx
lea addresses_normal_ht+0x13c19, %rsi
lea addresses_normal_ht+0x187b1, %rdi
nop
nop
nop
nop
xor %rdx, %rdx
mov $18, %rcx
rep movsb
nop
nop
nop
nop
nop
sub %rax, %rax
lea addresses_UC_ht+0xf7b1, %rcx
nop
nop
nop
nop
nop
lfence
mov $0x6162636465666768, %rdi
movq %rdi, (%rcx)
nop
nop
nop
nop
nop
and %r15, %r15
lea addresses_WT_ht+0x1a6b1, %rdi
nop
nop
and %rcx, %rcx
mov (%rdi), %ax
nop
nop
sub $10265, %rcx
lea addresses_WT_ht+0xbf77, %rdi
xor %r15, %r15
movl $0x61626364, (%rdi)
nop
dec %rdx
lea addresses_UC_ht+0x4e4f, %rsi
nop
nop
nop
nop
xor $42373, %r14
mov $0x6162636465666768, %rbp
movq %rbp, (%rsi)
nop
nop
nop
nop
nop
inc %rbp
lea addresses_normal_ht+0x10bb1, %rsi
lea addresses_WT_ht+0x10bb1, %rdi
nop
nop
cmp $676, %r12
mov $52, %rcx
rep movsb
nop
nop
nop
nop
nop
and %r14, %r14
lea addresses_WC_ht+0xcbb1, %rsi
lea addresses_normal_ht+0x6bb1, %rdi
clflush (%rdi)
nop
nop
nop
sub %rax, %rax
mov $27, %rcx
rep movsq
sub $30498, %rax
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbp
pop %rax
pop %r15
pop %r14
pop %r12
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r12
push %r13
push %rbp
push %rbx
push %rdi
push %rdx
// Store
lea addresses_WT+0x1a121, %r11
clflush (%r11)
nop
nop
nop
nop
nop
and $46828, %r12
mov $0x5152535455565758, %rbp
movq %rbp, %xmm2
vmovups %ymm2, (%r11)
nop
dec %rdi
// Faulty Load
mov $0x43543b0000000fb1, %r12
nop
nop
nop
nop
and %rbx, %rbx
movb (%r12), %r11b
lea oracles, %r12
and $0xff, %r11
shlq $12, %r11
mov (%r12,%r11,1), %r11
pop %rdx
pop %rdi
pop %rbx
pop %rbp
pop %r13
pop %r12
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_NC', 'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 0}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_WT', 'NT': False, 'AVXalign': False, 'size': 32, 'congruent': 4}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'same': True, 'type': 'addresses_NC', 'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 0}}
<gen_prepare_buffer>
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_normal_ht', 'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 3}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_D_ht', 'NT': False, 'AVXalign': False, 'size': 32, 'congruent': 4}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_A_ht', 'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 4}}
{'OP': 'REPM', 'src': {'same': False, 'congruent': 0, 'type': 'addresses_normal_ht'}, 'dst': {'same': False, 'congruent': 10, 'type': 'addresses_normal_ht'}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_UC_ht', 'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 10}}
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_WT_ht', 'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 8}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_WT_ht', 'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 0}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_UC_ht', 'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 1}}
{'OP': 'REPM', 'src': {'same': False, 'congruent': 10, 'type': 'addresses_normal_ht'}, 'dst': {'same': True, 'congruent': 9, 'type': 'addresses_WT_ht'}}
{'OP': 'REPM', 'src': {'same': False, 'congruent': 9, 'type': 'addresses_WC_ht'}, 'dst': {'same': False, 'congruent': 9, 'type': 'addresses_normal_ht'}}
{'00': 21829}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
| 34.725888 | 2,999 | 0.661599 |
efffd42bbf456a11cacf074d5ddff552bb906dd8 | 493 | asm | Assembly | programs/oeis/327/A327917.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/327/A327917.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/327/A327917.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A327917: Triangle T read by rows: T(k, n) = A(k-n, k) with the array A(k, n) = F(2*k+n) = A000045(2*k+n), for k >= 0 and n >= 0.
; 0,1,1,3,2,1,8,5,3,2,21,13,8,5,3,55,34,21,13,8,5,144,89,55,34,21,13,8,377,233,144,89,55,34,21,13,987,610,377,233,144,89,55,34,21,2584,1597,987,610,377,233,144,89,55,34,6765,4181,2584,1597,987,610,377,233,144,89,55
seq $0,294317 ; Triangle read by rows: T(n, k) = 2*n-k, k <= n.
seq $0,45 ; Fibonacci numbers: F(n) = F(n-1) + F(n-2) with F(0) = 0 and F(1) = 1.
| 82.166667 | 214 | 0.604462 |
14d5e81602902fdf336cb1dfb4ca3aba70626d62 | 11,349 | asm | Assembly | libtool/src/gmp-6.1.2/mpn/ia64/mode1o.asm | kroggen/aergo | 05af317eaa1b62b21dc0144ef74a9e7acb14fb87 | [
"MIT"
] | 1,602 | 2015-01-06T11:26:31.000Z | 2022-03-30T06:17:21.000Z | libtool/src/gmp-6.1.2/mpn/ia64/mode1o.asm | kroggen/aergo | 05af317eaa1b62b21dc0144ef74a9e7acb14fb87 | [
"MIT"
] | 11,789 | 2015-01-05T04:50:15.000Z | 2022-03-31T23:39:19.000Z | libtool/src/gmp-6.1.2/mpn/ia64/mode1o.asm | kroggen/aergo | 05af317eaa1b62b21dc0144ef74a9e7acb14fb87 | [
"MIT"
] | 498 | 2015-01-08T18:58:18.000Z | 2022-03-20T15:37:45.000Z | dnl Itanium-2 mpn_modexact_1c_odd -- mpn by 1 exact remainder.
dnl Contributed to the GNU project by Kevin Ryde.
dnl Copyright 2003-2005 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb
C Itanium: 15
C Itanium 2: 8
dnl Usage: ABI32(`code')
dnl
dnl Emit the given code only under HAVE_ABI_32.
dnl
define(ABI32,
m4_assert_onearg()
`ifdef(`HAVE_ABI_32',`$1')')
C mp_limb_t mpn_modexact_1c_odd (mp_srcptr src, mp_size_t size,
C mp_limb_t divisor, mp_limb_t carry);
C
C The modexact algorithm is usually conceived as a dependent chain
C
C l = src[i] - c
C q = low(l * inverse)
C c = high(q*divisor) + (src[i]<c)
C
C but we can work the src[i]-c into an xma by calculating si=src[i]*inverse
C separately (off the dependent chain) and using
C
C q = low(c * inverse + si)
C c = high(q*divisor + c)
C
C This means the dependent chain is simply xma.l followed by xma.hu, for a
C total 8 cycles/limb on itanium-2.
C
C The reason xma.hu works for the new c is that the low of q*divisor is
C src[i]-c (being the whole purpose of the q generated, and it can be
C verified algebraically). If there was an underflow from src[i]-c, then
C there will be an overflow from (src-c)+c, thereby adding 1 to the new c
C the same as the borrow bit (src[i]<c) gives in the first style shown.
C
C Incidentally, fcmp is not an option for treating src[i]-c, since it
C apparently traps to the kernel for unnormalized operands like those used
C and generated by ldf8 and xma. On one GNU/Linux system it took about 1200
C cycles.
C
C
C First Limb:
C
C The first limb uses q = (src[0]-c) * inverse shown in the first style.
C This lets us get the first q as soon as the inverse is ready, without
C going through si=s*inverse. Basically at the start we have c and can use
C it while waiting for the inverse, whereas for the second and subsequent
C limbs it's the other way around, ie. we have the inverse and are waiting
C for c.
C
C At .Lentry the first two instructions in the loop have been done already.
C The load of f11=src[1] at the start (predicated on size>=2), and the
C calculation of q by the initial different scheme.
C
C
C Entry Sequence:
C
C In the entry sequence, the critical path is the calculation of the
C inverse, so this is begun first and optimized. Apart from that, ar.lc is
C established nice and early so the br.cloop's should predict perfectly.
C And the load for the low limbs src[0] and src[1] can be initiated long
C ahead of where they're needed.
C
C
C Inverse Calculation:
C
C The initial 8-bit inverse is calculated using a table lookup. If it hits
C L1 (which is likely if we're called several times) then it should take a
C total 4 cycles, otherwise hopefully L2 for 9 cycles. This is considered
C the best approach, on balance. It could be done bitwise, but that would
C probably be about 14 cycles (2 per bit beyond the first couple). Or it
C could be taken from 4 bits to 8 with xmpy doubling as used beyond 8 bits,
C but that would be about 11 cycles.
C
C The table is not the same as binvert_limb_table, instead it's 256 bytes,
C designed to be indexed by the low byte of the divisor. The divisor is
C always odd, so the relevant data is every second byte in the table. The
C padding lets us use zxt1 instead of extr.u, the latter would cost an extra
C cycle because it must go down I0, and we're using the first I0 slot to get
C ip. The extra 128 bytes of padding should be insignificant compared to
C typical ia64 code bloat.
C
C Having the table in .text allows us to use IP-relative addressing,
C avoiding a fetch from ltoff. .rodata is apparently not suitable for use
C IP-relative, it gets a linker relocation overflow on GNU/Linux.
C
C
C Load Scheduling:
C
C In the main loop, the data loads are scheduled for an L2 hit, which means
C 6 cycles for the data ready to use. In fact we end up 7 cycles ahead. In
C any case that scheduling is achieved simply by doing the load (and xmpy.l
C for "si") in the immediately preceding iteration.
C
C The main loop requires size >= 2, and we handle size==1 by an initial
C br.cloop to enter the loop only if size>1. Since ar.lc is established
C early, this should predict perfectly.
C
C
C Not done:
C
C Consideration was given to using a plain "(src[0]-c) % divisor" for
C size==1, but cycle counting suggests about 50 for the sort of approach
C taken by gcc __umodsi3, versus about 47 for the modexact. (Both assuming
C L1 hits for their respective fetching.)
C
C Consideration was given to a test for high<divisor and replacing the last
C loop iteration with instead c-=src[size-1] followed by c+=d if underflow.
C Branching on high<divisor wouldn't be good since a mispredict would cost
C more than the loop iteration saved, and the condition is of course data
C dependent. So the theory would be to shorten the loop count if
C high<divisor, and predicate extra operations at the end. That would mean
C a gain of 6 when high<divisor, or a cost of 2 if not.
C
C Whether such a tradeoff is a win on average depends on assumptions about
C how many bits in the high and the divisor. If both are uniformly
C distributed then high<divisor about 50% of the time. But smallish
C divisors (less chance of high<divisor) might be more likely from
C applications (mpz_divisible_ui, mpz_gcd_ui, etc). Though biggish divisors
C would be normal internally from say mpn/generic/perfsqr.c. On balance,
C for the moment, it's felt the gain is not really enough to be worth the
C trouble.
C
C
C Enhancement:
C
C Process two source limbs per iteration using a two-limb inverse and a
C sequence like
C
C ql = low (c * il + sil) quotient low limb
C qlc = high(c * il + sil)
C qh1 = low (c * ih + sih) quotient high, partial
C
C cl = high (ql * d + c) carry out of low
C qh = low (qlc * 1 + qh1) quotient high limb
C
C new c = high (qh * d + cl) carry out of high
C
C This would be 13 cycles/iteration, giving 6.5 cycles/limb. The two limb
C s*inverse as sih:sil = sh:sl * ih:il would be calculated off the dependent
C chain with 4 multiplies. The bigger inverse would take extra time to
C calculate, but a one limb iteration to handle an odd size could be done as
C soon as 64-bits of inverse were ready.
C
C Perhaps this could even extend to a 3 limb inverse, which might promise 17
C or 18 cycles for 3 limbs, giving 5.66 or 6.0 cycles/limb.
C
ASM_START()
.explicit
.text
.align 32
.Ltable:
data1 0,0x01, 0,0xAB, 0,0xCD, 0,0xB7, 0,0x39, 0,0xA3, 0,0xC5, 0,0xEF
data1 0,0xF1, 0,0x1B, 0,0x3D, 0,0xA7, 0,0x29, 0,0x13, 0,0x35, 0,0xDF
data1 0,0xE1, 0,0x8B, 0,0xAD, 0,0x97, 0,0x19, 0,0x83, 0,0xA5, 0,0xCF
data1 0,0xD1, 0,0xFB, 0,0x1D, 0,0x87, 0,0x09, 0,0xF3, 0,0x15, 0,0xBF
data1 0,0xC1, 0,0x6B, 0,0x8D, 0,0x77, 0,0xF9, 0,0x63, 0,0x85, 0,0xAF
data1 0,0xB1, 0,0xDB, 0,0xFD, 0,0x67, 0,0xE9, 0,0xD3, 0,0xF5, 0,0x9F
data1 0,0xA1, 0,0x4B, 0,0x6D, 0,0x57, 0,0xD9, 0,0x43, 0,0x65, 0,0x8F
data1 0,0x91, 0,0xBB, 0,0xDD, 0,0x47, 0,0xC9, 0,0xB3, 0,0xD5, 0,0x7F
data1 0,0x81, 0,0x2B, 0,0x4D, 0,0x37, 0,0xB9, 0,0x23, 0,0x45, 0,0x6F
data1 0,0x71, 0,0x9B, 0,0xBD, 0,0x27, 0,0xA9, 0,0x93, 0,0xB5, 0,0x5F
data1 0,0x61, 0,0x0B, 0,0x2D, 0,0x17, 0,0x99, 0,0x03, 0,0x25, 0,0x4F
data1 0,0x51, 0,0x7B, 0,0x9D, 0,0x07, 0,0x89, 0,0x73, 0,0x95, 0,0x3F
data1 0,0x41, 0,0xEB, 0,0x0D, 0,0xF7, 0,0x79, 0,0xE3, 0,0x05, 0,0x2F
data1 0,0x31, 0,0x5B, 0,0x7D, 0,0xE7, 0,0x69, 0,0x53, 0,0x75, 0,0x1F
data1 0,0x21, 0,0xCB, 0,0xED, 0,0xD7, 0,0x59, 0,0xC3, 0,0xE5, 0,0x0F
data1 0,0x11, 0,0x3B, 0,0x5D, 0,0xC7, 0,0x49, 0,0x33, 0,0x55, 0,0xFF
PROLOGUE(mpn_modexact_1c_odd)
C r32 src
C r33 size
C r34 divisor
C r35 carry
.prologue
.Lhere:
{ .mmi; add r33 = -1, r33 C M0 size-1
mov r14 = 2 C M1 2
mov r15 = ip C I0 .Lhere
}{.mmi; setf.sig f6 = r34 C M2 divisor
setf.sig f9 = r35 C M3 carry
zxt1 r3 = r34 C I1 divisor low byte
} ;;
{ .mmi; add r3 = .Ltable-.Lhere, r3 C M0 table offset ip and index
sub r16 = 0, r34 C M1 -divisor
.save ar.lc, r2
mov r2 = ar.lc C I0
}{.mmi; .body
setf.sig f13 = r14 C M2 2 in significand
mov r17 = -1 C M3 -1
ABI32(` zxt4 r33 = r33') C I1 size extend
} ;;
{ .mmi; add r3 = r3, r15 C M0 table entry address
ABI32(` addp4 r32 = 0, r32') C M1 src extend
mov ar.lc = r33 C I0 size-1 loop count
}{.mmi; setf.sig f12 = r16 C M2 -divisor
setf.sig f8 = r17 C M3 -1
} ;;
{ .mmi; ld1 r3 = [r3] C M0 inverse, 8 bits
ldf8 f10 = [r32], 8 C M1 src[0]
cmp.ne p6,p0 = 0, r33 C I0 test size!=1
} ;;
C Wait for table load.
C Hope for an L1 hit of 1 cycles to ALU, but could be more.
setf.sig f7 = r3 C M2 inverse, 8 bits
(p6) ldf8 f11 = [r32], 8 C M1 src[1], if size!=1
;;
C 5 cycles
C f6 divisor
C f7 inverse, being calculated
C f8 -1, will be -inverse
C f9 carry
C f10 src[0]
C f11 src[1]
C f12 -divisor
C f13 2
C f14 scratch
xmpy.l f14 = f13, f7 C 2*i
xmpy.l f7 = f7, f7 C i*i
;;
xma.l f7 = f7, f12, f14 C i*i*-d + 2*i, inverse 16 bits
;;
xmpy.l f14 = f13, f7 C 2*i
xmpy.l f7 = f7, f7 C i*i
;;
xma.l f7 = f7, f12, f14 C i*i*-d + 2*i, inverse 32 bits
;;
xmpy.l f14 = f13, f7 C 2*i
xmpy.l f7 = f7, f7 C i*i
;;
xma.l f7 = f7, f12, f14 C i*i*-d + 2*i, inverse 64 bits
xma.l f10 = f9, f8, f10 C sc = c * -1 + src[0]
;;
ASSERT(p6, `
xmpy.l f15 = f6, f7 ;; C divisor*inverse
getf.sig r31 = f15 ;;
cmp.eq p6,p0 = 1, r31 C should == 1
')
xmpy.l f10 = f10, f7 C q = sc * inverse
xmpy.l f8 = f7, f8 C -inverse = inverse * -1
br.cloop.sptk.few.clr .Lentry C main loop, if size > 1
;;
C size==1, finish up now
xma.hu f9 = f10, f6, f9 C c = high(q * divisor + c)
mov ar.lc = r2 C I0
;;
getf.sig r8 = f9 C M2 return c
br.ret.sptk.many b0
.Ltop:
C r2 saved ar.lc
C f6 divisor
C f7 inverse
C f8 -inverse
C f9 carry
C f10 src[i] * inverse
C f11 scratch src[i+1]
add r16 = 160, r32
ldf8 f11 = [r32], 8 C src[i+1]
;;
C 2 cycles
lfetch [r16]
xma.l f10 = f9, f8, f10 C q = c * -inverse + si
;;
C 3 cycles
.Lentry:
xma.hu f9 = f10, f6, f9 C c = high(q * divisor + c)
xmpy.l f10 = f11, f7 C si = src[i] * inverse
br.cloop.sptk.few.clr .Ltop
;;
xma.l f10 = f9, f8, f10 C q = c * -inverse + si
mov ar.lc = r2 C I0
;;
xma.hu f9 = f10, f6, f9 C c = high(q * divisor + c)
;;
getf.sig r8 = f9 C M2 return c
br.ret.sptk.many b0
EPILOGUE()
| 33.087464 | 79 | 0.698388 |
cf9725c7dea010c794abb3cf36303f7b419e3757 | 871 | asm | Assembly | oeis/027/A027976.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/027/A027976.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/027/A027976.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A027976: n-th diagonal sum of right justified array T given by A027960.
; 1,1,4,6,10,18,29,47,78,126,204,332,537,869,1408,2278,3686,5966,9653,15619,25274,40894,66168,107064,173233,280297,453532,733830,1187362,1921194,3108557,5029751,8138310,13168062,21306372,34474436,55780809,90255245,146036056,236291302,382327358,618618662,1000946021,1619564683,2620510706,4240075390,6860586096,11100661488,17961247585,29061909073,47023156660,76085065734,123108222394,199193288130,322301510525,521494798655,843796309182,1365291107838,2209087417020,3574378524860,5783465941881
mov $3,2
mov $5,$0
lpb $3
mov $0,$5
sub $3,1
add $0,$3
add $0,1
seq $0,192981 ; Constant term of the reduction by x^2 -> x+1 of the polynomial p(n,x) defined at Comments.
div $0,2
mov $2,$3
mov $4,$0
lpb $2
mov $1,$4
sub $2,1
lpe
lpe
lpb $5
sub $1,$4
mov $5,0
lpe
mov $0,$1
| 34.84 | 489 | 0.748565 |
bff2ea677a3ae532183518aa0017c482ad06b9be | 981 | asm | Assembly | programs/oeis/083/A083254.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/083/A083254.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | programs/oeis/083/A083254.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | ; A083254: a(n) = 2*phi(n) - n.
; 1,0,1,0,3,-2,5,0,3,-2,9,-4,11,-2,1,0,15,-6,17,-4,3,-2,21,-8,15,-2,9,-4,27,-14,29,0,7,-2,13,-12,35,-2,9,-8,39,-18,41,-4,3,-2,45,-16,35,-10,13,-4,51,-18,25,-8,15,-2,57,-28,59,-2,9,0,31,-26,65,-4,19,-22,69,-24,71,-2,5,-4,43,-30,77,-16,27,-2,81,-36,43,-2,25,-8,87,-42,53,-4,27,-2,49,-32,95,-14,21,-20,99,-38,101,-8,-9,-2,105,-36,107,-30,33,-16,111,-42,61,-4,27,-2,73,-56,99,-2,37,-4,75,-54,125,0,39,-34,129,-52,83,-2,9,-8,135,-50,137,-44,43,-2,97,-48,79,-2,21,-4,147,-70,149,-8,39,-34,85,-60,155,-2,49,-32,103,-54,161,-4,-5,-2,165,-72,143,-42,45,-4,171,-62,65,-16,55,-2,177,-84,179,-38,57,-8,103,-66,133,-4,27,-46,189,-64,191,-2,-3,-28,195,-78,197,-40,63,-2,133,-76,115,-2,57,-16,151,-114,209,-4,67,-2,121,-72,143,-2,69,-60,163,-78,221,-32,15,-2,225,-84,227,-54,9,-8,231,-90,133,-4,75,-46,237,-112,239,-22,81,-4,91,-86,185,-8,79,-50
mov $1,$0
cal $1,10 ; Euler totient function phi(n): count numbers <= n and prime to n.
sub $0,$1
sub $1,$0
sub $1,1
| 109 | 830 | 0.557594 |
ec978320b4e4e743526f7a428b830eb43c1267a5 | 3,626 | asm | Assembly | chapter7/Project6.asm | pcooksey/Assembly-x86-64 | 4abe63454787eaea78e10de545bb61b047f702c1 | [
"MIT"
] | null | null | null | chapter7/Project6.asm | pcooksey/Assembly-x86-64 | 4abe63454787eaea78e10de545bb61b047f702c1 | [
"MIT"
] | null | null | null | chapter7/Project6.asm | pcooksey/Assembly-x86-64 | 4abe63454787eaea78e10de545bb61b047f702c1 | [
"MIT"
] | null | null | null | ;;;
;;; This is Suggested Project 7.9.2.6
;;; Basically do simple signed addition, subtraction, multiplication, modulo
;;; With signed double-word and quad-word sizes
;;; Pg. 137 for the problem
;;; Pg. 24 for Registers
;;; Pg. 48 for Data Types
SECTION .data
SUCCESS: equ 0 ; Default success value
SYS_EXIT: equ 60 ; Default system exit value
;; Variables used by the project
dNum1: dd -900000
dNum2: dd -350000
dNum3: dd -450000
dNum4: dd -750000
qNum1: dq -700000000000000
;; Answers
dAns1: dd 0 ; dAns1 = dNum1 + dNum2 -1250000
dAns2: dd 0 ; dAns2 = dNum1 + dNum3 -1350000
dAns3: dd 0 ; dAns3 = dNum3 + dNum4 -1200000
dAns6: dd 0 ; dAns6 = dNum1 - dNum2 -550000
dAns7: dd 0 ; dAns7 = dNum1 - dNum3 -450000
dAns8: dd 0 ; dAns8 = dNum2 - dNum4 400000
qAns11: dq 0 ; qAns11 = dNum1 * dNum3 405000000000
qAns12: dq 0 ; qAns12 = dNum2 * dNum2 122500000000
qAns13: dq 0 ; qAns13 = dNum2 * dNum4 262500000000
dAns16: dd 0 ; dAns16 = dNum1 / dNum2 2
dAns17: dd 0 ; dAns17 = dNum3 / dNum4 0
dAns18: dd 0 ; dAns18 = qNum1 / dNum4 933333333
dRem18: dd 0 ; dRem18 = qNum1 % dNum4 -250000
SECTION .text ; Code Section
global _start ; Standard start
_start:
;; dAns1 = dNum1 + dNum2
mov eax, dword [dNum1]
add eax, dword [dNum2]
mov dword [dAns1], eax
;; dAns2 = dNum1 + dNum3
mov eax, dword [dNum1]
add eax, dword [dNum3]
mov dword [dAns2], eax
;; dAns3 = dNum3 + dNum4
mov eax, dword [dNum3]
add eax, dword [dNum4]
mov dword [dAns3], eax
;; dAns6 = dNum1 - dNum2
mov eax, dword [dNum1]
sub eax, dword [dNum2]
mov dword [dAns6], eax
;; dAns7 = dNum1 - dNum3
mov eax, dword [dNum1]
sub eax, dword [dNum3]
mov dword [dAns7], eax
;; dAns8 = dNum2 - dNum4
mov eax, dword [dNum2]
sub eax, dword [dNum4]
mov dword [dAns8], eax
;; dAns11 = dNum1 * dNum3
mov eax, dword [dNum1]
imul dword [dNum3] ; Pg. 102 multi tables
mov dword [qAns11], eax
mov dword [qAns11+4], edx
;; dAns12 = dNum2 * dNum2
mov eax, dword [dNum2]
imul eax
mov dword [qAns12], eax
mov dword [qAns12+4], edx
;; dAns13 = dNum2 * dNum4
mov eax, dword [dNum2]
imul dword [dNum4]
mov dword [qAns13], eax
mov dword [qAns13+4], edx
;; dAns16 = dNum1 / dNum2
mov eax, dword [dNum1]
cdq
idiv dword [dNum2] ; Pg. 110 Divide tables
mov dword [dAns16], eax
;; dAns17 = dNum3 / dNum4
mov eax, dword [dNum3]
cdq
idiv dword [dNum4]
mov dword [dAns17], eax
;; dAns18 = qNum1 / dNum4
mov rax, qword [qNum1]
cqo ; Pg. 91 Convert qword to qword rdx:rax
movsxd rcx, dword [dNum4] ; Specific command for signed dword to qword
idiv rcx
mov dword [dAns18], eax
mov dword [dRem18], edx ; Remember the remainder is stored in dx
; Done, terminate program
last:
mov rax, SYS_EXIT ; Call code for exit
mov rdi, SUCCESS ; Exit with success
syscall
| 36.626263 | 84 | 0.516547 |
224713139c2ce6a925e8ba3c7db54a2f3e6d2844 | 4,397 | asm | Assembly | MIPS Runner/MIPS Runner/Long.asm | VuHuy-cse-9/MIPS-Runner | aea3adaa68fdce18e73ae4452977cf33e423ce98 | [
"MIT"
] | null | null | null | MIPS Runner/MIPS Runner/Long.asm | VuHuy-cse-9/MIPS-Runner | aea3adaa68fdce18e73ae4452977cf33e423ce98 | [
"MIT"
] | null | null | null | MIPS Runner/MIPS Runner/Long.asm | VuHuy-cse-9/MIPS-Runner | aea3adaa68fdce18e73ae4452977cf33e423ce98 | [
"MIT"
] | 1 | 2020-11-26T17:28:30.000Z | 2020-11-26T17:28:30.000Z | .data
array: .word 5, 1, 50, 26, 17, 20, 9, 12, 42, 85, 99, 33, 46, 75, 80, 19, 55, 56, 57, 60, 42, 53, 44, 11, 98, 97, 69, 96, 2, 77, 66, 32, 13, 91, 89, 30, 50, 51, 76, 40, 3, 4, 6, 7, 8, 9, 10, 82, 81, 71
size: .word 50
spaceSymb: .asciiz " "
.text
.globl _main
_main:
la $a0, array
add $a1, $0, $0
lw $a2, size
subi $a2, $a2, 1
jal _quicksort
li $v0, 10
syscall
# func swap(x: int*, y: int*) {
# (*x, *y) = (*y, *x)
# }
_swap:
lw $t0, 0($a0)
lw $t1, 0($a1)
sw $t0, 0($a1)
sw $t1, 0($a0)
jr $ra
# func quicksort(array: int*, start: int, end: int) {
# guard start < end
# let position = partition(array, start, end)
# quicksort(array, start, position - 1)
# quicksort(array, position + 1, end)
# }
_quicksort: # array, start, end = a0, a1, a2, resp.
bge $a1, $a2, quicksort_returning # guard a1 < a2
subi $sp, $sp, 20 # we need to save ra, array, start, end, position
sw $ra, 0($sp) # push ra
sw $a0, 4($sp) # push array
sw $a1, 8($sp) # push start
sw $a2, 12($sp) # push end
jal print
jal _partition # call partition, return to v0
sw $v0, 16($sp) # push position
lw $a1, 8($sp) # a1 = start
lw $a2, 16($sp) # a2 = position
subi $a2, $a2, 1 # a2 = position - 1
jal _quicksort # call quicksort
lw $a1, 16($sp) # a1 = position
addi $a1, $a1, 1 # a1 = position + 1
lw $a2, 12($sp) # a2 = end
jal _quicksort # call quicksort
lw $a2, 12($sp) # pop end
lw $a1, 8($sp) # pop start
lw $a0, 4($sp) # pop array
lw $ra, 0($sp) # pop ra
addi $sp, $sp, 20 # re-align the stack
quicksort_returning:
jr $ra
# func partition(array: int*, start: int, end: int) -> int {
# let pivot = array[end]
# var left = start
# var right = end - 1
# while true {
# while left <= right and array[left] <= pivot { left += 1 }
# while left <= right and array[right] > pivot { right -= 1 }
# if left >= right { break }
# swap(array + left, array + right)
# left += 1
# right -= 1
# }
# swap(array + left, array + end)
# return left
# }
_partition: # array, start, end = a0, a1, a2, resp.
subi $sp, $sp, 16 # we need to save ra, array, start, end
sw $ra, 0($sp) # push ra
sw $a0, 4($sp) # push rray
sw $a1, 8($sp) # push start
sw $a2, 12($sp) # push end
# pivot, left, right = s0, s1, s2, resp.
lw $s0, 12($sp) # s0 = end
sll $s0, $s0, 2 # s0 = 4.end
lw $t0, 4($sp) # t0 = array
add $s0, $s0, $t0 # s0 = array + 4.end
lw $s0, 0($s0) # pivot = s0 = array[end]
lw $s1, 8($sp) # left = s1 = start
lw $s2, 12($sp) # right = s2 = end
subi $s2, $s2, 1 # right = end - 1
loop1:
lw $a0, 4($sp) # load array from stack
loop2:
bgt $s1, $s2, end_loop2 # if left > right then break
sll $t0, $s1, 2 # t0 = 4.left
add $t0, $t0, $a0 # t0 = array + 4.left
lw $t0, 0($t0) # t0 = array[left]
bgt $t0, $s0, end_loop2 # if array[left] > pivot then break
addi $s1, $s1, 1 # left += 1
j loop2
end_loop2:
loop3:
bgt $s1, $s2, end_loop3 # if left > right then break
sll $t0, $s2, 2 # t0 = 4.right
add $t0, $t0, $a0 # t0 = array + 4.right
lw $t0, 0($t0) # t0 = array[right]
ble $t0, $s0, end_loop3 # if array[right] <= pivot then break
subi $s2, $s2, 1 # right -= 1
j loop3
end_loop3:
bge $s1, $s2, end_loop1 # if left >= right then break
sll $t0, $s1, 2 # t0 = 4.left
add $a0, $a0, $t0 # a0 = array + 4.left
lw $a1, 4($sp) # a1 = array
sll $t0, $s2, 2 # t0 = 4.right
add $a1, $a1, $t0 # a1 = array + 4.right
jal _swap # call swap
addi $s1, $s1, 1 # left += 1
subi $s2, $s2, 1 # right -= 1
j loop1
end_loop1:
lw $a0, 4($sp) # a0 = array
sll $t0, $s1, 2 # t0 = 4.left
add $a0, $a0, $t0 # a0 = array + 4.left
lw $a1, 4($sp) # a1 = array
lw $t0, 12($sp) # t0 = end
sll $t0, $t0, 2 # t0 = 4.end
add $a1, $a1, $t0 # a1 = array = 4.end
jal _swap # call swap
add $v0, $s1, $0 # return left
lw $a2, 12($sp) # pop end
lw $a1, 8($sp) # pop start
lw $a0, 4($sp) # pop array
lw $ra, 0($sp) # pop ra
addi $sp, $sp, 16 # re-align the stack
partition_returning:
jr $ra
print:
subi $sp, $sp, 4
sw $a0, 0($sp)
la $t0, array
add $t1, $0, $0
for:
bge $t1, 50, end_for
li $v0, 1
lw $a0, 0($t0)
syscall
la $a0, spaceSymb
li $v0, 4
syscall
addi $t0, $t0, 4
addi $t1, $t1, 1
j for
end_for:
addi $a0, $0, 10
li $v0, 11
syscall
lw $a0, 0($sp)
addi $sp, $sp, 4
jr $ra | 21.767327 | 202 | 0.544235 |
8a2201d7b0cab979cbaaedf3c7bf23f97e560234 | 359 | asm | Assembly | programs/oeis/083/A083088.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/083/A083088.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/083/A083088.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A083088: First column of table A083087.
; 1,2,4,6,7,9,11,12,14,16,18,19,21,23,24,26,28,30,31,33,35,36,38,40,41,43,45,47,48,50,52,53,55,57,59,60,62,64,65,67,69,70,72,74,76,77,79,81,82,84,86,88,89,91,93,94,96,98,100,101,103,105,106,108,110,111,113,115
mov $2,$0
pow $0,2
div $0,2
lpb $0,1
add $1,1
sub $0,$1
sub $0,$1
trn $0,1
lpe
add $1,1
add $1,$2
| 23.933333 | 209 | 0.626741 |
5e90933978f22320091a30e2c99e8baa38670918 | 2,655 | asm | Assembly | cpm/ndos/necho.asm | erikp9000/cpm-ndos | d2e17f3aa11e22d30510278e78814151934355d2 | [
"MIT"
] | null | null | null | cpm/ndos/necho.asm | erikp9000/cpm-ndos | d2e17f3aa11e22d30510278e78814151934355d2 | [
"MIT"
] | 7 | 2020-06-03T01:12:06.000Z | 2020-06-12T19:11:33.000Z | cpm/ndos/necho.asm | erikp9000/cpm-ndos | d2e17f3aa11e22d30510278e78814151934355d2 | [
"MIT"
] | null | null | null | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;
;; NECHO.ASM
;;
;; NDOS Message echo
;;
;; On start, dma contains command line argument length byte
;; and command line.
;; Stack pointer should be within CCP.
;; Check for NDOS; display error if not running.
;; Copy command line arguments to buf and call NDOS to send it.
;; Call NDOS to receive response.
;; On a=0(success), print response.
;; On a=0FFh(failure), print error.
;;
maclib ndos
org tpa
start: lxi h,0
dad sp ; hl = sp
shld savestack ; save original stack pointer
lxi sp,stack
mvi c,n?ver
call bdosv
cpi 10h
jc nondos
; NDOS is present
; copy command line args from dmabuf
lxi d,msgbuf+2 ; point to start of data
lxi h,defdma ; command-line
mov a,m ; command-line length
ora a
jz dousage
mov c,a
loop: inx h
mov a,m
stax d
inx d
dcr c
jnz loop
lda defdma
adi 3 ; include LEN, CMD, and CHK bytes
sta msgbuf
loop1:
mvi c,n?smsg
lxi d,msgbuf
call bdosv ; send message to server
mvi c,n?rmsg
lxi d,buffer
call bdosv ; get response
ora a
jnz timeout
; print response from server
lda buffer ; get LEN byte
dcr a ; subtract 1
mov e,a
mvi d,0
lxi h,buffer
dad d ; de is pointing to CHK byte
mvi m,'$' ; terminate the string
lxi d,buffer+2 ; point to first byte of response (ECHO doesn't have a Status byte)
mvi c,prnstr
call bdosv ; print the response
lxi d,crlf
mvi c,prnstr
call bdosv ; print CR, LF
; loop if there's no keypress from the console
mvi c,constat
call bdosv
ora a
jz loop1
mvi c,conin
call bdosv ; remove the keypress so it's not waiting for the CCP
jmp quit
; NDOS not found
nondos: mvi c,prnstr
lxi d,nondoserr
call bdosv
jmp quit
; Timeout contacting server
timeout:mvi c,prnstr
lxi d,toerr
call bdosv
jmp quit
; Error status from server
serverr:mvi c,prnstr
lxi d,serr
call bdosv
jmp quit
; Print usage
dousage: mvi c, prnstr
lxi d,usage
call bdosv
quit: lhld savestack
sphl ; sp = hl
ret ; quit
nondoserr:
db 'NDOS not loaded',cr,lf,'$'
toerr: db 'Timeout',cr,lf,'$'
serr: db 'Directory not found',cr,lf,'$'
usage: db 'necho <text to send to server>'
crlf: db cr,lf,'$'
;; NDOS request message
msgbuf: db 0 ; LEN
db NECHO ; CMD
ds 148 ; DATA and CHK
;; NDOS response buffer
buffer: ds 150
savestack:
dw 0
ds 16
stack:
end start
| 18.964286 | 84 | 0.592844 |
b010284a56bd330e7d03d724cd91a39bfc827e4c | 374 | asm | Assembly | pd-x16-build.asm | lvcabral/x16-petdraw | ebe580db6e4a368055cef366003482bee44a3f35 | [
"MIT"
] | null | null | null | pd-x16-build.asm | lvcabral/x16-petdraw | ebe580db6e4a368055cef366003482bee44a3f35 | [
"MIT"
] | null | null | null | pd-x16-build.asm | lvcabral/x16-petdraw | ebe580db6e4a368055cef366003482bee44a3f35 | [
"MIT"
] | null | null | null | //Petdraw (Commander X16 version)
//by David Murray 2019
//dfwgreencars@gmail.com
//
//Converted to KickAssembler
//by Marcelo Lv Cabral 2020
//https://github.com/lvcabral
.cpu _65c02
#import "pd-x16-main.asm"
#import "pd-x16-editor.asm"
#import "pd-x16-pixel.asm"
#import "pd-x16-screen.asm"
#import "pd-x16-disk.asm"
#import "pd-x16-setup.asm"
#import "pd-x16-data.asm"
| 20.777778 | 33 | 0.724599 |
427ca624ff1177d0526e32c79a2dd113db63dbec | 436 | asm | Assembly | oeis/333/A333695.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/333/A333695.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/333/A333695.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A333695: Numerators of coefficients in expansion of Sum_{k>=1} phi(k) * log(1/(1 - x^k)).
; Submitted by Christian Krause
; 1,3,7,11,21,7,43,43,61,63,111,77,157,129,49,171,273,61,343,231,43,333,507,301,521,471,547,473,813,147,931,683,259,819,129,671,1333,1029,1099,903,1641,43,1807,111,427,1521,2163,399,2101,1563,637,1727,2757,547,2331
mov $2,$0
seq $0,57660 ; a(n) = Sum_{k=1..n} n/gcd(n,k).
mov $1,$0
add $2,1
gcd $1,$2
div $0,$1
| 39.636364 | 214 | 0.674312 |
8fd8520e386ed305922cc342b2d7586588bb5216 | 698 | asm | Assembly | oeis/020/A020968.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/020/A020968.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/020/A020968.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A020968: Expansion of 1/((1-7*x)*(1-8*x)*(1-11*x)).
; Submitted by Jamie Morken(s2)
; 1,26,455,6700,89661,1130766,13712035,161844800,1874156921,21406992706,242089527615,2717862993300,30349359729781,337562780465846,3743627395703195,41428143398876200,457728746687336241,5051402198472270186,55698140476085454775,613752674475249237500,6759944245400513104301,74429263854651899365726,819284829464189517758355,9016663909357573774141200,99219740866176604712361961,1091709993502508661375352466,12011162067804460999198149935,132141665572426360318013971300,1453709843895844822852789237221
add $0,1
mov $3,1
lpb $0
sub $0,1
add $2,$3
add $1,$2
mul $1,8
mul $2,11
mul $3,7
lpe
mov $0,$1
div $0,8
| 41.058824 | 493 | 0.82235 |
b6d51658f20fcbb5a7f239bd7ad346e5a542c5af | 691 | asm | Assembly | oeis/092/A092985.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/092/A092985.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/092/A092985.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A092985: a(n) is the product of first n terms of an arithmetic progression with the first term 1 and common difference n.
; 1,1,3,28,585,22176,1339975,118514880,14454403425,2326680294400,478015854767451,122087424094272000,37947924636264267625,14105590169042424729600,6178966019176767549393375,3150334059785191453342744576,1849556085478041490537172810625,1238832248972992893599427919872000,938973574652102126542847159376533875,799582278604681926128932125293445120000,760078763365725054762804605784866082489801,801948520882734753652178908837719192371200000,934287835463606348182047460760832346982550984375
mov $2,$0
mov $3,1
mov $4,1
lpb $0
sub $0,1
mul $4,$3
add $3,$2
lpe
mov $0,$4
| 53.153846 | 481 | 0.861071 |
4676b33af2fa2b2b28b16b462983b6fc61d72e82 | 1,268 | asm | Assembly | programs/oeis/024/A024042.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/024/A024042.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/024/A024042.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A024042: a(n) = 4^n - n^6.
; 1,3,-48,-665,-3840,-14601,-42560,-101265,-196608,-269297,48576,2422743,13791232,62282055,260905920,1062351199,4278190080,17155731615,68685464512,274830861063,1099447627776,4397960744983,17592072664512,70368596141775,281474785607680,1125899662701999,4503599318454720,18014398122061495,72057593556037632,288230375556888423,1152921503877846976,4611686017539884223,18446744072635809792,73786976293546738495,295147905177808021440,1180591620715573037799,4722366482867468431360,18889465931476015128375,75557863725911312482752,302231454903653774932783,1208925819614625078706176,4835703278458511948720463,19342813113834061306267072,77371252455336260859832215,309485009821345061468467200,1237940039285380266595358599,4951760157141521090122200000,19807040628566084387606772255,79228162514264337581313359872,316912650057057350360334514143,1267650600228229401481078205376,5070602400912917605969216533703,20282409603651670423927480676352,81129638414606681695766840782935,324518553658426726783131225664960,1298074214633706907132596401664399,5192296858534827628530465488240640,20769187434139310514121951020433135,83076749736557242056487903198828992,332306998946228968225951722889552503
mov $1,4
pow $1,$0
pow $0,6
add $0,1
sub $1,$0
add $1,1
mov $0,$1
| 115.272727 | 1,171 | 0.90694 |
c82cafd0266bf5176bf6a4407d9ed75b934ce49a | 576 | asm | Assembly | data/baseStats/typhlosion.asm | adhi-thirumala/EvoYellow | 6fb1b1d6a1fa84b02e2d982f270887f6c63cdf4c | [
"Unlicense"
] | 16 | 2018-08-28T21:47:01.000Z | 2022-02-20T20:29:59.000Z | data/baseStats/typhlosion.asm | adhi-thirumala/EvoYellow | 6fb1b1d6a1fa84b02e2d982f270887f6c63cdf4c | [
"Unlicense"
] | 5 | 2019-04-03T19:53:11.000Z | 2022-03-11T22:49:34.000Z | data/baseStats/typhlosion.asm | adhi-thirumala/EvoYellow | 6fb1b1d6a1fa84b02e2d982f270887f6c63cdf4c | [
"Unlicense"
] | 2 | 2019-12-09T19:46:02.000Z | 2020-12-05T21:36:30.000Z | db DEX_TYPHLOSION ; pokedex id
db 78 ; base hp
db 84 ; base attack
db 78 ; base defense
db 109 ; base speed
db 92 ; base special
db FIRE ; species type 1
db FIRE ; species type 2
db 31 ; catch rate
db 209 ; base exp yield
INCBIN "pic/ymon/typhlosion.pic",0,1 ; sprite dimensions
dw TyphlosionPicFront
dw TyphlosionPicBack
; attacks known at lvl 0
db TACKLE
db LEER
db SAND_ATTACK
db EMBER
db 3 ; growth rate
; learnset
tmlearn 6,8
tmlearn 10
tmlearn 0
tmlearn 28,31,32
tmlearn 34,38,39
tmlearn 44
tmlearn 50,51
db Bank(TyphlosionPicFront) ; padding
| 19.862069 | 57 | 0.725694 |
fefd9b4e4e4d008c6bc01a12aa793d02d7e74002 | 841 | asm | Assembly | engine/engine/interrupt/declarations/video-standards/pal-60.asm | neomura/atmega328p-cartridge | e7152425e5253cd4e513cad41dc03d306003e91e | [
"MIT"
] | null | null | null | engine/engine/interrupt/declarations/video-standards/pal-60.asm | neomura/atmega328p-cartridge | e7152425e5253cd4e513cad41dc03d306003e91e | [
"MIT"
] | 2 | 2021-04-17T09:31:24.000Z | 2021-04-17T09:31:53.000Z | engine/engine/interrupt/declarations/video-standards/pal-60.asm | neomura/atmega328p-cartridge | e7152425e5253cd4e513cad41dc03d306003e91e | [
"MIT"
] | null | null | null | ; Approximately 63.5usec, the duration of a scanline in CPU cycles, rounded to the nearest multiple of the colorburst frequency.
.equ SCANLINE_CYCLES = 1127
; Approximately 4.7usec, the duration of a HSYNC pulse in CPU cycles.
.equ HSYNC_PULSE_CYCLES = 83
; Approximately 58.8usec, the duration of of a VSYNC pulse in CPU cycles.
.equ VSYNC_PULSE_CYCLES = 1043
; Approximately 5.3usec, the point during a line at which the colorburst starts.
.equ COLORBURST_START_CYCLES = 94
; Approximately 12.15usec, the point during a line at which active video starts, plus a safe area border.
.equ ACTIVE_VIDEO_START_CYCLES = 216
; The point during a line at which the interrupt should fire.
; This figure has been set as high as possible without overwhelming the timing jitter correction through experimentation.
.equ INTERRUPT_START_CYCLES = 58
| 44.263158 | 128 | 0.794293 |
ffbcdd522edce4278b434e2e9b581e36c8db1f6d | 225 | asm | Assembly | data/mapHeaders/OaksLab.asm | AmateurPanda92/pokemon-rby-dx | f7ba1cc50b22d93ed176571e074a52d73360da93 | [
"MIT"
] | 9 | 2020-07-12T19:44:21.000Z | 2022-03-03T23:32:40.000Z | data/mapHeaders/OaksLab.asm | JStar-debug2020/pokemon-rby-dx | c2fdd8145d96683addbd8d9075f946a68d1527a1 | [
"MIT"
] | 7 | 2020-07-16T10:48:52.000Z | 2021-01-28T18:32:02.000Z | data/mapHeaders/OaksLab.asm | JStar-debug2020/pokemon-rby-dx | c2fdd8145d96683addbd8d9075f946a68d1527a1 | [
"MIT"
] | 2 | 2021-03-28T18:33:43.000Z | 2021-05-06T13:12:09.000Z | OaksLab_h:
db DOJO ; tileset
db OAKS_LAB_HEIGHT, OAKS_LAB_WIDTH ; dimensions (y, x)
dw OaksLab_Blocks ; blocks
dw OaksLab_TextPointers ; texts
dw OaksLab_Script ; scripts
db 0 ; connections
dw OaksLab_Object ; objects
| 25 | 55 | 0.773333 |
d1d83b03bbe598e44289a1eab49cb17a85015b23 | 371 | asm | Assembly | oeis/180/A180435.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/180/A180435.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/180/A180435.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A180435: a(n) = a(n-1)*2^n+n, a(0)=1.
; Submitted by Jon Maiga
; 1,3,14,115,1844,59013,3776838,483435271,123759429384,63364827844617,64885583712887818,132885675443994251275,544299726618600453222412,4458903360459574912797999117,73054672657769675371282417532942
mov $2,1
lpb $0
sub $0,1
add $1,$2
add $1,1
mul $2,2
mul $3,$2
add $3,$1
lpe
mov $0,$3
add $0,1
| 23.1875 | 196 | 0.725067 |
02d9a67cba9617640db7e827a61dcd9c35a981e1 | 698 | asm | Assembly | src/call_on_stack-msvc-win32.asm | qgymib/call_on_stack | 33243364ee08c9916b610436c3cc811941201c39 | [
"MIT"
] | null | null | null | src/call_on_stack-msvc-win32.asm | qgymib/call_on_stack | 33243364ee08c9916b610436c3cc811941201c39 | [
"MIT"
] | null | null | null | src/call_on_stack-msvc-win32.asm | qgymib/call_on_stack | 33243364ee08c9916b610436c3cc811941201c39 | [
"MIT"
] | null | null | null | .model flat
.code
_call_on_stack__asm PROC
push ebp
mov ebp, esp
sub esp, 8h
; backup callee saved registers
push esi
push edi
; backup stack
mov esi, esp
mov edi, ebp
; get func and arg
mov eax, DWORD PTR 12[ebp]
mov ecx, DWORD PTR 16[ebp]
; switch stack
mov esp, DWORD PTR 8[ebp]
mov ebp, esp
; func(arg)
push ecx
call eax
; restore stack
mov esp, esi
mov ebp, edi
; restore callee saved registers
pop edi
pop esi
; leave
add esp, 8h
pop ebp
ret
_call_on_stack__asm ENDP
END
| 19.942857 | 37 | 0.510029 |
6ae2b4e8ac6b122a25573c9ec6abd9f07fef59af | 9,031 | asm | Assembly | blocks.asm | acmahaja/BLOCKS_Project | c24b17b63931352d6e5f85efe99d0644498f7269 | [
"Apache-2.0"
] | null | null | null | blocks.asm | acmahaja/BLOCKS_Project | c24b17b63931352d6e5f85efe99d0644498f7269 | [
"Apache-2.0"
] | null | null | null | blocks.asm | acmahaja/BLOCKS_Project | c24b17b63931352d6e5f85efe99d0644498f7269 | [
"Apache-2.0"
] | null | null | null | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;
; Programmer: Anjaney Chirag Mahajan
; Class: ECE 109
; Section: 405
;
; blocks.asm
;
; Submitted: 03/28/2017
;
;
; The function of this program is to draw and manipulate the location of a
; box on the screen
;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
.ORIG x3000
JSR Initialise ; Initialize R0, R2, R3 and R4
JSR Mem_Num_128 ; Jump to Label Mem_Num_128
JSR Mem_Neg_Num_128 ; Jump to Label Mem_Neg_Num_128
LD R1, WHITE ; Load [White] -> R1
START LD R0, X ; Load [X] -> R0
AND R3, R3, #0 ; Initialise R3 ; Loop Control for X_Axis
AND R4, R4, #0 ; Initialise R4 ; Loop Control for Y_Axis
ADD R4, R4, #8 ; R4 = R4 + 8
Y_Axis ADD R3, R3, #8 ; R3 = R3 + 8
X_Axis
STR R1, R0, #0 ; [R0] -> [R1]
ADD R0, R0, #1 ; R0 = R0 + 1
ADD R3, R3, #-1 ; R3 = R3 - 1
brp X_Axis ; R3 > 0? Go to X_Axis
ADD R0, R0, R6 ; R0 = R0 + R6
ADD R0, R0, #-8 ; R0 = R0 - 8
ADD R4, R4, #-1 ; R4 = R4 - 1
brp Y_Axis ; R3 > 0? Go to Y_Axis
AND R0, R0, #0 ; Initialise R0
GETC ; Character Input
ST R0, Input ; Store Character <- R0
ST R1, Temp_Color ; Store Temp_Color <- R1
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
Exit_Test
Test_q LD R0, Input ; R0 = [Input]
Not R1, R0 ; Inverse [R0] -> R1
LD R0, q ; R0 = [q]
ADD R2, R1, R0 ; R2 = R1 + R0
ADD R2, R2, #1 ; R2 = R2 + 1
Brz EXIT ; R2 =0? Go to label EXIT
JSR Initialise ; Initialize R0, R2, R3 and R4
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
Move_Test
Test_w LD R0, Input ; R0 = [Input]
Not R1, R0 ; Inverse [R0] -> R1
LD R0, w ; R0 = [w]
ADD R2, R1, R0 ; R2 = R1 + R0
ADD R2, R2, #1 ; R2 = R2 + 1
Brz If_w ; R2 =0? Go to label If_w
JSR Initialise ; Initialize R0, R2, R3 and R4
Test_s LD R0, Input ; R0 = [Input]
Not R1, R0 ; Inverse [R0] -> R1
LD R0, s ; R0 = [s]
ADD R2, R1, R0 ; R2 = R1 + R0
ADD R2, R2, #1 ; R2 = R2 + 1
Brz If_s ; R2 =0? Go to label If_s
JSR Initialise ; Initialize R0, R2, R3 and R4
Test_a LD R0, Input ; R0 = [Input]
Not R1, R0 ; Inverse [R0] -> R1
LD R0, a ; R0 = [a]
ADD R2, R1, R0 ; R2 = R1 + R0
ADD R2, R2, #0 ; R2 = R2 + 0
ADD R2, R2, #1 ; R2 = R2 + 1
Brz If_a ; R2 =0? Go to label If_a
JSR Initialise ; Initialize R0, R2, R3 and R4
Test_d LD R0, Input ; R0 = [Input]
Not R1, R0 ; Inverse [R0] -> R1
LD R0, d ; R0 = [d]
ADD R2, R1, R0 ; R2 = R1 + R0
ADD R2, R2, #0 ; R2 = R2 + 0
ADD R2, R2, #1 ; R2 = R2 + 1
Brz If_d ; R2 =0? Go to label If_d
JSR Initialise ; Initialize R0, R2, R3 and R4
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
Color_Test
Test_y LD R0, Input ; R0 = [Input]
Not R1, R0 ; Inverse [R0] -> R1
LD R0, y ; R0 = [y]
ADD R2, R1, R0 ; R2 = R1 + R0
ADD R2, R2, #1 ; R2 = R2 + 1
Brz If_y ; R2 =0? Go to label If_y
JSR Initialise ; Initialize R0, R2, R3 and R4
Test_g LD R0, Input ; R0 = [Input]
Not R1, R0 ; Inverse [R0] -> R1
LD R0, g ; R0 = [g]
ADD R2, R1, R0 ; R2 = R1 + R0
ADD R2, R2, #1 ; R2 = R2 + 1
Brz If_g ; R2 =0? Go to label If_g
JSR Initialise ; Initialize R0, R2, R3 and R4
Test_r LD R0, Input ; R0 = [Input]
Not R1, R0 ; Inverse [R0] -> R1
LD R0, r ; R0 = [r]
ADD R2, R1, R0 ; R2 = R1 + R0
ADD R2, R2, #1 ; R2 = R2 + 1
Brz If_r ; R2 =0? Go to label If_r
JSR Initialise ; Initialize R0, R2, R3 and R4
Test_b LD R0, Input ; R0 = [Input]
Not R1, R0 ; Inverse [R0] -> R1
LD R0, b ; R0 = [b]
ADD R2, R1, R0 ; R2 = R1 + R0
ADD R2, R2, #1 ; R2 = R2 + 1
Brz If_b ; R2 =0? Go to label If_b
JSR Initialise ; Initialize R0, R2, R3 and R4
Test_wh LD R0, Input ; R0 = [Input]
Not R1, R0 ; Inverse [R0] -> R1
LD R0, wh ; R0 = [wh]
ADD R2, R1, R0 ; R2 = R1 + R0
ADD R2, R2, #1 ; R2 = R2 + 1
Brz If_wh ; R2 =0? Go to label If_wh
JSR Initialise ; Initialize R0, R2, R3 and R4
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
Results
If_w JSR Clear ; Initialize R0, R2, R3 and R4
LD R1, Temp_Color ; Load Temp_Color -> R1
LD R4, X ; Load X -> R4
ADD R4, R4, R5
ADD R4, R4, R5
ADD R4, R4, R5
ADD R4, R4, R5
ADD R4, R4, R5
ADD R4, R4, R5
ADD R4, R4, R5
ADD R4, R4, R5 ; ADD R4 = R4 - 128
ST R4, X ; Store R4 -> X
Brnzp START ; Go to Label START
If_a JSR Clear ; Initialize R0, R2, R3 and R4
LD R1, Temp_Color ; Load Temp_Color -> R1
LD R4, X ; Load X -> R4
ADD R4, R4, #-8 ; ADD R4 = R4 - 8
ST R4, X ; Store R4 -> X
Brnzp START ; Go to Label START
If_s JSR Clear ; Initialize R0, R2, R3 and R4
LD R1, Temp_Color ; Load Temp_Color -> R1
LD R4, X ; Load X -> R4
ADD R4, R4, R6
ADD R4, R4, R6
ADD R4, R4, R6
ADD R4, R4, R6
ADD R4, R4, R6
ADD R4, R4, R6
ADD R4, R4, R6
ADD R4, R4, R6 ; ADD R4 = R4 + 128
ST R4, X ; Store R4 -> X
Brnzp START ; Go to Label START
If_d JSR Clear ; Initialize R0, R2, R3 and R4
LD R1, Temp_Color ; Load Temp_Color -> R1
LD R4, X ; Load X -> R4
ADD R4, R4, #8 ; ADD R4 = R4 + 8
ST R4, X ; Store R4 -> X
Brnzp START ; Go to Label START
If_r LD R1, RED ; Load RED -> R1
Brnzp START ; Go to Label START
If_g LD R1, GREEN ; Load GREEN -> R1
Brnzp START ; Go to Label START
If_b LD R1, BLUE ; Load BLUE -> R1
Brnzp START ; Go to Label START
If_y LD R1, YELLOW ; Load YELLOW -> R1
Brnzp START ; Go to Label START
If_wh LD R1, WHITE ; Load WHITE -> R1
Brnzp START ; Go to Label START
Exit HALT ; End Program
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
Clear LD R1, BLACK ; Load [BLACK] -> R1
LD R0, X ; Store [X] -> R0
AND R3, R3, #0 ; Initialise R3 ; Loop Control for XAxis
AND R4, R4, #0 ; Initialise R4 ; Loop Control for YAxis
ADD R4, R4, #8 ; R4 = R4 + 8
YAxis ADD R3, R3, #8 ; R3 = R3 + 8
XAxis
STR R1, R0, #0 ; [R0] -> [R1]
ADD R0, R0, #1 ; R0 = R0 + 1
ADD R3, R3, #-1 ; R3 = R3 - 1
brp XAxis ; R3 > 0? Go to XAxis
ADD R0, R0, R6 ; R0 = R0 + R6
ADD R0, R0, #-8 ; R0 = R0 - 8
ADD R4, R4, #-1 ; R4 = R4 - 1
brp YAxis ; R3 > 0? Go to YAxis
AND R0, R0, #0 ; Initialise R0
RET
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
Initialise AND R0, R0, #0
AND R1, R1, #0
AND R2, R2, #0
AND R3, R3, #0
AND R4, R4, #0
RET
Mem_Num_128
ADD R6, R6, #1 ; Add Decimal value #1 to R2
ADD R6, R6, R6 ; Add Decimal value #2 to R2
ADD R6, R6, R6 ; Add Decimal value #4 to R2
ADD R6, R6, R6 ; Add Decimal value #8 to R2
ADD R6, R6, R6 ; Add Decimal value #16 to R2
ADD R6, R6, R6 ; Add Decimal value #32 to R2
ADD R6, R6, R6 ; Add Decimal value #64 to R2
ADD R6, R6, R6 ; Add Decimal value #128 to R2
RET
Mem_Neg_Num_128
ADD R5, R5, #-1 ; Add Decimal value #-1 to R2
ADD R5, R5, R5 ; Add Decimal value #-2 to R2
ADD R5, R5, R5 ; Add Decimal value #-4 to R2
ADD R5, R5, R5 ; Add Decimal value #-8to R2
ADD R5, R5, R5 ; Add Decimal value #-16 to R2
ADD R5, R5, R5 ; Add Decimal value #-32 to R2
ADD R5, R5, R5 ; Add Decimal value #-64 to R2
ADD R5, R5, R5 ; Add Decimal value #-128 to R2
RET
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
X .FILL xDF40
Input .FILL x4000
Temp_Color .FILL x4001
Temp_Storage .FILL x4002
W_Test .FILL xFF00
A_Test .FILL xFF00
D_TEST .FILL x00FF
D_Test_2 .FILL xFF7F
RED .FILL x7C00
GREEN .FILL x03E0
BLUE .FILL x001F
YELLOW .FILL x7FED
WHITE .FILL x7FFF
BLACK .FILL x0000
w .FILL x0077
a .FILL x0061
s .FILL x0073
d .FILL x0064
q .FILL x0071
r .FILL x0072
g .FILL x0067
b .FILL x0062
y .FILL x0079
wh .FILL x0020
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
.END
| 30.822526 | 80 | 0.454324 |
5c0dff429a6f6b43b02189da6f3894c10005c6a6 | 69,955 | asm | Assembly | ffmpeg.js/libavcodec/x86/h264_intrapred.asm | vivekjishtu/audioconverter.js | 803d516a1238dd1ad7738c851a99737007f95cb5 | [
"BSD-3-Clause"
] | 82 | 2015-01-18T08:41:47.000Z | 2022-02-08T19:23:19.000Z | FFmpeg-build/ffmpeg/libavcodec/x86/h264_intrapred.asm | hetissimpel/radioformac | af3145d12d88b925892937ecdac95d12b6439fda | [
"MIT"
] | 5 | 2015-01-24T13:07:23.000Z | 2021-03-19T13:37:17.000Z | FFmpeg-build/ffmpeg/libavcodec/x86/h264_intrapred.asm | hetissimpel/radioformac | af3145d12d88b925892937ecdac95d12b6439fda | [
"MIT"
] | 25 | 2015-01-25T14:52:03.000Z | 2021-09-05T23:59:49.000Z | ;******************************************************************************
;* H.264 intra prediction asm optimizations
;* Copyright (c) 2010 Jason Garrett-Glaser
;* Copyright (c) 2010 Holger Lubitz
;* Copyright (c) 2010 Loren Merritt
;* Copyright (c) 2010 Ronald S. Bultje
;*
;* This file is part of FFmpeg.
;*
;* FFmpeg is free software; you can redistribute it and/or
;* modify it under the terms of the GNU Lesser General Public
;* License as published by the Free Software Foundation; either
;* version 2.1 of the License, or (at your option) any later version.
;*
;* FFmpeg is distributed in the hope that it will be useful,
;* but WITHOUT ANY WARRANTY; without even the implied warranty of
;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
;* Lesser General Public License for more details.
;*
;* You should have received a copy of the GNU Lesser General Public
;* License along with FFmpeg; if not, write to the Free Software
;* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
;******************************************************************************
%include "libavutil/x86/x86util.asm"
SECTION_RODATA
tm_shuf: times 8 db 0x03, 0x80
pw_ff00: times 8 dw 0xff00
plane_shuf: db -8, -7, -6, -5, -4, -3, -2, -1
db 1, 2, 3, 4, 5, 6, 7, 8
plane8_shuf: db -4, -3, -2, -1, 0, 0, 0, 0
db 1, 2, 3, 4, 0, 0, 0, 0
pw_0to7: dw 0, 1, 2, 3, 4, 5, 6, 7
pw_1to8: dw 1, 2, 3, 4, 5, 6, 7, 8
pw_m8tom1: dw -8, -7, -6, -5, -4, -3, -2, -1
pw_m4to4: dw -4, -3, -2, -1, 1, 2, 3, 4
SECTION .text
cextern pb_1
cextern pb_3
cextern pw_4
cextern pw_5
cextern pw_8
cextern pw_16
cextern pw_17
cextern pw_32
;-----------------------------------------------------------------------------
; void pred16x16_vertical_8(uint8_t *src, int stride)
;-----------------------------------------------------------------------------
INIT_MMX mmx
cglobal pred16x16_vertical_8, 2,3
sub r0, r1
mov r2, 8
movq mm0, [r0+0]
movq mm1, [r0+8]
.loop:
movq [r0+r1*1+0], mm0
movq [r0+r1*1+8], mm1
movq [r0+r1*2+0], mm0
movq [r0+r1*2+8], mm1
lea r0, [r0+r1*2]
dec r2
jg .loop
REP_RET
INIT_XMM sse
cglobal pred16x16_vertical_8, 2,3
sub r0, r1
mov r2, 4
movaps xmm0, [r0]
.loop:
movaps [r0+r1*1], xmm0
movaps [r0+r1*2], xmm0
lea r0, [r0+r1*2]
movaps [r0+r1*1], xmm0
movaps [r0+r1*2], xmm0
lea r0, [r0+r1*2]
dec r2
jg .loop
REP_RET
;-----------------------------------------------------------------------------
; void pred16x16_horizontal_8(uint8_t *src, int stride)
;-----------------------------------------------------------------------------
%macro PRED16x16_H 0
cglobal pred16x16_horizontal_8, 2,3
mov r2, 8
%if cpuflag(ssse3)
mova m2, [pb_3]
%endif
.loop:
movd m0, [r0+r1*0-4]
movd m1, [r0+r1*1-4]
%if cpuflag(ssse3)
pshufb m0, m2
pshufb m1, m2
%else
punpcklbw m0, m0
punpcklbw m1, m1
SPLATW m0, m0, 3
SPLATW m1, m1, 3
mova [r0+r1*0+8], m0
mova [r0+r1*1+8], m1
%endif
mova [r0+r1*0], m0
mova [r0+r1*1], m1
lea r0, [r0+r1*2]
dec r2
jg .loop
REP_RET
%endmacro
INIT_MMX mmx
PRED16x16_H
INIT_MMX mmxext
PRED16x16_H
INIT_XMM ssse3
PRED16x16_H
;-----------------------------------------------------------------------------
; void pred16x16_dc_8(uint8_t *src, int stride)
;-----------------------------------------------------------------------------
%macro PRED16x16_DC 0
cglobal pred16x16_dc_8, 2,7
mov r4, r0
sub r0, r1
pxor mm0, mm0
pxor mm1, mm1
psadbw mm0, [r0+0]
psadbw mm1, [r0+8]
dec r0
movzx r5d, byte [r0+r1*1]
paddw mm0, mm1
movd r6d, mm0
lea r0, [r0+r1*2]
%rep 7
movzx r2d, byte [r0+r1*0]
movzx r3d, byte [r0+r1*1]
add r5d, r2d
add r6d, r3d
lea r0, [r0+r1*2]
%endrep
movzx r2d, byte [r0+r1*0]
add r5d, r6d
lea r2d, [r2+r5+16]
shr r2d, 5
%if cpuflag(ssse3)
pxor m1, m1
%endif
SPLATB_REG m0, r2, m1
%if mmsize==8
mov r3d, 8
.loop:
mova [r4+r1*0+0], m0
mova [r4+r1*0+8], m0
mova [r4+r1*1+0], m0
mova [r4+r1*1+8], m0
%else
mov r3d, 4
.loop:
mova [r4+r1*0], m0
mova [r4+r1*1], m0
lea r4, [r4+r1*2]
mova [r4+r1*0], m0
mova [r4+r1*1], m0
%endif
lea r4, [r4+r1*2]
dec r3d
jg .loop
REP_RET
%endmacro
INIT_MMX mmxext
PRED16x16_DC
INIT_XMM sse2
PRED16x16_DC
INIT_XMM ssse3
PRED16x16_DC
;-----------------------------------------------------------------------------
; void pred16x16_tm_vp8_8(uint8_t *src, int stride)
;-----------------------------------------------------------------------------
%macro PRED16x16_TM 0
cglobal pred16x16_tm_vp8_8, 2,5
sub r0, r1
pxor mm7, mm7
movq mm0, [r0+0]
movq mm2, [r0+8]
movq mm1, mm0
movq mm3, mm2
punpcklbw mm0, mm7
punpckhbw mm1, mm7
punpcklbw mm2, mm7
punpckhbw mm3, mm7
movzx r3d, byte [r0-1]
mov r4d, 16
.loop:
movzx r2d, byte [r0+r1-1]
sub r2d, r3d
movd mm4, r2d
SPLATW mm4, mm4, 0
movq mm5, mm4
movq mm6, mm4
movq mm7, mm4
paddw mm4, mm0
paddw mm5, mm1
paddw mm6, mm2
paddw mm7, mm3
packuswb mm4, mm5
packuswb mm6, mm7
movq [r0+r1+0], mm4
movq [r0+r1+8], mm6
add r0, r1
dec r4d
jg .loop
REP_RET
%endmacro
INIT_MMX mmx
PRED16x16_TM
INIT_MMX mmxext
PRED16x16_TM
INIT_XMM sse2
cglobal pred16x16_tm_vp8_8, 2,6,6
sub r0, r1
pxor xmm2, xmm2
movdqa xmm0, [r0]
movdqa xmm1, xmm0
punpcklbw xmm0, xmm2
punpckhbw xmm1, xmm2
movzx r4d, byte [r0-1]
mov r5d, 8
.loop:
movzx r2d, byte [r0+r1*1-1]
movzx r3d, byte [r0+r1*2-1]
sub r2d, r4d
sub r3d, r4d
movd xmm2, r2d
movd xmm4, r3d
pshuflw xmm2, xmm2, 0
pshuflw xmm4, xmm4, 0
punpcklqdq xmm2, xmm2
punpcklqdq xmm4, xmm4
movdqa xmm3, xmm2
movdqa xmm5, xmm4
paddw xmm2, xmm0
paddw xmm3, xmm1
paddw xmm4, xmm0
paddw xmm5, xmm1
packuswb xmm2, xmm3
packuswb xmm4, xmm5
movdqa [r0+r1*1], xmm2
movdqa [r0+r1*2], xmm4
lea r0, [r0+r1*2]
dec r5d
jg .loop
REP_RET
;-----------------------------------------------------------------------------
; void pred16x16_plane_*_8(uint8_t *src, int stride)
;-----------------------------------------------------------------------------
%macro H264_PRED16x16_PLANE 1
cglobal pred16x16_plane_%1_8, 2,9,7
mov r2, r1 ; +stride
neg r1 ; -stride
movh m0, [r0+r1 -1]
%if mmsize == 8
pxor m4, m4
movh m1, [r0+r1 +3 ]
movh m2, [r0+r1 +8 ]
movh m3, [r0+r1 +12]
punpcklbw m0, m4
punpcklbw m1, m4
punpcklbw m2, m4
punpcklbw m3, m4
pmullw m0, [pw_m8tom1 ]
pmullw m1, [pw_m8tom1+8]
pmullw m2, [pw_1to8 ]
pmullw m3, [pw_1to8 +8]
paddw m0, m2
paddw m1, m3
%else ; mmsize == 16
%if cpuflag(ssse3)
movhps m0, [r0+r1 +8]
pmaddubsw m0, [plane_shuf] ; H coefficients
%else ; sse2
pxor m2, m2
movh m1, [r0+r1 +8]
punpcklbw m0, m2
punpcklbw m1, m2
pmullw m0, [pw_m8tom1]
pmullw m1, [pw_1to8]
paddw m0, m1
%endif
movhlps m1, m0
%endif
paddw m0, m1
%if cpuflag(mmxext)
PSHUFLW m1, m0, 0xE
%elif cpuflag(mmx)
mova m1, m0
psrlq m1, 32
%endif
paddw m0, m1
%if cpuflag(mmxext)
PSHUFLW m1, m0, 0x1
%elif cpuflag(mmx)
mova m1, m0
psrlq m1, 16
%endif
paddw m0, m1 ; sum of H coefficients
lea r4, [r0+r2*8-1]
lea r3, [r0+r2*4-1]
add r4, r2
%if ARCH_X86_64
%define e_reg r8
%else
%define e_reg r0
%endif
movzx e_reg, byte [r3+r2*2 ]
movzx r5, byte [r4+r1 ]
sub r5, e_reg
movzx e_reg, byte [r3+r2 ]
movzx r6, byte [r4 ]
sub r6, e_reg
lea r5, [r5+r6*2]
movzx e_reg, byte [r3+r1 ]
movzx r6, byte [r4+r2*2 ]
sub r6, e_reg
lea r5, [r5+r6*4]
movzx e_reg, byte [r3 ]
%if ARCH_X86_64
movzx r7, byte [r4+r2 ]
sub r7, e_reg
%else
movzx r6, byte [r4+r2 ]
sub r6, e_reg
lea r5, [r5+r6*4]
sub r5, r6
%endif
lea e_reg, [r3+r1*4]
lea r3, [r4+r2*4]
movzx r4, byte [e_reg+r2 ]
movzx r6, byte [r3 ]
sub r6, r4
%if ARCH_X86_64
lea r6, [r7+r6*2]
lea r5, [r5+r6*2]
add r5, r6
%else
lea r5, [r5+r6*4]
lea r5, [r5+r6*2]
%endif
movzx r4, byte [e_reg ]
%if ARCH_X86_64
movzx r7, byte [r3 +r2 ]
sub r7, r4
sub r5, r7
%else
movzx r6, byte [r3 +r2 ]
sub r6, r4
lea r5, [r5+r6*8]
sub r5, r6
%endif
movzx r4, byte [e_reg+r1 ]
movzx r6, byte [r3 +r2*2]
sub r6, r4
%if ARCH_X86_64
add r6, r7
%endif
lea r5, [r5+r6*8]
movzx r4, byte [e_reg+r2*2]
movzx r6, byte [r3 +r1 ]
sub r6, r4
lea r5, [r5+r6*4]
add r5, r6 ; sum of V coefficients
%if ARCH_X86_64 == 0
mov r0, r0m
%endif
%ifidn %1, h264
lea r5, [r5*5+32]
sar r5, 6
%elifidn %1, rv40
lea r5, [r5*5]
sar r5, 6
%elifidn %1, svq3
test r5, r5
lea r6, [r5+3]
cmovs r5, r6
sar r5, 2 ; V/4
lea r5, [r5*5] ; 5*(V/4)
test r5, r5
lea r6, [r5+15]
cmovs r5, r6
sar r5, 4 ; (5*(V/4))/16
%endif
movzx r4, byte [r0+r1 +15]
movzx r3, byte [r3+r2*2 ]
lea r3, [r3+r4+1]
shl r3, 4
movd r1d, m0
movsx r1d, r1w
%ifnidn %1, svq3
%ifidn %1, h264
lea r1d, [r1d*5+32]
%else ; rv40
lea r1d, [r1d*5]
%endif
sar r1d, 6
%else ; svq3
test r1d, r1d
lea r4d, [r1d+3]
cmovs r1d, r4d
sar r1d, 2 ; H/4
lea r1d, [r1d*5] ; 5*(H/4)
test r1d, r1d
lea r4d, [r1d+15]
cmovs r1d, r4d
sar r1d, 4 ; (5*(H/4))/16
%endif
movd m0, r1d
add r1d, r5d
add r3d, r1d
shl r1d, 3
sub r3d, r1d ; a
movd m1, r5d
movd m3, r3d
SPLATW m0, m0, 0 ; H
SPLATW m1, m1, 0 ; V
SPLATW m3, m3, 0 ; a
%ifidn %1, svq3
SWAP 0, 1
%endif
mova m2, m0
%if mmsize == 8
mova m5, m0
%endif
pmullw m0, [pw_0to7] ; 0*H, 1*H, ..., 7*H (words)
%if mmsize == 16
psllw m2, 3
%else
psllw m5, 3
psllw m2, 2
mova m6, m5
paddw m6, m2
%endif
paddw m0, m3 ; a + {0,1,2,3,4,5,6,7}*H
paddw m2, m0 ; a + {8,9,10,11,12,13,14,15}*H
%if mmsize == 8
paddw m5, m0 ; a + {8,9,10,11}*H
paddw m6, m0 ; a + {12,13,14,15}*H
%endif
mov r4, 8
.loop:
mova m3, m0 ; b[0..7]
mova m4, m2 ; b[8..15]
psraw m3, 5
psraw m4, 5
packuswb m3, m4
mova [r0], m3
%if mmsize == 8
mova m3, m5 ; b[8..11]
mova m4, m6 ; b[12..15]
psraw m3, 5
psraw m4, 5
packuswb m3, m4
mova [r0+8], m3
%endif
paddw m0, m1
paddw m2, m1
%if mmsize == 8
paddw m5, m1
paddw m6, m1
%endif
mova m3, m0 ; b[0..7]
mova m4, m2 ; b[8..15]
psraw m3, 5
psraw m4, 5
packuswb m3, m4
mova [r0+r2], m3
%if mmsize == 8
mova m3, m5 ; b[8..11]
mova m4, m6 ; b[12..15]
psraw m3, 5
psraw m4, 5
packuswb m3, m4
mova [r0+r2+8], m3
%endif
paddw m0, m1
paddw m2, m1
%if mmsize == 8
paddw m5, m1
paddw m6, m1
%endif
lea r0, [r0+r2*2]
dec r4
jg .loop
REP_RET
%endmacro
INIT_MMX mmx
H264_PRED16x16_PLANE h264
H264_PRED16x16_PLANE rv40
H264_PRED16x16_PLANE svq3
INIT_MMX mmxext
H264_PRED16x16_PLANE h264
H264_PRED16x16_PLANE rv40
H264_PRED16x16_PLANE svq3
INIT_XMM sse2
H264_PRED16x16_PLANE h264
H264_PRED16x16_PLANE rv40
H264_PRED16x16_PLANE svq3
INIT_XMM ssse3
H264_PRED16x16_PLANE h264
H264_PRED16x16_PLANE rv40
H264_PRED16x16_PLANE svq3
;-----------------------------------------------------------------------------
; void pred8x8_plane_8(uint8_t *src, int stride)
;-----------------------------------------------------------------------------
%macro H264_PRED8x8_PLANE 0
cglobal pred8x8_plane_8, 2,9,7
mov r2, r1 ; +stride
neg r1 ; -stride
movd m0, [r0+r1 -1]
%if mmsize == 8
pxor m2, m2
movh m1, [r0+r1 +4 ]
punpcklbw m0, m2
punpcklbw m1, m2
pmullw m0, [pw_m4to4]
pmullw m1, [pw_m4to4+8]
%else ; mmsize == 16
%if cpuflag(ssse3)
movhps m0, [r0+r1 +4] ; this reads 4 bytes more than necessary
pmaddubsw m0, [plane8_shuf] ; H coefficients
%else ; sse2
pxor m2, m2
movd m1, [r0+r1 +4]
punpckldq m0, m1
punpcklbw m0, m2
pmullw m0, [pw_m4to4]
%endif
movhlps m1, m0
%endif
paddw m0, m1
%if notcpuflag(ssse3)
%if cpuflag(mmxext)
PSHUFLW m1, m0, 0xE
%elif cpuflag(mmx)
mova m1, m0
psrlq m1, 32
%endif
paddw m0, m1
%endif ; !ssse3
%if cpuflag(mmxext)
PSHUFLW m1, m0, 0x1
%elif cpuflag(mmx)
mova m1, m0
psrlq m1, 16
%endif
paddw m0, m1 ; sum of H coefficients
lea r4, [r0+r2*4-1]
lea r3, [r0 -1]
add r4, r2
%if ARCH_X86_64
%define e_reg r8
%else
%define e_reg r0
%endif
movzx e_reg, byte [r3+r2*2 ]
movzx r5, byte [r4+r1 ]
sub r5, e_reg
movzx e_reg, byte [r3 ]
%if ARCH_X86_64
movzx r7, byte [r4+r2 ]
sub r7, e_reg
sub r5, r7
%else
movzx r6, byte [r4+r2 ]
sub r6, e_reg
lea r5, [r5+r6*4]
sub r5, r6
%endif
movzx e_reg, byte [r3+r1 ]
movzx r6, byte [r4+r2*2 ]
sub r6, e_reg
%if ARCH_X86_64
add r6, r7
%endif
lea r5, [r5+r6*4]
movzx e_reg, byte [r3+r2 ]
movzx r6, byte [r4 ]
sub r6, e_reg
lea r6, [r5+r6*2]
lea r5, [r6*9+16]
lea r5, [r5+r6*8]
sar r5, 5
%if ARCH_X86_64 == 0
mov r0, r0m
%endif
movzx r3, byte [r4+r2*2 ]
movzx r4, byte [r0+r1 +7]
lea r3, [r3+r4+1]
shl r3, 4
movd r1d, m0
movsx r1d, r1w
imul r1d, 17
add r1d, 16
sar r1d, 5
movd m0, r1d
add r1d, r5d
sub r3d, r1d
add r1d, r1d
sub r3d, r1d ; a
movd m1, r5d
movd m3, r3d
SPLATW m0, m0, 0 ; H
SPLATW m1, m1, 0 ; V
SPLATW m3, m3, 0 ; a
%if mmsize == 8
mova m2, m0
%endif
pmullw m0, [pw_0to7] ; 0*H, 1*H, ..., 7*H (words)
paddw m0, m3 ; a + {0,1,2,3,4,5,6,7}*H
%if mmsize == 8
psllw m2, 2
paddw m2, m0 ; a + {4,5,6,7}*H
%endif
mov r4, 4
ALIGN 16
.loop:
%if mmsize == 16
mova m3, m0 ; b[0..7]
paddw m0, m1
psraw m3, 5
mova m4, m0 ; V+b[0..7]
paddw m0, m1
psraw m4, 5
packuswb m3, m4
movh [r0], m3
movhps [r0+r2], m3
%else ; mmsize == 8
mova m3, m0 ; b[0..3]
mova m4, m2 ; b[4..7]
paddw m0, m1
paddw m2, m1
psraw m3, 5
psraw m4, 5
mova m5, m0 ; V+b[0..3]
mova m6, m2 ; V+b[4..7]
paddw m0, m1
paddw m2, m1
psraw m5, 5
psraw m6, 5
packuswb m3, m4
packuswb m5, m6
mova [r0], m3
mova [r0+r2], m5
%endif
lea r0, [r0+r2*2]
dec r4
jg .loop
REP_RET
%endmacro
INIT_MMX mmx
H264_PRED8x8_PLANE
INIT_MMX mmxext
H264_PRED8x8_PLANE
INIT_XMM sse2
H264_PRED8x8_PLANE
INIT_XMM ssse3
H264_PRED8x8_PLANE
;-----------------------------------------------------------------------------
; void pred8x8_vertical_8(uint8_t *src, int stride)
;-----------------------------------------------------------------------------
INIT_MMX mmx
cglobal pred8x8_vertical_8, 2,2
sub r0, r1
movq mm0, [r0]
%rep 3
movq [r0+r1*1], mm0
movq [r0+r1*2], mm0
lea r0, [r0+r1*2]
%endrep
movq [r0+r1*1], mm0
movq [r0+r1*2], mm0
RET
;-----------------------------------------------------------------------------
; void pred8x8_horizontal_8(uint8_t *src, int stride)
;-----------------------------------------------------------------------------
%macro PRED8x8_H 0
cglobal pred8x8_horizontal_8, 2,3
mov r2, 4
%if cpuflag(ssse3)
mova m2, [pb_3]
%endif
.loop:
SPLATB_LOAD m0, r0+r1*0-1, m2
SPLATB_LOAD m1, r0+r1*1-1, m2
mova [r0+r1*0], m0
mova [r0+r1*1], m1
lea r0, [r0+r1*2]
dec r2
jg .loop
REP_RET
%endmacro
INIT_MMX mmx
PRED8x8_H
INIT_MMX mmxext
PRED8x8_H
INIT_MMX ssse3
PRED8x8_H
;-----------------------------------------------------------------------------
; void pred8x8_top_dc_8_mmxext(uint8_t *src, int stride)
;-----------------------------------------------------------------------------
INIT_MMX mmxext
cglobal pred8x8_top_dc_8, 2,5
sub r0, r1
movq mm0, [r0]
pxor mm1, mm1
pxor mm2, mm2
lea r2, [r0+r1*2]
punpckhbw mm1, mm0
punpcklbw mm0, mm2
psadbw mm1, mm2 ; s1
lea r3, [r2+r1*2]
psadbw mm0, mm2 ; s0
psrlw mm1, 1
psrlw mm0, 1
pavgw mm1, mm2
lea r4, [r3+r1*2]
pavgw mm0, mm2
pshufw mm1, mm1, 0
pshufw mm0, mm0, 0 ; dc0 (w)
packuswb mm0, mm1 ; dc0,dc1 (b)
movq [r0+r1*1], mm0
movq [r0+r1*2], mm0
lea r0, [r3+r1*2]
movq [r2+r1*1], mm0
movq [r2+r1*2], mm0
movq [r3+r1*1], mm0
movq [r3+r1*2], mm0
movq [r0+r1*1], mm0
movq [r0+r1*2], mm0
RET
;-----------------------------------------------------------------------------
; void pred8x8_dc_8_mmxext(uint8_t *src, int stride)
;-----------------------------------------------------------------------------
INIT_MMX mmxext
cglobal pred8x8_dc_8, 2,5
sub r0, r1
pxor m7, m7
movd m0, [r0+0]
movd m1, [r0+4]
psadbw m0, m7 ; s0
mov r4, r0
psadbw m1, m7 ; s1
movzx r2d, byte [r0+r1*1-1]
movzx r3d, byte [r0+r1*2-1]
lea r0, [r0+r1*2]
add r2d, r3d
movzx r3d, byte [r0+r1*1-1]
add r2d, r3d
movzx r3d, byte [r0+r1*2-1]
add r2d, r3d
lea r0, [r0+r1*2]
movd m2, r2d ; s2
movzx r2d, byte [r0+r1*1-1]
movzx r3d, byte [r0+r1*2-1]
lea r0, [r0+r1*2]
add r2d, r3d
movzx r3d, byte [r0+r1*1-1]
add r2d, r3d
movzx r3d, byte [r0+r1*2-1]
add r2d, r3d
movd m3, r2d ; s3
punpcklwd m0, m1
mov r0, r4
punpcklwd m2, m3
punpckldq m0, m2 ; s0, s1, s2, s3
pshufw m3, m0, 11110110b ; s2, s1, s3, s3
lea r2, [r0+r1*2]
pshufw m0, m0, 01110100b ; s0, s1, s3, s1
paddw m0, m3
lea r3, [r2+r1*2]
psrlw m0, 2
pavgw m0, m7 ; s0+s2, s1, s3, s1+s3
lea r4, [r3+r1*2]
packuswb m0, m0
punpcklbw m0, m0
movq m1, m0
punpcklbw m0, m0
punpckhbw m1, m1
movq [r0+r1*1], m0
movq [r0+r1*2], m0
movq [r2+r1*1], m0
movq [r2+r1*2], m0
movq [r3+r1*1], m1
movq [r3+r1*2], m1
movq [r4+r1*1], m1
movq [r4+r1*2], m1
RET
;-----------------------------------------------------------------------------
; void pred8x8_dc_rv40_8(uint8_t *src, int stride)
;-----------------------------------------------------------------------------
INIT_MMX mmxext
cglobal pred8x8_dc_rv40_8, 2,7
mov r4, r0
sub r0, r1
pxor mm0, mm0
psadbw mm0, [r0]
dec r0
movzx r5d, byte [r0+r1*1]
movd r6d, mm0
lea r0, [r0+r1*2]
%rep 3
movzx r2d, byte [r0+r1*0]
movzx r3d, byte [r0+r1*1]
add r5d, r2d
add r6d, r3d
lea r0, [r0+r1*2]
%endrep
movzx r2d, byte [r0+r1*0]
add r5d, r6d
lea r2d, [r2+r5+8]
shr r2d, 4
movd mm0, r2d
punpcklbw mm0, mm0
pshufw mm0, mm0, 0
mov r3d, 4
.loop:
movq [r4+r1*0], mm0
movq [r4+r1*1], mm0
lea r4, [r4+r1*2]
dec r3d
jg .loop
REP_RET
;-----------------------------------------------------------------------------
; void pred8x8_tm_vp8_8(uint8_t *src, int stride)
;-----------------------------------------------------------------------------
%macro PRED8x8_TM 0
cglobal pred8x8_tm_vp8_8, 2,6
sub r0, r1
pxor mm7, mm7
movq mm0, [r0]
movq mm1, mm0
punpcklbw mm0, mm7
punpckhbw mm1, mm7
movzx r4d, byte [r0-1]
mov r5d, 4
.loop:
movzx r2d, byte [r0+r1*1-1]
movzx r3d, byte [r0+r1*2-1]
sub r2d, r4d
sub r3d, r4d
movd mm2, r2d
movd mm4, r3d
SPLATW mm2, mm2, 0
SPLATW mm4, mm4, 0
movq mm3, mm2
movq mm5, mm4
paddw mm2, mm0
paddw mm3, mm1
paddw mm4, mm0
paddw mm5, mm1
packuswb mm2, mm3
packuswb mm4, mm5
movq [r0+r1*1], mm2
movq [r0+r1*2], mm4
lea r0, [r0+r1*2]
dec r5d
jg .loop
REP_RET
%endmacro
INIT_MMX mmx
PRED8x8_TM
INIT_MMX mmxext
PRED8x8_TM
INIT_XMM sse2
cglobal pred8x8_tm_vp8_8, 2,6,4
sub r0, r1
pxor xmm1, xmm1
movq xmm0, [r0]
punpcklbw xmm0, xmm1
movzx r4d, byte [r0-1]
mov r5d, 4
.loop:
movzx r2d, byte [r0+r1*1-1]
movzx r3d, byte [r0+r1*2-1]
sub r2d, r4d
sub r3d, r4d
movd xmm2, r2d
movd xmm3, r3d
pshuflw xmm2, xmm2, 0
pshuflw xmm3, xmm3, 0
punpcklqdq xmm2, xmm2
punpcklqdq xmm3, xmm3
paddw xmm2, xmm0
paddw xmm3, xmm0
packuswb xmm2, xmm3
movq [r0+r1*1], xmm2
movhps [r0+r1*2], xmm2
lea r0, [r0+r1*2]
dec r5d
jg .loop
REP_RET
INIT_XMM ssse3
cglobal pred8x8_tm_vp8_8, 2,3,6
sub r0, r1
movdqa xmm4, [tm_shuf]
pxor xmm1, xmm1
movq xmm0, [r0]
punpcklbw xmm0, xmm1
movd xmm5, [r0-4]
pshufb xmm5, xmm4
mov r2d, 4
.loop:
movd xmm2, [r0+r1*1-4]
movd xmm3, [r0+r1*2-4]
pshufb xmm2, xmm4
pshufb xmm3, xmm4
psubw xmm2, xmm5
psubw xmm3, xmm5
paddw xmm2, xmm0
paddw xmm3, xmm0
packuswb xmm2, xmm3
movq [r0+r1*1], xmm2
movhps [r0+r1*2], xmm2
lea r0, [r0+r1*2]
dec r2d
jg .loop
REP_RET
; dest, left, right, src, tmp
; output: %1 = (t[n-1] + t[n]*2 + t[n+1] + 2) >> 2
%macro PRED4x4_LOWPASS 5
mova %5, %2
pavgb %2, %3
pxor %3, %5
mova %1, %4
pand %3, [pb_1]
psubusb %2, %3
pavgb %1, %2
%endmacro
;-----------------------------------------------------------------------------
; void pred8x8l_top_dc_8(uint8_t *src, int has_topleft, int has_topright, int stride)
;-----------------------------------------------------------------------------
%macro PRED8x8L_TOP_DC 0
cglobal pred8x8l_top_dc_8, 4,4
sub r0, r3
pxor mm7, mm7
movq mm0, [r0-8]
movq mm3, [r0]
movq mm1, [r0+8]
movq mm2, mm3
movq mm4, mm3
PALIGNR mm2, mm0, 7, mm0
PALIGNR mm1, mm4, 1, mm4
test r1, r1 ; top_left
jz .fix_lt_2
test r2, r2 ; top_right
jz .fix_tr_1
jmp .body
.fix_lt_2:
movq mm5, mm3
pxor mm5, mm2
psllq mm5, 56
psrlq mm5, 56
pxor mm2, mm5
test r2, r2 ; top_right
jnz .body
.fix_tr_1:
movq mm5, mm3
pxor mm5, mm1
psrlq mm5, 56
psllq mm5, 56
pxor mm1, mm5
.body:
PRED4x4_LOWPASS mm0, mm2, mm1, mm3, mm5
psadbw mm7, mm0
paddw mm7, [pw_4]
psrlw mm7, 3
pshufw mm7, mm7, 0
packuswb mm7, mm7
%rep 3
movq [r0+r3*1], mm7
movq [r0+r3*2], mm7
lea r0, [r0+r3*2]
%endrep
movq [r0+r3*1], mm7
movq [r0+r3*2], mm7
RET
%endmacro
INIT_MMX mmxext
PRED8x8L_TOP_DC
INIT_MMX ssse3
PRED8x8L_TOP_DC
;-----------------------------------------------------------------------------
;void pred8x8l_dc_8(uint8_t *src, int has_topleft, int has_topright, int stride)
;-----------------------------------------------------------------------------
%macro PRED8x8L_DC 0
cglobal pred8x8l_dc_8, 4,5
sub r0, r3
lea r4, [r0+r3*2]
movq mm0, [r0+r3*1-8]
punpckhbw mm0, [r0+r3*0-8]
movq mm1, [r4+r3*1-8]
punpckhbw mm1, [r0+r3*2-8]
mov r4, r0
punpckhwd mm1, mm0
lea r0, [r0+r3*4]
movq mm2, [r0+r3*1-8]
punpckhbw mm2, [r0+r3*0-8]
lea r0, [r0+r3*2]
movq mm3, [r0+r3*1-8]
punpckhbw mm3, [r0+r3*0-8]
punpckhwd mm3, mm2
punpckhdq mm3, mm1
lea r0, [r0+r3*2]
movq mm0, [r0+r3*0-8]
movq mm1, [r4]
mov r0, r4
movq mm4, mm3
movq mm2, mm3
PALIGNR mm4, mm0, 7, mm0
PALIGNR mm1, mm2, 1, mm2
test r1, r1
jnz .do_left
.fix_lt_1:
movq mm5, mm3
pxor mm5, mm4
psrlq mm5, 56
psllq mm5, 48
pxor mm1, mm5
jmp .do_left
.fix_lt_2:
movq mm5, mm3
pxor mm5, mm2
psllq mm5, 56
psrlq mm5, 56
pxor mm2, mm5
test r2, r2
jnz .body
.fix_tr_1:
movq mm5, mm3
pxor mm5, mm1
psrlq mm5, 56
psllq mm5, 56
pxor mm1, mm5
jmp .body
.do_left:
movq mm0, mm4
PRED4x4_LOWPASS mm2, mm1, mm4, mm3, mm5
movq mm4, mm0
movq mm7, mm2
PRED4x4_LOWPASS mm1, mm3, mm0, mm4, mm5
psllq mm1, 56
PALIGNR mm7, mm1, 7, mm3
movq mm0, [r0-8]
movq mm3, [r0]
movq mm1, [r0+8]
movq mm2, mm3
movq mm4, mm3
PALIGNR mm2, mm0, 7, mm0
PALIGNR mm1, mm4, 1, mm4
test r1, r1
jz .fix_lt_2
test r2, r2
jz .fix_tr_1
.body:
lea r1, [r0+r3*2]
PRED4x4_LOWPASS mm6, mm2, mm1, mm3, mm5
pxor mm0, mm0
pxor mm1, mm1
lea r2, [r1+r3*2]
psadbw mm0, mm7
psadbw mm1, mm6
paddw mm0, [pw_8]
paddw mm0, mm1
lea r4, [r2+r3*2]
psrlw mm0, 4
pshufw mm0, mm0, 0
packuswb mm0, mm0
movq [r0+r3*1], mm0
movq [r0+r3*2], mm0
movq [r1+r3*1], mm0
movq [r1+r3*2], mm0
movq [r2+r3*1], mm0
movq [r2+r3*2], mm0
movq [r4+r3*1], mm0
movq [r4+r3*2], mm0
RET
%endmacro
INIT_MMX mmxext
PRED8x8L_DC
INIT_MMX ssse3
PRED8x8L_DC
;-----------------------------------------------------------------------------
; void pred8x8l_horizontal_8(uint8_t *src, int has_topleft, int has_topright, int stride)
;-----------------------------------------------------------------------------
%macro PRED8x8L_HORIZONTAL 0
cglobal pred8x8l_horizontal_8, 4,4
sub r0, r3
lea r2, [r0+r3*2]
movq mm0, [r0+r3*1-8]
test r1, r1
lea r1, [r0+r3]
cmovnz r1, r0
punpckhbw mm0, [r1+r3*0-8]
movq mm1, [r2+r3*1-8]
punpckhbw mm1, [r0+r3*2-8]
mov r2, r0
punpckhwd mm1, mm0
lea r0, [r0+r3*4]
movq mm2, [r0+r3*1-8]
punpckhbw mm2, [r0+r3*0-8]
lea r0, [r0+r3*2]
movq mm3, [r0+r3*1-8]
punpckhbw mm3, [r0+r3*0-8]
punpckhwd mm3, mm2
punpckhdq mm3, mm1
lea r0, [r0+r3*2]
movq mm0, [r0+r3*0-8]
movq mm1, [r1+r3*0-8]
mov r0, r2
movq mm4, mm3
movq mm2, mm3
PALIGNR mm4, mm0, 7, mm0
PALIGNR mm1, mm2, 1, mm2
movq mm0, mm4
PRED4x4_LOWPASS mm2, mm1, mm4, mm3, mm5
movq mm4, mm0
movq mm7, mm2
PRED4x4_LOWPASS mm1, mm3, mm0, mm4, mm5
psllq mm1, 56
PALIGNR mm7, mm1, 7, mm3
movq mm3, mm7
lea r1, [r0+r3*2]
movq mm7, mm3
punpckhbw mm3, mm3
punpcklbw mm7, mm7
pshufw mm0, mm3, 0xff
pshufw mm1, mm3, 0xaa
lea r2, [r1+r3*2]
pshufw mm2, mm3, 0x55
pshufw mm3, mm3, 0x00
pshufw mm4, mm7, 0xff
pshufw mm5, mm7, 0xaa
pshufw mm6, mm7, 0x55
pshufw mm7, mm7, 0x00
movq [r0+r3*1], mm0
movq [r0+r3*2], mm1
movq [r1+r3*1], mm2
movq [r1+r3*2], mm3
movq [r2+r3*1], mm4
movq [r2+r3*2], mm5
lea r0, [r2+r3*2]
movq [r0+r3*1], mm6
movq [r0+r3*2], mm7
RET
%endmacro
INIT_MMX mmxext
PRED8x8L_HORIZONTAL
INIT_MMX ssse3
PRED8x8L_HORIZONTAL
;-----------------------------------------------------------------------------
; void pred8x8l_vertical_8(uint8_t *src, int has_topleft, int has_topright, int stride)
;-----------------------------------------------------------------------------
%macro PRED8x8L_VERTICAL 0
cglobal pred8x8l_vertical_8, 4,4
sub r0, r3
movq mm0, [r0-8]
movq mm3, [r0]
movq mm1, [r0+8]
movq mm2, mm3
movq mm4, mm3
PALIGNR mm2, mm0, 7, mm0
PALIGNR mm1, mm4, 1, mm4
test r1, r1 ; top_left
jz .fix_lt_2
test r2, r2 ; top_right
jz .fix_tr_1
jmp .body
.fix_lt_2:
movq mm5, mm3
pxor mm5, mm2
psllq mm5, 56
psrlq mm5, 56
pxor mm2, mm5
test r2, r2 ; top_right
jnz .body
.fix_tr_1:
movq mm5, mm3
pxor mm5, mm1
psrlq mm5, 56
psllq mm5, 56
pxor mm1, mm5
.body:
PRED4x4_LOWPASS mm0, mm2, mm1, mm3, mm5
%rep 3
movq [r0+r3*1], mm0
movq [r0+r3*2], mm0
lea r0, [r0+r3*2]
%endrep
movq [r0+r3*1], mm0
movq [r0+r3*2], mm0
RET
%endmacro
INIT_MMX mmxext
PRED8x8L_VERTICAL
INIT_MMX ssse3
PRED8x8L_VERTICAL
;-----------------------------------------------------------------------------
;void pred8x8l_down_left_8(uint8_t *src, int has_topleft, int has_topright, int stride)
;-----------------------------------------------------------------------------
INIT_MMX mmxext
cglobal pred8x8l_down_left_8, 4,5
sub r0, r3
movq mm0, [r0-8]
movq mm3, [r0]
movq mm1, [r0+8]
movq mm2, mm3
movq mm4, mm3
PALIGNR mm2, mm0, 7, mm0
PALIGNR mm1, mm4, 1, mm4
test r1, r1
jz .fix_lt_2
test r2, r2
jz .fix_tr_1
jmp .do_top
.fix_lt_2:
movq mm5, mm3
pxor mm5, mm2
psllq mm5, 56
psrlq mm5, 56
pxor mm2, mm5
test r2, r2
jnz .do_top
.fix_tr_1:
movq mm5, mm3
pxor mm5, mm1
psrlq mm5, 56
psllq mm5, 56
pxor mm1, mm5
jmp .do_top
.fix_tr_2:
punpckhbw mm3, mm3
pshufw mm1, mm3, 0xFF
jmp .do_topright
.do_top:
PRED4x4_LOWPASS mm4, mm2, mm1, mm3, mm5
movq mm7, mm4
test r2, r2
jz .fix_tr_2
movq mm0, [r0+8]
movq mm5, mm0
movq mm2, mm0
movq mm4, mm0
psrlq mm5, 56
PALIGNR mm2, mm3, 7, mm3
PALIGNR mm5, mm4, 1, mm4
PRED4x4_LOWPASS mm1, mm2, mm5, mm0, mm4
.do_topright:
lea r1, [r0+r3*2]
movq mm6, mm1
psrlq mm1, 56
movq mm4, mm1
lea r2, [r1+r3*2]
movq mm2, mm6
PALIGNR mm2, mm7, 1, mm0
movq mm3, mm6
PALIGNR mm3, mm7, 7, mm0
PALIGNR mm4, mm6, 1, mm0
movq mm5, mm7
movq mm1, mm7
movq mm7, mm6
lea r4, [r2+r3*2]
psllq mm1, 8
PRED4x4_LOWPASS mm0, mm1, mm2, mm5, mm6
PRED4x4_LOWPASS mm1, mm3, mm4, mm7, mm6
movq [r4+r3*2], mm1
movq mm2, mm0
psllq mm1, 8
psrlq mm2, 56
psllq mm0, 8
por mm1, mm2
movq [r4+r3*1], mm1
movq mm2, mm0
psllq mm1, 8
psrlq mm2, 56
psllq mm0, 8
por mm1, mm2
movq [r2+r3*2], mm1
movq mm2, mm0
psllq mm1, 8
psrlq mm2, 56
psllq mm0, 8
por mm1, mm2
movq [r2+r3*1], mm1
movq mm2, mm0
psllq mm1, 8
psrlq mm2, 56
psllq mm0, 8
por mm1, mm2
movq [r1+r3*2], mm1
movq mm2, mm0
psllq mm1, 8
psrlq mm2, 56
psllq mm0, 8
por mm1, mm2
movq [r1+r3*1], mm1
movq mm2, mm0
psllq mm1, 8
psrlq mm2, 56
psllq mm0, 8
por mm1, mm2
movq [r0+r3*2], mm1
psllq mm1, 8
psrlq mm0, 56
por mm1, mm0
movq [r0+r3*1], mm1
RET
%macro PRED8x8L_DOWN_LEFT 0
cglobal pred8x8l_down_left_8, 4,4
sub r0, r3
movq mm0, [r0-8]
movq mm3, [r0]
movq mm1, [r0+8]
movq mm2, mm3
movq mm4, mm3
PALIGNR mm2, mm0, 7, mm0
PALIGNR mm1, mm4, 1, mm4
test r1, r1 ; top_left
jz .fix_lt_2
test r2, r2 ; top_right
jz .fix_tr_1
jmp .do_top
.fix_lt_2:
movq mm5, mm3
pxor mm5, mm2
psllq mm5, 56
psrlq mm5, 56
pxor mm2, mm5
test r2, r2 ; top_right
jnz .do_top
.fix_tr_1:
movq mm5, mm3
pxor mm5, mm1
psrlq mm5, 56
psllq mm5, 56
pxor mm1, mm5
jmp .do_top
.fix_tr_2:
punpckhbw mm3, mm3
pshufw mm1, mm3, 0xFF
jmp .do_topright
.do_top:
PRED4x4_LOWPASS mm4, mm2, mm1, mm3, mm5
movq2dq xmm3, mm4
test r2, r2 ; top_right
jz .fix_tr_2
movq mm0, [r0+8]
movq mm5, mm0
movq mm2, mm0
movq mm4, mm0
psrlq mm5, 56
PALIGNR mm2, mm3, 7, mm3
PALIGNR mm5, mm4, 1, mm4
PRED4x4_LOWPASS mm1, mm2, mm5, mm0, mm4
.do_topright:
movq2dq xmm4, mm1
psrlq mm1, 56
movq2dq xmm5, mm1
lea r1, [r0+r3*2]
pslldq xmm4, 8
por xmm3, xmm4
movdqa xmm2, xmm3
psrldq xmm2, 1
pslldq xmm5, 15
por xmm2, xmm5
lea r2, [r1+r3*2]
movdqa xmm1, xmm3
pslldq xmm1, 1
INIT_XMM cpuname
PRED4x4_LOWPASS xmm0, xmm1, xmm2, xmm3, xmm4
psrldq xmm0, 1
movq [r0+r3*1], xmm0
psrldq xmm0, 1
movq [r0+r3*2], xmm0
psrldq xmm0, 1
lea r0, [r2+r3*2]
movq [r1+r3*1], xmm0
psrldq xmm0, 1
movq [r1+r3*2], xmm0
psrldq xmm0, 1
movq [r2+r3*1], xmm0
psrldq xmm0, 1
movq [r2+r3*2], xmm0
psrldq xmm0, 1
movq [r0+r3*1], xmm0
psrldq xmm0, 1
movq [r0+r3*2], xmm0
RET
%endmacro
INIT_MMX sse2
PRED8x8L_DOWN_LEFT
INIT_MMX ssse3
PRED8x8L_DOWN_LEFT
;-----------------------------------------------------------------------------
;void pred8x8l_down_right_8_mmxext(uint8_t *src, int has_topleft, int has_topright, int stride)
;-----------------------------------------------------------------------------
INIT_MMX mmxext
cglobal pred8x8l_down_right_8, 4,5
sub r0, r3
lea r4, [r0+r3*2]
movq mm0, [r0+r3*1-8]
punpckhbw mm0, [r0+r3*0-8]
movq mm1, [r4+r3*1-8]
punpckhbw mm1, [r0+r3*2-8]
mov r4, r0
punpckhwd mm1, mm0
lea r0, [r0+r3*4]
movq mm2, [r0+r3*1-8]
punpckhbw mm2, [r0+r3*0-8]
lea r0, [r0+r3*2]
movq mm3, [r0+r3*1-8]
punpckhbw mm3, [r0+r3*0-8]
punpckhwd mm3, mm2
punpckhdq mm3, mm1
lea r0, [r0+r3*2]
movq mm0, [r0+r3*0-8]
movq mm1, [r4]
mov r0, r4
movq mm4, mm3
movq mm2, mm3
PALIGNR mm4, mm0, 7, mm0
PALIGNR mm1, mm2, 1, mm2
test r1, r1 ; top_left
jz .fix_lt_1
.do_left:
movq mm0, mm4
PRED4x4_LOWPASS mm2, mm1, mm4, mm3, mm5
movq mm4, mm0
movq mm7, mm2
movq mm6, mm2
PRED4x4_LOWPASS mm1, mm3, mm0, mm4, mm5
psllq mm1, 56
PALIGNR mm7, mm1, 7, mm3
movq mm0, [r0-8]
movq mm3, [r0]
movq mm1, [r0+8]
movq mm2, mm3
movq mm4, mm3
PALIGNR mm2, mm0, 7, mm0
PALIGNR mm1, mm4, 1, mm4
test r1, r1 ; top_left
jz .fix_lt_2
test r2, r2 ; top_right
jz .fix_tr_1
.do_top:
PRED4x4_LOWPASS mm4, mm2, mm1, mm3, mm5
movq mm5, mm4
jmp .body
.fix_lt_1:
movq mm5, mm3
pxor mm5, mm4
psrlq mm5, 56
psllq mm5, 48
pxor mm1, mm5
jmp .do_left
.fix_lt_2:
movq mm5, mm3
pxor mm5, mm2
psllq mm5, 56
psrlq mm5, 56
pxor mm2, mm5
test r2, r2 ; top_right
jnz .do_top
.fix_tr_1:
movq mm5, mm3
pxor mm5, mm1
psrlq mm5, 56
psllq mm5, 56
pxor mm1, mm5
jmp .do_top
.body:
lea r1, [r0+r3*2]
movq mm1, mm7
movq mm7, mm5
movq mm5, mm6
movq mm2, mm7
lea r2, [r1+r3*2]
PALIGNR mm2, mm6, 1, mm0
movq mm3, mm7
PALIGNR mm3, mm6, 7, mm0
movq mm4, mm7
lea r4, [r2+r3*2]
psrlq mm4, 8
PRED4x4_LOWPASS mm0, mm1, mm2, mm5, mm6
PRED4x4_LOWPASS mm1, mm3, mm4, mm7, mm6
movq [r4+r3*2], mm0
movq mm2, mm1
psrlq mm0, 8
psllq mm2, 56
psrlq mm1, 8
por mm0, mm2
movq [r4+r3*1], mm0
movq mm2, mm1
psrlq mm0, 8
psllq mm2, 56
psrlq mm1, 8
por mm0, mm2
movq [r2+r3*2], mm0
movq mm2, mm1
psrlq mm0, 8
psllq mm2, 56
psrlq mm1, 8
por mm0, mm2
movq [r2+r3*1], mm0
movq mm2, mm1
psrlq mm0, 8
psllq mm2, 56
psrlq mm1, 8
por mm0, mm2
movq [r1+r3*2], mm0
movq mm2, mm1
psrlq mm0, 8
psllq mm2, 56
psrlq mm1, 8
por mm0, mm2
movq [r1+r3*1], mm0
movq mm2, mm1
psrlq mm0, 8
psllq mm2, 56
psrlq mm1, 8
por mm0, mm2
movq [r0+r3*2], mm0
psrlq mm0, 8
psllq mm1, 56
por mm0, mm1
movq [r0+r3*1], mm0
RET
%macro PRED8x8L_DOWN_RIGHT 0
cglobal pred8x8l_down_right_8, 4,5
sub r0, r3
lea r4, [r0+r3*2]
movq mm0, [r0+r3*1-8]
punpckhbw mm0, [r0+r3*0-8]
movq mm1, [r4+r3*1-8]
punpckhbw mm1, [r0+r3*2-8]
mov r4, r0
punpckhwd mm1, mm0
lea r0, [r0+r3*4]
movq mm2, [r0+r3*1-8]
punpckhbw mm2, [r0+r3*0-8]
lea r0, [r0+r3*2]
movq mm3, [r0+r3*1-8]
punpckhbw mm3, [r0+r3*0-8]
punpckhwd mm3, mm2
punpckhdq mm3, mm1
lea r0, [r0+r3*2]
movq mm0, [r0+r3*0-8]
movq mm1, [r4]
mov r0, r4
movq mm4, mm3
movq mm2, mm3
PALIGNR mm4, mm0, 7, mm0
PALIGNR mm1, mm2, 1, mm2
test r1, r1
jz .fix_lt_1
jmp .do_left
.fix_lt_1:
movq mm5, mm3
pxor mm5, mm4
psrlq mm5, 56
psllq mm5, 48
pxor mm1, mm5
jmp .do_left
.fix_lt_2:
movq mm5, mm3
pxor mm5, mm2
psllq mm5, 56
psrlq mm5, 56
pxor mm2, mm5
test r2, r2
jnz .do_top
.fix_tr_1:
movq mm5, mm3
pxor mm5, mm1
psrlq mm5, 56
psllq mm5, 56
pxor mm1, mm5
jmp .do_top
.do_left:
movq mm0, mm4
PRED4x4_LOWPASS mm2, mm1, mm4, mm3, mm5
movq mm4, mm0
movq mm7, mm2
movq2dq xmm3, mm2
PRED4x4_LOWPASS mm1, mm3, mm0, mm4, mm5
psllq mm1, 56
PALIGNR mm7, mm1, 7, mm3
movq2dq xmm1, mm7
movq mm0, [r0-8]
movq mm3, [r0]
movq mm1, [r0+8]
movq mm2, mm3
movq mm4, mm3
PALIGNR mm2, mm0, 7, mm0
PALIGNR mm1, mm4, 1, mm4
test r1, r1
jz .fix_lt_2
test r2, r2
jz .fix_tr_1
.do_top:
PRED4x4_LOWPASS mm4, mm2, mm1, mm3, mm5
movq2dq xmm4, mm4
lea r1, [r0+r3*2]
movdqa xmm0, xmm3
pslldq xmm4, 8
por xmm3, xmm4
lea r2, [r1+r3*2]
pslldq xmm4, 1
por xmm1, xmm4
psrldq xmm0, 7
pslldq xmm0, 15
psrldq xmm0, 7
por xmm1, xmm0
lea r0, [r2+r3*2]
movdqa xmm2, xmm3
psrldq xmm2, 1
INIT_XMM cpuname
PRED4x4_LOWPASS xmm0, xmm1, xmm2, xmm3, xmm4
movdqa xmm1, xmm0
psrldq xmm1, 1
movq [r0+r3*2], xmm0
movq [r0+r3*1], xmm1
psrldq xmm0, 2
psrldq xmm1, 2
movq [r2+r3*2], xmm0
movq [r2+r3*1], xmm1
psrldq xmm0, 2
psrldq xmm1, 2
movq [r1+r3*2], xmm0
movq [r1+r3*1], xmm1
psrldq xmm0, 2
psrldq xmm1, 2
movq [r4+r3*2], xmm0
movq [r4+r3*1], xmm1
RET
%endmacro
INIT_MMX sse2
PRED8x8L_DOWN_RIGHT
INIT_MMX ssse3
PRED8x8L_DOWN_RIGHT
;-----------------------------------------------------------------------------
; void pred8x8l_vertical_right_8(uint8_t *src, int has_topleft, int has_topright, int stride)
;-----------------------------------------------------------------------------
INIT_MMX mmxext
cglobal pred8x8l_vertical_right_8, 4,5
sub r0, r3
lea r4, [r0+r3*2]
movq mm0, [r0+r3*1-8]
punpckhbw mm0, [r0+r3*0-8]
movq mm1, [r4+r3*1-8]
punpckhbw mm1, [r0+r3*2-8]
mov r4, r0
punpckhwd mm1, mm0
lea r0, [r0+r3*4]
movq mm2, [r0+r3*1-8]
punpckhbw mm2, [r0+r3*0-8]
lea r0, [r0+r3*2]
movq mm3, [r0+r3*1-8]
punpckhbw mm3, [r0+r3*0-8]
punpckhwd mm3, mm2
punpckhdq mm3, mm1
lea r0, [r0+r3*2]
movq mm0, [r0+r3*0-8]
movq mm1, [r4]
mov r0, r4
movq mm4, mm3
movq mm2, mm3
PALIGNR mm4, mm0, 7, mm0
PALIGNR mm1, mm2, 1, mm2
test r1, r1
jz .fix_lt_1
jmp .do_left
.fix_lt_1:
movq mm5, mm3
pxor mm5, mm4
psrlq mm5, 56
psllq mm5, 48
pxor mm1, mm5
jmp .do_left
.fix_lt_2:
movq mm5, mm3
pxor mm5, mm2
psllq mm5, 56
psrlq mm5, 56
pxor mm2, mm5
test r2, r2
jnz .do_top
.fix_tr_1:
movq mm5, mm3
pxor mm5, mm1
psrlq mm5, 56
psllq mm5, 56
pxor mm1, mm5
jmp .do_top
.do_left:
movq mm0, mm4
PRED4x4_LOWPASS mm2, mm1, mm4, mm3, mm5
movq mm7, mm2
movq mm0, [r0-8]
movq mm3, [r0]
movq mm1, [r0+8]
movq mm2, mm3
movq mm4, mm3
PALIGNR mm2, mm0, 7, mm0
PALIGNR mm1, mm4, 1, mm4
test r1, r1
jz .fix_lt_2
test r2, r2
jz .fix_tr_1
.do_top:
PRED4x4_LOWPASS mm6, mm2, mm1, mm3, mm5
lea r1, [r0+r3*2]
movq mm2, mm6
movq mm3, mm6
PALIGNR mm3, mm7, 7, mm0
PALIGNR mm6, mm7, 6, mm1
movq mm4, mm3
pavgb mm3, mm2
lea r2, [r1+r3*2]
PRED4x4_LOWPASS mm0, mm6, mm2, mm4, mm5
movq [r0+r3*1], mm3
movq [r0+r3*2], mm0
movq mm5, mm0
movq mm6, mm3
movq mm1, mm7
movq mm2, mm1
psllq mm2, 8
movq mm3, mm1
psllq mm3, 16
lea r4, [r2+r3*2]
PRED4x4_LOWPASS mm0, mm1, mm3, mm2, mm4
PALIGNR mm6, mm0, 7, mm2
movq [r1+r3*1], mm6
psllq mm0, 8
PALIGNR mm5, mm0, 7, mm1
movq [r1+r3*2], mm5
psllq mm0, 8
PALIGNR mm6, mm0, 7, mm2
movq [r2+r3*1], mm6
psllq mm0, 8
PALIGNR mm5, mm0, 7, mm1
movq [r2+r3*2], mm5
psllq mm0, 8
PALIGNR mm6, mm0, 7, mm2
movq [r4+r3*1], mm6
psllq mm0, 8
PALIGNR mm5, mm0, 7, mm1
movq [r4+r3*2], mm5
RET
%macro PRED8x8L_VERTICAL_RIGHT 0
cglobal pred8x8l_vertical_right_8, 4,5,7
; manually spill XMM registers for Win64 because
; the code here is initialized with INIT_MMX
WIN64_SPILL_XMM 7
sub r0, r3
lea r4, [r0+r3*2]
movq mm0, [r0+r3*1-8]
punpckhbw mm0, [r0+r3*0-8]
movq mm1, [r4+r3*1-8]
punpckhbw mm1, [r0+r3*2-8]
mov r4, r0
punpckhwd mm1, mm0
lea r0, [r0+r3*4]
movq mm2, [r0+r3*1-8]
punpckhbw mm2, [r0+r3*0-8]
lea r0, [r0+r3*2]
movq mm3, [r0+r3*1-8]
punpckhbw mm3, [r0+r3*0-8]
punpckhwd mm3, mm2
punpckhdq mm3, mm1
lea r0, [r0+r3*2]
movq mm0, [r0+r3*0-8]
movq mm1, [r4]
mov r0, r4
movq mm4, mm3
movq mm2, mm3
PALIGNR mm4, mm0, 7, mm0
PALIGNR mm1, mm2, 1, mm2
test r1, r1
jnz .do_left
.fix_lt_1:
movq mm5, mm3
pxor mm5, mm4
psrlq mm5, 56
psllq mm5, 48
pxor mm1, mm5
jmp .do_left
.fix_lt_2:
movq mm5, mm3
pxor mm5, mm2
psllq mm5, 56
psrlq mm5, 56
pxor mm2, mm5
test r2, r2
jnz .do_top
.fix_tr_1:
movq mm5, mm3
pxor mm5, mm1
psrlq mm5, 56
psllq mm5, 56
pxor mm1, mm5
jmp .do_top
.do_left:
movq mm0, mm4
PRED4x4_LOWPASS mm2, mm1, mm4, mm3, mm5
movq2dq xmm0, mm2
movq mm0, [r0-8]
movq mm3, [r0]
movq mm1, [r0+8]
movq mm2, mm3
movq mm4, mm3
PALIGNR mm2, mm0, 7, mm0
PALIGNR mm1, mm4, 1, mm4
test r1, r1
jz .fix_lt_2
test r2, r2
jz .fix_tr_1
.do_top:
PRED4x4_LOWPASS mm6, mm2, mm1, mm3, mm5
lea r1, [r0+r3*2]
movq2dq xmm4, mm6
pslldq xmm4, 8
por xmm0, xmm4
movdqa xmm6, [pw_ff00]
movdqa xmm1, xmm0
lea r2, [r1+r3*2]
movdqa xmm2, xmm0
movdqa xmm3, xmm0
pslldq xmm0, 1
pslldq xmm1, 2
pavgb xmm2, xmm0
INIT_XMM cpuname
PRED4x4_LOWPASS xmm4, xmm3, xmm1, xmm0, xmm5
pandn xmm6, xmm4
movdqa xmm5, xmm4
psrlw xmm4, 8
packuswb xmm6, xmm4
movhlps xmm4, xmm6
movhps [r0+r3*2], xmm5
movhps [r0+r3*1], xmm2
psrldq xmm5, 4
movss xmm5, xmm6
psrldq xmm2, 4
movss xmm2, xmm4
lea r0, [r2+r3*2]
psrldq xmm5, 1
psrldq xmm2, 1
movq [r0+r3*2], xmm5
movq [r0+r3*1], xmm2
psrldq xmm5, 1
psrldq xmm2, 1
movq [r2+r3*2], xmm5
movq [r2+r3*1], xmm2
psrldq xmm5, 1
psrldq xmm2, 1
movq [r1+r3*2], xmm5
movq [r1+r3*1], xmm2
RET
%endmacro
INIT_MMX sse2
PRED8x8L_VERTICAL_RIGHT
INIT_MMX ssse3
PRED8x8L_VERTICAL_RIGHT
;-----------------------------------------------------------------------------
;void pred8x8l_vertical_left_8(uint8_t *src, int has_topleft, int has_topright, int stride)
;-----------------------------------------------------------------------------
%macro PRED8x8L_VERTICAL_LEFT 0
cglobal pred8x8l_vertical_left_8, 4,4
sub r0, r3
movq mm0, [r0-8]
movq mm3, [r0]
movq mm1, [r0+8]
movq mm2, mm3
movq mm4, mm3
PALIGNR mm2, mm0, 7, mm0
PALIGNR mm1, mm4, 1, mm4
test r1, r1
jz .fix_lt_2
test r2, r2
jz .fix_tr_1
jmp .do_top
.fix_lt_2:
movq mm5, mm3
pxor mm5, mm2
psllq mm5, 56
psrlq mm5, 56
pxor mm2, mm5
test r2, r2
jnz .do_top
.fix_tr_1:
movq mm5, mm3
pxor mm5, mm1
psrlq mm5, 56
psllq mm5, 56
pxor mm1, mm5
jmp .do_top
.fix_tr_2:
punpckhbw mm3, mm3
pshufw mm1, mm3, 0xFF
jmp .do_topright
.do_top:
PRED4x4_LOWPASS mm4, mm2, mm1, mm3, mm5
movq2dq xmm4, mm4
test r2, r2
jz .fix_tr_2
movq mm0, [r0+8]
movq mm5, mm0
movq mm2, mm0
movq mm4, mm0
psrlq mm5, 56
PALIGNR mm2, mm3, 7, mm3
PALIGNR mm5, mm4, 1, mm4
PRED4x4_LOWPASS mm1, mm2, mm5, mm0, mm4
.do_topright:
movq2dq xmm3, mm1
lea r1, [r0+r3*2]
pslldq xmm3, 8
por xmm4, xmm3
movdqa xmm2, xmm4
movdqa xmm1, xmm4
movdqa xmm3, xmm4
psrldq xmm2, 1
pslldq xmm1, 1
pavgb xmm3, xmm2
lea r2, [r1+r3*2]
INIT_XMM cpuname
PRED4x4_LOWPASS xmm0, xmm1, xmm2, xmm4, xmm5
psrldq xmm0, 1
movq [r0+r3*1], xmm3
movq [r0+r3*2], xmm0
lea r0, [r2+r3*2]
psrldq xmm3, 1
psrldq xmm0, 1
movq [r1+r3*1], xmm3
movq [r1+r3*2], xmm0
psrldq xmm3, 1
psrldq xmm0, 1
movq [r2+r3*1], xmm3
movq [r2+r3*2], xmm0
psrldq xmm3, 1
psrldq xmm0, 1
movq [r0+r3*1], xmm3
movq [r0+r3*2], xmm0
RET
%endmacro
INIT_MMX sse2
PRED8x8L_VERTICAL_LEFT
INIT_MMX ssse3
PRED8x8L_VERTICAL_LEFT
;-----------------------------------------------------------------------------
; void pred8x8l_horizontal_up_8(uint8_t *src, int has_topleft, int has_topright, int stride)
;-----------------------------------------------------------------------------
%macro PRED8x8L_HORIZONTAL_UP 0
cglobal pred8x8l_horizontal_up_8, 4,4
sub r0, r3
lea r2, [r0+r3*2]
movq mm0, [r0+r3*1-8]
test r1, r1
lea r1, [r0+r3]
cmovnz r1, r0
punpckhbw mm0, [r1+r3*0-8]
movq mm1, [r2+r3*1-8]
punpckhbw mm1, [r0+r3*2-8]
mov r2, r0
punpckhwd mm1, mm0
lea r0, [r0+r3*4]
movq mm2, [r0+r3*1-8]
punpckhbw mm2, [r0+r3*0-8]
lea r0, [r0+r3*2]
movq mm3, [r0+r3*1-8]
punpckhbw mm3, [r0+r3*0-8]
punpckhwd mm3, mm2
punpckhdq mm3, mm1
lea r0, [r0+r3*2]
movq mm0, [r0+r3*0-8]
movq mm1, [r1+r3*0-8]
mov r0, r2
movq mm4, mm3
movq mm2, mm3
PALIGNR mm4, mm0, 7, mm0
PALIGNR mm1, mm2, 1, mm2
movq mm0, mm4
PRED4x4_LOWPASS mm2, mm1, mm4, mm3, mm5
movq mm4, mm0
movq mm7, mm2
PRED4x4_LOWPASS mm1, mm3, mm0, mm4, mm5
psllq mm1, 56
PALIGNR mm7, mm1, 7, mm3
lea r1, [r0+r3*2]
pshufw mm0, mm7, 00011011b ; l6 l7 l4 l5 l2 l3 l0 l1
psllq mm7, 56 ; l7 .. .. .. .. .. .. ..
movq mm2, mm0
psllw mm0, 8
psrlw mm2, 8
por mm2, mm0 ; l7 l6 l5 l4 l3 l2 l1 l0
movq mm3, mm2
movq mm4, mm2
movq mm5, mm2
psrlq mm2, 8
psrlq mm3, 16
lea r2, [r1+r3*2]
por mm2, mm7 ; l7 l7 l6 l5 l4 l3 l2 l1
punpckhbw mm7, mm7
por mm3, mm7 ; l7 l7 l7 l6 l5 l4 l3 l2
pavgb mm4, mm2
PRED4x4_LOWPASS mm1, mm3, mm5, mm2, mm6
movq mm5, mm4
punpcklbw mm4, mm1 ; p4 p3 p2 p1
punpckhbw mm5, mm1 ; p8 p7 p6 p5
movq mm6, mm5
movq mm7, mm5
movq mm0, mm5
PALIGNR mm5, mm4, 2, mm1
pshufw mm1, mm6, 11111001b
PALIGNR mm6, mm4, 4, mm2
pshufw mm2, mm7, 11111110b
PALIGNR mm7, mm4, 6, mm3
pshufw mm3, mm0, 11111111b
movq [r0+r3*1], mm4
movq [r0+r3*2], mm5
lea r0, [r2+r3*2]
movq [r1+r3*1], mm6
movq [r1+r3*2], mm7
movq [r2+r3*1], mm0
movq [r2+r3*2], mm1
movq [r0+r3*1], mm2
movq [r0+r3*2], mm3
RET
%endmacro
INIT_MMX mmxext
PRED8x8L_HORIZONTAL_UP
INIT_MMX ssse3
PRED8x8L_HORIZONTAL_UP
;-----------------------------------------------------------------------------
;void pred8x8l_horizontal_down_8(uint8_t *src, int has_topleft, int has_topright, int stride)
;-----------------------------------------------------------------------------
INIT_MMX mmxext
cglobal pred8x8l_horizontal_down_8, 4,5
sub r0, r3
lea r4, [r0+r3*2]
movq mm0, [r0+r3*1-8]
punpckhbw mm0, [r0+r3*0-8]
movq mm1, [r4+r3*1-8]
punpckhbw mm1, [r0+r3*2-8]
mov r4, r0
punpckhwd mm1, mm0
lea r0, [r0+r3*4]
movq mm2, [r0+r3*1-8]
punpckhbw mm2, [r0+r3*0-8]
lea r0, [r0+r3*2]
movq mm3, [r0+r3*1-8]
punpckhbw mm3, [r0+r3*0-8]
punpckhwd mm3, mm2
punpckhdq mm3, mm1
lea r0, [r0+r3*2]
movq mm0, [r0+r3*0-8]
movq mm1, [r4]
mov r0, r4
movq mm4, mm3
movq mm2, mm3
PALIGNR mm4, mm0, 7, mm0
PALIGNR mm1, mm2, 1, mm2
test r1, r1
jnz .do_left
.fix_lt_1:
movq mm5, mm3
pxor mm5, mm4
psrlq mm5, 56
psllq mm5, 48
pxor mm1, mm5
jmp .do_left
.fix_lt_2:
movq mm5, mm3
pxor mm5, mm2
psllq mm5, 56
psrlq mm5, 56
pxor mm2, mm5
test r2, r2
jnz .do_top
.fix_tr_1:
movq mm5, mm3
pxor mm5, mm1
psrlq mm5, 56
psllq mm5, 56
pxor mm1, mm5
jmp .do_top
.do_left:
movq mm0, mm4
PRED4x4_LOWPASS mm2, mm1, mm4, mm3, mm5
movq mm4, mm0
movq mm7, mm2
movq mm6, mm2
PRED4x4_LOWPASS mm1, mm3, mm0, mm4, mm5
psllq mm1, 56
PALIGNR mm7, mm1, 7, mm3
movq mm0, [r0-8]
movq mm3, [r0]
movq mm1, [r0+8]
movq mm2, mm3
movq mm4, mm3
PALIGNR mm2, mm0, 7, mm0
PALIGNR mm1, mm4, 1, mm4
test r1, r1
jz .fix_lt_2
test r2, r2
jz .fix_tr_1
.do_top:
PRED4x4_LOWPASS mm4, mm2, mm1, mm3, mm5
movq mm5, mm4
lea r1, [r0+r3*2]
psllq mm7, 56
movq mm2, mm5
movq mm3, mm6
movq mm4, mm2
PALIGNR mm2, mm6, 7, mm5
PALIGNR mm6, mm7, 7, mm0
lea r2, [r1+r3*2]
PALIGNR mm4, mm3, 1, mm7
movq mm5, mm3
pavgb mm3, mm6
PRED4x4_LOWPASS mm0, mm4, mm6, mm5, mm7
movq mm4, mm2
movq mm1, mm2
lea r4, [r2+r3*2]
psrlq mm4, 16
psrlq mm1, 8
PRED4x4_LOWPASS mm6, mm4, mm2, mm1, mm5
movq mm7, mm3
punpcklbw mm3, mm0
punpckhbw mm7, mm0
movq mm1, mm7
movq mm0, mm7
movq mm4, mm7
movq [r4+r3*2], mm3
PALIGNR mm7, mm3, 2, mm5
movq [r4+r3*1], mm7
PALIGNR mm1, mm3, 4, mm5
movq [r2+r3*2], mm1
PALIGNR mm0, mm3, 6, mm3
movq [r2+r3*1], mm0
movq mm2, mm6
movq mm3, mm6
movq [r1+r3*2], mm4
PALIGNR mm6, mm4, 2, mm5
movq [r1+r3*1], mm6
PALIGNR mm2, mm4, 4, mm5
movq [r0+r3*2], mm2
PALIGNR mm3, mm4, 6, mm4
movq [r0+r3*1], mm3
RET
%macro PRED8x8L_HORIZONTAL_DOWN 0
cglobal pred8x8l_horizontal_down_8, 4,5
sub r0, r3
lea r4, [r0+r3*2]
movq mm0, [r0+r3*1-8]
punpckhbw mm0, [r0+r3*0-8]
movq mm1, [r4+r3*1-8]
punpckhbw mm1, [r0+r3*2-8]
mov r4, r0
punpckhwd mm1, mm0
lea r0, [r0+r3*4]
movq mm2, [r0+r3*1-8]
punpckhbw mm2, [r0+r3*0-8]
lea r0, [r0+r3*2]
movq mm3, [r0+r3*1-8]
punpckhbw mm3, [r0+r3*0-8]
punpckhwd mm3, mm2
punpckhdq mm3, mm1
lea r0, [r0+r3*2]
movq mm0, [r0+r3*0-8]
movq mm1, [r4]
mov r0, r4
movq mm4, mm3
movq mm2, mm3
PALIGNR mm4, mm0, 7, mm0
PALIGNR mm1, mm2, 1, mm2
test r1, r1
jnz .do_left
.fix_lt_1:
movq mm5, mm3
pxor mm5, mm4
psrlq mm5, 56
psllq mm5, 48
pxor mm1, mm5
jmp .do_left
.fix_lt_2:
movq mm5, mm3
pxor mm5, mm2
psllq mm5, 56
psrlq mm5, 56
pxor mm2, mm5
test r2, r2
jnz .do_top
.fix_tr_1:
movq mm5, mm3
pxor mm5, mm1
psrlq mm5, 56
psllq mm5, 56
pxor mm1, mm5
jmp .do_top
.fix_tr_2:
punpckhbw mm3, mm3
pshufw mm1, mm3, 0xFF
jmp .do_topright
.do_left:
movq mm0, mm4
PRED4x4_LOWPASS mm2, mm1, mm4, mm3, mm5
movq2dq xmm0, mm2
pslldq xmm0, 8
movq mm4, mm0
PRED4x4_LOWPASS mm1, mm3, mm0, mm4, mm5
movq2dq xmm2, mm1
pslldq xmm2, 15
psrldq xmm2, 8
por xmm0, xmm2
movq mm0, [r0-8]
movq mm3, [r0]
movq mm1, [r0+8]
movq mm2, mm3
movq mm4, mm3
PALIGNR mm2, mm0, 7, mm0
PALIGNR mm1, mm4, 1, mm4
test r1, r1
jz .fix_lt_2
test r2, r2
jz .fix_tr_1
.do_top:
PRED4x4_LOWPASS mm4, mm2, mm1, mm3, mm5
movq2dq xmm1, mm4
test r2, r2
jz .fix_tr_2
movq mm0, [r0+8]
movq mm5, mm0
movq mm2, mm0
movq mm4, mm0
psrlq mm5, 56
PALIGNR mm2, mm3, 7, mm3
PALIGNR mm5, mm4, 1, mm4
PRED4x4_LOWPASS mm1, mm2, mm5, mm0, mm4
.do_topright:
movq2dq xmm5, mm1
pslldq xmm5, 8
por xmm1, xmm5
INIT_XMM cpuname
lea r2, [r4+r3*2]
movdqa xmm2, xmm1
movdqa xmm3, xmm1
PALIGNR xmm1, xmm0, 7, xmm4
PALIGNR xmm2, xmm0, 9, xmm5
lea r1, [r2+r3*2]
PALIGNR xmm3, xmm0, 8, xmm0
movdqa xmm4, xmm1
pavgb xmm4, xmm3
lea r0, [r1+r3*2]
PRED4x4_LOWPASS xmm0, xmm1, xmm2, xmm3, xmm5
punpcklbw xmm4, xmm0
movhlps xmm0, xmm4
movq [r0+r3*2], xmm4
movq [r2+r3*2], xmm0
psrldq xmm4, 2
psrldq xmm0, 2
movq [r0+r3*1], xmm4
movq [r2+r3*1], xmm0
psrldq xmm4, 2
psrldq xmm0, 2
movq [r1+r3*2], xmm4
movq [r4+r3*2], xmm0
psrldq xmm4, 2
psrldq xmm0, 2
movq [r1+r3*1], xmm4
movq [r4+r3*1], xmm0
RET
%endmacro
INIT_MMX sse2
PRED8x8L_HORIZONTAL_DOWN
INIT_MMX ssse3
PRED8x8L_HORIZONTAL_DOWN
;-----------------------------------------------------------------------------
; void pred4x4_dc_8_mmxext(uint8_t *src, const uint8_t *topright, int stride)
;-----------------------------------------------------------------------------
INIT_MMX mmxext
cglobal pred4x4_dc_8, 3,5
pxor mm7, mm7
mov r4, r0
sub r0, r2
movd mm0, [r0]
psadbw mm0, mm7
movzx r1d, byte [r0+r2*1-1]
movd r3d, mm0
add r3d, r1d
movzx r1d, byte [r0+r2*2-1]
lea r0, [r0+r2*2]
add r3d, r1d
movzx r1d, byte [r0+r2*1-1]
add r3d, r1d
movzx r1d, byte [r0+r2*2-1]
add r3d, r1d
add r3d, 4
shr r3d, 3
imul r3d, 0x01010101
mov [r4+r2*0], r3d
mov [r0+r2*0], r3d
mov [r0+r2*1], r3d
mov [r0+r2*2], r3d
RET
;-----------------------------------------------------------------------------
; void pred4x4_tm_vp8_8_mmxext(uint8_t *src, const uint8_t *topright, int stride)
;-----------------------------------------------------------------------------
%macro PRED4x4_TM 0
cglobal pred4x4_tm_vp8_8, 3,6
sub r0, r2
pxor mm7, mm7
movd mm0, [r0]
punpcklbw mm0, mm7
movzx r4d, byte [r0-1]
mov r5d, 2
.loop:
movzx r1d, byte [r0+r2*1-1]
movzx r3d, byte [r0+r2*2-1]
sub r1d, r4d
sub r3d, r4d
movd mm2, r1d
movd mm4, r3d
%if cpuflag(mmxext)
pshufw mm2, mm2, 0
pshufw mm4, mm4, 0
%else
punpcklwd mm2, mm2
punpcklwd mm4, mm4
punpckldq mm2, mm2
punpckldq mm4, mm4
%endif
paddw mm2, mm0
paddw mm4, mm0
packuswb mm2, mm2
packuswb mm4, mm4
movd [r0+r2*1], mm2
movd [r0+r2*2], mm4
lea r0, [r0+r2*2]
dec r5d
jg .loop
REP_RET
%endmacro
INIT_MMX mmx
PRED4x4_TM
INIT_MMX mmxext
PRED4x4_TM
INIT_XMM ssse3
cglobal pred4x4_tm_vp8_8, 3,3
sub r0, r2
movq mm6, [tm_shuf]
pxor mm1, mm1
movd mm0, [r0]
punpcklbw mm0, mm1
movd mm7, [r0-4]
pshufb mm7, mm6
lea r1, [r0+r2*2]
movd mm2, [r0+r2*1-4]
movd mm3, [r0+r2*2-4]
movd mm4, [r1+r2*1-4]
movd mm5, [r1+r2*2-4]
pshufb mm2, mm6
pshufb mm3, mm6
pshufb mm4, mm6
pshufb mm5, mm6
psubw mm2, mm7
psubw mm3, mm7
psubw mm4, mm7
psubw mm5, mm7
paddw mm2, mm0
paddw mm3, mm0
paddw mm4, mm0
paddw mm5, mm0
packuswb mm2, mm2
packuswb mm3, mm3
packuswb mm4, mm4
packuswb mm5, mm5
movd [r0+r2*1], mm2
movd [r0+r2*2], mm3
movd [r1+r2*1], mm4
movd [r1+r2*2], mm5
RET
;-----------------------------------------------------------------------------
; void pred4x4_vertical_vp8_8_mmxext(uint8_t *src, const uint8_t *topright, int stride)
;-----------------------------------------------------------------------------
INIT_MMX mmxext
cglobal pred4x4_vertical_vp8_8, 3,3
sub r0, r2
movd m1, [r0-1]
movd m0, [r0]
mova m2, m0 ;t0 t1 t2 t3
punpckldq m0, [r1] ;t0 t1 t2 t3 t4 t5 t6 t7
lea r1, [r0+r2*2]
psrlq m0, 8 ;t1 t2 t3 t4
PRED4x4_LOWPASS m3, m1, m0, m2, m4
movd [r0+r2*1], m3
movd [r0+r2*2], m3
movd [r1+r2*1], m3
movd [r1+r2*2], m3
RET
;-----------------------------------------------------------------------------
; void pred4x4_down_left_8_mmxext(uint8_t *src, const uint8_t *topright, int stride)
;-----------------------------------------------------------------------------
INIT_MMX mmxext
cglobal pred4x4_down_left_8, 3,3
sub r0, r2
movq m1, [r0]
punpckldq m1, [r1]
movq m2, m1
movq m3, m1
psllq m1, 8
pxor m2, m1
psrlq m2, 8
pxor m2, m3
PRED4x4_LOWPASS m0, m1, m2, m3, m4
lea r1, [r0+r2*2]
psrlq m0, 8
movd [r0+r2*1], m0
psrlq m0, 8
movd [r0+r2*2], m0
psrlq m0, 8
movd [r1+r2*1], m0
psrlq m0, 8
movd [r1+r2*2], m0
RET
;-----------------------------------------------------------------------------
; void pred4x4_vertical_left_8_mmxext(uint8_t *src, const uint8_t *topright, int stride)
;-----------------------------------------------------------------------------
INIT_MMX mmxext
cglobal pred4x4_vertical_left_8, 3,3
sub r0, r2
movq m1, [r0]
punpckldq m1, [r1]
movq m3, m1
movq m2, m1
psrlq m3, 8
psrlq m2, 16
movq m4, m3
pavgb m4, m1
PRED4x4_LOWPASS m0, m1, m2, m3, m5
lea r1, [r0+r2*2]
movh [r0+r2*1], m4
movh [r0+r2*2], m0
psrlq m4, 8
psrlq m0, 8
movh [r1+r2*1], m4
movh [r1+r2*2], m0
RET
;-----------------------------------------------------------------------------
; void pred4x4_horizontal_up_8_mmxext(uint8_t *src, const uint8_t *topright, int stride)
;-----------------------------------------------------------------------------
INIT_MMX mmxext
cglobal pred4x4_horizontal_up_8, 3,3
sub r0, r2
lea r1, [r0+r2*2]
movd m0, [r0+r2*1-4]
punpcklbw m0, [r0+r2*2-4]
movd m1, [r1+r2*1-4]
punpcklbw m1, [r1+r2*2-4]
punpckhwd m0, m1
movq m1, m0
punpckhbw m1, m1
pshufw m1, m1, 0xFF
punpckhdq m0, m1
movq m2, m0
movq m3, m0
movq m7, m0
psrlq m2, 16
psrlq m3, 8
pavgb m7, m3
PRED4x4_LOWPASS m4, m0, m2, m3, m5
punpcklbw m7, m4
movd [r0+r2*1], m7
psrlq m7, 16
movd [r0+r2*2], m7
psrlq m7, 16
movd [r1+r2*1], m7
movd [r1+r2*2], m1
RET
;-----------------------------------------------------------------------------
; void pred4x4_horizontal_down_8_mmxext(uint8_t *src, const uint8_t *topright, int stride)
;-----------------------------------------------------------------------------
INIT_MMX mmxext
cglobal pred4x4_horizontal_down_8, 3,3
sub r0, r2
lea r1, [r0+r2*2]
movh m0, [r0-4] ; lt ..
punpckldq m0, [r0] ; t3 t2 t1 t0 lt .. .. ..
psllq m0, 8 ; t2 t1 t0 lt .. .. .. ..
movd m1, [r1+r2*2-4] ; l3
punpcklbw m1, [r1+r2*1-4] ; l2 l3
movd m2, [r0+r2*2-4] ; l1
punpcklbw m2, [r0+r2*1-4] ; l0 l1
punpckhwd m1, m2 ; l0 l1 l2 l3
punpckhdq m1, m0 ; t2 t1 t0 lt l0 l1 l2 l3
movq m0, m1
movq m2, m1
movq m5, m1
psrlq m0, 16 ; .. .. t2 t1 t0 lt l0 l1
psrlq m2, 8 ; .. t2 t1 t0 lt l0 l1 l2
pavgb m5, m2
PRED4x4_LOWPASS m3, m1, m0, m2, m4
punpcklbw m5, m3
psrlq m3, 32
PALIGNR m3, m5, 6, m4
movh [r1+r2*2], m5
psrlq m5, 16
movh [r1+r2*1], m5
psrlq m5, 16
movh [r0+r2*2], m5
movh [r0+r2*1], m3
RET
;-----------------------------------------------------------------------------
; void pred4x4_vertical_right_8_mmxext(uint8_t *src, const uint8_t *topright, int stride)
;-----------------------------------------------------------------------------
INIT_MMX mmxext
cglobal pred4x4_vertical_right_8, 3,3
sub r0, r2
lea r1, [r0+r2*2]
movh m0, [r0] ; ........t3t2t1t0
movq m5, m0
PALIGNR m0, [r0-8], 7, m1 ; ......t3t2t1t0lt
pavgb m5, m0
PALIGNR m0, [r0+r2*1-8], 7, m1 ; ....t3t2t1t0ltl0
movq m1, m0
PALIGNR m0, [r0+r2*2-8], 7, m2 ; ..t3t2t1t0ltl0l1
movq m2, m0
PALIGNR m0, [r1+r2*1-8], 7, m3 ; t3t2t1t0ltl0l1l2
PRED4x4_LOWPASS m3, m1, m0, m2, m4
movq m1, m3
psrlq m3, 16
psllq m1, 48
movh [r0+r2*1], m5
movh [r0+r2*2], m3
PALIGNR m5, m1, 7, m2
psllq m1, 8
movh [r1+r2*1], m5
PALIGNR m3, m1, 7, m1
movh [r1+r2*2], m3
RET
;-----------------------------------------------------------------------------
; void pred4x4_down_right_8_mmxext(uint8_t *src, const uint8_t *topright, int stride)
;-----------------------------------------------------------------------------
INIT_MMX mmxext
cglobal pred4x4_down_right_8, 3,3
sub r0, r2
lea r1, [r0+r2*2]
movq m1, [r1-8]
movq m2, [r0+r2*1-8]
punpckhbw m2, [r0-8]
movh m3, [r0]
punpckhwd m1, m2
PALIGNR m3, m1, 5, m1
movq m1, m3
PALIGNR m3, [r1+r2*1-8], 7, m4
movq m2, m3
PALIGNR m3, [r1+r2*2-8], 7, m4
PRED4x4_LOWPASS m0, m3, m1, m2, m4
movh [r1+r2*2], m0
psrlq m0, 8
movh [r1+r2*1], m0
psrlq m0, 8
movh [r0+r2*2], m0
psrlq m0, 8
movh [r0+r2*1], m0
RET
| 25.880503 | 95 | 0.460553 |
11416b090ceec38b1532e567ef41ce6539631c37 | 749 | asm | Assembly | oeis/126/A126986.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/126/A126986.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/126/A126986.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A126986: Expansion of 1/(1+4*x*c(x)), c(x) the g.f. of Catalan numbers A000108.
; Submitted by Christian Krause
; 1,-4,12,-40,124,-408,1272,-4176,13020,-42808,133096,-439344,1358872,-4514800,13853040,-46469280,140945820,-479312760,1430085000,-4958382960,14453014920,-51500944080,145230007440,-537922074720,1446902948184,-5662012752048,14228883685392,-60226310250976,137097352070320,-649709888025312,1277277868359904,-7139278380425536,11209981985980188,-80299194256775160,87088517291886024,-929038489053819888,479894769046382632,-11103501969636787216,-1229437156859674800,-137452891327654401760
mov $4,$0
add $0,1
lpb $0
sub $0,1
mov $3,$4
bin $3,$1
add $1,1
add $3,$2
mul $2,2
mul $3,6
sub $2,$3
add $4,1
lpe
mov $0,$3
div $0,6
| 37.45 | 481 | 0.76235 |
8225c6b03a0202703f23b02688ea1f5dda071ddc | 5,169 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0x84_notsx.log_21829_2923.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0x84_notsx.log_21829_2923.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0x84_notsx.log_21829_2923.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r9
push %rax
push %rbx
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_WC_ht+0x16975, %rbx
nop
nop
cmp %rax, %rax
mov $0x6162636465666768, %r10
movq %r10, %xmm3
vmovups %ymm3, (%rbx)
nop
nop
cmp %r9, %r9
lea addresses_UC_ht+0x156c5, %rsi
lea addresses_D_ht+0x12d95, %rdi
clflush (%rdi)
nop
nop
nop
nop
dec %rdx
mov $109, %rcx
rep movsw
nop
nop
nop
nop
nop
add $6286, %rsi
lea addresses_A_ht+0x17fb5, %r10
nop
nop
nop
nop
xor %rcx, %rcx
movl $0x61626364, (%r10)
nop
nop
nop
inc %r10
lea addresses_D_ht+0x1caa5, %rsi
lea addresses_D_ht+0x11d25, %rdi
clflush (%rdi)
nop
nop
inc %r10
mov $18, %rcx
rep movsw
nop
add $28071, %rdi
lea addresses_normal_ht+0x145e5, %r10
nop
nop
nop
cmp $28921, %rdx
mov (%r10), %si
nop
cmp $44286, %rcx
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbx
pop %rax
pop %r9
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r13
push %r15
push %rax
push %rcx
// Faulty Load
lea addresses_D+0x66c5, %rax
nop
nop
nop
add $61111, %rcx
mov (%rax), %r13
lea oracles, %r10
and $0xff, %r13
shlq $12, %r13
mov (%r10,%r13,1), %r13
pop %rcx
pop %rax
pop %r15
pop %r13
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'src': {'type': 'addresses_D', 'same': True, 'size': 16, 'congruent': 0, 'NT': False, 'AVXalign': True}, 'OP': 'LOAD'}
[Faulty Load]
{'src': {'type': 'addresses_D', 'same': True, 'size': 8, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'dst': {'type': 'addresses_WC_ht', 'same': True, 'size': 32, 'congruent': 4, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'src': {'type': 'addresses_UC_ht', 'congruent': 10, 'same': False}, 'dst': {'type': 'addresses_D_ht', 'congruent': 4, 'same': False}, 'OP': 'REPM'}
{'dst': {'type': 'addresses_A_ht', 'same': False, 'size': 4, 'congruent': 4, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'src': {'type': 'addresses_D_ht', 'congruent': 5, 'same': False}, 'dst': {'type': 'addresses_D_ht', 'congruent': 4, 'same': False}, 'OP': 'REPM'}
{'src': {'type': 'addresses_normal_ht', 'same': False, 'size': 2, 'congruent': 5, 'NT': False, 'AVXalign': True}, 'OP': 'LOAD'}
{'36': 21829}
36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36
*/
| 44.179487 | 2,999 | 0.66183 |
e26dc6cccbc41bebdbccc6c6d0bdb174b3870e9d | 133 | asm | Assembly | src/stack_top_win_x64.asm | znone/taskpp | 1c630e232041007cc6497d10f0c30a035663ca91 | [
"Apache-2.0"
] | 4 | 2019-03-14T01:47:53.000Z | 2020-06-24T10:48:54.000Z | src/stack_top_win_x64.asm | znone/taskpp | 1c630e232041007cc6497d10f0c30a035663ca91 | [
"Apache-2.0"
] | null | null | null | src/stack_top_win_x64.asm | znone/taskpp | 1c630e232041007cc6497d10f0c30a035663ca91 | [
"Apache-2.0"
] | null | null | null |
.CODE
?stack_top@this_task@taskpp@@YAPEAXXZ PROC
mov rax, rsp
add rax, 8
ret
?stack_top@this_task@taskpp@@YAPEAXXZ ENDP
END
| 12.090909 | 42 | 0.736842 |
46fe9d2aa7440bde5333d91187b84e5247bf6dd8 | 6,964 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i7-8650U_0xd2_notsx.log_21829_648.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i7-8650U_0xd2_notsx.log_21829_648.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i7-8650U_0xd2_notsx.log_21829_648.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r14
push %r9
push %rax
push %rbp
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_WC_ht+0x1851a, %rbp
nop
nop
cmp $48254, %r9
mov $0x6162636465666768, %rdx
movq %rdx, %xmm0
vmovups %ymm0, (%rbp)
nop
nop
nop
nop
nop
dec %r14
lea addresses_UC_ht+0x215a, %rax
nop
sub %r10, %r10
mov $0x6162636465666768, %r9
movq %r9, %xmm2
and $0xffffffffffffffc0, %rax
movaps %xmm2, (%rax)
nop
nop
and $33865, %rdx
lea addresses_D_ht+0x1d55a, %r14
nop
nop
nop
nop
sub %rsi, %rsi
mov $0x6162636465666768, %rax
movq %rax, (%r14)
xor $42325, %r10
lea addresses_A_ht+0xe89a, %rsi
lea addresses_D_ht+0x4c9a, %rdi
nop
nop
nop
nop
nop
cmp $64462, %rbp
mov $28, %rcx
rep movsb
nop
nop
nop
and %rcx, %rcx
lea addresses_WC_ht+0x209a, %rsi
lea addresses_normal_ht+0x3b14, %rdi
nop
nop
nop
nop
dec %r10
mov $55, %rcx
rep movsw
nop
nop
nop
sub $2114, %rdx
lea addresses_normal_ht+0x1769a, %rdi
nop
nop
nop
nop
xor %r14, %r14
mov $0x6162636465666768, %rcx
movq %rcx, %xmm0
and $0xffffffffffffffc0, %rdi
vmovntdq %ymm0, (%rdi)
nop
nop
cmp $49266, %r14
lea addresses_normal_ht+0xfe1a, %rsi
nop
nop
nop
nop
inc %rax
mov (%rsi), %r10d
nop
nop
nop
nop
nop
sub $45063, %rdi
lea addresses_normal_ht+0x35aa, %rbp
nop
nop
nop
nop
nop
and $54208, %rdx
vmovups (%rbp), %ymm5
vextracti128 $0, %ymm5, %xmm5
vpextrq $1, %xmm5, %rcx
nop
nop
xor %rax, %rax
lea addresses_A_ht+0x749a, %r14
nop
nop
nop
nop
add %rax, %rax
mov (%r14), %rdi
nop
nop
xor $30758, %rsi
lea addresses_UC_ht+0xf99a, %rsi
lea addresses_normal_ht+0x1389a, %rdi
nop
nop
nop
nop
nop
add $52652, %r14
mov $111, %rcx
rep movsb
nop
add %rax, %rax
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbp
pop %rax
pop %r9
pop %r14
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r8
push %r9
push %rax
push %rbp
push %rsi
// Store
lea addresses_WT+0x1a49a, %r9
nop
nop
nop
nop
cmp $11927, %r8
mov $0x5152535455565758, %rsi
movq %rsi, %xmm5
vmovups %ymm5, (%r9)
add %rbp, %rbp
// Faulty Load
lea addresses_A+0x18c9a, %r9
nop
nop
cmp %rsi, %rsi
mov (%r9), %r8
lea oracles, %rax
and $0xff, %r8
shlq $12, %r8
mov (%rax,%r8,1), %r8
pop %rsi
pop %rbp
pop %rax
pop %r9
pop %r8
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'type': 'addresses_A', 'size': 16, 'AVXalign': True, 'NT': True, 'congruent': 0, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WT', 'size': 32, 'AVXalign': False, 'NT': False, 'congruent': 11, 'same': False}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'type': 'addresses_A', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': True}}
<gen_prepare_buffer>
{'OP': 'STOR', 'dst': {'type': 'addresses_WC_ht', 'size': 32, 'AVXalign': False, 'NT': False, 'congruent': 7, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_UC_ht', 'size': 16, 'AVXalign': True, 'NT': False, 'congruent': 3, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_D_ht', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 5, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_A_ht', 'congruent': 4, 'same': False}, 'dst': {'type': 'addresses_D_ht', 'congruent': 6, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_WC_ht', 'congruent': 10, 'same': False}, 'dst': {'type': 'addresses_normal_ht', 'congruent': 1, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_normal_ht', 'size': 32, 'AVXalign': False, 'NT': True, 'congruent': 8, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_normal_ht', 'size': 4, 'AVXalign': True, 'NT': False, 'congruent': 4, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_normal_ht', 'size': 32, 'AVXalign': False, 'NT': False, 'congruent': 1, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_A_ht', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 11, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_UC_ht', 'congruent': 5, 'same': False}, 'dst': {'type': 'addresses_normal_ht', 'congruent': 8, 'same': False}}
{'35': 21829}
35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35
*/
| 34.305419 | 2,999 | 0.661976 |
5dfb1bace744182036361c4426647afc69aa2b48 | 373 | asm | Assembly | programs/oeis/070/A070383.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/070/A070383.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/070/A070383.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A070383: a(n) = 5^n mod 36.
; 1,5,25,17,13,29,1,5,25,17,13,29,1,5,25,17,13,29,1,5,25,17,13,29,1,5,25,17,13,29,1,5,25,17,13,29,1,5,25,17,13,29,1,5,25,17,13,29,1,5,25,17,13,29,1,5,25,17,13,29,1,5,25,17,13,29,1,5,25,17,13,29,1,5,25,17,13,29,1,5,25,17,13,29,1,5,25,17,13,29,1,5,25,17,13,29,1,5,25,17
mov $1,1
mov $2,$0
lpb $2
mul $1,5
mod $1,36
sub $2,1
lpe
mov $0,$1
| 31.083333 | 267 | 0.589812 |
61e5cc7a5afacfb0af774c323cfb00e36a2cf59b | 4,631 | asm | Assembly | Transynther/x86/_processed/NC/_zr_/i9-9900K_12_0xa0_notsx.log_21829_467.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NC/_zr_/i9-9900K_12_0xa0_notsx.log_21829_467.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NC/_zr_/i9-9900K_12_0xa0_notsx.log_21829_467.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r12
push %r8
push %r9
push %rcx
push %rdi
push %rsi
lea addresses_WT_ht+0x157cb, %r9
add $33486, %r12
vmovups (%r9), %ymm7
vextracti128 $0, %ymm7, %xmm7
vpextrq $0, %xmm7, %r11
nop
nop
nop
nop
sub $46967, %r12
lea addresses_A_ht+0x18778, %rcx
nop
nop
nop
add %rsi, %rsi
movb (%rcx), %r8b
nop
nop
nop
xor $57653, %rcx
pop %rsi
pop %rdi
pop %rcx
pop %r9
pop %r8
pop %r12
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r11
push %r12
push %r13
push %r8
push %r9
push %rsi
// Load
lea addresses_US+0xef4c, %r11
nop
nop
and %r9, %r9
vmovups (%r11), %ymm3
vextracti128 $0, %ymm3, %xmm3
vpextrq $1, %xmm3, %rsi
nop
nop
nop
nop
nop
add $62363, %r8
// Faulty Load
mov $0x4fc06f0000000ba4, %rsi
cmp %r12, %r12
mov (%rsi), %r8
lea oracles, %rsi
and $0xff, %r8
shlq $12, %r8
mov (%rsi,%r8,1), %r8
pop %rsi
pop %r9
pop %r8
pop %r13
pop %r12
pop %r11
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'src': {'type': 'addresses_NC', 'AVXalign': True, 'size': 16, 'NT': True, 'same': False, 'congruent': 0}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_US', 'AVXalign': False, 'size': 32, 'NT': False, 'same': False, 'congruent': 2}, 'OP': 'LOAD'}
[Faulty Load]
{'src': {'type': 'addresses_NC', 'AVXalign': False, 'size': 8, 'NT': False, 'same': True, 'congruent': 0}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'type': 'addresses_WT_ht', 'AVXalign': False, 'size': 32, 'NT': False, 'same': False, 'congruent': 0}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_A_ht', 'AVXalign': False, 'size': 1, 'NT': False, 'same': False, 'congruent': 2}, 'OP': 'LOAD'}
{'00': 21829}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
| 49.265957 | 2,999 | 0.658173 |
4e79be876c02d34986d5c5a10cd873e9b24ee728 | 97 | asm | Assembly | lab3_test_harness/test/state_data_in/15.asm | Zaydax/PipelineProcessor | f45f7d1a245f291218d53a7f16fd7f98a50ce47e | [
"MIT"
] | 2 | 2017-03-05T17:40:26.000Z | 2017-03-15T01:41:25.000Z | lab3_test_harness/test/state_data_in/15.asm | Zaydax/PipelineProcessor | f45f7d1a245f291218d53a7f16fd7f98a50ce47e | [
"MIT"
] | null | null | null | lab3_test_harness/test/state_data_in/15.asm | Zaydax/PipelineProcessor | f45f7d1a245f291218d53a7f16fd7f98a50ce47e | [
"MIT"
] | null | null | null | .ORIG x1234
STB R7, R6, x4
STB R7, R6, x4
STB R7, R6, x4
STB R7, R6, x4
STB R7, R6, x4
.END
| 12.125 | 15 | 0.587629 |
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