README.md

---
pretty_name: "ComBack"
language: 
  - code
pipeline_tag: Compiler Backend
tags:
  - C++/C Code
  - Compiler Backend
license: "cc-by-4.0"
configs:
- config_name: Statement-Level Completion
  data_files :
    - split: train
      path: Code_Completion/Statement_Level/train*
    - split: validation
      path: Code_Completion/Statement_Level/valid*
    - split: test
      path: Code_Completion/Statement_Level/test*
- config_name: Next-Statement Suggestion
  data_files :
    - split: train
      path: Code_Completion/Next_Statement_Level/train*
    - split: validation
      path: Code_Completion/Next_Statement_Level/valid*
    - split: test
      path: Code_Completion/Next_Statement_Level/test*
- config_name: Code Generation
  - split: train
      path: Code_Generation/train*
  - split: validation
      path: Code_Generation/valid*
  - split: test
      path: Code_Generation/test*
---


# ComBack: A Versatile Dataset for Enhancing Compiler Backend Development Efficiency

ComBack is a large-scale multi-platform compiler backend code dataset. It is sourced from GCC and LLVM backends corresponding  to 178 target platforms.
  
## Dataset Information

- Source Data
  - GCC

  | Category | Target Platform | Function | KLoC |
  | ---- | ---- | ---- | ---- |
  | CPU | 30 | 35,147  | 647.2 |
  | MPU | 33 | 6,010   | 183.9 |
  | GPU | 2 | 457  | 11.2 |
  | VLIW | 5 | 959  | 25.4 |
  | DSP | 3 | 399  | 9.6 |
  | Virtual | 4 | 327  | 6.5 |
  | **SUM** | **77** | **43,299**  | **883.7** |


  - LLVM

  | Category | Target Platform | Function | KLoC |
  | ---- | ---- | ---- | ---- |
  | CPU | 43 | 84,914  | 3,450.4 |
  | MPU | 30 | 11,311   | 173.0 |
  | GPU | 5 | 22,591  | 768.3 |
  | VLIW | 4 | 2,048  | 24.3 |
  | DSP | 7 | 9,646  | 263.2 |
  | Virtual | 12 |  8,430  | 168.3 |
  | **SUM** | **101** | **138,940**  | **4,847.5** |


- Tasks
  - Statement-Level Completion: complete current statement.
  ```c++
  //Inputs:
  ...
  adjustReg(MBB,LastFrameDestroy, DL, SPReg, FPReg, -StackSize+RVFI->getVarArgsSaveSize() 
  //Ground Truth:
  MachineInstr::FrameDestroy);
  ```

  - Next-Statement Suggestion: predict the next statement.

   ```c++
  //Inputs:
  ...
  maxCallFrameSize = (maxCallFrameSize + AlignMask) & ~AlignMask;
  //Ground Truth:
  MFI -> setMaxCallFrameSize(maxCallFrameSize);
  ```


  - Code Generation: generate a function with function description in natrual language.

   ```c++
  //Inputs:
  getPointerRegClass: Returns a TargetRegisterClass used for pointer values.
  Target-Specific Value: Sparc, SP::I64RegsRegClass, SP::IntRegsRegClass.
  //Ground Truth:
  TargetRegisterClass *SparcRegisterInfo::getPointerRegClass(MachineFunction &MF ,unsigned Kind) {
      return Subtarget.is64Bit() ? &SP::I64RegsRegClass : &SP::IntRegsRegClass;
  }
  ```

## Organization

- `Code_Generation/*` and `Code_Completion/*`: **split data of 178 backends into train/valid/test set in the ratio of 80%:10%:10%**
  
  | Task | Train | Valid | Test |
  | ---- | ---- | ---- | ---- |
  | Statement-Level Comp. | 128,899(11.36M Token) | 16,112(1.43M Token)  | 16,113(1.43M Token) |
  | Next-Statement Sugg. | 173,052(15.69M Token) | 21,631(1.99M Token)   | 21,632(1.98M Token) |
  | Code Generation. | 36,236(5.10M Token) | 4,530(0.64M Token)  | 4,530(0.64M Token) |


- `New_Target_Generation/Existing_Types/*` and `New_Target_Completion/Existing_Types/*`: **Take data of RISC-V,ARC,NVPTX both in GCC and LLVM as test set, split train/valid set in the ratio of 85%:15% of other CPU, MPU and GPU targets excluding RI5CY(RI5CY is custmoized based on RISCV)**



  | Task | Train | Valid | Test |
  | ---- | ---- | ---- | ---- |
  | Statement-Level Comp. | 114,016(10.20M Token) | 20,121(1.81M Token)  | 6,645(0.58M Token) |
  | Next-Statement Sugg. | 152,114(14.10M Token) | 26,844(2.49M Token)   | 9,313(0.83M Token) |
  | Code Generation. | 30,633(4.44M Token) | 5,406(0.79M Token)  | 2,819(0.37M Token) |



- `New_Target_Generation/New_Types/*` and `New_Target_Completion/New_Types/*`: **Take data of ARC,NVPTX both in GCC and LLVM as test set, split train/valid set in the ratio of 85%:15% of other CPU targets excluding RI5CY(RI5CY is custmoized based on RISCV)**



  | Task | Train | Valid | Test |
  | ---- | ---- | ---- | ---- |
  | Statement-Level Comp. | 87,018(7.78M Token) | 15,357(1.37M Token)  | 2,764(0.26M Token) |
  | Next-Statement Sugg. | 113,684(10.65M Token) | 20,063(1.87M Token)   | 4,029(0.38M Token) |
  | Code Generation. | 21,184(3.14M Token) | 3,739(0.55M Token)  | 1,372(0.18M Token) |


- `Iterative_Expansion_Generation/*` and `Iterative_Expansion_Completion/*`: **Take data of RI5CY in LLVM as test set, split train/valid set in the ratio of 85%:15% of other CPU targets excluding RISC-V(a) and including RISC-V(b)**


  ##### (a)
    | Task | Train | Valid | Test |
    | ---- | ---- | ---- | ---- |
    | Statement-Level Comp. | 87,018(7.78M Token) | 15,357(1.37M Token)  | 721(0.04M Token) |
    | Next-Statement Sugg. | 113,684(10.65M Token) | 20,063(1.87M Token)   | 1,035(0.06M Token) |
    | Code Generation. | 21,184(3.14M Token) | 3,739(0.55M Token)  | 219(0.02M Token) |

  ##### (b)
    | Task | Train | Valid | Test |
    | ---- | ---- | ---- | ---- |
    | Statement-Level Comp. | 90,316(8.06M Token) | 15,940(1.42M Token)  | 721(0.04M Token) |
    | Next-Statement Sugg. | 118,175(11.04M Token) | 20,856(1.94M Token)   | 1,035(0.06M Token) |
    | Code Generation. | 22,413(3.30M Token) | 3,957(0.58M Token)  | 219(0.02M Token) |