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timestamp[ns]date 2016-08-12 09:31:09
2023-09-06 10:45:07
| revision_date
timestamp[ns]date 2010-09-28 14:01:40
2023-09-06 06:22:19
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timestamp[ns]date 2010-09-28 14:01:40
2023-09-06 06:22:19
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int64 426
681M
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timestamp[ns]date 2012-06-28 18:51:49
2023-09-14 21:59:16
⌀ | gha_created_at
timestamp[ns]date 2008-02-11 22:55:26
2023-08-10 11:14:58
⌀ | gha_language
stringclasses 147
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stringclasses 26
values | language
stringclasses 2
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int64 6
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stringlengths 6
10.2M
|
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
9fd488790d110e3380fe1b8e0ebe927f34d5f475
|
5e4913b3d7b6dfd9f35d9e5f24486bb6b6145125
|
/src/plugins/desktop/testmod_desktop.c
|
f9794340823aaecb29c68bd52e4ee1cbd03a023f
|
[
"BSD-3-Clause"
] |
permissive
|
ElektraInitiative/libelektra
|
ff5d5cfc4bf91d704f58405b14ea694aad3a2edd
|
dbbe4ae4f669c322a8f95f59112d3f5fc370bbd9
|
refs/heads/master
| 2023-08-05T14:54:48.081359
| 2023-08-04T12:40:00
| 2023-08-04T12:40:00
| 21,063,580
| 215
| 170
|
BSD-3-Clause
| 2023-09-07T13:34:30
| 2014-06-21T08:01:04
|
C
|
UTF-8
|
C
| false
| false
| 2,086
|
c
|
testmod_desktop.c
|
/**
* @file
*
* @brief
*
* @copyright BSD License (see LICENSE.md or https://www.libelektra.org)
*/
#ifdef HAVE_KDBCONFIG_H
#include "kdbconfig.h"
#endif
#include <stdio.h>
#ifdef HAVE_STDLIB_H
#include <stdlib.h>
#endif
#ifdef HAVE_STRING_H
#include <string.h>
#endif
#include <tests_plugin.h>
const char DE_ENV[] = "XDG_CURRENT_DESKTOP";
const char TEST_DE[] = "this_is_a_test_de";
const char NEW_DE[] = "this_is_another_test_de";
extern char ** environ;
void test_desktop (void)
{
setenv (DE_ENV, TEST_DE, 1);
Key * parentKey = keyNew ("user:/tests/desktop", KEY_END);
KeySet * keys = ksNew (0, KS_END);
KeySet * conf = 0;
PLUGIN_OPEN ("desktop")
succeed_if (plugin->kdbGet (plugin, keys, parentKey) == 1, "could not call kdbGet");
printf ("test if desktop key exists\n");
succeed_if (ksGetSize (keys) == 1, "size not correct");
Key const * result = ksLookupByName (keys, "user:/tests/desktop", 0);
succeed_if (result, "desktop key not found");
printf ("test if desktop environment is the one from the ENV\n");
succeed_if (strcmp (keyString (result), TEST_DE) == 0, "got wrong desktop environment");
printf ("set the desktop environment via the plugin\n");
keySetString (parentKey, NEW_DE);
succeed_if (plugin->kdbSet (plugin, keys, parentKey) == 0, "something changed in the keyset") result =
ksLookupByName (keys, "user:/tests/desktop", 0);
succeed_if (result, "desktop key not found");
succeed_if (strcmp (keyString (result), TEST_DE) == 0, "kdb set overwrote the desktop environment");
printf ("clear all variables to test \"no desktop\"\n");
environ = NULL;
ksDel (keys);
keys = ksNew (0, KS_END);
plugin->kdbGet (plugin, keys, parentKey);
Key const * emptyResult = ksLookupByName (keys, "user:/tests/desktop", 0);
succeed_if (!emptyResult, "a desktop key was found");
ksDel (keys);
keyDel (parentKey);
PLUGIN_CLOSE ();
}
int main (int argc, char ** argv)
{
printf ("DESKTOP TESTS\n");
printf ("==================\n\n");
init (argc, argv);
test_desktop ();
print_result ("testmod_desktop");
return nbError;
}
|
0f815d6daae4d3b80019209da7fed9b29cbaf853
|
eecd5e4c50d8b78a769bcc2675250576bed34066
|
/src/vec/is/is/interface/isregall.c
|
9d8d3bab9866aa6c7defbc7c561370b4310e961c
|
[
"BSD-2-Clause"
] |
permissive
|
petsc/petsc
|
3b1a04fea71858e0292f9fd4d04ea11618c50969
|
9c5460f9064ca60dd71a234a1f6faf93e7a6b0c9
|
refs/heads/main
| 2023-08-17T20:51:16.507070
| 2023-08-17T16:08:06
| 2023-08-17T16:08:06
| 8,691,401
| 341
| 169
|
NOASSERTION
| 2023-03-29T11:02:58
| 2013-03-10T20:55:21
|
C
|
UTF-8
|
C
| false
| false
| 746
|
c
|
isregall.c
|
#include <petsc/private/isimpl.h> /*I "petscis.h" I*/
PETSC_INTERN PetscErrorCode ISCreate_General(IS);
PETSC_INTERN PetscErrorCode ISCreate_Stride(IS);
PETSC_INTERN PetscErrorCode ISCreate_Block(IS);
/*@C
ISRegisterAll - Registers all of the index set components in the `IS` package.
Not Collective
Level: advanced
.seealso: [](sec_scatter), `IS`, `ISType`, `ISRegister()`
@*/
PetscErrorCode ISRegisterAll(void)
{
PetscFunctionBegin;
if (ISRegisterAllCalled) PetscFunctionReturn(PETSC_SUCCESS);
ISRegisterAllCalled = PETSC_TRUE;
PetscCall(ISRegister(ISGENERAL, ISCreate_General));
PetscCall(ISRegister(ISSTRIDE, ISCreate_Stride));
PetscCall(ISRegister(ISBLOCK, ISCreate_Block));
PetscFunctionReturn(PETSC_SUCCESS);
}
|
9863dc0f7927c2235fa7c38bb1fdbbd5e57f2e78
|
c7c73566784a7896100e993606e1bd8fdd0ea94e
|
/panda/src/nativenet/time_general.h
|
5fac081a322cf2903c50e9dd87bec04856733e02
|
[
"BSD-3-Clause",
"BSD-2-Clause"
] |
permissive
|
panda3d/panda3d
|
c3f94df2206ff7cfe4a3b370777a56fb11a07926
|
160ba090a5e80068f61f34fc3d6f49dbb6ad52c5
|
refs/heads/master
| 2023-08-21T13:23:16.904756
| 2021-04-11T22:55:33
| 2023-08-06T06:09:32
| 13,212,165
| 4,417
| 1,072
|
NOASSERTION
| 2023-09-09T19:26:14
| 2013-09-30T10:20:25
|
C++
|
UTF-8
|
C
| false
| false
| 1,866
|
h
|
time_general.h
|
#ifndef __TIME_GENERAL_H__
#define __TIME_GENERAL_H__
Time_Span TimeDifference(const Time_Clock &time1, const Time_Clock &time2);
Time_Clock TimeDifference(const Time_Clock &time1, const Time_Span &Time_Span);
Time_Clock TimeAddition(const Time_Clock &time1, Time_Span &Time_Span);
Time_Clock operator+(const Time_Clock &tm, const Time_Span &ts);
Time_Clock operator-(const Time_Clock &tm, const Time_Span &ts);
/**
*
*/
inline Time_Span TimeDifference(const Time_Clock &time1, const Time_Clock &time2) {
timeval ans;
TimeDif(time2.GetTval(), time1.GetTval(), ans);
return Time_Span(ans);
}
/**
*
*/
inline Time_Clock TimeDifference(const Time_Clock &time1, const Time_Span &Time_Span) {
timeval ans;
TimeDif(Time_Span.GetTval(), time1.GetTval(), ans);
return Time_Clock(ans);
}
/**
*
*/
inline Time_Clock TimeAddition(const Time_Clock &time1, Time_Span &Time_Span)
{
timeval ans;
TimeAdd(time1.GetTval(), Time_Span.GetTval(), ans);
return Time_Clock(ans);
}
/**
*
*/
inline const Time_Clock &Time_Clock::operator+=(const Time_Span &Time_Span) {
_my_time.tv_usec += Time_Span._my_time.tv_usec;
_my_time.tv_sec += Time_Span._my_time.tv_sec;
NormalizeTime(_my_time);
return *this;
}
/**
*
*/
inline Time_Clock operator+(const Time_Clock &tm, const Time_Span &ts) {
Time_Clock work(tm);
work += ts;
return work;
}
/**
*
*/
inline Time_Clock operator-(const Time_Clock &tm, const Time_Span &ts) {
return TimeDifference(tm, ts);
}
/**
*
*/
inline const Time_Clock& Time_Clock::operator-=(const Time_Span &Time_Span) {
_my_time.tv_usec -= Time_Span._my_time.tv_usec;
_my_time.tv_sec -= Time_Span._my_time.tv_sec;
NormalizeTime(_my_time);
return *this;
}
/**
*
*/
inline Time_Span operator-(const Time_Clock &tm1, const Time_Clock &tm2) {
return TimeDifference(tm1, tm2);
}
#endif //__TIME_GENERAL_H__
|
a2d107a68613a3259868b7561ca227c21fe3bcff
|
2898fa4f2ad766afa0495a837f59fe95daa081a7
|
/tests/unit-fail/j049a.c
|
9eb70b13212197397ce384e916f79e83b4ade550
|
[
"NCSA"
] |
permissive
|
kframework/c-semantics
|
12fcc1b1bf1f7792636d1c37f6f7bb1b89a392b5
|
e6879d14455771aa0cb3e3d201131d4d763a73a2
|
refs/heads/master
| 2023-07-31T23:57:03.316456
| 2022-02-01T17:50:31
| 2022-02-01T17:50:31
| 11,747,541
| 312
| 52
|
NOASSERTION
| 2022-02-01T17:50:33
| 2013-07-29T19:13:25
|
C
|
UTF-8
|
C
| false
| false
| 75
|
c
|
j049a.c
|
int main(void) {
int a[4][5] = {0};
a[1][7];
return 0;
}
|
0a61a634ed869c0df75ffa515fc4f122a30c81b7
|
79d343002bb63a44f8ab0dbac0c9f4ec54078c3a
|
/lib/libc/include/sparc-linux-gnu/bits/setjmp.h
|
e7c1964e13634b345cea4b2d8948a09fcd06d317
|
[
"MIT"
] |
permissive
|
ziglang/zig
|
4aa75d8d3bcc9e39bf61d265fd84b7f005623fc5
|
f4c9e19bc3213c2bc7e03d7b06d7129882f39f6c
|
refs/heads/master
| 2023-08-31T13:16:45.980913
| 2023-08-31T05:50:29
| 2023-08-31T05:50:29
| 40,276,274
| 25,560
| 2,399
|
MIT
| 2023-09-14T21:09:50
| 2015-08-06T00:51:28
|
Zig
|
UTF-8
|
C
| false
| false
| 1,818
|
h
|
setjmp.h
|
/* Copyright (C) 1997-2021 Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
<https://www.gnu.org/licenses/>. */
#ifndef _BITS_SETJMP_H
#define _BITS_SETJMP_H 1
#if !defined _SETJMP_H && !defined _PTHREAD_H
# error "Never include <bits/setjmp.h> directly; use <setjmp.h> instead."
#endif
#include <bits/wordsize.h>
#if __WORDSIZE == 64
#ifndef _ASM
typedef struct __sparc64_jmp_buf
{
struct __sparc64_jmp_buf *__uc_link;
unsigned long __uc_flags;
unsigned long __uc_sigmask;
struct __sparc64_jmp_buf_mcontext
{
unsigned long __mc_gregs[19];
unsigned long __mc_fp;
unsigned long __mc_i7;
struct __sparc64_jmp_buf_fpu
{
union
{
unsigned int __sregs[32];
unsigned long __dregs[32];
long double __qregs[16];
} __mcfpu_fpregs;
unsigned long __mcfpu_fprs;
unsigned long __mcfpu_gsr;
void *__mcfpu_fq;
unsigned char __mcfpu_qcnt;
unsigned char __mcfpu_qentsz;
unsigned char __mcfpu_enab;
} __mc_fpregs;
} __uc_mcontext;
} __jmp_buf[1];
#endif
#else
#ifndef _ASM
typedef int __jmp_buf[3];
#endif
#endif
#endif /* bits/setjmp.h */
|
ef15c49a7ff1d530d4da32778c6cf783b3fb2581
|
fdbb74a95924e2677466614f6ab6e2bb13b2a95a
|
/test/libc/tinymath/asin_test.c
|
f12c22f7994e06ffb5ca33aab347a618f5cf47a1
|
[
"ISC"
] |
permissive
|
jart/cosmopolitan
|
fb11b5658939023977060a7c6c71a74093d9cb44
|
0d748ad58e1063dd1f8560f18a0c75293b9415b7
|
refs/heads/master
| 2023-09-06T09:17:29.303607
| 2023-09-02T03:49:13
| 2023-09-02T03:50:18
| 272,457,606
| 11,887
| 435
|
ISC
| 2023-09-14T17:47:58
| 2020-06-15T14:16:13
|
C
|
UTF-8
|
C
| false
| false
| 3,156
|
c
|
asin_test.c
|
/*-*- mode:c;indent-tabs-mode:nil;c-basic-offset:2;tab-width:8;coding:utf-8 -*-│
│vi: set net ft=c ts=2 sts=2 sw=2 fenc=utf-8 :vi│
╞══════════════════════════════════════════════════════════════════════════════╡
│ Copyright 2021 Justine Alexandra Roberts Tunney │
│ │
│ Permission to use, copy, modify, and/or distribute this software for │
│ any purpose with or without fee is hereby granted, provided that the │
│ above copyright notice and this permission notice appear in all copies. │
│ │
│ THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL │
│ WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED │
│ WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE │
│ AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL │
│ DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR │
│ PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER │
│ TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR │
│ PERFORMANCE OF THIS SOFTWARE. │
╚─────────────────────────────────────────────────────────────────────────────*/
#include "libc/math.h"
#include "libc/mem/gc.h"
#include "libc/stdio/rand.h"
#include "libc/testlib/ezbench.h"
#include "libc/testlib/testlib.h"
#include "libc/x/xasprintf.h"
double asin_(double) asm("asin");
#define asin asin_
TEST(asin, test) {
EXPECT_STREQ("0", _gc(xasprintf("%.15g", asin(0.))));
EXPECT_STREQ("-0", _gc(xasprintf("%.15g", asin(-0.))));
EXPECT_STREQ("0.523598775598299", _gc(xasprintf("%.15g", asin(.5))));
EXPECT_STREQ("-0.523598775598299", _gc(xasprintf("%.15g", asin(-.5))));
EXPECT_STREQ("1.5707963267949", _gc(xasprintf("%.15g", asin(1.))));
EXPECT_STREQ("-1.5707963267949", _gc(xasprintf("%.15g", asin(-1.))));
EXPECT_TRUE(isnan(asin(1.5)));
EXPECT_TRUE(isnan(asin(-1.5)));
EXPECT_TRUE(isnan(asin(NAN)));
EXPECT_TRUE(isnan(asin(-NAN)));
EXPECT_TRUE(isnan(asin(INFINITY)));
EXPECT_TRUE(isnan(asin(-INFINITY)));
EXPECT_STREQ("2.2250738585072e-308",
_gc(xasprintf("%.15g", asin(__DBL_MIN__))));
EXPECT_TRUE(isnan(asin(__DBL_MAX__)));
}
BENCH(asinl, bench) {
double _asin(double) asm("asin");
float _asinf(float) asm("asinf");
long double _asinl(long double) asm("asinl");
EZBENCH2("-asin", donothing, _asin(.7)); /* ~16ns */
EZBENCH2("-asinf", donothing, _asinf(.7)); /* ~12ns */
EZBENCH2("-asinl", donothing, _asinl(.7)); /* ~39ns */
}
|
2b5a1340f08d008c00e11b77a12a2a1d5aec4e62
|
28d0f8c01599f8f6c711bdde0b59f9c2cd221203
|
/sys/arch/atari/atari/be_bus.c
|
efe168f3b3bf1dcf90cc57ad4fe1dd0cb1de33f6
|
[] |
no_license
|
NetBSD/src
|
1a9cbc22ed778be638b37869ed4fb5c8dd616166
|
23ee83f7c0aea0777bd89d8ebd7f0cde9880d13c
|
refs/heads/trunk
| 2023-08-31T13:24:58.105962
| 2023-08-27T15:50:47
| 2023-08-27T15:50:47
| 88,439,547
| 656
| 348
| null | 2023-07-20T20:07:24
| 2017-04-16T20:03:43
| null |
UTF-8
|
C
| false
| false
| 18,408
|
c
|
be_bus.c
|
/* $NetBSD: be_bus.c,v 1.18 2023/01/06 10:28:27 tsutsui Exp $ */
/*-
* Copyright (c) 1998 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Leo Weppelman.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: be_bus.c,v 1.18 2023/01/06 10:28:27 tsutsui Exp $");
#include <sys/types.h>
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/kmem.h>
#include <machine/cpu.h>
#include <sys/bus.h>
/*
* This file contains the common functions for using a big endian (linear)
* bus on a big endian atari.
*/
/* Autoconf detection stuff */
static int beb_bus_space_peek_1(bus_space_tag_t,
bus_space_handle_t, bus_size_t);
static int beb_bus_space_peek_2(bus_space_tag_t,
bus_space_handle_t, bus_size_t);
static int beb_bus_space_peek_4(bus_space_tag_t,
bus_space_handle_t, bus_size_t);
static int beb_bus_space_peek_8(bus_space_tag_t,
bus_space_handle_t, bus_size_t);
/* read (single) */
static uint8_t beb_bus_space_read_1(bus_space_tag_t,
bus_space_handle_t, bus_size_t);
static uint16_t beb_bus_space_read_2(bus_space_tag_t,
bus_space_handle_t, bus_size_t);
static uint32_t beb_bus_space_read_4(bus_space_tag_t,
bus_space_handle_t, bus_size_t);
static uint64_t beb_bus_space_read_8(bus_space_tag_t,
bus_space_handle_t, bus_size_t);
/* write (single) */
static void beb_bus_space_write_1(bus_space_tag_t,
bus_space_handle_t, bus_size_t, uint8_t);
static void beb_bus_space_write_2(bus_space_tag_t,
bus_space_handle_t, bus_size_t, uint16_t);
static void beb_bus_space_write_4(bus_space_tag_t,
bus_space_handle_t, bus_size_t, uint32_t);
static void beb_bus_space_write_8(bus_space_tag_t,
bus_space_handle_t, bus_size_t, uint64_t);
/* read multiple */
static void beb_bus_space_read_multi_1(bus_space_tag_t,
bus_space_handle_t, bus_size_t, uint8_t *,
bus_size_t);
static void beb_bus_space_read_multi_2(bus_space_tag_t,
bus_space_handle_t, bus_size_t, uint16_t *,
bus_size_t);
static void beb_bus_space_read_multi_4(bus_space_tag_t,
bus_space_handle_t, bus_size_t, uint32_t *,
bus_size_t);
static void beb_bus_space_read_multi_8(bus_space_tag_t,
bus_space_handle_t, bus_size_t, uint64_t *,
bus_size_t);
/* write multiple */
static void beb_bus_space_write_multi_1(bus_space_tag_t,
bus_space_handle_t, bus_size_t,
const uint8_t *, bus_size_t);
static void beb_bus_space_write_multi_2(bus_space_tag_t,
bus_space_handle_t, bus_size_t,
const uint16_t *, bus_size_t);
static void beb_bus_space_write_multi_4(bus_space_tag_t,
bus_space_handle_t, bus_size_t,
const uint32_t *, bus_size_t);
static void beb_bus_space_write_multi_8(bus_space_tag_t,
bus_space_handle_t, bus_size_t,
const uint64_t *, bus_size_t);
/* read region */
static void beb_bus_space_read_region_1(bus_space_tag_t,
bus_space_handle_t, bus_size_t, uint8_t *,
bus_size_t);
static void beb_bus_space_read_region_2(bus_space_tag_t,
bus_space_handle_t, bus_size_t, uint16_t *,
bus_size_t);
static void beb_bus_space_read_region_4(bus_space_tag_t,
bus_space_handle_t, bus_size_t, uint32_t *,
bus_size_t);
static void beb_bus_space_read_region_8(bus_space_tag_t,
bus_space_handle_t, bus_size_t, uint64_t *,
bus_size_t);
/* read region */
static void beb_bus_space_write_region_1(bus_space_tag_t,
bus_space_handle_t, bus_size_t,
const uint8_t *, bus_size_t);
static void beb_bus_space_write_region_2(bus_space_tag_t,
bus_space_handle_t, bus_size_t,
const uint16_t *, bus_size_t);
static void beb_bus_space_write_region_4(bus_space_tag_t,
bus_space_handle_t, bus_size_t,
const uint32_t *, bus_size_t);
static void beb_bus_space_write_region_8(bus_space_tag_t,
bus_space_handle_t, bus_size_t,
const uint64_t *, bus_size_t);
/* set multi */
static void beb_bus_space_set_multi_1(bus_space_tag_t,
bus_space_handle_t, bus_size_t, uint8_t,
bus_size_t);
static void beb_bus_space_set_multi_2(bus_space_tag_t,
bus_space_handle_t, bus_size_t, uint16_t,
bus_size_t);
static void beb_bus_space_set_multi_4(bus_space_tag_t,
bus_space_handle_t, bus_size_t, uint32_t,
bus_size_t);
static void beb_bus_space_set_multi_8(bus_space_tag_t,
bus_space_handle_t, bus_size_t, uint64_t,
bus_size_t);
/* set region */
static void beb_bus_space_set_region_1(bus_space_tag_t,
bus_space_handle_t, bus_size_t, uint8_t,
bus_size_t);
static void beb_bus_space_set_region_2(bus_space_tag_t,
bus_space_handle_t, bus_size_t, uint16_t,
bus_size_t);
static void beb_bus_space_set_region_4(bus_space_tag_t,
bus_space_handle_t, bus_size_t, uint32_t,
bus_size_t);
static void beb_bus_space_set_region_8(bus_space_tag_t,
bus_space_handle_t, bus_size_t, uint64_t,
bus_size_t);
/*
* Don't force a function call overhead on these primitives...
*/
#define __read_1(h, o) *((volatile uint8_t *)((h) + (o)))
#define __read_2(h, o) *((volatile uint16_t *)((h) + (o)))
#define __read_4(h, o) *((volatile uint32_t *)((h) + (o)))
#define __read_8(h, o) *((volatile uint64_t *)((h) + (o)))
#define __write_1(h, o, v) *((volatile uint8_t *)((h) + (o))) = (v)
#define __write_2(h, o, v) *((volatile uint16_t *)((h) + (o))) = (v)
#define __write_4(h, o, v) *((volatile uint32_t *)((h) + (o))) = (v)
#define __write_8(h, o, v) *((volatile uint64_t *)((h) + (o))) = (v)
bus_space_tag_t
beb_alloc_bus_space_tag(bus_space_tag_t storage)
{
bus_space_tag_t beb_t;
/*
* Allow the caller to specify storage space for the tag. This
* is used during console config (when kmem_alloc() can't be used).
*/
if (storage != NULL)
beb_t = storage;
else {
beb_t = kmem_alloc(sizeof(*beb_t), KM_SLEEP);
}
memset(beb_t, 0, sizeof(*beb_t));
beb_t->abs_p_1 = beb_bus_space_peek_1;
beb_t->abs_p_2 = beb_bus_space_peek_2;
beb_t->abs_p_4 = beb_bus_space_peek_4;
beb_t->abs_p_8 = beb_bus_space_peek_8;
beb_t->abs_r_1 = beb_bus_space_read_1;
beb_t->abs_r_2 = beb_bus_space_read_2;
beb_t->abs_r_4 = beb_bus_space_read_4;
beb_t->abs_r_8 = beb_bus_space_read_8;
beb_t->abs_rs_1 = beb_bus_space_read_1;
beb_t->abs_rs_2 = beb_bus_space_read_2;
beb_t->abs_rs_4 = beb_bus_space_read_4;
beb_t->abs_rs_8 = beb_bus_space_read_8;
beb_t->abs_rm_1 = beb_bus_space_read_multi_1;
beb_t->abs_rm_2 = beb_bus_space_read_multi_2;
beb_t->abs_rm_4 = beb_bus_space_read_multi_4;
beb_t->abs_rm_8 = beb_bus_space_read_multi_8;
beb_t->abs_rms_1 = beb_bus_space_read_multi_1;
beb_t->abs_rms_2 = beb_bus_space_read_multi_2;
beb_t->abs_rms_4 = beb_bus_space_read_multi_4;
beb_t->abs_rms_8 = beb_bus_space_read_multi_8;
beb_t->abs_rr_1 = beb_bus_space_read_region_1;
beb_t->abs_rr_2 = beb_bus_space_read_region_2;
beb_t->abs_rr_4 = beb_bus_space_read_region_4;
beb_t->abs_rr_8 = beb_bus_space_read_region_8;
beb_t->abs_rrs_1 = beb_bus_space_read_region_1;
beb_t->abs_rrs_2 = beb_bus_space_read_region_2;
beb_t->abs_rrs_4 = beb_bus_space_read_region_4;
beb_t->abs_rrs_8 = beb_bus_space_read_region_8;
beb_t->abs_w_1 = beb_bus_space_write_1;
beb_t->abs_w_2 = beb_bus_space_write_2;
beb_t->abs_w_4 = beb_bus_space_write_4;
beb_t->abs_w_8 = beb_bus_space_write_8;
beb_t->abs_ws_1 = beb_bus_space_write_1;
beb_t->abs_ws_2 = beb_bus_space_write_2;
beb_t->abs_ws_4 = beb_bus_space_write_4;
beb_t->abs_ws_8 = beb_bus_space_write_8;
beb_t->abs_wm_1 = beb_bus_space_write_multi_1;
beb_t->abs_wm_2 = beb_bus_space_write_multi_2;
beb_t->abs_wm_4 = beb_bus_space_write_multi_4;
beb_t->abs_wm_8 = beb_bus_space_write_multi_8;
beb_t->abs_wms_1 = beb_bus_space_write_multi_1;
beb_t->abs_wms_2 = beb_bus_space_write_multi_2;
beb_t->abs_wms_4 = beb_bus_space_write_multi_4;
beb_t->abs_wms_8 = beb_bus_space_write_multi_8;
beb_t->abs_wr_1 = beb_bus_space_write_region_1;
beb_t->abs_wr_2 = beb_bus_space_write_region_2;
beb_t->abs_wr_4 = beb_bus_space_write_region_4;
beb_t->abs_wr_8 = beb_bus_space_write_region_8;
beb_t->abs_wrs_1 = beb_bus_space_write_region_1;
beb_t->abs_wrs_2 = beb_bus_space_write_region_2;
beb_t->abs_wrs_4 = beb_bus_space_write_region_4;
beb_t->abs_wrs_8 = beb_bus_space_write_region_8;
beb_t->abs_sm_1 = beb_bus_space_set_multi_1;
beb_t->abs_sm_2 = beb_bus_space_set_multi_2;
beb_t->abs_sm_4 = beb_bus_space_set_multi_4;
beb_t->abs_sm_8 = beb_bus_space_set_multi_8;
beb_t->abs_sr_1 = beb_bus_space_set_region_1;
beb_t->abs_sr_2 = beb_bus_space_set_region_2;
beb_t->abs_sr_4 = beb_bus_space_set_region_4;
beb_t->abs_sr_8 = beb_bus_space_set_region_8;
return beb_t;
}
/*
* The various access functions
*/
/*
* int bus_space_peek_N(bus_space_tag_t tag,
* bus_space_handle_t sh, bus_size_t offset);
*
* Check if the address is suitable for reading N-byte quantities.
*/
static int
beb_bus_space_peek_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
{
return !badbaddr((void *)(h + o), 1);
}
static int
beb_bus_space_peek_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
{
return !badbaddr((void *)(h + o), 2);
}
static int
beb_bus_space_peek_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
{
return !badbaddr((void *)(h + o), 4);
}
static int
beb_bus_space_peek_8(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
{
return !badbaddr((void *)(h + o), 8);
}
/*
* uintX_t bus_space_read_N(bus_space_tag_t tag,
* bus_space_handle_t bsh, bus_size_t offset);
*
* Return an 1, 2, 4, or 8 byte value read from the bus_space described
* by tag/handle at `offset'. The value is converted to host-endian.
*/
static uint8_t
beb_bus_space_read_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
{
return __read_1(h, o);
}
static uint16_t
beb_bus_space_read_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
{
return __read_2(h, o);
}
static uint32_t
beb_bus_space_read_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
{
return __read_4(h, o);
}
static uint64_t
beb_bus_space_read_8(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
{
return __read_8(h, o);
}
/*
* uintX_t bus_space_write_N(bus_space_tag_t tag,
* bus_space_handle_t bsh, bus_size_t offset, uintX_t val);
*
* Write an 1, 2, 4, or 8 byte value to the bus_space described by tag/handle
* at `offset'. The value `val' is converted from host to bus endianness
* before being written.
*/
static void
beb_bus_space_write_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
uint8_t v)
{
__write_1(h, o, v);
}
static void
beb_bus_space_write_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
uint16_t v)
{
__write_2(h, o, v);
}
static void
beb_bus_space_write_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
uint32_t v)
{
__write_4(h, o, v);
}
static void
beb_bus_space_write_8(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
uint64_t v)
{
__write_8(h, o, v);
}
/*
* void bus_space_read_multi_N(bus_space_tag_t tag,
* bus_space_handle_t bsh, bus_size_t offset, uintX_t *address,
* bus_size_t count);
*
* Read 'count' 1, 2, 4, or 8 byte values from the bus_space described by
* tag/handle at `offset' and store them in the address range starting at
* 'address'. The values are converted to CPU endian order before being
* being stored.
*/
static void
beb_bus_space_read_multi_1(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, uint8_t *a, bus_size_t c)
{
for (; c; a++, c--)
*a = __read_1(h, o);
}
static void
beb_bus_space_read_multi_2(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, uint16_t *a, bus_size_t c)
{
for (; c; a++, c--)
*a = __read_2(h, o);
}
static void
beb_bus_space_read_multi_4(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, uint32_t *a, bus_size_t c)
{
for (; c; a++, c--)
*a = __read_4(h, o);
}
static void
beb_bus_space_read_multi_8(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, uint64_t *a, bus_size_t c)
{
for (; c; a++, c--)
*a = __read_8(h, o);
}
/*
* void bus_space_write_multi_N(bus_space_tag_t tag,
* bus_space_handle_t bsh, bus_size_t offset,
* const uintX_t *address, bus_size_t count);
*
* Write 'count' 1, 2, 4, or 8 byte values from the address range starting
* at 'address' to the bus_space described by tag/handle at `offset'.
* The values are converted to bus endian order before being written to
* the bus.
*/
static void
beb_bus_space_write_multi_1(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, const uint8_t *a, bus_size_t c)
{
for (; c; a++, c--)
__write_1(h, o, *a);
}
static void
beb_bus_space_write_multi_2(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, const uint16_t *a, bus_size_t c)
{
for (; c; a++, c--)
__write_2(h, o, *a);
}
static void
beb_bus_space_write_multi_4(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, const uint32_t *a, bus_size_t c)
{
for (; c; a++, c--)
__write_4(h, o, *a);
}
static void
beb_bus_space_write_multi_8(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, const uint64_t *a, bus_size_t c)
{
for (; c; a++, c--)
__write_8(h, o, *a);
}
/*
* void bus_space_read_region_N(bus_space_tag_t tag,
* bus_space_handle_t bsh, bus_size_t offset,
* uintN_t *addr, bus_size_t count);
*
* Read `count' 1, 2, 4, or 8 byte quantities from bus space
* described by tag/handle and starting at `offset' and copy into
* buffer provided.
*/
static void
beb_bus_space_read_region_1(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, uint8_t *a, bus_size_t c)
{
for (; c; a++, o++, c--)
*a = __read_1(h, o);
}
static void
beb_bus_space_read_region_2(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, uint16_t *a, bus_size_t c)
{
for (; c; a++, o += 2, c--)
*a = __read_2(h, o);
}
static void
beb_bus_space_read_region_4(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, uint32_t *a, bus_size_t c)
{
for (; c; a++, o += 4, c--)
*a = __read_4(h, o);
}
static void
beb_bus_space_read_region_8(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, uint64_t *a, bus_size_t c)
{
for (; c; a++, o += 8, c--)
*a = __read_8(h, o);
}
/*
* void bus_space_write_region_N(bus_space_tag_t tag,
* bus_space_handle_t bsh, bus_size_t offset,
* uintN_t *addr, bus_size_t count);
*
* Copy `count' 1, 2, 4, or 8 byte quantities from the buffer provided
* into the bus space described by tag/handle and starting at `offset'.
*/
static void
beb_bus_space_write_region_1(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, const uint8_t *a, bus_size_t c)
{
for (; c; a++, o++, c--)
__write_1(h, o, *a);
}
static void
beb_bus_space_write_region_2(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, const uint16_t *a, bus_size_t c)
{
for (; c; a++, o += 2, c--)
__write_2(h, o, *a);
}
static void
beb_bus_space_write_region_4(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, const uint32_t *a, bus_size_t c)
{
for (; c; a++, o += 4, c--)
__write_4(h, o, *a);
}
static void
beb_bus_space_write_region_8(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, const uint64_t *a, bus_size_t c)
{
for (; c; a++, o += 8, c--)
__write_8(h, o, *a);
}
/*
* void bus_space_set_multi_N(bus_space_tag_t tag,
* bus_space_handle_t bsh, bus_size_t offset, uintN_t val,
* bus_size_t count);
*
* Write the 1, 2, 4, or 8 byte value `val' to bus space described
* by tag/handle/offset `count' times.
*/
static void
beb_bus_space_set_multi_1(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, uint8_t v, bus_size_t c)
{
for (; c; c--)
__write_1(h, o, v);
}
static void
beb_bus_space_set_multi_2(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, uint16_t v, bus_size_t c)
{
for (; c; c--)
__write_2(h, o, v);
}
static void
beb_bus_space_set_multi_4(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, uint32_t v, bus_size_t c)
{
for (; c; c--)
__write_4(h, o, v);
}
static void
beb_bus_space_set_multi_8(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, uint64_t v, bus_size_t c)
{
for (; c; c--)
__write_8(h, o, v);
}
/*
* void bus_space_set_region_N(bus_space_tag_t tag,
* bus_space_handle_t bsh, bus_size_t offset, uintN_t val,
* bus_size_t count);
*
* Write `count' 1, 2, 4, or 8 byte value `val' to bus space described
* by tag/handle starting at `offset'.
*/
static void
beb_bus_space_set_region_1(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, uint8_t v, bus_size_t c)
{
for (; c; o++, c--)
__write_1(h, o, v);
}
static void
beb_bus_space_set_region_2(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, uint16_t v, bus_size_t c)
{
for (; c; o += 2, c--)
__write_2(h, o, v);
}
static void
beb_bus_space_set_region_4(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, uint32_t v, bus_size_t c)
{
for (; c; o += 4, c--)
__write_4(h, o, v);
}
static void
beb_bus_space_set_region_8(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, uint64_t v, bus_size_t c)
{
for (; c; o += 8, c--)
__write_8(h, o, v);
}
|
4f6c10f374a5d3c8e30ddc1c2940198b6fb2403f
|
fbe68d84e97262d6d26dd65c704a7b50af2b3943
|
/third_party/virtualbox/src/VBox/Devices/Graphics/shaderlib/wine/include/wownt32.h
|
00227373d88a3de493c6cd4e2b03c0eb1b1fbb2b
|
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"LGPL-2.0-or-later",
"LGPL-2.1-or-later",
"LGPL-2.1-only",
"GPL-1.0-or-later",
"LGPL-2.0-only",
"GPL-2.0-only",
"LicenseRef-scancode-unknown-license-reference",
"CDDL-1.0",
"LicenseRef-scancode-warranty-disclaimer",
"GPL-2.0-or-later",
"MPL-1.0",
"LicenseRef-scancode-generic-exception",
"Apache-2.0",
"OpenSSL"
] |
permissive
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thalium/icebox
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|
6f78952d58da52ea4f0e55b2ab297f28e80c1160
|
refs/heads/master
| 2022-08-14T00:19:36.984579
| 2022-02-22T13:10:31
| 2022-02-22T13:10:31
| 190,019,914
| 585
| 109
|
MIT
| 2022-01-13T20:58:15
| 2019-06-03T14:18:12
|
C++
|
UTF-8
|
C
| false
| false
| 6,842
|
h
|
wownt32.h
|
/*
* WOW Generic Thunk API
*
* Copyright (C) 1999 Ulrich Weigand
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2.1 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA
*/
/*
* Oracle LGPL Disclaimer: For the avoidance of doubt, except that if any license choice
* other than GPL or LGPL is available it will apply instead, Oracle elects to use only
* the Lesser General Public License version 2.1 (LGPLv2) at this time for any software where
* a choice of LGPL license versions is made available with the language indicating
* that LGPLv2 or any later version may be used, or where a choice of which version
* of the LGPL is applied is otherwise unspecified.
*/
#ifndef _WOWNT32_H_
#define _WOWNT32_H_
#ifdef __WINESRC__
/* under Wine use the kernel functions directly so we don't have to import wow32 */
#define WOWCallback16 K32WOWCallback16
#define WOWCallback16Ex K32WOWCallback16Ex
#define WOWDirectedYield16 K32WOWDirectedYield16
#define WOWGetVDMPointer K32WOWGetVDMPointer
#define WOWGetVDMPointerFix K32WOWGetVDMPointerFix
#define WOWGetVDMPointerUnfix K32WOWGetVDMPointerUnfix
#define WOWGlobalAlloc16 K32WOWGlobalAlloc16
#define WOWGlobalAllocLock16 K32WOWGlobalAllocLock16
#define WOWGlobalFree16 K32WOWGlobalFree16
#define WOWGlobalLock16 K32WOWGlobalLock16
#define WOWGlobalLockSize16 K32WOWGlobalLockSize16
#define WOWGlobalUnlock16 K32WOWGlobalUnlock16
#define WOWGlobalUnlockFree16 K32WOWGlobalUnlockFree16
#define WOWHandle16 K32WOWHandle16
#define WOWHandle32 K32WOWHandle32
#define WOWYield16 K32WOWYield16
#endif
LPVOID WINAPI WOWGetVDMPointer(DWORD,DWORD,BOOL);
LPVOID WINAPI WOWGetVDMPointerFix(DWORD,DWORD,BOOL);
VOID WINAPI WOWGetVDMPointerUnfix(DWORD);
WORD WINAPI WOWGlobalAlloc16(WORD,DWORD);
WORD WINAPI WOWGlobalFree16(WORD);
DWORD WINAPI WOWGlobalLock16(WORD);
BOOL WINAPI WOWGlobalUnlock16(WORD);
DWORD WINAPI WOWGlobalAllocLock16(WORD,DWORD,WORD *);
WORD WINAPI WOWGlobalUnlockFree16(DWORD);
DWORD WINAPI WOWGlobalLockSize16(WORD,PDWORD);
VOID WINAPI WOWYield16(VOID);
VOID WINAPI WOWDirectedYield16(WORD);
typedef enum
{
WOW_TYPE_HWND,
WOW_TYPE_HMENU,
WOW_TYPE_HDWP,
WOW_TYPE_HDROP,
WOW_TYPE_HDC,
WOW_TYPE_HFONT,
WOW_TYPE_HMETAFILE,
WOW_TYPE_HRGN,
WOW_TYPE_HBITMAP,
WOW_TYPE_HBRUSH,
WOW_TYPE_HPALETTE,
WOW_TYPE_HPEN,
WOW_TYPE_HACCEL,
WOW_TYPE_HTASK,
WOW_TYPE_FULLHWND
} WOW_HANDLE_TYPE;
HANDLE WINAPI WOWHandle32(WORD,WOW_HANDLE_TYPE);
WORD WINAPI WOWHandle16(HANDLE,WOW_HANDLE_TYPE);
#ifdef __WINESRC__
/* under Wine we use optimized versions where we can */
#define HWND_32(h16) ((HWND) (ULONG_PTR)(h16))
#define HMENU_32(h16) ((HMENU) (ULONG_PTR)(h16))
#define HDWP_32(h16) ((HDWP) (ULONG_PTR)(h16))
#define HDROP_32(h16) ((HDROP) (ULONG_PTR)(h16))
#define HDC_32(h16) ((HDC) (ULONG_PTR)(h16))
#define HFONT_32(h16) ((HFONT) (ULONG_PTR)(h16))
#define HRGN_32(h16) ((HRGN) (ULONG_PTR)(h16))
#define HBITMAP_32(h16) ((HBITMAP) (ULONG_PTR)(h16))
#define HBRUSH_32(h16) ((HBRUSH) (ULONG_PTR)(h16))
#define HPALETTE_32(h16) ((HPALETTE) (ULONG_PTR)(h16))
#define HPEN_32(h16) ((HPEN) (ULONG_PTR)(h16))
#define HACCEL_32(h16) ((HACCEL) (ULONG_PTR)(h16))
#define HWND_16(h32) (LOWORD(h32))
#define HMENU_16(h32) (LOWORD(h32))
#define HDWP_16(h32) (LOWORD(h32))
#define HDROP_16(h32) (LOWORD(h32))
#define HDC_16(h32) (LOWORD(h32))
#define HFONT_16(h32) (LOWORD(h32))
#define HRGN_16(h32) (LOWORD(h32))
#define HBITMAP_16(h32) (LOWORD(h32))
#define HBRUSH_16(h32) (LOWORD(h32))
#define HPALETTE_16(h32) (LOWORD(h32))
#define HPEN_16(h32) (LOWORD(h32))
#define HACCEL_16(h32) (LOWORD(h32))
#else /* __WINESRC__ */
#define HWND_32(h16) ((HWND) (WOWHandle32(h16, WOW_TYPE_HWND)))
#define HMENU_32(h16) ((HMENU) (WOWHandle32(h16, WOW_TYPE_HMENU)))
#define HDWP_32(h16) ((HDWP) (WOWHandle32(h16, WOW_TYPE_HDWP)))
#define HDROP_32(h16) ((HDROP) (WOWHandle32(h16, WOW_TYPE_HDROP)))
#define HDC_32(h16) ((HDC) (WOWHandle32(h16, WOW_TYPE_HDC)))
#define HFONT_32(h16) ((HFONT) (WOWHandle32(h16, WOW_TYPE_HFONT)))
#define HRGN_32(h16) ((HRGN) (WOWHandle32(h16, WOW_TYPE_HRGN)))
#define HBITMAP_32(h16) ((HBITMAP) (WOWHandle32(h16, WOW_TYPE_HBITMAP)))
#define HBRUSH_32(h16) ((HBRUSH) (WOWHandle32(h16, WOW_TYPE_HBRUSH)))
#define HPALETTE_32(h16) ((HPALETTE) (WOWHandle32(h16, WOW_TYPE_HPALETTE)))
#define HPEN_32(h16) ((HPEN) (WOWHandle32(h16, WOW_TYPE_HPEN)))
#define HACCEL_32(h16) ((HACCEL) (WOWHandle32(h16, WOW_TYPE_HACCEL)))
#define HWND_16(h32) (WOWHandle16(h32, WOW_TYPE_HWND))
#define HMENU_16(h32) (WOWHandle16(h32, WOW_TYPE_HMENU))
#define HDWP_16(h32) (WOWHandle16(h32, WOW_TYPE_HDWP))
#define HDROP_16(h32) (WOWHandle16(h32, WOW_TYPE_HDROP))
#define HDC_16(h32) (WOWHandle16(h32, WOW_TYPE_HDC))
#define HFONT_16(h32) (WOWHandle16(h32, WOW_TYPE_HFONT))
#define HRGN_16(h32) (WOWHandle16(h32, WOW_TYPE_HRGN))
#define HBITMAP_16(h32) (WOWHandle16(h32, WOW_TYPE_HBITMAP))
#define HBRUSH_16(h32) (WOWHandle16(h32, WOW_TYPE_HBRUSH))
#define HPALETTE_16(h32) (WOWHandle16(h32, WOW_TYPE_HPALETTE))
#define HPEN_16(h32) (WOWHandle16(h32, WOW_TYPE_HPEN))
#define HACCEL_16(h32) (WOWHandle16(h32, WOW_TYPE_HACCEL))
#endif /* __WINESRC__ */
#define HMETAFILE_32(h16) ((HMETAFILE)(WOWHandle32(h16, WOW_TYPE_HMETAFILE)))
#define HTASK_32(h16) ((DWORD)(WOWHandle32(h16, WOW_TYPE_HTASK)))
#define FULLHWND_32(h16) ((HWND)(WOWHandle32(h16, WOW_TYPE_FULLHWND)))
#define HMETAFILE_16(h32) (WOWHandle16(h32, WOW_TYPE_HMETAFILE))
#define HTASK_16(h32) (WOWHandle16((HANDLE)(h32), WOW_TYPE_HTASK))
#define WCB16_PASCAL 0
#define WCB16_CDECL 1
#define WCB16_MAX_CBARGS 16
/* Wine extensions: call register function, context ptr is passed in the return value LPDWORD */
#define WCB16_REGS 2
#define WCB16_REGS_LONG 4 /* function uses 32-bit lret */
DWORD WINAPI WOWCallback16(DWORD,DWORD);
BOOL WINAPI WOWCallback16Ex(DWORD,DWORD,DWORD,LPVOID,LPDWORD);
#endif /* _WOWNT32_H_ */
|
5cb83a72bb81a25445006c328d7b8e1dc4548688
|
cdc6c85f66ff27e566aaf8c39b868bda3e80e192
|
/libsrc/unistd/write.c
|
bc62b8d88f20aae5759d0350b11cd5c5f3f45b42
|
[] |
no_license
|
tyfkda/xcc
|
e2deafc3b4f1d163956619742f617b1b1eb81a3b
|
9614ac50d6e813e5b3c2ab76bb3eabad10875f64
|
refs/heads/main
| 2023-08-23T23:48:16.443583
| 2023-08-21T02:58:14
| 2023-08-22T00:41:17
| 166,307,267
| 128
| 9
| null | 2023-07-20T01:09:36
| 2019-01-17T22:38:21
|
C
|
UTF-8
|
C
| false
| false
| 524
|
c
|
write.c
|
#include "unistd.h"
#if defined(__GNUC__)
#pragma GCC diagnostic ignored "-Wunused-parameter"
#endif
#if defined(__XV6)
ssize_t write(int fd, const void *str, size_t len) {
__asm("mov $16, %eax\n" // SYS_write
"int $64");
}
#elif defined(__WASM)
#elif defined(__linux__)
#include "_syscall.h"
ssize_t write(int fd, const void *str, size_t len) {
ssize_t ret;
SYSCALL_RET(__NR_write, ret);
return ret;
}
#elif defined(__APPLE__)
// Use libc.
#define USE_LIBC
#else
#error Target not supported
#endif
|
d32b7da0b0cb5514dc2a92d3298810cb3138d05f
|
9ceacf33fd96913cac7ef15492c126d96cae6911
|
/usr.sbin/installboot/installboot.c
|
220fab8900a34be23b3fdfc612182626513c8ffe
|
[] |
no_license
|
openbsd/src
|
ab97ef834fd2d5a7f6729814665e9782b586c130
|
9e79f3a0ebd11a25b4bff61e900cb6de9e7795e9
|
refs/heads/master
| 2023-09-02T18:54:56.624627
| 2023-09-02T15:16:12
| 2023-09-02T15:16:12
| 66,966,208
| 3,394
| 1,235
| null | 2023-08-08T02:42:25
| 2016-08-30T18:18:25
|
C
|
UTF-8
|
C
| false
| false
| 2,951
|
c
|
installboot.c
|
/* $OpenBSD: installboot.c,v 1.16 2022/11/08 12:08:53 kn Exp $ */
/*
* Copyright (c) 2012, 2013 Joel Sing <jsing@openbsd.org>
*
* Permission to use, copy, modify, and distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include <err.h>
#include <fcntl.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <unistd.h>
#include <util.h>
#include "installboot.h"
int nowrite;
int prepare;
int stages;
int verbose;
char *root;
char *stage1;
char *stage2;
static __dead void
usage(void)
{
fprintf(stderr, "usage:\t%1$s [-nv] [-r root] disk [stage1%2$s]\n"
"\t%1$s [-nv] -p disk\n",
getprogname(), (stages >= 2) ? " [stage2]" : "");
exit(1);
}
int
main(int argc, char **argv)
{
char *dev, *realdev;
int devfd, opt;
md_init();
while ((opt = getopt(argc, argv, "npr:v")) != -1) {
switch (opt) {
case 'n':
nowrite = 1;
break;
case 'p':
prepare = 1;
break;
case 'r':
root = optarg;
break;
case 'v':
verbose = 1;
break;
default:
usage();
}
}
argc -= optind;
argv += optind;
if (argc < 1 || argc > stages + 1)
usage();
if (prepare && (root != NULL || argc > 1))
usage();
dev = argv[0];
if (argc > 1)
stage1 = argv[1];
if (argc > 2)
stage2 = argv[2];
if ((devfd = opendev(dev, (nowrite ? O_RDONLY : O_RDWR), OPENDEV_PART,
&realdev)) == -1)
err(1, "open: %s", realdev);
if (prepare) {
#if SOFTRAID
sr_prepareboot(devfd, dev);
#else
md_prepareboot(devfd, realdev);
#endif
return 0;
}
/* Prefix stages with root, unless they were user supplied. */
if (root == NULL)
root = "/";
if (verbose)
fprintf(stderr, "Using %s as root\n", root);
if (argc <= 1 && stage1 != NULL) {
stage1 = fileprefix(root, stage1);
if (stage1 == NULL)
exit(1);
}
if (argc <= 2 && stage2 != NULL) {
stage2 = fileprefix(root, stage2);
if (stage2 == NULL)
exit(1);
}
if (verbose) {
fprintf(stderr, "%s bootstrap on %s\n",
(nowrite ? "would install" : "installing"), realdev);
if (stage1 || stage2) {
if (stage1)
fprintf(stderr, "using first-stage %s", stage1);
if (stage2)
fprintf(stderr, ", second-stage %s", stage2);
fprintf(stderr, "\n");
}
}
md_loadboot();
#ifdef SOFTRAID
sr_installboot(devfd, dev);
#else
md_installboot(devfd, realdev);
#endif
return 0;
}
|
691c9ae4d730bba6d7006795c3ea24acc79ca32c
|
28d0f8c01599f8f6c711bdde0b59f9c2cd221203
|
/sys/arch/arm/ep93xx/eprtc.c
|
960b0402542b11d521077ba45334a982c78d50c3
|
[] |
no_license
|
NetBSD/src
|
1a9cbc22ed778be638b37869ed4fb5c8dd616166
|
23ee83f7c0aea0777bd89d8ebd7f0cde9880d13c
|
refs/heads/trunk
| 2023-08-31T13:24:58.105962
| 2023-08-27T15:50:47
| 2023-08-27T15:50:47
| 88,439,547
| 656
| 348
| null | 2023-07-20T20:07:24
| 2017-04-16T20:03:43
| null |
UTF-8
|
C
| false
| false
| 3,259
|
c
|
eprtc.c
|
/* $NetBSD: eprtc.c,v 1.7 2021/11/21 08:25:26 skrll Exp $ */
/*
* Copyright (c) 2005 HAMAJIMA Katsuomi. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: eprtc.c,v 1.7 2021/11/21 08:25:26 skrll Exp $");
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/kernel.h>
#include <sys/device.h>
#include <dev/clock_subr.h>
#include <sys/bus.h>
#include <arm/ep93xx/ep93xxvar.h>
#include <arm/ep93xx/epsocvar.h>
#include <arm/ep93xx/eprtcreg.h>
struct eprtc_softc {
bus_space_tag_t sc_iot;
bus_space_handle_t sc_ioh;
struct todr_chip_handle sc_todr;
};
static int eprtc_match(device_t, cfdata_t, void *);
static void eprtc_attach(device_t, device_t, void *);
CFATTACH_DECL_NEW(eprtc, sizeof(struct eprtc_softc),
eprtc_match, eprtc_attach, NULL, NULL);
static int eprtc_gettime(struct todr_chip_handle *, struct timeval *);
static int eprtc_settime(struct todr_chip_handle *, struct timeval *);
static int
eprtc_match(device_t parent, cfdata_t match, void *aux)
{
return 1;
}
static void
eprtc_attach(device_t parent, device_t self, void *aux)
{
struct eprtc_softc *sc = device_private(self);
struct epsoc_attach_args *sa = aux;
printf("\n");
sc->sc_iot = sa->sa_iot;
if (bus_space_map(sa->sa_iot, sa->sa_addr,
sa->sa_size, 0, &sc->sc_ioh)) {
printf("%s: Cannot map registers", device_xname(self));
return;
}
sc->sc_todr.cookie = sc;
sc->sc_todr.todr_gettime = eprtc_gettime;
sc->sc_todr.todr_settime = eprtc_settime;
sc->sc_todr.todr_setwen = NULL;
todr_attach(&sc->sc_todr);
}
static int
eprtc_gettime(struct todr_chip_handle *ch, struct timeval *tv)
{
struct eprtc_softc *sc = ch->cookie;
tv->tv_sec = bus_space_read_4(sc->sc_iot, sc->sc_ioh, EP93XX_RTC_Data);
tv->tv_usec = 0;
return 0;
}
static int
eprtc_settime(struct todr_chip_handle *ch, struct timeval *tv)
{
struct eprtc_softc *sc = ch->cookie;
bus_space_write_4(sc->sc_iot, sc->sc_ioh, EP93XX_RTC_Load, tv->tv_sec);
return 0;
}
|
03ee3ae928d204ca6c28763d332bade8e322666b
|
66b3ef6a474b25487b52c28d6ab777c4bff82431
|
/old/v2/src/mouse/continuous/CurveProfile.h
|
55219f96d7696d28e98c89a1aa2dd1517d6f4b95
|
[
"MIT"
] |
permissive
|
mackorone/mms
|
63127b1aa27658e4d6ee88d3aefc9969b11497de
|
9ec759a32b4ff882f71ad4315cf9abbc575b30a1
|
refs/heads/main
| 2023-07-20T06:10:47.377682
| 2023-07-17T01:08:53
| 2023-07-17T01:29:31
| 14,811,400
| 281
| 73
|
MIT
| 2023-07-08T09:59:59
| 2013-11-29T22:36:30
|
C++
|
UTF-8
|
C
| false
| false
| 2,802
|
h
|
CurveProfile.h
|
#pragma once
#include "../IMouseAlgorithm.h"
const int curveTime = 351;
float curve[curveTime] = {
0,
0.025,
0.075,
0.15,
0.25,
0.375,
0.525,
0.7,
0.9,
1.125,
1.375,
1.65,
1.95,
2.275,
2.6,
2.925,
3.25,
3.575,
3.9,
4.225,
4.55,
4.875,
5.2,
5.525,
5.85,
6.175,
6.5,
6.825,
7.15,
7.475,
7.8,
8.125,
8.45,
8.775,
9.1,
9.425,
9.75,
10.075,
10.4,
10.725,
11.05,
11.375,
11.7,
12.025,
12.35,
12.675,
13,
13.325,
13.65,
13.975,
14.3,
14.625,
14.95,
15.275,
15.6,
15.925,
16.25,
16.575,
16.9,
17.225,
17.55,
17.875,
18.2,
18.525,
18.85,
19.175,
19.5,
19.825,
20.15,
20.475,
20.8,
21.125,
21.45,
21.775,
22.1,
22.425,
22.75,
23.075,
23.4,
23.725,
24.05,
24.375,
24.7,
25.025,
25.35,
25.675,
26,
26.325,
26.65,
26.975,
27.3,
27.625,
27.95,
28.275,
28.6,
28.925,
29.25,
29.575,
29.9,
30.225,
30.55,
30.875,
31.2,
31.525,
31.85,
32.175,
32.5,
32.825,
33.15,
33.475,
33.8,
34.125,
34.45,
34.775,
35.1,
35.425,
35.75,
36.075,
36.4,
36.725,
37.05,
37.375,
37.7,
38.025,
38.35,
38.675,
39,
39.325,
39.65,
39.975,
40.3,
40.625,
40.95,
41.275,
41.6,
41.925,
42.25,
42.575,
42.9,
43.225,
43.55,
43.875,
44.2,
44.525,
44.85,
45.175,
45.5,
45.825,
46.15,
46.475,
46.8,
47.125,
47.45,
47.775,
48.1,
48.425,
48.75,
49.075,
49.4,
49.725,
50.05,
50.375,
50.7,
51.025,
51.35,
51.675,
52,
52.325,
52.65,
52.975,
53.3,
53.625,
53.95,
54.275,
54.6,
54.925,
55.25,
55.575,
55.9,
56.225,
56.55,
56.875,
57.2,
57.525,
57.85,
58.175,
58.5,
58.825,
59.15,
59.475,
59.8,
60.125,
60.45,
60.775,
61.1,
61.425,
61.75,
62.075,
62.4,
62.725,
63.05,
63.375,
63.7,
64.025,
64.35,
64.675,
65,
65.325,
65.65,
65.975,
66.3,
66.625,
66.95,
67.275,
67.6,
67.925,
68.25,
68.575,
68.9,
69.225,
69.55,
69.875,
70.2,
70.525,
70.85,
71.175,
71.5,
71.825,
72.15,
72.475,
72.8,
73.125,
73.45,
73.775,
74.1,
74.425,
74.75,
75.075,
75.4,
75.725,
76.05,
76.375,
76.7,
77.025,
77.35,
77.675,
78,
78.325,
78.65,
78.975,
79.3,
79.625,
79.95,
80.275,
80.6,
80.925,
81.25,
81.575,
81.9,
82.225,
82.55,
82.875,
83.2,
83.525,
83.85,
84.175,
84.5,
84.825,
85.15,
85.475,
85.8,
86.125,
86.45,
86.775,
87.1,
87.425,
87.75,
88.075,
88.375,
88.65,
88.9,
89.125,
89.325,
89.5,
89.65,
89.775,
89.875,
89.95,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90,
90
};
|
4d319df1aa3e79550efa4d346acb4421a3f6c78c
|
e73547787354afd9b717ea57fe8dd0695d161821
|
/src/world/area_kmr/kmr_20/kmr_20_9_npc_scenes.c
|
e1e312933dd8e819f16f65a83a2b397dd6e39938
|
[] |
no_license
|
pmret/papermario
|
8b514b19653cef8d6145e47499b3636b8c474a37
|
9774b26d93f1045dd2a67e502b6efc9599fb6c31
|
refs/heads/main
| 2023-08-31T07:09:48.951514
| 2023-08-21T18:07:08
| 2023-08-21T18:07:08
| 287,151,133
| 904
| 139
| null | 2023-09-14T02:44:23
| 2020-08-13T01:22:57
|
C
|
UTF-8
|
C
| false
| false
| 3,058
|
c
|
kmr_20_9_npc_scenes.c
|
#include "kmr_20.h"
NpcSettings N(NpcSettings_Scenes) = {
.height = 24,
.radius = 24,
.level = ACTOR_LEVEL_NONE,
};
EvtScript N(EVS_NpcInit_Luigi_Scenes) = {
EVT_CALL(SetNpcCollisionSize, NPC_SELF, 46, 26)
EVT_CALL(GetEntryID, LVar0)
EVT_SWITCH(LVar0)
EVT_CASE_OR_EQ(kmr_20_ENTRY_2)
EVT_CASE_OR_EQ(kmr_20_ENTRY_3)
EVT_CALL(SetNpcAnimation, NPC_SELF, ANIM_Luigi_IdleSit)
EVT_CALL(SetNpcPos, NPC_SELF, 196, 44, -37)
EVT_CALL(SetNpcYaw, NPC_SELF, 270)
EVT_END_CASE_GROUP
EVT_END_SWITCH
EVT_RETURN
EVT_END
};
NpcData N(NpcData_Scenes)[] = {
{
.id = NPC_Scene_Parakarry,
.pos = { NPC_DISPOSE_LOCATION },
.yaw = 90,
.settings = &N(NpcSettings_Scenes),
.flags = ENEMY_FLAG_PASSIVE | ENEMY_FLAG_4 | ENEMY_FLAG_ENABLE_HIT_SCRIPT | ENEMY_FLAG_IGNORE_WORLD_COLLISION | ENEMY_FLAG_IGNORE_ENTITY_COLLISION | ENEMY_FLAG_FLYING | ENEMY_FLAG_ACTIVE_WHILE_OFFSCREEN | ENEMY_FLAG_400000,
.drops = NO_DROPS,
.animations = {
.idle = ANIM_WorldParakarry_Idle,
.walk = ANIM_WorldParakarry_Walk,
.run = ANIM_WorldParakarry_Run,
.chase = ANIM_WorldParakarry_Run,
.anim_4 = ANIM_WorldParakarry_Idle,
.anim_5 = ANIM_WorldParakarry_Idle,
.death = ANIM_WorldParakarry_Still,
.hit = ANIM_WorldParakarry_Still,
.anim_8 = ANIM_WorldParakarry_Idle,
.anim_9 = ANIM_WorldParakarry_Idle,
.anim_A = ANIM_WorldParakarry_Idle,
.anim_B = ANIM_WorldParakarry_Idle,
.anim_C = ANIM_WorldParakarry_Idle,
.anim_D = ANIM_WorldParakarry_Idle,
.anim_E = ANIM_WorldParakarry_Idle,
.anim_F = ANIM_WorldParakarry_Idle,
},
},
{
.id = NPC_Scene_Luigi,
.pos = { NPC_DISPOSE_LOCATION },
.yaw = 90,
.init = &N(EVS_NpcInit_Luigi_Scenes),
.settings = &N(NpcSettings_Scenes),
.flags = ENEMY_FLAG_PASSIVE | ENEMY_FLAG_4 | ENEMY_FLAG_ENABLE_HIT_SCRIPT | ENEMY_FLAG_IGNORE_WORLD_COLLISION | ENEMY_FLAG_IGNORE_PLAYER_COLLISION | ENEMY_FLAG_IGNORE_ENTITY_COLLISION | ENEMY_FLAG_FLYING | ENEMY_FLAG_GRAVITY,
.drops = NO_DROPS,
.animations = {
.idle = ANIM_Luigi_Still,
.walk = ANIM_Luigi_Still,
.run = ANIM_Luigi_Still,
.chase = ANIM_Luigi_Still,
.anim_4 = ANIM_Luigi_Still,
.anim_5 = ANIM_Luigi_Still,
.death = ANIM_Luigi_Still,
.hit = ANIM_Luigi_Still,
.anim_8 = ANIM_Luigi_Still,
.anim_9 = ANIM_Luigi_Still,
.anim_A = ANIM_Luigi_Still,
.anim_B = ANIM_Luigi_Still,
.anim_C = ANIM_Luigi_Still,
.anim_D = ANIM_Luigi_Still,
.anim_E = ANIM_Luigi_Still,
.anim_F = ANIM_Luigi_Still,
},
},
};
NpcGroupList N(SceneNPCs) = {
NPC_GROUP(N(NpcData_Scenes)),
{}
};
|
450b595016d74d4cfc4aa4c4450d6df0ef0b407a
|
060bc5ba9a8f707bdac927f30842febf9a4676a1
|
/sys/sparc/sbus/if_lereg.h
|
f235d39c8f7a3822a0e8ed48b3b258f310b1840b
|
[
"BSD-4-Clause-UC",
"LicenseRef-scancode-other-permissive"
] |
permissive
|
sergev/LiteBSD
|
14ae93caa709d4707c3b122c243641c8214583c3
|
6f89c18880065a83d3d18661c80f72fb3397a888
|
refs/heads/master
| 2023-01-10T02:20:05.357875
| 2022-07-19T16:41:32
| 2022-07-19T16:41:32
| 19,167,171
| 318
| 58
|
NOASSERTION
| 2022-12-28T16:23:01
| 2014-04-26T02:55:34
|
C
|
UTF-8
|
C
| false
| false
| 7,457
|
h
|
if_lereg.h
|
/*-
* Copyright (c) 1982, 1992, 1993
* The Regents of the University of California. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* @(#)if_lereg.h 8.2 (Berkeley) 10/30/93
*
* from: $Header: if_lereg.h,v 1.7 93/10/31 04:41:00 leres Locked $
*/
#define LEMTU 1518
#define LEMINSIZE 60 /* should be 64 if mode DTCR is set */
#define LERBUF 8
#define LERBUFLOG2 3
#define LE_RLEN (LERBUFLOG2 << 13)
#define LETBUF 1
#define LETBUFLOG2 0
#define LE_TLEN (LETBUFLOG2 << 13)
/* Local Area Network Controller for Ethernet (LANCE) registers */
struct lereg1 {
u_short ler1_rdp; /* register data port */
u_short ler1_rap; /* register address port */
};
/* register addresses */
#define LE_CSR0 0 /* Control and status register */
#define LE_CSR1 1 /* low address of init block */
#define LE_CSR2 2 /* high address of init block */
#define LE_CSR3 3 /* Bus master and control */
/* Control and status register 0 (csr0) */
#define LE_C0_ERR 0x8000 /* error summary */
#define LE_C0_BABL 0x4000 /* transmitter timeout error */
#define LE_C0_CERR 0x2000 /* collision */
#define LE_C0_MISS 0x1000 /* missed a packet */
#define LE_C0_MERR 0x0800 /* memory error */
#define LE_C0_RINT 0x0400 /* receiver interrupt */
#define LE_C0_TINT 0x0200 /* transmitter interrupt */
#define LE_C0_IDON 0x0100 /* initalization done */
#define LE_C0_INTR 0x0080 /* interrupt condition */
#define LE_C0_INEA 0x0040 /* interrupt enable */
#define LE_C0_RXON 0x0020 /* receiver on */
#define LE_C0_TXON 0x0010 /* transmitter on */
#define LE_C0_TDMD 0x0008 /* transmit demand */
#define LE_C0_STOP 0x0004 /* disable all external activity */
#define LE_C0_STRT 0x0002 /* enable external activity */
#define LE_C0_INIT 0x0001 /* begin initalization */
#define LE_C0_BITS \
"\20\20ERR\17BABL\16CERR\15MISS\14MERR\13RINT\
\12TINT\11IDON\10INTR\07INEA\06RXON\05TXON\04TDMD\03STOP\02STRT\01INIT"
/* Control and status register 3 (csr3) */
#define LE_C3_BSWP 0x4 /* byte swap */
#define LE_C3_ACON 0x2 /* ALE control, eh? */
#define LE_C3_BCON 0x1 /* byte control */
/*
* Current size is 13,758 bytes with 8 x 1518 receive buffers and
* 1 x 1518 transmit buffer.
*/
struct lereg2 {
/* initialization block */
u_short ler2_mode; /* mode */
u_char ler2_padr[6]; /* physical address */
u_short ler2_ladrf[4]; /* logical address filter */
u_short ler2_rdra; /* receive descriptor addr */
u_short ler2_rlen; /* rda high and ring size */
u_short ler2_tdra; /* transmit descriptor addr */
u_short ler2_tlen; /* tda high and ring size */
/* receive message descriptors. bits/hadr are byte order dependent. */
struct lermd {
u_short rmd0; /* low address of packet */
u_char rmd1_bits; /* descriptor bits */
u_char rmd1_hadr; /* high address of packet */
short rmd2; /* buffer byte count */
u_short rmd3; /* message byte count */
} ler2_rmd[LERBUF];
/* transmit message descriptors */
struct letmd {
u_short tmd0; /* low address of packet */
u_char tmd1_bits; /* descriptor bits */
u_char tmd1_hadr; /* high address of packet */
short tmd2; /* buffer byte count */
u_short tmd3; /* transmit error bits */
} ler2_tmd[LETBUF];
char ler2_rbuf[LERBUF][LEMTU];
char ler2_tbuf[LETBUF][LEMTU];
};
/* Initialzation block (mode) */
#define LE_MODE_PROM 0x8000 /* promiscuous mode */
/* 0x7f80 reserved, must be zero */
#define LE_MODE_INTL 0x0040 /* internal loopback */
#define LE_MODE_DRTY 0x0020 /* disable retry */
#define LE_MODE_COLL 0x0010 /* force a collision */
#define LE_MODE_DTCR 0x0008 /* disable transmit CRC */
#define LE_MODE_LOOP 0x0004 /* loopback mode */
#define LE_MODE_DTX 0x0002 /* disable transmitter */
#define LE_MODE_DRX 0x0001 /* disable receiver */
#define LE_MODE_NORMAL 0 /* none of the above */
/* Receive message descriptor 1 (rmd1_bits) */
#define LE_R1_OWN 0x80 /* LANCE owns the packet */
#define LE_R1_ERR 0x40 /* error summary */
#define LE_R1_FRAM 0x20 /* framing error */
#define LE_R1_OFLO 0x10 /* overflow error */
#define LE_R1_CRC 0x08 /* CRC error */
#define LE_R1_BUFF 0x04 /* buffer error */
#define LE_R1_STP 0x02 /* start of packet */
#define LE_R1_ENP 0x01 /* end of packet */
#define LE_R1_BITS \
"\20\10OWN\7ERR\6FRAM\5OFLO\4CRC\3BUFF\2STP\1ENP"
/* Transmit message descriptor 1 (tmd1_bits) */
#define LE_T1_OWN 0x80 /* LANCE owns the packet */
#define LE_T1_ERR 0x40 /* error summary */
#define LE_T1_MORE 0x10 /* multiple collisions */
#define LE_T1_ONE 0x08 /* single collision */
#define LE_T1_DEF 0x04 /* defferred transmit */
#define LE_T1_STP 0x02 /* start of packet */
#define LE_T1_ENP 0x01 /* end of packet */
#define LE_T1_BITS \
"\20\10OWN\7ERR\6RES\5MORE\4ONE\3DEF\2STP\1ENP"
/* Transmit message descriptor 3 (tmd3) */
#define LE_T3_BUFF 0x8000 /* buffer error */
#define LE_T3_UFLO 0x4000 /* underflow error */
#define LE_T3_LCOL 0x1000 /* late collision */
#define LE_T3_LCAR 0x0800 /* loss of carrier */
#define LE_T3_RTRY 0x0400 /* retry error */
#define LE_T3_TDR_MASK 0x03ff /* time domain reflectometry counter */
#define LE_T3_BITS \
"\20\20BUFF\17UFLO\16RES\15LCOL\14LCAR\13RTRY"
|
3a4212dfc55f8b0bc086bcd1c5d5db3112984abf
|
84c498e7a634f1c54c0caaf18ede3f20f8852dc8
|
/KaGuYa/arc_pack/arc_pack.c
|
a0939ebb3fa7058e4b8cee430bfbafeb7b94f357
|
[] |
no_license
|
Yggdrasill-Moe/Niflheim
|
4697e8d5cea5da7e5732f925b190c9d47ef94071
|
51048e7af2ae2c69db772ff59ac26390ab0ea73b
|
refs/heads/master
| 2023-07-19T18:34:26.398212
| 2023-07-17T01:11:04
| 2023-07-17T01:11:04
| 163,126,766
| 103
| 23
| null | null | null | null |
GB18030
|
C
| false
| false
| 4,067
|
c
|
arc_pack.c
|
/*
用于封包KaGuYa社游戏的arc文件
made by Darkness-TX
2022.09.11
*/
#define _CRT_SECURE_NO_WARNINGS
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <io.h>
#include <direct.h>
#include <Windows.h>
#include <locale.h>
typedef unsigned char unit8;
typedef unsigned short unit16;
typedef unsigned int unit32;
struct ari_header
{
unit32 namelen;
unit8 name[MAX_PATH];
unit16 type;
unit32 size;
unit32 desize;//只在arc中type为1时使用
} Header, Ari_Header[30000];
struct arc_header
{
unit8 magic[4];
}Arc_Header;
unit32 FileNum = 0;//总文件数，初始计数为0
void ReadIndex(char* fname)
{
FILE* ari = NULL;
unit8 ariname[MAX_PATH];
unit32 i = 0, j = 0, filesize = 0;
strcpy(ariname, fname);
ariname[strlen(ariname) - 1] = 'i';//ari
if (_access(ariname, 4) == -1)
{
printf("对应ari文件不存在！\n");
system("pause");
exit(0);
}
ari = fopen(ariname, "rb");
fseek(ari, 0, SEEK_END);
filesize = ftell(ari);
fseek(ari, 0, SEEK_SET);
while (ftell(ari) < filesize)
{
fread(&Ari_Header[i].namelen, 4, 1, ari);
fread(Ari_Header[i].name, Ari_Header[i].namelen, 1, ari);
Ari_Header[i].name[Ari_Header[i].namelen] = '\0';
for (j = 0; j < Ari_Header[i].namelen; j++)
Ari_Header[i].name[j] = ~Ari_Header[i].name[j];
fread(&Ari_Header[i].type, 2, 1, ari);
fread(&Ari_Header[i].size, 4, 1, ari);
i++;
}
FileNum = i;
}
void Pack(char* fname)
{
FILE* src = NULL, * dst = NULL, * base = NULL, * ari = NULL;
unit32 i = 0, filesize = 0, basesize = 0;
unit8* data = NULL, dirname[MAX_PATH];
WCHAR dstname[MAX_PATH];
src = fopen(fname, "rb");
fseek(src, 0, SEEK_END);
filesize = ftell(src);
fseek(src, 0, SEEK_SET);
fread(&Arc_Header.magic, 4, 1, src);
if (strncmp(Arc_Header.magic, "WFL1", 4) != 0)
{
printf("文件头不是WFL1！\n");
system("pause");
exit(0);
}
sprintf(dirname, "%s.new", fname);
dst = fopen(dirname, "wb");
strcpy(dirname, fname);
dirname[strlen(dirname) - 1] = 'i';//ari
sprintf(dirname, "%s.new", dirname);
ari = fopen(dirname, "wb");
fwrite(Arc_Header.magic, 4, 1, dst);
sprintf(dirname, "%s_unpack", fname);
_chdir(dirname);
while (ftell(src) < filesize)
{
fread(&Header.namelen, 4, 1, src);
fread(Header.name, Header.namelen, 1, src);
fread(&Header.type, 2, 1, src);
fread(&Header.size, 4, 1, src);
if (Header.namelen != Ari_Header[i].namelen || Header.type != Ari_Header[i].type || Header.size != Ari_Header[i].size)
{
printf("arc文件中的索引与ari文件中的索引不一致！num:%d\n", i);
printf("arc_header: namelen:%d type:%d size:0x%X\n", Header.namelen, Header.type, Header.size);
printf("ari_header: namelen:%d type:%d size:0x%X\n", Ari_Header[i].namelen, Ari_Header[i].type, Ari_Header[i].size);
system("pause");
exit(0);
}
MultiByteToWideChar(932, 0, Ari_Header[i].name, Ari_Header[i].namelen + 1, dstname, Ari_Header[i].namelen + 1);
if (Header.type == 1)
fseek(src, 4, SEEK_CUR);
fseek(src, Header.size, SEEK_CUR);
base = _wfopen(dstname + 1, L"rb");
fseek(base, 0, SEEK_END);
basesize = ftell(base);
fseek(base, 0, SEEK_SET);
data = malloc(basesize);
fread(data, basesize, 1, base);
fclose(base);
Header.type = 0;
Header.size = basesize;
wprintf(L"%ls type:%d size:0x%X\n", dstname, Header.type, Header.size);
//写ari
fwrite(&Header.namelen, 4, 1, ari);
fwrite(Header.name, Header.namelen, 1, ari);
fwrite(&Header.type, 2, 1, ari);
fwrite(&Header.size, 4, 1, ari);
//写arc
fwrite(&Header.namelen, 4, 1, dst);
fwrite(Header.name, Header.namelen, 1, dst);
fwrite(&Header.type, 2, 1, dst);
fwrite(&Header.size, 4, 1, dst);
fwrite(data, Header.size, 1, dst);
free(data);
i++;
}
fclose(dst);
fclose(src);
}
int main(int argc, char* argv[])
{
setlocale(LC_ALL, "chs");
printf("project：Niflheim-KaGuYa\n用于封包KaGuYa社游戏的arc文件。\n将arc文件拖到程序上。\nby Darkness-TX 2022.09.11\n\n");
ReadIndex(argv[1]);
Pack(argv[1]);
printf("已完成，总文件数%d\n", FileNum);
system("pause");
return 0;
}
|
2f4131c236a26a9e2fd5e0081acf9142f1b25007
|
9ceacf33fd96913cac7ef15492c126d96cae6911
|
/games/number/number.c
|
aeef08913b416ded4fc048ef68e155849184c82f
|
[] |
no_license
|
openbsd/src
|
ab97ef834fd2d5a7f6729814665e9782b586c130
|
9e79f3a0ebd11a25b4bff61e900cb6de9e7795e9
|
refs/heads/master
| 2023-09-02T18:54:56.624627
| 2023-09-02T15:16:12
| 2023-09-02T15:16:12
| 66,966,208
| 3,394
| 1,235
| null | 2023-08-08T02:42:25
| 2016-08-30T18:18:25
|
C
|
UTF-8
|
C
| false
| false
| 7,945
|
c
|
number.c
|
/* $OpenBSD: number.c,v 1.20 2016/03/07 12:07:56 mestre Exp $ */
/*
* Copyright (c) 1988, 1993, 1994
* The Regents of the University of California. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <ctype.h>
#include <err.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <unistd.h>
#define MAXNUM 65 /* Biggest number we handle. */
#define LINELEN 256
static const char *const name1[] = {
"", "one", "two", "three",
"four", "five", "six", "seven",
"eight", "nine", "ten", "eleven",
"twelve", "thirteen", "fourteen", "fifteen",
"sixteen", "seventeen", "eighteen", "nineteen",
},
*const name2[] = {
"", "ten", "twenty", "thirty",
"forty", "fifty", "sixty", "seventy",
"eighty", "ninety",
},
*const name3[] = {
"hundred", "thousand", "million", "billion",
"trillion", "quadrillion", "quintillion", "sextillion",
"septillion", "octillion", "nonillion", "decillion",
"undecillion", "duodecillion", "tredecillion", "quattuordecillion",
"quindecillion", "sexdecillion",
"septendecillion", "octodecillion",
"novemdecillion", "vigintillion",
};
void convert(char *);
void convertexp(char *);
int number(const char *, int);
void pfract(int);
int unit(int, const char *);
__dead void usage(void);
int lflag;
int
main(int argc, char *argv[])
{
int ch, first;
char line[LINELEN];
if (pledge("stdio", NULL) == -1)
err(1, "pledge");
lflag = 0;
while ((ch = getopt(argc, argv, "hl")) != -1)
switch (ch) {
case 'l':
lflag = 1;
break;
case 'h':
default:
usage();
}
argc -= optind;
argv += optind;
if (*argv == NULL)
for (first = 1;
fgets(line, sizeof(line), stdin) != NULL; first = 0) {
if (strchr(line, '\n') == NULL)
errx(1, "line too long.");
if (!first)
(void)printf("...\n");
convert(line);
if (lflag)
(void)printf("\n");
}
else
for (first = 1; *argv != NULL; first = 0, ++argv) {
if (!first)
(void)printf("...\n");
convert(*argv);
if (lflag)
(void)printf("\n");
}
return 0;
}
void
convert(char *line)
{
int flen, len, rval;
char *p, *fraction;
/* strip trailing and leading whitespace */
len = strlen(line) - 1;
while ((isblank((unsigned char)line[len])) || (line[len] == '\n'))
line[len--] = '\0';
while ((isblank((unsigned char)line[0])) || (line[0] == '\n'))
line++;
if (strchr(line, 'e') || strchr(line, 'E'))
convertexp(line);
else {
fraction = NULL;
for (p = line; *p != '\0' && *p != '\n'; ++p) {
if (isblank((unsigned char)*p))
goto badnum;
if (isdigit((unsigned char)*p))
continue;
switch (*p) {
case '.':
if (fraction != NULL)
goto badnum;
fraction = p + 1;
*p = '\0';
break;
case '-':
case '+':
if (p == line)
break;
/* FALLTHROUGH */
default:
badnum: errx(1, "illegal number: %s", line);
break;
}
}
*p = '\0';
if ((len = strlen(line)) > MAXNUM ||
((fraction != NULL) && (flen = strlen(fraction)) > MAXNUM))
errx(1, "number too long (max %d digits).", MAXNUM);
if (*line == '-') {
(void)printf("minus%s", lflag ? " " : "\n");
++line;
--len;
}
if (*line == '+') {
(void)printf("plus%s", lflag ? " " : "\n");
++line;
--len;
}
rval = len > 0 ? unit(len, line) : 0;
if (fraction != NULL && flen != 0)
for (p = fraction; *p != '\0'; ++p)
if (*p != '0') {
if (rval)
(void)printf("%sand%s",
lflag ? " " : "",
lflag ? " " : "\n");
if (unit(flen, fraction)) {
if (lflag)
(void)printf(" ");
pfract(flen);
rval = 1;
}
break;
}
if (!rval)
(void)printf("zero%s", lflag ? "" : ".\n");
}
}
void
convertexp(char *line)
{
char locline[LINELEN];
char *part1, *part2, *part3, *part4;
char tmp[2];
int i, j;
(void)strlcpy(locline,line,LINELEN);
part3 = locline;
part2 = strsep(&part3, "eE"); /* part3 is the exponent */
part4 = part3;
(void)strsep(&part4, "."); /* no decimal allowed in the exponent */
if (part4)
errx(1, "illegal number: %s", line);
part1 = strsep(&part2, "."); /* we can have one in the mantissa */
/* At this point everything should be null or a digit. Check for
* that before starting to convert. Two characters may be + or -.
*/
j = strlen(line);
for (i = 0; i < j; i++)
if ((!isdigit((unsigned char)locline[i])) && (locline[i]))
if (((locline[i] != '+') && (locline[i] != '-')) ||
((i != 0) && (i != part3 - locline)))
errx(1, "illegal number: %s", line);
convert(part1);
printf("%s", lflag ? " " : "");
if (part2 && part2[0]) { /* do individual digits separately */
(void)printf("point%s", lflag ? " " : "\n");
j = strlen(part2); tmp[1] = '\0';
for (i = 0 ; i < j; i++ ) {
tmp[0] = part2[i];
convert(tmp);
(void)printf("%s", lflag ? " " : "");
}
}
(void)printf("times ten to the%s", lflag ? " " : "\n");
if (part3 && part3[0])
convert(part3);
else
(void)printf("zero%s", lflag ? " " : ".\n");
}
int
unit(int len, const char *p)
{
int off, rval;
rval = 0;
if (len > 3) {
if (len % 3) {
off = len % 3;
len -= off;
if (number(p, off)) {
rval = 1;
(void)printf(" %s%s",
name3[len / 3], lflag ? " " : ".\n");
}
p += off;
}
for (; len > 3; p += 3) {
len -= 3;
if (number(p, 3)) {
rval = 1;
(void)printf(" %s%s",
name3[len / 3], lflag ? " " : ".\n");
}
}
}
if (number(p, len)) {
if (!lflag)
(void)printf(".\n");
rval = 1;
}
return (rval);
}
int
number(const char *p, int len)
{
int val, rval;
rval = 0;
switch (len) {
case 3:
if (*p != '0') {
rval = 1;
(void)printf("%s hundred", name1[*p - '0']);
}
++p;
/* FALLTHROUGH */
case 2:
val = (p[1] - '0') + (p[0] - '0') * 10;
if (val) {
if (rval)
(void)printf(" ");
if (val < 20)
(void)printf("%s", name1[val]);
else {
(void)printf("%s", name2[val / 10]);
if (val % 10)
(void)printf("-%s", name1[val % 10]);
}
rval = 1;
}
break;
case 1:
if (*p != '0') {
rval = 1;
(void)printf("%s", name1[*p - '0']);
}
}
return (rval);
}
void
pfract(int len)
{
static const char *const pref[] = { "", "ten-", "hundred-" };
switch(len) {
case 1:
(void)printf("tenths%s", lflag ? "" : ".\n");
break;
case 2:
(void)printf("hundredths%s", lflag ? "" : ".\n");
break;
default:
(void)printf("%s%sths%s", pref[len % 3], name3[len / 3],
lflag ? "" : ".\n");
break;
}
}
void
usage(void)
{
(void)fprintf(stderr, "usage: %s [-l] [--] [# ...]\n", getprogname());
exit(1);
}
|
20c28810ff0cdc9866a9236fa0787b1f6ed67522
|
7eaf54a78c9e2117247cb2ab6d3a0c20719ba700
|
/SOFTWARE/A64-TERES/linux-a64/drivers/net/wireless/bcmdhd/dhd_cfg_vendor.c
|
299a27d210f73b1c082c2f9de5bb9c017deab0ae
|
[
"LicenseRef-scancode-free-unknown",
"Apache-2.0",
"Linux-syscall-note",
"GPL-2.0-only",
"GPL-1.0-or-later",
"LicenseRef-scancode-warranty-disclaimer"
] |
permissive
|
OLIMEX/DIY-LAPTOP
|
ae82f4ee79c641d9aee444db9a75f3f6709afa92
|
a3fafd1309135650bab27f5eafc0c32bc3ca74ee
|
refs/heads/rel3
| 2023-08-04T01:54:19.483792
| 2023-04-03T07:18:12
| 2023-04-03T07:18:12
| 80,094,055
| 507
| 92
|
Apache-2.0
| 2023-04-03T07:05:59
| 2017-01-26T07:25:50
|
C
|
UTF-8
|
C
| false
| false
| 3,546
|
c
|
dhd_cfg_vendor.c
|
/*
* Linux cfg80211 vendor command/event handlers of DHD
*
* $Copyright Open Broadcom Corporation$
*
* $Id: dhd_cfg_vendor.c 495605 2014-08-07 18:41:34Z $
*/
#include <linux/vmalloc.h>
#include <linuxver.h>
#include <net/cfg80211.h>
#include <net/netlink.h>
#include <bcmutils.h>
#include <wl_cfg80211.h>
#include <wl_cfgvendor.h>
#include <dngl_stats.h>
#include <dhd.h>
#include <dhd_dbg.h>
#include <dhdioctl.h>
#include <brcm_nl80211.h>
#ifdef VENDOR_EXT_SUPPORT
static int dhd_cfgvendor_priv_string_handler(struct wiphy *wiphy,
struct wireless_dev *wdev, const void *data, int len)
{
const struct bcm_nlmsg_hdr *nlioc = data;
struct net_device *ndev = NULL;
struct bcm_cfg80211 *cfg;
struct sk_buff *reply;
void *buf = NULL, *cur;
dhd_pub_t *dhd;
dhd_ioctl_t ioc = { 0 };
int ret = 0, ret_len, payload, msglen;
int maxmsglen = PAGE_SIZE - 0x100;
int8 index;
WL_TRACE(("entry: cmd = %d\n", nlioc->cmd));
DHD_ERROR(("entry: cmd = %d\n", nlioc->cmd));
cfg = wiphy_priv(wiphy);
dhd = cfg->pub;
DHD_OS_WAKE_LOCK(dhd);
/* send to dongle only if we are not waiting for reload already */
if (dhd->hang_was_sent) {
WL_ERR(("HANG was sent up earlier\n"));
DHD_OS_WAKE_LOCK_CTRL_TIMEOUT_ENABLE(dhd, DHD_EVENT_TIMEOUT_MS);
DHD_OS_WAKE_UNLOCK(dhd);
return OSL_ERROR(BCME_DONGLE_DOWN);
}
len -= sizeof(struct bcm_nlmsg_hdr);
ret_len = nlioc->len;
if (ret_len > 0 || len > 0) {
if (len > DHD_IOCTL_MAXLEN) {
WL_ERR(("oversize input buffer %d\n", len));
len = DHD_IOCTL_MAXLEN;
}
if (ret_len > DHD_IOCTL_MAXLEN) {
WL_ERR(("oversize return buffer %d\n", ret_len));
ret_len = DHD_IOCTL_MAXLEN;
}
payload = max(ret_len, len) + 1;
buf = vzalloc(payload);
if (!buf) {
DHD_OS_WAKE_UNLOCK(dhd);
return -ENOMEM;
}
memcpy(buf, (void *)nlioc + nlioc->offset, len);
*(char *)(buf + len) = '\0';
}
ndev = wdev_to_wlc_ndev(wdev, cfg);
index = dhd_net2idx(dhd->info, ndev);
if (index == DHD_BAD_IF) {
WL_ERR(("Bad ifidx from wdev:%p\n", wdev));
ret = BCME_ERROR;
goto done;
}
ioc.cmd = nlioc->cmd;
ioc.len = nlioc->len;
ioc.set = nlioc->set;
ioc.driver = nlioc->magic;
ret = dhd_ioctl_process(dhd, index, &ioc, buf);
if (ret) {
WL_TRACE(("dhd_ioctl_process return err %d\n", ret));
ret = OSL_ERROR(ret);
goto done;
}
cur = buf;
while (ret_len > 0) {
msglen = nlioc->len > maxmsglen ? maxmsglen : ret_len;
ret_len -= msglen;
payload = msglen + sizeof(msglen);
reply = cfg80211_vendor_cmd_alloc_reply_skb(wiphy, payload);
if (!reply) {
WL_ERR(("Failed to allocate reply msg\n"));
ret = -ENOMEM;
break;
}
if (nla_put(reply, BCM_NLATTR_DATA, msglen, cur) ||
nla_put_u16(reply, BCM_NLATTR_LEN, msglen)) {
kfree_skb(reply);
ret = -ENOBUFS;
break;
}
ret = cfg80211_vendor_cmd_reply(reply);
if (ret) {
WL_ERR(("testmode reply failed:%d\n", ret));
break;
}
cur += msglen;
}
done:
vfree(buf);
DHD_OS_WAKE_UNLOCK(dhd);
return ret;
}
const struct wiphy_vendor_command dhd_cfgvendor_cmds [] = {
{
{
.vendor_id = OUI_BRCM,
.subcmd = BRCM_VENDOR_SCMD_PRIV_STR
},
.flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV,
.doit = dhd_cfgvendor_priv_string_handler
},
};
int cfgvendor_attach(struct wiphy *wiphy)
{
wiphy->vendor_commands = dhd_cfgvendor_cmds;
wiphy->n_vendor_commands = ARRAY_SIZE(dhd_cfgvendor_cmds);
return 0;
}
int cfgvendor_detach(struct wiphy *wiphy)
{
wiphy->vendor_commands = NULL;
wiphy->n_vendor_commands = 0;
return 0;
}
#endif /* VENDOR_EXT_SUPPORT */
|
1a0496f061362bf45b0166c2e13aef016225f9f7
|
315f1de5835d38669c9777e8009709d80ff3d04e
|
/bin/arria10_debuggers/read_sysid.c
|
8ba28cadf5610e29e8bb16fba5ffe85b66ce6a7a
|
[
"MIT"
] |
permissive
|
stanford-ppl/spatial-lang
|
751dcadfc38770f7a0b65e701f3e6aa5ef50e146
|
55e9a67b28f83caf3606e0c7bbead82a12cfbd2a
|
refs/heads/master
| 2023-03-08T17:55:24.007295
| 2018-11-14T22:07:39
| 2018-11-14T22:07:39
| 78,697,642
| 109
| 15
|
MIT
| 2018-04-12T10:44:07
| 2017-01-12T01:47:41
|
Verilog
|
UTF-8
|
C
| false
| false
| 1,229
|
c
|
read_sysid.c
|
#include <sys/mman.h>
#include <stdio.h>
#include <sys/types.h>
#include <sys/stat.h>
#include <fcntl.h>
#include <unistd.h>
#define FPGA_BASE ( 0xff200000 )
#define FREEZE_BRIDGE_OFFSET ( 0x00000800 )
#define PR_SID_OFFSET ( 0x00000200 )
#define PR_DEFAULT_SID_OFFSET ( 0x00000000 )
#define PR_SRAM_OFFSET ( 0x00000000 )
#define PR_SRAM_SPAN ( 0x00000200 )
#define PAGE_SIZE ( 0x00001000 )
int main()
{
int fd = open("/dev/mem", (O_RDWR | O_SYNC));
if (fd < 1)
{
perror("error opening /dev/mem\n");
close(fd);
return -1;
}
printf("/dev/mem opened successfully!\n");
void* virtualBase = (void *)mmap(NULL, PAGE_SIZE, (PROT_READ | PROT_WRITE), MAP_SHARED, fd, FPGA_BASE);
printf("virtualBase = 0x%x\n", (unsigned int)virtualBase);
// read sys id
printf("This is for pr_region_alternate!\n");
printf("read sys id:\n");
int *sysIDPtr = (int *)(virtualBase + FREEZE_BRIDGE_OFFSET + PR_SID_OFFSET);
printf("0x%x\n", *sysIDPtr);
printf("This is for pr_region_default!\n");
printf("read sys id:\n");
int *sysIDPtrOrig = (int *)(virtualBase + FREEZE_BRIDGE_OFFSET + PR_DEFAULT_SID_OFFSET);
printf("0x%x\n", *sysIDPtrOrig);
munmap(virtualBase, PAGE_SIZE);
close(fd);
return 0;
}
|
450914bd157bf5ebab39042cc3bd02caf4ee6529
|
28d0f8c01599f8f6c711bdde0b59f9c2cd221203
|
/sys/net/agr/if_agrsubr.c
|
40300faa0bcd25cd99af49ee0ca3f1d1afdc5729
|
[
"BSD-3-Clause"
] |
permissive
|
NetBSD/src
|
1a9cbc22ed778be638b37869ed4fb5c8dd616166
|
23ee83f7c0aea0777bd89d8ebd7f0cde9880d13c
|
refs/heads/trunk
| 2023-08-31T13:24:58.105962
| 2023-08-27T15:50:47
| 2023-08-27T15:50:47
| 88,439,547
| 656
| 348
| null | 2023-07-20T20:07:24
| 2017-04-16T20:03:43
| null |
UTF-8
|
C
| false
| false
| 7,765
|
c
|
if_agrsubr.c
|
/* $NetBSD: if_agrsubr.c,v 1.13 2019/11/10 21:16:38 chs Exp $ */
/*-
* Copyright (c)2005 YAMAMOTO Takashi,
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: if_agrsubr.c,v 1.13 2019/11/10 21:16:38 chs Exp $");
#ifdef _KERNEL_OPT
#include "opt_inet.h"
#endif
#include <sys/param.h>
#include <sys/callout.h>
#include <sys/malloc.h>
#include <sys/systm.h>
#include <sys/types.h>
#include <sys/queue.h>
#include <sys/sockio.h>
#include <net/if.h>
#include <net/if_ether.h>
#include <net/agr/if_agrvar_impl.h>
#include <net/agr/if_agrsubr.h>
struct agr_mc_entry {
TAILQ_ENTRY(agr_mc_entry) ame_q;
int ame_refcnt;
struct agr_ifreq ame_ifr; /* XXX waste */
};
static struct agr_mc_entry *agr_mc_lookup(struct agr_multiaddrs *,
const struct sockaddr *);
static int agrport_mc_add_callback(struct agr_port *, void *);
static int agrport_mc_del_callback(struct agr_port *, void *);
static int agrmc_mc_add_callback(struct agr_mc_entry *, void *);
static int agrmc_mc_del_callback(struct agr_mc_entry *, void *);
static int agr_mc_add(struct agr_multiaddrs *, const struct sockaddr *);
static int agr_mc_del(struct agr_multiaddrs *, const struct sockaddr *);
int
agr_mc_purgeall(struct agr_softc *sc, struct agr_multiaddrs *ama)
{
struct agr_mc_entry *ame;
int error = 0;
while ((ame = TAILQ_FIRST(&ama->ama_addrs)) != NULL) {
error = agr_port_foreach(sc,
agrport_mc_del_callback, &ame->ame_ifr);
if (error) {
/* XXX XXX */
printf("%s: error %d\n", __func__, error);
}
TAILQ_REMOVE(&ama->ama_addrs, ame, ame_q);
free(ame, M_DEVBUF);
}
return error;
}
int
agr_mc_init(struct agr_softc *sc, struct agr_multiaddrs *ama)
{
TAILQ_INIT(&ama->ama_addrs);
return 0;
}
/* ==================== */
static struct agr_mc_entry *
agr_mc_lookup(struct agr_multiaddrs *ama, const struct sockaddr *sa)
{
struct agr_mc_entry *ame;
TAILQ_FOREACH(ame, &ama->ama_addrs, ame_q) {
if (!memcmp(&ame->ame_ifr.ifr_ss, sa, sa->sa_len))
return ame;
}
return NULL;
}
int
agr_mc_foreach(struct agr_multiaddrs *ama,
int (*func)(struct agr_mc_entry *, void *), void *arg)
{
struct agr_mc_entry *ame;
int error = 0;
TAILQ_FOREACH(ame, &ama->ama_addrs, ame_q) {
error = (*func)(ame, arg);
if (error) {
/*
* XXX how to recover?
* we can try to restore setting, but it can also fail..
*/
break;
}
}
return error;
}
static int
agr_mc_add(struct agr_multiaddrs *ama, const struct sockaddr *sa)
{
struct agr_mc_entry *ame;
ame = agr_mc_lookup(ama, sa);
if (ame) {
ame->ame_refcnt++;
return 0;
}
ame = malloc(sizeof(*ame), M_DEVBUF, M_WAITOK | M_ZERO);
memcpy(&ame->ame_ifr.ifr_ss, sa, sa->sa_len);
ame->ame_refcnt = 1;
TAILQ_INSERT_TAIL(&ama->ama_addrs, ame, ame_q);
return ENETRESET;
}
static int
agr_mc_del(struct agr_multiaddrs *ama, const struct sockaddr *sa)
{
struct agr_mc_entry *ame;
ame = agr_mc_lookup(ama, sa);
if (ame == NULL)
return ENOENT;
ame->ame_refcnt--;
if (ame->ame_refcnt > 0)
return 0;
TAILQ_REMOVE(&ama->ama_addrs, ame, ame_q);
free(ame, M_DEVBUF);
return ENETRESET;
}
/* ==================== */
int
agr_port_foreach(struct agr_softc *sc,
int (*func)(struct agr_port *, void *), void *arg)
{
struct agr_port *port;
int error = 0;
TAILQ_FOREACH(port, &sc->sc_ports, port_q) {
if ((port->port_flags & (AGRPORT_LARVAL | AGRPORT_DETACHING))) {
continue;
}
error = (func)(port, arg);
if (error) {
/*
* XXX how to recover?
* we can try to restore setting, but it can also fail..
*/
break;
}
}
return error;
}
/* ==================== */
static int
agrmc_mc_add_callback(struct agr_mc_entry *ame, void *arg)
{
return agrport_mc_add_callback(arg, &ame->ame_ifr);
}
static int
agrmc_mc_del_callback(struct agr_mc_entry *ame, void *arg)
{
return agrport_mc_del_callback(arg, &ame->ame_ifr);
}
int
agr_configmulti_port(struct agr_multiaddrs *ama, struct agr_port *port,
bool add)
{
return agr_mc_foreach(ama,
add ? agrmc_mc_add_callback : agrmc_mc_del_callback, port);
}
/* -------------------- */
static int
agrport_mc_add_callback(struct agr_port *port, void *arg)
{
return agrport_ioctl(port, SIOCADDMULTI, arg);
}
static int
agrport_mc_del_callback(struct agr_port *port, void *arg)
{
return agrport_ioctl(port, SIOCDELMULTI, arg);
}
int
agr_configmulti_ifreq(struct agr_softc *sc, struct agr_multiaddrs *ama,
struct ifreq *ifr, bool add)
{
int error;
if (add)
error = agr_mc_add(ama, ifreq_getaddr(SIOCADDMULTI, ifr));
else
error = agr_mc_del(ama, ifreq_getaddr(SIOCDELMULTI, ifr));
if (error != ENETRESET)
return error;
return agr_port_foreach(sc,
add ? agrport_mc_add_callback : agrport_mc_del_callback, ifr);
}
/* ==================== */
int
agr_port_getmedia(struct agr_port *port, u_int *media, u_int *status)
{
struct ifmediareq ifmr;
int error;
memset(&ifmr, 0, sizeof(ifmr));
ifmr.ifm_count = 0;
error = agrport_ioctl(port, SIOCGIFMEDIA, (void *)&ifmr);
if (error == 0) {
*media = ifmr.ifm_active;
*status = ifmr.ifm_status;
}
return error;
}
/* ==================== */
/*
* Enable vlan hardware assist for the specified port.
*/
int
agr_vlan_add(struct agr_port *port, void *arg)
{
struct ifnet *ifp = port->port_ifp;
struct ethercom *ec_port = (void *)ifp;
int error=0;
if (ec_port->ec_nvlans++ == 0 &&
(ec_port->ec_capabilities & ETHERCAP_VLAN_MTU) != 0) {
struct ifnet *p = port->port_ifp;
/*
* Enable Tx/Rx of VLAN-sized frames.
*/
ec_port->ec_capenable |= ETHERCAP_VLAN_MTU;
if (p->if_flags & IFF_UP) {
IFNET_LOCK(p);
error = if_flags_set(p, p->if_flags);
IFNET_UNLOCK(p);
if (error) {
if (ec_port->ec_nvlans-- == 1)
ec_port->ec_capenable &=
~ETHERCAP_VLAN_MTU;
return (error);
}
}
}
return error;
}
/*
* Disable vlan hardware assist for the specified port.
*/
int
agr_vlan_del(struct agr_port *port, void *arg)
{
struct ethercom *ec_port = (void *)port->port_ifp;
bool *force_zero = (bool *)arg;
KASSERT(force_zero != NULL);
/* Disable vlan support */
if ((*force_zero && ec_port->ec_nvlans > 0) ||
ec_port->ec_nvlans-- == 1) {
struct ifnet *p = port->port_ifp;
if (*force_zero)
ec_port->ec_nvlans = 0;
/*
* Disable Tx/Rx of VLAN-sized frames.
*/
ec_port->ec_capenable &= ~ETHERCAP_VLAN_MTU;
if (p->if_flags & IFF_UP) {
IFNET_LOCK(p);
(void)if_flags_set(p, p->if_flags);
IFNET_UNLOCK(p);
}
}
return 0;
}
|
9a63e45526800e26c23b7228f7e1c158539adb06
|
e5f4f37d941ceb8145d65f92028cc54658b1ac01
|
/Data/Base/Shaders/Pipeline/CopyConstants.h
|
8eda343f9e5eff5cf8e57735c54ed4634e6858ed
|
[
"MIT"
] |
permissive
|
ezEngine/ezEngine
|
19983d2733a5409fb2665c6c3a0a575dadcefb50
|
c46e3b4b2cd46798e4abb4938fbca281c054b039
|
refs/heads/dev
| 2023-09-06T02:17:28.152665
| 2023-09-05T18:25:43
| 2023-09-05T18:25:43
| 18,179,848
| 1,050
| 165
|
MIT
| 2023-09-14T21:44:39
| 2014-03-27T15:02:16
|
C++
|
UTF-8
|
C
| false
| false
| 149
|
h
|
CopyConstants.h
|
#pragma once
#include "../Common/ConstantBufferMacros.h"
#include "../Common/Platforms.h"
CONSTANT_BUFFER(ezCopyConstants, 3)
{
INT2(Offset);
};
|
ed788ded7248d225b9bd975f13dc77791fe802a8
|
a4d8fcfa8084c5d36a862aeb0978327ff4cfe50f
|
/lib/lib3d/CalculateVertexNormals.c
|
cd786aa994d8fecf2740aa9dfa48af826de29919
|
[
"Artistic-2.0"
] |
permissive
|
cahirwpz/demoscene
|
a0b548527d89a354b5b8dfd922f39d8b14d61643
|
cd4517ba69e26c96a69e505e305a6d0152972982
|
refs/heads/master
| 2023-03-17T13:06:43.731158
| 2023-03-13T19:48:47
| 2023-03-13T19:48:47
| 3,242,770
| 105
| 21
|
Artistic-2.0
| 2022-10-18T09:43:25
| 2012-01-22T23:03:06
|
C
|
UTF-8
|
C
| false
| false
| 826
|
c
|
CalculateVertexNormals.c
|
#include <3d.h>
#include <system/memory.h>
void CalculateVertexNormals(Mesh3D *mesh) {
mesh->vertexNormal = MemAlloc(sizeof(Point3D) * mesh->vertices,
MEMF_PUBLIC|MEMF_CLEAR);
{
short *normal = (short *)mesh->vertexNormal;
void *faceNormal = mesh->faceNormal;
IndexListT **vertexFaces = mesh->vertexFace;
IndexListT *vertexFace;
while ((vertexFace = *vertexFaces++)) {
short n = vertexFace->count;
short *v = vertexFace->indices;
int nx = 0;
int ny = 0;
int nz = 0;
while (--n >= 0) {
short *fn = (short *)(faceNormal + (short)(*v++ << 3));
nx += *fn++; ny += *fn++; nz += *fn++;
}
*normal++ = div16(nx, n);
*normal++ = div16(ny, n);
*normal++ = div16(nz, n);
normal++;
}
}
}
|
b9d67521b0f73f70975980b75cef32fac83066f0
|
89db60818afeb3dc7c3b7abe9ceae155f074f7f2
|
/src/cmd/plot/libplot/openpl.c
|
6972f95681059c193de7404d012e92e0715e42a8
|
[
"bzip2-1.0.6",
"LPL-1.02",
"MIT"
] |
permissive
|
9fans/plan9port
|
63c3d01928c6f8a8617d3ea6ecc05bac72391132
|
65c090346a38a8c30cb242d345aa71060116340c
|
refs/heads/master
| 2023-08-25T17:14:26.233105
| 2023-08-23T13:21:37
| 2023-08-23T18:47:08
| 26,095,474
| 1,645
| 468
|
NOASSERTION
| 2023-09-05T16:55:41
| 2014-11-02T22:40:13
|
C
|
UTF-8
|
C
| false
| false
| 234
|
c
|
openpl.c
|
#include "mplot.h"
void openpl(char *s){
m_initialize(s);
e0->left=mapminx;
e0->bottom=mapmaxy;
e0->sidex=mapmaxx-mapminx;
e0->sidey=mapminy-mapmaxy;
e0->scalex=e0->sidex;
e0->scaley=e0->sidey;
sscpy(e0, e1);
move(0., 0.);
}
|
5223dd9c711a7f510d28645b6b8e14946f9cefd5
|
76f9898ff7a555f4a729d725056a317af818375d
|
/assets/scenes/dungeons/unfinished_gohma/unfinished_gohma_scene.h
|
5666ebb755646fe8a4bbcb295bc27dab3136b61f
|
[] |
no_license
|
z64proto/sw97
|
0b65837ab2f2a4073faca5670761d7fe0e74d29d
|
f571505ade2cefd4a5b5d19da06d33e7c6b02c60
|
refs/heads/master
| 2023-08-01T02:47:42.895871
| 2022-05-15T20:29:08
| 2022-05-15T20:29:08
| 430,216,978
| 208
| 29
| null | 2021-11-22T12:23:50
| 2021-11-20T21:52:59
|
C
|
UTF-8
|
C
| false
| false
| 978
|
h
|
unfinished_gohma_scene.h
|
extern RomFile unfinished_gohma_sceneRoomList0x000050[];
extern EntranceEntry unfinished_gohma_sceneEntranceList0x000058[];
extern ActorEntry unfinished_gohma_sceneStartPositionList0x000040[];
extern LightSettings unfinished_gohma_sceneLightSettings0x00005C[];
extern ActorEntry unfinished_gohma_sceneStartPositionList0x000040[];
extern RomFile unfinished_gohma_sceneRoomList0x000050[];
extern EntranceEntry unfinished_gohma_sceneEntranceList0x000058[2];
extern LightSettings unfinished_gohma_sceneLightSettings0x00005C[6];
extern CamData unfinished_gohma_sceneCollisionHeader0x002FBC_camDataList_00000090[1];
extern u32 unfinished_gohma_sceneCollisionHeader0x002FBC_polygonTypes_00000098[];
extern CollisionPoly unfinished_gohma_sceneCollisionHeader0x002FBC_polygons_000000A0[];
extern Vec3s unfinished_gohma_sceneCollisionHeader0x002FBC_vtx_00002830[];
extern CollisionHeader unfinished_gohma_sceneCollisionHeader0x002FBC;
extern u64 unfinished_gohma_sceneTex_002FF0[];
|
edde5b4833080d18a46b3c8d4eec54cbb35d3309
|
7c857119fe1505b1d80d6e62969661c06dc1a2f4
|
/NetworkPkg/TcpDxe/TcpMisc.c
|
8b0313a028208edf601d144f7f1a96ea17f3a177
|
[
"BSD-2-Clause"
] |
permissive
|
CloverHackyColor/CloverBootloader
|
7042ca7dd6b513d22be591a295e49071ae1482ee
|
2711170df4f60b2ae5aa20add3e00f35cf57b7e5
|
refs/heads/master
| 2023-08-30T22:14:34.590134
| 2023-08-27T19:14:02
| 2023-08-27T19:14:02
| 205,810,121
| 4,734
| 770
|
BSD-2-Clause
| 2023-09-03T12:41:33
| 2019-09-02T08:22:14
|
C
|
UTF-8
|
C
| false
| false
| 23,734
|
c
|
TcpMisc.c
|
/** @file
Misc support routines for TCP driver.
(C) Copyright 2014 Hewlett-Packard Development Company, L.P.<BR>
Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include "TcpMain.h"
LIST_ENTRY mTcpRunQue = {
&mTcpRunQue,
&mTcpRunQue
};
LIST_ENTRY mTcpListenQue = {
&mTcpListenQue,
&mTcpListenQue
};
TCP_SEQNO mTcpGlobalIss = TCP_BASE_ISS;
CHAR16 *mTcpStateName[] = {
L"TCP_CLOSED",
L"TCP_LISTEN",
L"TCP_SYN_SENT",
L"TCP_SYN_RCVD",
L"TCP_ESTABLISHED",
L"TCP_FIN_WAIT_1",
L"TCP_FIN_WAIT_2",
L"TCP_CLOSING",
L"TCP_TIME_WAIT",
L"TCP_CLOSE_WAIT",
L"TCP_LAST_ACK"
};
/**
Initialize the Tcb local related members.
@param[in, out] Tcb Pointer to the TCP_CB of this TCP instance.
**/
VOID
TcpInitTcbLocal (
IN OUT TCP_CB *Tcb
)
{
//
// Compute the checksum of the fixed parts of pseudo header
//
if (Tcb->Sk->IpVersion == IP_VERSION_4) {
Tcb->HeadSum = NetPseudoHeadChecksum (
Tcb->LocalEnd.Ip.Addr[0],
Tcb->RemoteEnd.Ip.Addr[0],
0x06,
0
);
} else {
Tcb->HeadSum = NetIp6PseudoHeadChecksum (
&Tcb->LocalEnd.Ip.v6,
&Tcb->RemoteEnd.Ip.v6,
0x06,
0
);
}
Tcb->Iss = TcpGetIss ();
Tcb->SndUna = Tcb->Iss;
Tcb->SndNxt = Tcb->Iss;
Tcb->SndWl2 = Tcb->Iss;
Tcb->SndWnd = 536;
Tcb->RcvWnd = GET_RCV_BUFFSIZE (Tcb->Sk);
//
// First window size is never scaled
//
Tcb->RcvWndScale = 0;
Tcb->RetxmitSeqMax = 0;
Tcb->ProbeTimerOn = FALSE;
}
/**
Initialize the peer related members.
@param[in, out] Tcb Pointer to the TCP_CB of this TCP instance.
@param[in] Seg Pointer to the segment that contains the peer's intial info.
@param[in] Opt Pointer to the options announced by the peer.
**/
VOID
TcpInitTcbPeer (
IN OUT TCP_CB *Tcb,
IN TCP_SEG *Seg,
IN TCP_OPTION *Opt
)
{
UINT16 RcvMss;
ASSERT ((Tcb != NULL) && (Seg != NULL) && (Opt != NULL));
ASSERT (TCP_FLG_ON (Seg->Flag, TCP_FLG_SYN));
Tcb->SndWnd = Seg->Wnd;
Tcb->SndWndMax = Tcb->SndWnd;
Tcb->SndWl1 = Seg->Seq;
if (TCP_FLG_ON (Seg->Flag, TCP_FLG_ACK)) {
Tcb->SndWl2 = Seg->Ack;
} else {
Tcb->SndWl2 = Tcb->Iss + 1;
}
if (TCP_FLG_ON (Opt->Flag, TCP_OPTION_RCVD_MSS)) {
Tcb->SndMss = (UINT16) MAX (64, Opt->Mss);
RcvMss = TcpGetRcvMss (Tcb->Sk);
if (Tcb->SndMss > RcvMss) {
Tcb->SndMss = RcvMss;
}
} else {
//
// One end doesn't support MSS option, use default.
//
Tcb->RcvMss = 536;
}
Tcb->CWnd = Tcb->SndMss;
Tcb->Irs = Seg->Seq;
Tcb->RcvNxt = Tcb->Irs + 1;
Tcb->RcvWl2 = Tcb->RcvNxt;
if (TCP_FLG_ON (Opt->Flag, TCP_OPTION_RCVD_WS) && !TCP_FLG_ON (Tcb->CtrlFlag, TCP_CTRL_NO_WS)) {
Tcb->SndWndScale = Opt->WndScale;
Tcb->RcvWndScale = TcpComputeScale (Tcb);
TCP_SET_FLG (Tcb->CtrlFlag, TCP_CTRL_RCVD_WS);
} else {
//
// One end doesn't support window scale option. use zero.
//
Tcb->RcvWndScale = 0;
}
if (TCP_FLG_ON (Opt->Flag, TCP_OPTION_RCVD_TS) && !TCP_FLG_ON (Tcb->CtrlFlag, TCP_CTRL_NO_TS)) {
TCP_SET_FLG (Tcb->CtrlFlag, TCP_CTRL_SND_TS);
TCP_SET_FLG (Tcb->CtrlFlag, TCP_CTRL_RCVD_TS);
Tcb->TsRecent = Opt->TSVal;
//
// Compute the effective SndMss per RFC1122
// section 4.2.2.6. If timestamp option is
// enabled, it will always occupy 12 bytes.
//
Tcb->SndMss -= TCP_OPTION_TS_ALIGNED_LEN;
}
}
/**
Check whether one IP address equals the other.
@param[in] Ip1 Pointer to IP address to be checked.
@param[in] Ip2 Pointer to IP address to be checked.
@param[in] Version IP_VERSION_4 indicates the IP address is an IPv4 address,
IP_VERSION_6 indicates the IP address is an IPv6 address.
@retval TRUE Ip1 equals Ip2.
@retval FALSE Ip1 does not equal Ip2.
**/
BOOLEAN
TcpIsIpEqual (
IN EFI_IP_ADDRESS *Ip1,
IN EFI_IP_ADDRESS *Ip2,
IN UINT8 Version
)
{
ASSERT ((Version == IP_VERSION_4) || (Version == IP_VERSION_6));
if (Version == IP_VERSION_4) {
return (BOOLEAN) (Ip1->Addr[0] == Ip2->Addr[0]);
} else {
return (BOOLEAN) EFI_IP6_EQUAL (&Ip1->v6, &Ip2->v6);
}
}
/**
Check whether one IP address is filled with ZERO.
@param[in] Ip Pointer to the IP address to be checked.
@param[in] Version IP_VERSION_4 indicates the IP address is an IPv4 address,
IP_VERSION_6 indicates the IP address is an IPv6 address.
@retval TRUE Ip is all zero address.
@retval FALSE Ip is not all zero address.
**/
BOOLEAN
TcpIsIpZero (
IN EFI_IP_ADDRESS *Ip,
IN UINT8 Version
)
{
ASSERT ((Version == IP_VERSION_4) || (Version == IP_VERSION_6));
if (Version == IP_VERSION_4) {
return (BOOLEAN) (Ip->Addr[0] == 0);
} else {
return (BOOLEAN) ((Ip->Addr[0] == 0) && (Ip->Addr[1] == 0) &&
(Ip->Addr[2] == 0) && (Ip->Addr[3] == 0));
}
}
/**
Locate a listen TCB that matchs the Local and Remote.
@param[in] Local Pointer to the local (IP, Port).
@param[in] Remote Pointer to the remote (IP, Port).
@param[in] Version IP_VERSION_4 indicates TCP is running on IP4 stack,
IP_VERSION_6 indicates TCP is running on IP6 stack.
@return Pointer to the TCP_CB with the least number of wildcards,
if NULL no match is found.
**/
TCP_CB *
TcpLocateListenTcb (
IN TCP_PEER *Local,
IN TCP_PEER *Remote,
IN UINT8 Version
)
{
LIST_ENTRY *Entry;
TCP_CB *Node;
TCP_CB *Match;
INTN Last;
INTN Cur;
Last = 4;
Match = NULL;
NET_LIST_FOR_EACH (Entry, &mTcpListenQue) {
Node = NET_LIST_USER_STRUCT (Entry, TCP_CB, List);
if ((Version != Node->Sk->IpVersion) ||
(Local->Port != Node->LocalEnd.Port) ||
!TCP_PEER_MATCH (Remote, &Node->RemoteEnd, Version) ||
!TCP_PEER_MATCH (Local, &Node->LocalEnd, Version)
) {
continue;
}
//
// Compute the number of wildcard
//
Cur = 0;
if (TcpIsIpZero (&Node->RemoteEnd.Ip, Version)) {
Cur++;
}
if (Node->RemoteEnd.Port == 0) {
Cur++;
}
if (TcpIsIpZero (&Node->LocalEnd.Ip, Version)) {
Cur++;
}
if (Cur < Last) {
if (Cur == 0) {
return Node;
}
Last = Cur;
Match = Node;
}
}
return Match;
}
/**
Try to find one Tcb whose <Ip, Port> equals to <IN Addr, IN Port>.
@param[in] Addr Pointer to the IP address needs to match.
@param[in] Port The port number needs to match.
@param[in] Version IP_VERSION_4 indicates TCP is running on IP4 stack,
IP_VERSION_6 indicates TCP is running on IP6 stack.
@retval TRUE The Tcb which matches the <Addr Port> pair exists.
@retval FALSE Otherwise
**/
BOOLEAN
TcpFindTcbByPeer (
IN EFI_IP_ADDRESS *Addr,
IN TCP_PORTNO Port,
IN UINT8 Version
)
{
TCP_PORTNO LocalPort;
LIST_ENTRY *Entry;
TCP_CB *Tcb;
ASSERT ((Addr != NULL) && (Port != 0));
LocalPort = HTONS (Port);
NET_LIST_FOR_EACH (Entry, &mTcpListenQue) {
Tcb = NET_LIST_USER_STRUCT (Entry, TCP_CB, List);
if ((Version == Tcb->Sk->IpVersion) &&
TcpIsIpEqual (Addr, &Tcb->LocalEnd.Ip, Version) &&
(LocalPort == Tcb->LocalEnd.Port)
) {
return TRUE;
}
}
NET_LIST_FOR_EACH (Entry, &mTcpRunQue) {
Tcb = NET_LIST_USER_STRUCT (Entry, TCP_CB, List);
if ((Version == Tcb->Sk->IpVersion) &&
TcpIsIpEqual (Addr, &Tcb->LocalEnd.Ip, Version) &&
(LocalPort == Tcb->LocalEnd.Port)
) {
return TRUE;
}
}
return FALSE;
}
/**
Locate the TCP_CB related to the socket pair.
@param[in] LocalPort The local port number.
@param[in] LocalIp The local IP address.
@param[in] RemotePort The remote port number.
@param[in] RemoteIp The remote IP address.
@param[in] Version IP_VERSION_4 indicates TCP is running on IP4 stack,
IP_VERSION_6 indicates TCP is running on IP6 stack.
@param[in] Syn If TRUE, the listen sockets are searched.
@return Pointer to the related TCP_CB. If NULL, no match is found.
**/
TCP_CB *
TcpLocateTcb (
IN TCP_PORTNO LocalPort,
IN EFI_IP_ADDRESS *LocalIp,
IN TCP_PORTNO RemotePort,
IN EFI_IP_ADDRESS *RemoteIp,
IN UINT8 Version,
IN BOOLEAN Syn
)
{
TCP_PEER Local;
TCP_PEER Remote;
LIST_ENTRY *Entry;
TCP_CB *Tcb;
Local.Port = LocalPort;
Remote.Port = RemotePort;
CopyMem (&Local.Ip, LocalIp, sizeof (EFI_IP_ADDRESS));
CopyMem (&Remote.Ip, RemoteIp, sizeof (EFI_IP_ADDRESS));
//
// First check for exact match.
//
NET_LIST_FOR_EACH (Entry, &mTcpRunQue) {
Tcb = NET_LIST_USER_STRUCT (Entry, TCP_CB, List);
if ((Version == Tcb->Sk->IpVersion) &&
TCP_PEER_EQUAL (&Remote, &Tcb->RemoteEnd, Version) &&
TCP_PEER_EQUAL (&Local, &Tcb->LocalEnd, Version)
) {
RemoveEntryList (&Tcb->List);
InsertHeadList (&mTcpRunQue, &Tcb->List);
return Tcb;
}
}
//
// Only check the listen queue when the SYN flag is on.
//
if (Syn) {
return TcpLocateListenTcb (&Local, &Remote, Version);
}
return NULL;
}
/**
Insert a Tcb into the proper queue.
@param[in] Tcb Pointer to the TCP_CB to be inserted.
@retval 0 The Tcb was inserted successfully.
@retval -1 Error condition occurred.
**/
INTN
TcpInsertTcb (
IN TCP_CB *Tcb
)
{
LIST_ENTRY *Entry;
LIST_ENTRY *Head;
TCP_CB *Node;
ASSERT (
(Tcb != NULL) &&
(
(Tcb->State == TCP_LISTEN) ||
(Tcb->State == TCP_SYN_SENT) ||
(Tcb->State == TCP_SYN_RCVD) ||
(Tcb->State == TCP_CLOSED)
)
);
if (Tcb->LocalEnd.Port == 0) {
return -1;
}
Head = &mTcpRunQue;
if (Tcb->State == TCP_LISTEN) {
Head = &mTcpListenQue;
}
//
// Check that the Tcb isn't already on the list.
//
NET_LIST_FOR_EACH (Entry, Head) {
Node = NET_LIST_USER_STRUCT (Entry, TCP_CB, List);
if (TCP_PEER_EQUAL (&Tcb->LocalEnd, &Node->LocalEnd, Tcb->Sk->IpVersion) &&
TCP_PEER_EQUAL (&Tcb->RemoteEnd, &Node->RemoteEnd, Tcb->Sk->IpVersion)
) {
return -1;
}
}
InsertHeadList (Head, &Tcb->List);
return 0;
}
/**
Clone a TCP_CB from Tcb.
@param[in] Tcb Pointer to the TCP_CB to be cloned.
@return Pointer to the new cloned TCP_CB; if NULL, error condition occurred.
**/
TCP_CB *
TcpCloneTcb (
IN TCP_CB *Tcb
)
{
TCP_CB *Clone;
Clone = AllocateZeroPool (sizeof (TCP_CB));
if (Clone == NULL) {
return NULL;
}
CopyMem (Clone, Tcb, sizeof (TCP_CB));
//
// Increase the reference count of the shared IpInfo.
//
NET_GET_REF (Tcb->IpInfo);
InitializeListHead (&Clone->List);
InitializeListHead (&Clone->SndQue);
InitializeListHead (&Clone->RcvQue);
Clone->Sk = SockClone (Tcb->Sk);
if (Clone->Sk == NULL) {
DEBUG ((EFI_D_ERROR, "TcpCloneTcb: failed to clone a sock\n"));
FreePool (Clone);
return NULL;
}
((TCP_PROTO_DATA *) (Clone->Sk->ProtoReserved))->TcpPcb = Clone;
return Clone;
}
/**
Compute an ISS to be used by a new connection.
@return The resulting ISS.
**/
TCP_SEQNO
TcpGetIss (
VOID
)
{
mTcpGlobalIss += TCP_ISS_INCREMENT_1;
return mTcpGlobalIss;
}
/**
Get the local mss.
@param[in] Sock Pointer to the socket to get mss.
@return The mss size.
**/
UINT16
TcpGetRcvMss (
IN SOCKET *Sock
)
{
EFI_IP4_MODE_DATA Ip4Mode;
EFI_IP6_MODE_DATA Ip6Mode;
EFI_IP4_PROTOCOL *Ip4;
EFI_IP6_PROTOCOL *Ip6;
TCP_PROTO_DATA *TcpProto;
ASSERT (Sock != NULL);
ZeroMem (&Ip4Mode, sizeof (EFI_IP4_MODE_DATA));
ZeroMem (&Ip6Mode, sizeof (EFI_IP6_MODE_DATA));
TcpProto = (TCP_PROTO_DATA *) Sock->ProtoReserved;
if (Sock->IpVersion == IP_VERSION_4) {
Ip4 = TcpProto->TcpService->IpIo->Ip.Ip4;
ASSERT (Ip4 != NULL);
Ip4->GetModeData (Ip4, &Ip4Mode, NULL, NULL);
return (UINT16) (Ip4Mode.MaxPacketSize - sizeof (TCP_HEAD));
} else {
Ip6 = TcpProto->TcpService->IpIo->Ip.Ip6;
ASSERT (Ip6 != NULL);
if (!EFI_ERROR (Ip6->GetModeData (Ip6, &Ip6Mode, NULL, NULL))) {
if (Ip6Mode.AddressList != NULL) {
FreePool (Ip6Mode.AddressList);
}
if (Ip6Mode.GroupTable != NULL) {
FreePool (Ip6Mode.GroupTable);
}
if (Ip6Mode.RouteTable != NULL) {
FreePool (Ip6Mode.RouteTable);
}
if (Ip6Mode.NeighborCache != NULL) {
FreePool (Ip6Mode.NeighborCache);
}
if (Ip6Mode.PrefixTable != NULL) {
FreePool (Ip6Mode.PrefixTable);
}
if (Ip6Mode.IcmpTypeList != NULL) {
FreePool (Ip6Mode.IcmpTypeList);
}
}
return (UINT16) (Ip6Mode.MaxPacketSize - sizeof (TCP_HEAD));
}
}
/**
Set the Tcb's state.
@param[in] Tcb Pointer to the TCP_CB of this TCP instance.
@param[in] State The state to be set.
**/
VOID
TcpSetState (
IN TCP_CB *Tcb,
IN UINT8 State
)
{
ASSERT (Tcb->State < (sizeof (mTcpStateName) / sizeof (CHAR16 *)));
ASSERT (State < (sizeof (mTcpStateName) / sizeof (CHAR16 *)));
DEBUG (
(EFI_D_NET,
"Tcb (%p) state %s --> %s\n",
Tcb,
mTcpStateName[Tcb->State],
mTcpStateName[State])
);
Tcb->State = State;
switch (State) {
case TCP_ESTABLISHED:
SockConnEstablished (Tcb->Sk);
if (Tcb->Parent != NULL) {
//
// A new connection is accepted by a listening socket. Install
// the device path.
//
TcpInstallDevicePath (Tcb->Sk);
}
break;
case TCP_CLOSED:
SockConnClosed (Tcb->Sk);
break;
default:
break;
}
}
/**
Compute the TCP segment's checksum.
@param[in] Nbuf Pointer to the buffer that contains the TCP segment.
@param[in] HeadSum The checksum value of the fixed part of pseudo header.
@return The checksum value.
**/
UINT16
TcpChecksum (
IN NET_BUF *Nbuf,
IN UINT16 HeadSum
)
{
UINT16 Checksum;
Checksum = NetbufChecksum (Nbuf);
Checksum = NetAddChecksum (Checksum, HeadSum);
Checksum = NetAddChecksum (
Checksum,
HTONS ((UINT16) Nbuf->TotalSize)
);
return (UINT16) (~Checksum);
}
/**
Translate the information from the head of the received TCP
segment Nbuf contents and fill it into a TCP_SEG structure.
@param[in] Tcb Pointer to the TCP_CB of this TCP instance.
@param[in, out] Nbuf Pointer to the buffer contains the TCP segment.
@return Pointer to the TCP_SEG that contains the translated TCP head information.
**/
TCP_SEG *
TcpFormatNetbuf (
IN TCP_CB *Tcb,
IN OUT NET_BUF *Nbuf
)
{
TCP_SEG *Seg;
TCP_HEAD *Head;
Seg = TCPSEG_NETBUF (Nbuf);
Head = (TCP_HEAD *) NetbufGetByte (Nbuf, 0, NULL);
ASSERT (Head != NULL);
Nbuf->Tcp = Head;
Seg->Seq = NTOHL (Head->Seq);
Seg->Ack = NTOHL (Head->Ack);
Seg->End = Seg->Seq + (Nbuf->TotalSize - (Head->HeadLen << 2));
Seg->Urg = NTOHS (Head->Urg);
Seg->Wnd = (NTOHS (Head->Wnd) << Tcb->SndWndScale);
Seg->Flag = Head->Flag;
//
// SYN and FIN flag occupy one sequence space each.
//
if (TCP_FLG_ON (Seg->Flag, TCP_FLG_SYN)) {
//
// RFC requires that the initial window not be scaled.
//
Seg->Wnd = NTOHS (Head->Wnd);
Seg->End++;
}
if (TCP_FLG_ON (Seg->Flag, TCP_FLG_FIN)) {
Seg->End++;
}
return Seg;
}
/**
Initialize an active connection.
@param[in, out] Tcb Pointer to the TCP_CB that wants to initiate a
connection.
**/
VOID
TcpOnAppConnect (
IN OUT TCP_CB *Tcb
)
{
TcpInitTcbLocal (Tcb);
TcpSetState (Tcb, TCP_SYN_SENT);
TcpSetTimer (Tcb, TCP_TIMER_CONNECT, Tcb->ConnectTimeout);
TcpToSendData (Tcb, 1);
}
/**
Initiate the connection close procedure, called when
applications want to close the connection.
@param[in, out] Tcb Pointer to the TCP_CB of this TCP instance.
**/
VOID
TcpOnAppClose (
IN OUT TCP_CB *Tcb
)
{
ASSERT (Tcb != NULL);
if (!IsListEmpty (&Tcb->RcvQue) || GET_RCV_DATASIZE (Tcb->Sk) != 0) {
DEBUG (
(EFI_D_WARN,
"TcpOnAppClose: connection reset because data is lost for TCB %p\n",
Tcb)
);
TcpResetConnection (Tcb);
TcpClose (Tcb);
return;
}
switch (Tcb->State) {
case TCP_CLOSED:
case TCP_LISTEN:
case TCP_SYN_SENT:
TcpSetState (Tcb, TCP_CLOSED);
break;
case TCP_SYN_RCVD:
case TCP_ESTABLISHED:
TcpSetState (Tcb, TCP_FIN_WAIT_1);
break;
case TCP_CLOSE_WAIT:
TcpSetState (Tcb, TCP_LAST_ACK);
break;
default:
break;
}
TcpToSendData (Tcb, 1);
}
/**
Check whether the application's newly delivered data can be sent out.
@param[in, out] Tcb Pointer to the TCP_CB of this TCP instance.
@retval 0 The data has been sent out successfully.
@retval -1 The Tcb is not in a state that data is permitted to
be sent out.
**/
INTN
TcpOnAppSend (
IN OUT TCP_CB *Tcb
)
{
switch (Tcb->State) {
case TCP_CLOSED:
return -1;
case TCP_LISTEN:
return -1;
case TCP_SYN_SENT:
case TCP_SYN_RCVD:
return 0;
case TCP_ESTABLISHED:
case TCP_CLOSE_WAIT:
TcpToSendData (Tcb, 0);
return 0;
case TCP_FIN_WAIT_1:
case TCP_FIN_WAIT_2:
case TCP_CLOSING:
case TCP_LAST_ACK:
case TCP_TIME_WAIT:
return -1;
default:
break;
}
return 0;
}
/**
Application has consumed some data. Check whether
to send a window update ack or a delayed ack.
@param[in] Tcb Pointer to the TCP_CB of this TCP instance.
**/
VOID
TcpOnAppConsume (
IN TCP_CB *Tcb
)
{
UINT32 TcpOld;
switch (Tcb->State) {
case TCP_ESTABLISHED:
TcpOld = TcpRcvWinOld (Tcb);
if (TcpRcvWinNow (Tcb) > TcpOld) {
if (TcpOld < Tcb->RcvMss) {
DEBUG (
(EFI_D_NET,
"TcpOnAppConsume: send a window update for a window closed Tcb %p\n",
Tcb)
);
TcpSendAck (Tcb);
} else if (Tcb->DelayedAck == 0) {
DEBUG (
(EFI_D_NET,
"TcpOnAppConsume: scheduled a delayed ACK to update window for Tcb %p\n",
Tcb)
);
Tcb->DelayedAck = 1;
}
}
break;
default:
break;
}
}
/**
Abort the connection by sending a reset segment. Called
when the application wants to abort the connection.
@param[in] Tcb Pointer to the TCP_CB of the TCP instance.
**/
VOID
TcpOnAppAbort (
IN TCP_CB *Tcb
)
{
DEBUG (
(EFI_D_WARN,
"TcpOnAppAbort: connection reset issued by application for TCB %p\n",
Tcb)
);
switch (Tcb->State) {
case TCP_SYN_RCVD:
case TCP_ESTABLISHED:
case TCP_FIN_WAIT_1:
case TCP_FIN_WAIT_2:
case TCP_CLOSE_WAIT:
TcpResetConnection (Tcb);
break;
default:
break;
}
TcpSetState (Tcb, TCP_CLOSED);
}
/**
Reset the connection related with Tcb.
@param[in] Tcb Pointer to the TCP_CB of the connection to be reset.
**/
VOID
TcpResetConnection (
IN TCP_CB *Tcb
)
{
NET_BUF *Nbuf;
TCP_HEAD *Nhead;
Nbuf = NetbufAlloc (TCP_MAX_HEAD);
if (Nbuf == NULL) {
return ;
}
Nhead = (TCP_HEAD *) NetbufAllocSpace (
Nbuf,
sizeof (TCP_HEAD),
NET_BUF_TAIL
);
ASSERT (Nhead != NULL);
Nbuf->Tcp = Nhead;
Nhead->Flag = TCP_FLG_RST;
Nhead->Seq = HTONL (Tcb->SndNxt);
Nhead->Ack = HTONL (Tcb->RcvNxt);
Nhead->SrcPort = Tcb->LocalEnd.Port;
Nhead->DstPort = Tcb->RemoteEnd.Port;
Nhead->HeadLen = (UINT8) (sizeof (TCP_HEAD) >> 2);
Nhead->Res = 0;
Nhead->Wnd = HTONS (0xFFFF);
Nhead->Checksum = 0;
Nhead->Urg = 0;
Nhead->Checksum = TcpChecksum (Nbuf, Tcb->HeadSum);
TcpSendIpPacket (Tcb, Nbuf, &Tcb->LocalEnd.Ip, &Tcb->RemoteEnd.Ip, Tcb->Sk->IpVersion);
NetbufFree (Nbuf);
}
/**
Install the device path protocol on the TCP instance.
@param[in] Sock Pointer to the socket representing the TCP instance.
@retval EFI_SUCCESS The device path protocol was installed.
@retval other Failed to install the device path protocol.
**/
EFI_STATUS
TcpInstallDevicePath (
IN SOCKET *Sock
)
{
TCP_PROTO_DATA *TcpProto;
TCP_SERVICE_DATA *TcpService;
TCP_CB *Tcb;
IPv4_DEVICE_PATH Ip4DPathNode;
IPv6_DEVICE_PATH Ip6DPathNode;
EFI_DEVICE_PATH_PROTOCOL *DevicePath;
EFI_STATUS Status;
TCP_PORTNO LocalPort;
TCP_PORTNO RemotePort;
TcpProto = (TCP_PROTO_DATA *) Sock->ProtoReserved;
TcpService = TcpProto->TcpService;
Tcb = TcpProto->TcpPcb;
LocalPort = NTOHS (Tcb->LocalEnd.Port);
RemotePort = NTOHS (Tcb->RemoteEnd.Port);
if (Sock->IpVersion == IP_VERSION_4) {
NetLibCreateIPv4DPathNode (
&Ip4DPathNode,
TcpService->ControllerHandle,
Tcb->LocalEnd.Ip.Addr[0],
LocalPort,
Tcb->RemoteEnd.Ip.Addr[0],
RemotePort,
EFI_IP_PROTO_TCP,
Tcb->UseDefaultAddr
);
IP4_COPY_ADDRESS (&Ip4DPathNode.SubnetMask, &Tcb->SubnetMask);
DevicePath = (EFI_DEVICE_PATH_PROTOCOL *) &Ip4DPathNode;
} else {
NetLibCreateIPv6DPathNode (
&Ip6DPathNode,
TcpService->ControllerHandle,
&Tcb->LocalEnd.Ip.v6,
LocalPort,
&Tcb->RemoteEnd.Ip.v6,
RemotePort,
EFI_IP_PROTO_TCP
);
DevicePath = (EFI_DEVICE_PATH_PROTOCOL *) &Ip6DPathNode;
}
Sock->DevicePath = AppendDevicePathNode (Sock->ParentDevicePath, DevicePath);
if (Sock->DevicePath == NULL) {
return EFI_OUT_OF_RESOURCES;
}
Status = gBS->InstallProtocolInterface (
&Sock->SockHandle,
&gEfiDevicePathProtocolGuid,
EFI_NATIVE_INTERFACE,
Sock->DevicePath
);
if (EFI_ERROR (Status)) {
FreePool (Sock->DevicePath);
Sock->DevicePath = NULL;
}
return Status;
}
|
77cc3a9e31cb7d30c3c173c8613d3b0f2c8c9936
|
010279e2ba272d09e9d2c4e903722e5faba2cf7a
|
/contrib/tools/python/src/Objects/stringlib/fastsearch.h
|
e231c587e4764fe281861759d76de7a8da9ec891
|
[
"Apache-2.0"
] |
permissive
|
catboost/catboost
|
854c1a1f439a96f1ae6b48e16644be20aa04dba2
|
f5042e35b945aded77b23470ead62d7eacefde92
|
refs/heads/master
| 2023-09-01T12:14:14.174108
| 2023-09-01T10:01:01
| 2023-09-01T10:22:12
| 97,556,265
| 8,012
| 1,425
|
Apache-2.0
| 2023-09-11T03:32:32
| 2017-07-18T05:29:04
|
Python
|
UTF-8
|
C
| false
| false
| 4,966
|
h
|
fastsearch.h
|
/* stringlib: fastsearch implementation */
#ifndef STRINGLIB_FASTSEARCH_H
#define STRINGLIB_FASTSEARCH_H
/* fast search/count implementation, based on a mix between boyer-
moore and horspool, with a few more bells and whistles on the top.
for some more background, see: http://effbot.org/zone/stringlib.htm */
/* note: fastsearch may access s[n], which isn't a problem when using
Python's ordinary string types, but may cause problems if you're
using this code in other contexts. also, the count mode returns -1
if there cannot possible be a match in the target string, and 0 if
it has actually checked for matches, but didn't find any. callers
beware! */
#define FAST_COUNT 0
#define FAST_SEARCH 1
#define FAST_RSEARCH 2
#if LONG_BIT >= 128
#define STRINGLIB_BLOOM_WIDTH 128
#elif LONG_BIT >= 64
#define STRINGLIB_BLOOM_WIDTH 64
#elif LONG_BIT >= 32
#define STRINGLIB_BLOOM_WIDTH 32
#else
#error "LONG_BIT is smaller than 32"
#endif
#define STRINGLIB_BLOOM_ADD(mask, ch) \
((mask |= (1UL << ((ch) & (STRINGLIB_BLOOM_WIDTH -1)))))
#define STRINGLIB_BLOOM(mask, ch) \
((mask & (1UL << ((ch) & (STRINGLIB_BLOOM_WIDTH -1)))))
Py_LOCAL_INLINE(Py_ssize_t)
fastsearch(const STRINGLIB_CHAR* s, Py_ssize_t n,
const STRINGLIB_CHAR* p, Py_ssize_t m,
Py_ssize_t maxcount, int mode)
{
unsigned long mask;
Py_ssize_t skip, count = 0;
Py_ssize_t i, j, mlast, w;
w = n - m;
if (w < 0 || (mode == FAST_COUNT && maxcount == 0))
return -1;
/* look for special cases */
if (m <= 1) {
if (m <= 0)
return -1;
/* use special case for 1-character strings */
if (mode == FAST_COUNT) {
for (i = 0; i < n; i++)
if (s[i] == p[0]) {
count++;
if (count == maxcount)
return maxcount;
}
return count;
} else if (mode == FAST_SEARCH) {
for (i = 0; i < n; i++)
if (s[i] == p[0])
return i;
} else { /* FAST_RSEARCH */
for (i = n - 1; i > -1; i--)
if (s[i] == p[0])
return i;
}
return -1;
}
mlast = m - 1;
skip = mlast - 1;
mask = 0;
if (mode != FAST_RSEARCH) {
/* create compressed boyer-moore delta 1 table */
/* process pattern[:-1] */
for (i = 0; i < mlast; i++) {
STRINGLIB_BLOOM_ADD(mask, p[i]);
if (p[i] == p[mlast])
skip = mlast - i - 1;
}
/* process pattern[-1] outside the loop */
STRINGLIB_BLOOM_ADD(mask, p[mlast]);
for (i = 0; i <= w; i++) {
/* note: using mlast in the skip path slows things down on x86 */
if (s[i+m-1] == p[m-1]) {
/* candidate match */
for (j = 0; j < mlast; j++)
if (s[i+j] != p[j])
break;
if (j == mlast) {
/* got a match! */
if (mode != FAST_COUNT)
return i;
count++;
if (count == maxcount)
return maxcount;
i = i + mlast;
continue;
}
/* miss: check if next character is part of pattern */
if (!STRINGLIB_BLOOM(mask, s[i+m]))
i = i + m;
else
i = i + skip;
} else {
/* skip: check if next character is part of pattern */
if (!STRINGLIB_BLOOM(mask, s[i+m]))
i = i + m;
}
}
} else { /* FAST_RSEARCH */
/* create compressed boyer-moore delta 1 table */
/* process pattern[0] outside the loop */
STRINGLIB_BLOOM_ADD(mask, p[0]);
/* process pattern[:0:-1] */
for (i = mlast; i > 0; i--) {
STRINGLIB_BLOOM_ADD(mask, p[i]);
if (p[i] == p[0])
skip = i - 1;
}
for (i = w; i >= 0; i--) {
if (s[i] == p[0]) {
/* candidate match */
for (j = mlast; j > 0; j--)
if (s[i+j] != p[j])
break;
if (j == 0)
/* got a match! */
return i;
/* miss: check if previous character is part of pattern */
if (i > 0 && !STRINGLIB_BLOOM(mask, s[i-1]))
i = i - m;
else
i = i - skip;
} else {
/* skip: check if previous character is part of pattern */
if (i > 0 && !STRINGLIB_BLOOM(mask, s[i-1]))
i = i - m;
}
}
}
if (mode != FAST_COUNT)
return -1;
return count;
}
#endif
|
3ca9c30c9f7370628ca43cd8c762f6353c418e54
|
60e96ca65710f36b79c8e080abec8750ced7e6a0
|
/include/pdclib/_PDCLIB_print.h
|
da98c1a650b440d2598497cb8c7b66fca0bb0a04
|
[
"LicenseRef-scancode-public-domain",
"CC0-1.0"
] |
permissive
|
DevSolar/pdclib
|
9301c5411942266bfbb3e8eb22cf8357365a67f5
|
7d471427fa986a9f4cafb069af17821ee7868141
|
refs/heads/master
| 2022-04-26T23:16:41.517901
| 2022-03-28T08:05:43
| 2022-03-28T08:05:43
| 138,836,991
| 203
| 37
|
NOASSERTION
| 2021-04-14T15:51:24
| 2018-06-27T06:07:39
|
C
|
UTF-8
|
C
| false
| false
| 2,286
|
h
|
_PDCLIB_print.h
|
/* PDCLib printf logic <_PDCLIB_print.h>
This file is part of the Public Domain C Library (PDCLib).
Permission is granted to use, modify, and / or redistribute at will.
*/
#ifndef _PDCLIB_PRINT_H
#define _PDCLIB_PRINT_H _PDCLIB_PRINT_H
#include "pdclib/_PDCLIB_internal.h"
#include <stddef.h>
#include <stdint.h>
#include <stdio.h>
/* This macro delivers a given character to either a memory buffer or a stream,
depending on the contents of 'status' (struct _PDCLIB_status_t).
x - the character to be delivered
i - pointer to number of characters already delivered in this call
n - pointer to maximum number of characters to be delivered in this call
s - the buffer into which the character shall be delivered
*/
#define PUT( x ) \
do { \
int character = x; \
if ( status->i < status->n ) { \
if ( status->stream != NULL ) \
putc( character, status->stream ); \
else \
status->s[status->i] = character; \
} \
++(status->i); \
} while ( 0 )
/* Using an integer's bits as flags for both the conversion flags and length
modifiers.
*/
#define E_minus (INT32_C(1)<<0)
#define E_plus (INT32_C(1)<<1)
#define E_alt (INT32_C(1)<<2)
#define E_space (INT32_C(1)<<3)
#define E_zero (INT32_C(1)<<4)
#define E_done (INT32_C(1)<<5)
#define E_char (INT32_C(1)<<6)
#define E_short (INT32_C(1)<<7)
#define E_long (INT32_C(1)<<8)
#define E_llong (INT32_C(1)<<9)
#define E_intmax (INT32_C(1)<<10)
#define E_size (INT32_C(1)<<11)
#define E_ptrdiff (INT32_C(1)<<12)
#define E_pointer (INT32_C(1)<<13)
#define E_double (INT32_C(1)<<14)
#define E_ldouble (INT32_C(1)<<15)
#define E_decimal (INT32_C(1)<<18)
#define E_exponent (INT32_C(1)<<19)
#define E_generic (INT32_C(1)<<20)
#define E_hexa (INT32_C(1)<<21)
#define E_lower (INT32_C(1)<<16)
#define E_unsigned (INT32_C(1)<<17)
void _PDCLIB_print_integer( struct _PDCLIB_imaxdiv_t div, struct _PDCLIB_status_t * status );
void _PDCLIB_print_string( const char * s, struct _PDCLIB_status_t * status );
void _PDCLIB_print_double( double value, struct _PDCLIB_status_t * status );
void _PDCLIB_print_ldouble( long double value, struct _PDCLIB_status_t * status );
#endif
|
5994856a3f11365e774de79cf28f4cb25c324572
|
0744dcc5394cebf57ebcba343747af6871b67017
|
/os/board/rtl8730e/src/component/soc/amebad2/atf/include/plat/arm/common/plat_arm.h
|
1b59795293bbfeb86604fd27173cfb56647c55ab
|
[
"GPL-1.0-or-later",
"BSD-3-Clause",
"ISC",
"MIT",
"LicenseRef-scancode-warranty-disclaimer",
"LicenseRef-scancode-other-permissive",
"Apache-2.0"
] |
permissive
|
Samsung/TizenRT
|
96abf62f1853f61fcf91ff14671a5e0c6ca48fdb
|
1a5c2e00a4b1bbf4c505bbf5cc6a8259e926f686
|
refs/heads/master
| 2023-08-31T08:59:33.327998
| 2023-08-08T06:09:20
| 2023-08-31T04:38:20
| 82,517,252
| 590
| 719
|
Apache-2.0
| 2023-09-14T06:54:49
| 2017-02-20T04:38:30
|
C
|
UTF-8
|
C
| false
| false
| 11,016
|
h
|
plat_arm.h
|
/*
* Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef PLAT_ARM_H
#define PLAT_ARM_H
#include <stdbool.h>
#include <stdint.h>
#include <drivers/arm/tzc_common.h>
#include <lib/bakery_lock.h>
#include <lib/cassert.h>
#include <lib/el3_runtime/cpu_data.h>
#include <lib/spinlock.h>
#include <lib/utils_def.h>
#include <lib/xlat_tables/xlat_tables_compat.h>
/*******************************************************************************
* Forward declarations
******************************************************************************/
struct meminfo;
struct image_info;
struct bl_params;
typedef struct arm_tzc_regions_info {
unsigned long long base;
unsigned long long end;
unsigned int sec_attr;
unsigned int nsaid_permissions;
} arm_tzc_regions_info_t;
/*******************************************************************************
* Default mapping definition of the TrustZone Controller for ARM standard
* platforms.
* Configure:
* - Region 0 with no access;
* - Region 1 with secure access only;
* - the remaining DRAM regions access from the given Non-Secure masters.
******************************************************************************/
#if SPM_MM
#define ARM_TZC_REGIONS_DEF \
{ARM_AP_TZC_DRAM1_BASE, ARM_EL3_TZC_DRAM1_END, \
TZC_REGION_S_RDWR, 0}, \
{ARM_NS_DRAM1_BASE, ARM_NS_DRAM1_END, ARM_TZC_NS_DRAM_S_ACCESS, \
PLAT_ARM_TZC_NS_DEV_ACCESS}, \
{ARM_DRAM2_BASE, ARM_DRAM2_END, ARM_TZC_NS_DRAM_S_ACCESS, \
PLAT_ARM_TZC_NS_DEV_ACCESS}, \
{PLAT_SP_IMAGE_NS_BUF_BASE, (PLAT_SP_IMAGE_NS_BUF_BASE + \
PLAT_SP_IMAGE_NS_BUF_SIZE) - 1, TZC_REGION_S_NONE, \
PLAT_ARM_TZC_NS_DEV_ACCESS}
#else
#define ARM_TZC_REGIONS_DEF \
{ARM_AP_TZC_DRAM1_BASE, ARM_EL3_TZC_DRAM1_END, \
TZC_REGION_S_RDWR, 0}, \
{ARM_NS_DRAM1_BASE, ARM_NS_DRAM1_END, ARM_TZC_NS_DRAM_S_ACCESS, \
PLAT_ARM_TZC_NS_DEV_ACCESS}, \
{ARM_DRAM2_BASE, ARM_DRAM2_END, ARM_TZC_NS_DRAM_S_ACCESS, \
PLAT_ARM_TZC_NS_DEV_ACCESS}
#endif
#define ARM_CASSERT_MMAP \
CASSERT((ARRAY_SIZE(plat_arm_mmap) - 1) <= PLAT_ARM_MMAP_ENTRIES, \
assert_plat_arm_mmap_mismatch); \
CASSERT((PLAT_ARM_MMAP_ENTRIES + ARM_BL_REGIONS) \
<= MAX_MMAP_REGIONS, \
assert_max_mmap_regions);
void arm_setup_romlib(void);
#if defined(IMAGE_BL31) || (!defined(__aarch64__) && defined(IMAGE_BL32))
/*
* Use this macro to instantiate lock before it is used in below
* arm_lock_xxx() macros
*/
#define ARM_INSTANTIATE_LOCK static DEFINE_BAKERY_LOCK(arm_lock)
#define ARM_LOCK_GET_INSTANCE (&arm_lock)
#if !HW_ASSISTED_COHERENCY
#define ARM_SCMI_INSTANTIATE_LOCK DEFINE_BAKERY_LOCK(arm_scmi_lock)
#else
#define ARM_SCMI_INSTANTIATE_LOCK spinlock_t arm_scmi_lock
#endif
#define ARM_SCMI_LOCK_GET_INSTANCE (&arm_scmi_lock)
/*
* These are wrapper macros to the Coherent Memory Bakery Lock API.
*/
#define arm_lock_init() bakery_lock_init(&arm_lock)
#define arm_lock_get() bakery_lock_get(&arm_lock)
#define arm_lock_release() bakery_lock_release(&arm_lock)
#else
/*
* Empty macros for all other BL stages other than BL31 and BL32
*/
#define ARM_INSTANTIATE_LOCK static int arm_lock __unused
#define ARM_LOCK_GET_INSTANCE 0
#define arm_lock_init()
#define arm_lock_get()
#define arm_lock_release()
#endif /* defined(IMAGE_BL31) || (!defined(__aarch64__) && defined(IMAGE_BL32)) */
#if ARM_RECOM_STATE_ID_ENC
/*
* Macros used to parse state information from State-ID if it is using the
* recommended encoding for State-ID.
*/
#define ARM_LOCAL_PSTATE_WIDTH 4
#define ARM_LOCAL_PSTATE_MASK ((1 << ARM_LOCAL_PSTATE_WIDTH) - 1)
/* Macros to construct the composite power state */
/* Make composite power state parameter till power level 0 */
#if PSCI_EXTENDED_STATE_ID
#define arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \
(((lvl0_state) << PSTATE_ID_SHIFT) | ((type) << PSTATE_TYPE_SHIFT))
#else
#define arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \
(((lvl0_state) << PSTATE_ID_SHIFT) | \
((pwr_lvl) << PSTATE_PWR_LVL_SHIFT) | \
((type) << PSTATE_TYPE_SHIFT))
#endif /* __PSCI_EXTENDED_STATE_ID__ */
/* Make composite power state parameter till power level 1 */
#define arm_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type) \
(((lvl1_state) << ARM_LOCAL_PSTATE_WIDTH) | \
arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type))
/* Make composite power state parameter till power level 2 */
#define arm_make_pwrstate_lvl2(lvl2_state, lvl1_state, lvl0_state, pwr_lvl, type) \
(((lvl2_state) << (ARM_LOCAL_PSTATE_WIDTH * 2)) | \
arm_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type))
#endif /* __ARM_RECOM_STATE_ID_ENC__ */
/* ARM State switch error codes */
#define STATE_SW_E_PARAM (-2)
#define STATE_SW_E_DENIED (-3)
/* plat_get_rotpk_info() flags */
#define ARM_ROTPK_REGS_ID 1
#define ARM_ROTPK_DEVEL_RSA_ID 2
#define ARM_ROTPK_DEVEL_ECDSA_ID 3
/* IO storage utility functions */
int arm_io_setup(void);
/* Security utility functions */
void arm_tzc400_setup(uintptr_t tzc_base,
const arm_tzc_regions_info_t *tzc_regions);
struct tzc_dmc500_driver_data;
void arm_tzc_dmc500_setup(struct tzc_dmc500_driver_data *plat_driver_data,
const arm_tzc_regions_info_t *tzc_regions);
/* Console utility functions */
void arm_console_boot_init(void);
void arm_console_boot_end(void);
void arm_console_runtime_init(void);
void arm_console_runtime_end(void);
/* Systimer utility function */
void arm_configure_sys_timer(void);
/* PM utility functions */
int arm_validate_power_state(unsigned int power_state,
psci_power_state_t *req_state);
int arm_validate_psci_entrypoint(uintptr_t entrypoint);
int arm_validate_ns_entrypoint(uintptr_t entrypoint);
void arm_system_pwr_domain_save(void);
void arm_system_pwr_domain_resume(void);
int arm_psci_read_mem_protect(int *enabled);
int arm_nor_psci_write_mem_protect(int val);
void arm_nor_psci_do_static_mem_protect(void);
void arm_nor_psci_do_dyn_mem_protect(void);
int arm_psci_mem_protect_chk(uintptr_t base, u_register_t length);
/* Topology utility function */
int arm_check_mpidr(u_register_t mpidr);
/* BL1 utility functions */
void arm_bl1_early_platform_setup(void);
void arm_bl1_platform_setup(void);
void arm_bl1_plat_arch_setup(void);
/* BL2 utility functions */
void arm_bl2_early_platform_setup(uintptr_t tb_fw_config, struct meminfo *mem_layout);
void arm_bl2_platform_setup(void);
void arm_bl2_plat_arch_setup(void);
uint32_t arm_get_spsr_for_bl32_entry(void);
uint32_t arm_get_spsr_for_bl33_entry(void);
int arm_bl2_plat_handle_post_image_load(unsigned int image_id);
int arm_bl2_handle_post_image_load(unsigned int image_id);
struct bl_params *arm_get_next_bl_params(void);
/* BL2 at EL3 functions */
void arm_bl2_el3_early_platform_setup(void);
void arm_bl2_el3_plat_arch_setup(void);
/* BL2U utility functions */
void arm_bl2u_early_platform_setup(struct meminfo *mem_layout,
void *plat_info);
void arm_bl2u_platform_setup(void);
void arm_bl2u_plat_arch_setup(void);
/* BL31 utility functions */
void arm_bl31_early_platform_setup(void *from_bl2, uintptr_t soc_fw_config,
uintptr_t hw_config, void *plat_params_from_bl2);
void arm_bl31_platform_setup(void);
void arm_bl31_plat_runtime_setup(void);
void arm_bl31_plat_arch_setup(void);
/* TSP utility functions */
void arm_tsp_early_platform_setup(void);
/* SP_MIN utility functions */
void arm_sp_min_early_platform_setup(void *from_bl2, uintptr_t tos_fw_config,
uintptr_t hw_config, void *plat_params_from_bl2);
void arm_sp_min_plat_runtime_setup(void);
void arm_sp_min_plat_arch_setup(void);
/* FIP TOC validity check */
bool arm_io_is_toc_valid(void);
/* Utility functions for Dynamic Config */
void arm_bl2_dyn_cfg_init(void);
void arm_bl1_set_mbedtls_heap(void);
int arm_get_mbedtls_heap(void **heap_addr, size_t *heap_size);
#if MEASURED_BOOT
/* Measured boot related functions */
void arm_bl1_set_bl2_hash(image_desc_t *image_desc);
#endif
/*
* Free the memory storing initialization code only used during an images boot
* time so it can be reclaimed for runtime data
*/
void arm_free_init_memory(void);
/*
* Make the higher level translation tables read-only
*/
void arm_xlat_make_tables_readonly(void);
/*
* Mandatory functions required in ARM standard platforms
*/
unsigned int plat_arm_get_cluster_core_count(u_register_t mpidr);
void plat_arm_gic_driver_init(void);
void plat_arm_gic_init(void);
void plat_arm_gic_cpuif_enable(void);
void plat_arm_gic_cpuif_disable(void);
void plat_arm_gic_redistif_on(void);
void plat_arm_gic_redistif_off(void);
void plat_arm_gic_pcpu_init(void);
void plat_arm_gic_save(void);
void plat_arm_gic_resume(void);
void plat_arm_security_setup(void);
void plat_arm_pwrc_setup(void);
void plat_arm_interconnect_init(void);
void plat_arm_interconnect_enter_coherency(void);
void plat_arm_interconnect_exit_coherency(void);
void plat_arm_program_trusted_mailbox(uintptr_t address);
bool plat_arm_bl1_fwu_needed(void);
__dead2 void plat_arm_error_handler(int err);
/*
* Optional functions in ARM standard platforms
*/
void plat_arm_override_gicr_frames(const uintptr_t *plat_gicr_frames);
int arm_get_rotpk_info(void *cookie, void **key_ptr, unsigned int *key_len,
unsigned int *flags);
int arm_get_rotpk_info_regs(void **key_ptr, unsigned int *key_len,
unsigned int *flags);
int arm_get_rotpk_info_cc(void **key_ptr, unsigned int *key_len,
unsigned int *flags);
int arm_get_rotpk_info_dev(void **key_ptr, unsigned int *key_len,
unsigned int *flags);
#if ARM_PLAT_MT
unsigned int plat_arm_get_cpu_pe_count(u_register_t mpidr);
#endif
/*
* This function is called after loading SCP_BL2 image and it is used to perform
* any platform-specific actions required to handle the SCP firmware.
*/
int plat_arm_bl2_handle_scp_bl2(struct image_info *scp_bl2_image_info);
/*
* Optional functions required in ARM standard platforms
*/
void plat_arm_io_setup(void);
int plat_arm_get_alt_image_source(
unsigned int image_id,
uintptr_t *dev_handle,
uintptr_t *image_spec);
unsigned int plat_arm_calc_core_pos(u_register_t mpidr);
const mmap_region_t *plat_arm_get_mmap(void);
/* Allow platform to override psci_pm_ops during runtime */
const plat_psci_ops_t *plat_arm_psci_override_pm_ops(plat_psci_ops_t *ops);
/* Execution state switch in ARM platforms */
int arm_execution_state_switch(unsigned int smc_fid,
uint32_t pc_hi,
uint32_t pc_lo,
uint32_t cookie_hi,
uint32_t cookie_lo,
void *handle);
/* Optional functions for SP_MIN */
void plat_arm_sp_min_early_platform_setup(u_register_t arg0, u_register_t arg1,
u_register_t arg2, u_register_t arg3);
/* global variables */
extern plat_psci_ops_t plat_arm_psci_pm_ops;
extern const mmap_region_t plat_arm_mmap[];
extern const unsigned int arm_pm_idle_states[];
/* secure watchdog */
void plat_arm_secure_wdt_start(void);
void plat_arm_secure_wdt_stop(void);
/* Get SOC-ID of ARM platform */
uint32_t plat_arm_get_soc_id(void);
#endif /* PLAT_ARM_H */
|
aff1ce4a2a00bc875c7f468c0ae710654bf860ca
|
f8c0a188d1cf8ae5221c4cd11552c221a86e259a
|
/Firmware/AX3gs/Firmware/src/main.h
|
a36be25728fe4e994ddaf814ba466107ab739501
|
[
"CC-BY-3.0",
"BSD-2-Clause"
] |
permissive
|
digitalinteraction/openmovement
|
6310abf35b379655073485e84719cc2521733c0e
|
9c2ee2eeb5eae457673e60699b2842c6df82abb1
|
refs/heads/master
| 2023-08-03T23:48:42.973605
| 2023-07-26T17:52:37
| 2023-07-26T17:52:37
| 27,082,024
| 135
| 86
| null | 2018-06-21T23:32:43
| 2014-11-24T15:38:43
|
C
|
UTF-8
|
C
| false
| false
| 3,161
|
h
|
main.h
|
/*
* Copyright (c) 2009-2012, Newcastle University, UK.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
* main.h
* KL 09-06-2011
*/
// Super Essential Defines / Pre-compiler stuff
#define USE_AND_OR /* To enable AND_OR mask setting */
// Includes
#include <Compiler.h>
//#include <p24Fxxxx.h>
#include <TimeDelay.h>
#include <Graphics/Graphics.h>
#include <Graphics/Primitive.h>
#include "USB/USB.h"
#include "USB/usb_function_msd.h"
#include "HardwareProfile.h"
#include "NandFlash.h"
#include "USB_CDC_MSD.h"
#include "FSconfig.h"
#include "util.h"
#include "FSIO.h"
#include "FSDefs.h"
#include "Data.h"
#include "display.h"
#include "SSD1308.h"
#include "LCDBasicFont.h"
#include "myGraphics.h"
#include "accel.h"
#include "gyro.h"
#include "Analogue.h"
#include <string.h>
#include <Rtcc.h>
#include "myRTC.h"
#include "ConfigFile.h"
// Globals
// Defines
// Config settings
/*24 bit config 1 0b<unimp>0000<unimp>0000<res>0<jtag off>0<code prot off>1<prog writes on>1<debug off>1<res>1<EMUD1>11<wdtoff>0<stdrd wdt>1<unimp>0<wdt pres 32>1<wdt posc see table>****>*/
/*
WDT bits
1111 = 1:32,768
1110 = 1:16,384
1101 = 1:8,192
1100 = 1:4,096
1011 = 1:2,048
1010 = 1:1,024
1001 = 1:512
1000 = 1:256
0111 = 1:128
0110 = 1:64
0101 = 1:32
0100 = 1:16
0011 = 1:8
0010 = 1:4
0001 = 1:2
0000 = 1:1
*/
_CONFIG1(0b000000000011111101001001)
/*24 bit config 2 0b<unimp>0000<unimp>0000<IESO off>0<plldiv2>001<plldis off>0<init osc = frc>000<clock switch en>01<no clk op>0<iolock on-off en>0<usb vreg off>1<res>1<prim osc off>11>*/
_CONFIG2(0b000000000001000001001111)
// _CONFIG1( JTAGEN_OFF & GCP_OFF & GWRP_OFF & FWDTEN_OFF & ICS_PGx2)
// _CONFIG2( 0xF7FF & IESO_OFF & FCKSM_CSDCMD & OSCIOFNC_ON & POSCMOD_HS & FNOSC_FRCPLL & PLLDIV_DIV2 & IOL1WAY_ON)
|
b526d1b5708943dc92496eb22a779f52c1fa33eb
|
167c6226bc77c5daaedab007dfdad4377f588ef4
|
/cpp/ql/test/header-variant-tests/clang-pch/d.c
|
f81af3d1b63ceb44f047232a45ee2123722b88fc
|
[
"MIT",
"LicenseRef-scancode-public-domain"
] |
permissive
|
github/codeql
|
1eebb449a34f774db9e881b52cb8f7a1b1a53612
|
d109637e2d7ab3b819812eb960c05cb31d9d2168
|
refs/heads/main
| 2023-08-20T11:32:39.162059
| 2023-08-18T14:33:32
| 2023-08-18T14:33:32
| 143,040,428
| 5,987
| 1,363
|
MIT
| 2023-09-14T19:36:50
| 2018-07-31T16:35:51
|
CodeQL
|
UTF-8
|
C
| false
| false
| 100
|
c
|
d.c
|
#import "d.h"
// semmle-extractor-options: --clang -emit-pch -o ${testdir}/clang-pch.testproj/d.pch
|
916ed972f4f320c554ffeea3f8cd70b4f02a0e15
|
995310a5ed19946037e928f9a85bae908694c8fe
|
/src/eloquent/vision/transform.h
|
7dca1d4bfcf84078d941a7afc0d930060166a385
|
[] |
no_license
|
eloquentarduino/EloquentArduino
|
bca073e19af3e9cc5c7f135719cd026631277744
|
15983e68cf82c54afadaf2b6c8fdc95cad268489
|
refs/heads/master
| 2022-08-26T07:07:02.235025
| 2022-08-21T12:24:04
| 2022-08-21T12:24:04
| 227,818,265
| 162
| 57
| null | 2021-01-07T18:33:09
| 2019-12-13T10:49:33
|
C++
|
UTF-8
|
C
| false
| false
| 141
|
h
|
transform.h
|
//
// Created by Simone on 04/03/2022.
//
#pragma once
//#include "transform/gray/Transform.h"
//#include "transform/gray/NearestResize.h"
|
cc7d15f1825ea6808a1b276d8dea87562e0651ff
|
28d0f8c01599f8f6c711bdde0b59f9c2cd221203
|
/sys/arch/atari/atari/mainbus.c
|
d844cfc4b9d692fdc30092cecd1524650b100ef2
|
[] |
no_license
|
NetBSD/src
|
1a9cbc22ed778be638b37869ed4fb5c8dd616166
|
23ee83f7c0aea0777bd89d8ebd7f0cde9880d13c
|
refs/heads/trunk
| 2023-08-31T13:24:58.105962
| 2023-08-27T15:50:47
| 2023-08-27T15:50:47
| 88,439,547
| 656
| 348
| null | 2023-07-20T20:07:24
| 2017-04-16T20:03:43
| null |
UTF-8
|
C
| false
| false
| 17,692
|
c
|
mainbus.c
|
/* $NetBSD: mainbus.c,v 1.14 2023/01/06 10:28:27 tsutsui Exp $ */
/*-
* Copyright (c) 1998 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Leo Weppelman.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: mainbus.c,v 1.14 2023/01/06 10:28:27 tsutsui Exp $");
#include <sys/types.h>
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/kmem.h>
#include <machine/cpu.h>
#include <sys/bus.h>
static int mb_bus_space_peek_1(bus_space_tag_t,
bus_space_handle_t, bus_size_t);
static int mb_bus_space_peek_2(bus_space_tag_t,
bus_space_handle_t, bus_size_t);
static int mb_bus_space_peek_4(bus_space_tag_t,
bus_space_handle_t, bus_size_t);
static int mb_bus_space_peek_8(bus_space_tag_t,
bus_space_handle_t, bus_size_t);
static uint8_t mb_bus_space_read_1(bus_space_tag_t,
bus_space_handle_t, bus_size_t);
static uint16_t mb_bus_space_read_2(bus_space_tag_t,
bus_space_handle_t, bus_size_t);
static uint32_t mb_bus_space_read_4(bus_space_tag_t,
bus_space_handle_t, bus_size_t);
static uint64_t mb_bus_space_read_8(bus_space_tag_t,
bus_space_handle_t, bus_size_t);
static void mb_bus_space_write_1(bus_space_tag_t,
bus_space_handle_t, bus_size_t, uint8_t);
static void mb_bus_space_write_2(bus_space_tag_t,
bus_space_handle_t, bus_size_t, uint16_t);
static void mb_bus_space_write_4(bus_space_tag_t,
bus_space_handle_t, bus_size_t, uint32_t);
static void mb_bus_space_write_8(bus_space_tag_t,
bus_space_handle_t, bus_size_t, uint64_t);
static void mb_bus_space_read_multi_1(bus_space_tag_t,
bus_space_handle_t, bus_size_t, uint8_t *,
bus_size_t);
static void mb_bus_space_read_multi_2(bus_space_tag_t,
bus_space_handle_t, bus_size_t, uint16_t *,
bus_size_t);
static void mb_bus_space_read_multi_4(bus_space_tag_t,
bus_space_handle_t, bus_size_t, uint32_t *,
bus_size_t);
static void mb_bus_space_read_multi_8(bus_space_tag_t,
bus_space_handle_t, bus_size_t, uint64_t *,
bus_size_t);
static void mb_bus_space_write_multi_1(bus_space_tag_t,
bus_space_handle_t, bus_size_t,
const uint8_t *, bus_size_t);
static void mb_bus_space_write_multi_2(bus_space_tag_t,
bus_space_handle_t, bus_size_t,
const uint16_t *, bus_size_t);
static void mb_bus_space_write_multi_4(bus_space_tag_t,
bus_space_handle_t, bus_size_t,
const uint32_t *, bus_size_t);
static void mb_bus_space_write_multi_8(bus_space_tag_t,
bus_space_handle_t, bus_size_t,
const uint64_t *, bus_size_t);
static void mb_bus_space_read_region_1(bus_space_tag_t,
bus_space_handle_t, bus_size_t, uint8_t *,
bus_size_t);
static void mb_bus_space_read_region_2(bus_space_tag_t,
bus_space_handle_t, bus_size_t, uint16_t *,
bus_size_t);
static void mb_bus_space_read_region_4(bus_space_tag_t,
bus_space_handle_t, bus_size_t, uint32_t *,
bus_size_t);
static void mb_bus_space_read_region_8(bus_space_tag_t,
bus_space_handle_t, bus_size_t, uint64_t *,
bus_size_t);
static void mb_bus_space_write_region_1(bus_space_tag_t,
bus_space_handle_t, bus_size_t,
const uint8_t *, bus_size_t);
static void mb_bus_space_write_region_2(bus_space_tag_t,
bus_space_handle_t, bus_size_t,
const uint16_t *, bus_size_t);
static void mb_bus_space_write_region_4(bus_space_tag_t,
bus_space_handle_t, bus_size_t,
const uint32_t *, bus_size_t);
static void mb_bus_space_write_region_8(bus_space_tag_t,
bus_space_handle_t, bus_size_t,
const uint64_t *, bus_size_t);
static void mb_bus_space_set_multi_1(bus_space_tag_t,
bus_space_handle_t, bus_size_t, uint8_t,
bus_size_t);
static void mb_bus_space_set_multi_2(bus_space_tag_t,
bus_space_handle_t, bus_size_t, uint16_t,
bus_size_t);
static void mb_bus_space_set_multi_4(bus_space_tag_t,
bus_space_handle_t, bus_size_t, uint32_t,
bus_size_t);
static void mb_bus_space_set_multi_8(bus_space_tag_t,
bus_space_handle_t, bus_size_t, uint64_t,
bus_size_t);
static void mb_bus_space_set_region_1(bus_space_tag_t,
bus_space_handle_t, bus_size_t, uint8_t,
bus_size_t);
static void mb_bus_space_set_region_2(bus_space_tag_t,
bus_space_handle_t, bus_size_t, uint16_t,
bus_size_t);
static void mb_bus_space_set_region_4(bus_space_tag_t,
bus_space_handle_t, bus_size_t, uint32_t,
bus_size_t);
static void mb_bus_space_set_region_8(bus_space_tag_t,
bus_space_handle_t, bus_size_t, uint64_t,
bus_size_t);
/*
* Calculate offset on the mainbus given a stride_shift and width_offset
*/
#define calc_addr(base, off, stride, wm) \
((u_long)(base) + ((off) << (stride)) + (wm))
#define __read_1(t, h, o) \
(*((volatile uint8_t *)(calc_addr(h, o, (t)->stride, (t)->wo_1))))
#define __read_2(t, h, o) \
(*((volatile uint16_t *)(calc_addr(h, o, (t)->stride, (t)->wo_2))))
#define __read_4(t, h, o) \
(*((volatile uint32_t *)(calc_addr(h, o, (t)->stride, (t)->wo_4))))
#define __read_8(t, h, o) \
(*((volatile uint64_t *)(calc_addr(h, o, (t)->stride, (t)->wo_8))))
#define __write_1(t, h, o, v) \
*((volatile uint8_t *)(calc_addr(h, o, (t)->stride, (t)->wo_1))) = v
#define __write_2(t, h, o, v) \
*((volatile uint16_t *)(calc_addr(h, o, (t)->stride, (t)->wo_2))) = v
#define __write_4(t, h, o, v) \
*((volatile uint32_t *)(calc_addr(h, o, (t)->stride, (t)->wo_4))) = v
#define __write_8(t, h, o, v) \
*((volatile uint64_t *)(calc_addr(h, o, (t)->stride, (t)->wo_8))) = v
bus_space_tag_t
mb_alloc_bus_space_tag(void)
{
bus_space_tag_t mb_t;
mb_t = kmem_zalloc(sizeof(*mb_t), KM_SLEEP);
mb_t->abs_p_1 = mb_bus_space_peek_1;
mb_t->abs_p_2 = mb_bus_space_peek_2;
mb_t->abs_p_4 = mb_bus_space_peek_4;
mb_t->abs_p_8 = mb_bus_space_peek_8;
mb_t->abs_r_1 = mb_bus_space_read_1;
mb_t->abs_r_2 = mb_bus_space_read_2;
mb_t->abs_r_4 = mb_bus_space_read_4;
mb_t->abs_r_8 = mb_bus_space_read_8;
mb_t->abs_rs_1 = mb_bus_space_read_1;
mb_t->abs_rs_2 = mb_bus_space_read_2;
mb_t->abs_rs_4 = mb_bus_space_read_4;
mb_t->abs_rs_8 = mb_bus_space_read_8;
mb_t->abs_rm_1 = mb_bus_space_read_multi_1;
mb_t->abs_rm_2 = mb_bus_space_read_multi_2;
mb_t->abs_rm_4 = mb_bus_space_read_multi_4;
mb_t->abs_rm_8 = mb_bus_space_read_multi_8;
mb_t->abs_rms_1 = mb_bus_space_read_multi_1;
mb_t->abs_rms_2 = mb_bus_space_read_multi_2;
mb_t->abs_rms_4 = mb_bus_space_read_multi_4;
mb_t->abs_rms_8 = mb_bus_space_read_multi_8;
mb_t->abs_rr_1 = mb_bus_space_read_region_1;
mb_t->abs_rr_2 = mb_bus_space_read_region_2;
mb_t->abs_rr_4 = mb_bus_space_read_region_4;
mb_t->abs_rr_8 = mb_bus_space_read_region_8;
mb_t->abs_rrs_1 = mb_bus_space_read_region_1;
mb_t->abs_rrs_2 = mb_bus_space_read_region_2;
mb_t->abs_rrs_4 = mb_bus_space_read_region_4;
mb_t->abs_rrs_8 = mb_bus_space_read_region_8;
mb_t->abs_w_1 = mb_bus_space_write_1;
mb_t->abs_w_2 = mb_bus_space_write_2;
mb_t->abs_w_4 = mb_bus_space_write_4;
mb_t->abs_w_8 = mb_bus_space_write_8;
mb_t->abs_ws_1 = mb_bus_space_write_1;
mb_t->abs_ws_2 = mb_bus_space_write_2;
mb_t->abs_ws_4 = mb_bus_space_write_4;
mb_t->abs_ws_8 = mb_bus_space_write_8;
mb_t->abs_wm_1 = mb_bus_space_write_multi_1;
mb_t->abs_wm_2 = mb_bus_space_write_multi_2;
mb_t->abs_wm_4 = mb_bus_space_write_multi_4;
mb_t->abs_wm_8 = mb_bus_space_write_multi_8;
mb_t->abs_wms_1 = mb_bus_space_write_multi_1;
mb_t->abs_wms_2 = mb_bus_space_write_multi_2;
mb_t->abs_wms_4 = mb_bus_space_write_multi_4;
mb_t->abs_wms_8 = mb_bus_space_write_multi_8;
mb_t->abs_wr_1 = mb_bus_space_write_region_1;
mb_t->abs_wr_2 = mb_bus_space_write_region_2;
mb_t->abs_wr_4 = mb_bus_space_write_region_4;
mb_t->abs_wr_8 = mb_bus_space_write_region_8;
mb_t->abs_wrs_1 = mb_bus_space_write_region_1;
mb_t->abs_wrs_2 = mb_bus_space_write_region_2;
mb_t->abs_wrs_4 = mb_bus_space_write_region_4;
mb_t->abs_wrs_8 = mb_bus_space_write_region_8;
mb_t->abs_sm_1 = mb_bus_space_set_multi_1;
mb_t->abs_sm_2 = mb_bus_space_set_multi_2;
mb_t->abs_sm_4 = mb_bus_space_set_multi_4;
mb_t->abs_sm_8 = mb_bus_space_set_multi_8;
mb_t->abs_sr_1 = mb_bus_space_set_region_1;
mb_t->abs_sr_2 = mb_bus_space_set_region_2;
mb_t->abs_sr_4 = mb_bus_space_set_region_4;
mb_t->abs_sr_8 = mb_bus_space_set_region_8;
return mb_t;
}
void
mb_free_bus_space_tag(bus_space_tag_t mb_t)
{
kmem_free(mb_t, sizeof(*mb_t));
}
static int
mb_bus_space_peek_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
{
return !badbaddr((void *)(calc_addr(h, o, t->stride, t->wo_1)), 1);
}
static int
mb_bus_space_peek_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
{
return !badbaddr((void *)(calc_addr(h, o, t->stride, t->wo_2)), 2);
}
static int
mb_bus_space_peek_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
{
return !badbaddr((void *)(calc_addr(h, o, t->stride, t->wo_4)), 4);
}
static int
mb_bus_space_peek_8(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
{
return !badbaddr((void *)(calc_addr(h, o, t->stride, t->wo_8)), 8);
}
static uint8_t
mb_bus_space_read_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
{
return __read_1(t, h, o);
}
static uint16_t
mb_bus_space_read_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
{
return __read_2(t, h, o);
}
static uint32_t
mb_bus_space_read_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
{
return __read_4(t, h, o);
}
static uint64_t
mb_bus_space_read_8(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
{
return __read_8(t, h, o);
}
static void
mb_bus_space_write_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
uint8_t v)
{
__write_1(t, h, o, v);
}
static void
mb_bus_space_write_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
uint16_t v)
{
__write_2(t, h, o, v);
}
static void
mb_bus_space_write_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
uint32_t v)
{
__write_4(t, h, o, v);
}
static void
mb_bus_space_write_8(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
uint64_t v)
{
__write_8(t, h, o, v);
}
static void
mb_bus_space_read_multi_1(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, uint8_t *a, bus_size_t c)
{
volatile uint8_t *ba;
ba = (volatile uint8_t *)calc_addr(h, o, t->stride, t->wo_1);
for (; c; a++, c--)
*a = *ba;
}
static void
mb_bus_space_read_multi_2(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, uint16_t *a, bus_size_t c)
{
volatile uint16_t *ba;
ba = (volatile uint16_t *)calc_addr(h, o, t->stride, t->wo_2);
for (; c; a++, c--)
*a = *ba;
}
static void
mb_bus_space_read_multi_4(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, uint32_t *a, bus_size_t c)
{
volatile uint32_t *ba;
ba = (volatile uint32_t *)calc_addr(h, o, t->stride, t->wo_4);
for (; c; a++, c--)
*a = *ba;
}
static void
mb_bus_space_read_multi_8(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, uint64_t *a, bus_size_t c)
{
volatile uint64_t *ba;
ba = (volatile uint64_t *)calc_addr(h, o, t->stride, t->wo_8);
for (; c; a++, c--)
*a = *ba;
}
static void
mb_bus_space_write_multi_1(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, const uint8_t *a, bus_size_t c)
{
volatile uint8_t *ba;
ba = (volatile uint8_t *)calc_addr(h, o, t->stride, t->wo_1);
for (; c; a++, c--)
*ba = *a;
}
static void
mb_bus_space_write_multi_2(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, const uint16_t *a, bus_size_t c)
{
volatile uint16_t *ba;
ba = (volatile uint16_t *)calc_addr(h, o, t->stride, t->wo_2);
for (; c; a++, c--)
*ba = *a;
}
static void
mb_bus_space_write_multi_4(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, const uint32_t *a, bus_size_t c)
{
volatile uint32_t *ba;
ba = (volatile uint32_t *)calc_addr(h, o, t->stride, t->wo_4);
for (; c; a++, c--)
*ba = *a;
}
static void
mb_bus_space_write_multi_8(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, const uint64_t *a, bus_size_t c)
{
volatile uint64_t *ba;
ba = (volatile uint64_t *)calc_addr(h, o, t->stride, t->wo_8);
for (; c; a++, c--)
*ba = *a;
}
/*
* void bus_space_read_region_N(bus_space_tag_t tag,
* bus_space_handle_t bsh, bus_size_t offset,
* uintN_t *addr, size_t count);
*
* Read `count' 1, 2, 4, or 8 byte quantities from bus space
* described by tag/handle and starting at `offset' and copy into
* buffer provided.
*/
static void
mb_bus_space_read_region_1(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, uint8_t *a, bus_size_t c)
{
for (; c; a++, o++, c--)
*a = __read_1(t, h, o);
}
static void
mb_bus_space_read_region_2(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, uint16_t *a, bus_size_t c)
{
for (; c; a++, o += 2, c--)
*a = __read_2(t, h, o);
}
static void
mb_bus_space_read_region_4(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, uint32_t *a, bus_size_t c)
{
for (; c; a++, o += 4, c--)
*a = __read_4(t, h, o);
}
static void
mb_bus_space_read_region_8(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, uint64_t *a, bus_size_t c)
{
for (; c; a++, o += 8, c--)
*a = __read_8(t, h, o);
}
/*
* void bus_space_write_region_N(bus_space_tag_t tag,
* bus_space_handle_t bsh, bus_size_t offset,
* uintN_t *addr, size_t count);
*
* Copy `count' 1, 2, 4, or 8 byte quantities from the buffer provided
* into the bus space described by tag/handle and starting at `offset'.
*/
static void
mb_bus_space_write_region_1(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, const uint8_t *a, bus_size_t c)
{
for (; c; a++, o++, c--)
__write_1(t, h, o, *a);
}
static void
mb_bus_space_write_region_2(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, const uint16_t *a, bus_size_t c)
{
for (; c; a++, o += 2, c--)
__write_2(t, h, o, *a);
}
static void
mb_bus_space_write_region_4(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, const uint32_t *a, bus_size_t c)
{
for (; c; a++, o += 4, c--)
__write_4(t, h, o, *a);
}
static void
mb_bus_space_write_region_8(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, const uint64_t *a, bus_size_t c)
{
for (; c; a++, o += 8, c--)
__write_8(t, h, o, *a);
}
/*
* void bus_space_set_multi_N(bus_space_tag_t tag,
* bus_space_handle_t bsh, bus_size_t offset, uintN_t val,
* size_t count);
*
* Write the 1, 2, 4, or 8 byte value `val' to bus space described
* by tag/handle/offset `count' times.
*/
static void
mb_bus_space_set_multi_1(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, uint8_t v, bus_size_t c)
{
volatile uint8_t *ba;
ba = (volatile uint8_t *)calc_addr(h, o, t->stride, t->wo_1);
for (; c; c--)
*ba = v;
}
static void
mb_bus_space_set_multi_2(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, uint16_t v, bus_size_t c)
{
volatile uint16_t *ba;
ba = (volatile uint16_t *)calc_addr(h, o, t->stride, t->wo_2);
for (; c; c--)
*ba = v;
}
static void
mb_bus_space_set_multi_4(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, uint32_t v, bus_size_t c)
{
volatile uint32_t *ba;
ba = (volatile uint32_t *)calc_addr(h, o, t->stride, t->wo_4);
for (; c; c--)
*ba = v;
}
static void
mb_bus_space_set_multi_8(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, uint64_t v, bus_size_t c)
{
volatile uint64_t *ba;
ba = (volatile uint64_t *)calc_addr(h, o, t->stride, t->wo_8);
for (; c; c--)
*ba = v;
}
/*
* void bus_space_set_region_N(bus_space_tag_t tag,
* bus_space_handle_t bsh, bus_size_t offset, uintN_t val,
* size_t count);
*
* Write `count' 1, 2, 4, or 8 byte value `val' to bus space described
* by tag/handle starting at `offset'.
*/
static void
mb_bus_space_set_region_1(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, uint8_t v, bus_size_t c)
{
for (; c; o++, c--)
__write_1(t, h, o, v);
}
static void
mb_bus_space_set_region_2(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, uint16_t v, bus_size_t c)
{
for (; c; o += 2, c--)
__write_2(t, h, o, v);
}
static void
mb_bus_space_set_region_4(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, uint32_t v, bus_size_t c)
{
for (; c; o += 4, c--)
__write_4(t, h, o, v);
}
static void
mb_bus_space_set_region_8(bus_space_tag_t t, bus_space_handle_t h,
bus_size_t o, uint64_t v, bus_size_t c)
{
for (; c; o += 8, c--)
__write_8(t, h, o, v);
}
|
c28ac5a381ef8ed21284e46cc1af04ada90316f0
|
9907672fcd81ab73ac63b2a83422a82bf31eadde
|
/tyama_TJU1643-ZJU1294.c
|
282b18927e031b18c50cea129699c3d14fa773bb
|
[
"0BSD"
] |
permissive
|
cielavenir/procon
|
bbe1974b9bddb51b76d58722a0686a5b477c4456
|
746e1a91f574f20647e8aaaac0d9e6173f741176
|
refs/heads/master
| 2023-06-21T23:11:24.562546
| 2023-06-11T13:15:15
| 2023-06-11T13:15:15
| 7,557,464
| 137
| 136
| null | 2020-10-20T09:35:52
| 2013-01-11T09:40:26
|
C++
|
UTF-8
|
C
| false
| false
| 216
|
c
|
tyama_TJU1643-ZJU1294.c
|
int main(i,a,b){
char *x[4]={"Bogey","Par","Birdie","Eagle"};
while(scanf("%d%d",&a,&b),a){
printf("Hole #%d\n%s.\n\n",i,b==1?"Hole-in-one":a-b<-1?"Double Bogey":a-b>2?"Double Eagle":x[a-b+1]);
i++;
}
}
|
a983411c75772ed1226688fa0ccd582a30437ed9
|
7eaf54a78c9e2117247cb2ab6d3a0c20719ba700
|
/SOFTWARE/A64-TERES/u-boot_new/tools/imagetool.c
|
32d6278edb95fe8be0a8d17a0050e7c84d72c8d4
|
[
"LicenseRef-scancode-free-unknown",
"Apache-2.0",
"GPL-2.0-or-later"
] |
permissive
|
OLIMEX/DIY-LAPTOP
|
ae82f4ee79c641d9aee444db9a75f3f6709afa92
|
a3fafd1309135650bab27f5eafc0c32bc3ca74ee
|
refs/heads/rel3
| 2023-08-04T01:54:19.483792
| 2023-04-03T07:18:12
| 2023-04-03T07:18:12
| 80,094,055
| 507
| 92
|
Apache-2.0
| 2023-04-03T07:05:59
| 2017-01-26T07:25:50
|
C
|
UTF-8
|
C
| false
| false
| 1,642
|
c
|
imagetool.c
|
/*
* (C) Copyright 2013
*
* Written by Guilherme Maciel Ferreira <guilherme.maciel.ferreira@gmail.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include "imagetool.h"
/*
* Callback function to register a image type within a tool
*/
static imagetool_register_t register_func;
/*
* register_image_tool -
*
* The tool provides its own registration function in order to all image
* types initialize themselves.
*/
void register_image_tool(imagetool_register_t image_register)
{
/*
* Save the image tool callback function. It will be used to register
* image types within that tool
*/
register_func = image_register;
/* Init ATMEL ROM Boot Image generation/list support */
init_atmel_image_type();
/* Init Freescale PBL Boot image generation/list support */
init_pbl_image_type();
/* Init Kirkwood Boot image generation/list support */
init_kwb_image_type();
/* Init Freescale imx Boot image generation/list support */
init_imx_image_type();
/* Init Freescale mxs Boot image generation/list support */
init_mxs_image_type();
/* Init FIT image generation/list support */
init_fit_image_type();
/* Init TI OMAP Boot image generation/list support */
init_omap_image_type();
/* Init Default image generation/list support */
init_default_image_type();
/* Init Davinci UBL support */
init_ubl_image_type();
/* Init Davinci AIS support */
init_ais_image_type();
/* Init TI Keystone boot image generation/list support */
init_gpimage_type();
}
/*
* register_image_type -
*
* Register a image type within a tool
*/
void register_image_type(struct image_type_params *tparams)
{
register_func(tparams);
}
|
e9c7d185fad5c64449386929dcb0402574daa1b1
|
41c7328eadeab5ed7c0584b7db51996a05dd9f2d
|
/F0:F030,F042,F072/TM1637/protocol.c
|
14502be3d9d354bcd80223cc583e74396b71225a
|
[] |
no_license
|
eddyem/stm32samples
|
1c00ccb8593ea270cae536c85f178a522f704ed5
|
dce73d358b1fca3e7fa397f5c6d0d5c1cb28aba0
|
refs/heads/master
| 2023-07-28T11:13:10.361942
| 2023-07-24T20:04:22
| 2023-07-24T20:04:22
| 32,647,425
| 152
| 42
| null | null | null | null |
UTF-8
|
C
| false
| false
| 5,381
|
c
|
protocol.c
|
/*
* This file is part of the TM1637 project.
* Copyright 2019 Edward Emelianov <eddy@sao.ru>.
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include "hardware.h"
#include "i2c.h"
#include "protocol.h"
#include "usart.h"
#define DOT 1
#define MIN 0b00000010
#define DIG0 0b11111100
#define DIG1 0b01100000
#define DIG2 0b11011010
#define DIG3 0b11110010
#define DIG4 0b01100110
#define DIG5 0b10110110
#define DIG6 0b10111110
#define DIG7 0b11100000
#define DIG8 0b11111110
#define DIG9 0b11110110
#define DIGA 0b11101110
#define DIGB 0b00111110
#define DIGC 0b10011100
#define DIGD 0b01111010
#define DIGE 0b10011110
#define DIGF 0b10001110
#define DIGN 0b00000000
static const uint8_t digits[] = {DIG0, DIG1, DIG2, DIG3, DIG4, DIG5, DIG6, DIG7, DIG8, DIG9,
DIGA, DIGB, DIGC, DIGD, DIGE, DIGF};
static void putdata(uint8_t var){
put_string("Got: ");
put_char('0'+var);
put_char('\n');
// 0x40, 0xC0, ff .. 8f ; (0x44, 0xc0, 0x55, 0x89)
const uint8_t commands[] = {2, 3, DIG0, DIG1, DIG2, DIG3, 0xf1, 0x22, 3, 0xaa, 0x91};
//const uint8_t commands[] = {2, 3, 2, 4, 8, 0x10, 0xf1, 0x22, 3, 0xaa, 0x91};
const uint8_t commands1[] = {2, 3, DIG4, DIG5|DOT, DIG6, DIG7, 0xf1, 0x22, 3, 0xee, 0x91};
//const uint8_t commands1[] = {2, 3, 0x20, 0x40|DOT, 0x80, DIG5, 0xf1, 0x22, 3, 0xee, 0x91};
switch(var){
case 0:
write_i2c(commands, 1);
write_i2c(&commands[1], 5);
write_i2c(&commands[6], 1);
break;
case 1:
write_i2c(&commands[7], 1);
write_i2c(&commands[8], 2);
write_i2c(&commands[10], 1);
break;
case 2:
write_i2c(commands1, 1);
write_i2c(&commands1[1], 5);
write_i2c(&commands1[6], 1);
break;
case 3:
write_i2c(&commands1[7], 1);
write_i2c(&commands1[8], 2);
write_i2c(&commands1[10], 1);
break;
}
}
static void getk(){
//uint8_t k[] = {0x42, 0xff};
uint8_t k;
if(read_i2c(0x42, &k)){ // 0x42
//if(write_i2c(k,2)){
put_string("Keys: ");
put_uint(k);
put_char('\n');
}else SEND("ERR\n");
}
static uint8_t display_number(int32_t N){
if(N < -999 || N > 9999) return 1;
uint8_t buf[] = {2, 3, DIGN, DIGN, DIGN, DIGN, 0xf1};
if(N < 0){
buf[2] = MIN;
N = -N;
}
if(N == 0){
buf[5] = DIG0;
}else{
for(uint8_t idx = 5; idx > 1 && N; --idx){
buf[idx] = digits[N%10];
N /= 10;
}
}
write_i2c(buf, 1);
write_i2c(&buf[1], 5);
write_i2c(&buf[6], 1);
return 0;
}
static uint8_t display_hex(int32_t N){
if(N < -0xfff || N > 0xffff) return 1;
uint8_t buf[] = {2, 3, DIGN, DIGN, DIGN, DIGN, 0xf1};
if(N < 0){
buf[2] = MIN;
N = -N;
}
if(N == 0){
buf[5] = DIG0;
}else{
for(uint8_t idx = 5; idx > 1 && N; --idx){
buf[idx] = digits[N&0xf];
N >>= 4;
}
}
write_i2c(buf, 1);
write_i2c(&buf[1], 5);
write_i2c(&buf[6], 1);
return 0;
}
static void dispnum(const char *n, uint8_t hex){
int32_t N = -1;
uint8_t er = 0;
if(!getnum(n, &N)) er = 1;
else{
if(hex) er = display_hex(N);
else er = display_number(N);
}
if(er) put_string("Wrong number!\n");
}
static void dispabcd(){
uint8_t buf[] = {2, 3, DIGA, DIGB, DIGC, DIGD, 0xf1};
write_i2c(buf, 1);
write_i2c(&buf[1], 5);
write_i2c(&buf[6], 1);
}
/**
* @brief process_command - command parser
* @param command - command text (all inside [] without spaces)
* @return text to send over terminal or NULL
*/
char *process_command(const char *command){
char *ret = NULL;
usart1_sendbuf(); // send buffer (if it is already filled)
if(*command < '0' || *command > '9'){
switch(*command){
case '?': // help
SEND_BLK(
"0..9 - send data\n"
"A - display 'ABCD'\n"
"G - get keqboard status\n"
"Hhex - display 'hex'\n"
"Nnum - display 'num'\n"
"R - reset\n"
);
break;
case 'A':
dispabcd();
break;
case 'G':
getk();
break;
case 'H':
dispnum(++command, 1);
break;
case 'N':
dispnum(++command, 0);
break;
case 'R': // reset MCU
NVIC_SystemReset();
break;
}
}else putdata(*command - '0');
usart1_sendbuf();
return ret;
}
|
720f7b2baee79ad7802aa3d7e9a03affb591b1eb
|
9ceacf33fd96913cac7ef15492c126d96cae6911
|
/sys/arch/sparc64/dev/pcf8591_ofw.c
|
5376e635636e04c8ccf58cd3b71f7f4eba8cf69d
|
[] |
no_license
|
openbsd/src
|
ab97ef834fd2d5a7f6729814665e9782b586c130
|
9e79f3a0ebd11a25b4bff61e900cb6de9e7795e9
|
refs/heads/master
| 2023-09-02T18:54:56.624627
| 2023-09-02T15:16:12
| 2023-09-02T15:16:12
| 66,966,208
| 3,394
| 1,235
| null | 2023-08-08T02:42:25
| 2016-08-30T18:18:25
|
C
|
UTF-8
|
C
| false
| false
| 5,896
|
c
|
pcf8591_ofw.c
|
/* $OpenBSD: pcf8591_ofw.c,v 1.6 2021/10/24 17:05:03 mpi Exp $ */
/*
* Copyright (c) 2006 Damien Miller <djm@openbsd.org>
*
* Permission to use, copy, modify, and distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/sensors.h>
#include <dev/ofw/openfirm.h>
#include <dev/i2c/i2cvar.h>
#define PCF8591_CHANNELS 4
struct pcfadc_channel {
u_int chan_num;
struct ksensor chan_sensor;
};
struct pcfadc_softc {
struct device sc_dev;
i2c_tag_t sc_tag;
i2c_addr_t sc_addr;
u_char sc_xlate[256];
u_int sc_nchan;
struct pcfadc_channel sc_channels[PCF8591_CHANNELS];
struct ksensordev sc_sensordev;
};
int pcfadc_match(struct device *, void *, void *);
void pcfadc_attach(struct device *, struct device *, void *);
void pcfadc_refresh(void *);
const struct cfattach pcfadc_ca = {
sizeof(struct pcfadc_softc), pcfadc_match, pcfadc_attach
};
struct cfdriver pcfadc_cd = {
NULL, "pcfadc", DV_DULL
};
int
pcfadc_match(struct device *parent, void *match, void *aux)
{
struct i2c_attach_args *ia = aux;
if (strcmp(ia->ia_name, "i2cpcf,8591") != 0)
return (0);
return (1);
}
void
pcfadc_attach(struct device *parent, struct device *self, void *aux)
{
struct pcfadc_softc *sc = (struct pcfadc_softc *)self;
u_char chanuse[PCF8591_CHANNELS * 4], desc[PCF8591_CHANNELS * 32];
u_char *cp;
u_int8_t junk[PCF8591_CHANNELS + 1];
u_int32_t transinfo[PCF8591_CHANNELS * 4];
struct i2c_attach_args *ia = aux;
int dlen, clen, tlen, node = *(int *)ia->ia_cookie;
u_int i;
if ((dlen = OF_getprop(node, "channels-description", desc,
sizeof(desc))) < 0) {
printf(": couldn't find \"channels-description\" property\n");
return;
}
if (dlen > sizeof(desc) || desc[dlen - 1] != '\0') {
printf(": bad \"channels-description\" property\n");
return;
}
if ((clen = OF_getprop(node, "channels-in-use", chanuse,
sizeof(chanuse))) < 0) {
printf(": couldn't find \"channels-in-use\" property\n");
return;
}
if ((clen % 4) != 0) {
printf(": invalid \"channels-in-use\" length %d\n", clen);
return;
}
sc->sc_nchan = clen / 4;
if (sc->sc_nchan > PCF8591_CHANNELS) {
printf(": invalid number of channels (%d)\n", sc->sc_nchan);
return;
}
if ((tlen = OF_getprop(node, "tables", sc->sc_xlate,
sizeof(sc->sc_xlate))) < 0) {
printf(": couldn't find \"tables\" property\n");
return;
}
/* We only support complete, single width tables */
if (tlen != 256) {
printf(": invalid \"tables\" length %d\n", tlen);
return;
}
if ((tlen = OF_getprop(node, "translation", transinfo,
sizeof(transinfo))) < 0) {
printf(": couldn't find \"translation\" property\n");
return;
}
if (tlen != (sc->sc_nchan * 4 * 4)) {
printf(": invalid \"translation\" length %d\n", tlen);
return;
}
cp = desc;
for (i = 0; i < sc->sc_nchan; i++) {
struct pcfadc_channel *chp = &sc->sc_channels[i];
chp->chan_sensor.type = SENSOR_TEMP;
if (cp >= desc + dlen) {
printf(": invalid \"channels-description\"\n");
return;
}
strlcpy(chp->chan_sensor.desc, cp,
sizeof(chp->chan_sensor.desc));
cp += strlen(cp) + 1;
/*
* We only support input temperature channels, with
* valid channel numbers, and basic (unscaled) translation
*
* XXX TODO: support voltage (type 2) channels and type 4
* (scaled) translation tables
*/
if (chanuse[(i * 4)] > PCF8591_CHANNELS || /* channel # */
chanuse[(i * 4) + 1] != 0 || /* dir == input */
chanuse[(i * 4) + 2] != 1 || /* type == temp */
transinfo[(i * 4)] != 3 || /* xlate == table */
transinfo[(i * 4) + 2] != 0 || /* no xlate offset */
transinfo[(i * 4) + 3] != 0x100) { /* xlate tbl length */
printf(": unsupported sensor %d\n", i);
return;
}
chp->chan_num = chanuse[(i * 4)];
}
sc->sc_tag = ia->ia_tag;
sc->sc_addr = ia->ia_addr;
iic_acquire_bus(sc->sc_tag, 0);
/* Try a read now, so we can fail if it doesn't work */
if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_addr,
NULL, 0, junk, sc->sc_nchan + 1, 0)) {
printf(": read failed\n");
iic_release_bus(sc->sc_tag, 0);
return;
}
iic_release_bus(sc->sc_tag, 0);
/* Initialize sensor data. */
strlcpy(sc->sc_sensordev.xname, sc->sc_dev.dv_xname,
sizeof(sc->sc_sensordev.xname));
for (i = 0; i < sc->sc_nchan; i++)
sensor_attach(&sc->sc_sensordev,
&sc->sc_channels[i].chan_sensor);
if (sensor_task_register(sc, pcfadc_refresh, 5) == NULL) {
printf(": unable to register update task\n");
return;
}
sensordev_install(&sc->sc_sensordev);
printf("\n");
}
void
pcfadc_refresh(void *arg)
{
struct pcfadc_softc *sc = arg;
u_int i;
u_int8_t data[PCF8591_CHANNELS + 1];
iic_acquire_bus(sc->sc_tag, 0);
/* NB: first byte out is stale, so read num_channels + 1 */
if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_addr,
NULL, 0, data, PCF8591_CHANNELS + 1, 0)) {
iic_release_bus(sc->sc_tag, 0);
return;
}
iic_release_bus(sc->sc_tag, 0);
/* XXX: so far this only supports temperature channels */
for (i = 0; i < sc->sc_nchan; i++) {
struct pcfadc_channel *chp = &sc->sc_channels[i];
chp->chan_sensor.value = 273150000 + 1000000 *
sc->sc_xlate[data[1 + chp->chan_num]];
}
}
|
a87c79bf46ad3f7d08ff0887a2c8efeb14cc815d
|
99bdb3251fecee538e0630f15f6574054dfc1468
|
/libcpu/mips/common/mips_cache.c
|
a969f5c75195c7f75bf0cc4427da3a4bdefcc6d8
|
[
"Apache-2.0"
] |
permissive
|
RT-Thread/rt-thread
|
03a7c52c2aeb1b06a544143b0e803d72f47d1ece
|
3602f891211904a27dcbd51e5ba72fefce7326b2
|
refs/heads/master
| 2023-09-01T04:10:20.295801
| 2023-08-31T16:20:55
| 2023-08-31T16:20:55
| 7,408,108
| 9,599
| 5,805
|
Apache-2.0
| 2023-09-14T13:37:26
| 2013-01-02T14:49:21
|
C
|
UTF-8
|
C
| false
| false
| 2,939
|
c
|
mips_cache.c
|
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2016-09-07 Urey the first version
*/
#include <rtthread.h>
#include "mips.h"
extern void cache_init(rt_ubase_t cache_size, rt_ubase_t cache_line_size);
void r4k_cache_init(void)
{
// cache_init(dcache_size, cpu_dcache_line_size);
}
void r4k_cache_flush_all(void)
{
blast_dcache16();
blast_icache16();
}
void r4k_icache_flush_all(void)
{
blast_icache16();
}
void r4k_icache_flush_range(rt_ubase_t addr, rt_ubase_t size)
{
rt_ubase_t end, a;
if (size > g_mips_core.icache_size)
{
blast_icache16();
}
else
{
rt_ubase_t ic_lsize = g_mips_core.icache_line_size;
a = addr & ~(ic_lsize - 1);
end = ((addr + size) - 1) & ~(ic_lsize - 1);
while (1)
{
flush_icache_line(a);
if (a == end)
break;
a += ic_lsize;
}
}
}
void r4k_icache_lock_range(rt_ubase_t addr, rt_ubase_t size)
{
rt_ubase_t end, a;
rt_ubase_t ic_lsize = g_mips_core.icache_line_size;
a = addr & ~(ic_lsize - 1);
end = ((addr + size) - 1) & ~(ic_lsize - 1);
while (1)
{
lock_icache_line(a);
if (a == end)
break;
a += ic_lsize;
}
}
void r4k_dcache_inv(rt_ubase_t addr, rt_ubase_t size)
{
rt_ubase_t end, a;
rt_ubase_t dc_lsize = g_mips_core.dcache_line_size;
a = addr & ~(dc_lsize - 1);
end = ((addr + size) - 1) & ~(dc_lsize - 1);
while (1)
{
invalidate_dcache_line(a);
if (a == end)
break;
a += dc_lsize;
}
}
void r4k_dcache_wback_inv(rt_ubase_t addr, rt_ubase_t size)
{
rt_ubase_t end, a;
if (size >= g_mips_core.dcache_size)
{
blast_dcache16();
}
else
{
rt_ubase_t dc_lsize = g_mips_core.dcache_line_size;
a = addr & ~(dc_lsize - 1);
end = ((addr + size) - 1) & ~(dc_lsize - 1);
while (1)
{
flush_dcache_line(a);
if (a == end)
break;
a += dc_lsize;
}
}
}
#define dma_cache_wback_inv(start,size) \
do { (void) (start); (void) (size); } while (0)
#define dma_cache_wback(start,size) \
do { (void) (start); (void) (size); } while (0)
#define dma_cache_inv(start,size) \
do { (void) (start); (void) (size); } while (0)
void r4k_dma_cache_sync(rt_ubase_t addr, rt_size_t size, enum dma_data_direction direction)
{
switch (direction)
{
case DMA_TO_DEVICE:
r4k_dcache_wback_inv(addr, size);
break;
case DMA_FROM_DEVICE:
r4k_dcache_wback_inv(addr, size);
break;
case DMA_BIDIRECTIONAL:
dma_cache_wback_inv(addr, size);
break;
default:
RT_ASSERT(0) ;
}
}
|
896c5af08eaa3411eccae4c822a942f2bbb125dc
|
7664f318ed04bd0680f3d82321c18896e3ef6ad5
|
/src/libultra/os/virtualtophysical.c
|
5f8f79d83c3b2be0dadee2ccb192d4b6516dac91
|
[] |
no_license
|
zeldaret/oot
|
9c80ce17f2d8fd61514b375f92ee4739b5ce9d4e
|
2875ab4fcf5c5f81d76353d1ee0024c9ea8d0b23
|
refs/heads/master
| 2023-08-29T05:29:31.356427
| 2023-08-28T22:48:52
| 2023-08-28T22:48:52
| 247,875,738
| 4,401
| 802
| null | 2023-09-14T13:34:38
| 2020-03-17T04:02:19
|
C
|
UTF-8
|
C
| false
| false
| 230
|
c
|
virtualtophysical.c
|
#include "global.h"
u32 osVirtualToPhysical(void* vaddr) {
if (IS_KSEG0(vaddr)) {
return K0_TO_PHYS(vaddr);
}
if (IS_KSEG1(vaddr)) {
return K1_TO_PHYS(vaddr);
}
return __osProbeTLB(vaddr);
}
|
2e755e5e7bfc1cc79d8b0a5b05c8c1cbc056f57c
|
fb0f9abad373cd635c2635bbdf491ea0f32da5ff
|
/src/mono/mono/metadata/sgen-new-bridge.c
|
e618783bcb408652ad41b34a615550ee2b3790fb
|
[
"MIT"
] |
permissive
|
dotnet/runtime
|
f6fd23936752e202f8e4d6d94f3a4f3b0e77f58f
|
47bb554d298e1e34c4e3895d7731e18ad1c47d02
|
refs/heads/main
| 2023-09-03T15:35:46.493337
| 2023-09-03T08:13:23
| 2023-09-03T08:13:23
| 210,716,005
| 13,765
| 5,179
|
MIT
| 2023-09-14T21:58:52
| 2019-09-24T23:36:39
|
C#
|
UTF-8
|
C
| false
| false
| 31,779
|
c
|
sgen-new-bridge.c
|
/**
* \file
* Simple generational GC.
*
* Copyright 2011 Novell, Inc (http://www.novell.com)
* Copyright 2011 Xamarin Inc (http://www.xamarin.com)
* Copyright 2001-2003 Ximian, Inc
* Copyright 2003-2010 Novell, Inc.
*
* Licensed under the MIT license. See LICENSE file in the project root for full license information.
*/
#include "config.h"
#if defined (HAVE_SGEN_GC) && !defined (DISABLE_SGEN_GC_BRIDGE)
#include <stdlib.h>
#include <errno.h>
#include "sgen/sgen-gc.h"
#include "sgen-bridge-internals.h"
#include "sgen/sgen-hash-table.h"
#include "sgen/sgen-qsort.h"
#include "sgen/sgen-client.h"
#include "tabledefs.h"
#include "utils/mono-logger-internals.h"
#define OPTIMIZATION_COPY
#define OPTIMIZATION_FORWARD
#define OPTIMIZATION_SINGLETON_DYN_ARRAY
#include "sgen-dynarray.h"
//#define NEW_XREFS
#ifdef NEW_XREFS
//#define TEST_NEW_XREFS
#endif
#if !defined(NEW_XREFS) || defined(TEST_NEW_XREFS)
#define OLD_XREFS
#endif
#ifdef NEW_XREFS
#define XREFS new_xrefs
#else
#define XREFS old_xrefs
#endif
/*
* Bridge data for a single managed object
*
* FIXME: Optimizations:
*
* Don't allocate a srcs array for just one source. Most objects have
* just one source, so use the srcs pointer itself.
*/
typedef struct _HashEntry {
gboolean is_bridge;
union {
struct {
guint32 is_visited : 1;
guint32 finishing_time : 31;
struct _HashEntry *forwarded_to;
} dfs1;
struct {
// Index in sccs array of SCC this object was folded into
int scc_index;
} dfs2;
} v;
// "Source" managed objects pointing at this destination
DynPtrArray srcs;
} HashEntry;
typedef struct {
HashEntry entry;
double weight;
} HashEntryWithAccounting;
// The graph of managed objects/HashEntries is reduced to a graph of strongly connected components
typedef struct _SCC {
int index;
int api_index;
// How many bridged objects does this SCC hold references to?
int num_bridge_entries;
gboolean flag;
/*
* Index in global sccs array of SCCs holding pointers to this SCC
*
* New and old xrefs are typically mutually exclusive. Only when TEST_NEW_XREFS is
* enabled we do both, and compare the results. This should only be done for
* debugging, obviously.
*/
#ifdef OLD_XREFS
DynIntArray old_xrefs; /* these are incoming, not outgoing */
#endif
#ifdef NEW_XREFS
DynIntArray new_xrefs;
#endif
} SCC;
static char *dump_prefix = NULL;
// Maps managed objects to corresponding HashEntry stricts
static SgenHashTable hash_table = SGEN_HASH_TABLE_INIT (INTERNAL_MEM_BRIDGE_HASH_TABLE, INTERNAL_MEM_BRIDGE_HASH_TABLE_ENTRY, sizeof (HashEntry), mono_aligned_addr_hash, NULL);
static guint32 current_time;
static gboolean bridge_accounting_enabled = FALSE;
static SgenBridgeProcessor *bridge_processor;
/* Core functions */
/*SCC */
static void
dyn_array_scc_init (DynSCCArray *da)
{
dyn_array_init (&da->array);
}
static void
dyn_array_scc_uninit (DynSCCArray *da)
{
dyn_array_uninit (&da->array, sizeof (SCC));
}
static int
dyn_array_scc_size (DynSCCArray *da)
{
return da->array.size;
}
static SCC*
dyn_array_scc_add (DynSCCArray *da)
{
return (SCC *)dyn_array_add (&da->array, sizeof (SCC));
}
static SCC*
dyn_array_scc_get_ptr (DynSCCArray *da, int x)
{
return &((SCC*)da->array.data)[x];
}
/* Merge code*/
static DynIntArray merge_array;
#ifdef NEW_XREFS
static gboolean
dyn_array_int_contains (DynIntArray *da, int x)
{
int i;
for (i = 0; i < dyn_array_int_size (da); ++i)
if (dyn_array_int_get (da, i) == x)
return TRUE;
return FALSE;
}
#endif
static void
set_config (const SgenBridgeProcessorConfig *config)
{
if (config->accounting) {
SgenHashTable table = SGEN_HASH_TABLE_INIT (INTERNAL_MEM_BRIDGE_HASH_TABLE, INTERNAL_MEM_BRIDGE_HASH_TABLE_ENTRY, sizeof (HashEntryWithAccounting), mono_aligned_addr_hash, NULL);
bridge_accounting_enabled = TRUE;
hash_table = table;
}
if (config->dump_prefix) {
dump_prefix = strdup (config->dump_prefix);
}
}
static MonoGCBridgeObjectKind
class_kind (MonoClass *klass)
{
MonoGCBridgeObjectKind res = mono_bridge_callbacks.bridge_class_kind (klass);
/* If it's a bridge, nothing we can do about it. */
if (res == GC_BRIDGE_TRANSPARENT_BRIDGE_CLASS || res == GC_BRIDGE_OPAQUE_BRIDGE_CLASS)
return res;
/* Non bridge classes with no pointers will never point to a bridge, so we can savely ignore them. */
if (!m_class_has_references (klass)) {
SGEN_LOG (6, "class %s is opaque\n", m_class_get_name (klass));
return GC_BRIDGE_OPAQUE_CLASS;
}
/* Some arrays can be ignored */
if (m_class_get_rank (klass) == 1) {
MonoClass *elem_class = m_class_get_element_class (klass);
/* FIXME the bridge check can be quite expensive, cache it at the class level. */
/* An array of a sealed type that is not a bridge will never get to a bridge */
if ((mono_class_get_flags (elem_class) & TYPE_ATTRIBUTE_SEALED) && !m_class_has_references (elem_class) && !mono_bridge_callbacks.bridge_class_kind (elem_class)) {
SGEN_LOG (6, "class %s is opaque\n", m_class_get_name (klass));
return GC_BRIDGE_OPAQUE_CLASS;
}
}
return GC_BRIDGE_TRANSPARENT_CLASS;
}
static HashEntry*
get_hash_entry (MonoObject *obj, gboolean *existing)
{
HashEntry *entry = (HashEntry *)sgen_hash_table_lookup (&hash_table, obj);
HashEntry new_entry;
if (entry) {
if (existing)
*existing = TRUE;
return entry;
}
if (existing)
*existing = FALSE;
memset (&new_entry, 0, sizeof (HashEntry));
dyn_array_ptr_init (&new_entry.srcs);
new_entry.v.dfs1.finishing_time = 0;
sgen_hash_table_replace (&hash_table, obj, &new_entry, NULL);
return (HashEntry *)sgen_hash_table_lookup (&hash_table, obj);
}
static void
add_source (HashEntry *entry, HashEntry *src)
{
dyn_array_ptr_add (&entry->srcs, src);
}
static void
free_data (void)
{
MonoObject *obj G_GNUC_UNUSED;
HashEntry *entry;
int max_srcs = 0;
SGEN_HASH_TABLE_FOREACH (&hash_table, MonoObject *, obj, HashEntry *, entry) {
int entry_size = dyn_array_ptr_size (&entry->srcs);
if (entry_size > max_srcs)
max_srcs = entry_size;
dyn_array_ptr_uninit (&entry->srcs);
} SGEN_HASH_TABLE_FOREACH_END;
sgen_hash_table_clean (&hash_table);
dyn_array_int_uninit (&merge_array);
}
static HashEntry*
register_bridge_object (MonoObject *obj)
{
HashEntry *entry = get_hash_entry (obj, NULL);
entry->is_bridge = TRUE;
return entry;
}
static void
register_finishing_time (HashEntry *entry, guint32 t)
{
g_assert (entry->v.dfs1.finishing_time == 0);
/* finishing_time has 31 bits, so it must be within signed int32 range. */
g_assert (t > 0 && t <= G_MAXINT32);
entry->v.dfs1.finishing_time = t;
}
static int ignored_objects;
static gboolean
is_opaque_object (MonoObject *obj)
{
if ((obj->vtable->gc_bits & SGEN_GC_BIT_BRIDGE_OPAQUE_OBJECT) == SGEN_GC_BIT_BRIDGE_OPAQUE_OBJECT) {
SGEN_LOG (6, "ignoring %s\n", m_class_get_name (mono_object_class (obj)));
++ignored_objects;
return TRUE;
}
return FALSE;
}
static gboolean
object_needs_expansion (MonoObject **objp)
{
MonoObject *obj = *objp;
MonoObject *fwd = SGEN_OBJECT_IS_FORWARDED (obj);
if (fwd) {
*objp = fwd;
if (is_opaque_object (fwd))
return FALSE;
return sgen_hash_table_lookup (&hash_table, fwd) != NULL;
}
if (is_opaque_object (obj))
return FALSE;
if (!sgen_object_is_live (obj))
return TRUE;
return sgen_hash_table_lookup (&hash_table, obj) != NULL;
}
static HashEntry*
follow_forward (HashEntry *entry)
{
#ifdef OPTIMIZATION_FORWARD
while (entry->v.dfs1.forwarded_to) {
HashEntry *next = entry->v.dfs1.forwarded_to;
if (next->v.dfs1.forwarded_to)
entry->v.dfs1.forwarded_to = next->v.dfs1.forwarded_to;
entry = next;
}
#else
g_assert (!entry->v.dfs1.forwarded_to);
#endif
return entry;
}
static DynPtrArray registered_bridges;
static DynPtrArray dfs_stack;
static int dfs1_passes, dfs2_passes;
/*
* DFS1 maintains a stack, where each two entries are effectively one entry. (FIXME:
* Optimize this via pointer tagging.) There are two different types of entries:
*
* entry, src: entry needs to be expanded via scanning, and linked to from src
* NULL, entry: entry has already been expanded and needs to be finished
*/
#undef HANDLE_PTR
#define HANDLE_PTR(ptr,obj) do { \
GCObject *dst = (GCObject*)*(ptr); \
if (dst && object_needs_expansion (&dst)) { \
++num_links; \
dyn_array_ptr_push (&dfs_stack, obj_entry); \
dyn_array_ptr_push (&dfs_stack, follow_forward (get_hash_entry (dst, NULL))); \
} \
} while (0)
static void
dfs1 (HashEntry *obj_entry)
{
HashEntry *src;
g_assert (dyn_array_ptr_size (&dfs_stack) == 0);
dyn_array_ptr_push (&dfs_stack, NULL);
dyn_array_ptr_push (&dfs_stack, obj_entry);
do {
MonoObject *obj;
char *start;
++dfs1_passes;
obj_entry = (HashEntry *)dyn_array_ptr_pop (&dfs_stack);
if (obj_entry) {
/* obj_entry needs to be expanded */
src = (HashEntry *)dyn_array_ptr_pop (&dfs_stack);
if (src)
g_assert (!src->v.dfs1.forwarded_to);
obj_entry = follow_forward (obj_entry);
again:
g_assert (!obj_entry->v.dfs1.forwarded_to);
obj = sgen_hash_table_key_for_value_pointer (obj_entry);
start = (char*)obj;
if (!obj_entry->v.dfs1.is_visited) {
int num_links = 0;
mword desc = sgen_obj_get_descriptor_safe (obj);
obj_entry->v.dfs1.is_visited = 1;
/* push the finishing entry on the stack */
dyn_array_ptr_push (&dfs_stack, obj_entry);
dyn_array_ptr_push (&dfs_stack, NULL);
#include "sgen/sgen-scan-object.h"
/*
* We can remove non-bridge objects with a single outgoing
* link by forwarding links going to it.
*
* This is the first time we've encountered this object, so
* no links to it have yet been added. We'll keep it that
* way by setting the forward pointer, and instead of
* continuing processing this object, we start over with the
* object it points to.
*/
#ifdef OPTIMIZATION_FORWARD
if (!obj_entry->is_bridge && num_links == 1) {
HashEntry *dst_entry = (HashEntry *)dyn_array_ptr_pop (&dfs_stack);
HashEntry *obj_entry_again = (HashEntry *)dyn_array_ptr_pop (&dfs_stack);
g_assert (obj_entry_again == obj_entry);
g_assert (!dst_entry->v.dfs1.forwarded_to);
if (obj_entry != dst_entry) {
obj_entry->v.dfs1.forwarded_to = dst_entry;
obj_entry = dst_entry;
}
goto again;
}
#endif
}
if (src) {
//g_print ("link %s -> %s\n", sgen_safe_name (src->obj), sgen_safe_name (obj));
g_assert (!obj_entry->v.dfs1.forwarded_to);
add_source (obj_entry, src);
} else {
//g_print ("starting with %s\n", sgen_safe_name (obj));
}
} else {
/* obj_entry needs to be finished */
obj_entry = (HashEntry *)dyn_array_ptr_pop (&dfs_stack);
//g_print ("finish %s\n", sgen_safe_name (obj_entry->obj));
register_finishing_time (obj_entry, ++current_time);
}
} while (dyn_array_ptr_size (&dfs_stack) > 0);
}
static DynSCCArray sccs;
static SCC *current_scc;
/*
* At the end of bridge processing we need to end up with an (acyclyc) graph of bridge
* object SCCs, where the links between the nodes (each one an SCC) in that graph represent
* the presence of a direct or indirect link between those SCCs. An example:
*
* D
* |
* v
* A -> B -> c -> e -> F
*
* A, B, D and F are SCCs that contain bridge objects, c and e don't contain bridge objects.
* The graph we need to produce from this is:
*
* D
* |
* v
* A -> B -> F
*
* Note that we don't need to produce an edge from A to F. It's sufficient that F is
* indirectly reachable from A.
*
* The old algorithm would create a set, for each SCC, of bridge SCCs that can reach it,
* directly or indirectly, by merging the ones sets for those that reach it directly. The
* sets it would build up are these:
*
* A: {}
* B: {A}
* c: {B}
* D: {}
* e: {B,D}
* F: {B,D}
*
* The merge operations on these sets turned out to be huge time sinks.
*
* The new algorithm proceeds in two passes: During DFS2, it only builds up the sets of SCCs
* that directly point to each SCC:
*
* A: {}
* B: {A}
* c: {B}
* D: {}
* e: {c,D}
* F: {e}
*
* This is the adjacency list for the SCC graph, in other words. In a separate step
* afterwards, it does a depth-first traversal of that graph, for each bridge node, to get
* to the final list. It uses a flag to avoid traversing any node twice.
*/
static void
scc_add_xref (SCC *src, SCC *dst)
{
g_assert (src != dst);
g_assert (src->index != dst->index);
#ifdef NEW_XREFS
/*
* FIXME: Right now we don't even unique the direct ancestors, but just add to the
* list. Doing a containment check slows this algorithm down to almost the speed of
* the old one. Use the flag instead!
*/
dyn_array_int_add (&dst->new_xrefs, src->index);
#endif
#ifdef OLD_XREFS
if (dyn_array_int_is_copy (&dst->old_xrefs)) {
int i;
dyn_array_int_ensure_independent (&dst->old_xrefs);
for (i = 0; i < dyn_array_int_size (&dst->old_xrefs); ++i) {
int j = dyn_array_int_get (&dst->old_xrefs, i);
SCC *bridge_scc = dyn_array_scc_get_ptr (&sccs, j);
g_assert (!bridge_scc->flag);
bridge_scc->flag = TRUE;
}
}
if (src->num_bridge_entries) {
if (src->flag)
return;
src->flag = TRUE;
dyn_array_int_add (&dst->old_xrefs, src->index);
#ifdef OPTIMIZATION_COPY
} else if (dyn_array_int_size (&dst->old_xrefs) == 0) {
dyn_array_int_copy (&dst->old_xrefs, &src->old_xrefs);
#endif
} else {
int i;
for (i = 0; i < dyn_array_int_size (&src->old_xrefs); ++i) {
int j = dyn_array_int_get (&src->old_xrefs, i);
SCC *bridge_scc = dyn_array_scc_get_ptr (&sccs, j);
g_assert (bridge_scc->num_bridge_entries);
if (!bridge_scc->flag) {
bridge_scc->flag = TRUE;
dyn_array_int_add (&dst->old_xrefs, j);
}
}
}
#endif
}
static void
scc_add_entry (SCC *scc, HashEntry *entry)
{
g_assert (entry->v.dfs2.scc_index < 0);
entry->v.dfs2.scc_index = scc->index;
if (entry->is_bridge)
++scc->num_bridge_entries;
}
static void
dfs2 (HashEntry *entry)
{
int i;
g_assert (dyn_array_ptr_size (&dfs_stack) == 0);
dyn_array_ptr_push (&dfs_stack, entry);
do {
entry = (HashEntry *)dyn_array_ptr_pop (&dfs_stack);
++dfs2_passes;
if (entry->v.dfs2.scc_index >= 0) {
if (entry->v.dfs2.scc_index != current_scc->index)
scc_add_xref (dyn_array_scc_get_ptr (&sccs, entry->v.dfs2.scc_index), current_scc);
continue;
}
scc_add_entry (current_scc, entry);
for (i = 0; i < dyn_array_ptr_size (&entry->srcs); ++i)
dyn_array_ptr_push (&dfs_stack, dyn_array_ptr_get (&entry->srcs, i));
} while (dyn_array_ptr_size (&dfs_stack) > 0);
#ifdef OLD_XREFS
/* If xrefs is a copy then we haven't set a single flag. */
if (dyn_array_int_is_copy (¤t_scc->old_xrefs))
return;
for (i = 0; i < dyn_array_int_size (¤t_scc->old_xrefs); ++i) {
int j = dyn_array_int_get (¤t_scc->old_xrefs, i);
SCC *bridge_scc = dyn_array_scc_get_ptr (&sccs, j);
g_assert (bridge_scc->flag);
bridge_scc->flag = FALSE;
}
#endif
}
#ifdef NEW_XREFS
static void
gather_xrefs (SCC *scc)
{
int i;
for (i = 0; i < dyn_array_int_size (&scc->new_xrefs); ++i) {
int index = dyn_array_int_get (&scc->new_xrefs, i);
SCC *src = dyn_array_scc_get_ptr (&sccs, index);
if (src->flag)
continue;
src->flag = TRUE;
if (src->num_bridge_entries)
dyn_array_int_add (&merge_array, index);
else
gather_xrefs (src);
}
}
static void
reset_flags (SCC *scc)
{
int i;
for (i = 0; i < dyn_array_int_size (&scc->new_xrefs); ++i) {
int index = dyn_array_int_get (&scc->new_xrefs, i);
SCC *src = dyn_array_scc_get_ptr (&sccs, index);
if (!src->flag)
continue;
src->flag = FALSE;
if (!src->num_bridge_entries)
reset_flags (src);
}
}
#endif
static void
dump_graph (void)
{
static int counter = 0;
MonoObject *obj;
HashEntry *entry;
size_t prefix_len = strlen (dump_prefix);
char *filename = g_newa (char, prefix_len + 64);
FILE *file;
int edge_id = 0;
sprintf (filename, "%s.%d.gexf", dump_prefix, counter++);
file = fopen (filename, "w");
if (file == NULL) {
fprintf (stderr, "Warning: Could not open bridge dump file `%s` for writing: %s\n", filename, strerror (errno));
return;
}
fprintf (file, "<gexf xmlns=\"http://www.gexf.net/1.2draft\" xmlns:xsi=\"http://www.w3.org/2001/XMLSchema-instance\" xsi:schemaLocation=\"http://www.gexf.net/1.2draft http://www.gexf.net/1.2draft/gexf.xsd\" version=\"1.2\">\n");
fprintf (file, "<graph defaultedgetype=\"directed\">\n"
"<attributes class=\"node\">\n"
"<attribute id=\"0\" title=\"class\" type=\"string\"/>\n"
"<attribute id=\"1\" title=\"bridge\" type=\"boolean\"/>\n"
"</attributes>\n");
fprintf (file, "<nodes>\n");
SGEN_HASH_TABLE_FOREACH (&hash_table, MonoObject *, obj, HashEntry *, entry) {
MonoVTable *vt = SGEN_LOAD_VTABLE (obj);
fprintf (file, "<node id=\"%p\"><attvalues><attvalue for=\"0\" value=\"%s.%s\"/><attvalue for=\"1\" value=\"%s\"/></attvalues></node>\n",
obj, m_class_get_name_space (vt->klass), m_class_get_name (vt->klass), entry->is_bridge ? "true" : "false");
} SGEN_HASH_TABLE_FOREACH_END;
fprintf (file, "</nodes>\n");
fprintf (file, "<edges>\n");
SGEN_HASH_TABLE_FOREACH (&hash_table, MonoObject *, obj, HashEntry *, entry) {
int i;
for (i = 0; i < dyn_array_ptr_size (&entry->srcs); ++i) {
HashEntry *src = (HashEntry *)dyn_array_ptr_get (&entry->srcs, i);
fprintf (file, "<edge id=\"%d\" source=\"%p\" target=\"%p\"/>\n", edge_id++, sgen_hash_table_key_for_value_pointer (src), obj);
}
} SGEN_HASH_TABLE_FOREACH_END;
fprintf (file, "</edges>\n");
fprintf (file, "</graph></gexf>\n");
fclose (file);
}
static int
compare_hash_entries (const HashEntry *e1, const HashEntry *e2)
{
/* We can cast to signed int here because finishing_time has only 31 bits. */
return (gint32)e2->v.dfs1.finishing_time - (gint32)e1->v.dfs1.finishing_time;
}
DEF_QSORT_INLINE(hash_entries, HashEntry*, compare_hash_entries)
static gint64 step_1, step_2, step_3, step_4, step_5, step_6;
static int fist_pass_links, second_pass_links, sccs_links;
static int max_sccs_links = 0;
static void
register_finalized_object (GCObject *obj)
{
g_assert (sgen_need_bridge_processing ());
dyn_array_ptr_push (®istered_bridges, obj);
}
static void
reset_data (void)
{
dyn_array_ptr_empty (®istered_bridges);
}
static void
processing_stw_step (void)
{
int i;
int bridge_count;
MonoObject *obj G_GNUC_UNUSED;
HashEntry *entry;
SGEN_TV_DECLARE (atv);
SGEN_TV_DECLARE (btv);
if (!dyn_array_ptr_size (®istered_bridges))
return;
SGEN_TV_GETTIME (btv);
/* first DFS pass */
dyn_array_ptr_init (&dfs_stack);
dyn_array_int_init (&merge_array);
current_time = 0;
/*
First we insert all bridges into the hash table and then we do dfs1.
It must be done in 2 steps since the bridge arrays doesn't come in reverse topological order,
which means that we can have entry N pointing to entry N + 1.
If we dfs1 entry N before N + 1 is registered we'll not consider N + 1 for this bridge
pass and not create the required xref between the two.
*/
bridge_count = dyn_array_ptr_size (®istered_bridges);
for (i = 0; i < bridge_count ; ++i)
register_bridge_object ((MonoObject *)dyn_array_ptr_get (®istered_bridges, i));
for (i = 0; i < bridge_count; ++i)
dfs1 (get_hash_entry ((MonoObject *)dyn_array_ptr_get (®istered_bridges, i), NULL));
/* Remove all forwarded objects. */
SGEN_HASH_TABLE_FOREACH (&hash_table, MonoObject *, obj, HashEntry *, entry) {
if (entry->v.dfs1.forwarded_to) {
g_assert (dyn_array_ptr_size (&entry->srcs) == 0);
SGEN_HASH_TABLE_FOREACH_REMOVE (TRUE);
continue;
}
} SGEN_HASH_TABLE_FOREACH_END;
SGEN_TV_GETTIME (atv);
step_2 = SGEN_TV_ELAPSED (btv, atv);
if (dump_prefix)
dump_graph ();
}
static int num_registered_bridges, hash_table_size;
static void
processing_build_callback_data (int generation)
{
int j;
int num_sccs, num_xrefs;
int max_entries, max_xrefs;
MonoObject *obj G_GNUC_UNUSED;
HashEntry *entry;
HashEntry **all_entries;
MonoGCBridgeSCC **api_sccs;
MonoGCBridgeXRef *api_xrefs;
SGEN_TV_DECLARE (atv);
SGEN_TV_DECLARE (btv);
g_assert (bridge_processor->num_sccs == 0 && bridge_processor->num_xrefs == 0);
g_assert (!bridge_processor->api_sccs && !bridge_processor->api_xrefs);
if (!dyn_array_ptr_size (®istered_bridges))
return;
g_assert (mono_bridge_processing_in_progress);
SGEN_TV_GETTIME (atv);
/* alloc and fill array of all entries */
all_entries = (HashEntry **)sgen_alloc_internal_dynamic (sizeof (HashEntry*) * hash_table.num_entries, INTERNAL_MEM_BRIDGE_DATA, TRUE);
j = 0;
SGEN_HASH_TABLE_FOREACH (&hash_table, MonoObject *, obj, HashEntry *, entry) {
g_assert (entry->v.dfs1.finishing_time > 0);
all_entries [j++] = entry;
fist_pass_links += dyn_array_ptr_size (&entry->srcs);
} SGEN_HASH_TABLE_FOREACH_END;
g_assert (j == hash_table.num_entries);
hash_table_size = hash_table.num_entries;
/* sort array according to decreasing finishing time */
qsort_hash_entries (all_entries, hash_table.num_entries);
SGEN_HASH_TABLE_FOREACH (&hash_table, MonoObject *, obj, HashEntry *, entry) {
entry->v.dfs2.scc_index = -1;
} SGEN_HASH_TABLE_FOREACH_END;
SGEN_TV_GETTIME (btv);
step_3 = SGEN_TV_ELAPSED (atv, btv);
/* second DFS pass */
dyn_array_scc_init (&sccs);
for (guint i = 0; i < hash_table.num_entries; ++i) {
entry = all_entries [i];
if (entry->v.dfs2.scc_index < 0) {
int index = dyn_array_scc_size (&sccs);
current_scc = dyn_array_scc_add (&sccs);
current_scc->index = index;
current_scc->num_bridge_entries = 0;
#ifdef NEW_XREFS
current_scc->flag = FALSE;
dyn_array_int_init (¤t_scc->new_xrefs);
#endif
#ifdef OLD_XREFS
dyn_array_int_init (¤t_scc->old_xrefs);
#endif
current_scc->api_index = -1;
dfs2 (entry);
#ifdef NEW_XREFS
/*
* If a node has only one incoming edge, we just copy the source's
* xrefs array, effectively removing the source from the graph.
* This takes care of long linked lists.
*/
if (!current_scc->num_bridge_entries && dyn_array_int_size (¤t_scc->new_xrefs) == 1) {
SCC *src;
j = dyn_array_int_get (¤t_scc->new_xrefs, 0);
src = dyn_array_scc_get_ptr (&sccs, j);
if (src->num_bridge_entries)
dyn_array_int_set (¤t_scc->new_xrefs, 0, j);
else
dyn_array_int_copy (¤t_scc->new_xrefs, &src->new_xrefs);
}
#endif
}
}
#ifdef NEW_XREFS
#ifdef TEST_NEW_XREFS
for (j = 0; j < dyn_array_scc_size (&sccs); ++j) {
SCC *scc = dyn_array_scc_get_ptr (&sccs, j);
g_assert (!scc->flag);
}
#endif
for (int i = 0; i < dyn_array_scc_size (&sccs); ++i) {
SCC *scc = dyn_array_scc_get_ptr (&sccs, i);
g_assert (scc->index == i);
if (!scc->num_bridge_entries)
continue;
dyn_array_int_empty (&merge_array);
gather_xrefs (scc);
reset_flags (scc);
dyn_array_int_copy (&scc->new_xrefs, &merge_array);
dyn_array_int_ensure_independent (&scc->new_xrefs);
#ifdef TEST_NEW_XREFS
for (j = 0; j < dyn_array_scc_size (&sccs); ++j) {
SCC *scc = dyn_array_scc_get_ptr (&sccs, j);
g_assert (!scc->flag);
}
#endif
}
#ifdef TEST_NEW_XREFS
for (int i = 0; i < dyn_array_scc_size (&sccs); ++i) {
SCC *scc = dyn_array_scc_get_ptr (&sccs, i);
g_assert (scc->index == i);
if (!scc->num_bridge_entries)
continue;
g_assert (dyn_array_int_size (&scc->new_xrefs) == dyn_array_int_size (&scc->old_xrefs));
for (j = 0; j < dyn_array_int_size (&scc->new_xrefs); ++j)
g_assert (dyn_array_int_contains (&scc->old_xrefs, dyn_array_int_get (&scc->new_xrefs, j)));
}
#endif
#endif
/*
* Compute the weight of each object. The weight of an object is its size plus the size of all
* objects it points do. When the an object is pointed by multiple objects we distribute it's weight
* equally among them. This distribution gives a rough estimate of the real impact of making the object
* go away.
*
* The reasoning for this model is that complex graphs with single roots will have a bridge with very high
* value in comparison to others.
*
* The all_entries array has all objects topologically sorted. To correctly propagate the weights it must be
* done in reverse topological order - so we calculate the weight of the pointed-to objects before processing
* pointer-from objects.
*
* We log those objects in the opposite order for no particular reason. The other constrain is that it should use the same
* direction as the other logging loop that records live/dead information.
*/
if (bridge_accounting_enabled) {
for (int i = hash_table.num_entries - 1; i >= 0; --i) {
double w;
HashEntryWithAccounting *entry_acc = (HashEntryWithAccounting*)all_entries [i];
entry_acc->weight += (double)sgen_safe_object_get_size (sgen_hash_table_key_for_value_pointer (entry_acc));
w = entry_acc->weight / dyn_array_ptr_size (&entry_acc->entry.srcs);
for (j = 0; j < dyn_array_ptr_size (&entry_acc->entry.srcs); ++j) {
HashEntryWithAccounting *other = (HashEntryWithAccounting *)dyn_array_ptr_get (&entry_acc->entry.srcs, j);
other->weight += w;
}
}
for (guint i = 0; i < hash_table.num_entries; ++i) {
HashEntryWithAccounting *entry_acc = (HashEntryWithAccounting*)all_entries [i];
if (entry_acc->entry.is_bridge) {
MonoObject *instance = sgen_hash_table_key_for_value_pointer (entry_acc);
MonoClass *klass = SGEN_LOAD_VTABLE (instance)->klass;
mono_trace (G_LOG_LEVEL_DEBUG, MONO_TRACE_GC, "OBJECT %s::%s (%p) weight %f", m_class_get_name_space (klass), m_class_get_name (klass), instance, entry_acc->weight);
}
}
}
for (guint i = 0; i < hash_table.num_entries; ++i) {
entry = all_entries [i];
second_pass_links += dyn_array_ptr_size (&entry->srcs);
}
SGEN_TV_GETTIME (atv);
step_4 = SGEN_TV_ELAPSED (btv, atv);
//g_print ("%d sccs\n", sccs.size);
dyn_array_ptr_uninit (&dfs_stack);
/* init data for callback */
num_sccs = 0;
for (int i = 0; i < dyn_array_scc_size (&sccs); ++i) {
SCC *scc = dyn_array_scc_get_ptr (&sccs, i);
g_assert (scc->index == i);
if (scc->num_bridge_entries)
++num_sccs;
sccs_links += dyn_array_int_size (&scc->XREFS);
max_sccs_links = MAX (max_sccs_links, dyn_array_int_size (&scc->XREFS));
}
api_sccs = (MonoGCBridgeSCC **)sgen_alloc_internal_dynamic (sizeof (MonoGCBridgeSCC*) * num_sccs, INTERNAL_MEM_BRIDGE_DATA, TRUE);
num_xrefs = 0;
j = 0;
for (int i = 0; i < dyn_array_scc_size (&sccs); ++i) {
SCC *scc = dyn_array_scc_get_ptr (&sccs, i);
if (!scc->num_bridge_entries)
continue;
api_sccs [j] = (MonoGCBridgeSCC *)sgen_alloc_internal_dynamic (sizeof (MonoGCBridgeSCC) + sizeof (MonoObject*) * scc->num_bridge_entries, INTERNAL_MEM_BRIDGE_DATA, TRUE);
api_sccs [j]->is_alive = FALSE;
api_sccs [j]->num_objs = scc->num_bridge_entries;
scc->num_bridge_entries = 0;
scc->api_index = j++;
num_xrefs += dyn_array_int_size (&scc->XREFS);
}
SGEN_HASH_TABLE_FOREACH (&hash_table, MonoObject *, obj, HashEntry *, entry) {
if (entry->is_bridge) {
SCC *scc = dyn_array_scc_get_ptr (&sccs, entry->v.dfs2.scc_index);
api_sccs [scc->api_index]->objs [scc->num_bridge_entries++] = sgen_hash_table_key_for_value_pointer (entry);
}
} SGEN_HASH_TABLE_FOREACH_END;
api_xrefs = (MonoGCBridgeXRef *)sgen_alloc_internal_dynamic (sizeof (MonoGCBridgeXRef) * num_xrefs, INTERNAL_MEM_BRIDGE_DATA, TRUE);
j = 0;
for (int i = 0; i < dyn_array_scc_size (&sccs); ++i) {
int k;
SCC *scc = dyn_array_scc_get_ptr (&sccs, i);
if (!scc->num_bridge_entries)
continue;
for (k = 0; k < dyn_array_int_size (&scc->XREFS); ++k) {
SCC *src_scc = dyn_array_scc_get_ptr (&sccs, dyn_array_int_get (&scc->XREFS, k));
if (!src_scc->num_bridge_entries)
continue;
api_xrefs [j].src_scc_index = src_scc->api_index;
api_xrefs [j].dst_scc_index = scc->api_index;
++j;
}
}
SGEN_TV_GETTIME (btv);
step_5 = SGEN_TV_ELAPSED (atv, btv);
/* free data */
j = 0;
max_entries = max_xrefs = 0;
for (int i = 0; i < dyn_array_scc_size (&sccs); ++i) {
SCC *scc = dyn_array_scc_get_ptr (&sccs, i);
if (scc->num_bridge_entries)
++j;
if (scc->num_bridge_entries > max_entries)
max_entries = scc->num_bridge_entries;
if (dyn_array_int_size (&scc->XREFS) > max_xrefs)
max_xrefs = dyn_array_int_size (&scc->XREFS);
#ifdef NEW_XREFS
dyn_array_int_uninit (&scc->new_xrefs);
#endif
#ifdef OLD_XREFS
dyn_array_int_uninit (&scc->old_xrefs);
#endif
}
dyn_array_scc_uninit (&sccs);
sgen_free_internal_dynamic (all_entries, sizeof (HashEntry*) * hash_table.num_entries, INTERNAL_MEM_BRIDGE_DATA);
free_data ();
/* Empty the registered bridges array */
num_registered_bridges = dyn_array_ptr_size (®istered_bridges);
dyn_array_ptr_empty (®istered_bridges);
SGEN_TV_GETTIME (atv);
step_6 = SGEN_TV_ELAPSED (btv, atv);
//g_print ("%d sccs containing bridges - %d max bridge objects - %d max xrefs\n", j, max_entries, max_xrefs);
bridge_processor->num_sccs = num_sccs;
bridge_processor->api_sccs = api_sccs;
bridge_processor->num_xrefs = num_xrefs;
bridge_processor->api_xrefs = api_xrefs;
}
static void
processing_after_callback (int generation)
{
int i, j;
int num_sccs = bridge_processor->num_sccs;
MonoGCBridgeSCC **api_sccs = bridge_processor->api_sccs;
if (bridge_accounting_enabled) {
for (i = 0; i < num_sccs; ++i) {
for (j = 0; j < api_sccs [i]->num_objs; ++j) {
GCVTable vtable = SGEN_LOAD_VTABLE (api_sccs [i]->objs [j]);
mono_trace (G_LOG_LEVEL_DEBUG, MONO_TRACE_GC,
"OBJECT %s.%s (%p) SCC [%d] %s",
sgen_client_vtable_get_namespace (vtable), sgen_client_vtable_get_name (vtable), api_sccs [i]->objs [j],
i,
api_sccs [i]->is_alive ? "ALIVE" : "DEAD");
}
}
}
mono_trace (G_LOG_LEVEL_DEBUG, MONO_TRACE_GC, "GC_NEW_BRIDGE num-objects %d num_hash_entries %d sccs size %d init %.2fms df1 %.2fms sort %.2fms dfs2 %.2fms setup-cb %.2fms free-data %.2fms links %d/%d/%d/%d dfs passes %d/%d ignored %d",
num_registered_bridges, hash_table_size, dyn_array_scc_size (&sccs),
step_1 / 10000.0f,
step_2 / 10000.0f,
step_3 / 10000.0f,
step_4 / 10000.0f,
step_5 / 10000.0f,
step_6 / 10000.0f,
fist_pass_links, second_pass_links, sccs_links, max_sccs_links,
dfs1_passes, dfs2_passes, ignored_objects);
step_1 = 0; /* We must cleanup since this value is used as an accumulator. */
fist_pass_links = second_pass_links = sccs_links = max_sccs_links = 0;
dfs1_passes = dfs2_passes = ignored_objects = 0;
}
static void
describe_pointer (GCObject *obj)
{
HashEntry *entry;
int i;
for (i = 0; i < dyn_array_ptr_size (®istered_bridges); ++i) {
if (obj == dyn_array_ptr_get (®istered_bridges, i)) {
printf ("Pointer is a registered bridge object.\n");
break;
}
}
entry = (HashEntry *)sgen_hash_table_lookup (&hash_table, obj);
if (!entry)
return;
printf ("Bridge hash table entry %p:\n", entry);
printf (" is bridge: %d\n", (int)entry->is_bridge);
printf (" is visited: %d\n", (int)entry->v.dfs1.is_visited);
}
void
sgen_new_bridge_init (SgenBridgeProcessor *collector)
{
collector->reset_data = reset_data;
collector->processing_stw_step = processing_stw_step;
collector->processing_build_callback_data = processing_build_callback_data;
collector->processing_after_callback = processing_after_callback;
collector->class_kind = class_kind;
collector->register_finalized_object = register_finalized_object;
collector->describe_pointer = describe_pointer;
collector->set_config = set_config;
bridge_processor = collector;
}
#else
#include <mono/utils/mono-compiler.h>
MONO_EMPTY_SOURCE_FILE (sgen_new_bridge);
#endif
|
17dd37f48ab388d62579270a851639024b9e83f9
|
fa1ad2e2ac7e376fc7cb3b3a6e1bb88eed3e80be
|
/govern/data-security/krb-1.2.1/src/lib/krb5/os/sendto_kdc.c
|
8be1d56145a233d1a43dd75c1b1cf2cd1fc9d3d6
|
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"BSD-4-Clause",
"LicenseRef-scancode-generic-export-compliance",
"LicenseRef-scancode-other-permissive",
"LicenseRef-scancode-mit-old-style",
"BSD-4-Clause-UC",
"LicenseRef-scancode-rsa-1990",
"BSD-3-Clause",
"MIT-CMU",
"LicenseRef-scancode-mit-no-advert-export-control",
"CC-BY-SA-3.0",
"LicenseRef-scancode-mit-modification-obligations",
"LicenseRef-scancode-proprietary-license",
"GPL-2.0-or-later",
"LicenseRef-scancode-michigan-disclaimer",
"ISC",
"LicenseRef-scancode-nrl-permission",
"FreeBSD-DOC",
"LicenseRef-scancode-rsa-md4",
"RSA-MD",
"OLDAP-2.8",
"FSFULLRWD",
"BSD-2-Clause",
"LicenseRef-scancode-brian-gladman",
"MIT",
"Apache-2.0"
] |
permissive
|
alldatacenter/alldata
|
7bc7713c9f1d56ad6b8e59ea03206d1073b7e047
|
8d5f9a2d49ab8f9e85ccf058cb02c2fda287afc6
|
refs/heads/master
| 2023-08-05T07:32:25.442740
| 2023-08-03T13:17:24
| 2023-08-03T13:17:24
| 213,321,771
| 774
| 250
|
Apache-2.0
| 2023-09-06T17:35:32
| 2019-10-07T07:36:18
| null |
UTF-8
|
C
| false
| false
| 53,256
|
c
|
sendto_kdc.c
|
/* -*- mode: c; c-basic-offset: 4; indent-tabs-mode: nil -*- */
/* lib/krb5/os/sendto_kdc.c */
/*
* Copyright 1990,1991,2001,2002,2004,2005,2007,2008 by the Massachusetts Institute of Technology.
* All Rights Reserved.
*
* Export of this software from the United States of America may
* require a specific license from the United States Government.
* It is the responsibility of any person or organization contemplating
* export to obtain such a license before exporting.
*
* WITHIN THAT CONSTRAINT, permission to use, copy, modify, and
* distribute this software and its documentation for any purpose and
* without fee is hereby granted, provided that the above copyright
* notice appear in all copies and that both that copyright notice and
* this permission notice appear in supporting documentation, and that
* the name of M.I.T. not be used in advertising or publicity pertaining
* to distribution of the software without specific, written prior
* permission. Furthermore if you modify this software you must label
* your software as modified software and not distribute it in such a
* fashion that it might be confused with the original M.I.T. software.
* M.I.T. makes no representations about the suitability of
* this software for any purpose. It is provided "as is" without express
* or implied warranty.
*/
/*
* MS-KKDCP implementation Copyright 2013,2014 Red Hat, Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
* IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
* OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/* Send packet to KDC for realm; wait for response, retransmitting
* as necessary. */
#include "k5-int.h"
#include "k5-tls.h"
#include "fake-addrinfo.h"
#include "os-proto.h"
#if defined(HAVE_POLL_H)
#include <poll.h>
#define USE_POLL
#define MAX_POLLFDS 1024
#elif defined(HAVE_SYS_SELECT_H)
#include <sys/select.h>
#endif
#ifndef _WIN32
/* For FIONBIO. */
#include <sys/ioctl.h>
#ifdef HAVE_SYS_FILIO_H
#include <sys/filio.h>
#endif
#endif
#define MAX_PASS 3
#define DEFAULT_UDP_PREF_LIMIT 1465
#define HARD_UDP_LIMIT 32700 /* could probably do 64K-epsilon ? */
#define PORT_LENGTH 6 /* decimal repr of UINT16_MAX */
/* Select state flags. */
#define SSF_READ 0x01
#define SSF_WRITE 0x02
#define SSF_EXCEPTION 0x04
typedef int64_t time_ms;
/* This can be pretty large, so should not be stack-allocated. */
struct select_state {
#ifdef USE_POLL
struct pollfd fds[MAX_POLLFDS];
#else
int max;
fd_set rfds, wfds, xfds;
#endif
int nfds;
};
/* connection states */
enum conn_states { INITIALIZING, CONNECTING, WRITING, READING, FAILED };
struct incoming_message {
size_t bufsizebytes_read;
size_t bufsize;
size_t pos;
char *buf;
unsigned char bufsizebytes[4];
size_t n_left;
};
struct outgoing_message {
sg_buf sgbuf[2];
sg_buf *sgp;
int sg_count;
unsigned char msg_len_buf[4];
};
struct conn_state;
typedef krb5_boolean fd_handler_fn(krb5_context context,
const krb5_data *realm,
struct conn_state *conn,
struct select_state *selstate);
struct conn_state {
SOCKET fd;
enum conn_states state;
fd_handler_fn *service_connect;
fd_handler_fn *service_write;
fd_handler_fn *service_read;
struct remote_address addr;
struct incoming_message in;
struct outgoing_message out;
krb5_data callback_buffer;
size_t server_index;
struct conn_state *next;
time_ms endtime;
krb5_boolean defer;
struct {
const char *uri_path;
const char *servername;
char port[PORT_LENGTH];
char *https_request;
k5_tls_handle tls;
} http;
};
/* Set up context->tls. On allocation failure, return ENOMEM. On plugin load
* failure, set context->tls to point to a nulled vtable and return 0. */
static krb5_error_code
init_tls_vtable(krb5_context context)
{
krb5_plugin_initvt_fn initfn;
krb5_error_code ret;
if (context->tls != NULL)
return 0;
context->tls = calloc(1, sizeof(*context->tls));
if (context->tls == NULL)
return ENOMEM;
/* Attempt to load the module; just let it stay nulled out on failure. */
k5_plugin_register_dyn(context, PLUGIN_INTERFACE_TLS, "k5tls", "tls");
ret = k5_plugin_load(context, PLUGIN_INTERFACE_TLS, "k5tls", &initfn);
if (!ret)
(*initfn)(context, 0, 0, (krb5_plugin_vtable)context->tls);
else
TRACE_SENDTO_KDC_K5TLS_LOAD_ERROR(context, ret);
return 0;
}
/* Get current time in milliseconds. */
static krb5_error_code
get_curtime_ms(time_ms *time_out)
{
struct timeval tv;
*time_out = 0;
if (gettimeofday(&tv, 0))
return errno;
*time_out = (time_ms)tv.tv_sec * 1000 + tv.tv_usec / 1000;
return 0;
}
static void
free_http_tls_data(krb5_context context, struct conn_state *state)
{
if (state->http.tls != NULL)
context->tls->free_handle(context, state->http.tls);
state->http.tls = NULL;
free(state->http.https_request);
state->http.https_request = NULL;
}
#ifdef USE_POLL
/* Find a pollfd in selstate by fd, or abort if we can't find it. */
static inline struct pollfd *
find_pollfd(struct select_state *selstate, int fd)
{
int i;
for (i = 0; i < selstate->nfds; i++) {
if (selstate->fds[i].fd == fd)
return &selstate->fds[i];
}
abort();
}
static void
cm_init_selstate(struct select_state *selstate)
{
selstate->nfds = 0;
}
static krb5_boolean
cm_add_fd(struct select_state *selstate, int fd)
{
if (selstate->nfds >= MAX_POLLFDS)
return FALSE;
selstate->fds[selstate->nfds].fd = fd;
selstate->fds[selstate->nfds].events = 0;
selstate->nfds++;
return TRUE;
}
static void
cm_remove_fd(struct select_state *selstate, int fd)
{
struct pollfd *pfd = find_pollfd(selstate, fd);
*pfd = selstate->fds[selstate->nfds - 1];
selstate->nfds--;
}
/* Poll for reading (and not writing) on fd the next time we poll. */
static void
cm_read(struct select_state *selstate, int fd)
{
find_pollfd(selstate, fd)->events = POLLIN;
}
/* Poll for writing (and not reading) on fd the next time we poll. */
static void
cm_write(struct select_state *selstate, int fd)
{
find_pollfd(selstate, fd)->events = POLLOUT;
}
/* Get the output events for fd in the form of ssflags. */
static unsigned int
cm_get_ssflags(struct select_state *selstate, int fd)
{
struct pollfd *pfd = find_pollfd(selstate, fd);
/*
* macOS sets POLLHUP without POLLOUT on connection error. Catch this as
* well as other error events such as POLLNVAL, but only if POLLIN and
* POLLOUT aren't set, as we can get POLLHUP along with POLLIN with TCP
* data still to be read.
*/
if (pfd->revents != 0 && !(pfd->revents & (POLLIN | POLLOUT)))
return SSF_EXCEPTION;
return ((pfd->revents & POLLIN) ? SSF_READ : 0) |
((pfd->revents & POLLOUT) ? SSF_WRITE : 0) |
((pfd->revents & POLLERR) ? SSF_EXCEPTION : 0);
}
#else /* not USE_POLL */
static void
cm_init_selstate(struct select_state *selstate)
{
selstate->nfds = 0;
selstate->max = 0;
FD_ZERO(&selstate->rfds);
FD_ZERO(&selstate->wfds);
FD_ZERO(&selstate->xfds);
}
static krb5_boolean
cm_add_fd(struct select_state *selstate, int fd)
{
#ifndef _WIN32 /* On Windows FD_SETSIZE is a count, not a max value. */
if (fd >= FD_SETSIZE)
return FALSE;
#endif
FD_SET(fd, &selstate->xfds);
if (selstate->max <= fd)
selstate->max = fd + 1;
selstate->nfds++;
return TRUE;
}
static void
cm_remove_fd(struct select_state *selstate, int fd)
{
FD_CLR(fd, &selstate->rfds);
FD_CLR(fd, &selstate->wfds);
FD_CLR(fd, &selstate->xfds);
if (selstate->max == fd + 1) {
while (selstate->max > 0 &&
!FD_ISSET(selstate->max - 1, &selstate->rfds) &&
!FD_ISSET(selstate->max - 1, &selstate->wfds) &&
!FD_ISSET(selstate->max - 1, &selstate->xfds))
selstate->max--;
}
selstate->nfds--;
}
/* Select for reading (and not writing) on fd the next time we select. */
static void
cm_read(struct select_state *selstate, int fd)
{
FD_SET(fd, &selstate->rfds);
FD_CLR(fd, &selstate->wfds);
}
/* Select for writing (and not reading) on fd the next time we select. */
static void
cm_write(struct select_state *selstate, int fd)
{
FD_CLR(fd, &selstate->rfds);
FD_SET(fd, &selstate->wfds);
}
/* Get the events for fd from selstate after a select. */
static unsigned int
cm_get_ssflags(struct select_state *selstate, int fd)
{
return (FD_ISSET(fd, &selstate->rfds) ? SSF_READ : 0) |
(FD_ISSET(fd, &selstate->wfds) ? SSF_WRITE : 0) |
(FD_ISSET(fd, &selstate->xfds) ? SSF_EXCEPTION : 0);
}
#endif /* not USE_POLL */
static krb5_error_code
cm_select_or_poll(const struct select_state *in, time_ms endtime,
struct select_state *out, int *sret)
{
#ifndef USE_POLL
struct timeval tv;
#endif
krb5_error_code retval;
time_ms curtime, interval;
retval = get_curtime_ms(&curtime);
if (retval != 0)
return retval;
interval = (curtime < endtime) ? endtime - curtime : 0;
/* We don't need a separate copy of the selstate for poll, but use one for
* consistency with how we use select. */
*out = *in;
#ifdef USE_POLL
*sret = poll(out->fds, out->nfds, interval);
#else
tv.tv_sec = interval / 1000;
tv.tv_usec = interval % 1000 * 1000;
*sret = select(out->max, &out->rfds, &out->wfds, &out->xfds, &tv);
#endif
return (*sret < 0) ? SOCKET_ERRNO : 0;
}
static int
socktype_for_transport(k5_transport transport)
{
switch (transport) {
case UDP:
return SOCK_DGRAM;
case TCP:
case HTTPS:
return SOCK_STREAM;
default:
return 0;
}
}
static int
check_for_svc_unavailable (krb5_context context,
const krb5_data *reply,
void *msg_handler_data)
{
krb5_error_code *retval = (krb5_error_code *)msg_handler_data;
*retval = 0;
if (krb5_is_krb_error(reply)) {
krb5_error *err_reply;
if (decode_krb5_error(reply, &err_reply) == 0) {
*retval = err_reply->error;
krb5_free_error(context, err_reply);
/* Returning 0 means continue to next KDC */
return (*retval != KDC_ERR_SVC_UNAVAILABLE);
}
}
return 1;
}
void KRB5_CALLCONV
krb5_set_kdc_send_hook(krb5_context context, krb5_pre_send_fn send_hook,
void *data)
{
context->kdc_send_hook = send_hook;
context->kdc_send_hook_data = data;
}
void KRB5_CALLCONV
krb5_set_kdc_recv_hook(krb5_context context, krb5_post_recv_fn recv_hook,
void *data)
{
context->kdc_recv_hook = recv_hook;
context->kdc_recv_hook_data = data;
}
/*
* send the formatted request 'message' to a KDC for realm 'realm' and
* return the response (if any) in 'reply'.
*
* If the message is sent and a response is received, 0 is returned,
* otherwise an error code is returned.
*
* The storage for 'reply' is allocated and should be freed by the caller
* when finished.
*/
krb5_error_code
krb5_sendto_kdc(krb5_context context, const krb5_data *message,
const krb5_data *realm, krb5_data *reply_out, int *use_primary,
int no_udp)
{
krb5_error_code retval, oldret, err;
struct serverlist servers;
int server_used;
k5_transport_strategy strategy;
krb5_data reply = empty_data(), *hook_message = NULL, *hook_reply = NULL;
*reply_out = empty_data();
/*
* find KDC location(s) for realm
*/
/*
* BUG: This code won't return "interesting" errors (e.g., out of mem,
* bad config file) from locate_kdc. KRB5_REALM_CANT_RESOLVE can be
* ignored from one query of two, but if only one query is done, or
* both return that error, it should be returned to the caller. Also,
* "interesting" errors (not KRB5_KDC_UNREACH) from sendto_{udp,tcp}
* should probably be returned as well.
*/
TRACE_SENDTO_KDC(context, message->length, realm, *use_primary, no_udp);
if (!no_udp && context->udp_pref_limit < 0) {
int tmp;
retval = profile_get_integer(context->profile,
KRB5_CONF_LIBDEFAULTS, KRB5_CONF_UDP_PREFERENCE_LIMIT, 0,
DEFAULT_UDP_PREF_LIMIT, &tmp);
if (retval)
return retval;
if (tmp < 0)
tmp = DEFAULT_UDP_PREF_LIMIT;
else if (tmp > HARD_UDP_LIMIT)
/* In the unlikely case that a *really* big value is
given, let 'em use as big as we think we can
support. */
tmp = HARD_UDP_LIMIT;
context->udp_pref_limit = tmp;
}
if (no_udp)
strategy = NO_UDP;
else if (message->length <= (unsigned int) context->udp_pref_limit)
strategy = UDP_FIRST;
else
strategy = UDP_LAST;
retval = k5_locate_kdc(context, realm, &servers, *use_primary, no_udp);
if (retval)
return retval;
if (context->kdc_send_hook != NULL) {
retval = context->kdc_send_hook(context, context->kdc_send_hook_data,
realm, message, &hook_message,
&hook_reply);
if (retval)
goto cleanup;
if (hook_reply != NULL) {
*reply_out = *hook_reply;
free(hook_reply);
goto cleanup;
}
if (hook_message != NULL)
message = hook_message;
}
err = 0;
retval = k5_sendto(context, message, realm, &servers, strategy, NULL,
&reply, NULL, NULL, &server_used,
check_for_svc_unavailable, &err);
if (retval == KRB5_KDC_UNREACH) {
if (err == KDC_ERR_SVC_UNAVAILABLE) {
retval = KRB5KDC_ERR_SVC_UNAVAILABLE;
} else {
k5_setmsg(context, retval,
_("Cannot contact any KDC for realm '%.*s'"),
realm->length, realm->data);
}
}
if (context->kdc_recv_hook != NULL) {
oldret = retval;
retval = context->kdc_recv_hook(context, context->kdc_recv_hook_data,
retval, realm, message, &reply,
&hook_reply);
if (oldret && !retval) {
/*
* The hook must set a reply if it overrides an error from
* k5_sendto(). Treat this reply as coming from the primary
* KDC.
*/
assert(hook_reply != NULL);
*use_primary = 1;
}
}
if (retval)
goto cleanup;
if (hook_reply != NULL) {
*reply_out = *hook_reply;
free(hook_reply);
} else {
*reply_out = reply;
reply = empty_data();
}
/* Set use_primary to 1 if we ended up talking to a primary when we didn't
* explicitly request to. */
if (*use_primary == 0) {
*use_primary = k5_kdc_is_primary(context, realm,
&servers.servers[server_used]);
TRACE_SENDTO_KDC_PRIMARY(context, *use_primary);
}
cleanup:
krb5_free_data(context, hook_message);
krb5_free_data_contents(context, &reply);
k5_free_serverlist(&servers);
return retval;
}
/*
* Notes:
*
* Getting "connection refused" on a connected UDP socket causes
* select to indicate write capability on UNIX, but only shows up
* as an exception on Windows. (I don't think any UNIX system flags
* the error as an exception.) So we check for both, or make it
* system-specific.
*
* Always watch for responses from *any* of the servers. Eventually
* fix the UDP code to do the same.
*
* To do:
* - TCP NOPUSH/CORK socket options?
* - error codes that don't suck
* - getsockopt(SO_ERROR) to check connect status
* - handle error RESPONSE_TOO_BIG from UDP server and use TCP
* connections already in progress
*/
static fd_handler_fn service_tcp_connect;
static fd_handler_fn service_tcp_write;
static fd_handler_fn service_tcp_read;
static fd_handler_fn service_udp_read;
static fd_handler_fn service_https_write;
static fd_handler_fn service_https_read;
static krb5_error_code
make_proxy_request(struct conn_state *state, const krb5_data *realm,
const krb5_data *message, char **req_out, size_t *len_out)
{
krb5_kkdcp_message pm;
krb5_data *encoded_pm = NULL;
struct k5buf buf;
const char *uri_path;
krb5_error_code ret;
*req_out = NULL;
*len_out = 0;
/*
* Stuff the message length in at the front of the kerb_message field
* before encoding. The proxied messages are actually the payload we'd
* be sending and receiving if we were using plain TCP.
*/
memset(&pm, 0, sizeof(pm));
ret = alloc_data(&pm.kerb_message, message->length + 4);
if (ret != 0)
goto cleanup;
store_32_be(message->length, pm.kerb_message.data);
memcpy(pm.kerb_message.data + 4, message->data, message->length);
pm.target_domain = *realm;
ret = encode_krb5_kkdcp_message(&pm, &encoded_pm);
if (ret != 0)
goto cleanup;
/* Build the request to transmit: the headers + the proxy message. */
k5_buf_init_dynamic(&buf);
uri_path = (state->http.uri_path != NULL) ? state->http.uri_path : "";
k5_buf_add_fmt(&buf, "POST /%s HTTP/1.0\r\n", uri_path);
k5_buf_add_fmt(&buf, "Host: %s:%s\r\n", state->http.servername,
state->http.port);
k5_buf_add(&buf, "Cache-Control: no-cache\r\n");
k5_buf_add(&buf, "Pragma: no-cache\r\n");
k5_buf_add(&buf, "User-Agent: kerberos/1.0\r\n");
k5_buf_add(&buf, "Content-type: application/kerberos\r\n");
k5_buf_add_fmt(&buf, "Content-Length: %d\r\n\r\n", encoded_pm->length);
k5_buf_add_len(&buf, encoded_pm->data, encoded_pm->length);
if (k5_buf_status(&buf) != 0) {
ret = ENOMEM;
goto cleanup;
}
*req_out = buf.data;
*len_out = buf.len;
cleanup:
krb5_free_data_contents(NULL, &pm.kerb_message);
krb5_free_data(NULL, encoded_pm);
return ret;
}
/* Set up the actual message we will send across the underlying transport to
* communicate the payload message, using one or both of state->out.sgbuf. */
static krb5_error_code
set_transport_message(struct conn_state *state, const krb5_data *realm,
const krb5_data *message)
{
struct outgoing_message *out = &state->out;
char *req = NULL;
size_t reqlen;
krb5_error_code ret;
if (message == NULL || message->length == 0)
return 0;
if (state->addr.transport == TCP) {
store_32_be(message->length, out->msg_len_buf);
SG_SET(&out->sgbuf[0], out->msg_len_buf, 4);
SG_SET(&out->sgbuf[1], message->data, message->length);
out->sg_count = 2;
return 0;
} else if (state->addr.transport == HTTPS) {
ret = make_proxy_request(state, realm, message, &req, &reqlen);
if (ret != 0)
return ret;
SG_SET(&state->out.sgbuf[0], req, reqlen);
SG_SET(&state->out.sgbuf[1], 0, 0);
state->out.sg_count = 1;
free(state->http.https_request);
state->http.https_request = req;
return 0;
} else {
SG_SET(&out->sgbuf[0], message->data, message->length);
SG_SET(&out->sgbuf[1], NULL, 0);
out->sg_count = 1;
return 0;
}
}
static krb5_error_code
add_connection(struct conn_state **conns, k5_transport transport,
krb5_boolean defer, struct addrinfo *ai, size_t server_index,
const krb5_data *realm, const char *hostname,
const char *port, const char *uri_path, char **udpbufp)
{
struct conn_state *state, **tailptr;
state = calloc(1, sizeof(*state));
if (state == NULL)
return ENOMEM;
state->state = INITIALIZING;
state->out.sgp = state->out.sgbuf;
state->addr.transport = transport;
state->addr.family = ai->ai_family;
state->addr.len = ai->ai_addrlen;
memcpy(&state->addr.saddr, ai->ai_addr, ai->ai_addrlen);
state->defer = defer;
state->fd = INVALID_SOCKET;
state->server_index = server_index;
SG_SET(&state->out.sgbuf[1], NULL, 0);
if (transport == TCP) {
state->service_connect = service_tcp_connect;
state->service_write = service_tcp_write;
state->service_read = service_tcp_read;
} else if (transport == HTTPS) {
assert(hostname != NULL && port != NULL);
state->service_connect = service_tcp_connect;
state->service_write = service_https_write;
state->service_read = service_https_read;
state->http.uri_path = uri_path;
state->http.servername = hostname;
strlcpy(state->http.port, port, PORT_LENGTH);
} else {
state->service_connect = NULL;
state->service_write = NULL;
state->service_read = service_udp_read;
if (*udpbufp == NULL) {
*udpbufp = malloc(MAX_DGRAM_SIZE);
if (*udpbufp == NULL) {
free(state);
return ENOMEM;
}
}
state->in.buf = *udpbufp;
state->in.bufsize = MAX_DGRAM_SIZE;
}
/* Chain the new state onto the tail of the list. */
for (tailptr = conns; *tailptr != NULL; tailptr = &(*tailptr)->next);
*tailptr = state;
return 0;
}
static int
translate_ai_error (int err)
{
switch (err) {
case 0:
return 0;
case EAI_BADFLAGS:
case EAI_FAMILY:
case EAI_SOCKTYPE:
case EAI_SERVICE:
/* All of these indicate bad inputs to getaddrinfo. */
return EINVAL;
case EAI_AGAIN:
/* Translate to standard errno code. */
return EAGAIN;
case EAI_MEMORY:
/* Translate to standard errno code. */
return ENOMEM;
#ifdef EAI_ADDRFAMILY
case EAI_ADDRFAMILY:
#endif
#if defined(EAI_NODATA) && EAI_NODATA != EAI_NONAME
case EAI_NODATA:
#endif
case EAI_NONAME:
/* Name not known or no address data, but no error. Do
nothing more. */
return 0;
#ifdef EAI_OVERFLOW
case EAI_OVERFLOW:
/* An argument buffer overflowed. */
return EINVAL; /* XXX */
#endif
#ifdef EAI_SYSTEM
case EAI_SYSTEM:
/* System error, obviously. */
return errno;
#endif
default:
/* An error code we haven't handled? */
return EINVAL;
}
}
/*
* Resolve the entry in servers with index ind, adding connections to the list
* *conns. Connections are added for each of socktype1 and (if not zero)
* socktype2. message and udpbufp are used to initialize the connections; see
* add_connection above. If no addresses are available for an entry but no
* internal name resolution failure occurs, return 0 without adding any new
* connections.
*/
static krb5_error_code
resolve_server(krb5_context context, const krb5_data *realm,
const struct serverlist *servers, size_t ind,
k5_transport_strategy strategy, const krb5_data *message,
char **udpbufp, struct conn_state **conns)
{
krb5_error_code retval;
struct server_entry *entry = &servers->servers[ind];
k5_transport transport;
struct addrinfo *addrs, *a, hint, ai;
krb5_boolean defer = FALSE;
int err, result;
char portbuf[PORT_LENGTH];
/* Skip entries excluded by the strategy. */
if (strategy == NO_UDP && entry->transport == UDP)
return 0;
if (strategy == ONLY_UDP && entry->transport != UDP &&
entry->transport != TCP_OR_UDP)
return 0;
transport = (strategy == UDP_FIRST || strategy == ONLY_UDP) ? UDP : TCP;
if (entry->hostname == NULL) {
/* Added by a module, so transport is either TCP or UDP. */
ai.ai_socktype = socktype_for_transport(entry->transport);
ai.ai_family = entry->family;
ai.ai_addrlen = entry->addrlen;
ai.ai_addr = (struct sockaddr *)&entry->addr;
defer = (entry->transport != transport);
return add_connection(conns, entry->transport, defer, &ai, ind, realm,
NULL, NULL, entry->uri_path, udpbufp);
}
/* If the entry has a specified transport, use it, but possibly defer the
* addresses we add based on the strategy. */
if (entry->transport != TCP_OR_UDP) {
transport = entry->transport;
defer = (entry->transport == TCP && strategy == UDP_FIRST) ||
(entry->transport == UDP && strategy == UDP_LAST);
}
memset(&hint, 0, sizeof(hint));
hint.ai_family = entry->family;
hint.ai_socktype = socktype_for_transport(transport);
hint.ai_flags = AI_ADDRCONFIG;
#ifdef AI_NUMERICSERV
hint.ai_flags |= AI_NUMERICSERV;
#endif
result = snprintf(portbuf, sizeof(portbuf), "%d", entry->port);
if (SNPRINTF_OVERFLOW(result, sizeof(portbuf)))
return EINVAL;
TRACE_SENDTO_KDC_RESOLVING(context, entry->hostname);
err = getaddrinfo(entry->hostname, portbuf, &hint, &addrs);
if (err)
return translate_ai_error(err);
/* Add each address with the specified or preferred transport. */
retval = 0;
for (a = addrs; a != 0 && retval == 0; a = a->ai_next) {
retval = add_connection(conns, transport, defer, a, ind, realm,
entry->hostname, portbuf, entry->uri_path,
udpbufp);
}
/* For TCP_OR_UDP entries, add each address again with the non-preferred
* transport, if there is one. Flag these as deferred. */
if (retval == 0 && entry->transport == TCP_OR_UDP &&
(strategy == UDP_FIRST || strategy == UDP_LAST)) {
transport = (strategy == UDP_FIRST) ? TCP : UDP;
for (a = addrs; a != 0 && retval == 0; a = a->ai_next) {
a->ai_socktype = socktype_for_transport(transport);
retval = add_connection(conns, transport, TRUE, a, ind, realm,
entry->hostname, portbuf,
entry->uri_path, udpbufp);
}
}
freeaddrinfo(addrs);
return retval;
}
static int
start_connection(krb5_context context, struct conn_state *state,
const krb5_data *message, struct select_state *selstate,
const krb5_data *realm,
struct sendto_callback_info *callback_info)
{
int fd, e, type;
static const int one = 1;
static const struct linger lopt = { 0, 0 };
type = socktype_for_transport(state->addr.transport);
fd = socket(state->addr.family, type, 0);
if (fd == INVALID_SOCKET)
return -1; /* try other hosts */
set_cloexec_fd(fd);
/* Make it non-blocking. */
ioctlsocket(fd, FIONBIO, (const void *) &one);
if (state->addr.transport == TCP) {
setsockopt(fd, SOL_SOCKET, SO_LINGER, &lopt, sizeof(lopt));
TRACE_SENDTO_KDC_TCP_CONNECT(context, &state->addr);
}
/* Start connecting to KDC. */
e = SOCKET_CONNECT(fd, (struct sockaddr *)&state->addr.saddr,
state->addr.len);
if (e != 0) {
/*
* This is the path that should be followed for non-blocking
* connections.
*/
if (SOCKET_ERRNO == EINPROGRESS || SOCKET_ERRNO == EWOULDBLOCK) {
state->state = CONNECTING;
state->fd = fd;
} else {
(void) closesocket(fd);
state->state = FAILED;
return -2;
}
} else {
/*
* Connect returned zero even though we made it non-blocking. This
* happens normally for UDP sockets, and can perhaps also happen for
* TCP sockets connecting to localhost.
*/
state->state = WRITING;
state->fd = fd;
}
/*
* Here's where KPASSWD callback gets the socket information it needs for
* a kpasswd request
*/
if (callback_info) {
e = callback_info->pfn_callback(state->fd, callback_info->data,
&state->callback_buffer);
if (e != 0) {
(void) closesocket(fd);
state->fd = INVALID_SOCKET;
state->state = FAILED;
return -3;
}
message = &state->callback_buffer;
}
e = set_transport_message(state, realm, message);
if (e != 0) {
TRACE_SENDTO_KDC_ERROR_SET_MESSAGE(context, &state->addr, e);
(void) closesocket(state->fd);
state->fd = INVALID_SOCKET;
state->state = FAILED;
return -4;
}
if (state->addr.transport == UDP) {
/* Send it now. */
ssize_t ret;
sg_buf *sg = &state->out.sgbuf[0];
TRACE_SENDTO_KDC_UDP_SEND_INITIAL(context, &state->addr);
ret = send(state->fd, SG_BUF(sg), SG_LEN(sg), 0);
if (ret < 0 || (size_t) ret != SG_LEN(sg)) {
TRACE_SENDTO_KDC_UDP_ERROR_SEND_INITIAL(context, &state->addr,
SOCKET_ERRNO);
(void) closesocket(state->fd);
state->fd = INVALID_SOCKET;
state->state = FAILED;
return -5;
} else {
state->state = READING;
}
}
if (!cm_add_fd(selstate, state->fd)) {
(void) closesocket(state->fd);
state->fd = INVALID_SOCKET;
state->state = FAILED;
return -1;
}
if (state->state == CONNECTING || state->state == WRITING)
cm_write(selstate, state->fd);
else
cm_read(selstate, state->fd);
return 0;
}
/* Return 0 if we sent something, non-0 otherwise.
If 0 is returned, the caller should delay waiting for a response.
Otherwise, the caller should immediately move on to process the
next connection. */
static int
maybe_send(krb5_context context, struct conn_state *conn,
const krb5_data *message, struct select_state *selstate,
const krb5_data *realm,
struct sendto_callback_info *callback_info)
{
sg_buf *sg;
ssize_t ret;
if (conn->state == INITIALIZING) {
return start_connection(context, conn, message, selstate,
realm, callback_info);
}
/* Did we already shut down this channel? */
if (conn->state == FAILED) {
return -1;
}
if (conn->addr.transport != UDP) {
/* The select callback will handle flushing any data we
haven't written yet, and we only write it once. */
return -1;
}
/* UDP - retransmit after a previous attempt timed out. */
sg = &conn->out.sgbuf[0];
TRACE_SENDTO_KDC_UDP_SEND_RETRY(context, &conn->addr);
ret = send(conn->fd, SG_BUF(sg), SG_LEN(sg), 0);
if (ret < 0 || (size_t) ret != SG_LEN(sg)) {
TRACE_SENDTO_KDC_UDP_ERROR_SEND_RETRY(context, &conn->addr,
SOCKET_ERRNO);
/* Keep connection alive, we'll try again next pass.
Is this likely to catch any errors we didn't get from the
select callbacks? */
return -1;
}
/* Yay, it worked. */
return 0;
}
static void
kill_conn(krb5_context context, struct conn_state *conn,
struct select_state *selstate)
{
free_http_tls_data(context, conn);
if (socktype_for_transport(conn->addr.transport) == SOCK_STREAM)
TRACE_SENDTO_KDC_TCP_DISCONNECT(context, &conn->addr);
cm_remove_fd(selstate, conn->fd);
closesocket(conn->fd);
conn->fd = INVALID_SOCKET;
conn->state = FAILED;
}
/* Check socket for error. */
static int
get_so_error(int fd)
{
int e, sockerr;
socklen_t sockerrlen;
sockerr = 0;
sockerrlen = sizeof(sockerr);
e = getsockopt(fd, SOL_SOCKET, SO_ERROR, &sockerr, &sockerrlen);
if (e != 0) {
/* What to do now? */
e = SOCKET_ERRNO;
return e;
}
return sockerr;
}
/* Perform next step in sending. Return true on usable data. */
static krb5_boolean
service_dispatch(krb5_context context, const krb5_data *realm,
struct conn_state *conn, struct select_state *selstate,
int ssflags)
{
/* Check for a socket exception. */
if (ssflags & SSF_EXCEPTION) {
kill_conn(context, conn, selstate);
return FALSE;
}
switch (conn->state) {
case CONNECTING:
assert(conn->service_connect != NULL);
return conn->service_connect(context, realm, conn, selstate);
case WRITING:
assert(conn->service_write != NULL);
return conn->service_write(context, realm, conn, selstate);
case READING:
assert(conn->service_read != NULL);
return conn->service_read(context, realm, conn, selstate);
default:
abort();
}
}
/* Initialize TCP transport. */
static krb5_boolean
service_tcp_connect(krb5_context context, const krb5_data *realm,
struct conn_state *conn, struct select_state *selstate)
{
/* Check whether the connection succeeded. */
int e = get_so_error(conn->fd);
if (e) {
TRACE_SENDTO_KDC_TCP_ERROR_CONNECT(context, &conn->addr, e);
kill_conn(context, conn, selstate);
return FALSE;
}
conn->state = WRITING;
/* Record this connection's timeout for service_fds. */
if (get_curtime_ms(&conn->endtime) == 0)
conn->endtime += 10000;
return conn->service_write(context, realm, conn, selstate);
}
/* Sets conn->state to READING when done. */
static krb5_boolean
service_tcp_write(krb5_context context, const krb5_data *realm,
struct conn_state *conn, struct select_state *selstate)
{
ssize_t nwritten;
SOCKET_WRITEV_TEMP tmp;
TRACE_SENDTO_KDC_TCP_SEND(context, &conn->addr);
nwritten = SOCKET_WRITEV(conn->fd, conn->out.sgp, conn->out.sg_count, tmp);
if (nwritten < 0) {
TRACE_SENDTO_KDC_TCP_ERROR_SEND(context, &conn->addr, SOCKET_ERRNO);
kill_conn(context, conn, selstate);
return FALSE;
}
while (nwritten) {
sg_buf *sgp = conn->out.sgp;
if ((size_t)nwritten < SG_LEN(sgp)) {
SG_ADVANCE(sgp, (size_t)nwritten);
nwritten = 0;
} else {
nwritten -= SG_LEN(sgp);
conn->out.sgp++;
conn->out.sg_count--;
}
}
if (conn->out.sg_count == 0) {
/* Done writing, switch to reading. */
cm_read(selstate, conn->fd);
conn->state = READING;
}
return FALSE;
}
/* Return true on usable data. */
static krb5_boolean
service_tcp_read(krb5_context context, const krb5_data *realm,
struct conn_state *conn, struct select_state *selstate)
{
ssize_t nread;
int e = 0;
struct incoming_message *in = &conn->in;
if (in->bufsizebytes_read == 4) {
/* Reading data. */
nread = SOCKET_READ(conn->fd, &in->buf[in->pos], in->n_left);
if (nread <= 0) {
e = nread ? SOCKET_ERRNO : ECONNRESET;
TRACE_SENDTO_KDC_TCP_ERROR_RECV(context, &conn->addr, e);
kill_conn(context, conn, selstate);
return FALSE;
}
in->n_left -= nread;
in->pos += nread;
if (in->n_left <= 0)
return TRUE;
} else {
/* Reading length. */
nread = SOCKET_READ(conn->fd, in->bufsizebytes + in->bufsizebytes_read,
4 - in->bufsizebytes_read);
if (nread <= 0) {
e = nread ? SOCKET_ERRNO : ECONNRESET;
TRACE_SENDTO_KDC_TCP_ERROR_RECV_LEN(context, &conn->addr, e);
kill_conn(context, conn, selstate);
return FALSE;
}
in->bufsizebytes_read += nread;
if (in->bufsizebytes_read == 4) {
unsigned long len = load_32_be(in->bufsizebytes);
/* Arbitrary 1M cap. */
if (len > 1 * 1024 * 1024) {
kill_conn(context, conn, selstate);
return FALSE;
}
in->bufsize = in->n_left = len;
in->pos = 0;
in->buf = malloc(len);
if (in->buf == NULL) {
kill_conn(context, conn, selstate);
return FALSE;
}
}
}
return FALSE;
}
/* Process events on a UDP socket. Return true if we get a reply. */
static krb5_boolean
service_udp_read(krb5_context context, const krb5_data *realm,
struct conn_state *conn, struct select_state *selstate)
{
int nread;
nread = recv(conn->fd, conn->in.buf, conn->in.bufsize, 0);
if (nread < 0) {
TRACE_SENDTO_KDC_UDP_ERROR_RECV(context, &conn->addr, SOCKET_ERRNO);
kill_conn(context, conn, selstate);
return FALSE;
}
conn->in.pos = nread;
return TRUE;
}
/* Set up conn->http.tls. Return true on success. */
static krb5_boolean
setup_tls(krb5_context context, const krb5_data *realm,
struct conn_state *conn, struct select_state *selstate)
{
krb5_error_code ret;
krb5_boolean ok = FALSE;
char **anchors = NULL, *realmstr = NULL;
const char *names[4];
if (init_tls_vtable(context) != 0 || context->tls->setup == NULL)
return FALSE;
realmstr = k5memdup0(realm->data, realm->length, &ret);
if (realmstr == NULL)
goto cleanup;
/* Load the configured anchors. */
names[0] = KRB5_CONF_REALMS;
names[1] = realmstr;
names[2] = KRB5_CONF_HTTP_ANCHORS;
names[3] = NULL;
ret = profile_get_values(context->profile, names, &anchors);
if (ret != 0 && ret != PROF_NO_RELATION)
goto cleanup;
if (context->tls->setup(context, conn->fd, conn->http.servername, anchors,
&conn->http.tls) != 0) {
TRACE_SENDTO_KDC_HTTPS_ERROR_CONNECT(context, &conn->addr);
goto cleanup;
}
ok = TRUE;
cleanup:
free(realmstr);
profile_free_list(anchors);
return ok;
}
/* Set conn->state to READING when done; otherwise, call a cm_set_. */
static krb5_boolean
service_https_write(krb5_context context, const krb5_data *realm,
struct conn_state *conn, struct select_state *selstate)
{
k5_tls_status st;
/* If this is our first time in here, set up the SSL context. */
if (conn->http.tls == NULL && !setup_tls(context, realm, conn, selstate)) {
kill_conn(context, conn, selstate);
return FALSE;
}
/* Try to transmit our request to the server. */
st = context->tls->write(context, conn->http.tls, SG_BUF(conn->out.sgp),
SG_LEN(conn->out.sgbuf));
if (st == DONE) {
TRACE_SENDTO_KDC_HTTPS_SEND(context, &conn->addr);
cm_read(selstate, conn->fd);
conn->state = READING;
} else if (st == WANT_READ) {
cm_read(selstate, conn->fd);
} else if (st == WANT_WRITE) {
cm_write(selstate, conn->fd);
} else if (st == ERROR_TLS) {
TRACE_SENDTO_KDC_HTTPS_ERROR_SEND(context, &conn->addr);
kill_conn(context, conn, selstate);
}
return FALSE;
}
/* Return true on finished data. Call a cm_read/write function and return
* false if the TLS layer needs it. Kill the connection on error. */
static krb5_boolean
https_read_bytes(krb5_context context, struct conn_state *conn,
struct select_state *selstate)
{
size_t bufsize, nread;
k5_tls_status st;
char *tmp;
struct incoming_message *in = &conn->in;
for (;;) {
if (in->buf == NULL || in->bufsize - in->pos < 1024) {
bufsize = in->bufsize ? in->bufsize * 2 : 8192;
if (bufsize > 1024 * 1024) {
kill_conn(context, conn, selstate);
return FALSE;
}
tmp = realloc(in->buf, bufsize);
if (tmp == NULL) {
kill_conn(context, conn, selstate);
return FALSE;
}
in->buf = tmp;
in->bufsize = bufsize;
}
st = context->tls->read(context, conn->http.tls, &in->buf[in->pos],
in->bufsize - in->pos - 1, &nread);
if (st != DATA_READ)
break;
in->pos += nread;
in->buf[in->pos] = '\0';
}
if (st == DONE)
return TRUE;
if (st == WANT_READ) {
cm_read(selstate, conn->fd);
} else if (st == WANT_WRITE) {
cm_write(selstate, conn->fd);
} else if (st == ERROR_TLS) {
TRACE_SENDTO_KDC_HTTPS_ERROR_RECV(context, &conn->addr);
kill_conn(context, conn, selstate);
}
return FALSE;
}
/* Return true on readable, valid KKDCPP data. */
static krb5_boolean
service_https_read(krb5_context context, const krb5_data *realm,
struct conn_state *conn, struct select_state *selstate)
{
krb5_kkdcp_message *pm = NULL;
krb5_data buf;
const char *rep;
struct incoming_message *in = &conn->in;
/* Read data through the encryption layer. */
if (!https_read_bytes(context, conn, selstate))
return FALSE;
/* Find the beginning of the response body. */
rep = strstr(in->buf, "\r\n\r\n");
if (rep == NULL)
goto kill_conn;
rep += 4;
/* Decode the response. */
buf = make_data((char *)rep, in->pos - (rep - in->buf));
if (decode_krb5_kkdcp_message(&buf, &pm) != 0)
goto kill_conn;
/* Check and discard the message length at the front of the kerb_message
* field after decoding. If it's wrong or missing, something broke. */
if (pm->kerb_message.length < 4 ||
load_32_be(pm->kerb_message.data) != pm->kerb_message.length - 4) {
goto kill_conn;
}
/* Replace all of the content that we read back with just the message. */
memcpy(in->buf, pm->kerb_message.data + 4, pm->kerb_message.length - 4);
in->pos = pm->kerb_message.length - 4;
k5_free_kkdcp_message(context, pm);
return TRUE;
kill_conn:
TRACE_SENDTO_KDC_HTTPS_ERROR(context, in->buf);
k5_free_kkdcp_message(context, pm);
kill_conn(context, conn, selstate);
return FALSE;
}
/* Return the maximum of endtime and the endtime fields of all currently active
* TCP connections. */
static time_ms
get_endtime(time_ms endtime, struct conn_state *conns)
{
struct conn_state *state;
for (state = conns; state != NULL; state = state->next) {
if ((state->state == READING || state->state == WRITING) &&
state->endtime > endtime)
endtime = state->endtime;
}
return endtime;
}
static krb5_boolean
service_fds(krb5_context context, struct select_state *selstate,
time_ms interval, struct conn_state *conns,
struct select_state *seltemp, const krb5_data *realm,
int (*msg_handler)(krb5_context, const krb5_data *, void *),
void *msg_handler_data, struct conn_state **winner_out)
{
int e, selret = 0;
time_ms endtime;
struct conn_state *state;
*winner_out = NULL;
e = get_curtime_ms(&endtime);
if (e)
return TRUE;
endtime += interval;
e = 0;
while (selstate->nfds > 0) {
e = cm_select_or_poll(selstate, get_endtime(endtime, conns),
seltemp, &selret);
if (e == EINTR)
continue;
if (e != 0)
break;
if (selret == 0)
/* Timeout, return to caller. */
return FALSE;
/* Got something on a socket, process it. */
for (state = conns; state != NULL; state = state->next) {
int ssflags;
if (state->fd == INVALID_SOCKET)
continue;
ssflags = cm_get_ssflags(seltemp, state->fd);
if (!ssflags)
continue;
if (service_dispatch(context, realm, state, selstate, ssflags)) {
int stop = 1;
if (msg_handler != NULL) {
krb5_data reply = make_data(state->in.buf, state->in.pos);
stop = (msg_handler(context, &reply, msg_handler_data) != 0);
}
if (stop) {
*winner_out = state;
return TRUE;
}
}
}
}
if (e != 0)
return TRUE;
return FALSE;
}
/*
* Current worst-case timeout behavior:
*
* First pass, 1s per udp or tcp server, plus 2s at end.
* Second pass, 1s per udp server, plus 4s.
* Third pass, 1s per udp server, plus 8s.
* Fourth => 16s, etc.
*
* Restated:
* Per UDP server, 1s per pass.
* Per TCP server, 1s.
* Backoff delay, 2**(P+1) - 2, where P is total number of passes.
*
* Total = 2**(P+1) + U*P + T - 2.
*
* If P=3, Total = 3*U + T + 14.
* If P=4, Total = 4*U + T + 30.
*
* Note that if you try to reach two ports on one server, it counts as two.
*
* There is one exception to the above rules. Whenever a TCP connection is
* established, we wait up to ten seconds for it to finish or fail before
* moving on. This reduces network traffic significantly in a TCP environment.
*/
krb5_error_code
k5_sendto(krb5_context context, const krb5_data *message,
const krb5_data *realm, const struct serverlist *servers,
k5_transport_strategy strategy,
struct sendto_callback_info* callback_info, krb5_data *reply,
struct sockaddr *remoteaddr, socklen_t *remoteaddrlen,
int *server_used,
/* return 0 -> keep going, 1 -> quit */
int (*msg_handler)(krb5_context, const krb5_data *, void *),
void *msg_handler_data)
{
int pass;
time_ms delay;
krb5_error_code retval;
struct conn_state *conns = NULL, *state, **tailptr, *next, *winner;
size_t s;
struct select_state *sel_state = NULL, *seltemp;
char *udpbuf = NULL;
krb5_boolean done = FALSE;
*reply = empty_data();
/* One for use here, listing all our fds in use, and one for
* temporary use in service_fds, for the fds of interest. */
sel_state = malloc(2 * sizeof(*sel_state));
if (sel_state == NULL) {
retval = ENOMEM;
goto cleanup;
}
seltemp = &sel_state[1];
cm_init_selstate(sel_state);
/* First pass: resolve server hosts, communicate with resulting addresses
* of the preferred transport, and wait 1s for an answer from each. */
for (s = 0; s < servers->nservers && !done; s++) {
/* Find the current tail pointer. */
for (tailptr = &conns; *tailptr != NULL; tailptr = &(*tailptr)->next);
retval = resolve_server(context, realm, servers, s, strategy, message,
&udpbuf, &conns);
if (retval)
goto cleanup;
for (state = *tailptr; state != NULL && !done; state = state->next) {
/* Contact each new connection, deferring those which use the
* non-preferred RFC 4120 transport. */
if (state->defer)
continue;
if (maybe_send(context, state, message, sel_state, realm,
callback_info))
continue;
done = service_fds(context, sel_state, 1000, conns, seltemp,
realm, msg_handler, msg_handler_data, &winner);
}
}
/* Complete the first pass by contacting servers of the non-preferred RFC
* 4120 transport (if given), waiting 1s for an answer from each. */
for (state = conns; state != NULL && !done; state = state->next) {
if (!state->defer)
continue;
if (maybe_send(context, state, message, sel_state, realm,
callback_info))
continue;
done = service_fds(context, sel_state, 1000, conns, seltemp,
realm, msg_handler, msg_handler_data, &winner);
}
/* Wait for two seconds at the end of the first pass. */
if (!done) {
done = service_fds(context, sel_state, 2000, conns, seltemp,
realm, msg_handler, msg_handler_data, &winner);
}
/* Make remaining passes over all of the connections. */
delay = 4000;
for (pass = 1; pass < MAX_PASS && !done; pass++) {
for (state = conns; state != NULL && !done; state = state->next) {
if (maybe_send(context, state, message, sel_state, realm,
callback_info))
continue;
done = service_fds(context, sel_state, 1000, conns, seltemp,
realm, msg_handler, msg_handler_data, &winner);
if (sel_state->nfds == 0)
break;
}
/* Wait for the delay backoff at the end of this pass. */
if (!done) {
done = service_fds(context, sel_state, delay, conns, seltemp,
realm, msg_handler, msg_handler_data, &winner);
}
if (sel_state->nfds == 0)
break;
delay *= 2;
}
if (sel_state->nfds == 0 || !done || winner == NULL) {
retval = KRB5_KDC_UNREACH;
goto cleanup;
}
/* Success! */
*reply = make_data(winner->in.buf, winner->in.pos);
retval = 0;
winner->in.buf = NULL;
if (server_used != NULL)
*server_used = winner->server_index;
if (remoteaddr != NULL && remoteaddrlen != 0 && *remoteaddrlen > 0)
(void)getpeername(winner->fd, remoteaddr, remoteaddrlen);
TRACE_SENDTO_KDC_RESPONSE(context, reply->length, &winner->addr);
cleanup:
for (state = conns; state != NULL; state = next) {
next = state->next;
if (state->fd != INVALID_SOCKET) {
if (socktype_for_transport(state->addr.transport) == SOCK_STREAM)
TRACE_SENDTO_KDC_TCP_DISCONNECT(context, &state->addr);
closesocket(state->fd);
free_http_tls_data(context, state);
}
if (state->in.buf != udpbuf)
free(state->in.buf);
if (callback_info) {
callback_info->pfn_cleanup(callback_info->data,
&state->callback_buffer);
}
free(state);
}
if (reply->data != udpbuf)
free(udpbuf);
free(sel_state);
return retval;
}
|
5a8ca790738bfd858b9a6c6131105649f35ffa8e
|
31406f420f019a191a74b9288a6e37dcd89e8e82
|
/tools/node-hermes/third-party/libuv/test/test-delayed-accept.c
|
513e69bd5b7d23a017b1999db6a6a6e54a49945f
|
[
"CC-BY-4.0",
"MIT",
"LicenseRef-scancode-unknown-license-reference",
"BSD-3-Clause",
"ISC",
"BSD-2-Clause"
] |
permissive
|
facebook/hermes
|
b1bf3cb60b5946450c7c9a421ac8dad7a675e0f5
|
440578b31ecce46fcc5ba2ad745ffd5712d63a35
|
refs/heads/main
| 2023-09-06T04:16:02.263184
| 2023-09-05T20:12:54
| 2023-09-05T20:12:54
| 154,201,259
| 8,449
| 593
|
MIT
| 2023-09-14T21:25:56
| 2018-10-22T19:13:00
|
C++
|
UTF-8
|
C
| false
| false
| 4,849
|
c
|
test-delayed-accept.c
|
/* Copyright Joyent, Inc. and other Node contributors. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to
* deal in the Software without restriction, including without limitation the
* rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
* IN THE SOFTWARE.
*/
#include "uv.h"
#include "task.h"
#include <stdio.h>
#include <stdlib.h>
static int connection_cb_called = 0;
static int do_accept_called = 0;
static int close_cb_called = 0;
static int connect_cb_called = 0;
static void alloc_cb(uv_handle_t* handle, size_t size, uv_buf_t* buf) {
buf->base = malloc(size);
buf->len = size;
}
static void close_cb(uv_handle_t* handle) {
ASSERT(handle != NULL);
free(handle);
close_cb_called++;
}
static void do_accept(uv_timer_t* timer_handle) {
uv_tcp_t* server;
uv_tcp_t* accepted_handle = (uv_tcp_t*)malloc(sizeof *accepted_handle);
int r;
ASSERT(timer_handle != NULL);
ASSERT(accepted_handle != NULL);
r = uv_tcp_init(uv_default_loop(), accepted_handle);
ASSERT(r == 0);
server = (uv_tcp_t*)timer_handle->data;
r = uv_accept((uv_stream_t*)server, (uv_stream_t*)accepted_handle);
ASSERT(r == 0);
do_accept_called++;
/* Immediately close the accepted handle. */
uv_close((uv_handle_t*)accepted_handle, close_cb);
/* After accepting the two clients close the server handle */
if (do_accept_called == 2) {
uv_close((uv_handle_t*)server, close_cb);
}
/* Dispose the timer. */
uv_close((uv_handle_t*)timer_handle, close_cb);
}
static void connection_cb(uv_stream_t* tcp, int status) {
int r;
uv_timer_t* timer_handle;
ASSERT(status == 0);
timer_handle = (uv_timer_t*)malloc(sizeof *timer_handle);
ASSERT(timer_handle != NULL);
/* Accept the client after 1 second */
r = uv_timer_init(uv_default_loop(), timer_handle);
ASSERT(r == 0);
timer_handle->data = tcp;
r = uv_timer_start(timer_handle, do_accept, 1000, 0);
ASSERT(r == 0);
connection_cb_called++;
}
static void start_server(void) {
struct sockaddr_in addr;
uv_tcp_t* server = (uv_tcp_t*)malloc(sizeof *server);
int r;
ASSERT(0 == uv_ip4_addr("0.0.0.0", TEST_PORT, &addr));
ASSERT(server != NULL);
r = uv_tcp_init(uv_default_loop(), server);
ASSERT(r == 0);
r = uv_tcp_bind(server, (const struct sockaddr*) &addr, 0);
ASSERT(r == 0);
r = uv_listen((uv_stream_t*)server, 128, connection_cb);
ASSERT(r == 0);
}
static void read_cb(uv_stream_t* tcp, ssize_t nread, const uv_buf_t* buf) {
/* The server will not send anything, it should close gracefully. */
if (buf->base) {
free(buf->base);
}
if (nread >= 0) {
ASSERT(nread == 0);
} else {
ASSERT(tcp != NULL);
ASSERT(nread == UV_EOF);
uv_close((uv_handle_t*)tcp, close_cb);
}
}
static void connect_cb(uv_connect_t* req, int status) {
int r;
ASSERT(req != NULL);
ASSERT(status == 0);
/* Not that the server will send anything, but otherwise we'll never know
* when the server closes the connection. */
r = uv_read_start((uv_stream_t*)(req->handle), alloc_cb, read_cb);
ASSERT(r == 0);
connect_cb_called++;
free(req);
}
static void client_connect(void) {
struct sockaddr_in addr;
uv_tcp_t* client = (uv_tcp_t*)malloc(sizeof *client);
uv_connect_t* connect_req = malloc(sizeof *connect_req);
int r;
ASSERT(0 == uv_ip4_addr("127.0.0.1", TEST_PORT, &addr));
ASSERT(client != NULL);
ASSERT(connect_req != NULL);
r = uv_tcp_init(uv_default_loop(), client);
ASSERT(r == 0);
r = uv_tcp_connect(connect_req,
client,
(const struct sockaddr*) &addr,
connect_cb);
ASSERT(r == 0);
}
TEST_IMPL(delayed_accept) {
start_server();
client_connect();
client_connect();
uv_run(uv_default_loop(), UV_RUN_DEFAULT);
ASSERT(connection_cb_called == 2);
ASSERT(do_accept_called == 2);
ASSERT(connect_cb_called == 2);
ASSERT(close_cb_called == 7);
MAKE_VALGRIND_HAPPY();
return 0;
}
|
deffe592a952049832b336eb817a800f67617457
|
0577a46d8d28e1fd8636893bbdd2b18270bb8eb8
|
/update_notifier/thirdparty/wxWidgets/art/tango/list_add.h
|
a7658833ad75a7411c4fde722282798907c1c336
|
[
"BSD-3-Clause"
] |
permissive
|
ric2b/Vivaldi-browser
|
388a328b4cb838a4c3822357a5529642f86316a5
|
87244f4ee50062e59667bf8b9ca4d5291b6818d7
|
refs/heads/master
| 2022-12-21T04:44:13.804535
| 2022-12-17T16:30:35
| 2022-12-17T16:30:35
| 86,637,416
| 166
| 41
|
BSD-3-Clause
| 2021-03-31T18:49:30
| 2017-03-29T23:09:05
| null |
UTF-8
|
C
| false
| false
| 5,278
|
h
|
list_add.h
|
/* list_add.png - 323 bytes */
static const unsigned char list_add_16x16_png[] = {
0x89, 0x50, 0x4e, 0x47, 0x0d, 0x0a, 0x1a, 0x0a,
0x00, 0x00, 0x00, 0x0d, 0x49, 0x48, 0x44, 0x52,
0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10,
0x08, 0x06, 0x00, 0x00, 0x00, 0x1f, 0xf3, 0xff,
0x61, 0x00, 0x00, 0x00, 0x06, 0x62, 0x4b, 0x47,
0x44, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf9,
0x43, 0xbb, 0x7f, 0x00, 0x00, 0x00, 0x09, 0x70,
0x48, 0x59, 0x73, 0x00, 0x00, 0x0d, 0xd7, 0x00,
0x00, 0x0d, 0xd7, 0x01, 0x42, 0x28, 0x9b, 0x78,
0x00, 0x00, 0x00, 0x07, 0x74, 0x49, 0x4d, 0x45,
0x07, 0xd6, 0x01, 0x0b, 0x10, 0x00, 0x11, 0x94,
0x44, 0x78, 0xa1, 0x00, 0x00, 0x00, 0xd0, 0x49,
0x44, 0x41, 0x54, 0x38, 0xcb, 0xcd, 0x91, 0xbd,
0x0e, 0xc1, 0x60, 0x14, 0x86, 0x1f, 0xd2, 0xc5,
0x60, 0xb7, 0x72, 0x07, 0xd2, 0xba, 0x81, 0xc6,
0x60, 0x36, 0x5b, 0x3b, 0x74, 0x71, 0x07, 0x44,
0xd2, 0xc4, 0x64, 0x17, 0xb1, 0x5a, 0x0d, 0x26,
0x83, 0x84, 0x1b, 0xe8, 0x67, 0x37, 0x5a, 0x2c,
0x56, 0x69, 0xe2, 0xa7, 0xdf, 0x31, 0x10, 0x8a,
0xfa, 0x8b, 0x04, 0xef, 0x76, 0xf2, 0x9d, 0xbc,
0xf9, 0x9e, 0xe7, 0xc0, 0xaf, 0x93, 0xb8, 0xf7,
0x60, 0x39, 0x3d, 0x1f, 0x30, 0x8f, 0xa3, 0xf2,
0xbb, 0x15, 0x2b, 0x6e, 0x2f, 0xf9, 0xa0, 0xdc,
0xf4, 0x5c, 0x1b, 0xcf, 0xb5, 0x89, 0x14, 0xbd,
0x55, 0xf0, 0x52, 0x3e, 0x2e, 0x30, 0xee, 0x30,
0xc7, 0x39, 0x91, 0xc8, 0x78, 0x72, 0x62, 0x44,
0x99, 0x5b, 0xd5, 0x22, 0x5b, 0x2d, 0x24, 0x80,
0x6d, 0x78, 0xde, 0xf7, 0x5c, 0x1b, 0x11, 0x10,
0x39, 0x58, 0xaf, 0x77, 0xc6, 0xe6, 0xcd, 0x0f,
0x00, 0x56, 0xeb, 0x90, 0xf9, 0x32, 0x40, 0x04,
0xb4, 0x16, 0xb4, 0x40, 0xb0, 0x11, 0xc2, 0x50,
0xd8, 0x69, 0x41, 0x6b, 0xc8, 0x65, 0x52, 0xf1,
0x08, 0x80, 0x6a, 0x74, 0x26, 0x17, 0x08, 0xe5,
0x52, 0x01, 0x80, 0xc1, 0xc8, 0xbf, 0x26, 0x52,
0x4f, 0xe5, 0x58, 0x4e, 0x4f, 0x86, 0xd3, 0x85,
0x34, 0xfb, 0x33, 0xb9, 0xe2, 0xff, 0xf2, 0x19,
0xf3, 0xd9, 0xf4, 0x6b, 0x67, 0x8c, 0x89, 0xaa,
0xb5, 0x4f, 0xb6, 0x15, 0x7f, 0x9b, 0x3d, 0x54,
0x72, 0x4b, 0x0b, 0x8b, 0xb2, 0x77, 0x8e, 0x00,
0x00, 0x00, 0x00, 0x49, 0x45, 0x4e, 0x44, 0xae,
0x42, 0x60, 0x82};
/* list_add.png - 494 bytes */
static const unsigned char list_add_24x24_png[] = {
0x89, 0x50, 0x4e, 0x47, 0x0d, 0x0a, 0x1a, 0x0a,
0x00, 0x00, 0x00, 0x0d, 0x49, 0x48, 0x44, 0x52,
0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x18,
0x10, 0x06, 0x00, 0x00, 0x00, 0xb0, 0xe7, 0xe1,
0xbb, 0x00, 0x00, 0x00, 0x06, 0x62, 0x4b, 0x47,
0x44, 0x00, 0xff, 0x00, 0xff, 0x00, 0xff, 0xa0,
0xbd, 0xa7, 0x93, 0x00, 0x00, 0x00, 0x09, 0x70,
0x48, 0x59, 0x73, 0x00, 0x00, 0x0d, 0xd7, 0x00,
0x00, 0x0d, 0xd7, 0x01, 0x42, 0x28, 0x9b, 0x78,
0x00, 0x00, 0x00, 0x09, 0x76, 0x70, 0x41, 0x67,
0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x18,
0x00, 0x78, 0x4c, 0xa5, 0xa6, 0x00, 0x00, 0x01,
0x79, 0x49, 0x44, 0x41, 0x54, 0x58, 0xc3, 0xed,
0x56, 0xb1, 0x8a, 0xc2, 0x40, 0x10, 0x7d, 0x89,
0x27, 0x28, 0x36, 0x5a, 0x08, 0x56, 0x16, 0x56,
0xf6, 0x49, 0x29, 0x82, 0xe8, 0x67, 0xa4, 0xb1,
0x10, 0x0b, 0x41, 0xfc, 0x02, 0x89, 0x85, 0xd8,
0xf8, 0x03, 0xc1, 0xd6, 0x5f, 0xb0, 0xd5, 0xc2,
0xc2, 0x26, 0xdb, 0xd8, 0x5b, 0x58, 0xdb, 0x58,
0xa8, 0x28, 0x66, 0x77, 0xaf, 0x58, 0x82, 0x24,
0x27, 0x26, 0xf1, 0x92, 0xc3, 0x83, 0x7d, 0x45,
0x36, 0x3b, 0xc9, 0xcc, 0xbe, 0xb7, 0x99, 0x99,
0x2c, 0x20, 0x21, 0x21, 0xf1, 0xaf, 0xa1, 0xc4,
0x1d, 0x50, 0xd7, 0x3b, 0x9d, 0xf9, 0xdc, 0xb6,
0xc5, 0x4c, 0xd3, 0xbc, 0x4f, 0x09, 0xb1, 0xed,
0xd9, 0xcc, 0x30, 0x74, 0x3d, 0xae, 0xf5, 0xd4,
0x64, 0xf6, 0x45, 0xd3, 0x46, 0xa3, 0x6e, 0xb7,
0xd1, 0x00, 0x4c, 0x53, 0x8c, 0xcf, 0x05, 0x7d,
0xac, 0x80, 0xbf, 0x83, 0x14, 0x10, 0x04, 0xce,
0x93, 0x8d, 0xff, 0x15, 0xf6, 0xc5, 0xd7, 0xc5,
0xf9, 0x8a, 0xb8, 0x57, 0x82, 0x88, 0x13, 0x24,
0x2b, 0x7c, 0xb1, 0x87, 0x16, 0xe0, 0x12, 0x9f,
0x4e, 0xfb, 0xfd, 0x56, 0x0b, 0xb8, 0xdf, 0x19,
0xe3, 0x1c, 0x50, 0x7c, 0x7d, 0x4c, 0x55, 0x55,
0x55, 0x55, 0x81, 0xf3, 0xf9, 0x7a, 0x75, 0x1c,
0x80, 0x73, 0x41, 0x76, 0x32, 0xe9, 0xf5, 0x9a,
0x4d, 0xc0, 0x71, 0x84, 0x9f, 0x6b, 0x77, 0x47,
0x37, 0xce, 0x70, 0x68, 0x59, 0xcb, 0x65, 0xf8,
0x62, 0x8f, 0x28, 0x00, 0x38, 0x9d, 0x6e, 0x37,
0x4a, 0x81, 0xfd, 0xfe, 0x70, 0xb8, 0x5c, 0x1e,
0x04, 0x18, 0x13, 0xc4, 0xc4, 0x15, 0xa0, 0x54,
0xdc, 0x51, 0xca, 0x18, 0x20, 0x88, 0x0b, 0x3b,
0xa5, 0x9c, 0x3f, 0x84, 0x30, 0x26, 0xec, 0x95,
0x4a, 0xa9, 0x94, 0xcd, 0x46, 0x65, 0x13, 0x59,
0x00, 0x21, 0xa6, 0x69, 0x59, 0xab, 0x55, 0xf0,
0x0e, 0x0d, 0x06, 0x86, 0x51, 0xaf, 0x03, 0x84,
0xec, 0x76, 0xc7, 0x23, 0xb0, 0x5e, 0x6f, 0x36,
0xdb, 0x6d, 0xf8, 0x75, 0x62, 0x17, 0x10, 0x36,
0x27, 0xdd, 0x1c, 0x57, 0x94, 0x57, 0x71, 0x94,
0xd8, 0x7e, 0xa0, 0x89, 0x75, 0xa1, 0x7c, 0x3e,
0x97, 0x4b, 0xa7, 0x1f, 0x29, 0x95, 0x14, 0x12,
0x6c, 0xa3, 0xde, 0x22, 0xfd, 0x70, 0x01, 0xa9,
0x94, 0xdf, 0x52, 0x2e, 0x17, 0x8b, 0x99, 0x0c,
0x50, 0xab, 0x55, 0xab, 0x85, 0x42, 0x90, 0xff,
0xfb, 0x29, 0x15, 0xb9, 0x0b, 0x3d, 0x07, 0xa5,
0xde, 0x39, 0x21, 0xed, 0xf6, 0x78, 0xbc, 0x58,
0xfc, 0x3c, 0xcc, 0x3d, 0xf7, 0x7f, 0xff, 0x2b,
0xc5, 0x7c, 0x1a, 0x75, 0x77, 0xd2, 0x3f, 0xfa,
0x89, 0x8a, 0xd6, 0x29, 0x21, 0x21, 0xf1, 0x7b,
0x7c, 0x03, 0xa0, 0xdd, 0xbc, 0x3f, 0x8b, 0x9a,
0x1d, 0xb4, 0x00, 0x00, 0x00, 0x00, 0x49, 0x45,
0x4e, 0x44, 0xae, 0x42, 0x60, 0x82};
|
458f6b8037bfc16576389a0afd1bf08786145aed
|
7eaf54a78c9e2117247cb2ab6d3a0c20719ba700
|
/SOFTWARE/A64-TERES/linux-a64/drivers/edac/sb_edac.c
|
0d40f7f0c379496406bb46df91005ad3a872548d
|
[
"LicenseRef-scancode-free-unknown",
"Apache-2.0",
"Linux-syscall-note",
"GPL-2.0-only",
"GPL-1.0-or-later"
] |
permissive
|
OLIMEX/DIY-LAPTOP
|
ae82f4ee79c641d9aee444db9a75f3f6709afa92
|
a3fafd1309135650bab27f5eafc0c32bc3ca74ee
|
refs/heads/rel3
| 2023-08-04T01:54:19.483792
| 2023-04-03T07:18:12
| 2023-04-03T07:18:12
| 80,094,055
| 507
| 92
|
Apache-2.0
| 2023-04-03T07:05:59
| 2017-01-26T07:25:50
|
C
|
UTF-8
|
C
| false
| false
| 45,736
|
c
|
sb_edac.c
|
/* Intel Sandy Bridge -EN/-EP/-EX Memory Controller kernel module
*
* This driver supports the memory controllers found on the Intel
* processor family Sandy Bridge.
*
* This file may be distributed under the terms of the
* GNU General Public License version 2 only.
*
* Copyright (c) 2011 by:
* Mauro Carvalho Chehab <mchehab@redhat.com>
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/pci_ids.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/edac.h>
#include <linux/mmzone.h>
#include <linux/smp.h>
#include <linux/bitmap.h>
#include <linux/math64.h>
#include <asm/processor.h>
#include <asm/mce.h>
#include "edac_core.h"
/* Static vars */
static LIST_HEAD(sbridge_edac_list);
static DEFINE_MUTEX(sbridge_edac_lock);
static int probed;
/*
* Alter this version for the module when modifications are made
*/
#define SBRIDGE_REVISION " Ver: 1.0.0 "
#define EDAC_MOD_STR "sbridge_edac"
/*
* Debug macros
*/
#define sbridge_printk(level, fmt, arg...) \
edac_printk(level, "sbridge", fmt, ##arg)
#define sbridge_mc_printk(mci, level, fmt, arg...) \
edac_mc_chipset_printk(mci, level, "sbridge", fmt, ##arg)
/*
* Get a bit field at register value <v>, from bit <lo> to bit <hi>
*/
#define GET_BITFIELD(v, lo, hi) \
(((v) & ((1ULL << ((hi) - (lo) + 1)) - 1) << (lo)) >> (lo))
/*
* sbridge Memory Controller Registers
*/
/*
* FIXME: For now, let's order by device function, as it makes
* easier for driver's development process. This table should be
* moved to pci_id.h when submitted upstream
*/
#define PCI_DEVICE_ID_INTEL_SBRIDGE_SAD0 0x3cf4 /* 12.6 */
#define PCI_DEVICE_ID_INTEL_SBRIDGE_SAD1 0x3cf6 /* 12.7 */
#define PCI_DEVICE_ID_INTEL_SBRIDGE_BR 0x3cf5 /* 13.6 */
#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_HA0 0x3ca0 /* 14.0 */
#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TA 0x3ca8 /* 15.0 */
#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_RAS 0x3c71 /* 15.1 */
#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TAD0 0x3caa /* 15.2 */
#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TAD1 0x3cab /* 15.3 */
#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TAD2 0x3cac /* 15.4 */
#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TAD3 0x3cad /* 15.5 */
#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_DDRIO 0x3cb8 /* 17.0 */
/*
* Currently, unused, but will be needed in the future
* implementations, as they hold the error counters
*/
#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_ERR0 0x3c72 /* 16.2 */
#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_ERR1 0x3c73 /* 16.3 */
#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_ERR2 0x3c76 /* 16.6 */
#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_ERR3 0x3c77 /* 16.7 */
/* Devices 12 Function 6, Offsets 0x80 to 0xcc */
static const u32 dram_rule[] = {
0x80, 0x88, 0x90, 0x98, 0xa0,
0xa8, 0xb0, 0xb8, 0xc0, 0xc8,
};
#define MAX_SAD ARRAY_SIZE(dram_rule)
#define SAD_LIMIT(reg) ((GET_BITFIELD(reg, 6, 25) << 26) | 0x3ffffff)
#define DRAM_ATTR(reg) GET_BITFIELD(reg, 2, 3)
#define INTERLEAVE_MODE(reg) GET_BITFIELD(reg, 1, 1)
#define DRAM_RULE_ENABLE(reg) GET_BITFIELD(reg, 0, 0)
static char *get_dram_attr(u32 reg)
{
switch(DRAM_ATTR(reg)) {
case 0:
return "DRAM";
case 1:
return "MMCFG";
case 2:
return "NXM";
default:
return "unknown";
}
}
static const u32 interleave_list[] = {
0x84, 0x8c, 0x94, 0x9c, 0xa4,
0xac, 0xb4, 0xbc, 0xc4, 0xcc,
};
#define MAX_INTERLEAVE ARRAY_SIZE(interleave_list)
#define SAD_PKG0(reg) GET_BITFIELD(reg, 0, 2)
#define SAD_PKG1(reg) GET_BITFIELD(reg, 3, 5)
#define SAD_PKG2(reg) GET_BITFIELD(reg, 8, 10)
#define SAD_PKG3(reg) GET_BITFIELD(reg, 11, 13)
#define SAD_PKG4(reg) GET_BITFIELD(reg, 16, 18)
#define SAD_PKG5(reg) GET_BITFIELD(reg, 19, 21)
#define SAD_PKG6(reg) GET_BITFIELD(reg, 24, 26)
#define SAD_PKG7(reg) GET_BITFIELD(reg, 27, 29)
static inline int sad_pkg(u32 reg, int interleave)
{
switch (interleave) {
case 0:
return SAD_PKG0(reg);
case 1:
return SAD_PKG1(reg);
case 2:
return SAD_PKG2(reg);
case 3:
return SAD_PKG3(reg);
case 4:
return SAD_PKG4(reg);
case 5:
return SAD_PKG5(reg);
case 6:
return SAD_PKG6(reg);
case 7:
return SAD_PKG7(reg);
default:
return -EINVAL;
}
}
/* Devices 12 Function 7 */
#define TOLM 0x80
#define TOHM 0x84
#define GET_TOLM(reg) ((GET_BITFIELD(reg, 0, 3) << 28) | 0x3ffffff)
#define GET_TOHM(reg) ((GET_BITFIELD(reg, 0, 20) << 25) | 0x3ffffff)
/* Device 13 Function 6 */
#define SAD_TARGET 0xf0
#define SOURCE_ID(reg) GET_BITFIELD(reg, 9, 11)
#define SAD_CONTROL 0xf4
#define NODE_ID(reg) GET_BITFIELD(reg, 0, 2)
/* Device 14 function 0 */
static const u32 tad_dram_rule[] = {
0x40, 0x44, 0x48, 0x4c,
0x50, 0x54, 0x58, 0x5c,
0x60, 0x64, 0x68, 0x6c,
};
#define MAX_TAD ARRAY_SIZE(tad_dram_rule)
#define TAD_LIMIT(reg) ((GET_BITFIELD(reg, 12, 31) << 26) | 0x3ffffff)
#define TAD_SOCK(reg) GET_BITFIELD(reg, 10, 11)
#define TAD_CH(reg) GET_BITFIELD(reg, 8, 9)
#define TAD_TGT3(reg) GET_BITFIELD(reg, 6, 7)
#define TAD_TGT2(reg) GET_BITFIELD(reg, 4, 5)
#define TAD_TGT1(reg) GET_BITFIELD(reg, 2, 3)
#define TAD_TGT0(reg) GET_BITFIELD(reg, 0, 1)
/* Device 15, function 0 */
#define MCMTR 0x7c
#define IS_ECC_ENABLED(mcmtr) GET_BITFIELD(mcmtr, 2, 2)
#define IS_LOCKSTEP_ENABLED(mcmtr) GET_BITFIELD(mcmtr, 1, 1)
#define IS_CLOSE_PG(mcmtr) GET_BITFIELD(mcmtr, 0, 0)
/* Device 15, function 1 */
#define RASENABLES 0xac
#define IS_MIRROR_ENABLED(reg) GET_BITFIELD(reg, 0, 0)
/* Device 15, functions 2-5 */
static const int mtr_regs[] = {
0x80, 0x84, 0x88,
};
#define RANK_DISABLE(mtr) GET_BITFIELD(mtr, 16, 19)
#define IS_DIMM_PRESENT(mtr) GET_BITFIELD(mtr, 14, 14)
#define RANK_CNT_BITS(mtr) GET_BITFIELD(mtr, 12, 13)
#define RANK_WIDTH_BITS(mtr) GET_BITFIELD(mtr, 2, 4)
#define COL_WIDTH_BITS(mtr) GET_BITFIELD(mtr, 0, 1)
static const u32 tad_ch_nilv_offset[] = {
0x90, 0x94, 0x98, 0x9c,
0xa0, 0xa4, 0xa8, 0xac,
0xb0, 0xb4, 0xb8, 0xbc,
};
#define CHN_IDX_OFFSET(reg) GET_BITFIELD(reg, 28, 29)
#define TAD_OFFSET(reg) (GET_BITFIELD(reg, 6, 25) << 26)
static const u32 rir_way_limit[] = {
0x108, 0x10c, 0x110, 0x114, 0x118,
};
#define MAX_RIR_RANGES ARRAY_SIZE(rir_way_limit)
#define IS_RIR_VALID(reg) GET_BITFIELD(reg, 31, 31)
#define RIR_WAY(reg) GET_BITFIELD(reg, 28, 29)
#define RIR_LIMIT(reg) ((GET_BITFIELD(reg, 1, 10) << 29)| 0x1fffffff)
#define MAX_RIR_WAY 8
static const u32 rir_offset[MAX_RIR_RANGES][MAX_RIR_WAY] = {
{ 0x120, 0x124, 0x128, 0x12c, 0x130, 0x134, 0x138, 0x13c },
{ 0x140, 0x144, 0x148, 0x14c, 0x150, 0x154, 0x158, 0x15c },
{ 0x160, 0x164, 0x168, 0x16c, 0x170, 0x174, 0x178, 0x17c },
{ 0x180, 0x184, 0x188, 0x18c, 0x190, 0x194, 0x198, 0x19c },
{ 0x1a0, 0x1a4, 0x1a8, 0x1ac, 0x1b0, 0x1b4, 0x1b8, 0x1bc },
};
#define RIR_RNK_TGT(reg) GET_BITFIELD(reg, 16, 19)
#define RIR_OFFSET(reg) GET_BITFIELD(reg, 2, 14)
/* Device 16, functions 2-7 */
/*
* FIXME: Implement the error count reads directly
*/
static const u32 correrrcnt[] = {
0x104, 0x108, 0x10c, 0x110,
};
#define RANK_ODD_OV(reg) GET_BITFIELD(reg, 31, 31)
#define RANK_ODD_ERR_CNT(reg) GET_BITFIELD(reg, 16, 30)
#define RANK_EVEN_OV(reg) GET_BITFIELD(reg, 15, 15)
#define RANK_EVEN_ERR_CNT(reg) GET_BITFIELD(reg, 0, 14)
static const u32 correrrthrsld[] = {
0x11c, 0x120, 0x124, 0x128,
};
#define RANK_ODD_ERR_THRSLD(reg) GET_BITFIELD(reg, 16, 30)
#define RANK_EVEN_ERR_THRSLD(reg) GET_BITFIELD(reg, 0, 14)
/* Device 17, function 0 */
#define RANK_CFG_A 0x0328
#define IS_RDIMM_ENABLED(reg) GET_BITFIELD(reg, 11, 11)
/*
* sbridge structs
*/
#define NUM_CHANNELS 4
#define MAX_DIMMS 3 /* Max DIMMS per channel */
#define CHANNEL_UNSPECIFIED 0xf /* Intel IA32 SDM 15-14 */
struct sbridge_info {
u32 mcmtr;
};
struct sbridge_channel {
u32 ranks;
u32 dimms;
};
struct pci_id_descr {
int dev;
int func;
int dev_id;
int optional;
};
struct pci_id_table {
const struct pci_id_descr *descr;
int n_devs;
};
struct sbridge_dev {
struct list_head list;
u8 bus, mc;
u8 node_id, source_id;
struct pci_dev **pdev;
int n_devs;
struct mem_ctl_info *mci;
};
struct sbridge_pvt {
struct pci_dev *pci_ta, *pci_ddrio, *pci_ras;
struct pci_dev *pci_sad0, *pci_sad1, *pci_ha0;
struct pci_dev *pci_br;
struct pci_dev *pci_tad[NUM_CHANNELS];
struct sbridge_dev *sbridge_dev;
struct sbridge_info info;
struct sbridge_channel channel[NUM_CHANNELS];
/* Memory type detection */
bool is_mirrored, is_lockstep, is_close_pg;
/* Fifo double buffers */
struct mce mce_entry[MCE_LOG_LEN];
struct mce mce_outentry[MCE_LOG_LEN];
/* Fifo in/out counters */
unsigned mce_in, mce_out;
/* Count indicator to show errors not got */
unsigned mce_overrun;
/* Memory description */
u64 tolm, tohm;
};
#define PCI_DESCR(device, function, device_id, opt) \
.dev = (device), \
.func = (function), \
.dev_id = (device_id), \
.optional = opt
static const struct pci_id_descr pci_dev_descr_sbridge[] = {
/* Processor Home Agent */
{ PCI_DESCR(14, 0, PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_HA0, 0) },
/* Memory controller */
{ PCI_DESCR(15, 0, PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TA, 0) },
{ PCI_DESCR(15, 1, PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_RAS, 0) },
{ PCI_DESCR(15, 2, PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TAD0, 0) },
{ PCI_DESCR(15, 3, PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TAD1, 0) },
{ PCI_DESCR(15, 4, PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TAD2, 0) },
{ PCI_DESCR(15, 5, PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TAD3, 0) },
{ PCI_DESCR(17, 0, PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_DDRIO, 1) },
/* System Address Decoder */
{ PCI_DESCR(12, 6, PCI_DEVICE_ID_INTEL_SBRIDGE_SAD0, 0) },
{ PCI_DESCR(12, 7, PCI_DEVICE_ID_INTEL_SBRIDGE_SAD1, 0) },
/* Broadcast Registers */
{ PCI_DESCR(13, 6, PCI_DEVICE_ID_INTEL_SBRIDGE_BR, 0) },
};
#define PCI_ID_TABLE_ENTRY(A) { .descr=A, .n_devs = ARRAY_SIZE(A) }
static const struct pci_id_table pci_dev_descr_sbridge_table[] = {
PCI_ID_TABLE_ENTRY(pci_dev_descr_sbridge),
{0,} /* 0 terminated list. */
};
/*
* pci_device_id table for which devices we are looking for
*/
static DEFINE_PCI_DEVICE_TABLE(sbridge_pci_tbl) = {
{PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TA)},
{0,} /* 0 terminated list. */
};
/****************************************************************************
Ancillary status routines
****************************************************************************/
static inline int numrank(u32 mtr)
{
int ranks = (1 << RANK_CNT_BITS(mtr));
if (ranks > 4) {
edac_dbg(0, "Invalid number of ranks: %d (max = 4) raw value = %x (%04x)\n",
ranks, (unsigned int)RANK_CNT_BITS(mtr), mtr);
return -EINVAL;
}
return ranks;
}
static inline int numrow(u32 mtr)
{
int rows = (RANK_WIDTH_BITS(mtr) + 12);
if (rows < 13 || rows > 18) {
edac_dbg(0, "Invalid number of rows: %d (should be between 14 and 17) raw value = %x (%04x)\n",
rows, (unsigned int)RANK_WIDTH_BITS(mtr), mtr);
return -EINVAL;
}
return 1 << rows;
}
static inline int numcol(u32 mtr)
{
int cols = (COL_WIDTH_BITS(mtr) + 10);
if (cols > 12) {
edac_dbg(0, "Invalid number of cols: %d (max = 4) raw value = %x (%04x)\n",
cols, (unsigned int)COL_WIDTH_BITS(mtr), mtr);
return -EINVAL;
}
return 1 << cols;
}
static struct sbridge_dev *get_sbridge_dev(u8 bus)
{
struct sbridge_dev *sbridge_dev;
list_for_each_entry(sbridge_dev, &sbridge_edac_list, list) {
if (sbridge_dev->bus == bus)
return sbridge_dev;
}
return NULL;
}
static struct sbridge_dev *alloc_sbridge_dev(u8 bus,
const struct pci_id_table *table)
{
struct sbridge_dev *sbridge_dev;
sbridge_dev = kzalloc(sizeof(*sbridge_dev), GFP_KERNEL);
if (!sbridge_dev)
return NULL;
sbridge_dev->pdev = kzalloc(sizeof(*sbridge_dev->pdev) * table->n_devs,
GFP_KERNEL);
if (!sbridge_dev->pdev) {
kfree(sbridge_dev);
return NULL;
}
sbridge_dev->bus = bus;
sbridge_dev->n_devs = table->n_devs;
list_add_tail(&sbridge_dev->list, &sbridge_edac_list);
return sbridge_dev;
}
static void free_sbridge_dev(struct sbridge_dev *sbridge_dev)
{
list_del(&sbridge_dev->list);
kfree(sbridge_dev->pdev);
kfree(sbridge_dev);
}
/****************************************************************************
Memory check routines
****************************************************************************/
static struct pci_dev *get_pdev_slot_func(u8 bus, unsigned slot,
unsigned func)
{
struct sbridge_dev *sbridge_dev = get_sbridge_dev(bus);
int i;
if (!sbridge_dev)
return NULL;
for (i = 0; i < sbridge_dev->n_devs; i++) {
if (!sbridge_dev->pdev[i])
continue;
if (PCI_SLOT(sbridge_dev->pdev[i]->devfn) == slot &&
PCI_FUNC(sbridge_dev->pdev[i]->devfn) == func) {
edac_dbg(1, "Associated %02x.%02x.%d with %p\n",
bus, slot, func, sbridge_dev->pdev[i]);
return sbridge_dev->pdev[i];
}
}
return NULL;
}
/**
* check_if_ecc_is_active() - Checks if ECC is active
* bus: Device bus
*/
static int check_if_ecc_is_active(const u8 bus)
{
struct pci_dev *pdev = NULL;
u32 mcmtr;
pdev = get_pdev_slot_func(bus, 15, 0);
if (!pdev) {
sbridge_printk(KERN_ERR, "Couldn't find PCI device "
"%2x.%02d.%d!!!\n",
bus, 15, 0);
return -ENODEV;
}
pci_read_config_dword(pdev, MCMTR, &mcmtr);
if (!IS_ECC_ENABLED(mcmtr)) {
sbridge_printk(KERN_ERR, "ECC is disabled. Aborting\n");
return -ENODEV;
}
return 0;
}
static int get_dimm_config(struct mem_ctl_info *mci)
{
struct sbridge_pvt *pvt = mci->pvt_info;
struct dimm_info *dimm;
unsigned i, j, banks, ranks, rows, cols, npages;
u64 size;
u32 reg;
enum edac_type mode;
enum mem_type mtype;
pci_read_config_dword(pvt->pci_br, SAD_TARGET, ®);
pvt->sbridge_dev->source_id = SOURCE_ID(reg);
pci_read_config_dword(pvt->pci_br, SAD_CONTROL, ®);
pvt->sbridge_dev->node_id = NODE_ID(reg);
edac_dbg(0, "mc#%d: Node ID: %d, source ID: %d\n",
pvt->sbridge_dev->mc,
pvt->sbridge_dev->node_id,
pvt->sbridge_dev->source_id);
pci_read_config_dword(pvt->pci_ras, RASENABLES, ®);
if (IS_MIRROR_ENABLED(reg)) {
edac_dbg(0, "Memory mirror is enabled\n");
pvt->is_mirrored = true;
} else {
edac_dbg(0, "Memory mirror is disabled\n");
pvt->is_mirrored = false;
}
pci_read_config_dword(pvt->pci_ta, MCMTR, &pvt->info.mcmtr);
if (IS_LOCKSTEP_ENABLED(pvt->info.mcmtr)) {
edac_dbg(0, "Lockstep is enabled\n");
mode = EDAC_S8ECD8ED;
pvt->is_lockstep = true;
} else {
edac_dbg(0, "Lockstep is disabled\n");
mode = EDAC_S4ECD4ED;
pvt->is_lockstep = false;
}
if (IS_CLOSE_PG(pvt->info.mcmtr)) {
edac_dbg(0, "address map is on closed page mode\n");
pvt->is_close_pg = true;
} else {
edac_dbg(0, "address map is on open page mode\n");
pvt->is_close_pg = false;
}
if (pvt->pci_ddrio) {
pci_read_config_dword(pvt->pci_ddrio, RANK_CFG_A, ®);
if (IS_RDIMM_ENABLED(reg)) {
/* FIXME: Can also be LRDIMM */
edac_dbg(0, "Memory is registered\n");
mtype = MEM_RDDR3;
} else {
edac_dbg(0, "Memory is unregistered\n");
mtype = MEM_DDR3;
}
} else {
edac_dbg(0, "Cannot determine memory type\n");
mtype = MEM_UNKNOWN;
}
/* On all supported DDR3 DIMM types, there are 8 banks available */
banks = 8;
for (i = 0; i < NUM_CHANNELS; i++) {
u32 mtr;
for (j = 0; j < ARRAY_SIZE(mtr_regs); j++) {
dimm = EDAC_DIMM_PTR(mci->layers, mci->dimms, mci->n_layers,
i, j, 0);
pci_read_config_dword(pvt->pci_tad[i],
mtr_regs[j], &mtr);
edac_dbg(4, "Channel #%d MTR%d = %x\n", i, j, mtr);
if (IS_DIMM_PRESENT(mtr)) {
pvt->channel[i].dimms++;
ranks = numrank(mtr);
rows = numrow(mtr);
cols = numcol(mtr);
/* DDR3 has 8 I/O banks */
size = ((u64)rows * cols * banks * ranks) >> (20 - 3);
npages = MiB_TO_PAGES(size);
edac_dbg(0, "mc#%d: channel %d, dimm %d, %Ld Mb (%d pages) bank: %d, rank: %d, row: %#x, col: %#x\n",
pvt->sbridge_dev->mc, i, j,
size, npages,
banks, ranks, rows, cols);
dimm->nr_pages = npages;
dimm->grain = 32;
dimm->dtype = (banks == 8) ? DEV_X8 : DEV_X4;
dimm->mtype = mtype;
dimm->edac_mode = mode;
snprintf(dimm->label, sizeof(dimm->label),
"CPU_SrcID#%u_Channel#%u_DIMM#%u",
pvt->sbridge_dev->source_id, i, j);
}
}
}
return 0;
}
static void get_memory_layout(const struct mem_ctl_info *mci)
{
struct sbridge_pvt *pvt = mci->pvt_info;
int i, j, k, n_sads, n_tads, sad_interl;
u32 reg;
u64 limit, prv = 0;
u64 tmp_mb;
u32 gb, mb;
u32 rir_way;
/*
* Step 1) Get TOLM/TOHM ranges
*/
/* Address range is 32:28 */
pci_read_config_dword(pvt->pci_sad1, TOLM,
®);
pvt->tolm = GET_TOLM(reg);
tmp_mb = (1 + pvt->tolm) >> 20;
gb = div_u64_rem(tmp_mb, 1024, &mb);
edac_dbg(0, "TOLM: %u.%03u GB (0x%016Lx)\n",
gb, (mb*1000)/1024, (u64)pvt->tolm);
/* Address range is already 45:25 */
pci_read_config_dword(pvt->pci_sad1, TOHM,
®);
pvt->tohm = GET_TOHM(reg);
tmp_mb = (1 + pvt->tohm) >> 20;
gb = div_u64_rem(tmp_mb, 1024, &mb);
edac_dbg(0, "TOHM: %u.%03u GB (0x%016Lx)\n",
gb, (mb*1000)/1024, (u64)pvt->tohm);
/*
* Step 2) Get SAD range and SAD Interleave list
* TAD registers contain the interleave wayness. However, it
* seems simpler to just discover it indirectly, with the
* algorithm bellow.
*/
prv = 0;
for (n_sads = 0; n_sads < MAX_SAD; n_sads++) {
/* SAD_LIMIT Address range is 45:26 */
pci_read_config_dword(pvt->pci_sad0, dram_rule[n_sads],
®);
limit = SAD_LIMIT(reg);
if (!DRAM_RULE_ENABLE(reg))
continue;
if (limit <= prv)
break;
tmp_mb = (limit + 1) >> 20;
gb = div_u64_rem(tmp_mb, 1024, &mb);
edac_dbg(0, "SAD#%d %s up to %u.%03u GB (0x%016Lx) Interleave: %s reg=0x%08x\n",
n_sads,
get_dram_attr(reg),
gb, (mb*1000)/1024,
((u64)tmp_mb) << 20L,
INTERLEAVE_MODE(reg) ? "8:6" : "[8:6]XOR[18:16]",
reg);
prv = limit;
pci_read_config_dword(pvt->pci_sad0, interleave_list[n_sads],
®);
sad_interl = sad_pkg(reg, 0);
for (j = 0; j < 8; j++) {
if (j > 0 && sad_interl == sad_pkg(reg, j))
break;
edac_dbg(0, "SAD#%d, interleave #%d: %d\n",
n_sads, j, sad_pkg(reg, j));
}
}
/*
* Step 3) Get TAD range
*/
prv = 0;
for (n_tads = 0; n_tads < MAX_TAD; n_tads++) {
pci_read_config_dword(pvt->pci_ha0, tad_dram_rule[n_tads],
®);
limit = TAD_LIMIT(reg);
if (limit <= prv)
break;
tmp_mb = (limit + 1) >> 20;
gb = div_u64_rem(tmp_mb, 1024, &mb);
edac_dbg(0, "TAD#%d: up to %u.%03u GB (0x%016Lx), socket interleave %d, memory interleave %d, TGT: %d, %d, %d, %d, reg=0x%08x\n",
n_tads, gb, (mb*1000)/1024,
((u64)tmp_mb) << 20L,
(u32)TAD_SOCK(reg),
(u32)TAD_CH(reg),
(u32)TAD_TGT0(reg),
(u32)TAD_TGT1(reg),
(u32)TAD_TGT2(reg),
(u32)TAD_TGT3(reg),
reg);
prv = limit;
}
/*
* Step 4) Get TAD offsets, per each channel
*/
for (i = 0; i < NUM_CHANNELS; i++) {
if (!pvt->channel[i].dimms)
continue;
for (j = 0; j < n_tads; j++) {
pci_read_config_dword(pvt->pci_tad[i],
tad_ch_nilv_offset[j],
®);
tmp_mb = TAD_OFFSET(reg) >> 20;
gb = div_u64_rem(tmp_mb, 1024, &mb);
edac_dbg(0, "TAD CH#%d, offset #%d: %u.%03u GB (0x%016Lx), reg=0x%08x\n",
i, j,
gb, (mb*1000)/1024,
((u64)tmp_mb) << 20L,
reg);
}
}
/*
* Step 6) Get RIR Wayness/Limit, per each channel
*/
for (i = 0; i < NUM_CHANNELS; i++) {
if (!pvt->channel[i].dimms)
continue;
for (j = 0; j < MAX_RIR_RANGES; j++) {
pci_read_config_dword(pvt->pci_tad[i],
rir_way_limit[j],
®);
if (!IS_RIR_VALID(reg))
continue;
tmp_mb = RIR_LIMIT(reg) >> 20;
rir_way = 1 << RIR_WAY(reg);
gb = div_u64_rem(tmp_mb, 1024, &mb);
edac_dbg(0, "CH#%d RIR#%d, limit: %u.%03u GB (0x%016Lx), way: %d, reg=0x%08x\n",
i, j,
gb, (mb*1000)/1024,
((u64)tmp_mb) << 20L,
rir_way,
reg);
for (k = 0; k < rir_way; k++) {
pci_read_config_dword(pvt->pci_tad[i],
rir_offset[j][k],
®);
tmp_mb = RIR_OFFSET(reg) << 6;
gb = div_u64_rem(tmp_mb, 1024, &mb);
edac_dbg(0, "CH#%d RIR#%d INTL#%d, offset %u.%03u GB (0x%016Lx), tgt: %d, reg=0x%08x\n",
i, j, k,
gb, (mb*1000)/1024,
((u64)tmp_mb) << 20L,
(u32)RIR_RNK_TGT(reg),
reg);
}
}
}
}
struct mem_ctl_info *get_mci_for_node_id(u8 node_id)
{
struct sbridge_dev *sbridge_dev;
list_for_each_entry(sbridge_dev, &sbridge_edac_list, list) {
if (sbridge_dev->node_id == node_id)
return sbridge_dev->mci;
}
return NULL;
}
static int get_memory_error_data(struct mem_ctl_info *mci,
u64 addr,
u8 *socket,
long *channel_mask,
u8 *rank,
char **area_type, char *msg)
{
struct mem_ctl_info *new_mci;
struct sbridge_pvt *pvt = mci->pvt_info;
int n_rir, n_sads, n_tads, sad_way, sck_xch;
int sad_interl, idx, base_ch;
int interleave_mode;
unsigned sad_interleave[MAX_INTERLEAVE];
u32 reg;
u8 ch_way,sck_way;
u32 tad_offset;
u32 rir_way;
u32 mb, gb;
u64 ch_addr, offset, limit, prv = 0;
/*
* Step 0) Check if the address is at special memory ranges
* The check bellow is probably enough to fill all cases where
* the error is not inside a memory, except for the legacy
* range (e. g. VGA addresses). It is unlikely, however, that the
* memory controller would generate an error on that range.
*/
if ((addr > (u64) pvt->tolm) && (addr < (1LL << 32))) {
sprintf(msg, "Error at TOLM area, on addr 0x%08Lx", addr);
return -EINVAL;
}
if (addr >= (u64)pvt->tohm) {
sprintf(msg, "Error at MMIOH area, on addr 0x%016Lx", addr);
return -EINVAL;
}
/*
* Step 1) Get socket
*/
for (n_sads = 0; n_sads < MAX_SAD; n_sads++) {
pci_read_config_dword(pvt->pci_sad0, dram_rule[n_sads],
®);
if (!DRAM_RULE_ENABLE(reg))
continue;
limit = SAD_LIMIT(reg);
if (limit <= prv) {
sprintf(msg, "Can't discover the memory socket");
return -EINVAL;
}
if (addr <= limit)
break;
prv = limit;
}
if (n_sads == MAX_SAD) {
sprintf(msg, "Can't discover the memory socket");
return -EINVAL;
}
*area_type = get_dram_attr(reg);
interleave_mode = INTERLEAVE_MODE(reg);
pci_read_config_dword(pvt->pci_sad0, interleave_list[n_sads],
®);
sad_interl = sad_pkg(reg, 0);
for (sad_way = 0; sad_way < 8; sad_way++) {
if (sad_way > 0 && sad_interl == sad_pkg(reg, sad_way))
break;
sad_interleave[sad_way] = sad_pkg(reg, sad_way);
edac_dbg(0, "SAD interleave #%d: %d\n",
sad_way, sad_interleave[sad_way]);
}
edac_dbg(0, "mc#%d: Error detected on SAD#%d: address 0x%016Lx < 0x%016Lx, Interleave [%d:6]%s\n",
pvt->sbridge_dev->mc,
n_sads,
addr,
limit,
sad_way + 7,
interleave_mode ? "" : "XOR[18:16]");
if (interleave_mode)
idx = ((addr >> 6) ^ (addr >> 16)) & 7;
else
idx = (addr >> 6) & 7;
switch (sad_way) {
case 1:
idx = 0;
break;
case 2:
idx = idx & 1;
break;
case 4:
idx = idx & 3;
break;
case 8:
break;
default:
sprintf(msg, "Can't discover socket interleave");
return -EINVAL;
}
*socket = sad_interleave[idx];
edac_dbg(0, "SAD interleave index: %d (wayness %d) = CPU socket %d\n",
idx, sad_way, *socket);
/*
* Move to the proper node structure, in order to access the
* right PCI registers
*/
new_mci = get_mci_for_node_id(*socket);
if (!new_mci) {
sprintf(msg, "Struct for socket #%u wasn't initialized",
*socket);
return -EINVAL;
}
mci = new_mci;
pvt = mci->pvt_info;
/*
* Step 2) Get memory channel
*/
prv = 0;
for (n_tads = 0; n_tads < MAX_TAD; n_tads++) {
pci_read_config_dword(pvt->pci_ha0, tad_dram_rule[n_tads],
®);
limit = TAD_LIMIT(reg);
if (limit <= prv) {
sprintf(msg, "Can't discover the memory channel");
return -EINVAL;
}
if (addr <= limit)
break;
prv = limit;
}
ch_way = TAD_CH(reg) + 1;
sck_way = TAD_SOCK(reg) + 1;
/*
* FIXME: Is it right to always use channel 0 for offsets?
*/
pci_read_config_dword(pvt->pci_tad[0],
tad_ch_nilv_offset[n_tads],
&tad_offset);
if (ch_way == 3)
idx = addr >> 6;
else
idx = addr >> (6 + sck_way);
idx = idx % ch_way;
/*
* FIXME: Shouldn't we use CHN_IDX_OFFSET() here, when ch_way == 3 ???
*/
switch (idx) {
case 0:
base_ch = TAD_TGT0(reg);
break;
case 1:
base_ch = TAD_TGT1(reg);
break;
case 2:
base_ch = TAD_TGT2(reg);
break;
case 3:
base_ch = TAD_TGT3(reg);
break;
default:
sprintf(msg, "Can't discover the TAD target");
return -EINVAL;
}
*channel_mask = 1 << base_ch;
if (pvt->is_mirrored) {
*channel_mask |= 1 << ((base_ch + 2) % 4);
switch(ch_way) {
case 2:
case 4:
sck_xch = 1 << sck_way * (ch_way >> 1);
break;
default:
sprintf(msg, "Invalid mirror set. Can't decode addr");
return -EINVAL;
}
} else
sck_xch = (1 << sck_way) * ch_way;
if (pvt->is_lockstep)
*channel_mask |= 1 << ((base_ch + 1) % 4);
offset = TAD_OFFSET(tad_offset);
edac_dbg(0, "TAD#%d: address 0x%016Lx < 0x%016Lx, socket interleave %d, channel interleave %d (offset 0x%08Lx), index %d, base ch: %d, ch mask: 0x%02lx\n",
n_tads,
addr,
limit,
(u32)TAD_SOCK(reg),
ch_way,
offset,
idx,
base_ch,
*channel_mask);
/* Calculate channel address */
/* Remove the TAD offset */
if (offset > addr) {
sprintf(msg, "Can't calculate ch addr: TAD offset 0x%08Lx is too high for addr 0x%08Lx!",
offset, addr);
return -EINVAL;
}
addr -= offset;
/* Store the low bits [0:6] of the addr */
ch_addr = addr & 0x7f;
/* Remove socket wayness and remove 6 bits */
addr >>= 6;
addr = div_u64(addr, sck_xch);
#if 0
/* Divide by channel way */
addr = addr / ch_way;
#endif
/* Recover the last 6 bits */
ch_addr |= addr << 6;
/*
* Step 3) Decode rank
*/
for (n_rir = 0; n_rir < MAX_RIR_RANGES; n_rir++) {
pci_read_config_dword(pvt->pci_tad[base_ch],
rir_way_limit[n_rir],
®);
if (!IS_RIR_VALID(reg))
continue;
limit = RIR_LIMIT(reg);
gb = div_u64_rem(limit >> 20, 1024, &mb);
edac_dbg(0, "RIR#%d, limit: %u.%03u GB (0x%016Lx), way: %d\n",
n_rir,
gb, (mb*1000)/1024,
limit,
1 << RIR_WAY(reg));
if (ch_addr <= limit)
break;
}
if (n_rir == MAX_RIR_RANGES) {
sprintf(msg, "Can't discover the memory rank for ch addr 0x%08Lx",
ch_addr);
return -EINVAL;
}
rir_way = RIR_WAY(reg);
if (pvt->is_close_pg)
idx = (ch_addr >> 6);
else
idx = (ch_addr >> 13); /* FIXME: Datasheet says to shift by 15 */
idx %= 1 << rir_way;
pci_read_config_dword(pvt->pci_tad[base_ch],
rir_offset[n_rir][idx],
®);
*rank = RIR_RNK_TGT(reg);
edac_dbg(0, "RIR#%d: channel address 0x%08Lx < 0x%08Lx, RIR interleave %d, index %d\n",
n_rir,
ch_addr,
limit,
rir_way,
idx);
return 0;
}
/****************************************************************************
Device initialization routines: put/get, init/exit
****************************************************************************/
/*
* sbridge_put_all_devices 'put' all the devices that we have
* reserved via 'get'
*/
static void sbridge_put_devices(struct sbridge_dev *sbridge_dev)
{
int i;
edac_dbg(0, "\n");
for (i = 0; i < sbridge_dev->n_devs; i++) {
struct pci_dev *pdev = sbridge_dev->pdev[i];
if (!pdev)
continue;
edac_dbg(0, "Removing dev %02x:%02x.%d\n",
pdev->bus->number,
PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn));
pci_dev_put(pdev);
}
}
static void sbridge_put_all_devices(void)
{
struct sbridge_dev *sbridge_dev, *tmp;
list_for_each_entry_safe(sbridge_dev, tmp, &sbridge_edac_list, list) {
sbridge_put_devices(sbridge_dev);
free_sbridge_dev(sbridge_dev);
}
}
/*
* sbridge_get_all_devices Find and perform 'get' operation on the MCH's
* device/functions we want to reference for this driver
*
* Need to 'get' device 16 func 1 and func 2
*/
static int sbridge_get_onedevice(struct pci_dev **prev,
u8 *num_mc,
const struct pci_id_table *table,
const unsigned devno)
{
struct sbridge_dev *sbridge_dev;
const struct pci_id_descr *dev_descr = &table->descr[devno];
struct pci_dev *pdev = NULL;
u8 bus = 0;
sbridge_printk(KERN_INFO,
"Seeking for: dev %02x.%d PCI ID %04x:%04x\n",
dev_descr->dev, dev_descr->func,
PCI_VENDOR_ID_INTEL, dev_descr->dev_id);
pdev = pci_get_device(PCI_VENDOR_ID_INTEL,
dev_descr->dev_id, *prev);
if (!pdev) {
if (*prev) {
*prev = pdev;
return 0;
}
if (dev_descr->optional)
return 0;
if (devno == 0)
return -ENODEV;
sbridge_printk(KERN_INFO,
"Device not found: dev %02x.%d PCI ID %04x:%04x\n",
dev_descr->dev, dev_descr->func,
PCI_VENDOR_ID_INTEL, dev_descr->dev_id);
/* End of list, leave */
return -ENODEV;
}
bus = pdev->bus->number;
sbridge_dev = get_sbridge_dev(bus);
if (!sbridge_dev) {
sbridge_dev = alloc_sbridge_dev(bus, table);
if (!sbridge_dev) {
pci_dev_put(pdev);
return -ENOMEM;
}
(*num_mc)++;
}
if (sbridge_dev->pdev[devno]) {
sbridge_printk(KERN_ERR,
"Duplicated device for "
"dev %02x:%d.%d PCI ID %04x:%04x\n",
bus, dev_descr->dev, dev_descr->func,
PCI_VENDOR_ID_INTEL, dev_descr->dev_id);
pci_dev_put(pdev);
return -ENODEV;
}
sbridge_dev->pdev[devno] = pdev;
/* Sanity check */
if (unlikely(PCI_SLOT(pdev->devfn) != dev_descr->dev ||
PCI_FUNC(pdev->devfn) != dev_descr->func)) {
sbridge_printk(KERN_ERR,
"Device PCI ID %04x:%04x "
"has dev %02x:%d.%d instead of dev %02x:%02x.%d\n",
PCI_VENDOR_ID_INTEL, dev_descr->dev_id,
bus, PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn),
bus, dev_descr->dev, dev_descr->func);
return -ENODEV;
}
/* Be sure that the device is enabled */
if (unlikely(pci_enable_device(pdev) < 0)) {
sbridge_printk(KERN_ERR,
"Couldn't enable "
"dev %02x:%d.%d PCI ID %04x:%04x\n",
bus, dev_descr->dev, dev_descr->func,
PCI_VENDOR_ID_INTEL, dev_descr->dev_id);
return -ENODEV;
}
edac_dbg(0, "Detected dev %02x:%d.%d PCI ID %04x:%04x\n",
bus, dev_descr->dev, dev_descr->func,
PCI_VENDOR_ID_INTEL, dev_descr->dev_id);
/*
* As stated on drivers/pci/search.c, the reference count for
* @from is always decremented if it is not %NULL. So, as we need
* to get all devices up to null, we need to do a get for the device
*/
pci_dev_get(pdev);
*prev = pdev;
return 0;
}
static int sbridge_get_all_devices(u8 *num_mc)
{
int i, rc;
struct pci_dev *pdev = NULL;
const struct pci_id_table *table = pci_dev_descr_sbridge_table;
while (table && table->descr) {
for (i = 0; i < table->n_devs; i++) {
pdev = NULL;
do {
rc = sbridge_get_onedevice(&pdev, num_mc,
table, i);
if (rc < 0) {
if (i == 0) {
i = table->n_devs;
break;
}
sbridge_put_all_devices();
return -ENODEV;
}
} while (pdev);
}
table++;
}
return 0;
}
static int mci_bind_devs(struct mem_ctl_info *mci,
struct sbridge_dev *sbridge_dev)
{
struct sbridge_pvt *pvt = mci->pvt_info;
struct pci_dev *pdev;
int i, func, slot;
for (i = 0; i < sbridge_dev->n_devs; i++) {
pdev = sbridge_dev->pdev[i];
if (!pdev)
continue;
slot = PCI_SLOT(pdev->devfn);
func = PCI_FUNC(pdev->devfn);
switch (slot) {
case 12:
switch (func) {
case 6:
pvt->pci_sad0 = pdev;
break;
case 7:
pvt->pci_sad1 = pdev;
break;
default:
goto error;
}
break;
case 13:
switch (func) {
case 6:
pvt->pci_br = pdev;
break;
default:
goto error;
}
break;
case 14:
switch (func) {
case 0:
pvt->pci_ha0 = pdev;
break;
default:
goto error;
}
break;
case 15:
switch (func) {
case 0:
pvt->pci_ta = pdev;
break;
case 1:
pvt->pci_ras = pdev;
break;
case 2:
case 3:
case 4:
case 5:
pvt->pci_tad[func - 2] = pdev;
break;
default:
goto error;
}
break;
case 17:
switch (func) {
case 0:
pvt->pci_ddrio = pdev;
break;
default:
goto error;
}
break;
default:
goto error;
}
edac_dbg(0, "Associated PCI %02x.%02d.%d with dev = %p\n",
sbridge_dev->bus,
PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn),
pdev);
}
/* Check if everything were registered */
if (!pvt->pci_sad0 || !pvt->pci_sad1 || !pvt->pci_ha0 ||
!pvt-> pci_tad || !pvt->pci_ras || !pvt->pci_ta)
goto enodev;
for (i = 0; i < NUM_CHANNELS; i++) {
if (!pvt->pci_tad[i])
goto enodev;
}
return 0;
enodev:
sbridge_printk(KERN_ERR, "Some needed devices are missing\n");
return -ENODEV;
error:
sbridge_printk(KERN_ERR, "Device %d, function %d "
"is out of the expected range\n",
slot, func);
return -EINVAL;
}
/****************************************************************************
Error check routines
****************************************************************************/
/*
* While Sandy Bridge has error count registers, SMI BIOS read values from
* and resets the counters. So, they are not reliable for the OS to read
* from them. So, we have no option but to just trust on whatever MCE is
* telling us about the errors.
*/
static void sbridge_mce_output_error(struct mem_ctl_info *mci,
const struct mce *m)
{
struct mem_ctl_info *new_mci;
struct sbridge_pvt *pvt = mci->pvt_info;
enum hw_event_mc_err_type tp_event;
char *type, *optype, msg[256];
bool ripv = GET_BITFIELD(m->mcgstatus, 0, 0);
bool overflow = GET_BITFIELD(m->status, 62, 62);
bool uncorrected_error = GET_BITFIELD(m->status, 61, 61);
bool recoverable = GET_BITFIELD(m->status, 56, 56);
u32 core_err_cnt = GET_BITFIELD(m->status, 38, 52);
u32 mscod = GET_BITFIELD(m->status, 16, 31);
u32 errcode = GET_BITFIELD(m->status, 0, 15);
u32 channel = GET_BITFIELD(m->status, 0, 3);
u32 optypenum = GET_BITFIELD(m->status, 4, 6);
long channel_mask, first_channel;
u8 rank, socket;
int rc, dimm;
char *area_type = NULL;
if (uncorrected_error) {
if (ripv) {
type = "FATAL";
tp_event = HW_EVENT_ERR_FATAL;
} else {
type = "NON_FATAL";
tp_event = HW_EVENT_ERR_UNCORRECTED;
}
} else {
type = "CORRECTED";
tp_event = HW_EVENT_ERR_CORRECTED;
}
/*
* According with Table 15-9 of the Intel Architecture spec vol 3A,
* memory errors should fit in this mask:
* 000f 0000 1mmm cccc (binary)
* where:
* f = Correction Report Filtering Bit. If 1, subsequent errors
* won't be shown
* mmm = error type
* cccc = channel
* If the mask doesn't match, report an error to the parsing logic
*/
if (! ((errcode & 0xef80) == 0x80)) {
optype = "Can't parse: it is not a mem";
} else {
switch (optypenum) {
case 0:
optype = "generic undef request error";
break;
case 1:
optype = "memory read error";
break;
case 2:
optype = "memory write error";
break;
case 3:
optype = "addr/cmd error";
break;
case 4:
optype = "memory scrubbing error";
break;
default:
optype = "reserved";
break;
}
}
rc = get_memory_error_data(mci, m->addr, &socket,
&channel_mask, &rank, &area_type, msg);
if (rc < 0)
goto err_parsing;
new_mci = get_mci_for_node_id(socket);
if (!new_mci) {
strcpy(msg, "Error: socket got corrupted!");
goto err_parsing;
}
mci = new_mci;
pvt = mci->pvt_info;
first_channel = find_first_bit(&channel_mask, NUM_CHANNELS);
if (rank < 4)
dimm = 0;
else if (rank < 8)
dimm = 1;
else
dimm = 2;
/*
* FIXME: On some memory configurations (mirror, lockstep), the
* Memory Controller can't point the error to a single DIMM. The
* EDAC core should be handling the channel mask, in order to point
* to the group of dimm's where the error may be happening.
*/
snprintf(msg, sizeof(msg),
"%s%s area:%s err_code:%04x:%04x socket:%d channel_mask:%ld rank:%d",
overflow ? " OVERFLOW" : "",
(uncorrected_error && recoverable) ? " recoverable" : "",
area_type,
mscod, errcode,
socket,
channel_mask,
rank);
edac_dbg(0, "%s\n", msg);
/* FIXME: need support for channel mask */
if (channel == CHANNEL_UNSPECIFIED)
channel = -1;
/* Call the helper to output message */
edac_mc_handle_error(tp_event, mci, core_err_cnt,
m->addr >> PAGE_SHIFT, m->addr & ~PAGE_MASK, 0,
channel, dimm, -1,
optype, msg);
return;
err_parsing:
edac_mc_handle_error(tp_event, mci, core_err_cnt, 0, 0, 0,
-1, -1, -1,
msg, "");
}
/*
* sbridge_check_error Retrieve and process errors reported by the
* hardware. Called by the Core module.
*/
static void sbridge_check_error(struct mem_ctl_info *mci)
{
struct sbridge_pvt *pvt = mci->pvt_info;
int i;
unsigned count = 0;
struct mce *m;
/*
* MCE first step: Copy all mce errors into a temporary buffer
* We use a double buffering here, to reduce the risk of
* loosing an error.
*/
smp_rmb();
count = (pvt->mce_out + MCE_LOG_LEN - pvt->mce_in)
% MCE_LOG_LEN;
if (!count)
return;
m = pvt->mce_outentry;
if (pvt->mce_in + count > MCE_LOG_LEN) {
unsigned l = MCE_LOG_LEN - pvt->mce_in;
memcpy(m, &pvt->mce_entry[pvt->mce_in], sizeof(*m) * l);
smp_wmb();
pvt->mce_in = 0;
count -= l;
m += l;
}
memcpy(m, &pvt->mce_entry[pvt->mce_in], sizeof(*m) * count);
smp_wmb();
pvt->mce_in += count;
smp_rmb();
if (pvt->mce_overrun) {
sbridge_printk(KERN_ERR, "Lost %d memory errors\n",
pvt->mce_overrun);
smp_wmb();
pvt->mce_overrun = 0;
}
/*
* MCE second step: parse errors and display
*/
for (i = 0; i < count; i++)
sbridge_mce_output_error(mci, &pvt->mce_outentry[i]);
}
/*
* sbridge_mce_check_error Replicates mcelog routine to get errors
* This routine simply queues mcelog errors, and
* return. The error itself should be handled later
* by sbridge_check_error.
* WARNING: As this routine should be called at NMI time, extra care should
* be taken to avoid deadlocks, and to be as fast as possible.
*/
static int sbridge_mce_check_error(struct notifier_block *nb, unsigned long val,
void *data)
{
struct mce *mce = (struct mce *)data;
struct mem_ctl_info *mci;
struct sbridge_pvt *pvt;
mci = get_mci_for_node_id(mce->socketid);
if (!mci)
return NOTIFY_DONE;
pvt = mci->pvt_info;
/*
* Just let mcelog handle it if the error is
* outside the memory controller. A memory error
* is indicated by bit 7 = 1 and bits = 8-11,13-15 = 0.
* bit 12 has an special meaning.
*/
if ((mce->status & 0xefff) >> 7 != 1)
return NOTIFY_DONE;
printk("sbridge: HANDLING MCE MEMORY ERROR\n");
printk("CPU %d: Machine Check Exception: %Lx Bank %d: %016Lx\n",
mce->extcpu, mce->mcgstatus, mce->bank, mce->status);
printk("TSC %llx ", mce->tsc);
printk("ADDR %llx ", mce->addr);
printk("MISC %llx ", mce->misc);
printk("PROCESSOR %u:%x TIME %llu SOCKET %u APIC %x\n",
mce->cpuvendor, mce->cpuid, mce->time,
mce->socketid, mce->apicid);
/* Only handle if it is the right mc controller */
if (cpu_data(mce->cpu).phys_proc_id != pvt->sbridge_dev->mc)
return NOTIFY_DONE;
smp_rmb();
if ((pvt->mce_out + 1) % MCE_LOG_LEN == pvt->mce_in) {
smp_wmb();
pvt->mce_overrun++;
return NOTIFY_DONE;
}
/* Copy memory error at the ringbuffer */
memcpy(&pvt->mce_entry[pvt->mce_out], mce, sizeof(*mce));
smp_wmb();
pvt->mce_out = (pvt->mce_out + 1) % MCE_LOG_LEN;
/* Handle fatal errors immediately */
if (mce->mcgstatus & 1)
sbridge_check_error(mci);
/* Advice mcelog that the error were handled */
return NOTIFY_STOP;
}
static struct notifier_block sbridge_mce_dec = {
.notifier_call = sbridge_mce_check_error,
};
/****************************************************************************
EDAC register/unregister logic
****************************************************************************/
static void sbridge_unregister_mci(struct sbridge_dev *sbridge_dev)
{
struct mem_ctl_info *mci = sbridge_dev->mci;
struct sbridge_pvt *pvt;
if (unlikely(!mci || !mci->pvt_info)) {
edac_dbg(0, "MC: dev = %p\n", &sbridge_dev->pdev[0]->dev);
sbridge_printk(KERN_ERR, "Couldn't find mci handler\n");
return;
}
pvt = mci->pvt_info;
edac_dbg(0, "MC: mci = %p, dev = %p\n",
mci, &sbridge_dev->pdev[0]->dev);
/* Remove MC sysfs nodes */
edac_mc_del_mc(mci->pdev);
edac_dbg(1, "%s: free mci struct\n", mci->ctl_name);
kfree(mci->ctl_name);
edac_mc_free(mci);
sbridge_dev->mci = NULL;
}
static int sbridge_register_mci(struct sbridge_dev *sbridge_dev)
{
struct mem_ctl_info *mci;
struct edac_mc_layer layers[2];
struct sbridge_pvt *pvt;
int rc;
/* Check the number of active and not disabled channels */
rc = check_if_ecc_is_active(sbridge_dev->bus);
if (unlikely(rc < 0))
return rc;
/* allocate a new MC control structure */
layers[0].type = EDAC_MC_LAYER_CHANNEL;
layers[0].size = NUM_CHANNELS;
layers[0].is_virt_csrow = false;
layers[1].type = EDAC_MC_LAYER_SLOT;
layers[1].size = MAX_DIMMS;
layers[1].is_virt_csrow = true;
mci = edac_mc_alloc(sbridge_dev->mc, ARRAY_SIZE(layers), layers,
sizeof(*pvt));
if (unlikely(!mci))
return -ENOMEM;
edac_dbg(0, "MC: mci = %p, dev = %p\n",
mci, &sbridge_dev->pdev[0]->dev);
pvt = mci->pvt_info;
memset(pvt, 0, sizeof(*pvt));
/* Associate sbridge_dev and mci for future usage */
pvt->sbridge_dev = sbridge_dev;
sbridge_dev->mci = mci;
mci->mtype_cap = MEM_FLAG_DDR3;
mci->edac_ctl_cap = EDAC_FLAG_NONE;
mci->edac_cap = EDAC_FLAG_NONE;
mci->mod_name = "sbridge_edac.c";
mci->mod_ver = SBRIDGE_REVISION;
mci->ctl_name = kasprintf(GFP_KERNEL, "Sandy Bridge Socket#%d", mci->mc_idx);
mci->dev_name = pci_name(sbridge_dev->pdev[0]);
mci->ctl_page_to_phys = NULL;
/* Set the function pointer to an actual operation function */
mci->edac_check = sbridge_check_error;
/* Store pci devices at mci for faster access */
rc = mci_bind_devs(mci, sbridge_dev);
if (unlikely(rc < 0))
goto fail0;
/* Get dimm basic config and the memory layout */
get_dimm_config(mci);
get_memory_layout(mci);
/* record ptr to the generic device */
mci->pdev = &sbridge_dev->pdev[0]->dev;
/* add this new MC control structure to EDAC's list of MCs */
if (unlikely(edac_mc_add_mc(mci))) {
edac_dbg(0, "MC: failed edac_mc_add_mc()\n");
rc = -EINVAL;
goto fail0;
}
return 0;
fail0:
kfree(mci->ctl_name);
edac_mc_free(mci);
sbridge_dev->mci = NULL;
return rc;
}
/*
* sbridge_probe Probe for ONE instance of device to see if it is
* present.
* return:
* 0 for FOUND a device
* < 0 for error code
*/
static int sbridge_probe(struct pci_dev *pdev, const struct pci_device_id *id)
{
int rc;
u8 mc, num_mc = 0;
struct sbridge_dev *sbridge_dev;
/* get the pci devices we want to reserve for our use */
mutex_lock(&sbridge_edac_lock);
/*
* All memory controllers are allocated at the first pass.
*/
if (unlikely(probed >= 1)) {
mutex_unlock(&sbridge_edac_lock);
return -ENODEV;
}
probed++;
rc = sbridge_get_all_devices(&num_mc);
if (unlikely(rc < 0))
goto fail0;
mc = 0;
list_for_each_entry(sbridge_dev, &sbridge_edac_list, list) {
edac_dbg(0, "Registering MC#%d (%d of %d)\n",
mc, mc + 1, num_mc);
sbridge_dev->mc = mc++;
rc = sbridge_register_mci(sbridge_dev);
if (unlikely(rc < 0))
goto fail1;
}
sbridge_printk(KERN_INFO, "Driver loaded.\n");
mutex_unlock(&sbridge_edac_lock);
return 0;
fail1:
list_for_each_entry(sbridge_dev, &sbridge_edac_list, list)
sbridge_unregister_mci(sbridge_dev);
sbridge_put_all_devices();
fail0:
mutex_unlock(&sbridge_edac_lock);
return rc;
}
/*
* sbridge_remove destructor for one instance of device
*
*/
static void sbridge_remove(struct pci_dev *pdev)
{
struct sbridge_dev *sbridge_dev;
edac_dbg(0, "\n");
/*
* we have a trouble here: pdev value for removal will be wrong, since
* it will point to the X58 register used to detect that the machine
* is a Nehalem or upper design. However, due to the way several PCI
* devices are grouped together to provide MC functionality, we need
* to use a different method for releasing the devices
*/
mutex_lock(&sbridge_edac_lock);
if (unlikely(!probed)) {
mutex_unlock(&sbridge_edac_lock);
return;
}
list_for_each_entry(sbridge_dev, &sbridge_edac_list, list)
sbridge_unregister_mci(sbridge_dev);
/* Release PCI resources */
sbridge_put_all_devices();
probed--;
mutex_unlock(&sbridge_edac_lock);
}
MODULE_DEVICE_TABLE(pci, sbridge_pci_tbl);
/*
* sbridge_driver pci_driver structure for this module
*
*/
static struct pci_driver sbridge_driver = {
.name = "sbridge_edac",
.probe = sbridge_probe,
.remove = sbridge_remove,
.id_table = sbridge_pci_tbl,
};
/*
* sbridge_init Module entry function
* Try to initialize this module for its devices
*/
static int __init sbridge_init(void)
{
int pci_rc;
edac_dbg(2, "\n");
/* Ensure that the OPSTATE is set correctly for POLL or NMI */
opstate_init();
pci_rc = pci_register_driver(&sbridge_driver);
if (pci_rc >= 0) {
mce_register_decode_chain(&sbridge_mce_dec);
return 0;
}
sbridge_printk(KERN_ERR, "Failed to register device with error %d.\n",
pci_rc);
return pci_rc;
}
/*
* sbridge_exit() Module exit function
* Unregister the driver
*/
static void __exit sbridge_exit(void)
{
edac_dbg(2, "\n");
pci_unregister_driver(&sbridge_driver);
mce_unregister_decode_chain(&sbridge_mce_dec);
}
module_init(sbridge_init);
module_exit(sbridge_exit);
module_param(edac_op_state, int, 0444);
MODULE_PARM_DESC(edac_op_state, "EDAC Error Reporting state: 0=Poll,1=NMI");
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@redhat.com>");
MODULE_AUTHOR("Red Hat Inc. (http://www.redhat.com)");
MODULE_DESCRIPTION("MC Driver for Intel Sandy Bridge memory controllers - "
SBRIDGE_REVISION);
|
772ee88f19001f1a2ef68dfd247bebebc53e6d29
|
78dc9f153549b281be709227bc9897931b06260d
|
/generation/WinSDK/RecompiledIdlHeaders/winrt/MessageDispatcherApi.h
|
ea06492d4a7bbfb2217b15b337a0169aa91a2416
|
[
"MIT"
] |
permissive
|
microsoft/win32metadata
|
dff35b4fe904d556162cee5133294c4498f1a79a
|
5bf233f04d45f7a697e112e9639722551103eb07
|
refs/heads/main
| 2023-09-01T19:51:22.972899
| 2023-08-30T21:39:44
| 2023-08-30T21:39:44
| 270,838,404
| 1,240
| 107
|
NOASSERTION
| 2023-09-14T18:49:44
| 2020-06-08T21:52:10
|
C++
|
UTF-8
|
C
| false
| false
| 831
|
h
|
MessageDispatcherApi.h
|
//+-------------------------------------------------------------------------
//
// Microsoft Windows
// Copyright (c) Microsoft Corporation. All rights reserved.
//
//--------------------------------------------------------------------------
#if ( _MSC_VER >= 1020 )
#pragma once
#endif
#include <winapifamily.h>
#pragma region Desktop Family
#if WINAPI_FAMILY_PARTITION(WINAPI_PARTITION_DESKTOP)
#include <IMessageDispatcher.h>
typedef IMessageDispatcher *PMessageDispatcher;
#ifdef __cplusplus
extern "C"
{
#endif
#if (NTDDI_VERSION >= NTDDI_WIN8)
WINOLEAPI_(void) CoSetMessageDispatcher(
_In_opt_ PMessageDispatcher pMessageDispatcher);
WINOLEAPI_(void) CoHandlePriorityEventsFromMessagePump();
#endif
#ifdef __cplusplus
}
#endif
#endif /* WINAPI_FAMILY_PARTITION(WINAPI_PARTITION_DESKTOP) */
#pragma endregion
|
ca801c130975487820ebbccd71741f18e092bf01
|
e5f4f37d941ceb8145d65f92028cc54658b1ac01
|
/Code/Engine/Foundation/Memory/Implementation/Posix/PageAllocator_posix.h
|
d3a2c7ad6f708f31d901febadb1b5e95799b0eb8
|
[
"MIT"
] |
permissive
|
ezEngine/ezEngine
|
19983d2733a5409fb2665c6c3a0a575dadcefb50
|
c46e3b4b2cd46798e4abb4938fbca281c054b039
|
refs/heads/dev
| 2023-09-06T02:17:28.152665
| 2023-09-05T18:25:43
| 2023-09-05T18:25:43
| 18,179,848
| 1,050
| 165
|
MIT
| 2023-09-14T21:44:39
| 2014-03-27T15:02:16
|
C++
|
UTF-8
|
C
| false
| false
| 919
|
h
|
PageAllocator_posix.h
|
#include <Foundation/Time/Time.h>
// static
void* ezPageAllocator::AllocatePage(size_t uiSize)
{
ezTime fAllocationTime = ezTime::Now();
void* ptr = nullptr;
size_t uiAlign = ezSystemInformation::Get().GetMemoryPageSize();
const int res = posix_memalign(&ptr, uiAlign, uiSize);
EZ_ASSERT_DEBUG(res == 0, "Failed to align pointer");
EZ_IGNORE_UNUSED(res);
EZ_CHECK_ALIGNMENT(ptr, uiAlign);
if ((ezMemoryTrackingFlags::Default & ezMemoryTrackingFlags::EnableAllocationTracking) != 0)
{
ezMemoryTracker::AddAllocation(GetPageAllocatorId(), ezMemoryTrackingFlags::Default, ptr, uiSize, uiAlign, ezTime::Now() - fAllocationTime);
}
return ptr;
}
// static
void ezPageAllocator::DeallocatePage(void* ptr)
{
if ((ezMemoryTrackingFlags::Default & ezMemoryTrackingFlags::EnableAllocationTracking) != 0)
{
ezMemoryTracker::RemoveAllocation(GetPageAllocatorId(), ptr);
}
free(ptr);
}
|
06b4d856b8833e90db4af600bb3abfdb50d24afc
|
ee0b6d428c2d514d29a3de4195cb7ca023d9d5e4
|
/firmware/application/lib/eeprom.h
|
53382e15c81d7a22d3fcd6eeb23c35c1aa6b4715
|
[
"BSD-2-Clause"
] |
permissive
|
tedsalmon/BlueBus
|
d0c4192f240fb4620918fef0ba07f6bab7cf1a98
|
1bc7e2ae937bdfa3140a62cd753126c614bbea01
|
refs/heads/master
| 2023-09-01T12:12:38.886935
| 2023-08-30T02:15:53
| 2023-08-30T02:15:53
| 137,298,365
| 144
| 30
|
NOASSERTION
| 2023-07-09T19:28:44
| 2018-06-14T02:54:58
|
C
|
UTF-8
|
C
| false
| false
| 1,016
|
h
|
eeprom.h
|
/*
* File: eeprom.h
* Author: Ted Salmon <tass2001@gmail.com>
* Description:
* EEPROM mechanisms
*/
#ifndef EEPROM_H
#define EEPROM_H
#include <xc.h>
#include "../mappings.h"
#include "log.h"
#include "sfr_setters.h"
#include "utils.h"
/* 16000000 / (2 * (0 + 1)) = 8,000,000 or 8Mhz */
#define EEPROM_BRG 0
// 25LC256 EEPROM instructions
#define EEPROM_COMMAND_WREN 0x06 // Write enable
#define EEPROM_COMMAND_WRDI 0x04 // Write disable
#define EEPROM_COMMAND_WRITE 0x02 // Initialize start of write sequence
#define EEPROM_COMMAND_READ 0x03 // Initialize start of read sequence
#define EEPROM_COMMAND_CE 0xC7 // Erase all sectors of memory
#define EEPROM_COMMAND_RDSR 0x05 // Read the status register
#define EEPROM_COMMAND_GET 0x00 // Dummy byte used to retrieve data
#define EEPROM_STATUS_BUSY 0x01 // EEPROM Busy status response
void EEPROMInit();
void EEPROMErase();
void EEPROMIsReady();
unsigned char EEPROMReadByte(uint32_t);
void EEPROMWriteByte(uint32_t, unsigned char);
#endif /* EEPROM_H */
|
14d616ad26517145b90210722e7be344fd7e8ef2
|
37d4423c0b464a84f90b716ceb8e8bfd0510a295
|
/include/c-chunk.h
|
aba712279871568368eb5e0019d093448657e398
|
[
"SMLNJ"
] |
permissive
|
UBMLtonGroup/RTMLton
|
01963d13032cdc35fac81381e98537bb16627e40
|
846b826008085c12724adc3e65ddcceff6d4f75f
|
refs/heads/conc-stacklets
| 2023-03-08T06:36:22.743693
| 2021-12-13T20:39:41
| 2021-12-13T20:39:41
| 44,258,707
| 114
| 4
|
NOASSERTION
| 2022-01-03T21:15:53
| 2015-10-14T15:48:38
|
Standard ML
|
UTF-8
|
C
| false
| false
| 28,847
|
h
|
c-chunk.h
|
/* Copyright (C) 1999-2008 Henry Cejtin, Matthew Fluet, Suresh
* Jagannathan, and Stephen Weeks.
* Copyright (C) 1997-2000 NEC Research Institute.
*
* MLton is released under a BSD-style license.
* See the file MLton-LICENSE for details.
*/
#ifndef _C_CHUNK_H_
#define _C_CHUNK_H_
#define STACKLET_DEBUG 0
#include <stdio.h>
#include <stdbool.h>
#include <stdatomic.h>
#include <assert.h>
#ifndef PTHREAD_NUM
# define PTHREAD_NUM pthread_num
#endif
#include "ml-types.h"
#include "c-types.h"
#include "c-common.h"
#ifndef TRUE
#define TRUE 1
#endif
#ifndef FALSE
#define FALSE 0
#endif
#ifndef DEBUG_CCODEGEN
#define DEBUG_CCODEGEN FALSE
#endif
void um_dumpStack (void *s);
void um_dumpFrame (void *s, void *f);
#define WORDWIDTH sizeof(void *)
#define STACKHEADER WORDWIDTH
#define NO_CACHE_STACK
#define NO_CACHE_FRONTIER
#define GCState ((Pointer)&gcState)
#define ExnStack *(Pointer*)(GCState + ExnStackOffset+(PTHREAD_NUM*WORDWIDTH) )
#define CurrentThread *(size_t*)(GCState + CurrentThreadOffset+(PTHREAD_NUM*WORDWIDTH) )
#define FrontierMem *(Pointer*)(GCState + FrontierOffset)
#define UMFrontierMem *(Pointer*)(GCState + UMFrontierOffset)
#define Frontier *(Pointer*)(GCState + FrontierOffset)
#define UMFrontier *(Pointer*)(GCState + UMFrontierOffset)
#define StackBottom (*(Pointer*)(GCState + StackBottomOffset+(PTHREAD_NUM*WORDWIDTH)))
#define StackTopMem (*(Pointer*)(GCState + StackTopOffset+(PTHREAD_NUM*WORDWIDTH)))
#define StackDepth (*(size_t*)(GCState + StackDepthOffset+(PTHREAD_NUM*WORDWIDTH)))
#define RTSync *(bool*)(GCState + RTSyncOffset + (PTHREAD_NUM *WORDWIDTH))
#define StackTop StackTopMem
#define CASLOCK CompareAndSet(GCState,1)
#define CASUNLOCK CompareAndSet(GCState,0)
/* ------------------------------------------------- */
/* Memory */
/* ------------------------------------------------- */
#define C(ty, x) (*(ty*)(x))
#define G(ty, i) (global##ty [i])
#define GPNR(i) G(ObjptrNonRoot, i)
#undef DEBUG_MEMORY
#define X(ty, gc_stat, b, i, s, o) X_NORMAL(ty, gc_stat, b, i, s, o)
#define O(ty, b, o) O_NORMAL(ty, b, o)
#define O_NORMAL(ty, b, o) (*(ty*)((b) + (o)))
#define O_DBG(ty, b, o) (*((fprintf(stderr,"%s:%d %d] O : Addr=%018p Val=%018p\n" \
,__FILE__,__LINE__,PTHREAD_NUM, (void*)((b)+(o)),*(ty*)((b) + (o)))), \
(ty*)((b) + (o)) ))
#define X_NORMAL(ty, gc_stat, b, i, s, o) (*(ty*)(UM_Array_offset((gc_stat), (b), (i), (s), (o))))
#define X_DBG(ty, gc_stat, b, i, s, o) (*((fprintf (stderr, "%s:%d X: Addr=%018p Val=%018p\n", __FILE__, __LINE__, \
(void*)((b) + ((i) * (s)) + (o)), \
*(ty*)(UM_Array_offset((gc_stat), (b), (i), (s), (o))) \
)), \
(ty*)(UM_Array_offset((gc_stat), (b), (i), (s), (o)))))
#define CHOFF(gc_stat, ty, b, o, s) (*(ty*)(UM_Chunk_Next_offset((gc_stat), (b), (o), (s))))
//#define WB(ty,d,s,db,sb) writeBarrier(GCState,(db),(sb)); d=s
#define WB(ty,db,sb,d,s,op) \
do { \
if(!RTSync) \
d=s; \
else \
{ CASLOCK; \
writeBarrier(GCState,(db),(sb)); \
d=s; \
CASUNLOCK; \
} \
} while(0) \
#define CurrentFrame (*(Pointer*)(GCState + CurrentFrameOffset+(PTHREAD_NUM*WORDWIDTH)))
#define NextFrame ((Pointer)((struct GC_UM_Chunk*)(CurrentFrame - STACKHEADER))->next_chunk+STACKHEADER)
#define MLTON_S_NO(ty, i) *(ty*)(StackTop + (i))
#define MLTON_S(ty, i) (*((fprintf (stderr, "%s:%d %d] S: StackTop=%018p Addr=%018p i=%d Val=%018p\n", __FILE__, __LINE__, PTHREAD_NUM, \
(void*) StackTop, \
(void*)(StackTop + (i)), i, \
*(ty*)(StackTop + (i)))) , \
(ty*)(StackTop + (i))))
#define NS(ty, i) NS_NORMAL(ty, i)
#define NS_NORMAL(ty, i) *(ty*)(NextFrame + (i))
#define NS_DBG(ty, i)(*((fprintf (stderr, "%s:%d %d] NS: CurrentFrame=%018p NextFrame=%018p \n", \
__FILE__, __LINE__, PTHREAD_NUM, \
(void*)CurrentFrame, (void*)NextFrame, i)),\
(ty*)(NextFrame + (i))))
#define STACKLET_S(ty, i) *(ty*)(CurrentFrame + (i))
#define STACKLET_DBG_S(ty, i) (*((fprintf (stderr, "%s:%d %d] S: CurrentFrame=%018p Frame+Offset(%d)=%018p CurrentVal=%018p\n", \
__FILE__, __LINE__, PTHREAD_NUM, \
(void*)CurrentFrame, i, \
(void*)(CurrentFrame + (i)), \
*(ty*)(CurrentFrame + (i)))), \
(ty*)(CurrentFrame + (i))))
#define IFED(X) do { int x = X; if (x) { perror("(in codegen code) perror " #X); printf(" rv=%d\n", x); exit(-1); } } while(0)
#define Lock_fl(s) IFED(pthread_mutex_lock(&s))
#define Unlock_fl(s) IFED(pthread_mutex_unlock(&s))
#define ChunkExnHandler ((struct GC_UM_Chunk*)(CurrentFrame - STACKHEADER))->handler
#define ChunkExnLink ((struct GC_UM_Chunk*)(CurrentFrame - STACKHEADER))->link
#if STACKLET_DEBUG > 1
# define S(ty, i) STACKLET_DBG_S(ty, i)
#else
# define S(ty, i) STACKLET_S(ty, i)
#endif
/* ------------------------------------------------- */
/* Tests */
/* ------------------------------------------------- */
#define IsInt(p) (0x3 & (int)(p))
#define BZ(x, l) \
do { \
if (DEBUG_CCODEGEN) \
fprintf (stderr, "%s:%d: BZ(%d, %s)\n", \
__FILE__, __LINE__, (x), #l); \
if (0 == (x)) goto l; \
} while (0)
#define BNZ(x, l) \
do { \
if (DEBUG_CCODEGEN) \
fprintf (stderr, "%s:%d: BNZ(%d, %s)\n", \
__FILE__, __LINE__, (x), #l); \
if (x) goto l; \
} while (0)
#ifndef NO_CACHE_FRONTIER
#define FlushFrontier() \
do { \
/* FrontierMem = Frontier; */ \
/* UMFrontierMem = UMFrontier; */ \
} while (0)
#else
#define FlushFrontier()
#endif
#ifndef NO_CACHE_STACK
#define FlushStackTop() \
do { \
/* StackTopMem = StackTop; */ \
} while (0)
#else
#define FlushStackTop()
#endif
#ifndef NO_CACHE_FRONTIER
#define CacheFrontier() \
do { \
/* Frontier = FrontierMem; */ \
/* UMFrontier = UMFrontierMem; */ \
} while (0)
#else
#define CacheFrontier()
#endif
#ifndef NO_CACHE_STACK
#define CacheStackTop() \
do { \
/*StackTop = StackTopMem;*/ \
} while (0)
#else
#define CacheStackTop()
#endif
/* ------------------------------------------------- */
/* Chunk */
/* ------------------------------------------------- */
#if (defined (__sun__) && defined (REGISTER_FRONTIER_STACKTOP))
#define Chunk(n) \
DeclareChunk(n) { \
struct cont cont; \
/* register unsigned int frontier asm("g5"); */ \
/*uintptr_t l_nextFun = nextFun; */ \
uint32_t pthread_num = get_pthread_num(); \
register unsigned int stackTop asm("g6");
#else
#define Chunk(n) \
DeclareChunk(n) { \
struct cont cont; \
/* Pointer frontier; */ \
/* Pointer umfrontier; */ \
/*uintptr_t l_nextFun = nextFun; */ \
uint32_t pthread_num = get_pthread_num(); \
Pointer stackTop;
#endif
#define ChunkSwitch(n) \
if (DEBUG_CCODEGEN) \
fprintf (stderr, "%s:%d: entering chunk %d l_nextFun = %d\n", \
__FILE__, __LINE__, n, (int)l_nextFun); \
CacheFrontier(); \
CacheStackTop(); \
while (1) { \
top: \
switch (l_nextFun) {
#define EndChunk \
default: \
/* interchunk return */ \
cont.nextFun = l_nextFun; \
cont.nextChunk = (void*)nextChunks[l_nextFun]; \
leaveChunk: \
FlushFrontier(); \
FlushStackTop(); \
return cont; \
} /* end switch (l_nextFun) */ \
} /* end while (1) */ \
} /* end chunk */
/* ------------------------------------------------- */
/* Calling SML from C */
/* ------------------------------------------------- */
#define Thread_returnToC() \
do { \
if (DEBUG_CCODEGEN) \
fprintf (stderr, "%s:%d: Thread_returnToC()\n", \
__FILE__, __LINE__); \
returnToC[get_pthread_num()] = TRUE; \
return cont; \
} while (0)
/* ------------------------------------------------- */
/* farJump */
/* ------------------------------------------------- */
#define FarJump(n, l) \
do { \
PrepFarJump(cont, n, l); \
goto leaveChunk; \
} while (0)
/* ------------------------------------------------- */
/* Stack */
/* ------------------------------------------------- */
/* this comes from umheap.h which isnt available outside of the runtime
* .. need to find a better way to handle this. if you change GC_UM_Chunk
* you must keep umheap.h and this definition in sync.
*/
#define UM_CHUNK_PAYLOAD_SIZE 302
#define UM_CHUNK_PAYLOAD_SAFE_REGION 16
typedef uintptr_t GC_returnAddress;
typedef uintptr_t pointer;
typedef struct GC_UM_Chunk {
unsigned char ml_object[UM_CHUNK_PAYLOAD_SIZE + UM_CHUNK_PAYLOAD_SAFE_REGION];
Word32_t chunk_header;
size_t sentinel;
GC_returnAddress ra;
GC_returnAddress handler;
GC_returnAddress link;
struct GC_UM_Chunk* next_chunk;
struct GC_UM_Chunk* prev_chunk;
};
void dump_hex(char *str, int len);
/* end of umheap.h copy/paste */
/*
when stacklet_push(N) is called, we likely have already written
into the next frame (eg arguments and/or returnvalue object pointers)
but in the chunked model those have been written into the current
chunk. we need to move those to the next chunk so that they are in
the correct stack frame. we will XXX FIX inefficiently memcpy as follows:
memcpy(curchunk+N, nextchunk+wordwidth, UM_CHUNK_PAYLOAD_SIZE-N-STACKHEADER)
*/
#define RED(x) "\033[1;31m"x"\033[0m"
#define YELLOW(x) "\033[1;33m"x"\033[0m"
#define GREEN(x) "\033[1;32m"x"\033[0m"
#define FW "08"
#define UM_CHUNK_SENTINEL 0x9999
#define UM_ARRAY_SENTINEL 0x9998
#define UM_STACK_SENTINEL 0x9997
#define STACKLET_Push(bytes) \
do { \
struct GC_UM_Chunk *cf = (struct GC_UM_Chunk *)(CurrentFrame - STACKHEADER); \
assert (cf->sentinel == UM_STACK_SENTINEL); \
if (bytes < 0) { \
struct GC_UM_Chunk *xx = cf; \
StackDepth = StackDepth - 1; \
if (STACKLET_DEBUG) { \
int fnum = *(GC_returnAddress*)(cf->prev_chunk->ml_object + cf->prev_chunk->ra ); \
fprintf(stderr, "%s:%d: %d] "GREEN("SKLT_Push")" (%4d) (thr:%x) " \
YELLOW("ra:%d")" depth:%d\tbase %"FW"lx cur %"FW"lx prev %"FW"lx ", \
__FILE__, __LINE__, PTHREAD_NUM, bytes, CurrentThread, \
fnum, StackDepth, xx, \
cf, cf->prev_chunk); \
} \
if (cf->prev_chunk) { \
CurrentFrame = (pointer)(cf->prev_chunk) + STACKHEADER; \
} else { \
if (STACKLET_DEBUG) fprintf(stderr, RED("!!!cant retreat to prev frame")); \
} if (STACKLET_DEBUG) fprintf(stderr, "\n"); \
} else if (bytes > 0) { \
struct GC_UM_Chunk *xx = cf; \
cf->ra = bytes; \
/* if only 2 free chunks available on the stack, we must force grow it */ \
if (cf->next_chunk->next_chunk == NULL) maybe_growstack(GCState, CurrentThread, TRUE); \
int fnum = *(GC_returnAddress*)((void *)&(cf->ml_object) + cf->ra ); \
StackDepth = StackDepth + 1; \
if (STACKLET_DEBUG) { \
fprintf(stderr, "%s:%d: %d] "GREEN("SKLT_Push")" (%4d) (thr:%x) "\
YELLOW("ra:%d")" depth:%d\tbase %"FW"lx cur %"FW"lx next %"FW"lx\n", \
__FILE__, __LINE__, PTHREAD_NUM, bytes, CurrentThread, fnum, StackDepth, xx, \
cf, cf->next_chunk); \
} \
if (cf->next_chunk) { \
if (UM_CHUNK_PAYLOAD_SIZE-bytes-STACKHEADER < STACKHEADER) \
die("impossible no room in next chunk"); \
CurrentFrame = (pointer)cf->next_chunk + STACKHEADER; \
} else { \
die("out of stack"); \
} if (STACKLET_DEBUG) fprintf(stderr, "\n"); \
} else { if (STACKLET_DEBUG) fprintf(stderr, RED("???SKLT_Push(0)\n")); } \
} while (0)
#define STACKLET_Return() \
do { \
struct GC_UM_Chunk *cf = (struct GC_UM_Chunk *)(CurrentFrame - STACKHEADER); \
assert (cf->sentinel == UM_STACK_SENTINEL || 1!=1); \
if (cf->prev_chunk == 0) fprintf(stderr, RED("Cant RETURN from first stack frame\n")); \
else if (cf->prev_chunk->ra == 0) fprintf(stderr, RED("RA zero??\n")); \
else { \
l_nextFun = *(GC_returnAddress*)(cf->prev_chunk->ml_object + cf->prev_chunk->ra); \
if (STACKLET_DEBUG || DEBUG_CCODEGEN) \
fprintf (stderr, GREEN("%s:%d: "GREEN("SKLT_Return()") \
" %d/%x l_nextFun = %d currentFrame %"FW"lx prev %"FW"lx ra %d\n"), \
__FILE__, __LINE__, PTHREAD_NUM, CurrentThread, (int)l_nextFun, \
cf, cf->prev_chunk, cf->prev_chunk->ra); \
goto top; \
} \
} while (0)
#define STACKLET_Raise() \
do { \
struct GC_UM_Chunk *cf = (ExnStack - STACKHEADER); \
assert (cf->sentinel == UM_STACK_SENTINEL || 2!=2); \
if (STACKLET_DEBUG) fprintf (stderr, RED("%s:%d: SKLT_Raise exn %x cur %x prev %x\n"), \
__FILE__, __LINE__, ExnStack, cf, cf->prev_chunk); \
if (cf->prev_chunk == 0) fprintf(stderr, RED("Cant RAISE if null prev_chunk\n")); \
else if (cf->handler == 0) fprintf(stderr, RED("Raise handler zero??\n")); \
else { \
l_nextFun = cf->handler; \
/* see discussion in backend.fun's SetExnStackLocal for explanation of next line */ \
CurrentFrame = STACKHEADER+(Pointer)(((struct GC_UM_Chunk *)(ExnStack-STACKHEADER))->next_chunk); \
if (STACKLET_DEBUG || DEBUG_CCODEGEN) \
fprintf (stderr, GREEN("%s:%d: "GREEN("SKLT_RaiseReturn()")\
" l_nextFun = %d currentFrame %"FW"lx prev %"FW"lx\n"), \
__FILE__, __LINE__, (int)l_nextFun, \
cf, cf->prev_chunk); \
goto top; \
} \
} while (0)
/* leaving this in for ref for now */
#if 0
#define MLTON_Push(bytes) \
do { \
if (1 || DEBUG_CCODEGEN) { \
int used = StackTop - StackBottom; \
fprintf (stderr, "%s:%d: MLTON_Push (%d) %d %"FW"lx %"FW"lx %"FW"lx\n", \
__FILE__, __LINE__, bytes, used, StackBottom, \
StackTop, StackTop+bytes ); \
} if(bytes > 0 && STACKLET_DEBUG > 1) {dump_hex(StackTop, bytes); fprintf(stderr, "\n");}StackTop += (bytes); \
} while (0);
#define MLTON_Return() \
do { \
l_nextFun = *(uintptr_t*)(StackTop - sizeof(void*)); \
if (1 || DEBUG_CCODEGEN) \
fprintf (stderr, "%s:%d: "GREEN("MLTON_Return()")" l_nextFun = %d\n", \
__FILE__, __LINE__, (int)l_nextFun); \
goto top; \
} while (0)
#define MLTON_Raise() \
do { \
if (1 || DEBUG_CCODEGEN) \
fprintf (stderr, "%s:%d: "RED("MLTON_Raise")"\n", \
__FILE__, __LINE__); \
StackTop = StackBottom + ExnStack; \
Return(); \
} while (0)
#endif
#define Push STACKLET_Push
#define Return STACKLET_Return
#define Raise STACKLET_Raise
/* ------------------------------------------------- */
/* Primitives */
/* ------------------------------------------------- */
#ifndef MLTON_CODEGEN_STATIC_INLINE
#define MLTON_CODEGEN_STATIC_INLINE static inline
#endif
/* Declare inlined math functions, since <math.h> isn't included.
*/
#ifndef MLTON_CODEGEN_MATHFN
#define MLTON_CODEGEN_MATHFN(decl) decl
#endif
/* WordS<N>_quot and WordS<N>_rem can't be inlined with the C-codegen,
* because the gcc optimizer sometimes produces incorrect results when
* one of the arguments is a constant.
*/
#ifndef MLTON_CODEGEN_WORDSQUOTREM
#define MLTON_CODEGEN_WORDSQUOTREM(func) PRIVATE
#endif
#ifndef MLTON_CODEGEN_WORDSQUOTREM_IMPL
#define MLTON_CODEGEN_WORDSQUOTREM_IMPL(func)
#endif
/* Declare memcpy, since <string.h> isn't included.
*/
#ifndef MLTON_CODEGEN_MEMCPY
#define MLTON_CODEGEN_MEMCPY(decl)
#endif
MLTON_CODEGEN_MEMCPY(void * memcpy(void *, const void*, size_t);)
#include "basis-ffi.h"
#include "basis/coerce.h"
#include "basis/cpointer.h"
#include "basis/Real/Real-ops.h"
#include "basis/Real/Math-fns.h"
#include "basis/Word/Word-ops.h"
#include "basis/Word/Word-consts.h"
#include "basis/Word/Word-check.h"
/* ------------------------------------------------- */
/* Word */
/* ------------------------------------------------- */
#define WordS_addCheckCX(size, dst, cW, xW, l) \
do { \
WordS##size c = cW; \
WordS##size x = xW; \
WordS_addCheckBodyCX(size, c, x, goto l, dst = c + x); \
} while (0)
#define WordS8_addCheckCX(dst, c, x, l) WordS_addCheckCX(8, dst, c, x, l)
#define WordS16_addCheckCX(dst, c, x, l) WordS_addCheckCX(16, dst, c, x, l)
#define WordS32_addCheckCX(dst, c, x, l) WordS_addCheckCX(32, dst, c, x, l)
#define WordS64_addCheckCX(dst, c, x, l) WordS_addCheckCX(64, dst, c, x, l)
#define WordS8_addCheckXC(dst, x, c, l) WordS8_addCheckCX(dst, c, x, l)
#define WordS16_addCheckXC(dst, x, c, l) WordS16_addCheckCX(dst, c, x, l)
#define WordS32_addCheckXC(dst, x, c, l) WordS32_addCheckCX(dst, c, x, l)
#define WordS64_addCheckXC(dst, x, c, l) WordS64_addCheckCX(dst, c, x, l)
#define WordS8_addCheck WordS8_addCheckXC
#define WordS16_addCheck WordS16_addCheckXC
#define WordS32_addCheck WordS32_addCheckXC
#define WordS64_addCheck WordS64_addCheckXC
#define WordU_addCheckCX(size, dst, cW, xW, l) \
do { \
WordU##size c = cW; \
WordU##size x = xW; \
WordU_addCheckBodyCX(size, c, x, goto l, dst = c + x); \
} while (0)
#define WordU8_addCheckCX(dst, c, x, l) WordU_addCheckCX(8, dst, c, x, l)
#define WordU16_addCheckCX(dst, c, x, l) WordU_addCheckCX(16, dst, c, x, l)
#define WordU32_addCheckCX(dst, c, x, l) WordU_addCheckCX(32, dst, c, x, l)
#define WordU64_addCheckCX(dst, c, x, l) WordU_addCheckCX(64, dst, c, x, l)
#define WordU8_addCheckXC(dst, x, c, l) WordU8_addCheckCX(dst, c, x, l)
#define WordU16_addCheckXC(dst, x, c, l) WordU16_addCheckCX(dst, c, x, l)
#define WordU32_addCheckXC(dst, x, c, l) WordU32_addCheckCX(dst, c, x, l)
#define WordU64_addCheckXC(dst, x, c, l) WordU64_addCheckCX(dst, c, x, l)
#define WordU8_addCheck WordU8_addCheckXC
#define WordU16_addCheck WordU16_addCheckXC
#define WordU32_addCheck WordU32_addCheckXC
#define WordU64_addCheck WordU64_addCheckXC
#define WordS_negCheck(size, dst, xW, l) \
do { \
WordS##size x = xW; \
WordS_negCheckBody(size, x, goto l, dst = -x); \
} while (0)
#define Word8_negCheck(dst, x, l) WordS_negCheck(8, dst, x, l)
#define Word16_negCheck(dst, x, l) WordS_negCheck(16, dst, x, l)
#define Word32_negCheck(dst, x, l) WordS_negCheck(32, dst, x, l)
#define Word64_negCheck(dst, x, l) WordS_negCheck(64, dst, x, l)
#define WordS_subCheckCX(size, dst, cW, xW, l) \
do { \
WordS##size c = cW; \
WordS##size x = xW; \
WordS_subCheckBodyCX(size, c, x, goto l, dst = c - x); \
} while (0)
#define WordS8_subCheckCX(dst, c, x, l) WordS_subCheckCX(8, dst, c, x, l)
#define WordS16_subCheckCX(dst, c, x, l) WordS_subCheckCX(16, dst, c, x, l)
#define WordS32_subCheckCX(dst, c, x, l) WordS_subCheckCX(32, dst, c, x, l)
#define WordS64_subCheckCX(dst, c, x, l) WordS_subCheckCX(64, dst, c, x, l)
#define WordS_subCheckXC(size, dst, xW, cW, l) \
do { \
WordS##size x = xW; \
WordS##size c = cW; \
WordS_subCheckBodyXC(size, x, c, goto l, dst = x - c); \
} while (0)
#define WordS8_subCheckXC(dst, x, c, l) WordS_subCheckXC(8, dst, x, c, l)
#define WordS16_subCheckXC(dst, x, c, l) WordS_subCheckXC(16, dst, x, c, l)
#define WordS32_subCheckXC(dst, x, c, l) WordS_subCheckXC(32, dst, x, c, l)
#define WordS64_subCheckXC(dst, x, c, l) WordS_subCheckXC(64, dst, x, c, l)
#define WordS8_subCheck WordS8_subCheckXC
#define WordS16_subCheck WordS16_subCheckXC
#define WordS32_subCheck WordS32_subCheckXC
#define WordS64_subCheck WordS64_subCheckXC
#define WordS_mulCheck(size, dst, xW, yW, l) \
do { \
WordS##size x = xW; \
WordS##size y = yW; \
WordS_mulCheckBody(size, x, y, goto l, dst = x * y); \
} while (0)
#define WordS8_mulCheck(dst, x, y, l) WordS_mulCheck(8, dst, x, y, l)
#define WordS16_mulCheck(dst, x, y, l) WordS_mulCheck(16, dst, x, y, l)
#define WordS32_mulCheck(dst, x, y, l) WordS_mulCheck(32, dst, x, y, l)
#define WordS64_mulCheck(dst, x, y, l) WordS_mulCheck(64, dst, x, y, l)
#define WordU_mulCheck(size, dst, xW, yW, l) \
do { \
WordU##size x = xW; \
WordU##size y = yW; \
WordU_mulCheckBody(size, x, y, goto l, dst = x * y); \
} while (0)
#define WordU8_mulCheck(dst, x, y, l) WordU_mulCheck(8, dst, x, y, l)
#define WordU16_mulCheck(dst, x, y, l) WordU_mulCheck(16, dst, x, y, l)
#define WordU32_mulCheck(dst, x, y, l) WordU_mulCheck(32, dst, x, y, l)
#define WordU64_mulCheck(dst, x, y, l) WordU_mulCheck(64, dst, x, y, l)
#endif /* #ifndef _C_CHUNK_H_ */
|
e1b4254965421523e513d63211afc8c13cba5b56
|
7fcb614a59a138019b2845a6e493f9d22c44852d
|
/MCUME_teensy/teensygnuboy/loader.c
|
70f8ea84a9c3df336f1905944a66b66a7558b2ad
|
[] |
no_license
|
Jean-MarcHarvengt/MCUME
|
9180feaf8195c6a0a38eba6c12733c987fa98062
|
fe1280985d9a86bfb2166842a56c8eec768aa666
|
refs/heads/master
| 2023-06-09T23:11:04.216374
| 2023-05-28T15:24:02
| 2023-05-28T15:24:02
| 203,546,040
| 318
| 43
| null | 2023-03-21T13:19:51
| 2019-08-21T08:58:23
|
C
|
UTF-8
|
C
| false
| false
| 3,178
|
c
|
loader.c
|
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include "defs.h"
#include "regs.h"
#include "mem.h"
#include "hw.h"
#include "rtc.h"
#include "memory.h"
#include "arduinoproto.h"
PROGMEM static int mbc_table[256] =
{
0, 1, 1, 1, 0, 2, 2, 0, 0, 0, 0, 0, 0, 0, 0, 3,
3, 3, 3, 3, 0, 0, 0, 0, 0, 5, 5, 5, MBC_RUMBLE, MBC_RUMBLE, MBC_RUMBLE, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, MBC_HUC3, MBC_HUC1
};
PROGMEM static int rtc_table[256] =
{
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0
};
PROGMEM static int batt_table[256] =
{
0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 1, 0, 0,
1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0,
0
};
PROGMEM static int romsize_table[256] =
{
2, 4, 8, 16, 32, 64, 128, 256, 512,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 128, 128, 128
/* 0, 0, 72, 80, 96 -- actual values but bad to use these! */
};
PROGMEM static int ramsize_table[256] =
{
1, 1, 1, 4, 16,
4 /* FIXME - what value should this be?! */
};
static int forcebatt, nobatt;
static int forcedmg=0, gbamode;
static int memfill = 0, memrand = -1; //-1,-1
static void initmem(void *mem, int size)
{
char *p = mem;
if (memrand >= 0)
{
srand(memrand ? memrand : time(0));
while(size--) *(p++) = rand();
}
else if (memfill >= 0)
memset(p, memfill, size);
}
static byte getHeaderByte(int pos) {
return read_rom(pos);
}
extern int loadfile(char * name);
void loader_init(char * romfile)
{
byte c;
int rlen;
int len = loadfile(romfile);
c = getHeaderByte(0x0147);
mbc.type = mbc_table[c];
mbc.batt = (batt_table[c] && !nobatt) || forcebatt;
rtc.batt = rtc_table[c];
mbc.romsize = romsize_table[getHeaderByte(0x0148)];
mbc.ramsize = ramsize_table[getHeaderByte(0x0149)];
if (!mbc.romsize) die("unknown ROM size %02X\n", getHeaderByte(0x0148));
if (!mbc.ramsize) die("unknown SRAM size %02X\n", getHeaderByte(0x0149));
rlen = 16384 * mbc.romsize;
ram.sbank = malloc(8192 * mbc.ramsize);
initmem(ram.sbank, 8192 * mbc.ramsize);
initmem(ram.ibank, 4096 * 8);
mbc.rombank = 1;
mbc.rambank = 0;
c = getHeaderByte(0x0143);
hw.cgb = ((c == 0x80) || (c == 0xc0)) && !forcedmg;
hw.gba = (hw.cgb && gbamode);
}
|
ba43b97d735809b3923f278adcc2c8f6642cba98
|
aa3befea459382dc5c01c925653d54f435b3fb0f
|
/include/fnmatch.h
|
bac89d6623e5e4ef49dbc953d68196dd63071e30
|
[
"MIT-open-group",
"BSD-3-Clause",
"HPND-sell-variant",
"BSD-4-Clause-UC",
"LicenseRef-scancode-warranty-disclaimer",
"MIT-0",
"LicenseRef-scancode-bsd-atmel",
"LicenseRef-scancode-gary-s-brown",
"LicenseRef-scancode-proprietary-license",
"SunPro",
"MIT",
"LicenseRef-scancode-public-domain-disclaimer",
"LicenseRef-scancode-other-permissive",
"HPND",
"ISC",
"Apache-2.0",
"LicenseRef-scancode-public-domain",
"BSD-2-Clause",
"GPL-1.0-or-later",
"CC-BY-2.0",
"CC-BY-4.0"
] |
permissive
|
apache/nuttx
|
14519a7bff4a87935d94fb8fb2b19edb501c7cec
|
606b6d9310fb25c7d92c6f95bf61737e3c79fa0f
|
refs/heads/master
| 2023-08-25T06:55:45.822534
| 2023-08-23T16:03:31
| 2023-08-24T21:25:47
| 228,103,273
| 407
| 241
|
Apache-2.0
| 2023-09-14T18:26:05
| 2019-12-14T23:27:55
|
C
|
UTF-8
|
C
| false
| false
| 4,488
|
h
|
fnmatch.h
|
/****************************************************************************
* include/fnmatch.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __INCLUDE_FNMATCH_H
#define __INCLUDE_FNMATCH_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/compiler.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define FNM_PATHNAME 0x01
#define FNM_PERIOD 0x02
#define FNM_NOESCAPE 0x04
#define FNM_NOMATCH 1
#define FNM_NOSYS -1
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Name: fnmatch
*
* Description:
* The fnmatch() function shall match patterns as described in the Shell
* and Utilities volume of IEEE Std 1003.1-2001, Section 2.13.1, Patterns
* Matching a Single Character, and Section 2.13.2, Patterns Matching
* Multiple Characters. It checks the string specified by the string
* argument to see if it matches the pattern specified by the pattern
* argument.
*
* The flags argument shall modify the interpretation of pattern and
* string. It is the bitwise-inclusive OR of zero or more of the flags
* defined in <fnmatch.h>. If the FNM_PATHNAME flag is set in flags,
* then a slash character ( '/' ) in string shall be explicitly matched
* by a slash in pattern; it shall not be matched by either the asterisk
* or question-mark special characters, nor by a bracket expression. If
* the FNM_PATHNAME flag is not set, the slash character shall be treated
* as an ordinary character.
*
* If FNM_NOESCAPE is not set in flags, a backslash character ( '\' ) in
* pattern followed by any other character shall match that second
* character in string. In particular, "\\" shall match a backslash in
* string. If FNM_NOESCAPE is set, a backslash character shall be treated
* as an ordinary character.
*
* If FNM_PERIOD is set in flags, then a leading period ( '.' ) in string
* shall match a period in pattern; as described by rule 2 in the Shell and
* Utilities volume of IEEE Std 1003.1-2001, Section 2.13.3, Patterns Used
* for Filename Expansion where the location of "leading" is indicated by
* the value of FNM_PATHNAME:
*
* If FNM_PATHNAME is set, a period is "leading" if it is the first
* character in string or if it immediately follows a slash.
*
* If FNM_PATHNAME is not set, a period is "leading" only if it is the
* first character of string.
*
* If FNM_PERIOD is not set, then no special restrictions are placed on
* matching a period.
*
* Returned Value:
* If string matches the pattern specified by pattern, then fnmatch()
* shall return 0. If there is no match, fnmatch() shall return
* FNM_NOMATCH, which is defined in <fnmatch.h>. If an error occurs,
* fnmatch() shall return another non-zero value.
*
****************************************************************************/
int fnmatch(FAR const char *pattern, const char *string, int flags);
#undef EXTERN
#ifdef __cplusplus
}
#endif
#endif /* __INCLUDE_FNMATCH_H */
|
35b5126f26463440a8917da7891b676371e23f21
|
ea17827a415cb2eb8cc911fb8b13ce4ee8f0d6fe
|
/src/test/resources/cpp-code-examples/relation_to_impl/B.c
|
f7f0430c3be06363d1af57a0391e687d51bef3cb
|
[
"MIT"
] |
permissive
|
multilang-depends/depends
|
835eaedfdac2dea25d3318605ce3ebb8017a2e09
|
933150b0263ad30b633314eba66a29037ef6e884
|
refs/heads/master
| 2023-05-12T23:57:20.221231
| 2023-05-10T05:05:35
| 2023-05-10T05:05:35
| 169,956,182
| 191
| 48
|
MIT
| 2023-04-12T23:30:50
| 2019-02-10T08:08:28
|
Java
|
UTF-8
|
C
| false
| false
| 89
|
c
|
B.c
|
#include "A.h"
void bar(){
foo();
}
void baz(){
x++;
}
void qux(){
int x=0;
x++;
}
|
f206e238092efeb45901872474e86569b74b95d7
|
67801a1568b81ea5e45ed534301cd35949066e6d
|
/src/registers/comparators/cmp2.c
|
d5c1b1337bb6d80b094dc474b16ed5db96fb30e4
|
[
"Apache-2.0",
"LicenseRef-scancode-unknown-license-reference"
] |
permissive
|
fossasia/pslab-firmware
|
dcb8e570d162c0ef24cdedf43483c706bc736259
|
c93ac629442315c1430120b7ab3c0026d03e3503
|
refs/heads/main
| 2023-07-22T18:22:30.827478
| 2023-07-05T05:32:15
| 2023-07-05T05:38:34
| 86,472,725
| 2,212
| 89
|
Apache-2.0
| 2023-09-14T20:36:23
| 2017-03-28T14:53:27
|
C
|
UTF-8
|
C
| false
| false
| 1,511
|
c
|
cmp2.c
|
#include "cmp2.h"
void CMP2_Initialize(void) {
// PSIDL disabled;
CMSTAT = 0x00;
// CON enabled; CPOL Not Inverted; OPMODE Comparator; EVPOL Disabled; COE disabled; CCH C2IN1-; CREF C2IN1+; CEVT disabled;
CM2CON = 0x8000 & ~(0x8000); //disabling Comparator CON bit
// SELSRCC PWM1L; SELSRCB PWM1L; SELSRCA PWM1L;
CM2MSKSRC = 0x00;
// AANEN disabled; ABNEN disabled; ACNEN disabled; HLMS disabled; OANEN disabled; ABEN disabled; ACEN disabled; AAEN disabled; PAGS disabled; OBEN disabled; OCEN disabled; NAGS disabled; OCNEN disabled; OBNEN disabled; OAEN disabled;
CM2MSKCON = 0x00;
// CFSEL FOSC/2; CFLTREN disabled; CFDIV 1:1;
CM2FLTR = 0x00;
CM2CONbits.CON = 1; //enabling Comparator CON bit
}
bool CMP2_OutputStatusGet(void) {
return (CM2CONbits.COUT);
}
bool CMP2_EventStatusGet(void) {
return (CM2CONbits.CEVT);
}
void CMP2_EventStatusReset(void) {
CM2CONbits.CEVT = 0;
}
bool CMP2_HLMSStatusGet(void) {
return (CM2MSKCONbits.HLMS);
}
void CMP2_ComparatorDisable(void) {
CM2CONbits.CON = 0;
}
void CMP2_ComparatorEnable(void) {
CM2CONbits.CON = 1;
}
void __attribute__((weak)) CMP2_CallBack(void) {
// Add your custom callback code here
}
void CMP2_Tasks(void) {
if (IFS1bits.CMIF) {
// CMP2 callback function
CMP2_CallBack();
// Clear the CEVT bit to enable further interrupts
CMP2_EventStatusReset();
// clear the CMP2 interrupt flag
IFS1bits.CMIF = 0;
}
}
|
d69e7ba3c864b545363fd56b8fe8b03b2543df2f
|
3059b388ef9bf2b7d81265f2a418bf3e360fb235
|
/Gep/Include/dc/profctr.h
|
d2376f6434448a3cc5cd793102afa022f771c54a
|
[
"MIT"
] |
permissive
|
iaddis/SNESticle
|
4486e560e3c8ee0d1d8993955f1394e0edc4b38f
|
9590ebf3bf768424ebd6cb018f322e724a7aade3
|
refs/heads/main
| 2023-09-03T13:19:59.494801
| 2022-01-13T07:59:38
| 2022-01-13T07:59:38
| 447,509,804
| 341
| 51
| null | null | null | null |
UTF-8
|
C
| false
| false
| 325
|
h
|
profctr.h
|
#ifndef _PROFCTR_H
#define _PROFCTR_H
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
#include <kos.h>
void ProfCtrInit();
void ProfCtrShutdown();
#define ProfCtrGetCycle() (-timer_count(TMU2))
#define PROFCTR_CYCLEMULTIPLY 16
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif
|
fb0f1048a76ecb9b8412fa8cb775754904b04c19
|
5eff7a36d9a9917dce9111f0c3074375fe6f7656
|
/lib/mesa/src/intel/vulkan/genX_pipeline.c
|
3dcc8b64e5f50c3d0f0ba41e574a9dab86a98812
|
[] |
no_license
|
openbsd/xenocara
|
cb392d02ebba06f6ff7d826fd8a89aa3b8401779
|
a012b5de33ea0b977095d77316a521195b26cc6b
|
refs/heads/master
| 2023-08-25T12:16:58.862008
| 2023-08-12T16:16:25
| 2023-08-12T16:16:25
| 66,967,384
| 177
| 66
| null | 2023-07-22T18:12:37
| 2016-08-30T18:36:01
|
C
|
UTF-8
|
C
| false
| false
| 78,404
|
c
|
genX_pipeline.c
|
/*
* Copyright © 2015 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
* IN THE SOFTWARE.
*/
#include "anv_private.h"
#include "genxml/gen_macros.h"
#include "genxml/genX_pack.h"
#include "genxml/gen_rt_pack.h"
#include "common/intel_l3_config.h"
#include "common/intel_sample_positions.h"
#include "nir/nir_xfb_info.h"
#include "vk_util.h"
#include "vk_format.h"
#include "vk_log.h"
#include "vk_render_pass.h"
static uint32_t
vertex_element_comp_control(enum isl_format format, unsigned comp)
{
uint8_t bits;
switch (comp) {
case 0: bits = isl_format_layouts[format].channels.r.bits; break;
case 1: bits = isl_format_layouts[format].channels.g.bits; break;
case 2: bits = isl_format_layouts[format].channels.b.bits; break;
case 3: bits = isl_format_layouts[format].channels.a.bits; break;
default: unreachable("Invalid component");
}
/*
* Take in account hardware restrictions when dealing with 64-bit floats.
*
* From Broadwell spec, command reference structures, page 586:
* "When SourceElementFormat is set to one of the *64*_PASSTHRU formats,
* 64-bit components are stored * in the URB without any conversion. In
* this case, vertex elements must be written as 128 or 256 bits, with
* VFCOMP_STORE_0 being used to pad the output as required. E.g., if
* R64_PASSTHRU is used to copy a 64-bit Red component into the URB,
* Component 1 must be specified as VFCOMP_STORE_0 (with Components 2,3
* set to VFCOMP_NOSTORE) in order to output a 128-bit vertex element, or
* Components 1-3 must be specified as VFCOMP_STORE_0 in order to output
* a 256-bit vertex element. Likewise, use of R64G64B64_PASSTHRU requires
* Component 3 to be specified as VFCOMP_STORE_0 in order to output a
* 256-bit vertex element."
*/
if (bits) {
return VFCOMP_STORE_SRC;
} else if (comp >= 2 &&
!isl_format_layouts[format].channels.b.bits &&
isl_format_layouts[format].channels.r.type == ISL_RAW) {
/* When emitting 64-bit attributes, we need to write either 128 or 256
* bit chunks, using VFCOMP_NOSTORE when not writing the chunk, and
* VFCOMP_STORE_0 to pad the written chunk */
return VFCOMP_NOSTORE;
} else if (comp < 3 ||
isl_format_layouts[format].channels.r.type == ISL_RAW) {
/* Note we need to pad with value 0, not 1, due hardware restrictions
* (see comment above) */
return VFCOMP_STORE_0;
} else if (isl_format_layouts[format].channels.r.type == ISL_UINT ||
isl_format_layouts[format].channels.r.type == ISL_SINT) {
assert(comp == 3);
return VFCOMP_STORE_1_INT;
} else {
assert(comp == 3);
return VFCOMP_STORE_1_FP;
}
}
static void
emit_vertex_input(struct anv_graphics_pipeline *pipeline,
const struct vk_vertex_input_state *vi)
{
const struct brw_vs_prog_data *vs_prog_data = get_vs_prog_data(pipeline);
/* Pull inputs_read out of the VS prog data */
const uint64_t inputs_read = vs_prog_data->inputs_read;
const uint64_t double_inputs_read =
vs_prog_data->double_inputs_read & inputs_read;
assert((inputs_read & ((1 << VERT_ATTRIB_GENERIC0) - 1)) == 0);
const uint32_t elements = inputs_read >> VERT_ATTRIB_GENERIC0;
const uint32_t elements_double = double_inputs_read >> VERT_ATTRIB_GENERIC0;
const bool needs_svgs_elem = vs_prog_data->uses_vertexid ||
vs_prog_data->uses_instanceid ||
vs_prog_data->uses_firstvertex ||
vs_prog_data->uses_baseinstance;
uint32_t elem_count = __builtin_popcount(elements) -
__builtin_popcount(elements_double) / 2;
const uint32_t total_elems =
MAX2(1, elem_count + needs_svgs_elem + vs_prog_data->uses_drawid);
uint32_t *p;
const uint32_t num_dwords = 1 + total_elems * 2;
p = anv_batch_emitn(&pipeline->base.batch, num_dwords,
GENX(3DSTATE_VERTEX_ELEMENTS));
if (!p)
return;
for (uint32_t i = 0; i < total_elems; i++) {
/* The SKL docs for VERTEX_ELEMENT_STATE say:
*
* "All elements must be valid from Element[0] to the last valid
* element. (I.e. if Element[2] is valid then Element[1] and
* Element[0] must also be valid)."
*
* The SKL docs for 3D_Vertex_Component_Control say:
*
* "Don't store this component. (Not valid for Component 0, but can
* be used for Component 1-3)."
*
* So we can't just leave a vertex element blank and hope for the best.
* We have to tell the VF hardware to put something in it; so we just
* store a bunch of zero.
*
* TODO: Compact vertex elements so we never end up with holes.
*/
struct GENX(VERTEX_ELEMENT_STATE) element = {
.Valid = true,
.Component0Control = VFCOMP_STORE_0,
.Component1Control = VFCOMP_STORE_0,
.Component2Control = VFCOMP_STORE_0,
.Component3Control = VFCOMP_STORE_0,
};
GENX(VERTEX_ELEMENT_STATE_pack)(NULL, &p[1 + i * 2], &element);
}
u_foreach_bit(a, vi->attributes_valid) {
enum isl_format format = anv_get_isl_format(pipeline->base.device->info,
vi->attributes[a].format,
VK_IMAGE_ASPECT_COLOR_BIT,
VK_IMAGE_TILING_LINEAR);
uint32_t binding = vi->attributes[a].binding;
assert(binding < MAX_VBS);
if ((elements & (1 << a)) == 0)
continue; /* Binding unused */
uint32_t slot =
__builtin_popcount(elements & ((1 << a) - 1)) -
DIV_ROUND_UP(__builtin_popcount(elements_double &
((1 << a) -1)), 2);
struct GENX(VERTEX_ELEMENT_STATE) element = {
.VertexBufferIndex = vi->attributes[a].binding,
.Valid = true,
.SourceElementFormat = format,
.EdgeFlagEnable = false,
.SourceElementOffset = vi->attributes[a].offset,
.Component0Control = vertex_element_comp_control(format, 0),
.Component1Control = vertex_element_comp_control(format, 1),
.Component2Control = vertex_element_comp_control(format, 2),
.Component3Control = vertex_element_comp_control(format, 3),
};
GENX(VERTEX_ELEMENT_STATE_pack)(NULL, &p[1 + slot * 2], &element);
/* On Broadwell and later, we have a separate VF_INSTANCING packet
* that controls instancing. On Haswell and prior, that's part of
* VERTEX_BUFFER_STATE which we emit later.
*/
anv_batch_emit(&pipeline->base.batch, GENX(3DSTATE_VF_INSTANCING), vfi) {
bool per_instance = pipeline->vb[binding].instanced;
uint32_t divisor = pipeline->vb[binding].instance_divisor *
pipeline->instance_multiplier;
vfi.InstancingEnable = per_instance;
vfi.VertexElementIndex = slot;
vfi.InstanceDataStepRate = per_instance ? divisor : 1;
}
}
const uint32_t id_slot = elem_count;
if (needs_svgs_elem) {
/* From the Broadwell PRM for the 3D_Vertex_Component_Control enum:
* "Within a VERTEX_ELEMENT_STATE structure, if a Component
* Control field is set to something other than VFCOMP_STORE_SRC,
* no higher-numbered Component Control fields may be set to
* VFCOMP_STORE_SRC"
*
* This means, that if we have BaseInstance, we need BaseVertex as
* well. Just do all or nothing.
*/
uint32_t base_ctrl = (vs_prog_data->uses_firstvertex ||
vs_prog_data->uses_baseinstance) ?
VFCOMP_STORE_SRC : VFCOMP_STORE_0;
struct GENX(VERTEX_ELEMENT_STATE) element = {
.VertexBufferIndex = ANV_SVGS_VB_INDEX,
.Valid = true,
.SourceElementFormat = ISL_FORMAT_R32G32_UINT,
.Component0Control = base_ctrl,
.Component1Control = base_ctrl,
.Component2Control = VFCOMP_STORE_0,
.Component3Control = VFCOMP_STORE_0,
};
GENX(VERTEX_ELEMENT_STATE_pack)(NULL, &p[1 + id_slot * 2], &element);
anv_batch_emit(&pipeline->base.batch, GENX(3DSTATE_VF_INSTANCING), vfi) {
vfi.VertexElementIndex = id_slot;
}
}
anv_batch_emit(&pipeline->base.batch, GENX(3DSTATE_VF_SGVS), sgvs) {
sgvs.VertexIDEnable = vs_prog_data->uses_vertexid;
sgvs.VertexIDComponentNumber = 2;
sgvs.VertexIDElementOffset = id_slot;
sgvs.InstanceIDEnable = vs_prog_data->uses_instanceid;
sgvs.InstanceIDComponentNumber = 3;
sgvs.InstanceIDElementOffset = id_slot;
}
const uint32_t drawid_slot = elem_count + needs_svgs_elem;
if (vs_prog_data->uses_drawid) {
struct GENX(VERTEX_ELEMENT_STATE) element = {
.VertexBufferIndex = ANV_DRAWID_VB_INDEX,
.Valid = true,
.SourceElementFormat = ISL_FORMAT_R32_UINT,
.Component0Control = VFCOMP_STORE_SRC,
.Component1Control = VFCOMP_STORE_0,
.Component2Control = VFCOMP_STORE_0,
.Component3Control = VFCOMP_STORE_0,
};
GENX(VERTEX_ELEMENT_STATE_pack)(NULL,
&p[1 + drawid_slot * 2],
&element);
anv_batch_emit(&pipeline->base.batch, GENX(3DSTATE_VF_INSTANCING), vfi) {
vfi.VertexElementIndex = drawid_slot;
}
}
}
void
genX(emit_urb_setup)(struct anv_device *device, struct anv_batch *batch,
const struct intel_l3_config *l3_config,
VkShaderStageFlags active_stages,
const unsigned entry_size[4],
enum intel_urb_deref_block_size *deref_block_size)
{
const struct intel_device_info *devinfo = device->info;
unsigned entries[4];
unsigned start[4];
bool constrained;
intel_get_urb_config(devinfo, l3_config,
active_stages &
VK_SHADER_STAGE_TESSELLATION_EVALUATION_BIT,
active_stages & VK_SHADER_STAGE_GEOMETRY_BIT,
entry_size, entries, start, deref_block_size,
&constrained);
for (int i = 0; i <= MESA_SHADER_GEOMETRY; i++) {
anv_batch_emit(batch, GENX(3DSTATE_URB_VS), urb) {
urb._3DCommandSubOpcode += i;
urb.VSURBStartingAddress = start[i];
urb.VSURBEntryAllocationSize = entry_size[i] - 1;
urb.VSNumberofURBEntries = entries[i];
}
}
#if GFX_VERx10 >= 125
if (device->physical->vk.supported_extensions.NV_mesh_shader ||
device->physical->vk.supported_extensions.EXT_mesh_shader) {
anv_batch_emit(batch, GENX(3DSTATE_URB_ALLOC_MESH), zero);
anv_batch_emit(batch, GENX(3DSTATE_URB_ALLOC_TASK), zero);
}
#endif
}
#if GFX_VERx10 >= 125
static void
emit_urb_setup_mesh(struct anv_graphics_pipeline *pipeline,
enum intel_urb_deref_block_size *deref_block_size)
{
const struct intel_device_info *devinfo = pipeline->base.device->info;
const struct brw_task_prog_data *task_prog_data =
anv_pipeline_has_stage(pipeline, MESA_SHADER_TASK) ?
get_task_prog_data(pipeline) : NULL;
const struct brw_mesh_prog_data *mesh_prog_data = get_mesh_prog_data(pipeline);
const struct intel_mesh_urb_allocation alloc =
intel_get_mesh_urb_config(devinfo, pipeline->base.l3_config,
task_prog_data ? task_prog_data->map.size_dw : 0,
mesh_prog_data->map.size_dw);
/* Zero out the primitive pipeline URB allocations. */
for (int i = 0; i <= MESA_SHADER_GEOMETRY; i++) {
anv_batch_emit(&pipeline->base.batch, GENX(3DSTATE_URB_VS), urb) {
urb._3DCommandSubOpcode += i;
}
}
anv_batch_emit(&pipeline->base.batch, GENX(3DSTATE_URB_ALLOC_TASK), urb) {
if (task_prog_data) {
urb.TASKURBEntryAllocationSize = alloc.task_entry_size_64b - 1;
urb.TASKNumberofURBEntriesSlice0 = alloc.task_entries;
urb.TASKNumberofURBEntriesSliceN = alloc.task_entries;
urb.TASKURBStartingAddressSlice0 = alloc.task_starting_address_8kb;
urb.TASKURBStartingAddressSliceN = alloc.task_starting_address_8kb;
}
}
anv_batch_emit(&pipeline->base.batch, GENX(3DSTATE_URB_ALLOC_MESH), urb) {
urb.MESHURBEntryAllocationSize = alloc.mesh_entry_size_64b - 1;
urb.MESHNumberofURBEntriesSlice0 = alloc.mesh_entries;
urb.MESHNumberofURBEntriesSliceN = alloc.mesh_entries;
urb.MESHURBStartingAddressSlice0 = alloc.mesh_starting_address_8kb;
urb.MESHURBStartingAddressSliceN = alloc.mesh_starting_address_8kb;
}
*deref_block_size = alloc.deref_block_size;
}
#endif
static void
emit_urb_setup(struct anv_graphics_pipeline *pipeline,
enum intel_urb_deref_block_size *deref_block_size)
{
#if GFX_VERx10 >= 125
if (anv_pipeline_is_mesh(pipeline)) {
emit_urb_setup_mesh(pipeline, deref_block_size);
return;
}
#endif
unsigned entry_size[4];
for (int i = MESA_SHADER_VERTEX; i <= MESA_SHADER_GEOMETRY; i++) {
const struct brw_vue_prog_data *prog_data =
!anv_pipeline_has_stage(pipeline, i) ? NULL :
(const struct brw_vue_prog_data *) pipeline->shaders[i]->prog_data;
entry_size[i] = prog_data ? prog_data->urb_entry_size : 1;
}
genX(emit_urb_setup)(pipeline->base.device, &pipeline->base.batch,
pipeline->base.l3_config,
pipeline->active_stages, entry_size,
deref_block_size);
}
static void
emit_3dstate_sbe(struct anv_graphics_pipeline *pipeline)
{
const struct brw_wm_prog_data *wm_prog_data = get_wm_prog_data(pipeline);
if (!anv_pipeline_has_stage(pipeline, MESA_SHADER_FRAGMENT)) {
anv_batch_emit(&pipeline->base.batch, GENX(3DSTATE_SBE), sbe);
anv_batch_emit(&pipeline->base.batch, GENX(3DSTATE_SBE_SWIZ), sbe);
#if GFX_VERx10 >= 125
if (anv_pipeline_is_mesh(pipeline))
anv_batch_emit(&pipeline->base.batch, GENX(3DSTATE_SBE_MESH), sbe_mesh);
#endif
return;
}
struct GENX(3DSTATE_SBE) sbe = {
GENX(3DSTATE_SBE_header),
/* TODO(mesh): Figure out cases where we need attribute swizzling. See also
* calculate_urb_setup() and related functions.
*/
.AttributeSwizzleEnable = anv_pipeline_is_primitive(pipeline),
.PointSpriteTextureCoordinateOrigin = UPPERLEFT,
.NumberofSFOutputAttributes = wm_prog_data->num_varying_inputs,
.ConstantInterpolationEnable = wm_prog_data->flat_inputs,
};
for (unsigned i = 0; i < 32; i++)
sbe.AttributeActiveComponentFormat[i] = ACF_XYZW;
/* On Broadwell, they broke 3DSTATE_SBE into two packets */
struct GENX(3DSTATE_SBE_SWIZ) swiz = {
GENX(3DSTATE_SBE_SWIZ_header),
};
if (anv_pipeline_is_primitive(pipeline)) {
const struct brw_vue_map *fs_input_map =
&anv_pipeline_get_last_vue_prog_data(pipeline)->vue_map;
int first_slot = brw_compute_first_urb_slot_required(wm_prog_data->inputs,
fs_input_map);
assert(first_slot % 2 == 0);
unsigned urb_entry_read_offset = first_slot / 2;
int max_source_attr = 0;
for (uint8_t idx = 0; idx < wm_prog_data->urb_setup_attribs_count; idx++) {
uint8_t attr = wm_prog_data->urb_setup_attribs[idx];
int input_index = wm_prog_data->urb_setup[attr];
assert(0 <= input_index);
/* gl_Viewport, gl_Layer and FragmentShadingRateKHR are stored in the
* VUE header
*/
if (attr == VARYING_SLOT_VIEWPORT ||
attr == VARYING_SLOT_LAYER ||
attr == VARYING_SLOT_PRIMITIVE_SHADING_RATE) {
continue;
}
if (attr == VARYING_SLOT_PNTC) {
sbe.PointSpriteTextureCoordinateEnable = 1 << input_index;
continue;
}
const int slot = fs_input_map->varying_to_slot[attr];
if (slot == -1) {
/* This attribute does not exist in the VUE--that means that the
* vertex shader did not write to it. It could be that it's a
* regular varying read by the fragment shader but not written by
* the vertex shader or it's gl_PrimitiveID. In the first case the
* value is undefined, in the second it needs to be
* gl_PrimitiveID.
*/
swiz.Attribute[input_index].ConstantSource = PRIM_ID;
swiz.Attribute[input_index].ComponentOverrideX = true;
swiz.Attribute[input_index].ComponentOverrideY = true;
swiz.Attribute[input_index].ComponentOverrideZ = true;
swiz.Attribute[input_index].ComponentOverrideW = true;
continue;
}
/* We have to subtract two slots to account for the URB entry output
* read offset in the VS and GS stages.
*/
const int source_attr = slot - 2 * urb_entry_read_offset;
assert(source_attr >= 0 && source_attr < 32);
max_source_attr = MAX2(max_source_attr, source_attr);
/* The hardware can only do overrides on 16 overrides at a time, and the
* other up to 16 have to be lined up so that the input index = the
* output index. We'll need to do some tweaking to make sure that's the
* case.
*/
if (input_index < 16)
swiz.Attribute[input_index].SourceAttribute = source_attr;
else
assert(source_attr == input_index);
}
sbe.VertexURBEntryReadOffset = urb_entry_read_offset;
sbe.VertexURBEntryReadLength = DIV_ROUND_UP(max_source_attr + 1, 2);
sbe.ForceVertexURBEntryReadOffset = true;
sbe.ForceVertexURBEntryReadLength = true;
} else {
assert(anv_pipeline_is_mesh(pipeline));
#if GFX_VERx10 >= 125
const struct brw_mesh_prog_data *mesh_prog_data = get_mesh_prog_data(pipeline);
anv_batch_emit(&pipeline->base.batch, GENX(3DSTATE_SBE_MESH), sbe_mesh) {
const struct brw_mue_map *mue = &mesh_prog_data->map;
assert(mue->per_vertex_header_size_dw % 8 == 0);
sbe_mesh.PerVertexURBEntryOutputReadOffset = mue->per_vertex_header_size_dw / 8;
sbe_mesh.PerVertexURBEntryOutputReadLength = DIV_ROUND_UP(mue->per_vertex_data_size_dw, 8);
/* Clip distance array is passed in the per-vertex header so that
* it can be consumed by the HW. If user wants to read it in the FS,
* adjust the offset and length to cover it. Conveniently it is at
* the end of the per-vertex header, right before per-vertex
* attributes.
*
* Note that FS attribute reading must be aware that the clip
* distances have fixed position.
*/
if (mue->per_vertex_header_size_dw > 8 &&
(wm_prog_data->urb_setup[VARYING_SLOT_CLIP_DIST0] >= 0 ||
wm_prog_data->urb_setup[VARYING_SLOT_CLIP_DIST1] >= 0)) {
sbe_mesh.PerVertexURBEntryOutputReadOffset -= 1;
sbe_mesh.PerVertexURBEntryOutputReadLength += 1;
}
assert(mue->per_primitive_header_size_dw % 8 == 0);
sbe_mesh.PerPrimitiveURBEntryOutputReadOffset = mue->per_primitive_header_size_dw / 8;
sbe_mesh.PerPrimitiveURBEntryOutputReadLength = DIV_ROUND_UP(mue->per_primitive_data_size_dw, 8);
/* Just like with clip distances, if Primitive Shading Rate,
* Viewport Index or Layer is read back in the FS, adjust
* the offset and length to cover the Primitive Header, where
* PSR, Viewport Index & Layer are stored.
*/
if (wm_prog_data->urb_setup[VARYING_SLOT_VIEWPORT] >= 0 ||
wm_prog_data->urb_setup[VARYING_SLOT_PRIMITIVE_SHADING_RATE] >= 0 ||
wm_prog_data->urb_setup[VARYING_SLOT_LAYER] >= 0) {
assert(sbe_mesh.PerPrimitiveURBEntryOutputReadOffset > 0);
sbe_mesh.PerPrimitiveURBEntryOutputReadOffset -= 1;
sbe_mesh.PerPrimitiveURBEntryOutputReadLength += 1;
}
}
#endif
}
uint32_t *dw = anv_batch_emit_dwords(&pipeline->base.batch,
GENX(3DSTATE_SBE_length));
if (!dw)
return;
GENX(3DSTATE_SBE_pack)(&pipeline->base.batch, dw, &sbe);
dw = anv_batch_emit_dwords(&pipeline->base.batch, GENX(3DSTATE_SBE_SWIZ_length));
if (!dw)
return;
GENX(3DSTATE_SBE_SWIZ_pack)(&pipeline->base.batch, dw, &swiz);
}
/** Returns the final polygon mode for rasterization
*
* This function takes into account polygon mode, primitive topology and the
* different shader stages which might generate their own type of primitives.
*/
VkPolygonMode
genX(raster_polygon_mode)(struct anv_graphics_pipeline *pipeline,
VkPolygonMode polygon_mode,
VkPrimitiveTopology primitive_topology)
{
if (anv_pipeline_is_mesh(pipeline)) {
switch (get_mesh_prog_data(pipeline)->primitive_type) {
case SHADER_PRIM_POINTS:
return VK_POLYGON_MODE_POINT;
case SHADER_PRIM_LINES:
return VK_POLYGON_MODE_LINE;
case SHADER_PRIM_TRIANGLES:
return polygon_mode;
default:
unreachable("invalid primitive type for mesh");
}
} else if (anv_pipeline_has_stage(pipeline, MESA_SHADER_GEOMETRY)) {
switch (get_gs_prog_data(pipeline)->output_topology) {
case _3DPRIM_POINTLIST:
return VK_POLYGON_MODE_POINT;
case _3DPRIM_LINELIST:
case _3DPRIM_LINESTRIP:
case _3DPRIM_LINELOOP:
return VK_POLYGON_MODE_LINE;
case _3DPRIM_TRILIST:
case _3DPRIM_TRIFAN:
case _3DPRIM_TRISTRIP:
case _3DPRIM_RECTLIST:
case _3DPRIM_QUADLIST:
case _3DPRIM_QUADSTRIP:
case _3DPRIM_POLYGON:
return polygon_mode;
}
unreachable("Unsupported GS output topology");
} else if (anv_pipeline_has_stage(pipeline, MESA_SHADER_TESS_EVAL)) {
switch (get_tes_prog_data(pipeline)->output_topology) {
case BRW_TESS_OUTPUT_TOPOLOGY_POINT:
return VK_POLYGON_MODE_POINT;
case BRW_TESS_OUTPUT_TOPOLOGY_LINE:
return VK_POLYGON_MODE_LINE;
case BRW_TESS_OUTPUT_TOPOLOGY_TRI_CW:
case BRW_TESS_OUTPUT_TOPOLOGY_TRI_CCW:
return polygon_mode;
}
unreachable("Unsupported TCS output topology");
} else {
switch (primitive_topology) {
case VK_PRIMITIVE_TOPOLOGY_POINT_LIST:
return VK_POLYGON_MODE_POINT;
case VK_PRIMITIVE_TOPOLOGY_LINE_LIST:
case VK_PRIMITIVE_TOPOLOGY_LINE_STRIP:
case VK_PRIMITIVE_TOPOLOGY_LINE_LIST_WITH_ADJACENCY:
case VK_PRIMITIVE_TOPOLOGY_LINE_STRIP_WITH_ADJACENCY:
return VK_POLYGON_MODE_LINE;
case VK_PRIMITIVE_TOPOLOGY_TRIANGLE_LIST:
case VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP:
case VK_PRIMITIVE_TOPOLOGY_TRIANGLE_FAN:
case VK_PRIMITIVE_TOPOLOGY_TRIANGLE_LIST_WITH_ADJACENCY:
case VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP_WITH_ADJACENCY:
return polygon_mode;
default:
unreachable("Unsupported primitive topology");
}
}
}
const uint32_t genX(vk_to_intel_cullmode)[] = {
[VK_CULL_MODE_NONE] = CULLMODE_NONE,
[VK_CULL_MODE_FRONT_BIT] = CULLMODE_FRONT,
[VK_CULL_MODE_BACK_BIT] = CULLMODE_BACK,
[VK_CULL_MODE_FRONT_AND_BACK] = CULLMODE_BOTH
};
const uint32_t genX(vk_to_intel_fillmode)[] = {
[VK_POLYGON_MODE_FILL] = FILL_MODE_SOLID,
[VK_POLYGON_MODE_LINE] = FILL_MODE_WIREFRAME,
[VK_POLYGON_MODE_POINT] = FILL_MODE_POINT,
};
const uint32_t genX(vk_to_intel_front_face)[] = {
[VK_FRONT_FACE_COUNTER_CLOCKWISE] = 1,
[VK_FRONT_FACE_CLOCKWISE] = 0
};
void
genX(rasterization_mode)(VkPolygonMode raster_mode,
VkLineRasterizationModeEXT line_mode,
float line_width,
uint32_t *api_mode,
bool *msaa_rasterization_enable)
{
if (raster_mode == VK_POLYGON_MODE_LINE) {
/* Unfortunately, configuring our line rasterization hardware on gfx8
* and later is rather painful. Instead of giving us bits to tell the
* hardware what line mode to use like we had on gfx7, we now have an
* arcane combination of API Mode and MSAA enable bits which do things
* in a table which are expected to magically put the hardware into the
* right mode for your API. Sadly, Vulkan isn't any of the APIs the
* hardware people thought of so nothing works the way you want it to.
*
* Look at the table titled "Multisample Rasterization Modes" in Vol 7
* of the Skylake PRM for more details.
*/
switch (line_mode) {
case VK_LINE_RASTERIZATION_MODE_RECTANGULAR_EXT:
*api_mode = DX100;
#if GFX_VER <= 9
/* Prior to ICL, the algorithm the HW uses to draw wide lines
* doesn't quite match what the CTS expects, at least for rectangular
* lines, so we set this to false here, making it draw parallelograms
* instead, which work well enough.
*/
*msaa_rasterization_enable = line_width < 1.0078125;
#else
*msaa_rasterization_enable = true;
#endif
break;
case VK_LINE_RASTERIZATION_MODE_RECTANGULAR_SMOOTH_EXT:
case VK_LINE_RASTERIZATION_MODE_BRESENHAM_EXT:
*api_mode = DX9OGL;
*msaa_rasterization_enable = false;
break;
default:
unreachable("Unsupported line rasterization mode");
}
} else {
*api_mode = DX100;
*msaa_rasterization_enable = true;
}
}
static void
emit_rs_state(struct anv_graphics_pipeline *pipeline,
const struct vk_input_assembly_state *ia,
const struct vk_rasterization_state *rs,
const struct vk_multisample_state *ms,
const struct vk_render_pass_state *rp,
enum intel_urb_deref_block_size urb_deref_block_size)
{
struct GENX(3DSTATE_SF) sf = {
GENX(3DSTATE_SF_header),
};
sf.ViewportTransformEnable = true;
sf.StatisticsEnable = true;
sf.VertexSubPixelPrecisionSelect = _8Bit;
sf.AALineDistanceMode = true;
#if GFX_VER >= 12
sf.DerefBlockSize = urb_deref_block_size;
#endif
bool point_from_shader;
if (anv_pipeline_is_primitive(pipeline)) {
const struct brw_vue_prog_data *last_vue_prog_data =
anv_pipeline_get_last_vue_prog_data(pipeline);
point_from_shader = last_vue_prog_data->vue_map.slots_valid & VARYING_BIT_PSIZ;
} else {
assert(anv_pipeline_is_mesh(pipeline));
const struct brw_mesh_prog_data *mesh_prog_data = get_mesh_prog_data(pipeline);
point_from_shader = mesh_prog_data->map.start_dw[VARYING_SLOT_PSIZ] >= 0;
}
if (point_from_shader) {
sf.PointWidthSource = Vertex;
} else {
sf.PointWidthSource = State;
sf.PointWidth = 1.0;
}
struct GENX(3DSTATE_RASTER) raster = {
GENX(3DSTATE_RASTER_header),
};
/* For details on 3DSTATE_RASTER multisample state, see the BSpec table
* "Multisample Modes State".
*/
/* NOTE: 3DSTATE_RASTER::ForcedSampleCount affects the BDW and SKL PMA fix
* computations. If we ever set this bit to a different value, they will
* need to be updated accordingly.
*/
raster.ForcedSampleCount = FSC_NUMRASTSAMPLES_0;
raster.ForceMultisampling = false;
raster.ScissorRectangleEnable = true;
raster.ConservativeRasterizationEnable =
rs->conservative_mode != VK_CONSERVATIVE_RASTERIZATION_MODE_DISABLED_EXT;
GENX(3DSTATE_SF_pack)(NULL, pipeline->gfx8.sf, &sf);
GENX(3DSTATE_RASTER_pack)(NULL, pipeline->gfx8.raster, &raster);
}
static void
emit_ms_state(struct anv_graphics_pipeline *pipeline,
const struct vk_multisample_state *ms)
{
/* On Gfx8+ 3DSTATE_MULTISAMPLE only holds the number of samples. */
genX(emit_multisample)(&pipeline->base.batch,
pipeline->rasterization_samples);
}
const uint32_t genX(vk_to_intel_logic_op)[] = {
[VK_LOGIC_OP_COPY] = LOGICOP_COPY,
[VK_LOGIC_OP_CLEAR] = LOGICOP_CLEAR,
[VK_LOGIC_OP_AND] = LOGICOP_AND,
[VK_LOGIC_OP_AND_REVERSE] = LOGICOP_AND_REVERSE,
[VK_LOGIC_OP_AND_INVERTED] = LOGICOP_AND_INVERTED,
[VK_LOGIC_OP_NO_OP] = LOGICOP_NOOP,
[VK_LOGIC_OP_XOR] = LOGICOP_XOR,
[VK_LOGIC_OP_OR] = LOGICOP_OR,
[VK_LOGIC_OP_NOR] = LOGICOP_NOR,
[VK_LOGIC_OP_EQUIVALENT] = LOGICOP_EQUIV,
[VK_LOGIC_OP_INVERT] = LOGICOP_INVERT,
[VK_LOGIC_OP_OR_REVERSE] = LOGICOP_OR_REVERSE,
[VK_LOGIC_OP_COPY_INVERTED] = LOGICOP_COPY_INVERTED,
[VK_LOGIC_OP_OR_INVERTED] = LOGICOP_OR_INVERTED,
[VK_LOGIC_OP_NAND] = LOGICOP_NAND,
[VK_LOGIC_OP_SET] = LOGICOP_SET,
};
const uint32_t genX(vk_to_intel_compare_op)[] = {
[VK_COMPARE_OP_NEVER] = PREFILTEROP_NEVER,
[VK_COMPARE_OP_LESS] = PREFILTEROP_LESS,
[VK_COMPARE_OP_EQUAL] = PREFILTEROP_EQUAL,
[VK_COMPARE_OP_LESS_OR_EQUAL] = PREFILTEROP_LEQUAL,
[VK_COMPARE_OP_GREATER] = PREFILTEROP_GREATER,
[VK_COMPARE_OP_NOT_EQUAL] = PREFILTEROP_NOTEQUAL,
[VK_COMPARE_OP_GREATER_OR_EQUAL] = PREFILTEROP_GEQUAL,
[VK_COMPARE_OP_ALWAYS] = PREFILTEROP_ALWAYS,
};
const uint32_t genX(vk_to_intel_stencil_op)[] = {
[VK_STENCIL_OP_KEEP] = STENCILOP_KEEP,
[VK_STENCIL_OP_ZERO] = STENCILOP_ZERO,
[VK_STENCIL_OP_REPLACE] = STENCILOP_REPLACE,
[VK_STENCIL_OP_INCREMENT_AND_CLAMP] = STENCILOP_INCRSAT,
[VK_STENCIL_OP_DECREMENT_AND_CLAMP] = STENCILOP_DECRSAT,
[VK_STENCIL_OP_INVERT] = STENCILOP_INVERT,
[VK_STENCIL_OP_INCREMENT_AND_WRAP] = STENCILOP_INCR,
[VK_STENCIL_OP_DECREMENT_AND_WRAP] = STENCILOP_DECR,
};
const uint32_t genX(vk_to_intel_primitive_type)[] = {
[VK_PRIMITIVE_TOPOLOGY_POINT_LIST] = _3DPRIM_POINTLIST,
[VK_PRIMITIVE_TOPOLOGY_LINE_LIST] = _3DPRIM_LINELIST,
[VK_PRIMITIVE_TOPOLOGY_LINE_STRIP] = _3DPRIM_LINESTRIP,
[VK_PRIMITIVE_TOPOLOGY_TRIANGLE_LIST] = _3DPRIM_TRILIST,
[VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP] = _3DPRIM_TRISTRIP,
[VK_PRIMITIVE_TOPOLOGY_TRIANGLE_FAN] = _3DPRIM_TRIFAN,
[VK_PRIMITIVE_TOPOLOGY_LINE_LIST_WITH_ADJACENCY] = _3DPRIM_LINELIST_ADJ,
[VK_PRIMITIVE_TOPOLOGY_LINE_STRIP_WITH_ADJACENCY] = _3DPRIM_LINESTRIP_ADJ,
[VK_PRIMITIVE_TOPOLOGY_TRIANGLE_LIST_WITH_ADJACENCY] = _3DPRIM_TRILIST_ADJ,
[VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP_WITH_ADJACENCY] = _3DPRIM_TRISTRIP_ADJ,
};
static void
emit_3dstate_clip(struct anv_graphics_pipeline *pipeline,
const struct vk_input_assembly_state *ia,
const struct vk_viewport_state *vp,
const struct vk_rasterization_state *rs)
{
const struct brw_wm_prog_data *wm_prog_data = get_wm_prog_data(pipeline);
(void) wm_prog_data;
struct GENX(3DSTATE_CLIP) clip = {
GENX(3DSTATE_CLIP_header),
};
clip.ClipEnable = true;
clip.StatisticsEnable = true;
clip.EarlyCullEnable = true;
clip.GuardbandClipTestEnable = true;
clip.VertexSubPixelPrecisionSelect = _8Bit;
clip.ClipMode = CLIPMODE_NORMAL;
clip.MinimumPointWidth = 0.125;
clip.MaximumPointWidth = 255.875;
/* TODO(mesh): Multiview. */
if (anv_pipeline_is_primitive(pipeline)) {
const struct brw_vue_prog_data *last =
anv_pipeline_get_last_vue_prog_data(pipeline);
/* From the Vulkan 1.0.45 spec:
*
* "If the last active vertex processing stage shader entry point's
* interface does not include a variable decorated with
* ViewportIndex, then the first viewport is used."
*/
if (vp && (last->vue_map.slots_valid & VARYING_BIT_VIEWPORT)) {
clip.MaximumVPIndex = vp->viewport_count > 0 ?
vp->viewport_count - 1 : 0;
} else {
clip.MaximumVPIndex = 0;
}
/* From the Vulkan 1.0.45 spec:
*
* "If the last active vertex processing stage shader entry point's
* interface does not include a variable decorated with Layer, then
* the first layer is used."
*/
clip.ForceZeroRTAIndexEnable =
!(last->vue_map.slots_valid & VARYING_BIT_LAYER);
} else if (anv_pipeline_is_mesh(pipeline)) {
const struct brw_mesh_prog_data *mesh_prog_data = get_mesh_prog_data(pipeline);
if (vp && vp->viewport_count > 0 &&
mesh_prog_data->map.start_dw[VARYING_SLOT_VIEWPORT] >= 0) {
clip.MaximumVPIndex = vp->viewport_count - 1;
}
}
clip.NonPerspectiveBarycentricEnable = wm_prog_data ?
wm_prog_data->uses_nonperspective_interp_modes : 0;
GENX(3DSTATE_CLIP_pack)(NULL, pipeline->gfx8.clip, &clip);
#if GFX_VERx10 >= 125
if (anv_pipeline_is_mesh(pipeline)) {
const struct brw_mesh_prog_data *mesh_prog_data = get_mesh_prog_data(pipeline);
anv_batch_emit(&pipeline->base.batch, GENX(3DSTATE_CLIP_MESH), clip_mesh) {
clip_mesh.PrimitiveHeaderEnable = mesh_prog_data->map.per_primitive_header_size_dw > 0;
clip_mesh.UserClipDistanceClipTestEnableBitmask = mesh_prog_data->clip_distance_mask;
clip_mesh.UserClipDistanceCullTestEnableBitmask = mesh_prog_data->cull_distance_mask;
}
}
#endif
}
static void
emit_3dstate_streamout(struct anv_graphics_pipeline *pipeline,
const struct vk_rasterization_state *rs)
{
const struct brw_vue_prog_data *prog_data =
anv_pipeline_get_last_vue_prog_data(pipeline);
const struct brw_vue_map *vue_map = &prog_data->vue_map;
nir_xfb_info *xfb_info;
if (anv_pipeline_has_stage(pipeline, MESA_SHADER_GEOMETRY))
xfb_info = pipeline->shaders[MESA_SHADER_GEOMETRY]->xfb_info;
else if (anv_pipeline_has_stage(pipeline, MESA_SHADER_TESS_EVAL))
xfb_info = pipeline->shaders[MESA_SHADER_TESS_EVAL]->xfb_info;
else
xfb_info = pipeline->shaders[MESA_SHADER_VERTEX]->xfb_info;
if (xfb_info) {
struct GENX(SO_DECL) so_decl[MAX_XFB_STREAMS][128];
int next_offset[MAX_XFB_BUFFERS] = {0, 0, 0, 0};
int decls[MAX_XFB_STREAMS] = {0, 0, 0, 0};
memset(so_decl, 0, sizeof(so_decl));
for (unsigned i = 0; i < xfb_info->output_count; i++) {
const nir_xfb_output_info *output = &xfb_info->outputs[i];
unsigned buffer = output->buffer;
unsigned stream = xfb_info->buffer_to_stream[buffer];
/* Our hardware is unusual in that it requires us to program SO_DECLs
* for fake "hole" components, rather than simply taking the offset
* for each real varying. Each hole can have size 1, 2, 3, or 4; we
* program as many size = 4 holes as we can, then a final hole to
* accommodate the final 1, 2, or 3 remaining.
*/
int hole_dwords = (output->offset - next_offset[buffer]) / 4;
while (hole_dwords > 0) {
so_decl[stream][decls[stream]++] = (struct GENX(SO_DECL)) {
.HoleFlag = 1,
.OutputBufferSlot = buffer,
.ComponentMask = (1 << MIN2(hole_dwords, 4)) - 1,
};
hole_dwords -= 4;
}
int varying = output->location;
uint8_t component_mask = output->component_mask;
/* VARYING_SLOT_PSIZ contains four scalar fields packed together:
* - VARYING_SLOT_PRIMITIVE_SHADING_RATE in VARYING_SLOT_PSIZ.x
* - VARYING_SLOT_LAYER in VARYING_SLOT_PSIZ.y
* - VARYING_SLOT_VIEWPORT in VARYING_SLOT_PSIZ.z
* - VARYING_SLOT_PSIZ in VARYING_SLOT_PSIZ.w
*/
if (varying == VARYING_SLOT_PRIMITIVE_SHADING_RATE) {
varying = VARYING_SLOT_PSIZ;
component_mask = 1 << 0; // SO_DECL_COMPMASK_X
} else if (varying == VARYING_SLOT_LAYER) {
varying = VARYING_SLOT_PSIZ;
component_mask = 1 << 1; // SO_DECL_COMPMASK_Y
} else if (varying == VARYING_SLOT_VIEWPORT) {
varying = VARYING_SLOT_PSIZ;
component_mask = 1 << 2; // SO_DECL_COMPMASK_Z
} else if (varying == VARYING_SLOT_PSIZ) {
component_mask = 1 << 3; // SO_DECL_COMPMASK_W
}
next_offset[buffer] = output->offset +
__builtin_popcount(component_mask) * 4;
const int slot = vue_map->varying_to_slot[varying];
if (slot < 0) {
/* This can happen if the shader never writes to the varying.
* Insert a hole instead of actual varying data.
*/
so_decl[stream][decls[stream]++] = (struct GENX(SO_DECL)) {
.HoleFlag = true,
.OutputBufferSlot = buffer,
.ComponentMask = component_mask,
};
} else {
so_decl[stream][decls[stream]++] = (struct GENX(SO_DECL)) {
.OutputBufferSlot = buffer,
.RegisterIndex = slot,
.ComponentMask = component_mask,
};
}
}
int max_decls = 0;
for (unsigned s = 0; s < MAX_XFB_STREAMS; s++)
max_decls = MAX2(max_decls, decls[s]);
uint8_t sbs[MAX_XFB_STREAMS] = { };
for (unsigned b = 0; b < MAX_XFB_BUFFERS; b++) {
if (xfb_info->buffers_written & (1 << b))
sbs[xfb_info->buffer_to_stream[b]] |= 1 << b;
}
/* Wa_16011773973:
* If SOL is enabled and SO_DECL state has to be programmed,
* 1. Send 3D State SOL state with SOL disabled
* 2. Send SO_DECL NP state
* 3. Send 3D State SOL with SOL Enabled
*/
if (intel_device_info_is_dg2(pipeline->base.device->info))
anv_batch_emit(&pipeline->base.batch, GENX(3DSTATE_STREAMOUT), so);
uint32_t *dw = anv_batch_emitn(&pipeline->base.batch, 3 + 2 * max_decls,
GENX(3DSTATE_SO_DECL_LIST),
.StreamtoBufferSelects0 = sbs[0],
.StreamtoBufferSelects1 = sbs[1],
.StreamtoBufferSelects2 = sbs[2],
.StreamtoBufferSelects3 = sbs[3],
.NumEntries0 = decls[0],
.NumEntries1 = decls[1],
.NumEntries2 = decls[2],
.NumEntries3 = decls[3]);
for (int i = 0; i < max_decls; i++) {
GENX(SO_DECL_ENTRY_pack)(NULL, dw + 3 + i * 2,
&(struct GENX(SO_DECL_ENTRY)) {
.Stream0Decl = so_decl[0][i],
.Stream1Decl = so_decl[1][i],
.Stream2Decl = so_decl[2][i],
.Stream3Decl = so_decl[3][i],
});
}
#if GFX_VERx10 == 125
/* Wa_14015946265: Send PC with CS stall after SO_DECL. */
anv_batch_emit(&pipeline->base.batch, GENX(PIPE_CONTROL), pc) {
pc.CommandStreamerStallEnable = true;
}
#endif
}
struct GENX(3DSTATE_STREAMOUT) so = {
GENX(3DSTATE_STREAMOUT_header),
};
if (xfb_info) {
so.SOFunctionEnable = true;
so.SOStatisticsEnable = true;
so.Buffer0SurfacePitch = xfb_info->buffers[0].stride;
so.Buffer1SurfacePitch = xfb_info->buffers[1].stride;
so.Buffer2SurfacePitch = xfb_info->buffers[2].stride;
so.Buffer3SurfacePitch = xfb_info->buffers[3].stride;
int urb_entry_read_offset = 0;
int urb_entry_read_length =
(prog_data->vue_map.num_slots + 1) / 2 - urb_entry_read_offset;
/* We always read the whole vertex. This could be reduced at some
* point by reading less and offsetting the register index in the
* SO_DECLs.
*/
so.Stream0VertexReadOffset = urb_entry_read_offset;
so.Stream0VertexReadLength = urb_entry_read_length - 1;
so.Stream1VertexReadOffset = urb_entry_read_offset;
so.Stream1VertexReadLength = urb_entry_read_length - 1;
so.Stream2VertexReadOffset = urb_entry_read_offset;
so.Stream2VertexReadLength = urb_entry_read_length - 1;
so.Stream3VertexReadOffset = urb_entry_read_offset;
so.Stream3VertexReadLength = urb_entry_read_length - 1;
}
GENX(3DSTATE_STREAMOUT_pack)(NULL, pipeline->gfx8.streamout_state, &so);
}
static uint32_t
get_sampler_count(const struct anv_shader_bin *bin)
{
uint32_t count_by_4 = DIV_ROUND_UP(bin->bind_map.sampler_count, 4);
/* We can potentially have way more than 32 samplers and that's ok.
* However, the 3DSTATE_XS packets only have 3 bits to specify how
* many to pre-fetch and all values above 4 are marked reserved.
*/
return MIN2(count_by_4, 4);
}
static UNUSED struct anv_address
get_scratch_address(struct anv_pipeline *pipeline,
gl_shader_stage stage,
const struct anv_shader_bin *bin)
{
return (struct anv_address) {
.bo = anv_scratch_pool_alloc(pipeline->device,
&pipeline->device->scratch_pool,
stage, bin->prog_data->total_scratch),
.offset = 0,
};
}
static UNUSED uint32_t
get_scratch_space(const struct anv_shader_bin *bin)
{
return ffs(bin->prog_data->total_scratch / 2048);
}
static UNUSED uint32_t
get_scratch_surf(struct anv_pipeline *pipeline,
gl_shader_stage stage,
const struct anv_shader_bin *bin)
{
if (bin->prog_data->total_scratch == 0)
return 0;
struct anv_bo *bo =
anv_scratch_pool_alloc(pipeline->device,
&pipeline->device->scratch_pool,
stage, bin->prog_data->total_scratch);
anv_reloc_list_add_bo(pipeline->batch.relocs,
pipeline->batch.alloc, bo);
return anv_scratch_pool_get_surf(pipeline->device,
&pipeline->device->scratch_pool,
bin->prog_data->total_scratch) >> 4;
}
static void
emit_3dstate_vs(struct anv_graphics_pipeline *pipeline)
{
const struct intel_device_info *devinfo = pipeline->base.device->info;
const struct brw_vs_prog_data *vs_prog_data = get_vs_prog_data(pipeline);
const struct anv_shader_bin *vs_bin =
pipeline->shaders[MESA_SHADER_VERTEX];
assert(anv_pipeline_has_stage(pipeline, MESA_SHADER_VERTEX));
anv_batch_emit(&pipeline->base.batch, GENX(3DSTATE_VS), vs) {
vs.Enable = true;
vs.StatisticsEnable = true;
vs.KernelStartPointer = vs_bin->kernel.offset;
vs.SIMD8DispatchEnable =
vs_prog_data->base.dispatch_mode == DISPATCH_MODE_SIMD8;
assert(!vs_prog_data->base.base.use_alt_mode);
#if GFX_VER < 11
vs.SingleVertexDispatch = false;
#endif
vs.VectorMaskEnable = false;
/* Wa_1606682166:
* Incorrect TDL's SSP address shift in SARB for 16:6 & 18:8 modes.
* Disable the Sampler state prefetch functionality in the SARB by
* programming 0xB000[30] to '1'.
*/
vs.SamplerCount = GFX_VER == 11 ? 0 : get_sampler_count(vs_bin);
vs.BindingTableEntryCount = vs_bin->bind_map.surface_count;
vs.FloatingPointMode = IEEE754;
vs.IllegalOpcodeExceptionEnable = false;
vs.SoftwareExceptionEnable = false;
vs.MaximumNumberofThreads = devinfo->max_vs_threads - 1;
if (GFX_VER == 9 && devinfo->gt == 4 &&
anv_pipeline_has_stage(pipeline, MESA_SHADER_TESS_EVAL)) {
/* On Sky Lake GT4, we have experienced some hangs related to the VS
* cache and tessellation. It is unknown exactly what is happening
* but the Haswell docs for the "VS Reference Count Full Force Miss
* Enable" field of the "Thread Mode" register refer to a HSW bug in
* which the VUE handle reference count would overflow resulting in
* internal reference counting bugs. My (Jason's) best guess is that
* this bug cropped back up on SKL GT4 when we suddenly had more
* threads in play than any previous gfx9 hardware.
*
* What we do know for sure is that setting this bit when
* tessellation shaders are in use fixes a GPU hang in Batman: Arkham
* City when playing with DXVK (https://bugs.freedesktop.org/107280).
* Disabling the vertex cache with tessellation shaders should only
* have a minor performance impact as the tessellation shaders are
* likely generating and processing far more geometry than the vertex
* stage.
*/
vs.VertexCacheDisable = true;
}
vs.VertexURBEntryReadLength = vs_prog_data->base.urb_read_length;
vs.VertexURBEntryReadOffset = 0;
vs.DispatchGRFStartRegisterForURBData =
vs_prog_data->base.base.dispatch_grf_start_reg;
vs.UserClipDistanceClipTestEnableBitmask =
vs_prog_data->base.clip_distance_mask;
vs.UserClipDistanceCullTestEnableBitmask =
vs_prog_data->base.cull_distance_mask;
#if GFX_VERx10 >= 125
vs.ScratchSpaceBuffer =
get_scratch_surf(&pipeline->base, MESA_SHADER_VERTEX, vs_bin);
#else
vs.PerThreadScratchSpace = get_scratch_space(vs_bin);
vs.ScratchSpaceBasePointer =
get_scratch_address(&pipeline->base, MESA_SHADER_VERTEX, vs_bin);
#endif
}
}
static void
emit_3dstate_hs_ds(struct anv_graphics_pipeline *pipeline,
const struct vk_tessellation_state *ts)
{
if (!anv_pipeline_has_stage(pipeline, MESA_SHADER_TESS_EVAL)) {
anv_batch_emit(&pipeline->base.batch, GENX(3DSTATE_HS), hs);
anv_batch_emit(&pipeline->base.batch, GENX(3DSTATE_DS), ds);
return;
}
const struct intel_device_info *devinfo = pipeline->base.device->info;
const struct anv_shader_bin *tcs_bin =
pipeline->shaders[MESA_SHADER_TESS_CTRL];
const struct anv_shader_bin *tes_bin =
pipeline->shaders[MESA_SHADER_TESS_EVAL];
const struct brw_tcs_prog_data *tcs_prog_data = get_tcs_prog_data(pipeline);
const struct brw_tes_prog_data *tes_prog_data = get_tes_prog_data(pipeline);
anv_batch_emit(&pipeline->base.batch, GENX(3DSTATE_HS), hs) {
hs.Enable = true;
hs.StatisticsEnable = true;
hs.KernelStartPointer = tcs_bin->kernel.offset;
/* Wa_1606682166 */
hs.SamplerCount = GFX_VER == 11 ? 0 : get_sampler_count(tcs_bin);
hs.BindingTableEntryCount = tcs_bin->bind_map.surface_count;
#if GFX_VER >= 12
/* Wa_1604578095:
*
* Hang occurs when the number of max threads is less than 2 times
* the number of instance count. The number of max threads must be
* more than 2 times the number of instance count.
*/
assert((devinfo->max_tcs_threads / 2) > tcs_prog_data->instances);
#endif
hs.MaximumNumberofThreads = devinfo->max_tcs_threads - 1;
hs.IncludeVertexHandles = true;
hs.InstanceCount = tcs_prog_data->instances - 1;
hs.VertexURBEntryReadLength = 0;
hs.VertexURBEntryReadOffset = 0;
hs.DispatchGRFStartRegisterForURBData =
tcs_prog_data->base.base.dispatch_grf_start_reg & 0x1f;
#if GFX_VER >= 12
hs.DispatchGRFStartRegisterForURBData5 =
tcs_prog_data->base.base.dispatch_grf_start_reg >> 5;
#endif
#if GFX_VERx10 >= 125
hs.ScratchSpaceBuffer =
get_scratch_surf(&pipeline->base, MESA_SHADER_TESS_CTRL, tcs_bin);
#else
hs.PerThreadScratchSpace = get_scratch_space(tcs_bin);
hs.ScratchSpaceBasePointer =
get_scratch_address(&pipeline->base, MESA_SHADER_TESS_CTRL, tcs_bin);
#endif
#if GFX_VER == 12
/* Patch Count threshold specifies the maximum number of patches that
* will be accumulated before a thread dispatch is forced.
*/
hs.PatchCountThreshold = tcs_prog_data->patch_count_threshold;
#endif
hs.DispatchMode = tcs_prog_data->base.dispatch_mode;
hs.IncludePrimitiveID = tcs_prog_data->include_primitive_id;
}
anv_batch_emit(&pipeline->base.batch, GENX(3DSTATE_DS), ds) {
ds.Enable = true;
ds.StatisticsEnable = true;
ds.KernelStartPointer = tes_bin->kernel.offset;
/* Wa_1606682166 */
ds.SamplerCount = GFX_VER == 11 ? 0 : get_sampler_count(tes_bin);
ds.BindingTableEntryCount = tes_bin->bind_map.surface_count;
ds.MaximumNumberofThreads = devinfo->max_tes_threads - 1;
ds.ComputeWCoordinateEnable =
tes_prog_data->domain == BRW_TESS_DOMAIN_TRI;
ds.PatchURBEntryReadLength = tes_prog_data->base.urb_read_length;
ds.PatchURBEntryReadOffset = 0;
ds.DispatchGRFStartRegisterForURBData =
tes_prog_data->base.base.dispatch_grf_start_reg;
#if GFX_VER < 11
ds.DispatchMode =
tes_prog_data->base.dispatch_mode == DISPATCH_MODE_SIMD8 ?
DISPATCH_MODE_SIMD8_SINGLE_PATCH :
DISPATCH_MODE_SIMD4X2;
#else
assert(tes_prog_data->base.dispatch_mode == DISPATCH_MODE_SIMD8);
ds.DispatchMode = DISPATCH_MODE_SIMD8_SINGLE_PATCH;
#endif
ds.UserClipDistanceClipTestEnableBitmask =
tes_prog_data->base.clip_distance_mask;
ds.UserClipDistanceCullTestEnableBitmask =
tes_prog_data->base.cull_distance_mask;
#if GFX_VER >= 12
ds.PrimitiveIDNotRequired = !tes_prog_data->include_primitive_id;
#endif
#if GFX_VERx10 >= 125
ds.ScratchSpaceBuffer =
get_scratch_surf(&pipeline->base, MESA_SHADER_TESS_EVAL, tes_bin);
#else
ds.PerThreadScratchSpace = get_scratch_space(tes_bin);
ds.ScratchSpaceBasePointer =
get_scratch_address(&pipeline->base, MESA_SHADER_TESS_EVAL, tes_bin);
#endif
}
}
static void
emit_3dstate_gs(struct anv_graphics_pipeline *pipeline)
{
const struct intel_device_info *devinfo = pipeline->base.device->info;
const struct anv_shader_bin *gs_bin =
pipeline->shaders[MESA_SHADER_GEOMETRY];
if (!anv_pipeline_has_stage(pipeline, MESA_SHADER_GEOMETRY)) {
anv_batch_emit(&pipeline->base.batch, GENX(3DSTATE_GS), gs);
return;
}
const struct brw_gs_prog_data *gs_prog_data = get_gs_prog_data(pipeline);
anv_batch_emit(&pipeline->base.batch, GENX(3DSTATE_GS), gs) {
gs.Enable = true;
gs.StatisticsEnable = true;
gs.KernelStartPointer = gs_bin->kernel.offset;
gs.DispatchMode = gs_prog_data->base.dispatch_mode;
gs.SingleProgramFlow = false;
gs.VectorMaskEnable = false;
/* Wa_1606682166 */
gs.SamplerCount = GFX_VER == 11 ? 0 : get_sampler_count(gs_bin);
gs.BindingTableEntryCount = gs_bin->bind_map.surface_count;
gs.IncludeVertexHandles = gs_prog_data->base.include_vue_handles;
gs.IncludePrimitiveID = gs_prog_data->include_primitive_id;
gs.MaximumNumberofThreads = devinfo->max_gs_threads - 1;
gs.OutputVertexSize = gs_prog_data->output_vertex_size_hwords * 2 - 1;
gs.OutputTopology = gs_prog_data->output_topology;
gs.ControlDataFormat = gs_prog_data->control_data_format;
gs.ControlDataHeaderSize = gs_prog_data->control_data_header_size_hwords;
gs.InstanceControl = MAX2(gs_prog_data->invocations, 1) - 1;
gs.ReorderMode = TRAILING;
gs.ExpectedVertexCount = gs_prog_data->vertices_in;
gs.StaticOutput = gs_prog_data->static_vertex_count >= 0;
gs.StaticOutputVertexCount = gs_prog_data->static_vertex_count >= 0 ?
gs_prog_data->static_vertex_count : 0;
gs.VertexURBEntryReadOffset = 0;
gs.VertexURBEntryReadLength = gs_prog_data->base.urb_read_length;
gs.DispatchGRFStartRegisterForURBData =
gs_prog_data->base.base.dispatch_grf_start_reg;
gs.UserClipDistanceClipTestEnableBitmask =
gs_prog_data->base.clip_distance_mask;
gs.UserClipDistanceCullTestEnableBitmask =
gs_prog_data->base.cull_distance_mask;
#if GFX_VERx10 >= 125
gs.ScratchSpaceBuffer =
get_scratch_surf(&pipeline->base, MESA_SHADER_GEOMETRY, gs_bin);
#else
gs.PerThreadScratchSpace = get_scratch_space(gs_bin);
gs.ScratchSpaceBasePointer =
get_scratch_address(&pipeline->base, MESA_SHADER_GEOMETRY, gs_bin);
#endif
}
}
static void
emit_3dstate_wm(struct anv_graphics_pipeline *pipeline,
const struct vk_input_assembly_state *ia,
const struct vk_rasterization_state *rs,
const struct vk_multisample_state *ms,
const struct vk_color_blend_state *cb,
const struct vk_render_pass_state *rp)
{
const struct brw_wm_prog_data *wm_prog_data = get_wm_prog_data(pipeline);
struct GENX(3DSTATE_WM) wm = {
GENX(3DSTATE_WM_header),
};
wm.StatisticsEnable = true;
wm.LineEndCapAntialiasingRegionWidth = _05pixels;
wm.LineAntialiasingRegionWidth = _10pixels;
wm.PointRasterizationRule = RASTRULE_UPPER_LEFT;
if (anv_pipeline_has_stage(pipeline, MESA_SHADER_FRAGMENT)) {
if (wm_prog_data->early_fragment_tests) {
wm.EarlyDepthStencilControl = EDSC_PREPS;
} else if (wm_prog_data->has_side_effects) {
wm.EarlyDepthStencilControl = EDSC_PSEXEC;
} else {
wm.EarlyDepthStencilControl = EDSC_NORMAL;
}
/* Gen8 hardware tries to compute ThreadDispatchEnable for us but
* doesn't take into account KillPixels when no depth or stencil
* writes are enabled. In order for occlusion queries to work
* correctly with no attachments, we need to force-enable PS thread
* dispatch.
*
* The BDW docs are pretty clear that that this bit isn't validated
* and probably shouldn't be used in production:
*
* "This must always be set to Normal. This field should not be
* tested for functional validation."
*
* Unfortunately, however, the other mechanism we have for doing this
* is 3DSTATE_PS_EXTRA::PixelShaderHasUAV which causes hangs on BDW.
* Given two bad options, we choose the one which works.
*/
pipeline->force_fragment_thread_dispatch =
wm_prog_data->has_side_effects ||
wm_prog_data->uses_kill;
wm.BarycentricInterpolationMode =
wm_prog_data->barycentric_interp_modes;
}
GENX(3DSTATE_WM_pack)(NULL, pipeline->gfx8.wm, &wm);
}
static void
emit_3dstate_ps(struct anv_graphics_pipeline *pipeline,
const struct vk_multisample_state *ms,
const struct vk_color_blend_state *cb)
{
UNUSED const struct intel_device_info *devinfo =
pipeline->base.device->info;
const struct anv_shader_bin *fs_bin =
pipeline->shaders[MESA_SHADER_FRAGMENT];
if (!anv_pipeline_has_stage(pipeline, MESA_SHADER_FRAGMENT)) {
anv_batch_emit(&pipeline->base.batch, GENX(3DSTATE_PS), ps) {
}
return;
}
const struct brw_wm_prog_data *wm_prog_data = get_wm_prog_data(pipeline);
anv_batch_emit(&pipeline->base.batch, GENX(3DSTATE_PS), ps) {
brw_fs_get_dispatch_enables(devinfo, wm_prog_data,
ms != NULL ? ms->rasterization_samples : 1,
&ps._8PixelDispatchEnable,
&ps._16PixelDispatchEnable,
&ps._32PixelDispatchEnable);
ps.KernelStartPointer0 = fs_bin->kernel.offset +
brw_wm_prog_data_prog_offset(wm_prog_data, ps, 0);
ps.KernelStartPointer1 = fs_bin->kernel.offset +
brw_wm_prog_data_prog_offset(wm_prog_data, ps, 1);
ps.KernelStartPointer2 = fs_bin->kernel.offset +
brw_wm_prog_data_prog_offset(wm_prog_data, ps, 2);
ps.SingleProgramFlow = false;
ps.VectorMaskEnable = wm_prog_data->uses_vmask;
/* Wa_1606682166 */
ps.SamplerCount = GFX_VER == 11 ? 0 : get_sampler_count(fs_bin);
ps.BindingTableEntryCount = fs_bin->bind_map.surface_count;
ps.PushConstantEnable = wm_prog_data->base.nr_params > 0 ||
wm_prog_data->base.ubo_ranges[0].length;
ps.PositionXYOffsetSelect = wm_prog_data->uses_pos_offset ?
POSOFFSET_SAMPLE: POSOFFSET_NONE;
ps.MaximumNumberofThreadsPerPSD = devinfo->max_threads_per_psd - 1;
ps.DispatchGRFStartRegisterForConstantSetupData0 =
brw_wm_prog_data_dispatch_grf_start_reg(wm_prog_data, ps, 0);
ps.DispatchGRFStartRegisterForConstantSetupData1 =
brw_wm_prog_data_dispatch_grf_start_reg(wm_prog_data, ps, 1);
ps.DispatchGRFStartRegisterForConstantSetupData2 =
brw_wm_prog_data_dispatch_grf_start_reg(wm_prog_data, ps, 2);
#if GFX_VERx10 >= 125
ps.ScratchSpaceBuffer =
get_scratch_surf(&pipeline->base, MESA_SHADER_FRAGMENT, fs_bin);
#else
ps.PerThreadScratchSpace = get_scratch_space(fs_bin);
ps.ScratchSpaceBasePointer =
get_scratch_address(&pipeline->base, MESA_SHADER_FRAGMENT, fs_bin);
#endif
}
}
static void
emit_3dstate_ps_extra(struct anv_graphics_pipeline *pipeline,
const struct vk_rasterization_state *rs,
const struct vk_render_pass_state *rp)
{
const struct brw_wm_prog_data *wm_prog_data = get_wm_prog_data(pipeline);
if (!anv_pipeline_has_stage(pipeline, MESA_SHADER_FRAGMENT)) {
anv_batch_emit(&pipeline->base.batch, GENX(3DSTATE_PS_EXTRA), ps);
return;
}
anv_batch_emit(&pipeline->base.batch, GENX(3DSTATE_PS_EXTRA), ps) {
ps.PixelShaderValid = true;
ps.AttributeEnable = wm_prog_data->num_varying_inputs > 0;
ps.oMaskPresenttoRenderTarget = wm_prog_data->uses_omask;
ps.PixelShaderIsPerSample = wm_prog_data->persample_dispatch;
ps.PixelShaderComputedDepthMode = wm_prog_data->computed_depth_mode;
ps.PixelShaderUsesSourceDepth = wm_prog_data->uses_src_depth;
ps.PixelShaderUsesSourceW = wm_prog_data->uses_src_w;
/* If the subpass has a depth or stencil self-dependency, then we need
* to force the hardware to do the depth/stencil write *after* fragment
* shader execution. Otherwise, the writes may hit memory before we get
* around to fetching from the input attachment and we may get the depth
* or stencil value from the current draw rather than the previous one.
*/
ps.PixelShaderKillsPixel = rp->depth_self_dependency ||
rp->stencil_self_dependency ||
wm_prog_data->uses_kill;
ps.PixelShaderComputesStencil = wm_prog_data->computed_stencil;
ps.PixelShaderPullsBary = wm_prog_data->pulls_bary;
ps.InputCoverageMaskState = ICMS_NONE;
assert(!wm_prog_data->inner_coverage); /* Not available in SPIR-V */
if (!wm_prog_data->uses_sample_mask)
ps.InputCoverageMaskState = ICMS_NONE;
else if (wm_prog_data->per_coarse_pixel_dispatch)
ps.InputCoverageMaskState = ICMS_NORMAL;
else if (wm_prog_data->post_depth_coverage)
ps.InputCoverageMaskState = ICMS_DEPTH_COVERAGE;
else
ps.InputCoverageMaskState = ICMS_NORMAL;
#if GFX_VER >= 11
ps.PixelShaderRequiresSourceDepthandorWPlaneCoefficients =
wm_prog_data->uses_depth_w_coefficients;
ps.PixelShaderIsPerCoarsePixel = wm_prog_data->per_coarse_pixel_dispatch;
#endif
#if GFX_VERx10 >= 125
/* TODO: We should only require this when the last geometry shader uses
* a fragment shading rate that is not constant.
*/
ps.EnablePSDependencyOnCPsizeChange = wm_prog_data->per_coarse_pixel_dispatch;
#endif
}
}
static void
emit_3dstate_vf_statistics(struct anv_graphics_pipeline *pipeline)
{
anv_batch_emit(&pipeline->base.batch, GENX(3DSTATE_VF_STATISTICS), vfs) {
vfs.StatisticsEnable = true;
}
}
static void
compute_kill_pixel(struct anv_graphics_pipeline *pipeline,
const struct vk_multisample_state *ms,
const struct vk_render_pass_state *rp)
{
if (!anv_pipeline_has_stage(pipeline, MESA_SHADER_FRAGMENT)) {
pipeline->kill_pixel = false;
return;
}
const struct brw_wm_prog_data *wm_prog_data = get_wm_prog_data(pipeline);
/* This computes the KillPixel portion of the computation for whether or
* not we want to enable the PMA fix on gfx8 or gfx9. It's given by this
* chunk of the giant formula:
*
* (3DSTATE_PS_EXTRA::PixelShaderKillsPixels ||
* 3DSTATE_PS_EXTRA::oMask Present to RenderTarget ||
* 3DSTATE_PS_BLEND::AlphaToCoverageEnable ||
* 3DSTATE_PS_BLEND::AlphaTestEnable ||
* 3DSTATE_WM_CHROMAKEY::ChromaKeyKillEnable)
*
* 3DSTATE_WM_CHROMAKEY::ChromaKeyKillEnable is always false and so is
* 3DSTATE_PS_BLEND::AlphaTestEnable since Vulkan doesn't have a concept
* of an alpha test.
*/
pipeline->kill_pixel =
rp->depth_self_dependency ||
rp->stencil_self_dependency ||
wm_prog_data->uses_kill ||
wm_prog_data->uses_omask ||
(ms && ms->alpha_to_coverage_enable);
}
#if GFX_VER == 12
static void
emit_3dstate_primitive_replication(struct anv_graphics_pipeline *pipeline,
const struct vk_render_pass_state *rp)
{
if (anv_pipeline_is_mesh(pipeline)) {
anv_batch_emit(&pipeline->base.batch, GENX(3DSTATE_PRIMITIVE_REPLICATION), pr);
return;
}
const int replication_count =
anv_pipeline_get_last_vue_prog_data(pipeline)->vue_map.num_pos_slots;
assert(replication_count >= 1);
if (replication_count == 1) {
anv_batch_emit(&pipeline->base.batch, GENX(3DSTATE_PRIMITIVE_REPLICATION), pr);
return;
}
assert(replication_count == util_bitcount(rp->view_mask));
assert(replication_count <= MAX_VIEWS_FOR_PRIMITIVE_REPLICATION);
anv_batch_emit(&pipeline->base.batch, GENX(3DSTATE_PRIMITIVE_REPLICATION), pr) {
pr.ReplicaMask = (1 << replication_count) - 1;
pr.ReplicationCount = replication_count - 1;
int i = 0;
u_foreach_bit(view_index, rp->view_mask) {
pr.RTAIOffset[i] = view_index;
i++;
}
}
}
#endif
#if GFX_VERx10 >= 125
static void
emit_task_state(struct anv_graphics_pipeline *pipeline)
{
assert(anv_pipeline_is_mesh(pipeline));
if (!anv_pipeline_has_stage(pipeline, MESA_SHADER_TASK)) {
anv_batch_emit(&pipeline->base.batch, GENX(3DSTATE_TASK_CONTROL), zero);
return;
}
const struct anv_shader_bin *task_bin = pipeline->shaders[MESA_SHADER_TASK];
anv_batch_emit(&pipeline->base.batch, GENX(3DSTATE_TASK_CONTROL), tc) {
tc.TaskShaderEnable = true;
tc.ScratchSpaceBuffer =
get_scratch_surf(&pipeline->base, MESA_SHADER_TASK, task_bin);
tc.MaximumNumberofThreadGroups = 511;
}
const struct intel_device_info *devinfo = pipeline->base.device->info;
const struct brw_task_prog_data *task_prog_data = get_task_prog_data(pipeline);
const struct brw_cs_dispatch_info task_dispatch =
brw_cs_get_dispatch_info(devinfo, &task_prog_data->base, NULL);
anv_batch_emit(&pipeline->base.batch, GENX(3DSTATE_TASK_SHADER), task) {
task.KernelStartPointer = task_bin->kernel.offset;
task.SIMDSize = task_dispatch.simd_size / 16;
task.MessageSIMD = task.SIMDSize;
task.NumberofThreadsinGPGPUThreadGroup = task_dispatch.threads;
task.ExecutionMask = task_dispatch.right_mask;
task.LocalXMaximum = task_dispatch.group_size - 1;
task.EmitLocalIDX = true;
task.NumberofBarriers = task_prog_data->base.uses_barrier;
task.SharedLocalMemorySize =
encode_slm_size(GFX_VER, task_prog_data->base.base.total_shared);
/*
* 3DSTATE_TASK_SHADER_DATA.InlineData[0:1] will be used for an address
* of a buffer with push constants and descriptor set table and
* InlineData[2:7] will be used for first few push constants.
*/
task.EmitInlineParameter = true;
task.XP0Required = task_prog_data->uses_drawid;
}
/* Recommended values from "Task and Mesh Distribution Programming". */
anv_batch_emit(&pipeline->base.batch, GENX(3DSTATE_TASK_REDISTRIB), redistrib) {
redistrib.LocalBOTAccumulatorThreshold = MULTIPLIER_1;
redistrib.SmallTaskThreshold = 1; /* 2^N */
redistrib.TargetMeshBatchSize = devinfo->num_slices > 2 ? 3 : 5; /* 2^N */
redistrib.TaskRedistributionLevel = TASKREDISTRIB_BOM;
/* TODO: We have an unknown issue with Task Payload when task redistribution
* is enabled. Disable it for now.
* See https://gitlab.freedesktop.org/mesa/mesa/-/issues/7141
*/
redistrib.TaskRedistributionMode = TASKREDISTRIB_OFF;
}
}
static void
emit_mesh_state(struct anv_graphics_pipeline *pipeline)
{
assert(anv_pipeline_is_mesh(pipeline));
const struct anv_shader_bin *mesh_bin = pipeline->shaders[MESA_SHADER_MESH];
anv_batch_emit(&pipeline->base.batch, GENX(3DSTATE_MESH_CONTROL), mc) {
mc.MeshShaderEnable = true;
mc.ScratchSpaceBuffer =
get_scratch_surf(&pipeline->base, MESA_SHADER_MESH, mesh_bin);
mc.MaximumNumberofThreadGroups = 511;
}
const struct intel_device_info *devinfo = pipeline->base.device->info;
const struct brw_mesh_prog_data *mesh_prog_data = get_mesh_prog_data(pipeline);
const struct brw_cs_dispatch_info mesh_dispatch =
brw_cs_get_dispatch_info(devinfo, &mesh_prog_data->base, NULL);
const unsigned output_topology =
mesh_prog_data->primitive_type == SHADER_PRIM_POINTS ? OUTPUT_POINT :
mesh_prog_data->primitive_type == SHADER_PRIM_LINES ? OUTPUT_LINE :
OUTPUT_TRI;
uint32_t index_format;
switch (mesh_prog_data->index_format) {
case BRW_INDEX_FORMAT_U32:
index_format = INDEX_U32;
break;
default:
unreachable("invalid index format");
}
anv_batch_emit(&pipeline->base.batch, GENX(3DSTATE_MESH_SHADER), mesh) {
mesh.KernelStartPointer = mesh_bin->kernel.offset;
mesh.SIMDSize = mesh_dispatch.simd_size / 16;
mesh.MessageSIMD = mesh.SIMDSize;
mesh.NumberofThreadsinGPGPUThreadGroup = mesh_dispatch.threads;
mesh.ExecutionMask = mesh_dispatch.right_mask;
mesh.LocalXMaximum = mesh_dispatch.group_size - 1;
mesh.EmitLocalIDX = true;
mesh.MaximumPrimitiveCount = mesh_prog_data->map.max_primitives - 1;
mesh.OutputTopology = output_topology;
mesh.PerVertexDataPitch = mesh_prog_data->map.per_vertex_pitch_dw / 8;
mesh.PerPrimitiveDataPresent = mesh_prog_data->map.per_primitive_pitch_dw > 0;
mesh.PerPrimitiveDataPitch = mesh_prog_data->map.per_primitive_pitch_dw / 8;
mesh.IndexFormat = index_format;
mesh.NumberofBarriers = mesh_prog_data->base.uses_barrier;
mesh.SharedLocalMemorySize =
encode_slm_size(GFX_VER, mesh_prog_data->base.base.total_shared);
/*
* 3DSTATE_MESH_SHADER_DATA.InlineData[0:1] will be used for an address
* of a buffer with push constants and descriptor set table and
* InlineData[2:7] will be used for first few push constants.
*/
mesh.EmitInlineParameter = true;
mesh.XP0Required = mesh_prog_data->uses_drawid;
}
/* Recommended values from "Task and Mesh Distribution Programming". */
anv_batch_emit(&pipeline->base.batch, GENX(3DSTATE_MESH_DISTRIB), distrib) {
distrib.DistributionMode = MESH_RR_FREE;
distrib.TaskDistributionBatchSize = devinfo->num_slices > 2 ? 4 : 9; /* 2^N thread groups */
distrib.MeshDistributionBatchSize = devinfo->num_slices > 2 ? 3 : 3; /* 2^N thread groups */
}
}
#endif
void
genX(graphics_pipeline_emit)(struct anv_graphics_pipeline *pipeline,
const struct vk_graphics_pipeline_state *state)
{
enum intel_urb_deref_block_size urb_deref_block_size;
emit_urb_setup(pipeline, &urb_deref_block_size);
assert(state->rs != NULL);
emit_rs_state(pipeline, state->ia, state->rs, state->ms, state->rp,
urb_deref_block_size);
emit_ms_state(pipeline, state->ms);
compute_kill_pixel(pipeline, state->ms, state->rp);
emit_3dstate_clip(pipeline, state->ia, state->vp, state->rs);
#if GFX_VER == 12
emit_3dstate_primitive_replication(pipeline, state->rp);
#endif
if (anv_pipeline_is_primitive(pipeline)) {
emit_vertex_input(pipeline, state->vi);
emit_3dstate_vs(pipeline);
emit_3dstate_hs_ds(pipeline, state->ts);
emit_3dstate_gs(pipeline);
emit_3dstate_vf_statistics(pipeline);
emit_3dstate_streamout(pipeline, state->rs);
#if GFX_VERx10 >= 125
const struct anv_device *device = pipeline->base.device;
/* Disable Mesh. */
if (device->physical->vk.supported_extensions.NV_mesh_shader ||
device->physical->vk.supported_extensions.EXT_mesh_shader) {
anv_batch_emit(&pipeline->base.batch, GENX(3DSTATE_MESH_CONTROL), zero);
anv_batch_emit(&pipeline->base.batch, GENX(3DSTATE_TASK_CONTROL), zero);
}
#endif
} else {
assert(anv_pipeline_is_mesh(pipeline));
/* BSpec 46303 forbids both 3DSTATE_MESH_CONTROL.MeshShaderEnable
* and 3DSTATE_STREAMOUT.SOFunctionEnable to be 1.
*/
anv_batch_emit(&pipeline->base.batch, GENX(3DSTATE_STREAMOUT), so) {}
#if GFX_VERx10 >= 125
emit_task_state(pipeline);
emit_mesh_state(pipeline);
#endif
}
emit_3dstate_sbe(pipeline);
emit_3dstate_wm(pipeline, state->ia, state->rs,
state->ms, state->cb, state->rp);
emit_3dstate_ps(pipeline, state->ms, state->cb);
emit_3dstate_ps_extra(pipeline, state->rs, state->rp);
}
#if GFX_VERx10 >= 125
void
genX(compute_pipeline_emit)(struct anv_compute_pipeline *pipeline)
{
struct anv_device *device = pipeline->base.device;
const struct brw_cs_prog_data *cs_prog_data = get_cs_prog_data(pipeline);
anv_pipeline_setup_l3_config(&pipeline->base, cs_prog_data->base.total_shared > 0);
const UNUSED struct anv_shader_bin *cs_bin = pipeline->cs;
const struct intel_device_info *devinfo = device->info;
anv_batch_emit(&pipeline->base.batch, GENX(CFE_STATE), cfe) {
cfe.MaximumNumberofThreads =
devinfo->max_cs_threads * devinfo->subslice_total;
cfe.ScratchSpaceBuffer =
get_scratch_surf(&pipeline->base, MESA_SHADER_COMPUTE, cs_bin);
}
}
#else /* #if GFX_VERx10 >= 125 */
void
genX(compute_pipeline_emit)(struct anv_compute_pipeline *pipeline)
{
struct anv_device *device = pipeline->base.device;
const struct intel_device_info *devinfo = device->info;
const struct brw_cs_prog_data *cs_prog_data = get_cs_prog_data(pipeline);
anv_pipeline_setup_l3_config(&pipeline->base, cs_prog_data->base.total_shared > 0);
const struct brw_cs_dispatch_info dispatch =
brw_cs_get_dispatch_info(devinfo, cs_prog_data, NULL);
const uint32_t vfe_curbe_allocation =
ALIGN(cs_prog_data->push.per_thread.regs * dispatch.threads +
cs_prog_data->push.cross_thread.regs, 2);
const struct anv_shader_bin *cs_bin = pipeline->cs;
anv_batch_emit(&pipeline->base.batch, GENX(MEDIA_VFE_STATE), vfe) {
vfe.StackSize = 0;
vfe.MaximumNumberofThreads =
devinfo->max_cs_threads * devinfo->subslice_total - 1;
vfe.NumberofURBEntries = 2;
#if GFX_VER < 11
vfe.ResetGatewayTimer = true;
#endif
vfe.URBEntryAllocationSize = 2;
vfe.CURBEAllocationSize = vfe_curbe_allocation;
if (cs_bin->prog_data->total_scratch) {
/* Broadwell's Per Thread Scratch Space is in the range [0, 11]
* where 0 = 1k, 1 = 2k, 2 = 4k, ..., 11 = 2M.
*/
vfe.PerThreadScratchSpace =
ffs(cs_bin->prog_data->total_scratch) - 11;
vfe.ScratchSpaceBasePointer =
get_scratch_address(&pipeline->base, MESA_SHADER_COMPUTE, cs_bin);
}
}
struct GENX(INTERFACE_DESCRIPTOR_DATA) desc = {
.KernelStartPointer =
cs_bin->kernel.offset +
brw_cs_prog_data_prog_offset(cs_prog_data, dispatch.simd_size),
/* Wa_1606682166 */
.SamplerCount = GFX_VER == 11 ? 0 : get_sampler_count(cs_bin),
/* We add 1 because the CS indirect parameters buffer isn't accounted
* for in bind_map.surface_count.
*
* Typically set to 0 to avoid prefetching on every thread dispatch.
*/
.BindingTableEntryCount = devinfo->verx10 == 125 ?
0 : 1 + MIN2(pipeline->cs->bind_map.surface_count, 30),
.BarrierEnable = cs_prog_data->uses_barrier,
.SharedLocalMemorySize =
encode_slm_size(GFX_VER, cs_prog_data->base.total_shared),
.ConstantURBEntryReadOffset = 0,
.ConstantURBEntryReadLength = cs_prog_data->push.per_thread.regs,
.CrossThreadConstantDataReadLength =
cs_prog_data->push.cross_thread.regs,
#if GFX_VER >= 12
/* TODO: Check if we are missing workarounds and enable mid-thread
* preemption.
*
* We still have issues with mid-thread preemption (it was already
* disabled by the kernel on gfx11, due to missing workarounds). It's
* possible that we are just missing some workarounds, and could enable
* it later, but for now let's disable it to fix a GPU in compute in Car
* Chase (and possibly more).
*/
.ThreadPreemptionDisable = true,
#endif
.NumberofThreadsinGPGPUThreadGroup = dispatch.threads,
};
GENX(INTERFACE_DESCRIPTOR_DATA_pack)(NULL,
pipeline->interface_descriptor_data,
&desc);
}
#endif /* #if GFX_VERx10 >= 125 */
#if GFX_VERx10 >= 125
void
genX(ray_tracing_pipeline_emit)(struct anv_ray_tracing_pipeline *pipeline)
{
for (uint32_t i = 0; i < pipeline->group_count; i++) {
struct anv_rt_shader_group *group = &pipeline->groups[i];
switch (group->type) {
case VK_RAY_TRACING_SHADER_GROUP_TYPE_GENERAL_KHR: {
struct GFX_RT_GENERAL_SBT_HANDLE sh = {};
sh.General = anv_shader_bin_get_bsr(group->general, 32);
GFX_RT_GENERAL_SBT_HANDLE_pack(NULL, group->handle, &sh);
break;
}
case VK_RAY_TRACING_SHADER_GROUP_TYPE_TRIANGLES_HIT_GROUP_KHR: {
struct GFX_RT_TRIANGLES_SBT_HANDLE sh = {};
if (group->closest_hit)
sh.ClosestHit = anv_shader_bin_get_bsr(group->closest_hit, 32);
if (group->any_hit)
sh.AnyHit = anv_shader_bin_get_bsr(group->any_hit, 24);
GFX_RT_TRIANGLES_SBT_HANDLE_pack(NULL, group->handle, &sh);
break;
}
case VK_RAY_TRACING_SHADER_GROUP_TYPE_PROCEDURAL_HIT_GROUP_KHR: {
struct GFX_RT_PROCEDURAL_SBT_HANDLE sh = {};
if (group->closest_hit)
sh.ClosestHit = anv_shader_bin_get_bsr(group->closest_hit, 32);
sh.Intersection = anv_shader_bin_get_bsr(group->intersection, 24);
GFX_RT_PROCEDURAL_SBT_HANDLE_pack(NULL, group->handle, &sh);
break;
}
default:
unreachable("Invalid shader group type");
}
}
}
#else
void
genX(ray_tracing_pipeline_emit)(struct anv_ray_tracing_pipeline *pipeline)
{
unreachable("Ray tracing not supported");
}
#endif /* GFX_VERx10 >= 125 */
|
72e370c0528d883005879d4c81470fe7c1c8feaf
|
aa3befea459382dc5c01c925653d54f435b3fb0f
|
/arch/arm/src/tiva/common/tiva_hciuart.c
|
51c7eb3a7a6d4f96f05b1eed1cb079fb6032aca1
|
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"MIT-open-group",
"BSD-3-Clause",
"HPND-sell-variant",
"BSD-4-Clause-UC",
"LicenseRef-scancode-warranty-disclaimer",
"MIT-0",
"LicenseRef-scancode-bsd-atmel",
"LicenseRef-scancode-gary-s-brown",
"LicenseRef-scancode-proprietary-license",
"SunPro",
"MIT",
"LicenseRef-scancode-public-domain-disclaimer",
"LicenseRef-scancode-other-permissive",
"HPND",
"ISC",
"Apache-2.0",
"LicenseRef-scancode-public-domain",
"BSD-2-Clause",
"GPL-1.0-or-later",
"CC-BY-2.0",
"CC-BY-4.0"
] |
permissive
|
apache/nuttx
|
14519a7bff4a87935d94fb8fb2b19edb501c7cec
|
606b6d9310fb25c7d92c6f95bf61737e3c79fa0f
|
refs/heads/master
| 2023-08-25T06:55:45.822534
| 2023-08-23T16:03:31
| 2023-08-24T21:25:47
| 228,103,273
| 407
| 241
|
Apache-2.0
| 2023-09-14T18:26:05
| 2019-12-14T23:27:55
|
C
|
UTF-8
|
C
| false
| false
| 54,443
|
c
|
tiva_hciuart.c
|
/****************************************************************************
* arch/arm/src/tiva/common/tiva_hciuart.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <stdint.h>
#include <stdbool.h>
#include <unistd.h>
#include <string.h>
#include <assert.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/spinlock.h>
#include <nuttx/semaphore.h>
#include <nuttx/wireless/bluetooth/bt_uart.h>
#include <nuttx/power/pm.h>
#include "arm_internal.h"
#include "chip.h"
#include "tiva_hciuart.h"
#include "tiva_enablepwr.h"
#include "tiva_enableclks.h"
#include "tiva_periphrdy.h"
#include "tiva_gpio.h"
#include "hardware/tiva_pinmap.h"
#include <arch/board/board.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* All interrupts */
#define HCIUART_ALLINTS (UART_IM_TXIM | UART_IM_RXIM | UART_IM_RTIM)
#define HCIUART_RXHANDLED (1 << 0)
#define HCIUART_TXHANDLED (1 << 1)
/* Power management definitions */
#if defined(CONFIG_PM) && !defined(CONFIG_TIVA_PM_SERIAL_ACTIVITY)
# define CONFIG_TIVA_PM_SERIAL_ACTIVITY 10
#endif
/****************************************************************************
* Private Types
****************************************************************************/
/* This structure is the variable state of the HCI UART */
struct hciuart_state_s
{
/* Registered Rx callback */
btuart_rxcallback_t callback; /* Rx callback function */
void *arg; /* Rx callback argument */
/* Rx/Tx circular buffer management */
sem_t rxwait; /* Supports wait for more Rx data */
sem_t txwait; /* Supports wait for space in Tx buffer */
uint32_t baud; /* Current BAUD selection */
volatile uint16_t rxhead; /* Head and tail index of the Rx buffer */
uint16_t rxtail;
uint16_t txhead; /* Head and tail index of the Tx buffer */
volatile uint16_t txtail;
volatile bool rxwaiting; /* A thread is waiting for more Rx data */
volatile bool txwaiting; /* A thread is waiting for space in the Tx buffer */
uint32_t im; /* Saved IM value */
};
/* This structure is the constant configuration of the HCI UART */
struct hciuart_config_s
{
struct btuart_lowerhalf_s lower; /* Generic HCI-UART lower half */
struct hciuart_state_s *state; /* Reference to variable state */
uint8_t *rxbuffer; /* Rx buffer start */
uint8_t *txbuffer; /* Tx buffer start */
uint16_t rxbufsize; /* Size of the Rx buffer */
uint16_t txbufsize; /* Size of the tx buffer */
uint8_t irq; /* IRQ associated with this UART */
uint32_t baud; /* Configured baud */
uint32_t id; /* UART identifier */
uint32_t uartbase; /* Base address of UART registers */
uint32_t tx_gpio; /* UART TX GPIO pin configuration */
uint32_t rx_gpio; /* UART RX GPIO pin configuration */
uint32_t cts_gpio; /* UART CTS GPIO pin configuration */
uint32_t rts_gpio; /* UART RTS GPIO pin configuration */
uint32_t shutd_gpio; /* */
uint8_t parity; /* 0=none, 1=odd, 2=even */
uint8_t bits; /* Number of bits (7 or 8) */
bool stopbits2; /* true: Configure 2 stop bits instead of 1 */
};
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
static inline uint32_t hciuart_getreg32(
const struct hciuart_config_s *config, unsigned int offset);
static inline void hciuart_putreg32(const struct hciuart_config_s *config,
unsigned int offset, uint32_t value);
static void hciuart_enableints(const struct hciuart_config_s *config,
uint32_t intset);
static void hciuart_disableints(const struct hciuart_config_s *config,
uint32_t intset);
static bool hciuart_isenabled(const struct hciuart_config_s *config,
uint32_t intset);
static inline bool hciuart_rxenabled(const struct hciuart_config_s *config);
static uint16_t hciuart_rxinuse(const struct hciuart_config_s *config);
static ssize_t hciuart_copytorxbuffer(const struct hciuart_config_s *config);
static ssize_t hciuart_copyfromrxbuffer(
const struct hciuart_config_s *config, uint8_t *dest,
size_t destlen);
static ssize_t hciuart_copytotxfifo(const struct hciuart_config_s *config);
static void hciuart_line_configure(const struct hciuart_config_s *config);
static int hciuart_configure(const struct hciuart_config_s *config);
static int hciuart_interrupt(int irq, void *context, void *arg);
/* HCI-UART Lower-Half Methods */
static void hciuart_rxattach(const struct btuart_lowerhalf_s *lower,
btuart_rxcallback_t callback, void *arg);
static void hciuart_rxenable(const struct btuart_lowerhalf_s *lower,
bool enable);
static int hciuart_setbaud(const struct btuart_lowerhalf_s *lower,
uint32_t baud);
static ssize_t hciuart_read(const struct btuart_lowerhalf_s *lower,
void *buffer, size_t buflen);
static ssize_t hciuart_write(const struct btuart_lowerhalf_s *lower,
const void *buffer, size_t buflen);
static ssize_t hciuart_rxdrain(const struct btuart_lowerhalf_s *lower);
#ifdef CONFIG_PM
static void hciuart_pm_notify(struct pm_callback_s *cb, int dowmin,
enum pm_state_e pmstate);
static int hciuart_pm_prepare(struct pm_callback_s *cb, int domain,
enum pm_state_e pmstate);
#endif
/****************************************************************************
* Private Data
****************************************************************************/
/* This describes the state of the TIVA UART0 port. */
#ifdef CONFIG_TIVA_UART0_HCIUART
/* I/O buffers */
static uint8_t g_uart0_rxbuffer[CONFIG_TIVA_HCIUART0_RXBUFSIZE];
static uint8_t g_uart0_txbuffer[CONFIG_TIVA_HCIUART0_TXBUFSIZE];
/* HCI UART0 variable state information */
static struct hciuart_state_s g_hciuart0_state =
{
.rxwait = SEM_INITIALIZER(0),
.txwait = SEM_INITIALIZER(0),
};
/* HCI UART0 constant configuration information */
static const struct hciuart_config_s g_hciuart0_config =
{
.lower =
{
.rxattach = hciuart_rxattach,
.rxenable = hciuart_rxenable,
.setbaud = hciuart_setbaud,
.read = hciuart_read,
.write = hciuart_write,
.rxdrain = hciuart_rxdrain,
},
.state = &g_hciuart0_state,
.rxbuffer = g_uart0_rxbuffer,
.txbuffer = g_uart0_txbuffer,
.rxbufsize = CONFIG_TIVA_HCIUART0_RXBUFSIZE,
.txbufsize = CONFIG_TIVA_HCIUART0_TXBUFSIZE,
.irq = TIVA_IRQ_UART0,
.baud = CONFIG_TIVA_HCIUART0_BAUD,
.id = 0,
.uartbase = TIVA_UART0_BASE,
.tx_gpio = GPIO_UART0_TX,
.rx_gpio = GPIO_UART0_RX,
.cts_gpio = UART0_GPIO_CTS,
.rts_gpio = UART0_GPIO_RTS,
.shutd_gpio = UART0_GPIO_NSHUTD
};
#endif
/* This describes the state of the TIVA UART1 port. */
#ifdef CONFIG_TIVA_UART1_HCIUART
/* I/O buffers */
static uint8_t g_uart1_rxbuffer[CONFIG_TIVA_HCIUART1_RXBUFSIZE];
static uint8_t g_uart1_txbuffer[CONFIG_TIVA_HCIUART1_TXBUFSIZE];
/* HCI UART1 variable state information */
static struct hciuart_state_s g_hciuart1_state =
{
.rxwait = SEM_INITIALIZER(0),
.txwait = SEM_INITIALIZER(0),
};
/* HCI UART1 constant configuration information */
static const struct hciuart_config_s g_hciuart1_config =
{
.lower =
{
.rxattach = hciuart_rxattach,
.rxenable = hciuart_rxenable,
.setbaud = hciuart_setbaud,
.read = hciuart_read,
.write = hciuart_write,
.rxdrain = hciuart_rxdrain,
},
.state = &g_hciuart1_state,
.rxbuffer = g_uart1_rxbuffer,
.txbuffer = g_uart1_txbuffer,
.rxbufsize = CONFIG_TIVA_HCIUART1_RXBUFSIZE,
.txbufsize = CONFIG_TIVA_HCIUART1_TXBUFSIZE,
.irq = TIVA_IRQ_UART1,
.baud = CONFIG_TIVA_HCIUART1_BAUD,
.id = 1,
.uartbase = TIVA_UART1_BASE,
.tx_gpio = GPIO_UART1_TX,
.rx_gpio = GPIO_UART1_RX,
.cts_gpio = UART1_GPIO_CTS,
.rts_gpio = UART1_GPIO_RTS,
.shutd_gpio = UART1_GPIO_NSHUTD
};
#endif
/* This describes the state of the TIVA UART2 port. */
#ifdef CONFIG_TIVA_UART2_HCIUART
/* I/O buffers */
static uint8_t g_uart2_rxbuffer[CONFIG_TIVA_HCIUART2_RXBUFSIZE];
static uint8_t g_uart2_txbuffer[CONFIG_TIVA_HCIUART2_TXBUFSIZE];
/* HCI UART2 variable state information */
static struct hciuart_state_s g_hciuart2_state =
{
.rxwait = SEM_INITIALIZER(0),
.txwait = SEM_INITIALIZER(0),
};
/* HCI UART2 constant configuration information */
static const struct hciuart_config_s g_hciuart2_config =
{
.lower =
{
.rxattach = hciuart_rxattach,
.rxenable = hciuart_rxenable,
.setbaud = hciuart_setbaud,
.read = hciuart_read,
.write = hciuart_write,
.rxdrain = hciuart_rxdrain,
},
.state = &g_hciuart2_state,
.rxbuffer = g_uart2_rxbuffer,
.txbuffer = g_uart2_txbuffer,
.rxbufsize = CONFIG_TIVA_HCIUART2_RXBUFSIZE,
.txbufsize = CONFIG_TIVA_HCIUART2_TXBUFSIZE,
.irq = TIVA_IRQ_UART2,
.baud = CONFIG_TIVA_HCIUART2_BAUD,
.id = 2,
.uartbase = TIVA_UART2_BASE,
.tx_gpio = GPIO_UART2_TX,
.rx_gpio = GPIO_UART2_RX,
.cts_gpio = UART2_GPIO_CTS,
.rts_gpio = UART2_GPIO_RTS,
.shutd_gpio = UART2_GPIO_NSHUTD
};
#endif
/* This describes the state of the TIVA UART3 port. */
#ifdef CONFIG_TIVA_UART3_HCIUART
/* I/O buffers */
static uint8_t g_uart3_rxbuffer[CONFIG_TIVA_HCIUART3_RXBUFSIZE];
static uint8_t g_uart3_txbuffer[CONFIG_TIVA_HCIUART3_TXBUFSIZE];
/* HCI UART3 variable state information */
static struct hciuart_state_s g_hciuart3_state =
{
.rxwait = SEM_INITIALIZER(0),
.txwait = SEM_INITIALIZER(0),
};
/* HCI UART3 constant configuration information */
static const struct hciuart_config_s g_hciuart3_config =
{
.lower =
{
.rxattach = hciuart_rxattach,
.rxenable = hciuart_rxenable,
.setbaud = hciuart_setbaud,
.read = hciuart_read,
.write = hciuart_write,
.rxdrain = hciuart_rxdrain,
},
.state = &g_hciuart3_state,
.rxbuffer = g_uart3_rxbuffer,
.txbuffer = g_uart3_txbuffer,
.rxbufsize = CONFIG_TIVA_HCIUART3_RXBUFSIZE,
.txbufsize = CONFIG_TIVA_HCIUART3_TXBUFSIZE,
.irq = TIVA_IRQ_UART3,
.baud = CONFIG_TIVA_HCIUART3_BAUD,
.id = 3,
.uartbase = TIVA_UART3_BASE,
.tx_gpio = GPIO_UART3_TX,
.rx_gpio = GPIO_UART3_RX,
.cts_gpio = UART3_GPIO_CTS,
.rts_gpio = UART3_GPIO_RTS,
.shutd_gpio = UART3_GPIO_NSHUTD
};
#endif
/* This describes the state of the TIVA UART4 port. */
#ifdef CONFIG_TIVA_UART4_HCIUART
/* I/O buffers */
static uint8_t g_uart4_rxbuffer[CONFIG_TIVA_HCIUART4_RXBUFSIZE];
static uint8_t g_uart4_txbuffer[CONFIG_TIVA_HCIUART4_TXBUFSIZE];
/* HCI UART4 variable state information */
static struct hciuart_state_s g_hciuart4_state;
{
.rxwait = SEM_INITIALIZER(0),
.txwait = SEM_INITIALIZER(0),
};
/* HCI UART4 constant configuration information */
static const struct hciuart_config_s g_hciuart4_config =
{
.lower =
{
.rxattach = hciuart_rxattach,
.rxenable = hciuart_rxenable,
.setbaud = hciuart_setbaud,
.read = hciuart_read,
.write = hciuart_write,
.rxdrain = hciuart_rxdrain,
},
.state = &g_hciuart4_state,
.rxbuffer = g_uart4_rxbuffer,
.txbuffer = g_uart4_txbuffer,
.rxbufsize = CONFIG_TIVA_HCIUART4_RXBUFSIZE,
.txbufsize = CONFIG_TIVA_HCIUART4_TXBUFSIZE,
.irq = TIVA_IRQ_UART4,
.baud = CONFIG_TIVA_HCIUART4_BAUD,
.id = 4,
.uartbase = TIVA_UART4_BASE,
.tx_gpio = GPIO_UART4_TX,
.rx_gpio = GPIO_UART4_RX,
.cts_gpio = UART4_GPIO_CTS,
.rts_gpio = UART4_GPIO_RTS,
.shutd_gpio = UART4_GPIO_NSHUTD
};
#endif
/* This describes the state of the TIVA UART5 port. */
#ifdef CONFIG_TIVA_UART5_HCIUART
/* I/O buffers */
static uint8_t g_uart5_rxbuffer[CONFIG_TIVA_HCIUART5_RXBUFSIZE];
static uint8_t g_uart5_txbuffer[CONFIG_TIVA_HCIUART5_TXBUFSIZE];
/* HCI UART5 variable state information */
static struct hciuart_state_s g_hciuart5_state =
{
.rxwait = SEM_INITIALIZER(0),
.txwait = SEM_INITIALIZER(0),
};
/* HCI UART5 constant configuration information */
static const struct hciuart_config_s g_hciuart5_config =
{
.lower =
{
.rxattach = hciuart_rxattach,
.rxenable = hciuart_rxenable,
.setbaud = hciuart_setbaud,
.read = hciuart_read,
.write = hciuart_write,
.rxdrain = hciuart_rxdrain,
},
.state = &g_hciuart5_state,
.rxbuffer = g_uart5_rxbuffer,
.txbuffer = g_uart5_txbuffer,
.rxbufsize = CONFIG_TIVA_HCIUART5_RXBUFSIZE,
.txbufsize = CONFIG_TIVA_HCIUART5_TXBUFSIZE,
.irq = TIVA_IRQ_UART5,
.baud = CONFIG_TIVA_HCIUART5_BAUD,
.id = 5,
.uartbase = TIVA_UART5_BASE,
.tx_gpio = GPIO_UART5_TX,
.rx_gpio = GPIO_UART5_RX,
.cts_gpio = UART5_GPIO_CTS,
.rts_gpio = UART5_GPIO_RTS,
.shutd_gpio = UART5_GPIO_NSHUTD
};
#endif
/* This describes the state of the TIVA UART6 port. */
#ifdef CONFIG_TIVA_UART6_HCIUART
/* I/O buffers */
static uint8_t g_uart6_rxbuffer[CONFIG_TIVA_HCIUART6_RXBUFSIZE];
static uint8_t g_uart6_txbuffer[CONFIG_TIVA_HCIUART6_TXBUFSIZE];
/* HCI UART6 variable state information */
static struct hciuart_state_s g_hciuart6_state =
{
.rxwait = SEM_INITIALIZER(0),
.txwait = SEM_INITIALIZER(0),
};
/* HCI UART6 constant configuration information */
static const struct hciuart_config_s g_hciuart6_config =
{
.lower =
{
.rxattach = hciuart_rxattach,
.rxenable = hciuart_rxenable,
.setbaud = hciuart_setbaud,
.read = hciuart_read,
.write = hciuart_write,
.rxdrain = hciuart_rxdrain,
},
.state = &g_hciuart6_state,
.rxbuffer = g_uart6_rxbuffer,
.txbuffer = g_uart6_txbuffer,
.rxbufsize = CONFIG_TIVA_HCIUART6_RXBUFSIZE,
.txbufsize = CONFIG_TIVA_HCIUART6_TXBUFSIZE,
.irq = TIVA_IRQ_UART6,
.baud = CONFIG_TIVA_HCIUART6_BAUD,
.id = 6,
.uartbase = TIVA_UART6_BASE,
.tx_gpio = GPIO_UART6_TX,
.rx_gpio = GPIO_UART6_RX,
.cts_gpio = UART6_GPIO_CTS,
.rts_gpio = UART6_GPIO_RTS,
.shutd_gpio = UART6_GPIO_NSHUTD
};
#endif
/* This describes the state of the TIVA UART7 port. */
#ifdef CONFIG_TIVA_UART7_HCIUART
/* I/O buffers */
static uint8_t g_uart7_rxbuffer[CONFIG_TIVA_HCIUART7_RXBUFSIZE];
static uint8_t g_uart7_txbuffer[CONFIG_TIVA_HCIUART7_TXBUFSIZE];
/* HCI UART7 variable state information */
static struct hciuart_state_s g_hciuart7_state =
{
.rxwait = SEM_INITIALIZER(0),
.txwait = SEM_INITIALIZER(0),
};
/* HCI UART7 constant configuration information */
static const struct hciuart_config_s g_hciuart7_config =
{
.lower =
{
.rxattach = hciuart_rxattach,
.rxenable = hciuart_rxenable,
.setbaud = hciuart_setbaud,
.read = hciuart_read,
.write = hciuart_write,
.rxdrain = hciuart_rxdrain,
},
.state = &g_hciuart7_state,
.rxbuffer = g_uart7_rxbuffer,
.txbuffer = g_uart7_txbuffer,
.rxbufsize = CONFIG_TIVA_HCIUART7_RXBUFSIZE,
.txbufsize = CONFIG_TIVA_HCIUART7_TXBUFSIZE,
.irq = TIVA_IRQ_UART7,
.baud = CONFIG_TIVA_HCIUART7_BAUD,
.id = 7,
.uartbase = TIVA_UART7_BASE,
.tx_gpio = GPIO_UART7_TX,
.rx_gpio = GPIO_UART7_RX,
.cts_gpio = UART7_GPIO_CTS,
.rts_gpio = UART7_GPIO_RTS,
.shutd_gpio = UART7_GPIO_NSHUTD
};
#endif
/* This table lets us iterate over the configured UARTs */
static const struct hciuart_config_s * const g_hciuarts[] =
{
#ifdef CONFIG_TIVA_UART0_HCIUART
&g_hciuart0_config, /* HCI UART on TIVA UART0 */
#endif
#ifdef CONFIG_TIVA_UART1_HCIUART
&g_hciuart1_config, /* HCI UART on TIVA UART1 */
#endif
#ifdef CONFIG_TIVA_UART2_HCIUART
&g_hciuart2_config, /* HCI UART on TIVA UART2 */
#endif
#ifdef CONFIG_TIVA_UART3_HCIUART
&g_hciuart3_config, /* HCI UART on TIVA UART3 */
#endif
#ifdef CONFIG_TIVA_UART4_HCIUART
&g_hciuart4_config, /* HCI UART on TIVA UART4 */
#endif
#ifdef CONFIG_TIVA_UART5_HCIUART
&g_hciuart5_config, /* HCI UART on TIVA UART5 */
#endif
#ifdef CONFIG_TIVA_UART6_HCIUART
&g_hciuart6_config, /* HCI UART on TIVA UART6 */
#endif
#ifdef CONFIG_TIVA_UART7_HCIUART
&g_hciuart7_config, /* HCI UART on TIVA UART7 */
#endif
};
#ifdef CONFIG_PM
static struct pm_callback_s g_serialcb =
{
.notify = hciuart_pm_notify,
.prepare = hciuart_pm_prepare,
};
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: hciuart_getreg32
****************************************************************************/
static inline uint32_t
hciuart_getreg32(const struct hciuart_config_s *config,
unsigned int offset)
{
return getreg32(config->uartbase + offset);
}
/****************************************************************************
* Name: hciuart_putreg32
****************************************************************************/
static inline void hciuart_putreg32(const struct hciuart_config_s *config,
unsigned int offset, uint32_t value)
{
putreg32(value, config->uartbase + offset);
}
/****************************************************************************
* Name: hciuart_enableints
*
* Description:
* Enable interrupts as specified by bits in the 'intset' argument
*
* NOTE: This operation is not atomic. This function should be called
* only from within a critical section.
*
****************************************************************************/
static void hciuart_enableints(const struct hciuart_config_s *config,
uint32_t intset)
{
config->state->im |= intset;
hciuart_putreg32(config, TIVA_UART_IM_OFFSET, config->state->im);
}
/****************************************************************************
* Name: hciuart_disableints
*
* Description:
* Disable interrupts as specified by bits in the 'intset' argument
*
* NOTE: This operation is not atomic. This function should be called
* only from within a critical section.
*
****************************************************************************/
static void hciuart_disableints(const struct hciuart_config_s *config,
uint32_t intset)
{
config->state->im &= ~intset;
hciuart_putreg32(config, TIVA_UART_IM_OFFSET, config->state->im);
}
/****************************************************************************
* Name: hciuart_isenabled
*
* Description:
* Return true if any any of the interrupts specified in the 'intset'
* argument are enabled.
*
****************************************************************************/
static bool hciuart_isenabled(const struct hciuart_config_s *config,
uint32_t intset)
{
if ((config->state->im & intset) != 0)
{
return true;
}
return false;
}
/****************************************************************************
* Name: hciuart_rxenabled
*
* Description:
* Check if Rx interrupts are enabled.
*
****************************************************************************/
static inline bool hciuart_rxenabled(const struct hciuart_config_s *config)
{
return hciuart_isenabled(config, UART_MIS_RXMIS | UART_MIS_RTMIS);
}
/****************************************************************************
* Name: hciuart_rxinuse
*
* Description:
* Return the number of bytes in the Rx buffer
*
* Example: rxbufsize=4, rxhead = 0, rxtail = 2
*
* +---+---+---+---+
* | X | X | | | X = inuse
* +---+---+---+---+
* | `- rxtail = 2
* `- rxhead = 0
*
* inuse = 2 - 0 = 2
*
* Example: rxbufsize=4, rxhead = 2, rxtail = 0
*
* +---+---+---+---+
* | | | X | X | X = inuse
* +---+---+---+---+
* | `- rxhead = 2
* `- rxtail = 0
*
* inuse = (0 + 4) - 2 = 2
*
****************************************************************************/
static uint16_t hciuart_rxinuse(const struct hciuart_config_s *config)
{
struct hciuart_state_s *state;
size_t inuse;
DEBUGASSERT(config != NULL && config->state != NULL);
state = config->state;
/* Keep track of how much is discarded */
if (state->rxtail >= state->rxhead)
{
inuse = state->rxtail - state->rxhead;
}
else
{
inuse = (state->rxtail + config->rxbufsize) - state->rxhead;
}
return inuse;
}
/****************************************************************************
* Name: hciuart_copytorxbuffer
*
* Description:
* Copy data to the driver Rx buffer.
*
****************************************************************************/
static ssize_t hciuart_copytorxbuffer(const struct hciuart_config_s *config)
{
struct hciuart_state_s *state;
ssize_t nbytes = 0;
uint16_t rxhead;
uint16_t rxtail;
uint16_t rxnext;
uint8_t rxbyte;
/* Get a copy of the rxhead and rxtail indices of the Rx buffer */
state = config->state;
rxhead = state->rxhead;
rxtail = state->rxtail;
{
/* Is there data available in the Rx FIFO? */
while ((hciuart_getreg32(config, TIVA_UART_FR_OFFSET) & UART_FR_RXFE)
== 0)
{
/* Compare the Rx buffer head and tail indices. If the
* incremented tail index would make the Rx buffer appear empty,
* then we must stop the copy. If there is data pending in the Rx
* FIFO, this could be very bad because a data overrun condition
* is likely to* occur.
*/
rxnext = rxtail + 1;
if (rxnext >= config->rxbufsize)
{
rxnext = 0;
}
/* Would this make the Rx buffer appear full? */
if (rxnext == rxhead)
{
/* Yes, stop the copy and update the indices */
break;
}
/* Get a byte from the Rx FIFO buffer */
rxbyte = hciuart_getreg32(config, TIVA_UART_DR_OFFSET) & 0xff;
/* And add it to the tail of the Rx buffer */
config->rxbuffer[rxtail] = rxbyte;
rxtail = rxnext;
nbytes++;
}
}
/* Save the updated Rx buffer tail index */
state->rxtail = rxtail;
/* Notify any waiting threads that new Rx data is available */
if (nbytes > 0 && state->rxwaiting)
{
state->rxwaiting = false;
nxsem_post(&state->rxwait);
}
wlinfo("rxhead %u rxtail %u nbytes %ld\n", rxhead, rxtail, (long)nbytes);
return nbytes;
}
/****************************************************************************
* Name: hciuart_copyfromrxbuffer
*
* Description:
* Copy data from the driver Rx buffer to the caller provided destination
* buffer.
*
****************************************************************************/
static ssize_t
hciuart_copyfromrxbuffer(const struct hciuart_config_s *config,
uint8_t *dest, size_t destlen)
{
struct hciuart_state_s *state;
ssize_t nbytes;
uint16_t rxhead;
uint16_t rxtail;
uint8_t rxbyte;
/* Get a copy of the rxhead and rxtail indices of the Rx buffer */
state = config->state;
rxhead = state->rxhead;
rxtail = state->rxtail;
nbytes = 0;
/* Is there data available in the Rx buffer? Is there space in the user
* buffer?
*/
while (rxhead != rxtail && nbytes < destlen)
{
/* Get a byte from the head of the Rx buffer */
rxbyte = config->rxbuffer[rxhead];
/* And add it to the caller's buffer buffer */
dest[nbytes] = rxbyte;
/* Update indices and counts */
nbytes++;
if (++rxhead >= config->rxbufsize)
{
rxhead = 0;
}
}
/* Save the updated Rx buffer head index */
state->rxhead = rxhead;
wlinfo("rxhead %u rxtail %u nbytes %ld\n", rxhead, rxtail, (long)nbytes);
return nbytes;
}
/****************************************************************************
* Name: hciuart_copytotxfifo
*
* Description:
* Copy data from the Tx buffer to the Tx FIFO
*
****************************************************************************/
static ssize_t hciuart_copytotxfifo(const struct hciuart_config_s *config)
{
struct hciuart_state_s *state;
ssize_t nbytes;
uint16_t txhead;
uint16_t txtail;
uint8_t txbyte;
/* Get a copy of the txhead and txtail indices of the Rx buffer */
state = config->state;
txhead = state->txhead;
txtail = state->txtail;
nbytes = 0;
/* Compare the Tx buffer head and tail indices. If the Tx buffer is
* empty, then we finished with the copy.
*/
while (txhead != txtail)
{
#ifdef CONFIG_TIVA_HCIUART_SW_TXFLOW
if (tiva_gpioread(config->cts_gpio))
{
break;
}
#endif
/* Is the transmit data register empty?
*
* Transmit data register empty
* This bit is set by hardware when the content of the transmit
* register has been transferred into the shift register.
*/
if ((hciuart_getreg32(config, TIVA_UART_FR_OFFSET) &
UART_FR_TXFF) != 0)
{
break;
}
/* Get a byte from the head of the Tx buffer */
txbyte = config->txbuffer[txhead];
if (++txhead >= config->txbufsize)
{
txhead = 0;
}
/* And add it to the of the Tx FIFO */
hciuart_putreg32(config, TIVA_UART_DR_OFFSET, (uint32_t)txbyte);
nbytes++;
}
wlinfo("txhead %u txtail %u nbytes %ld\n", txhead, txtail, (long)nbytes);
state->txhead = txhead;
return nbytes;
}
/****************************************************************************
* Name: hciuart_line_configure
*
* Description:
* Set the serial line format and speed.
*
* Per "Specification of the Bluetooth System, Wireless connections made
* easy, Host Controller Interface [Transport Layer]", Volume 4, Revision
* 1.2 or later, 1 January 2006, HCI UART transport uses these settings:
*
* 8 data bits, no parity, 1 stop, RTS/CTS flow control
*
* BAUD and flow control response time are manufacturer specific.
*
****************************************************************************/
static void hciuart_line_configure(const struct hciuart_config_s *config)
{
uint32_t baud;
uint32_t den;
uint32_t brdi;
uint32_t remainder;
uint32_t divfrac;
uint32_t lcrh;
/* The current BAUD selection is part of the variable state data */
DEBUGASSERT(config != NULL && config->state != NULL);
baud = config->state->baud;
wlinfo("baud %lu\n", (unsigned long)baud);
den = baud << 4;
brdi = SYSCLK_FREQUENCY / den;
remainder = SYSCLK_FREQUENCY - den * brdi;
divfrac = ((remainder << 6) + (den >> 1)) / den;
hciuart_putreg32(config, TIVA_UART_IBRD_OFFSET, brdi);
hciuart_putreg32(config, TIVA_UART_FBRD_OFFSET, divfrac);
/* Configure 8 data bits, No parity, 1 stop bit - required by HCI UART */
lcrh = 0;
lcrh |= UART_LCRH_WLEN_8BITS;
hciuart_putreg32(config, TIVA_UART_LCRH_OFFSET, lcrh);
}
/****************************************************************************
* Name: hciuart_configure
*
* Description:
* Configure the UART clocking, GPIO pins, baud, bits, parity, etc.
*
* Per "Specification of the Bluetooth System, Wireless connections made
* easy, Host Controller Interface [Transport Layer]", Volume 4, Revision
* 1.2 or later, 1 January 2006, HCI UART transport uses these settings:
*
* 8 data bits, no parity, 1 stop, RTS/CTS flow control
*
* BAUD and flow control response time are manufacturer specific.
*
****************************************************************************/
static int hciuart_configure(const struct hciuart_config_s *config)
{
uint32_t lcrh;
uint32_t ctl;
/* Note: The logic here depends on the fact that that the UART module
* was enabled in tiva_lowsetup().
*/
wlinfo("config %p\n", config);
/* Configure pins for UART use */
tiva_configgpio(config->tx_gpio);
tiva_configgpio(config->rx_gpio);
tiva_configgpio(config->cts_gpio);
tiva_configgpio(config->rts_gpio);
#ifdef CONFIG_BLUETOOTH_UART_CC2564
tiva_configgpio(config->shutd_gpio);
#endif
DEBUGASSERT(config->state != NULL);
config->state->baud = config->baud;
hciuart_line_configure(config);
/* Enable the FIFOs */
lcrh = hciuart_getreg32(config, TIVA_UART_LCRH_OFFSET);
lcrh |= UART_LCRH_FEN;
hciuart_putreg32(config, TIVA_UART_LCRH_OFFSET, lcrh);
/* Enable Rx, Tx, and the UART */
ctl = hciuart_getreg32(config, TIVA_UART_CTL_OFFSET);
ctl |= (UART_CTL_UARTEN | UART_CTL_TXE | UART_CTL_RXE);
hciuart_putreg32(config, TIVA_UART_CTL_OFFSET, ctl);
/* Set up the cache IM value */
config->state->im = hciuart_getreg32(config, TIVA_UART_IM_OFFSET);
hciuart_putreg32(config, TIVA_UART_IFLS_OFFSET,
UART_IFLS_TXIFLSEL_18TH | UART_IFLS_RXIFLSEL_78TH);
hciuart_putreg32(config, TIVA_UART_IM_OFFSET, UART_IM_RXIM | UART_IM_RTIM);
/* Enable bluetooth module */
#ifdef CONFIG_BLUETOOTH_UART_CC2564
tiva_gpiowrite(config->shutd_gpio, true);
#endif
#ifdef CONFIG_TIVA_HCIUART_SW_TXFLOW
while (tiva_gpioread(config->cts_gpio))
{
}
#endif
#ifdef CONFIG_TIVA_HCIUART_SW_RXFLOW
/* Disable Rx flow control, i.e, assert RTS (active low). */
tiva_gpiowrite(config->rts_gpio, false);
#endif
return OK;
}
/****************************************************************************
* Name: hciuart_interrupt
*
* Description:
* This is the UART interrupt callback. It will be invoked when an
* interrupt received on the 'irq'. It should call hciuart_copytorxbuffer
* or hciuart_copytotxfifo to perform the appropriate data transfers. The
* interrupt handling logic must be able to map the 'irq' number into the
* appropriate btuart_lowerhalf_s structure in order to call these
* functions.
*
****************************************************************************/
static int hciuart_interrupt(int irq, void *context, void *arg)
{
const struct hciuart_config_s *config =
(const struct hciuart_config_s *)arg;
struct hciuart_state_s *state;
uint32_t status;
uint8_t handled;
int passes;
DEBUGASSERT(config != NULL && config->state != NULL);
state = config->state;
/* Report serial activity to the power management logic */
#if defined(CONFIG_PM) && CONFIG_TIVA_PM_SERIAL_ACTIVITY > 0
pm_activity(PM_IDLE_DOMAIN, CONFIG_TIVA_PM_SERIAL_ACTIVITY);
#endif
/* Loop until there are no characters to be transferred or,
* until we have been looping for a long time.
*/
handled = (HCIUART_RXHANDLED | HCIUART_TXHANDLED);
for (passes = 0; passes < 256 && handled != 0; passes++)
{
handled = 0;
/* Get the masked UART status word. */
status = hciuart_getreg32(config, TIVA_UART_MIS_OFFSET);
hciuart_putreg32(config, TIVA_UART_ICR_OFFSET, status);
/* Handle incoming, receive bytes (non-DMA only) */
if ((status & (UART_MIS_RXMIS | UART_MIS_RTMIS)) != 0 &&
hciuart_rxenabled(config))
{
ssize_t nbytes;
#ifdef CONFIG_TIVA_HCIUART_SW_RXFLOW
/* Set CTS high if FIFO 7/8 full is triggered */
if ((status & (UART_MIS_RXMIS)) != 0)
{
tiva_gpiowrite(config->rts_gpio, true);
}
#endif
/* Received data ready... copy data from the Rx FIFO to the Rx
* buffer.
*/
nbytes = hciuart_copytorxbuffer(config);
UNUSED(nbytes);
#ifdef CONFIG_TIVA_HCIUART_SW_RXFLOW
/* Assert CTS because we now have space for more data */
if ((status & (UART_MIS_RXMIS)) != 0)
{
tiva_gpiowrite(config->rts_gpio, false);
}
#endif
/* Is there anything in the Rx buffer? Has the user registered an
* Rx callback function?
*/
if (state->rxhead != state->rxtail && state->callback != NULL)
{
state->callback(&config->lower, state->arg);
handled = HCIUART_RXHANDLED;
}
}
/* Handle outgoing, transmit bytes
*
* Transmit data register empty
* This bit is set by hardware when the content of the transmit data
* register has been transferred into the shift register.
*/
if ((status & UART_MIS_TXMIS) != 0)
{
ssize_t nbytes;
uint8_t txhandled;
/* Transmit data register empty ... copy data from the Tx buffer
* to the Tx FIFO.
*/
nbytes = hciuart_copytotxfifo(config);
UNUSED(nbytes);
/* If the Tx buffer is now empty, then disable further Tx
* interrupts. Tx interrupts will only be enabled in the
* following circumstances:
*
* 1. The user is waiting in hciuart_write() for space to become
* available in the Tx FIFO.
* 2. The full, outgoing message has been placed into the Tx buffer
* by hciuart_write().
*
* In either case, no more Tx interrupts will be needed until more
* data is added to the Tx buffer.
*/
txhandled = HCIUART_TXHANDLED;
if (state->txhead == state->txtail)
{
/* Disable Tx interrupts and treat the event as unhandled in
* order to terminate looping.
*/
hciuart_disableints(config, UART_IM_TXIM);
txhandled = 0;
}
/* This copy will free up space in the Tx FIFO. Wake up any
* threads that may have been waiting for space in the Tx
* buffer.
*/
if (state->txwaiting)
{
state->txwaiting = false;
nxsem_post(&state->txwait);
}
handled |= txhandled;
}
}
return OK;
}
/****************************************************************************
* Name: hciuart_rxattach
*
* Description:
* Attach/detach the upper half Rx callback.
*
* rxattach() allows the upper half logic to attach a callback function
* that will be used to inform the upper half that an Rx frame is
* available. This callback will, most likely, be invoked in the
* context of an interrupt callback. The receive() method should then
* be invoked in order to receive the obtain the Rx frame data.
*
****************************************************************************/
static void hciuart_rxattach(const struct btuart_lowerhalf_s *lower,
btuart_rxcallback_t callback, void *arg)
{
const struct hciuart_config_s *config =
(const struct hciuart_config_s *)lower;
struct hciuart_state_s *state;
irqstate_t flags;
wlinfo("config %p callback %p arg %p\n", config, callback, arg);
DEBUGASSERT(config != NULL && config->state != NULL);
state = config->state;
/* If the callback is NULL, then we are detaching */
flags = spin_lock_irqsave(NULL);
if (callback == NULL)
{
uint32_t intset;
/* Disable Rx callbacks and detach the Rx callback */
intset = UART_IM_RXIM | UART_IM_RTIM;
hciuart_disableints(config, intset);
state->callback = NULL;
state->arg = NULL;
}
/* Otherwise, we are attaching */
else
{
state->arg = arg;
state->callback = callback;
}
spin_unlock_irqrestore(NULL, flags);
}
/****************************************************************************
* Name: hciuart_rxenable
*
* Description:
* Enable/disable RX callbacks from the HCI UART.
*
* hciuart_rxenable() may be used to enable or disable callback events.
* This probably translates to enabling and disabled Rx interrupts at
* the UART. NOTE: Rx event notification should be done sparingly:
* Rx data overrun may occur when Rx events are disabled!
*
****************************************************************************/
static void hciuart_rxenable(const struct btuart_lowerhalf_s *lower,
bool enable)
{
const struct hciuart_config_s *config =
(const struct hciuart_config_s *)lower;
DEBUGASSERT(config != NULL && config->state != NULL);
{
uint32_t intset;
irqstate_t flags;
flags = spin_lock_irqsave(NULL);
if (enable)
{
/* Receive an interrupt when their is anything in the Rx data
* register (or an Rx timeout occurs).
*/
intset = UART_IM_RXIM | UART_IM_RTIM;
hciuart_enableints(config, intset);
}
else
{
intset = UART_IM_RXIM | UART_IM_RTIM;
hciuart_disableints(config, intset);
}
spin_unlock_irqrestore(NULL, flags);
}
}
/****************************************************************************
* Name: hciuart_setbaud
*
* Description:
* The HCI UART comes up with some initial BAUD rate. Some support
* auto-BAUD detection, some support writing a configuration file to
* select the initial BAUD. The simplest strategy, however, is simply
* to use the HCI UART's default initial BAUD to perform the basic
* bring up, then send a vendor-specific command to increase the HCI
* UARTs BAUD. This method then may be used to adjust the lower half
* driver to the new HCI UART BAUD.
*
****************************************************************************/
static int hciuart_setbaud(const struct btuart_lowerhalf_s *lower,
uint32_t baud)
{
const struct hciuart_config_s *config =
(const struct hciuart_config_s *)lower;
DEBUGASSERT(config != NULL && config->state != NULL);
config->state->baud = baud;
hciuart_line_configure(config);
return OK;
}
/****************************************************************************
* Name: hciuart_read
*
* Description:
* Read UART data.
*
* hciuart_read() after receipt of a callback notifying the upper half of
* the availability of Rx frame, the upper half may call the receive()
* method in order to obtain the buffered Rx frame data.
*
****************************************************************************/
static ssize_t hciuart_read(const struct btuart_lowerhalf_s *lower,
void *buffer, size_t buflen)
{
const struct hciuart_config_s *config =
(const struct hciuart_config_s *)lower;
struct hciuart_state_s *state;
uint8_t *dest;
size_t remaining;
ssize_t ntotal;
ssize_t nbytes;
bool rxenable;
int ret;
wlinfo("config %p buffer %p buflen %lu\n",
config, buffer, (unsigned long)buflen);
/* NOTE: This assumes that the caller has exclusive access to the Rx
* buffer, i.e., one lower half instance can server only one upper half!
*/
DEBUGASSERT(config != NULL && config->state != NULL);
state = config->state;
/* Read any pending data to the Rx buffer */
nbytes = hciuart_copytorxbuffer(config);
UNUSED(nbytes);
/* Loop copying data to the user buffer while the Rx buffer is not empty
* and the callers buffer is not full.
*/
dest = (uint8_t *)buffer;
remaining = buflen;
ntotal = 0;
rxenable = hciuart_rxenabled(config);
hciuart_rxenable(lower, false);
while (state->rxtail != state->rxhead && ntotal < buflen)
{
nbytes = hciuart_copyfromrxbuffer(config, dest, remaining);
if (nbytes <= 0)
{
DEBUGASSERT(nbytes == 0);
/* If no data has been received, then we must wait for the arrival
* of new Rx data and try again.
*/
if (ntotal == 0)
{
DEBUGASSERT(!state->rxwaiting);
state->rxwaiting = true;
do
{
ret = nxsem_wait_uninterruptible(&state->rxwait);
if (ret < 0)
{
ntotal = (ssize_t)ret;
break;
}
}
while (state->rxwaiting);
}
/* Otherwise, this must be the end of the packet. Just break out
* and return what we have.
*/
else
{
break;
}
}
else
{
/* More data has been copied. Update pointers, counts, and
* indices.
*/
ntotal += nbytes;
dest += nbytes;
remaining -= nbytes;
/* Read any additional pending data into the Rx buffer that may
* have accumulated while we were copying.
*/
nbytes = hciuart_copytorxbuffer(config);
if (nbytes < 0)
{
/* An error occurred.. this should not really happen */
return nbytes;
}
/* Otherwise, continue looping */
}
}
hciuart_rxenable(lower, rxenable);
return ntotal;
}
/****************************************************************************
* Name: hciuart_write
*
* Description:
* Write UART data.
*
* hciuart_write() will add the outgoing frame to the Tx buffer and will
* return immediately. This function may block only in the event that
* there is insufficient buffer space to hold the Tx frame data. In that
* case the lower half will block until there is sufficient to buffer
* the entire outgoing packet.
*
****************************************************************************/
static ssize_t hciuart_write(const struct btuart_lowerhalf_s *lower,
const void *buffer, size_t buflen)
{
const struct hciuart_config_s *config =
(const struct hciuart_config_s *)lower;
struct hciuart_state_s *state;
const uint8_t *src;
ssize_t nbytes = 0;
uint16_t txhead;
uint16_t txtail;
uint16_t txnext;
ssize_t ntotal;
irqstate_t flags;
int ret;
DEBUGASSERT(config != NULL && config->state != NULL);
state = config->state;
/* NOTE: This assumes that the caller has exclusive access to the Tx
* buffer, i.e., one lower half instance can serve only one upper half!
*/
/* Make sure that the Tx Interrupts are disabled. */
flags = spin_lock_irqsave(NULL);
hciuart_disableints(config, UART_IM_TXIM);
spin_unlock_irqrestore(NULL, flags);
/* Loop until all of the user data have been moved to the Tx buffer */
src = buffer;
ntotal = 0;
while (ntotal < (ssize_t)buflen)
{
/* Copy bytes to the tail of the Tx buffer */
/* Get a copy of the rxhead and rxtail indices of the Tx buffer */
txhead = state->txhead;
txtail = state->txtail;
txnext = txtail + 1;
if (txnext >= config->txbufsize)
{
txnext = 0;
}
/* Is there space available in the Tx buffer? Do have more bytes to
* copy?
*/
while (txhead != txnext && ntotal < (ssize_t)buflen)
{
/* Yes.. copy one byte to the Tx buffer */
config->txbuffer[txtail] = *src++;
txtail = txnext;
if (++txnext >= config->txbufsize)
{
txnext = 0;
}
ntotal++;
}
/* Save the updated Tx buffer tail index */
state->txtail = txtail;
/* Copy bytes from the Tx buffer to the Tx FIFO */
nbytes = hciuart_copytotxfifo(config);
/* If nothing could be copied to the Tx FIFO and we still have user
* data that we have not added to the Tx buffer, then we must wait for
* space in the Tx* buffer then try again.
*/
if (nbytes <= 0 && ntotal < buflen)
{
DEBUGASSERT(nbytes == 0);
/* Enable the Tx interrupt and wait for space open up in the Tx
* buffer.
*/
flags = enter_critical_section();
hciuart_enableints(config, UART_IM_TXIM);
DEBUGASSERT(!state->txwaiting);
state->txwaiting = true;
do
{
ret = nxsem_wait_uninterruptible(&state->txwait);
if (ret < 0)
{
if (ntotal == 0)
{
ntotal = (ssize_t)ret;
}
break;
}
}
while (state->txwaiting);
/* Disable Tx interrupts again */
hciuart_disableints(config, UART_IM_TXIM);
leave_critical_section(flags);
}
}
/* If the Tx buffer is not empty, then exit with the Tx interrupts
* enabled.
*/
if (state->txhead != state->txtail)
{
flags = spin_lock_irqsave(NULL);
hciuart_enableints(config, UART_IM_TXIM);
spin_unlock_irqrestore(NULL, flags);
}
return ntotal;
}
/****************************************************************************
* Name: hciuart_rxdrain
*
* Description:
* Flush/drain all buffered RX data
*
****************************************************************************/
static ssize_t hciuart_rxdrain(const struct btuart_lowerhalf_s *lower)
{
const struct hciuart_config_s *config =
(const struct hciuart_config_s *)lower;
struct hciuart_state_s *state;
size_t ntotal;
ssize_t nbytes;
bool rxenable;
DEBUGASSERT(config != NULL && config->state != NULL);
state = config->state;
/* Read any pending data to the Rx buffer */
nbytes = hciuart_copytorxbuffer(config);
UNUSED(nbytes);
/* Loop discarding in the Rx buffer until the Rx buffer is empty */
ntotal = 0;
rxenable = hciuart_rxenabled(config);
hciuart_rxenable(lower, false);
while (state->rxtail != state->rxhead)
{
/* Keep track of how much is discarded */
ntotal += hciuart_rxinuse(config);
/* Discard the data in the Rx buffer */
state->rxhead = 0;
state->rxtail = 0;
/* Read any additional pending data into the Rx buffer that may
* have accumulated while we were discarding.
*/
nbytes = hciuart_copytorxbuffer(config);
UNUSED(nbytes);
}
hciuart_rxenable(lower, rxenable);
return ntotal;
}
/****************************************************************************
* Name: hciuart_pm_notify
*
* Description:
* Notify the driver of new power state. This callback is called after
* all drivers have had the opportunity to prepare for the new power state.
*
* Input Parameters:
*
* cb - Returned to the driver. The driver version of the callback
* structure may include additional, driver-specific state data at
* the end of the structure.
*
* pmstate - Identifies the new PM state
*
* Returned Value:
* None - The driver already agreed to transition to the low power
* consumption state when when it returned OK to the prepare() call.
*
*
****************************************************************************/
#ifdef CONFIG_PM
static void hciuart_pm_notify(struct pm_callback_s *cb, int domain,
enum pm_state_e pmstate)
{
switch (pmstate)
{
case(PM_NORMAL):
{
/* Logic for PM_NORMAL goes here */
}
break;
case(PM_IDLE):
{
/* Logic for PM_IDLE goes here */
}
break;
case(PM_STANDBY):
{
/* Logic for PM_STANDBY goes here */
}
break;
case(PM_SLEEP):
{
/* Logic for PM_SLEEP goes here */
}
break;
default:
/* Should not get here */
break;
}
}
#endif
/****************************************************************************
* Name: hciuart_pm_prepare
*
* Description:
* Request the driver to prepare for a new power state. This is a warning
* that the system is about to enter into a new power state. The driver
* should begin whatever operations that may be required to enter power
* state. The driver may abort the state change mode by returning a
* non-zero value from the callback function.
*
* Input Parameters:
*
* cb - Returned to the driver. The driver version of the callback
* structure may include additional, driver-specific state data at
* the end of the structure.
*
* pmstate - Identifies the new PM state
*
* Returned Value:
* Zero - (OK) means the event was successfully processed and that the
* driver is prepared for the PM state change.
*
* Non-zero - means that the driver is not prepared to perform the tasks
* needed achieve this power setting and will cause the state
* change to be aborted. NOTE: The prepare() method will also
* be called when reverting from lower back to higher power
* consumption modes (say because another driver refused a
* lower power state change). Drivers are not permitted to
* return non-zero values when reverting back to higher power
* consumption modes!
*
*
****************************************************************************/
#ifdef CONFIG_PM
static int hciuart_pm_prepare(struct pm_callback_s *cb, int domain,
enum pm_state_e pmstate)
{
/* Logic to prepare for a reduced power state goes here. */
return OK;
}
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: hciuart_instantiate
*
* Description:
* Obtain an instance of the HCI UART interface for the specified HCI UART
* This assumes that hciuart_initialize was called previously.
*
* Input Parameters:
* uart - Identifies the HCI UART to be configured
*
* Returned Value:
* On success, a reference to the HCI UART lower driver for the associated
* UART
*
****************************************************************************/
const struct btuart_lowerhalf_s *
hciuart_instantiate(enum hciuart_devno_e uart)
{
const struct hciuart_config_s *config;
#ifdef CONFIG_PM
int ret;
#endif
wlinfo("Instantiating HCIUART%d\n", (int)uart + 1);
DEBUGASSERT((int)uart >= 0 && (int)uart < 8);
/* Check if this uart is available in the configuration */
config = g_hciuarts[(int)uart];
if (config == NULL)
{
wlerr("ERROR: UART%d not configured\n", uart + 1);
return NULL;
}
/* Register to receive power management callbacks */
#ifdef CONFIG_PM
ret = pm_register(&g_serialcb);
DEBUGASSERT(ret == OK);
UNUSED(ret);
#endif
/* Configure and enable the UART */
hciuart_configure(config);
return &config->lower;
}
/****************************************************************************
* Name: hciuart_initialize
*
* Description:
* Performs the low-level, one-time UART initialization. This must be
* called before hciuart_instantiate.
*
****************************************************************************/
void hciuart_initialize(void)
{
const struct hciuart_config_s *config;
struct hciuart_state_s *state;
int ret;
int i;
/* Configure all UARTs */
for (i = 0; i < sizeof(g_hciuarts) / sizeof(g_hciuarts[0]); i++)
{
config = g_hciuarts[i];
if (config != NULL)
{
state = config->state;
/* Enable UART clock */
tiva_uart_enableclk(config->id);
tiva_uart_enablepwr(config->id);
/* Disable UART interrupts */
hciuart_disableints(config, HCIUART_ALLINTS);
/* Attach and enable the HCI UART IRQ */
ret = irq_attach(config->irq, hciuart_interrupt, (void *)config);
if (ret == OK)
{
/* Enable the interrupt (RX and TX interrupts are still
* disabled in the UART)
*/
up_enable_irq(config->irq);
}
}
}
}
|
cfef3b3aa51b4c333d159a0c13182135ac7f0670
|
676acab8ff535019faff7da3afb8eecc3fa127f5
|
/src/hal/dronecan_dev/droencan_dev.c
|
0168583f4001ada65d5b140a3ae6c498ef9502d9
|
[
"Apache-2.0"
] |
permissive
|
Firmament-Autopilot/FMT-Firmware
|
f8c324577245bd7e91af436954b4ce9421acbb41
|
0212fe89820376bfbedaded519552f6b011a7b8a
|
refs/heads/master
| 2023-09-01T11:37:46.194145
| 2023-08-29T06:33:10
| 2023-08-29T06:33:10
| 402,557,689
| 351
| 143
|
Apache-2.0
| 2023-09-12T05:28:39
| 2021-09-02T20:42:56
|
C
|
UTF-8
|
C
| false
| false
| 3,426
|
c
|
droencan_dev.c
|
/******************************************************************************
* Copyright 2020-2021 The Firmament Authors. All Rights Reserved.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*****************************************************************************/
#include <firmament.h>
#include "hal/droencan_dev/droencan_dev.h"
static struct rt_device droencan_dev;
static rt_device_t droencan_dev_t = &droencan_dev;
static rt_device_t can_dev_t;
static rt_err_t fmtio_dev_rx_ind(rt_device_t dev, rt_size_t size)
{
rt_err_t ret;
rt_completion_done(&rx_cplt);
/* invoke rx indicator if set */
if (fmtio_dev_t->rx_indicate) {
fmtio_dev_t->rx_indicate(fmtio_dev_t, size);
}
return ret;
}
static rt_err_t fmtio_dev_open(rt_device_t dev, rt_uint16_t oflag)
{
return rt_device_open(io_dev_t, oflag);
}
static rt_err_t fmtio_dev_close(rt_device_t dev)
{
return rt_device_close(io_dev_t);
}
static rt_size_t fmtio_dev_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
{
rt_size_t cnt = 0;
rt_int32_t timeout = (rt_int32_t)pos;
/* try to read data */
cnt = rt_device_read(io_dev_t, 0, buffer, size);
/* if not enough data received, wait it */
while (cnt < size) {
/* wait receive some data */
if (rt_completion_wait(&rx_cplt, timeout) != RT_EOK) {
return cnt;
}
/* read left data */
cnt += rt_device_read(io_dev_t, 0, (void*)((uint32_t)buffer + cnt), size - cnt);
}
return cnt;
}
static rt_size_t fmtio_dev_write(rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
{
rt_size_t wb;
rt_int32_t timeout = (rt_int32_t)pos;
/* take tx lock */
if (rt_sem_take(tx_lock, timeout) != RT_EOK) {
return 0;
}
/* write data to device */
wb = rt_device_write(io_dev_t, 0, buffer, size);
/* wait write complete */
rt_completion_wait(&tx_cplt, timeout);
/* release tx lock */
rt_sem_release(tx_lock);
return wb;
}
/**
* @brief Register fmtio device
*
* @param io_dev The io device which is used by fmtio
* @param name The name of fmtio device
* @param flag Open flag, should be equal to io device flag
* @param data User data
* @return rt_err_t
*/
rt_err_t hal_dronecan_dev_register(rt_device_t can_dev, const char* name, rt_uint32_t flag, void* data)
{
can_dev_t = can_dev;
RT_ASSERT(can_dev_t != NULL);
/* init fmtio device */
fmtio_dev_t->type = RT_Device_Class_Char;
fmtio_dev_t->rx_indicate = RT_NULL;
fmtio_dev_t->tx_complete = RT_NULL;
fmtio_dev_t->init = RT_NULL;
fmtio_dev_t->open = fmtio_dev_open;
fmtio_dev_t->close = fmtio_dev_close;
fmtio_dev_t->read = fmtio_dev_read;
fmtio_dev_t->write = fmtio_dev_write;
fmtio_dev_t->control = RT_NULL;
fmtio_dev_t->user_data = data;
return rt_device_register(fmtio_dev_t, name, flag);
}
|
d6beaf79314b8edff45fd5596a4ee7419dbb1c59
|
5eff7a36d9a9917dce9111f0c3074375fe6f7656
|
/lib/mesa/src/gallium/drivers/crocus/crocus_perf.c
|
cb33db2087daabc655c47aa7cb0130e11ac82aab
|
[] |
no_license
|
openbsd/xenocara
|
cb392d02ebba06f6ff7d826fd8a89aa3b8401779
|
a012b5de33ea0b977095d77316a521195b26cc6b
|
refs/heads/master
| 2023-08-25T12:16:58.862008
| 2023-08-12T16:16:25
| 2023-08-12T16:16:25
| 66,967,384
| 177
| 66
| null | 2023-07-22T18:12:37
| 2016-08-30T18:36:01
|
C
|
UTF-8
|
C
| false
| false
| 4,161
|
c
|
crocus_perf.c
|
/*
* Copyright © 2019 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#include "crocus_perf.h"
#include "crocus_context.h"
static void *
crocus_oa_bo_alloc(void *bufmgr, const char *name, uint64_t size)
{
return crocus_bo_alloc(bufmgr, name, size);
}
static void
crocus_perf_emit_stall_at_pixel_scoreboard(struct crocus_context *ice)
{
crocus_emit_end_of_pipe_sync(&ice->batches[CROCUS_BATCH_RENDER],
"OA metrics",
PIPE_CONTROL_STALL_AT_SCOREBOARD);
}
static void
crocus_perf_emit_mi_report_perf_count(void *c,
void *bo,
uint32_t offset_in_bytes,
uint32_t report_id)
{
struct crocus_context *ice = c;
struct crocus_batch *batch = &ice->batches[CROCUS_BATCH_RENDER];
batch->screen->vtbl.emit_mi_report_perf_count(batch, bo, offset_in_bytes, report_id);
}
static void
crocus_perf_batchbuffer_flush(void *c, const char *file, int line)
{
struct crocus_context *ice = c;
_crocus_batch_flush(&ice->batches[CROCUS_BATCH_RENDER], __FILE__, __LINE__);
}
static void
crocus_perf_store_register_mem(void *ctx, void *bo,
uint32_t reg, uint32_t reg_size,
uint32_t offset)
{
struct crocus_context *ice = ctx;
struct crocus_batch *batch = &ice->batches[CROCUS_BATCH_RENDER];
if (reg_size == 8) {
batch->screen->vtbl.store_register_mem64(batch, reg, bo, offset, false);
} else {
assert(reg_size == 4);
batch->screen->vtbl.store_register_mem32(batch, reg, bo, offset, false);
}
}
typedef void (*bo_unreference_t)(void *);
typedef void *(*bo_map_t)(void *, void *, unsigned flags);
typedef void (*bo_unmap_t)(void *);
typedef void (*emit_mi_report_t)(void *, void *, uint32_t, uint32_t);
typedef void (*emit_mi_flush_t)(void *);
typedef void (*store_register_mem_t)(void *ctx, void *bo,
uint32_t reg, uint32_t reg_size,
uint32_t offset);
typedef bool (*batch_references_t)(void *batch, void *bo);
typedef void (*bo_wait_rendering_t)(void *bo);
typedef int (*bo_busy_t)(void *bo);
void
crocus_perf_init_vtbl(struct intel_perf_config *perf_cfg)
{
perf_cfg->vtbl.bo_alloc = crocus_oa_bo_alloc;
perf_cfg->vtbl.bo_unreference = (bo_unreference_t)crocus_bo_unreference;
perf_cfg->vtbl.bo_map = (bo_map_t)crocus_bo_map;
perf_cfg->vtbl.bo_unmap = (bo_unmap_t)crocus_bo_unmap;
perf_cfg->vtbl.emit_stall_at_pixel_scoreboard =
(emit_mi_flush_t)crocus_perf_emit_stall_at_pixel_scoreboard;
perf_cfg->vtbl.emit_mi_report_perf_count =
(emit_mi_report_t)crocus_perf_emit_mi_report_perf_count;
perf_cfg->vtbl.batchbuffer_flush = crocus_perf_batchbuffer_flush;
perf_cfg->vtbl.store_register_mem =
(store_register_mem_t) crocus_perf_store_register_mem;
perf_cfg->vtbl.batch_references = (batch_references_t)crocus_batch_references;
perf_cfg->vtbl.bo_wait_rendering =
(bo_wait_rendering_t)crocus_bo_wait_rendering;
perf_cfg->vtbl.bo_busy = (bo_busy_t)crocus_bo_busy;
}
|
5ebf19480cb1e7c5174960fd3dd2cd5bdd3b4650
|
fbe68d84e97262d6d26dd65c704a7b50af2b3943
|
/third_party/virtualbox/src/VBox/Runtime/common/crypto/x509-template.h
|
7d593c31d38c28fa6a279de5c5d8933913ba67cd
|
[
"MIT",
"GPL-2.0-only",
"LicenseRef-scancode-unknown-license-reference",
"CDDL-1.0",
"LicenseRef-scancode-warranty-disclaimer",
"GPL-1.0-or-later",
"LGPL-2.1-or-later",
"GPL-2.0-or-later",
"MPL-1.0",
"LicenseRef-scancode-generic-exception",
"Apache-2.0",
"OpenSSL"
] |
permissive
|
thalium/icebox
|
c4e6573f2b4f0973b6c7bb0bf068fe9e795fdcfb
|
6f78952d58da52ea4f0e55b2ab297f28e80c1160
|
refs/heads/master
| 2022-08-14T00:19:36.984579
| 2022-02-22T13:10:31
| 2022-02-22T13:10:31
| 190,019,914
| 585
| 109
|
MIT
| 2022-01-13T20:58:15
| 2019-06-03T14:18:12
|
C++
|
UTF-8
|
C
| false
| false
| 19,359
|
h
|
x509-template.h
|
/* $Id: x509-template.h $ */
/** @file
* IPRT - Crypto - X.509, Code Generator Template.
*/
/*
* Copyright (C) 2006-2017 Oracle Corporation
*
* This file is part of VirtualBox Open Source Edition (OSE), as
* available from http://www.virtualbox.org. This file is free software;
* you can redistribute it and/or modify it under the terms of the GNU
* General Public License (GPL) as published by the Free Software
* Foundation, in version 2 as it comes in the "COPYING" file of the
* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
*
* The contents of this file may alternatively be used under the terms
* of the Common Development and Distribution License Version 1.0
* (CDDL) only, as it comes in the "COPYING.CDDL" file of the
* VirtualBox OSE distribution, in which case the provisions of the
* CDDL are applicable instead of those of the GPL.
*
* You may elect to license modified versions of this file under the
* terms and conditions of either the GPL or the CDDL or both.
*/
#define RTASN1TMPL_DECL RTDECL
/*
* X.509 Validity.
*/
#define RTASN1TMPL_TYPE RTCRX509VALIDITY
#define RTASN1TMPL_EXT_NAME RTCrX509Validity
#define RTASN1TMPL_INT_NAME rtCrX509Validity
RTASN1TMPL_BEGIN_SEQCORE();
RTASN1TMPL_MEMBER( NotBefore, RTASN1TIME, RTAsn1Time);
RTASN1TMPL_MEMBER( NotAfter, RTASN1TIME, RTAsn1Time);
RTASN1TMPL_EXEC_CHECK_SANITY( rc = rtCrX509Validity_CheckSanityExtra(pThis, fFlags, pErrInfo, pszErrorTag) )
RTASN1TMPL_END_SEQCORE();
#undef RTASN1TMPL_TYPE
#undef RTASN1TMPL_EXT_NAME
#undef RTASN1TMPL_INT_NAME
/*
* One X.509 Algorithm Identifier.
*/
#define RTASN1TMPL_TYPE RTCRX509ALGORITHMIDENTIFIER
#define RTASN1TMPL_EXT_NAME RTCrX509AlgorithmIdentifier
#define RTASN1TMPL_INT_NAME rtCrX509AlgorithmIdentifier
RTASN1TMPL_BEGIN_SEQCORE();
RTASN1TMPL_MEMBER( Algorithm, RTASN1OBJID, RTAsn1ObjId);
RTASN1TMPL_MEMBER_OPT_ANY( Parameters, RTASN1DYNTYPE, RTAsn1DynType);
RTASN1TMPL_END_SEQCORE();
#undef RTASN1TMPL_TYPE
#undef RTASN1TMPL_EXT_NAME
#undef RTASN1TMPL_INT_NAME
/*
* Set of X.509 Algorithm Identifiers.
*/
#define RTASN1TMPL_TYPE RTCRX509ALGORITHMIDENTIFIERS
#define RTASN1TMPL_EXT_NAME RTCrX509AlgorithmIdentifiers
#define RTASN1TMPL_INT_NAME rtCrX509AlgorithmIdentifiers
RTASN1TMPL_SET_OF(RTCRX509ALGORITHMIDENTIFIER, RTCrX509AlgorithmIdentifier);
#undef RTASN1TMPL_TYPE
#undef RTASN1TMPL_EXT_NAME
#undef RTASN1TMPL_INT_NAME
/*
* One X.509 AttributeTypeAndValue.
*/
#define RTASN1TMPL_TYPE RTCRX509ATTRIBUTETYPEANDVALUE
#define RTASN1TMPL_EXT_NAME RTCrX509AttributeTypeAndValue
#define RTASN1TMPL_INT_NAME rtCrX509AttributeTypeAndValue
RTASN1TMPL_BEGIN_SEQCORE();
RTASN1TMPL_MEMBER( Type, RTASN1OBJID, RTAsn1ObjId);
RTASN1TMPL_MEMBER( Value, RTASN1DYNTYPE, RTAsn1DynType);
RTASN1TMPL_END_SEQCORE();
#undef RTASN1TMPL_TYPE
#undef RTASN1TMPL_EXT_NAME
#undef RTASN1TMPL_INT_NAME
/*
* Set of X.509 AttributeTypeAndValues / X.509 RelativeDistinguishedName.
*/
#define RTASN1TMPL_TYPE RTCRX509ATTRIBUTETYPEANDVALUES
#define RTASN1TMPL_EXT_NAME RTCrX509AttributeTypeAndValues
#define RTASN1TMPL_INT_NAME rtCrX509AttributeTypeAndValues
RTASN1TMPL_SET_OF(RTCRX509ATTRIBUTETYPEANDVALUE, RTCrX509AttributeTypeAndValue);
#undef RTASN1TMPL_TYPE
#undef RTASN1TMPL_EXT_NAME
#undef RTASN1TMPL_INT_NAME
/*
* X.509 Name.
*/
#define RTASN1TMPL_TYPE RTCRX509NAME
#define RTASN1TMPL_EXT_NAME RTCrX509Name
#define RTASN1TMPL_INT_NAME rtCrX509Name
#undef RTASN1TMPL_SET_SEQ_EXEC_CHECK_SANITY
#define RTASN1TMPL_SET_SEQ_EXEC_CHECK_SANITY() rc = rtCrX509Name_CheckSanityExtra(pThis, fFlags, pErrInfo, pszErrorTag)
RTASN1TMPL_SEQ_OF(RTCRX509RELATIVEDISTINGUISHEDNAME, RTCrX509RelativeDistinguishedName);
#undef RTASN1TMPL_SET_SEQ_EXEC_CHECK_SANITY
#define RTASN1TMPL_SET_SEQ_EXEC_CHECK_SANITY() do { } while (0)
#undef RTASN1TMPL_TYPE
#undef RTASN1TMPL_EXT_NAME
#undef RTASN1TMPL_INT_NAME
/*
* One X.509 OtherName.
* Note! This is simplified and might not work correctly for all types with
* non-DER compatible encodings.
*/
#define RTASN1TMPL_TYPE RTCRX509OTHERNAME
#define RTASN1TMPL_EXT_NAME RTCrX509OtherName
#define RTASN1TMPL_INT_NAME rtCrX509OtherName
RTASN1TMPL_BEGIN_SEQCORE();
RTASN1TMPL_MEMBER( TypeId, RTASN1OBJID, RTAsn1ObjId);
RTASN1TMPL_MEMBER( Value, RTASN1DYNTYPE, RTAsn1DynType);
RTASN1TMPL_END_SEQCORE();
#undef RTASN1TMPL_TYPE
#undef RTASN1TMPL_EXT_NAME
#undef RTASN1TMPL_INT_NAME
/*
* One X.509 GeneralName.
* Note! This is simplified and might not work correctly for all types with
* non-DER compatible encodings.
*/
#define RTASN1TMPL_TYPE RTCRX509GENERALNAME
#define RTASN1TMPL_EXT_NAME RTCrX509GeneralName
#define RTASN1TMPL_INT_NAME rtCrX509GeneralName
RTASN1TMPL_BEGIN_PCHOICE();
RTASN1TMPL_PCHOICE_ITAG( 0, RTCRX509GENERALNAMECHOICE_OTHER_NAME, u.pT0_OtherName, OtherName, RTCRX509OTHERNAME, RTCrX509OtherName);
RTASN1TMPL_PCHOICE_ITAG_CP( 1, RTCRX509GENERALNAMECHOICE_RFC822_NAME, u.pT1_Rfc822, Rfc822, RTASN1STRING, RTAsn1Ia5String);
RTASN1TMPL_PCHOICE_ITAG_CP( 2, RTCRX509GENERALNAMECHOICE_DNS_NAME, u.pT2_DnsName, DnsType, RTASN1STRING, RTAsn1Ia5String);
RTASN1TMPL_PCHOICE_XTAG( 3, RTCRX509GENERALNAMECHOICE_X400_ADDRESS, u.pT3, CtxTag3, X400Address, RTASN1DYNTYPE, RTAsn1DynType); /** @todo */
RTASN1TMPL_PCHOICE_XTAG( 4, RTCRX509GENERALNAMECHOICE_DIRECTORY_NAME, u.pT4, CtxTag4, DirectoryName, RTCRX509NAME, RTCrX509Name);
RTASN1TMPL_PCHOICE_XTAG( 5, RTCRX509GENERALNAMECHOICE_EDI_PARTY_NAME, u.pT5, CtxTag5, EdiPartyName, RTASN1DYNTYPE, RTAsn1DynType); /** @todo */
RTASN1TMPL_PCHOICE_ITAG_CP( 6, RTCRX509GENERALNAMECHOICE_URI, u.pT6_Uri, Uri, RTASN1STRING, RTAsn1Ia5String);
RTASN1TMPL_PCHOICE_ITAG_CP( 7, RTCRX509GENERALNAMECHOICE_IP_ADDRESS, u.pT7_IpAddress, IpAddress, RTASN1OCTETSTRING, RTAsn1OctetString); /** @todo Constraints */
RTASN1TMPL_PCHOICE_ITAG_CP( 8, RTCRX509GENERALNAMECHOICE_REGISTERED_ID, u.pT8_RegisteredId,RegisteredId,RTASN1OBJID, RTAsn1ObjId);
RTASN1TMPL_END_PCHOICE();
#undef RTASN1TMPL_TYPE
#undef RTASN1TMPL_EXT_NAME
#undef RTASN1TMPL_INT_NAME
/*
* Sequence of X.509 GeneralNames.
*/
#define RTASN1TMPL_TYPE RTCRX509GENERALNAMES
#define RTASN1TMPL_EXT_NAME RTCrX509GeneralNames
#define RTASN1TMPL_INT_NAME rtCrX509GeneralNames
RTASN1TMPL_SEQ_OF(RTCRX509GENERALNAME, RTCrX509GeneralName);
#undef RTASN1TMPL_TYPE
#undef RTASN1TMPL_EXT_NAME
#undef RTASN1TMPL_INT_NAME
/*
* X.509 UniqueIdentifier - RTASN1BITSTRING alias.
*/
/*
* X.509 SubjectPublicKeyInfo.
*/
#define RTASN1TMPL_TYPE RTCRX509SUBJECTPUBLICKEYINFO
#define RTASN1TMPL_EXT_NAME RTCrX509SubjectPublicKeyInfo
#define RTASN1TMPL_INT_NAME rtCrX509SubjectPublicKeyInfo
RTASN1TMPL_BEGIN_SEQCORE();
RTASN1TMPL_MEMBER( Algorithm, RTCRX509ALGORITHMIDENTIFIER, RTCrX509AlgorithmIdentifier);
RTASN1TMPL_MEMBER( SubjectPublicKey, RTASN1BITSTRING, RTAsn1BitString);
RTASN1TMPL_EXEC_CHECK_SANITY( rc = rtCrX509SubjectPublicKeyInfo_CheckSanityExtra(pThis, fFlags, pErrInfo, pszErrorTag) )
RTASN1TMPL_END_SEQCORE();
#undef RTASN1TMPL_TYPE
#undef RTASN1TMPL_EXT_NAME
#undef RTASN1TMPL_INT_NAME
/*
* X.509 AuthorityKeyIdentifier (IPRT representation).
*/
#define RTASN1TMPL_TYPE RTCRX509AUTHORITYKEYIDENTIFIER
#define RTASN1TMPL_EXT_NAME RTCrX509AuthorityKeyIdentifier
#define RTASN1TMPL_INT_NAME rtCrX509AuthorityKeyIdentifier
RTASN1TMPL_BEGIN_SEQCORE();
RTASN1TMPL_MEMBER_OPT_ITAG_CP( KeyIdentifier, RTASN1OCTETSTRING, RTAsn1OctetString, 0);
RTASN1TMPL_MEMBER_OPT_ITAG( AuthorityCertIssuer, RTCRX509GENERALNAMES, RTCrX509GeneralNames, 1);
RTASN1TMPL_MEMBER_OPT_ITAG_CP( AuthorityCertSerialNumber, RTASN1INTEGER, RTAsn1Integer, 2);
RTASN1TMPL_END_SEQCORE();
#undef RTASN1TMPL_TYPE
#undef RTASN1TMPL_EXT_NAME
#undef RTASN1TMPL_INT_NAME
/*
* X.509 OldAuthorityKeyIdentifier (IPRT representation).
*/
#define RTASN1TMPL_TYPE RTCRX509OLDAUTHORITYKEYIDENTIFIER
#define RTASN1TMPL_EXT_NAME RTCrX509OldAuthorityKeyIdentifier
#define RTASN1TMPL_INT_NAME rtCrX509OldAuthorityKeyIdentifier
RTASN1TMPL_BEGIN_SEQCORE();
RTASN1TMPL_MEMBER_OPT_ITAG_CP( KeyIdentifier, RTASN1OCTETSTRING, RTAsn1OctetString, 0);
RTASN1TMPL_MEMBER_OPT_XTAG( T1, CtxTag1, AuthorityCertIssuer, RTCRX509NAME, RTCrX509Name, 1);
RTASN1TMPL_MEMBER_OPT_ITAG_CP( AuthorityCertSerialNumber, RTASN1INTEGER, RTAsn1Integer, 2);
RTASN1TMPL_END_SEQCORE();
#undef RTASN1TMPL_TYPE
#undef RTASN1TMPL_EXT_NAME
#undef RTASN1TMPL_INT_NAME
/*
* One X.509 PolicyQualifierInfo.
*/
#define RTASN1TMPL_TYPE RTCRX509POLICYQUALIFIERINFO
#define RTASN1TMPL_EXT_NAME RTCrX509PolicyQualifierInfo
#define RTASN1TMPL_INT_NAME rtCrX509PolicyQualifierInfo
RTASN1TMPL_BEGIN_SEQCORE();
RTASN1TMPL_MEMBER( PolicyQualifierId, RTASN1OBJID, RTAsn1ObjId);
RTASN1TMPL_MEMBER( Qualifier, RTASN1DYNTYPE, RTAsn1DynType);
RTASN1TMPL_END_SEQCORE();
#undef RTASN1TMPL_TYPE
#undef RTASN1TMPL_EXT_NAME
#undef RTASN1TMPL_INT_NAME
/*
* Sequence of X.509 PolicyQualifierInfo.
*/
#define RTASN1TMPL_TYPE RTCRX509POLICYQUALIFIERINFOS
#define RTASN1TMPL_EXT_NAME RTCrX509PolicyQualifierInfos
#define RTASN1TMPL_INT_NAME rtCrX509PolicyQualifierInfos
RTASN1TMPL_SEQ_OF(RTCRX509POLICYQUALIFIERINFO, RTCrX509PolicyQualifierInfo);
#undef RTASN1TMPL_TYPE
#undef RTASN1TMPL_EXT_NAME
#undef RTASN1TMPL_INT_NAME
/*
* One X.509 PolicyInformation.
*/
#define RTASN1TMPL_TYPE RTCRX509POLICYINFORMATION
#define RTASN1TMPL_EXT_NAME RTCrX509PolicyInformation
#define RTASN1TMPL_INT_NAME rtCrX509PolicyInformation
RTASN1TMPL_BEGIN_SEQCORE();
RTASN1TMPL_MEMBER( PolicyIdentifier, RTASN1OBJID, RTAsn1ObjId);
RTASN1TMPL_MEMBER_OPT_ITAG_UC( PolicyQualifiers, RTCRX509POLICYQUALIFIERINFOS, RTCrX509PolicyQualifierInfos, ASN1_TAG_SEQUENCE);
RTASN1TMPL_END_SEQCORE();
#undef RTASN1TMPL_TYPE
#undef RTASN1TMPL_EXT_NAME
#undef RTASN1TMPL_INT_NAME
/*
* Sequence of X.509 CertificatePolicies.
*/
#define RTASN1TMPL_TYPE RTCRX509CERTIFICATEPOLICIES
#define RTASN1TMPL_EXT_NAME RTCrX509CertificatePolicies
#define RTASN1TMPL_INT_NAME rtCrX509CertificatePolicies
RTASN1TMPL_SEQ_OF(RTCRX509POLICYINFORMATION, RTCrX509PolicyInformation);
#undef RTASN1TMPL_TYPE
#undef RTASN1TMPL_EXT_NAME
#undef RTASN1TMPL_INT_NAME
/*
* One X.509 PolicyMapping (IPRT representation).
*/
#define RTASN1TMPL_TYPE RTCRX509POLICYMAPPING
#define RTASN1TMPL_EXT_NAME RTCrX509PolicyMapping
#define RTASN1TMPL_INT_NAME rtCrX509PolicyMapping
RTASN1TMPL_BEGIN_SEQCORE();
RTASN1TMPL_MEMBER( IssuerDomainPolicy, RTASN1OBJID, RTAsn1ObjId);
RTASN1TMPL_MEMBER( SubjectDomainPolicy, RTASN1OBJID, RTAsn1ObjId);
RTASN1TMPL_END_SEQCORE();
#undef RTASN1TMPL_TYPE
#undef RTASN1TMPL_EXT_NAME
#undef RTASN1TMPL_INT_NAME
/*
* Sequence of X.509 PolicyMappings (IPRT representation).
*/
#define RTASN1TMPL_TYPE RTCRX509POLICYMAPPINGS
#define RTASN1TMPL_EXT_NAME RTCrX509PolicyMappings
#define RTASN1TMPL_INT_NAME rtCrX509PolicyMappings
RTASN1TMPL_SEQ_OF(RTCRX509POLICYMAPPING, RTCrX509PolicyMapping);
#undef RTASN1TMPL_TYPE
#undef RTASN1TMPL_EXT_NAME
#undef RTASN1TMPL_INT_NAME
/*
* X.509 BasicConstraints (IPRT representation).
*/
#define RTASN1TMPL_TYPE RTCRX509BASICCONSTRAINTS
#define RTASN1TMPL_EXT_NAME RTCrX509BasicConstraints
#define RTASN1TMPL_INT_NAME rtCrX509BasicConstraints
RTASN1TMPL_BEGIN_SEQCORE();
RTASN1TMPL_MEMBER_DEF_ITAG_UP( CA, RTASN1BOOLEAN, RTAsn1Boolean, ASN1_TAG_BOOLEAN, false);
RTASN1TMPL_MEMBER_OPT_ITAG_UP( PathLenConstraint, RTASN1INTEGER, RTAsn1Integer, ASN1_TAG_INTEGER);
RTASN1TMPL_END_SEQCORE();
#undef RTASN1TMPL_TYPE
#undef RTASN1TMPL_EXT_NAME
#undef RTASN1TMPL_INT_NAME
/*
* X.509 GeneralSubtree (IPRT representation).
*/
#define RTASN1TMPL_TYPE RTCRX509GENERALSUBTREE
#define RTASN1TMPL_EXT_NAME RTCrX509GeneralSubtree
#define RTASN1TMPL_INT_NAME rtCrX509GeneralSubtree
RTASN1TMPL_BEGIN_SEQCORE();
RTASN1TMPL_MEMBER( Base, RTCRX509GENERALNAME, RTCrX509GeneralName);
RTASN1TMPL_MEMBER_DEF_ITAG_UP( Minimum, RTASN1INTEGER, RTAsn1Integer, ASN1_TAG_INTEGER, 0);
RTASN1TMPL_MEMBER_OPT_ITAG_UP( Maximum, RTASN1INTEGER, RTAsn1Integer, ASN1_TAG_INTEGER);
RTASN1TMPL_END_SEQCORE();
#undef RTASN1TMPL_TYPE
#undef RTASN1TMPL_EXT_NAME
#undef RTASN1TMPL_INT_NAME
/*
* Sequence of X.509 GeneralSubtrees (IPRT representation).
*/
#define RTASN1TMPL_TYPE RTCRX509GENERALSUBTREES
#define RTASN1TMPL_EXT_NAME RTCrX509GeneralSubtrees
#define RTASN1TMPL_INT_NAME rtCrX509GeneralSubtrees
RTASN1TMPL_SEQ_OF(RTCRX509GENERALSUBTREE, RTCrX509GeneralSubtree);
#undef RTASN1TMPL_TYPE
#undef RTASN1TMPL_EXT_NAME
#undef RTASN1TMPL_INT_NAME
/*
* X.509 NameConstraints (IPRT representation).
*/
#define RTASN1TMPL_TYPE RTCRX509NAMECONSTRAINTS
#define RTASN1TMPL_EXT_NAME RTCrX509NameConstraints
#define RTASN1TMPL_INT_NAME rtCrX509NameConstraints
RTASN1TMPL_BEGIN_SEQCORE();
RTASN1TMPL_MEMBER_OPT_XTAG( T0, CtxTag0, PermittedSubtrees, RTCRX509GENERALSUBTREES, RTCrX509GeneralSubtrees, 0);
RTASN1TMPL_MEMBER_OPT_XTAG( T1, CtxTag1, ExcludedSubtrees, RTCRX509GENERALSUBTREES, RTCrX509GeneralSubtrees, 1);
RTASN1TMPL_END_SEQCORE();
#undef RTASN1TMPL_TYPE
#undef RTASN1TMPL_EXT_NAME
#undef RTASN1TMPL_INT_NAME
/*
* X.509 PolicyConstraints (IPRT representation).
*/
#define RTASN1TMPL_TYPE RTCRX509POLICYCONSTRAINTS
#define RTASN1TMPL_EXT_NAME RTCrX509PolicyConstraints
#define RTASN1TMPL_INT_NAME rtCrX509PolicyConstraints
RTASN1TMPL_BEGIN_SEQCORE();
RTASN1TMPL_MEMBER_OPT_ITAG_CP( RequireExplicitPolicy, RTASN1INTEGER, RTAsn1Integer, 0);
RTASN1TMPL_MEMBER_OPT_ITAG_CP( InhibitPolicyMapping, RTASN1INTEGER, RTAsn1Integer, 1);
RTASN1TMPL_END_SEQCORE();
#undef RTASN1TMPL_TYPE
#undef RTASN1TMPL_EXT_NAME
#undef RTASN1TMPL_INT_NAME
/*
* One X.509 Extension.
*/
#define RTASN1TMPL_TYPE RTCRX509EXTENSION
#define RTASN1TMPL_EXT_NAME RTCrX509Extension
#define RTASN1TMPL_INT_NAME rtCrX509Extension
RTASN1TMPL_BEGIN_SEQCORE();
RTASN1TMPL_MEMBER( ExtnId, RTASN1OBJID, RTAsn1ObjId);
RTASN1TMPL_MEMBER_DEF_ITAG_UP( Critical, RTASN1BOOLEAN, RTAsn1Boolean, ASN1_TAG_BOOLEAN, false);
RTASN1TMPL_MEMBER( ExtnValue, RTASN1OCTETSTRING, RTAsn1OctetString);
RTASN1TMPL_EXEC_DECODE(rc = RTCrX509Extension_ExtnValue_DecodeAsn1(pCursor, fFlags, pThis, "ExtnValue"))
RTASN1TMPL_EXEC_CLONE( rc = rtCrX509Extension_ExtnValue_Clone(pThis, pSrc))
RTASN1TMPL_END_SEQCORE();
#undef RTASN1TMPL_TYPE
#undef RTASN1TMPL_EXT_NAME
#undef RTASN1TMPL_INT_NAME
/*
* Sequence of X.509 Extensions.
*/
#define RTASN1TMPL_TYPE RTCRX509EXTENSIONS
#define RTASN1TMPL_EXT_NAME RTCrX509Extensions
#define RTASN1TMPL_INT_NAME rtCrX509Extensions
RTASN1TMPL_SEQ_OF(RTCRX509EXTENSION, RTCrX509Extension);
#undef RTASN1TMPL_TYPE
#undef RTASN1TMPL_EXT_NAME
#undef RTASN1TMPL_INT_NAME
/*
* X.509 TbsCertificate.
*/
#define RTASN1TMPL_TYPE RTCRX509TBSCERTIFICATE
#define RTASN1TMPL_EXT_NAME RTCrX509TbsCertificate
#define RTASN1TMPL_INT_NAME rtCrX509TbsCertificate
RTASN1TMPL_BEGIN_SEQCORE();
RTASN1TMPL_MEMBER_OPT_XTAG( T0, CtxTag0, Version, RTASN1INTEGER, RTAsn1Integer, 0);
RTASN1TMPL_MEMBER( SerialNumber, RTASN1INTEGER, RTAsn1Integer);
RTASN1TMPL_MEMBER( Signature, RTCRX509ALGORITHMIDENTIFIER, RTCrX509AlgorithmIdentifier);
RTASN1TMPL_MEMBER( Issuer, RTCRX509NAME, RTCrX509Name);
RTASN1TMPL_MEMBER( Validity, RTCRX509VALIDITY, RTCrX509Validity);
RTASN1TMPL_MEMBER( Subject, RTCRX509NAME, RTCrX509Name);
RTASN1TMPL_MEMBER( SubjectPublicKeyInfo, RTCRX509SUBJECTPUBLICKEYINFO, RTCrX509SubjectPublicKeyInfo);
RTASN1TMPL_MEMBER_OPT_XTAG( T1, CtxTag1, IssuerUniqueId, RTCRX509UNIQUEIDENTIFIER, RTCrX509UniqueIdentifier, 1);
RTASN1TMPL_MEMBER_OPT_XTAG( T2, CtxTag2, SubjectUniqueId, RTCRX509UNIQUEIDENTIFIER, RTCrX509UniqueIdentifier, 2);
RTASN1TMPL_MEMBER_OPT_XTAG( T3, CtxTag3, Extensions, RTCRX509EXTENSIONS, RTCrX509Extensions, 3);
RTASN1TMPL_EXEC_DECODE( rc = RTCrX509TbsCertificate_ReprocessExtensions(pThis, pCursor->pPrimary->pErrInfo) )
RTASN1TMPL_EXEC_CLONE( rc = RTCrX509TbsCertificate_ReprocessExtensions(pThis, NULL) )
RTASN1TMPL_EXEC_CHECK_SANITY( rc = rtCrX509TbsCertificate_CheckSanityExtra(pThis, fFlags, pErrInfo, pszErrorTag) )
RTASN1TMPL_END_SEQCORE();
#undef RTASN1TMPL_TYPE
#undef RTASN1TMPL_EXT_NAME
#undef RTASN1TMPL_INT_NAME
/*
* One X.509 Certificate.
*/
#define RTASN1TMPL_TYPE RTCRX509CERTIFICATE
#define RTASN1TMPL_EXT_NAME RTCrX509Certificate
#define RTASN1TMPL_INT_NAME rtCrX509Certificate
RTASN1TMPL_BEGIN_SEQCORE();
RTASN1TMPL_MEMBER( TbsCertificate, RTCRX509TBSCERTIFICATE, RTCrX509TbsCertificate);
RTASN1TMPL_MEMBER( SignatureAlgorithm, RTCRX509ALGORITHMIDENTIFIER, RTCrX509AlgorithmIdentifier);
RTASN1TMPL_MEMBER( SignatureValue, RTASN1BITSTRING, RTAsn1BitString);
RTASN1TMPL_EXEC_CHECK_SANITY( rc = rtCrX509Certificate_CheckSanityExtra(pThis, fFlags, pErrInfo, pszErrorTag) )
RTASN1TMPL_END_SEQCORE();
#undef RTASN1TMPL_TYPE
#undef RTASN1TMPL_EXT_NAME
#undef RTASN1TMPL_INT_NAME
/*
* Set of X.509 Certificates.
*/
/** @todo Microsoft Hacks. ExtendedCertificates. */
#define RTASN1TMPL_TYPE RTCRX509CERTIFICATES
#define RTASN1TMPL_EXT_NAME RTCrX509Certificates
#define RTASN1TMPL_INT_NAME rtCrX509Certificates
RTASN1TMPL_SET_OF(RTCRX509CERTIFICATE, RTCrX509Certificate);
#undef RTASN1TMPL_TYPE
#undef RTASN1TMPL_EXT_NAME
#undef RTASN1TMPL_INT_NAME
|
c8256e2cb63b233804fe7db2ffe14eda44ee5449
|
14ac14bee6ddd3f74937ff316b37cb947a4ef882
|
/Swap_1.c
|
0021579ea5f9dadd0e095f98d29dfe6fca0be235
|
[
"MIT"
] |
permissive
|
gouravthakur39/beginners-C-program-examples
|
ebe18c68c9b889d0622dc4d45ee0584e63a98d7c
|
373d27c131e35bacdbf5c500f79fd234c6d4ec9b
|
refs/heads/master
| 2023-09-02T16:15:01.129754
| 2022-07-08T11:50:46
| 2022-07-08T11:50:46
| 150,301,917
| 498
| 403
|
MIT
| 2023-08-07T16:11:02
| 2018-09-25T17:12:58
|
C
|
UTF-8
|
C
| false
| false
| 143
|
c
|
Swap_1.c
|
#include<stdio.h>
void main()
{ int a,b,t;
printf("Enter two Numbers : ");
scanf("%d %d",&a,&b);
t=b;
b=a;
a=t;
printf("Swap is %d %d",a,b);
}
|
8f580738fabfeb2e7e25bdee6753e84620895873
|
99bdb3251fecee538e0630f15f6574054dfc1468
|
/bsp/n32/libraries/N32WB452_Firmware_Library/n32wb452_ble_driver/profile/app_sec.c
|
63b6049eca91dfa646c0e87b1926b8ad48c53232
|
[
"Apache-2.0",
"Zlib",
"LicenseRef-scancode-proprietary-license",
"MIT",
"BSD-3-Clause",
"X11",
"BSD-4-Clause-UC",
"LicenseRef-scancode-unknown-license-reference"
] |
permissive
|
RT-Thread/rt-thread
|
03a7c52c2aeb1b06a544143b0e803d72f47d1ece
|
3602f891211904a27dcbd51e5ba72fefce7326b2
|
refs/heads/master
| 2023-09-01T04:10:20.295801
| 2023-08-31T16:20:55
| 2023-08-31T16:20:55
| 7,408,108
| 9,599
| 5,805
|
Apache-2.0
| 2023-09-14T13:37:26
| 2013-01-02T14:49:21
|
C
|
UTF-8
|
C
| false
| false
| 14,918
|
c
|
app_sec.c
|
/**
****************************************************************************************
*
* @file app_sec.c
*
* @brief Application Security Entry Point
*
* Copyright (C) RivieraWaves 2009-2015
*
*
****************************************************************************************
*/
/**
****************************************************************************************
* @addtogroup APP
* @{
****************************************************************************************
*/
/*
* INCLUDE FILES
****************************************************************************************
*/
#include "rwip_config.h"
#include <stdbool.h>
//#include "ble_arch.h"
#if (BLE_APP_SEC)
#include <string.h>
#include "co_math.h"
#include "gapc_task.h" // GAP Controller Task API Definition
#include "gapm_task.h" // GAPM task API definition
#include "gap.h" // GAP Definition
#include "gapc.h" // GAPC Definition
#include "gapm.h"
#include "prf_types.h"
#include "app.h" // Application API Definition
#include "app_sec.h" // Application Security API Definition
#include "app_task.h" // Application Manager API Definition
#include "interface.h"
#if (NVDS_SUPPORT)
#include "nvds.h" // NVDS API Definitions
#endif //(NVDS_SUPPORT)
/*
* GLOBAL VARIABLE DEFINITIONS
****************************************************************************************
*/
/// Application Security Environment Structure
struct app_sec_env_tag app_sec_env;
//struct current_bond_info_t current_bond_info;
/*
* GLOBAL FUNCTION DEFINITIONS
****************************************************************************************
*/
static int app_sec_msg_dflt_handler(ke_msg_id_t const msgid,
void*param,
ke_task_id_t const dest_id,
ke_task_id_t const src_id)
{
return (KE_MSG_CONSUMED);
}
void app_sec_init()
{
/*------------------------------------------------------
* RETRIEVE BOND STATUS
*------------------------------------------------------*/
#if (NVDS_SUPPORT)
uint8_t length = NVDS_LEN_PERIPH_BONDED;
// Get bond status from NVDS
if (nvds_get(NVDS_TAG_PERIPH_BONDED, &length, (uint8_t *)&app_sec_env.bonded) != NVDS_OK)
{
// If read value is invalid, set status to not bonded
app_sec_env.bonded = false;
}
/************************************************************************************************************/
uint8_t length1 = NVDS_LEN_DEVICE_NUM;
if (nvds_get(NVDS_TAG_DEVICE_NUM, &length1, &app_sec_env.device_num) != NVDS_OK)
{
// If read value is invalid, set device number to 0
app_sec_env.device_num = 0;
}
/************************************************************************************************************/
#endif //(NVDS_SUPPORT)
}
void app_sec_send_security_req(uint8_t conidx)
{
//start to security cmd
struct gapc_security_cmd *cmd = KE_MSG_ALLOC(GAPC_SECURITY_CMD,
KE_BUILD_ID(TASK_GAPC, app_env.conidx), TASK_APP, gapc_security_cmd);// Security request
cmd->operation = GAPC_SECURITY_REQ;
cmd->auth = GAP_AUTH_REQ_NO_MITM_BOND;
//iocap will select MITM or not
// Send the message
ke_msg_send(cmd);
}
/**
****************************************************************************************
* @brief Handles reception of bond request command
*
* @param[in] msgid Id of the message received.
* @param[in] param Pointer to the parameters of the message.
* @param[in] dest_id ID of the receiving task instance (TASK_GAP).
* @param[in] src_id ID of the sending task instance.
*
* @return If the message was consumed or not.
****************************************************************************************
*/
static int gapc_bond_req_ind_handler(ke_msg_id_t const msgid,struct gapc_bond_req_ind const *param,ke_task_id_t const dest_id,ke_task_id_t const src_id)
{
struct gapc_bond_cfm *cfm = KE_MSG_ALLOC(GAPC_BOND_CFM,src_id, TASK_APP,gapc_bond_cfm);
switch (param->request)
{
case (GAPC_PAIRING_REQ):
{
cfm->request = GAPC_PAIRING_RSP;
cfm->accept = true;
// OOB information
cfm->data.pairing_feat.oob = GAP_OOB_AUTH_DATA_NOT_PRESENT;
// Encryption key size
cfm->data.pairing_feat.key_size = KEY_LEN;
// IO capabilities
cfm->data.pairing_feat.iocap = app_env.iocap;
// Authentication requirements
cfm->data.pairing_feat.auth = GAP_AUTH_REQ_NO_MITM_BOND; //GAP_AUTH_REQ_NO_MITM_BOND;
cfm->data.pairing_feat.ikey_dist = GAP_KDIST_NONE;
//Responder key distribution
cfm->data.pairing_feat.rkey_dist = GAP_KDIST_ENCKEY;
//Security requirements
cfm->data.pairing_feat.sec_req = GAP_NO_SEC;
}
break;
case(GAPC_LTK_EXCH):
{
uint8_t counter;
cfm->data.ltk.ediv = (uint16_t)( (co_rand_word() + app_env.loc_irk[1]*256 + app_env.loc_irk[0]) );
for(counter = 0; counter < RAND_NB_LEN; counter++)
{
cfm->data.ltk.randnb.nb[counter] = (uint8_t)((co_rand_word() + app_env.loc_irk[counter]) );
}
for(counter = 0; counter < KEY_LEN; counter++)
{
cfm->data.ltk.ltk.key[counter] = (uint8_t)((co_rand_word() + app_env.loc_irk[counter]) );
}
cfm->request = GAPC_LTK_EXCH;
cfm->accept = true;
#if (NVDS_SUPPORT)
switch (app_sec_env.device_num % 5)
{
case 0:
if (nvds_put(NVDS_TAG_LTK, NVDS_LEN_LTK, (uint8_t *)&cfm->data.ltk) != NVDS_OK)
{
ASSERT_ERR(0);
}
break;
case 1:
if (nvds_put(NVDS_TAG_LTK1, NVDS_LEN_LTK1, (uint8_t *)&cfm->data.ltk) != NVDS_OK)
{
ASSERT_ERR(0);
}
break;
case 2:
if (nvds_put(NVDS_TAG_LTK2, NVDS_LEN_LTK2, (uint8_t *)&cfm->data.ltk) != NVDS_OK)
{
ASSERT_ERR(0);
}
break;
case 3:
if (nvds_put(NVDS_TAG_LTK3, NVDS_LEN_LTK3, (uint8_t *)&cfm->data.ltk) != NVDS_OK)
{
ASSERT_ERR(0);
}
break;
case 4:
if (nvds_put(NVDS_TAG_LTK4, NVDS_LEN_LTK4, (uint8_t *)&cfm->data.ltk) != NVDS_OK)
{
ASSERT_ERR(0);
}
break;
default:
break;
}
app_sec_env.device_num = (app_sec_env.device_num + 1) % 5;
uint8_t device_num[1]={0};
uint8_t length = NVDS_LEN_DEVICE_NUM;
nvds_get(NVDS_TAG_DEVICE_NUM, &length, device_num);
if (device_num[0]<app_sec_env.device_num)
{
if (nvds_put(NVDS_TAG_DEVICE_NUM, NVDS_LEN_DEVICE_NUM,&app_sec_env.device_num) != NVDS_OK)
{
// An error has occurred during access to the NVDS
ASSERT_ERR(0);
}
}
#endif // #if (NVDS_SUPPORT)
}
break;
case (GAPC_IRK_EXCH):
{
#if (NVDS_SUPPORT)
uint8_t addr_len = BD_ADDR_LEN;
#endif //(NVDS_SUPPORT)
cfm->request = GAPC_IRK_EXCH;
cfm->accept = true;
// Load IRK
memcpy(cfm->data.irk.irk.key, app_env.loc_irk, KEY_LEN);
// load device address
cfm->data.irk.addr.addr_type = ADDR_PUBLIC;
#if (NVDS_SUPPORT)
if (nvds_get(NVDS_TAG_BD_ADDRESS, &addr_len, cfm->data.irk.addr.addr.addr) != NVDS_OK)
#endif //(NVDS_SUPPORT)
{
ASSERT_ERR(0);
}
}
break;
case (GAPC_TK_EXCH):
{
if (param->data.tk_type == GAP_TK_DISPLAY)
{
cfm->request = GAPC_TK_EXCH;
cfm->accept = true;
memset(cfm->data.tk.key, 0, KEY_LEN);
cfm->data.tk.key[0] = (uint8_t)((app_env.pin_code & 0x000000FF) >> 0);
cfm->data.tk.key[1] = (uint8_t)((app_env.pin_code & 0x0000FF00) >> 8);
cfm->data.tk.key[2] = (uint8_t)((app_env.pin_code & 0x00FF0000) >> 16);
cfm->data.tk.key[3] = (uint8_t)((app_env.pin_code & 0xFF000000) >> 24);
}
else
{
ASSERT_ERR(0);
}
}
break;
default:
{
ASSERT_ERR(0);
}
break;
}
// Send the message
// interface_env.delay_ms(5);
ke_msg_send(cfm);
return (KE_MSG_CONSUMED);
}
/**
****************************************************************************************
* @brief Handles reception of bond indication
*
* @param[in] msgid Id of the message received.
* @param[in] param Pointer to the parameters of the message.
* @param[in] dest_id ID of the receiving task instance (TASK_GAP).
* @param[in] src_id ID of the sending task instance.
*
* @return If the message was consumed or not.
****************************************************************************************
*/
static int gapc_bond_ind_handler(ke_msg_id_t const msgid,struct gapc_bond_ind const *param,ke_task_id_t const dest_id,ke_task_id_t const src_id)
{
switch (param->info)
{
case (GAPC_PAIRING_SUCCEED):
{
// Update the bonding status in the environment
app_sec_env.bonded = true;
ke_state_set(TASK_APP, APPM_ENCRYPTED);//lizhk add
// Update the bonding status in the environment
#if (PLF_NVDS)
// if (nvds_put(NVDS_TAG_PERIPH_BONDED, NVDS_LEN_PERIPH_BONDED,(uint8_t *)&app_sec_env.bonded) != NVDS_OK)
// {
// // An error has occurred during access to the NVDS
// ASSERT_ERR(0);
// }
// gapc_save_bond_info();
#endif //(PLF_NVDS)
}
break;
case (GAPC_REPEATED_ATTEMPT):
{
appm_disconnect();
}
break;
case (GAPC_IRK_EXCH):
{
}
break;
case (GAPC_PAIRING_FAILED):
{
app_sec_send_security_req(0);
}
break;
// In Secure Connections we get BOND_IND with SMPC calculated LTK
case (GAPC_LTK_EXCH) :
{
}
break;
case (GAPC_CSRK_EXCH) :
{
}
break;
default:
{
ASSERT_ERR(0);
}
break;
}
return (KE_MSG_CONSUMED);
}
extern void BT_handle(void);
static int gapc_encrypt_req_ind_handler(ke_msg_id_t const msgid,
struct gapc_encrypt_req_ind const *param,
ke_task_id_t const dest_id,
ke_task_id_t const src_id)
{
#if (NVDS_SUPPORT)
// LTK value
struct gapc_ltk ltk;
// Length
uint8_t length = NVDS_LEN_LTK;
#endif // #if (NVDS_SUPPORT)
// Prepare the GAPC_ENCRYPT_CFM message
struct gapc_encrypt_cfm *cfm = KE_MSG_ALLOC(GAPC_ENCRYPT_CFM,src_id, TASK_APP,gapc_encrypt_cfm);
cfm->found = false;
//移出未使用变量 app_sec_env.bonded
#if (NVDS_SUPPORT)
// Retrieve the required informations from NVD
uint8_t err = 1;
uint8_t device_num[1]={0};
uint8_t length1 = NVDS_LEN_DEVICE_NUM;
nvds_get(NVDS_TAG_DEVICE_NUM, &length1, device_num);
for(uint8_t i=0;i<device_num[0];i++)
{
switch (i+1)
{
case 1:
err = nvds_get(NVDS_TAG_LTK, &length, (uint8_t *)<k);
break;
case 2:
err = nvds_get(NVDS_TAG_LTK1, &length, (uint8_t *)<k);
break;
case 3:
err = nvds_get(NVDS_TAG_LTK2, &length, (uint8_t *)<k);
break;
case 4:
err = nvds_get(NVDS_TAG_LTK3, &length, (uint8_t *)<k);
break;
case 5:
err = nvds_get(NVDS_TAG_LTK4, &length, (uint8_t *)<k);
break;
default:
break;
}
if (err == NVDS_OK)
{
// Check if the provided EDIV and Rand Nb values match with the stored values
if ((param->ediv == ltk.ediv) &&!memcmp(¶m->rand_nb.nb[0], <k.randnb.nb[0], sizeof(struct rand_nb)))
{
cfm->found = true;
cfm->key_size = 16;
memcpy(&cfm->ltk, <k.ltk, sizeof(struct gap_sec_key));
app_env.con_device_num = i;
ke_state_set(TASK_APP,APPM_ENCRYPTED);
break;
}
}
}
uint8_t found_flag = cfm->found;
#endif // #if (NVDS_SUPPORT)
ke_msg_send(cfm);
if (found_flag == false)
{
uint8_t schedule_num = 10;
while (schedule_num--)
{
BT_handle();
}
eif_delay_ms(200);
app_sec_send_security_req(0);
}
return (KE_MSG_CONSUMED);
}
static int gapc_encrypt_ind_handler(ke_msg_id_t const msgid,
struct gapc_encrypt_ind const *param,
ke_task_id_t const dest_id,
ke_task_id_t const src_id)
{
ke_state_set(TASK_APP, APPM_ENCRYPTED);
return (KE_MSG_CONSUMED);
}
/*
* LOCAL VARIABLE DEFINITIONS
****************************************************************************************
*/
/// Default State handlers definition
const struct ke_msg_handler app_sec_msg_handler_list[] =
{
// Note: first message is latest message checked by kernel so default is put on top.
{KE_MSG_DEFAULT_HANDLER, (ke_msg_func_t)app_sec_msg_dflt_handler},
{GAPC_BOND_REQ_IND, (ke_msg_func_t)gapc_bond_req_ind_handler},
{GAPC_BOND_IND, (ke_msg_func_t)gapc_bond_ind_handler},
{GAPC_ENCRYPT_REQ_IND, (ke_msg_func_t)gapc_encrypt_req_ind_handler},
{GAPC_ENCRYPT_IND, (ke_msg_func_t)gapc_encrypt_ind_handler},
};
const struct ke_state_handler app_sec_table_handler ={&app_sec_msg_handler_list[0], (sizeof(app_sec_msg_handler_list) / sizeof(struct ke_msg_handler))};
#endif //(BLE_APP_SEC)
/// @} APP
|
813ce4204ab4c354b3e1febf69f188e77c66d858
|
e9bf17c178cc70bf36a7cebc23d98719cb11b0f9
|
/esp32/examples/ttgo_demo/components/esp32-camera/driver/camera.c
|
f56b5ce622916401610c0143a359a1dd5d1f2d6e
|
[
"Apache-2.0",
"BSD-3-Clause"
] |
permissive
|
joachimBurket/esp32-opencv
|
41bc9c0c44ce21e561ca574c4b0dbba8ba431b2a
|
f485b59d7b43b0a2f77a5ab547e2597929f7094a
|
refs/heads/master
| 2021-08-15T10:43:01.564233
| 2021-08-06T14:43:41
| 2021-08-06T14:43:41
| 249,403,512
| 236
| 52
|
NOASSERTION
| 2020-10-13T20:35:11
| 2020-03-23T10:45:26
|
C++
|
UTF-8
|
C
| false
| false
| 47,805
|
c
|
camera.c
|
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include "time.h"
#include "sys/time.h"
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "freertos/semphr.h"
#include "soc/soc.h"
#include "soc/gpio_sig_map.h"
#include "soc/i2s_reg.h"
#include "soc/i2s_struct.h"
#include "soc/io_mux_reg.h"
#include "driver/gpio.h"
#include "driver/rtc_io.h"
#include "driver/periph_ctrl.h"
#include "esp_intr_alloc.h"
#include "esp_system.h"
#include "nvs_flash.h"
#include "nvs.h"
#include "sensor.h"
#include "sccb.h"
#include "esp_camera.h"
#include "camera_common.h"
#include "xclk.h"
#if CONFIG_OV2640_SUPPORT
#include "ov2640.h"
#endif
#if CONFIG_OV7725_SUPPORT
#include "ov7725.h"
#endif
#if CONFIG_OV3660_SUPPORT
#include "ov3660.h"
#endif
#if CONFIG_OV5640_SUPPORT
#include "ov5640.h"
#endif
typedef enum {
CAMERA_NONE = 0,
CAMERA_UNKNOWN = 1,
CAMERA_OV7725 = 7725,
CAMERA_OV2640 = 2640,
CAMERA_OV3660 = 3660,
CAMERA_OV5640 = 5640,
} camera_model_t;
#define REG_PID 0x0A
#define REG_VER 0x0B
#define REG_MIDH 0x1C
#define REG_MIDL 0x1D
#define REG16_CHIDH 0x300A
#define REG16_CHIDL 0x300B
#if defined(ARDUINO_ARCH_ESP32) && defined(CONFIG_ARDUHAL_ESP_LOG)
#include "esp32-hal-log.h"
#define TAG ""
#else
#include "esp_log.h"
static const char* TAG = "camera";
#endif
static const char* CAMERA_SENSOR_NVS_KEY = "sensor";
static const char* CAMERA_PIXFORMAT_NVS_KEY = "pixformat";
typedef void (*dma_filter_t)(const dma_elem_t* src, lldesc_t* dma_desc, uint8_t* dst);
typedef struct camera_fb_s {
uint8_t * buf;
size_t len;
size_t width;
size_t height;
pixformat_t format;
struct timeval timestamp;
size_t size;
uint8_t ref;
uint8_t bad;
struct camera_fb_s * next;
} camera_fb_int_t;
typedef struct fb_s {
uint8_t * buf;
size_t len;
struct fb_s * next;
} fb_item_t;
typedef struct {
camera_config_t config;
sensor_t sensor;
camera_fb_int_t *fb;
size_t fb_size;
size_t data_size;
size_t width;
size_t height;
size_t in_bytes_per_pixel;
size_t fb_bytes_per_pixel;
size_t dma_received_count;
size_t dma_filtered_count;
size_t dma_per_line;
size_t dma_buf_width;
size_t dma_sample_count;
lldesc_t *dma_desc;
dma_elem_t **dma_buf;
size_t dma_desc_count;
size_t dma_desc_cur;
i2s_sampling_mode_t sampling_mode;
dma_filter_t dma_filter;
intr_handle_t i2s_intr_handle;
QueueHandle_t data_ready;
QueueHandle_t fb_in;
QueueHandle_t fb_out;
SemaphoreHandle_t frame_ready;
TaskHandle_t dma_filter_task;
} camera_state_t;
camera_state_t* s_state = NULL;
static void i2s_init();
static int i2s_run();
static void IRAM_ATTR vsync_isr(void* arg);
static void IRAM_ATTR i2s_isr(void* arg);
static esp_err_t dma_desc_init();
static void dma_desc_deinit();
static void dma_filter_task(void *pvParameters);
static void dma_filter_grayscale(const dma_elem_t* src, lldesc_t* dma_desc, uint8_t* dst);
static void dma_filter_grayscale_highspeed(const dma_elem_t* src, lldesc_t* dma_desc, uint8_t* dst);
static void dma_filter_yuyv(const dma_elem_t* src, lldesc_t* dma_desc, uint8_t* dst);
static void dma_filter_yuyv_highspeed(const dma_elem_t* src, lldesc_t* dma_desc, uint8_t* dst);
static void dma_filter_jpeg(const dma_elem_t* src, lldesc_t* dma_desc, uint8_t* dst);
static void i2s_stop(bool* need_yield);
static bool is_hs_mode()
{
return s_state->config.xclk_freq_hz > 10000000;
}
static size_t i2s_bytes_per_sample(i2s_sampling_mode_t mode)
{
switch(mode) {
case SM_0A00_0B00:
return 4;
case SM_0A0B_0B0C:
return 4;
case SM_0A0B_0C0D:
return 2;
default:
assert(0 && "invalid sampling mode");
return 0;
}
}
static int IRAM_ATTR _gpio_get_level(gpio_num_t gpio_num)
{
if (gpio_num < 32) {
return (GPIO.in >> gpio_num) & 0x1;
} else {
return (GPIO.in1.data >> (gpio_num - 32)) & 0x1;
}
}
static void IRAM_ATTR vsync_intr_disable()
{
gpio_set_intr_type(s_state->config.pin_vsync, GPIO_INTR_DISABLE);
}
static void vsync_intr_enable()
{
gpio_set_intr_type(s_state->config.pin_vsync, GPIO_INTR_NEGEDGE);
}
static int skip_frame()
{
if (s_state == NULL) {
return -1;
}
int64_t st_t = esp_timer_get_time();
while (_gpio_get_level(s_state->config.pin_vsync) == 0) {
if((esp_timer_get_time() - st_t) > 1000000LL){
goto timeout;
}
}
while (_gpio_get_level(s_state->config.pin_vsync) != 0) {
if((esp_timer_get_time() - st_t) > 1000000LL){
goto timeout;
}
}
while (_gpio_get_level(s_state->config.pin_vsync) == 0) {
if((esp_timer_get_time() - st_t) > 1000000LL){
goto timeout;
}
}
return 0;
timeout:
ESP_LOGE(TAG, "Timeout waiting for VSYNC");
return -1;
}
static void camera_fb_deinit()
{
camera_fb_int_t * _fb1 = s_state->fb, * _fb2 = NULL;
while(s_state->fb) {
_fb2 = s_state->fb;
s_state->fb = _fb2->next;
if(_fb2->next == _fb1) {
s_state->fb = NULL;
}
free(_fb2->buf);
free(_fb2);
}
}
static esp_err_t camera_fb_init(size_t count)
{
if(!count) {
return ESP_ERR_INVALID_ARG;
}
camera_fb_deinit();
ESP_LOGI(TAG, "Allocating %u frame buffers (%d KB total)", count, (s_state->fb_size * count) / 1024);
camera_fb_int_t * _fb = NULL, * _fb1 = NULL, * _fb2 = NULL;
for(size_t i = 0; i < count; i++) {
_fb2 = (camera_fb_int_t *)malloc(sizeof(camera_fb_int_t));
if(!_fb2) {
goto fail;
}
memset(_fb2, 0, sizeof(camera_fb_int_t));
_fb2->size = s_state->fb_size;
_fb2->buf = (uint8_t*) calloc(_fb2->size, 1);
if(!_fb2->buf) {
ESP_LOGI(TAG, "Allocating %d KB frame buffer in PSRAM", s_state->fb_size/1024);
_fb2->buf = (uint8_t*) heap_caps_calloc(_fb2->size, 1, MALLOC_CAP_SPIRAM | MALLOC_CAP_8BIT);
} else {
ESP_LOGI(TAG, "Allocating %d KB frame buffer in OnBoard RAM", s_state->fb_size/1024);
}
if(!_fb2->buf) {
free(_fb2);
ESP_LOGE(TAG, "Allocating %d KB frame buffer Failed", s_state->fb_size/1024);
goto fail;
}
memset(_fb2->buf, 0, _fb2->size);
_fb2->next = _fb;
_fb = _fb2;
if(!i) {
_fb1 = _fb2;
}
}
if(_fb1) {
_fb1->next = _fb;
}
s_state->fb = _fb;//load first buffer
return ESP_OK;
fail:
while(_fb) {
_fb2 = _fb;
_fb = _fb->next;
free(_fb2->buf);
free(_fb2);
}
return ESP_ERR_NO_MEM;
}
static esp_err_t dma_desc_init()
{
assert(s_state->width % 4 == 0);
size_t line_size = s_state->width * s_state->in_bytes_per_pixel *
i2s_bytes_per_sample(s_state->sampling_mode);
ESP_LOGD(TAG, "Line width (for DMA): %d bytes", line_size);
size_t dma_per_line = 1;
size_t buf_size = line_size;
while (buf_size >= 4096) {
buf_size /= 2;
dma_per_line *= 2;
}
size_t dma_desc_count = dma_per_line * 4;
s_state->dma_buf_width = line_size;
s_state->dma_per_line = dma_per_line;
s_state->dma_desc_count = dma_desc_count;
ESP_LOGD(TAG, "DMA buffer size: %d, DMA buffers per line: %d", buf_size, dma_per_line);
ESP_LOGD(TAG, "DMA buffer count: %d", dma_desc_count);
ESP_LOGD(TAG, "DMA buffer total: %d bytes", buf_size * dma_desc_count);
s_state->dma_buf = (dma_elem_t**) malloc(sizeof(dma_elem_t*) * dma_desc_count);
if (s_state->dma_buf == NULL) {
return ESP_ERR_NO_MEM;
}
s_state->dma_desc = (lldesc_t*) malloc(sizeof(lldesc_t) * dma_desc_count);
if (s_state->dma_desc == NULL) {
return ESP_ERR_NO_MEM;
}
size_t dma_sample_count = 0;
for (int i = 0; i < dma_desc_count; ++i) {
ESP_LOGD(TAG, "Allocating DMA buffer #%d, size=%d", i, buf_size);
dma_elem_t* buf = (dma_elem_t*) malloc(buf_size);
if (buf == NULL) {
return ESP_ERR_NO_MEM;
}
s_state->dma_buf[i] = buf;
ESP_LOGV(TAG, "dma_buf[%d]=%p", i, buf);
lldesc_t* pd = &s_state->dma_desc[i];
pd->length = buf_size;
if (s_state->sampling_mode == SM_0A0B_0B0C &&
(i + 1) % dma_per_line == 0) {
pd->length -= 4;
}
dma_sample_count += pd->length / 4;
pd->size = pd->length;
pd->owner = 1;
pd->sosf = 1;
pd->buf = (uint8_t*) buf;
pd->offset = 0;
pd->empty = 0;
pd->eof = 1;
pd->qe.stqe_next = &s_state->dma_desc[(i + 1) % dma_desc_count];
}
s_state->dma_sample_count = dma_sample_count;
return ESP_OK;
}
static void dma_desc_deinit()
{
if (s_state->dma_buf) {
for (int i = 0; i < s_state->dma_desc_count; ++i) {
free(s_state->dma_buf[i]);
}
}
free(s_state->dma_buf);
free(s_state->dma_desc);
}
static inline void IRAM_ATTR i2s_conf_reset()
{
const uint32_t lc_conf_reset_flags = I2S_IN_RST_M | I2S_AHBM_RST_M
| I2S_AHBM_FIFO_RST_M;
I2S0.lc_conf.val |= lc_conf_reset_flags;
I2S0.lc_conf.val &= ~lc_conf_reset_flags;
const uint32_t conf_reset_flags = I2S_RX_RESET_M | I2S_RX_FIFO_RESET_M
| I2S_TX_RESET_M | I2S_TX_FIFO_RESET_M;
I2S0.conf.val |= conf_reset_flags;
I2S0.conf.val &= ~conf_reset_flags;
while (I2S0.state.rx_fifo_reset_back) {
;
}
}
static void i2s_init()
{
camera_config_t* config = &s_state->config;
// Configure input GPIOs
gpio_num_t pins[] = {
config->pin_d7,
config->pin_d6,
config->pin_d5,
config->pin_d4,
config->pin_d3,
config->pin_d2,
config->pin_d1,
config->pin_d0,
config->pin_vsync,
config->pin_href,
config->pin_pclk
};
gpio_config_t conf = {
.mode = GPIO_MODE_INPUT,
.pull_up_en = GPIO_PULLUP_ENABLE,
.pull_down_en = GPIO_PULLDOWN_DISABLE,
.intr_type = GPIO_INTR_DISABLE
};
for (int i = 0; i < sizeof(pins) / sizeof(gpio_num_t); ++i) {
if (rtc_gpio_is_valid_gpio(pins[i])) {
rtc_gpio_deinit(pins[i]);
}
conf.pin_bit_mask = 1LL << pins[i];
gpio_config(&conf);
}
// Route input GPIOs to I2S peripheral using GPIO matrix
gpio_matrix_in(config->pin_d0, I2S0I_DATA_IN0_IDX, false);
gpio_matrix_in(config->pin_d1, I2S0I_DATA_IN1_IDX, false);
gpio_matrix_in(config->pin_d2, I2S0I_DATA_IN2_IDX, false);
gpio_matrix_in(config->pin_d3, I2S0I_DATA_IN3_IDX, false);
gpio_matrix_in(config->pin_d4, I2S0I_DATA_IN4_IDX, false);
gpio_matrix_in(config->pin_d5, I2S0I_DATA_IN5_IDX, false);
gpio_matrix_in(config->pin_d6, I2S0I_DATA_IN6_IDX, false);
gpio_matrix_in(config->pin_d7, I2S0I_DATA_IN7_IDX, false);
gpio_matrix_in(config->pin_vsync, I2S0I_V_SYNC_IDX, false);
gpio_matrix_in(0x38, I2S0I_H_SYNC_IDX, false);
gpio_matrix_in(config->pin_href, I2S0I_H_ENABLE_IDX, false);
gpio_matrix_in(config->pin_pclk, I2S0I_WS_IN_IDX, false);
// Enable and configure I2S peripheral
periph_module_enable(PERIPH_I2S0_MODULE);
// Toggle some reset bits in LC_CONF register
// Toggle some reset bits in CONF register
i2s_conf_reset();
// Enable slave mode (sampling clock is external)
I2S0.conf.rx_slave_mod = 1;
// Enable parallel mode
I2S0.conf2.lcd_en = 1;
// Use HSYNC/VSYNC/HREF to control sampling
I2S0.conf2.camera_en = 1;
// Configure clock divider
I2S0.clkm_conf.clkm_div_a = 1;
I2S0.clkm_conf.clkm_div_b = 0;
I2S0.clkm_conf.clkm_div_num = 2;
// FIFO will sink data to DMA
I2S0.fifo_conf.dscr_en = 1;
// FIFO configuration
I2S0.fifo_conf.rx_fifo_mod = s_state->sampling_mode;
I2S0.fifo_conf.rx_fifo_mod_force_en = 1;
I2S0.conf_chan.rx_chan_mod = 1;
// Clear flags which are used in I2S serial mode
I2S0.sample_rate_conf.rx_bits_mod = 0;
I2S0.conf.rx_right_first = 0;
I2S0.conf.rx_msb_right = 0;
I2S0.conf.rx_msb_shift = 0;
I2S0.conf.rx_mono = 0;
I2S0.conf.rx_short_sync = 0;
I2S0.timing.val = 0;
I2S0.timing.rx_dsync_sw = 1;
// Allocate I2S interrupt, keep it disabled
ESP_ERROR_CHECK(esp_intr_alloc(ETS_I2S0_INTR_SOURCE,
ESP_INTR_FLAG_INTRDISABLED | ESP_INTR_FLAG_LOWMED | ESP_INTR_FLAG_IRAM,
&i2s_isr, NULL, &s_state->i2s_intr_handle));
}
static void IRAM_ATTR i2s_start_bus()
{
s_state->dma_desc_cur = 0;
s_state->dma_received_count = 0;
//s_state->dma_filtered_count = 0;
esp_intr_disable(s_state->i2s_intr_handle);
i2s_conf_reset();
I2S0.rx_eof_num = s_state->dma_sample_count;
I2S0.in_link.addr = (uint32_t) &s_state->dma_desc[0];
I2S0.in_link.start = 1;
I2S0.int_clr.val = I2S0.int_raw.val;
I2S0.int_ena.val = 0;
I2S0.int_ena.in_done = 1;
esp_intr_enable(s_state->i2s_intr_handle);
I2S0.conf.rx_start = 1;
if (s_state->config.pixel_format == PIXFORMAT_JPEG) {
vsync_intr_enable();
}
}
static int i2s_run()
{
for (int i = 0; i < s_state->dma_desc_count; ++i) {
lldesc_t* d = &s_state->dma_desc[i];
ESP_LOGV(TAG, "DMA desc %2d: %u %u %u %u %u %u %p %p",
i, d->length, d->size, d->offset, d->eof, d->sosf, d->owner, d->buf, d->qe.stqe_next);
memset(s_state->dma_buf[i], 0, d->length);
}
// wait for frame
camera_fb_int_t * fb = s_state->fb;
while(s_state->config.fb_count > 1) {
while(s_state->fb->ref && s_state->fb->next != fb) {
s_state->fb = s_state->fb->next;
}
if(s_state->fb->ref == 0) {
break;
}
vTaskDelay(2);
}
//todo: wait for vsync
ESP_LOGV(TAG, "Waiting for negative edge on VSYNC");
int64_t st_t = esp_timer_get_time();
while (_gpio_get_level(s_state->config.pin_vsync) != 0) {
if((esp_timer_get_time() - st_t) > 1000000LL){
ESP_LOGE(TAG, "Timeout waiting for VSYNC");
return -1;
}
}
ESP_LOGV(TAG, "Got VSYNC");
i2s_start_bus();
return 0;
}
static void IRAM_ATTR i2s_stop_bus()
{
esp_intr_disable(s_state->i2s_intr_handle);
vsync_intr_disable();
i2s_conf_reset();
I2S0.conf.rx_start = 0;
}
static void IRAM_ATTR i2s_stop(bool* need_yield)
{
if(s_state->config.fb_count == 1 && !s_state->fb->bad) {
i2s_stop_bus();
} else {
s_state->dma_received_count = 0;
}
size_t val = SIZE_MAX;
BaseType_t higher_priority_task_woken;
BaseType_t ret = xQueueSendFromISR(s_state->data_ready, &val, &higher_priority_task_woken);
if(need_yield && !*need_yield) {
*need_yield = (ret == pdTRUE && higher_priority_task_woken == pdTRUE);
}
}
static void IRAM_ATTR signal_dma_buf_received(bool* need_yield)
{
size_t dma_desc_filled = s_state->dma_desc_cur;
s_state->dma_desc_cur = (dma_desc_filled + 1) % s_state->dma_desc_count;
s_state->dma_received_count++;
if(!s_state->fb->ref && s_state->fb->bad){
*need_yield = false;
return;
}
BaseType_t higher_priority_task_woken;
BaseType_t ret = xQueueSendFromISR(s_state->data_ready, &dma_desc_filled, &higher_priority_task_woken);
if (ret != pdTRUE) {
if(!s_state->fb->ref) {
s_state->fb->bad = 1;
}
//ESP_EARLY_LOGW(TAG, "qsf:%d", s_state->dma_received_count);
//ets_printf("qsf:%d\n", s_state->dma_received_count);
//ets_printf("qovf\n");
}
*need_yield = (ret == pdTRUE && higher_priority_task_woken == pdTRUE);
}
static void IRAM_ATTR i2s_isr(void* arg)
{
I2S0.int_clr.val = I2S0.int_raw.val;
bool need_yield = false;
signal_dma_buf_received(&need_yield);
if (s_state->config.pixel_format != PIXFORMAT_JPEG
&& s_state->dma_received_count == s_state->height * s_state->dma_per_line) {
i2s_stop(&need_yield);
}
if (need_yield) {
portYIELD_FROM_ISR();
}
}
static void IRAM_ATTR vsync_isr(void* arg)
{
GPIO.status1_w1tc.val = GPIO.status1.val;
GPIO.status_w1tc = GPIO.status;
bool need_yield = false;
//if vsync is low and we have received some data, frame is done
if (_gpio_get_level(s_state->config.pin_vsync) == 0) {
if(s_state->dma_received_count > 0) {
signal_dma_buf_received(&need_yield);
//ets_printf("end_vsync\n");
if(s_state->dma_filtered_count > 1 || s_state->fb->bad || s_state->config.fb_count > 1) {
i2s_stop(&need_yield);
}
//ets_printf("vs\n");
}
if(s_state->config.fb_count > 1 || s_state->dma_filtered_count < 2) {
I2S0.conf.rx_start = 0;
I2S0.in_link.start = 0;
I2S0.int_clr.val = I2S0.int_raw.val;
i2s_conf_reset();
s_state->dma_desc_cur = (s_state->dma_desc_cur + 1) % s_state->dma_desc_count;
//I2S0.rx_eof_num = s_state->dma_sample_count;
I2S0.in_link.addr = (uint32_t) &s_state->dma_desc[s_state->dma_desc_cur];
I2S0.in_link.start = 1;
I2S0.conf.rx_start = 1;
s_state->dma_received_count = 0;
}
}
if (need_yield) {
portYIELD_FROM_ISR();
}
}
static void IRAM_ATTR camera_fb_done()
{
camera_fb_int_t * fb = NULL, * fb2 = NULL;
BaseType_t taskAwoken = 0;
if(s_state->config.fb_count == 1) {
xSemaphoreGive(s_state->frame_ready);
return;
}
fb = s_state->fb;
if(!fb->ref && fb->len) {
//add reference
fb->ref = 1;
//check if the queue is full
if(xQueueIsQueueFullFromISR(s_state->fb_out) == pdTRUE) {
//pop frame buffer from the queue
if(xQueueReceiveFromISR(s_state->fb_out, &fb2, &taskAwoken) == pdTRUE) {
//free the popped buffer
fb2->ref = 0;
fb2->len = 0;
//push the new frame to the end of the queue
xQueueSendFromISR(s_state->fb_out, &fb, &taskAwoken);
} else {
//queue is full and we could not pop a frame from it
}
} else {
//push the new frame to the end of the queue
xQueueSendFromISR(s_state->fb_out, &fb, &taskAwoken);
}
} else {
//frame was referenced or empty
}
//return buffers to be filled
while(xQueueReceiveFromISR(s_state->fb_in, &fb2, &taskAwoken) == pdTRUE) {
fb2->ref = 0;
fb2->len = 0;
}
//advance frame buffer only if the current one has data
if(s_state->fb->len) {
s_state->fb = s_state->fb->next;
}
//try to find the next free frame buffer
while(s_state->fb->ref && s_state->fb->next != fb) {
s_state->fb = s_state->fb->next;
}
//is the found frame buffer free?
if(!s_state->fb->ref) {
//buffer found. make sure it's empty
s_state->fb->len = 0;
*((uint32_t *)s_state->fb->buf) = 0;
} else {
//stay at the previous buffer
s_state->fb = fb;
}
}
static void IRAM_ATTR dma_finish_frame()
{
size_t buf_len = s_state->width * s_state->fb_bytes_per_pixel / s_state->dma_per_line;
if(!s_state->fb->ref) {
// is the frame bad?
if(s_state->fb->bad){
s_state->fb->bad = 0;
s_state->fb->len = 0;
*((uint32_t *)s_state->fb->buf) = 0;
if(s_state->config.fb_count == 1) {
i2s_start_bus();
}
//ets_printf("bad\n");
} else {
s_state->fb->len = s_state->dma_filtered_count * buf_len;
if(s_state->fb->len) {
//find the end marker for JPEG. Data after that can be discarded
if(s_state->fb->format == PIXFORMAT_JPEG){
uint8_t * dptr = &s_state->fb->buf[s_state->fb->len - 1];
while(dptr > s_state->fb->buf){
if(dptr[0] == 0xFF && dptr[1] == 0xD9 && dptr[2] == 0x00 && dptr[3] == 0x00){
dptr += 2;
s_state->fb->len = dptr - s_state->fb->buf;
if((s_state->fb->len & 0x1FF) == 0){
s_state->fb->len += 1;
}
if((s_state->fb->len % 100) == 0){
s_state->fb->len += 1;
}
break;
}
dptr--;
}
}
//send out the frame
camera_fb_done();
} else if(s_state->config.fb_count == 1){
//frame was empty?
i2s_start_bus();
} else {
//ets_printf("empty\n");
}
}
} else if(s_state->fb->len) {
camera_fb_done();
}
s_state->dma_filtered_count = 0;
}
static void IRAM_ATTR dma_filter_buffer(size_t buf_idx)
{
//no need to process the data if frame is in use or is bad
if(s_state->fb->ref || s_state->fb->bad) {
return;
}
//check if there is enough space in the frame buffer for the new data
size_t buf_len = s_state->width * s_state->fb_bytes_per_pixel / s_state->dma_per_line;
size_t fb_pos = s_state->dma_filtered_count * buf_len;
if(fb_pos > s_state->fb_size - buf_len) {
//size_t processed = s_state->dma_received_count * buf_len;
//ets_printf("[%s:%u] ovf pos: %u, processed: %u\n", __FUNCTION__, __LINE__, fb_pos, processed);
return;
}
//convert I2S DMA buffer to pixel data
(*s_state->dma_filter)(s_state->dma_buf[buf_idx], &s_state->dma_desc[buf_idx], s_state->fb->buf + fb_pos);
//first frame buffer
if(!s_state->dma_filtered_count) {
//check for correct JPEG header
if(s_state->sensor.pixformat == PIXFORMAT_JPEG) {
uint32_t sig = *((uint32_t *)s_state->fb->buf) & 0xFFFFFF;
if(sig != 0xffd8ff) {
ets_printf("bh 0x%08x\n", sig);
s_state->fb->bad = 1;
return;
}
}
//set the frame properties
s_state->fb->width = resolution[s_state->sensor.status.framesize].width;
s_state->fb->height = resolution[s_state->sensor.status.framesize].height;
s_state->fb->format = s_state->sensor.pixformat;
uint64_t us = (uint64_t)esp_timer_get_time();
s_state->fb->timestamp.tv_sec = us / 1000000UL;
s_state->fb->timestamp.tv_usec = us % 1000000UL;
}
s_state->dma_filtered_count++;
}
static void IRAM_ATTR dma_filter_task(void *pvParameters)
{
s_state->dma_filtered_count = 0;
while (true) {
size_t buf_idx;
if(xQueueReceive(s_state->data_ready, &buf_idx, portMAX_DELAY) == pdTRUE) {
if (buf_idx == SIZE_MAX) {
//this is the end of the frame
dma_finish_frame();
} else {
dma_filter_buffer(buf_idx);
}
}
}
}
static void IRAM_ATTR dma_filter_jpeg(const dma_elem_t* src, lldesc_t* dma_desc, uint8_t* dst)
{
size_t end = dma_desc->length / sizeof(dma_elem_t) / 4;
// manually unrolling 4 iterations of the loop here
for (size_t i = 0; i < end; ++i) {
dst[0] = src[0].sample1;
dst[1] = src[1].sample1;
dst[2] = src[2].sample1;
dst[3] = src[3].sample1;
src += 4;
dst += 4;
}
}
static void IRAM_ATTR dma_filter_grayscale(const dma_elem_t* src, lldesc_t* dma_desc, uint8_t* dst)
{
size_t end = dma_desc->length / sizeof(dma_elem_t) / 4;
for (size_t i = 0; i < end; ++i) {
// manually unrolling 4 iterations of the loop here
dst[0] = src[0].sample1;
dst[1] = src[1].sample1;
dst[2] = src[2].sample1;
dst[3] = src[3].sample1;
src += 4;
dst += 4;
}
}
static void IRAM_ATTR dma_filter_grayscale_highspeed(const dma_elem_t* src, lldesc_t* dma_desc, uint8_t* dst)
{
size_t end = dma_desc->length / sizeof(dma_elem_t) / 8;
for (size_t i = 0; i < end; ++i) {
// manually unrolling 4 iterations of the loop here
dst[0] = src[0].sample1;
dst[1] = src[2].sample1;
dst[2] = src[4].sample1;
dst[3] = src[6].sample1;
src += 8;
dst += 4;
}
// the final sample of a line in SM_0A0B_0B0C sampling mode needs special handling
if ((dma_desc->length & 0x7) != 0) {
dst[0] = src[0].sample1;
dst[1] = src[2].sample1;
}
}
static void IRAM_ATTR dma_filter_yuyv(const dma_elem_t* src, lldesc_t* dma_desc, uint8_t* dst)
{
size_t end = dma_desc->length / sizeof(dma_elem_t) / 4;
for (size_t i = 0; i < end; ++i) {
dst[0] = src[0].sample1;//y0
dst[1] = src[0].sample2;//u
dst[2] = src[1].sample1;//y1
dst[3] = src[1].sample2;//v
dst[4] = src[2].sample1;//y0
dst[5] = src[2].sample2;//u
dst[6] = src[3].sample1;//y1
dst[7] = src[3].sample2;//v
src += 4;
dst += 8;
}
}
static void IRAM_ATTR dma_filter_yuyv_highspeed(const dma_elem_t* src, lldesc_t* dma_desc, uint8_t* dst)
{
size_t end = dma_desc->length / sizeof(dma_elem_t) / 8;
for (size_t i = 0; i < end; ++i) {
dst[0] = src[0].sample1;//y0
dst[1] = src[1].sample1;//u
dst[2] = src[2].sample1;//y1
dst[3] = src[3].sample1;//v
dst[4] = src[4].sample1;//y0
dst[5] = src[5].sample1;//u
dst[6] = src[6].sample1;//y1
dst[7] = src[7].sample1;//v
src += 8;
dst += 8;
}
if ((dma_desc->length & 0x7) != 0) {
dst[0] = src[0].sample1;//y0
dst[1] = src[1].sample1;//u
dst[2] = src[2].sample1;//y1
dst[3] = src[2].sample2;//v
}
}
static void IRAM_ATTR dma_filter_rgb888(const dma_elem_t* src, lldesc_t* dma_desc, uint8_t* dst)
{
size_t end = dma_desc->length / sizeof(dma_elem_t) / 4;
uint8_t lb, hb;
for (size_t i = 0; i < end; ++i) {
hb = src[0].sample1;
lb = src[0].sample2;
dst[0] = (lb & 0x1F) << 3;
dst[1] = (hb & 0x07) << 5 | (lb & 0xE0) >> 3;
dst[2] = hb & 0xF8;
hb = src[1].sample1;
lb = src[1].sample2;
dst[3] = (lb & 0x1F) << 3;
dst[4] = (hb & 0x07) << 5 | (lb & 0xE0) >> 3;
dst[5] = hb & 0xF8;
hb = src[2].sample1;
lb = src[2].sample2;
dst[6] = (lb & 0x1F) << 3;
dst[7] = (hb & 0x07) << 5 | (lb & 0xE0) >> 3;
dst[8] = hb & 0xF8;
hb = src[3].sample1;
lb = src[3].sample2;
dst[9] = (lb & 0x1F) << 3;
dst[10] = (hb & 0x07) << 5 | (lb & 0xE0) >> 3;
dst[11] = hb & 0xF8;
src += 4;
dst += 12;
}
}
static void IRAM_ATTR dma_filter_rgb888_highspeed(const dma_elem_t* src, lldesc_t* dma_desc, uint8_t* dst)
{
size_t end = dma_desc->length / sizeof(dma_elem_t) / 8;
uint8_t lb, hb;
for (size_t i = 0; i < end; ++i) {
hb = src[0].sample1;
lb = src[1].sample1;
dst[0] = (lb & 0x1F) << 3;
dst[1] = (hb & 0x07) << 5 | (lb & 0xE0) >> 3;
dst[2] = hb & 0xF8;
hb = src[2].sample1;
lb = src[3].sample1;
dst[3] = (lb & 0x1F) << 3;
dst[4] = (hb & 0x07) << 5 | (lb & 0xE0) >> 3;
dst[5] = hb & 0xF8;
hb = src[4].sample1;
lb = src[5].sample1;
dst[6] = (lb & 0x1F) << 3;
dst[7] = (hb & 0x07) << 5 | (lb & 0xE0) >> 3;
dst[8] = hb & 0xF8;
hb = src[6].sample1;
lb = src[7].sample1;
dst[9] = (lb & 0x1F) << 3;
dst[10] = (hb & 0x07) << 5 | (lb & 0xE0) >> 3;
dst[11] = hb & 0xF8;
src += 8;
dst += 12;
}
if ((dma_desc->length & 0x7) != 0) {
hb = src[0].sample1;
lb = src[1].sample1;
dst[0] = (lb & 0x1F) << 3;
dst[1] = (hb & 0x07) << 5 | (lb & 0xE0) >> 3;
dst[2] = hb & 0xF8;
hb = src[2].sample1;
lb = src[2].sample2;
dst[3] = (lb & 0x1F) << 3;
dst[4] = (hb & 0x07) << 5 | (lb & 0xE0) >> 3;
dst[5] = hb & 0xF8;
}
}
/*
* Public Methods
* */
esp_err_t camera_probe(const camera_config_t* config, camera_model_t* out_camera_model)
{
if (s_state != NULL) {
return ESP_ERR_INVALID_STATE;
}
s_state = (camera_state_t*) calloc(sizeof(*s_state), 1);
if (!s_state) {
return ESP_ERR_NO_MEM;
}
ESP_LOGD(TAG, "Enabling XCLK output");
camera_enable_out_clock(config);
ESP_LOGD(TAG, "Initializing SSCB");
SCCB_Init(config->pin_sscb_sda, config->pin_sscb_scl);
if(config->pin_pwdn >= 0) {
ESP_LOGD(TAG, "Resetting camera by power down line");
gpio_config_t conf = { 0 };
conf.pin_bit_mask = 1LL << config->pin_pwdn;
conf.mode = GPIO_MODE_OUTPUT;
gpio_config(&conf);
// carefull, logic is inverted compared to reset pin
gpio_set_level(config->pin_pwdn, 1);
vTaskDelay(10 / portTICK_PERIOD_MS);
gpio_set_level(config->pin_pwdn, 0);
vTaskDelay(10 / portTICK_PERIOD_MS);
}
if(config->pin_reset >= 0) {
ESP_LOGD(TAG, "Resetting camera");
gpio_config_t conf = { 0 };
conf.pin_bit_mask = 1LL << config->pin_reset;
conf.mode = GPIO_MODE_OUTPUT;
gpio_config(&conf);
gpio_set_level(config->pin_reset, 0);
vTaskDelay(10 / portTICK_PERIOD_MS);
gpio_set_level(config->pin_reset, 1);
vTaskDelay(10 / portTICK_PERIOD_MS);
}
ESP_LOGD(TAG, "Searching for camera address");
vTaskDelay(10 / portTICK_PERIOD_MS);
uint8_t slv_addr = SCCB_Probe();
if (slv_addr == 0) {
*out_camera_model = CAMERA_NONE;
camera_disable_out_clock();
return ESP_ERR_CAMERA_NOT_DETECTED;
}
//slv_addr = 0x30;
ESP_LOGD(TAG, "Detected camera at address=0x%02x", slv_addr);
sensor_id_t* id = &s_state->sensor.id;
#if CONFIG_OV2640_SUPPORT
if (slv_addr == 0x30) {
ESP_LOGD(TAG, "Resetting OV2640");
//camera might be OV2640. try to reset it
SCCB_Write(0x30, 0xFF, 0x01);//bank sensor
SCCB_Write(0x30, 0x12, 0x80);//reset
vTaskDelay(10 / portTICK_PERIOD_MS);
slv_addr = SCCB_Probe();
}
#endif
s_state->sensor.slv_addr = slv_addr;
s_state->sensor.xclk_freq_hz = config->xclk_freq_hz;
#if (CONFIG_OV3660_SUPPORT || CONFIG_OV5640_SUPPORT)
if(s_state->sensor.slv_addr == 0x3c){
id->PID = SCCB_Read16(s_state->sensor.slv_addr, REG16_CHIDH);
id->VER = SCCB_Read16(s_state->sensor.slv_addr, REG16_CHIDL);
vTaskDelay(10 / portTICK_PERIOD_MS);
ESP_LOGD(TAG, "Camera PID=0x%02x VER=0x%02x", id->PID, id->VER);
} else {
#endif
id->PID = SCCB_Read(s_state->sensor.slv_addr, REG_PID);
id->VER = SCCB_Read(s_state->sensor.slv_addr, REG_VER);
id->MIDL = SCCB_Read(s_state->sensor.slv_addr, REG_MIDL);
id->MIDH = SCCB_Read(s_state->sensor.slv_addr, REG_MIDH);
vTaskDelay(10 / portTICK_PERIOD_MS);
ESP_LOGD(TAG, "Camera PID=0x%02x VER=0x%02x MIDL=0x%02x MIDH=0x%02x",
id->PID, id->VER, id->MIDH, id->MIDL);
#if (CONFIG_OV3660_SUPPORT || CONFIG_OV5640_SUPPORT)
}
#endif
switch (id->PID) {
#if CONFIG_OV2640_SUPPORT
case OV2640_PID:
*out_camera_model = CAMERA_OV2640;
ov2640_init(&s_state->sensor);
break;
#endif
#if CONFIG_OV7725_SUPPORT
case OV7725_PID:
*out_camera_model = CAMERA_OV7725;
ov7725_init(&s_state->sensor);
break;
#endif
#if CONFIG_OV3660_SUPPORT
case OV3660_PID:
*out_camera_model = CAMERA_OV3660;
ov3660_init(&s_state->sensor);
break;
#endif
#if CONFIG_OV5640_SUPPORT
case OV5640_PID:
*out_camera_model = CAMERA_OV5640;
ov5640_init(&s_state->sensor);
break;
#endif
default:
id->PID = 0;
*out_camera_model = CAMERA_UNKNOWN;
camera_disable_out_clock();
ESP_LOGE(TAG, "Detected camera not supported.");
return ESP_ERR_CAMERA_NOT_SUPPORTED;
}
ESP_LOGD(TAG, "Doing SW reset of sensor");
s_state->sensor.reset(&s_state->sensor);
return ESP_OK;
}
esp_err_t camera_init(const camera_config_t* config)
{
if (!s_state) {
return ESP_ERR_INVALID_STATE;
}
if (s_state->sensor.id.PID == 0) {
return ESP_ERR_CAMERA_NOT_SUPPORTED;
}
memcpy(&s_state->config, config, sizeof(*config));
esp_err_t err = ESP_OK;
framesize_t frame_size = (framesize_t) config->frame_size;
pixformat_t pix_format = (pixformat_t) config->pixel_format;
switch (s_state->sensor.id.PID) {
#if CONFIG_OV2640_SUPPORT
case OV2640_PID:
if (frame_size > FRAMESIZE_UXGA) {
frame_size = FRAMESIZE_UXGA;
}
break;
#endif
#if CONFIG_OV7725_SUPPORT
case OV7725_PID:
if (frame_size > FRAMESIZE_VGA) {
frame_size = FRAMESIZE_VGA;
}
break;
#endif
#if CONFIG_OV3660_SUPPORT
case OV3660_PID:
if (frame_size > FRAMESIZE_QXGA) {
frame_size = FRAMESIZE_QXGA;
}
break;
#endif
#if CONFIG_OV5640_SUPPORT
case OV5640_PID:
if (frame_size > FRAMESIZE_QSXGA) {
frame_size = FRAMESIZE_QSXGA;
}
break;
#endif
default:
return ESP_ERR_CAMERA_NOT_SUPPORTED;
}
s_state->width = resolution[frame_size].width;
s_state->height = resolution[frame_size].height;
if (pix_format == PIXFORMAT_GRAYSCALE) {
s_state->fb_size = s_state->width * s_state->height;
if (s_state->sensor.id.PID == OV3660_PID || s_state->sensor.id.PID == OV5640_PID) {
if (is_hs_mode()) {
s_state->sampling_mode = SM_0A00_0B00;
s_state->dma_filter = &dma_filter_yuyv_highspeed;
} else {
s_state->sampling_mode = SM_0A0B_0C0D;
s_state->dma_filter = &dma_filter_yuyv;
}
s_state->in_bytes_per_pixel = 1; // camera sends Y8
} else {
if (is_hs_mode() && s_state->sensor.id.PID != OV7725_PID) {
s_state->sampling_mode = SM_0A00_0B00;
s_state->dma_filter = &dma_filter_grayscale_highspeed;
} else {
s_state->sampling_mode = SM_0A0B_0C0D;
s_state->dma_filter = &dma_filter_grayscale;
}
s_state->in_bytes_per_pixel = 2; // camera sends YU/YV
}
s_state->fb_bytes_per_pixel = 1; // frame buffer stores Y8
} else if (pix_format == PIXFORMAT_YUV422 || pix_format == PIXFORMAT_RGB565) {
s_state->fb_size = s_state->width * s_state->height * 2;
if (is_hs_mode() && s_state->sensor.id.PID != OV7725_PID) {
s_state->sampling_mode = SM_0A00_0B00;
s_state->dma_filter = &dma_filter_yuyv_highspeed;
} else {
s_state->sampling_mode = SM_0A0B_0C0D;
s_state->dma_filter = &dma_filter_yuyv;
}
s_state->in_bytes_per_pixel = 2; // camera sends YU/YV
s_state->fb_bytes_per_pixel = 2; // frame buffer stores YU/YV/RGB565
} else if (pix_format == PIXFORMAT_RGB888) {
s_state->fb_size = s_state->width * s_state->height * 3;
if (is_hs_mode()) {
s_state->sampling_mode = SM_0A00_0B00;
s_state->dma_filter = &dma_filter_rgb888_highspeed;
} else {
s_state->sampling_mode = SM_0A0B_0C0D;
s_state->dma_filter = &dma_filter_rgb888;
}
s_state->in_bytes_per_pixel = 2; // camera sends RGB565
s_state->fb_bytes_per_pixel = 3; // frame buffer stores RGB888
} else if (pix_format == PIXFORMAT_JPEG) {
if (s_state->sensor.id.PID != OV2640_PID && s_state->sensor.id.PID != OV3660_PID && s_state->sensor.id.PID != OV5640_PID) {
ESP_LOGE(TAG, "JPEG format is only supported for ov2640, ov3660 and ov5640");
err = ESP_ERR_NOT_SUPPORTED;
goto fail;
}
int qp = config->jpeg_quality;
int compression_ratio_bound = 1;
if (qp > 10) {
compression_ratio_bound = 16;
} else if (qp > 5) {
compression_ratio_bound = 10;
} else {
compression_ratio_bound = 4;
}
(*s_state->sensor.set_quality)(&s_state->sensor, qp);
s_state->in_bytes_per_pixel = 2;
s_state->fb_bytes_per_pixel = 2;
s_state->fb_size = (s_state->width * s_state->height * s_state->fb_bytes_per_pixel) / compression_ratio_bound;
s_state->dma_filter = &dma_filter_jpeg;
s_state->sampling_mode = SM_0A00_0B00;
} else {
ESP_LOGE(TAG, "Requested format is not supported");
err = ESP_ERR_NOT_SUPPORTED;
goto fail;
}
ESP_LOGD(TAG, "in_bpp: %d, fb_bpp: %d, fb_size: %d, mode: %d, width: %d height: %d",
s_state->in_bytes_per_pixel, s_state->fb_bytes_per_pixel,
s_state->fb_size, s_state->sampling_mode,
s_state->width, s_state->height);
i2s_init();
err = dma_desc_init();
if (err != ESP_OK) {
ESP_LOGE(TAG, "Failed to initialize I2S and DMA");
goto fail;
}
//s_state->fb_size = 75 * 1024;
err = camera_fb_init(s_state->config.fb_count);
if (err != ESP_OK) {
ESP_LOGE(TAG, "Failed to allocate frame buffer");
goto fail;
}
s_state->data_ready = xQueueCreate(16, sizeof(size_t));
if (s_state->data_ready == NULL) {
ESP_LOGE(TAG, "Failed to dma queue");
err = ESP_ERR_NO_MEM;
goto fail;
}
if(s_state->config.fb_count == 1) {
s_state->frame_ready = xSemaphoreCreateBinary();
if (s_state->frame_ready == NULL) {
ESP_LOGE(TAG, "Failed to create semaphore");
err = ESP_ERR_NO_MEM;
goto fail;
}
} else {
s_state->fb_in = xQueueCreate(s_state->config.fb_count, sizeof(camera_fb_t *));
s_state->fb_out = xQueueCreate(1, sizeof(camera_fb_t *));
if (s_state->fb_in == NULL || s_state->fb_out == NULL) {
ESP_LOGE(TAG, "Failed to fb queues");
err = ESP_ERR_NO_MEM;
goto fail;
}
}
//ToDo: core affinity?
#if CONFIG_CAMERA_CORE0
if (!xTaskCreatePinnedToCore(&dma_filter_task, "dma_filter", 4096, NULL, 10, &s_state->dma_filter_task, 0))
#elif CONFIG_CAMERA_CORE1
if (!xTaskCreatePinnedToCore(&dma_filter_task, "dma_filter", 4096, NULL, 10, &s_state->dma_filter_task, 1))
#else
if (!xTaskCreate(&dma_filter_task, "dma_filter", 4096, NULL, 10, &s_state->dma_filter_task))
#endif
{
ESP_LOGE(TAG, "Failed to create DMA filter task");
err = ESP_ERR_NO_MEM;
goto fail;
}
vsync_intr_disable();
err = gpio_install_isr_service(ESP_INTR_FLAG_LEVEL1 | ESP_INTR_FLAG_IRAM);
if (err != ESP_OK) {
if (err != ESP_ERR_INVALID_STATE) {
ESP_LOGE(TAG, "gpio_install_isr_service failed (%x)", err);
goto fail;
}
else {
ESP_LOGW(TAG, "gpio_install_isr_service already installed");
}
}
err = gpio_isr_handler_add(s_state->config.pin_vsync, &vsync_isr, NULL);
if (err != ESP_OK) {
ESP_LOGE(TAG, "vsync_isr_handler_add failed (%x)", err);
goto fail;
}
s_state->sensor.status.framesize = frame_size;
s_state->sensor.pixformat = pix_format;
ESP_LOGD(TAG, "Setting frame size to %dx%d", s_state->width, s_state->height);
if (s_state->sensor.set_framesize(&s_state->sensor, frame_size) != 0) {
ESP_LOGE(TAG, "Failed to set frame size");
err = ESP_ERR_CAMERA_FAILED_TO_SET_FRAME_SIZE;
goto fail;
}
s_state->sensor.set_pixformat(&s_state->sensor, pix_format);
if (s_state->sensor.id.PID == OV2640_PID) {
s_state->sensor.set_gainceiling(&s_state->sensor, GAINCEILING_2X);
s_state->sensor.set_bpc(&s_state->sensor, false);
s_state->sensor.set_wpc(&s_state->sensor, true);
s_state->sensor.set_lenc(&s_state->sensor, true);
}
if (skip_frame()) {
err = ESP_ERR_CAMERA_FAILED_TO_SET_OUT_FORMAT;
goto fail;
}
//todo: for some reason the first set of the quality does not work.
if (pix_format == PIXFORMAT_JPEG) {
(*s_state->sensor.set_quality)(&s_state->sensor, config->jpeg_quality);
}
s_state->sensor.init_status(&s_state->sensor);
return ESP_OK;
fail:
esp_camera_deinit();
return err;
}
esp_err_t esp_camera_init(const camera_config_t* config)
{
camera_model_t camera_model = CAMERA_NONE;
esp_err_t err = camera_probe(config, &camera_model);
if (err != ESP_OK) {
ESP_LOGE(TAG, "Camera probe failed with error 0x%x", err);
goto fail;
}
if (camera_model == CAMERA_OV7725) {
ESP_LOGI(TAG, "Detected OV7725 camera");
if(config->pixel_format == PIXFORMAT_JPEG) {
ESP_LOGE(TAG, "Camera does not support JPEG");
err = ESP_ERR_CAMERA_NOT_SUPPORTED;
goto fail;
}
} else if (camera_model == CAMERA_OV2640) {
ESP_LOGI(TAG, "Detected OV2640 camera");
} else if (camera_model == CAMERA_OV3660) {
ESP_LOGI(TAG, "Detected OV3660 camera");
} else if (camera_model == CAMERA_OV5640) {
ESP_LOGI(TAG, "Detected OV5640 camera");
} else {
ESP_LOGI(TAG, "Camera not supported");
err = ESP_ERR_CAMERA_NOT_SUPPORTED;
goto fail;
}
err = camera_init(config);
if (err != ESP_OK) {
ESP_LOGE(TAG, "Camera init failed with error 0x%x", err);
return err;
}
return ESP_OK;
fail:
free(s_state);
s_state = NULL;
camera_disable_out_clock();
return err;
}
esp_err_t esp_camera_deinit()
{
if (s_state == NULL) {
return ESP_ERR_INVALID_STATE;
}
if (s_state->dma_filter_task) {
vTaskDelete(s_state->dma_filter_task);
}
if (s_state->data_ready) {
vQueueDelete(s_state->data_ready);
}
if (s_state->fb_in) {
vQueueDelete(s_state->fb_in);
}
if (s_state->fb_out) {
vQueueDelete(s_state->fb_out);
}
if (s_state->frame_ready) {
vSemaphoreDelete(s_state->frame_ready);
}
gpio_isr_handler_remove(s_state->config.pin_vsync);
if (s_state->i2s_intr_handle) {
esp_intr_disable(s_state->i2s_intr_handle);
esp_intr_free(s_state->i2s_intr_handle);
}
dma_desc_deinit();
camera_fb_deinit();
free(s_state);
s_state = NULL;
camera_disable_out_clock();
periph_module_disable(PERIPH_I2S0_MODULE);
return ESP_OK;
}
#define FB_GET_TIMEOUT (4000 / portTICK_PERIOD_MS)
camera_fb_t* esp_camera_fb_get()
{
if (s_state == NULL) {
return NULL;
}
if(!I2S0.conf.rx_start) {
if(s_state->config.fb_count > 1) {
ESP_LOGD(TAG, "i2s_run");
}
if (i2s_run() != 0) {
return NULL;
}
}
bool need_yield = false;
if (s_state->config.fb_count == 1) {
if (xSemaphoreTake(s_state->frame_ready, FB_GET_TIMEOUT) != pdTRUE){
i2s_stop(&need_yield);
ESP_LOGE(TAG, "Failed to get the frame on time!");
return NULL;
}
return (camera_fb_t*)s_state->fb;
}
camera_fb_int_t * fb = NULL;
if(s_state->fb_out) {
if (xQueueReceive(s_state->fb_out, &fb, FB_GET_TIMEOUT) != pdTRUE) {
i2s_stop(&need_yield);
ESP_LOGE(TAG, "Failed to get the frame on time!");
return NULL;
}
}
return (camera_fb_t*)fb;
}
void esp_camera_fb_return(camera_fb_t * fb)
{
if(fb == NULL || s_state == NULL || s_state->config.fb_count == 1 || s_state->fb_in == NULL) {
return;
}
xQueueSend(s_state->fb_in, &fb, portMAX_DELAY);
}
sensor_t * esp_camera_sensor_get()
{
if (s_state == NULL) {
return NULL;
}
return &s_state->sensor;
}
esp_err_t esp_camera_save_to_nvs(const char *key)
{
#if ESP_IDF_VERSION_MAJOR > 3
nvs_handle_t handle;
#else
nvs_handle handle;
#endif
esp_err_t ret = nvs_open(key,NVS_READWRITE,&handle);
if (ret == ESP_OK) {
sensor_t *s = esp_camera_sensor_get();
if (s != NULL) {
ret = nvs_set_blob(handle,CAMERA_SENSOR_NVS_KEY,&s->status,sizeof(camera_status_t));
if (ret == ESP_OK) {
uint8_t pf = s->pixformat;
ret = nvs_set_u8(handle,CAMERA_PIXFORMAT_NVS_KEY,pf);
}
return ret;
} else {
return ESP_ERR_CAMERA_NOT_DETECTED;
}
nvs_close(handle);
return ret;
} else {
return ret;
}
}
esp_err_t esp_camera_load_from_nvs(const char *key)
{
#if ESP_IDF_VERSION_MAJOR > 3
nvs_handle_t handle;
#else
nvs_handle handle;
#endif
uint8_t pf;
esp_err_t ret = nvs_open(key,NVS_READWRITE,&handle);
if (ret == ESP_OK) {
sensor_t *s = esp_camera_sensor_get();
camera_status_t st;
if (s != NULL) {
size_t size = sizeof(camera_status_t);
ret = nvs_get_blob(handle,CAMERA_SENSOR_NVS_KEY,&st,&size);
if (ret == ESP_OK) {
s->set_ae_level(s,st.ae_level);
s->set_aec2(s,st.aec2);
s->set_aec_value(s,st.aec_value);
s->set_agc_gain(s,st.agc_gain);
s->set_awb_gain(s,st.awb_gain);
s->set_bpc(s,st.bpc);
s->set_brightness(s,st.brightness);
s->set_colorbar(s,st.colorbar);
s->set_contrast(s,st.contrast);
s->set_dcw(s,st.dcw);
s->set_denoise(s,st.denoise);
s->set_exposure_ctrl(s,st.aec);
s->set_framesize(s,st.framesize);
s->set_gain_ctrl(s,st.agc);
s->set_gainceiling(s,st.gainceiling);
s->set_hmirror(s,st.hmirror);
s->set_lenc(s,st.lenc);
s->set_quality(s,st.quality);
s->set_raw_gma(s,st.raw_gma);
s->set_saturation(s,st.saturation);
s->set_sharpness(s,st.sharpness);
s->set_special_effect(s,st.special_effect);
s->set_vflip(s,st.vflip);
s->set_wb_mode(s,st.wb_mode);
s->set_whitebal(s,st.awb);
s->set_wpc(s,st.wpc);
}
ret = nvs_get_u8(handle,CAMERA_PIXFORMAT_NVS_KEY,&pf);
if (ret == ESP_OK) {
s->set_pixformat(s,pf);
}
} else {
return ESP_ERR_CAMERA_NOT_DETECTED;
}
nvs_close(handle);
return ret;
} else {
ESP_LOGW(TAG,"Error (%d) opening nvs key \"%s\"",ret,key);
return ret;
}
}
|
7342f1deeb3ad32c74011bf5f919b10a3a1ab862
|
5ab69c8644a936a3d9dec1669a86c7369c911bf8
|
/examples/platform-specific/cc26x0-cc13x0/cc26x0-web-demo/net-uart.c
|
e330c1674472feea2dd5479bafd4a81ab5181c8f
|
[
"BSD-3-Clause"
] |
permissive
|
contiki-ng/contiki-ng
|
393d36f68b98f5ee3544ea32502cf662ffb2fe9f
|
31fcaadf7a0dc8ceea07f438cd69db73174879e6
|
refs/heads/develop
| 2023-09-01T20:10:30.000765
| 2023-09-01T14:37:12
| 2023-09-01T14:37:12
| 91,191,972
| 1,242
| 788
|
BSD-3-Clause
| 2023-09-14T19:08:35
| 2017-05-13T17:37:59
|
C
|
UTF-8
|
C
| false
| false
| 10,860
|
c
|
net-uart.c
|
/*
* Copyright (c) 2014, Texas Instruments Incorporated - http://www.ti.com/
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/**
* \addtogroup cc26x0-web-demo
* @{
*
* \file
* A process which receives data over UART and transmits them over UDP
* to a pre-defined IPv6 address and port. It also listens on the same UDP
* port for messages, which it prints out over UART.
*
* For this example to work, you will have to modify the destination IPv6
* address by adjusting the set_dest_addr() macro below.
*
* To listen on your linux or OS X box:
* nc -6ulkw 1 REMOTE_PORT
*
* (REMOTE_PORT should be the actual value of the define below, e.g. 7777)
*
* Once netcat is up and listening, type something to the CC26xx's terminal
* Bear in mind that the datagram will only be sent after a 0x0a (LF) char
* has been received. Therefore, if you are on Win, do NOT use PuTTY for
* this purpose, since it does not send 0x0a as part of the line end. On
* Win XP use hyperterm. On Win 7 use some other software (e.g. Tera Term,
* which can be configured to send CRLF on enter keystrokes).
*
* To send data in the other direction from your linux or OS X box:
*
* nc -6u \<node IPv6 address\> REMOTE_PORT
*/
/*---------------------------------------------------------------------------*/
#include "contiki.h"
#include "sys/process.h"
#include "dev/serial-line.h"
#include "dev/cc26xx-uart.h"
#include "net/ipv6/uip.h"
#include "net/ipv6/uip-udp-packet.h"
#include "net/ipv6/uiplib.h"
#include "net-uart.h"
#include "httpd-simple.h"
#include "sys/cc.h"
#include "ti-lib.h"
#include <stdint.h>
#include <string.h>
#include <strings.h>
#include <stdio.h>
#include <stdlib.h>
/*---------------------------------------------------------------------------*/
#define DEBUG DEBUG_NONE
#include "net/ipv6/uip-debug.h"
/*---------------------------------------------------------------------------*/
#define REMOTE_PORT 7777
#define MAX_MSG_SIZE 100
#define set_dest_addr() uip_ip6addr(&remote_addr, \
0xBBBB, 0x0000, 0x0000, 0x0000, \
0x3E07, 0x54FF, 0xFE74, 0x4885);
/*---------------------------------------------------------------------------*/
#define ADDRESS_CONVERSION_OK 1
#define ADDRESS_CONVERSION_ERROR 0
/*---------------------------------------------------------------------------*/
static struct uip_udp_conn *udp_conn = NULL;
static uint8_t buffer[MAX_MSG_SIZE];
static uint8_t msg_len;
static uip_ip6addr_t remote_addr;
/*---------------------------------------------------------------------------*/
#define IPV6_ADDR_STR_LEN 64
/*---------------------------------------------------------------------------*/
PROCESS(net_uart_process, "Net UART Process");
/*---------------------------------------------------------------------------*/
/*
* \brief Attempts to convert a string representation of an IPv6 address to a
* numeric one.
* \param buf The buffer with the string to be converted.
* \return ADDRESS_CONVERSION_OK or ADDRESS_CONVERSION_ERROR
*
* ToDo: Add support for NAT64 conversion in case the incoming address is a v4
* This is now supported in the current master, so when we pull it in this will
* be very straightforward.
*/
static int
set_new_ip_address(char *buf)
{
/*
* uiplib_ip6addrconv will immediately start writing into the supplied buffer
* even if it subsequently fails. Thus, pass an intermediate buffer
*/
uip_ip6addr_t tmp_addr;
int rv = uiplib_ip6addrconv(buf, &tmp_addr);
if(rv == ADDRESS_CONVERSION_OK) {
/* Conversion OK, copy to our main buffer */
memcpy(&remote_addr, &tmp_addr, sizeof(remote_addr));
PRINTF("Updated remote address ");
PRINT6ADDR(&remote_addr);
PRINTF("\n");
}
return rv;
}
/*---------------------------------------------------------------------------*/
static void
net_input(void)
{
if(uip_newdata()) {
memset(buffer, 0, MAX_MSG_SIZE);
msg_len = MIN(uip_datalen(), MAX_MSG_SIZE - 1);
/* Copy data */
memcpy(buffer, uip_appdata, msg_len);
printf("%s", (char *)buffer);
}
return;
}
/*---------------------------------------------------------------------------*/
static void
release_uart(void)
{
cc26xx_uart_set_input(NULL);
}
/*---------------------------------------------------------------------------*/
static void
keep_uart_on(void)
{
cc26xx_uart_set_input(serial_line_input_byte);
}
/*---------------------------------------------------------------------------*/
static int
remote_port_post_handler(char *key, int key_len, char *val, int val_len)
{
int rv;
if(key_len != strlen("net_uart_port") ||
strncasecmp(key, "net_uart_port", strlen("net_uart_port")) != 0) {
/* Not ours */
return HTTPD_SIMPLE_POST_HANDLER_UNKNOWN;
}
rv = atoi(val);
if(rv <= 65535 && rv > 0) {
cc26xx_web_demo_config.net_uart.remote_port = (uint16_t)rv;
} else {
return HTTPD_SIMPLE_POST_HANDLER_ERROR;
}
return HTTPD_SIMPLE_POST_HANDLER_OK;
}
/*---------------------------------------------------------------------------*/
static int
remote_ipv6_post_handler(char *key, int key_len, char *val, int val_len)
{
int rv = HTTPD_SIMPLE_POST_HANDLER_UNKNOWN;
if(key_len != strlen("net_uart_ip") ||
strncasecmp(key, "net_uart_ip", strlen("net_uart_ip")) != 0) {
/* Not ours */
return HTTPD_SIMPLE_POST_HANDLER_UNKNOWN;
}
if(val_len > IPV6_ADDR_STR_LEN) {
/* Ours but bad value */
rv = HTTPD_SIMPLE_POST_HANDLER_ERROR;
} else {
if(set_new_ip_address(val)) {
memset(cc26xx_web_demo_config.net_uart.remote_address, 0,
NET_UART_IP_ADDR_STRLEN);
memcpy(cc26xx_web_demo_config.net_uart.remote_address, val, val_len);
rv = HTTPD_SIMPLE_POST_HANDLER_OK;
}
}
return rv;
}
/*---------------------------------------------------------------------------*/
static int
on_off_post_handler(char *key, int key_len, char *val, int val_len)
{
int rv;
if(key_len != strlen("net_uart_on") ||
strncasecmp(key, "net_uart_on", strlen("net_uart_on")) != 0) {
/* Not ours */
return HTTPD_SIMPLE_POST_HANDLER_UNKNOWN;
}
rv = atoi(val);
/* Be pedantic: only accept 0 and 1, not just any non-zero value */
if(rv == 0) {
cc26xx_web_demo_config.net_uart.enable = 0;
release_uart();
} else if(rv == 1) {
cc26xx_web_demo_config.net_uart.enable = 1;
keep_uart_on();
} else {
return HTTPD_SIMPLE_POST_HANDLER_ERROR;
}
return HTTPD_SIMPLE_POST_HANDLER_OK;
}
/*---------------------------------------------------------------------------*/
HTTPD_SIMPLE_POST_HANDLER(remote_port, remote_port_post_handler);
HTTPD_SIMPLE_POST_HANDLER(remote_ipv6, remote_ipv6_post_handler);
HTTPD_SIMPLE_POST_HANDLER(on_off, on_off_post_handler);
/*---------------------------------------------------------------------------*/
static void
set_config_defaults(void)
{
/* Set a hard-coded destination address to start with */
set_dest_addr();
/* Set config defaults */
cc26xx_web_demo_ipaddr_sprintf(cc26xx_web_demo_config.net_uart.remote_address,
NET_UART_IP_ADDR_STRLEN, &remote_addr);
cc26xx_web_demo_config.net_uart.remote_port = REMOTE_PORT;
cc26xx_web_demo_config.net_uart.enable = 1;
}
/*---------------------------------------------------------------------------*/
PROCESS_THREAD(net_uart_process, ev, data)
{
PROCESS_BEGIN();
printf("CC26XX Net UART Process\n");
set_config_defaults();
udp_conn = udp_new(NULL, UIP_HTONS(0), NULL);
if(udp_conn == NULL) {
printf("No UDP connection available, exiting the process!\n");
PROCESS_EXIT();
}
udp_bind(udp_conn, UIP_HTONS(REMOTE_PORT));
httpd_simple_register_post_handler(&remote_port_handler);
httpd_simple_register_post_handler(&remote_ipv6_handler);
httpd_simple_register_post_handler(&on_off_handler);
while(1) {
PROCESS_YIELD();
if(ev == serial_line_event_message) {
/*
* If the message contains a new IP address, save it and go back to
* waiting.
*/
if(set_new_ip_address((char *)data) == ADDRESS_CONVERSION_ERROR) {
/* Not an IP address in the message. Send to current destination */
memset(buffer, 0, MAX_MSG_SIZE);
/* We need to add a line feed, thus never fill the entire buffer */
msg_len = MIN(strlen(data), MAX_MSG_SIZE - 1);
memcpy(buffer, data, msg_len);
/* Add a line feed */
buffer[msg_len] = 0x0A;
msg_len++;
uip_udp_packet_sendto(
udp_conn, buffer, msg_len, &remote_addr,
UIP_HTONS(cc26xx_web_demo_config.net_uart.remote_port));
}
} else if(ev == tcpip_event) {
net_input();
} else if(ev == cc26xx_web_demo_config_loaded_event) {
/*
* New config. Check if it's possible to update the remote address.
* The port will have been updated already
*/
set_new_ip_address(cc26xx_web_demo_config.net_uart.remote_address);
if(cc26xx_web_demo_config.net_uart.enable == 1) {
keep_uart_on();
}
} else if(ev == cc26xx_web_demo_load_config_defaults) {
set_config_defaults();
}
}
PROCESS_END();
}
/*---------------------------------------------------------------------------*/
/**
* @}
* @}
*/
|
2dee456d153a35318122fb0bbf5a62c898f9af76
|
e73547787354afd9b717ea57fe8dd0695d161821
|
/src/world/common/todo/GetEncounterEnemyIsOwner.inc.c
|
0bf64258c896ffc8a35d57644b8d4acbecdbdd9d
|
[] |
no_license
|
pmret/papermario
|
8b514b19653cef8d6145e47499b3636b8c474a37
|
9774b26d93f1045dd2a67e502b6efc9599fb6c31
|
refs/heads/main
| 2023-08-31T07:09:48.951514
| 2023-08-21T18:07:08
| 2023-08-21T18:07:08
| 287,151,133
| 904
| 139
| null | 2023-09-14T02:44:23
| 2020-08-13T01:22:57
|
C
|
UTF-8
|
C
| false
| false
| 228
|
c
|
GetEncounterEnemyIsOwner.inc.c
|
#include "common.h"
#include "npc.h"
API_CALLABLE(N(GetEncounterEnemyIsOwner)) {
Enemy* enemy = script->owner1.enemy;
evt_set_variable(script, LVar0, gCurrentEncounter.curEnemy == enemy);
return ApiStatus_DONE2;
}
|
7badf566800f835a8f55035d4411571a1f6341ec
|
1e21f8adf6af9a27d03559a08ca12d7741ceefce
|
/app/src/main/cpp/m3g/inc/m3g_math.h
|
4bd5f71e5ece6cebddb6c7490342fbf2dcd269bc
|
[
"Apache-2.0"
] |
permissive
|
nikita36078/J2ME-Loader
|
4d2298347b12b394904c336c7ea4e06cf1b935c3
|
c265feb3a74496493e6f01970772331d14d3716f
|
refs/heads/master
| 2023-08-24T23:01:13.247116
| 2023-08-16T14:34:46
| 2023-08-16T14:34:46
| 91,971,028
| 1,657
| 281
|
Apache-2.0
| 2023-08-16T14:34:47
| 2017-05-21T16:23:08
|
Java
|
UTF-8
|
C
| false
| false
| 9,263
|
h
|
m3g_math.h
|
/*
* Copyright (c) 2003 Nokia Corporation and/or its subsidiary(-ies).
* All rights reserved.
* This component and the accompanying materials are made available
* under the terms of the License "Eclipse Public License v1.0"
* which accompanies this distribution, and is available
* at the URL "http://www.eclipse.org/legal/epl-v10.html".
*
* Initial Contributors:
* Nokia Corporation - initial contribution.
*
* Contributors:
*
* Description: Vector and matrix math functions and data types
*
*/
#ifndef __M3G_MATH_H__
#define __M3G_MATH_H__
/*!
* \file
* \brief Vector and matrix math functions and data types
*/
/*----------------------------------------------------------------------
* Internal data types
*--------------------------------------------------------------------*/
/*!
* \internal
* \brief Axis-aligned bounding box
*/
typedef struct
{
M3Gfloat min[3], max[3];
/*
M3Gbyte min[3], minExp;
M3Gbyte max[3], maxExp;
*/
} AABB;
/*----------------------------------------------------------------------
* Global constants
*--------------------------------------------------------------------*/
/*!
* \internal
* \brief Maximum positive float value
*/
#define M3G_MAX_POSITIVE_FLOAT (3.402e+38f)
/*!
* \internal
* \brief Minimum negative float value
*/
#define M3G_MIN_NEGATIVE_FLOAT (-3.402e+38f)
/*!
* \internal
* \brief Degrees to radians multiplier
*/
#define M3G_DEG2RAD (0.017453292519943295769236907684886f)
#define EPSILON (1.0e-5f)
#define EPSILON_EXP (-17)
#define RAD2DEG (57.295779513082320876798154814105f)
#define PI (3.14159265359f)
#define HALF_PI (PI / 2.0f)
#define ONE_AND_HALF_PI (PI + HALF_PI)
#define TWO_PI (2.f * PI)
/*! \internal \brief Extracts the bit pattern of a floating point number */
#define FLOAT_AS_UINT(x) (*(M3Guint*)&(x))
/*! \internal \brief Returns an integer bit pattern as float */
#define INT_AS_FLOAT(x) (*(M3Gfloat*)&(x))
/* IEEE floating point format */
#define MANTISSA_MASK 0x007FFFFFu
#define EXP_MASK 0x7F800000u
#define SIGN_MASK 0x80000000u
#define M3G_FLOAT_ONE 0x3F800000
/*! \internal \brief Extracts the exponent of a floating point number */
#define EXPONENT(x) (((M3Gint)(FLOAT_AS_UINT(x) & EXP_MASK) >> 23) - 127)
/*! \internal \brief Extracts the mantissa of a floating point number */
#define MANTISSA(x) (FLOAT_AS_UINT(x) & MANTISSA_MASK)
/*! \internal \brief Extracts the sign of a floating point number */
#define SIGN(x) (1 - ((FLOAT_AS_UINT(x) & SIGN_MASK) >> 30))
/*! \internal \brief Extracts just the sign bit of a floating point number */
#define SIGN_BIT(x) (FLOAT_AS_UINT(x) >> 31)
/* Useful constants */
#define LEADING_ONE (1 << 23)
/*! \internal \brief Checks the sign of a floating point number */
#define IS_NEGATIVE(x) ((FLOAT_AS_UINT(x) & SIGN_MASK) != 0)
/* Floating-point constant identification macros */
# define IS_ZERO(x) ((FLOAT_AS_UINT(x) & ~SIGN_MASK) <= 0x01000000)
# define IS_ONE(x) (((x) > 1.0f - EPSILON) && ((x) < 1.0f + EPSILON))
# define IS_MINUS_ONE(x) (((x) > -1.0f - EPSILON) && ((x) < -1.0f + EPSILON))
/* Elementary vectors */
static const Vec4 Vec4_X_AXIS = {1, 0, 0, 0};
static const Vec4 Vec4_Y_AXIS = {0, 1, 0, 0};
static const Vec4 Vec4_Z_AXIS = {0, 0, 1, 0};
static const Vec4 Vec4_ORIGIN = {0, 0, 0, 1};
/*----------------------------------------------------------------------
* Elementary floating-point math
*--------------------------------------------------------------------*/
#if defined(M3G_SOFT_FLOAT)
static M3Gfloat m3gAdd(const M3Gfloat a, const M3Gfloat b);
static M3Gfloat m3gMul(const M3Gfloat a, const M3Gfloat b);
static M3Gfloat m3gRcpSqrt(const M3Gfloat x);
static M3Gfloat m3gSqrt(const M3Gfloat x);
static M3G_INLINE M3Gfloat m3gAbs(const M3Gfloat a)
{
M3Guint temp = FLOAT_AS_UINT(a) & ~SIGN_MASK;
return INT_AS_FLOAT(temp);
}
static M3G_INLINE M3Gfloat m3gDiv(const M3Gfloat a, const M3Gfloat b)
{
return (a / b);
}
static M3G_INLINE M3Gfloat m3gDivif(const M3Gint a, const M3Gint b)
{
return m3gDiv((M3Gfloat) a, (M3Gfloat) b);
}
static M3G_INLINE M3Gfloat m3gMadd(const M3Gfloat a, const M3Gfloat b, const M3Gfloat c)
{
return m3gAdd(m3gMul(a, b), c);
}
static M3G_INLINE M3Gfloat m3gRcp(const M3Gfloat x)
{
return (1.0f / x);
}
static M3G_INLINE M3Gfloat m3gSub(const M3Gfloat a, const M3Gfloat b)
{
M3Guint bNeg = FLOAT_AS_UINT(b) ^ SIGN_MASK;
return m3gAdd(a, INT_AS_FLOAT(bNeg));
}
#else
# include <math.h>
# define m3gAbs(a) ((float)fabs(a))
# define m3gAdd(a, b) ((float)(a) + (float)(b))
# define m3gMadd(a, b, c) ((float)(a) * (float)(b) + (float)(c))
# define m3gMul(a, b) ((float)(a) * (float)(b))
# define m3gDiv(a, b) ((float)(a) / (float)(b))
# define m3gDivif(a, b) ((float)(a) / (float)(b))
# define m3gRcp(x) (1.0f / (float)(x))
# define m3gRcpSqrt(x) (1.0f / (float)sqrt(x))
# define m3gSqrt(x) ((float)sqrt(x))
# define m3gSub(a, b) ((float)(a) - (float)(b))
#endif /* M3G_SOFT_FLOAT */
/*----------------------------------------------------------------------
* Trigonometric and exp functions
*--------------------------------------------------------------------*/
#if defined(M3G_SOFT_FLOAT)
static M3Gfloat m3gArcCos(const M3Gfloat x);
static M3Gfloat m3gArcTan(const M3Gfloat y, const M3Gfloat x);
static M3Gfloat m3gCos(const M3Gfloat x);
static M3Gfloat m3gSin(const M3Gfloat x);
static M3Gfloat m3gTan(const M3Gfloat x);
static M3Gfloat m3gExp(const M3Gfloat a);
#else
# define m3gArcCos(x) ((float)acos(x))
# define m3gArcTan(y, x) ((float)atan2((y), (x)))
# define m3gCos(x) ((float)cos(x))
# define m3gSin(x) ((float)sin(x))
# define m3gTan(x) ((float)tan(x))
# define m3gExp(x) ((float)exp(x))
#endif
/*----------------------------------------------------------------------
* Matrix and quaternion stuff
*--------------------------------------------------------------------*/
static M3Gbool m3gIsWUnity (const Matrix *mtx);
static void m3gExpQuat (Quat *quat, const Vec3 *qExp);
static void m3gLogQuat (Vec3 *qLog, const Quat *quat);
static void m3gLogDiffQuat (Vec3 *logDiff,
const Quat *from, const Quat *to);
static M3Gint m3gGetFixedPoint3x3Basis(const Matrix *mtx, M3Gshort *elem);
static M3Gint m3gGetFixedPointTranslation(const Matrix *mtx, M3Gshort *elem);
/*----------------------------------------------------------------------
* Bounding boxes
*--------------------------------------------------------------------*/
static void m3gFitAABB(AABB *box, const AABB *a, const AABB *b);
static void m3gTransformAABB(AABB *box, const Matrix *mtx);
#if defined(M3G_DEBUG)
static void m3gValidateAABB(const AABB *aabb);
#else
# define m3gValidateAABB(a)
#endif
/*----------------------------------------------------------------------
* Rounding and conversion
*--------------------------------------------------------------------*/
static M3Gint m3gRoundToInt(const M3Gfloat a);
static M3Guint m3gAlpha1f(M3Gfloat a);
/*static M3Guint m3gColor1f(M3Gfloat i);*/
static M3Guint m3gColor3f(M3Gfloat r, M3Gfloat g, M3Gfloat b);
static M3Guint m3gColor4f(M3Gfloat r, M3Gfloat g, M3Gfloat b, M3Gfloat a);
static void m3gFloatColor(M3Gint argb, M3Gfloat intensity, M3Gfloat *rgba);
static M3Gbool m3gIntersectTriangle(const Vec3 *orig, const Vec3 *dir,
const Vec3 *vert0, const Vec3 *vert1, const Vec3 *vert2,
Vec3 *tuv, M3Gint cullMode);
static M3Gbool m3gIntersectBox(const Vec3 *orig, const Vec3 *dir, const AABB *box);
static M3Gbool m3gIntersectRectangle(M3GRectangle *dst, M3GRectangle *r1, M3GRectangle *r2);
/*----------------------------------------------------------------------
* Inline functions
*--------------------------------------------------------------------*/
/*!
* \internal
* \brief Multiplies a floating point number by 0.5.
*
* \param x the number to multiply
* \return 0.5 * \c x
*/
static M3G_INLINE M3Gfloat m3gHalf(M3Gfloat x)
{
M3Guint bits = FLOAT_AS_UINT(x);
M3Guint mask = 0xff;
M3Gint exponent = bits & (mask << 23);
bits ^= exponent;
exponent = exponent - (1 << 23);
if (exponent > 0) bits |= exponent;
return INT_AS_FLOAT(bits);
}
/*!
* \internal
* \brief Multiplies a floating point number by two
*
* This does NOT handle overflows.
*
* \param x the number to multiply
* \return 2 * \c x
*/
static M3G_INLINE M3Gfloat m3gDouble(M3Gfloat x)
{
M3Guint bits = FLOAT_AS_UINT(x) + (1 << 23);
return INT_AS_FLOAT(bits);
}
/*!
* \internal
* \brief Computes the square of a floating point number
*
* \param x the input number
* \return x * x
*/
static M3G_INLINE M3Gfloat m3gSquare(M3Gfloat x)
{
return m3gMul(x, x);
}
/*!
* \internal
* \brief Negates a floating-point value
*/
static M3G_INLINE M3Gfloat m3gNegate(M3Gfloat x)
{
M3Guint ix = FLOAT_AS_UINT(x) ^ SIGN_MASK;
return INT_AS_FLOAT(ix);
}
#endif /*__M3G_MATH_H__*/
|
d4c981bca2f4bd1cf6f1101ba9833aad697e728a
|
89db60818afeb3dc7c3b7abe9ceae155f074f7f2
|
/src/cmd/auth/secstore/secstored.c
|
d32ec64c10e46e630571940eb14ec926a86c1725
|
[
"bzip2-1.0.6",
"LPL-1.02",
"MIT"
] |
permissive
|
9fans/plan9port
|
63c3d01928c6f8a8617d3ea6ecc05bac72391132
|
65c090346a38a8c30cb242d345aa71060116340c
|
refs/heads/master
| 2023-08-25T17:14:26.233105
| 2023-08-23T13:21:37
| 2023-08-23T18:47:08
| 26,095,474
| 1,645
| 468
|
NOASSERTION
| 2023-09-05T16:55:41
| 2014-11-02T22:40:13
|
C
|
UTF-8
|
C
| false
| false
| 8,464
|
c
|
secstored.c
|
#include <u.h>
#include <libc.h>
#include <bio.h>
#include <ndb.h>
#include <mp.h>
#include <libsec.h>
#include "SConn.h"
#include "secstore.h"
char *SECSTORE_DIR;
char* secureidcheck(char *, char *); /* from /sys/src/cmd/auth/ */
extern char* dirls(char *path);
int verbose;
Ndb *db;
static void
usage(void)
{
fprint(2, "usage: secstored [-R] [-S servername] [-s tcp!*!5356] [-v] [-x netmtpt]\n");
exits("usage");
}
static int
getdir(SConn *conn, char *id)
{
char *ls, *s;
uchar *msg;
int n, len;
s = emalloc(Maxmsg);
snprint(s, Maxmsg, "%s/store/%s", SECSTORE_DIR, id);
if((ls = dirls(s)) == nil)
len = 0;
else
len = strlen(ls);
/* send file size */
snprint(s, Maxmsg, "%d", len);
conn->write(conn, (uchar*)s, strlen(s));
/* send directory listing in Maxmsg chunks */
n = Maxmsg;
msg = (uchar*)ls;
while(len > 0){
if(len < Maxmsg)
n = len;
conn->write(conn, msg, n);
msg += n;
len -= n;
}
free(s);
free(ls);
return 0;
}
char *
validatefile(char *f)
{
char *nl;
if(f==nil || *f==0)
return nil;
if(nl = strchr(f, '\n'))
*nl = 0;
if(strchr(f,'/') != nil || strcmp(f,"..")==0 || strlen(f) >= 300){
syslog(0, LOG, "no slashes allowed: %s\n", f);
return nil;
}
return f;
}
static int
getfile(SConn *conn, char *id, char *gf)
{
int n, gd, len;
ulong mode;
char *s;
Dir *st;
if(strcmp(gf,".")==0)
return getdir(conn, id);
/* send file size */
s = emalloc(Maxmsg);
snprint(s, Maxmsg, "%s/store/%s/%s", SECSTORE_DIR, id, gf);
gd = open(s, OREAD);
if(gd < 0){
syslog(0, LOG, "can't open %s: %r\n", s);
free(s);
conn->write(conn, (uchar*)"-1", 2);
return -1;
}
st = dirfstat(gd);
if(st == nil){
syslog(0, LOG, "can't stat %s: %r\n", s);
free(s);
conn->write(conn, (uchar*)"-1", 2);
return -1;
}
mode = st->mode;
len = st->length;
free(st);
if(mode & DMDIR) {
syslog(0, LOG, "%s should be a plain file, not a directory\n", s);
free(s);
conn->write(conn, (uchar*)"-1", 2);
return -1;
}
if(len < 0 || len > MAXFILESIZE){
syslog(0, LOG, "implausible filesize %d for %s\n", len, gf);
free(s);
conn->write(conn, (uchar*)"-3", 2);
return -1;
}
snprint(s, Maxmsg, "%d", len);
conn->write(conn, (uchar*)s, strlen(s));
/* send file in Maxmsg chunks */
while(len > 0){
n = read(gd, s, Maxmsg);
if(n <= 0){
syslog(0, LOG, "read error on %s: %r\n", gf);
free(s);
return -1;
}
conn->write(conn, (uchar*)s, n);
len -= n;
}
close(gd);
free(s);
return 0;
}
static int
putfile(SConn *conn, char *id, char *pf)
{
int n, nw, pd;
long len;
char s[Maxmsg+1];
/* get file size */
n = readstr(conn, s);
if(n < 0){
syslog(0, LOG, "remote: %s: %r\n", s);
return -1;
}
len = atoi(s);
if(len == -1){
syslog(0, LOG, "remote file %s does not exist\n", pf);
return -1;
}else if(len < 0 || len > MAXFILESIZE){
syslog(0, LOG, "implausible filesize %ld for %s\n", len, pf);
return -1;
}
/* get file in Maxmsg chunks */
if(strchr(pf,'/') != nil || strcmp(pf,"..")==0){
syslog(0, LOG, "no slashes allowed: %s\n", pf);
return -1;
}
snprint(s, Maxmsg, "%s/store/%s/%s", SECSTORE_DIR, id, pf);
pd = create(s, OWRITE, 0660);
if(pd < 0){
syslog(0, LOG, "can't open %s: %r\n", s);
return -1;
}
while(len > 0){
n = conn->read(conn, (uchar*)s, Maxmsg);
if(n <= 0){
syslog(0, LOG, "empty file chunk\n");
return -1;
}
nw = write(pd, s, n);
if(nw != n){
syslog(0, LOG, "write error on %s: %r", pf);
return -1;
}
len -= n;
}
close(pd);
return 0;
}
static int
removefile(SConn *conn, char *id, char *f)
{
Dir *d;
char buf[Maxmsg];
snprint(buf, Maxmsg, "%s/store/%s/%s", SECSTORE_DIR, id, f);
if((d = dirstat(buf)) == nil){
snprint(buf, sizeof buf, "remove failed: %r");
writerr(conn, buf);
return -1;
}else if(d->mode & DMDIR){
snprint(buf, sizeof buf, "can't remove a directory");
writerr(conn, buf);
free(d);
return -1;
}
free(d);
if(remove(buf) < 0){
snprint(buf, sizeof buf, "remove failed: %r");
writerr(conn, buf);
return -1;
}
return 0;
}
/* given line directory from accept, returns ipaddr!port */
static char*
remoteIP(char *ldir)
{
int fd, n;
char rp[100], ap[500];
snprint(rp, sizeof rp, "%s/remote", ldir);
fd = open(rp, OREAD);
if(fd < 0)
return strdup("?!?");
n = read(fd, ap, sizeof ap);
if(n <= 0 || n == sizeof ap){
fprint(2, "error %d reading %s: %r\n", n, rp);
return strdup("?!?");
}
close(fd);
ap[n--] = 0;
if(ap[n] == '\n')
ap[n] = 0;
return strdup(ap);
}
static int
dologin(int fd, char *S, int forceSTA)
{
int i, n, rv;
char *file, *mess;
char msg[Maxmsg+1];
PW *pw;
SConn *conn;
pw = nil;
rv = -1;
/* collect the first message */
if((conn = newSConn(fd)) == nil)
return -1;
if(readstr(conn, msg) < 0){
fprint(2, "remote: %s: %r\n", msg);
writerr(conn, "can't read your first message");
goto Out;
}
/* authenticate */
if(PAKserver(conn, S, msg, &pw) < 0){
if(pw != nil)
syslog(0, LOG, "secstore denied for %s", pw->id);
goto Out;
}
if((forceSTA || pw->status&STA) != 0){
conn->write(conn, (uchar*)"STA", 3);
if(readstr(conn, msg) < 10 || strncmp(msg, "STA", 3) != 0){
syslog(0, LOG, "no STA from %s", pw->id);
goto Out;
}
mess = secureidcheck(pw->id, msg+3);
if(mess != nil){
syslog(0, LOG, "secureidcheck denied %s because %s", pw->id, mess);
goto Out;
}
}
conn->write(conn, (uchar*)"OK", 2);
syslog(0, LOG, "AUTH %s", pw->id);
/* perform operations as asked */
while((n = readstr(conn, msg)) > 0){
syslog(0, LOG, "[%s] %s", pw->id, msg);
if(strncmp(msg, "GET ", 4) == 0){
file = validatefile(msg+4);
if(file==nil || getfile(conn, pw->id, file) < 0)
goto Err;
}else if(strncmp(msg, "PUT ", 4) == 0){
file = validatefile(msg+4);
if(file==nil || putfile(conn, pw->id, file) < 0){
syslog(0, LOG, "failed PUT %s/%s", pw->id, file);
goto Err;
}
}else if(strncmp(msg, "RM ", 3) == 0){
file = validatefile(msg+3);
if(file==nil || removefile(conn, pw->id, file) < 0){
syslog(0, LOG, "failed RM %s/%s", pw->id, file);
goto Err;
}
}else if(strncmp(msg, "CHPASS", 6) == 0){
if(readstr(conn, msg) < 0){
syslog(0, LOG, "protocol botch CHPASS for %s", pw->id);
writerr(conn, "protocol botch while setting PAK");
goto Out;
}
pw->Hi = strtomp(msg, nil, 64, pw->Hi);
for(i=0; i < 4 && putPW(pw) < 0; i++)
syslog(0, LOG, "password change failed for %s (%d): %r", pw->id, i);
if(i==4)
goto Out;
}else if(strncmp(msg, "BYE", 3) == 0){
rv = 0;
break;
}else{
writerr(conn, "unrecognized operation");
break;
}
}
if(n <= 0)
syslog(0, LOG, "%s closed connection without saying goodbye\n", pw->id);
Out:
freePW(pw);
conn->free(conn);
return rv;
Err:
writerr(conn, "operation failed");
goto Out;
}
void
main(int argc, char **argv)
{
int afd, dfd, lcfd, forceSTA = 0;
char adir[40], ldir[40], *remote;
char *serve = "tcp!*!5356", *p, aserve[128];
char *S = "secstore";
char *dbpath;
Ndb *db2;
S = sysname();
SECSTORE_DIR = unsharp("#9/secstore");
/* setnetmtpt(net, sizeof(net), nil); */
ARGBEGIN{
case 'R':
forceSTA = 1;
break;
case 's':
serve = EARGF(usage());
break;
case 'S':
S = EARGF(usage());
break;
case 'x':
p = ARGF();
if(p == nil)
usage();
USED(p);
/* setnetmtpt(net, sizeof(net), p); */
break;
case 'v':
verbose++;
break;
default:
usage();
}ARGEND;
if(!verbose)
switch(rfork(RFNOTEG|RFPROC|RFFDG)) {
case -1:
sysfatal("fork: %r");
case 0:
break;
default:
exits(0);
}
snprint(aserve, sizeof aserve, "%s", serve);
afd = announce(aserve, adir);
if(afd < 0)
sysfatal("%s: %r\n", aserve);
syslog(0, LOG, "ANNOUNCE %s", aserve);
for(;;){
if((lcfd = listen(adir, ldir)) < 0)
exits("can't listen");
switch(rfork(RFPROC|RFFDG|RFNOWAIT)){
case -1:
fprint(2, "secstore forking: %r\n");
close(lcfd);
break;
case 0:
/* "/lib/ndb/common.radius does not exist" if db set before fork */
db = ndbopen(dbpath=unsharp("#9/ndb/auth"));
if(db == 0)
syslog(0, LOG, "no ndb/auth");
db2 = ndbopen(0);
if(db2 == 0)
syslog(0, LOG, "no ndb/local");
db = ndbcat(db, db2);
if((dfd = accept(lcfd, ldir)) < 0)
exits("can't accept");
alarm(30*60*1000); /* 30 min */
remote = remoteIP(ldir);
syslog(0, LOG, "secstore from %s", remote);
free(remote);
dologin(dfd, S, forceSTA);
exits(nil);
default:
close(lcfd);
break;
}
}
}
|
2b6eb5d9f547d71b59bb4d576e3994f573b410c3
|
8447eb38a4fc71b32b6b82a99f7828a2c50621aa
|
/ppu/sprx/liblv2/exports.h
|
ba362e3a764d6cf3378329fdd34b91a44afefb8a
|
[
"MIT"
] |
permissive
|
ps3dev/PSL1GHT
|
9ecc1f0a2996b39d35cc98303c58c79966b9388b
|
5bc0961c66a3615c74f15e0c29bbeaa33f867ab3
|
refs/heads/master
| 2023-08-04T06:50:55.256801
| 2023-07-30T13:34:19
| 2023-07-30T13:34:19
| 1,541,223
| 159
| 357
|
MIT
| 2023-07-23T07:26:09
| 2011-03-29T12:34:15
|
C
|
UTF-8
|
C
| false
| false
| 6,852
|
h
|
exports.h
|
#ifndef __EXPORTS_H__
#define __EXPORTS_H__
/* system */
EXPORT(sysGetSystemTime, 0x8461e528);
EXPORT(sysGetSystemSwVersion, 0x620e35a7); /* sysPrxForUser */
EXPORT(sysGetTemperature, 0x3172759d); /* sysPrxForUser */
EXPORT(sysGetRandomNumber, 0x71a8472a); /* sysPrxForUser */
EXPORT(sysGetRtcStatus, 0x9f950780); /* sysPrxForUser */
/* board storage */
EXPORT(sysBoardStorageRead, 0xe76964f5); /* sysPrxForUser */
EXPORT(sysBoardStorageWrite, 0x8bb03ab8); /* sysPrxForUser */
/* processes */
EXPORT(sysProcessIsStack, 0x4f7172c9); /* sysPrxForUser */
EXPORT(sysProcessExit, 0xe6f2c1e7);
EXPORT(sysProcessExitspawn, 0xfc52a7a9); /* sysPrxForUser */
EXPORT(sysProcessExitSpawn2Ex, 0x67f9fedb);
EXPORT(sysProcessExitSpawnWithLevel, 0xa2c7ba64); /* sysPrxForUser */
EXPORT(sysProcessAtExitSpawn, 0x2c847572); /* sysPrxForUser */
EXPORT(sysProcess_At_ExitSpawn, 0x96328741); /* sysPrxForUser */
/* prx handling */
EXPORT(sysPrxRegisterLibrary, 0x42b23552); /* sysPrxForUser */
EXPORT(sysPrxUnregisterLibrary, 0xd0ea47a7); /* sysPrxForUser */
EXPORT(sysPrxStartModule, 0x9f18429d); /* sysPrxForUser */
EXPORT(sysPrxStopModule, 0x80fb0c19); /* sysPrxForUser */
EXPORT(sysPrxLoadModule, 0x26090058); /* sysPrxForUser */
EXPORT(sysPrxLoadModuleByFd, 0xef68c17c); /* sysPrxForUser */
EXPORT(sysPrxLoadModuleList, 0xb27c8ae7); /* sysPrxForUser */
EXPORT(sysPrxLoadModuleListOnMemcontainer, 0xe7ef3a80); /* sysPrxForUser */
EXPORT(sysPrxLoadModuleOnMemcontainer, 0xaa6d9bff); /* sysPrxForUser */
EXPORT(sysPrxLoadModuleOnMemcontainerByFd, 0xa330ad84); /* sysPrxForUser */
EXPORT(sysPrxGetModuleInfo, 0x84bb6774); /* sysPrxForUser */
EXPORT(sysPrxGetModuleList, 0xa5d06bf0); /* sysPrxForUser */
EXPORT(sysPrxGetModuleId, 0x74311398); /* sysPrxForUser */
EXPORT(sysPrxGetModuleIdByAddress, 0x0341bb97); /* sysPrxForUser */
EXPORT(sysPrxGetModuleIdByName, 0xe0998dbf); /* sysPrxForUser */
EXPORT(sysPrxUnloadModule, 0xf0aece0d); /* sysPrxForUser */
EXPORT(sysPrxExitSpawnWithLevel, 0xa2c7ba64); /* sysPrxForUser */
/* thread handling */
EXPORT(sysThreadCreateEx, 0x24a1ea07);
EXPORT(sysThreadExit, 0xaff080a4);
EXPORT(sysThreadGetId, 0x350d454e);
EXPORT(sysThreadOnce, 0xa3e3be68);
EXPORT(sysThreadInitialzeTLS, 0x744680a2);
EXPORT(sysThreadRegisterAtexit, 0x3dd4a957); /* sysPrxForUser */
EXPORT(sysThreadUnregisterAtexit, 0xac6fc404); /* sysPrxForUser */
/* thread interupt handling */
EXPORT(sysInterruptThreadDisestablish, 0x4a071d98);
/* mutex handling */
EXPORT(sysLwMutexCreate, 0x2f85c0ef);
EXPORT(sysLwMutexDestroy, 0xc3476d0c);
EXPORT(sysLwMutexLock, 0x1573dc3f);
EXPORT(sysLwMutexTryLock, 0xaeb78725);
EXPORT(sysLwMutexUnlock, 0x1bc200f4);
/* cond variable handling */
EXPORT(sysLwCondCreate, 0xda0eb71a);
EXPORT(sysLwCondWait, 0x2a6d9d51);
EXPORT(sysLwCondSignal, 0xef87a695);
EXPORT(sysLwCondSignalTo, 0x52aadadf);
EXPORT(sysLwCondSignalAll, 0xe9a1bd84);
EXPORT(sysLwCondDestroy, 0x1c9a942c);
/* spinlock handling */
EXPORT(sysSpinlockInitialize, 0x8c2bb498);
EXPORT(sysSpinlockLock, 0xa285139d);
EXPORT(sysSpinlockTryLock, 0x722a0254);
EXPORT(sysSpinlockUnlock, 0x5267cb35);
/* watchdog */
EXPORT(sysWatchdogClear, 0xacad8fb6); /* sysPrxForUser */
EXPORT(sysWatchdogStart, 0x9e0623b5); /* sysPrxForUser */
EXPORT(sysWatchdogStop, 0x6e05231d); /* sysPrxForUser */
/* memory handling */
EXPORT(sysMalloc, 0xbdb18f83); /* sysPrxForUser */
EXPORT(sysMemalign, 0x318f17e1); /* sysPrxForUser */
EXPORT(sysMemchr, 0x3bd53c7b); /* sysPrxForUser */
EXPORT(sysMemcmp, 0xfb5db080); /* sysPrxForUser */
EXPORT(sysMemcpy, 0x6bf66ea7); /* sysPrxForUser */
EXPORT(sysMemmove, 0x27427742); /* sysPrxForUser */
EXPORT(sysMemset, 0x68b9b011); /* sysPrxForUser */
EXPORT(sysFree, 0xf7f7fb20); /* sysPrxForUser */
/* heap handling */
EXPORT(sysHeapAllocHeapMemory, 0xb9bf1078); /* sysPrxForUser */
EXPORT(sysHeapCreateHeap, 0xb2fcf2c8); /* sysPrxForUser */
EXPORT(sysHeapDeleteHeap, 0xaede4b03); /* sysPrxForUser */
EXPORT(sysHeapFree, 0x8a561d92); /* sysPrxForUser */
EXPORT(sysHeapGetMallInfo, 0xd1ad4570); /* sysPrxForUser */
EXPORT(sysHeapGetTotalFreeSize, 0xb6369393); /* sysPrxForUser */
EXPORT(sysHeapMalloc, 0x35168520); /* sysPrxForUser */
EXPORT(sysHeapMemalign, 0x44265c08); /* sysPrxForUser */
EXPORT(sysHeapStats, 0x8985b5b6); /* sysPrxForUser */
/* quicksort */
EXPORT(sysQsort, 0xc4fd6121); /* sysPrxForUser */
/* memory pool */
EXPORT(sysMempoolCreate, 0xca9a60bf); /* sysPrxForUser */
EXPORT(sysMempoolDestroy, 0x9d3c0f81); /* sysPrxForUser */
EXPORT(sysMempoolGetCount, 0x25596f51); /* sysPrxForUser */
EXPORT(sysMempoolAllocateBlock, 0xa146a143); /* sysPrxForUser */
EXPORT(sysMempoolTryAllocateBlock, 0x05c65656); /* sysPrxForUser */
EXPORT(sysMempoolFreeBlock, 0x608212fc); /* sysPrxForUser */
/* memory management */
EXPORT(sysMMapperFreeMemory, 0x409ad939);
EXPORT(sysMMapperMapMemory, 0xdc578057);
EXPORT(sysMMapperUnmapMemory, 0x4643ba6e);
EXPORT(sysMMapperAllocateMemory, 0xb257540b);
EXPORT(sysMMapperAllocateMemoryFromContainer, 0x70258515);
/* strings */
EXPORT(sysStrlen, 0x2d36462b); /* sysPrxForUser */
EXPORT(sysStrcpy, 0x99c88692); /* sysPrxForUser */
EXPORT(sysStrncpy, 0xd3039d4d); /* sysPrxForUser */
EXPORT(sysStrcat, 0x052d29a6); /* sysPrxForUser */
EXPORT(sysStrncat, 0x996f7cf8); /* sysPrxForUser */
EXPORT(sysStrchr, 0x7498887b); /* sysPrxForUser */
EXPORT(sysStrrchr, 0x191f0c4a); /* sysPrxForUser */
EXPORT(sysStrcmp, 0x459b4393); /* sysPrxForUser */
EXPORT(sysStrncmp, 0x04e83d2c); /* sysPrxForUser */
EXPORT(sysStrncasecmp, 0x1ca525a2); /* sysPrxForUser */
EXPORT(sysToLower, 0x4b2f301a); /* sysPrxForUser */
EXPORT(sysToUpper, 0xeef75113); /* sysPrxForUser */
/* spu handling */
EXPORT(sysSpuElfGetSegments, 0xdb6b3250);
EXPORT(sysSpuElfGetInformation, 0x1ed454ce);
EXPORT(sysSpuRawLoad, 0x893305fa);
EXPORT(sysSpuRawImageLoad, 0xb995662e);
EXPORT(sysSpuImageClose, 0xe0da8efd);
EXPORT(sysSpuImageImport, 0xebe5f72f);
/* the following exports are renamed due to our own _working_ implementation */
EXPORT(sysSpuPrintfAttachGroupEx, 0xdd0c1e09); /* sysPrxForUser */
EXPORT(sysSpuPrintfAttachThreadEx, 0x1ae10b92); /* sysPrxForUser */
EXPORT(sysSpuPrintfDetachGroupEx, 0x5fdfb2fe); /* sysPrxForUser */
EXPORT(sysSpuPrintfDetachThreadEx, 0xb3bbcf2a); /* sysPrxForUser */
EXPORT(sysSpuPrintfFinalizeEx, 0xdd3b27ac); /* sysPrxForUser */
EXPORT(sysSpuPrintfInitializeEx, 0x45fe2fce); /* sysPrxForUser */
/* console */
EXPORT(sysConsoleGetc, 0x8a2f159b); /* sysPrxForUser */
EXPORT(sysConsolePutc, 0xe66bac36); /* sysPrxForUser */
EXPORT(sysConsoleWrite, 0xf57e1d6f); /* sysPrxForUser */
EXPORT(sysPrintf, 0x9f04f7af); /* sysPrxForUser */
EXPORT(sysSprintf, 0xa1f9eafe); /* sysPrxForUser */
EXPORT(sysSnprintf, 0x06574237); /* sysPrxForUser */
EXPORT(sysVprintf, 0xfa7f693d); /* sysPrxForUser */
EXPORT(sysVsprintf, 0x791b9219); /* sysPrxForUser */
EXPORT(sysVsnprintf, 0x0618936b); /* sysPrxForUser */
#endif
|
ec276403b1b4dde2a49e8d256afe76c17f285c86
|
99bdb3251fecee538e0630f15f6574054dfc1468
|
/bsp/nuvoton/libraries/ma35/StdDriver/inc/nu_clk.h
|
ac5f0ce84ebd05c8210b834afe4c4e6fefe40d87
|
[
"Zlib",
"LicenseRef-scancode-proprietary-license",
"MIT",
"BSD-3-Clause",
"X11",
"BSD-4-Clause-UC",
"LicenseRef-scancode-unknown-license-reference",
"Apache-2.0"
] |
permissive
|
RT-Thread/rt-thread
|
03a7c52c2aeb1b06a544143b0e803d72f47d1ece
|
3602f891211904a27dcbd51e5ba72fefce7326b2
|
refs/heads/master
| 2023-09-01T04:10:20.295801
| 2023-08-31T16:20:55
| 2023-08-31T16:20:55
| 7,408,108
| 9,599
| 5,805
|
Apache-2.0
| 2023-09-14T13:37:26
| 2013-01-02T14:49:21
|
C
|
UTF-8
|
C
| false
| false
| 66,687
|
h
|
nu_clk.h
|
/**************************************************************************//**
* @file CLK.h
* @brief CLK Driver Header File
*
* SPDX-License-Identifier: Apache-2.0
* @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved.
******************************************************************************/
#ifndef __NU_CLK_H__
#define __NU_CLK_H__
#ifdef __cplusplus
extern "C"
{
#endif
/** @addtogroup Standard_Driver Standard Driver
@{
*/
/** @addtogroup CLK_Driver CLK Driver
@{
*/
/** @addtogroup CLK_EXPORTED_CONSTANTS CLK Exported Constants
@{
*/
#define FREQ_180MHZ 180000000UL /*!< 180 MHz \hideinitializer */
#define CAPLL (0x0UL)
#define SYSPLL (0x1UL)
#define DDRPLL (0x2UL)
#define APLL (0x3UL)
#define EPLL (0x4UL)
#define VPLL (0x5UL)
#define PLL_OPMODE_INTEGER (0x0UL)
#define PLL_OPMODE_FRACTIONAL (0x1UL)
#define PLL_OPMODE_SPREAD_SPECTRUM (0x2UL)
/*---------------------------------------------------------------------------------------------------------*/
/* CLKSEL0 constant definitions. (Write-protection) */
/*---------------------------------------------------------------------------------------------------------*/
#define CLK_CLKSEL0_CA35CKSEL_HXT (0x0UL<<CLK_CLKSEL0_CA35CKSEL_Pos) /*!< Select CA35CK clock source from high speed crystal */
#define CLK_CLKSEL0_CA35CKSEL_CAPLL (0x1UL<<CLK_CLKSEL0_CA35CKSEL_Pos) /*!< Select CA35CK clock source from CA-PLL */
#define CLK_CLKSEL0_CA35CKSEL_DDRPLL (0x2UL<<CLK_CLKSEL0_CA35CKSEL_Pos) /*!< Select CA35CK clock source from DDR-PLL */
#define CLK_CLKSEL0_SYSCK0SEL_EPLL_DIV2 (0x0UL<<CLK_CLKSEL0_SYSCK0SEL_Pos) /*!< Select SYSCK0 clock source from EPLL/2 */
#define CLK_CLKSEL0_SYSCK0SEL_SYSPLL (0x1UL<<CLK_CLKSEL0_SYSCK0SEL_Pos) /*!< Select SYSCK0 clock source from SYS-PLL */
#define CLK_CLKSEL0_LVRDBSEL_LIRC (0x0UL<<CLK_CLKSEL0_LVRDBSEL_Pos) /*!< Select LVRDB clock source from low speed oscillator */
#define CLK_CLKSEL0_LVRDBSEL_HIRC (0x1UL<<CLK_CLKSEL0_LVRDBSEL_Pos) /*!< Select LVRDB clock source from high speed oscillator */
#define CLK_CLKSEL0_SYSCK1SEL_HXT (0x0UL<<CLK_CLKSEL0_SYSCK1SEL_Pos) /*!< Select SYSCK1 clock source from high speed crystal */
#define CLK_CLKSEL0_SYSCK1SEL_SYSPLL (0x1UL<<CLK_CLKSEL0_SYSCK1SEL_Pos) /*!< Select SYSCK1 clock source from SYS-PLL */
#define CLK_CLKSEL0_RTPSTSEL_HXT (0x0UL<<CLK_CLKSEL0_RTPSTSEL_Pos) /*!< Select RTPST clock source from high speed crystal \hideinitializer */
#define CLK_CLKSEL0_RTPSTSEL_LXT (0x1UL<<CLK_CLKSEL0_RTPSTSEL_Pos) /*!< Select RTPST clock source from low speed crystal \hideinitializer */
#define CLK_CLKSEL0_RTPSTSEL_HXT_DIV2 (0x2UL<<CLK_CLKSEL0_RTPSTSEL_Pos) /*!< Select RTPST clock source from high speed crystal/2 \hideinitializer */
#define CLK_CLKSEL0_RTPSTSEL_SYSCLK1_DIV2 (0x3UL<<CLK_CLKSEL0_RTPSTSEL_Pos) /*!< Select RTPST clock source from SYSCLK1/2 \hideinitializer */
#define CLK_CLKSEL0_RTPSTSEL_HIRC (0x4UL<<CLK_CLKSEL0_RTPSTSEL_Pos) /*!< Select RTPST clock source from high speed oscillator \hideinitializer */
#define CLK_CLKSEL0_CCAP0SEL_HXT (0x0UL<<CLK_CLKSEL0_CCAP0SEL_Pos) /*!< Select CCAP0 clock source from high speed crystal */
#define CLK_CLKSEL0_CCAP0SEL_VPLL (0x1UL<<CLK_CLKSEL0_CCAP0SEL_Pos) /*!< Select CCAP0 clock source from VPLL */
#define CLK_CLKSEL0_CCAP0SEL_APLL (0x2UL<<CLK_CLKSEL0_CCAP0SEL_Pos) /*!< Select CCAP0 clock source from APLL */
#define CLK_CLKSEL0_CCAP0SEL_SYSPLL (0x3UL<<CLK_CLKSEL0_CCAP0SEL_Pos) /*!< Select CCAP0 clock source from SYS-PLL */
#define CLK_CLKSEL0_CCAP1SEL_HXT (0x0UL<<CLK_CLKSEL0_CCAP1SEL_Pos) /*!< Select CCAP1 clock source from high speed crystal */
#define CLK_CLKSEL0_CCAP1SEL_VPLL (0x1UL<<CLK_CLKSEL0_CCAP1SEL_Pos) /*!< Select CCAP1 clock source from VPLL */
#define CLK_CLKSEL0_CCAP1SEL_APLL (0x2UL<<CLK_CLKSEL0_CCAP1SEL_Pos) /*!< Select CCAP1 clock source from APLL */
#define CLK_CLKSEL0_CCAP1SEL_SYSPLL (0x3UL<<CLK_CLKSEL0_CCAP1SEL_Pos) /*!< Select CCAP1 clock source from SYS-PLL */
#define CLK_CLKSEL0_SD0SEL_SYSPLL (0x0UL<<CLK_CLKSEL0_SD0SEL_Pos) /*!< Select SD0 clock source from SYS-PLL */
#define CLK_CLKSEL0_SD0SEL_APLL (0x1UL<<CLK_CLKSEL0_SD0SEL_Pos) /*!< Select SD0 clock source from APLL */
#define CLK_CLKSEL0_SD1SEL_SYSPLL (0x0UL<<CLK_CLKSEL0_SD1SEL_Pos) /*!< Select SD1 clock source from SYS-PLL */
#define CLK_CLKSEL0_SD1SEL_APLL (0x1UL<<CLK_CLKSEL0_SD1SEL_Pos) /*!< Select SD1 clock source from APLL */
#define CLK_CLKSEL0_DCUSEL_EPLL_DIV2 (0x0UL<<CLK_CLKSEL0_DCUSEL_Pos) /*!< Select DCU clock source from EPLL/2 */
#define CLK_CLKSEL0_DCUSEL_SYSPLL (0x1UL<<CLK_CLKSEL0_DCUSEL_Pos) /*!< Select DCU clock source from SYS-PLL */
#define CLK_CLKSEL0_GFXSEL_EPLL (0x0UL<<CLK_CLKSEL0_GFXSEL_Pos) /*!< Select GFX clock source from EPLL */
#define CLK_CLKSEL0_GFXSEL_SYSPLL (0x1UL<<CLK_CLKSEL0_GFXSEL_Pos) /*!< Select GFX clock source from SYS-PLL */
#define CLK_CLKSEL0_DBGSEL_HIRC (0x0UL<<CLK_CLKSEL0_DBGSEL_Pos) /*!< Select DBG clock source from high speed oscillator */
#define CLK_CLKSEL0_DBGSEL_SYSPLL (0x1UL<<CLK_CLKSEL0_DBGSEL_Pos) /*!< Select DBG clock source from SYS-PLL */
/*---------------------------------------------------------------------------------------------------------*/
/* CLKSEL1 constant definitions. */
/*---------------------------------------------------------------------------------------------------------*/
#define CLK_CLKSEL1_TMR0SEL_HXT (0x0UL<<CLK_CLKSEL1_TMR0SEL_Pos) /*!< Select TMR0 clock source from high speed crystal */
#define CLK_CLKSEL1_TMR0SEL_LXT (0x1UL<<CLK_CLKSEL1_TMR0SEL_Pos) /*!< Select TMR0 clock source from low speed crystal */
#define CLK_CLKSEL1_TMR0SEL_PCLK0 (0x2UL<<CLK_CLKSEL1_TMR0SEL_Pos) /*!< Select TMR0 clock source from PCLK0 */
#define CLK_CLKSEL1_TMR0SEL_EXT (0x3UL<<CLK_CLKSEL1_TMR0SEL_Pos) /*!< Select TMR0 clock source from PCLK0 */
#define CLK_CLKSEL1_TMR0SEL_LIRC (0x5UL<<CLK_CLKSEL1_TMR0SEL_Pos) /*!< Select TMR0 clock source from low speed oscillator */
#define CLK_CLKSEL1_TMR0SEL_HIRC (0x7UL<<CLK_CLKSEL1_TMR0SEL_Pos) /*!< Select TMR0 clock source from high speed oscillator */
#define CLK_CLKSEL1_TMR1SEL_HXT (0x0UL<<CLK_CLKSEL1_TMR1SEL_Pos) /*!< Select TMR1 clock source from high speed crystal */
#define CLK_CLKSEL1_TMR1SEL_LXT (0x1UL<<CLK_CLKSEL1_TMR1SEL_Pos) /*!< Select TMR1 clock source from low speed crystal */
#define CLK_CLKSEL1_TMR1SEL_PCLK0 (0x2UL<<CLK_CLKSEL1_TMR1SEL_Pos) /*!< Select TMR1 clock source from PCLK0 */
#define CLK_CLKSEL1_TMR1SEL_EXT (0x3UL<<CLK_CLKSEL1_TMR1SEL_Pos) /*!< Select TMR1 clock source from external trigger */
#define CLK_CLKSEL1_TMR1SEL_LIRC (0x5UL<<CLK_CLKSEL1_TMR1SEL_Pos) /*!< Select TMR1 clock source from low speed oscillator */
#define CLK_CLKSEL1_TMR1SEL_HIRC (0x7UL<<CLK_CLKSEL1_TMR1SEL_Pos) /*!< Select TMR1 clock source from high speed oscillator */
#define CLK_CLKSEL1_TMR2SEL_HXT (0x0UL<<CLK_CLKSEL1_TMR2SEL_Pos) /*!< Select TMR2 clock source from high speed crystal */
#define CLK_CLKSEL1_TMR2SEL_LXT (0x1UL<<CLK_CLKSEL1_TMR2SEL_Pos) /*!< Select TMR2 clock source from low speed crystal */
#define CLK_CLKSEL1_TMR2SEL_PCLK1 (0x2UL<<CLK_CLKSEL1_TMR2SEL_Pos) /*!< Select TMR2 clock source from PCLK1 */
#define CLK_CLKSEL1_TMR2SEL_EXT (0x3UL<<CLK_CLKSEL1_TMR2SEL_Pos) /*!< Select TMR2 clock source from external trigger */
#define CLK_CLKSEL1_TMR2SEL_LIRC (0x5UL<<CLK_CLKSEL1_TMR2SEL_Pos) /*!< Select TMR2 clock source from low speed oscillator */
#define CLK_CLKSEL1_TMR2SEL_HIRC (0x7UL<<CLK_CLKSEL1_TMR2SEL_Pos) /*!< Select TMR2 clock source from high speed oscillator */
#define CLK_CLKSEL1_TMR3SEL_HXT (0x0UL<<CLK_CLKSEL1_TMR3SEL_Pos) /*!< Select TMR3 clock source from high speed crystal */
#define CLK_CLKSEL1_TMR3SEL_LXT (0x1UL<<CLK_CLKSEL1_TMR3SEL_Pos) /*!< Select TMR3 clock source from low speed crystal */
#define CLK_CLKSEL1_TMR3SEL_PCLK1 (0x2UL<<CLK_CLKSEL1_TMR3SEL_Pos) /*!< Select TMR3 clock source from PCLK1 */
#define CLK_CLKSEL1_TMR3SEL_EXT (0x3UL<<CLK_CLKSEL1_TMR3SEL_Pos) /*!< Select TMR3 clock source from external trigger */
#define CLK_CLKSEL1_TMR3SEL_LIRC (0x5UL<<CLK_CLKSEL1_TMR3SEL_Pos) /*!< Select TMR3 clock source from low speed oscillator */
#define CLK_CLKSEL1_TMR3SEL_HIRC (0x7UL<<CLK_CLKSEL1_TMR3SEL_Pos) /*!< Select TMR3 clock source from high speed oscillator */
#define CLK_CLKSEL1_TMR4SEL_HXT (0x0UL<<CLK_CLKSEL1_TMR4SEL_Pos) /*!< Select TMR4 clock source from high speed crystal */
#define CLK_CLKSEL1_TMR4SEL_LXT (0x1UL<<CLK_CLKSEL1_TMR4SEL_Pos) /*!< Select TMR4 clock source from low speed crystal */
#define CLK_CLKSEL1_TMR4SEL_PCLK2 (0x2UL<<CLK_CLKSEL1_TMR4SEL_Pos) /*!< Select TMR4 clock source from PCLK2 */
#define CLK_CLKSEL1_TMR4SEL_EXT (0x3UL<<CLK_CLKSEL1_TMR4SEL_Pos) /*!< Select TMR4 clock source from external trigger */
#define CLK_CLKSEL1_TMR4SEL_LIRC (0x5UL<<CLK_CLKSEL1_TMR4SEL_Pos) /*!< Select TMR4 clock source from low speed oscillator */
#define CLK_CLKSEL1_TMR4SEL_HIRC (0x7UL<<CLK_CLKSEL1_TMR4SEL_Pos) /*!< Select TMR4 clock source from high speed oscillator */
#define CLK_CLKSEL1_TMR5SEL_HXT (0x0UL<<CLK_CLKSEL1_TMR5SEL_Pos) /*!< Select TMR5 clock source from high speed crystal */
#define CLK_CLKSEL1_TMR5SEL_LXT (0x1UL<<CLK_CLKSEL1_TMR5SEL_Pos) /*!< Select TMR5 clock source from low speed crystal */
#define CLK_CLKSEL1_TMR5SEL_PCLK2 (0x2UL<<CLK_CLKSEL1_TMR5SEL_Pos) /*!< Select TMR5 clock source from PCLK2 */
#define CLK_CLKSEL1_TMR5SEL_EXT (0x3UL<<CLK_CLKSEL1_TMR5SEL_Pos) /*!< Select TMR5 clock source from external trigger */
#define CLK_CLKSEL1_TMR5SEL_LIRC (0x5UL<<CLK_CLKSEL1_TMR5SEL_Pos) /*!< Select TMR5 clock source from low speed oscillator */
#define CLK_CLKSEL1_TMR5SEL_HIRC (0x7UL<<CLK_CLKSEL1_TMR5SEL_Pos) /*!< Select TMR5 clock source from high speed oscillator */
#define CLK_CLKSEL1_TMR6SEL_HXT (0x0UL<<CLK_CLKSEL1_TMR6SEL_Pos) /*!< Select TMR6 clock source from high speed crystal */
#define CLK_CLKSEL1_TMR6SEL_LXT (0x1UL<<CLK_CLKSEL1_TMR6SEL_Pos) /*!< Select TMR6 clock source from low speed crystal */
#define CLK_CLKSEL1_TMR6SEL_PCLK0 (0x2UL<<CLK_CLKSEL1_TMR6SEL_Pos) /*!< Select TMR6 clock source from PCLK0 */
#define CLK_CLKSEL1_TMR6SEL_EXT (0x3UL<<CLK_CLKSEL1_TMR6SEL_Pos) /*!< Select TMR6 clock source from external trigger */
#define CLK_CLKSEL1_TMR6SEL_LIRC (0x5UL<<CLK_CLKSEL1_TMR6SEL_Pos) /*!< Select TMR6 clock source from low speed oscillator */
#define CLK_CLKSEL1_TMR6SEL_HIRC (0x7UL<<CLK_CLKSEL1_TMR6SEL_Pos) /*!< Select TMR6 clock source from high speed oscillator */
#define CLK_CLKSEL1_TMR7SEL_HXT (0x0UL<<CLK_CLKSEL1_TMR7SEL_Pos) /*!< Select TMR7 clock source from high speed crystal */
#define CLK_CLKSEL1_TMR7SEL_LXT (0x1UL<<CLK_CLKSEL1_TMR7SEL_Pos) /*!< Select TMR7 clock source from low speed crystal */
#define CLK_CLKSEL1_TMR7SEL_PCLK0 (0x2UL<<CLK_CLKSEL1_TMR7SEL_Pos) /*!< Select TMR7 clock source from PCLK0 */
#define CLK_CLKSEL1_TMR7SEL_EXT (0x3UL<<CLK_CLKSEL1_TMR7SEL_Pos) /*!< Select TMR7 clock source from external trigger */
#define CLK_CLKSEL1_TMR7SEL_LIRC (0x5UL<<CLK_CLKSEL1_TMR7SEL_Pos) /*!< Select TMR7 clock source from low speed oscillator */
#define CLK_CLKSEL1_TMR7SEL_HIRC (0x7UL<<CLK_CLKSEL1_TMR7SEL_Pos) /*!< Select TMR7 clock source from high speed oscillator */
/*---------------------------------------------------------------------------------------------------------*/
/* CLKSEL2 constant definitions. */
/*---------------------------------------------------------------------------------------------------------*/
#define CLK_CLKSEL2_TMR8SEL_HXT (0x0UL<<CLK_CLKSEL2_TMR8SEL_Pos) /*!< Select TMR8 clock source from high speed crystal */
#define CLK_CLKSEL2_TMR8SEL_LXT (0x1UL<<CLK_CLKSEL2_TMR8SEL_Pos) /*!< Select TMR8 clock source from low speed crystal */
#define CLK_CLKSEL2_TMR8SEL_PCLK1 (0x2UL<<CLK_CLKSEL2_TMR8SEL_Pos) /*!< Select TMR8 clock source from PCLK1 */
#define CLK_CLKSEL2_TMR8SEL_EXT (0x3UL<<CLK_CLKSEL2_TMR8SEL_Pos) /*!< Select TMR8 clock source from external trigger */
#define CLK_CLKSEL2_TMR8SEL_LIRC (0x5UL<<CLK_CLKSEL2_TMR8SEL_Pos) /*!< Select TMR8 clock source from low speed oscillator */
#define CLK_CLKSEL2_TMR8SEL_HIRC (0x7UL<<CLK_CLKSEL2_TMR8SEL_Pos) /*!< Select TMR8 clock source from high speed oscillator */
#define CLK_CLKSEL2_TMR9SEL_HXT (0x0UL<<CLK_CLKSEL2_TMR9SEL_Pos) /*!< Select TMR9 clock source from high speed crystal */
#define CLK_CLKSEL2_TMR9SEL_LXT (0x1UL<<CLK_CLKSEL2_TMR9SEL_Pos) /*!< Select TMR9 clock source from low speed crystal */
#define CLK_CLKSEL2_TMR9SEL_PCLK1 (0x2UL<<CLK_CLKSEL2_TMR9SEL_Pos) /*!< Select TMR9 clock source from PCLK1 */
#define CLK_CLKSEL2_TMR9SEL_EXT (0x3UL<<CLK_CLKSEL2_TMR9SEL_Pos) /*!< Select TMR9 clock source from external trigger */
#define CLK_CLKSEL2_TMR9SEL_LIRC (0x5UL<<CLK_CLKSEL2_TMR9SEL_Pos) /*!< Select TMR9 clock source from low speed oscillator */
#define CLK_CLKSEL2_TMR9SEL_HIRC (0x7UL<<CLK_CLKSEL2_TMR9SEL_Pos) /*!< Select TMR9 clock source from high speed oscillator */
#define CLK_CLKSEL2_TMR10SEL_HXT (0x0UL<<CLK_CLKSEL2_TMR10SEL_Pos) /*!< Select TMR10 clock source from high speed crystal */
#define CLK_CLKSEL2_TMR10SEL_LXT (0x1UL<<CLK_CLKSEL2_TMR10SEL_Pos) /*!< Select TMR10 clock source from low speed crystal */
#define CLK_CLKSEL2_TMR10SEL_PCLK2 (0x2UL<<CLK_CLKSEL2_TMR10SEL_Pos) /*!< Select TMR10 clock source from PCLK2 */
#define CLK_CLKSEL2_TMR10SEL_EXT (0x3UL<<CLK_CLKSEL2_TMR10SEL_Pos) /*!< Select TMR10 clock source from external trigger */
#define CLK_CLKSEL2_TMR10SEL_LIRC (0x5UL<<CLK_CLKSEL2_TMR10SEL_Pos) /*!< Select TMR10 clock source from low speed oscillator */
#define CLK_CLKSEL2_TMR10SEL_HIRC (0x7UL<<CLK_CLKSEL2_TMR10SEL_Pos) /*!< Select TMR10 clock source from high speed oscillator */
#define CLK_CLKSEL2_TMR11SEL_HXT (0x0UL<<CLK_CLKSEL2_TMR11SEL_Pos) /*!< Select TMR11 clock source from high speed crystal */
#define CLK_CLKSEL2_TMR11SEL_LXT (0x1UL<<CLK_CLKSEL2_TMR11SEL_Pos) /*!< Select TMR11 clock source from low speed crystal */
#define CLK_CLKSEL2_TMR11SEL_PCLK2 (0x2UL<<CLK_CLKSEL2_TMR11SEL_Pos) /*!< Select TMR11 clock source from PCLK2 */
#define CLK_CLKSEL2_TMR11SEL_EXT (0x3UL<<CLK_CLKSEL2_TMR11SEL_Pos) /*!< Select TMR11 clock source from external trigger */
#define CLK_CLKSEL2_TMR11SEL_LIRC (0x5UL<<CLK_CLKSEL2_TMR11SEL_Pos) /*!< Select TMR11 clock source from low speed oscillator */
#define CLK_CLKSEL2_TMR11SEL_HIRC (0x7UL<<CLK_CLKSEL2_TMR11SEL_Pos) /*!< Select TMR11 clock source from high speed oscillator */
#define CLK_CLKSEL2_UART0SEL_HXT (0x0UL<<CLK_CLKSEL2_UART0SEL_Pos) /*!< Select UART0 clock source from high speed crystal */
#define CLK_CLKSEL2_UART0SEL_SYSCLK1_DIV2 (0x1UL<<CLK_CLKSEL2_UART0SEL_Pos) /*!< Select UART0 clock source from SYSCLK1 */
#define CLK_CLKSEL2_UART1SEL_HXT (0x0UL<<CLK_CLKSEL2_UART1SEL_Pos) /*!< Select UART1 clock source from high speed crystal */
#define CLK_CLKSEL2_UART1SEL_SYSCLK1_DIV2 (0x1UL<<CLK_CLKSEL2_UART1SEL_Pos) /*!< Select UART1 clock source from SYSCLK1 */
#define CLK_CLKSEL2_UART2SEL_HXT (0x0UL<<CLK_CLKSEL2_UART2SEL_Pos) /*!< Select UART2 clock source from high speed crystal */
#define CLK_CLKSEL2_UART2SEL_SYSCLK1_DIV2 (0x1UL<<CLK_CLKSEL2_UART2SEL_Pos) /*!< Select UART2 clock source from SYSCLK1 */
#define CLK_CLKSEL2_UART3SEL_HXT (0x0UL<<CLK_CLKSEL2_UART3SEL_Pos) /*!< Select UART3 clock source from high speed crystal */
#define CLK_CLKSEL2_UART3SEL_SYSCLK1_DIV2 (0x1UL<<CLK_CLKSEL2_UART3SEL_Pos) /*!< Select UART3 clock source from SYSCLK1 */
#define CLK_CLKSEL2_UART4SEL_HXT (0x0UL<<CLK_CLKSEL2_UART4SEL_Pos) /*!< Select UART4 clock source from high speed crystal */
#define CLK_CLKSEL2_UART4SEL_SYSCLK1_DIV2 (0x1UL<<CLK_CLKSEL2_UART4SEL_Pos) /*!< Select UART4 clock source from SYSCLK1 */
#define CLK_CLKSEL2_UART5SEL_HXT (0x0UL<<CLK_CLKSEL2_UART5SEL_Pos) /*!< Select UART5 clock source from high speed crystal */
#define CLK_CLKSEL2_UART5SEL_SYSCLK1_DIV2 (0x1UL<<CLK_CLKSEL2_UART5SEL_Pos) /*!< Select UART5 clock source from SYSCLK1 */
#define CLK_CLKSEL2_UART6SEL_HXT (0x0UL<<CLK_CLKSEL2_UART6SEL_Pos) /*!< Select UART6 clock source from high speed crystal */
#define CLK_CLKSEL2_UART6SEL_SYSCLK1_DIV2 (0x1UL<<CLK_CLKSEL2_UART6SEL_Pos) /*!< Select UART6 clock source from SYSCLK1 */
#define CLK_CLKSEL2_UART7SEL_HXT (0x0UL<<CLK_CLKSEL2_UART7SEL_Pos) /*!< Select UART7 clock source from high speed crystal */
#define CLK_CLKSEL2_UART7SEL_SYSCLK1_DIV2 (0x1UL<<CLK_CLKSEL2_UART7SEL_Pos) /*!< Select UART7 clock source from SYSCLK1 */
/*---------------------------------------------------------------------------------------------------------*/
/* CLKSEL3 constant definitions. */
/*---------------------------------------------------------------------------------------------------------*/
#define CLK_CLKSEL3_UART8SEL_HXT (0x0UL<<CLK_CLKSEL3_UART8SEL_Pos) /*!< Select UART8 clock source from high speed crystal */
#define CLK_CLKSEL3_UART8SEL_SYSCLK1_DIV2 (0x1UL<<CLK_CLKSEL3_UART8SEL_Pos) /*!< Select UART8 clock source from SYSCLK1 */
#define CLK_CLKSEL3_UART9SEL_HXT (0x0UL<<CLK_CLKSEL3_UART9SEL_Pos) /*!< Select UART9 clock source from high speed crystal */
#define CLK_CLKSEL3_UART9SEL_SYSCLK1_DIV2 (0x1UL<<CLK_CLKSEL3_UART9SEL_Pos) /*!< Select UART9 clock source from SYSCLK1 */
#define CLK_CLKSEL3_UART10SEL_HXT (0x0UL<<CLK_CLKSEL3_UART10SEL_Pos) /*!< Select UART10 clock source from high speed crystal */
#define CLK_CLKSEL3_UART10SEL_SYSCLK1_DIV2 (0x1UL<<CLK_CLKSEL3_UART10SEL_Pos) /*!< Select UART10 clock source from SYSCLK1 */
#define CLK_CLKSEL3_UART11SEL_HXT (0x0UL<<CLK_CLKSEL3_UART11SEL_Pos) /*!< Select UART11 clock source from high speed crystal */
#define CLK_CLKSEL3_UART11SEL_SYSCLK1_DIV2 (0x1UL<<CLK_CLKSEL3_UART11SEL_Pos) /*!< Select UART11 clock source from SYSCLK1 */
#define CLK_CLKSEL3_UART12SEL_HXT (0x0UL<<CLK_CLKSEL3_UART12SEL_Pos) /*!< Select UART12 clock source from high speed crystal */
#define CLK_CLKSEL3_UART12SEL_SYSCLK1_DIV2 (0x1UL<<CLK_CLKSEL3_UART12SEL_Pos) /*!< Select UART12 clock source from SYSCLK1 */
#define CLK_CLKSEL3_UART13SEL_HXT (0x0UL<<CLK_CLKSEL3_UART13SEL_Pos) /*!< Select UART13 clock source from high speed crystal */
#define CLK_CLKSEL3_UART13SEL_SYSCLK1_DIV2 (0x1UL<<CLK_CLKSEL3_UART13SEL_Pos) /*!< Select UART13 clock source from SYSCLK1 */
#define CLK_CLKSEL3_UART14SEL_HXT (0x0UL<<CLK_CLKSEL3_UART14SEL_Pos) /*!< Select UART14 clock source from high speed crystal */
#define CLK_CLKSEL3_UART14SEL_SYSCLK1_DIV2 (0x1UL<<CLK_CLKSEL3_UART14SEL_Pos) /*!< Select UART14 clock source from SYSCLK1 */
#define CLK_CLKSEL3_UART15SEL_HXT (0x0UL<<CLK_CLKSEL3_UART15SEL_Pos) /*!< Select UART15 clock source from high speed crystal */
#define CLK_CLKSEL3_UART15SEL_SYSCLK1_DIV2 (0x1UL<<CLK_CLKSEL3_UART15SEL_Pos) /*!< Select UART15 clock source from SYSCLK1 */
#define CLK_CLKSEL3_UART16SEL_HXT (0x0UL<<CLK_CLKSEL3_UART16SEL_Pos) /*!< Select UART16 clock source from high speed crystal */
#define CLK_CLKSEL3_UART16SEL_SYSCLK1_DIV2 (0x1UL<<CLK_CLKSEL3_UART16SEL_Pos) /*!< Select UART16 clock source from SYSCLK1 */
#define CLK_CLKSEL3_WDT0SEL_LXT (0x1UL<<CLK_CLKSEL3_WDT0SEL_Pos) /*!< Select WDT0 clock source from low speed crystal */
#define CLK_CLKSEL3_WDT0SEL_PCLK3_DIV4096 (0x2UL<<CLK_CLKSEL3_WDT0SEL_Pos) /*!< Select WDT0 clock source from PCLK3/4096 */
#define CLK_CLKSEL3_WDT0SEL_LIRC (0x3UL<<CLK_CLKSEL3_WDT0SEL_Pos) /*!< Select WDT0 clock source from low speed oscillator */
#define CLK_CLKSEL3_WWDT0SEL_PCLK3_DIV4096 (0x2UL<<CLK_CLKSEL3_WWDT0SEL_Pos) /*!< Select WWDT0 clock source from PCLK3/4096 */
#define CLK_CLKSEL3_WWDT0SEL_LIRC (0x3UL<<CLK_CLKSEL3_WWDT0SEL_Pos) /*!< Select WWDT0 clock source from low speed oscillator */
#define CLK_CLKSEL3_WDT1SEL_LXT (0x1UL<<CLK_CLKSEL3_WDT1SEL_Pos) /*!< Select WDT1 clock source from low speed crystal */
#define CLK_CLKSEL3_WDT1SEL_PCLK3_DIV4096 (0x2UL<<CLK_CLKSEL3_WDT1SEL_Pos) /*!< Select WDT1 clock source from PCLK3/4096 */
#define CLK_CLKSEL3_WDT1SEL_LIRC (0x3UL<<CLK_CLKSEL3_WDT1SEL_Pos) /*!< Select WDT1 clock source from low speed oscillator */
#define CLK_CLKSEL3_WWDT1SEL_PCLK3_DIV4096 (0x2UL<<CLK_CLKSEL3_WWDT1SEL_Pos) /*!< Select WWDT1 clock source from PCLK3/4096 */
#define CLK_CLKSEL3_WWDT1SEL_LIRC (0x3UL<<CLK_CLKSEL3_WWDT1SEL_Pos) /*!< Select WWDT1 clock source from low speed oscillator */
#define CLK_CLKSEL3_WDT2SEL_LXT (0x1UL<<CLK_CLKSEL3_WDT2SEL_Pos) /*!< Select WDT2 clock source from low speed crystal */
#define CLK_CLKSEL3_WDT2SEL_PCLK4_DIV4096 (0x2UL<<CLK_CLKSEL3_WDT2SEL_Pos) /*!< Select WDT2 clock source from PCLK4/4096 */
#define CLK_CLKSEL3_WDT2SEL_LIRC (0x3UL<<CLK_CLKSEL3_WDT2SEL_Pos) /*!< Select WDT2 clock source from low speed oscillator */
#define CLK_CLKSEL3_WWDT2SEL_PCLK4_DIV4096 (0x2UL<<CLK_CLKSEL3_WWDT2SEL_Pos) /*!< Select WWDT2 clock source from PCLK4/4096 */
#define CLK_CLKSEL3_WWDT2SEL_LIRC (0x3UL<<CLK_CLKSEL3_WWDT2SEL_Pos) /*!< Select WWDT2 clock source from low speed oscillator */
/*---------------------------------------------------------------------------------------------------------*/
/* CLKSEL4 constant definitions. */
/*---------------------------------------------------------------------------------------------------------*/
#define CLK_CLKSEL4_SPI0SEL_PCLK1 (0x0UL<<CLK_CLKSEL4_SPI0SEL_Pos) /*!< Select SPI0 clock source from PCLK1 */
#define CLK_CLKSEL4_SPI0SEL_APLL (0x1UL<<CLK_CLKSEL4_SPI0SEL_Pos) /*!< Select SPI0 clock source from APLL */
#define CLK_CLKSEL4_SPI1SEL_PCLK2 (0x0UL<<CLK_CLKSEL4_SPI1SEL_Pos) /*!< Select SPI1 clock source from PCLK2 */
#define CLK_CLKSEL4_SPI1SEL_APLL (0x1UL<<CLK_CLKSEL4_SPI1SEL_Pos) /*!< Select SPI1 clock source from APLL */
#define CLK_CLKSEL4_SPI2SEL_PCLK1 (0x0UL<<CLK_CLKSEL4_SPI2SEL_Pos) /*!< Select SPI2 clock source from PCLK1 */
#define CLK_CLKSEL4_SPI2SEL_APLL (0x1UL<<CLK_CLKSEL4_SPI2SEL_Pos) /*!< Select SPI2 clock source from APLL */
#define CLK_CLKSEL4_SPI3SEL_PCLK2 (0x0UL<<CLK_CLKSEL4_SPI3SEL_Pos) /*!< Select SPI3 clock source from PCLK2 */
#define CLK_CLKSEL4_SPI3SEL_APLL (0x1UL<<CLK_CLKSEL4_SPI3SEL_Pos) /*!< Select SPI3 clock source from APLL */
#define CLK_CLKSEL4_QSPI0SEL_PCLK0 (0x0UL<<CLK_CLKSEL4_QSPI0SEL_Pos) /*!< Select QSPI0 clock source from PCLK0 */
#define CLK_CLKSEL4_QSPI0SEL_APLL (0x1UL<<CLK_CLKSEL4_QSPI0SEL_Pos) /*!< Select QSPI0 clock source from APLL */
#define CLK_CLKSEL4_QSPI1SEL_PCLK0 (0x0UL<<CLK_CLKSEL4_QSPI1SEL_Pos) /*!< Select QSPI1 clock source from PCLK0 */
#define CLK_CLKSEL4_QSPI1SEL_APLL (0x1UL<<CLK_CLKSEL4_QSPI1SEL_Pos) /*!< Select QSPI1 clock source from APLL */
#define CLK_CLKSEL4_I2S0SEL_APLL (0x0UL<<CLK_CLKSEL4_I2S0SEL_Pos) /*!< Select I2S0 clock source from APLL */
#define CLK_CLKSEL4_I2S0SEL_SYSCLK1_DIV2 (0x1UL<<CLK_CLKSEL4_I2S0SEL_Pos) /*!< Select I2S0 clock source from SYSCLK1/2 */
#define CLK_CLKSEL4_I2S1SEL_APLL (0x0UL<<CLK_CLKSEL4_I2S1SEL_Pos) /*!< Select I2S1 clock source from APLL */
#define CLK_CLKSEL4_I2S1SEL_SYSCLK1_DIV2 (0x1UL<<CLK_CLKSEL4_I2S1SEL_Pos) /*!< Select I2S1 clock source from SYSCLK1/2 */
#define CLK_CLKSEL4_CANFD0SEL_APLL (0x0UL<<CLK_CLKSEL4_CANFD0SEL_Pos) /*!< Select CANFD0 clock source from APLL */
#define CLK_CLKSEL4_CANFD0SEL_VPLL (0x1UL<<CLK_CLKSEL4_CANFD0SEL_Pos) /*!< Select CANFD0 clock source from VPLL */
#define CLK_CLKSEL4_CANFD1SEL_APLL (0x0UL<<CLK_CLKSEL4_CANFD1SEL_Pos) /*!< Select CANFD1 clock source from APLL */
#define CLK_CLKSEL4_CANFD1SEL_VPLL (0x1UL<<CLK_CLKSEL4_CANFD1SEL_Pos) /*!< Select CANFD1 clock source from VPLL */
#define CLK_CLKSEL4_CANFD2SEL_APLL (0x0UL<<CLK_CLKSEL4_CANFD2SEL_Pos) /*!< Select CANFD2 clock source from APLL */
#define CLK_CLKSEL4_CANFD2SEL_VPLL (0x1UL<<CLK_CLKSEL4_CANFD2SEL_Pos) /*!< Select CANFD2 clock source from VPLL */
#define CLK_CLKSEL4_CANFD3SEL_APLL (0x0UL<<CLK_CLKSEL4_CANFD3SEL_Pos) /*!< Select CANFD3 clock source from APLL */
#define CLK_CLKSEL4_CANFD3SEL_VPLL (0x1UL<<CLK_CLKSEL4_CANFD3SEL_Pos) /*!< Select CANFD3 clock source from VPLL */
#define CLK_CLKSEL4_CKOSEL_HXT (0x0UL<<CLK_CLKSEL4_CKOSEL_Pos) /*!< Select CKO clock source from high speed crystal */
#define CLK_CLKSEL4_CKOSEL_LXT (0x1UL<<CLK_CLKSEL4_CKOSEL_Pos) /*!< Select CKO clock source from low speed crystal */
#define CLK_CLKSEL4_CKOSEL_HIRC (0x2UL<<CLK_CLKSEL4_CKOSEL_Pos) /*!< Select CKO clock source from high speed oscillator */
#define CLK_CLKSEL4_CKOSEL_LIRC (0x3UL<<CLK_CLKSEL4_CKOSEL_Pos) /*!< Select CKO clock source from low speed oscillator */
#define CLK_CLKSEL4_CKOSEL_CAPLL_DIV4 (0x4UL<<CLK_CLKSEL4_CKOSEL_Pos) /*!< Select CKO clock source from CA-PLL/4 */
#define CLK_CLKSEL4_CKOSEL_SYSPLL (0x5UL<<CLK_CLKSEL4_CKOSEL_Pos) /*!< Select CKO clock source from SYS-PLL */
#define CLK_CLKSEL4_CKOSEL_DDRPLL (0x6UL<<CLK_CLKSEL4_CKOSEL_Pos) /*!< Select CKO clock source from CA-PLL */
#define CLK_CLKSEL4_CKOSEL_EPLL_DIV2 (0x7UL<<CLK_CLKSEL4_CKOSEL_Pos) /*!< Select CKO clock source from EPLL/2 */
#define CLK_CLKSEL4_CKOSEL_APLL (0x8UL<<CLK_CLKSEL4_CKOSEL_Pos) /*!< Select CKO clock source from APLL */
#define CLK_CLKSEL4_CKOSEL_VPLL (0x9UL<<CLK_CLKSEL4_CKOSEL_Pos) /*!< Select CKO clock source from VPLL */
#define CLK_CLKSEL4_SC0SEL_HXT (0x0UL<<CLK_CLKSEL4_SC0SEL_Pos) /*!< Select SC0 clock source from high speed crystal */
#define CLK_CLKSEL4_SC0SEL_PCLK4 (0x1UL<<CLK_CLKSEL4_SC0SEL_Pos) /*!< Select SC0 clock source from PCLK4 */
#define CLK_CLKSEL4_SC1SEL_HXT (0x0UL<<CLK_CLKSEL4_SC1SEL_Pos) /*!< Select SC1 clock source from high speed crystal */
#define CLK_CLKSEL4_SC1SEL_PCLK4 (0x1UL<<CLK_CLKSEL4_SC1SEL_Pos) /*!< Select SC1 clock source from PCLK4 */
#define CLK_CLKSEL4_KPISEL_HXT (0x0UL<<CLK_CLKSEL4_KPISEL_Pos) /*!< Select KPI clock source from high speed crystal */
#define CLK_CLKSEL4_KPISEL_LXT (0x1UL<<CLK_CLKSEL4_KPISEL_Pos) /*!< Select KPI clock source from low speed crystal */
/*---------------------------------------------------------------------------------------------------------*/
/* CLKDIV0 constant definitions. */
/*---------------------------------------------------------------------------------------------------------*/
#define CLK_CLKDIV0_CANFD0(x) (((x) - 1UL) << CLK_CLKDIV0_CANFD0DIV_Pos) /*!< CLKDIV0 Setting for CANFD0 clock divider. It could be 1~8 \hideinitializer */
#define CLK_CLKDIV0_CANFD1(x) (((x) - 1UL) << CLK_CLKDIV0_CANFD1DIV_Pos) /*!< CLKDIV0 Setting for CANFD1 clock divider. It could be 1~8 \hideinitializer */
#define CLK_CLKDIV0_CANFD2(x) (((x) - 1UL) << CLK_CLKDIV0_CANFD2DIV_Pos) /*!< CLKDIV0 Setting for CANFD2 clock divider. It could be 1~8 \hideinitializer */
#define CLK_CLKDIV0_CANFD3(x) (((x) - 1UL) << CLK_CLKDIV0_CANFD3DIV_Pos) /*!< CLKDIV0 Setting for CANFD3 clock divider. It could be 1~8 \hideinitializer */
#define CLK_CLKDIV0_DCUP(x) (((x) - 1UL) << CLK_CLKDIV0_DCUPDIV_Pos) /*!< CLKDIV0 Setting for DCUP clock divider. It could be 1~8 \hideinitializer */
#define CLK_CLKDIV0_ACLK0(x) (((x) - 1UL) << CLK_CLKDIV0_ACLK0DIV_Pos) /*!< CLKDIV0 Setting for ACLK0 clock divider. It could be 1~2 \hideinitializer */
#define CLK_CLKDIV0_GMAC0(x) (((x) - 1UL) << CLK_CLKDIV0_GMAC0DIV_Pos) /*!< CLKDIV0 Setting for GMAC0 clock divider. It could be 1~4 \hideinitializer */
#define CLK_CLKDIV0_GMAC1(x) (((x) - 1UL) << CLK_CLKDIV0_GMAC1DIV_Pos) /*!< CLKDIV0 Setting for GMAC1 clock divider. It could be 1~4 \hideinitializer */
/*---------------------------------------------------------------------------------------------------------*/
/* CLKDIV1 constant definitions. */
/*---------------------------------------------------------------------------------------------------------*/
#define CLK_CLKDIV1_SC0(x) (((x) - 1UL) << CLK_CLKDIV1_SC0DIV_Pos) /*!< CLKDIV1 Setting for SC0 clock divider. It could be 1~16 \hideinitializer */
#define CLK_CLKDIV1_SC1(x) (((x) - 1UL) << CLK_CLKDIV1_SC1DIV_Pos) /*!< CLKDIV1 Setting for SC1 clock divider. It could be 1~16 \hideinitializer */
#define CLK_CLKDIV1_CCAP0(x) (((x) - 1UL) << CLK_CLKDIV1_CCAP0DIV_Pos) /*!< CLKDIV1 Setting for CCAP0 clock divider. It could be 1~16 \hideinitializer */
#define CLK_CLKDIV1_CCAP1(x) (((x) - 1UL) << CLK_CLKDIV1_CCAP1DIV_Pos) /*!< CLKDIV1 Setting for CCAP1 clock divider. It could be 1~16 \hideinitializer */
#define CLK_CLKDIV1_UART0(x) (((x) - 1UL) << CLK_CLKDIV1_UART0DIV_Pos) /*!< CLKDIV1 Setting for UART0 clock divider. It could be 1~16 \hideinitializer */
#define CLK_CLKDIV1_UART1(x) (((x) - 1UL) << CLK_CLKDIV1_UART1DIV_Pos) /*!< CLKDIV1 Setting for UART1 clock divider. It could be 1~16 \hideinitializer */
#define CLK_CLKDIV1_UART2(x) (((x) - 1UL) << CLK_CLKDIV1_UART2DIV_Pos) /*!< CLKDIV1 Setting for UART2 clock divider. It could be 1~16 \hideinitializer */
#define CLK_CLKDIV1_UART3(x) (((x) - 1UL) << CLK_CLKDIV1_UART3DIV_Pos) /*!< CLKDIV1 Setting for UART3 clock divider. It could be 1~16 \hideinitializer */
/*---------------------------------------------------------------------------------------------------------*/
/* CLKDIV2 constant definitions. */
/*---------------------------------------------------------------------------------------------------------*/
#define CLK_CLKDIV2_UART4(x) (((x) - 1UL) << CLK_CLKDIV2_UART4DIV_Pos) /*!< CLKDIV2 Setting for UART4 clock divider. It could be 1~16 \hideinitializer */
#define CLK_CLKDIV2_UART5(x) (((x) - 1UL) << CLK_CLKDIV2_UART5DIV_Pos) /*!< CLKDIV2 Setting for UART5 clock divider. It could be 1~16 \hideinitializer */
#define CLK_CLKDIV2_UART6(x) (((x) - 1UL) << CLK_CLKDIV2_UART6DIV_Pos) /*!< CLKDIV2 Setting for UART6 clock divider. It could be 1~16 \hideinitializer */
#define CLK_CLKDIV2_UART7(x) (((x) - 1UL) << CLK_CLKDIV2_UART7DIV_Pos) /*!< CLKDIV2 Setting for UART7 clock divider. It could be 1~16 \hideinitializer */
#define CLK_CLKDIV2_UART8(x) (((x) - 1UL) << CLK_CLKDIV2_UART8DIV_Pos) /*!< CLKDIV2 Setting for UART8 clock divider. It could be 1~16 \hideinitializer */
#define CLK_CLKDIV2_UART9(x) (((x) - 1UL) << CLK_CLKDIV2_UART9DIV_Pos) /*!< CLKDIV2 Setting for UART9 clock divider. It could be 1~16 \hideinitializer */
#define CLK_CLKDIV2_UART10(x) (((x) - 1UL) << CLK_CLKDIV2_UART10DIV_Pos) /*!< CLKDIV2 Setting for UART10 clock divider. It could be 1~16 \hideinitializer */
#define CLK_CLKDIV2_UART11(x) (((x) - 1UL) << CLK_CLKDIV2_UART11DIV_Pos) /*!< CLKDIV2 Setting for UART11 clock divider. It could be 1~16 \hideinitializer */
/*---------------------------------------------------------------------------------------------------------*/
/* CLKDIV3 constant definitions. */
/*---------------------------------------------------------------------------------------------------------*/
#define CLK_CLKDIV3_UART12(x) (((x) - 1UL) << CLK_CLKDIV3_UART12DIV_Pos) /*!< CLKDIV3 Setting for UART12 clock divider. It could be 1~16 \hideinitializer */
#define CLK_CLKDIV3_UART13(x) (((x) - 1UL) << CLK_CLKDIV3_UART13DIV_Pos) /*!< CLKDIV3 Setting for UART13 clock divider. It could be 1~16 \hideinitializer */
#define CLK_CLKDIV3_UART14(x) (((x) - 1UL) << CLK_CLKDIV3_UART14DIV_Pos) /*!< CLKDIV3 Setting for UART14 clock divider. It could be 1~16 \hideinitializer */
#define CLK_CLKDIV3_UART15(x) (((x) - 1UL) << CLK_CLKDIV3_UART15DIV_Pos) /*!< CLKDIV3 Setting for UART15 clock divider. It could be 1~16 \hideinitializer */
#define CLK_CLKDIV3_UART16(x) (((x) - 1UL) << CLK_CLKDIV3_UART16DIV_Pos) /*!< CLKDIV3 Setting for UART16 clock divider. It could be 1~16 \hideinitializer */
/*---------------------------------------------------------------------------------------------------------*/
/* CLKDIV4 constant definitions. */
/*---------------------------------------------------------------------------------------------------------*/
#define CLK_CLKDIV4_EADC(x) (((x) - 1UL) << CLK_CLKDIV4_EADCDIV_Pos) /*!< CLKDIV4 Setting for EADC clock divider. It could be 1~16 \hideinitializer */
#define CLK_CLKDIV4_ADC(x) (((x) - 1UL) << CLK_CLKDIV4_ADCDIV_Pos) /*!< CLKDIV4 Setting for ADC clock divider. It could be 1~131072 \hideinitializer */
#define CLK_CLKDIV4_KPI(x) (((x) - 1UL) << CLK_CLKDIV4_KPIDIV_Pos) /*!< CLKDIV4 Setting for KPI clock divider. It could be 1~256 \hideinitializer */
/*---------------------------------------------------------------------------------------------------------*/
/* MODULE constant definitions. */
/*---------------------------------------------------------------------------------------------------------*/
/* APBCLK(31:29)|CLKSEL(28:26)|CLKSEL_Msk(25:22) |CLKSEL_Pos(21:17)|CLKDIV(16:14)|CLKDIV_Msk(13:10)|CLKDIV_Pos(9:5)|IP_EN_Pos(4:0) */
#define MODULE_APBCLK(x) (((x) >>29) & 0x7UL) /*!< Calculate SYSCLK/APBCLK offset on MODULE index, 0x0:SYSCLK0, 0x1:SYSCLK1, 0x2:APBCLK0, 0x3:APBCLK1, 0x4:APBCLK2 \hideinitializer */
#define MODULE_CLKSEL(x) (((x) >>26) & 0x7UL) /*!< Calculate CLKSEL offset on MODULE index, 0x0:CLKSEL0, 0x1:CLKSEL1, 0x2:CLKSEL2, 0x3:CLKSEL3, 0x4:CLKSEL4 \hideinitializer */
#define MODULE_CLKSEL_Msk(x) (((x) >>22) & 0xfUL) /*!< Calculate CLKSEL mask offset on MODULE index \hideinitializer */
#define MODULE_CLKSEL_Pos(x) (((x) >>17) & 0x1fUL) /*!< Calculate CLKSEL position offset on MODULE index \hideinitializer */
#define MODULE_CLKDIV(x) (((x) >>14) & 0x7UL) /*!< Calculate APBCLK CLKDIV on MODULE index, 0x0:CLKDIV0, 0x1:CLKDIV1, 0x2:CLKDIV2, 0x3:CLKDIV3, 0x4:CLKDIV4 \hideinitializer */
#define MODULE_CLKDIV_Msk(x) (((x) >>10) & 0xfUL) /*!< Calculate CLKDIV mask offset on MODULE index \hideinitializer */
#define MODULE_CLKDIV_Pos(x) (((x) >>5 ) & 0x1fUL) /*!< Calculate CLKDIV position offset on MODULE index \hideinitializer */
#define MODULE_IP_EN_Pos(x) (((x) >>0 ) & 0x1fUL) /*!< Calculate APBCLK offset on MODULE index \hideinitializer */
#define MODULE_NoMsk 0x0UL /*!< Not mask on MODULE index \hideinitializer */
#define NA MODULE_NoMsk /*!< Not Available \hideinitializer */
#define MODULE_APBCLK_ENC(x) (((x) & 0x07UL) << 29) /*!< MODULE index, 0x0:SYSCLK0, 0x1:SYSCLK1, 0x2:APBCLK0, 0x3:APBCLK1, 0x4:APBCLK2 \hideinitializer */
#define MODULE_CLKSEL_ENC(x) (((x) & 0x07UL) << 26) /*!< CLKSEL offset on MODULE index, 0x0:CLKSEL0, 0x1:CLKSEL1, 0x2:CLKSEL2, 0x3:CLKSEL3, 0x4:CLKSEL4 \hideinitializer */
#define MODULE_CLKSEL_Msk_ENC(x) (((x) & 0x0fUL) << 22) /*!< CLKSEL mask offset on MODULE index \hideinitializer */
#define MODULE_CLKSEL_Pos_ENC(x) (((x) & 0x1fUL) << 17) /*!< CLKSEL position offset on MODULE index \hideinitializer */
#define MODULE_CLKDIV_ENC(x) (((x) & 0x07UL) << 14) /*!< APBCLK CLKDIV on MODULE index, 0x0:CLKDIV0, 0x1:CLKDIV1, 0x2:CLKDIV2, 0x3:CLKDIV3, 0x4:CLKDIV4 \hideinitializer */
#define MODULE_CLKDIV_Msk_ENC(x) (((x) & 0x0fUL) << 10) /*!< CLKDIV mask offset on MODULE index \hideinitializer */
#define MODULE_CLKDIV_Pos_ENC(x) (((x) & 0x1fUL) << 5 ) /*!< CLKDIV position offset on MODULE index \hideinitializer */
#define MODULE_IP_EN_Pos_ENC(x) (((x) & 0x1fUL) << 0 ) /*!< AHBCLK/APBCLK offset on MODULE index \hideinitializer */
#define PDMA0_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(0UL<<0)) /*!< PDMA0 Module \hideinitializer */
#define PDMA1_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(1UL<<0)) /*!< PDMA1 Module \hideinitializer */
#define PDMA2_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(2UL<<0)) /*!< PDMA2 Module \hideinitializer */
#define PDMA3_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(3UL<<0)) /*!< PDMA3 Module \hideinitializer */
#define WHC0_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(4UL<<0)) /*!< WH0 Module \hideinitializer */
#define WHC1_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(5UL<<0)) /*!< WH1 Module \hideinitializer */
#define HWSEM0_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(6UL<<0)) /*!< HWS Module \hideinitializer */
#define EBI_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(7UL<<0)) /*!< EBI Module \hideinitializer */
#define SRAM0_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(8UL<<0)) /*!< SRAM0 Module \hideinitializer */
#define SRAM1_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(9UL<<0)) /*!< SRAM1 Module \hideinitializer */
#define ROM_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(10UL<<0)) /*!< ROM Module \hideinitializer */
#define TRA_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(11UL<<0)) /*!< TRA Module \hideinitializer */
#define DBG_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(12UL<<0)) /*!< DBG Module \hideinitializer */
#define CLKO_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(13UL<<0)) /*!< CLKO Module \hideinitializer */
#define GTMR_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(14UL<<0)) /*!< GTMR Module \hideinitializer */
#define GPA_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(16UL<<0)) /*!< GPA Module \hideinitializer */
#define GPB_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(17UL<<0)) /*!< GPB Module \hideinitializer */
#define GPC_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(18UL<<0)) /*!< GPC Module \hideinitializer */
#define GPD_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(19UL<<0)) /*!< GPD Module \hideinitializer */
#define GPE_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(20UL<<0)) /*!< GPE Module \hideinitializer */
#define GPF_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(21UL<<0)) /*!< GPF Module \hideinitializer */
#define GPG_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(22UL<<0)) /*!< GPG Module \hideinitializer */
#define GPH_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(23UL<<0)) /*!< GPH Module \hideinitializer */
#define GPI_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(24UL<<0)) /*!< GPI Module \hideinitializer */
#define GPJ_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(25UL<<0)) /*!< GPJ Module \hideinitializer */
#define GPK_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(26UL<<0)) /*!< GPK Module \hideinitializer */
#define GPL_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(27UL<<0)) /*!< GPL Module \hideinitializer */
#define GPM_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(28UL<<0)) /*!< GPM Module \hideinitializer */
#define GPN_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(29UL<<0)) /*!< GPN Module \hideinitializer */
#define CA35_MODULE ((0UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(0UL<<0)) /*!< CA35 Module \hideinitializer */
#define RTP_MODULE ((0UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(1UL<<0)) /*!< RTP Module \hideinitializer */
#define TAHB_MODULE ((0UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(2UL<<0)) /*!< TAHB Module \hideinitializer */
#define LVRDB_MODULE ((0UL<<29)|(0UL<<26) |(0x1UL<<22) |(3UL<<17) |(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(3UL<<0)) /*!< LVRDB Module \hideinitializer */
#define DDR0_MODULE ((0UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(4UL<<0)) /*!< DDR0 Module \hideinitializer */
#define DDR6_MODULE ((0UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(5UL<<0)) /*!< DDR6 Module \hideinitializer */
#define CANFD0_MODULE ((0UL<<29)|(4<<26)|(1<<22)|(16<<17)|(0<<14)|(7<<10)|(0<<5)|(8UL<<0)) /*!< CANFD0 Module \hideinitializer */
#define CANFD1_MODULE ((0UL<<29)|(4<<26)|(1<<22)|(17<<17)|(0<<14)|(7<<10)|(4<<5)|(9UL<<0)) /*!< CANFD1 Module \hideinitializer */
#define CANFD2_MODULE ((0UL<<29)|(4<<26)|(1<<22)|(18<<17)|(0<<14)|(7<<10)|(8<<5)|(10UL<<0)) /*!< CANFD2 Module \hideinitializer */
#define CANFD3_MODULE ((0UL<<29)|(4<<26)|(1<<22)|(19<<17)|(0<<14)|(7<<10)|(12<<5)|(11UL<<0)) /*!< CANFD3 Module \hideinitializer */
#define SDH0_MODULE ((0UL<<29)|(0UL<<26) |(0x3UL<<22) |(0x10UL<<17) |(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(16UL<<0)) /*!< SDH0 Module */
#define SDH1_MODULE ((0UL<<29)|(0UL<<26) |(0x3UL<<22) |(0x12UL<<17) |(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(17UL<<0)) /*!< SDH1 Module */
#define NAND_MODULE ((0UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(18UL<<0)) /*!< NAND Module \hideinitializer */
#define USBD_MODULE ((0UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(19UL<<0)) /*!< USBD Module \hideinitializer */
#define USBH_MODULE ((0UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(20UL<<0)) /*!< USBH Module \hideinitializer */
#define HUSBH0_MODULE ((0UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(21UL<<0)) /*!< HUSBH0 Module \hideinitializer */
#define HUSBH1_MODULE ((0UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(22UL<<0)) /*!< HUSBH1 Module \hideinitializer */
#define GFX_MODULE ((0UL<<29)|(0UL<<26) |(0x1UL<<22) |(26UL<<17) |(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(24UL<<0)) /*!< GFX Module \hideinitializer */
#define VDEC_MODULE ((0UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(25UL<<0)) /*!< VDEC Module \hideinitializer */
#define DCU_MODULE ((0UL<<29)|(0UL<<26) |(0x1UL<<22) |(24UL<<17) |(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(26UL<<0)) /*!< DCU Module \hideinitializer */
#define GMAC0_MODULE ((0UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(0UL<<14) |(0x3UL<<10) |(28UL<<5) |(27UL<<0)) /*!< GMAC0 Module \hideinitializer */
#define GMAC1_MODULE ((0UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(0UL<<14) |(0x3UL<<10) |(30UL<<5) |(28UL<<0)) /*!< GMAC1 Module \hideinitializer */
#define CCAP0_MODULE ((0UL<<29)|(0UL<<26) |(0x3UL<<22) |(12UL<<17) |(1UL<<14) |(0xFUL<<10) |(8UL<<5) |(29UL<<0)) /*!< CCAP0 Module \hideinitializer */
#define CCAP1_MODULE ((0UL<<29)|(0UL<<26) |(0x3UL<<22) |(14UL<<17) |(1UL<<14) |(0xFUL<<10) |(12UL<<5) |(30UL<<0)) /*!< CCAP1 Module \hideinitializer */
#define TMR0_MODULE ((2UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(0UL<<0)) /*!< TMR0 Module \hideinitializer */
#define TMR1_MODULE ((2UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(1UL<<0)) /*!< TMR1 Module \hideinitializer */
#define TMR2_MODULE ((2UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(2UL<<0)) /*!< TMR2 Module \hideinitializer */
#define TMR3_MODULE ((2UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(3UL<<0)) /*!< TMR3 Module \hideinitializer */
#define TMR4_MODULE ((2UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(4UL<<0)) /*!< TMR4 Module \hideinitializer */
#define TMR5_MODULE ((2UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(5UL<<0)) /*!< TMR5 Module \hideinitializer */
#define TMR6_MODULE ((2UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(6UL<<0)) /*!< TMR6 Module \hideinitializer */
#define TMR7_MODULE ((2UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(7UL<<0)) /*!< TMR7 Module \hideinitializer */
#define TMR8_MODULE ((2UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(8UL<<0)) /*!< TMR8 Module \hideinitializer */
#define TMR9_MODULE ((2UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(9UL<<0)) /*!< TMR9 Module \hideinitializer */
#define TMR10_MODULE ((2UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(10UL<<0)) /*!< TMR10 Module \hideinitializer */
#define TMR11_MODULE ((2UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(11UL<<0)) /*!< TMR11 Module \hideinitializer */
#define UART0_MODULE ((2UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(12UL<<0)) /*!< UART0 Module \hideinitializer */
#define UART1_MODULE ((2UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(13UL<<0)) /*!< UART1 Module \hideinitializer */
#define UART2_MODULE ((2UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(14UL<<0)) /*!< UART2 Module \hideinitializer */
#define UART3_MODULE ((2UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(15UL<<0)) /*!< UART3 Module \hideinitializer */
#define UART4_MODULE ((2UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(16UL<<0)) /*!< UART4 Module \hideinitializer */
#define UART5_MODULE ((2UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(17UL<<0)) /*!< UART5 Module \hideinitializer */
#define UART6_MODULE ((2UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(18UL<<0)) /*!< UART6 Module \hideinitializer */
#define UART7_MODULE ((2UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(19UL<<0)) /*!< UART7 Module \hideinitializer */
#define UART8_MODULE ((2UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(20UL<<0)) /*!< UART8 Module \hideinitializer */
#define UART9_MODULE ((2UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(21UL<<0)) /*!< UART9 Module \hideinitializer */
#define UART10_MODULE ((2UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(22UL<<0)) /*!< UART10 Module \hideinitializer */
#define UART11_MODULE ((2UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(23UL<<0)) /*!< UART11 Module \hideinitializer */
#define UART12_MODULE ((2UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(24UL<<0)) /*!< UART12 Module \hideinitializer */
#define UART13_MODULE ((2UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(25UL<<0)) /*!< UART13 Module \hideinitializer */
#define UART14_MODULE ((2UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(26UL<<0)) /*!< UART14 Module \hideinitializer */
#define UART15_MODULE ((2UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(27UL<<0)) /*!< UART15 Module \hideinitializer */
#define UART16_MODULE ((2UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(28UL<<0)) /*!< UART16 Module \hideinitializer */
#define RTC_MODULE ((2UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(29UL<<0)) /*!< RTC Module \hideinitializer */
#define DDRP_MODULE ((2UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(30UL<<0)) /*!< DDRP Module \hideinitializer */
#define KPI_MODULE ((2UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(31UL<<0)) /*!< KPI Module \hideinitializer */
#define I2C0_MODULE ((3UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(0UL<<0)) /*!< I2C0 Module \hideinitializer */
#define I2C1_MODULE ((3UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(1UL<<0)) /*!< I2C1 Module \hideinitializer */
#define I2C2_MODULE ((3UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(2UL<<0)) /*!< I2C2 Module \hideinitializer */
#define I2C3_MODULE ((3UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(3UL<<0)) /*!< I2C3 Module \hideinitializer */
#define I2C4_MODULE ((3UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(4UL<<0)) /*!< I2C4 Module \hideinitializer */
#define I2C5_MODULE ((3UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(5UL<<0)) /*!< I2C5 Module \hideinitializer */
#define QSPI0_MODULE ((3UL<<29)|(4UL<<26) |(0x3UL<<22) |(8UL<<17) |(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(6UL<<0)) /*!< QSPI0 Module \hideinitializer */
#define QSPI1_MODULE ((3UL<<29)|(4UL<<26) |(0x3UL<<22) |(10UL<<17) |(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(7UL<<0)) /*!< QSPI1 Module \hideinitializer */
#define SC0_MODULE ((3UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(12UL<<0)) /*!< SC0 Module \hideinitializer */
#define SC1_MODULE ((3UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(13UL<<0)) /*!< SC1 Module \hideinitializer */
#define WDT0_MODULE ((3UL<<29)|(3UL<<26) |(0x3UL<<22) |(20UL<<17) |(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(16UL<<0)) /*!< WDT0 Module \hideinitializer */
#define WDT1_MODULE ((3UL<<29)|(3UL<<26) |(0x3UL<<22) |(24UL<<17) |(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(17UL<<0)) /*!< WDT1 Module \hideinitializer */
#define WDT2_MODULE ((3UL<<29)|(3UL<<26) |(0x3UL<<22) |(28UL<<17) |(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(18UL<<0)) /*!< WDT2 Module \hideinitializer */
#define EPWM0_MODULE ((3UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(24UL<<0)) /*!< EPWM0 Module \hideinitializer */
#define EPWM1_MODULE ((3UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(25UL<<0)) /*!< EPWM1 Module \hideinitializer */
#define EPWM2_MODULE ((3UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(26UL<<0)) /*!< EPWM2 Module \hideinitializer */
#define I2S0_MODULE ((4UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(0UL<<0)) /*!< I2S0 Module \hideinitializer */
#define I2S1_MODULE ((4UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(1UL<<0)) /*!< I2S1 Module \hideinitializer */
#define SSMCC_MODULE ((4UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(2UL<<0)) /*!< SSMCC Module \hideinitializer */
#define SSPCC_MODULE ((4UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(3UL<<0)) /*!< SSPCC Module \hideinitializer */
#define SPI0_MODULE ((4UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(4UL<<0)) /*!< SPI0 Module \hideinitializer */
#define SPI1_MODULE ((4UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(5UL<<0)) /*!< SPI1 Module \hideinitializer */
#define SPI2_MODULE ((4UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(6UL<<0)) /*!< SPI2 Module \hideinitializer */
#define SPI3_MODULE ((4UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(7UL<<0)) /*!< SPI3 Module \hideinitializer */
#define ECAP0_MODULE ((4UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(8UL<<0)) /*!< ECAP0 Module \hideinitializer */
#define ECAP1_MODULE ((4UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(9UL<<0)) /*!< ECAP1 Module \hideinitializer */
#define ECAP2_MODULE ((4UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(10UL<<0)) /*!< ECAP2 Module \hideinitializer */
#define QEI0_MODULE ((4UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(12UL<<0)) /*!< QEI0 Module \hideinitializer */
#define QEI1_MODULE ((4UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(13UL<<0)) /*!< QEI1 Module \hideinitializer */
#define QEI2_MODULE ((4UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(14UL<<0)) /*!< QEI2 Module \hideinitializer */
#define ADC_MODULE ((4UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(24UL<<0)) /*!< ADCModule \hideinitializer */
#define EADC0_MODULE ((4UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(25UL<<0)) /*!< EADC0 Module \hideinitializer */
/*@}*/ /* end of group CLK_EXPORTED_CONSTANTS */
/** @addtogroup CLK_EXPORTED_FUNCTIONS CLK Exported Functions
@{
*/
#if defined (USE_MA35D1_SUBM)
/*---------------------------------------------------------------------------------------------------------*/
/* static inline functions */
/*---------------------------------------------------------------------------------------------------------*/
/* Declare these inline functions here to avoid MISRA C 2004 rule 8.1 error */
__STATIC_INLINE void CLK_SysTickDelay(uint32_t us);
__STATIC_INLINE void CLK_SysTickLongDelay(uint32_t us);
/**
* @brief This function execute delay function.
* @param[in] us Delay time. The Max value is 2^24 / CPU Clock(MHz). Ex:
* 72MHz => 233016us, 50MHz => 335544us,
* 48MHz => 349525us, 28MHz => 699050us ...
* @return None
* @details Use the SysTick to generate the delay time and the unit is in us.
* The SysTick clock source is from HCLK, i.e the same as system core clock.
*/
__STATIC_INLINE void CLK_SysTickDelay(uint32_t us)
{
SysTick->LOAD = us * CyclesPerUs;
SysTick->VAL = 0x0UL;
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_ENABLE_Msk;
/* Waiting for down-count to zero */
while ((SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk) == 0UL)
{
}
/* Disable SysTick counter */
SysTick->CTRL = 0UL;
}
/**
* @brief This function execute long delay function.
* @param[in] us Delay time.
* @return None
* @details Use the SysTick to generate the long delay time and the UNIT is in us.
* The SysTick clock source is from HCLK, i.e the same as system core clock.
* User can use SystemCoreClockUpdate() to calculate CyclesPerUs automatically before using this function.
*/
__STATIC_INLINE void CLK_SysTickLongDelay(uint32_t us)
{
uint32_t delay;
/* It should <= 349525us for each delay loop */
delay = 349525UL;
do
{
if (us > delay)
{
us -= delay;
}
else
{
delay = us;
us = 0UL;
}
SysTick->LOAD = delay * CyclesPerUs;
SysTick->VAL = (0x0UL);
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_ENABLE_Msk;
/* Waiting for down-count to zero */
while ((SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk) == 0UL);
/* Disable SysTick counter */
SysTick->CTRL = 0UL;
}
while (us > 0UL);
}
#else
void SystemCoreClockUpdate(void);
#endif
__STATIC_INLINE void CLK_SetPLLPowerDown(uint32_t u32PllIdx)
{
CLK->PLL[u32PllIdx].CTL1 |= CLK_PLLnCTL1_PD_Msk;
}
void CLK_DisableCKO(void);
void CLK_EnableCKO(uint32_t u32ClkSrc, uint32_t u32ClkDiv, uint32_t u32ClkDivBy1En);
void CLK_PowerDown(void);
uint32_t CLK_GetHXTFreq(void);
uint32_t CLK_GetLXTFreq(void);
uint32_t CLK_GetSYSCLK0Freq(void);
uint32_t CLK_GetSYSCLK1Freq(void);
uint32_t CLK_GetPCLK3Freq(void);
uint32_t CLK_GetCPUFreq(void);
uint32_t CLK_SetCoreClock(uint32_t u32Hclk);
void CLK_SetModuleClock(uint32_t u32ModuleIdx, uint32_t u32ClkSrc, uint32_t u32ClkDiv);
void CLK_SetSysTickClockSrc(uint32_t u32ClkSrc);
void CLK_EnableXtalRC(uint32_t u32ClkMask);
void CLK_DisableXtalRC(uint32_t u32ClkMask);
void CLK_EnableModuleClock(uint32_t u32ModuleIdx);
void CLK_DisableModuleClock(uint32_t u32ModuleIdx);
void CLK_DisablePLL(uint32_t u32PllIdx);
uint32_t CLK_WaitClockReady(uint32_t u32ClkMask);
void CLK_EnableSysTick(uint32_t u32ClkSrc, uint32_t u32Count);
void CLK_DisableSysTick(void);
uint32_t CLK_GetCAPLLClockFreq(void);
uint32_t CLK_GetPLLClockFreq(uint32_t u32PllIdx);
uint32_t CLK_GetModuleClockSource(uint32_t u32ModuleIdx);
uint32_t CLK_GetModuleClockDivider(uint32_t u32ModuleIdx);
uint32_t CLK_GetCAPLLClockFreq(void);
uint64_t CLK_SetPLLFreq(uint32_t u32PllIdx, uint32_t u32OpMode, uint64_t PllSrcClk, uint64_t u64PllFreq);
uint32_t CLK_GetPLLClockFreq(uint32_t u32PllIdx);
uint32_t CLK_GetPLLOpMode(uint32_t u32PllIdx);
#define CLK_GetPCLK0Freq() CLK_GetSYSCLK1Freq()
#define CLK_GetPCLK1Freq() CLK_GetSYSCLK1Freq()
#define CLK_GetPCLK2Freq() CLK_GetSYSCLK1Freq()
#define CLK_GetPCLK3Freq() (CLK_GetSYSCLK1Freq() / 2)
#define CLK_GetPCLK4Freq() (CLK_GetSYSCLK1Freq() / 2)
#define CLK_GetHCLK0Freq() CLK_GetSYSCLK1Freq()
#define CLK_GetHCLK1Freq() CLK_GetSYSCLK1Freq()
#define CLK_GetHCLK2Freq() CLK_GetSYSCLK1Freq()
#define CLK_GetHCLK3Freq() (CLK_GetSYSCLK1Freq() / 2)
#define CLK_GetCA35CPUFreq CLK_GetCAPLLClockFreq
/*@}*/ /* end of group CLK_EXPORTED_FUNCTIONS */
/*@}*/ /* end of group CLK_Driver */
/*@}*/ /* end of group Standard_Driver */
#ifdef __cplusplus
}
#endif
#endif /* __NU_CLK_H__ */
|
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79d343002bb63a44f8ab0dbac0c9f4ec54078c3a
|
/lib/libc/include/any-windows-any/bugcodes.h
|
902637326d51ab8dee6a187d27dbe4312df3023d
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[
"MIT",
"LicenseRef-scancode-warranty-disclaimer",
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] |
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|
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| 2023-08-31T13:16:45.980913
| 2023-08-31T05:50:29
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| 2015-08-06T00:51:28
|
Zig
|
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|
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| false
| false
| 26,002
|
h
|
bugcodes.h
|
/* This file is generated with wmc version 1.4-rc5. Do not edit! */
/* Source : bugcodes.mc */
/* Cmdline: wmc bugcodes.mc */
/* Date : Thu Jul 4 12:10:51 2013 */
#ifndef __WMCGENERATED_4f4b46e6_H
#define __WMCGENERATED_4f4b46e6_H
/* Severity codes */
#define STATUS_SEVERITY_ERROR 0x3
#define STATUS_SEVERITY_INFORMATIONAL 0x1
#define STATUS_SEVERITY_SUCCESS 0x0
#define STATUS_SEVERITY_WARNING 0x2
/* Facility codes */
#define FACILITY_IO_ERROR_CODE 0x4
#define FACILITY_RUNTIME 0x2
#define FACILITY_STUBS 0x3
#define FACILITY_SYSTEM 0x0
/* Message definitions */
/* Created by : Marc Piulachs. */
/* This source code is offered for use in the public domain. */
/* ntoskrnl.exe bug codes */
/* message definitions */
/* MessageId : 0x4000007e */
/* Approximate msg: ReactOS (R) Kernel Version %hs (Build %u%hs) */
#define WINDOWS_NT_BANNER ((ULONG)0x4000007e)
/* MessageId : 0x40000087 */
/* Approximate msg: Service Pack */
#define WINDOWS_NT_CSD_STRING ((ULONG)0x40000087)
/* MessageId : 0x40000088 */
/* Approximate msg: %u System Processor [%u MB Memory] %Z */
#define WINDOWS_NT_INFO_STRING ((ULONG)0x40000088)
/* MessageId : 0x40000089 */
/* Approximate msg: MultiProcessor Kernel */
#define WINDOWS_NT_MP_STRING ((ULONG)0x40000089)
/* MessageId : 0x4000008a */
/* Approximate msg: A kernel thread terminated while holding a mutex */
#define THREAD_TERMINATE_HELD_MUTEX ((ULONG)0x4000008a)
/* MessageId : 0x4000009d */
/* Approximate msg: %u System Processors [%u MB Memory] %Z */
#define WINDOWS_NT_INFO_STRING_PLURAL ((ULONG)0x4000009d)
/* MessageId : 0x8000007f */
/* Approximate msg: A problem has been detected and ReactOS has been shut down to prevent damage */
#define BUGCHECK_MESSAGE_INTRO ((ULONG)0x8000007f)
/* MessageId : 0x80000080 */
/* Approximate msg: The problem seems to be caused by the following file: */
#define BUGCODE_ID_DRIVER ((ULONG)0x80000080)
/* MessageId : 0x80000081 */
/* Approximate msg: If this is the first time you've seen this Stop error screen, */
#define PSS_MESSAGE_INTRO ((ULONG)0x80000081)
/* MessageId : 0x80000082 */
/* Approximate msg: Check to make sure any new hardware or software is properly installed. */
#define BUGCODE_PSS_MESSAGE ((ULONG)0x80000082)
/* MessageId : 0x80000083 */
/* Approximate msg: Technical information: */
#define BUGCHECK_TECH_INFO ((ULONG)0x80000083)
/* MessageId : 0x00000000 */
/* Approximate msg: The bug code is undefined. Please use an existing code instead. */
#define UNDEFINED_BUG_CODE ((ULONG)0x00000000)
/* MessageId : 0x00000001 */
/* Approximate msg: APC_INDEX_MISMATCH */
#define APC_INDEX_MISMATCH ((ULONG)0x00000001)
/* MessageId : 0x00000002 */
/* Approximate msg: DEVICE_QUEUE_NOT_BUSY */
#define DEVICE_QUEUE_NOT_BUSY ((ULONG)0x00000002)
/* MessageId : 0x00000003 */
/* Approximate msg: INVALID_AFFINITY_SET */
#define INVALID_AFFINITY_SET ((ULONG)0x00000003)
/* MessageId : 0x00000004 */
/* Approximate msg: INVALID_DATA_ACCESS_TRAP */
#define INVALID_DATA_ACCESS_TRAP ((ULONG)0x00000004)
/* MessageId : 0x00000005 */
/* Approximate msg: INVALID_PROCESS_ATTACH_ATTEMPT */
#define INVALID_PROCESS_ATTACH_ATTEMPT ((ULONG)0x00000005)
/* MessageId : 0x00000006 */
/* Approximate msg: INVALID_PROCESS_DETACH_ATTEMPT */
#define INVALID_PROCESS_DETACH_ATTEMPT ((ULONG)0x00000006)
/* MessageId : 0x00000007 */
/* Approximate msg: INVALID_SOFTWARE_INTERRUPT */
#define INVALID_SOFTWARE_INTERRUPT ((ULONG)0x00000007)
/* MessageId : 0x00000008 */
/* Approximate msg: IRQL_NOT_DISPATCH_LEVEL */
#define IRQL_NOT_DISPATCH_LEVEL ((ULONG)0x00000008)
/* MessageId : 0x00000009 */
/* Approximate msg: IRQL_NOT_GREATER_OR_EQUAL */
#define IRQL_NOT_GREATER_OR_EQUAL ((ULONG)0x00000009)
/* MessageId : 0x0000000a */
/* Approximate msg: IRQL_NOT_LESS_OR_EQUAL */
#define IRQL_NOT_LESS_OR_EQUAL ((ULONG)0x0000000a)
/* MessageId : 0x0000000b */
/* Approximate msg: NO_EXCEPTION_HANDLING_SUPPORT */
#define NO_EXCEPTION_HANDLING_SUPPORT ((ULONG)0x0000000b)
/* MessageId : 0x0000000c */
/* Approximate msg: MAXIMUM_WAIT_OBJECTS_EXCEEDED */
#define MAXIMUM_WAIT_OBJECTS_EXCEEDED ((ULONG)0x0000000c)
/* MessageId : 0x0000000d */
/* Approximate msg: MUTEX_LEVEL_NUMBER_VIOLATION */
#define MUTEX_LEVEL_NUMBER_VIOLATION ((ULONG)0x0000000d)
/* MessageId : 0x0000000e */
/* Approximate msg: NO_USER_MODE_CONTEXT */
#define NO_USER_MODE_CONTEXT ((ULONG)0x0000000e)
/* MessageId : 0x0000000f */
/* Approximate msg: SPIN_LOCK_ALREADY_OWNED */
#define SPIN_LOCK_ALREADY_OWNED ((ULONG)0x0000000f)
/* MessageId : 0x00000010 */
/* Approximate msg: SPIN_LOCK_NOT_OWNED */
#define SPIN_LOCK_NOT_OWNED ((ULONG)0x00000010)
/* MessageId : 0x00000011 */
/* Approximate msg: THREAD_NOT_MUTEX_OWNER */
#define THREAD_NOT_MUTEX_OWNER ((ULONG)0x00000011)
/* MessageId : 0x00000012 */
/* Approximate msg: TRAP_CAUSE_UNKNOWN */
#define TRAP_CAUSE_UNKNOWN ((ULONG)0x00000012)
/* MessageId : 0x00000013 */
/* Approximate msg: EMPTY_THREAD_REAPER_LIST */
#define EMPTY_THREAD_REAPER_LIST ((ULONG)0x00000013)
/* MessageId : 0x00000014 */
/* Approximate msg: The thread reaper was handed a thread to reap, but the thread's process' */
#define CREATE_DELETE_LOCK_NOT_LOCKED ((ULONG)0x00000014)
/* MessageId : 0x00000015 */
/* Approximate msg: LAST_CHANCE_CALLED_FROM_KMODE */
#define LAST_CHANCE_CALLED_FROM_KMODE ((ULONG)0x00000015)
/* MessageId : 0x00000016 */
/* Approximate msg: CID_HANDLE_CREATION */
#define CID_HANDLE_CREATION ((ULONG)0x00000016)
/* MessageId : 0x00000017 */
/* Approximate msg: CID_HANDLE_DELETION */
#define CID_HANDLE_DELETION ((ULONG)0x00000017)
/* MessageId : 0x00000018 */
/* Approximate msg: REFERENCE_BY_POINTER */
#define REFERENCE_BY_POINTER ((ULONG)0x00000018)
/* MessageId : 0x00000019 */
/* Approximate msg: BAD_POOL_HEADER */
#define BAD_POOL_HEADER ((ULONG)0x00000019)
/* MessageId : 0x0000001a */
/* Approximate msg: MEMORY_MANAGEMENT */
#define MEMORY_MANAGEMENT ((ULONG)0x0000001a)
/* MessageId : 0x0000001b */
/* Approximate msg: PFN_SHARE_COUNT */
#define PFN_SHARE_COUNT ((ULONG)0x0000001b)
/* MessageId : 0x0000001c */
/* Approximate msg: PFN_REFERENCE_COUNT */
#define PFN_REFERENCE_COUNT ((ULONG)0x0000001c)
/* MessageId : 0x0000001d */
/* Approximate msg: NO_SPINLOCK_AVAILABLE */
#define NO_SPINLOCK_AVAILABLE ((ULONG)0x0000001d)
/* MessageId : 0x0000001e */
/* Approximate msg: Check to be sure you have adequate disk space. If a driver is */
#define KMODE_EXCEPTION_NOT_HANDLED ((ULONG)0x0000001e)
/* MessageId : 0x0000001f */
/* Approximate msg: SHARED_RESOURCE_CONV_ERROR */
#define SHARED_RESOURCE_CONV_ERROR ((ULONG)0x0000001f)
/* MessageId : 0x00000020 */
/* Approximate msg: KERNEL_APC_PENDING_DURING_EXIT */
#define KERNEL_APC_PENDING_DURING_EXIT ((ULONG)0x00000020)
/* MessageId : 0x00000021 */
/* Approximate msg: QUOTA_UNDERFLOW */
#define QUOTA_UNDERFLOW ((ULONG)0x00000021)
/* MessageId : 0x00000022 */
/* Approximate msg: FILE_SYSTEM */
#define FILE_SYSTEM ((ULONG)0x00000022)
/* MessageId : 0x00000023 */
/* Approximate msg: Disable or uninstall any anti-virus, disk defragmentation */
#define FAT_FILE_SYSTEM ((ULONG)0x00000023)
/* MessageId : 0x00000024 */
/* Approximate msg: NTFS_FILE_SYSTEM */
#define NTFS_FILE_SYSTEM ((ULONG)0x00000024)
/* MessageId : 0x00000025 */
/* Approximate msg: NPFS_FILE_SYSTEM */
#define NPFS_FILE_SYSTEM ((ULONG)0x00000025)
/* MessageId : 0x00000026 */
/* Approximate msg: CDFS_FILE_SYSTEM */
#define CDFS_FILE_SYSTEM ((ULONG)0x00000026)
/* MessageId : 0x00000027 */
/* Approximate msg: RDR_FILE_SYSTEM */
#define RDR_FILE_SYSTEM ((ULONG)0x00000027)
/* MessageId : 0x00000028 */
/* Approximate msg: CORRUPT_ACCESS_TOKEN */
#define CORRUPT_ACCESS_TOKEN ((ULONG)0x00000028)
/* MessageId : 0x00000029 */
/* Approximate msg: SECURITY_SYSTEM */
#define SECURITY_SYSTEM ((ULONG)0x00000029)
/* MessageId : 0x0000002a */
/* Approximate msg: INCONSISTENT_IRP */
#define INCONSISTENT_IRP ((ULONG)0x0000002a)
/* MessageId : 0x0000002b */
/* Approximate msg: PANIC_STACK_SWITCH */
#define PANIC_STACK_SWITCH ((ULONG)0x0000002b)
/* MessageId : 0x0000002c */
/* Approximate msg: PORT_DRIVER_INTERNAL */
#define PORT_DRIVER_INTERNAL ((ULONG)0x0000002c)
/* MessageId : 0x0000002d */
/* Approximate msg: SCSI_DISK_DRIVER_INTERNAL */
#define SCSI_DISK_DRIVER_INTERNAL ((ULONG)0x0000002d)
/* MessageId : 0x0000002e */
/* Approximate msg: Run system diagnostics supplied by your hardware manufacturer. */
#define DATA_BUS_ERROR ((ULONG)0x0000002e)
/* MessageId : 0x0000002f */
/* Approximate msg: INSTRUCTION_BUS_ERROR */
#define INSTRUCTION_BUS_ERROR ((ULONG)0x0000002f)
/* MessageId : 0x00000030 */
/* Approximate msg: SET_OF_INVALID_CONTEXT */
#define SET_OF_INVALID_CONTEXT ((ULONG)0x00000030)
/* MessageId : 0x00000031 */
/* Approximate msg: PHASE0_INITIALIZATION_FAILED */
#define PHASE0_INITIALIZATION_FAILED ((ULONG)0x00000031)
/* MessageId : 0x00000032 */
/* Approximate msg: PHASE1_INITIALIZATION_FAILED */
#define PHASE1_INITIALIZATION_FAILED ((ULONG)0x00000032)
/* MessageId : 0x00000033 */
/* Approximate msg: UNEXPECTED_INITIALIZATION_CALL */
#define UNEXPECTED_INITIALIZATION_CALL ((ULONG)0x00000033)
/* MessageId : 0x00000034 */
/* Approximate msg: CACHE_MANAGER */
#define CACHE_MANAGER ((ULONG)0x00000034)
/* MessageId : 0x00000035 */
/* Approximate msg: NO_MORE_IRP_STACK_LOCATIONS */
#define NO_MORE_IRP_STACK_LOCATIONS ((ULONG)0x00000035)
/* MessageId : 0x00000036 */
/* Approximate msg: DEVICE_REFERENCE_COUNT_NOT_ZERO */
#define DEVICE_REFERENCE_COUNT_NOT_ZERO ((ULONG)0x00000036)
/* MessageId : 0x00000037 */
/* Approximate msg: FLOPPY_INTERNAL_ERROR */
#define FLOPPY_INTERNAL_ERROR ((ULONG)0x00000037)
/* MessageId : 0x00000038 */
/* Approximate msg: SERIAL_DRIVER_INTERNAL */
#define SERIAL_DRIVER_INTERNAL ((ULONG)0x00000038)
/* MessageId : 0x00000039 */
/* Approximate msg: SYSTEM_EXIT_OWNED_MUTEX */
#define SYSTEM_EXIT_OWNED_MUTEX ((ULONG)0x00000039)
/* MessageId : 0x0000003e */
/* Approximate msg: MULTIPROCESSOR_CONFIGURATION_NOT_SUPPORTED */
#define MULTIPROCESSOR_CONFIGURATION_NOT_SUPPORTED ((ULONG)0x0000003e)
/* MessageId : 0x0000003f */
/* Approximate msg: Remove any recently installed software including backup */
#define NO_MORE_SYSTEM_PTES ((ULONG)0x0000003f)
/* MessageId : 0x00000040 */
/* Approximate msg: TARGET_MDL_TOO_SMALL */
#define TARGET_MDL_TOO_SMALL ((ULONG)0x00000040)
/* MessageId : 0x00000041 */
/* Approximate msg: MUST_SUCCEED_POOL_EMPTY */
#define MUST_SUCCEED_POOL_EMPTY ((ULONG)0x00000041)
/* MessageId : 0x00000042 */
/* Approximate msg: ATDISK_DRIVER_INTERNAL */
#define ATDISK_DRIVER_INTERNAL ((ULONG)0x00000042)
/* MessageId : 0x00000044 */
/* Approximate msg: MULTIPLE_IRP_COMPLETE_REQUESTS */
#define MULTIPLE_IRP_COMPLETE_REQUESTS ((ULONG)0x00000044)
/* MessageId : 0x00000045 */
/* Approximate msg: INSUFFICIENT_SYSTEM_MAP_REGS */
#define INSUFFICIENT_SYSTEM_MAP_REGS ((ULONG)0x00000045)
/* MessageId : 0x00000048 */
/* Approximate msg: CANCEL_STATE_IN_COMPLETED_IRP */
#define CANCEL_STATE_IN_COMPLETED_IRP ((ULONG)0x00000048)
/* MessageId : 0x00000049 */
/* Approximate msg: PAGE_FAULT_WITH_INTERRUPTS_OFF */
#define PAGE_FAULT_WITH_INTERRUPTS_OFF ((ULONG)0x00000049)
/* MessageId : 0x0000004a */
/* Approximate msg: IRQL_GT_ZERO_AT_SYSTEM_SERVICE */
#define IRQL_GT_ZERO_AT_SYSTEM_SERVICE ((ULONG)0x0000004a)
/* MessageId : 0x0000004b */
/* Approximate msg: STREAMS_INTERNAL_ERROR */
#define STREAMS_INTERNAL_ERROR ((ULONG)0x0000004b)
/* MessageId : 0x0000004c */
/* Approximate msg: FATAL_UNHANDLED_HARD_ERROR */
#define FATAL_UNHANDLED_HARD_ERROR ((ULONG)0x0000004c)
/* MessageId : 0x0000004d */
/* Approximate msg: NO_PAGES_AVAILABLE */
#define NO_PAGES_AVAILABLE ((ULONG)0x0000004d)
/* MessageId : 0x0000004e */
/* Approximate msg: PFN_LIST_CORRUPT */
#define PFN_LIST_CORRUPT ((ULONG)0x0000004e)
/* MessageId : 0x0000004f */
/* Approximate msg: NDIS_INTERNAL_ERROR */
#define NDIS_INTERNAL_ERROR ((ULONG)0x0000004f)
/* MessageId : 0x00000050 */
/* Approximate msg: PAGE_FAULT_IN_NONPAGED_AREA */
#define PAGE_FAULT_IN_NONPAGED_AREA ((ULONG)0x00000050)
/* MessageId : 0x00000051 */
/* Approximate msg: REGISTRY_ERROR */
#define REGISTRY_ERROR ((ULONG)0x00000051)
/* MessageId : 0x00000052 */
/* Approximate msg: MAILSLOT_FILE_SYSTEM */
#define MAILSLOT_FILE_SYSTEM ((ULONG)0x00000052)
/* MessageId : 0x00000053 */
/* Approximate msg: NO_BOOT_DEVICE */
#define NO_BOOT_DEVICE ((ULONG)0x00000053)
/* MessageId : 0x00000054 */
/* Approximate msg: LM_SERVER_INTERNAL_ERROR */
#define LM_SERVER_INTERNAL_ERROR ((ULONG)0x00000054)
/* MessageId : 0x00000055 */
/* Approximate msg: DATA_COHERENCY_EXCEPTION */
#define DATA_COHERENCY_EXCEPTION ((ULONG)0x00000055)
/* MessageId : 0x00000056 */
/* Approximate msg: INSTRUCTION_COHERENCY_EXCEPTION */
#define INSTRUCTION_COHERENCY_EXCEPTION ((ULONG)0x00000056)
/* MessageId : 0x00000057 */
/* Approximate msg: XNS_INTERNAL_ERROR */
#define XNS_INTERNAL_ERROR ((ULONG)0x00000057)
/* MessageId : 0x00000058 */
/* Approximate msg: FTDISK_INTERNAL_ERROR */
#define FTDISK_INTERNAL_ERROR ((ULONG)0x00000058)
/* MessageId : 0x00000059 */
/* Approximate msg: PINBALL_FILE_SYSTEM */
#define PINBALL_FILE_SYSTEM ((ULONG)0x00000059)
/* MessageId : 0x0000005a */
/* Approximate msg: CRITICAL_SERVICE_FAILED */
#define CRITICAL_SERVICE_FAILED ((ULONG)0x0000005a)
/* MessageId : 0x0000005b */
/* Approximate msg: SET_ENV_VAR_FAILED */
#define SET_ENV_VAR_FAILED ((ULONG)0x0000005b)
/* MessageId : 0x0000005c */
/* Approximate msg: HAL_INITIALIZATION_FAILED */
#define HAL_INITIALIZATION_FAILED ((ULONG)0x0000005c)
/* MessageId : 0x0000005d */
/* Approximate msg: UNSUPPORTED_PROCESSOR */
#define UNSUPPORTED_PROCESSOR ((ULONG)0x0000005d)
/* MessageId : 0x0000005e */
/* Approximate msg: OBJECT_INITIALIZATION_FAILED */
#define OBJECT_INITIALIZATION_FAILED ((ULONG)0x0000005e)
/* MessageId : 0x0000005f */
/* Approximate msg: SECURITY_INITIALIZATION_FAILED */
#define SECURITY_INITIALIZATION_FAILED ((ULONG)0x0000005f)
/* MessageId : 0x00000060 */
/* Approximate msg: PROCESS_INITIALIZATION_FAILED */
#define PROCESS_INITIALIZATION_FAILED ((ULONG)0x00000060)
/* MessageId : 0x00000061 */
/* Approximate msg: HAL1_INITIALIZATION_FAILED */
#define HAL1_INITIALIZATION_FAILED ((ULONG)0x00000061)
/* MessageId : 0x00000062 */
/* Approximate msg: OBJECT1_INITIALIZATION_FAILED */
#define OBJECT1_INITIALIZATION_FAILED ((ULONG)0x00000062)
/* MessageId : 0x00000063 */
/* Approximate msg: SECURITY1_INITIALIZATION_FAILED */
#define SECURITY1_INITIALIZATION_FAILED ((ULONG)0x00000063)
/* MessageId : 0x00000064 */
/* Approximate msg: SYMBOLIC_INITIALIZATION_FAILED */
#define SYMBOLIC_INITIALIZATION_FAILED ((ULONG)0x00000064)
/* MessageId : 0x00000065 */
/* Approximate msg: MEMORY1_INITIALIZATION_FAILED */
#define MEMORY1_INITIALIZATION_FAILED ((ULONG)0x00000065)
/* MessageId : 0x00000066 */
/* Approximate msg: CACHE_INITIALIZATION_FAILED */
#define CACHE_INITIALIZATION_FAILED ((ULONG)0x00000066)
/* MessageId : 0x00000067 */
/* Approximate msg: CONFIG_INITIALIZATION_FAILED */
#define CONFIG_INITIALIZATION_FAILED ((ULONG)0x00000067)
/* MessageId : 0x00000068 */
/* Approximate msg: FILE_INITIALIZATION_FAILED */
#define FILE_INITIALIZATION_FAILED ((ULONG)0x00000068)
/* MessageId : 0x00000069 */
/* Approximate msg: IO1_INITIALIZATION_FAILED */
#define IO1_INITIALIZATION_FAILED ((ULONG)0x00000069)
/* MessageId : 0x0000006a */
/* Approximate msg: LPC_INITIALIZATION_FAILED */
#define LPC_INITIALIZATION_FAILED ((ULONG)0x0000006a)
/* MessageId : 0x0000006b */
/* Approximate msg: PROCESS1_INITIALIZATION_FAILED */
#define PROCESS1_INITIALIZATION_FAILED ((ULONG)0x0000006b)
/* MessageId : 0x0000006c */
/* Approximate msg: REFMON_INITIALIZATION_FAILED */
#define REFMON_INITIALIZATION_FAILED ((ULONG)0x0000006c)
/* MessageId : 0x0000006d */
/* Approximate msg: SESSION1_INITIALIZATION_FAILED */
#define SESSION1_INITIALIZATION_FAILED ((ULONG)0x0000006d)
/* MessageId : 0x0000006e */
/* Approximate msg: SESSION2_INITIALIZATION_FAILED */
#define SESSION2_INITIALIZATION_FAILED ((ULONG)0x0000006e)
/* MessageId : 0x0000006f */
/* Approximate msg: SESSION3_INITIALIZATION_FAILED */
#define SESSION3_INITIALIZATION_FAILED ((ULONG)0x0000006f)
/* MessageId : 0x00000070 */
/* Approximate msg: SESSION4_INITIALIZATION_FAILED */
#define SESSION4_INITIALIZATION_FAILED ((ULONG)0x00000070)
/* MessageId : 0x00000071 */
/* Approximate msg: SESSION5_INITIALIZATION_FAILED */
#define SESSION5_INITIALIZATION_FAILED ((ULONG)0x00000071)
/* MessageId : 0x00000072 */
/* Approximate msg: ASSIGN_DRIVE_LETTERS_FAILED */
#define ASSIGN_DRIVE_LETTERS_FAILED ((ULONG)0x00000072)
/* MessageId : 0x00000073 */
/* Approximate msg: CONFIG_LIST_FAILED */
#define CONFIG_LIST_FAILED ((ULONG)0x00000073)
/* MessageId : 0x00000074 */
/* Approximate msg: BAD_SYSTEM_CONFIG_INFO */
#define BAD_SYSTEM_CONFIG_INFO ((ULONG)0x00000074)
/* MessageId : 0x00000075 */
/* Approximate msg: CANNOT_WRITE_CONFIGURATION */
#define CANNOT_WRITE_CONFIGURATION ((ULONG)0x00000075)
/* MessageId : 0x00000076 */
/* Approximate msg: PROCESS_HAS_LOCKED_PAGES */
#define PROCESS_HAS_LOCKED_PAGES ((ULONG)0x00000076)
/* MessageId : 0x00000077 */
/* Approximate msg: KERNEL_STACK_INPAGE_ERROR */
#define KERNEL_STACK_INPAGE_ERROR ((ULONG)0x00000077)
/* MessageId : 0x00000078 */
/* Approximate msg: PHASE0_EXCEPTION */
#define PHASE0_EXCEPTION ((ULONG)0x00000078)
/* MessageId : 0x00000079 */
/* Approximate msg: Mismatched Kernel and HAL image */
#define MISMATCHED_HAL ((ULONG)0x00000079)
/* MessageId : 0x0000007a */
/* Approximate msg: KERNEL_DATA_INPAGE_ERROR */
#define KERNEL_DATA_INPAGE_ERROR ((ULONG)0x0000007a)
/* MessageId : 0x0000007b */
/* Approximate msg: Check for viruses on your computer. Remove any newly installed */
#define INACCESSIBLE_BOOT_DEVICE ((ULONG)0x0000007b)
/* MessageId : 0x0000007d */
/* Approximate msg: INSTALL_MORE_MEMORY */
#define INSTALL_MORE_MEMORY ((ULONG)0x0000007d)
/* MessageId : 0x0000007e */
/* Approximate msg: SYSTEM_THREAD_EXCEPTION_NOT_HANDLED */
#define SYSTEM_THREAD_EXCEPTION_NOT_HANDLED ((ULONG)0x0000007e)
/* MessageId : 0x0000007f */
/* Approximate msg: Run a system diagnostic utility supplied by your hardware manufacturer. */
#define UNEXPECTED_KERNEL_MODE_TRAP ((ULONG)0x0000007f)
/* MessageId : 0x00000080 */
/* Approximate msg: Hardware malfunction */
#define NMI_HARDWARE_FAILURE ((ULONG)0x00000080)
/* MessageId : 0x00000081 */
/* Approximate msg: SPIN_LOCK_INIT_FAILURE */
#define SPIN_LOCK_INIT_FAILURE ((ULONG)0x00000081)
/* MessageId : 0x0000008e */
/* Approximate msg: KERNEL_MODE_EXCEPTION_NOT_HANDLED */
#define KERNEL_MODE_EXCEPTION_NOT_HANDLED ((ULONG)0x0000008e)
/* MessageId : 0x0000008f */
/* Approximate msg: PP0_INITIALIZATION_FAILED */
#define PP0_INITIALIZATION_FAILED ((ULONG)0x0000008f)
/* MessageId : 0x00000090 */
/* Approximate msg: PP1_INITIALIZATION_FAILED */
#define PP1_INITIALIZATION_FAILED ((ULONG)0x00000090)
/* MessageId : 0x00000093 */
/* Approximate msg: INVALID_KERNEL_HANDLE */
#define INVALID_KERNEL_HANDLE ((ULONG)0x00000093)
/* MessageId : 0x00000094 */
/* Approximate msg: KERNEL_STACK_LOCKED_AT_EXIT */
#define KERNEL_STACK_LOCKED_AT_EXIT ((ULONG)0x00000094)
/* MessageId : 0x00000096 */
/* Approximate msg: INVALID_WORK_QUEUE_ITEM */
#define INVALID_WORK_QUEUE_ITEM ((ULONG)0x00000096)
/* MessageId : 0x000000a0 */
/* Approximate msg: INTERNAL_POWER_ERROR */
#define INTERNAL_POWER_ERROR ((ULONG)0x000000a0)
/* MessageId : 0x000000a1 */
/* Approximate msg: Inconsistency detected in the PCI Bus driver's internal structures. */
#define PCI_BUS_DRIVER_INTERNAL ((ULONG)0x000000a1)
/* MessageId : 0x000000a5 */
/* Approximate msg: The BIOS in this system is not fully ACPI compliant. Please contact your */
#define ACPI_BIOS_ERROR ((ULONG)0x000000a5)
/* MessageId : 0x400000a8 */
/* Approximate msg: The system is booting in safemode - Minimal Services */
#define BOOTING_IN_SAFEMODE_MINIMAL ((ULONG)0x400000a8)
/* MessageId : 0x400000a9 */
/* Approximate msg: The system is booting in safemode - Minimal Services with Network */
#define BOOTING_IN_SAFEMODE_NETWORK ((ULONG)0x400000a9)
/* MessageId : 0x400000aa */
/* Approximate msg: The system is booting in safemode - Directory Services Repair */
#define BOOTING_IN_SAFEMODE_DSREPAIR ((ULONG)0x400000aa)
/* MessageId : 0x000000ac */
/* Approximate msg: Allocate from NonPaged Pool failed for a HAL critical allocation. */
#define HAL_MEMORY_ALLOCATION ((ULONG)0x000000ac)
/* MessageId : 0x000000b4 */
/* Approximate msg: The video driver failed to initialize */
#define VIDEO_DRIVER_INIT_FAILURE ((ULONG)0x000000b4)
/* MessageId : 0x400000b7 */
/* Approximate msg: Boot Logging Enabled */
#define BOOTLOG_ENABLED ((ULONG)0x400000b7)
/* MessageId : 0x000000b8 */
/* Approximate msg: A wait operation, attach process, or yield was attempted from a DPC routine. */
#define ATTEMPTED_SWITCH_FROM_DPC ((ULONG)0x000000b8)
/* MessageId : 0x000000be */
/* Approximate msg: An attempt was made to write to read-only memory. */
#define ATTEMPTED_WRITE_TO_READONLY_MEMORY ((ULONG)0x000000be)
/* MessageId : 0x000000c1 */
/* Approximate msg: SPECIAL_POOL_DETECTED_MEMORY_CORRUPTION */
#define SPECIAL_POOL_DETECTED_MEMORY_CORRUPTION ((ULONG)0x000000c1)
/* MessageId : 0x000000c2 */
/* Approximate msg: BAD_POOL_CALLER */
#define BAD_POOL_CALLER ((ULONG)0x000000c2)
/* MessageId : 0x000000c3 */
/* Approximate msg: A system file that is owned by ReactOS was replaced by an application */
#define BUGCODE_PSS_MESSAGE_SIGNATURE ((ULONG)0x000000c3)
/* MessageId : 0x000000c5 */
/* Approximate msg: A device driver has pool. */
#define DRIVER_CORRUPTED_EXPOOL ((ULONG)0x000000c5)
/* MessageId : 0x000000c6 */
/* Approximate msg: A device driver attempting to corrupt the system has been caught. */
#define DRIVER_CAUGHT_MODIFYING_FREED_POOL ((ULONG)0x000000c6)
/* MessageId : 0x000000c8 */
/* Approximate msg: The processor's IRQL is not valid for the currently executing context. */
#define IRQL_UNEXPECTED_VALUE ((ULONG)0x000000c8)
/* MessageId : 0x000000ca */
/* Approximate msg: Plug and Play detected an error most likely caused by a faulty driver. */
#define PNP_DETECTED_FATAL_ERROR ((ULONG)0x000000ca)
/* MessageId : 0x000000cb */
/* Approximate msg: DRIVER_LEFT_LOCKED_PAGES_IN_PROCESS */
#define DRIVER_LEFT_LOCKED_PAGES_IN_PROCESS ((ULONG)0x000000cb)
/* MessageId : 0x000000ce */
/* Approximate msg: DRIVER_UNLOADED_WITHOUT_CANCELLING_PENDING_OPERATIONS */
#define DRIVER_UNLOADED_WITHOUT_CANCELLING_PENDING_OPERATIONS ((ULONG)0x000000ce)
/* MessageId : 0x000000d0 */
/* Approximate msg: DRIVER_CORRUPTED_MMPOOL */
#define DRIVER_CORRUPTED_MMPOOL ((ULONG)0x000000d0)
/* MessageId : 0x000000d1 */
/* Approximate msg: DRIVER_IRQL_NOT_LESS_OR_EQUAL */
#define DRIVER_IRQL_NOT_LESS_OR_EQUAL ((ULONG)0x000000d1)
/* MessageId : 0x000000d3 */
/* Approximate msg: The driver mistakenly marked a part of it's image pageable instead of non-pageable. */
#define DRIVER_PORTION_MUST_BE_NONPAGED ((ULONG)0x000000d3)
/* MessageId : 0x000000d8 */
/* Approximate msg: The driver has used an excessive number of system PTEs. */
#define DRIVER_USED_EXCESSIVE_PTES ((ULONG)0x000000d8)
/* MessageId : 0x000000d4 */
/* Approximate msg: The driver unloaded without cancelling pending operations. */
#define SYSTEM_SCAN_AT_RAISED_IRQL_CAUGHT_IMPROPER_DRIVER_UNLOAD ((ULONG)0x000000d4)
/* MessageId : 0x000000e0 */
/* Approximate msg: */
#define ACPI_BIOS_FATAL_ERROR ((ULONG)0x000000e0)
/* MessageId : 0x000000e1 */
/* Approximate msg: WORKER_THREAD_RETURNED_AT_BAD_IRQL */
#define WORKER_THREAD_RETURNED_AT_BAD_IRQL ((ULONG)0x000000e1)
/* MessageId : 0x000000e2 */
/* Approximate msg: MANUALLY_INITIATED_CRASH */
#define MANUALLY_INITIATED_CRASH ((ULONG)0x000000e2)
/* MessageId : 0x000000e3 */
/* Approximate msg: RESOURCE_NOT_OWNED */
#define RESOURCE_NOT_OWNED ((ULONG)0x000000e3)
/* MessageId : 0x000000e4 */
/* Approximate msg: If Parameter1 == 0, an executive worker item was found in memory which */
#define WORKER_INVALID ((ULONG)0x000000e4)
/* MessageId : 0x000000e5 */
/* Approximate msg: POWER_FAILURE_SIMULATE */
#define POWER_FAILURE_SIMULATE ((ULONG)0x000000e5)
/* MessageId : 0x000000e8 */
/* Approximate msg: Invalid cancel of a open file. It already has handle. */
#define INVALID_CANCEL_OF_FILE_OPEN ((ULONG)0x000000e8)
/* MessageId : 0x000000e9 */
/* Approximate msg: An executive worker thread is being terminated without having gone through the worker thread rundown code. */
#define ACTIVE_EX_WORKER_THREAD_TERMINATION ((ULONG)0x000000e9)
/* MessageId : 0x000000ea */
/* Approximate msg: */
#define THREAD_STUCK_IN_DEVICE_DRIVER ((ULONG)0x000000ea)
/* MessageId : 0x000000ef */
/* Approximate msg: The kernel attempted to ready a thread that was in an incorrect state such as terminated. */
#define CRITICAL_PROCESS_DIED ((ULONG)0x000000ef)
/* MessageId : 0x000000f4 */
/* Approximate msg: A process or thread crucial to system operation has unexpectedly exited or been terminated. */
#define CRITICAL_OBJECT_TERMINATION ((ULONG)0x000000f4)
/* MessageId : 0x000000f6 */
/* Approximate msg: The PCI driver has detected an error in a PCI device or BIOS being verified. */
#define PCI_VERIFIER_DETECTED_VIOLATION ((ULONG)0x000000f6)
/* MessageId : 0x000000f8 */
/* Approximate msg: An initialization failure occurred while attempting to boot from the RAM disk. */
#define RAMDISK_BOOT_INITIALIZATION_FAILED ((ULONG)0x000000f8)
/* MessageId : 0x000000fa */
/* Approximate msg: A worker thread is impersonating another process. The work item forgot to */
#define IMPERSONATING_WORKER_THREAD ((ULONG)0x000000fa)
/* MessageId : 0x000000fc */
/* Approximate msg: An attempt was made to execute to non-executable memory. */
#define ATTEMPTED_EXECUTE_OF_NOEXECUTE_MEMORY ((ULONG)0x000000fc)
/* EOF */
#endif
|
a4205312291f65325e04c44e605678fa1a346493
|
e65a4dbfbfb0e54e59787ba7741efee12f7687f3
|
/net/bird/files/patch-sysdep_unix_krt.h
|
a877ca5bf974bd43884f78b85024ff764c313e8d
|
[
"BSD-2-Clause"
] |
permissive
|
freebsd/freebsd-ports
|
86f2e89d43913412c4f6b2be3e255bc0945eac12
|
605a2983f245ac63f5420e023e7dce56898ad801
|
refs/heads/main
| 2023-08-30T21:46:28.720924
| 2023-08-30T19:33:44
| 2023-08-30T19:33:44
| 1,803,961
| 916
| 918
|
NOASSERTION
| 2023-09-08T04:06:26
| 2011-05-26T11:15:35
| null |
UTF-8
|
C
| false
| false
| 281
|
h
|
patch-sysdep_unix_krt.h
|
--- sysdep/unix/krt.h.orig 2020-08-20 21:22:44 UTC
+++ sysdep/unix/krt.h
@@ -112,7 +112,7 @@ struct kif_proto {
struct kif_state sys; /* Sysdep state */
};
-struct kif_proto *kif_proto;
+extern struct kif_proto *kif_proto;
#define KIF_CF ((struct kif_config *)p->p.cf)
|
190d3f9bc32d3630273b6b03450d139af154b70a
|
aa3befea459382dc5c01c925653d54f435b3fb0f
|
/boards/xtensa/esp32s2/esp32s2-kaluga-1/src/esp32s2_buttons.c
|
bd0b5032d82a6119bd25e7c61b0392e4c72a0258
|
[
"MIT-open-group",
"BSD-3-Clause",
"HPND-sell-variant",
"BSD-4-Clause-UC",
"LicenseRef-scancode-warranty-disclaimer",
"MIT-0",
"LicenseRef-scancode-bsd-atmel",
"LicenseRef-scancode-gary-s-brown",
"LicenseRef-scancode-proprietary-license",
"SunPro",
"MIT",
"LicenseRef-scancode-public-domain-disclaimer",
"LicenseRef-scancode-other-permissive",
"HPND",
"ISC",
"Apache-2.0",
"LicenseRef-scancode-public-domain",
"BSD-2-Clause",
"GPL-1.0-or-later",
"CC-BY-2.0",
"CC-BY-4.0"
] |
permissive
|
apache/nuttx
|
14519a7bff4a87935d94fb8fb2b19edb501c7cec
|
606b6d9310fb25c7d92c6f95bf61737e3c79fa0f
|
refs/heads/master
| 2023-08-25T06:55:45.822534
| 2023-08-23T16:03:31
| 2023-08-24T21:25:47
| 228,103,273
| 407
| 241
|
Apache-2.0
| 2023-09-14T18:26:05
| 2019-12-14T23:27:55
|
C
|
UTF-8
|
C
| false
| false
| 9,867
|
c
|
esp32s2_buttons.c
|
/****************************************************************************
* boards/xtensa/esp32s2/esp32s2-kaluga-1/src/esp32s2_buttons.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <assert.h>
#include <debug.h>
#include <errno.h>
#include <stdbool.h>
#include <stdio.h>
#include <nuttx/arch.h>
#include <arch/board/board.h>
#include <nuttx/board.h>
#include <nuttx/irq.h>
#include <nuttx/signal.h>
#include <arch/irq.h>
#include "esp32s2_gpio.h"
#include "esp32s2_rtc_gpio.h"
#include "esp32s2_touch.h"
#include "esp32s2-kaluga-1.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifndef ARRAY_SIZE
# define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
#endif
#define TOUCHPAD_REFH (TOUCH_HVOLT_2V7)
#define TOUCHPAD_REFL (TOUCH_LVOLT_0V5)
#define TOUCHPAD_ATTEN (TOUCH_HVOLT_ATTEN_1V)
#define TOUCHPAD_SLOPE (TOUCH_SLOPE_7)
#define TOUCHPAD_TIE_OPT (TOUCH_TIE_OPT_LOW)
#define TOUCHPAD_FSM_MODE (TOUCH_FSM_MODE_TIMER)
#define TOUCHPAD_DENOISE_GRADE (TOUCH_DENOISE_BIT4)
#define TOUCHPAD_DENOISE_CAP (TOUCH_DENOISE_CAP_L4)
#define TOUCHPAD_FILTER_MODE (TOUCH_FILTER_IIR_16)
#define TOUCHPAD_FILTER_DEBOUNCE (1)
#define TOUCHPAD_FILTER_NOISE (0)
#define TOUCHPAD_FILTER_JITTER (4)
#define TOUCHPAD_FILTER_SMH (TOUCH_SMOOTH_IIR_2)
#define TOUCHPAD_THRESHOLD (30000)
/****************************************************************************
* Private Types
****************************************************************************/
struct button_type_s
{
bool is_touchpad;
union
{
int channel;
int gpio;
} input;
};
/****************************************************************************
* Private Data
****************************************************************************/
#ifdef CONFIG_ESP32S2_TOUCH
static const struct touch_config_s tp_config =
{
.refh = TOUCHPAD_REFH,
.refl = TOUCHPAD_REFL,
.atten = TOUCHPAD_ATTEN,
.slope = TOUCHPAD_SLOPE,
.tie_opt = TOUCHPAD_TIE_OPT,
.fsm_mode = TOUCHPAD_FSM_MODE,
# ifdef CONFIG_ESP32S2_TOUCH_FILTER
.filter_mode = TOUCHPAD_FILTER_MODE,
.filter_debounce_cnt = TOUCHPAD_FILTER_DEBOUNCE,
.filter_noise_thr = TOUCHPAD_FILTER_NOISE,
.filter_jitter_step = TOUCHPAD_FILTER_JITTER,
.filter_smh_lvl = TOUCHPAD_FILTER_SMH,
# endif
# ifdef CONFIG_ESP32S2_TOUCH_DENOISE
.denoise_grade = TOUCHPAD_DENOISE_GRADE,
.denoise_cap_level = TOUCHPAD_DENOISE_CAP
# endif
};
#endif
static const struct button_type_s g_buttons[] =
{
{
.is_touchpad = false,
.input.gpio = BUTTON_BOOT
},
#ifdef CONFIG_ESP32S2_TOUCH
{
.is_touchpad = true,
.input.channel = TP_PHOTO_CHANNEL
},
{
.is_touchpad = true,
.input.channel = TP_PLAY_CHANNEL
},
{
.is_touchpad = true,
.input.channel = TP_RECORD_CHANNEL
},
{
.is_touchpad = true,
.input.channel = TP_NETWORK_CHANNEL
},
{
.is_touchpad = true,
.input.channel = TP_VOLUP_CHANNEL
},
{
.is_touchpad = true,
.input.channel = TP_VOLDN_CHANNEL
}
#endif
};
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_button_initialize
*
* Description:
* board_button_initialize() must be called to initialize button resources.
* After that, board_buttons() may be called to collect the current state
* of all buttons or board_button_irq() may be called to register button
* interrupt handlers.
*
****************************************************************************/
uint32_t board_button_initialize(void)
{
#ifdef CONFIG_ESP32S2_TOUCH
esp32s2_configtouch(TP_PHOTO_CHANNEL, tp_config);
esp32s2_configtouch(TP_PLAY_CHANNEL, tp_config);
esp32s2_configtouch(TP_RECORD_CHANNEL, tp_config);
esp32s2_configtouch(TP_NETWORK_CHANNEL, tp_config);
esp32s2_configtouch(TP_VOLUP_CHANNEL, tp_config);
esp32s2_configtouch(TP_VOLDN_CHANNEL, tp_config);
esp32s2_touchsetthreshold(TP_PHOTO_CHANNEL, TOUCHPAD_THRESHOLD);
esp32s2_touchsetthreshold(TP_PLAY_CHANNEL, TOUCHPAD_THRESHOLD);
esp32s2_touchsetthreshold(TP_RECORD_CHANNEL, TOUCHPAD_THRESHOLD);
esp32s2_touchsetthreshold(TP_NETWORK_CHANNEL, TOUCHPAD_THRESHOLD);
esp32s2_touchsetthreshold(TP_VOLUP_CHANNEL, TOUCHPAD_THRESHOLD);
esp32s2_touchsetthreshold(TP_VOLDN_CHANNEL, TOUCHPAD_THRESHOLD);
#endif
esp32s2_configgpio(BUTTON_BOOT, INPUT_FUNCTION_3 | PULLUP);
return NUM_BUTTONS;
}
/****************************************************************************
* Name: board_buttons
*
* Description:
* After board_button_initialize() has been called, board_buttons() may be
* called to collect the state of all buttons. board_buttons() returns an
* 8-bit bit set with each bit associated with a button. See the
* BUTTON_*_BIT definitions in board.h for the meaning of each bit.
*
****************************************************************************/
uint32_t board_buttons(void)
{
uint8_t ret = 0;
bool b0;
bool b1;
int n;
for (uint8_t btn_id = 0; btn_id < ARRAY_SIZE(g_buttons); btn_id++)
{
iinfo("Reading button %d\n", btn_id);
const struct button_type_s button_info = g_buttons[btn_id];
n = 0;
if (button_info.is_touchpad)
{
b0 = esp32s2_touchread(button_info.input.channel);
}
else
{
b0 = esp32s2_gpioread(button_info.input.gpio);
for (int i = 0; i < 10; i++)
{
up_mdelay(1);
b1 = esp32s2_gpioread(button_info.input.gpio);
if (b0 == b1)
{
n++;
}
else
{
n = 0;
}
if (3 == n)
{
break;
}
b0 = b1;
}
}
iinfo("b=%d n=%d\n", b0, n);
/* Low value means that the button is pressed */
if (!b0)
{
ret |= (1 << btn_id);
}
}
return ret;
}
/****************************************************************************
* Name: board_button_irq
*
* Description:
* board_button_irq() may be called to register an interrupt handler that
* will be called when a button is depressed or released. The ID value is
* a button enumeration value that uniquely identifies a button resource.
* See the BUTTON_* definitions in board.h for the meaning of enumeration
* value.
*
****************************************************************************/
#ifdef CONFIG_ARCH_IRQBUTTONS
int board_button_irq(int id, xcpt_t irqhandler, void *arg)
{
DEBUGASSERT(id < ARRAY_SIZE(g_buttons));
int ret;
struct button_type_s button_info = g_buttons[id];
#ifdef CONFIG_ESP32S2_TOUCH_IRQ
if (button_info.is_touchpad)
{
int channel = button_info.input.channel;
int irq = ESP32S2_TOUCHPAD2IRQ(channel);
if (NULL != irqhandler)
{
/* Make sure the interrupt is disabled */
esp32s2_touchirqdisable(irq);
esp32s2_touchregisterreleasecb(irqhandler);
ret = irq_attach(irq, irqhandler, arg);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: irq_attach() failed: %d\n", ret);
return ret;
}
iinfo("Attach %p to touch pad %d\n", irqhandler, channel);
iinfo("Enabling the interrupt\n");
esp32s2_touchirqenable(irq);
}
else
{
iinfo("Disabled interrupts from touch pad %d\n", channel);
esp32s2_touchirqdisable(irq);
}
return OK;
}
else
#endif
{
int pin = button_info.input.gpio;
int irq = ESP32S2_PIN2IRQ(pin);
if (NULL != irqhandler)
{
/* Make sure the interrupt is disabled */
esp32s2_gpioirqdisable(irq);
ret = irq_attach(irq, irqhandler, arg);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: irq_attach() failed: %d\n", ret);
return ret;
}
gpioinfo("Attach %p to pin %d\n", irqhandler, pin);
gpioinfo("Enabling the interrupt\n");
/* Configure the interrupt for rising and falling edges */
esp32s2_gpioirqenable(irq, GPIO_INTR_ANYEDGE);
}
else
{
gpioinfo("Disabled interrupts from pin %d\n", pin);
esp32s2_gpioirqdisable(irq);
}
return OK;
}
}
#endif
|
82da8491c68b937dc340708096058723bfbaeb55
|
44a742973d9db97b35c88d4c28f538a48a3029c8
|
/math/aarch64/v_exp2f_1u.c
|
ba6b02fbb4bcbd9c215d8326dd74f2e4bbadc18b
|
[
"LLVM-exception",
"MIT",
"Apache-2.0",
"LicenseRef-scancode-unknown-license-reference"
] |
permissive
|
ARM-software/optimized-routines
|
ac3349617ef6c7119050e1a26f33a040448a5c7b
|
4bdee55e42855a884f9da47abfe8c612b8534294
|
refs/heads/master
| 2023-08-15T11:56:21.269079
| 2023-08-14T12:34:34
| 2023-08-14T12:34:50
| 45,979,634
| 478
| 85
|
NOASSERTION
| 2023-09-12T08:13:38
| 2015-11-11T12:12:32
|
C
|
UTF-8
|
C
| false
| false
| 2,099
|
c
|
v_exp2f_1u.c
|
/*
* Single-precision vector 2^x function.
*
* Copyright (c) 2019-2023, Arm Limited.
* SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception
*/
#include "mathlib.h"
#include "v_math.h"
static const float Poly[] = {
/* maxerr: 0.878 ulp. */
0x1.416b5ep-13f, 0x1.5f082ep-10f, 0x1.3b2dep-7f, 0x1.c6af7cp-5f, 0x1.ebfbdcp-3f, 0x1.62e43p-1f
};
#define C0 v_f32 (Poly[0])
#define C1 v_f32 (Poly[1])
#define C2 v_f32 (Poly[2])
#define C3 v_f32 (Poly[3])
#define C4 v_f32 (Poly[4])
#define C5 v_f32 (Poly[5])
#define Shift v_f32 (0x1.8p23f)
#define InvLn2 v_f32 (0x1.715476p+0f)
#define Ln2hi v_f32 (0x1.62e4p-1f)
#define Ln2lo v_f32 (0x1.7f7d1cp-20f)
static float32x4_t VPCS_ATTR NOINLINE
specialcase (float32x4_t poly, float32x4_t n, uint32x4_t e, float32x4_t absn)
{
/* 2^n may overflow, break it up into s1*s2. */
uint32x4_t b = (n <= v_f32 (0.0f)) & v_u32 (0x83000000);
float32x4_t s1 = vreinterpretq_f32_u32 (v_u32 (0x7f000000) + b);
float32x4_t s2 = vreinterpretq_f32_u32 (e - b);
uint32x4_t cmp = absn > v_f32 (192.0f);
float32x4_t r1 = s1 * s1;
float32x4_t r0 = poly * s1 * s2;
return vreinterpretq_f32_u32 ((cmp & vreinterpretq_u32_f32 (r1))
| (~cmp & vreinterpretq_u32_f32 (r0)));
}
float32x4_t VPCS_ATTR
_ZGVnN4v_exp2f_1u (float32x4_t x)
{
float32x4_t n, r, scale, poly, absn;
uint32x4_t cmp, e;
/* exp2(x) = 2^n * poly(r), with poly(r) in [1/sqrt(2),sqrt(2)]
x = n + r, with r in [-1/2, 1/2]. */
#if 0
float32x4_t z;
z = x + Shift;
n = z - Shift;
r = x - n;
e = vreinterpretq_u32_f32 (z) << 23;
#else
n = vrndaq_f32 (x);
r = x - n;
e = vreinterpretq_u32_s32 (vcvtaq_s32_f32 (x)) << 23;
#endif
scale = vreinterpretq_f32_u32 (e + v_u32 (0x3f800000));
absn = vabsq_f32 (n);
cmp = absn > v_f32 (126.0f);
poly = vfmaq_f32 (C1, C0, r);
poly = vfmaq_f32 (C2, poly, r);
poly = vfmaq_f32 (C3, poly, r);
poly = vfmaq_f32 (C4, poly, r);
poly = vfmaq_f32 (C5, poly, r);
poly = vfmaq_f32 (v_f32 (1.0f), poly, r);
if (unlikely (v_any_u32 (cmp)))
return specialcase (poly, n, e, absn);
return scale * poly;
}
|
2c237f92ad82809f0b5a5a09bc90556a5cc3bf01
|
bb7a80648bf830c2fb813cdb335032142cbee06d
|
/mod/mpp/3519a/inc/hisisdk/hi_comm_venc.h
|
87215b5f9809c48848702898dc1ddf7731e301dd
|
[] |
no_license
|
openhisilicon/HIVIEW
|
44574a29da60e3bb400c7ce97c722dfc9f2959e6
|
60bbfa5cb66cc82f0cdc0bba1242dbc9491b0f37
|
refs/heads/master
| 2023-09-01T01:42:19.069724
| 2023-08-31T09:57:39
| 2023-08-31T09:57:39
| 189,036,134
| 336
| 121
| null | 2023-01-07T14:10:22
| 2019-05-28T13:41:40
|
C
|
UTF-8
|
C
| false
| false
| 46,523
|
h
|
hi_comm_venc.h
|
/******************************************************************************
Copyright (C), 2016-2017, Hisilicon Tech. Co., Ltd.
******************************************************************************
File Name : hi_comm_venc.h
Version : Initial Draft
Author : Hisilicon multimedia software group
Created : 2016/11/15
Last Modified :
Description : common struct definition for VENC
Function List :
******************************************************************************/
#ifndef __HI_COMM_VENC_H__
#define __HI_COMM_VENC_H__
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif
#endif /* __cplusplus */
#include "hi_type.h"
#include "hi_common.h"
#include "hi_errno.h"
#include "hi_comm_video.h"
#include "hi_comm_rc.h"
#include "hi_comm_vb.h"
/* invlalid channel ID */
#define HI_ERR_VENC_INVALID_CHNID HI_DEF_ERR(HI_ID_VENC, EN_ERR_LEVEL_ERROR, EN_ERR_INVALID_CHNID)
/* at lease one parameter is illagal ,eg, an illegal enumeration value */
#define HI_ERR_VENC_ILLEGAL_PARAM HI_DEF_ERR(HI_ID_VENC, EN_ERR_LEVEL_ERROR, EN_ERR_ILLEGAL_PARAM)
/* channel exists */
#define HI_ERR_VENC_EXIST HI_DEF_ERR(HI_ID_VENC, EN_ERR_LEVEL_ERROR, EN_ERR_EXIST)
/* channel exists */
#define HI_ERR_VENC_UNEXIST HI_DEF_ERR(HI_ID_VENC, EN_ERR_LEVEL_ERROR, EN_ERR_UNEXIST)
/* using a NULL point */
#define HI_ERR_VENC_NULL_PTR HI_DEF_ERR(HI_ID_VENC, EN_ERR_LEVEL_ERROR, EN_ERR_NULL_PTR)
/* try to enable or initialize system,device or channel, before configing attribute */
#define HI_ERR_VENC_NOT_CONFIG HI_DEF_ERR(HI_ID_VENC, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_CONFIG)
/* operation is not supported by NOW */
#define HI_ERR_VENC_NOT_SUPPORT HI_DEF_ERR(HI_ID_VENC, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_SUPPORT)
/* operation is not permitted ,eg, try to change stati attribute */
#define HI_ERR_VENC_NOT_PERM HI_DEF_ERR(HI_ID_VENC, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_PERM)
/* failure caused by malloc memory */
#define HI_ERR_VENC_NOMEM HI_DEF_ERR(HI_ID_VENC, EN_ERR_LEVEL_ERROR, EN_ERR_NOMEM)
/* failure caused by malloc buffer */
#define HI_ERR_VENC_NOBUF HI_DEF_ERR(HI_ID_VENC, EN_ERR_LEVEL_ERROR, EN_ERR_NOBUF)
/* no data in buffer */
#define HI_ERR_VENC_BUF_EMPTY HI_DEF_ERR(HI_ID_VENC, EN_ERR_LEVEL_ERROR, EN_ERR_BUF_EMPTY)
/* no buffer for new data */
#define HI_ERR_VENC_BUF_FULL HI_DEF_ERR(HI_ID_VENC, EN_ERR_LEVEL_ERROR, EN_ERR_BUF_FULL)
/* system is not ready,had not initialed or loaded*/
#define HI_ERR_VENC_SYS_NOTREADY HI_DEF_ERR(HI_ID_VENC, EN_ERR_LEVEL_ERROR, EN_ERR_SYS_NOTREADY)
/* system is busy*/
#define HI_ERR_VENC_BUSY HI_DEF_ERR(HI_ID_VENC, EN_ERR_LEVEL_ERROR, EN_ERR_BUSY)
/*the nalu type of H264E*/
typedef enum hiH264E_NALU_TYPE_E
{
H264E_NALU_BSLICE = 0, /*B SLICE types*/
H264E_NALU_PSLICE = 1, /*P SLICE types*/
H264E_NALU_ISLICE = 2, /*I SLICE types*/
H264E_NALU_IDRSLICE = 5, /*IDR SLICE types*/
H264E_NALU_SEI = 6, /*SEI types*/
H264E_NALU_SPS = 7, /*SPS types*/
H264E_NALU_PPS = 8, /*PPS types*/
H264E_NALU_BUTT
} H264E_NALU_TYPE_E;
/*the nalu type of H265E*/
typedef enum hiH265E_NALU_TYPE_E
{
H265E_NALU_BSLICE = 0, /*B SLICE types*/
H265E_NALU_PSLICE = 1, /*P SLICE types*/
H265E_NALU_ISLICE = 2, /*I SLICE types*/
H265E_NALU_IDRSLICE = 19, /*IDR SLICE types*/
H265E_NALU_VPS = 32, /*VPS types*/
H265E_NALU_SPS = 33, /*SPS types*/
H265E_NALU_PPS = 34, /*PPS types*/
H265E_NALU_SEI = 39, /*SEI types*/
H265E_NALU_BUTT
} H265E_NALU_TYPE_E;
/*the reference type of H264E slice*/
typedef enum hiH264E_REFSLICE_TYPE_E
{
H264E_REFSLICE_FOR_1X = 1, /*Reference slice for H264E_REF_MODE_1X*/
H264E_REFSLICE_FOR_2X = 2, /*Reference slice for H264E_REF_MODE_2X*/
H264E_REFSLICE_FOR_4X = 5, /*Reference slice for H264E_REF_MODE_4X*/
H264E_REFSLICE_FOR_BUTT /* slice not for reference*/
} H264E_REFSLICE_TYPE_E;
/*the pack type of JPEGE*/
typedef enum hiJPEGE_PACK_TYPE_E
{
JPEGE_PACK_ECS = 5, /*ECS types*/
JPEGE_PACK_APP = 6, /*APP types*/
JPEGE_PACK_VDO = 7, /*VDO types*/
JPEGE_PACK_PIC = 8, /*PIC types*/
JPEGE_PACK_DCF = 9, /*DCF types*/
JPEGE_PACK_DCF_PIC = 10, /*DCF PIC types*/
JPEGE_PACK_BUTT
} JPEGE_PACK_TYPE_E;
/*the pack type of PRORES*/
typedef enum hiPRORES_PACK_TYPE_E
{
PRORES_PACK_PIC = 1, /*PIC types*/
PRORES_PACK_BUTT
} PRORES_PACK_TYPE_E;
/*the data type of VENC*/
typedef union hiVENC_DATA_TYPE_U
{
H264E_NALU_TYPE_E enH264EType; /* R; H264E NALU types*/
JPEGE_PACK_TYPE_E enJPEGEType; /* R; JPEGE pack types*/
H265E_NALU_TYPE_E enH265EType; /* R; H264E NALU types*/
PRORES_PACK_TYPE_E enPRORESType;
} VENC_DATA_TYPE_U;
/*the pack info of VENC*/
typedef struct hiVENC_PACK_INFO_S
{
VENC_DATA_TYPE_U u32PackType; /* R; the pack type*/
HI_U32 u32PackOffset;
HI_U32 u32PackLength;
} VENC_PACK_INFO_S;
/*Defines a stream packet*/
typedef struct hiVENC_PACK_S
{
HI_U64 u64PhyAddr; /* R; the physics address of stream */
HI_U8 ATTRIBUTE* pu8Addr; /* R; the virtual address of stream */
HI_U32 ATTRIBUTE u32Len; /* R; the length of stream */
HI_U64 u64PTS; /* R; PTS */
HI_BOOL bFrameEnd; /* R; frame end */
VENC_DATA_TYPE_U DataType; /* R; the type of stream */
HI_U32 u32Offset; /* R; the offset between the Valid data and the start address */
HI_U32 u32DataNum; /* R; the stream packets num */
VENC_PACK_INFO_S stPackInfo[8]; /* R; the stream packet Information */
} VENC_PACK_S;
/*Defines the frame type and reference attributes of the H.264 frame skipping reference streams*/
typedef enum hiH264E_REF_TYPE_E
{
BASE_IDRSLICE = 0, /* the Idr frame at Base layer*/
BASE_PSLICE_REFTOIDR, /* the P frame at Base layer, referenced by other frames at Base layer and reference to Idr frame*/
BASE_PSLICE_REFBYBASE, /* the P frame at Base layer, referenced by other frames at Base layer*/
BASE_PSLICE_REFBYENHANCE, /* the P frame at Base layer, referenced by other frames at Enhance layer*/
ENHANCE_PSLICE_REFBYENHANCE, /* the P frame at Enhance layer, referenced by other frames at Enhance layer*/
ENHANCE_PSLICE_NOTFORREF, /* the P frame at Enhance layer ,not referenced*/
ENHANCE_PSLICE_BUTT
} H264E_REF_TYPE_E;
typedef enum hiH264E_REF_TYPE_E H265E_REF_TYPE_E;
/*Defines the features of an H.264 stream*/
typedef struct hiVENC_STREAM_INFO_H264_S
{
HI_U32 u32PicBytesNum; /* R; the coded picture stream byte number */
HI_U32 u32Inter16x16MbNum; /* R; the inter16x16 macroblock num */
HI_U32 u32Inter8x8MbNum; /* R; the inter8x8 macroblock num */
HI_U32 u32Intra16MbNum; /* R; the intra16x16 macroblock num */
HI_U32 u32Intra8MbNum; /* R; the intra8x8 macroblock num */
HI_U32 u32Intra4MbNum; /* R; the inter4x4 macroblock num */
H264E_REF_TYPE_E enRefType; /* R; Type of encoded frames in advanced frame skipping reference mode*/
HI_U32 u32UpdateAttrCnt; /* R; Number of times that channel attributes or parameters (including RC parameters) are set*/
HI_U32 u32StartQp; /* R; the start Qp of encoded frames*/
HI_U32 u32MeanQp; /* R; the mean Qp of encoded frames*/
HI_BOOL bPSkip;
} VENC_STREAM_INFO_H264_S;
/*Defines the features of an H.265 stream*/
typedef struct hiVENC_STREAM_INFO_H265_S
{
HI_U32 u32PicBytesNum; /* R; the coded picture stream byte number */
HI_U32 u32Inter64x64CuNum; /* R; the inter64x64 cu num */
HI_U32 u32Inter32x32CuNum; /* R; the inter32x32 cu num */
HI_U32 u32Inter16x16CuNum; /* R; the inter16x16 cu num */
HI_U32 u32Inter8x8CuNum; /* R; the inter8x8 cu num */
HI_U32 u32Intra32x32CuNum; /* R; the Intra32x32 cu num */
HI_U32 u32Intra16x16CuNum; /* R; the Intra16x16 cu num */
HI_U32 u32Intra8x8CuNum; /* R; the Intra8x8 cu num */
HI_U32 u32Intra4x4CuNum; /* R; the Intra4x4 cu num */
H265E_REF_TYPE_E enRefType; /* R; Type of encoded frames in advanced frame skipping reference mode*/
HI_U32 u32UpdateAttrCnt; /* R; Number of times that channel attributes or parameters (including RC parameters) are set*/
HI_U32 u32StartQp; /* R; the start Qp of encoded frames*/
HI_U32 u32MeanQp; /* R; the mean Qp of encoded frames*/
HI_BOOL bPSkip;
} VENC_STREAM_INFO_H265_S;
/* the sse info*/
typedef struct hiVENC_SSE_INFO_S
{
HI_BOOL bSSEEn; /* RW; Range:[0,1]; Region SSE enable */
HI_U32 u32SSEVal; /* R; Region SSE value */
} VENC_SSE_INFO_S;
/* the advance information of the h264e */
typedef struct hiVENC_STREAM_ADVANCE_INFO_H264_S
{
HI_U32 u32ResidualBitNum; /* R; the residual num */
HI_U32 u32HeadBitNum; /* R; the head bit num */
HI_U32 u32MadiVal; /* R; the madi value */
HI_U32 u32MadpVal; /* R; the madp value */
HI_DOUBLE dPSNRVal; /* R; the PSNR value */
HI_U32 u32MseLcuCnt; /* R; the lcu cnt of the mse */
HI_U32 u32MseSum; /* R; the sum of the mse */
VENC_SSE_INFO_S stSSEInfo[8]; /* R; the information of the sse */
HI_U32 u32QpHstgrm[52]; /* R; the Qp histogram value */
HI_U32 u32MoveScene16x16Num; /* R; the 16x16 cu num of the move scene*/
HI_U32 u32MoveSceneBits; /* R; the stream bit num of the move scene */
} VENC_STREAM_ADVANCE_INFO_H264_S;
/* the advance information of the Jpege */
typedef struct hiVENC_STREAM_ADVANCE_INFO_JPEG_S
{
// HI_U32 u32Reserved;
} VENC_STREAM_ADVANCE_INFO_JPEG_S;
/* the advance information of the Prores */
typedef struct hiVENC_STREAM_ADVANCE_INFO_PRORES_S
{
// HI_U32 u32Reserved;
} VENC_STREAM_ADVANCE_INFO_PRORES_S;
/* the advance information of the h265e */
typedef struct hiVENC_STREAM_ADVANCE_INFO_H265_S
{
HI_U32 u32ResidualBitNum; /* R; the residual num */
HI_U32 u32HeadBitNum; /* R; the head bit num */
HI_U32 u32MadiVal; /* R; the madi value */
HI_U32 u32MadpVal; /* R; the madp value */
HI_DOUBLE dPSNRVal; /* R; the PSNR value */
HI_U32 u32MseLcuCnt; /* R; the lcu cnt of the mse */
HI_U32 u32MseSum; /* R; the sum of the mse */
VENC_SSE_INFO_S stSSEInfo[8]; /* R; the information of the sse */
HI_U32 u32QpHstgrm[52]; /* R; the Qp histogram value */
HI_U32 u32MoveScene32x32Num; /* R; the 32x32 cu num of the move scene*/
HI_U32 u32MoveSceneBits; /* R; the stream bit num of the move scene */
} VENC_STREAM_ADVANCE_INFO_H265_S;
/*Defines the features of an jpege stream*/
typedef struct hiVENC_STREAM_INFO_PRORES_S
{
HI_U32 u32PicBytesNum;
HI_U32 u32UpdateAttrCnt;
} VENC_STREAM_INFO_PRORES_S;
/*Defines the features of an jpege stream*/
typedef struct hiVENC_STREAM_INFO_JPEG_S
{
HI_U32 u32PicBytesNum; /* R; the coded picture stream byte number */
HI_U32 u32UpdateAttrCnt; /* R; Number of times that channel attributes or parameters (including RC parameters) are set*/
HI_U32 u32Qfactor; /* R; image quality */
} VENC_STREAM_INFO_JPEG_S;
/*Defines the features of an stream*/
typedef struct hiVENC_STREAM_S
{
VENC_PACK_S ATTRIBUTE* pstPack; /* R; stream pack attribute*/
HI_U32 ATTRIBUTE u32PackCount; /* R; the pack number of one frame stream*/
HI_U32 u32Seq; /* R; the list number of stream*/
union
{
VENC_STREAM_INFO_H264_S stH264Info; /* R; the stream info of h264*/
VENC_STREAM_INFO_JPEG_S stJpegInfo; /* R; the stream info of jpeg*/
VENC_STREAM_INFO_H265_S stH265Info; /* R; the stream info of h265*/
VENC_STREAM_INFO_PRORES_S stProresInfo; /* R; the stream info of prores*/
};
union
{
VENC_STREAM_ADVANCE_INFO_H264_S stAdvanceH264Info; /* R; the stream info of h264*/
VENC_STREAM_ADVANCE_INFO_JPEG_S stAdvanceJpegInfo; /* R; the stream info of jpeg*/
VENC_STREAM_ADVANCE_INFO_H265_S stAdvanceH265Info; /* R; the stream info of h265*/
VENC_STREAM_ADVANCE_INFO_PRORES_S stAdvanceProresInfo; /* R; the stream info of prores*/
};
} VENC_STREAM_S;
typedef struct hiVENC_STREAM_INFO_S
{
H265E_REF_TYPE_E enRefType; /*Type of encoded frames in advanced frame skipping reference mode*/
HI_U32 u32PicBytesNum; /* the coded picture stream byte number */
HI_U32 u32PicCnt; /*Number of times that channel attributes or parameters (including RC parameters) are set*/
HI_U32 u32StartQp; /*the start Qp of encoded frames*/
HI_U32 u32MeanQp; /*the mean Qp of encoded frames*/
HI_BOOL bPSkip;
HI_U32 u32ResidualBitNum; //residual
HI_U32 u32HeadBitNum; //head information
HI_U32 u32MadiVal; //madi
HI_U32 u32MadpVal; //madp
HI_U32 u32MseSum; /* Sum of MSE value */
HI_U32 u32MseLcuCnt; /* Sum of LCU number */
HI_DOUBLE dPSNRVal; //PSNR
} VENC_STREAM_INFO_S;
/*the size of array is 2,that is the maximum*/
typedef struct hiVENC_MPF_CFG_S
{
HI_U8 u8LargeThumbNailNum; /* RW; Range:[0,2]; the large thumbnail pic num of the MPF */
SIZE_S astLargeThumbNailSize[2]; /* RW; The resolution of large ThumbNail*/
} VENC_MPF_CFG_S;
typedef enum hiVENC_PIC_RECEIVE_MODE_E
{
VENC_PIC_RECEIVE_SINGLE = 0,
VENC_PIC_RECEIVE_MULTI,
VENC_PIC_RECEIVE_BUTT
}VENC_PIC_RECEIVE_MODE_E;
/*the attribute of jpege*/
typedef struct hiVENC_ATTR_JPEG_S
{
HI_BOOL bSupportDCF; /*RW; Range:[0,1]; support dcf */
VENC_MPF_CFG_S stMPFCfg; /*RW; Range:[0,1]; config of Mpf*/
VENC_PIC_RECEIVE_MODE_E enReceiveMode; /*RW; */
} VENC_ATTR_JPEG_S;
/*the attribute of mjpege*/
typedef struct hiVENC_ATTR_MJPEG_S
{
//reserved
} VENC_ATTR_MJPEG_S;
/*the attribute of h264e*/
typedef struct hiVENC_ATTR_H264_S
{
HI_BOOL bRcnRefShareBuf; /* RW; Range:[0, 1]; Whether to enable the Share Buf of Rcn and Ref .*/
//reserved
} VENC_ATTR_H264_S;
/*the attribute of h265e*/
typedef struct hiVENC_ATTR_H265_S
{
HI_BOOL bRcnRefShareBuf; /* RW; Range:[0, 1]; Whether to enable the Share Buf of Rcn and Ref .*/
//reserved
} VENC_ATTR_H265_S;
/*the frame rate of PRORES*/
typedef enum hiPRORES_FRAMERATE
{
PRORES_FR_UNKNOWN = 0,
PRORES_FR_23_976,
PRORES_FR_24,
PRORES_FR_25,
PRORES_FR_29_97,
PRORES_FR_30,
PRORES_FR_50,
PRORES_FR_59_94,
PRORES_FR_60,
PRORES_FR_100,
PRORES_FR_119_88,
PRORES_FR_120,
PRORES_FR_BUTT
}PRORES_FRAMERATE;
/*the aspect ratio of PRORES*/
typedef enum hiPRORES_ASPECT_RATIO
{
PRORES_ASPECT_RATIO_UNKNOWN = 0,
PRORES_ASPECT_RATIO_SQUARE,
PRORES_ASPECT_RATIO_4_3,
PRORES_ASPECT_RATIO_16_9,
PRORES_ASPECT_RATIO_BUTT
}PRORES_ASPECT_RATIO;
/*the attribute of PRORES*/
typedef struct hiVENC_ATTR_PRORES_S
{
HI_CHAR cIdentifier[4];
PRORES_FRAMERATE enFrameRateCode;
PRORES_ASPECT_RATIO enAspectRatio;
} VENC_ATTR_PRORES_S;
/* the attribute of the Venc*/
typedef struct hiVENC_ATTR_S
{
PAYLOAD_TYPE_E enType; /* RW; the type of payload*/
HI_U32 u32MaxPicWidth; /* RW; maximum width of a picture to be encoded, in pixel*/
HI_U32 u32MaxPicHeight; /* RW; maximum height of a picture to be encoded, in pixel*/
HI_U32 u32BufSize; /* RW; stream buffer size*/
HI_U32 u32Profile; /* RW; H.264: 0: baseline; 1:MP; 2:HP; 3: SVC-T [0,3];
H.265: 0:MP; 1:Main 10 [0 1];
Jpege/MJpege: 0:Baseline
prores: 0:ProRes Proxy; 1:ProRes 422(LT); 2:ProRes 422; 3:ProRes 422(HQ);*/
HI_BOOL bByFrame; /* RW; Range:[0,1]; get stream mode is slice mode or frame mode*/
HI_U32 u32PicWidth; /* RW; width of a picture to be encoded, in pixel*/
HI_U32 u32PicHeight; /* RW; height of a picture to be encoded, in pixel*/
union
{
VENC_ATTR_H264_S stAttrH264e; /* attributes of H264e */
VENC_ATTR_H265_S stAttrH265e; /* attributes of H265e */
VENC_ATTR_MJPEG_S stAttrMjpege; /* attributes of Mjpeg */
VENC_ATTR_JPEG_S stAttrJpege; /* attributes of jpeg */
VENC_ATTR_PRORES_S stAttrProres; /* attributes of prores */
};
} VENC_ATTR_S;
/* the gop mode */
typedef enum hiVENC_GOP_MODE_E
{
VENC_GOPMODE_NORMALP = 0, /* NORMALP */
VENC_GOPMODE_DUALP = 1, /* DUALP */
VENC_GOPMODE_SMARTP = 2, /* SMARTP */
VENC_GOPMODE_ADVSMARTP = 3, /* ADVSMARTP */
VENC_GOPMODE_BIPREDB = 4, /* BIPREDB */
VENC_GOPMODE_LOWDELAYB = 5, /* LOWDELAYB */
VENC_GOPMODE_BUTT,
} VENC_GOP_MODE_E;
/* the attribute of the normalp*/
typedef struct hiVENC_GOP_NORMALP_S
{
HI_S32 s32IPQpDelta; /* RW; Range:[-10,30]; QP variance between P frame and I frame */
} VENC_GOP_NORMALP_S;
/* the attribute of the dualp*/
typedef struct hiVENC_GOP_DUALP_S
{
HI_U32 u32SPInterval; /* RW; Range:[0, 1)U(1, u32Gop -1]; Interval of the special P frames */
HI_S32 s32SPQpDelta; /* RW; Range:[-10,30]; QP variance between P frame and special P frame */
HI_S32 s32IPQpDelta; /* RW; Range:[-10,30]; QP variance between P frame and I frame */
} VENC_GOP_DUALP_S;
/* the attribute of the smartp*/
typedef struct hiVENC_GOP_SMARTP_S
{
HI_U32 u32BgInterval; /* RW; Range:[u32Gop,4294967295] ;Interval of the long-term reference frame*/
HI_S32 s32BgQpDelta; /* RW; Range:[-10,30]; QP variance between P frame and Bg frame */
HI_S32 s32ViQpDelta; /* RW; Range:[-10,30]; QP variance between P frame and virtual I frame */
} VENC_GOP_SMARTP_S;
/* the attribute of the advsmartp*/
typedef struct hiVENC_GOP_ADVSMARTP_S
{
HI_U32 u32BgInterval; /* RW; Range:[u32Gop,4294967295] ;Interval of the long-term reference frame*/
HI_S32 s32BgQpDelta; /* RW; Range:[-10,30]; QP variance between P frame and Bg frame */
HI_S32 s32ViQpDelta; /* RW; Range:[-10,30]; QP variance between P frame and virtual I frame */
} VENC_GOP_ADVSMARTP_S;
/* the attribute of the bipredb*/
typedef struct hiVENC_GOP_BIPREDB_S
{
HI_U32 u32BFrmNum; /* RW; Range:[1,3]; Number of B frames */
HI_S32 s32BQpDelta; /* RW; Range:[-10,30]; QP variance between P frame and B frame */
HI_S32 s32IPQpDelta; /* RW; Range:[-10,30]; QP variance between P frame and I frame */
} VENC_GOP_BIPREDB_S;
/* the attribute of the gop*/
typedef struct hiVENC_GOP_ATTR_S
{
VENC_GOP_MODE_E enGopMode; /* RW; Encoding GOP type */
union
{
VENC_GOP_NORMALP_S stNormalP; /*attributes of normal P*/
VENC_GOP_DUALP_S stDualP; /*attributes of dual P*/
VENC_GOP_SMARTP_S stSmartP; /*attributes of Smart P*/
VENC_GOP_ADVSMARTP_S stAdvSmartP; /*attributes of AdvSmart P*/
VENC_GOP_BIPREDB_S stBipredB; /*attributes of b */
};
} VENC_GOP_ATTR_S;
/* the attribute of the venc chnl*/
typedef struct hiVENC_CHN_ATTR_S
{
VENC_ATTR_S stVencAttr; /*the attribute of video encoder*/
VENC_RC_ATTR_S stRcAttr; /*the attribute of rate ctrl*/
VENC_GOP_ATTR_S stGopAttr; /*the attribute of gop*/
} VENC_CHN_ATTR_S;
/* the param of receive picture */
typedef struct hiVENC_RECV_PIC_PARAM_S
{
HI_S32 s32RecvPicNum; /* RW; Range:[-1,0)U(0 2147483647]; Number of frames received and encoded by the encoding channel*/
} VENC_RECV_PIC_PARAM_S;
/* the status of the venc chnl*/
typedef struct hiVENC_CHN_STATUS_S
{
HI_U32 u32LeftPics; /* R; left picture number */
HI_U32 u32LeftStreamBytes; /* R; left stream bytes*/
HI_U32 u32LeftStreamFrames; /* R; left stream frames*/
HI_U32 u32CurPacks; /* R; pack number of current frame*/
HI_U32 u32LeftRecvPics; /* R; Number of frames to be received. This member is valid after HI_MPI_VENC_StartRecvPicEx is called.*/
HI_U32 u32LeftEncPics; /* R; Number of frames to be encoded. This member is valid after HI_MPI_VENC_StartRecvPicEx is called.*/
HI_BOOL bJpegSnapEnd; /* R; the end of Snap.*/
VENC_STREAM_INFO_S stVencStrmInfo;
} VENC_CHN_STATUS_S;
/* the param of the h264e slice split*/
typedef struct hiVENC_H264_SLICE_SPLIT_S
{
HI_BOOL bSplitEnable; /* RW; Range:[0,1]; slice split enable, HI_TRUE:enable, HI_FALSE:diable, default value:HI_FALSE*/
HI_U32 u32MbLineNum; /* RW; Range:[1,(Picture height + 15)/16]; this value presents the mb line number of one slice*/
} VENC_H264_SLICE_SPLIT_S;
/* the param of the h264e intra pred*/
typedef struct hiVENC_H264_INTRA_PRED_S
{
HI_U32 constrained_intra_pred_flag; /* RW; Range:[0,1];default: HI_FALSE, see the H.264 protocol for the meaning*/
} VENC_H264_INTRA_PRED_S;
/* the param of the h264e trans*/
typedef struct hiVENC_H264_TRANS_S
{
HI_U32 u32IntraTransMode; /* RW; Range:[0,2]; Conversion mode for intra-prediction,0: trans4x4, trans8x8; 1: trans4x4, 2: trans8x8 */
HI_U32 u32InterTransMode; /* RW; Range:[0,2]; Conversion mode for inter-prediction,0: trans4x4, trans8x8; 1: trans4x4, 2: trans8x8 */
HI_BOOL bScalingListValid; /* RW; Range:[0,1]; enable Scaling,default: HI_FALSE */
HI_U8 InterScalingList8X8[64]; /* RW; Range:[1,255]; A quantization table for 8x8 inter-prediction*/
HI_U8 IntraScalingList8X8[64]; /* RW; Range:[1,255]; A quantization table for 8x8 intra-prediction*/
HI_S32 chroma_qp_index_offset; /* RW; Range:[-12,12];default value: 0, see the H.264 protocol for the meaning*/
} VENC_H264_TRANS_S;
/* the param of the h264e entropy*/
typedef struct hiVENC_H264_ENTROPY_S
{
HI_U32 u32EntropyEncModeI; /* RW; Range:[0,1]; Entropy encoding mode for the I frame, 0:cavlc, 1:cabac */
HI_U32 u32EntropyEncModeP; /* RW; Range:[0,1]; Entropy encoding mode for the P frame, 0:cavlc, 1:cabac */
HI_U32 u32EntropyEncModeB; /* RW; Range:[0,1]; Entropy encoding mode for the B frame, 0:cavlc, 1:cabac */
HI_U32 cabac_init_idc; /* RW; Range:[0,2]; see the H.264 protocol for the meaning */
} VENC_H264_ENTROPY_S;
/* the config of the h264e poc*/
typedef struct hiVENC_H264_POC_S
{
HI_U32 pic_order_cnt_type; /* RW; Range:[0,2]; see the H.264 protocol for the meaning */
} VENC_H264_POC_S;
/* the param of the h264e deblocking*/
typedef struct hiVENC_H264_DBLK_S
{
HI_U32 disable_deblocking_filter_idc; /* RW; Range:[0,2]; see the H.264 protocol for the meaning */
HI_S32 slice_alpha_c0_offset_div2; /* RW; Range:[-6,+6]; see the H.264 protocol for the meaning */
HI_S32 slice_beta_offset_div2; /* RW; Range:[-6,+6]; see the H.264 protocol for the meaning */
} VENC_H264_DBLK_S;
/* the param of the h264e vui timing info*/
typedef struct hiVENC_H264_VUI_TIME_INFO_S
{
HI_U8 timing_info_present_flag; /* RW; Range:[0,1]; If 1, timing info belows will be encoded into vui.*/
HI_U8 fixed_frame_rate_flag; /* RW; Range:[0,1]; see the H.264 protocol for the meaning. */
HI_U32 num_units_in_tick; /* RW; Range:(0,4294967295]; see the H.264 protocol for the meaning */
HI_U32 time_scale; /* RW; Range:(0,4294967295]; see the H.264 protocol for the meaning */
} VENC_VUI_H264_TIME_INFO_S;
/* the param of the vui aspct ratio*/
typedef struct hiVENC_VUI_ASPECT_RATIO_S
{
HI_U8 aspect_ratio_info_present_flag; /* RW; Range:[0,1]; If 1, aspectratio info belows will be encoded into vui */
HI_U8 aspect_ratio_idc; /* RW; Range:[0,255]; 17~254 is reserved,see the protocol for the meaning.*/
HI_U8 overscan_info_present_flag; /* RW; Range:[0,1]; If 1, oversacan info belows will be encoded into vui.*/
HI_U8 overscan_appropriate_flag; /* RW; Range:[0,1]; see the protocol for the meaning. */
HI_U16 sar_width; /* RW; Range:(0, 65535]; see the protocol for the meaning. */
HI_U16 sar_height ; /* RW; Range:(0, 65535]; see the protocol for the meaning.
notes: sar_width and sar_height shall be relatively prime.*/
} VENC_VUI_ASPECT_RATIO_S;
/* the param of the vui video signal*/
typedef struct hiVENC_VUI_VIDEO_SIGNAL_S
{
HI_U8 video_signal_type_present_flag ; /* RW; Range:[0,1]; If 1, video singnal info will be encoded into vui. */
HI_U8 video_format ; /* RW; H.264e Range:[0,7], H.265e Range:[0,5]; see the protocol for the meaning. */
HI_U8 video_full_range_flag; /* RW; Range: {0,1}; see the protocol for the meaning.*/
HI_U8 colour_description_present_flag ; /* RO; Range: {0,1}; see the protocol for the meaning.*/
HI_U8 colour_primaries ; /* RO; Range: [0,255]; see the protocol for the meaning. */
HI_U8 transfer_characteristics; /* RO; Range: [0,255]; see the protocol for the meaning. */
HI_U8 matrix_coefficients; /* RO; Range:[0,255]; see the protocol for the meaning. */
} VENC_VUI_VIDEO_SIGNAL_S;
/* the param of the vui video signal*/
typedef struct hiVENC_VUI_BITSTREAM_RESTRIC_S
{
HI_U8 bitstream_restriction_flag ; /* RW; Range: {0,1}; see the protocol for the meaning.*/
} VENC_VUI_BITSTREAM_RESTRIC_S;
/* the param of the h264e vui */
typedef struct hiVENC_H264_VUI_S
{
VENC_VUI_ASPECT_RATIO_S stVuiAspectRatio;
VENC_VUI_H264_TIME_INFO_S stVuiTimeInfo;
VENC_VUI_VIDEO_SIGNAL_S stVuiVideoSignal;
VENC_VUI_BITSTREAM_RESTRIC_S stVuiBitstreamRestric;
} VENC_H264_VUI_S;
/* the param of the h265e vui timing info*/
typedef struct hiVENC_VUI_H265_TIME_INFO_S
{
HI_U32 timing_info_present_flag; /* RW; Range:[0,1]; If 1, timing info belows will be encoded into vui.*/
HI_U32 num_units_in_tick; /* RW; Range:[0,4294967295]; see the H.265 protocol for the meaning. */
HI_U32 time_scale; /* RW; Range:(0,4294967295]; see the H.265 protocol for the meaning */
HI_U32 num_ticks_poc_diff_one_minus1; /* RW; Range:(0,4294967294]; see the H.265 protocol for the meaning */
} VENC_VUI_H265_TIME_INFO_S;
/* the param of the h265e vui */
typedef struct hiVENC_H265_VUI_S
{
VENC_VUI_ASPECT_RATIO_S stVuiAspectRatio;
VENC_VUI_H265_TIME_INFO_S stVuiTimeInfo;
VENC_VUI_VIDEO_SIGNAL_S stVuiVideoSignal;
VENC_VUI_BITSTREAM_RESTRIC_S stVuiBitstreamRestric;
} VENC_H265_VUI_S;
/* the param of the jpege */
typedef struct hiVENC_JPEG_PARAM_S
{
HI_U32 u32Qfactor; /* RW; Range:[1,99]; Qfactor value */
HI_U8 u8YQt[64]; /* RW; Range:[1, 255]; Y quantization table */
HI_U8 u8CbQt[64]; /* RW; Range:[1, 255]; Cb quantization table */
HI_U8 u8CrQt[64]; /* RW; Range:[1, 255]; Cr quantization table */
HI_U32 u32MCUPerECS; /* RW; Range:[0, (picwidth + 15) >> 4 x (picheight +
15) >> 4 x 2]; MCU number of one ECS*/
} VENC_JPEG_PARAM_S;
/* the param of the mjpege */
typedef struct hiVENC_MJPEG_PARAM_S
{
HI_U8 u8YQt[64]; /* RW; Range:[1, 255]; Y quantization table */
HI_U8 u8CbQt[64]; /* RW; Range:[1, 255]; Cb quantization table */
HI_U8 u8CrQt[64]; /* RW; Range:[1, 255]; Cr quantization table */
HI_U32 u32MCUPerECS; /* RW; Range:[0, (picwidth + 15) >> 4 x (picheight +
15) >> 4 x 2]; MCU number of one ECS*/
} VENC_MJPEG_PARAM_S;
/* the param of the ProRes */
typedef struct hiVENC_PRORES_PARAM_S
{
HI_U8 u8LumaQt[64]; /* RW; Range:[1, 255]; Luma quantization table */
HI_U8 u8ChromaQt[64]; /* RW; Range:[1, 255]; Chroma quantization table */
HI_CHAR encoder_identifier[4]; /*RW: identifies the encoder vendor or product that generated the compressed frame*/
} VENC_PRORES_PARAM_S;
/* the attribute of the roi */
typedef struct hiVENC_ROI_ATTR_S
{
HI_U32 u32Index; /* RW; Range:[0, 7]; Index of an ROI. The system supports indexes ranging from 0 to 7 */
HI_BOOL bEnable; /* RW; Range:[0, 1]; Whether to enable this ROI */
HI_BOOL bAbsQp; /* RW; Range:[0, 1]; QP mode of an ROI.HI_FALSE: relative QP.HI_TURE: absolute QP.*/
HI_S32 s32Qp; /* RW; Range:[-51, 51]; QP value,only relative mode can QP value less than 0. */
RECT_S stRect; /* RW;Region of an ROI*/
} VENC_ROI_ATTR_S;
/* ROI struct */
typedef struct hiVENC_ROI_ATTR_EX_S
{
HI_U32 u32Index; /* Index of an ROI. The system supports indexes ranging from 0 to 7 */
HI_BOOL bEnable[3]; /* Subscript of array 0: I Frame; 1: P/B Frame; 2: VI Frame; other params are the same. */
HI_BOOL bAbsQp[3]; /* QP mode of an ROI.HI_FALSE: relative QP.HI_TURE: absolute QP.*/
HI_S32 s32Qp[3]; /* QP value. */
RECT_S stRect[3]; /* Region of an ROI*/
}VENC_ROI_ATTR_EX_S;
/* the param of the roibg frame rate */
typedef struct hiVENC_ROIBG_FRAME_RATE_S
{
HI_S32 s32SrcFrmRate; /* RW; Range:[-1,0)U(0 2147483647];Source frame rate of a non-ROI*/
HI_S32 s32DstFrmRate; /* RW; Range:[-1, s32SrcFrmRate]; Target frame rate of a non-ROI */
} VENC_ROIBG_FRAME_RATE_S;
/* the param of the roibg frame rate */
typedef struct hiVENC_REF_PARAM_S
{
HI_U32 u32Base; /* RW; Range:[0,4294967295]; Base layer period*/
HI_U32 u32Enhance; /* RW; Range:[0,255]; Enhance layer period*/
HI_BOOL bEnablePred; /* RW; Range:[0, 1]; Whether some frames at the base layer are referenced by other frames at the base layer. When bEnablePred is HI_FALSE, all frames at the base layer reference IDR frames.*/
} VENC_REF_PARAM_S;
/* Jpeg snap mode */
typedef enum hiVENC_JPEG_ENCODE_MODE_E
{
JPEG_ENCODE_ALL = 0, /* Jpeg channel snap all the pictures when started. */
JPEG_ENCODE_SNAP = 1, /* Jpeg channel snap the flashed pictures when started. */
JPEG_ENCODE_BUTT,
} VENC_JPEG_ENCODE_MODE_E;
/* the information of the stream */
typedef struct hiVENC_STREAM_BUF_INFO_S
{
HI_U64 u64PhyAddr[MAX_TILE_NUM]; /* R; Start physical address for a stream buffer */
HI_VOID ATTRIBUTE* pUserAddr[MAX_TILE_NUM]; /* R; Start virtual address for a stream buffer */
HI_U64 ATTRIBUTE u64BufSize[MAX_TILE_NUM]; /* R; Stream buffer size */
} VENC_STREAM_BUF_INFO_S;
/* the param of the h265e slice split */
typedef struct hiVENC_H265_SLICE_SPLIT_S
{
HI_BOOL bSplitEnable; /* RW; Range:[0,1]; slice split enable, HI_TRUE:enable, HI_FALSE:diable, default value:HI_FALSE */
HI_U32 u32LcuLineNum; /* RW; Range:(Picture height + 63)/64;this value presents lcu line number */
} VENC_H265_SLICE_SPLIT_S;
/* the param of the h265e pu */
typedef struct hiVENC_H265_PU_S
{
HI_U32 constrained_intra_pred_flag; /* RW; Range:[0,1]; see the H.265 protocol for the meaning. */
HI_U32 strong_intra_smoothing_enabled_flag; /* RW; Range:[0,1]; see the H.265 protocol for the meaning. */
} VENC_H265_PU_S;
/* the param of the h265e trans */
typedef struct hiVENC_H265_TRANS_S
{
HI_S32 cb_qp_offset; /* RW; Range:[-12,12]; see the H.265 protocol for the meaning. */
HI_S32 cr_qp_offset; /* RW; Range:[-12,12]; see the H.265 protocol for the meaning. */
HI_BOOL bScalingListEnabled; /* RW; Range:[0,1]; If 1, specifies that a scaling list is used.*/
HI_BOOL bScalingListTu4Valid; /* RW; Range:[0,1]; If 1, ScalingList4X4 belows will be encoded.*/
HI_U8 InterScalingList4X4[2][16]; /* RW; Range:[1,255]; Scaling List for inter 4X4 block.*/
HI_U8 IntraScalingList4X4[2][16]; /* RW; Range:[1,255]; Scaling List for intra 4X4 block.*/
HI_BOOL bScalingListTu8Valid; /* RW; Range:[0,1]; If 1, ScalingList8X8 belows will be encoded.*/
HI_U8 InterScalingList8X8[2][64]; /* RW; Range:[1,255]; Scaling List for inter 8X8 block.*/
HI_U8 IntraScalingList8X8[2][64]; /* RW; Range:[1,255]; Scaling List for intra 8X8 block.*/
HI_BOOL bScalingListTu16Valid; /* RW; Range:[0,1]; If 1, ScalingList16X16 belows will be encoded.*/
HI_U8 InterScalingList16X16[2][64]; /* RW; Range:[1,255]; Scaling List for inter 16X16 block..*/
HI_U8 IntraScalingList16X16[2][64]; /* RW; Range:[1,255]; Scaling List for inter 16X16 block.*/
HI_BOOL bScalingListTu32Valid; /* RW; Range:[0,1]; If 1, ScalingList32X32 belows will be encoded.*/
HI_U8 InterScalingList32X32[64]; /* RW; Range:[1,255]; Scaling List for inter 32X32 block..*/
HI_U8 IntraScalingList32X32[64]; /* RW; Range:[1,255]; Scaling List for inter 32X32 block.*/
} VENC_H265_TRANS_S;
/* the param of the h265e entroy */
typedef struct hiVENC_H265_ENTROPY_S
{
HI_U32 cabac_init_flag; /* RW; Range:[0,1]; see the H.265 protocol for the meaning. */
} VENC_H265_ENTROPY_S;
/* the param of the h265e deblocking */
typedef struct hiVENC_H265_DBLK_S
{
HI_U32 slice_deblocking_filter_disabled_flag; /* RW; Range:[0,1]; see the H.265 protocol for the meaning. */
HI_S32 slice_beta_offset_div2; /* RW; Range:[-6,6]; see the H.265 protocol for the meaning. */
HI_S32 slice_tc_offset_div2; /* RW; Range:[-6,6]; see the H.265 protocol for the meaning. */
} VENC_H265_DBLK_S;
/* the param of the h265e sao */
typedef struct hiVENC_H265_SAO_S
{
HI_U32 slice_sao_luma_flag; /*RW; Range:[0,1]; Indicates whether SAO filtering is performed on the luminance component of the current slice. */
HI_U32 slice_sao_chroma_flag; /*RW; Range:[0,1]; Indicates whether SAO filtering is performed on the chrominance component of the current slice*/
} VENC_H265_SAO_S;
/* venc mode type */
typedef enum hiVENC_INTRA_REFRESH_MODE_E
{
INTRA_REFRESH_ROW = 0, /* Line mode */
INTRA_REFRESH_COLUMN, /* Column mode */
INTRA_REFRESH_BUTT
} VENC_INTRA_REFRESH_MODE_E;
/* the param of the intra refresh */
typedef struct hiVENC_INTRA_REFRESH_S
{
HI_BOOL bRefreshEnable; /* RW; Range:[0,1]; intra refresh enable, HI_TRUE:enable, HI_FALSE:diable, default value:HI_FALSE*/
VENC_INTRA_REFRESH_MODE_E enIntraRefreshMode; /*RW;Range:INTRA_REFRESH_ROW or INTRA_REFRESH_COLUMN*/
HI_U32 u32RefreshNum; /* RW; Number of rows/column to be refreshed during each I macroblock refresh*/
HI_U32 u32ReqIQp; /* RW; Range:[0,51]; QP value of the I frame*/
} VENC_INTRA_REFRESH_S;
/* venc mode type */
typedef enum hiVENC_MODTYPE_E
{
MODTYPE_VENC = 1, /* VENC */
MODTYPE_H264E, /* H264e */
MODTYPE_H265E, /* H265e */
MODTYPE_JPEGE, /* Jpege */
MODTYPE_RC, /* Rc */
MODTYPE_BUTT
} VENC_MODTYPE_E;
/* the param of the h264e mod */
typedef struct hiVENC_MOD_H264E_S
{
HI_U32 u32OneStreamBuffer; /* RW; Range:[0,1]; one stream buffer*/
HI_U32 u32H264eMiniBufMode; /* RW; Range:[0,1]; H264e MiniBufMode*/
HI_U32 u32H264ePowerSaveEn; /* RW; Range:[0,1]; H264e PowerSaveEn*/
VB_SOURCE_E enH264eVBSource; /* RW; Range:VB_SOURCE_PRIVATE,VB_SOURCE_USER; H264e VBSource*/
HI_BOOL bQpHstgrmEn; /* RW; Range:[0,1]*/
} VENC_MOD_H264E_S;
/* the param of the h265e mod */
typedef struct hiVENC_MOD_H265E_S
{
HI_U32 u32OneStreamBuffer; /* RW; Range:[0,1]; one stream buffer*/
HI_U32 u32H265eMiniBufMode; /* RW; Range:[0,1]; H265e MiniBufMode*/
HI_U32 u32H265ePowerSaveEn; /* RW; Range:[0,2]; H265e PowerSaveEn*/
VB_SOURCE_E enH265eVBSource; /* RW; Range:VB_SOURCE_PRIVATE,VB_SOURCE_USER; H265e VBSource*/
HI_BOOL bQpHstgrmEn; /* RW; Range:[0,1]*/
} VENC_MOD_H265E_S;
/* the param of the jpege mod */
typedef struct hiVENC_MOD_JPEGE_S
{
HI_U32 u32OneStreamBuffer; /* RW; Range:[0,1]; one stream buffer*/
HI_U32 u32JpegeMiniBufMode; /* RW; Range:[0,1]; Jpege MiniBufMode*/
HI_U32 u32JpegClearStreamBuf; /* RW; Range:[0,1]; JpegClearStreamBuf*/
} VENC_MOD_JPEGE_S;
typedef struct hiVENC_MOD_RC_S
{
HI_U32 u32ClrStatAfterSetBr;
} VENC_MOD_RC_S;
/* the param of the venc mod */
typedef struct hiVENC_MOD_VENC_S
{
HI_U32 u32VencBufferCache; /* RW; Range:[0,1]; VencBufferCache*/
HI_U32 u32FrameBufRecycle; /* RW; Range:[0,1]; FrameBufRecycle*/
} VENC_MOD_VENC_S;
/* the param of the mod */
typedef struct hiVENC_MODPARAM_S
{
VENC_MODTYPE_E enVencModType; /* RW; VencModType*/
union
{
VENC_MOD_VENC_S stVencModParam;
VENC_MOD_H264E_S stH264eModParam;
VENC_MOD_H265E_S stH265eModParam;
VENC_MOD_JPEGE_S stJpegeModParam;
VENC_MOD_RC_S stRcModParam;
};
} VENC_PARAM_MOD_S;
typedef enum hiVENC_FRAME_TYPE_E
{
VENC_FRAME_TYPE_NONE = 1,
VENC_FRAME_TYPE_IDR,
VENC_FRAME_TYPE_BUTT
} VENC_FRAME_TYPE_E;
/* the information of the user rc*/
typedef struct hiUSER_RC_INFO_S
{
HI_BOOL bQpMapValid; /*RW; Range:[0,1]; Indicates whether the QpMap mode is valid for the current frame*/
HI_BOOL bSkipWeightValid; /*RW; Range:[0,1]; Indicates whether the SkipWeight mode is valid for the current frame*/
HI_U32 u32BlkStartQp; /* RW; Range:[0,51];QP value of the first 16 x 16 block in QpMap mode */
HI_U64 u64QpMapPhyAddr; /* RW; Physical address of the QP table in QpMap mode*/
HI_U64 u64SkipWeightPhyAddr; /* RW; Physical address of the SkipWeight table in QpMap mode*/
VENC_FRAME_TYPE_E enFrameType;
} USER_RC_INFO_S;
/* the information of the user frame*/
typedef struct hiUSER_FRAME_INFO_S
{
VIDEO_FRAME_INFO_S stUserFrame;
USER_RC_INFO_S stUserRcInfo;
} USER_FRAME_INFO_S;
/* the config of the sse*/
typedef struct hiVENC_SSE_CFG_S
{
HI_U32 u32Index; /* RW; Range:[0, 7]; Index of an SSE. The system supports indexes ranging from 0 to 7 */
HI_BOOL bEnable; /* RW; Range:[0, 1]; Whether to enable SSE */
RECT_S stRect; /* RW; */
} VENC_SSE_CFG_S;
/* the param of the crop */
typedef struct hiVENC_CROP_INFO_S
{
HI_BOOL bEnable; /* RW; Range:[0, 1]; Crop region enable */
RECT_S stRect; /* RW; Crop region, note: s32X must be multi of 16 */
} VENC_CROP_INFO_S;
/* the param of the venc frame rate */
typedef struct hiVENC_FRAME_RATE_S
{
HI_S32 s32SrcFrmRate; /* RW; Range:[0, 240]; Input frame rate of a channel*/
HI_S32 s32DstFrmRate; /* RW; Range:[0, 240]; Output frame rate of a channel*/
} VENC_FRAME_RATE_S;
/* the param of the venc encode chnl */
typedef struct hiVENC_CHN_PARAM_S
{
HI_BOOL bColor2Grey; /* RW; Range:[0, 1]; Whether to enable Color2Grey.*/
HI_U32 u32Priority; /* RW; Range:[0, 1]; The priority of the coding chnl.*/
HI_U32 u32MaxStrmCnt; /* RW: Range:[0,4294967295]; Maximum number of frames in a stream buffer*/
HI_U32 u32PollWakeUpFrmCnt; /* RW: Range:(0,4294967295]; the frame num needed to wake up obtaining streams */
VENC_CROP_INFO_S stCropCfg;
VENC_FRAME_RATE_S stFrameRate;
} VENC_CHN_PARAM_S;
/*the ground protect of FOREGROUND*/
typedef struct hiVENC_FOREGROUND_PROTECT_S
{
HI_BOOL bForegroundCuRcEn;
HI_U32 u32ForegroundDirectionThresh; /*RW; Range:[0, 16]; The direction for controlling the macroblock-level bit rate*/
HI_U32 u32ForegroundThreshGain; /*RW; Range:[0, 15]; The gain of the thresh*/
HI_U32 u32ForegroundThreshOffset; /*RW; Range:[0, 255]; The offset of the thresh*/
HI_U32 u32ForegroundThreshP[RC_TEXTURE_THR_SIZE];/*RW; Range:[0, 255]; Mad threshold for controlling the foreground macroblock-level bit rate of P frames */
HI_U32 u32ForegroundThreshB[RC_TEXTURE_THR_SIZE];/*RW; Range:[0, 255]; Mad threshold for controlling the foreground macroblock-level bit rate of B frames */
}VENC_FOREGROUND_PROTECT_S;
/* the scene mode of the venc encode chnl */
typedef enum hiVENC_SCENE_MODE_E
{
SCENE_0 = 0, /*RW;A scene in which the camera does not move or periodically moves continuously*/
SCENE_1 = 1, /*RW;Motion scene at high bit rate*/
SCENE_2 = 2, /*RW;It has regular continuous motion at medium bit rate and the encoding pressure is relatively large*/
SCENE_BUTT
}VENC_SCENE_MODE_E;
typedef struct hiVENC_DEBREATHEFFECT_S
{
HI_BOOL bEnable; /*RW; Range:[0,1];default: 0, DeBreathEffect enable */
HI_S32 s32Strength0; /*RW; Range:[0,35];The Strength0 of DeBreathEffect.*/
HI_S32 s32Strength1; /*RW; Range:[0,35];The Strength1 of DeBreathEffect.*/
} VENC_DEBREATHEFFECT_S;
typedef struct hiVENC_CU_PREDICTION_S
{
OPERATION_MODE_E enPredMode;
HI_U32 u32Intra32Cost;
HI_U32 u32Intra16Cost;
HI_U32 u32Intra8Cost;
HI_U32 u32Intra4Cost;
HI_U32 u32Inter64Cost;
HI_U32 u32Inter32Cost;
HI_U32 u32Inter16Cost;
HI_U32 u32Inter8Cost;
} VENC_CU_PREDICTION_S;
typedef struct hiVENC_SKIP_BIAS_S
{
HI_BOOL bSkipBiasEn;
HI_U32 u32SkipThreshGain;
HI_U32 u32SkipThreshOffset;
HI_U32 u32SkipBackgroundCost;
HI_U32 u32SkipForegroundCost;
} VENC_SKIP_BIAS_S;
typedef struct hiVENC_HIERARCHICAL_QP_S
{
HI_BOOL bHierarchicalQpEn;
HI_S32 s32HierarchicalQpDelta[4];
HI_S32 s32HierarchicalFrameNum[4];
}VENC_HIERARCHICAL_QP_S;
typedef struct hiVENC_CHN_POOL_S
{
VB_POOL hPicVbPool; /* RW; vb pool id for pic buffer */
VB_POOL hPicInfoVbPool; /* RW; vb pool id for pic info buffer */
}VENC_CHN_POOL_S;
typedef struct hiVENC_RC_ADVPARAM_S
{
HI_U32 u32ClearStatAfterSetAttr;
}VENC_RC_ADVPARAM_S;
#ifdef __cplusplus
#if __cplusplus
}
#endif
#endif /* __cplusplus */
#endif /* __HI_COMM_VENC_H__ */
|
118d1e58b1633abed5f8269dab6b4e3b2d4faa39
|
a3d6556180e74af7b555f8d47d3fea55b94bcbda
|
/third_party/libvpx/source/config/linux/arm-neon-cpu-detect/vp8_rtcd.h
|
2a17959a57d5101151b5413feb356c45a9aedb02
|
[
"BSD-3-Clause",
"GPL-1.0-or-later",
"MIT",
"LGPL-2.0-or-later",
"Apache-2.0"
] |
permissive
|
chromium/chromium
|
aaa9eda10115b50b0616d2f1aed5ef35d1d779d6
|
a401d6cf4f7bf0e2d2e964c512ebb923c3d8832c
|
refs/heads/main
| 2023-08-24T00:35:12.585945
| 2023-08-23T22:01:11
| 2023-08-23T22:01:11
| 120,360,765
| 17,408
| 7,102
|
BSD-3-Clause
| 2023-09-10T23:44:27
| 2018-02-05T20:55:32
| null |
UTF-8
|
C
| false
| false
| 31,167
|
h
|
vp8_rtcd.h
|
// This file is generated. Do not edit.
#ifndef VP8_RTCD_H_
#define VP8_RTCD_H_
#ifdef RTCD_C
#define RTCD_EXTERN
#else
#define RTCD_EXTERN extern
#endif
/*
* VP8
*/
struct blockd;
struct macroblockd;
struct loop_filter_info;
/* Encoder forward decls */
struct block;
struct macroblock;
struct variance_vtable;
union int_mv;
struct yv12_buffer_config;
#ifdef __cplusplus
extern "C" {
#endif
void vp8_bilinear_predict16x16_c(unsigned char* src_ptr,
int src_pixels_per_line,
int xoffset,
int yoffset,
unsigned char* dst_ptr,
int dst_pitch);
void vp8_bilinear_predict16x16_neon(unsigned char* src_ptr,
int src_pixels_per_line,
int xoffset,
int yoffset,
unsigned char* dst_ptr,
int dst_pitch);
RTCD_EXTERN void (*vp8_bilinear_predict16x16)(unsigned char* src_ptr,
int src_pixels_per_line,
int xoffset,
int yoffset,
unsigned char* dst_ptr,
int dst_pitch);
void vp8_bilinear_predict4x4_c(unsigned char* src_ptr,
int src_pixels_per_line,
int xoffset,
int yoffset,
unsigned char* dst_ptr,
int dst_pitch);
void vp8_bilinear_predict4x4_neon(unsigned char* src_ptr,
int src_pixels_per_line,
int xoffset,
int yoffset,
unsigned char* dst_ptr,
int dst_pitch);
RTCD_EXTERN void (*vp8_bilinear_predict4x4)(unsigned char* src_ptr,
int src_pixels_per_line,
int xoffset,
int yoffset,
unsigned char* dst_ptr,
int dst_pitch);
void vp8_bilinear_predict8x4_c(unsigned char* src_ptr,
int src_pixels_per_line,
int xoffset,
int yoffset,
unsigned char* dst_ptr,
int dst_pitch);
void vp8_bilinear_predict8x4_neon(unsigned char* src_ptr,
int src_pixels_per_line,
int xoffset,
int yoffset,
unsigned char* dst_ptr,
int dst_pitch);
RTCD_EXTERN void (*vp8_bilinear_predict8x4)(unsigned char* src_ptr,
int src_pixels_per_line,
int xoffset,
int yoffset,
unsigned char* dst_ptr,
int dst_pitch);
void vp8_bilinear_predict8x8_c(unsigned char* src_ptr,
int src_pixels_per_line,
int xoffset,
int yoffset,
unsigned char* dst_ptr,
int dst_pitch);
void vp8_bilinear_predict8x8_neon(unsigned char* src_ptr,
int src_pixels_per_line,
int xoffset,
int yoffset,
unsigned char* dst_ptr,
int dst_pitch);
RTCD_EXTERN void (*vp8_bilinear_predict8x8)(unsigned char* src_ptr,
int src_pixels_per_line,
int xoffset,
int yoffset,
unsigned char* dst_ptr,
int dst_pitch);
int vp8_block_error_c(short* coeff, short* dqcoeff);
#define vp8_block_error vp8_block_error_c
void vp8_copy32xn_c(const unsigned char* src_ptr,
int src_stride,
unsigned char* dst_ptr,
int dst_stride,
int height);
#define vp8_copy32xn vp8_copy32xn_c
void vp8_copy_mem16x16_c(unsigned char* src,
int src_stride,
unsigned char* dst,
int dst_stride);
void vp8_copy_mem16x16_neon(unsigned char* src,
int src_stride,
unsigned char* dst,
int dst_stride);
RTCD_EXTERN void (*vp8_copy_mem16x16)(unsigned char* src,
int src_stride,
unsigned char* dst,
int dst_stride);
void vp8_copy_mem8x4_c(unsigned char* src,
int src_stride,
unsigned char* dst,
int dst_stride);
void vp8_copy_mem8x4_neon(unsigned char* src,
int src_stride,
unsigned char* dst,
int dst_stride);
RTCD_EXTERN void (*vp8_copy_mem8x4)(unsigned char* src,
int src_stride,
unsigned char* dst,
int dst_stride);
void vp8_copy_mem8x8_c(unsigned char* src,
int src_stride,
unsigned char* dst,
int dst_stride);
void vp8_copy_mem8x8_neon(unsigned char* src,
int src_stride,
unsigned char* dst,
int dst_stride);
RTCD_EXTERN void (*vp8_copy_mem8x8)(unsigned char* src,
int src_stride,
unsigned char* dst,
int dst_stride);
void vp8_dc_only_idct_add_c(short input_dc,
unsigned char* pred_ptr,
int pred_stride,
unsigned char* dst_ptr,
int dst_stride);
void vp8_dc_only_idct_add_neon(short input_dc,
unsigned char* pred_ptr,
int pred_stride,
unsigned char* dst_ptr,
int dst_stride);
RTCD_EXTERN void (*vp8_dc_only_idct_add)(short input_dc,
unsigned char* pred_ptr,
int pred_stride,
unsigned char* dst_ptr,
int dst_stride);
int vp8_denoiser_filter_c(unsigned char* mc_running_avg_y,
int mc_avg_y_stride,
unsigned char* running_avg_y,
int avg_y_stride,
unsigned char* sig,
int sig_stride,
unsigned int motion_magnitude,
int increase_denoising);
int vp8_denoiser_filter_neon(unsigned char* mc_running_avg_y,
int mc_avg_y_stride,
unsigned char* running_avg_y,
int avg_y_stride,
unsigned char* sig,
int sig_stride,
unsigned int motion_magnitude,
int increase_denoising);
RTCD_EXTERN int (*vp8_denoiser_filter)(unsigned char* mc_running_avg_y,
int mc_avg_y_stride,
unsigned char* running_avg_y,
int avg_y_stride,
unsigned char* sig,
int sig_stride,
unsigned int motion_magnitude,
int increase_denoising);
int vp8_denoiser_filter_uv_c(unsigned char* mc_running_avg,
int mc_avg_stride,
unsigned char* running_avg,
int avg_stride,
unsigned char* sig,
int sig_stride,
unsigned int motion_magnitude,
int increase_denoising);
int vp8_denoiser_filter_uv_neon(unsigned char* mc_running_avg,
int mc_avg_stride,
unsigned char* running_avg,
int avg_stride,
unsigned char* sig,
int sig_stride,
unsigned int motion_magnitude,
int increase_denoising);
RTCD_EXTERN int (*vp8_denoiser_filter_uv)(unsigned char* mc_running_avg,
int mc_avg_stride,
unsigned char* running_avg,
int avg_stride,
unsigned char* sig,
int sig_stride,
unsigned int motion_magnitude,
int increase_denoising);
void vp8_dequant_idct_add_c(short* input,
short* dq,
unsigned char* dest,
int stride);
void vp8_dequant_idct_add_neon(short* input,
short* dq,
unsigned char* dest,
int stride);
RTCD_EXTERN void (*vp8_dequant_idct_add)(short* input,
short* dq,
unsigned char* dest,
int stride);
void vp8_dequant_idct_add_uv_block_c(short* q,
short* dq,
unsigned char* dst_u,
unsigned char* dst_v,
int stride,
char* eobs);
void vp8_dequant_idct_add_uv_block_neon(short* q,
short* dq,
unsigned char* dst_u,
unsigned char* dst_v,
int stride,
char* eobs);
RTCD_EXTERN void (*vp8_dequant_idct_add_uv_block)(short* q,
short* dq,
unsigned char* dst_u,
unsigned char* dst_v,
int stride,
char* eobs);
void vp8_dequant_idct_add_y_block_c(short* q,
short* dq,
unsigned char* dst,
int stride,
char* eobs);
void vp8_dequant_idct_add_y_block_neon(short* q,
short* dq,
unsigned char* dst,
int stride,
char* eobs);
RTCD_EXTERN void (*vp8_dequant_idct_add_y_block)(short* q,
short* dq,
unsigned char* dst,
int stride,
char* eobs);
void vp8_dequantize_b_c(struct blockd*, short* DQC);
void vp8_dequantize_b_neon(struct blockd*, short* DQC);
RTCD_EXTERN void (*vp8_dequantize_b)(struct blockd*, short* DQC);
int vp8_diamond_search_sad_c(struct macroblock* x,
struct block* b,
struct blockd* d,
union int_mv* ref_mv,
union int_mv* best_mv,
int search_param,
int sad_per_bit,
int* num00,
struct variance_vtable* fn_ptr,
int* mvcost[2],
union int_mv* center_mv);
#define vp8_diamond_search_sad vp8_diamond_search_sad_c
void vp8_fast_quantize_b_c(struct block*, struct blockd*);
void vp8_fast_quantize_b_neon(struct block*, struct blockd*);
RTCD_EXTERN void (*vp8_fast_quantize_b)(struct block*, struct blockd*);
void vp8_filter_by_weight16x16_c(unsigned char* src,
int src_stride,
unsigned char* dst,
int dst_stride,
int src_weight);
#define vp8_filter_by_weight16x16 vp8_filter_by_weight16x16_c
void vp8_filter_by_weight4x4_c(unsigned char* src,
int src_stride,
unsigned char* dst,
int dst_stride,
int src_weight);
#define vp8_filter_by_weight4x4 vp8_filter_by_weight4x4_c
void vp8_filter_by_weight8x8_c(unsigned char* src,
int src_stride,
unsigned char* dst,
int dst_stride,
int src_weight);
#define vp8_filter_by_weight8x8 vp8_filter_by_weight8x8_c
void vp8_loop_filter_bh_c(unsigned char* y_ptr,
unsigned char* u_ptr,
unsigned char* v_ptr,
int y_stride,
int uv_stride,
struct loop_filter_info* lfi);
void vp8_loop_filter_bh_neon(unsigned char* y_ptr,
unsigned char* u_ptr,
unsigned char* v_ptr,
int y_stride,
int uv_stride,
struct loop_filter_info* lfi);
RTCD_EXTERN void (*vp8_loop_filter_bh)(unsigned char* y_ptr,
unsigned char* u_ptr,
unsigned char* v_ptr,
int y_stride,
int uv_stride,
struct loop_filter_info* lfi);
void vp8_loop_filter_bv_c(unsigned char* y_ptr,
unsigned char* u_ptr,
unsigned char* v_ptr,
int y_stride,
int uv_stride,
struct loop_filter_info* lfi);
void vp8_loop_filter_bv_neon(unsigned char* y_ptr,
unsigned char* u_ptr,
unsigned char* v_ptr,
int y_stride,
int uv_stride,
struct loop_filter_info* lfi);
RTCD_EXTERN void (*vp8_loop_filter_bv)(unsigned char* y_ptr,
unsigned char* u_ptr,
unsigned char* v_ptr,
int y_stride,
int uv_stride,
struct loop_filter_info* lfi);
void vp8_loop_filter_mbh_c(unsigned char* y_ptr,
unsigned char* u_ptr,
unsigned char* v_ptr,
int y_stride,
int uv_stride,
struct loop_filter_info* lfi);
void vp8_loop_filter_mbh_neon(unsigned char* y_ptr,
unsigned char* u_ptr,
unsigned char* v_ptr,
int y_stride,
int uv_stride,
struct loop_filter_info* lfi);
RTCD_EXTERN void (*vp8_loop_filter_mbh)(unsigned char* y_ptr,
unsigned char* u_ptr,
unsigned char* v_ptr,
int y_stride,
int uv_stride,
struct loop_filter_info* lfi);
void vp8_loop_filter_mbv_c(unsigned char* y_ptr,
unsigned char* u_ptr,
unsigned char* v_ptr,
int y_stride,
int uv_stride,
struct loop_filter_info* lfi);
void vp8_loop_filter_mbv_neon(unsigned char* y_ptr,
unsigned char* u_ptr,
unsigned char* v_ptr,
int y_stride,
int uv_stride,
struct loop_filter_info* lfi);
RTCD_EXTERN void (*vp8_loop_filter_mbv)(unsigned char* y_ptr,
unsigned char* u_ptr,
unsigned char* v_ptr,
int y_stride,
int uv_stride,
struct loop_filter_info* lfi);
void vp8_loop_filter_bhs_c(unsigned char* y_ptr,
int y_stride,
const unsigned char* blimit);
void vp8_loop_filter_bhs_neon(unsigned char* y_ptr,
int y_stride,
const unsigned char* blimit);
RTCD_EXTERN void (*vp8_loop_filter_simple_bh)(unsigned char* y_ptr,
int y_stride,
const unsigned char* blimit);
void vp8_loop_filter_bvs_c(unsigned char* y_ptr,
int y_stride,
const unsigned char* blimit);
void vp8_loop_filter_bvs_neon(unsigned char* y_ptr,
int y_stride,
const unsigned char* blimit);
RTCD_EXTERN void (*vp8_loop_filter_simple_bv)(unsigned char* y_ptr,
int y_stride,
const unsigned char* blimit);
void vp8_loop_filter_simple_horizontal_edge_c(unsigned char* y_ptr,
int y_stride,
const unsigned char* blimit);
void vp8_loop_filter_mbhs_neon(unsigned char* y_ptr,
int y_stride,
const unsigned char* blimit);
RTCD_EXTERN void (*vp8_loop_filter_simple_mbh)(unsigned char* y_ptr,
int y_stride,
const unsigned char* blimit);
void vp8_loop_filter_simple_vertical_edge_c(unsigned char* y_ptr,
int y_stride,
const unsigned char* blimit);
void vp8_loop_filter_mbvs_neon(unsigned char* y_ptr,
int y_stride,
const unsigned char* blimit);
RTCD_EXTERN void (*vp8_loop_filter_simple_mbv)(unsigned char* y_ptr,
int y_stride,
const unsigned char* blimit);
int vp8_mbblock_error_c(struct macroblock* mb, int dc);
#define vp8_mbblock_error vp8_mbblock_error_c
int vp8_mbuverror_c(struct macroblock* mb);
#define vp8_mbuverror vp8_mbuverror_c
int vp8_refining_search_sad_c(struct macroblock* x,
struct block* b,
struct blockd* d,
union int_mv* ref_mv,
int error_per_bit,
int search_range,
struct variance_vtable* fn_ptr,
int* mvcost[2],
union int_mv* center_mv);
#define vp8_refining_search_sad vp8_refining_search_sad_c
void vp8_regular_quantize_b_c(struct block*, struct blockd*);
#define vp8_regular_quantize_b vp8_regular_quantize_b_c
void vp8_short_fdct4x4_c(short* input, short* output, int pitch);
void vp8_short_fdct4x4_neon(short* input, short* output, int pitch);
RTCD_EXTERN void (*vp8_short_fdct4x4)(short* input, short* output, int pitch);
void vp8_short_fdct8x4_c(short* input, short* output, int pitch);
void vp8_short_fdct8x4_neon(short* input, short* output, int pitch);
RTCD_EXTERN void (*vp8_short_fdct8x4)(short* input, short* output, int pitch);
void vp8_short_idct4x4llm_c(short* input,
unsigned char* pred_ptr,
int pred_stride,
unsigned char* dst_ptr,
int dst_stride);
void vp8_short_idct4x4llm_neon(short* input,
unsigned char* pred_ptr,
int pred_stride,
unsigned char* dst_ptr,
int dst_stride);
RTCD_EXTERN void (*vp8_short_idct4x4llm)(short* input,
unsigned char* pred_ptr,
int pred_stride,
unsigned char* dst_ptr,
int dst_stride);
void vp8_short_inv_walsh4x4_c(short* input, short* mb_dqcoeff);
void vp8_short_inv_walsh4x4_neon(short* input, short* mb_dqcoeff);
RTCD_EXTERN void (*vp8_short_inv_walsh4x4)(short* input, short* mb_dqcoeff);
void vp8_short_inv_walsh4x4_1_c(short* input, short* mb_dqcoeff);
#define vp8_short_inv_walsh4x4_1 vp8_short_inv_walsh4x4_1_c
void vp8_short_walsh4x4_c(short* input, short* output, int pitch);
void vp8_short_walsh4x4_neon(short* input, short* output, int pitch);
RTCD_EXTERN void (*vp8_short_walsh4x4)(short* input, short* output, int pitch);
void vp8_sixtap_predict16x16_c(unsigned char* src_ptr,
int src_pixels_per_line,
int xoffset,
int yoffset,
unsigned char* dst_ptr,
int dst_pitch);
void vp8_sixtap_predict16x16_neon(unsigned char* src_ptr,
int src_pixels_per_line,
int xoffset,
int yoffset,
unsigned char* dst_ptr,
int dst_pitch);
RTCD_EXTERN void (*vp8_sixtap_predict16x16)(unsigned char* src_ptr,
int src_pixels_per_line,
int xoffset,
int yoffset,
unsigned char* dst_ptr,
int dst_pitch);
void vp8_sixtap_predict4x4_c(unsigned char* src_ptr,
int src_pixels_per_line,
int xoffset,
int yoffset,
unsigned char* dst_ptr,
int dst_pitch);
void vp8_sixtap_predict4x4_neon(unsigned char* src_ptr,
int src_pixels_per_line,
int xoffset,
int yoffset,
unsigned char* dst_ptr,
int dst_pitch);
RTCD_EXTERN void (*vp8_sixtap_predict4x4)(unsigned char* src_ptr,
int src_pixels_per_line,
int xoffset,
int yoffset,
unsigned char* dst_ptr,
int dst_pitch);
void vp8_sixtap_predict8x4_c(unsigned char* src_ptr,
int src_pixels_per_line,
int xoffset,
int yoffset,
unsigned char* dst_ptr,
int dst_pitch);
void vp8_sixtap_predict8x4_neon(unsigned char* src_ptr,
int src_pixels_per_line,
int xoffset,
int yoffset,
unsigned char* dst_ptr,
int dst_pitch);
RTCD_EXTERN void (*vp8_sixtap_predict8x4)(unsigned char* src_ptr,
int src_pixels_per_line,
int xoffset,
int yoffset,
unsigned char* dst_ptr,
int dst_pitch);
void vp8_sixtap_predict8x8_c(unsigned char* src_ptr,
int src_pixels_per_line,
int xoffset,
int yoffset,
unsigned char* dst_ptr,
int dst_pitch);
void vp8_sixtap_predict8x8_neon(unsigned char* src_ptr,
int src_pixels_per_line,
int xoffset,
int yoffset,
unsigned char* dst_ptr,
int dst_pitch);
RTCD_EXTERN void (*vp8_sixtap_predict8x8)(unsigned char* src_ptr,
int src_pixels_per_line,
int xoffset,
int yoffset,
unsigned char* dst_ptr,
int dst_pitch);
void vp8_rtcd(void);
#include "vpx_config.h"
#ifdef RTCD_C
#include "vpx_ports/arm.h"
static void setup_rtcd_internal(void) {
int flags = arm_cpu_caps();
(void)flags;
vp8_bilinear_predict16x16 = vp8_bilinear_predict16x16_c;
if (flags & HAS_NEON)
vp8_bilinear_predict16x16 = vp8_bilinear_predict16x16_neon;
vp8_bilinear_predict4x4 = vp8_bilinear_predict4x4_c;
if (flags & HAS_NEON)
vp8_bilinear_predict4x4 = vp8_bilinear_predict4x4_neon;
vp8_bilinear_predict8x4 = vp8_bilinear_predict8x4_c;
if (flags & HAS_NEON)
vp8_bilinear_predict8x4 = vp8_bilinear_predict8x4_neon;
vp8_bilinear_predict8x8 = vp8_bilinear_predict8x8_c;
if (flags & HAS_NEON)
vp8_bilinear_predict8x8 = vp8_bilinear_predict8x8_neon;
vp8_copy_mem16x16 = vp8_copy_mem16x16_c;
if (flags & HAS_NEON)
vp8_copy_mem16x16 = vp8_copy_mem16x16_neon;
vp8_copy_mem8x4 = vp8_copy_mem8x4_c;
if (flags & HAS_NEON)
vp8_copy_mem8x4 = vp8_copy_mem8x4_neon;
vp8_copy_mem8x8 = vp8_copy_mem8x8_c;
if (flags & HAS_NEON)
vp8_copy_mem8x8 = vp8_copy_mem8x8_neon;
vp8_dc_only_idct_add = vp8_dc_only_idct_add_c;
if (flags & HAS_NEON)
vp8_dc_only_idct_add = vp8_dc_only_idct_add_neon;
vp8_denoiser_filter = vp8_denoiser_filter_c;
if (flags & HAS_NEON)
vp8_denoiser_filter = vp8_denoiser_filter_neon;
vp8_denoiser_filter_uv = vp8_denoiser_filter_uv_c;
if (flags & HAS_NEON)
vp8_denoiser_filter_uv = vp8_denoiser_filter_uv_neon;
vp8_dequant_idct_add = vp8_dequant_idct_add_c;
if (flags & HAS_NEON)
vp8_dequant_idct_add = vp8_dequant_idct_add_neon;
vp8_dequant_idct_add_uv_block = vp8_dequant_idct_add_uv_block_c;
if (flags & HAS_NEON)
vp8_dequant_idct_add_uv_block = vp8_dequant_idct_add_uv_block_neon;
vp8_dequant_idct_add_y_block = vp8_dequant_idct_add_y_block_c;
if (flags & HAS_NEON)
vp8_dequant_idct_add_y_block = vp8_dequant_idct_add_y_block_neon;
vp8_dequantize_b = vp8_dequantize_b_c;
if (flags & HAS_NEON)
vp8_dequantize_b = vp8_dequantize_b_neon;
vp8_fast_quantize_b = vp8_fast_quantize_b_c;
if (flags & HAS_NEON)
vp8_fast_quantize_b = vp8_fast_quantize_b_neon;
vp8_loop_filter_bh = vp8_loop_filter_bh_c;
if (flags & HAS_NEON)
vp8_loop_filter_bh = vp8_loop_filter_bh_neon;
vp8_loop_filter_bv = vp8_loop_filter_bv_c;
if (flags & HAS_NEON)
vp8_loop_filter_bv = vp8_loop_filter_bv_neon;
vp8_loop_filter_mbh = vp8_loop_filter_mbh_c;
if (flags & HAS_NEON)
vp8_loop_filter_mbh = vp8_loop_filter_mbh_neon;
vp8_loop_filter_mbv = vp8_loop_filter_mbv_c;
if (flags & HAS_NEON)
vp8_loop_filter_mbv = vp8_loop_filter_mbv_neon;
vp8_loop_filter_simple_bh = vp8_loop_filter_bhs_c;
if (flags & HAS_NEON)
vp8_loop_filter_simple_bh = vp8_loop_filter_bhs_neon;
vp8_loop_filter_simple_bv = vp8_loop_filter_bvs_c;
if (flags & HAS_NEON)
vp8_loop_filter_simple_bv = vp8_loop_filter_bvs_neon;
vp8_loop_filter_simple_mbh = vp8_loop_filter_simple_horizontal_edge_c;
if (flags & HAS_NEON)
vp8_loop_filter_simple_mbh = vp8_loop_filter_mbhs_neon;
vp8_loop_filter_simple_mbv = vp8_loop_filter_simple_vertical_edge_c;
if (flags & HAS_NEON)
vp8_loop_filter_simple_mbv = vp8_loop_filter_mbvs_neon;
vp8_short_fdct4x4 = vp8_short_fdct4x4_c;
if (flags & HAS_NEON)
vp8_short_fdct4x4 = vp8_short_fdct4x4_neon;
vp8_short_fdct8x4 = vp8_short_fdct8x4_c;
if (flags & HAS_NEON)
vp8_short_fdct8x4 = vp8_short_fdct8x4_neon;
vp8_short_idct4x4llm = vp8_short_idct4x4llm_c;
if (flags & HAS_NEON)
vp8_short_idct4x4llm = vp8_short_idct4x4llm_neon;
vp8_short_inv_walsh4x4 = vp8_short_inv_walsh4x4_c;
if (flags & HAS_NEON)
vp8_short_inv_walsh4x4 = vp8_short_inv_walsh4x4_neon;
vp8_short_walsh4x4 = vp8_short_walsh4x4_c;
if (flags & HAS_NEON)
vp8_short_walsh4x4 = vp8_short_walsh4x4_neon;
vp8_sixtap_predict16x16 = vp8_sixtap_predict16x16_c;
if (flags & HAS_NEON)
vp8_sixtap_predict16x16 = vp8_sixtap_predict16x16_neon;
vp8_sixtap_predict4x4 = vp8_sixtap_predict4x4_c;
if (flags & HAS_NEON)
vp8_sixtap_predict4x4 = vp8_sixtap_predict4x4_neon;
vp8_sixtap_predict8x4 = vp8_sixtap_predict8x4_c;
if (flags & HAS_NEON)
vp8_sixtap_predict8x4 = vp8_sixtap_predict8x4_neon;
vp8_sixtap_predict8x8 = vp8_sixtap_predict8x8_c;
if (flags & HAS_NEON)
vp8_sixtap_predict8x8 = vp8_sixtap_predict8x8_neon;
}
#endif
#ifdef __cplusplus
} // extern "C"
#endif
#endif
|
b1b9e09ab117c079a48a87ea5229aa7cfc172b0f
|
382a4dacbf7d6e6da096ddac660ba7a40af350cf
|
/src/libraries/GxEPD/src/imglib/gridicons_spam.h
|
01b7bbaf4a9341a9a27ece39232cd889060138fb
|
[
"MIT",
"GPL-3.0-only"
] |
permissive
|
Xinyuan-LilyGO/TTGO_TWatch_Library
|
84b1a580ad931caac7407bf110fde5b9248be3c4
|
6a07f3762a4d11c8e5c0c2d6f9340ee4fdaa5fcb
|
refs/heads/master
| 2023-08-18T15:36:22.029944
| 2023-07-03T01:27:29
| 2023-07-03T01:27:29
| 202,286,916
| 776
| 293
|
MIT
| 2023-08-31T05:18:44
| 2019-08-14T06:17:29
|
C
|
UTF-8
|
C
| false
| false
| 671
|
h
|
gridicons_spam.h
|
#if defined(ESP8266) || defined(ESP32)
#include <pgmspace.h>
#else
#include <avr/pgmspace.h>
#endif
// 24 x 24 gridicons_spam
const unsigned char gridicons_spam[] PROGMEM = { /* 0X01,0X01,0XB4,0X00,0X40,0X00, */
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFC, 0x00,
0x3F, 0xFC, 0x00, 0x3F, 0xF0, 0x00, 0x0F, 0xF0,
0x00, 0x0F, 0xC0, 0x00, 0x03, 0xC0, 0x18, 0x03,
0xC0, 0x18, 0x03, 0xC0, 0x18, 0x03, 0xC0, 0x18,
0x03, 0xC0, 0x18, 0x03, 0xC0, 0x18, 0x03, 0xC0,
0x00, 0x03, 0xC0, 0x00, 0x03, 0xC0, 0x18, 0x03,
0xC0, 0x18, 0x03, 0xC0, 0x00, 0x03, 0xF0, 0x00,
0x0F, 0xF0, 0x00, 0x0F, 0xFC, 0x00, 0x3F, 0xFC,
0x00, 0x3F, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF
};
|
ef0677b8b30f53031d84e835b0869af27b4c5e93
|
aa3befea459382dc5c01c925653d54f435b3fb0f
|
/boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_boot.c
|
8aaa0554c418f1082034dcae6e3069d65d182ff9
|
[
"MIT-open-group",
"BSD-3-Clause",
"HPND-sell-variant",
"BSD-4-Clause-UC",
"LicenseRef-scancode-warranty-disclaimer",
"MIT-0",
"LicenseRef-scancode-bsd-atmel",
"LicenseRef-scancode-gary-s-brown",
"LicenseRef-scancode-proprietary-license",
"SunPro",
"MIT",
"LicenseRef-scancode-public-domain-disclaimer",
"LicenseRef-scancode-other-permissive",
"HPND",
"ISC",
"Apache-2.0",
"LicenseRef-scancode-public-domain",
"BSD-2-Clause",
"GPL-1.0-or-later",
"CC-BY-2.0",
"CC-BY-4.0"
] |
permissive
|
apache/nuttx
|
14519a7bff4a87935d94fb8fb2b19edb501c7cec
|
606b6d9310fb25c7d92c6f95bf61737e3c79fa0f
|
refs/heads/master
| 2023-08-25T06:55:45.822534
| 2023-08-23T16:03:31
| 2023-08-24T21:25:47
| 228,103,273
| 407
| 241
|
Apache-2.0
| 2023-09-14T18:26:05
| 2019-12-14T23:27:55
|
C
|
UTF-8
|
C
| false
| false
| 5,518
|
c
|
stm32_boot.c
|
/****************************************************************************
* boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_boot.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <debug.h>
#include <nuttx/board.h>
#include <arch/board/board.h>
#include <nuttx/mtd/mtd.h>
#include <nuttx/spi/qspi.h>
#include "stm32f777zit6-meadow.h"
#ifdef CONFIG_STM32F7_QUADSPI
# include <nuttx/mtd/mtd.h>
# include "stm32_qspi.h"
# ifdef CONFIG_FS_FAT
# include <sys/mount.h>
# include <nuttx/fs/fat.h>
# endif
/* MEADOW FIXME: header clash? */
extern FAR struct qspi_dev_s *stm32f7_qspi_initialize(int intf);
#endif
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_boardinitialize
*
* Description:
* All STM32 architectures must provide the following entry point. This
* entry point is called early in the initialization -- after all memory
* has been configured and mapped but before any devices have been
* initialized.
*
****************************************************************************/
void stm32_boardinitialize(void)
{
#if defined(CONFIG_STM32F7_SPI1) || defined(CONFIG_STM32F7_SPI2) || \
defined(CONFIG_STM32F7_SPI3) || defined(CONFIG_STM32F7_SPI4) || \
defined(CONFIG_STM32F7_SPI5)
/* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak
* function stm32_spidev_initialize() has been brought into the link.
*/
if (stm32_spidev_initialize)
{
stm32_spidev_initialize();
}
#endif
#ifdef CONFIG_SPORADIC_INSTRUMENTATION
/* This configuration has been used for evaluating the NuttX sporadic
* scheduler.
* The following call initializes the sporadic scheduler monitor.
*/
arch_sporadic_initialize();
#endif
#ifdef CONFIG_ARCH_LEDS
/* Configure on-board LEDs if LED support has been selected. */
board_autoled_initialize();
#endif
#ifdef CONFIG_STM32F7_FMC
stm32_sdram_initialize();
#endif
}
/****************************************************************************
* Name: board_late_initialize
*
* Description:
* If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional
* initialization call will be performed in the boot-up sequence to a
* function called board_late_initialize().
* board_late_initialize() will be called immediately after up_initialize()
* is called and just before the initial application is started.
* This additional initialization phase may be used, for example, to
* initialize board-specific device drivers.
*
****************************************************************************/
#ifdef CONFIG_BOARD_LATE_INITIALIZE
void board_late_initialize(void)
{
#ifdef CONFIG_STM32F7_QUADSPI
FAR struct qspi_dev_s *qspi;
FAR struct mtd_dev_s *mtd;
struct qspi_meminfo_s meminfo;
int ret;
qspi = stm32f7_qspi_initialize(0);
if (!qspi)
{
syslog(LOG_ERR, "ERROR: sam_qspi_initialize muiled\n");
return;
}
mtd = w25qxxxjv_initialize(qspi, true);
if (!mtd)
{
syslog(LOG_ERR, "ERROR: w25qxxxjv_initialize failed\n");
}
ret = ftl_initialize(0, mtd);
if (ret < 0)
{
ferr("ERROR: Initialize the FTL layer\n");
}
meminfo.flags = QSPIMEM_READ | QSPIMEM_QUADIO;
meminfo.addrlen = 3;
meminfo.dummies = 6;
meminfo.cmd = 0xeb; /* S25FL1_FAST_READ_QUADIO; */
meminfo.addr = 0;
meminfo.buflen = 0;
meminfo.buffer = NULL;
stm32f7_qspi_enter_memorymapped(qspi, &meminfo, 80000000);
/* FIXME: stm32_mpu_uheap depends on PROTECTED && MPU
*
* stm32_mpu_uheap((uintptr_t)0x90000000, 0x4000000);
*/
#endif
#if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_BOARDCTL)
/* Perform NSH initialization here instead of from the NSH. This
* alternative NSH initialization is necessary when NSH is ran in
* user-space but the initialization function must run in kernel space.
*/
board_app_initialize();
#endif
}
#endif
|
50aff60719ce25805c8d4cd7514d1b68dca7dffa
|
99bdb3251fecee538e0630f15f6574054dfc1468
|
/bsp/ck802/libraries/common/spi/dw_spi.h
|
88fd79d91a19f4c1fb485c0ce004de93af255883
|
[
"Apache-2.0",
"Zlib",
"LicenseRef-scancode-proprietary-license",
"MIT",
"BSD-3-Clause",
"X11",
"BSD-4-Clause-UC",
"LicenseRef-scancode-unknown-license-reference"
] |
permissive
|
RT-Thread/rt-thread
|
03a7c52c2aeb1b06a544143b0e803d72f47d1ece
|
3602f891211904a27dcbd51e5ba72fefce7326b2
|
refs/heads/master
| 2023-09-01T04:10:20.295801
| 2023-08-31T16:20:55
| 2023-08-31T16:20:55
| 7,408,108
| 9,599
| 5,805
|
Apache-2.0
| 2023-09-14T13:37:26
| 2013-01-02T14:49:21
|
C
|
UTF-8
|
C
| false
| false
| 6,284
|
h
|
dw_spi.h
|
/*
* Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/******************************************************************************
* @file dw_spi.h
* @brief header file for spi driver
* @version V1.0
* @date 02. June 2017
******************************************************************************/
#ifndef __DW_SPI_H
#define __DW_SPI_H
#include <stdio.h>
#include "soc.h"
/*
* SPI register bit definitions
*/
#define DW_SPI_ENABLE 0x01
#define DW_SPI_DISABLE 0x00
#define DW_SPI_TMOD_BIT8 0x0100
#define DW_SPI_TMOD_BIT9 0x0200
#define DW_SPI_POLARITY 0x80
#define DW_SPI_PHASE 0x40
#define DW_SPI_BUSY 0x01
#define DW_SPI_TFE 0x04
#define DW_SPI_RFNE 0x08
#define DW_SPI_INT_EN 0x19
#define DW_SPI_RINT_EN 0x3e
#define DW_SPI_TINT_EN 0x3f
#define DW_SPI_INT_DISABLE 0x00
#define DW_SPI_INT_MASK_RX 0x27
#define DW_SPI_INT_MASKTX 0x3e
#define DW_SPI_RDMAE 0x1
#define DW_SPI_TDMAE 0x2
#define DW_SPI_TXFIFO_LV 0x0
#define DW_SPI_RXFIFO_LV 0x1d
#define DW_SPI_RXFIFO_NOT_EMPTY 0x08
#define DW_SPI_START_RX 0x0
#define DW_SPI_FIFO_MAX_LV 0x20
#define DW_SPI_FIFO_OVER_LV 0x18
#define DW_SPI_RXFIFO_OVERFLOW 0x08
#define DW_SPI_RXFIFO_FULL 0x10
#define DW_SPI_TXFIFO_EMPTY 0x01
#define SPI_CS_SELECTED 0x0
#define DW_SPI_IMR_TXEIM 0x01 /* Transmit FIFO Empty Interrupt Mask */
#define DW_SPI_IMR_RXFIM 0x10 /* Receive FIFO Full Interrupt Mask */
/* some infoermationgs of SPI for special MCU */
#define DW_SPI_DEFAULT_BAUDR 10000000 /* 10M */
#define DW_SPI_MAXID 0x1
#define SPI_INITIALIZED ((uint8_t)(1U)) // SPI initalized
#define SPI_POWERED ((uint8_t)(1U<< 1)) // SPI powered on
#define SPI_CONFIGURED ((uint8_t)(1U << 2)) // SPI configured
#define SPI_DATA_LOST ((uint8_t)(1U << 3)) // SPI data lost occurred
#define SPI_MODE_FAULT ((uint8_t)(1U << 4)) // SPI mode fault occurred
typedef enum {
DWENUM_SPI_DMACR_RXE = 0,
DWENUM_SPI_DMACR_TXE = 1,
} DWENUM_SPI_DMACR;
typedef enum {
DWENUM_SPI_TXRX = 0,
DWENUM_SPI_TX = 1,
DWENUM_SPI_RX = 2,
DWENUM_SPI_EERX = 3
} DWENUM_SPI_MODE;
typedef enum {
DWENUM_SPI_CLOCK_POLARITY_LOW = 0,
DWENUM_SPI_CLOCK_POLARITY_HIGH = 1
} DWENUM_SPI_POLARITY;
typedef enum {
DWENUM_SPI_CLOCK_PHASE_MIDDLE = 0,
DWENUM_SPI_CLOCK_PHASE_START = 1
} DWENUM_SPI_PHASE;
typedef enum {
DWENUM_SPI_DATASIZE_4 = 3,
DWENUM_SPI_DATASIZE_5 = 4,
DWENUM_SPI_DATASIZE_6 = 5,
DWENUM_SPI_DATASIZE_7 = 6,
DWENUM_SPI_DATASIZE_8 = 7,
DWENUM_SPI_DATASIZE_9 = 8,
DWENUM_SPI_DATASIZE_10 = 9,
DWENUM_SPI_DATASIZE_11 = 10,
DWENUM_SPI_DATASIZE_12 = 11,
DWENUM_SPI_DATASIZE_13 = 12,
DWENUM_SPI_DATASIZE_14 = 13,
DWENUM_SPI_DATASIZE_15 = 14,
DWENUM_SPI_DATASIZE_16 = 15
} DWENUM_SPI_DATAWIDTH;
typedef enum {
DWENUM_SPI_CS0 = 1,
DWENUM_SPI_CS1 = 2
} DWENUM_SPI_SLAVE;
typedef struct {
__IOM uint16_t CTRLR0; /* Offset: 0x000 (R/W) Control register 0 */
uint16_t RESERVED0;
__IOM uint16_t CTRLR1; /* Offset: 0x004 (R/W) Control register 1 */
uint16_t RESERVED1;
__IOM uint8_t SPIENR; /* Offset: 0x008 (R/W) SSI enable regiseter */
uint8_t RESERVED2[7];
__IOM uint32_t SER; /* Offset: 0x010 (R/W) Slave enable register */
__IOM uint16_t BAUDR; /* Offset: 0x014 (R/W) Baud rate select */
uint16_t RESERVED3;
__IOM uint32_t TXFTLR; /* Offset: 0x018 (R/W) Transmit FIFO Threshold Level */
__IOM uint32_t RXFTLR; /* Offset: 0x01c (R/W) Receive FIFO Threshold Level */
__IOM uint32_t TXFLR; /* Offset: 0x020 (R/W) Transmit FIFO Level register */
__IOM uint32_t RXFLR; /* Offset: 0x024 (R/W) Receive FIFO Level Register */
__IOM uint8_t SR; /* Offset: 0x028 (R/W) status register */
uint8_t RESERVED4[3];
__IOM uint32_t IMR; /* Offset: 0x02C (R/W) Interrupt Mask Register */
__IM uint32_t ISR; /* Offset: 0x030 (R/W) interrupt status register */
__IM uint32_t RISR; /* Offset: 0x034 (R/W) Raw Interrupt Status Register */
__IM uint8_t TXOICR; /* Offset: 0x038 (R/W) Transmit FIFO Overflow Interrupt Clear Register */
uint8_t RESERVED5[3];
__IM uint8_t RXOICR; /* Offset: 0x03C (R/W) Receive FIFO Overflow Interrupt Clear Register*/
uint8_t RESERVED6[3];
__IM uint8_t RXUICR; /* Offset: 0x040 (R/W) Receive FIFO Underflow Interrupt Clear Register */
uint8_t RESERVED7[3];
__IM uint8_t MSTICR; /* Offset: 0x044 (R/W) Multi-Master Interrupt Clear Register */
uint8_t RESERVED8[3];
__IM uint8_t ICR; /* Offset: 0x048 (R/W) Interrupt Clear Register */
uint8_t RESERVED9[3];
__IOM uint8_t DMACR; /* Offset: 0x04C (R/W) DMA Control Register */
uint8_t RESERVED10[3];
__IOM uint8_t DMATDLR; /* Offset: 0x050 (R/W) DMA Transmoit Data Level */
uint8_t RESERVED11[3];
__IOM uint8_t DMARDLR; /* Offset: 0x054 (R/W) DMA Receive Data Level */
uint8_t RESERVED12[3];
__IM uint32_t IDR; /* Offset: 0x058 (R/W) identification register */
uint32_t RESERVED13;
__IOM uint16_t DR; /* Offset: 0x060 (R/W) Data Register */
uint16_t RESERVED14[17];
__IOM uint8_t WR; /* Offset: 0x0A0 (R/W) SPI is Master or Slave Select Register */
} dw_spi_reg_t;
#endif /* __DW_SPI_H */
|
95afb64b21f7b2836bac17b3970fbda5acb20c94
|
5a5328c0ad39230779aa52c9ae57ec193b88941e
|
/tesseract4android/src/main/cpp/leptonica/src/prog/messagetest.c
|
0baf8b761f60b0b3aef32b29d53872db155088cf
|
[
"BSD-2-Clause",
"CC-BY-2.5",
"Apache-2.0"
] |
permissive
|
adaptech-cz/Tesseract4Android
|
66978579ccc80587b8a0ae3eebe79f152fa382cd
|
8ae584f54502d5457c8b9d62401eaa99551352c3
|
refs/heads/master
| 2023-07-21T16:49:39.617935
| 2023-07-18T12:13:29
| 2023-07-18T12:13:29
| 168,021,668
| 517
| 101
|
Apache-2.0
| 2021-03-29T11:52:21
| 2019-01-28T19:21:34
|
C
|
UTF-8
|
C
| false
| false
| 7,514
|
c
|
messagetest.c
|
/*====================================================================*
- Copyright (C) 2001 Leptonica. All rights reserved.
-
- Redistribution and use in source and binary forms, with or without
- modification, are permitted provided that the following conditions
- are met:
- 1. Redistributions of source code must retain the above copyright
- notice, this list of conditions and the following disclaimer.
- 2. Redistributions in binary form must reproduce the above
- copyright notice, this list of conditions and the following
- disclaimer in the documentation and/or other materials
- provided with the distribution.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ANY
- CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
- EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
- PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
- OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
- NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*====================================================================*/
/* Test the message severity system. */
/* There are three parts:
* o The first part demonstrates the message severity functionality.
* o The second part demonstrates a combination of message severity control
* and redirect of output to stderr (in this case to dev null).
* o The third part shows that the naked fprintf() is not affected by the
* callback handler, and the default handler is restored with NULL input.
*
* Notes on the message severity functionality
* --------------------------------------------
*
* The program prints info, warning, and error messages at the initial
* run-time severity, which defaults to L_SEVERITY_INFO. Then it resets the
* severity to the value specified by an environment variable (or failing
* that, specified by one of 7 severity control variables) and prints three
* more info, warning, and error messages.
*
* Which messages actually print depend on the compile-time definitions of the
* MINIMUM_SEVERITY and DEFAULT_SEVERITY identifiers and the run-time
* definition of the LEPT_MSG_SEVERITY environment variable. For example:
*
* These commands... --> ...print these messages
* ============================== ====================================
* $ make
*
* $ ./print --> info, warn, error, info, warn, error
* $ LEPT_MSG_SEVERITY=0 ./print --> info, warn, error, info, warn, error
* $ LEPT_MSG_SEVERITY=5 ./print --> info, warn, error, error
* $ LEPT_MSG_SEVERITY=6 ./print --> info, warn, error
*
*
* $ make clean ; make DEFINES='-D DEFAULT_SEVERITY=L_SEVERITY_WARNING'
*
* $ ./print --> warn, error, warn, error
* $ LEPT_MSG_SEVERITY=0 ./print --> warn, error, info, warn, error
* $ LEPT_MSG_SEVERITY=5 ./print --> warn, error, error
* $ LEPT_MSG_SEVERITY=6 ./print --> warn, error
*
*
* $ make clean ; make DEFINES='-D MINIMUM_SEVERITY=L_SEVERITY_WARNING'
*
* $ ./print --> warn, error, warn, error
* $ LEPT_MSG_SEVERITY=0 ./print --> warn, error, warn, error
* $ LEPT_MSG_SEVERITY=5 ./print --> warn, error, error
* $ LEPT_MSG_SEVERITY=6 ./print --> warn, error
*
*
* $ make clean ; make DEFINES='-D NO_CONSOLE_IO'
*
* $ ./print --> (no messages)
* $ LEPT_MSG_SEVERITY=0 ./print --> (no messages)
* $ LEPT_MSG_SEVERITY=5 ./print --> (no messages)
* $ LEPT_MSG_SEVERITY=6 ./print --> (no messages)
*
* Note that in the first and second cases, code is generated to print all six
* messages, while in the third and fourth cases, code is not generated to
* print info or all messages, respectively. This allows the run-time overhead
* and code space of the print statements to be removed from the library, if
* desired.
*/
#ifdef HAVE_CONFIG_H
#include <config_auto.h>
#endif /* HAVE_CONFIG_H */
#include "allheaders.h"
void TestMessageControl(l_int32 severity);
void TestStderrRedirect();
/* dev null callback for stderr redirect */
static void send_to_devnull(const char *msg) {}
int main ()
{
/* Part 1: all output to stderr */
lept_stderr("\nSeverity tests\n");
TestMessageControl(L_SEVERITY_EXTERNAL);
TestMessageControl(L_SEVERITY_INFO);
TestMessageControl(L_SEVERITY_WARNING);
TestMessageControl(L_SEVERITY_ERROR);
TestMessageControl(L_SEVERITY_NONE);
/* Part 2: test combination of severity and redirect */
lept_stderr("\nRedirect Tests\n\n");
setMsgSeverity(L_SEVERITY_INFO);
TestStderrRedirect();
setMsgSeverity(L_SEVERITY_WARNING);
TestStderrRedirect();
setMsgSeverity(L_SEVERITY_ERROR);
TestStderrRedirect();
setMsgSeverity(L_SEVERITY_NONE);
TestStderrRedirect();
/* Part 3: test of naked fprintf and output with callback handler.
* All lines should print except for line 4. */
lept_stderr("1. text\n");
lept_stderr("2. text\n");
leptSetStderrHandler(send_to_devnull);
lept_stderr("3. text\n");
lept_stderr("4. text\n");
leptSetStderrHandler(NULL);
lept_stderr("5. text\n");
lept_stderr("6. text\n");
return 0;
}
void TestMessageControl(l_int32 severity)
{
l_int32 orig_severity;
setMsgSeverity(DEFAULT_SEVERITY);
fputc ('\n', stderr);
/* Print a set of messages with the default setting */
L_INFO ("First message\n", "messagetest");
L_WARNING ("First message\n", "messagetest");
L_ERROR ("First message\n", "messagetest");
/* Set the run-time severity to the value specified by the
LEPT_MSG_SEVERITY environment variable. If the variable
is not defined, set the run-time severity to the input value */
orig_severity = setMsgSeverity(severity);
/* Print messages allowed by the new severity setting */
L_INFO ("Second message\n", "messagetest");
L_WARNING ("Second message\n", "messagetest");
L_ERROR ("Second message\n", "messagetest");
}
void TestStderrRedirect() {
PIX *pix1;
/* Output to stderr works */
L_INFO("test output 1 to stderr\n", "messagetest");
L_WARNING("test output 1 to stderr\n", "messagetest");
L_ERROR("test output 1 to stderr\n", "messagetest");
pix1 = pixRead("doesn't_exist");
/* There is no "test output 2" */
leptSetStderrHandler(send_to_devnull);
L_INFO("test output 2 to stderr\n", "messagetest");
L_WARNING("test output 2 to stderr\n", "messagetest");
L_ERROR("test output 2 to stderr\n", "messagetest");
pix1 = pixRead("doesn't_exist");
leptSetStderrHandler(NULL);
/* Output is restored to stderr */
L_INFO("test output 3 to stderr\n", "messagetest");
L_WARNING("test output 3 to stderr\n", "messagetest");
L_ERROR("test output 3 to stderr\n", "messagetest");
pix1 = pixRead("doesn't_exist");
lept_stderr("---------------------------------\n");
}
|
fba84ea27e61efcf88a43399b018bdc7ac360524
|
b4a3facc5fcd12a85c1ca0d33d78312eb94b61cf
|
/include/picasso_image_plugin.h
|
25a0e4160e71ea494cdc1bf24a219f41abf9cff6
|
[
"BSD-3-Clause"
] |
permissive
|
onecoolx/picasso
|
2d3eecf35947be7991fea06be01986dd0d16773e
|
f14245e09c10467d54eaf845a874584361a46d46
|
refs/heads/master
| 2023-03-20T15:19:03.677086
| 2023-03-01T05:37:03
| 2023-03-01T05:37:03
| 2,441,631
| 333
| 51
|
BSD-3-Clause
| 2023-03-16T03:03:08
| 2011-09-23T02:54:10
|
C
|
UTF-8
|
C
| false
| false
| 5,173
|
h
|
picasso_image_plugin.h
|
/**
* \file picasso_image_plugin.h
* \author Zhang Ji Peng <onecoolx@gmail.com>
* \date 2012/1/31
*
* This file includes all interfaces of image decoder backend.
\verbatim
Copyright (C) 2008 ~ 2018 Zhang Ji Peng
All rights reserved.
Picasso is a vector graphic library.
\endverbatim
*/
#ifndef _PICASSO_IMAGE_PLUGININ_INTERFACE_H_
#define _PICASSO_IMAGE_PLUGININ_INTERFACE_H_
#include "picasso.h"
#include "picasso_image.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* \defgroup extension Extensions
* @{
*/
/**
* \defgroup extimg XImage Extension
* @{
*/
/**
* \defgroup types XImage Coder Plugin Data Types
* @{
*/
/**
* \brief Image reader header define.
*/
typedef struct _psx_image_header {
/** Private data for operator. */
void* priv;
/** Image width. */
int width;
/** Image height. */
int height;
/** Image pitch of scanline. */
int pitch;
/** Image depth. */
int depth;
/** Image bpp */
int bpp;
/** Image color format */
int format;
/** Image has alpha channel. (false: 0, true: 1) */
int alpha;
/** Image frame count. */
int frames;
}psx_image_header;
/**
* \brief The image operator define.
* \sa psx_image_register_operator psx_image_unregister_operator
*/
typedef struct _psx_image_operator {
/** Create a image reader header. */
int (*read_header_info)(const ps_byte* data, size_t data_len, psx_image_header* header);
/** Read a frame of raw data. */
int (*decode_image_data)(psx_image_header* header, const psx_image* image, psx_image_frame* frame, int idx, ps_byte* buffer, size_t buffer_len);
/** Release reader resources. */
int (*release_read_header_info)(psx_image_header* header);
/** Create a image writer header. */
int (*write_header_info)(const psx_image* image, image_writer_fn func,
void* param, float quality, psx_image_header* header);
/** Write image data frames. */
int (*encode_image_data)(psx_image_header* header, const psx_image* image, psx_image_frame* frame, int idx, const ps_byte* buffer, size_t buffer_len, int* ret);
/** Release writer resources. */
int (*release_write_header_info)(psx_image_header* header);
}psx_image_operator;
/**
* \brief Priority level for image_operator.
* \sa psx_image_register_operator
*/
typedef enum _psx_priority_level {
/** Low level operator. */
PRIORITY_EXTENTED = -1,
/** Default level operator. */
PRIORITY_DEFAULT = 0,
/** High level operator. */
PRIORITY_MASTER = 1,
}psx_priority_level;
/** @} end of plugin types */
/**
* \defgroup interface XImage Coders Register functions
* @{
*/
/**
* \fn int psx_image_register_operator(const char* type, const ps_byte* signature, size_t sig_offset, size_t sig_len,
* psx_priority_level level, psx_image_operator* coder)
* \brief Register the image operator.
*
* \param type The image operator short name. (i.e "png" "jpg" "gif" "bmp")
* \param signature The image signature.
* \param sig_offset The image signature offset from the beginning of the image data. (usually is 0)
* \param sig_len The image signature length.
* \param level The image operator priority level.
* \param coder The pointer to a image_operator object.
*
* \return Result code returned.
*
* \sa psx_image_unregister_operator
*/
PEXPORT int psx_image_register_operator(const char* type, const ps_byte* signature, size_t sig_offset, size_t sig_len,
psx_priority_level level, psx_image_operator* coder);
/**
* \fn int psx_image_unregister_operator(psx_image_operator* coder)
* \brief Unregister the image operator.
*
* \param coder The image operator which will be unregister.
*
* \return Result code returned.
*
* \sa psx_image_register_operator
*/
PEXPORT int psx_image_unregister_operator(psx_image_operator* coder);
/** @} end of image register functions */
/**
* \defgroup coder XImage Coders Plugin side functions
* @{
*/
/**
* \fn void psx_image_module_init(void)
* \brief Initialze the image module.
*
* \sa psx_image_module_shutdown psx_image_module_get_string
*/
PEXPORT void psx_image_module_init(void);
/**
* \fn void psx_image_module_shutdown(void)
* \brief Shutdown the image module.
*
* \sa psx_image_module_init psx_image_module_get_string
*/
PEXPORT void psx_image_module_shutdown(void);
/**
* \def MODULE_NAME
* \brief Get module name
*/
#define MODULE_NAME 1
/**
* \fn char* psx_image_module_get_string(int id)
* \brief Get the string info about module.
*
* \param id The information index.
*
* \return If successs, return the pointer of string. Can not be modify and free.
* If fails, return NULL.
*
* \sa psx_image_module_init psx_image_module_shutdown
*/
PEXPORT const char* psx_image_module_get_string(int id);
/** @} end of plugin side functions */
/** @} end of extimg */
/** @} end of extensions */
#ifdef __cplusplus
}
#endif
#endif /*_PICASSO_IMAGE_PLUGININ_INTERFACE_H_*/
|
4cff12fb3a5f4862819c96432bbef7499cacf04b
|
847ebadf2b0e7c01ad33ce92b42528a1a5c4846c
|
/lib/netdev-offload.c
|
a5fa6248754f4986e73ffbac79a31768fbd7b50e
|
[
"Apache-2.0",
"BSD-3-Clause",
"ISC",
"SISSL",
"GPL-2.0-only",
"LicenseRef-scancode-unknown-license-reference",
"BSD-2-Clause"
] |
permissive
|
openvswitch/ovs
|
6f782527cf5fde4ccfd25e68d359b91ff41acf8a
|
bc79a7bf033fa4cda8ccfc5481db3cfccd72650c
|
refs/heads/master
| 2023-09-04T06:31:47.899017
| 2023-08-03T16:19:12
| 2023-09-01T20:15:05
| 18,383,364
| 3,366
| 2,259
|
Apache-2.0
| 2023-08-17T13:17:13
| 2014-04-02T22:15:28
|
C
|
UTF-8
|
C
| false
| false
| 26,787
|
c
|
netdev-offload.c
|
/*
* Copyright (c) 2008 - 2014, 2016, 2017 Nicira, Inc.
* Copyright (c) 2019 Samsung Electronics Co.,Ltd.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include <config.h>
#include "netdev-offload.h"
#include <errno.h>
#include <inttypes.h>
#include <sys/types.h>
#include <netinet/in.h>
#include <stdlib.h>
#include <string.h>
#include <unistd.h>
#include "cmap.h"
#include "coverage.h"
#include "dpif.h"
#include "dp-packet.h"
#include "openvswitch/dynamic-string.h"
#include "fatal-signal.h"
#include "hash.h"
#include "openvswitch/list.h"
#include "netdev-offload-provider.h"
#include "netdev-provider.h"
#include "netdev-vport.h"
#include "odp-netlink.h"
#include "openflow/openflow.h"
#include "packets.h"
#include "openvswitch/ofp-print.h"
#include "openvswitch/poll-loop.h"
#include "seq.h"
#include "openvswitch/shash.h"
#include "smap.h"
#include "socket-util.h"
#include "sset.h"
#include "svec.h"
#include "openvswitch/vlog.h"
#include "flow.h"
#include "util.h"
#ifdef __linux__
#include "tc.h"
#endif
VLOG_DEFINE_THIS_MODULE(netdev_offload);
static struct vlog_rate_limit rl = VLOG_RATE_LIMIT_INIT(1, 5);
static bool netdev_flow_api_enabled = false;
#define DEFAULT_OFFLOAD_THREAD_NB 1
#define MAX_OFFLOAD_THREAD_NB 10
static unsigned int offload_thread_nb = DEFAULT_OFFLOAD_THREAD_NB;
DEFINE_EXTERN_PER_THREAD_DATA(netdev_offload_thread_id, OVSTHREAD_ID_UNSET);
/* Protects 'netdev_flow_apis'. */
static struct ovs_mutex netdev_flow_api_provider_mutex = OVS_MUTEX_INITIALIZER;
/* Contains 'struct netdev_registered_flow_api's. */
static struct cmap netdev_flow_apis = CMAP_INITIALIZER;
struct netdev_registered_flow_api {
struct cmap_node cmap_node; /* In 'netdev_flow_apis', by flow_api->type. */
const struct netdev_flow_api *flow_api;
/* Number of references: one for the flow_api itself and one for every
* instance of the netdev that uses it. */
struct ovs_refcount refcnt;
};
static struct netdev_registered_flow_api *
netdev_lookup_flow_api(const char *type)
{
struct netdev_registered_flow_api *rfa;
CMAP_FOR_EACH_WITH_HASH (rfa, cmap_node, hash_string(type, 0),
&netdev_flow_apis) {
if (!strcmp(type, rfa->flow_api->type)) {
return rfa;
}
}
return NULL;
}
/* Registers a new netdev flow api provider. */
int
netdev_register_flow_api_provider(const struct netdev_flow_api *new_flow_api)
OVS_EXCLUDED(netdev_flow_api_provider_mutex)
{
int error = 0;
if (!new_flow_api->init_flow_api) {
VLOG_WARN("attempted to register invalid flow api provider: %s",
new_flow_api->type);
error = EINVAL;
}
ovs_mutex_lock(&netdev_flow_api_provider_mutex);
if (netdev_lookup_flow_api(new_flow_api->type)) {
VLOG_WARN("attempted to register duplicate flow api provider: %s",
new_flow_api->type);
error = EEXIST;
} else {
struct netdev_registered_flow_api *rfa;
rfa = xmalloc(sizeof *rfa);
cmap_insert(&netdev_flow_apis, &rfa->cmap_node,
hash_string(new_flow_api->type, 0));
rfa->flow_api = new_flow_api;
ovs_refcount_init(&rfa->refcnt);
VLOG_DBG("netdev: flow API '%s' registered.", new_flow_api->type);
}
ovs_mutex_unlock(&netdev_flow_api_provider_mutex);
return error;
}
/* Unregisters a netdev flow api provider. 'type' must have been previously
* registered and not currently be in use by any netdevs. After unregistration
* netdev flow api of that type cannot be used for netdevs. (However, the
* provider may still be accessible from other threads until the next RCU grace
* period, so the caller must not free or re-register the same netdev_flow_api
* until that has passed.) */
int
netdev_unregister_flow_api_provider(const char *type)
OVS_EXCLUDED(netdev_flow_api_provider_mutex)
{
struct netdev_registered_flow_api *rfa;
int error;
ovs_mutex_lock(&netdev_flow_api_provider_mutex);
rfa = netdev_lookup_flow_api(type);
if (!rfa) {
VLOG_WARN("attempted to unregister a flow api provider that is not "
"registered: %s", type);
error = EAFNOSUPPORT;
} else if (ovs_refcount_unref(&rfa->refcnt) != 1) {
ovs_refcount_ref(&rfa->refcnt);
VLOG_WARN("attempted to unregister in use flow api provider: %s",
type);
error = EBUSY;
} else {
cmap_remove(&netdev_flow_apis, &rfa->cmap_node,
hash_string(rfa->flow_api->type, 0));
ovsrcu_postpone(free, rfa);
error = 0;
}
ovs_mutex_unlock(&netdev_flow_api_provider_mutex);
return error;
}
bool
netdev_flow_api_equals(const struct netdev *netdev1,
const struct netdev *netdev2)
{
const struct netdev_flow_api *netdev_flow_api1 =
ovsrcu_get(const struct netdev_flow_api *, &netdev1->flow_api);
const struct netdev_flow_api *netdev_flow_api2 =
ovsrcu_get(const struct netdev_flow_api *, &netdev2->flow_api);
return netdev_flow_api1 == netdev_flow_api2;
}
static int
netdev_assign_flow_api(struct netdev *netdev)
{
struct netdev_registered_flow_api *rfa;
CMAP_FOR_EACH (rfa, cmap_node, &netdev_flow_apis) {
if (!rfa->flow_api->init_flow_api(netdev)) {
ovs_refcount_ref(&rfa->refcnt);
atomic_store_relaxed(&netdev->hw_info.miss_api_supported, true);
ovsrcu_set(&netdev->flow_api, rfa->flow_api);
VLOG_INFO("%s: Assigned flow API '%s'.",
netdev_get_name(netdev), rfa->flow_api->type);
return 0;
}
VLOG_DBG("%s: flow API '%s' is not suitable.",
netdev_get_name(netdev), rfa->flow_api->type);
}
atomic_store_relaxed(&netdev->hw_info.miss_api_supported, false);
VLOG_INFO("%s: No suitable flow API found.", netdev_get_name(netdev));
return -1;
}
void
meter_offload_set(ofproto_meter_id meter_id,
struct ofputil_meter_config *config)
{
struct netdev_registered_flow_api *rfa;
CMAP_FOR_EACH (rfa, cmap_node, &netdev_flow_apis) {
if (rfa->flow_api->meter_set) {
int ret = rfa->flow_api->meter_set(meter_id, config);
if (ret) {
VLOG_DBG_RL(&rl, "Failed setting meter %u for flow api %s, "
"error %d", meter_id.uint32, rfa->flow_api->type,
ret);
}
}
}
/* Offload APIs could fail, for example, because the offload is not
* supported. This is fine, as the offload API should take care of this. */
}
int
meter_offload_get(ofproto_meter_id meter_id, struct ofputil_meter_stats *stats)
{
struct netdev_registered_flow_api *rfa;
CMAP_FOR_EACH (rfa, cmap_node, &netdev_flow_apis) {
if (rfa->flow_api->meter_get) {
int ret = rfa->flow_api->meter_get(meter_id, stats);
if (ret) {
VLOG_DBG_RL(&rl, "Failed getting meter %u for flow api %s, "
"error %d", meter_id.uint32, rfa->flow_api->type,
ret);
}
}
}
return 0;
}
int
meter_offload_del(ofproto_meter_id meter_id, struct ofputil_meter_stats *stats)
{
struct netdev_registered_flow_api *rfa;
CMAP_FOR_EACH (rfa, cmap_node, &netdev_flow_apis) {
if (rfa->flow_api->meter_del) {
int ret = rfa->flow_api->meter_del(meter_id, stats);
if (ret) {
VLOG_DBG_RL(&rl, "Failed deleting meter %u for flow api %s, "
"error %d", meter_id.uint32, rfa->flow_api->type,
ret);
}
}
}
return 0;
}
int
netdev_flow_flush(struct netdev *netdev)
{
const struct netdev_flow_api *flow_api =
ovsrcu_get(const struct netdev_flow_api *, &netdev->flow_api);
return (flow_api && flow_api->flow_flush)
? flow_api->flow_flush(netdev)
: EOPNOTSUPP;
}
int
netdev_flow_dump_create(struct netdev *netdev, struct netdev_flow_dump **dump,
bool terse)
{
const struct netdev_flow_api *flow_api =
ovsrcu_get(const struct netdev_flow_api *, &netdev->flow_api);
return (flow_api && flow_api->flow_dump_create)
? flow_api->flow_dump_create(netdev, dump, terse)
: EOPNOTSUPP;
}
int
netdev_flow_dump_destroy(struct netdev_flow_dump *dump)
{
const struct netdev_flow_api *flow_api =
ovsrcu_get(const struct netdev_flow_api *, &dump->netdev->flow_api);
return (flow_api && flow_api->flow_dump_destroy)
? flow_api->flow_dump_destroy(dump)
: EOPNOTSUPP;
}
bool
netdev_flow_dump_next(struct netdev_flow_dump *dump, struct match *match,
struct nlattr **actions, struct dpif_flow_stats *stats,
struct dpif_flow_attrs *attrs, ovs_u128 *ufid,
struct ofpbuf *rbuffer, struct ofpbuf *wbuffer)
{
const struct netdev_flow_api *flow_api =
ovsrcu_get(const struct netdev_flow_api *, &dump->netdev->flow_api);
return (flow_api && flow_api->flow_dump_next)
? flow_api->flow_dump_next(dump, match, actions, stats, attrs,
ufid, rbuffer, wbuffer)
: false;
}
int
netdev_flow_put(struct netdev *netdev, struct match *match,
struct nlattr *actions, size_t act_len,
const ovs_u128 *ufid, struct offload_info *info,
struct dpif_flow_stats *stats)
{
const struct netdev_flow_api *flow_api =
ovsrcu_get(const struct netdev_flow_api *, &netdev->flow_api);
return (flow_api && flow_api->flow_put)
? flow_api->flow_put(netdev, match, actions, act_len, ufid,
info, stats)
: EOPNOTSUPP;
}
int
netdev_hw_miss_packet_recover(struct netdev *netdev,
struct dp_packet *packet)
{
const struct netdev_flow_api *flow_api;
bool miss_api_supported;
int rv;
atomic_read_relaxed(&netdev->hw_info.miss_api_supported,
&miss_api_supported);
if (!miss_api_supported) {
return EOPNOTSUPP;
}
flow_api = ovsrcu_get(const struct netdev_flow_api *, &netdev->flow_api);
if (!flow_api || !flow_api->hw_miss_packet_recover) {
return EOPNOTSUPP;
}
rv = flow_api->hw_miss_packet_recover(netdev, packet);
if (rv == EOPNOTSUPP) {
/* API unsupported by the port; avoid subsequent calls. */
atomic_store_relaxed(&netdev->hw_info.miss_api_supported, false);
}
return rv;
}
int
netdev_flow_get(struct netdev *netdev, struct match *match,
struct nlattr **actions, const ovs_u128 *ufid,
struct dpif_flow_stats *stats,
struct dpif_flow_attrs *attrs, struct ofpbuf *buf)
{
const struct netdev_flow_api *flow_api =
ovsrcu_get(const struct netdev_flow_api *, &netdev->flow_api);
return (flow_api && flow_api->flow_get)
? flow_api->flow_get(netdev, match, actions, ufid,
stats, attrs, buf)
: EOPNOTSUPP;
}
int
netdev_flow_del(struct netdev *netdev, const ovs_u128 *ufid,
struct dpif_flow_stats *stats)
{
const struct netdev_flow_api *flow_api =
ovsrcu_get(const struct netdev_flow_api *, &netdev->flow_api);
return (flow_api && flow_api->flow_del)
? flow_api->flow_del(netdev, ufid, stats)
: EOPNOTSUPP;
}
int
netdev_flow_get_n_flows(struct netdev *netdev, uint64_t *n_flows)
{
const struct netdev_flow_api *flow_api =
ovsrcu_get(const struct netdev_flow_api *, &netdev->flow_api);
return (flow_api && flow_api->flow_get_n_flows)
? flow_api->flow_get_n_flows(netdev, n_flows)
: EOPNOTSUPP;
}
int
netdev_init_flow_api(struct netdev *netdev)
{
if (!netdev_is_flow_api_enabled()) {
return EOPNOTSUPP;
}
if (ovsrcu_get(const struct netdev_flow_api *, &netdev->flow_api)) {
return 0;
}
if (netdev_assign_flow_api(netdev)) {
return EOPNOTSUPP;
}
return 0;
}
void
netdev_uninit_flow_api(struct netdev *netdev)
{
struct netdev_registered_flow_api *rfa;
const struct netdev_flow_api *flow_api =
ovsrcu_get(const struct netdev_flow_api *, &netdev->flow_api);
if (!flow_api) {
return;
}
if (flow_api->uninit_flow_api) {
flow_api->uninit_flow_api(netdev);
}
ovsrcu_set(&netdev->flow_api, NULL);
rfa = netdev_lookup_flow_api(flow_api->type);
ovs_refcount_unref(&rfa->refcnt);
}
uint32_t
netdev_get_block_id(struct netdev *netdev)
{
const struct netdev_class *class = netdev->netdev_class;
return (class->get_block_id
? class->get_block_id(netdev)
: 0);
}
/*
* Get the value of the hw info parameter specified by type.
* Returns the value on success (>= 0). Returns -1 on failure.
*/
int
netdev_get_hw_info(struct netdev *netdev, int type)
{
int val = -1;
switch (type) {
case HW_INFO_TYPE_OOR:
val = netdev->hw_info.oor;
break;
case HW_INFO_TYPE_PEND_COUNT:
val = netdev->hw_info.pending_count;
break;
case HW_INFO_TYPE_OFFL_COUNT:
val = netdev->hw_info.offload_count;
break;
default:
break;
}
return val;
}
/*
* Set the value of the hw info parameter specified by type.
*/
void
netdev_set_hw_info(struct netdev *netdev, int type, int val)
{
switch (type) {
case HW_INFO_TYPE_OOR:
if (val == 0) {
VLOG_DBG("Offload rebalance: netdev: %s is not OOR", netdev->name);
}
netdev->hw_info.oor = val;
break;
case HW_INFO_TYPE_PEND_COUNT:
netdev->hw_info.pending_count = val;
break;
case HW_INFO_TYPE_OFFL_COUNT:
netdev->hw_info.offload_count = val;
break;
default:
break;
}
}
/* Protects below port hashmaps. */
static struct ovs_rwlock ifindex_to_port_rwlock = OVS_RWLOCK_INITIALIZER;
static struct ovs_rwlock port_to_netdev_rwlock
OVS_ACQ_BEFORE(ifindex_to_port_rwlock) = OVS_RWLOCK_INITIALIZER;
static struct hmap port_to_netdev OVS_GUARDED_BY(port_to_netdev_rwlock)
= HMAP_INITIALIZER(&port_to_netdev);
static struct hmap ifindex_to_port OVS_GUARDED_BY(ifindex_to_port_rwlock)
= HMAP_INITIALIZER(&ifindex_to_port);
struct port_to_netdev_data {
struct hmap_node portno_node; /* By (dpif_type, dpif_port.port_no). */
struct hmap_node ifindex_node; /* By (dpif_type, ifindex). */
struct netdev *netdev;
struct dpif_port dpif_port;
int ifindex;
};
/*
* Find if any netdev is in OOR state. Return true if there's at least
* one netdev that's in OOR state; otherwise return false.
*/
bool
netdev_any_oor(void)
OVS_EXCLUDED(port_to_netdev_rwlock)
{
struct port_to_netdev_data *data;
bool oor = false;
ovs_rwlock_rdlock(&port_to_netdev_rwlock);
HMAP_FOR_EACH (data, portno_node, &port_to_netdev) {
struct netdev *dev = data->netdev;
if (dev->hw_info.oor) {
oor = true;
break;
}
}
ovs_rwlock_unlock(&port_to_netdev_rwlock);
return oor;
}
bool
netdev_is_flow_api_enabled(void)
{
return netdev_flow_api_enabled;
}
unsigned int
netdev_offload_thread_nb(void)
{
return offload_thread_nb;
}
unsigned int
netdev_offload_ufid_to_thread_id(const ovs_u128 ufid)
{
uint32_t ufid_hash;
if (netdev_offload_thread_nb() == 1) {
return 0;
}
ufid_hash = hash_words64_inline(
(const uint64_t [2]){ ufid.u64.lo,
ufid.u64.hi }, 2, 1);
return ufid_hash % netdev_offload_thread_nb();
}
unsigned int
netdev_offload_thread_init(void)
{
static atomic_count next_id = ATOMIC_COUNT_INIT(0);
bool thread_is_hw_offload;
bool thread_is_rcu;
thread_is_hw_offload = !strncmp(get_subprogram_name(),
"hw_offload", strlen("hw_offload"));
thread_is_rcu = !strncmp(get_subprogram_name(), "urcu", strlen("urcu"));
/* Panic if any other thread besides offload and RCU tries
* to initialize their thread ID. */
ovs_assert(thread_is_hw_offload || thread_is_rcu);
if (*netdev_offload_thread_id_get() == OVSTHREAD_ID_UNSET) {
unsigned int id;
if (thread_is_rcu) {
/* RCU will compete with other threads for shared object access.
* Reclamation functions using a thread ID must be thread-safe.
* For that end, and because RCU must consider all potential shared
* objects anyway, its thread-id can be whichever, so return 0.
*/
id = 0;
} else {
/* Only the actual offload threads have their own ID. */
id = atomic_count_inc(&next_id);
}
/* Panic if any offload thread is getting a spurious ID. */
ovs_assert(id < netdev_offload_thread_nb());
return *netdev_offload_thread_id_get() = id;
} else {
return *netdev_offload_thread_id_get();
}
}
void
netdev_ports_flow_flush(const char *dpif_type)
{
struct port_to_netdev_data *data;
ovs_rwlock_rdlock(&port_to_netdev_rwlock);
HMAP_FOR_EACH (data, portno_node, &port_to_netdev) {
if (netdev_get_dpif_type(data->netdev) == dpif_type) {
netdev_flow_flush(data->netdev);
}
}
ovs_rwlock_unlock(&port_to_netdev_rwlock);
}
void
netdev_ports_traverse(const char *dpif_type,
bool (*cb)(struct netdev *, odp_port_t, void *),
void *aux)
{
struct port_to_netdev_data *data;
ovs_rwlock_rdlock(&port_to_netdev_rwlock);
HMAP_FOR_EACH (data, portno_node, &port_to_netdev) {
if (netdev_get_dpif_type(data->netdev) == dpif_type) {
if (cb(data->netdev, data->dpif_port.port_no, aux)) {
break;
}
}
}
ovs_rwlock_unlock(&port_to_netdev_rwlock);
}
struct netdev_flow_dump **
netdev_ports_flow_dump_create(const char *dpif_type, int *ports, bool terse)
{
struct port_to_netdev_data *data;
struct netdev_flow_dump **dumps;
int count = 0;
int i = 0;
ovs_rwlock_rdlock(&port_to_netdev_rwlock);
HMAP_FOR_EACH (data, portno_node, &port_to_netdev) {
if (netdev_get_dpif_type(data->netdev) == dpif_type) {
count++;
}
}
dumps = count ? xzalloc(sizeof *dumps * count) : NULL;
HMAP_FOR_EACH (data, portno_node, &port_to_netdev) {
if (netdev_get_dpif_type(data->netdev) == dpif_type) {
if (netdev_flow_dump_create(data->netdev, &dumps[i], terse)) {
continue;
}
dumps[i]->port = data->dpif_port.port_no;
i++;
}
}
ovs_rwlock_unlock(&port_to_netdev_rwlock);
*ports = i;
return dumps;
}
int
netdev_ports_flow_del(const char *dpif_type, const ovs_u128 *ufid,
struct dpif_flow_stats *stats)
{
struct port_to_netdev_data *data;
ovs_rwlock_rdlock(&port_to_netdev_rwlock);
HMAP_FOR_EACH (data, portno_node, &port_to_netdev) {
if (netdev_get_dpif_type(data->netdev) == dpif_type
&& !netdev_flow_del(data->netdev, ufid, stats)) {
ovs_rwlock_unlock(&port_to_netdev_rwlock);
return 0;
}
}
ovs_rwlock_unlock(&port_to_netdev_rwlock);
return ENOENT;
}
int
netdev_ports_flow_get(const char *dpif_type, struct match *match,
struct nlattr **actions, const ovs_u128 *ufid,
struct dpif_flow_stats *stats,
struct dpif_flow_attrs *attrs, struct ofpbuf *buf)
{
struct port_to_netdev_data *data;
ovs_rwlock_rdlock(&port_to_netdev_rwlock);
HMAP_FOR_EACH (data, portno_node, &port_to_netdev) {
if (netdev_get_dpif_type(data->netdev) == dpif_type
&& !netdev_flow_get(data->netdev, match, actions,
ufid, stats, attrs, buf)) {
ovs_rwlock_unlock(&port_to_netdev_rwlock);
return 0;
}
}
ovs_rwlock_unlock(&port_to_netdev_rwlock);
return ENOENT;
}
static uint32_t
netdev_ports_hash(odp_port_t port, const char *dpif_type)
{
return hash_int(odp_to_u32(port), hash_pointer(dpif_type, 0));
}
static struct port_to_netdev_data *
netdev_ports_lookup(odp_port_t port_no, const char *dpif_type)
OVS_REQ_RDLOCK(port_to_netdev_rwlock)
{
struct port_to_netdev_data *data;
HMAP_FOR_EACH_WITH_HASH (data, portno_node,
netdev_ports_hash(port_no, dpif_type),
&port_to_netdev) {
if (netdev_get_dpif_type(data->netdev) == dpif_type
&& data->dpif_port.port_no == port_no) {
return data;
}
}
return NULL;
}
int
netdev_ports_insert(struct netdev *netdev, struct dpif_port *dpif_port)
{
const char *dpif_type = netdev_get_dpif_type(netdev);
struct port_to_netdev_data *data;
int ifindex = netdev_get_ifindex(netdev);
ovs_assert(dpif_type);
ovs_rwlock_wrlock(&port_to_netdev_rwlock);
if (netdev_ports_lookup(dpif_port->port_no, dpif_type)) {
ovs_rwlock_unlock(&port_to_netdev_rwlock);
return EEXIST;
}
data = xzalloc(sizeof *data);
data->netdev = netdev_ref(netdev);
dpif_port_clone(&data->dpif_port, dpif_port);
if (ifindex >= 0) {
data->ifindex = ifindex;
ovs_rwlock_wrlock(&ifindex_to_port_rwlock);
hmap_insert(&ifindex_to_port, &data->ifindex_node, ifindex);
ovs_rwlock_unlock(&ifindex_to_port_rwlock);
} else {
data->ifindex = -1;
}
hmap_insert(&port_to_netdev, &data->portno_node,
netdev_ports_hash(dpif_port->port_no, dpif_type));
ovs_rwlock_unlock(&port_to_netdev_rwlock);
netdev_init_flow_api(netdev);
return 0;
}
struct netdev *
netdev_ports_get(odp_port_t port_no, const char *dpif_type)
{
struct port_to_netdev_data *data;
struct netdev *ret = NULL;
ovs_rwlock_rdlock(&port_to_netdev_rwlock);
data = netdev_ports_lookup(port_no, dpif_type);
if (data) {
ret = netdev_ref(data->netdev);
}
ovs_rwlock_unlock(&port_to_netdev_rwlock);
return ret;
}
int
netdev_ports_remove(odp_port_t port_no, const char *dpif_type)
{
struct port_to_netdev_data *data;
int ret = ENOENT;
ovs_rwlock_wrlock(&port_to_netdev_rwlock);
data = netdev_ports_lookup(port_no, dpif_type);
if (data) {
dpif_port_destroy(&data->dpif_port);
netdev_close(data->netdev); /* unref and possibly close */
hmap_remove(&port_to_netdev, &data->portno_node);
if (data->ifindex >= 0) {
ovs_rwlock_wrlock(&ifindex_to_port_rwlock);
hmap_remove(&ifindex_to_port, &data->ifindex_node);
ovs_rwlock_unlock(&ifindex_to_port_rwlock);
}
free(data);
ret = 0;
}
ovs_rwlock_unlock(&port_to_netdev_rwlock);
return ret;
}
int
netdev_ports_get_n_flows(const char *dpif_type, odp_port_t port_no,
uint64_t *n_flows)
{
struct port_to_netdev_data *data;
int ret = EOPNOTSUPP;
ovs_rwlock_rdlock(&port_to_netdev_rwlock);
data = netdev_ports_lookup(port_no, dpif_type);
if (data) {
uint64_t thread_n_flows[MAX_OFFLOAD_THREAD_NB] = {0};
unsigned int tid;
ret = netdev_flow_get_n_flows(data->netdev, thread_n_flows);
*n_flows = 0;
if (!ret) {
for (tid = 0; tid < netdev_offload_thread_nb(); tid++) {
*n_flows += thread_n_flows[tid];
}
}
}
ovs_rwlock_unlock(&port_to_netdev_rwlock);
return ret;
}
odp_port_t
netdev_ifindex_to_odp_port(int ifindex)
{
struct port_to_netdev_data *data;
odp_port_t ret = 0;
ovs_rwlock_rdlock(&ifindex_to_port_rwlock);
HMAP_FOR_EACH_WITH_HASH (data, ifindex_node, ifindex, &ifindex_to_port) {
if (data->ifindex == ifindex) {
ret = data->dpif_port.port_no;
break;
}
}
ovs_rwlock_unlock(&ifindex_to_port_rwlock);
return ret;
}
static bool netdev_offload_rebalance_policy = false;
bool
netdev_is_offload_rebalance_policy_enabled(void)
{
return netdev_offload_rebalance_policy;
}
static void
netdev_ports_flow_init(void)
{
struct port_to_netdev_data *data;
ovs_rwlock_rdlock(&port_to_netdev_rwlock);
HMAP_FOR_EACH (data, portno_node, &port_to_netdev) {
netdev_init_flow_api(data->netdev);
}
ovs_rwlock_unlock(&port_to_netdev_rwlock);
}
void
netdev_set_flow_api_enabled(const struct smap *ovs_other_config)
{
if (smap_get_bool(ovs_other_config, "hw-offload", false)) {
static struct ovsthread_once once = OVSTHREAD_ONCE_INITIALIZER;
if (ovsthread_once_start(&once)) {
netdev_flow_api_enabled = true;
offload_thread_nb = smap_get_ullong(ovs_other_config,
"n-offload-threads",
DEFAULT_OFFLOAD_THREAD_NB);
if (offload_thread_nb > MAX_OFFLOAD_THREAD_NB) {
VLOG_WARN("netdev: Invalid number of threads requested: %u",
offload_thread_nb);
offload_thread_nb = DEFAULT_OFFLOAD_THREAD_NB;
}
if (smap_get(ovs_other_config, "n-offload-threads")) {
VLOG_INFO("netdev: Flow API Enabled, using %u thread%s",
offload_thread_nb,
offload_thread_nb > 1 ? "s" : "");
} else {
VLOG_INFO("netdev: Flow API Enabled");
}
#ifdef __linux__
tc_set_policy(smap_get_def(ovs_other_config, "tc-policy",
TC_POLICY_DEFAULT));
#endif
if (smap_get_bool(ovs_other_config, "offload-rebalance", false)) {
netdev_offload_rebalance_policy = true;
}
netdev_ports_flow_init();
ovsthread_once_done(&once);
}
}
}
|
10f0358ed9911ca76c1ad69d3926be76b92a7d34
|
192f6a4c9d934be58bca0e610ec1a75e7777fcd1
|
/include/parrot/cclass.h
|
b4293a651ba1ac8ad9befd22bac9179d3fc924ff
|
[
"Artistic-2.0"
] |
permissive
|
parrot/parrot
|
39a74fbb015829cef901211d6d173b71eea475ea
|
f89a111c06ad0367817c52fda6ff5c24165c005b
|
refs/heads/master
| 2023-07-20T07:41:40.386067
| 2021-08-25T17:59:15
| 2021-08-25T17:59:15
| 1,071,734
| 450
| 134
| null | 2016-11-09T10:57:41
| 2010-11-11T15:14:10
|
C
|
UTF-8
|
C
| false
| false
| 1,528
|
h
|
cclass.h
|
/*
* Copyright (C) 2005-2007, Parrot Foundation.
*/
/* cclass.h
*
*
* Parrot character classes
*/
#ifndef PARROT_CCLASS_H_GUARD
#define PARROT_CCLASS_H_GUARD
/* &gen_from_enum(cclass.pasm) subst(s/enum_cclass_(\w+)/uc("CCLASS_$1")/e) */
typedef enum { /* ASCII characters matching this class: */
enum_cclass_any = 0xffff, /* all */
enum_cclass_none = 0x0000, /* none */
enum_cclass_uppercase = 0x0001, /* A-Z */
enum_cclass_lowercase = 0x0002, /* a-z */
enum_cclass_alphabetic = 0x0004, /* a-z, A-Z */
enum_cclass_numeric = 0x0008, /* 0-9 */
enum_cclass_hexadecimal = 0x0010, /* 0-9, a-f, A-F */
enum_cclass_whitespace = 0x0020, /* ' ', '\f', '\n', '\r', '\t', '\v' */
enum_cclass_printing = 0x0040, /* any printable character including space */
enum_cclass_graphical = 0x0080, /* any printable character except space */
enum_cclass_blank = 0x0100, /* ' ', '\t' */
enum_cclass_control = 0x0200, /* control characters */
enum_cclass_punctuation = 0x0400, /* all except ' ', a-z, A-Z, 0-9 */
enum_cclass_alphanumeric = 0x0800, /* a-z, A-Z, 0-9 */
enum_cclass_newline = 0x1000, /* '\n', '\r' */
enum_cclass_word = 0x2000 /* a-z, A-Z, 0-9, '_'*/
} PARROT_CCLASS_FLAGS;
/* &end_gen */
#endif /* PARROT_CCLASS_H_GUARD */
/*
* Local variables:
* c-file-style: "parrot"
* End:
* vim: expandtab shiftwidth=4 cinoptions='\:2=2' :
*/
|
2fd1759a2adcd78b6298a7b1637be6f9e16572d4
|
e8c76797b194bce6702adf9721a96c2b440efd5c
|
/include/ap_regex.h
|
72c3743e8773bc8ef528f716e746c73f06a20e9a
|
[
"Apache-2.0",
"LicenseRef-scancode-unknown-license-reference",
"LicenseRef-scancode-public-domain",
"LicenseRef-scancode-zeusbench",
"BSD-3-Clause",
"RSA-MD",
"LicenseRef-scancode-rsa-1990",
"Beerware",
"LicenseRef-scancode-other-permissive",
"Spencer-94",
"metamail",
"LicenseRef-scancode-rsa-md4",
"HPND-sell-variant"
] |
permissive
|
apache/httpd
|
86bfac3d6e2e9b48f5bfca5be7ec616fa9b14e9a
|
b9e029c8036fd036281ac266010db91aed6079b2
|
refs/heads/trunk
| 2023-09-04T07:18:59.681233
| 2023-08-30T12:56:11
| 2023-08-30T12:56:11
| 205,423
| 3,159
| 1,329
|
Apache-2.0
| 2023-09-11T13:50:41
| 2009-05-20T02:02:59
|
C
|
UTF-8
|
C
| false
| false
| 11,546
|
h
|
ap_regex.h
|
/* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The ASF licenses this file to You under the Apache License, Version 2.0
* (the "License"); you may not use this file except in compliance with
* the License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/* This code is based on pcreposix.h from the PCRE Library distribution,
* as originally written by Philip Hazel <ph10@cam.ac.uk>, and forked by
* the Apache HTTP Server project to provide POSIX-style regex function
* wrappers around underlying PCRE library functions for httpd.
*
* The original source file pcreposix.h is copyright and licensed as follows;
Copyright (c) 1997-2004 University of Cambridge
-----------------------------------------------------------------------------
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
* Neither the name of the University of Cambridge nor the names of its
contributors may be used to endorse or promote products derived from
this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
-----------------------------------------------------------------------------
*/
/**
* @file ap_regex.h
* @brief Apache Regex defines
*/
#ifndef AP_REGEX_H
#define AP_REGEX_H
#include "apr.h"
/* Allow for C++ users */
#ifdef __cplusplus
extern "C" {
#endif
/* Options for ap_regcomp, ap_regexec, and ap_rxplus versions: */
#define AP_REG_ICASE 0x01 /**< use a case-insensitive match */
#define AP_REG_NEWLINE 0x02 /**< don't match newlines against '.' etc */
#define AP_REG_NOTBOL 0x04 /**< ^ will not match against start-of-string */
#define AP_REG_NOTEOL 0x08 /**< $ will not match against end-of-string */
#define AP_REG_EXTENDED (0) /**< unused */
#define AP_REG_NOSUB (0) /**< unused */
#define AP_REG_MULTI 0x10 /**< perl's /g (needs fixing) */
#define AP_REG_NOMEM 0x20 /**< nomem in our code */
#define AP_REG_DOTALL 0x40 /**< perl's /s flag */
#define AP_REG_NOTEMPTY 0x080 /**< Empty match not valid */
#define AP_REG_ANCHORED 0x100 /**< Match at the first position */
#define AP_REG_DOLLAR_ENDONLY 0x200 /**< '$' matches at end of subject string only */
#define AP_REG_NO_DEFAULT 0x400 /**< Don't implicitely add AP_REG_DEFAULT options */
#define AP_REG_MATCH "MATCH_" /**< suggested prefix for ap_regname */
#define AP_REG_DEFAULT (AP_REG_DOTALL|AP_REG_DOLLAR_ENDONLY)
/* Arguments for ap_pcre_version_string */
enum {
AP_REG_PCRE_COMPILED = 0, /** PCRE version used during program compilation */
AP_REG_PCRE_LOADED /** PCRE version loaded at runtime */
};
/* Error values: */
enum {
AP_REG_ASSERT = 1, /** internal error ? */
AP_REG_ESPACE, /** failed to get memory */
AP_REG_INVARG, /** invalid argument */
AP_REG_NOMATCH /** match failed */
};
/* The structure representing a compiled regular expression. */
typedef struct {
void *re_pcre;
int re_nsub;
apr_size_t re_erroffset;
} ap_regex_t;
/* The structure in which a captured offset is returned. */
typedef struct {
int rm_so;
int rm_eo;
} ap_regmatch_t;
/* The functions */
/**
* Return PCRE version string.
* @param which Either AP_REG_PCRE_COMPILED (PCRE version used
* during program compilation) or AP_REG_PCRE_LOADED
* (PCRE version used at runtime)
* @return The PCRE version string
*/
AP_DECLARE(const char *) ap_pcre_version_string(int which);
/**
* Get default compile flags
* @return Bitwise OR of AP_REG_* flags
*/
AP_DECLARE(int) ap_regcomp_get_default_cflags(void);
/**
* Set default compile flags
* @param cflags Bitwise OR of AP_REG_* flags
*/
AP_DECLARE(void) ap_regcomp_set_default_cflags(int cflags);
/**
* Get the AP_REG_* corresponding to the string.
* @param name The name (i.e. AP_REG_<name>)
* @return The AP_REG_*, or zero if the string is unknown
*
*/
AP_DECLARE(int) ap_regcomp_default_cflag_by_name(const char *name);
/**
* Compile a regular expression.
* @param preg Returned compiled regex
* @param regex The regular expression string
* @param cflags Bitwise OR of AP_REG_* flags (ICASE and NEWLINE supported,
* other flags are ignored)
* @return Zero on success or non-zero on error
*/
AP_DECLARE(int) ap_regcomp(ap_regex_t *preg, const char *regex, int cflags);
/**
* Match a NUL-terminated string against a pre-compiled regex.
* @param preg The pre-compiled regex
* @param string The string to match
* @param nmatch Provide information regarding the location of any matches
* @param pmatch Provide information regarding the location of any matches
* @param eflags Bitwise OR of AP_REG_* flags (NOTBOL and NOTEOL supported,
* other flags are ignored)
* @return 0 for successful match, \p AP_REG_NOMATCH otherwise
*/
AP_DECLARE(int) ap_regexec(const ap_regex_t *preg, const char *string,
apr_size_t nmatch, ap_regmatch_t *pmatch, int eflags);
/**
* Match a string with given length against a pre-compiled regex. The string
* does not need to be NUL-terminated.
* @param preg The pre-compiled regex
* @param buff The string to match
* @param len Length of the string to match
* @param nmatch Provide information regarding the location of any matches
* @param pmatch Provide information regarding the location of any matches
* @param eflags Bitwise OR of AP_REG_* flags (NOTBOL and NOTEOL supported,
* other flags are ignored)
* @return 0 for successful match, AP_REG_NOMATCH otherwise
*/
AP_DECLARE(int) ap_regexec_len(const ap_regex_t *preg, const char *buff,
apr_size_t len, apr_size_t nmatch,
ap_regmatch_t *pmatch, int eflags);
/**
* Return the error code returned by regcomp or regexec into error messages
* @param errcode the error code returned by regexec or regcomp
* @param preg The precompiled regex
* @param errbuf A buffer to store the error in
* @param errbuf_size The size of the buffer
*/
AP_DECLARE(apr_size_t) ap_regerror(int errcode, const ap_regex_t *preg,
char *errbuf, apr_size_t errbuf_size);
/**
* Return an array of named regex backreferences
* @param preg The precompiled regex
* @param names The array to which the names will be added
* @param prefix An optional prefix to add to the returned names. AP_REG_MATCH
* is the recommended prefix.
* @param upper If non zero, uppercase the names
*/
AP_DECLARE(int) ap_regname(const ap_regex_t *preg,
apr_array_header_t *names, const char *prefix,
int upper);
/** Destroy a pre-compiled regex.
* @param preg The pre-compiled regex to free.
*/
AP_DECLARE(void) ap_regfree(ap_regex_t *preg);
/* ap_rxplus: higher-level regexps */
typedef struct {
ap_regex_t rx;
apr_uint32_t flags;
const char *subs;
const char *match;
apr_size_t nmatch;
ap_regmatch_t *pmatch;
} ap_rxplus_t;
/**
* Compile a pattern into a regexp.
* supports perl-like formats
* match-string
* /match-string/flags
* s/match-string/replacement-string/flags
* Intended to support more perl-like stuff as and when round tuits happen
* match-string is anything supported by ap_regcomp
* replacement-string is a substitution string as supported in ap_pregsub
* flags should correspond with perl syntax: treat failure to do so as a bug
* (documentation TBD)
* @param pool Pool to allocate from
* @param pattern Pattern to compile
* @return Compiled regexp, or NULL in case of compile/syntax error
*/
AP_DECLARE(ap_rxplus_t*) ap_rxplus_compile(apr_pool_t *pool, const char *pattern);
/**
* Apply a regexp operation to a string.
* @param pool Pool to allocate from
* @param rx The regex match to apply
* @param pattern The string to apply it to
* NOTE: This MUST be kept in scope to use regexp memory
* @param newpattern The modified string (ignored if the operation doesn't
* modify the string)
* @return Number of times a match happens. Normally 0 (no match) or 1
* (match found), but may be greater if a transforming pattern
* is applied with the 'g' flag.
*/
AP_DECLARE(int) ap_rxplus_exec(apr_pool_t *pool, ap_rxplus_t *rx,
const char *pattern, char **newpattern);
#ifdef DOXYGEN
/**
* Number of matches in the regexp operation's memory
* This may be 0 if no match is in memory, or up to nmatch from compilation
* @param rx The regexp
* @return Number of matches in memory
*/
AP_DECLARE(int) ap_rxplus_nmatch(ap_rxplus_t *rx);
#else
#define ap_rxplus_nmatch(rx) (((rx)->match != NULL) ? (rx)->nmatch : 0)
#endif
/**
* Get a pointer to a match from regex memory
* NOTE: this relies on the match pattern from the last call to
* ap_rxplus_exec still being valid (i.e. not freed or out-of-scope)
* @param rx The regexp
* @param n The match number to retrieve (must be between 0 and nmatch)
* @param len Returns the length of the match.
* @param match Returns the match pattern
*/
AP_DECLARE(void) ap_rxplus_match(ap_rxplus_t *rx, int n, int *len,
const char **match);
/**
* Get a match from regex memory in a string copy
* NOTE: this relies on the match pattern from the last call to
* ap_rxplus_exec still being valid (i.e. not freed or out-of-scope)
* @param pool Pool to allocate from
* @param rx The regexp
* @param n The match number to retrieve (must be between 0 and nmatch)
* @return The matched string
*/
AP_DECLARE(char*) ap_rxplus_pmatch(apr_pool_t *pool, ap_rxplus_t *rx, int n);
#ifdef __cplusplus
} /* extern "C" */
#endif
#endif /* AP_REGEX_H */
|
df56fb1117af471b57ee04ef86a882f47dd05f66
|
badb70a0b235c98ac034cfe5b4bfafda36647831
|
/Include/Acidanthera/Protocol/HdaIo.h
|
8187aea85aa907f2fc248a885e201bed8fa9aa1a
|
[
"BSD-3-Clause"
] |
permissive
|
acidanthera/OpenCorePkg
|
f34a7d67b22c74fb5ab559e48519e5f5855b6751
|
1d5b1736fe5a5ef7662b5c076c6d11aac96fd5d6
|
refs/heads/master
| 2023-08-30T21:03:02.993659
| 2023-08-28T23:30:43
| 2023-08-28T23:30:43
| 179,354,282
| 13,212
| 2,999
|
BSD-3-Clause
| 2023-09-10T18:29:53
| 2019-04-03T19:14:29
|
C
|
UTF-8
|
C
| false
| false
| 6,468
|
h
|
HdaIo.h
|
/*
* File: HdaIo.h
*
* Copyright (c) 2018 John Davis
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*/
#ifndef EFI_HDA_IO_H
#define EFI_HDA_IO_H
#include <Uefi.h>
#include <Protocol/DevicePath.h>
//
// HDA I/O protocol.
//
//
// HDA I/O protocol GUID.
//
#define EFI_HDA_IO_PROTOCOL_GUID \
{ 0xA090D7F9, 0xB50A, 0x4EA1, \
{ 0xBD, 0xE9, 0x1A, 0xA5, 0xE9, 0x81, 0x2F, 0x45 } }
typedef struct EFI_HDA_IO_PROTOCOL_ EFI_HDA_IO_PROTOCOL;
/**
Stream type.
**/
typedef enum {
EfiHdaIoTypeInput,
EfiHdaIoTypeOutput,
EfiHdaIoTypeMaximum
} EFI_HDA_IO_PROTOCOL_TYPE;
/**
Verb list structure.
**/
typedef struct {
UINT32 Count;
UINT32 *Verbs;
UINT32 *Responses;
} EFI_HDA_IO_VERB_LIST;
/**
Callback function.
**/
typedef
VOID
(EFIAPI *EFI_HDA_IO_STREAM_CALLBACK)(
IN EFI_HDA_IO_PROTOCOL_TYPE Type,
IN VOID *Context1,
IN VOID *Context2,
IN VOID *Context3
);
/**
Retrieves this codec's address.
@param[in] This A pointer to the HDA_IO_PROTOCOL instance.
@param[out] CodecAddress The codec's address.
@retval EFI_SUCCESS The codec's address was returned.
@retval EFI_INVALID_PARAMETER One or more parameters are invalid.
**/
typedef
EFI_STATUS
(EFIAPI *EFI_HDA_IO_GET_ADDRESS)(
IN EFI_HDA_IO_PROTOCOL *This,
OUT UINT8 *CodecAddress
);
/**
Sends a single command to the codec.
@param[in] This A pointer to the HDA_IO_PROTOCOL instance.
@param[in] Node The destination node.
@param[in] Verb The verb to send.
@param[out] Response The response received.
@retval EFI_SUCCESS The verb was sent successfully and a response received.
@retval EFI_INVALID_PARAMETER One or more parameters are invalid.
**/
typedef
EFI_STATUS
(EFIAPI *EFI_HDA_IO_SEND_COMMAND)(
IN EFI_HDA_IO_PROTOCOL *This,
IN UINT8 Node,
IN UINT32 Verb,
OUT UINT32 *Response
);
/**
Sends a set of commands to the codec.
@param[in] This A pointer to the HDA_IO_PROTOCOL instance.
@param[in] Node The destination node.
@param[in] Verbs The verbs to send. Responses will be delievered in the same list.
@retval EFI_SUCCESS The verbs were sent successfully and all responses received.
@retval EFI_INVALID_PARAMETER One or more parameters are invalid.
**/
typedef
EFI_STATUS
(EFIAPI *EFI_HDA_IO_SEND_COMMANDS)(
IN EFI_HDA_IO_PROTOCOL *This,
IN UINT8 Node,
IN OUT EFI_HDA_IO_VERB_LIST *Verbs
);
typedef
EFI_STATUS
(EFIAPI *EFI_HDA_IO_SETUP_STREAM)(
IN EFI_HDA_IO_PROTOCOL *This,
IN EFI_HDA_IO_PROTOCOL_TYPE Type,
IN UINT16 Format,
OUT UINT8 *StreamId
);
typedef
EFI_STATUS
(EFIAPI *EFI_HDA_IO_CLOSE_STREAM)(
IN EFI_HDA_IO_PROTOCOL *This,
IN EFI_HDA_IO_PROTOCOL_TYPE Type
);
typedef
EFI_STATUS
(EFIAPI *EFI_HDA_IO_GET_STREAM)(
IN EFI_HDA_IO_PROTOCOL *This,
IN EFI_HDA_IO_PROTOCOL_TYPE Type,
OUT BOOLEAN *State
);
typedef
EFI_STATUS
(EFIAPI *EFI_HDA_IO_START_STREAM)(
IN EFI_HDA_IO_PROTOCOL *This,
IN EFI_HDA_IO_PROTOCOL_TYPE Type,
IN VOID *Buffer,
IN UINTN BufferLength,
IN UINTN BufferPosition OPTIONAL,
IN EFI_HDA_IO_STREAM_CALLBACK Callback OPTIONAL,
IN VOID *Context1 OPTIONAL,
IN VOID *Context2 OPTIONAL,
IN VOID *Context3 OPTIONAL
);
typedef
EFI_STATUS
(EFIAPI *EFI_HDA_IO_STOP_STREAM)(
IN EFI_HDA_IO_PROTOCOL *This,
IN EFI_HDA_IO_PROTOCOL_TYPE Type
);
/**
HDA I/O protocol structure.
**/
struct EFI_HDA_IO_PROTOCOL_ {
EFI_HDA_IO_GET_ADDRESS GetAddress;
EFI_HDA_IO_SEND_COMMAND SendCommand;
EFI_HDA_IO_SEND_COMMANDS SendCommands;
EFI_HDA_IO_SETUP_STREAM SetupStream;
EFI_HDA_IO_CLOSE_STREAM CloseStream;
EFI_HDA_IO_GET_STREAM GetStream;
EFI_HDA_IO_START_STREAM StartStream;
EFI_HDA_IO_STOP_STREAM StopStream;
};
extern EFI_GUID gEfiHdaIoProtocolGuid;
//
// HDA I/O Device Path protocol.
//
/**
HDA I/O Device Path GUID.
**/
#define EFI_HDA_IO_DEVICE_PATH_GUID \
{ 0xA9003FEB, 0xD806, 0x41DB, \
{ 0xA4, 0x91, 0x54, 0x05, 0xFE, 0xEF, 0x46, 0xC3 } }
/**
HDA I/O Device Path structure.
**/
typedef struct {
///
/// Vendor-specific device path fields.
///
EFI_DEVICE_PATH_PROTOCOL Header;
EFI_GUID Guid;
///
/// Codec address.
///
UINT32 Address;
} EFI_HDA_IO_DEVICE_PATH;
STATIC_ASSERT (
sizeof (EFI_HDA_IO_DEVICE_PATH)
== sizeof (EFI_DEVICE_PATH_PROTOCOL) + sizeof (EFI_GUID) + sizeof (UINT32),
"Unexpected EFI_HDA_IO_DEVICE_PATH size"
);
extern EFI_GUID gEfiHdaIoDevicePathGuid;
/**
Template for HDA I/O Device Path protocol.
**/
#define EFI_HDA_IO_DEVICE_PATH_TEMPLATE \
{ \
{ \
MESSAGING_DEVICE_PATH, \
MSG_VENDOR_DP, \
{ \
(UINT8) (sizeof (EFI_HDA_IO_DEVICE_PATH) & 0xFFU), \
(UINT8) ((sizeof (EFI_HDA_IO_DEVICE_PATH) >> 8U) & 0xFFU) \
} \
}, \
gEfiHdaIoDevicePathGuid, \
0 \
}
#endif // EFI_HDA_IO_H
|
307af784dd67fdc395a2d69f5a6ffff43fd3991d
|
a870f567254204100a568013846b72cc457ae969
|
/game2048/expectimax/2048.h
|
2f0827f884aaf92e70029d49c618876bdfe29f62
|
[
"Apache-2.0"
] |
permissive
|
duducheng/2048-api
|
b3ed8a30f6d8e7a4e67c3d1f5453a360fe509bc1
|
bc5ca89ae67b846f7ad6c3c658f042abc541e799
|
refs/heads/master
| 2021-11-25T13:07:49.916850
| 2021-10-29T21:10:49
| 2021-10-29T21:10:49
| 150,580,220
| 127
| 117
|
Apache-2.0
| 2020-11-28T12:56:22
| 2018-09-27T12:04:02
|
Jupyter Notebook
|
UTF-8
|
C
| false
| false
| 1,820
|
h
|
2048.h
|
#include <stdlib.h>
#include "platdefs.h"
/* The fundamental trick: the 4x4 board is represented as a 64-bit word,
* with each board square packed into a single 4-bit nibble.
*
* The maximum possible board value that can be supported is 32768 (2^15), but
* this is a minor limitation as achieving 65536 is highly unlikely under normal circumstances.
*
* The space and computation savings from using this representation should be significant.
*
* The nibble shift can be computed as (r,c) -> shift (4*r + c). That is, (0,0) is the LSB.
*/
typedef uint64_t board_t;
typedef uint16_t row_t;
//store the depth at which the heuristic was recorded as well as the actual heuristic
struct trans_table_entry_t{
uint8_t depth;
float heuristic;
};
static const board_t ROW_MASK = 0xFFFFULL;
static const board_t COL_MASK = 0x000F000F000F000FULL;
static inline void print_board(board_t board) {
int i,j;
for(i=0; i<4; i++) {
for(j=0; j<4; j++) {
uint8_t powerVal = (board) & 0xf;
printf("%6u", (powerVal == 0) ? 0 : 1 << powerVal);
board >>= 4;
}
printf("\n");
}
printf("\n");
}
static inline board_t unpack_col(row_t row) {
board_t tmp = row;
return (tmp | (tmp << 12ULL) | (tmp << 24ULL) | (tmp << 36ULL)) & COL_MASK;
}
static inline row_t reverse_row(row_t row) {
return (row >> 12) | ((row >> 4) & 0x00F0) | ((row << 4) & 0x0F00) | (row << 12);
}
/* Functions */
#ifdef __cplusplus
extern "C" {
#endif
DLL_PUBLIC void init_tables();
typedef int (*get_move_func_t)(board_t);
DLL_PUBLIC float score_toplevel_move(board_t board, int move);
DLL_PUBLIC int find_best_move(board_t board);
DLL_PUBLIC int ask_for_move(board_t board);
DLL_PUBLIC void play_game(get_move_func_t get_move);
#ifdef __cplusplus
}
#endif
|
5495fefcd8abdf224141d18fd9a18216b9cfc931
|
8380b5eb12e24692e97480bfa8939a199d067bce
|
/Carberp Botnet/source - absource/pro/all source/BlackJoeWhiteJoe/include/nspr/obsolete/prsem.h
|
bdff9d4ff7aaba65062fb94c6e01347f21ff9582
|
[
"LicenseRef-scancode-warranty-disclaimer"
] |
no_license
|
RamadhanAmizudin/malware
|
788ee745b5bb23b980005c2af08f6cb8763981c2
|
62d0035db6bc9aa279b7c60250d439825ae65e41
|
refs/heads/master
| 2023-02-05T13:37:18.909646
| 2023-01-26T08:43:18
| 2023-01-26T08:43:18
| 53,407,812
| 873
| 291
| null | 2023-01-26T08:43:19
| 2016-03-08T11:44:21
|
C++
|
UTF-8
|
C
| false
| false
| 3,675
|
h
|
prsem.h
|
/* -*- Mode: C++; tab-width: 4; indent-tabs-mode: nil; c-basic-offset: 2 -*- */
/* ***** BEGIN LICENSE BLOCK *****
* Version: MPL 1.1/GPL 2.0/LGPL 2.1
*
* The contents of this file are subject to the Mozilla Public License Version
* 1.1 (the "License"); you may not use this file except in compliance with
* the License. You may obtain a copy of the License at
* http://www.mozilla.org/MPL/
*
* Software distributed under the License is distributed on an "AS IS" basis,
* WITHOUT WARRANTY OF ANY KIND, either express or implied. See the License
* for the specific language governing rights and limitations under the
* License.
*
* The Original Code is the Netscape Portable Runtime (NSPR).
*
* The Initial Developer of the Original Code is
* Netscape Communications Corporation.
* Portions created by the Initial Developer are Copyright (C) 1998-2000
* the Initial Developer. All Rights Reserved.
*
* Contributor(s):
*
* Alternatively, the contents of this file may be used under the terms of
* either the GNU General Public License Version 2 or later (the "GPL"), or
* the GNU Lesser General Public License Version 2.1 or later (the "LGPL"),
* in which case the provisions of the GPL or the LGPL are applicable instead
* of those above. If you wish to allow use of your version of this file only
* under the terms of either the GPL or the LGPL, and not to allow others to
* use your version of this file under the terms of the MPL, indicate your
* decision by deleting the provisions above and replace them with the notice
* and other provisions required by the GPL or the LGPL. If you do not delete
* the provisions above, a recipient may use your version of this file under
* the terms of any one of the MPL, the GPL or the LGPL.
*
* ***** END LICENSE BLOCK ***** */
#ifndef prsem_h___
#define prsem_h___
/*
** API for counting semaphores. Semaphores are counting synchronizing
** variables based on a lock and a condition variable. They are lightweight
** contention control for a given count of resources.
*/
#include "prtypes.h"
PR_BEGIN_EXTERN_C
typedef struct PRSemaphore PRSemaphore;
/*
** Create a new semaphore object.
*/
NSPR_API(PRSemaphore*) PR_NewSem(PRUintn value);
/*
** Destroy the given semaphore object.
**
*/
NSPR_API(void) PR_DestroySem(PRSemaphore *sem);
/*
** Wait on a Semaphore.
**
** This routine allows a calling thread to wait or proceed depending upon the
** state of the semahore sem. The thread can proceed only if the counter value
** of the semaphore sem is currently greater than 0. If the value of semaphore
** sem is positive, it is decremented by one and the routine returns immediately
** allowing the calling thread to continue. If the value of semaphore sem is 0,
** the calling thread blocks awaiting the semaphore to be released by another
** thread.
**
** This routine can return PR_PENDING_INTERRUPT if the waiting thread
** has been interrupted.
*/
NSPR_API(PRStatus) PR_WaitSem(PRSemaphore *sem);
/*
** This routine increments the counter value of the semaphore. If other threads
** are blocked for the semaphore, then the scheduler will determine which ONE
** thread will be unblocked.
*/
NSPR_API(void) PR_PostSem(PRSemaphore *sem);
/*
** Returns the value of the semaphore referenced by sem without affecting
** the state of the semaphore. The value represents the semaphore vaule
F** at the time of the call, but may not be the actual value when the
** caller inspects it.
*/
NSPR_API(PRUintn) PR_GetValueSem(PRSemaphore *sem);
PR_END_EXTERN_C
#endif /* prsem_h___ */
|
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7eaf54a78c9e2117247cb2ab6d3a0c20719ba700
|
/SOFTWARE/A64-TERES/linux-a64/drivers/staging/vt6655/80211mgr.c
|
4cb26f3faf26e5aeb1597d480cc898bd8a0b0303
|
[
"Linux-syscall-note",
"GPL-2.0-only",
"GPL-1.0-or-later",
"LicenseRef-scancode-free-unknown",
"Apache-2.0"
] |
permissive
|
OLIMEX/DIY-LAPTOP
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ae82f4ee79c641d9aee444db9a75f3f6709afa92
|
a3fafd1309135650bab27f5eafc0c32bc3ca74ee
|
refs/heads/rel3
| 2023-08-04T01:54:19.483792
| 2023-04-03T07:18:12
| 2023-04-03T07:18:12
| 80,094,055
| 507
| 92
|
Apache-2.0
| 2023-04-03T07:05:59
| 2017-01-26T07:25:50
|
C
|
UTF-8
|
C
| false
| false
| 23,644
|
c
|
80211mgr.c
|
/*
* Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
* All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* File: 80211mgr.c
*
* Purpose: Handles the 802.11 management support functions
*
* Author: Lyndon Chen
*
* Date: May 8, 2002
*
* Functions:
* vMgrEncodeBeacon - Encode the Beacon frame
* vMgrDecodeBeacon - Decode the Beacon frame
* vMgrEncodeIBSSATIM - Encode the IBSS ATIM frame
* vMgrDecodeIBSSATIM - Decode the IBSS ATIM frame
* vMgrEncodeDisassociation - Encode the Disassociation frame
* vMgrDecodeDisassociation - Decode the Disassociation frame
* vMgrEncodeAssocRequest - Encode the Association request frame
* vMgrDecodeAssocRequest - Decode the Association request frame
* vMgrEncodeAssocResponse - Encode the Association response frame
* vMgrDecodeAssocResponse - Decode the Association response frame
* vMgrEncodeReAssocRequest - Encode the ReAssociation request frame
* vMgrDecodeReAssocRequest - Decode the ReAssociation request frame
* vMgrEncodeProbeRequest - Encode the Probe request frame
* vMgrDecodeProbeRequest - Decode the Probe request frame
* vMgrEncodeProbeResponse - Encode the Probe response frame
* vMgrDecodeProbeResponse - Decode the Probe response frame
* vMgrEncodeAuthen - Encode the Authentication frame
* vMgrDecodeAuthen - Decode the Authentication frame
* vMgrEncodeDeauthen - Encode the DeAuthentication frame
* vMgrDecodeDeauthen - Decode the DeAuthentication frame
* vMgrEncodeReassocResponse - Encode the Reassociation response frame
* vMgrDecodeReassocResponse - Decode the Reassociation response frame
*
* Revision History:
*
*/
#include "tmacro.h"
#include "tether.h"
#include "80211mgr.h"
#include "80211hdr.h"
#include "device.h"
#include "wpa.h"
/*--------------------- Static Definitions -------------------------*/
/*--------------------- Static Classes ----------------------------*/
/*--------------------- Static Variables --------------------------*/
static int msglevel = MSG_LEVEL_INFO;
//static int msglevel =MSG_LEVEL_DEBUG;
/*--------------------- Static Functions --------------------------*/
/*--------------------- Export Variables --------------------------*/
/*--------------------- Export Functions --------------------------*/
/*+
*
* Routine Description:
* Encode Beacon frame body offset
*
* Return Value:
* None.
*
-*/
void
vMgrEncodeBeacon(
PWLAN_FR_BEACON pFrame
)
{
pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
// Fixed Fields
pFrame->pqwTimestamp = (PQWORD)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
+ WLAN_BEACON_OFF_TS);
pFrame->pwBeaconInterval = (unsigned short *)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
+ WLAN_BEACON_OFF_BCN_INT);
pFrame->pwCapInfo = (unsigned short *)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
+ WLAN_BEACON_OFF_CAPINFO);
pFrame->len = WLAN_HDR_ADDR3_LEN + WLAN_BEACON_OFF_SSID;
return;
}
/*+
*
* Routine Description:
* Decode Beacon frame body offset
*
*
* Return Value:
* None.
*
-*/
void
vMgrDecodeBeacon(
PWLAN_FR_BEACON pFrame
)
{
PWLAN_IE pItem;
pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
// Fixed Fields
pFrame->pqwTimestamp = (PQWORD)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
+ WLAN_BEACON_OFF_TS);
pFrame->pwBeaconInterval = (unsigned short *)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
+ WLAN_BEACON_OFF_BCN_INT);
pFrame->pwCapInfo = (unsigned short *)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
+ WLAN_BEACON_OFF_CAPINFO);
// Information elements
pItem = (PWLAN_IE)((unsigned char *)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3)))
+ WLAN_BEACON_OFF_SSID);
while (((unsigned char *)pItem) < (pFrame->pBuf + pFrame->len)) {
switch (pItem->byElementID) {
case WLAN_EID_SSID:
if (pFrame->pSSID == NULL)
pFrame->pSSID = (PWLAN_IE_SSID)pItem;
break;
case WLAN_EID_SUPP_RATES:
if (pFrame->pSuppRates == NULL)
pFrame->pSuppRates = (PWLAN_IE_SUPP_RATES)pItem;
break;
case WLAN_EID_FH_PARMS:
//pFrame->pFHParms = (PWLAN_IE_FH_PARMS)pItem;
break;
case WLAN_EID_DS_PARMS:
if (pFrame->pDSParms == NULL)
pFrame->pDSParms = (PWLAN_IE_DS_PARMS)pItem;
break;
case WLAN_EID_CF_PARMS:
if (pFrame->pCFParms == NULL)
pFrame->pCFParms = (PWLAN_IE_CF_PARMS)pItem;
break;
case WLAN_EID_IBSS_PARMS:
if (pFrame->pIBSSParms == NULL)
pFrame->pIBSSParms = (PWLAN_IE_IBSS_PARMS)pItem;
break;
case WLAN_EID_TIM:
if (pFrame->pTIM == NULL)
pFrame->pTIM = (PWLAN_IE_TIM)pItem;
break;
case WLAN_EID_RSN:
if (pFrame->pRSN == NULL) {
pFrame->pRSN = (PWLAN_IE_RSN)pItem;
}
break;
case WLAN_EID_RSN_WPA:
if (pFrame->pRSNWPA == NULL) {
if (WPAb_Is_RSN((PWLAN_IE_RSN_EXT)pItem) == true)
pFrame->pRSNWPA = (PWLAN_IE_RSN_EXT)pItem;
}
break;
case WLAN_EID_ERP:
if (pFrame->pERP == NULL)
pFrame->pERP = (PWLAN_IE_ERP)pItem;
break;
case WLAN_EID_EXTSUPP_RATES:
if (pFrame->pExtSuppRates == NULL)
pFrame->pExtSuppRates = (PWLAN_IE_SUPP_RATES)pItem;
break;
case WLAN_EID_COUNTRY: //7
if (pFrame->pIE_Country == NULL)
pFrame->pIE_Country = (PWLAN_IE_COUNTRY)pItem;
break;
case WLAN_EID_PWR_CONSTRAINT: //32
if (pFrame->pIE_PowerConstraint == NULL)
pFrame->pIE_PowerConstraint = (PWLAN_IE_PW_CONST)pItem;
break;
case WLAN_EID_CH_SWITCH: //37
if (pFrame->pIE_CHSW == NULL)
pFrame->pIE_CHSW = (PWLAN_IE_CH_SW)pItem;
break;
case WLAN_EID_QUIET: //40
if (pFrame->pIE_Quiet == NULL)
pFrame->pIE_Quiet = (PWLAN_IE_QUIET)pItem;
break;
case WLAN_EID_IBSS_DFS:
if (pFrame->pIE_IBSSDFS == NULL)
pFrame->pIE_IBSSDFS = (PWLAN_IE_IBSS_DFS)pItem;
break;
default:
DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Unrecognized EID=%dd in beacon decode.\n", pItem->byElementID);
break;
}
pItem = (PWLAN_IE)(((unsigned char *)pItem) + 2 + pItem->len);
}
return;
}
/*+
*
* Routine Description:
* Encode IBSS ATIM
*
*
* Return Value:
* None.
*
-*/
void
vMgrEncodeIBSSATIM(
PWLAN_FR_IBSSATIM pFrame
)
{
pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
pFrame->len = WLAN_HDR_ADDR3_LEN;
return;
}
/*+
*
* Routine Description:
* Decode IBSS ATIM
*
*
* Return Value:
* None.
*
-*/
void
vMgrDecodeIBSSATIM(
PWLAN_FR_IBSSATIM pFrame
)
{
pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
return;
}
/*+
*
* Routine Description:
* Encode Disassociation
*
*
* Return Value:
* None.
*
-*/
void
vMgrEncodeDisassociation(
PWLAN_FR_DISASSOC pFrame
)
{
pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
// Fixed Fields
pFrame->pwReason = (unsigned short *)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
+ WLAN_DISASSOC_OFF_REASON);
pFrame->len = WLAN_HDR_ADDR3_LEN + WLAN_DISASSOC_OFF_REASON + sizeof(*(pFrame->pwReason));
return;
}
/*+
*
* Routine Description:
* Decode Disassociation
*
*
* Return Value:
* None.
*
-*/
void
vMgrDecodeDisassociation(
PWLAN_FR_DISASSOC pFrame
)
{
pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
// Fixed Fields
pFrame->pwReason = (unsigned short *)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
+ WLAN_DISASSOC_OFF_REASON);
return;
}
/*+
*
* Routine Description:
* Encode Association Request
*
*
* Return Value:
* None.
*
-*/
void
vMgrEncodeAssocRequest(
PWLAN_FR_ASSOCREQ pFrame
)
{
pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
// Fixed Fields
pFrame->pwCapInfo = (unsigned short *)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
+ WLAN_ASSOCREQ_OFF_CAP_INFO);
pFrame->pwListenInterval = (unsigned short *)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
+ WLAN_ASSOCREQ_OFF_LISTEN_INT);
pFrame->len = WLAN_HDR_ADDR3_LEN + WLAN_ASSOCREQ_OFF_LISTEN_INT + sizeof(*(pFrame->pwListenInterval));
return;
}
/*+
*
* Routine Description: (AP)
* Decode Association Request
*
*
* Return Value:
* None.
*
-*/
void
vMgrDecodeAssocRequest(
PWLAN_FR_ASSOCREQ pFrame
)
{
PWLAN_IE pItem;
pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
// Fixed Fields
pFrame->pwCapInfo = (unsigned short *)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
+ WLAN_ASSOCREQ_OFF_CAP_INFO);
pFrame->pwListenInterval = (unsigned short *)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
+ WLAN_ASSOCREQ_OFF_LISTEN_INT);
// Information elements
pItem = (PWLAN_IE)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
+ WLAN_ASSOCREQ_OFF_SSID);
while (((unsigned char *)pItem) < (pFrame->pBuf + pFrame->len)) {
switch (pItem->byElementID) {
case WLAN_EID_SSID:
if (pFrame->pSSID == NULL)
pFrame->pSSID = (PWLAN_IE_SSID)pItem;
break;
case WLAN_EID_SUPP_RATES:
if (pFrame->pSuppRates == NULL)
pFrame->pSuppRates = (PWLAN_IE_SUPP_RATES)pItem;
break;
case WLAN_EID_RSN:
if (pFrame->pRSN == NULL) {
pFrame->pRSN = (PWLAN_IE_RSN)pItem;
}
break;
case WLAN_EID_RSN_WPA:
if (pFrame->pRSNWPA == NULL) {
if (WPAb_Is_RSN((PWLAN_IE_RSN_EXT)pItem) == true)
pFrame->pRSNWPA = (PWLAN_IE_RSN_EXT)pItem;
}
break;
case WLAN_EID_EXTSUPP_RATES:
if (pFrame->pExtSuppRates == NULL)
pFrame->pExtSuppRates = (PWLAN_IE_SUPP_RATES)pItem;
break;
default:
DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Unrecognized EID=%dd in assocreq decode.\n",
pItem->byElementID);
break;
}
pItem = (PWLAN_IE)(((unsigned char *)pItem) + 2 + pItem->len);
}
return;
}
/*+
*
* Routine Description: (AP)
* Encode Association Response
*
*
* Return Value:
* None.
*
-*/
void
vMgrEncodeAssocResponse(
PWLAN_FR_ASSOCRESP pFrame
)
{
pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
// Fixed Fields
pFrame->pwCapInfo = (unsigned short *)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
+ WLAN_ASSOCRESP_OFF_CAP_INFO);
pFrame->pwStatus = (unsigned short *)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
+ WLAN_ASSOCRESP_OFF_STATUS);
pFrame->pwAid = (unsigned short *)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
+ WLAN_ASSOCRESP_OFF_AID);
pFrame->len = WLAN_HDR_ADDR3_LEN + WLAN_ASSOCRESP_OFF_AID
+ sizeof(*(pFrame->pwAid));
return;
}
/*+
*
* Routine Description:
* Decode Association Response
*
*
* Return Value:
* None.
*
-*/
void
vMgrDecodeAssocResponse(
PWLAN_FR_ASSOCRESP pFrame
)
{
PWLAN_IE pItem;
pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
// Fixed Fields
pFrame->pwCapInfo = (unsigned short *)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
+ WLAN_ASSOCRESP_OFF_CAP_INFO);
pFrame->pwStatus = (unsigned short *)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
+ WLAN_ASSOCRESP_OFF_STATUS);
pFrame->pwAid = (unsigned short *)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
+ WLAN_ASSOCRESP_OFF_AID);
// Information elements
pFrame->pSuppRates = (PWLAN_IE_SUPP_RATES)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
+ WLAN_ASSOCRESP_OFF_SUPP_RATES);
pItem = (PWLAN_IE)(pFrame->pSuppRates);
pItem = (PWLAN_IE)(((unsigned char *)pItem) + 2 + pItem->len);
if ((((unsigned char *)pItem) < (pFrame->pBuf + pFrame->len)) &&
(pItem->byElementID == WLAN_EID_EXTSUPP_RATES)) {
pFrame->pExtSuppRates = (PWLAN_IE_SUPP_RATES)pItem;
DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "pFrame->pExtSuppRates=[%p].\n", pItem);
} else {
pFrame->pExtSuppRates = NULL;
}
return;
}
/*+
*
* Routine Description:
* Encode Reassociation Request
*
*
* Return Value:
* None.
*
-*/
void
vMgrEncodeReassocRequest(
PWLAN_FR_REASSOCREQ pFrame
)
{
pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
// Fixed Fields
pFrame->pwCapInfo = (unsigned short *)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
+ WLAN_REASSOCREQ_OFF_CAP_INFO);
pFrame->pwListenInterval = (unsigned short *)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
+ WLAN_REASSOCREQ_OFF_LISTEN_INT);
pFrame->pAddrCurrAP = (PIEEE_ADDR)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
+ WLAN_REASSOCREQ_OFF_CURR_AP);
pFrame->len = WLAN_HDR_ADDR3_LEN + WLAN_REASSOCREQ_OFF_CURR_AP + sizeof(*(pFrame->pAddrCurrAP));
return;
}
/*+
*
* Routine Description: (AP)
* Decode Reassociation Request
*
*
* Return Value:
* None.
*
-*/
void
vMgrDecodeReassocRequest(
PWLAN_FR_REASSOCREQ pFrame
)
{
PWLAN_IE pItem;
pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
// Fixed Fields
pFrame->pwCapInfo = (unsigned short *)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
+ WLAN_REASSOCREQ_OFF_CAP_INFO);
pFrame->pwListenInterval = (unsigned short *)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
+ WLAN_REASSOCREQ_OFF_LISTEN_INT);
pFrame->pAddrCurrAP = (PIEEE_ADDR)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
+ WLAN_REASSOCREQ_OFF_CURR_AP);
// Information elements
pItem = (PWLAN_IE)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
+ WLAN_REASSOCREQ_OFF_SSID);
while (((unsigned char *)pItem) < (pFrame->pBuf + pFrame->len)) {
switch (pItem->byElementID) {
case WLAN_EID_SSID:
if (pFrame->pSSID == NULL)
pFrame->pSSID = (PWLAN_IE_SSID)pItem;
break;
case WLAN_EID_SUPP_RATES:
if (pFrame->pSuppRates == NULL)
pFrame->pSuppRates = (PWLAN_IE_SUPP_RATES)pItem;
break;
case WLAN_EID_RSN:
if (pFrame->pRSN == NULL) {
pFrame->pRSN = (PWLAN_IE_RSN)pItem;
}
break;
case WLAN_EID_RSN_WPA:
if (pFrame->pRSNWPA == NULL) {
if (WPAb_Is_RSN((PWLAN_IE_RSN_EXT)pItem) == true)
pFrame->pRSNWPA = (PWLAN_IE_RSN_EXT)pItem;
}
break;
case WLAN_EID_EXTSUPP_RATES:
if (pFrame->pExtSuppRates == NULL)
pFrame->pExtSuppRates = (PWLAN_IE_SUPP_RATES)pItem;
break;
default:
DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Unrecognized EID=%dd in reassocreq decode.\n",
pItem->byElementID);
break;
}
pItem = (PWLAN_IE)(((unsigned char *)pItem) + 2 + pItem->len);
}
return;
}
/*+
*
* Routine Description:
* Encode Probe Request
*
*
* Return Value:
* None.
*
-*/
void
vMgrEncodeProbeRequest(
PWLAN_FR_PROBEREQ pFrame
)
{
pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
pFrame->len = WLAN_HDR_ADDR3_LEN;
return;
}
/*+
*
* Routine Description:
* Decode Probe Request
*
*
* Return Value:
* None.
*
-*/
void
vMgrDecodeProbeRequest(
PWLAN_FR_PROBEREQ pFrame
)
{
PWLAN_IE pItem;
pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
// Information elements
pItem = (PWLAN_IE)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3)));
while (((unsigned char *)pItem) < (pFrame->pBuf + pFrame->len)) {
switch (pItem->byElementID) {
case WLAN_EID_SSID:
if (pFrame->pSSID == NULL)
pFrame->pSSID = (PWLAN_IE_SSID)pItem;
break;
case WLAN_EID_SUPP_RATES:
if (pFrame->pSuppRates == NULL)
pFrame->pSuppRates = (PWLAN_IE_SUPP_RATES)pItem;
break;
case WLAN_EID_EXTSUPP_RATES:
if (pFrame->pExtSuppRates == NULL)
pFrame->pExtSuppRates = (PWLAN_IE_SUPP_RATES)pItem;
break;
default:
DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Bad EID=%dd in probereq\n", pItem->byElementID);
break;
}
pItem = (PWLAN_IE)(((unsigned char *)pItem) + 2 + pItem->len);
}
return;
}
/*+
*
* Routine Description:
* Encode Probe Response
*
*
* Return Value:
* None.
*
-*/
void
vMgrEncodeProbeResponse(
PWLAN_FR_PROBERESP pFrame
)
{
pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
// Fixed Fields
pFrame->pqwTimestamp = (PQWORD)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
+ WLAN_PROBERESP_OFF_TS);
pFrame->pwBeaconInterval = (unsigned short *)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
+ WLAN_PROBERESP_OFF_BCN_INT);
pFrame->pwCapInfo = (unsigned short *)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
+ WLAN_PROBERESP_OFF_CAP_INFO);
pFrame->len = WLAN_HDR_ADDR3_LEN + WLAN_PROBERESP_OFF_CAP_INFO +
sizeof(*(pFrame->pwCapInfo));
return;
}
/*+
*
* Routine Description:
* Decode Probe Response
*
*
* Return Value:
* None.
*
-*/
void
vMgrDecodeProbeResponse(
PWLAN_FR_PROBERESP pFrame
)
{
PWLAN_IE pItem;
pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
// Fixed Fields
pFrame->pqwTimestamp = (PQWORD)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
+ WLAN_PROBERESP_OFF_TS);
pFrame->pwBeaconInterval = (unsigned short *)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
+ WLAN_PROBERESP_OFF_BCN_INT);
pFrame->pwCapInfo = (unsigned short *)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
+ WLAN_PROBERESP_OFF_CAP_INFO);
// Information elements
pItem = (PWLAN_IE)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
+ WLAN_PROBERESP_OFF_SSID);
while (((unsigned char *)pItem) < (pFrame->pBuf + pFrame->len)) {
switch (pItem->byElementID) {
case WLAN_EID_SSID:
if (pFrame->pSSID == NULL)
pFrame->pSSID = (PWLAN_IE_SSID)pItem;
break;
case WLAN_EID_SUPP_RATES:
if (pFrame->pSuppRates == NULL)
pFrame->pSuppRates = (PWLAN_IE_SUPP_RATES)pItem;
break;
case WLAN_EID_FH_PARMS:
break;
case WLAN_EID_DS_PARMS:
if (pFrame->pDSParms == NULL)
pFrame->pDSParms = (PWLAN_IE_DS_PARMS)pItem;
break;
case WLAN_EID_CF_PARMS:
if (pFrame->pCFParms == NULL)
pFrame->pCFParms = (PWLAN_IE_CF_PARMS)pItem;
break;
case WLAN_EID_IBSS_PARMS:
if (pFrame->pIBSSParms == NULL)
pFrame->pIBSSParms = (PWLAN_IE_IBSS_PARMS)pItem;
break;
case WLAN_EID_RSN:
if (pFrame->pRSN == NULL) {
pFrame->pRSN = (PWLAN_IE_RSN)pItem;
}
break;
case WLAN_EID_RSN_WPA:
if (pFrame->pRSNWPA == NULL) {
if (WPAb_Is_RSN((PWLAN_IE_RSN_EXT)pItem) == true)
pFrame->pRSNWPA = (PWLAN_IE_RSN_EXT)pItem;
}
break;
case WLAN_EID_ERP:
if (pFrame->pERP == NULL)
pFrame->pERP = (PWLAN_IE_ERP)pItem;
break;
case WLAN_EID_EXTSUPP_RATES:
if (pFrame->pExtSuppRates == NULL)
pFrame->pExtSuppRates = (PWLAN_IE_SUPP_RATES)pItem;
break;
case WLAN_EID_COUNTRY: //7
if (pFrame->pIE_Country == NULL)
pFrame->pIE_Country = (PWLAN_IE_COUNTRY)pItem;
break;
case WLAN_EID_PWR_CONSTRAINT: //32
if (pFrame->pIE_PowerConstraint == NULL)
pFrame->pIE_PowerConstraint = (PWLAN_IE_PW_CONST)pItem;
break;
case WLAN_EID_CH_SWITCH: //37
if (pFrame->pIE_CHSW == NULL)
pFrame->pIE_CHSW = (PWLAN_IE_CH_SW)pItem;
break;
case WLAN_EID_QUIET: //40
if (pFrame->pIE_Quiet == NULL)
pFrame->pIE_Quiet = (PWLAN_IE_QUIET)pItem;
break;
case WLAN_EID_IBSS_DFS:
if (pFrame->pIE_IBSSDFS == NULL)
pFrame->pIE_IBSSDFS = (PWLAN_IE_IBSS_DFS)pItem;
break;
default:
DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Bad EID=%dd in proberesp\n", pItem->byElementID);
break;
}
pItem = (PWLAN_IE)(((unsigned char *)pItem) + 2 + pItem->len);
}
return;
}
/*+
*
* Routine Description:
* Encode Authentication frame
*
*
* Return Value:
* None.
*
-*/
void
vMgrEncodeAuthen(
PWLAN_FR_AUTHEN pFrame
)
{
pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
// Fixed Fields
pFrame->pwAuthAlgorithm = (unsigned short *)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
+ WLAN_AUTHEN_OFF_AUTH_ALG);
pFrame->pwAuthSequence = (unsigned short *)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
+ WLAN_AUTHEN_OFF_AUTH_SEQ);
pFrame->pwStatus = (unsigned short *)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
+ WLAN_AUTHEN_OFF_STATUS);
pFrame->len = WLAN_HDR_ADDR3_LEN + WLAN_AUTHEN_OFF_STATUS + sizeof(*(pFrame->pwStatus));
return;
}
/*+
*
* Routine Description:
* Decode Authentication
*
*
* Return Value:
* None.
*
-*/
void
vMgrDecodeAuthen(
PWLAN_FR_AUTHEN pFrame
)
{
PWLAN_IE pItem;
pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
// Fixed Fields
pFrame->pwAuthAlgorithm = (unsigned short *)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
+ WLAN_AUTHEN_OFF_AUTH_ALG);
pFrame->pwAuthSequence = (unsigned short *)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
+ WLAN_AUTHEN_OFF_AUTH_SEQ);
pFrame->pwStatus = (unsigned short *)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
+ WLAN_AUTHEN_OFF_STATUS);
// Information elements
pItem = (PWLAN_IE)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
+ WLAN_AUTHEN_OFF_CHALLENGE);
if ((((unsigned char *)pItem) < (pFrame->pBuf + pFrame->len)) && (pItem->byElementID == WLAN_EID_CHALLENGE)) {
pFrame->pChallenge = (PWLAN_IE_CHALLENGE)pItem;
}
return;
}
/*+
*
* Routine Description:
* Encode Authentication
*
*
* Return Value:
* None.
*
-*/
void
vMgrEncodeDeauthen(
PWLAN_FR_DEAUTHEN pFrame
)
{
pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
// Fixed Fields
pFrame->pwReason = (unsigned short *)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
+ WLAN_DEAUTHEN_OFF_REASON);
pFrame->len = WLAN_HDR_ADDR3_LEN + WLAN_DEAUTHEN_OFF_REASON + sizeof(*(pFrame->pwReason));
return;
}
/*+
*
* Routine Description:
* Decode Deauthentication
*
*
* Return Value:
* None.
*
-*/
void
vMgrDecodeDeauthen(
PWLAN_FR_DEAUTHEN pFrame
)
{
pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
// Fixed Fields
pFrame->pwReason = (unsigned short *)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
+ WLAN_DEAUTHEN_OFF_REASON);
return;
}
/*+
*
* Routine Description: (AP)
* Encode Reassociation Response
*
*
* Return Value:
* None.
*
-*/
void
vMgrEncodeReassocResponse(
PWLAN_FR_REASSOCRESP pFrame
)
{
pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
// Fixed Fields
pFrame->pwCapInfo = (unsigned short *)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
+ WLAN_REASSOCRESP_OFF_CAP_INFO);
pFrame->pwStatus = (unsigned short *)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
+ WLAN_REASSOCRESP_OFF_STATUS);
pFrame->pwAid = (unsigned short *)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
+ WLAN_REASSOCRESP_OFF_AID);
pFrame->len = WLAN_HDR_ADDR3_LEN + WLAN_REASSOCRESP_OFF_AID + sizeof(*(pFrame->pwAid));
return;
}
/*+
*
* Routine Description:
* Decode Reassociation Response
*
*
* Return Value:
* None.
*
-*/
void
vMgrDecodeReassocResponse(
PWLAN_FR_REASSOCRESP pFrame
)
{
PWLAN_IE pItem;
pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
// Fixed Fields
pFrame->pwCapInfo = (unsigned short *)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
+ WLAN_REASSOCRESP_OFF_CAP_INFO);
pFrame->pwStatus = (unsigned short *)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
+ WLAN_REASSOCRESP_OFF_STATUS);
pFrame->pwAid = (unsigned short *)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
+ WLAN_REASSOCRESP_OFF_AID);
//Information elements
pFrame->pSuppRates = (PWLAN_IE_SUPP_RATES)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
+ WLAN_REASSOCRESP_OFF_SUPP_RATES);
pItem = (PWLAN_IE)(pFrame->pSuppRates);
pItem = (PWLAN_IE)(((unsigned char *)pItem) + 2 + pItem->len);
if ((((unsigned char *)pItem) < (pFrame->pBuf + pFrame->len)) &&
(pItem->byElementID == WLAN_EID_EXTSUPP_RATES)) {
pFrame->pExtSuppRates = (PWLAN_IE_SUPP_RATES)pItem;
}
return;
}
|
d0203d8870409e2b725df418b92c251ba533df15
|
d411dcad6fe4f3753a9f3c4308b05afcfc616861
|
/tests/dw_types.c
|
b6e6d86fd559fdd375c4b5ba332168a32adebd25
|
[
"MIT"
] |
permissive
|
alexanderchuranov/Metaresc
|
488abc039f6243dbe22cbb0a2247b6c34b6c3082
|
3c4e281f7d29d8bba4ace4fff9bfecdf5c604840
|
refs/heads/master
| 2023-08-18T01:02:14.081253
| 2023-08-02T20:48:33
| 2023-08-02T20:48:33
| 1,439,401
| 134
| 20
|
NOASSERTION
| 2023-07-24T05:15:14
| 2011-03-04T13:29:04
|
C
|
UTF-8
|
C
| false
| false
| 163
|
c
|
dw_types.c
|
#include <dw_mr_types.h>
mr_pointer_t mr_pointer;
mr_array_t mr_array;
mr_void_fields_t mr_void_fields;
mr_bitfields_t mr_bitfields;
int main () { return (0); }
|
33dfd013580cccc220cff230bb320bb9c72cc0ec
|
de21f9075f55640514c29ef0f1fe3f0690845764
|
/regression/contracts-dfcc/assigns_enforce_side_effects_2/main.c
|
fe09acb7cb889fed3f99312aff09d608f4c6f79e
|
[
"BSD-2-Clause",
"LicenseRef-scancode-unknown-license-reference",
"BSD-4-Clause"
] |
permissive
|
diffblue/cbmc
|
975a074ac445febb3b5715f8792beb545522dc18
|
decd2839c2f51a54b2ad0f3e89fdc1b4bf78cd16
|
refs/heads/develop
| 2023-08-31T05:52:05.342195
| 2023-08-30T13:31:51
| 2023-08-30T13:31:51
| 51,877,056
| 589
| 309
|
NOASSERTION
| 2023-09-14T18:49:17
| 2016-02-16T23:03:52
|
C++
|
UTF-8
|
C
| false
| false
| 176
|
c
|
main.c
|
#include <assert.h>
#include <stdbool.h>
#include <stdlib.h>
int foo(int *x) __CPROVER_assigns(++x)
{
*x = 2;
return 0;
}
int main()
{
int x;
foo(&x);
return 0;
}
|
9118961959ebcf83a70b73df23503eabcaccb5c8
|
fb47ab6337a71029dee71933e449cf7f6805fc0f
|
/external/platform/lpc15xx/lpcopen/usbd_rom_hid_keyboard/example/inc/app_usbd_cfg.h
|
c669868dd131c7ffb385ee2f1b331d59a4f2792c
|
[
"MIT"
] |
permissive
|
littlekernel/lk
|
7e7ba50b87b1f2e0b6e2f052c59249825c91975b
|
30dc320054f70910e1c1ee40a6948ee99672acec
|
refs/heads/master
| 2023-09-02T00:47:52.203963
| 2023-06-21T22:42:35
| 2023-06-21T22:42:35
| 3,058,456
| 3,077
| 618
|
MIT
| 2023-08-30T09:41:31
| 2011-12-27T19:19:36
|
C
|
UTF-8
|
C
| false
| false
| 4,118
|
h
|
app_usbd_cfg.h
|
/*
* @brief Configuration file needed for USB ROM stack based applications.
*
* @note
* Copyright(C) NXP Semiconductors, 2013
* All rights reserved.
*
* @par
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* LPC products. This software is supplied "AS IS" without any warranties of
* any kind, and NXP Semiconductors and its licensor disclaim any and
* all warranties, express or implied, including all implied warranties of
* merchantability, fitness for a particular purpose and non-infringement of
* intellectual property rights. NXP Semiconductors assumes no responsibility
* or liability for the use of the software, conveys no license or rights under any
* patent, copyright, mask work right, or any other intellectual property rights in
* or to any products. NXP Semiconductors reserves the right to make changes
* in the software without notification. NXP Semiconductors also makes no
* representation or warranty that such application will be suitable for the
* specified use without further testing or modification.
*
* @par
* Permission to use, copy, modify, and distribute this software and its
* documentation is hereby granted, under NXP Semiconductors' and its
* licensor's relevant copyrights in the software, without fee, provided that it
* is used in conjunction with NXP Semiconductors microcontrollers. This
* copyright, permission, and disclaimer notice must appear in all copies of
* this code.
*/
#include "lpc_types.h"
#include "error.h"
#include "usbd_rom_api.h"
#ifndef __APP_USB_CFG_H_
#define __APP_USB_CFG_H_
#ifdef __cplusplus
extern "C"
{
#endif
/** @ingroup EXAMPLES_USBDROM_15XX_HID_KEYBOARD
* @{
*/
/* HID In/Out Endpoint Address */
#define HID_EP_IN 0x81
#define HID_EP_OUT 0x01
/** Interval between keyboard reports expressed in milliseconds for full-speed device. */
#define HID_KEYBRD_REPORT_INTERVAL_MS 10
/** bInterval value used in descriptor. For HS this macro will differ from HID_KEYBRD_REPORT_INTERVAL_MS macro. */
#define HID_KEYBRD_REPORT_INTERVAL 10
/* The following manifest constants are used to define this memory area to be used
by USBD ROM stack.
*/
#define USB_STACK_MEM_BASE 0x02008000
#define USB_STACK_MEM_SIZE 0x1000
/* Manifest constants used by USBD ROM stack. These values SHOULD NOT BE CHANGED
for advance features which require usage of USB_CORE_CTRL_T structure.
Since these are the values used for compiling USB stack.
*/
#define USB_MAX_IF_NUM 8 /*!< Max interface number used for building USBDL_Lib. DON'T CHANGE. */
#define USB_MAX_EP_NUM 5 /*!< Max number of EP used for building USBD ROM. DON'T CHANGE. */
#define USB_MAX_PACKET0 64 /*!< Max EP0 packet size used for building USBD ROM. DON'T CHANGE. */
#define USB_FS_MAX_BULK_PACKET 64 /*!< MAXP for FS bulk EPs used for building USBD ROM. DON'T CHANGE. */
#define USB_HS_MAX_BULK_PACKET 512 /*!< MAXP for HS bulk EPs used for building USBD ROM. DON'T CHANGE. */
#define USB_DFU_XFER_SIZE 2048 /*!< Max DFU transfer size used for building USBD ROM. DON'T CHANGE. */
/* USB descriptor arrays defined *_desc.c file */
extern const uint8_t USB_DeviceDescriptor[];
extern uint8_t USB_HsConfigDescriptor[];
extern uint8_t USB_FsConfigDescriptor[];
extern const uint8_t USB_StringDescriptor[];
extern const uint8_t USB_DeviceQualifier[];
/**
* @brief Find the address of interface descriptor for given class type.
* @param pDesc Pointer to configuration descriptor in which the desired class
* interface descriptor to be found.
* @param intfClass Interface class type to be searched.
* @return If found returns the address of requested interface else returns NULL.
*/
extern USB_INTERFACE_DESCRIPTOR *find_IntfDesc(const uint8_t *pDesc, uint32_t intfClass);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __APP_USB_CFG_H_ */
|
cd387c12e2d5db8af5587c56644f909a88cbe7d4
|
e8c76797b194bce6702adf9721a96c2b440efd5c
|
/support/win32/ApacheMonitor.c
|
841b4ab23614e516f0d703478e8d644e86cb78b7
|
[
"LicenseRef-scancode-unknown-license-reference",
"LicenseRef-scancode-public-domain",
"Apache-2.0",
"LicenseRef-scancode-zeusbench",
"BSD-3-Clause",
"RSA-MD",
"LicenseRef-scancode-rsa-1990",
"Beerware",
"LicenseRef-scancode-other-permissive",
"Spencer-94",
"metamail",
"LicenseRef-scancode-rsa-md4",
"HPND-sell-variant"
] |
permissive
|
apache/httpd
|
86bfac3d6e2e9b48f5bfca5be7ec616fa9b14e9a
|
b9e029c8036fd036281ac266010db91aed6079b2
|
refs/heads/trunk
| 2023-09-04T07:18:59.681233
| 2023-08-30T12:56:11
| 2023-08-30T12:56:11
| 205,423
| 3,159
| 1,329
|
Apache-2.0
| 2023-09-11T13:50:41
| 2009-05-20T02:02:59
|
C
|
UTF-8
|
C
| false
| false
| 54,930
|
c
|
ApacheMonitor.c
|
/* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The ASF licenses this file to You under the Apache License, Version 2.0
* (the "License"); you may not use this file except in compliance with
* the License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/* ====================================================================
* ApacheMonitor.c Simple program to manage and monitor Apache services.
*
* Contributed by Mladen Turk <mturk mappingsoft.com>
*
* 05 Aug 2001
* ====================================================================
*/
#define _WIN32_WINNT 0x0500
#ifndef STRICT
#define STRICT
#endif
#ifndef OEMRESOURCE
#define OEMRESOURCE
#endif
#if defined(_MSC_VER) && _MSC_VER >= 1400
#define _CRT_SECURE_NO_DEPRECATE
#endif
#include <windows.h>
#include <windowsx.h>
#include <commctrl.h>
#include <objbase.h>
#include <shlobj.h>
#include <stdlib.h>
#include <stdio.h>
#include <WtsApi32.h>
#include <tchar.h>
#include "ApacheMonitor.h"
#ifndef AM_STRINGIFY
/** Properly quote a value as a string in the C preprocessor */
#define AM_STRINGIFY(n) AM_STRINGIFY_HELPER(n)
/** Helper macro for AM_STRINGIFY */
#define AM_STRINGIFY_HELPER(n) #n
#endif
#define OS_VERSION_WINNT 2
#define OS_VERSION_WIN2K 3
/* Should be enough */
#define MAX_APACHE_SERVICES 128
#define MAX_APACHE_COMPUTERS 32
#define WM_TRAYMESSAGE (WM_APP+1)
#define WM_UPDATEMESSAGE (WM_USER+1)
#define WM_MANAGEMESSAGE (WM_USER+2)
#define WM_TIMER_REFRESH 10
#define WM_TIMER_RESCAN 11
#define SERVICE_APACHE_RESTART 128
#define XBITMAP 16
#define YBITMAP 16
#define MAX_LOADSTRING 100
#define REFRESH_TIME 2000 /* service refresh time (ms) */
#define RESCAN_TIME 20000 /* registry rescan time (ms) */
typedef struct _st_APACHE_SERVICE
{
LPTSTR szServiceName;
LPTSTR szDisplayName;
LPTSTR szDescription;
LPTSTR szImagePath;
LPTSTR szComputerName;
DWORD dwPid;
} ST_APACHE_SERVICE;
typedef struct _st_MONITORED_COMPUTERS
{
LPTSTR szComputerName;
HKEY hRegistry;
} ST_MONITORED_COMP;
/* Global variables */
HINSTANCE g_hInstance = NULL;
TCHAR *g_szTitle; /* The title bar text */
TCHAR *g_szWindowClass; /* Window Class Name */
HICON g_icoStop;
HICON g_icoRun;
UINT g_bUiTaskbarCreated;
DWORD g_dwOSVersion;
BOOL g_bDlgServiceOn = FALSE;
BOOL g_bConsoleRun = FALSE;
ST_APACHE_SERVICE g_stServices[MAX_APACHE_SERVICES];
ST_MONITORED_COMP g_stComputers[MAX_APACHE_COMPUTERS];
HBITMAP g_hBmpStart, g_hBmpStop;
HBITMAP g_hBmpPicture, g_hBmpOld;
BOOL g_bRescanServices;
HWND g_hwndServiceDlg;
HWND g_hwndMain;
HWND g_hwndStdoutList;
HWND g_hwndConnectDlg;
HCURSOR g_hCursorHourglass;
HCURSOR g_hCursorArrow;
LANGID g_LangID;
CRITICAL_SECTION g_stcSection;
LPTSTR g_szLocalHost;
/* locale language support */
static TCHAR *g_lpMsg[IDS_MSG_LAST - IDS_MSG_FIRST + 1];
void am_ClearServicesSt()
{
int i;
for (i = 0; i < MAX_APACHE_SERVICES; i++)
{
if (g_stServices[i].szServiceName) {
free(g_stServices[i].szServiceName);
}
if (g_stServices[i].szDisplayName) {
free(g_stServices[i].szDisplayName);
}
if (g_stServices[i].szDescription) {
free(g_stServices[i].szDescription);
}
if (g_stServices[i].szImagePath) {
free(g_stServices[i].szImagePath);
}
if (g_stServices[i].szComputerName) {
free(g_stServices[i].szComputerName);
}
}
memset(g_stServices, 0, sizeof(ST_APACHE_SERVICE) * MAX_APACHE_SERVICES);
}
void am_ClearComputersSt()
{
int i;
for (i = 0; i < MAX_APACHE_COMPUTERS; i++) {
if (g_stComputers[i].szComputerName) {
free(g_stComputers[i].szComputerName);
RegCloseKey(g_stComputers[i].hRegistry);
}
}
memset(g_stComputers, 0, sizeof(ST_MONITORED_COMP) * MAX_APACHE_COMPUTERS);
}
BOOL am_IsComputerConnected(LPTSTR szComputerName)
{
int i = 0;
while (g_stComputers[i].szComputerName != NULL) {
if (_tcscmp(g_stComputers[i].szComputerName, szComputerName) == 0) {
return TRUE;
}
++i;
}
return FALSE;
}
void am_DisconnectComputer(LPTSTR szComputerName)
{
int i = 0, j;
while (g_stComputers[i].szComputerName != NULL) {
if (_tcscmp(g_stComputers[i].szComputerName, szComputerName) == 0) {
break;
}
++i;
}
if (g_stComputers[i].szComputerName != NULL) {
free(g_stComputers[i].szComputerName);
RegCloseKey(g_stComputers[i].hRegistry);
for (j = i; j < MAX_APACHE_COMPUTERS - 1; j++) {
g_stComputers[j].szComputerName= g_stComputers[j+1].szComputerName;
g_stComputers[j].hRegistry = g_stComputers[j+1].hRegistry;
}
g_stComputers[j].szComputerName = NULL;
g_stComputers[j].hRegistry = NULL;
}
}
void ErrorMessage(LPCTSTR szError, BOOL bFatal)
{
LPVOID lpMsgBuf = NULL;
if (szError) {
MessageBox(NULL, szError, g_lpMsg[IDS_MSG_ERROR - IDS_MSG_FIRST],
MB_OK | (bFatal ? MB_ICONERROR : MB_ICONEXCLAMATION));
}
else {
FormatMessage(FORMAT_MESSAGE_ALLOCATE_BUFFER |
FORMAT_MESSAGE_FROM_SYSTEM |
FORMAT_MESSAGE_IGNORE_INSERTS,
NULL, GetLastError(), g_LangID,
(LPTSTR) &lpMsgBuf, 0, NULL);
MessageBox(NULL, (LPCTSTR)lpMsgBuf,
g_lpMsg[IDS_MSG_ERROR - IDS_MSG_FIRST],
MB_OK | (bFatal ? MB_ICONERROR : MB_ICONEXCLAMATION));
LocalFree(lpMsgBuf);
}
if (bFatal) {
PostQuitMessage(0);
}
}
int am_RespawnAsUserAdmin(HWND hwnd, DWORD op, LPCTSTR szService,
LPCTSTR szComputerName)
{
TCHAR args[MAX_PATH + MAX_COMPUTERNAME_LENGTH + 12];
if (g_dwOSVersion < OS_VERSION_WIN2K) {
ErrorMessage(g_lpMsg[IDS_MSG_SRVFAILED - IDS_MSG_FIRST], FALSE);
return 0;
}
_sntprintf(args, sizeof(args) / sizeof(TCHAR),
_T("%d \"%s\" \"%s\""), op, szService,
szComputerName ? szComputerName : _T(""));
if (!ShellExecute(hwnd, _T("runas"), __targv[0], args, NULL, SW_NORMAL)) {
ErrorMessage(g_lpMsg[IDS_MSG_SRVFAILED - IDS_MSG_FIRST],
FALSE);
return 0;
}
return 1;
}
BOOL am_ConnectComputer(LPTSTR szComputerName)
{
int i = 0;
HKEY hKeyRemote;
TCHAR szTmp[MAX_PATH];
while (g_stComputers[i].szComputerName != NULL) {
if (_tcscmp(g_stComputers[i].szComputerName, szComputerName) == 0) {
return FALSE;
}
++i;
}
if (i > MAX_APACHE_COMPUTERS - 1) {
return FALSE;
}
if (RegConnectRegistry(szComputerName, HKEY_LOCAL_MACHINE, &hKeyRemote)
!= ERROR_SUCCESS) {
_sntprintf(szTmp, sizeof(szTmp) / sizeof(TCHAR),
g_lpMsg[IDS_MSG_ECONNECT - IDS_MSG_FIRST],
szComputerName);
ErrorMessage(szTmp, FALSE);
return FALSE;
}
else {
g_stComputers[i].szComputerName = _tcsdup(szComputerName);
g_stComputers[i].hRegistry = hKeyRemote;
return TRUE;
}
}
LPTSTR GetStringRes(int id)
{
static TCHAR buffer[MAX_PATH];
buffer[0] = 0;
LoadString(GetModuleHandle(NULL), id, buffer, MAX_PATH);
return buffer;
}
BOOL GetSystemOSVersion(LPDWORD dwVersion)
{
OSVERSIONINFO osvi;
/*
Try calling GetVersionEx using the OSVERSIONINFOEX structure.
If that fails, try using the OSVERSIONINFO structure.
*/
memset(&osvi, 0, sizeof(OSVERSIONINFO));
osvi.dwOSVersionInfoSize = sizeof(OSVERSIONINFO);
if (!GetVersionEx(&osvi)) {
return FALSE;
}
switch (osvi.dwPlatformId)
{
case VER_PLATFORM_WIN32_NT:
if (osvi.dwMajorVersion >= 5)
*dwVersion = OS_VERSION_WIN2K;
else
*dwVersion = OS_VERSION_WINNT;
break;
case VER_PLATFORM_WIN32_WINDOWS:
case VER_PLATFORM_WIN32s:
default:
*dwVersion = 0;
return FALSE;
}
return TRUE;
}
static VOID ShowNotifyIcon(HWND hWnd, DWORD dwMessage)
{
NOTIFYICONDATA nid;
int i = 0, n = 0;
memset(&nid, 0, sizeof(nid));
nid.cbSize = sizeof(NOTIFYICONDATA);
nid.hWnd = hWnd;
nid.uID = 0xFF;
nid.uFlags = NIF_ICON | NIF_MESSAGE | NIF_TIP;
nid.uCallbackMessage = WM_TRAYMESSAGE;
while (g_stServices[i].szServiceName != NULL)
{
if (g_stServices[i].dwPid != 0) {
++n;
}
++i;
}
if (dwMessage != NIM_DELETE)
{
if (n) {
nid.hIcon = g_icoRun;
}
else {
nid.hIcon = g_icoStop;
}
}
else {
nid.hIcon = NULL;
}
if (n == i && n > 0) {
_tcscpy(nid.szTip, g_lpMsg[IDS_MSG_RUNNINGALL - IDS_MSG_FIRST]);
}
else if (n) {
_sntprintf(nid.szTip, sizeof(nid.szTip) / sizeof(TCHAR),
g_lpMsg[IDS_MSG_RUNNING - IDS_MSG_FIRST], n, i);
}
else if (i) {
_sntprintf(nid.szTip, sizeof(nid.szTip) / sizeof(TCHAR),
g_lpMsg[IDS_MSG_RUNNINGNONE - IDS_MSG_FIRST], i);
}
else {
_tcscpy(nid.szTip, g_lpMsg[IDS_MSG_NOSERVICES - IDS_MSG_FIRST]);
}
Shell_NotifyIcon(dwMessage, &nid);
}
void appendMenuItem(HMENU hMenu, UINT uMenuId, LPTSTR szName,
BOOL fDefault, BOOL fEnabled)
{
MENUITEMINFO mii;
memset(&mii, 0, sizeof(MENUITEMINFO));
mii.cbSize = sizeof(MENUITEMINFO);
mii.fMask = MIIM_ID | MIIM_TYPE | MIIM_STATE;
if (_tcslen(szName))
{
mii.fType = MFT_STRING;
mii.wID = uMenuId;
if (fDefault) {
mii.fState = MFS_DEFAULT;
}
if (!fEnabled) {
mii.fState |= MFS_DISABLED;
}
mii.dwTypeData = szName;
}
else {
mii.fType = MFT_SEPARATOR;
}
InsertMenuItem(hMenu, uMenuId, FALSE, &mii);
}
void appendServiceMenu(HMENU hMenu, UINT uMenuId,
LPTSTR szServiceName, BOOL fRunning)
{
MENUITEMINFO mii;
HMENU smh;
smh = CreatePopupMenu();
appendMenuItem(smh, IDM_SM_START + uMenuId,
g_lpMsg[IDS_MSG_SSTART - IDS_MSG_FIRST], FALSE, !fRunning);
appendMenuItem(smh, IDM_SM_STOP + uMenuId,
g_lpMsg[IDS_MSG_SSTOP - IDS_MSG_FIRST], FALSE, fRunning);
appendMenuItem(smh, IDM_SM_RESTART + uMenuId,
g_lpMsg[IDS_MSG_SRESTART - IDS_MSG_FIRST], FALSE, fRunning);
memset(&mii, 0, sizeof(MENUITEMINFO));
mii.cbSize = sizeof(MENUITEMINFO);
mii.fMask = MIIM_ID | MIIM_TYPE | MIIM_STATE | MIIM_SUBMENU
| MIIM_CHECKMARKS;
mii.fType = MFT_STRING;
mii.wID = uMenuId;
mii.hbmpChecked = g_hBmpStart;
mii.hbmpUnchecked = g_hBmpStop;
mii.dwTypeData = szServiceName;
mii.hSubMenu = smh;
mii.fState = fRunning ? MFS_CHECKED : MFS_UNCHECKED;
InsertMenuItem(hMenu, IDM_SM_SERVICE + uMenuId, FALSE, &mii);
}
void ShowTryPopupMenu(HWND hWnd)
{
/* create popup menu */
HMENU hMenu = CreatePopupMenu();
POINT pt;
if (hMenu)
{
appendMenuItem(hMenu, IDM_RESTORE,
g_lpMsg[IDS_MSG_MNUSHOW - IDS_MSG_FIRST],
TRUE, TRUE);
appendMenuItem(hMenu, IDC_SMANAGER,
g_lpMsg[IDS_MSG_MNUSERVICES - IDS_MSG_FIRST],
FALSE, TRUE);
appendMenuItem(hMenu, 0, _T(""), FALSE, TRUE);
appendMenuItem(hMenu, IDM_EXIT,
g_lpMsg[IDS_MSG_MNUEXIT - IDS_MSG_FIRST],
FALSE, TRUE);
if (!SetForegroundWindow(hWnd)) {
SetForegroundWindow(NULL);
}
GetCursorPos(&pt);
TrackPopupMenu(hMenu, TPM_LEFTALIGN|TPM_RIGHTBUTTON,
pt.x, pt.y, 0, hWnd, NULL);
DestroyMenu(hMenu);
}
}
void ShowTryServicesMenu(HWND hWnd)
{
/* create services list popup menu and submenus */
HMENU hMenu = CreatePopupMenu();
POINT pt;
int i = 0;
if (hMenu)
{
while (g_stServices[i].szServiceName != NULL)
{
appendServiceMenu(hMenu, i, g_stServices[i].szDisplayName,
g_stServices[i].dwPid != 0);
++i;
}
if (i)
{
if (!SetForegroundWindow(hWnd)) {
SetForegroundWindow(NULL);
}
GetCursorPos(&pt);
TrackPopupMenu(hMenu, TPM_LEFTALIGN|TPM_RIGHTBUTTON,
pt.x, pt.y, 0, hWnd, NULL);
DestroyMenu(hMenu);
}
}
}
BOOL CenterWindow(HWND hwndChild)
{
RECT rChild, rWorkArea;
int wChild, hChild;
int xNew, yNew;
BOOL bResult;
/* Get the Height and Width of the child window */
GetWindowRect(hwndChild, &rChild);
wChild = rChild.right - rChild.left;
hChild = rChild.bottom - rChild.top;
/* Get the limits of the 'workarea' */
bResult = SystemParametersInfo(SPI_GETWORKAREA, sizeof(RECT),
&rWorkArea, 0);
if (!bResult) {
rWorkArea.left = rWorkArea.top = 0;
rWorkArea.right = GetSystemMetrics(SM_CXSCREEN);
rWorkArea.bottom = GetSystemMetrics(SM_CYSCREEN);
}
/* Calculate new X and Y position*/
xNew = (rWorkArea.right - wChild) / 2;
yNew = (rWorkArea.bottom - hChild) / 2;
return SetWindowPos(hwndChild, HWND_TOP, xNew, yNew, 0, 0,
SWP_NOSIZE | SWP_SHOWWINDOW);
}
static void addListBoxItem(HWND hDlg, LPTSTR lpStr, HBITMAP hBmp)
{
LRESULT nItem;
nItem = SendMessage(hDlg, LB_ADDSTRING, 0, (LPARAM)lpStr);
SendMessage(hDlg, LB_SETITEMDATA, nItem, (LPARAM)hBmp);
}
static void addListBoxString(HWND hListBox, LPTSTR lpStr)
{
static int nItems = 0;
if (!g_bDlgServiceOn) {
return;
}
++nItems;
if (nItems > MAX_LOADSTRING)
{
SendMessage(hListBox, LB_RESETCONTENT, 0, 0);
nItems = 1;
}
ListBox_SetCurSel(hListBox,
ListBox_AddString(hListBox, lpStr));
}
BOOL ApacheManageService(LPCTSTR szServiceName, LPCTSTR szImagePath,
LPTSTR szComputerName, DWORD dwCommand)
{
TCHAR szMsg[MAX_PATH];
BOOL retValue;
SC_HANDLE schService;
SC_HANDLE schSCManager;
SERVICE_STATUS schSStatus;
int ticks;
schSCManager = OpenSCManager(szComputerName, NULL,
SC_MANAGER_CONNECT);
if (!schSCManager) {
ErrorMessage(g_lpMsg[IDS_MSG_SRVFAILED - IDS_MSG_FIRST],
FALSE);
return FALSE;
}
schService = OpenService(schSCManager, szServiceName,
SERVICE_QUERY_STATUS | SERVICE_START |
SERVICE_STOP | SERVICE_USER_DEFINED_CONTROL);
if (schService == NULL)
{
/* Avoid recursion of ImagePath NULL (from this Respawn) */
if (szImagePath) {
am_RespawnAsUserAdmin(g_hwndMain, dwCommand,
szServiceName, szComputerName);
}
else {
ErrorMessage(g_lpMsg[IDS_MSG_SRVFAILED - IDS_MSG_FIRST],
FALSE);
}
CloseServiceHandle(schSCManager);
return FALSE;
}
else
{
retValue = FALSE;
g_bConsoleRun = TRUE;
SetCursor(g_hCursorHourglass);
switch (dwCommand)
{
case SERVICE_CONTROL_STOP:
_sntprintf(szMsg, sizeof(szMsg) / sizeof(TCHAR),
g_lpMsg[IDS_MSG_SRVSTOP - IDS_MSG_FIRST],
szServiceName);
addListBoxString(g_hwndStdoutList, szMsg);
if (ControlService(schService, SERVICE_CONTROL_STOP,
&schSStatus)) {
Sleep(1000);
while (QueryServiceStatus(schService, &schSStatus))
{
if (schSStatus.dwCurrentState == SERVICE_STOP_PENDING)
{
Sleep(1000);
}
else {
break;
}
}
}
if (QueryServiceStatus(schService, &schSStatus))
{
if (schSStatus.dwCurrentState == SERVICE_STOPPED)
{
retValue = TRUE;
_sntprintf(szMsg, sizeof(szMsg) / sizeof(TCHAR),
g_lpMsg[IDS_MSG_SRVSTOPPED - IDS_MSG_FIRST],
szServiceName);
addListBoxString(g_hwndStdoutList, szMsg);
}
}
break;
case SERVICE_CONTROL_CONTINUE:
_sntprintf(szMsg, sizeof(szMsg) / sizeof(TCHAR),
g_lpMsg[IDS_MSG_SRVSTART - IDS_MSG_FIRST],
szServiceName);
addListBoxString(g_hwndStdoutList, szMsg);
if (StartService(schService, 0, NULL))
{
Sleep(1000);
while (QueryServiceStatus(schService, &schSStatus))
{
if (schSStatus.dwCurrentState == SERVICE_START_PENDING)
{
Sleep(1000);
}
else {
break;
}
}
}
if (QueryServiceStatus(schService, &schSStatus))
{
if (schSStatus.dwCurrentState == SERVICE_RUNNING)
{
retValue = TRUE;
_sntprintf(szMsg, sizeof(szMsg) / sizeof(TCHAR),
g_lpMsg[IDS_MSG_SRVSTARTED - IDS_MSG_FIRST],
szServiceName);
addListBoxString(g_hwndStdoutList, szMsg);
}
}
break;
case SERVICE_APACHE_RESTART:
_sntprintf(szMsg, sizeof(szMsg) / sizeof(TCHAR),
g_lpMsg[IDS_MSG_SRVRESTART - IDS_MSG_FIRST],
szServiceName);
addListBoxString(g_hwndStdoutList, szMsg);
if (ControlService(schService, SERVICE_APACHE_RESTART,
&schSStatus))
{
ticks = 60;
while (schSStatus.dwCurrentState == SERVICE_START_PENDING)
{
Sleep(1000);
if (!QueryServiceStatus(schService, &schSStatus))
{
CloseServiceHandle(schService);
CloseServiceHandle(schSCManager);
g_bConsoleRun = FALSE;
SetCursor(g_hCursorArrow);
return FALSE;
}
if (!--ticks) {
break;
}
}
}
if (schSStatus.dwCurrentState == SERVICE_RUNNING)
{
retValue = TRUE;
_sntprintf(szMsg, sizeof(szMsg) / sizeof(TCHAR),
g_lpMsg[IDS_MSG_SRVRESTARTED - IDS_MSG_FIRST],
szServiceName);
addListBoxString(g_hwndStdoutList, szMsg);
}
break;
}
CloseServiceHandle(schService);
CloseServiceHandle(schSCManager);
if (!retValue) {
ErrorMessage(g_lpMsg[IDS_MSG_SRVFAILED - IDS_MSG_FIRST],
FALSE);
}
g_bConsoleRun = FALSE;
SetCursor(g_hCursorArrow);
return retValue;
}
return FALSE;
}
BOOL IsServiceRunning(LPCTSTR szServiceName, LPCTSTR szComputerName,
LPDWORD lpdwPid)
{
DWORD dwPid;
SC_HANDLE schService;
SC_HANDLE schSCManager;
SERVICE_STATUS schSStatus;
dwPid = 0;
schSCManager = OpenSCManager(szComputerName, NULL,
SC_MANAGER_CONNECT);
if (!schSCManager) {
return FALSE;
}
schService = OpenService(schSCManager, szServiceName,
SERVICE_QUERY_STATUS);
if (schService != NULL)
{
if (QueryServiceStatus(schService, &schSStatus))
{
dwPid = schSStatus.dwCurrentState;
if (lpdwPid) {
*lpdwPid = 1;
}
}
CloseServiceHandle(schService);
CloseServiceHandle(schSCManager);
return dwPid == SERVICE_RUNNING ? TRUE : FALSE;
}
else {
g_bRescanServices = TRUE;
}
CloseServiceHandle(schSCManager);
return FALSE;
}
BOOL FindRunningServices(void)
{
int i = 0;
DWORD dwPid;
BOOL rv = FALSE;
while (g_stServices[i].szServiceName != NULL)
{
if (!IsServiceRunning(g_stServices[i].szServiceName,
g_stServices[i].szComputerName, &dwPid)) {
dwPid = 0;
}
if (g_stServices[i].dwPid != dwPid) {
rv = TRUE;
}
g_stServices[i].dwPid = dwPid;
++i;
}
return rv;
}
BOOL GetApacheServicesStatus()
{
TCHAR szKey[MAX_PATH];
TCHAR achKey[MAX_PATH];
TCHAR szImagePath[MAX_PATH];
TCHAR szBuf[MAX_PATH];
TCHAR szTmp[MAX_PATH];
HKEY hKey, hSubKey, hKeyRemote;
DWORD retCode, rv, dwKeyType;
DWORD dwBufLen = MAX_PATH;
int i, stPos = 0;
int computers = 0;
g_bRescanServices = FALSE;
am_ClearServicesSt();
while (g_stComputers[computers].szComputerName != NULL) {
hKeyRemote = g_stComputers[computers].hRegistry;
retCode = RegOpenKeyEx(hKeyRemote,
_T("System\\CurrentControlSet\\Services\\"),
0, KEY_READ, &hKey);
if (retCode != ERROR_SUCCESS)
{
ErrorMessage(NULL, FALSE);
return FALSE;
}
for (i = 0, retCode = ERROR_SUCCESS; retCode == ERROR_SUCCESS; i++)
{
retCode = RegEnumKey(hKey, i, achKey, MAX_PATH);
if (retCode == ERROR_SUCCESS)
{
_tcscpy(szKey, _T("System\\CurrentControlSet\\Services\\"));
_tcscat(szKey, achKey);
if (RegOpenKeyEx(hKeyRemote, szKey, 0,
KEY_QUERY_VALUE, &hSubKey) == ERROR_SUCCESS)
{
dwBufLen = MAX_PATH;
rv = RegQueryValueEx(hSubKey, _T("ImagePath"), NULL,
&dwKeyType, (LPBYTE)szImagePath, &dwBufLen);
if (rv == ERROR_SUCCESS
&& (dwKeyType == REG_SZ
|| dwKeyType == REG_EXPAND_SZ)
&& dwBufLen)
{
_tcscpy(szBuf, szImagePath);
CharLower(szBuf);
/* the service name could be httpd*.exe or Apache*.exe */
if (((_tcsstr(szBuf, _T("\\apache")) != NULL)
|| (_tcsstr(szBuf, _T("\\httpd")) != NULL))
&& _tcsstr(szBuf, _T(".exe"))
&& (_tcsstr(szBuf, _T("--ntservice")) != NULL
|| _tcsstr(szBuf, _T("-k ")) != NULL))
{
g_stServices[stPos].szServiceName = _tcsdup(achKey);
g_stServices[stPos].szImagePath = _tcsdup(szImagePath);
g_stServices[stPos].szComputerName =
_tcsdup(g_stComputers[computers].szComputerName);
dwBufLen = MAX_PATH;
if (RegQueryValueEx(hSubKey, _T("Description"), NULL,
&dwKeyType, (LPBYTE)szBuf, &dwBufLen)
== ERROR_SUCCESS) {
g_stServices[stPos].szDescription = _tcsdup(szBuf);
}
dwBufLen = MAX_PATH;
if (RegQueryValueEx(hSubKey, _T("DisplayName"), NULL,
&dwKeyType, (LPBYTE)szBuf, &dwBufLen)
== ERROR_SUCCESS)
{
if (_tcscmp(g_stComputers[computers]
.szComputerName, g_szLocalHost) != 0)
{
_tcscpy(szTmp, g_stComputers[computers]
.szComputerName + 2);
_tcscat(szTmp, _T("@"));
_tcscat(szTmp, szBuf);
}
else {
_tcscpy(szTmp, szBuf);
}
g_stServices[stPos].szDisplayName = _tcsdup(szTmp);
}
++stPos;
if (stPos >= MAX_APACHE_SERVICES) {
retCode = !ERROR_SUCCESS;
}
}
}
RegCloseKey(hSubKey);
}
}
}
++computers;
RegCloseKey(hKey);
}
FindRunningServices();
return TRUE;
}
LRESULT CALLBACK ConnectDlgProc(HWND hDlg, UINT message,
WPARAM wParam, LPARAM lParam)
{
TCHAR szCmp[MAX_COMPUTERNAME_LENGTH+4];
switch (message)
{
case WM_INITDIALOG:
ShowWindow(hDlg, SW_HIDE);
g_hwndConnectDlg = hDlg;
CenterWindow(hDlg);
ShowWindow(hDlg, SW_SHOW);
SetFocus(GetDlgItem(hDlg, IDC_COMPUTER));
return TRUE;
case WM_COMMAND:
switch (LOWORD(wParam))
{
case IDOK:
memset(szCmp, 0, sizeof(szCmp));
_tcscpy(szCmp, _T("\\\\"));
SendMessage(GetDlgItem(hDlg, IDC_COMPUTER), WM_GETTEXT,
(WPARAM) MAX_COMPUTERNAME_LENGTH,
(LPARAM) szCmp+2);
_tcsupr(szCmp);
if (_tcslen(szCmp) < 3) {
EndDialog(hDlg, TRUE);
return TRUE;
}
am_ConnectComputer(szCmp);
SendMessage(g_hwndMain, WM_TIMER, WM_TIMER_RESCAN, 0);
case IDCANCEL:
EndDialog(hDlg, TRUE);
return TRUE;
case IDC_LBROWSE:
{
BROWSEINFO bi;
ITEMIDLIST *il;
LPMALLOC pMalloc;
memset(&bi, 0, sizeof(BROWSEINFO));
SHGetSpecialFolderLocation(hDlg, CSIDL_NETWORK, &il);
bi.lpszTitle = _T("ApacheMonitor :\nSelect Network Computer!");
bi.pszDisplayName = szCmp;
bi.hwndOwner = hDlg;
bi.ulFlags = BIF_BROWSEFORCOMPUTER;
bi.lpfn = NULL;
bi.lParam = 0;
bi.iImage = 0;
bi.pidlRoot = il;
if (SHBrowseForFolder(&bi) != NULL) {
SendMessage(GetDlgItem(hDlg, IDC_COMPUTER),
WM_SETTEXT,
(WPARAM) NULL, (LPARAM) szCmp);
}
if (SUCCEEDED(SHGetMalloc(&pMalloc))) {
pMalloc->lpVtbl->Free(pMalloc, il);
pMalloc->lpVtbl->Release(pMalloc);
}
return TRUE;
}
}
break;
case WM_QUIT:
case WM_CLOSE:
EndDialog(hDlg, TRUE);
return TRUE;
default:
return FALSE;
}
return FALSE;
}
LRESULT CALLBACK ServiceDlgProc(HWND hDlg, UINT message,
WPARAM wParam, LPARAM lParam)
{
TCHAR szBuf[MAX_PATH];
HWND hListBox;
static HWND hStatusBar;
TEXTMETRIC tm;
int i, y;
HDC hdcMem;
RECT rcBitmap;
LRESULT nItem;
LPMEASUREITEMSTRUCT lpmis;
LPDRAWITEMSTRUCT lpdis;
memset(szBuf, 0, sizeof(szBuf));
switch (message)
{
case WM_INITDIALOG:
ShowWindow(hDlg, SW_HIDE);
g_hwndServiceDlg = hDlg;
SetWindowText(hDlg, g_szTitle);
Button_Enable(GetDlgItem(hDlg, IDC_SSTART), FALSE);
Button_Enable(GetDlgItem(hDlg, IDC_SSTOP), FALSE);
Button_Enable(GetDlgItem(hDlg, IDC_SRESTART), FALSE);
Button_Enable(GetDlgItem(hDlg, IDC_SDISCONN), FALSE);
SetWindowText(GetDlgItem(hDlg, IDC_SSTART),
g_lpMsg[IDS_MSG_SSTART - IDS_MSG_FIRST]);
SetWindowText(GetDlgItem(hDlg, IDC_SSTOP),
g_lpMsg[IDS_MSG_SSTOP - IDS_MSG_FIRST]);
SetWindowText(GetDlgItem(hDlg, IDC_SRESTART),
g_lpMsg[IDS_MSG_SRESTART - IDS_MSG_FIRST]);
SetWindowText(GetDlgItem(hDlg, IDC_SMANAGER),
g_lpMsg[IDS_MSG_SERVICES - IDS_MSG_FIRST]);
SetWindowText(GetDlgItem(hDlg, IDC_SCONNECT),
g_lpMsg[IDS_MSG_CONNECT - IDS_MSG_FIRST]);
SetWindowText(GetDlgItem(hDlg, IDCANCEL),
g_lpMsg[IDS_MSG_OK - IDS_MSG_FIRST]);
hListBox = GetDlgItem(hDlg, IDL_SERVICES);
g_hwndStdoutList = GetDlgItem(hDlg, IDL_STDOUT);
hStatusBar = CreateStatusWindow(0x0800 /* SBT_TOOLTIPS */
| WS_CHILD | WS_VISIBLE,
_T(""), hDlg, IDC_STATBAR);
if (GetApacheServicesStatus())
{
i = 0;
while (g_stServices[i].szServiceName != NULL)
{
addListBoxItem(hListBox, g_stServices[i].szDisplayName,
g_stServices[i].dwPid == 0 ? g_hBmpStop
: g_hBmpStart);
++i;
}
}
CenterWindow(hDlg);
ShowWindow(hDlg, SW_SHOW);
SetFocus(hListBox);
SendMessage(hListBox, LB_SETCURSEL, 0, 0);
return TRUE;
break;
case WM_MANAGEMESSAGE:
ApacheManageService(g_stServices[LOWORD(wParam)].szServiceName,
g_stServices[LOWORD(wParam)].szImagePath,
g_stServices[LOWORD(wParam)].szComputerName,
LOWORD(lParam));
return TRUE;
break;
case WM_UPDATEMESSAGE:
hListBox = GetDlgItem(hDlg, IDL_SERVICES);
SendMessage(hListBox, LB_RESETCONTENT, 0, 0);
SendMessage(hStatusBar, SB_SETTEXT, 0, (LPARAM)_T(""));
Button_Enable(GetDlgItem(hDlg, IDC_SSTART), FALSE);
Button_Enable(GetDlgItem(hDlg, IDC_SSTOP), FALSE);
Button_Enable(GetDlgItem(hDlg, IDC_SRESTART), FALSE);
Button_Enable(GetDlgItem(hDlg, IDC_SDISCONN), FALSE);
i = 0;
while (g_stServices[i].szServiceName != NULL)
{
addListBoxItem(hListBox, g_stServices[i].szDisplayName,
g_stServices[i].dwPid == 0 ? g_hBmpStop : g_hBmpStart);
++i;
}
SendMessage(hListBox, LB_SETCURSEL, 0, 0);
/* Dirty hack to bring the window to the foreground */
SetWindowPos(hDlg, HWND_TOPMOST, 0, 0, 0, 0,
SWP_NOSIZE | SWP_NOMOVE | SWP_SHOWWINDOW);
SetWindowPos(hDlg, HWND_NOTOPMOST, 0, 0, 0, 0,
SWP_NOSIZE | SWP_NOMOVE | SWP_SHOWWINDOW);
SetFocus(hListBox);
return TRUE;
break;
case WM_MEASUREITEM:
lpmis = (LPMEASUREITEMSTRUCT) lParam;
lpmis->itemHeight = YBITMAP;
return TRUE;
case WM_SETCURSOR:
if (g_bConsoleRun) {
SetCursor(g_hCursorHourglass);
}
else {
SetCursor(g_hCursorArrow);
}
return TRUE;
case WM_DRAWITEM:
lpdis = (LPDRAWITEMSTRUCT) lParam;
if (lpdis->itemID == -1) {
break;
}
switch (lpdis->itemAction)
{
case ODA_FOCUS:
case ODA_SELECT:
case ODA_DRAWENTIRE:
g_hBmpPicture = (HBITMAP)SendMessage(lpdis->hwndItem,
LB_GETITEMDATA,
lpdis->itemID, (LPARAM) 0);
hdcMem = CreateCompatibleDC(lpdis->hDC);
g_hBmpOld = SelectObject(hdcMem, g_hBmpPicture);
BitBlt(lpdis->hDC, lpdis->rcItem.left, lpdis->rcItem.top,
lpdis->rcItem.right - lpdis->rcItem.left,
lpdis->rcItem.bottom - lpdis->rcItem.top,
hdcMem, 0, 0, SRCCOPY);
SendMessage(lpdis->hwndItem, LB_GETTEXT,
lpdis->itemID, (LPARAM) szBuf);
GetTextMetrics(lpdis->hDC, &tm);
y = (lpdis->rcItem.bottom + lpdis->rcItem.top - tm.tmHeight) / 2;
SelectObject(hdcMem, g_hBmpOld);
DeleteDC(hdcMem);
rcBitmap.left = lpdis->rcItem.left + XBITMAP + 2;
rcBitmap.top = lpdis->rcItem.top;
rcBitmap.right = lpdis->rcItem.right;
rcBitmap.bottom = lpdis->rcItem.top + YBITMAP;
if (lpdis->itemState & ODS_SELECTED)
{
if (g_hBmpPicture == g_hBmpStop)
{
Button_Enable(GetDlgItem(hDlg, IDC_SSTART), TRUE);
Button_SetStyle(GetDlgItem(hDlg, IDC_SSTART), BS_DEFPUSHBUTTON, TRUE);
Button_Enable(GetDlgItem(hDlg, IDC_SSTOP), FALSE);
Button_Enable(GetDlgItem(hDlg, IDC_SRESTART), FALSE);
}
else if (g_hBmpPicture == g_hBmpStart)
{
Button_Enable(GetDlgItem(hDlg, IDC_SSTART), FALSE);
Button_Enable(GetDlgItem(hDlg, IDC_SSTOP), TRUE);
Button_SetStyle(GetDlgItem(hDlg, IDC_SSTOP), BS_DEFPUSHBUTTON, TRUE);
Button_Enable(GetDlgItem(hDlg, IDC_SRESTART), TRUE);
}
else {
Button_Enable(GetDlgItem(hDlg, IDC_SSTART), FALSE);
Button_Enable(GetDlgItem(hDlg, IDC_SSTOP), FALSE);
Button_Enable(GetDlgItem(hDlg, IDC_SRESTART), FALSE);
}
if (_tcscmp(g_stServices[lpdis->itemID].szComputerName,
g_szLocalHost) == 0) {
Button_Enable(GetDlgItem(hDlg, IDC_SDISCONN), FALSE);
}
else {
Button_Enable(GetDlgItem(hDlg, IDC_SDISCONN), TRUE);
}
if (g_stServices[lpdis->itemID].szDescription) {
SendMessage(hStatusBar, SB_SETTEXT, 0,
(LPARAM)g_stServices[lpdis->itemID].szDescription);
}
else {
SendMessage(hStatusBar, SB_SETTEXT, 0, (LPARAM)_T(""));
}
if (lpdis->itemState & ODS_FOCUS) {
SetTextColor(lpdis->hDC, GetSysColor(COLOR_HIGHLIGHTTEXT));
SetBkColor(lpdis->hDC, GetSysColor(COLOR_HIGHLIGHT));
FillRect(lpdis->hDC, &rcBitmap, (HBRUSH)(COLOR_HIGHLIGHT+1));
}
else {
SetTextColor(lpdis->hDC, GetSysColor(COLOR_INACTIVECAPTIONTEXT));
SetBkColor(lpdis->hDC, GetSysColor(COLOR_INACTIVECAPTION));
FillRect(lpdis->hDC, &rcBitmap, (HBRUSH)(COLOR_INACTIVECAPTION+1));
}
}
else
{
SetTextColor(lpdis->hDC, GetSysColor(COLOR_MENUTEXT));
SetBkColor(lpdis->hDC, GetSysColor(COLOR_WINDOW));
FillRect(lpdis->hDC, &rcBitmap, (HBRUSH)(COLOR_WINDOW+1));
}
TextOut(lpdis->hDC, XBITMAP + 6, y, szBuf, (int)_tcslen(szBuf));
break;
}
return TRUE;
case WM_COMMAND:
switch (LOWORD(wParam))
{
case IDL_SERVICES:
switch (HIWORD(wParam))
{
case LBN_DBLCLK:
/* if started then stop, if stopped then start */
hListBox = GetDlgItem(hDlg, IDL_SERVICES);
nItem = SendMessage(hListBox, LB_GETCURSEL, 0, 0);
if (nItem != LB_ERR)
{
g_hBmpPicture = (HBITMAP)SendMessage(hListBox,
LB_GETITEMDATA,
nItem, (LPARAM) 0);
if (g_hBmpPicture == g_hBmpStop) {
SendMessage(hDlg, WM_MANAGEMESSAGE, nItem,
SERVICE_CONTROL_CONTINUE);
}
else {
SendMessage(hDlg, WM_MANAGEMESSAGE, nItem,
SERVICE_CONTROL_STOP);
}
}
return TRUE;
}
break;
case IDCANCEL:
EndDialog(hDlg, TRUE);
return TRUE;
case IDC_SSTART:
Button_Enable(GetDlgItem(hDlg, IDC_SSTART), FALSE);
hListBox = GetDlgItem(hDlg, IDL_SERVICES);
nItem = SendMessage(hListBox, LB_GETCURSEL, 0, 0);
if (nItem != LB_ERR) {
SendMessage(hDlg, WM_MANAGEMESSAGE, nItem,
SERVICE_CONTROL_CONTINUE);
}
Button_Enable(GetDlgItem(hDlg, IDC_SSTART), TRUE);
return TRUE;
case IDC_SSTOP:
Button_Enable(GetDlgItem(hDlg, IDC_SSTOP), FALSE);
hListBox = GetDlgItem(hDlg, IDL_SERVICES);
nItem = SendMessage(hListBox, LB_GETCURSEL, 0, 0);
if (nItem != LB_ERR) {
SendMessage(hDlg, WM_MANAGEMESSAGE, nItem,
SERVICE_CONTROL_STOP);
}
Button_Enable(GetDlgItem(hDlg, IDC_SSTOP), TRUE);
return TRUE;
case IDC_SRESTART:
Button_Enable(GetDlgItem(hDlg, IDC_SRESTART), FALSE);
hListBox = GetDlgItem(hDlg, IDL_SERVICES);
nItem = SendMessage(hListBox, LB_GETCURSEL, 0, 0);
if (nItem != LB_ERR) {
SendMessage(hDlg, WM_MANAGEMESSAGE, nItem,
SERVICE_APACHE_RESTART);
}
Button_Enable(GetDlgItem(hDlg, IDC_SRESTART), TRUE);
return TRUE;
case IDC_SMANAGER:
if (g_dwOSVersion >= OS_VERSION_WIN2K) {
ShellExecute(hDlg, _T("open"), _T("services.msc"), _T("/s"),
NULL, SW_NORMAL);
}
else {
WinExec("Control.exe SrvMgr.cpl Services", SW_NORMAL);
}
return TRUE;
case IDC_SCONNECT:
DialogBox(g_hInstance, MAKEINTRESOURCE(IDD_DLGCONNECT),
hDlg, (DLGPROC)ConnectDlgProc);
return TRUE;
case IDC_SDISCONN:
hListBox = GetDlgItem(hDlg, IDL_SERVICES);
nItem = SendMessage(hListBox, LB_GETCURSEL, 0, 0);
if (nItem != LB_ERR) {
am_DisconnectComputer(g_stServices[nItem].szComputerName);
SendMessage(g_hwndMain, WM_TIMER, WM_TIMER_RESCAN, 0);
}
return TRUE;
}
break;
case WM_SIZE:
switch (LOWORD(wParam))
{
case SIZE_MINIMIZED:
EndDialog(hDlg, TRUE);
return TRUE;
break;
}
break;
case WM_QUIT:
case WM_CLOSE:
EndDialog(hDlg, TRUE);
return TRUE;
default:
return FALSE;
}
return FALSE;
}
LRESULT CALLBACK WndProc(HWND hWnd, UINT message,
WPARAM wParam, LPARAM lParam)
{
if (message == g_bUiTaskbarCreated)
{
/* restore the tray icon on shell restart */
ShowNotifyIcon(hWnd, NIM_ADD);
return DefWindowProc(hWnd, message, wParam, lParam);
}
switch (message)
{
case WM_CREATE:
GetApacheServicesStatus();
ShowNotifyIcon(hWnd, NIM_ADD);
SetTimer(hWnd, WM_TIMER_REFRESH, REFRESH_TIME, NULL);
SetTimer(hWnd, WM_TIMER_RESCAN, RESCAN_TIME, NULL);
break;
case WM_TIMER:
switch (wParam)
{
case WM_TIMER_RESCAN:
{
int nPrev = 0, nNew = 0;
EnterCriticalSection(&g_stcSection);
if (FindRunningServices() || g_bRescanServices)
{
ShowNotifyIcon(hWnd, NIM_MODIFY);
if (g_hwndServiceDlg)
PostMessage(g_hwndServiceDlg, WM_UPDATEMESSAGE, 0, 0);
}
/* check if services list changed */
while (g_stServices[nPrev].szServiceName != NULL)
++nPrev;
GetApacheServicesStatus();
while (g_stServices[nNew].szServiceName != NULL)
++nNew;
if (nPrev != nNew)
{
ShowNotifyIcon(hWnd, NIM_MODIFY);
if (g_hwndServiceDlg) {
PostMessage(g_hwndServiceDlg, WM_UPDATEMESSAGE, 0, 0);
}
}
LeaveCriticalSection(&g_stcSection);
break;
}
case WM_TIMER_REFRESH:
{
EnterCriticalSection(&g_stcSection);
if (g_bRescanServices)
{
GetApacheServicesStatus();
ShowNotifyIcon(hWnd, NIM_MODIFY);
if (g_hwndServiceDlg) {
PostMessage(g_hwndServiceDlg, WM_UPDATEMESSAGE, 0, 0);
}
}
else if (FindRunningServices())
{
ShowNotifyIcon(hWnd, NIM_MODIFY);
if (g_hwndServiceDlg) {
PostMessage(g_hwndServiceDlg, WM_UPDATEMESSAGE, 0, 0);
}
}
LeaveCriticalSection(&g_stcSection);
break;
}
}
break;
case WM_QUIT:
ShowNotifyIcon(hWnd, NIM_DELETE);
break;
case WM_TRAYMESSAGE:
switch (lParam)
{
case WM_LBUTTONDBLCLK:
if (!g_bDlgServiceOn)
{
g_bDlgServiceOn = TRUE;
DialogBox(g_hInstance, MAKEINTRESOURCE(IDD_DLGSERVICES),
hWnd, (DLGPROC)ServiceDlgProc);
g_bDlgServiceOn = FALSE;
g_hwndServiceDlg = NULL;
}
else if (IsWindow(g_hwndServiceDlg))
{
/* Dirty hack to bring the window to the foreground */
SetWindowPos(g_hwndServiceDlg, HWND_TOPMOST, 0, 0, 0, 0,
SWP_NOSIZE | SWP_NOMOVE | SWP_SHOWWINDOW);
SetWindowPos(g_hwndServiceDlg, HWND_NOTOPMOST, 0, 0, 0, 0,
SWP_NOSIZE | SWP_NOMOVE | SWP_SHOWWINDOW);
SetFocus(g_hwndServiceDlg);
}
break;
case WM_LBUTTONUP:
ShowTryServicesMenu(hWnd);
break;
case WM_RBUTTONUP:
ShowTryPopupMenu(hWnd);
break;
}
break;
case WM_COMMAND:
if ((LOWORD(wParam) & IDM_SM_START) == IDM_SM_START)
{
ApacheManageService(g_stServices[LOWORD(wParam)
- IDM_SM_START].szServiceName,
g_stServices[LOWORD(wParam)
- IDM_SM_START].szImagePath,
g_stServices[LOWORD(wParam)
- IDM_SM_START].szComputerName,
SERVICE_CONTROL_CONTINUE);
return TRUE;
}
else if ((LOWORD(wParam) & IDM_SM_STOP) == IDM_SM_STOP)
{
ApacheManageService(g_stServices[LOWORD(wParam)
- IDM_SM_STOP].szServiceName,
g_stServices[LOWORD(wParam)
- IDM_SM_STOP].szImagePath,
g_stServices[LOWORD(wParam)
- IDM_SM_STOP].szComputerName,
SERVICE_CONTROL_STOP);
return TRUE;
}
else if ((LOWORD(wParam) & IDM_SM_RESTART) == IDM_SM_RESTART)
{
ApacheManageService(g_stServices[LOWORD(wParam)
- IDM_SM_RESTART].szServiceName,
g_stServices[LOWORD(wParam)
- IDM_SM_RESTART].szImagePath,
g_stServices[LOWORD(wParam)
- IDM_SM_RESTART].szComputerName,
SERVICE_APACHE_RESTART);
return TRUE;
}
switch (LOWORD(wParam))
{
case IDM_RESTORE:
if (!g_bDlgServiceOn)
{
g_bDlgServiceOn = TRUE;
DialogBox(g_hInstance, MAKEINTRESOURCE(IDD_DLGSERVICES),
hWnd, (DLGPROC)ServiceDlgProc);
g_bDlgServiceOn = FALSE;
g_hwndServiceDlg = NULL;
}
else if (IsWindow(g_hwndServiceDlg)) {
SetFocus(g_hwndServiceDlg);
}
break;
case IDC_SMANAGER:
if (g_dwOSVersion >= OS_VERSION_WIN2K) {
ShellExecute(NULL, _T("open"), _T("services.msc"), _T("/s"),
NULL, SW_NORMAL);
}
else {
WinExec("Control.exe SrvMgr.cpl Services", SW_NORMAL);
}
return TRUE;
case IDM_EXIT:
ShowNotifyIcon(hWnd, NIM_DELETE);
PostQuitMessage(0);
return TRUE;
}
default:
return DefWindowProc(hWnd, message, wParam, lParam);
}
return FALSE;
}
static int KillAWindow(HWND appwindow)
{
HANDLE appproc;
DWORD procid;
BOOL postres;
SetLastError(0);
GetWindowThreadProcessId(appwindow, &procid);
if (GetLastError())
return(2);
appproc = OpenProcess(SYNCHRONIZE, 0, procid);
postres = PostMessage(appwindow, WM_COMMAND, IDM_EXIT, 0);
if (appproc && postres) {
if (WaitForSingleObject(appproc, 10 /* seconds */ * 1000)
== WAIT_OBJECT_0) {
CloseHandle(appproc);
return (0);
}
}
if (appproc)
CloseHandle(appproc);
if ((appproc = OpenProcess(PROCESS_TERMINATE, 0, procid)) != NULL) {
if (TerminateProcess(appproc, 0)) {
CloseHandle(appproc);
return (0);
}
CloseHandle(appproc);
}
/* Perhaps we were short of permissions? */
return (2);
}
static int KillAllMonitors(void)
{
HWND appwindow;
int exitcode = 0;
PWTS_PROCESS_INFO tsProcs;
DWORD tsProcCount, i;
DWORD thisProcId;
/* This is graceful, close our own Window, clearing the icon */
if ((appwindow = FindWindow(g_szWindowClass, g_szTitle)) != NULL)
exitcode = KillAWindow(appwindow);
if (g_dwOSVersion < OS_VERSION_WIN2K)
return exitcode;
thisProcId = GetCurrentProcessId();
if (!WTSEnumerateProcesses(WTS_CURRENT_SERVER_HANDLE, 0, 1,
&tsProcs, &tsProcCount))
return exitcode;
/* This is ungraceful; close other Windows, with a lingering icon.
* Since on terminal server it's not possible to post the message
* to exit across sessions, we have to suffer this side effect
* of a taskbar 'icon' which will evaporate the next time that
* the user hovers over it or when the taskbar area is updated.
*/
for (i = 0; i < tsProcCount; ++i) {
if (_tcscmp(tsProcs[i].pProcessName, _T(AM_STRINGIFY(BIN_NAME))) == 0
&& tsProcs[i].ProcessId != thisProcId)
WTSTerminateProcess(WTS_CURRENT_SERVER_HANDLE,
tsProcs[i].ProcessId, 1);
}
WTSFreeMemory(tsProcs);
return exitcode;
}
/* Create main invisible window */
HWND CreateMainWindow(HINSTANCE hInstance)
{
HWND hWnd = NULL;
WNDCLASSEX wcex;
wcex.cbSize = sizeof(WNDCLASSEX);
wcex.style = CS_HREDRAW | CS_VREDRAW;
wcex.lpfnWndProc = (WNDPROC)WndProc;
wcex.cbClsExtra = 0;
wcex.cbWndExtra = 0;
wcex.hInstance = hInstance;
wcex.hIcon = (HICON)LoadImage(hInstance, MAKEINTRESOURCE(IDI_APSRVMON),
IMAGE_ICON, 32, 32, LR_DEFAULTCOLOR);
wcex.hCursor = g_hCursorArrow;
wcex.hbrBackground = (HBRUSH)(COLOR_WINDOW+1);
wcex.lpszMenuName = 0;
wcex.lpszClassName = g_szWindowClass;
wcex.hIconSm = (HICON)LoadImage(hInstance, MAKEINTRESOURCE(IDI_APSRVMON),
IMAGE_ICON, 16, 16, LR_DEFAULTCOLOR);
if (RegisterClassEx(&wcex)) {
hWnd = CreateWindow(g_szWindowClass, g_szTitle,
0, 0, 0, 0, 0,
NULL, NULL, hInstance, NULL);
}
return hWnd;
}
#ifndef UNICODE
/* Borrowed from CRT internal.h for _MBCS argc/argv parsing in this GUI app */
int __cdecl _setargv(void);
#endif
int WINAPI WinMain(HINSTANCE hInstance, HINSTANCE hPrevInstance,
LPSTR lpCmdLine, int nCmdShow)
{
TCHAR szTmp[MAX_LOADSTRING];
TCHAR szCmp[MAX_COMPUTERNAME_LENGTH+4];
MSG msg;
/* existing window */
HWND appwindow;
DWORD dwControl;
int i;
DWORD d;
if (!GetSystemOSVersion(&g_dwOSVersion))
{
ErrorMessage(NULL, TRUE);
return 1;
}
g_LangID = GetUserDefaultLangID();
if ((g_LangID & 0xFF) != LANG_ENGLISH) {
g_LangID = MAKELANGID(LANG_NEUTRAL, SUBLANG_NEUTRAL);
}
for (i = IDS_MSG_FIRST; i <= IDS_MSG_LAST; ++i) {
LoadString(hInstance, i, szTmp, MAX_LOADSTRING);
g_lpMsg[i - IDS_MSG_FIRST] = _tcsdup(szTmp);
}
LoadString(hInstance, IDS_APMONITORTITLE, szTmp, MAX_LOADSTRING);
d = MAX_COMPUTERNAME_LENGTH+1;
_tcscpy(szCmp, _T("\\\\"));
GetComputerName(szCmp + 2, &d);
_tcsupr(szCmp);
g_szLocalHost = _tcsdup(szCmp);
memset(g_stComputers, 0, sizeof(ST_MONITORED_COMP) * MAX_APACHE_COMPUTERS);
g_stComputers[0].szComputerName = _tcsdup(szCmp);
g_stComputers[0].hRegistry = HKEY_LOCAL_MACHINE;
g_szTitle = _tcsdup(szTmp);
LoadString(hInstance, IDS_APMONITORCLASS, szTmp, MAX_LOADSTRING);
g_szWindowClass = _tcsdup(szTmp);
appwindow = FindWindow(g_szWindowClass, g_szTitle);
#ifdef UNICODE
__wargv = CommandLineToArgvW(GetCommandLineW(), &__argc);
#else
#if defined(_MSC_VER) && _MSC_VER < 1800
_setargv();
#endif
#endif
if ((__argc == 2) && (_tcscmp(__targv[1], _T("--kill")) == 0))
{
/* Off to chase and close up every ApacheMonitor taskbar window */
return KillAllMonitors();
}
else if ((__argc == 4) && (g_dwOSVersion >= OS_VERSION_WIN2K))
{
dwControl = _ttoi(__targv[1]);
if ((dwControl != SERVICE_CONTROL_CONTINUE) &&
(dwControl != SERVICE_APACHE_RESTART) &&
(dwControl != SERVICE_CONTROL_STOP))
{
return 1;
}
/* Chase down and close up our session's previous window */
if ((appwindow) != NULL)
KillAWindow(appwindow);
}
else if (__argc != 1) {
return 1;
}
else if (appwindow)
{
ErrorMessage(g_lpMsg[IDS_MSG_APPRUNNING - IDS_MSG_FIRST], FALSE);
return 0;
}
g_icoStop = LoadImage(hInstance, MAKEINTRESOURCE(IDI_ICOSTOP),
IMAGE_ICON, 16, 16, LR_DEFAULTCOLOR);
g_icoRun = LoadImage(hInstance, MAKEINTRESOURCE(IDI_ICORUN),
IMAGE_ICON, 16, 16, LR_DEFAULTCOLOR);
g_hCursorHourglass = LoadImage(NULL, MAKEINTRESOURCE(OCR_WAIT),
IMAGE_CURSOR, LR_DEFAULTSIZE,
LR_DEFAULTSIZE, LR_SHARED);
g_hCursorArrow = LoadImage(NULL, MAKEINTRESOURCE(OCR_NORMAL),
IMAGE_CURSOR, LR_DEFAULTSIZE,
LR_DEFAULTSIZE, LR_SHARED);
g_hBmpStart = LoadImage(hInstance, MAKEINTRESOURCE(IDB_BMPRUN),
IMAGE_BITMAP, XBITMAP, YBITMAP,
LR_DEFAULTCOLOR);
g_hBmpStop = LoadImage(hInstance, MAKEINTRESOURCE(IDB_BMPSTOP),
IMAGE_BITMAP, XBITMAP, YBITMAP,
LR_DEFAULTCOLOR);
memset(g_stServices, 0, sizeof(ST_APACHE_SERVICE) * MAX_APACHE_SERVICES);
CoInitialize(NULL);
InitCommonControls();
g_hInstance = hInstance;
g_hwndMain = CreateMainWindow(hInstance);
g_bUiTaskbarCreated = RegisterWindowMessage(_T("TaskbarCreated"));
InitializeCriticalSection(&g_stcSection);
g_hwndServiceDlg = NULL;
if (g_hwndMain != NULL)
{
/* To avoid recursion, pass ImagePath NULL (a noop on NT and later) */
if ((__argc == 4) && (g_dwOSVersion >= OS_VERSION_WIN2K))
ApacheManageService(__targv[2], NULL, __targv[3], dwControl);
while (GetMessage(&msg, NULL, 0, 0) == TRUE)
{
TranslateMessage(&msg);
DispatchMessage(&msg);
}
am_ClearServicesSt();
}
am_ClearComputersSt();
DeleteCriticalSection(&g_stcSection);
DestroyIcon(g_icoStop);
DestroyIcon(g_icoRun);
DestroyCursor(g_hCursorHourglass);
DestroyCursor(g_hCursorArrow);
DeleteObject(g_hBmpStart);
DeleteObject(g_hBmpStop);
CoUninitialize();
return 0;
}
|
63552b4086e4a9464016c8b80fc8ddd713af4576
|
376e1818d427b5e4d32fa6dd6c7b71e9fd88afdb
|
/databases/mysql80-client/patches/patch-storage_innobase_include_detail_ut_large__page__alloc-linux.h
|
ecef3320df68e6f5bfbae911d7494245cd31ec91
|
[] |
no_license
|
NetBSD/pkgsrc
|
a0732c023519650ef821ab89c23ab6ab59e25bdb
|
d042034ec4896cc5b47ed6f2e5b8802d9bc5c556
|
refs/heads/trunk
| 2023-09-01T07:40:12.138283
| 2023-09-01T05:25:19
| 2023-09-01T05:25:19
| 88,439,572
| 321
| 138
| null | 2023-07-12T22:34:14
| 2017-04-16T20:04:15
| null |
UTF-8
|
C
| false
| false
| 746
|
h
|
patch-storage_innobase_include_detail_ut_large__page__alloc-linux.h
|
$NetBSD: patch-storage_innobase_include_detail_ut_large__page__alloc-linux.h,v 1.1 2022/11/26 12:25:22 nia Exp $
MAP_HUGETLB is unavailable on other operating systems than FreeBSD,
correctly map it as a Linuxism.
--- storage/innobase/include/detail/ut/large_page_alloc-linux.h.orig 2022-09-13 16:15:16.000000000 +0000
+++ storage/innobase/include/detail/ut/large_page_alloc-linux.h
@@ -52,7 +52,7 @@ inline void *large_page_aligned_alloc(si
// mmap will internally round n_bytes to the multiple of huge-page size if it
// is not already
int mmap_flags = MAP_PRIVATE | MAP_ANON;
-#ifndef __FreeBSD__
+#ifdef __linux
mmap_flags |= MAP_HUGETLB;
#endif
void *ptr = mmap(nullptr, n_bytes, PROT_READ | PROT_WRITE, mmap_flags, -1, 0);
|
fa263432676fdf7463b9b9147781f5e64633cd3b
|
9907672fcd81ab73ac63b2a83422a82bf31eadde
|
/codeforces/tyama_codeforces743B.c
|
343e01a31d6a514367b850fe300dbce77429f21a
|
[
"0BSD"
] |
permissive
|
cielavenir/procon
|
bbe1974b9bddb51b76d58722a0686a5b477c4456
|
746e1a91f574f20647e8aaaac0d9e6173f741176
|
refs/heads/master
| 2023-06-21T23:11:24.562546
| 2023-06-11T13:15:15
| 2023-06-11T13:15:15
| 7,557,464
| 137
| 136
| null | 2020-10-20T09:35:52
| 2013-01-11T09:40:26
|
C++
|
UTF-8
|
C
| false
| false
| 79
|
c
|
tyama_codeforces743B.c
|
long long k;main(){scanf("%d%lld",&k,&k);printf("%d\n",1+__builtin_ctzll(k));}
|
a2dd04f8462e15c0af90c59548db0d221a13aa5f
|
d325e0d8d87128cc86e975a822516604a71294e9
|
/drivers/MSP432/odometer/odometer.c
|
486d892033927b5a72ccefe84852b65a0958aeef
|
[] |
no_license
|
terjeio/grblHAL
|
12b93d229b046bc09c87902c3569767337dd270a
|
cd693465a8d7b9dabf1d85acdf3eba40a0994db1
|
refs/heads/master
| 2022-01-27T19:09:19.281567
| 2021-12-27T06:34:25
| 2021-12-27T06:34:25
| 142,401,894
| 251
| 104
| null | 2021-03-18T06:16:59
| 2018-07-26T07:00:52
|
C
|
UTF-8
|
C
| false
| false
| 8,568
|
c
|
odometer.c
|
/*
odometer.c - axis odometers including run time + spindle run time
Part of grblHAL
Copyright (c) 2020-2021 Terje Io
Grbl is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
Grbl is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with Grbl. If not, see <http://www.gnu.org/licenses/>.
*/
#ifdef ARDUINO
#include "../driver.h"
#else
#include "driver.h"
#endif
#if ODOMETER_ENABLE
#include <string.h>
#include <stdio.h>
#ifdef ARDUINO
#include "../grbl/system.h"
#include "../grbl/protocol.h"
#include "../grbl/nvs_buffer.h"
#else
#include "grbl/system.h"
#include "grbl/protocol.h"
#include "grbl/nvs_buffer.h"
#endif
typedef struct {
uint64_t motors;
uint64_t spindle;
float distance[N_AXIS];
} odometer_data_t;
static uint32_t steps[N_AXIS] = {0};
static bool odometer_changed = false;
static uint32_t odometers_address, odometers_address_prv;
static odometer_data_t odometers, odometers_prv;
static nvs_io_t nvs;
static stepper_pulse_start_ptr stepper_pulse_start;
static on_state_change_ptr on_state_change;
static spindle_set_state_ptr spindle_set_state_;
static settings_changed_ptr settings_changed;
static on_report_options_ptr on_report_options;
static on_report_command_help_ptr on_report_command_help;
static void stepperPulseStart (stepper_t *stepper)
{
odometer_changed = true;
if(stepper->step_outbits.x)
steps[X_AXIS]++;
if(stepper->step_outbits.y)
steps[Y_AXIS]++;
if(stepper->step_outbits.z)
steps[Z_AXIS]++;
#ifdef A_AXIS
if(stepper->step_outbits.a)
steps[A_AXIS]++;
#endif
#ifdef B_AXIS
if(stepper->step_outbits.b)
steps[B_AXIS]++;
#endif
#ifdef C_AXIS
if(stepper->step_outbits.b)
steps[C_AXIS]++;
#endif
stepper_pulse_start(stepper);
}
void onStateChanged (sys_state_t state)
{
static uint32_t ms = 0;
if(state & (STATE_CYCLE|STATE_JOG|STATE_HOMING|STATE_SAFETY_DOOR))
ms = hal.get_elapsed_ticks();
else if(odometer_changed) {
uint_fast8_t idx = N_AXIS;
odometer_changed = false;
odometers.motors += (hal.get_elapsed_ticks() - ms);
do {
if(steps[--idx]) {
odometers.distance[idx] += (float)steps[idx] / settings.axis[idx].steps_per_mm;
steps[idx] = 0;
}
} while(idx);
nvs.memcpy_to_nvs(odometers_address, (uint8_t *)&odometers, sizeof(odometer_data_t), true);
}
if(on_state_change)
on_state_change(state);
}
// Called by foreground process.
static void odometers_write (sys_state_t state)
{
nvs.memcpy_to_nvs(odometers_address, (uint8_t *)&odometers, sizeof(odometer_data_t), true);
}
ISR_CODE static void onSpindleSetState (spindle_state_t state, float rpm)
{
static uint32_t ms = 0;
spindle_set_state_(state, rpm);
if(state.on)
ms = hal.get_elapsed_ticks();
else if(ms) {
odometers.spindle += (hal.get_elapsed_ticks() - ms);
ms = 0;
// Write odometer data in foreground process.
protocol_enqueue_rt_command(odometers_write);
}
}
// Reclaim entry points that may have been changed on settings change.
static void onSettingsChanged (settings_t *settings)
{
settings_changed(settings);
if(hal.spindle.set_state != onSpindleSetState) {
spindle_set_state_ = hal.spindle.set_state;
hal.spindle.set_state = onSpindleSetState;
}
if(hal.stepper.pulse_start != stepperPulseStart) {
stepper_pulse_start = hal.stepper.pulse_start;
hal.stepper.pulse_start = stepperPulseStart;
}
}
static void odometer_data_reset (bool backup)
{
if(backup) {
memcpy(&odometers_prv, &odometers, sizeof(odometer_data_t));
nvs.memcpy_to_nvs(odometers_address_prv, (uint8_t *)&odometers_prv, sizeof(odometer_data_t), true);
}
memset(&odometers, 0, sizeof(odometer_data_t));
nvs.memcpy_to_nvs(odometers_address, (uint8_t *)&odometers, sizeof(odometer_data_t), true);
}
static void odometers_report (odometer_data_t *odometers)
{
char buf[40];
uint_fast8_t idx;
uint32_t hr = odometers->spindle / 3600000, min = (odometers->spindle / 60000) % 60;
sprintf(buf, "SPINDLEHRS %ld:%.2ld", hr, min);
report_message(buf, Message_Plain);
hr = odometers->motors / 3600000;
min = (odometers->motors / 60000) % 60;
sprintf(buf, "MOTORHRS %ld:%.2ld", hr, min);
report_message(buf, Message_Plain);
for(idx = 0 ; idx < N_AXIS ; idx++) {
sprintf(buf, "ODOMETER%s %s", axis_letter[idx], ftoa(odometers->distance[idx] / 1000.0f, 1)); // meters
report_message(buf, Message_Plain);
}
}
static status_code_t odometer_command (sys_state_t state, char *args)
{
status_code_t retval = Status_Unhandled;
if(args == NULL) {
odometers_report(&odometers);
retval = Status_OK;
} else {
strcaps(args);
if(!strcmp(args, "PREV")) {
if(nvs.memcpy_from_nvs((uint8_t *)&odometers_prv, odometers_address_prv, sizeof(odometer_data_t), true) == NVS_TransferResult_OK)
odometers_report(&odometers_prv);
else
report_message("Previous odometer values not available", Message_Warning);
retval = Status_OK;
}
if(!strcmp(args, "RST")) {
odometer_data_reset(true);
retval = Status_OK;
}
}
return retval;
}
const sys_command_t odometer_command_list[] = {
{"ODOMETERS", false, odometer_command},
};
static sys_commands_t odometer_commands = {
.n_commands = sizeof(odometer_command_list) / sizeof(sys_command_t),
.commands = odometer_command_list
};
sys_commands_t *odometer_get_commands()
{
return &odometer_commands;
}
static void onReportCommandHelp (void)
{
hal.stream.write("$ODOMETERS - list odometer log" ASCII_EOL);
hal.stream.write("$ODOMETERS=PREV - list previous odometer log when available" ASCII_EOL);
hal.stream.write("$ODOMETERS=RST - copy current log to previous and clear current" ASCII_EOL);
if(on_report_command_help)
on_report_command_help();
}
static void onReportOptions (bool newopt)
{
on_report_options(newopt);
if(newopt)
hal.stream.write(",ODO");
else
hal.stream.write("[PLUGIN:ODOMETERS v0.02]" ASCII_EOL);
}
static void odometer_warning1 (uint_fast16_t state)
{
report_message("EEPROM or FRAM is required for odometers!", Message_Warning);
}
static void odometer_warning2 (uint_fast16_t state)
{
report_message("Not enough NVS storage for odometers!", Message_Warning);
}
void odometer_init()
{
memcpy(&nvs, nvs_buffer_get_physical(), sizeof(nvs_io_t));
if(!(nvs.type == NVS_EEPROM || nvs.type == NVS_FRAM))
protocol_enqueue_rt_command(odometer_warning1);
else if(NVS_SIZE - GRBL_NVS_SIZE - hal.nvs.driver_area.size < ((sizeof(odometer_data_t) + NVS_CRC_BYTES) * 2))
protocol_enqueue_rt_command(odometer_warning2);
else {
odometers_address = NVS_SIZE - (sizeof(odometer_data_t) + NVS_CRC_BYTES);
odometers_address_prv = odometers_address - (sizeof(odometer_data_t) + NVS_CRC_BYTES);
if(nvs.memcpy_from_nvs((uint8_t *)&odometers, odometers_address, sizeof(odometer_data_t), true) != NVS_TransferResult_OK)
odometer_data_reset(false);
hal.driver_cap.odometers = On;
odometer_commands.on_get_commands = grbl.on_get_commands;
grbl.on_get_commands = odometer_get_commands;
on_state_change = grbl.on_state_change;
grbl.on_state_change = onStateChanged;
on_report_options = grbl.on_report_options;
grbl.on_report_options = onReportOptions;
on_report_command_help = grbl.on_report_command_help;
grbl.on_report_command_help = onReportCommandHelp;
settings_changed = hal.settings_changed;
hal.settings_changed = onSettingsChanged;
spindle_set_state_ = hal.spindle.set_state;
hal.spindle.set_state = onSpindleSetState;
stepper_pulse_start = hal.stepper.pulse_start;
hal.stepper.pulse_start = stepperPulseStart;
}
}
#endif
|
39377b1022afa554b022722ce44550134468a994
|
88ae8695987ada722184307301e221e1ba3cc2fa
|
/third_party/wayland-protocols/gtk/demos/gtk-demo/iconview.c
|
030e9a896a87d81158938967c45969d6c81c9749
|
[
"BSD-3-Clause",
"Apache-2.0",
"LGPL-2.0-or-later",
"MIT",
"GPL-1.0-or-later",
"LGPL-2.0-only",
"LGPL-2.1-only"
] |
permissive
|
iridium-browser/iridium-browser
|
71d9c5ff76e014e6900b825f67389ab0ccd01329
|
5ee297f53dc7f8e70183031cff62f37b0f19d25f
|
refs/heads/master
| 2023-08-03T16:44:16.844552
| 2023-07-20T15:17:00
| 2023-07-23T16:09:30
| 220,016,632
| 341
| 40
|
BSD-3-Clause
| 2021-08-13T13:54:45
| 2019-11-06T14:32:31
| null |
UTF-8
|
C
| false
| false
| 8,517
|
c
|
iconview.c
|
/* Icon View/Icon View Basics
*
* The GtkIconView widget is used to display and manipulate icons.
* It uses a GtkTreeModel for data storage, so the list store
* example might be helpful.
*/
#include <glib/gi18n.h>
#include <gtk/gtk.h>
#include <string.h>
static GtkWidget *window = NULL;
#define FOLDER_NAME "/iconview/gnome-fs-directory.png"
#define FILE_NAME "/iconview/gnome-fs-regular.png"
enum
{
COL_PATH,
COL_DISPLAY_NAME,
COL_PIXBUF,
COL_IS_DIRECTORY,
NUM_COLS
};
static GdkPixbuf *file_pixbuf, *folder_pixbuf;
char *parent;
GtkWidget *up_button;
/* Loads the images for the demo and returns whether the operation succeeded */
static void
load_pixbufs (void)
{
if (file_pixbuf)
return; /* already loaded earlier */
file_pixbuf = gdk_pixbuf_new_from_resource (FILE_NAME, NULL);
/* resources must load successfully */
g_assert (file_pixbuf);
folder_pixbuf = gdk_pixbuf_new_from_resource (FOLDER_NAME, NULL);
g_assert (folder_pixbuf);
}
static void
fill_store (GtkListStore *store)
{
GDir *dir;
const char *name;
GtkTreeIter iter;
/* First clear the store */
gtk_list_store_clear (store);
/* Now go through the directory and extract all the file
* information */
dir = g_dir_open (parent, 0, NULL);
if (!dir)
return;
name = g_dir_read_name (dir);
while (name != NULL)
{
char *path, *display_name;
gboolean is_dir;
/* We ignore hidden files that start with a '.' */
if (name[0] != '.')
{
path = g_build_filename (parent, name, NULL);
is_dir = g_file_test (path, G_FILE_TEST_IS_DIR);
display_name = g_filename_to_utf8 (name, -1, NULL, NULL, NULL);
gtk_list_store_append (store, &iter);
gtk_list_store_set (store, &iter,
COL_PATH, path,
COL_DISPLAY_NAME, display_name,
COL_IS_DIRECTORY, is_dir,
COL_PIXBUF, is_dir ? folder_pixbuf : file_pixbuf,
-1);
g_free (path);
g_free (display_name);
}
name = g_dir_read_name (dir);
}
g_dir_close (dir);
}
static int
sort_func (GtkTreeModel *model,
GtkTreeIter *a,
GtkTreeIter *b,
gpointer user_data)
{
gboolean is_dir_a, is_dir_b;
char *name_a, *name_b;
int ret;
/* We need this function because we want to sort
* folders before files.
*/
gtk_tree_model_get (model, a,
COL_IS_DIRECTORY, &is_dir_a,
COL_DISPLAY_NAME, &name_a,
-1);
gtk_tree_model_get (model, b,
COL_IS_DIRECTORY, &is_dir_b,
COL_DISPLAY_NAME, &name_b,
-1);
if (!is_dir_a && is_dir_b)
ret = 1;
else if (is_dir_a && !is_dir_b)
ret = -1;
else
{
ret = g_utf8_collate (name_a, name_b);
}
g_free (name_a);
g_free (name_b);
return ret;
}
static GtkListStore *
create_store (void)
{
GtkListStore *store;
store = gtk_list_store_new (NUM_COLS,
G_TYPE_STRING,
G_TYPE_STRING,
GDK_TYPE_PIXBUF,
G_TYPE_BOOLEAN);
/* Set sort column and function */
gtk_tree_sortable_set_default_sort_func (GTK_TREE_SORTABLE (store),
sort_func,
NULL, NULL);
gtk_tree_sortable_set_sort_column_id (GTK_TREE_SORTABLE (store),
GTK_TREE_SORTABLE_DEFAULT_SORT_COLUMN_ID,
GTK_SORT_ASCENDING);
return store;
}
static void
item_activated (GtkIconView *icon_view,
GtkTreePath *tree_path,
gpointer user_data)
{
GtkListStore *store;
char *path;
GtkTreeIter iter;
gboolean is_dir;
store = GTK_LIST_STORE (user_data);
gtk_tree_model_get_iter (GTK_TREE_MODEL (store),
&iter, tree_path);
gtk_tree_model_get (GTK_TREE_MODEL (store), &iter,
COL_PATH, &path,
COL_IS_DIRECTORY, &is_dir,
-1);
if (!is_dir)
{
g_free (path);
return;
}
/* Replace parent with path and re-fill the model*/
g_free (parent);
parent = path;
fill_store (store);
/* Sensitize the up button */
gtk_widget_set_sensitive (GTK_WIDGET (up_button), TRUE);
}
static void
up_clicked (GtkButton *item,
gpointer user_data)
{
GtkListStore *store;
char *dir_name;
store = GTK_LIST_STORE (user_data);
dir_name = g_path_get_dirname (parent);
g_free (parent);
parent = dir_name;
fill_store (store);
/* Maybe de-sensitize the up button */
gtk_widget_set_sensitive (GTK_WIDGET (up_button),
strcmp (parent, "/") != 0);
}
static void
home_clicked (GtkButton *item,
gpointer user_data)
{
GtkListStore *store;
store = GTK_LIST_STORE (user_data);
g_free (parent);
parent = g_strdup (g_get_home_dir ());
fill_store (store);
/* Sensitize the up button */
gtk_widget_set_sensitive (GTK_WIDGET (up_button),
TRUE);
}
static void close_window(void)
{
gtk_window_destroy (GTK_WINDOW (window));
window = NULL;
g_object_unref (file_pixbuf);
file_pixbuf = NULL;
g_object_unref (folder_pixbuf);
folder_pixbuf = NULL;
}
GtkWidget *
do_iconview (GtkWidget *do_widget)
{
if (!window)
{
GtkWidget *sw;
GtkWidget *icon_view;
GtkListStore *store;
GtkWidget *vbox;
GtkWidget *tool_bar;
GtkWidget *home_button;
window = gtk_window_new ();
gtk_window_set_default_size (GTK_WINDOW (window), 650, 400);
gtk_window_set_display (GTK_WINDOW (window),
gtk_widget_get_display (do_widget));
gtk_window_set_title (GTK_WINDOW (window), "Icon View Basics");
g_signal_connect (window, "destroy",
G_CALLBACK (close_window), NULL);
load_pixbufs ();
vbox = gtk_box_new (GTK_ORIENTATION_VERTICAL, 0);
gtk_window_set_child (GTK_WINDOW (window), vbox);
tool_bar = gtk_box_new (GTK_ORIENTATION_HORIZONTAL, 0);
gtk_box_append (GTK_BOX (vbox), tool_bar);
up_button = gtk_button_new_with_mnemonic ("_Up");
gtk_widget_set_sensitive (GTK_WIDGET (up_button), FALSE);
gtk_box_append (GTK_BOX (tool_bar), up_button);
home_button = gtk_button_new_with_mnemonic ("_Home");
gtk_box_append (GTK_BOX (tool_bar), home_button);
sw = gtk_scrolled_window_new ();
gtk_scrolled_window_set_has_frame (GTK_SCROLLED_WINDOW (sw), TRUE);
gtk_scrolled_window_set_policy (GTK_SCROLLED_WINDOW (sw),
GTK_POLICY_AUTOMATIC,
GTK_POLICY_AUTOMATIC);
gtk_widget_set_vexpand (sw, TRUE);
gtk_box_append (GTK_BOX (vbox), sw);
/* Create the store and fill it with the contents of '/' */
parent = g_strdup ("/");
store = create_store ();
fill_store (store);
icon_view = gtk_icon_view_new_with_model (GTK_TREE_MODEL (store));
gtk_icon_view_set_selection_mode (GTK_ICON_VIEW (icon_view),
GTK_SELECTION_MULTIPLE);
g_object_unref (store);
/* Connect to the "clicked" signal of the "Up" tool button */
g_signal_connect (up_button, "clicked",
G_CALLBACK (up_clicked), store);
/* Connect to the "clicked" signal of the "Home" tool button */
g_signal_connect (home_button, "clicked",
G_CALLBACK (home_clicked), store);
/* We now set which model columns that correspond to the text
* and pixbuf of each item
*/
gtk_icon_view_set_text_column (GTK_ICON_VIEW (icon_view), COL_DISPLAY_NAME);
gtk_icon_view_set_pixbuf_column (GTK_ICON_VIEW (icon_view), COL_PIXBUF);
/* Connect to the "item-activated" signal */
g_signal_connect (icon_view, "item-activated",
G_CALLBACK (item_activated), store);
gtk_scrolled_window_set_child (GTK_SCROLLED_WINDOW (sw), icon_view);
gtk_widget_grab_focus (icon_view);
}
if (!gtk_widget_get_visible (window))
gtk_widget_show (window);
else
gtk_window_destroy (GTK_WINDOW (window));
return window;
}
|
f4c512bf7a8fe92d144dabc68733261a255665a1
|
9de0cec678bc4a3bec2b4adabef9f39ff5b4afac
|
/PWG/EMCAL/macros/AddTestAliEmcalTrackSelection.C
|
97cea68d60e67bfd2838d4849f3517fdf30bee16
|
[] |
permissive
|
alisw/AliPhysics
|
91bf1bd01ab2af656a25ff10b25e618a63667d3e
|
5df28b2b415e78e81273b0d9bf5c1b99feda3348
|
refs/heads/master
| 2023-08-31T20:41:44.927176
| 2023-08-31T14:51:12
| 2023-08-31T14:51:12
| 61,661,378
| 129
| 1,150
|
BSD-3-Clause
| 2023-09-14T18:48:45
| 2016-06-21T19:31:29
|
C++
|
UTF-8
|
C
| false
| false
| 179
|
c
|
AddTestAliEmcalTrackSelection.C
|
PWG::EMCAL::TestAliEmcalTrackSelection *AddTestAliEmcalTrackSelection(const char *name){
return PWG::EMCAL::TestAliEmcalTrackSelection::AddTestAliEmcalTrackSelection(name);
}
|
de2d34da86361b52098b843741bea1cbfd5f7579
|
ffdc77394c5b5532b243cf3c33bd584cbdc65cb7
|
/mindspore/ccsrc/plugin/device/cpu/kernel/nnacl/fp16/deconv_winograd_fp16.c
|
c48ee1b09c600c9949da313b264cdc1fcdc71ca3
|
[
"Apache-2.0",
"LicenseRef-scancode-proprietary-license",
"MPL-1.0",
"OpenSSL",
"LGPL-3.0-only",
"LicenseRef-scancode-warranty-disclaimer",
"BSD-3-Clause-Open-MPI",
"MIT",
"MPL-2.0-no-copyleft-exception",
"NTP",
"BSD-3-Clause",
"GPL-1.0-or-later",
"0BSD",
"MPL-2.0",
"LicenseRef-scancode-free-unknown",
"AGPL-3.0-only",
"Libpng",
"MPL-1.1",
"IJG",
"GPL-2.0-only",
"BSL-1.0",
"Zlib",
"LicenseRef-scancode-public-domain",
"LicenseRef-scancode-python-cwi",
"BSD-2-Clause",
"LicenseRef-scancode-gary-s-brown",
"LGPL-2.1-only",
"LicenseRef-scancode-other-permissive",
"Python-2.0",
"LicenseRef-scancode-mit-nagy",
"LicenseRef-scancode-other-copyleft",
"LicenseRef-scancode-unknown-license-reference",
"Unlicense"
] |
permissive
|
mindspore-ai/mindspore
|
ca7d5bb51a3451c2705ff2e583a740589d80393b
|
54acb15d435533c815ee1bd9f6dc0b56b4d4cf83
|
refs/heads/master
| 2023-07-29T09:17:11.051569
| 2023-07-17T13:14:15
| 2023-07-17T13:14:15
| 239,714,835
| 4,178
| 768
|
Apache-2.0
| 2023-07-26T22:31:11
| 2020-02-11T08:43:48
|
C++
|
UTF-8
|
C
| false
| false
| 21,974
|
c
|
deconv_winograd_fp16.c
|
/**
* Copyright 2020 Huawei Technologies Co., Ltd
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "nnacl/fp16/deconv_winograd_fp16.h"
#include "nnacl/base/minimal_filtering_generator.h"
void DeConvWgInputPackFp16(const float16_t *src_ptr, float16_t *dst_ptr, int channel, int stride) {
int ic4div = channel / C4NUM;
int ic4mod = channel % C4NUM;
const float16_t *src = src_ptr;
float16_t *dst = dst_ptr;
for (int ic = 0; ic < ic4div; ic++) {
vst1_f16(dst, vld1_f16(src));
dst += stride;
src += C4NUM;
}
if (ic4mod != 0) {
int ic_res = 0;
for (; ic_res < ic4mod; ic_res++) {
dst[ic_res] = src[ic_res];
}
for (; ic_res < C4NUM; ic_res++) {
dst[ic_res] = 0;
}
}
return;
}
#ifdef ENABLE_ARM82_A32
void DeconvWgMergeFp16A32Fun(const float16_t *src_ptr, float16_t *dst_ptr, size_t src_step, size_t dst_step) {
asm volatile(
"mov r0, %[src_ptr]\n"
"mov r1, %[dst_ptr]\n"
"mov r2, r1\n"
"vld1.16 {d0}, [r0], %[src_step]\n"
"vld1.16 {d2}, [r1], %[dst_step]\n"
"vld1.16 {d4}, [r0], %[src_step]\n"
"vld1.16 {d6}, [r1], %[dst_step]\n"
"vadd.f16 d0, d0, d2\n"
"vld1.16 {d8}, [r0], %[src_step]\n"
"vadd.f16 d4, d4, d6\n"
"vst1.16 {d0}, [r2], %[dst_step]\n"
"vst1.16 {d4}, [r2], %[dst_step]\n"
"vld1.16 {d10}, [r1], %[dst_step]\n"
"vld1.16 {d12}, [r0], %[src_step]\n"
"vadd.f16 d8, d8, d10\n"
"vld1.16 {d14}, [r1], %[dst_step]\n"
"vadd.f16 d12, d12, d14\n"
"vld1.16 {d0}, [r0], %[src_step]\n"
"vst1.16 {d8}, [r2], %[dst_step]\n"
"vst1.16 {d12}, [r2], %[dst_step]\n"
"vld1.16 {d2}, [r1], %[dst_step]\n"
"vld1.16 {d4}, [r0], %[src_step]\n"
"vld1.16 {d6}, [r1], %[dst_step]\n"
"vadd.f16 d0, d0, d2\n"
"vadd.f16 d4, d4, d6\n"
"vst1.16 {d0}, [r2], %[dst_step]\n"
"vst1.16 {d4}, [r2], %[dst_step]\n"
"vld1.16 {d8}, [r0], %[src_step]\n"
"vld1.16 {d10}, [r1], %[dst_step]\n"
"vld1.16 {d12}, [r0], %[src_step]\n"
"vld1.16 {d14}, [r1], %[dst_step]\n"
"vadd.f16 d8, d8, d10\n"
"vadd.f16 d12, d12, d14\n"
"vst1.16 {d8}, [r2], %[dst_step]\n"
"vst1.16 {d12}, [r2], %[dst_step]\n"
:
: [ src_ptr ] "r"(src_ptr), [ dst_ptr ] "r"(dst_ptr), [ src_step ] "r"(src_step), [ dst_step ] "r"(dst_step)
: "r0", "r1", "r2", "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7");
}
#endif
void DeConvWgMergeFp16(const float16_t *src, float16_t *dst, size_t src_stride, size_t dst_stride, size_t count) {
const float16_t *src_ptr = src;
float16_t *dst_ptr = dst;
size_t cuont8 = count / C8NUM * C8NUM;
int i = 0;
for (; i < cuont8; i += C8NUM) {
#ifdef ENABLE_ARM64
size_t src_step = src_stride * sizeof(float16_t);
size_t dst_step = dst_stride * sizeof(float16_t);
asm volatile(
"mov x7, %[src_ptr]\n"
"mov x8, %[dst_ptr]\n"
"mov x10, x8\n"
"ld1 {v0.4h}, [x7], %[src_step]\n"
"ld1 {v1.4h}, [x8], %[dst_step]\n"
"ld1 {v2.4h}, [x7], %[src_step]\n"
"ld1 {v3.4h}, [x8], %[dst_step]\n"
"fadd v0.4h, v0.4h, v1.4h\n"
"ld1 {v4.4h}, [x7], %[src_step]\n"
"fadd v2.4h, v2.4h, v3.4h\n"
"st1 {v0.4h}, [x10], %[dst_step]\n"
"st1 {v2.4h}, [x10], %[dst_step]\n"
"ld1 {v5.4h}, [x8], %[dst_step]\n"
"ld1 {v6.4h}, [x7], %[src_step]\n"
"fadd v4.4h, v4.4h, v5.4h\n"
"ld1 {v7.4h}, [x8], %[dst_step]\n"
"fadd v6.4h, v6.4h, v7.4h\n"
"ld1 {v0.4h}, [x7], %[src_step]\n"
"st1 {v4.4h}, [x10], %[dst_step]\n"
"st1 {v6.4h}, [x10], %[dst_step]\n"
"ld1 {v1.4h}, [x8], %[dst_step]\n"
"ld1 {v2.4h}, [x7], %[src_step]\n"
"ld1 {v3.4h}, [x8], %[dst_step]\n"
"fadd v0.4h, v0.4h, v1.4h\n"
"fadd v2.4h, v2.4h, v3.4h\n"
"st1 {v0.4h}, [x10], %[dst_step]\n"
"st1 {v2.4h}, [x10], %[dst_step]\n"
"ld1 {v4.4h}, [x7], %[src_step]\n"
"ld1 {v5.4h}, [x8], %[dst_step]\n"
"ld1 {v6.4h}, [x7], %[src_step]\n"
"ld1 {v7.4h}, [x8], %[dst_step]\n"
"fadd v4.4h, v4.4h, v5.4h\n"
"fadd v6.4h, v6.4h, v7.4h\n"
"st1 {v4.4h}, [x10], %[dst_step]\n"
"st1 {v6.4h}, [x10], %[dst_step]\n"
:
: [ src_ptr ] "r"(src_ptr), [ dst_ptr ] "r"(dst_ptr), [ src_step ] "r"(src_step), [ dst_step ] "r"(dst_step)
: "x7", "x8", "x10", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7");
#elif defined(ENABLE_ARM82_A32)
size_t src_step = src_stride * sizeof(float16_t);
size_t dst_step = dst_stride * sizeof(float16_t);
DeconvWgMergeFp16A32Fun(src_ptr, dst_ptr, src_step, dst_step);
#else
for (int j = 0; j < C8NUM; j++) {
const float16_t *s = src_ptr + j * src_stride;
float16_t *d = dst_ptr + j * dst_stride;
for (int k = 0; k < C4NUM; k++) {
d[k] += s[k];
}
}
#endif
src_ptr += C8NUM * src_stride;
dst_ptr += C8NUM * dst_stride;
}
for (; i < count; i++) {
float16x4_t src_data = vld1_f16(src_ptr);
float16x4_t dst_data = vld1_f16(dst_ptr);
dst_data = vadd_f16(src_data, dst_data);
vst1_f16(dst_ptr, dst_data);
src_ptr += src_stride;
dst_ptr += dst_stride;
}
return;
}
void DeConvWgCalWgFp16(const float16_t *tile_in, float16_t *tile_out, const float16_t *weight_buf, float16_t *tmp_buf,
const float16_t *at_buf, float16_t *a_mid_buf, float16_t *trans_a_buf, bool *transferred,
const float16_t *bt_buf, float16_t *b_tmp_buf, int unit_size, int w_start, int h_start,
const ConvParameter *conv_param, const DeConvParam *deconv_param) {
int winograd_plane = unit_size * unit_size;
if (!transferred[unit_size]) {
WinogradTransLeftFp16(tile_in, at_buf, a_mid_buf, DECONV_WINOGRAD_DEFAULT_UNIT, unit_size,
DECONV_WINOGRAD_DEFAULT_UNIT, deconv_param->ic_div_ * DECONV_WINOGRAD_DEFAULT_TILE);
WinogradTransRightFp16(a_mid_buf, at_buf, trans_a_buf, unit_size, unit_size, DECONV_WINOGRAD_DEFAULT_UNIT,
deconv_param->ic_div_ * DECONV_WINOGRAD_DEFAULT_TILE);
transferred[unit_size] = true;
}
for (int index = 0; index < winograd_plane; index++) {
float16_t *src = trans_a_buf + index * DECONV_WINOGRAD_DEFAULT_TILE * deconv_param->ic_up_;
float16_t *dst = tmp_buf + index * deconv_param->oc_up_ * DECONV_WINOGRAD_DEFAULT_TILE;
const float16_t *weight = weight_buf + index * deconv_param->ic_up_ * deconv_param->oc_up_;
TiledC4MatmulFp16(dst, src, weight, DECONV_WINOGRAD_DEFAULT_TILE * C4NUM, deconv_param->ic_div_,
deconv_param->oc_div_);
}
WinogradTransLeftFp16(tmp_buf, bt_buf, b_tmp_buf, unit_size, unit_size, unit_size,
deconv_param->oc_div_ * DECONV_WINOGRAD_DEFAULT_TILE);
WinogradTransRightFp16(b_tmp_buf, bt_buf, tmp_buf, unit_size, unit_size, unit_size,
deconv_param->oc_div_ * DECONV_WINOGRAD_DEFAULT_TILE);
// Add to dest
for (int uhi = 0; uhi < unit_size; uhi++) {
int h_index = uhi * conv_param->stride_h_ + h_start;
for (int uwi = 0; uwi < unit_size; uwi++) {
int w_index = uwi * conv_param->stride_w_ + w_start;
float16_t *dst = tile_out + w_index * DECONV_WINOGRAD_DEFAULT_TILE * deconv_param->oc_up_ +
h_index * deconv_param->out_tile_w_ * DECONV_WINOGRAD_DEFAULT_TILE * deconv_param->oc_up_;
float16_t *src = tmp_buf + (uwi + uhi * unit_size) * DECONV_WINOGRAD_DEFAULT_TILE * deconv_param->oc_up_;
DeConvWgMergeFp16(src, dst, C4NUM, C4NUM, DECONV_WINOGRAD_DEFAULT_TILE * deconv_param->oc_div_);
}
}
return;
}
void DeConvWgCalCommFp16(const float16_t *tile_in, float16_t *tile_out, const float16_t *weight, float16_t *tmp_buf,
int h_start, int w_start, int h_size, int w_size, const ConvParameter *conv_param,
const DeConvParam *deconv_param) {
int count = deconv_param->oc_div_ * w_size * h_size;
int in_stride = DECONV_WINOGRAD_DEFAULT_TILE * deconv_param->ic_up_;
int out_stride = DECONV_WINOGRAD_DEFAULT_TILE * deconv_param->oc_up_;
for (int hi = 0; hi < DECONV_WINOGRAD_DEFAULT_UNIT; hi++) {
for (int wi = 0; wi < DECONV_WINOGRAD_DEFAULT_UNIT; wi++) {
const float16_t *src_in = tile_in + (wi + hi * DECONV_WINOGRAD_DEFAULT_UNIT) * in_stride;
TiledC4MatmulFp16(tmp_buf, src_in, weight, DECONV_WINOGRAD_DEFAULT_TILE * C4NUM, deconv_param->ic_div_, count);
for (int uhi = 0; uhi < h_size; uhi++) {
for (int uwi = 0; uwi < w_size; uwi++) {
int w_index = (wi + uwi) * conv_param->stride_w_ + w_start;
int h_index = (hi + uhi) * conv_param->stride_h_ + h_start;
float16_t *dst = tile_out + h_index * out_stride * deconv_param->out_tile_w_ + w_index * out_stride;
float16_t *src = tmp_buf + (uwi + uhi * w_size) * out_stride;
DeConvWgMergeFp16(src, dst, C4NUM, C4NUM, DECONV_WINOGRAD_DEFAULT_TILE * deconv_param->oc_div_);
}
}
}
}
return;
}
int PackDeConvWgDataFp16(const float16_t *nhwc_weight, DeConvComputeUnit *unit, const ConvParameter *conv_param,
const DeConvParam *deconv_param) {
int tmp_kernel_plane = unit->w_size_ * unit->h_size_;
int output_channel = conv_param->output_channel_;
int size = conv_param->input_channel_ * output_channel * tmp_kernel_plane;
float16_t *current_unit_weight = (float16_t *)malloc(size * sizeof(float16_t));
if (current_unit_weight == NULL) {
return NNACL_NULL_PTR;
}
for (int ic = 0; ic < conv_param->input_channel_; ic++) {
const float16_t *src_ic = nhwc_weight + deconv_param->kernel_plane_ * output_channel * ic;
float16_t *dst_ic = current_unit_weight + tmp_kernel_plane * output_channel * ic;
for (int uhi = 0; uhi < unit->h_size_; uhi++) {
for (int uwi = 0; uwi < unit->w_size_; uwi++) {
int src_h_offset = unit->h_start_ + uhi * conv_param->stride_h_;
int src_w_offset = unit->w_start_ + uwi * conv_param->stride_w_;
const float16_t *src_hw = src_ic + (src_h_offset * conv_param->kernel_w_ + src_w_offset) * output_channel;
float16_t *dst_hw = dst_ic + (uhi * unit->w_size_ + uwi) * output_channel;
memcpy(dst_hw, src_hw, output_channel * sizeof(float16_t));
}
}
}
if (unit->use_winograd_) {
/* Generate winograd */
float matrix_g[64];
float matrix_gt[64];
float matrix_a[64];
float matrix_at[64];
float matrix_b[64];
float matrix_bt[64];
int ret = CookToomFilter(matrix_a, matrix_at, matrix_b, matrix_bt, matrix_g, matrix_gt, 0.5f,
DECONV_WINOGRAD_DEFAULT_UNIT, unit->h_size_);
if (ret != NNACL_OK) {
free(current_unit_weight);
current_unit_weight = NULL;
return NNACL_ERRCODE_WINOGRAD_GENERATOR_ERROR;
}
/* winograd AT */
unit->winograd_.AT_ = malloc(unit->winograd_.i_ * unit->winograd_.o_ * sizeof(float16_t));
if (unit->winograd_.AT_ == NULL) {
free(current_unit_weight);
current_unit_weight = NULL;
return NNACL_NULL_PTR;
}
Float32ToFloat16(matrix_at, unit->winograd_.AT_, unit->winograd_.i_ * unit->winograd_.o_);
/* winograd BT */
unit->winograd_.BT_ = malloc(unit->winograd_.o_ * unit->winograd_.o_ * sizeof(float16_t));
if (unit->winograd_.BT_ == NULL) {
free(current_unit_weight);
free(unit->winograd_.AT_);
current_unit_weight = NULL;
unit->winograd_.AT_ = NULL;
return NNACL_NULL_PTR;
}
Float32ToFloat16(matrix_bt, unit->winograd_.BT_, unit->winograd_.o_ * unit->winograd_.o_);
/* winograd Weight */
size = conv_param->input_channel_ * output_channel * unit->winograd_.kh_ * unit->winograd_.kw_;
float16_t *winograd_unit_weight = (float16_t *)malloc(size * sizeof(float16_t));
if (winograd_unit_weight == NULL) {
free(current_unit_weight);
free(unit->winograd_.AT_);
free(unit->winograd_.BT_);
current_unit_weight = NULL;
unit->winograd_.AT_ = NULL;
unit->winograd_.BT_ = NULL;
return NNACL_NULL_PTR;
}
WinogradWeightTransformFp16(current_unit_weight, winograd_unit_weight, matrix_g, matrix_gt, C4NUM,
unit->winograd_.kh_, unit->h_size_, output_channel, conv_param->input_channel_, false);
/* reset weight data & info */
tmp_kernel_plane = unit->winograd_.kh_ * unit->winograd_.kw_;
free(current_unit_weight);
current_unit_weight = winograd_unit_weight;
winograd_unit_weight = NULL;
}
/* trans mhwc -> hw1:k1-knc0-c4:k1-knc5-c8:hw2:k1-knc0-c4:k1 */
float16_t *dst_weight = (float16_t *)unit->weight_;
size = deconv_param->ic_up_ * deconv_param->oc_up_ * tmp_kernel_plane;
memset(dst_weight, 0, size * sizeof(float16_t));
for (int ic = 0; ic < conv_param->input_channel_; ic++) {
for (int oc = 0; oc < output_channel; oc++) {
int oc4div = oc / C4NUM, oc4mod = oc % C4NUM;
for (int upi = 0; upi < tmp_kernel_plane; upi++) {
int src_index = ic * output_channel * tmp_kernel_plane + upi * output_channel + oc;
int dst_index = upi * deconv_param->oc_up_ * deconv_param->ic_up_ + oc4div * C4NUM * deconv_param->ic_up_ +
ic * C4NUM + oc4mod;
dst_weight[dst_index] = current_unit_weight[src_index];
}
}
}
free(current_unit_weight);
current_unit_weight = NULL;
return NNACL_OK;
}
void DeconvWgFp16(const float16_t *nhwc_input_, float16_t *tile_in, float16_t *tile_out, int start_index,
int calculate_count, const ConvParameter *conv_param, DeConvParam *deconv_param, int task_id) {
NNACL_CHECK_ZERO_RETURN(deconv_param->in_tile_w_count_);
/* pack tile input */
int tile_in_unit_stride = deconv_param->ic_up_ * DECONV_WINOGRAD_DEFAULT_TILE;
float16x4_t zero = vdup_n_f16(0.0f);
for (int unit_index = 0; unit_index < calculate_count; unit_index++) {
int plane_index = start_index + unit_index;
int w_unit_index = plane_index % deconv_param->in_tile_w_count_;
int h_unit_index = plane_index / deconv_param->in_tile_w_count_;
int w_start = w_unit_index * DECONV_WINOGRAD_DEFAULT_UNIT;
int h_start = h_unit_index * DECONV_WINOGRAD_DEFAULT_UNIT;
float16_t *dst_unit = tile_in + unit_index * C4NUM;
for (int hi = 0; hi < DECONV_WINOGRAD_DEFAULT_UNIT; hi++) {
for (int wi = 0; wi < DECONV_WINOGRAD_DEFAULT_UNIT; wi++) {
float16_t *dst = dst_unit + (wi + hi * DECONV_WINOGRAD_DEFAULT_UNIT) * tile_in_unit_stride;
int w_index = w_start + wi;
int h_index = h_start + hi;
if (w_index >= conv_param->input_w_ || h_index >= conv_param->input_h_) {
for (int ic4_index = 0; ic4_index < deconv_param->ic_div_; ic4_index++) {
vst1_f16(dst + ic4_index * DECONV_WINOGRAD_DEFAULT_TILE * C4NUM, zero);
}
continue;
}
const float16_t *src = nhwc_input_ + (w_index + h_index * conv_param->input_w_) * conv_param->input_channel_;
DeConvWgInputPackFp16(src, dst, conv_param->input_channel_, DECONV_WINOGRAD_DEFAULT_TILE * C4NUM);
}
}
}
/* compute */
bool transferred[DECONV_WINOGRAD_BUFFER_COUNT] = {false};
for (int i = 0; i < deconv_param->compute_size_; i++) {
DeConvComputeUnit *unit = &deconv_param->compute_units_[i];
if (unit->use_winograd_) {
float16_t *tmp_buf = (float16_t *)unit->tmp_buffer_ + task_id * unit->winograd_.kh_ * unit->winograd_.kw_ *
deconv_param->oc_up_ * DECONV_WINOGRAD_DEFAULT_TILE;
/* winograd a buffer */
if (unit->winograd_.kh_ >= DECONV_WINOGRAD_BUFFER_COUNT) {
return;
}
DeConvWgABuffer *tmp_a = &deconv_param->a_buffer_[unit->winograd_.kh_];
float16_t *mid_a = (float16_t *)tmp_a->middle_buffer_ + task_id * unit->winograd_.kw_ * unit->winograd_.kh_ *
DECONV_WINOGRAD_DEFAULT_TILE * deconv_param->ic_up_;
float16_t *dst_a = (float16_t *)tmp_a->dest_buffer_ + task_id * unit->winograd_.kw_ * unit->winograd_.kh_ *
DECONV_WINOGRAD_DEFAULT_TILE * deconv_param->ic_up_;
float16_t *tmp_b = (float16_t *)unit->winograd_.b_buffer_ + task_id * unit->winograd_.kh_ * unit->winograd_.kw_ *
DECONV_WINOGRAD_DEFAULT_TILE * deconv_param->oc_up_;
DeConvWgCalWgFp16(tile_in, tile_out, (float16_t *)unit->weight_, tmp_buf, unit->winograd_.AT_, mid_a, dst_a,
transferred, unit->winograd_.BT_, tmp_b, unit->winograd_.kh_, unit->w_start_, unit->h_start_,
conv_param, deconv_param);
} else {
float16_t *tmp_buf = (float16_t *)unit->tmp_buffer_ + task_id * deconv_param->oc_div_ * unit->w_size_ *
unit->h_size_ * DECONV_WINOGRAD_DEFAULT_TILE * C4NUM;
DeConvWgCalCommFp16(tile_in, tile_out, (float16_t *)unit->weight_, tmp_buf, unit->h_start_, unit->w_start_,
unit->h_size_, unit->w_size_, conv_param, deconv_param);
}
}
return;
}
void DeconvWgPostFp16(const float16_t *tile_out, float16_t *nc4hw4_output, const ConvParameter *conv_param,
const DeConvParam *deconv_param, int calculate_count, int tile_index) {
NNACL_CHECK_ZERO_RETURN(deconv_param->in_tile_w_count_);
/* merge */
int src_unit_stride = deconv_param->oc_up_ * DECONV_WINOGRAD_DEFAULT_TILE;
int src_stride = DECONV_WINOGRAD_DEFAULT_TILE * C4NUM;
int dst_stride = conv_param->output_w_ * conv_param->output_h_ * C4NUM;
for (int index = 0; index < calculate_count; ++index) {
const float16_t *src_start = tile_out + index * C4NUM;
int plane_index = tile_index * DECONV_WINOGRAD_DEFAULT_TILE + index;
int w_unit_index = plane_index % deconv_param->in_tile_w_count_;
int h_unit_index = plane_index / deconv_param->in_tile_w_count_;
int w_start = w_unit_index * DECONV_WINOGRAD_DEFAULT_UNIT * conv_param->stride_w_ - conv_param->pad_l_;
int h_start = h_unit_index * DECONV_WINOGRAD_DEFAULT_UNIT * conv_param->stride_h_ - conv_param->pad_u_;
float16_t *dst_start = nc4hw4_output + h_start * conv_param->output_w_ * C4NUM + w_start * C4NUM;
int merge_w_start = MSMAX(-w_start, 0);
int merge_h_start = MSMAX(-h_start, 0);
int merge_h_end = MSMIN(deconv_param->out_tile_h_, conv_param->output_h_ - h_start);
int merge_w_end = MSMIN(deconv_param->out_tile_w_, conv_param->output_w_ - w_start);
for (int hi = merge_h_start; hi < merge_h_end; hi++) {
for (int wi = merge_w_start; wi < merge_w_end; wi++) {
const float16_t *src = src_start + (hi * deconv_param->out_tile_w_ + wi) * src_unit_stride;
float16_t *dst = dst_start + (hi * conv_param->output_w_ + wi) * C4NUM;
DeConvWgMergeFp16(src, dst, src_stride, dst_stride, deconv_param->oc_div_);
}
}
}
return;
}
#ifndef ENABLE_ARM
void WinogradTransLeftFp16(const float16_t *S, const float16_t *B, float16_t *M, size_t w, size_t h, size_t k,
size_t length) {
const int unitStep = C4NUM * length;
for (int y = 0; y < h; ++y) {
float16_t *dstY = M + y * w * unitStep;
for (int x = 0; x < w; ++x) {
float16_t *dstX = dstY + x * unitStep;
const float16_t *srcX = S + x * unitStep;
memset(dstX, 0, unitStep * sizeof(float16_t));
for (int i = 0; i < k; ++i) {
float16_t b = B[i * h + y];
const float16_t *srcY = srcX + i * w * unitStep;
if (0.0f == b) {
continue;
}
for (int j = 0; j < unitStep; ++j) {
dstX[j] += srcY[j] * b;
}
}
}
}
}
void WinogradTransRightFp16(const float16_t *S, const float16_t *B, float16_t *M, size_t w, size_t h, size_t k,
size_t length) {
const int unitStep = C4NUM * length;
for (int y = 0; y < h; ++y) {
float16_t *dstY = M + y * w * unitStep;
const float16_t *srcY = S + y * k * unitStep;
for (int x = 0; x < w; ++x) {
float16_t *dstX = dstY + x * unitStep;
memset(dstX, 0, unitStep * sizeof(float16_t));
for (int i = 0; i < k; ++i) {
const float16_t *srcX = srcY + i * unitStep;
float16_t b = B[i * h + x];
if (0.0f == b) {
continue;
}
for (int j = 0; j < unitStep; ++j) {
dstX[j] += srcX[j] * b;
}
}
}
}
}
void TiledC4MatmulFp16(float16_t *dst, const float16_t *src, const float16_t *weight, size_t cal_num, size_t ic4,
size_t oc4) {
int dx, sz, dz;
int src_depth_step = C4NUM * DECONV_WINOGRAD_DEFAULT_TILE;
for (dz = 0; dz < oc4; ++dz) {
float16_t *dst_z = dst + dz * cal_num;
const float16_t *weight_dz = weight + dz * ic4 * 16;
for (dx = 0; dx < DECONV_WINOGRAD_DEFAULT_TILE; ++dx) {
float16_t *dst_x = dst_z + dx * C4NUM;
dst_x[0] = 0.0f;
dst_x[1] = 0.0f;
dst_x[2] = 0.0f;
dst_x[3] = 0.0f;
const float16_t *src_dx = src + C4NUM * dx;
for (sz = 0; sz < ic4; ++sz) {
const float16_t *src_z = src_dx + sz * src_depth_step;
const float16_t *weight_z = weight_dz + sz * 16;
for (int i = 0; i < C4NUM; ++i) {
for (int j = 0; j < C4NUM; ++j) {
dst_x[j] += src_z[i] * weight_z[C4NUM * i + j];
}
}
}
}
}
}
#endif
|
7b13b6ff82c4300d8a048835fcaf1afc575fff21
|
88ae8695987ada722184307301e221e1ba3cc2fa
|
/native_client/src/untrusted/irt/irt_dyncode.c
|
24903560d4236c45c90c3431e1d139bf663dad18
|
[
"BSD-3-Clause",
"Zlib",
"Classpath-exception-2.0",
"BSD-Source-Code",
"LZMA-exception",
"LicenseRef-scancode-unicode",
"LGPL-3.0-only",
"LGPL-2.0-or-later",
"LicenseRef-scancode-philippe-de-muyter",
"LicenseRef-scancode-warranty-disclaimer",
"LicenseRef-scancode-intel-osl-1993",
"HPND-sell-variant",
"ICU",
"LicenseRef-scancode-protobuf",
"bzip2-1.0.6",
"Spencer-94",
"NCSA",
"LicenseRef-scancode-nilsson-historical",
"CC0-1.0",
"LicenseRef-scancode-proprietary-license",
"LGPL-2.1-only",
"LicenseRef-scancode-other-copyleft",
"GPL-2.0-or-later",
"NTP",
"GPL-2.0-only",
"LicenseRef-scancode-other-permissive",
"GPL-3.0-only",
"GFDL-1.1-only",
"W3C",
"LicenseRef-scancode-python-cwi",
"GCC-exception-3.1",
"BSL-1.0",
"Python-2.0",
"GPL-1.0-or-later",
"LGPL-2.1-or-later",
"LicenseRef-scancode-unknown-license-reference",
"CPL-1.0",
"GFDL-1.1-or-later",
"W3C-19980720",
"LGPL-2.0-only",
"LicenseRef-scancode-amd-historical",
"LicenseRef-scancode-ietf",
"SAX-PD",
"LicenseRef-scancode-x11-hanson",
"LicenseRef-scancode-public-domain",
"BSD-2-Clause",
"dtoa",
"MIT",
"LicenseRef-scancode-public-domain-disclaimer",
"PSF-2.0",
"LicenseRef-scancode-newlib-historical",
"LicenseRef-scancode-generic-exception",
"SMLNJ",
"HP-1986",
"LicenseRef-scancode-free-unknown",
"SunPro",
"MPL-1.1"
] |
permissive
|
iridium-browser/iridium-browser
|
71d9c5ff76e014e6900b825f67389ab0ccd01329
|
5ee297f53dc7f8e70183031cff62f37b0f19d25f
|
refs/heads/master
| 2023-08-03T16:44:16.844552
| 2023-07-20T15:17:00
| 2023-07-23T16:09:30
| 220,016,632
| 341
| 40
|
BSD-3-Clause
| 2021-08-13T13:54:45
| 2019-11-06T14:32:31
| null |
UTF-8
|
C
| false
| false
| 836
|
c
|
irt_dyncode.c
|
/*
* Copyright (c) 2011 The Native Client Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
#include "native_client/src/untrusted/irt/irt.h"
#include "native_client/src/untrusted/nacl/syscall_bindings_trampoline.h"
static int nacl_irt_dyncode_create(void *dest, const void *src, size_t size) {
return -NACL_SYSCALL(dyncode_create)(dest, src, size);
}
static int nacl_irt_dyncode_modify(void *dest, const void *src, size_t size) {
return -NACL_SYSCALL(dyncode_modify)(dest, src, size);
}
static int nacl_irt_dyncode_delete(void *dest, size_t size) {
return -NACL_SYSCALL(dyncode_delete)(dest, size);
}
const struct nacl_irt_dyncode nacl_irt_dyncode = {
nacl_irt_dyncode_create,
nacl_irt_dyncode_modify,
nacl_irt_dyncode_delete,
};
|
0f15e3cdc5470e20b5e74fa7c547395b33b0fa15
|
ff4d18f978fb0df615a4d55457e86bf3a62c08ce
|
/client_src/vrpn_LamportClock.t.C
|
e7d0ed191e692ce2868750a8eb81e3d1e4b2534d
|
[
"BSL-1.0",
"LicenseRef-scancode-public-domain"
] |
permissive
|
vrpn/vrpn
|
1e683ad1f8b0633c4354f97ceef6f028a09de0ee
|
601e52c129cac0318a67d8a9f7f3a00d99f50601
|
refs/heads/master
| 2023-07-09T14:52:43.999091
| 2023-06-02T13:46:36
| 2023-06-04T19:36:56
| 458,285
| 386
| 237
| null | 2023-07-19T20:06:40
| 2010-01-04T17:51:58
|
C
|
UTF-8
|
C
| false
| false
| 1,986
|
c
|
vrpn_LamportClock.t.C
|
// Test code for vrpn_LamportClock
#ifdef VRPN_USE_OLD_STREAMS
#include <iostream.h>
#else
#include <iostream>
using namespace std;
#endif
#include <assert.h>
#include <vrpn_LamportClock.h>
vrpn_LamportClock * clockA;
vrpn_LamportClock * clockB;
void setUp (void) {
clockA = new vrpn_LamportClock (2, 0);
clockB = new vrpn_LamportClock (2, 1);
}
void tearDown (void) {
if (clockA) delete clockA;
if (clockB) delete clockB;
}
void test_one_getTimestampAndAdvance (void) {
vrpn_LamportTimestamp * t1 = clockA->getTimestampAndAdvance();
vrpn_LamportTimestamp tc (*t1);
assert(t1);
assert(t1->size() == 2);
assert((*t1)[0] == 1);
assert((*t1)[1] == 0);
assert(!(*t1 < *t1));
assert(!(tc < *t1));
assert(!(*t1 < tc));
vrpn_LamportTimestamp * t2 = clockA->getTimestampAndAdvance();
assert(t2);
assert((*t1)[0] == 1);
assert((*t1)[1] == 0);
assert(t2->size() == 2);
assert((*t2)[0] == 2);
assert((*t2)[1] == 0);
assert(*t1 < *t2);
assert(!(*t2 < *t1));
vrpn_LamportTimestamp * t3 = clockA->getTimestampAndAdvance();
vrpn_LamportTimestamp * t4 = clockA->getTimestampAndAdvance();
vrpn_LamportTimestamp * t5 = clockA->getTimestampAndAdvance();
assert(t5->size() == 2);
assert((*t5)[0] == 5);
assert((*t5)[1] == 0);
delete t1;
delete t2;
delete t3;
delete t4;
delete t5;
}
void test_two (void) {
vrpn_LamportTimestamp * ta1 = clockA->getTimestampAndAdvance();
vrpn_LamportTimestamp * tb1 = clockB->getTimestampAndAdvance();
clockA->receive(*tb1);
vrpn_LamportTimestamp * ta2 = clockA->getTimestampAndAdvance();
assert((*ta2)[0] == 2);
assert((*ta2)[1] == 1);
assert(*ta1 < *ta2);
assert(*tb1 < *ta2);
assert(!(*tb1 < *ta1));
assert(!(*ta1 < *tb1));
delete ta1;
delete tb1;
delete ta2;
}
int main (int, char **) {
setUp();
test_one_getTimestampAndAdvance();
tearDown();
setUp();
test_two();
tearDown();
cout << "OK" << endl;
}
|
7bb35ce2d3b587ba241fc4ddab61ca2d35de0c52
|
7e41167bfae6d2c38689b7e0993b308e045cbd05
|
/less-34/less/pckeys.h
|
61493ecbde3a22e73ed690d40d397c632290c281
|
[
"BSD-2-Clause",
"GPL-3.0-or-later",
"BSD-3-Clause",
"curl",
"GPL-1.0-or-later",
"MIT",
"Python-2.0",
"LicenseRef-scancode-unknown-license-reference"
] |
permissive
|
holzschu/ios_system
|
7b18993dbcb33331c353e0257ca54847a5d1b1bb
|
6a83eb1c6c383a562fbe33a7e97677e88d305b51
|
refs/heads/master
| 2023-08-14T09:11:40.627903
| 2023-04-18T15:12:29
| 2023-04-18T15:12:29
| 113,187,304
| 882
| 155
|
BSD-3-Clause
| 2023-08-19T19:15:35
| 2017-12-05T13:42:50
|
C
|
UTF-8
|
C
| false
| false
| 898
|
h
|
pckeys.h
|
/*
* Copyright (C) 1984-2016 Mark Nudelman
*
* You may distribute under the terms of either the GNU General Public
* License or the Less License, as specified in the README file.
*
* For more information, see the README file.
*/
/*
* Definitions of keys on the PC.
* Special (non-ASCII) keys on the PC send a two-byte sequence,
* where the first byte is 0 and the second is as defined below.
*/
#define PCK_SHIFT_TAB '\017'
#define PCK_ALT_E '\022'
#define PCK_CAPS_LOCK '\072'
#define PCK_F1 '\073'
#define PCK_NUM_LOCK '\105'
#define PCK_HOME '\107'
#define PCK_UP '\110'
#define PCK_PAGEUP '\111'
#define PCK_LEFT '\113'
#define PCK_RIGHT '\115'
#define PCK_END '\117'
#define PCK_DOWN '\120'
#define PCK_PAGEDOWN '\121'
#define PCK_INSERT '\122'
#define PCK_DELETE '\123'
#define PCK_CTL_LEFT '\163'
#define PCK_CTL_RIGHT '\164'
#define PCK_CTL_DELETE '\223'
|
af7511c036d6a2d9657c2902bf22e15ffb84ec97
|
fa1a4c9c404b20cac10f537c419489ed8bb84ede
|
/test/nes-mmc3/fixed.c
|
3b3e59a36030ee81b3b1b52e8428e89cdb087008
|
[
"LLVM-exception",
"Apache-2.0",
"LicenseRef-scancode-unknown-license-reference"
] |
permissive
|
llvm-mos/llvm-mos-sdk
|
cff8ec1780b5c79b63649ba567acb7cd271f0c32
|
18e0edd90648f67717b26f99559dae408eaa8b32
|
refs/heads/main
| 2023-08-31T15:47:28.907521
| 2023-08-29T16:40:59
| 2023-08-29T17:31:04
| 348,140,902
| 170
| 37
|
NOASSERTION
| 2023-09-14T19:46:55
| 2021-03-15T22:30:33
|
C
|
UTF-8
|
C
| false
| false
| 476
|
c
|
fixed.c
|
#include <bank.h>
#include <stdlib.h>
volatile const char large_array[0x7000] = {
[0] = 1, [0x2000] = 2, [0x4000] = 3, [0x6000] = 4, [0x6fff] = 5};
int main(void) {
if (large_array[0] != 1)
return EXIT_FAILURE;
if (large_array[0x2000] != 2)
return EXIT_FAILURE;
if (large_array[0x4000] != 3)
return EXIT_FAILURE;
if (large_array[0x6000] != 4)
return EXIT_FAILURE;
if (large_array[0x6fff] != 5)
return EXIT_FAILURE;
return EXIT_SUCCESS;
}
|
3b469c8b6df034e96a156e202098d903422215d8
|
6e8226bff5369d52885ab75c95f78e155d6afb48
|
/src/image/morn_image_file.c
|
72536c33b1cc31c9e48950f5bdac93675a828b66
|
[
"Apache-2.0"
] |
permissive
|
jingweizhanghuai/Morn
|
a26fc8747fd82c10a94003759a9adc44a60a8353
|
b9ee92c26190dec03a6726b9ac9d18fb570b7a70
|
refs/heads/master
| 2023-03-03T12:02:06.835741
| 2023-02-17T14:16:34
| 2023-02-17T14:16:34
| 187,427,750
| 257
| 64
| null | null | null | null |
UTF-8
|
C
| false
| false
| 9,447
|
c
|
morn_image_file.c
|
/*
Copyright (C) 2019-2020 JingWeiZhangHuai <jingweizhanghuai@163.com>
Licensed under the Apache License, Version 2.0; you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.
*/
#include "morn_image.h"
#define fread(Data,Size,Num,Fl) mException(((int)fread(Data,Size,Num,Fl)!=Num),EXIT,"read file error");
#define fwrite(Data,Size,Num,Fl) mException(((int)fwrite(Data,Size,Num,Fl)!=Num),EXIT,"write file error");
struct BMPHeader
{
int bmpsize;
int bmpreserved;
int bmpoffbits;
int imginfosize;
int imgwidth;
int imgheight;
short imgplanes;
short imgbitcount;
int imgcompression;
int imgsize;
int imgxpelspermeter;
int imgypelspermeter;
int imgclrused;
int imgclrimportant;
};
struct colorlist
{
unsigned char color_blue;
unsigned char color_green;
unsigned char color_red;
char reserved;
};
void BMPGraySave(MImage *src,const char *filename)
{
int i;
int data0 = 0;
mException(INVALID_IMAGE(src),EXIT,"invlid input");
int image_type=DFLT; mPropertyRead(src,"image_type",&image_type);
mException((image_type != MORN_IMAGE_GRAY),EXIT,"invlid input");
FILE *f = fopen(filename,"wb");
// printf("src is %p,f is %p,&bmptype is %p\n",src,f,&bmptype);
mException((f == NULL),EXIT,"cannot open file");
short bmptype = 0x4d42;fwrite(&bmptype,1,2,f);
int img_width = src->width;
int img_height = src->height;
int data_width = ((img_width-1)&0xFFFFFFFC)+4;
int img_size = img_height*data_width;
struct BMPHeader my_bmp;
my_bmp.bmpsize = 1078 + img_size;
my_bmp.bmpreserved = 0;
my_bmp.bmpoffbits = 1078;
my_bmp.imginfosize = 40;
my_bmp.imgwidth = img_width;
my_bmp.imgheight = img_height;
my_bmp.imgplanes = 1;
my_bmp.imgbitcount = 8;
my_bmp.imgcompression =0;
my_bmp.imgsize = img_size;
my_bmp.imgxpelspermeter = 11811;
my_bmp.imgypelspermeter = 11811;
my_bmp.imgclrused = 0;
my_bmp.imgclrimportant = 0;
fwrite(&my_bmp,1,52,f);
struct colorlist color_gray[256];
for(i=0;i<256;i++)
{
color_gray[i].color_blue = (unsigned char)i;
color_gray[i].color_green = (unsigned char)i;
color_gray[i].color_red = (unsigned char)i;
color_gray[i].reserved = 0;
}
fwrite(color_gray,1,1024,f);
if(data_width==img_width)
{
for(i=img_height-1;i>=0;i--)
fwrite(src->data[0][i],1,img_width,f);
}
else
{
for(i=img_height-1;i>=0;i--)
{
fwrite(src->data[0][i],1,img_width,f);
fwrite(&data0,1,data_width-img_width,f);
}
}
fclose(f);
}
void BMPRGBSave(MImage *src,const char *filename)
{
int i,j;
mException(INVALID_IMAGE(src),EXIT,"invlid input");
int image_type = DFLT;mPropertyRead(src,"image_type",&image_type);
mException((image_type != MORN_IMAGE_RGB)||(src->channel<3),EXIT,"invlid input");
FILE *f = fopen(filename,"wb");
mException((f == NULL),EXIT,"cannot open file");
short bmptype = 0x4d42;fwrite(&bmptype,1,2,f);
int img_width = src->width;
int img_height = src->height;
int data_width = ((img_width*3+3)>>2)<<2;
int data_size = data_width * img_height;
struct BMPHeader my_bmp;
my_bmp.bmpsize = 54 + data_size;
my_bmp.bmpreserved = 0;
my_bmp.bmpoffbits = 54;
my_bmp.imginfosize = 40;
my_bmp.imgwidth = img_width;
my_bmp.imgheight = img_height;
my_bmp.imgplanes = 1;
my_bmp.imgbitcount = 24;
my_bmp.imgcompression =0;
my_bmp.imgsize = data_size;
my_bmp.imgxpelspermeter = 11811;
my_bmp.imgypelspermeter = 11811;
my_bmp.imgclrused = 0;
my_bmp.imgclrimportant = 0;
fwrite(&my_bmp,1,52,f);
if(data_width==img_width*3)
{
for(j=img_height-1;j>=0;j--)
for(i=0;i<img_width;i++)
{
fwrite(src->data[0][j]+i,1,1,f);
fwrite(src->data[1][j]+i,1,1,f);
fwrite(src->data[2][j]+i,1,1,f);
}
}
else
{
for(j=img_height-1;j>=0;j--)
{
for(i=0;i<img_width;i++)
{
fwrite(src->data[0][j]+i,1,1,f);
fwrite(src->data[1][j]+i,1,1,f);
fwrite(src->data[2][j]+i,1,1,f);
}
int data0[3] = {0,0,0};
fwrite(data0,1,data_width-img_width*3,f);
}
}
fclose(f);
}
void BMPRGBASave(MImage *src,const char *filename)
{
FILE *f;
int img_width;
int img_height;
int data_width;
int data_size;
int i,j;
short bmptype = 0x4d42;
struct BMPHeader my_bmp;
mException(INVALID_IMAGE(src),EXIT,"invlid input");
int image_type = DFLT;mPropertyRead(src,"image_type",&image_type);
mException((image_type != MORN_IMAGE_RGBA)||(src->channel<4),EXIT,"invlid input");
f = fopen(filename,"wb");
mException((f == NULL),EXIT,"cannot open file");
img_width = src->width;
img_height = src->height;
data_width = img_width*4;
data_size = data_width * img_height;
fwrite(&bmptype,1,2,f);
my_bmp.bmpsize = 54 + data_size;
my_bmp.bmpreserved = 0;
my_bmp.bmpoffbits = 54;
my_bmp.imginfosize = 40;
my_bmp.imgwidth = img_width;
my_bmp.imgheight = img_height;
my_bmp.imgplanes = 1;
my_bmp.imgbitcount = 32;
my_bmp.imgcompression =0;
my_bmp.imgsize = data_size;
my_bmp.imgxpelspermeter = 11811;
my_bmp.imgypelspermeter = 11811;
my_bmp.imgclrused = 0;
my_bmp.imgclrimportant = 1;
fwrite(&my_bmp,1,52,f);
for(j=img_height-1;j>=0;j--)
for(i=0;i<img_width;i++)
{
fwrite(src->data[0][j]+i,1,1,f);
fwrite(src->data[1][j]+i,1,1,f);
fwrite(src->data[2][j]+i,1,1,f);
fwrite(src->data[3][j]+i,1,1,f);
}
fclose(f);
}
void mBMPSave(MImage *src,const char *filename)
{
mException(INVALID_IMAGE(src),EXIT,"invlid input");
int image_type = DFLT;mPropertyRead(src,"image_type",&image_type);
if(image_type == MORN_IMAGE_GRAY)
BMPGraySave(src,filename);
else if(image_type == MORN_IMAGE_RGB)
BMPRGBSave(src,filename);
else if(image_type == MORN_IMAGE_RGBA)
BMPRGBASave(src,filename);
else
mException(1,EXIT,"invalid image type");
}
struct HandleImageLoad
{
FILE *f;
};
#define HASH_ImageLoad 0x5c139120
void endImageLoad(void *info) {}
void mBMPLoad(MImage *dst,const char *filename)
{
int i,j;
mException(INVALID_POINTER(dst),EXIT,"invalid input");
FILE *pf=NULL; FILE *f;
MHandle *hdl=mHandle(dst,ImageLoad);
struct HandleImageLoad *handle = (struct HandleImageLoad *)(hdl->handle);
if(handle->f!=NULL) f=handle->f;
else
{
pf = fopen(filename, "rb");
mException((pf == NULL),EXIT,"file %s cannot open",filename);
f = pf;
}
short filetype;
fread(&filetype,1,sizeof(short),f);
mException((filetype != 0x4d42),EXIT,"invalid BMP format");
struct BMPHeader my_bmp;
fread(&my_bmp,1,52,f);
int img_width = my_bmp.imgwidth;
int img_height = my_bmp.imgheight;
int cn = my_bmp.imgbitcount>>3;
mImageRedefine(dst,cn,img_height,img_width,dst->data);
int data_width = ((img_width*cn-1)&0xFFFFFFFC)+4;
int pos = my_bmp.bmpoffbits;
int image_type=DFLT;
if(cn==1)
{
image_type = MORN_IMAGE_GRAY;
mPropertyWrite(dst,"image_type",&image_type,sizeof(int));
for(j=img_height-1;j>=0;j--)
{
fseek(f,pos,SEEK_SET);
fread(dst->data[0][j],1,img_width,f);
pos = pos+data_width;
}
}
else if(cn == 3)
{
image_type = MORN_IMAGE_RGB;
mPropertyWrite(dst,"image_type",&image_type,sizeof(int));
for(j=img_height-1;j>=0;j--)
{
fseek(f,pos,SEEK_SET);
for(i=0;i<img_width;i++)
{
fread(dst->data[0][j]+i,1,1,f);
fread(dst->data[1][j]+i,1,1,f);
fread(dst->data[2][j]+i,1,1,f);
}
pos = pos+data_width;
}
}
else if(cn == 4)
{
image_type = MORN_IMAGE_RGBA;
mPropertyWrite(dst,"image_type",&image_type,sizeof(int));
for(j=img_height-1;j>=0;j--)
{
fseek(f,pos,SEEK_SET);
for(i=0;i<img_width;i++)
{
fread(dst->data[0][j]+i,1,1,f);
fread(dst->data[1][j]+i,1,1,f);
fread(dst->data[2][j]+i,1,1,f);
fread(dst->data[3][j]+i,1,1,f);
}
pos = pos+data_width;
}
}
else
mException(1,EXIT,"invalid BMP format");
if(pf!=NULL) fclose(pf);
}
|
e5e6be7c305b9713061f38a25261c9b56b59062d
|
522eccce9de282e1b9b7e0aef31c2fbb9685611e
|
/src/gl/string_utils.h
|
ed018908f888801c885654cc9191111c34e0b707
|
[
"MIT"
] |
permissive
|
ptitSeb/gl4es
|
b4f5049488134103db0c22dbf570d8b093d597c2
|
bfcdd3a452e0d04d41afd2693a879c073b5ad8c9
|
refs/heads/master
| 2023-08-14T08:42:11.310554
| 2023-07-09T21:05:08
| 2023-07-09T21:05:08
| 18,032,918
| 624
| 173
|
MIT
| 2023-09-04T08:34:28
| 2014-03-23T12:33:23
|
C
|
UTF-8
|
C
| false
| false
| 1,634
|
h
|
string_utils.h
|
#ifndef _GL4ES_STRING_UTILS_H_
#define _GL4ES_STRING_UTILS_H_
extern const char* AllSeparators;
const char* gl4es_find_string(const char* pBuffer, const char* S);
char* gl4es_find_string_nc(char* pBuffer, const char* S);
int gl4es_count_string(const char* pBuffer, const char* S);
char* gl4es_resize_if_needed(char* pBuffer, int *size, int addsize);
char* gl4es_inplace_replace(char* pBuffer, int* size, const char* S, const char* D);
char* gl4es_append(char* pBuffer, int* size, const char* S);
char* gl4es_inplace_insert(char* pBuffer, const char* S, char* master, int* size);
char* gl4es_getline(char* pBuffer, int num);
int gl4es_countline(const char* pBuffer);
int gl4es_getline_for(const char* pBuffer, const char* S); // get the line number for 1st occurent of S in pBuffer
char* gl4es_str_next(char *pBuffer, const char* S); // mostly as strstr, but go after the substring if found
//"blank" (space, tab, cr, lf,":", ",", ";", ".", "/")
char* gl4es_next_str(char* pBuffer); // go to next non "blank"
char* gl4es_prev_str(char* Str, char* pBuffer); // go to previous non "blank"
char* gl4es_next_blank(char* pBuffer); // go to next "blank"
char* gl4es_next_line(char* pBuffer); // go to next new line (crlf not included)
const char* gl4es_get_next_str(char* pBuffer); // get a (static) copy of next str (until next separator), can be a simple number or separator also
// those function don't try to be smart with separators...
int gl4es_countstring_simple(char* pBuffer, const char* S);
char* gl4es_inplace_replace_simple(char* pBuffer, int* size, const char* S, const char* D);
#endif // _GL4ES_STRING_UTILS_H_
|
eddd98e8d62a8e0bbfb385298142008691235bd6
|
e73547787354afd9b717ea57fe8dd0695d161821
|
/src/evt/f8f60_len_1560.c
|
00ec8ce94fcdd078231bfe7badac479348a45070
|
[] |
no_license
|
pmret/papermario
|
8b514b19653cef8d6145e47499b3636b8c474a37
|
9774b26d93f1045dd2a67e502b6efc9599fb6c31
|
refs/heads/main
| 2023-08-31T07:09:48.951514
| 2023-08-21T18:07:08
| 2023-08-21T18:07:08
| 287,151,133
| 904
| 139
| null | 2023-09-14T02:44:23
| 2020-08-13T01:22:57
|
C
|
UTF-8
|
C
| false
| false
| 17,712
|
c
|
f8f60_len_1560.c
|
#include "common.h"
// args: start, end, duration, EasingType
ApiStatus MakeLerp(Evt* script, s32 isInitialCall) {
Bytecode* ptrReadPos = script->ptrReadPos;
script->varTable[0xC] = evt_get_variable(script, *ptrReadPos++); // start
script->varTable[0xD] = evt_get_variable(script, *ptrReadPos++); // end
script->varTable[0xF] = evt_get_variable(script, *ptrReadPos++); // duration
script->varTable[0xB] = evt_get_variable(script, *ptrReadPos++); // easing type
script->varTable[0xE] = 0; // elapsed
return ApiStatus_DONE2;
}
ApiStatus UpdateLerp(Evt* script, s32 isInitialCall) {
script->varTable[0x0] = (s32) update_lerp(
script->varTable[0xB],
script->varTable[0xC],
script->varTable[0xD],
script->varTable[0xE],
script->varTable[0xF]
);
if (script->varTable[0xE] >= script->varTable[0xF]) {
script->varTable[0x1] = 0; // finished
} else {
script->varTable[0x1] = 1; // lerping
}
script->varTable[0xE]++;
return ApiStatus_DONE2;
}
ApiStatus RandInt(Evt* script, s32 isInitialCall) {
Bytecode* args = script->ptrReadPos;
s32 max = evt_get_variable(script, *args++);
Bytecode outVar = *args++;
evt_set_variable(script, outVar, rand_int(max));
return ApiStatus_DONE2;
}
ApiStatus GetAngleBetweenNPCs(Evt* script, s32 isInitialCall) {
Bytecode* args = script->ptrReadPos;
s32 aID = evt_get_variable(script, *args++);
s32 bID = evt_get_variable(script, *args++);
Bytecode outVar = *args++;
Npc* a = resolve_npc(script, aID);
Npc* b = resolve_npc(script, bID);
evt_set_variable(script, outVar, atan2(a->pos.x, a->pos.z, b->pos.x, b->pos.z));
return ApiStatus_DONE2;
}
ApiStatus GetAngleToNPC(Evt* script, s32 isInitialCall) {
PlayerStatus* playerStatus = &gPlayerStatus;
Bytecode* args = script->ptrReadPos;
s32 npcID = evt_get_variable(script, *args++);
Bytecode outVar = *args++;
Npc* npc = resolve_npc(script, npcID);
evt_set_variable(script, outVar, atan2(playerStatus->pos.x, playerStatus->pos.z, npc->pos.x, npc->pos.z));
return ApiStatus_DONE2;
}
ApiStatus GetAngleToPlayer(Evt* script, s32 isInitialCall) {
PlayerStatus* playerStatus = &gPlayerStatus;
Bytecode* args = script->ptrReadPos;
s32 npcID = evt_get_variable(script, *args++);
Bytecode outVar = *args++;
Npc* npc = resolve_npc(script, npcID);
evt_set_variable(script, outVar, atan2(npc->pos.x, npc->pos.z, playerStatus->pos.x, playerStatus->pos.z));
return ApiStatus_DONE2;
}
ApiStatus AwaitPlayerApproach(Evt* script, s32 isInitialCall) {
Bytecode* args = script->ptrReadPos;
PlayerStatus* playerStatus = &gPlayerStatus;
s32* targetX = &script->functionTemp[0];
s32* targetZ = &script->functionTemp[1];
s32* distanceRequired = &script->functionTemp[2];
f32 distance;
if (isInitialCall) {
*targetX = evt_get_variable(script, *args++);
*targetZ = evt_get_variable(script, *args++);
*distanceRequired = evt_get_variable(script, *args++);
}
distance = dist2D(
playerStatus->pos.x, playerStatus->pos.z,
*targetX, *targetZ
);
if (distance < *distanceRequired) {
return ApiStatus_DONE2;
} else {
return ApiStatus_BLOCK;
}
}
ApiStatus IsPlayerWithin(Evt* script, s32 isInitialCall) {
Bytecode* args = script->ptrReadPos;
PlayerStatus* playerStatus = &gPlayerStatus;
s32* targetX = &script->functionTemp[0];
s32* targetZ = &script->functionTemp[1];
s32* distanceRequired = &script->functionTemp[2];
f32 distance;
Bytecode outVar = LVar0;
if (isInitialCall) {
*targetX = evt_get_variable(script, *args++);
*targetZ = evt_get_variable(script, *args++);
*distanceRequired = evt_get_variable(script, *args++);
outVar = *args++;
}
distance = dist2D(
playerStatus->pos.x, playerStatus->pos.z,
*targetX, *targetZ
);
evt_set_variable(script, outVar, 0);
if (distance < *distanceRequired) {
evt_set_variable(script, outVar, 1);
}
return ApiStatus_DONE2;
}
ApiStatus AwaitPlayerLeave(Evt* script, s32 isInitialCall) {
Bytecode* ptrReadPos = script->ptrReadPos;
PlayerStatus* playerStatus = &gPlayerStatus;
s32* targetX = &script->functionTemp[0];
s32* targetZ = &script->functionTemp[1];
s32* distanceRequired = &script->functionTemp[2];
f32 distance;
if (isInitialCall) {
*targetX = evt_get_variable(script, *ptrReadPos++);
*targetZ = evt_get_variable(script, *ptrReadPos++);
*distanceRequired = evt_get_variable(script, *ptrReadPos++);
}
distance = dist2D(
playerStatus->pos.x, playerStatus->pos.z,
*targetX, *targetZ
);
if (distance > *distanceRequired) {
return ApiStatus_DONE2;
} else {
return ApiStatus_BLOCK;
}
}
ApiStatus AddVectorPolar(Evt* script, s32 isInitialCall) {
Bytecode* args = script->ptrReadPos;
Bytecode xVar = *args++;
f32 x = evt_get_float_variable(script, xVar);
Bytecode yVar = *args++;
f32 y = evt_get_float_variable(script, yVar);
f32 r = evt_get_float_variable(script, *args++);
add_vec2D_polar(&x, &y, r, evt_get_float_variable(script, *args++));
evt_set_float_variable(script, xVar, x);
evt_set_float_variable(script, yVar, y);
return ApiStatus_DONE2;
}
ApiStatus func_802D4BDC(Evt* script, s32 isInitialCall) {
s32* ready = &script->functionTemp[0];
s32* progress = &script->functionTemp[1];
s32 t1v;
if (isInitialCall) {
*ready = 0;
*progress = 0;
}
// always zero?
if (*ready == 0) {
t1v = *progress;
if (t1v == 255) {
return ApiStatus_DONE2;
}
t1v += 10;
*progress = t1v;
if (t1v > 255) {
*progress = 255;
}
set_screen_overlay_params_back(OVERLAY_START_BATTLE, *progress);
}
return ApiStatus_BLOCK;
}
ApiStatus func_802D4C4C(Evt* script, s32 isInitialCall) {
s32* ready = &script->functionTemp[0];
s32* progress = &script->functionTemp[1];
s32 t1v;
if (isInitialCall) {
*ready = 0;
*progress = 255;
}
// always zero?
if (*ready == 0) {
t1v = *progress;
if (t1v == 0) {
set_screen_overlay_params_back(OVERLAY_NONE, -1.0f);
return ApiStatus_DONE2;
}
t1v -= 10;
*progress = t1v;
if (t1v < 0) {
*progress = 0;
}
set_screen_overlay_params_back(OVERLAY_START_BATTLE, *progress);
}
return ApiStatus_BLOCK;
}
ApiStatus func_802D4CC4(Evt* script, s32 isInitialCall) {
Bytecode* args = script->ptrReadPos;
s32 value = evt_get_variable(script, *args++);
if (value < 0) {
set_screen_overlay_params_back(OVERLAY_NONE, -1.0f);
} else {
set_screen_overlay_params_back(OVERLAY_START_BATTLE, value);
}
return ApiStatus_DONE2;
}
ApiStatus func_802D4D14(Evt* script, s32 isInitialCall) {
Bytecode* args = script->ptrReadPos;
s32 value = evt_get_float_variable(script, *args++);
set_screen_overlay_center(SCREEN_LAYER_FRONT, 0, 12, 20);
set_screen_overlay_center(SCREEN_LAYER_FRONT, 1, 308, 220);
set_screen_overlay_params_front(OVERLAY_BLUR, value);
return ApiStatus_DONE2;
}
ApiStatus func_802D4D88(Evt* script, s32 isInitialCall) {
set_screen_overlay_params_front(OVERLAY_BLUR, 0);
return ApiStatus_DONE2;
}
void load_path_data(s32 num, f32* normalizedLengths, Vec3f* pathPositions, Vec3f* outVectors) {
f32* lenBuf = heap_malloc(num * sizeof(f32));
Vec3f* vecBuf = heap_malloc(num * sizeof(Vec3f));
s32 i;
// compute the distance of each vector along the path and map to the range [0,1]
normalizedLengths[0] = 0.0f;
for (i = 1; i < num; i++) {
f32 dx = pathPositions[i].x - pathPositions[i-1].x;
f32 dy = pathPositions[i].y - pathPositions[i-1].y;
f32 dz = pathPositions[i].z - pathPositions[i-1].z;
f32 length = sqrtf(SQ(dx) + SQ(dy) + SQ(dz));
normalizedLengths[i] = normalizedLengths[i-1] + length;
}
for (i = 1; i < num; i++) {
normalizedLengths[i] /= normalizedLengths[num-1];
}
// end points
outVectors[0].x = 0.0f;
outVectors[0].y = 0.0f;
outVectors[0].z = 0.0f;
outVectors[num-1].x = 0.0f;
outVectors[num-1].y = 0.0f;
outVectors[num-1].z = 0.0f;
for (i = 0; i < num - 1; i++) {
lenBuf[i] = normalizedLengths[i+1] - normalizedLengths[i];
vecBuf[i+1].x = (pathPositions[i+1].x - pathPositions[i].x) / lenBuf[i];
vecBuf[i+1].y = (pathPositions[i+1].y - pathPositions[i].y) / lenBuf[i];
vecBuf[i+1].z = (pathPositions[i+1].z - pathPositions[i].z) / lenBuf[i];
}
// n = 1
outVectors[1].x = vecBuf[2].x - vecBuf[1].x;
outVectors[1].y = vecBuf[2].y - vecBuf[1].y;
outVectors[1].z = vecBuf[2].z - vecBuf[1].z;
vecBuf[1].x = 2.0f * (normalizedLengths[2] - normalizedLengths[0]);
vecBuf[1].y = 2.0f * (normalizedLengths[2] - normalizedLengths[0]);
vecBuf[1].z = 2.0f * (normalizedLengths[2] - normalizedLengths[0]);
// 1 < n < N - 2
for (i = 1; i < num - 2; i++) {
f32 sx = lenBuf[i] / vecBuf[i].x;
f32 sy = lenBuf[i] / vecBuf[i].y;
f32 sz = lenBuf[i] / vecBuf[i].z;
outVectors[i+1].x = (vecBuf[i+2].x - vecBuf[i+1].x) - outVectors[i].x * sx;
outVectors[i+1].y = (vecBuf[i+2].y - vecBuf[i+1].y) - outVectors[i].y * sy;
outVectors[i+1].z = (vecBuf[i+2].z - vecBuf[i+1].z) - outVectors[i].z * sz;
vecBuf[i+1].x = 2.0f * (normalizedLengths[i+2] - normalizedLengths[i]) - lenBuf[i] * sx;
vecBuf[i+1].y = 2.0f * (normalizedLengths[i+2] - normalizedLengths[i]) - lenBuf[i] * sy;
vecBuf[i+1].z = 2.0f * (normalizedLengths[i+2] - normalizedLengths[i]) - lenBuf[i] * sz;
}
// n = N - 2
outVectors[num-2].x -= (lenBuf[num-2] * outVectors[num-1].x);
outVectors[num-2].y -= (lenBuf[num-2] * outVectors[num-1].y);
outVectors[num-2].z -= (lenBuf[num-2] * outVectors[num-1].z);
for (i = num - 2; i > 0; i--) {
outVectors[i].x = (outVectors[i].x - (lenBuf[i] * outVectors[i+1].x)) / vecBuf[i].x;
outVectors[i].y = (outVectors[i].y - (lenBuf[i] * outVectors[i+1].y)) / vecBuf[i].y;
outVectors[i].z = (outVectors[i].z - (lenBuf[i] * outVectors[i+1].z)) / vecBuf[i].z;
}
heap_free(lenBuf);
heap_free(vecBuf);
}
void get_path_position(f32 alpha, Vec3f* outPos, s32 numVectors, f32* normalizedLengths, Vec3f* pathPoints, Vec3f* vectors) {
s32 limit = numVectors - 1;
f32 curLength;
f32 curProgress;
f32 ax, ay, az, bx, by, bz, dx, dy, dz;
s32 i;
for (i = 0; i < limit;) {
s32 temp_v1 = (i + limit) / 2;
if (normalizedLengths[temp_v1] < alpha) {
i = temp_v1 + 1;
} else {
limit = temp_v1;
}
}
if (i > 0) {
i--;
}
curLength = normalizedLengths[i+1] - normalizedLengths[i];
curProgress = alpha - normalizedLengths[i];
dx = (pathPoints[i+1].x - pathPoints[i].x) / curLength;
ax = (((vectors[i+1].x - vectors[i].x) * curProgress / curLength) + (3.0f * vectors[i].x)) * curProgress;
bx = dx - (((2.0f * vectors[i].x) + vectors[i+1].x) * curLength);
outPos->x = ((ax + bx) * curProgress) + pathPoints[i].x;
dy = (pathPoints[i+1].y - pathPoints[i].y) / curLength;
ay = (((vectors[i+1].y - vectors[i].y) * curProgress / curLength) + (3.0f * vectors[i].y)) * curProgress;
by = dy - (((2.0f * vectors[i].y) + vectors[i+1].y) * curLength);
outPos->y = ((ay + by) * curProgress) + pathPoints[i].y;
dz = (pathPoints[i+1].z - pathPoints[i].z) / curLength;
az = (((vectors[i+1].z - vectors[i].z) * curProgress / curLength) + (3.0f * vectors[i].z)) * curProgress;
bz = dz - (((2.0f * vectors[i].z) + vectors[i+1].z) * curLength);
outPos->z = ((az + bz) * curProgress) + pathPoints[i].z;
}
s32 LoadPath(Evt* script, s32 isInitialCall) {
Bytecode* args = script->ptrReadPos;
s32 time = evt_get_variable(script, *args++);
Vec3f* vectorList = (Vec3f*) evt_get_variable(script, *args++);
s32 numVectors = evt_get_variable(script, *args++);
s32 easingType = evt_get_variable(script, *args++);
Path* path = heap_malloc(sizeof(*path));
script->varTablePtr[15] = path;
path->numVectors = numVectors;
path->lengths = heap_malloc(numVectors * sizeof(f32));
path->staticVectorList = vectorList;
path->vectors = heap_malloc(numVectors * sizeof(Vec3f));
load_path_data(path->numVectors, path->lengths, path->staticVectorList, path->vectors);
path->timeElapsed = 0;
path->timeLeft = time - 1;
path->easingType = easingType;
return ApiStatus_DONE2;
}
ApiStatus GetNextPathPos(Evt* script, s32 isInitialCall) {
Path* path = script->varTablePtr[0xF];
Vec3f pos;
f32 alpha;
f32 diff;
switch (path->easingType) {
case EASING_LINEAR:
alpha = 1.0f / path->timeLeft * path->timeElapsed;
break;
case EASING_QUADRATIC_IN:
alpha = 1.0f / SQ(path->timeLeft) * SQ(path->timeElapsed);
break;
case EASING_QUADRATIC_OUT:
diff = path->timeLeft - path->timeElapsed;
alpha = 1.0f - (SQ(diff) / SQ(path->timeLeft));
break;
case EASING_COS_IN_OUT:
alpha = (1.0f - cos_rad((PI / path->timeLeft) * path->timeElapsed)) * 0.5f;
break;
default:
alpha = 0.0f;
break;
}
get_path_position(alpha, &pos, path->numVectors, path->lengths, path->staticVectorList, path->vectors);
script->varTable[1] = (pos.x * 1024.0f) + -2.3e8f;
script->varTable[2] = (pos.y * 1024.0f) + -2.3e8f;
script->varTable[3] = (pos.z * 1024.0f) + -2.3e8f;
if (path->timeElapsed < path->timeLeft) {
path->timeElapsed = path->timeElapsed + 1;
script->varTable[0] = 1;
} else {
heap_free(path->lengths);
heap_free(path->vectors);
heap_free(script->varTablePtr[15]);
script->varTable[0] = 0;
}
return ApiStatus_DONE2;
}
ApiStatus GetDist2D(Evt* script, s32 isInitialCall) {
Bytecode* args = script->ptrReadPos;
Bytecode outVar = *args++;
f32 ax = evt_get_float_variable(script, *args++);
f32 ay = evt_get_float_variable(script, *args++);
f32 bx = evt_get_float_variable(script, *args++);
f32 by = evt_get_float_variable(script, *args++);
evt_set_float_variable(script, outVar, dist2D(ax, ay, bx, by));
return ApiStatus_DONE2;
}
ApiStatus SetTimeFreezeMode(Evt* script, s32 initialCall) {
Bytecode* args = script->ptrReadPos;
set_time_freeze_mode(evt_get_variable(script, *args++));
return ApiStatus_DONE2;
}
ApiStatus ModifyGlobalOverrideFlags(Evt* script, s32 initialCall) {
Bytecode* args = script->ptrReadPos;
s32 setMode = evt_get_variable(script, *args++);
s32 flags = evt_get_variable(script, *args++);
if (setMode) {
gOverrideFlags |= flags;
} else {
gOverrideFlags &= ~flags;
}
return ApiStatus_DONE2;
}
ApiStatus SetValueByRef(Evt* script, s32 isInitialCall) {
Bytecode* args = script->ptrReadPos;
s32 dest = evt_get_variable(script, *args++); /* Reference */
s32 src = evt_get_variable(script, *args++);
evt_set_variable(script, dest, src);
return ApiStatus_DONE2;
}
ApiStatus GetValueByRef(Evt* script, s32 isInitialCall) {
Bytecode* args = script->ptrReadPos;
s32 src = evt_get_variable(script, *args++); /* Reference */
Bytecode dest = *args++;
evt_set_variable(script, dest, evt_get_variable(script, src));
return ApiStatus_DONE2;
}
ApiStatus EnableWorldStatusBar(Evt* script, s32 isInitialCall) {
Bytecode* args = script->ptrReadPos;
b32 shouldEnable = evt_get_variable(script, *args++);
if (shouldEnable) {
decrement_status_bar_disabled();
} else {
increment_status_bar_disabled();
}
return ApiStatus_DONE2;
}
ApiStatus ShowWorldStatusBar(Evt* script, s32 isInitialCall) {
Bytecode* args = script->ptrReadPos;
b32 shouldShow = evt_get_variable(script, *args++);
if (shouldShow) {
status_bar_ignore_changes();
close_status_bar();
} else {
status_bar_respond_to_changes();
}
return ApiStatus_DONE2;
}
ApiStatus SetGameMode(Evt* script, s32 isInitialCall) {
Bytecode* args = script->ptrReadPos;
s16 mode = evt_get_variable(script, *args++);
set_game_mode(mode);
return ApiStatus_DONE2;
}
ApiStatus ClampAngleInt(Evt* script, s32 isInitialCall) {
Bytecode* args = script->ptrReadPos;
s32 angle = evt_get_variable(script, *args);
evt_set_variable(script, *args++, clamp_angle(angle));
return ApiStatus_DONE2;
}
ApiStatus ClampAngleFloat(Evt* script, s32 isInitialCall) {
Bytecode* args = script->ptrReadPos;
f32 angle = evt_get_float_variable(script, *args);
evt_set_float_variable(script, *args++, clamp_angle(angle));
return ApiStatus_DONE2;
}
#if VERSION_PAL
ApiStatus GetLanguage(Evt* script, s32 isInitialCall) {
Bytecode* args = script->ptrReadPos;
evt_set_variable(script, *args++, gCurrentLanguage);
return ApiStatus_DONE2;
}
#endif
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