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source | linux | /*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Numascale NumaConnect-Specific APIC Code
*
* Copyright (C) 2011 Numascale AS. All rights reserved.
*
* Send feedback to <support@numas... | arch/x86/kernel/apic/apic_numachip.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0
/*
* HW NMI watchdog support
*
* started by Don Zickus, Copyright (C) 2010 Red Hat, Inc.
*
* Arch specific calls to support NMI watchdog
*
* Bits copied from original nmi.c file
*
*/
#include <linux/thread_info.h>
#include <asm/apic.h>
#include <asm/nmi.h>
#include <lin... | arch/x86/kernel/apic/hw_nmi.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-only
#define pr_fmt(fmt) "APIC: " fmt
#include <asm/apic.h>
#include "local.h"
/*
* Use DEFINE_STATIC_CALL_NULL() to avoid having to provide stub functions
* for each callback. The callbacks are setup during boot and all except
* wait_icr_idle() must be initialized before usage... | arch/x86/kernel/apic/init.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0
/*
* Intel IO-APIC support for multi-Pentium hosts.
*
* Copyright (C) 1997, 1998, 1999, 2000, 2009 Ingo Molnar, Hajnalka Szabo
*
* Many thanks to Stig Venaas for trying out countless experimental
* patches and reporting/debugging problems patiently!
*
* (c) 1999, Multiple IO-... | arch/x86/kernel/apic/io_apic.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0
#include <linux/cpumask.h>
#include <linux/delay.h>
#include <linux/smp.h>
#include <linux/string_choices.h>
#include <asm/io_apic.h>
#include "local.h"
DEFINE_STATIC_KEY_FALSE(apic_use_ipi_shorthand);
#ifdef CONFIG_SMP
static int apic_ipi_shorthand_off __ro_after_init;
static ... | arch/x86/kernel/apic/ipi.c | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
/*
* Historical copyright notices:
*
* Copyright 2004 James Cleverdon, IBM.
* (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
* (c) 1998-99, 2000 Ingo Molnar <mingo@redhat.com>
* (c) 2002,2003 Andi Kleen, SuSE Labs.
*/
#include <linux/jump_label.h>
#include <asm/irq_vect... | arch/x86/kernel/apic/local.h | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-only
/*
* Support of MSI, HPET and DMAR interrupts.
*
* Copyright (C) 1997, 1998, 1999, 2000, 2009 Ingo Molnar, Hajnalka Szabo
* Moved from arch/x86/kernel/apic/io_apic.c.
* Jiang Liu <jiang.liu@linux.intel.com>
* Convert to hierarchical irqdomain
*/
#include <linux/mm.h>
#inc... | arch/x86/kernel/apic/msi.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-only
/*
* Default generic APIC driver. This handles up to 8 CPUs.
*
* Copyright 2003 Andi Kleen, SuSE Labs.
*
* Generic x86 APIC driver probe layer.
*/
#include <linux/export.h>
#include <linux/errno.h>
#include <linux/smp.h>
#include <xen/xen.h>
#include <asm/io_apic.h>
#inc... | arch/x86/kernel/apic/probe_32.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright 2004 James Cleverdon, IBM.
*
* Generic APIC sub-arch probe layer.
*
* Hacked for x86-64 by James Cleverdon from i386 architecture code by
* Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and
* James Cleverdon.
*/
#include <linux/thread_info.h>
#in... | arch/x86/kernel/apic/probe_64.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-only
/*
* Local APIC related interfaces to support IOAPIC, MSI, etc.
*
* Copyright (C) 1997, 1998, 1999, 2000, 2009 Ingo Molnar, Hajnalka Szabo
* Moved from arch/x86/kernel/apic/io_apic.c.
* Jiang Liu <jiang.liu@linux.intel.com>
* Enable support of hierarchical irqdomains
*/
#... | arch/x86/kernel/apic/vector.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0
#include <linux/cpuhotplug.h>
#include <linux/cpumask.h>
#include <linux/slab.h>
#include <linux/mm.h>
#include <asm/apic.h>
#include "local.h"
#define apic_cluster(apicid) ((apicid) >> 4)
/*
* __x2apic_send_IPI_mask() possibly needs to read
* x86_cpu_to_logical_apicid for all... | arch/x86/kernel/apic/x2apic_cluster.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0
#include <linux/cpumask.h>
#include <linux/acpi.h>
#include "local.h"
int x2apic_phys;
static struct apic apic_x2apic_phys;
u32 x2apic_max_apicid __ro_after_init = UINT_MAX;
void __init x2apic_set_max_apicid(u32 apicid)
{
x2apic_max_apicid = apicid;
if (apic->x2apic_set_max_ap... | arch/x86/kernel/apic/x2apic_phys.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-only
/*
* AMD Secure AVIC Support (SEV-SNP Guests)
*
* Copyright (C) 2024 Advanced Micro Devices, Inc.
*
* Author: Neeraj Upadhyay <Neeraj.Upadhyay@amd.com>
*/
#include <linux/cc_platform.h>
#include <linux/cpumask.h>
#include <linux/percpu-defs.h>
#include <linux/align.h>
#i... | arch/x86/kernel/apic/x2apic_savic.c | null | null | null | null | null |
source | linux | /*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* SGI UV APIC functions (note: not an Intel compatible APIC)
*
* (C) Copyright 2020 Hewlett Packard Enterprise Development LP
* Copyright... | arch/x86/kernel/apic/x2apic_uv_x.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0
/*
* ACRN detection support
*
* Copyright (C) 2019 Intel Corporation. All rights reserved.
*
* Jason Chen CJ <jason.cj.chen@intel.com>
* Zhao Yakui <yakui.zhao@intel.com>
*
*/
#include <linux/interrupt.h>
#include <asm/acrn.h>
#include <asm/apic.h>
#include <asm/cpufeatures... | arch/x86/kernel/cpu/acrn.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-only
#include <linux/export.h>
#include <linux/bitops.h>
#include <linux/elf.h>
#include <linux/mm.h>
#include <linux/kvm_types.h>
#include <linux/io.h>
#include <linux/sched.h>
#include <linux/sched/clock.h>
#include <linux/random.h>
#include <linux/topology.h>
#include <linux/platf... | arch/x86/kernel/cpu/amd.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0
/*
* AMD L3 cache_disable_{0,1} sysfs handling
* Documentation/ABI/testing/sysfs-devices-system-cpu
*/
#include <linux/cacheinfo.h>
#include <linux/capability.h>
#include <linux/pci.h>
#include <linux/sysfs.h>
#include <asm/amd/nb.h>
#include "cpu.h"
/*
* L3 cache descriptors... | arch/x86/kernel/cpu/amd_cache_disable.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-only
/*
* x86 APERF/MPERF KHz calculation for
* /sys/.../cpufreq/scaling_cur_freq
*
* Copyright (C) 2017 Intel Corp.
* Author: Len Brown <len.brown@intel.com>
*/
#include <linux/cpufreq.h>
#include <linux/delay.h>
#include <linux/ktime.h>
#include <linux/math64.h>
#include <lin... | arch/x86/kernel/cpu/aperfmperf.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0
/*
* FreeBSD Bhyve guest enlightenments
*
* Copyright © 2025 Amazon.com, Inc. or its affiliates.
*
* Author: David Woodhouse <dwmw2@infradead.org>
*/
#include <linux/init.h>
#include <linux/export.h>
#include <asm/processor.h>
#include <asm/hypervisor.h>
static uint32_t bhyve... | arch/x86/kernel/cpu/bhyve.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 1994 Linus Torvalds
*
* Cyrix stuff, June 1998 by:
* - Rafael R. Reilova (moved everything from head.S),
* <rreilova@ececs.uc.edu>
* - Channing Corn (tests & fixes),
* - Andrew D. Balsa (code cleanup).
*/
#include <linux/init.h>
#include <linux/cp... | arch/x86/kernel/cpu/bugs.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0
#define pr_fmt(fmt) "x86/split lock detection: " fmt
#include <linux/semaphore.h>
#include <linux/workqueue.h>
#include <linux/delay.h>
#include <linux/cpuhotplug.h>
#include <linux/kvm_types.h>
#include <asm/cpu_device_id.h>
#include <asm/cmdline.h>
#include <asm/traps.h>
#include... | arch/x86/kernel/cpu/bus_lock.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0
/*
* x86 CPU caches detection and configuration
*
* Previous changes
* - Venkatesh Pallipadi: Cache identification through CPUID(0x4)
* - Ashok Raj <ashok.raj@intel.com>: Work with CPU hotplug infrastructure
* - Andi Kleen / Andreas Herrmann: CPUID(0x4) emulation on AMD
*/
#... | arch/x86/kernel/cpu/cacheinfo.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0
#include <linux/sched.h>
#include <linux/sched/clock.h>
#include <asm/cpu.h>
#include <asm/cpufeature.h>
#include <asm/e820/api.h>
#include <asm/mtrr.h>
#include <asm/msr.h>
#include "cpu.h"
#define ACE_PRESENT (1 << 6)
#define ACE_ENABLED (1 << 7)
#define ACE_FCR (1 << 28) /* M... | arch/x86/kernel/cpu/centaur.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-only
/* cpu_feature_enabled() cannot be used this early */
#define USE_EARLY_PGTABLE_L5
#include <linux/memblock.h>
#include <linux/linkage.h>
#include <linux/bitops.h>
#include <linux/kernel.h>
#include <linux/export.h>
#include <linux/kvm_types.h>
#include <linux/percpu.h>
#includ... | arch/x86/kernel/cpu/common.c | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
#ifndef ARCH_X86_CPU_H
#define ARCH_X86_CPU_H
#include <asm/cpu.h>
#include <asm/topology.h>
#include "topology.h"
/* attempt to consolidate cpu attributes */
struct cpu_dev {
const char *c_vendor;
/* some have two possibilities for cpuid string */
const char *c_ident[2];
... | arch/x86/kernel/cpu/cpu.h | null | null | null | null | null |
source | linux | /* Declare dependencies between CPUIDs */
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/module.h>
#include <asm/cpufeature.h>
struct cpuid_dep {
unsigned int feature;
unsigned int depends;
};
/*
* Table of CPUID features that depend on others.
*
* This only includes dependencies that can be u... | arch/x86/kernel/cpu/cpuid-deps.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0
#include <linux/sizes.h>
#include <asm/cpuid/types.h>
#include "cpu.h"
#define CACHE_ENTRY(_desc, _type, _size) \
[_desc] = { \
.c_type = (_type), \
.c_size = (_size) / SZ_1K, \
}
#define TLB_ENTRY(_desc, _type, _entries) \
[_desc] = { \
.t_type = (_type), \
.... | arch/x86/kernel/cpu/cpuid_0x2_table.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0
#include <linux/bitops.h>
#include <linux/delay.h>
#include <linux/isa-dma.h>
#include <linux/pci.h>
#include <asm/dma.h>
#include <linux/io.h>
#include <asm/processor-cyrix.h>
#include <asm/processor-flags.h>
#include <linux/timer.h>
#include <asm/pci-direct.h>
#include <asm/tsc.h>
... | arch/x86/kernel/cpu/cyrix.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0
#include <linux/debugfs.h>
#include <asm/apic.h>
#include <asm/processor.h>
#include "cpu.h"
static int cpu_debug_show(struct seq_file *m, void *p)
{
unsigned long cpu = (unsigned long)m->private;
struct cpuinfo_x86 *c = per_cpu_ptr(&cpu_info, cpu);
seq_printf(m, "online: ... | arch/x86/kernel/cpu/debugfs.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0
#include <linux/tboot.h>
#include <asm/cpu.h>
#include <asm/cpufeature.h>
#include <asm/msr-index.h>
#include <asm/msr.h>
#include <asm/processor.h>
#include <asm/vmx.h>
#undef pr_fmt
#define pr_fmt(fmt) "x86/cpu: " fmt
#ifdef CONFIG_X86_VMX_FEATURE_NAMES
enum vmx_feature_leafs {
... | arch/x86/kernel/cpu/feat_ctl.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0+
/*
* Hygon Processor Support for Linux
*
* Copyright (C) 2018 Chengdu Haiguang IC Design Co., Ltd.
*
* Author: Pu Wen <puwen@hygon.cn>
*/
#include <linux/io.h>
#include <asm/apic.h>
#include <asm/cpu.h>
#include <asm/smp.h>
#include <asm/numa.h>
#include <asm/cacheinfo.h>
#in... | arch/x86/kernel/cpu/hygon.c | null | null | null | null | null |
source | linux | /*
* Common hypervisor code
*
* Copyright (C) 2008, VMware, Inc.
* Author : Alok N Kataria <akataria@vmware.com>
*
* the Free Software Foundation; either version 2 of the License, or
*
* This program is distributed in the hope that it will be useful, but
* details.
*
* along with this program; if not, write ... | arch/x86/kernel/cpu/hypervisor.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0
#include <linux/bitops.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/minmax.h>
#include <linux/smp.h>
#include <linux/string.h>
#include <linux/types.h>
#ifdef CONFIG_X86_64
#include <linux/topology.h>
#endif
#include <asm/bugs.h>
#include <asm/cpu_device_id... | arch/x86/kernel/cpu/intel.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0
/*
* Intel Performance and Energy Bias Hint support.
*
* Copyright (C) 2019 Intel Corporation
*
* Author:
* Rafael J. Wysocki <rafael.j.wysocki@intel.com>
*/
#include <linux/cpuhotplug.h>
#include <linux/cpu.h>
#include <linux/device.h>
#include <linux/kernel.h>
#include <lin... | arch/x86/kernel/cpu/intel_epb.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0
#include <asm/cpu_device_id.h>
#include <asm/cpufeature.h>
#include <linux/cpu.h>
#include <linux/export.h>
#include <linux/slab.h>
/**
* x86_match_vendor_cpu_type - helper function to match the hardware defined
* cpu-type for a single entry in the x86_... | arch/x86/kernel/cpu/match.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-only
/*
* HyperV Detection code.
*
* Copyright (C) 2010, Novell, Inc.
* Author : K. Y. Srinivasan <ksrinivasan@novell.com>
*/
#include <linux/types.h>
#include <linux/time.h>
#include <linux/clocksource.h>
#include <linux/init.h>
#include <linux/export.h>
#include <linux/hardi... | arch/x86/kernel/cpu/mshyperv.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0
/*
* local apic based NMI watchdog for various CPUs.
*
* This file also handles reservation of performance counters for coordination
* with other users.
*
* Note that these events normally don't tick when the CPU idles. This means
* the frequency varies with CPU load.
*
* Or... | arch/x86/kernel/cpu/perfctr-watchdog.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0
/*
* Strings for the various x86 power flags
*
* This file must not contain any executable code.
*/
#include <asm/cpufeature.h>
const char *const x86_power_flags[32] = {
"ts", /* temperature sensor */
"fid", /* frequency id control */
"vid", /* voltage id control */
"ttp"... | arch/x86/kernel/cpu/powerflags.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0
#include <linux/smp.h>
#include <linux/timex.h>
#include <linux/string.h>
#include <linux/seq_file.h>
#include <linux/cpufreq.h>
#include <asm/prctl.h>
#include <linux/proc_fs.h>
#include "cpu.h"
#ifdef CONFIG_X86_VMX_FEATURE_NAMES
extern const char * const x86_vmx_flags[NVMXINTS*3... | arch/x86/kernel/cpu/proc.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-only
/*
*
* Copyright (c) 2011, Intel Corporation
* Authors: Fenghua Yu <fenghua.yu@intel.com>,
* H. Peter Anvin <hpa@linux.intel.com>
*/
#include <linux/printk.h>
#include <asm/processor.h>
#include <asm/archrandom.h>
#include <asm/sections.h>
/*
* RDRAND has Built-... | arch/x86/kernel/cpu/rdrand.c | null | null | null | null | null |
source | linux | /*
* Routines to identify additional cpu features that are scattered in
* cpuid space.
*/
#include <linux/cpu.h>
#include <asm/memtype.h>
#include <asm/apic.h>
#include <asm/processor.h>
#include "cpu.h"
struct cpuid_bit {
u16 feature;
u8 reg;
u8 bit;
u32 level;
u32 sub_leaf;
};
/*
* Please keep the leaf s... | arch/x86/kernel/cpu/scattered.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-only
/*
* CPU/APIC topology
*
* The APIC IDs describe the system topology in multiple domain levels.
* The CPUID topology parser provides the information which part of the
* APIC ID is associated to the individual levels:
*
* [PACKAGE][DIEGRP][DIE][TILE][MODULE][CORE][THREAD]
... | arch/x86/kernel/cpu/topology.c | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
#ifndef ARCH_X86_TOPOLOGY_H
#define ARCH_X86_TOPOLOGY_H
struct topo_scan {
struct cpuinfo_x86 *c;
unsigned int dom_shifts[TOPO_MAX_DOMAIN];
unsigned int dom_ncpus[TOPO_MAX_DOMAIN];
/* Legacy CPUID[1]:EBX[23:16] number of logical processors */
unsigned int ebx1_nproc_shif... | arch/x86/kernel/cpu/topology.h | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0
#include <linux/cpu.h>
#include <asm/apic.h>
#include <asm/memtype.h>
#include <asm/msr.h>
#include <asm/processor.h>
#include "cpu.h"
static bool parse_8000_0008(struct topo_scan *tscan)
{
struct {
// ecx
u32 cpu_nthreads : 8, // Number of physical threads - 1
: 4, ... | arch/x86/kernel/cpu/topology_amd.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0
#include <linux/cpu.h>
#include <xen/xen.h>
#include <asm/intel-family.h>
#include <asm/apic.h>
#include <asm/processor.h>
#include <asm/smp.h>
#include "cpu.h"
struct x86_topology_system x86_topo_system __ro_after_init;
EXPORT_SYMBOL_GPL(x86_topo_system);
unsigned int __amd_nod... | arch/x86/kernel/cpu/topology_common.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0
#include <linux/cpu.h>
#include <asm/apic.h>
#include <asm/memtype.h>
#include <asm/processor.h>
#include "cpu.h"
enum topo_types {
INVALID_TYPE = 0,
SMT_TYPE = 1,
CORE_TYPE = 2,
MAX_TYPE_0B = 3,
MODULE_TYPE = 3,
AMD_CCD_TYPE = 3,
TILE_TYPE = 4,
AMD_SOCKET_TYPE = 4... | arch/x86/kernel/cpu/topology_ext.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/sched/clock.h>
#include <linux/mm.h>
#include <asm/cpufeature.h>
#include <asm/msr.h>
#include "cpu.h"
static void early_init_transmeta(struct cpuinfo_x86 *c)
{
u32 xlvl;
/* Transmeta-defined flags: level 0x808600... | arch/x86/kernel/cpu/transmeta.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0
/*
* Intel Transactional Synchronization Extensions (TSX) control.
*
* Copyright (C) 2019-2021 Intel Corporation
*
* Author:
* Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
*/
#include <linux/cpufeature.h>
#include <asm/cmdline.h>
#include <asm/cpu.h>
#include <asm/msr.h>
... | arch/x86/kernel/cpu/tsx.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0
#include <linux/kernel.h>
#include <asm/processor.h>
#include "cpu.h"
/*
* UMC chips appear to be only either 386 or 486,
* so no special init takes place.
*/
static const struct cpu_dev umc_cpu_dev = {
.c_vendor = "UMC",
.c_ident = { "UMC UMC UMC" },
.legacy_models = {
{ .... | arch/x86/kernel/cpu/umc.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0
#include <linux/syscore_ops.h>
#include <linux/suspend.h>
#include <linux/cpu.h>
#include <asm/msr.h>
#include <asm/mwait.h>
#define UMWAIT_C02_ENABLE 0
#define UMWAIT_CTRL_VAL(max_time, c02_disable) \
(((max_time) & MSR_IA32_UMWAIT_CONTROL_TIME_MASK) | \
((c02_disable) & MS... | arch/x86/kernel/cpu/umwait.c | null | null | null | null | null |
source | linux | /*
* VMware Detection code.
*
* Copyright (C) 2008, VMware, Inc.
* Author : Alok N Kataria <akataria@vmware.com>
*
* the Free Software Foundation; either version 2 of the License, or
*
* This program is distributed in the hope that it will be useful, but
* details.
*
* along with this program; if not, write ... | arch/x86/kernel/cpu/vmware.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0
#include <linux/kernel.h>
#include <asm/processor.h>
#include "cpu.h"
/*
* No special init required for Vortex processors.
*/
static const struct cpu_dev vortex_cpu_dev = {
.c_vendor = "Vortex",
.c_ident = { "Vortex86 SoC" },
.legacy_models = {
{
.family = 5,
.model_na... | arch/x86/kernel/cpu/vortex.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0
#include <linux/sched.h>
#include <linux/sched/clock.h>
#include <asm/cpu.h>
#include <asm/cpufeature.h>
#include <asm/msr.h>
#include "cpu.h"
#define MSR_ZHAOXIN_FCR57 0x00001257
#define ACE_PRESENT (1 << 6)
#define ACE_ENABLED (1 << 7)
#define ACE_FCR (1 << 7) /* MSR_ZHAOXIN_F... | arch/x86/kernel/cpu/zhaoxin.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-only
/*
* (c) 2005-2016 Advanced Micro Devices, Inc.
*
* Written by Jacob Shin - AMD, Inc.
* Maintained by: Borislav Petkov <bp@alien8.de>
*/
#include <linux/interrupt.h>
#include <linux/notifier.h>
#include <linux/kobject.h>
#include <linux/percpu.h>
#include <linux/errno.h>... | arch/x86/kernel/cpu/mce/amd.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-only
/*
* Bridge between MCE and APEI
*
* On some machine, corrected memory errors are reported via APEI
* generic hardware error source (GHES) instead of corrected Machine
* Check. These corrected memory errors can be reported to user space
* through /dev/mcelog via faking a c... | arch/x86/kernel/cpu/mce/apei.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-only
/*
* Machine check handler.
*
* K8 parts Copyright 2002,2003 Andi Kleen, SuSE Labs.
* Rest from unknown author(s).
* 2004 Andi Kleen. Rewrote most of it.
* Copyright 2008 Intel Corporation
* Author: Andi Kleen
*/
#include <linux/thread_info.h>
#include <linux/capability... | arch/x86/kernel/cpu/mce/core.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-only
/*
* /dev/mcelog driver
*
* K8 parts Copyright 2002,2003 Andi Kleen, SuSE Labs.
* Rest from unknown author(s).
* 2004 Andi Kleen. Rewrote most of it.
* Copyright 2008 Intel Corporation
* Author: Andi Kleen
*/
#include <linux/miscdevice.h>
#include <linux/slab.h>
#includ... | arch/x86/kernel/cpu/mce/dev-mcelog.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-only
/*
* MCE event pool management in MCE context
*
* Copyright (C) 2015 Intel Corp.
* Author: Chen, Gong <gong.chen@linux.intel.com>
*/
#include <linux/smp.h>
#include <linux/mm.h>
#include <linux/genalloc.h>
#include <linux/llist.h>
#include "internal.h"
/*
* printk() is no... | arch/x86/kernel/cpu/mce/genpool.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-only
/*
* Machine check injection support.
* Copyright 2008 Intel Corporation.
*
* Authors:
* Andi Kleen
* Ying Huang
*
* The AMD part (from mce_amd_inj.c): a simple MCE injection facility
* for testing different aspects of the RAS code. This driver should be
* built as mod... | arch/x86/kernel/cpu/mce/inject.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0
/*
* Intel specific MCE features.
* Copyright 2004 Zwane Mwaikambo <zwane@linuxpower.ca>
* Copyright (C) 2008, 2009 Intel Corporation
* Author: Andi Kleen
*/
#include <linux/gfp.h>
#include <linux/interrupt.h>
#include <linux/percpu.h>
#include <linux/sched.h>
#include <linux/c... | arch/x86/kernel/cpu/mce/intel.c | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
#ifndef __X86_MCE_INTERNAL_H__
#define __X86_MCE_INTERNAL_H__
#undef pr_fmt
#define pr_fmt(fmt) "mce: " fmt
#include <linux/device.h>
#include <asm/mce.h>
enum severity_level {
MCE_NO_SEVERITY,
MCE_DEFERRED_SEVERITY,
MCE_UCNA_SEVERITY = MCE_DEFERRED_SEVERITY,
MCE_KEEP_SEVER... | arch/x86/kernel/cpu/mce/internal.h | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0
/*
* P5 specific Machine Check Exception Reporting
* (C) Copyright 2002 Alan Cox <alan@lxorguk.ukuu.org.uk>
*/
#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/smp.h>
#include <linux/hardirq.h>
#include <asm/processor.h>
#include <as... | arch/x86/kernel/cpu/mce/p5.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-only
/*
* MCE grading rules.
* Copyright 2008, 2009 Intel Corporation.
*
* Author: Andi Kleen
*/
#include <linux/kernel.h>
#include <linux/seq_file.h>
#include <linux/init.h>
#include <linux/debugfs.h>
#include <linux/uaccess.h>
#include <asm/mce.h>
#include <asm/cpu_device_id.... | arch/x86/kernel/cpu/mce/severity.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0
/*
* Common corrected MCE threshold handler code:
*/
#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <asm/irq_vectors.h>
#include <asm/traps.h>
#include <asm/apic.h>
#include <asm/mce.h>
#include <asm/trace/irq_vectors.h>
#include "internal.h"
static u32 mce_apei... | arch/x86/kernel/cpu/mce/threshold.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0
/*
* IDT Winchip specific Machine Check Exception Reporting
* (C) Copyright 2002 Alan Cox <alan@lxorguk.ukuu.org.uk>
*/
#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/hardirq.h>
#include <asm/processor.h>
#include <asm/traps.h>
#in... | arch/x86/kernel/cpu/mce/winchip.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-only
/*
* AMD CPU Microcode Update Driver for Linux
*
* This driver allows to upgrade microcode on F10h AMD
* CPUs and later.
*
* Copyright (C) 2008-2011 Advanced Micro Devices Inc.
* 2013-2018 Borislav Petkov <bp@alien8.de>
*
* Author: Peter Oruba <peter.orub... | arch/x86/kernel/cpu/microcode/amd.c | null | null | null | null | null |
source | linux | /* Keep 'em sorted. */
static const struct patch_digest phashes[] = {
{ 0x8001227, {
0x99,0xc0,0x9b,0x2b,0xcc,0x9f,0x52,0x1b,
0x1a,0x5f,0x1d,0x83,0xa1,0x6c,0xc4,0x46,
0xe2,0x6c,0xda,0x73,0xfb,0x2d,0x23,0xa8,
0x77,0xdc,0x15,0x31,0x33,0x4a,0x46,0x18,
}
},
{ 0x8001250, {
0xc0,0x0b,0x6b,0x19,0xfd,0x5c,0x39,0x... | arch/x86/kernel/cpu/microcode/amd_shas.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-or-later
/*
* CPU Microcode Update Driver for Linux
*
* Copyright (C) 2000-2006 Tigran Aivazian <aivazian.tigran@gmail.com>
* 2006 Shaohua Li <shaohua.li@intel.com>
* 2013-2016 Borislav Petkov <bp@alien8.de>
*
* X86 CPU microcode early update for Linux:
*
* Copyr... | arch/x86/kernel/cpu/microcode/core.c | null | null | null | null | null |
source | linux | { .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x03, .steppings = 0x0004, .driver_data = 0x2 },
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x05, .steppings = 0x0001, .driver_data = 0x45 },
{ .flags = X86_CPU_ID_FLAG_ENTRY_VA... | arch/x86/kernel/cpu/microcode/intel-ucode-defs.h | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-or-later
/*
* Intel CPU Microcode Update Driver for Linux
*
* Copyright (C) 2000-2006 Tigran Aivazian <aivazian.tigran@gmail.com>
* 2006 Shaohua Li <shaohua.li@intel.com>
*
* Intel CPU microcode early update for Linux
*
* Copyright (C) 2012 Fenghua Yu <fenghua.yu@intel.com>... | arch/x86/kernel/cpu/microcode/intel.c | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
#ifndef _X86_MICROCODE_INTERNAL_H
#define _X86_MICROCODE_INTERNAL_H
#include <linux/earlycpio.h>
#include <linux/initrd.h>
#include <asm/cpu.h>
#include <asm/microcode.h>
struct device;
enum ucode_state {
UCODE_OK = 0,
UCODE_NEW,
UCODE_NEW_SAFE,
UCODE_UPDATED,
UCODE_NFOUN... | arch/x86/kernel/cpu/microcode/internal.h | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0
#include <linux/init.h>
#include <linux/mm.h>
#include <asm/mtrr.h>
#include <asm/msr.h>
#include "mtrr.h"
static void
amd_get_mtrr(unsigned int reg, unsigned long *base,
unsigned long *size, mtrr_type *type)
{
unsigned long low, high;
rdmsr(MSR_K6_UWCCR, low, high);
/* U... | arch/x86/kernel/cpu/mtrr/amd.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0
#include <linux/init.h>
#include <linux/mm.h>
#include <asm/mtrr.h>
#include <asm/msr.h>
#include "mtrr.h"
static struct {
unsigned long high;
unsigned long low;
} centaur_mcr[8];
static u8 centaur_mcr_reserved;
static u8 centaur_mcr_type; /* 0 for winchip, 1 for winchip2 */
/... | arch/x86/kernel/cpu/mtrr/centaur.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: LGPL-2.0+
/*
* MTRR (Memory Type Range Register) cleanup
*
* Copyright (C) 2009 Yinghai Lu
*/
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/smp.h>
#include <linux/cpu.h>
#include <linux/mutex.h>
#include <linux/uaccess.h>
#include <linux/kvm_para.h>
#include <linux/rang... | arch/x86/kernel/cpu/mtrr/cleanup.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0
#include <linux/init.h>
#include <linux/io.h>
#include <linux/mm.h>
#include <asm/processor-cyrix.h>
#include <asm/processor-flags.h>
#include <asm/mtrr.h>
#include <asm/msr.h>
#include "mtrr.h"
static void
cyrix_get_arr(unsigned int reg, unsigned long *base,
unsigned long ... | arch/x86/kernel/cpu/mtrr/cyrix.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-only
/*
* This only handles 32bit MTRR on 32bit hosts. This is strictly wrong
* because MTRRs can span up to 40 bits (36bits on most modern x86)
*/
#include <linux/export.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/mm.h>
#include <linux/cc_platform.h>
#includ... | arch/x86/kernel/cpu/mtrr/generic.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0
#include <linux/capability.h>
#include <linux/seq_file.h>
#include <linux/uaccess.h>
#include <linux/proc_fs.h>
#include <linux/ctype.h>
#include <linux/string.h>
#include <linux/slab.h>
#include <linux/init.h>
#define LINE_SIZE 80
#include <asm/mtrr.h>
#include "mtrr.h"
#define ... | arch/x86/kernel/cpu/mtrr/if.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-only
#include <linux/types.h>
#include <linux/slab.h>
#include <linux/syscore_ops.h>
#include <asm/cpufeature.h>
#include <asm/mtrr.h>
#include <asm/processor.h>
#include "mtrr.h"
void mtrr_set_if(void)
{
switch (boot_cpu_data.x86_vendor) {
case X86_VENDOR_AMD:
/* Pre-Athlon (K... | arch/x86/kernel/cpu/mtrr/legacy.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: LGPL-2.0+
/* Generic MTRR (Memory Type Range Register) driver.
Copyright (C) 1997-2000 Richard Gooch
Copyright (c) 2002 Patrick Mochel
Richard Gooch may be reached by email at rgooch@atnf.csiro.au
The postal address is:
Richard Gooch, c/o ATNF, P. O. Box 76, E... | arch/x86/kernel/cpu/mtrr/mtrr.c | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
/*
* local MTRR defines.
*/
#include <linux/types.h>
#include <linux/stddef.h>
#define MTRR_CHANGE_MASK_FIXED 0x01
#define MTRR_CHANGE_MASK_VARIABLE 0x02
#define MTRR_CHANGE_MASK_DEFTYPE 0x04
extern bool mtrr_debug;
#define Dprintk(x...) do { if (mtrr_debug) pr_info(x)... | arch/x86/kernel/cpu/mtrr/mtrr.h | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-only
/*
* Resource Director Technology(RDT)
* - Cache Allocation code.
*
* Copyright (C) 2016 Intel Corporation
*
* Authors:
* Fenghua Yu <fenghua.yu@intel.com>
* Tony Luck <tony.luck@intel.com>
* Vikas Shivappa <vikas.shivappa@intel.com>
*
* More information abou... | arch/x86/kernel/cpu/resctrl/core.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-only
/*
* Resource Director Technology(RDT)
* - Cache Allocation code.
*
* Copyright (C) 2016 Intel Corporation
*
* Authors:
* Fenghua Yu <fenghua.yu@intel.com>
* Tony Luck <tony.luck@intel.com>
*
* More information about RDT be found in the Intel (R) x86 Architecture... | arch/x86/kernel/cpu/resctrl/ctrlmondata.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-only
/*
* Resource Director Technology(RDT)
* - Intel Application Energy Telemetry
*
* Copyright (C) 2025 Intel Corporation
*
* Author:
* Tony Luck <tony.luck@intel.com>
*/
#define pr_fmt(fmt) "resctrl: " fmt
#include <linux/bits.h>
#include <linux/compiler_types.h>
#i... | arch/x86/kernel/cpu/resctrl/intel_aet.c | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_X86_RESCTRL_INTERNAL_H
#define _ASM_X86_RESCTRL_INTERNAL_H
#include <linux/resctrl.h>
#define L3_QOS_CDP_ENABLE 0x01ULL
#define L2_QOS_CDP_ENABLE 0x01ULL
#define MBM_CNTR_WIDTH_BASE 24
#define MBA_IS_LINEAR 0x4
#define MBM_CNTR_WIDTH_OFFSET_AMD 20
/* Hygon... | arch/x86/kernel/cpu/resctrl/internal.h | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-only
/*
* Resource Director Technology(RDT)
* - Monitoring code
*
* Copyright (C) 2017 Intel Corporation
*
* Author:
* Vikas Shivappa <vikas.shivappa@intel.com>
*
* This replaces the cqm.c based on perf but we reuse a lot of
* code and datastructures originally from Pete... | arch/x86/kernel/cpu/resctrl/monitor.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0
/*
* Resource Director Technology (RDT)
*
* Pseudo-locking support built on top of Cache Allocation Technology (CAT)
*
* Copyright (C) 2018 Intel Corporation
*
* Author: Reinette Chatre <reinette.chatre@intel.com>
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <lin... | arch/x86/kernel/cpu/resctrl/pseudo_lock.c | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
#undef TRACE_SYSTEM
#define TRACE_SYSTEM resctrl
#if !defined(_X86_RESCTRL_PSEUDO_LOCK_TRACE_H) || defined(TRACE_HEADER_MULTI_READ)
#define _X86_RESCTRL_PSEUDO_LOCK_TRACE_H
#include <linux/tracepoint.h>
TRACE_EVENT(pseudo_lock_mem_latency,
TP_PROTO(u32 latency),
TP_AR... | arch/x86/kernel/cpu/resctrl/pseudo_lock_trace.h | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-only
/*
* User interface for Resource Allocation in Resource Director Technology(RDT)
*
* Copyright (C) 2016 Intel Corporation
*
* Author: Fenghua Yu <fenghua.yu@intel.com>
*
* More information about RDT be found in the Intel (R) x86 Architecture
* Software Developer Manual.
... | arch/x86/kernel/cpu/resctrl/rdtgroup.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0
/* Copyright(c) 2016-20 Intel Corporation. */
#include <linux/acpi.h>
#include <linux/miscdevice.h>
#include <linux/mman.h>
#include <linux/security.h>
#include <linux/suspend.h>
#include <asm/traps.h>
#include "driver.h"
#include "encl.h"
u64 sgx_attributes_reserved_mask;
u64 sgx... | arch/x86/kernel/cpu/sgx/driver.c | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
#ifndef __ARCH_SGX_DRIVER_H__
#define __ARCH_SGX_DRIVER_H__
#include <linux/kref.h>
#include <linux/mmu_notifier.h>
#include <linux/radix-tree.h>
#include <linux/rwsem.h>
#include <linux/sched.h>
#include <linux/workqueue.h>
#include <uapi/asm/sgx.h>
#include "sgx.h"
#define SGX... | arch/x86/kernel/cpu/sgx/driver.h | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0
/* Copyright(c) 2016-20 Intel Corporation. */
#include <linux/lockdep.h>
#include <linux/mm.h>
#include <linux/mman.h>
#include <linux/shmem_fs.h>
#include <linux/suspend.h>
#include <linux/sched/mm.h>
#include <asm/sgx.h>
#include "encl.h"
#include "encls.h"
#include "sgx.h"
stat... | arch/x86/kernel/cpu/sgx/encl.c | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
/**
* Copyright(c) 2016-20 Intel Corporation.
*
* Contains the software defined data structures for enclaves.
*/
#ifndef _X86_ENCL_H
#define _X86_ENCL_H
#include <linux/cpumask.h>
#include <linux/kref.h>
#include <linux/list.h>
#include <linux/mm_types.h>
#include <linux/mmu_... | arch/x86/kernel/cpu/sgx/encl.h | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
#ifndef _X86_ENCLS_H
#define _X86_ENCLS_H
#include <linux/bitops.h>
#include <linux/err.h>
#include <linux/io.h>
#include <linux/rwsem.h>
#include <linux/types.h>
#include <asm/asm.h>
#include <asm/traps.h>
#include "sgx.h"
/* Retrieve the encoded trapnr from the specified retur... | arch/x86/kernel/cpu/sgx/encls.h | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0
/* Copyright(c) 2016-20 Intel Corporation. */
#include <asm/mman.h>
#include <asm/sgx.h>
#include <crypto/sha2.h>
#include <linux/mman.h>
#include <linux/delay.h>
#include <linux/file.h>
#include <linux/hashtable.h>
#include <linux/highmem.h>
#include <linux/ratelimit.h>
#include <... | arch/x86/kernel/cpu/sgx/ioctl.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0
/* Copyright(c) 2016-20 Intel Corporation. */
#include <linux/file.h>
#include <linux/freezer.h>
#include <linux/highmem.h>
#include <linux/kthread.h>
#include <linux/kvm_types.h>
#include <linux/miscdevice.h>
#include <linux/node.h>
#include <linux/pagemap.h>
#include <linux/ratel... | arch/x86/kernel/cpu/sgx/main.c | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
#ifndef _X86_SGX_H
#define _X86_SGX_H
#include <linux/bitops.h>
#include <linux/err.h>
#include <linux/io.h>
#include <linux/rwsem.h>
#include <linux/types.h>
#include <asm/asm.h>
#include <asm/sgx.h>
#undef pr_fmt
#define pr_fmt(fmt) "sgx: " fmt
#define EREMOVE_ERROR_MESSAGE \... | arch/x86/kernel/cpu/sgx/sgx.h | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0
/*
* Device driver to expose SGX enclave memory to KVM guests.
*
* Copyright(c) 2021 Intel Corporation.
*/
#include <linux/kvm_types.h>
#include <linux/miscdevice.h>
#include <linux/mm.h>
#include <linux/mman.h>
#include <linux/sched/mm.h>
#include <linux/sched/signal.h>
#includ... | arch/x86/kernel/cpu/sgx/virt.c | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0
/*
* x86 FPU bug checks:
*/
#include <linux/printk.h>
#include <asm/cpufeature.h>
#include <asm/fpu/api.h>
/*
* Boot time CPU/FPU FDIV bug detection code:
*/
static double __initdata x = 4195835.0;
static double __initdata y = 3145727.0;
/*
* This used to check for exception... | arch/x86/kernel/fpu/bugs.c | null | null | null | null | null |
source | linux | /* SPDX-License-Identifier: GPL-2.0 */
#ifndef __X86_KERNEL_FPU_CONTEXT_H
#define __X86_KERNEL_FPU_CONTEXT_H
#include <asm/fpu/xstate.h>
#include <asm/trace/fpu.h>
/* Functions related to FPU context tracking */
/*
* The in-register FPU state for an FPU context on a CPU is assumed to be
* valid if the fpu->last_cp... | arch/x86/kernel/fpu/context.h | null | null | null | null | null |
source | linux | // SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 1994 Linus Torvalds
*
* Pentium III FXSR, SSE support
* General FPU state handling cleanups
* Gareth Hughes <gareth@valinux.com>, May 2000
*/
#include <asm/fpu/api.h>
#include <asm/fpu/regset.h>
#include <asm/fpu/sched.h>
#include <asm/fpu/signal.h>
#... | arch/x86/kernel/fpu/core.c | null | null | null | null | null |
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