data_type large_stringclasses 3 values | source large_stringclasses 29 values | code large_stringlengths 98 49.4M | filepath large_stringlengths 5 161 ⌀ | message large_stringclasses 234 values | commit large_stringclasses 234 values | subject large_stringclasses 418 values | critique large_stringlengths 101 1.26M ⌀ | metadata dict |
|---|---|---|---|---|---|---|---|---|
lkml_critique | lkml | Add a generic pinctrl binding for board-level pinmux chips that are
controlled through the multiplexer subsystem.
On some boards, especially development boards, external mux chips are used
to switch SoC signals between different peripherals (e.g. MMC and UART).
The mux select lines are often driven by a GPIO expander over I2C,
as illustrated below:
┌──────┐ ┌─────┐
│ SOC │ │ │ ┌───────┐
│ │ │ │───►│ MMC │
│ │ │ MUX │ └───────┘
│ ├─────►│ │ ┌───────┐
│ │ │ │───►│ UART │
│ │ └─────┘ └───────┘
│ │ ▲
│ │ ┌────┴──────────────┐
│ I2C ├───►│ GPIO Expander │
└──────┘ └───────────────────┘
Traditionally, gpio-hog is used to configure the onboard mux at boot.
However, the GPIO expander may probe later than consumer devices such as
MMC. As a result, the MUX might not be configured when the peripheral
driver probes, leading to initialization failures or data transfer errors.
Introduce a generic pinctrl binding that models the board-level MUX as a
pin control provider and builds proper device links between the MUX, its
GPIO controller, and peripheral devices. This ensures correct probe
ordering and reliable mux configuration.
The implementation leverages the standard multiplexer subsystem, which
provides broad support for onboard mux controllers and avoids the need for
per-driver custom MUX handling
Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
Changes in v2:
- Add release_mux callback,
test insmod/rmmod, mux_state_(de)select() called.
- Link to v1: https://lore.kernel.org/r/20260219-pinctrl-mux-v1-0-678d21637788@nxp.com
---
Frank Li (6):
mux: add devm_mux_control_get_from_np() to get mux from child node
dt-bindings: pinctrl: Add generic pinctrl for board-level mux chips
pinctrl: add optional .release_mux() callback
pinctrl: add generic board-level pinctrl driver using mux framework
arm64: dts: imx8mp-evk: add board-level mux for CAN2 and MICFIL
arm64: dts: imx8mp-evk: add flexcan2 overlay file
.../bindings/pinctrl/pinctrl-multiplexer.yaml | 57 +++++
.../devicetree/bindings/pinctrl/pinctrl.yaml | 2 +-
arch/arm64/boot/dts/freescale/Makefile | 4 +
.../boot/dts/freescale/imx8mp-evk-flexcan2.dtso | 15 ++
arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 23 +-
drivers/mux/core.c | 40 ++--
drivers/pinctrl/Kconfig | 9 +
drivers/pinctrl/Makefile | 1 +
drivers/pinctrl/pinctrl-generic-mux.c | 241 +++++++++++++++++++++
drivers/pinctrl/pinmux.c | 5 +
include/linux/mux/consumer.h | 16 +-
include/linux/pinctrl/pinmux.h | 5 +
12 files changed, 395 insertions(+), 23 deletions(-)
---
base-commit: ff76d257e86235eb07ef33db8644a517c48d1c3f
change-id: 20260213-pinctrl-mux-df9c5b661540
Best regards,
--
Frank Li <Frank.Li@nxp.com>
| null | null | null | [PATCH v2 0/6] pinctrl: Add generic pinctrl for board-level mux
chips | Add new API devm_mux_control_get_from_np() to retrieve a mux control from
a specified child device node.
Make devm_mux_control_get() call devm_mux_control_get_from_np() with a NULL
node parameter, which defaults to using the device's own of_node.
Support the following DT schema:
pinctrl@0 {
uart-func {
mux-state = <&mux_chip 0>;
};
spi-func {
mux-state = <&mux_chip 1>;
};
};
Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
drivers/mux/core.c | 40 ++++++++++++++++++++++++----------------
include/linux/mux/consumer.h | 16 ++++++++++++----
2 files changed, 36 insertions(+), 20 deletions(-)
diff --git a/drivers/mux/core.c b/drivers/mux/core.c
index a3840fe0995fe0125432d34edd8ab0f2cd1a6e9a..bdd959389b4ee1b0b8a7367fadf2c148c8f2f0b1 100644
--- a/drivers/mux/core.c
+++ b/drivers/mux/core.c
@@ -522,13 +522,15 @@ static struct mux_chip *of_find_mux_chip_by_node(struct device_node *np)
* @mux_name: The name identifying the mux-control.
* @state: Pointer to where the requested state is returned, or NULL when
* the required multiplexer states are handled by other means.
+ * @node: the device nodes, use dev->of_node if it is NULL.
*
* Return: A pointer to the mux-control, or an ERR_PTR with a negative errno.
*/
static struct mux_control *mux_get(struct device *dev, const char *mux_name,
- unsigned int *state)
+ unsigned int *state,
+ struct device_node *node)
{
- struct device_node *np = dev->of_node;
+ struct device_node *np = node ? node : dev->of_node;
struct of_phandle_args args;
struct mux_chip *mux_chip;
unsigned int controller;
@@ -617,7 +619,7 @@ static struct mux_control *mux_get(struct device *dev, const char *mux_name,
*/
struct mux_control *mux_control_get(struct device *dev, const char *mux_name)
{
- return mux_get(dev, mux_name, NULL);
+ return mux_get(dev, mux_name, NULL, NULL);
}
EXPORT_SYMBOL_GPL(mux_control_get);
@@ -641,15 +643,17 @@ static void devm_mux_control_release(struct device *dev, void *res)
}
/**
- * devm_mux_control_get() - Get the mux-control for a device, with resource
- * management.
+ * devm_mux_control_get_from_np() - Get the mux-control for a device, with
+ * resource management.
* @dev: The device that needs a mux-control.
* @mux_name: The name identifying the mux-control.
+ * @np: the device nodes, use dev->of_node if it is NULL.
*
* Return: Pointer to the mux-control, or an ERR_PTR with a negative errno.
*/
-struct mux_control *devm_mux_control_get(struct device *dev,
- const char *mux_name)
+struct mux_control *
+devm_mux_control_get_from_np(struct device *dev, const char *mux_name,
+ struct device_node *np)
{
struct mux_control **ptr, *mux;
@@ -668,16 +672,18 @@ struct mux_control *devm_mux_control_get(struct device *dev,
return mux;
}
-EXPORT_SYMBOL_GPL(devm_mux_control_get);
+EXPORT_SYMBOL_GPL(devm_mux_control_get_from_np);
/*
* mux_state_get() - Get the mux-state for a device.
* @dev: The device that needs a mux-state.
* @mux_name: The name identifying the mux-state.
+ * @np: the device nodes, use dev->of_node if it is NULL.
*
* Return: A pointer to the mux-state, or an ERR_PTR with a negative errno.
*/
-static struct mux_state *mux_state_get(struct device *dev, const char *mux_name)
+static struct mux_state *
+mux_state_get(struct device *dev, const char *mux_name, struct device_node *np)
{
struct mux_state *mstate;
@@ -685,7 +691,7 @@ static struct mux_state *mux_state_get(struct device *dev, const char *mux_name)
if (!mstate)
return ERR_PTR(-ENOMEM);
- mstate->mux = mux_get(dev, mux_name, &mstate->state);
+ mstate->mux = mux_get(dev, mux_name, &mstate->state, np);
if (IS_ERR(mstate->mux)) {
int err = PTR_ERR(mstate->mux);
@@ -716,15 +722,17 @@ static void devm_mux_state_release(struct device *dev, void *res)
}
/**
- * devm_mux_state_get() - Get the mux-state for a device, with resource
- * management.
+ * devm_mux_state_get_from_np() - Get the mux-state for a device, with resource
+ * management.
* @dev: The device that needs a mux-control.
* @mux_name: The name identifying the mux-control.
+ * @np: the device nodes, use dev->of_node if it is NULL.
*
* Return: Pointer to the mux-state, or an ERR_PTR with a negative errno.
*/
-struct mux_state *devm_mux_state_get(struct device *dev,
- const char *mux_name)
+struct mux_state *
+devm_mux_state_get_from_np(struct device *dev, const char *mux_name,
+ struct device_node *np)
{
struct mux_state **ptr, *mstate;
@@ -732,7 +740,7 @@ struct mux_state *devm_mux_state_get(struct device *dev,
if (!ptr)
return ERR_PTR(-ENOMEM);
- mstate = mux_state_get(dev, mux_name);
+ mstate = mux_state_get(dev, mux_name, np);
if (IS_ERR(mstate)) {
devres_free(ptr);
return mstate;
@@ -743,7 +751,7 @@ struct mux_state *devm_mux_state_get(struct device *dev,
return mstate;
}
-EXPORT_SYMBOL_GPL(devm_mux_state_get);
+EXPORT_SYMBOL_GPL(devm_mux_state_get_from_np);
/*
* Using subsys_initcall instead of module_init here to try to ensure - for
diff --git a/include/linux/mux/consumer.h b/include/linux/mux/consumer.h
index 2e25c838f8312532040441ee618424b76378aad7..6300e091035323dd6158d52a55a109d43ef120aa 100644
--- a/include/linux/mux/consumer.h
+++ b/include/linux/mux/consumer.h
@@ -56,9 +56,17 @@ int mux_state_deselect(struct mux_state *mstate);
struct mux_control *mux_control_get(struct device *dev, const char *mux_name);
void mux_control_put(struct mux_control *mux);
-struct mux_control *devm_mux_control_get(struct device *dev,
- const char *mux_name);
-struct mux_state *devm_mux_state_get(struct device *dev,
- const char *mux_name);
+struct mux_control *
+devm_mux_control_get_from_np(struct device *dev, const char *mux_name,
+ struct device_node *np);
+
+#define devm_mux_control_get(dev, mux_name) \
+ devm_mux_control_get_from_np(dev, mux_name, NULL)
+
+struct mux_state *
+devm_mux_state_get_from_np(struct device *dev, const char *mux_name,
+ struct device_node *np);
+#define devm_mux_state_get(dev, mux_name) \
+ devm_mux_state_get_from_np(dev, mux_name, NULL)
#endif /* _LINUX_MUX_CONSUMER_H */
--
2.43.0 | {
"author": "Frank Li <Frank.Li@nxp.com>",
"date": "Wed, 25 Feb 2026 18:55:05 -0500",
"is_openbsd": false,
"thread_id": "20260225-pinctrl-mux-v2-0-1436a25fa454@nxp.com.mbox.gz"
} |
lkml_critique | lkml | Add a generic pinctrl binding for board-level pinmux chips that are
controlled through the multiplexer subsystem.
On some boards, especially development boards, external mux chips are used
to switch SoC signals between different peripherals (e.g. MMC and UART).
The mux select lines are often driven by a GPIO expander over I2C,
as illustrated below:
┌──────┐ ┌─────┐
│ SOC │ │ │ ┌───────┐
│ │ │ │───►│ MMC │
│ │ │ MUX │ └───────┘
│ ├─────►│ │ ┌───────┐
│ │ │ │───►│ UART │
│ │ └─────┘ └───────┘
│ │ ▲
│ │ ┌────┴──────────────┐
│ I2C ├───►│ GPIO Expander │
└──────┘ └───────────────────┘
Traditionally, gpio-hog is used to configure the onboard mux at boot.
However, the GPIO expander may probe later than consumer devices such as
MMC. As a result, the MUX might not be configured when the peripheral
driver probes, leading to initialization failures or data transfer errors.
Introduce a generic pinctrl binding that models the board-level MUX as a
pin control provider and builds proper device links between the MUX, its
GPIO controller, and peripheral devices. This ensures correct probe
ordering and reliable mux configuration.
The implementation leverages the standard multiplexer subsystem, which
provides broad support for onboard mux controllers and avoids the need for
per-driver custom MUX handling
Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
Changes in v2:
- Add release_mux callback,
test insmod/rmmod, mux_state_(de)select() called.
- Link to v1: https://lore.kernel.org/r/20260219-pinctrl-mux-v1-0-678d21637788@nxp.com
---
Frank Li (6):
mux: add devm_mux_control_get_from_np() to get mux from child node
dt-bindings: pinctrl: Add generic pinctrl for board-level mux chips
pinctrl: add optional .release_mux() callback
pinctrl: add generic board-level pinctrl driver using mux framework
arm64: dts: imx8mp-evk: add board-level mux for CAN2 and MICFIL
arm64: dts: imx8mp-evk: add flexcan2 overlay file
.../bindings/pinctrl/pinctrl-multiplexer.yaml | 57 +++++
.../devicetree/bindings/pinctrl/pinctrl.yaml | 2 +-
arch/arm64/boot/dts/freescale/Makefile | 4 +
.../boot/dts/freescale/imx8mp-evk-flexcan2.dtso | 15 ++
arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 23 +-
drivers/mux/core.c | 40 ++--
drivers/pinctrl/Kconfig | 9 +
drivers/pinctrl/Makefile | 1 +
drivers/pinctrl/pinctrl-generic-mux.c | 241 +++++++++++++++++++++
drivers/pinctrl/pinmux.c | 5 +
include/linux/mux/consumer.h | 16 +-
include/linux/pinctrl/pinmux.h | 5 +
12 files changed, 395 insertions(+), 23 deletions(-)
---
base-commit: ff76d257e86235eb07ef33db8644a517c48d1c3f
change-id: 20260213-pinctrl-mux-df9c5b661540
Best regards,
--
Frank Li <Frank.Li@nxp.com>
| null | null | null | [PATCH v2 0/6] pinctrl: Add generic pinctrl for board-level mux
chips | Add a generic pinctrl binding for board-level pinmux chips that are
controlled through the multiplexer subsystem.
On some boards, especially development boards, external mux chips are used
to switch SoC signals between different peripherals (e.g. MMC and UART).
The mux select lines are often driven by a GPIO expander over I2C,
as illustrated below:
┌──────┐ ┌─────┐
│ SOC │ │ │ ┌───────┐
│ │ │ │───►│ MMC │
│ │ │ MUX │ └───────┘
│ ├─────►│ │ ┌───────┐
│ │ │ │───►│ UART │
│ │ └─────┘ └───────┘
│ │ ▲
│ │ ┌────┴──────────────┐
│ I2C ├───►│ GPIO Expander │
└──────┘ └───────────────────┘
Traditionally, gpio-hog is used to configure the onboard mux at boot.
However, the GPIO expander may probe later than consumer devices such as
MMC. As a result, the MUX might not be configured when the peripheral
driver probes, leading to initialization failures or data transfer errors.
Introduce a generic pinctrl binding that models the board-level MUX as a
pin control provider and builds proper device links between the MUX, its
GPIO controller, and peripheral devices. This ensures correct probe
ordering and reliable mux configuration.
The implementation leverages the standard multiplexer subsystem, which
provides broad support for onboard mux controllers and avoids the need for
per-driver custom MUX handling.
Allow pinctrl-* pattern as node name because this pinctrl device have not
reg property.
Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
change in v2:
- change descriptions for device, not for driver
- add missed additionalProperties: false
---
.../bindings/pinctrl/pinctrl-multiplexer.yaml | 57 ++++++++++++++++++++++
.../devicetree/bindings/pinctrl/pinctrl.yaml | 2 +-
2 files changed, 58 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-multiplexer.yaml b/Documentation/devicetree/bindings/pinctrl/pinctrl-multiplexer.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..2b0385ed879b70b24ca9c39b098c3840d08d7482
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-multiplexer.yaml
@@ -0,0 +1,57 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pinctrl/pinctrl-multiplexer.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Generic pinctrl device for on-board MUX Chips
+
+maintainers:
+ - Frank Li <Frank.Li@nxp.com>
+
+description:
+ Generic pinctrl device for on-board MUX Chips, which switch SoC signals
+ between different peripherals (e.g. MMC and UART).
+
+ The MUX select lines are often driven by a I2C GPIO expander.
+
+properties:
+ compatible:
+ const: pinctrl-multiplexer
+
+patternProperties:
+ '-grp$':
+ type: object
+ additionalProperties: false
+ properties:
+ mux-states:
+ maxItems: 1
+
+ required:
+ - mux-states
+
+required:
+ - compatible
+
+allOf:
+ - $ref: pinctrl.yaml#
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ pinctrl-mux {
+ compatible = "pinctrl-multiplexer";
+
+ uart-grp {
+ mux-states = <&mux 0>;
+ };
+
+ spi-grp {
+ mux-states = <&mux 1>;
+ };
+
+ i2c-grp {
+ mux-states = <&mux 2>;
+ };
+ };
diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/pinctrl.yaml
index 290438826c507ec6725f486d18cf686aa7c35e67..20176bf3074757de30f208e69b968a6bd6125273 100644
--- a/Documentation/devicetree/bindings/pinctrl/pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/pinctrl.yaml
@@ -27,7 +27,7 @@ description: |
properties:
$nodename:
- pattern: "^(pinctrl|pinmux)(@[0-9a-f]+)?$"
+ pattern: "^(pinctrl|pinmux)(@[0-9a-f]+|-[a-z0-9]+)?$"
"#pinctrl-cells":
description: >
--
2.43.0 | {
"author": "Frank Li <Frank.Li@nxp.com>",
"date": "Wed, 25 Feb 2026 18:55:06 -0500",
"is_openbsd": false,
"thread_id": "20260225-pinctrl-mux-v2-0-1436a25fa454@nxp.com.mbox.gz"
} |
lkml_critique | lkml | Add a generic pinctrl binding for board-level pinmux chips that are
controlled through the multiplexer subsystem.
On some boards, especially development boards, external mux chips are used
to switch SoC signals between different peripherals (e.g. MMC and UART).
The mux select lines are often driven by a GPIO expander over I2C,
as illustrated below:
┌──────┐ ┌─────┐
│ SOC │ │ │ ┌───────┐
│ │ │ │───►│ MMC │
│ │ │ MUX │ └───────┘
│ ├─────►│ │ ┌───────┐
│ │ │ │───►│ UART │
│ │ └─────┘ └───────┘
│ │ ▲
│ │ ┌────┴──────────────┐
│ I2C ├───►│ GPIO Expander │
└──────┘ └───────────────────┘
Traditionally, gpio-hog is used to configure the onboard mux at boot.
However, the GPIO expander may probe later than consumer devices such as
MMC. As a result, the MUX might not be configured when the peripheral
driver probes, leading to initialization failures or data transfer errors.
Introduce a generic pinctrl binding that models the board-level MUX as a
pin control provider and builds proper device links between the MUX, its
GPIO controller, and peripheral devices. This ensures correct probe
ordering and reliable mux configuration.
The implementation leverages the standard multiplexer subsystem, which
provides broad support for onboard mux controllers and avoids the need for
per-driver custom MUX handling
Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
Changes in v2:
- Add release_mux callback,
test insmod/rmmod, mux_state_(de)select() called.
- Link to v1: https://lore.kernel.org/r/20260219-pinctrl-mux-v1-0-678d21637788@nxp.com
---
Frank Li (6):
mux: add devm_mux_control_get_from_np() to get mux from child node
dt-bindings: pinctrl: Add generic pinctrl for board-level mux chips
pinctrl: add optional .release_mux() callback
pinctrl: add generic board-level pinctrl driver using mux framework
arm64: dts: imx8mp-evk: add board-level mux for CAN2 and MICFIL
arm64: dts: imx8mp-evk: add flexcan2 overlay file
.../bindings/pinctrl/pinctrl-multiplexer.yaml | 57 +++++
.../devicetree/bindings/pinctrl/pinctrl.yaml | 2 +-
arch/arm64/boot/dts/freescale/Makefile | 4 +
.../boot/dts/freescale/imx8mp-evk-flexcan2.dtso | 15 ++
arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 23 +-
drivers/mux/core.c | 40 ++--
drivers/pinctrl/Kconfig | 9 +
drivers/pinctrl/Makefile | 1 +
drivers/pinctrl/pinctrl-generic-mux.c | 241 +++++++++++++++++++++
drivers/pinctrl/pinmux.c | 5 +
include/linux/mux/consumer.h | 16 +-
include/linux/pinctrl/pinmux.h | 5 +
12 files changed, 395 insertions(+), 23 deletions(-)
---
base-commit: ff76d257e86235eb07ef33db8644a517c48d1c3f
change-id: 20260213-pinctrl-mux-df9c5b661540
Best regards,
--
Frank Li <Frank.Li@nxp.com>
| null | null | null | [PATCH v2 0/6] pinctrl: Add generic pinctrl for board-level mux
chips | Add an optional .release_mux() callback to the pinmux_ops.
Some devices require releasing resources that were previously acquired in
.set_mux(). Providing a dedicated .release_mux() callback allows drivers to
properly clean up hardware state or associated resources when a mux
function is no longer active.
The callback is optional and does not affect existing drivers.
Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
drivers/pinctrl/pinmux.c | 5 +++++
include/linux/pinctrl/pinmux.h | 5 +++++
2 files changed, 10 insertions(+)
diff --git a/drivers/pinctrl/pinmux.c b/drivers/pinctrl/pinmux.c
index 3a8dd184ba3d670e01a890427e19af59b65eb813..c705bc182266c596c4e6c820f5e3ffcadbbb2838 100644
--- a/drivers/pinctrl/pinmux.c
+++ b/drivers/pinctrl/pinmux.c
@@ -517,6 +517,7 @@ void pinmux_disable_setting(const struct pinctrl_setting *setting)
{
struct pinctrl_dev *pctldev = setting->pctldev;
const struct pinctrl_ops *pctlops = pctldev->desc->pctlops;
+ const struct pinmux_ops *ops = pctldev->desc->pmxops;
int ret = 0;
const unsigned int *pins = NULL;
unsigned int num_pins = 0;
@@ -563,6 +564,10 @@ void pinmux_disable_setting(const struct pinctrl_setting *setting)
pins[i], desc->name, gname);
}
}
+
+ if (ops->release_mux)
+ ops->release_mux(pctldev, setting->data.mux.func,
+ setting->data.mux.group);
}
#ifdef CONFIG_DEBUG_FS
diff --git a/include/linux/pinctrl/pinmux.h b/include/linux/pinctrl/pinmux.h
index 094bbe2fd6fd5ea3c5fdf5b6d6d9a7639700b50b..ad7f8c31655e10ae854f7c325f88d2a533dcb035 100644
--- a/include/linux/pinctrl/pinmux.h
+++ b/include/linux/pinctrl/pinmux.h
@@ -51,6 +51,8 @@ struct pinctrl_gpio_range;
* are handled by the pinmux subsystem. The @func_selector selects a
* certain function whereas @group_selector selects a certain set of pins
* to be used. On simple controllers the latter argument may be ignored
+ * @release_mux: disable a certain muxing function with a certain pin group,
+ * which set by @set_mux.
* @gpio_request_enable: requests and enables GPIO on a certain pin.
* Implement this only if you can mux every pin individually as GPIO. The
* affected GPIO range is passed along with an offset(pin number) into that
@@ -80,6 +82,9 @@ struct pinmux_ops {
unsigned int selector);
int (*set_mux) (struct pinctrl_dev *pctldev, unsigned int func_selector,
unsigned int group_selector);
+ void (*release_mux) (struct pinctrl_dev *pctldev,
+ unsigned int func_selector,
+ unsigned int group_selector);
int (*gpio_request_enable) (struct pinctrl_dev *pctldev,
struct pinctrl_gpio_range *range,
unsigned int offset);
--
2.43.0 | {
"author": "Frank Li <Frank.Li@nxp.com>",
"date": "Wed, 25 Feb 2026 18:55:07 -0500",
"is_openbsd": false,
"thread_id": "20260225-pinctrl-mux-v2-0-1436a25fa454@nxp.com.mbox.gz"
} |
lkml_critique | lkml | Add a generic pinctrl binding for board-level pinmux chips that are
controlled through the multiplexer subsystem.
On some boards, especially development boards, external mux chips are used
to switch SoC signals between different peripherals (e.g. MMC and UART).
The mux select lines are often driven by a GPIO expander over I2C,
as illustrated below:
┌──────┐ ┌─────┐
│ SOC │ │ │ ┌───────┐
│ │ │ │───►│ MMC │
│ │ │ MUX │ └───────┘
│ ├─────►│ │ ┌───────┐
│ │ │ │───►│ UART │
│ │ └─────┘ └───────┘
│ │ ▲
│ │ ┌────┴──────────────┐
│ I2C ├───►│ GPIO Expander │
└──────┘ └───────────────────┘
Traditionally, gpio-hog is used to configure the onboard mux at boot.
However, the GPIO expander may probe later than consumer devices such as
MMC. As a result, the MUX might not be configured when the peripheral
driver probes, leading to initialization failures or data transfer errors.
Introduce a generic pinctrl binding that models the board-level MUX as a
pin control provider and builds proper device links between the MUX, its
GPIO controller, and peripheral devices. This ensures correct probe
ordering and reliable mux configuration.
The implementation leverages the standard multiplexer subsystem, which
provides broad support for onboard mux controllers and avoids the need for
per-driver custom MUX handling
Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
Changes in v2:
- Add release_mux callback,
test insmod/rmmod, mux_state_(de)select() called.
- Link to v1: https://lore.kernel.org/r/20260219-pinctrl-mux-v1-0-678d21637788@nxp.com
---
Frank Li (6):
mux: add devm_mux_control_get_from_np() to get mux from child node
dt-bindings: pinctrl: Add generic pinctrl for board-level mux chips
pinctrl: add optional .release_mux() callback
pinctrl: add generic board-level pinctrl driver using mux framework
arm64: dts: imx8mp-evk: add board-level mux for CAN2 and MICFIL
arm64: dts: imx8mp-evk: add flexcan2 overlay file
.../bindings/pinctrl/pinctrl-multiplexer.yaml | 57 +++++
.../devicetree/bindings/pinctrl/pinctrl.yaml | 2 +-
arch/arm64/boot/dts/freescale/Makefile | 4 +
.../boot/dts/freescale/imx8mp-evk-flexcan2.dtso | 15 ++
arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 23 +-
drivers/mux/core.c | 40 ++--
drivers/pinctrl/Kconfig | 9 +
drivers/pinctrl/Makefile | 1 +
drivers/pinctrl/pinctrl-generic-mux.c | 241 +++++++++++++++++++++
drivers/pinctrl/pinmux.c | 5 +
include/linux/mux/consumer.h | 16 +-
include/linux/pinctrl/pinmux.h | 5 +
12 files changed, 395 insertions(+), 23 deletions(-)
---
base-commit: ff76d257e86235eb07ef33db8644a517c48d1c3f
change-id: 20260213-pinctrl-mux-df9c5b661540
Best regards,
--
Frank Li <Frank.Li@nxp.com>
| null | null | null | [PATCH v2 0/6] pinctrl: Add generic pinctrl for board-level mux
chips | Many boards use on-board mux chips (often controlled by GPIOs from an I2C
expander) to switch shared signals between peripherals.
Add a generic pinctrl driver built on top of the mux framework to
centralize mux handling and avoid probe ordering issues. Keep board-level
routing out of individual drivers and supports boot-time only mux
selection.
Ensure correct probe ordering, especially when the GPIO expander is probed
later.
Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
change in v2:
- fix copywrite by add nxp
- fix if (!*map) check
- add release_mux to call mux_state_deselect()
---
drivers/pinctrl/Kconfig | 9 ++
drivers/pinctrl/Makefile | 1 +
drivers/pinctrl/pinctrl-generic-mux.c | 241 ++++++++++++++++++++++++++++++++++
3 files changed, 251 insertions(+)
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index afecd9407f5354f5b92223f8cd80d2f7a08f8e7d..0657eeeeb587fa5e68dc3c1e00be35608e243b80 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -274,6 +274,15 @@ config PINCTRL_GEMINI
select GENERIC_PINCONF
select MFD_SYSCON
+config PINCTRL_GENERIC_MUX
+ tristate "Generic Pinctrl driver by using multiplexer"
+ depends on MULTIPLEXER
+ select PINMUX
+ select GENERIC_PINCONF
+ help
+ Generic pinctrl driver by MULTIPLEXER framework to control on
+ board pin selection.
+
config PINCTRL_INGENIC
bool "Pinctrl driver for the Ingenic JZ47xx SoCs"
default MACH_INGENIC
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index f7d5d5f76d0c8becc0aa1d77c68b6ced924ea264..fcd1703440d24579636e8ddb6cbd83a0a982dfb7 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -29,6 +29,7 @@ obj-$(CONFIG_PINCTRL_EQUILIBRIUM) += pinctrl-equilibrium.o
obj-$(CONFIG_PINCTRL_EP93XX) += pinctrl-ep93xx.o
obj-$(CONFIG_PINCTRL_EYEQ5) += pinctrl-eyeq5.o
obj-$(CONFIG_PINCTRL_GEMINI) += pinctrl-gemini.o
+obj-$(CONFIG_PINCTRL_GENERIC_MUX) += pinctrl-generic-mux.o
obj-$(CONFIG_PINCTRL_INGENIC) += pinctrl-ingenic.o
obj-$(CONFIG_PINCTRL_K210) += pinctrl-k210.o
obj-$(CONFIG_PINCTRL_K230) += pinctrl-k230.o
diff --git a/drivers/pinctrl/pinctrl-generic-mux.c b/drivers/pinctrl/pinctrl-generic-mux.c
new file mode 100644
index 0000000000000000000000000000000000000000..978cbc4f82a0b3e56dd83ce24426d4e764262a6e
--- /dev/null
+++ b/drivers/pinctrl/pinctrl-generic-mux.c
@@ -0,0 +1,241 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Generic Pin Control Driver for Board-Level Mux Chips
+ * Copyright (C) 2026 NXP
+ */
+
+#include <linux/cleanup.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/mutex.h>
+#include <linux/mux/consumer.h>
+#include <linux/platform_device.h>
+#include <linux/pinctrl/pinconf-generic.h>
+#include <linux/pinctrl/pinctrl.h>
+#include <linux/pinctrl/pinmux.h>
+#include <linux/slab.h>
+
+#include "core.h"
+#include "pinmux.h"
+
+struct mux_pin_function {
+ struct mux_state *mux_state;
+};
+
+struct mux_pinctrl {
+ struct device *dev;
+ struct pinctrl_dev *pctl;
+
+ /* mutex protect [pinctrl|pinmux]_generic functions */
+ struct mutex lock;
+ int cur_select;
+};
+
+static int
+mux_pinmux_dt_node_to_map(struct pinctrl_dev *pctldev,
+ struct device_node *np_config,
+ struct pinctrl_map **map, unsigned int *num_maps)
+{
+ struct mux_pinctrl *mpctl = pinctrl_dev_get_drvdata(pctldev);
+ struct mux_pin_function *function;
+ struct device *dev = mpctl->dev;
+ const char **pgnames;
+ int selector;
+ int group;
+ int ret;
+
+ *map = devm_kcalloc(dev, 1, sizeof(**map), GFP_KERNEL);
+ if (!*map)
+ return -ENOMEM;
+
+ *num_maps = 0;
+
+ function = devm_kzalloc(dev, sizeof(*function), GFP_KERNEL);
+ if (!function) {
+ ret = -ENOMEM;
+ goto err_func;
+ }
+
+ pgnames = devm_kzalloc(dev, sizeof(*pgnames), GFP_KERNEL);
+ if (!pgnames) {
+ ret = -ENOMEM;
+ goto err_pgnames;
+ }
+
+ pgnames[0] = np_config->name;
+
+ guard(mutex)(&mpctl->lock);
+
+ selector = pinmux_generic_add_function(mpctl->pctl, np_config->name,
+ pgnames, 1, function);
+ if (selector < 0) {
+ ret = selector;
+ goto err_add_func;
+ }
+
+ group = pinctrl_generic_add_group(mpctl->pctl, np_config->name, NULL, 0, mpctl);
+ if (group < 0) {
+ ret = group;
+ goto err_add_group;
+ }
+
+ function->mux_state = devm_mux_state_get_from_np(pctldev->dev, NULL, np_config);
+ if (IS_ERR(function->mux_state)) {
+ ret = PTR_ERR(function->mux_state);
+ goto err_mux_state_get;
+ }
+
+ (*map)->type = PIN_MAP_TYPE_MUX_GROUP;
+ (*map)->data.mux.group = np_config->name;
+ (*map)->data.mux.function = np_config->name;
+
+ *num_maps = 1;
+
+ return 0;
+
+err_mux_state_get:
+ pinctrl_generic_remove_group(mpctl->pctl, group);
+err_add_group:
+ pinmux_generic_remove_function(mpctl->pctl, selector);
+err_add_func:
+ devm_kfree(dev, pgnames);
+err_pgnames:
+ devm_kfree(dev, function);
+err_func:
+ devm_kfree(dev, *map);
+
+ return ret;
+}
+
+static void
+mux_pinmux_dt_free_map(struct pinctrl_dev *pctldev, struct pinctrl_map *map,
+ unsigned int num_maps)
+{
+ struct mux_pinctrl *mpctl = pinctrl_dev_get_drvdata(pctldev);
+
+ devm_kfree(mpctl->dev, map);
+}
+
+static const struct pinctrl_ops mux_pinctrl_ops = {
+ .get_groups_count = pinctrl_generic_get_group_count,
+ .get_group_name = pinctrl_generic_get_group_name,
+ .get_group_pins = pinctrl_generic_get_group_pins,
+ .dt_node_to_map = mux_pinmux_dt_node_to_map,
+ .dt_free_map = mux_pinmux_dt_free_map,
+};
+
+static int mux_pinmux_set_mux(struct pinctrl_dev *pctldev,
+ unsigned int func_selector,
+ unsigned int group_selector)
+{
+ struct mux_pinctrl *mpctl = pinctrl_dev_get_drvdata(pctldev);
+ const struct function_desc *function;
+ struct mux_pin_function *func;
+ int ret;
+
+ guard(mutex)(&mpctl->lock);
+
+ function = pinmux_generic_get_function(pctldev, func_selector);
+ func = function->data;
+
+ if (mpctl->cur_select == func_selector)
+ return 0;
+
+ if (mpctl->cur_select >= 0 && mpctl->cur_select != func_selector)
+ return -EINVAL;
+
+ ret = mux_state_select(func->mux_state);
+ if (ret)
+ return ret;
+
+ mpctl->cur_select = func_selector;
+
+ return 0;
+}
+
+static void mux_pinmux_release_mux(struct pinctrl_dev *pctldev,
+ unsigned int func_selector,
+ unsigned int group_selector)
+{
+ struct mux_pinctrl *mpctl = pinctrl_dev_get_drvdata(pctldev);
+ const struct function_desc *function;
+ struct mux_pin_function *func;
+
+ guard(mutex)(&mpctl->lock);
+
+ function = pinmux_generic_get_function(pctldev, func_selector);
+ func = function->data;
+
+ mux_state_deselect(func->mux_state);
+
+ mpctl->cur_select = -1;
+}
+
+static const struct pinmux_ops mux_pinmux_ops = {
+ .get_functions_count = pinmux_generic_get_function_count,
+ .get_function_name = pinmux_generic_get_function_name,
+ .get_function_groups = pinmux_generic_get_function_groups,
+ .set_mux = mux_pinmux_set_mux,
+ .release_mux = mux_pinmux_release_mux,
+};
+
+static int mux_pinctrl_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct mux_pinctrl *mpctl;
+ struct pinctrl_desc *pctl_desc;
+ int ret;
+
+ mpctl = devm_kzalloc(dev, sizeof(*mpctl), GFP_KERNEL);
+ if (!mpctl)
+ return -ENOMEM;
+
+ mpctl->dev = dev;
+ mpctl->cur_select = -1;
+
+ platform_set_drvdata(pdev, mpctl);
+
+ pctl_desc = devm_kzalloc(dev, sizeof(*pctl_desc), GFP_KERNEL);
+ if (!pctl_desc)
+ return -ENOMEM;
+
+ ret = devm_mutex_init(dev, &mpctl->lock);
+ if (ret)
+ return ret;
+
+ pctl_desc->name = dev_name(dev);
+ pctl_desc->owner = THIS_MODULE;
+ pctl_desc->pctlops = &mux_pinctrl_ops;
+ pctl_desc->pmxops = &mux_pinmux_ops;
+
+ ret = devm_pinctrl_register_and_init(dev, pctl_desc, mpctl,
+ &mpctl->pctl);
+ if (ret)
+ return dev_err_probe(dev, ret, "Failed to register pinctrl.\n");
+
+ ret = pinctrl_enable(mpctl->pctl);
+ if (ret)
+ return dev_err_probe(dev, ret, "Failed to enable pinctrl.\n");
+
+ return 0;
+}
+
+static const struct of_device_id mux_pinctrl_of_match[] = {
+ { .compatible = "pinctrl-multiplexer" },
+ { }
+};
+MODULE_DEVICE_TABLE(of, mux_pinctrl_of_match);
+
+static struct platform_driver mux_pinctrl_driver = {
+ .driver = {
+ .name = "generic-pinctrl-mux",
+ .of_match_table = mux_pinctrl_of_match,
+ },
+ .probe = mux_pinctrl_probe,
+};
+module_platform_driver(mux_pinctrl_driver);
+
+MODULE_AUTHOR("Frank Li <Frank.Li@nxp.com>");
+MODULE_DESCRIPTION("Generic Pin Control Driver for Board-Level Mux Chips");
+MODULE_LICENSE("GPL");
+
--
2.43.0 | {
"author": "Frank Li <Frank.Li@nxp.com>",
"date": "Wed, 25 Feb 2026 18:55:08 -0500",
"is_openbsd": false,
"thread_id": "20260225-pinctrl-mux-v2-0-1436a25fa454@nxp.com.mbox.gz"
} |
lkml_critique | lkml | Add a generic pinctrl binding for board-level pinmux chips that are
controlled through the multiplexer subsystem.
On some boards, especially development boards, external mux chips are used
to switch SoC signals between different peripherals (e.g. MMC and UART).
The mux select lines are often driven by a GPIO expander over I2C,
as illustrated below:
┌──────┐ ┌─────┐
│ SOC │ │ │ ┌───────┐
│ │ │ │───►│ MMC │
│ │ │ MUX │ └───────┘
│ ├─────►│ │ ┌───────┐
│ │ │ │───►│ UART │
│ │ └─────┘ └───────┘
│ │ ▲
│ │ ┌────┴──────────────┐
│ I2C ├───►│ GPIO Expander │
└──────┘ └───────────────────┘
Traditionally, gpio-hog is used to configure the onboard mux at boot.
However, the GPIO expander may probe later than consumer devices such as
MMC. As a result, the MUX might not be configured when the peripheral
driver probes, leading to initialization failures or data transfer errors.
Introduce a generic pinctrl binding that models the board-level MUX as a
pin control provider and builds proper device links between the MUX, its
GPIO controller, and peripheral devices. This ensures correct probe
ordering and reliable mux configuration.
The implementation leverages the standard multiplexer subsystem, which
provides broad support for onboard mux controllers and avoids the need for
per-driver custom MUX handling
Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
Changes in v2:
- Add release_mux callback,
test insmod/rmmod, mux_state_(de)select() called.
- Link to v1: https://lore.kernel.org/r/20260219-pinctrl-mux-v1-0-678d21637788@nxp.com
---
Frank Li (6):
mux: add devm_mux_control_get_from_np() to get mux from child node
dt-bindings: pinctrl: Add generic pinctrl for board-level mux chips
pinctrl: add optional .release_mux() callback
pinctrl: add generic board-level pinctrl driver using mux framework
arm64: dts: imx8mp-evk: add board-level mux for CAN2 and MICFIL
arm64: dts: imx8mp-evk: add flexcan2 overlay file
.../bindings/pinctrl/pinctrl-multiplexer.yaml | 57 +++++
.../devicetree/bindings/pinctrl/pinctrl.yaml | 2 +-
arch/arm64/boot/dts/freescale/Makefile | 4 +
.../boot/dts/freescale/imx8mp-evk-flexcan2.dtso | 15 ++
arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 23 +-
drivers/mux/core.c | 40 ++--
drivers/pinctrl/Kconfig | 9 +
drivers/pinctrl/Makefile | 1 +
drivers/pinctrl/pinctrl-generic-mux.c | 241 +++++++++++++++++++++
drivers/pinctrl/pinmux.c | 5 +
include/linux/mux/consumer.h | 16 +-
include/linux/pinctrl/pinmux.h | 5 +
12 files changed, 395 insertions(+), 23 deletions(-)
---
base-commit: ff76d257e86235eb07ef33db8644a517c48d1c3f
change-id: 20260213-pinctrl-mux-df9c5b661540
Best regards,
--
Frank Li <Frank.Li@nxp.com>
| null | null | null | [PATCH v2 0/6] pinctrl: Add generic pinctrl for board-level mux
chips | The board integrates an on-board mux to route shared signals to either
CAN2 or PDM (MICFIL). The mux is controlled by a GPIO.
Add a pinctrl-based multiplexer node to describe this routing and ensure
proper probe ordering of the dependent devices.
Previously, MICFIL operation implicitly depended on the default level of
PCA6416 GPIO3. After adding the pinctrl-multiplexer, make the dependency
explicit.
Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
change in v2
- update commit message to show why need update PDM MICIFL.
---
arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 23 +++++++++++++++++++++--
1 file changed, 21 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
index b256be710ea1281465f5cecc7a3b979f2c068e43..1341ee27239fd41a26117adc9023524ce50420a7 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
@@ -50,6 +50,25 @@ status {
};
};
+ can_mux: mux-controller-0 {
+ compatible = "gpio-mux";
+ #mux-control-cells = <0>;
+ #mux-state-cells = <1>;
+ mux-gpios = <&pca6416 3 GPIO_ACTIVE_HIGH>;
+ };
+
+ can_mux_pinctrl: pinctrl-gpiomux {
+ compatible = "pinctrl-multiplexer";
+
+ can_fun: can-grp {
+ mux-states = <&can_mux 1>;
+ };
+
+ pdm_fun: pdm-grp {
+ mux-states = <&can_mux 0>;
+ };
+ };
+
memory@40000000 {
device_type = "memory";
reg = <0x0 0x40000000 0 0xc0000000>,
@@ -446,7 +465,7 @@ &flexcan1 {
&flexcan2 {
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_flexcan2>;
+ pinctrl-0 = <&pinctrl_flexcan2>, <&can_fun>;
phys = <&flexcan_phy 1>;
status = "disabled";/* can2 pin conflict with pdm */
};
@@ -712,7 +731,7 @@ &lcdif3 {
&micfil {
#sound-dai-cells = <0>;
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pdm>;
+ pinctrl-0 = <&pinctrl_pdm>, <&pdm_fun>;
assigned-clocks = <&clk IMX8MP_CLK_PDM>;
assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
assigned-clock-rates = <196608000>;
--
2.43.0 | {
"author": "Frank Li <Frank.Li@nxp.com>",
"date": "Wed, 25 Feb 2026 18:55:09 -0500",
"is_openbsd": false,
"thread_id": "20260225-pinctrl-mux-v2-0-1436a25fa454@nxp.com.mbox.gz"
} |
lkml_critique | lkml | Add a generic pinctrl binding for board-level pinmux chips that are
controlled through the multiplexer subsystem.
On some boards, especially development boards, external mux chips are used
to switch SoC signals between different peripherals (e.g. MMC and UART).
The mux select lines are often driven by a GPIO expander over I2C,
as illustrated below:
┌──────┐ ┌─────┐
│ SOC │ │ │ ┌───────┐
│ │ │ │───►│ MMC │
│ │ │ MUX │ └───────┘
│ ├─────►│ │ ┌───────┐
│ │ │ │───►│ UART │
│ │ └─────┘ └───────┘
│ │ ▲
│ │ ┌────┴──────────────┐
│ I2C ├───►│ GPIO Expander │
└──────┘ └───────────────────┘
Traditionally, gpio-hog is used to configure the onboard mux at boot.
However, the GPIO expander may probe later than consumer devices such as
MMC. As a result, the MUX might not be configured when the peripheral
driver probes, leading to initialization failures or data transfer errors.
Introduce a generic pinctrl binding that models the board-level MUX as a
pin control provider and builds proper device links between the MUX, its
GPIO controller, and peripheral devices. This ensures correct probe
ordering and reliable mux configuration.
The implementation leverages the standard multiplexer subsystem, which
provides broad support for onboard mux controllers and avoids the need for
per-driver custom MUX handling
Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
Changes in v2:
- Add release_mux callback,
test insmod/rmmod, mux_state_(de)select() called.
- Link to v1: https://lore.kernel.org/r/20260219-pinctrl-mux-v1-0-678d21637788@nxp.com
---
Frank Li (6):
mux: add devm_mux_control_get_from_np() to get mux from child node
dt-bindings: pinctrl: Add generic pinctrl for board-level mux chips
pinctrl: add optional .release_mux() callback
pinctrl: add generic board-level pinctrl driver using mux framework
arm64: dts: imx8mp-evk: add board-level mux for CAN2 and MICFIL
arm64: dts: imx8mp-evk: add flexcan2 overlay file
.../bindings/pinctrl/pinctrl-multiplexer.yaml | 57 +++++
.../devicetree/bindings/pinctrl/pinctrl.yaml | 2 +-
arch/arm64/boot/dts/freescale/Makefile | 4 +
.../boot/dts/freescale/imx8mp-evk-flexcan2.dtso | 15 ++
arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 23 +-
drivers/mux/core.c | 40 ++--
drivers/pinctrl/Kconfig | 9 +
drivers/pinctrl/Makefile | 1 +
drivers/pinctrl/pinctrl-generic-mux.c | 241 +++++++++++++++++++++
drivers/pinctrl/pinmux.c | 5 +
include/linux/mux/consumer.h | 16 +-
include/linux/pinctrl/pinmux.h | 5 +
12 files changed, 395 insertions(+), 23 deletions(-)
---
base-commit: ff76d257e86235eb07ef33db8644a517c48d1c3f
change-id: 20260213-pinctrl-mux-df9c5b661540
Best regards,
--
Frank Li <Frank.Li@nxp.com>
| null | null | null | [PATCH v2 0/6] pinctrl: Add generic pinctrl for board-level mux
chips | Add flexcan2 overlay file, which enable flexcan2 node and disable micfil
node.
Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
arch/arm64/boot/dts/freescale/Makefile | 4 ++++
arch/arm64/boot/dts/freescale/imx8mp-evk-flexcan2.dtso | 15 +++++++++++++++
2 files changed, 19 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index 700bab4d3e6001fe6cf460fcb09cfe57acc77e36..bd377191a68a6167d5f9a65184d19c789a4223ee 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -233,6 +233,10 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-pdk3.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-picoitx.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-edm-g-wb.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk.dtb
+
+imx8mp-evk-flexcan2-dtbs += imx8mp-evk.dtb imx8mp-evk-flexcan2.dtbo
+dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk-flexcan2.dtb
+
dtb-$(CONFIG_ARCH_MXC) += imx8mp-frdm.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-hummingboard-mate.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-hummingboard-pro.dtb
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk-flexcan2.dtso b/arch/arm64/boot/dts/freescale/imx8mp-evk-flexcan2.dtso
new file mode 100644
index 0000000000000000000000000000000000000000..f7d2674c45f72353a20300300e98c8a1eba4a2a6
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-evk-flexcan2.dtso
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2026 NXP
+ */
+
+/dts-v1/;
+/plugin/;
+
+&flexcan2 {
+ status = "okay"; /* can2 pin conflict with pdm */
+};
+
+&micfil {
+ status = "disabled";
+};
--
2.43.0 | {
"author": "Frank Li <Frank.Li@nxp.com>",
"date": "Wed, 25 Feb 2026 18:55:10 -0500",
"is_openbsd": false,
"thread_id": "20260225-pinctrl-mux-v2-0-1436a25fa454@nxp.com.mbox.gz"
} |
lkml_critique | lkml | Add a generic pinctrl binding for board-level pinmux chips that are
controlled through the multiplexer subsystem.
On some boards, especially development boards, external mux chips are used
to switch SoC signals between different peripherals (e.g. MMC and UART).
The mux select lines are often driven by a GPIO expander over I2C,
as illustrated below:
┌──────┐ ┌─────┐
│ SOC │ │ │ ┌───────┐
│ │ │ │───►│ MMC │
│ │ │ MUX │ └───────┘
│ ├─────►│ │ ┌───────┐
│ │ │ │───►│ UART │
│ │ └─────┘ └───────┘
│ │ ▲
│ │ ┌────┴──────────────┐
│ I2C ├───►│ GPIO Expander │
└──────┘ └───────────────────┘
Traditionally, gpio-hog is used to configure the onboard mux at boot.
However, the GPIO expander may probe later than consumer devices such as
MMC. As a result, the MUX might not be configured when the peripheral
driver probes, leading to initialization failures or data transfer errors.
Introduce a generic pinctrl binding that models the board-level MUX as a
pin control provider and builds proper device links between the MUX, its
GPIO controller, and peripheral devices. This ensures correct probe
ordering and reliable mux configuration.
The implementation leverages the standard multiplexer subsystem, which
provides broad support for onboard mux controllers and avoids the need for
per-driver custom MUX handling
Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
Changes in v2:
- Add release_mux callback,
test insmod/rmmod, mux_state_(de)select() called.
- Link to v1: https://lore.kernel.org/r/20260219-pinctrl-mux-v1-0-678d21637788@nxp.com
---
Frank Li (6):
mux: add devm_mux_control_get_from_np() to get mux from child node
dt-bindings: pinctrl: Add generic pinctrl for board-level mux chips
pinctrl: add optional .release_mux() callback
pinctrl: add generic board-level pinctrl driver using mux framework
arm64: dts: imx8mp-evk: add board-level mux for CAN2 and MICFIL
arm64: dts: imx8mp-evk: add flexcan2 overlay file
.../bindings/pinctrl/pinctrl-multiplexer.yaml | 57 +++++
.../devicetree/bindings/pinctrl/pinctrl.yaml | 2 +-
arch/arm64/boot/dts/freescale/Makefile | 4 +
.../boot/dts/freescale/imx8mp-evk-flexcan2.dtso | 15 ++
arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 23 +-
drivers/mux/core.c | 40 ++--
drivers/pinctrl/Kconfig | 9 +
drivers/pinctrl/Makefile | 1 +
drivers/pinctrl/pinctrl-generic-mux.c | 241 +++++++++++++++++++++
drivers/pinctrl/pinmux.c | 5 +
include/linux/mux/consumer.h | 16 +-
include/linux/pinctrl/pinmux.h | 5 +
12 files changed, 395 insertions(+), 23 deletions(-)
---
base-commit: ff76d257e86235eb07ef33db8644a517c48d1c3f
change-id: 20260213-pinctrl-mux-df9c5b661540
Best regards,
--
Frank Li <Frank.Li@nxp.com>
| null | null | null | [PATCH v2 0/6] pinctrl: Add generic pinctrl for board-level mux
chips | On Thu, Feb 26, 2026 at 12:55 AM Frank Li <Frank.Li@nxp.com> wrote:
I think this is smart and elegant.
Reviewed-by: Linus Walleij <linusw@kernel.org>
Yours,
Linus Walleij | {
"author": "Linus Walleij <linusw@kernel.org>",
"date": "Fri, 27 Feb 2026 10:02:33 +0100",
"is_openbsd": false,
"thread_id": "20260225-pinctrl-mux-v2-0-1436a25fa454@nxp.com.mbox.gz"
} |
lkml_critique | lkml | Add a generic pinctrl binding for board-level pinmux chips that are
controlled through the multiplexer subsystem.
On some boards, especially development boards, external mux chips are used
to switch SoC signals between different peripherals (e.g. MMC and UART).
The mux select lines are often driven by a GPIO expander over I2C,
as illustrated below:
┌──────┐ ┌─────┐
│ SOC │ │ │ ┌───────┐
│ │ │ │───►│ MMC │
│ │ │ MUX │ └───────┘
│ ├─────►│ │ ┌───────┐
│ │ │ │───►│ UART │
│ │ └─────┘ └───────┘
│ │ ▲
│ │ ┌────┴──────────────┐
│ I2C ├───►│ GPIO Expander │
└──────┘ └───────────────────┘
Traditionally, gpio-hog is used to configure the onboard mux at boot.
However, the GPIO expander may probe later than consumer devices such as
MMC. As a result, the MUX might not be configured when the peripheral
driver probes, leading to initialization failures or data transfer errors.
Introduce a generic pinctrl binding that models the board-level MUX as a
pin control provider and builds proper device links between the MUX, its
GPIO controller, and peripheral devices. This ensures correct probe
ordering and reliable mux configuration.
The implementation leverages the standard multiplexer subsystem, which
provides broad support for onboard mux controllers and avoids the need for
per-driver custom MUX handling
Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
Changes in v2:
- Add release_mux callback,
test insmod/rmmod, mux_state_(de)select() called.
- Link to v1: https://lore.kernel.org/r/20260219-pinctrl-mux-v1-0-678d21637788@nxp.com
---
Frank Li (6):
mux: add devm_mux_control_get_from_np() to get mux from child node
dt-bindings: pinctrl: Add generic pinctrl for board-level mux chips
pinctrl: add optional .release_mux() callback
pinctrl: add generic board-level pinctrl driver using mux framework
arm64: dts: imx8mp-evk: add board-level mux for CAN2 and MICFIL
arm64: dts: imx8mp-evk: add flexcan2 overlay file
.../bindings/pinctrl/pinctrl-multiplexer.yaml | 57 +++++
.../devicetree/bindings/pinctrl/pinctrl.yaml | 2 +-
arch/arm64/boot/dts/freescale/Makefile | 4 +
.../boot/dts/freescale/imx8mp-evk-flexcan2.dtso | 15 ++
arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 23 +-
drivers/mux/core.c | 40 ++--
drivers/pinctrl/Kconfig | 9 +
drivers/pinctrl/Makefile | 1 +
drivers/pinctrl/pinctrl-generic-mux.c | 241 +++++++++++++++++++++
drivers/pinctrl/pinmux.c | 5 +
include/linux/mux/consumer.h | 16 +-
include/linux/pinctrl/pinmux.h | 5 +
12 files changed, 395 insertions(+), 23 deletions(-)
---
base-commit: ff76d257e86235eb07ef33db8644a517c48d1c3f
change-id: 20260213-pinctrl-mux-df9c5b661540
Best regards,
--
Frank Li <Frank.Li@nxp.com>
| null | null | null | [PATCH v2 0/6] pinctrl: Add generic pinctrl for board-level mux
chips | On 2/26/26 01:55, Frank Li wrote:
Nit: NXP legal asked us to drop (C) so this should be Copyright 2026 NXP! | {
"author": "Daniel Baluta <daniel.baluta@oss.nxp.com>",
"date": "Fri, 27 Feb 2026 11:09:34 +0200",
"is_openbsd": false,
"thread_id": "20260225-pinctrl-mux-v2-0-1436a25fa454@nxp.com.mbox.gz"
} |
lkml_critique | lkml | Add a generic pinctrl binding for board-level pinmux chips that are
controlled through the multiplexer subsystem.
On some boards, especially development boards, external mux chips are used
to switch SoC signals between different peripherals (e.g. MMC and UART).
The mux select lines are often driven by a GPIO expander over I2C,
as illustrated below:
┌──────┐ ┌─────┐
│ SOC │ │ │ ┌───────┐
│ │ │ │───►│ MMC │
│ │ │ MUX │ └───────┘
│ ├─────►│ │ ┌───────┐
│ │ │ │───►│ UART │
│ │ └─────┘ └───────┘
│ │ ▲
│ │ ┌────┴──────────────┐
│ I2C ├───►│ GPIO Expander │
└──────┘ └───────────────────┘
Traditionally, gpio-hog is used to configure the onboard mux at boot.
However, the GPIO expander may probe later than consumer devices such as
MMC. As a result, the MUX might not be configured when the peripheral
driver probes, leading to initialization failures or data transfer errors.
Introduce a generic pinctrl binding that models the board-level MUX as a
pin control provider and builds proper device links between the MUX, its
GPIO controller, and peripheral devices. This ensures correct probe
ordering and reliable mux configuration.
The implementation leverages the standard multiplexer subsystem, which
provides broad support for onboard mux controllers and avoids the need for
per-driver custom MUX handling
Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
Changes in v2:
- Add release_mux callback,
test insmod/rmmod, mux_state_(de)select() called.
- Link to v1: https://lore.kernel.org/r/20260219-pinctrl-mux-v1-0-678d21637788@nxp.com
---
Frank Li (6):
mux: add devm_mux_control_get_from_np() to get mux from child node
dt-bindings: pinctrl: Add generic pinctrl for board-level mux chips
pinctrl: add optional .release_mux() callback
pinctrl: add generic board-level pinctrl driver using mux framework
arm64: dts: imx8mp-evk: add board-level mux for CAN2 and MICFIL
arm64: dts: imx8mp-evk: add flexcan2 overlay file
.../bindings/pinctrl/pinctrl-multiplexer.yaml | 57 +++++
.../devicetree/bindings/pinctrl/pinctrl.yaml | 2 +-
arch/arm64/boot/dts/freescale/Makefile | 4 +
.../boot/dts/freescale/imx8mp-evk-flexcan2.dtso | 15 ++
arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 23 +-
drivers/mux/core.c | 40 ++--
drivers/pinctrl/Kconfig | 9 +
drivers/pinctrl/Makefile | 1 +
drivers/pinctrl/pinctrl-generic-mux.c | 241 +++++++++++++++++++++
drivers/pinctrl/pinmux.c | 5 +
include/linux/mux/consumer.h | 16 +-
include/linux/pinctrl/pinmux.h | 5 +
12 files changed, 395 insertions(+), 23 deletions(-)
---
base-commit: ff76d257e86235eb07ef33db8644a517c48d1c3f
change-id: 20260213-pinctrl-mux-df9c5b661540
Best regards,
--
Frank Li <Frank.Li@nxp.com>
| null | null | null | [PATCH v2 0/6] pinctrl: Add generic pinctrl for board-level mux
chips | On Thu, Feb 26, 2026 at 12:55 AM Frank Li <Frank.Li@nxp.com> wrote:
Can you explain why you need this custom code for this?
Nominally pin control defines and puts the hardware into a
number of states such as:
"default"
"idle"
"sleep"
"init"
Usually (at least for silicon) what .release_mux() would to
is semantically equivalent to a transition into the "init" or
"sleep" state. And if these are not descriptive enough you can
even define a "released" state.
Is it not possible to reach the set-up of the hardware that you
are desiring by just defining such a relaxed state?
Yours,
Linus Walleij | {
"author": "Linus Walleij <linusw@kernel.org>",
"date": "Fri, 27 Feb 2026 10:07:05 +0100",
"is_openbsd": false,
"thread_id": "20260225-pinctrl-mux-v2-0-1436a25fa454@nxp.com.mbox.gz"
} |
lkml_critique | lkml | Add a generic pinctrl binding for board-level pinmux chips that are
controlled through the multiplexer subsystem.
On some boards, especially development boards, external mux chips are used
to switch SoC signals between different peripherals (e.g. MMC and UART).
The mux select lines are often driven by a GPIO expander over I2C,
as illustrated below:
┌──────┐ ┌─────┐
│ SOC │ │ │ ┌───────┐
│ │ │ │───►│ MMC │
│ │ │ MUX │ └───────┘
│ ├─────►│ │ ┌───────┐
│ │ │ │───►│ UART │
│ │ └─────┘ └───────┘
│ │ ▲
│ │ ┌────┴──────────────┐
│ I2C ├───►│ GPIO Expander │
└──────┘ └───────────────────┘
Traditionally, gpio-hog is used to configure the onboard mux at boot.
However, the GPIO expander may probe later than consumer devices such as
MMC. As a result, the MUX might not be configured when the peripheral
driver probes, leading to initialization failures or data transfer errors.
Introduce a generic pinctrl binding that models the board-level MUX as a
pin control provider and builds proper device links between the MUX, its
GPIO controller, and peripheral devices. This ensures correct probe
ordering and reliable mux configuration.
The implementation leverages the standard multiplexer subsystem, which
provides broad support for onboard mux controllers and avoids the need for
per-driver custom MUX handling
Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
Changes in v2:
- Add release_mux callback,
test insmod/rmmod, mux_state_(de)select() called.
- Link to v1: https://lore.kernel.org/r/20260219-pinctrl-mux-v1-0-678d21637788@nxp.com
---
Frank Li (6):
mux: add devm_mux_control_get_from_np() to get mux from child node
dt-bindings: pinctrl: Add generic pinctrl for board-level mux chips
pinctrl: add optional .release_mux() callback
pinctrl: add generic board-level pinctrl driver using mux framework
arm64: dts: imx8mp-evk: add board-level mux for CAN2 and MICFIL
arm64: dts: imx8mp-evk: add flexcan2 overlay file
.../bindings/pinctrl/pinctrl-multiplexer.yaml | 57 +++++
.../devicetree/bindings/pinctrl/pinctrl.yaml | 2 +-
arch/arm64/boot/dts/freescale/Makefile | 4 +
.../boot/dts/freescale/imx8mp-evk-flexcan2.dtso | 15 ++
arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 23 +-
drivers/mux/core.c | 40 ++--
drivers/pinctrl/Kconfig | 9 +
drivers/pinctrl/Makefile | 1 +
drivers/pinctrl/pinctrl-generic-mux.c | 241 +++++++++++++++++++++
drivers/pinctrl/pinmux.c | 5 +
include/linux/mux/consumer.h | 16 +-
include/linux/pinctrl/pinmux.h | 5 +
12 files changed, 395 insertions(+), 23 deletions(-)
---
base-commit: ff76d257e86235eb07ef33db8644a517c48d1c3f
change-id: 20260213-pinctrl-mux-df9c5b661540
Best regards,
--
Frank Li <Frank.Li@nxp.com>
| null | null | null | [PATCH v2 0/6] pinctrl: Add generic pinctrl for board-level mux
chips | Hi Frank,
thanks for your patch!
On Thu, Feb 26, 2026 at 12:55 AM Frank Li <Frank.Li@nxp.com> wrote:
(...)
This is so close to the pinctrl-internal helpers that you better work with
those instead.
Can't you just use pinctrl_generic_pins_function_dt_node_to_map()?
It was added in the last merge window in
commit 43722575e5cdcc6c457bfe81fae9c3ad343ea031
"pinctrl: add generic functions + pins mapper"
There are problems with the above, for example this is only called
on the probe() path so you would not need any devm_*free calls,
as you can see in the generic helpers.
I think you need to look into using or extending the existing helpers for this,
Just use pinctrl_utils_free_map().
As mentioned I have my doubts about this, explain why this hardware
is so different that this is needed.
Other than that I like the concept!
Yours,
Linus Walleij | {
"author": "Linus Walleij <linusw@kernel.org>",
"date": "Fri, 27 Feb 2026 10:20:14 +0100",
"is_openbsd": false,
"thread_id": "20260225-pinctrl-mux-v2-0-1436a25fa454@nxp.com.mbox.gz"
} |
lkml_critique | lkml | Add a generic pinctrl binding for board-level pinmux chips that are
controlled through the multiplexer subsystem.
On some boards, especially development boards, external mux chips are used
to switch SoC signals between different peripherals (e.g. MMC and UART).
The mux select lines are often driven by a GPIO expander over I2C,
as illustrated below:
┌──────┐ ┌─────┐
│ SOC │ │ │ ┌───────┐
│ │ │ │───►│ MMC │
│ │ │ MUX │ └───────┘
│ ├─────►│ │ ┌───────┐
│ │ │ │───►│ UART │
│ │ └─────┘ └───────┘
│ │ ▲
│ │ ┌────┴──────────────┐
│ I2C ├───►│ GPIO Expander │
└──────┘ └───────────────────┘
Traditionally, gpio-hog is used to configure the onboard mux at boot.
However, the GPIO expander may probe later than consumer devices such as
MMC. As a result, the MUX might not be configured when the peripheral
driver probes, leading to initialization failures or data transfer errors.
Introduce a generic pinctrl binding that models the board-level MUX as a
pin control provider and builds proper device links between the MUX, its
GPIO controller, and peripheral devices. This ensures correct probe
ordering and reliable mux configuration.
The implementation leverages the standard multiplexer subsystem, which
provides broad support for onboard mux controllers and avoids the need for
per-driver custom MUX handling
Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
Changes in v2:
- Add release_mux callback,
test insmod/rmmod, mux_state_(de)select() called.
- Link to v1: https://lore.kernel.org/r/20260219-pinctrl-mux-v1-0-678d21637788@nxp.com
---
Frank Li (6):
mux: add devm_mux_control_get_from_np() to get mux from child node
dt-bindings: pinctrl: Add generic pinctrl for board-level mux chips
pinctrl: add optional .release_mux() callback
pinctrl: add generic board-level pinctrl driver using mux framework
arm64: dts: imx8mp-evk: add board-level mux for CAN2 and MICFIL
arm64: dts: imx8mp-evk: add flexcan2 overlay file
.../bindings/pinctrl/pinctrl-multiplexer.yaml | 57 +++++
.../devicetree/bindings/pinctrl/pinctrl.yaml | 2 +-
arch/arm64/boot/dts/freescale/Makefile | 4 +
.../boot/dts/freescale/imx8mp-evk-flexcan2.dtso | 15 ++
arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 23 +-
drivers/mux/core.c | 40 ++--
drivers/pinctrl/Kconfig | 9 +
drivers/pinctrl/Makefile | 1 +
drivers/pinctrl/pinctrl-generic-mux.c | 241 +++++++++++++++++++++
drivers/pinctrl/pinmux.c | 5 +
include/linux/mux/consumer.h | 16 +-
include/linux/pinctrl/pinmux.h | 5 +
12 files changed, 395 insertions(+), 23 deletions(-)
---
base-commit: ff76d257e86235eb07ef33db8644a517c48d1c3f
change-id: 20260213-pinctrl-mux-df9c5b661540
Best regards,
--
Frank Li <Frank.Li@nxp.com>
| null | null | null | [PATCH v2 0/6] pinctrl: Add generic pinctrl for board-level mux
chips | On Fri, Feb 27, 2026 at 10:20:14AM +0100, Linus Walleij wrote:
As board mux (uart and flexcan) exist, for example, only one of UART and
FlexCAN work.
when modprobe uart.ko, mux_state_select called.
So flexcan driver can't get such mux as expected.
when remmod uart.ko, we need release mux_state, so flexcan driver can
get such resource.
Genernally, DT may only enouble one of UART or flexcan.
but insmod uart.ko
rmmod uart.ko
insmod uart.ko (here also need release previous's state at prevous rmmod).
Frank | {
"author": "Frank Li <Frank.li@nxp.com>",
"date": "Fri, 27 Feb 2026 10:22:45 -0500",
"is_openbsd": false,
"thread_id": "20260225-pinctrl-mux-v2-0-1436a25fa454@nxp.com.mbox.gz"
} |
lkml_critique | lkml | Add a generic pinctrl binding for board-level pinmux chips that are
controlled through the multiplexer subsystem.
On some boards, especially development boards, external mux chips are used
to switch SoC signals between different peripherals (e.g. MMC and UART).
The mux select lines are often driven by a GPIO expander over I2C,
as illustrated below:
┌──────┐ ┌─────┐
│ SOC │ │ │ ┌───────┐
│ │ │ │───►│ MMC │
│ │ │ MUX │ └───────┘
│ ├─────►│ │ ┌───────┐
│ │ │ │───►│ UART │
│ │ └─────┘ └───────┘
│ │ ▲
│ │ ┌────┴──────────────┐
│ I2C ├───►│ GPIO Expander │
└──────┘ └───────────────────┘
Traditionally, gpio-hog is used to configure the onboard mux at boot.
However, the GPIO expander may probe later than consumer devices such as
MMC. As a result, the MUX might not be configured when the peripheral
driver probes, leading to initialization failures or data transfer errors.
Introduce a generic pinctrl binding that models the board-level MUX as a
pin control provider and builds proper device links between the MUX, its
GPIO controller, and peripheral devices. This ensures correct probe
ordering and reliable mux configuration.
The implementation leverages the standard multiplexer subsystem, which
provides broad support for onboard mux controllers and avoids the need for
per-driver custom MUX handling
Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
Changes in v2:
- Add release_mux callback,
test insmod/rmmod, mux_state_(de)select() called.
- Link to v1: https://lore.kernel.org/r/20260219-pinctrl-mux-v1-0-678d21637788@nxp.com
---
Frank Li (6):
mux: add devm_mux_control_get_from_np() to get mux from child node
dt-bindings: pinctrl: Add generic pinctrl for board-level mux chips
pinctrl: add optional .release_mux() callback
pinctrl: add generic board-level pinctrl driver using mux framework
arm64: dts: imx8mp-evk: add board-level mux for CAN2 and MICFIL
arm64: dts: imx8mp-evk: add flexcan2 overlay file
.../bindings/pinctrl/pinctrl-multiplexer.yaml | 57 +++++
.../devicetree/bindings/pinctrl/pinctrl.yaml | 2 +-
arch/arm64/boot/dts/freescale/Makefile | 4 +
.../boot/dts/freescale/imx8mp-evk-flexcan2.dtso | 15 ++
arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 23 +-
drivers/mux/core.c | 40 ++--
drivers/pinctrl/Kconfig | 9 +
drivers/pinctrl/Makefile | 1 +
drivers/pinctrl/pinctrl-generic-mux.c | 241 +++++++++++++++++++++
drivers/pinctrl/pinmux.c | 5 +
include/linux/mux/consumer.h | 16 +-
include/linux/pinctrl/pinmux.h | 5 +
12 files changed, 395 insertions(+), 23 deletions(-)
---
base-commit: ff76d257e86235eb07ef33db8644a517c48d1c3f
change-id: 20260213-pinctrl-mux-df9c5b661540
Best regards,
--
Frank Li <Frank.Li@nxp.com>
| null | null | null | [PATCH v2 0/6] pinctrl: Add generic pinctrl for board-level mux
chips | On Fri, Feb 27, 2026 at 10:07:05AM +0100, Linus Walleij wrote:
I am not familiar with pinctrl code. I just need a place to call a callback
which do opposite work at .set_mux() function.
I see pair function pinmux_enable_setting() call .set_mux() and
pinmux_disable_setting() just missing do oppsite work of .set_mux();
I may think too simple. I just do insmod/rmmod test. Any suggestion where
is good place to put it?
Does it call pair pinmux_enable(disable)_setting when switch state?
Frank | {
"author": "Frank Li <Frank.li@nxp.com>",
"date": "Fri, 27 Feb 2026 10:32:30 -0500",
"is_openbsd": false,
"thread_id": "20260225-pinctrl-mux-v2-0-1436a25fa454@nxp.com.mbox.gz"
} |
lkml_critique | lkml | Hi,
it was a known limitation, in the SCMI Clock protocol support, the lack of
dynamic allocation around per-clock rates discovery: fixed size statically
per-clock rates arrays did not scale and was increasingly a waste of memory
(see [1]).
This series aim at solving this in successive steps:
- simplify and reduce to the minimum possible the rates data info exposed
to the SCMI driver by scmi_clock_info
- move away from static fixed allocation of per-clock rates arrays in
favour of a completely dynamic runtime allocation: just allocate what
is needed based on the effectively discovered
This is done in patches 1-6.
A further bigger optimization suggested in a past series [1] by Etienne
would be, whenever allowed by the spec, to limit upfront the number of
queries in order to simply retrieve min and max rate, that are indeed the
only rates needed by the CLK SCMI driver.
The approach proposed in [1] was open coding and duplicating some of the
functionalities already provided by SCMI iterators, though.
Patch 7-10 implement such optimization instead by:
- reworking core SCMI iterators to support bound enumerations
- use such new bound iterators to perform the minimum number of queries
in order to ony retrieve min an max rate
As a final result now the rates enumeration triggered by the CLK SCMI
driver, while still allocating for all the existent rates, miminize the
number of SCMI CLK_DESCRIBE_RATE messages needed to obtain min and max.
Finally, patch 11 introduces a new clock protocol operation to be able to
trigger anytime on demand a full enumeration and obtain the full list of
rates when needed, not only min/max: this latter method is really only used
currently by some dowstream SCMI Test driver of mine.
Based on v7.0-rc1.
Tested on JUNO and an emulated environment.
Any feeback welcome.
Thanks,
Cristian
[1]: https://lore.kernel.org/arm-scmi/aZsX-oplR6fiLBBN@pluto/T/#t
[2]: https://lore.kernel.org/20241203173908.3148794-2-etienne.carriere@foss.st.com
---
Cristian Marussi (11):
firmware: arm_scmi: Add clock determine_rate operation
clk: scmi: Use new determine_rate clock operation
firmware: arm_scmi: Simplify clock rates exposed interface
clk: scmi: Use new simplified per-clock rate properties
firmware: arm_scmi: Drop unused clock rate interfaces
firmware: arm_scmi: Make clock rates allocation dynamic
firmware: arm_scmi: Harden clock parents discovery
firmware: arm_scmi: Refactor iterators internal allocation
firmware: arm_scmi: Add bound iterators support
firmware: arm_scmi: Use bound iterators to minimize discovered rates
firmware: arm_scmi: Introduce all_rates_get clock operation
drivers/clk/clk-scmi.c | 48 +----
drivers/firmware/arm_scmi/clock.c | 296 ++++++++++++++++++++------
drivers/firmware/arm_scmi/driver.c | 73 +++++--
drivers/firmware/arm_scmi/protocols.h | 13 +-
include/linux/scmi_protocol.h | 29 +--
5 files changed, 314 insertions(+), 145 deletions(-)
--
2.53.0
| null | null | null | [PATCH 00/11] SCMI Clock rates discovery rework | Add a clock operation to help determining the effective rate, closest to
the required one, that a specific clock can support.
Calculation is currently performed kernel side and the logic is taken
directly from the SCMI Clock driver: embedding the determinate rate logic
in the protocol layer enables semplifications in the SCMI Clock protocol
interface and will more easily accommodate further evolutions where such
determine_rate logic into is optionally delegated to the platform SCMI
server.
Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
---
Spoiler alert next SCMI spec will most probably include a new
CLOCK_DETERMINE_RATE command to delegate to the platform such calculations,
so this clock proto_ops will be needed anyway sooner or later
---
drivers/firmware/arm_scmi/clock.c | 42 +++++++++++++++++++++++++++++++
include/linux/scmi_protocol.h | 6 +++++
2 files changed, 48 insertions(+)
diff --git a/drivers/firmware/arm_scmi/clock.c b/drivers/firmware/arm_scmi/clock.c
index ab36871650a1..54e8b59c3941 100644
--- a/drivers/firmware/arm_scmi/clock.c
+++ b/drivers/firmware/arm_scmi/clock.c
@@ -8,6 +8,7 @@
#include <linux/module.h>
#include <linux/limits.h>
#include <linux/sort.h>
+#include <asm/div64.h>
#include "protocols.h"
#include "notify.h"
@@ -624,6 +625,46 @@ static int scmi_clock_rate_set(const struct scmi_protocol_handle *ph,
return ret;
}
+static int scmi_clock_determine_rate(const struct scmi_protocol_handle *ph,
+ u32 clk_id, unsigned long *rate)
+{
+ u64 fmin, fmax, ftmp;
+ struct scmi_clock_info *clk;
+ struct clock_info *ci = ph->get_priv(ph);
+
+ if (!rate)
+ return -EINVAL;
+
+ clk = scmi_clock_domain_lookup(ci, clk_id);
+ if (IS_ERR(clk))
+ return PTR_ERR(clk);
+
+ /*
+ * If we can't figure out what rate it will be, so just return the
+ * rate back to the caller.
+ */
+ if (clk->rate_discrete)
+ return 0;
+
+ fmin = clk->range.min_rate;
+ fmax = clk->range.max_rate;
+ if (*rate <= fmin) {
+ *rate = fmin;
+ return 0;
+ } else if (*rate >= fmax) {
+ *rate = fmax;
+ return 0;
+ }
+
+ ftmp = *rate - fmin;
+ ftmp += clk->range.step_size - 1; /* to round up */
+ do_div(ftmp, clk->range.step_size);
+
+ *rate = ftmp * clk->range.step_size + fmin;
+
+ return 0;
+}
+
static int
scmi_clock_config_set(const struct scmi_protocol_handle *ph, u32 clk_id,
enum clk_state state,
@@ -936,6 +977,7 @@ static const struct scmi_clk_proto_ops clk_proto_ops = {
.info_get = scmi_clock_info_get,
.rate_get = scmi_clock_rate_get,
.rate_set = scmi_clock_rate_set,
+ .determine_rate = scmi_clock_determine_rate,
.enable = scmi_clock_enable,
.disable = scmi_clock_disable,
.state_get = scmi_clock_state_get,
diff --git a/include/linux/scmi_protocol.h b/include/linux/scmi_protocol.h
index aafaac1496b0..28579c145045 100644
--- a/include/linux/scmi_protocol.h
+++ b/include/linux/scmi_protocol.h
@@ -91,6 +91,10 @@ enum scmi_clock_oem_config {
* @info_get: get the information of the specified clock
* @rate_get: request the current clock rate of a clock
* @rate_set: set the clock rate of a clock
+ * @determine_rate: determine the effective rate that can be supported by a
+ * clock calculating the closest allowed rate.
+ * Note that @rate is an input/output parameter used both to
+ * describe the requested rate and report the closest match
* @enable: enables the specified clock
* @disable: disables the specified clock
* @state_get: get the status of the specified clock
@@ -108,6 +112,8 @@ struct scmi_clk_proto_ops {
u64 *rate);
int (*rate_set)(const struct scmi_protocol_handle *ph, u32 clk_id,
u64 rate);
+ int (*determine_rate)(const struct scmi_protocol_handle *ph, u32 clk_id,
+ unsigned long *rate);
int (*enable)(const struct scmi_protocol_handle *ph, u32 clk_id,
bool atomic);
int (*disable)(const struct scmi_protocol_handle *ph, u32 clk_id,
--
2.53.0 | {
"author": "Cristian Marussi <cristian.marussi@arm.com>",
"date": "Fri, 27 Feb 2026 15:32:15 +0000",
"is_openbsd": false,
"thread_id": "20260227153225.2778358-12-cristian.marussi@arm.com.mbox.gz"
} |
lkml_critique | lkml | Hi,
it was a known limitation, in the SCMI Clock protocol support, the lack of
dynamic allocation around per-clock rates discovery: fixed size statically
per-clock rates arrays did not scale and was increasingly a waste of memory
(see [1]).
This series aim at solving this in successive steps:
- simplify and reduce to the minimum possible the rates data info exposed
to the SCMI driver by scmi_clock_info
- move away from static fixed allocation of per-clock rates arrays in
favour of a completely dynamic runtime allocation: just allocate what
is needed based on the effectively discovered
This is done in patches 1-6.
A further bigger optimization suggested in a past series [1] by Etienne
would be, whenever allowed by the spec, to limit upfront the number of
queries in order to simply retrieve min and max rate, that are indeed the
only rates needed by the CLK SCMI driver.
The approach proposed in [1] was open coding and duplicating some of the
functionalities already provided by SCMI iterators, though.
Patch 7-10 implement such optimization instead by:
- reworking core SCMI iterators to support bound enumerations
- use such new bound iterators to perform the minimum number of queries
in order to ony retrieve min an max rate
As a final result now the rates enumeration triggered by the CLK SCMI
driver, while still allocating for all the existent rates, miminize the
number of SCMI CLK_DESCRIBE_RATE messages needed to obtain min and max.
Finally, patch 11 introduces a new clock protocol operation to be able to
trigger anytime on demand a full enumeration and obtain the full list of
rates when needed, not only min/max: this latter method is really only used
currently by some dowstream SCMI Test driver of mine.
Based on v7.0-rc1.
Tested on JUNO and an emulated environment.
Any feeback welcome.
Thanks,
Cristian
[1]: https://lore.kernel.org/arm-scmi/aZsX-oplR6fiLBBN@pluto/T/#t
[2]: https://lore.kernel.org/20241203173908.3148794-2-etienne.carriere@foss.st.com
---
Cristian Marussi (11):
firmware: arm_scmi: Add clock determine_rate operation
clk: scmi: Use new determine_rate clock operation
firmware: arm_scmi: Simplify clock rates exposed interface
clk: scmi: Use new simplified per-clock rate properties
firmware: arm_scmi: Drop unused clock rate interfaces
firmware: arm_scmi: Make clock rates allocation dynamic
firmware: arm_scmi: Harden clock parents discovery
firmware: arm_scmi: Refactor iterators internal allocation
firmware: arm_scmi: Add bound iterators support
firmware: arm_scmi: Use bound iterators to minimize discovered rates
firmware: arm_scmi: Introduce all_rates_get clock operation
drivers/clk/clk-scmi.c | 48 +----
drivers/firmware/arm_scmi/clock.c | 296 ++++++++++++++++++++------
drivers/firmware/arm_scmi/driver.c | 73 +++++--
drivers/firmware/arm_scmi/protocols.h | 13 +-
include/linux/scmi_protocol.h | 29 +--
5 files changed, 314 insertions(+), 145 deletions(-)
--
2.53.0
| null | null | null | [PATCH 00/11] SCMI Clock rates discovery rework | Use the Clock protocol layer determine_rate logic to calculate the closest
rate that can be supported by a specific clock.
No functional change.
Cc: Brian Masney <bmasney@redhat.com>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: linux-clk@vger.kernel.org
Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
---
Note that the calculation logic in the protocol layer is exactly the same
as it wes here.
@Brian I suppose once your CLK_ROUNDING_FW_MANAGED sereis is merged I can flag
such SCMI clocks.
---
drivers/clk/clk-scmi.c | 31 ++++++-------------------------
1 file changed, 6 insertions(+), 25 deletions(-)
diff --git a/drivers/clk/clk-scmi.c b/drivers/clk/clk-scmi.c
index 6b286ea6f121..c223e4ef1dd1 100644
--- a/drivers/clk/clk-scmi.c
+++ b/drivers/clk/clk-scmi.c
@@ -12,7 +12,6 @@
#include <linux/of.h>
#include <linux/module.h>
#include <linux/scmi_protocol.h>
-#include <asm/div64.h>
#define NOT_ATOMIC false
#define ATOMIC true
@@ -57,35 +56,17 @@ static unsigned long scmi_clk_recalc_rate(struct clk_hw *hw,
static int scmi_clk_determine_rate(struct clk_hw *hw,
struct clk_rate_request *req)
{
- u64 fmin, fmax, ftmp;
+ int ret;
struct scmi_clk *clk = to_scmi_clk(hw);
/*
- * We can't figure out what rate it will be, so just return the
- * rate back to the caller. scmi_clk_recalc_rate() will be called
- * after the rate is set and we'll know what rate the clock is
+ * If we could not get a better rate scmi_clk_recalc_rate() will be
+ * called after the rate is set and we'll know what rate the clock is
* running at then.
*/
- if (clk->info->rate_discrete)
- return 0;
-
- fmin = clk->info->range.min_rate;
- fmax = clk->info->range.max_rate;
- if (req->rate <= fmin) {
- req->rate = fmin;
-
- return 0;
- } else if (req->rate >= fmax) {
- req->rate = fmax;
-
- return 0;
- }
-
- ftmp = req->rate - fmin;
- ftmp += clk->info->range.step_size - 1; /* to round up */
- do_div(ftmp, clk->info->range.step_size);
-
- req->rate = ftmp * clk->info->range.step_size + fmin;
+ ret = scmi_proto_clk_ops->determine_rate(clk->ph, clk->id, &req->rate);
+ if (ret)
+ return ret;
return 0;
}
--
2.53.0 | {
"author": "Cristian Marussi <cristian.marussi@arm.com>",
"date": "Fri, 27 Feb 2026 15:32:16 +0000",
"is_openbsd": false,
"thread_id": "20260227153225.2778358-12-cristian.marussi@arm.com.mbox.gz"
} |
lkml_critique | lkml | Hi,
it was a known limitation, in the SCMI Clock protocol support, the lack of
dynamic allocation around per-clock rates discovery: fixed size statically
per-clock rates arrays did not scale and was increasingly a waste of memory
(see [1]).
This series aim at solving this in successive steps:
- simplify and reduce to the minimum possible the rates data info exposed
to the SCMI driver by scmi_clock_info
- move away from static fixed allocation of per-clock rates arrays in
favour of a completely dynamic runtime allocation: just allocate what
is needed based on the effectively discovered
This is done in patches 1-6.
A further bigger optimization suggested in a past series [1] by Etienne
would be, whenever allowed by the spec, to limit upfront the number of
queries in order to simply retrieve min and max rate, that are indeed the
only rates needed by the CLK SCMI driver.
The approach proposed in [1] was open coding and duplicating some of the
functionalities already provided by SCMI iterators, though.
Patch 7-10 implement such optimization instead by:
- reworking core SCMI iterators to support bound enumerations
- use such new bound iterators to perform the minimum number of queries
in order to ony retrieve min an max rate
As a final result now the rates enumeration triggered by the CLK SCMI
driver, while still allocating for all the existent rates, miminize the
number of SCMI CLK_DESCRIBE_RATE messages needed to obtain min and max.
Finally, patch 11 introduces a new clock protocol operation to be able to
trigger anytime on demand a full enumeration and obtain the full list of
rates when needed, not only min/max: this latter method is really only used
currently by some dowstream SCMI Test driver of mine.
Based on v7.0-rc1.
Tested on JUNO and an emulated environment.
Any feeback welcome.
Thanks,
Cristian
[1]: https://lore.kernel.org/arm-scmi/aZsX-oplR6fiLBBN@pluto/T/#t
[2]: https://lore.kernel.org/20241203173908.3148794-2-etienne.carriere@foss.st.com
---
Cristian Marussi (11):
firmware: arm_scmi: Add clock determine_rate operation
clk: scmi: Use new determine_rate clock operation
firmware: arm_scmi: Simplify clock rates exposed interface
clk: scmi: Use new simplified per-clock rate properties
firmware: arm_scmi: Drop unused clock rate interfaces
firmware: arm_scmi: Make clock rates allocation dynamic
firmware: arm_scmi: Harden clock parents discovery
firmware: arm_scmi: Refactor iterators internal allocation
firmware: arm_scmi: Add bound iterators support
firmware: arm_scmi: Use bound iterators to minimize discovered rates
firmware: arm_scmi: Introduce all_rates_get clock operation
drivers/clk/clk-scmi.c | 48 +----
drivers/firmware/arm_scmi/clock.c | 296 ++++++++++++++++++++------
drivers/firmware/arm_scmi/driver.c | 73 +++++--
drivers/firmware/arm_scmi/protocols.h | 13 +-
include/linux/scmi_protocol.h | 29 +--
5 files changed, 314 insertions(+), 145 deletions(-)
--
2.53.0
| null | null | null | [PATCH 00/11] SCMI Clock rates discovery rework | Move needlessly exposed fields away from scmi_clock_info into the new
internal struct scmi_clock_desc while keeping exposed only the two new
min_rate and max_rate fields for each clock.
No functional change.
Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
---
drivers/firmware/arm_scmi/clock.c | 145 +++++++++++++++---------------
include/linux/scmi_protocol.h | 2 +
2 files changed, 74 insertions(+), 73 deletions(-)
diff --git a/drivers/firmware/arm_scmi/clock.c b/drivers/firmware/arm_scmi/clock.c
index 54e8b59c3941..f5d1c608f85a 100644
--- a/drivers/firmware/arm_scmi/clock.c
+++ b/drivers/firmware/arm_scmi/clock.c
@@ -157,13 +157,27 @@ struct scmi_clock_rate_notify_payld {
__le32 rate_high;
};
+struct scmi_clock_desc {
+ u32 id;
+ bool rate_discrete;
+ unsigned int num_rates;
+ u64 rates[SCMI_MAX_NUM_RATES];
+#define RATE_MIN 0
+#define RATE_MAX 1
+#define RATE_STEP 2
+ struct scmi_clock_info info;
+};
+
+#define to_desc(p) (container_of((p), struct scmi_clock_desc, info))
+
struct clock_info {
int num_clocks;
int max_async_req;
bool notify_rate_changed_cmd;
bool notify_rate_change_requested_cmd;
atomic_t cur_async_req;
- struct scmi_clock_info *clk;
+ struct scmi_clock_desc *clkds;
+#define CLOCK_INFO(c, i) (&(((c)->clkds + (i))->info))
int (*clock_config_set)(const struct scmi_protocol_handle *ph,
u32 clk_id, enum clk_state state,
enum scmi_clock_oem_config oem_type,
@@ -185,7 +199,7 @@ scmi_clock_domain_lookup(struct clock_info *ci, u32 clk_id)
if (clk_id >= ci->num_clocks)
return ERR_PTR(-EINVAL);
- return ci->clk + clk_id;
+ return CLOCK_INFO(ci, clk_id);
}
static int
@@ -226,8 +240,7 @@ scmi_clock_protocol_attributes_get(const struct scmi_protocol_handle *ph,
struct scmi_clk_ipriv {
struct device *dev;
- u32 clk_id;
- struct scmi_clock_info *clk;
+ struct scmi_clock_desc *clkd;
};
static void iter_clk_possible_parents_prepare_message(void *message, unsigned int desc_index,
@@ -236,7 +249,7 @@ static void iter_clk_possible_parents_prepare_message(void *message, unsigned in
struct scmi_msg_clock_possible_parents *msg = message;
const struct scmi_clk_ipriv *p = priv;
- msg->id = cpu_to_le32(p->clk_id);
+ msg->id = cpu_to_le32(p->clkd->id);
/* Set the number of OPPs to be skipped/already read */
msg->skip_parents = cpu_to_le32(desc_index);
}
@@ -246,7 +259,6 @@ static int iter_clk_possible_parents_update_state(struct scmi_iterator_state *st
{
const struct scmi_msg_resp_clock_possible_parents *r = response;
struct scmi_clk_ipriv *p = priv;
- struct device *dev = ((struct scmi_clk_ipriv *)p)->dev;
u32 flags;
flags = le32_to_cpu(r->num_parent_flags);
@@ -258,12 +270,13 @@ static int iter_clk_possible_parents_update_state(struct scmi_iterator_state *st
* assume it's returned+remaining on first call.
*/
if (!st->max_resources) {
- p->clk->num_parents = st->num_returned + st->num_remaining;
- p->clk->parents = devm_kcalloc(dev, p->clk->num_parents,
- sizeof(*p->clk->parents),
- GFP_KERNEL);
- if (!p->clk->parents) {
- p->clk->num_parents = 0;
+ p->clkd->info.num_parents = st->num_returned + st->num_remaining;
+ p->clkd->info.parents = devm_kcalloc(p->dev,
+ p->clkd->info.num_parents,
+ sizeof(*p->clkd->info.parents),
+ GFP_KERNEL);
+ if (!p->clkd->info.parents) {
+ p->clkd->info.num_parents = 0;
return -ENOMEM;
}
st->max_resources = st->num_returned + st->num_remaining;
@@ -280,29 +293,27 @@ static int iter_clk_possible_parents_process_response(const struct scmi_protocol
const struct scmi_msg_resp_clock_possible_parents *r = response;
struct scmi_clk_ipriv *p = priv;
- u32 *parent = &p->clk->parents[st->desc_index + st->loop_idx];
+ u32 *parent = &p->clkd->info.parents[st->desc_index + st->loop_idx];
*parent = le32_to_cpu(r->possible_parents[st->loop_idx]);
return 0;
}
-static int scmi_clock_possible_parents(const struct scmi_protocol_handle *ph, u32 clk_id,
- struct scmi_clock_info *clk)
+static int scmi_clock_possible_parents(const struct scmi_protocol_handle *ph,
+ u32 clk_id, struct clock_info *cinfo)
{
struct scmi_iterator_ops ops = {
.prepare_message = iter_clk_possible_parents_prepare_message,
.update_state = iter_clk_possible_parents_update_state,
.process_response = iter_clk_possible_parents_process_response,
};
-
+ struct scmi_clock_desc *clkd = &cinfo->clkds[clk_id];
struct scmi_clk_ipriv ppriv = {
- .clk_id = clk_id,
- .clk = clk,
+ .clkd = clkd,
.dev = ph->dev,
};
void *iter;
- int ret;
iter = ph->hops->iter_response_init(ph, &ops, 0,
CLOCK_POSSIBLE_PARENTS_GET,
@@ -311,9 +322,7 @@ static int scmi_clock_possible_parents(const struct scmi_protocol_handle *ph, u3
if (IS_ERR(iter))
return PTR_ERR(iter);
- ret = ph->hops->iter_response_run(iter);
-
- return ret;
+ return ph->hops->iter_response_run(iter);
}
static int
@@ -352,7 +361,7 @@ static int scmi_clock_attributes_get(const struct scmi_protocol_handle *ph,
u32 attributes;
struct scmi_xfer *t;
struct scmi_msg_resp_clock_attributes *attr;
- struct scmi_clock_info *clk = cinfo->clk + clk_id;
+ struct scmi_clock_info *clk = CLOCK_INFO(cinfo, clk_id);
ret = ph->xops->xfer_get_init(ph, CLOCK_ATTRIBUTES,
sizeof(clk_id), sizeof(*attr), &t);
@@ -394,7 +403,7 @@ static int scmi_clock_attributes_get(const struct scmi_protocol_handle *ph,
clk->rate_change_requested_notifications = true;
if (PROTOCOL_REV_MAJOR(ph->version) >= 0x3) {
if (SUPPORTS_PARENT_CLOCK(attributes))
- scmi_clock_possible_parents(ph, clk_id, clk);
+ scmi_clock_possible_parents(ph, clk_id, cinfo);
if (SUPPORTS_GET_PERMISSIONS(attributes))
scmi_clock_get_permissions(ph, clk_id, clk);
if (SUPPORTS_EXTENDED_CONFIG(attributes))
@@ -424,7 +433,7 @@ static void iter_clk_describe_prepare_message(void *message,
struct scmi_msg_clock_describe_rates *msg = message;
const struct scmi_clk_ipriv *p = priv;
- msg->id = cpu_to_le32(p->clk_id);
+ msg->id = cpu_to_le32(p->clkd->id);
/* Set the number of rates to be skipped/already read */
msg->rate_index = cpu_to_le32(desc_index);
}
@@ -457,14 +466,14 @@ iter_clk_describe_update_state(struct scmi_iterator_state *st,
flags = le32_to_cpu(r->num_rates_flags);
st->num_remaining = NUM_REMAINING(flags);
st->num_returned = NUM_RETURNED(flags);
- p->clk->rate_discrete = RATE_DISCRETE(flags);
+ p->clkd->rate_discrete = RATE_DISCRETE(flags);
/* Warn about out of spec replies ... */
- if (!p->clk->rate_discrete &&
+ if (!p->clkd->rate_discrete &&
(st->num_returned != 3 || st->num_remaining != 0)) {
dev_warn(p->dev,
"Out-of-spec CLOCK_DESCRIBE_RATES reply for %s - returned:%d remaining:%d rx_len:%zd\n",
- p->clk->name, st->num_returned, st->num_remaining,
+ p->clkd->info.name, st->num_returned, st->num_remaining,
st->rx_len);
SCMI_QUIRK(clock_rates_triplet_out_of_spec,
@@ -479,38 +488,19 @@ iter_clk_describe_process_response(const struct scmi_protocol_handle *ph,
const void *response,
struct scmi_iterator_state *st, void *priv)
{
- int ret = 0;
struct scmi_clk_ipriv *p = priv;
const struct scmi_msg_resp_clock_describe_rates *r = response;
- if (!p->clk->rate_discrete) {
- switch (st->desc_index + st->loop_idx) {
- case 0:
- p->clk->range.min_rate = RATE_TO_U64(r->rate[0]);
- break;
- case 1:
- p->clk->range.max_rate = RATE_TO_U64(r->rate[1]);
- break;
- case 2:
- p->clk->range.step_size = RATE_TO_U64(r->rate[2]);
- break;
- default:
- ret = -EINVAL;
- break;
- }
- } else {
- u64 *rate = &p->clk->list.rates[st->desc_index + st->loop_idx];
+ p->clkd->rates[st->desc_index + st->loop_idx] =
+ RATE_TO_U64(r->rate[st->loop_idx]);
+ p->clkd->num_rates++;
- *rate = RATE_TO_U64(r->rate[st->loop_idx]);
- p->clk->list.num_rates++;
- }
-
- return ret;
+ return 0;
}
static int
scmi_clock_describe_rates_get(const struct scmi_protocol_handle *ph, u32 clk_id,
- struct scmi_clock_info *clk)
+ struct clock_info *cinfo)
{
int ret;
void *iter;
@@ -519,9 +509,9 @@ scmi_clock_describe_rates_get(const struct scmi_protocol_handle *ph, u32 clk_id,
.update_state = iter_clk_describe_update_state,
.process_response = iter_clk_describe_process_response,
};
+ struct scmi_clock_desc *clkd = &cinfo->clkds[clk_id];
struct scmi_clk_ipriv cpriv = {
- .clk_id = clk_id,
- .clk = clk,
+ .clkd = clkd,
.dev = ph->dev,
};
@@ -536,16 +526,23 @@ scmi_clock_describe_rates_get(const struct scmi_protocol_handle *ph, u32 clk_id,
if (ret)
return ret;
- if (!clk->rate_discrete) {
+ /* empty set ? */
+ if (!clkd->num_rates)
+ return 0;
+
+ if (!clkd->rate_discrete) {
+ clkd->info.max_rate = clkd->rates[RATE_MAX];
dev_dbg(ph->dev, "Min %llu Max %llu Step %llu Hz\n",
- clk->range.min_rate, clk->range.max_rate,
- clk->range.step_size);
- } else if (clk->list.num_rates) {
- sort(clk->list.rates, clk->list.num_rates,
- sizeof(clk->list.rates[0]), rate_cmp_func, NULL);
+ clkd->rates[RATE_MIN], clkd->rates[RATE_MAX],
+ clkd->rates[RATE_STEP]);
+ } else {
+ sort(clkd->rates, clkd->num_rates,
+ sizeof(clkd->rates[0]), rate_cmp_func, NULL);
+ clkd->info.max_rate = clkd->rates[clkd->num_rates - 1];
}
+ clkd->info.min_rate = clkd->rates[RATE_MIN];
- return ret;
+ return 0;
}
static int
@@ -630,6 +627,7 @@ static int scmi_clock_determine_rate(const struct scmi_protocol_handle *ph,
{
u64 fmin, fmax, ftmp;
struct scmi_clock_info *clk;
+ struct scmi_clock_desc *clkd;
struct clock_info *ci = ph->get_priv(ph);
if (!rate)
@@ -639,15 +637,17 @@ static int scmi_clock_determine_rate(const struct scmi_protocol_handle *ph,
if (IS_ERR(clk))
return PTR_ERR(clk);
+ clkd = to_desc(clk);
+
/*
* If we can't figure out what rate it will be, so just return the
* rate back to the caller.
*/
- if (clk->rate_discrete)
+ if (clkd->rate_discrete)
return 0;
- fmin = clk->range.min_rate;
- fmax = clk->range.max_rate;
+ fmin = clk->min_rate;
+ fmax = clk->max_rate;
if (*rate <= fmin) {
*rate = fmin;
return 0;
@@ -657,10 +657,10 @@ static int scmi_clock_determine_rate(const struct scmi_protocol_handle *ph,
}
ftmp = *rate - fmin;
- ftmp += clk->range.step_size - 1; /* to round up */
- do_div(ftmp, clk->range.step_size);
+ ftmp += clkd->rates[RATE_STEP] - 1; /* to round up */
+ do_div(ftmp, clkd->rates[RATE_STEP]);
- *rate = ftmp * clk->range.step_size + fmin;
+ *rate = ftmp * clkd->rates[RATE_STEP] + fmin;
return 0;
}
@@ -1122,17 +1122,16 @@ static int scmi_clock_protocol_init(const struct scmi_protocol_handle *ph)
if (ret)
return ret;
- cinfo->clk = devm_kcalloc(ph->dev, cinfo->num_clocks,
- sizeof(*cinfo->clk), GFP_KERNEL);
- if (!cinfo->clk)
+ cinfo->clkds = devm_kcalloc(ph->dev, cinfo->num_clocks,
+ sizeof(*cinfo->clkds), GFP_KERNEL);
+ if (!cinfo->clkds)
return -ENOMEM;
for (clkid = 0; clkid < cinfo->num_clocks; clkid++) {
- struct scmi_clock_info *clk = cinfo->clk + clkid;
-
+ cinfo->clkds[clkid].id = clkid;
ret = scmi_clock_attributes_get(ph, clkid, cinfo);
if (!ret)
- scmi_clock_describe_rates_get(ph, clkid, clk);
+ scmi_clock_describe_rates_get(ph, clkid, cinfo);
}
if (PROTOCOL_REV_MAJOR(ph->version) >= 0x3) {
diff --git a/include/linux/scmi_protocol.h b/include/linux/scmi_protocol.h
index 28579c145045..7283302b0c85 100644
--- a/include/linux/scmi_protocol.h
+++ b/include/linux/scmi_protocol.h
@@ -51,6 +51,8 @@ struct scmi_clock_info {
bool rate_ctrl_forbidden;
bool parent_ctrl_forbidden;
bool extended_config;
+ u64 min_rate;
+ u64 max_rate;
union {
struct {
int num_rates;
--
2.53.0 | {
"author": "Cristian Marussi <cristian.marussi@arm.com>",
"date": "Fri, 27 Feb 2026 15:32:17 +0000",
"is_openbsd": false,
"thread_id": "20260227153225.2778358-12-cristian.marussi@arm.com.mbox.gz"
} |
lkml_critique | lkml | Hi,
it was a known limitation, in the SCMI Clock protocol support, the lack of
dynamic allocation around per-clock rates discovery: fixed size statically
per-clock rates arrays did not scale and was increasingly a waste of memory
(see [1]).
This series aim at solving this in successive steps:
- simplify and reduce to the minimum possible the rates data info exposed
to the SCMI driver by scmi_clock_info
- move away from static fixed allocation of per-clock rates arrays in
favour of a completely dynamic runtime allocation: just allocate what
is needed based on the effectively discovered
This is done in patches 1-6.
A further bigger optimization suggested in a past series [1] by Etienne
would be, whenever allowed by the spec, to limit upfront the number of
queries in order to simply retrieve min and max rate, that are indeed the
only rates needed by the CLK SCMI driver.
The approach proposed in [1] was open coding and duplicating some of the
functionalities already provided by SCMI iterators, though.
Patch 7-10 implement such optimization instead by:
- reworking core SCMI iterators to support bound enumerations
- use such new bound iterators to perform the minimum number of queries
in order to ony retrieve min an max rate
As a final result now the rates enumeration triggered by the CLK SCMI
driver, while still allocating for all the existent rates, miminize the
number of SCMI CLK_DESCRIBE_RATE messages needed to obtain min and max.
Finally, patch 11 introduces a new clock protocol operation to be able to
trigger anytime on demand a full enumeration and obtain the full list of
rates when needed, not only min/max: this latter method is really only used
currently by some dowstream SCMI Test driver of mine.
Based on v7.0-rc1.
Tested on JUNO and an emulated environment.
Any feeback welcome.
Thanks,
Cristian
[1]: https://lore.kernel.org/arm-scmi/aZsX-oplR6fiLBBN@pluto/T/#t
[2]: https://lore.kernel.org/20241203173908.3148794-2-etienne.carriere@foss.st.com
---
Cristian Marussi (11):
firmware: arm_scmi: Add clock determine_rate operation
clk: scmi: Use new determine_rate clock operation
firmware: arm_scmi: Simplify clock rates exposed interface
clk: scmi: Use new simplified per-clock rate properties
firmware: arm_scmi: Drop unused clock rate interfaces
firmware: arm_scmi: Make clock rates allocation dynamic
firmware: arm_scmi: Harden clock parents discovery
firmware: arm_scmi: Refactor iterators internal allocation
firmware: arm_scmi: Add bound iterators support
firmware: arm_scmi: Use bound iterators to minimize discovered rates
firmware: arm_scmi: Introduce all_rates_get clock operation
drivers/clk/clk-scmi.c | 48 +----
drivers/firmware/arm_scmi/clock.c | 296 ++++++++++++++++++++------
drivers/firmware/arm_scmi/driver.c | 73 +++++--
drivers/firmware/arm_scmi/protocols.h | 13 +-
include/linux/scmi_protocol.h | 29 +--
5 files changed, 314 insertions(+), 145 deletions(-)
--
2.53.0
| null | null | null | [PATCH 00/11] SCMI Clock rates discovery rework | Use the new min_rate and max_rate unified properties that provide the
proper values without having to consider the clock type.
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: linux-clk@vger.kernel.org
Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
---
drivers/clk/clk-scmi.c | 17 ++---------------
1 file changed, 2 insertions(+), 15 deletions(-)
diff --git a/drivers/clk/clk-scmi.c b/drivers/clk/clk-scmi.c
index c223e4ef1dd1..7c562559ad8b 100644
--- a/drivers/clk/clk-scmi.c
+++ b/drivers/clk/clk-scmi.c
@@ -202,7 +202,6 @@ static int scmi_clk_ops_init(struct device *dev, struct scmi_clk *sclk,
const struct clk_ops *scmi_ops)
{
int ret;
- unsigned long min_rate, max_rate;
struct clk_init_data init = {
.flags = CLK_GET_RATE_NOCACHE,
@@ -217,20 +216,8 @@ static int scmi_clk_ops_init(struct device *dev, struct scmi_clk *sclk,
if (ret)
return ret;
- if (sclk->info->rate_discrete) {
- int num_rates = sclk->info->list.num_rates;
-
- if (num_rates <= 0)
- return -EINVAL;
-
- min_rate = sclk->info->list.rates[0];
- max_rate = sclk->info->list.rates[num_rates - 1];
- } else {
- min_rate = sclk->info->range.min_rate;
- max_rate = sclk->info->range.max_rate;
- }
-
- clk_hw_set_rate_range(&sclk->hw, min_rate, max_rate);
+ clk_hw_set_rate_range(&sclk->hw, sclk->info->min_rate,
+ sclk->info->max_rate);
return ret;
}
--
2.53.0 | {
"author": "Cristian Marussi <cristian.marussi@arm.com>",
"date": "Fri, 27 Feb 2026 15:32:18 +0000",
"is_openbsd": false,
"thread_id": "20260227153225.2778358-12-cristian.marussi@arm.com.mbox.gz"
} |
lkml_critique | lkml | Hi,
it was a known limitation, in the SCMI Clock protocol support, the lack of
dynamic allocation around per-clock rates discovery: fixed size statically
per-clock rates arrays did not scale and was increasingly a waste of memory
(see [1]).
This series aim at solving this in successive steps:
- simplify and reduce to the minimum possible the rates data info exposed
to the SCMI driver by scmi_clock_info
- move away from static fixed allocation of per-clock rates arrays in
favour of a completely dynamic runtime allocation: just allocate what
is needed based on the effectively discovered
This is done in patches 1-6.
A further bigger optimization suggested in a past series [1] by Etienne
would be, whenever allowed by the spec, to limit upfront the number of
queries in order to simply retrieve min and max rate, that are indeed the
only rates needed by the CLK SCMI driver.
The approach proposed in [1] was open coding and duplicating some of the
functionalities already provided by SCMI iterators, though.
Patch 7-10 implement such optimization instead by:
- reworking core SCMI iterators to support bound enumerations
- use such new bound iterators to perform the minimum number of queries
in order to ony retrieve min an max rate
As a final result now the rates enumeration triggered by the CLK SCMI
driver, while still allocating for all the existent rates, miminize the
number of SCMI CLK_DESCRIBE_RATE messages needed to obtain min and max.
Finally, patch 11 introduces a new clock protocol operation to be able to
trigger anytime on demand a full enumeration and obtain the full list of
rates when needed, not only min/max: this latter method is really only used
currently by some dowstream SCMI Test driver of mine.
Based on v7.0-rc1.
Tested on JUNO and an emulated environment.
Any feeback welcome.
Thanks,
Cristian
[1]: https://lore.kernel.org/arm-scmi/aZsX-oplR6fiLBBN@pluto/T/#t
[2]: https://lore.kernel.org/20241203173908.3148794-2-etienne.carriere@foss.st.com
---
Cristian Marussi (11):
firmware: arm_scmi: Add clock determine_rate operation
clk: scmi: Use new determine_rate clock operation
firmware: arm_scmi: Simplify clock rates exposed interface
clk: scmi: Use new simplified per-clock rate properties
firmware: arm_scmi: Drop unused clock rate interfaces
firmware: arm_scmi: Make clock rates allocation dynamic
firmware: arm_scmi: Harden clock parents discovery
firmware: arm_scmi: Refactor iterators internal allocation
firmware: arm_scmi: Add bound iterators support
firmware: arm_scmi: Use bound iterators to minimize discovered rates
firmware: arm_scmi: Introduce all_rates_get clock operation
drivers/clk/clk-scmi.c | 48 +----
drivers/firmware/arm_scmi/clock.c | 296 ++++++++++++++++++++------
drivers/firmware/arm_scmi/driver.c | 73 +++++--
drivers/firmware/arm_scmi/protocols.h | 13 +-
include/linux/scmi_protocol.h | 29 +--
5 files changed, 314 insertions(+), 145 deletions(-)
--
2.53.0
| null | null | null | [PATCH 00/11] SCMI Clock rates discovery rework | Only the unified interface exposing min_rate/max_rate is now used.
Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
---
include/linux/scmi_protocol.h | 11 -----------
1 file changed, 11 deletions(-)
diff --git a/include/linux/scmi_protocol.h b/include/linux/scmi_protocol.h
index 7283302b0c85..d97b4e734744 100644
--- a/include/linux/scmi_protocol.h
+++ b/include/linux/scmi_protocol.h
@@ -53,17 +53,6 @@ struct scmi_clock_info {
bool extended_config;
u64 min_rate;
u64 max_rate;
- union {
- struct {
- int num_rates;
- u64 rates[SCMI_MAX_NUM_RATES];
- } list;
- struct {
- u64 min_rate;
- u64 max_rate;
- u64 step_size;
- } range;
- };
int num_parents;
u32 *parents;
};
--
2.53.0 | {
"author": "Cristian Marussi <cristian.marussi@arm.com>",
"date": "Fri, 27 Feb 2026 15:32:19 +0000",
"is_openbsd": false,
"thread_id": "20260227153225.2778358-12-cristian.marussi@arm.com.mbox.gz"
} |
lkml_critique | lkml | Hi,
it was a known limitation, in the SCMI Clock protocol support, the lack of
dynamic allocation around per-clock rates discovery: fixed size statically
per-clock rates arrays did not scale and was increasingly a waste of memory
(see [1]).
This series aim at solving this in successive steps:
- simplify and reduce to the minimum possible the rates data info exposed
to the SCMI driver by scmi_clock_info
- move away from static fixed allocation of per-clock rates arrays in
favour of a completely dynamic runtime allocation: just allocate what
is needed based on the effectively discovered
This is done in patches 1-6.
A further bigger optimization suggested in a past series [1] by Etienne
would be, whenever allowed by the spec, to limit upfront the number of
queries in order to simply retrieve min and max rate, that are indeed the
only rates needed by the CLK SCMI driver.
The approach proposed in [1] was open coding and duplicating some of the
functionalities already provided by SCMI iterators, though.
Patch 7-10 implement such optimization instead by:
- reworking core SCMI iterators to support bound enumerations
- use such new bound iterators to perform the minimum number of queries
in order to ony retrieve min an max rate
As a final result now the rates enumeration triggered by the CLK SCMI
driver, while still allocating for all the existent rates, miminize the
number of SCMI CLK_DESCRIBE_RATE messages needed to obtain min and max.
Finally, patch 11 introduces a new clock protocol operation to be able to
trigger anytime on demand a full enumeration and obtain the full list of
rates when needed, not only min/max: this latter method is really only used
currently by some dowstream SCMI Test driver of mine.
Based on v7.0-rc1.
Tested on JUNO and an emulated environment.
Any feeback welcome.
Thanks,
Cristian
[1]: https://lore.kernel.org/arm-scmi/aZsX-oplR6fiLBBN@pluto/T/#t
[2]: https://lore.kernel.org/20241203173908.3148794-2-etienne.carriere@foss.st.com
---
Cristian Marussi (11):
firmware: arm_scmi: Add clock determine_rate operation
clk: scmi: Use new determine_rate clock operation
firmware: arm_scmi: Simplify clock rates exposed interface
clk: scmi: Use new simplified per-clock rate properties
firmware: arm_scmi: Drop unused clock rate interfaces
firmware: arm_scmi: Make clock rates allocation dynamic
firmware: arm_scmi: Harden clock parents discovery
firmware: arm_scmi: Refactor iterators internal allocation
firmware: arm_scmi: Add bound iterators support
firmware: arm_scmi: Use bound iterators to minimize discovered rates
firmware: arm_scmi: Introduce all_rates_get clock operation
drivers/clk/clk-scmi.c | 48 +----
drivers/firmware/arm_scmi/clock.c | 296 ++++++++++++++++++++------
drivers/firmware/arm_scmi/driver.c | 73 +++++--
drivers/firmware/arm_scmi/protocols.h | 13 +-
include/linux/scmi_protocol.h | 29 +--
5 files changed, 314 insertions(+), 145 deletions(-)
--
2.53.0
| null | null | null | [PATCH 00/11] SCMI Clock rates discovery rework | Leveraging SCMI Clock protocol dynamic discovery capabilities, move away
from the static per-clock rates allocation model in favour of a dynamic
runtime allocation based on effectively discovered resources.
No functional change.
Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
---
drivers/firmware/arm_scmi/clock.c | 19 ++++++++++++++++---
include/linux/scmi_protocol.h | 1 -
2 files changed, 16 insertions(+), 4 deletions(-)
diff --git a/drivers/firmware/arm_scmi/clock.c b/drivers/firmware/arm_scmi/clock.c
index f5d1c608f85a..d0fb5affb5cf 100644
--- a/drivers/firmware/arm_scmi/clock.c
+++ b/drivers/firmware/arm_scmi/clock.c
@@ -161,7 +161,7 @@ struct scmi_clock_desc {
u32 id;
bool rate_discrete;
unsigned int num_rates;
- u64 rates[SCMI_MAX_NUM_RATES];
+ u64 *rates;
#define RATE_MIN 0
#define RATE_MAX 1
#define RATE_STEP 2
@@ -480,6 +480,18 @@ iter_clk_describe_update_state(struct scmi_iterator_state *st,
QUIRK_OUT_OF_SPEC_TRIPLET);
}
+ if (!st->max_resources) {
+ int num_rates = st->num_returned + st->num_remaining;
+
+ p->clkd->rates = devm_kcalloc(p->dev, num_rates,
+ sizeof(*p->clkd->rates), GFP_KERNEL);
+ if (!p->clkd->rates)
+ return -ENOMEM;
+
+ /* max_resources is used by the iterators to control bounds */
+ st->max_resources = st->num_returned + st->num_remaining;
+ }
+
return 0;
}
@@ -493,6 +505,8 @@ iter_clk_describe_process_response(const struct scmi_protocol_handle *ph,
p->clkd->rates[st->desc_index + st->loop_idx] =
RATE_TO_U64(r->rate[st->loop_idx]);
+
+ /* Count only effectively discovered rates */
p->clkd->num_rates++;
return 0;
@@ -515,8 +529,7 @@ scmi_clock_describe_rates_get(const struct scmi_protocol_handle *ph, u32 clk_id,
.dev = ph->dev,
};
- iter = ph->hops->iter_response_init(ph, &ops, SCMI_MAX_NUM_RATES,
- CLOCK_DESCRIBE_RATES,
+ iter = ph->hops->iter_response_init(ph, &ops, 0, CLOCK_DESCRIBE_RATES,
sizeof(struct scmi_msg_clock_describe_rates),
&cpriv);
if (IS_ERR(iter))
diff --git a/include/linux/scmi_protocol.h b/include/linux/scmi_protocol.h
index d97b4e734744..5552ac04c820 100644
--- a/include/linux/scmi_protocol.h
+++ b/include/linux/scmi_protocol.h
@@ -15,7 +15,6 @@
#define SCMI_MAX_STR_SIZE 64
#define SCMI_SHORT_NAME_MAX_SIZE 16
-#define SCMI_MAX_NUM_RATES 16
/**
* struct scmi_revision_info - version information structure
--
2.53.0 | {
"author": "Cristian Marussi <cristian.marussi@arm.com>",
"date": "Fri, 27 Feb 2026 15:32:20 +0000",
"is_openbsd": false,
"thread_id": "20260227153225.2778358-12-cristian.marussi@arm.com.mbox.gz"
} |
lkml_critique | lkml | Hi,
it was a known limitation, in the SCMI Clock protocol support, the lack of
dynamic allocation around per-clock rates discovery: fixed size statically
per-clock rates arrays did not scale and was increasingly a waste of memory
(see [1]).
This series aim at solving this in successive steps:
- simplify and reduce to the minimum possible the rates data info exposed
to the SCMI driver by scmi_clock_info
- move away from static fixed allocation of per-clock rates arrays in
favour of a completely dynamic runtime allocation: just allocate what
is needed based on the effectively discovered
This is done in patches 1-6.
A further bigger optimization suggested in a past series [1] by Etienne
would be, whenever allowed by the spec, to limit upfront the number of
queries in order to simply retrieve min and max rate, that are indeed the
only rates needed by the CLK SCMI driver.
The approach proposed in [1] was open coding and duplicating some of the
functionalities already provided by SCMI iterators, though.
Patch 7-10 implement such optimization instead by:
- reworking core SCMI iterators to support bound enumerations
- use such new bound iterators to perform the minimum number of queries
in order to ony retrieve min an max rate
As a final result now the rates enumeration triggered by the CLK SCMI
driver, while still allocating for all the existent rates, miminize the
number of SCMI CLK_DESCRIBE_RATE messages needed to obtain min and max.
Finally, patch 11 introduces a new clock protocol operation to be able to
trigger anytime on demand a full enumeration and obtain the full list of
rates when needed, not only min/max: this latter method is really only used
currently by some dowstream SCMI Test driver of mine.
Based on v7.0-rc1.
Tested on JUNO and an emulated environment.
Any feeback welcome.
Thanks,
Cristian
[1]: https://lore.kernel.org/arm-scmi/aZsX-oplR6fiLBBN@pluto/T/#t
[2]: https://lore.kernel.org/20241203173908.3148794-2-etienne.carriere@foss.st.com
---
Cristian Marussi (11):
firmware: arm_scmi: Add clock determine_rate operation
clk: scmi: Use new determine_rate clock operation
firmware: arm_scmi: Simplify clock rates exposed interface
clk: scmi: Use new simplified per-clock rate properties
firmware: arm_scmi: Drop unused clock rate interfaces
firmware: arm_scmi: Make clock rates allocation dynamic
firmware: arm_scmi: Harden clock parents discovery
firmware: arm_scmi: Refactor iterators internal allocation
firmware: arm_scmi: Add bound iterators support
firmware: arm_scmi: Use bound iterators to minimize discovered rates
firmware: arm_scmi: Introduce all_rates_get clock operation
drivers/clk/clk-scmi.c | 48 +----
drivers/firmware/arm_scmi/clock.c | 296 ++++++++++++++++++++------
drivers/firmware/arm_scmi/driver.c | 73 +++++--
drivers/firmware/arm_scmi/protocols.h | 13 +-
include/linux/scmi_protocol.h | 29 +--
5 files changed, 314 insertions(+), 145 deletions(-)
--
2.53.0
| null | null | null | [PATCH 00/11] SCMI Clock rates discovery rework | Fix clock parents enumeration to account only for effectively discovered
parents during enumeration, avoiding to trust the total number of parents
declared upfront by the platform.
Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
---
drivers/firmware/arm_scmi/clock.c | 18 ++++++++++--------
1 file changed, 10 insertions(+), 8 deletions(-)
diff --git a/drivers/firmware/arm_scmi/clock.c b/drivers/firmware/arm_scmi/clock.c
index d0fb5affb5cf..15faa79abed4 100644
--- a/drivers/firmware/arm_scmi/clock.c
+++ b/drivers/firmware/arm_scmi/clock.c
@@ -270,15 +270,15 @@ static int iter_clk_possible_parents_update_state(struct scmi_iterator_state *st
* assume it's returned+remaining on first call.
*/
if (!st->max_resources) {
- p->clkd->info.num_parents = st->num_returned + st->num_remaining;
- p->clkd->info.parents = devm_kcalloc(p->dev,
- p->clkd->info.num_parents,
+ int num_parents = st->num_returned + st->num_remaining;
+
+ p->clkd->info.parents = devm_kcalloc(p->dev, num_parents,
sizeof(*p->clkd->info.parents),
GFP_KERNEL);
- if (!p->clkd->info.parents) {
- p->clkd->info.num_parents = 0;
+ if (!p->clkd->info.parents)
return -ENOMEM;
- }
+
+ /* max_resources is used by the iterators to control bounds */
st->max_resources = st->num_returned + st->num_remaining;
}
@@ -293,9 +293,11 @@ static int iter_clk_possible_parents_process_response(const struct scmi_protocol
const struct scmi_msg_resp_clock_possible_parents *r = response;
struct scmi_clk_ipriv *p = priv;
- u32 *parent = &p->clkd->info.parents[st->desc_index + st->loop_idx];
+ p->clkd->info.parents[st->desc_index + st->loop_idx] =
+ le32_to_cpu(r->possible_parents[st->loop_idx]);
- *parent = le32_to_cpu(r->possible_parents[st->loop_idx]);
+ /* Count only effectively discovered parents */
+ p->clkd->info.num_parents++;
return 0;
}
--
2.53.0 | {
"author": "Cristian Marussi <cristian.marussi@arm.com>",
"date": "Fri, 27 Feb 2026 15:32:21 +0000",
"is_openbsd": false,
"thread_id": "20260227153225.2778358-12-cristian.marussi@arm.com.mbox.gz"
} |
lkml_critique | lkml | Hi,
it was a known limitation, in the SCMI Clock protocol support, the lack of
dynamic allocation around per-clock rates discovery: fixed size statically
per-clock rates arrays did not scale and was increasingly a waste of memory
(see [1]).
This series aim at solving this in successive steps:
- simplify and reduce to the minimum possible the rates data info exposed
to the SCMI driver by scmi_clock_info
- move away from static fixed allocation of per-clock rates arrays in
favour of a completely dynamic runtime allocation: just allocate what
is needed based on the effectively discovered
This is done in patches 1-6.
A further bigger optimization suggested in a past series [1] by Etienne
would be, whenever allowed by the spec, to limit upfront the number of
queries in order to simply retrieve min and max rate, that are indeed the
only rates needed by the CLK SCMI driver.
The approach proposed in [1] was open coding and duplicating some of the
functionalities already provided by SCMI iterators, though.
Patch 7-10 implement such optimization instead by:
- reworking core SCMI iterators to support bound enumerations
- use such new bound iterators to perform the minimum number of queries
in order to ony retrieve min an max rate
As a final result now the rates enumeration triggered by the CLK SCMI
driver, while still allocating for all the existent rates, miminize the
number of SCMI CLK_DESCRIBE_RATE messages needed to obtain min and max.
Finally, patch 11 introduces a new clock protocol operation to be able to
trigger anytime on demand a full enumeration and obtain the full list of
rates when needed, not only min/max: this latter method is really only used
currently by some dowstream SCMI Test driver of mine.
Based on v7.0-rc1.
Tested on JUNO and an emulated environment.
Any feeback welcome.
Thanks,
Cristian
[1]: https://lore.kernel.org/arm-scmi/aZsX-oplR6fiLBBN@pluto/T/#t
[2]: https://lore.kernel.org/20241203173908.3148794-2-etienne.carriere@foss.st.com
---
Cristian Marussi (11):
firmware: arm_scmi: Add clock determine_rate operation
clk: scmi: Use new determine_rate clock operation
firmware: arm_scmi: Simplify clock rates exposed interface
clk: scmi: Use new simplified per-clock rate properties
firmware: arm_scmi: Drop unused clock rate interfaces
firmware: arm_scmi: Make clock rates allocation dynamic
firmware: arm_scmi: Harden clock parents discovery
firmware: arm_scmi: Refactor iterators internal allocation
firmware: arm_scmi: Add bound iterators support
firmware: arm_scmi: Use bound iterators to minimize discovered rates
firmware: arm_scmi: Introduce all_rates_get clock operation
drivers/clk/clk-scmi.c | 48 +----
drivers/firmware/arm_scmi/clock.c | 296 ++++++++++++++++++++------
drivers/firmware/arm_scmi/driver.c | 73 +++++--
drivers/firmware/arm_scmi/protocols.h | 13 +-
include/linux/scmi_protocol.h | 29 +--
5 files changed, 314 insertions(+), 145 deletions(-)
--
2.53.0
| null | null | null | [PATCH 00/11] SCMI Clock rates discovery rework | Use cleanup handlers to manage iterator data structures.
No functional change.
Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
---
drivers/firmware/arm_scmi/driver.c | 35 +++++++++++++++---------------
1 file changed, 18 insertions(+), 17 deletions(-)
diff --git a/drivers/firmware/arm_scmi/driver.c b/drivers/firmware/arm_scmi/driver.c
index baefa7d43c00..d9d6edbc1275 100644
--- a/drivers/firmware/arm_scmi/driver.c
+++ b/drivers/firmware/arm_scmi/driver.c
@@ -17,6 +17,7 @@
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/bitmap.h>
+#include <linux/cleanup.h>
#include <linux/debugfs.h>
#include <linux/device.h>
#include <linux/export.h>
@@ -1789,39 +1790,41 @@ static void *scmi_iterator_init(const struct scmi_protocol_handle *ph,
size_t tx_size, void *priv)
{
int ret;
- struct scmi_iterator *i;
- i = devm_kzalloc(ph->dev, sizeof(*i), GFP_KERNEL);
+ struct scmi_iterator *i __free(kfree) = kzalloc(sizeof(*i), GFP_KERNEL);
if (!i)
return ERR_PTR(-ENOMEM);
+ if (!ops || !ph)
+ return ERR_PTR(-EINVAL);
+
i->ph = ph;
i->ops = ops;
i->priv = priv;
ret = ph->xops->xfer_get_init(ph, msg_id, tx_size, 0, &i->t);
- if (ret) {
- devm_kfree(ph->dev, i);
+ if (ret)
return ERR_PTR(ret);
- }
i->state.max_resources = max_resources;
i->msg = i->t->tx.buf;
i->resp = i->t->rx.buf;
- return i;
+ return no_free_ptr(i);
}
static int scmi_iterator_run(void *iter)
{
- int ret = -EINVAL;
+ int ret;
struct scmi_iterator_ops *iops;
const struct scmi_protocol_handle *ph;
struct scmi_iterator_state *st;
- struct scmi_iterator *i = iter;
- if (!i || !i->ops || !i->ph)
- return ret;
+ if (!iter)
+ return -EINVAL;
+
+ /* Take ownership of the iterator */
+ struct scmi_iterator *i __free(kfree) = iter;
iops = i->ops;
ph = i->ph;
@@ -1846,12 +1849,12 @@ static int scmi_iterator_run(void *iter)
break;
}
- for (st->loop_idx = 0; st->loop_idx < st->num_returned;
- st->loop_idx++) {
+ for (st->loop_idx = 0; !ret && st->loop_idx < st->num_returned;
+ st->loop_idx++)
ret = iops->process_response(ph, i->resp, st, i->priv);
- if (ret)
- goto out;
- }
+
+ if (ret)
+ break;
st->desc_index += st->num_returned;
ph->xops->reset_rx_to_maxsz(ph, i->t);
@@ -1861,10 +1864,8 @@ static int scmi_iterator_run(void *iter)
*/
} while (st->num_returned && st->num_remaining);
-out:
/* Finalize and destroy iterator */
ph->xops->xfer_put(ph, i->t);
- devm_kfree(ph->dev, i);
return ret;
}
--
2.53.0 | {
"author": "Cristian Marussi <cristian.marussi@arm.com>",
"date": "Fri, 27 Feb 2026 15:32:22 +0000",
"is_openbsd": false,
"thread_id": "20260227153225.2778358-12-cristian.marussi@arm.com.mbox.gz"
} |
lkml_critique | lkml | Hi,
it was a known limitation, in the SCMI Clock protocol support, the lack of
dynamic allocation around per-clock rates discovery: fixed size statically
per-clock rates arrays did not scale and was increasingly a waste of memory
(see [1]).
This series aim at solving this in successive steps:
- simplify and reduce to the minimum possible the rates data info exposed
to the SCMI driver by scmi_clock_info
- move away from static fixed allocation of per-clock rates arrays in
favour of a completely dynamic runtime allocation: just allocate what
is needed based on the effectively discovered
This is done in patches 1-6.
A further bigger optimization suggested in a past series [1] by Etienne
would be, whenever allowed by the spec, to limit upfront the number of
queries in order to simply retrieve min and max rate, that are indeed the
only rates needed by the CLK SCMI driver.
The approach proposed in [1] was open coding and duplicating some of the
functionalities already provided by SCMI iterators, though.
Patch 7-10 implement such optimization instead by:
- reworking core SCMI iterators to support bound enumerations
- use such new bound iterators to perform the minimum number of queries
in order to ony retrieve min an max rate
As a final result now the rates enumeration triggered by the CLK SCMI
driver, while still allocating for all the existent rates, miminize the
number of SCMI CLK_DESCRIBE_RATE messages needed to obtain min and max.
Finally, patch 11 introduces a new clock protocol operation to be able to
trigger anytime on demand a full enumeration and obtain the full list of
rates when needed, not only min/max: this latter method is really only used
currently by some dowstream SCMI Test driver of mine.
Based on v7.0-rc1.
Tested on JUNO and an emulated environment.
Any feeback welcome.
Thanks,
Cristian
[1]: https://lore.kernel.org/arm-scmi/aZsX-oplR6fiLBBN@pluto/T/#t
[2]: https://lore.kernel.org/20241203173908.3148794-2-etienne.carriere@foss.st.com
---
Cristian Marussi (11):
firmware: arm_scmi: Add clock determine_rate operation
clk: scmi: Use new determine_rate clock operation
firmware: arm_scmi: Simplify clock rates exposed interface
clk: scmi: Use new simplified per-clock rate properties
firmware: arm_scmi: Drop unused clock rate interfaces
firmware: arm_scmi: Make clock rates allocation dynamic
firmware: arm_scmi: Harden clock parents discovery
firmware: arm_scmi: Refactor iterators internal allocation
firmware: arm_scmi: Add bound iterators support
firmware: arm_scmi: Use bound iterators to minimize discovered rates
firmware: arm_scmi: Introduce all_rates_get clock operation
drivers/clk/clk-scmi.c | 48 +----
drivers/firmware/arm_scmi/clock.c | 296 ++++++++++++++++++++------
drivers/firmware/arm_scmi/driver.c | 73 +++++--
drivers/firmware/arm_scmi/protocols.h | 13 +-
include/linux/scmi_protocol.h | 29 +--
5 files changed, 314 insertions(+), 145 deletions(-)
--
2.53.0
| null | null | null | [PATCH 00/11] SCMI Clock rates discovery rework | SCMI core stack provides some common helpers to handle in a unified way
multipart message replies: such iterator-helpers, when run, currently
process by default the whole set of discovered resources.
Introduce an alternative way to run the initialized iterator on a limited
range of resources.
Note that the subset of resources that can be chosen is anyway limited by
the SCMI protocol specification, since you are only allowed to choose the
startindex on a multi-part enumeration NOT the end index, so that the
effective number of returned items by a bound iterators depends really
on platform side decisions.
Suggested-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
---
drivers/firmware/arm_scmi/clock.c | 3 +-
drivers/firmware/arm_scmi/driver.c | 58 +++++++++++++++++++--------
drivers/firmware/arm_scmi/protocols.h | 13 +++++-
3 files changed, 55 insertions(+), 19 deletions(-)
diff --git a/drivers/firmware/arm_scmi/clock.c b/drivers/firmware/arm_scmi/clock.c
index 15faa79abed4..d7df5c45836e 100644
--- a/drivers/firmware/arm_scmi/clock.c
+++ b/drivers/firmware/arm_scmi/clock.c
@@ -505,8 +505,7 @@ iter_clk_describe_process_response(const struct scmi_protocol_handle *ph,
struct scmi_clk_ipriv *p = priv;
const struct scmi_msg_resp_clock_describe_rates *r = response;
- p->clkd->rates[st->desc_index + st->loop_idx] =
- RATE_TO_U64(r->rate[st->loop_idx]);
+ p->clkd->rates[p->clkd->num_rates] = RATE_TO_U64(r->rate[st->loop_idx]);
/* Count only effectively discovered rates */
p->clkd->num_rates++;
diff --git a/drivers/firmware/arm_scmi/driver.c b/drivers/firmware/arm_scmi/driver.c
index d9d6edbc1275..299265d05f62 100644
--- a/drivers/firmware/arm_scmi/driver.c
+++ b/drivers/firmware/arm_scmi/driver.c
@@ -1813,48 +1813,50 @@ static void *scmi_iterator_init(const struct scmi_protocol_handle *ph,
return no_free_ptr(i);
}
-static int scmi_iterator_run(void *iter)
+static int __scmi_iterator_run(void *iter, unsigned int *start, unsigned int *end)
{
int ret;
struct scmi_iterator_ops *iops;
const struct scmi_protocol_handle *ph;
struct scmi_iterator_state *st;
+ struct scmi_iterator *i;
if (!iter)
return -EINVAL;
- /* Take ownership of the iterator */
- struct scmi_iterator *i __free(kfree) = iter;
-
+ i = iter;
iops = i->ops;
ph = i->ph;
st = &i->state;
+ /* Reinitialize state for next run */
+ st->num_returned = 0;
+ st->num_remaining = 0;
+ st->desc_index = start ? *start : 0;
+
do {
iops->prepare_message(i->msg, st->desc_index, i->priv);
ret = ph->xops->do_xfer(ph, i->t);
if (ret)
- break;
+ return ret;
st->rx_len = i->t->rx.len;
ret = iops->update_state(st, i->resp, i->priv);
if (ret)
- break;
+ return ret;
if (st->num_returned > st->max_resources - st->desc_index) {
dev_err(ph->dev,
"No. of resources can't exceed %d\n",
st->max_resources);
- ret = -EINVAL;
- break;
+ return -EINVAL;
}
- for (st->loop_idx = 0; !ret && st->loop_idx < st->num_returned;
- st->loop_idx++)
+ for (st->loop_idx = 0; st->loop_idx < st->num_returned; st->loop_idx++) {
ret = iops->process_response(ph, i->resp, st, i->priv);
-
- if (ret)
- break;
+ if (ret)
+ return ret;
+ }
st->desc_index += st->num_returned;
ph->xops->reset_rx_to_maxsz(ph, i->t);
@@ -1862,14 +1864,36 @@ static int scmi_iterator_run(void *iter)
* check for both returned and remaining to avoid infinite
* loop due to buggy firmware
*/
- } while (st->num_returned && st->num_remaining);
+ } while (st->num_returned && st->num_remaining &&
+ (!end || (st->desc_index <= min(*end, st->max_resources - 1))));
- /* Finalize and destroy iterator */
- ph->xops->xfer_put(ph, i->t);
+ return 0;
+}
+
+static void scmi_iterator_cleanup(void *iter)
+{
+ struct scmi_iterator *i = iter;
+
+ i->ph->xops->xfer_put(i->ph, i->t);
+ kfree(i);
+}
+
+static int scmi_iterator_run(void *iter)
+{
+ int ret;
+
+ ret = __scmi_iterator_run(iter, NULL, NULL);
+ scmi_iterator_cleanup(iter);
return ret;
}
+static int scmi_iterator_run_bound(void *iter, unsigned int *start,
+ unsigned int *end)
+{
+ return __scmi_iterator_run(iter, start, end);
+}
+
struct scmi_msg_get_fc_info {
__le32 domain;
__le32 message_id;
@@ -2048,6 +2072,8 @@ static const struct scmi_proto_helpers_ops helpers_ops = {
.get_max_msg_size = scmi_common_get_max_msg_size,
.iter_response_init = scmi_iterator_init,
.iter_response_run = scmi_iterator_run,
+ .iter_response_run_bound = scmi_iterator_run_bound,
+ .iter_response_cleanup = scmi_iterator_cleanup,
.protocol_msg_check = scmi_protocol_msg_check,
.fastchannel_init = scmi_common_fastchannel_init,
.fastchannel_db_ring = scmi_common_fastchannel_db_ring,
diff --git a/drivers/firmware/arm_scmi/protocols.h b/drivers/firmware/arm_scmi/protocols.h
index 4c75970326e6..487f84239385 100644
--- a/drivers/firmware/arm_scmi/protocols.h
+++ b/drivers/firmware/arm_scmi/protocols.h
@@ -259,7 +259,15 @@ struct scmi_fc_info {
* multi-part responses using the custom operations
* provided in @ops.
* @iter_response_run: A common helper to trigger the run of a previously
- * initialized iterator.
+ * initialized iterator. Note that unbound iterators are
+ * automatically cleaned up.
+ * @iter_response_run_bound: A common helper to trigger the run of a previously
+ * initialized iterator, but only within the
+ * specified, optional, @start and @end resource
+ * indexes. Note that these bound-iterators need
+ * explicit cleanup via @iter_response_bound_cleanup.
+ * @iter_response_bound_cleanup: A common helper to finally release the iterator
+ * for bound iterators.
* @protocol_msg_check: A common helper to check is a specific protocol message
* is supported.
* @fastchannel_init: A common helper used to initialize FC descriptors by
@@ -276,6 +284,9 @@ struct scmi_proto_helpers_ops {
unsigned int max_resources, u8 msg_id,
size_t tx_size, void *priv);
int (*iter_response_run)(void *iter);
+ int (*iter_response_run_bound)(void *iter,
+ unsigned int *start, unsigned int *end);
+ void (*iter_response_cleanup)(void *iter);
int (*protocol_msg_check)(const struct scmi_protocol_handle *ph,
u32 message_id, u32 *attributes);
void (*fastchannel_init)(const struct scmi_protocol_handle *ph,
--
2.53.0 | {
"author": "Cristian Marussi <cristian.marussi@arm.com>",
"date": "Fri, 27 Feb 2026 15:32:23 +0000",
"is_openbsd": false,
"thread_id": "20260227153225.2778358-12-cristian.marussi@arm.com.mbox.gz"
} |
lkml_critique | lkml | Hi,
it was a known limitation, in the SCMI Clock protocol support, the lack of
dynamic allocation around per-clock rates discovery: fixed size statically
per-clock rates arrays did not scale and was increasingly a waste of memory
(see [1]).
This series aim at solving this in successive steps:
- simplify and reduce to the minimum possible the rates data info exposed
to the SCMI driver by scmi_clock_info
- move away from static fixed allocation of per-clock rates arrays in
favour of a completely dynamic runtime allocation: just allocate what
is needed based on the effectively discovered
This is done in patches 1-6.
A further bigger optimization suggested in a past series [1] by Etienne
would be, whenever allowed by the spec, to limit upfront the number of
queries in order to simply retrieve min and max rate, that are indeed the
only rates needed by the CLK SCMI driver.
The approach proposed in [1] was open coding and duplicating some of the
functionalities already provided by SCMI iterators, though.
Patch 7-10 implement such optimization instead by:
- reworking core SCMI iterators to support bound enumerations
- use such new bound iterators to perform the minimum number of queries
in order to ony retrieve min an max rate
As a final result now the rates enumeration triggered by the CLK SCMI
driver, while still allocating for all the existent rates, miminize the
number of SCMI CLK_DESCRIBE_RATE messages needed to obtain min and max.
Finally, patch 11 introduces a new clock protocol operation to be able to
trigger anytime on demand a full enumeration and obtain the full list of
rates when needed, not only min/max: this latter method is really only used
currently by some dowstream SCMI Test driver of mine.
Based on v7.0-rc1.
Tested on JUNO and an emulated environment.
Any feeback welcome.
Thanks,
Cristian
[1]: https://lore.kernel.org/arm-scmi/aZsX-oplR6fiLBBN@pluto/T/#t
[2]: https://lore.kernel.org/20241203173908.3148794-2-etienne.carriere@foss.st.com
---
Cristian Marussi (11):
firmware: arm_scmi: Add clock determine_rate operation
clk: scmi: Use new determine_rate clock operation
firmware: arm_scmi: Simplify clock rates exposed interface
clk: scmi: Use new simplified per-clock rate properties
firmware: arm_scmi: Drop unused clock rate interfaces
firmware: arm_scmi: Make clock rates allocation dynamic
firmware: arm_scmi: Harden clock parents discovery
firmware: arm_scmi: Refactor iterators internal allocation
firmware: arm_scmi: Add bound iterators support
firmware: arm_scmi: Use bound iterators to minimize discovered rates
firmware: arm_scmi: Introduce all_rates_get clock operation
drivers/clk/clk-scmi.c | 48 +----
drivers/firmware/arm_scmi/clock.c | 296 ++++++++++++++++++++------
drivers/firmware/arm_scmi/driver.c | 73 +++++--
drivers/firmware/arm_scmi/protocols.h | 13 +-
include/linux/scmi_protocol.h | 29 +--
5 files changed, 314 insertions(+), 145 deletions(-)
--
2.53.0
| null | null | null | [PATCH 00/11] SCMI Clock rates discovery rework | Clock rates are guaranteed to be returned in ascending order for SCMI clock
protocol versions greater than 1.0: in such a case, use bounded iterators
to minimize the number of message exchanges needed to discover min and max
rate.
Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
---
drivers/firmware/arm_scmi/clock.c | 92 +++++++++++++++++++++++++++----
1 file changed, 82 insertions(+), 10 deletions(-)
diff --git a/drivers/firmware/arm_scmi/clock.c b/drivers/firmware/arm_scmi/clock.c
index d7df5c45836e..a0de10652abe 100644
--- a/drivers/firmware/arm_scmi/clock.c
+++ b/drivers/firmware/arm_scmi/clock.c
@@ -160,6 +160,7 @@ struct scmi_clock_rate_notify_payld {
struct scmi_clock_desc {
u32 id;
bool rate_discrete;
+ unsigned int tot_rates;
unsigned int num_rates;
u64 *rates;
#define RATE_MIN 0
@@ -483,15 +484,16 @@ iter_clk_describe_update_state(struct scmi_iterator_state *st,
}
if (!st->max_resources) {
- int num_rates = st->num_returned + st->num_remaining;
+ unsigned int tot_rates = st->num_returned + st->num_remaining;
- p->clkd->rates = devm_kcalloc(p->dev, num_rates,
+ p->clkd->rates = devm_kcalloc(p->dev, tot_rates,
sizeof(*p->clkd->rates), GFP_KERNEL);
if (!p->clkd->rates)
return -ENOMEM;
/* max_resources is used by the iterators to control bounds */
- st->max_resources = st->num_returned + st->num_remaining;
+ p->clkd->tot_rates = tot_rates;
+ st->max_resources = tot_rates;
}
return 0;
@@ -514,8 +516,8 @@ iter_clk_describe_process_response(const struct scmi_protocol_handle *ph,
}
static int
-scmi_clock_describe_rates_get(const struct scmi_protocol_handle *ph, u32 clk_id,
- struct clock_info *cinfo)
+scmi_clock_describe_rates_get_full(const struct scmi_protocol_handle *ph,
+ struct scmi_clock_desc *clkd)
{
int ret;
void *iter;
@@ -524,7 +526,6 @@ scmi_clock_describe_rates_get(const struct scmi_protocol_handle *ph, u32 clk_id,
.update_state = iter_clk_describe_update_state,
.process_response = iter_clk_describe_process_response,
};
- struct scmi_clock_desc *clkd = &cinfo->clkds[clk_id];
struct scmi_clk_ipriv cpriv = {
.clkd = clkd,
.dev = ph->dev,
@@ -544,19 +545,90 @@ scmi_clock_describe_rates_get(const struct scmi_protocol_handle *ph, u32 clk_id,
if (!clkd->num_rates)
return 0;
+ if (clkd->rate_discrete)
+ sort(clkd->rates, clkd->num_rates,
+ sizeof(clkd->rates[0]), rate_cmp_func, NULL);
+
+ return 0;
+}
+
+static int
+scmi_clock_describe_rates_get_lazy(const struct scmi_protocol_handle *ph,
+ struct scmi_clock_desc *clkd)
+{
+ struct scmi_iterator_ops ops = {
+ .prepare_message = iter_clk_describe_prepare_message,
+ .update_state = iter_clk_describe_update_state,
+ .process_response = iter_clk_describe_process_response,
+ };
+ struct scmi_clk_ipriv cpriv = {
+ .clkd = clkd,
+ .dev = ph->dev,
+ };
+ unsigned int first, last;
+ void *iter;
+ int ret;
+
+ iter = ph->hops->iter_response_init(ph, &ops, 0, CLOCK_DESCRIBE_RATES,
+ sizeof(struct scmi_msg_clock_describe_rates),
+ &cpriv);
+ if (IS_ERR(iter))
+ return PTR_ERR(iter);
+
+ /* Try to grab a triplet, so that in case is NON-discrete we are done */
+ first = 0;
+ last = 2;
+ ret = ph->hops->iter_response_run_bound(iter, &first, &last);
+ if (ret)
+ goto out;
+
+ /* If discrete grab the last value, which should be the max */
+ if (clkd->rate_discrete && clkd->tot_rates > 3) {
+ first = clkd->tot_rates - 1;
+ last = clkd->tot_rates - 1;
+ ret = ph->hops->iter_response_run_bound(iter, &first, &last);
+ }
+
+out:
+ ph->hops->iter_response_cleanup(iter);
+
+ return ret;
+}
+
+static int
+scmi_clock_describe_rates_get(const struct scmi_protocol_handle *ph,
+ u32 clk_id, struct clock_info *cinfo)
+{
+ struct scmi_clock_desc *clkd = &cinfo->clkds[clk_id];
+ int ret;
+
+ /*
+ * Since only after SCMI Clock v1.0 the returned rates are guaranteed to
+ * be discovered in ascending order, lazy enumeration cannot be use for
+ * SCMI Clock v1.0 protocol.
+ */
+ if (PROTOCOL_REV_MAJOR(ph->version) > 0x1)
+ ret = scmi_clock_describe_rates_get_lazy(ph, clkd);
+ else
+ ret = scmi_clock_describe_rates_get_full(ph, clkd);
+
+ if (ret)
+ return ret;
+
+ clkd->info.min_rate = clkd->rates[RATE_MIN];
if (!clkd->rate_discrete) {
clkd->info.max_rate = clkd->rates[RATE_MAX];
dev_dbg(ph->dev, "Min %llu Max %llu Step %llu Hz\n",
clkd->rates[RATE_MIN], clkd->rates[RATE_MAX],
clkd->rates[RATE_STEP]);
} else {
- sort(clkd->rates, clkd->num_rates,
- sizeof(clkd->rates[0]), rate_cmp_func, NULL);
clkd->info.max_rate = clkd->rates[clkd->num_rates - 1];
+ dev_dbg(ph->dev, "Clock:%s DISCRETE:%d -> Min %llu Max %llu\n",
+ clkd->info.name, clkd->rate_discrete,
+ clkd->info.min_rate, clkd->info.max_rate);
}
- clkd->info.min_rate = clkd->rates[RATE_MIN];
- return 0;
+ return ret;
}
static int
--
2.53.0 | {
"author": "Cristian Marussi <cristian.marussi@arm.com>",
"date": "Fri, 27 Feb 2026 15:32:24 +0000",
"is_openbsd": false,
"thread_id": "20260227153225.2778358-12-cristian.marussi@arm.com.mbox.gz"
} |
lkml_critique | lkml | Hi,
it was a known limitation, in the SCMI Clock protocol support, the lack of
dynamic allocation around per-clock rates discovery: fixed size statically
per-clock rates arrays did not scale and was increasingly a waste of memory
(see [1]).
This series aim at solving this in successive steps:
- simplify and reduce to the minimum possible the rates data info exposed
to the SCMI driver by scmi_clock_info
- move away from static fixed allocation of per-clock rates arrays in
favour of a completely dynamic runtime allocation: just allocate what
is needed based on the effectively discovered
This is done in patches 1-6.
A further bigger optimization suggested in a past series [1] by Etienne
would be, whenever allowed by the spec, to limit upfront the number of
queries in order to simply retrieve min and max rate, that are indeed the
only rates needed by the CLK SCMI driver.
The approach proposed in [1] was open coding and duplicating some of the
functionalities already provided by SCMI iterators, though.
Patch 7-10 implement such optimization instead by:
- reworking core SCMI iterators to support bound enumerations
- use such new bound iterators to perform the minimum number of queries
in order to ony retrieve min an max rate
As a final result now the rates enumeration triggered by the CLK SCMI
driver, while still allocating for all the existent rates, miminize the
number of SCMI CLK_DESCRIBE_RATE messages needed to obtain min and max.
Finally, patch 11 introduces a new clock protocol operation to be able to
trigger anytime on demand a full enumeration and obtain the full list of
rates when needed, not only min/max: this latter method is really only used
currently by some dowstream SCMI Test driver of mine.
Based on v7.0-rc1.
Tested on JUNO and an emulated environment.
Any feeback welcome.
Thanks,
Cristian
[1]: https://lore.kernel.org/arm-scmi/aZsX-oplR6fiLBBN@pluto/T/#t
[2]: https://lore.kernel.org/20241203173908.3148794-2-etienne.carriere@foss.st.com
---
Cristian Marussi (11):
firmware: arm_scmi: Add clock determine_rate operation
clk: scmi: Use new determine_rate clock operation
firmware: arm_scmi: Simplify clock rates exposed interface
clk: scmi: Use new simplified per-clock rate properties
firmware: arm_scmi: Drop unused clock rate interfaces
firmware: arm_scmi: Make clock rates allocation dynamic
firmware: arm_scmi: Harden clock parents discovery
firmware: arm_scmi: Refactor iterators internal allocation
firmware: arm_scmi: Add bound iterators support
firmware: arm_scmi: Use bound iterators to minimize discovered rates
firmware: arm_scmi: Introduce all_rates_get clock operation
drivers/clk/clk-scmi.c | 48 +----
drivers/firmware/arm_scmi/clock.c | 296 ++++++++++++++++++++------
drivers/firmware/arm_scmi/driver.c | 73 +++++--
drivers/firmware/arm_scmi/protocols.h | 13 +-
include/linux/scmi_protocol.h | 29 +--
5 files changed, 314 insertions(+), 145 deletions(-)
--
2.53.0
| null | null | null | [PATCH 00/11] SCMI Clock rates discovery rework | Add a clock operation to get the whole set of rates available to a specific
clock: when needed this request could transparently trigger a full rate
discovery enumeration if this specific clock-rates were previously only
lazily enumerated.
Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
---
drivers/firmware/arm_scmi/clock.c | 85 +++++++++++++++++++++----------
include/linux/scmi_protocol.h | 9 ++++
2 files changed, 67 insertions(+), 27 deletions(-)
diff --git a/drivers/firmware/arm_scmi/clock.c b/drivers/firmware/arm_scmi/clock.c
index a0de10652abe..c2fd9a1c3316 100644
--- a/drivers/firmware/arm_scmi/clock.c
+++ b/drivers/firmware/arm_scmi/clock.c
@@ -159,10 +159,8 @@ struct scmi_clock_rate_notify_payld {
struct scmi_clock_desc {
u32 id;
- bool rate_discrete;
unsigned int tot_rates;
- unsigned int num_rates;
- u64 *rates;
+ struct scmi_clock_rates r;
#define RATE_MIN 0
#define RATE_MAX 1
#define RATE_STEP 2
@@ -469,10 +467,10 @@ iter_clk_describe_update_state(struct scmi_iterator_state *st,
flags = le32_to_cpu(r->num_rates_flags);
st->num_remaining = NUM_REMAINING(flags);
st->num_returned = NUM_RETURNED(flags);
- p->clkd->rate_discrete = RATE_DISCRETE(flags);
+ p->clkd->r.rate_discrete = RATE_DISCRETE(flags);
/* Warn about out of spec replies ... */
- if (!p->clkd->rate_discrete &&
+ if (!p->clkd->r.rate_discrete &&
(st->num_returned != 3 || st->num_remaining != 0)) {
dev_warn(p->dev,
"Out-of-spec CLOCK_DESCRIBE_RATES reply for %s - returned:%d remaining:%d rx_len:%zd\n",
@@ -486,9 +484,9 @@ iter_clk_describe_update_state(struct scmi_iterator_state *st,
if (!st->max_resources) {
unsigned int tot_rates = st->num_returned + st->num_remaining;
- p->clkd->rates = devm_kcalloc(p->dev, tot_rates,
- sizeof(*p->clkd->rates), GFP_KERNEL);
- if (!p->clkd->rates)
+ p->clkd->r.rates = devm_kcalloc(p->dev, tot_rates,
+ sizeof(*p->clkd->r.rates), GFP_KERNEL);
+ if (!p->clkd->r.rates)
return -ENOMEM;
/* max_resources is used by the iterators to control bounds */
@@ -507,10 +505,10 @@ iter_clk_describe_process_response(const struct scmi_protocol_handle *ph,
struct scmi_clk_ipriv *p = priv;
const struct scmi_msg_resp_clock_describe_rates *r = response;
- p->clkd->rates[p->clkd->num_rates] = RATE_TO_U64(r->rate[st->loop_idx]);
+ p->clkd->r.rates[p->clkd->r.num_rates] = RATE_TO_U64(r->rate[st->loop_idx]);
/* Count only effectively discovered rates */
- p->clkd->num_rates++;
+ p->clkd->r.num_rates++;
return 0;
}
@@ -531,7 +529,13 @@ scmi_clock_describe_rates_get_full(const struct scmi_protocol_handle *ph,
.dev = ph->dev,
};
- iter = ph->hops->iter_response_init(ph, &ops, 0, CLOCK_DESCRIBE_RATES,
+ /*
+ * Using tot_rates as max_resources parameter here so as to trigger
+ * the dynamic allocation only when strictly needed: when trying a
+ * full enumeration after a lazy one tot_rates will be non-zero.
+ */
+ iter = ph->hops->iter_response_init(ph, &ops, clkd->tot_rates,
+ CLOCK_DESCRIBE_RATES,
sizeof(struct scmi_msg_clock_describe_rates),
&cpriv);
if (IS_ERR(iter))
@@ -542,12 +546,12 @@ scmi_clock_describe_rates_get_full(const struct scmi_protocol_handle *ph,
return ret;
/* empty set ? */
- if (!clkd->num_rates)
+ if (!clkd->r.num_rates)
return 0;
- if (clkd->rate_discrete)
- sort(clkd->rates, clkd->num_rates,
- sizeof(clkd->rates[0]), rate_cmp_func, NULL);
+ if (clkd->r.rate_discrete && PROTOCOL_REV_MAJOR(ph->version) == 0x1)
+ sort(clkd->r.rates, clkd->r.num_rates,
+ sizeof(clkd->r.rates[0]), rate_cmp_func, NULL);
return 0;
}
@@ -583,7 +587,7 @@ scmi_clock_describe_rates_get_lazy(const struct scmi_protocol_handle *ph,
goto out;
/* If discrete grab the last value, which should be the max */
- if (clkd->rate_discrete && clkd->tot_rates > 3) {
+ if (clkd->r.rate_discrete && clkd->tot_rates > 3) {
first = clkd->tot_rates - 1;
last = clkd->tot_rates - 1;
ret = ph->hops->iter_response_run_bound(iter, &first, &last);
@@ -615,16 +619,16 @@ scmi_clock_describe_rates_get(const struct scmi_protocol_handle *ph,
if (ret)
return ret;
- clkd->info.min_rate = clkd->rates[RATE_MIN];
- if (!clkd->rate_discrete) {
- clkd->info.max_rate = clkd->rates[RATE_MAX];
+ clkd->info.min_rate = clkd->r.rates[RATE_MIN];
+ if (!clkd->r.rate_discrete) {
+ clkd->info.max_rate = clkd->r.rates[RATE_MAX];
dev_dbg(ph->dev, "Min %llu Max %llu Step %llu Hz\n",
- clkd->rates[RATE_MIN], clkd->rates[RATE_MAX],
- clkd->rates[RATE_STEP]);
+ clkd->r.rates[RATE_MIN], clkd->r.rates[RATE_MAX],
+ clkd->r.rates[RATE_STEP]);
} else {
- clkd->info.max_rate = clkd->rates[clkd->num_rates - 1];
+ clkd->info.max_rate = clkd->r.rates[clkd->r.num_rates - 1];
dev_dbg(ph->dev, "Clock:%s DISCRETE:%d -> Min %llu Max %llu\n",
- clkd->info.name, clkd->rate_discrete,
+ clkd->info.name, clkd->r.rate_discrete,
clkd->info.min_rate, clkd->info.max_rate);
}
@@ -729,7 +733,7 @@ static int scmi_clock_determine_rate(const struct scmi_protocol_handle *ph,
* If we can't figure out what rate it will be, so just return the
* rate back to the caller.
*/
- if (clkd->rate_discrete)
+ if (clkd->r.rate_discrete)
return 0;
fmin = clk->min_rate;
@@ -743,14 +747,40 @@ static int scmi_clock_determine_rate(const struct scmi_protocol_handle *ph,
}
ftmp = *rate - fmin;
- ftmp += clkd->rates[RATE_STEP] - 1; /* to round up */
- do_div(ftmp, clkd->rates[RATE_STEP]);
+ ftmp += clkd->r.rates[RATE_STEP] - 1; /* to round up */
+ do_div(ftmp, clkd->r.rates[RATE_STEP]);
- *rate = ftmp * clkd->rates[RATE_STEP] + fmin;
+ *rate = ftmp * clkd->r.rates[RATE_STEP] + fmin;
return 0;
}
+static const struct scmi_clock_rates *
+scmi_clock_all_rates_get(const struct scmi_protocol_handle *ph, u32 clk_id)
+{
+ struct clock_info *ci = ph->get_priv(ph);
+ struct scmi_clock_desc *clkd;
+ struct scmi_clock_info *clk;
+
+ clk = scmi_clock_domain_lookup(ci, clk_id);
+ if (IS_ERR(clk) || !clk->name[0])
+ return NULL;
+
+ clkd = to_desc(clk);
+ /* Needs full enumeration ? */
+ if (clkd->r.rate_discrete && clkd->tot_rates != clkd->r.num_rates) {
+ int ret;
+
+ /* rates[] is already allocated BUT we need to re-enumerate */
+ clkd->r.num_rates = 0;
+ ret = scmi_clock_describe_rates_get_full(ph, clkd);
+ if (ret)
+ return NULL;
+ }
+
+ return &clkd->r;
+}
+
static int
scmi_clock_config_set(const struct scmi_protocol_handle *ph, u32 clk_id,
enum clk_state state,
@@ -1064,6 +1094,7 @@ static const struct scmi_clk_proto_ops clk_proto_ops = {
.rate_get = scmi_clock_rate_get,
.rate_set = scmi_clock_rate_set,
.determine_rate = scmi_clock_determine_rate,
+ .all_rates_get = scmi_clock_all_rates_get,
.enable = scmi_clock_enable,
.disable = scmi_clock_disable,
.state_get = scmi_clock_state_get,
diff --git a/include/linux/scmi_protocol.h b/include/linux/scmi_protocol.h
index 5552ac04c820..c710107c2120 100644
--- a/include/linux/scmi_protocol.h
+++ b/include/linux/scmi_protocol.h
@@ -40,6 +40,12 @@ struct scmi_revision_info {
char sub_vendor_id[SCMI_SHORT_NAME_MAX_SIZE];
};
+struct scmi_clock_rates {
+ bool rate_discrete;
+ unsigned int num_rates;
+ u64 *rates;
+};
+
struct scmi_clock_info {
char name[SCMI_MAX_STR_SIZE];
unsigned int enable_latency;
@@ -85,6 +91,7 @@ enum scmi_clock_oem_config {
* clock calculating the closest allowed rate.
* Note that @rate is an input/output parameter used both to
* describe the requested rate and report the closest match
+ * @all_rates_get: get the list of all available rates for the specified clock.
* @enable: enables the specified clock
* @disable: disables the specified clock
* @state_get: get the status of the specified clock
@@ -104,6 +111,8 @@ struct scmi_clk_proto_ops {
u64 rate);
int (*determine_rate)(const struct scmi_protocol_handle *ph, u32 clk_id,
unsigned long *rate);
+ const struct scmi_clock_rates __must_check *(*all_rates_get)
+ (const struct scmi_protocol_handle *ph, u32 clk_id);
int (*enable)(const struct scmi_protocol_handle *ph, u32 clk_id,
bool atomic);
int (*disable)(const struct scmi_protocol_handle *ph, u32 clk_id,
--
2.53.0 | {
"author": "Cristian Marussi <cristian.marussi@arm.com>",
"date": "Fri, 27 Feb 2026 15:32:25 +0000",
"is_openbsd": false,
"thread_id": "20260227153225.2778358-12-cristian.marussi@arm.com.mbox.gz"
} |
lkml_critique | lkml | In order to support RCU delay free (call_rcu() and kfree_rcu()), the
abstraction of the `rcu_head` is introduced. Types that want to support
RCU delay free can specify a `RcuHead<T>` in it, e.g.
#[derive(HasField)]
struct Foo {
a: i32,
b: i32,
#[field]
rcu_head: RcuHead,
}
A wrapper `WithRcuHead<T>` is also provided for users that want to
specify a generic `T` with a rcu_head.
Signed-off-by: Boqun Feng <boqun.feng@gmail.com>
---
rust/kernel/sync/rcu.rs | 69 ++++++++++++++++++++++++++++++++++++++++-
1 file changed, 68 insertions(+), 1 deletion(-)
diff --git a/rust/kernel/sync/rcu.rs b/rust/kernel/sync/rcu.rs
index a32bef6e490b..694ca2f54953 100644
--- a/rust/kernel/sync/rcu.rs
+++ b/rust/kernel/sync/rcu.rs
@@ -4,7 +4,14 @@
//!
//! C header: [`include/linux/rcupdate.h`](srctree/include/linux/rcupdate.h)
-use crate::{bindings, types::NotThreadSafe};
+use crate::{
+ bindings,
+ field::{Field, HasField},
+ macros::HasField,
+ types::{NotThreadSafe, Opaque},
+};
+
+use core::ops::Deref;
/// Evidence that the RCU read side lock is held on the current thread/CPU.
///
@@ -50,3 +57,63 @@ fn drop(&mut self) {
pub fn read_lock() -> Guard {
Guard::new()
}
+
+/// RCU head for call backs.
+///
+/// # Examples
+///
+/// Use `#[derive(HasField)]` macro to specify a struct has a RCU head.
+///
+/// ```
+/// use kernel::sync::rcu::RcuHead;
+///
+/// #[derive(HasField)]
+/// struct Foo {
+/// a: i32,
+/// #[field]
+/// rcu_head: RcuHead,
+/// b: i32,
+/// }
+///
+/// const _: () = {
+/// const fn assert_has_field<T: HasField<T, RcuHead>>() { }
+/// assert_has_field::<Foo>();
+/// };
+/// ```
+#[repr(transparent)]
+pub struct RcuHead(Opaque<bindings::callback_head>);
+
+impl<T> Field<T> for RcuHead {}
+
+// SAFETY: `callback_head` doesn't hold anything local to the current execution context, so it's
+// safe to transfer to another execution context.
+unsafe impl Send for RcuHead {}
+// SAFETY: `callback_head` should only be used when it's in the destructor, and accesses to it are
+// already unsafe, hence make it `Sync`.
+unsafe impl Sync for RcuHead {}
+
+/// A wrapper that adds an `RcuHead` on `T`.
+#[derive(HasField)]
+pub struct WithRcuHead<T> {
+ #[field]
+ head: RcuHead,
+ data: T,
+}
+
+impl<T> WithRcuHead<T> {
+ /// Creates a new wrapper on `T` with `RcuHead`.
+ pub fn new(data: T) -> Self {
+ Self {
+ head: RcuHead(Opaque::zeroed()),
+ data,
+ }
+ }
+}
+
+impl<T> Deref for WithRcuHead<T> {
+ type Target = T;
+
+ fn deref(&self) -> &Self::Target {
+ &self.data
+ }
+}
--
2.50.1 (Apple Git-155)
| null | null | null | [RFC PATCH 7/7] rust: sync: rcu: Introduce RcuHead | In order to unify all the `Has*` infrastrutures, a generic `HasField`
trait is added along with a derive macro `#[derive(HasField)]` which
allows generate implementation of `HasField` automatically, e.g.
#[derive(HasField)]
struct Base {
a: i32;
b: i32;
#[field]
f1: Field<Base, 1>,
#[field]
f2: Field<Base, 2>,
}
two implementations `impl HasField<Base, Field<Base, 1>>` and `impl
HasField<Base, Field<Base, 2>>` will be generated with `&raw mut` and
`container_of!()`.
This simplifies the usage of the current `Has*` traits, namely `HasWork`
and `HasHrTimer`, and eases the introduction of more `Field` type in the
future.
Signed-off-by: Boqun Feng <boqun.feng@gmail.com>
---
rust/kernel/field.rs | 73 ++++++++++++++++++++++++++++++++++++
rust/kernel/lib.rs | 1 +
rust/kernel/prelude.rs | 4 +-
rust/macros/field.rs | 85 ++++++++++++++++++++++++++++++++++++++++++
rust/macros/lib.rs | 11 ++++++
5 files changed, 173 insertions(+), 1 deletion(-)
create mode 100644 rust/kernel/field.rs
create mode 100644 rust/macros/field.rs
diff --git a/rust/kernel/field.rs b/rust/kernel/field.rs
new file mode 100644
index 000000000000..347387731d71
--- /dev/null
+++ b/rust/kernel/field.rs
@@ -0,0 +1,73 @@
+// SPDX-License-Identifier: GPL-2.0
+
+//! Field types to describe a field inside a struct.
+
+/// A field.
+///
+/// The generic type `T` is usually the type that contains the field. For some field types, it
+/// needs to be generic over the type containing it, because it needs to be initialized with
+/// container-type-specific callbacks. For other types, simply implement [`Field<T>`] for all `T`
+/// to indicate there is no restriction.
+pub trait Field<T>: Sized {}
+
+/// A struct `T` that has a field `F`.
+///
+/// # Safety
+///
+/// The methods [`raw_get_field()`] and [`field_container_of()`] must return valid pointers and
+/// must be true inverses of each other; that is, they must satisfy the following invariants: -
+/// `field_container_of(raw_get_field(ptr)) == ptr` for any `ptr: *mut Self`. -
+/// `raw_get_field(field_container_of(ptr)) == ptr` for any `ptr: *mut Field<T>`.
+///
+/// Use [`macros::HasField`] to generate the impls automatically.
+///
+/// # Examples
+///
+/// ```
+/// # use core::marker::PhantomData;
+/// use kernel::{
+/// macros::HasField,
+/// field::{
+/// Field,
+/// HasField, //
+/// }, //
+/// };
+///
+/// struct Work<T, const ID: u64> {
+/// _x: isize,
+/// _inner: PhantomData<T>,
+/// }
+///
+/// // Declare that `Work` is a `Field`.
+/// impl<T, const ID: u64> Field<T> for Work<T, ID> {}
+///
+/// #[derive(HasField)]
+/// struct B {
+/// #[field]
+/// w: Work<B, 2>,
+/// a: i32,
+/// }
+///
+/// const _: () = {
+/// const fn assert_has_field<T: HasField<T, Work<T, 2>>>() { }
+/// assert_has_field::<B>();
+/// };
+/// ```
+///
+/// [`raw_get_field()`]: HasField::raw_get_field
+/// [`field_container_of()`]: HasField::field_container_of
+pub unsafe trait HasField<T, F: Field<T>> {
+ /// Returns a pointer to the [`Field<T>`] field.
+ ///
+ /// # Safety
+ ///
+ /// The provided pointer must point at a valid struct of type `Self`.
+ unsafe fn raw_get_field(ptr: *mut Self) -> *mut F;
+
+ /// Returns a pointer to the struct containing [`Field<T>`] field.
+ ///
+ /// # Safety
+ ///
+ /// The pointer must point at a [`Field<T>`] field in a struct of type `Self`.
+ unsafe fn field_container_of(ptr: *mut F) -> *mut Self;
+}
diff --git a/rust/kernel/lib.rs b/rust/kernel/lib.rs
index f812cf120042..36259aac1843 100644
--- a/rust/kernel/lib.rs
+++ b/rust/kernel/lib.rs
@@ -93,6 +93,7 @@
pub mod drm;
pub mod error;
pub mod faux;
+pub mod field;
#[cfg(CONFIG_RUST_FW_LOADER_ABSTRACTIONS)]
pub mod firmware;
pub mod fmt;
diff --git a/rust/kernel/prelude.rs b/rust/kernel/prelude.rs
index 2877e3f7b6d3..3668ef42046b 100644
--- a/rust/kernel/prelude.rs
+++ b/rust/kernel/prelude.rs
@@ -25,10 +25,12 @@
pub use crate::alloc::{flags::*, Box, KBox, KVBox, KVVec, KVec, VBox, VVec, Vec};
#[doc(no_inline)]
-pub use macros::{export, fmt, kunit_tests, module, vtable};
+pub use macros::{export, fmt, kunit_tests, module, vtable, HasField};
pub use pin_init::{init, pin_data, pin_init, pinned_drop, InPlaceWrite, Init, PinInit, Zeroable};
+pub use super::field::{Field, HasField};
+
pub use super::{build_assert, build_error};
// `super::std_vendor` is hidden, which makes the macro inline for some reason.
diff --git a/rust/macros/field.rs b/rust/macros/field.rs
new file mode 100644
index 000000000000..3d32e5089f27
--- /dev/null
+++ b/rust/macros/field.rs
@@ -0,0 +1,85 @@
+// SPDX-License-Identifier: GPL-2.0
+
+use proc_macro2::{Span, TokenStream};
+use quote::quote;
+use syn::{
+ spanned::Spanned, Data, DataStruct, DeriveInput, Error, Fields, Generics, Ident, Result, Type,
+};
+
+fn impl_has_field(base: &Ident, field: &Ident, ty: &Type, generics: &Generics) -> TokenStream {
+ let (impl_generics, type_generics, where_clause) = generics.split_for_impl();
+
+ quote!(
+ // SAFETY: The implementation of `raw_get_field()` only compiles if the field has the
+ // right type.
+ unsafe impl #impl_generics
+ HasField<#base #type_generics, #ty>
+ for #base #type_generics
+ #where_clause {
+ #[inline(always)]
+ unsafe fn raw_get_field(ptr: *mut Self) -> *mut #ty {
+ // SAFETY: Per function safety requirement, the pointer is valid.
+ unsafe { &raw mut (*ptr).#field }
+ }
+
+ #[inline(always)]
+ unsafe fn field_container_of(ptr: *mut #ty) -> *mut Self {
+ // SAFETY: Per function safety requirement, the pointer is valid, and it points
+ // to the right field of the struct.
+ unsafe { kernel::container_of!(ptr, Self, #field) }
+ }
+ }
+ )
+}
+fn handle_struct(
+ ident: &Ident,
+ generics: &Generics,
+ st: &DataStruct,
+ span: Span,
+) -> Result<TokenStream> {
+ let mut impls = vec![];
+
+ if let Fields::Named(fields) = &st.fields {
+ for field in &fields.named {
+ let found = field
+ .attrs
+ .iter()
+ .find(|attr| attr.path().is_ident("field"));
+
+ if found.is_some() {
+ if let Some(name) = &field.ident {
+ impls.push(impl_has_field(ident, name, &field.ty, generics));
+ }
+ }
+ }
+
+ Ok(quote!(
+ #(#impls)*
+ ))
+ } else {
+ Err(Error::new(
+ span,
+ "`#[derive(HasField)]` only supports structs with named fields",
+ ))
+ }
+}
+
+pub(crate) fn has_field(input: DeriveInput) -> Result<TokenStream> {
+ let span = input.span();
+ let data = &input.data;
+ let ident = &input.ident;
+ let generics = &input.generics;
+
+ if let Data::Struct(st) = data {
+ let impls = handle_struct(ident, generics, st, span)?;
+
+ Ok(quote!(
+ #impls
+ ))
+ } else {
+ Err(Error::new_spanned(
+ input,
+ "`#[derive(HasField)]` only supports structs",
+ ))
+ }
+}
diff --git a/rust/macros/lib.rs b/rust/macros/lib.rs
index 85b7938c08e5..4fccca0e11af 100644
--- a/rust/macros/lib.rs
+++ b/rust/macros/lib.rs
@@ -13,6 +13,7 @@
mod concat_idents;
mod export;
+mod field;
mod fmt;
mod helpers;
mod kunit;
@@ -486,3 +487,13 @@ pub fn kunit_tests(attr: TokenStream, input: TokenStream) -> TokenStream {
.unwrap_or_else(|e| e.into_compile_error())
.into()
}
+
+/// Derives the implementation for `HasField`.
+///
+/// See the documentation of `HasField` for more information.
+#[proc_macro_derive(HasField, attributes(field))]
+pub fn has_field(input: TokenStream) -> TokenStream {
+ field::has_field(parse_macro_input!(input))
+ .unwrap_or_else(|e| e.into_compile_error())
+ .into()
+}
--
2.50.1 (Apple Git-155) | {
"author": "Boqun Feng <boqun.feng@gmail.com>",
"date": "Wed, 28 Jan 2026 13:53:24 -0800",
"is_openbsd": false,
"thread_id": "DGPU1OF7TWG0.3EW2BO61C27C6@garyguo.net.mbox.gz"
} |
lkml_critique | lkml | In order to support RCU delay free (call_rcu() and kfree_rcu()), the
abstraction of the `rcu_head` is introduced. Types that want to support
RCU delay free can specify a `RcuHead<T>` in it, e.g.
#[derive(HasField)]
struct Foo {
a: i32,
b: i32,
#[field]
rcu_head: RcuHead,
}
A wrapper `WithRcuHead<T>` is also provided for users that want to
specify a generic `T` with a rcu_head.
Signed-off-by: Boqun Feng <boqun.feng@gmail.com>
---
rust/kernel/sync/rcu.rs | 69 ++++++++++++++++++++++++++++++++++++++++-
1 file changed, 68 insertions(+), 1 deletion(-)
diff --git a/rust/kernel/sync/rcu.rs b/rust/kernel/sync/rcu.rs
index a32bef6e490b..694ca2f54953 100644
--- a/rust/kernel/sync/rcu.rs
+++ b/rust/kernel/sync/rcu.rs
@@ -4,7 +4,14 @@
//!
//! C header: [`include/linux/rcupdate.h`](srctree/include/linux/rcupdate.h)
-use crate::{bindings, types::NotThreadSafe};
+use crate::{
+ bindings,
+ field::{Field, HasField},
+ macros::HasField,
+ types::{NotThreadSafe, Opaque},
+};
+
+use core::ops::Deref;
/// Evidence that the RCU read side lock is held on the current thread/CPU.
///
@@ -50,3 +57,63 @@ fn drop(&mut self) {
pub fn read_lock() -> Guard {
Guard::new()
}
+
+/// RCU head for call backs.
+///
+/// # Examples
+///
+/// Use `#[derive(HasField)]` macro to specify a struct has a RCU head.
+///
+/// ```
+/// use kernel::sync::rcu::RcuHead;
+///
+/// #[derive(HasField)]
+/// struct Foo {
+/// a: i32,
+/// #[field]
+/// rcu_head: RcuHead,
+/// b: i32,
+/// }
+///
+/// const _: () = {
+/// const fn assert_has_field<T: HasField<T, RcuHead>>() { }
+/// assert_has_field::<Foo>();
+/// };
+/// ```
+#[repr(transparent)]
+pub struct RcuHead(Opaque<bindings::callback_head>);
+
+impl<T> Field<T> for RcuHead {}
+
+// SAFETY: `callback_head` doesn't hold anything local to the current execution context, so it's
+// safe to transfer to another execution context.
+unsafe impl Send for RcuHead {}
+// SAFETY: `callback_head` should only be used when it's in the destructor, and accesses to it are
+// already unsafe, hence make it `Sync`.
+unsafe impl Sync for RcuHead {}
+
+/// A wrapper that adds an `RcuHead` on `T`.
+#[derive(HasField)]
+pub struct WithRcuHead<T> {
+ #[field]
+ head: RcuHead,
+ data: T,
+}
+
+impl<T> WithRcuHead<T> {
+ /// Creates a new wrapper on `T` with `RcuHead`.
+ pub fn new(data: T) -> Self {
+ Self {
+ head: RcuHead(Opaque::zeroed()),
+ data,
+ }
+ }
+}
+
+impl<T> Deref for WithRcuHead<T> {
+ type Target = T;
+
+ fn deref(&self) -> &Self::Target {
+ &self.data
+ }
+}
--
2.50.1 (Apple Git-155)
| null | null | null | [RFC PATCH 7/7] rust: sync: rcu: Introduce RcuHead | Now all in-tree users of `impl_has_work!()` are converted to use
`#[derive(HasField)]`, hence remove it.
Signed-off-by: Boqun Feng <boqun.feng@gmail.com>
---
rust/kernel/workqueue.rs | 53 ++--------------------------------------
1 file changed, 2 insertions(+), 51 deletions(-)
diff --git a/rust/kernel/workqueue.rs b/rust/kernel/workqueue.rs
index 2dcfd3eace39..37fbf348c760 100644
--- a/rust/kernel/workqueue.rs
+++ b/rust/kernel/workqueue.rs
@@ -578,55 +578,6 @@ pub unsafe trait HasWork<T, const ID: u64 = 0> {
unsafe fn work_container_of(ptr: *mut Work<T, ID>) -> *mut Self;
}
-/// Used to safely implement the [`HasWork<T, ID>`] trait.
-///
-/// # Examples
-///
-/// ```
-/// use kernel::sync::Arc;
-/// use kernel::workqueue::{self, impl_has_work, Work};
-///
-/// struct MyStruct<'a, T, const N: usize> {
-/// work_field: Work<MyStruct<'a, T, N>, 17>,
-/// f: fn(&'a [T; N]),
-/// }
-///
-/// impl_has_work! {
-/// impl{'a, T, const N: usize} HasWork<MyStruct<'a, T, N>, 17>
-/// for MyStruct<'a, T, N> { self.work_field }
-/// }
-/// ```
-#[macro_export]
-macro_rules! impl_has_work {
- ($(impl$({$($generics:tt)*})?
- HasWork<$work_type:ty $(, $id:tt)?>
- for $self:ty
- { self.$field:ident }
- )*) => {$(
- // SAFETY: The implementation of `raw_get_work` only compiles if the field has the right
- // type.
- unsafe impl$(<$($generics)+>)? $crate::workqueue::HasWork<$work_type $(, $id)?> for $self {
- #[inline]
- unsafe fn raw_get_work(ptr: *mut Self) -> *mut $crate::workqueue::Work<$work_type $(, $id)?> {
- // SAFETY: The caller promises that the pointer is not dangling.
- unsafe {
- ::core::ptr::addr_of_mut!((*ptr).$field)
- }
- }
-
- #[inline]
- unsafe fn work_container_of(
- ptr: *mut $crate::workqueue::Work<$work_type $(, $id)?>,
- ) -> *mut Self {
- // SAFETY: The caller promises that the pointer points at a field of the right type
- // in the right kind of struct.
- unsafe { $crate::container_of!(ptr, Self, $field) }
- }
- }
- )*};
-}
-pub use impl_has_work;
-
impl<T, const ID: u64> Field<T> for Work<T, ID> {}
/// SAFETY: Per the safety requirement of `HasField`, `raw_get_field()` and `field_container_of()`
@@ -746,8 +697,8 @@ pub unsafe trait HasDelayedWork<T, const ID: u64 = 0>: HasWork<T, ID> {}
/// Used to safely implement the [`HasDelayedWork<T, ID>`] trait.
///
-/// This macro also implements the [`HasWork`] trait, so you do not need to use [`impl_has_work!`]
-/// when using this macro.
+/// This macro also implements the [`HasWork`] trait, so you do not need to use `#[has_field]` when
+/// using this macro.
///
/// # Examples
///
--
2.50.1 (Apple Git-155) | {
"author": "Boqun Feng <boqun.feng@gmail.com>",
"date": "Wed, 28 Jan 2026 13:53:29 -0800",
"is_openbsd": false,
"thread_id": "DGPU1OF7TWG0.3EW2BO61C27C6@garyguo.net.mbox.gz"
} |
lkml_critique | lkml | In order to support RCU delay free (call_rcu() and kfree_rcu()), the
abstraction of the `rcu_head` is introduced. Types that want to support
RCU delay free can specify a `RcuHead<T>` in it, e.g.
#[derive(HasField)]
struct Foo {
a: i32,
b: i32,
#[field]
rcu_head: RcuHead,
}
A wrapper `WithRcuHead<T>` is also provided for users that want to
specify a generic `T` with a rcu_head.
Signed-off-by: Boqun Feng <boqun.feng@gmail.com>
---
rust/kernel/sync/rcu.rs | 69 ++++++++++++++++++++++++++++++++++++++++-
1 file changed, 68 insertions(+), 1 deletion(-)
diff --git a/rust/kernel/sync/rcu.rs b/rust/kernel/sync/rcu.rs
index a32bef6e490b..694ca2f54953 100644
--- a/rust/kernel/sync/rcu.rs
+++ b/rust/kernel/sync/rcu.rs
@@ -4,7 +4,14 @@
//!
//! C header: [`include/linux/rcupdate.h`](srctree/include/linux/rcupdate.h)
-use crate::{bindings, types::NotThreadSafe};
+use crate::{
+ bindings,
+ field::{Field, HasField},
+ macros::HasField,
+ types::{NotThreadSafe, Opaque},
+};
+
+use core::ops::Deref;
/// Evidence that the RCU read side lock is held on the current thread/CPU.
///
@@ -50,3 +57,63 @@ fn drop(&mut self) {
pub fn read_lock() -> Guard {
Guard::new()
}
+
+/// RCU head for call backs.
+///
+/// # Examples
+///
+/// Use `#[derive(HasField)]` macro to specify a struct has a RCU head.
+///
+/// ```
+/// use kernel::sync::rcu::RcuHead;
+///
+/// #[derive(HasField)]
+/// struct Foo {
+/// a: i32,
+/// #[field]
+/// rcu_head: RcuHead,
+/// b: i32,
+/// }
+///
+/// const _: () = {
+/// const fn assert_has_field<T: HasField<T, RcuHead>>() { }
+/// assert_has_field::<Foo>();
+/// };
+/// ```
+#[repr(transparent)]
+pub struct RcuHead(Opaque<bindings::callback_head>);
+
+impl<T> Field<T> for RcuHead {}
+
+// SAFETY: `callback_head` doesn't hold anything local to the current execution context, so it's
+// safe to transfer to another execution context.
+unsafe impl Send for RcuHead {}
+// SAFETY: `callback_head` should only be used when it's in the destructor, and accesses to it are
+// already unsafe, hence make it `Sync`.
+unsafe impl Sync for RcuHead {}
+
+/// A wrapper that adds an `RcuHead` on `T`.
+#[derive(HasField)]
+pub struct WithRcuHead<T> {
+ #[field]
+ head: RcuHead,
+ data: T,
+}
+
+impl<T> WithRcuHead<T> {
+ /// Creates a new wrapper on `T` with `RcuHead`.
+ pub fn new(data: T) -> Self {
+ Self {
+ head: RcuHead(Opaque::zeroed()),
+ data,
+ }
+ }
+}
+
+impl<T> Deref for WithRcuHead<T> {
+ type Target = T;
+
+ fn deref(&self) -> &Self::Target {
+ &self.data
+ }
+}
--
2.50.1 (Apple Git-155)
| null | null | null | [RFC PATCH 7/7] rust: sync: rcu: Introduce RcuHead | `#[derive(HasField)]` offers less code and better ergnomic for defining
a struct with a Work in it. Hence replace the current usage of
`impl_has_work!()`.
Signed-off-by: Boqun Feng <boqun.feng@gmail.com>
---
rust/kernel/sync/completion.rs | 8 +++-----
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/rust/kernel/sync/completion.rs b/rust/kernel/sync/completion.rs
index c50012a940a3..c4af58924fe3 100644
--- a/rust/kernel/sync/completion.rs
+++ b/rust/kernel/sync/completion.rs
@@ -17,20 +17,18 @@
///
/// ```
/// use kernel::sync::{Arc, Completion};
-/// use kernel::workqueue::{self, impl_has_work, new_work, Work, WorkItem};
+/// use kernel::workqueue::{self, new_work, Work, WorkItem};
///
+/// #[derive(HasField)]
/// #[pin_data]
/// struct MyTask {
/// #[pin]
+/// #[field]
/// work: Work<MyTask>,
/// #[pin]
/// done: Completion,
/// }
///
-/// impl_has_work! {
-/// impl HasWork<Self> for MyTask { self.work }
-/// }
-///
/// impl MyTask {
/// fn new() -> Result<Arc<Self>> {
/// let this = Arc::pin_init(pin_init!(MyTask {
--
2.50.1 (Apple Git-155) | {
"author": "Boqun Feng <boqun.feng@gmail.com>",
"date": "Wed, 28 Jan 2026 13:53:28 -0800",
"is_openbsd": false,
"thread_id": "DGPU1OF7TWG0.3EW2BO61C27C6@garyguo.net.mbox.gz"
} |
lkml_critique | lkml | In order to support RCU delay free (call_rcu() and kfree_rcu()), the
abstraction of the `rcu_head` is introduced. Types that want to support
RCU delay free can specify a `RcuHead<T>` in it, e.g.
#[derive(HasField)]
struct Foo {
a: i32,
b: i32,
#[field]
rcu_head: RcuHead,
}
A wrapper `WithRcuHead<T>` is also provided for users that want to
specify a generic `T` with a rcu_head.
Signed-off-by: Boqun Feng <boqun.feng@gmail.com>
---
rust/kernel/sync/rcu.rs | 69 ++++++++++++++++++++++++++++++++++++++++-
1 file changed, 68 insertions(+), 1 deletion(-)
diff --git a/rust/kernel/sync/rcu.rs b/rust/kernel/sync/rcu.rs
index a32bef6e490b..694ca2f54953 100644
--- a/rust/kernel/sync/rcu.rs
+++ b/rust/kernel/sync/rcu.rs
@@ -4,7 +4,14 @@
//!
//! C header: [`include/linux/rcupdate.h`](srctree/include/linux/rcupdate.h)
-use crate::{bindings, types::NotThreadSafe};
+use crate::{
+ bindings,
+ field::{Field, HasField},
+ macros::HasField,
+ types::{NotThreadSafe, Opaque},
+};
+
+use core::ops::Deref;
/// Evidence that the RCU read side lock is held on the current thread/CPU.
///
@@ -50,3 +57,63 @@ fn drop(&mut self) {
pub fn read_lock() -> Guard {
Guard::new()
}
+
+/// RCU head for call backs.
+///
+/// # Examples
+///
+/// Use `#[derive(HasField)]` macro to specify a struct has a RCU head.
+///
+/// ```
+/// use kernel::sync::rcu::RcuHead;
+///
+/// #[derive(HasField)]
+/// struct Foo {
+/// a: i32,
+/// #[field]
+/// rcu_head: RcuHead,
+/// b: i32,
+/// }
+///
+/// const _: () = {
+/// const fn assert_has_field<T: HasField<T, RcuHead>>() { }
+/// assert_has_field::<Foo>();
+/// };
+/// ```
+#[repr(transparent)]
+pub struct RcuHead(Opaque<bindings::callback_head>);
+
+impl<T> Field<T> for RcuHead {}
+
+// SAFETY: `callback_head` doesn't hold anything local to the current execution context, so it's
+// safe to transfer to another execution context.
+unsafe impl Send for RcuHead {}
+// SAFETY: `callback_head` should only be used when it's in the destructor, and accesses to it are
+// already unsafe, hence make it `Sync`.
+unsafe impl Sync for RcuHead {}
+
+/// A wrapper that adds an `RcuHead` on `T`.
+#[derive(HasField)]
+pub struct WithRcuHead<T> {
+ #[field]
+ head: RcuHead,
+ data: T,
+}
+
+impl<T> WithRcuHead<T> {
+ /// Creates a new wrapper on `T` with `RcuHead`.
+ pub fn new(data: T) -> Self {
+ Self {
+ head: RcuHead(Opaque::zeroed()),
+ data,
+ }
+ }
+}
+
+impl<T> Deref for WithRcuHead<T> {
+ type Target = T;
+
+ fn deref(&self) -> &Self::Target {
+ &self.data
+ }
+}
--
2.50.1 (Apple Git-155)
| null | null | null | [RFC PATCH 7/7] rust: sync: rcu: Introduce RcuHead | `#[derive(HasField)]` offers less code and better ergonomic for defining
a struct with a Work in it. Hence replace the current usage of
`impl_has_work!()`.
Signed-off-by: Boqun Feng <boqun.feng@gmail.com>
---
drivers/android/binder/process.rs | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/android/binder/process.rs b/drivers/android/binder/process.rs
index 132055b4790f..2a2510e3a0cb 100644
--- a/drivers/android/binder/process.rs
+++ b/drivers/android/binder/process.rs
@@ -423,6 +423,7 @@ fn new() -> Self {
/// Strictly speaking, there can be multiple of these per process. There is one for each binder fd
/// that a process has opened, so processes using several binder contexts have several `Process`
/// objects. This ensures that the contexts are fully separated.
+#[derive(HasField)]
#[pin_data]
pub(crate) struct Process {
pub(crate) ctx: Arc<Context>,
@@ -451,6 +452,7 @@ pub(crate) struct Process {
// Work node for deferred work item.
#[pin]
+ #[field]
defer_work: Work<Process>,
// Links for process list in Context.
@@ -460,10 +462,6 @@ pub(crate) struct Process {
pub(crate) stats: BinderStats,
}
-kernel::impl_has_work! {
- impl HasWork<Process> for Process { self.defer_work }
-}
-
kernel::list::impl_list_arc_safe! {
impl ListArcSafe<0> for Process { untracked; }
}
--
2.50.1 (Apple Git-155) | {
"author": "Boqun Feng <boqun.feng@gmail.com>",
"date": "Wed, 28 Jan 2026 13:53:27 -0800",
"is_openbsd": false,
"thread_id": "DGPU1OF7TWG0.3EW2BO61C27C6@garyguo.net.mbox.gz"
} |
lkml_critique | lkml | In order to support RCU delay free (call_rcu() and kfree_rcu()), the
abstraction of the `rcu_head` is introduced. Types that want to support
RCU delay free can specify a `RcuHead<T>` in it, e.g.
#[derive(HasField)]
struct Foo {
a: i32,
b: i32,
#[field]
rcu_head: RcuHead,
}
A wrapper `WithRcuHead<T>` is also provided for users that want to
specify a generic `T` with a rcu_head.
Signed-off-by: Boqun Feng <boqun.feng@gmail.com>
---
rust/kernel/sync/rcu.rs | 69 ++++++++++++++++++++++++++++++++++++++++-
1 file changed, 68 insertions(+), 1 deletion(-)
diff --git a/rust/kernel/sync/rcu.rs b/rust/kernel/sync/rcu.rs
index a32bef6e490b..694ca2f54953 100644
--- a/rust/kernel/sync/rcu.rs
+++ b/rust/kernel/sync/rcu.rs
@@ -4,7 +4,14 @@
//!
//! C header: [`include/linux/rcupdate.h`](srctree/include/linux/rcupdate.h)
-use crate::{bindings, types::NotThreadSafe};
+use crate::{
+ bindings,
+ field::{Field, HasField},
+ macros::HasField,
+ types::{NotThreadSafe, Opaque},
+};
+
+use core::ops::Deref;
/// Evidence that the RCU read side lock is held on the current thread/CPU.
///
@@ -50,3 +57,63 @@ fn drop(&mut self) {
pub fn read_lock() -> Guard {
Guard::new()
}
+
+/// RCU head for call backs.
+///
+/// # Examples
+///
+/// Use `#[derive(HasField)]` macro to specify a struct has a RCU head.
+///
+/// ```
+/// use kernel::sync::rcu::RcuHead;
+///
+/// #[derive(HasField)]
+/// struct Foo {
+/// a: i32,
+/// #[field]
+/// rcu_head: RcuHead,
+/// b: i32,
+/// }
+///
+/// const _: () = {
+/// const fn assert_has_field<T: HasField<T, RcuHead>>() { }
+/// assert_has_field::<Foo>();
+/// };
+/// ```
+#[repr(transparent)]
+pub struct RcuHead(Opaque<bindings::callback_head>);
+
+impl<T> Field<T> for RcuHead {}
+
+// SAFETY: `callback_head` doesn't hold anything local to the current execution context, so it's
+// safe to transfer to another execution context.
+unsafe impl Send for RcuHead {}
+// SAFETY: `callback_head` should only be used when it's in the destructor, and accesses to it are
+// already unsafe, hence make it `Sync`.
+unsafe impl Sync for RcuHead {}
+
+/// A wrapper that adds an `RcuHead` on `T`.
+#[derive(HasField)]
+pub struct WithRcuHead<T> {
+ #[field]
+ head: RcuHead,
+ data: T,
+}
+
+impl<T> WithRcuHead<T> {
+ /// Creates a new wrapper on `T` with `RcuHead`.
+ pub fn new(data: T) -> Self {
+ Self {
+ head: RcuHead(Opaque::zeroed()),
+ data,
+ }
+ }
+}
+
+impl<T> Deref for WithRcuHead<T> {
+ type Target = T;
+
+ fn deref(&self) -> &Self::Target {
+ &self.data
+ }
+}
--
2.50.1 (Apple Git-155)
| null | null | null | [RFC PATCH 7/7] rust: sync: rcu: Introduce RcuHead | Implement `HasWork` via `HasField` so that manually impl_has_work!() is
no longer needed.
Signed-off-by: Boqun Feng <boqun.feng@gmail.com>
---
rust/kernel/workqueue.rs | 60 +++++++++++++++++++++++++---------------
1 file changed, 38 insertions(+), 22 deletions(-)
diff --git a/rust/kernel/workqueue.rs b/rust/kernel/workqueue.rs
index 706e833e9702..2dcfd3eace39 100644
--- a/rust/kernel/workqueue.rs
+++ b/rust/kernel/workqueue.rs
@@ -34,19 +34,17 @@
//!
//! ```
//! use kernel::sync::Arc;
-//! use kernel::workqueue::{self, impl_has_work, new_work, Work, WorkItem};
+//! use kernel::workqueue::{self, new_work, Work, WorkItem};
//!
+//! #[derive(HasField)]
//! #[pin_data]
//! struct MyStruct {
//! value: i32,
//! #[pin]
+//! #[field]
//! work: Work<MyStruct>,
//! }
//!
-//! impl_has_work! {
-//! impl HasWork<Self> for MyStruct { self.work }
-//! }
-//!
//! impl MyStruct {
//! fn new(value: i32) -> Result<Arc<Self>> {
//! Arc::pin_init(pin_init!(MyStruct {
@@ -76,23 +74,21 @@
//!
//! ```
//! use kernel::sync::Arc;
-//! use kernel::workqueue::{self, impl_has_work, new_work, Work, WorkItem};
+//! use kernel::workqueue::{self, new_work, Work, WorkItem};
//!
+//! #[derive(HasField)]
//! #[pin_data]
//! struct MyStruct {
//! value_1: i32,
//! value_2: i32,
//! #[pin]
+//! #[field]
//! work_1: Work<MyStruct, 1>,
//! #[pin]
+//! #[field]
//! work_2: Work<MyStruct, 2>,
//! }
//!
-//! impl_has_work! {
-//! impl HasWork<Self, 1> for MyStruct { self.work_1 }
-//! impl HasWork<Self, 2> for MyStruct { self.work_2 }
-//! }
-//!
//! impl MyStruct {
//! fn new(value_1: i32, value_2: i32) -> Result<Arc<Self>> {
//! Arc::pin_init(pin_init!(MyStruct {
@@ -188,6 +184,11 @@
use crate::{
alloc::{AllocError, Flags},
container_of,
+ field::{
+ Field,
+ HasField, //
+ },
+ macros::HasField,
prelude::*,
sync::Arc,
sync::LockClassKey,
@@ -349,9 +350,11 @@ pub fn try_spawn<T: 'static + Send + FnOnce()>(
/// A helper type used in [`try_spawn`].
///
/// [`try_spawn`]: Queue::try_spawn
+#[derive(HasField)]
#[pin_data]
struct ClosureWork<T> {
#[pin]
+ #[field]
work: Work<ClosureWork<T>>,
func: Option<T>,
}
@@ -534,19 +537,17 @@ pub unsafe fn raw_get(ptr: *const Self) -> *mut bindings::work_struct {
/// Declares that a type contains a [`Work<T, ID>`].
///
-/// The intended way of using this trait is via the [`impl_has_work!`] macro. You can use the macro
-/// like this:
+/// The intended way of using this trait is via the `#[derive(HasField)]` macro. You can use the
+/// macro like this:
///
-/// ```no_run
-/// use kernel::workqueue::{impl_has_work, Work};
+/// ```
+/// use kernel::workqueue::Work;
///
+/// #[derive(HasField)]
/// struct MyWorkItem {
+/// #[field]
/// work_field: Work<MyWorkItem, 1>,
/// }
-///
-/// impl_has_work! {
-/// impl HasWork<MyWorkItem, 1> for MyWorkItem { self.work_field }
-/// }
/// ```
///
/// Note that since the [`Work`] type is annotated with an id, you can have several `work_struct`
@@ -559,7 +560,6 @@ pub unsafe fn raw_get(ptr: *const Self) -> *mut bindings::work_struct {
/// - `work_container_of(raw_get_work(ptr)) == ptr` for any `ptr: *mut Self`.
/// - `raw_get_work(work_container_of(ptr)) == ptr` for any `ptr: *mut Work<T, ID>`.
///
-/// [`impl_has_work!`]: crate::impl_has_work
/// [`raw_get_work`]: HasWork::raw_get_work
/// [`work_container_of`]: HasWork::work_container_of
pub unsafe trait HasWork<T, const ID: u64 = 0> {
@@ -627,8 +627,24 @@ unsafe fn work_container_of(
}
pub use impl_has_work;
-impl_has_work! {
- impl{T} HasWork<Self> for ClosureWork<T> { self.work }
+impl<T, const ID: u64> Field<T> for Work<T, ID> {}
+
+/// SAFETY: Per the safety requirement of `HasField`, `raw_get_field()` and `field_container_of()`
+/// return valid pointers and are true inverses of each other, hence the implementation below
+/// fulfills `HasWork`'s safety requirement as well.
+unsafe impl<T: HasField<T, Work<T, ID>>, const ID: u64> HasWork<T, ID> for T {
+ #[inline]
+ unsafe fn raw_get_work(ptr: *mut Self) -> *mut Work<T, ID> {
+ // SAFETY: Per the function safety requirement, `ptr` is a valid pointer.
+ unsafe { <T as HasField<T, Work<T, ID>>>::raw_get_field(ptr) }
+ }
+
+ #[inline]
+ unsafe fn work_container_of(ptr: *mut Work<T, ID>) -> *mut Self {
+ // SAFETY: Per the function safety requirement, `ptr` is a valid pointer, and it points to
+ // a work field in struct `T`.
+ unsafe { <T as HasField<T, Work<T, ID>>>::field_container_of(ptr) }
+ }
}
/// Links for a delayed work item.
--
2.50.1 (Apple Git-155) | {
"author": "Boqun Feng <boqun.feng@gmail.com>",
"date": "Wed, 28 Jan 2026 13:53:26 -0800",
"is_openbsd": false,
"thread_id": "DGPU1OF7TWG0.3EW2BO61C27C6@garyguo.net.mbox.gz"
} |
lkml_critique | lkml | In order to support RCU delay free (call_rcu() and kfree_rcu()), the
abstraction of the `rcu_head` is introduced. Types that want to support
RCU delay free can specify a `RcuHead<T>` in it, e.g.
#[derive(HasField)]
struct Foo {
a: i32,
b: i32,
#[field]
rcu_head: RcuHead,
}
A wrapper `WithRcuHead<T>` is also provided for users that want to
specify a generic `T` with a rcu_head.
Signed-off-by: Boqun Feng <boqun.feng@gmail.com>
---
rust/kernel/sync/rcu.rs | 69 ++++++++++++++++++++++++++++++++++++++++-
1 file changed, 68 insertions(+), 1 deletion(-)
diff --git a/rust/kernel/sync/rcu.rs b/rust/kernel/sync/rcu.rs
index a32bef6e490b..694ca2f54953 100644
--- a/rust/kernel/sync/rcu.rs
+++ b/rust/kernel/sync/rcu.rs
@@ -4,7 +4,14 @@
//!
//! C header: [`include/linux/rcupdate.h`](srctree/include/linux/rcupdate.h)
-use crate::{bindings, types::NotThreadSafe};
+use crate::{
+ bindings,
+ field::{Field, HasField},
+ macros::HasField,
+ types::{NotThreadSafe, Opaque},
+};
+
+use core::ops::Deref;
/// Evidence that the RCU read side lock is held on the current thread/CPU.
///
@@ -50,3 +57,63 @@ fn drop(&mut self) {
pub fn read_lock() -> Guard {
Guard::new()
}
+
+/// RCU head for call backs.
+///
+/// # Examples
+///
+/// Use `#[derive(HasField)]` macro to specify a struct has a RCU head.
+///
+/// ```
+/// use kernel::sync::rcu::RcuHead;
+///
+/// #[derive(HasField)]
+/// struct Foo {
+/// a: i32,
+/// #[field]
+/// rcu_head: RcuHead,
+/// b: i32,
+/// }
+///
+/// const _: () = {
+/// const fn assert_has_field<T: HasField<T, RcuHead>>() { }
+/// assert_has_field::<Foo>();
+/// };
+/// ```
+#[repr(transparent)]
+pub struct RcuHead(Opaque<bindings::callback_head>);
+
+impl<T> Field<T> for RcuHead {}
+
+// SAFETY: `callback_head` doesn't hold anything local to the current execution context, so it's
+// safe to transfer to another execution context.
+unsafe impl Send for RcuHead {}
+// SAFETY: `callback_head` should only be used when it's in the destructor, and accesses to it are
+// already unsafe, hence make it `Sync`.
+unsafe impl Sync for RcuHead {}
+
+/// A wrapper that adds an `RcuHead` on `T`.
+#[derive(HasField)]
+pub struct WithRcuHead<T> {
+ #[field]
+ head: RcuHead,
+ data: T,
+}
+
+impl<T> WithRcuHead<T> {
+ /// Creates a new wrapper on `T` with `RcuHead`.
+ pub fn new(data: T) -> Self {
+ Self {
+ head: RcuHead(Opaque::zeroed()),
+ data,
+ }
+ }
+}
+
+impl<T> Deref for WithRcuHead<T> {
+ type Target = T;
+
+ fn deref(&self) -> &Self::Target {
+ &self.data
+ }
+}
--
2.50.1 (Apple Git-155)
| null | null | null | [RFC PATCH 7/7] rust: sync: rcu: Introduce RcuHead | This decouples the hrtimer mode part from the `HasField` part of a
`HasHrTimer`, `impl_has_hr_timer` also gets removed, as we can do:
#[has_field]
#[pin]
struct MyStruct {
a: i32,
#[field]
timer: HrTimer<MyStruct>,
}
impl HasHrTimer<MyStruct> for MyStruct {
type TimerMode = ...;
}
Signed-off-by: Boqun Feng <boqun.feng@gmail.com>
---
rust/kernel/time/hrtimer.rs | 70 ++++++++-----------------------------
1 file changed, 15 insertions(+), 55 deletions(-)
diff --git a/rust/kernel/time/hrtimer.rs b/rust/kernel/time/hrtimer.rs
index 856d2d929a00..eef6d60f5adb 100644
--- a/rust/kernel/time/hrtimer.rs
+++ b/rust/kernel/time/hrtimer.rs
@@ -98,6 +98,8 @@ unsafe impl<T> Send for HrTimer<T> {}
// on a timer from multiple threads.
unsafe impl<T> Sync for HrTimer<T> {}
+impl<T> Field<T> for HrTimer<T> {}
+
impl<T> HrTimer<T> {
/// Return an initializer for a new timer instance.
pub fn new() -> impl PinInit<Self>
@@ -417,17 +419,7 @@ pub unsafe trait HrTimerHandle {
}
/// Implemented by structs that contain timer nodes.
-///
-/// Clients of the timer API would usually safely implement this trait by using
-/// the [`crate::impl_has_hr_timer`] macro.
-///
-/// # Safety
-///
-/// Implementers of this trait must ensure that the implementer has a
-/// [`HrTimer`] field and that all trait methods are implemented according to
-/// their documentation. All the methods of this trait must operate on the same
-/// field.
-pub unsafe trait HasHrTimer<T> {
+pub trait HasHrTimer<T>: HasField<T, HrTimer<T>> {
/// The operational mode associated with this timer.
///
/// This defines how the expiration value is interpreted.
@@ -441,7 +433,11 @@ pub unsafe trait HasHrTimer<T> {
/// # Safety
///
/// `this` must be a valid pointer.
- unsafe fn raw_get_timer(this: *const Self) -> *const HrTimer<T>;
+ #[inline]
+ unsafe fn raw_get_timer(this: *const Self) -> *const HrTimer<T> {
+ // SAFETY: Per function safety requirement, `this` is a valid pointer.
+ unsafe { <Self as HasField<_, _>>::raw_get_field(this.cast_mut()) }.cast_const()
+ }
/// Return a pointer to the struct that is containing the [`HrTimer`] pointed
/// to by `ptr`.
@@ -452,9 +448,15 @@ pub unsafe trait HasHrTimer<T> {
/// # Safety
///
/// `ptr` must point to a [`HrTimer<T>`] field in a struct of type `Self`.
+ #[inline]
unsafe fn timer_container_of(ptr: *mut HrTimer<T>) -> *mut Self
where
- Self: Sized;
+ Self: Sized,
+ {
+ // SAFETY: Per function safety requirement, `ptr` is a valid pointer and points to a
+ // `HrTimer` field in a struct.
+ unsafe { <Self as HasField<_, _>>::field_container_of(ptr) }
+ }
/// Get pointer to the contained `bindings::hrtimer` struct.
///
@@ -731,48 +733,6 @@ pub fn forward_now(&mut self, duration: Delta) -> u64 {
}
}
-/// Use to implement the [`HasHrTimer<T>`] trait.
-///
-/// See [`module`] documentation for an example.
-///
-/// [`module`]: crate::time::hrtimer
-#[macro_export]
-macro_rules! impl_has_hr_timer {
- (
- impl$({$($generics:tt)*})?
- HasHrTimer<$timer_type:ty>
- for $self:ty
- {
- mode : $mode:ty,
- field : self.$field:ident $(,)?
- }
- $($rest:tt)*
- ) => {
- // SAFETY: This implementation of `raw_get_timer` only compiles if the
- // field has the right type.
- unsafe impl$(<$($generics)*>)? $crate::time::hrtimer::HasHrTimer<$timer_type> for $self {
- type TimerMode = $mode;
-
- #[inline]
- unsafe fn raw_get_timer(
- this: *const Self,
- ) -> *const $crate::time::hrtimer::HrTimer<$timer_type> {
- // SAFETY: The caller promises that the pointer is not dangling.
- unsafe { ::core::ptr::addr_of!((*this).$field) }
- }
-
- #[inline]
- unsafe fn timer_container_of(
- ptr: *mut $crate::time::hrtimer::HrTimer<$timer_type>,
- ) -> *mut Self {
- // SAFETY: As per the safety requirement of this function, `ptr`
- // is pointing inside a `$timer_type`.
- unsafe { ::kernel::container_of!(ptr, $timer_type, $field) }
- }
- }
- }
-}
-
mod arc;
pub use arc::ArcHrTimerHandle;
mod pin;
--
2.50.1 (Apple Git-155) | {
"author": "Boqun Feng <boqun.feng@gmail.com>",
"date": "Wed, 28 Jan 2026 13:53:25 -0800",
"is_openbsd": false,
"thread_id": "DGPU1OF7TWG0.3EW2BO61C27C6@garyguo.net.mbox.gz"
} |
lkml_critique | lkml | In order to support RCU delay free (call_rcu() and kfree_rcu()), the
abstraction of the `rcu_head` is introduced. Types that want to support
RCU delay free can specify a `RcuHead<T>` in it, e.g.
#[derive(HasField)]
struct Foo {
a: i32,
b: i32,
#[field]
rcu_head: RcuHead,
}
A wrapper `WithRcuHead<T>` is also provided for users that want to
specify a generic `T` with a rcu_head.
Signed-off-by: Boqun Feng <boqun.feng@gmail.com>
---
rust/kernel/sync/rcu.rs | 69 ++++++++++++++++++++++++++++++++++++++++-
1 file changed, 68 insertions(+), 1 deletion(-)
diff --git a/rust/kernel/sync/rcu.rs b/rust/kernel/sync/rcu.rs
index a32bef6e490b..694ca2f54953 100644
--- a/rust/kernel/sync/rcu.rs
+++ b/rust/kernel/sync/rcu.rs
@@ -4,7 +4,14 @@
//!
//! C header: [`include/linux/rcupdate.h`](srctree/include/linux/rcupdate.h)
-use crate::{bindings, types::NotThreadSafe};
+use crate::{
+ bindings,
+ field::{Field, HasField},
+ macros::HasField,
+ types::{NotThreadSafe, Opaque},
+};
+
+use core::ops::Deref;
/// Evidence that the RCU read side lock is held on the current thread/CPU.
///
@@ -50,3 +57,63 @@ fn drop(&mut self) {
pub fn read_lock() -> Guard {
Guard::new()
}
+
+/// RCU head for call backs.
+///
+/// # Examples
+///
+/// Use `#[derive(HasField)]` macro to specify a struct has a RCU head.
+///
+/// ```
+/// use kernel::sync::rcu::RcuHead;
+///
+/// #[derive(HasField)]
+/// struct Foo {
+/// a: i32,
+/// #[field]
+/// rcu_head: RcuHead,
+/// b: i32,
+/// }
+///
+/// const _: () = {
+/// const fn assert_has_field<T: HasField<T, RcuHead>>() { }
+/// assert_has_field::<Foo>();
+/// };
+/// ```
+#[repr(transparent)]
+pub struct RcuHead(Opaque<bindings::callback_head>);
+
+impl<T> Field<T> for RcuHead {}
+
+// SAFETY: `callback_head` doesn't hold anything local to the current execution context, so it's
+// safe to transfer to another execution context.
+unsafe impl Send for RcuHead {}
+// SAFETY: `callback_head` should only be used when it's in the destructor, and accesses to it are
+// already unsafe, hence make it `Sync`.
+unsafe impl Sync for RcuHead {}
+
+/// A wrapper that adds an `RcuHead` on `T`.
+#[derive(HasField)]
+pub struct WithRcuHead<T> {
+ #[field]
+ head: RcuHead,
+ data: T,
+}
+
+impl<T> WithRcuHead<T> {
+ /// Creates a new wrapper on `T` with `RcuHead`.
+ pub fn new(data: T) -> Self {
+ Self {
+ head: RcuHead(Opaque::zeroed()),
+ data,
+ }
+ }
+}
+
+impl<T> Deref for WithRcuHead<T> {
+ type Target = T;
+
+ fn deref(&self) -> &Self::Target {
+ &self.data
+ }
+}
--
2.50.1 (Apple Git-155)
| null | null | null | [RFC PATCH 7/7] rust: sync: rcu: Introduce RcuHead | Currently we have a few similar places where we use a `Has*` trait to
describe that a data structure has some types of field in it so that the
containing type can do something with it. There are also a `impl_has_*!`
macro to help implement the trait. While it's working, but it's less
ergonomic to me, especially considering the amount of the work we need
to do for something new (e.g. rcu_head).
Therefore here is the effort to unify them into a proc-macro based
solution. `Field` and `HasField` traits are introduced to generify the
"Has A" relationship, and a derive macro `#[derive(HasField)]` is also
added to support automatically implementing `HasField` trait.
This series convert a few users (Work, HrTimer) and introduce a new
`Field` type `RcuHead`. These improvements demonstrate how this
infrastructure can be used.
Some future work is still needed: using `HasField` for `DelayedWork` and
`ListLink` is still missing. Also it's possible to clean up `HasWork`
trait as well.
One known issue is that `#[derive(HasField)]` doesn't play alone with
`#[pin_data]` at the moment, for example:
#[derive(HasField)]
#[pin_data]
struct Foo { .. }
works, but
#[pin_data]
#[derive(HasField)]
struct Foo { .. }
doesn't. Maybe it's by design or maybe something could be improved by
pin-init.
The patchset is based on today's rust/rust-next, top commit is:
a7c013f77953 ('Merge patch series "refactor Rust proc macros with `syn`"')
Regards,
Boqun
Boqun Feng (7):
rust: types: Introduce HasField trait and derive macro
rust: time: hrtimer: Make `HasField` a super-trait of `HasHrTimer`
rust: workqueue: Add HasField support for Work
drivers: android: binder: Replace `impl_has_work!` with
`#[derive(HasField)]`
rust: sync: Completion: Replace `impl_has_work!` with
`#[derive(HasField)]`
rust: work: Remove `impl_has_work!`
rust: sync: rcu: Introduce RcuHead
drivers/android/binder/process.rs | 6 +-
rust/kernel/field.rs | 73 ++++++++++++++++++++
rust/kernel/lib.rs | 1 +
rust/kernel/prelude.rs | 4 +-
rust/kernel/sync/completion.rs | 8 +--
rust/kernel/sync/rcu.rs | 69 ++++++++++++++++++-
rust/kernel/time/hrtimer.rs | 70 ++++---------------
rust/kernel/workqueue.rs | 109 +++++++++++-------------------
rust/macros/field.rs | 85 +++++++++++++++++++++++
rust/macros/lib.rs | 11 +++
10 files changed, 299 insertions(+), 137 deletions(-)
create mode 100644 rust/kernel/field.rs
create mode 100644 rust/macros/field.rs
--
2.50.1 (Apple Git-155) | {
"author": "Boqun Feng <boqun.feng@gmail.com>",
"date": "Wed, 28 Jan 2026 13:53:23 -0800",
"is_openbsd": false,
"thread_id": "DGPU1OF7TWG0.3EW2BO61C27C6@garyguo.net.mbox.gz"
} |
lkml_critique | lkml | In order to support RCU delay free (call_rcu() and kfree_rcu()), the
abstraction of the `rcu_head` is introduced. Types that want to support
RCU delay free can specify a `RcuHead<T>` in it, e.g.
#[derive(HasField)]
struct Foo {
a: i32,
b: i32,
#[field]
rcu_head: RcuHead,
}
A wrapper `WithRcuHead<T>` is also provided for users that want to
specify a generic `T` with a rcu_head.
Signed-off-by: Boqun Feng <boqun.feng@gmail.com>
---
rust/kernel/sync/rcu.rs | 69 ++++++++++++++++++++++++++++++++++++++++-
1 file changed, 68 insertions(+), 1 deletion(-)
diff --git a/rust/kernel/sync/rcu.rs b/rust/kernel/sync/rcu.rs
index a32bef6e490b..694ca2f54953 100644
--- a/rust/kernel/sync/rcu.rs
+++ b/rust/kernel/sync/rcu.rs
@@ -4,7 +4,14 @@
//!
//! C header: [`include/linux/rcupdate.h`](srctree/include/linux/rcupdate.h)
-use crate::{bindings, types::NotThreadSafe};
+use crate::{
+ bindings,
+ field::{Field, HasField},
+ macros::HasField,
+ types::{NotThreadSafe, Opaque},
+};
+
+use core::ops::Deref;
/// Evidence that the RCU read side lock is held on the current thread/CPU.
///
@@ -50,3 +57,63 @@ fn drop(&mut self) {
pub fn read_lock() -> Guard {
Guard::new()
}
+
+/// RCU head for call backs.
+///
+/// # Examples
+///
+/// Use `#[derive(HasField)]` macro to specify a struct has a RCU head.
+///
+/// ```
+/// use kernel::sync::rcu::RcuHead;
+///
+/// #[derive(HasField)]
+/// struct Foo {
+/// a: i32,
+/// #[field]
+/// rcu_head: RcuHead,
+/// b: i32,
+/// }
+///
+/// const _: () = {
+/// const fn assert_has_field<T: HasField<T, RcuHead>>() { }
+/// assert_has_field::<Foo>();
+/// };
+/// ```
+#[repr(transparent)]
+pub struct RcuHead(Opaque<bindings::callback_head>);
+
+impl<T> Field<T> for RcuHead {}
+
+// SAFETY: `callback_head` doesn't hold anything local to the current execution context, so it's
+// safe to transfer to another execution context.
+unsafe impl Send for RcuHead {}
+// SAFETY: `callback_head` should only be used when it's in the destructor, and accesses to it are
+// already unsafe, hence make it `Sync`.
+unsafe impl Sync for RcuHead {}
+
+/// A wrapper that adds an `RcuHead` on `T`.
+#[derive(HasField)]
+pub struct WithRcuHead<T> {
+ #[field]
+ head: RcuHead,
+ data: T,
+}
+
+impl<T> WithRcuHead<T> {
+ /// Creates a new wrapper on `T` with `RcuHead`.
+ pub fn new(data: T) -> Self {
+ Self {
+ head: RcuHead(Opaque::zeroed()),
+ data,
+ }
+ }
+}
+
+impl<T> Deref for WithRcuHead<T> {
+ type Target = T;
+
+ fn deref(&self) -> &Self::Target {
+ &self.data
+ }
+}
--
2.50.1 (Apple Git-155)
| null | null | null | [RFC PATCH 7/7] rust: sync: rcu: Introduce RcuHead | On Wed Jan 28, 2026 at 9:53 PM GMT, Boqun Feng wrote:
Hi Boqun,
Thanks for working on this.
You currently divide things into two traits, `Field<T>` which doesn't seem to be
doing anything (actually, why does this need to exist at all?) and
`HasField<T, F>` which defines all the field projection.
For some prior art that attempts to have fields, e.g. my field-projection
experiemnt crate
https://docs.rs/field-projection
and Benno's work on field-representing-types in the Rust language, we opt to
have a type to represent each field instead.
I think we should have a unified projection infrastructure in the kernel, for
both intrusive data structure and I/O projection and others, so I think it's
useful to have types representing fields (and projection in general, this could
also extend to the `register!` macro). For clarity, let me refer to this as
`field_of!(Base, foo)` and the trait is `Projection`.
With this infra, the `HasField` trait would simply looks like this:
trait HasField<Base, FieldType> {
type Field: Projection<Base = Base, Type = FieldType>;
}
and the macro derive would generate something like
impl HasField<MyStruct, Work<MyStruct>> {
type Field = field_of!(MyStruct, name_of_work_field);
}
Best,
Gary | {
"author": "\"Gary Guo\" <gary@garyguo.net>",
"date": "Wed, 04 Feb 2026 14:20:09 +0000",
"is_openbsd": false,
"thread_id": "DGPU1OF7TWG0.3EW2BO61C27C6@garyguo.net.mbox.gz"
} |
lkml_critique | lkml | In order to support RCU delay free (call_rcu() and kfree_rcu()), the
abstraction of the `rcu_head` is introduced. Types that want to support
RCU delay free can specify a `RcuHead<T>` in it, e.g.
#[derive(HasField)]
struct Foo {
a: i32,
b: i32,
#[field]
rcu_head: RcuHead,
}
A wrapper `WithRcuHead<T>` is also provided for users that want to
specify a generic `T` with a rcu_head.
Signed-off-by: Boqun Feng <boqun.feng@gmail.com>
---
rust/kernel/sync/rcu.rs | 69 ++++++++++++++++++++++++++++++++++++++++-
1 file changed, 68 insertions(+), 1 deletion(-)
diff --git a/rust/kernel/sync/rcu.rs b/rust/kernel/sync/rcu.rs
index a32bef6e490b..694ca2f54953 100644
--- a/rust/kernel/sync/rcu.rs
+++ b/rust/kernel/sync/rcu.rs
@@ -4,7 +4,14 @@
//!
//! C header: [`include/linux/rcupdate.h`](srctree/include/linux/rcupdate.h)
-use crate::{bindings, types::NotThreadSafe};
+use crate::{
+ bindings,
+ field::{Field, HasField},
+ macros::HasField,
+ types::{NotThreadSafe, Opaque},
+};
+
+use core::ops::Deref;
/// Evidence that the RCU read side lock is held on the current thread/CPU.
///
@@ -50,3 +57,63 @@ fn drop(&mut self) {
pub fn read_lock() -> Guard {
Guard::new()
}
+
+/// RCU head for call backs.
+///
+/// # Examples
+///
+/// Use `#[derive(HasField)]` macro to specify a struct has a RCU head.
+///
+/// ```
+/// use kernel::sync::rcu::RcuHead;
+///
+/// #[derive(HasField)]
+/// struct Foo {
+/// a: i32,
+/// #[field]
+/// rcu_head: RcuHead,
+/// b: i32,
+/// }
+///
+/// const _: () = {
+/// const fn assert_has_field<T: HasField<T, RcuHead>>() { }
+/// assert_has_field::<Foo>();
+/// };
+/// ```
+#[repr(transparent)]
+pub struct RcuHead(Opaque<bindings::callback_head>);
+
+impl<T> Field<T> for RcuHead {}
+
+// SAFETY: `callback_head` doesn't hold anything local to the current execution context, so it's
+// safe to transfer to another execution context.
+unsafe impl Send for RcuHead {}
+// SAFETY: `callback_head` should only be used when it's in the destructor, and accesses to it are
+// already unsafe, hence make it `Sync`.
+unsafe impl Sync for RcuHead {}
+
+/// A wrapper that adds an `RcuHead` on `T`.
+#[derive(HasField)]
+pub struct WithRcuHead<T> {
+ #[field]
+ head: RcuHead,
+ data: T,
+}
+
+impl<T> WithRcuHead<T> {
+ /// Creates a new wrapper on `T` with `RcuHead`.
+ pub fn new(data: T) -> Self {
+ Self {
+ head: RcuHead(Opaque::zeroed()),
+ data,
+ }
+ }
+}
+
+impl<T> Deref for WithRcuHead<T> {
+ type Target = T;
+
+ fn deref(&self) -> &Self::Target {
+ &self.data
+ }
+}
--
2.50.1 (Apple Git-155)
| null | null | null | [RFC PATCH 7/7] rust: sync: rcu: Introduce RcuHead | On Wed, Feb 04, 2026 at 02:20:09PM +0000, Gary Guo wrote:
Oh, you're right, I don't need `Field<T>` right now. In a certain point,
it was used to constrain all "field types" must be generic over their
container type. But it's not the case now (see RcuHead).
Yep, I actually have an example PR integrating that into workqueue:
https://github.com/Rust-for-Linux/field-projection/pull/2
(of course `Work` in that case should be generic over the containing
type, but that's easy to fix)
I guess the next question is: will you and Benno be willing to port
field-projection into kernel source (and keep it aligned with the
language feature), so we can switch to that?
Regards,
Boqun
[..] | {
"author": "Boqun Feng <boqun@kernel.org>",
"date": "Thu, 5 Feb 2026 12:47:29 -0800",
"is_openbsd": false,
"thread_id": "DGPU1OF7TWG0.3EW2BO61C27C6@garyguo.net.mbox.gz"
} |
lkml_critique | lkml | In order to support RCU delay free (call_rcu() and kfree_rcu()), the
abstraction of the `rcu_head` is introduced. Types that want to support
RCU delay free can specify a `RcuHead<T>` in it, e.g.
#[derive(HasField)]
struct Foo {
a: i32,
b: i32,
#[field]
rcu_head: RcuHead,
}
A wrapper `WithRcuHead<T>` is also provided for users that want to
specify a generic `T` with a rcu_head.
Signed-off-by: Boqun Feng <boqun.feng@gmail.com>
---
rust/kernel/sync/rcu.rs | 69 ++++++++++++++++++++++++++++++++++++++++-
1 file changed, 68 insertions(+), 1 deletion(-)
diff --git a/rust/kernel/sync/rcu.rs b/rust/kernel/sync/rcu.rs
index a32bef6e490b..694ca2f54953 100644
--- a/rust/kernel/sync/rcu.rs
+++ b/rust/kernel/sync/rcu.rs
@@ -4,7 +4,14 @@
//!
//! C header: [`include/linux/rcupdate.h`](srctree/include/linux/rcupdate.h)
-use crate::{bindings, types::NotThreadSafe};
+use crate::{
+ bindings,
+ field::{Field, HasField},
+ macros::HasField,
+ types::{NotThreadSafe, Opaque},
+};
+
+use core::ops::Deref;
/// Evidence that the RCU read side lock is held on the current thread/CPU.
///
@@ -50,3 +57,63 @@ fn drop(&mut self) {
pub fn read_lock() -> Guard {
Guard::new()
}
+
+/// RCU head for call backs.
+///
+/// # Examples
+///
+/// Use `#[derive(HasField)]` macro to specify a struct has a RCU head.
+///
+/// ```
+/// use kernel::sync::rcu::RcuHead;
+///
+/// #[derive(HasField)]
+/// struct Foo {
+/// a: i32,
+/// #[field]
+/// rcu_head: RcuHead,
+/// b: i32,
+/// }
+///
+/// const _: () = {
+/// const fn assert_has_field<T: HasField<T, RcuHead>>() { }
+/// assert_has_field::<Foo>();
+/// };
+/// ```
+#[repr(transparent)]
+pub struct RcuHead(Opaque<bindings::callback_head>);
+
+impl<T> Field<T> for RcuHead {}
+
+// SAFETY: `callback_head` doesn't hold anything local to the current execution context, so it's
+// safe to transfer to another execution context.
+unsafe impl Send for RcuHead {}
+// SAFETY: `callback_head` should only be used when it's in the destructor, and accesses to it are
+// already unsafe, hence make it `Sync`.
+unsafe impl Sync for RcuHead {}
+
+/// A wrapper that adds an `RcuHead` on `T`.
+#[derive(HasField)]
+pub struct WithRcuHead<T> {
+ #[field]
+ head: RcuHead,
+ data: T,
+}
+
+impl<T> WithRcuHead<T> {
+ /// Creates a new wrapper on `T` with `RcuHead`.
+ pub fn new(data: T) -> Self {
+ Self {
+ head: RcuHead(Opaque::zeroed()),
+ data,
+ }
+ }
+}
+
+impl<T> Deref for WithRcuHead<T> {
+ type Target = T;
+
+ fn deref(&self) -> &Self::Target {
+ &self.data
+ }
+}
--
2.50.1 (Apple Git-155)
| null | null | null | [RFC PATCH 7/7] rust: sync: rcu: Introduce RcuHead | On Wed, 28 Jan 2026 13:53:23 -0800, Boqun Feng wrote:
Hi Boqun,
One naming concern: the #[field] attribute feels ambiguous since in
Rust every struct member is already called a "field." When reading:
#[derive(HasField)]
struct MyStruct {
value: i32,
#[field]
work: Work<MyStruct>,
}
it's not immediately obvious why "work" gets #[field] but "value"
does not, as both are struct fields.
Would something like #[project] be clearer?
Similarly, HasField could become HasProjection or ProjectField to
better distinguish the trait's purpose from the general concept of fields.
--
Joel Fernandes | {
"author": "Joel Fernandes <joelagnelf@nvidia.com>",
"date": "Mon, 16 Feb 2026 20:21:05 -0500",
"is_openbsd": false,
"thread_id": "DGPU1OF7TWG0.3EW2BO61C27C6@garyguo.net.mbox.gz"
} |
lkml_critique | lkml | In order to support RCU delay free (call_rcu() and kfree_rcu()), the
abstraction of the `rcu_head` is introduced. Types that want to support
RCU delay free can specify a `RcuHead<T>` in it, e.g.
#[derive(HasField)]
struct Foo {
a: i32,
b: i32,
#[field]
rcu_head: RcuHead,
}
A wrapper `WithRcuHead<T>` is also provided for users that want to
specify a generic `T` with a rcu_head.
Signed-off-by: Boqun Feng <boqun.feng@gmail.com>
---
rust/kernel/sync/rcu.rs | 69 ++++++++++++++++++++++++++++++++++++++++-
1 file changed, 68 insertions(+), 1 deletion(-)
diff --git a/rust/kernel/sync/rcu.rs b/rust/kernel/sync/rcu.rs
index a32bef6e490b..694ca2f54953 100644
--- a/rust/kernel/sync/rcu.rs
+++ b/rust/kernel/sync/rcu.rs
@@ -4,7 +4,14 @@
//!
//! C header: [`include/linux/rcupdate.h`](srctree/include/linux/rcupdate.h)
-use crate::{bindings, types::NotThreadSafe};
+use crate::{
+ bindings,
+ field::{Field, HasField},
+ macros::HasField,
+ types::{NotThreadSafe, Opaque},
+};
+
+use core::ops::Deref;
/// Evidence that the RCU read side lock is held on the current thread/CPU.
///
@@ -50,3 +57,63 @@ fn drop(&mut self) {
pub fn read_lock() -> Guard {
Guard::new()
}
+
+/// RCU head for call backs.
+///
+/// # Examples
+///
+/// Use `#[derive(HasField)]` macro to specify a struct has a RCU head.
+///
+/// ```
+/// use kernel::sync::rcu::RcuHead;
+///
+/// #[derive(HasField)]
+/// struct Foo {
+/// a: i32,
+/// #[field]
+/// rcu_head: RcuHead,
+/// b: i32,
+/// }
+///
+/// const _: () = {
+/// const fn assert_has_field<T: HasField<T, RcuHead>>() { }
+/// assert_has_field::<Foo>();
+/// };
+/// ```
+#[repr(transparent)]
+pub struct RcuHead(Opaque<bindings::callback_head>);
+
+impl<T> Field<T> for RcuHead {}
+
+// SAFETY: `callback_head` doesn't hold anything local to the current execution context, so it's
+// safe to transfer to another execution context.
+unsafe impl Send for RcuHead {}
+// SAFETY: `callback_head` should only be used when it's in the destructor, and accesses to it are
+// already unsafe, hence make it `Sync`.
+unsafe impl Sync for RcuHead {}
+
+/// A wrapper that adds an `RcuHead` on `T`.
+#[derive(HasField)]
+pub struct WithRcuHead<T> {
+ #[field]
+ head: RcuHead,
+ data: T,
+}
+
+impl<T> WithRcuHead<T> {
+ /// Creates a new wrapper on `T` with `RcuHead`.
+ pub fn new(data: T) -> Self {
+ Self {
+ head: RcuHead(Opaque::zeroed()),
+ data,
+ }
+ }
+}
+
+impl<T> Deref for WithRcuHead<T> {
+ type Target = T;
+
+ fn deref(&self) -> &Self::Target {
+ &self.data
+ }
+}
--
2.50.1 (Apple Git-155)
| null | null | null | [RFC PATCH 7/7] rust: sync: rcu: Introduce RcuHead | On Tue Feb 17, 2026 at 1:21 AM GMT, Joel Fernandes wrote:
This is not just for projection, but to establish has-a relation. A struct can
project into any of its fields, but for work/hrtimer use cases, it needs to be
able to find a specific field.
If we want a different name then I'd suggest `#[has]`.
Best,
Gary | {
"author": "\"Gary Guo\" <gary@garyguo.net>",
"date": "Fri, 27 Feb 2026 15:00:48 +0000",
"is_openbsd": false,
"thread_id": "DGPU1OF7TWG0.3EW2BO61C27C6@garyguo.net.mbox.gz"
} |
lkml_critique | lkml | There are some clocks where the rounding is managed by the hardware, and
the determine_rate() clk ops is just a noop that simply returns 0. Based
on discussions with Stephen at Linux Plumbers Conference, he suggested
adding a flag for this particular case. So let's add a new flag, and
update the clk core so that the determine_rate() clk op is not required
when this flag is set.
This series adds the flag, some kunit tests, and updates all of the
relevant drivers under drivers/clk to use the new flag.
Once this is merged, and in Linus's tree, I can update the few remaining
clk drivers that are outside of drivers/clk via those subsystems at a
later time.
Merge Strategy
--------------
All of this needs to be directly merged by Stephen as one series into
his tree. Subsystem maintainers: please leave a Reviewed-by or Acked-by.
To reduce the noise, I am only CCing people on their respective drivers.
Note this series depends on 3 previously-posted patches in this git pull
to Stephen for v7.1.
https://lore.kernel.org/linux-clk/aZuK4-QJCXUeSxtL@redhat.com/
Hopefully I set the depeendencies up correctly in b4.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
Brian Masney (13):
clk: add new flag CLK_ROUNDING_FW_MANAGED
clk: test: add test suite for CLK_ROUNDING_FW_MANAGED flag
clk: rp1: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: scpi: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: hisilicon: hi3660-stub: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: imx: scu: drop redundant init.ops variable assignment
clk: imx: scu: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpmh: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: smd-rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: renesas: rzg2l-cpg: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: samsung: acpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: sprd: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
drivers/clk/clk-rp1.c | 11 +----
drivers/clk/clk-scpi.c | 14 +-----
drivers/clk/clk.c | 24 ++++++++--
drivers/clk/clk_test.c | 85 +++++++++++++++++++++++++++++++++
drivers/clk/hisilicon/clk-hi3660-stub.c | 14 +-----
drivers/clk/imx/clk-scu.c | 23 +--------
drivers/clk/qcom/clk-rpm.c | 16 ++-----
drivers/clk/qcom/clk-rpmh.c | 8 +---
drivers/clk/qcom/clk-smd-rpm.c | 15 +-----
drivers/clk/renesas/rzg2l-cpg.c | 9 +---
drivers/clk/samsung/clk-acpm.c | 14 +-----
drivers/clk/sprd/pll.c | 7 ---
drivers/clk/sprd/pll.h | 2 +-
include/linux/clk-provider.h | 2 +
14 files changed, 123 insertions(+), 121 deletions(-)
---
base-commit: 7d6661873f6b54c75195780a40d66bad3d482d8f
change-id: 20260226-clk-det-rate-fw-managed-4b8d061f31be
prerequisite-patch-id: 59198edc95aca82a29327137ad2af82ec13295b6
prerequisite-patch-id: 8932e170649711d7a80c57784033a37faadd519b
prerequisite-patch-id: 91c7b1851c5d77e504c49ce6bf14b3f8b84e826a
Best regards,
--
Brian Masney <bmasney@redhat.com>
| null | null | null | [PATCH 00/13] clk: add new flag CLK_ROUNDING_FW_MANAGED | There are some clocks where the rounding is managed by the hardware, and
the determine_rate() clk ops is just a noop that simply returns 0. Add a
new flag for these type of clocks, and update the clk core so that the
determine_rate() clk op is not required when this flag is set.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
To: Michael Turquette <mturquette@baylibre.com>
To: Stephen Boyd <sboyd@kernel.org>
To: Abel Vesa <abelvesa@kernel.org>
To: Andrea della Porta <andrea.porta@suse.com>
To: Baolin Wang <baolin.wang@linux.alibaba.com>
To: Bjorn Andersson <andersson@kernel.org>
To: Chanwoo Choi <cw00.choi@samsung.com>
To: Frank Li <Frank.Li@nxp.com>
To: Geert Uytterhoeven <geert+renesas@glider.be>
To: Krzysztof Kozlowski <krzk@kernel.org>
To: Orson Zhai <orsonzhai@gmail.com>
To: Sascha Hauer <s.hauer@pengutronix.de>
To: Sudeep Holla <sudeep.holla@kernel.org>
To: Sylwester Nawrocki <s.nawrocki@samsung.com>
To: Tudor Ambarus <tudor.ambarus@linaro.org>
Cc: linux-clk@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: Alim Akhtar <alim.akhtar@samsung.com>
Cc: arm-scmi@vger.kernel.org
Cc: Chunyan Zhang <zhang.lyra@gmail.com>
Cc: Cristian Marussi <cristian.marussi@arm.com>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: imx@lists.linux.dev
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-arm-msm@vger.kernel.org
Cc: linux-renesas-soc@vger.kernel.org
Cc: linux-samsung-soc@vger.kernel.org
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
---
drivers/clk/clk.c | 24 +++++++++++++++++++++---
include/linux/clk-provider.h | 2 ++
2 files changed, 23 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index fd418dc988b1c60c49e3ac9c0c44aa132dd5da28..0a522a0817411c7f7c6e9cffd6f024e672a331a8 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -1557,6 +1557,20 @@ static int __init clk_disable_unused(void)
}
late_initcall_sync(clk_disable_unused);
+/**
+ * clk_is_rounding_fw_managed - Check to see if clk rounding is handled by the
+ * firmware.
+ * @core: the clk to check
+ *
+ * Clks that have this flag enabled do not need to have a determine_rate() op
+ * set, and will always return success for any rounding operation since the
+ * firmware will deal with the rounding.
+ */
+static inline bool clk_is_rounding_fw_managed(struct clk_core *core)
+{
+ return core->flags & CLK_ROUNDING_FW_MANAGED;
+}
+
static int clk_core_determine_round_nolock(struct clk_core *core,
struct clk_rate_request *req)
{
@@ -1589,6 +1603,8 @@ static int clk_core_determine_round_nolock(struct clk_core *core,
req->rate = core->rate;
} else if (core->ops->determine_rate) {
return core->ops->determine_rate(core->hw, req);
+ } else if (clk_is_rounding_fw_managed(core)) {
+ return 0;
} else {
return -EINVAL;
}
@@ -1673,7 +1689,7 @@ EXPORT_SYMBOL_GPL(clk_hw_forward_rate_request);
static bool clk_core_can_round(struct clk_core * const core)
{
- return core->ops->determine_rate;
+ return core->ops->determine_rate || clk_is_rounding_fw_managed(core);
}
static int clk_core_round_rate_nolock(struct clk_core *core,
@@ -3528,6 +3544,7 @@ static const struct {
ENTRY(CLK_IS_CRITICAL),
ENTRY(CLK_OPS_PARENT_ENABLE),
ENTRY(CLK_DUTY_CYCLE_PARENT),
+ ENTRY(CLK_ROUNDING_FW_MANAGED),
#undef ENTRY
};
@@ -3906,7 +3923,7 @@ static int __clk_core_init(struct clk_core *core)
/* check that clk_ops are sane. See Documentation/driver-api/clk.rst */
if (core->ops->set_rate && !core->ops->determine_rate &&
- core->ops->recalc_rate) {
+ core->ops->recalc_rate && !clk_is_rounding_fw_managed(core)) {
pr_err("%s: %s must implement .determine_rate in addition to .recalc_rate\n",
__func__, core->name);
ret = -EINVAL;
@@ -3920,7 +3937,8 @@ static int __clk_core_init(struct clk_core *core)
goto out;
}
- if (core->ops->set_parent && !core->ops->determine_rate) {
+ if (core->ops->set_parent && !core->ops->determine_rate &&
+ !clk_is_rounding_fw_managed(core)) {
pr_err("%s: %s must implement .set_parent & .determine_rate\n",
__func__, core->name);
ret = -EINVAL;
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index 1cda2c78dffaff037f0f16b0f11106b63b3a746f..187f8248a9c840c701cbbba99bb7cdeef7b654ee 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -32,6 +32,8 @@
#define CLK_OPS_PARENT_ENABLE BIT(12)
/* duty cycle call may be forwarded to the parent clock */
#define CLK_DUTY_CYCLE_PARENT BIT(13)
+/* clock rate rounding is managed by firmware, don't require determine_rate */
+#define CLK_ROUNDING_FW_MANAGED BIT(14)
struct clk;
struct clk_hw;
--
2.53.0 | {
"author": "Brian Masney <bmasney@redhat.com>",
"date": "Thu, 26 Feb 2026 13:16:45 -0500",
"is_openbsd": false,
"thread_id": "20260226-clk-det-rate-fw-managed-v1-0-4421dd2f6dc6@redhat.com.mbox.gz"
} |
lkml_critique | lkml | There are some clocks where the rounding is managed by the hardware, and
the determine_rate() clk ops is just a noop that simply returns 0. Based
on discussions with Stephen at Linux Plumbers Conference, he suggested
adding a flag for this particular case. So let's add a new flag, and
update the clk core so that the determine_rate() clk op is not required
when this flag is set.
This series adds the flag, some kunit tests, and updates all of the
relevant drivers under drivers/clk to use the new flag.
Once this is merged, and in Linus's tree, I can update the few remaining
clk drivers that are outside of drivers/clk via those subsystems at a
later time.
Merge Strategy
--------------
All of this needs to be directly merged by Stephen as one series into
his tree. Subsystem maintainers: please leave a Reviewed-by or Acked-by.
To reduce the noise, I am only CCing people on their respective drivers.
Note this series depends on 3 previously-posted patches in this git pull
to Stephen for v7.1.
https://lore.kernel.org/linux-clk/aZuK4-QJCXUeSxtL@redhat.com/
Hopefully I set the depeendencies up correctly in b4.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
Brian Masney (13):
clk: add new flag CLK_ROUNDING_FW_MANAGED
clk: test: add test suite for CLK_ROUNDING_FW_MANAGED flag
clk: rp1: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: scpi: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: hisilicon: hi3660-stub: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: imx: scu: drop redundant init.ops variable assignment
clk: imx: scu: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpmh: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: smd-rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: renesas: rzg2l-cpg: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: samsung: acpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: sprd: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
drivers/clk/clk-rp1.c | 11 +----
drivers/clk/clk-scpi.c | 14 +-----
drivers/clk/clk.c | 24 ++++++++--
drivers/clk/clk_test.c | 85 +++++++++++++++++++++++++++++++++
drivers/clk/hisilicon/clk-hi3660-stub.c | 14 +-----
drivers/clk/imx/clk-scu.c | 23 +--------
drivers/clk/qcom/clk-rpm.c | 16 ++-----
drivers/clk/qcom/clk-rpmh.c | 8 +---
drivers/clk/qcom/clk-smd-rpm.c | 15 +-----
drivers/clk/renesas/rzg2l-cpg.c | 9 +---
drivers/clk/samsung/clk-acpm.c | 14 +-----
drivers/clk/sprd/pll.c | 7 ---
drivers/clk/sprd/pll.h | 2 +-
include/linux/clk-provider.h | 2 +
14 files changed, 123 insertions(+), 121 deletions(-)
---
base-commit: 7d6661873f6b54c75195780a40d66bad3d482d8f
change-id: 20260226-clk-det-rate-fw-managed-4b8d061f31be
prerequisite-patch-id: 59198edc95aca82a29327137ad2af82ec13295b6
prerequisite-patch-id: 8932e170649711d7a80c57784033a37faadd519b
prerequisite-patch-id: 91c7b1851c5d77e504c49ce6bf14b3f8b84e826a
Best regards,
--
Brian Masney <bmasney@redhat.com>
| null | null | null | [PATCH 00/13] clk: add new flag CLK_ROUNDING_FW_MANAGED | Add two new clk tests related to the CLK_ROUNDING_FW_MANAGED flag:
- Test that clk_hw_register() fails when determine_rate is not set.
- Test that clk_hw_register() succeeds when determine_rate is not set,
and CLK_ROUNDING_FW_MANAGED is set. clk_set_rate() works, and
clk_round_rate() returns the requested rate.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
To: Michael Turquette <mturquette@baylibre.com>
To: Stephen Boyd <sboyd@kernel.org>
Cc: linux-clk@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
drivers/clk/clk_test.c | 85 ++++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 85 insertions(+)
diff --git a/drivers/clk/clk_test.c b/drivers/clk/clk_test.c
index b1961daac5e22fb84f493f04feab1ff94a975d90..d7037eadc0a0ddf7559151068775a9d11429c02e 100644
--- a/drivers/clk/clk_test.c
+++ b/drivers/clk/clk_test.c
@@ -3541,9 +3541,94 @@ static struct kunit_suite clk_hw_get_dev_of_node_test_suite = {
.test_cases = clk_hw_get_dev_of_node_test_cases,
};
+static const struct clk_ops clk_no_determine_rate_ops = {
+ .recalc_rate = clk_dummy_recalc_rate,
+ .set_rate = clk_dummy_set_rate,
+};
+
+/*
+ * Test that clk_hw_register() fails when determine_rate is not set.
+ */
+static void clk_test_no_determine_rate_fails(struct kunit *test)
+{
+ struct clk_init_data init = { };
+ struct clk_dummy_context *ctx;
+ int ret;
+
+ ctx = kunit_kzalloc(test, sizeof(*ctx), GFP_KERNEL);
+ KUNIT_ASSERT_NOT_ERR_OR_NULL(test, ctx);
+
+ ctx->rate = DUMMY_CLOCK_INIT_RATE;
+
+ init.name = "test_no_determine_rate";
+ init.ops = &clk_no_determine_rate_ops;
+ ctx->hw.init = &init;
+
+ ret = clk_hw_register(NULL, &ctx->hw);
+ KUNIT_EXPECT_EQ(test, ret, -EINVAL);
+}
+
+/*
+ * Test that clk_hw_register() succeeds when determine_rate is not set,
+ * and CLK_ROUNDING_FW_MANAGED is set. clk_set_rate() works, and
+ * clk_round_rate() returns the requested rate.
+ */
+static void clk_test_fw_managed_round_rate(struct kunit *test)
+{
+ struct clk_init_data init = { };
+ struct clk_dummy_context *ctx;
+ long rate, rounded_rate;
+ struct clk *clk;
+ int ret;
+
+ ctx = kunit_kzalloc(test, sizeof(*ctx), GFP_KERNEL);
+ KUNIT_ASSERT_NOT_ERR_OR_NULL(test, ctx);
+
+ ctx->rate = DUMMY_CLOCK_INIT_RATE;
+
+ init.name = "test_fw_managed";
+ init.ops = &clk_no_determine_rate_ops;
+ init.flags = CLK_ROUNDING_FW_MANAGED;
+ ctx->hw.init = &init;
+
+ ret = clk_hw_register(NULL, &ctx->hw);
+ KUNIT_ASSERT_EQ(test, ret, 0);
+
+ clk = clk_hw_get_clk(&ctx->hw, NULL);
+ KUNIT_ASSERT_NOT_ERR_OR_NULL(test, clk);
+
+ /* Test that clk_round_rate() returns the requested rate */
+ rounded_rate = clk_round_rate(clk, DUMMY_CLOCK_RATE_1);
+ KUNIT_EXPECT_EQ(test, rounded_rate, DUMMY_CLOCK_RATE_1);
+
+ /* Set a rate and verify it works */
+ ret = clk_set_rate(clk, DUMMY_CLOCK_RATE_1);
+ KUNIT_ASSERT_EQ(test, ret, 0);
+
+ rate = clk_get_rate(clk);
+ KUNIT_EXPECT_EQ(test, rate, DUMMY_CLOCK_RATE_1);
+
+ clk_put(clk);
+ clk_hw_unregister(&ctx->hw);
+}
+
+static struct kunit_case clk_fw_managed_test_cases[] = {
+ KUNIT_CASE(clk_test_no_determine_rate_fails),
+ KUNIT_CASE(clk_test_fw_managed_round_rate),
+ {}
+};
+
+/*
+ * Test suite for CLK_ROUNDING_FW_MANAGED flag.
+ */
+static struct kunit_suite clk_fw_managed_test_suite = {
+ .name = "clk_fw_managed_test",
+ .test_cases = clk_fw_managed_test_cases,
+};
kunit_test_suites(
&clk_assigned_rates_suite,
+ &clk_fw_managed_test_suite,
&clk_hw_get_dev_of_node_test_suite,
&clk_leaf_mux_set_rate_parent_test_suite,
&clk_test_suite,
--
2.53.0 | {
"author": "Brian Masney <bmasney@redhat.com>",
"date": "Thu, 26 Feb 2026 13:16:46 -0500",
"is_openbsd": false,
"thread_id": "20260226-clk-det-rate-fw-managed-v1-0-4421dd2f6dc6@redhat.com.mbox.gz"
} |
lkml_critique | lkml | There are some clocks where the rounding is managed by the hardware, and
the determine_rate() clk ops is just a noop that simply returns 0. Based
on discussions with Stephen at Linux Plumbers Conference, he suggested
adding a flag for this particular case. So let's add a new flag, and
update the clk core so that the determine_rate() clk op is not required
when this flag is set.
This series adds the flag, some kunit tests, and updates all of the
relevant drivers under drivers/clk to use the new flag.
Once this is merged, and in Linus's tree, I can update the few remaining
clk drivers that are outside of drivers/clk via those subsystems at a
later time.
Merge Strategy
--------------
All of this needs to be directly merged by Stephen as one series into
his tree. Subsystem maintainers: please leave a Reviewed-by or Acked-by.
To reduce the noise, I am only CCing people on their respective drivers.
Note this series depends on 3 previously-posted patches in this git pull
to Stephen for v7.1.
https://lore.kernel.org/linux-clk/aZuK4-QJCXUeSxtL@redhat.com/
Hopefully I set the depeendencies up correctly in b4.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
Brian Masney (13):
clk: add new flag CLK_ROUNDING_FW_MANAGED
clk: test: add test suite for CLK_ROUNDING_FW_MANAGED flag
clk: rp1: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: scpi: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: hisilicon: hi3660-stub: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: imx: scu: drop redundant init.ops variable assignment
clk: imx: scu: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpmh: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: smd-rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: renesas: rzg2l-cpg: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: samsung: acpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: sprd: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
drivers/clk/clk-rp1.c | 11 +----
drivers/clk/clk-scpi.c | 14 +-----
drivers/clk/clk.c | 24 ++++++++--
drivers/clk/clk_test.c | 85 +++++++++++++++++++++++++++++++++
drivers/clk/hisilicon/clk-hi3660-stub.c | 14 +-----
drivers/clk/imx/clk-scu.c | 23 +--------
drivers/clk/qcom/clk-rpm.c | 16 ++-----
drivers/clk/qcom/clk-rpmh.c | 8 +---
drivers/clk/qcom/clk-smd-rpm.c | 15 +-----
drivers/clk/renesas/rzg2l-cpg.c | 9 +---
drivers/clk/samsung/clk-acpm.c | 14 +-----
drivers/clk/sprd/pll.c | 7 ---
drivers/clk/sprd/pll.h | 2 +-
include/linux/clk-provider.h | 2 +
14 files changed, 123 insertions(+), 121 deletions(-)
---
base-commit: 7d6661873f6b54c75195780a40d66bad3d482d8f
change-id: 20260226-clk-det-rate-fw-managed-4b8d061f31be
prerequisite-patch-id: 59198edc95aca82a29327137ad2af82ec13295b6
prerequisite-patch-id: 8932e170649711d7a80c57784033a37faadd519b
prerequisite-patch-id: 91c7b1851c5d77e504c49ce6bf14b3f8b84e826a
Best regards,
--
Brian Masney <bmasney@redhat.com>
| null | null | null | [PATCH 00/13] clk: add new flag CLK_ROUNDING_FW_MANAGED | This clk driver has a noop determine_rate clk op. Drop this empty
function, and enable the CLK_ROUNDING_FW_MANAGED flag.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
To: Andrea della Porta <andrea.porta@suse.com>
To: Michael Turquette <mturquette@baylibre.com>
To: Stephen Boyd <sboyd@kernel.org>
Cc: linux-clk@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
drivers/clk/clk-rp1.c | 11 ++---------
1 file changed, 2 insertions(+), 9 deletions(-)
diff --git a/drivers/clk/clk-rp1.c b/drivers/clk/clk-rp1.c
index fd144755b879862612ea5e22e913dbb44a140033..acc50e5a7edd409c5f4b99c6f62af9ce06b5a4ee 100644
--- a/drivers/clk/clk-rp1.c
+++ b/drivers/clk/clk-rp1.c
@@ -1174,12 +1174,6 @@ static unsigned long rp1_varsrc_recalc_rate(struct clk_hw *hw,
return clock->cached_rate;
}
-static int rp1_varsrc_determine_rate(struct clk_hw *hw,
- struct clk_rate_request *req)
-{
- return 0;
-}
-
static const struct clk_ops rp1_pll_core_ops = {
.is_prepared = rp1_pll_core_is_on,
.prepare = rp1_pll_core_on,
@@ -1227,7 +1221,6 @@ static const struct clk_ops rp1_clk_ops = {
static const struct clk_ops rp1_varsrc_ops = {
.set_rate = rp1_varsrc_set_rate,
.recalc_rate = rp1_varsrc_recalc_rate,
- .determine_rate = rp1_varsrc_determine_rate,
};
static struct clk_hw *rp1_register_pll(struct rp1_clockman *clockman,
@@ -2000,7 +1993,7 @@ static struct rp1_clk_desc clksrc_mipi0_dsi_byteclk_desc = REGISTER_CLK(
"clksrc_mipi0_dsi_byteclk",
(const struct clk_parent_data[]) { { .index = 0 } },
&rp1_varsrc_ops,
- 0
+ CLK_ROUNDING_FW_MANAGED
),
CLK_DATA(rp1_clock_data,
.num_std_parents = 1,
@@ -2013,7 +2006,7 @@ static struct rp1_clk_desc clksrc_mipi1_dsi_byteclk_desc = REGISTER_CLK(
"clksrc_mipi1_dsi_byteclk",
(const struct clk_parent_data[]) { { .index = 0 } },
&rp1_varsrc_ops,
- 0
+ CLK_ROUNDING_FW_MANAGED
),
CLK_DATA(rp1_clock_data,
.num_std_parents = 1,
--
2.53.0 | {
"author": "Brian Masney <bmasney@redhat.com>",
"date": "Thu, 26 Feb 2026 13:16:47 -0500",
"is_openbsd": false,
"thread_id": "20260226-clk-det-rate-fw-managed-v1-0-4421dd2f6dc6@redhat.com.mbox.gz"
} |
lkml_critique | lkml | There are some clocks where the rounding is managed by the hardware, and
the determine_rate() clk ops is just a noop that simply returns 0. Based
on discussions with Stephen at Linux Plumbers Conference, he suggested
adding a flag for this particular case. So let's add a new flag, and
update the clk core so that the determine_rate() clk op is not required
when this flag is set.
This series adds the flag, some kunit tests, and updates all of the
relevant drivers under drivers/clk to use the new flag.
Once this is merged, and in Linus's tree, I can update the few remaining
clk drivers that are outside of drivers/clk via those subsystems at a
later time.
Merge Strategy
--------------
All of this needs to be directly merged by Stephen as one series into
his tree. Subsystem maintainers: please leave a Reviewed-by or Acked-by.
To reduce the noise, I am only CCing people on their respective drivers.
Note this series depends on 3 previously-posted patches in this git pull
to Stephen for v7.1.
https://lore.kernel.org/linux-clk/aZuK4-QJCXUeSxtL@redhat.com/
Hopefully I set the depeendencies up correctly in b4.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
Brian Masney (13):
clk: add new flag CLK_ROUNDING_FW_MANAGED
clk: test: add test suite for CLK_ROUNDING_FW_MANAGED flag
clk: rp1: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: scpi: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: hisilicon: hi3660-stub: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: imx: scu: drop redundant init.ops variable assignment
clk: imx: scu: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpmh: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: smd-rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: renesas: rzg2l-cpg: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: samsung: acpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: sprd: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
drivers/clk/clk-rp1.c | 11 +----
drivers/clk/clk-scpi.c | 14 +-----
drivers/clk/clk.c | 24 ++++++++--
drivers/clk/clk_test.c | 85 +++++++++++++++++++++++++++++++++
drivers/clk/hisilicon/clk-hi3660-stub.c | 14 +-----
drivers/clk/imx/clk-scu.c | 23 +--------
drivers/clk/qcom/clk-rpm.c | 16 ++-----
drivers/clk/qcom/clk-rpmh.c | 8 +---
drivers/clk/qcom/clk-smd-rpm.c | 15 +-----
drivers/clk/renesas/rzg2l-cpg.c | 9 +---
drivers/clk/samsung/clk-acpm.c | 14 +-----
drivers/clk/sprd/pll.c | 7 ---
drivers/clk/sprd/pll.h | 2 +-
include/linux/clk-provider.h | 2 +
14 files changed, 123 insertions(+), 121 deletions(-)
---
base-commit: 7d6661873f6b54c75195780a40d66bad3d482d8f
change-id: 20260226-clk-det-rate-fw-managed-4b8d061f31be
prerequisite-patch-id: 59198edc95aca82a29327137ad2af82ec13295b6
prerequisite-patch-id: 8932e170649711d7a80c57784033a37faadd519b
prerequisite-patch-id: 91c7b1851c5d77e504c49ce6bf14b3f8b84e826a
Best regards,
--
Brian Masney <bmasney@redhat.com>
| null | null | null | [PATCH 00/13] clk: add new flag CLK_ROUNDING_FW_MANAGED | This clk driver has a noop determine_rate clk op. Drop this empty
function, and enable the CLK_ROUNDING_FW_MANAGED flag.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
To: Sudeep Holla <sudeep.holla@kernel.org>
To: Michael Turquette <mturquette@baylibre.com>
To: Stephen Boyd <sboyd@kernel.org>
Cc: Cristian Marussi <cristian.marussi@arm.com>
Cc: arm-scmi@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-clk@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
drivers/clk/clk-scpi.c | 14 +-------------
1 file changed, 1 insertion(+), 13 deletions(-)
diff --git a/drivers/clk/clk-scpi.c b/drivers/clk/clk-scpi.c
index 7806569cd0d5c4e32700edb10e4edf2185610a81..e13f09cfadc70551c3c7955538e5a212fb0601a3 100644
--- a/drivers/clk/clk-scpi.c
+++ b/drivers/clk/clk-scpi.c
@@ -32,18 +32,6 @@ static unsigned long scpi_clk_recalc_rate(struct clk_hw *hw,
return clk->scpi_ops->clk_get_val(clk->id);
}
-static int scpi_clk_determine_rate(struct clk_hw *hw,
- struct clk_rate_request *req)
-{
- /*
- * We can't figure out what rate it will be, so just return the
- * rate back to the caller. scpi_clk_recalc_rate() will be called
- * after the rate is set and we'll know what rate the clock is
- * running at then.
- */
- return 0;
-}
-
static int scpi_clk_set_rate(struct clk_hw *hw, unsigned long rate,
unsigned long parent_rate)
{
@@ -54,7 +42,6 @@ static int scpi_clk_set_rate(struct clk_hw *hw, unsigned long rate,
static const struct clk_ops scpi_clk_ops = {
.recalc_rate = scpi_clk_recalc_rate,
- .determine_rate = scpi_clk_determine_rate,
.set_rate = scpi_clk_set_rate,
};
@@ -156,6 +143,7 @@ scpi_clk_ops_init(struct device *dev, const struct of_device_id *match,
if (IS_ERR(sclk->info))
return PTR_ERR(sclk->info);
} else if (init.ops == &scpi_clk_ops) {
+ init.flags |= CLK_ROUNDING_FW_MANAGED;
if (sclk->scpi_ops->clk_get_range(sclk->id, &min, &max) || !max)
return -EINVAL;
} else {
--
2.53.0 | {
"author": "Brian Masney <bmasney@redhat.com>",
"date": "Thu, 26 Feb 2026 13:16:48 -0500",
"is_openbsd": false,
"thread_id": "20260226-clk-det-rate-fw-managed-v1-0-4421dd2f6dc6@redhat.com.mbox.gz"
} |
lkml_critique | lkml | There are some clocks where the rounding is managed by the hardware, and
the determine_rate() clk ops is just a noop that simply returns 0. Based
on discussions with Stephen at Linux Plumbers Conference, he suggested
adding a flag for this particular case. So let's add a new flag, and
update the clk core so that the determine_rate() clk op is not required
when this flag is set.
This series adds the flag, some kunit tests, and updates all of the
relevant drivers under drivers/clk to use the new flag.
Once this is merged, and in Linus's tree, I can update the few remaining
clk drivers that are outside of drivers/clk via those subsystems at a
later time.
Merge Strategy
--------------
All of this needs to be directly merged by Stephen as one series into
his tree. Subsystem maintainers: please leave a Reviewed-by or Acked-by.
To reduce the noise, I am only CCing people on their respective drivers.
Note this series depends on 3 previously-posted patches in this git pull
to Stephen for v7.1.
https://lore.kernel.org/linux-clk/aZuK4-QJCXUeSxtL@redhat.com/
Hopefully I set the depeendencies up correctly in b4.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
Brian Masney (13):
clk: add new flag CLK_ROUNDING_FW_MANAGED
clk: test: add test suite for CLK_ROUNDING_FW_MANAGED flag
clk: rp1: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: scpi: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: hisilicon: hi3660-stub: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: imx: scu: drop redundant init.ops variable assignment
clk: imx: scu: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpmh: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: smd-rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: renesas: rzg2l-cpg: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: samsung: acpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: sprd: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
drivers/clk/clk-rp1.c | 11 +----
drivers/clk/clk-scpi.c | 14 +-----
drivers/clk/clk.c | 24 ++++++++--
drivers/clk/clk_test.c | 85 +++++++++++++++++++++++++++++++++
drivers/clk/hisilicon/clk-hi3660-stub.c | 14 +-----
drivers/clk/imx/clk-scu.c | 23 +--------
drivers/clk/qcom/clk-rpm.c | 16 ++-----
drivers/clk/qcom/clk-rpmh.c | 8 +---
drivers/clk/qcom/clk-smd-rpm.c | 15 +-----
drivers/clk/renesas/rzg2l-cpg.c | 9 +---
drivers/clk/samsung/clk-acpm.c | 14 +-----
drivers/clk/sprd/pll.c | 7 ---
drivers/clk/sprd/pll.h | 2 +-
include/linux/clk-provider.h | 2 +
14 files changed, 123 insertions(+), 121 deletions(-)
---
base-commit: 7d6661873f6b54c75195780a40d66bad3d482d8f
change-id: 20260226-clk-det-rate-fw-managed-4b8d061f31be
prerequisite-patch-id: 59198edc95aca82a29327137ad2af82ec13295b6
prerequisite-patch-id: 8932e170649711d7a80c57784033a37faadd519b
prerequisite-patch-id: 91c7b1851c5d77e504c49ce6bf14b3f8b84e826a
Best regards,
--
Brian Masney <bmasney@redhat.com>
| null | null | null | [PATCH 00/13] clk: add new flag CLK_ROUNDING_FW_MANAGED | This clk driver has a noop determine_rate clk op. Drop this empty
function, and enable the CLK_ROUNDING_FW_MANAGED flag.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
To: Michael Turquette <mturquette@baylibre.com>
To: Stephen Boyd <sboyd@kernel.org>
Cc: linux-clk@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
drivers/clk/hisilicon/clk-hi3660-stub.c | 14 ++------------
1 file changed, 2 insertions(+), 12 deletions(-)
diff --git a/drivers/clk/hisilicon/clk-hi3660-stub.c b/drivers/clk/hisilicon/clk-hi3660-stub.c
index 7c8b00ee60195e94f3b414bbf79ee5ec3cbf6c79..839660d26b08b6301ac909ebcaab56f569cdaff2 100644
--- a/drivers/clk/hisilicon/clk-hi3660-stub.c
+++ b/drivers/clk/hisilicon/clk-hi3660-stub.c
@@ -32,7 +32,8 @@
.name = #_name, \
.ops = &hi3660_stub_clk_ops, \
.num_parents = 0, \
- .flags = CLK_GET_RATE_NOCACHE, \
+ .flags = CLK_GET_RATE_NOCACHE | \
+ CLK_ROUNDING_FW_MANAGED, \
}, \
}
@@ -67,16 +68,6 @@ static unsigned long hi3660_stub_clk_recalc_rate(struct clk_hw *hw,
return stub_clk->rate;
}
-static int hi3660_stub_clk_determine_rate(struct clk_hw *hw,
- struct clk_rate_request *req)
-{
- /*
- * LPM3 handles rate rounding so just return whatever
- * rate is requested.
- */
- return 0;
-}
-
static int hi3660_stub_clk_set_rate(struct clk_hw *hw, unsigned long rate,
unsigned long parent_rate)
{
@@ -97,7 +88,6 @@ static int hi3660_stub_clk_set_rate(struct clk_hw *hw, unsigned long rate,
static const struct clk_ops hi3660_stub_clk_ops = {
.recalc_rate = hi3660_stub_clk_recalc_rate,
- .determine_rate = hi3660_stub_clk_determine_rate,
.set_rate = hi3660_stub_clk_set_rate,
};
--
2.53.0 | {
"author": "Brian Masney <bmasney@redhat.com>",
"date": "Thu, 26 Feb 2026 13:16:49 -0500",
"is_openbsd": false,
"thread_id": "20260226-clk-det-rate-fw-managed-v1-0-4421dd2f6dc6@redhat.com.mbox.gz"
} |
lkml_critique | lkml | There are some clocks where the rounding is managed by the hardware, and
the determine_rate() clk ops is just a noop that simply returns 0. Based
on discussions with Stephen at Linux Plumbers Conference, he suggested
adding a flag for this particular case. So let's add a new flag, and
update the clk core so that the determine_rate() clk op is not required
when this flag is set.
This series adds the flag, some kunit tests, and updates all of the
relevant drivers under drivers/clk to use the new flag.
Once this is merged, and in Linus's tree, I can update the few remaining
clk drivers that are outside of drivers/clk via those subsystems at a
later time.
Merge Strategy
--------------
All of this needs to be directly merged by Stephen as one series into
his tree. Subsystem maintainers: please leave a Reviewed-by or Acked-by.
To reduce the noise, I am only CCing people on their respective drivers.
Note this series depends on 3 previously-posted patches in this git pull
to Stephen for v7.1.
https://lore.kernel.org/linux-clk/aZuK4-QJCXUeSxtL@redhat.com/
Hopefully I set the depeendencies up correctly in b4.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
Brian Masney (13):
clk: add new flag CLK_ROUNDING_FW_MANAGED
clk: test: add test suite for CLK_ROUNDING_FW_MANAGED flag
clk: rp1: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: scpi: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: hisilicon: hi3660-stub: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: imx: scu: drop redundant init.ops variable assignment
clk: imx: scu: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpmh: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: smd-rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: renesas: rzg2l-cpg: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: samsung: acpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: sprd: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
drivers/clk/clk-rp1.c | 11 +----
drivers/clk/clk-scpi.c | 14 +-----
drivers/clk/clk.c | 24 ++++++++--
drivers/clk/clk_test.c | 85 +++++++++++++++++++++++++++++++++
drivers/clk/hisilicon/clk-hi3660-stub.c | 14 +-----
drivers/clk/imx/clk-scu.c | 23 +--------
drivers/clk/qcom/clk-rpm.c | 16 ++-----
drivers/clk/qcom/clk-rpmh.c | 8 +---
drivers/clk/qcom/clk-smd-rpm.c | 15 +-----
drivers/clk/renesas/rzg2l-cpg.c | 9 +---
drivers/clk/samsung/clk-acpm.c | 14 +-----
drivers/clk/sprd/pll.c | 7 ---
drivers/clk/sprd/pll.h | 2 +-
include/linux/clk-provider.h | 2 +
14 files changed, 123 insertions(+), 121 deletions(-)
---
base-commit: 7d6661873f6b54c75195780a40d66bad3d482d8f
change-id: 20260226-clk-det-rate-fw-managed-4b8d061f31be
prerequisite-patch-id: 59198edc95aca82a29327137ad2af82ec13295b6
prerequisite-patch-id: 8932e170649711d7a80c57784033a37faadd519b
prerequisite-patch-id: 91c7b1851c5d77e504c49ce6bf14b3f8b84e826a
Best regards,
--
Brian Masney <bmasney@redhat.com>
| null | null | null | [PATCH 00/13] clk: add new flag CLK_ROUNDING_FW_MANAGED | The init.ops is assigned a default value, however right below it is an
if, else if, and else where all of them also assign a value to init.ops.
Drop the redundant init.ops assignment at the top.
Fixes: 3b9ea606cda53 ("clk: imx: scu: add cpu frequency scaling support")
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
To: Abel Vesa <abelvesa@kernel.org>
To: Michael Turquette <mturquette@baylibre.com>
To: Stephen Boyd <sboyd@kernel.org>
To: Frank Li <Frank.Li@nxp.com>
To: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: linux-clk@vger.kernel.org
Cc: imx@lists.linux.dev
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
---
drivers/clk/imx/clk-scu.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/clk/imx/clk-scu.c b/drivers/clk/imx/clk-scu.c
index a85ec48a798b58a12f893587c85709bbd8476310..a39c68d664655537e81df55c7e6d32304de9338a 100644
--- a/drivers/clk/imx/clk-scu.c
+++ b/drivers/clk/imx/clk-scu.c
@@ -475,7 +475,6 @@ struct clk_hw *__imx_clk_scu(struct device *dev, const char *name,
clk->clk_type = clk_type;
init.name = name;
- init.ops = &clk_scu_ops;
if (rsrc_id == IMX_SC_R_A35 || rsrc_id == IMX_SC_R_A53 || rsrc_id == IMX_SC_R_A72)
init.ops = &clk_scu_cpu_ops;
else if (rsrc_id == IMX_SC_R_PI_0_PLL)
--
2.53.0 | {
"author": "Brian Masney <bmasney@redhat.com>",
"date": "Thu, 26 Feb 2026 13:16:50 -0500",
"is_openbsd": false,
"thread_id": "20260226-clk-det-rate-fw-managed-v1-0-4421dd2f6dc6@redhat.com.mbox.gz"
} |
lkml_critique | lkml | There are some clocks where the rounding is managed by the hardware, and
the determine_rate() clk ops is just a noop that simply returns 0. Based
on discussions with Stephen at Linux Plumbers Conference, he suggested
adding a flag for this particular case. So let's add a new flag, and
update the clk core so that the determine_rate() clk op is not required
when this flag is set.
This series adds the flag, some kunit tests, and updates all of the
relevant drivers under drivers/clk to use the new flag.
Once this is merged, and in Linus's tree, I can update the few remaining
clk drivers that are outside of drivers/clk via those subsystems at a
later time.
Merge Strategy
--------------
All of this needs to be directly merged by Stephen as one series into
his tree. Subsystem maintainers: please leave a Reviewed-by or Acked-by.
To reduce the noise, I am only CCing people on their respective drivers.
Note this series depends on 3 previously-posted patches in this git pull
to Stephen for v7.1.
https://lore.kernel.org/linux-clk/aZuK4-QJCXUeSxtL@redhat.com/
Hopefully I set the depeendencies up correctly in b4.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
Brian Masney (13):
clk: add new flag CLK_ROUNDING_FW_MANAGED
clk: test: add test suite for CLK_ROUNDING_FW_MANAGED flag
clk: rp1: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: scpi: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: hisilicon: hi3660-stub: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: imx: scu: drop redundant init.ops variable assignment
clk: imx: scu: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpmh: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: smd-rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: renesas: rzg2l-cpg: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: samsung: acpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: sprd: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
drivers/clk/clk-rp1.c | 11 +----
drivers/clk/clk-scpi.c | 14 +-----
drivers/clk/clk.c | 24 ++++++++--
drivers/clk/clk_test.c | 85 +++++++++++++++++++++++++++++++++
drivers/clk/hisilicon/clk-hi3660-stub.c | 14 +-----
drivers/clk/imx/clk-scu.c | 23 +--------
drivers/clk/qcom/clk-rpm.c | 16 ++-----
drivers/clk/qcom/clk-rpmh.c | 8 +---
drivers/clk/qcom/clk-smd-rpm.c | 15 +-----
drivers/clk/renesas/rzg2l-cpg.c | 9 +---
drivers/clk/samsung/clk-acpm.c | 14 +-----
drivers/clk/sprd/pll.c | 7 ---
drivers/clk/sprd/pll.h | 2 +-
include/linux/clk-provider.h | 2 +
14 files changed, 123 insertions(+), 121 deletions(-)
---
base-commit: 7d6661873f6b54c75195780a40d66bad3d482d8f
change-id: 20260226-clk-det-rate-fw-managed-4b8d061f31be
prerequisite-patch-id: 59198edc95aca82a29327137ad2af82ec13295b6
prerequisite-patch-id: 8932e170649711d7a80c57784033a37faadd519b
prerequisite-patch-id: 91c7b1851c5d77e504c49ce6bf14b3f8b84e826a
Best regards,
--
Brian Masney <bmasney@redhat.com>
| null | null | null | [PATCH 00/13] clk: add new flag CLK_ROUNDING_FW_MANAGED | This clk driver has a noop determine_rate clk op. Drop this empty
function, and enable the CLK_ROUNDING_FW_MANAGED flag.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
To: Abel Vesa <abelvesa@kernel.org>
To: Michael Turquette <mturquette@baylibre.com>
To: Stephen Boyd <sboyd@kernel.org>
To: Frank Li <Frank.Li@nxp.com>
To: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: linux-clk@vger.kernel.org
Cc: imx@lists.linux.dev
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
---
drivers/clk/imx/clk-scu.c | 22 +---------------------
1 file changed, 1 insertion(+), 21 deletions(-)
diff --git a/drivers/clk/imx/clk-scu.c b/drivers/clk/imx/clk-scu.c
index a39c68d664655537e81df55c7e6d32304de9338a..db8e5773140a7f5fcb3b36f372e22f43675ee6ad 100644
--- a/drivers/clk/imx/clk-scu.c
+++ b/drivers/clk/imx/clk-scu.c
@@ -262,23 +262,6 @@ static unsigned long clk_scu_recalc_rate(struct clk_hw *hw,
return le32_to_cpu(msg.data.resp.rate);
}
-/*
- * clk_scu_determine_rate - Returns the closest rate for a SCU clock
- * @hw: clock to round rate for
- * @req: clock rate request
- *
- * Returns 0 on success, a negative error on failure
- */
-static int clk_scu_determine_rate(struct clk_hw *hw,
- struct clk_rate_request *req)
-{
- /*
- * Assume we support all the requested rate and let the SCU firmware
- * to handle the left work
- */
- return 0;
-}
-
static int clk_scu_atf_set_cpu_rate(struct clk_hw *hw, unsigned long rate,
unsigned long parent_rate)
{
@@ -436,7 +419,6 @@ static void clk_scu_unprepare(struct clk_hw *hw)
static const struct clk_ops clk_scu_ops = {
.recalc_rate = clk_scu_recalc_rate,
- .determine_rate = clk_scu_determine_rate,
.set_rate = clk_scu_set_rate,
.get_parent = clk_scu_get_parent,
.set_parent = clk_scu_set_parent,
@@ -446,7 +428,6 @@ static const struct clk_ops clk_scu_ops = {
static const struct clk_ops clk_scu_cpu_ops = {
.recalc_rate = clk_scu_recalc_rate,
- .determine_rate = clk_scu_determine_rate,
.set_rate = clk_scu_atf_set_cpu_rate,
.prepare = clk_scu_prepare,
.unprepare = clk_scu_unprepare,
@@ -454,7 +435,6 @@ static const struct clk_ops clk_scu_cpu_ops = {
static const struct clk_ops clk_scu_pi_ops = {
.recalc_rate = clk_scu_recalc_rate,
- .determine_rate = clk_scu_determine_rate,
.set_rate = clk_scu_set_rate,
};
@@ -491,7 +471,7 @@ struct clk_hw *__imx_clk_scu(struct device *dev, const char *name,
* clock status from HW instead of using the possible invalid
* cached rate.
*/
- init.flags = CLK_GET_RATE_NOCACHE;
+ init.flags = CLK_GET_RATE_NOCACHE | CLK_ROUNDING_FW_MANAGED;
clk->hw.init = &init;
hw = &clk->hw;
--
2.53.0 | {
"author": "Brian Masney <bmasney@redhat.com>",
"date": "Thu, 26 Feb 2026 13:16:51 -0500",
"is_openbsd": false,
"thread_id": "20260226-clk-det-rate-fw-managed-v1-0-4421dd2f6dc6@redhat.com.mbox.gz"
} |
lkml_critique | lkml | There are some clocks where the rounding is managed by the hardware, and
the determine_rate() clk ops is just a noop that simply returns 0. Based
on discussions with Stephen at Linux Plumbers Conference, he suggested
adding a flag for this particular case. So let's add a new flag, and
update the clk core so that the determine_rate() clk op is not required
when this flag is set.
This series adds the flag, some kunit tests, and updates all of the
relevant drivers under drivers/clk to use the new flag.
Once this is merged, and in Linus's tree, I can update the few remaining
clk drivers that are outside of drivers/clk via those subsystems at a
later time.
Merge Strategy
--------------
All of this needs to be directly merged by Stephen as one series into
his tree. Subsystem maintainers: please leave a Reviewed-by or Acked-by.
To reduce the noise, I am only CCing people on their respective drivers.
Note this series depends on 3 previously-posted patches in this git pull
to Stephen for v7.1.
https://lore.kernel.org/linux-clk/aZuK4-QJCXUeSxtL@redhat.com/
Hopefully I set the depeendencies up correctly in b4.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
Brian Masney (13):
clk: add new flag CLK_ROUNDING_FW_MANAGED
clk: test: add test suite for CLK_ROUNDING_FW_MANAGED flag
clk: rp1: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: scpi: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: hisilicon: hi3660-stub: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: imx: scu: drop redundant init.ops variable assignment
clk: imx: scu: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpmh: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: smd-rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: renesas: rzg2l-cpg: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: samsung: acpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: sprd: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
drivers/clk/clk-rp1.c | 11 +----
drivers/clk/clk-scpi.c | 14 +-----
drivers/clk/clk.c | 24 ++++++++--
drivers/clk/clk_test.c | 85 +++++++++++++++++++++++++++++++++
drivers/clk/hisilicon/clk-hi3660-stub.c | 14 +-----
drivers/clk/imx/clk-scu.c | 23 +--------
drivers/clk/qcom/clk-rpm.c | 16 ++-----
drivers/clk/qcom/clk-rpmh.c | 8 +---
drivers/clk/qcom/clk-smd-rpm.c | 15 +-----
drivers/clk/renesas/rzg2l-cpg.c | 9 +---
drivers/clk/samsung/clk-acpm.c | 14 +-----
drivers/clk/sprd/pll.c | 7 ---
drivers/clk/sprd/pll.h | 2 +-
include/linux/clk-provider.h | 2 +
14 files changed, 123 insertions(+), 121 deletions(-)
---
base-commit: 7d6661873f6b54c75195780a40d66bad3d482d8f
change-id: 20260226-clk-det-rate-fw-managed-4b8d061f31be
prerequisite-patch-id: 59198edc95aca82a29327137ad2af82ec13295b6
prerequisite-patch-id: 8932e170649711d7a80c57784033a37faadd519b
prerequisite-patch-id: 91c7b1851c5d77e504c49ce6bf14b3f8b84e826a
Best regards,
--
Brian Masney <bmasney@redhat.com>
| null | null | null | [PATCH 00/13] clk: add new flag CLK_ROUNDING_FW_MANAGED | This clk driver has a noop determine_rate clk op. Drop this empty
function, and enable the CLK_ROUNDING_FW_MANAGED flag.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
To: Bjorn Andersson <andersson@kernel.org>
To: Michael Turquette <mturquette@baylibre.com>
To: Stephen Boyd <sboyd@kernel.org>
Cc: linux-arm-msm@vger.kernel.org
Cc: linux-clk@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
drivers/clk/qcom/clk-rpm.c | 16 +++-------------
1 file changed, 3 insertions(+), 13 deletions(-)
diff --git a/drivers/clk/qcom/clk-rpm.c b/drivers/clk/qcom/clk-rpm.c
index be0145631197bea65438f3bed10344f18d6de802..7875cd1815f524572f630242e3b71ff0810cdeda 100644
--- a/drivers/clk/qcom/clk-rpm.c
+++ b/drivers/clk/qcom/clk-rpm.c
@@ -42,6 +42,7 @@ static const struct clk_parent_data gcc_cxo[] = {
.name = #_name "_clk", \
.parent_data = gcc_pxo, \
.num_parents = ARRAY_SIZE(gcc_pxo), \
+ .flags = CLK_ROUNDING_FW_MANAGED, \
}, \
}; \
static struct clk_rpm clk_rpm_##_name##_a_clk = { \
@@ -54,6 +55,7 @@ static const struct clk_parent_data gcc_cxo[] = {
.name = #_name "_a_clk", \
.parent_data = gcc_pxo, \
.num_parents = ARRAY_SIZE(gcc_pxo), \
+ .flags = CLK_ROUNDING_FW_MANAGED, \
}, \
}
@@ -78,6 +80,7 @@ static const struct clk_parent_data gcc_cxo[] = {
.name = #_name "_clk", \
.parent_data = gcc_pxo, \
.num_parents = ARRAY_SIZE(gcc_pxo), \
+ .flags = CLK_ROUNDING_FW_MANAGED, \
}, \
}
@@ -351,17 +354,6 @@ static int clk_rpm_set_rate(struct clk_hw *hw,
return 0;
}
-static int clk_rpm_determine_rate(struct clk_hw *hw,
- struct clk_rate_request *req)
-{
- /*
- * RPM handles rate rounding and we don't have a way to
- * know what the rate will be, so just return whatever
- * rate is requested.
- */
- return 0;
-}
-
static unsigned long clk_rpm_recalc_rate(struct clk_hw *hw,
unsigned long parent_rate)
{
@@ -383,7 +375,6 @@ static const struct clk_ops clk_rpm_xo_ops = {
static const struct clk_ops clk_rpm_fixed_ops = {
.prepare = clk_rpm_fixed_prepare,
.unprepare = clk_rpm_fixed_unprepare,
- .determine_rate = clk_rpm_determine_rate,
.recalc_rate = clk_rpm_recalc_rate,
};
@@ -391,7 +382,6 @@ static const struct clk_ops clk_rpm_ops = {
.prepare = clk_rpm_prepare,
.unprepare = clk_rpm_unprepare,
.set_rate = clk_rpm_set_rate,
- .determine_rate = clk_rpm_determine_rate,
.recalc_rate = clk_rpm_recalc_rate,
};
--
2.53.0 | {
"author": "Brian Masney <bmasney@redhat.com>",
"date": "Thu, 26 Feb 2026 13:16:52 -0500",
"is_openbsd": false,
"thread_id": "20260226-clk-det-rate-fw-managed-v1-0-4421dd2f6dc6@redhat.com.mbox.gz"
} |
lkml_critique | lkml | There are some clocks where the rounding is managed by the hardware, and
the determine_rate() clk ops is just a noop that simply returns 0. Based
on discussions with Stephen at Linux Plumbers Conference, he suggested
adding a flag for this particular case. So let's add a new flag, and
update the clk core so that the determine_rate() clk op is not required
when this flag is set.
This series adds the flag, some kunit tests, and updates all of the
relevant drivers under drivers/clk to use the new flag.
Once this is merged, and in Linus's tree, I can update the few remaining
clk drivers that are outside of drivers/clk via those subsystems at a
later time.
Merge Strategy
--------------
All of this needs to be directly merged by Stephen as one series into
his tree. Subsystem maintainers: please leave a Reviewed-by or Acked-by.
To reduce the noise, I am only CCing people on their respective drivers.
Note this series depends on 3 previously-posted patches in this git pull
to Stephen for v7.1.
https://lore.kernel.org/linux-clk/aZuK4-QJCXUeSxtL@redhat.com/
Hopefully I set the depeendencies up correctly in b4.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
Brian Masney (13):
clk: add new flag CLK_ROUNDING_FW_MANAGED
clk: test: add test suite for CLK_ROUNDING_FW_MANAGED flag
clk: rp1: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: scpi: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: hisilicon: hi3660-stub: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: imx: scu: drop redundant init.ops variable assignment
clk: imx: scu: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpmh: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: smd-rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: renesas: rzg2l-cpg: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: samsung: acpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: sprd: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
drivers/clk/clk-rp1.c | 11 +----
drivers/clk/clk-scpi.c | 14 +-----
drivers/clk/clk.c | 24 ++++++++--
drivers/clk/clk_test.c | 85 +++++++++++++++++++++++++++++++++
drivers/clk/hisilicon/clk-hi3660-stub.c | 14 +-----
drivers/clk/imx/clk-scu.c | 23 +--------
drivers/clk/qcom/clk-rpm.c | 16 ++-----
drivers/clk/qcom/clk-rpmh.c | 8 +---
drivers/clk/qcom/clk-smd-rpm.c | 15 +-----
drivers/clk/renesas/rzg2l-cpg.c | 9 +---
drivers/clk/samsung/clk-acpm.c | 14 +-----
drivers/clk/sprd/pll.c | 7 ---
drivers/clk/sprd/pll.h | 2 +-
include/linux/clk-provider.h | 2 +
14 files changed, 123 insertions(+), 121 deletions(-)
---
base-commit: 7d6661873f6b54c75195780a40d66bad3d482d8f
change-id: 20260226-clk-det-rate-fw-managed-4b8d061f31be
prerequisite-patch-id: 59198edc95aca82a29327137ad2af82ec13295b6
prerequisite-patch-id: 8932e170649711d7a80c57784033a37faadd519b
prerequisite-patch-id: 91c7b1851c5d77e504c49ce6bf14b3f8b84e826a
Best regards,
--
Brian Masney <bmasney@redhat.com>
| null | null | null | [PATCH 00/13] clk: add new flag CLK_ROUNDING_FW_MANAGED | This clk driver has a noop determine_rate clk op. Drop this empty
function, and enable the CLK_ROUNDING_FW_MANAGED flag.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
To: Bjorn Andersson <andersson@kernel.org>
To: Michael Turquette <mturquette@baylibre.com>
To: Stephen Boyd <sboyd@kernel.org>
Cc: linux-arm-msm@vger.kernel.org
Cc: linux-clk@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
drivers/clk/qcom/clk-rpmh.c | 8 +-------
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/drivers/clk/qcom/clk-rpmh.c b/drivers/clk/qcom/clk-rpmh.c
index 547729b1a8ee01cf28c11ee8c4bd2f36d7536e6d..18fc94e6b98713e6aaf20a6d6144234f435d07a4 100644
--- a/drivers/clk/qcom/clk-rpmh.c
+++ b/drivers/clk/qcom/clk-rpmh.c
@@ -129,6 +129,7 @@ static DEFINE_MUTEX(rpmh_clk_lock);
.hw.init = &(struct clk_init_data){ \
.ops = &clk_rpmh_bcm_ops, \
.name = #_name, \
+ .flags = CLK_ROUNDING_FW_MANAGED, \
}, \
}
@@ -321,12 +322,6 @@ static int clk_rpmh_bcm_set_rate(struct clk_hw *hw, unsigned long rate,
return 0;
}
-static int clk_rpmh_determine_rate(struct clk_hw *hw,
- struct clk_rate_request *req)
-{
- return 0;
-}
-
static unsigned long clk_rpmh_bcm_recalc_rate(struct clk_hw *hw,
unsigned long prate)
{
@@ -339,7 +334,6 @@ static const struct clk_ops clk_rpmh_bcm_ops = {
.prepare = clk_rpmh_bcm_prepare,
.unprepare = clk_rpmh_bcm_unprepare,
.set_rate = clk_rpmh_bcm_set_rate,
- .determine_rate = clk_rpmh_determine_rate,
.recalc_rate = clk_rpmh_bcm_recalc_rate,
};
--
2.53.0 | {
"author": "Brian Masney <bmasney@redhat.com>",
"date": "Thu, 26 Feb 2026 13:16:53 -0500",
"is_openbsd": false,
"thread_id": "20260226-clk-det-rate-fw-managed-v1-0-4421dd2f6dc6@redhat.com.mbox.gz"
} |
lkml_critique | lkml | There are some clocks where the rounding is managed by the hardware, and
the determine_rate() clk ops is just a noop that simply returns 0. Based
on discussions with Stephen at Linux Plumbers Conference, he suggested
adding a flag for this particular case. So let's add a new flag, and
update the clk core so that the determine_rate() clk op is not required
when this flag is set.
This series adds the flag, some kunit tests, and updates all of the
relevant drivers under drivers/clk to use the new flag.
Once this is merged, and in Linus's tree, I can update the few remaining
clk drivers that are outside of drivers/clk via those subsystems at a
later time.
Merge Strategy
--------------
All of this needs to be directly merged by Stephen as one series into
his tree. Subsystem maintainers: please leave a Reviewed-by or Acked-by.
To reduce the noise, I am only CCing people on their respective drivers.
Note this series depends on 3 previously-posted patches in this git pull
to Stephen for v7.1.
https://lore.kernel.org/linux-clk/aZuK4-QJCXUeSxtL@redhat.com/
Hopefully I set the depeendencies up correctly in b4.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
Brian Masney (13):
clk: add new flag CLK_ROUNDING_FW_MANAGED
clk: test: add test suite for CLK_ROUNDING_FW_MANAGED flag
clk: rp1: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: scpi: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: hisilicon: hi3660-stub: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: imx: scu: drop redundant init.ops variable assignment
clk: imx: scu: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpmh: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: smd-rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: renesas: rzg2l-cpg: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: samsung: acpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: sprd: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
drivers/clk/clk-rp1.c | 11 +----
drivers/clk/clk-scpi.c | 14 +-----
drivers/clk/clk.c | 24 ++++++++--
drivers/clk/clk_test.c | 85 +++++++++++++++++++++++++++++++++
drivers/clk/hisilicon/clk-hi3660-stub.c | 14 +-----
drivers/clk/imx/clk-scu.c | 23 +--------
drivers/clk/qcom/clk-rpm.c | 16 ++-----
drivers/clk/qcom/clk-rpmh.c | 8 +---
drivers/clk/qcom/clk-smd-rpm.c | 15 +-----
drivers/clk/renesas/rzg2l-cpg.c | 9 +---
drivers/clk/samsung/clk-acpm.c | 14 +-----
drivers/clk/sprd/pll.c | 7 ---
drivers/clk/sprd/pll.h | 2 +-
include/linux/clk-provider.h | 2 +
14 files changed, 123 insertions(+), 121 deletions(-)
---
base-commit: 7d6661873f6b54c75195780a40d66bad3d482d8f
change-id: 20260226-clk-det-rate-fw-managed-4b8d061f31be
prerequisite-patch-id: 59198edc95aca82a29327137ad2af82ec13295b6
prerequisite-patch-id: 8932e170649711d7a80c57784033a37faadd519b
prerequisite-patch-id: 91c7b1851c5d77e504c49ce6bf14b3f8b84e826a
Best regards,
--
Brian Masney <bmasney@redhat.com>
| null | null | null | [PATCH 00/13] clk: add new flag CLK_ROUNDING_FW_MANAGED | This clk driver has a noop determine_rate clk op. Drop this empty
function, and enable the CLK_ROUNDING_FW_MANAGED flag.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
To: Bjorn Andersson <andersson@kernel.org>
To: Michael Turquette <mturquette@baylibre.com>
To: Stephen Boyd <sboyd@kernel.org>
Cc: linux-arm-msm@vger.kernel.org
Cc: linux-clk@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
drivers/clk/qcom/clk-smd-rpm.c | 15 ++-------------
1 file changed, 2 insertions(+), 13 deletions(-)
diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c
index 103db984a40b950bd33fba668a292be46af6326e..96af781195a23d8b56e2b977811a3304a452e1cb 100644
--- a/drivers/clk/qcom/clk-smd-rpm.c
+++ b/drivers/clk/qcom/clk-smd-rpm.c
@@ -35,6 +35,7 @@
.name = "xo_board", \
}, \
.num_parents = 1, \
+ .flags = CLK_ROUNDING_FW_MANAGED, \
}, \
}; \
static struct clk_smd_rpm clk_smd_rpm_##_prefix##_active = { \
@@ -52,7 +53,7 @@
.name = "xo_board", \
}, \
.num_parents = 1, \
- .flags = (ao_flags), \
+ .flags = (CLK_ROUNDING_FW_MANAGED | (ao_flags)), \
}, \
}
@@ -370,17 +371,6 @@ static int clk_smd_rpm_set_rate(struct clk_hw *hw, unsigned long rate,
return 0;
}
-static int clk_smd_rpm_determine_rate(struct clk_hw *hw,
- struct clk_rate_request *req)
-{
- /*
- * RPM handles rate rounding and we don't have a way to
- * know what the rate will be, so just return whatever
- * rate is requested.
- */
- return 0;
-}
-
static unsigned long clk_smd_rpm_recalc_rate(struct clk_hw *hw,
unsigned long parent_rate)
{
@@ -427,7 +417,6 @@ static const struct clk_ops clk_smd_rpm_ops = {
.prepare = clk_smd_rpm_prepare,
.unprepare = clk_smd_rpm_unprepare,
.set_rate = clk_smd_rpm_set_rate,
- .determine_rate = clk_smd_rpm_determine_rate,
.recalc_rate = clk_smd_rpm_recalc_rate,
};
--
2.53.0 | {
"author": "Brian Masney <bmasney@redhat.com>",
"date": "Thu, 26 Feb 2026 13:16:54 -0500",
"is_openbsd": false,
"thread_id": "20260226-clk-det-rate-fw-managed-v1-0-4421dd2f6dc6@redhat.com.mbox.gz"
} |
lkml_critique | lkml | There are some clocks where the rounding is managed by the hardware, and
the determine_rate() clk ops is just a noop that simply returns 0. Based
on discussions with Stephen at Linux Plumbers Conference, he suggested
adding a flag for this particular case. So let's add a new flag, and
update the clk core so that the determine_rate() clk op is not required
when this flag is set.
This series adds the flag, some kunit tests, and updates all of the
relevant drivers under drivers/clk to use the new flag.
Once this is merged, and in Linus's tree, I can update the few remaining
clk drivers that are outside of drivers/clk via those subsystems at a
later time.
Merge Strategy
--------------
All of this needs to be directly merged by Stephen as one series into
his tree. Subsystem maintainers: please leave a Reviewed-by or Acked-by.
To reduce the noise, I am only CCing people on their respective drivers.
Note this series depends on 3 previously-posted patches in this git pull
to Stephen for v7.1.
https://lore.kernel.org/linux-clk/aZuK4-QJCXUeSxtL@redhat.com/
Hopefully I set the depeendencies up correctly in b4.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
Brian Masney (13):
clk: add new flag CLK_ROUNDING_FW_MANAGED
clk: test: add test suite for CLK_ROUNDING_FW_MANAGED flag
clk: rp1: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: scpi: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: hisilicon: hi3660-stub: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: imx: scu: drop redundant init.ops variable assignment
clk: imx: scu: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpmh: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: smd-rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: renesas: rzg2l-cpg: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: samsung: acpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: sprd: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
drivers/clk/clk-rp1.c | 11 +----
drivers/clk/clk-scpi.c | 14 +-----
drivers/clk/clk.c | 24 ++++++++--
drivers/clk/clk_test.c | 85 +++++++++++++++++++++++++++++++++
drivers/clk/hisilicon/clk-hi3660-stub.c | 14 +-----
drivers/clk/imx/clk-scu.c | 23 +--------
drivers/clk/qcom/clk-rpm.c | 16 ++-----
drivers/clk/qcom/clk-rpmh.c | 8 +---
drivers/clk/qcom/clk-smd-rpm.c | 15 +-----
drivers/clk/renesas/rzg2l-cpg.c | 9 +---
drivers/clk/samsung/clk-acpm.c | 14 +-----
drivers/clk/sprd/pll.c | 7 ---
drivers/clk/sprd/pll.h | 2 +-
include/linux/clk-provider.h | 2 +
14 files changed, 123 insertions(+), 121 deletions(-)
---
base-commit: 7d6661873f6b54c75195780a40d66bad3d482d8f
change-id: 20260226-clk-det-rate-fw-managed-4b8d061f31be
prerequisite-patch-id: 59198edc95aca82a29327137ad2af82ec13295b6
prerequisite-patch-id: 8932e170649711d7a80c57784033a37faadd519b
prerequisite-patch-id: 91c7b1851c5d77e504c49ce6bf14b3f8b84e826a
Best regards,
--
Brian Masney <bmasney@redhat.com>
| null | null | null | [PATCH 00/13] clk: add new flag CLK_ROUNDING_FW_MANAGED | This clk driver has a noop determine_rate clk op. Drop this empty
function, and enable the CLK_ROUNDING_FW_MANAGED flag.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
To: Geert Uytterhoeven <geert+renesas@glider.be>
To: Michael Turquette <mturquette@baylibre.com>
To: Stephen Boyd <sboyd@kernel.org>
Cc: linux-renesas-soc@vger.kernel.org
Cc: linux-clk@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
drivers/clk/renesas/rzg2l-cpg.c | 9 +--------
1 file changed, 1 insertion(+), 8 deletions(-)
diff --git a/drivers/clk/renesas/rzg2l-cpg.c b/drivers/clk/renesas/rzg2l-cpg.c
index c0584bab58a3ba8a637e77662191f89a57bf1390..126398267e60d1f0fa7ababcb22a5c540884e810 100644
--- a/drivers/clk/renesas/rzg2l-cpg.c
+++ b/drivers/clk/renesas/rzg2l-cpg.c
@@ -938,12 +938,6 @@ static unsigned long rzg2l_cpg_sipll5_recalc_rate(struct clk_hw *hw,
return pll5_rate;
}
-static int rzg2l_cpg_sipll5_determine_rate(struct clk_hw *hw,
- struct clk_rate_request *req)
-{
- return 0;
-}
-
static int rzg2l_cpg_sipll5_set_rate(struct clk_hw *hw,
unsigned long rate,
unsigned long parent_rate)
@@ -1015,7 +1009,6 @@ static int rzg2l_cpg_sipll5_set_rate(struct clk_hw *hw,
static const struct clk_ops rzg2l_cpg_sipll5_ops = {
.recalc_rate = rzg2l_cpg_sipll5_recalc_rate,
- .determine_rate = rzg2l_cpg_sipll5_determine_rate,
.set_rate = rzg2l_cpg_sipll5_set_rate,
};
@@ -1041,7 +1034,7 @@ rzg2l_cpg_sipll5_register(const struct cpg_core_clk *core,
init.name = core->name;
parent_name = __clk_get_name(parent);
init.ops = &rzg2l_cpg_sipll5_ops;
- init.flags = 0;
+ init.flags = CLK_ROUNDING_FW_MANAGED;
init.parent_names = &parent_name;
init.num_parents = 1;
--
2.53.0 | {
"author": "Brian Masney <bmasney@redhat.com>",
"date": "Thu, 26 Feb 2026 13:16:55 -0500",
"is_openbsd": false,
"thread_id": "20260226-clk-det-rate-fw-managed-v1-0-4421dd2f6dc6@redhat.com.mbox.gz"
} |
lkml_critique | lkml | There are some clocks where the rounding is managed by the hardware, and
the determine_rate() clk ops is just a noop that simply returns 0. Based
on discussions with Stephen at Linux Plumbers Conference, he suggested
adding a flag for this particular case. So let's add a new flag, and
update the clk core so that the determine_rate() clk op is not required
when this flag is set.
This series adds the flag, some kunit tests, and updates all of the
relevant drivers under drivers/clk to use the new flag.
Once this is merged, and in Linus's tree, I can update the few remaining
clk drivers that are outside of drivers/clk via those subsystems at a
later time.
Merge Strategy
--------------
All of this needs to be directly merged by Stephen as one series into
his tree. Subsystem maintainers: please leave a Reviewed-by or Acked-by.
To reduce the noise, I am only CCing people on their respective drivers.
Note this series depends on 3 previously-posted patches in this git pull
to Stephen for v7.1.
https://lore.kernel.org/linux-clk/aZuK4-QJCXUeSxtL@redhat.com/
Hopefully I set the depeendencies up correctly in b4.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
Brian Masney (13):
clk: add new flag CLK_ROUNDING_FW_MANAGED
clk: test: add test suite for CLK_ROUNDING_FW_MANAGED flag
clk: rp1: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: scpi: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: hisilicon: hi3660-stub: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: imx: scu: drop redundant init.ops variable assignment
clk: imx: scu: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpmh: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: smd-rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: renesas: rzg2l-cpg: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: samsung: acpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: sprd: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
drivers/clk/clk-rp1.c | 11 +----
drivers/clk/clk-scpi.c | 14 +-----
drivers/clk/clk.c | 24 ++++++++--
drivers/clk/clk_test.c | 85 +++++++++++++++++++++++++++++++++
drivers/clk/hisilicon/clk-hi3660-stub.c | 14 +-----
drivers/clk/imx/clk-scu.c | 23 +--------
drivers/clk/qcom/clk-rpm.c | 16 ++-----
drivers/clk/qcom/clk-rpmh.c | 8 +---
drivers/clk/qcom/clk-smd-rpm.c | 15 +-----
drivers/clk/renesas/rzg2l-cpg.c | 9 +---
drivers/clk/samsung/clk-acpm.c | 14 +-----
drivers/clk/sprd/pll.c | 7 ---
drivers/clk/sprd/pll.h | 2 +-
include/linux/clk-provider.h | 2 +
14 files changed, 123 insertions(+), 121 deletions(-)
---
base-commit: 7d6661873f6b54c75195780a40d66bad3d482d8f
change-id: 20260226-clk-det-rate-fw-managed-4b8d061f31be
prerequisite-patch-id: 59198edc95aca82a29327137ad2af82ec13295b6
prerequisite-patch-id: 8932e170649711d7a80c57784033a37faadd519b
prerequisite-patch-id: 91c7b1851c5d77e504c49ce6bf14b3f8b84e826a
Best regards,
--
Brian Masney <bmasney@redhat.com>
| null | null | null | [PATCH 00/13] clk: add new flag CLK_ROUNDING_FW_MANAGED | This clk driver has a noop determine_rate clk op. Drop this empty
function, and enable the CLK_ROUNDING_FW_MANAGED flag.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
To: Tudor Ambarus <tudor.ambarus@linaro.org>
To: Krzysztof Kozlowski <krzk@kernel.org>
To: Sylwester Nawrocki <s.nawrocki@samsung.com>
To: Chanwoo Choi <cw00.choi@samsung.com>
To: Michael Turquette <mturquette@baylibre.com>
To: Stephen Boyd <sboyd@kernel.org>
Cc: Alim Akhtar <alim.akhtar@samsung.com>
Cc: linux-kernel@vger.kernel.org
Cc: linux-samsung-soc@vger.kernel.org
Cc: linux-clk@vger.kernel.org
---
drivers/clk/samsung/clk-acpm.c | 14 +-------------
1 file changed, 1 insertion(+), 13 deletions(-)
diff --git a/drivers/clk/samsung/clk-acpm.c b/drivers/clk/samsung/clk-acpm.c
index b90809ce3f882c489114c9d7299417d7fe373749..e2dffbfcdf221e31a4302074475a42481d6a829b 100644
--- a/drivers/clk/samsung/clk-acpm.c
+++ b/drivers/clk/samsung/clk-acpm.c
@@ -72,18 +72,6 @@ static unsigned long acpm_clk_recalc_rate(struct clk_hw *hw,
clk->mbox_chan_id, clk->id);
}
-static int acpm_clk_determine_rate(struct clk_hw *hw,
- struct clk_rate_request *req)
-{
- /*
- * We can't figure out what rate it will be, so just return the
- * rate back to the caller. acpm_clk_recalc_rate() will be called
- * after the rate is set and we'll know what rate the clock is
- * running at then.
- */
- return 0;
-}
-
static int acpm_clk_set_rate(struct clk_hw *hw, unsigned long rate,
unsigned long parent_rate)
{
@@ -95,7 +83,6 @@ static int acpm_clk_set_rate(struct clk_hw *hw, unsigned long rate,
static const struct clk_ops acpm_clk_ops = {
.recalc_rate = acpm_clk_recalc_rate,
- .determine_rate = acpm_clk_determine_rate,
.set_rate = acpm_clk_set_rate,
};
@@ -106,6 +93,7 @@ static int acpm_clk_register(struct device *dev, struct acpm_clk *aclk,
init.name = name;
init.ops = &acpm_clk_ops;
+ init.flags = CLK_ROUNDING_FW_MANAGED;
aclk->hw.init = &init;
return devm_clk_hw_register(dev, &aclk->hw);
--
2.53.0 | {
"author": "Brian Masney <bmasney@redhat.com>",
"date": "Thu, 26 Feb 2026 13:16:56 -0500",
"is_openbsd": false,
"thread_id": "20260226-clk-det-rate-fw-managed-v1-0-4421dd2f6dc6@redhat.com.mbox.gz"
} |
lkml_critique | lkml | There are some clocks where the rounding is managed by the hardware, and
the determine_rate() clk ops is just a noop that simply returns 0. Based
on discussions with Stephen at Linux Plumbers Conference, he suggested
adding a flag for this particular case. So let's add a new flag, and
update the clk core so that the determine_rate() clk op is not required
when this flag is set.
This series adds the flag, some kunit tests, and updates all of the
relevant drivers under drivers/clk to use the new flag.
Once this is merged, and in Linus's tree, I can update the few remaining
clk drivers that are outside of drivers/clk via those subsystems at a
later time.
Merge Strategy
--------------
All of this needs to be directly merged by Stephen as one series into
his tree. Subsystem maintainers: please leave a Reviewed-by or Acked-by.
To reduce the noise, I am only CCing people on their respective drivers.
Note this series depends on 3 previously-posted patches in this git pull
to Stephen for v7.1.
https://lore.kernel.org/linux-clk/aZuK4-QJCXUeSxtL@redhat.com/
Hopefully I set the depeendencies up correctly in b4.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
Brian Masney (13):
clk: add new flag CLK_ROUNDING_FW_MANAGED
clk: test: add test suite for CLK_ROUNDING_FW_MANAGED flag
clk: rp1: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: scpi: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: hisilicon: hi3660-stub: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: imx: scu: drop redundant init.ops variable assignment
clk: imx: scu: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpmh: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: smd-rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: renesas: rzg2l-cpg: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: samsung: acpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: sprd: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
drivers/clk/clk-rp1.c | 11 +----
drivers/clk/clk-scpi.c | 14 +-----
drivers/clk/clk.c | 24 ++++++++--
drivers/clk/clk_test.c | 85 +++++++++++++++++++++++++++++++++
drivers/clk/hisilicon/clk-hi3660-stub.c | 14 +-----
drivers/clk/imx/clk-scu.c | 23 +--------
drivers/clk/qcom/clk-rpm.c | 16 ++-----
drivers/clk/qcom/clk-rpmh.c | 8 +---
drivers/clk/qcom/clk-smd-rpm.c | 15 +-----
drivers/clk/renesas/rzg2l-cpg.c | 9 +---
drivers/clk/samsung/clk-acpm.c | 14 +-----
drivers/clk/sprd/pll.c | 7 ---
drivers/clk/sprd/pll.h | 2 +-
include/linux/clk-provider.h | 2 +
14 files changed, 123 insertions(+), 121 deletions(-)
---
base-commit: 7d6661873f6b54c75195780a40d66bad3d482d8f
change-id: 20260226-clk-det-rate-fw-managed-4b8d061f31be
prerequisite-patch-id: 59198edc95aca82a29327137ad2af82ec13295b6
prerequisite-patch-id: 8932e170649711d7a80c57784033a37faadd519b
prerequisite-patch-id: 91c7b1851c5d77e504c49ce6bf14b3f8b84e826a
Best regards,
--
Brian Masney <bmasney@redhat.com>
| null | null | null | [PATCH 00/13] clk: add new flag CLK_ROUNDING_FW_MANAGED | This clk driver has a noop determine_rate clk op. Drop this empty
function, and enable the CLK_ROUNDING_FW_MANAGED flag.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
To: Michael Turquette <mturquette@baylibre.com>
To: Stephen Boyd <sboyd@kernel.org>
To: Orson Zhai <orsonzhai@gmail.com>
To: Baolin Wang <baolin.wang@linux.alibaba.com>
Cc: Chunyan Zhang <zhang.lyra@gmail.com>
Cc: linux-clk@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
drivers/clk/sprd/pll.c | 7 -------
drivers/clk/sprd/pll.h | 2 +-
2 files changed, 1 insertion(+), 8 deletions(-)
diff --git a/drivers/clk/sprd/pll.c b/drivers/clk/sprd/pll.c
index bc2db19aec0e9d64bac039260b2fbeacaa61d660..31f016030da371c9fe842eab01f6a1b7043b82f1 100644
--- a/drivers/clk/sprd/pll.c
+++ b/drivers/clk/sprd/pll.c
@@ -254,16 +254,9 @@ static int sprd_pll_clk_prepare(struct clk_hw *hw)
return 0;
}
-static int sprd_pll_determine_rate(struct clk_hw *hw,
- struct clk_rate_request *req)
-{
- return 0;
-}
-
const struct clk_ops sprd_pll_ops = {
.prepare = sprd_pll_clk_prepare,
.recalc_rate = sprd_pll_recalc_rate,
- .determine_rate = sprd_pll_determine_rate,
.set_rate = sprd_pll_set_rate,
};
EXPORT_SYMBOL_GPL(sprd_pll_ops);
diff --git a/drivers/clk/sprd/pll.h b/drivers/clk/sprd/pll.h
index 6558f50d0296bc2acd43b031e3927c288434fc08..b35f3e13799e93cff9cb184f5a54f862a6756f0f 100644
--- a/drivers/clk/sprd/pll.h
+++ b/drivers/clk/sprd/pll.h
@@ -78,7 +78,7 @@ struct sprd_pll {
.regmap = NULL, \
.reg = _reg, \
.hw.init = _fn(_name, _parent, \
- &sprd_pll_ops, 0),\
+ &sprd_pll_ops, CLK_ROUNDING_FW_MANAGED), \
}, \
}
--
2.53.0 | {
"author": "Brian Masney <bmasney@redhat.com>",
"date": "Thu, 26 Feb 2026 13:16:57 -0500",
"is_openbsd": false,
"thread_id": "20260226-clk-det-rate-fw-managed-v1-0-4421dd2f6dc6@redhat.com.mbox.gz"
} |
lkml_critique | lkml | There are some clocks where the rounding is managed by the hardware, and
the determine_rate() clk ops is just a noop that simply returns 0. Based
on discussions with Stephen at Linux Plumbers Conference, he suggested
adding a flag for this particular case. So let's add a new flag, and
update the clk core so that the determine_rate() clk op is not required
when this flag is set.
This series adds the flag, some kunit tests, and updates all of the
relevant drivers under drivers/clk to use the new flag.
Once this is merged, and in Linus's tree, I can update the few remaining
clk drivers that are outside of drivers/clk via those subsystems at a
later time.
Merge Strategy
--------------
All of this needs to be directly merged by Stephen as one series into
his tree. Subsystem maintainers: please leave a Reviewed-by or Acked-by.
To reduce the noise, I am only CCing people on their respective drivers.
Note this series depends on 3 previously-posted patches in this git pull
to Stephen for v7.1.
https://lore.kernel.org/linux-clk/aZuK4-QJCXUeSxtL@redhat.com/
Hopefully I set the depeendencies up correctly in b4.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
Brian Masney (13):
clk: add new flag CLK_ROUNDING_FW_MANAGED
clk: test: add test suite for CLK_ROUNDING_FW_MANAGED flag
clk: rp1: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: scpi: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: hisilicon: hi3660-stub: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: imx: scu: drop redundant init.ops variable assignment
clk: imx: scu: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpmh: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: smd-rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: renesas: rzg2l-cpg: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: samsung: acpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: sprd: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
drivers/clk/clk-rp1.c | 11 +----
drivers/clk/clk-scpi.c | 14 +-----
drivers/clk/clk.c | 24 ++++++++--
drivers/clk/clk_test.c | 85 +++++++++++++++++++++++++++++++++
drivers/clk/hisilicon/clk-hi3660-stub.c | 14 +-----
drivers/clk/imx/clk-scu.c | 23 +--------
drivers/clk/qcom/clk-rpm.c | 16 ++-----
drivers/clk/qcom/clk-rpmh.c | 8 +---
drivers/clk/qcom/clk-smd-rpm.c | 15 +-----
drivers/clk/renesas/rzg2l-cpg.c | 9 +---
drivers/clk/samsung/clk-acpm.c | 14 +-----
drivers/clk/sprd/pll.c | 7 ---
drivers/clk/sprd/pll.h | 2 +-
include/linux/clk-provider.h | 2 +
14 files changed, 123 insertions(+), 121 deletions(-)
---
base-commit: 7d6661873f6b54c75195780a40d66bad3d482d8f
change-id: 20260226-clk-det-rate-fw-managed-4b8d061f31be
prerequisite-patch-id: 59198edc95aca82a29327137ad2af82ec13295b6
prerequisite-patch-id: 8932e170649711d7a80c57784033a37faadd519b
prerequisite-patch-id: 91c7b1851c5d77e504c49ce6bf14b3f8b84e826a
Best regards,
--
Brian Masney <bmasney@redhat.com>
| null | null | null | [PATCH 00/13] clk: add new flag CLK_ROUNDING_FW_MANAGED | On Thu, Feb 26, 2026 at 01:16:52PM -0500, Brian Masney wrote:
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
--
With best wishes
Dmitry | {
"author": "Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>",
"date": "Fri, 27 Feb 2026 02:07:20 +0200",
"is_openbsd": false,
"thread_id": "20260226-clk-det-rate-fw-managed-v1-0-4421dd2f6dc6@redhat.com.mbox.gz"
} |
lkml_critique | lkml | There are some clocks where the rounding is managed by the hardware, and
the determine_rate() clk ops is just a noop that simply returns 0. Based
on discussions with Stephen at Linux Plumbers Conference, he suggested
adding a flag for this particular case. So let's add a new flag, and
update the clk core so that the determine_rate() clk op is not required
when this flag is set.
This series adds the flag, some kunit tests, and updates all of the
relevant drivers under drivers/clk to use the new flag.
Once this is merged, and in Linus's tree, I can update the few remaining
clk drivers that are outside of drivers/clk via those subsystems at a
later time.
Merge Strategy
--------------
All of this needs to be directly merged by Stephen as one series into
his tree. Subsystem maintainers: please leave a Reviewed-by or Acked-by.
To reduce the noise, I am only CCing people on their respective drivers.
Note this series depends on 3 previously-posted patches in this git pull
to Stephen for v7.1.
https://lore.kernel.org/linux-clk/aZuK4-QJCXUeSxtL@redhat.com/
Hopefully I set the depeendencies up correctly in b4.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
Brian Masney (13):
clk: add new flag CLK_ROUNDING_FW_MANAGED
clk: test: add test suite for CLK_ROUNDING_FW_MANAGED flag
clk: rp1: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: scpi: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: hisilicon: hi3660-stub: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: imx: scu: drop redundant init.ops variable assignment
clk: imx: scu: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpmh: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: smd-rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: renesas: rzg2l-cpg: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: samsung: acpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: sprd: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
drivers/clk/clk-rp1.c | 11 +----
drivers/clk/clk-scpi.c | 14 +-----
drivers/clk/clk.c | 24 ++++++++--
drivers/clk/clk_test.c | 85 +++++++++++++++++++++++++++++++++
drivers/clk/hisilicon/clk-hi3660-stub.c | 14 +-----
drivers/clk/imx/clk-scu.c | 23 +--------
drivers/clk/qcom/clk-rpm.c | 16 ++-----
drivers/clk/qcom/clk-rpmh.c | 8 +---
drivers/clk/qcom/clk-smd-rpm.c | 15 +-----
drivers/clk/renesas/rzg2l-cpg.c | 9 +---
drivers/clk/samsung/clk-acpm.c | 14 +-----
drivers/clk/sprd/pll.c | 7 ---
drivers/clk/sprd/pll.h | 2 +-
include/linux/clk-provider.h | 2 +
14 files changed, 123 insertions(+), 121 deletions(-)
---
base-commit: 7d6661873f6b54c75195780a40d66bad3d482d8f
change-id: 20260226-clk-det-rate-fw-managed-4b8d061f31be
prerequisite-patch-id: 59198edc95aca82a29327137ad2af82ec13295b6
prerequisite-patch-id: 8932e170649711d7a80c57784033a37faadd519b
prerequisite-patch-id: 91c7b1851c5d77e504c49ce6bf14b3f8b84e826a
Best regards,
--
Brian Masney <bmasney@redhat.com>
| null | null | null | [PATCH 00/13] clk: add new flag CLK_ROUNDING_FW_MANAGED | On Thu, Feb 26, 2026 at 01:16:53PM -0500, Brian Masney wrote:
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
--
With best wishes
Dmitry | {
"author": "Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>",
"date": "Fri, 27 Feb 2026 02:12:57 +0200",
"is_openbsd": false,
"thread_id": "20260226-clk-det-rate-fw-managed-v1-0-4421dd2f6dc6@redhat.com.mbox.gz"
} |
lkml_critique | lkml | There are some clocks where the rounding is managed by the hardware, and
the determine_rate() clk ops is just a noop that simply returns 0. Based
on discussions with Stephen at Linux Plumbers Conference, he suggested
adding a flag for this particular case. So let's add a new flag, and
update the clk core so that the determine_rate() clk op is not required
when this flag is set.
This series adds the flag, some kunit tests, and updates all of the
relevant drivers under drivers/clk to use the new flag.
Once this is merged, and in Linus's tree, I can update the few remaining
clk drivers that are outside of drivers/clk via those subsystems at a
later time.
Merge Strategy
--------------
All of this needs to be directly merged by Stephen as one series into
his tree. Subsystem maintainers: please leave a Reviewed-by or Acked-by.
To reduce the noise, I am only CCing people on their respective drivers.
Note this series depends on 3 previously-posted patches in this git pull
to Stephen for v7.1.
https://lore.kernel.org/linux-clk/aZuK4-QJCXUeSxtL@redhat.com/
Hopefully I set the depeendencies up correctly in b4.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
Brian Masney (13):
clk: add new flag CLK_ROUNDING_FW_MANAGED
clk: test: add test suite for CLK_ROUNDING_FW_MANAGED flag
clk: rp1: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: scpi: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: hisilicon: hi3660-stub: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: imx: scu: drop redundant init.ops variable assignment
clk: imx: scu: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpmh: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: smd-rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: renesas: rzg2l-cpg: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: samsung: acpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: sprd: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
drivers/clk/clk-rp1.c | 11 +----
drivers/clk/clk-scpi.c | 14 +-----
drivers/clk/clk.c | 24 ++++++++--
drivers/clk/clk_test.c | 85 +++++++++++++++++++++++++++++++++
drivers/clk/hisilicon/clk-hi3660-stub.c | 14 +-----
drivers/clk/imx/clk-scu.c | 23 +--------
drivers/clk/qcom/clk-rpm.c | 16 ++-----
drivers/clk/qcom/clk-rpmh.c | 8 +---
drivers/clk/qcom/clk-smd-rpm.c | 15 +-----
drivers/clk/renesas/rzg2l-cpg.c | 9 +---
drivers/clk/samsung/clk-acpm.c | 14 +-----
drivers/clk/sprd/pll.c | 7 ---
drivers/clk/sprd/pll.h | 2 +-
include/linux/clk-provider.h | 2 +
14 files changed, 123 insertions(+), 121 deletions(-)
---
base-commit: 7d6661873f6b54c75195780a40d66bad3d482d8f
change-id: 20260226-clk-det-rate-fw-managed-4b8d061f31be
prerequisite-patch-id: 59198edc95aca82a29327137ad2af82ec13295b6
prerequisite-patch-id: 8932e170649711d7a80c57784033a37faadd519b
prerequisite-patch-id: 91c7b1851c5d77e504c49ce6bf14b3f8b84e826a
Best regards,
--
Brian Masney <bmasney@redhat.com>
| null | null | null | [PATCH 00/13] clk: add new flag CLK_ROUNDING_FW_MANAGED | On Thu, Feb 26, 2026 at 01:16:54PM -0500, Brian Masney wrote:
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
--
With best wishes
Dmitry | {
"author": "Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>",
"date": "Fri, 27 Feb 2026 02:13:14 +0200",
"is_openbsd": false,
"thread_id": "20260226-clk-det-rate-fw-managed-v1-0-4421dd2f6dc6@redhat.com.mbox.gz"
} |
lkml_critique | lkml | There are some clocks where the rounding is managed by the hardware, and
the determine_rate() clk ops is just a noop that simply returns 0. Based
on discussions with Stephen at Linux Plumbers Conference, he suggested
adding a flag for this particular case. So let's add a new flag, and
update the clk core so that the determine_rate() clk op is not required
when this flag is set.
This series adds the flag, some kunit tests, and updates all of the
relevant drivers under drivers/clk to use the new flag.
Once this is merged, and in Linus's tree, I can update the few remaining
clk drivers that are outside of drivers/clk via those subsystems at a
later time.
Merge Strategy
--------------
All of this needs to be directly merged by Stephen as one series into
his tree. Subsystem maintainers: please leave a Reviewed-by or Acked-by.
To reduce the noise, I am only CCing people on their respective drivers.
Note this series depends on 3 previously-posted patches in this git pull
to Stephen for v7.1.
https://lore.kernel.org/linux-clk/aZuK4-QJCXUeSxtL@redhat.com/
Hopefully I set the depeendencies up correctly in b4.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
Brian Masney (13):
clk: add new flag CLK_ROUNDING_FW_MANAGED
clk: test: add test suite for CLK_ROUNDING_FW_MANAGED flag
clk: rp1: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: scpi: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: hisilicon: hi3660-stub: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: imx: scu: drop redundant init.ops variable assignment
clk: imx: scu: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpmh: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: smd-rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: renesas: rzg2l-cpg: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: samsung: acpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: sprd: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
drivers/clk/clk-rp1.c | 11 +----
drivers/clk/clk-scpi.c | 14 +-----
drivers/clk/clk.c | 24 ++++++++--
drivers/clk/clk_test.c | 85 +++++++++++++++++++++++++++++++++
drivers/clk/hisilicon/clk-hi3660-stub.c | 14 +-----
drivers/clk/imx/clk-scu.c | 23 +--------
drivers/clk/qcom/clk-rpm.c | 16 ++-----
drivers/clk/qcom/clk-rpmh.c | 8 +---
drivers/clk/qcom/clk-smd-rpm.c | 15 +-----
drivers/clk/renesas/rzg2l-cpg.c | 9 +---
drivers/clk/samsung/clk-acpm.c | 14 +-----
drivers/clk/sprd/pll.c | 7 ---
drivers/clk/sprd/pll.h | 2 +-
include/linux/clk-provider.h | 2 +
14 files changed, 123 insertions(+), 121 deletions(-)
---
base-commit: 7d6661873f6b54c75195780a40d66bad3d482d8f
change-id: 20260226-clk-det-rate-fw-managed-4b8d061f31be
prerequisite-patch-id: 59198edc95aca82a29327137ad2af82ec13295b6
prerequisite-patch-id: 8932e170649711d7a80c57784033a37faadd519b
prerequisite-patch-id: 91c7b1851c5d77e504c49ce6bf14b3f8b84e826a
Best regards,
--
Brian Masney <bmasney@redhat.com>
| null | null | null | [PATCH 00/13] clk: add new flag CLK_ROUNDING_FW_MANAGED | On Thu, Feb 26, 2026 at 01:16:50PM -0500, Brian Masney wrote:
Reviewed-by: Peng Fan <peng.fan@nxp.com> | {
"author": "Peng Fan <peng.fan@oss.nxp.com>",
"date": "Fri, 27 Feb 2026 10:02:34 +0800",
"is_openbsd": false,
"thread_id": "20260226-clk-det-rate-fw-managed-v1-0-4421dd2f6dc6@redhat.com.mbox.gz"
} |
lkml_critique | lkml | There are some clocks where the rounding is managed by the hardware, and
the determine_rate() clk ops is just a noop that simply returns 0. Based
on discussions with Stephen at Linux Plumbers Conference, he suggested
adding a flag for this particular case. So let's add a new flag, and
update the clk core so that the determine_rate() clk op is not required
when this flag is set.
This series adds the flag, some kunit tests, and updates all of the
relevant drivers under drivers/clk to use the new flag.
Once this is merged, and in Linus's tree, I can update the few remaining
clk drivers that are outside of drivers/clk via those subsystems at a
later time.
Merge Strategy
--------------
All of this needs to be directly merged by Stephen as one series into
his tree. Subsystem maintainers: please leave a Reviewed-by or Acked-by.
To reduce the noise, I am only CCing people on their respective drivers.
Note this series depends on 3 previously-posted patches in this git pull
to Stephen for v7.1.
https://lore.kernel.org/linux-clk/aZuK4-QJCXUeSxtL@redhat.com/
Hopefully I set the depeendencies up correctly in b4.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
Brian Masney (13):
clk: add new flag CLK_ROUNDING_FW_MANAGED
clk: test: add test suite for CLK_ROUNDING_FW_MANAGED flag
clk: rp1: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: scpi: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: hisilicon: hi3660-stub: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: imx: scu: drop redundant init.ops variable assignment
clk: imx: scu: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpmh: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: smd-rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: renesas: rzg2l-cpg: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: samsung: acpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: sprd: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
drivers/clk/clk-rp1.c | 11 +----
drivers/clk/clk-scpi.c | 14 +-----
drivers/clk/clk.c | 24 ++++++++--
drivers/clk/clk_test.c | 85 +++++++++++++++++++++++++++++++++
drivers/clk/hisilicon/clk-hi3660-stub.c | 14 +-----
drivers/clk/imx/clk-scu.c | 23 +--------
drivers/clk/qcom/clk-rpm.c | 16 ++-----
drivers/clk/qcom/clk-rpmh.c | 8 +---
drivers/clk/qcom/clk-smd-rpm.c | 15 +-----
drivers/clk/renesas/rzg2l-cpg.c | 9 +---
drivers/clk/samsung/clk-acpm.c | 14 +-----
drivers/clk/sprd/pll.c | 7 ---
drivers/clk/sprd/pll.h | 2 +-
include/linux/clk-provider.h | 2 +
14 files changed, 123 insertions(+), 121 deletions(-)
---
base-commit: 7d6661873f6b54c75195780a40d66bad3d482d8f
change-id: 20260226-clk-det-rate-fw-managed-4b8d061f31be
prerequisite-patch-id: 59198edc95aca82a29327137ad2af82ec13295b6
prerequisite-patch-id: 8932e170649711d7a80c57784033a37faadd519b
prerequisite-patch-id: 91c7b1851c5d77e504c49ce6bf14b3f8b84e826a
Best regards,
--
Brian Masney <bmasney@redhat.com>
| null | null | null | [PATCH 00/13] clk: add new flag CLK_ROUNDING_FW_MANAGED | On Thu, Feb 26, 2026 at 01:16:51PM -0500, Brian Masney wrote:
Reviewed-by: Peng Fan <peng.fan@nxp.com> | {
"author": "Peng Fan <peng.fan@oss.nxp.com>",
"date": "Fri, 27 Feb 2026 10:04:22 +0800",
"is_openbsd": false,
"thread_id": "20260226-clk-det-rate-fw-managed-v1-0-4421dd2f6dc6@redhat.com.mbox.gz"
} |
lkml_critique | lkml | There are some clocks where the rounding is managed by the hardware, and
the determine_rate() clk ops is just a noop that simply returns 0. Based
on discussions with Stephen at Linux Plumbers Conference, he suggested
adding a flag for this particular case. So let's add a new flag, and
update the clk core so that the determine_rate() clk op is not required
when this flag is set.
This series adds the flag, some kunit tests, and updates all of the
relevant drivers under drivers/clk to use the new flag.
Once this is merged, and in Linus's tree, I can update the few remaining
clk drivers that are outside of drivers/clk via those subsystems at a
later time.
Merge Strategy
--------------
All of this needs to be directly merged by Stephen as one series into
his tree. Subsystem maintainers: please leave a Reviewed-by or Acked-by.
To reduce the noise, I am only CCing people on their respective drivers.
Note this series depends on 3 previously-posted patches in this git pull
to Stephen for v7.1.
https://lore.kernel.org/linux-clk/aZuK4-QJCXUeSxtL@redhat.com/
Hopefully I set the depeendencies up correctly in b4.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
Brian Masney (13):
clk: add new flag CLK_ROUNDING_FW_MANAGED
clk: test: add test suite for CLK_ROUNDING_FW_MANAGED flag
clk: rp1: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: scpi: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: hisilicon: hi3660-stub: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: imx: scu: drop redundant init.ops variable assignment
clk: imx: scu: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpmh: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: smd-rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: renesas: rzg2l-cpg: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: samsung: acpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: sprd: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
drivers/clk/clk-rp1.c | 11 +----
drivers/clk/clk-scpi.c | 14 +-----
drivers/clk/clk.c | 24 ++++++++--
drivers/clk/clk_test.c | 85 +++++++++++++++++++++++++++++++++
drivers/clk/hisilicon/clk-hi3660-stub.c | 14 +-----
drivers/clk/imx/clk-scu.c | 23 +--------
drivers/clk/qcom/clk-rpm.c | 16 ++-----
drivers/clk/qcom/clk-rpmh.c | 8 +---
drivers/clk/qcom/clk-smd-rpm.c | 15 +-----
drivers/clk/renesas/rzg2l-cpg.c | 9 +---
drivers/clk/samsung/clk-acpm.c | 14 +-----
drivers/clk/sprd/pll.c | 7 ---
drivers/clk/sprd/pll.h | 2 +-
include/linux/clk-provider.h | 2 +
14 files changed, 123 insertions(+), 121 deletions(-)
---
base-commit: 7d6661873f6b54c75195780a40d66bad3d482d8f
change-id: 20260226-clk-det-rate-fw-managed-4b8d061f31be
prerequisite-patch-id: 59198edc95aca82a29327137ad2af82ec13295b6
prerequisite-patch-id: 8932e170649711d7a80c57784033a37faadd519b
prerequisite-patch-id: 91c7b1851c5d77e504c49ce6bf14b3f8b84e826a
Best regards,
--
Brian Masney <bmasney@redhat.com>
| null | null | null | [PATCH 00/13] clk: add new flag CLK_ROUNDING_FW_MANAGED | Hi Brian,
Thanks for your patch!
On Thu, 26 Feb 2026 at 19:17, Brian Masney <bmasney@redhat.com> wrote:
s/hardware/firmware/
You got me totally confused, also/especially in the cover letter! ;-)
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds | {
"author": "Geert Uytterhoeven <geert@linux-m68k.org>",
"date": "Fri, 27 Feb 2026 09:16:57 +0100",
"is_openbsd": false,
"thread_id": "20260226-clk-det-rate-fw-managed-v1-0-4421dd2f6dc6@redhat.com.mbox.gz"
} |
lkml_critique | lkml | There are some clocks where the rounding is managed by the hardware, and
the determine_rate() clk ops is just a noop that simply returns 0. Based
on discussions with Stephen at Linux Plumbers Conference, he suggested
adding a flag for this particular case. So let's add a new flag, and
update the clk core so that the determine_rate() clk op is not required
when this flag is set.
This series adds the flag, some kunit tests, and updates all of the
relevant drivers under drivers/clk to use the new flag.
Once this is merged, and in Linus's tree, I can update the few remaining
clk drivers that are outside of drivers/clk via those subsystems at a
later time.
Merge Strategy
--------------
All of this needs to be directly merged by Stephen as one series into
his tree. Subsystem maintainers: please leave a Reviewed-by or Acked-by.
To reduce the noise, I am only CCing people on their respective drivers.
Note this series depends on 3 previously-posted patches in this git pull
to Stephen for v7.1.
https://lore.kernel.org/linux-clk/aZuK4-QJCXUeSxtL@redhat.com/
Hopefully I set the depeendencies up correctly in b4.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
Brian Masney (13):
clk: add new flag CLK_ROUNDING_FW_MANAGED
clk: test: add test suite for CLK_ROUNDING_FW_MANAGED flag
clk: rp1: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: scpi: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: hisilicon: hi3660-stub: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: imx: scu: drop redundant init.ops variable assignment
clk: imx: scu: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpmh: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: smd-rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: renesas: rzg2l-cpg: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: samsung: acpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: sprd: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
drivers/clk/clk-rp1.c | 11 +----
drivers/clk/clk-scpi.c | 14 +-----
drivers/clk/clk.c | 24 ++++++++--
drivers/clk/clk_test.c | 85 +++++++++++++++++++++++++++++++++
drivers/clk/hisilicon/clk-hi3660-stub.c | 14 +-----
drivers/clk/imx/clk-scu.c | 23 +--------
drivers/clk/qcom/clk-rpm.c | 16 ++-----
drivers/clk/qcom/clk-rpmh.c | 8 +---
drivers/clk/qcom/clk-smd-rpm.c | 15 +-----
drivers/clk/renesas/rzg2l-cpg.c | 9 +---
drivers/clk/samsung/clk-acpm.c | 14 +-----
drivers/clk/sprd/pll.c | 7 ---
drivers/clk/sprd/pll.h | 2 +-
include/linux/clk-provider.h | 2 +
14 files changed, 123 insertions(+), 121 deletions(-)
---
base-commit: 7d6661873f6b54c75195780a40d66bad3d482d8f
change-id: 20260226-clk-det-rate-fw-managed-4b8d061f31be
prerequisite-patch-id: 59198edc95aca82a29327137ad2af82ec13295b6
prerequisite-patch-id: 8932e170649711d7a80c57784033a37faadd519b
prerequisite-patch-id: 91c7b1851c5d77e504c49ce6bf14b3f8b84e826a
Best regards,
--
Brian Masney <bmasney@redhat.com>
| null | null | null | [PATCH 00/13] clk: add new flag CLK_ROUNDING_FW_MANAGED | Hi Brian,
C Biju
On Thu, 26 Feb 2026 at 19:18, Brian Masney <bmasney@redhat.com> wrote:
Thanks for your patch!
Iff this is the Right Thing To Do (TM), it needs a comment, as this
clock is not managed by firmware.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds | {
"author": "Geert Uytterhoeven <geert@linux-m68k.org>",
"date": "Fri, 27 Feb 2026 09:20:09 +0100",
"is_openbsd": false,
"thread_id": "20260226-clk-det-rate-fw-managed-v1-0-4421dd2f6dc6@redhat.com.mbox.gz"
} |
lkml_critique | lkml | There are some clocks where the rounding is managed by the hardware, and
the determine_rate() clk ops is just a noop that simply returns 0. Based
on discussions with Stephen at Linux Plumbers Conference, he suggested
adding a flag for this particular case. So let's add a new flag, and
update the clk core so that the determine_rate() clk op is not required
when this flag is set.
This series adds the flag, some kunit tests, and updates all of the
relevant drivers under drivers/clk to use the new flag.
Once this is merged, and in Linus's tree, I can update the few remaining
clk drivers that are outside of drivers/clk via those subsystems at a
later time.
Merge Strategy
--------------
All of this needs to be directly merged by Stephen as one series into
his tree. Subsystem maintainers: please leave a Reviewed-by or Acked-by.
To reduce the noise, I am only CCing people on their respective drivers.
Note this series depends on 3 previously-posted patches in this git pull
to Stephen for v7.1.
https://lore.kernel.org/linux-clk/aZuK4-QJCXUeSxtL@redhat.com/
Hopefully I set the depeendencies up correctly in b4.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
Brian Masney (13):
clk: add new flag CLK_ROUNDING_FW_MANAGED
clk: test: add test suite for CLK_ROUNDING_FW_MANAGED flag
clk: rp1: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: scpi: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: hisilicon: hi3660-stub: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: imx: scu: drop redundant init.ops variable assignment
clk: imx: scu: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpmh: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: smd-rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: renesas: rzg2l-cpg: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: samsung: acpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: sprd: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
drivers/clk/clk-rp1.c | 11 +----
drivers/clk/clk-scpi.c | 14 +-----
drivers/clk/clk.c | 24 ++++++++--
drivers/clk/clk_test.c | 85 +++++++++++++++++++++++++++++++++
drivers/clk/hisilicon/clk-hi3660-stub.c | 14 +-----
drivers/clk/imx/clk-scu.c | 23 +--------
drivers/clk/qcom/clk-rpm.c | 16 ++-----
drivers/clk/qcom/clk-rpmh.c | 8 +---
drivers/clk/qcom/clk-smd-rpm.c | 15 +-----
drivers/clk/renesas/rzg2l-cpg.c | 9 +---
drivers/clk/samsung/clk-acpm.c | 14 +-----
drivers/clk/sprd/pll.c | 7 ---
drivers/clk/sprd/pll.h | 2 +-
include/linux/clk-provider.h | 2 +
14 files changed, 123 insertions(+), 121 deletions(-)
---
base-commit: 7d6661873f6b54c75195780a40d66bad3d482d8f
change-id: 20260226-clk-det-rate-fw-managed-4b8d061f31be
prerequisite-patch-id: 59198edc95aca82a29327137ad2af82ec13295b6
prerequisite-patch-id: 8932e170649711d7a80c57784033a37faadd519b
prerequisite-patch-id: 91c7b1851c5d77e504c49ce6bf14b3f8b84e826a
Best regards,
--
Brian Masney <bmasney@redhat.com>
| null | null | null | [PATCH 00/13] clk: add new flag CLK_ROUNDING_FW_MANAGED | Hi Brain,
Thanks for the patch
After applying patch#11, I get a message as you removed .determine_rate, Also it breaks display.
[ 0.096414] __clk_core_init: .pll5_foutpostdiv must implement .round_rate or .determine_rate in addition to .recalc_rate
Cheers,
Biju | {
"author": "Biju Das <biju.das.jz@bp.renesas.com>",
"date": "Fri, 27 Feb 2026 12:00:55 +0000",
"is_openbsd": false,
"thread_id": "20260226-clk-det-rate-fw-managed-v1-0-4421dd2f6dc6@redhat.com.mbox.gz"
} |
lkml_critique | lkml | There are some clocks where the rounding is managed by the hardware, and
the determine_rate() clk ops is just a noop that simply returns 0. Based
on discussions with Stephen at Linux Plumbers Conference, he suggested
adding a flag for this particular case. So let's add a new flag, and
update the clk core so that the determine_rate() clk op is not required
when this flag is set.
This series adds the flag, some kunit tests, and updates all of the
relevant drivers under drivers/clk to use the new flag.
Once this is merged, and in Linus's tree, I can update the few remaining
clk drivers that are outside of drivers/clk via those subsystems at a
later time.
Merge Strategy
--------------
All of this needs to be directly merged by Stephen as one series into
his tree. Subsystem maintainers: please leave a Reviewed-by or Acked-by.
To reduce the noise, I am only CCing people on their respective drivers.
Note this series depends on 3 previously-posted patches in this git pull
to Stephen for v7.1.
https://lore.kernel.org/linux-clk/aZuK4-QJCXUeSxtL@redhat.com/
Hopefully I set the depeendencies up correctly in b4.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
Brian Masney (13):
clk: add new flag CLK_ROUNDING_FW_MANAGED
clk: test: add test suite for CLK_ROUNDING_FW_MANAGED flag
clk: rp1: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: scpi: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: hisilicon: hi3660-stub: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: imx: scu: drop redundant init.ops variable assignment
clk: imx: scu: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpmh: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: smd-rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: renesas: rzg2l-cpg: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: samsung: acpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: sprd: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
drivers/clk/clk-rp1.c | 11 +----
drivers/clk/clk-scpi.c | 14 +-----
drivers/clk/clk.c | 24 ++++++++--
drivers/clk/clk_test.c | 85 +++++++++++++++++++++++++++++++++
drivers/clk/hisilicon/clk-hi3660-stub.c | 14 +-----
drivers/clk/imx/clk-scu.c | 23 +--------
drivers/clk/qcom/clk-rpm.c | 16 ++-----
drivers/clk/qcom/clk-rpmh.c | 8 +---
drivers/clk/qcom/clk-smd-rpm.c | 15 +-----
drivers/clk/renesas/rzg2l-cpg.c | 9 +---
drivers/clk/samsung/clk-acpm.c | 14 +-----
drivers/clk/sprd/pll.c | 7 ---
drivers/clk/sprd/pll.h | 2 +-
include/linux/clk-provider.h | 2 +
14 files changed, 123 insertions(+), 121 deletions(-)
---
base-commit: 7d6661873f6b54c75195780a40d66bad3d482d8f
change-id: 20260226-clk-det-rate-fw-managed-4b8d061f31be
prerequisite-patch-id: 59198edc95aca82a29327137ad2af82ec13295b6
prerequisite-patch-id: 8932e170649711d7a80c57784033a37faadd519b
prerequisite-patch-id: 91c7b1851c5d77e504c49ce6bf14b3f8b84e826a
Best regards,
--
Brian Masney <bmasney@redhat.com>
| null | null | null | [PATCH 00/13] clk: add new flag CLK_ROUNDING_FW_MANAGED | On Fri, Feb 27, 2026 at 12:00:55PM +0000, Biju Das wrote:
[snip]
Thanks for testing. This happens because rzg2l_cpg_pll_clk_register()
doesn't have the new flag set. I'll fix this, and go through all of the
others again just to make sure I don't miss any others.
Brian | {
"author": "Brian Masney <bmasney@redhat.com>",
"date": "Fri, 27 Feb 2026 09:44:55 -0500",
"is_openbsd": false,
"thread_id": "20260226-clk-det-rate-fw-managed-v1-0-4421dd2f6dc6@redhat.com.mbox.gz"
} |
lkml_critique | lkml | There are some clocks where the rounding is managed by the hardware, and
the determine_rate() clk ops is just a noop that simply returns 0. Based
on discussions with Stephen at Linux Plumbers Conference, he suggested
adding a flag for this particular case. So let's add a new flag, and
update the clk core so that the determine_rate() clk op is not required
when this flag is set.
This series adds the flag, some kunit tests, and updates all of the
relevant drivers under drivers/clk to use the new flag.
Once this is merged, and in Linus's tree, I can update the few remaining
clk drivers that are outside of drivers/clk via those subsystems at a
later time.
Merge Strategy
--------------
All of this needs to be directly merged by Stephen as one series into
his tree. Subsystem maintainers: please leave a Reviewed-by or Acked-by.
To reduce the noise, I am only CCing people on their respective drivers.
Note this series depends on 3 previously-posted patches in this git pull
to Stephen for v7.1.
https://lore.kernel.org/linux-clk/aZuK4-QJCXUeSxtL@redhat.com/
Hopefully I set the depeendencies up correctly in b4.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
Brian Masney (13):
clk: add new flag CLK_ROUNDING_FW_MANAGED
clk: test: add test suite for CLK_ROUNDING_FW_MANAGED flag
clk: rp1: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: scpi: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: hisilicon: hi3660-stub: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: imx: scu: drop redundant init.ops variable assignment
clk: imx: scu: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpmh: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: smd-rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: renesas: rzg2l-cpg: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: samsung: acpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: sprd: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
drivers/clk/clk-rp1.c | 11 +----
drivers/clk/clk-scpi.c | 14 +-----
drivers/clk/clk.c | 24 ++++++++--
drivers/clk/clk_test.c | 85 +++++++++++++++++++++++++++++++++
drivers/clk/hisilicon/clk-hi3660-stub.c | 14 +-----
drivers/clk/imx/clk-scu.c | 23 +--------
drivers/clk/qcom/clk-rpm.c | 16 ++-----
drivers/clk/qcom/clk-rpmh.c | 8 +---
drivers/clk/qcom/clk-smd-rpm.c | 15 +-----
drivers/clk/renesas/rzg2l-cpg.c | 9 +---
drivers/clk/samsung/clk-acpm.c | 14 +-----
drivers/clk/sprd/pll.c | 7 ---
drivers/clk/sprd/pll.h | 2 +-
include/linux/clk-provider.h | 2 +
14 files changed, 123 insertions(+), 121 deletions(-)
---
base-commit: 7d6661873f6b54c75195780a40d66bad3d482d8f
change-id: 20260226-clk-det-rate-fw-managed-4b8d061f31be
prerequisite-patch-id: 59198edc95aca82a29327137ad2af82ec13295b6
prerequisite-patch-id: 8932e170649711d7a80c57784033a37faadd519b
prerequisite-patch-id: 91c7b1851c5d77e504c49ce6bf14b3f8b84e826a
Best regards,
--
Brian Masney <bmasney@redhat.com>
| null | null | null | [PATCH 00/13] clk: add new flag CLK_ROUNDING_FW_MANAGED | On Fri, Feb 27, 2026 at 09:20:09AM +0100, Geert Uytterhoeven wrote:
It needs a better name for the flag. I'll reply on patch 1 where more
people are CCed to see if we can come up with a better idea.
Brian | {
"author": "Brian Masney <bmasney@redhat.com>",
"date": "Fri, 27 Feb 2026 09:46:38 -0500",
"is_openbsd": false,
"thread_id": "20260226-clk-det-rate-fw-managed-v1-0-4421dd2f6dc6@redhat.com.mbox.gz"
} |
lkml_critique | lkml | There are some clocks where the rounding is managed by the hardware, and
the determine_rate() clk ops is just a noop that simply returns 0. Based
on discussions with Stephen at Linux Plumbers Conference, he suggested
adding a flag for this particular case. So let's add a new flag, and
update the clk core so that the determine_rate() clk op is not required
when this flag is set.
This series adds the flag, some kunit tests, and updates all of the
relevant drivers under drivers/clk to use the new flag.
Once this is merged, and in Linus's tree, I can update the few remaining
clk drivers that are outside of drivers/clk via those subsystems at a
later time.
Merge Strategy
--------------
All of this needs to be directly merged by Stephen as one series into
his tree. Subsystem maintainers: please leave a Reviewed-by or Acked-by.
To reduce the noise, I am only CCing people on their respective drivers.
Note this series depends on 3 previously-posted patches in this git pull
to Stephen for v7.1.
https://lore.kernel.org/linux-clk/aZuK4-QJCXUeSxtL@redhat.com/
Hopefully I set the depeendencies up correctly in b4.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
Brian Masney (13):
clk: add new flag CLK_ROUNDING_FW_MANAGED
clk: test: add test suite for CLK_ROUNDING_FW_MANAGED flag
clk: rp1: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: scpi: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: hisilicon: hi3660-stub: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: imx: scu: drop redundant init.ops variable assignment
clk: imx: scu: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpmh: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: smd-rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: renesas: rzg2l-cpg: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: samsung: acpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: sprd: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
drivers/clk/clk-rp1.c | 11 +----
drivers/clk/clk-scpi.c | 14 +-----
drivers/clk/clk.c | 24 ++++++++--
drivers/clk/clk_test.c | 85 +++++++++++++++++++++++++++++++++
drivers/clk/hisilicon/clk-hi3660-stub.c | 14 +-----
drivers/clk/imx/clk-scu.c | 23 +--------
drivers/clk/qcom/clk-rpm.c | 16 ++-----
drivers/clk/qcom/clk-rpmh.c | 8 +---
drivers/clk/qcom/clk-smd-rpm.c | 15 +-----
drivers/clk/renesas/rzg2l-cpg.c | 9 +---
drivers/clk/samsung/clk-acpm.c | 14 +-----
drivers/clk/sprd/pll.c | 7 ---
drivers/clk/sprd/pll.h | 2 +-
include/linux/clk-provider.h | 2 +
14 files changed, 123 insertions(+), 121 deletions(-)
---
base-commit: 7d6661873f6b54c75195780a40d66bad3d482d8f
change-id: 20260226-clk-det-rate-fw-managed-4b8d061f31be
prerequisite-patch-id: 59198edc95aca82a29327137ad2af82ec13295b6
prerequisite-patch-id: 8932e170649711d7a80c57784033a37faadd519b
prerequisite-patch-id: 91c7b1851c5d77e504c49ce6bf14b3f8b84e826a
Best regards,
--
Brian Masney <bmasney@redhat.com>
| null | null | null | [PATCH 00/13] clk: add new flag CLK_ROUNDING_FW_MANAGED | Hi Geert,
On Fri, Feb 27, 2026 at 09:20:09AM +0100, Geert Uytterhoeven wrote:
Before I start a larger discussion on patch 1 with more people about a
name for this flag, help me understand why this provider has a noop
determine rate. Is the hardware eventually programmed with a rate
that's close enough to what was passed in? Or it doesn't really matter
what the clock rate is, just as long as it is running? Or should the
determine_rate function be filled out in this particular case?
Thanks,
Brian | {
"author": "Brian Masney <bmasney@redhat.com>",
"date": "Fri, 27 Feb 2026 10:01:02 -0500",
"is_openbsd": false,
"thread_id": "20260226-clk-det-rate-fw-managed-v1-0-4421dd2f6dc6@redhat.com.mbox.gz"
} |
lkml_critique | lkml | There are some clocks where the rounding is managed by the hardware, and
the determine_rate() clk ops is just a noop that simply returns 0. Based
on discussions with Stephen at Linux Plumbers Conference, he suggested
adding a flag for this particular case. So let's add a new flag, and
update the clk core so that the determine_rate() clk op is not required
when this flag is set.
This series adds the flag, some kunit tests, and updates all of the
relevant drivers under drivers/clk to use the new flag.
Once this is merged, and in Linus's tree, I can update the few remaining
clk drivers that are outside of drivers/clk via those subsystems at a
later time.
Merge Strategy
--------------
All of this needs to be directly merged by Stephen as one series into
his tree. Subsystem maintainers: please leave a Reviewed-by or Acked-by.
To reduce the noise, I am only CCing people on their respective drivers.
Note this series depends on 3 previously-posted patches in this git pull
to Stephen for v7.1.
https://lore.kernel.org/linux-clk/aZuK4-QJCXUeSxtL@redhat.com/
Hopefully I set the depeendencies up correctly in b4.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
Brian Masney (13):
clk: add new flag CLK_ROUNDING_FW_MANAGED
clk: test: add test suite for CLK_ROUNDING_FW_MANAGED flag
clk: rp1: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: scpi: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: hisilicon: hi3660-stub: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: imx: scu: drop redundant init.ops variable assignment
clk: imx: scu: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpmh: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: smd-rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: renesas: rzg2l-cpg: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: samsung: acpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: sprd: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
drivers/clk/clk-rp1.c | 11 +----
drivers/clk/clk-scpi.c | 14 +-----
drivers/clk/clk.c | 24 ++++++++--
drivers/clk/clk_test.c | 85 +++++++++++++++++++++++++++++++++
drivers/clk/hisilicon/clk-hi3660-stub.c | 14 +-----
drivers/clk/imx/clk-scu.c | 23 +--------
drivers/clk/qcom/clk-rpm.c | 16 ++-----
drivers/clk/qcom/clk-rpmh.c | 8 +---
drivers/clk/qcom/clk-smd-rpm.c | 15 +-----
drivers/clk/renesas/rzg2l-cpg.c | 9 +---
drivers/clk/samsung/clk-acpm.c | 14 +-----
drivers/clk/sprd/pll.c | 7 ---
drivers/clk/sprd/pll.h | 2 +-
include/linux/clk-provider.h | 2 +
14 files changed, 123 insertions(+), 121 deletions(-)
---
base-commit: 7d6661873f6b54c75195780a40d66bad3d482d8f
change-id: 20260226-clk-det-rate-fw-managed-4b8d061f31be
prerequisite-patch-id: 59198edc95aca82a29327137ad2af82ec13295b6
prerequisite-patch-id: 8932e170649711d7a80c57784033a37faadd519b
prerequisite-patch-id: 91c7b1851c5d77e504c49ce6bf14b3f8b84e826a
Best regards,
--
Brian Masney <bmasney@redhat.com>
| null | null | null | [PATCH 00/13] clk: add new flag CLK_ROUNDING_FW_MANAGED | Hi Brian,
On Fri, 27 Feb 2026 at 16:01, Brian Masney <bmasney@redhat.com> wrote:
I'd like to defer to Biju, who added the empty round^Wdetermine rate
function.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds | {
"author": "Geert Uytterhoeven <geert@linux-m68k.org>",
"date": "Fri, 27 Feb 2026 16:09:27 +0100",
"is_openbsd": false,
"thread_id": "20260226-clk-det-rate-fw-managed-v1-0-4421dd2f6dc6@redhat.com.mbox.gz"
} |
lkml_critique | lkml | There are some clocks where the rounding is managed by the hardware, and
the determine_rate() clk ops is just a noop that simply returns 0. Based
on discussions with Stephen at Linux Plumbers Conference, he suggested
adding a flag for this particular case. So let's add a new flag, and
update the clk core so that the determine_rate() clk op is not required
when this flag is set.
This series adds the flag, some kunit tests, and updates all of the
relevant drivers under drivers/clk to use the new flag.
Once this is merged, and in Linus's tree, I can update the few remaining
clk drivers that are outside of drivers/clk via those subsystems at a
later time.
Merge Strategy
--------------
All of this needs to be directly merged by Stephen as one series into
his tree. Subsystem maintainers: please leave a Reviewed-by or Acked-by.
To reduce the noise, I am only CCing people on their respective drivers.
Note this series depends on 3 previously-posted patches in this git pull
to Stephen for v7.1.
https://lore.kernel.org/linux-clk/aZuK4-QJCXUeSxtL@redhat.com/
Hopefully I set the depeendencies up correctly in b4.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
Brian Masney (13):
clk: add new flag CLK_ROUNDING_FW_MANAGED
clk: test: add test suite for CLK_ROUNDING_FW_MANAGED flag
clk: rp1: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: scpi: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: hisilicon: hi3660-stub: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: imx: scu: drop redundant init.ops variable assignment
clk: imx: scu: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: rpmh: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: qcom: smd-rpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: renesas: rzg2l-cpg: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: samsung: acpm: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
clk: sprd: drop determine_rate op and use CLK_ROUNDING_FW_MANAGED flag
drivers/clk/clk-rp1.c | 11 +----
drivers/clk/clk-scpi.c | 14 +-----
drivers/clk/clk.c | 24 ++++++++--
drivers/clk/clk_test.c | 85 +++++++++++++++++++++++++++++++++
drivers/clk/hisilicon/clk-hi3660-stub.c | 14 +-----
drivers/clk/imx/clk-scu.c | 23 +--------
drivers/clk/qcom/clk-rpm.c | 16 ++-----
drivers/clk/qcom/clk-rpmh.c | 8 +---
drivers/clk/qcom/clk-smd-rpm.c | 15 +-----
drivers/clk/renesas/rzg2l-cpg.c | 9 +---
drivers/clk/samsung/clk-acpm.c | 14 +-----
drivers/clk/sprd/pll.c | 7 ---
drivers/clk/sprd/pll.h | 2 +-
include/linux/clk-provider.h | 2 +
14 files changed, 123 insertions(+), 121 deletions(-)
---
base-commit: 7d6661873f6b54c75195780a40d66bad3d482d8f
change-id: 20260226-clk-det-rate-fw-managed-4b8d061f31be
prerequisite-patch-id: 59198edc95aca82a29327137ad2af82ec13295b6
prerequisite-patch-id: 8932e170649711d7a80c57784033a37faadd519b
prerequisite-patch-id: 91c7b1851c5d77e504c49ce6bf14b3f8b84e826a
Best regards,
--
Brian Masney <bmasney@redhat.com>
| null | null | null | [PATCH 00/13] clk: add new flag CLK_ROUNDING_FW_MANAGED | Hi Brian/Geert,
PLL is capable of generating any frequency. that is the reason.
But we could, call rzg2l_cpg_get_foutpostdiv_rate() from determine_rate()
as modified rzg2l_cpg_get_foutpostdiv_rate()[1] can return errors
[1]
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/tree/drivers/clk/renesas/rzg2l-cpg.c?h=next-20260227#n590
Cheers,
Biju | {
"author": "Biju Das <biju.das.jz@bp.renesas.com>",
"date": "Fri, 27 Feb 2026 15:23:19 +0000",
"is_openbsd": false,
"thread_id": "20260226-clk-det-rate-fw-managed-v1-0-4421dd2f6dc6@redhat.com.mbox.gz"
} |
lkml_critique | lkml | Add an `active()` method to HrTimer that returns true if the timer is in
the started or running states. This wraps the kernel's hrtimer_active()
function.
Also add documentation clarifying the definition of an active timer.
Signed-off-by: Andreas Hindborg <a.hindborg@kernel.org>
---
rust/kernel/time/hrtimer.rs | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/rust/kernel/time/hrtimer.rs b/rust/kernel/time/hrtimer.rs
index 856d2d929a008..b2272b059e504 100644
--- a/rust/kernel/time/hrtimer.rs
+++ b/rust/kernel/time/hrtimer.rs
@@ -66,6 +66,8 @@
//!
//! A `restart` operation on a timer in the **stopped** state is equivalent to a
//! `start` operation.
+//!
+//! A timer is **active** if it is either in the **started** or **running** states.
use super::{ClockSource, Delta, Instant};
use crate::{prelude::*, types::Opaque};
@@ -246,6 +248,14 @@ pub fn expires(&self) -> HrTimerInstant<T>
)
}
}
+
+ /// Query the state of the timer.
+ ///
+ /// Returns `true` if the timer is in the started or running states.
+ pub fn active(&self) -> bool {
+ // SAFETY: By type invariant, `self.timer` is valid.
+ unsafe { bindings::hrtimer_active(self.timer.get()) }
+ }
}
/// Implemented by pointer types that point to structs that contain a [`HrTimer`].
---
base-commit: 05f7e89ab9731565d8a62e3b5d1ec206485eeb0b
change-id: 20260215-hrtimer-active-f183411fe56b
Best regards,
--
Andreas Hindborg <a.hindborg@kernel.org>
| null | null | null | [PATCH] rust: hrtimer: add active() method to query timer state | On Sun, Feb 15, 2026 at 9:30 PM Andreas Hindborg <a.hindborg@kernel.org> wrote:
[`true`]
Since we try to add examples when we add APIs, could we perhaps add
one that inits a timers and asserts it is not active?
Thanks!
Cheers,
Miguel | {
"author": "Miguel Ojeda <miguel.ojeda.sandonis@gmail.com>",
"date": "Sun, 15 Feb 2026 21:59:57 +0100",
"is_openbsd": false,
"thread_id": "DGPT98PHCRJK.24W50V2JKRE8K@garyguo.net.mbox.gz"
} |
lkml_critique | lkml | Add an `active()` method to HrTimer that returns true if the timer is in
the started or running states. This wraps the kernel's hrtimer_active()
function.
Also add documentation clarifying the definition of an active timer.
Signed-off-by: Andreas Hindborg <a.hindborg@kernel.org>
---
rust/kernel/time/hrtimer.rs | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/rust/kernel/time/hrtimer.rs b/rust/kernel/time/hrtimer.rs
index 856d2d929a008..b2272b059e504 100644
--- a/rust/kernel/time/hrtimer.rs
+++ b/rust/kernel/time/hrtimer.rs
@@ -66,6 +66,8 @@
//!
//! A `restart` operation on a timer in the **stopped** state is equivalent to a
//! `start` operation.
+//!
+//! A timer is **active** if it is either in the **started** or **running** states.
use super::{ClockSource, Delta, Instant};
use crate::{prelude::*, types::Opaque};
@@ -246,6 +248,14 @@ pub fn expires(&self) -> HrTimerInstant<T>
)
}
}
+
+ /// Query the state of the timer.
+ ///
+ /// Returns `true` if the timer is in the started or running states.
+ pub fn active(&self) -> bool {
+ // SAFETY: By type invariant, `self.timer` is valid.
+ unsafe { bindings::hrtimer_active(self.timer.get()) }
+ }
}
/// Implemented by pointer types that point to structs that contain a [`HrTimer`].
---
base-commit: 05f7e89ab9731565d8a62e3b5d1ec206485eeb0b
change-id: 20260215-hrtimer-active-f183411fe56b
Best regards,
--
Andreas Hindborg <a.hindborg@kernel.org>
| null | null | null | [PATCH] rust: hrtimer: add active() method to query timer state | On Sun Feb 15, 2026 at 8:29 PM GMT, Andreas Hindborg wrote:
This could be `#[inline]`.
Perhaps also mention that this function is safe to call without exclusive
requirement, as this is a common requiremnt for many other hrtimer functions.
Best,
Gary | {
"author": "\"Gary Guo\" <gary@garyguo.net>",
"date": "Fri, 27 Feb 2026 14:23:40 +0000",
"is_openbsd": false,
"thread_id": "DGPT98PHCRJK.24W50V2JKRE8K@garyguo.net.mbox.gz"
} |
lkml_critique | lkml | This series adds support for the display blocks on MediaTek mt8167.
Tested on Xiaomi Mi Smart Clock x04g.
The first patch just does some reordering of dts nodes with no other
changes as this makes later patches cleaner and easier to follow.
v3:
- Added mt8167-dsi compatible to driver instead of changing the binding;
- Resolved patch formatting issues.
v2:
- Separate patch for mediatek,dsi-phy binding;
- Separate patch for mt8167-dsi binding;
- Simplified OF graph endpoints in mt8167.dtsi.
Luca Leonardo Scorcia (5):
arm64: dts: mt8167: Reorder nodes according to mmio address
dt-bindings: display: mediatek: Add compatibles for MediaTek mt8167
dt-bindings: phy: mediatek,dsi-phy: Add support for mt8167
arm64: dts: mediatek: mt8167: Add DRM nodes
drm/mediatek: dsi: Add compatible for mt8167-dsi
Val Packett (1):
gpu: drm: mediatek: ovl: add specific entry for mt8167
.../display/mediatek/mediatek,aal.yaml | 1 +
.../display/mediatek/mediatek,ccorr.yaml | 4 +-
.../display/mediatek/mediatek,dither.yaml | 1 +
.../display/mediatek/mediatek,gamma.yaml | 1 +
.../display/mediatek/mediatek,ovl.yaml | 1 +
.../display/mediatek/mediatek,rdma.yaml | 1 +
.../display/mediatek/mediatek,wdma.yaml | 4 +-
.../bindings/phy/mediatek,dsi-phy.yaml | 1 +
arch/arm64/boot/dts/mediatek/mt8167.dtsi | 381 ++++++++++++++++--
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 12 +
drivers/gpu/drm/mediatek/mtk_dsi.c | 1 +
11 files changed, 374 insertions(+), 34 deletions(-)
--
2.43.0
| null | null | null | [PATCH v3 0/6] Add support for mt8167 display blocks | In preparation for adding display nodes. No other changes.
Signed-off-by: Luca Leonardo Scorcia <l.scorcia@gmail.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
arch/arm64/boot/dts/mediatek/mt8167.dtsi | 68 ++++++++++++------------
1 file changed, 34 insertions(+), 34 deletions(-)
diff --git a/arch/arm64/boot/dts/mediatek/mt8167.dtsi b/arch/arm64/boot/dts/mediatek/mt8167.dtsi
index 2374c0953057..27cf32d7ae35 100644
--- a/arch/arm64/boot/dts/mediatek/mt8167.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8167.dtsi
@@ -29,12 +29,6 @@ infracfg: infracfg@10001000 {
#clock-cells = <1>;
};
- apmixedsys: apmixedsys@10018000 {
- compatible = "mediatek,mt8167-apmixedsys", "syscon";
- reg = <0 0x10018000 0 0x710>;
- #clock-cells = <1>;
- };
-
scpsys: syscon@10006000 {
compatible = "mediatek,mt8167-scpsys", "syscon", "simple-mfd";
reg = <0 0x10006000 0 0x1000>;
@@ -101,18 +95,6 @@ power-domain@MT8167_POWER_DOMAIN_CONN {
};
};
- imgsys: syscon@15000000 {
- compatible = "mediatek,mt8167-imgsys", "syscon";
- reg = <0 0x15000000 0 0x1000>;
- #clock-cells = <1>;
- };
-
- vdecsys: syscon@16000000 {
- compatible = "mediatek,mt8167-vdecsys", "syscon";
- reg = <0 0x16000000 0 0x1000>;
- #clock-cells = <1>;
- };
-
pio: pinctrl@1000b000 {
compatible = "mediatek,mt8167-pinctrl";
reg = <0 0x1000b000 0 0x1000>;
@@ -124,12 +106,36 @@ pio: pinctrl@1000b000 {
interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
};
+ apmixedsys: apmixedsys@10018000 {
+ compatible = "mediatek,mt8167-apmixedsys", "syscon";
+ reg = <0 0x10018000 0 0x710>;
+ #clock-cells = <1>;
+ };
+
+ iommu: m4u@10203000 {
+ compatible = "mediatek,mt8167-m4u";
+ reg = <0 0x10203000 0 0x1000>;
+ mediatek,larbs = <&larb0>, <&larb1>, <&larb2>;
+ interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_LOW>;
+ #iommu-cells = <1>;
+ };
+
mmsys: syscon@14000000 {
compatible = "mediatek,mt8167-mmsys", "syscon";
reg = <0 0x14000000 0 0x1000>;
#clock-cells = <1>;
};
+ larb0: larb@14016000 {
+ compatible = "mediatek,mt8167-smi-larb";
+ reg = <0 0x14016000 0 0x1000>;
+ mediatek,smi = <&smi_common>;
+ clocks = <&mmsys CLK_MM_SMI_LARB0>,
+ <&mmsys CLK_MM_SMI_LARB0>;
+ clock-names = "apb", "smi";
+ power-domains = <&spm MT8167_POWER_DOMAIN_MM>;
+ };
+
smi_common: smi@14017000 {
compatible = "mediatek,mt8167-smi-common";
reg = <0 0x14017000 0 0x1000>;
@@ -139,14 +145,10 @@ smi_common: smi@14017000 {
power-domains = <&spm MT8167_POWER_DOMAIN_MM>;
};
- larb0: larb@14016000 {
- compatible = "mediatek,mt8167-smi-larb";
- reg = <0 0x14016000 0 0x1000>;
- mediatek,smi = <&smi_common>;
- clocks = <&mmsys CLK_MM_SMI_LARB0>,
- <&mmsys CLK_MM_SMI_LARB0>;
- clock-names = "apb", "smi";
- power-domains = <&spm MT8167_POWER_DOMAIN_MM>;
+ imgsys: syscon@15000000 {
+ compatible = "mediatek,mt8167-imgsys", "syscon";
+ reg = <0 0x15000000 0 0x1000>;
+ #clock-cells = <1>;
};
larb1: larb@15001000 {
@@ -159,6 +161,12 @@ larb1: larb@15001000 {
power-domains = <&spm MT8167_POWER_DOMAIN_ISP>;
};
+ vdecsys: syscon@16000000 {
+ compatible = "mediatek,mt8167-vdecsys", "syscon";
+ reg = <0 0x16000000 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
larb2: larb@16010000 {
compatible = "mediatek,mt8167-smi-larb";
reg = <0 0x16010000 0 0x1000>;
@@ -168,13 +176,5 @@ larb2: larb@16010000 {
clock-names = "apb", "smi";
power-domains = <&spm MT8167_POWER_DOMAIN_VDEC>;
};
-
- iommu: m4u@10203000 {
- compatible = "mediatek,mt8167-m4u";
- reg = <0 0x10203000 0 0x1000>;
- mediatek,larbs = <&larb0>, <&larb1>, <&larb2>;
- interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_LOW>;
- #iommu-cells = <1>;
- };
};
};
--
2.43.0 | {
"author": "Luca Leonardo Scorcia <l.scorcia@gmail.com>",
"date": "Mon, 23 Feb 2026 16:22:45 +0000",
"is_openbsd": false,
"thread_id": "cover.1771863641.git.l.scorcia@gmail.com.mbox.gz"
} |
lkml_critique | lkml | This series adds support for the display blocks on MediaTek mt8167.
Tested on Xiaomi Mi Smart Clock x04g.
The first patch just does some reordering of dts nodes with no other
changes as this makes later patches cleaner and easier to follow.
v3:
- Added mt8167-dsi compatible to driver instead of changing the binding;
- Resolved patch formatting issues.
v2:
- Separate patch for mediatek,dsi-phy binding;
- Separate patch for mt8167-dsi binding;
- Simplified OF graph endpoints in mt8167.dtsi.
Luca Leonardo Scorcia (5):
arm64: dts: mt8167: Reorder nodes according to mmio address
dt-bindings: display: mediatek: Add compatibles for MediaTek mt8167
dt-bindings: phy: mediatek,dsi-phy: Add support for mt8167
arm64: dts: mediatek: mt8167: Add DRM nodes
drm/mediatek: dsi: Add compatible for mt8167-dsi
Val Packett (1):
gpu: drm: mediatek: ovl: add specific entry for mt8167
.../display/mediatek/mediatek,aal.yaml | 1 +
.../display/mediatek/mediatek,ccorr.yaml | 4 +-
.../display/mediatek/mediatek,dither.yaml | 1 +
.../display/mediatek/mediatek,gamma.yaml | 1 +
.../display/mediatek/mediatek,ovl.yaml | 1 +
.../display/mediatek/mediatek,rdma.yaml | 1 +
.../display/mediatek/mediatek,wdma.yaml | 4 +-
.../bindings/phy/mediatek,dsi-phy.yaml | 1 +
arch/arm64/boot/dts/mediatek/mt8167.dtsi | 381 ++++++++++++++++--
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 12 +
drivers/gpu/drm/mediatek/mtk_dsi.c | 1 +
11 files changed, 374 insertions(+), 34 deletions(-)
--
2.43.0
| null | null | null | [PATCH v3 0/6] Add support for mt8167 display blocks | Add compatibles for various display-related blocks of MediaTek mt8167.
Signed-off-by: Luca Leonardo Scorcia <l.scorcia@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
.../devicetree/bindings/display/mediatek/mediatek,aal.yaml | 1 +
.../devicetree/bindings/display/mediatek/mediatek,ccorr.yaml | 4 +++-
.../devicetree/bindings/display/mediatek/mediatek,dither.yaml | 1 +
.../devicetree/bindings/display/mediatek/mediatek,gamma.yaml | 1 +
.../devicetree/bindings/display/mediatek/mediatek,ovl.yaml | 1 +
.../devicetree/bindings/display/mediatek/mediatek,rdma.yaml | 1 +
.../devicetree/bindings/display/mediatek/mediatek,wdma.yaml | 4 +++-
7 files changed, 11 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml
index daf90ebb39bf..4bbea72b292a 100644
--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml
@@ -33,6 +33,7 @@ properties:
- enum:
- mediatek,mt2712-disp-aal
- mediatek,mt6795-disp-aal
+ - mediatek,mt8167-disp-aal
- const: mediatek,mt8173-disp-aal
- items:
- enum:
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml
index fca8e7bb0cbc..5c5068128d0c 100644
--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml
@@ -25,7 +25,9 @@ properties:
- mediatek,mt8183-disp-ccorr
- mediatek,mt8192-disp-ccorr
- items:
- - const: mediatek,mt8365-disp-ccorr
+ - enum:
+ - mediatek,mt8167-disp-ccorr
+ - mediatek,mt8365-disp-ccorr
- const: mediatek,mt8183-disp-ccorr
- items:
- enum:
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dither.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,dither.yaml
index abaf27916d13..891c95be15b9 100644
--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dither.yaml
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dither.yaml
@@ -26,6 +26,7 @@ properties:
- mediatek,mt8183-disp-dither
- items:
- enum:
+ - mediatek,mt8167-disp-dither
- mediatek,mt8186-disp-dither
- mediatek,mt8188-disp-dither
- mediatek,mt8192-disp-dither
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml
index 48542dc7e784..ec1054bb06d4 100644
--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml
@@ -28,6 +28,7 @@ properties:
- items:
- enum:
- mediatek,mt6795-disp-gamma
+ - mediatek,mt8167-disp-gamma
- const: mediatek,mt8173-disp-gamma
- items:
- enum:
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml
index 4f110635afb6..679f731f0f15 100644
--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml
@@ -23,6 +23,7 @@ properties:
oneOf:
- enum:
- mediatek,mt2701-disp-ovl
+ - mediatek,mt8167-disp-ovl
- mediatek,mt8173-disp-ovl
- mediatek,mt8183-disp-ovl
- mediatek,mt8192-disp-ovl
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,rdma.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,rdma.yaml
index 878f676b581f..cb187a95c11e 100644
--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,rdma.yaml
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,rdma.yaml
@@ -36,6 +36,7 @@ properties:
- enum:
- mediatek,mt7623-disp-rdma
- mediatek,mt2712-disp-rdma
+ - mediatek,mt8167-disp-rdma
- const: mediatek,mt2701-disp-rdma
- items:
- enum:
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,wdma.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,wdma.yaml
index a3a2b71a4523..816841a96133 100644
--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,wdma.yaml
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,wdma.yaml
@@ -24,7 +24,9 @@ properties:
- enum:
- mediatek,mt8173-disp-wdma
- items:
- - const: mediatek,mt6795-disp-wdma
+ - enum:
+ - mediatek,mt6795-disp-wdma
+ - mediatek,mt8167-disp-wdma
- const: mediatek,mt8173-disp-wdma
reg:
--
2.43.0 | {
"author": "Luca Leonardo Scorcia <l.scorcia@gmail.com>",
"date": "Mon, 23 Feb 2026 16:22:46 +0000",
"is_openbsd": false,
"thread_id": "cover.1771863641.git.l.scorcia@gmail.com.mbox.gz"
} |
lkml_critique | lkml | This series adds support for the display blocks on MediaTek mt8167.
Tested on Xiaomi Mi Smart Clock x04g.
The first patch just does some reordering of dts nodes with no other
changes as this makes later patches cleaner and easier to follow.
v3:
- Added mt8167-dsi compatible to driver instead of changing the binding;
- Resolved patch formatting issues.
v2:
- Separate patch for mediatek,dsi-phy binding;
- Separate patch for mt8167-dsi binding;
- Simplified OF graph endpoints in mt8167.dtsi.
Luca Leonardo Scorcia (5):
arm64: dts: mt8167: Reorder nodes according to mmio address
dt-bindings: display: mediatek: Add compatibles for MediaTek mt8167
dt-bindings: phy: mediatek,dsi-phy: Add support for mt8167
arm64: dts: mediatek: mt8167: Add DRM nodes
drm/mediatek: dsi: Add compatible for mt8167-dsi
Val Packett (1):
gpu: drm: mediatek: ovl: add specific entry for mt8167
.../display/mediatek/mediatek,aal.yaml | 1 +
.../display/mediatek/mediatek,ccorr.yaml | 4 +-
.../display/mediatek/mediatek,dither.yaml | 1 +
.../display/mediatek/mediatek,gamma.yaml | 1 +
.../display/mediatek/mediatek,ovl.yaml | 1 +
.../display/mediatek/mediatek,rdma.yaml | 1 +
.../display/mediatek/mediatek,wdma.yaml | 4 +-
.../bindings/phy/mediatek,dsi-phy.yaml | 1 +
arch/arm64/boot/dts/mediatek/mt8167.dtsi | 381 ++++++++++++++++--
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 12 +
drivers/gpu/drm/mediatek/mtk_dsi.c | 1 +
11 files changed, 374 insertions(+), 34 deletions(-)
--
2.43.0
| null | null | null | [PATCH v3 0/6] Add support for mt8167 display blocks | Add support for the MediaTek mt8167 SoC: the DSI PHY found
in this chip is fully compatible with the one found in the mt2701 SoC.
Signed-off-by: Luca Leonardo Scorcia <l.scorcia@gmail.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
---
Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml b/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml
index acdbce937b0a..c6d0bbdbe0e2 100644
--- a/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml
@@ -23,6 +23,7 @@ properties:
- items:
- enum:
- mediatek,mt7623-mipi-tx
+ - mediatek,mt8167-mipi-tx
- const: mediatek,mt2701-mipi-tx
- items:
- enum:
--
2.43.0 | {
"author": "Luca Leonardo Scorcia <l.scorcia@gmail.com>",
"date": "Mon, 23 Feb 2026 16:22:47 +0000",
"is_openbsd": false,
"thread_id": "cover.1771863641.git.l.scorcia@gmail.com.mbox.gz"
} |
lkml_critique | lkml | This series adds support for the display blocks on MediaTek mt8167.
Tested on Xiaomi Mi Smart Clock x04g.
The first patch just does some reordering of dts nodes with no other
changes as this makes later patches cleaner and easier to follow.
v3:
- Added mt8167-dsi compatible to driver instead of changing the binding;
- Resolved patch formatting issues.
v2:
- Separate patch for mediatek,dsi-phy binding;
- Separate patch for mt8167-dsi binding;
- Simplified OF graph endpoints in mt8167.dtsi.
Luca Leonardo Scorcia (5):
arm64: dts: mt8167: Reorder nodes according to mmio address
dt-bindings: display: mediatek: Add compatibles for MediaTek mt8167
dt-bindings: phy: mediatek,dsi-phy: Add support for mt8167
arm64: dts: mediatek: mt8167: Add DRM nodes
drm/mediatek: dsi: Add compatible for mt8167-dsi
Val Packett (1):
gpu: drm: mediatek: ovl: add specific entry for mt8167
.../display/mediatek/mediatek,aal.yaml | 1 +
.../display/mediatek/mediatek,ccorr.yaml | 4 +-
.../display/mediatek/mediatek,dither.yaml | 1 +
.../display/mediatek/mediatek,gamma.yaml | 1 +
.../display/mediatek/mediatek,ovl.yaml | 1 +
.../display/mediatek/mediatek,rdma.yaml | 1 +
.../display/mediatek/mediatek,wdma.yaml | 4 +-
.../bindings/phy/mediatek,dsi-phy.yaml | 1 +
arch/arm64/boot/dts/mediatek/mt8167.dtsi | 381 ++++++++++++++++--
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 12 +
drivers/gpu/drm/mediatek/mtk_dsi.c | 1 +
11 files changed, 374 insertions(+), 34 deletions(-)
--
2.43.0
| null | null | null | [PATCH v3 0/6] Add support for mt8167 display blocks | Add all the DRM nodes required to get DSI to work on MT8167 SoC.
Signed-off-by: Luca Leonardo Scorcia <l.scorcia@gmail.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
arch/arm64/boot/dts/mediatek/mt8167.dtsi | 317 +++++++++++++++++++++++
1 file changed, 317 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8167.dtsi b/arch/arm64/boot/dts/mediatek/mt8167.dtsi
index 27cf32d7ae35..32d3895baaa6 100644
--- a/arch/arm64/boot/dts/mediatek/mt8167.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8167.dtsi
@@ -16,6 +16,20 @@
/ {
compatible = "mediatek,mt8167";
+ aliases {
+ aal0 = &aal;
+ ccorr0 = &ccorr;
+ color0 = &color;
+ dither0 = &dither;
+ dsi0 = &dsi;
+ gamma0 = γ
+ ovl0 = &ovl0;
+ pwm0 = &disp_pwm;
+ rdma0 = &rdma0;
+ rdma1 = &rdma1;
+ wdma0 = &wdma;
+ };
+
soc {
topckgen: topckgen@10000000 {
compatible = "mediatek,mt8167-topckgen", "syscon";
@@ -120,10 +134,303 @@ iommu: m4u@10203000 {
#iommu-cells = <1>;
};
+ disp_pwm: pwm@1100f000 {
+ compatible = "mediatek,mt8167-disp-pwm", "mediatek,mt8173-disp-pwm";
+ reg = <0 0x1100f000 0 0x1000>;
+ clocks = <&mmsys CLK_MM_DISP_PWM_26M>, <&mmsys CLK_MM_DISP_PWM_MM>;
+ clock-names = "main", "mm";
+ power-domains = <&spm MT8167_POWER_DOMAIN_MM>;
+ #pwm-cells = <2>;
+ status = "disabled";
+ };
+
mmsys: syscon@14000000 {
compatible = "mediatek,mt8167-mmsys", "syscon";
reg = <0 0x14000000 0 0x1000>;
+ power-domains = <&spm MT8167_POWER_DOMAIN_MM>;
#clock-cells = <1>;
+
+ port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mmsys_main: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&ovl0_in>;
+ };
+
+ mmsys_ext: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&rdma1_in>;
+ };
+ };
+ };
+
+ ovl0: ovl0@14007000 {
+ compatible = "mediatek,mt8167-disp-ovl";
+ reg = <0 0x14007000 0 0x1000>;
+ clocks = <&mmsys CLK_MM_DISP_OVL0>;
+ interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_LOW>;
+ iommus = <&iommu M4U_PORT_DISP_OVL0>;
+ power-domains = <&spm MT8167_POWER_DOMAIN_MM>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ ovl0_in: endpoint {
+ remote-endpoint = <&mmsys_main>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ ovl0_out: endpoint {
+ remote-endpoint = <&color_in>;
+ };
+ };
+ };
+ };
+
+ rdma0: rdma0@14009000 {
+ compatible = "mediatek,mt8167-disp-rdma", "mediatek,mt2701-disp-rdma";
+ reg = <0 0x14009000 0 0x1000>;
+ clocks = <&mmsys CLK_MM_DISP_RDMA0>;
+ interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_LOW>;
+ iommus = <&iommu M4U_PORT_DISP_RDMA0>;
+ power-domains = <&spm MT8167_POWER_DOMAIN_MM>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ rdma0_in: endpoint {
+ remote-endpoint = <&dither_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ rdma0_out: endpoint {
+ remote-endpoint = <&dsi_in>;
+ };
+ };
+ };
+ };
+
+ rdma1: rdma1@1400a000 {
+ compatible = "mediatek,mt8167-disp-rdma", "mediatek,mt2701-disp-rdma";
+ reg = <0 0x1400a000 0 0x1000>;
+ clocks = <&mmsys CLK_MM_DISP_RDMA1>;
+ interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_LOW>;
+ iommus = <&iommu M4U_PORT_DISP_RDMA1>;
+ power-domains = <&spm MT8167_POWER_DOMAIN_MM>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ rdma1_in: endpoint {
+ remote-endpoint = <&mmsys_ext>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ rdma1_out: endpoint { };
+ };
+ };
+ };
+
+ wdma: wdma0@1400b000 {
+ compatible = "mediatek,mt8167-disp-wdma", "mediatek,mt8173-disp-wdma";
+ reg = <0 0x1400b000 0 0x1000>;
+ clocks = <&mmsys CLK_MM_DISP_WDMA>;
+ interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_LOW>;
+ iommus = <&iommu M4U_PORT_DISP_WDMA0>;
+ power-domains = <&spm MT8167_POWER_DOMAIN_MM>;
+ };
+
+ color: color@1400c000 {
+ compatible = "mediatek,mt8167-disp-color";
+ reg = <0 0x1400c000 0 0x1000>;
+ clocks = <&mmsys CLK_MM_DISP_COLOR>;
+ interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_LOW>;
+ power-domains = <&spm MT8167_POWER_DOMAIN_MM>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ color_in: endpoint {
+ remote-endpoint = <&ovl0_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ color_out: endpoint {
+ remote-endpoint = <&ccorr_in>;
+ };
+ };
+ };
+ };
+
+ ccorr: ccorr@1400d000 {
+ compatible = "mediatek,mt8167-disp-ccorr", "mediatek,mt8183-disp-ccorr";
+ reg = <0 0x1400d000 0 0x1000>;
+ clocks = <&mmsys CLK_MM_DISP_CCORR>;
+ interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_LOW>;
+ power-domains = <&spm MT8167_POWER_DOMAIN_MM>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ ccorr_in: endpoint {
+ remote-endpoint = <&color_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ ccorr_out: endpoint {
+ remote-endpoint = <&aal_in>;
+ };
+ };
+ };
+ };
+
+ aal: aal@1400e000 {
+ compatible = "mediatek,mt8167-disp-aal", "mediatek,mt8173-disp-aal";
+ reg = <0 0x1400e000 0 0x1000>;
+ clocks = <&mmsys CLK_MM_DISP_AAL>;
+ interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_LOW>;
+ power-domains = <&spm MT8167_POWER_DOMAIN_MM>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ aal_in: endpoint {
+ remote-endpoint = <&ccorr_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ aal_out: endpoint {
+ remote-endpoint = <&gamma_in>;
+ };
+ };
+ };
+ };
+
+ gamma: gamma@1400f000 {
+ compatible = "mediatek,mt8167-disp-gamma", "mediatek,mt8173-disp-gamma";
+ reg = <0 0x1400f000 0 0x1000>;
+ clocks = <&mmsys CLK_MM_DISP_GAMMA>;
+ interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_LOW>;
+ power-domains = <&spm MT8167_POWER_DOMAIN_MM>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ gamma_in: endpoint {
+ remote-endpoint = <&aal_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ gamma_out: endpoint {
+ remote-endpoint = <&dither_in>;
+ };
+ };
+ };
+ };
+
+ dither: dither@14010000 {
+ compatible = "mediatek,mt8167-disp-dither", "mediatek,mt8183-disp-dither";
+ reg = <0 0x14010000 0 0x1000>;
+ clocks = <&mmsys CLK_MM_DISP_DITHER>;
+ interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_LOW>;
+ power-domains = <&spm MT8167_POWER_DOMAIN_MM>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ dither_in: endpoint {
+ remote-endpoint = <&gamma_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ dither_out: endpoint {
+ remote-endpoint = <&rdma0_in>;
+ };
+ };
+ };
+ };
+
+ dsi: dsi@14012000 {
+ compatible = "mediatek,mt8167-dsi";
+ reg = <0 0x14012000 0 0x1000>;
+ clocks = <&mmsys CLK_MM_DSI_ENGINE>, <&mmsys CLK_MM_DSI_DIGITAL>,
+ <&mipi_tx>;
+ clock-names = "engine", "digital", "hs";
+ interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_LOW>;
+ phys = <&mipi_tx>;
+ phy-names = "dphy";
+ power-domains = <&spm MT8167_POWER_DOMAIN_MM>;
+ status = "disabled";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ dsi_in: endpoint {
+ remote-endpoint = <&rdma0_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ dsi_out: endpoint { };
+ };
+ };
+ };
+
+ mutex: mutex@14015000 {
+ compatible = "mediatek,mt8167-disp-mutex";
+ reg = <0 0x14015000 0 0x1000>;
+ interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_LOW>;
+ power-domains = <&spm MT8167_POWER_DOMAIN_MM>;
};
larb0: larb@14016000 {
@@ -145,6 +452,16 @@ smi_common: smi@14017000 {
power-domains = <&spm MT8167_POWER_DOMAIN_MM>;
};
+ mipi_tx: dsi-phy@14018000 {
+ compatible = "mediatek,mt8167-mipi-tx", "mediatek,mt2701-mipi-tx";
+ reg = <0 0x14018000 0 0x90>;
+ clocks = <&topckgen CLK_TOP_MIPI_26M_DBG>;
+ clock-output-names = "mipi_tx0_pll";
+ #clock-cells = <0>;
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+
imgsys: syscon@15000000 {
compatible = "mediatek,mt8167-imgsys", "syscon";
reg = <0 0x15000000 0 0x1000>;
--
2.43.0 | {
"author": "Luca Leonardo Scorcia <l.scorcia@gmail.com>",
"date": "Mon, 23 Feb 2026 16:22:48 +0000",
"is_openbsd": false,
"thread_id": "cover.1771863641.git.l.scorcia@gmail.com.mbox.gz"
} |
lkml_critique | lkml | This series adds support for the display blocks on MediaTek mt8167.
Tested on Xiaomi Mi Smart Clock x04g.
The first patch just does some reordering of dts nodes with no other
changes as this makes later patches cleaner and easier to follow.
v3:
- Added mt8167-dsi compatible to driver instead of changing the binding;
- Resolved patch formatting issues.
v2:
- Separate patch for mediatek,dsi-phy binding;
- Separate patch for mt8167-dsi binding;
- Simplified OF graph endpoints in mt8167.dtsi.
Luca Leonardo Scorcia (5):
arm64: dts: mt8167: Reorder nodes according to mmio address
dt-bindings: display: mediatek: Add compatibles for MediaTek mt8167
dt-bindings: phy: mediatek,dsi-phy: Add support for mt8167
arm64: dts: mediatek: mt8167: Add DRM nodes
drm/mediatek: dsi: Add compatible for mt8167-dsi
Val Packett (1):
gpu: drm: mediatek: ovl: add specific entry for mt8167
.../display/mediatek/mediatek,aal.yaml | 1 +
.../display/mediatek/mediatek,ccorr.yaml | 4 +-
.../display/mediatek/mediatek,dither.yaml | 1 +
.../display/mediatek/mediatek,gamma.yaml | 1 +
.../display/mediatek/mediatek,ovl.yaml | 1 +
.../display/mediatek/mediatek,rdma.yaml | 1 +
.../display/mediatek/mediatek,wdma.yaml | 4 +-
.../bindings/phy/mediatek,dsi-phy.yaml | 1 +
arch/arm64/boot/dts/mediatek/mt8167.dtsi | 381 ++++++++++++++++--
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 12 +
drivers/gpu/drm/mediatek/mtk_dsi.c | 1 +
11 files changed, 374 insertions(+), 34 deletions(-)
--
2.43.0
| null | null | null | [PATCH v3 0/6] Add support for mt8167 display blocks | The mt8167 DSI controller is fully compatible with the one found in
mt2701. Device tree documentation is already present upstream.
Signed-off-by: Luca Leonardo Scorcia <l.scorcia@gmail.com>
---
drivers/gpu/drm/mediatek/mtk_dsi.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c
index af4871de9e4c..ad10e86b161d 100644
--- a/drivers/gpu/drm/mediatek/mtk_dsi.c
+++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
@@ -1301,6 +1301,7 @@ static const struct mtk_dsi_driver_data mt8188_dsi_driver_data = {
static const struct of_device_id mtk_dsi_of_match[] = {
{ .compatible = "mediatek,mt2701-dsi", .data = &mt2701_dsi_driver_data },
+ { .compatible = "mediatek,mt8167-dsi", .data = &mt2701_dsi_driver_data },
{ .compatible = "mediatek,mt8173-dsi", .data = &mt8173_dsi_driver_data },
{ .compatible = "mediatek,mt8183-dsi", .data = &mt8183_dsi_driver_data },
{ .compatible = "mediatek,mt8186-dsi", .data = &mt8186_dsi_driver_data },
--
2.43.0 | {
"author": "Luca Leonardo Scorcia <l.scorcia@gmail.com>",
"date": "Mon, 23 Feb 2026 16:22:49 +0000",
"is_openbsd": false,
"thread_id": "cover.1771863641.git.l.scorcia@gmail.com.mbox.gz"
} |
lkml_critique | lkml | This series adds support for the display blocks on MediaTek mt8167.
Tested on Xiaomi Mi Smart Clock x04g.
The first patch just does some reordering of dts nodes with no other
changes as this makes later patches cleaner and easier to follow.
v3:
- Added mt8167-dsi compatible to driver instead of changing the binding;
- Resolved patch formatting issues.
v2:
- Separate patch for mediatek,dsi-phy binding;
- Separate patch for mt8167-dsi binding;
- Simplified OF graph endpoints in mt8167.dtsi.
Luca Leonardo Scorcia (5):
arm64: dts: mt8167: Reorder nodes according to mmio address
dt-bindings: display: mediatek: Add compatibles for MediaTek mt8167
dt-bindings: phy: mediatek,dsi-phy: Add support for mt8167
arm64: dts: mediatek: mt8167: Add DRM nodes
drm/mediatek: dsi: Add compatible for mt8167-dsi
Val Packett (1):
gpu: drm: mediatek: ovl: add specific entry for mt8167
.../display/mediatek/mediatek,aal.yaml | 1 +
.../display/mediatek/mediatek,ccorr.yaml | 4 +-
.../display/mediatek/mediatek,dither.yaml | 1 +
.../display/mediatek/mediatek,gamma.yaml | 1 +
.../display/mediatek/mediatek,ovl.yaml | 1 +
.../display/mediatek/mediatek,rdma.yaml | 1 +
.../display/mediatek/mediatek,wdma.yaml | 4 +-
.../bindings/phy/mediatek,dsi-phy.yaml | 1 +
arch/arm64/boot/dts/mediatek/mt8167.dtsi | 381 ++++++++++++++++--
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 12 +
drivers/gpu/drm/mediatek/mtk_dsi.c | 1 +
11 files changed, 374 insertions(+), 34 deletions(-)
--
2.43.0
| null | null | null | [PATCH v3 0/6] Add support for mt8167 display blocks | From: Val Packett <val@packett.cool>
While this configuration is otherwise identical to mt8173, according
to Android kernel sources, this SoC does need smi_id_en.
Signed-off-by: Val Packett <val@packett.cool>
Signed-off-by: Luca Leonardo Scorcia <l.scorcia@gmail.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
index e0236353d499..97a899e4bd99 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
@@ -671,6 +671,16 @@ static const struct mtk_disp_ovl_data mt2701_ovl_driver_data = {
.num_formats = ARRAY_SIZE(mt8173_formats),
};
+static const struct mtk_disp_ovl_data mt8167_ovl_driver_data = {
+ .addr = DISP_REG_OVL_ADDR_MT8173,
+ .gmc_bits = 8,
+ .layer_nr = 4,
+ .fmt_rgb565_is_0 = true,
+ .smi_id_en = true,
+ .formats = mt8173_formats,
+ .num_formats = ARRAY_SIZE(mt8173_formats),
+};
+
static const struct mtk_disp_ovl_data mt8173_ovl_driver_data = {
.addr = DISP_REG_OVL_ADDR_MT8173,
.gmc_bits = 8,
@@ -742,6 +752,8 @@ static const struct mtk_disp_ovl_data mt8195_ovl_driver_data = {
static const struct of_device_id mtk_disp_ovl_driver_dt_match[] = {
{ .compatible = "mediatek,mt2701-disp-ovl",
.data = &mt2701_ovl_driver_data},
+ { .compatible = "mediatek,mt8167-disp-ovl",
+ .data = &mt8167_ovl_driver_data},
{ .compatible = "mediatek,mt8173-disp-ovl",
.data = &mt8173_ovl_driver_data},
{ .compatible = "mediatek,mt8183-disp-ovl",
--
2.43.0 | {
"author": "Luca Leonardo Scorcia <l.scorcia@gmail.com>",
"date": "Mon, 23 Feb 2026 16:22:50 +0000",
"is_openbsd": false,
"thread_id": "cover.1771863641.git.l.scorcia@gmail.com.mbox.gz"
} |
lkml_critique | lkml | This series adds support for the display blocks on MediaTek mt8167.
Tested on Xiaomi Mi Smart Clock x04g.
The first patch just does some reordering of dts nodes with no other
changes as this makes later patches cleaner and easier to follow.
v3:
- Added mt8167-dsi compatible to driver instead of changing the binding;
- Resolved patch formatting issues.
v2:
- Separate patch for mediatek,dsi-phy binding;
- Separate patch for mt8167-dsi binding;
- Simplified OF graph endpoints in mt8167.dtsi.
Luca Leonardo Scorcia (5):
arm64: dts: mt8167: Reorder nodes according to mmio address
dt-bindings: display: mediatek: Add compatibles for MediaTek mt8167
dt-bindings: phy: mediatek,dsi-phy: Add support for mt8167
arm64: dts: mediatek: mt8167: Add DRM nodes
drm/mediatek: dsi: Add compatible for mt8167-dsi
Val Packett (1):
gpu: drm: mediatek: ovl: add specific entry for mt8167
.../display/mediatek/mediatek,aal.yaml | 1 +
.../display/mediatek/mediatek,ccorr.yaml | 4 +-
.../display/mediatek/mediatek,dither.yaml | 1 +
.../display/mediatek/mediatek,gamma.yaml | 1 +
.../display/mediatek/mediatek,ovl.yaml | 1 +
.../display/mediatek/mediatek,rdma.yaml | 1 +
.../display/mediatek/mediatek,wdma.yaml | 4 +-
.../bindings/phy/mediatek,dsi-phy.yaml | 1 +
arch/arm64/boot/dts/mediatek/mt8167.dtsi | 381 ++++++++++++++++--
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 12 +
drivers/gpu/drm/mediatek/mtk_dsi.c | 1 +
11 files changed, 374 insertions(+), 34 deletions(-)
--
2.43.0
| null | null | null | [PATCH v3 0/6] Add support for mt8167 display blocks | Il 23/02/26 17:22, Luca Leonardo Scorcia ha scritto:
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> | {
"author": "AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>",
"date": "Mon, 23 Feb 2026 17:39:49 +0100",
"is_openbsd": false,
"thread_id": "cover.1771863641.git.l.scorcia@gmail.com.mbox.gz"
} |
lkml_critique | lkml | This series adds support for the display blocks on MediaTek mt8167.
Tested on Xiaomi Mi Smart Clock x04g.
The first patch just does some reordering of dts nodes with no other
changes as this makes later patches cleaner and easier to follow.
v3:
- Added mt8167-dsi compatible to driver instead of changing the binding;
- Resolved patch formatting issues.
v2:
- Separate patch for mediatek,dsi-phy binding;
- Separate patch for mt8167-dsi binding;
- Simplified OF graph endpoints in mt8167.dtsi.
Luca Leonardo Scorcia (5):
arm64: dts: mt8167: Reorder nodes according to mmio address
dt-bindings: display: mediatek: Add compatibles for MediaTek mt8167
dt-bindings: phy: mediatek,dsi-phy: Add support for mt8167
arm64: dts: mediatek: mt8167: Add DRM nodes
drm/mediatek: dsi: Add compatible for mt8167-dsi
Val Packett (1):
gpu: drm: mediatek: ovl: add specific entry for mt8167
.../display/mediatek/mediatek,aal.yaml | 1 +
.../display/mediatek/mediatek,ccorr.yaml | 4 +-
.../display/mediatek/mediatek,dither.yaml | 1 +
.../display/mediatek/mediatek,gamma.yaml | 1 +
.../display/mediatek/mediatek,ovl.yaml | 1 +
.../display/mediatek/mediatek,rdma.yaml | 1 +
.../display/mediatek/mediatek,wdma.yaml | 4 +-
.../bindings/phy/mediatek,dsi-phy.yaml | 1 +
arch/arm64/boot/dts/mediatek/mt8167.dtsi | 381 ++++++++++++++++--
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 12 +
drivers/gpu/drm/mediatek/mtk_dsi.c | 1 +
11 files changed, 374 insertions(+), 34 deletions(-)
--
2.43.0
| null | null | null | [PATCH v3 0/6] Add support for mt8167 display blocks | On Mon, 23 Feb 2026 16:22:44 +0000, Luca Leonardo Scorcia wrote:
Applied to v7.0-next/dts64, thanks!
[1/6] arm64: dts: mt8167: Reorder nodes according to mmio address
commit: d51b7191f2072e11259edd2bff88385891d0ae56
Cheers,
Angelo | {
"author": "AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>",
"date": "Tue, 24 Feb 2026 10:34:01 +0100",
"is_openbsd": false,
"thread_id": "cover.1771863641.git.l.scorcia@gmail.com.mbox.gz"
} |
lkml_critique | lkml | This series adds support for the display blocks on MediaTek mt8167.
Tested on Xiaomi Mi Smart Clock x04g.
The first patch just does some reordering of dts nodes with no other
changes as this makes later patches cleaner and easier to follow.
v3:
- Added mt8167-dsi compatible to driver instead of changing the binding;
- Resolved patch formatting issues.
v2:
- Separate patch for mediatek,dsi-phy binding;
- Separate patch for mt8167-dsi binding;
- Simplified OF graph endpoints in mt8167.dtsi.
Luca Leonardo Scorcia (5):
arm64: dts: mt8167: Reorder nodes according to mmio address
dt-bindings: display: mediatek: Add compatibles for MediaTek mt8167
dt-bindings: phy: mediatek,dsi-phy: Add support for mt8167
arm64: dts: mediatek: mt8167: Add DRM nodes
drm/mediatek: dsi: Add compatible for mt8167-dsi
Val Packett (1):
gpu: drm: mediatek: ovl: add specific entry for mt8167
.../display/mediatek/mediatek,aal.yaml | 1 +
.../display/mediatek/mediatek,ccorr.yaml | 4 +-
.../display/mediatek/mediatek,dither.yaml | 1 +
.../display/mediatek/mediatek,gamma.yaml | 1 +
.../display/mediatek/mediatek,ovl.yaml | 1 +
.../display/mediatek/mediatek,rdma.yaml | 1 +
.../display/mediatek/mediatek,wdma.yaml | 4 +-
.../bindings/phy/mediatek,dsi-phy.yaml | 1 +
arch/arm64/boot/dts/mediatek/mt8167.dtsi | 381 ++++++++++++++++--
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 12 +
drivers/gpu/drm/mediatek/mtk_dsi.c | 1 +
11 files changed, 374 insertions(+), 34 deletions(-)
--
2.43.0
| null | null | null | [PATCH v3 0/6] Add support for mt8167 display blocks | On Mon, 2026-02-23 at 16:22 +0000, Luca Leonardo Scorcia wrote:
Reviewed-by: CK Hu <ck.hu@mediatek.com> | {
"author": "=?utf-8?B?Q0sgSHUgKOiDoeS/iuWFiSk=?= <ck.hu@mediatek.com>",
"date": "Wed, 25 Feb 2026 02:23:37 +0000",
"is_openbsd": false,
"thread_id": "cover.1771863641.git.l.scorcia@gmail.com.mbox.gz"
} |
lkml_critique | lkml | This series adds support for the display blocks on MediaTek mt8167.
Tested on Xiaomi Mi Smart Clock x04g.
The first patch just does some reordering of dts nodes with no other
changes as this makes later patches cleaner and easier to follow.
v3:
- Added mt8167-dsi compatible to driver instead of changing the binding;
- Resolved patch formatting issues.
v2:
- Separate patch for mediatek,dsi-phy binding;
- Separate patch for mt8167-dsi binding;
- Simplified OF graph endpoints in mt8167.dtsi.
Luca Leonardo Scorcia (5):
arm64: dts: mt8167: Reorder nodes according to mmio address
dt-bindings: display: mediatek: Add compatibles for MediaTek mt8167
dt-bindings: phy: mediatek,dsi-phy: Add support for mt8167
arm64: dts: mediatek: mt8167: Add DRM nodes
drm/mediatek: dsi: Add compatible for mt8167-dsi
Val Packett (1):
gpu: drm: mediatek: ovl: add specific entry for mt8167
.../display/mediatek/mediatek,aal.yaml | 1 +
.../display/mediatek/mediatek,ccorr.yaml | 4 +-
.../display/mediatek/mediatek,dither.yaml | 1 +
.../display/mediatek/mediatek,gamma.yaml | 1 +
.../display/mediatek/mediatek,ovl.yaml | 1 +
.../display/mediatek/mediatek,rdma.yaml | 1 +
.../display/mediatek/mediatek,wdma.yaml | 4 +-
.../bindings/phy/mediatek,dsi-phy.yaml | 1 +
arch/arm64/boot/dts/mediatek/mt8167.dtsi | 381 ++++++++++++++++--
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 12 +
drivers/gpu/drm/mediatek/mtk_dsi.c | 1 +
11 files changed, 374 insertions(+), 34 deletions(-)
--
2.43.0
| null | null | null | [PATCH v3 0/6] Add support for mt8167 display blocks | On Mon, 2026-02-23 at 16:22 +0000, Luca Leonardo Scorcia wrote:
If mt8167 DSI is fully compatible with mt2701 DSI, I think the binding document and device tree should be modified.
In device tree,
compatible = "mediatek,mt8167-dsi", "mediatek,mt2701-dsi";
And this patch is not necessary. | {
"author": "=?utf-8?B?Q0sgSHUgKOiDoeS/iuWFiSk=?= <ck.hu@mediatek.com>",
"date": "Wed, 25 Feb 2026 02:41:03 +0000",
"is_openbsd": false,
"thread_id": "cover.1771863641.git.l.scorcia@gmail.com.mbox.gz"
} |
lkml_critique | lkml | This series adds support for the display blocks on MediaTek mt8167.
Tested on Xiaomi Mi Smart Clock x04g.
The first patch just does some reordering of dts nodes with no other
changes as this makes later patches cleaner and easier to follow.
v3:
- Added mt8167-dsi compatible to driver instead of changing the binding;
- Resolved patch formatting issues.
v2:
- Separate patch for mediatek,dsi-phy binding;
- Separate patch for mt8167-dsi binding;
- Simplified OF graph endpoints in mt8167.dtsi.
Luca Leonardo Scorcia (5):
arm64: dts: mt8167: Reorder nodes according to mmio address
dt-bindings: display: mediatek: Add compatibles for MediaTek mt8167
dt-bindings: phy: mediatek,dsi-phy: Add support for mt8167
arm64: dts: mediatek: mt8167: Add DRM nodes
drm/mediatek: dsi: Add compatible for mt8167-dsi
Val Packett (1):
gpu: drm: mediatek: ovl: add specific entry for mt8167
.../display/mediatek/mediatek,aal.yaml | 1 +
.../display/mediatek/mediatek,ccorr.yaml | 4 +-
.../display/mediatek/mediatek,dither.yaml | 1 +
.../display/mediatek/mediatek,gamma.yaml | 1 +
.../display/mediatek/mediatek,ovl.yaml | 1 +
.../display/mediatek/mediatek,rdma.yaml | 1 +
.../display/mediatek/mediatek,wdma.yaml | 4 +-
.../bindings/phy/mediatek,dsi-phy.yaml | 1 +
arch/arm64/boot/dts/mediatek/mt8167.dtsi | 381 ++++++++++++++++--
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 12 +
drivers/gpu/drm/mediatek/mtk_dsi.c | 1 +
11 files changed, 374 insertions(+), 34 deletions(-)
--
2.43.0
| null | null | null | [PATCH v3 0/6] Add support for mt8167 display blocks | title:
drm/mediatek: ovl: add specific entry for mt8167
After this modification,
Reviewed-by: CK Hu <ck.hu@mediatek.com>
On Mon, 2026-02-23 at 16:22 +0000, Luca Leonardo Scorcia wrote: | {
"author": "=?utf-8?B?Q0sgSHUgKOiDoeS/iuWFiSk=?= <ck.hu@mediatek.com>",
"date": "Wed, 25 Feb 2026 02:52:46 +0000",
"is_openbsd": false,
"thread_id": "cover.1771863641.git.l.scorcia@gmail.com.mbox.gz"
} |
lkml_critique | lkml | This series adds support for the display blocks on MediaTek mt8167.
Tested on Xiaomi Mi Smart Clock x04g.
The first patch just does some reordering of dts nodes with no other
changes as this makes later patches cleaner and easier to follow.
v3:
- Added mt8167-dsi compatible to driver instead of changing the binding;
- Resolved patch formatting issues.
v2:
- Separate patch for mediatek,dsi-phy binding;
- Separate patch for mt8167-dsi binding;
- Simplified OF graph endpoints in mt8167.dtsi.
Luca Leonardo Scorcia (5):
arm64: dts: mt8167: Reorder nodes according to mmio address
dt-bindings: display: mediatek: Add compatibles for MediaTek mt8167
dt-bindings: phy: mediatek,dsi-phy: Add support for mt8167
arm64: dts: mediatek: mt8167: Add DRM nodes
drm/mediatek: dsi: Add compatible for mt8167-dsi
Val Packett (1):
gpu: drm: mediatek: ovl: add specific entry for mt8167
.../display/mediatek/mediatek,aal.yaml | 1 +
.../display/mediatek/mediatek,ccorr.yaml | 4 +-
.../display/mediatek/mediatek,dither.yaml | 1 +
.../display/mediatek/mediatek,gamma.yaml | 1 +
.../display/mediatek/mediatek,ovl.yaml | 1 +
.../display/mediatek/mediatek,rdma.yaml | 1 +
.../display/mediatek/mediatek,wdma.yaml | 4 +-
.../bindings/phy/mediatek,dsi-phy.yaml | 1 +
arch/arm64/boot/dts/mediatek/mt8167.dtsi | 381 ++++++++++++++++--
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 12 +
drivers/gpu/drm/mediatek/mtk_dsi.c | 1 +
11 files changed, 374 insertions(+), 34 deletions(-)
--
2.43.0
| null | null | null | [PATCH v3 0/6] Add support for mt8167 display blocks | Hi, if I understand your review correctly that's what v2 [1] of this
patch did, but the change was rejected during review.
As far as I can see there is no win-win solution here. This tricky
situation derives from the fact that in last year's submissions the
change was only partially merged - the bindings went upstream while
the driver did not, and now we have to work around this. In v3 I tried
to address the issue by actually implementing what the binding
document says.
I'll be happy to resubmit v4 but I need to know what's the consensus here.
Thanks!
[1] https://patchwork.kernel.org/project/linux-mediatek/patch/ff920a7cc94f2b0c03d4bb55142030fded30d07c.1771258407.git.l.scorcia@gmail.com/
--
Luca Leonardo Scorcia
l.scorcia@gmail.com | {
"author": "Luca Leonardo Scorcia <l.scorcia@gmail.com>",
"date": "Wed, 25 Feb 2026 09:15:54 +0100",
"is_openbsd": false,
"thread_id": "cover.1771863641.git.l.scorcia@gmail.com.mbox.gz"
} |
lkml_critique | lkml | This series adds support for the display blocks on MediaTek mt8167.
Tested on Xiaomi Mi Smart Clock x04g.
The first patch just does some reordering of dts nodes with no other
changes as this makes later patches cleaner and easier to follow.
v3:
- Added mt8167-dsi compatible to driver instead of changing the binding;
- Resolved patch formatting issues.
v2:
- Separate patch for mediatek,dsi-phy binding;
- Separate patch for mt8167-dsi binding;
- Simplified OF graph endpoints in mt8167.dtsi.
Luca Leonardo Scorcia (5):
arm64: dts: mt8167: Reorder nodes according to mmio address
dt-bindings: display: mediatek: Add compatibles for MediaTek mt8167
dt-bindings: phy: mediatek,dsi-phy: Add support for mt8167
arm64: dts: mediatek: mt8167: Add DRM nodes
drm/mediatek: dsi: Add compatible for mt8167-dsi
Val Packett (1):
gpu: drm: mediatek: ovl: add specific entry for mt8167
.../display/mediatek/mediatek,aal.yaml | 1 +
.../display/mediatek/mediatek,ccorr.yaml | 4 +-
.../display/mediatek/mediatek,dither.yaml | 1 +
.../display/mediatek/mediatek,gamma.yaml | 1 +
.../display/mediatek/mediatek,ovl.yaml | 1 +
.../display/mediatek/mediatek,rdma.yaml | 1 +
.../display/mediatek/mediatek,wdma.yaml | 4 +-
.../bindings/phy/mediatek,dsi-phy.yaml | 1 +
arch/arm64/boot/dts/mediatek/mt8167.dtsi | 381 ++++++++++++++++--
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 12 +
drivers/gpu/drm/mediatek/mtk_dsi.c | 1 +
11 files changed, 374 insertions(+), 34 deletions(-)
--
2.43.0
| null | null | null | [PATCH v3 0/6] Add support for mt8167 display blocks | On Mon, 23 Feb 2026 16:22:44 +0000, Luca Leonardo Scorcia wrote:
Applied, thanks!
[3/6] dt-bindings: phy: mediatek,dsi-phy: Add support for mt8167
commit: 7df891f2c39442c120fb4f9bfdd7c80e6de84015
Best regards,
--
~Vinod | {
"author": "Vinod Koul <vkoul@kernel.org>",
"date": "Fri, 27 Feb 2026 20:59:17 +0530",
"is_openbsd": false,
"thread_id": "cover.1771863641.git.l.scorcia@gmail.com.mbox.gz"
} |
lkml_critique | lkml | Aside from the issue described below, tailroom calculation does not account
for pages being split between frags, e.g. in i40e, enetc and
AF_XDP ZC with smaller chunks. These series address the problem by
calculating modulo (skb_frag_off() % rxq->frag_size) in order to get
data offset within a smaller block of memory. Please note, xskxceiver
tail grow test passes without modulo e.g. in xdpdrv mode on i40e,
because there is not enough descriptors to get to flipped buffers.
Many ethernet drivers report xdp Rx queue frag size as being the same as
DMA write size. However, the only user of this field, namely
bpf_xdp_frags_increase_tail(), clearly expects a truesize.
Such difference leads to unspecific memory corruption issues under certain
circumstances, e.g. in ixgbevf maximum DMA write size is 3 KB, so when
running xskxceiver's XDP_ADJUST_TAIL_GROW_MULTI_BUFF, 6K packet fully uses
all DMA-writable space in 2 buffers. This would be fine, if only
rxq->frag_size was properly set to 4K, but value of 3K results in a
negative tailroom, because there is a non-zero page offset.
We are supposed to return -EINVAL and be done with it in such case,
but due to tailroom being stored as an unsigned int, it is reported to be
somewhere near UINT_MAX, resulting in a tail being grown, even if the
requested offset is too much(it is around 2K in the abovementioned test).
This later leads to all kinds of unspecific calltraces.
[ 7340.337579] xskxceiver[1440]: segfault at 1da718 ip 00007f4161aeac9d sp 00007f41615a6a00 error 6
[ 7340.338040] xskxceiver[1441]: segfault at 7f410000000b ip 00000000004042b5 sp 00007f415bffecf0 error 4
[ 7340.338179] in libc.so.6[61c9d,7f4161aaf000+160000]
[ 7340.339230] in xskxceiver[42b5,400000+69000]
[ 7340.340300] likely on CPU 6 (core 0, socket 6)
[ 7340.340302] Code: ff ff 01 e9 f4 fe ff ff 0f 1f 44 00 00 4c 39 f0 74 73 31 c0 ba 01 00 00 00 f0 0f b1 17 0f 85 ba 00 00 00 49 8b 87 88 00 00 00 <4c> 89 70 08 eb cc 0f 1f 44 00 00 48 8d bd f0 fe ff ff 89 85 ec fe
[ 7340.340888] likely on CPU 3 (core 0, socket 3)
[ 7340.345088] Code: 00 00 00 ba 00 00 00 00 be 00 00 00 00 89 c7 e8 31 ca ff ff 89 45 ec 8b 45 ec 85 c0 78 07 b8 00 00 00 00 eb 46 e8 0b c8 ff ff <8b> 00 83 f8 69 74 24 e8 ff c7 ff ff 8b 00 83 f8 0b 74 18 e8 f3 c7
[ 7340.404334] Oops: general protection fault, probably for non-canonical address 0x6d255010bdffc: 0000 [#1] SMP NOPTI
[ 7340.405972] CPU: 7 UID: 0 PID: 1439 Comm: xskxceiver Not tainted 6.19.0-rc1+ #21 PREEMPT(lazy)
[ 7340.408006] Hardware name: QEMU Standard PC (Q35 + ICH9, 2009), BIOS 1.17.0-5.fc42 04/01/2014
[ 7340.409716] RIP: 0010:lookup_swap_cgroup_id+0x44/0x80
[ 7340.410455] Code: 83 f8 1c 73 39 48 ba ff ff ff ff ff ff ff 03 48 8b 04 c5 20 55 fa bd 48 21 d1 48 89 ca 83 e1 01 48 d1 ea c1 e1 04 48 8d 04 90 <8b> 00 48 83 c4 10 d3 e8 c3 cc cc cc cc 31 c0 e9 98 b7 dd 00 48 89
[ 7340.412787] RSP: 0018:ffffcc5c04f7f6d0 EFLAGS: 00010202
[ 7340.413494] RAX: 0006d255010bdffc RBX: ffff891f477895a8 RCX: 0000000000000010
[ 7340.414431] RDX: 0001c17e3fffffff RSI: 00fa070000000000 RDI: 000382fc7fffffff
[ 7340.415354] RBP: 00fa070000000000 R08: ffffcc5c04f7f8f8 R09: ffffcc5c04f7f7d0
[ 7340.416283] R10: ffff891f4c1a7000 R11: ffffcc5c04f7f9c8 R12: ffffcc5c04f7f7d0
[ 7340.417218] R13: 03ffffffffffffff R14: 00fa06fffffffe00 R15: ffff891f47789500
[ 7340.418229] FS: 0000000000000000(0000) GS:ffff891ffdfaa000(0000) knlGS:0000000000000000
[ 7340.419489] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[ 7340.420286] CR2: 00007f415bfffd58 CR3: 0000000103f03002 CR4: 0000000000772ef0
[ 7340.421237] PKRU: 55555554
[ 7340.421623] Call Trace:
[ 7340.421987] <TASK>
[ 7340.422309] ? softleaf_from_pte+0x77/0xa0
[ 7340.422855] swap_pte_batch+0xa7/0x290
[ 7340.423363] zap_nonpresent_ptes.constprop.0.isra.0+0xd1/0x270
[ 7340.424102] zap_pte_range+0x281/0x580
[ 7340.424607] zap_pmd_range.isra.0+0xc9/0x240
[ 7340.425177] unmap_page_range+0x24d/0x420
[ 7340.425714] unmap_vmas+0xa1/0x180
[ 7340.426185] exit_mmap+0xe1/0x3b0
[ 7340.426644] __mmput+0x41/0x150
[ 7340.427098] exit_mm+0xb1/0x110
[ 7340.427539] do_exit+0x1b2/0x460
[ 7340.427992] do_group_exit+0x2d/0xc0
[ 7340.428477] get_signal+0x79d/0x7e0
[ 7340.428957] arch_do_signal_or_restart+0x34/0x100
[ 7340.429571] exit_to_user_mode_loop+0x8e/0x4c0
[ 7340.430159] do_syscall_64+0x188/0x6b0
[ 7340.430672] ? __do_sys_clone3+0xd9/0x120
[ 7340.431212] ? switch_fpu_return+0x4e/0xd0
[ 7340.431761] ? arch_exit_to_user_mode_prepare.isra.0+0xa1/0xc0
[ 7340.432498] ? do_syscall_64+0xbb/0x6b0
[ 7340.433015] ? __handle_mm_fault+0x445/0x690
[ 7340.433582] ? count_memcg_events+0xd6/0x210
[ 7340.434151] ? handle_mm_fault+0x212/0x340
[ 7340.434697] ? do_user_addr_fault+0x2b4/0x7b0
[ 7340.435271] ? clear_bhb_loop+0x30/0x80
[ 7340.435788] ? clear_bhb_loop+0x30/0x80
[ 7340.436299] ? clear_bhb_loop+0x30/0x80
[ 7340.436812] ? clear_bhb_loop+0x30/0x80
[ 7340.437323] entry_SYSCALL_64_after_hwframe+0x76/0x7e
[ 7340.437973] RIP: 0033:0x7f4161b14169
[ 7340.438468] Code: Unable to access opcode bytes at 0x7f4161b1413f.
[ 7340.439242] RSP: 002b:00007ffc6ebfa770 EFLAGS: 00000246 ORIG_RAX: 00000000000000ca
[ 7340.440173] RAX: fffffffffffffe00 RBX: 00000000000005a1 RCX: 00007f4161b14169
[ 7340.441061] RDX: 00000000000005a1 RSI: 0000000000000109 RDI: 00007f415bfff990
[ 7340.441943] RBP: 00007ffc6ebfa7a0 R08: 0000000000000000 R09: 00000000ffffffff
[ 7340.442824] R10: 0000000000000000 R11: 0000000000000246 R12: 0000000000000000
[ 7340.443707] R13: 0000000000000000 R14: 00007f415bfff990 R15: 00007f415bfff6c0
[ 7340.444586] </TASK>
[ 7340.444922] Modules linked in: rfkill intel_rapl_msr intel_rapl_common intel_uncore_frequency_common skx_edac_common nfit libnvdimm kvm_intel vfat fat kvm snd_pcm irqbypass rapl iTCO_wdt snd_timer intel_pmc_bxt iTCO_vendor_support snd ixgbevf virtio_net soundcore i2c_i801 pcspkr libeth_xdp net_failover i2c_smbus lpc_ich failover libeth virtio_balloon joydev 9p fuse loop zram lz4hc_compress lz4_compress 9pnet_virtio 9pnet netfs ghash_clmulni_intel serio_raw qemu_fw_cfg
[ 7340.449650] ---[ end trace 0000000000000000 ]---
The issue can be fixed in all in-tree drivers, but we cannot just trust OOT
drivers to not do this. Therefore, make tailroom a signed int and produce a
warning when it is negative to prevent such mistakes in the future.
The issue can also be easily reproduced with ice driver, by applying
the following diff to xskxceiver and enjoying a kernel panic in xdpdrv mode:
diff --git a/tools/testing/selftests/bpf/prog_tests/test_xsk.c b/tools/testing/selftests/bpf/prog_tests/test_xsk.c
index 5af28f359cfd..042d587fa7ef 100644
--- a/tools/testing/selftests/bpf/prog_tests/test_xsk.c
+++ b/tools/testing/selftests/bpf/prog_tests/test_xsk.c
@@ -2541,8 +2541,8 @@ int testapp_adjust_tail_grow_mb(struct test_spec *test)
{
test->mtu = MAX_ETH_JUMBO_SIZE;
/* Grow by (frag_size - last_frag_Size) - 1 to stay inside the last fragment */
- return testapp_adjust_tail(test, (XSK_UMEM__MAX_FRAME_SIZE / 2) - 1,
- XSK_UMEM__LARGE_FRAME_SIZE * 2);
+ return testapp_adjust_tail(test, XSK_UMEM__MAX_FRAME_SIZE * 100,
+ 6912);
}
int testapp_tx_queue_consumer(struct test_spec *test)
If we print out the values involved in the tailroom calculation:
tailroom = rxq->frag_size - skb_frag_size(frag) - skb_frag_off(frag);
4294967040 = 3456 - 3456 - 256
I personally reproduced and verified the issue in ice and i40e,
aside from WiP ixgbevf implementation.
v3->v2:
* unregister XDP RxQ info for subfunction in ice
* remove rx_buf_len variable in ice
* add missing ifdefed empty definition xsk_pool_get_rx_frag_step()
* move xsk_pool_get_rx_frag_step() call from idpf to libeth
* simplify conditions when determining frag_size in idpf
* correctly init xdp_frame_sz for non-main VSI in i40e
v1->v2:
* add modulo to calculate offset within chunk
* add helper for AF_XDP ZC queues
* fix the problem in ZC mode in i40e, ice and idpf
* verify solution in i40e
* fix RxQ info registering in i40e
* fix splitq handling in idpf
* do not use word truesize unless the value used is named trusize
Larysa Zaremba (9):
xdp: use modulo operation to calculate XDP frag tailroom
xsk: introduce helper to determine rxq->frag_size
ice: fix rxq info registering in mbuf packets
ice: change XDP RxQ frag_size from DMA write length to xdp.frame_sz
i40e: fix registering XDP RxQ info
i40e: use xdp.frame_sz as XDP RxQ info frag_size
libeth, idpf: use truesize as XDP RxQ info frag_size
net: enetc: use truesize as XDP RxQ info frag_size
xdp: produce a warning when calculated tailroom is negative
drivers/net/ethernet/freescale/enetc/enetc.c | 2 +-
drivers/net/ethernet/intel/i40e/i40e_main.c | 40 +++++++++++---------
drivers/net/ethernet/intel/i40e/i40e_txrx.c | 5 ++-
drivers/net/ethernet/intel/ice/ice_base.c | 33 +++++-----------
drivers/net/ethernet/intel/ice/ice_txrx.c | 3 +-
drivers/net/ethernet/intel/ice/ice_xsk.c | 3 ++
drivers/net/ethernet/intel/idpf/xdp.c | 6 ++-
drivers/net/ethernet/intel/idpf/xsk.c | 1 +
drivers/net/ethernet/intel/libeth/xsk.c | 1 +
include/net/libeth/xsk.h | 3 ++
include/net/xdp_sock_drv.h | 10 +++++
net/core/filter.c | 6 ++-
12 files changed, 66 insertions(+), 47 deletions(-)
--
2.52.0
| null | null | null | [PATCH bpf v3 0/9] Address XDP frags having negative tailroom | The current formula for calculating XDP tailroom in mbuf packets works only
if each frag has its own page (if rxq->frag_size is PAGE_SIZE), this
defeats the purpose of the parameter overall and without any indication
leads to negative calculated tailroom on at least half of frags, if shared
pages are used.
There are not many drivers that set rxq->frag_size. Among them:
* i40e and enetc always split page uniformly between frags, use shared
pages
* ice uses page_pool frags via libeth, those are power-of-2 and uniformly
distributed across page
* idpf has variable frag_size with XDP on, so current API is not applicable
* mlx5, mtk and mvneta use PAGE_SIZE or 0 as frag_size for page_pool
As for AF_XDP ZC, only ice, i40e and idpf declare frag_size for it. Modulo
operation yields good results for aligned chunks, they are all power-of-2,
between 2K and PAGE_SIZE. Formula without modulo fails when chunk_size is
2K. Buffers in unaligned mode are not distributed uniformly, so modulo
operation would not work.
To accommodate unaligned buffers, we could define frag_size as
data + tailroom, and hence do not subtract offset when calculating
tailroom, but this would necessitate more changes in the drivers.
Define rxq->frag_size as an even portion of a page that fully belongs to a
single frag. When calculating tailroom, locate the data start within such
portion by performing a modulo operation on page offset.
Fixes: bf25146a5595 ("bpf: add frags support to the bpf_xdp_adjust_tail() API")
Acked-by: Jakub Kicinski <kuba@kernel.org>
Signed-off-by: Larysa Zaremba <larysa.zaremba@intel.com>
---
net/core/filter.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/net/core/filter.c b/net/core/filter.c
index ba019ded773d..5f5489665c58 100644
--- a/net/core/filter.c
+++ b/net/core/filter.c
@@ -4156,7 +4156,8 @@ static int bpf_xdp_frags_increase_tail(struct xdp_buff *xdp, int offset)
if (!rxq->frag_size || rxq->frag_size > xdp->frame_sz)
return -EOPNOTSUPP;
- tailroom = rxq->frag_size - skb_frag_size(frag) - skb_frag_off(frag);
+ tailroom = rxq->frag_size - skb_frag_size(frag) -
+ skb_frag_off(frag) % rxq->frag_size;
if (unlikely(offset > tailroom))
return -EINVAL;
--
2.52.0 | {
"author": "Larysa Zaremba <larysa.zaremba@intel.com>",
"date": "Tue, 17 Feb 2026 14:24:39 +0100",
"is_openbsd": false,
"thread_id": "aaG4z7ZIARBAzueO@boxer.mbox.gz"
} |
lkml_critique | lkml | Aside from the issue described below, tailroom calculation does not account
for pages being split between frags, e.g. in i40e, enetc and
AF_XDP ZC with smaller chunks. These series address the problem by
calculating modulo (skb_frag_off() % rxq->frag_size) in order to get
data offset within a smaller block of memory. Please note, xskxceiver
tail grow test passes without modulo e.g. in xdpdrv mode on i40e,
because there is not enough descriptors to get to flipped buffers.
Many ethernet drivers report xdp Rx queue frag size as being the same as
DMA write size. However, the only user of this field, namely
bpf_xdp_frags_increase_tail(), clearly expects a truesize.
Such difference leads to unspecific memory corruption issues under certain
circumstances, e.g. in ixgbevf maximum DMA write size is 3 KB, so when
running xskxceiver's XDP_ADJUST_TAIL_GROW_MULTI_BUFF, 6K packet fully uses
all DMA-writable space in 2 buffers. This would be fine, if only
rxq->frag_size was properly set to 4K, but value of 3K results in a
negative tailroom, because there is a non-zero page offset.
We are supposed to return -EINVAL and be done with it in such case,
but due to tailroom being stored as an unsigned int, it is reported to be
somewhere near UINT_MAX, resulting in a tail being grown, even if the
requested offset is too much(it is around 2K in the abovementioned test).
This later leads to all kinds of unspecific calltraces.
[ 7340.337579] xskxceiver[1440]: segfault at 1da718 ip 00007f4161aeac9d sp 00007f41615a6a00 error 6
[ 7340.338040] xskxceiver[1441]: segfault at 7f410000000b ip 00000000004042b5 sp 00007f415bffecf0 error 4
[ 7340.338179] in libc.so.6[61c9d,7f4161aaf000+160000]
[ 7340.339230] in xskxceiver[42b5,400000+69000]
[ 7340.340300] likely on CPU 6 (core 0, socket 6)
[ 7340.340302] Code: ff ff 01 e9 f4 fe ff ff 0f 1f 44 00 00 4c 39 f0 74 73 31 c0 ba 01 00 00 00 f0 0f b1 17 0f 85 ba 00 00 00 49 8b 87 88 00 00 00 <4c> 89 70 08 eb cc 0f 1f 44 00 00 48 8d bd f0 fe ff ff 89 85 ec fe
[ 7340.340888] likely on CPU 3 (core 0, socket 3)
[ 7340.345088] Code: 00 00 00 ba 00 00 00 00 be 00 00 00 00 89 c7 e8 31 ca ff ff 89 45 ec 8b 45 ec 85 c0 78 07 b8 00 00 00 00 eb 46 e8 0b c8 ff ff <8b> 00 83 f8 69 74 24 e8 ff c7 ff ff 8b 00 83 f8 0b 74 18 e8 f3 c7
[ 7340.404334] Oops: general protection fault, probably for non-canonical address 0x6d255010bdffc: 0000 [#1] SMP NOPTI
[ 7340.405972] CPU: 7 UID: 0 PID: 1439 Comm: xskxceiver Not tainted 6.19.0-rc1+ #21 PREEMPT(lazy)
[ 7340.408006] Hardware name: QEMU Standard PC (Q35 + ICH9, 2009), BIOS 1.17.0-5.fc42 04/01/2014
[ 7340.409716] RIP: 0010:lookup_swap_cgroup_id+0x44/0x80
[ 7340.410455] Code: 83 f8 1c 73 39 48 ba ff ff ff ff ff ff ff 03 48 8b 04 c5 20 55 fa bd 48 21 d1 48 89 ca 83 e1 01 48 d1 ea c1 e1 04 48 8d 04 90 <8b> 00 48 83 c4 10 d3 e8 c3 cc cc cc cc 31 c0 e9 98 b7 dd 00 48 89
[ 7340.412787] RSP: 0018:ffffcc5c04f7f6d0 EFLAGS: 00010202
[ 7340.413494] RAX: 0006d255010bdffc RBX: ffff891f477895a8 RCX: 0000000000000010
[ 7340.414431] RDX: 0001c17e3fffffff RSI: 00fa070000000000 RDI: 000382fc7fffffff
[ 7340.415354] RBP: 00fa070000000000 R08: ffffcc5c04f7f8f8 R09: ffffcc5c04f7f7d0
[ 7340.416283] R10: ffff891f4c1a7000 R11: ffffcc5c04f7f9c8 R12: ffffcc5c04f7f7d0
[ 7340.417218] R13: 03ffffffffffffff R14: 00fa06fffffffe00 R15: ffff891f47789500
[ 7340.418229] FS: 0000000000000000(0000) GS:ffff891ffdfaa000(0000) knlGS:0000000000000000
[ 7340.419489] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[ 7340.420286] CR2: 00007f415bfffd58 CR3: 0000000103f03002 CR4: 0000000000772ef0
[ 7340.421237] PKRU: 55555554
[ 7340.421623] Call Trace:
[ 7340.421987] <TASK>
[ 7340.422309] ? softleaf_from_pte+0x77/0xa0
[ 7340.422855] swap_pte_batch+0xa7/0x290
[ 7340.423363] zap_nonpresent_ptes.constprop.0.isra.0+0xd1/0x270
[ 7340.424102] zap_pte_range+0x281/0x580
[ 7340.424607] zap_pmd_range.isra.0+0xc9/0x240
[ 7340.425177] unmap_page_range+0x24d/0x420
[ 7340.425714] unmap_vmas+0xa1/0x180
[ 7340.426185] exit_mmap+0xe1/0x3b0
[ 7340.426644] __mmput+0x41/0x150
[ 7340.427098] exit_mm+0xb1/0x110
[ 7340.427539] do_exit+0x1b2/0x460
[ 7340.427992] do_group_exit+0x2d/0xc0
[ 7340.428477] get_signal+0x79d/0x7e0
[ 7340.428957] arch_do_signal_or_restart+0x34/0x100
[ 7340.429571] exit_to_user_mode_loop+0x8e/0x4c0
[ 7340.430159] do_syscall_64+0x188/0x6b0
[ 7340.430672] ? __do_sys_clone3+0xd9/0x120
[ 7340.431212] ? switch_fpu_return+0x4e/0xd0
[ 7340.431761] ? arch_exit_to_user_mode_prepare.isra.0+0xa1/0xc0
[ 7340.432498] ? do_syscall_64+0xbb/0x6b0
[ 7340.433015] ? __handle_mm_fault+0x445/0x690
[ 7340.433582] ? count_memcg_events+0xd6/0x210
[ 7340.434151] ? handle_mm_fault+0x212/0x340
[ 7340.434697] ? do_user_addr_fault+0x2b4/0x7b0
[ 7340.435271] ? clear_bhb_loop+0x30/0x80
[ 7340.435788] ? clear_bhb_loop+0x30/0x80
[ 7340.436299] ? clear_bhb_loop+0x30/0x80
[ 7340.436812] ? clear_bhb_loop+0x30/0x80
[ 7340.437323] entry_SYSCALL_64_after_hwframe+0x76/0x7e
[ 7340.437973] RIP: 0033:0x7f4161b14169
[ 7340.438468] Code: Unable to access opcode bytes at 0x7f4161b1413f.
[ 7340.439242] RSP: 002b:00007ffc6ebfa770 EFLAGS: 00000246 ORIG_RAX: 00000000000000ca
[ 7340.440173] RAX: fffffffffffffe00 RBX: 00000000000005a1 RCX: 00007f4161b14169
[ 7340.441061] RDX: 00000000000005a1 RSI: 0000000000000109 RDI: 00007f415bfff990
[ 7340.441943] RBP: 00007ffc6ebfa7a0 R08: 0000000000000000 R09: 00000000ffffffff
[ 7340.442824] R10: 0000000000000000 R11: 0000000000000246 R12: 0000000000000000
[ 7340.443707] R13: 0000000000000000 R14: 00007f415bfff990 R15: 00007f415bfff6c0
[ 7340.444586] </TASK>
[ 7340.444922] Modules linked in: rfkill intel_rapl_msr intel_rapl_common intel_uncore_frequency_common skx_edac_common nfit libnvdimm kvm_intel vfat fat kvm snd_pcm irqbypass rapl iTCO_wdt snd_timer intel_pmc_bxt iTCO_vendor_support snd ixgbevf virtio_net soundcore i2c_i801 pcspkr libeth_xdp net_failover i2c_smbus lpc_ich failover libeth virtio_balloon joydev 9p fuse loop zram lz4hc_compress lz4_compress 9pnet_virtio 9pnet netfs ghash_clmulni_intel serio_raw qemu_fw_cfg
[ 7340.449650] ---[ end trace 0000000000000000 ]---
The issue can be fixed in all in-tree drivers, but we cannot just trust OOT
drivers to not do this. Therefore, make tailroom a signed int and produce a
warning when it is negative to prevent such mistakes in the future.
The issue can also be easily reproduced with ice driver, by applying
the following diff to xskxceiver and enjoying a kernel panic in xdpdrv mode:
diff --git a/tools/testing/selftests/bpf/prog_tests/test_xsk.c b/tools/testing/selftests/bpf/prog_tests/test_xsk.c
index 5af28f359cfd..042d587fa7ef 100644
--- a/tools/testing/selftests/bpf/prog_tests/test_xsk.c
+++ b/tools/testing/selftests/bpf/prog_tests/test_xsk.c
@@ -2541,8 +2541,8 @@ int testapp_adjust_tail_grow_mb(struct test_spec *test)
{
test->mtu = MAX_ETH_JUMBO_SIZE;
/* Grow by (frag_size - last_frag_Size) - 1 to stay inside the last fragment */
- return testapp_adjust_tail(test, (XSK_UMEM__MAX_FRAME_SIZE / 2) - 1,
- XSK_UMEM__LARGE_FRAME_SIZE * 2);
+ return testapp_adjust_tail(test, XSK_UMEM__MAX_FRAME_SIZE * 100,
+ 6912);
}
int testapp_tx_queue_consumer(struct test_spec *test)
If we print out the values involved in the tailroom calculation:
tailroom = rxq->frag_size - skb_frag_size(frag) - skb_frag_off(frag);
4294967040 = 3456 - 3456 - 256
I personally reproduced and verified the issue in ice and i40e,
aside from WiP ixgbevf implementation.
v3->v2:
* unregister XDP RxQ info for subfunction in ice
* remove rx_buf_len variable in ice
* add missing ifdefed empty definition xsk_pool_get_rx_frag_step()
* move xsk_pool_get_rx_frag_step() call from idpf to libeth
* simplify conditions when determining frag_size in idpf
* correctly init xdp_frame_sz for non-main VSI in i40e
v1->v2:
* add modulo to calculate offset within chunk
* add helper for AF_XDP ZC queues
* fix the problem in ZC mode in i40e, ice and idpf
* verify solution in i40e
* fix RxQ info registering in i40e
* fix splitq handling in idpf
* do not use word truesize unless the value used is named trusize
Larysa Zaremba (9):
xdp: use modulo operation to calculate XDP frag tailroom
xsk: introduce helper to determine rxq->frag_size
ice: fix rxq info registering in mbuf packets
ice: change XDP RxQ frag_size from DMA write length to xdp.frame_sz
i40e: fix registering XDP RxQ info
i40e: use xdp.frame_sz as XDP RxQ info frag_size
libeth, idpf: use truesize as XDP RxQ info frag_size
net: enetc: use truesize as XDP RxQ info frag_size
xdp: produce a warning when calculated tailroom is negative
drivers/net/ethernet/freescale/enetc/enetc.c | 2 +-
drivers/net/ethernet/intel/i40e/i40e_main.c | 40 +++++++++++---------
drivers/net/ethernet/intel/i40e/i40e_txrx.c | 5 ++-
drivers/net/ethernet/intel/ice/ice_base.c | 33 +++++-----------
drivers/net/ethernet/intel/ice/ice_txrx.c | 3 +-
drivers/net/ethernet/intel/ice/ice_xsk.c | 3 ++
drivers/net/ethernet/intel/idpf/xdp.c | 6 ++-
drivers/net/ethernet/intel/idpf/xsk.c | 1 +
drivers/net/ethernet/intel/libeth/xsk.c | 1 +
include/net/libeth/xsk.h | 3 ++
include/net/xdp_sock_drv.h | 10 +++++
net/core/filter.c | 6 ++-
12 files changed, 66 insertions(+), 47 deletions(-)
--
2.52.0
| null | null | null | [PATCH bpf v3 0/9] Address XDP frags having negative tailroom | rxq->frag_size is basically a step between consecutive strictly aligned
frames. In ZC mode, chunk size fits exactly, but if chunks are unaligned,
there is no safe way to determine accessible space to grow tailroom.
Report frag_size to be zero, if chunks are unaligned, chunk_size otherwise.
Fixes: 24ea50127ecf ("xsk: support mbuf on ZC RX")
Signed-off-by: Larysa Zaremba <larysa.zaremba@intel.com>
---
include/net/xdp_sock_drv.h | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/include/net/xdp_sock_drv.h b/include/net/xdp_sock_drv.h
index 242e34f771cc..09d972f4bd60 100644
--- a/include/net/xdp_sock_drv.h
+++ b/include/net/xdp_sock_drv.h
@@ -51,6 +51,11 @@ static inline u32 xsk_pool_get_rx_frame_size(struct xsk_buff_pool *pool)
return xsk_pool_get_chunk_size(pool) - xsk_pool_get_headroom(pool);
}
+static inline u32 xsk_pool_get_rx_frag_step(struct xsk_buff_pool *pool)
+{
+ return pool->unaligned ? 0 : xsk_pool_get_chunk_size(pool);
+}
+
static inline void xsk_pool_set_rxq_info(struct xsk_buff_pool *pool,
struct xdp_rxq_info *rxq)
{
@@ -337,6 +342,11 @@ static inline u32 xsk_pool_get_rx_frame_size(struct xsk_buff_pool *pool)
return 0;
}
+static inline u32 xsk_pool_get_rx_frag_step(struct xsk_buff_pool *pool)
+{
+ return 0;
+}
+
static inline void xsk_pool_set_rxq_info(struct xsk_buff_pool *pool,
struct xdp_rxq_info *rxq)
{
--
2.52.0 | {
"author": "Larysa Zaremba <larysa.zaremba@intel.com>",
"date": "Tue, 17 Feb 2026 14:24:40 +0100",
"is_openbsd": false,
"thread_id": "aaG4z7ZIARBAzueO@boxer.mbox.gz"
} |
lkml_critique | lkml | Aside from the issue described below, tailroom calculation does not account
for pages being split between frags, e.g. in i40e, enetc and
AF_XDP ZC with smaller chunks. These series address the problem by
calculating modulo (skb_frag_off() % rxq->frag_size) in order to get
data offset within a smaller block of memory. Please note, xskxceiver
tail grow test passes without modulo e.g. in xdpdrv mode on i40e,
because there is not enough descriptors to get to flipped buffers.
Many ethernet drivers report xdp Rx queue frag size as being the same as
DMA write size. However, the only user of this field, namely
bpf_xdp_frags_increase_tail(), clearly expects a truesize.
Such difference leads to unspecific memory corruption issues under certain
circumstances, e.g. in ixgbevf maximum DMA write size is 3 KB, so when
running xskxceiver's XDP_ADJUST_TAIL_GROW_MULTI_BUFF, 6K packet fully uses
all DMA-writable space in 2 buffers. This would be fine, if only
rxq->frag_size was properly set to 4K, but value of 3K results in a
negative tailroom, because there is a non-zero page offset.
We are supposed to return -EINVAL and be done with it in such case,
but due to tailroom being stored as an unsigned int, it is reported to be
somewhere near UINT_MAX, resulting in a tail being grown, even if the
requested offset is too much(it is around 2K in the abovementioned test).
This later leads to all kinds of unspecific calltraces.
[ 7340.337579] xskxceiver[1440]: segfault at 1da718 ip 00007f4161aeac9d sp 00007f41615a6a00 error 6
[ 7340.338040] xskxceiver[1441]: segfault at 7f410000000b ip 00000000004042b5 sp 00007f415bffecf0 error 4
[ 7340.338179] in libc.so.6[61c9d,7f4161aaf000+160000]
[ 7340.339230] in xskxceiver[42b5,400000+69000]
[ 7340.340300] likely on CPU 6 (core 0, socket 6)
[ 7340.340302] Code: ff ff 01 e9 f4 fe ff ff 0f 1f 44 00 00 4c 39 f0 74 73 31 c0 ba 01 00 00 00 f0 0f b1 17 0f 85 ba 00 00 00 49 8b 87 88 00 00 00 <4c> 89 70 08 eb cc 0f 1f 44 00 00 48 8d bd f0 fe ff ff 89 85 ec fe
[ 7340.340888] likely on CPU 3 (core 0, socket 3)
[ 7340.345088] Code: 00 00 00 ba 00 00 00 00 be 00 00 00 00 89 c7 e8 31 ca ff ff 89 45 ec 8b 45 ec 85 c0 78 07 b8 00 00 00 00 eb 46 e8 0b c8 ff ff <8b> 00 83 f8 69 74 24 e8 ff c7 ff ff 8b 00 83 f8 0b 74 18 e8 f3 c7
[ 7340.404334] Oops: general protection fault, probably for non-canonical address 0x6d255010bdffc: 0000 [#1] SMP NOPTI
[ 7340.405972] CPU: 7 UID: 0 PID: 1439 Comm: xskxceiver Not tainted 6.19.0-rc1+ #21 PREEMPT(lazy)
[ 7340.408006] Hardware name: QEMU Standard PC (Q35 + ICH9, 2009), BIOS 1.17.0-5.fc42 04/01/2014
[ 7340.409716] RIP: 0010:lookup_swap_cgroup_id+0x44/0x80
[ 7340.410455] Code: 83 f8 1c 73 39 48 ba ff ff ff ff ff ff ff 03 48 8b 04 c5 20 55 fa bd 48 21 d1 48 89 ca 83 e1 01 48 d1 ea c1 e1 04 48 8d 04 90 <8b> 00 48 83 c4 10 d3 e8 c3 cc cc cc cc 31 c0 e9 98 b7 dd 00 48 89
[ 7340.412787] RSP: 0018:ffffcc5c04f7f6d0 EFLAGS: 00010202
[ 7340.413494] RAX: 0006d255010bdffc RBX: ffff891f477895a8 RCX: 0000000000000010
[ 7340.414431] RDX: 0001c17e3fffffff RSI: 00fa070000000000 RDI: 000382fc7fffffff
[ 7340.415354] RBP: 00fa070000000000 R08: ffffcc5c04f7f8f8 R09: ffffcc5c04f7f7d0
[ 7340.416283] R10: ffff891f4c1a7000 R11: ffffcc5c04f7f9c8 R12: ffffcc5c04f7f7d0
[ 7340.417218] R13: 03ffffffffffffff R14: 00fa06fffffffe00 R15: ffff891f47789500
[ 7340.418229] FS: 0000000000000000(0000) GS:ffff891ffdfaa000(0000) knlGS:0000000000000000
[ 7340.419489] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[ 7340.420286] CR2: 00007f415bfffd58 CR3: 0000000103f03002 CR4: 0000000000772ef0
[ 7340.421237] PKRU: 55555554
[ 7340.421623] Call Trace:
[ 7340.421987] <TASK>
[ 7340.422309] ? softleaf_from_pte+0x77/0xa0
[ 7340.422855] swap_pte_batch+0xa7/0x290
[ 7340.423363] zap_nonpresent_ptes.constprop.0.isra.0+0xd1/0x270
[ 7340.424102] zap_pte_range+0x281/0x580
[ 7340.424607] zap_pmd_range.isra.0+0xc9/0x240
[ 7340.425177] unmap_page_range+0x24d/0x420
[ 7340.425714] unmap_vmas+0xa1/0x180
[ 7340.426185] exit_mmap+0xe1/0x3b0
[ 7340.426644] __mmput+0x41/0x150
[ 7340.427098] exit_mm+0xb1/0x110
[ 7340.427539] do_exit+0x1b2/0x460
[ 7340.427992] do_group_exit+0x2d/0xc0
[ 7340.428477] get_signal+0x79d/0x7e0
[ 7340.428957] arch_do_signal_or_restart+0x34/0x100
[ 7340.429571] exit_to_user_mode_loop+0x8e/0x4c0
[ 7340.430159] do_syscall_64+0x188/0x6b0
[ 7340.430672] ? __do_sys_clone3+0xd9/0x120
[ 7340.431212] ? switch_fpu_return+0x4e/0xd0
[ 7340.431761] ? arch_exit_to_user_mode_prepare.isra.0+0xa1/0xc0
[ 7340.432498] ? do_syscall_64+0xbb/0x6b0
[ 7340.433015] ? __handle_mm_fault+0x445/0x690
[ 7340.433582] ? count_memcg_events+0xd6/0x210
[ 7340.434151] ? handle_mm_fault+0x212/0x340
[ 7340.434697] ? do_user_addr_fault+0x2b4/0x7b0
[ 7340.435271] ? clear_bhb_loop+0x30/0x80
[ 7340.435788] ? clear_bhb_loop+0x30/0x80
[ 7340.436299] ? clear_bhb_loop+0x30/0x80
[ 7340.436812] ? clear_bhb_loop+0x30/0x80
[ 7340.437323] entry_SYSCALL_64_after_hwframe+0x76/0x7e
[ 7340.437973] RIP: 0033:0x7f4161b14169
[ 7340.438468] Code: Unable to access opcode bytes at 0x7f4161b1413f.
[ 7340.439242] RSP: 002b:00007ffc6ebfa770 EFLAGS: 00000246 ORIG_RAX: 00000000000000ca
[ 7340.440173] RAX: fffffffffffffe00 RBX: 00000000000005a1 RCX: 00007f4161b14169
[ 7340.441061] RDX: 00000000000005a1 RSI: 0000000000000109 RDI: 00007f415bfff990
[ 7340.441943] RBP: 00007ffc6ebfa7a0 R08: 0000000000000000 R09: 00000000ffffffff
[ 7340.442824] R10: 0000000000000000 R11: 0000000000000246 R12: 0000000000000000
[ 7340.443707] R13: 0000000000000000 R14: 00007f415bfff990 R15: 00007f415bfff6c0
[ 7340.444586] </TASK>
[ 7340.444922] Modules linked in: rfkill intel_rapl_msr intel_rapl_common intel_uncore_frequency_common skx_edac_common nfit libnvdimm kvm_intel vfat fat kvm snd_pcm irqbypass rapl iTCO_wdt snd_timer intel_pmc_bxt iTCO_vendor_support snd ixgbevf virtio_net soundcore i2c_i801 pcspkr libeth_xdp net_failover i2c_smbus lpc_ich failover libeth virtio_balloon joydev 9p fuse loop zram lz4hc_compress lz4_compress 9pnet_virtio 9pnet netfs ghash_clmulni_intel serio_raw qemu_fw_cfg
[ 7340.449650] ---[ end trace 0000000000000000 ]---
The issue can be fixed in all in-tree drivers, but we cannot just trust OOT
drivers to not do this. Therefore, make tailroom a signed int and produce a
warning when it is negative to prevent such mistakes in the future.
The issue can also be easily reproduced with ice driver, by applying
the following diff to xskxceiver and enjoying a kernel panic in xdpdrv mode:
diff --git a/tools/testing/selftests/bpf/prog_tests/test_xsk.c b/tools/testing/selftests/bpf/prog_tests/test_xsk.c
index 5af28f359cfd..042d587fa7ef 100644
--- a/tools/testing/selftests/bpf/prog_tests/test_xsk.c
+++ b/tools/testing/selftests/bpf/prog_tests/test_xsk.c
@@ -2541,8 +2541,8 @@ int testapp_adjust_tail_grow_mb(struct test_spec *test)
{
test->mtu = MAX_ETH_JUMBO_SIZE;
/* Grow by (frag_size - last_frag_Size) - 1 to stay inside the last fragment */
- return testapp_adjust_tail(test, (XSK_UMEM__MAX_FRAME_SIZE / 2) - 1,
- XSK_UMEM__LARGE_FRAME_SIZE * 2);
+ return testapp_adjust_tail(test, XSK_UMEM__MAX_FRAME_SIZE * 100,
+ 6912);
}
int testapp_tx_queue_consumer(struct test_spec *test)
If we print out the values involved in the tailroom calculation:
tailroom = rxq->frag_size - skb_frag_size(frag) - skb_frag_off(frag);
4294967040 = 3456 - 3456 - 256
I personally reproduced and verified the issue in ice and i40e,
aside from WiP ixgbevf implementation.
v3->v2:
* unregister XDP RxQ info for subfunction in ice
* remove rx_buf_len variable in ice
* add missing ifdefed empty definition xsk_pool_get_rx_frag_step()
* move xsk_pool_get_rx_frag_step() call from idpf to libeth
* simplify conditions when determining frag_size in idpf
* correctly init xdp_frame_sz for non-main VSI in i40e
v1->v2:
* add modulo to calculate offset within chunk
* add helper for AF_XDP ZC queues
* fix the problem in ZC mode in i40e, ice and idpf
* verify solution in i40e
* fix RxQ info registering in i40e
* fix splitq handling in idpf
* do not use word truesize unless the value used is named trusize
Larysa Zaremba (9):
xdp: use modulo operation to calculate XDP frag tailroom
xsk: introduce helper to determine rxq->frag_size
ice: fix rxq info registering in mbuf packets
ice: change XDP RxQ frag_size from DMA write length to xdp.frame_sz
i40e: fix registering XDP RxQ info
i40e: use xdp.frame_sz as XDP RxQ info frag_size
libeth, idpf: use truesize as XDP RxQ info frag_size
net: enetc: use truesize as XDP RxQ info frag_size
xdp: produce a warning when calculated tailroom is negative
drivers/net/ethernet/freescale/enetc/enetc.c | 2 +-
drivers/net/ethernet/intel/i40e/i40e_main.c | 40 +++++++++++---------
drivers/net/ethernet/intel/i40e/i40e_txrx.c | 5 ++-
drivers/net/ethernet/intel/ice/ice_base.c | 33 +++++-----------
drivers/net/ethernet/intel/ice/ice_txrx.c | 3 +-
drivers/net/ethernet/intel/ice/ice_xsk.c | 3 ++
drivers/net/ethernet/intel/idpf/xdp.c | 6 ++-
drivers/net/ethernet/intel/idpf/xsk.c | 1 +
drivers/net/ethernet/intel/libeth/xsk.c | 1 +
include/net/libeth/xsk.h | 3 ++
include/net/xdp_sock_drv.h | 10 +++++
net/core/filter.c | 6 ++-
12 files changed, 66 insertions(+), 47 deletions(-)
--
2.52.0
| null | null | null | [PATCH bpf v3 0/9] Address XDP frags having negative tailroom | XDP RxQ info contains frag_size, which depends on the MTU. This makes the
old way of registering RxQ info before calculating new buffer sizes
invalid. Currently, it leads to frag_size being outdated, making it
sometimes impossible to grow tailroom in a mbuf packet. E.g. fragments are
actually 3K+, but frag size is still as if MTU was 1500.
Always register new XDP RxQ info after reconfiguring memory pools.
Fixes: 93f53db9f9dc ("ice: switch to Page Pool")
Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>
Signed-off-by: Larysa Zaremba <larysa.zaremba@intel.com>
---
drivers/net/ethernet/intel/ice/ice_base.c | 26 ++++++-----------------
drivers/net/ethernet/intel/ice/ice_txrx.c | 3 ++-
drivers/net/ethernet/intel/ice/ice_xsk.c | 3 +++
3 files changed, 12 insertions(+), 20 deletions(-)
diff --git a/drivers/net/ethernet/intel/ice/ice_base.c b/drivers/net/ethernet/intel/ice/ice_base.c
index eadb1e3d12b3..511d803cf0a4 100644
--- a/drivers/net/ethernet/intel/ice/ice_base.c
+++ b/drivers/net/ethernet/intel/ice/ice_base.c
@@ -663,23 +663,12 @@ static int ice_vsi_cfg_rxq(struct ice_rx_ring *ring)
int err;
if (ring->vsi->type == ICE_VSI_PF || ring->vsi->type == ICE_VSI_SF) {
- if (!xdp_rxq_info_is_reg(&ring->xdp_rxq)) {
- err = __xdp_rxq_info_reg(&ring->xdp_rxq, ring->netdev,
- ring->q_index,
- ring->q_vector->napi.napi_id,
- ring->rx_buf_len);
- if (err)
- return err;
- }
-
ice_rx_xsk_pool(ring);
err = ice_realloc_rx_xdp_bufs(ring, ring->xsk_pool);
if (err)
return err;
if (ring->xsk_pool) {
- xdp_rxq_info_unreg(&ring->xdp_rxq);
-
rx_buf_len =
xsk_pool_get_rx_frame_size(ring->xsk_pool);
err = __xdp_rxq_info_reg(&ring->xdp_rxq, ring->netdev,
@@ -702,14 +691,13 @@ static int ice_vsi_cfg_rxq(struct ice_rx_ring *ring)
if (err)
return err;
- if (!xdp_rxq_info_is_reg(&ring->xdp_rxq)) {
- err = __xdp_rxq_info_reg(&ring->xdp_rxq, ring->netdev,
- ring->q_index,
- ring->q_vector->napi.napi_id,
- ring->rx_buf_len);
- if (err)
- goto err_destroy_fq;
- }
+ err = __xdp_rxq_info_reg(&ring->xdp_rxq, ring->netdev,
+ ring->q_index,
+ ring->q_vector->napi.napi_id,
+ ring->rx_buf_len);
+ if (err)
+ goto err_destroy_fq;
+
xdp_rxq_info_attach_page_pool(&ring->xdp_rxq,
ring->pp);
}
diff --git a/drivers/net/ethernet/intel/ice/ice_txrx.c b/drivers/net/ethernet/intel/ice/ice_txrx.c
index ad76768a4232..4c294ab7df30 100644
--- a/drivers/net/ethernet/intel/ice/ice_txrx.c
+++ b/drivers/net/ethernet/intel/ice/ice_txrx.c
@@ -560,7 +560,8 @@ void ice_clean_rx_ring(struct ice_rx_ring *rx_ring)
i = 0;
}
- if (rx_ring->vsi->type == ICE_VSI_PF &&
+ if ((rx_ring->vsi->type == ICE_VSI_PF ||
+ rx_ring->vsi->type == ICE_VSI_SF) &&
xdp_rxq_info_is_reg(&rx_ring->xdp_rxq)) {
xdp_rxq_info_detach_mem_model(&rx_ring->xdp_rxq);
xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
diff --git a/drivers/net/ethernet/intel/ice/ice_xsk.c b/drivers/net/ethernet/intel/ice/ice_xsk.c
index 989ff1fd9110..102631398af3 100644
--- a/drivers/net/ethernet/intel/ice/ice_xsk.c
+++ b/drivers/net/ethernet/intel/ice/ice_xsk.c
@@ -900,6 +900,9 @@ void ice_xsk_clean_rx_ring(struct ice_rx_ring *rx_ring)
u16 ntc = rx_ring->next_to_clean;
u16 ntu = rx_ring->next_to_use;
+ if (xdp_rxq_info_is_reg(&rx_ring->xdp_rxq))
+ xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
+
while (ntc != ntu) {
struct xdp_buff *xdp = *ice_xdp_buf(rx_ring, ntc);
--
2.52.0 | {
"author": "Larysa Zaremba <larysa.zaremba@intel.com>",
"date": "Tue, 17 Feb 2026 14:24:41 +0100",
"is_openbsd": false,
"thread_id": "aaG4z7ZIARBAzueO@boxer.mbox.gz"
} |
lkml_critique | lkml | Aside from the issue described below, tailroom calculation does not account
for pages being split between frags, e.g. in i40e, enetc and
AF_XDP ZC with smaller chunks. These series address the problem by
calculating modulo (skb_frag_off() % rxq->frag_size) in order to get
data offset within a smaller block of memory. Please note, xskxceiver
tail grow test passes without modulo e.g. in xdpdrv mode on i40e,
because there is not enough descriptors to get to flipped buffers.
Many ethernet drivers report xdp Rx queue frag size as being the same as
DMA write size. However, the only user of this field, namely
bpf_xdp_frags_increase_tail(), clearly expects a truesize.
Such difference leads to unspecific memory corruption issues under certain
circumstances, e.g. in ixgbevf maximum DMA write size is 3 KB, so when
running xskxceiver's XDP_ADJUST_TAIL_GROW_MULTI_BUFF, 6K packet fully uses
all DMA-writable space in 2 buffers. This would be fine, if only
rxq->frag_size was properly set to 4K, but value of 3K results in a
negative tailroom, because there is a non-zero page offset.
We are supposed to return -EINVAL and be done with it in such case,
but due to tailroom being stored as an unsigned int, it is reported to be
somewhere near UINT_MAX, resulting in a tail being grown, even if the
requested offset is too much(it is around 2K in the abovementioned test).
This later leads to all kinds of unspecific calltraces.
[ 7340.337579] xskxceiver[1440]: segfault at 1da718 ip 00007f4161aeac9d sp 00007f41615a6a00 error 6
[ 7340.338040] xskxceiver[1441]: segfault at 7f410000000b ip 00000000004042b5 sp 00007f415bffecf0 error 4
[ 7340.338179] in libc.so.6[61c9d,7f4161aaf000+160000]
[ 7340.339230] in xskxceiver[42b5,400000+69000]
[ 7340.340300] likely on CPU 6 (core 0, socket 6)
[ 7340.340302] Code: ff ff 01 e9 f4 fe ff ff 0f 1f 44 00 00 4c 39 f0 74 73 31 c0 ba 01 00 00 00 f0 0f b1 17 0f 85 ba 00 00 00 49 8b 87 88 00 00 00 <4c> 89 70 08 eb cc 0f 1f 44 00 00 48 8d bd f0 fe ff ff 89 85 ec fe
[ 7340.340888] likely on CPU 3 (core 0, socket 3)
[ 7340.345088] Code: 00 00 00 ba 00 00 00 00 be 00 00 00 00 89 c7 e8 31 ca ff ff 89 45 ec 8b 45 ec 85 c0 78 07 b8 00 00 00 00 eb 46 e8 0b c8 ff ff <8b> 00 83 f8 69 74 24 e8 ff c7 ff ff 8b 00 83 f8 0b 74 18 e8 f3 c7
[ 7340.404334] Oops: general protection fault, probably for non-canonical address 0x6d255010bdffc: 0000 [#1] SMP NOPTI
[ 7340.405972] CPU: 7 UID: 0 PID: 1439 Comm: xskxceiver Not tainted 6.19.0-rc1+ #21 PREEMPT(lazy)
[ 7340.408006] Hardware name: QEMU Standard PC (Q35 + ICH9, 2009), BIOS 1.17.0-5.fc42 04/01/2014
[ 7340.409716] RIP: 0010:lookup_swap_cgroup_id+0x44/0x80
[ 7340.410455] Code: 83 f8 1c 73 39 48 ba ff ff ff ff ff ff ff 03 48 8b 04 c5 20 55 fa bd 48 21 d1 48 89 ca 83 e1 01 48 d1 ea c1 e1 04 48 8d 04 90 <8b> 00 48 83 c4 10 d3 e8 c3 cc cc cc cc 31 c0 e9 98 b7 dd 00 48 89
[ 7340.412787] RSP: 0018:ffffcc5c04f7f6d0 EFLAGS: 00010202
[ 7340.413494] RAX: 0006d255010bdffc RBX: ffff891f477895a8 RCX: 0000000000000010
[ 7340.414431] RDX: 0001c17e3fffffff RSI: 00fa070000000000 RDI: 000382fc7fffffff
[ 7340.415354] RBP: 00fa070000000000 R08: ffffcc5c04f7f8f8 R09: ffffcc5c04f7f7d0
[ 7340.416283] R10: ffff891f4c1a7000 R11: ffffcc5c04f7f9c8 R12: ffffcc5c04f7f7d0
[ 7340.417218] R13: 03ffffffffffffff R14: 00fa06fffffffe00 R15: ffff891f47789500
[ 7340.418229] FS: 0000000000000000(0000) GS:ffff891ffdfaa000(0000) knlGS:0000000000000000
[ 7340.419489] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[ 7340.420286] CR2: 00007f415bfffd58 CR3: 0000000103f03002 CR4: 0000000000772ef0
[ 7340.421237] PKRU: 55555554
[ 7340.421623] Call Trace:
[ 7340.421987] <TASK>
[ 7340.422309] ? softleaf_from_pte+0x77/0xa0
[ 7340.422855] swap_pte_batch+0xa7/0x290
[ 7340.423363] zap_nonpresent_ptes.constprop.0.isra.0+0xd1/0x270
[ 7340.424102] zap_pte_range+0x281/0x580
[ 7340.424607] zap_pmd_range.isra.0+0xc9/0x240
[ 7340.425177] unmap_page_range+0x24d/0x420
[ 7340.425714] unmap_vmas+0xa1/0x180
[ 7340.426185] exit_mmap+0xe1/0x3b0
[ 7340.426644] __mmput+0x41/0x150
[ 7340.427098] exit_mm+0xb1/0x110
[ 7340.427539] do_exit+0x1b2/0x460
[ 7340.427992] do_group_exit+0x2d/0xc0
[ 7340.428477] get_signal+0x79d/0x7e0
[ 7340.428957] arch_do_signal_or_restart+0x34/0x100
[ 7340.429571] exit_to_user_mode_loop+0x8e/0x4c0
[ 7340.430159] do_syscall_64+0x188/0x6b0
[ 7340.430672] ? __do_sys_clone3+0xd9/0x120
[ 7340.431212] ? switch_fpu_return+0x4e/0xd0
[ 7340.431761] ? arch_exit_to_user_mode_prepare.isra.0+0xa1/0xc0
[ 7340.432498] ? do_syscall_64+0xbb/0x6b0
[ 7340.433015] ? __handle_mm_fault+0x445/0x690
[ 7340.433582] ? count_memcg_events+0xd6/0x210
[ 7340.434151] ? handle_mm_fault+0x212/0x340
[ 7340.434697] ? do_user_addr_fault+0x2b4/0x7b0
[ 7340.435271] ? clear_bhb_loop+0x30/0x80
[ 7340.435788] ? clear_bhb_loop+0x30/0x80
[ 7340.436299] ? clear_bhb_loop+0x30/0x80
[ 7340.436812] ? clear_bhb_loop+0x30/0x80
[ 7340.437323] entry_SYSCALL_64_after_hwframe+0x76/0x7e
[ 7340.437973] RIP: 0033:0x7f4161b14169
[ 7340.438468] Code: Unable to access opcode bytes at 0x7f4161b1413f.
[ 7340.439242] RSP: 002b:00007ffc6ebfa770 EFLAGS: 00000246 ORIG_RAX: 00000000000000ca
[ 7340.440173] RAX: fffffffffffffe00 RBX: 00000000000005a1 RCX: 00007f4161b14169
[ 7340.441061] RDX: 00000000000005a1 RSI: 0000000000000109 RDI: 00007f415bfff990
[ 7340.441943] RBP: 00007ffc6ebfa7a0 R08: 0000000000000000 R09: 00000000ffffffff
[ 7340.442824] R10: 0000000000000000 R11: 0000000000000246 R12: 0000000000000000
[ 7340.443707] R13: 0000000000000000 R14: 00007f415bfff990 R15: 00007f415bfff6c0
[ 7340.444586] </TASK>
[ 7340.444922] Modules linked in: rfkill intel_rapl_msr intel_rapl_common intel_uncore_frequency_common skx_edac_common nfit libnvdimm kvm_intel vfat fat kvm snd_pcm irqbypass rapl iTCO_wdt snd_timer intel_pmc_bxt iTCO_vendor_support snd ixgbevf virtio_net soundcore i2c_i801 pcspkr libeth_xdp net_failover i2c_smbus lpc_ich failover libeth virtio_balloon joydev 9p fuse loop zram lz4hc_compress lz4_compress 9pnet_virtio 9pnet netfs ghash_clmulni_intel serio_raw qemu_fw_cfg
[ 7340.449650] ---[ end trace 0000000000000000 ]---
The issue can be fixed in all in-tree drivers, but we cannot just trust OOT
drivers to not do this. Therefore, make tailroom a signed int and produce a
warning when it is negative to prevent such mistakes in the future.
The issue can also be easily reproduced with ice driver, by applying
the following diff to xskxceiver and enjoying a kernel panic in xdpdrv mode:
diff --git a/tools/testing/selftests/bpf/prog_tests/test_xsk.c b/tools/testing/selftests/bpf/prog_tests/test_xsk.c
index 5af28f359cfd..042d587fa7ef 100644
--- a/tools/testing/selftests/bpf/prog_tests/test_xsk.c
+++ b/tools/testing/selftests/bpf/prog_tests/test_xsk.c
@@ -2541,8 +2541,8 @@ int testapp_adjust_tail_grow_mb(struct test_spec *test)
{
test->mtu = MAX_ETH_JUMBO_SIZE;
/* Grow by (frag_size - last_frag_Size) - 1 to stay inside the last fragment */
- return testapp_adjust_tail(test, (XSK_UMEM__MAX_FRAME_SIZE / 2) - 1,
- XSK_UMEM__LARGE_FRAME_SIZE * 2);
+ return testapp_adjust_tail(test, XSK_UMEM__MAX_FRAME_SIZE * 100,
+ 6912);
}
int testapp_tx_queue_consumer(struct test_spec *test)
If we print out the values involved in the tailroom calculation:
tailroom = rxq->frag_size - skb_frag_size(frag) - skb_frag_off(frag);
4294967040 = 3456 - 3456 - 256
I personally reproduced and verified the issue in ice and i40e,
aside from WiP ixgbevf implementation.
v3->v2:
* unregister XDP RxQ info for subfunction in ice
* remove rx_buf_len variable in ice
* add missing ifdefed empty definition xsk_pool_get_rx_frag_step()
* move xsk_pool_get_rx_frag_step() call from idpf to libeth
* simplify conditions when determining frag_size in idpf
* correctly init xdp_frame_sz for non-main VSI in i40e
v1->v2:
* add modulo to calculate offset within chunk
* add helper for AF_XDP ZC queues
* fix the problem in ZC mode in i40e, ice and idpf
* verify solution in i40e
* fix RxQ info registering in i40e
* fix splitq handling in idpf
* do not use word truesize unless the value used is named trusize
Larysa Zaremba (9):
xdp: use modulo operation to calculate XDP frag tailroom
xsk: introduce helper to determine rxq->frag_size
ice: fix rxq info registering in mbuf packets
ice: change XDP RxQ frag_size from DMA write length to xdp.frame_sz
i40e: fix registering XDP RxQ info
i40e: use xdp.frame_sz as XDP RxQ info frag_size
libeth, idpf: use truesize as XDP RxQ info frag_size
net: enetc: use truesize as XDP RxQ info frag_size
xdp: produce a warning when calculated tailroom is negative
drivers/net/ethernet/freescale/enetc/enetc.c | 2 +-
drivers/net/ethernet/intel/i40e/i40e_main.c | 40 +++++++++++---------
drivers/net/ethernet/intel/i40e/i40e_txrx.c | 5 ++-
drivers/net/ethernet/intel/ice/ice_base.c | 33 +++++-----------
drivers/net/ethernet/intel/ice/ice_txrx.c | 3 +-
drivers/net/ethernet/intel/ice/ice_xsk.c | 3 ++
drivers/net/ethernet/intel/idpf/xdp.c | 6 ++-
drivers/net/ethernet/intel/idpf/xsk.c | 1 +
drivers/net/ethernet/intel/libeth/xsk.c | 1 +
include/net/libeth/xsk.h | 3 ++
include/net/xdp_sock_drv.h | 10 +++++
net/core/filter.c | 6 ++-
12 files changed, 66 insertions(+), 47 deletions(-)
--
2.52.0
| null | null | null | [PATCH bpf v3 0/9] Address XDP frags having negative tailroom | The only user of frag_size field in XDP RxQ info is
bpf_xdp_frags_increase_tail(). It clearly expects whole buff size instead
of DMA write size. Different assumptions in ice driver configuration lead
to negative tailroom.
This allows to trigger kernel panic, when using
XDP_ADJUST_TAIL_GROW_MULTI_BUFF xskxceiver test and changing packet size to
6912 and the requested offset to a huge value, e.g.
XSK_UMEM__MAX_FRAME_SIZE * 100.
Due to other quirks of the ZC configuration in ice, panic is not observed
in ZC mode, but tailroom growing still fails when it should not.
Use fill queue buffer truesize instead of DMA write size in XDP RxQ info.
Fix ZC mode too by using the new helper.
Fixes: 2fba7dc5157b ("ice: Add support for XDP multi-buffer on Rx side")
Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>
Signed-off-by: Larysa Zaremba <larysa.zaremba@intel.com>
---
drivers/net/ethernet/intel/ice/ice_base.c | 9 ++++-----
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ethernet/intel/ice/ice_base.c b/drivers/net/ethernet/intel/ice/ice_base.c
index 511d803cf0a4..27ab899a4052 100644
--- a/drivers/net/ethernet/intel/ice/ice_base.c
+++ b/drivers/net/ethernet/intel/ice/ice_base.c
@@ -659,7 +659,6 @@ static int ice_vsi_cfg_rxq(struct ice_rx_ring *ring)
{
struct device *dev = ice_pf_to_dev(ring->vsi->back);
u32 num_bufs = ICE_DESC_UNUSED(ring);
- u32 rx_buf_len;
int err;
if (ring->vsi->type == ICE_VSI_PF || ring->vsi->type == ICE_VSI_SF) {
@@ -669,12 +668,12 @@ static int ice_vsi_cfg_rxq(struct ice_rx_ring *ring)
return err;
if (ring->xsk_pool) {
- rx_buf_len =
- xsk_pool_get_rx_frame_size(ring->xsk_pool);
+ u32 frag_size =
+ xsk_pool_get_rx_frag_step(ring->xsk_pool);
err = __xdp_rxq_info_reg(&ring->xdp_rxq, ring->netdev,
ring->q_index,
ring->q_vector->napi.napi_id,
- rx_buf_len);
+ frag_size);
if (err)
return err;
err = xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
@@ -694,7 +693,7 @@ static int ice_vsi_cfg_rxq(struct ice_rx_ring *ring)
err = __xdp_rxq_info_reg(&ring->xdp_rxq, ring->netdev,
ring->q_index,
ring->q_vector->napi.napi_id,
- ring->rx_buf_len);
+ ring->truesize);
if (err)
goto err_destroy_fq;
--
2.52.0 | {
"author": "Larysa Zaremba <larysa.zaremba@intel.com>",
"date": "Tue, 17 Feb 2026 14:24:42 +0100",
"is_openbsd": false,
"thread_id": "aaG4z7ZIARBAzueO@boxer.mbox.gz"
} |
lkml_critique | lkml | Aside from the issue described below, tailroom calculation does not account
for pages being split between frags, e.g. in i40e, enetc and
AF_XDP ZC with smaller chunks. These series address the problem by
calculating modulo (skb_frag_off() % rxq->frag_size) in order to get
data offset within a smaller block of memory. Please note, xskxceiver
tail grow test passes without modulo e.g. in xdpdrv mode on i40e,
because there is not enough descriptors to get to flipped buffers.
Many ethernet drivers report xdp Rx queue frag size as being the same as
DMA write size. However, the only user of this field, namely
bpf_xdp_frags_increase_tail(), clearly expects a truesize.
Such difference leads to unspecific memory corruption issues under certain
circumstances, e.g. in ixgbevf maximum DMA write size is 3 KB, so when
running xskxceiver's XDP_ADJUST_TAIL_GROW_MULTI_BUFF, 6K packet fully uses
all DMA-writable space in 2 buffers. This would be fine, if only
rxq->frag_size was properly set to 4K, but value of 3K results in a
negative tailroom, because there is a non-zero page offset.
We are supposed to return -EINVAL and be done with it in such case,
but due to tailroom being stored as an unsigned int, it is reported to be
somewhere near UINT_MAX, resulting in a tail being grown, even if the
requested offset is too much(it is around 2K in the abovementioned test).
This later leads to all kinds of unspecific calltraces.
[ 7340.337579] xskxceiver[1440]: segfault at 1da718 ip 00007f4161aeac9d sp 00007f41615a6a00 error 6
[ 7340.338040] xskxceiver[1441]: segfault at 7f410000000b ip 00000000004042b5 sp 00007f415bffecf0 error 4
[ 7340.338179] in libc.so.6[61c9d,7f4161aaf000+160000]
[ 7340.339230] in xskxceiver[42b5,400000+69000]
[ 7340.340300] likely on CPU 6 (core 0, socket 6)
[ 7340.340302] Code: ff ff 01 e9 f4 fe ff ff 0f 1f 44 00 00 4c 39 f0 74 73 31 c0 ba 01 00 00 00 f0 0f b1 17 0f 85 ba 00 00 00 49 8b 87 88 00 00 00 <4c> 89 70 08 eb cc 0f 1f 44 00 00 48 8d bd f0 fe ff ff 89 85 ec fe
[ 7340.340888] likely on CPU 3 (core 0, socket 3)
[ 7340.345088] Code: 00 00 00 ba 00 00 00 00 be 00 00 00 00 89 c7 e8 31 ca ff ff 89 45 ec 8b 45 ec 85 c0 78 07 b8 00 00 00 00 eb 46 e8 0b c8 ff ff <8b> 00 83 f8 69 74 24 e8 ff c7 ff ff 8b 00 83 f8 0b 74 18 e8 f3 c7
[ 7340.404334] Oops: general protection fault, probably for non-canonical address 0x6d255010bdffc: 0000 [#1] SMP NOPTI
[ 7340.405972] CPU: 7 UID: 0 PID: 1439 Comm: xskxceiver Not tainted 6.19.0-rc1+ #21 PREEMPT(lazy)
[ 7340.408006] Hardware name: QEMU Standard PC (Q35 + ICH9, 2009), BIOS 1.17.0-5.fc42 04/01/2014
[ 7340.409716] RIP: 0010:lookup_swap_cgroup_id+0x44/0x80
[ 7340.410455] Code: 83 f8 1c 73 39 48 ba ff ff ff ff ff ff ff 03 48 8b 04 c5 20 55 fa bd 48 21 d1 48 89 ca 83 e1 01 48 d1 ea c1 e1 04 48 8d 04 90 <8b> 00 48 83 c4 10 d3 e8 c3 cc cc cc cc 31 c0 e9 98 b7 dd 00 48 89
[ 7340.412787] RSP: 0018:ffffcc5c04f7f6d0 EFLAGS: 00010202
[ 7340.413494] RAX: 0006d255010bdffc RBX: ffff891f477895a8 RCX: 0000000000000010
[ 7340.414431] RDX: 0001c17e3fffffff RSI: 00fa070000000000 RDI: 000382fc7fffffff
[ 7340.415354] RBP: 00fa070000000000 R08: ffffcc5c04f7f8f8 R09: ffffcc5c04f7f7d0
[ 7340.416283] R10: ffff891f4c1a7000 R11: ffffcc5c04f7f9c8 R12: ffffcc5c04f7f7d0
[ 7340.417218] R13: 03ffffffffffffff R14: 00fa06fffffffe00 R15: ffff891f47789500
[ 7340.418229] FS: 0000000000000000(0000) GS:ffff891ffdfaa000(0000) knlGS:0000000000000000
[ 7340.419489] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[ 7340.420286] CR2: 00007f415bfffd58 CR3: 0000000103f03002 CR4: 0000000000772ef0
[ 7340.421237] PKRU: 55555554
[ 7340.421623] Call Trace:
[ 7340.421987] <TASK>
[ 7340.422309] ? softleaf_from_pte+0x77/0xa0
[ 7340.422855] swap_pte_batch+0xa7/0x290
[ 7340.423363] zap_nonpresent_ptes.constprop.0.isra.0+0xd1/0x270
[ 7340.424102] zap_pte_range+0x281/0x580
[ 7340.424607] zap_pmd_range.isra.0+0xc9/0x240
[ 7340.425177] unmap_page_range+0x24d/0x420
[ 7340.425714] unmap_vmas+0xa1/0x180
[ 7340.426185] exit_mmap+0xe1/0x3b0
[ 7340.426644] __mmput+0x41/0x150
[ 7340.427098] exit_mm+0xb1/0x110
[ 7340.427539] do_exit+0x1b2/0x460
[ 7340.427992] do_group_exit+0x2d/0xc0
[ 7340.428477] get_signal+0x79d/0x7e0
[ 7340.428957] arch_do_signal_or_restart+0x34/0x100
[ 7340.429571] exit_to_user_mode_loop+0x8e/0x4c0
[ 7340.430159] do_syscall_64+0x188/0x6b0
[ 7340.430672] ? __do_sys_clone3+0xd9/0x120
[ 7340.431212] ? switch_fpu_return+0x4e/0xd0
[ 7340.431761] ? arch_exit_to_user_mode_prepare.isra.0+0xa1/0xc0
[ 7340.432498] ? do_syscall_64+0xbb/0x6b0
[ 7340.433015] ? __handle_mm_fault+0x445/0x690
[ 7340.433582] ? count_memcg_events+0xd6/0x210
[ 7340.434151] ? handle_mm_fault+0x212/0x340
[ 7340.434697] ? do_user_addr_fault+0x2b4/0x7b0
[ 7340.435271] ? clear_bhb_loop+0x30/0x80
[ 7340.435788] ? clear_bhb_loop+0x30/0x80
[ 7340.436299] ? clear_bhb_loop+0x30/0x80
[ 7340.436812] ? clear_bhb_loop+0x30/0x80
[ 7340.437323] entry_SYSCALL_64_after_hwframe+0x76/0x7e
[ 7340.437973] RIP: 0033:0x7f4161b14169
[ 7340.438468] Code: Unable to access opcode bytes at 0x7f4161b1413f.
[ 7340.439242] RSP: 002b:00007ffc6ebfa770 EFLAGS: 00000246 ORIG_RAX: 00000000000000ca
[ 7340.440173] RAX: fffffffffffffe00 RBX: 00000000000005a1 RCX: 00007f4161b14169
[ 7340.441061] RDX: 00000000000005a1 RSI: 0000000000000109 RDI: 00007f415bfff990
[ 7340.441943] RBP: 00007ffc6ebfa7a0 R08: 0000000000000000 R09: 00000000ffffffff
[ 7340.442824] R10: 0000000000000000 R11: 0000000000000246 R12: 0000000000000000
[ 7340.443707] R13: 0000000000000000 R14: 00007f415bfff990 R15: 00007f415bfff6c0
[ 7340.444586] </TASK>
[ 7340.444922] Modules linked in: rfkill intel_rapl_msr intel_rapl_common intel_uncore_frequency_common skx_edac_common nfit libnvdimm kvm_intel vfat fat kvm snd_pcm irqbypass rapl iTCO_wdt snd_timer intel_pmc_bxt iTCO_vendor_support snd ixgbevf virtio_net soundcore i2c_i801 pcspkr libeth_xdp net_failover i2c_smbus lpc_ich failover libeth virtio_balloon joydev 9p fuse loop zram lz4hc_compress lz4_compress 9pnet_virtio 9pnet netfs ghash_clmulni_intel serio_raw qemu_fw_cfg
[ 7340.449650] ---[ end trace 0000000000000000 ]---
The issue can be fixed in all in-tree drivers, but we cannot just trust OOT
drivers to not do this. Therefore, make tailroom a signed int and produce a
warning when it is negative to prevent such mistakes in the future.
The issue can also be easily reproduced with ice driver, by applying
the following diff to xskxceiver and enjoying a kernel panic in xdpdrv mode:
diff --git a/tools/testing/selftests/bpf/prog_tests/test_xsk.c b/tools/testing/selftests/bpf/prog_tests/test_xsk.c
index 5af28f359cfd..042d587fa7ef 100644
--- a/tools/testing/selftests/bpf/prog_tests/test_xsk.c
+++ b/tools/testing/selftests/bpf/prog_tests/test_xsk.c
@@ -2541,8 +2541,8 @@ int testapp_adjust_tail_grow_mb(struct test_spec *test)
{
test->mtu = MAX_ETH_JUMBO_SIZE;
/* Grow by (frag_size - last_frag_Size) - 1 to stay inside the last fragment */
- return testapp_adjust_tail(test, (XSK_UMEM__MAX_FRAME_SIZE / 2) - 1,
- XSK_UMEM__LARGE_FRAME_SIZE * 2);
+ return testapp_adjust_tail(test, XSK_UMEM__MAX_FRAME_SIZE * 100,
+ 6912);
}
int testapp_tx_queue_consumer(struct test_spec *test)
If we print out the values involved in the tailroom calculation:
tailroom = rxq->frag_size - skb_frag_size(frag) - skb_frag_off(frag);
4294967040 = 3456 - 3456 - 256
I personally reproduced and verified the issue in ice and i40e,
aside from WiP ixgbevf implementation.
v3->v2:
* unregister XDP RxQ info for subfunction in ice
* remove rx_buf_len variable in ice
* add missing ifdefed empty definition xsk_pool_get_rx_frag_step()
* move xsk_pool_get_rx_frag_step() call from idpf to libeth
* simplify conditions when determining frag_size in idpf
* correctly init xdp_frame_sz for non-main VSI in i40e
v1->v2:
* add modulo to calculate offset within chunk
* add helper for AF_XDP ZC queues
* fix the problem in ZC mode in i40e, ice and idpf
* verify solution in i40e
* fix RxQ info registering in i40e
* fix splitq handling in idpf
* do not use word truesize unless the value used is named trusize
Larysa Zaremba (9):
xdp: use modulo operation to calculate XDP frag tailroom
xsk: introduce helper to determine rxq->frag_size
ice: fix rxq info registering in mbuf packets
ice: change XDP RxQ frag_size from DMA write length to xdp.frame_sz
i40e: fix registering XDP RxQ info
i40e: use xdp.frame_sz as XDP RxQ info frag_size
libeth, idpf: use truesize as XDP RxQ info frag_size
net: enetc: use truesize as XDP RxQ info frag_size
xdp: produce a warning when calculated tailroom is negative
drivers/net/ethernet/freescale/enetc/enetc.c | 2 +-
drivers/net/ethernet/intel/i40e/i40e_main.c | 40 +++++++++++---------
drivers/net/ethernet/intel/i40e/i40e_txrx.c | 5 ++-
drivers/net/ethernet/intel/ice/ice_base.c | 33 +++++-----------
drivers/net/ethernet/intel/ice/ice_txrx.c | 3 +-
drivers/net/ethernet/intel/ice/ice_xsk.c | 3 ++
drivers/net/ethernet/intel/idpf/xdp.c | 6 ++-
drivers/net/ethernet/intel/idpf/xsk.c | 1 +
drivers/net/ethernet/intel/libeth/xsk.c | 1 +
include/net/libeth/xsk.h | 3 ++
include/net/xdp_sock_drv.h | 10 +++++
net/core/filter.c | 6 ++-
12 files changed, 66 insertions(+), 47 deletions(-)
--
2.52.0
| null | null | null | [PATCH bpf v3 0/9] Address XDP frags having negative tailroom | Current way of handling XDP RxQ info in i40e has following problems:
* when xsk_buff_pool is detached, memory model is not unregistered before
registering a new one, this leads to a dangling xsk_buff_pool in the
memory model table
* frag_size is not updated when xsk_buff_pool is detached or when MTU is
changed, this leads to growing tail always failing for multi-buffer
packets.
Couple XDP RxQ info registering with buffer allocations and unregistering
with cleaning the ring.
Fixes: a045d2f2d03d ("i40e: set xdp_rxq_info::frag_size")
Signed-off-by: Larysa Zaremba <larysa.zaremba@intel.com>
---
drivers/net/ethernet/intel/i40e/i40e_main.c | 34 ++++++++++++---------
drivers/net/ethernet/intel/i40e/i40e_txrx.c | 5 +--
2 files changed, 22 insertions(+), 17 deletions(-)
diff --git a/drivers/net/ethernet/intel/i40e/i40e_main.c b/drivers/net/ethernet/intel/i40e/i40e_main.c
index d3bc3207054f..eaa5b65e6daf 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_main.c
+++ b/drivers/net/ethernet/intel/i40e/i40e_main.c
@@ -3577,18 +3577,8 @@ static int i40e_configure_rx_ring(struct i40e_ring *ring)
if (ring->vsi->type != I40E_VSI_MAIN)
goto skip;
- if (!xdp_rxq_info_is_reg(&ring->xdp_rxq)) {
- err = __xdp_rxq_info_reg(&ring->xdp_rxq, ring->netdev,
- ring->queue_index,
- ring->q_vector->napi.napi_id,
- ring->rx_buf_len);
- if (err)
- return err;
- }
-
ring->xsk_pool = i40e_xsk_pool(ring);
if (ring->xsk_pool) {
- xdp_rxq_info_unreg(&ring->xdp_rxq);
ring->rx_buf_len = xsk_pool_get_rx_frame_size(ring->xsk_pool);
err = __xdp_rxq_info_reg(&ring->xdp_rxq, ring->netdev,
ring->queue_index,
@@ -3600,17 +3590,23 @@ static int i40e_configure_rx_ring(struct i40e_ring *ring)
MEM_TYPE_XSK_BUFF_POOL,
NULL);
if (err)
- return err;
+ goto unreg_xdp;
dev_info(&vsi->back->pdev->dev,
"Registered XDP mem model MEM_TYPE_XSK_BUFF_POOL on Rx ring %d\n",
ring->queue_index);
} else {
+ err = __xdp_rxq_info_reg(&ring->xdp_rxq, ring->netdev,
+ ring->queue_index,
+ ring->q_vector->napi.napi_id,
+ ring->rx_buf_len);
+ if (err)
+ return err;
err = xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
MEM_TYPE_PAGE_SHARED,
NULL);
if (err)
- return err;
+ goto unreg_xdp;
}
skip:
@@ -3648,7 +3644,8 @@ static int i40e_configure_rx_ring(struct i40e_ring *ring)
dev_info(&vsi->back->pdev->dev,
"Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
ring->queue_index, pf_q, err);
- return -ENOMEM;
+ err = -ENOMEM;
+ goto unreg_xdp;
}
/* set the context in the HMC */
@@ -3657,7 +3654,8 @@ static int i40e_configure_rx_ring(struct i40e_ring *ring)
dev_info(&vsi->back->pdev->dev,
"Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
ring->queue_index, pf_q, err);
- return -ENOMEM;
+ err = -ENOMEM;
+ goto unreg_xdp;
}
/* configure Rx buffer alignment */
@@ -3665,7 +3663,8 @@ static int i40e_configure_rx_ring(struct i40e_ring *ring)
if (I40E_2K_TOO_SMALL_WITH_PADDING) {
dev_info(&vsi->back->pdev->dev,
"2k Rx buffer is too small to fit standard MTU and skb_shared_info\n");
- return -EOPNOTSUPP;
+ err = -EOPNOTSUPP;
+ goto unreg_xdp;
}
clear_ring_build_skb_enabled(ring);
} else {
@@ -3695,6 +3694,11 @@ static int i40e_configure_rx_ring(struct i40e_ring *ring)
}
return 0;
+unreg_xdp:
+ if (ring->vsi->type == I40E_VSI_MAIN)
+ xdp_rxq_info_unreg(&ring->xdp_rxq);
+
+ return err;
}
/**
diff --git a/drivers/net/ethernet/intel/i40e/i40e_txrx.c b/drivers/net/ethernet/intel/i40e/i40e_txrx.c
index cc0b9efc2637..816179c7e271 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_txrx.c
+++ b/drivers/net/ethernet/intel/i40e/i40e_txrx.c
@@ -1470,6 +1470,9 @@ void i40e_clean_rx_ring(struct i40e_ring *rx_ring)
if (!rx_ring->rx_bi)
return;
+ if (xdp_rxq_info_is_reg(&rx_ring->xdp_rxq))
+ xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
+
if (rx_ring->xsk_pool) {
i40e_xsk_clean_rx_ring(rx_ring);
goto skip_free;
@@ -1527,8 +1530,6 @@ void i40e_clean_rx_ring(struct i40e_ring *rx_ring)
void i40e_free_rx_resources(struct i40e_ring *rx_ring)
{
i40e_clean_rx_ring(rx_ring);
- if (rx_ring->vsi->type == I40E_VSI_MAIN)
- xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
rx_ring->xdp_prog = NULL;
kfree(rx_ring->rx_bi);
rx_ring->rx_bi = NULL;
--
2.52.0 | {
"author": "Larysa Zaremba <larysa.zaremba@intel.com>",
"date": "Tue, 17 Feb 2026 14:24:43 +0100",
"is_openbsd": false,
"thread_id": "aaG4z7ZIARBAzueO@boxer.mbox.gz"
} |
lkml_critique | lkml | Aside from the issue described below, tailroom calculation does not account
for pages being split between frags, e.g. in i40e, enetc and
AF_XDP ZC with smaller chunks. These series address the problem by
calculating modulo (skb_frag_off() % rxq->frag_size) in order to get
data offset within a smaller block of memory. Please note, xskxceiver
tail grow test passes without modulo e.g. in xdpdrv mode on i40e,
because there is not enough descriptors to get to flipped buffers.
Many ethernet drivers report xdp Rx queue frag size as being the same as
DMA write size. However, the only user of this field, namely
bpf_xdp_frags_increase_tail(), clearly expects a truesize.
Such difference leads to unspecific memory corruption issues under certain
circumstances, e.g. in ixgbevf maximum DMA write size is 3 KB, so when
running xskxceiver's XDP_ADJUST_TAIL_GROW_MULTI_BUFF, 6K packet fully uses
all DMA-writable space in 2 buffers. This would be fine, if only
rxq->frag_size was properly set to 4K, but value of 3K results in a
negative tailroom, because there is a non-zero page offset.
We are supposed to return -EINVAL and be done with it in such case,
but due to tailroom being stored as an unsigned int, it is reported to be
somewhere near UINT_MAX, resulting in a tail being grown, even if the
requested offset is too much(it is around 2K in the abovementioned test).
This later leads to all kinds of unspecific calltraces.
[ 7340.337579] xskxceiver[1440]: segfault at 1da718 ip 00007f4161aeac9d sp 00007f41615a6a00 error 6
[ 7340.338040] xskxceiver[1441]: segfault at 7f410000000b ip 00000000004042b5 sp 00007f415bffecf0 error 4
[ 7340.338179] in libc.so.6[61c9d,7f4161aaf000+160000]
[ 7340.339230] in xskxceiver[42b5,400000+69000]
[ 7340.340300] likely on CPU 6 (core 0, socket 6)
[ 7340.340302] Code: ff ff 01 e9 f4 fe ff ff 0f 1f 44 00 00 4c 39 f0 74 73 31 c0 ba 01 00 00 00 f0 0f b1 17 0f 85 ba 00 00 00 49 8b 87 88 00 00 00 <4c> 89 70 08 eb cc 0f 1f 44 00 00 48 8d bd f0 fe ff ff 89 85 ec fe
[ 7340.340888] likely on CPU 3 (core 0, socket 3)
[ 7340.345088] Code: 00 00 00 ba 00 00 00 00 be 00 00 00 00 89 c7 e8 31 ca ff ff 89 45 ec 8b 45 ec 85 c0 78 07 b8 00 00 00 00 eb 46 e8 0b c8 ff ff <8b> 00 83 f8 69 74 24 e8 ff c7 ff ff 8b 00 83 f8 0b 74 18 e8 f3 c7
[ 7340.404334] Oops: general protection fault, probably for non-canonical address 0x6d255010bdffc: 0000 [#1] SMP NOPTI
[ 7340.405972] CPU: 7 UID: 0 PID: 1439 Comm: xskxceiver Not tainted 6.19.0-rc1+ #21 PREEMPT(lazy)
[ 7340.408006] Hardware name: QEMU Standard PC (Q35 + ICH9, 2009), BIOS 1.17.0-5.fc42 04/01/2014
[ 7340.409716] RIP: 0010:lookup_swap_cgroup_id+0x44/0x80
[ 7340.410455] Code: 83 f8 1c 73 39 48 ba ff ff ff ff ff ff ff 03 48 8b 04 c5 20 55 fa bd 48 21 d1 48 89 ca 83 e1 01 48 d1 ea c1 e1 04 48 8d 04 90 <8b> 00 48 83 c4 10 d3 e8 c3 cc cc cc cc 31 c0 e9 98 b7 dd 00 48 89
[ 7340.412787] RSP: 0018:ffffcc5c04f7f6d0 EFLAGS: 00010202
[ 7340.413494] RAX: 0006d255010bdffc RBX: ffff891f477895a8 RCX: 0000000000000010
[ 7340.414431] RDX: 0001c17e3fffffff RSI: 00fa070000000000 RDI: 000382fc7fffffff
[ 7340.415354] RBP: 00fa070000000000 R08: ffffcc5c04f7f8f8 R09: ffffcc5c04f7f7d0
[ 7340.416283] R10: ffff891f4c1a7000 R11: ffffcc5c04f7f9c8 R12: ffffcc5c04f7f7d0
[ 7340.417218] R13: 03ffffffffffffff R14: 00fa06fffffffe00 R15: ffff891f47789500
[ 7340.418229] FS: 0000000000000000(0000) GS:ffff891ffdfaa000(0000) knlGS:0000000000000000
[ 7340.419489] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[ 7340.420286] CR2: 00007f415bfffd58 CR3: 0000000103f03002 CR4: 0000000000772ef0
[ 7340.421237] PKRU: 55555554
[ 7340.421623] Call Trace:
[ 7340.421987] <TASK>
[ 7340.422309] ? softleaf_from_pte+0x77/0xa0
[ 7340.422855] swap_pte_batch+0xa7/0x290
[ 7340.423363] zap_nonpresent_ptes.constprop.0.isra.0+0xd1/0x270
[ 7340.424102] zap_pte_range+0x281/0x580
[ 7340.424607] zap_pmd_range.isra.0+0xc9/0x240
[ 7340.425177] unmap_page_range+0x24d/0x420
[ 7340.425714] unmap_vmas+0xa1/0x180
[ 7340.426185] exit_mmap+0xe1/0x3b0
[ 7340.426644] __mmput+0x41/0x150
[ 7340.427098] exit_mm+0xb1/0x110
[ 7340.427539] do_exit+0x1b2/0x460
[ 7340.427992] do_group_exit+0x2d/0xc0
[ 7340.428477] get_signal+0x79d/0x7e0
[ 7340.428957] arch_do_signal_or_restart+0x34/0x100
[ 7340.429571] exit_to_user_mode_loop+0x8e/0x4c0
[ 7340.430159] do_syscall_64+0x188/0x6b0
[ 7340.430672] ? __do_sys_clone3+0xd9/0x120
[ 7340.431212] ? switch_fpu_return+0x4e/0xd0
[ 7340.431761] ? arch_exit_to_user_mode_prepare.isra.0+0xa1/0xc0
[ 7340.432498] ? do_syscall_64+0xbb/0x6b0
[ 7340.433015] ? __handle_mm_fault+0x445/0x690
[ 7340.433582] ? count_memcg_events+0xd6/0x210
[ 7340.434151] ? handle_mm_fault+0x212/0x340
[ 7340.434697] ? do_user_addr_fault+0x2b4/0x7b0
[ 7340.435271] ? clear_bhb_loop+0x30/0x80
[ 7340.435788] ? clear_bhb_loop+0x30/0x80
[ 7340.436299] ? clear_bhb_loop+0x30/0x80
[ 7340.436812] ? clear_bhb_loop+0x30/0x80
[ 7340.437323] entry_SYSCALL_64_after_hwframe+0x76/0x7e
[ 7340.437973] RIP: 0033:0x7f4161b14169
[ 7340.438468] Code: Unable to access opcode bytes at 0x7f4161b1413f.
[ 7340.439242] RSP: 002b:00007ffc6ebfa770 EFLAGS: 00000246 ORIG_RAX: 00000000000000ca
[ 7340.440173] RAX: fffffffffffffe00 RBX: 00000000000005a1 RCX: 00007f4161b14169
[ 7340.441061] RDX: 00000000000005a1 RSI: 0000000000000109 RDI: 00007f415bfff990
[ 7340.441943] RBP: 00007ffc6ebfa7a0 R08: 0000000000000000 R09: 00000000ffffffff
[ 7340.442824] R10: 0000000000000000 R11: 0000000000000246 R12: 0000000000000000
[ 7340.443707] R13: 0000000000000000 R14: 00007f415bfff990 R15: 00007f415bfff6c0
[ 7340.444586] </TASK>
[ 7340.444922] Modules linked in: rfkill intel_rapl_msr intel_rapl_common intel_uncore_frequency_common skx_edac_common nfit libnvdimm kvm_intel vfat fat kvm snd_pcm irqbypass rapl iTCO_wdt snd_timer intel_pmc_bxt iTCO_vendor_support snd ixgbevf virtio_net soundcore i2c_i801 pcspkr libeth_xdp net_failover i2c_smbus lpc_ich failover libeth virtio_balloon joydev 9p fuse loop zram lz4hc_compress lz4_compress 9pnet_virtio 9pnet netfs ghash_clmulni_intel serio_raw qemu_fw_cfg
[ 7340.449650] ---[ end trace 0000000000000000 ]---
The issue can be fixed in all in-tree drivers, but we cannot just trust OOT
drivers to not do this. Therefore, make tailroom a signed int and produce a
warning when it is negative to prevent such mistakes in the future.
The issue can also be easily reproduced with ice driver, by applying
the following diff to xskxceiver and enjoying a kernel panic in xdpdrv mode:
diff --git a/tools/testing/selftests/bpf/prog_tests/test_xsk.c b/tools/testing/selftests/bpf/prog_tests/test_xsk.c
index 5af28f359cfd..042d587fa7ef 100644
--- a/tools/testing/selftests/bpf/prog_tests/test_xsk.c
+++ b/tools/testing/selftests/bpf/prog_tests/test_xsk.c
@@ -2541,8 +2541,8 @@ int testapp_adjust_tail_grow_mb(struct test_spec *test)
{
test->mtu = MAX_ETH_JUMBO_SIZE;
/* Grow by (frag_size - last_frag_Size) - 1 to stay inside the last fragment */
- return testapp_adjust_tail(test, (XSK_UMEM__MAX_FRAME_SIZE / 2) - 1,
- XSK_UMEM__LARGE_FRAME_SIZE * 2);
+ return testapp_adjust_tail(test, XSK_UMEM__MAX_FRAME_SIZE * 100,
+ 6912);
}
int testapp_tx_queue_consumer(struct test_spec *test)
If we print out the values involved in the tailroom calculation:
tailroom = rxq->frag_size - skb_frag_size(frag) - skb_frag_off(frag);
4294967040 = 3456 - 3456 - 256
I personally reproduced and verified the issue in ice and i40e,
aside from WiP ixgbevf implementation.
v3->v2:
* unregister XDP RxQ info for subfunction in ice
* remove rx_buf_len variable in ice
* add missing ifdefed empty definition xsk_pool_get_rx_frag_step()
* move xsk_pool_get_rx_frag_step() call from idpf to libeth
* simplify conditions when determining frag_size in idpf
* correctly init xdp_frame_sz for non-main VSI in i40e
v1->v2:
* add modulo to calculate offset within chunk
* add helper for AF_XDP ZC queues
* fix the problem in ZC mode in i40e, ice and idpf
* verify solution in i40e
* fix RxQ info registering in i40e
* fix splitq handling in idpf
* do not use word truesize unless the value used is named trusize
Larysa Zaremba (9):
xdp: use modulo operation to calculate XDP frag tailroom
xsk: introduce helper to determine rxq->frag_size
ice: fix rxq info registering in mbuf packets
ice: change XDP RxQ frag_size from DMA write length to xdp.frame_sz
i40e: fix registering XDP RxQ info
i40e: use xdp.frame_sz as XDP RxQ info frag_size
libeth, idpf: use truesize as XDP RxQ info frag_size
net: enetc: use truesize as XDP RxQ info frag_size
xdp: produce a warning when calculated tailroom is negative
drivers/net/ethernet/freescale/enetc/enetc.c | 2 +-
drivers/net/ethernet/intel/i40e/i40e_main.c | 40 +++++++++++---------
drivers/net/ethernet/intel/i40e/i40e_txrx.c | 5 ++-
drivers/net/ethernet/intel/ice/ice_base.c | 33 +++++-----------
drivers/net/ethernet/intel/ice/ice_txrx.c | 3 +-
drivers/net/ethernet/intel/ice/ice_xsk.c | 3 ++
drivers/net/ethernet/intel/idpf/xdp.c | 6 ++-
drivers/net/ethernet/intel/idpf/xsk.c | 1 +
drivers/net/ethernet/intel/libeth/xsk.c | 1 +
include/net/libeth/xsk.h | 3 ++
include/net/xdp_sock_drv.h | 10 +++++
net/core/filter.c | 6 ++-
12 files changed, 66 insertions(+), 47 deletions(-)
--
2.52.0
| null | null | null | [PATCH bpf v3 0/9] Address XDP frags having negative tailroom | The only user of frag_size field in XDP RxQ info is
bpf_xdp_frags_increase_tail(). It clearly expects whole buffer size instead
of DMA write size. Different assumptions in i40e driver configuration lead
to negative tailroom.
Set frag_size to the same value as frame_sz in shared pages mode, use new
helper to set frag_size when AF_XDP ZC is active.
Fixes: a045d2f2d03d ("i40e: set xdp_rxq_info::frag_size")
Signed-off-by: Larysa Zaremba <larysa.zaremba@intel.com>
---
drivers/net/ethernet/intel/i40e/i40e_main.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/intel/i40e/i40e_main.c b/drivers/net/ethernet/intel/i40e/i40e_main.c
index eaa5b65e6daf..e012a50a0448 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_main.c
+++ b/drivers/net/ethernet/intel/i40e/i40e_main.c
@@ -3561,6 +3561,7 @@ static int i40e_configure_rx_ring(struct i40e_ring *ring)
struct i40e_vsi *vsi = ring->vsi;
u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
u16 pf_q = vsi->base_queue + ring->queue_index;
+ u32 xdp_frame_sz = i40e_rx_pg_size(ring) / 2;
struct i40e_hw *hw = &vsi->back->hw;
struct i40e_hmc_obj_rxq rx_ctx;
int err = 0;
@@ -3579,11 +3580,12 @@ static int i40e_configure_rx_ring(struct i40e_ring *ring)
ring->xsk_pool = i40e_xsk_pool(ring);
if (ring->xsk_pool) {
+ xdp_frame_sz = xsk_pool_get_rx_frag_step(ring->xsk_pool);
ring->rx_buf_len = xsk_pool_get_rx_frame_size(ring->xsk_pool);
err = __xdp_rxq_info_reg(&ring->xdp_rxq, ring->netdev,
ring->queue_index,
ring->q_vector->napi.napi_id,
- ring->rx_buf_len);
+ xdp_frame_sz);
if (err)
return err;
err = xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
@@ -3599,7 +3601,7 @@ static int i40e_configure_rx_ring(struct i40e_ring *ring)
err = __xdp_rxq_info_reg(&ring->xdp_rxq, ring->netdev,
ring->queue_index,
ring->q_vector->napi.napi_id,
- ring->rx_buf_len);
+ xdp_frame_sz);
if (err)
return err;
err = xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
@@ -3610,7 +3612,7 @@ static int i40e_configure_rx_ring(struct i40e_ring *ring)
}
skip:
- xdp_init_buff(&ring->xdp, i40e_rx_pg_size(ring) / 2, &ring->xdp_rxq);
+ xdp_init_buff(&ring->xdp, xdp_frame_sz, &ring->xdp_rxq);
rx_ctx.dbuff = DIV_ROUND_UP(ring->rx_buf_len,
BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
--
2.52.0 | {
"author": "Larysa Zaremba <larysa.zaremba@intel.com>",
"date": "Tue, 17 Feb 2026 14:24:44 +0100",
"is_openbsd": false,
"thread_id": "aaG4z7ZIARBAzueO@boxer.mbox.gz"
} |
lkml_critique | lkml | Aside from the issue described below, tailroom calculation does not account
for pages being split between frags, e.g. in i40e, enetc and
AF_XDP ZC with smaller chunks. These series address the problem by
calculating modulo (skb_frag_off() % rxq->frag_size) in order to get
data offset within a smaller block of memory. Please note, xskxceiver
tail grow test passes without modulo e.g. in xdpdrv mode on i40e,
because there is not enough descriptors to get to flipped buffers.
Many ethernet drivers report xdp Rx queue frag size as being the same as
DMA write size. However, the only user of this field, namely
bpf_xdp_frags_increase_tail(), clearly expects a truesize.
Such difference leads to unspecific memory corruption issues under certain
circumstances, e.g. in ixgbevf maximum DMA write size is 3 KB, so when
running xskxceiver's XDP_ADJUST_TAIL_GROW_MULTI_BUFF, 6K packet fully uses
all DMA-writable space in 2 buffers. This would be fine, if only
rxq->frag_size was properly set to 4K, but value of 3K results in a
negative tailroom, because there is a non-zero page offset.
We are supposed to return -EINVAL and be done with it in such case,
but due to tailroom being stored as an unsigned int, it is reported to be
somewhere near UINT_MAX, resulting in a tail being grown, even if the
requested offset is too much(it is around 2K in the abovementioned test).
This later leads to all kinds of unspecific calltraces.
[ 7340.337579] xskxceiver[1440]: segfault at 1da718 ip 00007f4161aeac9d sp 00007f41615a6a00 error 6
[ 7340.338040] xskxceiver[1441]: segfault at 7f410000000b ip 00000000004042b5 sp 00007f415bffecf0 error 4
[ 7340.338179] in libc.so.6[61c9d,7f4161aaf000+160000]
[ 7340.339230] in xskxceiver[42b5,400000+69000]
[ 7340.340300] likely on CPU 6 (core 0, socket 6)
[ 7340.340302] Code: ff ff 01 e9 f4 fe ff ff 0f 1f 44 00 00 4c 39 f0 74 73 31 c0 ba 01 00 00 00 f0 0f b1 17 0f 85 ba 00 00 00 49 8b 87 88 00 00 00 <4c> 89 70 08 eb cc 0f 1f 44 00 00 48 8d bd f0 fe ff ff 89 85 ec fe
[ 7340.340888] likely on CPU 3 (core 0, socket 3)
[ 7340.345088] Code: 00 00 00 ba 00 00 00 00 be 00 00 00 00 89 c7 e8 31 ca ff ff 89 45 ec 8b 45 ec 85 c0 78 07 b8 00 00 00 00 eb 46 e8 0b c8 ff ff <8b> 00 83 f8 69 74 24 e8 ff c7 ff ff 8b 00 83 f8 0b 74 18 e8 f3 c7
[ 7340.404334] Oops: general protection fault, probably for non-canonical address 0x6d255010bdffc: 0000 [#1] SMP NOPTI
[ 7340.405972] CPU: 7 UID: 0 PID: 1439 Comm: xskxceiver Not tainted 6.19.0-rc1+ #21 PREEMPT(lazy)
[ 7340.408006] Hardware name: QEMU Standard PC (Q35 + ICH9, 2009), BIOS 1.17.0-5.fc42 04/01/2014
[ 7340.409716] RIP: 0010:lookup_swap_cgroup_id+0x44/0x80
[ 7340.410455] Code: 83 f8 1c 73 39 48 ba ff ff ff ff ff ff ff 03 48 8b 04 c5 20 55 fa bd 48 21 d1 48 89 ca 83 e1 01 48 d1 ea c1 e1 04 48 8d 04 90 <8b> 00 48 83 c4 10 d3 e8 c3 cc cc cc cc 31 c0 e9 98 b7 dd 00 48 89
[ 7340.412787] RSP: 0018:ffffcc5c04f7f6d0 EFLAGS: 00010202
[ 7340.413494] RAX: 0006d255010bdffc RBX: ffff891f477895a8 RCX: 0000000000000010
[ 7340.414431] RDX: 0001c17e3fffffff RSI: 00fa070000000000 RDI: 000382fc7fffffff
[ 7340.415354] RBP: 00fa070000000000 R08: ffffcc5c04f7f8f8 R09: ffffcc5c04f7f7d0
[ 7340.416283] R10: ffff891f4c1a7000 R11: ffffcc5c04f7f9c8 R12: ffffcc5c04f7f7d0
[ 7340.417218] R13: 03ffffffffffffff R14: 00fa06fffffffe00 R15: ffff891f47789500
[ 7340.418229] FS: 0000000000000000(0000) GS:ffff891ffdfaa000(0000) knlGS:0000000000000000
[ 7340.419489] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[ 7340.420286] CR2: 00007f415bfffd58 CR3: 0000000103f03002 CR4: 0000000000772ef0
[ 7340.421237] PKRU: 55555554
[ 7340.421623] Call Trace:
[ 7340.421987] <TASK>
[ 7340.422309] ? softleaf_from_pte+0x77/0xa0
[ 7340.422855] swap_pte_batch+0xa7/0x290
[ 7340.423363] zap_nonpresent_ptes.constprop.0.isra.0+0xd1/0x270
[ 7340.424102] zap_pte_range+0x281/0x580
[ 7340.424607] zap_pmd_range.isra.0+0xc9/0x240
[ 7340.425177] unmap_page_range+0x24d/0x420
[ 7340.425714] unmap_vmas+0xa1/0x180
[ 7340.426185] exit_mmap+0xe1/0x3b0
[ 7340.426644] __mmput+0x41/0x150
[ 7340.427098] exit_mm+0xb1/0x110
[ 7340.427539] do_exit+0x1b2/0x460
[ 7340.427992] do_group_exit+0x2d/0xc0
[ 7340.428477] get_signal+0x79d/0x7e0
[ 7340.428957] arch_do_signal_or_restart+0x34/0x100
[ 7340.429571] exit_to_user_mode_loop+0x8e/0x4c0
[ 7340.430159] do_syscall_64+0x188/0x6b0
[ 7340.430672] ? __do_sys_clone3+0xd9/0x120
[ 7340.431212] ? switch_fpu_return+0x4e/0xd0
[ 7340.431761] ? arch_exit_to_user_mode_prepare.isra.0+0xa1/0xc0
[ 7340.432498] ? do_syscall_64+0xbb/0x6b0
[ 7340.433015] ? __handle_mm_fault+0x445/0x690
[ 7340.433582] ? count_memcg_events+0xd6/0x210
[ 7340.434151] ? handle_mm_fault+0x212/0x340
[ 7340.434697] ? do_user_addr_fault+0x2b4/0x7b0
[ 7340.435271] ? clear_bhb_loop+0x30/0x80
[ 7340.435788] ? clear_bhb_loop+0x30/0x80
[ 7340.436299] ? clear_bhb_loop+0x30/0x80
[ 7340.436812] ? clear_bhb_loop+0x30/0x80
[ 7340.437323] entry_SYSCALL_64_after_hwframe+0x76/0x7e
[ 7340.437973] RIP: 0033:0x7f4161b14169
[ 7340.438468] Code: Unable to access opcode bytes at 0x7f4161b1413f.
[ 7340.439242] RSP: 002b:00007ffc6ebfa770 EFLAGS: 00000246 ORIG_RAX: 00000000000000ca
[ 7340.440173] RAX: fffffffffffffe00 RBX: 00000000000005a1 RCX: 00007f4161b14169
[ 7340.441061] RDX: 00000000000005a1 RSI: 0000000000000109 RDI: 00007f415bfff990
[ 7340.441943] RBP: 00007ffc6ebfa7a0 R08: 0000000000000000 R09: 00000000ffffffff
[ 7340.442824] R10: 0000000000000000 R11: 0000000000000246 R12: 0000000000000000
[ 7340.443707] R13: 0000000000000000 R14: 00007f415bfff990 R15: 00007f415bfff6c0
[ 7340.444586] </TASK>
[ 7340.444922] Modules linked in: rfkill intel_rapl_msr intel_rapl_common intel_uncore_frequency_common skx_edac_common nfit libnvdimm kvm_intel vfat fat kvm snd_pcm irqbypass rapl iTCO_wdt snd_timer intel_pmc_bxt iTCO_vendor_support snd ixgbevf virtio_net soundcore i2c_i801 pcspkr libeth_xdp net_failover i2c_smbus lpc_ich failover libeth virtio_balloon joydev 9p fuse loop zram lz4hc_compress lz4_compress 9pnet_virtio 9pnet netfs ghash_clmulni_intel serio_raw qemu_fw_cfg
[ 7340.449650] ---[ end trace 0000000000000000 ]---
The issue can be fixed in all in-tree drivers, but we cannot just trust OOT
drivers to not do this. Therefore, make tailroom a signed int and produce a
warning when it is negative to prevent such mistakes in the future.
The issue can also be easily reproduced with ice driver, by applying
the following diff to xskxceiver and enjoying a kernel panic in xdpdrv mode:
diff --git a/tools/testing/selftests/bpf/prog_tests/test_xsk.c b/tools/testing/selftests/bpf/prog_tests/test_xsk.c
index 5af28f359cfd..042d587fa7ef 100644
--- a/tools/testing/selftests/bpf/prog_tests/test_xsk.c
+++ b/tools/testing/selftests/bpf/prog_tests/test_xsk.c
@@ -2541,8 +2541,8 @@ int testapp_adjust_tail_grow_mb(struct test_spec *test)
{
test->mtu = MAX_ETH_JUMBO_SIZE;
/* Grow by (frag_size - last_frag_Size) - 1 to stay inside the last fragment */
- return testapp_adjust_tail(test, (XSK_UMEM__MAX_FRAME_SIZE / 2) - 1,
- XSK_UMEM__LARGE_FRAME_SIZE * 2);
+ return testapp_adjust_tail(test, XSK_UMEM__MAX_FRAME_SIZE * 100,
+ 6912);
}
int testapp_tx_queue_consumer(struct test_spec *test)
If we print out the values involved in the tailroom calculation:
tailroom = rxq->frag_size - skb_frag_size(frag) - skb_frag_off(frag);
4294967040 = 3456 - 3456 - 256
I personally reproduced and verified the issue in ice and i40e,
aside from WiP ixgbevf implementation.
v3->v2:
* unregister XDP RxQ info for subfunction in ice
* remove rx_buf_len variable in ice
* add missing ifdefed empty definition xsk_pool_get_rx_frag_step()
* move xsk_pool_get_rx_frag_step() call from idpf to libeth
* simplify conditions when determining frag_size in idpf
* correctly init xdp_frame_sz for non-main VSI in i40e
v1->v2:
* add modulo to calculate offset within chunk
* add helper for AF_XDP ZC queues
* fix the problem in ZC mode in i40e, ice and idpf
* verify solution in i40e
* fix RxQ info registering in i40e
* fix splitq handling in idpf
* do not use word truesize unless the value used is named trusize
Larysa Zaremba (9):
xdp: use modulo operation to calculate XDP frag tailroom
xsk: introduce helper to determine rxq->frag_size
ice: fix rxq info registering in mbuf packets
ice: change XDP RxQ frag_size from DMA write length to xdp.frame_sz
i40e: fix registering XDP RxQ info
i40e: use xdp.frame_sz as XDP RxQ info frag_size
libeth, idpf: use truesize as XDP RxQ info frag_size
net: enetc: use truesize as XDP RxQ info frag_size
xdp: produce a warning when calculated tailroom is negative
drivers/net/ethernet/freescale/enetc/enetc.c | 2 +-
drivers/net/ethernet/intel/i40e/i40e_main.c | 40 +++++++++++---------
drivers/net/ethernet/intel/i40e/i40e_txrx.c | 5 ++-
drivers/net/ethernet/intel/ice/ice_base.c | 33 +++++-----------
drivers/net/ethernet/intel/ice/ice_txrx.c | 3 +-
drivers/net/ethernet/intel/ice/ice_xsk.c | 3 ++
drivers/net/ethernet/intel/idpf/xdp.c | 6 ++-
drivers/net/ethernet/intel/idpf/xsk.c | 1 +
drivers/net/ethernet/intel/libeth/xsk.c | 1 +
include/net/libeth/xsk.h | 3 ++
include/net/xdp_sock_drv.h | 10 +++++
net/core/filter.c | 6 ++-
12 files changed, 66 insertions(+), 47 deletions(-)
--
2.52.0
| null | null | null | [PATCH bpf v3 0/9] Address XDP frags having negative tailroom | The only user of frag_size field in XDP RxQ info is
bpf_xdp_frags_increase_tail(). It clearly expects whole buffer size instead
of DMA write size. Different assumptions in idpf driver configuration lead
to negative tailroom.
To make it worse, buffer sizes are not actually uniform in idpf when
splitq is enabled, as there are several buffer queues, so rxq->rx_buf_size
is meaningless in this case.
Use truesize of the first bufq in AF_XDP ZC, as there is only one. Disable
growinf tail for regular splitq.
Fixes: ac8a861f632e ("idpf: prepare structures to support XDP")
Signed-off-by: Larysa Zaremba <larysa.zaremba@intel.com>
---
drivers/net/ethernet/intel/idpf/xdp.c | 6 +++++-
drivers/net/ethernet/intel/idpf/xsk.c | 1 +
drivers/net/ethernet/intel/libeth/xsk.c | 1 +
include/net/libeth/xsk.h | 3 +++
4 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/intel/idpf/xdp.c b/drivers/net/ethernet/intel/idpf/xdp.c
index 958d16f87424..7d91f21174de 100644
--- a/drivers/net/ethernet/intel/idpf/xdp.c
+++ b/drivers/net/ethernet/intel/idpf/xdp.c
@@ -46,11 +46,15 @@ static int __idpf_xdp_rxq_info_init(struct idpf_rx_queue *rxq, void *arg)
{
const struct idpf_vport *vport = rxq->q_vector->vport;
bool split = idpf_is_queue_model_split(vport->rxq_model);
+ u32 frag_size = 0;
int err;
+ if (idpf_queue_has(XSK, rxq))
+ frag_size = rxq->bufq_sets[0].bufq.truesize;
+
err = __xdp_rxq_info_reg(&rxq->xdp_rxq, vport->netdev, rxq->idx,
rxq->q_vector->napi.napi_id,
- rxq->rx_buf_size);
+ frag_size);
if (err)
return err;
diff --git a/drivers/net/ethernet/intel/idpf/xsk.c b/drivers/net/ethernet/intel/idpf/xsk.c
index fd2cc43ab43c..95a665cb2f33 100644
--- a/drivers/net/ethernet/intel/idpf/xsk.c
+++ b/drivers/net/ethernet/intel/idpf/xsk.c
@@ -401,6 +401,7 @@ int idpf_xskfq_init(struct idpf_buf_queue *bufq)
bufq->pending = fq.pending;
bufq->thresh = fq.thresh;
bufq->rx_buf_size = fq.buf_len;
+ bufq->truesize = fq.truesize;
if (!idpf_xskfq_refill(bufq))
netdev_err(bufq->pool->netdev,
diff --git a/drivers/net/ethernet/intel/libeth/xsk.c b/drivers/net/ethernet/intel/libeth/xsk.c
index 846e902e31b6..4882951d5c9c 100644
--- a/drivers/net/ethernet/intel/libeth/xsk.c
+++ b/drivers/net/ethernet/intel/libeth/xsk.c
@@ -167,6 +167,7 @@ int libeth_xskfq_create(struct libeth_xskfq *fq)
fq->pending = fq->count;
fq->thresh = libeth_xdp_queue_threshold(fq->count);
fq->buf_len = xsk_pool_get_rx_frame_size(fq->pool);
+ fq->truesize = xsk_pool_get_rx_frag_step(fq->pool);
return 0;
}
diff --git a/include/net/libeth/xsk.h b/include/net/libeth/xsk.h
index 481a7b28e6f2..82b5d21aae87 100644
--- a/include/net/libeth/xsk.h
+++ b/include/net/libeth/xsk.h
@@ -597,6 +597,7 @@ __libeth_xsk_run_pass(struct libeth_xdp_buff *xdp,
* @pending: current number of XSkFQEs to refill
* @thresh: threshold below which the queue is refilled
* @buf_len: HW-writeable length per each buffer
+ * @truesize: step between consecutive buffers, 0 if none exists
* @nid: ID of the closest NUMA node with memory
*/
struct libeth_xskfq {
@@ -614,6 +615,8 @@ struct libeth_xskfq {
u32 thresh;
u32 buf_len;
+ u32 truesize;
+
int nid;
};
--
2.52.0 | {
"author": "Larysa Zaremba <larysa.zaremba@intel.com>",
"date": "Tue, 17 Feb 2026 14:24:45 +0100",
"is_openbsd": false,
"thread_id": "aaG4z7ZIARBAzueO@boxer.mbox.gz"
} |
lkml_critique | lkml | Aside from the issue described below, tailroom calculation does not account
for pages being split between frags, e.g. in i40e, enetc and
AF_XDP ZC with smaller chunks. These series address the problem by
calculating modulo (skb_frag_off() % rxq->frag_size) in order to get
data offset within a smaller block of memory. Please note, xskxceiver
tail grow test passes without modulo e.g. in xdpdrv mode on i40e,
because there is not enough descriptors to get to flipped buffers.
Many ethernet drivers report xdp Rx queue frag size as being the same as
DMA write size. However, the only user of this field, namely
bpf_xdp_frags_increase_tail(), clearly expects a truesize.
Such difference leads to unspecific memory corruption issues under certain
circumstances, e.g. in ixgbevf maximum DMA write size is 3 KB, so when
running xskxceiver's XDP_ADJUST_TAIL_GROW_MULTI_BUFF, 6K packet fully uses
all DMA-writable space in 2 buffers. This would be fine, if only
rxq->frag_size was properly set to 4K, but value of 3K results in a
negative tailroom, because there is a non-zero page offset.
We are supposed to return -EINVAL and be done with it in such case,
but due to tailroom being stored as an unsigned int, it is reported to be
somewhere near UINT_MAX, resulting in a tail being grown, even if the
requested offset is too much(it is around 2K in the abovementioned test).
This later leads to all kinds of unspecific calltraces.
[ 7340.337579] xskxceiver[1440]: segfault at 1da718 ip 00007f4161aeac9d sp 00007f41615a6a00 error 6
[ 7340.338040] xskxceiver[1441]: segfault at 7f410000000b ip 00000000004042b5 sp 00007f415bffecf0 error 4
[ 7340.338179] in libc.so.6[61c9d,7f4161aaf000+160000]
[ 7340.339230] in xskxceiver[42b5,400000+69000]
[ 7340.340300] likely on CPU 6 (core 0, socket 6)
[ 7340.340302] Code: ff ff 01 e9 f4 fe ff ff 0f 1f 44 00 00 4c 39 f0 74 73 31 c0 ba 01 00 00 00 f0 0f b1 17 0f 85 ba 00 00 00 49 8b 87 88 00 00 00 <4c> 89 70 08 eb cc 0f 1f 44 00 00 48 8d bd f0 fe ff ff 89 85 ec fe
[ 7340.340888] likely on CPU 3 (core 0, socket 3)
[ 7340.345088] Code: 00 00 00 ba 00 00 00 00 be 00 00 00 00 89 c7 e8 31 ca ff ff 89 45 ec 8b 45 ec 85 c0 78 07 b8 00 00 00 00 eb 46 e8 0b c8 ff ff <8b> 00 83 f8 69 74 24 e8 ff c7 ff ff 8b 00 83 f8 0b 74 18 e8 f3 c7
[ 7340.404334] Oops: general protection fault, probably for non-canonical address 0x6d255010bdffc: 0000 [#1] SMP NOPTI
[ 7340.405972] CPU: 7 UID: 0 PID: 1439 Comm: xskxceiver Not tainted 6.19.0-rc1+ #21 PREEMPT(lazy)
[ 7340.408006] Hardware name: QEMU Standard PC (Q35 + ICH9, 2009), BIOS 1.17.0-5.fc42 04/01/2014
[ 7340.409716] RIP: 0010:lookup_swap_cgroup_id+0x44/0x80
[ 7340.410455] Code: 83 f8 1c 73 39 48 ba ff ff ff ff ff ff ff 03 48 8b 04 c5 20 55 fa bd 48 21 d1 48 89 ca 83 e1 01 48 d1 ea c1 e1 04 48 8d 04 90 <8b> 00 48 83 c4 10 d3 e8 c3 cc cc cc cc 31 c0 e9 98 b7 dd 00 48 89
[ 7340.412787] RSP: 0018:ffffcc5c04f7f6d0 EFLAGS: 00010202
[ 7340.413494] RAX: 0006d255010bdffc RBX: ffff891f477895a8 RCX: 0000000000000010
[ 7340.414431] RDX: 0001c17e3fffffff RSI: 00fa070000000000 RDI: 000382fc7fffffff
[ 7340.415354] RBP: 00fa070000000000 R08: ffffcc5c04f7f8f8 R09: ffffcc5c04f7f7d0
[ 7340.416283] R10: ffff891f4c1a7000 R11: ffffcc5c04f7f9c8 R12: ffffcc5c04f7f7d0
[ 7340.417218] R13: 03ffffffffffffff R14: 00fa06fffffffe00 R15: ffff891f47789500
[ 7340.418229] FS: 0000000000000000(0000) GS:ffff891ffdfaa000(0000) knlGS:0000000000000000
[ 7340.419489] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[ 7340.420286] CR2: 00007f415bfffd58 CR3: 0000000103f03002 CR4: 0000000000772ef0
[ 7340.421237] PKRU: 55555554
[ 7340.421623] Call Trace:
[ 7340.421987] <TASK>
[ 7340.422309] ? softleaf_from_pte+0x77/0xa0
[ 7340.422855] swap_pte_batch+0xa7/0x290
[ 7340.423363] zap_nonpresent_ptes.constprop.0.isra.0+0xd1/0x270
[ 7340.424102] zap_pte_range+0x281/0x580
[ 7340.424607] zap_pmd_range.isra.0+0xc9/0x240
[ 7340.425177] unmap_page_range+0x24d/0x420
[ 7340.425714] unmap_vmas+0xa1/0x180
[ 7340.426185] exit_mmap+0xe1/0x3b0
[ 7340.426644] __mmput+0x41/0x150
[ 7340.427098] exit_mm+0xb1/0x110
[ 7340.427539] do_exit+0x1b2/0x460
[ 7340.427992] do_group_exit+0x2d/0xc0
[ 7340.428477] get_signal+0x79d/0x7e0
[ 7340.428957] arch_do_signal_or_restart+0x34/0x100
[ 7340.429571] exit_to_user_mode_loop+0x8e/0x4c0
[ 7340.430159] do_syscall_64+0x188/0x6b0
[ 7340.430672] ? __do_sys_clone3+0xd9/0x120
[ 7340.431212] ? switch_fpu_return+0x4e/0xd0
[ 7340.431761] ? arch_exit_to_user_mode_prepare.isra.0+0xa1/0xc0
[ 7340.432498] ? do_syscall_64+0xbb/0x6b0
[ 7340.433015] ? __handle_mm_fault+0x445/0x690
[ 7340.433582] ? count_memcg_events+0xd6/0x210
[ 7340.434151] ? handle_mm_fault+0x212/0x340
[ 7340.434697] ? do_user_addr_fault+0x2b4/0x7b0
[ 7340.435271] ? clear_bhb_loop+0x30/0x80
[ 7340.435788] ? clear_bhb_loop+0x30/0x80
[ 7340.436299] ? clear_bhb_loop+0x30/0x80
[ 7340.436812] ? clear_bhb_loop+0x30/0x80
[ 7340.437323] entry_SYSCALL_64_after_hwframe+0x76/0x7e
[ 7340.437973] RIP: 0033:0x7f4161b14169
[ 7340.438468] Code: Unable to access opcode bytes at 0x7f4161b1413f.
[ 7340.439242] RSP: 002b:00007ffc6ebfa770 EFLAGS: 00000246 ORIG_RAX: 00000000000000ca
[ 7340.440173] RAX: fffffffffffffe00 RBX: 00000000000005a1 RCX: 00007f4161b14169
[ 7340.441061] RDX: 00000000000005a1 RSI: 0000000000000109 RDI: 00007f415bfff990
[ 7340.441943] RBP: 00007ffc6ebfa7a0 R08: 0000000000000000 R09: 00000000ffffffff
[ 7340.442824] R10: 0000000000000000 R11: 0000000000000246 R12: 0000000000000000
[ 7340.443707] R13: 0000000000000000 R14: 00007f415bfff990 R15: 00007f415bfff6c0
[ 7340.444586] </TASK>
[ 7340.444922] Modules linked in: rfkill intel_rapl_msr intel_rapl_common intel_uncore_frequency_common skx_edac_common nfit libnvdimm kvm_intel vfat fat kvm snd_pcm irqbypass rapl iTCO_wdt snd_timer intel_pmc_bxt iTCO_vendor_support snd ixgbevf virtio_net soundcore i2c_i801 pcspkr libeth_xdp net_failover i2c_smbus lpc_ich failover libeth virtio_balloon joydev 9p fuse loop zram lz4hc_compress lz4_compress 9pnet_virtio 9pnet netfs ghash_clmulni_intel serio_raw qemu_fw_cfg
[ 7340.449650] ---[ end trace 0000000000000000 ]---
The issue can be fixed in all in-tree drivers, but we cannot just trust OOT
drivers to not do this. Therefore, make tailroom a signed int and produce a
warning when it is negative to prevent such mistakes in the future.
The issue can also be easily reproduced with ice driver, by applying
the following diff to xskxceiver and enjoying a kernel panic in xdpdrv mode:
diff --git a/tools/testing/selftests/bpf/prog_tests/test_xsk.c b/tools/testing/selftests/bpf/prog_tests/test_xsk.c
index 5af28f359cfd..042d587fa7ef 100644
--- a/tools/testing/selftests/bpf/prog_tests/test_xsk.c
+++ b/tools/testing/selftests/bpf/prog_tests/test_xsk.c
@@ -2541,8 +2541,8 @@ int testapp_adjust_tail_grow_mb(struct test_spec *test)
{
test->mtu = MAX_ETH_JUMBO_SIZE;
/* Grow by (frag_size - last_frag_Size) - 1 to stay inside the last fragment */
- return testapp_adjust_tail(test, (XSK_UMEM__MAX_FRAME_SIZE / 2) - 1,
- XSK_UMEM__LARGE_FRAME_SIZE * 2);
+ return testapp_adjust_tail(test, XSK_UMEM__MAX_FRAME_SIZE * 100,
+ 6912);
}
int testapp_tx_queue_consumer(struct test_spec *test)
If we print out the values involved in the tailroom calculation:
tailroom = rxq->frag_size - skb_frag_size(frag) - skb_frag_off(frag);
4294967040 = 3456 - 3456 - 256
I personally reproduced and verified the issue in ice and i40e,
aside from WiP ixgbevf implementation.
v3->v2:
* unregister XDP RxQ info for subfunction in ice
* remove rx_buf_len variable in ice
* add missing ifdefed empty definition xsk_pool_get_rx_frag_step()
* move xsk_pool_get_rx_frag_step() call from idpf to libeth
* simplify conditions when determining frag_size in idpf
* correctly init xdp_frame_sz for non-main VSI in i40e
v1->v2:
* add modulo to calculate offset within chunk
* add helper for AF_XDP ZC queues
* fix the problem in ZC mode in i40e, ice and idpf
* verify solution in i40e
* fix RxQ info registering in i40e
* fix splitq handling in idpf
* do not use word truesize unless the value used is named trusize
Larysa Zaremba (9):
xdp: use modulo operation to calculate XDP frag tailroom
xsk: introduce helper to determine rxq->frag_size
ice: fix rxq info registering in mbuf packets
ice: change XDP RxQ frag_size from DMA write length to xdp.frame_sz
i40e: fix registering XDP RxQ info
i40e: use xdp.frame_sz as XDP RxQ info frag_size
libeth, idpf: use truesize as XDP RxQ info frag_size
net: enetc: use truesize as XDP RxQ info frag_size
xdp: produce a warning when calculated tailroom is negative
drivers/net/ethernet/freescale/enetc/enetc.c | 2 +-
drivers/net/ethernet/intel/i40e/i40e_main.c | 40 +++++++++++---------
drivers/net/ethernet/intel/i40e/i40e_txrx.c | 5 ++-
drivers/net/ethernet/intel/ice/ice_base.c | 33 +++++-----------
drivers/net/ethernet/intel/ice/ice_txrx.c | 3 +-
drivers/net/ethernet/intel/ice/ice_xsk.c | 3 ++
drivers/net/ethernet/intel/idpf/xdp.c | 6 ++-
drivers/net/ethernet/intel/idpf/xsk.c | 1 +
drivers/net/ethernet/intel/libeth/xsk.c | 1 +
include/net/libeth/xsk.h | 3 ++
include/net/xdp_sock_drv.h | 10 +++++
net/core/filter.c | 6 ++-
12 files changed, 66 insertions(+), 47 deletions(-)
--
2.52.0
| null | null | null | [PATCH bpf v3 0/9] Address XDP frags having negative tailroom | The only user of frag_size field in XDP RxQ info is
bpf_xdp_frags_increase_tail(). It clearly expects truesize instead of DMA
write size. Different assumptions in enetc driver configuration lead to
negative tailroom.
Set frag_size to the same value as frame_sz.
Fixes: 2768b2e2f7d2 ("net: enetc: register XDP RX queues with frag_size")
Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Larysa Zaremba <larysa.zaremba@intel.com>
---
drivers/net/ethernet/freescale/enetc/enetc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/freescale/enetc/enetc.c b/drivers/net/ethernet/freescale/enetc/enetc.c
index e380a4f39855..9fdd448e602f 100644
--- a/drivers/net/ethernet/freescale/enetc/enetc.c
+++ b/drivers/net/ethernet/freescale/enetc/enetc.c
@@ -3468,7 +3468,7 @@ static int enetc_int_vector_init(struct enetc_ndev_priv *priv, int i,
priv->rx_ring[i] = bdr;
err = __xdp_rxq_info_reg(&bdr->xdp.rxq, priv->ndev, i, 0,
- ENETC_RXB_DMA_SIZE_XDP);
+ ENETC_RXB_TRUESIZE);
if (err)
goto free_vector;
--
2.52.0 | {
"author": "Larysa Zaremba <larysa.zaremba@intel.com>",
"date": "Tue, 17 Feb 2026 14:24:46 +0100",
"is_openbsd": false,
"thread_id": "aaG4z7ZIARBAzueO@boxer.mbox.gz"
} |
lkml_critique | lkml | Aside from the issue described below, tailroom calculation does not account
for pages being split between frags, e.g. in i40e, enetc and
AF_XDP ZC with smaller chunks. These series address the problem by
calculating modulo (skb_frag_off() % rxq->frag_size) in order to get
data offset within a smaller block of memory. Please note, xskxceiver
tail grow test passes without modulo e.g. in xdpdrv mode on i40e,
because there is not enough descriptors to get to flipped buffers.
Many ethernet drivers report xdp Rx queue frag size as being the same as
DMA write size. However, the only user of this field, namely
bpf_xdp_frags_increase_tail(), clearly expects a truesize.
Such difference leads to unspecific memory corruption issues under certain
circumstances, e.g. in ixgbevf maximum DMA write size is 3 KB, so when
running xskxceiver's XDP_ADJUST_TAIL_GROW_MULTI_BUFF, 6K packet fully uses
all DMA-writable space in 2 buffers. This would be fine, if only
rxq->frag_size was properly set to 4K, but value of 3K results in a
negative tailroom, because there is a non-zero page offset.
We are supposed to return -EINVAL and be done with it in such case,
but due to tailroom being stored as an unsigned int, it is reported to be
somewhere near UINT_MAX, resulting in a tail being grown, even if the
requested offset is too much(it is around 2K in the abovementioned test).
This later leads to all kinds of unspecific calltraces.
[ 7340.337579] xskxceiver[1440]: segfault at 1da718 ip 00007f4161aeac9d sp 00007f41615a6a00 error 6
[ 7340.338040] xskxceiver[1441]: segfault at 7f410000000b ip 00000000004042b5 sp 00007f415bffecf0 error 4
[ 7340.338179] in libc.so.6[61c9d,7f4161aaf000+160000]
[ 7340.339230] in xskxceiver[42b5,400000+69000]
[ 7340.340300] likely on CPU 6 (core 0, socket 6)
[ 7340.340302] Code: ff ff 01 e9 f4 fe ff ff 0f 1f 44 00 00 4c 39 f0 74 73 31 c0 ba 01 00 00 00 f0 0f b1 17 0f 85 ba 00 00 00 49 8b 87 88 00 00 00 <4c> 89 70 08 eb cc 0f 1f 44 00 00 48 8d bd f0 fe ff ff 89 85 ec fe
[ 7340.340888] likely on CPU 3 (core 0, socket 3)
[ 7340.345088] Code: 00 00 00 ba 00 00 00 00 be 00 00 00 00 89 c7 e8 31 ca ff ff 89 45 ec 8b 45 ec 85 c0 78 07 b8 00 00 00 00 eb 46 e8 0b c8 ff ff <8b> 00 83 f8 69 74 24 e8 ff c7 ff ff 8b 00 83 f8 0b 74 18 e8 f3 c7
[ 7340.404334] Oops: general protection fault, probably for non-canonical address 0x6d255010bdffc: 0000 [#1] SMP NOPTI
[ 7340.405972] CPU: 7 UID: 0 PID: 1439 Comm: xskxceiver Not tainted 6.19.0-rc1+ #21 PREEMPT(lazy)
[ 7340.408006] Hardware name: QEMU Standard PC (Q35 + ICH9, 2009), BIOS 1.17.0-5.fc42 04/01/2014
[ 7340.409716] RIP: 0010:lookup_swap_cgroup_id+0x44/0x80
[ 7340.410455] Code: 83 f8 1c 73 39 48 ba ff ff ff ff ff ff ff 03 48 8b 04 c5 20 55 fa bd 48 21 d1 48 89 ca 83 e1 01 48 d1 ea c1 e1 04 48 8d 04 90 <8b> 00 48 83 c4 10 d3 e8 c3 cc cc cc cc 31 c0 e9 98 b7 dd 00 48 89
[ 7340.412787] RSP: 0018:ffffcc5c04f7f6d0 EFLAGS: 00010202
[ 7340.413494] RAX: 0006d255010bdffc RBX: ffff891f477895a8 RCX: 0000000000000010
[ 7340.414431] RDX: 0001c17e3fffffff RSI: 00fa070000000000 RDI: 000382fc7fffffff
[ 7340.415354] RBP: 00fa070000000000 R08: ffffcc5c04f7f8f8 R09: ffffcc5c04f7f7d0
[ 7340.416283] R10: ffff891f4c1a7000 R11: ffffcc5c04f7f9c8 R12: ffffcc5c04f7f7d0
[ 7340.417218] R13: 03ffffffffffffff R14: 00fa06fffffffe00 R15: ffff891f47789500
[ 7340.418229] FS: 0000000000000000(0000) GS:ffff891ffdfaa000(0000) knlGS:0000000000000000
[ 7340.419489] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[ 7340.420286] CR2: 00007f415bfffd58 CR3: 0000000103f03002 CR4: 0000000000772ef0
[ 7340.421237] PKRU: 55555554
[ 7340.421623] Call Trace:
[ 7340.421987] <TASK>
[ 7340.422309] ? softleaf_from_pte+0x77/0xa0
[ 7340.422855] swap_pte_batch+0xa7/0x290
[ 7340.423363] zap_nonpresent_ptes.constprop.0.isra.0+0xd1/0x270
[ 7340.424102] zap_pte_range+0x281/0x580
[ 7340.424607] zap_pmd_range.isra.0+0xc9/0x240
[ 7340.425177] unmap_page_range+0x24d/0x420
[ 7340.425714] unmap_vmas+0xa1/0x180
[ 7340.426185] exit_mmap+0xe1/0x3b0
[ 7340.426644] __mmput+0x41/0x150
[ 7340.427098] exit_mm+0xb1/0x110
[ 7340.427539] do_exit+0x1b2/0x460
[ 7340.427992] do_group_exit+0x2d/0xc0
[ 7340.428477] get_signal+0x79d/0x7e0
[ 7340.428957] arch_do_signal_or_restart+0x34/0x100
[ 7340.429571] exit_to_user_mode_loop+0x8e/0x4c0
[ 7340.430159] do_syscall_64+0x188/0x6b0
[ 7340.430672] ? __do_sys_clone3+0xd9/0x120
[ 7340.431212] ? switch_fpu_return+0x4e/0xd0
[ 7340.431761] ? arch_exit_to_user_mode_prepare.isra.0+0xa1/0xc0
[ 7340.432498] ? do_syscall_64+0xbb/0x6b0
[ 7340.433015] ? __handle_mm_fault+0x445/0x690
[ 7340.433582] ? count_memcg_events+0xd6/0x210
[ 7340.434151] ? handle_mm_fault+0x212/0x340
[ 7340.434697] ? do_user_addr_fault+0x2b4/0x7b0
[ 7340.435271] ? clear_bhb_loop+0x30/0x80
[ 7340.435788] ? clear_bhb_loop+0x30/0x80
[ 7340.436299] ? clear_bhb_loop+0x30/0x80
[ 7340.436812] ? clear_bhb_loop+0x30/0x80
[ 7340.437323] entry_SYSCALL_64_after_hwframe+0x76/0x7e
[ 7340.437973] RIP: 0033:0x7f4161b14169
[ 7340.438468] Code: Unable to access opcode bytes at 0x7f4161b1413f.
[ 7340.439242] RSP: 002b:00007ffc6ebfa770 EFLAGS: 00000246 ORIG_RAX: 00000000000000ca
[ 7340.440173] RAX: fffffffffffffe00 RBX: 00000000000005a1 RCX: 00007f4161b14169
[ 7340.441061] RDX: 00000000000005a1 RSI: 0000000000000109 RDI: 00007f415bfff990
[ 7340.441943] RBP: 00007ffc6ebfa7a0 R08: 0000000000000000 R09: 00000000ffffffff
[ 7340.442824] R10: 0000000000000000 R11: 0000000000000246 R12: 0000000000000000
[ 7340.443707] R13: 0000000000000000 R14: 00007f415bfff990 R15: 00007f415bfff6c0
[ 7340.444586] </TASK>
[ 7340.444922] Modules linked in: rfkill intel_rapl_msr intel_rapl_common intel_uncore_frequency_common skx_edac_common nfit libnvdimm kvm_intel vfat fat kvm snd_pcm irqbypass rapl iTCO_wdt snd_timer intel_pmc_bxt iTCO_vendor_support snd ixgbevf virtio_net soundcore i2c_i801 pcspkr libeth_xdp net_failover i2c_smbus lpc_ich failover libeth virtio_balloon joydev 9p fuse loop zram lz4hc_compress lz4_compress 9pnet_virtio 9pnet netfs ghash_clmulni_intel serio_raw qemu_fw_cfg
[ 7340.449650] ---[ end trace 0000000000000000 ]---
The issue can be fixed in all in-tree drivers, but we cannot just trust OOT
drivers to not do this. Therefore, make tailroom a signed int and produce a
warning when it is negative to prevent such mistakes in the future.
The issue can also be easily reproduced with ice driver, by applying
the following diff to xskxceiver and enjoying a kernel panic in xdpdrv mode:
diff --git a/tools/testing/selftests/bpf/prog_tests/test_xsk.c b/tools/testing/selftests/bpf/prog_tests/test_xsk.c
index 5af28f359cfd..042d587fa7ef 100644
--- a/tools/testing/selftests/bpf/prog_tests/test_xsk.c
+++ b/tools/testing/selftests/bpf/prog_tests/test_xsk.c
@@ -2541,8 +2541,8 @@ int testapp_adjust_tail_grow_mb(struct test_spec *test)
{
test->mtu = MAX_ETH_JUMBO_SIZE;
/* Grow by (frag_size - last_frag_Size) - 1 to stay inside the last fragment */
- return testapp_adjust_tail(test, (XSK_UMEM__MAX_FRAME_SIZE / 2) - 1,
- XSK_UMEM__LARGE_FRAME_SIZE * 2);
+ return testapp_adjust_tail(test, XSK_UMEM__MAX_FRAME_SIZE * 100,
+ 6912);
}
int testapp_tx_queue_consumer(struct test_spec *test)
If we print out the values involved in the tailroom calculation:
tailroom = rxq->frag_size - skb_frag_size(frag) - skb_frag_off(frag);
4294967040 = 3456 - 3456 - 256
I personally reproduced and verified the issue in ice and i40e,
aside from WiP ixgbevf implementation.
v3->v2:
* unregister XDP RxQ info for subfunction in ice
* remove rx_buf_len variable in ice
* add missing ifdefed empty definition xsk_pool_get_rx_frag_step()
* move xsk_pool_get_rx_frag_step() call from idpf to libeth
* simplify conditions when determining frag_size in idpf
* correctly init xdp_frame_sz for non-main VSI in i40e
v1->v2:
* add modulo to calculate offset within chunk
* add helper for AF_XDP ZC queues
* fix the problem in ZC mode in i40e, ice and idpf
* verify solution in i40e
* fix RxQ info registering in i40e
* fix splitq handling in idpf
* do not use word truesize unless the value used is named trusize
Larysa Zaremba (9):
xdp: use modulo operation to calculate XDP frag tailroom
xsk: introduce helper to determine rxq->frag_size
ice: fix rxq info registering in mbuf packets
ice: change XDP RxQ frag_size from DMA write length to xdp.frame_sz
i40e: fix registering XDP RxQ info
i40e: use xdp.frame_sz as XDP RxQ info frag_size
libeth, idpf: use truesize as XDP RxQ info frag_size
net: enetc: use truesize as XDP RxQ info frag_size
xdp: produce a warning when calculated tailroom is negative
drivers/net/ethernet/freescale/enetc/enetc.c | 2 +-
drivers/net/ethernet/intel/i40e/i40e_main.c | 40 +++++++++++---------
drivers/net/ethernet/intel/i40e/i40e_txrx.c | 5 ++-
drivers/net/ethernet/intel/ice/ice_base.c | 33 +++++-----------
drivers/net/ethernet/intel/ice/ice_txrx.c | 3 +-
drivers/net/ethernet/intel/ice/ice_xsk.c | 3 ++
drivers/net/ethernet/intel/idpf/xdp.c | 6 ++-
drivers/net/ethernet/intel/idpf/xsk.c | 1 +
drivers/net/ethernet/intel/libeth/xsk.c | 1 +
include/net/libeth/xsk.h | 3 ++
include/net/xdp_sock_drv.h | 10 +++++
net/core/filter.c | 6 ++-
12 files changed, 66 insertions(+), 47 deletions(-)
--
2.52.0
| null | null | null | [PATCH bpf v3 0/9] Address XDP frags having negative tailroom | Many ethernet drivers report xdp Rx queue frag size as being the same as
DMA write size. However, the only user of this field, namely
bpf_xdp_frags_increase_tail(), clearly expects a truesize.
Such difference leads to unspecific memory corruption issues under certain
circumstances, e.g. in ixgbevf maximum DMA write size is 3 KB, so when
running xskxceiver's XDP_ADJUST_TAIL_GROW_MULTI_BUFF, 6K packet fully uses
all DMA-writable space in 2 buffers. This would be fine, if only
rxq->frag_size was properly set to 4K, but value of 3K results in a
negative tailroom, because there is a non-zero page offset.
We are supposed to return -EINVAL and be done with it in such case, but due
to tailroom being stored as an unsigned int, it is reported to be somewhere
near UINT_MAX, resulting in a tail being grown, even if the requested
offset is too much (it is around 2K in the abovementioned test). This later
leads to all kinds of unspecific calltraces.
[ 7340.337579] xskxceiver[1440]: segfault at 1da718 ip 00007f4161aeac9d sp 00007f41615a6a00 error 6
[ 7340.338040] xskxceiver[1441]: segfault at 7f410000000b ip 00000000004042b5 sp 00007f415bffecf0 error 4
[ 7340.338179] in libc.so.6[61c9d,7f4161aaf000+160000]
[ 7340.339230] in xskxceiver[42b5,400000+69000]
[ 7340.340300] likely on CPU 6 (core 0, socket 6)
[ 7340.340302] Code: ff ff 01 e9 f4 fe ff ff 0f 1f 44 00 00 4c 39 f0 74 73 31 c0 ba 01 00 00 00 f0 0f b1 17 0f 85 ba 00 00 00 49 8b 87 88 00 00 00 <4c> 89 70 08 eb cc 0f 1f 44 00 00 48 8d bd f0 fe ff ff 89 85 ec fe
[ 7340.340888] likely on CPU 3 (core 0, socket 3)
[ 7340.345088] Code: 00 00 00 ba 00 00 00 00 be 00 00 00 00 89 c7 e8 31 ca ff ff 89 45 ec 8b 45 ec 85 c0 78 07 b8 00 00 00 00 eb 46 e8 0b c8 ff ff <8b> 00 83 f8 69 74 24 e8 ff c7 ff ff 8b 00 83 f8 0b 74 18 e8 f3 c7
[ 7340.404334] Oops: general protection fault, probably for non-canonical address 0x6d255010bdffc: 0000 [#1] SMP NOPTI
[ 7340.405972] CPU: 7 UID: 0 PID: 1439 Comm: xskxceiver Not tainted 6.19.0-rc1+ #21 PREEMPT(lazy)
[ 7340.408006] Hardware name: QEMU Standard PC (Q35 + ICH9, 2009), BIOS 1.17.0-5.fc42 04/01/2014
[ 7340.409716] RIP: 0010:lookup_swap_cgroup_id+0x44/0x80
[ 7340.410455] Code: 83 f8 1c 73 39 48 ba ff ff ff ff ff ff ff 03 48 8b 04 c5 20 55 fa bd 48 21 d1 48 89 ca 83 e1 01 48 d1 ea c1 e1 04 48 8d 04 90 <8b> 00 48 83 c4 10 d3 e8 c3 cc cc cc cc 31 c0 e9 98 b7 dd 00 48 89
[ 7340.412787] RSP: 0018:ffffcc5c04f7f6d0 EFLAGS: 00010202
[ 7340.413494] RAX: 0006d255010bdffc RBX: ffff891f477895a8 RCX: 0000000000000010
[ 7340.414431] RDX: 0001c17e3fffffff RSI: 00fa070000000000 RDI: 000382fc7fffffff
[ 7340.415354] RBP: 00fa070000000000 R08: ffffcc5c04f7f8f8 R09: ffffcc5c04f7f7d0
[ 7340.416283] R10: ffff891f4c1a7000 R11: ffffcc5c04f7f9c8 R12: ffffcc5c04f7f7d0
[ 7340.417218] R13: 03ffffffffffffff R14: 00fa06fffffffe00 R15: ffff891f47789500
[ 7340.418229] FS: 0000000000000000(0000) GS:ffff891ffdfaa000(0000) knlGS:0000000000000000
[ 7340.419489] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[ 7340.420286] CR2: 00007f415bfffd58 CR3: 0000000103f03002 CR4: 0000000000772ef0
[ 7340.421237] PKRU: 55555554
[ 7340.421623] Call Trace:
[ 7340.421987] <TASK>
[ 7340.422309] ? softleaf_from_pte+0x77/0xa0
[ 7340.422855] swap_pte_batch+0xa7/0x290
[ 7340.423363] zap_nonpresent_ptes.constprop.0.isra.0+0xd1/0x270
[ 7340.424102] zap_pte_range+0x281/0x580
[ 7340.424607] zap_pmd_range.isra.0+0xc9/0x240
[ 7340.425177] unmap_page_range+0x24d/0x420
[ 7340.425714] unmap_vmas+0xa1/0x180
[ 7340.426185] exit_mmap+0xe1/0x3b0
[ 7340.426644] __mmput+0x41/0x150
[ 7340.427098] exit_mm+0xb1/0x110
[ 7340.427539] do_exit+0x1b2/0x460
[ 7340.427992] do_group_exit+0x2d/0xc0
[ 7340.428477] get_signal+0x79d/0x7e0
[ 7340.428957] arch_do_signal_or_restart+0x34/0x100
[ 7340.429571] exit_to_user_mode_loop+0x8e/0x4c0
[ 7340.430159] do_syscall_64+0x188/0x6b0
[ 7340.430672] ? __do_sys_clone3+0xd9/0x120
[ 7340.431212] ? switch_fpu_return+0x4e/0xd0
[ 7340.431761] ? arch_exit_to_user_mode_prepare.isra.0+0xa1/0xc0
[ 7340.432498] ? do_syscall_64+0xbb/0x6b0
[ 7340.433015] ? __handle_mm_fault+0x445/0x690
[ 7340.433582] ? count_memcg_events+0xd6/0x210
[ 7340.434151] ? handle_mm_fault+0x212/0x340
[ 7340.434697] ? do_user_addr_fault+0x2b4/0x7b0
[ 7340.435271] ? clear_bhb_loop+0x30/0x80
[ 7340.435788] ? clear_bhb_loop+0x30/0x80
[ 7340.436299] ? clear_bhb_loop+0x30/0x80
[ 7340.436812] ? clear_bhb_loop+0x30/0x80
[ 7340.437323] entry_SYSCALL_64_after_hwframe+0x76/0x7e
[ 7340.437973] RIP: 0033:0x7f4161b14169
[ 7340.438468] Code: Unable to access opcode bytes at 0x7f4161b1413f.
[ 7340.439242] RSP: 002b:00007ffc6ebfa770 EFLAGS: 00000246 ORIG_RAX: 00000000000000ca
[ 7340.440173] RAX: fffffffffffffe00 RBX: 00000000000005a1 RCX: 00007f4161b14169
[ 7340.441061] RDX: 00000000000005a1 RSI: 0000000000000109 RDI: 00007f415bfff990
[ 7340.441943] RBP: 00007ffc6ebfa7a0 R08: 0000000000000000 R09: 00000000ffffffff
[ 7340.442824] R10: 0000000000000000 R11: 0000000000000246 R12: 0000000000000000
[ 7340.443707] R13: 0000000000000000 R14: 00007f415bfff990 R15: 00007f415bfff6c0
[ 7340.444586] </TASK>
[ 7340.444922] Modules linked in: rfkill intel_rapl_msr intel_rapl_common intel_uncore_frequency_common skx_edac_common nfit libnvdimm kvm_intel vfat fat kvm snd_pcm irqbypass rapl iTCO_wdt snd_timer intel_pmc_bxt iTCO_vendor_support snd ixgbevf virtio_net soundcore i2c_i801 pcspkr libeth_xdp net_failover i2c_smbus lpc_ich failover libeth virtio_balloon joydev 9p fuse loop zram lz4hc_compress lz4_compress 9pnet_virtio 9pnet netfs ghash_clmulni_intel serio_raw qemu_fw_cfg
[ 7340.449650] ---[ end trace 0000000000000000 ]---
The issue can be fixed in all in-tree drivers, but we cannot just trust OOT
drivers to not do this. Therefore, make tailroom a signed int and produce a
warning when it is negative to prevent such mistakes in the future.
Fixes: bf25146a5595 ("bpf: add frags support to the bpf_xdp_adjust_tail() API")
Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>
Reviewed-by: Toke Høiland-Jørgensen <toke@redhat.com>
Acked-by: Martin KaFai Lau <martin.lau@kernel.org>
Signed-off-by: Larysa Zaremba <larysa.zaremba@intel.com>
---
net/core/filter.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/net/core/filter.c b/net/core/filter.c
index 5f5489665c58..e93d9dc0471a 100644
--- a/net/core/filter.c
+++ b/net/core/filter.c
@@ -4151,13 +4151,14 @@ static int bpf_xdp_frags_increase_tail(struct xdp_buff *xdp, int offset)
struct skb_shared_info *sinfo = xdp_get_shared_info_from_buff(xdp);
skb_frag_t *frag = &sinfo->frags[sinfo->nr_frags - 1];
struct xdp_rxq_info *rxq = xdp->rxq;
- unsigned int tailroom;
+ int tailroom;
if (!rxq->frag_size || rxq->frag_size > xdp->frame_sz)
return -EOPNOTSUPP;
tailroom = rxq->frag_size - skb_frag_size(frag) -
skb_frag_off(frag) % rxq->frag_size;
+ WARN_ON_ONCE(tailroom < 0);
if (unlikely(offset > tailroom))
return -EINVAL;
--
2.52.0 | {
"author": "Larysa Zaremba <larysa.zaremba@intel.com>",
"date": "Tue, 17 Feb 2026 14:24:47 +0100",
"is_openbsd": false,
"thread_id": "aaG4z7ZIARBAzueO@boxer.mbox.gz"
} |
lkml_critique | lkml | Aside from the issue described below, tailroom calculation does not account
for pages being split between frags, e.g. in i40e, enetc and
AF_XDP ZC with smaller chunks. These series address the problem by
calculating modulo (skb_frag_off() % rxq->frag_size) in order to get
data offset within a smaller block of memory. Please note, xskxceiver
tail grow test passes without modulo e.g. in xdpdrv mode on i40e,
because there is not enough descriptors to get to flipped buffers.
Many ethernet drivers report xdp Rx queue frag size as being the same as
DMA write size. However, the only user of this field, namely
bpf_xdp_frags_increase_tail(), clearly expects a truesize.
Such difference leads to unspecific memory corruption issues under certain
circumstances, e.g. in ixgbevf maximum DMA write size is 3 KB, so when
running xskxceiver's XDP_ADJUST_TAIL_GROW_MULTI_BUFF, 6K packet fully uses
all DMA-writable space in 2 buffers. This would be fine, if only
rxq->frag_size was properly set to 4K, but value of 3K results in a
negative tailroom, because there is a non-zero page offset.
We are supposed to return -EINVAL and be done with it in such case,
but due to tailroom being stored as an unsigned int, it is reported to be
somewhere near UINT_MAX, resulting in a tail being grown, even if the
requested offset is too much(it is around 2K in the abovementioned test).
This later leads to all kinds of unspecific calltraces.
[ 7340.337579] xskxceiver[1440]: segfault at 1da718 ip 00007f4161aeac9d sp 00007f41615a6a00 error 6
[ 7340.338040] xskxceiver[1441]: segfault at 7f410000000b ip 00000000004042b5 sp 00007f415bffecf0 error 4
[ 7340.338179] in libc.so.6[61c9d,7f4161aaf000+160000]
[ 7340.339230] in xskxceiver[42b5,400000+69000]
[ 7340.340300] likely on CPU 6 (core 0, socket 6)
[ 7340.340302] Code: ff ff 01 e9 f4 fe ff ff 0f 1f 44 00 00 4c 39 f0 74 73 31 c0 ba 01 00 00 00 f0 0f b1 17 0f 85 ba 00 00 00 49 8b 87 88 00 00 00 <4c> 89 70 08 eb cc 0f 1f 44 00 00 48 8d bd f0 fe ff ff 89 85 ec fe
[ 7340.340888] likely on CPU 3 (core 0, socket 3)
[ 7340.345088] Code: 00 00 00 ba 00 00 00 00 be 00 00 00 00 89 c7 e8 31 ca ff ff 89 45 ec 8b 45 ec 85 c0 78 07 b8 00 00 00 00 eb 46 e8 0b c8 ff ff <8b> 00 83 f8 69 74 24 e8 ff c7 ff ff 8b 00 83 f8 0b 74 18 e8 f3 c7
[ 7340.404334] Oops: general protection fault, probably for non-canonical address 0x6d255010bdffc: 0000 [#1] SMP NOPTI
[ 7340.405972] CPU: 7 UID: 0 PID: 1439 Comm: xskxceiver Not tainted 6.19.0-rc1+ #21 PREEMPT(lazy)
[ 7340.408006] Hardware name: QEMU Standard PC (Q35 + ICH9, 2009), BIOS 1.17.0-5.fc42 04/01/2014
[ 7340.409716] RIP: 0010:lookup_swap_cgroup_id+0x44/0x80
[ 7340.410455] Code: 83 f8 1c 73 39 48 ba ff ff ff ff ff ff ff 03 48 8b 04 c5 20 55 fa bd 48 21 d1 48 89 ca 83 e1 01 48 d1 ea c1 e1 04 48 8d 04 90 <8b> 00 48 83 c4 10 d3 e8 c3 cc cc cc cc 31 c0 e9 98 b7 dd 00 48 89
[ 7340.412787] RSP: 0018:ffffcc5c04f7f6d0 EFLAGS: 00010202
[ 7340.413494] RAX: 0006d255010bdffc RBX: ffff891f477895a8 RCX: 0000000000000010
[ 7340.414431] RDX: 0001c17e3fffffff RSI: 00fa070000000000 RDI: 000382fc7fffffff
[ 7340.415354] RBP: 00fa070000000000 R08: ffffcc5c04f7f8f8 R09: ffffcc5c04f7f7d0
[ 7340.416283] R10: ffff891f4c1a7000 R11: ffffcc5c04f7f9c8 R12: ffffcc5c04f7f7d0
[ 7340.417218] R13: 03ffffffffffffff R14: 00fa06fffffffe00 R15: ffff891f47789500
[ 7340.418229] FS: 0000000000000000(0000) GS:ffff891ffdfaa000(0000) knlGS:0000000000000000
[ 7340.419489] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[ 7340.420286] CR2: 00007f415bfffd58 CR3: 0000000103f03002 CR4: 0000000000772ef0
[ 7340.421237] PKRU: 55555554
[ 7340.421623] Call Trace:
[ 7340.421987] <TASK>
[ 7340.422309] ? softleaf_from_pte+0x77/0xa0
[ 7340.422855] swap_pte_batch+0xa7/0x290
[ 7340.423363] zap_nonpresent_ptes.constprop.0.isra.0+0xd1/0x270
[ 7340.424102] zap_pte_range+0x281/0x580
[ 7340.424607] zap_pmd_range.isra.0+0xc9/0x240
[ 7340.425177] unmap_page_range+0x24d/0x420
[ 7340.425714] unmap_vmas+0xa1/0x180
[ 7340.426185] exit_mmap+0xe1/0x3b0
[ 7340.426644] __mmput+0x41/0x150
[ 7340.427098] exit_mm+0xb1/0x110
[ 7340.427539] do_exit+0x1b2/0x460
[ 7340.427992] do_group_exit+0x2d/0xc0
[ 7340.428477] get_signal+0x79d/0x7e0
[ 7340.428957] arch_do_signal_or_restart+0x34/0x100
[ 7340.429571] exit_to_user_mode_loop+0x8e/0x4c0
[ 7340.430159] do_syscall_64+0x188/0x6b0
[ 7340.430672] ? __do_sys_clone3+0xd9/0x120
[ 7340.431212] ? switch_fpu_return+0x4e/0xd0
[ 7340.431761] ? arch_exit_to_user_mode_prepare.isra.0+0xa1/0xc0
[ 7340.432498] ? do_syscall_64+0xbb/0x6b0
[ 7340.433015] ? __handle_mm_fault+0x445/0x690
[ 7340.433582] ? count_memcg_events+0xd6/0x210
[ 7340.434151] ? handle_mm_fault+0x212/0x340
[ 7340.434697] ? do_user_addr_fault+0x2b4/0x7b0
[ 7340.435271] ? clear_bhb_loop+0x30/0x80
[ 7340.435788] ? clear_bhb_loop+0x30/0x80
[ 7340.436299] ? clear_bhb_loop+0x30/0x80
[ 7340.436812] ? clear_bhb_loop+0x30/0x80
[ 7340.437323] entry_SYSCALL_64_after_hwframe+0x76/0x7e
[ 7340.437973] RIP: 0033:0x7f4161b14169
[ 7340.438468] Code: Unable to access opcode bytes at 0x7f4161b1413f.
[ 7340.439242] RSP: 002b:00007ffc6ebfa770 EFLAGS: 00000246 ORIG_RAX: 00000000000000ca
[ 7340.440173] RAX: fffffffffffffe00 RBX: 00000000000005a1 RCX: 00007f4161b14169
[ 7340.441061] RDX: 00000000000005a1 RSI: 0000000000000109 RDI: 00007f415bfff990
[ 7340.441943] RBP: 00007ffc6ebfa7a0 R08: 0000000000000000 R09: 00000000ffffffff
[ 7340.442824] R10: 0000000000000000 R11: 0000000000000246 R12: 0000000000000000
[ 7340.443707] R13: 0000000000000000 R14: 00007f415bfff990 R15: 00007f415bfff6c0
[ 7340.444586] </TASK>
[ 7340.444922] Modules linked in: rfkill intel_rapl_msr intel_rapl_common intel_uncore_frequency_common skx_edac_common nfit libnvdimm kvm_intel vfat fat kvm snd_pcm irqbypass rapl iTCO_wdt snd_timer intel_pmc_bxt iTCO_vendor_support snd ixgbevf virtio_net soundcore i2c_i801 pcspkr libeth_xdp net_failover i2c_smbus lpc_ich failover libeth virtio_balloon joydev 9p fuse loop zram lz4hc_compress lz4_compress 9pnet_virtio 9pnet netfs ghash_clmulni_intel serio_raw qemu_fw_cfg
[ 7340.449650] ---[ end trace 0000000000000000 ]---
The issue can be fixed in all in-tree drivers, but we cannot just trust OOT
drivers to not do this. Therefore, make tailroom a signed int and produce a
warning when it is negative to prevent such mistakes in the future.
The issue can also be easily reproduced with ice driver, by applying
the following diff to xskxceiver and enjoying a kernel panic in xdpdrv mode:
diff --git a/tools/testing/selftests/bpf/prog_tests/test_xsk.c b/tools/testing/selftests/bpf/prog_tests/test_xsk.c
index 5af28f359cfd..042d587fa7ef 100644
--- a/tools/testing/selftests/bpf/prog_tests/test_xsk.c
+++ b/tools/testing/selftests/bpf/prog_tests/test_xsk.c
@@ -2541,8 +2541,8 @@ int testapp_adjust_tail_grow_mb(struct test_spec *test)
{
test->mtu = MAX_ETH_JUMBO_SIZE;
/* Grow by (frag_size - last_frag_Size) - 1 to stay inside the last fragment */
- return testapp_adjust_tail(test, (XSK_UMEM__MAX_FRAME_SIZE / 2) - 1,
- XSK_UMEM__LARGE_FRAME_SIZE * 2);
+ return testapp_adjust_tail(test, XSK_UMEM__MAX_FRAME_SIZE * 100,
+ 6912);
}
int testapp_tx_queue_consumer(struct test_spec *test)
If we print out the values involved in the tailroom calculation:
tailroom = rxq->frag_size - skb_frag_size(frag) - skb_frag_off(frag);
4294967040 = 3456 - 3456 - 256
I personally reproduced and verified the issue in ice and i40e,
aside from WiP ixgbevf implementation.
v3->v2:
* unregister XDP RxQ info for subfunction in ice
* remove rx_buf_len variable in ice
* add missing ifdefed empty definition xsk_pool_get_rx_frag_step()
* move xsk_pool_get_rx_frag_step() call from idpf to libeth
* simplify conditions when determining frag_size in idpf
* correctly init xdp_frame_sz for non-main VSI in i40e
v1->v2:
* add modulo to calculate offset within chunk
* add helper for AF_XDP ZC queues
* fix the problem in ZC mode in i40e, ice and idpf
* verify solution in i40e
* fix RxQ info registering in i40e
* fix splitq handling in idpf
* do not use word truesize unless the value used is named trusize
Larysa Zaremba (9):
xdp: use modulo operation to calculate XDP frag tailroom
xsk: introduce helper to determine rxq->frag_size
ice: fix rxq info registering in mbuf packets
ice: change XDP RxQ frag_size from DMA write length to xdp.frame_sz
i40e: fix registering XDP RxQ info
i40e: use xdp.frame_sz as XDP RxQ info frag_size
libeth, idpf: use truesize as XDP RxQ info frag_size
net: enetc: use truesize as XDP RxQ info frag_size
xdp: produce a warning when calculated tailroom is negative
drivers/net/ethernet/freescale/enetc/enetc.c | 2 +-
drivers/net/ethernet/intel/i40e/i40e_main.c | 40 +++++++++++---------
drivers/net/ethernet/intel/i40e/i40e_txrx.c | 5 ++-
drivers/net/ethernet/intel/ice/ice_base.c | 33 +++++-----------
drivers/net/ethernet/intel/ice/ice_txrx.c | 3 +-
drivers/net/ethernet/intel/ice/ice_xsk.c | 3 ++
drivers/net/ethernet/intel/idpf/xdp.c | 6 ++-
drivers/net/ethernet/intel/idpf/xsk.c | 1 +
drivers/net/ethernet/intel/libeth/xsk.c | 1 +
include/net/libeth/xsk.h | 3 ++
include/net/xdp_sock_drv.h | 10 +++++
net/core/filter.c | 6 ++-
12 files changed, 66 insertions(+), 47 deletions(-)
--
2.52.0
| null | null | null | [PATCH bpf v3 0/9] Address XDP frags having negative tailroom | "growing" -> " growing" ?
Otherwise fine
Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com> | {
"author": "\"Loktionov, Aleksandr\" <aleksandr.loktionov@intel.com>",
"date": "Tue, 17 Feb 2026 15:06:13 +0000",
"is_openbsd": false,
"thread_id": "aaG4z7ZIARBAzueO@boxer.mbox.gz"
} |
lkml_critique | lkml | Aside from the issue described below, tailroom calculation does not account
for pages being split between frags, e.g. in i40e, enetc and
AF_XDP ZC with smaller chunks. These series address the problem by
calculating modulo (skb_frag_off() % rxq->frag_size) in order to get
data offset within a smaller block of memory. Please note, xskxceiver
tail grow test passes without modulo e.g. in xdpdrv mode on i40e,
because there is not enough descriptors to get to flipped buffers.
Many ethernet drivers report xdp Rx queue frag size as being the same as
DMA write size. However, the only user of this field, namely
bpf_xdp_frags_increase_tail(), clearly expects a truesize.
Such difference leads to unspecific memory corruption issues under certain
circumstances, e.g. in ixgbevf maximum DMA write size is 3 KB, so when
running xskxceiver's XDP_ADJUST_TAIL_GROW_MULTI_BUFF, 6K packet fully uses
all DMA-writable space in 2 buffers. This would be fine, if only
rxq->frag_size was properly set to 4K, but value of 3K results in a
negative tailroom, because there is a non-zero page offset.
We are supposed to return -EINVAL and be done with it in such case,
but due to tailroom being stored as an unsigned int, it is reported to be
somewhere near UINT_MAX, resulting in a tail being grown, even if the
requested offset is too much(it is around 2K in the abovementioned test).
This later leads to all kinds of unspecific calltraces.
[ 7340.337579] xskxceiver[1440]: segfault at 1da718 ip 00007f4161aeac9d sp 00007f41615a6a00 error 6
[ 7340.338040] xskxceiver[1441]: segfault at 7f410000000b ip 00000000004042b5 sp 00007f415bffecf0 error 4
[ 7340.338179] in libc.so.6[61c9d,7f4161aaf000+160000]
[ 7340.339230] in xskxceiver[42b5,400000+69000]
[ 7340.340300] likely on CPU 6 (core 0, socket 6)
[ 7340.340302] Code: ff ff 01 e9 f4 fe ff ff 0f 1f 44 00 00 4c 39 f0 74 73 31 c0 ba 01 00 00 00 f0 0f b1 17 0f 85 ba 00 00 00 49 8b 87 88 00 00 00 <4c> 89 70 08 eb cc 0f 1f 44 00 00 48 8d bd f0 fe ff ff 89 85 ec fe
[ 7340.340888] likely on CPU 3 (core 0, socket 3)
[ 7340.345088] Code: 00 00 00 ba 00 00 00 00 be 00 00 00 00 89 c7 e8 31 ca ff ff 89 45 ec 8b 45 ec 85 c0 78 07 b8 00 00 00 00 eb 46 e8 0b c8 ff ff <8b> 00 83 f8 69 74 24 e8 ff c7 ff ff 8b 00 83 f8 0b 74 18 e8 f3 c7
[ 7340.404334] Oops: general protection fault, probably for non-canonical address 0x6d255010bdffc: 0000 [#1] SMP NOPTI
[ 7340.405972] CPU: 7 UID: 0 PID: 1439 Comm: xskxceiver Not tainted 6.19.0-rc1+ #21 PREEMPT(lazy)
[ 7340.408006] Hardware name: QEMU Standard PC (Q35 + ICH9, 2009), BIOS 1.17.0-5.fc42 04/01/2014
[ 7340.409716] RIP: 0010:lookup_swap_cgroup_id+0x44/0x80
[ 7340.410455] Code: 83 f8 1c 73 39 48 ba ff ff ff ff ff ff ff 03 48 8b 04 c5 20 55 fa bd 48 21 d1 48 89 ca 83 e1 01 48 d1 ea c1 e1 04 48 8d 04 90 <8b> 00 48 83 c4 10 d3 e8 c3 cc cc cc cc 31 c0 e9 98 b7 dd 00 48 89
[ 7340.412787] RSP: 0018:ffffcc5c04f7f6d0 EFLAGS: 00010202
[ 7340.413494] RAX: 0006d255010bdffc RBX: ffff891f477895a8 RCX: 0000000000000010
[ 7340.414431] RDX: 0001c17e3fffffff RSI: 00fa070000000000 RDI: 000382fc7fffffff
[ 7340.415354] RBP: 00fa070000000000 R08: ffffcc5c04f7f8f8 R09: ffffcc5c04f7f7d0
[ 7340.416283] R10: ffff891f4c1a7000 R11: ffffcc5c04f7f9c8 R12: ffffcc5c04f7f7d0
[ 7340.417218] R13: 03ffffffffffffff R14: 00fa06fffffffe00 R15: ffff891f47789500
[ 7340.418229] FS: 0000000000000000(0000) GS:ffff891ffdfaa000(0000) knlGS:0000000000000000
[ 7340.419489] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[ 7340.420286] CR2: 00007f415bfffd58 CR3: 0000000103f03002 CR4: 0000000000772ef0
[ 7340.421237] PKRU: 55555554
[ 7340.421623] Call Trace:
[ 7340.421987] <TASK>
[ 7340.422309] ? softleaf_from_pte+0x77/0xa0
[ 7340.422855] swap_pte_batch+0xa7/0x290
[ 7340.423363] zap_nonpresent_ptes.constprop.0.isra.0+0xd1/0x270
[ 7340.424102] zap_pte_range+0x281/0x580
[ 7340.424607] zap_pmd_range.isra.0+0xc9/0x240
[ 7340.425177] unmap_page_range+0x24d/0x420
[ 7340.425714] unmap_vmas+0xa1/0x180
[ 7340.426185] exit_mmap+0xe1/0x3b0
[ 7340.426644] __mmput+0x41/0x150
[ 7340.427098] exit_mm+0xb1/0x110
[ 7340.427539] do_exit+0x1b2/0x460
[ 7340.427992] do_group_exit+0x2d/0xc0
[ 7340.428477] get_signal+0x79d/0x7e0
[ 7340.428957] arch_do_signal_or_restart+0x34/0x100
[ 7340.429571] exit_to_user_mode_loop+0x8e/0x4c0
[ 7340.430159] do_syscall_64+0x188/0x6b0
[ 7340.430672] ? __do_sys_clone3+0xd9/0x120
[ 7340.431212] ? switch_fpu_return+0x4e/0xd0
[ 7340.431761] ? arch_exit_to_user_mode_prepare.isra.0+0xa1/0xc0
[ 7340.432498] ? do_syscall_64+0xbb/0x6b0
[ 7340.433015] ? __handle_mm_fault+0x445/0x690
[ 7340.433582] ? count_memcg_events+0xd6/0x210
[ 7340.434151] ? handle_mm_fault+0x212/0x340
[ 7340.434697] ? do_user_addr_fault+0x2b4/0x7b0
[ 7340.435271] ? clear_bhb_loop+0x30/0x80
[ 7340.435788] ? clear_bhb_loop+0x30/0x80
[ 7340.436299] ? clear_bhb_loop+0x30/0x80
[ 7340.436812] ? clear_bhb_loop+0x30/0x80
[ 7340.437323] entry_SYSCALL_64_after_hwframe+0x76/0x7e
[ 7340.437973] RIP: 0033:0x7f4161b14169
[ 7340.438468] Code: Unable to access opcode bytes at 0x7f4161b1413f.
[ 7340.439242] RSP: 002b:00007ffc6ebfa770 EFLAGS: 00000246 ORIG_RAX: 00000000000000ca
[ 7340.440173] RAX: fffffffffffffe00 RBX: 00000000000005a1 RCX: 00007f4161b14169
[ 7340.441061] RDX: 00000000000005a1 RSI: 0000000000000109 RDI: 00007f415bfff990
[ 7340.441943] RBP: 00007ffc6ebfa7a0 R08: 0000000000000000 R09: 00000000ffffffff
[ 7340.442824] R10: 0000000000000000 R11: 0000000000000246 R12: 0000000000000000
[ 7340.443707] R13: 0000000000000000 R14: 00007f415bfff990 R15: 00007f415bfff6c0
[ 7340.444586] </TASK>
[ 7340.444922] Modules linked in: rfkill intel_rapl_msr intel_rapl_common intel_uncore_frequency_common skx_edac_common nfit libnvdimm kvm_intel vfat fat kvm snd_pcm irqbypass rapl iTCO_wdt snd_timer intel_pmc_bxt iTCO_vendor_support snd ixgbevf virtio_net soundcore i2c_i801 pcspkr libeth_xdp net_failover i2c_smbus lpc_ich failover libeth virtio_balloon joydev 9p fuse loop zram lz4hc_compress lz4_compress 9pnet_virtio 9pnet netfs ghash_clmulni_intel serio_raw qemu_fw_cfg
[ 7340.449650] ---[ end trace 0000000000000000 ]---
The issue can be fixed in all in-tree drivers, but we cannot just trust OOT
drivers to not do this. Therefore, make tailroom a signed int and produce a
warning when it is negative to prevent such mistakes in the future.
The issue can also be easily reproduced with ice driver, by applying
the following diff to xskxceiver and enjoying a kernel panic in xdpdrv mode:
diff --git a/tools/testing/selftests/bpf/prog_tests/test_xsk.c b/tools/testing/selftests/bpf/prog_tests/test_xsk.c
index 5af28f359cfd..042d587fa7ef 100644
--- a/tools/testing/selftests/bpf/prog_tests/test_xsk.c
+++ b/tools/testing/selftests/bpf/prog_tests/test_xsk.c
@@ -2541,8 +2541,8 @@ int testapp_adjust_tail_grow_mb(struct test_spec *test)
{
test->mtu = MAX_ETH_JUMBO_SIZE;
/* Grow by (frag_size - last_frag_Size) - 1 to stay inside the last fragment */
- return testapp_adjust_tail(test, (XSK_UMEM__MAX_FRAME_SIZE / 2) - 1,
- XSK_UMEM__LARGE_FRAME_SIZE * 2);
+ return testapp_adjust_tail(test, XSK_UMEM__MAX_FRAME_SIZE * 100,
+ 6912);
}
int testapp_tx_queue_consumer(struct test_spec *test)
If we print out the values involved in the tailroom calculation:
tailroom = rxq->frag_size - skb_frag_size(frag) - skb_frag_off(frag);
4294967040 = 3456 - 3456 - 256
I personally reproduced and verified the issue in ice and i40e,
aside from WiP ixgbevf implementation.
v3->v2:
* unregister XDP RxQ info for subfunction in ice
* remove rx_buf_len variable in ice
* add missing ifdefed empty definition xsk_pool_get_rx_frag_step()
* move xsk_pool_get_rx_frag_step() call from idpf to libeth
* simplify conditions when determining frag_size in idpf
* correctly init xdp_frame_sz for non-main VSI in i40e
v1->v2:
* add modulo to calculate offset within chunk
* add helper for AF_XDP ZC queues
* fix the problem in ZC mode in i40e, ice and idpf
* verify solution in i40e
* fix RxQ info registering in i40e
* fix splitq handling in idpf
* do not use word truesize unless the value used is named trusize
Larysa Zaremba (9):
xdp: use modulo operation to calculate XDP frag tailroom
xsk: introduce helper to determine rxq->frag_size
ice: fix rxq info registering in mbuf packets
ice: change XDP RxQ frag_size from DMA write length to xdp.frame_sz
i40e: fix registering XDP RxQ info
i40e: use xdp.frame_sz as XDP RxQ info frag_size
libeth, idpf: use truesize as XDP RxQ info frag_size
net: enetc: use truesize as XDP RxQ info frag_size
xdp: produce a warning when calculated tailroom is negative
drivers/net/ethernet/freescale/enetc/enetc.c | 2 +-
drivers/net/ethernet/intel/i40e/i40e_main.c | 40 +++++++++++---------
drivers/net/ethernet/intel/i40e/i40e_txrx.c | 5 ++-
drivers/net/ethernet/intel/ice/ice_base.c | 33 +++++-----------
drivers/net/ethernet/intel/ice/ice_txrx.c | 3 +-
drivers/net/ethernet/intel/ice/ice_xsk.c | 3 ++
drivers/net/ethernet/intel/idpf/xdp.c | 6 ++-
drivers/net/ethernet/intel/idpf/xsk.c | 1 +
drivers/net/ethernet/intel/libeth/xsk.c | 1 +
include/net/libeth/xsk.h | 3 ++
include/net/xdp_sock_drv.h | 10 +++++
net/core/filter.c | 6 ++-
12 files changed, 66 insertions(+), 47 deletions(-)
--
2.52.0
| null | null | null | [PATCH bpf v3 0/9] Address XDP frags having negative tailroom | From: Zaremba, Larysa <larysa.zaremba@intel.com>
Date: Tue, 17 Feb 2026 14:24:45 +0100
Acked-by: Alexander Lobakin <aleksander.lobakin@intel.com>
Thanks for handling this!
Olek | {
"author": "Alexander Lobakin <aleksander.lobakin@intel.com>",
"date": "Tue, 17 Feb 2026 17:19:07 +0100",
"is_openbsd": false,
"thread_id": "aaG4z7ZIARBAzueO@boxer.mbox.gz"
} |
lkml_critique | lkml | Aside from the issue described below, tailroom calculation does not account
for pages being split between frags, e.g. in i40e, enetc and
AF_XDP ZC with smaller chunks. These series address the problem by
calculating modulo (skb_frag_off() % rxq->frag_size) in order to get
data offset within a smaller block of memory. Please note, xskxceiver
tail grow test passes without modulo e.g. in xdpdrv mode on i40e,
because there is not enough descriptors to get to flipped buffers.
Many ethernet drivers report xdp Rx queue frag size as being the same as
DMA write size. However, the only user of this field, namely
bpf_xdp_frags_increase_tail(), clearly expects a truesize.
Such difference leads to unspecific memory corruption issues under certain
circumstances, e.g. in ixgbevf maximum DMA write size is 3 KB, so when
running xskxceiver's XDP_ADJUST_TAIL_GROW_MULTI_BUFF, 6K packet fully uses
all DMA-writable space in 2 buffers. This would be fine, if only
rxq->frag_size was properly set to 4K, but value of 3K results in a
negative tailroom, because there is a non-zero page offset.
We are supposed to return -EINVAL and be done with it in such case,
but due to tailroom being stored as an unsigned int, it is reported to be
somewhere near UINT_MAX, resulting in a tail being grown, even if the
requested offset is too much(it is around 2K in the abovementioned test).
This later leads to all kinds of unspecific calltraces.
[ 7340.337579] xskxceiver[1440]: segfault at 1da718 ip 00007f4161aeac9d sp 00007f41615a6a00 error 6
[ 7340.338040] xskxceiver[1441]: segfault at 7f410000000b ip 00000000004042b5 sp 00007f415bffecf0 error 4
[ 7340.338179] in libc.so.6[61c9d,7f4161aaf000+160000]
[ 7340.339230] in xskxceiver[42b5,400000+69000]
[ 7340.340300] likely on CPU 6 (core 0, socket 6)
[ 7340.340302] Code: ff ff 01 e9 f4 fe ff ff 0f 1f 44 00 00 4c 39 f0 74 73 31 c0 ba 01 00 00 00 f0 0f b1 17 0f 85 ba 00 00 00 49 8b 87 88 00 00 00 <4c> 89 70 08 eb cc 0f 1f 44 00 00 48 8d bd f0 fe ff ff 89 85 ec fe
[ 7340.340888] likely on CPU 3 (core 0, socket 3)
[ 7340.345088] Code: 00 00 00 ba 00 00 00 00 be 00 00 00 00 89 c7 e8 31 ca ff ff 89 45 ec 8b 45 ec 85 c0 78 07 b8 00 00 00 00 eb 46 e8 0b c8 ff ff <8b> 00 83 f8 69 74 24 e8 ff c7 ff ff 8b 00 83 f8 0b 74 18 e8 f3 c7
[ 7340.404334] Oops: general protection fault, probably for non-canonical address 0x6d255010bdffc: 0000 [#1] SMP NOPTI
[ 7340.405972] CPU: 7 UID: 0 PID: 1439 Comm: xskxceiver Not tainted 6.19.0-rc1+ #21 PREEMPT(lazy)
[ 7340.408006] Hardware name: QEMU Standard PC (Q35 + ICH9, 2009), BIOS 1.17.0-5.fc42 04/01/2014
[ 7340.409716] RIP: 0010:lookup_swap_cgroup_id+0x44/0x80
[ 7340.410455] Code: 83 f8 1c 73 39 48 ba ff ff ff ff ff ff ff 03 48 8b 04 c5 20 55 fa bd 48 21 d1 48 89 ca 83 e1 01 48 d1 ea c1 e1 04 48 8d 04 90 <8b> 00 48 83 c4 10 d3 e8 c3 cc cc cc cc 31 c0 e9 98 b7 dd 00 48 89
[ 7340.412787] RSP: 0018:ffffcc5c04f7f6d0 EFLAGS: 00010202
[ 7340.413494] RAX: 0006d255010bdffc RBX: ffff891f477895a8 RCX: 0000000000000010
[ 7340.414431] RDX: 0001c17e3fffffff RSI: 00fa070000000000 RDI: 000382fc7fffffff
[ 7340.415354] RBP: 00fa070000000000 R08: ffffcc5c04f7f8f8 R09: ffffcc5c04f7f7d0
[ 7340.416283] R10: ffff891f4c1a7000 R11: ffffcc5c04f7f9c8 R12: ffffcc5c04f7f7d0
[ 7340.417218] R13: 03ffffffffffffff R14: 00fa06fffffffe00 R15: ffff891f47789500
[ 7340.418229] FS: 0000000000000000(0000) GS:ffff891ffdfaa000(0000) knlGS:0000000000000000
[ 7340.419489] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[ 7340.420286] CR2: 00007f415bfffd58 CR3: 0000000103f03002 CR4: 0000000000772ef0
[ 7340.421237] PKRU: 55555554
[ 7340.421623] Call Trace:
[ 7340.421987] <TASK>
[ 7340.422309] ? softleaf_from_pte+0x77/0xa0
[ 7340.422855] swap_pte_batch+0xa7/0x290
[ 7340.423363] zap_nonpresent_ptes.constprop.0.isra.0+0xd1/0x270
[ 7340.424102] zap_pte_range+0x281/0x580
[ 7340.424607] zap_pmd_range.isra.0+0xc9/0x240
[ 7340.425177] unmap_page_range+0x24d/0x420
[ 7340.425714] unmap_vmas+0xa1/0x180
[ 7340.426185] exit_mmap+0xe1/0x3b0
[ 7340.426644] __mmput+0x41/0x150
[ 7340.427098] exit_mm+0xb1/0x110
[ 7340.427539] do_exit+0x1b2/0x460
[ 7340.427992] do_group_exit+0x2d/0xc0
[ 7340.428477] get_signal+0x79d/0x7e0
[ 7340.428957] arch_do_signal_or_restart+0x34/0x100
[ 7340.429571] exit_to_user_mode_loop+0x8e/0x4c0
[ 7340.430159] do_syscall_64+0x188/0x6b0
[ 7340.430672] ? __do_sys_clone3+0xd9/0x120
[ 7340.431212] ? switch_fpu_return+0x4e/0xd0
[ 7340.431761] ? arch_exit_to_user_mode_prepare.isra.0+0xa1/0xc0
[ 7340.432498] ? do_syscall_64+0xbb/0x6b0
[ 7340.433015] ? __handle_mm_fault+0x445/0x690
[ 7340.433582] ? count_memcg_events+0xd6/0x210
[ 7340.434151] ? handle_mm_fault+0x212/0x340
[ 7340.434697] ? do_user_addr_fault+0x2b4/0x7b0
[ 7340.435271] ? clear_bhb_loop+0x30/0x80
[ 7340.435788] ? clear_bhb_loop+0x30/0x80
[ 7340.436299] ? clear_bhb_loop+0x30/0x80
[ 7340.436812] ? clear_bhb_loop+0x30/0x80
[ 7340.437323] entry_SYSCALL_64_after_hwframe+0x76/0x7e
[ 7340.437973] RIP: 0033:0x7f4161b14169
[ 7340.438468] Code: Unable to access opcode bytes at 0x7f4161b1413f.
[ 7340.439242] RSP: 002b:00007ffc6ebfa770 EFLAGS: 00000246 ORIG_RAX: 00000000000000ca
[ 7340.440173] RAX: fffffffffffffe00 RBX: 00000000000005a1 RCX: 00007f4161b14169
[ 7340.441061] RDX: 00000000000005a1 RSI: 0000000000000109 RDI: 00007f415bfff990
[ 7340.441943] RBP: 00007ffc6ebfa7a0 R08: 0000000000000000 R09: 00000000ffffffff
[ 7340.442824] R10: 0000000000000000 R11: 0000000000000246 R12: 0000000000000000
[ 7340.443707] R13: 0000000000000000 R14: 00007f415bfff990 R15: 00007f415bfff6c0
[ 7340.444586] </TASK>
[ 7340.444922] Modules linked in: rfkill intel_rapl_msr intel_rapl_common intel_uncore_frequency_common skx_edac_common nfit libnvdimm kvm_intel vfat fat kvm snd_pcm irqbypass rapl iTCO_wdt snd_timer intel_pmc_bxt iTCO_vendor_support snd ixgbevf virtio_net soundcore i2c_i801 pcspkr libeth_xdp net_failover i2c_smbus lpc_ich failover libeth virtio_balloon joydev 9p fuse loop zram lz4hc_compress lz4_compress 9pnet_virtio 9pnet netfs ghash_clmulni_intel serio_raw qemu_fw_cfg
[ 7340.449650] ---[ end trace 0000000000000000 ]---
The issue can be fixed in all in-tree drivers, but we cannot just trust OOT
drivers to not do this. Therefore, make tailroom a signed int and produce a
warning when it is negative to prevent such mistakes in the future.
The issue can also be easily reproduced with ice driver, by applying
the following diff to xskxceiver and enjoying a kernel panic in xdpdrv mode:
diff --git a/tools/testing/selftests/bpf/prog_tests/test_xsk.c b/tools/testing/selftests/bpf/prog_tests/test_xsk.c
index 5af28f359cfd..042d587fa7ef 100644
--- a/tools/testing/selftests/bpf/prog_tests/test_xsk.c
+++ b/tools/testing/selftests/bpf/prog_tests/test_xsk.c
@@ -2541,8 +2541,8 @@ int testapp_adjust_tail_grow_mb(struct test_spec *test)
{
test->mtu = MAX_ETH_JUMBO_SIZE;
/* Grow by (frag_size - last_frag_Size) - 1 to stay inside the last fragment */
- return testapp_adjust_tail(test, (XSK_UMEM__MAX_FRAME_SIZE / 2) - 1,
- XSK_UMEM__LARGE_FRAME_SIZE * 2);
+ return testapp_adjust_tail(test, XSK_UMEM__MAX_FRAME_SIZE * 100,
+ 6912);
}
int testapp_tx_queue_consumer(struct test_spec *test)
If we print out the values involved in the tailroom calculation:
tailroom = rxq->frag_size - skb_frag_size(frag) - skb_frag_off(frag);
4294967040 = 3456 - 3456 - 256
I personally reproduced and verified the issue in ice and i40e,
aside from WiP ixgbevf implementation.
v3->v2:
* unregister XDP RxQ info for subfunction in ice
* remove rx_buf_len variable in ice
* add missing ifdefed empty definition xsk_pool_get_rx_frag_step()
* move xsk_pool_get_rx_frag_step() call from idpf to libeth
* simplify conditions when determining frag_size in idpf
* correctly init xdp_frame_sz for non-main VSI in i40e
v1->v2:
* add modulo to calculate offset within chunk
* add helper for AF_XDP ZC queues
* fix the problem in ZC mode in i40e, ice and idpf
* verify solution in i40e
* fix RxQ info registering in i40e
* fix splitq handling in idpf
* do not use word truesize unless the value used is named trusize
Larysa Zaremba (9):
xdp: use modulo operation to calculate XDP frag tailroom
xsk: introduce helper to determine rxq->frag_size
ice: fix rxq info registering in mbuf packets
ice: change XDP RxQ frag_size from DMA write length to xdp.frame_sz
i40e: fix registering XDP RxQ info
i40e: use xdp.frame_sz as XDP RxQ info frag_size
libeth, idpf: use truesize as XDP RxQ info frag_size
net: enetc: use truesize as XDP RxQ info frag_size
xdp: produce a warning when calculated tailroom is negative
drivers/net/ethernet/freescale/enetc/enetc.c | 2 +-
drivers/net/ethernet/intel/i40e/i40e_main.c | 40 +++++++++++---------
drivers/net/ethernet/intel/i40e/i40e_txrx.c | 5 ++-
drivers/net/ethernet/intel/ice/ice_base.c | 33 +++++-----------
drivers/net/ethernet/intel/ice/ice_txrx.c | 3 +-
drivers/net/ethernet/intel/ice/ice_xsk.c | 3 ++
drivers/net/ethernet/intel/idpf/xdp.c | 6 ++-
drivers/net/ethernet/intel/idpf/xsk.c | 1 +
drivers/net/ethernet/intel/libeth/xsk.c | 1 +
include/net/libeth/xsk.h | 3 ++
include/net/xdp_sock_drv.h | 10 +++++
net/core/filter.c | 6 ++-
12 files changed, 66 insertions(+), 47 deletions(-)
--
2.52.0
| null | null | null | [PATCH bpf v3 0/9] Address XDP frags having negative tailroom | On Tue, Feb 17, 2026 at 02:24:43PM +0100, Larysa Zaremba wrote:
What is 'memory model table' in this context?
I believe you are referring to a case where XDP prog is kept alive on
interface put you close one socket and then bind the other one?
Good catch, i now see that i40e_change_mtu() only does the link flap and
i40e_free_rx_resources() is not called in this path. | {
"author": "Maciej Fijalkowski <maciej.fijalkowski@intel.com>",
"date": "Thu, 19 Feb 2026 13:00:05 +0100",
"is_openbsd": false,
"thread_id": "aaG4z7ZIARBAzueO@boxer.mbox.gz"
} |
lkml_critique | lkml | Aside from the issue described below, tailroom calculation does not account
for pages being split between frags, e.g. in i40e, enetc and
AF_XDP ZC with smaller chunks. These series address the problem by
calculating modulo (skb_frag_off() % rxq->frag_size) in order to get
data offset within a smaller block of memory. Please note, xskxceiver
tail grow test passes without modulo e.g. in xdpdrv mode on i40e,
because there is not enough descriptors to get to flipped buffers.
Many ethernet drivers report xdp Rx queue frag size as being the same as
DMA write size. However, the only user of this field, namely
bpf_xdp_frags_increase_tail(), clearly expects a truesize.
Such difference leads to unspecific memory corruption issues under certain
circumstances, e.g. in ixgbevf maximum DMA write size is 3 KB, so when
running xskxceiver's XDP_ADJUST_TAIL_GROW_MULTI_BUFF, 6K packet fully uses
all DMA-writable space in 2 buffers. This would be fine, if only
rxq->frag_size was properly set to 4K, but value of 3K results in a
negative tailroom, because there is a non-zero page offset.
We are supposed to return -EINVAL and be done with it in such case,
but due to tailroom being stored as an unsigned int, it is reported to be
somewhere near UINT_MAX, resulting in a tail being grown, even if the
requested offset is too much(it is around 2K in the abovementioned test).
This later leads to all kinds of unspecific calltraces.
[ 7340.337579] xskxceiver[1440]: segfault at 1da718 ip 00007f4161aeac9d sp 00007f41615a6a00 error 6
[ 7340.338040] xskxceiver[1441]: segfault at 7f410000000b ip 00000000004042b5 sp 00007f415bffecf0 error 4
[ 7340.338179] in libc.so.6[61c9d,7f4161aaf000+160000]
[ 7340.339230] in xskxceiver[42b5,400000+69000]
[ 7340.340300] likely on CPU 6 (core 0, socket 6)
[ 7340.340302] Code: ff ff 01 e9 f4 fe ff ff 0f 1f 44 00 00 4c 39 f0 74 73 31 c0 ba 01 00 00 00 f0 0f b1 17 0f 85 ba 00 00 00 49 8b 87 88 00 00 00 <4c> 89 70 08 eb cc 0f 1f 44 00 00 48 8d bd f0 fe ff ff 89 85 ec fe
[ 7340.340888] likely on CPU 3 (core 0, socket 3)
[ 7340.345088] Code: 00 00 00 ba 00 00 00 00 be 00 00 00 00 89 c7 e8 31 ca ff ff 89 45 ec 8b 45 ec 85 c0 78 07 b8 00 00 00 00 eb 46 e8 0b c8 ff ff <8b> 00 83 f8 69 74 24 e8 ff c7 ff ff 8b 00 83 f8 0b 74 18 e8 f3 c7
[ 7340.404334] Oops: general protection fault, probably for non-canonical address 0x6d255010bdffc: 0000 [#1] SMP NOPTI
[ 7340.405972] CPU: 7 UID: 0 PID: 1439 Comm: xskxceiver Not tainted 6.19.0-rc1+ #21 PREEMPT(lazy)
[ 7340.408006] Hardware name: QEMU Standard PC (Q35 + ICH9, 2009), BIOS 1.17.0-5.fc42 04/01/2014
[ 7340.409716] RIP: 0010:lookup_swap_cgroup_id+0x44/0x80
[ 7340.410455] Code: 83 f8 1c 73 39 48 ba ff ff ff ff ff ff ff 03 48 8b 04 c5 20 55 fa bd 48 21 d1 48 89 ca 83 e1 01 48 d1 ea c1 e1 04 48 8d 04 90 <8b> 00 48 83 c4 10 d3 e8 c3 cc cc cc cc 31 c0 e9 98 b7 dd 00 48 89
[ 7340.412787] RSP: 0018:ffffcc5c04f7f6d0 EFLAGS: 00010202
[ 7340.413494] RAX: 0006d255010bdffc RBX: ffff891f477895a8 RCX: 0000000000000010
[ 7340.414431] RDX: 0001c17e3fffffff RSI: 00fa070000000000 RDI: 000382fc7fffffff
[ 7340.415354] RBP: 00fa070000000000 R08: ffffcc5c04f7f8f8 R09: ffffcc5c04f7f7d0
[ 7340.416283] R10: ffff891f4c1a7000 R11: ffffcc5c04f7f9c8 R12: ffffcc5c04f7f7d0
[ 7340.417218] R13: 03ffffffffffffff R14: 00fa06fffffffe00 R15: ffff891f47789500
[ 7340.418229] FS: 0000000000000000(0000) GS:ffff891ffdfaa000(0000) knlGS:0000000000000000
[ 7340.419489] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[ 7340.420286] CR2: 00007f415bfffd58 CR3: 0000000103f03002 CR4: 0000000000772ef0
[ 7340.421237] PKRU: 55555554
[ 7340.421623] Call Trace:
[ 7340.421987] <TASK>
[ 7340.422309] ? softleaf_from_pte+0x77/0xa0
[ 7340.422855] swap_pte_batch+0xa7/0x290
[ 7340.423363] zap_nonpresent_ptes.constprop.0.isra.0+0xd1/0x270
[ 7340.424102] zap_pte_range+0x281/0x580
[ 7340.424607] zap_pmd_range.isra.0+0xc9/0x240
[ 7340.425177] unmap_page_range+0x24d/0x420
[ 7340.425714] unmap_vmas+0xa1/0x180
[ 7340.426185] exit_mmap+0xe1/0x3b0
[ 7340.426644] __mmput+0x41/0x150
[ 7340.427098] exit_mm+0xb1/0x110
[ 7340.427539] do_exit+0x1b2/0x460
[ 7340.427992] do_group_exit+0x2d/0xc0
[ 7340.428477] get_signal+0x79d/0x7e0
[ 7340.428957] arch_do_signal_or_restart+0x34/0x100
[ 7340.429571] exit_to_user_mode_loop+0x8e/0x4c0
[ 7340.430159] do_syscall_64+0x188/0x6b0
[ 7340.430672] ? __do_sys_clone3+0xd9/0x120
[ 7340.431212] ? switch_fpu_return+0x4e/0xd0
[ 7340.431761] ? arch_exit_to_user_mode_prepare.isra.0+0xa1/0xc0
[ 7340.432498] ? do_syscall_64+0xbb/0x6b0
[ 7340.433015] ? __handle_mm_fault+0x445/0x690
[ 7340.433582] ? count_memcg_events+0xd6/0x210
[ 7340.434151] ? handle_mm_fault+0x212/0x340
[ 7340.434697] ? do_user_addr_fault+0x2b4/0x7b0
[ 7340.435271] ? clear_bhb_loop+0x30/0x80
[ 7340.435788] ? clear_bhb_loop+0x30/0x80
[ 7340.436299] ? clear_bhb_loop+0x30/0x80
[ 7340.436812] ? clear_bhb_loop+0x30/0x80
[ 7340.437323] entry_SYSCALL_64_after_hwframe+0x76/0x7e
[ 7340.437973] RIP: 0033:0x7f4161b14169
[ 7340.438468] Code: Unable to access opcode bytes at 0x7f4161b1413f.
[ 7340.439242] RSP: 002b:00007ffc6ebfa770 EFLAGS: 00000246 ORIG_RAX: 00000000000000ca
[ 7340.440173] RAX: fffffffffffffe00 RBX: 00000000000005a1 RCX: 00007f4161b14169
[ 7340.441061] RDX: 00000000000005a1 RSI: 0000000000000109 RDI: 00007f415bfff990
[ 7340.441943] RBP: 00007ffc6ebfa7a0 R08: 0000000000000000 R09: 00000000ffffffff
[ 7340.442824] R10: 0000000000000000 R11: 0000000000000246 R12: 0000000000000000
[ 7340.443707] R13: 0000000000000000 R14: 00007f415bfff990 R15: 00007f415bfff6c0
[ 7340.444586] </TASK>
[ 7340.444922] Modules linked in: rfkill intel_rapl_msr intel_rapl_common intel_uncore_frequency_common skx_edac_common nfit libnvdimm kvm_intel vfat fat kvm snd_pcm irqbypass rapl iTCO_wdt snd_timer intel_pmc_bxt iTCO_vendor_support snd ixgbevf virtio_net soundcore i2c_i801 pcspkr libeth_xdp net_failover i2c_smbus lpc_ich failover libeth virtio_balloon joydev 9p fuse loop zram lz4hc_compress lz4_compress 9pnet_virtio 9pnet netfs ghash_clmulni_intel serio_raw qemu_fw_cfg
[ 7340.449650] ---[ end trace 0000000000000000 ]---
The issue can be fixed in all in-tree drivers, but we cannot just trust OOT
drivers to not do this. Therefore, make tailroom a signed int and produce a
warning when it is negative to prevent such mistakes in the future.
The issue can also be easily reproduced with ice driver, by applying
the following diff to xskxceiver and enjoying a kernel panic in xdpdrv mode:
diff --git a/tools/testing/selftests/bpf/prog_tests/test_xsk.c b/tools/testing/selftests/bpf/prog_tests/test_xsk.c
index 5af28f359cfd..042d587fa7ef 100644
--- a/tools/testing/selftests/bpf/prog_tests/test_xsk.c
+++ b/tools/testing/selftests/bpf/prog_tests/test_xsk.c
@@ -2541,8 +2541,8 @@ int testapp_adjust_tail_grow_mb(struct test_spec *test)
{
test->mtu = MAX_ETH_JUMBO_SIZE;
/* Grow by (frag_size - last_frag_Size) - 1 to stay inside the last fragment */
- return testapp_adjust_tail(test, (XSK_UMEM__MAX_FRAME_SIZE / 2) - 1,
- XSK_UMEM__LARGE_FRAME_SIZE * 2);
+ return testapp_adjust_tail(test, XSK_UMEM__MAX_FRAME_SIZE * 100,
+ 6912);
}
int testapp_tx_queue_consumer(struct test_spec *test)
If we print out the values involved in the tailroom calculation:
tailroom = rxq->frag_size - skb_frag_size(frag) - skb_frag_off(frag);
4294967040 = 3456 - 3456 - 256
I personally reproduced and verified the issue in ice and i40e,
aside from WiP ixgbevf implementation.
v3->v2:
* unregister XDP RxQ info for subfunction in ice
* remove rx_buf_len variable in ice
* add missing ifdefed empty definition xsk_pool_get_rx_frag_step()
* move xsk_pool_get_rx_frag_step() call from idpf to libeth
* simplify conditions when determining frag_size in idpf
* correctly init xdp_frame_sz for non-main VSI in i40e
v1->v2:
* add modulo to calculate offset within chunk
* add helper for AF_XDP ZC queues
* fix the problem in ZC mode in i40e, ice and idpf
* verify solution in i40e
* fix RxQ info registering in i40e
* fix splitq handling in idpf
* do not use word truesize unless the value used is named trusize
Larysa Zaremba (9):
xdp: use modulo operation to calculate XDP frag tailroom
xsk: introduce helper to determine rxq->frag_size
ice: fix rxq info registering in mbuf packets
ice: change XDP RxQ frag_size from DMA write length to xdp.frame_sz
i40e: fix registering XDP RxQ info
i40e: use xdp.frame_sz as XDP RxQ info frag_size
libeth, idpf: use truesize as XDP RxQ info frag_size
net: enetc: use truesize as XDP RxQ info frag_size
xdp: produce a warning when calculated tailroom is negative
drivers/net/ethernet/freescale/enetc/enetc.c | 2 +-
drivers/net/ethernet/intel/i40e/i40e_main.c | 40 +++++++++++---------
drivers/net/ethernet/intel/i40e/i40e_txrx.c | 5 ++-
drivers/net/ethernet/intel/ice/ice_base.c | 33 +++++-----------
drivers/net/ethernet/intel/ice/ice_txrx.c | 3 +-
drivers/net/ethernet/intel/ice/ice_xsk.c | 3 ++
drivers/net/ethernet/intel/idpf/xdp.c | 6 ++-
drivers/net/ethernet/intel/idpf/xsk.c | 1 +
drivers/net/ethernet/intel/libeth/xsk.c | 1 +
include/net/libeth/xsk.h | 3 ++
include/net/xdp_sock_drv.h | 10 +++++
net/core/filter.c | 6 ++-
12 files changed, 66 insertions(+), 47 deletions(-)
--
2.52.0
| null | null | null | [PATCH bpf v3 0/9] Address XDP frags having negative tailroom | On Tue, Feb 17, 2026 at 02:24:42PM +0100, Larysa Zaremba wrote:
ice_setup_rx_ctx() consumes ring->rx_buf_len. This can't come from
page_pool when you have configured xsk_pool on a given rxq. I believe we
need a setting:
ring->rx_buf_len =
xsk_pool_get_rx_frame_size(ring->xsk_pool); | {
"author": "Maciej Fijalkowski <maciej.fijalkowski@intel.com>",
"date": "Fri, 27 Feb 2026 12:22:41 +0100",
"is_openbsd": false,
"thread_id": "aaG4z7ZIARBAzueO@boxer.mbox.gz"
} |
lkml_critique | lkml | Aside from the issue described below, tailroom calculation does not account
for pages being split between frags, e.g. in i40e, enetc and
AF_XDP ZC with smaller chunks. These series address the problem by
calculating modulo (skb_frag_off() % rxq->frag_size) in order to get
data offset within a smaller block of memory. Please note, xskxceiver
tail grow test passes without modulo e.g. in xdpdrv mode on i40e,
because there is not enough descriptors to get to flipped buffers.
Many ethernet drivers report xdp Rx queue frag size as being the same as
DMA write size. However, the only user of this field, namely
bpf_xdp_frags_increase_tail(), clearly expects a truesize.
Such difference leads to unspecific memory corruption issues under certain
circumstances, e.g. in ixgbevf maximum DMA write size is 3 KB, so when
running xskxceiver's XDP_ADJUST_TAIL_GROW_MULTI_BUFF, 6K packet fully uses
all DMA-writable space in 2 buffers. This would be fine, if only
rxq->frag_size was properly set to 4K, but value of 3K results in a
negative tailroom, because there is a non-zero page offset.
We are supposed to return -EINVAL and be done with it in such case,
but due to tailroom being stored as an unsigned int, it is reported to be
somewhere near UINT_MAX, resulting in a tail being grown, even if the
requested offset is too much(it is around 2K in the abovementioned test).
This later leads to all kinds of unspecific calltraces.
[ 7340.337579] xskxceiver[1440]: segfault at 1da718 ip 00007f4161aeac9d sp 00007f41615a6a00 error 6
[ 7340.338040] xskxceiver[1441]: segfault at 7f410000000b ip 00000000004042b5 sp 00007f415bffecf0 error 4
[ 7340.338179] in libc.so.6[61c9d,7f4161aaf000+160000]
[ 7340.339230] in xskxceiver[42b5,400000+69000]
[ 7340.340300] likely on CPU 6 (core 0, socket 6)
[ 7340.340302] Code: ff ff 01 e9 f4 fe ff ff 0f 1f 44 00 00 4c 39 f0 74 73 31 c0 ba 01 00 00 00 f0 0f b1 17 0f 85 ba 00 00 00 49 8b 87 88 00 00 00 <4c> 89 70 08 eb cc 0f 1f 44 00 00 48 8d bd f0 fe ff ff 89 85 ec fe
[ 7340.340888] likely on CPU 3 (core 0, socket 3)
[ 7340.345088] Code: 00 00 00 ba 00 00 00 00 be 00 00 00 00 89 c7 e8 31 ca ff ff 89 45 ec 8b 45 ec 85 c0 78 07 b8 00 00 00 00 eb 46 e8 0b c8 ff ff <8b> 00 83 f8 69 74 24 e8 ff c7 ff ff 8b 00 83 f8 0b 74 18 e8 f3 c7
[ 7340.404334] Oops: general protection fault, probably for non-canonical address 0x6d255010bdffc: 0000 [#1] SMP NOPTI
[ 7340.405972] CPU: 7 UID: 0 PID: 1439 Comm: xskxceiver Not tainted 6.19.0-rc1+ #21 PREEMPT(lazy)
[ 7340.408006] Hardware name: QEMU Standard PC (Q35 + ICH9, 2009), BIOS 1.17.0-5.fc42 04/01/2014
[ 7340.409716] RIP: 0010:lookup_swap_cgroup_id+0x44/0x80
[ 7340.410455] Code: 83 f8 1c 73 39 48 ba ff ff ff ff ff ff ff 03 48 8b 04 c5 20 55 fa bd 48 21 d1 48 89 ca 83 e1 01 48 d1 ea c1 e1 04 48 8d 04 90 <8b> 00 48 83 c4 10 d3 e8 c3 cc cc cc cc 31 c0 e9 98 b7 dd 00 48 89
[ 7340.412787] RSP: 0018:ffffcc5c04f7f6d0 EFLAGS: 00010202
[ 7340.413494] RAX: 0006d255010bdffc RBX: ffff891f477895a8 RCX: 0000000000000010
[ 7340.414431] RDX: 0001c17e3fffffff RSI: 00fa070000000000 RDI: 000382fc7fffffff
[ 7340.415354] RBP: 00fa070000000000 R08: ffffcc5c04f7f8f8 R09: ffffcc5c04f7f7d0
[ 7340.416283] R10: ffff891f4c1a7000 R11: ffffcc5c04f7f9c8 R12: ffffcc5c04f7f7d0
[ 7340.417218] R13: 03ffffffffffffff R14: 00fa06fffffffe00 R15: ffff891f47789500
[ 7340.418229] FS: 0000000000000000(0000) GS:ffff891ffdfaa000(0000) knlGS:0000000000000000
[ 7340.419489] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[ 7340.420286] CR2: 00007f415bfffd58 CR3: 0000000103f03002 CR4: 0000000000772ef0
[ 7340.421237] PKRU: 55555554
[ 7340.421623] Call Trace:
[ 7340.421987] <TASK>
[ 7340.422309] ? softleaf_from_pte+0x77/0xa0
[ 7340.422855] swap_pte_batch+0xa7/0x290
[ 7340.423363] zap_nonpresent_ptes.constprop.0.isra.0+0xd1/0x270
[ 7340.424102] zap_pte_range+0x281/0x580
[ 7340.424607] zap_pmd_range.isra.0+0xc9/0x240
[ 7340.425177] unmap_page_range+0x24d/0x420
[ 7340.425714] unmap_vmas+0xa1/0x180
[ 7340.426185] exit_mmap+0xe1/0x3b0
[ 7340.426644] __mmput+0x41/0x150
[ 7340.427098] exit_mm+0xb1/0x110
[ 7340.427539] do_exit+0x1b2/0x460
[ 7340.427992] do_group_exit+0x2d/0xc0
[ 7340.428477] get_signal+0x79d/0x7e0
[ 7340.428957] arch_do_signal_or_restart+0x34/0x100
[ 7340.429571] exit_to_user_mode_loop+0x8e/0x4c0
[ 7340.430159] do_syscall_64+0x188/0x6b0
[ 7340.430672] ? __do_sys_clone3+0xd9/0x120
[ 7340.431212] ? switch_fpu_return+0x4e/0xd0
[ 7340.431761] ? arch_exit_to_user_mode_prepare.isra.0+0xa1/0xc0
[ 7340.432498] ? do_syscall_64+0xbb/0x6b0
[ 7340.433015] ? __handle_mm_fault+0x445/0x690
[ 7340.433582] ? count_memcg_events+0xd6/0x210
[ 7340.434151] ? handle_mm_fault+0x212/0x340
[ 7340.434697] ? do_user_addr_fault+0x2b4/0x7b0
[ 7340.435271] ? clear_bhb_loop+0x30/0x80
[ 7340.435788] ? clear_bhb_loop+0x30/0x80
[ 7340.436299] ? clear_bhb_loop+0x30/0x80
[ 7340.436812] ? clear_bhb_loop+0x30/0x80
[ 7340.437323] entry_SYSCALL_64_after_hwframe+0x76/0x7e
[ 7340.437973] RIP: 0033:0x7f4161b14169
[ 7340.438468] Code: Unable to access opcode bytes at 0x7f4161b1413f.
[ 7340.439242] RSP: 002b:00007ffc6ebfa770 EFLAGS: 00000246 ORIG_RAX: 00000000000000ca
[ 7340.440173] RAX: fffffffffffffe00 RBX: 00000000000005a1 RCX: 00007f4161b14169
[ 7340.441061] RDX: 00000000000005a1 RSI: 0000000000000109 RDI: 00007f415bfff990
[ 7340.441943] RBP: 00007ffc6ebfa7a0 R08: 0000000000000000 R09: 00000000ffffffff
[ 7340.442824] R10: 0000000000000000 R11: 0000000000000246 R12: 0000000000000000
[ 7340.443707] R13: 0000000000000000 R14: 00007f415bfff990 R15: 00007f415bfff6c0
[ 7340.444586] </TASK>
[ 7340.444922] Modules linked in: rfkill intel_rapl_msr intel_rapl_common intel_uncore_frequency_common skx_edac_common nfit libnvdimm kvm_intel vfat fat kvm snd_pcm irqbypass rapl iTCO_wdt snd_timer intel_pmc_bxt iTCO_vendor_support snd ixgbevf virtio_net soundcore i2c_i801 pcspkr libeth_xdp net_failover i2c_smbus lpc_ich failover libeth virtio_balloon joydev 9p fuse loop zram lz4hc_compress lz4_compress 9pnet_virtio 9pnet netfs ghash_clmulni_intel serio_raw qemu_fw_cfg
[ 7340.449650] ---[ end trace 0000000000000000 ]---
The issue can be fixed in all in-tree drivers, but we cannot just trust OOT
drivers to not do this. Therefore, make tailroom a signed int and produce a
warning when it is negative to prevent such mistakes in the future.
The issue can also be easily reproduced with ice driver, by applying
the following diff to xskxceiver and enjoying a kernel panic in xdpdrv mode:
diff --git a/tools/testing/selftests/bpf/prog_tests/test_xsk.c b/tools/testing/selftests/bpf/prog_tests/test_xsk.c
index 5af28f359cfd..042d587fa7ef 100644
--- a/tools/testing/selftests/bpf/prog_tests/test_xsk.c
+++ b/tools/testing/selftests/bpf/prog_tests/test_xsk.c
@@ -2541,8 +2541,8 @@ int testapp_adjust_tail_grow_mb(struct test_spec *test)
{
test->mtu = MAX_ETH_JUMBO_SIZE;
/* Grow by (frag_size - last_frag_Size) - 1 to stay inside the last fragment */
- return testapp_adjust_tail(test, (XSK_UMEM__MAX_FRAME_SIZE / 2) - 1,
- XSK_UMEM__LARGE_FRAME_SIZE * 2);
+ return testapp_adjust_tail(test, XSK_UMEM__MAX_FRAME_SIZE * 100,
+ 6912);
}
int testapp_tx_queue_consumer(struct test_spec *test)
If we print out the values involved in the tailroom calculation:
tailroom = rxq->frag_size - skb_frag_size(frag) - skb_frag_off(frag);
4294967040 = 3456 - 3456 - 256
I personally reproduced and verified the issue in ice and i40e,
aside from WiP ixgbevf implementation.
v3->v2:
* unregister XDP RxQ info for subfunction in ice
* remove rx_buf_len variable in ice
* add missing ifdefed empty definition xsk_pool_get_rx_frag_step()
* move xsk_pool_get_rx_frag_step() call from idpf to libeth
* simplify conditions when determining frag_size in idpf
* correctly init xdp_frame_sz for non-main VSI in i40e
v1->v2:
* add modulo to calculate offset within chunk
* add helper for AF_XDP ZC queues
* fix the problem in ZC mode in i40e, ice and idpf
* verify solution in i40e
* fix RxQ info registering in i40e
* fix splitq handling in idpf
* do not use word truesize unless the value used is named trusize
Larysa Zaremba (9):
xdp: use modulo operation to calculate XDP frag tailroom
xsk: introduce helper to determine rxq->frag_size
ice: fix rxq info registering in mbuf packets
ice: change XDP RxQ frag_size from DMA write length to xdp.frame_sz
i40e: fix registering XDP RxQ info
i40e: use xdp.frame_sz as XDP RxQ info frag_size
libeth, idpf: use truesize as XDP RxQ info frag_size
net: enetc: use truesize as XDP RxQ info frag_size
xdp: produce a warning when calculated tailroom is negative
drivers/net/ethernet/freescale/enetc/enetc.c | 2 +-
drivers/net/ethernet/intel/i40e/i40e_main.c | 40 +++++++++++---------
drivers/net/ethernet/intel/i40e/i40e_txrx.c | 5 ++-
drivers/net/ethernet/intel/ice/ice_base.c | 33 +++++-----------
drivers/net/ethernet/intel/ice/ice_txrx.c | 3 +-
drivers/net/ethernet/intel/ice/ice_xsk.c | 3 ++
drivers/net/ethernet/intel/idpf/xdp.c | 6 ++-
drivers/net/ethernet/intel/idpf/xsk.c | 1 +
drivers/net/ethernet/intel/libeth/xsk.c | 1 +
include/net/libeth/xsk.h | 3 ++
include/net/xdp_sock_drv.h | 10 +++++
net/core/filter.c | 6 ++-
12 files changed, 66 insertions(+), 47 deletions(-)
--
2.52.0
| null | null | null | [PATCH bpf v3 0/9] Address XDP frags having negative tailroom | On Tue, Feb 17, 2026 at 02:24:38PM +0100, Larysa Zaremba wrote:
May I ask what was the testing approach against ice on your side? When I
run test_xsk.sh against tree with your series applied, I get a panic shown
below [1]. This comes from a test that modifies descriptor count on rings
and the trick is that it might be passing when running as a standalone
test but in the test suite it causes problems. It comes from a fact that
we copy xdp_rxq between old and new ice_rx_ring, core sees the xdp_rxq
already registered, does unregister by itself but it bails out on
page_pool pointer being invalid (as these two xdp_rxqs pointed to same pp
and it got destroyed). So small diff below [0] allows me to go through
xskxceiver test suite executed from test_xsk.sh.
Thanks,
MF
[0]:
diff --git a/drivers/net/ethernet/intel/ice/ice_ethtool.c b/drivers/net/ethernet/intel/ice/ice_ethtool.c
index 969d4f8f9c02..06986adb2005 100644
--- a/drivers/net/ethernet/intel/ice/ice_ethtool.c
+++ b/drivers/net/ethernet/intel/ice/ice_ethtool.c
@@ -3328,6 +3328,7 @@ ice_set_ringparam(struct net_device *netdev, struct ethtool_ringparam *ring,
rx_rings[i].cached_phctime = pf->ptp.cached_phc_time;
rx_rings[i].desc = NULL;
rx_rings[i].xdp_buf = NULL;
+ xdp_rxq_info_unreg(&rx_rings[i].xdp_rxq);
/* this is to allow wr32 to have something to write to
* during early allocation of Rx buffers
[1]:
[ 2596.560462] BUG: kernel NULL pointer dereference, address: 0000000000000008
[ 2596.568466] #PF: supervisor read access in kernel mode
[ 2596.574686] #PF: error_code(0x0000) - not-present page
[ 2596.580942] PGD 118694067 P4D 0
[ 2596.585322] Oops: Oops: 0000 [#1] SMP NOPTI
[ 2596.590694] CPU: 2 UID: 0 PID: 5117 Comm: xskxceiver Tainted: G B W O 6.19.0+ #198 PREEMPT(full)
[ 2596.602065] Tainted: [B]=BAD_PAGE, [W]=WARN, [O]=OOT_MODULE
[ 2596.609049] Hardware name: Intel Corporation M50CYP2SBSTD/M50CYP2SBSTD, BIOS SE5C620.86B.01.01.0004.2110190142 10/19/2021
[ 2596.621632] RIP: 0010:xdp_unreg_mem_model+0x86/0xc0
[ 2596.628195] Code: 0f 44 d7 f6 c2 01 75 37 41 0f b7 4c 24 16 48 89 ce 48 f7 de 3b 5c 32 04 75 1d 48 89 d3 48 29 cb 48 85 d2 74 2f e8 9a 9e 4c ff <48> 8b 7b 08 5b 5d 41 5c e9 6d eb 00 00 48 8b 12 f6 c2 01 74 d5 48
[ 2596.650847] RSP: 0018:ffa000001ffe3a90 EFLAGS: 00010246
[ 2596.658128] RAX: 0000000000000000 RBX: 0000000000000000 RCX: ff1100808e308ea1
[ 2596.667403] RDX: ff1100808e308ea1 RSI: 00000000000001cc RDI: ff11000130150000
[ 2596.676719] RBP: 0000000000000000 R08: 0000000000001000 R09: 0000000000000001
[ 2596.686060] R10: ff1100011084a2c0 R11: 0000000000000000 R12: ff1100011541ce40
[ 2596.695445] R13: 0000000000001000 R14: 0000000000000000 R15: 0000000000000000
[ 2596.704866] FS: 00007f6044013c40(0000) GS:ff11007efbb1b000(0000) knlGS:0000000000000000
[ 2596.715336] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[ 2596.723510] CR2: 0000000000000008 CR3: 00000001e9052004 CR4: 0000000000773ef0
[ 2596.733162] PKRU: 55555554
[ 2596.738407] Call Trace:
[ 2596.743398] <TASK>
[ 2596.748045] __xdp_rxq_info_reg+0xb7/0xf0
[ 2596.755108] ice_vsi_cfg_rxq+0x668/0x6b0 [ice]
[ 2596.762499] ice_vsi_cfg_rxqs+0x29/0x80 [ice]
[ 2596.769555] ice_up+0xe/0x30 [ice]
[ 2596.775673] ice_set_ringparam+0x662/0x7e0 [ice]
[ 2596.783066] ethtool_set_ringparam+0xb3/0x110
[ 2596.790189] __dev_ethtool+0x1200/0x2d90
[ 2596.796916] ? update_se+0xc1/0x120
[ 2596.803224] ? update_load_avg+0x73/0x220
[ 2596.810079] ? xas_load+0x9/0xc0
[ 2596.816172] ? xa_load+0x71/0xb0
[ 2596.822273] ? avc_has_extended_perms+0xcf/0x4a0
[ 2596.829822] ? __kmalloc_cache_noprof+0x11a/0x400
[ 2596.837493] dev_ethtool+0xa6/0x170
[ 2596.843976] dev_ioctl+0x2d9/0x510
[ 2596.850388] sock_do_ioctl+0xa8/0x110
[ 2596.857078] sock_ioctl+0x234/0x320
[ 2596.863614] __x64_sys_ioctl+0x92/0xe0
[ 2596.870444] do_syscall_64+0xa4/0xc80
[ 2596.877212] entry_SYSCALL_64_after_hwframe+0x71/0x79
[ 2596.885426] RIP: 0033:0x7f6043f24e1d
[ 2596.892186] Code: 04 25 28 00 00 00 48 89 45 c8 31 c0 48 8d 45 10 c7 45 b0 10 00 00 00 48 89 45 b8 48 8d 45 d0 48 89 45 c0 b8 10 00 00 00 0f 05 <89> c2 3d 00 f0 ff ff 77 1a 48 8b 45 c8 64 48 2b 04 25 28 00 00 00
[ 2596.917864] RSP: 002b:00007ffd329f5e50 EFLAGS: 00000246 ORIG_RAX: 0000000000000010
[ 2596.929028] RAX: ffffffffffffffda RBX: 00007ffd329f6208 RCX: 00007f6043f24e1d
[ 2596.939757] RDX: 00007ffd329f5ed0 RSI: 0000000000008946 RDI: 0000000000000013
[ 2596.950460] RBP: 00007ffd329f5ea0 R08: 0000000000000000 R09: 0000000000000007
[ 2596.961597] R10: 0000000000000000 R11: 0000000000000246 R12: 0000000000000005
[ 2596.972256] R13: 0000000000000000 R14: 000055a88e016338 R15: 00007f6044100000
[ 2596.982917] </TASK>
[ 2596.988534] Modules linked in: ice(O) ipmi_ssif 8021q garp stp mrp llc intel_rapl_msr intel_rapl_common x86_pkg_temp_thermal intel_powerclamp coretemp nls_iso8859_1 kvm_intel kvm irqbypass mei_me ioatdma mei wmi dca ipmi_si ipmi_msghandler acpi_power_meter acpi_pad input_leds hid_generic ghash_clmulni_intel idpf i40e libeth_xdp libeth ahci libie libie_fwlog libie_adminq libahci aesni_intel gf128mul [last unloaded: irdma]
[ 2597.040161] CR2: 0000000000000008
[ 2597.046911] ---[ end trace 0000000000000000 ]---
[ 2597.117161] RIP: 0010:xdp_unreg_mem_model+0x86/0xc0
[ 2597.125432] Code: 0f 44 d7 f6 c2 01 75 37 41 0f b7 4c 24 16 48 89 ce 48 f7 de 3b 5c 32 04 75 1d 48 89 d3 48 29 cb 48 85 d2 74 2f e8 9a 9e 4c ff <48> 8b 7b 08 5b 5d 41 5c e9 6d eb 00 00 48 8b 12 f6 c2 01 74 d5 48
[ 2597.151379] RSP: 0018:ffa000001ffe3a90 EFLAGS: 00010246
[ 2597.160243] RAX: 0000000000000000 RBX: 0000000000000000 RCX: ff1100808e308ea1
[ 2597.171798] RDX: ff1100808e308ea1 RSI: 00000000000001cc RDI: ff11000130150000
[ 2597.182587] RBP: 0000000000000000 R08: 0000000000001000 R09: 0000000000000001
[ 2597.193333] R10: ff1100011084a2c0 R11: 0000000000000000 R12: ff1100011541ce40
[ 2597.204055] R13: 0000000000001000 R14: 0000000000000000 R15: 0000000000000000
[ 2597.214732] FS: 00007f6044013c40(0000) GS:ff11007efbb1b000(0000) knlGS:0000000000000000
[ 2597.226440] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[ 2597.235842] CR2: 0000000000000008 CR3: 00000001e9052004 CR4: 0000000000773ef0
[ 2597.246692] PKRU: 55555554
[ 2597.253088] note: xskxceiver[5117] exited with irqs disabled | {
"author": "Maciej Fijalkowski <maciej.fijalkowski@intel.com>",
"date": "Fri, 27 Feb 2026 16:31:27 +0100",
"is_openbsd": false,
"thread_id": "aaG4z7ZIARBAzueO@boxer.mbox.gz"
} |
lkml_critique | lkml | Replace msleep() with fsleep() in rtw_cmd.c to improve delay
precision and follow modern kernel practices.
Specifically, this fixes a checkpatch warning for the 10ms delay
in _rtw_free_evt_priv() and updates the 100ms polling loop in
rtw_chk_hi_queue_hdl() for consistency.
Signed-off-by: Jose A. Perez de Azpillaga <azpijr@gmail.com>
---
drivers/staging/rtl8723bs/core/rtw_cmd.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/staging/rtl8723bs/core/rtw_cmd.c b/drivers/staging/rtl8723bs/core/rtw_cmd.c
index abb84f8aecbe..e2c5eb2d32ef 100644
--- a/drivers/staging/rtl8723bs/core/rtw_cmd.c
+++ b/drivers/staging/rtl8723bs/core/rtw_cmd.c
@@ -8,6 +8,7 @@
#include <hal_btcoex.h>
#include <linux/jiffies.h>
#include <linux/align.h>
+#include <linux/delay.h>
static struct _cmd_callback rtw_cmd_callback[] = {
{GEN_CMD_CODE(_Read_MACREG), NULL}, /*0*/
@@ -214,7 +215,7 @@ void _rtw_free_evt_priv(struct evt_priv *pevtpriv)
{
_cancel_workitem_sync(&pevtpriv->c2h_wk);
while (pevtpriv->c2h_wk_alive)
- msleep(10);
+ fsleep(10 * 1000);
while (!rtw_cbuf_empty(pevtpriv->c2h_queue)) {
void *c2h = rtw_cbuf_pop(pevtpriv->c2h_queue);
@@ -1495,7 +1496,7 @@ static void rtw_chk_hi_queue_hdl(struct adapter *padapter)
rtw_hal_get_hwreg(padapter, HW_VAR_CHK_HI_QUEUE_EMPTY, &empty);
while (!empty && jiffies_to_msecs(jiffies - start) < g_wait_hiq_empty) {
- msleep(100);
+ fsleep(100 * 1000);
rtw_hal_get_hwreg(padapter, HW_VAR_CHK_HI_QUEUE_EMPTY, &empty);
}
--
2.53.0
| null | null | null | [PATCH] staging: rtl8723bs: replace msleep() with fsleep() in rtw_cmd.c | On Wed Feb 25, 2026 at 7:05 PM CST, Jose A. Perez de Azpillaga wrote:
...
It's better to use USEC_PER_MSEC instead of 1000 to avoid magic numbers.
...
Ditto.
Thanks,
ET | {
"author": "\"Ethan Tidmore\" <ethantidmore06@gmail.com>",
"date": "Thu, 26 Feb 2026 20:03:39 -0600",
"is_openbsd": false,
"thread_id": "DGPUF5A1SKXT.3TSUTM6ZCRH3N@gmail.com.mbox.gz"
} |
lkml_critique | lkml | Replace msleep() with fsleep() in rtw_cmd.c to improve delay
precision and follow modern kernel practices.
Specifically, this fixes a checkpatch warning for the 10ms delay
in _rtw_free_evt_priv() and updates the 100ms polling loop in
rtw_chk_hi_queue_hdl() for consistency.
Signed-off-by: Jose A. Perez de Azpillaga <azpijr@gmail.com>
---
drivers/staging/rtl8723bs/core/rtw_cmd.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/staging/rtl8723bs/core/rtw_cmd.c b/drivers/staging/rtl8723bs/core/rtw_cmd.c
index abb84f8aecbe..e2c5eb2d32ef 100644
--- a/drivers/staging/rtl8723bs/core/rtw_cmd.c
+++ b/drivers/staging/rtl8723bs/core/rtw_cmd.c
@@ -8,6 +8,7 @@
#include <hal_btcoex.h>
#include <linux/jiffies.h>
#include <linux/align.h>
+#include <linux/delay.h>
static struct _cmd_callback rtw_cmd_callback[] = {
{GEN_CMD_CODE(_Read_MACREG), NULL}, /*0*/
@@ -214,7 +215,7 @@ void _rtw_free_evt_priv(struct evt_priv *pevtpriv)
{
_cancel_workitem_sync(&pevtpriv->c2h_wk);
while (pevtpriv->c2h_wk_alive)
- msleep(10);
+ fsleep(10 * 1000);
while (!rtw_cbuf_empty(pevtpriv->c2h_queue)) {
void *c2h = rtw_cbuf_pop(pevtpriv->c2h_queue);
@@ -1495,7 +1496,7 @@ static void rtw_chk_hi_queue_hdl(struct adapter *padapter)
rtw_hal_get_hwreg(padapter, HW_VAR_CHK_HI_QUEUE_EMPTY, &empty);
while (!empty && jiffies_to_msecs(jiffies - start) < g_wait_hiq_empty) {
- msleep(100);
+ fsleep(100 * 1000);
rtw_hal_get_hwreg(padapter, HW_VAR_CHK_HI_QUEUE_EMPTY, &empty);
}
--
2.53.0
| null | null | null | [PATCH] staging: rtl8723bs: replace msleep() with fsleep() in rtw_cmd.c | Replace msleep() with fsleep() in rtw_cmd.c to improve delay
precision and follow modern kernel practices.
Specifically, this fixes a checkpatch warning for the 10ms delay
in _rtw_free_evt_priv() and updates the 100ms polling loops in
rtw_chk_hi_queue_hdl() and rtw_free_cmd_priv() for consistency.
Signed-off-by: Jose A. Perez de Azpillaga <azpijr@gmail.com>
---
v2: changed to USEC_PER_MSEC instead of magic numbers
---
drivers/staging/rtl8723bs/core/rtw_cmd.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/staging/rtl8723bs/core/rtw_cmd.c b/drivers/staging/rtl8723bs/core/rtw_cmd.c
index abb84f8aecbe..c689d3744ad4 100644
--- a/drivers/staging/rtl8723bs/core/rtw_cmd.c
+++ b/drivers/staging/rtl8723bs/core/rtw_cmd.c
@@ -8,6 +8,7 @@
#include <hal_btcoex.h>
#include <linux/jiffies.h>
#include <linux/align.h>
+#include <linux/delay.h>
static struct _cmd_callback rtw_cmd_callback[] = {
{GEN_CMD_CODE(_Read_MACREG), NULL}, /*0*/
@@ -214,7 +215,7 @@ void _rtw_free_evt_priv(struct evt_priv *pevtpriv)
{
_cancel_workitem_sync(&pevtpriv->c2h_wk);
while (pevtpriv->c2h_wk_alive)
- msleep(10);
+ fsleep(10 * USEC_PER_MSEC);
while (!rtw_cbuf_empty(pevtpriv->c2h_queue)) {
void *c2h = rtw_cbuf_pop(pevtpriv->c2h_queue);
@@ -1495,7 +1496,7 @@ static void rtw_chk_hi_queue_hdl(struct adapter *padapter)
rtw_hal_get_hwreg(padapter, HW_VAR_CHK_HI_QUEUE_EMPTY, &empty);
while (!empty && jiffies_to_msecs(jiffies - start) < g_wait_hiq_empty) {
- msleep(100);
+ fsleep(100 * USEC_PER_MSEC);
rtw_hal_get_hwreg(padapter, HW_VAR_CHK_HI_QUEUE_EMPTY, &empty);
}
--
2.53.0 | {
"author": "\"Jose A. Perez de Azpillaga\" <azpijr@gmail.com>",
"date": "Fri, 27 Feb 2026 09:46:12 +0100",
"is_openbsd": false,
"thread_id": "DGPUF5A1SKXT.3TSUTM6ZCRH3N@gmail.com.mbox.gz"
} |
lkml_critique | lkml | Replace msleep() with fsleep() in rtw_cmd.c to improve delay
precision and follow modern kernel practices.
Specifically, this fixes a checkpatch warning for the 10ms delay
in _rtw_free_evt_priv() and updates the 100ms polling loop in
rtw_chk_hi_queue_hdl() for consistency.
Signed-off-by: Jose A. Perez de Azpillaga <azpijr@gmail.com>
---
drivers/staging/rtl8723bs/core/rtw_cmd.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/staging/rtl8723bs/core/rtw_cmd.c b/drivers/staging/rtl8723bs/core/rtw_cmd.c
index abb84f8aecbe..e2c5eb2d32ef 100644
--- a/drivers/staging/rtl8723bs/core/rtw_cmd.c
+++ b/drivers/staging/rtl8723bs/core/rtw_cmd.c
@@ -8,6 +8,7 @@
#include <hal_btcoex.h>
#include <linux/jiffies.h>
#include <linux/align.h>
+#include <linux/delay.h>
static struct _cmd_callback rtw_cmd_callback[] = {
{GEN_CMD_CODE(_Read_MACREG), NULL}, /*0*/
@@ -214,7 +215,7 @@ void _rtw_free_evt_priv(struct evt_priv *pevtpriv)
{
_cancel_workitem_sync(&pevtpriv->c2h_wk);
while (pevtpriv->c2h_wk_alive)
- msleep(10);
+ fsleep(10 * 1000);
while (!rtw_cbuf_empty(pevtpriv->c2h_queue)) {
void *c2h = rtw_cbuf_pop(pevtpriv->c2h_queue);
@@ -1495,7 +1496,7 @@ static void rtw_chk_hi_queue_hdl(struct adapter *padapter)
rtw_hal_get_hwreg(padapter, HW_VAR_CHK_HI_QUEUE_EMPTY, &empty);
while (!empty && jiffies_to_msecs(jiffies - start) < g_wait_hiq_empty) {
- msleep(100);
+ fsleep(100 * 1000);
rtw_hal_get_hwreg(padapter, HW_VAR_CHK_HI_QUEUE_EMPTY, &empty);
}
--
2.53.0
| null | null | null | [PATCH] staging: rtl8723bs: replace msleep() with fsleep() in rtw_cmd.c | On Fri Feb 27, 2026 at 2:46 AM CST, Jose A. Perez de Azpillaga wrote:
^^^
Remove this.
Here's Dan Carpenters's resource on making a v2:
https://staticthinking.wordpress.com/2022/07/27/how-to-send-a-v2-patch/
Thanks,
ET | {
"author": "\"Ethan Tidmore\" <ethantidmore06@gmail.com>",
"date": "Fri, 27 Feb 2026 09:18:24 -0600",
"is_openbsd": false,
"thread_id": "DGPUF5A1SKXT.3TSUTM6ZCRH3N@gmail.com.mbox.gz"
} |
lkml_critique | lkml | Use dev_err_probe() consistently in the probe path of several ADI IIO
drivers. This simplifies error handling and ensures proper logging of
deferred probes.
Each driver is updated by introducing a local struct device variable to
simplify repeated &spi->dev / &client->dev references, and converting
error paths to use dev_err_probe().
Drivers updated:
- adrf6780
- admv1014
- admv1013
- adf4377
- ad7293
- admv8818
Changes in v3:
- Squash the struct device variable introduction and dev_err_probe()
conversion into a single patch per driver.
Antoniu Miclaus (6):
iio: frequency: adrf6780: add dev variable and use dev_err_probe
iio: frequency: admv1014: add dev variable and use dev_err_probe
iio: frequency: admv1013: add dev variable and use dev_err_probe
iio: frequency: adf4377: add dev variable and use dev_err_probe
iio: dac: ad7293: add dev variable and use dev_err_probe
iio: filter: admv8818: add dev variable and use dev_err_probe
drivers/iio/dac/ad7293.c | 32 +++++------
drivers/iio/filter/admv8818.c | 61 ++++++++++-----------
drivers/iio/frequency/adf4377.c | 57 +++++++++----------
drivers/iio/frequency/admv1013.c | 51 ++++++++---------
drivers/iio/frequency/admv1014.c | 94 +++++++++++++++-----------------
drivers/iio/frequency/adrf6780.c | 60 ++++++++++----------
6 files changed, 168 insertions(+), 187 deletions(-)
--
2.43.0
| null | null | null | [PATCH v3 0/6] iio: use dev_err_probe in probe path for ADI drivers | Introduce a struct device *dev local variable and replace dev_err() +
return with dev_err_probe() in functions that use devm_ managed
resources. This simplifies error handling and ensures proper logging
of deferred probes.
Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
---
drivers/iio/dac/ad7293.c | 32 ++++++++++++++++----------------
1 file changed, 16 insertions(+), 16 deletions(-)
diff --git a/drivers/iio/dac/ad7293.c b/drivers/iio/dac/ad7293.c
index c3797e40cdd9..e26cc36e9270 100644
--- a/drivers/iio/dac/ad7293.c
+++ b/drivers/iio/dac/ad7293.c
@@ -776,27 +776,27 @@ static int ad7293_reset(struct ad7293_state *st)
static int ad7293_properties_parse(struct ad7293_state *st)
{
- struct spi_device *spi = st->spi;
+ struct device *dev = &st->spi->dev;
int ret;
- ret = devm_regulator_get_enable(&spi->dev, "avdd");
+ ret = devm_regulator_get_enable(dev, "avdd");
if (ret)
- return dev_err_probe(&spi->dev, ret, "failed to enable AVDD\n");
+ return dev_err_probe(dev, ret, "failed to enable AVDD\n");
- ret = devm_regulator_get_enable(&spi->dev, "vdrive");
+ ret = devm_regulator_get_enable(dev, "vdrive");
if (ret)
- return dev_err_probe(&spi->dev, ret, "failed to enable VDRIVE\n");
+ return dev_err_probe(dev, ret, "failed to enable VDRIVE\n");
- ret = devm_regulator_get_enable_optional(&spi->dev, "vrefin");
+ ret = devm_regulator_get_enable_optional(dev, "vrefin");
if (ret < 0 && ret != -ENODEV)
- return dev_err_probe(&spi->dev, ret, "failed to enable VREFIN\n");
+ return dev_err_probe(dev, ret, "failed to enable VREFIN\n");
st->vrefin_en = ret != -ENODEV;
- st->gpio_reset = devm_gpiod_get_optional(&st->spi->dev, "reset",
+ st->gpio_reset = devm_gpiod_get_optional(dev, "reset",
GPIOD_OUT_HIGH);
if (IS_ERR(st->gpio_reset))
- return dev_err_probe(&spi->dev, PTR_ERR(st->gpio_reset),
+ return dev_err_probe(dev, PTR_ERR(st->gpio_reset),
"failed to get the reset GPIO\n");
return 0;
@@ -806,7 +806,7 @@ static int ad7293_init(struct ad7293_state *st)
{
int ret;
u16 chip_id;
- struct spi_device *spi = st->spi;
+ struct device *dev = &st->spi->dev;
ret = ad7293_properties_parse(st);
if (ret)
@@ -821,10 +821,9 @@ static int ad7293_init(struct ad7293_state *st)
if (ret)
return ret;
- if (chip_id != AD7293_CHIP_ID) {
- dev_err(&spi->dev, "Invalid Chip ID.\n");
- return -EINVAL;
- }
+ if (chip_id != AD7293_CHIP_ID)
+ return dev_err_probe(dev, -EINVAL,
+ "Invalid Chip ID.\n");
if (!st->vrefin_en)
return __ad7293_spi_update_bits(st, AD7293_REG_GENERAL,
@@ -845,9 +844,10 @@ static int ad7293_probe(struct spi_device *spi)
{
struct iio_dev *indio_dev;
struct ad7293_state *st;
+ struct device *dev = &spi->dev;
int ret;
- indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
+ indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
if (!indio_dev)
return -ENOMEM;
@@ -867,7 +867,7 @@ static int ad7293_probe(struct spi_device *spi)
if (ret)
return ret;
- return devm_iio_device_register(&spi->dev, indio_dev);
+ return devm_iio_device_register(dev, indio_dev);
}
static const struct spi_device_id ad7293_id[] = {
--
2.43.0 | {
"author": "Antoniu Miclaus <antoniu.miclaus@analog.com>",
"date": "Wed, 25 Feb 2026 17:05:51 +0200",
"is_openbsd": false,
"thread_id": "aaGuzkHk6kCkcyiz@ashevche-desk.local.mbox.gz"
} |
lkml_critique | lkml | Use dev_err_probe() consistently in the probe path of several ADI IIO
drivers. This simplifies error handling and ensures proper logging of
deferred probes.
Each driver is updated by introducing a local struct device variable to
simplify repeated &spi->dev / &client->dev references, and converting
error paths to use dev_err_probe().
Drivers updated:
- adrf6780
- admv1014
- admv1013
- adf4377
- ad7293
- admv8818
Changes in v3:
- Squash the struct device variable introduction and dev_err_probe()
conversion into a single patch per driver.
Antoniu Miclaus (6):
iio: frequency: adrf6780: add dev variable and use dev_err_probe
iio: frequency: admv1014: add dev variable and use dev_err_probe
iio: frequency: admv1013: add dev variable and use dev_err_probe
iio: frequency: adf4377: add dev variable and use dev_err_probe
iio: dac: ad7293: add dev variable and use dev_err_probe
iio: filter: admv8818: add dev variable and use dev_err_probe
drivers/iio/dac/ad7293.c | 32 +++++------
drivers/iio/filter/admv8818.c | 61 ++++++++++-----------
drivers/iio/frequency/adf4377.c | 57 +++++++++----------
drivers/iio/frequency/admv1013.c | 51 ++++++++---------
drivers/iio/frequency/admv1014.c | 94 +++++++++++++++-----------------
drivers/iio/frequency/adrf6780.c | 60 ++++++++++----------
6 files changed, 168 insertions(+), 187 deletions(-)
--
2.43.0
| null | null | null | [PATCH v3 0/6] iio: use dev_err_probe in probe path for ADI drivers | Introduce a struct device *dev local variable and replace dev_err() +
return with dev_err_probe() in functions that use devm_ managed
resources. This simplifies error handling and ensures proper logging
of deferred probes.
Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
---
drivers/iio/frequency/admv1013.c | 51 +++++++++++++++-----------------
1 file changed, 24 insertions(+), 27 deletions(-)
diff --git a/drivers/iio/frequency/admv1013.c b/drivers/iio/frequency/admv1013.c
index d8e8d541990f..514cf9f8eacb 100644
--- a/drivers/iio/frequency/admv1013.c
+++ b/drivers/iio/frequency/admv1013.c
@@ -441,7 +441,7 @@ static int admv1013_init(struct admv1013_state *st, int vcm_uv)
{
int ret;
unsigned int data;
- struct spi_device *spi = st->spi;
+ struct device *dev = &st->spi->dev;
/* Perform a software reset */
ret = __admv1013_spi_update_bits(st, ADMV1013_REG_SPI_CONTROL,
@@ -461,10 +461,9 @@ static int admv1013_init(struct admv1013_state *st, int vcm_uv)
return ret;
data = FIELD_GET(ADMV1013_CHIP_ID_MSK, data);
- if (data != ADMV1013_CHIP_ID) {
- dev_err(&spi->dev, "Invalid Chip ID.\n");
- return -EINVAL;
- }
+ if (data != ADMV1013_CHIP_ID)
+ return dev_err_probe(dev, -EINVAL,
+ "Invalid Chip ID.\n");
ret = __admv1013_spi_write(st, ADMV1013_REG_VVA_TEMP_COMP, 0xE700);
if (ret)
@@ -518,11 +517,11 @@ static int admv1013_properties_parse(struct admv1013_state *st)
{
int ret;
const char *str;
- struct spi_device *spi = st->spi;
+ struct device *dev = &st->spi->dev;
- st->det_en = device_property_read_bool(&spi->dev, "adi,detector-enable");
+ st->det_en = device_property_read_bool(dev, "adi,detector-enable");
- ret = device_property_read_string(&spi->dev, "adi,input-mode", &str);
+ ret = device_property_read_string(dev, "adi,input-mode", &str);
if (ret)
st->input_mode = ADMV1013_IQ_MODE;
@@ -533,7 +532,7 @@ static int admv1013_properties_parse(struct admv1013_state *st)
else
return -EINVAL;
- ret = device_property_read_string(&spi->dev, "adi,quad-se-mode", &str);
+ ret = device_property_read_string(dev, "adi,quad-se-mode", &str);
if (ret)
st->quad_se_mode = ADMV1013_SE_MODE_DIFF;
@@ -546,14 +545,12 @@ static int admv1013_properties_parse(struct admv1013_state *st)
else
return -EINVAL;
- ret = devm_regulator_bulk_get_enable(&st->spi->dev,
+ ret = devm_regulator_bulk_get_enable(dev,
ARRAY_SIZE(admv1013_vcc_regs),
admv1013_vcc_regs);
- if (ret) {
- dev_err_probe(&spi->dev, ret,
- "Failed to request VCC regulators\n");
- return ret;
- }
+ if (ret)
+ return dev_err_probe(dev, ret,
+ "Failed to request VCC regulators\n");
return 0;
}
@@ -562,9 +559,10 @@ static int admv1013_probe(struct spi_device *spi)
{
struct iio_dev *indio_dev;
struct admv1013_state *st;
+ struct device *dev = &spi->dev;
int ret, vcm_uv;
- indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
+ indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
if (!indio_dev)
return -ENOMEM;
@@ -581,36 +579,35 @@ static int admv1013_probe(struct spi_device *spi)
if (ret)
return ret;
- ret = devm_regulator_get_enable_read_voltage(&spi->dev, "vcm");
+ ret = devm_regulator_get_enable_read_voltage(dev, "vcm");
if (ret < 0)
- return dev_err_probe(&spi->dev, ret,
+ return dev_err_probe(dev, ret,
"failed to get the common-mode voltage\n");
vcm_uv = ret;
- st->clkin = devm_clk_get_enabled(&spi->dev, "lo_in");
+ st->clkin = devm_clk_get_enabled(dev, "lo_in");
if (IS_ERR(st->clkin))
- return dev_err_probe(&spi->dev, PTR_ERR(st->clkin),
+ return dev_err_probe(dev, PTR_ERR(st->clkin),
"failed to get the LO input clock\n");
st->nb.notifier_call = admv1013_freq_change;
- ret = devm_clk_notifier_register(&spi->dev, st->clkin, &st->nb);
+ ret = devm_clk_notifier_register(dev, st->clkin, &st->nb);
if (ret)
return ret;
mutex_init(&st->lock);
ret = admv1013_init(st, vcm_uv);
- if (ret) {
- dev_err(&spi->dev, "admv1013 init failed\n");
- return ret;
- }
+ if (ret)
+ return dev_err_probe(dev, ret,
+ "admv1013 init failed\n");
- ret = devm_add_action_or_reset(&spi->dev, admv1013_powerdown, st);
+ ret = devm_add_action_or_reset(dev, admv1013_powerdown, st);
if (ret)
return ret;
- return devm_iio_device_register(&spi->dev, indio_dev);
+ return devm_iio_device_register(dev, indio_dev);
}
static const struct spi_device_id admv1013_id[] = {
--
2.43.0 | {
"author": "Antoniu Miclaus <antoniu.miclaus@analog.com>",
"date": "Wed, 25 Feb 2026 17:05:49 +0200",
"is_openbsd": false,
"thread_id": "aaGuzkHk6kCkcyiz@ashevche-desk.local.mbox.gz"
} |
lkml_critique | lkml | Use dev_err_probe() consistently in the probe path of several ADI IIO
drivers. This simplifies error handling and ensures proper logging of
deferred probes.
Each driver is updated by introducing a local struct device variable to
simplify repeated &spi->dev / &client->dev references, and converting
error paths to use dev_err_probe().
Drivers updated:
- adrf6780
- admv1014
- admv1013
- adf4377
- ad7293
- admv8818
Changes in v3:
- Squash the struct device variable introduction and dev_err_probe()
conversion into a single patch per driver.
Antoniu Miclaus (6):
iio: frequency: adrf6780: add dev variable and use dev_err_probe
iio: frequency: admv1014: add dev variable and use dev_err_probe
iio: frequency: admv1013: add dev variable and use dev_err_probe
iio: frequency: adf4377: add dev variable and use dev_err_probe
iio: dac: ad7293: add dev variable and use dev_err_probe
iio: filter: admv8818: add dev variable and use dev_err_probe
drivers/iio/dac/ad7293.c | 32 +++++------
drivers/iio/filter/admv8818.c | 61 ++++++++++-----------
drivers/iio/frequency/adf4377.c | 57 +++++++++----------
drivers/iio/frequency/admv1013.c | 51 ++++++++---------
drivers/iio/frequency/admv1014.c | 94 +++++++++++++++-----------------
drivers/iio/frequency/adrf6780.c | 60 ++++++++++----------
6 files changed, 168 insertions(+), 187 deletions(-)
--
2.43.0
| null | null | null | [PATCH v3 0/6] iio: use dev_err_probe in probe path for ADI drivers | Introduce a struct device *dev local variable and replace dev_err() +
return with dev_err_probe() in functions that use devm_ managed
resources. This simplifies error handling and ensures proper logging
of deferred probes.
Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
---
drivers/iio/frequency/adf4377.c | 57 ++++++++++++++++-----------------
1 file changed, 27 insertions(+), 30 deletions(-)
diff --git a/drivers/iio/frequency/adf4377.c b/drivers/iio/frequency/adf4377.c
index fa686f785fa4..cfc0c524c4a4 100644
--- a/drivers/iio/frequency/adf4377.c
+++ b/drivers/iio/frequency/adf4377.c
@@ -706,23 +706,21 @@ static void adf4377_gpio_init(struct adf4377_state *st)
static int adf4377_init(struct adf4377_state *st)
{
- struct spi_device *spi = st->spi;
+ struct device *dev = &st->spi->dev;
int ret;
adf4377_gpio_init(st);
ret = adf4377_soft_reset(st);
- if (ret) {
- dev_err(&spi->dev, "Failed to soft reset.\n");
- return ret;
- }
+ if (ret)
+ return dev_err_probe(dev, ret,
+ "Failed to soft reset.\n");
ret = regmap_multi_reg_write(st->regmap, adf4377_reg_defaults,
ARRAY_SIZE(adf4377_reg_defaults));
- if (ret) {
- dev_err(&spi->dev, "Failed to set default registers.\n");
- return ret;
- }
+ if (ret)
+ return dev_err_probe(dev, ret,
+ "Failed to set default registers.\n");
ret = regmap_update_bits(st->regmap, 0x00,
ADF4377_0000_SDO_ACTIVE_MSK | ADF4377_0000_SDO_ACTIVE_R_MSK,
@@ -730,10 +728,9 @@ static int adf4377_init(struct adf4377_state *st)
ADF4377_0000_SDO_ACTIVE_SPI_4W) |
FIELD_PREP(ADF4377_0000_SDO_ACTIVE_R_MSK,
ADF4377_0000_SDO_ACTIVE_SPI_4W));
- if (ret) {
- dev_err(&spi->dev, "Failed to set 4-Wire Operation.\n");
- return ret;
- }
+ if (ret)
+ return dev_err_probe(dev, ret,
+ "Failed to set 4-Wire Operation.\n");
st->clkin_freq = clk_get_rate(st->clkin);
@@ -747,10 +744,9 @@ static int adf4377_init(struct adf4377_state *st)
FIELD_PREP(ADF4377_001A_PD_PFDCP_MSK, 0) |
FIELD_PREP(ADF4377_001A_PD_CLKOUT1_MSK, 0) |
FIELD_PREP(ADF4377_001A_PD_CLKOUT2_MSK, 0));
- if (ret) {
- dev_err(&spi->dev, "Failed to set power down registers.\n");
- return ret;
- }
+ if (ret)
+ return dev_err_probe(dev, ret,
+ "Failed to set power down registers.\n");
/* Set Mux Output */
ret = regmap_update_bits(st->regmap, 0x1D,
@@ -882,35 +878,35 @@ static const struct iio_chan_spec adf4377_channels[] = {
static int adf4377_properties_parse(struct adf4377_state *st)
{
- struct spi_device *spi = st->spi;
+ struct device *dev = &st->spi->dev;
int ret;
- st->clkin = devm_clk_get_enabled(&spi->dev, "ref_in");
+ st->clkin = devm_clk_get_enabled(dev, "ref_in");
if (IS_ERR(st->clkin))
- return dev_err_probe(&spi->dev, PTR_ERR(st->clkin),
+ return dev_err_probe(dev, PTR_ERR(st->clkin),
"failed to get the reference input clock\n");
- st->gpio_ce = devm_gpiod_get_optional(&st->spi->dev, "chip-enable",
+ st->gpio_ce = devm_gpiod_get_optional(dev, "chip-enable",
GPIOD_OUT_LOW);
if (IS_ERR(st->gpio_ce))
- return dev_err_probe(&spi->dev, PTR_ERR(st->gpio_ce),
+ return dev_err_probe(dev, PTR_ERR(st->gpio_ce),
"failed to get the CE GPIO\n");
- st->gpio_enclk1 = devm_gpiod_get_optional(&st->spi->dev, "clk1-enable",
+ st->gpio_enclk1 = devm_gpiod_get_optional(dev, "clk1-enable",
GPIOD_OUT_LOW);
if (IS_ERR(st->gpio_enclk1))
- return dev_err_probe(&spi->dev, PTR_ERR(st->gpio_enclk1),
+ return dev_err_probe(dev, PTR_ERR(st->gpio_enclk1),
"failed to get the CE GPIO\n");
if (st->chip_info->has_gpio_enclk2) {
- st->gpio_enclk2 = devm_gpiod_get_optional(&st->spi->dev, "clk2-enable",
+ st->gpio_enclk2 = devm_gpiod_get_optional(dev, "clk2-enable",
GPIOD_OUT_LOW);
if (IS_ERR(st->gpio_enclk2))
- return dev_err_probe(&spi->dev, PTR_ERR(st->gpio_enclk2),
+ return dev_err_probe(dev, PTR_ERR(st->gpio_enclk2),
"failed to get the CE GPIO\n");
}
- ret = device_property_match_property_string(&spi->dev, "adi,muxout-select",
+ ret = device_property_match_property_string(dev, "adi,muxout-select",
adf4377_muxout_modes,
ARRAY_SIZE(adf4377_muxout_modes));
if (ret >= 0)
@@ -1055,9 +1051,10 @@ static int adf4377_probe(struct spi_device *spi)
struct iio_dev *indio_dev;
struct regmap *regmap;
struct adf4377_state *st;
+ struct device *dev = &spi->dev;
int ret;
- indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
+ indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
if (!indio_dev)
return -ENOMEM;
@@ -1080,7 +1077,7 @@ static int adf4377_probe(struct spi_device *spi)
return ret;
st->nb.notifier_call = adf4377_freq_change;
- ret = devm_clk_notifier_register(&spi->dev, st->clkin, &st->nb);
+ ret = devm_clk_notifier_register(dev, st->clkin, &st->nb);
if (ret)
return ret;
@@ -1097,7 +1094,7 @@ static int adf4377_probe(struct spi_device *spi)
indio_dev->num_channels = ARRAY_SIZE(adf4377_channels);
}
- return devm_iio_device_register(&spi->dev, indio_dev);
+ return devm_iio_device_register(dev, indio_dev);
}
static const struct spi_device_id adf4377_id[] = {
--
2.43.0 | {
"author": "Antoniu Miclaus <antoniu.miclaus@analog.com>",
"date": "Wed, 25 Feb 2026 17:05:50 +0200",
"is_openbsd": false,
"thread_id": "aaGuzkHk6kCkcyiz@ashevche-desk.local.mbox.gz"
} |
lkml_critique | lkml | Use dev_err_probe() consistently in the probe path of several ADI IIO
drivers. This simplifies error handling and ensures proper logging of
deferred probes.
Each driver is updated by introducing a local struct device variable to
simplify repeated &spi->dev / &client->dev references, and converting
error paths to use dev_err_probe().
Drivers updated:
- adrf6780
- admv1014
- admv1013
- adf4377
- ad7293
- admv8818
Changes in v3:
- Squash the struct device variable introduction and dev_err_probe()
conversion into a single patch per driver.
Antoniu Miclaus (6):
iio: frequency: adrf6780: add dev variable and use dev_err_probe
iio: frequency: admv1014: add dev variable and use dev_err_probe
iio: frequency: admv1013: add dev variable and use dev_err_probe
iio: frequency: adf4377: add dev variable and use dev_err_probe
iio: dac: ad7293: add dev variable and use dev_err_probe
iio: filter: admv8818: add dev variable and use dev_err_probe
drivers/iio/dac/ad7293.c | 32 +++++------
drivers/iio/filter/admv8818.c | 61 ++++++++++-----------
drivers/iio/frequency/adf4377.c | 57 +++++++++----------
drivers/iio/frequency/admv1013.c | 51 ++++++++---------
drivers/iio/frequency/admv1014.c | 94 +++++++++++++++-----------------
drivers/iio/frequency/adrf6780.c | 60 ++++++++++----------
6 files changed, 168 insertions(+), 187 deletions(-)
--
2.43.0
| null | null | null | [PATCH v3 0/6] iio: use dev_err_probe in probe path for ADI drivers | Introduce a struct device *dev local variable and replace dev_err() +
return with dev_err_probe() in functions that use devm_ managed
resources. This simplifies error handling and ensures proper logging
of deferred probes.
Drop 'SPI' from error messages since the bus type is evident from
the device hierarchy.
Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
---
drivers/iio/frequency/admv1014.c | 94 +++++++++++++++-----------------
1 file changed, 43 insertions(+), 51 deletions(-)
diff --git a/drivers/iio/frequency/admv1014.c b/drivers/iio/frequency/admv1014.c
index 7a8f92ec80a2..eeb01cfb799f 100644
--- a/drivers/iio/frequency/admv1014.c
+++ b/drivers/iio/frequency/admv1014.c
@@ -609,16 +609,15 @@ static void admv1014_powerdown(void *data)
static int admv1014_init(struct admv1014_state *st)
{
unsigned int chip_id, enable_reg, enable_reg_msk;
- struct spi_device *spi = st->spi;
+ struct device *dev = &st->spi->dev;
int ret;
ret = regulator_bulk_enable(ADMV1014_NUM_REGULATORS, st->regulators);
- if (ret) {
- dev_err(&spi->dev, "Failed to enable regulators");
- return ret;
- }
+ if (ret)
+ return dev_err_probe(dev, ret,
+ "Failed to enable regulators");
- ret = devm_add_action_or_reset(&spi->dev, admv1014_reg_disable, st->regulators);
+ ret = devm_add_action_or_reset(dev, admv1014_reg_disable, st->regulators);
if (ret)
return ret;
@@ -626,16 +625,16 @@ static int admv1014_init(struct admv1014_state *st)
if (ret)
return ret;
- ret = devm_add_action_or_reset(&spi->dev, admv1014_clk_disable, st->clkin);
+ ret = devm_add_action_or_reset(dev, admv1014_clk_disable, st->clkin);
if (ret)
return ret;
st->nb.notifier_call = admv1014_freq_change;
- ret = devm_clk_notifier_register(&spi->dev, st->clkin, &st->nb);
+ ret = devm_clk_notifier_register(dev, st->clkin, &st->nb);
if (ret)
return ret;
- ret = devm_add_action_or_reset(&spi->dev, admv1014_powerdown, st);
+ ret = devm_add_action_or_reset(dev, admv1014_powerdown, st);
if (ret)
return ret;
@@ -643,55 +642,48 @@ static int admv1014_init(struct admv1014_state *st)
ret = __admv1014_spi_update_bits(st, ADMV1014_REG_SPI_CONTROL,
ADMV1014_SPI_SOFT_RESET_MSK,
FIELD_PREP(ADMV1014_SPI_SOFT_RESET_MSK, 1));
- if (ret) {
- dev_err(&spi->dev, "ADMV1014 SPI software reset failed.\n");
- return ret;
- }
+ if (ret)
+ return dev_err_probe(dev, ret,
+ "ADMV1014 software reset failed.\n");
ret = __admv1014_spi_update_bits(st, ADMV1014_REG_SPI_CONTROL,
ADMV1014_SPI_SOFT_RESET_MSK,
FIELD_PREP(ADMV1014_SPI_SOFT_RESET_MSK, 0));
- if (ret) {
- dev_err(&spi->dev, "ADMV1014 SPI software reset disable failed.\n");
- return ret;
- }
+ if (ret)
+ return dev_err_probe(dev, ret,
+ "ADMV1014 software reset disable failed.\n");
ret = __admv1014_spi_write(st, ADMV1014_REG_VVA_TEMP_COMP, 0x727C);
- if (ret) {
- dev_err(&spi->dev, "Writing default Temperature Compensation value failed.\n");
- return ret;
- }
+ if (ret)
+ return dev_err_probe(dev, ret,
+ "Writing default Temperature Compensation value failed.\n");
ret = __admv1014_spi_read(st, ADMV1014_REG_SPI_CONTROL, &chip_id);
if (ret)
return ret;
chip_id = FIELD_GET(ADMV1014_CHIP_ID_MSK, chip_id);
- if (chip_id != ADMV1014_CHIP_ID) {
- dev_err(&spi->dev, "Invalid Chip ID.\n");
- return -EINVAL;
- }
+ if (chip_id != ADMV1014_CHIP_ID)
+ return dev_err_probe(dev, -EINVAL,
+ "Invalid Chip ID.\n");
ret = __admv1014_spi_update_bits(st, ADMV1014_REG_QUAD,
ADMV1014_QUAD_SE_MODE_MSK,
FIELD_PREP(ADMV1014_QUAD_SE_MODE_MSK,
st->quad_se_mode));
- if (ret) {
- dev_err(&spi->dev, "Writing Quad SE Mode failed.\n");
- return ret;
- }
+ if (ret)
+ return dev_err_probe(dev, ret,
+ "Writing Quad SE Mode failed.\n");
ret = admv1014_update_quad_filters(st);
- if (ret) {
- dev_err(&spi->dev, "Update Quad Filters failed.\n");
- return ret;
- }
+ if (ret)
+ return dev_err_probe(dev, ret,
+ "Update Quad Filters failed.\n");
ret = admv1014_update_vcm_settings(st);
- if (ret) {
- dev_err(&spi->dev, "Update VCM Settings failed.\n");
- return ret;
- }
+ if (ret)
+ return dev_err_probe(dev, ret,
+ "Update VCM Settings failed.\n");
enable_reg_msk = ADMV1014_P1DB_COMPENSATION_MSK |
ADMV1014_IF_AMP_PD_MSK |
@@ -711,14 +703,14 @@ static int admv1014_init(struct admv1014_state *st)
static int admv1014_properties_parse(struct admv1014_state *st)
{
unsigned int i;
- struct spi_device *spi = st->spi;
+ struct device *dev = &st->spi->dev;
int ret;
- st->det_en = device_property_read_bool(&spi->dev, "adi,detector-enable");
+ st->det_en = device_property_read_bool(dev, "adi,detector-enable");
- st->p1db_comp = device_property_read_bool(&spi->dev, "adi,p1db-compensation-enable");
+ st->p1db_comp = device_property_read_bool(dev, "adi,p1db-compensation-enable");
- ret = device_property_match_property_string(&spi->dev, "adi,input-mode",
+ ret = device_property_match_property_string(dev, "adi,input-mode",
input_mode_names,
ARRAY_SIZE(input_mode_names));
if (ret >= 0)
@@ -726,7 +718,7 @@ static int admv1014_properties_parse(struct admv1014_state *st)
else
st->input_mode = ADMV1014_IQ_MODE;
- ret = device_property_match_property_string(&spi->dev, "adi,quad-se-mode",
+ ret = device_property_match_property_string(dev, "adi,quad-se-mode",
quad_se_mode_names,
ARRAY_SIZE(quad_se_mode_names));
if (ret >= 0)
@@ -737,16 +729,15 @@ static int admv1014_properties_parse(struct admv1014_state *st)
for (i = 0; i < ADMV1014_NUM_REGULATORS; ++i)
st->regulators[i].supply = admv1014_reg_name[i];
- ret = devm_regulator_bulk_get(&st->spi->dev, ADMV1014_NUM_REGULATORS,
+ ret = devm_regulator_bulk_get(dev, ADMV1014_NUM_REGULATORS,
st->regulators);
- if (ret) {
- dev_err(&spi->dev, "Failed to request regulators");
- return ret;
- }
+ if (ret)
+ return dev_err_probe(dev, ret,
+ "Failed to request regulators");
- st->clkin = devm_clk_get(&spi->dev, "lo_in");
+ st->clkin = devm_clk_get(dev, "lo_in");
if (IS_ERR(st->clkin))
- return dev_err_probe(&spi->dev, PTR_ERR(st->clkin),
+ return dev_err_probe(dev, PTR_ERR(st->clkin),
"failed to get the LO input clock\n");
return 0;
@@ -756,9 +747,10 @@ static int admv1014_probe(struct spi_device *spi)
{
struct iio_dev *indio_dev;
struct admv1014_state *st;
+ struct device *dev = &spi->dev;
int ret;
- indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
+ indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
if (!indio_dev)
return -ENOMEM;
@@ -787,7 +779,7 @@ static int admv1014_probe(struct spi_device *spi)
if (ret)
return ret;
- return devm_iio_device_register(&spi->dev, indio_dev);
+ return devm_iio_device_register(dev, indio_dev);
}
static const struct spi_device_id admv1014_id[] = {
--
2.43.0 | {
"author": "Antoniu Miclaus <antoniu.miclaus@analog.com>",
"date": "Wed, 25 Feb 2026 17:05:48 +0200",
"is_openbsd": false,
"thread_id": "aaGuzkHk6kCkcyiz@ashevche-desk.local.mbox.gz"
} |
lkml_critique | lkml | Use dev_err_probe() consistently in the probe path of several ADI IIO
drivers. This simplifies error handling and ensures proper logging of
deferred probes.
Each driver is updated by introducing a local struct device variable to
simplify repeated &spi->dev / &client->dev references, and converting
error paths to use dev_err_probe().
Drivers updated:
- adrf6780
- admv1014
- admv1013
- adf4377
- ad7293
- admv8818
Changes in v3:
- Squash the struct device variable introduction and dev_err_probe()
conversion into a single patch per driver.
Antoniu Miclaus (6):
iio: frequency: adrf6780: add dev variable and use dev_err_probe
iio: frequency: admv1014: add dev variable and use dev_err_probe
iio: frequency: admv1013: add dev variable and use dev_err_probe
iio: frequency: adf4377: add dev variable and use dev_err_probe
iio: dac: ad7293: add dev variable and use dev_err_probe
iio: filter: admv8818: add dev variable and use dev_err_probe
drivers/iio/dac/ad7293.c | 32 +++++------
drivers/iio/filter/admv8818.c | 61 ++++++++++-----------
drivers/iio/frequency/adf4377.c | 57 +++++++++----------
drivers/iio/frequency/admv1013.c | 51 ++++++++---------
drivers/iio/frequency/admv1014.c | 94 +++++++++++++++-----------------
drivers/iio/frequency/adrf6780.c | 60 ++++++++++----------
6 files changed, 168 insertions(+), 187 deletions(-)
--
2.43.0
| null | null | null | [PATCH v3 0/6] iio: use dev_err_probe in probe path for ADI drivers | Introduce a struct device *dev local variable and replace dev_err() +
return with dev_err_probe() in functions that use devm_ managed
resources. This simplifies error handling and ensures proper logging
of deferred probes.
Drop 'SPI' from error messages since the bus type is evident from
the device hierarchy.
Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
---
drivers/iio/frequency/adrf6780.c | 60 +++++++++++++++-----------------
1 file changed, 29 insertions(+), 31 deletions(-)
diff --git a/drivers/iio/frequency/adrf6780.c b/drivers/iio/frequency/adrf6780.c
index a7a21f929970..be8838ab10fb 100644
--- a/drivers/iio/frequency/adrf6780.c
+++ b/drivers/iio/frequency/adrf6780.c
@@ -346,23 +346,21 @@ static const struct iio_chan_spec adrf6780_channels[] = {
static int adrf6780_reset(struct adrf6780_state *st)
{
int ret;
- struct spi_device *spi = st->spi;
+ struct device *dev = &st->spi->dev;
ret = __adrf6780_spi_update_bits(st, ADRF6780_REG_CONTROL,
ADRF6780_SOFT_RESET_MSK,
FIELD_PREP(ADRF6780_SOFT_RESET_MSK, 1));
- if (ret) {
- dev_err(&spi->dev, "ADRF6780 SPI software reset failed.\n");
- return ret;
- }
+ if (ret)
+ return dev_err_probe(dev, ret,
+ "ADRF6780 software reset failed.\n");
ret = __adrf6780_spi_update_bits(st, ADRF6780_REG_CONTROL,
ADRF6780_SOFT_RESET_MSK,
FIELD_PREP(ADRF6780_SOFT_RESET_MSK, 0));
- if (ret) {
- dev_err(&spi->dev, "ADRF6780 SPI software reset disable failed.\n");
- return ret;
- }
+ if (ret)
+ return dev_err_probe(dev, ret,
+ "ADRF6780 software reset disable failed.\n");
return 0;
}
@@ -371,7 +369,7 @@ static int adrf6780_init(struct adrf6780_state *st)
{
int ret;
unsigned int chip_id, enable_reg, enable_reg_msk;
- struct spi_device *spi = st->spi;
+ struct device *dev = &st->spi->dev;
/* Perform a software reset */
ret = adrf6780_reset(st);
@@ -383,10 +381,9 @@ static int adrf6780_init(struct adrf6780_state *st)
return ret;
chip_id = FIELD_GET(ADRF6780_CHIP_ID_MSK, chip_id);
- if (chip_id != ADRF6780_CHIP_ID) {
- dev_err(&spi->dev, "ADRF6780 Invalid Chip ID.\n");
- return -EINVAL;
- }
+ if (chip_id != ADRF6780_CHIP_ID)
+ return dev_err_probe(dev, -EINVAL,
+ "ADRF6780 Invalid Chip ID.\n");
enable_reg_msk = ADRF6780_VGA_BUFFER_EN_MSK |
ADRF6780_DETECTOR_EN_MSK |
@@ -426,18 +423,18 @@ static int adrf6780_init(struct adrf6780_state *st)
static void adrf6780_properties_parse(struct adrf6780_state *st)
{
- struct spi_device *spi = st->spi;
-
- st->vga_buff_en = device_property_read_bool(&spi->dev, "adi,vga-buff-en");
- st->lo_buff_en = device_property_read_bool(&spi->dev, "adi,lo-buff-en");
- st->if_mode_en = device_property_read_bool(&spi->dev, "adi,if-mode-en");
- st->iq_mode_en = device_property_read_bool(&spi->dev, "adi,iq-mode-en");
- st->lo_x2_en = device_property_read_bool(&spi->dev, "adi,lo-x2-en");
- st->lo_ppf_en = device_property_read_bool(&spi->dev, "adi,lo-ppf-en");
- st->lo_en = device_property_read_bool(&spi->dev, "adi,lo-en");
- st->uc_bias_en = device_property_read_bool(&spi->dev, "adi,uc-bias-en");
- st->lo_sideband = device_property_read_bool(&spi->dev, "adi,lo-sideband");
- st->vdet_out_en = device_property_read_bool(&spi->dev, "adi,vdet-out-en");
+ struct device *dev = &st->spi->dev;
+
+ st->vga_buff_en = device_property_read_bool(dev, "adi,vga-buff-en");
+ st->lo_buff_en = device_property_read_bool(dev, "adi,lo-buff-en");
+ st->if_mode_en = device_property_read_bool(dev, "adi,if-mode-en");
+ st->iq_mode_en = device_property_read_bool(dev, "adi,iq-mode-en");
+ st->lo_x2_en = device_property_read_bool(dev, "adi,lo-x2-en");
+ st->lo_ppf_en = device_property_read_bool(dev, "adi,lo-ppf-en");
+ st->lo_en = device_property_read_bool(dev, "adi,lo-en");
+ st->uc_bias_en = device_property_read_bool(dev, "adi,uc-bias-en");
+ st->lo_sideband = device_property_read_bool(dev, "adi,lo-sideband");
+ st->vdet_out_en = device_property_read_bool(dev, "adi,vdet-out-en");
}
static void adrf6780_powerdown(void *data)
@@ -450,9 +447,10 @@ static int adrf6780_probe(struct spi_device *spi)
{
struct iio_dev *indio_dev;
struct adrf6780_state *st;
+ struct device *dev = &spi->dev;
int ret;
- indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
+ indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
if (!indio_dev)
return -ENOMEM;
@@ -467,9 +465,9 @@ static int adrf6780_probe(struct spi_device *spi)
adrf6780_properties_parse(st);
- st->clkin = devm_clk_get_enabled(&spi->dev, "lo_in");
+ st->clkin = devm_clk_get_enabled(dev, "lo_in");
if (IS_ERR(st->clkin))
- return dev_err_probe(&spi->dev, PTR_ERR(st->clkin),
+ return dev_err_probe(dev, PTR_ERR(st->clkin),
"failed to get the LO input clock\n");
mutex_init(&st->lock);
@@ -478,11 +476,11 @@ static int adrf6780_probe(struct spi_device *spi)
if (ret)
return ret;
- ret = devm_add_action_or_reset(&spi->dev, adrf6780_powerdown, st);
+ ret = devm_add_action_or_reset(dev, adrf6780_powerdown, st);
if (ret)
return ret;
- return devm_iio_device_register(&spi->dev, indio_dev);
+ return devm_iio_device_register(dev, indio_dev);
}
static const struct spi_device_id adrf6780_id[] = {
--
2.43.0 | {
"author": "Antoniu Miclaus <antoniu.miclaus@analog.com>",
"date": "Wed, 25 Feb 2026 17:05:47 +0200",
"is_openbsd": false,
"thread_id": "aaGuzkHk6kCkcyiz@ashevche-desk.local.mbox.gz"
} |
lkml_critique | lkml | Use dev_err_probe() consistently in the probe path of several ADI IIO
drivers. This simplifies error handling and ensures proper logging of
deferred probes.
Each driver is updated by introducing a local struct device variable to
simplify repeated &spi->dev / &client->dev references, and converting
error paths to use dev_err_probe().
Drivers updated:
- adrf6780
- admv1014
- admv1013
- adf4377
- ad7293
- admv8818
Changes in v3:
- Squash the struct device variable introduction and dev_err_probe()
conversion into a single patch per driver.
Antoniu Miclaus (6):
iio: frequency: adrf6780: add dev variable and use dev_err_probe
iio: frequency: admv1014: add dev variable and use dev_err_probe
iio: frequency: admv1013: add dev variable and use dev_err_probe
iio: frequency: adf4377: add dev variable and use dev_err_probe
iio: dac: ad7293: add dev variable and use dev_err_probe
iio: filter: admv8818: add dev variable and use dev_err_probe
drivers/iio/dac/ad7293.c | 32 +++++------
drivers/iio/filter/admv8818.c | 61 ++++++++++-----------
drivers/iio/frequency/adf4377.c | 57 +++++++++----------
drivers/iio/frequency/admv1013.c | 51 ++++++++---------
drivers/iio/frequency/admv1014.c | 94 +++++++++++++++-----------------
drivers/iio/frequency/adrf6780.c | 60 ++++++++++----------
6 files changed, 168 insertions(+), 187 deletions(-)
--
2.43.0
| null | null | null | [PATCH v3 0/6] iio: use dev_err_probe in probe path for ADI drivers | Introduce a struct device *dev local variable and replace dev_err() +
return with dev_err_probe() in functions that use devm_ managed
resources. This simplifies error handling and ensures proper logging
of deferred probes.
Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
---
drivers/iio/filter/admv8818.c | 61 +++++++++++++++++------------------
1 file changed, 29 insertions(+), 32 deletions(-)
diff --git a/drivers/iio/filter/admv8818.c b/drivers/iio/filter/admv8818.c
index 19f823446cda..a4c127d12882 100644
--- a/drivers/iio/filter/admv8818.c
+++ b/drivers/iio/filter/admv8818.c
@@ -657,41 +657,36 @@ static void admv8818_clk_disable(void *data)
static int admv8818_init(struct admv8818_state *st)
{
int ret;
- struct spi_device *spi = st->spi;
+ struct device *dev = &st->spi->dev;
unsigned int chip_id;
ret = regmap_write(st->regmap, ADMV8818_REG_SPI_CONFIG_A,
ADMV8818_SOFTRESET_N_MSK | ADMV8818_SOFTRESET_MSK);
- if (ret) {
- dev_err(&spi->dev, "ADMV8818 Soft Reset failed.\n");
- return ret;
- }
+ if (ret)
+ return dev_err_probe(dev, ret,
+ "ADMV8818 Soft Reset failed.\n");
ret = regmap_write(st->regmap, ADMV8818_REG_SPI_CONFIG_A,
ADMV8818_SDOACTIVE_N_MSK | ADMV8818_SDOACTIVE_MSK);
- if (ret) {
- dev_err(&spi->dev, "ADMV8818 SDO Enable failed.\n");
- return ret;
- }
+ if (ret)
+ return dev_err_probe(dev, ret,
+ "ADMV8818 SDO Enable failed.\n");
ret = regmap_read(st->regmap, ADMV8818_REG_CHIPTYPE, &chip_id);
- if (ret) {
- dev_err(&spi->dev, "ADMV8818 Chip ID read failed.\n");
- return ret;
- }
+ if (ret)
+ return dev_err_probe(dev, ret,
+ "ADMV8818 Chip ID read failed.\n");
- if (chip_id != 0x1) {
- dev_err(&spi->dev, "ADMV8818 Invalid Chip ID.\n");
- return -EINVAL;
- }
+ if (chip_id != 0x1)
+ return dev_err_probe(dev, -EINVAL,
+ "ADMV8818 Invalid Chip ID.\n");
ret = regmap_update_bits(st->regmap, ADMV8818_REG_SPI_CONFIG_B,
ADMV8818_SINGLE_INSTRUCTION_MSK,
FIELD_PREP(ADMV8818_SINGLE_INSTRUCTION_MSK, 1));
- if (ret) {
- dev_err(&spi->dev, "ADMV8818 Single Instruction failed.\n");
- return ret;
- }
+ if (ret)
+ return dev_err_probe(dev, ret,
+ "ADMV8818 Single Instruction failed.\n");
if (st->clkin)
return admv8818_rfin_band_select(st);
@@ -701,12 +696,12 @@ static int admv8818_init(struct admv8818_state *st)
static int admv8818_clk_setup(struct admv8818_state *st)
{
- struct spi_device *spi = st->spi;
+ struct device *dev = &st->spi->dev;
int ret;
- st->clkin = devm_clk_get_optional(&spi->dev, "rf_in");
+ st->clkin = devm_clk_get_optional(dev, "rf_in");
if (IS_ERR(st->clkin))
- return dev_err_probe(&spi->dev, PTR_ERR(st->clkin),
+ return dev_err_probe(dev, PTR_ERR(st->clkin),
"failed to get the input clock\n");
else if (!st->clkin)
return 0;
@@ -715,7 +710,7 @@ static int admv8818_clk_setup(struct admv8818_state *st)
if (ret)
return ret;
- ret = devm_add_action_or_reset(&spi->dev, admv8818_clk_disable, st);
+ ret = devm_add_action_or_reset(dev, admv8818_clk_disable, st);
if (ret)
return ret;
@@ -724,16 +719,16 @@ static int admv8818_clk_setup(struct admv8818_state *st)
if (ret < 0)
return ret;
- return devm_add_action_or_reset(&spi->dev, admv8818_clk_notifier_unreg, st);
+ return devm_add_action_or_reset(dev, admv8818_clk_notifier_unreg, st);
}
static int admv8818_read_properties(struct admv8818_state *st)
{
- struct spi_device *spi = st->spi;
+ struct device *dev = &st->spi->dev;
u32 mhz;
int ret;
- ret = device_property_read_u32(&spi->dev, "adi,lpf-margin-mhz", &mhz);
+ ret = device_property_read_u32(dev, "adi,lpf-margin-mhz", &mhz);
if (ret == 0)
st->lpf_margin_hz = (u64)mhz * HZ_PER_MHZ;
else if (ret == -EINVAL)
@@ -742,7 +737,7 @@ static int admv8818_read_properties(struct admv8818_state *st)
return ret;
- ret = device_property_read_u32(&spi->dev, "adi,hpf-margin-mhz", &mhz);
+ ret = device_property_read_u32(dev, "adi,hpf-margin-mhz", &mhz);
if (ret == 0)
st->hpf_margin_hz = (u64)mhz * HZ_PER_MHZ;
else if (ret == -EINVAL)
@@ -758,15 +753,17 @@ static int admv8818_probe(struct spi_device *spi)
struct iio_dev *indio_dev;
struct regmap *regmap;
struct admv8818_state *st;
+ struct device *dev = &spi->dev;
int ret;
- indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
+ indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
if (!indio_dev)
return -ENOMEM;
regmap = devm_regmap_init_spi(spi, &admv8818_regmap_config);
if (IS_ERR(regmap))
- return PTR_ERR(regmap);
+ return dev_err_probe(dev, PTR_ERR(regmap),
+ "Failed to initialize regmap\n");
st = iio_priv(indio_dev);
st->regmap = regmap;
@@ -792,7 +789,7 @@ static int admv8818_probe(struct spi_device *spi)
if (ret)
return ret;
- return devm_iio_device_register(&spi->dev, indio_dev);
+ return devm_iio_device_register(dev, indio_dev);
}
static const struct spi_device_id admv8818_id[] = {
--
2.43.0 | {
"author": "Antoniu Miclaus <antoniu.miclaus@analog.com>",
"date": "Wed, 25 Feb 2026 17:05:52 +0200",
"is_openbsd": false,
"thread_id": "aaGuzkHk6kCkcyiz@ashevche-desk.local.mbox.gz"
} |
lkml_critique | lkml | Use dev_err_probe() consistently in the probe path of several ADI IIO
drivers. This simplifies error handling and ensures proper logging of
deferred probes.
Each driver is updated by introducing a local struct device variable to
simplify repeated &spi->dev / &client->dev references, and converting
error paths to use dev_err_probe().
Drivers updated:
- adrf6780
- admv1014
- admv1013
- adf4377
- ad7293
- admv8818
Changes in v3:
- Squash the struct device variable introduction and dev_err_probe()
conversion into a single patch per driver.
Antoniu Miclaus (6):
iio: frequency: adrf6780: add dev variable and use dev_err_probe
iio: frequency: admv1014: add dev variable and use dev_err_probe
iio: frequency: admv1013: add dev variable and use dev_err_probe
iio: frequency: adf4377: add dev variable and use dev_err_probe
iio: dac: ad7293: add dev variable and use dev_err_probe
iio: filter: admv8818: add dev variable and use dev_err_probe
drivers/iio/dac/ad7293.c | 32 +++++------
drivers/iio/filter/admv8818.c | 61 ++++++++++-----------
drivers/iio/frequency/adf4377.c | 57 +++++++++----------
drivers/iio/frequency/admv1013.c | 51 ++++++++---------
drivers/iio/frequency/admv1014.c | 94 +++++++++++++++-----------------
drivers/iio/frequency/adrf6780.c | 60 ++++++++++----------
6 files changed, 168 insertions(+), 187 deletions(-)
--
2.43.0
| null | null | null | [PATCH v3 0/6] iio: use dev_err_probe in probe path for ADI drivers | On Wed, Feb 25, 2026 at 05:05:46PM +0200, Antoniu Miclaus wrote:
Why? Maybe my comment was unclear previous time.
The idea is to convert to short dev the only lines that are not being touched
by the second (dev_err_probe() conversion) patch.
--
With Best Regards,
Andy Shevchenko | {
"author": "Andy Shevchenko <andriy.shevchenko@intel.com>",
"date": "Wed, 25 Feb 2026 18:15:04 +0200",
"is_openbsd": false,
"thread_id": "aaGuzkHk6kCkcyiz@ashevche-desk.local.mbox.gz"
} |
lkml_critique | lkml | Use dev_err_probe() consistently in the probe path of several ADI IIO
drivers. This simplifies error handling and ensures proper logging of
deferred probes.
Each driver is updated by introducing a local struct device variable to
simplify repeated &spi->dev / &client->dev references, and converting
error paths to use dev_err_probe().
Drivers updated:
- adrf6780
- admv1014
- admv1013
- adf4377
- ad7293
- admv8818
Changes in v3:
- Squash the struct device variable introduction and dev_err_probe()
conversion into a single patch per driver.
Antoniu Miclaus (6):
iio: frequency: adrf6780: add dev variable and use dev_err_probe
iio: frequency: admv1014: add dev variable and use dev_err_probe
iio: frequency: admv1013: add dev variable and use dev_err_probe
iio: frequency: adf4377: add dev variable and use dev_err_probe
iio: dac: ad7293: add dev variable and use dev_err_probe
iio: filter: admv8818: add dev variable and use dev_err_probe
drivers/iio/dac/ad7293.c | 32 +++++------
drivers/iio/filter/admv8818.c | 61 ++++++++++-----------
drivers/iio/frequency/adf4377.c | 57 +++++++++----------
drivers/iio/frequency/admv1013.c | 51 ++++++++---------
drivers/iio/frequency/admv1014.c | 94 +++++++++++++++-----------------
drivers/iio/frequency/adrf6780.c | 60 ++++++++++----------
6 files changed, 168 insertions(+), 187 deletions(-)
--
2.43.0
| null | null | null | [PATCH v3 0/6] iio: use dev_err_probe in probe path for ADI drivers | --
Antoniu Miclu
Sure, so for the function which use dev only for the dev errors I introduce the struct device *dev = &spi->dev; in the dev_error_probe patch? | {
"author": "\"Miclaus, Antoniu\" <Antoniu.Miclaus@analog.com>",
"date": "Fri, 27 Feb 2026 11:23:10 +0000",
"is_openbsd": false,
"thread_id": "aaGuzkHk6kCkcyiz@ashevche-desk.local.mbox.gz"
} |
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