repo_id string | size int64 | file_path string | content string |
|---|---|---|---|
jason-hue/RustOs | 676 | os/src/task/switch.S | .altmacro
.macro SAVE_SN n
sd s\n, (\n+2)*8(a0)
.endm
.macro LOAD_SN n
ld s\n, (\n+2)*8(a1)
.endm
.section .text
.globl __switch
__switch:
# __switch(
# current_task_cx_ptr: *mut TaskContext,
# next_task_cx_ptr: *const TaskContext
# )
# save kernel stack of current task
s... |
jason-hue/RustOs | 1,640 | os/src/trap/trap.S | .altmacro
.macro SAVE_GP n
sd x\n, \n*8(sp)
.endm
.macro LOAD_GP n
ld x\n, \n*8(sp)
.endm
.section .text.trampoline
.globl __alltraps
.globl __restore
.align 2
__alltraps:
csrrw sp, sscratch, sp
# now sp->*TrapContext in user space, sscratch->user stack
# save other general purpose r... |
Jaxtonmax/hvisor_pro | 2,945 | src/arch/riscv64/trap.S | // Copyright (c) 2025 Syswonder
// hvisor is licensed under Mulan PSL v2.
// You can use this software according to the terms and conditions of the Mulan PSL v2.
// You may obtain a copy of Mulan PSL v2 at:
// http://license.coscl.org.cn/MulanPSL2
// THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES... |
Jaxtonmax/hvisor_pro | 1,739 | src/arch/aarch64/trap.S | // Copyright (c) 2025 Syswonder
// hvisor is licensed under Mulan PSL v2.
// You can use this software according to the terms and conditions of the Mulan PSL v2.
// You may obtain a copy of Mulan PSL v2 at:
// http://license.coscl.org.cn/MulanPSL2
// THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES... |
Jaxtonmax/hvisor_pro | 2,272 | src/device/uart/loongson_uart/uart0.S | // This file is forked from uboot's source code for booting 2K1000.
// Note: the Address mapping window setting up already.
// so, use the Mapped address 0x8xxx... or 0x9xxx...
/*
* Simple character printing routine used before full initialization
*/
.globl uart0_init
uart0_init:
or $a4, $ra, $zero
li.... |
Jaxtonmax/hvisor_pro | 2,272 | src/device/uart/loongson_uart/uart1.S | // This file is forked from uboot's source code for booting 2K1000.
// Note: the Address mapping window setting up already.
// so, use the Mapped address 0x8xxx... or 0x9xxx...
/*
* Simple character printing routine used before full initialization
*/
.globl uart1_init
uart1_init:
or $a4, $ra, $zero
li.... |
jaysalomon/LOOM | 5,764 | src/isa/loom_asm.s | @ Loom Assembly Language
@ Direct topological operations on unified memory
@ Target: ARM64/Apple Silicon M-series
.text
.align 4
.global _loom_init
.global _loom_weave_bidirectional
.global _loom_hebbian_step
.global _loom_evolve_topology
@ Constants for node vector layout
.equ NODE_SIZE, 256
.equ NODE_BYTES, 1024 ... |
JensLiu/derek-core | 297 | kernel/src/asm/macros.S | # macro for indexing into the corresponsing x-`i` registers
# into the TRAPFRAME pointed by `base`
.altmacro # otherwise `SAVE_USER_REG %i, sp` won't work, it expands to `%i` not the value
.macro SAVE_USER_REG i, dest
sd x\i, \dest
.endm
.macro LOAD_USER_REG i, dest
ld x\i, \dest
.endm |
JensLiu/derek-core | 2,240 | kernel/src/asm/kernelvec.S | # the interrupt handlers in M-mode
#include "macros.S"
.global __kernelvec
.align 4
__kernelvec:
# since we are not swtiching stack, it is easier to store registers on the kernel stack
# the ides here is to fake a function call in S-mode
# as usual, we are storing the context for user registers
... |
JensLiu/derek-core | 4,614 | kernel/src/asm/trampoline.S | .section .text.trampoline
.global __uservec
.global __userret
#include "macros.S"
# by now, RISC-V has already done its trap handling routine:
# FOR NONE DEVICE INTERRUPT
# - disable interrupt: clear sstatus.SIE (Supervisor Interrupt Enabled bit)
# - save pc in sepc
# - save current mode (U/S) in sstatus.SPP ... |
JensLiu/derek-core | 544 | kernel/src/asm/boot.S | # Define a .text.init section.
.section .text.init
.global _start
.global __kernel_stack_start
.global kstart
# Execution starts here.
_start:
# initialise .bss section with 0's
la a0, __bss_start
la a1, __bss_end
bgeu a0, a1, 2f
1:
sd zero, (a0)
addi a0, a0, 8
bltu a0, a1, 1b
2:
# Allocate stack for each... |
JensLiu/derek-core | 425 | user/src/initcode.S | # Initial process execs /init.
# This code runs in user space.
#include "syscall.h"
# exec(init, argv)
.globl start
start:
la a0, init
la a1, 5
la a2, argv
li a7, SYS_exec
ecall
# for(;;) exit();
exit:
li a7, SYS_exit
ecall
jal exit
# char init[] = "/i... |
JensenWei007/rCore-OS-2024Summer | 1,771 | async/async2/modules/axhal/linker.lds.S | OUTPUT_ARCH(%ARCH%)
BASE_ADDRESS = %KERNEL_BASE%;
ENTRY(_start)
SECTIONS
{
. = BASE_ADDRESS;
_skernel = .;
.text : ALIGN(4K) {
_stext = .;
*(.text.boot)
. = ALIGN(4K);
*(.text.signal_trampoline)
. = ALIGN(4K);
*(.text .text.*)
. = ALIGN(4K);
... |
JensenWei007/rCore-OS-2024Summer | 210 | async/async2/modules/axhal/src/arch/riscv/signal.S | # To create the sigreturn trampoline
.equ __NR_sigreturn, 139
.section .text.signal_trampoline
.balign 4
.global start_signal_trampoline
start_signal_trampoline:
li a7, __NR_sigreturn
li a0, 0
ecall |
JensenWei007/rCore-OS-2024Summer | 223 | async/async2/modules/axhal/src/arch/aarch64/signal.S | # To create the sigreturn trampoline
.equ __NR_sigreturn, 139
.section .text.signal_trampoline
.balign 4
.global start_signal_trampoline
start_signal_trampoline:
mov x8, #139 // 设置系统调用号为 139
svc #0 // 触发系统调用 |
JensenWei007/rCore-OS-2024Summer | 190 | async/async2/modules/axhal/src/arch/x86_64/signal.S | # To create the sigreturn trampoline
.section .text.signal_trampoline
.code64
.global start_signal_trampoline
start_signal_trampoline:
# syscall id rdi = 15
mov rax, 0xf
syscall |
JensenWei007/rCore-OS-2024Summer | 4,307 | async/async2/modules/axhal/src/platform/x86_pc/multiboot.S | # Bootstrapping from 32-bit with the Multiboot specification.
# See https://www.gnu.org/software/grub/manual/multiboot/multiboot.html
.section .text.boot
.code32
.global _start
_start:
mov edi, eax # arg1: magic: 0x2BADB002
mov esi, ebx # arg2: multiboot info
jmp bsp_entry32
.bal... |
JensenWei007/rCore-OS-2024Summer | 3,028 | async/async2/modules/axtrap/src/arch/riscv/trap.S | .macro SAVE_REGS
addi sp, sp, -{trapframe_size}
PUSH_GENERAL_REGS
.endm
.macro RESTORE_REGS
POP_GENERAL_REGS
addi sp, sp, {trapframe_size}
.endm
.section .text
.balign 4
.global __trap_from_user
__trap_from_user:
csrrw sp, sscratch, sp // switch sscratch and sp
# now sp->*Tr... |
JensenWei007/rCore-OS-2024Summer | 4,138 | async/async2/modules/axtrap/src/arch/aarch64/trap.S | .macro clear_gp_regs
.irp n,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29
mov x\n, xzr
.endr
.endm
.macro SAVE_REGS, el
stp x0, x1, [sp]
stp x2, x3, [sp, 2 * 8]
stp x4, x5, [sp, 4 * 8]
stp x6, x7, [sp, 6 * 8]
stp x8, x9, [sp, 8 * 8]
... |
JensenWei007/rCore-OS-2024Summer | 1,201 | async/async2/modules/axtrap/src/arch/x86_64/syscall.S | .section .text
syscall_entry:
swapgs
# The user rsp and kernel rsp are defined in axhal
mov gs:[offset __PERCPU_USER_RSP_OFFSET], rsp
mov rsp, gs:[offset __PERCPU_KERNEL_RSP_OFFSET]
sub rsp, 8 // skip user_ss
push gs:[offset __PERCPU_USER_RSP_OFFSET] // u... |
JensenWei007/rCore-OS-2024Summer | 1,505 | async/async2/modules/axtrap/src/arch/x86_64/trap.S | .equ NUM_INT, 256
.altmacro
.macro DEF_HANDLER, i
.Ltrap_handler_\i:
.if \i == 8 || (\i >= 10 && \i <= 14) || \i == 17
# error code pushed by CPU
push \i # interrupt vector
jmp .Ltrap_common
.else
push 0 # fill in error code in TrapFrame
push \i # interrupt ... |
JensenWei007/rCore-OS-2024Summer | 1,965 | async/async2/crates/arch_boot/src/platform/x86_pc/ap_start.S | # Boot application processors into the protected mode.
# Each non-boot CPU ("AP") is started up in response to a STARTUP
# IPI from the boot CPU. Section B.4.2 of the Multi-Processor
# Specification says that the AP will start in real mode with CS:IP
# set to XY00:0000, where XY is an 8-bit value sent with the
# STAR... |
JensenWei007/rCore-OS-2024Summer | 4,307 | async/async2/crates/arch_boot/src/platform/x86_pc/multiboot.S | # Bootstrapping from 32-bit with the Multiboot specification.
# See https://www.gnu.org/software/grub/manual/multiboot/multiboot.html
.section .text.boot
.code32
.global _start
_start:
mov edi, eax # arg1: magic: 0x2BADB002
mov esi, ebx # arg2: multiboot info
jmp bsp_entry32
.bal... |
JensenWei007/rCore-OS-2024Summer | 1,771 | async/async/modules/axhal/linker.lds.S | OUTPUT_ARCH(%ARCH%)
BASE_ADDRESS = %KERNEL_BASE%;
ENTRY(_start)
SECTIONS
{
. = BASE_ADDRESS;
_skernel = .;
.text : ALIGN(4K) {
_stext = .;
*(.text.boot)
. = ALIGN(4K);
*(.text.signal_trampoline)
. = ALIGN(4K);
*(.text .text.*)
. = ALIGN(4K);
... |
JensenWei007/rCore-OS-2024Summer | 210 | async/async/modules/axhal/src/arch/riscv/signal.S | # To create the sigreturn trampoline
.equ __NR_sigreturn, 139
.section .text.signal_trampoline
.balign 4
.global start_signal_trampoline
start_signal_trampoline:
li a7, __NR_sigreturn
li a0, 0
ecall |
JensenWei007/rCore-OS-2024Summer | 223 | async/async/modules/axhal/src/arch/aarch64/signal.S | # To create the sigreturn trampoline
.equ __NR_sigreturn, 139
.section .text.signal_trampoline
.balign 4
.global start_signal_trampoline
start_signal_trampoline:
mov x8, #139 // 设置系统调用号为 139
svc #0 // 触发系统调用 |
JensenWei007/rCore-OS-2024Summer | 190 | async/async/modules/axhal/src/arch/x86_64/signal.S | # To create the sigreturn trampoline
.section .text.signal_trampoline
.code64
.global start_signal_trampoline
start_signal_trampoline:
# syscall id rdi = 15
mov rax, 0xf
syscall |
JensenWei007/rCore-OS-2024Summer | 4,307 | async/async/modules/axhal/src/platform/x86_pc/multiboot.S | # Bootstrapping from 32-bit with the Multiboot specification.
# See https://www.gnu.org/software/grub/manual/multiboot/multiboot.html
.section .text.boot
.code32
.global _start
_start:
mov edi, eax # arg1: magic: 0x2BADB002
mov esi, ebx # arg2: multiboot info
jmp bsp_entry32
.bal... |
JensenWei007/rCore-OS-2024Summer | 3,027 | async/async/modules/axtrap/src/arch/riscv/trap.S | .macro SAVE_REGS
addi sp, sp, -{trapframe_size}
PUSH_GENERAL_REGS
.endm
.macro RESTORE_REGS
POP_GENERAL_REGS
addi sp, sp, {trapframe_size}
.endm
.section .text
.balign 4
.global __trap_from_user
__trap_from_user:
csrrw sp, sscratch, sp // switch sscratch and sp
# now sp->*Tr... |
JensenWei007/rCore-OS-2024Summer | 4,138 | async/async/modules/axtrap/src/arch/aarch64/trap.S | .macro clear_gp_regs
.irp n,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29
mov x\n, xzr
.endr
.endm
.macro SAVE_REGS, el
stp x0, x1, [sp]
stp x2, x3, [sp, 2 * 8]
stp x4, x5, [sp, 4 * 8]
stp x6, x7, [sp, 6 * 8]
stp x8, x9, [sp, 8 * 8]
... |
JensenWei007/rCore-OS-2024Summer | 1,201 | async/async/modules/axtrap/src/arch/x86_64/syscall.S | .section .text
syscall_entry:
swapgs
# The user rsp and kernel rsp are defined in axhal
mov gs:[offset __PERCPU_USER_RSP_OFFSET], rsp
mov rsp, gs:[offset __PERCPU_KERNEL_RSP_OFFSET]
sub rsp, 8 // skip user_ss
push gs:[offset __PERCPU_USER_RSP_OFFSET] // u... |
JensenWei007/rCore-OS-2024Summer | 1,505 | async/async/modules/axtrap/src/arch/x86_64/trap.S | .equ NUM_INT, 256
.altmacro
.macro DEF_HANDLER, i
.Ltrap_handler_\i:
.if \i == 8 || (\i >= 10 && \i <= 14) || \i == 17
# error code pushed by CPU
push \i # interrupt vector
jmp .Ltrap_common
.else
push 0 # fill in error code in TrapFrame
push \i # interrupt ... |
JensenWei007/rCore-OS-2024Summer | 1,965 | async/async/crates/arch_boot/src/platform/x86_pc/ap_start.S | # Boot application processors into the protected mode.
# Each non-boot CPU ("AP") is started up in response to a STARTUP
# IPI from the boot CPU. Section B.4.2 of the Multi-Processor
# Specification says that the AP will start in real mode with CS:IP
# set to XY00:0000, where XY is an 8-bit value sent with the
# STAR... |
JensenWei007/rCore-OS-2024Summer | 4,307 | async/async/crates/arch_boot/src/platform/x86_pc/multiboot.S | # Bootstrapping from 32-bit with the Multiboot specification.
# See https://www.gnu.org/software/grub/manual/multiboot/multiboot.html
.section .text.boot
.code32
.global _start
_start:
mov edi, eax # arg1: magic: 0x2BADB002
mov esi, ebx # arg2: multiboot info
jmp bsp_entry32
.bal... |
JensenWei007/rCore-OS-2024Summer | 1,771 | async/sync/modules/axhal/linker.lds.S | OUTPUT_ARCH(%ARCH%)
BASE_ADDRESS = %KERNEL_BASE%;
ENTRY(_start)
SECTIONS
{
. = BASE_ADDRESS;
_skernel = .;
.text : ALIGN(4K) {
_stext = .;
*(.text.boot)
. = ALIGN(4K);
*(.text.signal_trampoline)
. = ALIGN(4K);
*(.text .text.*)
. = ALIGN(4K);
... |
JensenWei007/rCore-OS-2024Summer | 210 | async/sync/modules/axhal/src/arch/riscv/signal.S | # To create the sigreturn trampoline
.equ __NR_sigreturn, 139
.section .text.signal_trampoline
.balign 4
.global start_signal_trampoline
start_signal_trampoline:
li a7, __NR_sigreturn
li a0, 0
ecall |
JensenWei007/rCore-OS-2024Summer | 223 | async/sync/modules/axhal/src/arch/aarch64/signal.S | # To create the sigreturn trampoline
.equ __NR_sigreturn, 139
.section .text.signal_trampoline
.balign 4
.global start_signal_trampoline
start_signal_trampoline:
mov x8, #139 // 设置系统调用号为 139
svc #0 // 触发系统调用 |
JensenWei007/rCore-OS-2024Summer | 190 | async/sync/modules/axhal/src/arch/x86_64/signal.S | # To create the sigreturn trampoline
.section .text.signal_trampoline
.code64
.global start_signal_trampoline
start_signal_trampoline:
# syscall id rdi = 15
mov rax, 0xf
syscall |
JensenWei007/rCore-OS-2024Summer | 4,307 | async/sync/modules/axhal/src/platform/x86_pc/multiboot.S | # Bootstrapping from 32-bit with the Multiboot specification.
# See https://www.gnu.org/software/grub/manual/multiboot/multiboot.html
.section .text.boot
.code32
.global _start
_start:
mov edi, eax # arg1: magic: 0x2BADB002
mov esi, ebx # arg2: multiboot info
jmp bsp_entry32
.bal... |
JensenWei007/rCore-OS-2024Summer | 2,034 | async/sync/modules/axtrap/src/arch/riscv/trap.S | .macro SAVE_REGS, from_user
addi sp, sp, -{trapframe_size}
PUSH_GENERAL_REGS
csrr t0, sepc
csrr t1, sstatus
csrrw t2, sscratch, zero // save sscratch (sp) and zero it
STR t0, sp, 31 // tf.sepc
STR t1, sp, 32 // tf.sstatus
STR... |
JensenWei007/rCore-OS-2024Summer | 4,138 | async/sync/modules/axtrap/src/arch/aarch64/trap.S | .macro clear_gp_regs
.irp n,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29
mov x\n, xzr
.endr
.endm
.macro SAVE_REGS, el
stp x0, x1, [sp]
stp x2, x3, [sp, 2 * 8]
stp x4, x5, [sp, 4 * 8]
stp x6, x7, [sp, 6 * 8]
stp x8, x9, [sp, 8 * 8]
... |
JensenWei007/rCore-OS-2024Summer | 1,201 | async/sync/modules/axtrap/src/arch/x86_64/syscall.S | .section .text
syscall_entry:
swapgs
# The user rsp and kernel rsp are defined in axhal
mov gs:[offset __PERCPU_USER_RSP_OFFSET], rsp
mov rsp, gs:[offset __PERCPU_KERNEL_RSP_OFFSET]
sub rsp, 8 // skip user_ss
push gs:[offset __PERCPU_USER_RSP_OFFSET] // u... |
JensenWei007/rCore-OS-2024Summer | 1,505 | async/sync/modules/axtrap/src/arch/x86_64/trap.S | .equ NUM_INT, 256
.altmacro
.macro DEF_HANDLER, i
.Ltrap_handler_\i:
.if \i == 8 || (\i >= 10 && \i <= 14) || \i == 17
# error code pushed by CPU
push \i # interrupt vector
jmp .Ltrap_common
.else
push 0 # fill in error code in TrapFrame
push \i # interrupt ... |
JensenWei007/rCore-OS-2024Summer | 1,965 | async/sync/crates/arch_boot/src/platform/x86_pc/ap_start.S | # Boot application processors into the protected mode.
# Each non-boot CPU ("AP") is started up in response to a STARTUP
# IPI from the boot CPU. Section B.4.2 of the Multi-Processor
# Specification says that the AP will start in real mode with CS:IP
# set to XY00:0000, where XY is an 8-bit value sent with the
# STAR... |
JensenWei007/rCore-OS-2024Summer | 4,307 | async/sync/crates/arch_boot/src/platform/x86_pc/multiboot.S | # Bootstrapping from 32-bit with the Multiboot specification.
# See https://www.gnu.org/software/grub/manual/multiboot/multiboot.html
.section .text.boot
.code32
.global _start
_start:
mov edi, eax # arg1: magic: 0x2BADB002
mov esi, ebx # arg2: multiboot info
jmp bsp_entry32
.bal... |
JensenWei007/rCore-OS-2024Summer | 1,771 | async/syncwz/modules/axhal/linker.lds.S | OUTPUT_ARCH(%ARCH%)
BASE_ADDRESS = %KERNEL_BASE%;
ENTRY(_start)
SECTIONS
{
. = BASE_ADDRESS;
_skernel = .;
.text : ALIGN(4K) {
_stext = .;
*(.text.boot)
. = ALIGN(4K);
*(.text.signal_trampoline)
. = ALIGN(4K);
*(.text .text.*)
. = ALIGN(4K);
... |
JensenWei007/rCore-OS-2024Summer | 210 | async/syncwz/modules/axhal/src/arch/riscv/signal.S | # To create the sigreturn trampoline
.equ __NR_sigreturn, 139
.section .text.signal_trampoline
.balign 4
.global start_signal_trampoline
start_signal_trampoline:
li a7, __NR_sigreturn
li a0, 0
ecall |
JensenWei007/rCore-OS-2024Summer | 223 | async/syncwz/modules/axhal/src/arch/aarch64/signal.S | # To create the sigreturn trampoline
.equ __NR_sigreturn, 139
.section .text.signal_trampoline
.balign 4
.global start_signal_trampoline
start_signal_trampoline:
mov x8, #139 // 设置系统调用号为 139
svc #0 // 触发系统调用 |
JensenWei007/rCore-OS-2024Summer | 190 | async/syncwz/modules/axhal/src/arch/x86_64/signal.S | # To create the sigreturn trampoline
.section .text.signal_trampoline
.code64
.global start_signal_trampoline
start_signal_trampoline:
# syscall id rdi = 15
mov rax, 0xf
syscall |
JensenWei007/rCore-OS-2024Summer | 4,307 | async/syncwz/modules/axhal/src/platform/x86_pc/multiboot.S | # Bootstrapping from 32-bit with the Multiboot specification.
# See https://www.gnu.org/software/grub/manual/multiboot/multiboot.html
.section .text.boot
.code32
.global _start
_start:
mov edi, eax # arg1: magic: 0x2BADB002
mov esi, ebx # arg2: multiboot info
jmp bsp_entry32
.bal... |
JensenWei007/rCore-OS-2024Summer | 2,967 | async/syncwz/modules/axtrap/src/arch/riscv/trap.S | .macro SAVE_REGS
addi sp, sp, -{trapframe_size}
PUSH_GENERAL_REGS
.endm
.macro RESTORE_REGS
POP_GENERAL_REGS
addi sp, sp, {trapframe_size}
.endm
.section .text
.balign 4
.global __trap_from_user
__trap_from_user:
csrrw sp, sscratch, sp // switch sscratch and sp
# now sp->*Tr... |
JensenWei007/rCore-OS-2024Summer | 4,138 | async/syncwz/modules/axtrap/src/arch/aarch64/trap.S | .macro clear_gp_regs
.irp n,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29
mov x\n, xzr
.endr
.endm
.macro SAVE_REGS, el
stp x0, x1, [sp]
stp x2, x3, [sp, 2 * 8]
stp x4, x5, [sp, 4 * 8]
stp x6, x7, [sp, 6 * 8]
stp x8, x9, [sp, 8 * 8]
... |
JensenWei007/rCore-OS-2024Summer | 1,201 | async/syncwz/modules/axtrap/src/arch/x86_64/syscall.S | .section .text
syscall_entry:
swapgs
# The user rsp and kernel rsp are defined in axhal
mov gs:[offset __PERCPU_USER_RSP_OFFSET], rsp
mov rsp, gs:[offset __PERCPU_KERNEL_RSP_OFFSET]
sub rsp, 8 // skip user_ss
push gs:[offset __PERCPU_USER_RSP_OFFSET] // u... |
JensenWei007/rCore-OS-2024Summer | 1,505 | async/syncwz/modules/axtrap/src/arch/x86_64/trap.S | .equ NUM_INT, 256
.altmacro
.macro DEF_HANDLER, i
.Ltrap_handler_\i:
.if \i == 8 || (\i >= 10 && \i <= 14) || \i == 17
# error code pushed by CPU
push \i # interrupt vector
jmp .Ltrap_common
.else
push 0 # fill in error code in TrapFrame
push \i # interrupt ... |
JensenWei007/rCore-OS-2024Summer | 1,965 | async/syncwz/crates/arch_boot/src/platform/x86_pc/ap_start.S | # Boot application processors into the protected mode.
# Each non-boot CPU ("AP") is started up in response to a STARTUP
# IPI from the boot CPU. Section B.4.2 of the Multi-Processor
# Specification says that the AP will start in real mode with CS:IP
# set to XY00:0000, where XY is an 8-bit value sent with the
# STAR... |
JensenWei007/rCore-OS-2024Summer | 4,307 | async/syncwz/crates/arch_boot/src/platform/x86_pc/multiboot.S | # Bootstrapping from 32-bit with the Multiboot specification.
# See https://www.gnu.org/software/grub/manual/multiboot/multiboot.html
.section .text.boot
.code32
.global _start
_start:
mov edi, eax # arg1: magic: 0x2BADB002
mov esi, ebx # arg2: multiboot info
jmp bsp_entry32
.bal... |
Jerbeson/LiteX-testes | 472 | sim/hello_ram/start_ram.S | /* Para rodar na MAIN RAM (0x40000000) */
.section .text.start,"ax",%progbits
.globl _start
.option norvc
.align 4
.equ MAIN_BASE, 0x40000000
.equ MAIN_SIZE, 0x00020000
_start:
/* zera .bss */
la t0, __bss_start
la t1, __bss_end
1: beq t0, t1, 2f
sw x0, 0(t0)
addi t... |
Jerbeson/LiteX-testes | 460 | sim/hello_bios/start.S | /* start.S — RISC-V bare-metal + LiteX */
.section .init
.globl _start
.option norvc
.equ RAM_BASE, 0x10000000
.equ RAM_SIZE, 0x00002000 /* 8 KiB */
_start:
/* zera .bss */
la t0, __bss_start
la t1, __bss_end
beq t0, t1, 1f
0:
sw x0, 0(t0)
addi t0, t0, 4
blt t... |
Jettford/rtdemo | 424 | src/boot/boot.s | .set ALIGN, 1<<0
.set MEMINFO, 1<<1
.set FLAGS, ALIGN | MEMINFO
.set MAGIC, 0x1BADB002
.set CHECKSUM, -(MAGIC + FLAGS)
.section .multiboot
.align 4
.long MAGIC
.long FLAGS
.long CHECKSUM
.section .bss
.align 16
stack_bottom:
.skip 16384 # 16 KiB
stack_top:
.section .text
.global _start
.type _start, @f... |
Jhynjhiruu/gsfont | 75 | src/row_end.s | LEAF(row_end)
POP(s1)
POP(s0)
jr ra
nop
END(row_end)
|
Jhynjhiruu/gsfont | 21 | src/epilogue.s | .set reorder
.set at
|
Jhynjhiruu/gsfont | 44 | src/prologue.s | #include "asm.h"
.set noat
.set noreorder
|
jiahaoxiang2000/iCore | 1,494 | os/src/link_app.S |
.align 3
.section .data
.global _num_app
_num_app:
.quad 7
.quad app_0_start
.quad app_1_start
.quad app_2_start
.quad app_3_start
.quad app_4_start
.quad app_5_start
.quad app_6_start
.quad app_6_end
.section .data
.global app_0_start
.global app_0_end
... |
jiahaoxiang2000/iCore | 676 | os/src/task/switch.S | .altmacro
.macro SAVE_SN n
sd s\n, (\n+2)*8(a0)
.endm
.macro LOAD_SN n
ld s\n, (\n+2)*8(a1)
.endm
.section .text
.globl __switch
__switch:
# __switch(
# current_task_cx_ptr: *mut TaskContext,
# next_task_cx_ptr: *const TaskContext
# )
# save kernel stack of current task
s... |
jiahaoxiang2000/iCore | 1,640 | os/src/trap/trap.S | .altmacro
.macro SAVE_GP n
sd x\n, \n*8(sp)
.endm
.macro LOAD_GP n
ld x\n, \n*8(sp)
.endm
.section .text.trampoline
.globl __alltraps
.globl __restore
.align 2
__alltraps:
csrrw sp, sscratch, sp
# now sp->*TrapContext in user space, sscratch->user stack
# save other general purpose r... |
jiaoshijie/rbfjit | 51 | hello.s | .section .text
.global _start
_start:
popq %rdi
|
JIESMATER/STM32_Test_SelfUse_Library | 12,177 | BH1750/MDK-ARM/startup_stm32f103xb.s | ;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
;* File Name : startup_stm32f103xb.s
;* Author : MCD Application Team
;* Description : STM32F103xB Devices vector table for MDK-ARM toolchain.
;* This module performs:
;* ... |
JIESMATER/STM32_Test_SelfUse_Library | 12,193 | BH1750/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f103xe.s | /**
*************** (C) COPYRIGHT 2017 STMicroelectronics ************************
* @file startup_stm32f103xe.s
* @author MCD Application Team
* @brief STM32F103xE Devices vector table for Atollic toolchain.
* This module performs:
* - Set the initial SP
* ... |
JIESMATER/STM32_Test_SelfUse_Library | 9,270 | BH1750/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f102xb.s | /**
*************** (C) COPYRIGHT 2017 STMicroelectronics ************************
* @file startup_stm32f102xb.s
* @author MCD Application Team
* @brief STM32F102xB Value Line Devices vector table for Atollic toolchain.
* This module performs:
* - Set the initial SP
*... |
JIESMATER/STM32_Test_SelfUse_Library | 11,266 | BH1750/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f101xg.s | /**
*************** (C) COPYRIGHT 2017 STMicroelectronics ************************
* @file startup_stm32f101xg.s
* @author MCD Application Team
* @brief STM32F101xG Devices vector table for Atollic toolchain.
* This module performs:
* - Set the initial SP
* ... |
JIESMATER/STM32_Test_SelfUse_Library | 11,923 | BH1750/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f105xc.s | /**
*************** (C) COPYRIGHT 2017 STMicroelectronics ************************
* @file startup_stm32f105xc.s
* @author MCD Application Team
* @brief STM32F105xC Devices vector table for Atollic toolchain.
* This module performs:
* - Set the initial SP
* ... |
JIESMATER/STM32_Test_SelfUse_Library | 12,345 | BH1750/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f103xg.s | /**
*************** (C) COPYRIGHT 2017 STMicroelectronics ************************
* @file startup_stm32f103xb.s
* @author MCD Application Team
* @brief STM32F103xB Devices vector table for Atollic toolchain.
* This module performs:
* - Set the initial SP
* ... |
JIESMATER/STM32_Test_SelfUse_Library | 8,980 | BH1750/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f101xb.s | /**
*************** (C) COPYRIGHT 2017 STMicroelectronics ************************
* @file startup_stm32f101xb.s
* @author MCD Application Team
* @brief STM32F101xB Devices vector table for Atollic toolchain.
* This module performs:
* - Set the initial SP
* ... |
JIESMATER/STM32_Test_SelfUse_Library | 10,572 | BH1750/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f101xe.s | /**
*************** (C) COPYRIGHT 2017 STMicroelectronics ************************
* @file startup_stm32f101xe.s
* @author MCD Application Team
* @brief STM32F101xE Value Line Devices vector table for Atollic toolchain.
* This module performs:
* - Set the initial SP
*... |
JIESMATER/STM32_Test_SelfUse_Library | 12,178 | BH1750/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f107xc.s | /**
*************** (C) COPYRIGHT 2017 STMicroelectronics ************************
* @file startup_stm32f107xc.s
* @author MCD Application Team
* @brief STM32F107xC Devices vector table for Atollic toolchain.
* This module performs:
* - Set the initial SP
* ... |
JIESMATER/STM32_Test_SelfUse_Library | 11,474 | BH1750/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f100xe.s | /**
*************** (C) COPYRIGHT 2017 STMicroelectronics ************************
* @file startup_stm32f100xe.s
* @author MCD Application Team
* @brief STM32F100xE Devices vector table for Atollic toolchain.
* This module performs:
* - Set the initial SP
* ... |
JIESMATER/STM32_Test_SelfUse_Library | 9,443 | BH1750/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f103x6.s | /**
*************** (C) COPYRIGHT 2017 STMicroelectronics ************************
* @file startup_stm32f103x6.s
* @author MCD Application Team
* @brief STM32F103x6 Devices vector table for Atollic toolchain.
* This module performs:
* - Set the initial SP
* ... |
JIESMATER/STM32_Test_SelfUse_Library | 8,564 | BH1750/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f101x6.s | /**
*************** (C) COPYRIGHT 2017 STMicroelectronics ************************
* @file startup_stm32f101x6.s
* @author MCD Application Team
* @brief STM32F101x6 Devices vector table for Atollic toolchain.
* This module performs:
* - Set the initial SP
* ... |
JIESMATER/STM32_Test_SelfUse_Library | 8,806 | BH1750/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f102x6.s | /**
*************** (C) COPYRIGHT 2017 STMicroelectronics ************************
* @file startup_stm32f102x6.s
* @author MCD Application Team
* @brief STM32F102x6 Devices vector table for Atollic toolchain.
* This module performs:
* - Set the initial SP
* ... |
JIESMATER/STM32_Test_SelfUse_Library | 9,896 | BH1750/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f103xb.s | /**
*************** (C) COPYRIGHT 2017 STMicroelectronics ************************
* @file startup_stm32f103xb.s
* @author MCD Application Team
* @brief STM32F103xB Devices vector table for Atollic toolchain.
* This module performs:
* - Set the initial SP
* ... |
JIESMATER/STM32_Test_SelfUse_Library | 10,244 | BH1750/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f100xb.s | /**
*************** (C) COPYRIGHT 2017 STMicroelectronics ************************
* @file startup_stm32f100xb.s
* @author MCD Application Team
* @brief STM32F100xB Devices vector table for Atollic toolchain.
* This module performs:
* - Set the initial SP
* ... |
JIESMATER/STM32_Test_SelfUse_Library | 16,039 | BH1750/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/startup_stm32f103xe.s | ;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
;* File Name : startup_stm32f103xe.s
;* Author : MCD Application Team
;* Description : STM32F103xE Performance Line Devices vector table for EWARM toolchain.
;* This module performs:
;* ... |
JIESMATER/STM32_Test_SelfUse_Library | 11,837 | BH1750/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/startup_stm32f102xb.s | ;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
;* File Name : startup_stm32f102xb.s
;* Author : MCD Application Team
;* Description : STM32F102xB USB Line Devices vector table for
;* EWARM toolchain.
;* This module ... |
JIESMATER/STM32_Test_SelfUse_Library | 14,961 | BH1750/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/startup_stm32f101xg.s | ;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
;* File Name : startup_stm32f101xg.s
;* Author : MCD Application Team
;* Description : STM32F101xG Access Line Devices vector table for EWARM
;* toolchain.
;* This modu... |
JIESMATER/STM32_Test_SelfUse_Library | 16,449 | BH1750/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/startup_stm32f105xc.s | ;******************** (C) COPYRIGHT 2017 STMicroelectronics *******************
;* File Name : startup_stm32f105xc.s
;* Author : MCD Application Team
;* Description : STM32F105xC Connectivity line devices vector table for
;* EWARM toolchain.
;* This... |
JIESMATER/STM32_Test_SelfUse_Library | 16,267 | BH1750/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/startup_stm32f103xg.s | ;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
;* File Name : startup_stm32f103xg.s
;* Author : MCD Application Team
;* Description : STM32F103xG Performances Line Devices vector table for EWARM
;* toolchain.
;* Thi... |
JIESMATER/STM32_Test_SelfUse_Library | 11,401 | BH1750/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/startup_stm32f101xb.s | ;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
;* File Name : startup_stm32f101xb.s
;* Author : MCD Application Team
;* Description : STM32F101xB Access Line Devices vector table for
;* EWARM toolchain.
;* This modu... |
JIESMATER/STM32_Test_SelfUse_Library | 14,006 | BH1750/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/startup_stm32f101xe.s | ;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
;* File Name : startup_stm32f101xe.s
;* Author : MCD Application Team
;* Description : STM32F101xE Access Line Devices vector table for EWARM toolchain.
;* This module performs:
;* ... |
JIESMATER/STM32_Test_SelfUse_Library | 16,474 | BH1750/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/startup_stm32f107xc.s | ;******************** (C) COPYRIGHT 2017 STMicroelectronics *******************
;* File Name : startup_stm32f107xc.s
;* Author : MCD Application Team
;* Description : STM32F107xC Connectivity line devices vector table for
;* EWARM toolchain.
;* This... |
JIESMATER/STM32_Test_SelfUse_Library | 15,398 | BH1750/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/startup_stm32f100xe.s | ;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
;* File Name : startup_stm32f100xe.s
;* Author : MCD Application Team
;* Description : STM32F100xE Value Line Devices vector table
;* for EWARM toolchain.
;* This modul... |
JIESMATER/STM32_Test_SelfUse_Library | 12,483 | BH1750/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/startup_stm32f103x6.s | ;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
;* File Name : startup_stm32f103x6.s
;* Author : MCD Application Team
;* Description : STM32F103x6 Performance Line Devices vector table for EWARM
;* toolchain.
;* This ... |
JIESMATER/STM32_Test_SelfUse_Library | 11,070 | BH1750/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/startup_stm32f101x6.s | ;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
;* File Name : startup_stm32f101x6.s
;* Author : MCD Application Team
;* Description : STM32F101x6 Access Line Devices vector table for EWARM
;* toolchain.
;* This modul... |
JIESMATER/STM32_Test_SelfUse_Library | 11,510 | BH1750/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/startup_stm32f102x6.s | ;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
;* File Name : startup_stm32f102x6.s
;* Author : MCD Application Team
;* Description : STM32F102x6 USB Line Devices vector table for EWARM
;* toolchain.
;* This module p... |
JIESMATER/STM32_Test_SelfUse_Library | 12,752 | BH1750/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/startup_stm32f103xb.s | ;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
;* File Name : startup_stm32f103xb.s
;* Author : MCD Application Team
;* Description : STM32F103xB Performance Line Devices vector table for
;* EWARM toolchain.
;* This... |
JIESMATER/STM32_Test_SelfUse_Library | 13,404 | BH1750/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/startup_stm32f100xb.s | ;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
;* File Name : startup_stm32f100xb.s
;* Author : MCD Application Team
;* Description : STM32F100xB Value Line Devices vector table
;* for EWARM toolchain.
;* This modul... |
JIESMATER/STM32_Test_SelfUse_Library | 14,700 | BH1750/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/arm/startup_stm32f103xe.s | ;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
;* File Name : startup_stm32f103xe.s
;* Author : MCD Application Team
;* Description : STM32F103xE Devices vector table for MDK-ARM toolchain.
;* This module performs:
;* ... |
JIESMATER/STM32_Test_SelfUse_Library | 11,641 | BH1750/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/arm/startup_stm32f102xb.s | ;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
;* File Name : startup_stm32f102xb.s
;* Author : MCD Application Team
;* Description : STM32F102xB Devices vector table for MDK-ARM toolchain.
;* This module performs:
;* ... |
JIESMATER/STM32_Test_SelfUse_Library | 14,131 | BH1750/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/arm/startup_stm32f101xg.s | ;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
;* File Name : startup_stm32f101xg.s
;* Author : MCD Application Team
;* Description : STM32F101xG Devices vector table for MDK-ARM toolchain.
;* This module performs:
;* ... |
JIESMATER/STM32_Test_SelfUse_Library | 14,954 | BH1750/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/arm/startup_stm32f105xc.s | ;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
;* File Name : startup_stm32f105xc.s
;* Author : MCD Application Team
;* Description : STM32F105xC Devices vector table for MDK-ARM toolchain.
;* This module performs:
;* ... |
JIESMATER/STM32_Test_SelfUse_Library | 15,154 | BH1750/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/arm/startup_stm32f103xg.s | ;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
;* File Name : startup_stm32f103xg.s
;* Author : MCD Application Team
;* Description : STM32F103xG Devices vector table for MDK-ARM toolchain.
;* This module performs:
;* ... |
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