repo_id string | size int64 | file_path string | content string |
|---|---|---|---|
polesskiy-dev/iot-cellular-risk-logger-stm32l4 | 11,953 | firmware/iot-cellular-risk-logger-stm32l4/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/startup_stm32l433xx.s | /**
******************************************************************************
* @file startup_stm32l433xx.s
* @author MCD Application Team
* @brief STM32L433xx devices vector table for GCC toolchain.
* This module performs:
* - Set the initial SP
* ... |
polesskiy-dev/iot-cellular-risk-logger-stm32l4 | 13,277 | firmware/iot-cellular-risk-logger-stm32l4/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/startup_stm32l475xx.s | /**
******************************************************************************
* @file startup_stm32l475xx.s
* @author MCD Application Team
* @brief STM32L475xx devices vector table for GCC toolchain.
* This module performs:
* - Set the initial SP
* ... |
polesskiy-dev/iot-cellular-risk-logger-stm32l4 | 12,361 | firmware/iot-cellular-risk-logger-stm32l4/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/startup_stm32l462xx.s | /**
******************************************************************************
* @file startup_stm32l462xx.s
* @author MCD Application Team
* @brief STM32L462xx devices vector table for GCC toolchain.
* This module performs:
* - Set the initial SP
* ... |
polesskiy-dev/iot-cellular-risk-logger-stm32l4 | 14,286 | firmware/iot-cellular-risk-logger-stm32l4/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/startup_stm32l4s9xx.s | /**
******************************************************************************
* @file startup_stm32l4s9xx.s
* @author MCD Application Team
* @brief STM32L4S9xx devices vector table GCC toolchain.
* This module performs:
* - Set the initial SP
* - S... |
polesskiy-dev/iot-cellular-risk-logger-stm32l4 | 11,069 | firmware/iot-cellular-risk-logger-stm32l4/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/startup_stm32l412xx.s | /**
******************************************************************************
* @file startup_stm32l412xx.s
* @author MCD Application Team
* @brief STM32L412xx devices vector table for GCC toolchain.
* This module performs:
* - Set the initial SP
* ... |
polesskiy-dev/iot-cellular-risk-logger-stm32l4 | 11,148 | firmware/iot-cellular-risk-logger-stm32l4/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/startup_stm32l422xx.s | /**
******************************************************************************
* @file startup_stm32l412xx.s
* @author MCD Application Team
* @brief STM32L412xx devices vector table for GCC toolchain.
* This module performs:
* - Set the initial SP
* ... |
polesskiy-dev/iot-cellular-risk-logger-stm32l4 | 13,437 | firmware/iot-cellular-risk-logger-stm32l4/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/startup_stm32l486xx.s | /**
******************************************************************************
* @file startup_stm32l486xx.s
* @author MCD Application Team
* @brief STM32L486xx devices vector table for GCC toolchain.
* This module performs:
* - Set the initial SP
* ... |
polesskiy-dev/iot-cellular-risk-logger-stm32l4 | 14,350 | firmware/iot-cellular-risk-logger-stm32l4/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/startup_stm32l4a6xx.s | /**
******************************************************************************
* @file startup_stm32l4a6xx.s
* @author MCD Application Team
* @brief STM32L4A6xx devices vector table GCC toolchain.
* This module performs:
* - Set the initial SP
* - S... |
polesskiy-dev/iot-cellular-risk-logger-stm32l4 | 13,353 | firmware/iot-cellular-risk-logger-stm32l4/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/startup_stm32l476xx.s | /**
******************************************************************************
* @file startup_stm32l476xx.s
* @author MCD Application Team
* @brief STM32L476xx devices vector table GCC toolchain.
* This module performs:
* - Set the initial SP
* - S... |
polesskiy-dev/iot-cellular-risk-logger-stm32l4 | 11,433 | firmware/iot-cellular-risk-logger-stm32l4/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/startup_stm32l432xx.s | /**
******************************************************************************
* @file startup_stm32l432xx.s
* @author MCD Application Team
* @brief STM32L432xx devices vector table for GCC toolchain.
* This module performs:
* - Set the initial SP
* ... |
porter-ml/pa-zksync-airbender | 3,345 | examples/scripts/asm/asm_reduced.S | /*
Entry point of all programs (_start).
It initializes DWARF call frame information, the stack pointer, the
frame pointer (needed for closures to work in start_rust) and the global
pointer. Then it calls _start_rust.
*/
.section .init, "ax"
.global _start
_start:
/* Jump to the absolute address ... |
porter-ml/pa-zksync-airbender | 3,370 | tools/verifier/src/asm/asm_reduced.S | /*
Entry point of all programs (_start).
It initializes DWARF call frame information, the stack pointer, the
frame pointer (needed for closures to work in start_rust) and the global
pointer. Then it calls _start_rust.
*/
.attribute arch, "rv32i"
.section .init, "ax"
.global _start
_start:
/* Jump... |
porter-ml/pa-zksync-airbender | 104,929 | circuit_defs/opcode_tests/src/data/addi-01.S |
// -----------
// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
// version : 0.4.1
// timestamp : Tue Dec 15 15:36:11 2020 GMT
// usage : riscv_ctg \
// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/... |
porter-ml/pa-zksync-airbender | 13,491 | circuit_defs/opcode_tests/src/data/sh-align-01.S |
// -----------
// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
// version : 0.4.1
// timestamp : Tue Dec 15 15:36:11 2020 GMT
// usage : riscv_ctg \
// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/... |
porter-ml/pa-zksync-airbender | 129,713 | circuit_defs/opcode_tests/src/data/mul-01.S |
// -----------
// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
// version : 0.11.1
// timestamp : Wed Oct 25 12:11:39 2023 GMT
// usage : riscv_ctg \
// -- cgf // --cgf /home/ali/.WORKDIR/riscv-ctg-alitariq/sample_cgfs/dataset.cgf \
// ... |
porter-ml/pa-zksync-airbender | 19,256 | circuit_defs/opcode_tests/src/data/srl-01.S |
// -----------
// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
// version : 0.4.1
// timestamp : Tue Dec 15 15:36:11 2020 GMT
// usage : riscv_ctg \
// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/... |
porter-ml/pa-zksync-airbender | 19,002 | circuit_defs/opcode_tests/src/data/sll-01.S |
// -----------
// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
// version : 0.4.1
// timestamp : Tue Dec 15 15:36:11 2020 GMT
// usage : riscv_ctg \
// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/... |
porter-ml/pa-zksync-airbender | 13,032 | circuit_defs/opcode_tests/src/data/sw-align-01.S |
// -----------
// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
// version : 0.4.1
// timestamp : Tue Dec 15 15:36:11 2020 GMT
// usage : riscv_ctg \
// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/... |
porter-ml/pa-zksync-airbender | 103,786 | circuit_defs/opcode_tests/src/data/ori-01.S |
// -----------
// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
// version : 0.4.1
// timestamp : Tue Dec 15 15:36:11 2020 GMT
// usage : riscv_ctg \
// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/... |
porter-ml/pa-zksync-airbender | 16,997 | circuit_defs/opcode_tests/src/data/srai-01.S |
// -----------
// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
// version : 0.4.1
// timestamp : Tue Dec 15 15:36:11 2020 GMT
// usage : riscv_ctg \
// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/... |
porter-ml/pa-zksync-airbender | 119,134 | circuit_defs/opcode_tests/src/data/and-01.S |
// -----------
// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
// version : 0.4.1
// timestamp : Tue Dec 15 15:36:11 2020 GMT
// usage : riscv_ctg \
// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/... |
porter-ml/pa-zksync-airbender | 5,284 | circuit_defs/opcode_tests/src/data/jal-01.S |
// -----------
// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
// version : 0.4.0
// timestamp : Fri Dec 4 15:11:13 2020 GMT
// usage : riscv_ctg \
// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/... |
porter-ml/pa-zksync-airbender | 157,889 | circuit_defs/opcode_tests/src/data/bltu-01.S |
// -----------
// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
// version : 0.4.1
// timestamp : Tue Dec 15 15:36:11 2020 GMT
// usage : riscv_ctg \
// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/... |
porter-ml/pa-zksync-airbender | 127,913 | circuit_defs/opcode_tests/src/data/bge-01.S |
// -----------
// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
// version : 0.4.1
// timestamp : Tue Dec 15 15:36:11 2020 GMT
// usage : riscv_ctg \
// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/... |
porter-ml/pa-zksync-airbender | 101,926 | circuit_defs/opcode_tests/src/data/slti-01.S |
// -----------
// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
// version : 0.4.1
// timestamp : Tue Dec 15 15:36:11 2020 GMT
// usage : riscv_ctg \
// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/... |
porter-ml/pa-zksync-airbender | 6,243 | circuit_defs/opcode_tests/src/data/lhu-align-01.S |
// -----------
// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
// version : 0.4.1
// timestamp : Tue Dec 15 15:36:11 2020 GMT
// usage : riscv_ctg \
// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/... |
porter-ml/pa-zksync-airbender | 126,650 | circuit_defs/opcode_tests/src/data/bne-01.S |
// -----------
// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
// version : 0.4.1
// timestamp : Tue Dec 15 15:36:11 2020 GMT
// usage : riscv_ctg \
// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/... |
porter-ml/pa-zksync-airbender | 6,597 | circuit_defs/opcode_tests/src/data/lb-align-01.S |
// -----------
// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
// version : 0.4.1
// timestamp : Tue Dec 15 15:36:11 2020 GMT
// usage : riscv_ctg \
// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/... |
porter-ml/pa-zksync-airbender | 122,041 | circuit_defs/opcode_tests/src/data/xor-01.S |
// -----------
// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
// version : 0.4.1
// timestamp : Tue Dec 15 15:36:11 2020 GMT
// usage : riscv_ctg \
// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/... |
porter-ml/pa-zksync-airbender | 159,066 | circuit_defs/opcode_tests/src/data/mulhu-01.S |
// -----------
// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
// version : 0.11.1
// timestamp : Wed Oct 25 12:11:39 2023 GMT
// usage : riscv_ctg \
// -- cgf // --cgf /home/ali/.WORKDIR/riscv-ctg-alitariq/sample_cgfs/dataset.cgf \
// ... |
porter-ml/pa-zksync-airbender | 6,145 | circuit_defs/opcode_tests/src/data/lh-align-01.S |
// -----------
// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
// version : 0.4.1
// timestamp : Tue Dec 15 15:36:11 2020 GMT
// usage : riscv_ctg \
// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/... |
porter-ml/pa-zksync-airbender | 10,267 | circuit_defs/opcode_tests/src/data/auipc-01.S |
// -----------
// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
// version : 0.4.1
// timestamp : Tue Dec 15 15:36:11 2020 GMT
// usage : riscv_ctg \
// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/... |
porter-ml/pa-zksync-airbender | 9,989 | circuit_defs/opcode_tests/src/data/lui-01.S |
// -----------
// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
// version : 0.4.1
// timestamp : Tue Dec 15 15:36:11 2020 GMT
// usage : riscv_ctg \
// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/... |
porter-ml/pa-zksync-airbender | 6,031 | circuit_defs/opcode_tests/src/data/lw-align-01.S |
// -----------
// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
// version : 0.4.1
// timestamp : Tue Dec 15 15:36:11 2020 GMT
// usage : riscv_ctg \
// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/... |
porter-ml/pa-zksync-airbender | 13,656 | circuit_defs/opcode_tests/src/data/sb-align-01.S |
// -----------
// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
// version : 0.4.1
// timestamp : Tue Dec 15 15:36:11 2020 GMT
// usage : riscv_ctg \
// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/... |
porter-ml/pa-zksync-airbender | 122,853 | circuit_defs/opcode_tests/src/data/sub-01.S |
// -----------
// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
// version : 0.4.1
// timestamp : Tue Dec 15 15:36:11 2020 GMT
// usage : riscv_ctg \
// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/... |
porter-ml/pa-zksync-airbender | 146,867 | circuit_defs/opcode_tests/src/data/sltu-01.S |
// -----------
// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
// version : 0.4.1
// timestamp : Tue Dec 15 15:36:11 2020 GMT
// usage : riscv_ctg \
// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/... |
porter-ml/pa-zksync-airbender | 157,808 | circuit_defs/opcode_tests/src/data/bgeu-01.S |
// -----------
// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
// version : 0.4.1
// timestamp : Tue Dec 15 15:36:11 2020 GMT
// usage : riscv_ctg \
// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/... |
porter-ml/pa-zksync-airbender | 17,374 | circuit_defs/opcode_tests/src/data/slli-01.S |
// -----------
// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
// version : 0.4.1
// timestamp : Tue Dec 15 15:36:11 2020 GMT
// usage : riscv_ctg \
// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/... |
porter-ml/pa-zksync-airbender | 6,605 | circuit_defs/opcode_tests/src/data/jalr-01.S |
// -----------
// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
// version : 0.4.1
// timestamp : Tue Dec 15 15:36:11 2020 GMT
// usage : riscv_ctg \
// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/... |
porter-ml/pa-zksync-airbender | 127,395 | circuit_defs/opcode_tests/src/data/sltiu-01.S |
// -----------
// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
// version : 0.4.1
// timestamp : Tue Dec 15 15:36:11 2020 GMT
// usage : riscv_ctg \
// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/... |
porter-ml/pa-zksync-airbender | 121,780 | circuit_defs/opcode_tests/src/data/add-01.S |
// -----------
// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
// version : 0.4.1
// timestamp : Tue Dec 15 15:36:11 2020 GMT
// usage : riscv_ctg \
// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/... |
porter-ml/pa-zksync-airbender | 1,780 | circuit_defs/opcode_tests/src/data/misalign1-jalr-01.S |
// -----------
// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
// version : 0.4.1
// timestamp : Tue Dec 15 15:45:45 2020 GMT
// usage : riscv_ctg \
// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/... |
porter-ml/pa-zksync-airbender | 125,780 | circuit_defs/opcode_tests/src/data/blt-01.S |
// -----------
// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
// version : 0.4.1
// timestamp : Tue Dec 15 15:36:11 2020 GMT
// usage : riscv_ctg \
// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/... |
porter-ml/pa-zksync-airbender | 17,638 | circuit_defs/opcode_tests/src/data/srli-01.S |
// -----------
// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
// version : 0.4.1
// timestamp : Tue Dec 15 15:36:11 2020 GMT
// usage : riscv_ctg \
// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/... |
porter-ml/pa-zksync-airbender | 129,649 | circuit_defs/opcode_tests/src/data/mulh-01.S |
// -----------
// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
// version : 0.11.1
// timestamp : Wed Oct 25 12:11:39 2023 GMT
// usage : riscv_ctg \
// -- cgf // --cgf /home/ali/.WORKDIR/riscv-ctg-alitariq/sample_cgfs/dataset.cgf \
// ... |
porter-ml/pa-zksync-airbender | 117,646 | circuit_defs/opcode_tests/src/data/slt-01.S |
// -----------
// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
// version : 0.4.1
// timestamp : Tue Dec 15 15:36:11 2020 GMT
// usage : riscv_ctg \
// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/... |
porter-ml/pa-zksync-airbender | 127,632 | circuit_defs/opcode_tests/src/data/rem-01.S |
// -----------
// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
// version : 0.11.1
// timestamp : Wed Oct 25 12:11:39 2023 GMT
// usage : riscv_ctg \
// -- cgf // --cgf /home/ali/.WORKDIR/riscv-ctg-alitariq/sample_cgfs/dataset.cgf \
// ... |
porter-ml/pa-zksync-airbender | 6,490 | circuit_defs/opcode_tests/src/data/lbu-align-01.S |
// -----------
// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
// version : 0.4.1
// timestamp : Tue Dec 15 15:36:11 2020 GMT
// usage : riscv_ctg \
// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/... |
porter-ml/pa-zksync-airbender | 105,642 | circuit_defs/opcode_tests/src/data/xori-01.S |
// -----------
// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
// version : 0.4.1
// timestamp : Tue Dec 15 15:36:11 2020 GMT
// usage : riscv_ctg \
// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/... |
porter-ml/pa-zksync-airbender | 157,572 | circuit_defs/opcode_tests/src/data/remu-01.S |
// -----------
// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
// version : 0.11.1
// timestamp : Wed Oct 25 12:11:39 2023 GMT
// usage : riscv_ctg \
// -- cgf // --cgf /home/ali/.WORKDIR/riscv-ctg-alitariq/sample_cgfs/dataset.cgf \
// ... |
porter-ml/pa-zksync-airbender | 157,024 | circuit_defs/opcode_tests/src/data/divu-01.S |
// -----------
// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
// version : 0.11.1
// timestamp : Wed Oct 25 12:11:39 2023 GMT
// usage : riscv_ctg \
// -- cgf // --cgf /home/ali/.WORKDIR/riscv-ctg-alitariq/sample_cgfs/dataset.cgf \
// ... |
porter-ml/pa-zksync-airbender | 120,478 | circuit_defs/opcode_tests/src/data/or-01.S |
// -----------
// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
// version : 0.4.1
// timestamp : Tue Dec 15 15:36:11 2020 GMT
// usage : riscv_ctg \
// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/... |
porter-ml/pa-zksync-airbender | 18,784 | circuit_defs/opcode_tests/src/data/sra-01.S |
// -----------
// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
// version : 0.4.1
// timestamp : Tue Dec 15 15:36:11 2020 GMT
// usage : riscv_ctg \
// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/... |
porter-ml/pa-zksync-airbender | 103,041 | circuit_defs/opcode_tests/src/data/andi-01.S |
// -----------
// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
// version : 0.4.1
// timestamp : Tue Dec 15 15:36:11 2020 GMT
// usage : riscv_ctg \
// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/... |
porter-ml/pa-zksync-airbender | 127,170 | circuit_defs/opcode_tests/src/data/div-01.S |
// -----------
// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
// version : 0.11.1
// timestamp : Wed Oct 25 12:11:39 2023 GMT
// usage : riscv_ctg \
// -- cgf // --cgf /home/ali/.WORKDIR/riscv-ctg-alitariq/sample_cgfs/dataset.cgf \
// ... |
porter-ml/pa-zksync-airbender | 126,442 | circuit_defs/opcode_tests/src/data/beq-01.S |
// -----------
// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
// version : 0.4.1
// timestamp : Tue Dec 15 15:36:11 2020 GMT
// usage : riscv_ctg \
// -- cgf ('/scratch/git-repo/incoresemi/riscv-compliance/riscv_ctg/sample_cgfs/dataset.cgf', '/... |
porter-ml/pa-zksync-airbender | 145,468 | circuit_defs/opcode_tests/src/data/mulhsu-01.S |
// -----------
// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
// version : 0.11.1
// timestamp : Wed Oct 25 12:11:39 2023 GMT
// usage : riscv_ctg \
// -- cgf // --cgf /home/ali/.WORKDIR/riscv-ctg-alitariq/sample_cgfs/dataset.cgf \
// ... |
pouree/final | 2,655 | Final/sdram/firmware/extraops.S | // This is free and unencumbered software released into the public domain.
//
// Anyone is free to copy, modify, publish, use, compile, sell, or
// distribute this software, either in source code form or as a compiled
// binary, for any purpose, commercial or non-commercial, and by any
// means.
#define regnum_q0 0
... |
pouree/final | 6,209 | Final/sdram/firmware/start.S | /*
* Copyright 2018, Serge Bazanski <serge@bazanski.pl>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted.
*/
#include "../extraops.S"
/*
* Interrupt vector.
*/
.global _start
_start:
.org 0x00000000 # Reset
j _crt0
.org 0x00000010 ... |
pouree/final | 1,803 | Final/sdram/firmware/crt0_ibex.S | # Copyright lowRISC contributors.
# Licensed under the Apache License, Version 2.0, see LICENSE for details.
# SPDX-License-Identifier: Apache-2.0
#include "simple_system_regs.h"
.section .text
default_exc_handler:
jal x0, simple_exc_handler
timer_handler:
jal x0, simple_timer_handler
reset_handler:
/* set a... |
pouree/final | 3,215 | Final/sdram/firmware/start_caravel_vexriscv.s | # SPDX-FileCopyrightText: 2020 Efabless Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or... |
pouree/final | 1,662 | Final/sdram/firmware/crt0_vex.S | .global main
.global isr
.global _start
_start:
j crt_init
nop
nop
nop
nop
nop
nop
nop
.global trap_entry
trap_entry:
sw x1, - 1*4(sp)
sw x5, - 2*4(sp)
sw x6, - 3*4(sp)
sw x7, - 4*4(sp)
sw x10, - 5*4(sp)
sw x11, - 6*4(sp)
sw x12, - 7*4(sp)
sw x13, - 8*4(sp)
sw x14, - 9*4(sp)
s... |
pouree/final | 3,199 | Final/sdram/firmware/start_caravel_ibex.s | # SPDX-FileCopyrightText: 2020 Efabless Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or... |
pouree/final | 6,209 | Final/sdram/firmware/start_pico.S | /*
* Copyright 2018, Serge Bazanski <serge@bazanski.pl>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted.
*/
#include "../extraops.S"
/*
* Interrupt vector.
*/
.global _start
_start:
.org 0x00000000 # Reset
j _crt0
.org 0x00000010 ... |
pouree/final | 5,979 | Final/sdram/testbench/counter_la_mm/counter_la_mm.elf-isr.s | .file "isr.c"
.option nopic
.attribute arch, "rv32i2p0"
.attribute unaligned_access, 0
.attribute stack_align, 16
.text
.Ltext0:
.cfi_sections .debug_frame
.file 0 "/home/ubuntu/Desktop/lab-wlos_baseline/testbench/counter_la_mm" "../../firmware/isr.c"
.align 2
.type flush_cpu_icache, @function
flush_cpu_icach... |
pouree/final | 7,308 | Final/sdram/testbench/counter_la_mm/counter_la_mm.elf-matmul.s | .file "matmul.c"
.option nopic
.attribute arch, "rv32i2p0"
.attribute unaligned_access, 0
.attribute stack_align, 16
.text
.Ltext0:
.cfi_sections .debug_frame
.file 0 "/home/ubuntu/Desktop/lab-wlos_baseline/testbench/counter_la_mm" "matmul.c"
.globl A
.data
.align 2
.type A, @object
.size A, 64
A:
.word 0... |
pouree/final | 1,606 | Final/sdram/testbench/counter_la_mm/counter_la_mm.elf-crt0_vex.s | # 0 "../../firmware/crt0_vex.S"
# 1 "/home/ubuntu/Desktop/lab-wlos_baseline/testbench/counter_la_mm//"
# 0 "<built-in>"
# 0 "<command-line>"
# 1 "../../firmware/crt0_vex.S"
.global main
.global isr
.global _start
_start:
j crt_init
nop
nop
nop
nop
nop
nop
nop
.global trap_entry
trap_entry:
sw x1, - ... |
pouree/final | 14,339 | Final/sdram/testbench/counter_la_mm/counter_la_mm.elf-counter_la_mm.s | .file "counter_la_mm.c"
.option nopic
.attribute arch, "rv32i2p0"
.attribute unaligned_access, 0
.attribute stack_align, 16
.text
.Ltext0:
.cfi_sections .debug_frame
.file 0 "/home/ubuntu/Desktop/lab-wlos_baseline/testbench/counter_la_mm" "counter_la_mm.c"
.align 2
.type flush_cpu_icache, @function
flush_cpu_... |
pouree/final | 11,637 | Final/sdram/testbench/counter_la_qs/counter_la_qs.elf-qsort.s | .file "qsort.c"
.option nopic
.attribute arch, "rv32i2p0"
.attribute unaligned_access, 0
.attribute stack_align, 16
.text
.Ltext0:
.cfi_sections .debug_frame
.file 0 "/home/ubuntu/Desktop/Final_test-main/testbench/counter_la_qs" "qsort.c"
.section .mprjram,"ax",@progbits
.align 2
.globl partition
.type part... |
pouree/final | 13,503 | Final/sdram/testbench/counter_la_qs/counter_la_qs.elf-counter_la_qs.s | .file "counter_la_qs.c"
.option nopic
.attribute arch, "rv32i2p0"
.attribute unaligned_access, 0
.attribute stack_align, 16
.text
.Ltext0:
.cfi_sections .debug_frame
.file 0 "/home/ubuntu/Desktop/Final_test-main/testbench/counter_la_qs" "counter_la_qs.c"
.align 2
.globl putchar
.type putchar, @function
putch... |
pouree/final | 4,495 | Final/sdram/testbench/counter_la_qs/counter_la_qs.elf-isr.s | .file "isr.c"
.option nopic
.attribute arch, "rv32i2p0"
.attribute unaligned_access, 0
.attribute stack_align, 16
.text
.Ltext0:
.cfi_sections .debug_frame
.file 0 "/home/ubuntu/Desktop/Final_test-main/testbench/counter_la_qs" "../../firmware/isr.c"
.align 2
.globl isr
.type isr, @function
isr:
.LFB321:
.fi... |
pouree/final | 1,604 | Final/sdram/testbench/counter_la_qs/counter_la_qs.elf-crt0_vex.s | # 0 "../../firmware/crt0_vex.S"
# 1 "/home/ubuntu/Desktop/Final_test-main/testbench/counter_la_qs//"
# 0 "<built-in>"
# 0 "<command-line>"
# 1 "../../firmware/crt0_vex.S"
.global main
.global isr
.global _start
_start:
j crt_init
nop
nop
nop
nop
nop
nop
nop
.global trap_entry
trap_entry:
sw x1, - 1*... |
pouree/final | 2,655 | Final/Final_UART_FIFO/firmware/extraops.S | // This is free and unencumbered software released into the public domain.
//
// Anyone is free to copy, modify, publish, use, compile, sell, or
// distribute this software, either in source code form or as a compiled
// binary, for any purpose, commercial or non-commercial, and by any
// means.
#define regnum_q0 0
... |
pouree/final | 6,209 | Final/Final_UART_FIFO/firmware/start.S | /*
* Copyright 2018, Serge Bazanski <serge@bazanski.pl>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted.
*/
#include "../extraops.S"
/*
* Interrupt vector.
*/
.global _start
_start:
.org 0x00000000 # Reset
j _crt0
.org 0x00000010 ... |
pouree/final | 1,803 | Final/Final_UART_FIFO/firmware/crt0_ibex.S | # Copyright lowRISC contributors.
# Licensed under the Apache License, Version 2.0, see LICENSE for details.
# SPDX-License-Identifier: Apache-2.0
#include "simple_system_regs.h"
.section .text
default_exc_handler:
jal x0, simple_exc_handler
timer_handler:
jal x0, simple_timer_handler
reset_handler:
/* set a... |
pouree/final | 3,215 | Final/Final_UART_FIFO/firmware/start_caravel_vexriscv.s | # SPDX-FileCopyrightText: 2020 Efabless Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or... |
pouree/final | 1,662 | Final/Final_UART_FIFO/firmware/crt0_vex.S | .global main
.global isr
.global _start
_start:
j crt_init
nop
nop
nop
nop
nop
nop
nop
.global trap_entry
trap_entry:
sw x1, - 1*4(sp)
sw x5, - 2*4(sp)
sw x6, - 3*4(sp)
sw x7, - 4*4(sp)
sw x10, - 5*4(sp)
sw x11, - 6*4(sp)
sw x12, - 7*4(sp)
sw x13, - 8*4(sp)
sw x14, - 9*4(sp)
s... |
pouree/final | 3,199 | Final/Final_UART_FIFO/firmware/start_caravel_ibex.s | # SPDX-FileCopyrightText: 2020 Efabless Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or... |
pouree/final | 6,209 | Final/Final_UART_FIFO/firmware/start_pico.S | /*
* Copyright 2018, Serge Bazanski <serge@bazanski.pl>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted.
*/
#include "../extraops.S"
/*
* Interrupt vector.
*/
.global _start
_start:
.org 0x00000000 # Reset
j _crt0
.org 0x00000010 ... |
pouree/final | 10,685 | Final/Final_UART_FIFO/testbench/uart/uart.elf-isr.s | .file "isr.c"
.option nopic
.attribute arch, "rv32i2p0"
.attribute unaligned_access, 0
.attribute stack_align, 16
.text
.Ltext0:
.cfi_sections .debug_frame
.file 0 "/home/ubuntu/Desktop/Final_test-main/testbench/uart" "../../firmware/isr.c"
.align 2
.globl isr
.type isr, @function
isr:
.LFB321:
.file 1 "../... |
pouree/final | 13,488 | Final/Final_UART_FIFO/testbench/uart/uart.elf-uart.s | .file "uart.c"
.option nopic
.attribute arch, "rv32i2p0"
.attribute unaligned_access, 0
.attribute stack_align, 16
.text
.Ltext0:
.cfi_sections .debug_frame
.file 0 "/home/ubuntu/Desktop/Final_test-main/testbench/uart" "uart.c"
.section .mprj,"ax",@progbits
.align 2
.globl uart_write
.type uart_write, @func... |
pouree/final | 1,619 | Final/Final_UART_FIFO/testbench/uart/uart.elf-crt0_vex.s | # 0 "../../firmware/crt0_vex.S"
# 1 "/home/ubuntu/Desktop/Final_test-main/testbench/uart//"
# 0 "<built-in>"
# 0 "<command-line>"
# 1 "../../firmware/crt0_vex.S"
.global main
.global isr
.global _start
_start:
j crt_init
nop
nop
nop
nop
nop
nop
nop
.global trap_entry
trap_entry:
sw x1, - 1*4(sp)
s... |
pouree/final | 12,305 | Final/Final_UART_FIFO/testbench/uart/uart.elf-counter_la_uart.s | .file "counter_la_uart.c"
.option nopic
.attribute arch, "rv32i2p0"
.attribute unaligned_access, 0
.attribute stack_align, 16
.text
.Ltext0:
.cfi_sections .debug_frame
.file 0 "/home/ubuntu/Desktop/Final_test-main/testbench/uart" "counter_la_uart.c"
.section .text.startup,"ax",@progbits
.align 2
.globl main
... |
ProjectEverest/frameworks_av | 5,111 | media/module/codecs/mp3dec/src/asm/pvmp3_dct_9_gcc.s | @ ------------------------------------------------------------------
@ Copyright (C) 1998-2009 PacketVideo
@
@ Licensed under the Apache License, Version 2.0 (the "License");
@ you may not use this file except in compliance with the License.
@ You may obtain a copy of the License at
@
@ http://www.apache.org/licen... |
ProjectEverest/frameworks_av | 12,906 | media/module/codecs/mp3dec/src/asm/pvmp3_dct_16_gcc.s | @ ------------------------------------------------------------------
@ Copyright (C) 1998-2009 PacketVideo
@
@ Licensed under the Apache License, Version 2.0 (the "License");
@ you may not use this file except in compliance with the License.
@ You may obtain a copy of the License at
@
@ http://www.apache.org/licen... |
ProjectEverest/frameworks_av | 10,141 | media/module/codecs/mp3dec/src/asm/pvmp3_mdct_18_gcc.s | @ ------------------------------------------------------------------
@ Copyright (C) 1998-2009 PacketVideo
@
@ Licensed under the Apache License, Version 2.0 (the "License");
@ you may not use this file except in compliance with the License.
@ You may obtain a copy of the License at
@
@ http://www.apache.org/licen... |
ProjectEverest/frameworks_av | 6,280 | media/module/codecs/mp3dec/src/asm/pvmp3_polyphase_filter_window_gcc.s | @ ------------------------------------------------------------------
@ Copyright (C) 1998-2009 PacketVideo
@
@ Licensed under the Apache License, Version 2.0 (the "License");
@ you may not use this file except in compliance with the License.
@ You may obtain a copy of the License at
@
@ http://www.apache.org/licen... |
ProjectEverest/frameworks_av | 2,769 | media/module/codecs/amrwb/enc/src/asm/ARMV5E/Dot_p_opt.s | @/*
@ ** Copyright 2003-2010, VisualOn, Inc.
@ **
@ ** Licensed under the Apache License, Version 2.0 (the "License");
@ ** you may not use this file except in compliance with the License.
@ ** You may obtain a copy of the License at
@ **
@ ** http://www.apache.org/licenses/LICENSE-2.0
@ **
@ ** Unless required by ... |
ProjectEverest/frameworks_av | 5,676 | media/module/codecs/amrwb/enc/src/asm/ARMV5E/cor_h_vec_opt.s | @/*
@ ** Copyright 2003-2010, VisualOn, Inc.
@ **
@ ** Licensed under the Apache License, Version 2.0 (the "License");
@ ** you may not use this file except in compliance with the License.
@ ** You may obtain a copy of the License at
@ **
@ ** http://www.apache.org/licenses/LICENSE-2.0
@ **
@ ** Unless required by ... |
ProjectEverest/frameworks_av | 6,726 | media/module/codecs/amrwb/enc/src/asm/ARMV5E/convolve_opt.s | @/*
@ ** Copyright 2003-2010, VisualOn, Inc.
@ **
@ ** Licensed under the Apache License, Version 2.0 (the "License");
@ ** you may not use this file except in compliance with the License.
@ ** You may obtain a copy of the License at
@ **
@ ** http://www.apache.org/licenses/LICENSE-2.0
@ **
@ ** Unless required by ... |
ProjectEverest/frameworks_av | 11,702 | media/module/codecs/amrwb/enc/src/asm/ARMV5E/Syn_filt_32_opt.s | @/*
@ ** Copyright 2003-2010, VisualOn, Inc.
@ **
@ ** Licensed under the Apache License, Version 2.0 (the "License");
@ ** you may not use this file except in compliance with the License.
@ ** You may obtain a copy of the License at
@ **
@ ** http://www.apache.org/licenses/LICENSE-2.0
@ **
@ ** Unless required by ... |
ProjectEverest/frameworks_av | 9,349 | media/module/codecs/amrwb/enc/src/asm/ARMV5E/Filt_6k_7k_opt.s | @/*
@ ** Copyright 2003-2010, VisualOn, Inc.
@ **
@ ** Licensed under the Apache License, Version 2.0 (the "License");
@ ** you may not use this file except in compliance with the License.
@ ** You may obtain a copy of the License at
@ **
@ ** http://www.apache.org/licenses/LICENSE-2.0
@ **
@ ** Unless required by ... |
ProjectEverest/frameworks_av | 6,624 | media/module/codecs/amrwb/enc/src/asm/ARMV5E/residu_asm_opt.s | @/*
@ ** Copyright 2003-2010, VisualOn, Inc.
@ **
@ ** Licensed under the Apache License, Version 2.0 (the "License");
@ ** you may not use this file except in compliance with the License.
@ ** You may obtain a copy of the License at
@ **
@ ** http://www.apache.org/licenses/LICENSE-2.0
@ **
@ ** Unless required by ... |
ProjectEverest/frameworks_av | 2,254 | media/module/codecs/amrwb/enc/src/asm/ARMV5E/scale_sig_opt.s | @/*
@ ** Copyright 2003-2010, VisualOn, Inc.
@ **
@ ** Licensed under the Apache License, Version 2.0 (the "License");
@ ** you may not use this file except in compliance with the License.
@ ** You may obtain a copy of the License at
@ **
@ ** http://www.apache.org/licenses/LICENSE-2.0
@ **
@ ** Unless required by ... |
ProjectEverest/frameworks_av | 7,933 | media/module/codecs/amrwb/enc/src/asm/ARMV5E/Norm_Corr_opt.s | @/*
@ ** Copyright 2003-2010, VisualOn, Inc.
@ **
@ ** Licensed under the Apache License, Version 2.0 (the "License");
@ ** you may not use this file except in compliance with the License.
@ ** You may obtain a copy of the License at
@ **
@ ** http://www.apache.org/licenses/LICENSE-2.0
@ **
@ ** Unless required by ... |
ProjectEverest/frameworks_av | 19,096 | media/module/codecs/amrwb/enc/src/asm/ARMV5E/pred_lt4_1_opt.s | @/*
@ ** Copyright 2003-2010, VisualOn, Inc.
@ **
@ ** Licensed under the Apache License, Version 2.0 (the "License");
@ ** you may not use this file except in compliance with the License.
@ ** You may obtain a copy of the License at
@ **
@ ** http://www.apache.org/licenses/LICENSE-2.0
@ **
@ ** Unless required by ... |
ProjectEverest/frameworks_av | 9,880 | media/module/codecs/amrwb/enc/src/asm/ARMV5E/syn_filt_opt.s | @/*
@ ** Copyright 2003-2010, VisualOn, Inc.
@ **
@ ** Licensed under the Apache License, Version 2.0 (the "License");
@ ** you may not use this file except in compliance with the License.
@ ** You may obtain a copy of the License at
@ **
@ ** http://www.apache.org/licenses/LICENSE-2.0
@ **
@ ** Unless required by ... |
ProjectEverest/frameworks_av | 3,610 | media/module/codecs/amrwb/enc/src/asm/ARMV5E/Deemph_32_opt.s | @/*
@ ** Copyright 2003-2010, VisualOn, Inc.
@ **
@ ** Licensed under the Apache License, Version 2.0 (the "License");
@ ** you may not use this file except in compliance with the License.
@ ** You may obtain a copy of the License at
@ **
@ ** http://www.apache.org/licenses/LICENSE-2.0
@ **
@ ** Unless required by ... |
ProjectEverest/frameworks_av | 6,000 | media/module/codecs/amrwb/enc/src/asm/ARMV7/cor_h_vec_neon.s | @/*
@ ** Copyright 2003-2010, VisualOn, Inc.
@ **
@ ** Licensed under the Apache License, Version 2.0 (the "License");
@ ** you may not use this file except in compliance with the License.
@ ** You may obtain a copy of the License at
@ **
@ ** http://www.apache.org/licenses/LICENSE-2.0
@ **
@ ** Unless required by ... |
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