commit_hash stringlengths 40 40 | author stringlengths 1 57 | date timestamp[s]date 2010-07-26 04:45:09 2026-04-14 18:21:10 | message stringlengths 8 1.39M | diff stringlengths 68 51.2k | files_changed int64 1 136 | insertions int64 0 2.35k | deletions int64 0 1.9k |
|---|---|---|---|---|---|---|---|
5893317a8ed496baebee3cb558cf0a17dbb95d42 | Alex Crichton | 2020-08-10T13:55:36 | Fix execution of spectest fuzzer
We've enabled bulk memory and reference types by default now which means
that wasmtime in its default settings no longer passes the spec test
suite (due to changes in error messages in initialization), so when
we're running the spec test fuzzer be sure to disable reference types
and bu... | diff --git a/crates/fuzzing/src/oracles.rs b/crates/fuzzing/src/oracles.rs
index 9a948638d..d9ce34339 100644
--- a/crates/fuzzing/src/oracles.rs
+++ b/crates/fuzzing/src/oracles.rs
@@ -406,7 +406,10 @@ pub fn make_api_calls(api: crate::generators::api::ApiCalls) {
pub fn spectest(config: crate::generators::Config, tes... | 1 | 4 | 1 |
5af47dc4cd33f04ed4b5fbf4ea36d5df559d2773 | Nick Fitzgerald | 2020-08-07T18:50:05 | cranelift: Only emit stack maps when a function actually uses reference types
This fix avoids a small slow down in scenarios where reference types are enabled
but a given function doesn't actually use them.
Fixes #1883 | diff --git a/cranelift/codegen/src/regalloc/context.rs b/cranelift/codegen/src/regalloc/context.rs
index 8aa1003d4..505b1d127 100644
--- a/cranelift/codegen/src/regalloc/context.rs
+++ b/cranelift/codegen/src/regalloc/context.rs
@@ -203,17 +203,22 @@ impl Context {
&mut self.tracker,
);
- ... | 1 | 16 | 11 |
94e4bad1e05967566f378a75bced933c1c123fae | Nick Fitzgerald | 2020-08-07T17:42:26 | Enable reference types and bulk memory operations by default | diff --git a/crates/wasmtime/src/runtime.rs b/crates/wasmtime/src/runtime.rs
index 8315c9edb..b6bff866e 100644
--- a/crates/wasmtime/src/runtime.rs
+++ b/crates/wasmtime/src/runtime.rs
@@ -94,8 +94,8 @@ impl Config {
memory_creator: None,
max_wasm_stack: 1 << 20,
wasm_threads: fal... | 2 | 21 | 31 |
c7cd70fcec3eee66c9d7b5aa6fb4580d5a802218 | Alex Crichton | 2020-08-07T21:38:01 | wasmtime: Refactor how imports are resolved (#2102)
This commit removes all import resolution handling from the
`wasmtime-jit` crate, instead moving the logic to the `wasmtime` crate.
Previously `wasmtime-jit` had a generic `Resolver` trait and would do
all the import type matching itself, but with the upcoming
mo... | diff --git a/crates/jit/src/imports.rs b/crates/jit/src/imports.rs
deleted file mode 100644
index 3c00ce4ae..000000000
--- a/crates/jit/src/imports.rs
+++ /dev/null
@@ -1,263 +0,0 @@
-//! Module imports resolving logic.
-
-use crate::resolver::Resolver;
-use more_asserts::assert_ge;
-use std::convert::TryInto;
-use was... | 15 | 209 | 407 |
08f9eb172561762a3658a289ae6a55cfc4f94a78 | Alex Crichton | 2020-08-07T20:42:40 | Making caching support optional in Wasmtime (#2119)
This commit moves all of the caching support that currently lives in
`wasmtime-environ` into a `wasmtime-cache` crate and makes it optional. The
goal here is to slim down the `wasmtime-environ` crate and clearly separate
boundaries where caching is a standalone an... | diff --git a/Cargo.lock b/Cargo.lock
index dc4d2d228..4cf980b0f 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -2373,6 +2373,7 @@ dependencies = [
"target-lexicon",
"tempfile",
"wasmparser 0.59.0",
+ "wasmtime-cache",
"wasmtime-environ",
"wasmtime-jit",
"wasmtime-profiling",
@@ -2404,6 +2405,30 @@ dependencies... | 21 | 104 | 54 |
a796d654678c76b60c637aa1a8d91f4c6682747e | Gabor Greif | 2020-08-07T18:25:18 | test_debug_parse_expressions: improve expression! macro (#2104)
Provide automatic translation to opcodes from DW_OP_* identifiers. They are looked up from gimli.
Since DW_OP_WASM_location is not contained in gimli yet, we take care of manually translating it. | diff --git a/crates/debug/src/transform/expression.rs b/crates/debug/src/transform/expression.rs
index a1a651586..8544a9678 100644
--- a/crates/debug/src/transform/expression.rs
+++ b/crates/debug/src/transform/expression.rs
@@ -600,13 +600,25 @@ impl<'a, 'b> ValueLabelRangesBuilder<'a, 'b> {
mod tests {
use supe... | 2 | 54 | 10 |
9aebca11ad7a16ab2fc4cc0e98b3def7f3a7c690 | Gabor Greif | 2020-08-07T18:23:47 | Don't GC DW_TAG_variant(_part), they are referenced (#2113)
by their respective parents.
See also #2105. | diff --git a/crates/debug/src/gc.rs b/crates/debug/src/gc.rs
index 5d72a9dd9..2df29c625 100644
--- a/crates/debug/src/gc.rs
+++ b/crates/debug/src/gc.rs
@@ -103,6 +103,8 @@ fn has_die_back_edge<R: Reader<Offset = usize>>(die: &read::DebuggingInformation
| constants::DW_TAG_template_type_parameter
| co... | 1 | 2 | 0 |
f0e32c5f715a39b23407a7c0ee6f2ea9ef28788c | Andrew Brown | 2020-08-07T17:19:07 | Fix typo (#2114) | diff --git a/crates/wiggle/tests/wasi.rs b/crates/wiggle/tests/wasi.rs
index 823d5f84d..8847959aa 100644
--- a/crates/wiggle/tests/wasi.rs
+++ b/crates/wiggle/tests/wasi.rs
@@ -14,7 +14,7 @@ wiggle::from_witx!({
// The only test in this file is to verify that the witx document provided by the
// proc macro in the `me... | 1 | 1 | 1 |
aad086899c59539e1a783e05b492a6d31941c306 | Nick Fitzgerald | 2020-08-06T23:03:16 | peepmatic: Implement maximum nesting level in parser
So that we don't blow the stack.
Fixes https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=24705 | diff --git a/cranelift/peepmatic/src/parser.rs b/cranelift/peepmatic/src/parser.rs
index 95a84c943..fae87f897 100644
--- a/cranelift/peepmatic/src/parser.rs
+++ b/cranelift/peepmatic/src/parser.rs
@@ -429,6 +429,13 @@ where
DynAstRef<'a, TOperator>: From<&'a TOperand>,
{
fn parse(p: Parser<'a>) -> ParseResul... | 1 | 10 | 0 |
174159a552959f739546eca550de28520bee1172 | Nick Fitzgerald | 2020-08-06T22:56:19 | Bump `wast` to version 22.0.0 in peepmatic crates | diff --git a/Cargo.lock b/Cargo.lock
index 0f85a443b..dc4d2d228 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -392,7 +392,7 @@ dependencies = [
"smallvec",
"target-lexicon",
"thiserror",
- "wast 15.0.0",
+ "wast 22.0.0",
]
[[package]]
@@ -1303,7 +1303,7 @@ dependencies = [
"peepmatic-test-operator",
"peepma... | 6 | 14 | 14 |
2482bd80c24a6b23ac1a259df77c61d5cc9c93a9 | Christopher Agia | 2020-08-07T16:24:42 | Caller get_export() implemented for Extern::Func. (#2108)
* Caller get_export() implemented for func
* update tests for get_export() Extern::Func return
Signed-off-by: Christopher Agia <chrisagia@google.com>
* document get_export() for Extern::Func
Signed-off-by: Christopher Agia <chrisagia@google.com> | diff --git a/crates/wasmtime/src/func.rs b/crates/wasmtime/src/func.rs
index 749f632c0..3ec3ddbb9 100644
--- a/crates/wasmtime/src/func.rs
+++ b/crates/wasmtime/src/func.rs
@@ -1421,17 +1421,21 @@ pub trait IntoFunc<Params, Results> {
/// via [`Func::wrap`].
///
/// This structure can be taken as the first parameter... | 2 | 26 | 18 |
e60a6f2ad2fca85afbd71840c8668919c330aed1 | Johnnie Birch | 2020-08-05T20:56:20 | Fixup packed integer add lowering
Remove stray print statement
Fix bug in match statement causing unreachable code. | diff --git a/cranelift/codegen/src/isa/x64/lower.rs b/cranelift/codegen/src/isa/x64/lower.rs
index 0fb250f9f..407a9a687 100644
--- a/cranelift/codegen/src/isa/x64/lower.rs
+++ b/cranelift/codegen/src/isa/x64/lower.rs
@@ -341,14 +341,13 @@ fn lower_insn_to_regs<C: LowerCtx<I = Inst>>(
// TODO For commutativ... | 1 | 4 | 5 |
f5909b37c367142ac5e9a6420a62d2a2c551e89b | Johnnie Birch | 2020-08-05T20:45:41 | Add emit tests for packed integer add instructions | diff --git a/cranelift/codegen/src/isa/x64/inst/emit_tests.rs b/cranelift/codegen/src/isa/x64/inst/emit_tests.rs
index e0f26c196..719d2566d 100644
--- a/cranelift/codegen/src/isa/x64/inst/emit_tests.rs
+++ b/cranelift/codegen/src/isa/x64/inst/emit_tests.rs
@@ -72,8 +72,8 @@ fn test_x64_emit() {
let w_xmm2 = Writab... | 1 | 29 | 2 |
dd6ba5f9d74dd84f9849708073b3dd542da7af7e | Johnnie Birch | 2020-08-05T20:18:12 | Lower packed integer add instructions (v128)
Adds lowering support for packed integer add instructions and helper
function for determining if a type for an instruction indicates it is
packed. | diff --git a/cranelift/codegen/src/isa/x64/inst/emit.rs b/cranelift/codegen/src/isa/x64/inst/emit.rs
index 22c20cc24..d40cbf7b2 100644
--- a/cranelift/codegen/src/isa/x64/inst/emit.rs
+++ b/cranelift/codegen/src/isa/x64/inst/emit.rs
@@ -1662,7 +1662,7 @@ pub(crate) fn emit(
SseOpcode::Paddb => (LegacyP... | 2 | 37 | 28 |
2eadc6e2a8b2ba1e56182b927dfe8e96adac6479 | Johnnie Birch | 2020-08-05T16:37:52 | Add packed integer add opcodes (v128) to instruction set enum | diff --git a/cranelift/codegen/src/isa/x64/inst/args.rs b/cranelift/codegen/src/isa/x64/inst/args.rs
index 7cd6a2cae..100aefe2d 100644
--- a/cranelift/codegen/src/isa/x64/inst/args.rs
+++ b/cranelift/codegen/src/isa/x64/inst/args.rs
@@ -391,6 +391,10 @@ pub enum SseOpcode {
Mulsd,
Orps,
Orpd,
+ Paddb,... | 3 | 18 | 0 |
b5a6daedc47226470609cb0ba75de1a451eb296c | Gabor Greif | 2020-08-06T19:19:43 | DW_TAG_enumerator is owned by parent tag (#2107)
so mark it as such for GC to not accidentally lose it.
Fixes https://github.com/bytecodealliance/wasmtime/issues/2105 | diff --git a/crates/debug/src/gc.rs b/crates/debug/src/gc.rs
index 6d2ff7907..5d72a9dd9 100644
--- a/crates/debug/src/gc.rs
+++ b/crates/debug/src/gc.rs
@@ -101,6 +101,7 @@ fn has_die_back_edge<R: Reader<Offset = usize>>(die: &read::DebuggingInformation
| constants::DW_TAG_try_block
| constants::DW_TA... | 1 | 1 | 0 |
d6f64ec88efcf4a63188fe5597529767538ade41 | Alex Crichton | 2020-08-06T15:08:20 | Make spectest fuzzing more deterministic
Currently spectest fuzzing indexes into a compile-time-created array of
strings which is the list of input files, but the order of this array is
dependent on the filesystem that we're reading from. This means that
inputs from oss-fuzz may not be easily reproducible locally beca... | diff --git a/crates/fuzzing/build.rs b/crates/fuzzing/build.rs
index 8b9b0a517..73d3e9d13 100644
--- a/crates/fuzzing/build.rs
+++ b/crates/fuzzing/build.rs
@@ -13,9 +13,12 @@ fn main() {
.unwrap()
.join("../../tests/spec_testsuite");
let mut code = format!("static FILES: &[(&str, &str)] = &[\n")... | 1 | 6 | 3 |
4cb36afd7b20c9cf0c4737f07425983f057b2eec | Andrew Brown | 2020-08-03T22:58:09 | machinst x64: refactor to use types::[type] everywhere
This change is a pure refactoring--no change to functionality. It removes `use crate::ir::types::*` imports and uses instead `types::I32`, e.g., throughout the x64 code. Though it increases code verbosity, this change makes it more clear where the type identifiers... | diff --git a/cranelift/codegen/src/isa/x64/abi.rs b/cranelift/codegen/src/isa/x64/abi.rs
index 543421a86..6013063ad 100644
--- a/cranelift/codegen/src/isa/x64/abi.rs
+++ b/cranelift/codegen/src/isa/x64/abi.rs
@@ -1,7 +1,7 @@
//! Implementation of the standard x64 ABI.
use crate::binemit::Stackmap;
-use crate::ir::{... | 4 | 119 | 103 |
3bf8c2066587b9ac63286bdb00cf47888ada7d95 | Pat Hickey | 2020-08-05T01:41:06 | rustfmt.... idk why my editor missed this one | diff --git a/crates/wiggle/generate/src/types/struct.rs b/crates/wiggle/generate/src/types/struct.rs
index a2b1e9399..5aaf42353 100644
--- a/crates/wiggle/generate/src/types/struct.rs
+++ b/crates/wiggle/generate/src/types/struct.rs
@@ -26,7 +26,7 @@ pub(super) fn define_struct(
} else {
... | 1 | 1 | 1 |
8264abdef3579347483b9f28a53b3958fd173458 | Pat Hickey | 2020-08-04T22:50:32 | structs tests: comprehensive proptest for struct of array | diff --git a/crates/wiggle/tests/structs.rs b/crates/wiggle/tests/structs.rs
index cb8b7ef69..f342d4487 100644
--- a/crates/wiggle/tests/structs.rs
+++ b/crates/wiggle/tests/structs.rs
@@ -1,6 +1,6 @@
use proptest::prelude::*;
use wiggle::{GuestMemory, GuestPtr};
-use wiggle_test::{impl_errno, HostMemory, MemArea, Wa... | 1 | 118 | 3 |
8cfff2695713bce54c465a16005663aa143c7385 | Andrew Brown | 2020-08-04T18:12:01 | machinst x64: implement floating point comparisons
Note that this fixes an encoding issue in which the packed single and packed double prefixes were flipped. | diff --git a/build.rs b/build.rs
index 200f532b2..42e152604 100644
--- a/build.rs
+++ b/build.rs
@@ -182,7 +182,9 @@ fn experimental_x64_should_panic(testsuite: &str, testname: &str, strategy: &str
match (testsuite, testname) {
("simd", "simd_address") => return false,
("simd", "simd_f32x4_arith"... | 4 | 143 | 83 |
7af7ac4b1b18563fdddd597d11458f23e0ce3f4f | Pat Hickey | 2020-08-04T18:21:36 | implement GuestType for arrays | diff --git a/crates/wiggle/src/guest_type.rs b/crates/wiggle/src/guest_type.rs
index 27715254a..e14cfff39 100644
--- a/crates/wiggle/src/guest_type.rs
+++ b/crates/wiggle/src/guest_type.rs
@@ -153,3 +153,30 @@ impl<'a, T> GuestType<'a> for GuestPtr<'a, T> {
ptr.cast::<u32>().write(val.offset())
}
}
+
+//... | 1 | 27 | 0 |
5d8271286a53c21a3b180d89f295cc794a49c65e | Jakub Konka | 2020-07-21T18:35:14 | Check if named type requires a lifetime and conform if does | diff --git a/crates/wiggle/generate/src/types/struct.rs b/crates/wiggle/generate/src/types/struct.rs
index 5b3a02590..a2b1e9399 100644
--- a/crates/wiggle/generate/src/types/struct.rs
+++ b/crates/wiggle/generate/src/types/struct.rs
@@ -19,7 +19,14 @@ pub(super) fn define_struct(
let member_decls = s.members.iter(... | 2 | 12 | 1 |
3d2e0e55f2c3940ba58d3f2eaa611f9913db7f94 | Alex Crichton | 2020-08-04T17:29:16 | Remove the `local` field of `Module` (#2091)
This was added long ago at this point to assist with caching, but
caching has moved to a different level such that this wonky second level
of a `Module` isn't necessary. This commit removes the `ModuleLocal`
type to simplify accessors and generally make it easier to work... | diff --git a/crates/environ/src/cranelift.rs b/crates/environ/src/cranelift.rs
index 6dbb1ec1f..4a936581b 100644
--- a/crates/environ/src/cranelift.rs
+++ b/crates/environ/src/cranelift.rs
@@ -302,17 +302,17 @@ impl Compiler for Cranelift {
input: &FunctionBodyData<'_>,
isa: &dyn isa::TargetIsa,
... | 26 | 131 | 164 |
c21fe0eb73259e45719b3cd55b6dddd6f6f40979 | Andrew Brown | 2020-08-03T23:17:17 | machinst x64: use assert_eq! when possible | diff --git a/cranelift/codegen/src/isa/x64/inst/emit.rs b/cranelift/codegen/src/isa/x64/inst/emit.rs
index b47e0ee7f..26fd5a894 100644
--- a/cranelift/codegen/src/isa/x64/inst/emit.rs
+++ b/cranelift/codegen/src/isa/x64/inst/emit.rs
@@ -1949,9 +1949,9 @@ pub(crate) fn emit(
//
// done:
- ... | 2 | 19 | 20 |
999e04a2c48fcddedf7bcfb4dd64ec06d6a92ba6 | Andrew Brown | 2020-08-03T23:41:49 | machinst x64: refactor imports to use rustfmt convention
This change is a pure refactoring--no change to functionality. It removes newlines between the `use ...` statements in the x64 backend so that rustfmt can format them according to its convention. I noticed some files had followed a manual convention but subseque... | diff --git a/cranelift/codegen/src/isa/x64/abi.rs b/cranelift/codegen/src/isa/x64/abi.rs
index 0da1a5cd3..543421a86 100644
--- a/cranelift/codegen/src/isa/x64/abi.rs
+++ b/cranelift/codegen/src/isa/x64/abi.rs
@@ -1,20 +1,17 @@
//! Implementation of the standard x64 ABI.
-use log::trace;
-use regalloc::{RealReg, Reg,... | 7 | 45 | 67 |
ef122a72d2e1a100264de370e2fd0cc434f5f9e3 | Andrew Brown | 2020-08-03T18:44:31 | clif-util: add option for controlling terminal colors
On @fitzgen's suggestion, this change adds a `--color` option for controlling whether the `clif-util` output prints with ANSI color escape sequences. Only `clif-util wasm ...` currently uses this new option. The option has three variants:
- `--color auto`, the def... | diff --git a/cranelift/src/clif-util.rs b/cranelift/src/clif-util.rs
index 2a8f37664..f1667bf65 100644
--- a/cranelift/src/clif-util.rs
+++ b/cranelift/src/clif-util.rs
@@ -13,7 +13,7 @@
)
)]
-use clap::{App, Arg, SubCommand};
+use clap::{arg_enum, App, Arg, SubCommand};
use cranelift_codegen::dbg::LOG_FILENAM... | 2 | 69 | 16 |
39937c60af50f125fe46a5d42774a0a5c2deb120 | Andrew Brown | 2020-08-03T17:20:49 | clif-util: only print color escape sequences in verbose mode
`clif-util wasm ...` has functionality to print extra information in color when verbose mode (`-v`) is specified. Previously, the ANSI color escape sequences were printed regardless of whether `-v` was used so that users that captured output of this command ... | diff --git a/cranelift/src/wasm.rs b/cranelift/src/wasm.rs
index fc282b31b..a688f4e8a 100644
--- a/cranelift/src/wasm.rs
+++ b/cranelift/src/wasm.rs
@@ -21,20 +21,33 @@ use std::path::Path;
use std::path::PathBuf;
use term;
+/// For verbose printing: only print if the `$x` expression is true.
macro_rules! vprintln... | 1 | 34 | 21 |
026fb8d388964c7c1bace7019c4fe0d63c584560 | Alex Crichton | 2020-08-03T14:59:20 | Don't re-parse wasm for debuginfo (#2085)
* Don't re-parse wasm for debuginfo
This commit updates debuginfo parsing to happen during the main
translation of the original wasm module. This avoid re-parsing the wasm
module twice (at least the section-level headers). Additionally this
ties debuginfo directly to a `... | diff --git a/Cargo.lock b/Cargo.lock
index 5235a3861..4bc45bbde 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -2466,6 +2466,7 @@ dependencies = [
"errno",
"file-per-thread-logger",
"filetime",
+ "gimli 0.21.0",
"indexmap",
"lazy_static",
"libc",
diff --git a/cranelift/wasm/src/environ/dummy.rs b/cranelift/was... | 18 | 260 | 376 |
e108f14620509f565d560405e0e822a2c770464b | Benjamin Bouvier | 2020-07-27T17:26:37 | machinst x64: use xor/xorpss/xorpd to generate zero constants; | diff --git a/cranelift/codegen/src/isa/x64/inst/args.rs b/cranelift/codegen/src/isa/x64/inst/args.rs
index 8037df9ba..a08ea230c 100644
--- a/cranelift/codegen/src/isa/x64/inst/args.rs
+++ b/cranelift/codegen/src/isa/x64/inst/args.rs
@@ -210,6 +210,13 @@ impl RegMemImm {
Self::Imm { .. } => {}
}
... | 4 | 133 | 63 |
dd098656111396afa58e90084a705744e836bf10 | Chris Fallin | 2020-07-31T02:07:47 | Fix MachBuffer branch handling with redirect chains.
When one branch target label in a MachBuffer is redirected to another,
we eventually fix up branches targetting the first to refer to the
redirected target instead. Separately, we have a branch-folding
optimization that, when an unconditional branch occurs as the on... | diff --git a/cranelift/codegen/src/machinst/buffer.rs b/cranelift/codegen/src/machinst/buffer.rs
index 2d28f3528..af118508f 100644
--- a/cranelift/codegen/src/machinst/buffer.rs
+++ b/cranelift/codegen/src/machinst/buffer.rs
@@ -178,9 +178,12 @@ pub struct MachBuffer<I: VCodeInst> {
label_offsets: SmallVec<[CodeOf... | 1 | 196 | 9 |
0306f247273f796fb72f28cb28e1b4cad18627d7 | Andrew Brown | 2020-07-30T16:50:02 | machinst x64: enable initial SIMD spec tests | diff --git a/build.rs b/build.rs
index 5698adac4..200f532b2 100644
--- a/build.rs
+++ b/build.rs
@@ -180,6 +180,10 @@ fn experimental_x64_should_panic(testsuite: &str, testname: &str, strategy: &str
}
match (testsuite, testname) {
+ ("simd", "simd_address") => return false,
+ ("simd", "simd_f3... | 1 | 4 | 0 |
999fa00d6ae0847eafd1d43006eeb8218629b40d | Andrew Brown | 2020-07-29T21:14:38 | machinst x64: add loading of inline 128-bit constants
Eventually the `load + jmp + constant` pattern should be replaced with just `load` once constant pools are more tightly integrated. | diff --git a/cranelift/codegen/src/isa/x64/inst/emit.rs b/cranelift/codegen/src/isa/x64/inst/emit.rs
index d31b2e8b9..da6be3eb4 100644
--- a/cranelift/codegen/src/isa/x64/inst/emit.rs
+++ b/cranelift/codegen/src/isa/x64/inst/emit.rs
@@ -1,6 +1,6 @@
use crate::binemit::Reloc;
use crate::ir::immediates::{Ieee32, Ieee64... | 3 | 71 | 1 |
eda5c6d37064e87834aff45389462b0101c07220 | Andrew Brown | 2020-07-24T19:50:40 | machinst x64: add packed FP negation | diff --git a/cranelift/codegen/src/isa/x64/lower.rs b/cranelift/codegen/src/isa/x64/lower.rs
index 6143df392..dd59ba07e 100644
--- a/cranelift/codegen/src/isa/x64/lower.rs
+++ b/cranelift/codegen/src/isa/x64/lower.rs
@@ -1327,27 +1327,72 @@ fn lower_insn_to_regs<C: LowerCtx<I = Inst>>(
// - to compute the ... | 1 | 64 | 19 |
c74a9d122541bbf2440dd62911a1e23645579c58 | Andrew Brown | 2020-07-24T19:49:36 | machinst x64: add packed shifts | diff --git a/cranelift/codegen/src/isa/x64/inst/args.rs b/cranelift/codegen/src/isa/x64/inst/args.rs
index c80db41f0..8037df9ba 100644
--- a/cranelift/codegen/src/isa/x64/inst/args.rs
+++ b/cranelift/codegen/src/isa/x64/inst/args.rs
@@ -185,7 +185,7 @@ pub enum RegMemImm {
impl RegMemImm {
pub(crate) fn reg(reg... | 4 | 123 | 1 |
0398033447385ee47956c0fa45cbc6a63379fe5e | Andrew Brown | 2020-07-24T19:46:49 | machinst x64: add packed FP comparisons
Re-orders the SseOpcode variants alphabetically. | diff --git a/cranelift/codegen/src/isa/x64/inst/args.rs b/cranelift/codegen/src/isa/x64/inst/args.rs
index 2351ac889..c80db41f0 100644
--- a/cranelift/codegen/src/isa/x64/inst/args.rs
+++ b/cranelift/codegen/src/isa/x64/inst/args.rs
@@ -12,6 +12,7 @@ use super::{
regs::{self, show_ireg_sized},
EmitState,
};
... | 4 | 149 | 9 |
e3bd8d696bc920e26d362bac4c0604c2c7484c64 | Andrew Brown | 2020-07-24T19:39:04 | machinst x64: add basic packed FP arithmetic
Includes instruction definition of packed min/max. | diff --git a/cranelift/codegen/src/isa/x64/inst/args.rs b/cranelift/codegen/src/isa/x64/inst/args.rs
index 634d4eb6e..2351ac889 100644
--- a/cranelift/codegen/src/isa/x64/inst/args.rs
+++ b/cranelift/codegen/src/isa/x64/inst/args.rs
@@ -333,6 +333,8 @@ pub(crate) enum InstructionSet {
/// Some SSE operations requiring... | 3 | 110 | 54 |
77cc2f69c1736180643d1042a4b2a8558441109d | Andrew Brown | 2020-07-24T19:31:28 | machinst x64: allow use of vector-length types | diff --git a/cranelift/codegen/src/isa/x64/abi.rs b/cranelift/codegen/src/isa/x64/abi.rs
index 1989fb8dc..a6e9e1db4 100644
--- a/cranelift/codegen/src/isa/x64/abi.rs
+++ b/cranelift/codegen/src/isa/x64/abi.rs
@@ -93,6 +93,7 @@ fn in_int_reg(ty: types::Type) -> bool {
fn in_vec_reg(ty: types::Type) -> bool {
match... | 5 | 54 | 19 |
dc6220b87caa84eefd92067b0f87ed90ade7c0ef | Andrew Brown | 2020-07-24T19:27:51 | machinst x64: add uses for crate dependencies | diff --git a/cranelift/codegen/src/isa/x64/inst/emit.rs b/cranelift/codegen/src/isa/x64/inst/emit.rs
index 91fd5a117..ecfa10454 100644
--- a/cranelift/codegen/src/isa/x64/inst/emit.rs
+++ b/cranelift/codegen/src/isa/x64/inst/emit.rs
@@ -1,14 +1,13 @@
+use crate::binemit::Reloc;
+use crate::ir::immediates::{Ieee32, Ieee... | 1 | 7 | 8 |
e70f73211dc0db2e7432287695497eee397dd2a8 | Daiki Ueno | 2020-07-29T12:19:17 | virtfs file: update cursor position on fd_read (#2070)
* virtfs file: update cursor position on fd_read
If a handle is backed by InMemoryFile, fd_read (turned into
Handle::read_vectored) doesn't update the cursor position properly and
thus prevents the caller from detecting EOF.
* virtfs file: fd_{pread,pwrite... | diff --git a/crates/test-programs/wasi-tests/src/bin/file_pread_pwrite.rs b/crates/test-programs/wasi-tests/src/bin/file_pread_pwrite.rs
index d039670c9..e2cce746a 100644
--- a/crates/test-programs/wasi-tests/src/bin/file_pread_pwrite.rs
+++ b/crates/test-programs/wasi-tests/src/bin/file_pread_pwrite.rs
@@ -1,5 +1,6 @@... | 3 | 92 | 6 |
adf25d27c2cca3d1cb86584c07f370a7d7d62abb | Anton Kirilov | 2020-07-24T10:50:50 | AArch64: Implement SIMD floating-point arithmetic
Copyright (c) 2020, Arm Limited. | diff --git a/build.rs b/build.rs
index b551b80ee..753e28b80 100644
--- a/build.rs
+++ b/build.rs
@@ -185,7 +185,11 @@ fn ignore(testsuite: &str, testname: &str, strategy: &str) -> bool {
("simd", "simd_bitwise") => return false,
("simd", "simd_bit_shift") => return false,
("simd",... | 5 | 248 | 38 |
71025e383dc44439bafbe4dc8db367208b4a3e2c | Nick Fitzgerald | 2020-07-28T13:55:10 | deps: Update libfuzzer-sys to 0.3.3 (#2072)
This update gives us access to the new Entropic fuzzing engine:
https://mboehme.github.io/paper/FSE20.Entropy.pdf | diff --git a/Cargo.lock b/Cargo.lock
index dcc792064..5235a3861 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -1104,9 +1104,9 @@ checksum = "a9f8082297d534141b30c8d39e9b1773713ab50fdbe4ff30f750d063b3bfd701"
[[package]]
name = "libfuzzer-sys"
-version = "0.3.2"
+version = "0.3.3"
source = "registry+https://github.com... | 2 | 3 | 3 |
7f109a51987fa03f8fbacf80358cb40358c363d8 | Benjamin Bouvier | 2020-07-28T09:07:16 | machinst x64: use a sign-extension when loading jump table offsets;
The jump table offset that's loaded out of the jump table could be
signed (if it's an offset to before the jump table itself), so we should
use a signed extension there, not an unsigned extension. | diff --git a/cranelift/codegen/src/isa/x64/inst/emit.rs b/cranelift/codegen/src/isa/x64/inst/emit.rs
index 7194ef92a..91fd5a117 100644
--- a/cranelift/codegen/src/isa/x64/inst/emit.rs
+++ b/cranelift/codegen/src/isa/x64/inst/emit.rs
@@ -1462,7 +1462,7 @@ pub(crate) fn emit(
// jnb $default_target
... | 3 | 12 | 5 |
35d9ab19b727c2050b7579d8e0b73c4f5303e30d | Benjamin Bouvier | 2020-07-24T15:04:34 | Review fixes; | diff --git a/cranelift/codegen/shared/src/condcodes.rs b/cranelift/codegen/shared/src/condcodes.rs
index 2695b5b47..03ae865ce 100644
--- a/cranelift/codegen/shared/src/condcodes.rs
+++ b/cranelift/codegen/shared/src/condcodes.rs
@@ -122,27 +122,6 @@ impl IntCC {
}
}
- /// Determines whether this cond... | 8 | 191 | 145 |
ad4a2f919f62d38a19846f41b52d1943df975f11 | Benjamin Bouvier | 2020-07-23T14:19:56 | machinst x64: implement support for reference types; | diff --git a/cranelift/codegen/src/isa/x64/abi.rs b/cranelift/codegen/src/isa/x64/abi.rs
index d1368a455..1989fb8dc 100644
--- a/cranelift/codegen/src/isa/x64/abi.rs
+++ b/cranelift/codegen/src/isa/x64/abi.rs
@@ -83,7 +83,9 @@ fn in_int_reg(ty: types::Type) -> bool {
| types::B8
| types::B16
... | 5 | 107 | 23 |
987c616bf592f7837c3912fb52a192dcfdd3b39c | Benjamin Bouvier | 2020-07-23T12:57:23 | machinst x64: implement support for dynamic heaps and explicit bound checks; | diff --git a/cranelift/codegen/shared/src/condcodes.rs b/cranelift/codegen/shared/src/condcodes.rs
index 03ae865ce..2695b5b47 100644
--- a/cranelift/codegen/shared/src/condcodes.rs
+++ b/cranelift/codegen/shared/src/condcodes.rs
@@ -122,6 +122,27 @@ impl IntCC {
}
}
+ /// Determines whether this cond... | 5 | 109 | 35 |
2e3ad3227dac364b369bac4b727b5b58add0ab7c | Benjamin Bouvier | 2020-07-23T12:12:12 | machinst x64: fix encoding of movzx/movsx with non-ABCD input registers;
Using an input register that doesn't belong to the ABCD family (al,
etc.) as the source of movsx/movzx requires a redundant REX prefix, that
was not emitted. | diff --git a/cranelift/codegen/src/isa/x64/inst/emit.rs b/cranelift/codegen/src/isa/x64/inst/emit.rs
index 00d1a0777..e58a03a1e 100644
--- a/cranelift/codegen/src/isa/x64/inst/emit.rs
+++ b/cranelift/codegen/src/isa/x64/inst/emit.rs
@@ -815,7 +815,7 @@ pub(crate) fn emit(
dst,
srcloc,
... | 2 | 55 | 20 |
de4923356a9d4819302bf3617eba048a5b01b6e4 | Benjamin Bouvier | 2020-07-23T08:39:54 | machinst x64: fix fcmp comparison for NotEqual;
We have to emit both checks against the parity bit (for unordered) and
non-equality bit (for equality), otherwise this returns false when
comparing NaN against itself. | diff --git a/cranelift/codegen/src/isa/x64/lower.rs b/cranelift/codegen/src/isa/x64/lower.rs
index 3bfac07a4..feb72703c 100644
--- a/cranelift/codegen/src/isa/x64/lower.rs
+++ b/cranelift/codegen/src/isa/x64/lower.rs
@@ -829,24 +829,27 @@ fn lower_insn_to_regs<C: LowerCtx<I = Inst>>(
// Less than by ZF, PF... | 1 | 39 | 18 |
4b26f5b1201e0fa3c8d648c575b8d2ce15b1a4d0 | Benjamin Bouvier | 2020-07-22T09:59:59 | machinst x64: baldrdash: fix multi-value when both gpr and xmm are returned;
In baldrdash, only the first return value may live in a register, be it
an integer or a floating point value. | diff --git a/cranelift/codegen/src/isa/x64/abi.rs b/cranelift/codegen/src/isa/x64/abi.rs
index 6cd92a5a6..d1368a455 100644
--- a/cranelift/codegen/src/isa/x64/abi.rs
+++ b/cranelift/codegen/src/isa/x64/abi.rs
@@ -129,15 +129,19 @@ fn get_fltreg_for_arg_systemv(call_conv: &CallConv, idx: usize) -> Option<Reg> {
}
... | 1 | 16 | 8 |
aa103698d48c968b126a8c209bd5f9b4061630ac | Benjamin Bouvier | 2020-07-21T16:54:50 | machinst x64: extend Copysign to work for f64 inputs too; | diff --git a/cranelift/codegen/src/isa/x64/inst/args.rs b/cranelift/codegen/src/isa/x64/inst/args.rs
index 0b64f3bb4..162ed8c2d 100644
--- a/cranelift/codegen/src/isa/x64/inst/args.rs
+++ b/cranelift/codegen/src/isa/x64/inst/args.rs
@@ -339,6 +339,7 @@ pub enum SseOpcode {
Andps,
Andpd,
Andnps,
+ Andn... | 3 | 59 | 40 |
694af3aec20a80310766bab7a16a5b6b9b2422e1 | Benjamin Bouvier | 2020-07-21T16:04:33 | machinst x64: implement float Floor/Ceil/Trunc/Nearest as VM calls; | diff --git a/cranelift/codegen/meta/src/shared/settings.rs b/cranelift/codegen/meta/src/shared/settings.rs
index 88db45d9e..030fffc0a 100644
--- a/cranelift/codegen/meta/src/shared/settings.rs
+++ b/cranelift/codegen/meta/src/shared/settings.rs
@@ -270,7 +270,7 @@ pub(crate) fn define() -> SettingGroup {
"enab... | 6 | 147 | 15 |
48ec806a9dd8390b1996da84a0f2cfa976918e9d | Benjamin Bouvier | 2020-07-21T12:58:14 | machinst x64: implement Fabs/Fneg in terms of other instructions; | diff --git a/cranelift/codegen/src/isa/x64/inst/args.rs b/cranelift/codegen/src/isa/x64/inst/args.rs
index 713b783f3..0b64f3bb4 100644
--- a/cranelift/codegen/src/isa/x64/inst/args.rs
+++ b/cranelift/codegen/src/isa/x64/inst/args.rs
@@ -377,6 +377,8 @@ pub enum SseOpcode {
Subsd,
Ucomiss,
Ucomisd,
+ X... | 3 | 43 | 2 |
03b9e1e86a26a788faa4fca627971d20d2a3c353 | Benjamin Bouvier | 2020-07-21T12:27:44 | machinst x64: implement float min/max with the right semantics; | diff --git a/cranelift/codegen/src/isa/x64/inst/args.rs b/cranelift/codegen/src/isa/x64/inst/args.rs
index 2387af0ec..713b783f3 100644
--- a/cranelift/codegen/src/isa/x64/inst/args.rs
+++ b/cranelift/codegen/src/isa/x64/inst/args.rs
@@ -337,6 +337,7 @@ pub enum SseOpcode {
Addss,
Addsd,
Andps,
+ Andpd... | 4 | 168 | 0 |
e43310a088aceaa46fbdc810e15a85f6dee10806 | Benjamin Bouvier | 2020-07-22T14:46:12 | machinst x64: adapt conversions for saturation behaviors; | diff --git a/cranelift/codegen/src/isa/x64/inst/emit.rs b/cranelift/codegen/src/isa/x64/inst/emit.rs
index 09b095762..1fe72b4ff 100644
--- a/cranelift/codegen/src/isa/x64/inst/emit.rs
+++ b/cranelift/codegen/src/isa/x64/inst/emit.rs
@@ -1672,7 +1672,7 @@ pub(crate) fn emit(
// mov %src, %tmp_gpr2
... | 3 | 213 | 109 |
cd54f05efd2c30da625ef27e173323f3a5ee6321 | Benjamin Bouvier | 2020-07-16T16:09:29 | machinst x64: implement float-to-int and int-to-float conversions; | diff --git a/cranelift/codegen/src/isa/x64/inst/args.rs b/cranelift/codegen/src/isa/x64/inst/args.rs
index 5697d2dbb..2387af0ec 100644
--- a/cranelift/codegen/src/isa/x64/inst/args.rs
+++ b/cranelift/codegen/src/isa/x64/inst/args.rs
@@ -332,7 +332,7 @@ pub(crate) enum InstructionSet {
/// Some scalar SSE operations ... | 5 | 950 | 46 |
42127aac4e974dd6aaf8dfe553d60fa0bcf069dd | Yury Delendik | 2020-07-23T17:10:13 | Refactor Cache logic to include debug information (#2065)
* move caching to the CompilationArtifacts
* mv cache_config from Compiler to CompiledModule
* hash isa flags
* no cache for wasm2obj
* mv caching to wasmtime crate
* account each Compiler field when hash | diff --git a/crates/environ/src/cache.rs b/crates/environ/src/cache.rs
index cf9aed788..e1186ce28 100644
--- a/crates/environ/src/cache.rs
+++ b/crates/environ/src/cache.rs
@@ -14,6 +14,7 @@ mod worker;
pub use config::{create_new_config, CacheConfig};
use worker::Worker;
+/// Module level cache entry.
pub struct ... | 11 | 92 | 128 |
2b9fefe89a232bad2c7d209c49cf9b583719a763 | Chris Fallin | 2020-07-23T02:55:00 | Add timing for several new-backend stages.
This PR adds a bit more granularity to the output of e.g. `clif-util
compile -T`, indicating how much time is spent in VCode lowering and
various other new-backend-specific tasks. | diff --git a/cranelift/codegen/src/machinst/buffer.rs b/cranelift/codegen/src/machinst/buffer.rs
index edbb2a2a5..bcdc9449a 100644
--- a/cranelift/codegen/src/machinst/buffer.rs
+++ b/cranelift/codegen/src/machinst/buffer.rs
@@ -143,6 +143,7 @@
use crate::binemit::{Addend, CodeOffset, CodeSink, Reloc, Stackmap};
use ... | 4 | 18 | 2 |
b8f6d53a6bdf861e66093a046a081c886546cdf1 | Chris Fallin | 2020-07-21T21:04:23 | Aarch64 codegen: represent bool `true` as -1, not 1.
It seems that this is actually the correct behavior for bool types wider
than `b1`; some of the vector instruction optimizations depend on bool
lanes representing false and true as all-zeroes and all-ones
respectively. For `b8`..`b64`, this results in an extra negat... | diff --git a/cranelift/codegen/src/isa/aarch64/inst/emit.rs b/cranelift/codegen/src/isa/aarch64/inst/emit.rs
index 0b93effad..302f388d3 100644
--- a/cranelift/codegen/src/isa/aarch64/inst/emit.rs
+++ b/cranelift/codegen/src/isa/aarch64/inst/emit.rs
@@ -1380,13 +1380,6 @@ impl MachInstEmit for Inst {
&Inst:... | 5 | 108 | 70 |
8a04fc3cdc481e458871cec939eadc07c436003f | Alex Crichton | 2020-07-22T15:32:53 | Refactor wasmtime's internal cache slightly (#2057)
Be more generic over the type being serialized, and remove an
intermediate struct which was only used for serialization but isn't
necessary. | diff --git a/crates/environ/src/cache.rs b/crates/environ/src/cache.rs
index 5b1788216..cf9aed788 100644
--- a/crates/environ/src/cache.rs
+++ b/crates/environ/src/cache.rs
@@ -1,8 +1,3 @@
-use crate::address_map::{ModuleAddressMap, ValueLabelsRanges};
-use crate::compilation::{Compilation, Relocations, StackMaps, Trap... | 5 | 55 | 108 |
5355c3e3d52e506d83724fa10ead7dd9213f83b3 | Joey Gouly | 2020-07-22T11:50:29 | arm64: Implement Vselect opcode
This is implemented the same as Bitselect, as the controlling vector
is a boolean vector. A boolean vector in cranelift has elements
that are either 0 or all 1s, so it can be used to select elements
lane wise.
Copyright (c) 2020, Arm Limited. | diff --git a/cranelift/codegen/src/isa/aarch64/lower_inst.rs b/cranelift/codegen/src/isa/aarch64/lower_inst.rs
index 9dec7f9c7..a14928db5 100644
--- a/cranelift/codegen/src/isa/aarch64/lower_inst.rs
+++ b/cranelift/codegen/src/isa/aarch64/lower_inst.rs
@@ -1152,9 +1152,10 @@ pub(crate) fn lower_insn_to_regs<C: LowerCtx... | 1 | 2 | 2 |
420c4f06b892ea4f0f37c965e6e845ed6c6842af | Anton Kirilov | 2020-07-02T11:03:35 | AArch64: Improve code generation for Extractlane + Sextend / Uextend
Copyright (c) 2020, Arm Limited. | diff --git a/cranelift/codegen/src/isa/aarch64/inst/emit.rs b/cranelift/codegen/src/isa/aarch64/inst/emit.rs
index 0b93effad..57960fb02 100644
--- a/cranelift/codegen/src/isa/aarch64/inst/emit.rs
+++ b/cranelift/codegen/src/isa/aarch64/inst/emit.rs
@@ -1272,6 +1272,38 @@ impl MachInstEmit for Inst {
... | 4 | 144 | 13 |
17b99cc9c897a5ea3204eba711d94acc3d198780 | Nick Fitzgerald | 2020-07-21T16:42:15 | examples: Add a GC call to the externref Rust example | diff --git a/examples/externref.rs b/examples/externref.rs
index b301dba24..c42b54346 100644
--- a/examples/externref.rs
+++ b/examples/externref.rs
@@ -46,6 +46,9 @@ fn main() -> Result<()> {
assert!(ret.is_some());
assert!(ret.unwrap().ptr_eq(&externref));
+ println!("GCing within the store...");
+ ... | 1 | 3 | 0 |
4c15a4daf21ac2fbe4276305d8a9af48194318fc | Dan Gohman | 2020-07-20T17:02:45 | Use AsRef<Path> instead of AsRef<OsStr> in yanix functions (#1950)
* Use AsRef<Path> instead of AsRef<OsStr> in yanix functions.
`AsRef<Path>` makes these more consistent with `std` interfaces, making
them easier to use outside of wasi-common.
Also, refactor the conversion to `CString` into a helper function.
... | diff --git a/crates/wasi-common/yanix/src/file.rs b/crates/wasi-common/yanix/src/file.rs
index 10f4aa6a0..1764d2912 100644
--- a/crates/wasi-common/yanix/src/file.rs
+++ b/crates/wasi-common/yanix/src/file.rs
@@ -1,4 +1,4 @@
-use crate::{from_result, from_success_code};
+use crate::{cstr, from_result, from_success_code... | 6 | 50 | 41 |
a7cedf3100e12eac4ecb35cb65c66b78a035b9f8 | Johnnie Birch | 2020-07-11T01:04:16 | Add support for 32 bit and 64 bit fcmp for the new backend
Implements commiss and commisd. | diff --git a/cranelift/codegen/src/isa/x64/inst/args.rs b/cranelift/codegen/src/isa/x64/inst/args.rs
index e624670a4..5697d2dbb 100644
--- a/cranelift/codegen/src/isa/x64/inst/args.rs
+++ b/cranelift/codegen/src/isa/x64/inst/args.rs
@@ -5,7 +5,7 @@ use std::string::{String, ToString};
use regalloc::{RealRegUniverse,... | 5 | 201 | 7 |
fbc05faa4974b7bb4aca51a04e84624ba7f72f59 | Alex Crichton | 2020-07-17T19:46:02 | Fix `wasm_val_copy` for null funcref/externref (#2041)
This commit fixes `Clone for wasm_val_t` to avoid attempting to chase a
null pointer. It also fixes the implementation for `FuncRef` values by
cloning their internal `wasm_ref_t` as well. | diff --git a/crates/c-api/src/val.rs b/crates/c-api/src/val.rs
index 4c7777dd1..b92dd7b65 100644
--- a/crates/c-api/src/val.rs
+++ b/crates/c-api/src/val.rs
@@ -37,18 +37,19 @@ impl Drop for wasm_val_t {
impl Clone for wasm_val_t {
fn clone(&self) -> Self {
- match into_valtype(self.kind) {
- ... | 1 | 13 | 23 |
3aeab23bf175a6298c01d59273e4d11d290cd7ed | Alex Crichton | 2020-07-17T19:45:55 | Fix leaking funcrefs in the C API (#2040)
This commit adds a case to the destructor of `wasm_val_t` to be sure to
deallocate the `Box<wasm_ref_t>`. | diff --git a/crates/c-api/src/val.rs b/crates/c-api/src/val.rs
index 243df313f..4c7777dd1 100644
--- a/crates/c-api/src/val.rs
+++ b/crates/c-api/src/val.rs
@@ -25,7 +25,7 @@ pub union wasm_val_union {
impl Drop for wasm_val_t {
fn drop(&mut self) {
match into_valtype(self.kind) {
- ValType::E... | 1 | 1 | 1 |
c3ff0754d4f2a28a7438a90319b062fa407ce143 | Alex Crichton | 2020-07-17T17:05:42 | Fix a panic with `Func::new` and reference types (#2039)
Currently `Func::new` will panic if one of the arguments of the function
is a reference type and the `Store` doesn't have reference types
enabled. This happens because cranelift isn't configure to enable stack
maps but the register allocators expects them to ... | diff --git a/crates/wasmtime/src/runtime.rs b/crates/wasmtime/src/runtime.rs
index cbba86eaf..94eea934c 100644
--- a/crates/wasmtime/src/runtime.rs
+++ b/crates/wasmtime/src/runtime.rs
@@ -609,6 +609,12 @@ impl Config {
.finish(settings::Flags::new(self.flags.clone()))
}
+ pub(crate) fn target_is... | 3 | 25 | 1 |
4f4edc7aef2dbed6a5998c703f8544fcd7048c67 | Nikolay Volf | 2020-07-17T14:14:53 | Remove spam from "do_remove_constant_phis" | diff --git a/cranelift/codegen/src/remove_constant_phis.rs b/cranelift/codegen/src/remove_constant_phis.rs
index 26a9dc8de..234d89c26 100644
--- a/cranelift/codegen/src/remove_constant_phis.rs
+++ b/cranelift/codegen/src/remove_constant_phis.rs
@@ -1,7 +1,5 @@
//! A Constant-Phi-Node removal pass.
-use log::info;
-
... | 1 | 1 | 3 |
40473dffed09eeb07774a7db8f9acef2f08b96cc | Joey Gouly | 2020-07-17T14:58:16 | arm64: Enable arith2 tests
Copyright (c) 2020, Arm Limited. | diff --git a/build.rs b/build.rs
index 95c4b03b6..b551b80ee 100644
--- a/build.rs
+++ b/build.rs
@@ -188,12 +188,15 @@ fn ignore(testsuite: &str, testname: &str, strategy: &str) -> bool {
("simd", "simd_f32x4_cmp") => return false,
("simd", "simd_f64x2_cmp") => return false,
("sim... | 5 | 308 | 11 |
4971d9ee8059dc4af87157a1cefd512db6bb40a3 | bjorn3 | 2020-07-15T17:20:50 | Merge {make_incoming,get_outgoing}_{,struct_}arg | diff --git a/cranelift/codegen/src/ir/stackslot.rs b/cranelift/codegen/src/ir/stackslot.rs
index cba28dede..bad79df5f 100644
--- a/cranelift/codegen/src/ir/stackslot.rs
+++ b/cranelift/codegen/src/ir/stackslot.rs
@@ -286,12 +286,7 @@ impl StackSlots {
}
/// Create a stack slot representing an incoming funct... | 3 | 23 | 29 |
0d4fa6d32a6d08a793bfa8bf21dbe6d5194bd914 | bjorn3 | 2020-07-15T17:19:07 | Fix review comments | diff --git a/cranelift/codegen/meta/src/shared/instructions.rs b/cranelift/codegen/meta/src/shared/instructions.rs
index f0b6f5573..762ec30a1 100644
--- a/cranelift/codegen/meta/src/shared/instructions.rs
+++ b/cranelift/codegen/meta/src/shared/instructions.rs
@@ -1865,7 +1865,7 @@ pub(crate) fn define(
let Sarg... | 3 | 34 | 28 |
bab337fc32cdea7a5095d580367825bea5fb269b | Benjamin Bouvier | 2020-07-16T13:19:38 | Address review comments; | diff --git a/cranelift/codegen/src/isa/x64/abi.rs b/cranelift/codegen/src/isa/x64/abi.rs
index cc8c41dea..dadaa6e35 100644
--- a/cranelift/codegen/src/isa/x64/abi.rs
+++ b/cranelift/codegen/src/isa/x64/abi.rs
@@ -94,10 +94,10 @@ fn in_vec_reg(ty: types::Type) -> bool {
}
fn get_intreg_for_arg_systemv(call_conv: &Ca... | 6 | 213 | 127 |
ea33ce9116a4d77a3517e6d4f6139ce4b8678f2a | Benjamin Bouvier | 2020-07-06T16:43:04 | machinst x64: basic support for baldrdash
+ fix multi-value support | diff --git a/cranelift/codegen/src/isa/x64/abi.rs b/cranelift/codegen/src/isa/x64/abi.rs
index f1fe5ec21..4adbf966c 100644
--- a/cranelift/codegen/src/isa/x64/abi.rs
+++ b/cranelift/codegen/src/isa/x64/abi.rs
@@ -7,7 +7,7 @@ use std::mem;
use crate::binemit::Stackmap;
use crate::ir::{self, types, types::*, Argument... | 3 | 217 | 102 |
00b38c91f63b3619c38e82c654143cbdec2ca0c2 | Benjamin Bouvier | 2020-07-08T14:49:44 | machinst x64: fix generation of RegMemImm immediate operands; | diff --git a/cranelift/codegen/src/isa/x64/lower.rs b/cranelift/codegen/src/isa/x64/lower.rs
index 0a985ff71..97d06bf3d 100644
--- a/cranelift/codegen/src/isa/x64/lower.rs
+++ b/cranelift/codegen/src/isa/x64/lower.rs
@@ -175,11 +175,11 @@ fn input_to_reg_mem(ctx: Ctx, spec: InsnInput) -> RegMem {
/// TODO: handle memo... | 1 | 5 | 5 |
1430c5e4360df89a9a32dcf84ba0d9f52fc4082c | Benjamin Bouvier | 2020-07-08T13:37:03 | machinst x64: fix index handling of jump table;
The index should be truncated to 32 bits before being used for the jump
table entry computation. | diff --git a/cranelift/codegen/src/isa/x64/inst/emit.rs b/cranelift/codegen/src/isa/x64/inst/emit.rs
index 4a28a306e..3fd314d38 100644
--- a/cranelift/codegen/src/isa/x64/inst/emit.rs
+++ b/cranelift/codegen/src/isa/x64/inst/emit.rs
@@ -1336,7 +1336,7 @@ pub(crate) fn emit(
// We generate the following seq... | 1 | 3 | 2 |
55b9059954ab230589761c2b8fc9376a559e177e | Benjamin Bouvier | 2020-07-07T16:26:09 | machinst x64: remove spurious assertion about FP offset requiring to be 16-bytes aligned | diff --git a/cranelift/codegen/src/isa/x64/abi.rs b/cranelift/codegen/src/isa/x64/abi.rs
index 173cd426e..f1fe5ec21 100644
--- a/cranelift/codegen/src/isa/x64/abi.rs
+++ b/cranelift/codegen/src/isa/x64/abi.rs
@@ -195,7 +195,6 @@ impl X64ABIBody {
if self.call_conv.extends_baldrdash() {
let num_wor... | 1 | 0 | 1 |
3905a1b17bae5e26b81961e37527ded272b31e35 | Benjamin Bouvier | 2020-07-07T16:20:42 | machinst x64: implement SymbolValue and FuncAddr with a movabsq+reloc; | diff --git a/cranelift/codegen/src/isa/x64/inst/emit.rs b/cranelift/codegen/src/isa/x64/inst/emit.rs
index 04fcf9c34..4a28a306e 100644
--- a/cranelift/codegen/src/isa/x64/inst/emit.rs
+++ b/cranelift/codegen/src/isa/x64/inst/emit.rs
@@ -1479,6 +1479,25 @@ pub(crate) fn emit(
let dst = &dst.finalize(state);... | 3 | 71 | 1 |
cfa0a0c4e85e6630badc64292fc9e12e736fd34e | Benjamin Bouvier | 2020-07-07T14:34:57 | machinst x64: lower resumable_trap as trap; | diff --git a/cranelift/codegen/src/isa/x64/lower.rs b/cranelift/codegen/src/isa/x64/lower.rs
index 021528dcc..b9aed7edb 100644
--- a/cranelift/codegen/src/isa/x64/lower.rs
+++ b/cranelift/codegen/src/isa/x64/lower.rs
@@ -732,7 +732,7 @@ fn lower_insn_to_regs<C: LowerCtx<I = Inst>>(
ctx.emit(Inst::Hlt);
... | 1 | 1 | 1 |
311027869ba271bb41023ee1e0170df037118a9d | Benjamin Bouvier | 2020-07-07T14:22:03 | machinst x64: implement popcnt.i64 | diff --git a/cranelift/codegen/src/isa/x64/lower.rs b/cranelift/codegen/src/isa/x64/lower.rs
index 972042eff..021528dcc 100644
--- a/cranelift/codegen/src/isa/x64/lower.rs
+++ b/cranelift/codegen/src/isa/x64/lower.rs
@@ -390,6 +390,238 @@ fn lower_insn_to_regs<C: LowerCtx<I = Inst>>(
));
}
+ ... | 1 | 232 | 0 |
d9310e8d9092b39a9f1c7451c837f6283985ee5c | Benjamin Bouvier | 2020-07-06T16:45:07 | machinst x64: fix checked div sequence
- it should mark as clobbering (def) rdx, not modifying it
- the signed-div check requires a temporary to compare against int64_min | diff --git a/cranelift/codegen/src/isa/x64/inst/args.rs b/cranelift/codegen/src/isa/x64/inst/args.rs
index 9c6adef11..cf387e07c 100644
--- a/cranelift/codegen/src/isa/x64/inst/args.rs
+++ b/cranelift/codegen/src/isa/x64/inst/args.rs
@@ -199,7 +199,7 @@ impl RegMemImm {
match self {
Self::Reg { reg... | 4 | 38 | 7 |
f932bccaf8f8eb6350083429cf8d17c1503943db | Benjamin Bouvier | 2020-07-06T16:43:34 | machinst x64: fix sign-extension at boundary | diff --git a/cranelift/codegen/src/isa/x64/abi.rs b/cranelift/codegen/src/isa/x64/abi.rs
index 4444edafc..173cd426e 100644
--- a/cranelift/codegen/src/isa/x64/abi.rs
+++ b/cranelift/codegen/src/isa/x64/abi.rs
@@ -295,14 +295,14 @@ impl ABIBody for X64ABIBody {
(ArgumentExtension::Uext, Some(ext_mod... | 1 | 2 | 2 |
6f5403a94b9697259e087fa2d6b4b4eac49d0c18 | Benjamin Bouvier | 2020-07-06T13:44:12 | machinst x64: lower Ctz using the Bsf x86 instruction | diff --git a/cranelift/codegen/src/isa/x64/inst/args.rs b/cranelift/codegen/src/isa/x64/inst/args.rs
index f7bd6a2fe..9c6adef11 100644
--- a/cranelift/codegen/src/isa/x64/inst/args.rs
+++ b/cranelift/codegen/src/isa/x64/inst/args.rs
@@ -293,12 +293,15 @@ impl ToString for AluRmiROpcode {
pub enum ReadOnlyGprRmROpcode ... | 3 | 36 | 0 |
33e0d056453ee1cb66bf210f21b786f0f7ed70ab | Benjamin Bouvier | 2020-07-06T13:42:31 | machinst x64: have cmov modify its destination operand;
This is tricky: the control flow implicitly implied by the operand makes
it so that the output register may be undefined, if we mark it only as a
"def". Make it a "mod" instead, which matches our usage in the codebase,
and will make it crash if the output operand... | diff --git a/cranelift/codegen/src/isa/x64/inst/mod.rs b/cranelift/codegen/src/isa/x64/inst/mod.rs
index bb50f85f1..fc01c3e83 100644
--- a/cranelift/codegen/src/isa/x64/inst/mod.rs
+++ b/cranelift/codegen/src/isa/x64/inst/mod.rs
@@ -905,7 +905,7 @@ fn x64_get_regs(inst: &Inst, collector: &mut RegUsageCollector) {
... | 1 | 2 | 2 |
aa7db7fd7b6ec957553b525876f709e7b75ebeeb | Benjamin Bouvier | 2020-07-06T12:49:35 | machinst x64: fix JmpUnknown register mapping; | diff --git a/cranelift/codegen/src/isa/x64/inst/mod.rs b/cranelift/codegen/src/isa/x64/inst/mod.rs
index d4f3bb407..bb50f85f1 100644
--- a/cranelift/codegen/src/isa/x64/inst/mod.rs
+++ b/cranelift/codegen/src/isa/x64/inst/mod.rs
@@ -832,12 +832,7 @@ fn x64_get_regs(inst: &Inst, collector: &mut RegUsageCollector) {
... | 1 | 17 | 38 |
fe7dd41435a1d826dd14cb4163e574b6b831791c | Benjamin Bouvier | 2020-07-06T12:45:15 | machinst x64: fix iconst emission | diff --git a/cranelift/codegen/src/isa/x64/inst/mod.rs b/cranelift/codegen/src/isa/x64/inst/mod.rs
index d4b0e3eac..d4f3bb407 100644
--- a/cranelift/codegen/src/isa/x64/inst/mod.rs
+++ b/cranelift/codegen/src/isa/x64/inst/mod.rs
@@ -273,15 +273,13 @@ pub enum Inst {
VirtualSPOffsetAdj { offset: i64 },
}
-// Han... | 2 | 15 | 21 |
ec2209665afee178fb70fa37624a64388e576073 | Benjamin Bouvier | 2020-07-03T15:11:03 | machinst x64: implement bsr and lower Clz; | diff --git a/cranelift/codegen/src/isa/x64/inst/args.rs b/cranelift/codegen/src/isa/x64/inst/args.rs
index ca9059f01..f7bd6a2fe 100644
--- a/cranelift/codegen/src/isa/x64/inst/args.rs
+++ b/cranelift/codegen/src/isa/x64/inst/args.rs
@@ -289,6 +289,26 @@ impl ToString for AluRmiROpcode {
}
}
+#[derive(Clone, Par... | 5 | 210 | 39 |
eda2d143eddcd7a43ba87d9137f478e662108076 | Benjamin Bouvier | 2020-07-03T14:15:27 | machinst x64: add support for umulhi/smulhi; | diff --git a/cranelift/codegen/src/isa/x64/inst/emit.rs b/cranelift/codegen/src/isa/x64/inst/emit.rs
index b38a7d884..414f03319 100644
--- a/cranelift/codegen/src/isa/x64/inst/emit.rs
+++ b/cranelift/codegen/src/isa/x64/inst/emit.rs
@@ -589,6 +589,32 @@ pub(crate) fn emit(
}
}
+ Inst::Mul... | 4 | 98 | 0 |
571061fe4c243ad530426ee2c3650d231d8ec59c | Benjamin Bouvier | 2020-07-03T13:47:57 | machinst x64: add support for rotations; | diff --git a/cranelift/codegen/src/isa/x64/inst/args.rs b/cranelift/codegen/src/isa/x64/inst/args.rs
index 78187f601..ca9059f01 100644
--- a/cranelift/codegen/src/isa/x64/inst/args.rs
+++ b/cranelift/codegen/src/isa/x64/inst/args.rs
@@ -509,6 +509,8 @@ pub enum ShiftKind {
Left,
RightZ,
RightS,
+ Rota... | 4 | 49 | 8 |
22892466e71b2ae9fa1393292e6dab65e0173fce | Benjamin Bouvier | 2020-07-03T12:43:12 | machinst x64: fix implementation of *reduce;
They should just generate a plain move, since the high bits are then
ignored, and not an extended move. | diff --git a/cranelift/codegen/src/isa/x64/inst/mod.rs b/cranelift/codegen/src/isa/x64/inst/mod.rs
index 20b7037ba..ca222ebbe 100644
--- a/cranelift/codegen/src/isa/x64/inst/mod.rs
+++ b/cranelift/codegen/src/isa/x64/inst/mod.rs
@@ -356,6 +356,14 @@ impl Inst {
}
}
+ /// A convenience function to be ... | 2 | 34 | 21 |
41e13002473238c7f6418d420fbaca4adb73f7c5 | Alex Crichton | 2020-07-16T14:28:59 | Allow `improper_ctypes_definitions` in C API
This was enabled in rust-lang/rust#72700 but it looks like it's still
too noisy for it to be useful to us. | diff --git a/crates/c-api/src/lib.rs b/crates/c-api/src/lib.rs
index 9f716fb6e..5dc46d8fd 100644
--- a/crates/c-api/src/lib.rs
+++ b/crates/c-api/src/lib.rs
@@ -2,6 +2,8 @@
//! [Wasm C API](https://github.com/WebAssembly/wasm-c-api).
#![allow(non_snake_case, non_camel_case_types, non_upper_case_globals)]
+#![allow(... | 1 | 2 | 0 |
6a01b32474d765d83cc2cd172629e7061930caa3 | Andrew Brown | 2020-07-07T23:56:48 | Enable final SIMD spec tests for x86 | diff --git a/build.rs b/build.rs
index f658c3a6d..95c4b03b6 100644
--- a/build.rs
+++ b/build.rs
@@ -202,8 +202,6 @@ fn ignore(testsuite: &str, testname: &str, strategy: &str) -> bool {
// to be a big chunk of work to implement them all there!
("simd", _) if target.contains("aarch64") => retur... | 1 | 0 | 2 |
3576d8c5bb135c8a44ca6595ad041f84be11246f | Andrew Brown | 2020-07-07T23:54:18 | Translate Wasm's `widen` instructions to Cranelift's `[u|s]widen_[low|high]` | diff --git a/cranelift/wasm/src/code_translator.rs b/cranelift/wasm/src/code_translator.rs
index 64556bddd..79eae5c2a 100644
--- a/cranelift/wasm/src/code_translator.rs
+++ b/cranelift/wasm/src/code_translator.rs
@@ -1582,17 +1582,39 @@ pub fn translate_operator<FE: FuncEnvironment + ?Sized>(
let (a, b) = ... | 1 | 33 | 11 |
0e5e8a62c85e717ad53bd1b8756c1a6f2aec4ac8 | Andrew Brown | 2020-07-07T20:37:37 | Add `DerivedFunction` for doubling lane widths and halving the number of lanes (i.e. merging)
Certain operations (e.g. widening) will have operands with types like `NxM` but will return results with types like `(N*2)x(M/2)` (double the lane width, halve the number of lanes; maintain the same number of vector bits). Th... | diff --git a/cranelift/codegen/meta/src/cdsl/typevar.rs b/cranelift/codegen/meta/src/cdsl/typevar.rs
index 0c0b2e964..752b458b2 100644
--- a/cranelift/codegen/meta/src/cdsl/typevar.rs
+++ b/cranelift/codegen/meta/src/cdsl/typevar.rs
@@ -211,6 +211,24 @@ impl TypeVar {
"can't double 256 lanes"
... | 3 | 48 | 2 |
abf157bd6999caa3c96d902cb2396c746f91a877 | Benjamin Bouvier | 2020-07-09T15:18:22 | machinst x64: Only use the feature flag to enable the x64 new backend;
Before this patch, running the x64 new backend would require both
compiling with --features experimental_x64 and running with
`use_new_backend`.
This patches changes this behavior so that the runtime flag is not
needed anymore: using the feature f... | diff --git a/cranelift/Cargo.toml b/cranelift/Cargo.toml
index 7c63bea27..d72bcc4d9 100644
--- a/cranelift/Cargo.toml
+++ b/cranelift/Cargo.toml
@@ -48,3 +48,4 @@ default = ["disas", "wasm", "cranelift-codegen/all-arch"]
disas = ["capstone"]
enable-peepmatic = ["cranelift-codegen/enable-peepmatic", "cranelift-filetes... | 14 | 134 | 44 |
400639245c21f38cfbd493f881af5b7a545aba98 | Anton Kirilov | 2020-06-19T14:48:27 | AArch64: Remove show_freg_sized()
It provides the same functionality as show_vreg_scalar().
Copyright (c) 2020, Arm Limited. | diff --git a/cranelift/codegen/src/isa/aarch64/inst/mod.rs b/cranelift/codegen/src/isa/aarch64/inst/mod.rs
index c0855c988..79a72c245 100644
--- a/cranelift/codegen/src/isa/aarch64/inst/mod.rs
+++ b/cranelift/codegen/src/isa/aarch64/inst/mod.rs
@@ -2509,7 +2509,7 @@ impl Inst {
ScalarSize::Size64 =... | 2 | 48 | 59 |
aa84a4173c90bd3280b1171dda9c067a95be0824 | Joey Gouly | 2020-07-14T17:19:11 | arm64: Implement saturating SIMD arithmetic
Copyright (c) 2020, Arm Limited. | diff --git a/build.rs b/build.rs
index c33164811..f658c3a6d 100644
--- a/build.rs
+++ b/build.rs
@@ -189,8 +189,10 @@ fn ignore(testsuite: &str, testname: &str, strategy: &str) -> bool {
("simd", "simd_f64x2_cmp") => return false,
("simd", "simd_i8x16_arith") => return false,
("si... | 5 | 260 | 64 |
88a84e90ef91b275041c5ebce6fba53fd46e2277 | bjorn3 | 2020-06-29T09:00:30 | Fix Switch for 128bit integers | diff --git a/cranelift/frontend/src/switch.rs b/cranelift/frontend/src/switch.rs
index 867b4499d..5c8a9bb83 100644
--- a/cranelift/frontend/src/switch.rs
+++ b/cranelift/frontend/src/switch.rs
@@ -1,11 +1,12 @@
use super::HashMap;
use crate::frontend::FunctionBuilder;
use alloc::vec::Vec;
+use core::convert::TryFrom... | 1 | 97 | 16 |
79dfac5514c14c62a77995730a9716bee668757e | Anton Kirilov | 2020-06-11T13:20:49 | Refactor the InstSize enum in the AArch64 backend
The main issue with the InstSize enum was that it was used both for
GPR and SIMD & FP operands, even though machine instructions do not
mix them in general (as in a destination register is either a GPR
or not). As a result it had methods such as sf_bit() that made
sens... | diff --git a/cranelift/codegen/src/isa/aarch64/inst/args.rs b/cranelift/codegen/src/isa/aarch64/inst/args.rs
index 2b416145b..6bbd61868 100644
--- a/cranelift/codegen/src/isa/aarch64/inst/args.rs
+++ b/cranelift/codegen/src/isa/aarch64/inst/args.rs
@@ -403,8 +403,8 @@ impl ShowWithRRU for MemArg {
&MemArg:... | 7 | 268 | 231 |
3638dba855c0a73e6a99d131ccc539ce8ffc238a | Nick Fitzgerald | 2020-07-13T15:56:32 | examples: Run the correct example executable on Windows
We were accidentally always running the `fib-debug/main` example because of
shenanigans with alphabetical ordering and hard coding "main.exe" as the command
we run. Now we properly detect which example we built and run the appropriate
executable. | diff --git a/crates/misc/run-examples/src/main.rs b/crates/misc/run-examples/src/main.rs
index 358b73831..94e5b56dc 100644
--- a/crates/misc/run-examples/src/main.rs
+++ b/crates/misc/run-examples/src/main.rs
@@ -84,10 +84,14 @@ fn main() -> anyhow::Result<()> {
.arg("ntdll.lib")
... | 1 | 6 | 2 |
9f0ec620f0d1c7d2e95931cc8d57750cc9b5c5c2 | Nick Fitzgerald | 2020-07-10T20:54:05 | wasmtime-c-api: Remove duplicate tests of examples
The canonical examples tests will be the examples run via `cargo run -p
run-examples` from now on. Those tests have two advantages over the ones being
deleted:
1. They will automatically pick up new examples and run/test them.
2. They support all of Linux, MacOS, and... | diff --git a/crates/c-api/tests/wasm-c-examples.rs b/crates/c-api/tests/wasm-c-examples.rs
deleted file mode 100644
index 5ae6ccf75..000000000
--- a/crates/c-api/tests/wasm-c-examples.rs
+++ /dev/null
@@ -1,163 +0,0 @@
-use std::env;
-use std::fs;
-use std::path::Path;
-use std::process::Command;
-use std::sync::Once;
... | 1 | 0 | 163 |
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